diff --git a/.azure-pipelines/azure-pipelines-UpgrateVersion.yml b/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
index b40a5d03330..8c89db8db8b 100644
--- a/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
+++ b/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
@@ -37,10 +37,9 @@ parameters:
   - centec
   - centec-arm64
   - generic
-  - marvell-armhf
-  - marvell-arm64
+  - marvell-prestera-armhf
+  - marvell-prestera-arm64
   - mellanox
-  - pensando
   - nvidia-bluefield
 
 stages:
@@ -97,7 +96,7 @@ stages:
   jobs:
   - job: UpgradeVersions
     pool:
-      vmImage: 'ubuntu-20.04'
+      vmImage: 'ubuntu-22.04'
     steps:
     - script: |
         if [ -z "$(which gh)" ]; then
diff --git a/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml b/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
deleted file mode 100644
index a077bb132da..00000000000
--- a/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
+++ /dev/null
@@ -1,67 +0,0 @@
-# C/C++ with GCC
-# Build your C/C++ project with GCC using make.
-# Add steps that publish test results, save build artifacts, deploy, and more:
-# https://docs.microsoft.com/azure/devops/pipelines/apps/c-cpp/gcc
-pr: none
-
-trigger:
-  batch: true
-  branches:
-    include:
-    - master
-    - 202???
-
-schedules:
-- cron: "0 0 * * *"
-  displayName: Daily build
-  branches:
-    include:
-      - master
-      - 202???
-  always: true
-
-stages:
-- stage: Build
-
-  jobs:
-  - job:
-    displayName: "amd64/ubuntu-20.04"
-    pool:
-      vmImage: 'ubuntu-20.04'
-
-    steps:
-    - checkout: self
-      submodules: true
-    - script: |
-        sudo apt-get update
-        sudo apt-get install -y make wget libtool m4 autoconf dh-exec libdebhelper-perl=13.6ubuntu1~bpo20.04.1 debhelper=13.6ubuntu1~bpo20.04.1 \
-                         cmake pkg-config python3-pip python cmake libgtest-dev libgmock-dev libyang-dev \
-                         debhelper-compat dh-elpa dh-sequence-python3 python3-all \
-                         libpython3-all-dev python3-six xmlto unzip rake-compiler gem2deb pkg-php-tools \
-                         ant default-jdk maven-repo-helper libguava-java \
-                         libboost-all-dev libgtest-dev build-essential swig4.0 swig
-        sudo pip3 install pytest click
-        wget http://ftp.us.debian.org/debian/pool/main/libg/libgoogle-gson-java/libgoogle-gson-java_2.8.6-1+deb11u1_all.deb
-        sudo dpkg -i libgoogle-gson-java_2.8.6-1+deb11u1_all.deb
-        mkdir -p /tmp/artifacts
-      displayName: "Install dependencies"
-    - script: |
-        BLDENV=bullseye SONIC_CONFIG_MAKE_JOBS=$(nproc) CONFIGURED_ARCH=amd64 DEST=/tmp/artifacts make -f ../rules/protobuf.mk -f protobuf/Makefile
-      workingDirectory: src
-      displayName: "Build protobuf"
-    - script: |
-        sudo dpkg -i protobuf-compiler_3.21.12-3_amd64.deb libprotoc32_3.21.12-3_amd64.deb \
-                      libprotobuf32_3.21.12-3_amd64.deb libprotobuf-dev_3.21.12-3_amd64.deb \
-                      libprotobuf-lite32_3.21.12-3_amd64.deb
-      workingDirectory: /tmp/artifacts
-      displayName: "Install protobuf"
-    - script: |
-        dpkg-buildpackage -rfakeroot -b -us -uc
-      workingDirectory: src/sonic-dash-api
-      displayName: "Build sonic-dash-api"
-    - script: |
-        cp *.deb /tmp/artifacts
-      workingDirectory: src
-    - publish: /tmp/artifacts
-      artifact: sonic-buildimage.amd64.ubuntu20_04
-      displayName: "Archive sonic-buildimage debian packages for ubuntu20.04"
diff --git a/.azure-pipelines/azure-pipelines-build-ubuntu-2204.yml b/.azure-pipelines/azure-pipelines-build-ubuntu-2204.yml
new file mode 100644
index 00000000000..882a3223d0e
--- /dev/null
+++ b/.azure-pipelines/azure-pipelines-build-ubuntu-2204.yml
@@ -0,0 +1,68 @@
+# C/C++ with GCC
+# Build your C/C++ project with GCC using make.
+# Add steps that publish test results, save build artifacts, deploy, and more:
+# https://docs.microsoft.com/azure/devops/pipelines/apps/c-cpp/gcc
+pr: none
+
+trigger:
+  batch: true
+  branches:
+    include:
+    - master
+    - 202???
+
+schedules:
+- cron: "0 0 * * *"
+  displayName: Daily build
+  branches:
+    include:
+      - master
+      - 202???
+  always: true
+
+stages:
+- stage: Build
+
+  jobs:
+  - job:
+    displayName: "amd64/ubuntu-22.04"
+    pool:
+      vmImage: 'ubuntu-22.04'
+
+    steps:
+    - checkout: self
+      submodules: true
+    - script: |
+        set -e
+        sudo apt-get update
+        sudo apt-get install -y make wget libtool m4 autoconf dh-exec debhelper \
+                         cmake pkg-config python3-pip python3 cmake libgtest-dev libgmock-dev libyang-dev \
+                         debhelper-compat dh-elpa dh-sequence-python3 python3-all \
+                         libpython3-all-dev python3-six xmlto unzip rake-compiler gem2deb pkg-php-tools \
+                         ant default-jdk maven-repo-helper libguava-java devscripts \
+                         libboost-all-dev libgtest-dev build-essential swig4.0 swig
+        sudo pip3 install pytest click
+        wget http://ftp.us.debian.org/debian/pool/main/libg/libgoogle-gson-java/libgoogle-gson-java_2.8.6-1+deb11u1_all.deb
+        sudo dpkg -i libgoogle-gson-java_2.8.6-1+deb11u1_all.deb
+        mkdir -p /tmp/artifacts
+      displayName: "Install dependencies"
+    - script: |
+        BLDENV=bullseye SONIC_CONFIG_MAKE_JOBS=$(nproc) CONFIGURED_ARCH=amd64 DEST=/tmp/artifacts make -f ../rules/protobuf.mk -f protobuf/Makefile
+      workingDirectory: src
+      displayName: "Build protobuf"
+    - script: |
+        sudo dpkg -i protobuf-compiler_3.21.12-3_amd64.deb libprotoc32_3.21.12-3_amd64.deb \
+                      libprotobuf32_3.21.12-3_amd64.deb libprotobuf-dev_3.21.12-3_amd64.deb \
+                      libprotobuf-lite32_3.21.12-3_amd64.deb
+      workingDirectory: /tmp/artifacts
+      displayName: "Install protobuf"
+    - script: |
+        dpkg-buildpackage -rfakeroot -b -us -uc
+      workingDirectory: src/sonic-dash-api
+      displayName: "Build sonic-dash-api"
+    - script: |
+        cp *.deb /tmp/artifacts
+      workingDirectory: src
+    - publish: /tmp/artifacts
+      artifact: sonic-buildimage.amd64.ubuntu22_04
+      displayName: "Archive sonic-buildimage debian packages for ubuntu22.04"
diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml
index 20d73b58d9e..faabc4300d6 100644
--- a/.azure-pipelines/azure-pipelines-build.yml
+++ b/.azure-pipelines/azure-pipelines-build.yml
@@ -94,23 +94,23 @@ jobs:
           variables:
             dbg_image: yes
 
-        - name: marvell-armhf
+        - name: marvell-prestera-armhf
           ${{ if not(parameters.qemuOrCrossBuild) }}:
             pool: sonicbld-armhf
           timeoutInMinutes: 2880
           variables:
-            PLATFORM_NAME: marvell
+            PLATFORM_NAME: marvell-prestera
             PLATFORM_ARCH: armhf
 
-        - name: marvell-arm64
+        - name: marvell-prestera-arm64
           ${{ if not(parameters.qemuOrCrossBuild) }}:
             pool: sonicbld-arm64
           timeoutInMinutes: 2880
           variables:
-            PLATFORM_NAME: marvell
+            PLATFORM_NAME: marvell-prestera
             PLATFORM_ARCH: arm64
 
-        - name: marvell
+        - name: marvell-prestera
 
         - name: mellanox
           variables:
diff --git a/.azure-pipelines/azure-pipelines-image-template.yml b/.azure-pipelines/azure-pipelines-image-template.yml
index 36d0b657bd6..11214a0f3dc 100644
--- a/.azure-pipelines/azure-pipelines-image-template.yml
+++ b/.azure-pipelines/azure-pipelines-image-template.yml
@@ -36,7 +36,7 @@ jobs:
       - script: |
           [ -n "$OVERRIDE_BUILD_OPTIONS" ] && OVERRIDE_BUILD_OPTIONS=$(OVERRIDE_BUILD_OPTIONS)
           BUILD_OPTIONS="$(BUILD_OPTIONS) $OVERRIDE_BUILD_OPTIONS"
-          if [ -n "$(CACHE_MODE)" ] && echo $(PLATFORM_AZP) | grep -E -q "^(vs|broadcom|mellanox|marvell-armhf|marvell-arm64|vpp)$"; then
+          if [ -n "$(CACHE_MODE)" ] && echo $(PLATFORM_AZP) | grep -E -q "^(vs|broadcom|mellanox|marvell-prestera-armhf|marvell-prestera-arm64|vpp)$"; then
             CACHE_OPTIONS="SONIC_DPKG_CACHE_METHOD=$(CACHE_MODE) SONIC_DPKG_CACHE_SOURCE=/nfs/dpkg_cache/$(PLATFORM_AZP)"
             BUILD_OPTIONS="$BUILD_OPTIONS $CACHE_OPTIONS"
           fi
diff --git a/.azure-pipelines/build-template.yml b/.azure-pipelines/build-template.yml
index 813126792e6..11efaaf9e32 100644
--- a/.azure-pipelines/build-template.yml
+++ b/.azure-pipelines/build-template.yml
@@ -4,7 +4,7 @@ parameters:
   values:
   - broadcom
   - centec-arm64
-  - marvell-armhf
+  - marvell-prestera-armhf
   - mellanox
   - vs
 
@@ -21,7 +21,7 @@ parameters:
   values:
   - brcm
   - centec-arm64
-  - marvell-armhf
+  - marvell-prestera-armhf
   - mlnx
   - vs
 
diff --git a/.azure-pipelines/docker-sonic-mgmt-mixed.yml b/.azure-pipelines/docker-sonic-mgmt-mixed.yml
new file mode 100644
index 00000000000..8841aa188de
--- /dev/null
+++ b/.azure-pipelines/docker-sonic-mgmt-mixed.yml
@@ -0,0 +1,115 @@
+# Starter pipeline
+# Start with a minimal pipeline that you can customize to build and deploy your code.
+# Add steps that build, run tests, deploy, and more:
+# https://aka.ms/yaml
+# Build and push sonic-mgmt image
+
+schedules:
+- cron: "0 8 * * *"
+  branches:
+    include:
+    - master
+  always: true
+
+trigger: none
+pr:
+  branches:
+    include:
+    - master
+  paths:
+    include:
+    - dockers/docker-sonic-mgmt
+
+resources:
+  repositories:
+  - repository: sonic-mgmt
+    type: github
+    name: sonic-net/sonic-mgmt
+    ref: master
+    endpoint: sonic-net
+
+parameters:
+- name: registry_url
+  type: string
+  default: sonicdev-microsoft.azurecr.io
+- name: registry_conn
+  type: string
+  default: sonicdev
+
+stages:
+- stage: Build
+  jobs:
+  - job: Build
+    pool: sonicbld-1es
+    timeoutInMinutes: 360
+    steps:
+    - template: cleanup.yml
+    - checkout: self
+      clean: true
+
+    - script: |
+        set -x
+        sudo setfacl -R -b $(Agent.BuildDirectory)
+      displayName: 'setfacl'
+
+    - bash: |
+        set -xe
+        git submodule update --init --recursive -- src/sonic-platform-daemons src/sonic-genl-packet src/sonic-sairedis src/ptf src/sonic-device-data src/sonic-dash-api
+
+        make SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y configure PLATFORM=generic DOCKER_BUILDKIT=0
+        make -f Makefile.work BLDENV=bullseye SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y LEGACY_SONIC_MGMT_DOCKER=y target/docker-sonic-mgmt.gz
+        cp target -r $(Build.ArtifactStagingDirectory)/target
+        docker load -i target/docker-sonic-mgmt.gz
+        docker tag docker-sonic-mgmt $REGISTRY_SERVER/docker-sonic-mgmt:mixed
+      env:
+        REGISTRY_SERVER: ${{ parameters.registry_url }}
+      displayName: Build docker-sonic-mgmt.gz
+
+    - publish:  $(Build.ArtifactStagingDirectory)
+      artifact: 'docker-sonic-mgmt'
+      displayName: "Archive docker image sonic-mgmt"
+
+  - job: validate_docker_image_and_upload
+    pool: sonicbld-1es
+    timeoutInMinutes: 360
+    dependsOn: Build
+    steps:
+      - checkout: sonic-mgmt
+        clean: true
+        fetchDepth: 0
+        displayName: 'Checkout sonic-mgmt'
+
+      - download: current
+        artifact: 'docker-sonic-mgmt'
+        displayName: "Download docker image sonic-mgmt"
+
+      - script: |
+          set -ex
+
+          docker load -i $(Pipeline.Workspace)/docker-sonic-mgmt/target/docker-sonic-mgmt.gz
+
+          cd ansible
+          sudo ./setup-management-network.sh -d
+          cd ../
+          docker rm -f sonic-mgmt
+
+          ./setup-container.sh -n sonic-mgmt -d /data -i docker-sonic-mgmt -v
+          docker exec sonic-mgmt bash -c "echo 'Container is running' && ps aux"
+        displayName: 'Setup sonic-mgmt docker container'
+
+      - bash: |
+          set -ex
+
+          docker tag docker-sonic-mgmt:latest $REGISTRY_SERVER/docker-sonic-mgmt:mixed
+        env:
+          REGISTRY_SERVER: ${{ parameters.registry_url }}
+        displayName: 'Tag docker-sonic-mgmt'
+
+      - task: Docker@2
+        displayName: Upload image
+        condition: succeeded()
+        inputs:
+          containerRegistry: ${{ parameters.registry_conn }}
+          repository: docker-sonic-mgmt
+          command: push
+          tags: mixed
diff --git a/.azure-pipelines/docker-sonic-mgmt-py3-only.yml b/.azure-pipelines/docker-sonic-mgmt-py3-only.yml
deleted file mode 100644
index e3434e39ffb..00000000000
--- a/.azure-pipelines/docker-sonic-mgmt-py3-only.yml
+++ /dev/null
@@ -1,69 +0,0 @@
-# Starter pipeline
-# Start with a minimal pipeline that you can customize to build and deploy your code.
-# Add steps that build, run tests, deploy, and more:
-# https://aka.ms/yaml
-# Build and push sonic-mgmt image
-
-schedules:
-- cron: "0 8 * * *"
-  branches:
-    include:
-    - master
-  always: true
-
-trigger: none
-pr:
-  branches:
-    include:
-    - master
-  paths:
-    include:
-    - dockers/docker-sonic-mgmt
-
-parameters:
-- name: registry_url
-  type: string
-  default: sonicdev-microsoft.azurecr.io
-- name: registry_conn
-  type: string
-  default: sonicdev
-
-stages:
-- stage: Build
-  jobs:
-  - job: Build
-    pool: sonicbld-1es
-    timeoutInMinutes: 360
-    steps:
-    - template: cleanup.yml
-    - checkout: self
-      clean: true
-
-    - script: |
-        set -x
-        sudo setfacl -R -b $(Agent.BuildDirectory)
-      displayName: 'setfacl'
-
-    - bash: |
-        set -xe
-        git submodule update --init --recursive -- src/sonic-platform-daemons src/sonic-genl-packet src/sonic-sairedis src/ptf src/sonic-device-data src/sonic-dash-api
-
-        make SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y configure PLATFORM=generic
-        make -f Makefile.work BLDENV=bullseye SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y LEGACY_SONIC_MGMT_DOCKER=n target/docker-sonic-mgmt.gz
-        cp target -r $(Build.ArtifactStagingDirectory)/target
-        docker load -i target/docker-sonic-mgmt.gz
-        docker tag docker-sonic-mgmt $REGISTRY_SERVER/docker-sonic-mgmt:py3only
-      env:
-        REGISTRY_SERVER: ${{ parameters.registry_url }}
-      displayName: Build docker-sonic-mgmt.gz
-    - task: Docker@2
-      displayName: Upload image
-      inputs:
-        containerRegistry: ${{ parameters.registry_conn }}
-        repository: docker-sonic-mgmt
-        command: push
-        tags: py3only
-    - publish:  $(Build.ArtifactStagingDirectory)
-      artifact: 'docker-sonic-mgmt'
-      displayName: "Archive docker image sonic-mgmt"
-
diff --git a/.azure-pipelines/docker-sonic-mgmt.yml b/.azure-pipelines/docker-sonic-mgmt.yml
index dd48720a1fe..d5b8cb9aabb 100644
--- a/.azure-pipelines/docker-sonic-mgmt.yml
+++ b/.azure-pipelines/docker-sonic-mgmt.yml
@@ -20,6 +20,14 @@ pr:
     include:
     - dockers/docker-sonic-mgmt
 
+resources:
+  repositories:
+  - repository: sonic-mgmt
+    type: github
+    name: sonic-net/sonic-mgmt
+    ref: master
+    endpoint: sonic-net
+
 parameters:
 - name: registry_url
   type: string
@@ -47,22 +55,61 @@ stages:
         set -xe
         git submodule update --init --recursive -- src/sonic-platform-daemons src/sonic-genl-packet src/sonic-sairedis src/ptf src/sonic-device-data src/sonic-dash-api
 
-        make SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y configure PLATFORM=generic
-        make -f Makefile.work BLDENV=bullseye SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y LEGACY_SONIC_MGMT_DOCKER=y target/docker-sonic-mgmt.gz
+        make SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y configure PLATFORM=generic DOCKER_BUILDKIT=0
+        make -f Makefile.work BLDENV=bullseye SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y LEGACY_SONIC_MGMT_DOCKER=n target/docker-sonic-mgmt.gz
         cp target -r $(Build.ArtifactStagingDirectory)/target
         docker load -i target/docker-sonic-mgmt.gz
         docker tag docker-sonic-mgmt $REGISTRY_SERVER/docker-sonic-mgmt:latest
       env:
         REGISTRY_SERVER: ${{ parameters.registry_url }}
       displayName: Build docker-sonic-mgmt.gz
+
+    - publish:  $(Build.ArtifactStagingDirectory)
+      artifact: 'docker-sonic-mgmt'
+      displayName: "Archive docker image sonic-mgmt"
+
+  - job: validate_docker_image_and_upload
+    pool: sonicbld-1es
+    timeoutInMinutes: 360
+    dependsOn: Build
+    steps:
+    - checkout: sonic-mgmt
+      clean: true
+      fetchDepth: 0
+      displayName: 'Checkout sonic-mgmt'
+
+    - download: current
+      artifact: 'docker-sonic-mgmt'
+      displayName: "Download docker image sonic-mgmt"
+
+    - script: |
+        set -ex
+
+        docker load -i $(Pipeline.Workspace)/docker-sonic-mgmt/target/docker-sonic-mgmt.gz
+
+        cd ansible
+        sudo ./setup-management-network.sh -d
+        cd ../
+        docker rm -f sonic-mgmt
+
+        ./setup-container.sh -n sonic-mgmt -d /data -i docker-sonic-mgmt -v
+
+        docker exec sonic-mgmt bash -c "echo 'Container is running' && ps aux"
+      displayName: 'Setup sonic-mgmt docker container and verify'
+
+    - bash: |
+        set -ex
+
+        docker tag docker-sonic-mgmt:latest $REGISTRY_SERVER/docker-sonic-mgmt:latest
+      env:
+        REGISTRY_SERVER: ${{ parameters.registry_url }}
+      displayName: 'Tag docker-sonic-mgmt'
+
     - task: Docker@2
       displayName: Upload image
+      condition: succeeded()
       inputs:
         containerRegistry: ${{ parameters.registry_conn }}
         repository: docker-sonic-mgmt
         command: push
         tags: latest
-    - publish:  $(Build.ArtifactStagingDirectory)
-      artifact: 'docker-sonic-mgmt'
-      displayName: "Archive docker image sonic-mgmt"
-
diff --git a/.azure-pipelines/docker-sonic-slave.yml b/.azure-pipelines/docker-sonic-slave.yml
index 9d8b30210ac..6b4da92c69e 100644
--- a/.azure-pipelines/docker-sonic-slave.yml
+++ b/.azure-pipelines/docker-sonic-slave.yml
@@ -48,7 +48,6 @@ parameters:
   - bullseye
   - buster
   - stretch
-  - jessie
 - name: registry_url
   type: string
   default: sonicdev-microsoft.azurecr.io
@@ -61,14 +60,11 @@ stages:
   jobs:
   - ${{ each dist in parameters.dists }}:
     - ${{ if endswith(variables['Build.DefinitionName'], dist) }}:
-      - ${{ each arch in parameters.arches }}:
-        - template: .azure-pipelines/docker-sonic-slave-template.yml@buildimage
-          parameters:
-            pool: sonicbld-1es
-            arch: ${{ arch }}
-            dist: ${{ dist }}
-            ${{ if ne(arch, 'amd64') }}:
-              march: _march_${{ arch }}
+      - template: .azure-pipelines/docker-sonic-slave-template.yml@buildimage
+        parameters:
+          pool: sonicbld-1es
+          arch: amd64
+          dist: ${{ dist }}
 - stage: Build_native_arm
   dependsOn: []
   jobs:
diff --git a/.azure-pipelines/official-build-cache.yml b/.azure-pipelines/official-build-cache.yml
index 0f7b34e9bd5..17e9f95201d 100644
--- a/.azure-pipelines/official-build-cache.yml
+++ b/.azure-pipelines/official-build-cache.yml
@@ -45,9 +45,9 @@ stages:
           variables:
             docker_syncd_rpc_image: yes
             platform_rpc: mlnx
-        - name: marvell-armhf
+        - name: marvell-prestera-armhf
           pool: sonicbld-armhf
           timeoutInMinutes: 1200
           variables:
-            PLATFORM_NAME: marvell
+            PLATFORM_NAME: marvell-prestera
             PLATFORM_ARCH: armhf
diff --git a/.azure-pipelines/official-build-cisco-8000.yml b/.azure-pipelines/official-build-cisco-8000.yml
index 7ec7430fc3a..9cbea6d2dd9 100644
--- a/.azure-pipelines/official-build-cisco-8000.yml
+++ b/.azure-pipelines/official-build-cisco-8000.yml
@@ -41,7 +41,7 @@ stages:
     CACHE_MODE: wcache
     SKIP_CHECKOUT: true
     TERM: ''
-    PACKAGE_URL: "https://sonicstorage.blob.core.windows.net/packages"
+    PACKAGE_URL: "https://packages.trafficmanager.net/public"
 
   jobs:
   - template: azure-pipelines-build.yml
diff --git a/.azure-pipelines/official-build-vs-with-test.yml b/.azure-pipelines/official-build-vs-with-test.yml
new file mode 100644
index 00000000000..712884eb51c
--- /dev/null
+++ b/.azure-pipelines/official-build-vs-with-test.yml
@@ -0,0 +1,166 @@
+# This pipeline generates daily, successful virtual SONiC images, primarily for PR testing in non-build repositories.
+
+name: $(Build.DefinitionName)_$(SourceBranchName)_$(Date:yyyyMMdd)
+
+# trigger this pipeline automatically by schedule.
+schedules:
+  - cron: "0 8 * * *" # At 08:00, every day UTC
+    displayName: "Daily Build and Test SONiC virtual images"
+    branches:
+      include:
+        - master
+        - 202305
+        - 202311
+        - 202405
+        - 202411
+
+# trigger this pipeline automatically on any branch push.
+trigger:
+  branches:
+    include:
+      - master
+      - 202305
+      - 202311
+      - 202405
+      - 202411
+
+pr: none
+
+resources:
+  repositories:
+    - repository: sonic-mgmt
+      type: github
+      name: sonic-net/sonic-mgmt
+      ref: master
+      endpoint: sonic-net
+    - repository: buildimage
+      type: github
+      name: sonic-net/sonic-buildimage
+      endpoint: sonic-net
+      ref: master
+
+variables:
+  - template: .azure-pipelines/azure-pipelines-repd-build-variables.yml@buildimage
+  - template: .azure-pipelines/template-variables.yml@buildimage
+  - name: CACHE_MODE
+    value: rcache
+  - name: ENABLE_FIPS
+    value: y
+  - name: BUILD_BRANCH
+    value: $(Build.SourceBranchName)
+
+stages:
+  - stage: BuildVS
+    pool: sonicbld-1es
+    jobs:
+      - template: azure-pipelines-build.yml
+        parameters:
+          buildOptions: 'USERNAME=admin SONIC_BUILD_JOBS=$(nproc) BUILD_MULTIASIC_KVM=y INCLUDE_DHCP_SERVER=y ${{ variables.VERSION_CONTROL_OPTIONS }}'
+          jobGroups:
+            - name: vs
+
+  - stage: Test
+    dependsOn: BuildVS
+    condition: and(succeeded(), in(dependencies.BuildVS.result, 'Succeeded', 'SucceededWithIssues'))
+    variables:
+      - group: SONiC-Elastictest
+
+    jobs:
+      - job: t0_elastictest
+        pool: sonic-ubuntu-1c
+        displayName: "kvmtest-t0 by Elastictest"
+        timeoutInMinutes: 240
+        continueOnError: false
+        steps:
+          - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+            parameters:
+              TOPOLOGY: t0
+              MIN_WORKER: $(T0_INSTANCE_NUM)
+              MAX_WORKER: $(T0_INSTANCE_NUM)
+              MGMT_BRANCH: $(BUILD_BRANCH)
+
+      - job: t0_2vlans_elastictest
+        pool: sonic-ubuntu-1c
+        displayName: "kvmtest-t0-2vlans by Elastictest"
+        timeoutInMinutes: 240
+        continueOnError: false
+        steps:
+          - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+            parameters:
+              TOPOLOGY: t0
+              TEST_SET: t0-2vlans
+              MIN_WORKER: $(T0_2VLANS_INSTANCE_NUM)
+              MAX_WORKER: $(T0_2VLANS_INSTANCE_NUM)
+              MGMT_BRANCH: $(BUILD_BRANCH)
+              DEPLOY_MG_EXTRA_PARAMS: "-e vlan_config=two_vlan_a"
+
+      - job: t1_lag_elastictest
+        pool: sonic-ubuntu-1c
+        displayName: "kvmtest-t1-lag by Elastictest"
+        timeoutInMinutes: 240
+        continueOnError: false
+        steps:
+          - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+            parameters:
+              TOPOLOGY: t1-lag
+              MIN_WORKER: $(T1_LAG_INSTANCE_NUM)
+              MAX_WORKER: $(T1_LAG_INSTANCE_NUM)
+              MGMT_BRANCH: $(BUILD_BRANCH)
+
+      - job: multi_asic_elastictest
+        displayName: "kvmtest-multi-asic-t1-lag by Elastictest"
+        pool: sonic-ubuntu-1c
+        timeoutInMinutes: 240
+        continueOnError: true
+        steps:
+          - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+            parameters:
+              TOPOLOGY: t1-8-lag
+              TEST_SET: multi-asic-t1-lag
+              MIN_WORKER: $(MULTI_ASIC_INSTANCE_NUM)
+              MAX_WORKER: $(MULTI_ASIC_INSTANCE_NUM)
+              NUM_ASIC: 4
+              MGMT_BRANCH: $(BUILD_BRANCH)
+
+      - job: dualtor_elastictest
+        pool: sonic-ubuntu-1c
+        displayName: "kvmtest-dualtor-t0 by Elastictest"
+        timeoutInMinutes: 240
+        continueOnError: false
+        steps:
+          - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+            parameters:
+              TOPOLOGY: dualtor
+              MIN_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
+              MAX_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
+              MGMT_BRANCH: $(BUILD_BRANCH)
+              COMMON_EXTRA_PARAMS: "--disable_loganalyzer "
+
+      - job: sonic_t0_elastictest
+        displayName: "kvmtest-t0-sonic by Elastictest"
+        pool: sonic-ubuntu-1c
+        timeoutInMinutes: 240
+        continueOnError: false
+        steps:
+          - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+            parameters:
+              TOPOLOGY: t0-64-32
+              MIN_WORKER: $(T0_SONIC_INSTANCE_NUM)
+              MAX_WORKER: $(T0_SONIC_INSTANCE_NUM)
+              TEST_SET: t0-sonic
+              MGMT_BRANCH: $(BUILD_BRANCH)
+              COMMON_EXTRA_PARAMS: "--neighbor_type=sonic "
+              VM_TYPE: vsonic
+
+      - job: dpu_elastictest
+        displayName: "kvmtest-dpu by Elastictest"
+        timeoutInMinutes: 240
+        continueOnError: false
+        pool: sonic-ubuntu-1c
+        steps:
+          - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+            parameters:
+              TOPOLOGY: dpu
+              MIN_WORKER: $(T0_SONIC_INSTANCE_NUM)
+              MAX_WORKER: $(T0_SONIC_INSTANCE_NUM)
+              MGMT_BRANCH: $(BUILD_BRANCH)
diff --git a/.github/ISSUE_TEMPLATE/01-bug.yml b/.github/ISSUE_TEMPLATE/01-bug.yml
new file mode 100644
index 00000000000..ed8ed501d62
--- /dev/null
+++ b/.github/ISSUE_TEMPLATE/01-bug.yml
@@ -0,0 +1,102 @@
+name: Report a bug
+description: File a bug report
+title: "Bug:"
+labels: ['Bug :bug:']
+body:
+  - type: markdown
+    attributes:
+      value: |
+        Thanks for taking the time to fill out this report!
+
+        If you are reporting a new issue, make sure that we do not have any duplicates already open. You can ensure this by searching the issue list for this repository. If there is a duplicate, please close your issue and add a comment to the existing issue instead.
+
+        If you suspect your issue is a bug, please edit your issue description to include the BUG REPORT INFORMATION shown below. If you fail to provide this information within 7 days, we cannot debug your issue and will close it. We will however, reopen it if you later provide the information.
+
+        For more information about reporting issues, see [SONiC Issue Reporting Page](https://github.com/sonic-net/SONiC/wiki#report-issues)
+
+  - type: markdown
+    id: tc-bug-contact-links
+    attributes:
+      value: |
+        Please ask and answer questions here at the [SONiC Support Forums](https://groups.google.com/forum/#!forum/sonicproject)
+
+  - type: dropdown
+    id: tc-bug-platform
+    attributes:
+      label: Is it platform specific
+      description: Platform name
+      options:
+        - generic
+        - barefoot
+        - broadcom
+        - cavium
+        - centec
+        - innovium
+        - marvell
+        - mellanox
+        - nephos
+      default: 0
+    validations:
+      required: true
+
+  - type: dropdown
+    id: tc-bug-severity
+    attributes:
+      label: Importance or Severity
+      options:
+        - Critical
+        - High
+        - Medium
+        - Low
+    validations:
+      required: true
+
+  - type: textarea
+    id: tc-bug-description
+    attributes:
+      label: Description of the bug
+      description: Description of the bug
+      placeholder: Description of the bug
+    validations:
+      required: true
+
+  - type: textarea
+    id: tc-bug-steps-to-reproduce
+    attributes:
+      label: Steps to Reproduce
+      description: Steps to Reproduce
+    validations:
+      required: true
+
+  - type: textarea
+    id: tc-bug-actual-behavior-expected-behavior
+    attributes:
+      label: Actual Behavior and Expected Behavior
+      description: Actual Behavior and Expected Behavior
+    validations:
+      required: true
+
+  - type: textarea
+    id: tc-bug-logs
+    attributes:
+      label: Relevant log output
+      description: Please copy and paste any relevant log output. This will be automatically formatted into code, so no need for backticks.
+      render: shell
+
+  - type: textarea
+    id: tc-bug-output
+    attributes:
+      label: Output of `show version`, `show techsupport`
+      description: Please copy and paste output of `show version`, `show techsupport`. This will be automatically formatted into code, so no need for backticks
+      render: shell
+
+  - type: markdown
+    id: tc-bug-attach-logs
+    attributes:
+      value: |
+        Attach debug file (if any) from: `sudo generate_dump` or other logs.
+
+  - type: textarea
+    id: tc-bug-attachments
+    attributes:
+      label: Attach files (if any)
diff --git a/.github/ISSUE_TEMPLATE/02-enhancement.yml b/.github/ISSUE_TEMPLATE/02-enhancement.yml
new file mode 100644
index 00000000000..52e116f239e
--- /dev/null
+++ b/.github/ISSUE_TEMPLATE/02-enhancement.yml
@@ -0,0 +1,66 @@
+name: Enhancement Request
+description: Enhancement Request
+title: "Enhancement:"
+labels: ['Enhancement :heavy_plus_sign:']
+body:
+  - type: markdown
+    id: tc-en-contact-links
+    attributes:
+      value: |
+        If you have questions about a product feature please ask and answer questions here at the [SONiC Support Forums](https://groups.google.com/forum/#!forum/sonicproject)
+
+  - type: dropdown
+    id: tc-en-platform
+    attributes:
+      label: Is it platform specific
+      description: Platform name
+      options:
+        - generic
+        - barefoot
+        - broadcom
+        - cavium
+        - centec
+        - innovium
+        - marvell
+        - mellanox
+        - nephos
+      default: 0
+    validations:
+      required: true
+
+  - type: dropdown
+    id: tc-en-severity
+    attributes:
+      label: Importance or Severity
+      options:
+        - Critical
+        - High
+        - Medium
+        - Low
+    validations:
+      required: true
+
+  - type: textarea
+    id: tc-en-description
+    attributes:
+      label: Description of the enhancement
+      description: Description of the enhancement
+      placeholder: Description of the enhancement
+    validations:
+      required: true
+
+  - type: textarea
+    id: tc-en-cb
+    attributes:
+      label: Current Behavior
+      description: Current Behavior
+    validations:
+      required: true
+
+  - type: textarea
+    id: tc-en-pb
+    attributes:
+      label: Proposed Behavior
+      description: Proposed Behavior
+    validations:
+      required: true
diff --git a/.github/ISSUE_TEMPLATE/03-testgap.yml b/.github/ISSUE_TEMPLATE/03-testgap.yml
new file mode 100644
index 00000000000..2b6e5e91a22
--- /dev/null
+++ b/.github/ISSUE_TEMPLATE/03-testgap.yml
@@ -0,0 +1,11 @@
+name: Report a Test Gap
+description: Report a Test Gap
+title: "Test Gap:"
+labels: ["Test gap"]
+body:
+  - type: markdown
+    attributes:
+      value: |
+        Thanks for taking the time to fill out this report!
+
+        Test Gaps are tracked on the sonic-mgmt repository. [Click here to open a new test gap issue](https://github.com/sonic-net/sonic-mgmt/issues/new?template=03-testgap.yml)
\ No newline at end of file
diff --git a/.github/ISSUE_TEMPLATE/04-regression.yml b/.github/ISSUE_TEMPLATE/04-regression.yml
new file mode 100644
index 00000000000..787a4bdbd5a
--- /dev/null
+++ b/.github/ISSUE_TEMPLATE/04-regression.yml
@@ -0,0 +1,95 @@
+name: Report a regression
+description: Report a regression issue
+title: "Regression:"
+labels: ['regression', 'Bug :bug:']
+body:
+  - type: markdown
+    attributes:
+      value: |
+        Thanks for taking the time to fill out this report!
+
+        If you are reporting a new issue, make sure that we do not have any duplicates already open. You can ensure this by searching the issue list for this repository. If there is a duplicate, please close your issue and add a comment to the existing issue instead.
+
+        If you suspect your issue is a bug, please edit your issue description to include the BUG REPORT INFORMATION shown below. If you fail to provide this information within 7 days, we cannot debug your issue and will close it. We will however, reopen it if you later provide the information.
+
+        For more information about reporting issues, see [SONiC Issue Reporting Page](https://github.com/sonic-net/SONiC/wiki#report-issues)
+
+  - type: dropdown
+    id: tc-reg-platform
+    attributes:
+      label: Is it platform specific
+      description: Platform name
+      options:
+        - generic
+        - barefoot
+        - broadcom
+        - cavium
+        - centec
+        - innovium
+        - marvell
+        - mellanox
+        - nephos
+      default: 0
+    validations:
+      required: true
+
+  - type: dropdown
+    id: tc-reg-severity
+    attributes:
+      label: Importance or Severity
+      options:
+        - Critical
+        - High
+        - Medium
+        - Low
+    validations:
+      required: true
+
+  - type: input
+    id: tc-reg-previous-working-version
+    attributes:
+      label: Previous Working Version
+      description: Specify the last known version where the functionality worked as expected
+      placeholder: e.g., 202311 or Git SHA
+    validations:
+      required: true
+
+  - type: textarea
+    id: tc-reg-str
+    attributes:
+      label: Steps to Reproduce
+      description: Steps to Reproduce
+    validations:
+      required: true
+
+  - type: textarea
+    id: tc-reg-impact
+    attributes:
+      label: Impact of this regression
+      description: Impact of this regression
+    validations:
+      required: true
+
+  - type: textarea
+    id: tc-reg-logs
+    attributes:
+      label: Relevant log output
+      description: Please copy and paste any relevant log output. This will be automatically formatted into code, so no need for backticks.
+      render: shell
+
+  - type: textarea
+    id: tc-reg-output
+    attributes:
+      label: Output of `show version`, `show techsupport`
+      description: Please copy and paste output of `show version`. This will be automatically formatted into code, so no need for backticks
+      render: shell
+
+  - type: markdown
+    id: tc-reg-attach-logs
+    attributes:
+      value: |
+        Attach debug file (if any) from: `sudo generate_dump` or other logs.
+  - type: textarea
+    id: tc-reg-attachments
+    attributes:
+      label: Attach files (if any)
diff --git a/.github/ISSUE_TEMPLATE/config.yml b/.github/ISSUE_TEMPLATE/config.yml
new file mode 100644
index 00000000000..9e75a8b9ae3
--- /dev/null
+++ b/.github/ISSUE_TEMPLATE/config.yml
@@ -0,0 +1,5 @@
+blank_issues_enabled: false
+contact_links:
+  - name: SONiC Support Forums
+    url: https://groups.google.com/forum/#!forum/sonicproject
+    about: Please ask and answer questions here at the SONiC Support Forums
\ No newline at end of file
diff --git a/.gitignore b/.gitignore
index 855e940c689..df56b3b18e8 100644
--- a/.gitignore
+++ b/.gitignore
@@ -93,6 +93,7 @@ platform/broadcom/sonic-platform-modules-dell/z9100/modules/dell_ich.c
 platform/broadcom/sonic-platform-modules-dell/z9100/modules/dell_mailbox.c
 platform/broadcom/sonic-platform-modules-dell/z9264f/sonic_platform/ipmihelper.py
 platform/cisco-8000
+platform/pensando/pensando-sonic-artifacts
 
 # buildinfo
 files/build/buildinfo
diff --git a/.gitmodules b/.gitmodules
index f8d10f3af4a..651f5b7785c 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,15 +1,19 @@
 [submodule "sonic-swss-common"]
 	path = src/sonic-swss-common
 	url = https://github.com/sonic-net/sonic-swss-common
+	branch = 202505
 [submodule "sonic-linux-kernel"]
 	path = src/sonic-linux-kernel
 	url = https://github.com/sonic-net/sonic-linux-kernel
+	branch = 202505
 [submodule "sonic-sairedis"]
 	path = src/sonic-sairedis
 	url = https://github.com/sonic-net/sonic-sairedis
+	branch = 202505
 [submodule "sonic-swss"]
 	path = src/sonic-swss
 	url = https://github.com/sonic-net/sonic-swss
+	branch = 202505
 [submodule "src/p4c-bm/p4c-bm"]
 	path = platform/p4/p4c-bm/p4c-bm
 	url = https://github.com/krambn/p4c-bm
@@ -19,34 +23,40 @@
 [submodule "sonic-dbsyncd"]
 	path = src/sonic-dbsyncd
 	url = https://github.com/sonic-net/sonic-dbsyncd
+	branch = 202505
 [submodule "src/sonic-py-swsssdk"]
 	path = src/sonic-py-swsssdk
 	url = https://github.com/sonic-net/sonic-py-swsssdk.git
+	branch = 202505
 [submodule "src/sonic-snmpagent"]
 	path = src/sonic-snmpagent
 	url = https://github.com/sonic-net/sonic-snmpagent
+	branch = 202505
 [submodule "src/ptf"]
 	path = src/ptf
 	url = https://github.com/p4lang/ptf.git
 [submodule "src/sonic-utilities"]
 	path = src/sonic-utilities
 	url = https://github.com/sonic-net/sonic-utilities
+	branch = 202505
 [submodule "platform/broadcom/sonic-platform-modules-arista"]
 	path = platform/broadcom/sonic-platform-modules-arista
 	url = https://github.com/aristanetworks/sonic
 [submodule "src/sonic-platform-common"]
 	path = src/sonic-platform-common
 	url = https://github.com/sonic-net/sonic-platform-common
+	branch = 202505
 [submodule "src/sonic-platform-daemons"]
 	path = src/sonic-platform-daemons
 	url = https://github.com/sonic-net/sonic-platform-daemons
+	branch = 202505
 [submodule "src/sonic-platform-pde"]
 	path = src/sonic-platform-pde
 	url = https://github.com/sonic-net/sonic-platform-pdk-pde
 [submodule "src/sonic-frr/frr"]
 	path = src/sonic-frr/frr
 	url = https://github.com/sonic-net/sonic-frr.git
-	branch = frr-10.0.1
+	branch = frr-10.3
 [submodule "platform/p4/p4-hlir/p4-hlir-v1.1"]
 	path = platform/p4/p4-hlir/p4-hlir-v1.1
 	url = https://github.com/p4lang/p4-hlir.git
@@ -68,16 +78,19 @@
 [submodule "src/sonic-mgmt-framework"]
 	path = src/sonic-mgmt-framework
 	url = https://github.com/sonic-net/sonic-mgmt-framework
+	branch = 202505
 [submodule "src/sonic-ztp"]
 	path = src/sonic-ztp
 	url = https://github.com/sonic-net/sonic-ztp
+	branch = 202505
 [submodule "src/sonic-restapi"]
 	path = src/sonic-restapi
 	url = https://github.com/sonic-net/sonic-restapi.git
-	branch = master
+	branch = 202505
 [submodule "src/sonic-mgmt-common"]
 	path = src/sonic-mgmt-common
 	url = https://github.com/sonic-net/sonic-mgmt-common.git
+	branch = 202505
 [submodule "src/wpasupplicant/sonic-wpa-supplicant"]
 	path = src/wpasupplicant/sonic-wpa-supplicant
 	url = https://github.com/sonic-net/sonic-wpa-supplicant.git
@@ -91,6 +104,7 @@
 [submodule "src/linkmgrd"]
 	path = src/linkmgrd
 	url = https://github.com/sonic-net/sonic-linkmgrd.git
+	branch = 202505
 [submodule "src/sonic-p4rt/sonic-pins"]
 	path = src/sonic-p4rt/sonic-pins
 	url = https://github.com/sonic-net/sonic-pins.git
@@ -100,30 +114,33 @@
 [submodule "src/dhcprelay"]
 	path = src/dhcprelay
 	url = https://github.com/sonic-net/sonic-dhcp-relay.git
+	branch = 202505
 [submodule "src/sonic-host-services"]
 	path = src/sonic-host-services
 	url = https://github.com/sonic-net/sonic-host-services
+	branch = 202505
 [submodule "src/sonic-gnmi"]
 	path = src/sonic-gnmi
 	url = https://github.com/sonic-net/sonic-gnmi.git
+	branch = 202505
 [submodule "src/sonic-bmp"]
 	path = src/sonic-bmp
 	url = https://github.com/sonic-net/sonic-bmp.git
+	branch = 202505
 [submodule "src/sonic-genl-packet"]
 	path = src/sonic-genl-packet
 	url = https://github.com/sonic-net/sonic-genl-packet
 [submodule "src/dhcpmon"]
 	path = src/dhcpmon
 	url = https://github.com/sonic-net/sonic-dhcpmon.git
+	branch = 202505
 [submodule "src/sonic-dash-api"]
 	path = src/sonic-dash-api
 	url = https://github.com/sonic-net/sonic-dash-api.git
-[submodule "platform/marvell/mrvl-prestera"]
-	path = platform/marvell/mrvl-prestera
-	url = https://github.com/Marvell-switching/mrvl-prestera.git
-[submodule "platform/marvell/sonic-platform-marvell"]
-	path = platform/marvell/sonic-platform-marvell
-	url = https://github.com/Marvell-switching/sonic-platform-arm64.git
+	branch = 202505
+[submodule "src/sonic-dash-ha"]
+	path = src/sonic-dash-ha
+	url = https://github.com/sonic-net/sonic-dash-ha
 [submodule "src/sonic-stp"]
 	path = src/sonic-stp
 	url = https://github.com/sonic-net/sonic-stp
@@ -132,4 +149,16 @@
 	url = https://github.com/Marvell-switching/sonic-platform-marvell.git
 [submodule "platform/vpp"]
 	path = platform/vpp
-	url = https://github.com/sonic-net/sonic-platform-vpp.git
\ No newline at end of file
+	url = https://github.com/sonic-net/sonic-platform-vpp.git
+[submodule "platform/marvell-prestera/mrvl-prestera"]
+	path = platform/marvell-prestera/mrvl-prestera
+	url = https://github.com/Marvell-switching/mrvl-prestera.git
+[submodule "platform/marvell-prestera/sonic-platform-marvell"]
+	path = platform/marvell-prestera/sonic-platform-marvell
+	url = https://github.com/Marvell-switching/sonic-platform-arm64.git
+[submodule "src/sonic-sysmgr/gnoi"]
+	path = src/sonic-sysmgr/gnoi
+	url = https://github.com/openconfig/gnoi
+[submodule "platform/marvell-teralynx/mrvl-teralynx"]
+	path = platform/marvell-teralynx/mrvl-teralynx
+	url = https://github.com/Marvell-switching/mrvl-teralynx.git
diff --git a/Makefile.work b/Makefile.work
index fe14eebaedc..33bc90305a3 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -93,10 +93,10 @@ ifeq ($(USER), root)
 $(error Add your user account to docker group and use your user account to make. root or sudo are not supported!)
 endif
 
-# Check for j2cli availability
-J2_VER := $(shell j2 --version 2>&1 | grep j2cli | awk '{printf $$2}')
+# Check for j2 availability (https://github.com/kpfleming/jinjanator)
+J2_VER := $(shell j2 --version 2>&1 | grep j2 | awk '{printf $$2}')
 ifeq ($(J2_VER),)
-$(error Please install j2cli (sudo pip install j2cli))
+$(error Please install j2 (sudo pip install jinjanator))
 endif
 
 # Check for minimum Docker version on build host
@@ -614,7 +614,7 @@ endif
 
 	$(Q)$(DOCKER_RUN) \
 		$(SLAVE_IMAGE):$(SLAVE_TAG) \
-		bash -c "$(SONIC_BUILD_INSTRUCTION) $@; $(COLLECT_BUILD_VERSION); $(SLAVE_SHELL)" 
+		bash -c "$(SONIC_BUILD_INSTRUCTION) $@ SONIC_BUILD_TARGET=$@; $(COLLECT_BUILD_VERSION); $(SLAVE_SHELL)"
 	$(Q)$(docker-image-cleanup)
 
 docker-cleanup:
diff --git a/README.arm64_build_on_amd64.md b/README.arm64_build_on_amd64.md
new file mode 100644
index 00000000000..2236fb689a6
--- /dev/null
+++ b/README.arm64_build_on_amd64.md
@@ -0,0 +1,322 @@
+# **ARM64 Build on AMD64 for SONiC BuildImage**
+
+## **Table of Contents**
+
+1. [About This Guide](#about-this-guide)  
+2. [Hardware Specifications](#hardware-specifications)  
+3. [Test Server Details](#test-server-details)  
+4. [Pre-requisites](#pre-requisites)  
+5. [Build Procedure](#build-procedure)  
+6. [Expected Errors and Workarounds](#expected-errors-and-workarounds)  
+7. [Console Output](#console-output)  
+8. [Reference Links](#reference-links)  
+
+## **About This Guide**
+
+This document provides a detailed guide for building the SONiC BuildImage for the ARM64 architecture on an AMD64 system. During this process, build errors were encountered. The steps below outline the necessary hardware specifications, pre-requisites, build procedures, and solutions to known issues to ensure a successful build. This guide is based on the build conducted using both Debian 11 (Bullseye) Virtual Machine and Ubuntu 22.04.2 Host server.
+
+## **Hardware Specifications**
+```
+CPU: Multiple cores (recommended for faster build speed)
+Memory: Plenty of RAM (62 GiB used for this test)
+Disk: 300 GiB of free disk space
+Virtualization Support: KVM support enabled
+```
+
+## **Test Server Details**
+```
+The image has been built on both Ubuntu & Debian systems.
+Ubuntu Server:
+CPU(s): 4
+Memory: 62 GiB
+Disk: 1.1 TiB
+Operating System: Ubuntu 22.04.2
+
+Debian VM:
+CPU(s): 4
+Memory: 20 GiB
+Disk: 670 GB
+Operating System: Debian GNU/Linux 11 (bullseye)
+```
+
+## **Pre-requisites**
+
+Install the following dependencies before proceeding with the build:
+
+1\. Install pip and jinja
+```
+sudo apt install -y python3-pip
+sudo pip3 install j2cli
+```
+
+2\. Install docker engine on debian
+Follow the instructions at: [Docker Engine Install for Debian](https://docs.docker.com/engine/install/debian/)
+
+3\. Add user to the docker group
+```
+sudo gpasswd -a ${USER} docker
+sudo usermod -aG docker $USER
+```
+
+## **Build Procedure**
+
+### **Step 1: Clone the Repository**
+```
+cd /home
+git clone --recurse-submodules https://github.com/sonic-net/sonic-buildimage.git
+```
+
+**Note**:
+At the time of the build, the master branch was pointing to the following commit:
+```
+Commit: 9293b8c52aab66f1660db05b9198bb0f7b836c97
+Author: Brad House <brad@brad-house.com>
+Date: Fri Dec 6 04:41:45 2024 -0500
+Message: [yang] LOGGER missing require_manual_refresh (#20969)
+```
+
+###  **Step 2: Load the overlay Kernel Module**
+```
+sudo modprobe overlay
+```
+
+### **Step 3: Navigate to the Source Directory**
+```
+cd sonic-buildimage
+```
+
+## **Step 4: Apply the Necessary Patch**
+
+Apply the below patch to avoid mount point errors.
+```
+$~/sonic-buildimage$ git diff Makefile.work
+diff --git a/Makefile.work b/Makefile.work
+index fe14eebae..9c4f806cc 100644
+--- a/Makefile.work
++++ b/Makefile.work
+@@ -393,7 +393,7 @@ endif
+DOCKER_RUN += -v /var/run/march/docker.sock:/var/run/docker.sock
+DOCKER_RUN += -v /var/run/march/docker.pid:/var/run/docker.pid
+DOCKER_RUN += -v /var/run/march/docker:/var/run/docker
+- DOCKER_RUN += -v $(DOCKER_DATA_ROOT_FOR_MULTIARCH):/var/lib/docker
++ DOCKER_RUN += -v $(DOCKER_DATA_ROOT_FOR_MULTIARCH):/var/lib/march/docker
+SONIC_USERFACL_DOCKERD_FOR_MULTIARCH := setfacl -m user:$(USER):rw /var/run/march/docker.sock
+```
+
+###  **Step 5: Initialize the Repository**
+```
+make init
+```
+
+### **Step 6: Configure for the Build**
+```
+NOJESSIE=1 NOSTRETCH=1 NOBUSTER=1 NOBULLSEYE=1 BLDENV=bookworm DOCKER_BUILDKIT=0 KEEP_SLAVE_ON=yes SONIC_BUILD_JOBS=4 make configure PLATFORM=marvell PLATFORM_ARCH=arm64
+```
+
+### **Step 7: Build the ARM64 Image**
+```
+Execute Arm64 build using QEMU emulator environment.  
+NOJESSIE=1 NOSTRETCH=1 NOBUSTER=1 NOBULLSEYE=1 BLDENV=bookworm MULTIARCH_QEMU_ENVIRON=y make SONIC_BUILD_JOBS=4 target/sonic-marvell-arm64.bin
+```
+## **Expected Errors and Workarounds**
+
+### **Error at \`libnl\`**
+```
+$ NOJESSIE=1 NOSTRETCH=1 NOBUSTER=1 NOBULLSEYE=1 SONIC_BUILD_JOBS=4 /usr/bin/time -v make target/sonic-marvell-arm64.bin 2>&1 | tee make_target_arm64.log
+.....
+libtool: link: gcc -g -O2 -ffile-prefix-map=/sonic/src/libnl3/libnl3-3.7.0=. -fstack-protector-strong -Wformat -Werror=format-security -Wl,-z -Wl,relro -o tests/check-direct tests/check_direct-check-direct.o li
+b/.libs/libnl-3.a lib/.libs/libnl-nf-3.a lib/.libs/libnl-genl-3.a lib/.libs/libnl-route-3.a tests/.libs/libnl-test-util.a /sonic/src/libnl3/libnl3-3.7.0/lib/.libs/libnl-nf-3.a /sonic/src/libnl3/libnl3-3.7.0/lib/
+.libs/libnl-genl-3.a /sonic/src/libnl3/libnl3-3.7.0/lib/.libs/libnl-route-3.a /sonic/src/libnl3/libnl3-3.7.0/lib/.libs/libnl-3.a -lcheck_pic -lrt -lm -lsubunit -lpthread
+make[4]: Leaving directory '/sonic/src/libnl3/libnl3-3.7.0'
+/usr/bin/make check-TESTS
+make[4]: Entering directory '/sonic/src/libnl3/libnl3-3.7.0'
+make[5]: Entering directory '/sonic/src/libnl3/libnl3-3.7.0'
+PASS: tests/check-direct
+FAIL: tests/check-all
+===================================
+libnl 3.7.0: ./test-suite.log
+===================================
+.....
+make[5]: *** [Makefile:6814: test-suite.log] Error 1
+make[5]: Leaving directory '/sonic/src/libnl3/libnl3-3.7.0'
+```
+**Analysis**
+This is an expected failure as per [Issue #361](https://github.com/thom311/libnl/issues/361). Exclude \`make check-TESTS\` during the libnl build.
+
+**Workaround**
+Edit \`Makefile.in\` to exclude \`make check-TESTS\`.
+```
+$~/arm-testing/sonic-buildimage/src/libnl3/libnl3-3.7.0$ git diff Makefile.in
+diff --git a/Makefile.in b/Makefile.in
+index 787a4d7..81512ab 100644
+--- a/Makefile.in
++++ b/Makefile.in
+@@ -7138,7 +7138,7 @@ distcleancheck: distclean
+               exit 1; } >&2
+ check-am: all-am
+        $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS) $(check_LTLIBRARIES)
+-       $(MAKE) $(AM_MAKEFLAGS) check-TESTS
++       $(MAKE) $(AM_MAKEFLAGS)
+ check: check-am
+ all-am: Makefile $(PROGRAMS) $(LTLIBRARIES) $(MANS) $(DATA) $(HEADERS)
+ install-binPROGRAMS: install-libLTLIBRARIES
+@@ -7808,7 +7808,7 @@ uninstall-man: uninstall-man8
+ .MAKE: check-am install-am install-strip
+ 
+ .PHONY: CTAGS GTAGS TAGS all all-am am--depfiles am--refresh check \
+-       check-TESTS check-am clean clean-binPROGRAMS \
++       check-am clean clean-binPROGRAMS \
+        clean-checkLTLIBRARIES clean-checkPROGRAMS clean-cscope \
+        clean-generic clean-libLTLIBRARIES clean-libtool \
+        clean-noinstLTLIBRARIES clean-noinstPROGRAMS \
+$~/arm-testing/sonic-buildimage/src/libnl3/libnl3-3.7.0$
+```
+### **Error at \`iptables\`**
+```
+make[4]: Entering directory '/sonic/src/iptables/iptables-1.8.9'^M
+/usr/bin/make check-TESTS^M
+make[5]: Entering directory '/sonic/src/iptables/iptables-1.8.9'^M
+make[6]: Entering directory '/sonic/src/iptables/iptables-1.8.9'^M
+SKIP: iptables/tests/shell/run-tests.sh^M
+SKIP: iptables-test.py^M
+FAIL: xlate-test.py^M
+…
+============================================================================^M
+Testsuite summary for iptables 1.8.9^M
+============================================================================^M
+# TOTAL: 3^M
+# PASS: 0^M
+# SKIP: 2^M
+# XFAIL: 0^M
+# FAIL: 1^M
+# XPASS: 0^M
+# ERROR: 0^M
+============================================================================^M
+See ./test-suite.log^M
+============================================================================^M
+make[6]: *** [Makefile:798: test-suite.log] Error 1^M
+make[6]: Leaving directory '/sonic/src/iptables/iptables-1.8.9'^M
+```
+**Workaround**
+Edit \`Makefile.in\` to exclude \`make check-TESTS\`.
+```
+$~/arm-testing/sonic-buildimage_bookworm/src/iptables/iptables-1.8.9$ git diff Makefile.in
+check-am: all-am
+- $(MAKE) $(AM_MAKEFLAGS) check-TESTS
++ $(MAKE) $(AM_MAKEFLAGS)
+check: check-recursive
+all-am: Makefile $(DATA) config.h
+installdirs: installdirs-recursive
+@@ -1267,7 +1266,7 @@ uninstall-am: uninstall-dist_confDATA
+.MAKE: $(am__recursive_targets) all check-am install-am install-strip
+
+.PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
+- am--refresh check check-TESTS check-am clean clean-cscope \
++ am--refresh check check-am clean clean-cscope \
+clean-generic clean-libtool cscope cscopelist-am ctags \
+ctags-am dist dist-all dist-bzip2 dist-gzip dist-lzip \
+dist-shar dist-tarZ dist-xz dist-zip dist-zstd distcheck \
+```
+#### **Details about the Errors**
+
+The external repo's **libnl** and **iptables** are being pulled by the sonic build system during the make target. As per [https://github.com/thom311/libnl/issues/361](https://github.com/thom311/libnl/issues/361), this seems to be a known issue. This test suite needs a network namespace with required permissions to run otherwise it was suggested to skip the tests to gracefully handle the error as these unit tests are for developers of this library itself.
+
+### **Error at \`docker-base-bookworm.gz\`**
+```
+[ FAIL LOG START ] [ target/docker-base-bookworm.gz ]
+Build start time: Tue Dec 10 20:28:24 UTC 2024
+[ REASON ] : target/docker-base-bookworm.gz does not exist NON-EXISTENT PREREQUISITES: docker-start
+[ FLAGS FILE ] : []
+[ FLAGS DEPENDS ] : []
+[ FLAGS DIFF ] : []
+Unable to find image 'cat:latest' locally
+docker: Error response from daemon: pull access denied for cat, repository does not exist or may require 'docker login': denied: requested access to the resource is denied.
+........
+---> Running in 0e3e004683bd
+WARNING: apt does not have a stable CLI interface. Use with caution in scripts.
+Ign:1 http://debian-archive.trafficmanager.net/debian jessie InRelease
+Ign:2 http://debian-archive.trafficmanager.net/debian jessie-updates InRelease
+….
+E: The repository 'http://debian-archive.trafficmanager.net/debian jessie-backports Release' does not have a Release file.
+[ FAIL LOG END ] [ target/docker-base-bookworm.gz ]
+make: *** [slave.mk:1136: target/docker-base-bookworm.gz] Error 1
+```
+**Workaround**
+Edit \`scripts/prepare\_docker\_buildinfo.sh\` to set the correct \`DISTRO\`.
+```
+$~/arm-testing/sonic-buildimage_bookworm$ git diff scripts/prepare_docker_buildinfo.sh
+diff --git a/scripts/prepare_docker_buildinfo.sh b/scripts/prepare_docker_buildinfo.sh
+index 6dfd63bdd..50de56caf 100755
+--- a/scripts/prepare_docker_buildinfo.sh
++++ b/scripts/prepare_docker_buildinfo.sh
+
+@@ -35,8 +34,13 @@ if [ -z "$DISTRO" ]; then
+DOCKER_BASE_IMAGE=$(grep "^FROM" $DOCKERFILE | head -n 1 | awk '{print $2}')
+DISTRO=$(docker run --rm --entrypoint "" $DOCKER_BASE_IMAGE cat /etc/os-release | grep VERSION_CODENAME | cut -d= -f2)
+if [ -z "$DISTRO" ]; then
+DISTRO=$(docker run --rm --entrypoint "" $DOCKER_BASE_IMAGE cat /etc/apt/sources.list | grep deb.debian.org | awk '{print $3}')
+[ -z "$DISTRO" ] && DISTRO=jessie
++ DISTRO=bookworm
+fi
+fi
+```
+
+## **Console Output**
+```
+$~/arm-testing/sonic-buildimage_bookworm$ NOJESSIE=1 NOSTRETCH=1 NOBUSTER=1 NOBULLSEYE=1 BLDENV=bookworm SONIC_BUILD_JOBS=4 MULTIARCH_QEMU_ENVIRON=y /usr/bin/time -v make target/sonic-marvell-arm64.bin 2>&1 | tee make_target.log
+....
+[ 01 ] [ target/debs/bookworm/linux-headers-6.1.0-22-2-common_6.1.94-1_all.deb ]
+[ 02 ] [ target/debs/bookworm/syncd_1.0.0_arm64.deb ]
+[ 01 ] [ target/debs/bookworm/linux-headers-6.1.0-22-2-common_6.1.94-1_all.deb ]
+[ 02 ] [ target/debs/bookworm/swss_1.0.0_arm64.deb ]
+[ 01 ] [ target/sonic-marvell-arm64.bin__m/usr/bin/basename: missing operand
+Try '/usr/bin/basename --help' for more information.
+make[1]: Leaving directory '/home/arm-testing/sonic-buildimage_bookworm'
+BLDENV=bookworm make -f Makefile.work docker-cleanup
+make[1]: Entering directory '/home/arm-testing/sonic-buildimage_bookworm'
+"SECURE_UPGRADE_PROD_SIGNING_TOOL": ""
+~/arm-testing/sonic-buildimage_bookworm/src/sonic-build-hooks ~/arm-testing/sonic-buildimage_bookworm
+….
+make[1]: Leaving directory '/home/arm-testing/sonic-buildimage_bookworm'
+Command being timed: "make target/sonic-marvell-arm64.bin"
+User time (seconds): 9.88
+System time (seconds): 3.37
+Percent of CPU this job got: 0%
+Elapsed (wall clock) time (h:mm:ss or m:ss): 23:20:36
+Average shared text size (kbytes): 0
+Average unshared data size (kbytes): 0
+Average stack size (kbytes): 0
+Average total size (kbytes): 0
+Maximum resident set size (kbytes): 44128
+Average resident set size (kbytes): 0
+Major (requiring I/O) page faults: 1504
+Minor (reclaiming a frame) page faults: 199473
+Voluntary context switches: 47272
+Involuntary context switches: 5605
+Swaps: 0
+File system inputs: 232600
+File system outputs: 1168
+Socket messages sent: 0
+Socket messages received: 0
+Signals delivered: 0
+Page size (bytes): 4096
+Exit status: 0
+Thu Dec 26 07:26:41 AM PST 2024
+
+```
+
+**cat sonic-marvell-arm64.bin.log**
+```
++ echo Success: Demo install image is ready in target/sonic-marvell-arm64.bin:
+Success: Demo install image is ready in target/sonic-marvell-arm64.bin:
++ ls -l target/sonic-marvell-arm64.bin
+-rw-r--r-- 1 user guser 907849710 Dec 26 15:25 target/sonic-marvell-arm64.bin
++ clean_up 0
++ rm -rf /tmp/tmp.gHMtQGcmFj
++ exit 0
+Build end time: Thu Dec 26 15:25:52 UTC 2024
+```
+
+## **Reference Links**
+
+- [#16204](https://github.com/sonic-net/sonic-buildimage/issues/16204)
diff --git a/README.md b/README.md
index fad301935ed..19043fffc65 100644
--- a/README.md
+++ b/README.md
@@ -5,8 +5,8 @@
 [![Centec(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec-arm64?branchName=master&label=Centec-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=140&branchName=master)
 [![Marvell-Teralynx](https://dev.azure.com/mssonic/build/_apis/build/status/innovium/Azure.sonic-buildimage.official.marvell-teralynx?branchName=master&label=Marvell-Teralynx)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=master)
 [![Mellanox](https://dev.azure.com/mssonic/build/_apis/build/status/mellanox/Azure.sonic-buildimage.official.mellanox?branchName=master&label=Mellanox)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=139&branchName=master)
-[![Marvell(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-armhf?branchName=master&label=Marvell-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=master)
-[![Marvell(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-arm64?branchName=master&label=Marvell-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=master)
+[![Marvell-Prestera(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell-prestera/Azure.sonic-buildimage.official.marvell-prestera-armhf?branchName=master&label=Marvell-Prestera-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=master)
+[![Marvell-Prestera(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell-prestera/Azure.sonic-buildimage.official.marvell-prestera-arm64?branchName=master&label=Marvell-Prestera-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=master)
 [![Nephos](https://dev.azure.com/mssonic/build/_apis/build/status/nephos/Azure.sonic-buildimage.official.nephos?branchName=master&label=Nephos)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=149&branchName=master)
 [![Nvidia-Bluefield](https://dev.azure.com/mssonic/build/_apis/build/status/nvidia/Azure.sonic-buildimage.official.nvidia-bluefield?branchName=master&label=Nvidia-Bluefield)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1665&branchName=master)
 [![Pensando](https://dev.azure.com/mssonic/build/_apis/build/status/pensando/Azure.sonic-buildimage.official.pensando?branchName=master&label=Pensando)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1366&branchName=master)
@@ -151,11 +151,11 @@ A good choice of OS for building SONiC is currently Ubuntu 20.04.
 ## Prerequisites
 
 * Install pip and jinja in host build machine, execute below commands
-   if j2/j2cli is not available:
+   if j2/jinjanator is not available:
 
 ```shell
 sudo apt install -y python3-pip
-pip3 install --user j2cli
+pip3 install --user jinjanator
 ```
 
 * Install [Docker](https://docs.docker.com/engine/install/) and configure your
@@ -209,12 +209,12 @@ The supported ASIC vendors are:
 
 * PLATFORM=barefoot
 * PLATFORM=broadcom
-* PLATFORM=marvell
+* PLATFORM=marvell-prestera
+* PLATFORM=marvell-teralynx
 * PLATFORM=mellanox
 * PLATFORM=centec
 * PLATFORM=nephos
 * PLATFORM=nvidia-bluefield
-* PLATFORM=marvell-teralynx
 * PLATFORM=vs
 
 ## Usage for ARM Architecture
@@ -235,22 +235,22 @@ make target/sonic-[ASIC_VENDER]-armhf.bin
 _example:_
 
 ```shell
-make configure PLATFORM=marvell PLATFORM_ARCH=armhf
-make target/sonic-marvell-armhf.bin
+make configure PLATFORM=marvell-prestera PLATFORM_ARCH=armhf
+make target/sonic-marvell-prestera-armhf.bin
 ```
 
-To build Arm32 bit for (ARMHF) Marvell platform on amd64 host for debian buster
+To build Arm32 bit for (ARMHF) Marvell Prestera platform on amd64 host for debian buster
 using cross-compilation, run the following commands:
 
 ```shell
 # Execute make configure once to configure ASIC and ARCH for cross-compilation build
 
 NOJESSIE=1 NOSTRETCH=1 BLDENV=buster CROSS_BLDENV=1 \
-make configure PLATFORM=marvell PLATFORM_ARCH=armhf
+make configure PLATFORM=marvell-prestera PLATFORM_ARCH=armhf
 
 # Execute Arm32 build using cross-compilation environment
 
-NOJESSIE=1 NOSTRETCH=1 BLDENV=buster CROSS_BLDENV=1 make target/sonic-marvell-armhf.bin
+NOJESSIE=1 NOSTRETCH=1 BLDENV=buster CROSS_BLDENV=1 make target/sonic-marvell-prestera-armhf.bin
 ```
 
 Running the above Arm32 build using cross-compilation instead of qemu emulator
@@ -265,7 +265,7 @@ make configure PLATFORM=[ASIC_VENDOR] PLATFORM_ARCH=arm64
 
 # example:
 
-make configure PLATFORM=marvell PLATFORM_ARCH=arm64
+make configure PLATFORM=marvell-prestera PLATFORM_ARCH=arm64
 ```
 
  **NOTE**:
@@ -288,6 +288,7 @@ make configure PLATFORM=marvell PLATFORM_ARCH=arm64
   to enable http(s) proxy in the build process.
 * Add your user account to `docker` group and use your user account to make.
   `root` or `sudo` are not supported.
+* For more details on cross-compilation errors, please refer to [README.arm64_build_on_amd64.md](https://github.com/sonic-net/sonic-buildimage/blob/master/README.arm64_build_on_amd64.md)
 
 The SONiC installer contains all docker images needed.
 SONiC uses one image for all devices of a same ASIC vendor.
@@ -374,6 +375,8 @@ on the SAI version for each SONiC release.
     and Nephos switch ASIC (gzip tar archive)
   * docker-syncd-mrvl-teralynx.gz: docker image for the daemon to sync database
     and Marvell-Teralynx switch ASIC (gzip tar archive)
+  * docker-syncd-mrvl-prestera.gz: docker image for the daemon to sync database
+    and Marvell-Prestera switch ASIC (gzip tar archive)
   * docker-sonic-p4.gz: docker image for all-in-one for p4 software switch
     (gzip tar archive)
   * docker-sonic-vs.gz: docker image for all-in-one for software virtual switch
diff --git a/ThirdPartyLicenses.txt b/ThirdPartyLicenses.txt
index 8941c1be7da..f0fab67246e 100644
--- a/ThirdPartyLicenses.txt
+++ b/ThirdPartyLicenses.txt
@@ -978,6 +978,7 @@ Microsoft is offering you a license to use the following components, to the exte
  */
 
 4. apt-clean, apt-gzip-indexes, apt-no-languages imported from docker v1.11.1
+5. gnoic imported from https://github.com/karimra/gnoic using Apache License 2.0
 /*
  *                                 Apache License
  *                           Version 2.0, January 2004
@@ -1171,17 +1172,17 @@ Microsoft is offering you a license to use the following components, to the exte
  *   limitations under the License.
  */
 
- 5. src/tacacs/bash/bash_tacplus based on https://github.com/daveolson53/tacplus-auth project using GNU GENERAL PUBLIC LICENSE Version 2
+ 6. src/tacacs/bash/bash_tacplus based on https://github.com/daveolson53/tacplus-auth project using GNU GENERAL PUBLIC LICENSE Version 2
 
 /*   Format: http://www.debian.org/doc/packaging-manuals/copyright-format/1.0/
  *   Upstream-Name: tacplus-auth
  *   Source: https://github.com/daveolson53/tacplus-auth
- *   
+ *
  *   Files: *
  *   Copyright: 2016 Cumulus Networks, Inc.  All rights reserved.,
  *              2010 Pawel Krawczyk <pawel.krawczyk@hush.com> and Jeroen Nijhof <jeroen@jeroennijhof.nl>.
  *   License: GPL-2+
- *   
+ *
  *   License: GPL-2+
  *    This program is free software; you can redistribute it and/or modify
  *    it under the terms of the GNU General Public License as published by
@@ -1199,4 +1200,5 @@ Microsoft is offering you a license to use the following components, to the exte
  *    .
  *    On Debian systems, the full copy of the GPL-2 license can be found in
  *    /usr/share/common-licenses/GPL-2
- */
\ No newline at end of file
+ */
+
diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index d6eb20d31d7..1d5a03dcda0 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -36,6 +36,11 @@ resources:
     endpoint: sonic-net
     ref: master
 
+parameters:
+- name: TIMEOUT_IN_MINUTES_PR_TEST
+  type: number
+  default: 480
+
 variables:
 - template: .azure-pipelines/azure-pipelines-repd-build-variables.yml@buildimage
 - template: .azure-pipelines/template-variables.yml@buildimage
@@ -78,16 +83,16 @@ stages:
           dbg_image: yes
           docker_syncd_rpc_image: yes
           platform_rpc: mlnx
-      - name: marvell-arm64
+      - name: marvell-prestera-arm64
         pool: sonicbld-arm64
         variables:
-           PLATFORM_NAME: marvell
+           PLATFORM_NAME: marvell-prestera
            PLATFORM_ARCH: arm64
-      - name: marvell-armhf
+      - name: marvell-prestera-armhf
         pool: sonicbld-armhf
         timeoutInMinutes: 1200
         variables:
-          PLATFORM_NAME: marvell
+          PLATFORM_NAME: marvell-prestera
           PLATFORM_ARCH: armhf
           INCLUDE_RESTAPI: y
 
@@ -165,165 +170,212 @@ stages:
         testResultsFiles: '**/tr.xml'
         testRunTitle: vstest
 
-  - job: t0_elastictest
-    pool: sonic-ubuntu-1c
-    displayName: "kvmtest-t0 by Elastictest"
-    timeoutInMinutes: 240
+  - job: get_impacted_area
+    displayName: "Get impacted area"
+    timeoutInMinutes: 10
     continueOnError: false
-    steps:
-    - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
-      parameters:
-        TOPOLOGY: t0
-        MIN_WORKER: $(T0_INSTANCE_NUM)
-        MAX_WORKER: $(T0_INSTANCE_NUM)
-        MGMT_BRANCH: $(BUILD_BRANCH)
-
-  - job: t0_2vlans_elastictest
     pool: sonic-ubuntu-1c
-    displayName: "kvmtest-t0-2vlans by Elastictest"
-    timeoutInMinutes: 240
-    continueOnError: false
     steps:
-    - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
-      parameters:
-        TOPOLOGY: t0
-        TEST_SET: t0-2vlans
-        MIN_WORKER: $(T0_2VLANS_INSTANCE_NUM)
-        MAX_WORKER: $(T0_2VLANS_INSTANCE_NUM)
-        MGMT_BRANCH: $(BUILD_BRANCH)
-        DEPLOY_MG_EXTRA_PARAMS: "-e vlan_config=two_vlan_a"
-
-  - job: t1_lag_elastictest
-    pool: sonic-ubuntu-1c
-    displayName: "kvmtest-t1-lag by Elastictest"
-    timeoutInMinutes: 240
+      - checkout: sonic-mgmt
+      - template: .azure-pipelines/impacted_area_testing/get-impacted-area.yml@sonic-mgmt
+        parameters:
+          BUILD_BRANCH: $(BUILD_BRANCH)
+
+  - job: impacted_area_t0_elastictest
+    displayName: "impacted-area-kvmtest-t0 by Elastictest"
+    dependsOn:
+      - get_impacted_area
+    condition: contains(dependencies.get_impacted_area.outputs['SetVariableTask.PR_CHECKERS'], 't0_checker')
+    variables:
+      TEST_SCRIPTS: $[ dependencies.get_impacted_area.outputs['SetVariableTask.TEST_SCRIPTS'] ]
+    timeoutInMinutes: ${{ parameters.TIMEOUT_IN_MINUTES_PR_TEST }}
     continueOnError: false
-    steps:
-    - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
-      parameters:
-        TOPOLOGY: t1-lag
-        MIN_WORKER: $(T1_LAG_INSTANCE_NUM)
-        MAX_WORKER: $(T1_LAG_INSTANCE_NUM)
-        MGMT_BRANCH: $(BUILD_BRANCH)
-
-  - job: multi_asic_elastictest
-    displayName: "kvmtest-multi-asic-t1-lag by Elastictest"
     pool: sonic-ubuntu-1c
-    timeoutInMinutes: 240
-    continueOnError: false
     steps:
+      - checkout: sonic-mgmt
+      - template: .azure-pipelines/impacted_area_testing/calculate-instance-numbers.yml@sonic-mgmt
+        parameters:
+          TOPOLOGY: t0
+          BUILD_BRANCH: $(BUILD_BRANCH)
+
       - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
         parameters:
-          TOPOLOGY: t1-8-lag
-          TEST_SET: multi-asic-t1-lag
-          MIN_WORKER: $(MULTI_ASIC_INSTANCE_NUM)
-          MAX_WORKER: $(MULTI_ASIC_INSTANCE_NUM)
-          NUM_ASIC: 4
+          TOPOLOGY: t0
+          SCRIPTS: $(SCRIPTS)
+          MIN_WORKER: $(INSTANCE_NUMBER)
+          MAX_WORKER: $(INSTANCE_NUMBER)
+          KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
           MGMT_BRANCH: $(BUILD_BRANCH)
 
-  - job: dualtor_elastictest
-    pool: sonic-ubuntu-1c
-    displayName: "kvmtest-dualtor-t0 by Elastictest"
-    timeoutInMinutes: 240
+  - job: impacted_area_t0_2vlans_elastictest
+    displayName: "impacted-area-kvmtest-t0-2vlans by Elastictest"
+    dependsOn:
+      - get_impacted_area
+    condition: contains(dependencies.get_impacted_area.outputs['SetVariableTask.PR_CHECKERS'], 't0-2vlans_checker')
+    variables:
+      TEST_SCRIPTS: $[ dependencies.get_impacted_area.outputs['SetVariableTask.TEST_SCRIPTS'] ]
+    timeoutInMinutes: ${{ parameters.TIMEOUT_IN_MINUTES_PR_TEST }}
     continueOnError: false
+    pool: sonic-ubuntu-1c
     steps:
+      - checkout: sonic-mgmt
+      - template: .azure-pipelines/impacted_area_testing/calculate-instance-numbers.yml@sonic-mgmt
+        parameters:
+          TOPOLOGY: t0-2vlans
+          BUILD_BRANCH: $(BUILD_BRANCH)
+
       - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
         parameters:
-          TOPOLOGY: dualtor
-          MIN_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
-          MAX_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
+          TOPOLOGY: t0
+          SCRIPTS: $(SCRIPTS)
+          MIN_WORKER: $(INSTANCE_NUMBER)
+          MAX_WORKER: $(INSTANCE_NUMBER)
+          DEPLOY_MG_EXTRA_PARAMS: "-e vlan_config=two_vlan_a"
+          KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
           MGMT_BRANCH: $(BUILD_BRANCH)
-          COMMON_EXTRA_PARAMS: "--disable_loganalyzer "
 
-  - job: sonic_t0_elastictest
-    displayName: "kvmtest-t0-sonic by Elastictest"
-    pool: sonic-ubuntu-1c
-    timeoutInMinutes: 240
+  - job: impacted_area_t1_lag_elastictest
+    displayName: "impacted-area-kvmtest-t1-lag by Elastictest"
+    dependsOn:
+      - get_impacted_area
+    condition: contains(dependencies.get_impacted_area.outputs['SetVariableTask.PR_CHECKERS'], 't1_checker')
+    variables:
+      TEST_SCRIPTS: $[ dependencies.get_impacted_area.outputs['SetVariableTask.TEST_SCRIPTS'] ]
+    timeoutInMinutes: ${{ parameters.TIMEOUT_IN_MINUTES_PR_TEST }}
     continueOnError: false
+    pool: sonic-ubuntu-1c
     steps:
+      - checkout: sonic-mgmt
+      - template: .azure-pipelines/impacted_area_testing/calculate-instance-numbers.yml@sonic-mgmt
+        parameters:
+          TOPOLOGY: t1
+          BUILD_BRANCH: $(BUILD_BRANCH)
+          # 40 mins for preparing testbed, 10 mins for pre-test and post-test
+          PREPARE_TIME: 50
+
       - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
         parameters:
-          TOPOLOGY: t0-64-32
-          MIN_WORKER: $(T0_SONIC_INSTANCE_NUM)
-          MAX_WORKER: $(T0_SONIC_INSTANCE_NUM)
-          TEST_SET: t0-sonic
+          TOPOLOGY: t1-lag
+          SCRIPTS: $(SCRIPTS)
+          MIN_WORKER: $(INSTANCE_NUMBER)
+          MAX_WORKER: $(INSTANCE_NUMBER)
+          KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
           MGMT_BRANCH: $(BUILD_BRANCH)
-          COMMON_EXTRA_PARAMS: "--neighbor_type=sonic "
-          VM_TYPE: vsonic
 
-  - job: dpu_elastictest
-    displayName: "kvmtest-dpu by Elastictest"
-    timeoutInMinutes: 240
+  - job: impacted_area_dualtor_elastictest
+    displayName: "impacted-area-kvmtest-dualtor by Elastictest"
+    dependsOn:
+      - get_impacted_area
+    condition: contains(dependencies.get_impacted_area.outputs['SetVariableTask.PR_CHECKERS'], 'dualtor_checker')
+    variables:
+      TEST_SCRIPTS: $[ dependencies.get_impacted_area.outputs['SetVariableTask.TEST_SCRIPTS'] ]
+    timeoutInMinutes: ${{ parameters.TIMEOUT_IN_MINUTES_PR_TEST }}
     continueOnError: false
     pool: sonic-ubuntu-1c
     steps:
+      - checkout: sonic-mgmt
+      - template: .azure-pipelines/impacted_area_testing/calculate-instance-numbers.yml@sonic-mgmt
+        parameters:
+          TOPOLOGY: dualtor
+          BUILD_BRANCH: $(BUILD_BRANCH)
+          # 30 mins for preparing testbed, 30 mins for pre-test and 20 mins for post-test
+          PREPARE_TIME: 80
+
       - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
         parameters:
-          TOPOLOGY: dpu
-          MIN_WORKER: $(T0_SONIC_INSTANCE_NUM)
-          MAX_WORKER: $(T0_SONIC_INSTANCE_NUM)
+          TOPOLOGY: dualtor
+          SCRIPTS: $(SCRIPTS)
+          MIN_WORKER: $(INSTANCE_NUMBER)
+          MAX_WORKER: $(INSTANCE_NUMBER)
+          COMMON_EXTRA_PARAMS: "--disable_loganalyzer "
+          KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
           MGMT_BRANCH: $(BUILD_BRANCH)
 
-  - job: onboarding_elastictest_t0
-    displayName: "onboarding t0 testcases by Elastictest - optional"
-    timeoutInMinutes: 240
+  - job: impacted_area_multi_asic_elastictest
+    displayName: "impacted-area-kvmtest-multi-asic-t1 by Elastictest"
+    dependsOn:
+      - get_impacted_area
+    condition: contains(dependencies.get_impacted_area.outputs['SetVariableTask.PR_CHECKERS'], 't1-multi-asic_checker')
+    variables:
+      TEST_SCRIPTS: $[ dependencies.get_impacted_area.outputs['SetVariableTask.TEST_SCRIPTS'] ]
+    timeoutInMinutes: ${{ parameters.TIMEOUT_IN_MINUTES_PR_TEST }}
     continueOnError: true
     pool: sonic-ubuntu-1c
     steps:
+      - checkout: sonic-mgmt
+      - template: .azure-pipelines/impacted_area_testing/calculate-instance-numbers.yml@sonic-mgmt
+        parameters:
+          TOPOLOGY: t1-multi-asic
+          BUILD_BRANCH: $(BUILD_BRANCH)
+
       - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
         parameters:
-          TOPOLOGY: t0
-          STOP_ON_FAILURE: "False"
-          RETRY_TIMES: 0
-          MIN_WORKER: $(T0_ONBOARDING_SONIC_INSTANCE_NUM)
-          MAX_WORKER: $(T0_ONBOARDING_SONIC_INSTANCE_NUM)
+          TOPOLOGY: t1-8-lag
+          SCRIPTS: $(SCRIPTS)
+          MIN_WORKER: $(INSTANCE_NUMBER)
+          MAX_WORKER: $(INSTANCE_NUMBER)
+          NUM_ASIC: 4
           KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
           MGMT_BRANCH: $(BUILD_BRANCH)
-          TEST_SET: onboarding_t0
 
-  - job: onboarding_elastictest_t1
-    displayName: "onboarding t1 testcases by Elastictest - optional"
-    timeoutInMinutes: 240
-    continueOnError: true
+  - job: impacted_area_t0_sonic_elastictest
+    displayName: "impacted-area-kvmtest-t0-sonic by Elastictest"
+    dependsOn:
+      - get_impacted_area
+    condition: contains(dependencies.get_impacted_area.outputs['SetVariableTask.PR_CHECKERS'], 't0-sonic_checker')
+    variables:
+      TEST_SCRIPTS: $[ dependencies.get_impacted_area.outputs['SetVariableTask.TEST_SCRIPTS'] ]
+    timeoutInMinutes: ${{ parameters.TIMEOUT_IN_MINUTES_PR_TEST }}
+    continueOnError: false
+    pool: sonic-ubuntu-1c
+    steps:
+      - checkout: sonic-mgmt
+      - template: .azure-pipelines/impacted_area_testing/calculate-instance-numbers.yml@sonic-mgmt
+        parameters:
+          TOPOLOGY: t0-sonic
+          BUILD_BRANCH: $(BUILD_BRANCH)
+          PREPARE_TIME: 40
+
+      - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+        parameters:
+          TOPOLOGY: t0-64-32
+          SCRIPTS: $(SCRIPTS)
+          MIN_WORKER: $(INSTANCE_NUMBER)
+          MAX_WORKER: $(INSTANCE_NUMBER)
+          KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
+          COMMON_EXTRA_PARAMS: "--neighbor_type=sonic "
+          VM_TYPE: vsonic
+          MGMT_BRANCH: $(BUILD_BRANCH)
+          SPECIFIC_PARAM: '[
+            {"name": "bgp/test_bgp_fact.py", "param": "--neighbor_type=sonic --enable_macsec --macsec_profile=128_SCI,256_XPN_SCI"},
+            {"name": "macsec", "param": "--neighbor_type=sonic --enable_macsec --macsec_profile=128_SCI,256_XPN_SCI"}
+            ]'
+
+  - job: impacted_area_dpu_elastictest
+    displayName: "impacted-area-kvmtest-dpu by Elastictest"
+    dependsOn:
+      - get_impacted_area
+    condition: contains(dependencies.get_impacted_area.outputs['SetVariableTask.PR_CHECKERS'], 'dpu_checker')
+    variables:
+      TEST_SCRIPTS: $[ dependencies.get_impacted_area.outputs['SetVariableTask.TEST_SCRIPTS'] ]
+    timeoutInMinutes: ${{ parameters.TIMEOUT_IN_MINUTES_PR_TEST }}
+    continueOnError: false
     pool: sonic-ubuntu-1c
     steps:
+      - checkout: sonic-mgmt
+      - template: .azure-pipelines/impacted_area_testing/calculate-instance-numbers.yml@sonic-mgmt
+        parameters:
+          TOPOLOGY: dpu
+          BUILD_BRANCH: $(BUILD_BRANCH)
+
       - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
         parameters:
-          TOPOLOGY: t1-lag
-          STOP_ON_FAILURE: "False"
-          RETRY_TIMES: 0
-          MIN_WORKER: $(T1_LAG_ONBOARDING_INSTANCE_NUM)
-          MAX_WORKER: $(T1_LAG_ONBOARDING_INSTANCE_NUM)
+          TOPOLOGY: dpu
+          SCRIPTS: $(SCRIPTS)
+          MIN_WORKER: $(INSTANCE_NUMBER)
+          MAX_WORKER: $(INSTANCE_NUMBER)
           KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
           MGMT_BRANCH: $(BUILD_BRANCH)
-          TEST_SET: onboarding_t1
-
-#  - job: onboarding_elastictest_dualtor
-#    displayName: "onboarding dualtor testcases by Elastictest - optional"
-#    timeoutInMinutes: 240
-#    continueOnError: true
-#    pool: sonic-ubuntu-1c
-#    steps:
-#      - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
-#        parameters:
-#          TOPOLOGY: dualtor
-#          STOP_ON_FAILURE: "False"
-#          RETRY_TIMES: 0
-#          MIN_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
-#          MAX_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
-#          KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
-#          MGMT_BRANCH: $(BUILD_BRANCH)
-#          TEST_SET: onboarding_dualtor
-
-#  - job: wan_elastictest
-#    displayName: "kvmtest-wan by Elastictest"
-#    pool: sonic-ubuntu-1c
-#    timeoutInMinutes: 240
-#    continueOnError: false
-#    steps:
-#      - template: .azure-pipelines/run-test-scheduler-template.yml
-#        parameters:
-#          TOPOLOGY: wan-pub
-#          MIN_WORKER: $(WAN_INSTANCE_NUM)
-#          MAX_WORKER: $(WAN_INSTANCE_NUM)
-#          COMMON_EXTRA_PARAMS: "--skip_sanity "
+          SPECIFIC_PARAM: '[
+            {"name": "dash/test_dash_vnet.py", "param": "--skip_dataplane_checking"}
+            ]'
diff --git a/build_debian.sh b/build_debian.sh
index 3102c45edcb..9600b887c38 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -33,7 +33,7 @@ CONFIGURED_ARCH=$([ -f .arch ] && cat .arch || echo amd64)
 ## docker engine version (with platform)
 DOCKER_VERSION=5:24.0.2-1~debian.12~$IMAGE_DISTRO
 CONTAINERD_IO_VERSION=1.6.21-1
-LINUX_KERNEL_VERSION=6.1.0-22-2
+LINUX_KERNEL_VERSION=6.1.0-29-2
 
 ## Working directory to prepare the file system
 FILESYSTEM_ROOT=./fsroot
@@ -85,7 +85,7 @@ sudo mount proc /proc -t proc || true
 
 ## Build the host debian base system
 echo '[INFO] Build host debian base system...'
-TARGET_PATH=$TARGET_PATH scripts/build_debian_base_system.sh $CONFIGURED_ARCH $IMAGE_DISTRO $FILESYSTEM_ROOT
+TARGET_PATH=$TARGET_PATH scripts/build_debian_base_system.sh $CONFIGURED_ARCH $IMAGE_DISTRO $FILESYSTEM_ROOT $http_proxy
 
 # Prepare buildinfo
 sudo SONIC_VERSION_CACHE=${SONIC_VERSION_CACHE} \
@@ -161,12 +161,10 @@ sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install pigz
 sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install busybox linux-base
 echo '[INFO] Install SONiC linux kernel image'
 ## Note: duplicate apt-get command to ensure every line return zero
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/initramfs-tools-core_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/initramfs-tools_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/linux-image-${LINUX_KERNEL_VERSION}-*_${CONFIGURED_ARCH}.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+sudo cp $debs_path/initramfs-tools-core_*.deb $debs_path/initramfs-tools_*.deb $debs_path/linux-image-${LINUX_KERNEL_VERSION}-*_${CONFIGURED_ARCH}.deb $FILESYSTEM_ROOT
+basename_deb_packages=$(basename -a $debs_path/initramfs-tools-core_*.deb $debs_path/initramfs-tools_*.deb $debs_path/linux-image-${LINUX_KERNEL_VERSION}-*_${CONFIGURED_ARCH}.deb | sed 's,^,./,')
+sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt -y install $basename_deb_packages
+( cd $FILESYSTEM_ROOT; sudo rm -f $basename_deb_packages )
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install acl
 if [[ $CONFIGURED_ARCH == amd64 ]]; then
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install hdparm
@@ -233,7 +231,6 @@ echo '[INFO] Install docker'
 ## Install apparmor utils since they're missing and apparmor is enabled in the kernel
 ## Otherwise Docker will fail to start
 sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install apparmor
-sudo cp files/image_config/ntp/ntp-apparmor $FILESYSTEM_ROOT/etc/apparmor.d/local/usr.sbin.ntpd
 sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install apt-transport-https \
                                                        ca-certificates \
                                                        curl
@@ -252,7 +249,7 @@ sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install docker-ce=${DOCKER_VERSIO
 install_kubernetes () {
     local ver="$1"
     ## Install k8s package from storage
-    local storage_prefix="https://sonicstorage.blob.core.windows.net/public/kubernetes"
+    local storage_prefix="https://packages.trafficmanager.net/public/kubernetes"
     sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/cri-tools.deb -fsSL \
         ${storage_prefix}/cri-tools_${KUBERNETES_CRI_TOOLS_VERSION}_${CONFIGURED_ARCH}.deb
     sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/kubernetes-cni.deb -fsSL \
@@ -333,7 +330,6 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
     vim                     \
     tcpdump                 \
     dbus                    \
-    ntpstat                 \
     openssh-server          \
     python3-apt             \
     traceroute              \
@@ -421,6 +417,20 @@ sudo LANG=c chroot $FILESYSTEM_ROOT chmod 644 /etc/group
 sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "mkdir -p /etc/initramfs-tools/conf.d"
 sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo 'MODULES=most' >> /etc/initramfs-tools/conf.d/driver-policy"
 
+# Ensure the relevant directories exist
+sudo mkdir -p /etc/initramfs-tools/scripts/init-premount
+sudo mkdir -p /etc/initramfs-tools/hooks
+
+# Copy the network setup scriptgit
+sudo cp files/scripts/network_setup.sh /etc/initramfs-tools/scripts/init-premount/network_setup.sh
+
+# Copy the hook file
+sudo cp files/scripts/network_setup /etc/initramfs-tools/hooks/network_setup
+
+# Make the scripts executable
+sudo chmod +x /etc/initramfs-tools/scripts/init-premount/network_setup.sh
+sudo chmod +x /etc/initramfs-tools/hooks/network_setup
+
 # Copy vmcore-sysctl.conf to add more vmcore dump flags to kernel
 sudo cp files/image_config/kdump/vmcore-sysctl.conf $FILESYSTEM_ROOT/etc/sysctl.d/
 
@@ -434,7 +444,7 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
     picocom \
     systemd \
     systemd-sysv \
-    ntp
+    chrony
 
 if [[ $TARGET_BOOTLOADER == grub ]]; then
     if [[ $CONFIGURED_ARCH == amd64 ]]; then
@@ -532,9 +542,6 @@ sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install 'docke
 # Install scapy
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install 'scapy==2.4.4'
 
-# The option --no-build-isolation can be removed when upgrading PyYAML to 6.0.1
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install 'PyYAML==5.4.1' --no-build-isolation
-
 ## Note: keep pip installed for maintainance purpose
 
 # Install GCC, needed for building/installing some Python packages
diff --git a/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C28S16 b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C28S16
new file mode 120000
index 00000000000..e57dfc4cf2c
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C28S16
@@ -0,0 +1 @@
+../x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C28S4 b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C28S4
new file mode 120000
index 00000000000..663ff17237c
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C28S4
@@ -0,0 +1 @@
+../x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C32 b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C32
new file mode 120000
index 00000000000..a314b933b10
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C32
@@ -0,0 +1 @@
+../x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C32
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C6S104 b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C6S104
new file mode 120000
index 00000000000..373dcfe4f09
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-C6S104
@@ -0,0 +1 @@
+../x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-D48C8 b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-D48C8
new file mode 120000
index 00000000000..2cd3fd159b3
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-D48C8
@@ -0,0 +1 @@
+../x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-S128 b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-S128
new file mode 120000
index 00000000000..e5f9384be1c
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/Arista-7050CX3-32C-S128
@@ -0,0 +1 @@
+../x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/default_sku b/device/arista/x86_64-arista_7050cx3_32c/default_sku
new file mode 100644
index 00000000000..bfa764b4747
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/default_sku
@@ -0,0 +1 @@
+Arista-7050CX3-32C-C32 t1
diff --git a/device/arista/x86_64-arista_7050cx3_32c/pcie.yaml b/device/arista/x86_64-arista_7050cx3_32c/pcie.yaml
new file mode 120000
index 00000000000..df18a601d82
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/pcie.yaml
@@ -0,0 +1 @@
+../x86_64-arista_common/pcie.yaml
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/platform.json b/device/arista/x86_64-arista_7050cx3_32c/platform.json
new file mode 100644
index 00000000000..016f3d89e00
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/platform.json
@@ -0,0 +1,816 @@
+{
+    "chassis": {
+        "name": "DCS-7050CX3-32C",
+        "components": [
+            {
+                "name": "Aboot()"
+            },
+            {
+                "name": "Scd(addr=0000:00:18.7)"
+            },
+            {
+                "name": "Scd(addr=0000:02:00.0)"
+            },
+            {
+                "name": "PuffinPrimeSysCpld(addr=9-0023)"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "slot1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    },
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "slot2",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    },
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "psu1",
+                "fans": [
+                    {
+                        "name": "psu1/1",
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "psu2",
+                "fans": [
+                    {
+                        "name": "psu2/1",
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "Cpu temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Cpu board temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Back-panel temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Board temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Front-panel temp sensor",
+                "controllable": false
+            }
+        ],
+        "sfps": [
+            {
+                "name": "qsfp1"
+            },
+            {
+                "name": "qsfp2"
+            },
+            {
+                "name": "qsfp3"
+            },
+            {
+                "name": "qsfp4"
+            },
+            {
+                "name": "qsfp5"
+            },
+            {
+                "name": "qsfp6"
+            },
+            {
+                "name": "qsfp7"
+            },
+            {
+                "name": "qsfp8"
+            },
+            {
+                "name": "qsfp9"
+            },
+            {
+                "name": "qsfp10"
+            },
+            {
+                "name": "qsfp11"
+            },
+            {
+                "name": "qsfp12"
+            },
+            {
+                "name": "qsfp13"
+            },
+            {
+                "name": "qsfp14"
+            },
+            {
+                "name": "qsfp15"
+            },
+            {
+                "name": "qsfp16"
+            },
+            {
+                "name": "qsfp17"
+            },
+            {
+                "name": "qsfp18"
+            },
+            {
+                "name": "qsfp19"
+            },
+            {
+                "name": "qsfp20"
+            },
+            {
+                "name": "qsfp21"
+            },
+            {
+                "name": "qsfp22"
+            },
+            {
+                "name": "qsfp23"
+            },
+            {
+                "name": "qsfp24"
+            },
+            {
+                "name": "qsfp25"
+            },
+            {
+                "name": "qsfp26"
+            },
+            {
+                "name": "qsfp27"
+            },
+            {
+                "name": "qsfp28"
+            },
+            {
+                "name": "qsfp29"
+            },
+            {
+                "name": "qsfp30"
+            },
+            {
+                "name": "qsfp31"
+            },
+            {
+                "name": "qsfp32"
+            },
+            {
+                "name": "sfp33"
+            },
+            {
+                "name": "sfp34"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet1/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet1/1",
+                    "Ethernet1/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet1/1",
+                    "Ethernet1/2",
+                    "Ethernet1/3",
+                    "Ethernet1/4"
+                ]
+            }
+        },
+        "Ethernet4": {
+            "index": "2,2,2,2",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet2/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet2/1",
+                    "Ethernet2/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet2/1",
+                    "Ethernet2/2",
+                    "Ethernet2/3",
+                    "Ethernet2/4"
+                ]
+            }
+        },
+        "Ethernet8": {
+            "index": "3,3,3,3",
+            "lanes": "9,10,11,12",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet3/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet3/1",
+                    "Ethernet3/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet3/1",
+                    "Ethernet3/2",
+                    "Ethernet3/3",
+                    "Ethernet3/4"
+                ]
+            }
+        },
+        "Ethernet12": {
+            "index": "4,4,4,4",
+            "lanes": "13,14,15,16",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet4/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet4/1",
+                    "Ethernet4/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet4/1",
+                    "Ethernet4/2",
+                    "Ethernet4/3",
+                    "Ethernet4/4"
+                ]
+            }
+        },
+        "Ethernet16": {
+            "index": "5,5,5,5",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet5/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet5/1",
+                    "Ethernet5/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet5/1",
+                    "Ethernet5/2",
+                    "Ethernet5/3",
+                    "Ethernet5/4"
+                ]
+            }
+        },
+        "Ethernet20": {
+            "index": "6,6,6,6",
+            "lanes": "17,18,19,20",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet6/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet6/1",
+                    "Ethernet6/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet6/1",
+                    "Ethernet6/2",
+                    "Ethernet6/3",
+                    "Ethernet6/4"
+                ]
+            }
+        },
+        "Ethernet24": {
+            "index": "7,7,7,7",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet7/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet7/1",
+                    "Ethernet7/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet7/1",
+                    "Ethernet7/2",
+                    "Ethernet7/3",
+                    "Ethernet7/4"
+                ]
+            }
+        },
+        "Ethernet28": {
+            "index": "8,8,8,8",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet8/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet8/1",
+                    "Ethernet8/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet8/1",
+                    "Ethernet8/2",
+                    "Ethernet8/3",
+                    "Ethernet8/4"
+                ]
+            }
+        },
+        "Ethernet32": {
+            "index": "9,9,9,9",
+            "lanes": "37,38,39,40",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet9/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet9/1",
+                    "Ethernet9/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet9/1",
+                    "Ethernet9/2",
+                    "Ethernet9/3",
+                    "Ethernet9/4"
+                ]
+            }
+        },
+        "Ethernet36": {
+            "index": "10,10,10,10",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet10/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet10/1",
+                    "Ethernet10/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet10/1",
+                    "Ethernet10/2",
+                    "Ethernet10/3",
+                    "Ethernet10/4"
+                ]
+            }
+        },
+        "Ethernet40": {
+            "index": "11,11,11,11",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet11/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet11/1",
+                    "Ethernet11/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet11/1",
+                    "Ethernet11/2",
+                    "Ethernet11/3",
+                    "Ethernet11/4"
+                ]
+            }
+        },
+        "Ethernet44": {
+            "index": "12,12,12,12",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet12/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet12/1",
+                    "Ethernet12/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet12/1",
+                    "Ethernet12/2",
+                    "Ethernet12/3",
+                    "Ethernet12/4"
+                ]
+            }
+        },
+        "Ethernet48": {
+            "index": "13,13,13,13",
+            "lanes": "53,54,55,56",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet13/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet13/1",
+                    "Ethernet13/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet13/1",
+                    "Ethernet13/2",
+                    "Ethernet13/3",
+                    "Ethernet13/4"
+                ]
+            }
+        },
+        "Ethernet52": {
+            "index": "14,14,14,14",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet14/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet14/1",
+                    "Ethernet14/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet14/1",
+                    "Ethernet14/2",
+                    "Ethernet14/3",
+                    "Ethernet14/4"
+                ]
+            }
+        },
+        "Ethernet56": {
+            "index": "15,15,15,15",
+            "lanes": "57,58,59,60",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet15/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet15/1",
+                    "Ethernet15/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet15/1",
+                    "Ethernet15/2",
+                    "Ethernet15/3",
+                    "Ethernet15/4"
+                ]
+            }
+        },
+        "Ethernet60": {
+            "index": "16,16,16,16",
+            "lanes": "61,62,63,64",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet16/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet16/1",
+                    "Ethernet16/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet16/1",
+                    "Ethernet16/2",
+                    "Ethernet16/3",
+                    "Ethernet16/4"
+                ]
+            }
+        },
+        "Ethernet64": {
+            "index": "17,17,17,17",
+            "lanes": "69,70,71,72",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet17/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet17/1",
+                    "Ethernet17/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet17/1",
+                    "Ethernet17/2",
+                    "Ethernet17/3",
+                    "Ethernet17/4"
+                ]
+            }
+        },
+        "Ethernet68": {
+            "index": "18,18,18,18",
+            "lanes": "65,66,67,68",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet18/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet18/1",
+                    "Ethernet18/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet18/1",
+                    "Ethernet18/2",
+                    "Ethernet18/3",
+                    "Ethernet18/4"
+                ]
+            }
+        },
+        "Ethernet72": {
+            "index": "19,19,19,19",
+            "lanes": "73,74,75,76",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet19/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet19/1",
+                    "Ethernet19/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet19/1",
+                    "Ethernet19/2",
+                    "Ethernet19/3",
+                    "Ethernet19/4"
+                ]
+            }
+        },
+        "Ethernet76": {
+            "index": "20,20,20,20",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet20/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet20/1",
+                    "Ethernet20/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet20/1",
+                    "Ethernet20/2",
+                    "Ethernet20/3",
+                    "Ethernet20/4"
+                ]
+            }
+        },
+        "Ethernet80": {
+            "index": "21,21,21,21",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet21/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet21/1",
+                    "Ethernet21/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet21/1",
+                    "Ethernet21/2",
+                    "Ethernet21/3",
+                    "Ethernet21/4"
+                ]
+            }
+        },
+        "Ethernet84": {
+            "index": "22,22,22,22",
+            "lanes": "81,82,83,84",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet22/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet22/1",
+                    "Ethernet22/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet22/1",
+                    "Ethernet22/2",
+                    "Ethernet22/3",
+                    "Ethernet22/4"
+                ]
+            }
+        },
+        "Ethernet88": {
+            "index": "23,23,23,23",
+            "lanes": "89,90,91,92",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet23/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet23/1",
+                    "Ethernet23/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet23/1",
+                    "Ethernet23/2",
+                    "Ethernet23/3",
+                    "Ethernet23/4"
+                ]
+            }
+        },
+        "Ethernet92": {
+            "index": "24,24,24,24",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet24/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet24/1",
+                    "Ethernet24/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet24/1",
+                    "Ethernet24/2",
+                    "Ethernet24/3",
+                    "Ethernet24/4"
+                ]
+            }
+        },
+        "Ethernet96": {
+            "index": "25,25,25,25",
+            "lanes": "101,102,103,104",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet25/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet25/1",
+                    "Ethernet25/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet25/1",
+                    "Ethernet25/2",
+                    "Ethernet25/3",
+                    "Ethernet25/4"
+                ]
+            }
+        },
+        "Ethernet100": {
+            "index": "26,26,26,26",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet26/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet26/1",
+                    "Ethernet26/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet26/1",
+                    "Ethernet26/2",
+                    "Ethernet26/3",
+                    "Ethernet26/4"
+                ]
+            }
+        },
+        "Ethernet104": {
+            "index": "27,27,27,27",
+            "lanes": "105,106,107,108",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet27/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet27/1",
+                    "Ethernet27/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet27/1",
+                    "Ethernet27/2",
+                    "Ethernet27/3",
+                    "Ethernet27/4"
+                ]
+            }
+        },
+        "Ethernet108": {
+            "index": "28,28,28,28",
+            "lanes": "109,110,111,112",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet28/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet28/1",
+                    "Ethernet28/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet28/1",
+                    "Ethernet28/2",
+                    "Ethernet28/3",
+                    "Ethernet28/4"
+                ]
+            }
+        },
+        "Ethernet112": {
+            "index": "29,29,29,29",
+            "lanes": "117,118,119,120",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet29/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet29/1",
+                    "Ethernet29/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet29/1",
+                    "Ethernet29/2",
+                    "Ethernet29/3",
+                    "Ethernet29/4"
+                ]
+            }
+        },
+        "Ethernet116": {
+            "index": "30,30,30,30",
+            "lanes": "113,114,115,116",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet30/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet30/1",
+                    "Ethernet30/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet30/1",
+                    "Ethernet30/2",
+                    "Ethernet30/3",
+                    "Ethernet30/4"
+                ]
+            }
+        },
+        "Ethernet120": {
+            "index": "31,31,31,31",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet31/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet31/1",
+                    "Ethernet31/3"
+                ],
+                "4x25G[10G]": [
+                    "Ethernet31/1",
+                    "Ethernet31/2",
+                    "Ethernet31/3",
+                    "Ethernet31/4"
+                ]
+            }
+        },
+        "Ethernet124": {
+            "index": "32,32,32,32",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x100G[50G,40G,25G,10G]": [
+                    "Ethernet32/1"
+                ],
+                "2x50G[40G,25G,10G]": [
+                    "Ethernet32/1",
+                    "Ethernet32/3"
+                ]
+            }
+        },
+        "Ethernet128": {
+            "index": "33",
+            "lanes": "129",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet33"
+                ]
+            }
+        },
+        "Ethernet132": {
+            "index": "34",
+            "lanes": "128",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet34"
+                ]
+            }
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7050cx3_32c/platform_asic b/device/arista/x86_64-arista_7050cx3_32c/platform_asic
new file mode 120000
index 00000000000..b890a09eb5c
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/platform_asic
@@ -0,0 +1 @@
+../x86_64-arista_7050cx3_32s/platform_asic
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/platform_components.json b/device/arista/x86_64-arista_7050cx3_32c/platform_components.json
new file mode 100644
index 00000000000..d74f80bc583
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/platform_components.json
@@ -0,0 +1,12 @@
+{
+    "chassis": {
+        "DCS-7050CX3-32C": {
+            "component": {
+                "Aboot()": {},
+                "Scd(addr=0000:00:18.7)": {},
+                "Scd(addr=0000:02:00.0)": {},
+                "PuffinPrimeSysCpld(addr=9-0023)": {}
+            }
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7050cx3_32c/platform_reboot b/device/arista/x86_64-arista_7050cx3_32c/platform_reboot
new file mode 120000
index 00000000000..7f94a49e38b
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/platform_reboot
@@ -0,0 +1 @@
+../x86_64-arista_common/platform_reboot
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/plugins b/device/arista/x86_64-arista_7050cx3_32c/plugins
new file mode 120000
index 00000000000..789a45fcace
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/plugins
@@ -0,0 +1 @@
+../x86_64-arista_common/plugins
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/pmon_daemon_control.json b/device/arista/x86_64-arista_7050cx3_32c/pmon_daemon_control.json
new file mode 120000
index 00000000000..51d5ab7b005
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/pmon_daemon_control.json
@@ -0,0 +1 @@
+../x86_64-arista_common/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/sensors.conf b/device/arista/x86_64-arista_7050cx3_32c/sensors.conf
new file mode 100644
index 00000000000..907bacbfb04
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/sensors.conf
@@ -0,0 +1,35 @@
+# libsensors configuration file for DCS-7050CX3-32C
+# ------------------------------------------------
+#
+
+bus "i2c-5" "SCD 0000:00:18.7 SMBus master 0 bus 0"
+bus "i2c-13" "SCD 0000:02:00.0 SMBus master 0 bus 0"
+bus "i2c-14" "SCD 0000:02:00.0 SMBus master 0 bus 1"
+bus "i2c-15" "SCD 0000:02:00.0 SMBus master 0 bus 2"
+
+chip "k10temp-pci-00c3"
+    label temp1 "Cpu temp sensor"
+
+chip "max6658-i2c-5-4c"
+    label temp1 "Cpu board temp sensor"
+    label temp2 "Back panel temp sensor"
+
+chip "max6658-i2c-13-4c"
+    label temp1 "Board temp sensor"
+    label temp2 "Front panel temp sensor"
+
+chip "pmbus-i2c-14-58"
+    label temp1 "Power supply 1 inlet sensor"
+    label temp2 "Power supply 1 primary hotspot sensor"
+    label temp3 "Power supply 1 secondary hotspot sensor"
+
+    ignore fan2
+    ignore fan3
+
+chip "pmbus-i2c-15-58"
+    label temp1 "Power supply 2 inlet sensor"
+    label temp2 "Power supply 2 primary hotspot sensor"
+    label temp3 "Power supply 2 secondary hotspot sensor"
+
+    ignore fan2
+    ignore fan3
diff --git a/device/arista/x86_64-arista_7050cx3_32c/system_health_monitoring_config.json b/device/arista/x86_64-arista_7050cx3_32c/system_health_monitoring_config.json
new file mode 120000
index 00000000000..1185f771fa8
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-arista_common/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32c/thermal_policy.json b/device/arista/x86_64-arista_7050cx3_32c/thermal_policy.json
new file mode 120000
index 00000000000..0991dc7f363
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32c/thermal_policy.json
@@ -0,0 +1 @@
+../x86_64-arista_common/thermal_policy.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/config.bcm.j2 b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/config.bcm.j2
new file mode 100644
index 00000000000..3cc192acdd0
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/config.bcm.j2
@@ -0,0 +1,499 @@
+PHY_AN_ALLOW_PLL_CHANGE=1
+arl_clean_timeout_usec=15000000
+asf_mem_profile=2
+bcm_num_cos=10
+bcm_stat_flags=1
+bcm_stat_interval=5000000
+bcm_stat_jumbo=9236
+bcm_tunnel_term_compatible_mode=1
+cancun_dir=/usr/bin/StrataXgsApiV6/cancun/
+cdma_timeout_usec=15000000
+core_clock_frequency=1525
+disable_pcie_firmware_check=1
+dma_desc_timeout_usec=15000000
+dpp_clock_ratio=2:3
+flow_init_mode=1
+fpem_mem_entries=0
+higig2_hdr_mode=1
+host_as_route_disable=1
+hybrid_pfc_deadlock_enable=1
+ifp_inports_support_enable=1
+ipv6_lpm_128b_enable=1
+l2_mem_entries=32768
+l2xmsg_mode=1
+l3_alpm_enable=2
+l3_alpm_hit_skip=1
+l3_ecmp_levels=2
+l3_max_ecmp_mode=1
+l3_mem_entries=16384
+max_vp_lags=0
+miim_intr_enable=0
+module_64ports=1
+multicast_l2_range=16383
+multicast_l3_range=0
+os=unix
+oversubscribe_mode=1
+pbmp_xport_xe=0x7ffffffffffffffffffffffffffffffffe
+pfc_deadlock_seq_control=1
+phy_an_lt_msft=1
+phy_an_c37_130=2
+phy_an_c37_66=2
+phy_an_c73=1
+phy_chain_rx_lane_map_physical{1.0}=0x1302
+phy_chain_rx_lane_map_physical{101.0}=0x0213
+phy_chain_rx_lane_map_physical{105.0}=0x2031
+phy_chain_rx_lane_map_physical{109.0}=0x0213
+phy_chain_rx_lane_map_physical{113.0}=0x2130
+phy_chain_rx_lane_map_physical{117.0}=0x0213
+phy_chain_rx_lane_map_physical{121.0}=0x2031
+phy_chain_rx_lane_map_physical{125.0}=0x0213
+phy_chain_rx_lane_map_physical{129.0}=0x3210
+phy_chain_rx_lane_map_physical{13.0}=0x3120
+phy_chain_rx_lane_map_physical{17.0}=0x1203
+phy_chain_rx_lane_map_physical{21.0}=0x3120
+phy_chain_rx_lane_map_physical{25.0}=0x3120
+phy_chain_rx_lane_map_physical{29.0}=0x3120
+phy_chain_rx_lane_map_physical{33.0}=0x1203
+phy_chain_rx_lane_map_physical{37.0}=0x3120
+phy_chain_rx_lane_map_physical{41.0}=0x3120
+phy_chain_rx_lane_map_physical{45.0}=0x3120
+phy_chain_rx_lane_map_physical{49.0}=0x1203
+phy_chain_rx_lane_map_physical{5.0}=0x3120
+phy_chain_rx_lane_map_physical{53.0}=0x3120
+phy_chain_rx_lane_map_physical{57.0}=0x3120
+phy_chain_rx_lane_map_physical{61.0}=0x3120
+phy_chain_rx_lane_map_physical{65.0}=0x2130
+phy_chain_rx_lane_map_physical{69.0}=0x0213
+phy_chain_rx_lane_map_physical{73.0}=0x2031
+phy_chain_rx_lane_map_physical{77.0}=0x0213
+phy_chain_rx_lane_map_physical{81.0}=0x2130
+phy_chain_rx_lane_map_physical{85.0}=0x0213
+phy_chain_rx_lane_map_physical{89.0}=0x2031
+phy_chain_rx_lane_map_physical{9.0}=0x3120
+phy_chain_rx_lane_map_physical{93.0}=0x0213
+phy_chain_rx_lane_map_physical{97.0}=0x2130
+phy_chain_rx_polarity_flip_physical{1.0}=0x0
+phy_chain_rx_polarity_flip_physical{10.0}=0x0
+phy_chain_rx_polarity_flip_physical{100.0}=0x1
+phy_chain_rx_polarity_flip_physical{101.0}=0x1
+phy_chain_rx_polarity_flip_physical{102.0}=0x0
+phy_chain_rx_polarity_flip_physical{103.0}=0x0
+phy_chain_rx_polarity_flip_physical{104.0}=0x1
+phy_chain_rx_polarity_flip_physical{105.0}=0x1
+phy_chain_rx_polarity_flip_physical{106.0}=0x1
+phy_chain_rx_polarity_flip_physical{107.0}=0x1
+phy_chain_rx_polarity_flip_physical{108.0}=0x0
+phy_chain_rx_polarity_flip_physical{109.0}=0x0
+phy_chain_rx_polarity_flip_physical{11.0}=0x1
+phy_chain_rx_polarity_flip_physical{110.0}=0x0
+phy_chain_rx_polarity_flip_physical{111.0}=0x1
+phy_chain_rx_polarity_flip_physical{112.0}=0x1
+phy_chain_rx_polarity_flip_physical{113.0}=0x1
+phy_chain_rx_polarity_flip_physical{114.0}=0x1
+phy_chain_rx_polarity_flip_physical{115.0}=0x0
+phy_chain_rx_polarity_flip_physical{116.0}=0x1
+phy_chain_rx_polarity_flip_physical{117.0}=0x0
+phy_chain_rx_polarity_flip_physical{118.0}=0x0
+phy_chain_rx_polarity_flip_physical{119.0}=0x1
+phy_chain_rx_polarity_flip_physical{12.0}=0x1
+phy_chain_rx_polarity_flip_physical{120.0}=0x1
+phy_chain_rx_polarity_flip_physical{121.0}=0x1
+phy_chain_rx_polarity_flip_physical{122.0}=0x1
+phy_chain_rx_polarity_flip_physical{123.0}=0x1
+phy_chain_rx_polarity_flip_physical{124.0}=0x0
+phy_chain_rx_polarity_flip_physical{125.0}=0x0
+phy_chain_rx_polarity_flip_physical{126.0}=0x0
+phy_chain_rx_polarity_flip_physical{127.0}=0x1
+phy_chain_rx_polarity_flip_physical{128.0}=0x1
+phy_chain_rx_polarity_flip_physical{129.0}=0x0
+phy_chain_rx_polarity_flip_physical{13.0}=0x1
+phy_chain_rx_polarity_flip_physical{131.0}=0x0
+phy_chain_rx_polarity_flip_physical{14.0}=0x1
+phy_chain_rx_polarity_flip_physical{15.0}=0x0
+phy_chain_rx_polarity_flip_physical{16.0}=0x0
+phy_chain_rx_polarity_flip_physical{17.0}=0x0
+phy_chain_rx_polarity_flip_physical{18.0}=0x0
+phy_chain_rx_polarity_flip_physical{19.0}=0x1
+phy_chain_rx_polarity_flip_physical{2.0}=0x0
+phy_chain_rx_polarity_flip_physical{20.0}=0x0
+phy_chain_rx_polarity_flip_physical{21.0}=0x1
+phy_chain_rx_polarity_flip_physical{22.0}=0x1
+phy_chain_rx_polarity_flip_physical{23.0}=0x0
+phy_chain_rx_polarity_flip_physical{24.0}=0x0
+phy_chain_rx_polarity_flip_physical{25.0}=0x0
+phy_chain_rx_polarity_flip_physical{26.0}=0x1
+phy_chain_rx_polarity_flip_physical{27.0}=0x1
+phy_chain_rx_polarity_flip_physical{28.0}=0x0
+phy_chain_rx_polarity_flip_physical{29.0}=0x1
+phy_chain_rx_polarity_flip_physical{3.0}=0x0
+phy_chain_rx_polarity_flip_physical{30.0}=0x1
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x0
+phy_chain_rx_polarity_flip_physical{33.0}=0x0
+phy_chain_rx_polarity_flip_physical{34.0}=0x0
+phy_chain_rx_polarity_flip_physical{35.0}=0x1
+phy_chain_rx_polarity_flip_physical{36.0}=0x0
+phy_chain_rx_polarity_flip_physical{37.0}=0x1
+phy_chain_rx_polarity_flip_physical{38.0}=0x1
+phy_chain_rx_polarity_flip_physical{39.0}=0x0
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+phy_chain_rx_polarity_flip_physical{40.0}=0x0
+phy_chain_rx_polarity_flip_physical{41.0}=0x0
+phy_chain_rx_polarity_flip_physical{42.0}=0x0
+phy_chain_rx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{44.0}=0x1
+phy_chain_rx_polarity_flip_physical{45.0}=0x1
+phy_chain_rx_polarity_flip_physical{46.0}=0x1
+phy_chain_rx_polarity_flip_physical{47.0}=0x0
+phy_chain_rx_polarity_flip_physical{48.0}=0x0
+phy_chain_rx_polarity_flip_physical{49.0}=0x0
+phy_chain_rx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{50.0}=0x0
+phy_chain_rx_polarity_flip_physical{51.0}=0x1
+phy_chain_rx_polarity_flip_physical{52.0}=0x0
+phy_chain_rx_polarity_flip_physical{53.0}=0x1
+phy_chain_rx_polarity_flip_physical{54.0}=0x1
+phy_chain_rx_polarity_flip_physical{55.0}=0x0
+phy_chain_rx_polarity_flip_physical{56.0}=0x0
+phy_chain_rx_polarity_flip_physical{57.0}=0x0
+phy_chain_rx_polarity_flip_physical{58.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x1
+phy_chain_rx_polarity_flip_physical{6.0}=0x1
+phy_chain_rx_polarity_flip_physical{60.0}=0x1
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_rx_polarity_flip_physical{62.0}=0x1
+phy_chain_rx_polarity_flip_physical{63.0}=0x0
+phy_chain_rx_polarity_flip_physical{64.0}=0x0
+phy_chain_rx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{66.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x0
+phy_chain_rx_polarity_flip_physical{68.0}=0x1
+phy_chain_rx_polarity_flip_physical{69.0}=0x0
+phy_chain_rx_polarity_flip_physical{7.0}=0x0
+phy_chain_rx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{71.0}=0x1
+phy_chain_rx_polarity_flip_physical{72.0}=0x1
+phy_chain_rx_polarity_flip_physical{73.0}=0x1
+phy_chain_rx_polarity_flip_physical{74.0}=0x1
+phy_chain_rx_polarity_flip_physical{75.0}=0x1
+phy_chain_rx_polarity_flip_physical{76.0}=0x0
+phy_chain_rx_polarity_flip_physical{77.0}=0x0
+phy_chain_rx_polarity_flip_physical{78.0}=0x0
+phy_chain_rx_polarity_flip_physical{79.0}=0x1
+phy_chain_rx_polarity_flip_physical{8.0}=0x0
+phy_chain_rx_polarity_flip_physical{80.0}=0x1
+phy_chain_rx_polarity_flip_physical{81.0}=0x1
+phy_chain_rx_polarity_flip_physical{82.0}=0x1
+phy_chain_rx_polarity_flip_physical{83.0}=0x0
+phy_chain_rx_polarity_flip_physical{84.0}=0x1
+phy_chain_rx_polarity_flip_physical{85.0}=0x0
+phy_chain_rx_polarity_flip_physical{86.0}=0x0
+phy_chain_rx_polarity_flip_physical{87.0}=0x1
+phy_chain_rx_polarity_flip_physical{88.0}=0x1
+phy_chain_rx_polarity_flip_physical{89.0}=0x1
+phy_chain_rx_polarity_flip_physical{9.0}=0x0
+phy_chain_rx_polarity_flip_physical{90.0}=0x1
+phy_chain_rx_polarity_flip_physical{91.0}=0x1
+phy_chain_rx_polarity_flip_physical{92.0}=0x0
+phy_chain_rx_polarity_flip_physical{93.0}=0x0
+phy_chain_rx_polarity_flip_physical{94.0}=0x0
+phy_chain_rx_polarity_flip_physical{95.0}=0x1
+phy_chain_rx_polarity_flip_physical{96.0}=0x1
+phy_chain_rx_polarity_flip_physical{97.0}=0x1
+phy_chain_rx_polarity_flip_physical{98.0}=0x1
+phy_chain_rx_polarity_flip_physical{99.0}=0x0
+phy_chain_tx_lane_map_physical{1.0}=0x3021
+phy_chain_tx_lane_map_physical{101.0}=0x3120
+phy_chain_tx_lane_map_physical{105.0}=0x1302
+phy_chain_tx_lane_map_physical{109.0}=0x2130
+phy_chain_tx_lane_map_physical{113.0}=0x1302
+phy_chain_tx_lane_map_physical{117.0}=0x3120
+phy_chain_tx_lane_map_physical{121.0}=0x1302
+phy_chain_tx_lane_map_physical{125.0}=0x3120
+phy_chain_tx_lane_map_physical{129.0}=0x3210
+phy_chain_tx_lane_map_physical{13.0}=0x0213
+phy_chain_tx_lane_map_physical{17.0}=0x2031
+phy_chain_tx_lane_map_physical{21.0}=0x0213
+phy_chain_tx_lane_map_physical{25.0}=0x2031
+phy_chain_tx_lane_map_physical{29.0}=0x1203
+phy_chain_tx_lane_map_physical{33.0}=0x2031
+phy_chain_tx_lane_map_physical{37.0}=0x0213
+phy_chain_tx_lane_map_physical{41.0}=0x2031
+phy_chain_tx_lane_map_physical{45.0}=0x1203
+phy_chain_tx_lane_map_physical{49.0}=0x2031
+phy_chain_tx_lane_map_physical{5.0}=0x1203
+phy_chain_tx_lane_map_physical{53.0}=0x0213
+phy_chain_tx_lane_map_physical{57.0}=0x2031
+phy_chain_tx_lane_map_physical{61.0}=0x1203
+phy_chain_tx_lane_map_physical{65.0}=0x1302
+phy_chain_tx_lane_map_physical{69.0}=0x1302
+phy_chain_tx_lane_map_physical{73.0}=0x1302
+phy_chain_tx_lane_map_physical{77.0}=0x2130
+phy_chain_tx_lane_map_physical{81.0}=0x1302
+phy_chain_tx_lane_map_physical{85.0}=0x3120
+phy_chain_tx_lane_map_physical{89.0}=0x1302
+phy_chain_tx_lane_map_physical{9.0}=0x0213
+phy_chain_tx_lane_map_physical{93.0}=0x2130
+phy_chain_tx_lane_map_physical{97.0}=0x1302
+phy_chain_tx_polarity_flip_physical{1.0}=0x1
+phy_chain_tx_polarity_flip_physical{10.0}=0x1
+phy_chain_tx_polarity_flip_physical{100.0}=0x1
+phy_chain_tx_polarity_flip_physical{101.0}=0x0
+phy_chain_tx_polarity_flip_physical{102.0}=0x1
+phy_chain_tx_polarity_flip_physical{103.0}=0x1
+phy_chain_tx_polarity_flip_physical{104.0}=0x0
+phy_chain_tx_polarity_flip_physical{105.0}=0x1
+phy_chain_tx_polarity_flip_physical{106.0}=0x0
+phy_chain_tx_polarity_flip_physical{107.0}=0x0
+phy_chain_tx_polarity_flip_physical{108.0}=0x0
+phy_chain_tx_polarity_flip_physical{109.0}=0x1
+phy_chain_tx_polarity_flip_physical{11.0}=0x0
+phy_chain_tx_polarity_flip_physical{110.0}=0x1
+phy_chain_tx_polarity_flip_physical{111.0}=0x0
+phy_chain_tx_polarity_flip_physical{112.0}=0x0
+phy_chain_tx_polarity_flip_physical{113.0}=0x0
+phy_chain_tx_polarity_flip_physical{114.0}=0x0
+phy_chain_tx_polarity_flip_physical{115.0}=0x0
+phy_chain_tx_polarity_flip_physical{116.0}=0x0
+phy_chain_tx_polarity_flip_physical{117.0}=0x1
+phy_chain_tx_polarity_flip_physical{118.0}=0x1
+phy_chain_tx_polarity_flip_physical{119.0}=0x0
+phy_chain_tx_polarity_flip_physical{12.0}=0x0
+phy_chain_tx_polarity_flip_physical{120.0}=0x0
+phy_chain_tx_polarity_flip_physical{121.0}=0x1
+phy_chain_tx_polarity_flip_physical{122.0}=0x0
+phy_chain_tx_polarity_flip_physical{123.0}=0x0
+phy_chain_tx_polarity_flip_physical{124.0}=0x0
+phy_chain_tx_polarity_flip_physical{125.0}=0x1
+phy_chain_tx_polarity_flip_physical{126.0}=0x1
+phy_chain_tx_polarity_flip_physical{127.0}=0x0
+phy_chain_tx_polarity_flip_physical{128.0}=0x0
+phy_chain_tx_polarity_flip_physical{129.0}=0x0
+phy_chain_tx_polarity_flip_physical{13.0}=0x1
+phy_chain_tx_polarity_flip_physical{131.0}=0x0
+phy_chain_tx_polarity_flip_physical{14.0}=0x1
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_tx_polarity_flip_physical{16.0}=0x1
+phy_chain_tx_polarity_flip_physical{17.0}=0x0
+phy_chain_tx_polarity_flip_physical{18.0}=0x0
+phy_chain_tx_polarity_flip_physical{19.0}=0x0
+phy_chain_tx_polarity_flip_physical{2.0}=0x1
+phy_chain_tx_polarity_flip_physical{20.0}=0x0
+phy_chain_tx_polarity_flip_physical{21.0}=0x1
+phy_chain_tx_polarity_flip_physical{22.0}=0x1
+phy_chain_tx_polarity_flip_physical{23.0}=0x0
+phy_chain_tx_polarity_flip_physical{24.0}=0x0
+phy_chain_tx_polarity_flip_physical{25.0}=0x0
+phy_chain_tx_polarity_flip_physical{26.0}=0x0
+phy_chain_tx_polarity_flip_physical{27.0}=0x1
+phy_chain_tx_polarity_flip_physical{28.0}=0x0
+phy_chain_tx_polarity_flip_physical{29.0}=0x0
+phy_chain_tx_polarity_flip_physical{3.0}=0x0
+phy_chain_tx_polarity_flip_physical{30.0}=0x0
+phy_chain_tx_polarity_flip_physical{31.0}=0x1
+phy_chain_tx_polarity_flip_physical{32.0}=0x1
+phy_chain_tx_polarity_flip_physical{33.0}=0x1
+phy_chain_tx_polarity_flip_physical{34.0}=0x1
+phy_chain_tx_polarity_flip_physical{35.0}=0x1
+phy_chain_tx_polarity_flip_physical{36.0}=0x1
+phy_chain_tx_polarity_flip_physical{37.0}=0x0
+phy_chain_tx_polarity_flip_physical{38.0}=0x0
+phy_chain_tx_polarity_flip_physical{39.0}=0x1
+phy_chain_tx_polarity_flip_physical{4.0}=0x0
+phy_chain_tx_polarity_flip_physical{40.0}=0x1
+phy_chain_tx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x1
+phy_chain_tx_polarity_flip_physical{43.0}=0x1
+phy_chain_tx_polarity_flip_physical{44.0}=0x1
+phy_chain_tx_polarity_flip_physical{45.0}=0x0
+phy_chain_tx_polarity_flip_physical{46.0}=0x0
+phy_chain_tx_polarity_flip_physical{47.0}=0x1
+phy_chain_tx_polarity_flip_physical{48.0}=0x1
+phy_chain_tx_polarity_flip_physical{49.0}=0x1
+phy_chain_tx_polarity_flip_physical{5.0}=0x1
+phy_chain_tx_polarity_flip_physical{50.0}=0x1
+phy_chain_tx_polarity_flip_physical{51.0}=0x1
+phy_chain_tx_polarity_flip_physical{52.0}=0x1
+phy_chain_tx_polarity_flip_physical{53.0}=0x0
+phy_chain_tx_polarity_flip_physical{54.0}=0x0
+phy_chain_tx_polarity_flip_physical{55.0}=0x1
+phy_chain_tx_polarity_flip_physical{56.0}=0x1
+phy_chain_tx_polarity_flip_physical{57.0}=0x0
+phy_chain_tx_polarity_flip_physical{58.0}=0x1
+phy_chain_tx_polarity_flip_physical{59.0}=0x1
+phy_chain_tx_polarity_flip_physical{6.0}=0x1
+phy_chain_tx_polarity_flip_physical{60.0}=0x1
+phy_chain_tx_polarity_flip_physical{61.0}=0x0
+phy_chain_tx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x1
+phy_chain_tx_polarity_flip_physical{65.0}=0x1
+phy_chain_tx_polarity_flip_physical{66.0}=0x1
+phy_chain_tx_polarity_flip_physical{67.0}=0x1
+phy_chain_tx_polarity_flip_physical{68.0}=0x1
+phy_chain_tx_polarity_flip_physical{69.0}=0x0
+phy_chain_tx_polarity_flip_physical{7.0}=0x0
+phy_chain_tx_polarity_flip_physical{70.0}=0x1
+phy_chain_tx_polarity_flip_physical{71.0}=0x1
+phy_chain_tx_polarity_flip_physical{72.0}=0x1
+phy_chain_tx_polarity_flip_physical{73.0}=0x0
+phy_chain_tx_polarity_flip_physical{74.0}=0x1
+phy_chain_tx_polarity_flip_physical{75.0}=0x1
+phy_chain_tx_polarity_flip_physical{76.0}=0x1
+phy_chain_tx_polarity_flip_physical{77.0}=0x0
+phy_chain_tx_polarity_flip_physical{78.0}=0x0
+phy_chain_tx_polarity_flip_physical{79.0}=0x1
+phy_chain_tx_polarity_flip_physical{8.0}=0x1
+phy_chain_tx_polarity_flip_physical{80.0}=0x1
+phy_chain_tx_polarity_flip_physical{81.0}=0x1
+phy_chain_tx_polarity_flip_physical{82.0}=0x1
+phy_chain_tx_polarity_flip_physical{83.0}=0x1
+phy_chain_tx_polarity_flip_physical{84.0}=0x1
+phy_chain_tx_polarity_flip_physical{85.0}=0x0
+phy_chain_tx_polarity_flip_physical{86.0}=0x0
+phy_chain_tx_polarity_flip_physical{87.0}=0x1
+phy_chain_tx_polarity_flip_physical{88.0}=0x1
+phy_chain_tx_polarity_flip_physical{89.0}=0x0
+phy_chain_tx_polarity_flip_physical{9.0}=0x1
+phy_chain_tx_polarity_flip_physical{90.0}=0x1
+phy_chain_tx_polarity_flip_physical{91.0}=0x1
+phy_chain_tx_polarity_flip_physical{92.0}=0x1
+phy_chain_tx_polarity_flip_physical{93.0}=0x0
+phy_chain_tx_polarity_flip_physical{94.0}=0x0
+phy_chain_tx_polarity_flip_physical{95.0}=0x1
+phy_chain_tx_polarity_flip_physical{96.0}=0x1
+phy_chain_tx_polarity_flip_physical{97.0}=0x1
+phy_chain_tx_polarity_flip_physical{98.0}=0x1
+phy_chain_tx_polarity_flip_physical{99.0}=0x1
+port_flex_enable=1
+port_init_autoneg=0
+port_phy_addr=0xff
+portmap_1=1:10
+portmap_2=2:10
+portmap_3=3:10
+portmap_4=4:10
+portmap_5=5:10
+portmap_6=6:10
+portmap_7=7:10
+portmap_8=8:10
+portmap_9=9:10
+portmap_10=10:10
+portmap_11=11:10
+portmap_12=12:10
+portmap_13=13:10
+portmap_14=14:10
+portmap_15=15:10
+portmap_16=16:10
+portmap_17=17:100
+portmap_21=21:100
+portmap_25=25:100
+portmap_29=29:100
+portmap_33=33:100
+portmap_37=37:100
+portmap_41=41:100
+portmap_45=45:100
+portmap_49=49:100
+portmap_53=53:100
+portmap_57=57:100
+portmap_61=61:100
+portmap_66=129:10:m
+portmap_67=65:100
+portmap_71=69:100
+portmap_75=73:100
+portmap_79=77:100
+portmap_83=81:100
+portmap_87=85:100
+portmap_91=89:100
+portmap_95=93:100
+portmap_99=97:100
+portmap_103=101:100
+portmap_107=105:100
+portmap_111=109:100
+portmap_115=113:100
+portmap_119=117:100
+portmap_123=121:100
+portmap_127=125:100
+riot_enable=1
+riot_overlay_ecmp_resilient_hash_size=16384
+riot_overlay_l3_egress_mem_size=32768
+riot_overlay_l3_intf_mem_size=4096
+robust_hash_disable_egress_vlan=1
+robust_hash_disable_mpls=1
+robust_hash_disable_vlan=1
+sai_adjust_acl_drop_in_rx_drop=1
+sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_premium_issu/b870.6.4.1/
+sai_optimized_mmu=1
+sai_pfc_dlr_init_capability=1' -%}
+sai_tunnel_support=1
+sai_tunnel_underlay_route_mode=1
+sai_verify_incoming_chksum=0
+serdes_core_rx_polarity_flip_physical{101}=0x9
+serdes_core_rx_polarity_flip_physical{105}=0x7
+serdes_core_rx_polarity_flip_physical{109}=0xc
+serdes_core_rx_polarity_flip_physical{113}=0xb
+serdes_core_rx_polarity_flip_physical{117}=0xc
+serdes_core_rx_polarity_flip_physical{121}=0x7
+serdes_core_rx_polarity_flip_physical{125}=0xc
+serdes_core_rx_polarity_flip_physical{129}=0x0
+serdes_core_rx_polarity_flip_physical{13}=0x3
+serdes_core_rx_polarity_flip_physical{17}=0x4
+serdes_core_rx_polarity_flip_physical{1}=0x8
+serdes_core_rx_polarity_flip_physical{21}=0x3
+serdes_core_rx_polarity_flip_physical{25}=0x6
+serdes_core_rx_polarity_flip_physical{29}=0x3
+serdes_core_rx_polarity_flip_physical{33}=0x4
+serdes_core_rx_polarity_flip_physical{37}=0x3
+serdes_core_rx_polarity_flip_physical{41}=0xc
+serdes_core_rx_polarity_flip_physical{45}=0x3
+serdes_core_rx_polarity_flip_physical{49}=0x4
+serdes_core_rx_polarity_flip_physical{53}=0x3
+serdes_core_rx_polarity_flip_physical{57}=0xc
+serdes_core_rx_polarity_flip_physical{5}=0x2
+serdes_core_rx_polarity_flip_physical{61}=0x3
+serdes_core_rx_polarity_flip_physical{65}=0xb
+serdes_core_rx_polarity_flip_physical{69}=0xc
+serdes_core_rx_polarity_flip_physical{73}=0x7
+serdes_core_rx_polarity_flip_physical{77}=0xc
+serdes_core_rx_polarity_flip_physical{81}=0xb
+serdes_core_rx_polarity_flip_physical{85}=0xc
+serdes_core_rx_polarity_flip_physical{89}=0x7
+serdes_core_rx_polarity_flip_physical{93}=0xc
+serdes_core_rx_polarity_flip_physical{97}=0xb
+serdes_core_rx_polarity_flip_physical{9}=0xc
+serdes_core_tx_polarity_flip_physical{101}=0x6
+serdes_core_tx_polarity_flip_physical{105}=0x1
+serdes_core_tx_polarity_flip_physical{109}=0x3
+serdes_core_tx_polarity_flip_physical{113}=0x0
+serdes_core_tx_polarity_flip_physical{117}=0x3
+serdes_core_tx_polarity_flip_physical{121}=0x1
+serdes_core_tx_polarity_flip_physical{125}=0x3
+serdes_core_tx_polarity_flip_physical{129}=0x0
+serdes_core_tx_polarity_flip_physical{13}=0xb
+serdes_core_tx_polarity_flip_physical{17}=0x0
+serdes_core_tx_polarity_flip_physical{1}=0x3
+serdes_core_tx_polarity_flip_physical{21}=0x3
+serdes_core_tx_polarity_flip_physical{25}=0x4
+serdes_core_tx_polarity_flip_physical{29}=0xc
+serdes_core_tx_polarity_flip_physical{33}=0xf
+serdes_core_tx_polarity_flip_physical{37}=0xc
+serdes_core_tx_polarity_flip_physical{41}=0xe
+serdes_core_tx_polarity_flip_physical{45}=0xc
+serdes_core_tx_polarity_flip_physical{49}=0xf
+serdes_core_tx_polarity_flip_physical{53}=0xc
+serdes_core_tx_polarity_flip_physical{57}=0xe
+serdes_core_tx_polarity_flip_physical{5}=0xb
+serdes_core_tx_polarity_flip_physical{61}=0xc
+serdes_core_tx_polarity_flip_physical{65}=0xf
+serdes_core_tx_polarity_flip_physical{69}=0xe
+serdes_core_tx_polarity_flip_physical{73}=0xe
+serdes_core_tx_polarity_flip_physical{77}=0xc
+serdes_core_tx_polarity_flip_physical{81}=0xf
+serdes_core_tx_polarity_flip_physical{85}=0xc
+serdes_core_tx_polarity_flip_physical{89}=0xe
+serdes_core_tx_polarity_flip_physical{93}=0xc
+serdes_core_tx_polarity_flip_physical{97}=0xf
+serdes_core_tx_polarity_flip_physical{9}=0x3
+stable_size=0x5500000
+tdma_timeout_usec=15000000
+tslam_timeout_usec=15000000
+use_all_splithorizon_groups=1
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/port_config.ini b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/port_config.ini
new file mode 100644
index 00000000000..817b0b653ca
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/port_config.ini
@@ -0,0 +1,46 @@
+# name          lanes             alias         index  speed
+Ethernet0       1                 Ethernet1/1   1      10000
+Ethernet1       2                 Ethernet1/2   1      10000
+Ethernet2       3                 Ethernet1/3   1      10000
+Ethernet3       4                 Ethernet1/4   1      10000
+Ethernet4       5                 Ethernet2/1   2      10000
+Ethernet5       6                 Ethernet2/2   2      10000
+Ethernet6       7                 Ethernet2/3   2      10000
+Ethernet7       8                 Ethernet2/4   2      10000
+Ethernet8       9                 Ethernet3/1   3      10000
+Ethernet9       10                Ethernet3/2   3      10000
+Ethernet10      11                Ethernet3/3   3      10000
+Ethernet11      12                Ethernet3/4   3      10000
+Ethernet12      13                Ethernet4/1   4      10000
+Ethernet13      14                Ethernet4/2   4      10000
+Ethernet14      15                Ethernet4/3   4      10000
+Ethernet15      16                Ethernet4/4   4      10000
+Ethernet16      21,22,23,24       Ethernet5/1    5     100000
+Ethernet20      17,18,19,20       Ethernet6/1    6     100000
+Ethernet24      25,26,27,28       Ethernet7/1    7     100000
+Ethernet28      29,30,31,32       Ethernet8/1    8     100000
+Ethernet32      37,38,39,40       Ethernet9/1    9     100000
+Ethernet36      33,34,35,36       Ethernet10/1  10     100000
+Ethernet40      41,42,43,44       Ethernet11/1  11     100000
+Ethernet44      45,46,47,48       Ethernet12/1  12     100000
+Ethernet48      53,54,55,56       Ethernet13/1  13     100000
+Ethernet52      49,50,51,52       Ethernet14/1  14     100000
+Ethernet56      57,58,59,60       Ethernet15/1  15     100000
+Ethernet60      61,62,63,64       Ethernet16/1  16     100000
+Ethernet64      69,70,71,72       Ethernet17/1  17     100000
+Ethernet68      65,66,67,68       Ethernet18/1  18     100000
+Ethernet72      73,74,75,76       Ethernet19/1  19     100000
+Ethernet76      77,78,79,80       Ethernet20/1  20     100000
+Ethernet80      85,86,87,88       Ethernet21/1  21     100000
+Ethernet84      81,82,83,84       Ethernet22/1  22     100000
+Ethernet88      89,90,91,92       Ethernet23/1  23     100000
+Ethernet92      93,94,95,96       Ethernet24/1  24     100000
+Ethernet96      101,102,103,104   Ethernet25/1  25     100000
+Ethernet100     97,98,99,100      Ethernet26/1  26     100000
+Ethernet104     105,106,107,108   Ethernet27/1  27     100000
+Ethernet108     109,110,111,112   Ethernet28/1  28     100000
+Ethernet112     117,118,119,120   Ethernet29/1  29     100000
+Ethernet116     113,114,115,116   Ethernet30/1  30     100000
+Ethernet120     121,122,123,124   Ethernet31/1  31     100000
+Ethernet124     125,126,127,128   Ethernet32/1  32     100000
+Ethernet128     129               Ethernet33    33     10000
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/sai.profile b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/sai.profile
new file mode 100644
index 00000000000..5163d6140f0
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/etc/sai.d/config.bcm
+SAI_NUM_ECMP_MEMBERS=64
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/buffers_defaults_t0.j2
new file mode 100644
index 00000000000..ba3e498830e
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/buffers_defaults_t0.j2
@@ -0,0 +1,59 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0,32) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
+
+{%- set ingress_lossless_pool_size = '32689152' %}
+{%- set egress_lossless_pool_size = '32340992' %}
+{%- if (DEVICE_METADATA is defined) and ('localhost' in DEVICE_METADATA) and ('subtype' in DEVICE_METADATA['localhost']) and (DEVICE_METADATA['localhost']['subtype'] == 'DualToR') %}
+    {%- set ingress_lossless_pool_size = '32441856' %}
+    {%- set egress_lossless_pool_size = '32441856' %}
+{%- endif %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "{{ingress_lossless_pool_size }}",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "2058240"
+        },
+        "egress_lossy_pool": {
+            "size": "24192256",
+            "type": "egress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "{{egress_lossless_pool_size }}",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "static_th":"{{ingress_lossless_pool_size }}"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "static_th":"{{egress_lossless_pool_size }}"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossy_pool",
+            "size":"1792",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
+
+{% import 'buffers_extra_queues.j2' as defs with context %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues(port_names, port_names_require_extra_buffer) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names, port_names_require_extra_buffer) }}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..eb1dc510e91
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/buffers_defaults_t1.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0,32) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "32712448",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "1622016"
+        },
+        "egress_lossy_pool": {
+            "size": "24709632",
+            "type": "egress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "32599040",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "static_th":"32712448"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "static_th":"32599040"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossy_pool",
+            "size":"1792",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/pg_profile_lookup.ini b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/pg_profile_lookup.ini
new file mode 100644
index 00000000000..aaca1b9a4cf
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/pg_profile_lookup.ini
@@ -0,0 +1,11 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
+  10000  5m   4608    4608 160000   0        4608
+  50000  5m   4608    4608 160000   0        4608
+ 100000  5m   4608    4608 160000   0        4608
+  10000  40m  4608    4608 160000   0        4608
+  50000  40m  4608    4608 160000   0        4608
+ 100000  40m  4608    4608 160000   0        4608
+  10000  300m 4608    4608 160000   0        4608
+  50000  300m 4608    4608 160000   0        4608
+ 100000  300m 4608    4608 160000   0        4608
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/qos.json.j2 b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/qos.json.j2
new file mode 100644
index 00000000000..74059a27d24
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/BALANCED/qos.json.j2
@@ -0,0 +1,285 @@
+{% if 'subtype' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['subtype'] == 'DualToR' %}
+{% set different_dscp_to_tc_map = true %}
+{% set different_tc_to_queue_map = true %}
+{%- macro generate_dscp_to_tc_map() %}
+    "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "1",
+            "1" : "1",
+            "2" : "1",
+            "3" : "3",
+            "4" : "4",
+            "5" : "1",
+            "6" : "1",
+            "7" : "1",
+            "8" : "0",
+            "9" : "1",
+            "10": "1",
+            "11": "1",
+            "12": "1",
+            "13": "1",
+            "14": "1",
+            "15": "1",
+            "16": "1",
+            "17": "1",
+            "18": "1",
+            "19": "1",
+            "20": "1",
+            "21": "1",
+            "22": "1",
+            "23": "1",
+            "24": "1",
+            "25": "1",
+            "26": "1",
+            "27": "1",
+            "28": "1",
+            "29": "1",
+            "30": "1",
+            "31": "1",
+            "32": "1",
+            "33": "8",
+            "34": "1",
+            "35": "1",
+            "36": "1",
+            "37": "1",
+            "38": "1",
+            "39": "1",
+            "40": "1",
+            "41": "1",
+            "42": "1",
+            "43": "1",
+            "44": "1",
+            "45": "1",
+            "46": "5",
+            "47": "1",
+            "48": "7",
+            "49": "1",
+            "50": "1",
+            "51": "1",
+            "52": "1",
+            "53": "1",
+            "54": "1",
+            "55": "1",
+            "56": "1",
+            "57": "1",
+            "58": "1",
+            "59": "1",
+            "60": "1",
+            "61": "1",
+            "62": "1",
+            "63": "1"
+        },
+        "AZURE_UPLINK": {
+            "0" : "1",
+            "1" : "1",
+            "2" : "2",
+            "3" : "3",
+            "4" : "4",
+            "5" : "1",
+            "6" : "6",
+            "7" : "1",
+            "8" : "0",
+            "9" : "1",
+            "10": "1",
+            "11": "1",
+            "12": "1",
+            "13": "1",
+            "14": "1",
+            "15": "1",
+            "16": "1",
+            "17": "1",
+            "18": "1",
+            "19": "1",
+            "20": "1",
+            "21": "1",
+            "22": "1",
+            "23": "1",
+            "24": "1",
+            "25": "1",
+            "26": "1",
+            "27": "1",
+            "28": "1",
+            "29": "1",
+            "30": "1",
+            "31": "1",
+            "32": "1",
+            "33": "8",
+            "34": "1",
+            "35": "1",
+            "36": "1",
+            "37": "1",
+            "38": "1",
+            "39": "1",
+            "40": "1",
+            "41": "1",
+            "42": "1",
+            "43": "1",
+            "44": "1",
+            "45": "1",
+            "46": "5",
+            "47": "1",
+            "48": "7",
+            "49": "1",
+            "50": "1",
+            "51": "1",
+            "52": "1",
+            "53": "1",
+            "54": "1",
+            "55": "1",
+            "56": "1",
+            "57": "1",
+            "58": "1",
+            "59": "1",
+            "60": "1",
+            "61": "1",
+            "62": "1",
+            "63": "1"
+        },
+        "AZURE_TUNNEL": {
+            "0" : "1",
+            "1" : "1",
+            "2" : "1",
+            "3" : "3",
+            "4" : "4",
+            "5" : "1",
+            "6" : "1",
+            "7" : "1",
+            "8" : "0",
+            "9" : "1",
+            "10": "1",
+            "11": "1",
+            "12": "1",
+            "13": "1",
+            "14": "1",
+            "15": "1",
+            "16": "1",
+            "17": "1",
+            "18": "1",
+            "19": "1",
+            "20": "1",
+            "21": "1",
+            "22": "1",
+            "23": "1",
+            "24": "1",
+            "25": "1",
+            "26": "1",
+            "27": "1",
+            "28": "1",
+            "29": "1",
+            "30": "1",
+            "31": "1",
+            "32": "1",
+            "33": "8",
+            "34": "1",
+            "35": "1",
+            "36": "1",
+            "37": "1",
+            "38": "1",
+            "39": "1",
+            "40": "1",
+            "41": "1",
+            "42": "1",
+            "43": "1",
+            "44": "1",
+            "45": "1",
+            "46": "5",
+            "47": "1",
+            "48": "7",
+            "49": "1",
+            "50": "1",
+            "51": "1",
+            "52": "1",
+            "53": "1",
+            "54": "1",
+            "55": "1",
+            "56": "1",
+            "57": "1",
+            "58": "1",
+            "59": "1",
+            "60": "1",
+            "61": "1",
+            "62": "1",
+            "63": "1"
+        }
+    },
+{%- endmacro %}
+{%- macro generate_tc_to_pg_map() %}
+    "TC_TO_PRIORITY_GROUP_MAP": {
+        "AZURE": {
+            "0": "0",
+            "1": "0",
+            "2": "2",
+            "3": "3",
+            "4": "4",
+            "5": "0",
+            "6": "6",
+            "7": "0",
+            "8": "0"
+        },
+        "AZURE_TUNNEL": {
+            "0": "0",
+            "1": "0",
+            "2": "0",
+            "3": "2",
+            "4": "6",
+            "5": "0",
+            "6": "0",
+            "7": "0",
+            "8": "0"
+        }
+    },
+{%- endmacro %}
+{%- macro generate_tc_to_queue_map() %}
+    "TC_TO_QUEUE_MAP": {
+        "AZURE": {
+            "0": "0",
+            "1": "1",
+            "2": "1",
+            "3": "3",
+            "4": "4",
+            "5": "5",
+            "6": "1",
+            "7": "7",
+            "8": "1"
+        },
+        "AZURE_UPLINK": {
+            "0": "0",
+            "1": "1",
+            "2": "2",
+            "3": "3",
+            "4": "4",
+            "5": "5",
+            "6": "6",
+            "7": "7",
+            "8": "1"
+        },
+        "AZURE_TUNNEL": {
+            "0": "0",
+            "1": "1",
+            "2": "1",
+            "3": "2",
+            "4": "6",
+            "5": "5",
+            "6": "1",
+            "7": "7",
+            "8": "1"
+        }
+    },
+{%- endmacro %}
+{%- macro generate_tc_to_dscp_map() %}
+    "TC_TO_DSCP_MAP": {
+        "AZURE_TUNNEL": {
+            "0": "8",
+            "1": "0",
+            "2": "0",
+            "3": "2",
+            "4": "6",
+            "5": "46",
+            "6": "0",
+            "7": "48",
+            "8": "33"
+        }
+    },
+{%- endmacro %}
+{% endif %}
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/RDMA-CENTRIC b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/RDMA-CENTRIC
new file mode 120000
index 00000000000..d6f7127aa74
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/RDMA-CENTRIC
@@ -0,0 +1 @@
+BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/TCP-CENTRIC b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/TCP-CENTRIC
new file mode 120000
index 00000000000..d6f7127aa74
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/TCP-CENTRIC
@@ -0,0 +1 @@
+BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers.json.j2 b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers.json.j2
new file mode 100644
index 00000000000..1083a6210fc
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't0' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers_defaults_t0.j2
new file mode 120000
index 00000000000..9524e6a476a
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers_defaults_t1.j2
new file mode 120000
index 00000000000..c25cc95d6d5
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers_extra_queues.j2 b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers_extra_queues.j2
new file mode 120000
index 00000000000..2c4dff993ce
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/buffers_extra_queues.j2
@@ -0,0 +1 @@
+../Arista-7050CX3-32S-D48C8/buffers_extra_queues.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/pg_profile_lookup.ini b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/pg_profile_lookup.ini
new file mode 120000
index 00000000000..297cddb2d22
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/qos.json.j2 b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/qos.json.j2
new file mode 120000
index 00000000000..aef6b6765cf
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S4/qos.json.j2
@@ -0,0 +1 @@
+BALANCED/qos.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/port_config.ini b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/port_config.ini
new file mode 100644
index 00000000000..9731a3a6be6
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/port_config.ini
@@ -0,0 +1,112 @@
+# name          lanes             alias         index  speed
+Ethernet0       1                 Ethernet1/1   1      10000
+Ethernet1       2                 Ethernet1/2   1      10000
+Ethernet2       3                 Ethernet1/3   1      10000
+Ethernet3       4                 Ethernet1/4   1      10000
+Ethernet4       5                 Ethernet2/1   2      10000
+Ethernet5       6                 Ethernet2/2   2      10000
+Ethernet6       7                 Ethernet2/3   2      10000
+Ethernet7       8                 Ethernet2/4   2      10000
+Ethernet8       9                 Ethernet3/1   3      10000
+Ethernet9       10                Ethernet3/2   3      10000
+Ethernet10      11                Ethernet3/3   3      10000
+Ethernet11      12                Ethernet3/4   3      10000
+Ethernet12      13                Ethernet4/1   4      10000
+Ethernet13      14                Ethernet4/2   4      10000
+Ethernet14      15                Ethernet4/3   4      10000
+Ethernet15      16                Ethernet4/4   4      10000
+Ethernet16      21                Ethernet5/1   5      10000
+Ethernet17      22                Ethernet5/2   5      10000
+Ethernet18      23                Ethernet5/3   5      10000
+Ethernet19      24                Ethernet5/4   5      10000
+Ethernet20      17                Ethernet6/1   6      10000
+Ethernet21      18                Ethernet6/2   6      10000
+Ethernet22      19                Ethernet6/3   6      10000
+Ethernet23      20                Ethernet6/4   6      10000
+Ethernet24      25                Ethernet7/1   7      10000
+Ethernet25      26                Ethernet7/2   7      10000
+Ethernet26      27                Ethernet7/3   7      10000
+Ethernet27      28                Ethernet7/4   7      10000
+Ethernet28      29                Ethernet8/1   8      10000
+Ethernet29      30                Ethernet8/2   8      10000
+Ethernet30      31                Ethernet8/3   8      10000
+Ethernet31      32                Ethernet8/4   8      10000
+Ethernet32      37                Ethernet9/1   9      10000
+Ethernet33      38                Ethernet9/2   9      10000
+Ethernet34      39                Ethernet9/3   9      10000
+Ethernet35      40                Ethernet9/4   9      10000
+Ethernet36      33                Ethernet10/1  10     10000
+Ethernet37      34                Ethernet10/2  10     10000
+Ethernet38      35                Ethernet10/3  10     10000
+Ethernet39      36                Ethernet10/4  10     10000
+Ethernet40      41                Ethernet11/1  11     10000
+Ethernet41      42                Ethernet11/2  11     10000
+Ethernet42      43                Ethernet11/3  11     10000
+Ethernet43      44                Ethernet11/4  11     10000
+Ethernet44      45                Ethernet12/1  12     10000
+Ethernet45      46                Ethernet12/2  12     10000
+Ethernet46      47                Ethernet12/3  12     10000
+Ethernet47      48                Ethernet12/4  12     10000
+Ethernet48      53                Ethernet13/1  13     10000
+Ethernet49      54                Ethernet13/2  13     10000
+Ethernet50      55                Ethernet13/3  13     10000
+Ethernet51      56                Ethernet13/4  13     10000
+Ethernet52      49                Ethernet14/1  14     10000
+Ethernet53      50                Ethernet14/2  14     10000
+Ethernet54      51                Ethernet14/3  14     10000
+Ethernet55      52                Ethernet14/4  14     10000
+Ethernet56      57                Ethernet15/1  15     10000
+Ethernet57      58                Ethernet15/2  15     10000
+Ethernet58      59                Ethernet15/3  15     10000
+Ethernet59      60                Ethernet15/4  15     10000
+Ethernet60      61                Ethernet16/1  16     10000
+Ethernet61      62                Ethernet16/2  16     10000
+Ethernet62      63                Ethernet16/3  16     10000
+Ethernet63      64                Ethernet16/4  16     10000
+Ethernet64      69                Ethernet17/1  17     10000
+Ethernet65      70                Ethernet17/2  17     10000
+Ethernet66      71                Ethernet17/3  17     10000
+Ethernet67      72                Ethernet17/4  17     10000
+Ethernet68      65                Ethernet18/1  18     10000
+Ethernet69      66                Ethernet18/2  18     10000
+Ethernet70      67                Ethernet18/3  18     10000
+Ethernet71      68                Ethernet18/4  18     10000
+Ethernet72      73                Ethernet19/1  19     10000
+Ethernet73      74                Ethernet19/2  19     10000
+Ethernet74      75                Ethernet19/3  19     10000
+Ethernet75      76                Ethernet19/4  19     10000
+Ethernet76      77                Ethernet20/1  20     10000
+Ethernet77      78                Ethernet20/2  20     10000
+Ethernet78      79                Ethernet20/3  20     10000
+Ethernet79      80                Ethernet20/4  20     10000
+Ethernet80      85                Ethernet21/1  21     10000
+Ethernet81      86                Ethernet21/2  21     10000
+Ethernet82      87                Ethernet21/3  21     10000
+Ethernet83      88                Ethernet21/4  21     10000
+Ethernet84      81                Ethernet22/1  22     10000
+Ethernet85      82                Ethernet22/2  22     10000
+Ethernet86      83                Ethernet22/3  22     10000
+Ethernet87      84                Ethernet22/4  22     10000
+Ethernet88      89                Ethernet23/1  23     10000
+Ethernet89      90                Ethernet23/2  23     10000
+Ethernet90      91                Ethernet23/3  23     10000
+Ethernet91      92                Ethernet23/4  23     10000
+Ethernet92      93                Ethernet24/1  24     10000
+Ethernet93      94                Ethernet24/2  24     10000
+Ethernet94      95                Ethernet24/3  24     10000
+Ethernet95      96                Ethernet24/4  24     10000
+Ethernet96      101               Ethernet25/1  25     10000
+Ethernet97      102               Ethernet25/2  25     10000
+Ethernet98      103               Ethernet25/3  25     10000
+Ethernet99      104               Ethernet25/4  25     10000
+Ethernet100     97                Ethernet26/1  26     10000
+Ethernet101     98                Ethernet26/2  26     10000
+Ethernet102     99                Ethernet26/3  26     10000
+Ethernet103     100               Ethernet26/4  26     10000
+Ethernet104     105,106,107,108   Ethernet27/1  27     100000
+Ethernet108     109,110,111,112   Ethernet28/1  28     100000
+Ethernet112     117,118,119,120   Ethernet29/1  29     100000
+Ethernet116     113,114,115,116   Ethernet30/1  30     100000
+Ethernet120     121,122,123,124   Ethernet31/1  31     100000
+Ethernet124     125,126,127,128   Ethernet32/1  32     100000
+Ethernet128     129               Ethernet33    33     10000
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/sai.profile b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/sai.profile
new file mode 100644
index 00000000000..68296cf1b7d
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-a7050cx3-32s-6x100g-104x10g.config.bcm
+SAI_NUM_ECMP_MEMBERS=64
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/td3-a7050cx3-32s-6x100g-104x10g.config.bcm b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/td3-a7050cx3-32s-6x100g-104x10g.config.bcm
new file mode 100644
index 00000000000..723118472fc
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/td3-a7050cx3-32s-6x100g-104x10g.config.bcm
@@ -0,0 +1,673 @@
+PHY_AN_ALLOW_PLL_CHANGE=1
+arl_clean_timeout_usec=15000000
+asf_mem_profile=2
+bcm_num_cos=10
+bcm_stat_flags=1
+bcm_stat_jumbo=9236
+bcm_tunnel_term_compatible_mode=1
+cdma_timeout_usec=15000000
+core_clock_frequency=1525
+disable_pcie_firmware_check=1
+dma_desc_timeout_usec=15000000
+dpp_clock_ratio=2:3
+flow_init_mode=1
+fpem_mem_entries=0
+higig2_hdr_mode=1
+host_as_route_disable=1
+ifp_inports_support_enable=1
+ipv6_lpm_128b_enable=1
+l2xmsg_mode=1
+l2_mem_entries=32768
+l3_alpm_enable=2
+l3_alpm_hit_skip=1
+l3_ecmp_levels=2
+l3_max_ecmp_mode=1
+l3_mem_entries=16384
+max_vp_lags=0
+miim_intr_enable=0
+module_64ports=1
+multicast_l2_range=16383
+multicast_l3_range=0
+os=unix
+oversubscribe_mode=1
+pbmp_xport_xe=0x7ffffffffffffffffffffffffffffffffe
+pfc_deadlock_seq_control=1
+#phy_an_c37_66=2
+#phy_an_c37_130=2
+phy_an_c73=1
+phy_an_lt_msft=1
+riot_enable=1
+riot_overlay_ecmp_resilient_hash_size=16384
+riot_overlay_l3_egress_mem_size=32768
+riot_overlay_l3_intf_mem_size=4096
+robust_hash_disable_egress_vlan=1
+robust_hash_disable_mpls=1
+robust_hash_disable_vlan=1
+sai_adjust_acl_drop_in_rx_drop=1
+sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_premium_issu/b870.6.4.1/
+sai_optimized_mmu=1
+sai_pfc_dlr_init_capability=1' -%}
+sai_tunnel_support=1
+sai_tunnel_underlay_route_mode=1
+sai_verify_incoming_chksum=0
+port_flex_enable=1
+port_init_autoneg=0
+port_phy_addr=0xff
+stable_size=0x5500000
+tdma_timeout_usec=15000000
+tslam_timeout_usec=15000000
+use_all_splithorizon_groups=1
+hybrid_pfc_deadlock_enable=1
+phy_chain_rx_lane_map_physical{1.0}=0x1302
+phy_chain_rx_lane_map_physical{5.0}=0x3120
+phy_chain_rx_lane_map_physical{9.0}=0x3120
+phy_chain_rx_lane_map_physical{13.0}=0x3120
+phy_chain_rx_lane_map_physical{17.0}=0x1203
+phy_chain_rx_lane_map_physical{21.0}=0x3120
+phy_chain_rx_lane_map_physical{25.0}=0x3120
+phy_chain_rx_lane_map_physical{29.0}=0x3120
+phy_chain_rx_lane_map_physical{33.0}=0x1203
+phy_chain_rx_lane_map_physical{37.0}=0x3120
+phy_chain_rx_lane_map_physical{41.0}=0x3120
+phy_chain_rx_lane_map_physical{45.0}=0x3120
+phy_chain_rx_lane_map_physical{49.0}=0x1203
+phy_chain_rx_lane_map_physical{53.0}=0x3120
+phy_chain_rx_lane_map_physical{57.0}=0x3120
+phy_chain_rx_lane_map_physical{61.0}=0x3120
+phy_chain_rx_lane_map_physical{65.0}=0x2130
+phy_chain_rx_lane_map_physical{69.0}=0x0213
+phy_chain_rx_lane_map_physical{73.0}=0x2031
+phy_chain_rx_lane_map_physical{77.0}=0x0213
+phy_chain_rx_lane_map_physical{81.0}=0x2130
+phy_chain_rx_lane_map_physical{85.0}=0x0213
+phy_chain_rx_lane_map_physical{89.0}=0x2031
+phy_chain_rx_lane_map_physical{93.0}=0x0213
+phy_chain_rx_lane_map_physical{97.0}=0x2130
+phy_chain_rx_lane_map_physical{101.0}=0x0213
+phy_chain_rx_lane_map_physical{105.0}=0x2031
+phy_chain_rx_lane_map_physical{109.0}=0x0213
+phy_chain_rx_lane_map_physical{113.0}=0x2130
+phy_chain_rx_lane_map_physical{117.0}=0x0213
+phy_chain_rx_lane_map_physical{121.0}=0x2031
+phy_chain_rx_lane_map_physical{125.0}=0x0213
+phy_chain_rx_lane_map_physical{129.0}=0x3210
+phy_chain_rx_polarity_flip_physical{1.0}=0x0
+phy_chain_rx_polarity_flip_physical{2.0}=0x0
+phy_chain_rx_polarity_flip_physical{3.0}=0x0
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+phy_chain_rx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{6.0}=0x1
+phy_chain_rx_polarity_flip_physical{7.0}=0x0
+phy_chain_rx_polarity_flip_physical{8.0}=0x0
+phy_chain_rx_polarity_flip_physical{9.0}=0x0
+phy_chain_rx_polarity_flip_physical{10.0}=0x0
+phy_chain_rx_polarity_flip_physical{11.0}=0x1
+phy_chain_rx_polarity_flip_physical{12.0}=0x1
+phy_chain_rx_polarity_flip_physical{13.0}=0x1
+phy_chain_rx_polarity_flip_physical{14.0}=0x1
+phy_chain_rx_polarity_flip_physical{15.0}=0x0
+phy_chain_rx_polarity_flip_physical{16.0}=0x0
+phy_chain_rx_polarity_flip_physical{17.0}=0x0
+phy_chain_rx_polarity_flip_physical{18.0}=0x0
+phy_chain_rx_polarity_flip_physical{19.0}=0x1
+phy_chain_rx_polarity_flip_physical{20.0}=0x0
+phy_chain_rx_polarity_flip_physical{21.0}=0x1
+phy_chain_rx_polarity_flip_physical{22.0}=0x1
+phy_chain_rx_polarity_flip_physical{23.0}=0x0
+phy_chain_rx_polarity_flip_physical{24.0}=0x0
+phy_chain_rx_polarity_flip_physical{25.0}=0x0
+phy_chain_rx_polarity_flip_physical{26.0}=0x1
+phy_chain_rx_polarity_flip_physical{27.0}=0x1
+phy_chain_rx_polarity_flip_physical{28.0}=0x0
+phy_chain_rx_polarity_flip_physical{29.0}=0x1
+phy_chain_rx_polarity_flip_physical{30.0}=0x1
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x0
+phy_chain_rx_polarity_flip_physical{33.0}=0x0
+phy_chain_rx_polarity_flip_physical{34.0}=0x0
+phy_chain_rx_polarity_flip_physical{35.0}=0x1
+phy_chain_rx_polarity_flip_physical{36.0}=0x0
+phy_chain_rx_polarity_flip_physical{37.0}=0x1
+phy_chain_rx_polarity_flip_physical{38.0}=0x1
+phy_chain_rx_polarity_flip_physical{39.0}=0x0
+phy_chain_rx_polarity_flip_physical{40.0}=0x0
+phy_chain_rx_polarity_flip_physical{41.0}=0x0
+phy_chain_rx_polarity_flip_physical{42.0}=0x0
+phy_chain_rx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{44.0}=0x1
+phy_chain_rx_polarity_flip_physical{45.0}=0x1
+phy_chain_rx_polarity_flip_physical{46.0}=0x1
+phy_chain_rx_polarity_flip_physical{47.0}=0x0
+phy_chain_rx_polarity_flip_physical{48.0}=0x0
+phy_chain_rx_polarity_flip_physical{49.0}=0x0
+phy_chain_rx_polarity_flip_physical{50.0}=0x0
+phy_chain_rx_polarity_flip_physical{51.0}=0x1
+phy_chain_rx_polarity_flip_physical{52.0}=0x0
+phy_chain_rx_polarity_flip_physical{53.0}=0x1
+phy_chain_rx_polarity_flip_physical{54.0}=0x1
+phy_chain_rx_polarity_flip_physical{55.0}=0x0
+phy_chain_rx_polarity_flip_physical{56.0}=0x0
+phy_chain_rx_polarity_flip_physical{57.0}=0x0
+phy_chain_rx_polarity_flip_physical{58.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x1
+phy_chain_rx_polarity_flip_physical{60.0}=0x1
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_rx_polarity_flip_physical{62.0}=0x1
+phy_chain_rx_polarity_flip_physical{63.0}=0x0
+phy_chain_rx_polarity_flip_physical{64.0}=0x0
+phy_chain_rx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{66.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x0
+phy_chain_rx_polarity_flip_physical{68.0}=0x1
+phy_chain_rx_polarity_flip_physical{69.0}=0x0
+phy_chain_rx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{71.0}=0x1
+phy_chain_rx_polarity_flip_physical{72.0}=0x1
+phy_chain_rx_polarity_flip_physical{73.0}=0x1
+phy_chain_rx_polarity_flip_physical{74.0}=0x1
+phy_chain_rx_polarity_flip_physical{75.0}=0x1
+phy_chain_rx_polarity_flip_physical{76.0}=0x0
+phy_chain_rx_polarity_flip_physical{77.0}=0x0
+phy_chain_rx_polarity_flip_physical{78.0}=0x0
+phy_chain_rx_polarity_flip_physical{79.0}=0x1
+phy_chain_rx_polarity_flip_physical{80.0}=0x1
+phy_chain_rx_polarity_flip_physical{81.0}=0x1
+phy_chain_rx_polarity_flip_physical{82.0}=0x1
+phy_chain_rx_polarity_flip_physical{83.0}=0x0
+phy_chain_rx_polarity_flip_physical{84.0}=0x1
+phy_chain_rx_polarity_flip_physical{85.0}=0x0
+phy_chain_rx_polarity_flip_physical{86.0}=0x0
+phy_chain_rx_polarity_flip_physical{87.0}=0x1
+phy_chain_rx_polarity_flip_physical{88.0}=0x1
+phy_chain_rx_polarity_flip_physical{89.0}=0x1
+phy_chain_rx_polarity_flip_physical{90.0}=0x1
+phy_chain_rx_polarity_flip_physical{91.0}=0x1
+phy_chain_rx_polarity_flip_physical{92.0}=0x0
+phy_chain_rx_polarity_flip_physical{93.0}=0x0
+phy_chain_rx_polarity_flip_physical{94.0}=0x0
+phy_chain_rx_polarity_flip_physical{95.0}=0x1
+phy_chain_rx_polarity_flip_physical{96.0}=0x1
+phy_chain_rx_polarity_flip_physical{97.0}=0x1
+phy_chain_rx_polarity_flip_physical{98.0}=0x1
+phy_chain_rx_polarity_flip_physical{99.0}=0x0
+phy_chain_rx_polarity_flip_physical{100.0}=0x1
+phy_chain_rx_polarity_flip_physical{101.0}=0x1
+phy_chain_rx_polarity_flip_physical{102.0}=0x0
+phy_chain_rx_polarity_flip_physical{103.0}=0x0
+phy_chain_rx_polarity_flip_physical{104.0}=0x1
+phy_chain_rx_polarity_flip_physical{105.0}=0x1
+phy_chain_rx_polarity_flip_physical{106.0}=0x1
+phy_chain_rx_polarity_flip_physical{107.0}=0x1
+phy_chain_rx_polarity_flip_physical{108.0}=0x0
+phy_chain_rx_polarity_flip_physical{109.0}=0x0
+phy_chain_rx_polarity_flip_physical{110.0}=0x0
+phy_chain_rx_polarity_flip_physical{111.0}=0x1
+phy_chain_rx_polarity_flip_physical{112.0}=0x1
+phy_chain_rx_polarity_flip_physical{113.0}=0x1
+phy_chain_rx_polarity_flip_physical{114.0}=0x1
+phy_chain_rx_polarity_flip_physical{115.0}=0x0
+phy_chain_rx_polarity_flip_physical{116.0}=0x1
+phy_chain_rx_polarity_flip_physical{117.0}=0x0
+phy_chain_rx_polarity_flip_physical{118.0}=0x0
+phy_chain_rx_polarity_flip_physical{119.0}=0x1
+phy_chain_rx_polarity_flip_physical{120.0}=0x1
+phy_chain_rx_polarity_flip_physical{121.0}=0x1
+phy_chain_rx_polarity_flip_physical{122.0}=0x1
+phy_chain_rx_polarity_flip_physical{123.0}=0x1
+phy_chain_rx_polarity_flip_physical{124.0}=0x0
+phy_chain_rx_polarity_flip_physical{125.0}=0x0
+phy_chain_rx_polarity_flip_physical{126.0}=0x0
+phy_chain_rx_polarity_flip_physical{127.0}=0x1
+phy_chain_rx_polarity_flip_physical{128.0}=0x1
+phy_chain_rx_polarity_flip_physical{129.0}=0x0
+phy_chain_tx_lane_map_physical{1.0}=0x3021
+phy_chain_tx_lane_map_physical{5.0}=0x1203
+phy_chain_tx_lane_map_physical{9.0}=0x0213
+phy_chain_tx_lane_map_physical{13.0}=0x0213
+phy_chain_tx_lane_map_physical{17.0}=0x2031
+phy_chain_tx_lane_map_physical{21.0}=0x0213
+phy_chain_tx_lane_map_physical{25.0}=0x2031
+phy_chain_tx_lane_map_physical{29.0}=0x1203
+phy_chain_tx_lane_map_physical{33.0}=0x2031
+phy_chain_tx_lane_map_physical{37.0}=0x0213
+phy_chain_tx_lane_map_physical{41.0}=0x2031
+phy_chain_tx_lane_map_physical{45.0}=0x1203
+phy_chain_tx_lane_map_physical{49.0}=0x2031
+phy_chain_tx_lane_map_physical{53.0}=0x0213
+phy_chain_tx_lane_map_physical{57.0}=0x2031
+phy_chain_tx_lane_map_physical{61.0}=0x1203
+phy_chain_tx_lane_map_physical{65.0}=0x1302
+phy_chain_tx_lane_map_physical{69.0}=0x1302
+phy_chain_tx_lane_map_physical{73.0}=0x1302
+phy_chain_tx_lane_map_physical{77.0}=0x2130
+phy_chain_tx_lane_map_physical{81.0}=0x1302
+phy_chain_tx_lane_map_physical{85.0}=0x3120
+phy_chain_tx_lane_map_physical{89.0}=0x1302
+phy_chain_tx_lane_map_physical{93.0}=0x2130
+phy_chain_tx_lane_map_physical{97.0}=0x1302
+phy_chain_tx_lane_map_physical{101.0}=0x3120
+phy_chain_tx_lane_map_physical{105.0}=0x1302
+phy_chain_tx_lane_map_physical{109.0}=0x2130
+phy_chain_tx_lane_map_physical{113.0}=0x1302
+phy_chain_tx_lane_map_physical{117.0}=0x3120
+phy_chain_tx_lane_map_physical{121.0}=0x1302
+phy_chain_tx_lane_map_physical{125.0}=0x3120
+phy_chain_tx_lane_map_physical{129.0}=0x3210
+phy_chain_tx_polarity_flip_physical{1.0}=0x1
+phy_chain_tx_polarity_flip_physical{2.0}=0x1
+phy_chain_tx_polarity_flip_physical{3.0}=0x0
+phy_chain_tx_polarity_flip_physical{4.0}=0x0
+phy_chain_tx_polarity_flip_physical{5.0}=0x1
+phy_chain_tx_polarity_flip_physical{6.0}=0x1
+phy_chain_tx_polarity_flip_physical{7.0}=0x0
+phy_chain_tx_polarity_flip_physical{8.0}=0x1
+phy_chain_tx_polarity_flip_physical{9.0}=0x1
+phy_chain_tx_polarity_flip_physical{10.0}=0x1
+phy_chain_tx_polarity_flip_physical{11.0}=0x0
+phy_chain_tx_polarity_flip_physical{12.0}=0x0
+phy_chain_tx_polarity_flip_physical{13.0}=0x1
+phy_chain_tx_polarity_flip_physical{14.0}=0x1
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_tx_polarity_flip_physical{16.0}=0x1
+phy_chain_tx_polarity_flip_physical{17.0}=0x0
+phy_chain_tx_polarity_flip_physical{18.0}=0x0
+phy_chain_tx_polarity_flip_physical{19.0}=0x0
+phy_chain_tx_polarity_flip_physical{20.0}=0x0
+phy_chain_tx_polarity_flip_physical{21.0}=0x1
+phy_chain_tx_polarity_flip_physical{22.0}=0x1
+phy_chain_tx_polarity_flip_physical{23.0}=0x0
+phy_chain_tx_polarity_flip_physical{24.0}=0x0
+phy_chain_tx_polarity_flip_physical{25.0}=0x0
+phy_chain_tx_polarity_flip_physical{26.0}=0x0
+phy_chain_tx_polarity_flip_physical{27.0}=0x1
+phy_chain_tx_polarity_flip_physical{28.0}=0x0
+phy_chain_tx_polarity_flip_physical{29.0}=0x0
+phy_chain_tx_polarity_flip_physical{30.0}=0x0
+phy_chain_tx_polarity_flip_physical{31.0}=0x1
+phy_chain_tx_polarity_flip_physical{32.0}=0x1
+phy_chain_tx_polarity_flip_physical{33.0}=0x1
+phy_chain_tx_polarity_flip_physical{34.0}=0x1
+phy_chain_tx_polarity_flip_physical{35.0}=0x1
+phy_chain_tx_polarity_flip_physical{36.0}=0x1
+phy_chain_tx_polarity_flip_physical{37.0}=0x0
+phy_chain_tx_polarity_flip_physical{38.0}=0x0
+phy_chain_tx_polarity_flip_physical{39.0}=0x1
+phy_chain_tx_polarity_flip_physical{40.0}=0x1
+phy_chain_tx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x1
+phy_chain_tx_polarity_flip_physical{43.0}=0x1
+phy_chain_tx_polarity_flip_physical{44.0}=0x1
+phy_chain_tx_polarity_flip_physical{45.0}=0x0
+phy_chain_tx_polarity_flip_physical{46.0}=0x0
+phy_chain_tx_polarity_flip_physical{47.0}=0x1
+phy_chain_tx_polarity_flip_physical{48.0}=0x1
+phy_chain_tx_polarity_flip_physical{49.0}=0x1
+phy_chain_tx_polarity_flip_physical{50.0}=0x1
+phy_chain_tx_polarity_flip_physical{51.0}=0x1
+phy_chain_tx_polarity_flip_physical{52.0}=0x1
+phy_chain_tx_polarity_flip_physical{53.0}=0x0
+phy_chain_tx_polarity_flip_physical{54.0}=0x0
+phy_chain_tx_polarity_flip_physical{55.0}=0x1
+phy_chain_tx_polarity_flip_physical{56.0}=0x1
+phy_chain_tx_polarity_flip_physical{57.0}=0x0
+phy_chain_tx_polarity_flip_physical{58.0}=0x1
+phy_chain_tx_polarity_flip_physical{59.0}=0x1
+phy_chain_tx_polarity_flip_physical{60.0}=0x1
+phy_chain_tx_polarity_flip_physical{61.0}=0x0
+phy_chain_tx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x1
+phy_chain_tx_polarity_flip_physical{65.0}=0x1
+phy_chain_tx_polarity_flip_physical{66.0}=0x1
+phy_chain_tx_polarity_flip_physical{67.0}=0x1
+phy_chain_tx_polarity_flip_physical{68.0}=0x1
+phy_chain_tx_polarity_flip_physical{69.0}=0x0
+phy_chain_tx_polarity_flip_physical{70.0}=0x1
+phy_chain_tx_polarity_flip_physical{71.0}=0x1
+phy_chain_tx_polarity_flip_physical{72.0}=0x1
+phy_chain_tx_polarity_flip_physical{73.0}=0x0
+phy_chain_tx_polarity_flip_physical{74.0}=0x1
+phy_chain_tx_polarity_flip_physical{75.0}=0x1
+phy_chain_tx_polarity_flip_physical{76.0}=0x1
+phy_chain_tx_polarity_flip_physical{77.0}=0x0
+phy_chain_tx_polarity_flip_physical{78.0}=0x0
+phy_chain_tx_polarity_flip_physical{79.0}=0x1
+phy_chain_tx_polarity_flip_physical{80.0}=0x1
+phy_chain_tx_polarity_flip_physical{81.0}=0x1
+phy_chain_tx_polarity_flip_physical{82.0}=0x1
+phy_chain_tx_polarity_flip_physical{83.0}=0x1
+phy_chain_tx_polarity_flip_physical{84.0}=0x1
+phy_chain_tx_polarity_flip_physical{85.0}=0x0
+phy_chain_tx_polarity_flip_physical{86.0}=0x0
+phy_chain_tx_polarity_flip_physical{87.0}=0x1
+phy_chain_tx_polarity_flip_physical{88.0}=0x1
+phy_chain_tx_polarity_flip_physical{89.0}=0x0
+phy_chain_tx_polarity_flip_physical{90.0}=0x1
+phy_chain_tx_polarity_flip_physical{91.0}=0x1
+phy_chain_tx_polarity_flip_physical{92.0}=0x1
+phy_chain_tx_polarity_flip_physical{93.0}=0x0
+phy_chain_tx_polarity_flip_physical{94.0}=0x0
+phy_chain_tx_polarity_flip_physical{95.0}=0x1
+phy_chain_tx_polarity_flip_physical{96.0}=0x1
+phy_chain_tx_polarity_flip_physical{97.0}=0x1
+phy_chain_tx_polarity_flip_physical{98.0}=0x1
+phy_chain_tx_polarity_flip_physical{99.0}=0x1
+phy_chain_tx_polarity_flip_physical{100.0}=0x1
+phy_chain_tx_polarity_flip_physical{101.0}=0x0
+phy_chain_tx_polarity_flip_physical{102.0}=0x1
+phy_chain_tx_polarity_flip_physical{103.0}=0x1
+phy_chain_tx_polarity_flip_physical{104.0}=0x0
+phy_chain_tx_polarity_flip_physical{105.0}=0x1
+phy_chain_tx_polarity_flip_physical{106.0}=0x0
+phy_chain_tx_polarity_flip_physical{107.0}=0x0
+phy_chain_tx_polarity_flip_physical{108.0}=0x0
+phy_chain_tx_polarity_flip_physical{109.0}=0x1
+phy_chain_tx_polarity_flip_physical{110.0}=0x1
+phy_chain_tx_polarity_flip_physical{111.0}=0x0
+phy_chain_tx_polarity_flip_physical{112.0}=0x0
+phy_chain_tx_polarity_flip_physical{113.0}=0x0
+phy_chain_tx_polarity_flip_physical{114.0}=0x0
+phy_chain_tx_polarity_flip_physical{115.0}=0x0
+phy_chain_tx_polarity_flip_physical{116.0}=0x0
+phy_chain_tx_polarity_flip_physical{117.0}=0x1
+phy_chain_tx_polarity_flip_physical{118.0}=0x1
+phy_chain_tx_polarity_flip_physical{119.0}=0x0
+phy_chain_tx_polarity_flip_physical{120.0}=0x0
+phy_chain_tx_polarity_flip_physical{121.0}=0x1
+phy_chain_tx_polarity_flip_physical{122.0}=0x0
+phy_chain_tx_polarity_flip_physical{123.0}=0x0
+phy_chain_tx_polarity_flip_physical{124.0}=0x0
+phy_chain_tx_polarity_flip_physical{125.0}=0x1
+phy_chain_tx_polarity_flip_physical{126.0}=0x1
+phy_chain_tx_polarity_flip_physical{127.0}=0x0
+phy_chain_tx_polarity_flip_physical{128.0}=0x0
+phy_chain_tx_polarity_flip_physical{129.0}=0x0
+portmap_1=1:10:1
+portmap_2=2:10:1
+portmap_3=3:10:1
+portmap_4=4:10:1
+portmap_5=5:10:1
+portmap_6=6:10:1
+portmap_7=7:10:1
+portmap_8=8:10:1
+portmap_9=9:10:1
+portmap_10=10:10:1
+portmap_11=11:10:1
+portmap_12=12:10:1
+portmap_13=13:10:1
+portmap_14=14:10:1
+portmap_15=15:10:1
+portmap_16=16:10:1
+portmap_17=17:10:1
+portmap_18=18:10:1
+portmap_19=19:10:1
+portmap_20=20:10:1
+portmap_21=21:10:1
+portmap_22=22:10:1
+portmap_23=23:10:1
+portmap_24=24:10:1
+portmap_25=25:10:1
+portmap_26=26:10:1
+portmap_27=27:10:1
+portmap_28=28:10:1
+portmap_29=29:10:1
+portmap_30=30:10:1
+portmap_31=31:10:1
+portmap_32=32:10:1
+portmap_33=33:10:1
+portmap_34=34:10:1
+portmap_35=35:10:1
+portmap_36=36:10:1
+portmap_37=37:10:1
+portmap_38=38:10:1
+portmap_39=39:10:1
+portmap_40=40:10:1
+portmap_41=41:10:1
+portmap_42=42:10:1
+portmap_43=43:10:1
+portmap_44=44:10:1
+portmap_45=45:10:1
+portmap_46=46:10:1
+portmap_47=47:10:1
+portmap_48=48:10:1
+portmap_49=49:10:1
+portmap_50=50:10:1
+portmap_51=51:10:1
+portmap_52=52:10:1
+portmap_53=53:10:1
+portmap_54=54:10:1
+portmap_55=55:10:1
+portmap_56=56:10:1
+portmap_57=57:10:1
+portmap_58=58:10:1
+portmap_59=59:10:1
+portmap_60=60:10:1
+portmap_61=61:10:1
+portmap_62=62:10:1
+portmap_63=63:10:1
+portmap_64=64:10:1
+portmap_66=129:10:m
+portmap_67=65:10:1
+portmap_68=66:10:1
+portmap_69=67:10:1
+portmap_70=68:10:1
+portmap_71=69:10:1
+portmap_72=70:10:1
+portmap_73=71:10:1
+portmap_74=72:10:1
+portmap_75=73:10:1
+portmap_76=74:10:1
+portmap_77=75:10:1
+portmap_78=76:10:1
+portmap_79=77:10:1
+portmap_80=78:10:1
+portmap_81=79:10:1
+portmap_82=80:10:1
+portmap_83=81:10:1
+portmap_84=82:10:1
+portmap_85=83:10:1
+portmap_86=84:10:1
+portmap_87=85:10:1
+portmap_88=86:10:1
+portmap_89=87:10:1
+portmap_90=88:10:1
+portmap_91=89:10:1
+portmap_92=90:10:1
+portmap_93=91:10:1
+portmap_94=92:10:1
+portmap_95=93:10:1
+portmap_96=94:10:1
+portmap_97=95:10:1
+portmap_98=96:10:1
+portmap_99=97:10:1
+portmap_100=98:10:1
+portmap_101=99:10:1
+portmap_102=100:10:1
+portmap_103=101:10:1
+portmap_104=102:10:1
+portmap_105=103:10:1
+portmap_106=104:10:1
+portmap_107=105:100
+portmap_111=109:100
+portmap_115=113:100
+portmap_119=117:100
+portmap_123=121:100
+portmap_127=125:100
+serdes_core_rx_polarity_flip_physical{1}=0x8
+serdes_core_rx_polarity_flip_physical{5}=0x2
+serdes_core_rx_polarity_flip_physical{9}=0xc
+serdes_core_rx_polarity_flip_physical{13}=0x3
+serdes_core_rx_polarity_flip_physical{17}=0x4
+serdes_core_rx_polarity_flip_physical{21}=0x3
+serdes_core_rx_polarity_flip_physical{25}=0x6
+serdes_core_rx_polarity_flip_physical{29}=0x3
+serdes_core_rx_polarity_flip_physical{33}=0x4
+serdes_core_rx_polarity_flip_physical{37}=0x3
+serdes_core_rx_polarity_flip_physical{41}=0xc
+serdes_core_rx_polarity_flip_physical{45}=0x3
+serdes_core_rx_polarity_flip_physical{49}=0x4
+serdes_core_rx_polarity_flip_physical{53}=0x3
+serdes_core_rx_polarity_flip_physical{57}=0xc
+serdes_core_rx_polarity_flip_physical{61}=0x3
+serdes_core_rx_polarity_flip_physical{65}=0xb
+serdes_core_rx_polarity_flip_physical{69}=0xc
+serdes_core_rx_polarity_flip_physical{73}=0x7
+serdes_core_rx_polarity_flip_physical{77}=0xc
+serdes_core_rx_polarity_flip_physical{81}=0xb
+serdes_core_rx_polarity_flip_physical{85}=0xc
+serdes_core_rx_polarity_flip_physical{89}=0x7
+serdes_core_rx_polarity_flip_physical{93}=0xc
+serdes_core_rx_polarity_flip_physical{97}=0xb
+serdes_core_rx_polarity_flip_physical{101}=0x9
+serdes_core_rx_polarity_flip_physical{105}=0x7
+serdes_core_rx_polarity_flip_physical{109}=0xc
+serdes_core_rx_polarity_flip_physical{113}=0xb
+serdes_core_rx_polarity_flip_physical{117}=0xc
+serdes_core_rx_polarity_flip_physical{121}=0x7
+serdes_core_rx_polarity_flip_physical{125}=0xc
+serdes_core_rx_polarity_flip_physical{129}=0x0
+serdes_core_tx_polarity_flip_physical{1}=0x3
+serdes_core_tx_polarity_flip_physical{5}=0xb
+serdes_core_tx_polarity_flip_physical{9}=0x3
+serdes_core_tx_polarity_flip_physical{13}=0xb
+serdes_core_tx_polarity_flip_physical{17}=0x0
+serdes_core_tx_polarity_flip_physical{21}=0x3
+serdes_core_tx_polarity_flip_physical{25}=0x4
+serdes_core_tx_polarity_flip_physical{29}=0xc
+serdes_core_tx_polarity_flip_physical{33}=0xf
+serdes_core_tx_polarity_flip_physical{37}=0xc
+serdes_core_tx_polarity_flip_physical{41}=0xe
+serdes_core_tx_polarity_flip_physical{45}=0xc
+serdes_core_tx_polarity_flip_physical{49}=0xf
+serdes_core_tx_polarity_flip_physical{53}=0xc
+serdes_core_tx_polarity_flip_physical{57}=0xe
+serdes_core_tx_polarity_flip_physical{61}=0xc
+serdes_core_tx_polarity_flip_physical{65}=0xf
+serdes_core_tx_polarity_flip_physical{69}=0xe
+serdes_core_tx_polarity_flip_physical{73}=0xe
+serdes_core_tx_polarity_flip_physical{77}=0xc
+serdes_core_tx_polarity_flip_physical{81}=0xf
+serdes_core_tx_polarity_flip_physical{85}=0xc
+serdes_core_tx_polarity_flip_physical{89}=0xe
+serdes_core_tx_polarity_flip_physical{93}=0xc
+serdes_core_tx_polarity_flip_physical{97}=0xf
+serdes_core_tx_polarity_flip_physical{101}=0x6
+serdes_core_tx_polarity_flip_physical{105}=0x1
+serdes_core_tx_polarity_flip_physical{109}=0x3
+serdes_core_tx_polarity_flip_physical{113}=0x0
+serdes_core_tx_polarity_flip_physical{117}=0x3
+serdes_core_tx_polarity_flip_physical{121}=0x1
+serdes_core_tx_polarity_flip_physical{125}=0x3
+serdes_core_tx_polarity_flip_physical{129}=0x0
+serdes_preemphasis_1=0x14410a
+serdes_preemphasis_2=0x14410a
+serdes_preemphasis_3=0x14410a
+serdes_preemphasis_4=0x14410a
+serdes_preemphasis_5=0x14410a
+serdes_preemphasis_6=0x14410a
+serdes_preemphasis_7=0x14410a
+serdes_preemphasis_8=0x14410a
+serdes_preemphasis_9=0x14410a
+serdes_preemphasis_10=0x14410a
+serdes_preemphasis_11=0x14410a
+serdes_preemphasis_12=0x14410a
+serdes_preemphasis_13=0x14410a
+serdes_preemphasis_14=0x14410a
+serdes_preemphasis_15=0x14410a
+serdes_preemphasis_16=0x14410a
+serdes_preemphasis_17=0x14410a
+serdes_preemphasis_18=0x14410a
+serdes_preemphasis_19=0x14410a
+serdes_preemphasis_20=0x14410a
+serdes_preemphasis_21=0x14410a
+serdes_preemphasis_22=0x14410a
+serdes_preemphasis_23=0x14410a
+serdes_preemphasis_24=0x14410a
+serdes_preemphasis_25=0x14410a
+serdes_preemphasis_26=0x14410a
+serdes_preemphasis_27=0x14410a
+serdes_preemphasis_28=0x14410a
+serdes_preemphasis_29=0x14410a
+serdes_preemphasis_30=0x14410a
+serdes_preemphasis_31=0x14410a
+serdes_preemphasis_32=0x14410a
+serdes_preemphasis_33=0x14410a
+serdes_preemphasis_34=0x14410a
+serdes_preemphasis_35=0x14410a
+serdes_preemphasis_36=0x14410a
+serdes_preemphasis_37=0x14410a
+serdes_preemphasis_38=0x14410a
+serdes_preemphasis_39=0x14410a
+serdes_preemphasis_40=0x14410a
+serdes_preemphasis_41=0x14410a
+serdes_preemphasis_42=0x14410a
+serdes_preemphasis_43=0x14410a
+serdes_preemphasis_44=0x14410a
+serdes_preemphasis_45=0x14410a
+serdes_preemphasis_46=0x14410a
+serdes_preemphasis_47=0x14410a
+serdes_preemphasis_48=0x14410a
+serdes_preemphasis_49=0x410a
+serdes_preemphasis_50=0x410a
+serdes_preemphasis_51=0x410a
+serdes_preemphasis_52=0x410a
+serdes_preemphasis_53=0x410a
+serdes_preemphasis_54=0x410a
+serdes_preemphasis_55=0x410a
+serdes_preemphasis_56=0x410a
+serdes_preemphasis_57=0x410a
+serdes_preemphasis_58=0x410a
+serdes_preemphasis_59=0x410a
+serdes_preemphasis_60=0x410a
+serdes_preemphasis_61=0x410a
+serdes_preemphasis_62=0x410a
+serdes_preemphasis_63=0x410a
+serdes_preemphasis_64=0x410a
+serdes_preemphasis_67=0x410a
+serdes_preemphasis_68=0x410a
+serdes_preemphasis_69=0x410a
+serdes_preemphasis_70=0x410a
+serdes_preemphasis_71=0x410a
+serdes_preemphasis_72=0x410a
+serdes_preemphasis_73=0x410a
+serdes_preemphasis_74=0x410a
+serdes_preemphasis_75=0x410a
+serdes_preemphasis_76=0x410a
+serdes_preemphasis_77=0x410a
+serdes_preemphasis_78=0x410a
+serdes_preemphasis_79=0x410a
+serdes_preemphasis_80=0x410a
+serdes_preemphasis_81=0x410a
+serdes_preemphasis_82=0x410a
+serdes_preemphasis_83=0x14410a
+serdes_preemphasis_84=0x14410a
+serdes_preemphasis_85=0x14410a
+serdes_preemphasis_86=0x14410a
+serdes_preemphasis_87=0x14410a
+serdes_preemphasis_88=0x14410a
+serdes_preemphasis_89=0x14410a
+serdes_preemphasis_90=0x14410a
+serdes_preemphasis_91=0x14410a
+serdes_preemphasis_92=0x14410a
+serdes_preemphasis_93=0x14410a
+serdes_preemphasis_94=0x14410a
+serdes_preemphasis_95=0x14410a
+serdes_preemphasis_96=0x14410a
+serdes_preemphasis_97=0x14410a
+serdes_preemphasis_98=0x14410a
+serdes_preemphasis_99=0x14410a
+serdes_preemphasis_100=0x14410a
+serdes_preemphasis_101=0x14410a
+serdes_preemphasis_102=0x14410a
+serdes_preemphasis_103=0x14410a
+serdes_preemphasis_104=0x14410a
+serdes_preemphasis_105=0x14410a
+serdes_preemphasis_106=0x14410a
+serdes_preemphasis_107=0x104105
+serdes_preemphasis_111=0x104105
+serdes_preemphasis_115=0x104105
+serdes_preemphasis_119=0x104105
+serdes_preemphasis_123=0x104105
+serdes_preemphasis_127=0x104105
+serdes_driver_current_66=0xe
+serdes_preemphasis_66=0x102804
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/port_config.ini b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/port_config.ini
new file mode 100644
index 00000000000..68f46a0b6c7
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/port_config.ini
@@ -0,0 +1,130 @@
+# name          lanes             alias         index  speed
+Ethernet0       1                 Ethernet1/1   1      10000
+Ethernet1       2                 Ethernet1/2   1      10000
+Ethernet2       3                 Ethernet1/3   1      10000
+Ethernet3       4                 Ethernet1/4   1      10000
+Ethernet4       5                 Ethernet2/1   2      10000
+Ethernet5       6                 Ethernet2/2   2      10000
+Ethernet6       7                 Ethernet2/3   2      10000
+Ethernet7       8                 Ethernet2/4   2      10000
+Ethernet8       9                 Ethernet3/1   3      10000
+Ethernet9       10                Ethernet3/2   3      10000
+Ethernet10      11                Ethernet3/3   3      10000
+Ethernet11      12                Ethernet3/4   3      10000
+Ethernet12      13                Ethernet4/1   4      10000
+Ethernet13      14                Ethernet4/2   4      10000
+Ethernet14      15                Ethernet4/3   4      10000
+Ethernet15      16                Ethernet4/4   4      10000
+Ethernet16      21                Ethernet5/1   5      10000
+Ethernet17      22                Ethernet5/2   5      10000
+Ethernet18      23                Ethernet5/3   5      10000
+Ethernet19      24                Ethernet5/4   5      10000
+Ethernet20      17                Ethernet6/1   6      10000
+Ethernet21      18                Ethernet6/2   6      10000
+Ethernet22      19                Ethernet6/3   6      10000
+Ethernet23      20                Ethernet6/4   6      10000
+Ethernet24      25                Ethernet7/1   7      10000
+Ethernet25      26                Ethernet7/2   7      10000
+Ethernet26      27                Ethernet7/3   7      10000
+Ethernet27      28                Ethernet7/4   7      10000
+Ethernet28      29                Ethernet8/1   8      10000
+Ethernet29      30                Ethernet8/2   8      10000
+Ethernet30      31                Ethernet8/3   8      10000
+Ethernet31      32                Ethernet8/4   8      10000
+Ethernet32      37                Ethernet9/1   9      10000
+Ethernet33      38                Ethernet9/2   9      10000
+Ethernet34      39                Ethernet9/3   9      10000
+Ethernet35      40                Ethernet9/4   9      10000
+Ethernet36      33                Ethernet10/1  10     10000
+Ethernet37      34                Ethernet10/2  10     10000
+Ethernet38      35                Ethernet10/3  10     10000
+Ethernet39      36                Ethernet10/4  10     10000
+Ethernet40      41                Ethernet11/1  11     10000
+Ethernet41      42                Ethernet11/2  11     10000
+Ethernet42      43                Ethernet11/3  11     10000
+Ethernet43      44                Ethernet11/4  11     10000
+Ethernet44      45                Ethernet12/1  12     10000
+Ethernet45      46                Ethernet12/2  12     10000
+Ethernet46      47                Ethernet12/3  12     10000
+Ethernet47      48                Ethernet12/4  12     10000
+Ethernet48      53                Ethernet13/1  13     10000
+Ethernet49      54                Ethernet13/2  13     10000
+Ethernet50      55                Ethernet13/3  13     10000
+Ethernet51      56                Ethernet13/4  13     10000
+Ethernet52      49                Ethernet14/1  14     10000
+Ethernet53      50                Ethernet14/2  14     10000
+Ethernet54      51                Ethernet14/3  14     10000
+Ethernet55      52                Ethernet14/4  14     10000
+Ethernet56      57                Ethernet15/1  15     10000
+Ethernet57      58                Ethernet15/2  15     10000
+Ethernet58      59                Ethernet15/3  15     10000
+Ethernet59      60                Ethernet15/4  15     10000
+Ethernet60      61                Ethernet16/1  16     10000
+Ethernet61      62                Ethernet16/2  16     10000
+Ethernet62      63                Ethernet16/3  16     10000
+Ethernet63      64                Ethernet16/4  16     10000
+Ethernet64      69                Ethernet17/1  17     10000
+Ethernet65      70                Ethernet17/2  17     10000
+Ethernet66      71                Ethernet17/3  17     10000
+Ethernet67      72                Ethernet17/4  17     10000
+Ethernet68      65                Ethernet18/1  18     10000
+Ethernet69      66                Ethernet18/2  18     10000
+Ethernet70      67                Ethernet18/3  18     10000
+Ethernet71      68                Ethernet18/4  18     10000
+Ethernet72      73                Ethernet19/1  19     10000
+Ethernet73      74                Ethernet19/2  19     10000
+Ethernet74      75                Ethernet19/3  19     10000
+Ethernet75      76                Ethernet19/4  19     10000
+Ethernet76      77                Ethernet20/1  20     10000
+Ethernet77      78                Ethernet20/2  20     10000
+Ethernet78      79                Ethernet20/3  20     10000
+Ethernet79      80                Ethernet20/4  20     10000
+Ethernet80      85                Ethernet21/1  21     10000
+Ethernet81      86                Ethernet21/2  21     10000
+Ethernet82      87                Ethernet21/3  21     10000
+Ethernet83      88                Ethernet21/4  21     10000
+Ethernet84      81                Ethernet22/1  22     10000
+Ethernet85      82                Ethernet22/2  22     10000
+Ethernet86      83                Ethernet22/3  22     10000
+Ethernet87      84                Ethernet22/4  22     10000
+Ethernet88      89                Ethernet23/1  23     10000
+Ethernet89      90                Ethernet23/2  23     10000
+Ethernet90      91                Ethernet23/3  23     10000
+Ethernet91      92                Ethernet23/4  23     10000
+Ethernet92      93                Ethernet24/1  24     10000
+Ethernet93      94                Ethernet24/2  24     10000
+Ethernet94      95                Ethernet24/3  24     10000
+Ethernet95      96                Ethernet24/4  24     10000
+Ethernet96      101               Ethernet25/1  25     10000
+Ethernet97      102               Ethernet25/2  25     10000
+Ethernet98      103               Ethernet25/3  25     10000
+Ethernet99      104               Ethernet25/4  25     10000
+Ethernet100     97                Ethernet26/1  26     10000
+Ethernet101     98                Ethernet26/2  26     10000
+Ethernet102     99                Ethernet26/3  26     10000
+Ethernet103     100               Ethernet26/4  26     10000
+Ethernet104     105               Ethernet27/1  27     10000
+Ethernet105     106               Ethernet27/2  27     10000
+Ethernet106     107               Ethernet27/3  27     10000
+Ethernet107     108               Ethernet27/4  27     10000
+Ethernet108     109               Ethernet28/1  28     10000
+Ethernet109     110               Ethernet28/2  28     10000
+Ethernet110     111               Ethernet28/3  28     10000
+Ethernet111     112               Ethernet28/4  28     10000
+Ethernet112     117               Ethernet29/1  29     10000
+Ethernet113     118               Ethernet29/2  29     10000
+Ethernet114     119               Ethernet29/3  29     10000
+Ethernet115     120               Ethernet29/4  29     10000
+Ethernet116     113               Ethernet30/1  30     10000
+Ethernet117     114               Ethernet30/2  30     10000
+Ethernet118     115               Ethernet30/3  30     10000
+Ethernet119     116               Ethernet30/4  30     10000
+Ethernet120     121               Ethernet31/1  31     10000
+Ethernet121     122               Ethernet31/2  31     10000
+Ethernet122     123               Ethernet31/3  31     10000
+Ethernet123     124               Ethernet31/4  31     10000
+Ethernet124     125               Ethernet32/1  32     10000
+Ethernet125     126               Ethernet32/2  32     10000
+Ethernet126     127               Ethernet32/3  32     10000
+Ethernet127     128               Ethernet32/4  32     10000
+Ethernet128     129               Ethernet33    33     10000
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/sai.profile b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/sai.profile
new file mode 100644
index 00000000000..f2fa32cd0ec
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-a7050cx3-32s-128x10g.config.bcm
+SAI_NUM_ECMP_MEMBERS=64
diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/td3-a7050cx3-32s-128x10g.config.bcm b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/td3-a7050cx3-32s-128x10g.config.bcm
new file mode 100644
index 00000000000..638b98ecc25
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/td3-a7050cx3-32s-128x10g.config.bcm
@@ -0,0 +1,708 @@
+PHY_AN_ALLOW_PLL_CHANGE=1
+arl_clean_timeout_usec=15000000
+asf_mem_profile=2
+bcm_num_cos=10
+bcm_stat_flags=1
+bcm_stat_jumbo=9236
+bcm_tunnel_term_compatible_mode=1
+cdma_timeout_usec=15000000
+core_clock_frequency=1525
+disable_pcie_firmware_check=1
+dma_desc_timeout_usec=15000000
+dpp_clock_ratio=2:3
+flow_init_mode=1
+fpem_mem_entries=0
+higig2_hdr_mode=1
+host_as_route_disable=1
+ifp_inports_support_enable=1
+ipv6_lpm_128b_enable=1
+l2xmsg_mode=1
+l2_mem_entries=32768
+l3_alpm_enable=2
+l3_alpm_hit_skip=1
+l3_ecmp_levels=2
+l3_max_ecmp_mode=1
+l3_mem_entries=16384
+max_vp_lags=0
+miim_intr_enable=0
+module_64ports=1
+multicast_l2_range=16383
+multicast_l3_range=0
+os=unix
+oversubscribe_mode=1
+pbmp_xport_xe=0x7ffffffffffffffffffffffffffffffffe
+pfc_deadlock_seq_control=1
+phy_an_c37_66=2
+phy_an_c73=1
+phy_an_lt_msft=1
+riot_enable=1
+riot_overlay_ecmp_resilient_hash_size=16384
+riot_overlay_l3_egress_mem_size=32768
+riot_overlay_l3_intf_mem_size=4096
+robust_hash_disable_egress_vlan=1
+robust_hash_disable_mpls=1
+robust_hash_disable_vlan=1
+sai_adjust_acl_drop_in_rx_drop=1
+sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_premium_issu/b870.6.4.1/
+sai_optimized_mmu=1
+sai_pfc_dlr_init_capability=1' -%}
+sai_tunnel_support=1
+sai_tunnel_underlay_route_mode=1
+sai_verify_incoming_chksum=0
+port_flex_enable=1
+port_init_autoneg=0
+port_phy_addr=0xff
+stable_size=0x5500000
+tdma_timeout_usec=15000000
+tslam_timeout_usec=15000000
+use_all_splithorizon_groups=1
+hybrid_pfc_deadlock_enable=1
+phy_chain_rx_lane_map_physical{1.0}=0x1302
+phy_chain_rx_lane_map_physical{5.0}=0x3120
+phy_chain_rx_lane_map_physical{9.0}=0x3120
+phy_chain_rx_lane_map_physical{13.0}=0x3120
+phy_chain_rx_lane_map_physical{17.0}=0x1203
+phy_chain_rx_lane_map_physical{21.0}=0x3120
+phy_chain_rx_lane_map_physical{25.0}=0x3120
+phy_chain_rx_lane_map_physical{29.0}=0x3120
+phy_chain_rx_lane_map_physical{33.0}=0x1203
+phy_chain_rx_lane_map_physical{37.0}=0x3120
+phy_chain_rx_lane_map_physical{41.0}=0x3120
+phy_chain_rx_lane_map_physical{45.0}=0x3120
+phy_chain_rx_lane_map_physical{49.0}=0x1203
+phy_chain_rx_lane_map_physical{53.0}=0x3120
+phy_chain_rx_lane_map_physical{57.0}=0x3120
+phy_chain_rx_lane_map_physical{61.0}=0x3120
+phy_chain_rx_lane_map_physical{65.0}=0x2130
+phy_chain_rx_lane_map_physical{69.0}=0x0213
+phy_chain_rx_lane_map_physical{73.0}=0x2031
+phy_chain_rx_lane_map_physical{77.0}=0x0213
+phy_chain_rx_lane_map_physical{81.0}=0x2130
+phy_chain_rx_lane_map_physical{85.0}=0x0213
+phy_chain_rx_lane_map_physical{89.0}=0x2031
+phy_chain_rx_lane_map_physical{93.0}=0x0213
+phy_chain_rx_lane_map_physical{97.0}=0x2130
+phy_chain_rx_lane_map_physical{101.0}=0x0213
+phy_chain_rx_lane_map_physical{105.0}=0x2031
+phy_chain_rx_lane_map_physical{109.0}=0x0213
+phy_chain_rx_lane_map_physical{113.0}=0x2130
+phy_chain_rx_lane_map_physical{117.0}=0x0213
+phy_chain_rx_lane_map_physical{121.0}=0x2031
+phy_chain_rx_lane_map_physical{125.0}=0x0213
+phy_chain_rx_lane_map_physical{129.0}=0x3210
+phy_chain_rx_polarity_flip_physical{1.0}=0x0
+phy_chain_rx_polarity_flip_physical{2.0}=0x0
+phy_chain_rx_polarity_flip_physical{3.0}=0x0
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+phy_chain_rx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{6.0}=0x1
+phy_chain_rx_polarity_flip_physical{7.0}=0x0
+phy_chain_rx_polarity_flip_physical{8.0}=0x0
+phy_chain_rx_polarity_flip_physical{9.0}=0x0
+phy_chain_rx_polarity_flip_physical{10.0}=0x0
+phy_chain_rx_polarity_flip_physical{11.0}=0x1
+phy_chain_rx_polarity_flip_physical{12.0}=0x1
+phy_chain_rx_polarity_flip_physical{13.0}=0x1
+phy_chain_rx_polarity_flip_physical{14.0}=0x1
+phy_chain_rx_polarity_flip_physical{15.0}=0x0
+phy_chain_rx_polarity_flip_physical{16.0}=0x0
+phy_chain_rx_polarity_flip_physical{17.0}=0x0
+phy_chain_rx_polarity_flip_physical{18.0}=0x0
+phy_chain_rx_polarity_flip_physical{19.0}=0x1
+phy_chain_rx_polarity_flip_physical{20.0}=0x0
+phy_chain_rx_polarity_flip_physical{21.0}=0x1
+phy_chain_rx_polarity_flip_physical{22.0}=0x1
+phy_chain_rx_polarity_flip_physical{23.0}=0x0
+phy_chain_rx_polarity_flip_physical{24.0}=0x0
+phy_chain_rx_polarity_flip_physical{25.0}=0x0
+phy_chain_rx_polarity_flip_physical{26.0}=0x1
+phy_chain_rx_polarity_flip_physical{27.0}=0x1
+phy_chain_rx_polarity_flip_physical{28.0}=0x0
+phy_chain_rx_polarity_flip_physical{29.0}=0x1
+phy_chain_rx_polarity_flip_physical{30.0}=0x1
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x0
+phy_chain_rx_polarity_flip_physical{33.0}=0x0
+phy_chain_rx_polarity_flip_physical{34.0}=0x0
+phy_chain_rx_polarity_flip_physical{35.0}=0x1
+phy_chain_rx_polarity_flip_physical{36.0}=0x0
+phy_chain_rx_polarity_flip_physical{37.0}=0x1
+phy_chain_rx_polarity_flip_physical{38.0}=0x1
+phy_chain_rx_polarity_flip_physical{39.0}=0x0
+phy_chain_rx_polarity_flip_physical{40.0}=0x0
+phy_chain_rx_polarity_flip_physical{41.0}=0x0
+phy_chain_rx_polarity_flip_physical{42.0}=0x0
+phy_chain_rx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{44.0}=0x1
+phy_chain_rx_polarity_flip_physical{45.0}=0x1
+phy_chain_rx_polarity_flip_physical{46.0}=0x1
+phy_chain_rx_polarity_flip_physical{47.0}=0x0
+phy_chain_rx_polarity_flip_physical{48.0}=0x0
+phy_chain_rx_polarity_flip_physical{49.0}=0x0
+phy_chain_rx_polarity_flip_physical{50.0}=0x0
+phy_chain_rx_polarity_flip_physical{51.0}=0x1
+phy_chain_rx_polarity_flip_physical{52.0}=0x0
+phy_chain_rx_polarity_flip_physical{53.0}=0x1
+phy_chain_rx_polarity_flip_physical{54.0}=0x1
+phy_chain_rx_polarity_flip_physical{55.0}=0x0
+phy_chain_rx_polarity_flip_physical{56.0}=0x0
+phy_chain_rx_polarity_flip_physical{57.0}=0x0
+phy_chain_rx_polarity_flip_physical{58.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x1
+phy_chain_rx_polarity_flip_physical{60.0}=0x1
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_rx_polarity_flip_physical{62.0}=0x1
+phy_chain_rx_polarity_flip_physical{63.0}=0x0
+phy_chain_rx_polarity_flip_physical{64.0}=0x0
+phy_chain_rx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{66.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x0
+phy_chain_rx_polarity_flip_physical{68.0}=0x1
+phy_chain_rx_polarity_flip_physical{69.0}=0x0
+phy_chain_rx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{71.0}=0x1
+phy_chain_rx_polarity_flip_physical{72.0}=0x1
+phy_chain_rx_polarity_flip_physical{73.0}=0x1
+phy_chain_rx_polarity_flip_physical{74.0}=0x1
+phy_chain_rx_polarity_flip_physical{75.0}=0x1
+phy_chain_rx_polarity_flip_physical{76.0}=0x0
+phy_chain_rx_polarity_flip_physical{77.0}=0x0
+phy_chain_rx_polarity_flip_physical{78.0}=0x0
+phy_chain_rx_polarity_flip_physical{79.0}=0x1
+phy_chain_rx_polarity_flip_physical{80.0}=0x1
+phy_chain_rx_polarity_flip_physical{81.0}=0x1
+phy_chain_rx_polarity_flip_physical{82.0}=0x1
+phy_chain_rx_polarity_flip_physical{83.0}=0x0
+phy_chain_rx_polarity_flip_physical{84.0}=0x1
+phy_chain_rx_polarity_flip_physical{85.0}=0x0
+phy_chain_rx_polarity_flip_physical{86.0}=0x0
+phy_chain_rx_polarity_flip_physical{87.0}=0x1
+phy_chain_rx_polarity_flip_physical{88.0}=0x1
+phy_chain_rx_polarity_flip_physical{89.0}=0x1
+phy_chain_rx_polarity_flip_physical{90.0}=0x1
+phy_chain_rx_polarity_flip_physical{91.0}=0x1
+phy_chain_rx_polarity_flip_physical{92.0}=0x0
+phy_chain_rx_polarity_flip_physical{93.0}=0x0
+phy_chain_rx_polarity_flip_physical{94.0}=0x0
+phy_chain_rx_polarity_flip_physical{95.0}=0x1
+phy_chain_rx_polarity_flip_physical{96.0}=0x1
+phy_chain_rx_polarity_flip_physical{97.0}=0x1
+phy_chain_rx_polarity_flip_physical{98.0}=0x1
+phy_chain_rx_polarity_flip_physical{99.0}=0x0
+phy_chain_rx_polarity_flip_physical{100.0}=0x1
+phy_chain_rx_polarity_flip_physical{101.0}=0x1
+phy_chain_rx_polarity_flip_physical{102.0}=0x0
+phy_chain_rx_polarity_flip_physical{103.0}=0x0
+phy_chain_rx_polarity_flip_physical{104.0}=0x1
+phy_chain_rx_polarity_flip_physical{105.0}=0x1
+phy_chain_rx_polarity_flip_physical{106.0}=0x1
+phy_chain_rx_polarity_flip_physical{107.0}=0x1
+phy_chain_rx_polarity_flip_physical{108.0}=0x0
+phy_chain_rx_polarity_flip_physical{109.0}=0x0
+phy_chain_rx_polarity_flip_physical{110.0}=0x0
+phy_chain_rx_polarity_flip_physical{111.0}=0x1
+phy_chain_rx_polarity_flip_physical{112.0}=0x1
+phy_chain_rx_polarity_flip_physical{113.0}=0x1
+phy_chain_rx_polarity_flip_physical{114.0}=0x1
+phy_chain_rx_polarity_flip_physical{115.0}=0x0
+phy_chain_rx_polarity_flip_physical{116.0}=0x1
+phy_chain_rx_polarity_flip_physical{117.0}=0x0
+phy_chain_rx_polarity_flip_physical{118.0}=0x0
+phy_chain_rx_polarity_flip_physical{119.0}=0x1
+phy_chain_rx_polarity_flip_physical{120.0}=0x1
+phy_chain_rx_polarity_flip_physical{121.0}=0x1
+phy_chain_rx_polarity_flip_physical{122.0}=0x1
+phy_chain_rx_polarity_flip_physical{123.0}=0x1
+phy_chain_rx_polarity_flip_physical{124.0}=0x0
+phy_chain_rx_polarity_flip_physical{125.0}=0x0
+phy_chain_rx_polarity_flip_physical{126.0}=0x0
+phy_chain_rx_polarity_flip_physical{127.0}=0x1
+phy_chain_rx_polarity_flip_physical{128.0}=0x1
+phy_chain_rx_polarity_flip_physical{129.0}=0x0
+phy_chain_tx_lane_map_physical{1.0}=0x3021
+phy_chain_tx_lane_map_physical{5.0}=0x1203
+phy_chain_tx_lane_map_physical{9.0}=0x0213
+phy_chain_tx_lane_map_physical{13.0}=0x0213
+phy_chain_tx_lane_map_physical{17.0}=0x2031
+phy_chain_tx_lane_map_physical{21.0}=0x0213
+phy_chain_tx_lane_map_physical{25.0}=0x2031
+phy_chain_tx_lane_map_physical{29.0}=0x1203
+phy_chain_tx_lane_map_physical{33.0}=0x2031
+phy_chain_tx_lane_map_physical{37.0}=0x0213
+phy_chain_tx_lane_map_physical{41.0}=0x2031
+phy_chain_tx_lane_map_physical{45.0}=0x1203
+phy_chain_tx_lane_map_physical{49.0}=0x2031
+phy_chain_tx_lane_map_physical{53.0}=0x0213
+phy_chain_tx_lane_map_physical{57.0}=0x2031
+phy_chain_tx_lane_map_physical{61.0}=0x1203
+phy_chain_tx_lane_map_physical{65.0}=0x1302
+phy_chain_tx_lane_map_physical{69.0}=0x1302
+phy_chain_tx_lane_map_physical{73.0}=0x1302
+phy_chain_tx_lane_map_physical{77.0}=0x2130
+phy_chain_tx_lane_map_physical{81.0}=0x1302
+phy_chain_tx_lane_map_physical{85.0}=0x3120
+phy_chain_tx_lane_map_physical{89.0}=0x1302
+phy_chain_tx_lane_map_physical{93.0}=0x2130
+phy_chain_tx_lane_map_physical{97.0}=0x1302
+phy_chain_tx_lane_map_physical{101.0}=0x3120
+phy_chain_tx_lane_map_physical{105.0}=0x1302
+phy_chain_tx_lane_map_physical{109.0}=0x2130
+phy_chain_tx_lane_map_physical{113.0}=0x1302
+phy_chain_tx_lane_map_physical{117.0}=0x3120
+phy_chain_tx_lane_map_physical{121.0}=0x1302
+phy_chain_tx_lane_map_physical{125.0}=0x3120
+phy_chain_tx_lane_map_physical{129.0}=0x3210
+phy_chain_tx_polarity_flip_physical{1.0}=0x1
+phy_chain_tx_polarity_flip_physical{2.0}=0x1
+phy_chain_tx_polarity_flip_physical{3.0}=0x0
+phy_chain_tx_polarity_flip_physical{4.0}=0x0
+phy_chain_tx_polarity_flip_physical{5.0}=0x1
+phy_chain_tx_polarity_flip_physical{6.0}=0x1
+phy_chain_tx_polarity_flip_physical{7.0}=0x0
+phy_chain_tx_polarity_flip_physical{8.0}=0x1
+phy_chain_tx_polarity_flip_physical{9.0}=0x1
+phy_chain_tx_polarity_flip_physical{10.0}=0x1
+phy_chain_tx_polarity_flip_physical{11.0}=0x0
+phy_chain_tx_polarity_flip_physical{12.0}=0x0
+phy_chain_tx_polarity_flip_physical{13.0}=0x1
+phy_chain_tx_polarity_flip_physical{14.0}=0x1
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_tx_polarity_flip_physical{16.0}=0x1
+phy_chain_tx_polarity_flip_physical{17.0}=0x0
+phy_chain_tx_polarity_flip_physical{18.0}=0x0
+phy_chain_tx_polarity_flip_physical{19.0}=0x0
+phy_chain_tx_polarity_flip_physical{20.0}=0x0
+phy_chain_tx_polarity_flip_physical{21.0}=0x1
+phy_chain_tx_polarity_flip_physical{22.0}=0x1
+phy_chain_tx_polarity_flip_physical{23.0}=0x0
+phy_chain_tx_polarity_flip_physical{24.0}=0x0
+phy_chain_tx_polarity_flip_physical{25.0}=0x0
+phy_chain_tx_polarity_flip_physical{26.0}=0x0
+phy_chain_tx_polarity_flip_physical{27.0}=0x1
+phy_chain_tx_polarity_flip_physical{28.0}=0x0
+phy_chain_tx_polarity_flip_physical{29.0}=0x0
+phy_chain_tx_polarity_flip_physical{30.0}=0x0
+phy_chain_tx_polarity_flip_physical{31.0}=0x1
+phy_chain_tx_polarity_flip_physical{32.0}=0x1
+phy_chain_tx_polarity_flip_physical{33.0}=0x1
+phy_chain_tx_polarity_flip_physical{34.0}=0x1
+phy_chain_tx_polarity_flip_physical{35.0}=0x1
+phy_chain_tx_polarity_flip_physical{36.0}=0x1
+phy_chain_tx_polarity_flip_physical{37.0}=0x0
+phy_chain_tx_polarity_flip_physical{38.0}=0x0
+phy_chain_tx_polarity_flip_physical{39.0}=0x1
+phy_chain_tx_polarity_flip_physical{40.0}=0x1
+phy_chain_tx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x1
+phy_chain_tx_polarity_flip_physical{43.0}=0x1
+phy_chain_tx_polarity_flip_physical{44.0}=0x1
+phy_chain_tx_polarity_flip_physical{45.0}=0x0
+phy_chain_tx_polarity_flip_physical{46.0}=0x0
+phy_chain_tx_polarity_flip_physical{47.0}=0x1
+phy_chain_tx_polarity_flip_physical{48.0}=0x1
+phy_chain_tx_polarity_flip_physical{49.0}=0x1
+phy_chain_tx_polarity_flip_physical{50.0}=0x1
+phy_chain_tx_polarity_flip_physical{51.0}=0x1
+phy_chain_tx_polarity_flip_physical{52.0}=0x1
+phy_chain_tx_polarity_flip_physical{53.0}=0x0
+phy_chain_tx_polarity_flip_physical{54.0}=0x0
+phy_chain_tx_polarity_flip_physical{55.0}=0x1
+phy_chain_tx_polarity_flip_physical{56.0}=0x1
+phy_chain_tx_polarity_flip_physical{57.0}=0x0
+phy_chain_tx_polarity_flip_physical{58.0}=0x1
+phy_chain_tx_polarity_flip_physical{59.0}=0x1
+phy_chain_tx_polarity_flip_physical{60.0}=0x1
+phy_chain_tx_polarity_flip_physical{61.0}=0x0
+phy_chain_tx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x1
+phy_chain_tx_polarity_flip_physical{65.0}=0x1
+phy_chain_tx_polarity_flip_physical{66.0}=0x1
+phy_chain_tx_polarity_flip_physical{67.0}=0x1
+phy_chain_tx_polarity_flip_physical{68.0}=0x1
+phy_chain_tx_polarity_flip_physical{69.0}=0x0
+phy_chain_tx_polarity_flip_physical{70.0}=0x1
+phy_chain_tx_polarity_flip_physical{71.0}=0x1
+phy_chain_tx_polarity_flip_physical{72.0}=0x1
+phy_chain_tx_polarity_flip_physical{73.0}=0x0
+phy_chain_tx_polarity_flip_physical{74.0}=0x1
+phy_chain_tx_polarity_flip_physical{75.0}=0x1
+phy_chain_tx_polarity_flip_physical{76.0}=0x1
+phy_chain_tx_polarity_flip_physical{77.0}=0x0
+phy_chain_tx_polarity_flip_physical{78.0}=0x0
+phy_chain_tx_polarity_flip_physical{79.0}=0x1
+phy_chain_tx_polarity_flip_physical{80.0}=0x1
+phy_chain_tx_polarity_flip_physical{81.0}=0x1
+phy_chain_tx_polarity_flip_physical{82.0}=0x1
+phy_chain_tx_polarity_flip_physical{83.0}=0x1
+phy_chain_tx_polarity_flip_physical{84.0}=0x1
+phy_chain_tx_polarity_flip_physical{85.0}=0x0
+phy_chain_tx_polarity_flip_physical{86.0}=0x0
+phy_chain_tx_polarity_flip_physical{87.0}=0x1
+phy_chain_tx_polarity_flip_physical{88.0}=0x1
+phy_chain_tx_polarity_flip_physical{89.0}=0x0
+phy_chain_tx_polarity_flip_physical{90.0}=0x1
+phy_chain_tx_polarity_flip_physical{91.0}=0x1
+phy_chain_tx_polarity_flip_physical{92.0}=0x1
+phy_chain_tx_polarity_flip_physical{93.0}=0x0
+phy_chain_tx_polarity_flip_physical{94.0}=0x0
+phy_chain_tx_polarity_flip_physical{95.0}=0x1
+phy_chain_tx_polarity_flip_physical{96.0}=0x1
+phy_chain_tx_polarity_flip_physical{97.0}=0x1
+phy_chain_tx_polarity_flip_physical{98.0}=0x1
+phy_chain_tx_polarity_flip_physical{99.0}=0x1
+phy_chain_tx_polarity_flip_physical{100.0}=0x1
+phy_chain_tx_polarity_flip_physical{101.0}=0x0
+phy_chain_tx_polarity_flip_physical{102.0}=0x1
+phy_chain_tx_polarity_flip_physical{103.0}=0x1
+phy_chain_tx_polarity_flip_physical{104.0}=0x0
+phy_chain_tx_polarity_flip_physical{105.0}=0x1
+phy_chain_tx_polarity_flip_physical{106.0}=0x0
+phy_chain_tx_polarity_flip_physical{107.0}=0x0
+phy_chain_tx_polarity_flip_physical{108.0}=0x0
+phy_chain_tx_polarity_flip_physical{109.0}=0x1
+phy_chain_tx_polarity_flip_physical{110.0}=0x1
+phy_chain_tx_polarity_flip_physical{111.0}=0x0
+phy_chain_tx_polarity_flip_physical{112.0}=0x0
+phy_chain_tx_polarity_flip_physical{113.0}=0x0
+phy_chain_tx_polarity_flip_physical{114.0}=0x0
+phy_chain_tx_polarity_flip_physical{115.0}=0x0
+phy_chain_tx_polarity_flip_physical{116.0}=0x0
+phy_chain_tx_polarity_flip_physical{117.0}=0x1
+phy_chain_tx_polarity_flip_physical{118.0}=0x1
+phy_chain_tx_polarity_flip_physical{119.0}=0x0
+phy_chain_tx_polarity_flip_physical{120.0}=0x0
+phy_chain_tx_polarity_flip_physical{121.0}=0x1
+phy_chain_tx_polarity_flip_physical{122.0}=0x0
+phy_chain_tx_polarity_flip_physical{123.0}=0x0
+phy_chain_tx_polarity_flip_physical{124.0}=0x0
+phy_chain_tx_polarity_flip_physical{125.0}=0x1
+phy_chain_tx_polarity_flip_physical{126.0}=0x1
+phy_chain_tx_polarity_flip_physical{127.0}=0x0
+phy_chain_tx_polarity_flip_physical{128.0}=0x0
+phy_chain_tx_polarity_flip_physical{129.0}=0x0
+portmap_1=1:10:1
+portmap_2=2:10:1
+portmap_3=3:10:1
+portmap_4=4:10:1
+portmap_5=5:10:1
+portmap_6=6:10:1
+portmap_7=7:10:1
+portmap_8=8:10:1
+portmap_9=9:10:1
+portmap_10=10:10:1
+portmap_11=11:10:1
+portmap_12=12:10:1
+portmap_13=13:10:1
+portmap_14=14:10:1
+portmap_15=15:10:1
+portmap_16=16:10:1
+portmap_17=17:10:1
+portmap_18=18:10:1
+portmap_19=19:10:1
+portmap_20=20:10:1
+portmap_21=21:10:1
+portmap_22=22:10:1
+portmap_23=23:10:1
+portmap_24=24:10:1
+portmap_25=25:10:1
+portmap_26=26:10:1
+portmap_27=27:10:1
+portmap_28=28:10:1
+portmap_29=29:10:1
+portmap_30=30:10:1
+portmap_31=31:10:1
+portmap_32=32:10:1
+portmap_33=33:10:1
+portmap_34=34:10:1
+portmap_35=35:10:1
+portmap_36=36:10:1
+portmap_37=37:10:1
+portmap_38=38:10:1
+portmap_39=39:10:1
+portmap_40=40:10:1
+portmap_41=41:10:1
+portmap_42=42:10:1
+portmap_43=43:10:1
+portmap_44=44:10:1
+portmap_45=45:10:1
+portmap_46=46:10:1
+portmap_47=47:10:1
+portmap_48=48:10:1
+portmap_49=49:10:1
+portmap_50=50:10:1
+portmap_51=51:10:1
+portmap_52=52:10:1
+portmap_53=53:10:1
+portmap_54=54:10:1
+portmap_55=55:10:1
+portmap_56=56:10:1
+portmap_57=57:10:1
+portmap_58=58:10:1
+portmap_59=59:10:1
+portmap_60=60:10:1
+portmap_61=61:10:1
+portmap_62=62:10:1
+portmap_63=63:10:1
+portmap_64=64:10:1
+portmap_66=129:10:m
+portmap_67=65:10:1
+portmap_68=66:10:1
+portmap_69=67:10:1
+portmap_70=68:10:1
+portmap_71=69:10:1
+portmap_72=70:10:1
+portmap_73=71:10:1
+portmap_74=72:10:1
+portmap_75=73:10:1
+portmap_76=74:10:1
+portmap_77=75:10:1
+portmap_78=76:10:1
+portmap_79=77:10:1
+portmap_80=78:10:1
+portmap_81=79:10:1
+portmap_82=80:10:1
+portmap_83=81:10:1
+portmap_84=82:10:1
+portmap_85=83:10:1
+portmap_86=84:10:1
+portmap_87=85:10:1
+portmap_88=86:10:1
+portmap_89=87:10:1
+portmap_90=88:10:1
+portmap_91=89:10:1
+portmap_92=90:10:1
+portmap_93=91:10:1
+portmap_94=92:10:1
+portmap_95=93:10:1
+portmap_96=94:10:1
+portmap_97=95:10:1
+portmap_98=96:10:1
+portmap_99=97:10:1
+portmap_100=98:10:1
+portmap_101=99:10:1
+portmap_102=100:10:1
+portmap_103=101:10:1
+portmap_104=102:10:1
+portmap_105=103:10:1
+portmap_106=104:10:1
+portmap_107=105:10:1
+portmap_108=106:10:1
+portmap_109=107:10:1
+portmap_110=108:10:1
+portmap_111=109:10:1
+portmap_112=110:10:1
+portmap_113=111:10:1
+portmap_114=112:10:1
+portmap_115=113:10:1
+portmap_116=114:10:1
+portmap_117=115:10:1
+portmap_118=116:10:1
+portmap_119=117:10:1
+portmap_120=118:10:1
+portmap_121=119:10:1
+portmap_122=120:10:1
+portmap_123=121:10:1
+portmap_124=122:10:1
+portmap_125=123:10:1
+portmap_126=124:10:1
+portmap_127=125:10:1
+portmap_128=126:10:1
+portmap_129=127:10:1
+portmap_130=128:10:1
+serdes_core_rx_polarity_flip_physical{1}=0x8
+serdes_core_rx_polarity_flip_physical{5}=0x2
+serdes_core_rx_polarity_flip_physical{9}=0xc
+serdes_core_rx_polarity_flip_physical{13}=0x3
+serdes_core_rx_polarity_flip_physical{17}=0x4
+serdes_core_rx_polarity_flip_physical{21}=0x3
+serdes_core_rx_polarity_flip_physical{25}=0x6
+serdes_core_rx_polarity_flip_physical{29}=0x3
+serdes_core_rx_polarity_flip_physical{33}=0x4
+serdes_core_rx_polarity_flip_physical{37}=0x3
+serdes_core_rx_polarity_flip_physical{41}=0xc
+serdes_core_rx_polarity_flip_physical{45}=0x3
+serdes_core_rx_polarity_flip_physical{49}=0x4
+serdes_core_rx_polarity_flip_physical{53}=0x3
+serdes_core_rx_polarity_flip_physical{57}=0xc
+serdes_core_rx_polarity_flip_physical{61}=0x3
+serdes_core_rx_polarity_flip_physical{65}=0xb
+serdes_core_rx_polarity_flip_physical{69}=0xc
+serdes_core_rx_polarity_flip_physical{73}=0x7
+serdes_core_rx_polarity_flip_physical{77}=0xc
+serdes_core_rx_polarity_flip_physical{81}=0xb
+serdes_core_rx_polarity_flip_physical{85}=0xc
+serdes_core_rx_polarity_flip_physical{89}=0x7
+serdes_core_rx_polarity_flip_physical{93}=0xc
+serdes_core_rx_polarity_flip_physical{97}=0xb
+serdes_core_rx_polarity_flip_physical{101}=0x9
+serdes_core_rx_polarity_flip_physical{105}=0x7
+serdes_core_rx_polarity_flip_physical{109}=0xc
+serdes_core_rx_polarity_flip_physical{113}=0xb
+serdes_core_rx_polarity_flip_physical{117}=0xc
+serdes_core_rx_polarity_flip_physical{121}=0x7
+serdes_core_rx_polarity_flip_physical{125}=0xc
+serdes_core_rx_polarity_flip_physical{129}=0x0
+serdes_core_tx_polarity_flip_physical{1}=0x3
+serdes_core_tx_polarity_flip_physical{5}=0xb
+serdes_core_tx_polarity_flip_physical{9}=0x3
+serdes_core_tx_polarity_flip_physical{13}=0xb
+serdes_core_tx_polarity_flip_physical{17}=0x0
+serdes_core_tx_polarity_flip_physical{21}=0x3
+serdes_core_tx_polarity_flip_physical{25}=0x4
+serdes_core_tx_polarity_flip_physical{29}=0xc
+serdes_core_tx_polarity_flip_physical{33}=0xf
+serdes_core_tx_polarity_flip_physical{37}=0xc
+serdes_core_tx_polarity_flip_physical{41}=0xe
+serdes_core_tx_polarity_flip_physical{45}=0xc
+serdes_core_tx_polarity_flip_physical{49}=0xf
+serdes_core_tx_polarity_flip_physical{53}=0xc
+serdes_core_tx_polarity_flip_physical{57}=0xe
+serdes_core_tx_polarity_flip_physical{61}=0xc
+serdes_core_tx_polarity_flip_physical{65}=0xf
+serdes_core_tx_polarity_flip_physical{69}=0xe
+serdes_core_tx_polarity_flip_physical{73}=0xe
+serdes_core_tx_polarity_flip_physical{77}=0xc
+serdes_core_tx_polarity_flip_physical{81}=0xf
+serdes_core_tx_polarity_flip_physical{85}=0xc
+serdes_core_tx_polarity_flip_physical{89}=0xe
+serdes_core_tx_polarity_flip_physical{93}=0xc
+serdes_core_tx_polarity_flip_physical{97}=0xf
+serdes_core_tx_polarity_flip_physical{101}=0x6
+serdes_core_tx_polarity_flip_physical{105}=0x1
+serdes_core_tx_polarity_flip_physical{109}=0x3
+serdes_core_tx_polarity_flip_physical{113}=0x0
+serdes_core_tx_polarity_flip_physical{117}=0x3
+serdes_core_tx_polarity_flip_physical{121}=0x1
+serdes_core_tx_polarity_flip_physical{125}=0x3
+serdes_core_tx_polarity_flip_physical{129}=0x0
+serdes_preemphasis_1=0x105004
+serdes_preemphasis_2=0x105004
+serdes_preemphasis_3=0x105004
+serdes_preemphasis_4=0x105004
+serdes_preemphasis_5=0x105004
+serdes_preemphasis_6=0x105004
+serdes_preemphasis_7=0x105004
+serdes_preemphasis_8=0x105004
+serdes_preemphasis_9=0x105004
+serdes_preemphasis_10=0x105004
+serdes_preemphasis_11=0x105004
+serdes_preemphasis_12=0x105004
+serdes_preemphasis_13=0x105004
+serdes_preemphasis_14=0x105004
+serdes_preemphasis_15=0x105004
+serdes_preemphasis_16=0x105004
+serdes_preemphasis_17=0x105004
+serdes_preemphasis_18=0x105004
+serdes_preemphasis_19=0x105004
+serdes_preemphasis_20=0x105004
+serdes_preemphasis_21=0x105004
+serdes_preemphasis_22=0x105004
+serdes_preemphasis_23=0x105004
+serdes_preemphasis_24=0x105004
+serdes_preemphasis_25=0x105004
+serdes_preemphasis_26=0x105004
+serdes_preemphasis_27=0x105004
+serdes_preemphasis_28=0x105004
+serdes_preemphasis_29=0x105004
+serdes_preemphasis_30=0x105004
+serdes_preemphasis_31=0x105004
+serdes_preemphasis_32=0x105004
+serdes_preemphasis_33=0x105004
+serdes_preemphasis_34=0x105004
+serdes_preemphasis_35=0x105004
+serdes_preemphasis_36=0x105004
+serdes_preemphasis_37=0x105004
+serdes_preemphasis_38=0x105004
+serdes_preemphasis_39=0x105004
+serdes_preemphasis_40=0x105004
+serdes_preemphasis_41=0x105004
+serdes_preemphasis_42=0x105004
+serdes_preemphasis_43=0x105004
+serdes_preemphasis_44=0x105004
+serdes_preemphasis_45=0x105004
+serdes_preemphasis_46=0x105004
+serdes_preemphasis_47=0x105004
+serdes_preemphasis_48=0x6004
+serdes_preemphasis_49=0x6004
+serdes_preemphasis_50=0x6004
+serdes_preemphasis_51=0x6004
+serdes_preemphasis_52=0x6004
+serdes_preemphasis_53=0x6004
+serdes_preemphasis_54=0x6004
+serdes_preemphasis_55=0x6004
+serdes_preemphasis_56=0x6004
+serdes_preemphasis_57=0x6004
+serdes_preemphasis_58=0x6004
+serdes_preemphasis_59=0x6004
+serdes_preemphasis_60=0x6004
+serdes_preemphasis_61=0x6004
+serdes_preemphasis_62=0x6004
+serdes_preemphasis_63=0x6004
+serdes_preemphasis_64=0x6004
+serdes_driver_current_66=0xe
+serdes_preemphasis_66=0x102804
+serdes_preemphasis_67=0x6004
+serdes_preemphasis_68=0x6004
+serdes_preemphasis_69=0x6004
+serdes_preemphasis_70=0x6004
+serdes_preemphasis_71=0x6004
+serdes_preemphasis_72=0x6004
+serdes_preemphasis_73=0x6004
+serdes_preemphasis_74=0x6004
+serdes_preemphasis_75=0x6004
+serdes_preemphasis_76=0x6004
+serdes_preemphasis_77=0x6004
+serdes_preemphasis_78=0x6004
+serdes_preemphasis_79=0x6004
+serdes_preemphasis_80=0x6004
+serdes_preemphasis_81=0x6004
+serdes_preemphasis_82=0x105004
+serdes_preemphasis_83=0x105004
+serdes_preemphasis_84=0x105004
+serdes_preemphasis_85=0x105004
+serdes_preemphasis_86=0x105004
+serdes_preemphasis_87=0x105004
+serdes_preemphasis_88=0x105004
+serdes_preemphasis_89=0x105004
+serdes_preemphasis_90=0x105004
+serdes_preemphasis_91=0x105004
+serdes_preemphasis_92=0x105004
+serdes_preemphasis_93=0x105004
+serdes_preemphasis_94=0x105004
+serdes_preemphasis_95=0x105004
+serdes_preemphasis_96=0x105004
+serdes_preemphasis_97=0x105004
+serdes_preemphasis_98=0x105004
+serdes_preemphasis_99=0x105004
+serdes_preemphasis_100=0x105004
+serdes_preemphasis_101=0x105004
+serdes_preemphasis_102=0x105004
+serdes_preemphasis_103=0x105004
+serdes_preemphasis_104=0x105004
+serdes_preemphasis_105=0x105004
+serdes_preemphasis_106=0x105004
+serdes_preemphasis_107=0x105004
+serdes_preemphasis_108=0x105004
+serdes_preemphasis_109=0x105004
+serdes_preemphasis_110=0x105004
+serdes_preemphasis_111=0x105004
+serdes_preemphasis_112=0x105004
+serdes_preemphasis_113=0x105004
+serdes_preemphasis_114=0x105004
+serdes_preemphasis_115=0x105004
+serdes_preemphasis_116=0x105004
+serdes_preemphasis_117=0x105004
+serdes_preemphasis_118=0x105004
+serdes_preemphasis_119=0x105004
+serdes_preemphasis_120=0x105004
+serdes_preemphasis_121=0x105004
+serdes_preemphasis_122=0x105004
+serdes_preemphasis_123=0x105004
+serdes_preemphasis_124=0x105004
+serdes_preemphasis_125=0x105004
+serdes_preemphasis_126=0x105004
+serdes_preemphasis_127=0x105004
+serdes_preemphasis_128=0x105004
+serdes_preemphasis_129=0x105004
+serdes_preemphasis_130=0x105004
diff --git a/device/arista/x86_64-arista_7050cx3_32s/media_settings.json b/device/arista/x86_64-arista_7050cx3_32s/media_settings.json
new file mode 100644
index 00000000000..da448db4d70
--- /dev/null
+++ b/device/arista/x86_64-arista_7050cx3_32s/media_settings.json
@@ -0,0 +1,1116 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "1": {
+            "COPPER10": {
+                "preemphasis": {
+                    "lane0": "0x105004",
+                    "lane1": "0x105004",
+                    "lane2": "0x105004",
+                    "lane3": "0x105004"
+                }
+            },
+            "COPPER25": {
+                "preemphasis": {
+                    "lane0": "0x45808",
+                    "lane1": "0x45808",
+                    "lane2": "0x45808",
+                    "lane3": "0x45808"
+                }
+            },
+            "OPTICAL10": {
+                "preemphasis": {
+                    "lane0": "0x14410a",
+                    "lane1": "0x14410a",
+                    "lane2": "0x14410a",
+                    "lane3": "0x14410a"
+                }
+            },
+            "OPTICAL25": {
+                "preemphasis": {
+                    "lane0": "0x104105",
+                    "lane1": "0x154807",
+                    "lane2": "0x104105",
+                    "lane3": "0x154807"
+                }
+            }
+        },
+        "2": {
+            "COPPER10": {
+                "preemphasis": {
+                    "lane0": "0x105004",
+                    "lane1": "0x105004",
+                    "lane2": "0x105004",
+                    "lane3": "0x105004"
+                }
+            },
+            "COPPER25": {
+                "preemphasis": {
+                    "lane0": "0x45808",
+                    "lane1": "0x45808",
+                    "lane2": "0x45808",
+                    "lane3": "0x45808"
+                }
+            },
+            "OPTICAL10": {
+                "preemphasis": {
+                    "lane0": "0x14410a",
+                    "lane1": "0x14410a",
+                    "lane2": "0x14410a",
+                    "lane3": "0x14410a"
+                }
+            },
+            "OPTICAL25": {
+                "preemphasis": {
+                    "lane0": "0x104105",
+                    "lane1": "0x154807",
+                    "lane2": "0x104105",
+                    "lane3": "0x104105"
+                }
+            }
+        },
+        "3": {
+            "COPPER10": {
+                "preemphasis": {
+                    "lane0": "0x105004",
+                    "lane1": "0x105004",
+                    "lane2": "0x105004",
+                    "lane3": "0x105004"
+                }
+            },
+            "COPPER25": {
+                "preemphasis": {
+                    "lane0": "0x45808",
+                    "lane1": "0x45808",
+                    "lane2": "0x45808",
+                    "lane3": "0x45808"
+                }
+            },
+            "OPTICAL10": {
+                "preemphasis": {
+                    "lane0": "0x14410a",
+                    "lane1": "0x14410a",
+                    "lane2": "0x14410a",
+                    "lane3": "0x14410a"
+                }
+            },
+            "OPTICAL25": {
+                "preemphasis": {
+                    "lane0": "0x104105",
+                    "lane1": "0x104105",
+                    "lane2": "0x104105",
+                    "lane3": "0x104105"
+                }
+            }
+        },
+        "4": {
+            "COPPER10": {
+                "preemphasis": {
+                    "lane0": "0x105004",
+                    "lane1": "0x105004",
+                    "lane2": "0x105004",
+                    "lane3": "0x105004"
+                }
+            },
+            "COPPER25": {
+                "preemphasis": {
+                    "lane0": "0x45808",
+                    "lane1": "0x45808",
+                    "lane2": "0x45808",
+                    "lane3": "0x45808"
+                }
+            },
+            "OPTICAL10": {
+                "preemphasis": {
+                    "lane0": "0x14410a",
+                    "lane1": "0x14410a",
+                    "lane2": "0x14410a",
+                    "lane3": "0x14410a"
+                }
+            },
+            "OPTICAL25": {
+                "preemphasis": {
+                    "lane0": "0x104105",
+                    "lane1": "0x104105",
+                    "lane2": "0x104105",
+                    "lane3": "0x104105"
+                }
+            }
+        },
+        "5": {
+            "COPPER10": {
+                "preemphasis": {
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+            "OPTICAL25": {
+                "preemphasis": {
+                    "lane0": "0xd3e05",
+                    "lane1": "0xd3e05",
+                    "lane2": "0xd3e05",
+                    "lane3": "0xd3e05"
+                }
+            }
+        },
+        "28": {
+            "COPPER10": {
+                "preemphasis": {
+                    "lane0": "0x105004",
+                    "lane1": "0x105004",
+                    "lane2": "0x105004",
+                    "lane3": "0x105004"
+                }
+            },
+            "COPPER25": {
+                "preemphasis": {
+                    "lane0": "0x85804",
+                    "lane1": "0x85804",
+                    "lane2": "0x85804",
+                    "lane3": "0x85804"
+                }
+            },
+            "OPTICAL10": {
+                "preemphasis": {
+                    "lane0": "0x14410a",
+                    "lane1": "0x14410a",
+                    "lane2": "0x14410a",
+                    "lane3": "0x14410a"
+                }
+            },
+            "OPTICAL25": {
+                "preemphasis": {
+                    "lane0": "0xd3e05",
+                    "lane1": "0x104105",
+                    "lane2": "0xd3e05",
+                    "lane3": "0x104105"
+                }
+            }
+        },
+        "29": {
+            "COPPER10": {
+                "preemphasis": {
+                    "lane0": "0x105004",
+                    "lane1": "0x105004",
+                    "lane2": "0x105004",
+                    "lane3": "0x105004"
+                }
+            },
+            "COPPER25": {
+                "preemphasis": {
+                    "lane0": "0x85804",
+                    "lane1": "0x85804",
+                    "lane2": "0x85804",
+                    "lane3": "0x85804"
+                }
+            },
+            "OPTICAL10": {
+                "preemphasis": {
+                    "lane0": "0x14410a",
+                    "lane1": "0x14410a",
+                    "lane2": "0x14410a",
+                    "lane3": "0x14410a"
+                }
+            },
+            "OPTICAL25": {
+                "preemphasis": {
+                    "lane0": "0x104105",
+                    "lane1": "0x104105",
+                    "lane2": "0x104105",
+                    "lane3": "0x104105"
+                }
+            }
+        },
+        "30": {
+            "COPPER10": {
+                "preemphasis": {
+                    "lane0": "0x105004",
+                    "lane1": "0x105004",
+                    "lane2": "0x105004",
+                    "lane3": "0x105004"
+                }
+            },
+            "COPPER25": {
+                "preemphasis": {
+                    "lane0": "0x85804",
+                    "lane1": "0x85804",
+                    "lane2": "0x85804",
+                    "lane3": "0x85804"
+                }
+            },
+            "OPTICAL10": {
+                "preemphasis": {
+                    "lane0": "0x14410a",
+                    "lane1": "0x14410a",
+                    "lane2": "0x14410a",
+                    "lane3": "0x14410a"
+                }
+            },
+            "OPTICAL25": {
+                "preemphasis": {
+                    "lane0": "0xd3e05",
+                    "lane1": "0x104105",
+                    "lane2": "0x104105",
+                    "lane3": "0x104105"
+                }
+            }
+        },
+        "31": {
+            "COPPER10": {
+                "preemphasis": {
+                    "lane0": "0x105004",
+                    "lane1": "0x105004",
+                    "lane2": "0x105004",
+                    "lane3": "0x105004"
+                }
+            },
+            "COPPER25": {
+                "preemphasis": {
+                    "lane0": "0x85804",
+                    "lane1": "0x85804",
+                    "lane2": "0x85804",
+                    "lane3": "0x85804"
+                }
+            },
+            "OPTICAL10": {
+                "preemphasis": {
+                    "lane0": "0x14410a",
+                    "lane1": "0x14410a",
+                    "lane2": "0x14410a",
+                    "lane3": "0x14410a"
+                }
+            },
+            "OPTICAL25": {
+                "preemphasis": {
+                    "lane0": "0x104105",
+                    "lane1": "0x104105",
+                    "lane2": "0x104105",
+                    "lane3": "0x104105"
+                }
+            }
+        },
+        "32": {
+            "COPPER10": {
+                "preemphasis": {
+                    "lane0": "0x105004",
+                    "lane1": "0x105004",
+                    "lane2": "0x105004",
+                    "lane3": "0x105004"
+                }
+            },
+            "COPPER25": {
+                "preemphasis": {
+                    "lane0": "0x85804",
+                    "lane1": "0x85804",
+                    "lane2": "0x85804",
+                    "lane3": "0x85804"
+                }
+            },
+            "OPTICAL10": {
+                "preemphasis": {
+                    "lane0": "0x14410a",
+                    "lane1": "0x14410a",
+                    "lane2": "0x14410a",
+                    "lane3": "0x14410a"
+                }
+            },
+            "OPTICAL25": {
+                "preemphasis": {
+                    "lane0": "0x104105",
+                    "lane1": "0x154807",
+                    "lane2": "0x104105",
+                    "lane3": "0x154807"
+                }
+            }
+        },
+        "33": {
+            "COPPER10": {
+                "preemphasis": {
+                    "lane0": "0x43004"
+                }
+            },
+            "OPTICAL10": {
+                "preemphasis": {
+                    "lane0": "0x102804"
+                }
+            }
+        },
+        "34": {
+            "COPPER10": {
+                "preemphasis": {
+                    "lane0": "0x43004"
+                }
+            },
+            "OPTICAL10": {
+                "preemphasis": {
+                    "lane0": "0x102804"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/media_settings.json b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/media_settings.json
new file mode 100644
index 00000000000..c87165f0ed5
--- /dev/null
+++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/media_settings.json
@@ -0,0 +1,27 @@
+{
+    "GLOBAL_MEDIA_SETTINGS": {
+        "1-6": {
+            ".*": {
+                   "interface_type": "sr4",
+                   "unreliable_los": "on"
+
+            }
+
+        },
+        "11-22": {
+            ".*": {
+                   "interface_type": "sr4",
+                   "unreliable_los": "on"
+
+            }
+
+        },
+        "27-30": {
+            ".*": {
+                   "interface_type": "sr4",
+                   "unreliable_los": "on"
+
+            }
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm
index 27fccd876c7..a6c65ca1212 100644
--- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm
+++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm
@@ -447,6 +447,7 @@ serdes_preemphasis_108=0x145c00
 serdes_driver_current_109=0x4
 serdes_preemphasis_109=0x145c00
 
+sai_interface_type_auto_detect=0
+
 mmu_init_config="MSFT-TH-Tier1"
 phy_an_lt_msft=1
-phy_unlos_msft=1
diff --git a/device/arista/x86_64-arista_7060_cx32s/platform.json b/device/arista/x86_64-arista_7060_cx32s/platform.json
index f322ac0aab8..c976b4dabec 100644
--- a/device/arista/x86_64-arista_7060_cx32s/platform.json
+++ b/device/arista/x86_64-arista_7060_cx32s/platform.json
@@ -15,7 +15,7 @@
                 "name": "Ucd90120A(addr=8-004e)"
             },
             {
-                "name": "CrowSysCpld(addr=2-0023)"
+                "name": "KoiSysCpld(addr=2-0023)"
             }
         ],
         "fans": [],
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffer_ports.j2
index 35b3dd5d135..8a4104663fa 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffer_ports.j2
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffer_ports.j2
@@ -1 +1 @@
-../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffer_ports.j2
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers.json.j2
index 8658b687e28..8dc56adda4e 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers.json.j2
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers.json.j2
@@ -1 +1 @@
-../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers.json.j2
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/buffers.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t0.j2
index 9524e6a476a..a8f0111ea1f 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t0.j2
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t0.j2
@@ -1 +1 @@
-BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t1.j2
index c25cc95d6d5..d918c3cfb0d 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t1.j2
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/buffers_defaults_t1.j2
@@ -1 +1 @@
-BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/pg_profile_lookup.ini
index 297cddb2d22..0fc285468b8 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/pg_profile_lookup.ini
@@ -1 +1 @@
-BALANCED/pg_profile_lookup.ini
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/port_config.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/port_config.ini
index 3bd85b913a6..123aef1ab4b 100644
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/port_config.ini
@@ -31,101 +31,101 @@ Ethernet112  129,130,131,132  etp15a  15     400000  rs
 Ethernet116  133,134,135,136  etp15b  15     400000  rs
 Ethernet120  113,114,115,116  etp16a  16     400000  rs
 Ethernet124  117,118,119,120  etp16b  16     400000  rs
-Ethernet128  405,406,407,408  etp17a  17     400000  rs
-Ethernet132  401,402,403,404  etp17b  17     400000  rs
-Ethernet136  397,398,399,400  etp17c  17     400000  rs
-Ethernet140  393,394,395,396  etp17d  17     400000  rs
-Ethernet144  421,422,423,424  etp17e  17     400000  rs
-Ethernet148  417,418,419,420  etp17f  17     400000  rs
-Ethernet152  413,414,415,416  etp17g  17     400000  rs
-Ethernet156  409,410,411,412  etp17h  17     400000  rs
-Ethernet160  425,426,427,428  etp17i  17     400000  rs
-Ethernet164  429,430,431,432  etp17j  17     400000  rs
-Ethernet168  445,446,447,448  etp17k  17     400000  rs
-Ethernet172  441,442,443,444  etp17l  17     400000  rs
-Ethernet176  61,62,63,64      etp18a  18     400000  rs
-Ethernet180  57,58,59,60      etp18b  18     400000  rs
-Ethernet184  45,46,47,48      etp18c  18     400000  rs
-Ethernet188  41,42,43,44      etp18d  18     400000  rs
-Ethernet192  37,38,39,40      etp18e  18     400000  rs
-Ethernet196  33,34,35,36      etp18f  18     400000  rs
-Ethernet200  29,30,31,32      etp18g  18     400000  rs
-Ethernet204  25,26,27,28      etp18h  18     400000  rs
-Ethernet208  21,22,23,24      etp18i  18     400000  rs
-Ethernet212  17,18,19,20      etp18j  18     400000  rs
-Ethernet216  1,2,3,4          etp18k  18     400000  rs
-Ethernet220  5,6,7,8          etp18l  18     400000  rs
-Ethernet224  509,510,511,512  etp19a  19     400000  rs
-Ethernet228  505,506,507,508  etp19b  19     400000  rs
-Ethernet232  489,490,491,492  etp19c  19     400000  rs
-Ethernet236  493,494,495,496  etp19d  19     400000  rs
-Ethernet240  485,486,487,488  etp19e  19     400000  rs
-Ethernet244  481,482,483,484  etp19f  19     400000  rs
-Ethernet248  477,478,479,480  etp19g  19     400000  rs
-Ethernet252  473,474,475,476  etp19h  19     400000  rs
-Ethernet256  465,466,467,468  etp19i  19     400000  rs
-Ethernet260  469,470,471,472  etp19j  19     400000  rs
-Ethernet264  457,458,459,460  etp19k  19     400000  rs
-Ethernet268  461,462,463,464  etp19l  19     400000  rs
-Ethernet272  81,82,83,84      etp20a  20     400000  rs
-Ethernet276  85,86,87,88      etp20b  20     400000  rs
-Ethernet280  73,74,75,76      etp20c  20     400000  rs
-Ethernet284  77,78,79,80      etp20d  20     400000  rs
-Ethernet288  97,98,99,100     etp20e  20     400000  rs
-Ethernet292  101,102,103,104  etp20f  20     400000  rs
-Ethernet296  89,90,91,92      etp20g  20     400000  rs
-Ethernet300  93,94,95,96      etp20h  20     400000  rs
-Ethernet304  105,106,107,108  etp20i  20     400000  rs
-Ethernet308  109,110,111,112  etp20j  20     400000  rs
-Ethernet312  121,122,123,124  etp20k  20     400000  rs
-Ethernet316  125,126,127,128  etp20l  20     400000  rs
-Ethernet320  329,330,331,332  etp21a  21     400000  rs
-Ethernet324  333,334,335,336  etp21b  21     400000  rs
-Ethernet328  337,338,339,340  etp21c  21     400000  rs
-Ethernet332  345,346,347,348  etp21d  21     400000  rs
-Ethernet336  349,350,351,352  etp21e  21     400000  rs
-Ethernet340  341,342,343,344  etp21f  21     400000  rs
-Ethernet344  353,354,355,356  etp21g  21     400000  rs
-Ethernet348  361,362,363,364  etp21h  21     400000  rs
-Ethernet352  365,366,367,368  etp21i  21     400000  rs
-Ethernet356  357,358,359,360  etp21j  21     400000  rs
-Ethernet360  377,378,379,380  etp21k  21     400000  rs
-Ethernet364  381,382,383,384  etp21l  21     400000  rs
-Ethernet368  261,262,263,264  etp22a  22     400000  rs
-Ethernet372  257,258,259,260  etp22b  22     400000  rs
+Ethernet128  101,102,103,104  etp17a  17     400000  rs
+Ethernet132  97,98,99,100     etp17b  17     400000  rs
+Ethernet136  125,126,127,128  etp17c  17     400000  rs
+Ethernet140  121,122,123,124  etp17d  17     400000  rs
+Ethernet144  77,78,79,80      etp17e  17     400000  rs
+Ethernet148  73,74,75,76      etp17f  17     400000  rs
+Ethernet152  109,110,111,112  etp17g  17     400000  rs
+Ethernet156  105,106,107,108  etp17h  17     400000  rs
+Ethernet160  85,86,87,88      etp17i  17     400000  rs
+Ethernet164  81,82,83,84      etp17j  17     400000  rs
+Ethernet168  93,94,95,96      etp17k  17     400000  rs
+Ethernet172  89,90,91,92      etp17l  17     400000  rs
+Ethernet176  189,190,191,192  etp18a  18     400000  rs
+Ethernet180  185,186,187,188  etp18b  18     400000  rs
+Ethernet184  149,150,151,152  etp18c  18     400000  rs
+Ethernet188  157,158,159,160  etp18d  18     400000  rs
+Ethernet192  165,166,167,168  etp18e  18     400000  rs
+Ethernet196  173,174,175,176  etp18f  18     400000  rs
+Ethernet200  153,154,155,156  etp18g  18     400000  rs
+Ethernet204  145,146,147,148  etp18h  18     400000  rs
+Ethernet208  169,170,171,172  etp18i  18     400000  rs
+Ethernet212  161,162,163,164  etp18j  18     400000  rs
+Ethernet216  141,142,143,144  etp18k  18     400000  rs
+Ethernet220  137,138,139,140  etp18l  18     400000  rs
+Ethernet224  37,38,39,40      etp19a  19     400000  rs
+Ethernet228  33,34,35,36      etp19b  19     400000  rs
+Ethernet232  5,6,7,8          etp19c  19     400000  rs
+Ethernet236  1,2,3,4          etp19d  19     400000  rs
+Ethernet240  45,46,47,48      etp19e  19     400000  rs
+Ethernet244  41,42,43,44      etp19f  19     400000  rs
+Ethernet248  21,22,23,24      etp19g  19     400000  rs
+Ethernet252  17,18,19,20      etp19h  19     400000  rs
+Ethernet256  61,62,63,64      etp19i  19     400000  rs
+Ethernet260  57,58,59,60      etp19j  19     400000  rs
+Ethernet264  29,30,31,32      etp19k  19     400000  rs
+Ethernet268  25,26,27,28      etp19l  19     400000  rs
+Ethernet272  253,254,255,256  etp20a  20     400000  rs
+Ethernet276  249,250,251,252  etp20b  20     400000  rs
+Ethernet280  213,214,215,216  etp20c  20     400000  rs
+Ethernet284  221,222,223,224  etp20d  20     400000  rs
+Ethernet288  229,230,231,232  etp20e  20     400000  rs
+Ethernet292  237,238,239,240  etp20f  20     400000  rs
+Ethernet296  217,218,219,220  etp20g  20     400000  rs
+Ethernet300  209,210,211,212  etp20h  20     400000  rs
+Ethernet304  233,234,235,236  etp20i  20     400000  rs
+Ethernet308  225,226,227,228  etp20j  20     400000  rs
+Ethernet312  205,206,207,208  etp20k  20     400000  rs
+Ethernet316  201,202,203,204  etp20l  20     400000  rs
+Ethernet320  485,486,487,488  etp21a  21     400000  rs
+Ethernet324  481,482,483,484  etp21b  21     400000  rs
+Ethernet328  461,462,463,464  etp21c  21     400000  rs
+Ethernet332  457,458,459,460  etp21d  21     400000  rs
+Ethernet336  493,494,495,496  etp21e  21     400000  rs
+Ethernet340  489,490,491,492  etp21f  21     400000  rs
+Ethernet344  469,470,471,472  etp21g  21     400000  rs
+Ethernet348  465,466,467,468  etp21h  21     400000  rs
+Ethernet352  509,510,511,512  etp21i  21     400000  rs
+Ethernet356  505,506,507,508  etp21j  21     400000  rs
+Ethernet360  477,478,479,480  etp21k  21     400000  rs
+Ethernet364  473,474,475,476  etp21l  21     400000  rs
+Ethernet368  317,318,319,320  etp22a  22     400000  rs
+Ethernet372  313,314,315,316  etp22b  22     400000  rs
 Ethernet376  285,286,287,288  etp22c  22     400000  rs
 Ethernet380  277,278,279,280  etp22d  22     400000  rs
-Ethernet384  273,274,275,276  etp22e  22     400000  rs
-Ethernet388  281,282,283,284  etp22f  22     400000  rs
-Ethernet392  293,294,295,296  etp22g  22     400000  rs
-Ethernet396  297,298,299,300  etp22h  22     400000  rs
-Ethernet400  301,302,303,304  etp22i  22     400000  rs
+Ethernet384  293,294,295,296  etp22e  22     400000  rs
+Ethernet388  301,302,303,304  etp22f  22     400000  rs
+Ethernet392  273,274,275,276  etp22g  22     400000  rs
+Ethernet396  281,282,283,284  etp22h  22     400000  rs
+Ethernet400  297,298,299,300  etp22i  22     400000  rs
 Ethernet404  289,290,291,292  etp22j  22     400000  rs
-Ethernet408  313,314,315,316  etp22k  22     400000  rs
-Ethernet412  317,318,319,320  etp22l  22     400000  rs
-Ethernet416  205,206,207,208  etp23a  23     400000  rs
-Ethernet420  201,202,203,204  etp23b  23     400000  rs
-Ethernet424  213,214,215,216  etp23c  23     400000  rs
-Ethernet428  217,218,219,220  etp23d  23     400000  rs
-Ethernet432  221,222,223,224  etp23e  23     400000  rs
-Ethernet436  209,210,211,212  etp23f  23     400000  rs
-Ethernet440  225,226,227,228  etp23g  23     400000  rs
-Ethernet444  233,234,235,236  etp23h  23     400000  rs
-Ethernet448  237,238,239,240  etp23i  23     400000  rs
-Ethernet452  229,230,231,232  etp23j  23     400000  rs
-Ethernet456  249,250,251,252  etp23k  23     400000  rs
-Ethernet460  253,254,255,256  etp23l  23     400000  rs
-Ethernet464  141,142,143,144  etp24a  24     400000  rs
-Ethernet468  137,138,139,140  etp24b  24     400000  rs
-Ethernet472  149,150,151,152  etp24c  24     400000  rs
-Ethernet476  157,158,159,160  etp24d  24     400000  rs
-Ethernet480  153,154,155,156  etp24e  24     400000  rs
-Ethernet484  145,146,147,148  etp24f  24     400000  rs
-Ethernet488  165,166,167,168  etp24g  24     400000  rs
-Ethernet492  173,174,175,176  etp24h  24     400000  rs
-Ethernet496  169,170,171,172  etp24i  24     400000  rs
-Ethernet500  161,162,163,164  etp24j  24     400000  rs
-Ethernet504  189,190,191,192  etp24k  24     400000  rs
-Ethernet508  185,186,187,188  etp24l  24     400000  rs
+Ethernet408  261,262,263,264  etp22k  22     400000  rs
+Ethernet412  257,258,259,260  etp22l  22     400000  rs
+Ethernet416  421,422,423,424  etp23a  23     400000  rs
+Ethernet420  417,418,419,420  etp23b  23     400000  rs
+Ethernet424  445,446,447,448  etp23c  23     400000  rs
+Ethernet428  441,442,443,444  etp23d  23     400000  rs
+Ethernet432  397,398,399,400  etp23e  23     400000  rs
+Ethernet436  393,394,395,396  etp23f  23     400000  rs
+Ethernet440  429,430,431,432  etp23g  23     400000  rs
+Ethernet444  425,426,427,428  etp23h  23     400000  rs
+Ethernet448  405,406,407,408  etp23i  23     400000  rs
+Ethernet452  401,402,403,404  etp23j  23     400000  rs
+Ethernet456  413,414,415,416  etp23k  23     400000  rs
+Ethernet460  409,410,411,412  etp23l  23     400000  rs
+Ethernet464  381,382,383,384  etp24a  24     400000  rs
+Ethernet468  377,378,379,380  etp24b  24     400000  rs
+Ethernet472  341,342,343,344  etp24c  24     400000  rs
+Ethernet476  349,350,351,352  etp24d  24     400000  rs
+Ethernet480  357,358,359,360  etp24e  24     400000  rs
+Ethernet484  365,366,367,368  etp24f  24     400000  rs
+Ethernet488  345,346,347,348  etp24g  24     400000  rs
+Ethernet492  337,338,339,340  etp24h  24     400000  rs
+Ethernet496  361,362,363,364  etp24i  24     400000  rs
+Ethernet500  353,354,355,356  etp24j  24     400000  rs
+Ethernet504  333,334,335,336  etp24k  24     400000  rs
+Ethernet508  329,330,331,332  etp24l  24     400000  rs
 Ethernet512  513              etp25a  25     10000   none
 Ethernet513  514              etp25b  25     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/qos.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/qos.json.j2
index 1d89e90b055..7a121389849 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/qos.json.j2
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/qos.json.j2
@@ -1 +1 @@
-../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/qos.json.j2
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/qos.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/sai.profile
deleted file mode 100644
index f299df75d26..00000000000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/sai.profile
+++ /dev/null
@@ -1 +0,0 @@
-SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-16pe-384c.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/sai.profile
new file mode 120000
index 00000000000..20332651617
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/sai.profile
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-O128S2/sai.profile
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/th5-a7060x6-16pe-384c.config.bcm
index ed6f6155129..b846dd8ac28 100644
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/th5-a7060x6-16pe-384c.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/th5-a7060x6-16pe-384c.config.bcm
@@ -34,6 +34,7 @@ bcm_device:
             l3_alpm_template: 1
             l3_alpm_hit_skip: 1
             sai_feat_tail_timestamp : 1
+            sai_mmu_custom_config : 1
             sai_port_phy_time_sync_en : 1
             sai_field_group_auto_prioritize: 1
             #l3_intf_vlan_split_egress for MTU at L3IF
@@ -42,6 +43,7 @@ bcm_device:
             sai_tunnel_support: 2
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
@@ -50,10 +52,10 @@ device:
                 PC_PM_ID: 1
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x45670123
-                TX_LANE_MAP: 0x45670123
-                RX_POLARITY_FLIP: 0x19
-                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP: 0x76543210
+                TX_LANE_MAP: 0x76543210
+                RX_POLARITY_FLIP: 0x89
+                TX_POLARITY_FLIP: 0x55
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -74,10 +76,10 @@ device:
                 PC_PM_ID: 3
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01452367
-                TX_LANE_MAP: 0x01452367
-                RX_POLARITY_FLIP: 0xa5
-                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP: 0x54107632
+                TX_LANE_MAP: 0x54107632
+                RX_POLARITY_FLIP: 0x5a
+                TX_POLARITY_FLIP: 0x55
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -86,10 +88,10 @@ device:
                 PC_PM_ID: 4
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x45016723
-                TX_LANE_MAP: 0x45016723
-                RX_POLARITY_FLIP: 0x55
-                TX_POLARITY_FLIP: 0xa5
+                RX_LANE_MAP: 0x10543276
+                TX_LANE_MAP: 0x10543276
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x5a
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -98,10 +100,10 @@ device:
                 PC_PM_ID: 5
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01452367
-                TX_LANE_MAP: 0x30542167
-                RX_POLARITY_FLIP: 0x86
-                TX_POLARITY_FLIP: 0x87
+                RX_LANE_MAP: 0x54107632
+                TX_LANE_MAP: 0x45037612
+                RX_POLARITY_FLIP: 0x16
+                TX_POLARITY_FLIP: 0x1e
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -110,10 +112,10 @@ device:
                 PC_PM_ID: 6
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x30271564
-                TX_LANE_MAP: 0x47036152
-                RX_POLARITY_FLIP: 0xd2
-                TX_POLARITY_FLIP: 0x86
+                RX_LANE_MAP: 0x72034651
+                TX_LANE_MAP: 0x30742516
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0x16
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -134,10 +136,10 @@ device:
                 PC_PM_ID: 8
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x20315746
-                TX_LANE_MAP: 0x65471023
-                RX_POLARITY_FLIP: 0x65
-                TX_POLARITY_FLIP: 0x6c
+                RX_LANE_MAP: 0x13026475
+                TX_LANE_MAP: 0x74563201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -158,10 +160,10 @@ device:
                 PC_PM_ID: 10
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x67450123
-                TX_LANE_MAP: 0x02136457
-                RX_POLARITY_FLIP: 0x36
-                TX_POLARITY_FLIP: 0x59
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x31207546
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xa9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -170,10 +172,10 @@ device:
                 PC_PM_ID: 11
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x67450123
-                TX_LANE_MAP: 0x03124657
-                RX_POLARITY_FLIP: 0x36
-                TX_POLARITY_FLIP: 0x55
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x21307564
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xaa
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -182,10 +184,10 @@ device:
                 PC_PM_ID: 12
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x67450123
-                TX_LANE_MAP: 0x02136457
-                RX_POLARITY_FLIP: 0x36
-                TX_POLARITY_FLIP: 0x59
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x31207546
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xa9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -194,10 +196,10 @@ device:
                 PC_PM_ID: 13
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x67450123
-                TX_LANE_MAP: 0x03124657
-                RX_POLARITY_FLIP: 0x36
-                TX_POLARITY_FLIP: 0x55
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x21307564
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xaa
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -206,10 +208,10 @@ device:
                 PC_PM_ID: 14
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x45617023
-                TX_LANE_MAP: 0x12076435
-                RX_POLARITY_FLIP: 0xd2
-                TX_POLARITY_FLIP: 0x5a
+                RX_LANE_MAP: 0x16543207
+                TX_LANE_MAP: 0x70215346
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0xa5
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -218,8 +220,8 @@ device:
                 PC_PM_ID: 15
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01235746
-                TX_LANE_MAP: 0x01324675
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x1324675
                 RX_POLARITY_FLIP: 0x95
                 TX_POLARITY_FLIP: 0x36
                 RX_LANE_MAP_AUTO: 0
@@ -230,10 +232,10 @@ device:
                 PC_PM_ID: 16
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x67450123
-                TX_LANE_MAP: 0x13026475
-                RX_POLARITY_FLIP: 0x36
-                TX_POLARITY_FLIP: 0x5a
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x20315746
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xa5
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -254,10 +256,10 @@ device:
                 PC_PM_ID: 18
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x10325746
-                TX_LANE_MAP: 0x75643201
-                RX_POLARITY_FLIP: 0xd8
-                TX_POLARITY_FLIP: 0x9b
+                RX_LANE_MAP: 0x23016475
+                TX_LANE_MAP: 0x46571023
+                RX_POLARITY_FLIP: 0xb1
+                TX_POLARITY_FLIP: 0x9d
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -266,10 +268,10 @@ device:
                 PC_PM_ID: 19
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x10325764
-                TX_LANE_MAP: 0x75643210
-                RX_POLARITY_FLIP: 0xde
-                TX_POLARITY_FLIP: 0x9d
+                RX_LANE_MAP: 0x23014675
+                TX_LANE_MAP: 0x46570123
+                RX_POLARITY_FLIP: 0xb7
+                TX_POLARITY_FLIP: 0x9b
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -278,10 +280,10 @@ device:
                 PC_PM_ID: 20
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57640123
-                TX_LANE_MAP: 0x32105746
-                RX_POLARITY_FLIP: 0xaf
-                TX_POLARITY_FLIP: 0x97
+                RX_LANE_MAP: 0x32104675
+                TX_LANE_MAP: 0x64750123
+                RX_POLARITY_FLIP: 0xf5
+                TX_POLARITY_FLIP: 0xe9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -290,10 +292,10 @@ device:
                 PC_PM_ID: 21
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x10237564
-                TX_LANE_MAP: 0x75462310
-                RX_POLARITY_FLIP: 0xeb
-                TX_POLARITY_FLIP: 0xa8
+                RX_LANE_MAP: 0x32014657
+                TX_LANE_MAP: 0x64570132
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0x51
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -302,10 +304,10 @@ device:
                 PC_PM_ID: 22
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57640123
-                TX_LANE_MAP: 0x32105746
-                RX_POLARITY_FLIP: 0xeb
-                TX_POLARITY_FLIP: 0xd3
+                RX_LANE_MAP: 0x32104675
+                TX_LANE_MAP: 0x64750123
+                RX_POLARITY_FLIP: 0xd7
+                TX_POLARITY_FLIP: 0xcb
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -326,10 +328,10 @@ device:
                 PC_PM_ID: 24
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01237564
-                TX_LANE_MAP: 0x57462310
-                RX_POLARITY_FLIP: 0xbe
-                TX_POLARITY_FLIP: 0x3d
+                RX_LANE_MAP: 0x32104657
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0xd7
+                TX_POLARITY_FLIP: 0xcb
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -350,10 +352,10 @@ device:
                 PC_PM_ID: 26
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x10325746
-                TX_LANE_MAP: 0x75643201
-                RX_POLARITY_FLIP: 0x98
-                TX_POLARITY_FLIP: 0x9b
+                RX_LANE_MAP: 0x23016475
+                TX_LANE_MAP: 0x46571023
+                RX_POLARITY_FLIP: 0xb1
+                TX_POLARITY_FLIP: 0x9d
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -362,10 +364,10 @@ device:
                 PC_PM_ID: 27
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x10325764
-                TX_LANE_MAP: 0x75643210
-                RX_POLARITY_FLIP: 0xde
-                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP: 0x23014675
+                TX_LANE_MAP: 0x46570123
+                RX_POLARITY_FLIP: 0xb7
+                TX_POLARITY_FLIP: 0x93
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -374,9 +376,9 @@ device:
                 PC_PM_ID: 28
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x32017456
-                TX_LANE_MAP: 0x01234576
-                RX_POLARITY_FLIP: 0x09
+                RX_LANE_MAP: 0x65471023
+                TX_LANE_MAP: 0x67543210
+                RX_POLARITY_FLIP: 0x90
                 TX_POLARITY_FLIP: 0x00
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
@@ -386,10 +388,10 @@ device:
                 PC_PM_ID: 29
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x75461302
-                TX_LANE_MAP: 0x75461302
-                RX_POLARITY_FLIP: 0xeb
-                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP: 0x64572031
+                TX_LANE_MAP: 0x64572031
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0xc6
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -398,10 +400,10 @@ device:
                 PC_PM_ID: 30
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x31025746
-                TX_LANE_MAP: 0x31025746
-                RX_POLARITY_FLIP: 0x05
-                TX_POLARITY_FLIP: 0x6f
+                RX_LANE_MAP: 0x64752013
+                TX_LANE_MAP: 0x64752013
+                RX_POLARITY_FLIP: 0xa0
+                TX_POLARITY_FLIP: 0xf6
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -422,10 +424,10 @@ device:
                 PC_PM_ID: 32
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57461302
-                TX_LANE_MAP: 0x57461302
-                RX_POLARITY_FLIP: 0x50
-                TX_POLARITY_FLIP: 0xfa
+                RX_LANE_MAP: 0x64752031
+                TX_LANE_MAP: 0x64752031
+                RX_POLARITY_FLIP: 0xa0
+                TX_POLARITY_FLIP: 0xf5
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -434,10 +436,10 @@ device:
                 PC_PM_ID: 33
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x13025746
-                TX_LANE_MAP: 0x13025746
-                RX_POLARITY_FLIP: 0x05
-                TX_POLARITY_FLIP: 0xaf
+                RX_LANE_MAP: 0x20316475
+                TX_LANE_MAP: 0x20316475
+                RX_POLARITY_FLIP: 0xa
+                TX_POLARITY_FLIP: 0x5f
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -458,10 +460,10 @@ device:
                 PC_PM_ID: 35
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57643120
-                TX_LANE_MAP: 0x57643120
-                RX_POLARITY_FLIP: 0x41
-                TX_POLARITY_FLIP: 0xd4
+                RX_LANE_MAP: 0x2134675
+                TX_LANE_MAP: 0x2134675
+                RX_POLARITY_FLIP: 0x82
+                TX_POLARITY_FLIP: 0x2b
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -470,10 +472,10 @@ device:
                 PC_PM_ID: 36
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x13025764
-                TX_LANE_MAP: 0x13025764
-                RX_POLARITY_FLIP: 0xed
-                TX_POLARITY_FLIP: 0x33
+                RX_LANE_MAP: 0x20314675
+                TX_LANE_MAP: 0x20314675
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0xcc
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -482,10 +484,10 @@ device:
                 PC_PM_ID: 37
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23104765
-                TX_LANE_MAP: 0x10325467
-                RX_POLARITY_FLIP: 0x81
-                TX_POLARITY_FLIP: 0x87
+                RX_LANE_MAP: 0x1325674
+                TX_LANE_MAP: 0x23017645
+                RX_POLARITY_FLIP: 0x18
+                TX_POLARITY_FLIP: 0x1e
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -494,10 +496,10 @@ device:
                 PC_PM_ID: 38
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01325746
-                TX_LANE_MAP: 0x57643201
-                RX_POLARITY_FLIP: 0xd8
-                TX_POLARITY_FLIP: 0x59
+                RX_LANE_MAP: 0x64752310
+                TX_LANE_MAP: 0x10234675
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0x9a
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -506,8 +508,8 @@ device:
                 PC_PM_ID: 39
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01237564
-                TX_LANE_MAP: 0x01326475
+                RX_LANE_MAP: 0x1237564
+                TX_LANE_MAP: 0x1326475
                 RX_POLARITY_FLIP: 0xbb
                 TX_POLARITY_FLIP: 0xe3
                 RX_LANE_MAP_AUTO: 0
@@ -518,10 +520,10 @@ device:
                 PC_PM_ID: 40
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57461032
-                TX_LANE_MAP: 0x32017564
-                RX_POLARITY_FLIP: 0x8d
-                TX_POLARITY_FLIP: 0xb9
+                RX_LANE_MAP: 0x64752301
+                TX_LANE_MAP: 0x10234657
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0xd9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -530,8 +532,8 @@ device:
                 PC_PM_ID: 41
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01237564
-                TX_LANE_MAP: 0x01326475
+                RX_LANE_MAP: 0x1237564
+                TX_LANE_MAP: 0x1326475
                 RX_POLARITY_FLIP: 0xbb
                 TX_POLARITY_FLIP: 0xe3
                 RX_LANE_MAP_AUTO: 0
@@ -542,10 +544,10 @@ device:
                 PC_PM_ID: 42
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x75640123
-                TX_LANE_MAP: 0x23105746
-                RX_POLARITY_FLIP: 0xeb
-                TX_POLARITY_FLIP: 0xd3
+                RX_LANE_MAP: 0x46573210
+                TX_LANE_MAP: 0x1326475
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0xbc
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -554,10 +556,10 @@ device:
                 PC_PM_ID: 43
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x75640132
-                TX_LANE_MAP: 0x23105764
-                RX_POLARITY_FLIP: 0xed
-                TX_POLARITY_FLIP: 0xd5
+                RX_LANE_MAP: 0x46572310
+                TX_LANE_MAP: 0x1324675
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0xba
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -566,10 +568,10 @@ device:
                 PC_PM_ID: 44
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01325746
-                TX_LANE_MAP: 0x57643201
-                RX_POLARITY_FLIP: 0x9c
-                TX_POLARITY_FLIP: 0x1f
+                RX_LANE_MAP: 0x64752310
+                TX_LANE_MAP: 0x10234675
+                RX_POLARITY_FLIP: 0x39
+                TX_POLARITY_FLIP: 0xf8
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -578,10 +580,10 @@ device:
                 PC_PM_ID: 45
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x75461032
-                TX_LANE_MAP: 0x23017564
-                RX_POLARITY_FLIP: 0xd8
-                TX_POLARITY_FLIP: 0xec
+                RX_LANE_MAP: 0x64572301
+                TX_LANE_MAP: 0x10324657
+                RX_POLARITY_FLIP: 0xb1
+                TX_POLARITY_FLIP: 0x73
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -590,10 +592,10 @@ device:
                 PC_PM_ID: 46
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01325746
-                TX_LANE_MAP: 0x57643201
-                RX_POLARITY_FLIP: 0xd8
-                TX_POLARITY_FLIP: 0x5b
+                RX_LANE_MAP: 0x64752310
+                TX_LANE_MAP: 0x10234675
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0xda
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -602,8 +604,8 @@ device:
                 PC_PM_ID: 47
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01237564
-                TX_LANE_MAP: 0x01326475
+                RX_LANE_MAP: 0x1237564
+                TX_LANE_MAP: 0x1326475
                 RX_POLARITY_FLIP: 0xbb
                 TX_POLARITY_FLIP: 0xe3
                 RX_LANE_MAP_AUTO: 0
@@ -614,10 +616,10 @@ device:
                 PC_PM_ID: 48
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57461032
-                TX_LANE_MAP: 0x32017564
-                RX_POLARITY_FLIP: 0x8d
-                TX_POLARITY_FLIP: 0xb9
+                RX_LANE_MAP: 0x64752301
+                TX_LANE_MAP: 0x10234657
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0xd9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -638,10 +640,10 @@ device:
                 PC_PM_ID: 50
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23014657
-                TX_LANE_MAP: 0x64571023
-                RX_POLARITY_FLIP: 0x65
-                TX_POLARITY_FLIP: 0x6c
+                RX_LANE_MAP: 0x10327564
+                TX_LANE_MAP: 0x75463201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -650,10 +652,10 @@ device:
                 PC_PM_ID: 51
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x32106475
-                TX_LANE_MAP: 0x46750132
-                RX_POLARITY_FLIP: 0x9a
-                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x57642310
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x93
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -662,10 +664,10 @@ device:
                 PC_PM_ID: 52
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23014657
-                TX_LANE_MAP: 0x64571023
-                RX_POLARITY_FLIP: 0x65
-                TX_POLARITY_FLIP: 0x6c
+                RX_LANE_MAP: 0x10327564
+                TX_LANE_MAP: 0x75463201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -674,10 +676,10 @@ device:
                 PC_PM_ID: 53
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x32106475
-                TX_LANE_MAP: 0x46750132
-                RX_POLARITY_FLIP: 0x9a
-                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x57642310
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x93
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -686,10 +688,10 @@ device:
                 PC_PM_ID: 54
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x34152607
-                TX_LANE_MAP: 0x46720153
-                RX_POLARITY_FLIP: 0x87
-                TX_POLARITY_FLIP: 0x8e
+                RX_LANE_MAP: 0x51437062
+                TX_LANE_MAP: 0x27643510
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x17
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -698,8 +700,8 @@ device:
                 PC_PM_ID: 55
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01235746
-                TX_LANE_MAP: 0x01324675
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x1324675
                 RX_POLARITY_FLIP: 0x95
                 TX_POLARITY_FLIP: 0x36
                 RX_LANE_MAP_AUTO: 0
@@ -710,10 +712,10 @@ device:
                 PC_PM_ID: 56
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23014657
-                TX_LANE_MAP: 0x64571023
-                RX_POLARITY_FLIP: 0x65
-                TX_POLARITY_FLIP: 0x6c
+                RX_LANE_MAP: 0x10327564
+                TX_LANE_MAP: 0x75463201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -722,8 +724,8 @@ device:
                 PC_PM_ID: 57
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01235746
-                TX_LANE_MAP: 0x01324675
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x1324675
                 RX_POLARITY_FLIP: 0x95
                 TX_POLARITY_FLIP: 0x36
                 RX_LANE_MAP_AUTO: 0
@@ -734,10 +736,10 @@ device:
                 PC_PM_ID: 58
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x45670123
-                TX_LANE_MAP: 0x12034675
-                RX_POLARITY_FLIP: 0xc6
-                TX_POLARITY_FLIP: 0x56
+                RX_LANE_MAP: 0x76543210
+                TX_LANE_MAP: 0x30215764
+                RX_POLARITY_FLIP: 0x36
+                TX_POLARITY_FLIP: 0xa6
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -746,10 +748,10 @@ device:
                 PC_PM_ID: 59
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x45670123
-                TX_LANE_MAP: 0x12036457
-                RX_POLARITY_FLIP: 0xc6
-                TX_POLARITY_FLIP: 0x79
+                RX_LANE_MAP: 0x76543210
+                TX_LANE_MAP: 0x30217546
+                RX_POLARITY_FLIP: 0x36
+                TX_POLARITY_FLIP: 0xe9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -758,10 +760,10 @@ device:
                 PC_PM_ID: 60
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23016745
-                TX_LANE_MAP: 0x32016754
-                RX_POLARITY_FLIP: 0x97
-                TX_POLARITY_FLIP: 0x63
+                RX_LANE_MAP: 0x10325476
+                TX_LANE_MAP: 0x10234576
+                RX_POLARITY_FLIP: 0x9e
+                TX_POLARITY_FLIP: 0x6c
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -770,9 +772,9 @@ device:
                 PC_PM_ID: 61
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x03214567
-                TX_LANE_MAP: 0x23016745
-                RX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP: 0x12307654
+                TX_LANE_MAP: 0x10325476
+                RX_POLARITY_FLIP: 0x55
                 TX_POLARITY_FLIP: 0x99
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
@@ -782,10 +784,10 @@ device:
                 PC_PM_ID: 62
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23670145
-                TX_LANE_MAP: 0x23670145
-                RX_POLARITY_FLIP: 0xa5
-                TX_POLARITY_FLIP: 0x55
+                RX_LANE_MAP: 0x76325410
+                TX_LANE_MAP: 0x76325410
+                RX_POLARITY_FLIP: 0x5a
+                TX_POLARITY_FLIP: 0xaa
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -795,7 +797,7 @@ device:
                 CORE_INDEX: 0
             :
                 RX_LANE_MAP: 0x75643120
-                TX_LANE_MAP: 0x02134657
+                TX_LANE_MAP: 0x2134657
                 RX_POLARITY_FLIP: 0xcc
                 TX_POLARITY_FLIP: 0x66
                 RX_LANE_MAP_AUTO: 0
@@ -806,10 +808,10 @@ device:
                 PC_PM_ID: 64
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01234567
-                TX_LANE_MAP: 0x01234567
-                RX_POLARITY_FLIP: 0x6e
-                TX_POLARITY_FLIP: 0x55
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0xaa
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -1446,3 +1448,1146 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
+### Baseline
+# Skipping buffer reservation. This means that don't use SDK default setings.
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            MIRROR_ON_DROP_RESERVATION: 0
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+
+...
+# Initialize the various thresholds to zero
+---
+# Ingress service pool level initialization
+device:
+    0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+
+        # Ingress headroom pool
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+
+        # PFC generation: Priority group(s)
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        # Egress multicast CQE pool
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+
+...
+# Per Port Registers
+# Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                # Pause enable bit,
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+               PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+...
+# Output Port Thresholds -2 
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+
+...
+### Begin MMU ingress threshold settings
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269671
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 43376
+
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [76, 274]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+
+...
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 329816
+                RESUME_LIMIT_CELLS: 329816
+
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 2410
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1548
+            ?
+                PORT_ID: [76, 274]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+
+...
+### Egress Service Pools
+---
+device:
+    0:
+# Setting Q group limit to 0
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269671
+                SHARED_RESUME_LIMIT_CELLS: 33699
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 25282
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25272
+                RED_SHARED_LIMIT_CELLS: 21069
+                RED_SHARED_RESUME_LIMIT_CELLS: 21059
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19538
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_RESUME_LIMIT_CELLS: 2432
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1832
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1822
+                RED_SHARED_LIMIT_CELLS: 1527
+                RED_SHARED_RESUME_LIMIT_CELLS: 1517
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+
+...
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [0,1,2,5,6]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+
+# Egress Port Thresholds.
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 21068
+                YELLOW_SHARED_LIMIT_CELLS: 25281
+                SHARED_LIMIT_CELLS: 269671
+                RED_SHARED_RESUME_LIMIT_CELLS: 21066
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25279
+                SHARED_RESUME_LIMIT_CELLS: 33707
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1526
+                YELLOW_SHARED_LIMIT_CELLS: 1831
+                SHARED_LIMIT_CELLS: 19538
+                RED_SHARED_RESUME_LIMIT_CELLS: 1524
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1829
+                SHARED_RESUME_LIMIT_CELLS: 2440
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+...
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 3051
+                SHARED_RESUME_LIMIT_PKTS: 3037
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2288
+                RED_SHARED_LIMIT_PKTS: 1906
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2274
+                RED_SHARED_RESUME_LIMIT_PKTS: 1892
+
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+...
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffer_ports.j2
new file mode 120000
index 00000000000..8a4104663fa
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffer_ports.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffers.json.j2
new file mode 120000
index 00000000000..8dc56adda4e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffers.json.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-O128S2/buffers.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffers_defaults_t0.j2
new file mode 120000
index 00000000000..a8f0111ea1f
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffers_defaults_t1.j2
new file mode 120000
index 00000000000..d918c3cfb0d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/hwsku.json b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/hwsku.json
new file mode 100644
index 00000000000..6c2013a138d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/hwsku.json
@@ -0,0 +1,744 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet4": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet8": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet12": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet16": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet20": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet24": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet28": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet32": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet36": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet40": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet44": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet48": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet52": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet56": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet60": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet64": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet68": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet72": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet76": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet80": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet84": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet88": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet92": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet96": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet100": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet104": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet108": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet112": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet116": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet120": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet124": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet128": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet132": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet136": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet140": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet144": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet148": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet152": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet156": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet160": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet164": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet168": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet172": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet176": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet180": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet184": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet188": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet192": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet196": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet200": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet204": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet208": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet212": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet216": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet220": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet224": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet228": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet232": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet236": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet240": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet244": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet248": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet252": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet256": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet260": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet264": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet268": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet272": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet276": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet280": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet284": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet288": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet292": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet296": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet300": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet304": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet308": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet312": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet316": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet320": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet324": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet328": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet332": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet336": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet340": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet344": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet348": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet352": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet356": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet360": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet364": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet368": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet372": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet376": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet380": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet384": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet388": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet392": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet396": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet400": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet404": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet408": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet412": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet416": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet420": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet424": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet428": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet432": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet436": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet440": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet444": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet448": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet452": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet456": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet460": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet464": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet468": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet472": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet476": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet480": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet484": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet488": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet492": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet496": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet500": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet504": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet508": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet512": {
+            "fec": "none",
+            "default_brkout_mode": "2x10G(2)"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/pg_profile_lookup.ini
new file mode 120000
index 00000000000..0fc285468b8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/pg_profile_lookup.ini
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/port_config.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/port_config.ini
new file mode 100644
index 00000000000..123aef1ab4b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/port_config.ini
@@ -0,0 +1,131 @@
+# name       lanes            alias   index  speed   fec
+Ethernet0    369,370,371,372  etp1a   1      400000  rs
+Ethernet4    373,374,375,376  etp1b   1      400000  rs
+Ethernet8    385,386,387,388  etp2a   2      400000  rs
+Ethernet12   389,390,391,392  etp2b   2      400000  rs
+Ethernet16   433,434,435,436  etp3a   3      400000  rs
+Ethernet20   437,438,439,440  etp3b   3      400000  rs
+Ethernet24   449,450,451,452  etp4a   4      400000  rs
+Ethernet28   453,454,455,456  etp4b   4      400000  rs
+Ethernet32   305,306,307,308  etp5a   5      400000  rs
+Ethernet36   309,310,311,312  etp5b   5      400000  rs
+Ethernet40   321,322,323,324  etp6a   6      400000  rs
+Ethernet44   325,326,327,328  etp6b   6      400000  rs
+Ethernet48   241,242,243,244  etp7a   7      400000  rs
+Ethernet52   245,246,247,248  etp7b   7      400000  rs
+Ethernet56   265,266,267,268  etp8a   8      400000  rs
+Ethernet60   269,270,271,272  etp8b   8      400000  rs
+Ethernet64   497,498,499,500  etp9a   9      400000  rs
+Ethernet68   501,502,503,504  etp9b   9      400000  rs
+Ethernet72   9,10,11,12       etp10a  10     400000  rs
+Ethernet76   13,14,15,16      etp10b  10     400000  rs
+Ethernet80   193,194,195,196  etp11a  11     400000  rs
+Ethernet84   197,198,199,200  etp11b  11     400000  rs
+Ethernet88   177,178,179,180  etp12a  12     400000  rs
+Ethernet92   181,182,183,184  etp12b  12     400000  rs
+Ethernet96   65,66,67,68      etp13a  13     400000  rs
+Ethernet100  69,70,71,72      etp13b  13     400000  rs
+Ethernet104  49,50,51,52      etp14a  14     400000  rs
+Ethernet108  53,54,55,56      etp14b  14     400000  rs
+Ethernet112  129,130,131,132  etp15a  15     400000  rs
+Ethernet116  133,134,135,136  etp15b  15     400000  rs
+Ethernet120  113,114,115,116  etp16a  16     400000  rs
+Ethernet124  117,118,119,120  etp16b  16     400000  rs
+Ethernet128  101,102,103,104  etp17a  17     400000  rs
+Ethernet132  97,98,99,100     etp17b  17     400000  rs
+Ethernet136  125,126,127,128  etp17c  17     400000  rs
+Ethernet140  121,122,123,124  etp17d  17     400000  rs
+Ethernet144  77,78,79,80      etp17e  17     400000  rs
+Ethernet148  73,74,75,76      etp17f  17     400000  rs
+Ethernet152  109,110,111,112  etp17g  17     400000  rs
+Ethernet156  105,106,107,108  etp17h  17     400000  rs
+Ethernet160  85,86,87,88      etp17i  17     400000  rs
+Ethernet164  81,82,83,84      etp17j  17     400000  rs
+Ethernet168  93,94,95,96      etp17k  17     400000  rs
+Ethernet172  89,90,91,92      etp17l  17     400000  rs
+Ethernet176  189,190,191,192  etp18a  18     400000  rs
+Ethernet180  185,186,187,188  etp18b  18     400000  rs
+Ethernet184  149,150,151,152  etp18c  18     400000  rs
+Ethernet188  157,158,159,160  etp18d  18     400000  rs
+Ethernet192  165,166,167,168  etp18e  18     400000  rs
+Ethernet196  173,174,175,176  etp18f  18     400000  rs
+Ethernet200  153,154,155,156  etp18g  18     400000  rs
+Ethernet204  145,146,147,148  etp18h  18     400000  rs
+Ethernet208  169,170,171,172  etp18i  18     400000  rs
+Ethernet212  161,162,163,164  etp18j  18     400000  rs
+Ethernet216  141,142,143,144  etp18k  18     400000  rs
+Ethernet220  137,138,139,140  etp18l  18     400000  rs
+Ethernet224  37,38,39,40      etp19a  19     400000  rs
+Ethernet228  33,34,35,36      etp19b  19     400000  rs
+Ethernet232  5,6,7,8          etp19c  19     400000  rs
+Ethernet236  1,2,3,4          etp19d  19     400000  rs
+Ethernet240  45,46,47,48      etp19e  19     400000  rs
+Ethernet244  41,42,43,44      etp19f  19     400000  rs
+Ethernet248  21,22,23,24      etp19g  19     400000  rs
+Ethernet252  17,18,19,20      etp19h  19     400000  rs
+Ethernet256  61,62,63,64      etp19i  19     400000  rs
+Ethernet260  57,58,59,60      etp19j  19     400000  rs
+Ethernet264  29,30,31,32      etp19k  19     400000  rs
+Ethernet268  25,26,27,28      etp19l  19     400000  rs
+Ethernet272  253,254,255,256  etp20a  20     400000  rs
+Ethernet276  249,250,251,252  etp20b  20     400000  rs
+Ethernet280  213,214,215,216  etp20c  20     400000  rs
+Ethernet284  221,222,223,224  etp20d  20     400000  rs
+Ethernet288  229,230,231,232  etp20e  20     400000  rs
+Ethernet292  237,238,239,240  etp20f  20     400000  rs
+Ethernet296  217,218,219,220  etp20g  20     400000  rs
+Ethernet300  209,210,211,212  etp20h  20     400000  rs
+Ethernet304  233,234,235,236  etp20i  20     400000  rs
+Ethernet308  225,226,227,228  etp20j  20     400000  rs
+Ethernet312  205,206,207,208  etp20k  20     400000  rs
+Ethernet316  201,202,203,204  etp20l  20     400000  rs
+Ethernet320  485,486,487,488  etp21a  21     400000  rs
+Ethernet324  481,482,483,484  etp21b  21     400000  rs
+Ethernet328  461,462,463,464  etp21c  21     400000  rs
+Ethernet332  457,458,459,460  etp21d  21     400000  rs
+Ethernet336  493,494,495,496  etp21e  21     400000  rs
+Ethernet340  489,490,491,492  etp21f  21     400000  rs
+Ethernet344  469,470,471,472  etp21g  21     400000  rs
+Ethernet348  465,466,467,468  etp21h  21     400000  rs
+Ethernet352  509,510,511,512  etp21i  21     400000  rs
+Ethernet356  505,506,507,508  etp21j  21     400000  rs
+Ethernet360  477,478,479,480  etp21k  21     400000  rs
+Ethernet364  473,474,475,476  etp21l  21     400000  rs
+Ethernet368  317,318,319,320  etp22a  22     400000  rs
+Ethernet372  313,314,315,316  etp22b  22     400000  rs
+Ethernet376  285,286,287,288  etp22c  22     400000  rs
+Ethernet380  277,278,279,280  etp22d  22     400000  rs
+Ethernet384  293,294,295,296  etp22e  22     400000  rs
+Ethernet388  301,302,303,304  etp22f  22     400000  rs
+Ethernet392  273,274,275,276  etp22g  22     400000  rs
+Ethernet396  281,282,283,284  etp22h  22     400000  rs
+Ethernet400  297,298,299,300  etp22i  22     400000  rs
+Ethernet404  289,290,291,292  etp22j  22     400000  rs
+Ethernet408  261,262,263,264  etp22k  22     400000  rs
+Ethernet412  257,258,259,260  etp22l  22     400000  rs
+Ethernet416  421,422,423,424  etp23a  23     400000  rs
+Ethernet420  417,418,419,420  etp23b  23     400000  rs
+Ethernet424  445,446,447,448  etp23c  23     400000  rs
+Ethernet428  441,442,443,444  etp23d  23     400000  rs
+Ethernet432  397,398,399,400  etp23e  23     400000  rs
+Ethernet436  393,394,395,396  etp23f  23     400000  rs
+Ethernet440  429,430,431,432  etp23g  23     400000  rs
+Ethernet444  425,426,427,428  etp23h  23     400000  rs
+Ethernet448  405,406,407,408  etp23i  23     400000  rs
+Ethernet452  401,402,403,404  etp23j  23     400000  rs
+Ethernet456  413,414,415,416  etp23k  23     400000  rs
+Ethernet460  409,410,411,412  etp23l  23     400000  rs
+Ethernet464  381,382,383,384  etp24a  24     400000  rs
+Ethernet468  377,378,379,380  etp24b  24     400000  rs
+Ethernet472  341,342,343,344  etp24c  24     400000  rs
+Ethernet476  349,350,351,352  etp24d  24     400000  rs
+Ethernet480  357,358,359,360  etp24e  24     400000  rs
+Ethernet484  365,366,367,368  etp24f  24     400000  rs
+Ethernet488  345,346,347,348  etp24g  24     400000  rs
+Ethernet492  337,338,339,340  etp24h  24     400000  rs
+Ethernet496  361,362,363,364  etp24i  24     400000  rs
+Ethernet500  353,354,355,356  etp24j  24     400000  rs
+Ethernet504  333,334,335,336  etp24k  24     400000  rs
+Ethernet508  329,330,331,332  etp24l  24     400000  rs
+Ethernet512  513              etp25a  25     10000   none
+Ethernet513  514              etp25b  25     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/qos.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/qos.json.j2
new file mode 120000
index 00000000000..7a121389849
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/qos.json.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-O128S2/qos.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/sai.profile
new file mode 120000
index 00000000000..20332651617
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/sai.profile
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-O128S2/sai.profile
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm
new file mode 100644
index 00000000000..f11c8c4d354
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm
@@ -0,0 +1,2584 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_mmu_default_cpu_config : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752031
+                TX_LANE_MAP: 0x46570213
+                RX_POLARITY_FLIP: 0x8c
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13025746
+                TX_LANE_MAP: 0x64752031
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x40516273
+                TX_LANE_MAP: 0x4152637
+                RX_POLARITY_FLIP: 0x69
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x4152637
+                TX_LANE_MAP: 0x40516273
+                RX_POLARITY_FLIP: 0x99
+                TX_POLARITY_FLIP: 0x69
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x40516273
+                TX_LANE_MAP: 0x35042617
+                RX_POLARITY_FLIP: 0xe3
+                TX_POLARITY_FLIP: 0x2d
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x23706145
+                TX_LANE_MAP: 0x40736512
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x2c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x32104567
+                TX_LANE_MAP: 0x64571203
+                RX_POLARITY_FLIP: 0x39
+                TX_POLARITY_FLIP: 0xc0
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46572031
+                TX_LANE_MAP: 0x1236547
+                RX_POLARITY_FLIP: 0x3
+                TX_POLARITY_FLIP: 0x93
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46572031
+                TX_LANE_MAP: 0x1324567
+                RX_POLARITY_FLIP: 0x3
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46572031
+                TX_LANE_MAP: 0x1236547
+                RX_POLARITY_FLIP: 0x3
+                TX_POLARITY_FLIP: 0x93
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46572031
+                TX_LANE_MAP: 0x1324567
+                RX_POLARITY_FLIP: 0x3
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64152730
+                TX_LANE_MAP: 0x10276345
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x96
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01235746
+                TX_LANE_MAP: 0x01324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46572031
+                TX_LANE_MAP: 0x10326745
+                RX_POLARITY_FLIP: 0x3
+                TX_POLARITY_FLIP: 0x96
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31204567
+                TX_LANE_MAP: 0x76543021
+                RX_POLARITY_FLIP: 0xde
+                TX_POLARITY_FLIP: 0x37
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31206547
+                TX_LANE_MAP: 0x76543120
+                RX_POLARITY_FLIP: 0xd7
+                TX_POLARITY_FLIP: 0x31
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20316547
+                TX_LANE_MAP: 0x54763120
+                RX_POLARITY_FLIP: 0x56
+                TX_POLARITY_FLIP: 0xd3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x21306745
+                TX_LANE_MAP: 0x74562130
+                RX_POLARITY_FLIP: 0x74
+                TX_POLARITY_FLIP: 0x62
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20316547
+                TX_LANE_MAP: 0x54763120
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xf1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20316745
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xf1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31204567
+                TX_LANE_MAP: 0x76543021
+                RX_POLARITY_FLIP: 0xde
+                TX_POLARITY_FLIP: 0x37
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31206547
+                TX_LANE_MAP: 0x76543120
+                RX_POLARITY_FLIP: 0xd7
+                TX_POLARITY_FLIP: 0x30
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57640312
+                TX_LANE_MAP: 0x47560213
+                RX_POLARITY_FLIP: 0xca
+                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x47650123
+                TX_LANE_MAP: 0x74561032
+                RX_POLARITY_FLIP: 0x74
+                TX_POLARITY_FLIP: 0xfc
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45670321
+                TX_LANE_MAP: 0x54763012
+                RX_POLARITY_FLIP: 0x9a
+                TX_POLARITY_FLIP: 0x5c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31207564
+                TX_LANE_MAP: 0x46570213
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45670123
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x9a
+                TX_POLARITY_FLIP: 0x56
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1234567
+                TX_LANE_MAP: 0x10325476
+                RX_POLARITY_FLIP: 0xa9
+                TX_POLARITY_FLIP: 0x65
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57461302
+                TX_LANE_MAP: 0x20316475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x23016547
+                TX_LANE_MAP: 0x32105674
+                RX_POLARITY_FLIP: 0x8b
+                TX_POLARITY_FLIP: 0x81
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1236547
+                TX_LANE_MAP: 0x10325674
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0xff
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x12036457
+                TX_LANE_MAP: 0x13025647
+                RX_POLARITY_FLIP: 0xe8
+                TX_POLARITY_FLIP: 0x2d
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45673021
+                TX_LANE_MAP: 0x30215674
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x39
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01237564
+                TX_LANE_MAP: 0x01326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45673120
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x73
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01237564
+                TX_LANE_MAP: 0x01326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x67452031
+                TX_LANE_MAP: 0x21305476
+                RX_POLARITY_FLIP: 0x74
+                TX_POLARITY_FLIP: 0x1f
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x67453021
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0x19
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45673021
+                TX_LANE_MAP: 0x30215674
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x5b
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x47653120
+                TX_LANE_MAP: 0x20317654
+                RX_POLARITY_FLIP: 0xde
+                TX_POLARITY_FLIP: 0x40
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45673021
+                TX_LANE_MAP: 0x30215674
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x79
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01237564
+                TX_LANE_MAP: 0x01326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45673120
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x73
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x65471203
+                RX_POLARITY_FLIP: 0x39
+                TX_POLARITY_FLIP: 0xc0
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x47650312
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x30
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x65471203
+                RX_POLARITY_FLIP: 0x39
+                TX_POLARITY_FLIP: 0xc0
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x47650312
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x30
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13540276
+                TX_LANE_MAP: 0x47620513
+                RX_POLARITY_FLIP: 0xe1
+                TX_POLARITY_FLIP: 0x24
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01235746
+                TX_LANE_MAP: 0x01324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x65471203
+                RX_POLARITY_FLIP: 0x39
+                TX_POLARITY_FLIP: 0xc0
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01235746
+                TX_LANE_MAP: 0x01324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752031
+                TX_LANE_MAP: 0x10234765
+                RX_POLARITY_FLIP: 0xf3
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752031
+                TX_LANE_MAP: 0x10236547
+                RX_POLARITY_FLIP: 0xf3
+                TX_POLARITY_FLIP: 0xd3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2134657
+                TX_LANE_MAP: 0x30216574
+                RX_POLARITY_FLIP: 0xc1
+                TX_POLARITY_FLIP: 0xcf
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20136475
+                TX_LANE_MAP: 0x20316475
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x33
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x62734051
+                TX_LANE_MAP: 0x26370415
+                RX_POLARITY_FLIP: 0x69
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75643120
+                TX_LANE_MAP: 0x02134657
+                RX_POLARITY_FLIP: 0xcc
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20316475
+                TX_LANE_MAP: 0x2134657
+                RX_POLARITY_FLIP: 0x37
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 65
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x00003210
+                TX_LANE_MAP: 0x00003210
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x00
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 14
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 25
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 47
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 57
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 58
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 79
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 80
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 90
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 91
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 101
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 112
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 113
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 123
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 124
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 134
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 135
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 145
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 146
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 157
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 167
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 168
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 179
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 200
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 201
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 211
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 212
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 234
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 244
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 245
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 266
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 267
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 277
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 278
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 288
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 299
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 300
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 310
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 311
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 321
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 322
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 332
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 333
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 344
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 164
+            :
+                PC_PHYS_PORT_ID: 514
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 4],
+                          [11, 14],
+                          [22, 25],
+                          [33, 36],
+                          [44, 47],
+                          [55, 58],
+                          [66, 69],
+                          [77, 80],
+                          [88, 91],
+                          [99, 102],
+                          [110, 113],
+                          [121, 124],
+                          [132, 135],
+                          [143, 146],
+                          [154, 157],
+                          [165, 168],
+                          [176, 179],
+                          [187, 190],
+                          [198, 201],
+                          [209, 212],
+                          [220, 223],
+                          [231, 234],
+                          [242, 245],
+                          [253, 256],
+                          [264, 267],
+                          [275, 278],
+                          [286, 289],
+                          [297, 300],
+                          [308, 311],
+                          [319, 322],
+                          [330, 333],
+                          [341, 344]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [164, 164]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+### Baseline
+# Skipping buffer reservation. This means that don't use SDK default setings.
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            MIRROR_ON_DROP_RESERVATION: 0
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+
+...
+# Initialize the various thresholds to zero
+---
+# Ingress service pool level initialization
+device:
+    0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+
+        # Ingress headroom pool
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+
+        # PFC generation: Priority group(s)
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        # Egress multicast CQE pool
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+
+...
+# Per Port Registers
+# Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                # Pause enable bit,
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+               PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+...
+# Output Port Thresholds -2 
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+
+...
+### Begin MMU ingress threshold settings
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269671
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 43376
+
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [76, 274]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+
+...
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 329816
+                RESUME_LIMIT_CELLS: 329816
+
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 2410
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1548
+            ?
+                PORT_ID: [76, 274]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+
+...
+### Egress Service Pools
+---
+device:
+    0:
+# Setting Q group limit to 0
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269671
+                SHARED_RESUME_LIMIT_CELLS: 33699
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 25282
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25272
+                RED_SHARED_LIMIT_CELLS: 21069
+                RED_SHARED_RESUME_LIMIT_CELLS: 21059
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19538
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_RESUME_LIMIT_CELLS: 2432
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1832
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1822
+                RED_SHARED_LIMIT_CELLS: 1527
+                RED_SHARED_RESUME_LIMIT_CELLS: 1517
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+
+...
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [0,1,2,5,6]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+
+# Egress Port Thresholds.
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 21068
+                YELLOW_SHARED_LIMIT_CELLS: 25281
+                SHARED_LIMIT_CELLS: 269671
+                RED_SHARED_RESUME_LIMIT_CELLS: 21066
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25279
+                SHARED_RESUME_LIMIT_CELLS: 33707
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1526
+                YELLOW_SHARED_LIMIT_CELLS: 1831
+                SHARED_LIMIT_CELLS: 19538
+                RED_SHARED_RESUME_LIMIT_CELLS: 1524
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1829
+                SHARED_RESUME_LIMIT_CELLS: 2440
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+...
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 3051
+                SHARED_RESUME_LIMIT_PKTS: 3037
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2288
+                RED_SHARED_LIMIT_PKTS: 1906
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2274
+                RED_SHARED_RESUME_LIMIT_PKTS: 1892
+
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+...
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffer_ports.j2
index 35b3dd5d135..8a4104663fa 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffer_ports.j2
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffer_ports.j2
@@ -1 +1 @@
-../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffer_ports.j2
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers.json.j2
index 8658b687e28..8dc56adda4e 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers.json.j2
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers.json.j2
@@ -1 +1 @@
-../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers.json.j2
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/buffers.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t0.j2
index 9524e6a476a..a8f0111ea1f 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t0.j2
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t0.j2
@@ -1 +1 @@
-BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t1.j2
index c25cc95d6d5..d918c3cfb0d 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t1.j2
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/buffers_defaults_t1.j2
@@ -1 +1 @@
-BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/pg_profile_lookup.ini
index 297cddb2d22..0fc285468b8 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/pg_profile_lookup.ini
@@ -1 +1 @@
-BALANCED/pg_profile_lookup.ini
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/port_config.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/port_config.ini
index 3bd85b913a6..123aef1ab4b 100644
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/port_config.ini
@@ -31,101 +31,101 @@ Ethernet112  129,130,131,132  etp15a  15     400000  rs
 Ethernet116  133,134,135,136  etp15b  15     400000  rs
 Ethernet120  113,114,115,116  etp16a  16     400000  rs
 Ethernet124  117,118,119,120  etp16b  16     400000  rs
-Ethernet128  405,406,407,408  etp17a  17     400000  rs
-Ethernet132  401,402,403,404  etp17b  17     400000  rs
-Ethernet136  397,398,399,400  etp17c  17     400000  rs
-Ethernet140  393,394,395,396  etp17d  17     400000  rs
-Ethernet144  421,422,423,424  etp17e  17     400000  rs
-Ethernet148  417,418,419,420  etp17f  17     400000  rs
-Ethernet152  413,414,415,416  etp17g  17     400000  rs
-Ethernet156  409,410,411,412  etp17h  17     400000  rs
-Ethernet160  425,426,427,428  etp17i  17     400000  rs
-Ethernet164  429,430,431,432  etp17j  17     400000  rs
-Ethernet168  445,446,447,448  etp17k  17     400000  rs
-Ethernet172  441,442,443,444  etp17l  17     400000  rs
-Ethernet176  61,62,63,64      etp18a  18     400000  rs
-Ethernet180  57,58,59,60      etp18b  18     400000  rs
-Ethernet184  45,46,47,48      etp18c  18     400000  rs
-Ethernet188  41,42,43,44      etp18d  18     400000  rs
-Ethernet192  37,38,39,40      etp18e  18     400000  rs
-Ethernet196  33,34,35,36      etp18f  18     400000  rs
-Ethernet200  29,30,31,32      etp18g  18     400000  rs
-Ethernet204  25,26,27,28      etp18h  18     400000  rs
-Ethernet208  21,22,23,24      etp18i  18     400000  rs
-Ethernet212  17,18,19,20      etp18j  18     400000  rs
-Ethernet216  1,2,3,4          etp18k  18     400000  rs
-Ethernet220  5,6,7,8          etp18l  18     400000  rs
-Ethernet224  509,510,511,512  etp19a  19     400000  rs
-Ethernet228  505,506,507,508  etp19b  19     400000  rs
-Ethernet232  489,490,491,492  etp19c  19     400000  rs
-Ethernet236  493,494,495,496  etp19d  19     400000  rs
-Ethernet240  485,486,487,488  etp19e  19     400000  rs
-Ethernet244  481,482,483,484  etp19f  19     400000  rs
-Ethernet248  477,478,479,480  etp19g  19     400000  rs
-Ethernet252  473,474,475,476  etp19h  19     400000  rs
-Ethernet256  465,466,467,468  etp19i  19     400000  rs
-Ethernet260  469,470,471,472  etp19j  19     400000  rs
-Ethernet264  457,458,459,460  etp19k  19     400000  rs
-Ethernet268  461,462,463,464  etp19l  19     400000  rs
-Ethernet272  81,82,83,84      etp20a  20     400000  rs
-Ethernet276  85,86,87,88      etp20b  20     400000  rs
-Ethernet280  73,74,75,76      etp20c  20     400000  rs
-Ethernet284  77,78,79,80      etp20d  20     400000  rs
-Ethernet288  97,98,99,100     etp20e  20     400000  rs
-Ethernet292  101,102,103,104  etp20f  20     400000  rs
-Ethernet296  89,90,91,92      etp20g  20     400000  rs
-Ethernet300  93,94,95,96      etp20h  20     400000  rs
-Ethernet304  105,106,107,108  etp20i  20     400000  rs
-Ethernet308  109,110,111,112  etp20j  20     400000  rs
-Ethernet312  121,122,123,124  etp20k  20     400000  rs
-Ethernet316  125,126,127,128  etp20l  20     400000  rs
-Ethernet320  329,330,331,332  etp21a  21     400000  rs
-Ethernet324  333,334,335,336  etp21b  21     400000  rs
-Ethernet328  337,338,339,340  etp21c  21     400000  rs
-Ethernet332  345,346,347,348  etp21d  21     400000  rs
-Ethernet336  349,350,351,352  etp21e  21     400000  rs
-Ethernet340  341,342,343,344  etp21f  21     400000  rs
-Ethernet344  353,354,355,356  etp21g  21     400000  rs
-Ethernet348  361,362,363,364  etp21h  21     400000  rs
-Ethernet352  365,366,367,368  etp21i  21     400000  rs
-Ethernet356  357,358,359,360  etp21j  21     400000  rs
-Ethernet360  377,378,379,380  etp21k  21     400000  rs
-Ethernet364  381,382,383,384  etp21l  21     400000  rs
-Ethernet368  261,262,263,264  etp22a  22     400000  rs
-Ethernet372  257,258,259,260  etp22b  22     400000  rs
+Ethernet128  101,102,103,104  etp17a  17     400000  rs
+Ethernet132  97,98,99,100     etp17b  17     400000  rs
+Ethernet136  125,126,127,128  etp17c  17     400000  rs
+Ethernet140  121,122,123,124  etp17d  17     400000  rs
+Ethernet144  77,78,79,80      etp17e  17     400000  rs
+Ethernet148  73,74,75,76      etp17f  17     400000  rs
+Ethernet152  109,110,111,112  etp17g  17     400000  rs
+Ethernet156  105,106,107,108  etp17h  17     400000  rs
+Ethernet160  85,86,87,88      etp17i  17     400000  rs
+Ethernet164  81,82,83,84      etp17j  17     400000  rs
+Ethernet168  93,94,95,96      etp17k  17     400000  rs
+Ethernet172  89,90,91,92      etp17l  17     400000  rs
+Ethernet176  189,190,191,192  etp18a  18     400000  rs
+Ethernet180  185,186,187,188  etp18b  18     400000  rs
+Ethernet184  149,150,151,152  etp18c  18     400000  rs
+Ethernet188  157,158,159,160  etp18d  18     400000  rs
+Ethernet192  165,166,167,168  etp18e  18     400000  rs
+Ethernet196  173,174,175,176  etp18f  18     400000  rs
+Ethernet200  153,154,155,156  etp18g  18     400000  rs
+Ethernet204  145,146,147,148  etp18h  18     400000  rs
+Ethernet208  169,170,171,172  etp18i  18     400000  rs
+Ethernet212  161,162,163,164  etp18j  18     400000  rs
+Ethernet216  141,142,143,144  etp18k  18     400000  rs
+Ethernet220  137,138,139,140  etp18l  18     400000  rs
+Ethernet224  37,38,39,40      etp19a  19     400000  rs
+Ethernet228  33,34,35,36      etp19b  19     400000  rs
+Ethernet232  5,6,7,8          etp19c  19     400000  rs
+Ethernet236  1,2,3,4          etp19d  19     400000  rs
+Ethernet240  45,46,47,48      etp19e  19     400000  rs
+Ethernet244  41,42,43,44      etp19f  19     400000  rs
+Ethernet248  21,22,23,24      etp19g  19     400000  rs
+Ethernet252  17,18,19,20      etp19h  19     400000  rs
+Ethernet256  61,62,63,64      etp19i  19     400000  rs
+Ethernet260  57,58,59,60      etp19j  19     400000  rs
+Ethernet264  29,30,31,32      etp19k  19     400000  rs
+Ethernet268  25,26,27,28      etp19l  19     400000  rs
+Ethernet272  253,254,255,256  etp20a  20     400000  rs
+Ethernet276  249,250,251,252  etp20b  20     400000  rs
+Ethernet280  213,214,215,216  etp20c  20     400000  rs
+Ethernet284  221,222,223,224  etp20d  20     400000  rs
+Ethernet288  229,230,231,232  etp20e  20     400000  rs
+Ethernet292  237,238,239,240  etp20f  20     400000  rs
+Ethernet296  217,218,219,220  etp20g  20     400000  rs
+Ethernet300  209,210,211,212  etp20h  20     400000  rs
+Ethernet304  233,234,235,236  etp20i  20     400000  rs
+Ethernet308  225,226,227,228  etp20j  20     400000  rs
+Ethernet312  205,206,207,208  etp20k  20     400000  rs
+Ethernet316  201,202,203,204  etp20l  20     400000  rs
+Ethernet320  485,486,487,488  etp21a  21     400000  rs
+Ethernet324  481,482,483,484  etp21b  21     400000  rs
+Ethernet328  461,462,463,464  etp21c  21     400000  rs
+Ethernet332  457,458,459,460  etp21d  21     400000  rs
+Ethernet336  493,494,495,496  etp21e  21     400000  rs
+Ethernet340  489,490,491,492  etp21f  21     400000  rs
+Ethernet344  469,470,471,472  etp21g  21     400000  rs
+Ethernet348  465,466,467,468  etp21h  21     400000  rs
+Ethernet352  509,510,511,512  etp21i  21     400000  rs
+Ethernet356  505,506,507,508  etp21j  21     400000  rs
+Ethernet360  477,478,479,480  etp21k  21     400000  rs
+Ethernet364  473,474,475,476  etp21l  21     400000  rs
+Ethernet368  317,318,319,320  etp22a  22     400000  rs
+Ethernet372  313,314,315,316  etp22b  22     400000  rs
 Ethernet376  285,286,287,288  etp22c  22     400000  rs
 Ethernet380  277,278,279,280  etp22d  22     400000  rs
-Ethernet384  273,274,275,276  etp22e  22     400000  rs
-Ethernet388  281,282,283,284  etp22f  22     400000  rs
-Ethernet392  293,294,295,296  etp22g  22     400000  rs
-Ethernet396  297,298,299,300  etp22h  22     400000  rs
-Ethernet400  301,302,303,304  etp22i  22     400000  rs
+Ethernet384  293,294,295,296  etp22e  22     400000  rs
+Ethernet388  301,302,303,304  etp22f  22     400000  rs
+Ethernet392  273,274,275,276  etp22g  22     400000  rs
+Ethernet396  281,282,283,284  etp22h  22     400000  rs
+Ethernet400  297,298,299,300  etp22i  22     400000  rs
 Ethernet404  289,290,291,292  etp22j  22     400000  rs
-Ethernet408  313,314,315,316  etp22k  22     400000  rs
-Ethernet412  317,318,319,320  etp22l  22     400000  rs
-Ethernet416  205,206,207,208  etp23a  23     400000  rs
-Ethernet420  201,202,203,204  etp23b  23     400000  rs
-Ethernet424  213,214,215,216  etp23c  23     400000  rs
-Ethernet428  217,218,219,220  etp23d  23     400000  rs
-Ethernet432  221,222,223,224  etp23e  23     400000  rs
-Ethernet436  209,210,211,212  etp23f  23     400000  rs
-Ethernet440  225,226,227,228  etp23g  23     400000  rs
-Ethernet444  233,234,235,236  etp23h  23     400000  rs
-Ethernet448  237,238,239,240  etp23i  23     400000  rs
-Ethernet452  229,230,231,232  etp23j  23     400000  rs
-Ethernet456  249,250,251,252  etp23k  23     400000  rs
-Ethernet460  253,254,255,256  etp23l  23     400000  rs
-Ethernet464  141,142,143,144  etp24a  24     400000  rs
-Ethernet468  137,138,139,140  etp24b  24     400000  rs
-Ethernet472  149,150,151,152  etp24c  24     400000  rs
-Ethernet476  157,158,159,160  etp24d  24     400000  rs
-Ethernet480  153,154,155,156  etp24e  24     400000  rs
-Ethernet484  145,146,147,148  etp24f  24     400000  rs
-Ethernet488  165,166,167,168  etp24g  24     400000  rs
-Ethernet492  173,174,175,176  etp24h  24     400000  rs
-Ethernet496  169,170,171,172  etp24i  24     400000  rs
-Ethernet500  161,162,163,164  etp24j  24     400000  rs
-Ethernet504  189,190,191,192  etp24k  24     400000  rs
-Ethernet508  185,186,187,188  etp24l  24     400000  rs
+Ethernet408  261,262,263,264  etp22k  22     400000  rs
+Ethernet412  257,258,259,260  etp22l  22     400000  rs
+Ethernet416  421,422,423,424  etp23a  23     400000  rs
+Ethernet420  417,418,419,420  etp23b  23     400000  rs
+Ethernet424  445,446,447,448  etp23c  23     400000  rs
+Ethernet428  441,442,443,444  etp23d  23     400000  rs
+Ethernet432  397,398,399,400  etp23e  23     400000  rs
+Ethernet436  393,394,395,396  etp23f  23     400000  rs
+Ethernet440  429,430,431,432  etp23g  23     400000  rs
+Ethernet444  425,426,427,428  etp23h  23     400000  rs
+Ethernet448  405,406,407,408  etp23i  23     400000  rs
+Ethernet452  401,402,403,404  etp23j  23     400000  rs
+Ethernet456  413,414,415,416  etp23k  23     400000  rs
+Ethernet460  409,410,411,412  etp23l  23     400000  rs
+Ethernet464  381,382,383,384  etp24a  24     400000  rs
+Ethernet468  377,378,379,380  etp24b  24     400000  rs
+Ethernet472  341,342,343,344  etp24c  24     400000  rs
+Ethernet476  349,350,351,352  etp24d  24     400000  rs
+Ethernet480  357,358,359,360  etp24e  24     400000  rs
+Ethernet484  365,366,367,368  etp24f  24     400000  rs
+Ethernet488  345,346,347,348  etp24g  24     400000  rs
+Ethernet492  337,338,339,340  etp24h  24     400000  rs
+Ethernet496  361,362,363,364  etp24i  24     400000  rs
+Ethernet500  353,354,355,356  etp24j  24     400000  rs
+Ethernet504  333,334,335,336  etp24k  24     400000  rs
+Ethernet508  329,330,331,332  etp24l  24     400000  rs
 Ethernet512  513              etp25a  25     10000   none
 Ethernet513  514              etp25b  25     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/qos.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/qos.json.j2
index 1d89e90b055..7a121389849 120000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/qos.json.j2
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/qos.json.j2
@@ -1 +1 @@
-../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/qos.json.j2
\ No newline at end of file
+../Arista-7060X6-16PE-384C-O128S2/qos.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/sai.profile
deleted file mode 100644
index f299df75d26..00000000000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/sai.profile
+++ /dev/null
@@ -1 +0,0 @@
-SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-16pe-384c.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/sai.profile
new file mode 120000
index 00000000000..20332651617
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/sai.profile
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-O128S2/sai.profile
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm
index ed6f6155129..b846dd8ac28 100644
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm
@@ -34,6 +34,7 @@ bcm_device:
             l3_alpm_template: 1
             l3_alpm_hit_skip: 1
             sai_feat_tail_timestamp : 1
+            sai_mmu_custom_config : 1
             sai_port_phy_time_sync_en : 1
             sai_field_group_auto_prioritize: 1
             #l3_intf_vlan_split_egress for MTU at L3IF
@@ -42,6 +43,7 @@ bcm_device:
             sai_tunnel_support: 2
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
@@ -50,10 +52,10 @@ device:
                 PC_PM_ID: 1
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x45670123
-                TX_LANE_MAP: 0x45670123
-                RX_POLARITY_FLIP: 0x19
-                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP: 0x76543210
+                TX_LANE_MAP: 0x76543210
+                RX_POLARITY_FLIP: 0x89
+                TX_POLARITY_FLIP: 0x55
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -74,10 +76,10 @@ device:
                 PC_PM_ID: 3
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01452367
-                TX_LANE_MAP: 0x01452367
-                RX_POLARITY_FLIP: 0xa5
-                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP: 0x54107632
+                TX_LANE_MAP: 0x54107632
+                RX_POLARITY_FLIP: 0x5a
+                TX_POLARITY_FLIP: 0x55
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -86,10 +88,10 @@ device:
                 PC_PM_ID: 4
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x45016723
-                TX_LANE_MAP: 0x45016723
-                RX_POLARITY_FLIP: 0x55
-                TX_POLARITY_FLIP: 0xa5
+                RX_LANE_MAP: 0x10543276
+                TX_LANE_MAP: 0x10543276
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x5a
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -98,10 +100,10 @@ device:
                 PC_PM_ID: 5
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01452367
-                TX_LANE_MAP: 0x30542167
-                RX_POLARITY_FLIP: 0x86
-                TX_POLARITY_FLIP: 0x87
+                RX_LANE_MAP: 0x54107632
+                TX_LANE_MAP: 0x45037612
+                RX_POLARITY_FLIP: 0x16
+                TX_POLARITY_FLIP: 0x1e
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -110,10 +112,10 @@ device:
                 PC_PM_ID: 6
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x30271564
-                TX_LANE_MAP: 0x47036152
-                RX_POLARITY_FLIP: 0xd2
-                TX_POLARITY_FLIP: 0x86
+                RX_LANE_MAP: 0x72034651
+                TX_LANE_MAP: 0x30742516
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0x16
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -134,10 +136,10 @@ device:
                 PC_PM_ID: 8
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x20315746
-                TX_LANE_MAP: 0x65471023
-                RX_POLARITY_FLIP: 0x65
-                TX_POLARITY_FLIP: 0x6c
+                RX_LANE_MAP: 0x13026475
+                TX_LANE_MAP: 0x74563201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -158,10 +160,10 @@ device:
                 PC_PM_ID: 10
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x67450123
-                TX_LANE_MAP: 0x02136457
-                RX_POLARITY_FLIP: 0x36
-                TX_POLARITY_FLIP: 0x59
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x31207546
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xa9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -170,10 +172,10 @@ device:
                 PC_PM_ID: 11
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x67450123
-                TX_LANE_MAP: 0x03124657
-                RX_POLARITY_FLIP: 0x36
-                TX_POLARITY_FLIP: 0x55
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x21307564
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xaa
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -182,10 +184,10 @@ device:
                 PC_PM_ID: 12
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x67450123
-                TX_LANE_MAP: 0x02136457
-                RX_POLARITY_FLIP: 0x36
-                TX_POLARITY_FLIP: 0x59
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x31207546
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xa9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -194,10 +196,10 @@ device:
                 PC_PM_ID: 13
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x67450123
-                TX_LANE_MAP: 0x03124657
-                RX_POLARITY_FLIP: 0x36
-                TX_POLARITY_FLIP: 0x55
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x21307564
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xaa
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -206,10 +208,10 @@ device:
                 PC_PM_ID: 14
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x45617023
-                TX_LANE_MAP: 0x12076435
-                RX_POLARITY_FLIP: 0xd2
-                TX_POLARITY_FLIP: 0x5a
+                RX_LANE_MAP: 0x16543207
+                TX_LANE_MAP: 0x70215346
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0xa5
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -218,8 +220,8 @@ device:
                 PC_PM_ID: 15
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01235746
-                TX_LANE_MAP: 0x01324675
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x1324675
                 RX_POLARITY_FLIP: 0x95
                 TX_POLARITY_FLIP: 0x36
                 RX_LANE_MAP_AUTO: 0
@@ -230,10 +232,10 @@ device:
                 PC_PM_ID: 16
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x67450123
-                TX_LANE_MAP: 0x13026475
-                RX_POLARITY_FLIP: 0x36
-                TX_POLARITY_FLIP: 0x5a
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x20315746
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xa5
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -254,10 +256,10 @@ device:
                 PC_PM_ID: 18
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x10325746
-                TX_LANE_MAP: 0x75643201
-                RX_POLARITY_FLIP: 0xd8
-                TX_POLARITY_FLIP: 0x9b
+                RX_LANE_MAP: 0x23016475
+                TX_LANE_MAP: 0x46571023
+                RX_POLARITY_FLIP: 0xb1
+                TX_POLARITY_FLIP: 0x9d
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -266,10 +268,10 @@ device:
                 PC_PM_ID: 19
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x10325764
-                TX_LANE_MAP: 0x75643210
-                RX_POLARITY_FLIP: 0xde
-                TX_POLARITY_FLIP: 0x9d
+                RX_LANE_MAP: 0x23014675
+                TX_LANE_MAP: 0x46570123
+                RX_POLARITY_FLIP: 0xb7
+                TX_POLARITY_FLIP: 0x9b
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -278,10 +280,10 @@ device:
                 PC_PM_ID: 20
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57640123
-                TX_LANE_MAP: 0x32105746
-                RX_POLARITY_FLIP: 0xaf
-                TX_POLARITY_FLIP: 0x97
+                RX_LANE_MAP: 0x32104675
+                TX_LANE_MAP: 0x64750123
+                RX_POLARITY_FLIP: 0xf5
+                TX_POLARITY_FLIP: 0xe9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -290,10 +292,10 @@ device:
                 PC_PM_ID: 21
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x10237564
-                TX_LANE_MAP: 0x75462310
-                RX_POLARITY_FLIP: 0xeb
-                TX_POLARITY_FLIP: 0xa8
+                RX_LANE_MAP: 0x32014657
+                TX_LANE_MAP: 0x64570132
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0x51
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -302,10 +304,10 @@ device:
                 PC_PM_ID: 22
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57640123
-                TX_LANE_MAP: 0x32105746
-                RX_POLARITY_FLIP: 0xeb
-                TX_POLARITY_FLIP: 0xd3
+                RX_LANE_MAP: 0x32104675
+                TX_LANE_MAP: 0x64750123
+                RX_POLARITY_FLIP: 0xd7
+                TX_POLARITY_FLIP: 0xcb
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -326,10 +328,10 @@ device:
                 PC_PM_ID: 24
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01237564
-                TX_LANE_MAP: 0x57462310
-                RX_POLARITY_FLIP: 0xbe
-                TX_POLARITY_FLIP: 0x3d
+                RX_LANE_MAP: 0x32104657
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0xd7
+                TX_POLARITY_FLIP: 0xcb
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -350,10 +352,10 @@ device:
                 PC_PM_ID: 26
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x10325746
-                TX_LANE_MAP: 0x75643201
-                RX_POLARITY_FLIP: 0x98
-                TX_POLARITY_FLIP: 0x9b
+                RX_LANE_MAP: 0x23016475
+                TX_LANE_MAP: 0x46571023
+                RX_POLARITY_FLIP: 0xb1
+                TX_POLARITY_FLIP: 0x9d
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -362,10 +364,10 @@ device:
                 PC_PM_ID: 27
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x10325764
-                TX_LANE_MAP: 0x75643210
-                RX_POLARITY_FLIP: 0xde
-                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP: 0x23014675
+                TX_LANE_MAP: 0x46570123
+                RX_POLARITY_FLIP: 0xb7
+                TX_POLARITY_FLIP: 0x93
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -374,9 +376,9 @@ device:
                 PC_PM_ID: 28
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x32017456
-                TX_LANE_MAP: 0x01234576
-                RX_POLARITY_FLIP: 0x09
+                RX_LANE_MAP: 0x65471023
+                TX_LANE_MAP: 0x67543210
+                RX_POLARITY_FLIP: 0x90
                 TX_POLARITY_FLIP: 0x00
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
@@ -386,10 +388,10 @@ device:
                 PC_PM_ID: 29
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x75461302
-                TX_LANE_MAP: 0x75461302
-                RX_POLARITY_FLIP: 0xeb
-                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP: 0x64572031
+                TX_LANE_MAP: 0x64572031
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0xc6
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -398,10 +400,10 @@ device:
                 PC_PM_ID: 30
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x31025746
-                TX_LANE_MAP: 0x31025746
-                RX_POLARITY_FLIP: 0x05
-                TX_POLARITY_FLIP: 0x6f
+                RX_LANE_MAP: 0x64752013
+                TX_LANE_MAP: 0x64752013
+                RX_POLARITY_FLIP: 0xa0
+                TX_POLARITY_FLIP: 0xf6
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -422,10 +424,10 @@ device:
                 PC_PM_ID: 32
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57461302
-                TX_LANE_MAP: 0x57461302
-                RX_POLARITY_FLIP: 0x50
-                TX_POLARITY_FLIP: 0xfa
+                RX_LANE_MAP: 0x64752031
+                TX_LANE_MAP: 0x64752031
+                RX_POLARITY_FLIP: 0xa0
+                TX_POLARITY_FLIP: 0xf5
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -434,10 +436,10 @@ device:
                 PC_PM_ID: 33
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x13025746
-                TX_LANE_MAP: 0x13025746
-                RX_POLARITY_FLIP: 0x05
-                TX_POLARITY_FLIP: 0xaf
+                RX_LANE_MAP: 0x20316475
+                TX_LANE_MAP: 0x20316475
+                RX_POLARITY_FLIP: 0xa
+                TX_POLARITY_FLIP: 0x5f
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -458,10 +460,10 @@ device:
                 PC_PM_ID: 35
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57643120
-                TX_LANE_MAP: 0x57643120
-                RX_POLARITY_FLIP: 0x41
-                TX_POLARITY_FLIP: 0xd4
+                RX_LANE_MAP: 0x2134675
+                TX_LANE_MAP: 0x2134675
+                RX_POLARITY_FLIP: 0x82
+                TX_POLARITY_FLIP: 0x2b
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -470,10 +472,10 @@ device:
                 PC_PM_ID: 36
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x13025764
-                TX_LANE_MAP: 0x13025764
-                RX_POLARITY_FLIP: 0xed
-                TX_POLARITY_FLIP: 0x33
+                RX_LANE_MAP: 0x20314675
+                TX_LANE_MAP: 0x20314675
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0xcc
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -482,10 +484,10 @@ device:
                 PC_PM_ID: 37
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23104765
-                TX_LANE_MAP: 0x10325467
-                RX_POLARITY_FLIP: 0x81
-                TX_POLARITY_FLIP: 0x87
+                RX_LANE_MAP: 0x1325674
+                TX_LANE_MAP: 0x23017645
+                RX_POLARITY_FLIP: 0x18
+                TX_POLARITY_FLIP: 0x1e
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -494,10 +496,10 @@ device:
                 PC_PM_ID: 38
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01325746
-                TX_LANE_MAP: 0x57643201
-                RX_POLARITY_FLIP: 0xd8
-                TX_POLARITY_FLIP: 0x59
+                RX_LANE_MAP: 0x64752310
+                TX_LANE_MAP: 0x10234675
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0x9a
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -506,8 +508,8 @@ device:
                 PC_PM_ID: 39
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01237564
-                TX_LANE_MAP: 0x01326475
+                RX_LANE_MAP: 0x1237564
+                TX_LANE_MAP: 0x1326475
                 RX_POLARITY_FLIP: 0xbb
                 TX_POLARITY_FLIP: 0xe3
                 RX_LANE_MAP_AUTO: 0
@@ -518,10 +520,10 @@ device:
                 PC_PM_ID: 40
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57461032
-                TX_LANE_MAP: 0x32017564
-                RX_POLARITY_FLIP: 0x8d
-                TX_POLARITY_FLIP: 0xb9
+                RX_LANE_MAP: 0x64752301
+                TX_LANE_MAP: 0x10234657
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0xd9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -530,8 +532,8 @@ device:
                 PC_PM_ID: 41
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01237564
-                TX_LANE_MAP: 0x01326475
+                RX_LANE_MAP: 0x1237564
+                TX_LANE_MAP: 0x1326475
                 RX_POLARITY_FLIP: 0xbb
                 TX_POLARITY_FLIP: 0xe3
                 RX_LANE_MAP_AUTO: 0
@@ -542,10 +544,10 @@ device:
                 PC_PM_ID: 42
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x75640123
-                TX_LANE_MAP: 0x23105746
-                RX_POLARITY_FLIP: 0xeb
-                TX_POLARITY_FLIP: 0xd3
+                RX_LANE_MAP: 0x46573210
+                TX_LANE_MAP: 0x1326475
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0xbc
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -554,10 +556,10 @@ device:
                 PC_PM_ID: 43
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x75640132
-                TX_LANE_MAP: 0x23105764
-                RX_POLARITY_FLIP: 0xed
-                TX_POLARITY_FLIP: 0xd5
+                RX_LANE_MAP: 0x46572310
+                TX_LANE_MAP: 0x1324675
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0xba
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -566,10 +568,10 @@ device:
                 PC_PM_ID: 44
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01325746
-                TX_LANE_MAP: 0x57643201
-                RX_POLARITY_FLIP: 0x9c
-                TX_POLARITY_FLIP: 0x1f
+                RX_LANE_MAP: 0x64752310
+                TX_LANE_MAP: 0x10234675
+                RX_POLARITY_FLIP: 0x39
+                TX_POLARITY_FLIP: 0xf8
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -578,10 +580,10 @@ device:
                 PC_PM_ID: 45
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x75461032
-                TX_LANE_MAP: 0x23017564
-                RX_POLARITY_FLIP: 0xd8
-                TX_POLARITY_FLIP: 0xec
+                RX_LANE_MAP: 0x64572301
+                TX_LANE_MAP: 0x10324657
+                RX_POLARITY_FLIP: 0xb1
+                TX_POLARITY_FLIP: 0x73
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -590,10 +592,10 @@ device:
                 PC_PM_ID: 46
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01325746
-                TX_LANE_MAP: 0x57643201
-                RX_POLARITY_FLIP: 0xd8
-                TX_POLARITY_FLIP: 0x5b
+                RX_LANE_MAP: 0x64752310
+                TX_LANE_MAP: 0x10234675
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0xda
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -602,8 +604,8 @@ device:
                 PC_PM_ID: 47
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01237564
-                TX_LANE_MAP: 0x01326475
+                RX_LANE_MAP: 0x1237564
+                TX_LANE_MAP: 0x1326475
                 RX_POLARITY_FLIP: 0xbb
                 TX_POLARITY_FLIP: 0xe3
                 RX_LANE_MAP_AUTO: 0
@@ -614,10 +616,10 @@ device:
                 PC_PM_ID: 48
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x57461032
-                TX_LANE_MAP: 0x32017564
-                RX_POLARITY_FLIP: 0x8d
-                TX_POLARITY_FLIP: 0xb9
+                RX_LANE_MAP: 0x64752301
+                TX_LANE_MAP: 0x10234657
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0xd9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -638,10 +640,10 @@ device:
                 PC_PM_ID: 50
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23014657
-                TX_LANE_MAP: 0x64571023
-                RX_POLARITY_FLIP: 0x65
-                TX_POLARITY_FLIP: 0x6c
+                RX_LANE_MAP: 0x10327564
+                TX_LANE_MAP: 0x75463201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -650,10 +652,10 @@ device:
                 PC_PM_ID: 51
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x32106475
-                TX_LANE_MAP: 0x46750132
-                RX_POLARITY_FLIP: 0x9a
-                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x57642310
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x93
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -662,10 +664,10 @@ device:
                 PC_PM_ID: 52
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23014657
-                TX_LANE_MAP: 0x64571023
-                RX_POLARITY_FLIP: 0x65
-                TX_POLARITY_FLIP: 0x6c
+                RX_LANE_MAP: 0x10327564
+                TX_LANE_MAP: 0x75463201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -674,10 +676,10 @@ device:
                 PC_PM_ID: 53
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x32106475
-                TX_LANE_MAP: 0x46750132
-                RX_POLARITY_FLIP: 0x9a
-                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x57642310
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x93
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -686,10 +688,10 @@ device:
                 PC_PM_ID: 54
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x34152607
-                TX_LANE_MAP: 0x46720153
-                RX_POLARITY_FLIP: 0x87
-                TX_POLARITY_FLIP: 0x8e
+                RX_LANE_MAP: 0x51437062
+                TX_LANE_MAP: 0x27643510
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x17
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -698,8 +700,8 @@ device:
                 PC_PM_ID: 55
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01235746
-                TX_LANE_MAP: 0x01324675
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x1324675
                 RX_POLARITY_FLIP: 0x95
                 TX_POLARITY_FLIP: 0x36
                 RX_LANE_MAP_AUTO: 0
@@ -710,10 +712,10 @@ device:
                 PC_PM_ID: 56
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23014657
-                TX_LANE_MAP: 0x64571023
-                RX_POLARITY_FLIP: 0x65
-                TX_POLARITY_FLIP: 0x6c
+                RX_LANE_MAP: 0x10327564
+                TX_LANE_MAP: 0x75463201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -722,8 +724,8 @@ device:
                 PC_PM_ID: 57
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01235746
-                TX_LANE_MAP: 0x01324675
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x1324675
                 RX_POLARITY_FLIP: 0x95
                 TX_POLARITY_FLIP: 0x36
                 RX_LANE_MAP_AUTO: 0
@@ -734,10 +736,10 @@ device:
                 PC_PM_ID: 58
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x45670123
-                TX_LANE_MAP: 0x12034675
-                RX_POLARITY_FLIP: 0xc6
-                TX_POLARITY_FLIP: 0x56
+                RX_LANE_MAP: 0x76543210
+                TX_LANE_MAP: 0x30215764
+                RX_POLARITY_FLIP: 0x36
+                TX_POLARITY_FLIP: 0xa6
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -746,10 +748,10 @@ device:
                 PC_PM_ID: 59
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x45670123
-                TX_LANE_MAP: 0x12036457
-                RX_POLARITY_FLIP: 0xc6
-                TX_POLARITY_FLIP: 0x79
+                RX_LANE_MAP: 0x76543210
+                TX_LANE_MAP: 0x30217546
+                RX_POLARITY_FLIP: 0x36
+                TX_POLARITY_FLIP: 0xe9
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -758,10 +760,10 @@ device:
                 PC_PM_ID: 60
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23016745
-                TX_LANE_MAP: 0x32016754
-                RX_POLARITY_FLIP: 0x97
-                TX_POLARITY_FLIP: 0x63
+                RX_LANE_MAP: 0x10325476
+                TX_LANE_MAP: 0x10234576
+                RX_POLARITY_FLIP: 0x9e
+                TX_POLARITY_FLIP: 0x6c
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -770,9 +772,9 @@ device:
                 PC_PM_ID: 61
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x03214567
-                TX_LANE_MAP: 0x23016745
-                RX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP: 0x12307654
+                TX_LANE_MAP: 0x10325476
+                RX_POLARITY_FLIP: 0x55
                 TX_POLARITY_FLIP: 0x99
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
@@ -782,10 +784,10 @@ device:
                 PC_PM_ID: 62
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x23670145
-                TX_LANE_MAP: 0x23670145
-                RX_POLARITY_FLIP: 0xa5
-                TX_POLARITY_FLIP: 0x55
+                RX_LANE_MAP: 0x76325410
+                TX_LANE_MAP: 0x76325410
+                RX_POLARITY_FLIP: 0x5a
+                TX_POLARITY_FLIP: 0xaa
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -795,7 +797,7 @@ device:
                 CORE_INDEX: 0
             :
                 RX_LANE_MAP: 0x75643120
-                TX_LANE_MAP: 0x02134657
+                TX_LANE_MAP: 0x2134657
                 RX_POLARITY_FLIP: 0xcc
                 TX_POLARITY_FLIP: 0x66
                 RX_LANE_MAP_AUTO: 0
@@ -806,10 +808,10 @@ device:
                 PC_PM_ID: 64
                 CORE_INDEX: 0
             :
-                RX_LANE_MAP: 0x01234567
-                TX_LANE_MAP: 0x01234567
-                RX_POLARITY_FLIP: 0x6e
-                TX_POLARITY_FLIP: 0x55
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0xaa
                 RX_LANE_MAP_AUTO: 0
                 TX_LANE_MAP_AUTO: 0
                 RX_POLARITY_FLIP_AUTO: 0
@@ -1446,3 +1448,1146 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
+### Baseline
+# Skipping buffer reservation. This means that don't use SDK default setings.
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            MIRROR_ON_DROP_RESERVATION: 0
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+
+...
+# Initialize the various thresholds to zero
+---
+# Ingress service pool level initialization
+device:
+    0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+
+        # Ingress headroom pool
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+
+        # PFC generation: Priority group(s)
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        # Egress multicast CQE pool
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+
+...
+# Per Port Registers
+# Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                # Pause enable bit,
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+               PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+...
+# Output Port Thresholds -2 
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+
+...
+### Begin MMU ingress threshold settings
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269671
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 43376
+
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [76, 274]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+
+...
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 329816
+                RESUME_LIMIT_CELLS: 329816
+
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 2410
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1548
+            ?
+                PORT_ID: [76, 274]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+
+...
+### Egress Service Pools
+---
+device:
+    0:
+# Setting Q group limit to 0
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269671
+                SHARED_RESUME_LIMIT_CELLS: 33699
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 25282
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25272
+                RED_SHARED_LIMIT_CELLS: 21069
+                RED_SHARED_RESUME_LIMIT_CELLS: 21059
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19538
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_RESUME_LIMIT_CELLS: 2432
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1832
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1822
+                RED_SHARED_LIMIT_CELLS: 1527
+                RED_SHARED_RESUME_LIMIT_CELLS: 1517
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+
+...
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [0,1,2,5,6]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+
+# Egress Port Thresholds.
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 21068
+                YELLOW_SHARED_LIMIT_CELLS: 25281
+                SHARED_LIMIT_CELLS: 269671
+                RED_SHARED_RESUME_LIMIT_CELLS: 21066
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25279
+                SHARED_RESUME_LIMIT_CELLS: 33707
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1526
+                YELLOW_SHARED_LIMIT_CELLS: 1831
+                SHARED_LIMIT_CELLS: 19538
+                RED_SHARED_RESUME_LIMIT_CELLS: 1524
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1829
+                SHARED_RESUME_LIMIT_CELLS: 2440
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+...
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 3051
+                SHARED_RESUME_LIMIT_PKTS: 3037
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2288
+                RED_SHARED_LIMIT_PKTS: 1906
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2274
+                RED_SHARED_RESUME_LIMIT_PKTS: 1892
+
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+...
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/BALANCED b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/BALANCED
deleted file mode 120000
index afd21766cc6..00000000000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/BALANCED
+++ /dev/null
@@ -1 +0,0 @@
-../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2
deleted file mode 120000
index 35b3dd5d135..00000000000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2
+++ /dev/null
@@ -1 +0,0 @@
-../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffer_ports.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2
new file mode 100644
index 00000000000..725347049cf
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers.json.j2
deleted file mode 120000
index 8658b687e28..00000000000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers.json.j2
+++ /dev/null
@@ -1 +0,0 @@
-../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers.json.j2
new file mode 100644
index 00000000000..1083a6210fc
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't0' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2
deleted file mode 120000
index 9524e6a476a..00000000000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2
+++ /dev/null
@@ -1 +0,0 @@
-BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2
new file mode 100644
index 00000000000..b231c710c05
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "166115492",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "22035008"
+        },
+        "egress_lossless_pool": {
+            "size": "166115492",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "167546528"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "167546528"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2
deleted file mode 120000
index c25cc95d6d5..00000000000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2
+++ /dev/null
@@ -1 +0,0 @@
-BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..b231c710c05
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "166115492",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "22035008"
+        },
+        "egress_lossless_pool": {
+            "size": "166115492",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "167546528"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "167546528"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/hwsku.json b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/hwsku.json
index 6c2013a138d..9ead33d4a31 100644
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/hwsku.json
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/hwsku.json
@@ -174,61 +174,61 @@
         },
         "Ethernet136": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "3",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet140": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "4",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet144": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "5",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet148": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "6",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet152": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "7",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet156": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "8",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet160": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "9",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet164": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "10",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet168": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "11",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet172": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "12",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
@@ -246,61 +246,61 @@
         },
         "Ethernet184": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "3",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet188": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "4",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet192": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "5",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet196": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "6",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet200": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "7",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet204": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "8",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet208": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "9",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet212": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "10",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet216": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "11",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet220": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "12",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
@@ -318,61 +318,61 @@
         },
         "Ethernet232": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "3",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet236": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "4",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet240": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "5",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet244": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "6",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet248": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "7",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet252": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "8",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet256": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "9",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet260": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "10",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet264": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "11",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet268": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "12",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
@@ -390,61 +390,61 @@
         },
         "Ethernet280": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "3",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet284": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "4",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet288": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "5",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet292": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "6",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet296": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "7",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet300": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "8",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet304": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "9",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet308": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "10",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet312": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "11",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet316": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "12",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
@@ -462,61 +462,61 @@
         },
         "Ethernet328": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "3",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet332": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "4",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet336": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "5",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet340": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "6",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet344": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "7",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet348": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "8",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet352": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "9",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet356": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "10",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet360": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "11",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet364": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "12",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
@@ -534,61 +534,61 @@
         },
         "Ethernet376": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "3",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet380": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "4",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet384": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "5",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet388": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "6",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet392": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "7",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet396": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "8",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet400": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "9",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet404": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "10",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet408": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "11",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet412": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "12",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
@@ -606,61 +606,61 @@
         },
         "Ethernet424": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "3",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet428": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "4",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet432": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "5",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet436": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "6",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet440": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "7",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet444": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "8",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet448": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "9",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet452": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "10",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet456": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "11",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet460": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "12",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
@@ -678,61 +678,61 @@
         },
         "Ethernet472": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "3",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet476": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "4",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet480": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "5",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet484": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "6",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet488": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "7",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet492": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "8",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet496": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "9",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet500": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "10",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet504": {
             "fec": "rs",
-            "subport": "1",
+            "subport": "11",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
         "Ethernet508": {
             "fec": "rs",
-            "subport": "2",
+            "subport": "12",
             "autoneg": "on",
             "default_brkout_mode": "1x400G"
         },
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini
deleted file mode 120000
index 297cddb2d22..00000000000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini
+++ /dev/null
@@ -1 +0,0 @@
-BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini
new file mode 100644
index 00000000000..d360a4b0d5e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/pg_profile_lookup.ini
@@ -0,0 +1,5 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff    threshold xon_offset
+400000  5m    18796   0    393192  0         3556
+400000  40m   18796   0    612140  0         3556
+400000  150m  18796   0    612140  0         3556
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/port_config.ini b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/port_config.ini
index 3bd85b913a6..123aef1ab4b 100644
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/port_config.ini
@@ -31,101 +31,101 @@ Ethernet112  129,130,131,132  etp15a  15     400000  rs
 Ethernet116  133,134,135,136  etp15b  15     400000  rs
 Ethernet120  113,114,115,116  etp16a  16     400000  rs
 Ethernet124  117,118,119,120  etp16b  16     400000  rs
-Ethernet128  405,406,407,408  etp17a  17     400000  rs
-Ethernet132  401,402,403,404  etp17b  17     400000  rs
-Ethernet136  397,398,399,400  etp17c  17     400000  rs
-Ethernet140  393,394,395,396  etp17d  17     400000  rs
-Ethernet144  421,422,423,424  etp17e  17     400000  rs
-Ethernet148  417,418,419,420  etp17f  17     400000  rs
-Ethernet152  413,414,415,416  etp17g  17     400000  rs
-Ethernet156  409,410,411,412  etp17h  17     400000  rs
-Ethernet160  425,426,427,428  etp17i  17     400000  rs
-Ethernet164  429,430,431,432  etp17j  17     400000  rs
-Ethernet168  445,446,447,448  etp17k  17     400000  rs
-Ethernet172  441,442,443,444  etp17l  17     400000  rs
-Ethernet176  61,62,63,64      etp18a  18     400000  rs
-Ethernet180  57,58,59,60      etp18b  18     400000  rs
-Ethernet184  45,46,47,48      etp18c  18     400000  rs
-Ethernet188  41,42,43,44      etp18d  18     400000  rs
-Ethernet192  37,38,39,40      etp18e  18     400000  rs
-Ethernet196  33,34,35,36      etp18f  18     400000  rs
-Ethernet200  29,30,31,32      etp18g  18     400000  rs
-Ethernet204  25,26,27,28      etp18h  18     400000  rs
-Ethernet208  21,22,23,24      etp18i  18     400000  rs
-Ethernet212  17,18,19,20      etp18j  18     400000  rs
-Ethernet216  1,2,3,4          etp18k  18     400000  rs
-Ethernet220  5,6,7,8          etp18l  18     400000  rs
-Ethernet224  509,510,511,512  etp19a  19     400000  rs
-Ethernet228  505,506,507,508  etp19b  19     400000  rs
-Ethernet232  489,490,491,492  etp19c  19     400000  rs
-Ethernet236  493,494,495,496  etp19d  19     400000  rs
-Ethernet240  485,486,487,488  etp19e  19     400000  rs
-Ethernet244  481,482,483,484  etp19f  19     400000  rs
-Ethernet248  477,478,479,480  etp19g  19     400000  rs
-Ethernet252  473,474,475,476  etp19h  19     400000  rs
-Ethernet256  465,466,467,468  etp19i  19     400000  rs
-Ethernet260  469,470,471,472  etp19j  19     400000  rs
-Ethernet264  457,458,459,460  etp19k  19     400000  rs
-Ethernet268  461,462,463,464  etp19l  19     400000  rs
-Ethernet272  81,82,83,84      etp20a  20     400000  rs
-Ethernet276  85,86,87,88      etp20b  20     400000  rs
-Ethernet280  73,74,75,76      etp20c  20     400000  rs
-Ethernet284  77,78,79,80      etp20d  20     400000  rs
-Ethernet288  97,98,99,100     etp20e  20     400000  rs
-Ethernet292  101,102,103,104  etp20f  20     400000  rs
-Ethernet296  89,90,91,92      etp20g  20     400000  rs
-Ethernet300  93,94,95,96      etp20h  20     400000  rs
-Ethernet304  105,106,107,108  etp20i  20     400000  rs
-Ethernet308  109,110,111,112  etp20j  20     400000  rs
-Ethernet312  121,122,123,124  etp20k  20     400000  rs
-Ethernet316  125,126,127,128  etp20l  20     400000  rs
-Ethernet320  329,330,331,332  etp21a  21     400000  rs
-Ethernet324  333,334,335,336  etp21b  21     400000  rs
-Ethernet328  337,338,339,340  etp21c  21     400000  rs
-Ethernet332  345,346,347,348  etp21d  21     400000  rs
-Ethernet336  349,350,351,352  etp21e  21     400000  rs
-Ethernet340  341,342,343,344  etp21f  21     400000  rs
-Ethernet344  353,354,355,356  etp21g  21     400000  rs
-Ethernet348  361,362,363,364  etp21h  21     400000  rs
-Ethernet352  365,366,367,368  etp21i  21     400000  rs
-Ethernet356  357,358,359,360  etp21j  21     400000  rs
-Ethernet360  377,378,379,380  etp21k  21     400000  rs
-Ethernet364  381,382,383,384  etp21l  21     400000  rs
-Ethernet368  261,262,263,264  etp22a  22     400000  rs
-Ethernet372  257,258,259,260  etp22b  22     400000  rs
+Ethernet128  101,102,103,104  etp17a  17     400000  rs
+Ethernet132  97,98,99,100     etp17b  17     400000  rs
+Ethernet136  125,126,127,128  etp17c  17     400000  rs
+Ethernet140  121,122,123,124  etp17d  17     400000  rs
+Ethernet144  77,78,79,80      etp17e  17     400000  rs
+Ethernet148  73,74,75,76      etp17f  17     400000  rs
+Ethernet152  109,110,111,112  etp17g  17     400000  rs
+Ethernet156  105,106,107,108  etp17h  17     400000  rs
+Ethernet160  85,86,87,88      etp17i  17     400000  rs
+Ethernet164  81,82,83,84      etp17j  17     400000  rs
+Ethernet168  93,94,95,96      etp17k  17     400000  rs
+Ethernet172  89,90,91,92      etp17l  17     400000  rs
+Ethernet176  189,190,191,192  etp18a  18     400000  rs
+Ethernet180  185,186,187,188  etp18b  18     400000  rs
+Ethernet184  149,150,151,152  etp18c  18     400000  rs
+Ethernet188  157,158,159,160  etp18d  18     400000  rs
+Ethernet192  165,166,167,168  etp18e  18     400000  rs
+Ethernet196  173,174,175,176  etp18f  18     400000  rs
+Ethernet200  153,154,155,156  etp18g  18     400000  rs
+Ethernet204  145,146,147,148  etp18h  18     400000  rs
+Ethernet208  169,170,171,172  etp18i  18     400000  rs
+Ethernet212  161,162,163,164  etp18j  18     400000  rs
+Ethernet216  141,142,143,144  etp18k  18     400000  rs
+Ethernet220  137,138,139,140  etp18l  18     400000  rs
+Ethernet224  37,38,39,40      etp19a  19     400000  rs
+Ethernet228  33,34,35,36      etp19b  19     400000  rs
+Ethernet232  5,6,7,8          etp19c  19     400000  rs
+Ethernet236  1,2,3,4          etp19d  19     400000  rs
+Ethernet240  45,46,47,48      etp19e  19     400000  rs
+Ethernet244  41,42,43,44      etp19f  19     400000  rs
+Ethernet248  21,22,23,24      etp19g  19     400000  rs
+Ethernet252  17,18,19,20      etp19h  19     400000  rs
+Ethernet256  61,62,63,64      etp19i  19     400000  rs
+Ethernet260  57,58,59,60      etp19j  19     400000  rs
+Ethernet264  29,30,31,32      etp19k  19     400000  rs
+Ethernet268  25,26,27,28      etp19l  19     400000  rs
+Ethernet272  253,254,255,256  etp20a  20     400000  rs
+Ethernet276  249,250,251,252  etp20b  20     400000  rs
+Ethernet280  213,214,215,216  etp20c  20     400000  rs
+Ethernet284  221,222,223,224  etp20d  20     400000  rs
+Ethernet288  229,230,231,232  etp20e  20     400000  rs
+Ethernet292  237,238,239,240  etp20f  20     400000  rs
+Ethernet296  217,218,219,220  etp20g  20     400000  rs
+Ethernet300  209,210,211,212  etp20h  20     400000  rs
+Ethernet304  233,234,235,236  etp20i  20     400000  rs
+Ethernet308  225,226,227,228  etp20j  20     400000  rs
+Ethernet312  205,206,207,208  etp20k  20     400000  rs
+Ethernet316  201,202,203,204  etp20l  20     400000  rs
+Ethernet320  485,486,487,488  etp21a  21     400000  rs
+Ethernet324  481,482,483,484  etp21b  21     400000  rs
+Ethernet328  461,462,463,464  etp21c  21     400000  rs
+Ethernet332  457,458,459,460  etp21d  21     400000  rs
+Ethernet336  493,494,495,496  etp21e  21     400000  rs
+Ethernet340  489,490,491,492  etp21f  21     400000  rs
+Ethernet344  469,470,471,472  etp21g  21     400000  rs
+Ethernet348  465,466,467,468  etp21h  21     400000  rs
+Ethernet352  509,510,511,512  etp21i  21     400000  rs
+Ethernet356  505,506,507,508  etp21j  21     400000  rs
+Ethernet360  477,478,479,480  etp21k  21     400000  rs
+Ethernet364  473,474,475,476  etp21l  21     400000  rs
+Ethernet368  317,318,319,320  etp22a  22     400000  rs
+Ethernet372  313,314,315,316  etp22b  22     400000  rs
 Ethernet376  285,286,287,288  etp22c  22     400000  rs
 Ethernet380  277,278,279,280  etp22d  22     400000  rs
-Ethernet384  273,274,275,276  etp22e  22     400000  rs
-Ethernet388  281,282,283,284  etp22f  22     400000  rs
-Ethernet392  293,294,295,296  etp22g  22     400000  rs
-Ethernet396  297,298,299,300  etp22h  22     400000  rs
-Ethernet400  301,302,303,304  etp22i  22     400000  rs
+Ethernet384  293,294,295,296  etp22e  22     400000  rs
+Ethernet388  301,302,303,304  etp22f  22     400000  rs
+Ethernet392  273,274,275,276  etp22g  22     400000  rs
+Ethernet396  281,282,283,284  etp22h  22     400000  rs
+Ethernet400  297,298,299,300  etp22i  22     400000  rs
 Ethernet404  289,290,291,292  etp22j  22     400000  rs
-Ethernet408  313,314,315,316  etp22k  22     400000  rs
-Ethernet412  317,318,319,320  etp22l  22     400000  rs
-Ethernet416  205,206,207,208  etp23a  23     400000  rs
-Ethernet420  201,202,203,204  etp23b  23     400000  rs
-Ethernet424  213,214,215,216  etp23c  23     400000  rs
-Ethernet428  217,218,219,220  etp23d  23     400000  rs
-Ethernet432  221,222,223,224  etp23e  23     400000  rs
-Ethernet436  209,210,211,212  etp23f  23     400000  rs
-Ethernet440  225,226,227,228  etp23g  23     400000  rs
-Ethernet444  233,234,235,236  etp23h  23     400000  rs
-Ethernet448  237,238,239,240  etp23i  23     400000  rs
-Ethernet452  229,230,231,232  etp23j  23     400000  rs
-Ethernet456  249,250,251,252  etp23k  23     400000  rs
-Ethernet460  253,254,255,256  etp23l  23     400000  rs
-Ethernet464  141,142,143,144  etp24a  24     400000  rs
-Ethernet468  137,138,139,140  etp24b  24     400000  rs
-Ethernet472  149,150,151,152  etp24c  24     400000  rs
-Ethernet476  157,158,159,160  etp24d  24     400000  rs
-Ethernet480  153,154,155,156  etp24e  24     400000  rs
-Ethernet484  145,146,147,148  etp24f  24     400000  rs
-Ethernet488  165,166,167,168  etp24g  24     400000  rs
-Ethernet492  173,174,175,176  etp24h  24     400000  rs
-Ethernet496  169,170,171,172  etp24i  24     400000  rs
-Ethernet500  161,162,163,164  etp24j  24     400000  rs
-Ethernet504  189,190,191,192  etp24k  24     400000  rs
-Ethernet508  185,186,187,188  etp24l  24     400000  rs
+Ethernet408  261,262,263,264  etp22k  22     400000  rs
+Ethernet412  257,258,259,260  etp22l  22     400000  rs
+Ethernet416  421,422,423,424  etp23a  23     400000  rs
+Ethernet420  417,418,419,420  etp23b  23     400000  rs
+Ethernet424  445,446,447,448  etp23c  23     400000  rs
+Ethernet428  441,442,443,444  etp23d  23     400000  rs
+Ethernet432  397,398,399,400  etp23e  23     400000  rs
+Ethernet436  393,394,395,396  etp23f  23     400000  rs
+Ethernet440  429,430,431,432  etp23g  23     400000  rs
+Ethernet444  425,426,427,428  etp23h  23     400000  rs
+Ethernet448  405,406,407,408  etp23i  23     400000  rs
+Ethernet452  401,402,403,404  etp23j  23     400000  rs
+Ethernet456  413,414,415,416  etp23k  23     400000  rs
+Ethernet460  409,410,411,412  etp23l  23     400000  rs
+Ethernet464  381,382,383,384  etp24a  24     400000  rs
+Ethernet468  377,378,379,380  etp24b  24     400000  rs
+Ethernet472  341,342,343,344  etp24c  24     400000  rs
+Ethernet476  349,350,351,352  etp24d  24     400000  rs
+Ethernet480  357,358,359,360  etp24e  24     400000  rs
+Ethernet484  365,366,367,368  etp24f  24     400000  rs
+Ethernet488  345,346,347,348  etp24g  24     400000  rs
+Ethernet492  337,338,339,340  etp24h  24     400000  rs
+Ethernet496  361,362,363,364  etp24i  24     400000  rs
+Ethernet500  353,354,355,356  etp24j  24     400000  rs
+Ethernet504  333,334,335,336  etp24k  24     400000  rs
+Ethernet508  329,330,331,332  etp24l  24     400000  rs
 Ethernet512  513              etp25a  25     10000   none
 Ethernet513  514              etp25b  25     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/qos.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/qos.json.j2
deleted file mode 120000
index 1d89e90b055..00000000000
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/qos.json.j2
+++ /dev/null
@@ -1 +0,0 @@
-../../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/qos.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/qos.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/qos.json.j2
new file mode 100644
index 00000000000..00fa61ee0c8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/qos.json.j2
@@ -0,0 +1,161 @@
+{%- macro generate_dscp_to_tc_map_per_sku() -%}
+    "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "0",
+            "1" : "0",
+            "2" : "0",
+            "3" : "3",
+            "4" : "4",
+            "5" : "0",
+            "6" : "0",
+            "7" : "0",
+            "8" : "0",
+            "9" : "0",
+            "10": "0",
+            "11": "0",
+            "12": "0",
+            "13": "0",
+            "14": "0",
+            "15": "0",
+            "16": "0",
+            "17": "0",
+            "18": "0",
+            "19": "0",
+            "20": "0",
+            "21": "0",
+            "22": "0",
+            "23": "0",
+            "24": "0",
+            "25": "0",
+            "26": "0",
+            "27": "0",
+            "28": "0",
+            "29": "0",
+            "30": "0",
+            "31": "0",
+            "32": "0",
+            "33": "0",
+            "34": "0",
+            "35": "0",
+            "36": "0",
+            "37": "0",
+            "38": "0",
+            "39": "0",
+            "40": "0",
+            "41": "0",
+            "42": "0",
+            "43": "0",
+            "44": "6",
+            "45": "0",
+            "46": "5",
+            "47": "1",
+            "48": "0",
+            "49": "0",
+            "50": "0",
+            "51": "0",
+            "52": "0",
+            "53": "0",
+            "54": "0",
+            "55": "0",
+            "56": "0",
+            "57": "0",
+            "58": "0",
+            "59": "0",
+            "60": "0",
+            "61": "0",
+            "62": "0",
+            "63": "0"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_scheduler_per_sku() -%}
+    "SCHEDULER": {
+        "SCHEDULER_Q1": {
+            "type"  : "DWRR",
+            "weight": "10"
+        },
+        "SCHEDULER_Q3": {
+            "type"  : "DWRR",
+            "weight": "20"
+        },
+        "SCHEDULER_Q4": {
+            "type"  : "DWRR",
+            "weight": "10"
+        },
+        "SCHEDULER_Q6": {
+            "type"  : "DWRR",
+            "weight": "70"
+        },
+        "SCHEDULER_DEFAULT": {
+            "type"  : "DWRR",
+            "weight": "10"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_single_queue_per_sku(port) -%}
+        "{{ port }}|0": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|1": {
+            "scheduler": "SCHEDULER_Q1"
+        },
+        "{{ port }}|2": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|3": {
+            "scheduler": "SCHEDULER_Q3",
+            "wred_profile": "WRED_LOSSLESS_Q3"
+        },
+        "{{ port }}|4": {
+            "scheduler": "SCHEDULER_Q4",
+            "wred_profile": "WRED_LOSSLESS_Q4"
+        },
+        "{{ port }}|5": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|6": {
+            "scheduler": "SCHEDULER_Q6"
+        },
+        "{{ port }}|7": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        }
+{%- endmacro -%}
+
+{%- macro generate_wred_profiles() -%}
+    "WRED_PROFILE": {
+        "WRED_LOSSLESS_Q3": {
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "262144",
+            "green_min_threshold": "131072",
+            "red_drop_probability": "5",
+            "red_max_threshold": "262144",
+            "red_min_threshold": "131072",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "262144",
+            "yellow_min_threshold": "131072"
+        },
+        "WRED_LOSSLESS_Q4": {
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "262144",
+            "green_min_threshold": "131072",
+            "red_drop_probability": "5",
+            "red_max_threshold": "262144",
+            "red_min_threshold": "131072",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "262144",
+            "yellow_min_threshold": "131072"
+        }
+    },
+{%- endmacro -%}
+
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/sai.profile
index f299df75d26..a227ff8491f 100644
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/sai.profile
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/sai.profile
@@ -1 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-16pe-384c.config.bcm
+SAI_NUM_ECMP_MEMBERS=128
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/th5-a7060x6-16pe-384c.config.bcm
index e1128c83404..bdd0e7704ba 100644
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/th5-a7060x6-16pe-384c.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/th5-a7060x6-16pe-384c.config.bcm
@@ -34,6 +34,7 @@ bcm_device:
             l3_alpm_template: 1
             l3_alpm_hit_skip: 1
             sai_feat_tail_timestamp : 1
+            sai_mmu_custom_config : 1
             sai_port_phy_time_sync_en : 1
             sai_field_group_auto_prioritize: 1
             #l3_intf_vlan_split_egress for MTU at L3IF
@@ -42,6 +43,7 @@ bcm_device:
             sai_tunnel_support: 2
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
@@ -1350,14 +1352,6 @@ device:
                 PORT_ID: 164
             :
                 PC_PHYS_PORT_ID: 514
-#           ?
-#               PORT_ID: 274
-#           :
-#               PC_PHYS_PORT_ID: 515
-#           ?
-#               PORT_ID: 186
-#           :
-#               PC_PHYS_PORT_ID: 516
 ...
 ---
 device:
@@ -1403,7 +1397,6 @@ device:
                 FEC_MODE: PC_FEC_RS544_2XN
                 MAX_FRAME_SIZE: 9416
             ?
-#               PORT_ID: [[76, 76], [164, 164], [274, 274], [186, 186]]
                 PORT_ID: [[76, 76], [164, 164]]
             :
                 ENABLE: 0
@@ -1446,3 +1439,1146 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
+### Baseline
+# Skipping buffer reservation. This means that don't use SDK default setings.
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            MIRROR_ON_DROP_RESERVATION: 0
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+
+...
+# Initialize the various thresholds to zero
+---
+# Ingress service pool level initialization
+device:
+    0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+
+        # Ingress headroom pool
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+
+        # PFC generation: Priority group(s)
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        # Egress multicast CQE pool
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+
+...
+# Per Port Registers
+# Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                # Pause enable bit,
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+               PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+...
+# Output Port Thresholds -2 
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+
+...
+### Begin MMU ingress threshold settings
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269671
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 43376
+
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [76, 274]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+
+...
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 329816
+                RESUME_LIMIT_CELLS: 329816
+
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 2410
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1548
+            ?
+                PORT_ID: [76, 274]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+
+...
+### Egress Service Pools
+---
+device:
+    0:
+# Setting Q group limit to 0
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269671
+                SHARED_RESUME_LIMIT_CELLS: 33699
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 25282
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25272
+                RED_SHARED_LIMIT_CELLS: 21069
+                RED_SHARED_RESUME_LIMIT_CELLS: 21059
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19538
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_RESUME_LIMIT_CELLS: 2432
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1832
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1822
+                RED_SHARED_LIMIT_CELLS: 1527
+                RED_SHARED_RESUME_LIMIT_CELLS: 1517
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+
+...
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [0,1,2,5,6]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+
+# Egress Port Thresholds.
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 21068
+                YELLOW_SHARED_LIMIT_CELLS: 25281
+                SHARED_LIMIT_CELLS: 269671
+                RED_SHARED_RESUME_LIMIT_CELLS: 21066
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25279
+                SHARED_RESUME_LIMIT_CELLS: 33707
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1526
+                YELLOW_SHARED_LIMIT_CELLS: 1831
+                SHARED_LIMIT_CELLS: 19538
+                RED_SHARED_RESUME_LIMIT_CELLS: 1524
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1829
+                SHARED_RESUME_LIMIT_CELLS: 2440
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+...
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 3051
+                SHARED_RESUME_LIMIT_PKTS: 3037
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2288
+                RED_SHARED_LIMIT_PKTS: 1906
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2274
+                RED_SHARED_RESUME_LIMIT_PKTS: 1892
+
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+...
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/platform.json b/device/arista/x86_64-arista_7060x6_16pe_384c/platform.json
index d6d2e69f9e3..6f9b6e3af21 100644
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/platform.json
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/platform.json
@@ -6,13 +6,13 @@
                 "name": "Aboot()"
             },
             {
-                "name": "Scd(addr=0000:04:00.0)"
+                "name": "Scd(addr=0000:03:00.0)"
             },
             {
                 "name": "Scd(addr=0000:06:00.0)"
             },
             {
-                "name": "Scd(addr=0000:08:00.0)"
+                "name": "Scd(addr=0000:05:00.0)"
             },
             {
                 "name": "RedstartSysCpld(addr=13-0023)"
@@ -59,12 +59,18 @@
                 "name": "psu1",
                 "voltage_high_threshold": false,
                 "voltage_low_threshold": false,
+                "status_led": {
+                    "controllable": false
+                },
                 "fans": []
             },
             {
                 "name": "psu2",
                 "voltage_high_threshold": false,
                 "voltage_low_threshold": false,
+                "status_led": {
+                    "controllable": false
+                },
                 "fans": []
             }
         ],
@@ -100,6 +106,11 @@
             {
                 "name": "TH5 PCB Right",
                 "controllable": false
+            },
+            {
+                "name": "Port Card",
+                "controllable": false
+
             }
         ],
         "sfps": [
@@ -471,7 +482,7 @@
         },
         "Ethernet128": {
             "index": "17,17,17,17",
-            "lanes": "73,74,75,76",
+            "lanes": "101,102,103,104",
             "breakout_modes": {
                 "1x400G": [
                     "etp17a"
@@ -480,7 +491,7 @@
         },
         "Ethernet132": {
             "index": "17,17,17,17",
-            "lanes": "77,78,79,80",
+            "lanes": "97,98,99,100",
             "breakout_modes": {
                 "1x400G": [
                     "etp17b"
@@ -489,7 +500,7 @@
         },
         "Ethernet136": {
             "index": "17,17,17,17",
-            "lanes": "81,82,83,84",
+            "lanes": "125,126,127,128",
             "breakout_modes": {
                 "1x400G": [
                     "etp17c"
@@ -498,7 +509,7 @@
         },
         "Ethernet140": {
             "index": "17,17,17,17",
-            "lanes": "85,86,87,88",
+            "lanes": "121,122,123,124",
             "breakout_modes": {
                 "1x400G": [
                     "etp17d"
@@ -507,7 +518,7 @@
         },
         "Ethernet144": {
             "index": "17,17,17,17",
-            "lanes": "89,90,91,92",
+            "lanes": "77,78,79,80",
             "breakout_modes": {
                 "1x400G": [
                     "etp17e"
@@ -516,7 +527,7 @@
         },
         "Ethernet148": {
             "index": "17,17,17,17",
-            "lanes": "93,94,95,96",
+            "lanes": "73,74,75,76",
             "breakout_modes": {
                 "1x400G": [
                     "etp17f"
@@ -525,7 +536,7 @@
         },
         "Ethernet152": {
             "index": "17,17,17,17",
-            "lanes": "97,98,99,100",
+            "lanes": "109,110,111,112",
             "breakout_modes": {
                 "1x400G": [
                     "etp17g"
@@ -534,7 +545,7 @@
         },
         "Ethernet156": {
             "index": "17,17,17,17",
-            "lanes": "101,102,103,104",
+            "lanes": "105,106,107,108",
             "breakout_modes": {
                 "1x400G": [
                     "etp17h"
@@ -543,7 +554,7 @@
         },
         "Ethernet160": {
             "index": "17,17,17,17",
-            "lanes": "105,106,107,108",
+            "lanes": "85,86,87,88",
             "breakout_modes": {
                 "1x400G": [
                     "etp17i"
@@ -552,7 +563,7 @@
         },
         "Ethernet164": {
             "index": "17,17,17,17",
-            "lanes": "109,110,111,112",
+            "lanes": "81,82,83,84",
             "breakout_modes": {
                 "1x400G": [
                     "etp17j"
@@ -561,7 +572,7 @@
         },
         "Ethernet168": {
             "index": "17,17,17,17",
-            "lanes": "121,122,123,124",
+            "lanes": "93,94,95,96",
             "breakout_modes": {
                 "1x400G": [
                     "etp17k"
@@ -570,7 +581,7 @@
         },
         "Ethernet172": {
             "index": "17,17,17,17",
-            "lanes": "125,126,127,128",
+            "lanes": "89,90,91,92",
             "breakout_modes": {
                 "1x400G": [
                     "etp17l"
@@ -579,7 +590,7 @@
         },
         "Ethernet176": {
             "index": "18,18,18,18",
-            "lanes": "137,138,139,140",
+            "lanes": "189,190,191,192",
             "breakout_modes": {
                 "1x400G": [
                     "etp18a"
@@ -588,7 +599,7 @@
         },
         "Ethernet180": {
             "index": "18,18,18,18",
-            "lanes": "141,142,143,144",
+            "lanes": "185,186,187,188",
             "breakout_modes": {
                 "1x400G": [
                     "etp18b"
@@ -597,7 +608,7 @@
         },
         "Ethernet184": {
             "index": "18,18,18,18",
-            "lanes": "145,146,147,148",
+            "lanes": "149,150,151,152",
             "breakout_modes": {
                 "1x400G": [
                     "etp18c"
@@ -606,7 +617,7 @@
         },
         "Ethernet188": {
             "index": "18,18,18,18",
-            "lanes": "149,150,151,152",
+            "lanes": "157,158,159,160",
             "breakout_modes": {
                 "1x400G": [
                     "etp18d"
@@ -615,7 +626,7 @@
         },
         "Ethernet192": {
             "index": "18,18,18,18",
-            "lanes": "153,154,155,156",
+            "lanes": "165,166,167,168",
             "breakout_modes": {
                 "1x400G": [
                     "etp18e"
@@ -624,7 +635,7 @@
         },
         "Ethernet196": {
             "index": "18,18,18,18",
-            "lanes": "157,158,159,160",
+            "lanes": "173,174,175,176",
             "breakout_modes": {
                 "1x400G": [
                     "etp18f"
@@ -633,7 +644,7 @@
         },
         "Ethernet200": {
             "index": "18,18,18,18",
-            "lanes": "161,162,163,164",
+            "lanes": "153,154,155,156",
             "breakout_modes": {
                 "1x400G": [
                     "etp18g"
@@ -642,7 +653,7 @@
         },
         "Ethernet204": {
             "index": "18,18,18,18",
-            "lanes": "165,166,167,168",
+            "lanes": "145,146,147,148",
             "breakout_modes": {
                 "1x400G": [
                     "etp18h"
@@ -660,7 +671,7 @@
         },
         "Ethernet212": {
             "index": "18,18,18,18",
-            "lanes": "173,174,175,176",
+            "lanes": "161,162,163,164",
             "breakout_modes": {
                 "1x400G": [
                     "etp18j"
@@ -669,7 +680,7 @@
         },
         "Ethernet216": {
             "index": "18,18,18,18",
-            "lanes": "185,186,187,188",
+            "lanes": "141,142,143,144",
             "breakout_modes": {
                 "1x400G": [
                     "etp18k"
@@ -678,7 +689,7 @@
         },
         "Ethernet220": {
             "index": "18,18,18,18",
-            "lanes": "189,190,191,192",
+            "lanes": "137,138,139,140",
             "breakout_modes": {
                 "1x400G": [
                     "etp18l"
@@ -687,7 +698,7 @@
         },
         "Ethernet224": {
             "index": "19,19,19,19",
-            "lanes": "457,458,459,460",
+            "lanes": "37,38,39,40",
             "breakout_modes": {
                 "1x400G": [
                     "etp19a"
@@ -696,7 +707,7 @@
         },
         "Ethernet228": {
             "index": "19,19,19,19",
-            "lanes": "461,462,463,464",
+            "lanes": "33,34,35,36",
             "breakout_modes": {
                 "1x400G": [
                     "etp19b"
@@ -705,7 +716,7 @@
         },
         "Ethernet232": {
             "index": "19,19,19,19",
-            "lanes": "465,466,467,468",
+            "lanes": "5,6,7,8",
             "breakout_modes": {
                 "1x400G": [
                     "etp19c"
@@ -714,7 +725,7 @@
         },
         "Ethernet236": {
             "index": "19,19,19,19",
-            "lanes": "469,470,471,472",
+            "lanes": "1,2,3,4",
             "breakout_modes": {
                 "1x400G": [
                     "etp19d"
@@ -723,7 +734,7 @@
         },
         "Ethernet240": {
             "index": "19,19,19,19",
-            "lanes": "473,474,475,476",
+            "lanes": "45,46,47,48",
             "breakout_modes": {
                 "1x400G": [
                     "etp19e"
@@ -732,7 +743,7 @@
         },
         "Ethernet244": {
             "index": "19,19,19,19",
-            "lanes": "477,478,479,480",
+            "lanes": "41,42,43,44",
             "breakout_modes": {
                 "1x400G": [
                     "etp19f"
@@ -741,7 +752,7 @@
         },
         "Ethernet248": {
             "index": "19,19,19,19",
-            "lanes": "481,482,483,484",
+            "lanes": "21,22,23,24",
             "breakout_modes": {
                 "1x400G": [
                     "etp19g"
@@ -750,7 +761,7 @@
         },
         "Ethernet252": {
             "index": "19,19,19,19",
-            "lanes": "485,486,487,488",
+            "lanes": "17,18,19,20",
             "breakout_modes": {
                 "1x400G": [
                     "etp19h"
@@ -759,7 +770,7 @@
         },
         "Ethernet256": {
             "index": "19,19,19,19",
-            "lanes": "489,490,491,492",
+            "lanes": "61,62,63,64",
             "breakout_modes": {
                 "1x400G": [
                     "etp19i"
@@ -768,7 +779,7 @@
         },
         "Ethernet260": {
             "index": "19,19,19,19",
-            "lanes": "493,494,495,496",
+            "lanes": "57,58,59,60",
             "breakout_modes": {
                 "1x400G": [
                     "etp19j"
@@ -777,7 +788,7 @@
         },
         "Ethernet264": {
             "index": "19,19,19,19",
-            "lanes": "505,506,507,508",
+            "lanes": "29,30,31,32",
             "breakout_modes": {
                 "1x400G": [
                     "etp19k"
@@ -786,7 +797,7 @@
         },
         "Ethernet268": {
             "index": "19,19,19,19",
-            "lanes": "509,510,511,512",
+            "lanes": "25,26,27,28",
             "breakout_modes": {
                 "1x400G": [
                     "etp19l"
@@ -795,7 +806,7 @@
         },
         "Ethernet272": {
             "index": "20,20,20,20",
-            "lanes": "201,202,203,204",
+            "lanes": "253,254,255,256",
             "breakout_modes": {
                 "1x400G": [
                     "etp20a"
@@ -804,7 +815,7 @@
         },
         "Ethernet276": {
             "index": "20,20,20,20",
-            "lanes": "205,206,207,208",
+            "lanes": "249,250,251,252",
             "breakout_modes": {
                 "1x400G": [
                     "etp20b"
@@ -813,7 +824,7 @@
         },
         "Ethernet280": {
             "index": "20,20,20,20",
-            "lanes": "209,210,211,212",
+            "lanes": "213,214,215,216",
             "breakout_modes": {
                 "1x400G": [
                     "etp20c"
@@ -822,7 +833,7 @@
         },
         "Ethernet284": {
             "index": "20,20,20,20",
-            "lanes": "213,214,215,216",
+            "lanes": "221,222,223,224",
             "breakout_modes": {
                 "1x400G": [
                     "etp20d"
@@ -831,7 +842,7 @@
         },
         "Ethernet288": {
             "index": "20,20,20,20",
-            "lanes": "217,218,219,220",
+            "lanes": "229,230,231,232",
             "breakout_modes": {
                 "1x400G": [
                     "etp20e"
@@ -840,7 +851,7 @@
         },
         "Ethernet292": {
             "index": "20,20,20,20",
-            "lanes": "221,222,223,224",
+            "lanes": "237,238,239,240",
             "breakout_modes": {
                 "1x400G": [
                     "etp20f"
@@ -849,7 +860,7 @@
         },
         "Ethernet296": {
             "index": "20,20,20,20",
-            "lanes": "225,226,227,228",
+            "lanes": "217,218,219,220",
             "breakout_modes": {
                 "1x400G": [
                     "etp20g"
@@ -858,7 +869,7 @@
         },
         "Ethernet300": {
             "index": "20,20,20,20",
-            "lanes": "229,230,231,232",
+            "lanes": "209,210,211,212",
             "breakout_modes": {
                 "1x400G": [
                     "etp20h"
@@ -876,7 +887,7 @@
         },
         "Ethernet308": {
             "index": "20,20,20,20",
-            "lanes": "237,238,239,240",
+            "lanes": "225,226,227,228",
             "breakout_modes": {
                 "1x400G": [
                     "etp20j"
@@ -885,7 +896,7 @@
         },
         "Ethernet312": {
             "index": "20,20,20,20",
-            "lanes": "249,250,251,252",
+            "lanes": "205,206,207,208",
             "breakout_modes": {
                 "1x400G": [
                     "etp20k"
@@ -894,7 +905,7 @@
         },
         "Ethernet316": {
             "index": "20,20,20,20",
-            "lanes": "253,254,255,256",
+            "lanes": "201,202,203,204",
             "breakout_modes": {
                 "1x400G": [
                     "etp20l"
@@ -903,7 +914,7 @@
         },
         "Ethernet320": {
             "index": "21,21,21,21",
-            "lanes": "1,2,3,4",
+            "lanes": "485,486,487,488",
             "breakout_modes": {
                 "1x400G": [
                     "etp21a"
@@ -912,7 +923,7 @@
         },
         "Ethernet324": {
             "index": "21,21,21,21",
-            "lanes": "5,6,7,8",
+            "lanes": "481,482,483,484",
             "breakout_modes": {
                 "1x400G": [
                     "etp21b"
@@ -921,7 +932,7 @@
         },
         "Ethernet328": {
             "index": "21,21,21,21",
-            "lanes": "17,18,19,20",
+            "lanes": "461,462,463,464",
             "breakout_modes": {
                 "1x400G": [
                     "etp21c"
@@ -930,7 +941,7 @@
         },
         "Ethernet332": {
             "index": "21,21,21,21",
-            "lanes": "21,22,23,24",
+            "lanes": "457,458,459,460",
             "breakout_modes": {
                 "1x400G": [
                     "etp21d"
@@ -939,7 +950,7 @@
         },
         "Ethernet336": {
             "index": "21,21,21,21",
-            "lanes": "25,26,27,28",
+            "lanes": "493,494,495,496",
             "breakout_modes": {
                 "1x400G": [
                     "etp21e"
@@ -948,7 +959,7 @@
         },
         "Ethernet340": {
             "index": "21,21,21,21",
-            "lanes": "29,30,31,32",
+            "lanes": "489,490,491,492",
             "breakout_modes": {
                 "1x400G": [
                     "etp21f"
@@ -957,7 +968,7 @@
         },
         "Ethernet344": {
             "index": "21,21,21,21",
-            "lanes": "33,34,35,36",
+            "lanes": "469,470,471,472",
             "breakout_modes": {
                 "1x400G": [
                     "etp21g"
@@ -966,7 +977,7 @@
         },
         "Ethernet348": {
             "index": "21,21,21,21",
-            "lanes": "37,38,39,40",
+            "lanes": "465,466,467,468",
             "breakout_modes": {
                 "1x400G": [
                     "etp21h"
@@ -975,7 +986,7 @@
         },
         "Ethernet352": {
             "index": "21,21,21,21",
-            "lanes": "41,42,43,44",
+            "lanes": "509,510,511,512",
             "breakout_modes": {
                 "1x400G": [
                     "etp21i"
@@ -984,7 +995,7 @@
         },
         "Ethernet356": {
             "index": "21,21,21,21",
-            "lanes": "45,46,47,48",
+            "lanes": "505,506,507,508",
             "breakout_modes": {
                 "1x400G": [
                     "etp21j"
@@ -993,7 +1004,7 @@
         },
         "Ethernet360": {
             "index": "21,21,21,21",
-            "lanes": "57,58,59,60",
+            "lanes": "477,478,479,480",
             "breakout_modes": {
                 "1x400G": [
                     "etp21k"
@@ -1002,7 +1013,7 @@
         },
         "Ethernet364": {
             "index": "21,21,21,21",
-            "lanes": "61,62,63,64",
+            "lanes": "473,474,475,476",
             "breakout_modes": {
                 "1x400G": [
                     "etp21l"
@@ -1011,7 +1022,7 @@
         },
         "Ethernet368": {
             "index": "22,22,22,22",
-            "lanes": "257,258,259,260",
+            "lanes": "317,318,319,320",
             "breakout_modes": {
                 "1x400G": [
                     "etp22a"
@@ -1020,7 +1031,7 @@
         },
         "Ethernet372": {
             "index": "22,22,22,22",
-            "lanes": "261,262,263,264",
+            "lanes": "313,314,315,316",
             "breakout_modes": {
                 "1x400G": [
                     "etp22b"
@@ -1029,7 +1040,7 @@
         },
         "Ethernet376": {
             "index": "22,22,22,22",
-            "lanes": "273,274,275,276",
+            "lanes": "285,286,287,288",
             "breakout_modes": {
                 "1x400G": [
                     "etp22c"
@@ -1047,7 +1058,7 @@
         },
         "Ethernet384": {
             "index": "22,22,22,22",
-            "lanes": "281,282,283,284",
+            "lanes": "293,294,295,296",
             "breakout_modes": {
                 "1x400G": [
                     "etp22e"
@@ -1056,7 +1067,7 @@
         },
         "Ethernet388": {
             "index": "22,22,22,22",
-            "lanes": "285,286,287,288",
+            "lanes": "301,302,303,304",
             "breakout_modes": {
                 "1x400G": [
                     "etp22f"
@@ -1065,7 +1076,7 @@
         },
         "Ethernet392": {
             "index": "22,22,22,22",
-            "lanes": "289,290,291,292",
+            "lanes": "273,274,275,276",
             "breakout_modes": {
                 "1x400G": [
                     "etp22g"
@@ -1074,7 +1085,7 @@
         },
         "Ethernet396": {
             "index": "22,22,22,22",
-            "lanes": "293,294,295,296",
+            "lanes": "281,282,283,284",
             "breakout_modes": {
                 "1x400G": [
                     "etp22h"
@@ -1092,7 +1103,7 @@
         },
         "Ethernet404": {
             "index": "22,22,22,22",
-            "lanes": "301,302,303,304",
+            "lanes": "289,290,291,292",
             "breakout_modes": {
                 "1x400G": [
                     "etp22j"
@@ -1101,7 +1112,7 @@
         },
         "Ethernet408": {
             "index": "22,22,22,22",
-            "lanes": "313,314,315,316",
+            "lanes": "261,262,263,264",
             "breakout_modes": {
                 "1x400G": [
                     "etp22k"
@@ -1110,7 +1121,7 @@
         },
         "Ethernet412": {
             "index": "22,22,22,22",
-            "lanes": "317,318,319,320",
+            "lanes": "257,258,259,260",
             "breakout_modes": {
                 "1x400G": [
                     "etp22l"
@@ -1119,7 +1130,7 @@
         },
         "Ethernet416": {
             "index": "23,23,23,23",
-            "lanes": "393,394,395,396",
+            "lanes": "421,422,423,424",
             "breakout_modes": {
                 "1x400G": [
                     "etp23a"
@@ -1128,7 +1139,7 @@
         },
         "Ethernet420": {
             "index": "23,23,23,23",
-            "lanes": "397,398,399,400",
+            "lanes": "417,418,419,420",
             "breakout_modes": {
                 "1x400G": [
                     "etp23b"
@@ -1137,7 +1148,7 @@
         },
         "Ethernet424": {
             "index": "23,23,23,23",
-            "lanes": "401,402,403,404",
+            "lanes": "445,446,447,448",
             "breakout_modes": {
                 "1x400G": [
                     "etp23c"
@@ -1146,7 +1157,7 @@
         },
         "Ethernet428": {
             "index": "23,23,23,23",
-            "lanes": "405,406,407,408",
+            "lanes": "441,442,443,444",
             "breakout_modes": {
                 "1x400G": [
                     "etp23d"
@@ -1155,7 +1166,7 @@
         },
         "Ethernet432": {
             "index": "23,23,23,23",
-            "lanes": "409,410,411,412",
+            "lanes": "397,398,399,400",
             "breakout_modes": {
                 "1x400G": [
                     "etp23e"
@@ -1164,7 +1175,7 @@
         },
         "Ethernet436": {
             "index": "23,23,23,23",
-            "lanes": "413,414,415,416",
+            "lanes": "393,394,395,396",
             "breakout_modes": {
                 "1x400G": [
                     "etp23f"
@@ -1173,7 +1184,7 @@
         },
         "Ethernet440": {
             "index": "23,23,23,23",
-            "lanes": "417,418,419,420",
+            "lanes": "429,430,431,432",
             "breakout_modes": {
                 "1x400G": [
                     "etp23g"
@@ -1182,7 +1193,7 @@
         },
         "Ethernet444": {
             "index": "23,23,23,23",
-            "lanes": "421,422,423,424",
+            "lanes": "425,426,427,428",
             "breakout_modes": {
                 "1x400G": [
                     "etp23h"
@@ -1191,7 +1202,7 @@
         },
         "Ethernet448": {
             "index": "23,23,23,23",
-            "lanes": "425,426,427,428",
+            "lanes": "405,406,407,408",
             "breakout_modes": {
                 "1x400G": [
                     "etp23i"
@@ -1200,7 +1211,7 @@
         },
         "Ethernet452": {
             "index": "23,23,23,23",
-            "lanes": "429,430,431,432",
+            "lanes": "401,402,403,404",
             "breakout_modes": {
                 "1x400G": [
                     "etp23j"
@@ -1209,7 +1220,7 @@
         },
         "Ethernet456": {
             "index": "23,23,23,23",
-            "lanes": "441,442,443,444",
+            "lanes": "413,414,415,416",
             "breakout_modes": {
                 "1x400G": [
                     "etp23k"
@@ -1218,7 +1229,7 @@
         },
         "Ethernet460": {
             "index": "23,23,23,23",
-            "lanes": "445,446,447,448",
+            "lanes": "409,410,411,412",
             "breakout_modes": {
                 "1x400G": [
                     "etp23l"
@@ -1227,7 +1238,7 @@
         },
         "Ethernet464": {
             "index": "24,24,24,24",
-            "lanes": "329,330,331,332",
+            "lanes": "381,382,383,384",
             "breakout_modes": {
                 "1x400G": [
                     "etp24a"
@@ -1236,7 +1247,7 @@
         },
         "Ethernet468": {
             "index": "24,24,24,24",
-            "lanes": "333,334,335,336",
+            "lanes": "377,378,379,380",
             "breakout_modes": {
                 "1x400G": [
                     "etp24b"
@@ -1245,7 +1256,7 @@
         },
         "Ethernet472": {
             "index": "24,24,24,24",
-            "lanes": "337,338,339,340",
+            "lanes": "341,342,343,344",
             "breakout_modes": {
                 "1x400G": [
                     "etp24c"
@@ -1254,7 +1265,7 @@
         },
         "Ethernet476": {
             "index": "24,24,24,24",
-            "lanes": "341,342,343,344",
+            "lanes": "349,350,351,352",
             "breakout_modes": {
                 "1x400G": [
                     "etp24d"
@@ -1263,7 +1274,7 @@
         },
         "Ethernet480": {
             "index": "24,24,24,24",
-            "lanes": "345,346,347,348",
+            "lanes": "357,358,359,360",
             "breakout_modes": {
                 "1x400G": [
                     "etp24e"
@@ -1272,7 +1283,7 @@
         },
         "Ethernet484": {
             "index": "24,24,24,24",
-            "lanes": "349,350,351,352",
+            "lanes": "365,366,367,368",
             "breakout_modes": {
                 "1x400G": [
                     "etp24f"
@@ -1281,7 +1292,7 @@
         },
         "Ethernet488": {
             "index": "24,24,24,24",
-            "lanes": "353,354,355,356",
+            "lanes": "345,346,347,348",
             "breakout_modes": {
                 "1x400G": [
                     "etp24g"
@@ -1290,7 +1301,7 @@
         },
         "Ethernet492": {
             "index": "24,24,24,24",
-            "lanes": "357,358,359,360",
+            "lanes": "337,338,339,340",
             "breakout_modes": {
                 "1x400G": [
                     "etp24h"
@@ -1308,7 +1319,7 @@
         },
         "Ethernet500": {
             "index": "24,24,24,24",
-            "lanes": "365,366,367,368",
+            "lanes": "353,354,355,356",
             "breakout_modes": {
                 "1x400G": [
                     "etp24j"
@@ -1317,7 +1328,7 @@
         },
         "Ethernet504": {
             "index": "24,24,24,24",
-            "lanes": "377,378,379,380",
+            "lanes": "333,334,335,336",
             "breakout_modes": {
                 "1x400G": [
                     "etp24k"
@@ -1326,7 +1337,7 @@
         },
         "Ethernet508": {
             "index": "24,24,24,24",
-            "lanes": "381,382,383,384",
+            "lanes": "329,330,331,332",
             "breakout_modes": {
                 "1x400G": [
                     "etp24l"
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/platform_components.json b/device/arista/x86_64-arista_7060x6_16pe_384c/platform_components.json
index e5e49951284..bbfbbc06c0b 100644
--- a/device/arista/x86_64-arista_7060x6_16pe_384c/platform_components.json
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c/platform_components.json
@@ -3,9 +3,9 @@
       "DCS-7060X6-16PE-384C": {
          "component": {
             "Aboot()": {},
-            "Scd(addr=0000:04:00.0)": {},
+            "Scd(addr=0000:03:00.0)": {},
             "Scd(addr=0000:06:00.0)": {},
-            "Scd(addr=0000:08:00.0)": {},
+            "Scd(addr=0000:05:00.0)": {},
             "RedstartSysCpld(addr=13-0023)": {}
          }
       }
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffer_ports.j2
new file mode 120000
index 00000000000..719723c038d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffer_ports.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/buffer_ports.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffers.json.j2
new file mode 120000
index 00000000000..bec4deb9067
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffers.json.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/buffers.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffers_defaults_t0.j2
new file mode 120000
index 00000000000..a65fa4df4b7
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffers_defaults_t1.j2
new file mode 120000
index 00000000000..4638053c836
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/hwsku.json b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/hwsku.json
new file mode 120000
index 00000000000..535a4a0396e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/hwsku.json
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/hwsku.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/pg_profile_lookup.ini
new file mode 120000
index 00000000000..57ede6b9103
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/pg_profile_lookup.ini
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/port_config.ini b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/port_config.ini
new file mode 120000
index 00000000000..11566a0eba0
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/port_config.ini
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/port_config.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/qos.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/qos.json.j2
new file mode 120000
index 00000000000..c8be90d2d18
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/qos.json.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/qos.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/sai.profile
new file mode 100644
index 00000000000..8273d235aee
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/sai.profile
@@ -0,0 +1,3 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-16pe-384c.config.bcm
+SAI_NUM_ECMP_MEMBERS=128
+SAI_NHG_HIERARCHICAL_NEXTHOP=false
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm
new file mode 100644
index 00000000000..65a172b5709
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm
@@ -0,0 +1,2581 @@
+#
+# $Copyright: Broadcom Ltd.$
+#
+# BCM78907 128x400g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 0
+            l3_alpm_large_vrf_mode: 1
+            l3_ecmp_member_secondary_mem_size: 0
+            sai_mmu_custom_config: 1
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752031
+                TX_LANE_MAP: 0x46570213
+                RX_POLARITY_FLIP: 0x8c
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13025746
+                TX_LANE_MAP: 0x64752031
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x40516273
+                TX_LANE_MAP: 0x4152637
+                RX_POLARITY_FLIP: 0x69
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x4152637
+                TX_LANE_MAP: 0x40516273
+                RX_POLARITY_FLIP: 0x99
+                TX_POLARITY_FLIP: 0x69
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x40516273
+                TX_LANE_MAP: 0x35042617
+                RX_POLARITY_FLIP: 0xe3
+                TX_POLARITY_FLIP: 0x2d
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x23706145
+                TX_LANE_MAP: 0x40736512
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x2c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x32104567
+                TX_LANE_MAP: 0x64571203
+                RX_POLARITY_FLIP: 0x39
+                TX_POLARITY_FLIP: 0xc0
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46572031
+                TX_LANE_MAP: 0x1236547
+                RX_POLARITY_FLIP: 0x3
+                TX_POLARITY_FLIP: 0x93
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46572031
+                TX_LANE_MAP: 0x1324567
+                RX_POLARITY_FLIP: 0x3
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46572031
+                TX_LANE_MAP: 0x1236547
+                RX_POLARITY_FLIP: 0x3
+                TX_POLARITY_FLIP: 0x93
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46572031
+                TX_LANE_MAP: 0x1324567
+                RX_POLARITY_FLIP: 0x3
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64152730
+                TX_LANE_MAP: 0x10276345
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x96
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01235746
+                TX_LANE_MAP: 0x01324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46572031
+                TX_LANE_MAP: 0x10326745
+                RX_POLARITY_FLIP: 0x3
+                TX_POLARITY_FLIP: 0x96
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31204567
+                TX_LANE_MAP: 0x76543021
+                RX_POLARITY_FLIP: 0xde
+                TX_POLARITY_FLIP: 0x37
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31206547
+                TX_LANE_MAP: 0x76543120
+                RX_POLARITY_FLIP: 0xd7
+                TX_POLARITY_FLIP: 0x31
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20316547
+                TX_LANE_MAP: 0x54763120
+                RX_POLARITY_FLIP: 0x56
+                TX_POLARITY_FLIP: 0xd3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x21306745
+                TX_LANE_MAP: 0x74562130
+                RX_POLARITY_FLIP: 0x74
+                TX_POLARITY_FLIP: 0x62
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20316547
+                TX_LANE_MAP: 0x54763120
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xf1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20316745
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xf1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31204567
+                TX_LANE_MAP: 0x76543021
+                RX_POLARITY_FLIP: 0xde
+                TX_POLARITY_FLIP: 0x37
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31206547
+                TX_LANE_MAP: 0x76543120
+                RX_POLARITY_FLIP: 0xd7
+                TX_POLARITY_FLIP: 0x30
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57640312
+                TX_LANE_MAP: 0x47560213
+                RX_POLARITY_FLIP: 0xca
+                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x47650123
+                TX_LANE_MAP: 0x74561032
+                RX_POLARITY_FLIP: 0x74
+                TX_POLARITY_FLIP: 0xfc
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45670321
+                TX_LANE_MAP: 0x54763012
+                RX_POLARITY_FLIP: 0x9a
+                TX_POLARITY_FLIP: 0x5c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31207564
+                TX_LANE_MAP: 0x46570213
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45670123
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x9a
+                TX_POLARITY_FLIP: 0x56
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1234567
+                TX_LANE_MAP: 0x10325476
+                RX_POLARITY_FLIP: 0xa9
+                TX_POLARITY_FLIP: 0x65
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57461302
+                TX_LANE_MAP: 0x20316475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x23016547
+                TX_LANE_MAP: 0x32105674
+                RX_POLARITY_FLIP: 0x8b
+                TX_POLARITY_FLIP: 0x81
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1236547
+                TX_LANE_MAP: 0x10325674
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0xff
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x12036457
+                TX_LANE_MAP: 0x13025647
+                RX_POLARITY_FLIP: 0xe8
+                TX_POLARITY_FLIP: 0x2d
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45673021
+                TX_LANE_MAP: 0x30215674
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x39
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01237564
+                TX_LANE_MAP: 0x01326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45673120
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x73
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01237564
+                TX_LANE_MAP: 0x01326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x67452031
+                TX_LANE_MAP: 0x21305476
+                RX_POLARITY_FLIP: 0x74
+                TX_POLARITY_FLIP: 0x1f
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x67453021
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0x19
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45673021
+                TX_LANE_MAP: 0x30215674
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x5b
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x47653120
+                TX_LANE_MAP: 0x20317654
+                RX_POLARITY_FLIP: 0xde
+                TX_POLARITY_FLIP: 0x40
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45673021
+                TX_LANE_MAP: 0x30215674
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x79
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01237564
+                TX_LANE_MAP: 0x01326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x45673120
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x73
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x65471203
+                RX_POLARITY_FLIP: 0x39
+                TX_POLARITY_FLIP: 0xc0
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x47650312
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x30
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x65471203
+                RX_POLARITY_FLIP: 0x39
+                TX_POLARITY_FLIP: 0xc0
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x47650312
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x30
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13540276
+                TX_LANE_MAP: 0x47620513
+                RX_POLARITY_FLIP: 0xe1
+                TX_POLARITY_FLIP: 0x24
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01235746
+                TX_LANE_MAP: 0x01324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x65471203
+                RX_POLARITY_FLIP: 0x39
+                TX_POLARITY_FLIP: 0xc0
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01235746
+                TX_LANE_MAP: 0x01324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752031
+                TX_LANE_MAP: 0x10234765
+                RX_POLARITY_FLIP: 0xf3
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752031
+                TX_LANE_MAP: 0x10236547
+                RX_POLARITY_FLIP: 0xf3
+                TX_POLARITY_FLIP: 0xd3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2134657
+                TX_LANE_MAP: 0x30216574
+                RX_POLARITY_FLIP: 0xc1
+                TX_POLARITY_FLIP: 0xcf
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20136475
+                TX_LANE_MAP: 0x20316475
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x33
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x62734051
+                TX_LANE_MAP: 0x26370415
+                RX_POLARITY_FLIP: 0x69
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75643120
+                TX_LANE_MAP: 0x02134657
+                RX_POLARITY_FLIP: 0xcc
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20316475
+                TX_LANE_MAP: 0x2134657
+                RX_POLARITY_FLIP: 0x37
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 65
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x00003210
+                TX_LANE_MAP: 0x00003210
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x00
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 19
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 53
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 54
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 71
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 85
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 86
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 87
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 104
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 105
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 119
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 120
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 138
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 139
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 153
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 172
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 173
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 206
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 207
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 239
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 240
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 241
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 272
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 273
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 291
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 306
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 307
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 326
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 340
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 357
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 358
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 359
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 360
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 374
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 375
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 376
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 377
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 391
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 392
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 393
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 394
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 408
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 409
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 410
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 411
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 425
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 426
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 427
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 428
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 442
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 443
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 444
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 445
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 459
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 460
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 461
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 462
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 476
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 477
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 478
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 479
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 493
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 494
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 495
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 496
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 510
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 511
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 512
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 513
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 527
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 528
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 529
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 530
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 118
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 514
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 4],
+                          [17, 20],
+                          [34, 37],
+                          [51, 54],
+                          [68, 71],
+                          [85, 88],
+                          [102, 105],
+                          [119, 122],
+                          [136, 139],
+                          [153, 156],
+                          [170, 173],
+                          [187, 190],
+                          [204, 207],
+                          [221, 224],
+                          [238, 241],
+                          [255, 258],
+                          [272, 275],
+                          [289, 292],
+                          [306, 309],
+                          [323, 326],
+                          [340, 343],
+                          [357, 360],
+                          [374, 377],
+                          [391, 394],
+                          [408, 411],
+                          [425, 428],
+                          [442, 445],
+                          [459, 462],
+                          [476, 479],
+                          [493, 496],
+                          [510, 513],
+                          [527, 530]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [118, 254]
+            :
+                ENABLE: 0
+                SPEED: 10000
+                NUM_LANES: 1
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            #enable port queue drop stats
+            sai_stats_support_mask: 0
+            #disable vxlan tunnel stats
+            sai_stats_disable_mask: 0x200
+            #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration. Enable PPIU Mode
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        TM_SCHEDULER_CONFIG:
+            DYNAMIC_VOQ: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+### Baseline
+# Skipping buffer reservation. This means that don't use SDK default setings.
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            MIRROR_ON_DROP_RESERVATION: 0
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+...
+# Initialize the various thresholds to zero
+---
+# Ingress service pool level initialization
+device:
+    0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+
+        # Ingress headroom pool
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+
+        # PFC generation: Priority group(s)
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        # Egress multicast CQE pool
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+...
+#Per Port Registers
+#Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                # Pause enable bit,
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+               PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+...
+# Output Port Thresholds -2
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+...
+### Begin MMU ingress threshold settings
+
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269303
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 39728
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+...
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 325520
+                RESUME_LIMIT_CELLS: 325520
+
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1755
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1548
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+...
+### Egress Service Pools
+---
+device:
+    0:
+# Setting Q group limit to 0
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269303
+                SHARED_RESUME_LIMIT_CELLS: 33652
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 25248
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25238
+                RED_SHARED_LIMIT_CELLS: 21040
+                RED_SHARED_RESUME_LIMIT_CELLS: 21030
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19818
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1858
+                RED_SHARED_LIMIT_CELLS: 1549
+                SHARED_RESUME_LIMIT_CELLS: 2467
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1848
+                RED_SHARED_RESUME_LIMIT_CELLS: 1539
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                RED_SHARED_LIMIT_CELLS: 48
+                SHARED_RESUME_LIMIT_CELLS: 73
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+...
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [0,1,2,5,6]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [0,3]
+                SHARED_LIMIT_DYNAMIC: ALPHA_2
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+
+#Egress Port Thresholds.
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 21039
+                YELLOW_SHARED_LIMIT_CELLS: 25247
+                SHARED_LIMIT_CELLS: 269303
+                RED_SHARED_RESUME_LIMIT_CELLS: 21037
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25245
+                SHARED_RESUME_LIMIT_CELLS: 33661
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1548
+                YELLOW_SHARED_LIMIT_CELLS: 1857
+                SHARED_LIMIT_CELLS: 19818
+                RED_SHARED_RESUME_LIMIT_CELLS: 1546
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1855
+                SHARED_RESUME_LIMIT_CELLS: 2475
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+...
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 2979
+                SHARED_RESUME_LIMIT_PKTS: 2965
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2234
+                RED_SHARED_LIMIT_PKTS: 1861
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2220
+                RED_SHARED_RESUME_LIMIT_PKTS: 1847
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+...
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffer_ports.j2
new file mode 120000
index 00000000000..719723c038d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffer_ports.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/buffer_ports.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffers.json.j2
new file mode 120000
index 00000000000..bec4deb9067
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffers.json.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/buffers.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffers_defaults_t0.j2
new file mode 120000
index 00000000000..a65fa4df4b7
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffers_defaults_t1.j2
new file mode 120000
index 00000000000..4638053c836
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/hwsku.json b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/hwsku.json
new file mode 120000
index 00000000000..535a4a0396e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/hwsku.json
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/hwsku.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/pg_profile_lookup.ini
new file mode 120000
index 00000000000..57ede6b9103
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/pg_profile_lookup.ini
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/port_config.ini b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/port_config.ini
new file mode 120000
index 00000000000..11566a0eba0
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/port_config.ini
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/port_config.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/qos.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/qos.json.j2
new file mode 120000
index 00000000000..c8be90d2d18
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/qos.json.j2
@@ -0,0 +1 @@
+../Arista-7060X6-16PE-384C-B-O128S2/qos.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/sai.profile
new file mode 100644
index 00000000000..8273d235aee
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/sai.profile
@@ -0,0 +1,3 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-16pe-384c.config.bcm
+SAI_NUM_ECMP_MEMBERS=128
+SAI_NHG_HIERARCHICAL_NEXTHOP=false
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm
new file mode 100644
index 00000000000..e067e9bc2b8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm
@@ -0,0 +1,2581 @@
+#
+# $Copyright: Broadcom Ltd.$
+#
+# BCM78907 128x400g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 0
+            l3_alpm_large_vrf_mode: 1
+            l3_ecmp_member_secondary_mem_size: 0
+            sai_mmu_custom_config: 1
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x76543210
+                TX_LANE_MAP: 0x76543210
+                RX_POLARITY_FLIP: 0x89
+                TX_POLARITY_FLIP: 0x55
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13025746
+                TX_LANE_MAP: 0x64752031
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54107632
+                TX_LANE_MAP: 0x54107632
+                RX_POLARITY_FLIP: 0x5a
+                TX_POLARITY_FLIP: 0x55
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x10543276
+                TX_LANE_MAP: 0x10543276
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x5a
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54107632
+                TX_LANE_MAP: 0x45037612
+                RX_POLARITY_FLIP: 0x16
+                TX_POLARITY_FLIP: 0x1e
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x72034651
+                TX_LANE_MAP: 0x30742516
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0x16
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13026475
+                TX_LANE_MAP: 0x74563201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x31207546
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xa9
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x21307564
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x31207546
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xa9
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x21307564
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x16543207
+                TX_LANE_MAP: 0x70215346
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0xa5
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x1324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x20315746
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0xa5
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x23016475
+                TX_LANE_MAP: 0x46571023
+                RX_POLARITY_FLIP: 0xb1
+                TX_POLARITY_FLIP: 0x9d
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x23014675
+                TX_LANE_MAP: 0x46570123
+                RX_POLARITY_FLIP: 0xb7
+                TX_POLARITY_FLIP: 0x9b
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x32104675
+                TX_LANE_MAP: 0x64750123
+                RX_POLARITY_FLIP: 0xf5
+                TX_POLARITY_FLIP: 0xe9
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x32014657
+                TX_LANE_MAP: 0x64570132
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0x51
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x32104675
+                TX_LANE_MAP: 0x64750123
+                RX_POLARITY_FLIP: 0xd7
+                TX_POLARITY_FLIP: 0xcb
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x32104657
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0xd7
+                TX_POLARITY_FLIP: 0xcb
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x23016475
+                TX_LANE_MAP: 0x46571023
+                RX_POLARITY_FLIP: 0xb1
+                TX_POLARITY_FLIP: 0x9d
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x23014675
+                TX_LANE_MAP: 0x46570123
+                RX_POLARITY_FLIP: 0xb7
+                TX_POLARITY_FLIP: 0x93
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x65471023
+                TX_LANE_MAP: 0x67543210
+                RX_POLARITY_FLIP: 0x90
+                TX_POLARITY_FLIP: 0x00
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64572031
+                TX_LANE_MAP: 0x64572031
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0xc6
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752013
+                TX_LANE_MAP: 0x64752013
+                RX_POLARITY_FLIP: 0xa0
+                TX_POLARITY_FLIP: 0xf6
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31207564
+                TX_LANE_MAP: 0x46570213
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752031
+                TX_LANE_MAP: 0x64752031
+                RX_POLARITY_FLIP: 0xa0
+                TX_POLARITY_FLIP: 0xf5
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20316475
+                TX_LANE_MAP: 0x20316475
+                RX_POLARITY_FLIP: 0xa
+                TX_POLARITY_FLIP: 0x5f
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57461302
+                TX_LANE_MAP: 0x20316475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2134675
+                TX_LANE_MAP: 0x2134675
+                RX_POLARITY_FLIP: 0x82
+                TX_POLARITY_FLIP: 0x2b
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20314675
+                TX_LANE_MAP: 0x20314675
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0xcc
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1325674
+                TX_LANE_MAP: 0x23017645
+                RX_POLARITY_FLIP: 0x18
+                TX_POLARITY_FLIP: 0x1e
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752310
+                TX_LANE_MAP: 0x10234675
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0x9a
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1237564
+                TX_LANE_MAP: 0x1326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752301
+                TX_LANE_MAP: 0x10234657
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0xd9
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1237564
+                TX_LANE_MAP: 0x1326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46573210
+                TX_LANE_MAP: 0x1326475
+                RX_POLARITY_FLIP: 0x7d
+                TX_POLARITY_FLIP: 0xbc
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46572310
+                TX_LANE_MAP: 0x1324675
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0xba
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752310
+                TX_LANE_MAP: 0x10234675
+                RX_POLARITY_FLIP: 0x39
+                TX_POLARITY_FLIP: 0xf8
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64572301
+                TX_LANE_MAP: 0x10324657
+                RX_POLARITY_FLIP: 0xb1
+                TX_POLARITY_FLIP: 0x73
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752310
+                TX_LANE_MAP: 0x10234675
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0xda
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1237564
+                TX_LANE_MAP: 0x1326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64752301
+                TX_LANE_MAP: 0x10234657
+                RX_POLARITY_FLIP: 0x1b
+                TX_POLARITY_FLIP: 0xd9
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x10327564
+                TX_LANE_MAP: 0x75463201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x57642310
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x93
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x10327564
+                TX_LANE_MAP: 0x75463201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x57642310
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x93
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x51437062
+                TX_LANE_MAP: 0x27643510
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x17
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x1324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x10327564
+                TX_LANE_MAP: 0x75463201
+                RX_POLARITY_FLIP: 0x6a
+                TX_POLARITY_FLIP: 0x63
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x1235746
+                TX_LANE_MAP: 0x1324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x76543210
+                TX_LANE_MAP: 0x30215764
+                RX_POLARITY_FLIP: 0x36
+                TX_POLARITY_FLIP: 0xa6
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x76543210
+                TX_LANE_MAP: 0x30217546
+                RX_POLARITY_FLIP: 0x36
+                TX_POLARITY_FLIP: 0xe9
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x10325476
+                TX_LANE_MAP: 0x10234576
+                RX_POLARITY_FLIP: 0x9e
+                TX_POLARITY_FLIP: 0x6c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x12307654
+                TX_LANE_MAP: 0x10325476
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x76325410
+                TX_LANE_MAP: 0x76325410
+                RX_POLARITY_FLIP: 0x5a
+                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75643120
+                TX_LANE_MAP: 0x2134657
+                RX_POLARITY_FLIP: 0xcc
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 65
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x00003210
+                TX_LANE_MAP: 0x00003210
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x00
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 19
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 53
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 54
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 71
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 85
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 86
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 87
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 104
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 105
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 119
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 120
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 138
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 139
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 153
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 172
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 173
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 206
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 207
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 239
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 240
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 241
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 272
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 273
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 291
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 306
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 307
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 326
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 340
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 357
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 358
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 359
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 360
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 374
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 375
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 376
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 377
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 391
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 392
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 393
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 394
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 408
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 409
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 410
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 411
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 425
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 426
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 427
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 428
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 442
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 443
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 444
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 445
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 459
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 460
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 461
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 462
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 476
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 477
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 478
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 479
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 493
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 494
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 495
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 496
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 510
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 511
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 512
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 513
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 527
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 528
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 529
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 530
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 118
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 514
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 4],
+                          [17, 20],
+                          [34, 37],
+                          [51, 54],
+                          [68, 71],
+                          [85, 88],
+                          [102, 105],
+                          [119, 122],
+                          [136, 139],
+                          [153, 156],
+                          [170, 173],
+                          [187, 190],
+                          [204, 207],
+                          [221, 224],
+                          [238, 241],
+                          [255, 258],
+                          [272, 275],
+                          [289, 292],
+                          [306, 309],
+                          [323, 326],
+                          [340, 343],
+                          [357, 360],
+                          [374, 377],
+                          [391, 394],
+                          [408, 411],
+                          [425, 428],
+                          [442, 445],
+                          [459, 462],
+                          [476, 479],
+                          [493, 496],
+                          [510, 513],
+                          [527, 530]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [118, 254]
+            :
+                ENABLE: 0
+                SPEED: 10000
+                NUM_LANES: 1
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            #enable port queue drop stats
+            sai_stats_support_mask: 0
+            #disable vxlan tunnel stats
+            sai_stats_disable_mask: 0x200
+            #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration. Enable PPIU Mode
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        TM_SCHEDULER_CONFIG:
+            DYNAMIC_VOQ: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+### Baseline
+# Skipping buffer reservation. This means that don't use SDK default setings.
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            MIRROR_ON_DROP_RESERVATION: 0
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+...
+# Initialize the various thresholds to zero
+---
+# Ingress service pool level initialization
+device:
+    0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+
+        # Ingress headroom pool
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+
+        # PFC generation: Priority group(s)
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        # Egress multicast CQE pool
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+...
+#Per Port Registers
+#Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                # Pause enable bit,
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+               PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+...
+# Output Port Thresholds -2
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+...
+### Begin MMU ingress threshold settings
+
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269303
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 39728
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+...
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 325520
+                RESUME_LIMIT_CELLS: 325520
+
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1755
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1548
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+...
+### Egress Service Pools
+---
+device:
+    0:
+# Setting Q group limit to 0
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269303
+                SHARED_RESUME_LIMIT_CELLS: 33652
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 25248
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25238
+                RED_SHARED_LIMIT_CELLS: 21040
+                RED_SHARED_RESUME_LIMIT_CELLS: 21030
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19818
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1858
+                RED_SHARED_LIMIT_CELLS: 1549
+                SHARED_RESUME_LIMIT_CELLS: 2467
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1848
+                RED_SHARED_RESUME_LIMIT_CELLS: 1539
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                RED_SHARED_LIMIT_CELLS: 48
+                SHARED_RESUME_LIMIT_CELLS: 73
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+...
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [0,1,2,5,6]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [0,3]
+                SHARED_LIMIT_DYNAMIC: ALPHA_2
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+
+#Egress Port Thresholds.
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 21039
+                YELLOW_SHARED_LIMIT_CELLS: 25247
+                SHARED_LIMIT_CELLS: 269303
+                RED_SHARED_RESUME_LIMIT_CELLS: 21037
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25245
+                SHARED_RESUME_LIMIT_CELLS: 33661
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1548
+                YELLOW_SHARED_LIMIT_CELLS: 1857
+                SHARED_LIMIT_CELLS: 19818
+                RED_SHARED_RESUME_LIMIT_CELLS: 1546
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1855
+                SHARED_RESUME_LIMIT_CELLS: 2475
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+...
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 2979
+                SHARED_RESUME_LIMIT_PKTS: 2965
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2234
+                RED_SHARED_LIMIT_PKTS: 1861
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2220
+                RED_SHARED_RESUME_LIMIT_PKTS: 1847
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+...
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffer_ports.j2
new file mode 100644
index 00000000000..725347049cf
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers.json.j2
new file mode 100644
index 00000000000..1083a6210fc
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't0' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t0.j2
new file mode 100644
index 00000000000..cbece494f9c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "164075364",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "20181824"
+        },
+        "egress_lossless_pool": {
+            "size": "164075364",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..cbece494f9c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "164075364",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "20181824"
+        },
+        "egress_lossless_pool": {
+            "size": "164075364",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/hwsku.json b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/hwsku.json
new file mode 100644
index 00000000000..9ead33d4a31
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/hwsku.json
@@ -0,0 +1,744 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet4": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet8": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet12": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet16": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet20": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet24": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet28": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet32": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet36": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet40": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet44": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet48": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet52": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet56": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet60": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet64": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet68": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet72": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet76": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet80": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet84": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet88": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet92": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet96": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet100": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet104": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet108": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet112": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet116": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet120": {
+            "fec": "rs",
+            "subport": "1",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet124": {
+            "fec": "rs",
+            "subport": "2",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet128": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet132": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet136": {
+            "fec": "rs",
+            "subport": "3",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet140": {
+            "fec": "rs",
+            "subport": "4",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet144": {
+            "fec": "rs",
+            "subport": "5",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet148": {
+            "fec": "rs",
+            "subport": "6",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet152": {
+            "fec": "rs",
+            "subport": "7",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet156": {
+            "fec": "rs",
+            "subport": "8",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet160": {
+            "fec": "rs",
+            "subport": "9",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet164": {
+            "fec": "rs",
+            "subport": "10",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet168": {
+            "fec": "rs",
+            "subport": "11",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet172": {
+            "fec": "rs",
+            "subport": "12",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet176": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet180": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet184": {
+            "fec": "rs",
+            "subport": "3",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet188": {
+            "fec": "rs",
+            "subport": "4",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet192": {
+            "fec": "rs",
+            "subport": "5",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet196": {
+            "fec": "rs",
+            "subport": "6",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet200": {
+            "fec": "rs",
+            "subport": "7",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet204": {
+            "fec": "rs",
+            "subport": "8",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet208": {
+            "fec": "rs",
+            "subport": "9",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet212": {
+            "fec": "rs",
+            "subport": "10",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet216": {
+            "fec": "rs",
+            "subport": "11",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet220": {
+            "fec": "rs",
+            "subport": "12",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet224": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet228": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet232": {
+            "fec": "rs",
+            "subport": "3",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet236": {
+            "fec": "rs",
+            "subport": "4",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet240": {
+            "fec": "rs",
+            "subport": "5",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet244": {
+            "fec": "rs",
+            "subport": "6",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet248": {
+            "fec": "rs",
+            "subport": "7",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet252": {
+            "fec": "rs",
+            "subport": "8",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet256": {
+            "fec": "rs",
+            "subport": "9",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet260": {
+            "fec": "rs",
+            "subport": "10",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet264": {
+            "fec": "rs",
+            "subport": "11",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet268": {
+            "fec": "rs",
+            "subport": "12",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet272": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet276": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet280": {
+            "fec": "rs",
+            "subport": "3",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet284": {
+            "fec": "rs",
+            "subport": "4",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet288": {
+            "fec": "rs",
+            "subport": "5",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet292": {
+            "fec": "rs",
+            "subport": "6",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet296": {
+            "fec": "rs",
+            "subport": "7",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet300": {
+            "fec": "rs",
+            "subport": "8",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet304": {
+            "fec": "rs",
+            "subport": "9",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet308": {
+            "fec": "rs",
+            "subport": "10",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet312": {
+            "fec": "rs",
+            "subport": "11",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet316": {
+            "fec": "rs",
+            "subport": "12",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet320": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet324": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet328": {
+            "fec": "rs",
+            "subport": "3",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet332": {
+            "fec": "rs",
+            "subport": "4",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet336": {
+            "fec": "rs",
+            "subport": "5",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet340": {
+            "fec": "rs",
+            "subport": "6",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet344": {
+            "fec": "rs",
+            "subport": "7",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet348": {
+            "fec": "rs",
+            "subport": "8",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet352": {
+            "fec": "rs",
+            "subport": "9",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet356": {
+            "fec": "rs",
+            "subport": "10",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet360": {
+            "fec": "rs",
+            "subport": "11",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet364": {
+            "fec": "rs",
+            "subport": "12",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet368": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet372": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet376": {
+            "fec": "rs",
+            "subport": "3",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet380": {
+            "fec": "rs",
+            "subport": "4",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet384": {
+            "fec": "rs",
+            "subport": "5",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet388": {
+            "fec": "rs",
+            "subport": "6",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet392": {
+            "fec": "rs",
+            "subport": "7",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet396": {
+            "fec": "rs",
+            "subport": "8",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet400": {
+            "fec": "rs",
+            "subport": "9",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet404": {
+            "fec": "rs",
+            "subport": "10",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet408": {
+            "fec": "rs",
+            "subport": "11",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet412": {
+            "fec": "rs",
+            "subport": "12",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet416": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet420": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet424": {
+            "fec": "rs",
+            "subport": "3",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet428": {
+            "fec": "rs",
+            "subport": "4",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet432": {
+            "fec": "rs",
+            "subport": "5",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet436": {
+            "fec": "rs",
+            "subport": "6",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet440": {
+            "fec": "rs",
+            "subport": "7",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet444": {
+            "fec": "rs",
+            "subport": "8",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet448": {
+            "fec": "rs",
+            "subport": "9",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet452": {
+            "fec": "rs",
+            "subport": "10",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet456": {
+            "fec": "rs",
+            "subport": "11",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet460": {
+            "fec": "rs",
+            "subport": "12",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet464": {
+            "fec": "rs",
+            "subport": "1",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet468": {
+            "fec": "rs",
+            "subport": "2",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet472": {
+            "fec": "rs",
+            "subport": "3",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet476": {
+            "fec": "rs",
+            "subport": "4",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet480": {
+            "fec": "rs",
+            "subport": "5",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet484": {
+            "fec": "rs",
+            "subport": "6",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet488": {
+            "fec": "rs",
+            "subport": "7",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet492": {
+            "fec": "rs",
+            "subport": "8",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet496": {
+            "fec": "rs",
+            "subport": "9",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet500": {
+            "fec": "rs",
+            "subport": "10",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet504": {
+            "fec": "rs",
+            "subport": "11",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet508": {
+            "fec": "rs",
+            "subport": "12",
+            "autoneg": "on",
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet512": {
+            "fec": "none",
+            "default_brkout_mode": "2x10G(2)"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/pg_profile_lookup.ini
new file mode 100644
index 00000000000..12028bb0226
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/pg_profile_lookup.ini
@@ -0,0 +1,4 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
+400000  5m    18796   0    393192  0         3556
+400000  40m   18796   0    445770  0         3556
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/port_config.ini b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/port_config.ini
new file mode 100644
index 00000000000..123aef1ab4b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/port_config.ini
@@ -0,0 +1,131 @@
+# name       lanes            alias   index  speed   fec
+Ethernet0    369,370,371,372  etp1a   1      400000  rs
+Ethernet4    373,374,375,376  etp1b   1      400000  rs
+Ethernet8    385,386,387,388  etp2a   2      400000  rs
+Ethernet12   389,390,391,392  etp2b   2      400000  rs
+Ethernet16   433,434,435,436  etp3a   3      400000  rs
+Ethernet20   437,438,439,440  etp3b   3      400000  rs
+Ethernet24   449,450,451,452  etp4a   4      400000  rs
+Ethernet28   453,454,455,456  etp4b   4      400000  rs
+Ethernet32   305,306,307,308  etp5a   5      400000  rs
+Ethernet36   309,310,311,312  etp5b   5      400000  rs
+Ethernet40   321,322,323,324  etp6a   6      400000  rs
+Ethernet44   325,326,327,328  etp6b   6      400000  rs
+Ethernet48   241,242,243,244  etp7a   7      400000  rs
+Ethernet52   245,246,247,248  etp7b   7      400000  rs
+Ethernet56   265,266,267,268  etp8a   8      400000  rs
+Ethernet60   269,270,271,272  etp8b   8      400000  rs
+Ethernet64   497,498,499,500  etp9a   9      400000  rs
+Ethernet68   501,502,503,504  etp9b   9      400000  rs
+Ethernet72   9,10,11,12       etp10a  10     400000  rs
+Ethernet76   13,14,15,16      etp10b  10     400000  rs
+Ethernet80   193,194,195,196  etp11a  11     400000  rs
+Ethernet84   197,198,199,200  etp11b  11     400000  rs
+Ethernet88   177,178,179,180  etp12a  12     400000  rs
+Ethernet92   181,182,183,184  etp12b  12     400000  rs
+Ethernet96   65,66,67,68      etp13a  13     400000  rs
+Ethernet100  69,70,71,72      etp13b  13     400000  rs
+Ethernet104  49,50,51,52      etp14a  14     400000  rs
+Ethernet108  53,54,55,56      etp14b  14     400000  rs
+Ethernet112  129,130,131,132  etp15a  15     400000  rs
+Ethernet116  133,134,135,136  etp15b  15     400000  rs
+Ethernet120  113,114,115,116  etp16a  16     400000  rs
+Ethernet124  117,118,119,120  etp16b  16     400000  rs
+Ethernet128  101,102,103,104  etp17a  17     400000  rs
+Ethernet132  97,98,99,100     etp17b  17     400000  rs
+Ethernet136  125,126,127,128  etp17c  17     400000  rs
+Ethernet140  121,122,123,124  etp17d  17     400000  rs
+Ethernet144  77,78,79,80      etp17e  17     400000  rs
+Ethernet148  73,74,75,76      etp17f  17     400000  rs
+Ethernet152  109,110,111,112  etp17g  17     400000  rs
+Ethernet156  105,106,107,108  etp17h  17     400000  rs
+Ethernet160  85,86,87,88      etp17i  17     400000  rs
+Ethernet164  81,82,83,84      etp17j  17     400000  rs
+Ethernet168  93,94,95,96      etp17k  17     400000  rs
+Ethernet172  89,90,91,92      etp17l  17     400000  rs
+Ethernet176  189,190,191,192  etp18a  18     400000  rs
+Ethernet180  185,186,187,188  etp18b  18     400000  rs
+Ethernet184  149,150,151,152  etp18c  18     400000  rs
+Ethernet188  157,158,159,160  etp18d  18     400000  rs
+Ethernet192  165,166,167,168  etp18e  18     400000  rs
+Ethernet196  173,174,175,176  etp18f  18     400000  rs
+Ethernet200  153,154,155,156  etp18g  18     400000  rs
+Ethernet204  145,146,147,148  etp18h  18     400000  rs
+Ethernet208  169,170,171,172  etp18i  18     400000  rs
+Ethernet212  161,162,163,164  etp18j  18     400000  rs
+Ethernet216  141,142,143,144  etp18k  18     400000  rs
+Ethernet220  137,138,139,140  etp18l  18     400000  rs
+Ethernet224  37,38,39,40      etp19a  19     400000  rs
+Ethernet228  33,34,35,36      etp19b  19     400000  rs
+Ethernet232  5,6,7,8          etp19c  19     400000  rs
+Ethernet236  1,2,3,4          etp19d  19     400000  rs
+Ethernet240  45,46,47,48      etp19e  19     400000  rs
+Ethernet244  41,42,43,44      etp19f  19     400000  rs
+Ethernet248  21,22,23,24      etp19g  19     400000  rs
+Ethernet252  17,18,19,20      etp19h  19     400000  rs
+Ethernet256  61,62,63,64      etp19i  19     400000  rs
+Ethernet260  57,58,59,60      etp19j  19     400000  rs
+Ethernet264  29,30,31,32      etp19k  19     400000  rs
+Ethernet268  25,26,27,28      etp19l  19     400000  rs
+Ethernet272  253,254,255,256  etp20a  20     400000  rs
+Ethernet276  249,250,251,252  etp20b  20     400000  rs
+Ethernet280  213,214,215,216  etp20c  20     400000  rs
+Ethernet284  221,222,223,224  etp20d  20     400000  rs
+Ethernet288  229,230,231,232  etp20e  20     400000  rs
+Ethernet292  237,238,239,240  etp20f  20     400000  rs
+Ethernet296  217,218,219,220  etp20g  20     400000  rs
+Ethernet300  209,210,211,212  etp20h  20     400000  rs
+Ethernet304  233,234,235,236  etp20i  20     400000  rs
+Ethernet308  225,226,227,228  etp20j  20     400000  rs
+Ethernet312  205,206,207,208  etp20k  20     400000  rs
+Ethernet316  201,202,203,204  etp20l  20     400000  rs
+Ethernet320  485,486,487,488  etp21a  21     400000  rs
+Ethernet324  481,482,483,484  etp21b  21     400000  rs
+Ethernet328  461,462,463,464  etp21c  21     400000  rs
+Ethernet332  457,458,459,460  etp21d  21     400000  rs
+Ethernet336  493,494,495,496  etp21e  21     400000  rs
+Ethernet340  489,490,491,492  etp21f  21     400000  rs
+Ethernet344  469,470,471,472  etp21g  21     400000  rs
+Ethernet348  465,466,467,468  etp21h  21     400000  rs
+Ethernet352  509,510,511,512  etp21i  21     400000  rs
+Ethernet356  505,506,507,508  etp21j  21     400000  rs
+Ethernet360  477,478,479,480  etp21k  21     400000  rs
+Ethernet364  473,474,475,476  etp21l  21     400000  rs
+Ethernet368  317,318,319,320  etp22a  22     400000  rs
+Ethernet372  313,314,315,316  etp22b  22     400000  rs
+Ethernet376  285,286,287,288  etp22c  22     400000  rs
+Ethernet380  277,278,279,280  etp22d  22     400000  rs
+Ethernet384  293,294,295,296  etp22e  22     400000  rs
+Ethernet388  301,302,303,304  etp22f  22     400000  rs
+Ethernet392  273,274,275,276  etp22g  22     400000  rs
+Ethernet396  281,282,283,284  etp22h  22     400000  rs
+Ethernet400  297,298,299,300  etp22i  22     400000  rs
+Ethernet404  289,290,291,292  etp22j  22     400000  rs
+Ethernet408  261,262,263,264  etp22k  22     400000  rs
+Ethernet412  257,258,259,260  etp22l  22     400000  rs
+Ethernet416  421,422,423,424  etp23a  23     400000  rs
+Ethernet420  417,418,419,420  etp23b  23     400000  rs
+Ethernet424  445,446,447,448  etp23c  23     400000  rs
+Ethernet428  441,442,443,444  etp23d  23     400000  rs
+Ethernet432  397,398,399,400  etp23e  23     400000  rs
+Ethernet436  393,394,395,396  etp23f  23     400000  rs
+Ethernet440  429,430,431,432  etp23g  23     400000  rs
+Ethernet444  425,426,427,428  etp23h  23     400000  rs
+Ethernet448  405,406,407,408  etp23i  23     400000  rs
+Ethernet452  401,402,403,404  etp23j  23     400000  rs
+Ethernet456  413,414,415,416  etp23k  23     400000  rs
+Ethernet460  409,410,411,412  etp23l  23     400000  rs
+Ethernet464  381,382,383,384  etp24a  24     400000  rs
+Ethernet468  377,378,379,380  etp24b  24     400000  rs
+Ethernet472  341,342,343,344  etp24c  24     400000  rs
+Ethernet476  349,350,351,352  etp24d  24     400000  rs
+Ethernet480  357,358,359,360  etp24e  24     400000  rs
+Ethernet484  365,366,367,368  etp24f  24     400000  rs
+Ethernet488  345,346,347,348  etp24g  24     400000  rs
+Ethernet492  337,338,339,340  etp24h  24     400000  rs
+Ethernet496  361,362,363,364  etp24i  24     400000  rs
+Ethernet500  353,354,355,356  etp24j  24     400000  rs
+Ethernet504  333,334,335,336  etp24k  24     400000  rs
+Ethernet508  329,330,331,332  etp24l  24     400000  rs
+Ethernet512  513              etp25a  25     10000   none
+Ethernet513  514              etp25b  25     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/qos.json.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/qos.json.j2
new file mode 100644
index 00000000000..00fa61ee0c8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/qos.json.j2
@@ -0,0 +1,161 @@
+{%- macro generate_dscp_to_tc_map_per_sku() -%}
+    "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "0",
+            "1" : "0",
+            "2" : "0",
+            "3" : "3",
+            "4" : "4",
+            "5" : "0",
+            "6" : "0",
+            "7" : "0",
+            "8" : "0",
+            "9" : "0",
+            "10": "0",
+            "11": "0",
+            "12": "0",
+            "13": "0",
+            "14": "0",
+            "15": "0",
+            "16": "0",
+            "17": "0",
+            "18": "0",
+            "19": "0",
+            "20": "0",
+            "21": "0",
+            "22": "0",
+            "23": "0",
+            "24": "0",
+            "25": "0",
+            "26": "0",
+            "27": "0",
+            "28": "0",
+            "29": "0",
+            "30": "0",
+            "31": "0",
+            "32": "0",
+            "33": "0",
+            "34": "0",
+            "35": "0",
+            "36": "0",
+            "37": "0",
+            "38": "0",
+            "39": "0",
+            "40": "0",
+            "41": "0",
+            "42": "0",
+            "43": "0",
+            "44": "6",
+            "45": "0",
+            "46": "5",
+            "47": "1",
+            "48": "0",
+            "49": "0",
+            "50": "0",
+            "51": "0",
+            "52": "0",
+            "53": "0",
+            "54": "0",
+            "55": "0",
+            "56": "0",
+            "57": "0",
+            "58": "0",
+            "59": "0",
+            "60": "0",
+            "61": "0",
+            "62": "0",
+            "63": "0"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_scheduler_per_sku() -%}
+    "SCHEDULER": {
+        "SCHEDULER_Q1": {
+            "type"  : "DWRR",
+            "weight": "10"
+        },
+        "SCHEDULER_Q3": {
+            "type"  : "DWRR",
+            "weight": "20"
+        },
+        "SCHEDULER_Q4": {
+            "type"  : "DWRR",
+            "weight": "10"
+        },
+        "SCHEDULER_Q6": {
+            "type"  : "DWRR",
+            "weight": "70"
+        },
+        "SCHEDULER_DEFAULT": {
+            "type"  : "DWRR",
+            "weight": "10"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_single_queue_per_sku(port) -%}
+        "{{ port }}|0": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|1": {
+            "scheduler": "SCHEDULER_Q1"
+        },
+        "{{ port }}|2": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|3": {
+            "scheduler": "SCHEDULER_Q3",
+            "wred_profile": "WRED_LOSSLESS_Q3"
+        },
+        "{{ port }}|4": {
+            "scheduler": "SCHEDULER_Q4",
+            "wred_profile": "WRED_LOSSLESS_Q4"
+        },
+        "{{ port }}|5": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|6": {
+            "scheduler": "SCHEDULER_Q6"
+        },
+        "{{ port }}|7": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        }
+{%- endmacro -%}
+
+{%- macro generate_wred_profiles() -%}
+    "WRED_PROFILE": {
+        "WRED_LOSSLESS_Q3": {
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "262144",
+            "green_min_threshold": "131072",
+            "red_drop_probability": "5",
+            "red_max_threshold": "262144",
+            "red_min_threshold": "131072",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "262144",
+            "yellow_min_threshold": "131072"
+        },
+        "WRED_LOSSLESS_Q4": {
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "262144",
+            "green_min_threshold": "131072",
+            "red_drop_probability": "5",
+            "red_max_threshold": "262144",
+            "red_min_threshold": "131072",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "262144",
+            "yellow_min_threshold": "131072"
+        }
+    },
+{%- endmacro -%}
+
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/sai.profile b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/sai.profile
new file mode 100644
index 00000000000..8273d235aee
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/sai.profile
@@ -0,0 +1,3 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-16pe-384c.config.bcm
+SAI_NUM_ECMP_MEMBERS=128
+SAI_NHG_HIERARCHICAL_NEXTHOP=false
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/th5-a7060x6-16pe-384c.config.bcm
new file mode 100644
index 00000000000..1759f892753
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/th5-a7060x6-16pe-384c.config.bcm
@@ -0,0 +1,2580 @@
+#
+# $Copyright: Broadcom Ltd.$
+#
+# BCM78907 128x400g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 0
+            l3_alpm_large_vrf_mode: 1
+            l3_ecmp_member_secondary_mem_size: 0
+            sai_mmu_custom_config: 1
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46570213
+                TX_LANE_MAP: 0x64752031
+                RX_POLARITY_FLIP: 0xb3
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13025746
+                TX_LANE_MAP: 0x64752031
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x4152637
+                TX_LANE_MAP: 0x40516273
+                RX_POLARITY_FLIP: 0x69
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x40516273
+                TX_LANE_MAP: 0x4152637
+                RX_POLARITY_FLIP: 0x99
+                TX_POLARITY_FLIP: 0x69
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x4152637
+                TX_LANE_MAP: 0x53406271
+                RX_POLARITY_FLIP: 0x2c
+                TX_POLARITY_FLIP: 0xe1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x32071654
+                TX_LANE_MAP: 0x4375621
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x23015476
+                TX_LANE_MAP: 0x46752130
+                RX_POLARITY_FLIP: 0xc9
+                TX_POLARITY_FLIP: 0x3f
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64750213
+                TX_LANE_MAP: 0x10325674
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64750213
+                TX_LANE_MAP: 0x10235476
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64750213
+                TX_LANE_MAP: 0x10325674
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64750213
+                TX_LANE_MAP: 0x10235476
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46517203
+                TX_LANE_MAP: 0x1723654
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x96
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01235746
+                TX_LANE_MAP: 0x01324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x64750213
+                TX_LANE_MAP: 0x1237654
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x96
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13025476
+                TX_LANE_MAP: 0x67450312
+                RX_POLARITY_FLIP: 0x12
+                TX_POLARITY_FLIP: 0xc4
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13025674
+                TX_LANE_MAP: 0x67451302
+                RX_POLARITY_FLIP: 0x14
+                TX_POLARITY_FLIP: 0xcd
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2135674
+                TX_LANE_MAP: 0x45671302
+                RX_POLARITY_FLIP: 0x56
+                TX_POLARITY_FLIP: 0x1c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x12037654
+                TX_LANE_MAP: 0x47651203
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0x6e
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2135674
+                TX_LANE_MAP: 0x45671302
+                RX_POLARITY_FLIP: 0x74
+                TX_POLARITY_FLIP: 0xd
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x45671203
+                RX_POLARITY_FLIP: 0x74
+                TX_POLARITY_FLIP: 0xd
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75640123
+                TX_LANE_MAP: 0x64750132
+                RX_POLARITY_FLIP: 0x44
+                TX_POLARITY_FLIP: 0xc1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13025476
+                TX_LANE_MAP: 0x67450312
+                RX_POLARITY_FLIP: 0x12
+                TX_POLARITY_FLIP: 0xc4
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x13025674
+                TX_LANE_MAP: 0x67451302
+                RX_POLARITY_FLIP: 0x14
+                TX_POLARITY_FLIP: 0xcf
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75463021
+                TX_LANE_MAP: 0x74652031
+                RX_POLARITY_FLIP: 0x3a
+                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x74561032
+                TX_LANE_MAP: 0x47650123
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0x3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54763012
+                TX_LANE_MAP: 0x45670321
+                RX_POLARITY_FLIP: 0x9a
+                TX_POLARITY_FLIP: 0x53
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31207564
+                TX_LANE_MAP: 0x46570213
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x45670123
+                RX_POLARITY_FLIP: 0x9a
+                TX_POLARITY_FLIP: 0x56
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x10325476
+                TX_LANE_MAP: 0x1234567
+                RX_POLARITY_FLIP: 0xa9
+                TX_POLARITY_FLIP: 0x65
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57461302
+                TX_LANE_MAP: 0x20316475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x32105674
+                TX_LANE_MAP: 0x23016547
+                RX_POLARITY_FLIP: 0xb8
+                TX_POLARITY_FLIP: 0xbd
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x10325674
+                TX_LANE_MAP: 0x1236547
+                RX_POLARITY_FLIP: 0x41
+                TX_POLARITY_FLIP: 0x0
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x21304675
+                TX_LANE_MAP: 0x31206574
+                RX_POLARITY_FLIP: 0x2b
+                TX_POLARITY_FLIP: 0xe1
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54760312
+                TX_LANE_MAP: 0x3126547
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0xc9
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01237564
+                TX_LANE_MAP: 0x01326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x3126745
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x4c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01237564
+                TX_LANE_MAP: 0x01326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x76540213
+                TX_LANE_MAP: 0x12034567
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xd0
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x76540312
+                TX_LANE_MAP: 0x12036547
+                RX_POLARITY_FLIP: 0x41
+                TX_POLARITY_FLIP: 0xd9
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54760312
+                TX_LANE_MAP: 0x3126547
+                RX_POLARITY_FLIP: 0x3
+                TX_POLARITY_FLIP: 0x58
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x74561302
+                TX_LANE_MAP: 0x2136745
+                RX_POLARITY_FLIP: 0x12
+                TX_POLARITY_FLIP: 0x7f
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54760312
+                TX_LANE_MAP: 0x3126547
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x49
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01237564
+                TX_LANE_MAP: 0x01326475
+                RX_POLARITY_FLIP: 0xbb
+                TX_POLARITY_FLIP: 0xe3
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x3126745
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x4c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x57460123
+                TX_LANE_MAP: 0x46750132
+                RX_POLARITY_FLIP: 0xa6
+                TX_POLARITY_FLIP: 0x9c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20314567
+                TX_LANE_MAP: 0x56742130
+                RX_POLARITY_FLIP: 0xc9
+                TX_POLARITY_FLIP: 0x3f
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31206745
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x36
+                TX_POLARITY_FLIP: 0xcf
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20314567
+                TX_LANE_MAP: 0x56742130
+                RX_POLARITY_FLIP: 0xc9
+                TX_POLARITY_FLIP: 0x3f
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31206745
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x36
+                TX_POLARITY_FLIP: 0xcf
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x31452067
+                TX_LANE_MAP: 0x74265031
+                RX_POLARITY_FLIP: 0x2d
+                TX_POLARITY_FLIP: 0xe7
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01235746
+                TX_LANE_MAP: 0x01324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20314567
+                TX_LANE_MAP: 0x56742130
+                RX_POLARITY_FLIP: 0xc9
+                TX_POLARITY_FLIP: 0x3f
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x01235746
+                TX_LANE_MAP: 0x01324675
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46570213
+                TX_LANE_MAP: 0x1327456
+                RX_POLARITY_FLIP: 0xc
+                TX_POLARITY_FLIP: 0x93
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x46570213
+                TX_LANE_MAP: 0x1325674
+                RX_POLARITY_FLIP: 0xc
+                TX_POLARITY_FLIP: 0x1c
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x20316475
+                TX_LANE_MAP: 0x3125647
+                RX_POLARITY_FLIP: 0x3d
+                TX_POLARITY_FLIP: 0x30
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2314657
+                TX_LANE_MAP: 0x2134657
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xcc
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x26370415
+                TX_LANE_MAP: 0x62734051
+                RX_POLARITY_FLIP: 0x69
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x75643120
+                TX_LANE_MAP: 0x02134657
+                RX_POLARITY_FLIP: 0xcc
+                TX_POLARITY_FLIP: 0x66
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x2134657
+                TX_LANE_MAP: 0x20316475
+                RX_POLARITY_FLIP: 0xc4
+                TX_POLARITY_FLIP: 0x99
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+            ?
+                PC_PM_ID: 65
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP: 0x00003210
+                TX_LANE_MAP: 0x00003210
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x00
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 19
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 53
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 54
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 71
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 85
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 86
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 87
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 104
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 105
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 119
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 120
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 138
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 139
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 153
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 172
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 173
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 206
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 207
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 239
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 240
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 241
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 272
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 273
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 291
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 306
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 307
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 326
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 340
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 357
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 358
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 359
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 360
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 374
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 375
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 376
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 377
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 391
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 392
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 393
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 394
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 408
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 409
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 410
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 411
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 425
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 426
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 427
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 428
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 442
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 443
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 444
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 445
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 459
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 460
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 461
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 462
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 476
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 477
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 478
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 479
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 493
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 494
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 495
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 496
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 510
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 511
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 512
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 513
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 527
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 528
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 529
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 530
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 118
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 514
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 4],
+                          [17, 20],
+                          [34, 37],
+                          [51, 54],
+                          [68, 71],
+                          [85, 88],
+                          [102, 105],
+                          [119, 122],
+                          [136, 139],
+                          [153, 156],
+                          [170, 173],
+                          [187, 190],
+                          [204, 207],
+                          [221, 224],
+                          [238, 241],
+                          [255, 258],
+                          [272, 275],
+                          [289, 292],
+                          [306, 309],
+                          [323, 326],
+                          [340, 343],
+                          [357, 360],
+                          [374, 377],
+                          [391, 394],
+                          [408, 411],
+                          [425, 428],
+                          [442, 445],
+                          [459, 462],
+                          [476, 479],
+                          [493, 496],
+                          [510, 513],
+                          [527, 530]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [118, 254]
+            :
+                ENABLE: 0
+                SPEED: 10000
+                NUM_LANES: 1
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            #enable port queue drop stats
+            sai_stats_support_mask: 0
+            #disable vxlan tunnel stats
+            sai_stats_disable_mask: 0x200
+            #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration. Enable PPIU Mode
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        TM_SCHEDULER_CONFIG:
+            DYNAMIC_VOQ: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+### Baseline
+# Skipping buffer reservation. This means that don't use SDK default setings.
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            MIRROR_ON_DROP_RESERVATION: 0
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+...
+# Initialize the various thresholds to zero
+---
+# Ingress service pool level initialization
+device:
+    0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+
+        # Ingress headroom pool
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+
+        # PFC generation: Priority group(s)
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        # Egress multicast CQE pool
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+...
+#Per Port Registers
+#Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                # Pause enable bit,
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+               PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+...
+# Output Port Thresholds -2
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+...
+### Begin MMU ingress threshold settings
+
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269303
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 39728
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+...
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 325520
+                RESUME_LIMIT_CELLS: 325520
+
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1755
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1548
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+...
+### Egress Service Pools
+---
+device:
+    0:
+# Setting Q group limit to 0
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 269303
+                SHARED_RESUME_LIMIT_CELLS: 33652
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 25248
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25238
+                RED_SHARED_LIMIT_CELLS: 21040
+                RED_SHARED_RESUME_LIMIT_CELLS: 21030
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19818
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1858
+                RED_SHARED_LIMIT_CELLS: 1549
+                SHARED_RESUME_LIMIT_CELLS: 2467
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1848
+                RED_SHARED_RESUME_LIMIT_CELLS: 1539
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                RED_SHARED_LIMIT_CELLS: 48
+                SHARED_RESUME_LIMIT_CELLS: 73
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+...
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [0,1,2,5,6]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], 118, 254, [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], 118, 254, [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+
+#Egress Port Thresholds.
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 21039
+                YELLOW_SHARED_LIMIT_CELLS: 25247
+                SHARED_LIMIT_CELLS: 269303
+                RED_SHARED_RESUME_LIMIT_CELLS: 21037
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 25245
+                SHARED_RESUME_LIMIT_CELLS: 33661
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1548
+                YELLOW_SHARED_LIMIT_CELLS: 1857
+                SHARED_LIMIT_CELLS: 19818
+                RED_SHARED_RESUME_LIMIT_CELLS: 1546
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1855
+                SHARED_RESUME_LIMIT_CELLS: 2475
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+...
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 2979
+                SHARED_RESUME_LIMIT_PKTS: 2965
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2234
+                RED_SHARED_LIMIT_PKTS: 1861
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2220
+                RED_SHARED_RESUME_LIMIT_PKTS: 1847
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+...
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-O128S2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-O128S2
new file mode 120000
index 00000000000..e5cd664e864
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-O128S2
@@ -0,0 +1 @@
+Arista-7060X6-16PE-384C-B-O128S2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-O128S2-LAB b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-O128S2-LAB
new file mode 120000
index 00000000000..8cae1837408
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-O128S2-LAB
@@ -0,0 +1 @@
+Arista-7060X6-16PE-384C-B-O128S2-LAB
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/default_sku b/device/arista/x86_64-arista_7060x6_16pe_384c_b/default_sku
new file mode 100644
index 00000000000..19f8a888ddf
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/default_sku
@@ -0,0 +1 @@
+Arista-7060X6-16PE-384C-B-O128S2 l1
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/pcie.yaml b/device/arista/x86_64-arista_7060x6_16pe_384c_b/pcie.yaml
new file mode 120000
index 00000000000..df18a601d82
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/pcie.yaml
@@ -0,0 +1 @@
+../x86_64-arista_common/pcie.yaml
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform.json b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform.json
new file mode 100644
index 00000000000..2b220eca916
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform.json
@@ -0,0 +1,1373 @@
+{
+    "chassis": {
+        "name": "DCS-7060X6-16PE-384C",
+        "components": [
+            {
+                "name": "Aboot()"
+            },
+            {
+                "name": "Scd(addr=0000:03:00.0)"
+            },
+            {
+                "name": "RedstartSysCpld(addr=13-0023)"
+            },
+            {
+                "name": "Scd(addr=0000:06:00.0)"
+            },
+            {
+                "name": "Scd(addr=0000:05:00.0)"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "slot1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    },
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "slot2",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    },
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            },
+            {
+                "name": "slot3",
+                "fans": [
+                    {
+                        "name": "fan5"
+                    },
+                    {
+                        "name": "fan6"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "psu1",
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": []
+            },
+            {
+                "name": "psu2",
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": []
+            }
+        ],
+        "thermals": [
+            {
+                "name": "Cpu temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Inlet Ambiant Air",
+                "controllable": false
+            },
+            {
+                "name": "Outlet",
+                "controllable": false
+            },
+            {
+                "name": "Switch Card temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "TH5 Diode 1",
+                "controllable": false
+            },
+            {
+                "name": "TH5 Diode 2",
+                "controllable": false
+            },
+            {
+                "name": "TH5 PCB Left",
+                "controllable": false
+            },
+            {
+                "name": "TH5 PCB Right",
+                "controllable": false
+            },
+            {
+                "name": "Port Card",
+                "controllable": false
+
+            }
+        ],
+        "sfps": [
+            {
+                "name": "osfp1"
+            },
+            {
+                "name": "osfp2"
+            },
+            {
+                "name": "osfp3"
+            },
+            {
+                "name": "osfp4"
+            },
+            {
+                "name": "osfp5"
+            },
+            {
+                "name": "osfp6"
+            },
+            {
+                "name": "osfp7"
+            },
+            {
+                "name": "osfp8"
+            },
+            {
+                "name": "osfp9"
+            },
+            {
+                "name": "osfp10"
+            },
+            {
+                "name": "osfp11"
+            },
+            {
+                "name": "osfp12"
+            },
+            {
+                "name": "osfp13"
+            },
+            {
+                "name": "osfp14"
+            },
+            {
+                "name": "osfp15"
+            },
+            {
+                "name": "osfp16"
+            },
+            {
+                "name": "back0"
+            },
+            {
+                "name": "back1"
+            },
+            {
+                "name": "back2"
+            },
+            {
+                "name": "back3"
+            },
+            {
+                "name": "back4"
+            },
+            {
+                "name": "back5"
+            },
+            {
+                "name": "back6"
+            },
+            {
+                "name": "back7"
+            },
+            {
+                "name": "qsfp25"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1",
+            "lanes": "369,370,371,372",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp1a"
+                ]
+            }
+        },
+        "Ethernet4": {
+            "index": "1,1,1,1",
+            "lanes": "373,374,375,376",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp1b"
+                ]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2",
+            "lanes": "385,386,387,388",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp2a"
+                ]
+            }
+        },
+        "Ethernet12": {
+            "index": "2,2,2,2",
+            "lanes": "389,390,391,392",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp2b"
+                ]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3",
+            "lanes": "433,434,435,436",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp3a"
+                ]
+            }
+        },
+        "Ethernet20": {
+            "index": "3,3,3,3",
+            "lanes": "437,438,439,440",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp3b"
+                ]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4",
+            "lanes": "449,450,451,452",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp4a"
+                ]
+            }
+        },
+        "Ethernet28": {
+            "index": "4,4,4,4",
+            "lanes": "453,454,455,456",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp4b"
+                ]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5",
+            "lanes": "305,306,307,308",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp5a"
+                ]
+            }
+        },
+        "Ethernet36": {
+            "index": "5,5,5,5",
+            "lanes": "309,310,311,312",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp5b"
+                ]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6",
+            "lanes": "321,322,323,324",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp6a"
+                ]
+            }
+        },
+        "Ethernet44": {
+            "index": "6,6,6,6",
+            "lanes": "325,326,327,328",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp6b"
+                ]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7",
+            "lanes": "241,242,243,244",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp7a"
+                ]
+            }
+        },
+        "Ethernet52": {
+            "index": "7,7,7,7",
+            "lanes": "245,246,247,248",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp7b"
+                ]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8",
+            "lanes": "265,266,267,268",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp8a"
+                ]
+            }
+        },
+        "Ethernet60": {
+            "index": "8,8,8,8",
+            "lanes": "269,270,271,272",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp8b"
+                ]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9",
+            "lanes": "497,498,499,500",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp9a"
+                ]
+            }
+        },
+        "Ethernet68": {
+            "index": "9,9,9,9",
+            "lanes": "501,502,503,504",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp9b"
+                ]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10",
+            "lanes": "9,10,11,12",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp10a"
+                ]
+            }
+        },
+        "Ethernet76": {
+            "index": "10,10,10,10",
+            "lanes": "13,14,15,16",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp10b"
+                ]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11",
+            "lanes": "193,194,195,196",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp11a"
+                ]
+            }
+        },
+        "Ethernet84": {
+            "index": "11,11,11,11",
+            "lanes": "197,198,199,200",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp11b"
+                ]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12",
+            "lanes": "177,178,179,180",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp12a"
+                ]
+            }
+        },
+        "Ethernet92": {
+            "index": "12,12,12,12",
+            "lanes": "181,182,183,184",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp12b"
+                ]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13",
+            "lanes": "65,66,67,68",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp13a"
+                ]
+            }
+        },
+        "Ethernet100": {
+            "index": "13,13,13,13",
+            "lanes": "69,70,71,72",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp13b"
+                ]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp14a"
+                ]
+            }
+        },
+        "Ethernet108": {
+            "index": "14,14,14,14",
+            "lanes": "53,54,55,56",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp14b"
+                ]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15",
+            "lanes": "129,130,131,132",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp15a"
+                ]
+            }
+        },
+        "Ethernet116": {
+            "index": "15,15,15,15",
+            "lanes": "133,134,135,136",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp15b"
+                ]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16",
+            "lanes": "113,114,115,116",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp16a"
+                ]
+            }
+        },
+        "Ethernet124": {
+            "index": "16,16,16,16",
+            "lanes": "117,118,119,120",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp16b"
+                ]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17",
+            "lanes": "101,102,103,104",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17a"
+                ]
+            }
+        },
+        "Ethernet132": {
+            "index": "17,17,17,17",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17b"
+                ]
+            }
+        },
+        "Ethernet136": {
+            "index": "17,17,17,17",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17c"
+                ]
+            }
+        },
+        "Ethernet140": {
+            "index": "17,17,17,17",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17d"
+                ]
+            }
+        },
+        "Ethernet144": {
+            "index": "17,17,17,17",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17e"
+                ]
+            }
+        },
+        "Ethernet148": {
+            "index": "17,17,17,17",
+            "lanes": "73,74,75,76",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17f"
+                ]
+            }
+        },
+        "Ethernet152": {
+            "index": "17,17,17,17",
+            "lanes": "109,110,111,112",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17g"
+                ]
+            }
+        },
+        "Ethernet156": {
+            "index": "17,17,17,17",
+            "lanes": "105,106,107,108",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17h"
+                ]
+            }
+        },
+        "Ethernet160": {
+            "index": "17,17,17,17",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17i"
+                ]
+            }
+        },
+        "Ethernet164": {
+            "index": "17,17,17,17",
+            "lanes": "81,82,83,84",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17j"
+                ]
+            }
+        },
+        "Ethernet168": {
+            "index": "17,17,17,17",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17k"
+                ]
+            }
+        },
+        "Ethernet172": {
+            "index": "17,17,17,17",
+            "lanes": "89,90,91,92",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp17l"
+                ]
+            }
+        },
+        "Ethernet176": {
+            "index": "18,18,18,18",
+            "lanes": "189,190,191,192",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18a"
+                ]
+            }
+        },
+        "Ethernet180": {
+            "index": "18,18,18,18",
+            "lanes": "185,186,187,188",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18b"
+                ]
+            }
+        },
+        "Ethernet184": {
+            "index": "18,18,18,18",
+            "lanes": "149,150,151,152",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18c"
+                ]
+            }
+        },
+        "Ethernet188": {
+            "index": "18,18,18,18",
+            "lanes": "157,158,159,160",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18d"
+                ]
+            }
+        },
+        "Ethernet192": {
+            "index": "18,18,18,18",
+            "lanes": "165,166,167,168",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18e"
+                ]
+            }
+        },
+        "Ethernet196": {
+            "index": "18,18,18,18",
+            "lanes": "173,174,175,176",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18f"
+                ]
+            }
+        },
+        "Ethernet200": {
+            "index": "18,18,18,18",
+            "lanes": "153,154,155,156",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18g"
+                ]
+            }
+        },
+        "Ethernet204": {
+            "index": "18,18,18,18",
+            "lanes": "145,146,147,148",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18h"
+                ]
+            }
+        },
+        "Ethernet208": {
+            "index": "18,18,18,18",
+            "lanes": "169,170,171,172",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18i"
+                ]
+            }
+        },
+        "Ethernet212": {
+            "index": "18,18,18,18",
+            "lanes": "161,162,163,164",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18j"
+                ]
+            }
+        },
+        "Ethernet216": {
+            "index": "18,18,18,18",
+            "lanes": "141,142,143,144",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18k"
+                ]
+            }
+        },
+        "Ethernet220": {
+            "index": "18,18,18,18",
+            "lanes": "137,138,139,140",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp18l"
+                ]
+            }
+        },
+        "Ethernet224": {
+            "index": "19,19,19,19",
+            "lanes": "37,38,39,40",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19a"
+                ]
+            }
+        },
+        "Ethernet228": {
+            "index": "19,19,19,19",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19b"
+                ]
+            }
+        },
+        "Ethernet232": {
+            "index": "19,19,19,19",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19c"
+                ]
+            }
+        },
+        "Ethernet236": {
+            "index": "19,19,19,19",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19d"
+                ]
+            }
+        },
+        "Ethernet240": {
+            "index": "19,19,19,19",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19e"
+                ]
+            }
+        },
+        "Ethernet244": {
+            "index": "19,19,19,19",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19f"
+                ]
+            }
+        },
+        "Ethernet248": {
+            "index": "19,19,19,19",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19g"
+                ]
+            }
+        },
+        "Ethernet252": {
+            "index": "19,19,19,19",
+            "lanes": "17,18,19,20",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19h"
+                ]
+            }
+        },
+        "Ethernet256": {
+            "index": "19,19,19,19",
+            "lanes": "61,62,63,64",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19i"
+                ]
+            }
+        },
+        "Ethernet260": {
+            "index": "19,19,19,19",
+            "lanes": "57,58,59,60",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19j"
+                ]
+            }
+        },
+        "Ethernet264": {
+            "index": "19,19,19,19",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19k"
+                ]
+            }
+        },
+        "Ethernet268": {
+            "index": "19,19,19,19",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp19l"
+                ]
+            }
+        },
+        "Ethernet272": {
+            "index": "20,20,20,20",
+            "lanes": "253,254,255,256",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20a"
+                ]
+            }
+        },
+        "Ethernet276": {
+            "index": "20,20,20,20",
+            "lanes": "249,250,251,252",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20b"
+                ]
+            }
+        },
+        "Ethernet280": {
+            "index": "20,20,20,20",
+            "lanes": "213,214,215,216",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20c"
+                ]
+            }
+        },
+        "Ethernet284": {
+            "index": "20,20,20,20",
+            "lanes": "221,222,223,224",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20d"
+                ]
+            }
+        },
+        "Ethernet288": {
+            "index": "20,20,20,20",
+            "lanes": "229,230,231,232",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20e"
+                ]
+            }
+        },
+        "Ethernet292": {
+            "index": "20,20,20,20",
+            "lanes": "237,238,239,240",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20f"
+                ]
+            }
+        },
+        "Ethernet296": {
+            "index": "20,20,20,20",
+            "lanes": "217,218,219,220",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20g"
+                ]
+            }
+        },
+        "Ethernet300": {
+            "index": "20,20,20,20",
+            "lanes": "209,210,211,212",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20h"
+                ]
+            }
+        },
+        "Ethernet304": {
+            "index": "20,20,20,20",
+            "lanes": "233,234,235,236",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20i"
+                ]
+            }
+        },
+        "Ethernet308": {
+            "index": "20,20,20,20",
+            "lanes": "225,226,227,228",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20j"
+                ]
+            }
+        },
+        "Ethernet312": {
+            "index": "20,20,20,20",
+            "lanes": "205,206,207,208",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20k"
+                ]
+            }
+        },
+        "Ethernet316": {
+            "index": "20,20,20,20",
+            "lanes": "201,202,203,204",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp20l"
+                ]
+            }
+        },
+        "Ethernet320": {
+            "index": "21,21,21,21",
+            "lanes": "485,486,487,488",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21a"
+                ]
+            }
+        },
+        "Ethernet324": {
+            "index": "21,21,21,21",
+            "lanes": "481,482,483,484",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21b"
+                ]
+            }
+        },
+        "Ethernet328": {
+            "index": "21,21,21,21",
+            "lanes": "461,462,463,464",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21c"
+                ]
+            }
+        },
+        "Ethernet332": {
+            "index": "21,21,21,21",
+            "lanes": "457,458,459,460",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21d"
+                ]
+            }
+        },
+        "Ethernet336": {
+            "index": "21,21,21,21",
+            "lanes": "493,494,495,496",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21e"
+                ]
+            }
+        },
+        "Ethernet340": {
+            "index": "21,21,21,21",
+            "lanes": "489,490,491,492",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21f"
+                ]
+            }
+        },
+        "Ethernet344": {
+            "index": "21,21,21,21",
+            "lanes": "469,470,471,472",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21g"
+                ]
+            }
+        },
+        "Ethernet348": {
+            "index": "21,21,21,21",
+            "lanes": "465,466,467,468",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21h"
+                ]
+            }
+        },
+        "Ethernet352": {
+            "index": "21,21,21,21",
+            "lanes": "509,510,511,512",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21i"
+                ]
+            }
+        },
+        "Ethernet356": {
+            "index": "21,21,21,21",
+            "lanes": "505,506,507,508",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21j"
+                ]
+            }
+        },
+        "Ethernet360": {
+            "index": "21,21,21,21",
+            "lanes": "477,478,479,480",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21k"
+                ]
+            }
+        },
+        "Ethernet364": {
+            "index": "21,21,21,21",
+            "lanes": "473,474,475,476",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp21l"
+                ]
+            }
+        },
+        "Ethernet368": {
+            "index": "22,22,22,22",
+            "lanes": "317,318,319,320",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22a"
+                ]
+            }
+        },
+        "Ethernet372": {
+            "index": "22,22,22,22",
+            "lanes": "313,314,315,316",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22b"
+                ]
+            }
+        },
+        "Ethernet376": {
+            "index": "22,22,22,22",
+            "lanes": "285,286,287,288",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22c"
+                ]
+            }
+        },
+        "Ethernet380": {
+            "index": "22,22,22,22",
+            "lanes": "277,278,279,280",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22d"
+                ]
+            }
+        },
+        "Ethernet384": {
+            "index": "22,22,22,22",
+            "lanes": "293,294,295,296",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22e"
+                ]
+            }
+        },
+        "Ethernet388": {
+            "index": "22,22,22,22",
+            "lanes": "301,302,303,304",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22f"
+                ]
+            }
+        },
+        "Ethernet392": {
+            "index": "22,22,22,22",
+            "lanes": "273,274,275,276",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22g"
+                ]
+            }
+        },
+        "Ethernet396": {
+            "index": "22,22,22,22",
+            "lanes": "281,282,283,284",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22h"
+                ]
+            }
+        },
+        "Ethernet400": {
+            "index": "22,22,22,22",
+            "lanes": "297,298,299,300",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22i"
+                ]
+            }
+        },
+        "Ethernet404": {
+            "index": "22,22,22,22",
+            "lanes": "289,290,291,292",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22j"
+                ]
+            }
+        },
+        "Ethernet408": {
+            "index": "22,22,22,22",
+            "lanes": "261,262,263,264",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22k"
+                ]
+            }
+        },
+        "Ethernet412": {
+            "index": "22,22,22,22",
+            "lanes": "257,258,259,260",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp22l"
+                ]
+            }
+        },
+        "Ethernet416": {
+            "index": "23,23,23,23",
+            "lanes": "421,422,423,424",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23a"
+                ]
+            }
+        },
+        "Ethernet420": {
+            "index": "23,23,23,23",
+            "lanes": "417,418,419,420",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23b"
+                ]
+            }
+        },
+        "Ethernet424": {
+            "index": "23,23,23,23",
+            "lanes": "445,446,447,448",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23c"
+                ]
+            }
+        },
+        "Ethernet428": {
+            "index": "23,23,23,23",
+            "lanes": "441,442,443,444",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23d"
+                ]
+            }
+        },
+        "Ethernet432": {
+            "index": "23,23,23,23",
+            "lanes": "397,398,399,400",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23e"
+                ]
+            }
+        },
+        "Ethernet436": {
+            "index": "23,23,23,23",
+            "lanes": "393,394,395,396",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23f"
+                ]
+            }
+        },
+        "Ethernet440": {
+            "index": "23,23,23,23",
+            "lanes": "429,430,431,432",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23g"
+                ]
+            }
+        },
+        "Ethernet444": {
+            "index": "23,23,23,23",
+            "lanes": "425,426,427,428",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23h"
+                ]
+            }
+        },
+        "Ethernet448": {
+            "index": "23,23,23,23",
+            "lanes": "405,406,407,408",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23i"
+                ]
+            }
+        },
+        "Ethernet452": {
+            "index": "23,23,23,23",
+            "lanes": "401,402,403,404",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23j"
+                ]
+            }
+        },
+        "Ethernet456": {
+            "index": "23,23,23,23",
+            "lanes": "413,414,415,416",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23k"
+                ]
+            }
+        },
+        "Ethernet460": {
+            "index": "23,23,23,23",
+            "lanes": "409,410,411,412",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp23l"
+                ]
+            }
+        },
+        "Ethernet464": {
+            "index": "24,24,24,24",
+            "lanes": "381,382,383,384",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24a"
+                ]
+            }
+        },
+        "Ethernet468": {
+            "index": "24,24,24,24",
+            "lanes": "377,378,379,380",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24b"
+                ]
+            }
+        },
+        "Ethernet472": {
+            "index": "24,24,24,24",
+            "lanes": "341,342,343,344",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24c"
+                ]
+            }
+        },
+        "Ethernet476": {
+            "index": "24,24,24,24",
+            "lanes": "349,350,351,352",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24d"
+                ]
+            }
+        },
+        "Ethernet480": {
+            "index": "24,24,24,24",
+            "lanes": "357,358,359,360",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24e"
+                ]
+            }
+        },
+        "Ethernet484": {
+            "index": "24,24,24,24",
+            "lanes": "365,366,367,368",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24f"
+                ]
+            }
+        },
+        "Ethernet488": {
+            "index": "24,24,24,24",
+            "lanes": "345,346,347,348",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24g"
+                ]
+            }
+        },
+        "Ethernet492": {
+            "index": "24,24,24,24",
+            "lanes": "337,338,339,340",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24h"
+                ]
+            }
+        },
+        "Ethernet496": {
+            "index": "24,24,24,24",
+            "lanes": "361,362,363,364",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24i"
+                ]
+            }
+        },
+        "Ethernet500": {
+            "index": "24,24,24,24",
+            "lanes": "353,354,355,356",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24j"
+                ]
+            }
+        },
+        "Ethernet504": {
+            "index": "24,24,24,24",
+            "lanes": "333,334,335,336",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24k"
+                ]
+            }
+        },
+        "Ethernet508": {
+            "index": "24,24,24,24",
+            "lanes": "329,330,331,332",
+            "breakout_modes": {
+                "1x400G": [
+                    "etp24l"
+                ]
+            }
+        },
+        "Ethernet512": {
+            "index": "25,25,25,25",
+            "lanes": "513,514,515,516",
+            "breakout_modes": {
+                "1x100G": [
+                    "etp25a"
+                ],
+                "4x25G": [
+                    "etp25a",
+                    "etp25b",
+                    "etp25c",
+                    "etp25d"
+                ],
+                "4x10G": [
+                    "etp25a",
+                    "etp25b",
+                    "etp25c",
+                    "etp25d"
+                ],
+                "2x10G(2)": [
+                    "etp25a",
+                    "etp25b"
+                ]
+            }
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_asic b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_asic
new file mode 100644
index 00000000000..96046765276
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_components.json b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_components.json
new file mode 100644
index 00000000000..11ed56fb54f
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_components.json
@@ -0,0 +1,13 @@
+{
+   "chassis": {
+      "DCS-7060X6-16PE-384C": {
+         "component": {
+            "Aboot()": {},
+            "Scd(addr=0000:03:00.0)": {},
+            "RedstartSysCpld(addr=13-0023)": {},
+            "Scd(addr=0000:06:00.0)": {},
+            "Scd(addr=0000:05:00.0)": {}
+         }
+      }
+   }
+}
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_env.conf b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_env.conf
new file mode 100644
index 00000000000..dd7cf4fe01c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_env.conf
@@ -0,0 +1,2 @@
+SYNCD_SHM_SIZE=512m
+is_ltsw_chip=1
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_reboot b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_reboot
new file mode 120000
index 00000000000..7f94a49e38b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform_reboot
@@ -0,0 +1 @@
+../x86_64-arista_common/platform_reboot
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/plugins b/device/arista/x86_64-arista_7060x6_16pe_384c_b/plugins
new file mode 120000
index 00000000000..789a45fcace
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/plugins
@@ -0,0 +1 @@
+../x86_64-arista_common/plugins
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/pmon_daemon_control.json b/device/arista/x86_64-arista_7060x6_16pe_384c_b/pmon_daemon_control.json
new file mode 120000
index 00000000000..51d5ab7b005
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/pmon_daemon_control.json
@@ -0,0 +1 @@
+../x86_64-arista_common/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/sensors.conf b/device/arista/x86_64-arista_7060x6_16pe_384c_b/sensors.conf
new file mode 100644
index 00000000000..2c6337e2308
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/sensors.conf
@@ -0,0 +1,14 @@
+bus "i2c-19" "SCD 0000:06:00.0 SMBus master 0 bus 0"
+
+chip "max6581-i2c-19-4d"
+    ignore temp5
+    ignore temp6
+
+chip "nvme-pci-0400"
+    # TODO: sensors complaining about tempX_min and tempX_max
+    ignore temp2
+    ignore temp3
+    ignore temp4
+    ignore temp5
+    ignore temp6
+    ignore temp7
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/system_health_monitoring_config.json b/device/arista/x86_64-arista_7060x6_16pe_384c_b/system_health_monitoring_config.json
new file mode 120000
index 00000000000..1185f771fa8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-arista_common/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/thermal_policy.json b/device/arista/x86_64-arista_7060x6_16pe_384c_b/thermal_policy.json
new file mode 120000
index 00000000000..0991dc7f363
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/thermal_policy.json
@@ -0,0 +1 @@
+../x86_64-arista_common/thermal_policy.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/BALANCED/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/BALANCED/pg_profile_lookup.ini
new file mode 100644
index 00000000000..2e2b7e88e75
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/BALANCED/pg_profile_lookup.ini
@@ -0,0 +1,2 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffer_ports.j2
new file mode 100644
index 00000000000..6b6ae10e51c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffers.json.j2
new file mode 100644
index 00000000000..0b1cb2c541b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffers_defaults_t0.j2
new file mode 100644
index 00000000000..daaba053938
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffers_defaults_t0.j2
@@ -0,0 +1,19 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{# Skip BUFFER_POOL, BUFFER_PROFILE #}
+{%- macro generate_buffer_pool_and_profiles() %}
+{%- endmacro %}
+
+{# Skip BUFFER_QUEUE #}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    }
+{%- endmacro %}
+
+{# Skip BUFFER_PG #}
+{%- macro generate_pg_profils(ports) %}
+    "BUFFER_PG": {
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..daaba053938
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/buffers_defaults_t1.j2
@@ -0,0 +1,19 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{# Skip BUFFER_POOL, BUFFER_PROFILE #}
+{%- macro generate_buffer_pool_and_profiles() %}
+{%- endmacro %}
+
+{# Skip BUFFER_QUEUE #}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    }
+{%- endmacro %}
+
+{# Skip BUFFER_PG #}
+{%- macro generate_pg_profils(ports) %}
+    "BUFFER_PG": {
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/hwsku.json b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/hwsku.json
new file mode 100644
index 00000000000..2adff4a5b4d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/hwsku.json
@@ -0,0 +1,106 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet257": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/pg_profile_lookup.ini
new file mode 120000
index 00000000000..297cddb2d22
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/port_config.ini b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/port_config.ini
new file mode 100644
index 00000000000..4f5538b1322
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/port_config.ini
@@ -0,0 +1,35 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    385,386,387,388,389,390,391,392  Ethernet1/1   1      800000  rs
+Ethernet8    393,394,395,396,397,398,399,400  Ethernet2/1   2      800000  rs
+Ethernet16   401,402,403,404,405,406,407,408  Ethernet3/1   3      800000  rs
+Ethernet24   409,410,411,412,413,414,415,416  Ethernet4/1   4      800000  rs
+Ethernet32   417,418,419,420,421,422,423,424  Ethernet5/1   5      800000  rs
+Ethernet40   425,426,427,428,429,430,431,432  Ethernet6/1   6      800000  rs
+Ethernet48   433,434,435,436,437,438,439,440  Ethernet7/1   7      800000  rs
+Ethernet56   441,442,443,444,445,446,447,448  Ethernet8/1   8      800000  rs
+Ethernet64   449,450,451,452,453,454,455,456  Ethernet9/1   9      800000  rs
+Ethernet72   457,458,459,460,461,462,463,464  Ethernet10/1  10     800000  rs
+Ethernet80   465,466,467,468,469,470,471,472  Ethernet11/1  11     800000  rs
+Ethernet88   473,474,475,476,477,478,479,480  Ethernet12/1  12     800000  rs
+Ethernet96   481,482,483,484,485,486,487,488  Ethernet13/1  13     800000  rs
+Ethernet104  497,498,499,500,501,502,503,504  Ethernet14/1  14     800000  rs
+Ethernet112  489,490,491,492,493,494,495,496  Ethernet15/1  15     800000  rs
+Ethernet120  505,506,507,508,509,510,511,512  Ethernet16/1  16     800000  rs
+Ethernet128  1,2,3,4,5,6,7,8                  Ethernet17/1  17     800000  rs
+Ethernet136  17,18,19,20,21,22,23,24          Ethernet18/1  18     800000  rs
+Ethernet144  9,10,11,12,13,14,15,16           Ethernet19/1  19     800000  rs
+Ethernet152  25,26,27,28,29,30,31,32          Ethernet20/1  20     800000  rs
+Ethernet160  41,42,43,44,45,46,47,48          Ethernet21/1  21     800000  rs
+Ethernet168  33,34,35,36,37,38,39,40          Ethernet22/1  22     800000  rs
+Ethernet176  57,58,59,60,61,62,63,64          Ethernet23/1  23     800000  rs
+Ethernet184  49,50,51,52,53,54,55,56          Ethernet24/1  24     800000  rs
+Ethernet192  73,74,75,76,77,78,79,80          Ethernet25/1  25     800000  rs
+Ethernet200  65,66,67,68,69,70,71,72          Ethernet26/1  26     800000  rs
+Ethernet208  89,90,91,92,93,94,95,96          Ethernet27/1  27     800000  rs
+Ethernet216  81,82,83,84,85,86,87,88          Ethernet28/1  28     800000  rs
+Ethernet224  105,106,107,108,109,110,111,112  Ethernet29/1  29     800000  rs
+Ethernet232  97,98,99,100,101,102,103,104     Ethernet30/1  30     800000  rs
+Ethernet240  121,122,123,124,125,126,127,128  Ethernet31/1  31     800000  rs
+Ethernet248  113,114,115,116,117,118,119,120  Ethernet32/1  32     800000  rs
+Ethernet256  513                              Ethernet33    33     10000   none
+Ethernet257  515                              Ethernet34    34     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/qos.json.j2 b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/qos.json.j2
new file mode 100644
index 00000000000..3e548325ea3
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/sai.profile b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/sai.profile
new file mode 100644
index 00000000000..dfe7c660a07
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-32pe.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/th5-a7060x6-32pe.config.bcm b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/th5-a7060x6-32pe.config.bcm
new file mode 100644
index 00000000000..27a61e1d227
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/th5-a7060x6-32pe.config.bcm
@@ -0,0 +1,645 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            #enable port queue drop stats
+            sai_stats_support_mask: 0
+            #disable vxlan tunnel stats
+            sai_stats_disable_mask: 0x200
+            #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 6
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+            l3_alpm_large_vrf_mode: 1
+            l3_ecmp_member_secondary_mem_size: 4096
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xa2
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x54
+                TX_POLARITY_FLIP: 0xf6
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x30217456
+                RX_POLARITY_FLIP: 0xaf
+                TX_POLARITY_FLIP: 0xd5
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67452301
+                TX_LANE_MAP: 0x1235467
+                RX_POLARITY_FLIP: 0xba
+                TX_POLARITY_FLIP: 0x90
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x30217456
+                RX_POLARITY_FLIP: 0xaf
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x30217456
+                RX_POLARITY_FLIP: 0xaf
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x30217456
+                RX_POLARITY_FLIP: 0xaf
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x30217456
+                RX_POLARITY_FLIP: 0xaf
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x30217456
+                RX_POLARITY_FLIP: 0xaf
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x30217456
+                RX_POLARITY_FLIP: 0xaf
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x30217456
+                RX_POLARITY_FLIP: 0xaf
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x30217456
+                RX_POLARITY_FLIP: 0xaf
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x30217456
+                RX_POLARITY_FLIP: 0xaf
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2135476
+                TX_LANE_MAP: 0x30217456
+                RX_POLARITY_FLIP: 0xaf
+                TX_POLARITY_FLIP: 0x95
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [264, 265],
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+            :
+                ENABLE: 1
+                SPEED: 800000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [274, 274]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                FEC_MODE: PC_FEC_NONE
+                NUM_LANES: 1
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+
+        # Per pipe flex counter configuration. Enable PPIU Mode
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        TM_SCHEDULER_CONFIG:
+            DYNAMIC_VOQ: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
diff --git a/device/arista/x86_64-arista_7060x6_32pe/default_sku b/device/arista/x86_64-arista_7060x6_32pe/default_sku
new file mode 100644
index 00000000000..c7e63f6e284
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/default_sku
@@ -0,0 +1 @@
+Arista-7060X6-32PE t1
diff --git a/device/arista/x86_64-arista_7060x6_32pe/pcie.yaml b/device/arista/x86_64-arista_7060x6_32pe/pcie.yaml
new file mode 120000
index 00000000000..df18a601d82
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/pcie.yaml
@@ -0,0 +1 @@
+../x86_64-arista_common/pcie.yaml
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_32pe/platform.json b/device/arista/x86_64-arista_7060x6_32pe/platform.json
new file mode 100644
index 00000000000..83e4a1c84ac
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/platform.json
@@ -0,0 +1,925 @@
+{
+    "chassis": {
+        "name": "DCS-7060X6-32PE",
+        "components": [
+            {
+                "name": "Aboot()"
+            },
+            {
+                "name": "Scd(addr=0000:02:00.0)"
+            },
+            {
+                "name": "Scd(addr=0000:05:00.0)"
+            },
+            {
+                "name": "SkylarkSysCpld(addr=11-0023)"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "slot1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    },
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "slot2",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    },
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            },
+            {
+                "name": "slot3",
+                "fans": [
+                    {
+                        "name": "fan5"
+                    },
+                    {
+                        "name": "fan6"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "psu1",
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "fans": [
+                    {
+                        "name": "psu1/1",
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "psu2",
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "fans": [
+                    {
+                        "name": "psu2/1",
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "Cpu temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Cpu board temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Inlet Ambient Air",
+                "controllable": false
+            }
+        ],
+        "sfps": [
+            {
+                "name": "osfp1"
+            },
+            {
+                "name": "osfp2"
+            },
+            {
+                "name": "osfp3"
+            },
+            {
+                "name": "osfp4"
+            },
+            {
+                "name": "osfp5"
+            },
+            {
+                "name": "osfp6"
+            },
+            {
+                "name": "osfp7"
+            },
+            {
+                "name": "osfp8"
+            },
+            {
+                "name": "osfp9"
+            },
+            {
+                "name": "osfp10"
+            },
+            {
+                "name": "osfp11"
+            },
+            {
+                "name": "osfp12"
+            },
+            {
+                "name": "osfp13"
+            },
+            {
+                "name": "osfp14"
+            },
+            {
+                "name": "osfp15"
+            },
+            {
+                "name": "osfp16"
+            },
+            {
+                "name": "osfp17"
+            },
+            {
+                "name": "osfp18"
+            },
+            {
+                "name": "osfp19"
+            },
+            {
+                "name": "osfp20"
+            },
+            {
+                "name": "osfp21"
+            },
+            {
+                "name": "osfp22"
+            },
+            {
+                "name": "osfp23"
+            },
+            {
+                "name": "osfp24"
+            },
+            {
+                "name": "osfp25"
+            },
+            {
+                "name": "osfp26"
+            },
+            {
+                "name": "osfp27"
+            },
+            {
+                "name": "osfp28"
+            },
+            {
+                "name": "osfp29"
+            },
+            {
+                "name": "osfp30"
+            },
+            {
+                "name": "osfp31"
+            },
+            {
+                "name": "osfp32"
+            },
+            {
+                "name": "sfp33"
+            },
+            {
+                "name": "sfp34"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "385,386,387,388,389,390,391,392",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet1/1"
+                ],
+                "1x400G": [
+                    "Ethernet1/1"
+                ],
+                "2x400G": [
+                    "Ethernet1/1",
+                    "Ethernet1/5"
+                ],
+                "4x200G": [
+                    "Ethernet1/1",
+                    "Ethernet1/3",
+                    "Ethernet1/5",
+                    "Ethernet1/7"
+                ]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "393,394,395,396,397,398,399,400",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet2/1"
+                ],
+                "1x400G": [
+                    "Ethernet2/1"
+                ],
+                "2x400G": [
+                    "Ethernet2/1",
+                    "Ethernet2/5"
+                ],
+                "4x200G": [
+                    "Ethernet2/1",
+                    "Ethernet2/3",
+                    "Ethernet2/5",
+                    "Ethernet2/7"
+                ]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "401,402,403,404,405,406,407,408",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet3/1"
+                ],
+                "1x400G": [
+                    "Ethernet3/1"
+                ],
+                "2x400G": [
+                    "Ethernet3/1",
+                    "Ethernet3/5"
+                ],
+                "4x200G": [
+                    "Ethernet3/1",
+                    "Ethernet3/3",
+                    "Ethernet3/5",
+                    "Ethernet3/7"
+                ]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "409,410,411,412,413,414,415,416",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet4/1"
+                ],
+                "1x400G": [
+                    "Ethernet4/1"
+                ],
+                "2x400G": [
+                    "Ethernet4/1",
+                    "Ethernet4/5"
+                ],
+                "4x200G": [
+                    "Ethernet4/1",
+                    "Ethernet4/3",
+                    "Ethernet4/5",
+                    "Ethernet4/7"
+                ]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "417,418,419,420,421,422,423,424",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet5/1"
+                ],
+                "1x400G": [
+                    "Ethernet5/1"
+                ],
+                "2x400G": [
+                    "Ethernet5/1",
+                    "Ethernet5/5"
+                ],
+                "4x200G": [
+                    "Ethernet5/1",
+                    "Ethernet5/3",
+                    "Ethernet5/5",
+                    "Ethernet5/7"
+                ]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "425,426,427,428,429,430,431,432",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet6/1"
+                ],
+                "1x400G": [
+                    "Ethernet6/1"
+                ],
+                "2x400G": [
+                    "Ethernet6/1",
+                    "Ethernet6/5"
+                ],
+                "4x200G": [
+                    "Ethernet6/1",
+                    "Ethernet6/3",
+                    "Ethernet6/5",
+                    "Ethernet6/7"
+                ]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "433,434,435,436,437,438,439,440",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet7/1"
+                ],
+                "1x400G": [
+                    "Ethernet7/1"
+                ],
+                "2x400G": [
+                    "Ethernet7/1",
+                    "Ethernet7/5"
+                ],
+                "4x200G": [
+                    "Ethernet7/1",
+                    "Ethernet7/3",
+                    "Ethernet7/5",
+                    "Ethernet7/7"
+                ]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "441,442,443,444,445,446,447,448",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet8/1"
+                ],
+                "1x400G": [
+                    "Ethernet8/1"
+                ],
+                "2x400G": [
+                    "Ethernet8/1",
+                    "Ethernet8/5"
+                ],
+                "4x200G": [
+                    "Ethernet8/1",
+                    "Ethernet8/3",
+                    "Ethernet8/5",
+                    "Ethernet8/7"
+                ]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "449,450,451,452,453,454,455,456",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet9/1"
+                ],
+                "1x400G": [
+                    "Ethernet9/1"
+                ],
+                "2x400G": [
+                    "Ethernet9/1",
+                    "Ethernet9/5"
+                ],
+                "4x200G": [
+                    "Ethernet9/1",
+                    "Ethernet9/3",
+                    "Ethernet9/5",
+                    "Ethernet9/7"
+                ]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "457,458,459,460,461,462,463,464",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet10/1"
+                ],
+                "1x400G": [
+                    "Ethernet10/1"
+                ],
+                "2x400G": [
+                    "Ethernet10/1",
+                    "Ethernet10/5"
+                ],
+                "4x200G": [
+                    "Ethernet10/1",
+                    "Ethernet10/3",
+                    "Ethernet10/5",
+                    "Ethernet10/7"
+                ]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "465,466,467,468,469,470,471,472",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet11/1"
+                ],
+                "1x400G": [
+                    "Ethernet11/1"
+                ],
+                "2x400G": [
+                    "Ethernet11/1",
+                    "Ethernet11/5"
+                ],
+                "4x200G": [
+                    "Ethernet11/1",
+                    "Ethernet11/3",
+                    "Ethernet11/5",
+                    "Ethernet11/7"
+                ]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "473,474,475,476,477,478,479,480",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet12/1"
+                ],
+                "1x400G": [
+                    "Ethernet12/1"
+                ],
+                "2x400G": [
+                    "Ethernet12/1",
+                    "Ethernet12/5"
+                ],
+                "4x200G": [
+                    "Ethernet12/1",
+                    "Ethernet12/3",
+                    "Ethernet12/5",
+                    "Ethernet12/7"
+                ]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "481,482,483,484,485,486,487,488",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet13/1"
+                ],
+                "1x400G": [
+                    "Ethernet13/1"
+                ],
+                "2x400G": [
+                    "Ethernet13/1",
+                    "Ethernet13/5"
+                ],
+                "4x200G": [
+                    "Ethernet13/1",
+                    "Ethernet13/3",
+                    "Ethernet13/5",
+                    "Ethernet13/7"
+                ]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "497,498,499,500,501,502,503,504",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet14/1"
+                ],
+                "1x400G": [
+                    "Ethernet14/1"
+                ],
+                "2x400G": [
+                    "Ethernet14/1",
+                    "Ethernet14/5"
+                ],
+                "4x200G": [
+                    "Ethernet14/1",
+                    "Ethernet14/3",
+                    "Ethernet14/5",
+                    "Ethernet14/7"
+                ]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "489,490,491,492,493,494,495,496",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet15/1"
+                ],
+                "1x400G": [
+                    "Ethernet15/1"
+                ],
+                "2x400G": [
+                    "Ethernet15/1",
+                    "Ethernet15/5"
+                ],
+                "4x200G": [
+                    "Ethernet15/1",
+                    "Ethernet15/3",
+                    "Ethernet15/5",
+                    "Ethernet15/7"
+                ]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "505,506,507,508,509,510,511,512",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet16/1"
+                ],
+                "1x400G": [
+                    "Ethernet16/1"
+                ],
+                "2x400G": [
+                    "Ethernet16/1",
+                    "Ethernet16/5"
+                ],
+                "4x200G": [
+                    "Ethernet16/1",
+                    "Ethernet16/3",
+                    "Ethernet16/5",
+                    "Ethernet16/7"
+                ]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet17/1"
+                ],
+                "1x400G": [
+                    "Ethernet17/1"
+                ],
+                "2x400G": [
+                    "Ethernet17/1",
+                    "Ethernet17/5"
+                ],
+                "4x200G": [
+                    "Ethernet17/1",
+                    "Ethernet17/3",
+                    "Ethernet17/5",
+                    "Ethernet17/7"
+                ]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet18/1"
+                ],
+                "1x400G": [
+                    "Ethernet18/1"
+                ],
+                "2x400G": [
+                    "Ethernet18/1",
+                    "Ethernet18/5"
+                ],
+                "4x200G": [
+                    "Ethernet18/1",
+                    "Ethernet18/3",
+                    "Ethernet18/5",
+                    "Ethernet18/7"
+                ]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet19/1"
+                ],
+                "1x400G": [
+                    "Ethernet19/1"
+                ],
+                "2x400G": [
+                    "Ethernet19/1",
+                    "Ethernet19/5"
+                ],
+                "4x200G": [
+                    "Ethernet19/1",
+                    "Ethernet19/3",
+                    "Ethernet19/5",
+                    "Ethernet19/7"
+                ]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet20/1"
+                ],
+                "1x400G": [
+                    "Ethernet20/1"
+                ],
+                "2x400G": [
+                    "Ethernet20/1",
+                    "Ethernet20/5"
+                ],
+                "4x200G": [
+                    "Ethernet20/1",
+                    "Ethernet20/3",
+                    "Ethernet20/5",
+                    "Ethernet20/7"
+                ]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet21/1"
+                ],
+                "1x400G": [
+                    "Ethernet21/1"
+                ],
+                "2x400G": [
+                    "Ethernet21/1",
+                    "Ethernet21/5"
+                ],
+                "4x200G": [
+                    "Ethernet21/1",
+                    "Ethernet21/3",
+                    "Ethernet21/5",
+                    "Ethernet21/7"
+                ]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet22/1"
+                ],
+                "1x400G": [
+                    "Ethernet22/1"
+                ],
+                "2x400G": [
+                    "Ethernet22/1",
+                    "Ethernet22/5"
+                ],
+                "4x200G": [
+                    "Ethernet22/1",
+                    "Ethernet22/3",
+                    "Ethernet22/5",
+                    "Ethernet22/7"
+                ]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet23/1"
+                ],
+                "1x400G": [
+                    "Ethernet23/1"
+                ],
+                "2x400G": [
+                    "Ethernet23/1",
+                    "Ethernet23/5"
+                ],
+                "4x200G": [
+                    "Ethernet23/1",
+                    "Ethernet23/3",
+                    "Ethernet23/5",
+                    "Ethernet23/7"
+                ]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet24/1"
+                ],
+                "1x400G": [
+                    "Ethernet24/1"
+                ],
+                "2x400G": [
+                    "Ethernet24/1",
+                    "Ethernet24/5"
+                ],
+                "4x200G": [
+                    "Ethernet24/1",
+                    "Ethernet24/3",
+                    "Ethernet24/5",
+                    "Ethernet24/7"
+                ]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet25/1"
+                ],
+                "1x400G": [
+                    "Ethernet25/1"
+                ],
+                "2x400G": [
+                    "Ethernet25/1",
+                    "Ethernet25/5"
+                ],
+                "4x200G": [
+                    "Ethernet25/1",
+                    "Ethernet25/3",
+                    "Ethernet25/5",
+                    "Ethernet25/7"
+                ]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet26/1"
+                ],
+                "1x400G": [
+                    "Ethernet26/1"
+                ],
+                "2x400G": [
+                    "Ethernet26/1",
+                    "Ethernet26/5"
+                ],
+                "4x200G": [
+                    "Ethernet26/1",
+                    "Ethernet26/3",
+                    "Ethernet26/5",
+                    "Ethernet26/7"
+                ]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet27/1"
+                ],
+                "1x400G": [
+                    "Ethernet27/1"
+                ],
+                "2x400G": [
+                    "Ethernet27/1",
+                    "Ethernet27/5"
+                ],
+                "4x200G": [
+                    "Ethernet27/1",
+                    "Ethernet27/3",
+                    "Ethernet27/5",
+                    "Ethernet27/7"
+                ]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet28/1"
+                ],
+                "1x400G": [
+                    "Ethernet28/1"
+                ],
+                "2x400G": [
+                    "Ethernet28/1",
+                    "Ethernet28/5"
+                ],
+                "4x200G": [
+                    "Ethernet28/1",
+                    "Ethernet28/3",
+                    "Ethernet28/5",
+                    "Ethernet28/7"
+                ]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet29/1"
+                ],
+                "1x400G": [
+                    "Ethernet29/1"
+                ],
+                "2x400G": [
+                    "Ethernet29/1",
+                    "Ethernet29/5"
+                ],
+                "4x200G": [
+                    "Ethernet29/1",
+                    "Ethernet29/3",
+                    "Ethernet29/5",
+                    "Ethernet29/7"
+                ]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet30/1"
+                ],
+                "1x400G": [
+                    "Ethernet30/1"
+                ],
+                "2x400G": [
+                    "Ethernet30/1",
+                    "Ethernet30/5"
+                ],
+                "4x200G": [
+                    "Ethernet30/1",
+                    "Ethernet30/3",
+                    "Ethernet30/5",
+                    "Ethernet30/7"
+                ]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet31/1"
+                ],
+                "1x400G": [
+                    "Ethernet31/1"
+                ],
+                "2x400G": [
+                    "Ethernet31/1",
+                    "Ethernet31/5"
+                ],
+                "4x200G": [
+                    "Ethernet31/1",
+                    "Ethernet31/3",
+                    "Ethernet31/5",
+                    "Ethernet31/7"
+                ]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet32/1"
+                ],
+                "1x400G": [
+                    "Ethernet32/1"
+                ],
+                "2x400G": [
+                    "Ethernet32/1",
+                    "Ethernet32/5"
+                ],
+                "4x200G": [
+                    "Ethernet32/1",
+                    "Ethernet32/3",
+                    "Ethernet32/5",
+                    "Ethernet32/7"
+                ]
+            }
+        },
+        "Ethernet256": {
+            "index": "33",
+            "lanes": "513",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet33"
+                ]
+            }
+        },
+        "Ethernet257": {
+            "index": "34",
+            "lanes": "515",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet34"
+                ]
+            }
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_32pe/platform_asic b/device/arista/x86_64-arista_7060x6_32pe/platform_asic
new file mode 100644
index 00000000000..96046765276
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/arista/x86_64-arista_7060x6_32pe/platform_components.json b/device/arista/x86_64-arista_7060x6_32pe/platform_components.json
new file mode 100644
index 00000000000..8efe64eddce
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/platform_components.json
@@ -0,0 +1,12 @@
+{
+   "chassis": {
+      "DCS-7060X6-32PE": {
+         "component": {
+            "Aboot()": {},
+            "Scd(addr=0000:02:00.0)": {},
+            "Scd(addr=0000:05:00.0)": {},
+            "SkylarkSysCpld(addr=11-0023)": {}
+         }
+      }
+   }
+}
diff --git a/device/arista/x86_64-arista_7060x6_32pe/platform_env.conf b/device/arista/x86_64-arista_7060x6_32pe/platform_env.conf
new file mode 100644
index 00000000000..dd7cf4fe01c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/platform_env.conf
@@ -0,0 +1,2 @@
+SYNCD_SHM_SIZE=512m
+is_ltsw_chip=1
diff --git a/device/arista/x86_64-arista_7060x6_32pe/platform_reboot b/device/arista/x86_64-arista_7060x6_32pe/platform_reboot
new file mode 120000
index 00000000000..7f94a49e38b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/platform_reboot
@@ -0,0 +1 @@
+../x86_64-arista_common/platform_reboot
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_32pe/plugins b/device/arista/x86_64-arista_7060x6_32pe/plugins
new file mode 120000
index 00000000000..789a45fcace
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/plugins
@@ -0,0 +1 @@
+../x86_64-arista_common/plugins
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_32pe/pmon_daemon_control.json b/device/arista/x86_64-arista_7060x6_32pe/pmon_daemon_control.json
new file mode 120000
index 00000000000..51d5ab7b005
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/pmon_daemon_control.json
@@ -0,0 +1 @@
+../x86_64-arista_common/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_32pe/sensors.conf b/device/arista/x86_64-arista_7060x6_32pe/sensors.conf
new file mode 100644
index 00000000000..da94f7938ec
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/sensors.conf
@@ -0,0 +1,27 @@
+bus "i2c-7"  "SCD 0000:03:00.0 SMBus master 1 bus 0"
+bus "i2c-15" "SCD 0000:07:00.0 SMBus master 0 bus 0"
+bus "i2c-17" "SCD 0000:07:00.0 SMBus master 0 bus 2"
+bus "i2c-18" "SCD 0000:07:00.0 SMBus master 0 bus 3"
+
+chip "k10temp-pci-00c3"
+    label temp1 "Cpu temp sensor"
+
+chip "tmp75-i2c-7-48"
+    label temp1 "Cpu board temp sernsor"
+
+chip "tmp75-i2c-15-48"
+    label temp1 "Inlet Ambient Air"
+
+chip "pmbus-i2c-17-58"
+    ignore fan3
+    ignore fan4
+
+chip "pmbus-i2c-18-58"
+    ignore fan3
+    ignore fan4
+
+chip "nvme-pci-0400"
+    # TODO: sensors complaining about tempX_min and tempX_max
+    ignore temp3
+    ignore temp4
+    ignore temp7
diff --git a/device/arista/x86_64-arista_7060x6_32pe/system_health_monitoring_config.json b/device/arista/x86_64-arista_7060x6_32pe/system_health_monitoring_config.json
new file mode 120000
index 00000000000..1185f771fa8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-arista_common/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_32pe/thermal_policy.json b/device/arista/x86_64-arista_7060x6_32pe/thermal_policy.json
new file mode 120000
index 00000000000..0991dc7f363
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_32pe/thermal_policy.json
@@ -0,0 +1 @@
+../x86_64-arista_common/thermal_policy.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
index 79ebb0dfe5d..0e3eb3e1e1c 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
@@ -42,6 +42,7 @@ bcm_device:
             sai_tunnel_support: 2
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm
index 4d9a3da5bac..f734b2b2967 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm
@@ -42,6 +42,7 @@ bcm_device:
             sai_tunnel_support: 2
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
index afe53dfe8ad..6bb04e4c8c4 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
@@ -42,6 +42,7 @@ bcm_device:
             sai_tunnel_support: 2
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini
index 86b32b0bfd9..516bb7376df 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini
@@ -1,259 +1,259 @@
 # name       lanes                            alias         index  speed   fec
-Ethernet0    17,18                            Ethernet1/1   1      200000  rs
-Ethernet2    19,20                            Ethernet1/3   1      200000  rs
-Ethernet4    21,22                            Ethernet1/5   1      200000  rs
-Ethernet6    23,24                            Ethernet1/7   1      200000  rs
-Ethernet8    1,2                              Ethernet2/1   2      200000  rs
-Ethernet10   3,4                              Ethernet2/3   2      200000  rs
-Ethernet12   5,6                              Ethernet2/5   2      200000  rs
-Ethernet14   7,8                              Ethernet2/7   2      200000  rs
-Ethernet16   9,10                             Ethernet3/1   3      200000  rs
-Ethernet18   11,12                            Ethernet3/3   3      200000  rs
-Ethernet20   13,14                            Ethernet3/5   3      200000  rs
-Ethernet22   15,16                            Ethernet3/7   3      200000  rs
-Ethernet24   25,26                            Ethernet4/1   4      200000  rs
-Ethernet26   27,28                            Ethernet4/3   4      200000  rs
-Ethernet28   29,30                            Ethernet4/5   4      200000  rs
-Ethernet30   31,32                            Ethernet4/7   4      200000  rs
-Ethernet32   57,58                            Ethernet5/1   5      200000  rs
-Ethernet34   59,60                            Ethernet5/3   5      200000  rs
-Ethernet36   61,62                            Ethernet5/5   5      200000  rs
-Ethernet38   63,64                            Ethernet5/7   5      200000  rs
-Ethernet40   41,42                            Ethernet6/1   6      200000  rs
-Ethernet42   43,44                            Ethernet6/3   6      200000  rs
-Ethernet44   45,46                            Ethernet6/5   6      200000  rs
-Ethernet46   47,48                            Ethernet6/7   6      200000  rs
-Ethernet48   33,34                            Ethernet7/1   7      200000  rs
-Ethernet50   35,36                            Ethernet7/3   7      200000  rs
-Ethernet52   37,38                            Ethernet7/5   7      200000  rs
-Ethernet54   39,40                            Ethernet7/7   7      200000  rs
-Ethernet56   49,50                            Ethernet8/1   8      200000  rs
-Ethernet58   51,52                            Ethernet8/3   8      200000  rs
-Ethernet60   53,54                            Ethernet8/5   8      200000  rs
-Ethernet62   55,56                            Ethernet8/7   8      200000  rs
-Ethernet64   89,90                            Ethernet9/1   9      200000  rs
-Ethernet66   91,92                            Ethernet9/3   9      200000  rs
-Ethernet68   93,94                            Ethernet9/5   9      200000  rs
-Ethernet70   95,96                            Ethernet9/7   9      200000  rs
-Ethernet72   73,74                            Ethernet10/1  10     200000  rs
-Ethernet74   75,76                            Ethernet10/3  10     200000  rs
-Ethernet76   77,78                            Ethernet10/5  10     200000  rs
-Ethernet78   79,80                            Ethernet10/7  10     200000  rs
-Ethernet80   65,66                            Ethernet11/1  11     200000  rs
-Ethernet82   67,68                            Ethernet11/3  11     200000  rs
-Ethernet84   69,70                            Ethernet11/5  11     200000  rs
-Ethernet86   71,72                            Ethernet11/7  11     200000  rs
-Ethernet88   81,82                            Ethernet12/1  12     200000  rs
-Ethernet90   83,84                            Ethernet12/3  12     200000  rs
-Ethernet92   85,86                            Ethernet12/5  12     200000  rs
-Ethernet94   87,88                            Ethernet12/7  12     200000  rs
-Ethernet96   121,122                          Ethernet13/1  13     200000  rs
-Ethernet98   123,124                          Ethernet13/3  13     200000  rs
-Ethernet100  125,126                          Ethernet13/5  13     200000  rs
-Ethernet102  127,128                          Ethernet13/7  13     200000  rs
-Ethernet104  105,106                          Ethernet14/1  14     200000  rs
-Ethernet106  107,108                          Ethernet14/3  14     200000  rs
-Ethernet108  109,110                          Ethernet14/5  14     200000  rs
-Ethernet110  111,112                          Ethernet14/7  14     200000  rs
-Ethernet112  97,98                            Ethernet15/1  15     200000  rs
-Ethernet114  99,100                           Ethernet15/3  15     200000  rs
-Ethernet116  101,102                          Ethernet15/5  15     200000  rs
-Ethernet118  103,104                          Ethernet15/7  15     200000  rs
-Ethernet120  113,114                          Ethernet16/1  16     200000  rs
-Ethernet122  115,116                          Ethernet16/3  16     200000  rs
-Ethernet124  117,118                          Ethernet16/5  16     200000  rs
-Ethernet126  119,120                          Ethernet16/7  16     200000  rs
-Ethernet128  153,154                          Ethernet17/1  17     200000  rs
-Ethernet130  155,156                          Ethernet17/3  17     200000  rs
-Ethernet132  157,158                          Ethernet17/5  17     200000  rs
-Ethernet134  159,160                          Ethernet17/7  17     200000  rs
-Ethernet136  137,138                          Ethernet18/1  18     200000  rs
-Ethernet138  139,140                          Ethernet18/3  18     200000  rs
-Ethernet140  141,142                          Ethernet18/5  18     200000  rs
-Ethernet142  143,144                          Ethernet18/7  18     200000  rs
-Ethernet144  129,130                          Ethernet19/1  19     200000  rs
-Ethernet146  131,132                          Ethernet19/3  19     200000  rs
-Ethernet148  133,134                          Ethernet19/5  19     200000  rs
-Ethernet150  135,136                          Ethernet19/7  19     200000  rs
-Ethernet152  145,146                          Ethernet20/1  20     200000  rs
-Ethernet154  147,148                          Ethernet20/3  20     200000  rs
-Ethernet156  149,150                          Ethernet20/5  20     200000  rs
-Ethernet158  151,152                          Ethernet20/7  20     200000  rs
-Ethernet160  185,186                          Ethernet21/1  21     200000  rs
-Ethernet162  187,188                          Ethernet21/3  21     200000  rs
-Ethernet164  189,190                          Ethernet21/5  21     200000  rs
-Ethernet166  191,192                          Ethernet21/7  21     200000  rs
-Ethernet168  169,170                          Ethernet22/1  22     200000  rs
-Ethernet170  171,172                          Ethernet22/3  22     200000  rs
-Ethernet172  173,174                          Ethernet22/5  22     200000  rs
-Ethernet174  175,176                          Ethernet22/7  22     200000  rs
-Ethernet176  161,162                          Ethernet23/1  23     200000  rs
-Ethernet178  163,164                          Ethernet23/3  23     200000  rs
-Ethernet180  165,166                          Ethernet23/5  23     200000  rs
-Ethernet182  167,168                          Ethernet23/7  23     200000  rs
-Ethernet184  177,178                          Ethernet24/1  24     200000  rs
-Ethernet186  179,180                          Ethernet24/3  24     200000  rs
-Ethernet188  181,182                          Ethernet24/5  24     200000  rs
-Ethernet190  183,184                          Ethernet24/7  24     200000  rs
-Ethernet192  217,218                          Ethernet25/1  25     200000  rs
-Ethernet194  219,220                          Ethernet25/3  25     200000  rs
-Ethernet196  221,222                          Ethernet25/5  25     200000  rs
-Ethernet198  223,224                          Ethernet25/7  25     200000  rs
-Ethernet200  201,202                          Ethernet26/1  26     200000  rs
-Ethernet202  203,204                          Ethernet26/3  26     200000  rs
-Ethernet204  205,206                          Ethernet26/5  26     200000  rs
-Ethernet206  207,208                          Ethernet26/7  26     200000  rs
-Ethernet208  193,194                          Ethernet27/1  27     200000  rs
-Ethernet210  195,196                          Ethernet27/3  27     200000  rs
-Ethernet212  197,198                          Ethernet27/5  27     200000  rs
-Ethernet214  199,200                          Ethernet27/7  27     200000  rs
-Ethernet216  209,210                          Ethernet28/1  28     200000  rs
-Ethernet218  211,212                          Ethernet28/3  28     200000  rs
-Ethernet220  213,214                          Ethernet28/5  28     200000  rs
-Ethernet222  215,216                          Ethernet28/7  28     200000  rs
-Ethernet224  249,250                          Ethernet29/1  29     200000  rs
-Ethernet226  251,252                          Ethernet29/3  29     200000  rs
-Ethernet228  253,254                          Ethernet29/5  29     200000  rs
-Ethernet230  255,256                          Ethernet29/7  29     200000  rs
-Ethernet232  233,234                          Ethernet30/1  30     200000  rs
-Ethernet234  235,236                          Ethernet30/3  30     200000  rs
-Ethernet236  237,238                          Ethernet30/5  30     200000  rs
-Ethernet238  239,240                          Ethernet30/7  30     200000  rs
-Ethernet240  225,226                          Ethernet31/1  31     200000  rs
-Ethernet242  227,228                          Ethernet31/3  31     200000  rs
-Ethernet244  229,230                          Ethernet31/5  31     200000  rs
-Ethernet246  231,232                          Ethernet31/7  31     200000  rs
-Ethernet248  241,242                          Ethernet32/1  32     200000  rs
-Ethernet250  243,244                          Ethernet32/3  32     200000  rs
-Ethernet252  245,246                          Ethernet32/5  32     200000  rs
-Ethernet254  247,248                          Ethernet32/7  32     200000  rs
-Ethernet256  273,274                          Ethernet33/1  33     200000  rs
-Ethernet258  275,276                          Ethernet33/3  33     200000  rs
-Ethernet260  277,278                          Ethernet33/5  33     200000  rs
-Ethernet262  279,280                          Ethernet33/7  33     200000  rs
-Ethernet264  257,258                          Ethernet34/1  34     200000  rs
-Ethernet266  259,260                          Ethernet34/3  34     200000  rs
-Ethernet268  261,262                          Ethernet34/5  34     200000  rs
-Ethernet270  263,264                          Ethernet34/7  34     200000  rs
-Ethernet272  265,266                          Ethernet35/1  35     200000  rs
-Ethernet274  267,268                          Ethernet35/3  35     200000  rs
-Ethernet276  269,270                          Ethernet35/5  35     200000  rs
-Ethernet278  271,272                          Ethernet35/7  35     200000  rs
-Ethernet280  281,282                          Ethernet36/1  36     200000  rs
-Ethernet282  283,284                          Ethernet36/3  36     200000  rs
-Ethernet284  285,286                          Ethernet36/5  36     200000  rs
-Ethernet286  287,288                          Ethernet36/7  36     200000  rs
-Ethernet288  313,314                          Ethernet37/1  37     200000  rs
-Ethernet290  315,316                          Ethernet37/3  37     200000  rs
-Ethernet292  317,318                          Ethernet37/5  37     200000  rs
-Ethernet294  319,320                          Ethernet37/7  37     200000  rs
-Ethernet296  297,298                          Ethernet38/1  38     200000  rs
-Ethernet298  299,300                          Ethernet38/3  38     200000  rs
-Ethernet300  301,302                          Ethernet38/5  38     200000  rs
-Ethernet302  303,304                          Ethernet38/7  38     200000  rs
-Ethernet304  289,290                          Ethernet39/1  39     200000  rs
-Ethernet306  291,292                          Ethernet39/3  39     200000  rs
-Ethernet308  293,294                          Ethernet39/5  39     200000  rs
-Ethernet310  295,296                          Ethernet39/7  39     200000  rs
-Ethernet312  305,306                          Ethernet40/1  40     200000  rs
-Ethernet314  307,308                          Ethernet40/3  40     200000  rs
-Ethernet316  309,310                          Ethernet40/5  40     200000  rs
-Ethernet318  311,312                          Ethernet40/7  40     200000  rs
-Ethernet320  345,346                          Ethernet41/1  41     200000  rs
-Ethernet322  347,348                          Ethernet41/3  41     200000  rs
-Ethernet324  349,350                          Ethernet41/5  41     200000  rs
-Ethernet326  351,352                          Ethernet41/7  41     200000  rs
-Ethernet328  329,330                          Ethernet42/1  42     200000  rs
-Ethernet330  331,332                          Ethernet42/3  42     200000  rs
-Ethernet332  333,334                          Ethernet42/5  42     200000  rs
-Ethernet334  335,336                          Ethernet42/7  42     200000  rs
-Ethernet336  321,322                          Ethernet43/1  43     200000  rs
-Ethernet338  323,324                          Ethernet43/3  43     200000  rs
-Ethernet340  325,326                          Ethernet43/5  43     200000  rs
-Ethernet342  327,328                          Ethernet43/7  43     200000  rs
-Ethernet344  337,338                          Ethernet44/1  44     200000  rs
-Ethernet346  339,340                          Ethernet44/3  44     200000  rs
-Ethernet348  341,342                          Ethernet44/5  44     200000  rs
-Ethernet350  343,344                          Ethernet44/7  44     200000  rs
-Ethernet352  377,378                          Ethernet45/1  45     200000  rs
-Ethernet354  379,380                          Ethernet45/3  45     200000  rs
-Ethernet356  381,382                          Ethernet45/5  45     200000  rs
-Ethernet358  383,384                          Ethernet45/7  45     200000  rs
-Ethernet360  361,362                          Ethernet46/1  46     200000  rs
-Ethernet362  363,364                          Ethernet46/3  46     200000  rs
-Ethernet364  365,366                          Ethernet46/5  46     200000  rs
-Ethernet366  367,368                          Ethernet46/7  46     200000  rs
-Ethernet368  353,354                          Ethernet47/1  47     200000  rs
-Ethernet370  355,356                          Ethernet47/3  47     200000  rs
-Ethernet372  357,358                          Ethernet47/5  47     200000  rs
-Ethernet374  359,360                          Ethernet47/7  47     200000  rs
-Ethernet376  369,370                          Ethernet48/1  48     200000  rs
-Ethernet378  371,372                          Ethernet48/3  48     200000  rs
-Ethernet380  373,374                          Ethernet48/5  48     200000  rs
-Ethernet382  375,376                          Ethernet48/7  48     200000  rs
-Ethernet384  409,410                          Ethernet49/1  49     200000  rs
-Ethernet386  411,412                          Ethernet49/3  49     200000  rs
-Ethernet388  413,414                          Ethernet49/5  49     200000  rs
-Ethernet390  415,416                          Ethernet49/7  49     200000  rs
-Ethernet392  393,394                          Ethernet50/1  50     200000  rs
-Ethernet394  395,396                          Ethernet50/3  50     200000  rs
-Ethernet396  397,398                          Ethernet50/5  50     200000  rs
-Ethernet398  399,400                          Ethernet50/7  50     200000  rs
-Ethernet400  385,386                          Ethernet51/1  51     200000  rs
-Ethernet402  387,388                          Ethernet51/3  51     200000  rs
-Ethernet404  389,390                          Ethernet51/5  51     200000  rs
-Ethernet406  391,392                          Ethernet51/7  51     200000  rs
-Ethernet408  401,402                          Ethernet52/1  52     200000  rs
-Ethernet410  403,404                          Ethernet52/3  52     200000  rs
-Ethernet412  405,406                          Ethernet52/5  52     200000  rs
-Ethernet414  407,408                          Ethernet52/7  52     200000  rs
-Ethernet416  441,442                          Ethernet53/1  53     200000  rs
-Ethernet418  443,444                          Ethernet53/3  53     200000  rs
-Ethernet420  445,446                          Ethernet53/5  53     200000  rs
-Ethernet422  447,448                          Ethernet53/7  53     200000  rs
-Ethernet424  425,426                          Ethernet54/1  54     200000  rs
-Ethernet426  427,428                          Ethernet54/3  54     200000  rs
-Ethernet428  429,430                          Ethernet54/5  54     200000  rs
-Ethernet430  431,432                          Ethernet54/7  54     200000  rs
-Ethernet432  417,418                          Ethernet55/1  55     200000  rs
-Ethernet434  419,420                          Ethernet55/3  55     200000  rs
-Ethernet436  421,422                          Ethernet55/5  55     200000  rs
-Ethernet438  423,424                          Ethernet55/7  55     200000  rs
-Ethernet440  433,434                          Ethernet56/1  56     200000  rs
-Ethernet442  435,436                          Ethernet56/3  56     200000  rs
-Ethernet444  437,438                          Ethernet56/5  56     200000  rs
-Ethernet446  439,440                          Ethernet56/7  56     200000  rs
-Ethernet448  473,474                          Ethernet57/1  57     200000  rs
-Ethernet450  475,476                          Ethernet57/3  57     200000  rs
-Ethernet452  477,478                          Ethernet57/5  57     200000  rs
-Ethernet454  479,480                          Ethernet57/7  57     200000  rs
-Ethernet456  457,458                          Ethernet58/1  58     200000  rs
-Ethernet458  459,460                          Ethernet58/3  58     200000  rs
-Ethernet460  461,462                          Ethernet58/5  58     200000  rs
-Ethernet462  463,464                          Ethernet58/7  58     200000  rs
-Ethernet464  449,450                          Ethernet59/1  59     200000  rs
-Ethernet466  451,452                          Ethernet59/3  59     200000  rs
-Ethernet468  453,454                          Ethernet59/5  59     200000  rs
-Ethernet470  455,456                          Ethernet59/7  59     200000  rs
-Ethernet472  465,466                          Ethernet60/1  60     200000  rs
-Ethernet474  467,468                          Ethernet60/3  60     200000  rs
-Ethernet476  469,470                          Ethernet60/5  60     200000  rs
-Ethernet478  471,472                          Ethernet60/7  60     200000  rs
-Ethernet480  505,506                          Ethernet61/1  61     200000  rs
-Ethernet482  507,508                          Ethernet61/3  61     200000  rs
-Ethernet484  509,510                          Ethernet61/5  61     200000  rs
-Ethernet486  511,512                          Ethernet61/7  61     200000  rs
-Ethernet488  489,490                          Ethernet62/1  62     200000  rs
-Ethernet490  491,492                          Ethernet62/3  62     200000  rs
-Ethernet492  493,494                          Ethernet62/5  62     200000  rs
-Ethernet494  495,496                          Ethernet62/7  62     200000  rs
-Ethernet496  481,482                          Ethernet63/1  63     200000  rs
-Ethernet498  483,484                          Ethernet63/3  63     200000  rs
-Ethernet500  485,486                          Ethernet63/5  63     200000  rs
-Ethernet502  487,488                          Ethernet63/7  63     200000  rs
-Ethernet504  497,498                          Ethernet64/1  64     200000  rs
-Ethernet506  499,500                          Ethernet64/3  64     200000  rs
-Ethernet508  501,502                          Ethernet64/5  64     200000  rs
-Ethernet510  503,504                          Ethernet64/7  64     200000  rs
-Ethernet512  513                              Ethernet65    65     10000   none
-Ethernet513  515                              Ethernet66    66     10000   none
+Ethernet0    17,18                            etp1a         1      200000  rs
+Ethernet2    19,20                            etp1b         1      200000  rs
+Ethernet4    21,22                            etp1c         1      200000  rs
+Ethernet6    23,24                            etp1d         1      200000  rs
+Ethernet8    1,2                              etp2a         2      200000  rs
+Ethernet10   3,4                              etp2b         2      200000  rs
+Ethernet12   5,6                              etp2c         2      200000  rs
+Ethernet14   7,8                              etp2d         2      200000  rs
+Ethernet16   9,10                             etp3a         3      200000  rs
+Ethernet18   11,12                            etp3b         3      200000  rs
+Ethernet20   13,14                            etp3c         3      200000  rs
+Ethernet22   15,16                            etp3d         3      200000  rs
+Ethernet24   25,26                            etp4a         4      200000  rs
+Ethernet26   27,28                            etp4b         4      200000  rs
+Ethernet28   29,30                            etp4c         4      200000  rs
+Ethernet30   31,32                            etp4d         4      200000  rs
+Ethernet32   57,58                            etp5a         5      200000  rs
+Ethernet34   59,60                            etp5b         5      200000  rs
+Ethernet36   61,62                            etp5c         5      200000  rs
+Ethernet38   63,64                            etp5d         5      200000  rs
+Ethernet40   41,42                            etp6a         6      200000  rs
+Ethernet42   43,44                            etp6b         6      200000  rs
+Ethernet44   45,46                            etp6c         6      200000  rs
+Ethernet46   47,48                            etp6d         6      200000  rs
+Ethernet48   33,34                            etp7a         7      200000  rs
+Ethernet50   35,36                            etp7b         7      200000  rs
+Ethernet52   37,38                            etp7c         7      200000  rs
+Ethernet54   39,40                            etp7d         7      200000  rs
+Ethernet56   49,50                            etp8a         8      200000  rs
+Ethernet58   51,52                            etp8b         8      200000  rs
+Ethernet60   53,54                            etp8c         8      200000  rs
+Ethernet62   55,56                            etp8d         8      200000  rs
+Ethernet64   89,90                            etp9a         9      200000  rs
+Ethernet66   91,92                            etp9b         9      200000  rs
+Ethernet68   93,94                            etp9c         9      200000  rs
+Ethernet70   95,96                            etp9d         9      200000  rs
+Ethernet72   73,74                            etp10a        10     200000  rs
+Ethernet74   75,76                            etp10b        10     200000  rs
+Ethernet76   77,78                            etp10c        10     200000  rs
+Ethernet78   79,80                            etp10d        10     200000  rs
+Ethernet80   65,66                            etp11a        11     200000  rs
+Ethernet82   67,68                            etp11b        11     200000  rs
+Ethernet84   69,70                            etp11c        11     200000  rs
+Ethernet86   71,72                            etp11d        11     200000  rs
+Ethernet88   81,82                            etp12a        12     200000  rs
+Ethernet90   83,84                            etp12b        12     200000  rs
+Ethernet92   85,86                            etp12c        12     200000  rs
+Ethernet94   87,88                            etp12d        12     200000  rs
+Ethernet96   121,122                          etp13a        13     200000  rs
+Ethernet98   123,124                          etp13b        13     200000  rs
+Ethernet100  125,126                          etp13c        13     200000  rs
+Ethernet102  127,128                          etp13d        13     200000  rs
+Ethernet104  105,106                          etp14a        14     200000  rs
+Ethernet106  107,108                          etp14b        14     200000  rs
+Ethernet108  109,110                          etp14c        14     200000  rs
+Ethernet110  111,112                          etp14d        14     200000  rs
+Ethernet112  97,98                            etp15a        15     200000  rs
+Ethernet114  99,100                           etp15b        15     200000  rs
+Ethernet116  101,102                          etp15c        15     200000  rs
+Ethernet118  103,104                          etp15d        15     200000  rs
+Ethernet120  113,114                          etp16a        16     200000  rs
+Ethernet122  115,116                          etp16b        16     200000  rs
+Ethernet124  117,118                          etp16c        16     200000  rs
+Ethernet126  119,120                          etp16d        16     200000  rs
+Ethernet128  153,154                          etp17a        17     200000  rs
+Ethernet130  155,156                          etp17b        17     200000  rs
+Ethernet132  157,158                          etp17c        17     200000  rs
+Ethernet134  159,160                          etp17d        17     200000  rs
+Ethernet136  137,138                          etp18a        18     200000  rs
+Ethernet138  139,140                          etp18b        18     200000  rs
+Ethernet140  141,142                          etp18c        18     200000  rs
+Ethernet142  143,144                          etp18d        18     200000  rs
+Ethernet144  129,130                          etp19a        19     200000  rs
+Ethernet146  131,132                          etp19b        19     200000  rs
+Ethernet148  133,134                          etp19c        19     200000  rs
+Ethernet150  135,136                          etp19d        19     200000  rs
+Ethernet152  145,146                          etp20a        20     200000  rs
+Ethernet154  147,148                          etp20b        20     200000  rs
+Ethernet156  149,150                          etp20c        20     200000  rs
+Ethernet158  151,152                          etp20d        20     200000  rs
+Ethernet160  185,186                          etp21a        21     200000  rs
+Ethernet162  187,188                          etp21b        21     200000  rs
+Ethernet164  189,190                          etp21c        21     200000  rs
+Ethernet166  191,192                          etp21d        21     200000  rs
+Ethernet168  169,170                          etp22a        22     200000  rs
+Ethernet170  171,172                          etp22b        22     200000  rs
+Ethernet172  173,174                          etp22c        22     200000  rs
+Ethernet174  175,176                          etp22d        22     200000  rs
+Ethernet176  161,162                          etp23a        23     200000  rs
+Ethernet178  163,164                          etp23b        23     200000  rs
+Ethernet180  165,166                          etp23c        23     200000  rs
+Ethernet182  167,168                          etp23d        23     200000  rs
+Ethernet184  177,178                          etp24a        24     200000  rs
+Ethernet186  179,180                          etp24b        24     200000  rs
+Ethernet188  181,182                          etp24c        24     200000  rs
+Ethernet190  183,184                          etp24d        24     200000  rs
+Ethernet192  217,218                          etp25a        25     200000  rs
+Ethernet194  219,220                          etp25b        25     200000  rs
+Ethernet196  221,222                          etp25c        25     200000  rs
+Ethernet198  223,224                          etp25d        25     200000  rs
+Ethernet200  201,202                          etp26a        26     200000  rs
+Ethernet202  203,204                          etp26b        26     200000  rs
+Ethernet204  205,206                          etp26c        26     200000  rs
+Ethernet206  207,208                          etp26d        26     200000  rs
+Ethernet208  193,194                          etp27a        27     200000  rs
+Ethernet210  195,196                          etp27b        27     200000  rs
+Ethernet212  197,198                          etp27c        27     200000  rs
+Ethernet214  199,200                          etp27d        27     200000  rs
+Ethernet216  209,210                          etp28a        28     200000  rs
+Ethernet218  211,212                          etp28b        28     200000  rs
+Ethernet220  213,214                          etp28c        28     200000  rs
+Ethernet222  215,216                          etp28d        28     200000  rs
+Ethernet224  249,250                          etp29a        29     200000  rs
+Ethernet226  251,252                          etp29b        29     200000  rs
+Ethernet228  253,254                          etp29c        29     200000  rs
+Ethernet230  255,256                          etp29d        29     200000  rs
+Ethernet232  233,234                          etp30a        30     200000  rs
+Ethernet234  235,236                          etp30b        30     200000  rs
+Ethernet236  237,238                          etp30c        30     200000  rs
+Ethernet238  239,240                          etp30d        30     200000  rs
+Ethernet240  225,226                          etp31a        31     200000  rs
+Ethernet242  227,228                          etp31b        31     200000  rs
+Ethernet244  229,230                          etp31c        31     200000  rs
+Ethernet246  231,232                          etp31d        31     200000  rs
+Ethernet248  241,242                          etp32a        32     200000  rs
+Ethernet250  243,244                          etp32b        32     200000  rs
+Ethernet252  245,246                          etp32c        32     200000  rs
+Ethernet254  247,248                          etp32d        32     200000  rs
+Ethernet256  273,274                          etp33a        33     200000  rs
+Ethernet258  275,276                          etp33b        33     200000  rs
+Ethernet260  277,278                          etp33c        33     200000  rs
+Ethernet262  279,280                          etp33d        33     200000  rs
+Ethernet264  257,258                          etp34a        34     200000  rs
+Ethernet266  259,260                          etp34b        34     200000  rs
+Ethernet268  261,262                          etp34c        34     200000  rs
+Ethernet270  263,264                          etp34d        34     200000  rs
+Ethernet272  265,266                          etp35a        35     200000  rs
+Ethernet274  267,268                          etp35b        35     200000  rs
+Ethernet276  269,270                          etp35c        35     200000  rs
+Ethernet278  271,272                          etp35d        35     200000  rs
+Ethernet280  281,282                          etp36a        36     200000  rs
+Ethernet282  283,284                          etp36b        36     200000  rs
+Ethernet284  285,286                          etp36c        36     200000  rs
+Ethernet286  287,288                          etp36d        36     200000  rs
+Ethernet288  313,314                          etp37a        37     200000  rs
+Ethernet290  315,316                          etp37b        37     200000  rs
+Ethernet292  317,318                          etp37c        37     200000  rs
+Ethernet294  319,320                          etp37d        37     200000  rs
+Ethernet296  297,298                          etp38a        38     200000  rs
+Ethernet298  299,300                          etp38b        38     200000  rs
+Ethernet300  301,302                          etp38c        38     200000  rs
+Ethernet302  303,304                          etp38d        38     200000  rs
+Ethernet304  289,290                          etp39a        39     200000  rs
+Ethernet306  291,292                          etp39b        39     200000  rs
+Ethernet308  293,294                          etp39c        39     200000  rs
+Ethernet310  295,296                          etp39d        39     200000  rs
+Ethernet312  305,306                          etp40a        40     200000  rs
+Ethernet314  307,308                          etp40b        40     200000  rs
+Ethernet316  309,310                          etp40c        40     200000  rs
+Ethernet318  311,312                          etp40d        40     200000  rs
+Ethernet320  345,346                          etp41a        41     200000  rs
+Ethernet322  347,348                          etp41b        41     200000  rs
+Ethernet324  349,350                          etp41c        41     200000  rs
+Ethernet326  351,352                          etp41d        41     200000  rs
+Ethernet328  329,330                          etp42a        42     200000  rs
+Ethernet330  331,332                          etp42b        42     200000  rs
+Ethernet332  333,334                          etp42c        42     200000  rs
+Ethernet334  335,336                          etp42d        42     200000  rs
+Ethernet336  321,322                          etp43a        43     200000  rs
+Ethernet338  323,324                          etp43b        43     200000  rs
+Ethernet340  325,326                          etp43c        43     200000  rs
+Ethernet342  327,328                          etp43d        43     200000  rs
+Ethernet344  337,338                          etp44a        44     200000  rs
+Ethernet346  339,340                          etp44b        44     200000  rs
+Ethernet348  341,342                          etp44c        44     200000  rs
+Ethernet350  343,344                          etp44d        44     200000  rs
+Ethernet352  377,378                          etp45a        45     200000  rs
+Ethernet354  379,380                          etp45b        45     200000  rs
+Ethernet356  381,382                          etp45c        45     200000  rs
+Ethernet358  383,384                          etp45d        45     200000  rs
+Ethernet360  361,362                          etp46a        46     200000  rs
+Ethernet362  363,364                          etp46b        46     200000  rs
+Ethernet364  365,366                          etp46c        46     200000  rs
+Ethernet366  367,368                          etp46d        46     200000  rs
+Ethernet368  353,354                          etp47a        47     200000  rs
+Ethernet370  355,356                          etp47b        47     200000  rs
+Ethernet372  357,358                          etp47c        47     200000  rs
+Ethernet374  359,360                          etp47d        47     200000  rs
+Ethernet376  369,370                          etp48a        48     200000  rs
+Ethernet378  371,372                          etp48b        48     200000  rs
+Ethernet380  373,374                          etp48c        48     200000  rs
+Ethernet382  375,376                          etp48d        48     200000  rs
+Ethernet384  409,410                          etp49a        49     200000  rs
+Ethernet386  411,412                          etp49b        49     200000  rs
+Ethernet388  413,414                          etp49c        49     200000  rs
+Ethernet390  415,416                          etp49d        49     200000  rs
+Ethernet392  393,394                          etp50a        50     200000  rs
+Ethernet394  395,396                          etp50b        50     200000  rs
+Ethernet396  397,398                          etp50c        50     200000  rs
+Ethernet398  399,400                          etp50d        50     200000  rs
+Ethernet400  385,386                          etp51a        51     200000  rs
+Ethernet402  387,388                          etp51b        51     200000  rs
+Ethernet404  389,390                          etp51c        51     200000  rs
+Ethernet406  391,392                          etp51d        51     200000  rs
+Ethernet408  401,402                          etp52a        52     200000  rs
+Ethernet410  403,404                          etp52b        52     200000  rs
+Ethernet412  405,406                          etp52c        52     200000  rs
+Ethernet414  407,408                          etp52d        52     200000  rs
+Ethernet416  441,442                          etp53a        53     200000  rs
+Ethernet418  443,444                          etp53b        53     200000  rs
+Ethernet420  445,446                          etp53c        53     200000  rs
+Ethernet422  447,448                          etp53d        53     200000  rs
+Ethernet424  425,426                          etp54a        54     200000  rs
+Ethernet426  427,428                          etp54b        54     200000  rs
+Ethernet428  429,430                          etp54c        54     200000  rs
+Ethernet430  431,432                          etp54d        54     200000  rs
+Ethernet432  417,418                          etp55a        55     200000  rs
+Ethernet434  419,420                          etp55b        55     200000  rs
+Ethernet436  421,422                          etp55c        55     200000  rs
+Ethernet438  423,424                          etp55d        55     200000  rs
+Ethernet440  433,434                          etp56a        56     200000  rs
+Ethernet442  435,436                          etp56b        56     200000  rs
+Ethernet444  437,438                          etp56c        56     200000  rs
+Ethernet446  439,440                          etp56d        56     200000  rs
+Ethernet448  473,474                          etp57a        57     200000  rs
+Ethernet450  475,476                          etp57b        57     200000  rs
+Ethernet452  477,478                          etp57c        57     200000  rs
+Ethernet454  479,480                          etp57d        57     200000  rs
+Ethernet456  457,458                          etp58a        58     200000  rs
+Ethernet458  459,460                          etp58b        58     200000  rs
+Ethernet460  461,462                          etp58c        58     200000  rs
+Ethernet462  463,464                          etp58d        58     200000  rs
+Ethernet464  449,450                          etp59a        59     200000  rs
+Ethernet466  451,452                          etp59b        59     200000  rs
+Ethernet468  453,454                          etp59c        59     200000  rs
+Ethernet470  455,456                          etp59d        59     200000  rs
+Ethernet472  465,466                          etp60a        60     200000  rs
+Ethernet474  467,468                          etp60b        60     200000  rs
+Ethernet476  469,470                          etp60c        60     200000  rs
+Ethernet478  471,472                          etp60d        60     200000  rs
+Ethernet480  505,506                          etp61a        61     200000  rs
+Ethernet482  507,508                          etp61b        61     200000  rs
+Ethernet484  509,510                          etp61c        61     200000  rs
+Ethernet486  511,512                          etp61d        61     200000  rs
+Ethernet488  489,490                          etp62a        62     200000  rs
+Ethernet490  491,492                          etp62b        62     200000  rs
+Ethernet492  493,494                          etp62c        62     200000  rs
+Ethernet494  495,496                          etp62d        62     200000  rs
+Ethernet496  481,482                          etp63a        63     200000  rs
+Ethernet498  483,484                          etp63b        63     200000  rs
+Ethernet500  485,486                          etp63c        63     200000  rs
+Ethernet502  487,488                          etp63d        63     200000  rs
+Ethernet504  497,498                          etp64a        64     200000  rs
+Ethernet506  499,500                          etp64b        64     200000  rs
+Ethernet508  501,502                          etp64c        64     200000  rs
+Ethernet510  503,504                          etp64d        64     200000  rs
+Ethernet512  513                              etp65         65     10000   none
+Ethernet513  515                              etp66         66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/sai.profile
index 50c136d97b2..48f658a6cb9 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/sai.profile
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/sai.profile
@@ -1 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=256
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
index f9dc4cea1df..5926e8e5700 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
@@ -42,6 +42,7 @@ bcm_device:
             mmu_init_config: "\"TH5-MSFT-PROD\""
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
@@ -2744,8 +2745,7 @@ device:
                 RESUME_OFFSET_CELLS: 2
             ?
                 PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
-                TM_MC_Q_ID: [0,3]
-                SHARED_LIMIT_DYNAMIC: ALPHA_2
+                TM_MC_Q_ID: [[0,3]]
             :
                 SHARED_LIMITS: 1
                 DYNAMIC_SHARED_LIMITS: 1
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/port_config.ini
index d29a307ac8f..f7d1fd15773 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/port_config.ini
@@ -1,67 +1,67 @@
 # name       lanes                            alias         index  speed   fec
-Ethernet0    17,18,19,20,21,22,23,24          Ethernet1/1   1      400000  rs
-Ethernet8    1,2,3,4,5,6,7,8                  Ethernet2/1   2      400000  rs
-Ethernet16   9,10,11,12,13,14,15,16           Ethernet3/1   3      400000  rs
-Ethernet24   25,26,27,28,29,30,31,32          Ethernet4/1   4      400000  rs
-Ethernet32   57,58,59,60,61,62,63,64          Ethernet5/1   5      400000  rs
-Ethernet40   41,42,43,44,45,46,47,48          Ethernet6/1   6      400000  rs
-Ethernet48   33,34,35,36,37,38,39,40          Ethernet7/1   7      400000  rs
-Ethernet56   49,50,51,52,53,54,55,56          Ethernet8/1   8      400000  rs
-Ethernet64   89,90,91,92,93,94,95,96          Ethernet9/1   9      400000  rs
-Ethernet72   73,74,75,76,77,78,79,80          Ethernet10/1  10     400000  rs
-Ethernet80   65,66,67,68,69,70,71,72          Ethernet11/1  11     400000  rs
-Ethernet88   81,82,83,84,85,86,87,88          Ethernet12/1  12     400000  rs
-Ethernet96   121,122,123,124,125,126,127,128  Ethernet13/1  13     400000  rs
-Ethernet104  105,106,107,108,109,110,111,112  Ethernet14/1  14     400000  rs
-Ethernet112  97,98,99,100,101,102,103,104     Ethernet15/1  15     400000  rs
-Ethernet120  113,114,115,116,117,118,119,120  Ethernet16/1  16     400000  rs
-Ethernet128  153,154,155,156,157,158,159,160  Ethernet17/1  17     400000  rs
-Ethernet136  137,138,139,140,141,142,143,144  Ethernet18/1  18     400000  rs
-Ethernet144  129,130,131,132,133,134,135,136  Ethernet19/1  19     400000  rs
-Ethernet152  145,146,147,148,149,150,151,152  Ethernet20/1  20     400000  rs
-Ethernet160  185,186,187,188,189,190,191,192  Ethernet21/1  21     400000  rs
-Ethernet168  169,170,171,172,173,174,175,176  Ethernet22/1  22     400000  rs
-Ethernet176  161,162,163,164,165,166,167,168  Ethernet23/1  23     400000  rs
-Ethernet184  177,178,179,180,181,182,183,184  Ethernet24/1  24     400000  rs
-Ethernet192  217,218,219,220,221,222,223,224  Ethernet25/1  25     400000  rs
-Ethernet200  201,202,203,204,205,206,207,208  Ethernet26/1  26     400000  rs
-Ethernet208  193,194,195,196,197,198,199,200  Ethernet27/1  27     400000  rs
-Ethernet216  209,210,211,212,213,214,215,216  Ethernet28/1  28     400000  rs
-Ethernet224  249,250,251,252,253,254,255,256  Ethernet29/1  29     400000  rs
-Ethernet232  233,234,235,236,237,238,239,240  Ethernet30/1  30     400000  rs
-Ethernet240  225,226,227,228,229,230,231,232  Ethernet31/1  31     400000  rs
-Ethernet248  241,242,243,244,245,246,247,248  Ethernet32/1  32     400000  rs
-Ethernet256  273,274,275,276,277,278,279,280  Ethernet33/1  33     400000  rs
-Ethernet264  257,258,259,260,261,262,263,264  Ethernet34/1  34     400000  rs
-Ethernet272  265,266,267,268,269,270,271,272  Ethernet35/1  35     400000  rs
-Ethernet280  281,282,283,284,285,286,287,288  Ethernet36/1  36     400000  rs
-Ethernet288  313,314,315,316,317,318,319,320  Ethernet37/1  37     400000  rs
-Ethernet296  297,298,299,300,301,302,303,304  Ethernet38/1  38     400000  rs
-Ethernet304  289,290,291,292,293,294,295,296  Ethernet39/1  39     400000  rs
-Ethernet312  305,306,307,308,309,310,311,312  Ethernet40/1  40     400000  rs
-Ethernet320  345,346,347,348,349,350,351,352  Ethernet41/1  41     400000  rs
-Ethernet328  329,330,331,332,333,334,335,336  Ethernet42/1  42     400000  rs
-Ethernet336  321,322,323,324,325,326,327,328  Ethernet43/1  43     400000  rs
-Ethernet344  337,338,339,340,341,342,343,344  Ethernet44/1  44     400000  rs
-Ethernet352  377,378,379,380,381,382,383,384  Ethernet45/1  45     400000  rs
-Ethernet360  361,362,363,364,365,366,367,368  Ethernet46/1  46     400000  rs
-Ethernet368  353,354,355,356,357,358,359,360  Ethernet47/1  47     400000  rs
-Ethernet376  369,370,371,372,373,374,375,376  Ethernet48/1  48     400000  rs
-Ethernet384  409,410,411,412,413,414,415,416  Ethernet49/1  49     400000  rs
-Ethernet392  393,394,395,396,397,398,399,400  Ethernet50/1  50     400000  rs
-Ethernet400  385,386,387,388,389,390,391,392  Ethernet51/1  51     400000  rs
-Ethernet408  401,402,403,404,405,406,407,408  Ethernet52/1  52     400000  rs
-Ethernet416  441,442,443,444,445,446,447,448  Ethernet53/1  53     400000  rs
-Ethernet424  425,426,427,428,429,430,431,432  Ethernet54/1  54     400000  rs
-Ethernet432  417,418,419,420,421,422,423,424  Ethernet55/1  55     400000  rs
-Ethernet440  433,434,435,436,437,438,439,440  Ethernet56/1  56     400000  rs
-Ethernet448  473,474,475,476,477,478,479,480  Ethernet57/1  57     400000  rs
-Ethernet456  457,458,459,460,461,462,463,464  Ethernet58/1  58     400000  rs
-Ethernet464  449,450,451,452,453,454,455,456  Ethernet59/1  59     400000  rs
-Ethernet472  465,466,467,468,469,470,471,472  Ethernet60/1  60     400000  rs
-Ethernet480  505,506,507,508,509,510,511,512  Ethernet61/1  61     400000  rs
-Ethernet488  489,490,491,492,493,494,495,496  Ethernet62/1  62     400000  rs
-Ethernet496  481,482,483,484,485,486,487,488  Ethernet63/1  63     400000  rs
-Ethernet504  497,498,499,500,501,502,503,504  Ethernet64/1  64     400000  rs
-Ethernet512  513                              Ethernet65    65     10000   none
-Ethernet513  515                              Ethernet66    66     10000   none
+Ethernet0    17,18,19,20,21,22,23,24          etp1          1      400000  rs
+Ethernet8    1,2,3,4,5,6,7,8                  etp2          2      400000  rs
+Ethernet16   9,10,11,12,13,14,15,16           etp3          3      400000  rs
+Ethernet24   25,26,27,28,29,30,31,32          etp4          4      400000  rs
+Ethernet32   57,58,59,60,61,62,63,64          etp5          5      400000  rs
+Ethernet40   41,42,43,44,45,46,47,48          etp6          6      400000  rs
+Ethernet48   33,34,35,36,37,38,39,40          etp7          7      400000  rs
+Ethernet56   49,50,51,52,53,54,55,56          etp8          8      400000  rs
+Ethernet64   89,90,91,92,93,94,95,96          etp9          9      400000  rs
+Ethernet72   73,74,75,76,77,78,79,80          etp10         10     400000  rs
+Ethernet80   65,66,67,68,69,70,71,72          etp11         11     400000  rs
+Ethernet88   81,82,83,84,85,86,87,88          etp12         12     400000  rs
+Ethernet96   121,122,123,124,125,126,127,128  etp13         13     400000  rs
+Ethernet104  105,106,107,108,109,110,111,112  etp14         14     400000  rs
+Ethernet112  97,98,99,100,101,102,103,104     etp15         15     400000  rs
+Ethernet120  113,114,115,116,117,118,119,120  etp16         16     400000  rs
+Ethernet128  153,154,155,156,157,158,159,160  etp17         17     400000  rs
+Ethernet136  137,138,139,140,141,142,143,144  etp18         18     400000  rs
+Ethernet144  129,130,131,132,133,134,135,136  etp19         19     400000  rs
+Ethernet152  145,146,147,148,149,150,151,152  etp20         20     400000  rs
+Ethernet160  185,186,187,188,189,190,191,192  etp21         21     400000  rs
+Ethernet168  169,170,171,172,173,174,175,176  etp22         22     400000  rs
+Ethernet176  161,162,163,164,165,166,167,168  etp23         23     400000  rs
+Ethernet184  177,178,179,180,181,182,183,184  etp24         24     400000  rs
+Ethernet192  217,218,219,220,221,222,223,224  etp25         25     400000  rs
+Ethernet200  201,202,203,204,205,206,207,208  etp26         26     400000  rs
+Ethernet208  193,194,195,196,197,198,199,200  etp27         27     400000  rs
+Ethernet216  209,210,211,212,213,214,215,216  etp28         28     400000  rs
+Ethernet224  249,250,251,252,253,254,255,256  etp29         29     400000  rs
+Ethernet232  233,234,235,236,237,238,239,240  etp30         30     400000  rs
+Ethernet240  225,226,227,228,229,230,231,232  etp31         31     400000  rs
+Ethernet248  241,242,243,244,245,246,247,248  etp32         32     400000  rs
+Ethernet256  273,274,275,276,277,278,279,280  etp33         33     400000  rs
+Ethernet264  257,258,259,260,261,262,263,264  etp34         34     400000  rs
+Ethernet272  265,266,267,268,269,270,271,272  etp35         35     400000  rs
+Ethernet280  281,282,283,284,285,286,287,288  etp36         36     400000  rs
+Ethernet288  313,314,315,316,317,318,319,320  etp37         37     400000  rs
+Ethernet296  297,298,299,300,301,302,303,304  etp38         38     400000  rs
+Ethernet304  289,290,291,292,293,294,295,296  etp39         39     400000  rs
+Ethernet312  305,306,307,308,309,310,311,312  etp40         40     400000  rs
+Ethernet320  345,346,347,348,349,350,351,352  etp41         41     400000  rs
+Ethernet328  329,330,331,332,333,334,335,336  etp42         42     400000  rs
+Ethernet336  321,322,323,324,325,326,327,328  etp43         43     400000  rs
+Ethernet344  337,338,339,340,341,342,343,344  etp44         44     400000  rs
+Ethernet352  377,378,379,380,381,382,383,384  etp45         45     400000  rs
+Ethernet360  361,362,363,364,365,366,367,368  etp46         46     400000  rs
+Ethernet368  353,354,355,356,357,358,359,360  etp47         47     400000  rs
+Ethernet376  369,370,371,372,373,374,375,376  etp48         48     400000  rs
+Ethernet384  409,410,411,412,413,414,415,416  etp49         49     400000  rs
+Ethernet392  393,394,395,396,397,398,399,400  etp50         50     400000  rs
+Ethernet400  385,386,387,388,389,390,391,392  etp51         51     400000  rs
+Ethernet408  401,402,403,404,405,406,407,408  etp52         52     400000  rs
+Ethernet416  441,442,443,444,445,446,447,448  etp53         53     400000  rs
+Ethernet424  425,426,427,428,429,430,431,432  etp54         54     400000  rs
+Ethernet432  417,418,419,420,421,422,423,424  etp55         55     400000  rs
+Ethernet440  433,434,435,436,437,438,439,440  etp56         56     400000  rs
+Ethernet448  473,474,475,476,477,478,479,480  etp57         57     400000  rs
+Ethernet456  457,458,459,460,461,462,463,464  etp58         58     400000  rs
+Ethernet464  449,450,451,452,453,454,455,456  etp59         59     400000  rs
+Ethernet472  465,466,467,468,469,470,471,472  etp60         60     400000  rs
+Ethernet480  505,506,507,508,509,510,511,512  etp61         61     400000  rs
+Ethernet488  489,490,491,492,493,494,495,496  etp62         62     400000  rs
+Ethernet496  481,482,483,484,485,486,487,488  etp63         63     400000  rs
+Ethernet504  497,498,499,500,501,502,503,504  etp64         64     400000  rs
+Ethernet512  513                              etp65         65     10000   none
+Ethernet513  515                              etp66         66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
index bc493b22240..7988dc91185 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
@@ -42,6 +42,7 @@ bcm_device:
             sai_tunnel_support: 2
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
@@ -1121,7 +1122,7 @@ device:
                           [330, 331],
                           [341, 342]]
             :
-                ENABLE: 1
+                ENABLE: 0
                 SPEED: 400000
                 NUM_LANES: 8
                 FEC_MODE: PC_FEC_RS544_2XN
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/port_config.ini
index 16af3bf4760..958977505db 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/port_config.ini
@@ -1,235 +1,235 @@
 # name          lanes                           alias           index   speed   fec
-Ethernet0       17                              Ethernet1/1     1       100000  rs
-Ethernet1       18                              Ethernet1/2     1       100000  rs
-Ethernet2       19                              Ethernet1/3     1       100000  rs
-Ethernet3       20                              Ethernet1/4     1       100000  rs
-Ethernet4       21                              Ethernet1/5     1       100000  rs
-Ethernet5       22                              Ethernet1/6     1       100000  rs
-Ethernet6       23                              Ethernet1/7     1       100000  rs
-Ethernet7       24                              Ethernet1/8     1       100000  rs
-Ethernet16      9                               Ethernet3/1     3       100000  rs
-Ethernet17      10                              Ethernet3/2     3       100000  rs
-Ethernet18      11                              Ethernet3/3     3       100000  rs
-Ethernet19      12                              Ethernet3/4     3       100000  rs
-Ethernet20      13                              Ethernet3/5     3       100000  rs
-Ethernet21      14                              Ethernet3/6     3       100000  rs
-Ethernet22      15                              Ethernet3/7     3       100000  rs
-Ethernet23      16                              Ethernet3/8     3       100000  rs
-Ethernet32      57                              Ethernet5/1     5       100000  rs
-Ethernet33      58                              Ethernet5/2     5       100000  rs
-Ethernet34      59                              Ethernet5/3     5       100000  rs
-Ethernet35      60                              Ethernet5/4     5       100000  rs
-Ethernet36      61                              Ethernet5/5     5       100000  rs
-Ethernet37      62                              Ethernet5/6     5       100000  rs
-Ethernet38      63                              Ethernet5/7     5       100000  rs
-Ethernet39      64                              Ethernet5/8     5       100000  rs
-Ethernet48      33                              Ethernet7/1     7       100000  rs
-Ethernet49      34                              Ethernet7/2     7       100000  rs
-Ethernet50      35                              Ethernet7/3     7       100000  rs
-Ethernet51      36                              Ethernet7/4     7       100000  rs
-Ethernet52      37                              Ethernet7/5     7       100000  rs
-Ethernet53      38                              Ethernet7/6     7       100000  rs
-Ethernet54      39                              Ethernet7/7     7       100000  rs
-Ethernet55      40                              Ethernet7/8     7       100000  rs
-Ethernet64      89                              Ethernet9/1     9       100000  rs
-Ethernet65      90                              Ethernet9/2     9       100000  rs
-Ethernet66      91                              Ethernet9/3     9       100000  rs
-Ethernet67      92                              Ethernet9/4     9       100000  rs
-Ethernet68      93                              Ethernet9/5     9       100000  rs
-Ethernet69      94                              Ethernet9/6     9       100000  rs
-Ethernet70      95                              Ethernet9/7     9       100000  rs
-Ethernet71      96                              Ethernet9/8     9       100000  rs
-Ethernet80      65                              Ethernet11/1    11      100000  rs
-Ethernet81      66                              Ethernet11/2    11      100000  rs
-Ethernet82      67                              Ethernet11/3    11      100000  rs
-Ethernet83      68                              Ethernet11/4    11      100000  rs
-Ethernet84      69                              Ethernet11/5    11      100000  rs
-Ethernet85      70                              Ethernet11/6    11      100000  rs
-Ethernet86      71                              Ethernet11/7    11      100000  rs
-Ethernet87      72                              Ethernet11/8    11      100000  rs
-Ethernet96      121,122,123,124                 Ethernet13/1    13      400000  rs
-Ethernet100     125,126,127,128                 Ethernet13/5    13      400000  rs
-Ethernet112     97                              Ethernet15/1    15      100000  rs
-Ethernet113     98                              Ethernet15/2    15      100000  rs
-Ethernet114     99                              Ethernet15/3    15      100000  rs
-Ethernet115     100                             Ethernet15/4    15      100000  rs
-Ethernet116     101                             Ethernet15/5    15      100000  rs
-Ethernet117     102                             Ethernet15/6    15      100000  rs
-Ethernet118     103                             Ethernet15/7    15      100000  rs
-Ethernet119     104                             Ethernet15/8    15      100000  rs
-Ethernet128     153,154,155,156                 Ethernet17/1    17      400000  rs
-Ethernet132     157,158,159,160                 Ethernet17/5    17      400000  rs
-Ethernet144     129                             Ethernet19/1    19      100000  rs
-Ethernet145     130                             Ethernet19/2    19      100000  rs
-Ethernet146     131                             Ethernet19/3    19      100000  rs
-Ethernet147     132                             Ethernet19/4    19      100000  rs
-Ethernet148     133                             Ethernet19/5    19      100000  rs
-Ethernet149     134                             Ethernet19/6    19      100000  rs
-Ethernet150     135                             Ethernet19/7    19      100000  rs
-Ethernet151     136                             Ethernet19/8    19      100000  rs
-Ethernet160     185                             Ethernet21/1    21      100000  rs
-Ethernet161     186                             Ethernet21/2    21      100000  rs
-Ethernet162     187                             Ethernet21/3    21      100000  rs
-Ethernet163     188                             Ethernet21/4    21      100000  rs
-Ethernet164     189                             Ethernet21/5    21      100000  rs
-Ethernet165     190                             Ethernet21/6    21      100000  rs
-Ethernet166     191                             Ethernet21/7    21      100000  rs
-Ethernet167     192                             Ethernet21/8    21      100000  rs
-Ethernet176     161                             Ethernet23/1    23      100000  rs
-Ethernet177     162                             Ethernet23/2    23      100000  rs
-Ethernet178     163                             Ethernet23/3    23      100000  rs
-Ethernet179     164                             Ethernet23/4    23      100000  rs
-Ethernet180     165                             Ethernet23/5    23      100000  rs
-Ethernet181     166                             Ethernet23/6    23      100000  rs
-Ethernet182     167                             Ethernet23/7    23      100000  rs
-Ethernet183     168                             Ethernet23/8    23      100000  rs
-Ethernet192     217                             Ethernet25/1    25      100000  rs
-Ethernet193     218                             Ethernet25/2    25      100000  rs
-Ethernet194     219                             Ethernet25/3    25      100000  rs
-Ethernet195     220                             Ethernet25/4    25      100000  rs
-Ethernet196     221                             Ethernet25/5    25      100000  rs
-Ethernet197     222                             Ethernet25/6    25      100000  rs
-Ethernet198     223                             Ethernet25/7    25      100000  rs
-Ethernet199     224                             Ethernet25/8    25      100000  rs
-Ethernet208     193                             Ethernet27/1    27      100000  rs
-Ethernet209     194                             Ethernet27/2    27      100000  rs
-Ethernet210     195                             Ethernet27/3    27      100000  rs
-Ethernet211     196                             Ethernet27/4    27      100000  rs
-Ethernet212     197                             Ethernet27/5    27      100000  rs
-Ethernet213     198                             Ethernet27/6    27      100000  rs
-Ethernet214     199                             Ethernet27/7    27      100000  rs
-Ethernet215     200                             Ethernet27/8    27      100000  rs
-Ethernet224     249                             Ethernet29/1    29      100000  rs
-Ethernet225     250                             Ethernet29/2    29      100000  rs
-Ethernet226     251                             Ethernet29/3    29      100000  rs
-Ethernet227     252                             Ethernet29/4    29      100000  rs
-Ethernet228     253                             Ethernet29/5    29      100000  rs
-Ethernet229     254                             Ethernet29/6    29      100000  rs
-Ethernet230     255                             Ethernet29/7    29      100000  rs
-Ethernet231     256                             Ethernet29/8    29      100000  rs
-Ethernet240     225                             Ethernet31/1    31      100000  rs
-Ethernet241     226                             Ethernet31/2    31      100000  rs
-Ethernet242     227                             Ethernet31/3    31      100000  rs
-Ethernet243     228                             Ethernet31/4    31      100000  rs
-Ethernet244     229                             Ethernet31/5    31      100000  rs
-Ethernet245     230                             Ethernet31/6    31      100000  rs
-Ethernet246     231                             Ethernet31/7    31      100000  rs
-Ethernet247     232                             Ethernet31/8    31      100000  rs
-Ethernet256     273                             Ethernet33/1    33      100000  rs
-Ethernet257     274                             Ethernet33/2    33      100000  rs
-Ethernet258     275                             Ethernet33/3    33      100000  rs
-Ethernet259     276                             Ethernet33/4    33      100000  rs
-Ethernet260     277                             Ethernet33/5    33      100000  rs
-Ethernet261     278                             Ethernet33/6    33      100000  rs
-Ethernet262     279                             Ethernet33/7    33      100000  rs
-Ethernet263     280                             Ethernet33/8    33      100000  rs
-Ethernet272     265                             Ethernet35/1    35      100000  rs
-Ethernet273     266                             Ethernet35/2    35      100000  rs
-Ethernet274     267                             Ethernet35/3    35      100000  rs
-Ethernet275     268                             Ethernet35/4    35      100000  rs
-Ethernet276     269                             Ethernet35/5    35      100000  rs
-Ethernet277     270                             Ethernet35/6    35      100000  rs
-Ethernet278     271                             Ethernet35/7    35      100000  rs
-Ethernet279     272                             Ethernet35/8    35      100000  rs
-Ethernet288     313                             Ethernet37/1    37      100000  rs
-Ethernet289     314                             Ethernet37/2    37      100000  rs
-Ethernet290     315                             Ethernet37/3    37      100000  rs
-Ethernet291     316                             Ethernet37/4    37      100000  rs
-Ethernet292     317                             Ethernet37/5    37      100000  rs
-Ethernet293     318                             Ethernet37/6    37      100000  rs
-Ethernet294     319                             Ethernet37/7    37      100000  rs
-Ethernet295     320                             Ethernet37/8    37      100000  rs
-Ethernet304     289                             Ethernet39/1    39      100000  rs
-Ethernet305     290                             Ethernet39/2    39      100000  rs
-Ethernet306     291                             Ethernet39/3    39      100000  rs
-Ethernet307     292                             Ethernet39/4    39      100000  rs
-Ethernet308     293                             Ethernet39/5    39      100000  rs
-Ethernet309     294                             Ethernet39/6    39      100000  rs
-Ethernet310     295                             Ethernet39/7    39      100000  rs
-Ethernet311     296                             Ethernet39/8    39      100000  rs
-Ethernet320     345                             Ethernet41/1    41      100000  rs
-Ethernet321     346                             Ethernet41/2    41      100000  rs
-Ethernet322     347                             Ethernet41/3    41      100000  rs
-Ethernet323     348                             Ethernet41/4    41      100000  rs
-Ethernet324     349                             Ethernet41/5    41      100000  rs
-Ethernet325     350                             Ethernet41/6    41      100000  rs
-Ethernet326     351                             Ethernet41/7    41      100000  rs
-Ethernet327     352                             Ethernet41/8    41      100000  rs
-Ethernet336     321                             Ethernet43/1    43      100000  rs
-Ethernet337     322                             Ethernet43/2    43      100000  rs
-Ethernet338     323                             Ethernet43/3    43      100000  rs
-Ethernet339     324                             Ethernet43/4    43      100000  rs
-Ethernet340     325                             Ethernet43/5    43      100000  rs
-Ethernet341     326                             Ethernet43/6    43      100000  rs
-Ethernet342     327                             Ethernet43/7    43      100000  rs
-Ethernet343     328                             Ethernet43/8    43      100000  rs
-Ethernet352     377,378,379,380                 Ethernet45/1    45      400000  rs
-Ethernet356     381,382,383,384                 Ethernet45/5    45      400000  rs
-Ethernet368     353                             Ethernet47/1    47      100000  rs
-Ethernet369     354                             Ethernet47/2    47      100000  rs
-Ethernet370     355                             Ethernet47/3    47      100000  rs
-Ethernet371     356                             Ethernet47/4    47      100000  rs
-Ethernet372     357                             Ethernet47/5    47      100000  rs
-Ethernet373     358                             Ethernet47/6    47      100000  rs
-Ethernet374     359                             Ethernet47/7    47      100000  rs
-Ethernet375     360                             Ethernet47/8    47      100000  rs
-Ethernet384     409,410,411,412                 Ethernet49/1    49      400000  rs
-Ethernet388     413,414,415,416                 Ethernet49/5    49      400000  rs
-Ethernet400     385                             Ethernet51/1    51      100000  rs
-Ethernet401     386                             Ethernet51/2    51      100000  rs
-Ethernet402     387                             Ethernet51/3    51      100000  rs
-Ethernet403     388                             Ethernet51/4    51      100000  rs
-Ethernet404     389                             Ethernet51/5    51      100000  rs
-Ethernet405     390                             Ethernet51/6    51      100000  rs
-Ethernet406     391                             Ethernet51/7    51      100000  rs
-Ethernet407     392                             Ethernet51/8    51      100000  rs
-Ethernet416     441                             Ethernet53/1    53      100000  rs
-Ethernet417     442                             Ethernet53/2    53      100000  rs
-Ethernet418     443                             Ethernet53/3    53      100000  rs
-Ethernet419     444                             Ethernet53/4    53      100000  rs
-Ethernet420     445                             Ethernet53/5    53      100000  rs
-Ethernet421     446                             Ethernet53/6    53      100000  rs
-Ethernet422     447                             Ethernet53/7    53      100000  rs
-Ethernet423     448                             Ethernet53/8    53      100000  rs
-Ethernet432     417                             Ethernet55/1    55      100000  rs
-Ethernet433     418                             Ethernet55/2    55      100000  rs
-Ethernet434     419                             Ethernet55/3    55      100000  rs
-Ethernet435     420                             Ethernet55/4    55      100000  rs
-Ethernet436     421                             Ethernet55/5    55      100000  rs
-Ethernet437     422                             Ethernet55/6    55      100000  rs
-Ethernet438     423                             Ethernet55/7    55      100000  rs
-Ethernet439     424                             Ethernet55/8    55      100000  rs
-Ethernet448     473                             Ethernet57/1    57      100000  rs
-Ethernet449     474                             Ethernet57/2    57      100000  rs
-Ethernet450     475                             Ethernet57/3    57      100000  rs
-Ethernet451     476                             Ethernet57/4    57      100000  rs
-Ethernet452     477                             Ethernet57/5    57      100000  rs
-Ethernet453     478                             Ethernet57/6    57      100000  rs
-Ethernet454     479                             Ethernet57/7    57      100000  rs
-Ethernet455     480                             Ethernet57/8    57      100000  rs
-Ethernet464     449                             Ethernet59/1    59      100000  rs
-Ethernet465     450                             Ethernet59/2    59      100000  rs
-Ethernet466     451                             Ethernet59/3    59      100000  rs
-Ethernet467     452                             Ethernet59/4    59      100000  rs
-Ethernet468     453                             Ethernet59/5    59      100000  rs
-Ethernet469     454                             Ethernet59/6    59      100000  rs
-Ethernet470     455                             Ethernet59/7    59      100000  rs
-Ethernet471     456                             Ethernet59/8    59      100000  rs
-Ethernet480     505                             Ethernet61/1    61      100000  rs
-Ethernet481     506                             Ethernet61/2    61      100000  rs
-Ethernet482     507                             Ethernet61/3    61      100000  rs
-Ethernet483     508                             Ethernet61/4    61      100000  rs
-Ethernet484     509                             Ethernet61/5    61      100000  rs
-Ethernet485     510                             Ethernet61/6    61      100000  rs
-Ethernet486     511                             Ethernet61/7    61      100000  rs
-Ethernet487     512                             Ethernet61/8    61      100000  rs
-Ethernet496     481                             Ethernet63/1    63      100000  rs
-Ethernet497     482                             Ethernet63/2    63      100000  rs
-Ethernet498     483                             Ethernet63/3    63      100000  rs
-Ethernet499     484                             Ethernet63/4    63      100000  rs
-Ethernet500     485                             Ethernet63/5    63      100000  rs
-Ethernet501     486                             Ethernet63/6    63      100000  rs
-Ethernet502     487                             Ethernet63/7    63      100000  rs
-Ethernet503     488                             Ethernet63/8    63      100000  rs
-Ethernet512     513                             Ethernet65      65      10000   none
-Ethernet513     515                             Ethernet66      66      10000   none
+Ethernet0       17                              etp1a           1       100000  rs
+Ethernet1       18                              etp1b           1       100000  rs
+Ethernet2       19                              etp1c           1       100000  rs
+Ethernet3       20                              etp1d           1       100000  rs
+Ethernet4       21                              etp1e           1       100000  rs
+Ethernet5       22                              etp1f           1       100000  rs
+Ethernet6       23                              etp1g           1       100000  rs
+Ethernet7       24                              etp1h           1       100000  rs
+Ethernet16      9                               etp3a           3       100000  rs
+Ethernet17      10                              etp3b           3       100000  rs
+Ethernet18      11                              etp3c           3       100000  rs
+Ethernet19      12                              etp3d           3       100000  rs
+Ethernet20      13                              etp3e           3       100000  rs
+Ethernet21      14                              etp3f           3       100000  rs
+Ethernet22      15                              etp3g           3       100000  rs
+Ethernet23      16                              etp3h           3       100000  rs
+Ethernet32      57                              etp5a           5       100000  rs
+Ethernet33      58                              etp5b           5       100000  rs
+Ethernet34      59                              etp5c           5       100000  rs
+Ethernet35      60                              etp5d           5       100000  rs
+Ethernet36      61                              etp5e           5       100000  rs
+Ethernet37      62                              etp5f           5       100000  rs
+Ethernet38      63                              etp5g           5       100000  rs
+Ethernet39      64                              etp5h           5       100000  rs
+Ethernet48      33                              etp7a           7       100000  rs
+Ethernet49      34                              etp7b           7       100000  rs
+Ethernet50      35                              etp7c           7       100000  rs
+Ethernet51      36                              etp7d           7       100000  rs
+Ethernet52      37                              etp7e           7       100000  rs
+Ethernet53      38                              etp7f           7       100000  rs
+Ethernet54      39                              etp7g           7       100000  rs
+Ethernet55      40                              etp7h           7       100000  rs
+Ethernet64      89                              etp9a           9       100000  rs
+Ethernet65      90                              etp9b           9       100000  rs
+Ethernet66      91                              etp9c           9       100000  rs
+Ethernet67      92                              etp9d           9       100000  rs
+Ethernet68      93                              etp9e           9       100000  rs
+Ethernet69      94                              etp9f           9       100000  rs
+Ethernet70      95                              etp9g           9       100000  rs
+Ethernet71      96                              etp9h           9       100000  rs
+Ethernet80      65                              etp11a          11      100000  rs
+Ethernet81      66                              etp11b          11      100000  rs
+Ethernet82      67                              etp11c          11      100000  rs
+Ethernet83      68                              etp11d          11      100000  rs
+Ethernet84      69                              etp11e          11      100000  rs
+Ethernet85      70                              etp11f          11      100000  rs
+Ethernet86      71                              etp11g          11      100000  rs
+Ethernet87      72                              etp11h          11      100000  rs
+Ethernet96      121,122,123,124                 etp13a          13      400000  rs
+Ethernet100     125,126,127,128                 etp13b          13      400000  rs
+Ethernet112     97                              etp15a          15      100000  rs
+Ethernet113     98                              etp15b          15      100000  rs
+Ethernet114     99                              etp15c          15      100000  rs
+Ethernet115     100                             etp15d          15      100000  rs
+Ethernet116     101                             etp15e          15      100000  rs
+Ethernet117     102                             etp15f          15      100000  rs
+Ethernet118     103                             etp15g          15      100000  rs
+Ethernet119     104                             etp15h          15      100000  rs
+Ethernet128     153,154,155,156                 etp17a          17      400000  rs
+Ethernet132     157,158,159,160                 etp17b          17      400000  rs
+Ethernet144     129                             etp19a          19      100000  rs
+Ethernet145     130                             etp19b          19      100000  rs
+Ethernet146     131                             etp19c          19      100000  rs
+Ethernet147     132                             etp19d          19      100000  rs
+Ethernet148     133                             etp19e          19      100000  rs
+Ethernet149     134                             etp19f          19      100000  rs
+Ethernet150     135                             etp19g          19      100000  rs
+Ethernet151     136                             etp19h          19      100000  rs
+Ethernet160     185                             etp21a          21      100000  rs
+Ethernet161     186                             etp21b          21      100000  rs
+Ethernet162     187                             etp21c          21      100000  rs
+Ethernet163     188                             etp21d          21      100000  rs
+Ethernet164     189                             etp21e          21      100000  rs
+Ethernet165     190                             etp21f          21      100000  rs
+Ethernet166     191                             etp21g          21      100000  rs
+Ethernet167     192                             etp21h          21      100000  rs
+Ethernet176     161                             etp23a          23      100000  rs
+Ethernet177     162                             etp23b          23      100000  rs
+Ethernet178     163                             etp23c          23      100000  rs
+Ethernet179     164                             etp23d          23      100000  rs
+Ethernet180     165                             etp23e          23      100000  rs
+Ethernet181     166                             etp23f          23      100000  rs
+Ethernet182     167                             etp23g          23      100000  rs
+Ethernet183     168                             etp23h          23      100000  rs
+Ethernet192     217                             etp25a          25      100000  rs
+Ethernet193     218                             etp25b          25      100000  rs
+Ethernet194     219                             etp25c          25      100000  rs
+Ethernet195     220                             etp25d          25      100000  rs
+Ethernet196     221                             etp25e          25      100000  rs
+Ethernet197     222                             etp25f          25      100000  rs
+Ethernet198     223                             etp25g          25      100000  rs
+Ethernet199     224                             etp25h          25      100000  rs
+Ethernet208     193                             etp27a          27      100000  rs
+Ethernet209     194                             etp27b          27      100000  rs
+Ethernet210     195                             etp27c          27      100000  rs
+Ethernet211     196                             etp27d          27      100000  rs
+Ethernet212     197                             etp27e          27      100000  rs
+Ethernet213     198                             etp27f          27      100000  rs
+Ethernet214     199                             etp27g          27      100000  rs
+Ethernet215     200                             etp27h          27      100000  rs
+Ethernet224     249                             etp29a          29      100000  rs
+Ethernet225     250                             etp29b          29      100000  rs
+Ethernet226     251                             etp29c          29      100000  rs
+Ethernet227     252                             etp29d          29      100000  rs
+Ethernet228     253                             etp29e          29      100000  rs
+Ethernet229     254                             etp29f          29      100000  rs
+Ethernet230     255                             etp29g          29      100000  rs
+Ethernet231     256                             etp29h          29      100000  rs
+Ethernet240     225                             etp31a          31      100000  rs
+Ethernet241     226                             etp31b          31      100000  rs
+Ethernet242     227                             etp31c          31      100000  rs
+Ethernet243     228                             etp31d          31      100000  rs
+Ethernet244     229                             etp31e          31      100000  rs
+Ethernet245     230                             etp31f          31      100000  rs
+Ethernet246     231                             etp31g          31      100000  rs
+Ethernet247     232                             etp31h          31      100000  rs
+Ethernet256     273                             etp33a          33      100000  rs
+Ethernet257     274                             etp33b          33      100000  rs
+Ethernet258     275                             etp33c          33      100000  rs
+Ethernet259     276                             etp33d          33      100000  rs
+Ethernet260     277                             etp33e          33      100000  rs
+Ethernet261     278                             etp33f          33      100000  rs
+Ethernet262     279                             etp33g          33      100000  rs
+Ethernet263     280                             etp33h          33      100000  rs
+Ethernet272     265                             etp35a          35      100000  rs
+Ethernet273     266                             etp35b          35      100000  rs
+Ethernet274     267                             etp35c          35      100000  rs
+Ethernet275     268                             etp35d          35      100000  rs
+Ethernet276     269                             etp35e          35      100000  rs
+Ethernet277     270                             etp35f          35      100000  rs
+Ethernet278     271                             etp35g          35      100000  rs
+Ethernet279     272                             etp35h          35      100000  rs
+Ethernet288     313                             etp37a          37      100000  rs
+Ethernet289     314                             etp37b          37      100000  rs
+Ethernet290     315                             etp37c          37      100000  rs
+Ethernet291     316                             etp37d          37      100000  rs
+Ethernet292     317                             etp37e          37      100000  rs
+Ethernet293     318                             etp37f          37      100000  rs
+Ethernet294     319                             etp37g          37      100000  rs
+Ethernet295     320                             etp37h          37      100000  rs
+Ethernet304     289                             etp39a          39      100000  rs
+Ethernet305     290                             etp39b          39      100000  rs
+Ethernet306     291                             etp39c          39      100000  rs
+Ethernet307     292                             etp39d          39      100000  rs
+Ethernet308     293                             etp39e          39      100000  rs
+Ethernet309     294                             etp39f          39      100000  rs
+Ethernet310     295                             etp39g          39      100000  rs
+Ethernet311     296                             etp39h          39      100000  rs
+Ethernet320     345                             etp41a          41      100000  rs
+Ethernet321     346                             etp41b          41      100000  rs
+Ethernet322     347                             etp41c          41      100000  rs
+Ethernet323     348                             etp41d          41      100000  rs
+Ethernet324     349                             etp41e          41      100000  rs
+Ethernet325     350                             etp41f          41      100000  rs
+Ethernet326     351                             etp41g          41      100000  rs
+Ethernet327     352                             etp41h          41      100000  rs
+Ethernet336     321                             etp43a          43      100000  rs
+Ethernet337     322                             etp43b          43      100000  rs
+Ethernet338     323                             etp43c          43      100000  rs
+Ethernet339     324                             etp43d          43      100000  rs
+Ethernet340     325                             etp43e          43      100000  rs
+Ethernet341     326                             etp43f          43      100000  rs
+Ethernet342     327                             etp43g          43      100000  rs
+Ethernet343     328                             etp43h          43      100000  rs
+Ethernet352     377,378,379,380                 etp45a          45      400000  rs
+Ethernet356     381,382,383,384                 etp45b          45      400000  rs
+Ethernet368     353                             etp47a          47      100000  rs
+Ethernet369     354                             etp47b          47      100000  rs
+Ethernet370     355                             etp47c          47      100000  rs
+Ethernet371     356                             etp47d          47      100000  rs
+Ethernet372     357                             etp47e          47      100000  rs
+Ethernet373     358                             etp47f          47      100000  rs
+Ethernet374     359                             etp47g          47      100000  rs
+Ethernet375     360                             etp47h          47      100000  rs
+Ethernet384     409,410,411,412                 etp49a          49      400000  rs
+Ethernet388     413,414,415,416                 etp49b          49      400000  rs
+Ethernet400     385                             etp51a          51      100000  rs
+Ethernet401     386                             etp51b          51      100000  rs
+Ethernet402     387                             etp51c          51      100000  rs
+Ethernet403     388                             etp51d          51      100000  rs
+Ethernet404     389                             etp51e          51      100000  rs
+Ethernet405     390                             etp51f          51      100000  rs
+Ethernet406     391                             etp51g          51      100000  rs
+Ethernet407     392                             etp51h          51      100000  rs
+Ethernet416     441                             etp53a          53      100000  rs
+Ethernet417     442                             etp53b          53      100000  rs
+Ethernet418     443                             etp53c          53      100000  rs
+Ethernet419     444                             etp53d          53      100000  rs
+Ethernet420     445                             etp53e          53      100000  rs
+Ethernet421     446                             etp53f          53      100000  rs
+Ethernet422     447                             etp53g          53      100000  rs
+Ethernet423     448                             etp53h          53      100000  rs
+Ethernet432     417                             etp55a          55      100000  rs
+Ethernet433     418                             etp55b          55      100000  rs
+Ethernet434     419                             etp55c          55      100000  rs
+Ethernet435     420                             etp55d          55      100000  rs
+Ethernet436     421                             etp55e          55      100000  rs
+Ethernet437     422                             etp55f          55      100000  rs
+Ethernet438     423                             etp55g          55      100000  rs
+Ethernet439     424                             etp55h          55      100000  rs
+Ethernet448     473                             etp57a          57      100000  rs
+Ethernet449     474                             etp57b          57      100000  rs
+Ethernet450     475                             etp57c          57      100000  rs
+Ethernet451     476                             etp57d          57      100000  rs
+Ethernet452     477                             etp57e          57      100000  rs
+Ethernet453     478                             etp57f          57      100000  rs
+Ethernet454     479                             etp57g          57      100000  rs
+Ethernet455     480                             etp57h          57      100000  rs
+Ethernet464     449                             etp59a          59      100000  rs
+Ethernet465     450                             etp59b          59      100000  rs
+Ethernet466     451                             etp59c          59      100000  rs
+Ethernet467     452                             etp59d          59      100000  rs
+Ethernet468     453                             etp59e          59      100000  rs
+Ethernet469     454                             etp59f          59      100000  rs
+Ethernet470     455                             etp59g          59      100000  rs
+Ethernet471     456                             etp59h          59      100000  rs
+Ethernet480     505                             etp61a          61      100000  rs
+Ethernet481     506                             etp61b          61      100000  rs
+Ethernet482     507                             etp61c          61      100000  rs
+Ethernet483     508                             etp61d          61      100000  rs
+Ethernet484     509                             etp61e          61      100000  rs
+Ethernet485     510                             etp61f          61      100000  rs
+Ethernet486     511                             etp61g          61      100000  rs
+Ethernet487     512                             etp61h          61      100000  rs
+Ethernet496     481                             etp63a          63      100000  rs
+Ethernet497     482                             etp63b          63      100000  rs
+Ethernet498     483                             etp63c          63      100000  rs
+Ethernet499     484                             etp63d          63      100000  rs
+Ethernet500     485                             etp63e          63      100000  rs
+Ethernet501     486                             etp63f          63      100000  rs
+Ethernet502     487                             etp63g          63      100000  rs
+Ethernet503     488                             etp63h          63      100000  rs
+Ethernet512     513                             etp65           65      10000   none
+Ethernet513     515                             etp66           66      10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/sai.profile
index 50c136d97b2..48f658a6cb9 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/sai.profile
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/sai.profile
@@ -1 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=256
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm
index c4558cbc11e..de8cc994a29 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm
@@ -42,6 +42,7 @@ bcm_device:
             mmu_init_config: "\"TH5-MSFT-PROD\""
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/port_config.ini
index be2e547eb6c..44e337f65e1 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/port_config.ini
@@ -1,259 +1,259 @@
 # name          lanes                           alias           index   speed   fec
-Ethernet0       17                              Ethernet1/1     1       100000  rs
-Ethernet1       18                              Ethernet1/2     1       100000  rs
-Ethernet2       19                              Ethernet1/3     1       100000  rs
-Ethernet3       20                              Ethernet1/4     1       100000  rs
-Ethernet4       21                              Ethernet1/5     1       100000  rs
-Ethernet5       22                              Ethernet1/6     1       100000  rs
-Ethernet6       23                              Ethernet1/7     1       100000  rs
-Ethernet7       24                              Ethernet1/8     1       100000  rs
-Ethernet16      9                               Ethernet3/1     3       100000  rs
-Ethernet17      10                              Ethernet3/2     3       100000  rs
-Ethernet18      11                              Ethernet3/3     3       100000  rs
-Ethernet19      12                              Ethernet3/4     3       100000  rs
-Ethernet20      13                              Ethernet3/5     3       100000  rs
-Ethernet21      14                              Ethernet3/6     3       100000  rs
-Ethernet22      15                              Ethernet3/7     3       100000  rs
-Ethernet23      16                              Ethernet3/8     3       100000  rs
-Ethernet32      57                              Ethernet5/1     5       100000  rs
-Ethernet33      58                              Ethernet5/2     5       100000  rs
-Ethernet34      59                              Ethernet5/3     5       100000  rs
-Ethernet35      60                              Ethernet5/4     5       100000  rs
-Ethernet36      61                              Ethernet5/5     5       100000  rs
-Ethernet37      62                              Ethernet5/6     5       100000  rs
-Ethernet38      63                              Ethernet5/7     5       100000  rs
-Ethernet39      64                              Ethernet5/8     5       100000  rs
-Ethernet48      33                              Ethernet7/1     7       100000  rs
-Ethernet49      34                              Ethernet7/2     7       100000  rs
-Ethernet50      35                              Ethernet7/3     7       100000  rs
-Ethernet51      36                              Ethernet7/4     7       100000  rs
-Ethernet52      37                              Ethernet7/5     7       100000  rs
-Ethernet53      38                              Ethernet7/6     7       100000  rs
-Ethernet54      39                              Ethernet7/7     7       100000  rs
-Ethernet55      40                              Ethernet7/8     7       100000  rs
-Ethernet64      89                              Ethernet9/1     9       100000  rs
-Ethernet65      90                              Ethernet9/2     9       100000  rs
-Ethernet66      91                              Ethernet9/3     9       100000  rs
-Ethernet67      92                              Ethernet9/4     9       100000  rs
-Ethernet68      93                              Ethernet9/5     9       100000  rs
-Ethernet69      94                              Ethernet9/6     9       100000  rs
-Ethernet70      95                              Ethernet9/7     9       100000  rs
-Ethernet71      96                              Ethernet9/8     9       100000  rs
-Ethernet80      65                              Ethernet11/1    11      100000  rs
-Ethernet81      66                              Ethernet11/2    11      100000  rs
-Ethernet82      67                              Ethernet11/3    11      100000  rs
-Ethernet83      68                              Ethernet11/4    11      100000  rs
-Ethernet84      69                              Ethernet11/5    11      100000  rs
-Ethernet85      70                              Ethernet11/6    11      100000  rs
-Ethernet86      71                              Ethernet11/7    11      100000  rs
-Ethernet87      72                              Ethernet11/8    11      100000  rs
-Ethernet96      121                             Ethernet13/1    13      100000  rs
-Ethernet97      122                             Ethernet13/2    13      100000  rs
-Ethernet98      123                             Ethernet13/3    13      100000  rs
-Ethernet99      124                             Ethernet13/4    13      100000  rs
-Ethernet100     125                             Ethernet13/5    13      100000  rs
-Ethernet101     126                             Ethernet13/6    13      100000  rs
-Ethernet102     127                             Ethernet13/7    13      100000  rs
-Ethernet103     128                             Ethernet13/8    13      100000  rs
-Ethernet112     97                              Ethernet15/1    15      100000  rs
-Ethernet113     98                              Ethernet15/2    15      100000  rs
-Ethernet114     99                              Ethernet15/3    15      100000  rs
-Ethernet115     100                             Ethernet15/4    15      100000  rs
-Ethernet116     101                             Ethernet15/5    15      100000  rs
-Ethernet117     102                             Ethernet15/6    15      100000  rs
-Ethernet118     103                             Ethernet15/7    15      100000  rs
-Ethernet119     104                             Ethernet15/8    15      100000  rs
-Ethernet128     153                             Ethernet17/1    17      100000  rs
-Ethernet129     154                             Ethernet17/2    17      100000  rs
-Ethernet130     155                             Ethernet17/3    17      100000  rs
-Ethernet131     156                             Ethernet17/4    17      100000  rs
-Ethernet132     157                             Ethernet17/5    17      100000  rs
-Ethernet133     158                             Ethernet17/6    17      100000  rs
-Ethernet134     159                             Ethernet17/7    17      100000  rs
-Ethernet135     160                             Ethernet17/8    17      100000  rs
-Ethernet144     129                             Ethernet19/1    19      100000  rs
-Ethernet145     130                             Ethernet19/2    19      100000  rs
-Ethernet146     131                             Ethernet19/3    19      100000  rs
-Ethernet147     132                             Ethernet19/4    19      100000  rs
-Ethernet148     133                             Ethernet19/5    19      100000  rs
-Ethernet149     134                             Ethernet19/6    19      100000  rs
-Ethernet150     135                             Ethernet19/7    19      100000  rs
-Ethernet151     136                             Ethernet19/8    19      100000  rs
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-Ethernet161     186                             Ethernet21/2    21      100000  rs
-Ethernet162     187                             Ethernet21/3    21      100000  rs
-Ethernet163     188                             Ethernet21/4    21      100000  rs
-Ethernet164     189                             Ethernet21/5    21      100000  rs
-Ethernet165     190                             Ethernet21/6    21      100000  rs
-Ethernet166     191                             Ethernet21/7    21      100000  rs
-Ethernet167     192                             Ethernet21/8    21      100000  rs
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-Ethernet177     162                             Ethernet23/2    23      100000  rs
-Ethernet178     163                             Ethernet23/3    23      100000  rs
-Ethernet179     164                             Ethernet23/4    23      100000  rs
-Ethernet180     165                             Ethernet23/5    23      100000  rs
-Ethernet181     166                             Ethernet23/6    23      100000  rs
-Ethernet182     167                             Ethernet23/7    23      100000  rs
-Ethernet183     168                             Ethernet23/8    23      100000  rs
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-Ethernet193     218                             Ethernet25/2    25      100000  rs
-Ethernet194     219                             Ethernet25/3    25      100000  rs
-Ethernet195     220                             Ethernet25/4    25      100000  rs
-Ethernet196     221                             Ethernet25/5    25      100000  rs
-Ethernet197     222                             Ethernet25/6    25      100000  rs
-Ethernet198     223                             Ethernet25/7    25      100000  rs
-Ethernet199     224                             Ethernet25/8    25      100000  rs
-Ethernet208     193                             Ethernet27/1    27      100000  rs
-Ethernet209     194                             Ethernet27/2    27      100000  rs
-Ethernet210     195                             Ethernet27/3    27      100000  rs
-Ethernet211     196                             Ethernet27/4    27      100000  rs
-Ethernet212     197                             Ethernet27/5    27      100000  rs
-Ethernet213     198                             Ethernet27/6    27      100000  rs
-Ethernet214     199                             Ethernet27/7    27      100000  rs
-Ethernet215     200                             Ethernet27/8    27      100000  rs
-Ethernet224     249                             Ethernet29/1    29      100000  rs
-Ethernet225     250                             Ethernet29/2    29      100000  rs
-Ethernet226     251                             Ethernet29/3    29      100000  rs
-Ethernet227     252                             Ethernet29/4    29      100000  rs
-Ethernet228     253                             Ethernet29/5    29      100000  rs
-Ethernet229     254                             Ethernet29/6    29      100000  rs
-Ethernet230     255                             Ethernet29/7    29      100000  rs
-Ethernet231     256                             Ethernet29/8    29      100000  rs
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-Ethernet242     227                             Ethernet31/3    31      100000  rs
-Ethernet243     228                             Ethernet31/4    31      100000  rs
-Ethernet244     229                             Ethernet31/5    31      100000  rs
-Ethernet245     230                             Ethernet31/6    31      100000  rs
-Ethernet246     231                             Ethernet31/7    31      100000  rs
-Ethernet247     232                             Ethernet31/8    31      100000  rs
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-Ethernet258     275                             Ethernet33/3    33      100000  rs
-Ethernet259     276                             Ethernet33/4    33      100000  rs
-Ethernet260     277                             Ethernet33/5    33      100000  rs
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-Ethernet262     279                             Ethernet33/7    33      100000  rs
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-Ethernet273     266                             Ethernet35/2    35      100000  rs
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-Ethernet275     268                             Ethernet35/4    35      100000  rs
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-Ethernet289     314                             Ethernet37/2    37      100000  rs
-Ethernet290     315                             Ethernet37/3    37      100000  rs
-Ethernet291     316                             Ethernet37/4    37      100000  rs
-Ethernet292     317                             Ethernet37/5    37      100000  rs
-Ethernet293     318                             Ethernet37/6    37      100000  rs
-Ethernet294     319                             Ethernet37/7    37      100000  rs
-Ethernet295     320                             Ethernet37/8    37      100000  rs
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-Ethernet305     290                             Ethernet39/2    39      100000  rs
-Ethernet306     291                             Ethernet39/3    39      100000  rs
-Ethernet307     292                             Ethernet39/4    39      100000  rs
-Ethernet308     293                             Ethernet39/5    39      100000  rs
-Ethernet309     294                             Ethernet39/6    39      100000  rs
-Ethernet310     295                             Ethernet39/7    39      100000  rs
-Ethernet311     296                             Ethernet39/8    39      100000  rs
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-Ethernet321     346                             Ethernet41/2    41      100000  rs
-Ethernet322     347                             Ethernet41/3    41      100000  rs
-Ethernet323     348                             Ethernet41/4    41      100000  rs
-Ethernet324     349                             Ethernet41/5    41      100000  rs
-Ethernet325     350                             Ethernet41/6    41      100000  rs
-Ethernet326     351                             Ethernet41/7    41      100000  rs
-Ethernet327     352                             Ethernet41/8    41      100000  rs
-Ethernet336     321                             Ethernet43/1    43      100000  rs
-Ethernet337     322                             Ethernet43/2    43      100000  rs
-Ethernet338     323                             Ethernet43/3    43      100000  rs
-Ethernet339     324                             Ethernet43/4    43      100000  rs
-Ethernet340     325                             Ethernet43/5    43      100000  rs
-Ethernet341     326                             Ethernet43/6    43      100000  rs
-Ethernet342     327                             Ethernet43/7    43      100000  rs
-Ethernet343     328                             Ethernet43/8    43      100000  rs
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-Ethernet353     378                             Ethernet45/2    45      100000  rs
-Ethernet354     379                             Ethernet45/3    45      100000  rs
-Ethernet355     380                             Ethernet45/4    45      100000  rs
-Ethernet356     381                             Ethernet45/5    45      100000  rs
-Ethernet357     382                             Ethernet45/6    45      100000  rs
-Ethernet358     383                             Ethernet45/7    45      100000  rs
-Ethernet359     384                             Ethernet45/8    45      100000  rs
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-Ethernet370     355                             Ethernet47/3    47      100000  rs
-Ethernet371     356                             Ethernet47/4    47      100000  rs
-Ethernet372     357                             Ethernet47/5    47      100000  rs
-Ethernet373     358                             Ethernet47/6    47      100000  rs
-Ethernet374     359                             Ethernet47/7    47      100000  rs
-Ethernet375     360                             Ethernet47/8    47      100000  rs
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-Ethernet385     410                             Ethernet49/2    49      100000  rs
-Ethernet386     411                             Ethernet49/3    49      100000  rs
-Ethernet387     412                             Ethernet49/4    49      100000  rs
-Ethernet388     413                             Ethernet49/5    49      100000  rs
-Ethernet389     414                             Ethernet49/6    49      100000  rs
-Ethernet390     415                             Ethernet49/7    49      100000  rs
-Ethernet391     416                             Ethernet49/8    49      100000  rs
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-Ethernet403     388                             Ethernet51/4    51      100000  rs
-Ethernet404     389                             Ethernet51/5    51      100000  rs
-Ethernet405     390                             Ethernet51/6    51      100000  rs
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-Ethernet407     392                             Ethernet51/8    51      100000  rs
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-Ethernet418     443                             Ethernet53/3    53      100000  rs
-Ethernet419     444                             Ethernet53/4    53      100000  rs
-Ethernet420     445                             Ethernet53/5    53      100000  rs
-Ethernet421     446                             Ethernet53/6    53      100000  rs
-Ethernet422     447                             Ethernet53/7    53      100000  rs
-Ethernet423     448                             Ethernet53/8    53      100000  rs
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-Ethernet435     420                             Ethernet55/4    55      100000  rs
-Ethernet436     421                             Ethernet55/5    55      100000  rs
-Ethernet437     422                             Ethernet55/6    55      100000  rs
-Ethernet438     423                             Ethernet55/7    55      100000  rs
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-Ethernet452     477                             Ethernet57/5    57      100000  rs
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-Ethernet454     479                             Ethernet57/7    57      100000  rs
-Ethernet455     480                             Ethernet57/8    57      100000  rs
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-Ethernet465     450                             Ethernet59/2    59      100000  rs
-Ethernet466     451                             Ethernet59/3    59      100000  rs
-Ethernet467     452                             Ethernet59/4    59      100000  rs
-Ethernet468     453                             Ethernet59/5    59      100000  rs
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-Ethernet483     508                             Ethernet61/4    61      100000  rs
-Ethernet484     509                             Ethernet61/5    61      100000  rs
-Ethernet485     510                             Ethernet61/6    61      100000  rs
-Ethernet486     511                             Ethernet61/7    61      100000  rs
-Ethernet487     512                             Ethernet61/8    61      100000  rs
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-Ethernet501     486                             Ethernet63/6    63      100000  rs
-Ethernet502     487                             Ethernet63/7    63      100000  rs
-Ethernet503     488                             Ethernet63/8    63      100000  rs
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+Ethernet295     320                             etp37h          37      100000  rs
+Ethernet304     289                             etp39a          39      100000  rs
+Ethernet305     290                             etp39b          39      100000  rs
+Ethernet306     291                             etp39c          39      100000  rs
+Ethernet307     292                             etp39d          39      100000  rs
+Ethernet308     293                             etp39e          39      100000  rs
+Ethernet309     294                             etp39f          39      100000  rs
+Ethernet310     295                             etp39g          39      100000  rs
+Ethernet311     296                             etp39h          39      100000  rs
+Ethernet320     345                             etp41a          41      100000  rs
+Ethernet321     346                             etp41b          41      100000  rs
+Ethernet322     347                             etp41c          41      100000  rs
+Ethernet323     348                             etp41d          41      100000  rs
+Ethernet324     349                             etp41e          41      100000  rs
+Ethernet325     350                             etp41f          41      100000  rs
+Ethernet326     351                             etp41g          41      100000  rs
+Ethernet327     352                             etp41h          41      100000  rs
+Ethernet336     321                             etp43a          43      100000  rs
+Ethernet337     322                             etp43b          43      100000  rs
+Ethernet338     323                             etp43c          43      100000  rs
+Ethernet339     324                             etp43d          43      100000  rs
+Ethernet340     325                             etp43e          43      100000  rs
+Ethernet341     326                             etp43f          43      100000  rs
+Ethernet342     327                             etp43g          43      100000  rs
+Ethernet343     328                             etp43h          43      100000  rs
+Ethernet352     377                             etp45a          45      100000  rs
+Ethernet353     378                             etp45b          45      100000  rs
+Ethernet354     379                             etp45c          45      100000  rs
+Ethernet355     380                             etp45d          45      100000  rs
+Ethernet356     381                             etp45e          45      100000  rs
+Ethernet357     382                             etp45f          45      100000  rs
+Ethernet358     383                             etp45g          45      100000  rs
+Ethernet359     384                             etp45h          45      100000  rs
+Ethernet368     353                             etp47a          47      100000  rs
+Ethernet369     354                             etp47b          47      100000  rs
+Ethernet370     355                             etp47c          47      100000  rs
+Ethernet371     356                             etp47d          47      100000  rs
+Ethernet372     357                             etp47e          47      100000  rs
+Ethernet373     358                             etp47f          47      100000  rs
+Ethernet374     359                             etp47g          47      100000  rs
+Ethernet375     360                             etp47h          47      100000  rs
+Ethernet384     409                             etp49a          49      100000  rs
+Ethernet385     410                             etp49b          49      100000  rs
+Ethernet386     411                             etp49c          49      100000  rs
+Ethernet387     412                             etp49d          49      100000  rs
+Ethernet388     413                             etp49e          49      100000  rs
+Ethernet389     414                             etp49f          49      100000  rs
+Ethernet390     415                             etp49g          49      100000  rs
+Ethernet391     416                             etp49h          49      100000  rs
+Ethernet400     385                             etp51a          51      100000  rs
+Ethernet401     386                             etp51b          51      100000  rs
+Ethernet402     387                             etp51c          51      100000  rs
+Ethernet403     388                             etp51d          51      100000  rs
+Ethernet404     389                             etp51e          51      100000  rs
+Ethernet405     390                             etp51f          51      100000  rs
+Ethernet406     391                             etp51g          51      100000  rs
+Ethernet407     392                             etp51h          51      100000  rs
+Ethernet416     441                             etp53a          53      100000  rs
+Ethernet417     442                             etp53b          53      100000  rs
+Ethernet418     443                             etp53c          53      100000  rs
+Ethernet419     444                             etp53d          53      100000  rs
+Ethernet420     445                             etp53e          53      100000  rs
+Ethernet421     446                             etp53f          53      100000  rs
+Ethernet422     447                             etp53g          53      100000  rs
+Ethernet423     448                             etp53h          53      100000  rs
+Ethernet432     417                             etp55a          55      100000  rs
+Ethernet433     418                             etp55b          55      100000  rs
+Ethernet434     419                             etp55c          55      100000  rs
+Ethernet435     420                             etp55d          55      100000  rs
+Ethernet436     421                             etp55e          55      100000  rs
+Ethernet437     422                             etp55f          55      100000  rs
+Ethernet438     423                             etp55g          55      100000  rs
+Ethernet439     424                             etp55h          55      100000  rs
+Ethernet448     473                             etp57a          57      100000  rs
+Ethernet449     474                             etp57b          57      100000  rs
+Ethernet450     475                             etp57c          57      100000  rs
+Ethernet451     476                             etp57d          57      100000  rs
+Ethernet452     477                             etp57e          57      100000  rs
+Ethernet453     478                             etp57f          57      100000  rs
+Ethernet454     479                             etp57g          57      100000  rs
+Ethernet455     480                             etp57h          57      100000  rs
+Ethernet464     449                             etp59a          59      100000  rs
+Ethernet465     450                             etp59b          59      100000  rs
+Ethernet466     451                             etp59c          59      100000  rs
+Ethernet467     452                             etp59d          59      100000  rs
+Ethernet468     453                             etp59e          59      100000  rs
+Ethernet469     454                             etp59f          59      100000  rs
+Ethernet470     455                             etp59g          59      100000  rs
+Ethernet471     456                             etp59h          59      100000  rs
+Ethernet480     505                             etp61a          61      100000  rs
+Ethernet481     506                             etp61b          61      100000  rs
+Ethernet482     507                             etp61c          61      100000  rs
+Ethernet483     508                             etp61d          61      100000  rs
+Ethernet484     509                             etp61e          61      100000  rs
+Ethernet485     510                             etp61f          61      100000  rs
+Ethernet486     511                             etp61g          61      100000  rs
+Ethernet487     512                             etp61h          61      100000  rs
+Ethernet496     481                             etp63a          63      100000  rs
+Ethernet497     482                             etp63b          63      100000  rs
+Ethernet498     483                             etp63c          63      100000  rs
+Ethernet499     484                             etp63d          63      100000  rs
+Ethernet500     485                             etp63e          63      100000  rs
+Ethernet501     486                             etp63f          63      100000  rs
+Ethernet502     487                             etp63g          63      100000  rs
+Ethernet503     488                             etp63h          63      100000  rs
+Ethernet512     513                             etp65           65      10000   none
+Ethernet513     515                             etp66           66      10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/sai.profile
index 50c136d97b2..48f658a6cb9 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/sai.profile
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/sai.profile
@@ -1 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=256
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm
index a26072725f6..b51dbdec15d 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm
@@ -42,6 +42,7 @@ bcm_device:
             mmu_init_config: "\"TH5-MSFT-PROD\""
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128
new file mode 120000
index 00000000000..f8a09a901cd
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128
@@ -0,0 +1 @@
+Arista-7060X6-64PE-O128S2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/BALANCED
deleted file mode 120000
index afd21766cc6..00000000000
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/BALANCED
+++ /dev/null
@@ -1 +0,0 @@
-../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_lt2.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_lt2.j2
new file mode 120000
index 00000000000..87beca2e1d5
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_lt2.j2
@@ -0,0 +1 @@
+../Arista-7060X6-64PE/BALANCED/buffers_defaults_lt2.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t0.j2
deleted file mode 120000
index 9524e6a476a..00000000000
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t0.j2
+++ /dev/null
@@ -1 +0,0 @@
-BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t0.j2
new file mode 100644
index 00000000000..6b79dab4583
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "166115492",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "29423360"
+        },
+        "egress_lossless_pool": {
+            "size": "166115492",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "167546528"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "167546528"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t1.j2
deleted file mode 120000
index c25cc95d6d5..00000000000
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t1.j2
+++ /dev/null
@@ -1 +0,0 @@
-BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..6b79dab4583
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "166115492",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "29423360"
+        },
+        "egress_lossless_pool": {
+            "size": "166115492",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "167546528"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "167546528"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/pg_profile_lookup.ini
deleted file mode 120000
index 297cddb2d22..00000000000
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/pg_profile_lookup.ini
+++ /dev/null
@@ -1 +0,0 @@
-BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/pg_profile_lookup.ini
new file mode 100644
index 00000000000..ccc68e17c8a
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/pg_profile_lookup.ini
@@ -0,0 +1,5 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff    threshold xon_offset
+400000  5m    18796   0    612140  0         3556
+400000  40m   18796   0    612140  0         3556
+400000  150m  18796   0    612140  0         3556
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/port_config.ini
index 68f871ff6a1..7b86ebe71a0 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/port_config.ini
@@ -1,131 +1,131 @@
 # name       lanes                            alias         index  speed   fec
-Ethernet0    17,18,19,20                      Ethernet1/1   1      400000  rs
-Ethernet4    21,22,23,24                      Ethernet1/5   1      400000  rs
-Ethernet8    1,2,3,4                          Ethernet2/1   2      400000  rs
-Ethernet12   5,6,7,8                          Ethernet2/5   2      400000  rs
-Ethernet16   9,10,11,12                       Ethernet3/1   3      400000  rs
-Ethernet20   13,14,15,16                      Ethernet3/5   3      400000  rs
-Ethernet24   25,26,27,28                      Ethernet4/1   4      400000  rs
-Ethernet28   29,30,31,32                      Ethernet4/5   4      400000  rs
-Ethernet32   57,58,59,60                      Ethernet5/1   5      400000  rs
-Ethernet36   61,62,63,64                      Ethernet5/5   5      400000  rs
-Ethernet40   41,42,43,44                      Ethernet6/1   6      400000  rs
-Ethernet44   45,46,47,48                      Ethernet6/5   6      400000  rs
-Ethernet48   33,34,35,36                      Ethernet7/1   7      400000  rs
-Ethernet52   37,38,39,40                      Ethernet7/5   7      400000  rs
-Ethernet56   49,50,51,52                      Ethernet8/1   8      400000  rs
-Ethernet60   53,54,55,56                      Ethernet8/5   8      400000  rs
-Ethernet64   89,90,91,92                      Ethernet9/1   9      400000  rs
-Ethernet68   93,94,95,96                      Ethernet9/5   9      400000  rs
-Ethernet72   73,74,75,76                      Ethernet10/1  10     400000  rs
-Ethernet76   77,78,79,80                      Ethernet10/5  10     400000  rs
-Ethernet80   65,66,67,68                      Ethernet11/1  11     400000  rs
-Ethernet84   69,70,71,72                      Ethernet11/5  11     400000  rs
-Ethernet88   81,82,83,84                      Ethernet12/1  12     400000  rs
-Ethernet92   85,86,87,88                      Ethernet12/5  12     400000  rs
-Ethernet96   121,122,123,124                  Ethernet13/1  13     400000  rs
-Ethernet100  125,126,127,128                  Ethernet13/5  13     400000  rs
-Ethernet104  105,106,107,108                  Ethernet14/1  14     400000  rs
-Ethernet108  109,110,111,112                  Ethernet14/5  14     400000  rs
-Ethernet112  97,98,99,100                     Ethernet15/1  15     400000  rs
-Ethernet116  101,102,103,104                  Ethernet15/5  15     400000  rs
-Ethernet120  113,114,115,116                  Ethernet16/1  16     400000  rs
-Ethernet124  117,118,119,120                  Ethernet16/5  16     400000  rs
-Ethernet128  153,154,155,156                  Ethernet17/1  17     400000  rs
-Ethernet132  157,158,159,160                  Ethernet17/5  17     400000  rs
-Ethernet136  137,138,139,140                  Ethernet18/1  18     400000  rs
-Ethernet140  141,142,143,144                  Ethernet18/5  18     400000  rs
-Ethernet144  129,130,131,132                  Ethernet19/1  19     400000  rs
-Ethernet148  133,134,135,136                  Ethernet19/5  19     400000  rs
-Ethernet152  145,146,147,148                  Ethernet20/1  20     400000  rs
-Ethernet156  149,150,151,152                  Ethernet20/5  20     400000  rs
-Ethernet160  185,186,187,188                  Ethernet21/1  21     400000  rs
-Ethernet164  189,190,191,192                  Ethernet21/5  21     400000  rs
-Ethernet168  169,170,171,172                  Ethernet22/1  22     400000  rs
-Ethernet172  173,174,175,176                  Ethernet22/5  22     400000  rs
-Ethernet176  161,162,163,164                  Ethernet23/1  23     400000  rs
-Ethernet180  165,166,167,168                  Ethernet23/5  23     400000  rs
-Ethernet184  177,178,179,180                  Ethernet24/1  24     400000  rs
-Ethernet188  181,182,183,184                  Ethernet24/5  24     400000  rs
-Ethernet192  217,218,219,220                  Ethernet25/1  25     400000  rs
-Ethernet196  221,222,223,224                  Ethernet25/5  25     400000  rs
-Ethernet200  201,202,203,204                  Ethernet26/1  26     400000  rs
-Ethernet204  205,206,207,208                  Ethernet26/5  26     400000  rs
-Ethernet208  193,194,195,196                  Ethernet27/1  27     400000  rs
-Ethernet212  197,198,199,200                  Ethernet27/5  27     400000  rs
-Ethernet216  209,210,211,212                  Ethernet28/1  28     400000  rs
-Ethernet220  213,214,215,216                  Ethernet28/5  28     400000  rs
-Ethernet224  249,250,251,252                  Ethernet29/1  29     400000  rs
-Ethernet228  253,254,255,256                  Ethernet29/5  29     400000  rs
-Ethernet232  233,234,235,236                  Ethernet30/1  30     400000  rs
-Ethernet236  237,238,239,240                  Ethernet30/5  30     400000  rs
-Ethernet240  225,226,227,228                  Ethernet31/1  31     400000  rs
-Ethernet244  229,230,231,232                  Ethernet31/5  31     400000  rs
-Ethernet248  241,242,243,244                  Ethernet32/1  32     400000  rs
-Ethernet252  245,246,247,248                  Ethernet32/5  32     400000  rs
-Ethernet256  273,274,275,276                  Ethernet33/1  33     400000  rs
-Ethernet260  277,278,279,280                  Ethernet33/5  33     400000  rs
-Ethernet264  257,258,259,260                  Ethernet34/1  34     400000  rs
-Ethernet268  261,262,263,264                  Ethernet34/5  34     400000  rs
-Ethernet272  265,266,267,268                  Ethernet35/1  35     400000  rs
-Ethernet276  269,270,271,272                  Ethernet35/5  35     400000  rs
-Ethernet280  281,282,283,284                  Ethernet36/1  36     400000  rs
-Ethernet284  285,286,287,288                  Ethernet36/5  36     400000  rs
-Ethernet288  313,314,315,316                  Ethernet37/1  37     400000  rs
-Ethernet292  317,318,319,320                  Ethernet37/5  37     400000  rs
-Ethernet296  297,298,299,300                  Ethernet38/1  38     400000  rs
-Ethernet300  301,302,303,304                  Ethernet38/5  38     400000  rs
-Ethernet304  289,290,291,292                  Ethernet39/1  39     400000  rs
-Ethernet308  293,294,295,296                  Ethernet39/5  39     400000  rs
-Ethernet312  305,306,307,308                  Ethernet40/1  40     400000  rs
-Ethernet316  309,310,311,312                  Ethernet40/5  40     400000  rs
-Ethernet320  345,346,347,348                  Ethernet41/1  41     400000  rs
-Ethernet324  349,350,351,352                  Ethernet41/5  41     400000  rs
-Ethernet328  329,330,331,332                  Ethernet42/1  42     400000  rs
-Ethernet332  333,334,335,336                  Ethernet42/5  42     400000  rs
-Ethernet336  321,322,323,324                  Ethernet43/1  43     400000  rs
-Ethernet340  325,326,327,328                  Ethernet43/5  43     400000  rs
-Ethernet344  337,338,339,340                  Ethernet44/1  44     400000  rs
-Ethernet348  341,342,343,344                  Ethernet44/5  44     400000  rs
-Ethernet352  377,378,379,380                  Ethernet45/1  45     400000  rs
-Ethernet356  381,382,383,384                  Ethernet45/5  45     400000  rs
-Ethernet360  361,362,363,364                  Ethernet46/1  46     400000  rs
-Ethernet364  365,366,367,368                  Ethernet46/5  46     400000  rs
-Ethernet368  353,354,355,356                  Ethernet47/1  47     400000  rs
-Ethernet372  357,358,359,360                  Ethernet47/5  47     400000  rs
-Ethernet376  369,370,371,372                  Ethernet48/1  48     400000  rs
-Ethernet380  373,374,375,376                  Ethernet48/5  48     400000  rs
-Ethernet384  409,410,411,412                  Ethernet49/1  49     400000  rs
-Ethernet388  413,414,415,416                  Ethernet49/5  49     400000  rs
-Ethernet392  393,394,395,396                  Ethernet50/1  50     400000  rs
-Ethernet396  397,398,399,400                  Ethernet50/5  50     400000  rs
-Ethernet400  385,386,387,388                  Ethernet51/1  51     400000  rs
-Ethernet404  389,390,391,392                  Ethernet51/5  51     400000  rs
-Ethernet408  401,402,403,404                  Ethernet52/1  52     400000  rs
-Ethernet412  405,406,407,408                  Ethernet52/5  52     400000  rs
-Ethernet416  441,442,443,444                  Ethernet53/1  53     400000  rs
-Ethernet420  445,446,447,448                  Ethernet53/5  53     400000  rs
-Ethernet424  425,426,427,428                  Ethernet54/1  54     400000  rs
-Ethernet428  429,430,431,432                  Ethernet54/5  54     400000  rs
-Ethernet432  417,418,419,420                  Ethernet55/1  55     400000  rs
-Ethernet436  421,422,423,424                  Ethernet55/5  55     400000  rs
-Ethernet440  433,434,435,436                  Ethernet56/1  56     400000  rs
-Ethernet444  437,438,439,440                  Ethernet56/5  56     400000  rs
-Ethernet448  473,474,475,476                  Ethernet57/1  57     400000  rs
-Ethernet452  477,478,479,480                  Ethernet57/5  57     400000  rs
-Ethernet456  457,458,459,460                  Ethernet58/1  58     400000  rs
-Ethernet460  461,462,463,464                  Ethernet58/5  58     400000  rs
-Ethernet464  449,450,451,452                  Ethernet59/1  59     400000  rs
-Ethernet468  453,454,455,456                  Ethernet59/5  59     400000  rs
-Ethernet472  465,466,467,468                  Ethernet60/1  60     400000  rs
-Ethernet476  469,470,471,472                  Ethernet60/5  60     400000  rs
-Ethernet480  505,506,507,508                  Ethernet61/1  61     400000  rs
-Ethernet484  509,510,511,512                  Ethernet61/5  61     400000  rs
-Ethernet488  489,490,491,492                  Ethernet62/1  62     400000  rs
-Ethernet492  493,494,495,496                  Ethernet62/5  62     400000  rs
-Ethernet496  481,482,483,484                  Ethernet63/1  63     400000  rs
-Ethernet500  485,486,487,488                  Ethernet63/5  63     400000  rs
-Ethernet504  497,498,499,500                  Ethernet64/1  64     400000  rs
-Ethernet508  501,502,503,504                  Ethernet64/5  64     400000  rs
-Ethernet512  513                              Ethernet65    65     10000   none
-Ethernet513  515                              Ethernet66    66     10000   none
+Ethernet0    17,18,19,20                      etp1a         1      400000  rs
+Ethernet4    21,22,23,24                      etp1b         1      400000  rs
+Ethernet8    1,2,3,4                          etp2a         2      400000  rs
+Ethernet12   5,6,7,8                          etp2b         2      400000  rs
+Ethernet16   9,10,11,12                       etp3a         3      400000  rs
+Ethernet20   13,14,15,16                      etp3b         3      400000  rs
+Ethernet24   25,26,27,28                      etp4a         4      400000  rs
+Ethernet28   29,30,31,32                      etp4b         4      400000  rs
+Ethernet32   57,58,59,60                      etp5a         5      400000  rs
+Ethernet36   61,62,63,64                      etp5b         5      400000  rs
+Ethernet40   41,42,43,44                      etp6a         6      400000  rs
+Ethernet44   45,46,47,48                      etp6b         6      400000  rs
+Ethernet48   33,34,35,36                      etp7a         7      400000  rs
+Ethernet52   37,38,39,40                      etp7b         7      400000  rs
+Ethernet56   49,50,51,52                      etp8a         8      400000  rs
+Ethernet60   53,54,55,56                      etp8b         8      400000  rs
+Ethernet64   89,90,91,92                      etp9a         9      400000  rs
+Ethernet68   93,94,95,96                      etp9b         9      400000  rs
+Ethernet72   73,74,75,76                      etp10a        10     400000  rs
+Ethernet76   77,78,79,80                      etp10b        10     400000  rs
+Ethernet80   65,66,67,68                      etp11a        11     400000  rs
+Ethernet84   69,70,71,72                      etp11b        11     400000  rs
+Ethernet88   81,82,83,84                      etp12a        12     400000  rs
+Ethernet92   85,86,87,88                      etp12b        12     400000  rs
+Ethernet96   121,122,123,124                  etp13a        13     400000  rs
+Ethernet100  125,126,127,128                  etp13b        13     400000  rs
+Ethernet104  105,106,107,108                  etp14a        14     400000  rs
+Ethernet108  109,110,111,112                  etp14b        14     400000  rs
+Ethernet112  97,98,99,100                     etp15a        15     400000  rs
+Ethernet116  101,102,103,104                  etp15b        15     400000  rs
+Ethernet120  113,114,115,116                  etp16a        16     400000  rs
+Ethernet124  117,118,119,120                  etp16b        16     400000  rs
+Ethernet128  153,154,155,156                  etp17a        17     400000  rs
+Ethernet132  157,158,159,160                  etp17b        17     400000  rs
+Ethernet136  137,138,139,140                  etp18a        18     400000  rs
+Ethernet140  141,142,143,144                  etp18b        18     400000  rs
+Ethernet144  129,130,131,132                  etp19a        19     400000  rs
+Ethernet148  133,134,135,136                  etp19b        19     400000  rs
+Ethernet152  145,146,147,148                  etp20a        20     400000  rs
+Ethernet156  149,150,151,152                  etp20b        20     400000  rs
+Ethernet160  185,186,187,188                  etp21a        21     400000  rs
+Ethernet164  189,190,191,192                  etp21b        21     400000  rs
+Ethernet168  169,170,171,172                  etp22a        22     400000  rs
+Ethernet172  173,174,175,176                  etp22b        22     400000  rs
+Ethernet176  161,162,163,164                  etp23a        23     400000  rs
+Ethernet180  165,166,167,168                  etp23b        23     400000  rs
+Ethernet184  177,178,179,180                  etp24a        24     400000  rs
+Ethernet188  181,182,183,184                  etp24b        24     400000  rs
+Ethernet192  217,218,219,220                  etp25a        25     400000  rs
+Ethernet196  221,222,223,224                  etp25b        25     400000  rs
+Ethernet200  201,202,203,204                  etp26a        26     400000  rs
+Ethernet204  205,206,207,208                  etp26b        26     400000  rs
+Ethernet208  193,194,195,196                  etp27a        27     400000  rs
+Ethernet212  197,198,199,200                  etp27b        27     400000  rs
+Ethernet216  209,210,211,212                  etp28a        28     400000  rs
+Ethernet220  213,214,215,216                  etp28b        28     400000  rs
+Ethernet224  249,250,251,252                  etp29a        29     400000  rs
+Ethernet228  253,254,255,256                  etp29b        29     400000  rs
+Ethernet232  233,234,235,236                  etp30a        30     400000  rs
+Ethernet236  237,238,239,240                  etp30b        30     400000  rs
+Ethernet240  225,226,227,228                  etp31a        31     400000  rs
+Ethernet244  229,230,231,232                  etp31b        31     400000  rs
+Ethernet248  241,242,243,244                  etp32a        32     400000  rs
+Ethernet252  245,246,247,248                  etp32b        32     400000  rs
+Ethernet256  273,274,275,276                  etp33a        33     400000  rs
+Ethernet260  277,278,279,280                  etp33b        33     400000  rs
+Ethernet264  257,258,259,260                  etp34a        34     400000  rs
+Ethernet268  261,262,263,264                  etp34b        34     400000  rs
+Ethernet272  265,266,267,268                  etp35a        35     400000  rs
+Ethernet276  269,270,271,272                  etp35b        35     400000  rs
+Ethernet280  281,282,283,284                  etp36a        36     400000  rs
+Ethernet284  285,286,287,288                  etp36b        36     400000  rs
+Ethernet288  313,314,315,316                  etp37a        37     400000  rs
+Ethernet292  317,318,319,320                  etp37b        37     400000  rs
+Ethernet296  297,298,299,300                  etp38a        38     400000  rs
+Ethernet300  301,302,303,304                  etp38b        38     400000  rs
+Ethernet304  289,290,291,292                  etp39a        39     400000  rs
+Ethernet308  293,294,295,296                  etp39b        39     400000  rs
+Ethernet312  305,306,307,308                  etp40a        40     400000  rs
+Ethernet316  309,310,311,312                  etp40b        40     400000  rs
+Ethernet320  345,346,347,348                  etp41a        41     400000  rs
+Ethernet324  349,350,351,352                  etp41b        41     400000  rs
+Ethernet328  329,330,331,332                  etp42a        42     400000  rs
+Ethernet332  333,334,335,336                  etp42b        42     400000  rs
+Ethernet336  321,322,323,324                  etp43a        43     400000  rs
+Ethernet340  325,326,327,328                  etp43b        43     400000  rs
+Ethernet344  337,338,339,340                  etp44a        44     400000  rs
+Ethernet348  341,342,343,344                  etp44b        44     400000  rs
+Ethernet352  377,378,379,380                  etp45a        45     400000  rs
+Ethernet356  381,382,383,384                  etp45b        45     400000  rs
+Ethernet360  361,362,363,364                  etp46a        46     400000  rs
+Ethernet364  365,366,367,368                  etp46b        46     400000  rs
+Ethernet368  353,354,355,356                  etp47a        47     400000  rs
+Ethernet372  357,358,359,360                  etp47b        47     400000  rs
+Ethernet376  369,370,371,372                  etp48a        48     400000  rs
+Ethernet380  373,374,375,376                  etp48b        48     400000  rs
+Ethernet384  409,410,411,412                  etp49a        49     400000  rs
+Ethernet388  413,414,415,416                  etp49b        49     400000  rs
+Ethernet392  393,394,395,396                  etp50a        50     400000  rs
+Ethernet396  397,398,399,400                  etp50b        50     400000  rs
+Ethernet400  385,386,387,388                  etp51a        51     400000  rs
+Ethernet404  389,390,391,392                  etp51b        51     400000  rs
+Ethernet408  401,402,403,404                  etp52a        52     400000  rs
+Ethernet412  405,406,407,408                  etp52b        52     400000  rs
+Ethernet416  441,442,443,444                  etp53a        53     400000  rs
+Ethernet420  445,446,447,448                  etp53b        53     400000  rs
+Ethernet424  425,426,427,428                  etp54a        54     400000  rs
+Ethernet428  429,430,431,432                  etp54b        54     400000  rs
+Ethernet432  417,418,419,420                  etp55a        55     400000  rs
+Ethernet436  421,422,423,424                  etp55b        55     400000  rs
+Ethernet440  433,434,435,436                  etp56a        56     400000  rs
+Ethernet444  437,438,439,440                  etp56b        56     400000  rs
+Ethernet448  473,474,475,476                  etp57a        57     400000  rs
+Ethernet452  477,478,479,480                  etp57b        57     400000  rs
+Ethernet456  457,458,459,460                  etp58a        58     400000  rs
+Ethernet460  461,462,463,464                  etp58b        58     400000  rs
+Ethernet464  449,450,451,452                  etp59a        59     400000  rs
+Ethernet468  453,454,455,456                  etp59b        59     400000  rs
+Ethernet472  465,466,467,468                  etp60a        60     400000  rs
+Ethernet476  469,470,471,472                  etp60b        60     400000  rs
+Ethernet480  505,506,507,508                  etp61a        61     400000  rs
+Ethernet484  509,510,511,512                  etp61b        61     400000  rs
+Ethernet488  489,490,491,492                  etp62a        62     400000  rs
+Ethernet492  493,494,495,496                  etp62b        62     400000  rs
+Ethernet496  481,482,483,484                  etp63a        63     400000  rs
+Ethernet500  485,486,487,488                  etp63b        63     400000  rs
+Ethernet504  497,498,499,500                  etp64a        64     400000  rs
+Ethernet508  501,502,503,504                  etp64b        64     400000  rs
+Ethernet512  513                              etp65         65     10000   none
+Ethernet513  515                              etp66         66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/qos.json.j2
index 3e548325ea3..00fa61ee0c8 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/qos.json.j2
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/qos.json.j2
@@ -1 +1,161 @@
+{%- macro generate_dscp_to_tc_map_per_sku() -%}
+    "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "0",
+            "1" : "0",
+            "2" : "0",
+            "3" : "3",
+            "4" : "4",
+            "5" : "0",
+            "6" : "0",
+            "7" : "0",
+            "8" : "0",
+            "9" : "0",
+            "10": "0",
+            "11": "0",
+            "12": "0",
+            "13": "0",
+            "14": "0",
+            "15": "0",
+            "16": "0",
+            "17": "0",
+            "18": "0",
+            "19": "0",
+            "20": "0",
+            "21": "0",
+            "22": "0",
+            "23": "0",
+            "24": "0",
+            "25": "0",
+            "26": "0",
+            "27": "0",
+            "28": "0",
+            "29": "0",
+            "30": "0",
+            "31": "0",
+            "32": "0",
+            "33": "0",
+            "34": "0",
+            "35": "0",
+            "36": "0",
+            "37": "0",
+            "38": "0",
+            "39": "0",
+            "40": "0",
+            "41": "0",
+            "42": "0",
+            "43": "0",
+            "44": "6",
+            "45": "0",
+            "46": "5",
+            "47": "1",
+            "48": "0",
+            "49": "0",
+            "50": "0",
+            "51": "0",
+            "52": "0",
+            "53": "0",
+            "54": "0",
+            "55": "0",
+            "56": "0",
+            "57": "0",
+            "58": "0",
+            "59": "0",
+            "60": "0",
+            "61": "0",
+            "62": "0",
+            "63": "0"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_scheduler_per_sku() -%}
+    "SCHEDULER": {
+        "SCHEDULER_Q1": {
+            "type"  : "DWRR",
+            "weight": "10"
+        },
+        "SCHEDULER_Q3": {
+            "type"  : "DWRR",
+            "weight": "20"
+        },
+        "SCHEDULER_Q4": {
+            "type"  : "DWRR",
+            "weight": "10"
+        },
+        "SCHEDULER_Q6": {
+            "type"  : "DWRR",
+            "weight": "70"
+        },
+        "SCHEDULER_DEFAULT": {
+            "type"  : "DWRR",
+            "weight": "10"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_single_queue_per_sku(port) -%}
+        "{{ port }}|0": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|1": {
+            "scheduler": "SCHEDULER_Q1"
+        },
+        "{{ port }}|2": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|3": {
+            "scheduler": "SCHEDULER_Q3",
+            "wred_profile": "WRED_LOSSLESS_Q3"
+        },
+        "{{ port }}|4": {
+            "scheduler": "SCHEDULER_Q4",
+            "wred_profile": "WRED_LOSSLESS_Q4"
+        },
+        "{{ port }}|5": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|6": {
+            "scheduler": "SCHEDULER_Q6"
+        },
+        "{{ port }}|7": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        }
+{%- endmacro -%}
+
+{%- macro generate_wred_profiles() -%}
+    "WRED_PROFILE": {
+        "WRED_LOSSLESS_Q3": {
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "262144",
+            "green_min_threshold": "131072",
+            "red_drop_probability": "5",
+            "red_max_threshold": "262144",
+            "red_min_threshold": "131072",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "262144",
+            "yellow_min_threshold": "131072"
+        },
+        "WRED_LOSSLESS_Q4": {
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "262144",
+            "green_min_threshold": "131072",
+            "red_drop_probability": "5",
+            "red_max_threshold": "262144",
+            "red_min_threshold": "131072",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "262144",
+            "yellow_min_threshold": "131072"
+        }
+    },
+{%- endmacro -%}
+
 {%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/sai.profile
index 50c136d97b2..9425d421d2d 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/sai.profile
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/sai.profile
@@ -1 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=128
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/th5-a7060x6-64pe.config.bcm
index d4af799ff79..d33dcdf6340 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/th5-a7060x6-64pe.config.bcm
@@ -36,12 +36,14 @@ bcm_device:
             sai_feat_tail_timestamp : 1
             sai_port_phy_time_sync_en : 1
             sai_field_group_auto_prioritize: 1
+            sai_mmu_custom_config : 1
             #l3_intf_vlan_split_egress for MTU at L3IF
             l3_intf_vlan_split_egress : 1
             pfc_deadlock_seq_control : 1
             sai_tunnel_support: 2
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
@@ -1425,3 +1427,1146 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
+### Baseline
+# Skipping buffer reservation. This means that don't use SDK default setings.
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            MIRROR_ON_DROP_RESERVATION: 0
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+
+...
+# Initialize the various thresholds to zero
+---
+# Ingress service pool level initialization
+device:
+    0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+
+        # Ingress headroom pool
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+
+        # PFC generation: Priority group(s)
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        # Egress multicast CQE pool
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+
+...
+# Per Port Registers
+# Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                # Pause enable bit,
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+               PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+...
+# Output Port Thresholds -2
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+
+...
+### Begin MMU ingress threshold settings
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 255127
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 57920
+
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [76, 274]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+
+...
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 329816
+                RESUME_LIMIT_CELLS: 329816
+
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 2410
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 2410
+            ?
+                PORT_ID: [76, 274]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+
+...
+### Egress Service Pools
+---
+device:
+    0:
+# Setting Q group limit to 0
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 255127
+                SHARED_RESUME_LIMIT_CELLS: 31881
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 23919
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 23909
+                RED_SHARED_LIMIT_CELLS: 19932
+                RED_SHARED_RESUME_LIMIT_CELLS: 19922
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19538
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_RESUME_LIMIT_CELLS: 2432
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1832
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1822
+                RED_SHARED_LIMIT_CELLS: 1527
+                RED_SHARED_RESUME_LIMIT_CELLS: 1517
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+
+...
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [0,1,2,5,6]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+
+# Egress Port Thresholds.
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 19931
+                YELLOW_SHARED_LIMIT_CELLS: 23918
+                SHARED_LIMIT_CELLS: 255127
+                RED_SHARED_RESUME_LIMIT_CELLS: 19929
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 23916
+                SHARED_RESUME_LIMIT_CELLS: 31889
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1526
+                YELLOW_SHARED_LIMIT_CELLS: 1831
+                SHARED_LIMIT_CELLS: 19538
+                RED_SHARED_RESUME_LIMIT_CELLS: 1524
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1829
+                SHARED_RESUME_LIMIT_CELLS: 2440
+            ?
+                PORT_ID: [[0,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+...
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,4], [11,14], [21,25], [33,36], [43,47], [55,58], [65,69], [76,80], [87,91], [99,102], [109,113], [121,124], [131,135], [143,146], [153,157], [165,168], [175,179], [187,190], [197,201], [209,212], [219,223], [231,234], [241,245], [253,256], [263,267], [274,278], [285,289], [297,300], [307,311], [319,322], [329,333], [341,344], 351]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 3051
+                SHARED_RESUME_LIMIT_PKTS: 3037
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2288
+                RED_SHARED_LIMIT_PKTS: 1906
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2274
+                RED_SHARED_RESUME_LIMIT_PKTS: 1892
+
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,4], [44,47], [88,91], [132,135], [176,179], [220,223], [264,267], [308,311]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[11,14], [22,25], [33,36], [55,58], [66,69], [77,80], [99,102], [110,113], [121,124], [143,146], [154,157], [165,168], [187,190], [198,201], [209,212], [231,234], [242,245], [253,256], [275,278], [286,289], [297,300], [319,322], [330,333], [341,344]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+...
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/BALANCED
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-COPPER-LAB/BALANCED
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/BALANCED
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffer_ports.j2
new file mode 100644
index 00000000000..725347049cf
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers.json.j2
new file mode 100644
index 00000000000..6dfe806d8aa
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 'lt2' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers_defaults_lt2.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers_defaults_lt2.j2
new file mode 120000
index 00000000000..056eb8c1386
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers_defaults_lt2.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_lt2.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers_defaults_t0.j2
new file mode 120000
index 00000000000..9524e6a476a
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers_defaults_t1.j2
new file mode 120000
index 00000000000..c25cc95d6d5
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/hwsku.json
new file mode 100644
index 00000000000..d4c4d4aa8d9
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/hwsku.json
@@ -0,0 +1,202 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/pg_profile_lookup.ini
new file mode 120000
index 00000000000..297cddb2d22
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/port_config.ini
new file mode 100644
index 00000000000..8b2bd0b3959
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/port_config.ini
@@ -0,0 +1,99 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    17,18,19,20,21,22,23,24          etp1          1      800000  rs
+Ethernet8    1,2,3,4,5,6,7,8                  etp2          2      800000  rs
+Ethernet16   9,10,11,12,13,14,15,16           etp3          3      800000  rs
+Ethernet24   25,26,27,28,29,30,31,32          etp4          4      800000  rs
+Ethernet32   57,58,59,60,61,62,63,64          etp5          5      800000  rs
+Ethernet40   41,42,43,44,45,46,47,48          etp6          6      800000  rs
+Ethernet48   33,34,35,36,37,38,39,40          etp7          7      800000  rs
+Ethernet56   49,50,51,52,53,54,55,56          etp8          8      800000  rs
+Ethernet64   89,90,91,92,93,94,95,96          etp9          9      800000  rs
+Ethernet72   73,74,75,76,77,78,79,80          etp10         10     800000  rs
+Ethernet80   65,66,67,68,69,70,71,72          etp11         11     800000  rs
+Ethernet88   81,82,83,84,85,86,87,88          etp12         12     800000  rs
+Ethernet96   121,122,123,124,125,126,127,128  etp13         13     800000  rs
+Ethernet104  105,106,107,108,109,110,111,112  etp14         14     800000  rs
+Ethernet112  97,98,99,100,101,102,103,104     etp15         15     800000  rs
+Ethernet120  113,114,115,116,117,118,119,120  etp16         16     800000  rs
+Ethernet128  153,154,155,156,157,158,159,160  etp17         17     800000  rs
+Ethernet136  137,138,139,140,141,142,143,144  etp18         18     800000  rs
+Ethernet144  129,130,131,132,133,134,135,136  etp19         19     800000  rs
+Ethernet152  145,146,147,148,149,150,151,152  etp20         20     800000  rs
+Ethernet160  185,186,187,188,189,190,191,192  etp21         21     800000  rs
+Ethernet168  169,170,171,172,173,174,175,176  etp22         22     800000  rs
+Ethernet176  161,162,163,164,165,166,167,168  etp23         23     800000  rs
+Ethernet184  177,178,179,180,181,182,183,184  etp24         24     800000  rs
+Ethernet192  217,218,219,220,221,222,223,224  etp25         25     800000  rs
+Ethernet200  201,202,203,204,205,206,207,208  etp26         26     800000  rs
+Ethernet208  193,194,195,196,197,198,199,200  etp27         27     800000  rs
+Ethernet216  209,210,211,212,213,214,215,216  etp28         28     800000  rs
+Ethernet224  249,250,251,252,253,254,255,256  etp29         29     800000  rs
+Ethernet232  233,234,235,236,237,238,239,240  etp30         30     800000  rs
+Ethernet240  225,226,227,228,229,230,231,232  etp31         31     800000  rs
+Ethernet248  241,242,243,244,245,246,247,248  etp32         32     800000  rs
+Ethernet256  273,274,275,276                  etp33a        33     400000  rs
+Ethernet260  277,278,279,280                  etp33b        33     400000  rs
+Ethernet264  257,258,259,260                  etp34a        34     400000  rs
+Ethernet268  261,262,263,264                  etp34b        34     400000  rs
+Ethernet272  265,266,267,268                  etp35a        35     400000  rs
+Ethernet276  269,270,271,272                  etp35b        35     400000  rs
+Ethernet280  281,282,283,284                  etp36a        36     400000  rs
+Ethernet284  285,286,287,288                  etp36b        36     400000  rs
+Ethernet288  313,314,315,316                  etp37a        37     400000  rs
+Ethernet292  317,318,319,320                  etp37b        37     400000  rs
+Ethernet296  297,298,299,300                  etp38a        38     400000  rs
+Ethernet300  301,302,303,304                  etp38b        38     400000  rs
+Ethernet304  289,290,291,292                  etp39a        39     400000  rs
+Ethernet308  293,294,295,296                  etp39b        39     400000  rs
+Ethernet312  305,306,307,308                  etp40a        40     400000  rs
+Ethernet316  309,310,311,312                  etp40b        40     400000  rs
+Ethernet320  345,346,347,348                  etp41a        41     400000  rs
+Ethernet324  349,350,351,352                  etp41b        41     400000  rs
+Ethernet328  329,330,331,332                  etp42a        42     400000  rs
+Ethernet332  333,334,335,336                  etp42b        42     400000  rs
+Ethernet336  321,322,323,324                  etp43a        43     400000  rs
+Ethernet340  325,326,327,328                  etp43b        43     400000  rs
+Ethernet344  337,338,339,340                  etp44a        44     400000  rs
+Ethernet348  341,342,343,344                  etp44b        44     400000  rs
+Ethernet352  377,378,379,380                  etp45a        45     400000  rs
+Ethernet356  381,382,383,384                  etp45b        45     400000  rs
+Ethernet360  361,362,363,364                  etp46a        46     400000  rs
+Ethernet364  365,366,367,368                  etp46b        46     400000  rs
+Ethernet368  353,354,355,356                  etp47a        47     400000  rs
+Ethernet372  357,358,359,360                  etp47b        47     400000  rs
+Ethernet376  369,370,371,372                  etp48a        48     400000  rs
+Ethernet380  373,374,375,376                  etp48b        48     400000  rs
+Ethernet384  409,410,411,412                  etp49a        49     400000  rs
+Ethernet388  413,414,415,416                  etp49b        49     400000  rs
+Ethernet392  393,394,395,396                  etp50a        50     400000  rs
+Ethernet396  397,398,399,400                  etp50b        50     400000  rs
+Ethernet400  385,386,387,388                  etp51a        51     400000  rs
+Ethernet404  389,390,391,392                  etp51b        51     400000  rs
+Ethernet408  401,402,403,404                  etp52a        52     400000  rs
+Ethernet412  405,406,407,408                  etp52b        52     400000  rs
+Ethernet416  441,442,443,444                  etp53a        53     400000  rs
+Ethernet420  445,446,447,448                  etp53b        53     400000  rs
+Ethernet424  425,426,427,428                  etp54a        54     400000  rs
+Ethernet428  429,430,431,432                  etp54b        54     400000  rs
+Ethernet432  417,418,419,420                  etp55a        55     400000  rs
+Ethernet436  421,422,423,424                  etp55b        55     400000  rs
+Ethernet440  433,434,435,436                  etp56a        56     400000  rs
+Ethernet444  437,438,439,440                  etp56b        56     400000  rs
+Ethernet448  473,474,475,476                  etp57a        57     400000  rs
+Ethernet452  477,478,479,480                  etp57b        57     400000  rs
+Ethernet456  457,458,459,460                  etp58a        58     400000  rs
+Ethernet460  461,462,463,464                  etp58b        58     400000  rs
+Ethernet464  449,450,451,452                  etp59a        59     400000  rs
+Ethernet468  453,454,455,456                  etp59b        59     400000  rs
+Ethernet472  465,466,467,468                  etp60a        60     400000  rs
+Ethernet476  469,470,471,472                  etp60b        60     400000  rs
+Ethernet480  505,506,507,508                  etp61a        61     400000  rs
+Ethernet484  509,510,511,512                  etp61b        61     400000  rs
+Ethernet488  489,490,491,492                  etp62a        62     400000  rs
+Ethernet492  493,494,495,496                  etp62b        62     400000  rs
+Ethernet496  481,482,483,484                  etp63a        63     400000  rs
+Ethernet500  485,486,487,488                  etp63b        63     400000  rs
+Ethernet504  497,498,499,500                  etp64a        64     400000  rs
+Ethernet508  501,502,503,504                  etp64b        64     400000  rs
+Ethernet512  513                              etp65         65     10000   none
+Ethernet513  515                              etp66         66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/qos.json.j2
new file mode 100644
index 00000000000..3e548325ea3
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/sai.profile
new file mode 100644
index 00000000000..9425d421d2d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=128
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 00000000000..98f66d899ed
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,1304 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 32x800g 64x400g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 179
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 200
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 201
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 211
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 212
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 234
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 244
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 245
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 266
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 267
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 277
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 278
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 288
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 299
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 300
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 310
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 311
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 321
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 322
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 332
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 333
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 344
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 176]]
+            :
+                ENABLE: 0
+                SPEED: 800000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[178, 179],
+                          [187, 190],
+                          [198, 201],
+                          [209, 212],
+                          [220, 223],
+                          [231, 234],
+                          [242, 245],
+                          [253, 256],
+                          [264, 267],
+                          [275, 278],
+                          [286, 289],
+                          [297, 300],
+                          [308, 311],
+                          [319, 322],
+                          [330, 333],
+                          [341, 344]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [274, 274]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/hwsku.json
new file mode 100644
index 00000000000..868285b3c60
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/hwsku.json
@@ -0,0 +1,196 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "4x200G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/port_config.ini
new file mode 100644
index 00000000000..65f80afa693
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/port_config.ini
@@ -0,0 +1,161 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    17,18,19,20,21,22,23,24          etp1          1      800000  rs
+Ethernet8    1,2,3,4,5,6,7,8                  etp2          2      800000  rs
+Ethernet16   9,10,11,12,13,14,15,16           etp3          3      800000  rs
+Ethernet24   25,26,27,28,29,30,31,32          etp4          4      800000  rs
+Ethernet32   57,58,59,60,61,62,63,64          etp5          5      800000  rs
+Ethernet40   41,42,43,44,45,46,47,48          etp6          6      800000  rs
+Ethernet48   33,34,35,36,37,38,39,40          etp7          7      800000  rs
+Ethernet56   49,50,51,52,53,54,55,56          etp8          8      800000  rs
+Ethernet64   89,90,91,92,93,94,95,96          etp9          9      800000  rs
+Ethernet72   73,74,75,76,77,78,79,80          etp10         10     800000  rs
+Ethernet80   65,66,67,68,69,70,71,72          etp11         11     800000  rs
+Ethernet88   81,82,83,84,85,86,87,88          etp12         12     800000  rs
+Ethernet96   121,122,123,124,125,126,127,128  etp13         13     800000  rs
+Ethernet104  105,106,107,108,109,110,111,112  etp14         14     800000  rs
+Ethernet112  97,98,99,100,101,102,103,104     etp15         15     800000  rs
+Ethernet120  113,114,115,116,117,118,119,120  etp16         16     800000  rs
+Ethernet128  153,154,155,156,157,158,159,160  etp17         17     800000  rs
+Ethernet136  137,138,139,140,141,142,143,144  etp18         18     800000  rs
+Ethernet144  129,130,131,132,133,134,135,136  etp19         19     800000  rs
+Ethernet152  145,146,147,148,149,150,151,152  etp20         20     800000  rs
+Ethernet160  185,186,187,188,189,190,191,192  etp21         21     800000  rs
+Ethernet168  169,170,171,172,173,174,175,176  etp22         22     800000  rs
+Ethernet176  161,162,163,164,165,166,167,168  etp23         23     800000  rs
+Ethernet184  177,178,179,180,181,182,183,184  etp24         24     800000  rs
+Ethernet192  217,218,219,220,221,222,223,224  etp25         25     800000  rs
+Ethernet200  201,202,203,204,205,206,207,208  etp26         26     800000  rs
+Ethernet208  193,194,195,196,197,198,199,200  etp27         27     800000  rs
+Ethernet216  209,210,211,212,213,214,215,216  etp28         28     800000  rs
+Ethernet224  249,250,251,252,253,254,255,256  etp29         29     800000  rs
+Ethernet232  233,234,235,236,237,238,239,240  etp30         30     800000  rs
+Ethernet240  225,226,227,228,229,230,231,232  etp31         31     800000  rs
+Ethernet248  241,242,243,244,245,246,247,248  etp32         32     800000  rs
+Ethernet256  273,274                          etp33a        33     200000  rs
+Ethernet258  275,276                          etp33b        33     200000  rs
+Ethernet260  277,278                          etp33c        33     200000  rs
+Ethernet262  279,280                          etp33d        33     200000  rs
+Ethernet264  257,258                          etp34a        34     200000  rs
+Ethernet266  259,260                          etp34b        34     200000  rs
+Ethernet268  261,262                          etp34c        34     200000  rs
+Ethernet270  263,264                          etp34d        34     200000  rs
+Ethernet272  265,266                          etp35a        35     200000  rs
+Ethernet274  267,268                          etp35b        35     200000  rs
+Ethernet276  269,270                          etp35c        35     200000  rs
+Ethernet278  271,272                          etp35d        35     200000  rs
+Ethernet280  281,282                          etp36a        36     200000  rs
+Ethernet282  283,284                          etp36b        36     200000  rs
+Ethernet284  285,286                          etp36c        36     200000  rs
+Ethernet286  287,288                          etp36d        36     200000  rs
+Ethernet288  313,314                          etp37a        37     200000  rs
+Ethernet290  315,316                          etp37b        37     200000  rs
+Ethernet292  317,318                          etp37c        37     200000  rs
+Ethernet294  319,320                          etp37d        37     200000  rs
+Ethernet296  297,298                          etp38a        38     200000  rs
+Ethernet298  299,300                          etp38b        38     200000  rs
+Ethernet300  301,302                          etp38c        38     200000  rs
+Ethernet302  303,304                          etp38d        38     200000  rs
+Ethernet304  289,290                          etp39a        39     200000  rs
+Ethernet306  291,292                          etp39b        39     200000  rs
+Ethernet308  293,294                          etp39c        39     200000  rs
+Ethernet310  295,296                          etp39d        39     200000  rs
+Ethernet312  305,306                          etp40a        40     200000  rs
+Ethernet314  307,308                          etp40b        40     200000  rs
+Ethernet316  309,310                          etp40c        40     200000  rs
+Ethernet318  311,312                          etp40d        40     200000  rs
+Ethernet320  345,346                          etp41a        41     200000  rs
+Ethernet322  347,348                          etp41b        41     200000  rs
+Ethernet324  349,350                          etp41c        41     200000  rs
+Ethernet326  351,352                          etp41d        41     200000  rs
+Ethernet328  329,330                          etp42a        42     200000  rs
+Ethernet330  331,332                          etp42b        42     200000  rs
+Ethernet332  333,334                          etp42c        42     200000  rs
+Ethernet334  335,336                          etp42d        42     200000  rs
+Ethernet336  321,322                          etp43a        43     200000  rs
+Ethernet338  323,324                          etp43b        43     200000  rs
+Ethernet340  325,326                          etp43c        43     200000  rs
+Ethernet342  327,328                          etp43d        43     200000  rs
+Ethernet344  337,338                          etp44a        44     200000  rs
+Ethernet346  339,340                          etp44b        44     200000  rs
+Ethernet348  341,342                          etp44c        44     200000  rs
+Ethernet350  343,344                          etp44d        44     200000  rs
+Ethernet352  377,378                          etp45a        45     200000  rs
+Ethernet354  379,380                          etp45b        45     200000  rs
+Ethernet356  381,382                          etp45c        45     200000  rs
+Ethernet358  383,384                          etp45d        45     200000  rs
+Ethernet360  361,362                          etp46a        46     200000  rs
+Ethernet362  363,364                          etp46b        46     200000  rs
+Ethernet364  365,366                          etp46c        46     200000  rs
+Ethernet366  367,368                          etp46d        46     200000  rs
+Ethernet368  353,354                          etp47a        47     200000  rs
+Ethernet370  355,356                          etp47b        47     200000  rs
+Ethernet372  357,358                          etp47c        47     200000  rs
+Ethernet374  359,360                          etp47d        47     200000  rs
+Ethernet376  369,370                          etp48a        48     200000  rs
+Ethernet378  371,372                          etp48b        48     200000  rs
+Ethernet380  373,374                          etp48c        48     200000  rs
+Ethernet382  375,376                          etp48d        48     200000  rs
+Ethernet384  409,410                          etp49a        49     200000  rs
+Ethernet386  411,412                          etp49b        49     200000  rs
+Ethernet388  413,414                          etp49c        49     200000  rs
+Ethernet390  415,416                          etp49d        49     200000  rs
+Ethernet392  393,394                          etp50a        50     200000  rs
+Ethernet394  395,396                          etp50b        50     200000  rs
+Ethernet396  397,398                          etp50c        50     200000  rs
+Ethernet398  399,400                          etp50d        50     200000  rs
+Ethernet400  385,386                          etp51a        51     200000  rs
+Ethernet402  387,388                          etp51b        51     200000  rs
+Ethernet404  389,390                          etp51c        51     200000  rs
+Ethernet406  391,392                          etp51d        51     200000  rs
+Ethernet408  401,402                          etp52a        52     200000  rs
+Ethernet410  403,404                          etp52b        52     200000  rs
+Ethernet412  405,406                          etp52c        52     200000  rs
+Ethernet414  407,408                          etp52d        52     200000  rs
+Ethernet416  441,442                          etp53a        53     200000  rs
+Ethernet418  443,444                          etp53b        53     200000  rs
+Ethernet420  445,446                          etp53c        53     200000  rs
+Ethernet422  447,448                          etp53d        53     200000  rs
+Ethernet424  425,426                          etp54a        54     200000  rs
+Ethernet426  427,428                          etp54b        54     200000  rs
+Ethernet428  429,430                          etp54c        54     200000  rs
+Ethernet430  431,432                          etp54d        54     200000  rs
+Ethernet432  417,418                          etp55a        55     200000  rs
+Ethernet434  419,420                          etp55b        55     200000  rs
+Ethernet436  421,422                          etp55c        55     200000  rs
+Ethernet438  423,424                          etp55d        55     200000  rs
+Ethernet440  433,434                          etp56a        56     200000  rs
+Ethernet442  435,436                          etp56b        56     200000  rs
+Ethernet444  437,438                          etp56c        56     200000  rs
+Ethernet446  439,440                          etp56d        56     200000  rs
+Ethernet448  473,474                          etp57a        57     200000  rs
+Ethernet450  475,476                          etp57b        57     200000  rs
+Ethernet452  477,478                          etp57c        57     200000  rs
+Ethernet454  479,480                          etp57d        57     200000  rs
+Ethernet456  457,458                          etp58a        58     200000  rs
+Ethernet458  459,460                          etp58b        58     200000  rs
+Ethernet460  461,462                          etp58c        58     200000  rs
+Ethernet462  463,464                          etp58d        58     200000  rs
+Ethernet464  449,450                          etp59a        59     200000  rs
+Ethernet466  451,452                          etp59b        59     200000  rs
+Ethernet468  453,454                          etp59c        59     200000  rs
+Ethernet470  455,456                          etp59d        59     200000  rs
+Ethernet472  465,466                          etp60a        60     200000  rs
+Ethernet474  467,468                          etp60b        60     200000  rs
+Ethernet476  469,470                          etp60c        60     200000  rs
+Ethernet478  471,472                          etp60d        60     200000  rs
+Ethernet480  505,506                          etp61a        61     200000  rs
+Ethernet482  507,508                          etp61b        61     200000  rs
+Ethernet484  509,510                          etp61c        61     200000  rs
+Ethernet486  511,512                          etp61d        61     200000  rs
+Ethernet488  489,490                          etp62a        62     200000  rs
+Ethernet490  491,492                          etp62b        62     200000  rs
+Ethernet492  493,494                          etp62c        62     200000  rs
+Ethernet494  495,496                          etp62d        62     200000  rs
+Ethernet496  481,482                          etp63a        63     200000  rs
+Ethernet498  483,484                          etp63b        63     200000  rs
+Ethernet500  485,486                          etp63c        63     200000  rs
+Ethernet502  487,488                          etp63d        63     200000  rs
+Ethernet504  497,498                          etp64a        64     200000  rs
+Ethernet506  499,500                          etp64b        64     200000  rs
+Ethernet508  501,502                          etp64c        64     200000  rs
+Ethernet510  503,504                          etp64d        64     200000  rs
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/sai.profile
new file mode 100644
index 00000000000..9425d421d2d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=128
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 00000000000..a7c59047b2c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,1549 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            sai_mmu_custom_config : 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 259
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 179
+            :
+                PC_PHYS_PORT_ID: 263
+            ?
+                PORT_ID: 180
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 181
+            :
+                PC_PHYS_PORT_ID: 267
+            ?
+                PORT_ID: 182
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 183
+            :
+                PC_PHYS_PORT_ID: 271
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 275
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 279
+            ?
+                PORT_ID: 191
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 192
+            :
+                PC_PHYS_PORT_ID: 283
+            ?
+                PORT_ID: 193
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 194
+            :
+                PC_PHYS_PORT_ID: 287
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 291
+            ?
+                PORT_ID: 200
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 201
+            :
+                PC_PHYS_PORT_ID: 295
+            ?
+                PORT_ID: 202
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 203
+            :
+                PC_PHYS_PORT_ID: 299
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 303
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 307
+            ?
+                PORT_ID: 211
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 212
+            :
+                PC_PHYS_PORT_ID: 311
+            ?
+                PORT_ID: 213
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 214
+            :
+                PC_PHYS_PORT_ID: 315
+            ?
+                PORT_ID: 215
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 216
+            :
+                PC_PHYS_PORT_ID: 319
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 323
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 327
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 225
+            :
+                PC_PHYS_PORT_ID: 331
+            ?
+                PORT_ID: 226
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 227
+            :
+                PC_PHYS_PORT_ID: 335
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 339
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 234
+            :
+                PC_PHYS_PORT_ID: 343
+            ?
+                PORT_ID: 235
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 236
+            :
+                PC_PHYS_PORT_ID: 347
+            ?
+                PORT_ID: 237
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 351
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 355
+            ?
+                PORT_ID: 244
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 245
+            :
+                PC_PHYS_PORT_ID: 359
+            ?
+                PORT_ID: 246
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 247
+            :
+                PC_PHYS_PORT_ID: 363
+            ?
+                PORT_ID: 248
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 249
+            :
+                PC_PHYS_PORT_ID: 367
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 371
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 375
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 379
+            ?
+                PORT_ID: 259
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 260
+            :
+                PC_PHYS_PORT_ID: 383
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 387
+            ?
+                PORT_ID: 266
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 267
+            :
+                PC_PHYS_PORT_ID: 391
+            ?
+                PORT_ID: 268
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 269
+            :
+                PC_PHYS_PORT_ID: 395
+            ?
+                PORT_ID: 270
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 271
+            :
+                PC_PHYS_PORT_ID: 399
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 403
+            ?
+                PORT_ID: 277
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 278
+            :
+                PC_PHYS_PORT_ID: 407
+            ?
+                PORT_ID: 279
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 280
+            :
+                PC_PHYS_PORT_ID: 411
+            ?
+                PORT_ID: 281
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 282
+            :
+                PC_PHYS_PORT_ID: 415
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 419
+            ?
+                PORT_ID: 288
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 423
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 291
+            :
+                PC_PHYS_PORT_ID: 427
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 293
+            :
+                PC_PHYS_PORT_ID: 431
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 435
+            ?
+                PORT_ID: 299
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 300
+            :
+                PC_PHYS_PORT_ID: 439
+            ?
+                PORT_ID: 301
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 302
+            :
+                PC_PHYS_PORT_ID: 443
+            ?
+                PORT_ID: 303
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 304
+            :
+                PC_PHYS_PORT_ID: 447
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 451
+            ?
+                PORT_ID: 310
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 311
+            :
+                PC_PHYS_PORT_ID: 455
+            ?
+                PORT_ID: 312
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 313
+            :
+                PC_PHYS_PORT_ID: 459
+            ?
+                PORT_ID: 314
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 315
+            :
+                PC_PHYS_PORT_ID: 463
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 467
+            ?
+                PORT_ID: 321
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 322
+            :
+                PC_PHYS_PORT_ID: 471
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 475
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 326
+            :
+                PC_PHYS_PORT_ID: 479
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 483
+            ?
+                PORT_ID: 332
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 333
+            :
+                PC_PHYS_PORT_ID: 487
+            ?
+                PORT_ID: 334
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 335
+            :
+                PC_PHYS_PORT_ID: 491
+            ?
+                PORT_ID: 336
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 337
+            :
+                PC_PHYS_PORT_ID: 495
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 499
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 344
+            :
+                PC_PHYS_PORT_ID: 503
+            ?
+                PORT_ID: 345
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 346
+            :
+                PC_PHYS_PORT_ID: 507
+            ?
+                PORT_ID: 347
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 348
+            :
+                PC_PHYS_PORT_ID: 511
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[176, 183],
+                          [187, 194],
+                          [198, 205],
+                          [209, 216],
+                          [220, 227],
+                          [231, 238],
+                          [242, 249],
+                          [253, 260],
+                          [264, 271],
+                          [275, 282],
+                          [286, 293],
+                          [297, 304],
+                          [308, 315],
+                          [319, 326],
+                          [330, 337],
+                          [341, 348]]
+            :
+                ENABLE: 0
+                SPEED: 200000
+                NUM_LANES: 2
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166]]
+            :
+                ENABLE: 0
+                SPEED: 800000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P64 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P64
new file mode 120000
index 00000000000..bc7d1928607
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P64
@@ -0,0 +1 @@
+./Arista-7060X6-64PE
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_ft2.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_ft2.j2
new file mode 120000
index 00000000000..b58b25d85ee
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_ft2.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_ft2.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_lt2.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_lt2.j2
new file mode 120000
index 00000000000..056eb8c1386
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_lt2.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_lt2.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini
index 881462c0626..8789a13096d 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini
@@ -1,67 +1,67 @@
 # name       lanes                            alias         index  speed   fec
-Ethernet0    17,18,19,20,21,22,23,24          Ethernet1/1   1      800000  rs
-Ethernet8    1,2,3,4,5,6,7,8                  Ethernet2/1   2      800000  rs
-Ethernet16   9,10,11,12,13,14,15,16           Ethernet3/1   3      800000  rs
-Ethernet24   25,26,27,28,29,30,31,32          Ethernet4/1   4      800000  rs
-Ethernet32   57,58,59,60,61,62,63,64          Ethernet5/1   5      800000  rs
-Ethernet40   41,42,43,44,45,46,47,48          Ethernet6/1   6      800000  rs
-Ethernet48   33,34,35,36,37,38,39,40          Ethernet7/1   7      800000  rs
-Ethernet56   49,50,51,52,53,54,55,56          Ethernet8/1   8      800000  rs
-Ethernet64   89,90,91,92,93,94,95,96          Ethernet9/1   9      800000  rs
-Ethernet72   73,74,75,76,77,78,79,80          Ethernet10/1  10     800000  rs
-Ethernet80   65,66,67,68,69,70,71,72          Ethernet11/1  11     800000  rs
-Ethernet88   81,82,83,84,85,86,87,88          Ethernet12/1  12     800000  rs
-Ethernet96   121,122,123,124,125,126,127,128  Ethernet13/1  13     800000  rs
-Ethernet104  105,106,107,108,109,110,111,112  Ethernet14/1  14     800000  rs
-Ethernet112  97,98,99,100,101,102,103,104     Ethernet15/1  15     800000  rs
-Ethernet120  113,114,115,116,117,118,119,120  Ethernet16/1  16     800000  rs
-Ethernet128  153,154,155,156,157,158,159,160  Ethernet17/1  17     800000  rs
-Ethernet136  137,138,139,140,141,142,143,144  Ethernet18/1  18     800000  rs
-Ethernet144  129,130,131,132,133,134,135,136  Ethernet19/1  19     800000  rs
-Ethernet152  145,146,147,148,149,150,151,152  Ethernet20/1  20     800000  rs
-Ethernet160  185,186,187,188,189,190,191,192  Ethernet21/1  21     800000  rs
-Ethernet168  169,170,171,172,173,174,175,176  Ethernet22/1  22     800000  rs
-Ethernet176  161,162,163,164,165,166,167,168  Ethernet23/1  23     800000  rs
-Ethernet184  177,178,179,180,181,182,183,184  Ethernet24/1  24     800000  rs
-Ethernet192  217,218,219,220,221,222,223,224  Ethernet25/1  25     800000  rs
-Ethernet200  201,202,203,204,205,206,207,208  Ethernet26/1  26     800000  rs
-Ethernet208  193,194,195,196,197,198,199,200  Ethernet27/1  27     800000  rs
-Ethernet216  209,210,211,212,213,214,215,216  Ethernet28/1  28     800000  rs
-Ethernet224  249,250,251,252,253,254,255,256  Ethernet29/1  29     800000  rs
-Ethernet232  233,234,235,236,237,238,239,240  Ethernet30/1  30     800000  rs
-Ethernet240  225,226,227,228,229,230,231,232  Ethernet31/1  31     800000  rs
-Ethernet248  241,242,243,244,245,246,247,248  Ethernet32/1  32     800000  rs
-Ethernet256  273,274,275,276,277,278,279,280  Ethernet33/1  33     800000  rs
-Ethernet264  257,258,259,260,261,262,263,264  Ethernet34/1  34     800000  rs
-Ethernet272  265,266,267,268,269,270,271,272  Ethernet35/1  35     800000  rs
-Ethernet280  281,282,283,284,285,286,287,288  Ethernet36/1  36     800000  rs
-Ethernet288  313,314,315,316,317,318,319,320  Ethernet37/1  37     800000  rs
-Ethernet296  297,298,299,300,301,302,303,304  Ethernet38/1  38     800000  rs
-Ethernet304  289,290,291,292,293,294,295,296  Ethernet39/1  39     800000  rs
-Ethernet312  305,306,307,308,309,310,311,312  Ethernet40/1  40     800000  rs
-Ethernet320  345,346,347,348,349,350,351,352  Ethernet41/1  41     800000  rs
-Ethernet328  329,330,331,332,333,334,335,336  Ethernet42/1  42     800000  rs
-Ethernet336  321,322,323,324,325,326,327,328  Ethernet43/1  43     800000  rs
-Ethernet344  337,338,339,340,341,342,343,344  Ethernet44/1  44     800000  rs
-Ethernet352  377,378,379,380,381,382,383,384  Ethernet45/1  45     800000  rs
-Ethernet360  361,362,363,364,365,366,367,368  Ethernet46/1  46     800000  rs
-Ethernet368  353,354,355,356,357,358,359,360  Ethernet47/1  47     800000  rs
-Ethernet376  369,370,371,372,373,374,375,376  Ethernet48/1  48     800000  rs
-Ethernet384  409,410,411,412,413,414,415,416  Ethernet49/1  49     800000  rs
-Ethernet392  393,394,395,396,397,398,399,400  Ethernet50/1  50     800000  rs
-Ethernet400  385,386,387,388,389,390,391,392  Ethernet51/1  51     800000  rs
-Ethernet408  401,402,403,404,405,406,407,408  Ethernet52/1  52     800000  rs
-Ethernet416  441,442,443,444,445,446,447,448  Ethernet53/1  53     800000  rs
-Ethernet424  425,426,427,428,429,430,431,432  Ethernet54/1  54     800000  rs
-Ethernet432  417,418,419,420,421,422,423,424  Ethernet55/1  55     800000  rs
-Ethernet440  433,434,435,436,437,438,439,440  Ethernet56/1  56     800000  rs
-Ethernet448  473,474,475,476,477,478,479,480  Ethernet57/1  57     800000  rs
-Ethernet456  457,458,459,460,461,462,463,464  Ethernet58/1  58     800000  rs
-Ethernet464  449,450,451,452,453,454,455,456  Ethernet59/1  59     800000  rs
-Ethernet472  465,466,467,468,469,470,471,472  Ethernet60/1  60     800000  rs
-Ethernet480  505,506,507,508,509,510,511,512  Ethernet61/1  61     800000  rs
-Ethernet488  489,490,491,492,493,494,495,496  Ethernet62/1  62     800000  rs
-Ethernet496  481,482,483,484,485,486,487,488  Ethernet63/1  63     800000  rs
-Ethernet504  497,498,499,500,501,502,503,504  Ethernet64/1  64     800000  rs
-Ethernet512  513                              Ethernet65    65     10000   none
-Ethernet513  515                              Ethernet66    66     10000   none
+Ethernet0    17,18,19,20,21,22,23,24          etp1          1      800000  rs
+Ethernet8    1,2,3,4,5,6,7,8                  etp2          2      800000  rs
+Ethernet16   9,10,11,12,13,14,15,16           etp3          3      800000  rs
+Ethernet24   25,26,27,28,29,30,31,32          etp4          4      800000  rs
+Ethernet32   57,58,59,60,61,62,63,64          etp5          5      800000  rs
+Ethernet40   41,42,43,44,45,46,47,48          etp6          6      800000  rs
+Ethernet48   33,34,35,36,37,38,39,40          etp7          7      800000  rs
+Ethernet56   49,50,51,52,53,54,55,56          etp8          8      800000  rs
+Ethernet64   89,90,91,92,93,94,95,96          etp9          9      800000  rs
+Ethernet72   73,74,75,76,77,78,79,80          etp10         10     800000  rs
+Ethernet80   65,66,67,68,69,70,71,72          etp11         11     800000  rs
+Ethernet88   81,82,83,84,85,86,87,88          etp12         12     800000  rs
+Ethernet96   121,122,123,124,125,126,127,128  etp13         13     800000  rs
+Ethernet104  105,106,107,108,109,110,111,112  etp14         14     800000  rs
+Ethernet112  97,98,99,100,101,102,103,104     etp15         15     800000  rs
+Ethernet120  113,114,115,116,117,118,119,120  etp16         16     800000  rs
+Ethernet128  153,154,155,156,157,158,159,160  etp17         17     800000  rs
+Ethernet136  137,138,139,140,141,142,143,144  etp18         18     800000  rs
+Ethernet144  129,130,131,132,133,134,135,136  etp19         19     800000  rs
+Ethernet152  145,146,147,148,149,150,151,152  etp20         20     800000  rs
+Ethernet160  185,186,187,188,189,190,191,192  etp21         21     800000  rs
+Ethernet168  169,170,171,172,173,174,175,176  etp22         22     800000  rs
+Ethernet176  161,162,163,164,165,166,167,168  etp23         23     800000  rs
+Ethernet184  177,178,179,180,181,182,183,184  etp24         24     800000  rs
+Ethernet192  217,218,219,220,221,222,223,224  etp25         25     800000  rs
+Ethernet200  201,202,203,204,205,206,207,208  etp26         26     800000  rs
+Ethernet208  193,194,195,196,197,198,199,200  etp27         27     800000  rs
+Ethernet216  209,210,211,212,213,214,215,216  etp28         28     800000  rs
+Ethernet224  249,250,251,252,253,254,255,256  etp29         29     800000  rs
+Ethernet232  233,234,235,236,237,238,239,240  etp30         30     800000  rs
+Ethernet240  225,226,227,228,229,230,231,232  etp31         31     800000  rs
+Ethernet248  241,242,243,244,245,246,247,248  etp32         32     800000  rs
+Ethernet256  273,274,275,276,277,278,279,280  etp33         33     800000  rs
+Ethernet264  257,258,259,260,261,262,263,264  etp34         34     800000  rs
+Ethernet272  265,266,267,268,269,270,271,272  etp35         35     800000  rs
+Ethernet280  281,282,283,284,285,286,287,288  etp36         36     800000  rs
+Ethernet288  313,314,315,316,317,318,319,320  etp37         37     800000  rs
+Ethernet296  297,298,299,300,301,302,303,304  etp38         38     800000  rs
+Ethernet304  289,290,291,292,293,294,295,296  etp39         39     800000  rs
+Ethernet312  305,306,307,308,309,310,311,312  etp40         40     800000  rs
+Ethernet320  345,346,347,348,349,350,351,352  etp41         41     800000  rs
+Ethernet328  329,330,331,332,333,334,335,336  etp42         42     800000  rs
+Ethernet336  321,322,323,324,325,326,327,328  etp43         43     800000  rs
+Ethernet344  337,338,339,340,341,342,343,344  etp44         44     800000  rs
+Ethernet352  377,378,379,380,381,382,383,384  etp45         45     800000  rs
+Ethernet360  361,362,363,364,365,366,367,368  etp46         46     800000  rs
+Ethernet368  353,354,355,356,357,358,359,360  etp47         47     800000  rs
+Ethernet376  369,370,371,372,373,374,375,376  etp48         48     800000  rs
+Ethernet384  409,410,411,412,413,414,415,416  etp49         49     800000  rs
+Ethernet392  393,394,395,396,397,398,399,400  etp50         50     800000  rs
+Ethernet400  385,386,387,388,389,390,391,392  etp51         51     800000  rs
+Ethernet408  401,402,403,404,405,406,407,408  etp52         52     800000  rs
+Ethernet416  441,442,443,444,445,446,447,448  etp53         53     800000  rs
+Ethernet424  425,426,427,428,429,430,431,432  etp54         54     800000  rs
+Ethernet432  417,418,419,420,421,422,423,424  etp55         55     800000  rs
+Ethernet440  433,434,435,436,437,438,439,440  etp56         56     800000  rs
+Ethernet448  473,474,475,476,477,478,479,480  etp57         57     800000  rs
+Ethernet456  457,458,459,460,461,462,463,464  etp58         58     800000  rs
+Ethernet464  449,450,451,452,453,454,455,456  etp59         59     800000  rs
+Ethernet472  465,466,467,468,469,470,471,472  etp60         60     800000  rs
+Ethernet480  505,506,507,508,509,510,511,512  etp61         61     800000  rs
+Ethernet488  489,490,491,492,493,494,495,496  etp62         62     800000  rs
+Ethernet496  481,482,483,484,485,486,487,488  etp63         63     800000  rs
+Ethernet504  497,498,499,500,501,502,503,504  etp64         64     800000  rs
+Ethernet512  513                              etp65         65     10000   none
+Ethernet513  515                              etp66         66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
index b76c615c26f..b9bfe57cefd 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
@@ -42,6 +42,7 @@ bcm_device:
             sai_tunnel_support: 2
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
+            stat_custom_receive0_management_mode: 1
 ---
 device:
     0:
@@ -1121,7 +1122,7 @@ device:
                           [330, 331],
                           [341, 342]]
             :
-                ENABLE: 1
+                ENABLE: 0
                 SPEED: 800000
                 NUM_LANES: 8
                 FEC_MODE: PC_FEC_RS544_2XN
diff --git a/device/arista/x86_64-arista_7060x6_64pe/platform.json b/device/arista/x86_64-arista_7060x6_64pe/platform.json
index 045388d03a2..2c32a6ca764 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/platform.json
+++ b/device/arista/x86_64-arista_7060x6_64pe/platform.json
@@ -319,30 +319,30 @@
             "lanes": "17,18,19,20,21,22,23,24",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet1/1"
+                    "etp1"
                 ],
                 "1x400G": [
-                    "Ethernet1/1"
+                    "etp1"
                 ],
                 "2x400G": [
-                    "Ethernet1/1",
-                    "Ethernet1/5"
+                    "etp1a",
+                    "etp1b"
                 ],
                 "4x200G": [
-                    "Ethernet1/1",
-                    "Ethernet1/3",
-                    "Ethernet1/5",
-                    "Ethernet1/7"
+                    "etp1a",
+                    "etp1b",
+                    "etp1c",
+                    "etp1d"
                 ],
                 "8x100G": [
-                    "Ethernet1/1",
-                    "Ethernet1/2",
-                    "Ethernet1/3",
-                    "Ethernet1/4",
-                    "Ethernet1/5",
-                    "Ethernet1/6",
-                    "Ethernet1/7",
-                    "Ethernet1/8"
+                    "etp1a",
+                    "etp1b",
+                    "etp1c",
+                    "etp1d",
+                    "etp1e",
+                    "etp1f",
+                    "etp1g",
+                    "etp1h"
                 ]
             }
         },
@@ -351,30 +351,30 @@
             "lanes": "1,2,3,4,5,6,7,8",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet2/1"
+                    "etp2"
                 ],
                 "1x400G": [
-                    "Ethernet2/1"
+                    "etp2"
                 ],
                 "2x400G": [
-                    "Ethernet2/1",
-                    "Ethernet2/5"
+                    "etp2a",
+                    "etp2b"
                 ],
                 "4x200G": [
-                    "Ethernet2/1",
-                    "Ethernet2/3",
-                    "Ethernet2/5",
-                    "Ethernet2/7"
+                    "etp2a",
+                    "etp2b",
+                    "etp2c",
+                    "etp2d"
                 ],
                 "8x100G": [
-                    "Ethernet2/1",
-                    "Ethernet2/2",
-                    "Ethernet2/3",
-                    "Ethernet2/4",
-                    "Ethernet2/5",
-                    "Ethernet2/6",
-                    "Ethernet2/7",
-                    "Ethernet2/8"
+                    "etp2a",
+                    "etp2b",
+                    "etp2c",
+                    "etp2d",
+                    "etp2e",
+                    "etp2f",
+                    "etp2g",
+                    "etp2h"
                 ]
             }
         },
@@ -383,30 +383,30 @@
             "lanes": "9,10,11,12,13,14,15,16",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet3/1"
+                    "etp3"
                 ],
                 "1x400G": [
-                    "Ethernet3/1"
+                    "etp3"
                 ],
                 "2x400G": [
-                    "Ethernet3/1",
-                    "Ethernet3/5"
+                    "etp3a",
+                    "etp3b"
                 ],
                 "4x200G": [
-                    "Ethernet3/1",
-                    "Ethernet3/3",
-                    "Ethernet3/5",
-                    "Ethernet3/7"
+                    "etp3a",
+                    "etp3b",
+                    "etp3c",
+                    "etp3d"
                 ],
                 "8x100G": [
-                    "Ethernet3/1",
-                    "Ethernet3/2",
-                    "Ethernet3/3",
-                    "Ethernet3/4",
-                    "Ethernet3/5",
-                    "Ethernet3/6",
-                    "Ethernet3/7",
-                    "Ethernet3/8"
+                    "etp3a",
+                    "etp3b",
+                    "etp3c",
+                    "etp3d",
+                    "etp3e",
+                    "etp3f",
+                    "etp3g",
+                    "etp3h"
                 ]
             }
         },
@@ -415,30 +415,30 @@
             "lanes": "25,26,27,28,29,30,31,32",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet4/1"
+                    "etp4"
                 ],
                 "1x400G": [
-                    "Ethernet4/1"
+                    "etp4"
                 ],
                 "2x400G": [
-                    "Ethernet4/1",
-                    "Ethernet4/5"
+                    "etp4a",
+                    "etp4b"
                 ],
                 "4x200G": [
-                    "Ethernet4/1",
-                    "Ethernet4/3",
-                    "Ethernet4/5",
-                    "Ethernet4/7"
+                    "etp4a",
+                    "etp4b",
+                    "etp4c",
+                    "etp4d"
                 ],
                 "8x100G": [
-                    "Ethernet4/1",
-                    "Ethernet4/2",
-                    "Ethernet4/3",
-                    "Ethernet4/4",
-                    "Ethernet4/5",
-                    "Ethernet4/6",
-                    "Ethernet4/7",
-                    "Ethernet4/8"
+                    "etp4a",
+                    "etp4b",
+                    "etp4c",
+                    "etp4d",
+                    "etp4e",
+                    "etp4f",
+                    "etp4g",
+                    "etp4h"
                 ]
             }
         },
@@ -447,30 +447,30 @@
             "lanes": "57,58,59,60,61,62,63,64",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet5/1"
+                    "etp5"
                 ],
                 "1x400G": [
-                    "Ethernet5/1"
+                    "etp5"
                 ],
                 "2x400G": [
-                    "Ethernet5/1",
-                    "Ethernet5/5"
+                    "etp5a",
+                    "etp5b"
                 ],
                 "4x200G": [
-                    "Ethernet5/1",
-                    "Ethernet5/3",
-                    "Ethernet5/5",
-                    "Ethernet5/7"
+                    "etp5a",
+                    "etp5b",
+                    "etp5c",
+                    "etp5d"
                 ],
                 "8x100G": [
-                    "Ethernet5/1",
-                    "Ethernet5/2",
-                    "Ethernet5/3",
-                    "Ethernet5/4",
-                    "Ethernet5/5",
-                    "Ethernet5/6",
-                    "Ethernet5/7",
-                    "Ethernet5/8"
+                    "etp5a",
+                    "etp5b",
+                    "etp5c",
+                    "etp5d",
+                    "etp5e",
+                    "etp5f",
+                    "etp5g",
+                    "etp5h"
                 ]
             }
         },
@@ -479,30 +479,30 @@
             "lanes": "41,42,43,44,45,46,47,48",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet6/1"
+                    "etp6"
                 ],
                 "1x400G": [
-                    "Ethernet6/1"
+                    "etp6"
                 ],
                 "2x400G": [
-                    "Ethernet6/1",
-                    "Ethernet6/5"
+                    "etp6a",
+                    "etp6b"
                 ],
                 "4x200G": [
-                    "Ethernet6/1",
-                    "Ethernet6/3",
-                    "Ethernet6/5",
-                    "Ethernet6/7"
+                    "etp6a",
+                    "etp6b",
+                    "etp6c",
+                    "etp6d"
                 ],
                 "8x100G": [
-                    "Ethernet6/1",
-                    "Ethernet6/2",
-                    "Ethernet6/3",
-                    "Ethernet6/4",
-                    "Ethernet6/5",
-                    "Ethernet6/6",
-                    "Ethernet6/7",
-                    "Ethernet6/8"
+                    "etp6a",
+                    "etp6b",
+                    "etp6c",
+                    "etp6d",
+                    "etp6e",
+                    "etp6f",
+                    "etp6g",
+                    "etp6h"
                 ]
             }
         },
@@ -511,30 +511,30 @@
             "lanes": "33,34,35,36,37,38,39,40",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet7/1"
+                    "etp7"
                 ],
                 "1x400G": [
-                    "Ethernet7/1"
+                    "etp7"
                 ],
                 "2x400G": [
-                    "Ethernet7/1",
-                    "Ethernet7/5"
+                    "etp7a",
+                    "etp7b"
                 ],
                 "4x200G": [
-                    "Ethernet7/1",
-                    "Ethernet7/3",
-                    "Ethernet7/5",
-                    "Ethernet7/7"
+                    "etp7a",
+                    "etp7b",
+                    "etp7c",
+                    "etp7d"
                 ],
                 "8x100G": [
-                    "Ethernet7/1",
-                    "Ethernet7/2",
-                    "Ethernet7/3",
-                    "Ethernet7/4",
-                    "Ethernet7/5",
-                    "Ethernet7/6",
-                    "Ethernet7/7",
-                    "Ethernet7/8"
+                    "etp7a",
+                    "etp7b",
+                    "etp7c",
+                    "etp7d",
+                    "etp7e",
+                    "etp7f",
+                    "etp7g",
+                    "etp7h"
                 ]
             }
         },
@@ -543,30 +543,30 @@
             "lanes": "49,50,51,52,53,54,55,56",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet8/1"
+                    "etp8"
                 ],
                 "1x400G": [
-                    "Ethernet8/1"
+                    "etp8"
                 ],
                 "2x400G": [
-                    "Ethernet8/1",
-                    "Ethernet8/5"
+                    "etp8a",
+                    "etp8b"
                 ],
                 "4x200G": [
-                    "Ethernet8/1",
-                    "Ethernet8/3",
-                    "Ethernet8/5",
-                    "Ethernet8/7"
+                    "etp8a",
+                    "etp8b",
+                    "etp8c",
+                    "etp8d"
                 ],
                 "8x100G": [
-                    "Ethernet8/1",
-                    "Ethernet8/2",
-                    "Ethernet8/3",
-                    "Ethernet8/4",
-                    "Ethernet8/5",
-                    "Ethernet8/6",
-                    "Ethernet8/7",
-                    "Ethernet8/8"
+                    "etp8a",
+                    "etp8b",
+                    "etp8c",
+                    "etp8d",
+                    "etp8e",
+                    "etp8f",
+                    "etp8g",
+                    "etp8h"
                 ]
             }
         },
@@ -575,30 +575,30 @@
             "lanes": "89,90,91,92,93,94,95,96",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet9/1"
+                    "etp9"
                 ],
                 "1x400G": [
-                    "Ethernet9/1"
+                    "etp9"
                 ],
                 "2x400G": [
-                    "Ethernet9/1",
-                    "Ethernet9/5"
+                    "etp9a",
+                    "etp9b"
                 ],
                 "4x200G": [
-                    "Ethernet9/1",
-                    "Ethernet9/3",
-                    "Ethernet9/5",
-                    "Ethernet9/7"
+                    "etp9a",
+                    "etp9b",
+                    "etp9c",
+                    "etp9d"
                 ],
                 "8x100G": [
-                    "Ethernet9/1",
-                    "Ethernet9/2",
-                    "Ethernet9/3",
-                    "Ethernet9/4",
-                    "Ethernet9/5",
-                    "Ethernet9/6",
-                    "Ethernet9/7",
-                    "Ethernet9/8"
+                    "etp9a",
+                    "etp9b",
+                    "etp9c",
+                    "etp9d",
+                    "etp9e",
+                    "etp9f",
+                    "etp9g",
+                    "etp9h"
                 ]
             }
         },
@@ -607,30 +607,30 @@
             "lanes": "73,74,75,76,77,78,79,80",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet10/1"
+                    "etp10"
                 ],
                 "1x400G": [
-                    "Ethernet10/1"
+                    "etp10"
                 ],
                 "2x400G": [
-                    "Ethernet10/1",
-                    "Ethernet10/5"
+                    "etp10a",
+                    "etp10b"
                 ],
                 "4x200G": [
-                    "Ethernet10/1",
-                    "Ethernet10/3",
-                    "Ethernet10/5",
-                    "Ethernet10/7"
+                    "etp10a",
+                    "etp10b",
+                    "etp10c",
+                    "etp10d"
                 ],
                 "8x100G": [
-                    "Ethernet10/1",
-                    "Ethernet10/2",
-                    "Ethernet10/3",
-                    "Ethernet10/4",
-                    "Ethernet10/5",
-                    "Ethernet10/6",
-                    "Ethernet10/7",
-                    "Ethernet10/8"
+                    "etp10a",
+                    "etp10b",
+                    "etp10c",
+                    "etp10d",
+                    "etp10e",
+                    "etp10f",
+                    "etp10g",
+                    "etp10h"
                 ]
             }
         },
@@ -639,30 +639,30 @@
             "lanes": "65,66,67,68,69,70,71,72",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet11/1"
+                    "etp11"
                 ],
                 "1x400G": [
-                    "Ethernet11/1"
+                    "etp11"
                 ],
                 "2x400G": [
-                    "Ethernet11/1",
-                    "Ethernet11/5"
+                    "etp11a",
+                    "etp11b"
                 ],
                 "4x200G": [
-                    "Ethernet11/1",
-                    "Ethernet11/3",
-                    "Ethernet11/5",
-                    "Ethernet11/7"
+                    "etp11a",
+                    "etp11b",
+                    "etp11c",
+                    "etp11d"
                 ],
                 "8x100G": [
-                    "Ethernet11/1",
-                    "Ethernet11/2",
-                    "Ethernet11/3",
-                    "Ethernet11/4",
-                    "Ethernet11/5",
-                    "Ethernet11/6",
-                    "Ethernet11/7",
-                    "Ethernet11/8"
+                    "etp11a",
+                    "etp11b",
+                    "etp11c",
+                    "etp11d",
+                    "etp11e",
+                    "etp11f",
+                    "etp11g",
+                    "etp11h"
                 ]
             }
         },
@@ -671,30 +671,30 @@
             "lanes": "81,82,83,84,85,86,87,88",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet12/1"
+                    "etp12"
                 ],
                 "1x400G": [
-                    "Ethernet12/1"
+                    "etp12"
                 ],
                 "2x400G": [
-                    "Ethernet12/1",
-                    "Ethernet12/5"
+                    "etp12a",
+                    "etp12b"
                 ],
                 "4x200G": [
-                    "Ethernet12/1",
-                    "Ethernet12/3",
-                    "Ethernet12/5",
-                    "Ethernet12/7"
+                    "etp12a",
+                    "etp12b",
+                    "etp12c",
+                    "etp12d"
                 ],
                 "8x100G": [
-                    "Ethernet12/1",
-                    "Ethernet12/2",
-                    "Ethernet12/3",
-                    "Ethernet12/4",
-                    "Ethernet12/5",
-                    "Ethernet12/6",
-                    "Ethernet12/7",
-                    "Ethernet12/8"
+                    "etp12a",
+                    "etp12b",
+                    "etp12c",
+                    "etp12d",
+                    "etp12e",
+                    "etp12f",
+                    "etp12g",
+                    "etp12h"
                 ]
             }
         },
@@ -703,30 +703,30 @@
             "lanes": "121,122,123,124,125,126,127,128",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet13/1"
+                    "etp13"
                 ],
                 "1x400G": [
-                    "Ethernet13/1"
+                    "etp13"
                 ],
                 "2x400G": [
-                    "Ethernet13/1",
-                    "Ethernet13/5"
+                    "etp13a",
+                    "etp13b"
                 ],
                 "4x200G": [
-                    "Ethernet13/1",
-                    "Ethernet13/3",
-                    "Ethernet13/5",
-                    "Ethernet13/7"
+                    "etp13a",
+                    "etp13b",
+                    "etp13c",
+                    "etp13d"
                 ],
                 "8x100G": [
-                    "Ethernet13/1",
-                    "Ethernet13/2",
-                    "Ethernet13/3",
-                    "Ethernet13/4",
-                    "Ethernet13/5",
-                    "Ethernet13/6",
-                    "Ethernet13/7",
-                    "Ethernet13/8"
+                    "etp13a",
+                    "etp13b",
+                    "etp13c",
+                    "etp13d",
+                    "etp13e",
+                    "etp13f",
+                    "etp13g",
+                    "etp13h"
                 ]
             }
         },
@@ -735,30 +735,30 @@
             "lanes": "105,106,107,108,109,110,111,112",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet14/1"
+                    "etp14"
                 ],
                 "1x400G": [
-                    "Ethernet14/1"
+                    "etp14"
                 ],
                 "2x400G": [
-                    "Ethernet14/1",
-                    "Ethernet14/5"
+                    "etp14a",
+                    "etp14b"
                 ],
                 "4x200G": [
-                    "Ethernet14/1",
-                    "Ethernet14/3",
-                    "Ethernet14/5",
-                    "Ethernet14/7"
+                    "etp14a",
+                    "etp14b",
+                    "etp14c",
+                    "etp14d"
                 ],
                 "8x100G": [
-                    "Ethernet14/1",
-                    "Ethernet14/2",
-                    "Ethernet14/3",
-                    "Ethernet14/4",
-                    "Ethernet14/5",
-                    "Ethernet14/6",
-                    "Ethernet14/7",
-                    "Ethernet14/8"
+                    "etp14a",
+                    "etp14b",
+                    "etp14c",
+                    "etp14d",
+                    "etp14e",
+                    "etp14f",
+                    "etp14g",
+                    "etp14h"
                 ]
             }
         },
@@ -767,30 +767,30 @@
             "lanes": "97,98,99,100,101,102,103,104",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet15/1"
+                    "etp15"
                 ],
                 "1x400G": [
-                    "Ethernet15/1"
+                    "etp15"
                 ],
                 "2x400G": [
-                    "Ethernet15/1",
-                    "Ethernet15/5"
+                    "etp15a",
+                    "etp15b"
                 ],
                 "4x200G": [
-                    "Ethernet15/1",
-                    "Ethernet15/3",
-                    "Ethernet15/5",
-                    "Ethernet15/7"
+                    "etp15a",
+                    "etp15b",
+                    "etp15c",
+                    "etp15d"
                 ],
                 "8x100G": [
-                    "Ethernet15/1",
-                    "Ethernet15/2",
-                    "Ethernet15/3",
-                    "Ethernet15/4",
-                    "Ethernet15/5",
-                    "Ethernet15/6",
-                    "Ethernet15/7",
-                    "Ethernet15/8"
+                    "etp15a",
+                    "etp15b",
+                    "etp15c",
+                    "etp15d",
+                    "etp15e",
+                    "etp15f",
+                    "etp15g",
+                    "etp15h"
                 ]
             }
         },
@@ -799,30 +799,30 @@
             "lanes": "113,114,115,116,117,118,119,120",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet16/1"
+                    "etp16"
                 ],
                 "1x400G": [
-                    "Ethernet16/1"
+                    "etp16"
                 ],
                 "2x400G": [
-                    "Ethernet16/1",
-                    "Ethernet16/5"
+                    "etp16a",
+                    "etp16b"
                 ],
                 "4x200G": [
-                    "Ethernet16/1",
-                    "Ethernet16/3",
-                    "Ethernet16/5",
-                    "Ethernet16/7"
+                    "etp16a",
+                    "etp16b",
+                    "etp16c",
+                    "etp16d"
                 ],
                 "8x100G": [
-                    "Ethernet16/1",
-                    "Ethernet16/2",
-                    "Ethernet16/3",
-                    "Ethernet16/4",
-                    "Ethernet16/5",
-                    "Ethernet16/6",
-                    "Ethernet16/7",
-                    "Ethernet16/8"
+                    "etp16a",
+                    "etp16b",
+                    "etp16c",
+                    "etp16d",
+                    "etp16e",
+                    "etp16f",
+                    "etp16g",
+                    "etp16h"
                 ]
             }
         },
@@ -831,30 +831,30 @@
             "lanes": "153,154,155,156,157,158,159,160",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet17/1"
+                    "etp17"
                 ],
                 "1x400G": [
-                    "Ethernet17/1"
+                    "etp17"
                 ],
                 "2x400G": [
-                    "Ethernet17/1",
-                    "Ethernet17/5"
+                    "etp17a",
+                    "etp17b"
                 ],
                 "4x200G": [
-                    "Ethernet17/1",
-                    "Ethernet17/3",
-                    "Ethernet17/5",
-                    "Ethernet17/7"
+                    "etp17a",
+                    "etp17b",
+                    "etp17c",
+                    "etp17d"
                 ],
                 "8x100G": [
-                    "Ethernet17/1",
-                    "Ethernet17/2",
-                    "Ethernet17/3",
-                    "Ethernet17/4",
-                    "Ethernet17/5",
-                    "Ethernet17/6",
-                    "Ethernet17/7",
-                    "Ethernet17/8"
+                    "etp17a",
+                    "etp17b",
+                    "etp17c",
+                    "etp17d",
+                    "etp17e",
+                    "etp17f",
+                    "etp17g",
+                    "etp17h"
                 ]
             }
         },
@@ -863,30 +863,30 @@
             "lanes": "137,138,139,140,141,142,143,144",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet18/1"
+                    "etp18"
                 ],
                 "1x400G": [
-                    "Ethernet18/1"
+                    "etp18"
                 ],
                 "2x400G": [
-                    "Ethernet18/1",
-                    "Ethernet18/5"
+                    "etp18a",
+                    "etp18b"
                 ],
                 "4x200G": [
-                    "Ethernet18/1",
-                    "Ethernet18/3",
-                    "Ethernet18/5",
-                    "Ethernet18/7"
+                    "etp18a",
+                    "etp18b",
+                    "etp18c",
+                    "etp18d"
                 ],
                 "8x100G": [
-                    "Ethernet18/1",
-                    "Ethernet18/2",
-                    "Ethernet18/3",
-                    "Ethernet18/4",
-                    "Ethernet18/5",
-                    "Ethernet18/6",
-                    "Ethernet18/7",
-                    "Ethernet18/8"
+                    "etp18a",
+                    "etp18b",
+                    "etp18c",
+                    "etp18d",
+                    "etp18e",
+                    "etp18f",
+                    "etp18g",
+                    "etp18h"
                 ]
             }
         },
@@ -895,30 +895,30 @@
             "lanes": "129,130,131,132,133,134,135,136",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet19/1"
+                    "etp19"
                 ],
                 "1x400G": [
-                    "Ethernet19/1"
+                    "etp19"
                 ],
                 "2x400G": [
-                    "Ethernet19/1",
-                    "Ethernet19/5"
+                    "etp19a",
+                    "etp19b"
                 ],
                 "4x200G": [
-                    "Ethernet19/1",
-                    "Ethernet19/3",
-                    "Ethernet19/5",
-                    "Ethernet19/7"
+                    "etp19a",
+                    "etp19b",
+                    "etp19c",
+                    "etp19d"
                 ],
                 "8x100G": [
-                    "Ethernet19/1",
-                    "Ethernet19/2",
-                    "Ethernet19/3",
-                    "Ethernet19/4",
-                    "Ethernet19/5",
-                    "Ethernet19/6",
-                    "Ethernet19/7",
-                    "Ethernet19/8"
+                    "etp19a",
+                    "etp19b",
+                    "etp19c",
+                    "etp19d",
+                    "etp19e",
+                    "etp19f",
+                    "etp19g",
+                    "etp19h"
                 ]
             }
         },
@@ -927,30 +927,30 @@
             "lanes": "145,146,147,148,149,150,151,152",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet20/1"
+                    "etp20"
                 ],
                 "1x400G": [
-                    "Ethernet20/1"
+                    "etp20"
                 ],
                 "2x400G": [
-                    "Ethernet20/1",
-                    "Ethernet20/5"
+                    "etp20a",
+                    "etp20b"
                 ],
                 "4x200G": [
-                    "Ethernet20/1",
-                    "Ethernet20/3",
-                    "Ethernet20/5",
-                    "Ethernet20/7"
+                    "etp20a",
+                    "etp20b",
+                    "etp20c",
+                    "etp20d"
                 ],
                 "8x100G": [
-                    "Ethernet20/1",
-                    "Ethernet20/2",
-                    "Ethernet20/3",
-                    "Ethernet20/4",
-                    "Ethernet20/5",
-                    "Ethernet20/6",
-                    "Ethernet20/7",
-                    "Ethernet20/8"
+                    "etp20a",
+                    "etp20b",
+                    "etp20c",
+                    "etp20d",
+                    "etp20e",
+                    "etp20f",
+                    "etp20g",
+                    "etp20h"
                 ]
             }
         },
@@ -959,30 +959,30 @@
             "lanes": "185,186,187,188,189,190,191,192",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet21/1"
+                    "etp21"
                 ],
                 "1x400G": [
-                    "Ethernet21/1"
+                    "etp21"
                 ],
                 "2x400G": [
-                    "Ethernet21/1",
-                    "Ethernet21/5"
+                    "etp21a",
+                    "etp21b"
                 ],
                 "4x200G": [
-                    "Ethernet21/1",
-                    "Ethernet21/3",
-                    "Ethernet21/5",
-                    "Ethernet21/7"
+                    "etp21a",
+                    "etp21b",
+                    "etp21c",
+                    "etp21d"
                 ],
                 "8x100G": [
-                    "Ethernet21/1",
-                    "Ethernet21/2",
-                    "Ethernet21/3",
-                    "Ethernet21/4",
-                    "Ethernet21/5",
-                    "Ethernet21/6",
-                    "Ethernet21/7",
-                    "Ethernet21/8"
+                    "etp21a",
+                    "etp21b",
+                    "etp21c",
+                    "etp21d",
+                    "etp21e",
+                    "etp21f",
+                    "etp21g",
+                    "etp21h"
                 ]
             }
         },
@@ -991,30 +991,30 @@
             "lanes": "169,170,171,172,173,174,175,176",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet22/1"
+                    "etp22"
                 ],
                 "1x400G": [
-                    "Ethernet22/1"
+                    "etp22"
                 ],
                 "2x400G": [
-                    "Ethernet22/1",
-                    "Ethernet22/5"
+                    "etp22a",
+                    "etp22b"
                 ],
                 "4x200G": [
-                    "Ethernet22/1",
-                    "Ethernet22/3",
-                    "Ethernet22/5",
-                    "Ethernet22/7"
+                    "etp22a",
+                    "etp22b",
+                    "etp22c",
+                    "etp22d"
                 ],
                 "8x100G": [
-                    "Ethernet22/1",
-                    "Ethernet22/2",
-                    "Ethernet22/3",
-                    "Ethernet22/4",
-                    "Ethernet22/5",
-                    "Ethernet22/6",
-                    "Ethernet22/7",
-                    "Ethernet22/8"
+                    "etp22a",
+                    "etp22b",
+                    "etp22c",
+                    "etp22d",
+                    "etp22e",
+                    "etp22f",
+                    "etp22g",
+                    "etp22h"
                 ]
             }
         },
@@ -1023,30 +1023,30 @@
             "lanes": "161,162,163,164,165,166,167,168",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet23/1"
+                    "etp23"
                 ],
                 "1x400G": [
-                    "Ethernet23/1"
+                    "etp23"
                 ],
                 "2x400G": [
-                    "Ethernet23/1",
-                    "Ethernet23/5"
+                    "etp23a",
+                    "etp23b"
                 ],
                 "4x200G": [
-                    "Ethernet23/1",
-                    "Ethernet23/3",
-                    "Ethernet23/5",
-                    "Ethernet23/7"
+                    "etp23a",
+                    "etp23b",
+                    "etp23c",
+                    "etp23d"
                 ],
                 "8x100G": [
-                    "Ethernet23/1",
-                    "Ethernet23/2",
-                    "Ethernet23/3",
-                    "Ethernet23/4",
-                    "Ethernet23/5",
-                    "Ethernet23/6",
-                    "Ethernet23/7",
-                    "Ethernet23/8"
+                    "etp23a",
+                    "etp23b",
+                    "etp23c",
+                    "etp23d",
+                    "etp23e",
+                    "etp23f",
+                    "etp23g",
+                    "etp23h"
                 ]
             }
         },
@@ -1055,30 +1055,30 @@
             "lanes": "177,178,179,180,181,182,183,184",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet24/1"
+                    "etp24"
                 ],
                 "1x400G": [
-                    "Ethernet24/1"
+                    "etp24"
                 ],
                 "2x400G": [
-                    "Ethernet24/1",
-                    "Ethernet24/5"
+                    "etp24a",
+                    "etp24b"
                 ],
                 "4x200G": [
-                    "Ethernet24/1",
-                    "Ethernet24/3",
-                    "Ethernet24/5",
-                    "Ethernet24/7"
+                    "etp24a",
+                    "etp24b",
+                    "etp24c",
+                    "etp24d"
                 ],
                 "8x100G": [
-                    "Ethernet24/1",
-                    "Ethernet24/2",
-                    "Ethernet24/3",
-                    "Ethernet24/4",
-                    "Ethernet24/5",
-                    "Ethernet24/6",
-                    "Ethernet24/7",
-                    "Ethernet24/8"
+                    "etp24a",
+                    "etp24b",
+                    "etp24c",
+                    "etp24d",
+                    "etp24e",
+                    "etp24f",
+                    "etp24g",
+                    "etp24h"
                 ]
             }
         },
@@ -1087,30 +1087,30 @@
             "lanes": "217,218,219,220,221,222,223,224",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet25/1"
+                    "etp25"
                 ],
                 "1x400G": [
-                    "Ethernet25/1"
+                    "etp25"
                 ],
                 "2x400G": [
-                    "Ethernet25/1",
-                    "Ethernet25/5"
+                    "etp25a",
+                    "etp25b"
                 ],
                 "4x200G": [
-                    "Ethernet25/1",
-                    "Ethernet25/3",
-                    "Ethernet25/5",
-                    "Ethernet25/7"
+                    "etp25a",
+                    "etp25b",
+                    "etp25c",
+                    "etp25d"
                 ],
                 "8x100G": [
-                    "Ethernet25/1",
-                    "Ethernet25/2",
-                    "Ethernet25/3",
-                    "Ethernet25/4",
-                    "Ethernet25/5",
-                    "Ethernet25/6",
-                    "Ethernet25/7",
-                    "Ethernet25/8"
+                    "etp25a",
+                    "etp25b",
+                    "etp25c",
+                    "etp25d",
+                    "etp25e",
+                    "etp25f",
+                    "etp25g",
+                    "etp25h"
                 ]
             }
         },
@@ -1119,30 +1119,30 @@
             "lanes": "201,202,203,204,205,206,207,208",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet26/1"
+                    "etp26"
                 ],
                 "1x400G": [
-                    "Ethernet26/1"
+                    "etp26"
                 ],
                 "2x400G": [
-                    "Ethernet26/1",
-                    "Ethernet26/5"
+                    "etp26a",
+                    "etp26b"
                 ],
                 "4x200G": [
-                    "Ethernet26/1",
-                    "Ethernet26/3",
-                    "Ethernet26/5",
-                    "Ethernet26/7"
+                    "etp26a",
+                    "etp26b",
+                    "etp26c",
+                    "etp26d"
                 ],
                 "8x100G": [
-                    "Ethernet26/1",
-                    "Ethernet26/2",
-                    "Ethernet26/3",
-                    "Ethernet26/4",
-                    "Ethernet26/5",
-                    "Ethernet26/6",
-                    "Ethernet26/7",
-                    "Ethernet26/8"
+                    "etp26a",
+                    "etp26b",
+                    "etp26c",
+                    "etp26d",
+                    "etp26e",
+                    "etp26f",
+                    "etp26g",
+                    "etp26h"
                 ]
             }
         },
@@ -1151,30 +1151,30 @@
             "lanes": "193,194,195,196,197,198,199,200",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet27/1"
+                    "etp27"
                 ],
                 "1x400G": [
-                    "Ethernet27/1"
+                    "etp27"
                 ],
                 "2x400G": [
-                    "Ethernet27/1",
-                    "Ethernet27/5"
+                    "etp27a",
+                    "etp27b"
                 ],
                 "4x200G": [
-                    "Ethernet27/1",
-                    "Ethernet27/3",
-                    "Ethernet27/5",
-                    "Ethernet27/7"
+                    "etp27a",
+                    "etp27b",
+                    "etp27c",
+                    "etp27d"
                 ],
                 "8x100G": [
-                    "Ethernet27/1",
-                    "Ethernet27/2",
-                    "Ethernet27/3",
-                    "Ethernet27/4",
-                    "Ethernet27/5",
-                    "Ethernet27/6",
-                    "Ethernet27/7",
-                    "Ethernet27/8"
+                    "etp27a",
+                    "etp27b",
+                    "etp27c",
+                    "etp27d",
+                    "etp27e",
+                    "etp27f",
+                    "etp27g",
+                    "etp27h"
                 ]
             }
         },
@@ -1183,30 +1183,30 @@
             "lanes": "209,210,211,212,213,214,215,216",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet28/1"
+                    "etp28"
                 ],
                 "1x400G": [
-                    "Ethernet28/1"
+                    "etp28"
                 ],
                 "2x400G": [
-                    "Ethernet28/1",
-                    "Ethernet28/5"
+                    "etp28a",
+                    "etp28b"
                 ],
                 "4x200G": [
-                    "Ethernet28/1",
-                    "Ethernet28/3",
-                    "Ethernet28/5",
-                    "Ethernet28/7"
+                    "etp28a",
+                    "etp28b",
+                    "etp28c",
+                    "etp28d"
                 ],
                 "8x100G": [
-                    "Ethernet28/1",
-                    "Ethernet28/2",
-                    "Ethernet28/3",
-                    "Ethernet28/4",
-                    "Ethernet28/5",
-                    "Ethernet28/6",
-                    "Ethernet28/7",
-                    "Ethernet28/8"
+                    "etp28a",
+                    "etp28b",
+                    "etp28c",
+                    "etp28d",
+                    "etp28e",
+                    "etp28f",
+                    "etp28g",
+                    "etp28h"
                 ]
             }
         },
@@ -1215,30 +1215,30 @@
             "lanes": "249,250,251,252,253,254,255,256",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet29/1"
+                    "etp29"
                 ],
                 "1x400G": [
-                    "Ethernet29/1"
+                    "etp29"
                 ],
                 "2x400G": [
-                    "Ethernet29/1",
-                    "Ethernet29/5"
+                    "etp29a",
+                    "etp29b"
                 ],
                 "4x200G": [
-                    "Ethernet29/1",
-                    "Ethernet29/3",
-                    "Ethernet29/5",
-                    "Ethernet29/7"
+                    "etp29a",
+                    "etp29b",
+                    "etp29c",
+                    "etp29d"
                 ],
                 "8x100G": [
-                    "Ethernet29/1",
-                    "Ethernet29/2",
-                    "Ethernet29/3",
-                    "Ethernet29/4",
-                    "Ethernet29/5",
-                    "Ethernet29/6",
-                    "Ethernet29/7",
-                    "Ethernet29/8"
+                    "etp29a",
+                    "etp29b",
+                    "etp29c",
+                    "etp29d",
+                    "etp29e",
+                    "etp29f",
+                    "etp29g",
+                    "etp29h"
                 ]
             }
         },
@@ -1247,30 +1247,30 @@
             "lanes": "233,234,235,236,237,238,239,240",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet30/1"
+                    "etp30"
                 ],
                 "1x400G": [
-                    "Ethernet30/1"
+                    "etp30"
                 ],
                 "2x400G": [
-                    "Ethernet30/1",
-                    "Ethernet30/5"
+                    "etp30a",
+                    "etp30b"
                 ],
                 "4x200G": [
-                    "Ethernet30/1",
-                    "Ethernet30/3",
-                    "Ethernet30/5",
-                    "Ethernet30/7"
+                    "etp30a",
+                    "etp30b",
+                    "etp30c",
+                    "etp30d"
                 ],
                 "8x100G": [
-                    "Ethernet30/1",
-                    "Ethernet30/2",
-                    "Ethernet30/3",
-                    "Ethernet30/4",
-                    "Ethernet30/5",
-                    "Ethernet30/6",
-                    "Ethernet30/7",
-                    "Ethernet30/8"
+                    "etp30a",
+                    "etp30b",
+                    "etp30c",
+                    "etp30d",
+                    "etp30e",
+                    "etp30f",
+                    "etp30g",
+                    "etp30h"
                 ]
             }
         },
@@ -1279,30 +1279,30 @@
             "lanes": "225,226,227,228,229,230,231,232",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet31/1"
+                    "etp31"
                 ],
                 "1x400G": [
-                    "Ethernet31/1"
+                    "etp31"
                 ],
                 "2x400G": [
-                    "Ethernet31/1",
-                    "Ethernet31/5"
+                    "etp31a",
+                    "etp31b"
                 ],
                 "4x200G": [
-                    "Ethernet31/1",
-                    "Ethernet31/3",
-                    "Ethernet31/5",
-                    "Ethernet31/7"
+                    "etp31a",
+                    "etp31b",
+                    "etp31c",
+                    "etp31d"
                 ],
                 "8x100G": [
-                    "Ethernet31/1",
-                    "Ethernet31/2",
-                    "Ethernet31/3",
-                    "Ethernet31/4",
-                    "Ethernet31/5",
-                    "Ethernet31/6",
-                    "Ethernet31/7",
-                    "Ethernet31/8"
+                    "etp31a",
+                    "etp31b",
+                    "etp31c",
+                    "etp31d",
+                    "etp31e",
+                    "etp31f",
+                    "etp31g",
+                    "etp31h"
                 ]
             }
         },
@@ -1311,30 +1311,30 @@
             "lanes": "241,242,243,244,245,246,247,248",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet32/1"
+                    "etp32"
                 ],
                 "1x400G": [
-                    "Ethernet32/1"
+                    "etp32"
                 ],
                 "2x400G": [
-                    "Ethernet32/1",
-                    "Ethernet32/5"
+                    "etp32a",
+                    "etp32b"
                 ],
                 "4x200G": [
-                    "Ethernet32/1",
-                    "Ethernet32/3",
-                    "Ethernet32/5",
-                    "Ethernet32/7"
+                    "etp32a",
+                    "etp32b",
+                    "etp32c",
+                    "etp32d"
                 ],
                 "8x100G": [
-                    "Ethernet32/1",
-                    "Ethernet32/2",
-                    "Ethernet32/3",
-                    "Ethernet32/4",
-                    "Ethernet32/5",
-                    "Ethernet32/6",
-                    "Ethernet32/7",
-                    "Ethernet32/8"
+                    "etp32a",
+                    "etp32b",
+                    "etp32c",
+                    "etp32d",
+                    "etp32e",
+                    "etp32f",
+                    "etp32g",
+                    "etp32h"
                 ]
             }
         },
@@ -1343,30 +1343,30 @@
             "lanes": "273,274,275,276,277,278,279,280",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet33/1"
+                    "etp33"
                 ],
                 "1x400G": [
-                    "Ethernet33/1"
+                    "etp33"
                 ],
                 "2x400G": [
-                    "Ethernet33/1",
-                    "Ethernet33/5"
+                    "etp33a",
+                    "etp33b"
                 ],
                 "4x200G": [
-                    "Ethernet33/1",
-                    "Ethernet33/3",
-                    "Ethernet33/5",
-                    "Ethernet33/7"
+                    "etp33a",
+                    "etp33b",
+                    "etp33c",
+                    "etp33d"
                 ],
                 "8x100G": [
-                    "Ethernet33/1",
-                    "Ethernet33/2",
-                    "Ethernet33/3",
-                    "Ethernet33/4",
-                    "Ethernet33/5",
-                    "Ethernet33/6",
-                    "Ethernet33/7",
-                    "Ethernet33/8"
+                    "etp33a",
+                    "etp33b",
+                    "etp33c",
+                    "etp33d",
+                    "etp33e",
+                    "etp33f",
+                    "etp33g",
+                    "etp33h"
                 ]
             }
         },
@@ -1375,30 +1375,30 @@
             "lanes": "257,258,259,260,261,262,263,264",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet34/1"
+                    "etp34"
                 ],
                 "1x400G": [
-                    "Ethernet34/1"
+                    "etp34"
                 ],
                 "2x400G": [
-                    "Ethernet34/1",
-                    "Ethernet34/5"
+                    "etp34a",
+                    "etp34b"
                 ],
                 "4x200G": [
-                    "Ethernet34/1",
-                    "Ethernet34/3",
-                    "Ethernet34/5",
-                    "Ethernet34/7"
+                    "etp34a",
+                    "etp34b",
+                    "etp34c",
+                    "etp34d"
                 ],
                 "8x100G": [
-                    "Ethernet34/1",
-                    "Ethernet34/2",
-                    "Ethernet34/3",
-                    "Ethernet34/4",
-                    "Ethernet34/5",
-                    "Ethernet34/6",
-                    "Ethernet34/7",
-                    "Ethernet34/8"
+                    "etp34a",
+                    "etp34b",
+                    "etp34c",
+                    "etp34d",
+                    "etp34e",
+                    "etp34f",
+                    "etp34g",
+                    "etp34h"
                 ]
             }
         },
@@ -1407,30 +1407,30 @@
             "lanes": "265,266,267,268,269,270,271,272",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet35/1"
+                    "etp35"
                 ],
                 "1x400G": [
-                    "Ethernet35/1"
+                    "etp35"
                 ],
                 "2x400G": [
-                    "Ethernet35/1",
-                    "Ethernet35/5"
+                    "etp35a",
+                    "etp35b"
                 ],
                 "4x200G": [
-                    "Ethernet35/1",
-                    "Ethernet35/3",
-                    "Ethernet35/5",
-                    "Ethernet35/7"
+                    "etp35a",
+                    "etp35b",
+                    "etp35c",
+                    "etp35d"
                 ],
                 "8x100G": [
-                    "Ethernet35/1",
-                    "Ethernet35/2",
-                    "Ethernet35/3",
-                    "Ethernet35/4",
-                    "Ethernet35/5",
-                    "Ethernet35/6",
-                    "Ethernet35/7",
-                    "Ethernet35/8"
+                    "etp35a",
+                    "etp35b",
+                    "etp35c",
+                    "etp35d",
+                    "etp35e",
+                    "etp35f",
+                    "etp35g",
+                    "etp35h"
                 ]
             }
         },
@@ -1439,30 +1439,30 @@
             "lanes": "281,282,283,284,285,286,287,288",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet36/1"
+                    "etp36"
                 ],
                 "1x400G": [
-                    "Ethernet36/1"
+                    "etp36"
                 ],
                 "2x400G": [
-                    "Ethernet36/1",
-                    "Ethernet36/5"
+                    "etp36a",
+                    "etp36b"
                 ],
                 "4x200G": [
-                    "Ethernet36/1",
-                    "Ethernet36/3",
-                    "Ethernet36/5",
-                    "Ethernet36/7"
+                    "etp36a",
+                    "etp36b",
+                    "etp36c",
+                    "etp36d"
                 ],
                 "8x100G": [
-                    "Ethernet36/1",
-                    "Ethernet36/2",
-                    "Ethernet36/3",
-                    "Ethernet36/4",
-                    "Ethernet36/5",
-                    "Ethernet36/6",
-                    "Ethernet36/7",
-                    "Ethernet36/8"
+                    "etp36a",
+                    "etp36b",
+                    "etp36c",
+                    "etp36d",
+                    "etp36e",
+                    "etp36f",
+                    "etp36g",
+                    "etp36h"
                 ]
             }
         },
@@ -1471,30 +1471,30 @@
             "lanes": "313,314,315,316,317,318,319,320",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet37/1"
+                    "etp37"
                 ],
                 "1x400G": [
-                    "Ethernet37/1"
+                    "etp37"
                 ],
                 "2x400G": [
-                    "Ethernet37/1",
-                    "Ethernet37/5"
+                    "etp37a",
+                    "etp37b"
                 ],
                 "4x200G": [
-                    "Ethernet37/1",
-                    "Ethernet37/3",
-                    "Ethernet37/5",
-                    "Ethernet37/7"
+                    "etp37a",
+                    "etp37b",
+                    "etp37c",
+                    "etp37d"
                 ],
                 "8x100G": [
-                    "Ethernet37/1",
-                    "Ethernet37/2",
-                    "Ethernet37/3",
-                    "Ethernet37/4",
-                    "Ethernet37/5",
-                    "Ethernet37/6",
-                    "Ethernet37/7",
-                    "Ethernet37/8"
+                    "etp37a",
+                    "etp37b",
+                    "etp37c",
+                    "etp37d",
+                    "etp37e",
+                    "etp37f",
+                    "etp37g",
+                    "etp37h"
                 ]
             }
         },
@@ -1503,30 +1503,30 @@
             "lanes": "297,298,299,300,301,302,303,304",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet38/1"
+                    "etp38"
                 ],
                 "1x400G": [
-                    "Ethernet38/1"
+                    "etp38"
                 ],
                 "2x400G": [
-                    "Ethernet38/1",
-                    "Ethernet38/5"
+                    "etp38a",
+                    "etp38b"
                 ],
                 "4x200G": [
-                    "Ethernet38/1",
-                    "Ethernet38/3",
-                    "Ethernet38/5",
-                    "Ethernet38/7"
+                    "etp38a",
+                    "etp38b",
+                    "etp38c",
+                    "etp38d"
                 ],
                 "8x100G": [
-                    "Ethernet38/1",
-                    "Ethernet38/2",
-                    "Ethernet38/3",
-                    "Ethernet38/4",
-                    "Ethernet38/5",
-                    "Ethernet38/6",
-                    "Ethernet38/7",
-                    "Ethernet38/8"
+                    "etp38a",
+                    "etp38b",
+                    "etp38c",
+                    "etp38d",
+                    "etp38e",
+                    "etp38f",
+                    "etp38g",
+                    "etp38h"
                 ]
             }
         },
@@ -1535,30 +1535,30 @@
             "lanes": "289,290,291,292,293,294,295,296",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet39/1"
+                    "etp39"
                 ],
                 "1x400G": [
-                    "Ethernet39/1"
+                    "etp39"
                 ],
                 "2x400G": [
-                    "Ethernet39/1",
-                    "Ethernet39/5"
+                    "etp39a",
+                    "etp39b"
                 ],
                 "4x200G": [
-                    "Ethernet39/1",
-                    "Ethernet39/3",
-                    "Ethernet39/5",
-                    "Ethernet39/7"
+                    "etp39a",
+                    "etp39b",
+                    "etp39c",
+                    "etp39d"
                 ],
                 "8x100G": [
-                    "Ethernet39/1",
-                    "Ethernet39/2",
-                    "Ethernet39/3",
-                    "Ethernet39/4",
-                    "Ethernet39/5",
-                    "Ethernet39/6",
-                    "Ethernet39/7",
-                    "Ethernet39/8"
+                    "etp39a",
+                    "etp39b",
+                    "etp39c",
+                    "etp39d",
+                    "etp39e",
+                    "etp39f",
+                    "etp39g",
+                    "etp39h"
                 ]
             }
         },
@@ -1567,30 +1567,30 @@
             "lanes": "305,306,307,308,309,310,311,312",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet40/1"
+                    "etp40"
                 ],
                 "1x400G": [
-                    "Ethernet40/1"
+                    "etp40"
                 ],
                 "2x400G": [
-                    "Ethernet40/1",
-                    "Ethernet40/5"
+                    "etp40a",
+                    "etp40b"
                 ],
                 "4x200G": [
-                    "Ethernet40/1",
-                    "Ethernet40/3",
-                    "Ethernet40/5",
-                    "Ethernet40/7"
+                    "etp40a",
+                    "etp40b",
+                    "etp40c",
+                    "etp40d"
                 ],
                 "8x100G": [
-                    "Ethernet40/1",
-                    "Ethernet40/2",
-                    "Ethernet40/3",
-                    "Ethernet40/4",
-                    "Ethernet40/5",
-                    "Ethernet40/6",
-                    "Ethernet40/7",
-                    "Ethernet40/8"
+                    "etp40a",
+                    "etp40b",
+                    "etp40c",
+                    "etp40d",
+                    "etp40e",
+                    "etp40f",
+                    "etp40g",
+                    "etp40h"
                 ]
             }
         },
@@ -1599,30 +1599,30 @@
             "lanes": "345,346,347,348,349,350,351,352",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet41/1"
+                    "etp41"
                 ],
                 "1x400G": [
-                    "Ethernet41/1"
+                    "etp41"
                 ],
                 "2x400G": [
-                    "Ethernet41/1",
-                    "Ethernet41/5"
+                    "etp41a",
+                    "etp41b"
                 ],
                 "4x200G": [
-                    "Ethernet41/1",
-                    "Ethernet41/3",
-                    "Ethernet41/5",
-                    "Ethernet41/7"
+                    "etp41a",
+                    "etp41b",
+                    "etp41c",
+                    "etp41d"
                 ],
                 "8x100G": [
-                    "Ethernet41/1",
-                    "Ethernet41/2",
-                    "Ethernet41/3",
-                    "Ethernet41/4",
-                    "Ethernet41/5",
-                    "Ethernet41/6",
-                    "Ethernet41/7",
-                    "Ethernet41/8"
+                    "etp41a",
+                    "etp41b",
+                    "etp41c",
+                    "etp41d",
+                    "etp41e",
+                    "etp41f",
+                    "etp41g",
+                    "etp41h"
                 ]
             }
         },
@@ -1631,30 +1631,30 @@
             "lanes": "329,330,331,332,333,334,335,336",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet42/1"
+                    "etp42"
                 ],
                 "1x400G": [
-                    "Ethernet42/1"
+                    "etp42"
                 ],
                 "2x400G": [
-                    "Ethernet42/1",
-                    "Ethernet42/5"
+                    "etp42a",
+                    "etp42b"
                 ],
                 "4x200G": [
-                    "Ethernet42/1",
-                    "Ethernet42/3",
-                    "Ethernet42/5",
-                    "Ethernet42/7"
+                    "etp42a",
+                    "etp42b",
+                    "etp42c",
+                    "etp42d"
                 ],
                 "8x100G": [
-                    "Ethernet42/1",
-                    "Ethernet42/2",
-                    "Ethernet42/3",
-                    "Ethernet42/4",
-                    "Ethernet42/5",
-                    "Ethernet42/6",
-                    "Ethernet42/7",
-                    "Ethernet42/8"
+                    "etp42a",
+                    "etp42b",
+                    "etp42c",
+                    "etp42d",
+                    "etp42e",
+                    "etp42f",
+                    "etp42g",
+                    "etp42h"
                 ]
             }
         },
@@ -1663,30 +1663,30 @@
             "lanes": "321,322,323,324,325,326,327,328",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet43/1"
+                    "etp43"
                 ],
                 "1x400G": [
-                    "Ethernet43/1"
+                    "etp43"
                 ],
                 "2x400G": [
-                    "Ethernet43/1",
-                    "Ethernet43/5"
+                    "etp43a",
+                    "etp43b"
                 ],
                 "4x200G": [
-                    "Ethernet43/1",
-                    "Ethernet43/3",
-                    "Ethernet43/5",
-                    "Ethernet43/7"
+                    "etp43a",
+                    "etp43b",
+                    "etp43c",
+                    "etp43d"
                 ],
                 "8x100G": [
-                    "Ethernet43/1",
-                    "Ethernet43/2",
-                    "Ethernet43/3",
-                    "Ethernet43/4",
-                    "Ethernet43/5",
-                    "Ethernet43/6",
-                    "Ethernet43/7",
-                    "Ethernet43/8"
+                    "etp43a",
+                    "etp43b",
+                    "etp43c",
+                    "etp43d",
+                    "etp43e",
+                    "etp43f",
+                    "etp43g",
+                    "etp43h"
                 ]
             }
         },
@@ -1695,30 +1695,30 @@
             "lanes": "337,338,339,340,341,342,343,344",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet44/1"
+                    "etp44"
                 ],
                 "1x400G": [
-                    "Ethernet44/1"
+                    "etp44"
                 ],
                 "2x400G": [
-                    "Ethernet44/1",
-                    "Ethernet44/5"
+                    "etp44a",
+                    "etp44b"
                 ],
                 "4x200G": [
-                    "Ethernet44/1",
-                    "Ethernet44/3",
-                    "Ethernet44/5",
-                    "Ethernet44/7"
+                    "etp44a",
+                    "etp44b",
+                    "etp44c",
+                    "etp44d"
                 ],
                 "8x100G": [
-                    "Ethernet44/1",
-                    "Ethernet44/2",
-                    "Ethernet44/3",
-                    "Ethernet44/4",
-                    "Ethernet44/5",
-                    "Ethernet44/6",
-                    "Ethernet44/7",
-                    "Ethernet44/8"
+                    "etp44a",
+                    "etp44b",
+                    "etp44c",
+                    "etp44d",
+                    "etp44e",
+                    "etp44f",
+                    "etp44g",
+                    "etp44h"
                 ]
             }
         },
@@ -1727,30 +1727,30 @@
             "lanes": "377,378,379,380,381,382,383,384",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet45/1"
+                    "etp45"
                 ],
                 "1x400G": [
-                    "Ethernet45/1"
+                    "etp45"
                 ],
                 "2x400G": [
-                    "Ethernet45/1",
-                    "Ethernet45/5"
+                    "etp45a",
+                    "etp45b"
                 ],
                 "4x200G": [
-                    "Ethernet45/1",
-                    "Ethernet45/3",
-                    "Ethernet45/5",
-                    "Ethernet45/7"
+                    "etp45a",
+                    "etp45b",
+                    "etp45c",
+                    "etp45d"
                 ],
                 "8x100G": [
-                    "Ethernet45/1",
-                    "Ethernet45/2",
-                    "Ethernet45/3",
-                    "Ethernet45/4",
-                    "Ethernet45/5",
-                    "Ethernet45/6",
-                    "Ethernet45/7",
-                    "Ethernet45/8"
+                    "etp45a",
+                    "etp45b",
+                    "etp45c",
+                    "etp45d",
+                    "etp45e",
+                    "etp45f",
+                    "etp45g",
+                    "etp45h"
                 ]
             }
         },
@@ -1759,30 +1759,30 @@
             "lanes": "361,362,363,364,365,366,367,368",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet46/1"
+                    "etp46"
                 ],
                 "1x400G": [
-                    "Ethernet46/1"
+                    "etp46"
                 ],
                 "2x400G": [
-                    "Ethernet46/1",
-                    "Ethernet46/5"
+                    "etp46a",
+                    "etp46b"
                 ],
                 "4x200G": [
-                    "Ethernet46/1",
-                    "Ethernet46/3",
-                    "Ethernet46/5",
-                    "Ethernet46/7"
+                    "etp46a",
+                    "etp46b",
+                    "etp46c",
+                    "etp46d"
                 ],
                 "8x100G": [
-                    "Ethernet46/1",
-                    "Ethernet46/2",
-                    "Ethernet46/3",
-                    "Ethernet46/4",
-                    "Ethernet46/5",
-                    "Ethernet46/6",
-                    "Ethernet46/7",
-                    "Ethernet46/8"
+                    "etp46a",
+                    "etp46b",
+                    "etp46c",
+                    "etp46d",
+                    "etp46e",
+                    "etp46f",
+                    "etp46g",
+                    "etp46h"
                 ]
             }
         },
@@ -1791,30 +1791,30 @@
             "lanes": "353,354,355,356,357,358,359,360",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet47/1"
+                    "etp47"
                 ],
                 "1x400G": [
-                    "Ethernet47/1"
+                    "etp47"
                 ],
                 "2x400G": [
-                    "Ethernet47/1",
-                    "Ethernet47/5"
+                    "etp47a",
+                    "etp47b"
                 ],
                 "4x200G": [
-                    "Ethernet47/1",
-                    "Ethernet47/3",
-                    "Ethernet47/5",
-                    "Ethernet47/7"
+                    "etp47a",
+                    "etp47b",
+                    "etp47c",
+                    "etp47d"
                 ],
                 "8x100G": [
-                    "Ethernet47/1",
-                    "Ethernet47/2",
-                    "Ethernet47/3",
-                    "Ethernet47/4",
-                    "Ethernet47/5",
-                    "Ethernet47/6",
-                    "Ethernet47/7",
-                    "Ethernet47/8"
+                    "etp47a",
+                    "etp47b",
+                    "etp47c",
+                    "etp47d",
+                    "etp47e",
+                    "etp47f",
+                    "etp47g",
+                    "etp47h"
                 ]
             }
         },
@@ -1823,30 +1823,30 @@
             "lanes": "369,370,371,372,373,374,375,376",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet48/1"
+                    "etp48"
                 ],
                 "1x400G": [
-                    "Ethernet48/1"
+                    "etp48"
                 ],
                 "2x400G": [
-                    "Ethernet48/1",
-                    "Ethernet48/5"
+                    "etp48a",
+                    "etp48b"
                 ],
                 "4x200G": [
-                    "Ethernet48/1",
-                    "Ethernet48/3",
-                    "Ethernet48/5",
-                    "Ethernet48/7"
+                    "etp48a",
+                    "etp48b",
+                    "etp48c",
+                    "etp48d"
                 ],
                 "8x100G": [
-                    "Ethernet48/1",
-                    "Ethernet48/2",
-                    "Ethernet48/3",
-                    "Ethernet48/4",
-                    "Ethernet48/5",
-                    "Ethernet48/6",
-                    "Ethernet48/7",
-                    "Ethernet48/8"
+                    "etp48a",
+                    "etp48b",
+                    "etp48c",
+                    "etp48d",
+                    "etp48e",
+                    "etp48f",
+                    "etp48g",
+                    "etp48h"
                 ]
             }
         },
@@ -1855,30 +1855,30 @@
             "lanes": "409,410,411,412,413,414,415,416",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet49/1"
+                    "etp49"
                 ],
                 "1x400G": [
-                    "Ethernet49/1"
+                    "etp49"
                 ],
                 "2x400G": [
-                    "Ethernet49/1",
-                    "Ethernet49/5"
+                    "etp49a",
+                    "etp49b"
                 ],
                 "4x200G": [
-                    "Ethernet49/1",
-                    "Ethernet49/3",
-                    "Ethernet49/5",
-                    "Ethernet49/7"
+                    "etp49a",
+                    "etp49b",
+                    "etp49c",
+                    "etp49d"
                 ],
                 "8x100G": [
-                    "Ethernet49/1",
-                    "Ethernet49/2",
-                    "Ethernet49/3",
-                    "Ethernet49/4",
-                    "Ethernet49/5",
-                    "Ethernet49/6",
-                    "Ethernet49/7",
-                    "Ethernet49/8"
+                    "etp49a",
+                    "etp49b",
+                    "etp49c",
+                    "etp49d",
+                    "etp49e",
+                    "etp49f",
+                    "etp49g",
+                    "etp49h"
                 ]
             }
         },
@@ -1887,30 +1887,30 @@
             "lanes": "393,394,395,396,397,398,399,400",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet50/1"
+                    "etp50"
                 ],
                 "1x400G": [
-                    "Ethernet50/1"
+                    "etp50"
                 ],
                 "2x400G": [
-                    "Ethernet50/1",
-                    "Ethernet50/5"
+                    "etp50a",
+                    "etp50b"
                 ],
                 "4x200G": [
-                    "Ethernet50/1",
-                    "Ethernet50/3",
-                    "Ethernet50/5",
-                    "Ethernet50/7"
+                    "etp50a",
+                    "etp50b",
+                    "etp50c",
+                    "etp50d"
                 ],
                 "8x100G": [
-                    "Ethernet50/1",
-                    "Ethernet50/2",
-                    "Ethernet50/3",
-                    "Ethernet50/4",
-                    "Ethernet50/5",
-                    "Ethernet50/6",
-                    "Ethernet50/7",
-                    "Ethernet50/8"
+                    "etp50a",
+                    "etp50b",
+                    "etp50c",
+                    "etp50d",
+                    "etp50e",
+                    "etp50f",
+                    "etp50g",
+                    "etp50h"
                 ]
             }
         },
@@ -1919,30 +1919,30 @@
             "lanes": "385,386,387,388,389,390,391,392",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet51/1"
+                    "etp51"
                 ],
                 "1x400G": [
-                    "Ethernet51/1"
+                    "etp51"
                 ],
                 "2x400G": [
-                    "Ethernet51/1",
-                    "Ethernet51/5"
+                    "etp51a",
+                    "etp51b"
                 ],
                 "4x200G": [
-                    "Ethernet51/1",
-                    "Ethernet51/3",
-                    "Ethernet51/5",
-                    "Ethernet51/7"
+                    "etp51a",
+                    "etp51b",
+                    "etp51c",
+                    "etp51d"
                 ],
                 "8x100G": [
-                    "Ethernet51/1",
-                    "Ethernet51/2",
-                    "Ethernet51/3",
-                    "Ethernet51/4",
-                    "Ethernet51/5",
-                    "Ethernet51/6",
-                    "Ethernet51/7",
-                    "Ethernet51/8"
+                    "etp51a",
+                    "etp51b",
+                    "etp51c",
+                    "etp51d",
+                    "etp51e",
+                    "etp51f",
+                    "etp51g",
+                    "etp51h"
                 ]
             }
         },
@@ -1951,30 +1951,30 @@
             "lanes": "401,402,403,404,405,406,407,408",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet52/1"
+                    "etp52"
                 ],
                 "1x400G": [
-                    "Ethernet52/1"
+                    "etp52"
                 ],
                 "2x400G": [
-                    "Ethernet52/1",
-                    "Ethernet52/5"
+                    "etp52a",
+                    "etp52b"
                 ],
                 "4x200G": [
-                    "Ethernet52/1",
-                    "Ethernet52/3",
-                    "Ethernet52/5",
-                    "Ethernet52/7"
+                    "etp52a",
+                    "etp52b",
+                    "etp52c",
+                    "etp52d"
                 ],
                 "8x100G": [
-                    "Ethernet52/1",
-                    "Ethernet52/2",
-                    "Ethernet52/3",
-                    "Ethernet52/4",
-                    "Ethernet52/5",
-                    "Ethernet52/6",
-                    "Ethernet52/7",
-                    "Ethernet52/8"
+                    "etp52a",
+                    "etp52b",
+                    "etp52c",
+                    "etp52d",
+                    "etp52e",
+                    "etp52f",
+                    "etp52g",
+                    "etp52h"
                 ]
             }
         },
@@ -1983,30 +1983,30 @@
             "lanes": "441,442,443,444,445,446,447,448",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet53/1"
+                    "etp53"
                 ],
                 "1x400G": [
-                    "Ethernet53/1"
+                    "etp53"
                 ],
                 "2x400G": [
-                    "Ethernet53/1",
-                    "Ethernet53/5"
+                    "etp53a",
+                    "etp53b"
                 ],
                 "4x200G": [
-                    "Ethernet53/1",
-                    "Ethernet53/3",
-                    "Ethernet53/5",
-                    "Ethernet53/7"
+                    "etp53a",
+                    "etp53b",
+                    "etp53c",
+                    "etp53d"
                 ],
                 "8x100G": [
-                    "Ethernet53/1",
-                    "Ethernet53/2",
-                    "Ethernet53/3",
-                    "Ethernet53/4",
-                    "Ethernet53/5",
-                    "Ethernet53/6",
-                    "Ethernet53/7",
-                    "Ethernet53/8"
+                    "etp53a",
+                    "etp53b",
+                    "etp53c",
+                    "etp53d",
+                    "etp53e",
+                    "etp53f",
+                    "etp53g",
+                    "etp53h"
                 ]
             }
         },
@@ -2015,30 +2015,30 @@
             "lanes": "425,426,427,428,429,430,431,432",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet54/1"
+                    "etp54"
                 ],
                 "1x400G": [
-                    "Ethernet54/1"
+                    "etp54"
                 ],
                 "2x400G": [
-                    "Ethernet54/1",
-                    "Ethernet54/5"
+                    "etp54a",
+                    "etp54b"
                 ],
                 "4x200G": [
-                    "Ethernet54/1",
-                    "Ethernet54/3",
-                    "Ethernet54/5",
-                    "Ethernet54/7"
+                    "etp54a",
+                    "etp54b",
+                    "etp54c",
+                    "etp54d"
                 ],
                 "8x100G": [
-                    "Ethernet54/1",
-                    "Ethernet54/2",
-                    "Ethernet54/3",
-                    "Ethernet54/4",
-                    "Ethernet54/5",
-                    "Ethernet54/6",
-                    "Ethernet54/7",
-                    "Ethernet54/8"
+                    "etp54a",
+                    "etp54b",
+                    "etp54c",
+                    "etp54d",
+                    "etp54e",
+                    "etp54f",
+                    "etp54g",
+                    "etp54h"
                 ]
             }
         },
@@ -2047,30 +2047,30 @@
             "lanes": "417,418,419,420,421,422,423,424",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet55/1"
+                    "etp55"
                 ],
                 "1x400G": [
-                    "Ethernet55/1"
+                    "etp55"
                 ],
                 "2x400G": [
-                    "Ethernet55/1",
-                    "Ethernet55/5"
+                    "etp55a",
+                    "etp55b"
                 ],
                 "4x200G": [
-                    "Ethernet55/1",
-                    "Ethernet55/3",
-                    "Ethernet55/5",
-                    "Ethernet55/7"
+                    "etp55a",
+                    "etp55b",
+                    "etp55c",
+                    "etp55d"
                 ],
                 "8x100G": [
-                    "Ethernet55/1",
-                    "Ethernet55/2",
-                    "Ethernet55/3",
-                    "Ethernet55/4",
-                    "Ethernet55/5",
-                    "Ethernet55/6",
-                    "Ethernet55/7",
-                    "Ethernet55/8"
+                    "etp55a",
+                    "etp55b",
+                    "etp55c",
+                    "etp55d",
+                    "etp55e",
+                    "etp55f",
+                    "etp55g",
+                    "etp55h"
                 ]
             }
         },
@@ -2079,30 +2079,30 @@
             "lanes": "433,434,435,436,437,438,439,440",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet56/1"
+                    "etp56"
                 ],
                 "1x400G": [
-                    "Ethernet56/1"
+                    "etp56"
                 ],
                 "2x400G": [
-                    "Ethernet56/1",
-                    "Ethernet56/5"
+                    "etp56a",
+                    "etp56b"
                 ],
                 "4x200G": [
-                    "Ethernet56/1",
-                    "Ethernet56/3",
-                    "Ethernet56/5",
-                    "Ethernet56/7"
+                    "etp56a",
+                    "etp56b",
+                    "etp56c",
+                    "etp56d"
                 ],
                 "8x100G": [
-                    "Ethernet56/1",
-                    "Ethernet56/2",
-                    "Ethernet56/3",
-                    "Ethernet56/4",
-                    "Ethernet56/5",
-                    "Ethernet56/6",
-                    "Ethernet56/7",
-                    "Ethernet56/8"
+                    "etp56a",
+                    "etp56b",
+                    "etp56c",
+                    "etp56d",
+                    "etp56e",
+                    "etp56f",
+                    "etp56g",
+                    "etp56h"
                 ]
             }
         },
@@ -2111,30 +2111,30 @@
             "lanes": "473,474,475,476,477,478,479,480",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet57/1"
+                    "etp57"
                 ],
                 "1x400G": [
-                    "Ethernet57/1"
+                    "etp57"
                 ],
                 "2x400G": [
-                    "Ethernet57/1",
-                    "Ethernet57/5"
+                    "etp57a",
+                    "etp57b"
                 ],
                 "4x200G": [
-                    "Ethernet57/1",
-                    "Ethernet57/3",
-                    "Ethernet57/5",
-                    "Ethernet57/7"
+                    "etp57a",
+                    "etp57b",
+                    "etp57c",
+                    "etp57d"
                 ],
                 "8x100G": [
-                    "Ethernet57/1",
-                    "Ethernet57/2",
-                    "Ethernet57/3",
-                    "Ethernet57/4",
-                    "Ethernet57/5",
-                    "Ethernet57/6",
-                    "Ethernet57/7",
-                    "Ethernet57/8"
+                    "etp57a",
+                    "etp57b",
+                    "etp57c",
+                    "etp57d",
+                    "etp57e",
+                    "etp57f",
+                    "etp57g",
+                    "etp57h"
                 ]
             }
         },
@@ -2143,30 +2143,30 @@
             "lanes": "457,458,459,460,461,462,463,464",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet58/1"
+                    "etp58"
                 ],
                 "1x400G": [
-                    "Ethernet58/1"
+                    "etp58"
                 ],
                 "2x400G": [
-                    "Ethernet58/1",
-                    "Ethernet58/5"
+                    "etp58a",
+                    "etp58b"
                 ],
                 "4x200G": [
-                    "Ethernet58/1",
-                    "Ethernet58/3",
-                    "Ethernet58/5",
-                    "Ethernet58/7"
+                    "etp58a",
+                    "etp58b",
+                    "etp58c",
+                    "etp58d"
                 ],
                 "8x100G": [
-                    "Ethernet58/1",
-                    "Ethernet58/2",
-                    "Ethernet58/3",
-                    "Ethernet58/4",
-                    "Ethernet58/5",
-                    "Ethernet58/6",
-                    "Ethernet58/7",
-                    "Ethernet58/8"
+                    "etp58a",
+                    "etp58b",
+                    "etp58c",
+                    "etp58d",
+                    "etp58e",
+                    "etp58f",
+                    "etp58g",
+                    "etp58h"
                 ]
             }
         },
@@ -2175,30 +2175,30 @@
             "lanes": "449,450,451,452,453,454,455,456",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet59/1"
+                    "etp59"
                 ],
                 "1x400G": [
-                    "Ethernet59/1"
+                    "etp59"
                 ],
                 "2x400G": [
-                    "Ethernet59/1",
-                    "Ethernet59/5"
+                    "etp59a",
+                    "etp59b"
                 ],
                 "4x200G": [
-                    "Ethernet59/1",
-                    "Ethernet59/3",
-                    "Ethernet59/5",
-                    "Ethernet59/7"
+                    "etp59a",
+                    "etp59b",
+                    "etp59c",
+                    "etp59d"
                 ],
                 "8x100G": [
-                    "Ethernet59/1",
-                    "Ethernet59/2",
-                    "Ethernet59/3",
-                    "Ethernet59/4",
-                    "Ethernet59/5",
-                    "Ethernet59/6",
-                    "Ethernet59/7",
-                    "Ethernet59/8"
+                    "etp59a",
+                    "etp59b",
+                    "etp59c",
+                    "etp59d",
+                    "etp59e",
+                    "etp59f",
+                    "etp59g",
+                    "etp59h"
                 ]
             }
         },
@@ -2207,30 +2207,30 @@
             "lanes": "465,466,467,468,469,470,471,472",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet60/1"
+                    "etp60"
                 ],
                 "1x400G": [
-                    "Ethernet60/1"
+                    "etp60"
                 ],
                 "2x400G": [
-                    "Ethernet60/1",
-                    "Ethernet60/5"
+                    "etp60a",
+                    "etp60b"
                 ],
                 "4x200G": [
-                    "Ethernet60/1",
-                    "Ethernet60/3",
-                    "Ethernet60/5",
-                    "Ethernet60/7"
+                    "etp60a",
+                    "etp60b",
+                    "etp60c",
+                    "etp60d"
                 ],
                 "8x100G": [
-                    "Ethernet60/1",
-                    "Ethernet60/2",
-                    "Ethernet60/3",
-                    "Ethernet60/4",
-                    "Ethernet60/5",
-                    "Ethernet60/6",
-                    "Ethernet60/7",
-                    "Ethernet60/8"
+                    "etp60a",
+                    "etp60b",
+                    "etp60c",
+                    "etp60d",
+                    "etp60e",
+                    "etp60f",
+                    "etp60g",
+                    "etp60h"
                 ]
             }
         },
@@ -2239,30 +2239,30 @@
             "lanes": "505,506,507,508,509,510,511,512",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet61/1"
+                    "etp61"
                 ],
                 "1x400G": [
-                    "Ethernet61/1"
+                    "etp61"
                 ],
                 "2x400G": [
-                    "Ethernet61/1",
-                    "Ethernet61/5"
+                    "etp61a",
+                    "etp61b"
                 ],
                 "4x200G": [
-                    "Ethernet61/1",
-                    "Ethernet61/3",
-                    "Ethernet61/5",
-                    "Ethernet61/7"
+                    "etp61a",
+                    "etp61b",
+                    "etp61c",
+                    "etp61d"
                 ],
                 "8x100G": [
-                    "Ethernet61/1",
-                    "Ethernet61/2",
-                    "Ethernet61/3",
-                    "Ethernet61/4",
-                    "Ethernet61/5",
-                    "Ethernet61/6",
-                    "Ethernet61/7",
-                    "Ethernet61/8"
+                    "etp61a",
+                    "etp61b",
+                    "etp61c",
+                    "etp61d",
+                    "etp61e",
+                    "etp61f",
+                    "etp61g",
+                    "etp61h"
                 ]
             }
         },
@@ -2271,30 +2271,30 @@
             "lanes": "489,490,491,492,493,494,495,496",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet62/1"
+                    "etp62"
                 ],
                 "1x400G": [
-                    "Ethernet62/1"
+                    "etp62"
                 ],
                 "2x400G": [
-                    "Ethernet62/1",
-                    "Ethernet62/5"
+                    "etp62a",
+                    "etp62b"
                 ],
                 "4x200G": [
-                    "Ethernet62/1",
-                    "Ethernet62/3",
-                    "Ethernet62/5",
-                    "Ethernet62/7"
+                    "etp62a",
+                    "etp62b",
+                    "etp62c",
+                    "etp62d"
                 ],
                 "8x100G": [
-                    "Ethernet62/1",
-                    "Ethernet62/2",
-                    "Ethernet62/3",
-                    "Ethernet62/4",
-                    "Ethernet62/5",
-                    "Ethernet62/6",
-                    "Ethernet62/7",
-                    "Ethernet62/8"
+                    "etp62a",
+                    "etp62b",
+                    "etp62c",
+                    "etp62d",
+                    "etp62e",
+                    "etp62f",
+                    "etp62g",
+                    "etp62h"
                 ]
             }
         },
@@ -2303,30 +2303,30 @@
             "lanes": "481,482,483,484,485,486,487,488",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet63/1"
+                    "etp63"
                 ],
                 "1x400G": [
-                    "Ethernet63/1"
+                    "etp63"
                 ],
                 "2x400G": [
-                    "Ethernet63/1",
-                    "Ethernet63/5"
+                    "etp63a",
+                    "etp63b"
                 ],
                 "4x200G": [
-                    "Ethernet63/1",
-                    "Ethernet63/3",
-                    "Ethernet63/5",
-                    "Ethernet63/7"
+                    "etp63a",
+                    "etp63b",
+                    "etp63c",
+                    "etp63d"
                 ],
                 "8x100G": [
-                    "Ethernet63/1",
-                    "Ethernet63/2",
-                    "Ethernet63/3",
-                    "Ethernet63/4",
-                    "Ethernet63/5",
-                    "Ethernet63/6",
-                    "Ethernet63/7",
-                    "Ethernet63/8"
+                    "etp63a",
+                    "etp63b",
+                    "etp63c",
+                    "etp63d",
+                    "etp63e",
+                    "etp63f",
+                    "etp63g",
+                    "etp63h"
                 ]
             }
         },
@@ -2335,30 +2335,30 @@
             "lanes": "497,498,499,500,501,502,503,504",
             "breakout_modes": {
                 "1x800G[400G]": [
-                    "Ethernet64/1"
+                    "etp64"
                 ],
                 "1x400G": [
-                    "Ethernet64/1"
+                    "etp64"
                 ],
                 "2x400G": [
-                    "Ethernet64/1",
-                    "Ethernet64/5"
+                    "etp64a",
+                    "etp64b"
                 ],
                 "4x200G": [
-                    "Ethernet64/1",
-                    "Ethernet64/3",
-                    "Ethernet64/5",
-                    "Ethernet64/7"
+                    "etp64a",
+                    "etp64b",
+                    "etp64c",
+                    "etp64d"
                 ],
                 "8x100G": [
-                    "Ethernet64/1",
-                    "Ethernet64/2",
-                    "Ethernet64/3",
-                    "Ethernet64/4",
-                    "Ethernet64/5",
-                    "Ethernet64/6",
-                    "Ethernet64/7",
-                    "Ethernet64/8"
+                    "etp64a",
+                    "etp64b",
+                    "etp64c",
+                    "etp64d",
+                    "etp64e",
+                    "etp64f",
+                    "etp64g",
+                    "etp64h"
                 ]
             }
         },
@@ -2367,7 +2367,7 @@
             "lanes": "513",
             "breakout_modes": {
                 "1x10G": [
-                    "Ethernet65"
+                    "etp65"
                 ]
             }
         },
@@ -2376,7 +2376,7 @@
             "lanes": "515",
             "breakout_modes": {
                 "1x10G": [
-                    "Ethernet66"
+                    "etp66"
                 ]
             }
         }
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffer_ports.j2
new file mode 100644
index 00000000000..2bfa3201691
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffer_ports.j2
@@ -0,0 +1,48 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for i in range(0, 12) %}
+        {%- for j in range(0, 8) %}
+            {%- if PORT_ALL.append("Ethernet%d" % (i * 8 + j)) %}{%- endif %}
+        {%- endfor %}
+    {%- endfor %}
+
+    {%- if PORT_ALL.append("Ethernet96") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet100") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet104") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet108") %}{%- endif %}
+
+    {%- for j in range(0, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (14 * 8 + j)) %}{%- endif %}
+    {%- endfor %}
+
+    {%- if PORT_ALL.append("Ethernet128") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet132") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet136") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet140") %}{%- endif %}
+
+    {%- for i in range(18, 44) %}
+        {%- for j in range(0, 8) %}
+            {%- if PORT_ALL.append("Ethernet%d" % (i * 8 + j)) %}{%- endif %}
+        {%- endfor %}
+    {%- endfor %}
+
+    {%- if PORT_ALL.append("Ethernet352") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet356") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet360") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet364") %}{%- endif %}
+
+    {%- for j in range(0, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (46 * 8 + j)) %}{%- endif %}
+    {%- endfor %}
+
+    {%- if PORT_ALL.append("Ethernet384") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet388") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet392") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet396") %}{%- endif %}
+
+    {%- for i in range(50, 64) %}
+        {%- for j in range(0, 8) %}
+            {%- if PORT_ALL.append("Ethernet%d" % (i * 8 + j)) %}{%- endif %}
+        {%- endfor %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers.json.j2
new file mode 100644
index 00000000000..0b1cb2c541b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t0.j2
new file mode 100644
index 00000000000..ca999aa35c9
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t0.j2
@@ -0,0 +1,180 @@
+{%- set default_cable = '0m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossy_pool": {
+            "size": "162910774",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossy_pool": {
+            "size": "162910774",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossy_pool",
+            "size": "0",
+            "static_th": "165364160"
+        },
+        {# fallback when no DEVICE_NEIGHBOR_METADATA -#}
+        "egress_lossy_profile": {
+            "dynamic_th": "1",
+            "pool": "egress_lossy_pool",
+            "size": "1778"
+        },
+        "QUEUE0_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE1_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE2_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE3_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE4_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE5_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-3"
+        },
+        "QUEUE6_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE0_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE1_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE2_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE3_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE4_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE5_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-3"
+        },
+        "QUEUE6_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        }
+    },
+{%- endmacro %}
+
+{# Skip BUFFER_PG #}
+{%- macro generate_pg_profils(ports) %}
+    "BUFFER_PG": {
+    },
+{%- endmacro %}
+
+{% if DEVICE_METADATA
+  and DEVICE_METADATA['localhost']
+  and DEVICE_METADATA['localhost'].type == "LeafRouter"
+  and DEVICE_NEIGHBOR
+  and DEVICE_NEIGHBOR_METADATA %}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    {% for port in ports.split(',') %}
+        {% if DEVICE_NEIGHBOR[port]
+          and DEVICE_NEIGHBOR[port].name
+          and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name]
+          and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'SpineRouter') %}
+            "{{ port }}|0": {
+                "profile": "QUEUE0_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|1": {
+                "profile": "QUEUE1_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|2": {
+                "profile": "QUEUE2_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|3": {
+                "profile": "QUEUE3_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|4": {
+                "profile": "QUEUE4_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|5": {
+                "profile": "QUEUE5_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|6": {
+                "profile": "QUEUE6_UPLINK_LOSSY_PROFILE"
+            }
+        {% else %}
+            "{{ port }}|0": {
+                "profile": "QUEUE0_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|1": {
+                "profile": "QUEUE1_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|2": {
+                "profile": "QUEUE2_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|3": {
+                "profile": "QUEUE3_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|4": {
+                "profile": "QUEUE4_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|5": {
+                "profile": "QUEUE5_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|6": {
+                "profile": "QUEUE6_DOWNLINK_LOSSY_PROFILE"
+            }
+        {% endif %}
+    {%- if not loop.last -%},{% endif %}
+    {% endfor %}
+    }
+{%- endmacro %}
+{% else %}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    {% for port in ports.split(',') %}
+        "{{ port }}|0-9": {
+            "profile" : "egress_lossy_profile"
+        }
+    {%- if not loop.last -%},{% endif %}
+    {% endfor %}
+    }
+{%- endmacro %}
+{% endif %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..ca999aa35c9
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t1.j2
@@ -0,0 +1,180 @@
+{%- set default_cable = '0m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossy_pool": {
+            "size": "162910774",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossy_pool": {
+            "size": "162910774",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossy_pool",
+            "size": "0",
+            "static_th": "165364160"
+        },
+        {# fallback when no DEVICE_NEIGHBOR_METADATA -#}
+        "egress_lossy_profile": {
+            "dynamic_th": "1",
+            "pool": "egress_lossy_pool",
+            "size": "1778"
+        },
+        "QUEUE0_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE1_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE2_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE3_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE4_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE5_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-3"
+        },
+        "QUEUE6_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE0_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE1_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE2_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE3_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE4_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE5_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-3"
+        },
+        "QUEUE6_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        }
+    },
+{%- endmacro %}
+
+{# Skip BUFFER_PG #}
+{%- macro generate_pg_profils(ports) %}
+    "BUFFER_PG": {
+    },
+{%- endmacro %}
+
+{% if DEVICE_METADATA
+  and DEVICE_METADATA['localhost']
+  and DEVICE_METADATA['localhost'].type == "LeafRouter"
+  and DEVICE_NEIGHBOR
+  and DEVICE_NEIGHBOR_METADATA %}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    {% for port in ports.split(',') %}
+        {% if DEVICE_NEIGHBOR[port]
+          and DEVICE_NEIGHBOR[port].name
+          and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name]
+          and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'SpineRouter') %}
+            "{{ port }}|0": {
+                "profile": "QUEUE0_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|1": {
+                "profile": "QUEUE1_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|2": {
+                "profile": "QUEUE2_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|3": {
+                "profile": "QUEUE3_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|4": {
+                "profile": "QUEUE4_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|5": {
+                "profile": "QUEUE5_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|6": {
+                "profile": "QUEUE6_UPLINK_LOSSY_PROFILE"
+            }
+        {% else %}
+            "{{ port }}|0": {
+                "profile": "QUEUE0_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|1": {
+                "profile": "QUEUE1_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|2": {
+                "profile": "QUEUE2_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|3": {
+                "profile": "QUEUE3_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|4": {
+                "profile": "QUEUE4_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|5": {
+                "profile": "QUEUE5_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|6": {
+                "profile": "QUEUE6_DOWNLINK_LOSSY_PROFILE"
+            }
+        {% endif %}
+    {%- if not loop.last -%},{% endif %}
+    {% endfor %}
+    }
+{%- endmacro %}
+{% else %}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    {% for port in ports.split(',') %}
+        "{{ port }}|0-9": {
+            "profile" : "egress_lossy_profile"
+        }
+    {%- if not loop.last -%},{% endif %}
+    {% endfor %}
+    }
+{%- endmacro %}
+{% endif %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/hwsku.json
new file mode 100644
index 00000000000..fe246439058
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/hwsku.json
@@ -0,0 +1,260 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/pg_profile_lookup.ini
new file mode 100644
index 00000000000..2e2b7e88e75
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/pg_profile_lookup.ini
@@ -0,0 +1,2 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/port_config.ini
new file mode 100644
index 00000000000..f9e767b05cb
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/port_config.ini
@@ -0,0 +1,465 @@
+# name       lanes            alias   index  speed   fec
+Ethernet0    17               etp1a   1      100000  rs
+Ethernet1    18               etp1b   1      100000  rs
+Ethernet2    19               etp1c   1      100000  rs
+Ethernet3    20               etp1d   1      100000  rs
+Ethernet4    21               etp1e   1      100000  rs
+Ethernet5    22               etp1f   1      100000  rs
+Ethernet6    23               etp1g   1      100000  rs
+Ethernet7    24               etp1h   1      100000  rs
+Ethernet8    1                etp2a   2      100000  rs
+Ethernet9    2                etp2b   2      100000  rs
+Ethernet10   3                etp2c   2      100000  rs
+Ethernet11   4                etp2d   2      100000  rs
+Ethernet12   5                etp2e   2      100000  rs
+Ethernet13   6                etp2f   2      100000  rs
+Ethernet14   7                etp2g   2      100000  rs
+Ethernet15   8                etp2h   2      100000  rs
+Ethernet16   9                etp3a   3      100000  rs
+Ethernet17   10               etp3b   3      100000  rs
+Ethernet18   11               etp3c   3      100000  rs
+Ethernet19   12               etp3d   3      100000  rs
+Ethernet20   13               etp3e   3      100000  rs
+Ethernet21   14               etp3f   3      100000  rs
+Ethernet22   15               etp3g   3      100000  rs
+Ethernet23   16               etp3h   3      100000  rs
+Ethernet24   25               etp4a   4      100000  rs
+Ethernet25   26               etp4b   4      100000  rs
+Ethernet26   27               etp4c   4      100000  rs
+Ethernet27   28               etp4d   4      100000  rs
+Ethernet28   29               etp4e   4      100000  rs
+Ethernet29   30               etp4f   4      100000  rs
+Ethernet30   31               etp4g   4      100000  rs
+Ethernet31   32               etp4h   4      100000  rs
+Ethernet32   57               etp5a   5      100000  rs
+Ethernet33   58               etp5b   5      100000  rs
+Ethernet34   59               etp5c   5      100000  rs
+Ethernet35   60               etp5d   5      100000  rs
+Ethernet36   61               etp5e   5      100000  rs
+Ethernet37   62               etp5f   5      100000  rs
+Ethernet38   63               etp5g   5      100000  rs
+Ethernet39   64               etp5h   5      100000  rs
+Ethernet40   41               etp6a   6      100000  rs
+Ethernet41   42               etp6b   6      100000  rs
+Ethernet42   43               etp6c   6      100000  rs
+Ethernet43   44               etp6d   6      100000  rs
+Ethernet44   45               etp6e   6      100000  rs
+Ethernet45   46               etp6f   6      100000  rs
+Ethernet46   47               etp6g   6      100000  rs
+Ethernet47   48               etp6h   6      100000  rs
+Ethernet48   33               etp7a   7      100000  rs
+Ethernet49   34               etp7b   7      100000  rs
+Ethernet50   35               etp7c   7      100000  rs
+Ethernet51   36               etp7d   7      100000  rs
+Ethernet52   37               etp7e   7      100000  rs
+Ethernet53   38               etp7f   7      100000  rs
+Ethernet54   39               etp7g   7      100000  rs
+Ethernet55   40               etp7h   7      100000  rs
+Ethernet56   49               etp8a   8      100000  rs
+Ethernet57   50               etp8b   8      100000  rs
+Ethernet58   51               etp8c   8      100000  rs
+Ethernet59   52               etp8d   8      100000  rs
+Ethernet60   53               etp8e   8      100000  rs
+Ethernet61   54               etp8f   8      100000  rs
+Ethernet62   55               etp8g   8      100000  rs
+Ethernet63   56               etp8h   8      100000  rs
+Ethernet64   89               etp9a   9      100000  rs
+Ethernet65   90               etp9b   9      100000  rs
+Ethernet66   91               etp9c   9      100000  rs
+Ethernet67   92               etp9d   9      100000  rs
+Ethernet68   93               etp9e   9      100000  rs
+Ethernet69   94               etp9f   9      100000  rs
+Ethernet70   95               etp9g   9      100000  rs
+Ethernet71   96               etp9h   9      100000  rs
+Ethernet72   73               etp10a  10     100000  rs
+Ethernet73   74               etp10b  10     100000  rs
+Ethernet74   75               etp10c  10     100000  rs
+Ethernet75   76               etp10d  10     100000  rs
+Ethernet76   77               etp10e  10     100000  rs
+Ethernet77   78               etp10f  10     100000  rs
+Ethernet78   79               etp10g  10     100000  rs
+Ethernet79   80               etp10h  10     100000  rs
+Ethernet80   65               etp11a  11     100000  rs
+Ethernet81   66               etp11b  11     100000  rs
+Ethernet82   67               etp11c  11     100000  rs
+Ethernet83   68               etp11d  11     100000  rs
+Ethernet84   69               etp11e  11     100000  rs
+Ethernet85   70               etp11f  11     100000  rs
+Ethernet86   71               etp11g  11     100000  rs
+Ethernet87   72               etp11h  11     100000  rs
+Ethernet88   81               etp12a  12     100000  rs
+Ethernet89   82               etp12b  12     100000  rs
+Ethernet90   83               etp12c  12     100000  rs
+Ethernet91   84               etp12d  12     100000  rs
+Ethernet92   85               etp12e  12     100000  rs
+Ethernet93   86               etp12f  12     100000  rs
+Ethernet94   87               etp12g  12     100000  rs
+Ethernet95   88               etp12h  12     100000  rs
+Ethernet96   121,122,123,124  etp13a  13     400000  rs
+Ethernet100  125,126,127,128  etp13b  13     400000  rs
+Ethernet104  105,106,107,108  etp14a  14     400000  rs
+Ethernet108  109,110,111,112  etp14b  14     400000  rs
+Ethernet112  97               etp15a  15     100000  rs
+Ethernet113  98               etp15b  15     100000  rs
+Ethernet114  99               etp15c  15     100000  rs
+Ethernet115  100              etp15d  15     100000  rs
+Ethernet116  101              etp15e  15     100000  rs
+Ethernet117  102              etp15f  15     100000  rs
+Ethernet118  103              etp15g  15     100000  rs
+Ethernet119  104              etp15h  15     100000  rs
+Ethernet120  113              etp16a  16     100000  rs
+Ethernet121  114              etp16b  16     100000  rs
+Ethernet122  115              etp16c  16     100000  rs
+Ethernet123  116              etp16d  16     100000  rs
+Ethernet124  117              etp16e  16     100000  rs
+Ethernet125  118              etp16f  16     100000  rs
+Ethernet126  119              etp16g  16     100000  rs
+Ethernet127  120              etp16h  16     100000  rs
+Ethernet128  153,154,155,156  etp17a  17     400000  rs
+Ethernet132  157,158,159,160  etp17b  17     400000  rs
+Ethernet136  137,138,139,140  etp18a  18     400000  rs
+Ethernet140  141,142,143,144  etp18b  18     400000  rs
+Ethernet144  129              etp19a  19     100000  rs
+Ethernet145  130              etp19b  19     100000  rs
+Ethernet146  131              etp19c  19     100000  rs
+Ethernet147  132              etp19d  19     100000  rs
+Ethernet148  133              etp19e  19     100000  rs
+Ethernet149  134              etp19f  19     100000  rs
+Ethernet150  135              etp19g  19     100000  rs
+Ethernet151  136              etp19h  19     100000  rs
+Ethernet152  145              etp20a  20     100000  rs
+Ethernet153  146              etp20b  20     100000  rs
+Ethernet154  147              etp20c  20     100000  rs
+Ethernet155  148              etp20d  20     100000  rs
+Ethernet156  149              etp20e  20     100000  rs
+Ethernet157  150              etp20f  20     100000  rs
+Ethernet158  151              etp20g  20     100000  rs
+Ethernet159  152              etp20h  20     100000  rs
+Ethernet160  185              etp21a  21     100000  rs
+Ethernet161  186              etp21b  21     100000  rs
+Ethernet162  187              etp21c  21     100000  rs
+Ethernet163  188              etp21d  21     100000  rs
+Ethernet164  189              etp21e  21     100000  rs
+Ethernet165  190              etp21f  21     100000  rs
+Ethernet166  191              etp21g  21     100000  rs
+Ethernet167  192              etp21h  21     100000  rs
+Ethernet168  169              etp22a  22     100000  rs
+Ethernet169  170              etp22b  22     100000  rs
+Ethernet170  171              etp22c  22     100000  rs
+Ethernet171  172              etp22d  22     100000  rs
+Ethernet172  173              etp22e  22     100000  rs
+Ethernet173  174              etp22f  22     100000  rs
+Ethernet174  175              etp22g  22     100000  rs
+Ethernet175  176              etp22h  22     100000  rs
+Ethernet176  161              etp23a  23     100000  rs
+Ethernet177  162              etp23b  23     100000  rs
+Ethernet178  163              etp23c  23     100000  rs
+Ethernet179  164              etp23d  23     100000  rs
+Ethernet180  165              etp23e  23     100000  rs
+Ethernet181  166              etp23f  23     100000  rs
+Ethernet182  167              etp23g  23     100000  rs
+Ethernet183  168              etp23h  23     100000  rs
+Ethernet184  177              etp24a  24     100000  rs
+Ethernet185  178              etp24b  24     100000  rs
+Ethernet186  179              etp24c  24     100000  rs
+Ethernet187  180              etp24d  24     100000  rs
+Ethernet188  181              etp24e  24     100000  rs
+Ethernet189  182              etp24f  24     100000  rs
+Ethernet190  183              etp24g  24     100000  rs
+Ethernet191  184              etp24h  24     100000  rs
+Ethernet192  217              etp25a  25     100000  rs
+Ethernet193  218              etp25b  25     100000  rs
+Ethernet194  219              etp25c  25     100000  rs
+Ethernet195  220              etp25d  25     100000  rs
+Ethernet196  221              etp25e  25     100000  rs
+Ethernet197  222              etp25f  25     100000  rs
+Ethernet198  223              etp25g  25     100000  rs
+Ethernet199  224              etp25h  25     100000  rs
+Ethernet200  201              etp26a  26     100000  rs
+Ethernet201  202              etp26b  26     100000  rs
+Ethernet202  203              etp26c  26     100000  rs
+Ethernet203  204              etp26d  26     100000  rs
+Ethernet204  205              etp26e  26     100000  rs
+Ethernet205  206              etp26f  26     100000  rs
+Ethernet206  207              etp26g  26     100000  rs
+Ethernet207  208              etp26h  26     100000  rs
+Ethernet208  193              etp27a  27     100000  rs
+Ethernet209  194              etp27b  27     100000  rs
+Ethernet210  195              etp27c  27     100000  rs
+Ethernet211  196              etp27d  27     100000  rs
+Ethernet212  197              etp27e  27     100000  rs
+Ethernet213  198              etp27f  27     100000  rs
+Ethernet214  199              etp27g  27     100000  rs
+Ethernet215  200              etp27h  27     100000  rs
+Ethernet216  209              etp28a  28     100000  rs
+Ethernet217  210              etp28b  28     100000  rs
+Ethernet218  211              etp28c  28     100000  rs
+Ethernet219  212              etp28d  28     100000  rs
+Ethernet220  213              etp28e  28     100000  rs
+Ethernet221  214              etp28f  28     100000  rs
+Ethernet222  215              etp28g  28     100000  rs
+Ethernet223  216              etp28h  28     100000  rs
+Ethernet224  249              etp29a  29     100000  rs
+Ethernet225  250              etp29b  29     100000  rs
+Ethernet226  251              etp29c  29     100000  rs
+Ethernet227  252              etp29d  29     100000  rs
+Ethernet228  253              etp29e  29     100000  rs
+Ethernet229  254              etp29f  29     100000  rs
+Ethernet230  255              etp29g  29     100000  rs
+Ethernet231  256              etp29h  29     100000  rs
+Ethernet232  233              etp30a  30     100000  rs
+Ethernet233  234              etp30b  30     100000  rs
+Ethernet234  235              etp30c  30     100000  rs
+Ethernet235  236              etp30d  30     100000  rs
+Ethernet236  237              etp30e  30     100000  rs
+Ethernet237  238              etp30f  30     100000  rs
+Ethernet238  239              etp30g  30     100000  rs
+Ethernet239  240              etp30h  30     100000  rs
+Ethernet240  225              etp31a  31     100000  rs
+Ethernet241  226              etp31b  31     100000  rs
+Ethernet242  227              etp31c  31     100000  rs
+Ethernet243  228              etp31d  31     100000  rs
+Ethernet244  229              etp31e  31     100000  rs
+Ethernet245  230              etp31f  31     100000  rs
+Ethernet246  231              etp31g  31     100000  rs
+Ethernet247  232              etp31h  31     100000  rs
+Ethernet248  241              etp32a  32     100000  rs
+Ethernet249  242              etp32b  32     100000  rs
+Ethernet250  243              etp32c  32     100000  rs
+Ethernet251  244              etp32d  32     100000  rs
+Ethernet252  245              etp32e  32     100000  rs
+Ethernet253  246              etp32f  32     100000  rs
+Ethernet254  247              etp32g  32     100000  rs
+Ethernet255  248              etp32h  32     100000  rs
+Ethernet256  273              etp33a  33     100000  rs
+Ethernet257  274              etp33b  33     100000  rs
+Ethernet258  275              etp33c  33     100000  rs
+Ethernet259  276              etp33d  33     100000  rs
+Ethernet260  277              etp33e  33     100000  rs
+Ethernet261  278              etp33f  33     100000  rs
+Ethernet262  279              etp33g  33     100000  rs
+Ethernet263  280              etp33h  33     100000  rs
+Ethernet264  257              etp34a  34     100000  rs
+Ethernet265  258              etp34b  34     100000  rs
+Ethernet266  259              etp34c  34     100000  rs
+Ethernet267  260              etp34d  34     100000  rs
+Ethernet268  261              etp34e  34     100000  rs
+Ethernet269  262              etp34f  34     100000  rs
+Ethernet270  263              etp34g  34     100000  rs
+Ethernet271  264              etp34h  34     100000  rs
+Ethernet272  265              etp35a  35     100000  rs
+Ethernet273  266              etp35b  35     100000  rs
+Ethernet274  267              etp35c  35     100000  rs
+Ethernet275  268              etp35d  35     100000  rs
+Ethernet276  269              etp35e  35     100000  rs
+Ethernet277  270              etp35f  35     100000  rs
+Ethernet278  271              etp35g  35     100000  rs
+Ethernet279  272              etp35h  35     100000  rs
+Ethernet280  281              etp36a  36     100000  rs
+Ethernet281  282              etp36b  36     100000  rs
+Ethernet282  283              etp36c  36     100000  rs
+Ethernet283  284              etp36d  36     100000  rs
+Ethernet284  285              etp36e  36     100000  rs
+Ethernet285  286              etp36f  36     100000  rs
+Ethernet286  287              etp36g  36     100000  rs
+Ethernet287  288              etp36h  36     100000  rs
+Ethernet288  313              etp37a  37     100000  rs
+Ethernet289  314              etp37b  37     100000  rs
+Ethernet290  315              etp37c  37     100000  rs
+Ethernet291  316              etp37d  37     100000  rs
+Ethernet292  317              etp37e  37     100000  rs
+Ethernet293  318              etp37f  37     100000  rs
+Ethernet294  319              etp37g  37     100000  rs
+Ethernet295  320              etp37h  37     100000  rs
+Ethernet296  297              etp38a  38     100000  rs
+Ethernet297  298              etp38b  38     100000  rs
+Ethernet298  299              etp38c  38     100000  rs
+Ethernet299  300              etp38d  38     100000  rs
+Ethernet300  301              etp38e  38     100000  rs
+Ethernet301  302              etp38f  38     100000  rs
+Ethernet302  303              etp38g  38     100000  rs
+Ethernet303  304              etp38h  38     100000  rs
+Ethernet304  289              etp39a  39     100000  rs
+Ethernet305  290              etp39b  39     100000  rs
+Ethernet306  291              etp39c  39     100000  rs
+Ethernet307  292              etp39d  39     100000  rs
+Ethernet308  293              etp39e  39     100000  rs
+Ethernet309  294              etp39f  39     100000  rs
+Ethernet310  295              etp39g  39     100000  rs
+Ethernet311  296              etp39h  39     100000  rs
+Ethernet312  305              etp40a  40     100000  rs
+Ethernet313  306              etp40b  40     100000  rs
+Ethernet314  307              etp40c  40     100000  rs
+Ethernet315  308              etp40d  40     100000  rs
+Ethernet316  309              etp40e  40     100000  rs
+Ethernet317  310              etp40f  40     100000  rs
+Ethernet318  311              etp40g  40     100000  rs
+Ethernet319  312              etp40h  40     100000  rs
+Ethernet320  345              etp41a  41     100000  rs
+Ethernet321  346              etp41b  41     100000  rs
+Ethernet322  347              etp41c  41     100000  rs
+Ethernet323  348              etp41d  41     100000  rs
+Ethernet324  349              etp41e  41     100000  rs
+Ethernet325  350              etp41f  41     100000  rs
+Ethernet326  351              etp41g  41     100000  rs
+Ethernet327  352              etp41h  41     100000  rs
+Ethernet328  329              etp42a  42     100000  rs
+Ethernet329  330              etp42b  42     100000  rs
+Ethernet330  331              etp42c  42     100000  rs
+Ethernet331  332              etp42d  42     100000  rs
+Ethernet332  333              etp42e  42     100000  rs
+Ethernet333  334              etp42f  42     100000  rs
+Ethernet334  335              etp42g  42     100000  rs
+Ethernet335  336              etp42h  42     100000  rs
+Ethernet336  321              etp43a  43     100000  rs
+Ethernet337  322              etp43b  43     100000  rs
+Ethernet338  323              etp43c  43     100000  rs
+Ethernet339  324              etp43d  43     100000  rs
+Ethernet340  325              etp43e  43     100000  rs
+Ethernet341  326              etp43f  43     100000  rs
+Ethernet342  327              etp43g  43     100000  rs
+Ethernet343  328              etp43h  43     100000  rs
+Ethernet344  337              etp44a  44     100000  rs
+Ethernet345  338              etp44b  44     100000  rs
+Ethernet346  339              etp44c  44     100000  rs
+Ethernet347  340              etp44d  44     100000  rs
+Ethernet348  341              etp44e  44     100000  rs
+Ethernet349  342              etp44f  44     100000  rs
+Ethernet350  343              etp44g  44     100000  rs
+Ethernet351  344              etp44h  44     100000  rs
+Ethernet352  377,378,379,380  etp45a  45     400000  rs
+Ethernet356  381,382,383,384  etp45b  45     400000  rs
+Ethernet360  361,362,363,364  etp46a  46     400000  rs
+Ethernet364  365,366,367,368  etp46b  46     400000  rs
+Ethernet368  353              etp47a  47     100000  rs
+Ethernet369  354              etp47b  47     100000  rs
+Ethernet370  355              etp47c  47     100000  rs
+Ethernet371  356              etp47d  47     100000  rs
+Ethernet372  357              etp47e  47     100000  rs
+Ethernet373  358              etp47f  47     100000  rs
+Ethernet374  359              etp47g  47     100000  rs
+Ethernet375  360              etp47h  47     100000  rs
+Ethernet376  369              etp48a  48     100000  rs
+Ethernet377  370              etp48b  48     100000  rs
+Ethernet378  371              etp48c  48     100000  rs
+Ethernet379  372              etp48d  48     100000  rs
+Ethernet380  373              etp48e  48     100000  rs
+Ethernet381  374              etp48f  48     100000  rs
+Ethernet382  375              etp48g  48     100000  rs
+Ethernet383  376              etp48h  48     100000  rs
+Ethernet384  409,410,411,412  etp49a  49     400000  rs
+Ethernet388  413,414,415,416  etp49b  49     400000  rs
+Ethernet392  393,394,395,396  etp50a  50     400000  rs
+Ethernet396  397,398,399,400  etp50b  50     400000  rs
+Ethernet400  385              etp51a  51     100000  rs
+Ethernet401  386              etp51b  51     100000  rs
+Ethernet402  387              etp51c  51     100000  rs
+Ethernet403  388              etp51d  51     100000  rs
+Ethernet404  389              etp51e  51     100000  rs
+Ethernet405  390              etp51f  51     100000  rs
+Ethernet406  391              etp51g  51     100000  rs
+Ethernet407  392              etp51h  51     100000  rs
+Ethernet408  401              etp52a  52     100000  rs
+Ethernet409  402              etp52b  52     100000  rs
+Ethernet410  403              etp52c  52     100000  rs
+Ethernet411  404              etp52d  52     100000  rs
+Ethernet412  405              etp52e  52     100000  rs
+Ethernet413  406              etp52f  52     100000  rs
+Ethernet414  407              etp52g  52     100000  rs
+Ethernet415  408              etp52h  52     100000  rs
+Ethernet416  441              etp53a  53     100000  rs
+Ethernet417  442              etp53b  53     100000  rs
+Ethernet418  443              etp53c  53     100000  rs
+Ethernet419  444              etp53d  53     100000  rs
+Ethernet420  445              etp53e  53     100000  rs
+Ethernet421  446              etp53f  53     100000  rs
+Ethernet422  447              etp53g  53     100000  rs
+Ethernet423  448              etp53h  53     100000  rs
+Ethernet424  425              etp54a  54     100000  rs
+Ethernet425  426              etp54b  54     100000  rs
+Ethernet426  427              etp54c  54     100000  rs
+Ethernet427  428              etp54d  54     100000  rs
+Ethernet428  429              etp54e  54     100000  rs
+Ethernet429  430              etp54f  54     100000  rs
+Ethernet430  431              etp54g  54     100000  rs
+Ethernet431  432              etp54h  54     100000  rs
+Ethernet432  417              etp55a  55     100000  rs
+Ethernet433  418              etp55b  55     100000  rs
+Ethernet434  419              etp55c  55     100000  rs
+Ethernet435  420              etp55d  55     100000  rs
+Ethernet436  421              etp55e  55     100000  rs
+Ethernet437  422              etp55f  55     100000  rs
+Ethernet438  423              etp55g  55     100000  rs
+Ethernet439  424              etp55h  55     100000  rs
+Ethernet440  433              etp56a  56     100000  rs
+Ethernet441  434              etp56b  56     100000  rs
+Ethernet442  435              etp56c  56     100000  rs
+Ethernet443  436              etp56d  56     100000  rs
+Ethernet444  437              etp56e  56     100000  rs
+Ethernet445  438              etp56f  56     100000  rs
+Ethernet446  439              etp56g  56     100000  rs
+Ethernet447  440              etp56h  56     100000  rs
+Ethernet448  473              etp57a  57     100000  rs
+Ethernet449  474              etp57b  57     100000  rs
+Ethernet450  475              etp57c  57     100000  rs
+Ethernet451  476              etp57d  57     100000  rs
+Ethernet452  477              etp57e  57     100000  rs
+Ethernet453  478              etp57f  57     100000  rs
+Ethernet454  479              etp57g  57     100000  rs
+Ethernet455  480              etp57h  57     100000  rs
+Ethernet456  457              etp58a  58     100000  rs
+Ethernet457  458              etp58b  58     100000  rs
+Ethernet458  459              etp58c  58     100000  rs
+Ethernet459  460              etp58d  58     100000  rs
+Ethernet460  461              etp58e  58     100000  rs
+Ethernet461  462              etp58f  58     100000  rs
+Ethernet462  463              etp58g  58     100000  rs
+Ethernet463  464              etp58h  58     100000  rs
+Ethernet464  449              etp59a  59     100000  rs
+Ethernet465  450              etp59b  59     100000  rs
+Ethernet466  451              etp59c  59     100000  rs
+Ethernet467  452              etp59d  59     100000  rs
+Ethernet468  453              etp59e  59     100000  rs
+Ethernet469  454              etp59f  59     100000  rs
+Ethernet470  455              etp59g  59     100000  rs
+Ethernet471  456              etp59h  59     100000  rs
+Ethernet472  465              etp60a  60     100000  rs
+Ethernet473  466              etp60b  60     100000  rs
+Ethernet474  467              etp60c  60     100000  rs
+Ethernet475  468              etp60d  60     100000  rs
+Ethernet476  469              etp60e  60     100000  rs
+Ethernet477  470              etp60f  60     100000  rs
+Ethernet478  471              etp60g  60     100000  rs
+Ethernet479  472              etp60h  60     100000  rs
+Ethernet480  505              etp61a  61     100000  rs
+Ethernet481  506              etp61b  61     100000  rs
+Ethernet482  507              etp61c  61     100000  rs
+Ethernet483  508              etp61d  61     100000  rs
+Ethernet484  509              etp61e  61     100000  rs
+Ethernet485  510              etp61f  61     100000  rs
+Ethernet486  511              etp61g  61     100000  rs
+Ethernet487  512              etp61h  61     100000  rs
+Ethernet488  489              etp62a  62     100000  rs
+Ethernet489  490              etp62b  62     100000  rs
+Ethernet490  491              etp62c  62     100000  rs
+Ethernet491  492              etp62d  62     100000  rs
+Ethernet492  493              etp62e  62     100000  rs
+Ethernet493  494              etp62f  62     100000  rs
+Ethernet494  495              etp62g  62     100000  rs
+Ethernet495  496              etp62h  62     100000  rs
+Ethernet496  481              etp63a  63     100000  rs
+Ethernet497  482              etp63b  63     100000  rs
+Ethernet498  483              etp63c  63     100000  rs
+Ethernet499  484              etp63d  63     100000  rs
+Ethernet500  485              etp63e  63     100000  rs
+Ethernet501  486              etp63f  63     100000  rs
+Ethernet502  487              etp63g  63     100000  rs
+Ethernet503  488              etp63h  63     100000  rs
+Ethernet504  497              etp64a  64     100000  rs
+Ethernet505  498              etp64b  64     100000  rs
+Ethernet506  499              etp64c  64     100000  rs
+Ethernet507  500              etp64d  64     100000  rs
+Ethernet508  501              etp64e  64     100000  rs
+Ethernet509  502              etp64f  64     100000  rs
+Ethernet510  503              etp64g  64     100000  rs
+Ethernet511  504              etp64h  64     100000  rs
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/qos.json.j2
new file mode 100644
index 00000000000..168e2b2e2b6
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/qos.json.j2
@@ -0,0 +1,306 @@
+{%- macro generate_dscp_to_tc_map_per_sku() -%}
+    "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "0",
+            "1" : "1",
+            "2" : "1",
+            "3" : "2",
+            "4" : "2",
+            "5" : "3",
+            "6" : "3",
+            "7" : "0",
+            "8" : "0",
+            "9" : "0",
+            "10": "0",
+            "11": "4",
+            "12": "4",
+            "13": "4",
+            "14": "4",
+            "15": "4",
+            "16": "4",
+            "17": "4",
+            "18": "4",
+            "19": "4",
+            "20": "4",
+            "21": "4",
+            "22": "4",
+            "23": "4",
+            "24": "4",
+            "25": "4",
+            "26": "4",
+            "27": "4",
+            "28": "4",
+            "29": "4",
+            "30": "4",
+            "31": "4",
+            "32": "4",
+            "33": "4",
+            "34": "4",
+            "35": "4",
+            "36": "4",
+            "37": "4",
+            "38": "4",
+            "39": "4",
+            "40": "4",
+            "41": "5",
+            "42": "5",
+            "43": "5",
+            "44": "5",
+            "45": "5",
+            "46": "5",
+            "47": "5",
+            "48": "5",
+            "49": "5",
+            "50": "5",
+            "51": "0",
+            "52": "0",
+            "53": "0",
+            "54": "0",
+            "55": "0",
+            "56": "0",
+            "57": "0",
+            "58": "0",
+            "59": "0",
+            "60": "0",
+            "61": "0",
+            "62": "0",
+            "63": "0"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_port_qos_map_per_sku(ports, direction) -%}
+{%- for port in ports.split(',') %}
+        "{{ port }}": {
+            "dscp_to_tc_map": "AZURE",
+            {% if direction == 'downlink' %}
+            "tc_to_dscp_map": "AZURE_DOWNLINK_BT1",
+            {% endif %}
+            "tc_to_pg_map": "AZURE",
+            "tc_to_queue_map": "AZURE"
+        }{% if not loop.last %},{% endif %}
+{%- endfor %}
+{%- endmacro -%}
+
+{%- macro generate_direction_based_queue_per_sku(port, direction) -%}
+        "{{ port }}|0": {
+            "scheduler": "scheduler_Q0_{{ direction.upper() }}"
+        },
+        "{{ port }}|1": {
+            "scheduler": "scheduler_Q1_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q1"
+        },
+        "{{ port }}|2": {
+            "scheduler": "scheduler_Q2_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q2"
+        },
+        "{{ port }}|3": {
+            "scheduler": "scheduler_Q3_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q3"
+        },
+        "{{ port }}|4": {
+            "scheduler": "scheduler_Q4_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q4"
+        },
+        "{{ port }}|5": {
+            "scheduler": "scheduler_Q5_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q5"
+        },
+        "{{ port }}|6": {
+            "scheduler": "scheduler_Q6_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q6"
+        }
+{%- endmacro -%}
+
+{%- macro generate_scheduler_per_sku() -%}
+    "SCHEDULER": {
+        "scheduler_Q0_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "4"
+        },
+        "scheduler_Q1_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "8"
+        },
+        "scheduler_Q2_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "18"
+        },
+        "scheduler_Q3_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q4_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q5_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q6_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "4"
+        },
+        "scheduler_Q0_UPLINK": {
+            "type": "DWRR",
+            "weight": "4"
+        },
+        "scheduler_Q1_UPLINK": {
+            "type": "DWRR",
+            "weight": "8"
+        },
+        "scheduler_Q2_UPLINK": {
+            "type": "DWRR",
+            "weight": "18"
+        },
+        "scheduler_Q3_UPLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q4_UPLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q5_UPLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q6_UPLINK": {
+            "type": "DWRR",
+            "weight": "4"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_tc_to_dscp_map_per_sku() %}
+    "TC_TO_DSCP_MAP": {
+        "AZURE_DOWNLINK_BT1": {
+            "8": "11"
+        }
+    },
+{%- endmacro %}
+
+{%- macro generate_tc_to_pg_map_per_sku() -%}
+    "TC_TO_PRIORITY_GROUP_MAP": {
+        "AZURE": {
+            "0": "0",
+            "1": "0",
+            "2": "0",
+            "3": "0",
+            "4": "0",
+            "5": "0",
+            "6": "0",
+            "7": "0"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_wred_profiles() -%}
+    "WRED_PROFILE": {
+        "AZURE_LOSSY_DOWNLINK_Q1": {
+            {% block azure_lossy_q1 %}
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "282624",
+            "green_min_threshold": " 166912",
+            "red_drop_probability": "5",
+            "red_max_threshold": "282624",
+            "red_min_threshold": "166912",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "282624",
+            "yellow_min_threshold": "166912"
+            {% endblock %}
+        },
+        "AZURE_LOSSY_DOWNLINK_Q2": {
+            {% block azure_lossy_q2 %}
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "282624",
+            "green_min_threshold": " 166912",
+            "red_drop_probability": "5",
+            "red_max_threshold": "282624",
+            "red_min_threshold": "166912",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "282624",
+            "yellow_min_threshold": "166912"
+            {% endblock %}
+        },
+        "AZURE_LOSSY_DOWNLINK_Q3": {
+            {% block azure_lossy_q3 %}
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "282624",
+            "green_min_threshold": " 166912",
+            "red_drop_probability": "5",
+            "red_max_threshold": "282624",
+            "red_min_threshold": "166912",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "282624",
+            "yellow_min_threshold": "166912"
+            {% endblock %}
+        },
+        "AZURE_LOSSY_DOWNLINK_Q4": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        },
+        "AZURE_LOSSY_DOWNLINK_Q5": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        },
+        "AZURE_LOSSY_DOWNLINK_Q6": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        },
+        "AZURE_LOSSY_UPLINK_Q1": {
+            {{ self.azure_lossy_q1() }}
+        },
+        "AZURE_LOSSY_UPLINK_Q2": {
+            {{ self.azure_lossy_q2() }}
+        },
+        "AZURE_LOSSY_UPLINK_Q3": {
+            {{ self.azure_lossy_q3() }}
+        },
+        "AZURE_LOSSY_UPLINK_Q4": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        },
+        "AZURE_LOSSY_UPLINK_Q5": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        },
+        "AZURE_LOSSY_UPLINK_Q6": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        }
+    },
+{%- endmacro -%}
+
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/sai.profile b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/sai.profile
new file mode 100644
index 00000000000..cf11f58ff98
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/sai.profile
@@ -0,0 +1,3 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=512
+SAI_NHG_HIERARCHICAL_NEXTHOP=false
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 00000000000..eea95aea252
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,3403 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 0x12
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 0
+            l3_ecmp_member_secondary_mem_size: 0
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 2
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 3
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 4
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 6
+            :
+                PC_PHYS_PORT_ID: 6
+            ?
+                PORT_ID: 7
+            :
+                PC_PHYS_PORT_ID: 7
+            ?
+                PORT_ID: 8
+            :
+                PC_PHYS_PORT_ID: 8
+            ?
+                PORT_ID: 9
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 10
+            :
+                PC_PHYS_PORT_ID: 10
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 11
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 12
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 14
+            :
+                PC_PHYS_PORT_ID: 14
+            ?
+                PORT_ID: 15
+            :
+                PC_PHYS_PORT_ID: 15
+            ?
+                PORT_ID: 16
+            :
+                PC_PHYS_PORT_ID: 16
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 18
+            ?
+                PORT_ID: 19
+            :
+                PC_PHYS_PORT_ID: 19
+            ?
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 20
+            ?
+                PORT_ID: 21
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 22
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 23
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 24
+            ?
+                PORT_ID: 25
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 26
+            :
+                PC_PHYS_PORT_ID: 26
+            ?
+                PORT_ID: 27
+            :
+                PC_PHYS_PORT_ID: 27
+            ?
+                PORT_ID: 28
+            :
+                PC_PHYS_PORT_ID: 28
+            ?
+                PORT_ID: 29
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 30
+            :
+                PC_PHYS_PORT_ID: 30
+            ?
+                PORT_ID: 31
+            :
+                PC_PHYS_PORT_ID: 31
+            ?
+                PORT_ID: 32
+            :
+                PC_PHYS_PORT_ID: 32
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 34
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 35
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 36
+            ?
+                PORT_ID: 38
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 39
+            :
+                PC_PHYS_PORT_ID: 38
+            ?
+                PORT_ID: 40
+            :
+                PC_PHYS_PORT_ID: 39
+            ?
+                PORT_ID: 41
+            :
+                PC_PHYS_PORT_ID: 40
+            ?
+                PORT_ID: 42
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 43
+            :
+                PC_PHYS_PORT_ID: 42
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 43
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 44
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 47
+            :
+                PC_PHYS_PORT_ID: 46
+            ?
+                PORT_ID: 48
+            :
+                PC_PHYS_PORT_ID: 47
+            ?
+                PORT_ID: 49
+            :
+                PC_PHYS_PORT_ID: 48
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 50
+            ?
+                PORT_ID: 53
+            :
+                PC_PHYS_PORT_ID: 51
+            ?
+                PORT_ID: 54
+            :
+                PC_PHYS_PORT_ID: 52
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 54
+            ?
+                PORT_ID: 57
+            :
+                PC_PHYS_PORT_ID: 55
+            ?
+                PORT_ID: 58
+            :
+                PC_PHYS_PORT_ID: 56
+            ?
+                PORT_ID: 59
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 60
+            :
+                PC_PHYS_PORT_ID: 58
+            ?
+                PORT_ID: 61
+            :
+                PC_PHYS_PORT_ID: 59
+            ?
+                PORT_ID: 62
+            :
+                PC_PHYS_PORT_ID: 60
+            ?
+                PORT_ID: 63
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 64
+            :
+                PC_PHYS_PORT_ID: 62
+            ?
+                PORT_ID: 65
+            :
+                PC_PHYS_PORT_ID: 63
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 64
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 66
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 67
+            ?
+                PORT_ID: 71
+            :
+                PC_PHYS_PORT_ID: 68
+            ?
+                PORT_ID: 72
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 73
+            :
+                PC_PHYS_PORT_ID: 70
+            ?
+                PORT_ID: 74
+            :
+                PC_PHYS_PORT_ID: 71
+            ?
+                PORT_ID: 75
+            :
+                PC_PHYS_PORT_ID: 72
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 74
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 75
+            ?
+                PORT_ID: 79
+            :
+                PC_PHYS_PORT_ID: 76
+            ?
+                PORT_ID: 80
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 81
+            :
+                PC_PHYS_PORT_ID: 78
+            ?
+                PORT_ID: 82
+            :
+                PC_PHYS_PORT_ID: 79
+            ?
+                PORT_ID: 83
+            :
+                PC_PHYS_PORT_ID: 80
+            ?
+                PORT_ID: 85
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 86
+            :
+                PC_PHYS_PORT_ID: 82
+            ?
+                PORT_ID: 87
+            :
+                PC_PHYS_PORT_ID: 83
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 84
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 90
+            :
+                PC_PHYS_PORT_ID: 86
+            ?
+                PORT_ID: 91
+            :
+                PC_PHYS_PORT_ID: 87
+            ?
+                PORT_ID: 92
+            :
+                PC_PHYS_PORT_ID: 88
+            ?
+                PORT_ID: 93
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 94
+            :
+                PC_PHYS_PORT_ID: 90
+            ?
+                PORT_ID: 95
+            :
+                PC_PHYS_PORT_ID: 91
+            ?
+                PORT_ID: 96
+            :
+                PC_PHYS_PORT_ID: 92
+            ?
+                PORT_ID: 97
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 98
+            :
+                PC_PHYS_PORT_ID: 94
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 95
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 96
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 98
+            ?
+                PORT_ID: 104
+            :
+                PC_PHYS_PORT_ID: 99
+            ?
+                PORT_ID: 105
+            :
+                PC_PHYS_PORT_ID: 100
+            ?
+                PORT_ID: 106
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 107
+            :
+                PC_PHYS_PORT_ID: 102
+            ?
+                PORT_ID: 108
+            :
+                PC_PHYS_PORT_ID: 103
+            ?
+                PORT_ID: 109
+            :
+                PC_PHYS_PORT_ID: 104
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 106
+            ?
+                PORT_ID: 112
+            :
+                PC_PHYS_PORT_ID: 107
+            ?
+                PORT_ID: 113
+            :
+                PC_PHYS_PORT_ID: 108
+            ?
+                PORT_ID: 114
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 115
+            :
+                PC_PHYS_PORT_ID: 110
+            ?
+                PORT_ID: 116
+            :
+                PC_PHYS_PORT_ID: 111
+            ?
+                PORT_ID: 117
+            :
+                PC_PHYS_PORT_ID: 112
+            ?
+                PORT_ID: 119
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 120
+            :
+                PC_PHYS_PORT_ID: 114
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 115
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 116
+            ?
+                PORT_ID: 123
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 124
+            :
+                PC_PHYS_PORT_ID: 118
+            ?
+                PORT_ID: 125
+            :
+                PC_PHYS_PORT_ID: 119
+            ?
+                PORT_ID: 126
+            :
+                PC_PHYS_PORT_ID: 120
+            ?
+                PORT_ID: 127
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 128
+            :
+                PC_PHYS_PORT_ID: 122
+            ?
+                PORT_ID: 129
+            :
+                PC_PHYS_PORT_ID: 123
+            ?
+                PORT_ID: 130
+            :
+                PC_PHYS_PORT_ID: 124
+            ?
+                PORT_ID: 131
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 126
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 127
+            ?
+                PORT_ID: 134
+            :
+                PC_PHYS_PORT_ID: 128
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 130
+            ?
+                PORT_ID: 138
+            :
+                PC_PHYS_PORT_ID: 131
+            ?
+                PORT_ID: 139
+            :
+                PC_PHYS_PORT_ID: 132
+            ?
+                PORT_ID: 140
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 141
+            :
+                PC_PHYS_PORT_ID: 134
+            ?
+                PORT_ID: 142
+            :
+                PC_PHYS_PORT_ID: 135
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 136
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 145
+            :
+                PC_PHYS_PORT_ID: 138
+            ?
+                PORT_ID: 146
+            :
+                PC_PHYS_PORT_ID: 139
+            ?
+                PORT_ID: 147
+            :
+                PC_PHYS_PORT_ID: 140
+            ?
+                PORT_ID: 148
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 149
+            :
+                PC_PHYS_PORT_ID: 142
+            ?
+                PORT_ID: 150
+            :
+                PC_PHYS_PORT_ID: 143
+            ?
+                PORT_ID: 151
+            :
+                PC_PHYS_PORT_ID: 144
+            ?
+                PORT_ID: 153
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 146
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 147
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 148
+            ?
+                PORT_ID: 157
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 158
+            :
+                PC_PHYS_PORT_ID: 150
+            ?
+                PORT_ID: 159
+            :
+                PC_PHYS_PORT_ID: 151
+            ?
+                PORT_ID: 160
+            :
+                PC_PHYS_PORT_ID: 152
+            ?
+                PORT_ID: 161
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 162
+            :
+                PC_PHYS_PORT_ID: 154
+            ?
+                PORT_ID: 163
+            :
+                PC_PHYS_PORT_ID: 155
+            ?
+                PORT_ID: 164
+            :
+                PC_PHYS_PORT_ID: 156
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 158
+            ?
+                PORT_ID: 167
+            :
+                PC_PHYS_PORT_ID: 159
+            ?
+                PORT_ID: 168
+            :
+                PC_PHYS_PORT_ID: 160
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 162
+            ?
+                PORT_ID: 172
+            :
+                PC_PHYS_PORT_ID: 163
+            ?
+                PORT_ID: 173
+            :
+                PC_PHYS_PORT_ID: 164
+            ?
+                PORT_ID: 174
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 175
+            :
+                PC_PHYS_PORT_ID: 166
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 167
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 168
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 179
+            :
+                PC_PHYS_PORT_ID: 170
+            ?
+                PORT_ID: 180
+            :
+                PC_PHYS_PORT_ID: 171
+            ?
+                PORT_ID: 181
+            :
+                PC_PHYS_PORT_ID: 172
+            ?
+                PORT_ID: 182
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 183
+            :
+                PC_PHYS_PORT_ID: 174
+            ?
+                PORT_ID: 184
+            :
+                PC_PHYS_PORT_ID: 175
+            ?
+                PORT_ID: 185
+            :
+                PC_PHYS_PORT_ID: 176
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 178
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 179
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 180
+            ?
+                PORT_ID: 191
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 192
+            :
+                PC_PHYS_PORT_ID: 182
+            ?
+                PORT_ID: 193
+            :
+                PC_PHYS_PORT_ID: 183
+            ?
+                PORT_ID: 194
+            :
+                PC_PHYS_PORT_ID: 184
+            ?
+                PORT_ID: 195
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 196
+            :
+                PC_PHYS_PORT_ID: 186
+            ?
+                PORT_ID: 197
+            :
+                PC_PHYS_PORT_ID: 187
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 188
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 200
+            :
+                PC_PHYS_PORT_ID: 190
+            ?
+                PORT_ID: 201
+            :
+                PC_PHYS_PORT_ID: 191
+            ?
+                PORT_ID: 202
+            :
+                PC_PHYS_PORT_ID: 192
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 194
+            ?
+                PORT_ID: 206
+            :
+                PC_PHYS_PORT_ID: 195
+            ?
+                PORT_ID: 207
+            :
+                PC_PHYS_PORT_ID: 196
+            ?
+                PORT_ID: 208
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 198
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 199
+            ?
+                PORT_ID: 211
+            :
+                PC_PHYS_PORT_ID: 200
+            ?
+                PORT_ID: 212
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 213
+            :
+                PC_PHYS_PORT_ID: 202
+            ?
+                PORT_ID: 214
+            :
+                PC_PHYS_PORT_ID: 203
+            ?
+                PORT_ID: 215
+            :
+                PC_PHYS_PORT_ID: 204
+            ?
+                PORT_ID: 216
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 217
+            :
+                PC_PHYS_PORT_ID: 206
+            ?
+                PORT_ID: 218
+            :
+                PC_PHYS_PORT_ID: 207
+            ?
+                PORT_ID: 219
+            :
+                PC_PHYS_PORT_ID: 208
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 210
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 211
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 212
+            ?
+                PORT_ID: 225
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 226
+            :
+                PC_PHYS_PORT_ID: 214
+            ?
+                PORT_ID: 227
+            :
+                PC_PHYS_PORT_ID: 215
+            ?
+                PORT_ID: 228
+            :
+                PC_PHYS_PORT_ID: 216
+            ?
+                PORT_ID: 229
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 230
+            :
+                PC_PHYS_PORT_ID: 218
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 219
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 220
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 234
+            :
+                PC_PHYS_PORT_ID: 222
+            ?
+                PORT_ID: 235
+            :
+                PC_PHYS_PORT_ID: 223
+            ?
+                PORT_ID: 236
+            :
+                PC_PHYS_PORT_ID: 224
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 239
+            :
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+            ?
+                PORT_ID: 240
+            :
+                PC_PHYS_PORT_ID: 227
+            ?
+                PORT_ID: 241
+            :
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+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 243
+            :
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+            ?
+                PORT_ID: 244
+            :
+                PC_PHYS_PORT_ID: 231
+            ?
+                PORT_ID: 245
+            :
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+            ?
+                PORT_ID: 246
+            :
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+            ?
+                PORT_ID: 247
+            :
+                PC_PHYS_PORT_ID: 234
+            ?
+                PORT_ID: 248
+            :
+                PC_PHYS_PORT_ID: 235
+            ?
+                PORT_ID: 249
+            :
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+            ?
+                PORT_ID: 250
+            :
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+            ?
+                PORT_ID: 251
+            :
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+            ?
+                PORT_ID: 252
+            :
+                PC_PHYS_PORT_ID: 239
+            ?
+                PORT_ID: 253
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+                PORT_ID: 517
+            :
+                PC_PHYS_PORT_ID: 488
+            ?
+                PORT_ID: 518
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 519
+            :
+                PC_PHYS_PORT_ID: 490
+            ?
+                PORT_ID: 520
+            :
+                PC_PHYS_PORT_ID: 491
+            ?
+                PORT_ID: 521
+            :
+                PC_PHYS_PORT_ID: 492
+            ?
+                PORT_ID: 522
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 523
+            :
+                PC_PHYS_PORT_ID: 494
+            ?
+                PORT_ID: 524
+            :
+                PC_PHYS_PORT_ID: 495
+            ?
+                PORT_ID: 525
+            :
+                PC_PHYS_PORT_ID: 496
+            ?
+                PORT_ID: 527
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 528
+            :
+                PC_PHYS_PORT_ID: 498
+            ?
+                PORT_ID: 529
+            :
+                PC_PHYS_PORT_ID: 499
+            ?
+                PORT_ID: 530
+            :
+                PC_PHYS_PORT_ID: 500
+            ?
+                PORT_ID: 531
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 532
+            :
+                PC_PHYS_PORT_ID: 502
+            ?
+                PORT_ID: 533
+            :
+                PC_PHYS_PORT_ID: 503
+            ?
+                PORT_ID: 534
+            :
+                PC_PHYS_PORT_ID: 504
+            ?
+                PORT_ID: 0 # CPU PORT
+            :
+                PC_PHYS_PORT_ID: 0
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 1],
+                         [2, 2],
+                         [3, 3],
+                         [4, 4],
+                         [5, 5],
+                         [6, 6],
+                         [7, 7],
+                         [8, 8],
+                         [9, 9],
+                         [10, 10],
+                         [11, 11],
+                         [12, 12],
+                         [13, 13],
+                         [14, 14],
+                         [15, 15],
+                         [16, 16],
+                         [17, 17],
+                         [18, 18],
+                         [19, 19],
+                         [20, 20],
+                         [21, 21],
+                         [22, 22],
+                         [23, 23],
+                         [24, 24],
+                         [25, 25],
+                         [26, 26],
+                         [27, 27],
+                         [28, 28],
+                         [29, 29],
+                         [30, 30],
+                         [31, 31],
+                         [32, 32],
+                         [34, 34],
+                         [35, 35],
+                         [36, 36],
+                         [37, 37],
+                         [38, 38],
+                         [39, 39],
+                         [40, 40],
+                         [41, 41],
+                         [42, 42],
+                         [43, 43],
+                         [44, 44],
+                         [45, 45],
+                         [46, 46],
+                         [47, 47],
+                         [48, 48],
+                         [49, 49],
+                         [51, 51],
+                         [52, 52],
+                         [53, 53],
+                         [54, 54],
+                         [55, 55],
+                         [56, 56],
+                         [57, 57],
+                         [58, 58],
+                         [59, 59],
+                         [60, 60],
+                         [61, 61],
+                         [62, 62],
+                         [63, 63],
+                         [64, 64],
+                         [65, 65],
+                         [66, 66],
+                         [68, 68],
+                         [69, 69],
+                         [70, 70],
+                         [71, 71],
+                         [72, 72],
+                         [73, 73],
+                         [74, 74],
+                         [75, 75],
+                         [76, 76],
+                         [77, 77],
+                         [78, 78],
+                         [79, 79],
+                         [80, 80],
+                         [81, 81],
+                         [82, 82],
+                         [83, 83],
+                         [85, 85],
+                         [86, 86],
+                         [87, 87],
+                         [88, 88],
+                         [89, 89],
+                         [90, 90],
+                         [91, 91],
+                         [92, 92],
+                         [93, 93],
+                         [94, 94],
+                         [95, 95],
+                         [96, 96],
+                         [97, 97],
+                         [98, 98],
+                         [99, 99],
+                         [100, 100],
+                         [102, 102],
+                         [103, 103],
+                         [104, 104],
+                         [105, 105],
+                         [106, 106],
+                         [107, 107],
+                         [108, 108],
+                         [109, 109],
+                         [110, 110],
+                         [111, 111],
+                         [112, 112],
+                         [113, 113],
+                         [114, 114],
+                         [115, 115],
+                         [116, 116],
+                         [117, 117],
+                         [119, 119],
+                         [120, 120],
+                         [121, 121],
+                         [122, 122],
+                         [123, 123],
+                         [124, 124],
+                         [125, 125],
+                         [126, 126],
+                         [127, 127],
+                         [128, 128],
+                         [129, 129],
+                         [130, 130],
+                         [131, 131],
+                         [132, 132],
+                         [133, 133],
+                         [134, 134],
+                         [136, 136],
+                         [137, 137],
+                         [138, 138],
+                         [139, 139],
+                         [140, 140],
+                         [141, 141],
+                         [142, 142],
+                         [143, 143],
+                         [144, 144],
+                         [145, 145],
+                         [146, 146],
+                         [147, 147],
+                         [148, 148],
+                         [149, 149],
+                         [150, 150],
+                         [151, 151],
+                         [153, 153],
+                         [154, 154],
+                         [155, 155],
+                         [156, 156],
+                         [157, 157],
+                         [158, 158],
+                         [159, 159],
+                         [160, 160],
+                         [161, 161],
+                         [162, 162],
+                         [163, 163],
+                         [164, 164],
+                         [165, 165],
+                         [166, 166],
+                         [167, 167],
+                         [168, 168],
+                         [170, 170],
+                         [171, 171],
+                         [172, 172],
+                         [173, 173],
+                         [174, 174],
+                         [175, 175],
+                         [176, 176],
+                         [177, 177],
+                         [178, 178],
+                         [179, 179],
+                         [180, 180],
+                         [181, 181],
+                         [182, 182],
+                         [183, 183],
+                         [184, 184],
+                         [185, 185],
+                         [187, 187],
+                         [188, 188],
+                         [189, 189],
+                         [190, 190],
+                         [191, 191],
+                         [192, 192],
+                         [193, 193],
+                         [194, 194],
+                         [195, 195],
+                         [196, 196],
+                         [197, 197],
+                         [198, 198],
+                         [199, 199],
+                         [200, 200],
+                         [201, 201],
+                         [202, 202],
+                         [204, 204],
+                         [205, 205],
+                         [206, 206],
+                         [207, 207],
+                         [208, 208],
+                         [209, 209],
+                         [210, 210],
+                         [211, 211],
+                         [212, 212],
+                         [213, 213],
+                         [214, 214],
+                         [215, 215],
+                         [216, 216],
+                         [217, 217],
+                         [218, 218],
+                         [219, 219],
+                         [221, 221],
+                         [222, 222],
+                         [223, 223],
+                         [224, 224],
+                         [225, 225],
+                         [226, 226],
+                         [227, 227],
+                         [228, 228],
+                         [229, 229],
+                         [230, 230],
+                         [231, 231],
+                         [232, 232],
+                         [233, 233],
+                         [234, 234],
+                         [235, 235],
+                         [236, 236],
+                         [238, 238],
+                         [239, 239],
+                         [240, 240],
+                         [241, 241],
+                         [242, 242],
+                         [243, 243],
+                         [244, 244],
+                         [245, 245],
+                         [246, 246],
+                         [247, 247],
+                         [248, 248],
+                         [249, 249],
+                         [250, 250],
+                         [251, 251],
+                         [252, 252],
+                         [253, 253],
+                         [255, 255],
+                         [256, 256],
+                         [257, 257],
+                         [258, 258],
+                         [259, 259],
+                         [260, 260],
+                         [261, 261],
+                         [262, 262],
+                         [263, 263],
+                         [264, 264],
+                         [265, 265],
+                         [266, 266],
+                         [267, 267],
+                         [268, 268],
+                         [269, 269],
+                         [270, 270],
+                         [272, 272],
+                         [273, 273],
+                         [274, 274],
+                         [275, 275],
+                         [276, 276],
+                         [277, 277],
+                         [278, 278],
+                         [279, 279],
+                         [280, 280],
+                         [281, 281],
+                         [282, 282],
+                         [283, 283],
+                         [284, 284],
+                         [285, 285],
+                         [286, 286],
+                         [287, 287],
+                         [289, 289],
+                         [290, 290],
+                         [291, 291],
+                         [292, 292],
+                         [293, 293],
+                         [294, 294],
+                         [295, 295],
+                         [296, 296],
+                         [297, 297],
+                         [298, 298],
+                         [299, 299],
+                         [300, 300],
+                         [301, 301],
+                         [302, 302],
+                         [303, 303],
+                         [304, 304],
+                         [306, 306],
+                         [307, 307],
+                         [308, 308],
+                         [309, 309],
+                         [310, 310],
+                         [311, 311],
+                         [312, 312],
+                         [313, 313],
+                         [314, 314],
+                         [315, 315],
+                         [316, 316],
+                         [317, 317],
+                         [318, 318],
+                         [319, 319],
+                         [320, 320],
+                         [321, 321],
+                         [323, 323],
+                         [324, 324],
+                         [325, 325],
+                         [326, 326],
+                         [327, 327],
+                         [328, 328],
+                         [329, 329],
+                         [330, 330],
+                         [331, 331],
+                         [332, 332],
+                         [333, 333],
+                         [334, 334],
+                         [335, 335],
+                         [336, 336],
+                         [337, 337],
+                         [338, 338],
+                         [340, 340],
+                         [341, 341],
+                         [342, 342],
+                         [343, 343],
+                         [344, 344],
+                         [345, 345],
+                         [346, 346],
+                         [347, 347],
+                         [348, 348],
+                         [349, 349],
+                         [350, 350],
+                         [351, 351],
+                         [352, 352],
+                         [353, 353],
+                         [354, 354],
+                         [355, 355],
+                         [357, 357],
+                         [358, 358],
+                         [359, 359],
+                         [360, 360],
+                         [361, 361],
+                         [362, 362],
+                         [363, 363],
+                         [364, 364],
+                         [365, 365],
+                         [366, 366],
+                         [367, 367],
+                         [368, 368],
+                         [369, 369],
+                         [370, 370],
+                         [371, 371],
+                         [372, 372],
+                         [374, 374],
+                         [375, 375],
+                         [376, 376],
+                         [377, 377],
+                         [378, 378],
+                         [379, 379],
+                         [380, 380],
+                         [381, 381],
+                         [382, 382],
+                         [383, 383],
+                         [384, 384],
+                         [385, 385],
+                         [386, 386],
+                         [387, 387],
+                         [388, 388],
+                         [389, 389],
+                         [391, 391],
+                         [392, 392],
+                         [393, 393],
+                         [394, 394],
+                         [395, 395],
+                         [396, 396],
+                         [397, 397],
+                         [398, 398],
+                         [399, 399],
+                         [400, 400],
+                         [401, 401],
+                         [402, 402],
+                         [403, 403],
+                         [404, 404],
+                         [405, 405],
+                         [406, 406],
+                         [408, 408],
+                         [409, 409],
+                         [410, 410],
+                         [411, 411],
+                         [412, 412],
+                         [413, 413],
+                         [414, 414],
+                         [415, 415],
+                         [416, 416],
+                         [417, 417],
+                         [418, 418],
+                         [419, 419],
+                         [420, 420],
+                         [421, 421],
+                         [422, 422],
+                         [423, 423],
+                         [425, 425],
+                         [426, 426],
+                         [427, 427],
+                         [428, 428],
+                         [429, 429],
+                         [430, 430],
+                         [431, 431],
+                         [432, 432],
+                         [433, 433],
+                         [434, 434],
+                         [435, 435],
+                         [436, 436],
+                         [437, 437],
+                         [438, 438],
+                         [439, 439],
+                         [440, 440],
+                         [442, 442],
+                         [443, 443],
+                         [444, 444],
+                         [445, 445],
+                         [446, 446],
+                         [447, 447],
+                         [448, 448],
+                         [449, 449],
+                         [450, 450],
+                         [451, 451],
+                         [452, 452],
+                         [453, 453],
+                         [454, 454],
+                         [455, 455],
+                         [456, 456],
+                         [457, 457],
+                         [459, 459],
+                         [460, 460],
+                         [461, 461],
+                         [462, 462],
+                         [463, 463],
+                         [464, 464],
+                         [465, 465],
+                         [466, 466],
+                         [467, 467],
+                         [468, 468],
+                         [469, 469],
+                         [470, 470],
+                         [471, 471],
+                         [472, 472],
+                         [473, 473],
+                         [474, 474],
+                         [476, 476],
+                         [477, 477],
+                         [478, 478],
+                         [479, 479],
+                         [480, 480],
+                         [481, 481],
+                         [482, 482],
+                         [483, 483],
+                         [484, 484],
+                         [485, 485],
+                         [486, 486],
+                         [487, 487],
+                         [488, 488],
+                         [489, 489],
+                         [490, 490],
+                         [491, 491],
+                         [493, 493],
+                         [494, 494],
+                         [495, 495],
+                         [496, 496],
+                         [497, 497],
+                         [498, 498],
+                         [499, 499],
+                         [500, 500],
+                         [501, 501],
+                         [502, 502],
+                         [503, 503],
+                         [504, 504],
+                         [505, 505],
+                         [506, 506],
+                         [507, 507],
+                         [508, 508],
+                         [510, 510],
+                         [511, 511],
+                         [512, 512],
+                         [513, 513],
+                         [514, 514],
+                         [515, 515],
+                         [516, 516],
+                         [517, 517],
+                         [518, 518],
+                         [519, 519],
+                         [520, 520],
+                         [521, 521],
+                         [522, 522],
+                         [523, 523],
+                         [524, 524],
+                         [525, 525],
+                         [527, 527],
+                         [528, 528],
+                         [529, 529],
+                         [530, 530],
+                         [531, 531],
+                         [532, 532],
+                         [533, 533],
+                         [534, 534]]
+            :
+                ENABLE: 0
+                SPEED: 100000
+                NUM_LANES: 1
+                FEC_MODE: PC_FEC_RS544
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0x80
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            SKIP_BUFFER_RESERVATION: 0
+            THRESHOLD_MODE: LOSSY
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_2
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffer_ports.j2
new file mode 100644
index 00000000000..56df32bcbbc
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 513) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers.json.j2
new file mode 100644
index 00000000000..1083a6210fc
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't0' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t0.j2
new file mode 100644
index 00000000000..80db358faba
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t0.j2
@@ -0,0 +1,180 @@
+{%- set default_cable = '0m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossy_pool": {
+            "size": "163593526",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossy_pool": {
+            "size": "163593526",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossy_pool",
+            "size": "0",
+            "static_th": "165364160"
+        },
+        {# fallback when no DEVICE_NEIGHBOR_METADATA -#}
+        "egress_lossy_profile": {
+            "dynamic_th": "1",
+            "pool": "egress_lossy_pool",
+            "size": "1778"
+        },
+        "QUEUE0_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE1_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE2_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE3_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE4_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE5_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-3"
+        },
+        "QUEUE6_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE0_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE1_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE2_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE3_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE4_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE5_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-3"
+        },
+        "QUEUE6_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        }
+    },
+{%- endmacro %}
+
+{# Skip BUFFER_PG #}
+{%- macro generate_pg_profils(ports) %}
+    "BUFFER_PG": {
+    },
+{%- endmacro %}
+
+{% if DEVICE_METADATA
+  and DEVICE_METADATA['localhost']
+  and DEVICE_METADATA['localhost'].type == "ToRRouter"
+  and DEVICE_NEIGHBOR
+  and DEVICE_NEIGHBOR_METADATA %}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    {% for port in ports.split(',') %}
+        {% if DEVICE_NEIGHBOR[port]
+          and DEVICE_NEIGHBOR[port].name
+          and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name]
+          and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'ToRRouter') %}
+            "{{ port }}|0": {
+                "profile": "QUEUE0_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|1": {
+                "profile": "QUEUE1_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|2": {
+                "profile": "QUEUE2_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|3": {
+                "profile": "QUEUE3_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|4": {
+                "profile": "QUEUE4_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|5": {
+                "profile": "QUEUE5_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|6": {
+                "profile": "QUEUE6_UPLINK_LOSSY_PROFILE"
+            }
+        {% else %}
+            "{{ port }}|0": {
+                "profile": "QUEUE0_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|1": {
+                "profile": "QUEUE1_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|2": {
+                "profile": "QUEUE2_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|3": {
+                "profile": "QUEUE3_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|4": {
+                "profile": "QUEUE4_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|5": {
+                "profile": "QUEUE5_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|6": {
+                "profile": "QUEUE6_DOWNLINK_LOSSY_PROFILE"
+            }
+        {% endif %}
+    {%- if not loop.last -%},{% endif %}
+    {% endfor %}
+    }
+{%- endmacro %}
+{% else %}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    {% for port in ports.split(',') %}
+        "{{ port }}|0-9": {
+            "profile" : "egress_lossy_profile"
+        }
+    {%- if not loop.last -%},{% endif %}
+    {% endfor %}
+    }
+{%- endmacro %}
+{% endif %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..80db358faba
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t1.j2
@@ -0,0 +1,180 @@
+{%- set default_cable = '0m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossy_pool": {
+            "size": "163593526",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossy_pool": {
+            "size": "163593526",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossy_pool",
+            "size": "0",
+            "static_th": "165364160"
+        },
+        {# fallback when no DEVICE_NEIGHBOR_METADATA -#}
+        "egress_lossy_profile": {
+            "dynamic_th": "1",
+            "pool": "egress_lossy_pool",
+            "size": "1778"
+        },
+        "QUEUE0_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE1_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE2_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE3_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE4_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE5_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-3"
+        },
+        "QUEUE6_DOWNLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE0_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE1_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE2_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE3_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-7"
+        },
+        "QUEUE4_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "QUEUE5_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "-3"
+        },
+        "QUEUE6_UPLINK_LOSSY_PROFILE": {
+            "pool": "egress_lossy_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        }
+    },
+{%- endmacro %}
+
+{# Skip BUFFER_PG #}
+{%- macro generate_pg_profils(ports) %}
+    "BUFFER_PG": {
+    },
+{%- endmacro %}
+
+{% if DEVICE_METADATA
+  and DEVICE_METADATA['localhost']
+  and DEVICE_METADATA['localhost'].type == "ToRRouter"
+  and DEVICE_NEIGHBOR
+  and DEVICE_NEIGHBOR_METADATA %}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    {% for port in ports.split(',') %}
+        {% if DEVICE_NEIGHBOR[port]
+          and DEVICE_NEIGHBOR[port].name
+          and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name]
+          and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'ToRRouter') %}
+            "{{ port }}|0": {
+                "profile": "QUEUE0_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|1": {
+                "profile": "QUEUE1_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|2": {
+                "profile": "QUEUE2_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|3": {
+                "profile": "QUEUE3_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|4": {
+                "profile": "QUEUE4_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|5": {
+                "profile": "QUEUE5_UPLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|6": {
+                "profile": "QUEUE6_UPLINK_LOSSY_PROFILE"
+            }
+        {% else %}
+            "{{ port }}|0": {
+                "profile": "QUEUE0_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|1": {
+                "profile": "QUEUE1_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|2": {
+                "profile": "QUEUE2_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|3": {
+                "profile": "QUEUE3_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|4": {
+                "profile": "QUEUE4_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|5": {
+                "profile": "QUEUE5_DOWNLINK_LOSSY_PROFILE"
+            },
+            "{{ port }}|6": {
+                "profile": "QUEUE6_DOWNLINK_LOSSY_PROFILE"
+            }
+        {% endif %}
+    {%- if not loop.last -%},{% endif %}
+    {% endfor %}
+    }
+{%- endmacro %}
+{% else %}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    {% for port in ports.split(',') %}
+        "{{ port }}|0-9": {
+            "profile" : "egress_lossy_profile"
+        }
+    {%- if not loop.last -%},{% endif %}
+    {% endfor %}
+    }
+{%- endmacro %}
+{% endif %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/hwsku.json
new file mode 100644
index 00000000000..cce931728fd
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/hwsku.json
@@ -0,0 +1,266 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "8x100G",
+            "autoneg": "on"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/pg_profile_lookup.ini
new file mode 100644
index 00000000000..2e2b7e88e75
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/pg_profile_lookup.ini
@@ -0,0 +1,2 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/port_config.ini
new file mode 100644
index 00000000000..ce705a384c1
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/port_config.ini
@@ -0,0 +1,515 @@
+# name       lanes   alias   index   speed   fec
+Ethernet0    17      etp1a   1       100000  rs
+Ethernet1    18      etp1b   1       100000  rs
+Ethernet2    19      etp1c   1       100000  rs
+Ethernet3    20      etp1d   1       100000  rs
+Ethernet4    21      etp1e   1       100000  rs
+Ethernet5    22      etp1f   1       100000  rs
+Ethernet6    23      etp1g   1       100000  rs
+Ethernet7    24      etp1h   1       100000  rs
+Ethernet8    1       etp2a   2       100000  rs
+Ethernet9    2       etp2b   2       100000  rs
+Ethernet10   3       etp2c   2       100000  rs
+Ethernet11   4       etp2d   2       100000  rs
+Ethernet12   5       etp2e   2       100000  rs
+Ethernet13   6       etp2f   2       100000  rs
+Ethernet14   7       etp2g   2       100000  rs
+Ethernet15   8       etp2h   2       100000  rs
+Ethernet16   9       etp3a   3       100000  rs
+Ethernet17   10      etp3b   3       100000  rs
+Ethernet18   11      etp3c   3       100000  rs
+Ethernet19   12      etp3d   3       100000  rs
+Ethernet20   13      etp3e   3       100000  rs
+Ethernet21   14      etp3f   3       100000  rs
+Ethernet22   15      etp3g   3       100000  rs
+Ethernet23   16      etp3h   3       100000  rs
+Ethernet24   25      etp4a   4       100000  rs
+Ethernet25   26      etp4b   4       100000  rs
+Ethernet26   27      etp4c   4       100000  rs
+Ethernet27   28      etp4d   4       100000  rs
+Ethernet28   29      etp4e   4       100000  rs
+Ethernet29   30      etp4f   4       100000  rs
+Ethernet30   31      etp4g   4       100000  rs
+Ethernet31   32      etp4h   4       100000  rs
+Ethernet32   57      etp5a   5       100000  rs
+Ethernet33   58      etp5b   5       100000  rs
+Ethernet34   59      etp5c   5       100000  rs
+Ethernet35   60      etp5d   5       100000  rs
+Ethernet36   61      etp5e   5       100000  rs
+Ethernet37   62      etp5f   5       100000  rs
+Ethernet38   63      etp5g   5       100000  rs
+Ethernet39   64      etp5h   5       100000  rs
+Ethernet40   41      etp6a   6       100000  rs
+Ethernet41   42      etp6b   6       100000  rs
+Ethernet42   43      etp6c   6       100000  rs
+Ethernet43   44      etp6d   6       100000  rs
+Ethernet44   45      etp6e   6       100000  rs
+Ethernet45   46      etp6f   6       100000  rs
+Ethernet46   47      etp6g   6       100000  rs
+Ethernet47   48      etp6h   6       100000  rs
+Ethernet48   33      etp7a   7       100000  rs
+Ethernet49   34      etp7b   7       100000  rs
+Ethernet50   35      etp7c   7       100000  rs
+Ethernet51   36      etp7d   7       100000  rs
+Ethernet52   37      etp7e   7       100000  rs
+Ethernet53   38      etp7f   7       100000  rs
+Ethernet54   39      etp7g   7       100000  rs
+Ethernet55   40      etp7h   7       100000  rs
+Ethernet56   49      etp8a   8       100000  rs
+Ethernet57   50      etp8b   8       100000  rs
+Ethernet58   51      etp8c   8       100000  rs
+Ethernet59   52      etp8d   8       100000  rs
+Ethernet60   53      etp8e   8       100000  rs
+Ethernet61   54      etp8f   8       100000  rs
+Ethernet62   55      etp8g   8       100000  rs
+Ethernet63   56      etp8h   8       100000  rs
+Ethernet64   89      etp9a   9       100000  rs
+Ethernet65   90      etp9b   9       100000  rs
+Ethernet66   91      etp9c   9       100000  rs
+Ethernet67   92      etp9d   9       100000  rs
+Ethernet68   93      etp9e   9       100000  rs
+Ethernet69   94      etp9f   9       100000  rs
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+Ethernet475  468     etp60d  60      100000  rs
+Ethernet476  469     etp60e  60      100000  rs
+Ethernet477  470     etp60f  60      100000  rs
+Ethernet478  471     etp60g  60      100000  rs
+Ethernet479  472     etp60h  60      100000  rs
+Ethernet480  505     etp61a  61      100000  rs
+Ethernet481  506     etp61b  61      100000  rs
+Ethernet482  507     etp61c  61      100000  rs
+Ethernet483  508     etp61d  61      100000  rs
+Ethernet484  509     etp61e  61      100000  rs
+Ethernet485  510     etp61f  61      100000  rs
+Ethernet486  511     etp61g  61      100000  rs
+Ethernet487  512     etp61h  61      100000  rs
+Ethernet488  489     etp62a  62      100000  rs
+Ethernet489  490     etp62b  62      100000  rs
+Ethernet490  491     etp62c  62      100000  rs
+Ethernet491  492     etp62d  62      100000  rs
+Ethernet492  493     etp62e  62      100000  rs
+Ethernet493  494     etp62f  62      100000  rs
+Ethernet494  495     etp62g  62      100000  rs
+Ethernet495  496     etp62h  62      100000  rs
+Ethernet496  481     etp63a  63      100000  rs
+Ethernet497  482     etp63b  63      100000  rs
+Ethernet498  483     etp63c  63      100000  rs
+Ethernet499  484     etp63d  63      100000  rs
+Ethernet500  485     etp63e  63      100000  rs
+Ethernet501  486     etp63f  63      100000  rs
+Ethernet502  487     etp63g  63      100000  rs
+Ethernet503  488     etp63h  63      100000  rs
+Ethernet504  497     etp64a  64      100000  rs
+Ethernet505  498     etp64b  64      100000  rs
+Ethernet506  499     etp64c  64      100000  rs
+Ethernet507  500     etp64d  64      100000  rs
+Ethernet508  501     etp64e  64      100000  rs
+Ethernet509  502     etp64f  64      100000  rs
+Ethernet510  503     etp64g  64      100000  rs
+Ethernet511  504     etp64h  64      100000  rs
+Ethernet512  513     etp65   65      10000   none
+Ethernet513  515     etp66   66      10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/qos.json.j2
new file mode 100644
index 00000000000..1c9e64c5ede
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/qos.json.j2
@@ -0,0 +1,307 @@
+{%- macro generate_dscp_to_tc_map_per_sku() -%}
+    "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "0",
+            "1" : "1",
+            "2" : "1",
+            "3" : "2",
+            "4" : "2",
+            "5" : "3",
+            "6" : "3",
+            "7" : "0",
+            "8" : "0",
+            "9" : "0",
+            "10": "0",
+            "11": "4",
+            "12": "4",
+            "13": "4",
+            "14": "4",
+            "15": "4",
+            "16": "4",
+            "17": "4",
+            "18": "4",
+            "19": "4",
+            "20": "4",
+            "21": "4",
+            "22": "4",
+            "23": "4",
+            "24": "4",
+            "25": "4",
+            "26": "4",
+            "27": "4",
+            "28": "4",
+            "29": "4",
+            "30": "4",
+            "31": "4",
+            "32": "4",
+            "33": "4",
+            "34": "4",
+            "35": "4",
+            "36": "4",
+            "37": "4",
+            "38": "4",
+            "39": "4",
+            "40": "4",
+            "41": "5",
+            "42": "5",
+            "43": "5",
+            "44": "5",
+            "45": "5",
+            "46": "5",
+            "47": "5",
+            "48": "5",
+            "49": "5",
+            "50": "5",
+            "51": "0",
+            "52": "0",
+            "53": "0",
+            "54": "0",
+            "55": "0",
+            "56": "0",
+            "57": "0",
+            "58": "0",
+            "59": "0",
+            "60": "0",
+            "61": "0",
+            "62": "0",
+            "63": "0"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_port_qos_map_per_sku(ports, direction) -%}
+{%- for port in ports.split(',') %}
+        "{{ port }}": {
+            "dscp_to_tc_map": "AZURE",
+            "tc_to_dscp_map": "AZURE_{{ direction.upper() }}_BT0",
+            "tc_to_pg_map": "AZURE",
+            "tc_to_queue_map": "AZURE"
+        }{% if not loop.last %},{% endif %}
+{%- endfor %}
+{%- endmacro -%}
+
+{%- macro generate_direction_based_queue_per_sku(port, direction) -%}
+        "{{ port }}|0": {
+            "scheduler": "scheduler_Q0_{{ direction.upper() }}"
+        },
+        "{{ port }}|1": {
+            "scheduler": "scheduler_Q1_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q1"
+        },
+        "{{ port }}|2": {
+            "scheduler": "scheduler_Q2_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q2"
+        },
+        "{{ port }}|3": {
+            "scheduler": "scheduler_Q3_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q3"
+        },
+        "{{ port }}|4": {
+            "scheduler": "scheduler_Q4_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q4"
+        },
+        "{{ port }}|5": {
+            "scheduler": "scheduler_Q5_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q5"
+        },
+        "{{ port }}|6": {
+            "scheduler": "scheduler_Q6_{{ direction.upper() }}",
+            "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q6"
+        }
+{%- endmacro -%}
+
+{%- macro generate_scheduler_per_sku() -%}
+    "SCHEDULER": {
+        "scheduler_Q0_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "4"
+        },
+        "scheduler_Q1_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "8"
+        },
+        "scheduler_Q2_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "18"
+        },
+        "scheduler_Q3_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q4_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q5_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q6_DOWNLINK": {
+            "type": "DWRR",
+            "weight": "4"
+        },
+        "scheduler_Q0_UPLINK": {
+            "type": "DWRR",
+            "weight": "4"
+        },
+        "scheduler_Q1_UPLINK": {
+            "type": "DWRR",
+            "weight": "8"
+        },
+        "scheduler_Q2_UPLINK": {
+            "type": "DWRR",
+            "weight": "18"
+        },
+        "scheduler_Q3_UPLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q4_UPLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q5_UPLINK": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_Q6_UPLINK": {
+            "type": "DWRR",
+            "weight": "4"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_tc_to_dscp_map_per_sku() %}
+    "TC_TO_DSCP_MAP": {
+        "AZURE_DOWNLINK_BT0": {
+            "8": "21"
+        },
+        "AZURE_UPLINK_BT0": {
+            "8": "11"
+        }
+    },
+{%- endmacro %}
+
+{%- macro generate_tc_to_pg_map_per_sku() -%}
+    "TC_TO_PRIORITY_GROUP_MAP": {
+        "AZURE": {
+            "0": "0",
+            "1": "0",
+            "2": "0",
+            "3": "0",
+            "4": "0",
+            "5": "0",
+            "6": "0",
+            "7": "0"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_wred_profiles() -%}
+    "WRED_PROFILE": {
+        "AZURE_LOSSY_DOWNLINK_Q1": {
+            {% block azure_lossy_q1 %}
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "282624",
+            "green_min_threshold": " 166912",
+            "red_drop_probability": "5",
+            "red_max_threshold": "282624",
+            "red_min_threshold": "166912",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "282624",
+            "yellow_min_threshold": "166912"
+            {% endblock %}
+        },
+        "AZURE_LOSSY_DOWNLINK_Q2": {
+            {% block azure_lossy_q2 %}
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "282624",
+            "green_min_threshold": " 166912",
+            "red_drop_probability": "5",
+            "red_max_threshold": "282624",
+            "red_min_threshold": "166912",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "282624",
+            "yellow_min_threshold": "166912"
+            {% endblock %}
+        },
+        "AZURE_LOSSY_DOWNLINK_Q3": {
+            {% block azure_lossy_q3 %}
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "282624",
+            "green_min_threshold": " 166912",
+            "red_drop_probability": "5",
+            "red_max_threshold": "282624",
+            "red_min_threshold": "166912",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "282624",
+            "yellow_min_threshold": "166912"
+            {% endblock %}
+        },
+        "AZURE_LOSSY_DOWNLINK_Q4": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        },
+        "AZURE_LOSSY_DOWNLINK_Q5": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        },
+        "AZURE_LOSSY_DOWNLINK_Q6": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        },
+        "AZURE_LOSSY_UPLINK_Q1": {
+            {{ self.azure_lossy_q1() }}
+        },
+        "AZURE_LOSSY_UPLINK_Q2": {
+            {{ self.azure_lossy_q2() }}
+        },
+        "AZURE_LOSSY_UPLINK_Q3": {
+            {{ self.azure_lossy_q3() }}
+        },
+        "AZURE_LOSSY_UPLINK_Q4": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        },
+        "AZURE_LOSSY_UPLINK_Q5": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        },
+        "AZURE_LOSSY_UPLINK_Q6": {
+            "ecn": "ecn_green",
+            "green_drop_probability": "0",
+            "green_max_threshold": "266338050",
+            "green_min_threshold": "266338050",
+            "wred_green_enable": "false"
+        }
+    },
+{%- endmacro -%}
+
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/sai.profile b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/sai.profile
new file mode 100644
index 00000000000..cf11f58ff98
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/sai.profile
@@ -0,0 +1,3 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=512
+SAI_NHG_HIERARCHICAL_NEXTHOP=false
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 00000000000..66df4007e4f
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,3418 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 0x12
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 0
+            l3_ecmp_member_secondary_mem_size: 0
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 2
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 3
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 4
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 6
+            :
+                PC_PHYS_PORT_ID: 6
+            ?
+                PORT_ID: 7
+            :
+                PC_PHYS_PORT_ID: 7
+            ?
+                PORT_ID: 8
+            :
+                PC_PHYS_PORT_ID: 8
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+                PC_PHYS_PORT_ID: 503
+            ?
+                PORT_ID: 534
+            :
+                PC_PHYS_PORT_ID: 504
+            ?
+                PORT_ID: 118 # MGMT PORT
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 424 # MGMT PORT
+            :
+                PC_PHYS_PORT_ID: 515
+            ?
+                PORT_ID: 0 # CPU PORT
+            :
+                PC_PHYS_PORT_ID: 0
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 1],
+                         [2, 2],
+                         [3, 3],
+                         [4, 4],
+                         [5, 5],
+                         [6, 6],
+                         [7, 7],
+                         [8, 8],
+                         [9, 9],
+                         [10, 10],
+                         [11, 11],
+                         [12, 12],
+                         [13, 13],
+                         [14, 14],
+                         [15, 15],
+                         [16, 16],
+                         [17, 17],
+                         [18, 18],
+                         [19, 19],
+                         [20, 20],
+                         [21, 21],
+                         [22, 22],
+                         [23, 23],
+                         [24, 24],
+                         [25, 25],
+                         [26, 26],
+                         [27, 27],
+                         [28, 28],
+                         [29, 29],
+                         [30, 30],
+                         [31, 31],
+                         [32, 32],
+                         [34, 34],
+                         [35, 35],
+                         [36, 36],
+                         [37, 37],
+                         [38, 38],
+                         [39, 39],
+                         [40, 40],
+                         [41, 41],
+                         [42, 42],
+                         [43, 43],
+                         [44, 44],
+                         [45, 45],
+                         [46, 46],
+                         [47, 47],
+                         [48, 48],
+                         [49, 49],
+                         [51, 51],
+                         [52, 52],
+                         [53, 53],
+                         [54, 54],
+                         [55, 55],
+                         [56, 56],
+                         [57, 57],
+                         [58, 58],
+                         [59, 59],
+                         [60, 60],
+                         [61, 61],
+                         [62, 62],
+                         [63, 63],
+                         [64, 64],
+                         [65, 65],
+                         [66, 66],
+                         [68, 68],
+                         [69, 69],
+                         [70, 70],
+                         [71, 71],
+                         [72, 72],
+                         [73, 73],
+                         [74, 74],
+                         [75, 75],
+                         [76, 76],
+                         [77, 77],
+                         [78, 78],
+                         [79, 79],
+                         [80, 80],
+                         [81, 81],
+                         [82, 82],
+                         [83, 83],
+                         [85, 85],
+                         [86, 86],
+                         [87, 87],
+                         [88, 88],
+                         [89, 89],
+                         [90, 90],
+                         [91, 91],
+                         [92, 92],
+                         [93, 93],
+                         [94, 94],
+                         [95, 95],
+                         [96, 96],
+                         [97, 97],
+                         [98, 98],
+                         [99, 99],
+                         [100, 100],
+                         [102, 102],
+                         [103, 103],
+                         [104, 104],
+                         [105, 105],
+                         [106, 106],
+                         [107, 107],
+                         [108, 108],
+                         [109, 109],
+                         [110, 110],
+                         [111, 111],
+                         [112, 112],
+                         [113, 113],
+                         [114, 114],
+                         [115, 115],
+                         [116, 116],
+                         [117, 117],
+                         [119, 119],
+                         [120, 120],
+                         [121, 121],
+                         [122, 122],
+                         [123, 123],
+                         [124, 124],
+                         [125, 125],
+                         [126, 126],
+                         [127, 127],
+                         [128, 128],
+                         [129, 129],
+                         [130, 130],
+                         [131, 131],
+                         [132, 132],
+                         [133, 133],
+                         [134, 134],
+                         [136, 136],
+                         [137, 137],
+                         [138, 138],
+                         [139, 139],
+                         [140, 140],
+                         [141, 141],
+                         [142, 142],
+                         [143, 143],
+                         [144, 144],
+                         [145, 145],
+                         [146, 146],
+                         [147, 147],
+                         [148, 148],
+                         [149, 149],
+                         [150, 150],
+                         [151, 151],
+                         [153, 153],
+                         [154, 154],
+                         [155, 155],
+                         [156, 156],
+                         [157, 157],
+                         [158, 158],
+                         [159, 159],
+                         [160, 160],
+                         [161, 161],
+                         [162, 162],
+                         [163, 163],
+                         [164, 164],
+                         [165, 165],
+                         [166, 166],
+                         [167, 167],
+                         [168, 168],
+                         [170, 170],
+                         [171, 171],
+                         [172, 172],
+                         [173, 173],
+                         [174, 174],
+                         [175, 175],
+                         [176, 176],
+                         [177, 177],
+                         [178, 178],
+                         [179, 179],
+                         [180, 180],
+                         [181, 181],
+                         [182, 182],
+                         [183, 183],
+                         [184, 184],
+                         [185, 185],
+                         [187, 187],
+                         [188, 188],
+                         [189, 189],
+                         [190, 190],
+                         [191, 191],
+                         [192, 192],
+                         [193, 193],
+                         [194, 194],
+                         [195, 195],
+                         [196, 196],
+                         [197, 197],
+                         [198, 198],
+                         [199, 199],
+                         [200, 200],
+                         [201, 201],
+                         [202, 202],
+                         [204, 204],
+                         [205, 205],
+                         [206, 206],
+                         [207, 207],
+                         [208, 208],
+                         [209, 209],
+                         [210, 210],
+                         [211, 211],
+                         [212, 212],
+                         [213, 213],
+                         [214, 214],
+                         [215, 215],
+                         [216, 216],
+                         [217, 217],
+                         [218, 218],
+                         [219, 219],
+                         [221, 221],
+                         [222, 222],
+                         [223, 223],
+                         [224, 224],
+                         [225, 225],
+                         [226, 226],
+                         [227, 227],
+                         [228, 228],
+                         [229, 229],
+                         [230, 230],
+                         [231, 231],
+                         [232, 232],
+                         [233, 233],
+                         [234, 234],
+                         [235, 235],
+                         [236, 236],
+                         [238, 238],
+                         [239, 239],
+                         [240, 240],
+                         [241, 241],
+                         [242, 242],
+                         [243, 243],
+                         [244, 244],
+                         [245, 245],
+                         [246, 246],
+                         [247, 247],
+                         [248, 248],
+                         [249, 249],
+                         [250, 250],
+                         [251, 251],
+                         [252, 252],
+                         [253, 253],
+                         [255, 255],
+                         [256, 256],
+                         [257, 257],
+                         [258, 258],
+                         [259, 259],
+                         [260, 260],
+                         [261, 261],
+                         [262, 262],
+                         [263, 263],
+                         [264, 264],
+                         [265, 265],
+                         [266, 266],
+                         [267, 267],
+                         [268, 268],
+                         [269, 269],
+                         [270, 270],
+                         [272, 272],
+                         [273, 273],
+                         [274, 274],
+                         [275, 275],
+                         [276, 276],
+                         [277, 277],
+                         [278, 278],
+                         [279, 279],
+                         [280, 280],
+                         [281, 281],
+                         [282, 282],
+                         [283, 283],
+                         [284, 284],
+                         [285, 285],
+                         [286, 286],
+                         [287, 287],
+                         [289, 289],
+                         [290, 290],
+                         [291, 291],
+                         [292, 292],
+                         [293, 293],
+                         [294, 294],
+                         [295, 295],
+                         [296, 296],
+                         [297, 297],
+                         [298, 298],
+                         [299, 299],
+                         [300, 300],
+                         [301, 301],
+                         [302, 302],
+                         [303, 303],
+                         [304, 304],
+                         [306, 306],
+                         [307, 307],
+                         [308, 308],
+                         [309, 309],
+                         [310, 310],
+                         [311, 311],
+                         [312, 312],
+                         [313, 313],
+                         [314, 314],
+                         [315, 315],
+                         [316, 316],
+                         [317, 317],
+                         [318, 318],
+                         [319, 319],
+                         [320, 320],
+                         [321, 321],
+                         [323, 323],
+                         [324, 324],
+                         [325, 325],
+                         [326, 326],
+                         [327, 327],
+                         [328, 328],
+                         [329, 329],
+                         [330, 330],
+                         [331, 331],
+                         [332, 332],
+                         [333, 333],
+                         [334, 334],
+                         [335, 335],
+                         [336, 336],
+                         [337, 337],
+                         [338, 338],
+                         [340, 340],
+                         [341, 341],
+                         [342, 342],
+                         [343, 343],
+                         [344, 344],
+                         [345, 345],
+                         [346, 346],
+                         [347, 347],
+                         [348, 348],
+                         [349, 349],
+                         [350, 350],
+                         [351, 351],
+                         [352, 352],
+                         [353, 353],
+                         [354, 354],
+                         [355, 355],
+                         [357, 357],
+                         [358, 358],
+                         [359, 359],
+                         [360, 360],
+                         [361, 361],
+                         [362, 362],
+                         [363, 363],
+                         [364, 364],
+                         [365, 365],
+                         [366, 366],
+                         [367, 367],
+                         [368, 368],
+                         [369, 369],
+                         [370, 370],
+                         [371, 371],
+                         [372, 372],
+                         [374, 374],
+                         [375, 375],
+                         [376, 376],
+                         [377, 377],
+                         [378, 378],
+                         [379, 379],
+                         [380, 380],
+                         [381, 381],
+                         [382, 382],
+                         [383, 383],
+                         [384, 384],
+                         [385, 385],
+                         [386, 386],
+                         [387, 387],
+                         [388, 388],
+                         [389, 389],
+                         [391, 391],
+                         [392, 392],
+                         [393, 393],
+                         [394, 394],
+                         [395, 395],
+                         [396, 396],
+                         [397, 397],
+                         [398, 398],
+                         [399, 399],
+                         [400, 400],
+                         [401, 401],
+                         [402, 402],
+                         [403, 403],
+                         [404, 404],
+                         [405, 405],
+                         [406, 406],
+                         [408, 408],
+                         [409, 409],
+                         [410, 410],
+                         [411, 411],
+                         [412, 412],
+                         [413, 413],
+                         [414, 414],
+                         [415, 415],
+                         [416, 416],
+                         [417, 417],
+                         [418, 418],
+                         [419, 419],
+                         [420, 420],
+                         [421, 421],
+                         [422, 422],
+                         [423, 423],
+                         [425, 425],
+                         [426, 426],
+                         [427, 427],
+                         [428, 428],
+                         [429, 429],
+                         [430, 430],
+                         [431, 431],
+                         [432, 432],
+                         [433, 433],
+                         [434, 434],
+                         [435, 435],
+                         [436, 436],
+                         [437, 437],
+                         [438, 438],
+                         [439, 439],
+                         [440, 440],
+                         [442, 442],
+                         [443, 443],
+                         [444, 444],
+                         [445, 445],
+                         [446, 446],
+                         [447, 447],
+                         [448, 448],
+                         [449, 449],
+                         [450, 450],
+                         [451, 451],
+                         [452, 452],
+                         [453, 453],
+                         [454, 454],
+                         [455, 455],
+                         [456, 456],
+                         [457, 457],
+                         [459, 459],
+                         [460, 460],
+                         [461, 461],
+                         [462, 462],
+                         [463, 463],
+                         [464, 464],
+                         [465, 465],
+                         [466, 466],
+                         [467, 467],
+                         [468, 468],
+                         [469, 469],
+                         [470, 470],
+                         [471, 471],
+                         [472, 472],
+                         [473, 473],
+                         [474, 474],
+                         [476, 476],
+                         [477, 477],
+                         [478, 478],
+                         [479, 479],
+                         [480, 480],
+                         [481, 481],
+                         [482, 482],
+                         [483, 483],
+                         [484, 484],
+                         [485, 485],
+                         [486, 486],
+                         [487, 487],
+                         [488, 488],
+                         [489, 489],
+                         [490, 490],
+                         [491, 491],
+                         [493, 493],
+                         [494, 494],
+                         [495, 495],
+                         [496, 496],
+                         [497, 497],
+                         [498, 498],
+                         [499, 499],
+                         [500, 500],
+                         [501, 501],
+                         [502, 502],
+                         [503, 503],
+                         [504, 504],
+                         [505, 505],
+                         [506, 506],
+                         [507, 507],
+                         [508, 508],
+                         [510, 510],
+                         [511, 511],
+                         [512, 512],
+                         [513, 513],
+                         [514, 514],
+                         [515, 515],
+                         [516, 516],
+                         [517, 517],
+                         [518, 518],
+                         [519, 519],
+                         [520, 520],
+                         [521, 521],
+                         [522, 522],
+                         [523, 523],
+                         [524, 524],
+                         [525, 525],
+                         [527, 527],
+                         [528, 528],
+                         [529, 529],
+                         [530, 530],
+                         [531, 531],
+                         [532, 532],
+                         [533, 533],
+                         [534, 534]]
+            :
+                ENABLE: 0
+                SPEED: 100000
+                NUM_LANES: 1
+                FEC_MODE: PC_FEC_RS544
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[118, 118], [424, 424]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0x80
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            SKIP_BUFFER_RESERVATION: 0
+            THRESHOLD_MODE: LOSSY
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_2
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffer_ports.j2
new file mode 100644
index 00000000000..725347049cf
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers.json.j2
new file mode 100644
index 00000000000..0b1cb2c541b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_lt2.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_lt2.j2
new file mode 120000
index 00000000000..c7bacdd1795
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_lt2.j2
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED/buffers_defaults_lt2.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t0.j2
new file mode 100644
index 00000000000..6d5f92f60e1
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "164075364",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "22010624"
+        },
+        "egress_lossless_pool": {
+            "size": "164075364",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..6d5f92f60e1
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "164075364",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "22010624"
+        },
+        "egress_lossless_pool": {
+            "size": "164075364",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/hwsku.json
new file mode 100644
index 00000000000..a200919c1a4
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/hwsku.json
@@ -0,0 +1,260 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/pg_profile_lookup.ini
new file mode 100644
index 00000000000..da5ac951efb
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/pg_profile_lookup.ini
@@ -0,0 +1,5 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
+400000  5m    18796   0    445770  0         3556
+400000  40m   18796   0    445770  0         3556
+400000  150m  18796   0    445770  0         3556
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/port_config.ini
new file mode 100644
index 00000000000..42feb95c11e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/port_config.ini
@@ -0,0 +1,129 @@
+# name       lanes            alias   index  speed   fec
+Ethernet0    17,18,19,20      etp1a   1      400000  rs
+Ethernet4    21,22,23,24      etp1b   1      400000  rs
+Ethernet8    1,2,3,4          etp2a   2      400000  rs
+Ethernet12   5,6,7,8          etp2b   2      400000  rs
+Ethernet16   9,10,11,12       etp3a   3      400000  rs
+Ethernet20   13,14,15,16      etp3b   3      400000  rs
+Ethernet24   25,26,27,28      etp4a   4      400000  rs
+Ethernet28   29,30,31,32      etp4b   4      400000  rs
+Ethernet32   57,58,59,60      etp5a   5      400000  rs
+Ethernet36   61,62,63,64      etp5b   5      400000  rs
+Ethernet40   41,42,43,44      etp6a   6      400000  rs
+Ethernet44   45,46,47,48      etp6b   6      400000  rs
+Ethernet48   33,34,35,36      etp7a   7      400000  rs
+Ethernet52   37,38,39,40      etp7b   7      400000  rs
+Ethernet56   49,50,51,52      etp8a   8      400000  rs
+Ethernet60   53,54,55,56      etp8b   8      400000  rs
+Ethernet64   89,90,91,92      etp9a   9      400000  rs
+Ethernet68   93,94,95,96      etp9b   9      400000  rs
+Ethernet72   73,74,75,76      etp10a  10     400000  rs
+Ethernet76   77,78,79,80      etp10b  10     400000  rs
+Ethernet80   65,66,67,68      etp11a  11     400000  rs
+Ethernet84   69,70,71,72      etp11b  11     400000  rs
+Ethernet88   81,82,83,84      etp12a  12     400000  rs
+Ethernet92   85,86,87,88      etp12b  12     400000  rs
+Ethernet96   121,122,123,124  etp13a  13     400000  rs
+Ethernet100  125,126,127,128  etp13b  13     400000  rs
+Ethernet104  105,106,107,108  etp14a  14     400000  rs
+Ethernet108  109,110,111,112  etp14b  14     400000  rs
+Ethernet112  97,98,99,100     etp15a  15     400000  rs
+Ethernet116  101,102,103,104  etp15b  15     400000  rs
+Ethernet120  113,114,115,116  etp16a  16     400000  rs
+Ethernet124  117,118,119,120  etp16b  16     400000  rs
+Ethernet128  153,154,155,156  etp17a  17     400000  rs
+Ethernet132  157,158,159,160  etp17b  17     400000  rs
+Ethernet136  137,138,139,140  etp18a  18     400000  rs
+Ethernet140  141,142,143,144  etp18b  18     400000  rs
+Ethernet144  129,130,131,132  etp19a  19     400000  rs
+Ethernet148  133,134,135,136  etp19b  19     400000  rs
+Ethernet152  145,146,147,148  etp20a  20     400000  rs
+Ethernet156  149,150,151,152  etp20b  20     400000  rs
+Ethernet160  185,186,187,188  etp21a  21     400000  rs
+Ethernet164  189,190,191,192  etp21b  21     400000  rs
+Ethernet168  169,170,171,172  etp22a  22     400000  rs
+Ethernet172  173,174,175,176  etp22b  22     400000  rs
+Ethernet176  161,162,163,164  etp23a  23     400000  rs
+Ethernet180  165,166,167,168  etp23b  23     400000  rs
+Ethernet184  177,178,179,180  etp24a  24     400000  rs
+Ethernet188  181,182,183,184  etp24b  24     400000  rs
+Ethernet192  217,218,219,220  etp25a  25     400000  rs
+Ethernet196  221,222,223,224  etp25b  25     400000  rs
+Ethernet200  201,202,203,204  etp26a  26     400000  rs
+Ethernet204  205,206,207,208  etp26b  26     400000  rs
+Ethernet208  193,194,195,196  etp27a  27     400000  rs
+Ethernet212  197,198,199,200  etp27b  27     400000  rs
+Ethernet216  209,210,211,212  etp28a  28     400000  rs
+Ethernet220  213,214,215,216  etp28b  28     400000  rs
+Ethernet224  249,250,251,252  etp29a  29     400000  rs
+Ethernet228  253,254,255,256  etp29b  29     400000  rs
+Ethernet232  233,234,235,236  etp30a  30     400000  rs
+Ethernet236  237,238,239,240  etp30b  30     400000  rs
+Ethernet240  225,226,227,228  etp31a  31     400000  rs
+Ethernet244  229,230,231,232  etp31b  31     400000  rs
+Ethernet248  241,242,243,244  etp32a  32     400000  rs
+Ethernet252  245,246,247,248  etp32b  32     400000  rs
+Ethernet256  273,274,275,276  etp33a  33     400000  rs
+Ethernet260  277,278,279,280  etp33b  33     400000  rs
+Ethernet264  257,258,259,260  etp34a  34     400000  rs
+Ethernet268  261,262,263,264  etp34b  34     400000  rs
+Ethernet272  265,266,267,268  etp35a  35     400000  rs
+Ethernet276  269,270,271,272  etp35b  35     400000  rs
+Ethernet280  281,282,283,284  etp36a  36     400000  rs
+Ethernet284  285,286,287,288  etp36b  36     400000  rs
+Ethernet288  313,314,315,316  etp37a  37     400000  rs
+Ethernet292  317,318,319,320  etp37b  37     400000  rs
+Ethernet296  297,298,299,300  etp38a  38     400000  rs
+Ethernet300  301,302,303,304  etp38b  38     400000  rs
+Ethernet304  289,290,291,292  etp39a  39     400000  rs
+Ethernet308  293,294,295,296  etp39b  39     400000  rs
+Ethernet312  305,306,307,308  etp40a  40     400000  rs
+Ethernet316  309,310,311,312  etp40b  40     400000  rs
+Ethernet320  345,346,347,348  etp41a  41     400000  rs
+Ethernet324  349,350,351,352  etp41b  41     400000  rs
+Ethernet328  329,330,331,332  etp42a  42     400000  rs
+Ethernet332  333,334,335,336  etp42b  42     400000  rs
+Ethernet336  321,322,323,324  etp43a  43     400000  rs
+Ethernet340  325,326,327,328  etp43b  43     400000  rs
+Ethernet344  337,338,339,340  etp44a  44     400000  rs
+Ethernet348  341,342,343,344  etp44b  44     400000  rs
+Ethernet352  377,378,379,380  etp45a  45     400000  rs
+Ethernet356  381,382,383,384  etp45b  45     400000  rs
+Ethernet360  361,362,363,364  etp46a  46     400000  rs
+Ethernet364  365,366,367,368  etp46b  46     400000  rs
+Ethernet368  353,354,355,356  etp47a  47     400000  rs
+Ethernet372  357,358,359,360  etp47b  47     400000  rs
+Ethernet376  369,370,371,372  etp48a  48     400000  rs
+Ethernet380  373,374,375,376  etp48b  48     400000  rs
+Ethernet384  409,410,411,412  etp49a  49     400000  rs
+Ethernet388  413,414,415,416  etp49b  49     400000  rs
+Ethernet392  393,394,395,396  etp50a  50     400000  rs
+Ethernet396  397,398,399,400  etp50b  50     400000  rs
+Ethernet400  385,386,387,388  etp51a  51     400000  rs
+Ethernet404  389,390,391,392  etp51b  51     400000  rs
+Ethernet408  401,402,403,404  etp52a  52     400000  rs
+Ethernet412  405,406,407,408  etp52b  52     400000  rs
+Ethernet416  441,442,443,444  etp53a  53     400000  rs
+Ethernet420  445,446,447,448  etp53b  53     400000  rs
+Ethernet424  425,426,427,428  etp54a  54     400000  rs
+Ethernet428  429,430,431,432  etp54b  54     400000  rs
+Ethernet432  417,418,419,420  etp55a  55     400000  rs
+Ethernet436  421,422,423,424  etp55b  55     400000  rs
+Ethernet440  433,434,435,436  etp56a  56     400000  rs
+Ethernet444  437,438,439,440  etp56b  56     400000  rs
+Ethernet448  473,474,475,476  etp57a  57     400000  rs
+Ethernet452  477,478,479,480  etp57b  57     400000  rs
+Ethernet456  457,458,459,460  etp58a  58     400000  rs
+Ethernet460  461,462,463,464  etp58b  58     400000  rs
+Ethernet464  449,450,451,452  etp59a  59     400000  rs
+Ethernet468  453,454,455,456  etp59b  59     400000  rs
+Ethernet472  465,466,467,468  etp60a  60     400000  rs
+Ethernet476  469,470,471,472  etp60b  60     400000  rs
+Ethernet480  505,506,507,508  etp61a  61     400000  rs
+Ethernet484  509,510,511,512  etp61b  61     400000  rs
+Ethernet488  489,490,491,492  etp62a  62     400000  rs
+Ethernet492  493,494,495,496  etp62b  62     400000  rs
+Ethernet496  481,482,483,484  etp63a  63     400000  rs
+Ethernet500  485,486,487,488  etp63b  63     400000  rs
+Ethernet504  497,498,499,500  etp64a  64     400000  rs
+Ethernet508  501,502,503,504  etp64b  64     400000  rs
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/qos.json.j2
new file mode 100644
index 00000000000..00fa61ee0c8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/qos.json.j2
@@ -0,0 +1,161 @@
+{%- macro generate_dscp_to_tc_map_per_sku() -%}
+    "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "0",
+            "1" : "0",
+            "2" : "0",
+            "3" : "3",
+            "4" : "4",
+            "5" : "0",
+            "6" : "0",
+            "7" : "0",
+            "8" : "0",
+            "9" : "0",
+            "10": "0",
+            "11": "0",
+            "12": "0",
+            "13": "0",
+            "14": "0",
+            "15": "0",
+            "16": "0",
+            "17": "0",
+            "18": "0",
+            "19": "0",
+            "20": "0",
+            "21": "0",
+            "22": "0",
+            "23": "0",
+            "24": "0",
+            "25": "0",
+            "26": "0",
+            "27": "0",
+            "28": "0",
+            "29": "0",
+            "30": "0",
+            "31": "0",
+            "32": "0",
+            "33": "0",
+            "34": "0",
+            "35": "0",
+            "36": "0",
+            "37": "0",
+            "38": "0",
+            "39": "0",
+            "40": "0",
+            "41": "0",
+            "42": "0",
+            "43": "0",
+            "44": "6",
+            "45": "0",
+            "46": "5",
+            "47": "1",
+            "48": "0",
+            "49": "0",
+            "50": "0",
+            "51": "0",
+            "52": "0",
+            "53": "0",
+            "54": "0",
+            "55": "0",
+            "56": "0",
+            "57": "0",
+            "58": "0",
+            "59": "0",
+            "60": "0",
+            "61": "0",
+            "62": "0",
+            "63": "0"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_scheduler_per_sku() -%}
+    "SCHEDULER": {
+        "SCHEDULER_Q1": {
+            "type"  : "DWRR",
+            "weight": "10"
+        },
+        "SCHEDULER_Q3": {
+            "type"  : "DWRR",
+            "weight": "20"
+        },
+        "SCHEDULER_Q4": {
+            "type"  : "DWRR",
+            "weight": "10"
+        },
+        "SCHEDULER_Q6": {
+            "type"  : "DWRR",
+            "weight": "70"
+        },
+        "SCHEDULER_DEFAULT": {
+            "type"  : "DWRR",
+            "weight": "10"
+        }
+    },
+{%- endmacro -%}
+
+{%- macro generate_single_queue_per_sku(port) -%}
+        "{{ port }}|0": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|1": {
+            "scheduler": "SCHEDULER_Q1"
+        },
+        "{{ port }}|2": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|3": {
+            "scheduler": "SCHEDULER_Q3",
+            "wred_profile": "WRED_LOSSLESS_Q3"
+        },
+        "{{ port }}|4": {
+            "scheduler": "SCHEDULER_Q4",
+            "wred_profile": "WRED_LOSSLESS_Q4"
+        },
+        "{{ port }}|5": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        },
+        "{{ port }}|6": {
+            "scheduler": "SCHEDULER_Q6"
+        },
+        "{{ port }}|7": {
+            "scheduler": "SCHEDULER_DEFAULT"
+        }
+{%- endmacro -%}
+
+{%- macro generate_wred_profiles() -%}
+    "WRED_PROFILE": {
+        "WRED_LOSSLESS_Q3": {
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "262144",
+            "green_min_threshold": "131072",
+            "red_drop_probability": "5",
+            "red_max_threshold": "262144",
+            "red_min_threshold": "131072",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "262144",
+            "yellow_min_threshold": "131072"
+        },
+        "WRED_LOSSLESS_Q4": {
+            "ecn": "ecn_all",
+            "green_drop_probability": "5",
+            "green_max_threshold": "262144",
+            "green_min_threshold": "131072",
+            "red_drop_probability": "5",
+            "red_max_threshold": "262144",
+            "red_min_threshold": "131072",
+            "wred_green_enable": "true",
+            "wred_red_enable": "true",
+            "wred_yellow_enable": "true",
+            "yellow_drop_probability": "5",
+            "yellow_max_threshold": "262144",
+            "yellow_min_threshold": "131072"
+        }
+    },
+{%- endmacro -%}
+
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/sai.profile b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/sai.profile
new file mode 100644
index 00000000000..7a12bfd7006
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/sai.profile
@@ -0,0 +1,3 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=128
+SAI_NHG_HIERARCHICAL_NEXTHOP=false
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 00000000000..d78f64d6715
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,2551 @@
+# $Copyright: Broadcom Ltd.$
+#
+# BCM78907 128x400g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 0x12
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 0
+            l3_alpm_large_vrf_mode: 1
+            l3_ecmp_member_secondary_mem_size: 0
+            sai_mmu_custom_config: 1
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 19
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 53
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 54
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 71
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 85
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 86
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 87
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 104
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 105
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 119
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 120
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 138
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 139
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 153
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 172
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 173
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 206
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 207
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 239
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 240
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 241
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 272
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 273
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 291
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 306
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 307
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 326
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 340
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 357
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 358
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 359
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 360
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 374
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 375
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 376
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 377
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 391
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 392
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 393
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 394
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 408
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 409
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 410
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 411
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 425
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 426
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 427
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 428
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 442
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 443
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 444
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 445
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 459
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 460
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 461
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 462
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 476
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 477
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 478
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 479
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 493
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 494
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 495
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 496
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 510
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 511
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 512
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 513
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 527
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 528
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 529
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 530
+            :
+                PC_PHYS_PORT_ID: 509
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 4],
+                          [17, 20],
+                          [34, 37],
+                          [51, 54],
+                          [68, 71],
+                          [85, 88],
+                          [102, 105],
+                          [119, 122],
+                          [136, 139],
+                          [153, 156],
+                          [170, 173],
+                          [187, 190],
+                          [204, 207],
+                          [221, 224],
+                          [238, 241],
+                          [255, 258],
+                          [272, 275],
+                          [289, 292],
+                          [306, 309],
+                          [323, 326],
+                          [340, 343],
+                          [357, 360],
+                          [374, 377],
+                          [391, 394],
+                          [408, 411],
+                          [425, 428],
+                          [442, 445],
+                          [459, 462],
+                          [476, 479],
+                          [493, 496],
+                          [510, 513],
+                          [527, 530]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            #enable port queue drop stats
+            sai_stats_support_mask: 0x80
+            #disable vxlan tunnel stats
+            sai_stats_disable_mask: 0x200
+            #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration. Enable PPIU Mode
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        TM_SCHEDULER_CONFIG:
+            DYNAMIC_VOQ: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+### Baseline
+# Skipping buffer reservation. This means that don't use SDK default setings.
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            MIRROR_ON_DROP_RESERVATION: 0
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+...
+# Initialize the various thresholds to zero
+---
+# Ingress service pool level initialization
+device:
+    0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+
+        # Ingress headroom pool
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+
+        # PFC generation: Priority group(s)
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        # Egress multicast CQE pool
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+...
+#Per Port Registers
+#Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                # Pause enable bit,
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+               PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+...
+# Output Port Thresholds -2
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+...
+### Begin MMU ingress threshold settings
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 265703
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 43328
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+...
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 325520
+                RESUME_LIMIT_CELLS: 325520
+
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1755
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1755
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+...
+### Egress Service Pools
+---
+device:
+    0:
+# Setting Q group limit to 0
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 265703
+                YELLOW_SHARED_LIMIT_CELLS: 24910
+                RED_SHARED_LIMIT_CELLS: 20759
+                SHARED_RESUME_LIMIT_CELLS: 33203
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 24900
+                RED_SHARED_RESUME_LIMIT_CELLS: 20749
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19818
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1858
+                RED_SHARED_LIMIT_CELLS: 1549
+                SHARED_RESUME_LIMIT_CELLS: 2467
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1848
+                RED_SHARED_RESUME_LIMIT_CELLS: 1539
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                RED_SHARED_LIMIT_CELLS: 48
+                SHARED_RESUME_LIMIT_CELLS: 73
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+...
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [0,1,2,5,6]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+
+#Egress Port Thresholds.
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 20758
+                YELLOW_SHARED_LIMIT_CELLS: 24909
+                SHARED_LIMIT_CELLS: 265703
+                RED_SHARED_RESUME_LIMIT_CELLS: 20756
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 24907
+                SHARED_RESUME_LIMIT_CELLS: 33211
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1548
+                YELLOW_SHARED_LIMIT_CELLS: 1857
+                SHARED_LIMIT_CELLS: 19818
+                RED_SHARED_RESUME_LIMIT_CELLS: 1546
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1855
+                SHARED_RESUME_LIMIT_CELLS: 2475
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+...
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [51,54], [67,71], [85,88], [101,105], [118,122], [135,139], [153,156], [169,173], [187,190], [203,207], [221,224], [237,241], [254,258], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 2979
+                SHARED_RESUME_LIMIT_PKTS: 2965
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2234
+                RED_SHARED_LIMIT_PKTS: 1861
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2220
+                RED_SHARED_RESUME_LIMIT_PKTS: 1847
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,4], [17,20], [34,37], [51,54], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[68,71], [85,88], [102,105], [119,122], [136,139], [153,156], [170,173], [187,190], [204,207], [221,224], [238,241], [255,258], [272,275], [289,292], [306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+...
diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/BALANCED b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/BALANCED
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/BALANCED
rename to device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/BALANCED
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/buffer_ports.j2
new file mode 100644
index 00000000000..bba32dbdd98
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/buffers.json.j2
new file mode 100644
index 00000000000..015c49445b5
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 'lt2' %}
+{%- include 'buffers_config.j2' %}
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/buffers_defaults_lt2.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/buffers_defaults_lt2.j2
new file mode 120000
index 00000000000..b9996918f7e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/buffers_defaults_lt2.j2
@@ -0,0 +1 @@
+./BALANCED/buffers_defaults_lt2.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/hwsku.json
new file mode 100644
index 00000000000..1650c128d35
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/hwsku.json
@@ -0,0 +1,266 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "2x400G",
+            "autoneg": "on"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/pg_profile_lookup.ini
new file mode 120000
index 00000000000..283215979fb
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/pg_profile_lookup.ini
@@ -0,0 +1 @@
+./BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/port_config.ini
new file mode 100644
index 00000000000..fa1b9d2701f
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/port_config.ini
@@ -0,0 +1,131 @@
+# name       lanes            alias   index  speed   fec
+Ethernet0    17,18,19,20      etp1a   1      400000  rs
+Ethernet4    21,22,23,24      etp1b   1      400000  rs
+Ethernet8    1,2,3,4          etp2a   2      400000  rs
+Ethernet12   5,6,7,8          etp2b   2      400000  rs
+Ethernet16   9,10,11,12       etp3a   3      400000  rs
+Ethernet20   13,14,15,16      etp3b   3      400000  rs
+Ethernet24   25,26,27,28      etp4a   4      400000  rs
+Ethernet28   29,30,31,32      etp4b   4      400000  rs
+Ethernet32   57,58,59,60      etp5a   5      400000  rs
+Ethernet36   61,62,63,64      etp5b   5      400000  rs
+Ethernet40   41,42,43,44      etp6a   6      400000  rs
+Ethernet44   45,46,47,48      etp6b   6      400000  rs
+Ethernet48   33,34,35,36      etp7a   7      400000  rs
+Ethernet52   37,38,39,40      etp7b   7      400000  rs
+Ethernet56   49,50,51,52      etp8a   8      400000  rs
+Ethernet60   53,54,55,56      etp8b   8      400000  rs
+Ethernet64   89,90,91,92      etp9a   9      400000  rs
+Ethernet68   93,94,95,96      etp9b   9      400000  rs
+Ethernet72   73,74,75,76      etp10a  10     400000  rs
+Ethernet76   77,78,79,80      etp10b  10     400000  rs
+Ethernet80   65,66,67,68      etp11a  11     400000  rs
+Ethernet84   69,70,71,72      etp11b  11     400000  rs
+Ethernet88   81,82,83,84      etp12a  12     400000  rs
+Ethernet92   85,86,87,88      etp12b  12     400000  rs
+Ethernet96   121,122,123,124  etp13a  13     400000  rs
+Ethernet100  125,126,127,128  etp13b  13     400000  rs
+Ethernet104  105,106,107,108  etp14a  14     400000  rs
+Ethernet108  109,110,111,112  etp14b  14     400000  rs
+Ethernet112  97,98,99,100     etp15a  15     400000  rs
+Ethernet116  101,102,103,104  etp15b  15     400000  rs
+Ethernet120  113,114,115,116  etp16a  16     400000  rs
+Ethernet124  117,118,119,120  etp16b  16     400000  rs
+Ethernet128  153,154,155,156  etp17a  17     400000  rs
+Ethernet132  157,158,159,160  etp17b  17     400000  rs
+Ethernet136  137,138,139,140  etp18a  18     400000  rs
+Ethernet140  141,142,143,144  etp18b  18     400000  rs
+Ethernet144  129,130,131,132  etp19a  19     400000  rs
+Ethernet148  133,134,135,136  etp19b  19     400000  rs
+Ethernet152  145,146,147,148  etp20a  20     400000  rs
+Ethernet156  149,150,151,152  etp20b  20     400000  rs
+Ethernet160  185,186,187,188  etp21a  21     400000  rs
+Ethernet164  189,190,191,192  etp21b  21     400000  rs
+Ethernet168  169,170,171,172  etp22a  22     400000  rs
+Ethernet172  173,174,175,176  etp22b  22     400000  rs
+Ethernet176  161,162,163,164  etp23a  23     400000  rs
+Ethernet180  165,166,167,168  etp23b  23     400000  rs
+Ethernet184  177,178,179,180  etp24a  24     400000  rs
+Ethernet188  181,182,183,184  etp24b  24     400000  rs
+Ethernet192  217,218,219,220  etp25a  25     400000  rs
+Ethernet196  221,222,223,224  etp25b  25     400000  rs
+Ethernet200  201,202,203,204  etp26a  26     400000  rs
+Ethernet204  205,206,207,208  etp26b  26     400000  rs
+Ethernet208  193,194,195,196  etp27a  27     400000  rs
+Ethernet212  197,198,199,200  etp27b  27     400000  rs
+Ethernet216  209,210,211,212  etp28a  28     400000  rs
+Ethernet220  213,214,215,216  etp28b  28     400000  rs
+Ethernet224  249,250,251,252  etp29a  29     400000  rs
+Ethernet228  253,254,255,256  etp29b  29     400000  rs
+Ethernet232  233,234,235,236  etp30a  30     400000  rs
+Ethernet236  237,238,239,240  etp30b  30     400000  rs
+Ethernet240  225,226,227,228  etp31a  31     400000  rs
+Ethernet244  229,230,231,232  etp31b  31     400000  rs
+Ethernet248  241,242,243,244  etp32a  32     400000  rs
+Ethernet252  245,246,247,248  etp32b  32     400000  rs
+Ethernet256  273,274,275,276  etp33a  33     400000  rs
+Ethernet260  277,278,279,280  etp33b  33     400000  rs
+Ethernet264  257,258,259,260  etp34a  34     400000  rs
+Ethernet268  261,262,263,264  etp34b  34     400000  rs
+Ethernet272  265,266,267,268  etp35a  35     400000  rs
+Ethernet276  269,270,271,272  etp35b  35     400000  rs
+Ethernet280  281,282,283,284  etp36a  36     400000  rs
+Ethernet284  285,286,287,288  etp36b  36     400000  rs
+Ethernet288  313,314,315,316  etp37a  37     400000  rs
+Ethernet292  317,318,319,320  etp37b  37     400000  rs
+Ethernet296  297,298,299,300  etp38a  38     400000  rs
+Ethernet300  301,302,303,304  etp38b  38     400000  rs
+Ethernet304  289,290,291,292  etp39a  39     400000  rs
+Ethernet308  293,294,295,296  etp39b  39     400000  rs
+Ethernet312  305,306,307,308  etp40a  40     400000  rs
+Ethernet316  309,310,311,312  etp40b  40     400000  rs
+Ethernet320  345,346,347,348  etp41a  41     400000  rs
+Ethernet324  349,350,351,352  etp41b  41     400000  rs
+Ethernet328  329,330,331,332  etp42a  42     400000  rs
+Ethernet332  333,334,335,336  etp42b  42     400000  rs
+Ethernet336  321,322,323,324  etp43a  43     400000  rs
+Ethernet340  325,326,327,328  etp43b  43     400000  rs
+Ethernet344  337,338,339,340  etp44a  44     400000  rs
+Ethernet348  341,342,343,344  etp44b  44     400000  rs
+Ethernet352  377,378,379,380  etp45a  45     400000  rs
+Ethernet356  381,382,383,384  etp45b  45     400000  rs
+Ethernet360  361,362,363,364  etp46a  46     400000  rs
+Ethernet364  365,366,367,368  etp46b  46     400000  rs
+Ethernet368  353,354,355,356  etp47a  47     400000  rs
+Ethernet372  357,358,359,360  etp47b  47     400000  rs
+Ethernet376  369,370,371,372  etp48a  48     400000  rs
+Ethernet380  373,374,375,376  etp48b  48     400000  rs
+Ethernet384  409,410,411,412  etp49a  49     400000  rs
+Ethernet388  413,414,415,416  etp49b  49     400000  rs
+Ethernet392  393,394,395,396  etp50a  50     400000  rs
+Ethernet396  397,398,399,400  etp50b  50     400000  rs
+Ethernet400  385,386,387,388  etp51a  51     400000  rs
+Ethernet404  389,390,391,392  etp51b  51     400000  rs
+Ethernet408  401,402,403,404  etp52a  52     400000  rs
+Ethernet412  405,406,407,408  etp52b  52     400000  rs
+Ethernet416  441,442,443,444  etp53a  53     400000  rs
+Ethernet420  445,446,447,448  etp53b  53     400000  rs
+Ethernet424  425,426,427,428  etp54a  54     400000  rs
+Ethernet428  429,430,431,432  etp54b  54     400000  rs
+Ethernet432  417,418,419,420  etp55a  55     400000  rs
+Ethernet436  421,422,423,424  etp55b  55     400000  rs
+Ethernet440  433,434,435,436  etp56a  56     400000  rs
+Ethernet444  437,438,439,440  etp56b  56     400000  rs
+Ethernet448  473,474,475,476  etp57a  57     400000  rs
+Ethernet452  477,478,479,480  etp57b  57     400000  rs
+Ethernet456  457,458,459,460  etp58a  58     400000  rs
+Ethernet460  461,462,463,464  etp58b  58     400000  rs
+Ethernet464  449,450,451,452  etp59a  59     400000  rs
+Ethernet468  453,454,455,456  etp59b  59     400000  rs
+Ethernet472  465,466,467,468  etp60a  60     400000  rs
+Ethernet476  469,470,471,472  etp60b  60     400000  rs
+Ethernet480  505,506,507,508  etp61a  61     400000  rs
+Ethernet484  509,510,511,512  etp61b  61     400000  rs
+Ethernet488  489,490,491,492  etp62a  62     400000  rs
+Ethernet492  493,494,495,496  etp62b  62     400000  rs
+Ethernet496  481,482,483,484  etp63a  63     400000  rs
+Ethernet500  485,486,487,488  etp63b  63     400000  rs
+Ethernet504  497,498,499,500  etp64a  64     400000  rs
+Ethernet508  501,502,503,504  etp64b  64     400000  rs
+Ethernet512  513              etp65   65     10000   none
+Ethernet513  515              etp66   66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/sai.profile b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/sai.profile
new file mode 100644
index 00000000000..7a12bfd7006
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/sai.profile
@@ -0,0 +1,3 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=128
+SAI_NHG_HIERARCHICAL_NEXTHOP=false
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 00000000000..76464a8bf34
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,1429 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 0x12
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 0
+            l3_ecmp_member_secondary_mem_size: 0
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 19
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 53
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 54
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 71
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 85
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 86
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 87
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 104
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 105
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 119
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 120
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 138
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 139
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 153
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 172
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 173
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 206
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 207
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 239
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 240
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 241
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 272
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 273
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 291
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 306
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 307
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 326
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 340
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 357
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 358
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 359
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 360
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 374
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 375
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 376
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 377
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 391
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 392
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 393
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 394
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 408
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 409
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 410
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 411
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 425
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 426
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 427
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 428
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 442
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 443
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 444
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 445
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 459
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 460
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 461
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 462
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 476
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 477
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 478
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 479
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 493
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 494
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 495
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 496
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 510
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 511
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 512
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 513
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 527
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 528
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 529
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 530
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 118
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 424
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 4],
+                          [17, 20],
+                          [34, 37],
+                          [51, 54],
+                          [68, 71],
+                          [85, 88],
+                          [102, 105],
+                          [119, 122],
+                          [136, 139],
+                          [153, 156],
+                          [170, 173],
+                          [187, 190],
+                          [204, 207],
+                          [221, 224],
+                          [238, 241],
+                          [255, 258],
+                          [272, 275],
+                          [289, 292],
+                          [306, 309],
+                          [323, 326],
+                          [340, 343],
+                          [357, 360],
+                          [374, 377],
+                          [391, 394],
+                          [408, 411],
+                          [425, 428],
+                          [442, 445],
+                          [459, 462],
+                          [476, 479],
+                          [493, 496],
+                          [510, 513],
+                          [527, 530]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[118, 118], [424, 424]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0x80
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffer_ports.j2
new file mode 100644
index 00000000000..5912b342e7b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffer_ports.j2
@@ -0,0 +1,10 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of 800g ports #}
+    {%- for port_idx in range(0, 249, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+    {# Generate list of 400g ports #}
+    {%- for port_idx in range(256, 513, 4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers.json.j2
new file mode 100644
index 00000000000..6dfe806d8aa
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 'lt2' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_lt2.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_lt2.j2
new file mode 100644
index 00000000000..f810dbc67ac
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_lt2.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "147226020",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "33690560"
+        },
+        "egress_lossless_pool": {
+            "size": "147226020",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        },
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_t0.j2
new file mode 120000
index 00000000000..87026e95ce4
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_t1.j2
new file mode 120000
index 00000000000..863053bf96d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/hwsku.json
new file mode 100644
index 00000000000..81eb1626552
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/hwsku.json
@@ -0,0 +1,196 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "2x400G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/pg_profile_lookup.ini
new file mode 100644
index 00000000000..5c320eb29ac
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/pg_profile_lookup.ini
@@ -0,0 +1,6 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
+400000  30m  8636    0    425958  0         3556
+400000  500m 8636    0    1136396 0         3556
+100000  500m 8636    0    1136396 0         3556
+800000  5m   8636    0    724662  0         3556
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/port_config.ini
new file mode 100644
index 00000000000..0f64e5ebb48
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/port_config.ini
@@ -0,0 +1,97 @@
+# name       lanes                            alias  index  speed   fec
+Ethernet0    17,18,19,20,21,22,23,24          etp1    1      800000  rs
+Ethernet8    1,2,3,4,5,6,7,8                  etp2    2      800000  rs
+Ethernet16   9,10,11,12,13,14,15,16           etp3    3      800000  rs
+Ethernet24   25,26,27,28,29,30,31,32          etp4    4      800000  rs
+Ethernet32   57,58,59,60,61,62,63,64          etp5    5      800000  rs
+Ethernet40   41,42,43,44,45,46,47,48          etp6    6      800000  rs
+Ethernet48   33,34,35,36,37,38,39,40          etp7    7      800000  rs
+Ethernet56   49,50,51,52,53,54,55,56          etp8    8      800000  rs
+Ethernet64   89,90,91,92,93,94,95,96          etp9    9      800000  rs
+Ethernet72   73,74,75,76,77,78,79,80          etp10   10     800000  rs
+Ethernet80   65,66,67,68,69,70,71,72          etp11   11     800000  rs
+Ethernet88   81,82,83,84,85,86,87,88          etp12   12     800000  rs
+Ethernet96   121,122,123,124,125,126,127,128  etp13   13     800000  rs
+Ethernet104  105,106,107,108,109,110,111,112  etp14   14     800000  rs
+Ethernet112  97,98,99,100,101,102,103,104     etp15   15     800000  rs
+Ethernet120  113,114,115,116,117,118,119,120  etp16   16     800000  rs
+Ethernet128  153,154,155,156,157,158,159,160  etp17   17     800000  rs
+Ethernet136  137,138,139,140,141,142,143,144  etp18   18     800000  rs
+Ethernet144  129,130,131,132,133,134,135,136  etp19   19     800000  rs
+Ethernet152  145,146,147,148,149,150,151,152  etp20   20     800000  rs
+Ethernet160  185,186,187,188,189,190,191,192  etp21   21     800000  rs
+Ethernet168  169,170,171,172,173,174,175,176  etp22   22     800000  rs
+Ethernet176  161,162,163,164,165,166,167,168  etp23   23     800000  rs
+Ethernet184  177,178,179,180,181,182,183,184  etp24   24     800000  rs
+Ethernet192  217,218,219,220,221,222,223,224  etp25   25     800000  rs
+Ethernet200  201,202,203,204,205,206,207,208  etp26   26     800000  rs
+Ethernet208  193,194,195,196,197,198,199,200  etp27   27     800000  rs
+Ethernet216  209,210,211,212,213,214,215,216  etp28   28     800000  rs
+Ethernet224  249,250,251,252,253,254,255,256  etp29   29     800000  rs
+Ethernet232  233,234,235,236,237,238,239,240  etp30   30     800000  rs
+Ethernet240  225,226,227,228,229,230,231,232  etp31   31     800000  rs
+Ethernet248  241,242,243,244,245,246,247,248  etp32   32     800000  rs
+Ethernet256  273,274,275,276                  etp33a  33     400000  rs
+Ethernet260  277,278,279,280                  etp33b  33     400000  rs
+Ethernet264  257,258,259,260                  etp34a  34     400000  rs
+Ethernet268  261,262,263,264                  etp34b  34     400000  rs
+Ethernet272  265,266,267,268                  etp35a  35     400000  rs
+Ethernet276  269,270,271,272                  etp35b  35     400000  rs
+Ethernet280  281,282,283,284                  etp36a  36     400000  rs
+Ethernet284  285,286,287,288                  etp36b  36     400000  rs
+Ethernet288  313,314,315,316                  etp37a  37     400000  rs
+Ethernet292  317,318,319,320                  etp37b  37     400000  rs
+Ethernet296  297,298,299,300                  etp38a  38     400000  rs
+Ethernet300  301,302,303,304                  etp38b  38     400000  rs
+Ethernet304  289,290,291,292                  etp39a  39     400000  rs
+Ethernet308  293,294,295,296                  etp39b  39     400000  rs
+Ethernet312  305,306,307,308                  etp40a  40     400000  rs
+Ethernet316  309,310,311,312                  etp40b  40     400000  rs
+Ethernet320  345,346,347,348                  etp41a  41     400000  rs
+Ethernet324  349,350,351,352                  etp41b  41     400000  rs
+Ethernet328  329,330,331,332                  etp42a  42     400000  rs
+Ethernet332  333,334,335,336                  etp42b  42     400000  rs
+Ethernet336  321,322,323,324                  etp43a  43     400000  rs
+Ethernet340  325,326,327,328                  etp43b  43     400000  rs
+Ethernet344  337,338,339,340                  etp44a  44     400000  rs
+Ethernet348  341,342,343,344                  etp44b  44     400000  rs
+Ethernet352  377,378,379,380                  etp45a  45     400000  rs
+Ethernet356  381,382,383,384                  etp45b  45     400000  rs
+Ethernet360  361,362,363,364                  etp46a  46     400000  rs
+Ethernet364  365,366,367,368                  etp46b  46     400000  rs
+Ethernet368  353,354,355,356                  etp47a  47     400000  rs
+Ethernet372  357,358,359,360                  etp47b  47     400000  rs
+Ethernet376  369,370,371,372                  etp48a  48     400000  rs
+Ethernet380  373,374,375,376                  etp48b  48     400000  rs
+Ethernet384  409,410,411,412                  etp49a  49     400000  rs
+Ethernet388  413,414,415,416                  etp49b  49     400000  rs
+Ethernet392  393,394,395,396                  etp50a  50     400000  rs
+Ethernet396  397,398,399,400                  etp50b  50     400000  rs
+Ethernet400  385,386,387,388                  etp51a  51     400000  rs
+Ethernet404  389,390,391,392                  etp51b  51     400000  rs
+Ethernet408  401,402,403,404                  etp52a  52     400000  rs
+Ethernet412  405,406,407,408                  etp52b  52     400000  rs
+Ethernet416  441,442,443,444                  etp53a  53     400000  rs
+Ethernet420  445,446,447,448                  etp53b  53     400000  rs
+Ethernet424  425,426,427,428                  etp54a  54     400000  rs
+Ethernet428  429,430,431,432                  etp54b  54     400000  rs
+Ethernet432  417,418,419,420                  etp55a  55     400000  rs
+Ethernet436  421,422,423,424                  etp55b  55     400000  rs
+Ethernet440  433,434,435,436                  etp56a  56     400000  rs
+Ethernet444  437,438,439,440                  etp56b  56     400000  rs
+Ethernet448  473,474,475,476                  etp57a  57     400000  rs
+Ethernet452  477,478,479,480                  etp57b  57     400000  rs
+Ethernet456  457,458,459,460                  etp58a  58     400000  rs
+Ethernet460  461,462,463,464                  etp58b  58     400000  rs
+Ethernet464  449,450,451,452                  etp59a  59     400000  rs
+Ethernet468  453,454,455,456                  etp59b  59     400000  rs
+Ethernet472  465,466,467,468                  etp60a  60     400000  rs
+Ethernet476  469,470,471,472                  etp60b  60     400000  rs
+Ethernet480  505,506,507,508                  etp61a  61     400000  rs
+Ethernet484  509,510,511,512                  etp61b  61     400000  rs
+Ethernet488  489,490,491,492                  etp62a  62     400000  rs
+Ethernet492  493,494,495,496                  etp62b  62     400000  rs
+Ethernet496  481,482,483,484                  etp63a  63     400000  rs
+Ethernet500  485,486,487,488                  etp63b  63     400000  rs
+Ethernet504  497,498,499,500                  etp64a  64     400000  rs
+Ethernet508  501,502,503,504                  etp64b  64     400000  rs
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/qos.json.j2
new file mode 100644
index 00000000000..5914a174213
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/sai.profile b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/sai.profile
new file mode 100644
index 00000000000..ba7bebc4734
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/sai.profile
@@ -0,0 +1,3 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=96
+SAI_NHG_HIERARCHICAL_NEXTHOP=false
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 00000000000..9ecb8b4bb35
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,2577 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 32x800g 64x400g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 0x12
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 0
+            stat_custom_receive0_management_mode: 1
+            l3_alpm_large_vrf_mode: 1
+            l3_ecmp_member_secondary_mem_size: 0
+            sai_mmu_custom_config: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 85
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 86
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 119
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 120
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 153
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 239
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 272
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 273
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 291
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 306
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 307
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 326
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 340
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 357
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 358
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 359
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 360
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 374
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 375
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 376
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 377
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 391
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 392
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 393
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 394
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 408
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 409
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 410
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 411
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 425
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 426
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 427
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 428
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 442
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 443
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 444
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 445
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 459
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 460
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 461
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 462
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 476
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 477
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 478
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 479
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 493
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 494
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 495
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 496
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 510
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 511
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 512
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 513
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 527
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 528
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 529
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 530
+            :
+                PC_PHYS_PORT_ID: 509
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 2],
+                          [17, 18],
+                          [34, 35],
+                          [51, 52],
+                          [68, 69],
+                          [85, 86],
+                          [102, 103],
+                          [119, 120],
+                          [136, 137],
+                          [153, 154],
+                          [170, 171],
+                          [187, 188],
+                          [204, 205],
+                          [221, 222],
+                          [238, 239],
+                          [255, 256]]
+            :
+                ENABLE: 1
+                SPEED: 800000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[272, 275],
+                          [289, 292],
+                          [306, 309],
+                          [323, 326],
+                          [340, 343],
+                          [357, 360],
+                          [374, 377],
+                          [391, 394],
+                          [408, 411],
+                          [425, 428],
+                          [442, 445],
+                          [459, 462],
+                          [476, 479],
+                          [493, 496],
+                          [510, 513],
+                          [527, 530]]
+            :
+                ENABLE: 1
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0x80
+            #disable vxlan tunnel stats
+            sai_stats_disable_mask: 0x200
+            #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        TM_SCHEDULER_CONFIG:
+            DYNAMIC_VOQ: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            MIRROR_ON_DROP_RESERVATION: 0
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+
+...
+
+# Initialize the various thresholds to zero
+---
+# Ingress service pool level initialization
+device:
+    0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+
+        # Ingress headroom pool
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+
+        # PFC generation: Priority group(s)
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        # Egress multicast CQE pool
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+
+...
+#Per Port Registers
+#Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                # Pause enable bit,
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+               PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+
+...
+# Output Port Thresholds -2
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+
+...
+### Begin MMU ingress threshold settings
+
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 250263
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 66320
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[272,275], [289,292]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[272,275], [289,292]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+
+...
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 325520
+                RESUME_LIMIT_CELLS: 325520
+
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[272,275], [289,292]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 34
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1677
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 34
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 4474
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 34
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 2853
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+
+...
+
+
+### Egress Service Pools
+---
+device:
+    0:
+# Setting Q group limit to 0
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 250263
+                YELLOW_SHARED_LIMIT_CELLS: 23463
+                RED_SHARED_LIMIT_CELLS: 19552
+                SHARED_RESUME_LIMIT_CELLS: 31273
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 23453
+                RED_SHARED_RESUME_LIMIT_CELLS: 19542
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19818
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1858
+                RED_SHARED_LIMIT_CELLS: 1549
+                SHARED_RESUME_LIMIT_CELLS: 2467
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1848
+                RED_SHARED_RESUME_LIMIT_CELLS: 1539
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                RED_SHARED_LIMIT_CELLS: 48
+                SHARED_RESUME_LIMIT_CELLS: 73
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+
+...
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [0,1,2,5,6]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[272,275], [289,292]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[272,275], [289,292]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[272,275], [289,292]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+
+#Egress Port Thresholds.
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 19551
+                YELLOW_SHARED_LIMIT_CELLS: 23462
+                SHARED_LIMIT_CELLS: 250263
+                RED_SHARED_RESUME_LIMIT_CELLS: 19549
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 23460
+                SHARED_RESUME_LIMIT_CELLS: 31281
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1548
+                YELLOW_SHARED_LIMIT_CELLS: 1857
+                SHARED_LIMIT_CELLS: 19818
+                RED_SHARED_RESUME_LIMIT_CELLS: 1546
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1855
+                SHARED_RESUME_LIMIT_CELLS: 2475
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+...
+
+
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,275], [288,292], [305,309], [323,326], [339,343], [357,360], [373,377], [391,394], [407,411], [424,428], [441,445], [459,462], [475,479], [493,496], [509,513], [527,530], 543]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[272,275], [289,292]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[272,275], [289,292]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 2979
+                SHARED_RESUME_LIMIT_PKTS: 2965
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2234
+                RED_SHARED_LIMIT_PKTS: 1861
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2220
+                RED_SHARED_RESUME_LIMIT_PKTS: 1847
+
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[272,275], [289,292]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[272,275], [289,292]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[272,275], [289,292]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 244736
+                LOSSY_LOW_MAX_BYTES: 46720
+                LOSSY_MAX_BYTES: 53504
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 502528
+                LOSSY_LOW_MAX_BYTES: 93440
+                LOSSY_MAX_BYTES: 100224
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[272,275], [289,292]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 162432
+                XON_BYTES: 161920
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 330880
+                XON_BYTES: 330368
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[272,275], [289,292]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[272,275], [289,292]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[272,275], [289,292]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[306,309], [323,326], [340,343], [357,360], [374,377], [391,394], [408,411], [425,428], [442,445], [459,462], [476,479], [493,496], [510,513], [527,530]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+...
+
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffer_ports.j2
new file mode 100644
index 00000000000..5a518735d54
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 513, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers.json.j2
new file mode 100644
index 00000000000..bf86af3c6ca
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 'ft2' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_ft2.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_ft2.j2
new file mode 100644
index 00000000000..fff8c1e9e13
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_ft2.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "164302948",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "17962880"
+        },
+        "egress_lossless_pool": {
+            "size": "164302948",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        },
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "165364160"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_t0.j2
new file mode 120000
index 00000000000..87026e95ce4
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_t1.j2
new file mode 120000
index 00000000000..863053bf96d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/hwsku.json
new file mode 100644
index 00000000000..74df314829b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/hwsku.json
@@ -0,0 +1,196 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "1x800G[400G]"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/pg_profile_lookup.ini
new file mode 100644
index 00000000000..5174b5f4581
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/pg_profile_lookup.ini
@@ -0,0 +1,3 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
+800000  5m   8636    0    724662  0         3556
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/port_config.ini
new file mode 100644
index 00000000000..e81156bb08a
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/port_config.ini
@@ -0,0 +1,65 @@
+# name       lanes                            alias  index  speed   fec
+Ethernet0    17,18,19,20,21,22,23,24          etp1   1      800000  rs
+Ethernet8    1,2,3,4,5,6,7,8                  etp2   2      800000  rs
+Ethernet16   9,10,11,12,13,14,15,16           etp3   3      800000  rs
+Ethernet24   25,26,27,28,29,30,31,32          etp4   4      800000  rs
+Ethernet32   57,58,59,60,61,62,63,64          etp5   5      800000  rs
+Ethernet40   41,42,43,44,45,46,47,48          etp6   6      800000  rs
+Ethernet48   33,34,35,36,37,38,39,40          etp7   7      800000  rs
+Ethernet56   49,50,51,52,53,54,55,56          etp8   8      800000  rs
+Ethernet64   89,90,91,92,93,94,95,96          etp9   9      800000  rs
+Ethernet72   73,74,75,76,77,78,79,80          etp10  10     800000  rs
+Ethernet80   65,66,67,68,69,70,71,72          etp11  11     800000  rs
+Ethernet88   81,82,83,84,85,86,87,88          etp12  12     800000  rs
+Ethernet96   121,122,123,124,125,126,127,128  etp13  13     800000  rs
+Ethernet104  105,106,107,108,109,110,111,112  etp14  14     800000  rs
+Ethernet112  97,98,99,100,101,102,103,104     etp15  15     800000  rs
+Ethernet120  113,114,115,116,117,118,119,120  etp16  16     800000  rs
+Ethernet128  153,154,155,156,157,158,159,160  etp17  17     800000  rs
+Ethernet136  137,138,139,140,141,142,143,144  etp18  18     800000  rs
+Ethernet144  129,130,131,132,133,134,135,136  etp19  19     800000  rs
+Ethernet152  145,146,147,148,149,150,151,152  etp20  20     800000  rs
+Ethernet160  185,186,187,188,189,190,191,192  etp21  21     800000  rs
+Ethernet168  169,170,171,172,173,174,175,176  etp22  22     800000  rs
+Ethernet176  161,162,163,164,165,166,167,168  etp23  23     800000  rs
+Ethernet184  177,178,179,180,181,182,183,184  etp24  24     800000  rs
+Ethernet192  217,218,219,220,221,222,223,224  etp25  25     800000  rs
+Ethernet200  201,202,203,204,205,206,207,208  etp26  26     800000  rs
+Ethernet208  193,194,195,196,197,198,199,200  etp27  27     800000  rs
+Ethernet216  209,210,211,212,213,214,215,216  etp28  28     800000  rs
+Ethernet224  249,250,251,252,253,254,255,256  etp29  29     800000  rs
+Ethernet232  233,234,235,236,237,238,239,240  etp30  30     800000  rs
+Ethernet240  225,226,227,228,229,230,231,232  etp31  31     800000  rs
+Ethernet248  241,242,243,244,245,246,247,248  etp32  32     800000  rs
+Ethernet256  273,274,275,276,277,278,279,280  etp33  33     800000  rs
+Ethernet264  257,258,259,260,261,262,263,264  etp34  34     800000  rs
+Ethernet272  265,266,267,268,269,270,271,272  etp35  35     800000  rs
+Ethernet280  281,282,283,284,285,286,287,288  etp36  36     800000  rs
+Ethernet288  313,314,315,316,317,318,319,320  etp37  37     800000  rs
+Ethernet296  297,298,299,300,301,302,303,304  etp38  38     800000  rs
+Ethernet304  289,290,291,292,293,294,295,296  etp39  39     800000  rs
+Ethernet312  305,306,307,308,309,310,311,312  etp40  40     800000  rs
+Ethernet320  345,346,347,348,349,350,351,352  etp41  41     800000  rs
+Ethernet328  329,330,331,332,333,334,335,336  etp42  42     800000  rs
+Ethernet336  321,322,323,324,325,326,327,328  etp43  43     800000  rs
+Ethernet344  337,338,339,340,341,342,343,344  etp44  44     800000  rs
+Ethernet352  377,378,379,380,381,382,383,384  etp45  45     800000  rs
+Ethernet360  361,362,363,364,365,366,367,368  etp46  46     800000  rs
+Ethernet368  353,354,355,356,357,358,359,360  etp47  47     800000  rs
+Ethernet376  369,370,371,372,373,374,375,376  etp48  48     800000  rs
+Ethernet384  409,410,411,412,413,414,415,416  etp49  49     800000  rs
+Ethernet392  393,394,395,396,397,398,399,400  etp50  50     800000  rs
+Ethernet400  385,386,387,388,389,390,391,392  etp51  51     800000  rs
+Ethernet408  401,402,403,404,405,406,407,408  etp52  52     800000  rs
+Ethernet416  441,442,443,444,445,446,447,448  etp53  53     800000  rs
+Ethernet424  425,426,427,428,429,430,431,432  etp54  54     800000  rs
+Ethernet432  417,418,419,420,421,422,423,424  etp55  55     800000  rs
+Ethernet440  433,434,435,436,437,438,439,440  etp56  56     800000  rs
+Ethernet448  473,474,475,476,477,478,479,480  etp57  57     800000  rs
+Ethernet456  457,458,459,460,461,462,463,464  etp58  58     800000  rs
+Ethernet464  449,450,451,452,453,454,455,456  etp59  59     800000  rs
+Ethernet472  465,466,467,468,469,470,471,472  etp60  60     800000  rs
+Ethernet480  505,506,507,508,509,510,511,512  etp61  61     800000  rs
+Ethernet488  489,490,491,492,493,494,495,496  etp62  62     800000  rs
+Ethernet496  481,482,483,484,485,486,487,488  etp63  63     800000  rs
+Ethernet504  497,498,499,500,501,502,503,504  etp64  64     800000  rs
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/qos.json.j2
new file mode 100644
index 00000000000..5914a174213
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/sai.profile b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/sai.profile
new file mode 100644
index 00000000000..33970068fd5
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/sai.profile
@@ -0,0 +1,3 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
+SAI_NUM_ECMP_MEMBERS=64
+SAI_NHG_HIERARCHICAL_NEXTHOP=false
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 00000000000..8b898ec3049
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,2321 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 0x12
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 0
+            stat_custom_receive0_management_mode: 1
+            l3_alpm_large_vrf_mode: 1
+            l3_ecmp_member_secondary_mem_size: 0
+            sai_mmu_custom_config: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 85
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 86
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 119
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 120
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 153
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 239
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 272
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 273
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 306
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 307
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 340
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 357
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 358
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 374
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 375
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 391
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 392
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 408
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 409
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 425
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 426
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 442
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 443
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 459
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 460
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 476
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 477
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 493
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 494
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 510
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 511
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 527
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 528
+            :
+                PC_PHYS_PORT_ID: 505
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 2],
+                          [17, 18],
+                          [34, 35],
+                          [51, 52],
+                          [68, 69],
+                          [85, 86],
+                          [102, 103],
+                          [119, 120],
+                          [136, 137],
+                          [153, 154],
+                          [170, 171],
+                          [187, 188],
+                          [204, 205],
+                          [221, 222],
+                          [238, 239],
+                          [255, 256],
+                          [272, 273],
+                          [289, 290],
+                          [306, 307],
+                          [323, 324],
+                          [340, 341],
+                          [357, 358],
+                          [374, 375],
+                          [391, 392],
+                          [408, 409],
+                          [425, 426],
+                          [442, 443],
+                          [459, 460],
+                          [476, 477],
+                          [493, 494],
+                          [510, 511],
+                          [527, 528]]
+            :
+                ENABLE: 0
+                SPEED: 800000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0x80
+            #disable vxlan tunnel stats
+            sai_stats_disable_mask: 0x200
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        TM_SCHEDULER_CONFIG:
+            DYNAMIC_VOQ: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            MIRROR_ON_DROP_RESERVATION: 0
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+
+...
+
+# Initialize the various thresholds to zero
+---
+# Ingress service pool level initialization
+device:
+    0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+
+        # Ingress headroom pool
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+
+        # PFC generation: Priority group(s)
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        # Egress multicast CQE pool
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+
+...
+#Per Port Registers
+#Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+            :
+                # Pause enable bit,
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+               PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+
+...
+# Output Port Thresholds -2
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+
+...
+### Begin MMU ingress threshold settings
+
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 283655
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 35360
+
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+
+...
+
+
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 325520
+                RESUME_LIMIT_CELLS: 325520
+
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 34
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 2853
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 34
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 2853
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [33, 67, 101, 135, 169, 203, 237, 271, 305, 339, 373, 407, 441, 475, 509, 543]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+
+...
+
+
+### Egress Service Pools
+---
+device:
+    0:
+# Setting Q group limit to 0
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 283655
+                YELLOW_SHARED_LIMIT_CELLS: 26593
+                RED_SHARED_LIMIT_CELLS: 22161
+                SHARED_RESUME_LIMIT_CELLS: 35447
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 26583
+                RED_SHARED_RESUME_LIMIT_CELLS: 22151
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19818
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1858
+                RED_SHARED_LIMIT_CELLS: 1549
+                SHARED_RESUME_LIMIT_CELLS: 2467
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1848
+                RED_SHARED_RESUME_LIMIT_CELLS: 1539
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                RED_SHARED_LIMIT_CELLS: 48
+                SHARED_RESUME_LIMIT_CELLS: 73
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+
+...
+
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_UC_Q_ID: [0,1,2,5,6]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 325520
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_MC_Q_ID: [[0,3]]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+
+#Egress Port Thresholds.
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 22160
+                YELLOW_SHARED_LIMIT_CELLS: 26592
+                SHARED_LIMIT_CELLS: 283655
+                RED_SHARED_RESUME_LIMIT_CELLS: 22158
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 26590
+                SHARED_RESUME_LIMIT_CELLS: 35455
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1548
+                YELLOW_SHARED_LIMIT_CELLS: 1857
+                SHARED_LIMIT_CELLS: 19818
+                RED_SHARED_RESUME_LIMIT_CELLS: 1546
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1855
+                SHARED_RESUME_LIMIT_CELLS: 2475
+            ?
+                PORT_ID: [[0,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+...
+
+
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,2], [17,18], [33,35], [51,52], [67,69], [85,86], [101,103], [119,120], [135,137], [153,154], [169,171], [187,188], [203,205], [221,222], [237,239], [255,256], [271,273], [288,290], [305,307], [323,324], [339,341], [357,358], [373,375], [391,392], [407,409], [424,426], [441,443], [459,460], [475,477], [493,494], [509,511], [527,528], 543]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 2979
+                SHARED_RESUME_LIMIT_PKTS: 2965
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2234
+                RED_SHARED_LIMIT_PKTS: 1861
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2220
+                RED_SHARED_RESUME_LIMIT_PKTS: 1847
+
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 502528
+                LOSSY_LOW_MAX_BYTES: 93440
+                LOSSY_MAX_BYTES: 100224
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 502528
+                LOSSY_LOW_MAX_BYTES: 93440
+                LOSSY_MAX_BYTES: 100224
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 330880
+                XON_BYTES: 330368
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 330880
+                XON_BYTES: 330368
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,2], [17,18], [34,35], [51,52], [68,69], [85,86], [102,103], [119,120], [136,137], [153,154], [170,171], [187,188], [204,205], [221,222], [238,239], [255,256]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[272,273], [289,290], [306,307], [323,324], [340,341], [357,358], [374,375], [391,392], [408,409], [425,426], [442,443], [459,460], [476,477], [493,494], [510,511], [527,528]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [118, 254, 288, 424]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-O128 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-O128
new file mode 120000
index 00000000000..ab667ff10cb
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-O128
@@ -0,0 +1 @@
+../x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-P32O64 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-P32O64
new file mode 120000
index 00000000000..6ef55d73516
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-P32O64
@@ -0,0 +1 @@
+Arista-7060X6-64PE-B-P32O64
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-P64 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-P64
new file mode 120000
index 00000000000..7a037b18307
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-P64
@@ -0,0 +1 @@
+Arista-7060X6-64PE-B-P64
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/default_sku b/device/arista/x86_64-arista_7060x6_64pe_b/default_sku
new file mode 100644
index 00000000000..bb1cb463294
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/default_sku
@@ -0,0 +1 @@
+Arista-7060X6-64PE-B-C512S2 t1
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/platform.json b/device/arista/x86_64-arista_7060x6_64pe_b/platform.json
new file mode 100644
index 00000000000..ad649af85e0
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/platform.json
@@ -0,0 +1,2392 @@
+{
+    "chassis": {
+        "name": "DCS-7060X6-64PE-B",
+        "components": [
+            {
+                "name": "Aboot()"
+            },
+            {
+                "name": "Scd(addr=0000:03:00.0)"
+            },
+            {
+                "name": "RedstartSysCpld(addr=13-0023)"
+            },
+            {
+                "name": "Scd(addr=0000:05:00.0)"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "slot1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    }
+                ]
+            },
+            {
+                "name": "slot2",
+                "fans": [
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "slot3",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    }
+                ]
+            },
+            {
+                "name": "slot4",
+                "fans": [
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "psu1",
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "fans": [
+                    {
+                        "name": "psu1/1",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ],
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "psu2",
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "fans": [
+                    {
+                        "name": "psu2/1",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ],
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "thermals": [
+            {
+                "name": "Cpu temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Outlet",
+                "controllable": false
+            },
+            {
+                "name": "Switch Card temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Air Exit Behind TH5",
+                "controllable": false
+            },
+            {
+                "name": "Left Edge PCB Near Rear of Switch",
+                "controllable": false
+            },
+            {
+                "name": "Air Inlet",
+                "controllable": false
+            },
+            {
+                "name": "Management Card Inlet",
+                "controllable": false
+            }
+        ],
+        "sfps": [
+            {
+                "name": "osfp1"
+            },
+            {
+                "name": "osfp2"
+            },
+            {
+                "name": "osfp3"
+            },
+            {
+                "name": "osfp4"
+            },
+            {
+                "name": "osfp5"
+            },
+            {
+                "name": "osfp6"
+            },
+            {
+                "name": "osfp7"
+            },
+            {
+                "name": "osfp8"
+            },
+            {
+                "name": "osfp9"
+            },
+            {
+                "name": "osfp10"
+            },
+            {
+                "name": "osfp11"
+            },
+            {
+                "name": "osfp12"
+            },
+            {
+                "name": "osfp13"
+            },
+            {
+                "name": "osfp14"
+            },
+            {
+                "name": "osfp15"
+            },
+            {
+                "name": "osfp16"
+            },
+            {
+                "name": "osfp17"
+            },
+            {
+                "name": "osfp18"
+            },
+            {
+                "name": "osfp19"
+            },
+            {
+                "name": "osfp20"
+            },
+            {
+                "name": "osfp21"
+            },
+            {
+                "name": "osfp22"
+            },
+            {
+                "name": "osfp23"
+            },
+            {
+                "name": "osfp24"
+            },
+            {
+                "name": "osfp25"
+            },
+            {
+                "name": "osfp26"
+            },
+            {
+                "name": "osfp27"
+            },
+            {
+                "name": "osfp28"
+            },
+            {
+                "name": "osfp29"
+            },
+            {
+                "name": "osfp30"
+            },
+            {
+                "name": "osfp31"
+            },
+            {
+                "name": "osfp32"
+            },
+            {
+                "name": "osfp33"
+            },
+            {
+                "name": "osfp34"
+            },
+            {
+                "name": "osfp35"
+            },
+            {
+                "name": "osfp36"
+            },
+            {
+                "name": "osfp37"
+            },
+            {
+                "name": "osfp38"
+            },
+            {
+                "name": "osfp39"
+            },
+            {
+                "name": "osfp40"
+            },
+            {
+                "name": "osfp41"
+            },
+            {
+                "name": "osfp42"
+            },
+            {
+                "name": "osfp43"
+            },
+            {
+                "name": "osfp44"
+            },
+            {
+                "name": "osfp45"
+            },
+            {
+                "name": "osfp46"
+            },
+            {
+                "name": "osfp47"
+            },
+            {
+                "name": "osfp48"
+            },
+            {
+                "name": "osfp49"
+            },
+            {
+                "name": "osfp50"
+            },
+            {
+                "name": "osfp51"
+            },
+            {
+                "name": "osfp52"
+            },
+            {
+                "name": "osfp53"
+            },
+            {
+                "name": "osfp54"
+            },
+            {
+                "name": "osfp55"
+            },
+            {
+                "name": "osfp56"
+            },
+            {
+                "name": "osfp57"
+            },
+            {
+                "name": "osfp58"
+            },
+            {
+                "name": "osfp59"
+            },
+            {
+                "name": "osfp60"
+            },
+            {
+                "name": "osfp61"
+            },
+            {
+                "name": "osfp62"
+            },
+            {
+                "name": "osfp63"
+            },
+            {
+                "name": "osfp64"
+            },
+            {
+                "name": "sfp65"
+            },
+            {
+                "name": "sfp66"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp1"
+                ],
+                "1x400G": [
+                    "etp1"
+                ],
+                "2x400G": [
+                    "etp1a",
+                    "etp1b"
+                ],
+                "4x200G": [
+                    "etp1a",
+                    "etp1b",
+                    "etp1c",
+                    "etp1d"
+                ],
+                "8x100G": [
+                    "etp1a",
+                    "etp1b",
+                    "etp1c",
+                    "etp1d",
+                    "etp1e",
+                    "etp1f",
+                    "etp1g",
+                    "etp1h"
+                ]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp2"
+                ],
+                "1x400G": [
+                    "etp2"
+                ],
+                "2x400G": [
+                    "etp2a",
+                    "etp2b"
+                ],
+                "4x200G": [
+                    "etp2a",
+                    "etp2b",
+                    "etp2c",
+                    "etp2d"
+                ],
+                "8x100G": [
+                    "etp2a",
+                    "etp2b",
+                    "etp2c",
+                    "etp2d",
+                    "etp2e",
+                    "etp2f",
+                    "etp2g",
+                    "etp2h"
+                ]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp3"
+                ],
+                "1x400G": [
+                    "etp3"
+                ],
+                "2x400G": [
+                    "etp3a",
+                    "etp3b"
+                ],
+                "4x200G": [
+                    "etp3a",
+                    "etp3b",
+                    "etp3c",
+                    "etp3d"
+                ],
+                "8x100G": [
+                    "etp3a",
+                    "etp3b",
+                    "etp3c",
+                    "etp3d",
+                    "etp3e",
+                    "etp3f",
+                    "etp3g",
+                    "etp3h"
+                ]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp4"
+                ],
+                "1x400G": [
+                    "etp4"
+                ],
+                "2x400G": [
+                    "etp4a",
+                    "etp4b"
+                ],
+                "4x200G": [
+                    "etp4a",
+                    "etp4b",
+                    "etp4c",
+                    "etp4d"
+                ],
+                "8x100G": [
+                    "etp4a",
+                    "etp4b",
+                    "etp4c",
+                    "etp4d",
+                    "etp4e",
+                    "etp4f",
+                    "etp4g",
+                    "etp4h"
+                ]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp5"
+                ],
+                "1x400G": [
+                    "etp5"
+                ],
+                "2x400G": [
+                    "etp5a",
+                    "etp5b"
+                ],
+                "4x200G": [
+                    "etp5a",
+                    "etp5b",
+                    "etp5c",
+                    "etp5d"
+                ],
+                "8x100G": [
+                    "etp5a",
+                    "etp5b",
+                    "etp5c",
+                    "etp5d",
+                    "etp5e",
+                    "etp5f",
+                    "etp5g",
+                    "etp5h"
+                ]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp6"
+                ],
+                "1x400G": [
+                    "etp6"
+                ],
+                "2x400G": [
+                    "etp6a",
+                    "etp6b"
+                ],
+                "4x200G": [
+                    "etp6a",
+                    "etp6b",
+                    "etp6c",
+                    "etp6d"
+                ],
+                "8x100G": [
+                    "etp6a",
+                    "etp6b",
+                    "etp6c",
+                    "etp6d",
+                    "etp6e",
+                    "etp6f",
+                    "etp6g",
+                    "etp6h"
+                ]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp7"
+                ],
+                "1x400G": [
+                    "etp7"
+                ],
+                "2x400G": [
+                    "etp7a",
+                    "etp7b"
+                ],
+                "4x200G": [
+                    "etp7a",
+                    "etp7b",
+                    "etp7c",
+                    "etp7d"
+                ],
+                "8x100G": [
+                    "etp7a",
+                    "etp7b",
+                    "etp7c",
+                    "etp7d",
+                    "etp7e",
+                    "etp7f",
+                    "etp7g",
+                    "etp7h"
+                ]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp8"
+                ],
+                "1x400G": [
+                    "etp8"
+                ],
+                "2x400G": [
+                    "etp8a",
+                    "etp8b"
+                ],
+                "4x200G": [
+                    "etp8a",
+                    "etp8b",
+                    "etp8c",
+                    "etp8d"
+                ],
+                "8x100G": [
+                    "etp8a",
+                    "etp8b",
+                    "etp8c",
+                    "etp8d",
+                    "etp8e",
+                    "etp8f",
+                    "etp8g",
+                    "etp8h"
+                ]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp9"
+                ],
+                "1x400G": [
+                    "etp9"
+                ],
+                "2x400G": [
+                    "etp9a",
+                    "etp9b"
+                ],
+                "4x200G": [
+                    "etp9a",
+                    "etp9b",
+                    "etp9c",
+                    "etp9d"
+                ],
+                "8x100G": [
+                    "etp9a",
+                    "etp9b",
+                    "etp9c",
+                    "etp9d",
+                    "etp9e",
+                    "etp9f",
+                    "etp9g",
+                    "etp9h"
+                ]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp10"
+                ],
+                "1x400G": [
+                    "etp10"
+                ],
+                "2x400G": [
+                    "etp10a",
+                    "etp10b"
+                ],
+                "4x200G": [
+                    "etp10a",
+                    "etp10b",
+                    "etp10c",
+                    "etp10d"
+                ],
+                "8x100G": [
+                    "etp10a",
+                    "etp10b",
+                    "etp10c",
+                    "etp10d",
+                    "etp10e",
+                    "etp10f",
+                    "etp10g",
+                    "etp10h"
+                ]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp11"
+                ],
+                "1x400G": [
+                    "etp11"
+                ],
+                "2x400G": [
+                    "etp11a",
+                    "etp11b"
+                ],
+                "4x200G": [
+                    "etp11a",
+                    "etp11b",
+                    "etp11c",
+                    "etp11d"
+                ],
+                "8x100G": [
+                    "etp11a",
+                    "etp11b",
+                    "etp11c",
+                    "etp11d",
+                    "etp11e",
+                    "etp11f",
+                    "etp11g",
+                    "etp11h"
+                ]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp12"
+                ],
+                "1x400G": [
+                    "etp12"
+                ],
+                "2x400G": [
+                    "etp12a",
+                    "etp12b"
+                ],
+                "4x200G": [
+                    "etp12a",
+                    "etp12b",
+                    "etp12c",
+                    "etp12d"
+                ],
+                "8x100G": [
+                    "etp12a",
+                    "etp12b",
+                    "etp12c",
+                    "etp12d",
+                    "etp12e",
+                    "etp12f",
+                    "etp12g",
+                    "etp12h"
+                ]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp13"
+                ],
+                "1x400G": [
+                    "etp13"
+                ],
+                "2x400G": [
+                    "etp13a",
+                    "etp13b"
+                ],
+                "4x200G": [
+                    "etp13a",
+                    "etp13b",
+                    "etp13c",
+                    "etp13d"
+                ],
+                "8x100G": [
+                    "etp13a",
+                    "etp13b",
+                    "etp13c",
+                    "etp13d",
+                    "etp13e",
+                    "etp13f",
+                    "etp13g",
+                    "etp13h"
+                ]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp14"
+                ],
+                "1x400G": [
+                    "etp14"
+                ],
+                "2x400G": [
+                    "etp14a",
+                    "etp14b"
+                ],
+                "4x200G": [
+                    "etp14a",
+                    "etp14b",
+                    "etp14c",
+                    "etp14d"
+                ],
+                "8x100G": [
+                    "etp14a",
+                    "etp14b",
+                    "etp14c",
+                    "etp14d",
+                    "etp14e",
+                    "etp14f",
+                    "etp14g",
+                    "etp14h"
+                ]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp15"
+                ],
+                "1x400G": [
+                    "etp15"
+                ],
+                "2x400G": [
+                    "etp15a",
+                    "etp15b"
+                ],
+                "4x200G": [
+                    "etp15a",
+                    "etp15b",
+                    "etp15c",
+                    "etp15d"
+                ],
+                "8x100G": [
+                    "etp15a",
+                    "etp15b",
+                    "etp15c",
+                    "etp15d",
+                    "etp15e",
+                    "etp15f",
+                    "etp15g",
+                    "etp15h"
+                ]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp16"
+                ],
+                "1x400G": [
+                    "etp16"
+                ],
+                "2x400G": [
+                    "etp16a",
+                    "etp16b"
+                ],
+                "4x200G": [
+                    "etp16a",
+                    "etp16b",
+                    "etp16c",
+                    "etp16d"
+                ],
+                "8x100G": [
+                    "etp16a",
+                    "etp16b",
+                    "etp16c",
+                    "etp16d",
+                    "etp16e",
+                    "etp16f",
+                    "etp16g",
+                    "etp16h"
+                ]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp17"
+                ],
+                "1x400G": [
+                    "etp17"
+                ],
+                "2x400G": [
+                    "etp17a",
+                    "etp17b"
+                ],
+                "4x200G": [
+                    "etp17a",
+                    "etp17b",
+                    "etp17c",
+                    "etp17d"
+                ],
+                "8x100G": [
+                    "etp17a",
+                    "etp17b",
+                    "etp17c",
+                    "etp17d",
+                    "etp17e",
+                    "etp17f",
+                    "etp17g",
+                    "etp17h"
+                ]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp18"
+                ],
+                "1x400G": [
+                    "etp18"
+                ],
+                "2x400G": [
+                    "etp18a",
+                    "etp18b"
+                ],
+                "4x200G": [
+                    "etp18a",
+                    "etp18b",
+                    "etp18c",
+                    "etp18d"
+                ],
+                "8x100G": [
+                    "etp18a",
+                    "etp18b",
+                    "etp18c",
+                    "etp18d",
+                    "etp18e",
+                    "etp18f",
+                    "etp18g",
+                    "etp18h"
+                ]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp19"
+                ],
+                "1x400G": [
+                    "etp19"
+                ],
+                "2x400G": [
+                    "etp19a",
+                    "etp19b"
+                ],
+                "4x200G": [
+                    "etp19a",
+                    "etp19b",
+                    "etp19c",
+                    "etp19d"
+                ],
+                "8x100G": [
+                    "etp19a",
+                    "etp19b",
+                    "etp19c",
+                    "etp19d",
+                    "etp19e",
+                    "etp19f",
+                    "etp19g",
+                    "etp19h"
+                ]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp20"
+                ],
+                "1x400G": [
+                    "etp20"
+                ],
+                "2x400G": [
+                    "etp20a",
+                    "etp20b"
+                ],
+                "4x200G": [
+                    "etp20a",
+                    "etp20b",
+                    "etp20c",
+                    "etp20d"
+                ],
+                "8x100G": [
+                    "etp20a",
+                    "etp20b",
+                    "etp20c",
+                    "etp20d",
+                    "etp20e",
+                    "etp20f",
+                    "etp20g",
+                    "etp20h"
+                ]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "185,186,187,188,189,190,191,192",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp21"
+                ],
+                "1x400G": [
+                    "etp21"
+                ],
+                "2x400G": [
+                    "etp21a",
+                    "etp21b"
+                ],
+                "4x200G": [
+                    "etp21a",
+                    "etp21b",
+                    "etp21c",
+                    "etp21d"
+                ],
+                "8x100G": [
+                    "etp21a",
+                    "etp21b",
+                    "etp21c",
+                    "etp21d",
+                    "etp21e",
+                    "etp21f",
+                    "etp21g",
+                    "etp21h"
+                ]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "169,170,171,172,173,174,175,176",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp22"
+                ],
+                "1x400G": [
+                    "etp22"
+                ],
+                "2x400G": [
+                    "etp22a",
+                    "etp22b"
+                ],
+                "4x200G": [
+                    "etp22a",
+                    "etp22b",
+                    "etp22c",
+                    "etp22d"
+                ],
+                "8x100G": [
+                    "etp22a",
+                    "etp22b",
+                    "etp22c",
+                    "etp22d",
+                    "etp22e",
+                    "etp22f",
+                    "etp22g",
+                    "etp22h"
+                ]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "161,162,163,164,165,166,167,168",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp23"
+                ],
+                "1x400G": [
+                    "etp23"
+                ],
+                "2x400G": [
+                    "etp23a",
+                    "etp23b"
+                ],
+                "4x200G": [
+                    "etp23a",
+                    "etp23b",
+                    "etp23c",
+                    "etp23d"
+                ],
+                "8x100G": [
+                    "etp23a",
+                    "etp23b",
+                    "etp23c",
+                    "etp23d",
+                    "etp23e",
+                    "etp23f",
+                    "etp23g",
+                    "etp23h"
+                ]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "177,178,179,180,181,182,183,184",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp24"
+                ],
+                "1x400G": [
+                    "etp24"
+                ],
+                "2x400G": [
+                    "etp24a",
+                    "etp24b"
+                ],
+                "4x200G": [
+                    "etp24a",
+                    "etp24b",
+                    "etp24c",
+                    "etp24d"
+                ],
+                "8x100G": [
+                    "etp24a",
+                    "etp24b",
+                    "etp24c",
+                    "etp24d",
+                    "etp24e",
+                    "etp24f",
+                    "etp24g",
+                    "etp24h"
+                ]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "217,218,219,220,221,222,223,224",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp25"
+                ],
+                "1x400G": [
+                    "etp25"
+                ],
+                "2x400G": [
+                    "etp25a",
+                    "etp25b"
+                ],
+                "4x200G": [
+                    "etp25a",
+                    "etp25b",
+                    "etp25c",
+                    "etp25d"
+                ],
+                "8x100G": [
+                    "etp25a",
+                    "etp25b",
+                    "etp25c",
+                    "etp25d",
+                    "etp25e",
+                    "etp25f",
+                    "etp25g",
+                    "etp25h"
+                ]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "201,202,203,204,205,206,207,208",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp26"
+                ],
+                "1x400G": [
+                    "etp26"
+                ],
+                "2x400G": [
+                    "etp26a",
+                    "etp26b"
+                ],
+                "4x200G": [
+                    "etp26a",
+                    "etp26b",
+                    "etp26c",
+                    "etp26d"
+                ],
+                "8x100G": [
+                    "etp26a",
+                    "etp26b",
+                    "etp26c",
+                    "etp26d",
+                    "etp26e",
+                    "etp26f",
+                    "etp26g",
+                    "etp26h"
+                ]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "193,194,195,196,197,198,199,200",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp27"
+                ],
+                "1x400G": [
+                    "etp27"
+                ],
+                "2x400G": [
+                    "etp27a",
+                    "etp27b"
+                ],
+                "4x200G": [
+                    "etp27a",
+                    "etp27b",
+                    "etp27c",
+                    "etp27d"
+                ],
+                "8x100G": [
+                    "etp27a",
+                    "etp27b",
+                    "etp27c",
+                    "etp27d",
+                    "etp27e",
+                    "etp27f",
+                    "etp27g",
+                    "etp27h"
+                ]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "209,210,211,212,213,214,215,216",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp28"
+                ],
+                "1x400G": [
+                    "etp28"
+                ],
+                "2x400G": [
+                    "etp28a",
+                    "etp28b"
+                ],
+                "4x200G": [
+                    "etp28a",
+                    "etp28b",
+                    "etp28c",
+                    "etp28d"
+                ],
+                "8x100G": [
+                    "etp28a",
+                    "etp28b",
+                    "etp28c",
+                    "etp28d",
+                    "etp28e",
+                    "etp28f",
+                    "etp28g",
+                    "etp28h"
+                ]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "249,250,251,252,253,254,255,256",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp29"
+                ],
+                "1x400G": [
+                    "etp29"
+                ],
+                "2x400G": [
+                    "etp29a",
+                    "etp29b"
+                ],
+                "4x200G": [
+                    "etp29a",
+                    "etp29b",
+                    "etp29c",
+                    "etp29d"
+                ],
+                "8x100G": [
+                    "etp29a",
+                    "etp29b",
+                    "etp29c",
+                    "etp29d",
+                    "etp29e",
+                    "etp29f",
+                    "etp29g",
+                    "etp29h"
+                ]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "233,234,235,236,237,238,239,240",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp30"
+                ],
+                "1x400G": [
+                    "etp30"
+                ],
+                "2x400G": [
+                    "etp30a",
+                    "etp30b"
+                ],
+                "4x200G": [
+                    "etp30a",
+                    "etp30b",
+                    "etp30c",
+                    "etp30d"
+                ],
+                "8x100G": [
+                    "etp30a",
+                    "etp30b",
+                    "etp30c",
+                    "etp30d",
+                    "etp30e",
+                    "etp30f",
+                    "etp30g",
+                    "etp30h"
+                ]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "225,226,227,228,229,230,231,232",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp31"
+                ],
+                "1x400G": [
+                    "etp31"
+                ],
+                "2x400G": [
+                    "etp31a",
+                    "etp31b"
+                ],
+                "4x200G": [
+                    "etp31a",
+                    "etp31b",
+                    "etp31c",
+                    "etp31d"
+                ],
+                "8x100G": [
+                    "etp31a",
+                    "etp31b",
+                    "etp31c",
+                    "etp31d",
+                    "etp31e",
+                    "etp31f",
+                    "etp31g",
+                    "etp31h"
+                ]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "241,242,243,244,245,246,247,248",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp32"
+                ],
+                "1x400G": [
+                    "etp32"
+                ],
+                "2x400G": [
+                    "etp32a",
+                    "etp32b"
+                ],
+                "4x200G": [
+                    "etp32a",
+                    "etp32b",
+                    "etp32c",
+                    "etp32d"
+                ],
+                "8x100G": [
+                    "etp32a",
+                    "etp32b",
+                    "etp32c",
+                    "etp32d",
+                    "etp32e",
+                    "etp32f",
+                    "etp32g",
+                    "etp32h"
+                ]
+            }
+        },
+        "Ethernet256": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "273,274,275,276,277,278,279,280",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp33"
+                ],
+                "1x400G": [
+                    "etp33"
+                ],
+                "2x400G": [
+                    "etp33a",
+                    "etp33b"
+                ],
+                "4x200G": [
+                    "etp33a",
+                    "etp33b",
+                    "etp33c",
+                    "etp33d"
+                ],
+                "8x100G": [
+                    "etp33a",
+                    "etp33b",
+                    "etp33c",
+                    "etp33d",
+                    "etp33e",
+                    "etp33f",
+                    "etp33g",
+                    "etp33h"
+                ]
+            }
+        },
+        "Ethernet264": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "257,258,259,260,261,262,263,264",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp34"
+                ],
+                "1x400G": [
+                    "etp34"
+                ],
+                "2x400G": [
+                    "etp34a",
+                    "etp34b"
+                ],
+                "4x200G": [
+                    "etp34a",
+                    "etp34b",
+                    "etp34c",
+                    "etp34d"
+                ],
+                "8x100G": [
+                    "etp34a",
+                    "etp34b",
+                    "etp34c",
+                    "etp34d",
+                    "etp34e",
+                    "etp34f",
+                    "etp34g",
+                    "etp34h"
+                ]
+            }
+        },
+        "Ethernet272": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "265,266,267,268,269,270,271,272",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp35"
+                ],
+                "1x400G": [
+                    "etp35"
+                ],
+                "2x400G": [
+                    "etp35a",
+                    "etp35b"
+                ],
+                "4x200G": [
+                    "etp35a",
+                    "etp35b",
+                    "etp35c",
+                    "etp35d"
+                ],
+                "8x100G": [
+                    "etp35a",
+                    "etp35b",
+                    "etp35c",
+                    "etp35d",
+                    "etp35e",
+                    "etp35f",
+                    "etp35g",
+                    "etp35h"
+                ]
+            }
+        },
+        "Ethernet280": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "281,282,283,284,285,286,287,288",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp36"
+                ],
+                "1x400G": [
+                    "etp36"
+                ],
+                "2x400G": [
+                    "etp36a",
+                    "etp36b"
+                ],
+                "4x200G": [
+                    "etp36a",
+                    "etp36b",
+                    "etp36c",
+                    "etp36d"
+                ],
+                "8x100G": [
+                    "etp36a",
+                    "etp36b",
+                    "etp36c",
+                    "etp36d",
+                    "etp36e",
+                    "etp36f",
+                    "etp36g",
+                    "etp36h"
+                ]
+            }
+        },
+        "Ethernet288": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "313,314,315,316,317,318,319,320",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp37"
+                ],
+                "1x400G": [
+                    "etp37"
+                ],
+                "2x400G": [
+                    "etp37a",
+                    "etp37b"
+                ],
+                "4x200G": [
+                    "etp37a",
+                    "etp37b",
+                    "etp37c",
+                    "etp37d"
+                ],
+                "8x100G": [
+                    "etp37a",
+                    "etp37b",
+                    "etp37c",
+                    "etp37d",
+                    "etp37e",
+                    "etp37f",
+                    "etp37g",
+                    "etp37h"
+                ]
+            }
+        },
+        "Ethernet296": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "297,298,299,300,301,302,303,304",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp38"
+                ],
+                "1x400G": [
+                    "etp38"
+                ],
+                "2x400G": [
+                    "etp38a",
+                    "etp38b"
+                ],
+                "4x200G": [
+                    "etp38a",
+                    "etp38b",
+                    "etp38c",
+                    "etp38d"
+                ],
+                "8x100G": [
+                    "etp38a",
+                    "etp38b",
+                    "etp38c",
+                    "etp38d",
+                    "etp38e",
+                    "etp38f",
+                    "etp38g",
+                    "etp38h"
+                ]
+            }
+        },
+        "Ethernet304": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "289,290,291,292,293,294,295,296",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp39"
+                ],
+                "1x400G": [
+                    "etp39"
+                ],
+                "2x400G": [
+                    "etp39a",
+                    "etp39b"
+                ],
+                "4x200G": [
+                    "etp39a",
+                    "etp39b",
+                    "etp39c",
+                    "etp39d"
+                ],
+                "8x100G": [
+                    "etp39a",
+                    "etp39b",
+                    "etp39c",
+                    "etp39d",
+                    "etp39e",
+                    "etp39f",
+                    "etp39g",
+                    "etp39h"
+                ]
+            }
+        },
+        "Ethernet312": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "305,306,307,308,309,310,311,312",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp40"
+                ],
+                "1x400G": [
+                    "etp40"
+                ],
+                "2x400G": [
+                    "etp40a",
+                    "etp40b"
+                ],
+                "4x200G": [
+                    "etp40a",
+                    "etp40b",
+                    "etp40c",
+                    "etp40d"
+                ],
+                "8x100G": [
+                    "etp40a",
+                    "etp40b",
+                    "etp40c",
+                    "etp40d",
+                    "etp40e",
+                    "etp40f",
+                    "etp40g",
+                    "etp40h"
+                ]
+            }
+        },
+        "Ethernet320": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "345,346,347,348,349,350,351,352",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp41"
+                ],
+                "1x400G": [
+                    "etp41"
+                ],
+                "2x400G": [
+                    "etp41a",
+                    "etp41b"
+                ],
+                "4x200G": [
+                    "etp41a",
+                    "etp41b",
+                    "etp41c",
+                    "etp41d"
+                ],
+                "8x100G": [
+                    "etp41a",
+                    "etp41b",
+                    "etp41c",
+                    "etp41d",
+                    "etp41e",
+                    "etp41f",
+                    "etp41g",
+                    "etp41h"
+                ]
+            }
+        },
+        "Ethernet328": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "329,330,331,332,333,334,335,336",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp42"
+                ],
+                "1x400G": [
+                    "etp42"
+                ],
+                "2x400G": [
+                    "etp42a",
+                    "etp42b"
+                ],
+                "4x200G": [
+                    "etp42a",
+                    "etp42b",
+                    "etp42c",
+                    "etp42d"
+                ],
+                "8x100G": [
+                    "etp42a",
+                    "etp42b",
+                    "etp42c",
+                    "etp42d",
+                    "etp42e",
+                    "etp42f",
+                    "etp42g",
+                    "etp42h"
+                ]
+            }
+        },
+        "Ethernet336": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "321,322,323,324,325,326,327,328",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp43"
+                ],
+                "1x400G": [
+                    "etp43"
+                ],
+                "2x400G": [
+                    "etp43a",
+                    "etp43b"
+                ],
+                "4x200G": [
+                    "etp43a",
+                    "etp43b",
+                    "etp43c",
+                    "etp43d"
+                ],
+                "8x100G": [
+                    "etp43a",
+                    "etp43b",
+                    "etp43c",
+                    "etp43d",
+                    "etp43e",
+                    "etp43f",
+                    "etp43g",
+                    "etp43h"
+                ]
+            }
+        },
+        "Ethernet344": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "337,338,339,340,341,342,343,344",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp44"
+                ],
+                "1x400G": [
+                    "etp44"
+                ],
+                "2x400G": [
+                    "etp44a",
+                    "etp44b"
+                ],
+                "4x200G": [
+                    "etp44a",
+                    "etp44b",
+                    "etp44c",
+                    "etp44d"
+                ],
+                "8x100G": [
+                    "etp44a",
+                    "etp44b",
+                    "etp44c",
+                    "etp44d",
+                    "etp44e",
+                    "etp44f",
+                    "etp44g",
+                    "etp44h"
+                ]
+            }
+        },
+        "Ethernet352": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "377,378,379,380,381,382,383,384",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp45"
+                ],
+                "1x400G": [
+                    "etp45"
+                ],
+                "2x400G": [
+                    "etp45a",
+                    "etp45b"
+                ],
+                "4x200G": [
+                    "etp45a",
+                    "etp45b",
+                    "etp45c",
+                    "etp45d"
+                ],
+                "8x100G": [
+                    "etp45a",
+                    "etp45b",
+                    "etp45c",
+                    "etp45d",
+                    "etp45e",
+                    "etp45f",
+                    "etp45g",
+                    "etp45h"
+                ]
+            }
+        },
+        "Ethernet360": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "361,362,363,364,365,366,367,368",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp46"
+                ],
+                "1x400G": [
+                    "etp46"
+                ],
+                "2x400G": [
+                    "etp46a",
+                    "etp46b"
+                ],
+                "4x200G": [
+                    "etp46a",
+                    "etp46b",
+                    "etp46c",
+                    "etp46d"
+                ],
+                "8x100G": [
+                    "etp46a",
+                    "etp46b",
+                    "etp46c",
+                    "etp46d",
+                    "etp46e",
+                    "etp46f",
+                    "etp46g",
+                    "etp46h"
+                ]
+            }
+        },
+        "Ethernet368": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "353,354,355,356,357,358,359,360",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp47"
+                ],
+                "1x400G": [
+                    "etp47"
+                ],
+                "2x400G": [
+                    "etp47a",
+                    "etp47b"
+                ],
+                "4x200G": [
+                    "etp47a",
+                    "etp47b",
+                    "etp47c",
+                    "etp47d"
+                ],
+                "8x100G": [
+                    "etp47a",
+                    "etp47b",
+                    "etp47c",
+                    "etp47d",
+                    "etp47e",
+                    "etp47f",
+                    "etp47g",
+                    "etp47h"
+                ]
+            }
+        },
+        "Ethernet376": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "369,370,371,372,373,374,375,376",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp48"
+                ],
+                "1x400G": [
+                    "etp48"
+                ],
+                "2x400G": [
+                    "etp48a",
+                    "etp48b"
+                ],
+                "4x200G": [
+                    "etp48a",
+                    "etp48b",
+                    "etp48c",
+                    "etp48d"
+                ],
+                "8x100G": [
+                    "etp48a",
+                    "etp48b",
+                    "etp48c",
+                    "etp48d",
+                    "etp48e",
+                    "etp48f",
+                    "etp48g",
+                    "etp48h"
+                ]
+            }
+        },
+        "Ethernet384": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "409,410,411,412,413,414,415,416",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp49"
+                ],
+                "1x400G": [
+                    "etp49"
+                ],
+                "2x400G": [
+                    "etp49a",
+                    "etp49b"
+                ],
+                "4x200G": [
+                    "etp49a",
+                    "etp49b",
+                    "etp49c",
+                    "etp49d"
+                ],
+                "8x100G": [
+                    "etp49a",
+                    "etp49b",
+                    "etp49c",
+                    "etp49d",
+                    "etp49e",
+                    "etp49f",
+                    "etp49g",
+                    "etp49h"
+                ]
+            }
+        },
+        "Ethernet392": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "393,394,395,396,397,398,399,400",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp50"
+                ],
+                "1x400G": [
+                    "etp50"
+                ],
+                "2x400G": [
+                    "etp50a",
+                    "etp50b"
+                ],
+                "4x200G": [
+                    "etp50a",
+                    "etp50b",
+                    "etp50c",
+                    "etp50d"
+                ],
+                "8x100G": [
+                    "etp50a",
+                    "etp50b",
+                    "etp50c",
+                    "etp50d",
+                    "etp50e",
+                    "etp50f",
+                    "etp50g",
+                    "etp50h"
+                ]
+            }
+        },
+        "Ethernet400": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "385,386,387,388,389,390,391,392",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp51"
+                ],
+                "1x400G": [
+                    "etp51"
+                ],
+                "2x400G": [
+                    "etp51a",
+                    "etp51b"
+                ],
+                "4x200G": [
+                    "etp51a",
+                    "etp51b",
+                    "etp51c",
+                    "etp51d"
+                ],
+                "8x100G": [
+                    "etp51a",
+                    "etp51b",
+                    "etp51c",
+                    "etp51d",
+                    "etp51e",
+                    "etp51f",
+                    "etp51g",
+                    "etp51h"
+                ]
+            }
+        },
+        "Ethernet408": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "401,402,403,404,405,406,407,408",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp52"
+                ],
+                "1x400G": [
+                    "etp52"
+                ],
+                "2x400G": [
+                    "etp52a",
+                    "etp52b"
+                ],
+                "4x200G": [
+                    "etp52a",
+                    "etp52b",
+                    "etp52c",
+                    "etp52d"
+                ],
+                "8x100G": [
+                    "etp52a",
+                    "etp52b",
+                    "etp52c",
+                    "etp52d",
+                    "etp52e",
+                    "etp52f",
+                    "etp52g",
+                    "etp52h"
+                ]
+            }
+        },
+        "Ethernet416": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "441,442,443,444,445,446,447,448",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp53"
+                ],
+                "1x400G": [
+                    "etp53"
+                ],
+                "2x400G": [
+                    "etp53a",
+                    "etp53b"
+                ],
+                "4x200G": [
+                    "etp53a",
+                    "etp53b",
+                    "etp53c",
+                    "etp53d"
+                ],
+                "8x100G": [
+                    "etp53a",
+                    "etp53b",
+                    "etp53c",
+                    "etp53d",
+                    "etp53e",
+                    "etp53f",
+                    "etp53g",
+                    "etp53h"
+                ]
+            }
+        },
+        "Ethernet424": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "425,426,427,428,429,430,431,432",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp54"
+                ],
+                "1x400G": [
+                    "etp54"
+                ],
+                "2x400G": [
+                    "etp54a",
+                    "etp54b"
+                ],
+                "4x200G": [
+                    "etp54a",
+                    "etp54b",
+                    "etp54c",
+                    "etp54d"
+                ],
+                "8x100G": [
+                    "etp54a",
+                    "etp54b",
+                    "etp54c",
+                    "etp54d",
+                    "etp54e",
+                    "etp54f",
+                    "etp54g",
+                    "etp54h"
+                ]
+            }
+        },
+        "Ethernet432": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "417,418,419,420,421,422,423,424",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp55"
+                ],
+                "1x400G": [
+                    "etp55"
+                ],
+                "2x400G": [
+                    "etp55a",
+                    "etp55b"
+                ],
+                "4x200G": [
+                    "etp55a",
+                    "etp55b",
+                    "etp55c",
+                    "etp55d"
+                ],
+                "8x100G": [
+                    "etp55a",
+                    "etp55b",
+                    "etp55c",
+                    "etp55d",
+                    "etp55e",
+                    "etp55f",
+                    "etp55g",
+                    "etp55h"
+                ]
+            }
+        },
+        "Ethernet440": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "433,434,435,436,437,438,439,440",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp56"
+                ],
+                "1x400G": [
+                    "etp56"
+                ],
+                "2x400G": [
+                    "etp56a",
+                    "etp56b"
+                ],
+                "4x200G": [
+                    "etp56a",
+                    "etp56b",
+                    "etp56c",
+                    "etp56d"
+                ],
+                "8x100G": [
+                    "etp56a",
+                    "etp56b",
+                    "etp56c",
+                    "etp56d",
+                    "etp56e",
+                    "etp56f",
+                    "etp56g",
+                    "etp56h"
+                ]
+            }
+        },
+        "Ethernet448": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "473,474,475,476,477,478,479,480",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp57"
+                ],
+                "1x400G": [
+                    "etp57"
+                ],
+                "2x400G": [
+                    "etp57a",
+                    "etp57b"
+                ],
+                "4x200G": [
+                    "etp57a",
+                    "etp57b",
+                    "etp57c",
+                    "etp57d"
+                ],
+                "8x100G": [
+                    "etp57a",
+                    "etp57b",
+                    "etp57c",
+                    "etp57d",
+                    "etp57e",
+                    "etp57f",
+                    "etp57g",
+                    "etp57h"
+                ]
+            }
+        },
+        "Ethernet456": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "457,458,459,460,461,462,463,464",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp58"
+                ],
+                "1x400G": [
+                    "etp58"
+                ],
+                "2x400G": [
+                    "etp58a",
+                    "etp58b"
+                ],
+                "4x200G": [
+                    "etp58a",
+                    "etp58b",
+                    "etp58c",
+                    "etp58d"
+                ],
+                "8x100G": [
+                    "etp58a",
+                    "etp58b",
+                    "etp58c",
+                    "etp58d",
+                    "etp58e",
+                    "etp58f",
+                    "etp58g",
+                    "etp58h"
+                ]
+            }
+        },
+        "Ethernet464": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "449,450,451,452,453,454,455,456",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp59"
+                ],
+                "1x400G": [
+                    "etp59"
+                ],
+                "2x400G": [
+                    "etp59a",
+                    "etp59b"
+                ],
+                "4x200G": [
+                    "etp59a",
+                    "etp59b",
+                    "etp59c",
+                    "etp59d"
+                ],
+                "8x100G": [
+                    "etp59a",
+                    "etp59b",
+                    "etp59c",
+                    "etp59d",
+                    "etp59e",
+                    "etp59f",
+                    "etp59g",
+                    "etp59h"
+                ]
+            }
+        },
+        "Ethernet472": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "465,466,467,468,469,470,471,472",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp60"
+                ],
+                "1x400G": [
+                    "etp60"
+                ],
+                "2x400G": [
+                    "etp60a",
+                    "etp60b"
+                ],
+                "4x200G": [
+                    "etp60a",
+                    "etp60b",
+                    "etp60c",
+                    "etp60d"
+                ],
+                "8x100G": [
+                    "etp60a",
+                    "etp60b",
+                    "etp60c",
+                    "etp60d",
+                    "etp60e",
+                    "etp60f",
+                    "etp60g",
+                    "etp60h"
+                ]
+            }
+        },
+        "Ethernet480": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "505,506,507,508,509,510,511,512",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp61"
+                ],
+                "1x400G": [
+                    "etp61"
+                ],
+                "2x400G": [
+                    "etp61a",
+                    "etp61b"
+                ],
+                "4x200G": [
+                    "etp61a",
+                    "etp61b",
+                    "etp61c",
+                    "etp61d"
+                ],
+                "8x100G": [
+                    "etp61a",
+                    "etp61b",
+                    "etp61c",
+                    "etp61d",
+                    "etp61e",
+                    "etp61f",
+                    "etp61g",
+                    "etp61h"
+                ]
+            }
+        },
+        "Ethernet488": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "489,490,491,492,493,494,495,496",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp62"
+                ],
+                "1x400G": [
+                    "etp62"
+                ],
+                "2x400G": [
+                    "etp62a",
+                    "etp62b"
+                ],
+                "4x200G": [
+                    "etp62a",
+                    "etp62b",
+                    "etp62c",
+                    "etp62d"
+                ],
+                "8x100G": [
+                    "etp62a",
+                    "etp62b",
+                    "etp62c",
+                    "etp62d",
+                    "etp62e",
+                    "etp62f",
+                    "etp62g",
+                    "etp62h"
+                ]
+            }
+        },
+        "Ethernet496": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "481,482,483,484,485,486,487,488",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp63"
+                ],
+                "1x400G": [
+                    "etp63"
+                ],
+                "2x400G": [
+                    "etp63a",
+                    "etp63b"
+                ],
+                "4x200G": [
+                    "etp63a",
+                    "etp63b",
+                    "etp63c",
+                    "etp63d"
+                ],
+                "8x100G": [
+                    "etp63a",
+                    "etp63b",
+                    "etp63c",
+                    "etp63d",
+                    "etp63e",
+                    "etp63f",
+                    "etp63g",
+                    "etp63h"
+                ]
+            }
+        },
+        "Ethernet504": {
+            "index": "64,64,64,64,64,64,64,64",
+            "lanes": "497,498,499,500,501,502,503,504",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "etp64"
+                ],
+                "1x400G": [
+                    "etp64"
+                ],
+                "2x400G": [
+                    "etp64a",
+                    "etp64b"
+                ],
+                "4x200G": [
+                    "etp64a",
+                    "etp64b",
+                    "etp64c",
+                    "etp64d"
+                ],
+                "8x100G": [
+                    "etp64a",
+                    "etp64b",
+                    "etp64c",
+                    "etp64d",
+                    "etp64e",
+                    "etp64f",
+                    "etp64g",
+                    "etp64h"
+                ]
+            }
+        },
+        "Ethernet512": {
+            "index": "65",
+            "lanes": "513",
+            "breakout_modes": {
+                "1x10G": [
+                    "etp65"
+                ]
+            }
+        },
+        "Ethernet513": {
+            "index": "66",
+            "lanes": "515",
+            "breakout_modes": {
+                "1x10G": [
+                    "etp66"
+                ]
+            }
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/platform_asic b/device/arista/x86_64-arista_7060x6_64pe_b/platform_asic
new file mode 100644
index 00000000000..96046765276
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/platform_components.json b/device/arista/x86_64-arista_7060x6_64pe_b/platform_components.json
new file mode 100644
index 00000000000..c8c25826580
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/platform_components.json
@@ -0,0 +1,12 @@
+{
+   "chassis": {
+      "DCS-7060X6-64PE-B": {
+         "component": {
+            "Aboot()": {},
+            "Scd(addr=0000:03:00.0)": {},
+            "RedstartSysCpld(addr=13-0023)": {},
+            "Scd(addr=0000:05:00.0)": {}
+         }
+      }
+   }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/platform_env.conf b/device/arista/x86_64-arista_7060x6_64pe_b/platform_env.conf
new file mode 100644
index 00000000000..dd7cf4fe01c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/platform_env.conf
@@ -0,0 +1,2 @@
+SYNCD_SHM_SIZE=512m
+is_ltsw_chip=1
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/platform_reboot b/device/arista/x86_64-arista_7060x6_64pe_b/platform_reboot
new file mode 120000
index 00000000000..7f94a49e38b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/platform_reboot
@@ -0,0 +1 @@
+../x86_64-arista_common/platform_reboot
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/plugins b/device/arista/x86_64-arista_7060x6_64pe_b/plugins
new file mode 120000
index 00000000000..789a45fcace
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/plugins
@@ -0,0 +1 @@
+../x86_64-arista_common/plugins
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/pmon_daemon_control.json b/device/arista/x86_64-arista_7060x6_64pe_b/pmon_daemon_control.json
new file mode 120000
index 00000000000..51d5ab7b005
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/pmon_daemon_control.json
@@ -0,0 +1 @@
+../x86_64-arista_common/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/sensors.conf b/device/arista/x86_64-arista_7060x6_64pe_b/sensors.conf
new file mode 100644
index 00000000000..7b603a04355
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/sensors.conf
@@ -0,0 +1,26 @@
+bus "i2c-27" "SCD 0000:08:00.0 SMBus master 1 bus 0"
+bus "i2c-30" "SCD 0000:08:00.0 SMBus master 1 bus 3"
+bus "i2c-31" "SCD 0000:08:00.0 SMBus master 1 bus 4"
+
+chip "max6581-i2c-27-4d"
+    ignore temp5
+    ignore temp6
+    ignore temp7
+    ignore temp8
+
+chip "nvme-pci-0400"
+    # TODO: sensors complaining about tempX_min and tempX_max
+    ignore temp2
+    ignore temp3
+    ignore temp4
+    ignore temp5
+    ignore temp6
+    ignore temp7
+
+chip "pmbus-i2c-30-58"
+    ignore fan3
+    ignore fan4
+
+chip "pmbus-i2c-31-58"
+    ignore fan3
+    ignore fan4
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/system_health_monitoring_config.json b/device/arista/x86_64-arista_7060x6_64pe_b/system_health_monitoring_config.json
new file mode 120000
index 00000000000..1185f771fa8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-arista_common/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/thermal_policy.json b/device/arista/x86_64-arista_7060x6_64pe_b/thermal_policy.json
new file mode 120000
index 00000000000..0991dc7f363
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe_b/thermal_policy.json
@@ -0,0 +1 @@
+../x86_64-arista_common/thermal_policy.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2
index 0433fd6c1cf..02a343ee190 100644
--- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2
@@ -1049,5 +1049,6 @@ serdes_preemphasis_117=0x105004
 
 {{ mmu_sock }}
 {{ IPinIP_sock }}
+
+sai_interface_type_auto_detect=0
 phy_an_lt_msft=1
-phy_unlos_msft=1
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/media_settings.json b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/media_settings.json
new file mode 100644
index 00000000000..dca3dee1e4f
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/media_settings.json
@@ -0,0 +1,19 @@
+{
+    "GLOBAL_MEDIA_SETTINGS": {
+        "1-12": {
+            ".*": {
+                   "interface_type": "sr4",
+                   "unreliable_los": "on"
+
+            }
+
+        },
+        "21-64": {
+            ".*": {
+                   "interface_type": "sr4",
+                   "unreliable_los": "on"
+
+            }
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/0/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/0/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/0/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/1/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/1/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/1/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/10/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/10/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/10/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/11/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/11/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/11/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/2/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/2/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/2/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/3/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/3/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/3/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/4/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/4/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/4/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/5/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/5/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/5/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/6/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/6/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/6/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/7/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/7/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/7/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/8/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/8/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/8/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/9/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/9/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/9/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/0/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/0/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/0/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/1/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/1/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/1/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/10/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/10/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/10/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/11/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/11/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/11/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/12/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/12/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/12/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/13/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/13/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/13/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/14/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/14/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/14/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/15/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/15/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/15/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/16/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/16/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/16/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/17/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/17/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/17/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/2/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/2/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/2/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/3/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/3/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/3/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/4/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/4/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/4/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/5/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/5/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/5/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/6/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/6/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/6/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/7/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/7/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/7/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/8/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/8/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/8/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/9/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/9/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/9/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/0/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/0/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/0/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/1/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/1/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/1/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/10/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/10/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/10/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/11/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/11/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/11/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/2/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/2/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/2/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/3/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/3/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/3/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/4/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/4/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/4/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/5/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/5/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/5/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/6/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/6/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/6/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/7/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/7/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/7/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/8/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/8/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/8/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/9/port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/9/port_config.ini
deleted file mode 100644
index 65b9f8a7bf5..00000000000
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/9/port_config.ini
+++ /dev/null
@@ -1 +0,0 @@
-# name         lanes                     alias        index  speed
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm
index e60e3266368..fd144c75440 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm
@@ -865,3 +865,4 @@ sai_default_cpu_tx_tc=7
 sai_disable_srcmacqedstmac_ctrl=1
 appl_param_active_links_thr_high=58
 appl_param_active_links_thr_low=1
+custom_feature_start_tx_threshold=20
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/platform_update_reboot_cause b/device/arista/x86_64-arista_7800r3_48cq2_lc/platform_update_reboot_cause
new file mode 120000
index 00000000000..31acab4f44b
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/platform_update_reboot_cause
@@ -0,0 +1 @@
+./../x86_64-arista_common/platform_update_reboot_cause
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/platform_update_reboot_cause b/device/arista/x86_64-arista_7800r3_48cqm2_lc/platform_update_reboot_cause
new file mode 120000
index 00000000000..31acab4f44b
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/platform_update_reboot_cause
@@ -0,0 +1 @@
+./../x86_64-arista_common/platform_update_reboot_cause
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm
index 99080657bb0..0edb735f6ee 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -1019,3 +1019,4 @@ sai_default_cpu_tx_tc=7
 sai_disable_srcmacqedstmac_ctrl=1
 appl_param_active_links_thr_high=91
 appl_param_active_links_thr_low=1
+custom_feature_start_tx_threshold=20
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm
index 55201ef18a2..eb9d27f3ade 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -1019,3 +1019,4 @@ sai_default_cpu_tx_tc=7
 sai_disable_srcmacqedstmac_ctrl=1
 appl_param_active_links_thr_high=91
 appl_param_active_links_thr_low=1
+custom_feature_start_tx_threshold=20
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
index 34e3f5e6ead..5d526c05c6b 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
@@ -4,7 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 100,
+      "monCapacityThreshWarn": 62,
       "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm
index b73f6c60708..24aaf4a1127 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -1036,3 +1036,4 @@ sai_default_cpu_tx_tc=7
 sai_disable_srcmacqedstmac_ctrl=1
 appl_param_active_links_thr_high=91
 appl_param_active_links_thr_low=1
+custom_feature_start_tx_threshold=20
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm
index e077d6efa4f..aec0840c774 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -1036,3 +1036,4 @@ sai_default_cpu_tx_tc=7
 sai_disable_srcmacqedstmac_ctrl=1
 appl_param_active_links_thr_high=91
 appl_param_active_links_thr_low=1
+custom_feature_start_tx_threshold=20
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
index d67ec1518a2..5d526c05c6b 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
@@ -4,7 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 86,
+      "monCapacityThreshWarn": 62,
       "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm
index 2a285430696..41af46ac406 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -1056,3 +1056,4 @@ sai_default_cpu_tx_tc=7
 sai_disable_srcmacqedstmac_ctrl=1
 appl_param_active_links_thr_high=91
 appl_param_active_links_thr_low=1
+custom_feature_start_tx_threshold=20
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm
index 041699cd77f..c9cd0a31689 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -1056,3 +1056,4 @@ sai_default_cpu_tx_tc=7
 sai_disable_srcmacqedstmac_ctrl=1
 appl_param_active_links_thr_high=91
 appl_param_active_links_thr_low=1
+custom_feature_start_tx_threshold=20
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
index 34e3f5e6ead..5d526c05c6b 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
@@ -4,7 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 100,
+      "monCapacityThreshWarn": 62,
       "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/platform_update_reboot_cause b/device/arista/x86_64-arista_7800r3a_36d2_lc/platform_update_reboot_cause
new file mode 120000
index 00000000000..31acab4f44b
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/platform_update_reboot_cause
@@ -0,0 +1 @@
+./../x86_64-arista_common/platform_update_reboot_cause
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7800r3a_36d_lc/platform_update_reboot_cause b/device/arista/x86_64-arista_7800r3a_36d_lc/platform_update_reboot_cause
new file mode 120000
index 00000000000..31acab4f44b
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36d_lc/platform_update_reboot_cause
@@ -0,0 +1 @@
+./../x86_64-arista_common/platform_update_reboot_cause
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_update_reboot_cause b/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_update_reboot_cause
new file mode 120000
index 00000000000..31acab4f44b
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36dm2_lc/platform_update_reboot_cause
@@ -0,0 +1 @@
+./../x86_64-arista_common/platform_update_reboot_cause
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7800r3a_36p_lc/platform_update_reboot_cause b/device/arista/x86_64-arista_7800r3a_36p_lc/platform_update_reboot_cause
new file mode 120000
index 00000000000..31acab4f44b
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36p_lc/platform_update_reboot_cause
@@ -0,0 +1 @@
+./../x86_64-arista_common/platform_update_reboot_cause
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_update_reboot_cause b/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_update_reboot_cause
new file mode 120000
index 00000000000..31acab4f44b
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3ak_36d2_lc/platform_update_reboot_cause
@@ -0,0 +1 @@
+./../x86_64-arista_common/platform_update_reboot_cause
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_update_reboot_cause b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_update_reboot_cause
new file mode 120000
index 00000000000..31acab4f44b
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3ak_36dm2_lc/platform_update_reboot_cause
@@ -0,0 +1 @@
+./../x86_64-arista_common/platform_update_reboot_cause
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_common/platform_update_reboot_cause b/device/arista/x86_64-arista_common/platform_update_reboot_cause
new file mode 100755
index 00000000000..fe76e34ef93
--- /dev/null
+++ b/device/arista/x86_64-arista_common/platform_update_reboot_cause
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+
+import os
+from datetime import datetime, timezone
+
+REBOOT_CAUSE_DIR = "/host/reboot-cause/"
+REBOOT_LC_BY_SUPERVISOR_FILE = os.path.join(REBOOT_CAUSE_DIR, "reboot-lc-by-supervisor.txt")
+
+def main():
+    reboot_time = datetime.now(timezone.utc).strftime("%a %b %d %I:%M:%S %p %Z %Y")
+
+    if os.path.exists(REBOOT_LC_BY_SUPERVISOR_FILE):
+        os.remove(REBOOT_LC_BY_SUPERVISOR_FILE)
+        with open(os.path.join(REBOOT_CAUSE_DIR, "reboot-cause.txt"), 'w') as reboot_cause_file:
+            reboot_msg = "User issued 'Reboot from Supervisor' command [User: Supervisor, Time: {}]".format(reboot_time)
+            reboot_cause_file.write(reboot_msg)
+
+if __name__ == "__main__":
+    main()
diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_ft2.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_ft2.j2
new file mode 100644
index 00000000000..daaba053938
--- /dev/null
+++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_ft2.j2
@@ -0,0 +1,19 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{# Skip BUFFER_POOL, BUFFER_PROFILE #}
+{%- macro generate_buffer_pool_and_profiles() %}
+{%- endmacro %}
+
+{# Skip BUFFER_QUEUE #}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    }
+{%- endmacro %}
+
+{# Skip BUFFER_PG #}
+{%- macro generate_pg_profils(ports) %}
+    "BUFFER_PG": {
+    },
+{%- endmacro %}
diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_lt2.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_lt2.j2
new file mode 100644
index 00000000000..daaba053938
--- /dev/null
+++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_lt2.j2
@@ -0,0 +1,19 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{# Skip BUFFER_POOL, BUFFER_PROFILE #}
+{%- macro generate_buffer_pool_and_profiles() %}
+{%- endmacro %}
+
+{# Skip BUFFER_QUEUE #}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    }
+{%- endmacro %}
+
+{# Skip BUFFER_PG #}
+{%- macro generate_pg_profils(ports) %}
+    "BUFFER_PG": {
+    },
+{%- endmacro %}
diff --git a/device/marvell/arm64-marvell_db98cx8580_32cd-r0/platform_asic b/device/marvell/arm64-marvell_db98cx8580_32cd-r0/platform_asic
index a554752878b..5cbe9d002a5 100644
--- a/device/marvell/arm64-marvell_db98cx8580_32cd-r0/platform_asic
+++ b/device/marvell/arm64-marvell_db98cx8580_32cd-r0/platform_asic
@@ -1 +1 @@
-marvell
+marvell-prestera
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/platform_asic b/device/marvell/arm64-marvell_rd98DX35xx-r0/platform_asic
index a554752878b..5cbe9d002a5 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/platform_asic
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/platform_asic
@@ -1 +1 @@
-marvell
+marvell-prestera
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/platform_asic b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/platform_asic
index a554752878b..5cbe9d002a5 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/platform_asic
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/platform_asic
@@ -1 +1 @@
-marvell
+marvell-prestera
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/platform_asic b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/platform_asic
index a554752878b..5cbe9d002a5 100644
--- a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/platform_asic
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/platform_asic
@@ -1 +1 @@
-marvell
+marvell-prestera
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic
index a554752878b..5cbe9d002a5 100644
--- a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic
@@ -1 +1 @@
-marvell
+marvell-prestera
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/platform_asic b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/platform_asic
index a554752878b..5cbe9d002a5 100644
--- a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/platform_asic
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/platform_asic
@@ -1 +1 @@
-marvell
+marvell-prestera
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/platform_asic b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/platform_asic
index a554752878b..5cbe9d002a5 100644
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/platform_asic
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/platform_asic
@@ -1 +1 @@
-marvell
+marvell-prestera
diff --git a/device/marvell/x86_64-marvell_rd98DX35xx-r0/platform_asic b/device/marvell/x86_64-marvell_rd98DX35xx-r0/platform_asic
index a554752878b..5cbe9d002a5 100644
--- a/device/marvell/x86_64-marvell_rd98DX35xx-r0/platform_asic
+++ b/device/marvell/x86_64-marvell_rd98DX35xx-r0/platform_asic
@@ -1 +1 @@
-marvell
+marvell-prestera
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
index abd2e8a183f..f20107ff549 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
@@ -246,6 +246,18 @@
                 }
             }
         },
+        "SN4280": {
+            "default": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2", "R"],
+                    "dps460-i2c-*-59": ["1", "L"]
+                }
+            }
+        },
         "SN5400": {
             "default": {
                 "bus": [
@@ -267,7 +279,34 @@
                     "dps460-i2c-*-5a": ["2", "R"]
                 }
             }
+        },
+        "SN5610N": {
+            "default": {
+                "bus": [
+
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2", "R"],
+                    "dps460-i2c-*-59": ["1", "L"],
+                    "dps460-i2c-*-5a": ["4", "R"],
+                    "dps460-i2c-*-5b": ["3", "R"]
+                }
+            }
+        },
+        "SN5640": {
+            "default": {
+                "bus": [
+
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2", "L"],
+                    "dps460-i2c-*-59": ["1", "L"],
+                    "dps460-i2c-*-5a": ["4", "R"],
+                    "dps460-i2c-*-5b": ["3", "R"]
+                }
+            }
         }
+        
     },
 
     "psu": {
@@ -335,7 +374,7 @@
         "MTEF-AC-E": {
             "label": [
                 "in1 PSU 220V Rail (in)",
-                "in3 PSU 12V Rail (out)",
+                "in2 PSU 12V Rail (out)",
                 "fan1 PSU Fan 1",
                 "temp1 PSU Temp 1",
                 "temp2 PSU Temp 2",
@@ -411,6 +450,25 @@
                 "power3"
             ]
         },
+        "930-9SPSU-00RA-00A" :{
+            "label": [
+                "in1 PSU 220V Rail (in)",
+                "in3 PSU 12V Rail (out)", 
+                "fan1 PSU Fan 1",
+                "temp1 PSU Temp 1",
+                "temp2 PSU Temp 2",
+                "temp3 PSU Temp 3",
+                "power1 PSU 220V Rail Pwr (in)",
+                "power2 PSU 12V Rail Pwr (out)",
+                "curr1 PSU 220V Rail Curr (in)",
+                "curr2 PSU 12V Rail Curr (out)"
+            ],
+            "ignore": [
+                "in2",
+                "fan2",
+                "fan3"
+            ]
+        },
         "930-9SPSU-00RA-00B" :{
             "label": [
                 "in1 PSU 220V Rail (in)",
@@ -429,6 +487,28 @@
             "set": [
                 "power2_cap 0"
             ]
+        },
+        "930-9SPSU-00RA-00C" :{
+            "label": [
+                "in1 PSU 220V Rail (in)",
+                "in3 PSU 54V Rail (out)",
+                "fan1 PSU Fan 1", 
+                "temp1 PSU Temp 1",
+                "temp2 PSU Temp 2",
+                "temp3 PSU Temp 3",
+                "power1 PSU 220V Rail Pwr (in)",
+                "power2 PSU 54V Rail Pwr (out)",
+                "curr1 PSU 220V Rail Curr (in)",
+                "curr2 PSU 54V Rail Curr (out)"
+            ],
+            "ignore": [
+                "in2",
+                "fan2",
+                "fan3"
+            ],
+            "set": [
+                "power2_cap 0"
+            ]
         }
     }
 }
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/ACS-MSN2700 b/device/mellanox/x86_64-mlnx_msn2700a1-r0/ACS-MSN2700
new file mode 120000
index 00000000000..929c10e08df
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/ACS-MSN2700
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/ACS-MSN2700
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700 b/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700
new file mode 120000
index 00000000000..c547b85a651
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/Mellanox-SN2700
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-C28D8 b/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-C28D8
new file mode 120000
index 00000000000..db848f3c770
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-C28D8
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-D40C8S8 b/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-D40C8S8
new file mode 120000
index 00000000000..6e2167cd43b
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-D40C8S8
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D40C8S8
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-D44C10 b/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-D44C10
new file mode 120000
index 00000000000..74e081fb089
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-D44C10
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-D48C8 b/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-D48C8
new file mode 120000
index 00000000000..0ecc644a629
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/Mellanox-SN2700-D48C8
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
index 8e736843dcf..71cd57486a6 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
@@ -1,6 +1,7 @@
 {#
-    Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES.
-    Apache-2.0
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2017-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    SPDX-License-Identifier: Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -15,6 +16,7 @@
     limitations under the License.
 #}
 
+
 {% if (('type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] == 'LeafRouter') or
        ('type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] == 'ToRRouter') and
        ('subtype' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['subtype'] == 'DualToR')) %}
@@ -271,9 +273,6 @@
     },
 {%- endmacro %}
 {%- endif %}
-{%- macro generate_global_dscp_to_tc_map() %}
-{# This is an empty macro since the global DSCP_TO_TC map is not required #}
-{%- endmacro %}
 
 {% endif %}
 
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/buffers_default_objects.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/buffers_defaults_objects.j2
similarity index 100%
rename from device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/buffers_default_objects.j2
rename to device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/buffers_defaults_objects.j2
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json
index 7d74a0b2af0..063f1e6b0ea 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json
@@ -2,16 +2,16 @@
   "GLOBAL_MEDIA_SETTINGS": {
       "1-32": {
           "QSFP-DD-sm_media_interface": {
-              "speed:400GAUI-8": {
-                  "idriver": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c",
-                      "lane2": "0x0000003c",
-                      "lane3": "0x0000003c",
-                      "lane4": "0x0000003c",
-                      "lane5": "0x0000003c",
-                      "lane6": "0x0000003c",
-                      "lane7": "0x0000003c"
+              "speed:100GAUI-2": {
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
                   },
                   "pre1": {
                       "lane0": "0xfffffffe",
@@ -23,16 +23,6 @@
                       "lane6": "0xfffffffe",
                       "lane7": "0xfffffffe"
                   },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
                   "main": {
                       "lane0": "0x00000020",
                       "lane1": "0x00000020",
@@ -53,6 +43,26 @@
                       "lane6": "0x00000006",
                       "lane7": "0x00000006"
                   },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
                   "ob_m2lp": {
                       "lane0": "0x00000004",
                       "lane1": "0x00000004",
@@ -63,6 +73,88 @@
                       "lane6": "0x00000004",
                       "lane7": "0x00000004"
                   },
+                  "obplev": {
+                      "lane0": "0x00000069",
+                      "lane1": "0x00000069",
+                      "lane2": "0x00000069",
+                      "lane3": "0x00000069",
+                      "lane4": "0x00000069",
+                      "lane5": "0x00000069",
+                      "lane6": "0x00000069",
+                      "lane7": "0x00000069"
+                  },
+                  "obnlev": {
+                      "lane0": "0x0000005f",
+                      "lane1": "0x0000005f",
+                      "lane2": "0x0000005f",
+                      "lane3": "0x0000005f",
+                      "lane4": "0x0000005f",
+                      "lane5": "0x0000005f",
+                      "lane6": "0x0000005f",
+                      "lane7": "0x0000005f"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000001e",
+                      "lane1": "0x0000001e",
+                      "lane2": "0x0000001e",
+                      "lane3": "0x0000001e",
+                      "lane4": "0x0000001e",
+                      "lane5": "0x0000001e",
+                      "lane6": "0x0000001e",
+                      "lane7": "0x0000001e"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x000000aa",
+                      "lane1": "0x000000aa",
+                      "lane2": "0x000000aa",
+                      "lane3": "0x000000aa",
+                      "lane4": "0x000000aa",
+                      "lane5": "0x000000aa",
+                      "lane6": "0x000000aa",
+                      "lane7": "0x000000aa"
+                  }
+              },
+              "speed:200GAUI-4": {
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffffe",
+                      "lane1": "0xfffffffe",
+                      "lane2": "0xfffffffe",
+                      "lane3": "0xfffffffe",
+                      "lane4": "0xfffffffe",
+                      "lane5": "0xfffffffe",
+                      "lane6": "0xfffffffe",
+                      "lane7": "0xfffffffe"
+                  },
+                  "main": {
+                      "lane0": "0x00000020",
+                      "lane1": "0x00000020",
+                      "lane2": "0x00000020",
+                      "lane3": "0x00000020",
+                      "lane4": "0x00000020",
+                      "lane5": "0x00000020",
+                      "lane6": "0x00000020",
+                      "lane7": "0x00000020"
+                  },
+                  "post1": {
+                      "lane0": "0x00000006",
+                      "lane1": "0x00000006",
+                      "lane2": "0x00000006",
+                      "lane3": "0x00000006",
+                      "lane4": "0x00000006",
+                      "lane5": "0x00000006",
+                      "lane6": "0x00000006",
+                      "lane7": "0x00000006"
+                  },
                   "ob_alev_out": {
                       "lane0": "0x0000000f",
                       "lane1": "0x0000000f",
@@ -73,6 +165,26 @@
                       "lane6": "0x0000000f",
                       "lane7": "0x0000000f"
                   },
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004",
+                      "lane2": "0x00000004",
+                      "lane3": "0x00000004",
+                      "lane4": "0x00000004",
+                      "lane5": "0x00000004",
+                      "lane6": "0x00000004",
+                      "lane7": "0x00000004"
+                  },
                   "obplev": {
                       "lane0": "0x00000069",
                       "lane1": "0x00000069",
@@ -114,50 +226,116 @@
                       "lane7": "0x000000aa"
                   }
               },
-              "speed:100GAUI-2": {
-                  "idriver": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c"
+              "speed:400GAUI-8": {
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
                   },
                   "pre1": {
                       "lane0": "0xfffffffe",
-                      "lane1": "0xfffffffe"
-                  },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000"
+                      "lane1": "0xfffffffe",
+                      "lane2": "0xfffffffe",
+                      "lane3": "0xfffffffe",
+                      "lane4": "0xfffffffe",
+                      "lane5": "0xfffffffe",
+                      "lane6": "0xfffffffe",
+                      "lane7": "0xfffffffe"
                   },
                   "main": {
                       "lane0": "0x00000020",
-                      "lane1": "0x00000020"
+                      "lane1": "0x00000020",
+                      "lane2": "0x00000020",
+                      "lane3": "0x00000020",
+                      "lane4": "0x00000020",
+                      "lane5": "0x00000020",
+                      "lane6": "0x00000020",
+                      "lane7": "0x00000020"
                   },
                   "post1": {
                       "lane0": "0x00000006",
-                      "lane1": "0x00000006"
-                  },
-                  "ob_m2lp": {
-                      "lane0": "0x00000004",
-                      "lane1": "0x00000004"
+                      "lane1": "0x00000006",
+                      "lane2": "0x00000006",
+                      "lane3": "0x00000006",
+                      "lane4": "0x00000006",
+                      "lane5": "0x00000006",
+                      "lane6": "0x00000006",
+                      "lane7": "0x00000006"
                   },
                   "ob_alev_out": {
                       "lane0": "0x0000000f",
-                      "lane1": "0x0000000f"
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004",
+                      "lane2": "0x00000004",
+                      "lane3": "0x00000004",
+                      "lane4": "0x00000004",
+                      "lane5": "0x00000004",
+                      "lane6": "0x00000004",
+                      "lane7": "0x00000004"
                   },
                   "obplev": {
                       "lane0": "0x00000069",
-                      "lane1": "0x00000069"
+                      "lane1": "0x00000069",
+                      "lane2": "0x00000069",
+                      "lane3": "0x00000069",
+                      "lane4": "0x00000069",
+                      "lane5": "0x00000069",
+                      "lane6": "0x00000069",
+                      "lane7": "0x00000069"
                   },
                   "obnlev": {
                       "lane0": "0x0000005f",
-                      "lane1": "0x0000005f"
+                      "lane1": "0x0000005f",
+                      "lane2": "0x0000005f",
+                      "lane3": "0x0000005f",
+                      "lane4": "0x0000005f",
+                      "lane5": "0x0000005f",
+                      "lane6": "0x0000005f",
+                      "lane7": "0x0000005f"
                   },
                   "regn_bfm1p": {
                       "lane0": "0x0000001e",
-                      "lane1": "0x0000001e"
+                      "lane1": "0x0000001e",
+                      "lane2": "0x0000001e",
+                      "lane3": "0x0000001e",
+                      "lane4": "0x0000001e",
+                      "lane5": "0x0000001e",
+                      "lane6": "0x0000001e",
+                      "lane7": "0x0000001e"
                   },
                   "regn_bfm1n": {
                       "lane0": "0x000000aa",
-                      "lane1": "0x000000aa"
+                      "lane1": "0x000000aa",
+                      "lane2": "0x000000aa",
+                      "lane3": "0x000000aa",
+                      "lane4": "0x000000aa",
+                      "lane5": "0x000000aa",
+                      "lane6": "0x000000aa",
+                      "lane7": "0x000000aa"
                   }
               }
           },
@@ -835,120 +1013,282 @@
                   }
               }
           },
-          "QSFP+-active_cable_media_interface": {
+          "QSFP\\+-active_cable_media_interface": {
               "speed:CAUI-4": {
                   "idriver": {
                       "lane0": "0x00000028",
                       "lane1": "0x00000028",
                       "lane2": "0x00000028",
-                      "lane3": "0x00000028",
-                      "lane4": "0x00000028",
-                      "lane5": "0x00000028",
-                      "lane6": "0x00000028",
-                      "lane7": "0x00000028"
+                      "lane3": "0x00000028"
                   },
                   "pre1": {
                       "lane0": "0xfffffff3",
                       "lane1": "0xfffffff3",
                       "lane2": "0xfffffff3",
-                      "lane3": "0xfffffff3",
-                      "lane4": "0xfffffff3",
-                      "lane5": "0xfffffff3",
-                      "lane6": "0xfffffff3",
-                      "lane7": "0xfffffff3"
+                      "lane3": "0xfffffff3"
                   },
                   "pre2": {
                       "lane0": "0x00000000",
                       "lane1": "0x00000000",
                       "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
+                      "lane3": "0x00000000"
                   },
                   "main": {
                       "lane0": "0x00000033",
                       "lane1": "0x00000033",
                       "lane2": "0x00000033",
-                      "lane3": "0x00000033",
-                      "lane4": "0x00000033",
-                      "lane5": "0x00000033",
-                      "lane6": "0x00000033",
-                      "lane7": "0x00000033"
+                      "lane3": "0x00000033"
                   },
                   "post1": {
                       "lane0": "0x00000000",
                       "lane1": "0x00000000",
                       "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
+                      "lane3": "0x00000000"
                   },
                   "ob_m2lp": {
                       "lane0": "0x00000000",
                       "lane1": "0x00000000",
                       "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
+                      "lane3": "0x00000000"
                   },
                   "ob_alev_out": {
                       "lane0": "0x0000000f",
                       "lane1": "0x0000000f",
                       "lane2": "0x0000000f",
-                      "lane3": "0x0000000f",
-                      "lane4": "0x0000000f",
-                      "lane5": "0x0000000f",
-                      "lane6": "0x0000000f",
-                      "lane7": "0x0000000f"
+                      "lane3": "0x0000000f"
                   },
                   "obplev": {
                       "lane0": "0x00000050",
                       "lane1": "0x00000050",
                       "lane2": "0x00000050",
-                      "lane3": "0x00000050",
-                      "lane4": "0x00000050",
-                      "lane5": "0x00000050",
-                      "lane6": "0x00000050",
-                      "lane7": "0x00000050"
+                      "lane3": "0x00000050"
                   },
                   "obnlev": {
                       "lane0": "0x00000078",
                       "lane1": "0x00000078",
                       "lane2": "0x00000078",
-                      "lane3": "0x00000078",
-                      "lane4": "0x00000078",
-                      "lane5": "0x00000078",
-                      "lane6": "0x00000078",
-                      "lane7": "0x00000078"
+                      "lane3": "0x00000078"
                   },
                   "regn_bfm1p": {
                       "lane0": "0x0000003c",
                       "lane1": "0x0000003c",
                       "lane2": "0x0000003c",
-                      "lane3": "0x0000003c",
-                      "lane4": "0x0000003c",
-                      "lane5": "0x0000003c",
-                      "lane6": "0x0000003c",
-                      "lane7": "0x0000003c"
+                      "lane3": "0x0000003c"
                   },
                   "regn_bfm1n": {
                       "lane0": "0x0000008c",
                       "lane1": "0x0000008c",
                       "lane2": "0x0000008c",
-                      "lane3": "0x0000008c",
-                      "lane4": "0x0000008c",
-                      "lane5": "0x0000008c",
-                      "lane6": "0x0000008c",
-                      "lane7": "0x0000008c"
+                      "lane3": "0x0000008c"
                   }
-              }
-          }
+               },
+              "speed:200GAUI-4": {
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffffe",
+                      "lane1": "0xfffffffe",
+                      "lane2": "0xfffffffe",
+                      "lane3": "0xfffffffe"
+                  },
+                  "main": {
+                      "lane0": "0x00000020",
+                      "lane1": "0x00000020",
+                      "lane2": "0x00000020",
+                      "lane3": "0x00000020"
+                  },
+                  "post1": {
+                      "lane0": "0x00000006",
+                      "lane1": "0x00000006",
+                      "lane2": "0x00000006",
+                      "lane3": "0x00000006"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f"
+                  },
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004",
+                      "lane2": "0x00000004",
+                      "lane3": "0x00000004"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000069",
+                      "lane1": "0x00000069",
+                      "lane2": "0x00000069",
+                      "lane3": "0x00000069"
+                  },
+                  "obnlev": {
+                      "lane0": "0x0000005f",
+                      "lane1": "0x0000005f",
+                      "lane2": "0x0000005f",
+                      "lane3": "0x0000005f"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000001e",
+                      "lane1": "0x0000001e",
+                      "lane2": "0x0000001e",
+                      "lane3": "0x0000001e"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x000000aa",
+                      "lane1": "0x000000aa",
+                      "lane2": "0x000000aa",
+                      "lane3": "0x000000aa"
+                  }
+                }
+          },
+          "QSFP\\+C-active_cable_media_interface": {
+                "speed:CAUI-4": {
+                    "idriver": {
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff3",
+                        "lane1": "0xfffffff3",
+                        "lane2": "0xfffffff3",
+                        "lane3": "0xfffffff3"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000"
+                    },
+                    "main": {
+                        "lane0": "0x00000033",
+                        "lane1": "0x00000033",
+                        "lane2": "0x00000033",
+                        "lane3": "0x00000033"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000"
+                    },
+                    "ob_m2lp": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000"
+                    },
+                    "ob_alev_out": {
+                        "lane0": "0x0000000f",
+                        "lane1": "0x0000000f",
+                        "lane2": "0x0000000f",
+                        "lane3": "0x0000000f"
+                    },
+                    "obplev": {
+                        "lane0": "0x00000050",
+                        "lane1": "0x00000050",
+                        "lane2": "0x00000050",
+                        "lane3": "0x00000050"
+                    },
+                    "obnlev": {
+                        "lane0": "0x00000078",
+                        "lane1": "0x00000078",
+                        "lane2": "0x00000078",
+                        "lane3": "0x00000078"
+                    },
+                    "regn_bfm1p": {
+                        "lane0": "0x0000003c",
+                        "lane1": "0x0000003c",
+                        "lane2": "0x0000003c",
+                        "lane3": "0x0000003c"
+                    },
+                    "regn_bfm1n": {
+                        "lane0": "0x0000008c",
+                        "lane1": "0x0000008c",
+                        "lane2": "0x0000008c",
+                        "lane3": "0x0000008c"
+                    }
+                },
+                "speed:200GAUI-4": {
+                    "pre2": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffffe",
+                        "lane1": "0xfffffffe",
+                        "lane2": "0xfffffffe",
+                        "lane3": "0xfffffffe"
+                    },
+                    "main": {
+                        "lane0": "0x00000020",
+                        "lane1": "0x00000020",
+                        "lane2": "0x00000020",
+                        "lane3": "0x00000020"
+                    },
+                    "post1": {
+                        "lane0": "0x00000006",
+                        "lane1": "0x00000006",
+                        "lane2": "0x00000006",
+                        "lane3": "0x00000006"
+                    },
+                    "ob_alev_out": {
+                        "lane0": "0x0000000f",
+                        "lane1": "0x0000000f",
+                        "lane2": "0x0000000f",
+                        "lane3": "0x0000000f"
+                    },
+                    "idriver": {
+                        "lane0": "0x0000003c",
+                        "lane1": "0x0000003c",
+                        "lane2": "0x0000003c",
+                        "lane3": "0x0000003c"
+                    },
+                    "ob_m2lp": {
+                        "lane0": "0x00000004",
+                        "lane1": "0x00000004",
+                        "lane2": "0x00000004",
+                        "lane3": "0x00000004"
+                    },
+                    "obplev": {
+                        "lane0": "0x00000069",
+                        "lane1": "0x00000069",
+                        "lane2": "0x00000069",
+                        "lane3": "0x00000069"
+                    },
+                    "obnlev": {
+                        "lane0": "0x0000005f",
+                        "lane1": "0x0000005f",
+                        "lane2": "0x0000005f",
+                        "lane3": "0x0000005f"
+                    },
+                    "regn_bfm1p": {
+                        "lane0": "0x0000001e",
+                        "lane1": "0x0000001e",
+                        "lane2": "0x0000001e",
+                        "lane3": "0x0000001e"
+                    },
+                    "regn_bfm1n": {
+                        "lane0": "0x000000aa",
+                        "lane1": "0x000000aa",
+                        "lane2": "0x000000aa",
+                        "lane3": "0x000000aa"
+                    }
+                }
+            }
       }
   }
 }
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers.json.j2
new file mode 120000
index 00000000000..91bf6407d93
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers.json.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_defaults_objects.j2
new file mode 120000
index 00000000000..b799f8c7e01
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_defaults_t0.j2
new file mode 120000
index 00000000000..da6bfd24f4e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..0c0886d2b1a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_defaults_t1.j2
@@ -0,0 +1,44 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{%-set ports2cable = {
+            'spinerouter_leafrouter' : '2000m',
+            'leafrouter_torrouter' : '300m'
+       }
+-%}
+{% set ingress_lossless_pool_size  =  '50667520' %}
+{% set ingress_lossless_pool_xoff  =   '3854336' %}
+{% set egress_lossless_pool_size   =  '60817392' %}
+{% set egress_lossy_pool_size      =  '50667520' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_dynamic.json.j2
new file mode 120000
index 00000000000..4de460cb275
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/buffers_dynamic.json.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers_dynamic.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/hwsku.json
new file mode 100644
index 00000000000..8d924c28ffe
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/hwsku.json
@@ -0,0 +1,268 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet164": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet172": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet180": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet188": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet196": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet204": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet212": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet220": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/media_settings.json
new file mode 120000
index 00000000000..becbe5ec68a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/optics_si_settings.json
new file mode 120000
index 00000000000..a30588ab624
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/pg_profile_lookup.ini
new file mode 100644
index 00000000000..6b40ed3f60d
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/pg_profile_lookup.ini
@@ -0,0 +1,60 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+  10000    5m 19456  19456  16384          0
+  25000    5m 19456  19456  17408          0
+  40000    5m 19456  19456  19456          0
+  50000    5m 19456  19456  21504          0
+ 100000    5m 19456  19456  37888          0
+ 200000    5m 19456  19456  43008          0
+ 400000    5m 38912  38912  73728          0
+  10000   30m 19456  19456  16384          0
+  25000   30m 19456  19456  18432          0
+  40000   30m 19456  19456  21504          0
+  50000   30m 19456  19456  23552          0
+ 100000   30m 19456  19456  43008          0
+ 200000   30m 19456  19456  51200          0
+ 400000   30m 38912  38912  91136          0
+  10000   40m 19456  19456  16384          0
+  25000   40m 19456  19456  18432          0
+  40000   40m 19456  19456  21504          0
+  50000   40m 19456  19456  23552          0
+ 100000   40m 19456  19456  43008          0
+ 200000   40m 19456  19456  51200          0
+ 400000   40m 38912  38912  91136          0
+  10000  300m 19456  19456  19456          0
+  25000  300m 19456  19456  26624          0
+  40000  300m 19456  19456  34816          0
+  50000  300m 19456  19456  40960          0
+ 100000  300m 19456  19456  75776          0
+ 200000  300m 19456  19456  118784         0
+ 400000  300m 38912  38912  225280         0
+  10000 1500m 19456  19456  35840          0
+  25000 1500m 19456  19456  65536          0
+  40000 1500m 19456  19456  96256          0
+  50000 1500m 19456  19456  117760         0
+ 100000 1500m 19456  19456  230400         0
+ 200000 1500m 19456  19456  427008         0
+ 400000 1500m 38912  38912  427008         0
+  10000 2000m 19456  19456  41984          0
+  25000 2000m 19456  19456  80896          0
+  40000 2000m 19456  19456  121856         0
+  50000 2000m 19456  19456  149504         0
+ 100000 2000m 19456  19456  293888         0
+ 200000 2000m 19456  19456  555008         0
+ 400000 2000m 38912  38912  555008         0
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/pmon_daemon_control.json
new file mode 120000
index 00000000000..fc7fbfe33ee
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/pmon_daemon_control.json
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/port_config.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/port_config.ini
new file mode 100644
index 00000000000..0998d2313c3
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/port_config.ini
@@ -0,0 +1,70 @@
+##
+## Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name         lanes                                  alias     index    speed
+Ethernet0      0,1,2,3                                etp1a     1        100000
+Ethernet4      4,5,6,7                                etp1b     1        100000
+Ethernet8      8,9,10,11                              etp2a     2        100000
+Ethernet12     12,13,14,15                            etp2b     2        100000
+Ethernet16     16,17,18,19                            etp3a     3        100000
+Ethernet20     20,21,22,23                            etp3b     3        100000
+Ethernet24     24,25,26,27                            etp4a     4        100000
+Ethernet28     28,29,30,31                            etp4b     4        100000
+Ethernet32     32,33,34,35                            etp5a     5        100000
+Ethernet36     36,37,38,39                            etp5b     5        100000
+Ethernet40     40,41,42,43                            etp6a     6        100000
+Ethernet44     44,45,46,47                            etp6b     6        100000
+Ethernet48     48,49,50,51                            etp7a     7        100000
+Ethernet52     52,53,54,55                            etp7b     7        100000
+Ethernet56     56,57,58,59                            etp8a     8        100000
+Ethernet60     60,61,62,63                            etp8b     8        100000
+Ethernet64     64,65,66,67                            etp9a     9        100000
+Ethernet68     68,69,70,71                            etp9b     9        100000
+Ethernet72     72,73,74,75                            etp10a    10       100000
+Ethernet76     76,77,78,79                            etp10b    10       100000
+Ethernet80     80,81,82,83                            etp11a    11       100000
+Ethernet84     84,85,86,87                            etp11b    11       100000
+Ethernet88     88,89,90,91                            etp12a    12       100000
+Ethernet92     92,93,94,95                            etp12b    12       100000
+Ethernet96     96,97,98,99,100,101,102,103            etp13     13       100000
+Ethernet104    104,105,106,107,108,109,110,111        etp14     14       100000
+Ethernet112    112,113,114,115,116,117,118,119        etp15     15       100000
+Ethernet120    120,121,122,123,124,125,126,127        etp16     16       100000
+Ethernet128    128,129,130,131,132,133,134,135        etp17     17       100000
+Ethernet136    136,137,138,139,140,141,142,143        etp18     18       100000
+Ethernet144    144,145,146,147,148,149,150,151        etp19     19       100000
+Ethernet152    152,153,154,155,156,157,158,159        etp20     20       100000
+Ethernet160    160,161,162,163                        etp21a    21       100000
+Ethernet164    164,165,166,167                        etp21b    21       100000
+Ethernet168    168,169,170,171                        etp22a    22       100000
+Ethernet172    172,173,174,175                        etp22b    22       100000
+Ethernet176    176,177,178,179                        etp23a    23       100000
+Ethernet180    180,181,182,183                        etp23b    23       100000
+Ethernet184    184,185,186,187                        etp24a    24       100000
+Ethernet188    188,189,190,191                        etp24b    24       100000
+Ethernet192    192,193,194,195                        etp25a    25       100000
+Ethernet196    196,197,198,199                        etp25b    25       100000
+Ethernet200    200,201,202,203                        etp26a    26       100000
+Ethernet204    204,205,206,207                        etp26b    26       100000
+Ethernet208    208,209,210,211                        etp27a    27       100000
+Ethernet212    212,213,214,215                        etp27b    27       100000
+Ethernet216    216,217,218,219                        etp28a    28       100000
+Ethernet220    220,221,222,223                        etp28b    28       100000
+Ethernet224    224,225,226,227,228,229,230,231        etp29     29       400000
+Ethernet232    232,233,234,235,236,237,238,239        etp30     30       400000
+Ethernet240    240,241,242,243,244,245,246,247        etp31     31       400000
+Ethernet248    248,249,250,251,252,253,254,255        etp32     32       400000
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/qos.json.j2
new file mode 120000
index 00000000000..176ba148274
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/qos.json.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/sai.profile
new file mode 120000
index 00000000000..ee409a15104
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/sai.profile
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/sai.profile
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/sai_4280.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/sai_4280.xml
new file mode 120000
index 00000000000..563ede5a0ad
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/sai_4280.xml
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/sai_4280.xml
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/create_only_config_db_buffers.json
new file mode 100644
index 00000000000..6feb156714f
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json
deleted file mode 100644
index 3bd288caa9c..00000000000
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json
+++ /dev/null
@@ -1,506 +0,0 @@
-{
-  "GLOBAL_MEDIA_SETTINGS": {
-      "1-28": {
-          "QSFP-DD-sm_media_interface": {
-              "speed:400GAUI-8": {
-                  "idriver": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c",
-                      "lane2": "0x0000003c",
-                      "lane3": "0x0000003c",
-                      "lane4": "0x0000003c",
-                      "lane5": "0x0000003c",
-                      "lane6": "0x0000003c",
-                      "lane7": "0x0000003c"
-                  },
-                  "pre1": {
-                      "lane0": "0xfffffffe",
-                      "lane1": "0xfffffffe",
-                      "lane2": "0xfffffffe",
-                      "lane3": "0xfffffffe",
-                      "lane4": "0xfffffffe",
-                      "lane5": "0xfffffffe",
-                      "lane6": "0xfffffffe",
-                      "lane7": "0xfffffffe"
-                  },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "main": {
-                      "lane0": "0x00000020",
-                      "lane1": "0x00000020",
-                      "lane2": "0x00000020",
-                      "lane3": "0x00000020",
-                      "lane4": "0x00000020",
-                      "lane5": "0x00000020",
-                      "lane6": "0x00000020",
-                      "lane7": "0x00000020"
-                  },
-                  "post1": {
-                      "lane0": "0x00000006",
-                      "lane1": "0x00000006",
-                      "lane2": "0x00000006",
-                      "lane3": "0x00000006",
-                      "lane4": "0x00000006",
-                      "lane5": "0x00000006",
-                      "lane6": "0x00000006",
-                      "lane7": "0x00000006"
-                  },
-                  "ob_m2lp": {
-                      "lane0": "0x00000004",
-                      "lane1": "0x00000004",
-                      "lane2": "0x00000004",
-                      "lane3": "0x00000004",
-                      "lane4": "0x00000004",
-                      "lane5": "0x00000004",
-                      "lane6": "0x00000004",
-                      "lane7": "0x00000004"
-                  },
-                  "ob_alev_out": {
-                      "lane0": "0x0000000f",
-                      "lane1": "0x0000000f",
-                      "lane2": "0x0000000f",
-                      "lane3": "0x0000000f",
-                      "lane4": "0x0000000f",
-                      "lane5": "0x0000000f",
-                      "lane6": "0x0000000f",
-                      "lane7": "0x0000000f"
-                  },
-                  "obplev": {
-                      "lane0": "0x00000069",
-                      "lane1": "0x00000069",
-                      "lane2": "0x00000069",
-                      "lane3": "0x00000069",
-                      "lane4": "0x00000069",
-                      "lane5": "0x00000069",
-                      "lane6": "0x00000069",
-                      "lane7": "0x00000069"
-                  },
-                  "obnlev": {
-                      "lane0": "0x0000005f",
-                      "lane1": "0x0000005f",
-                      "lane2": "0x0000005f",
-                      "lane3": "0x0000005f",
-                      "lane4": "0x0000005f",
-                      "lane5": "0x0000005f",
-                      "lane6": "0x0000005f",
-                      "lane7": "0x0000005f"
-                  },
-                  "regn_bfm1p": {
-                      "lane0": "0x0000001e",
-                      "lane1": "0x0000001e",
-                      "lane2": "0x0000001e",
-                      "lane3": "0x0000001e",
-                      "lane4": "0x0000001e",
-                      "lane5": "0x0000001e",
-                      "lane6": "0x0000001e",
-                      "lane7": "0x0000001e"
-                  },
-                  "regn_bfm1n": {
-                      "lane0": "0x000000aa",
-                      "lane1": "0x000000aa",
-                      "lane2": "0x000000aa",
-                      "lane3": "0x000000aa",
-                      "lane4": "0x000000aa",
-                      "lane5": "0x000000aa",
-                      "lane6": "0x000000aa",
-                      "lane7": "0x000000aa"
-                  }
-              },
-              "speed:100GAUI-2": {
-                  "idriver": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c"
-                  },
-                  "pre1": {
-                      "lane0": "0xfffffffe",
-                      "lane1": "0xfffffffe"
-                  },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000"
-                  },
-                  "main": {
-                      "lane0": "0x00000020",
-                      "lane1": "0x00000020"
-                  },
-                  "post1": {
-                      "lane0": "0x00000006",
-                      "lane1": "0x00000006"
-                  },
-                  "ob_m2lp": {
-                      "lane0": "0x00000004",
-                      "lane1": "0x00000004"
-                  },
-                  "ob_alev_out": {
-                      "lane0": "0x0000000f",
-                      "lane1": "0x0000000f"
-                  },
-                  "obplev": {
-                      "lane0": "0x00000069",
-                      "lane1": "0x00000069"
-                  },
-                  "obnlev": {
-                      "lane0": "0x0000005f",
-                      "lane1": "0x0000005f"
-                  },
-                  "regn_bfm1p": {
-                      "lane0": "0x0000001e",
-                      "lane1": "0x0000001e"
-                  },
-                  "regn_bfm1n": {
-                      "lane0": "0x000000aa",
-                      "lane1": "0x000000aa"
-                  }
-              }
-          },
-          "QSFP-DD-active_cable_media_interface": {
-              "speed:400GAUI-8": {
-                  "idriver": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c",
-                      "lane2": "0x0000003c",
-                      "lane3": "0x0000003c",
-                      "lane4": "0x0000003c",
-                      "lane5": "0x0000003c",
-                      "lane6": "0x0000003c",
-                      "lane7": "0x0000003c"
-                  },
-                  "pre1": {
-                      "lane0": "0xfffffffe",
-                      "lane1": "0xfffffffe",
-                      "lane2": "0xfffffffe",
-                      "lane3": "0xfffffffe",
-                      "lane4": "0xfffffffe",
-                      "lane5": "0xfffffffe",
-                      "lane6": "0xfffffffe",
-                      "lane7": "0xfffffffe"
-                  },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "main": {
-                      "lane0": "0x00000020",
-                      "lane1": "0x00000020",
-                      "lane2": "0x00000020",
-                      "lane3": "0x00000020",
-                      "lane4": "0x00000020",
-                      "lane5": "0x00000020",
-                      "lane6": "0x00000020",
-                      "lane7": "0x00000020"
-                  },
-                  "post1": {
-                      "lane0": "0x00000006",
-                      "lane1": "0x00000006",
-                      "lane2": "0x00000006",
-                      "lane3": "0x00000006",
-                      "lane4": "0x00000006",
-                      "lane5": "0x00000006",
-                      "lane6": "0x00000006",
-                      "lane7": "0x00000006"
-                  },
-                  "ob_m2lp": {
-                      "lane0": "0x00000004",
-                      "lane1": "0x00000004",
-                      "lane2": "0x00000004",
-                      "lane3": "0x00000004",
-                      "lane4": "0x00000004",
-                      "lane5": "0x00000004",
-                      "lane6": "0x00000004",
-                      "lane7": "0x00000004"
-                  },
-                  "ob_alev_out": {
-                      "lane0": "0x0000000f",
-                      "lane1": "0x0000000f",
-                      "lane2": "0x0000000f",
-                      "lane3": "0x0000000f",
-                      "lane4": "0x0000000f",
-                      "lane5": "0x0000000f",
-                      "lane6": "0x0000000f",
-                      "lane7": "0x0000000f"
-                  },
-                  "obplev": {
-                      "lane0": "0x00000069",
-                      "lane1": "0x00000069",
-                      "lane2": "0x00000069",
-                      "lane3": "0x00000069",
-                      "lane4": "0x00000069",
-                      "lane5": "0x00000069",
-                      "lane6": "0x00000069",
-                      "lane7": "0x00000069"
-                  },
-                  "obnlev": {
-                      "lane0": "0x0000005f",
-                      "lane1": "0x0000005f",
-                      "lane2": "0x0000005f",
-                      "lane3": "0x0000005f",
-                      "lane4": "0x0000005f",
-                      "lane5": "0x0000005f",
-                      "lane6": "0x0000005f",
-                      "lane7": "0x0000005f"
-                  },
-                  "regn_bfm1p": {
-                      "lane0": "0x0000001e",
-                      "lane1": "0x0000001e",
-                      "lane2": "0x0000001e",
-                      "lane3": "0x0000001e",
-                      "lane4": "0x0000001e",
-                      "lane5": "0x0000001e",
-                      "lane6": "0x0000001e",
-                      "lane7": "0x0000001e"
-                  },
-                  "regn_bfm1n": {
-                      "lane0": "0x000000aa",
-                      "lane1": "0x000000aa",
-                      "lane2": "0x000000aa",
-                      "lane3": "0x000000aa",
-                      "lane4": "0x000000aa",
-                      "lane5": "0x000000aa",
-                      "lane6": "0x000000aa",
-                      "lane7": "0x000000aa"
-                  }
-              },
-              "speed:CAUI-4": {
-                  "idriver": {
-                      "lane0": "0x00000028",
-                      "lane1": "0x00000028",
-                      "lane2": "0x00000028",
-                      "lane3": "0x00000028",
-                      "lane4": "0x00000028",
-                      "lane5": "0x00000028",
-                      "lane6": "0x00000028",
-                      "lane7": "0x00000028"
-                  },
-                  "pre1": {
-                      "lane0": "0xfffffff3",
-                      "lane1": "0xfffffff3",
-                      "lane2": "0xfffffff3",
-                      "lane3": "0xfffffff3",
-                      "lane4": "0xfffffff3",
-                      "lane5": "0xfffffff3",
-                      "lane6": "0xfffffff3",
-                      "lane7": "0xfffffff3"
-                  },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "main": {
-                      "lane0": "0x00000033",
-                      "lane1": "0x00000033",
-                      "lane2": "0x00000033",
-                      "lane3": "0x00000033",
-                      "lane4": "0x00000033",
-                      "lane5": "0x00000033",
-                      "lane6": "0x00000033",
-                      "lane7": "0x00000033"
-                  },
-                  "post1": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "ob_m2lp": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "ob_alev_out": {
-                      "lane0": "0x0000000f",
-                      "lane1": "0x0000000f",
-                      "lane2": "0x0000000f",
-                      "lane3": "0x0000000f",
-                      "lane4": "0x0000000f",
-                      "lane5": "0x0000000f",
-                      "lane6": "0x0000000f",
-                      "lane7": "0x0000000f"
-                  },
-                  "obplev": {
-                      "lane0": "0x00000050",
-                      "lane1": "0x00000050",
-                      "lane2": "0x00000050",
-                      "lane3": "0x00000050",
-                      "lane4": "0x00000050",
-                      "lane5": "0x00000050",
-                      "lane6": "0x00000050",
-                      "lane7": "0x00000050"
-                  },
-                  "obnlev": {
-                      "lane0": "0x00000078",
-                      "lane1": "0x00000078",
-                      "lane2": "0x00000078",
-                      "lane3": "0x00000078",
-                      "lane4": "0x00000078",
-                      "lane5": "0x00000078",
-                      "lane6": "0x00000078",
-                      "lane7": "0x00000078"
-                  },
-                  "regn_bfm1p": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c",
-                      "lane2": "0x0000003c",
-                      "lane3": "0x0000003c",
-                      "lane4": "0x0000003c",
-                      "lane5": "0x0000003c",
-                      "lane6": "0x0000003c",
-                      "lane7": "0x0000003c"
-                  },
-                  "regn_bfm1n": {
-                      "lane0": "0x0000008c",
-                      "lane1": "0x0000008c",
-                      "lane2": "0x0000008c",
-                      "lane3": "0x0000008c",
-                      "lane4": "0x0000008c",
-                      "lane5": "0x0000008c",
-                      "lane6": "0x0000008c",
-                      "lane7": "0x0000008c"
-                  }
-              }
-          },
-          "QSFP+-active_cable_media_interface": {
-              "speed:CAUI-4": {
-                  "idriver": {
-                      "lane0": "0x00000028",
-                      "lane1": "0x00000028",
-                      "lane2": "0x00000028",
-                      "lane3": "0x00000028",
-                      "lane4": "0x00000028",
-                      "lane5": "0x00000028",
-                      "lane6": "0x00000028",
-                      "lane7": "0x00000028"
-                  },
-                  "pre1": {
-                      "lane0": "0xfffffff3",
-                      "lane1": "0xfffffff3",
-                      "lane2": "0xfffffff3",
-                      "lane3": "0xfffffff3",
-                      "lane4": "0xfffffff3",
-                      "lane5": "0xfffffff3",
-                      "lane6": "0xfffffff3",
-                      "lane7": "0xfffffff3"
-                  },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "main": {
-                      "lane0": "0x00000033",
-                      "lane1": "0x00000033",
-                      "lane2": "0x00000033",
-                      "lane3": "0x00000033",
-                      "lane4": "0x00000033",
-                      "lane5": "0x00000033",
-                      "lane6": "0x00000033",
-                      "lane7": "0x00000033"
-                  },
-                  "post1": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "ob_m2lp": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "ob_alev_out": {
-                      "lane0": "0x0000000f",
-                      "lane1": "0x0000000f",
-                      "lane2": "0x0000000f",
-                      "lane3": "0x0000000f",
-                      "lane4": "0x0000000f",
-                      "lane5": "0x0000000f",
-                      "lane6": "0x0000000f",
-                      "lane7": "0x0000000f"
-                  },
-                  "obplev": {
-                      "lane0": "0x00000050",
-                      "lane1": "0x00000050",
-                      "lane2": "0x00000050",
-                      "lane3": "0x00000050",
-                      "lane4": "0x00000050",
-                      "lane5": "0x00000050",
-                      "lane6": "0x00000050",
-                      "lane7": "0x00000050"
-                  },
-                  "obnlev": {
-                      "lane0": "0x00000078",
-                      "lane1": "0x00000078",
-                      "lane2": "0x00000078",
-                      "lane3": "0x00000078",
-                      "lane4": "0x00000078",
-                      "lane5": "0x00000078",
-                      "lane6": "0x00000078",
-                      "lane7": "0x00000078"
-                  },
-                  "regn_bfm1p": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c",
-                      "lane2": "0x0000003c",
-                      "lane3": "0x0000003c",
-                      "lane4": "0x0000003c",
-                      "lane5": "0x0000003c",
-                      "lane6": "0x0000003c",
-                      "lane7": "0x0000003c"
-                  },
-                  "regn_bfm1n": {
-                      "lane0": "0x0000008c",
-                      "lane1": "0x0000008c",
-                      "lane2": "0x0000008c",
-                      "lane3": "0x0000008c",
-                      "lane4": "0x0000008c",
-                      "lane5": "0x0000008c",
-                      "lane6": "0x0000008c",
-                      "lane7": "0x0000008c"
-                  }
-              }
-          }
-      }
-  }
-}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json
new file mode 120000
index 00000000000..e5be1770d56
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json
deleted file mode 100644
index 6e427a5b03e..00000000000
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json
+++ /dev/null
@@ -1,108 +0,0 @@
-{
-    "GLOBAL_MEDIA_SETTINGS": {
-        "1-28": {
-            "50G_SPEED": {
-                "Default": {
-                    "OutputAmplitudeTargetRx": {
-                        "OutputAmplitudeTargetRx1": 0,
-                        "OutputAmplitudeTargetRx2": 0,
-                        "OutputAmplitudeTargetRx3": 0,
-                        "OutputAmplitudeTargetRx4": 0,
-                        "OutputAmplitudeTargetRx5": 0,
-                        "OutputAmplitudeTargetRx6": 0,
-                        "OutputAmplitudeTargetRx7": 0,
-                        "OutputAmplitudeTargetRx8": 0
-                    },
-                    "OutputEqPreCursorTargetRx": {
-                        "OutputEqPreCursorTargetRx1": 0,
-                        "OutputEqPreCursorTargetRx2": 0,
-                        "OutputEqPreCursorTargetRx3": 0,
-                        "OutputEqPreCursorTargetRx4": 0,
-                        "OutputEqPreCursorTargetRx5": 0,
-                        "OutputEqPreCursorTargetRx6": 0,
-                        "OutputEqPreCursorTargetRx7": 0,
-                        "OutputEqPreCursorTargetRx8": 0
-                    },
-                    "OutputEqPostCursorTargetRx": {
-                        "OutputEqPostCursorTargetRx1": 0,
-                        "OutputEqPostCursorTargetRx2": 0,
-                        "OutputEqPostCursorTargetRx3": 0,
-                        "OutputEqPostCursorTargetRx4": 0,
-                        "OutputEqPostCursorTargetRx5": 0,
-                        "OutputEqPostCursorTargetRx6": 0,
-                        "OutputEqPostCursorTargetRx7": 0,
-                        "OutputEqPostCursorTargetRx8": 0
-                    }
-                }
-            },
-            "25G_SPEED": {
-                "Default": {
-                    "OutputAmplitudeTargetRx": {
-                        "OutputAmplitudeTargetRx1": 0,
-                        "OutputAmplitudeTargetRx2": 0,
-                        "OutputAmplitudeTargetRx3": 0,
-                        "OutputAmplitudeTargetRx4": 0,
-                        "OutputAmplitudeTargetRx5": 0,
-                        "OutputAmplitudeTargetRx6": 0,
-                        "OutputAmplitudeTargetRx7": 0,
-                        "OutputAmplitudeTargetRx8": 0
-                    },
-                    "OutputEqPreCursorTargetRx": {
-                        "OutputEqPreCursorTargetRx1": 0,
-                        "OutputEqPreCursorTargetRx2": 0,
-                        "OutputEqPreCursorTargetRx3": 0,
-                        "OutputEqPreCursorTargetRx4": 0,
-                        "OutputEqPreCursorTargetRx5": 0,
-                        "OutputEqPreCursorTargetRx6": 0,
-                        "OutputEqPreCursorTargetRx7": 0,
-                        "OutputEqPreCursorTargetRx8": 0
-                    },
-                    "OutputEqPostCursorTargetRx": {
-                        "OutputEqPostCursorTargetRx1": 0,
-                        "OutputEqPostCursorTargetRx2": 0,
-                        "OutputEqPostCursorTargetRx3": 0,
-                        "OutputEqPostCursorTargetRx4": 0,
-                        "OutputEqPostCursorTargetRx5": 0,
-                        "OutputEqPostCursorTargetRx6": 0,
-                        "OutputEqPostCursorTargetRx7": 0,
-                        "OutputEqPostCursorTargetRx8": 0
-                    }
-                }
-            },
-            "10G_SPEED": {
-                "Default": {
-                    "OutputAmplitudeTargetRx": {
-                        "OutputAmplitudeTargetRx1": 0,
-                        "OutputAmplitudeTargetRx2": 0,
-                        "OutputAmplitudeTargetRx3": 0,
-                        "OutputAmplitudeTargetRx4": 0,
-                        "OutputAmplitudeTargetRx5": 0,
-                        "OutputAmplitudeTargetRx6": 0,
-                        "OutputAmplitudeTargetRx7": 0,
-                        "OutputAmplitudeTargetRx8": 0
-                    },
-                    "OutputEqPreCursorTargetRx": {
-                        "OutputEqPreCursorTargetRx1": 0,
-                        "OutputEqPreCursorTargetRx2": 0,
-                        "OutputEqPreCursorTargetRx3": 0,
-                        "OutputEqPreCursorTargetRx4": 0,
-                        "OutputEqPreCursorTargetRx5": 0,
-                        "OutputEqPreCursorTargetRx6": 0,
-                        "OutputEqPreCursorTargetRx7": 0,
-                        "OutputEqPreCursorTargetRx8": 0
-                    },
-                    "OutputEqPostCursorTargetRx": {
-                        "OutputEqPostCursorTargetRx1": 0,
-                        "OutputEqPostCursorTargetRx2": 0,
-                        "OutputEqPostCursorTargetRx3": 0,
-                        "OutputEqPostCursorTargetRx4": 0,
-                        "OutputEqPostCursorTargetRx5": 0,
-                        "OutputEqPostCursorTargetRx6": 0,
-                        "OutputEqPostCursorTargetRx7": 0,
-                        "OutputEqPostCursorTargetRx8": 0
-                    }
-                }
-            }
-        }
-    }
-}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json
new file mode 120000
index 00000000000..32c35c300d5
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/supporting_bulk_counter_groups b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/supporting_bulk_counter_groups
new file mode 100644
index 00000000000..178f0575d04
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/supporting_bulk_counter_groups
@@ -0,0 +1 @@
+QUEUE_WATERMARK_STAT_COUNTER,PG_WATERMARK_STAT_COUNTER,PFC_WD
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers.json.j2
new file mode 120000
index 00000000000..91bf6407d93
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers.json.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_defaults_objects.j2
new file mode 120000
index 00000000000..b799f8c7e01
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_defaults_t0.j2
new file mode 120000
index 00000000000..da6bfd24f4e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..a88d430b206
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_defaults_t1.j2
@@ -0,0 +1,44 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{%-set ports2cable = {
+            'spinerouter_leafrouter' : '2000m',
+            'leafrouter_torrouter' : '300m'
+       }
+-%}
+{% set ingress_lossless_pool_size  =  '48422912' %}
+{% set ingress_lossless_pool_xoff  =   '6098944' %}
+{% set egress_lossless_pool_size   =  '60817392' %}
+{% set egress_lossy_pool_size      =  '48422912' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_dynamic.json.j2
new file mode 120000
index 00000000000..4de460cb275
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/buffers_dynamic.json.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers_dynamic.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/hwsku.json
new file mode 100644
index 00000000000..9d25e434c1c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/hwsku.json
@@ -0,0 +1,268 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet164": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet172": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet180": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet188": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet196": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet204": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet212": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet220": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/media_settings.json
new file mode 120000
index 00000000000..becbe5ec68a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/optics_si_settings.json
new file mode 120000
index 00000000000..a30588ab624
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/pg_profile_lookup.ini
new file mode 100644
index 00000000000..6b40ed3f60d
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/pg_profile_lookup.ini
@@ -0,0 +1,60 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+  10000    5m 19456  19456  16384          0
+  25000    5m 19456  19456  17408          0
+  40000    5m 19456  19456  19456          0
+  50000    5m 19456  19456  21504          0
+ 100000    5m 19456  19456  37888          0
+ 200000    5m 19456  19456  43008          0
+ 400000    5m 38912  38912  73728          0
+  10000   30m 19456  19456  16384          0
+  25000   30m 19456  19456  18432          0
+  40000   30m 19456  19456  21504          0
+  50000   30m 19456  19456  23552          0
+ 100000   30m 19456  19456  43008          0
+ 200000   30m 19456  19456  51200          0
+ 400000   30m 38912  38912  91136          0
+  10000   40m 19456  19456  16384          0
+  25000   40m 19456  19456  18432          0
+  40000   40m 19456  19456  21504          0
+  50000   40m 19456  19456  23552          0
+ 100000   40m 19456  19456  43008          0
+ 200000   40m 19456  19456  51200          0
+ 400000   40m 38912  38912  91136          0
+  10000  300m 19456  19456  19456          0
+  25000  300m 19456  19456  26624          0
+  40000  300m 19456  19456  34816          0
+  50000  300m 19456  19456  40960          0
+ 100000  300m 19456  19456  75776          0
+ 200000  300m 19456  19456  118784         0
+ 400000  300m 38912  38912  225280         0
+  10000 1500m 19456  19456  35840          0
+  25000 1500m 19456  19456  65536          0
+  40000 1500m 19456  19456  96256          0
+  50000 1500m 19456  19456  117760         0
+ 100000 1500m 19456  19456  230400         0
+ 200000 1500m 19456  19456  427008         0
+ 400000 1500m 38912  38912  427008         0
+  10000 2000m 19456  19456  41984          0
+  25000 2000m 19456  19456  80896          0
+  40000 2000m 19456  19456  121856         0
+  50000 2000m 19456  19456  149504         0
+ 100000 2000m 19456  19456  293888         0
+ 200000 2000m 19456  19456  555008         0
+ 400000 2000m 38912  38912  555008         0
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/pmon_daemon_control.json
new file mode 120000
index 00000000000..5f26f0b03a9
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/pmon_daemon_control.json
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/port_config.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/port_config.ini
new file mode 100644
index 00000000000..ab8f4f86d9e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/port_config.ini
@@ -0,0 +1,70 @@
+##
+## Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name         lanes                                  alias     index    speed
+Ethernet0      0,1,2,3                                etp1a     1        100000
+Ethernet4      4,5,6,7                                etp1b     1        100000
+Ethernet8      8,9,10,11                              etp2a     2        100000
+Ethernet12     12,13,14,15                            etp2b     2        100000
+Ethernet16     16,17,18,19                            etp3a     3        100000
+Ethernet20     20,21,22,23                            etp3b     3        100000
+Ethernet24     24,25,26,27                            etp4a     4        100000
+Ethernet28     28,29,30,31                            etp4b     4        100000
+Ethernet32     32,33,34,35                            etp5a     5        100000
+Ethernet36     36,37,38,39                            etp5b     5        100000
+Ethernet40     40,41,42,43                            etp6a     6        100000
+Ethernet44     44,45,46,47                            etp6b     6        100000
+Ethernet48     48,49,50,51                            etp7a     7        100000
+Ethernet52     52,53,54,55                            etp7b     7        100000
+Ethernet56     56,57,58,59                            etp8a     8        100000
+Ethernet60     60,61,62,63                            etp8b     8        100000
+Ethernet64     64,65,66,67                            etp9a     9        100000
+Ethernet68     68,69,70,71                            etp9b     9        100000
+Ethernet72     72,73,74,75                            etp10a    10       100000
+Ethernet76     76,77,78,79                            etp10b    10       100000
+Ethernet80     80,81,82,83                            etp11a    11       100000
+Ethernet84     84,85,86,87                            etp11b    11       100000
+Ethernet88     88,89,90,91                            etp12a    12       100000
+Ethernet92     92,93,94,95                            etp12b    12       100000
+Ethernet96     96,97,98,99,100,101,102,103            etp13     13       400000
+Ethernet104    104,105,106,107,108,109,110,111        etp14     14       400000
+Ethernet112    112,113,114,115,116,117,118,119        etp15     15       400000
+Ethernet120    120,121,122,123,124,125,126,127        etp16     16       400000
+Ethernet128    128,129,130,131,132,133,134,135        etp17     17       400000
+Ethernet136    136,137,138,139,140,141,142,143        etp18     18       400000
+Ethernet144    144,145,146,147,148,149,150,151        etp19     19       400000
+Ethernet152    152,153,154,155,156,157,158,159        etp20     20       400000
+Ethernet160    160,161,162,163                        etp21a    21       100000
+Ethernet164    164,165,166,167                        etp21b    21       100000
+Ethernet168    168,169,170,171                        etp22a    22       100000
+Ethernet172    172,173,174,175                        etp22b    22       100000
+Ethernet176    176,177,178,179                        etp23a    23       100000
+Ethernet180    180,181,182,183                        etp23b    23       100000
+Ethernet184    184,185,186,187                        etp24a    24       100000
+Ethernet188    188,189,190,191                        etp24b    24       100000
+Ethernet192    192,193,194,195                        etp25a    25       100000
+Ethernet196    196,197,198,199                        etp25b    25       100000
+Ethernet200    200,201,202,203                        etp26a    26       100000
+Ethernet204    204,205,206,207                        etp26b    26       100000
+Ethernet208    208,209,210,211                        etp27a    27       100000
+Ethernet212    212,213,214,215                        etp27b    27       100000
+Ethernet216    216,217,218,219                        etp28a    28       100000
+Ethernet220    220,221,222,223                        etp28b    28       100000
+Ethernet224    224,225,226,227,228,229,230,231        etp29     29       400000
+Ethernet232    232,233,234,235,236,237,238,239        etp30     30       400000
+Ethernet240    240,241,242,243,244,245,246,247        etp31     31       400000
+Ethernet248    248,249,250,251,252,253,254,255        etp32     32       400000
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/qos.json.j2
new file mode 120000
index 00000000000..176ba148274
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/qos.json.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/sai.profile
new file mode 120000
index 00000000000..ee409a15104
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/sai.profile
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/sai.profile
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/sai_4280.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/sai_4280.xml
new file mode 120000
index 00000000000..563ede5a0ad
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/sai_4280.xml
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/sai_4280.xml
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers.json.j2
new file mode 100644
index 00000000000..d7db979e450
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers.json.j2
@@ -0,0 +1,19 @@
+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_defaults_objects.j2
new file mode 120000
index 00000000000..09998eb836e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_defaults_t0.j2
new file mode 100644
index 00000000000..7f23938efb2
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_defaults_t0.j2
@@ -0,0 +1,44 @@
+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '5m' %}
+{%-set ports2cable = {
+            'leafrouter_torrouter' : '300m',
+            'torrouter_server' : '5m'
+       }
+-%}
+{% set ingress_lossless_pool_size =  '30416832' %}
+{% set ingress_lossless_pool_xoff  =  '19763136' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '30416832' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..27a33a4a6e2
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_defaults_t1.j2
@@ -0,0 +1,44 @@
+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{%-set ports2cable = {
+            'spinerouter_leafrouter' : '2000m',
+            'leafrouter_torrouter' : '300m'
+       }
+-%}
+{% set ingress_lossless_pool_size =  '46743552' %}
+{% set ingress_lossless_pool_xoff  =  '8781696' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '46743552' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_dynamic.json.j2
new file mode 100644
index 00000000000..3e09d00bc32
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/buffers_dynamic.json.j2
@@ -0,0 +1,20 @@
+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- set dynamic_mode = 'true' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/hwsku.json
new file mode 100644
index 00000000000..1171fd733d2
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/hwsku.json
@@ -0,0 +1,468 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet2": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet6": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet10": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet14": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet18": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet22": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet26": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet30": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet34": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet38": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet42": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet46": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet50": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet54": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet58": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet62": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet66": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet70": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet74": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet78": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet82": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet86": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet90": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet94": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet162": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet164": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet166": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet170": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet172": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet174": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet178": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet180": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet182": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet186": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet188": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet190": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet194": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet196": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet198": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet202": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet204": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet206": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet210": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet212": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet214": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet218": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet220": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3",
+            "autoneg": "off"
+        },
+        "Ethernet222": {
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4",
+            "autoneg": "off"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/media_settings.json
new file mode 120000
index 00000000000..becbe5ec68a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/optics_si_settings.json
new file mode 120000
index 00000000000..a30588ab624
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/pg_profile_lookup.ini
new file mode 120000
index 00000000000..914dcd8b7fa
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/pg_profile_lookup.ini
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/pmon_daemon_control.json
new file mode 120000
index 00000000000..fc7fbfe33ee
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/pmon_daemon_control.json
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/port_config.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/port_config.ini
new file mode 100644
index 00000000000..4ac8bd39699
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/port_config.ini
@@ -0,0 +1,111 @@
+##
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name       lanes                                alias   index  speed
+Ethernet0      0,1                                etp1a     1    100000
+Ethernet2      2,3                                etp1b     1    100000
+Ethernet4      4,5                                etp1c     1    100000
+Ethernet6      6,7                                etp1d     1    100000
+Ethernet8      8,9                                etp2a     2    100000
+Ethernet10     10,11                              etp2b     2    100000
+Ethernet12     12,13                              etp2c     2    100000
+Ethernet14     14,15                              etp2d     2    100000
+Ethernet16     16,17                              etp3a     3    100000
+Ethernet18     18,19                              etp3b     3    100000
+Ethernet20     20,21                              etp3c     3    100000
+Ethernet22     22,23                              etp3d     3    100000
+Ethernet24     24,25                              etp4a     4    100000
+Ethernet26     26,27                              etp4b     4    100000
+Ethernet28     28,29                              etp4c     4    100000
+Ethernet30     30,31                              etp4d     4    100000
+Ethernet32     32,33                              etp5a     5    100000
+Ethernet34     34,35                              etp5b     5    100000
+Ethernet36     36,37                              etp5c     5    100000
+Ethernet38     38,39                              etp5d     5    100000
+Ethernet40     40,41                              etp6a     6    100000
+Ethernet42     42,43                              etp6b     6    100000
+Ethernet44     44,45                              etp6c     6    100000
+Ethernet46     46,47                              etp6d     6    100000
+Ethernet48     48,49                              etp7a     7    100000
+Ethernet50     50,51                              etp7b     7    100000
+Ethernet52     52,53                              etp7c     7    100000
+Ethernet54     54,55                              etp7d     7    100000
+Ethernet56     56,57                              etp8a     8    100000
+Ethernet58     58,59                              etp8b     8    100000
+Ethernet60     60,61                              etp8c     8    100000
+Ethernet62     62,63                              etp8d     8    100000
+Ethernet64     64,65                              etp9a     9    100000
+Ethernet66     66,67                              etp9b     9    100000
+Ethernet68     68,69                              etp9c     9    100000
+Ethernet70     70,71                              etp9d     9    100000
+Ethernet72     72,73                              etp10a   10    100000
+Ethernet74     74,75                              etp10b   10    100000
+Ethernet76     76,77                              etp10c   10    100000
+Ethernet78     78,79                              etp10d   10    100000
+Ethernet80     80,81                              etp11a   11    100000
+Ethernet82     82,83                              etp11b   11    100000
+Ethernet84     84,85                              etp11c   11    100000
+Ethernet86     86,87                              etp11d   11    100000
+Ethernet88     88,89                              etp12a   12    100000
+Ethernet90     90,91                              etp12b   12    100000
+Ethernet92     92,93                              etp12c   12    100000
+Ethernet94     94,95                              etp12d   12    100000
+Ethernet96     96,97,98,99,100,101,102,103        etp13    13    400000
+Ethernet104    104,105,106,107,108,109,110,111    etp14    14    400000
+Ethernet112    112,113,114,115,116,117,118,119    etp15    15    400000
+Ethernet120    120,121,122,123,124,125,126,127    etp16    16    400000
+Ethernet128    128,129,130,131,132,133,134,135    etp17    17    400000
+Ethernet136    136,137,138,139,140,141,142,143    etp18    18    400000
+Ethernet144    144,145,146,147,148,149,150,151    etp19    19    400000
+Ethernet152    152,153,154,155,156,157,158,159    etp20    20    400000
+Ethernet160    160,161                            etp21a   21    100000
+Ethernet162    162,163                            etp21b   21    100000
+Ethernet164    164,165                            etp21c   21    100000
+Ethernet166    166,167                            etp21d   21    100000
+Ethernet168    168,169                            etp22a   22    100000
+Ethernet170    170,171                            etp22b   22    100000
+Ethernet172    172,173                            etp22c   22    100000
+Ethernet174    174,175                            etp22d   22    100000
+Ethernet176    176,177                            etp23a   23    100000
+Ethernet178    178,179                            etp23b   23    100000
+Ethernet180    180,181                            etp23c   23    100000
+Ethernet182    182,183                            etp23d   23    100000
+Ethernet184    184,185                            etp24a   24    100000
+Ethernet186    186,187                            etp24b   24    100000
+Ethernet188    188,189                            etp24c   24    100000
+Ethernet190    190,191                            etp24d   24    100000
+Ethernet192    192,193                            etp25a   25    100000
+Ethernet194    194,195                            etp25b   25    100000
+Ethernet196    196,197                            etp25c   25    100000
+Ethernet198    198,199                            etp25d   25    100000
+Ethernet200    200,201                            etp26a   26    100000
+Ethernet202    202,203                            etp26b   26    100000
+Ethernet204    204,205                            etp26c   26    100000
+Ethernet206    206,207                            etp26d   26    100000
+Ethernet208    208,209                            etp27a   27    100000
+Ethernet210    210,211                            etp27b   27    100000
+Ethernet212    212,213                            etp27c   27    100000
+Ethernet214    214,215                            etp27d   27    100000
+Ethernet216    216,217                            etp28a   28    100000
+Ethernet218    218,219                            etp28b   28    100000
+Ethernet220    220,221                            etp28c   28    100000
+Ethernet222    222,223                            etp28d   28    100000
+Ethernet224    224,225,226,227,228,229,230,231    etp29    29    400000
+Ethernet232    232,233,234,235,236,237,238,239    etp30    30    400000
+Ethernet240    240,241,242,243,244,245,246,247    etp31    31    400000
+Ethernet248    248,249,250,251,252,253,254,255    etp32    32    400000
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/qos.json.j2
new file mode 120000
index 00000000000..176ba148274
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/qos.json.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/sai.profile
new file mode 100644
index 00000000000..2ace73db8fd
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/sai.profile
@@ -0,0 +1,4 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4280_8x400g_80x100g.xml
+SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_INDEPENDENT_MODULE_MODE=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/sai_4280_8x400g_80x100g.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/sai_4280_8x400g_80x100g.xml
new file mode 100644
index 00000000000..246f66cb27b
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/sai_4280_8x400g_80x100g.xml
@@ -0,0 +1,266 @@
+<?xml version="1.0"?>
+<!--
+  SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+  Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+<root>
+    <platform_info type="4280">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:77:66:55:44:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>1</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>32</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>13</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>0</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 4096 - 200Gb -->
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>17</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>7</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>2</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2
new file mode 120000
index 00000000000..91bf6407d93
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers.json.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2
new file mode 120000
index 00000000000..b799f8c7e01
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2
new file mode 120000
index 00000000000..da6bfd24f4e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..c0792d56518
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_defaults_t1.j2
@@ -0,0 +1,38 @@
+{#
+    Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{% set ingress_lossless_pool_size  =  '48013312' %}
+{% set ingress_lossless_pool_xoff  =   '6508544' %}
+{% set egress_lossless_pool_size   =  '60817392' %}
+{% set egress_lossy_pool_size      =  '48013312' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2
new file mode 120000
index 00000000000..4de460cb275
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/buffers_dynamic.json.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/buffers_dynamic.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/hwsku.json
new file mode 100644
index 00000000000..898cd281a40
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/hwsku.json
@@ -0,0 +1,268 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet164": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet172": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet180": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet188": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet196": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet204": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet212": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet220": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role"   : "Dpc"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json
new file mode 120000
index 00000000000..becbe5ec68a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json
new file mode 120000
index 00000000000..a30588ab624
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pg_profile_lookup.ini
new file mode 100644
index 00000000000..6b40ed3f60d
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pg_profile_lookup.ini
@@ -0,0 +1,60 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+  10000    5m 19456  19456  16384          0
+  25000    5m 19456  19456  17408          0
+  40000    5m 19456  19456  19456          0
+  50000    5m 19456  19456  21504          0
+ 100000    5m 19456  19456  37888          0
+ 200000    5m 19456  19456  43008          0
+ 400000    5m 38912  38912  73728          0
+  10000   30m 19456  19456  16384          0
+  25000   30m 19456  19456  18432          0
+  40000   30m 19456  19456  21504          0
+  50000   30m 19456  19456  23552          0
+ 100000   30m 19456  19456  43008          0
+ 200000   30m 19456  19456  51200          0
+ 400000   30m 38912  38912  91136          0
+  10000   40m 19456  19456  16384          0
+  25000   40m 19456  19456  18432          0
+  40000   40m 19456  19456  21504          0
+  50000   40m 19456  19456  23552          0
+ 100000   40m 19456  19456  43008          0
+ 200000   40m 19456  19456  51200          0
+ 400000   40m 38912  38912  91136          0
+  10000  300m 19456  19456  19456          0
+  25000  300m 19456  19456  26624          0
+  40000  300m 19456  19456  34816          0
+  50000  300m 19456  19456  40960          0
+ 100000  300m 19456  19456  75776          0
+ 200000  300m 19456  19456  118784         0
+ 400000  300m 38912  38912  225280         0
+  10000 1500m 19456  19456  35840          0
+  25000 1500m 19456  19456  65536          0
+  40000 1500m 19456  19456  96256          0
+  50000 1500m 19456  19456  117760         0
+ 100000 1500m 19456  19456  230400         0
+ 200000 1500m 19456  19456  427008         0
+ 400000 1500m 38912  38912  427008         0
+  10000 2000m 19456  19456  41984          0
+  25000 2000m 19456  19456  80896          0
+  40000 2000m 19456  19456  121856         0
+  50000 2000m 19456  19456  149504         0
+ 100000 2000m 19456  19456  293888         0
+ 200000 2000m 19456  19456  555008         0
+ 400000 2000m 38912  38912  555008         0
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json
new file mode 120000
index 00000000000..fc7fbfe33ee
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/pmon_daemon_control.json
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/port_config.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/port_config.ini
new file mode 100644
index 00000000000..f22f59516b2
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/port_config.ini
@@ -0,0 +1,70 @@
+##
+## Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name         lanes                                  alias     index    speed
+Ethernet0      0,1,2,3                                etp1a     1        200000
+Ethernet4      4,5,6,7                                etp1b     1        200000
+Ethernet8      8,9,10,11                              etp2a     2        200000
+Ethernet12     12,13,14,15                            etp2b     2        200000
+Ethernet16     16,17,18,19                            etp3a     3        200000
+Ethernet20     20,21,22,23                            etp3b     3        200000
+Ethernet24     24,25,26,27                            etp4a     4        200000
+Ethernet28     28,29,30,31                            etp4b     4        200000
+Ethernet32     32,33,34,35                            etp5a     5        200000
+Ethernet36     36,37,38,39                            etp5b     5        200000
+Ethernet40     40,41,42,43                            etp6a     6        200000
+Ethernet44     44,45,46,47                            etp6b     6        200000
+Ethernet48     48,49,50,51                            etp7a     7        200000
+Ethernet52     52,53,54,55                            etp7b     7        200000
+Ethernet56     56,57,58,59                            etp8a     8        200000
+Ethernet60     60,61,62,63                            etp8b     8        200000
+Ethernet64     64,65,66,67                            etp9a     9        200000
+Ethernet68     68,69,70,71                            etp9b     9        200000
+Ethernet72     72,73,74,75                            etp10a    10       200000
+Ethernet76     76,77,78,79                            etp10b    10       200000
+Ethernet80     80,81,82,83                            etp11a    11       200000
+Ethernet84     84,85,86,87                            etp11b    11       200000
+Ethernet88     88,89,90,91                            etp12a    12       200000
+Ethernet92     92,93,94,95                            etp12b    12       200000
+Ethernet96     96,97,98,99,100,101,102,103            etp13     13       400000
+Ethernet104    104,105,106,107,108,109,110,111        etp14     14       400000
+Ethernet112    112,113,114,115,116,117,118,119        etp15     15       400000
+Ethernet120    120,121,122,123,124,125,126,127        etp16     16       400000
+Ethernet128    128,129,130,131,132,133,134,135        etp17     17       400000
+Ethernet136    136,137,138,139,140,141,142,143        etp18     18       400000
+Ethernet144    144,145,146,147,148,149,150,151        etp19     19       400000
+Ethernet152    152,153,154,155,156,157,158,159        etp20     20       400000
+Ethernet160    160,161,162,163                        etp21a    21       200000
+Ethernet164    164,165,166,167                        etp21b    21       200000
+Ethernet168    168,169,170,171                        etp22a    22       200000
+Ethernet172    172,173,174,175                        etp22b    22       200000
+Ethernet176    176,177,178,179                        etp23a    23       200000
+Ethernet180    180,181,182,183                        etp23b    23       200000
+Ethernet184    184,185,186,187                        etp24a    24       200000
+Ethernet188    188,189,190,191                        etp24b    24       200000
+Ethernet192    192,193,194,195                        etp25a    25       200000
+Ethernet196    196,197,198,199                        etp25b    25       200000
+Ethernet200    200,201,202,203                        etp26a    26       200000
+Ethernet204    204,205,206,207                        etp26b    26       200000
+Ethernet208    208,209,210,211                        etp27a    27       200000
+Ethernet212    212,213,214,215                        etp27b    27       200000
+Ethernet216    216,217,218,219                        etp28a    28       200000
+Ethernet220    220,221,222,223                        etp28b    28       200000
+Ethernet224    224,225,226,227,228,229,230,231        etp29     29       400000
+Ethernet232    232,233,234,235,236,237,238,239        etp30     30       400000
+Ethernet240    240,241,242,243,244,245,246,247        etp31     31       400000
+Ethernet248    248,249,250,251,252,253,254,255        etp32     32       400000
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2
new file mode 120000
index 00000000000..176ba148274
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/qos.json.j2
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile
new file mode 120000
index 00000000000..ee409a15104
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai.profile
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/sai.profile
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml
new file mode 120000
index 00000000000..563ede5a0ad
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/sai_4280.xml
@@ -0,0 +1 @@
+../Mellanox-SN4280-O28/sai_4280.xml
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
index 776e1f6aa4d..c8322e67b15 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq module_blacklist=mlx5_ib,mlx5_core ima_hash=sha384 amd_iommu=off cpufreq.default_governor=performance"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq ima_hash=sha384 amd_iommu=off cpufreq.default_governor=performance"
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU0.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU0.conf
new file mode 100644
index 00000000000..6d093c56d00
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU0.conf
@@ -0,0 +1,30 @@
+bus "i2c-18" "i2c-1-mux (chan_id 17)"
+    chip "mp2975-i2c-18-69"
+        ignore in1 
+        ignore in2 
+        ignore in3 
+        ignore temp1 
+        ignore power1 
+        ignore power2 
+        ignore power3 
+        ignore curr1 
+        ignore curr2 
+        ignore curr3 
+        ignore curr4
+        ignore curr5
+        ignore curr6
+
+    chip "mp2975-i2c-18-6A"
+        ignore in1 
+        ignore in2 
+        ignore temp1 
+        ignore power1 
+        ignore power2
+        ignore curr1 
+        ignore curr2 
+        ignore curr5
+
+    chip "tmp421-i2c-18-1F"
+        ignore temp1 
+        ignore temp2
+        ignore curr6
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU1.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU1.conf
new file mode 100644
index 00000000000..096cbae4c48
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU1.conf
@@ -0,0 +1,30 @@
+bus "i2c-19" "i2c-1-mux (chan_id 18)"
+    chip "mp2975-i2c-19-69"
+        ignore in1 
+        ignore in2 
+        ignore in3 
+        ignore temp1 
+        ignore power1 
+        ignore power2 
+        ignore power3 
+        ignore curr1 
+        ignore curr2 
+        ignore curr3 
+        ignore curr4
+        ignore curr5
+        ignore curr6
+
+    chip "mp2975-i2c-19-6A"
+        ignore in1 
+        ignore in2 
+        ignore temp1 
+        ignore power1 
+        ignore power2
+        ignore curr1 
+        ignore curr2 
+        ignore curr5
+
+    chip "tmp421-i2c-19-1F"
+        ignore temp1 
+        ignore temp2
+        ignore curr6
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU2.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU2.conf
new file mode 100644
index 00000000000..ba21c0675fc
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU2.conf
@@ -0,0 +1,30 @@
+bus "i2c-20" "i2c-1-mux (chan_id 19)"
+    chip "mp2975-i2c-20-69"
+        ignore in1 
+        ignore in2 
+        ignore in3 
+        ignore temp1 
+        ignore power1 
+        ignore power2 
+        ignore power3 
+        ignore curr1 
+        ignore curr2 
+        ignore curr3 
+        ignore curr4
+        ignore curr5
+        ignore curr6
+
+    chip "mp2975-i2c-20-6A"
+        ignore in1 
+        ignore in2 
+        ignore temp1 
+        ignore power1 
+        ignore power2
+        ignore curr1 
+        ignore curr2 
+        ignore curr5
+
+    chip "tmp421-i2c-20-1F"
+        ignore temp1 
+        ignore temp2
+        ignore curr6
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU3.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU3.conf
new file mode 100644
index 00000000000..debd18340a1
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU3.conf
@@ -0,0 +1,30 @@
+bus "i2c-21" "i2c-1-mux (chan_id 20)"
+    chip "mp2975-i2c-21-69"
+        ignore in1 
+        ignore in2 
+        ignore in3 
+        ignore temp1 
+        ignore power1 
+        ignore power2 
+        ignore power3 
+        ignore curr1 
+        ignore curr2 
+        ignore curr3 
+        ignore curr4
+        ignore curr5
+        ignore curr6
+
+    chip "mp2975-i2c-21-6A"
+        ignore in1 
+        ignore in2 
+        ignore temp1 
+        ignore power1 
+        ignore power2
+        ignore curr1 
+        ignore curr2 
+        ignore curr5
+
+    chip "tmp421-i2c-21-1F"
+        ignore temp1 
+        ignore temp2
+        ignore curr6
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
index 4c7889b3fdc..e05e96feff1 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
@@ -1,7 +1,7 @@
 ##
 ## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
-## Apache-2.0
+## Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## SPDX-License-Identifier: Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
 ## you may not use this file except in compliance with the License.
@@ -230,17 +230,64 @@
   id: '1467'
   name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
     Data Fabric: Device 18h; Function 7'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: a2dc
+  name: 'Ethernet controller: Mellanox Technologies MT43244 BlueField-3 integrated
+    ConnectX-7 network controller (rev 01)'
+- bus: '01'
+  dev: '00'
+  fn: '1'
+  id: c2d5
+  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
+    Interface (rev 01)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: a2dc
+  name: 'Ethernet controller: Mellanox Technologies MT43244 BlueField-3 integrated
+    ConnectX-7 network controller (rev 01)'
+- bus: '02'
+  dev: '00'
+  fn: '1'
+  id: c2d5
+  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
+    Interface (rev 01)'
 - bus: '03'
   dev: '00'
   fn: '0'
   id: '5765'
-  name: 'Non-Volatile memory controller: Realtek Semiconductor Co., Ltd. RTS5765DL
-    NVMe SSD Controller (DRAM-less) (rev 01)'
+  name: 'Non-Volatile memory controller: Device 1f9f:5765 (rev 01)'
 - bus: '06'
   dev: '00'
   fn: '0'
   id: cf70
   name: 'Ethernet controller: Mellanox Technologies Spectrum-3'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: a2dc
+  name: 'Ethernet controller: Mellanox Technologies MT43244 BlueField-3 integrated
+    ConnectX-7 network controller (rev 01)'
+- bus: '07'
+  dev: '00'
+  fn: '1'
+  id: c2d5
+  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
+    Interface (rev 01)'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: a2dc
+  name: 'Ethernet controller: Mellanox Technologies MT43244 BlueField-3 integrated
+    ConnectX-7 network controller (rev 01)'
+- bus: 08
+  dev: '00'
+  fn: '1'
+  id: c2d5
+  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
+    Interface (rev 01)'
 - bus: 09
   dev: '00'
   fn: '0'
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
index c9370bd6d7f..b7cd3c881f0 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
@@ -658,6 +658,7 @@
                 "baud-rate": "115200"
             },
             "rshim_info": "rshim0",
+            "rshim_bus_info": "0000:08:00.1",
             "bus_info": "0000:08:00.0"
         },
         "dpu1": {
@@ -670,6 +671,7 @@
                 "baud-rate": "115200"
             },
             "rshim_info": "rshim1",
+            "rshim_bus_info": "0000:07:00.1",
             "bus_info": "0000:07:00.0"
         },
         "dpu2": {
@@ -682,6 +684,7 @@
                 "baud-rate": "115200"
             },
             "rshim_info": "rshim2",
+            "rshim_bus_info": "0000:01:00.1",
             "bus_info": "0000:01:00.0"
         },
         "dpu3": {
@@ -694,6 +697,7 @@
                 "baud-rate": "115200"
             },
             "rshim_info": "rshim3",
+            "rshim_bus_info": "0000:02:00.1",
             "bus_info": "0000:02:00.0"
         }
     }
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
index 4e607aaa0fb..7097f339653 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
@@ -1,8 +1,10 @@
-###########################################################################
-# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+##################################################################################
+# Copyright (c) 2024 - 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 #
 # Platform specific sensors config for SN4280
-###########################################################################
+##################################################################################
+
+# Hardware revision default
 
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
@@ -441,7 +443,7 @@ bus "i2c-21" "i2c-1-mux (chan_id 20)"
         ignore curr4
     chip "xdpe12284-i2c-21-6A"
         label in1 "PMIC-13 12V DPU4 VDD_CPU (in1)"
-        label in2 "PMIC-13 DPU4 VDD_CPU (out)"
+        label in2 "PMIC-13 DPU4 VDD_CPU (out)" 
         ignore in3 
         ignore in4 
         label temp1 "PMIC-13 DPU4 VDD_CPU Temp 1"
@@ -456,7 +458,7 @@ bus "i2c-21" "i2c-1-mux (chan_id 20)"
         ignore curr4
     chip "mp2975-i2c-21-6A"
         label in1 "PMIC-13 12V DPU4 VDD_CPU (in1)"
-        label in2 "PMIC-13 DPU4 VDD_CPU (out)"
+        label in2 "PMIC-13 DPU4 VDD_CPU (out)" 
         ignore in3 
         ignore in4 
         label temp1 "PMIC-13 DPU4 VDD_CPU Temp 1"
@@ -561,5 +563,5 @@ chip "nvme-pci-*"
     ignore temp2
     ignore temp3
 
-chip "00000a00400-mdio-*"
-   label temp1 "PHY TEMP"
\ No newline at end of file
+chip "*-mdio-*"
+   ignore temp1
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
deleted file mode 100644
index a9030b0901f..00000000000
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
+++ /dev/null
@@ -1 +0,0 @@
-dpuctl.service
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2
index 06f6352eff5..5e4be75b823 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2
@@ -22,10 +22,10 @@
             'spinerouter_leafrouter' : '0m'
        }
 -%}
-{% set ingress_lossless_pool_size =  '144189440' %}
+{% set ingress_lossless_pool_size =  '144129024' %}
 {% set ingress_lossless_pool_xoff =  '0' %}
 {% set egress_lossless_pool_size =  '158229504' %}
-{% set egress_lossy_pool_size =  '144189440' %}
+{% set egress_lossy_pool_size =  '144129024' %}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2
index 06f6352eff5..5e4be75b823 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2
@@ -22,10 +22,10 @@
             'spinerouter_leafrouter' : '0m'
        }
 -%}
-{% set ingress_lossless_pool_size =  '144189440' %}
+{% set ingress_lossless_pool_size =  '144129024' %}
 {% set ingress_lossless_pool_xoff =  '0' %}
 {% set egress_lossless_pool_size =  '158229504' %}
-{% set egress_lossy_pool_size =  '144189440' %}
+{% set egress_lossy_pool_size =  '144129024' %}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile
index 271c8cf70fd..c27ec9fdaff 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile
@@ -2,3 +2,4 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x100g.xml
 SAI_INDEPENDENT_MODULE_MODE=1
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
 SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
+SAI_KEY_DISABLE_PORT_ALPHA=1
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/traffic_config.j2
new file mode 120000
index 00000000000..71760a2a064
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/traffic_config.j2
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/traffic_config.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2
index b0400cbccf2..437fc899a88 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2
@@ -16,6 +16,59 @@
     limitations under the License.
 #}
 
+{% import 'traffic_config.j2' as traffic_config %}
+
+{%- set PORT_ALL = [] %}
+{%- set PORT_ACTIVE = [] %}
+{%- set PORT_UPLINK = [] %}
+{%- set PORT_DOWNLINK = [] %}
+
+{# Initialize PORT_ALL and PORT_ACTIVE #}
+{%- for port in PORT %}
+    {%- if not port.startswith('Ethernet-Rec') and not port.startswith('Ethernet-IB') %}
+        {%- if PORT_ALL.append(port) %}{% endif %}
+    {%- endif %}
+{%- endfor %}
+
+{%- if DEVICE_NEIGHBOR is not defined %}
+    {%- set PORT_ACTIVE = PORT_ALL %}
+{%- else %}
+    {%- for port in DEVICE_NEIGHBOR.keys() %}
+        {%- if PORT_ACTIVE.append(port) %}{%- endif %}
+    {%- endfor %}
+{%- endif %}
+
+{# Generate uplink and downlink port lists based on router type and neighbors #}
+{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined %}
+    {%- if 'type' in DEVICE_METADATA['localhost'] and DEVICE_NEIGHBOR is defined %}
+        {%- set local_router_type = DEVICE_METADATA['localhost']['type'] %}
+        {%- for port in PORT_ACTIVE %}
+            {%- if DEVICE_NEIGHBOR.get(port) and DEVICE_NEIGHBOR[port].name is defined and DEVICE_NEIGHBOR_METADATA is defined and DEVICE_NEIGHBOR[port].name in DEVICE_NEIGHBOR_METADATA %}
+                {%- set neighbor_info = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name] %}
+                {%- if 'LeafRouter' in local_router_type %}
+                    {%- if 'ToRRouter' in neighbor_info.type %}
+                        {%- if PORT_DOWNLINK.append(port) %}{%- endif %}
+                    {%- elif 'SpineRouter' in neighbor_info.type %}
+                        {%- if PORT_UPLINK.append(port) %}{%- endif %}
+                    {%- endif %}
+                {%- elif 'ToRRouter' in local_router_type %}
+                    {%- if 'LeafRouter' in neighbor_info.type %}
+                        {%- if PORT_UPLINK.append(port) %}{%- endif %}
+                    {%- else %}
+                        {%- if PORT_DOWNLINK.append(port) %}{%- endif %}
+                    {%- endif %}
+                {%- endif %}
+            {%- else %}
+                {%- if PORT_DOWNLINK.append(port) %}{%- endif %}
+            {%- endif %}
+        {%- endfor %}
+    {%- else %}
+        {%- for port in PORT_ACTIVE %}
+            {%- if PORT_DOWNLINK.append(port) %}{%- endif %}
+        {%- endfor %}
+    {%- endif %}
+{%- endif %}
+
 {%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
     "BUFFER_POOL": {
         {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%}
@@ -57,11 +110,6 @@
           "size":"0",
           "dynamic_th":"-8"
         },
-        "egress_lossless_zero_profile" : {
-          "pool":"egress_lossless_pool",
-          "size":"0",
-          "dynamic_th":"-8"
-        },
         "egress_lossy_zero_profile" : {
           "pool":"egress_lossy_pool",
           "size":"0",
@@ -71,11 +119,6 @@
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"3"
-        },
-        "egress_lossless_profile": {
-            "pool":"egress_lossless_pool",
-            "size":"0",
             "dynamic_th":"7"
         },
         "egress_lossy_profile": {
@@ -83,20 +126,93 @@
             "size":"9216",
             "dynamic_th":"7"
         },
-        "q_lossy_profile": {
-            "pool":"egress_lossy_pool",
-            "size":"0",
-            "dynamic_th":"0"
+        "queue0_downlink_lossy_profile": {
+            "dynamic_th": "0",
+            "size": "0",
+            "pool": "egress_lossy_pool"
+        },
+        "queue1_downlink_lossy_profile": {
+            {% if traffic_config.traffic_classification_enable %}
+            "packet_discard_action": "drop",
+            {% endif %}
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "-7"
+        },
+        "queue2_downlink_lossy_profile": {
+            {% if traffic_config.traffic_classification_enable %}
+            "packet_discard_action": "drop",
+            {% endif %}
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "-7"
+        },
+        "queue3_downlink_lossy_profile": {
+            {% if traffic_config.traffic_classification_enable %}
+            "packet_discard_action": "drop",
+            {% endif %}
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "-7"
+        },
+        "queue4_downlink_lossy_profile": {
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "0"
+        },
+        "queue5_downlink_lossy_profile": {
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "-3"
+        },
+        "queue6_downlink_lossy_profile": {
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "0"
+        },
+        "queue0_uplink_lossy_profile": {
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "0"
+        },
+        "queue1_uplink_lossy_profile": {
+            {% if traffic_config.traffic_classification_enable %}
+            "packet_discard_action": "drop",
+            {% endif %}
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "-7"
         },
-        "q_lossy_minus_7_profile": {
+        "queue2_uplink_lossy_profile": {
+            {% if traffic_config.traffic_classification_enable %}
+            "packet_discard_action": "drop",
+            {% endif %}
             "pool": "egress_lossy_pool",
             "size": "0",
-            "dynamic_th" : "-7"
+            "dynamic_th": "-7"
         },
-        "q_lossy_minus_3_profile": {
+        "queue3_uplink_lossy_profile": {
+            {% if traffic_config.traffic_classification_enable %}
+            "packet_discard_action": "drop",
+            {% endif %}
             "pool": "egress_lossy_pool",
             "size": "0",
-            "dynamic_th" : "-3"
+            "dynamic_th": "-7"
+        },
+        "queue4_uplink_lossy_profile": {
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "0"
+        },
+        "queue5_uplink_lossy_profile": {
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "-3"
+        },
+        "queue6_uplink_lossy_profile": {
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "0"
         }
     },
 {%- endmacro %}
@@ -126,7 +242,7 @@
     "BUFFER_PORT_EGRESS_PROFILE_LIST": {
 {% for port in port_names_active.split(',') %}
         "{{ port }}": {
-            "profile_list" : "egress_lossless_profile,egress_lossy_profile"
+            "profile_list" : "egress_lossy_profile"
         }{% if not loop.last %},{% endif %}
 
 {% endfor %}
@@ -135,9 +251,9 @@
 {% for port in port_names_inactive.split(',') %}
         "{{ port }}": {
 {% if dynamic_mode is defined %}
-            "profile_list" : "egress_lossless_profile,egress_lossy_profile"
+            "profile_list" : "egress_lossy_profile"
 {% else %}
-            "profile_list" : "egress_lossless_zero_profile,egress_lossy_zero_profile"
+            "profile_list" : "egress_lossy_zero_profile"
 {% endif %}
         }{% if not loop.last %},{% endif %}
 
@@ -148,40 +264,63 @@
 
 {%- macro generate_queue_buffers(port_names_active, port_names_inactive) %}
     "BUFFER_QUEUE": {
-{% if dynamic_mode is not defined %}
 {% for port in port_names_active.split(',') %}
+    {%- set port_type = 'uplink' if port in PORT_UPLINK else 'downlink' %}
         "{{ port }}|0": {
-            "profile" : "q_lossy_profile"
+            "profile" : "queue0_{{ port_type }}_lossy_profile"
         },
-{% endfor %}
-{% for port in port_names_active.split(',') %}
-        "{{ port }}|1-3": {
-            "profile" : "q_lossy_minus_7_profile"
+        "{{ port }}|1": {
+            "profile" : "queue1_{{ port_type }}_lossy_profile"
+        },
+        "{{ port }}|2": {
+            "profile" : "queue2_{{ port_type }}_lossy_profile"
+        },
+        "{{ port }}|3": {
+            "profile" : "queue3_{{ port_type }}_lossy_profile"
         },
-{% endfor %}
-{% for port in port_names_active.split(',') %}
         "{{ port }}|4": {
-            "profile" : "q_lossy_profile"
+            "profile" : "queue4_{{ port_type }}_lossy_profile"
         },
-{% endfor %}
-{% for port in port_names_active.split(',') %}
         "{{ port }}|5": {
-            "profile" : "q_lossy_minus_3_profile"
+            "profile" : "queue5_{{ port_type }}_lossy_profile"
         },
-{% endfor %}
-{% for port in port_names_active.split(',') %}
         "{{ port }}|6": {
-            "profile" : "q_lossy_profile"
+            "profile" : "queue6_{{ port_type }}_lossy_profile"
         }{% if not loop.last %},{% endif %}
-
 {% endfor %}
 {% if port_names_inactive|length > 0 %}
+{% if dynamic_mode is defined %}
+{% if port_names_active.split(',')|length > 0 %},{% endif %}
 {% for port in port_names_inactive.split(',') %}
-       {%- if loop.first -%},{%- endif -%}
-        "{{ port }}|1-6": {
+    {%- set port_type = 'uplink' if port in PORT_UPLINK else 'downlink' %}
+        "{{ port }}|0": {
+            "profile" : "queue0_{{ port_type }}_lossy_profile"
+        },
+        "{{ port }}|1": {
+            "profile" : "queue1_{{ port_type }}_lossy_profile"
+        },
+        "{{ port }}|2": {
+            "profile" : "queue2_{{ port_type }}_lossy_profile"
+        },
+        "{{ port }}|3": {
+            "profile" : "queue3_{{ port_type }}_lossy_profile"
+        },
+        "{{ port }}|4": {
+            "profile" : "queue4_{{ port_type }}_lossy_profile"
+        },
+        "{{ port }}|5": {
+            "profile" : "queue5_{{ port_type }}_lossy_profile"
+        },
+        "{{ port }}|6": {
+            "profile" : "queue6_{{ port_type }}_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+{% endfor %}
+{% else %}
+{% if port_names_active.split(',')|length > 0 %},{% endif %}
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}|0-6": {
             "profile" : "egress_lossy_zero_profile"
         }{% if not loop.last %},{% endif %}
-
 {% endfor %}
 {% endif %}
 {% endif %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2
index 54d93665331..a2390d76524 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2
@@ -22,10 +22,10 @@
             'spinerouter_leafrouter' : '0m'
        }
 -%}
-{% set ingress_lossless_pool_size =  '142704640' %}
+{% set ingress_lossless_pool_size =  '142703616' %}
 {% set ingress_lossless_pool_xoff =  '0' %}
 {% set egress_lossless_pool_size =  '158229504' %}
-{% set egress_lossy_pool_size =  '142704640' %}
+{% set egress_lossy_pool_size =  '142703616' %}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2
index 54d93665331..a2390d76524 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2
@@ -22,10 +22,10 @@
             'spinerouter_leafrouter' : '0m'
        }
 -%}
-{% set ingress_lossless_pool_size =  '142704640' %}
+{% set ingress_lossless_pool_size =  '142703616' %}
 {% set ingress_lossless_pool_xoff =  '0' %}
 {% set egress_lossless_pool_size =  '158229504' %}
-{% set egress_lossy_pool_size =  '142704640' %}
+{% set egress_lossy_pool_size =  '142703616' %}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2
index e9f6868a40d..a33798d4c7f 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2
@@ -13,6 +13,8 @@
     limitations under the License.
 #}
 
+{% import 'traffic_config.j2' as traffic_config %}
+
 {%- macro generate_dscp_to_tc_map_per_sku() -%}
     "DSCP_TO_TC_MAP": {
         "AZURE": {
@@ -47,26 +49,26 @@
             "28": "4",
             "29": "4",
             "30": "4",
-            "31": "5",
-            "32": "5",
-            "33": "5",
-            "34": "5",
-            "35": "5",
-            "36": "5",
-            "37": "5",
-            "38": "5",
-            "39": "5",
-            "40": "5",
-            "41": "0",
-            "42": "0",
-            "43": "0",
-            "44": "0",
-            "45": "0",
-            "46": "0",
-            "47": "0",
-            "48": "0",
-            "49": "0",
-            "50": "0",
+            "31": "4",
+            "32": "4",
+            "33": "4",
+            "34": "4",
+            "35": "4",
+            "36": "4",
+            "37": "4",
+            "38": "4",
+            "39": "4",
+            "40": "4",
+            "41": "5",
+            "42": "5",
+            "43": "5",
+            "44": "5",
+            "45": "5",
+            "46": "5",
+            "47": "5",
+            "48": "5",
+            "49": "5",
+            "50": "5",
             "51": "0",
             "52": "0",
             "53": "0",
@@ -100,47 +102,92 @@
 
 {%- macro generate_scheduler_per_sku() -%}
     "SCHEDULER": {
-        "scheduler.4": {
-            "type"  : "DWRR",
+        "scheduler_q0_downlink": {
+            "type": "DWRR",
             "weight": "4"
         },
-        "scheduler.8": {
-            "type"  : "DWRR",
+        "scheduler_q1_downlink": {
+            "type": "DWRR",
             "weight": "8"
         },
-        "scheduler.18": {
-            "type"  : "DWRR",
+        "scheduler_q2_downlink": {
+            "type": "DWRR",
             "weight": "18"
         },
-        "scheduler.22": {
-            "type"  : "DWRR",
+        "scheduler_q3_downlink": {
+            "type": "DWRR",
             "weight": "22"
-        }
-    },
-{%- endmacro -%}
-
-{%- macro generate_single_queue_per_sku(port) -%}
-        "{{ port }}|0": {
-            "scheduler": "scheduler.4"
         },
-        "{{ port }}|1": {
-            "scheduler": "scheduler.8"
+        "scheduler_q4_downlink": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_q5_downlink": {
+            "type": "DWRR",
+            "weight": "22"
+        },
+        "scheduler_q6_downlink": {
+            "type": "DWRR",
+            "weight": "4"
+        },
+        "scheduler_q0_uplink": {
+            "type": "DWRR",
+            "weight": "4"
+        },
+        "scheduler_q1_uplink": {
+            "type": "DWRR",
+            "weight": "8"
         },
-        "{{ port }}|2": {
-            "scheduler": "scheduler.18"
+        "scheduler_q2_uplink": {
+            "type": "DWRR",
+            "weight": "18"
         },
-        "{{ port }}|3": {
-            "scheduler": "scheduler.22"
+        "scheduler_q3_uplink": {
+            "type": "DWRR",
+            "weight": "22"
         },
-        "{{ port }}|4": {
-            "scheduler": "scheduler.22"
+        "scheduler_q4_uplink": {
+            "type": "DWRR",
+            "weight": "22"
         },
-        "{{ port }}|5": {
-            "scheduler": "scheduler.22"
+        "scheduler_q5_uplink": {
+            "type": "DWRR",
+            "weight": "22"
         },
-        "{{ port }}|6": {
-            "scheduler": "scheduler.4"
+        "scheduler_q6_uplink": {
+            "type": "DWRR",
+            "weight": "4"
         }
+    },
+{%- endmacro -%}
+
+{%- macro generate_direction_based_queue_per_sku(port, direction) -%}
+    "{{ port }}|0": {
+        "scheduler": "scheduler_q0_{{ direction }}"
+    },
+    "{{ port }}|1": {
+        "scheduler": "scheduler_q1_{{ direction }}",
+        "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q1"
+    },
+    "{{ port }}|2": {
+        "scheduler": "scheduler_q2_{{ direction }}",
+        "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q2"
+    },
+    "{{ port }}|3": {
+        "scheduler": "scheduler_q3_{{ direction }}",
+        "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q3"
+    },
+    "{{ port }}|4": {
+        "scheduler": "scheduler_q4_{{ direction }}",
+        "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q4"
+    },
+    "{{ port }}|5": {
+        "scheduler": "scheduler_q5_{{ direction }}",
+        "wred_profile": "AZURE_LOSSY_{{ direction.upper() }}_Q5"
+    },
+    "{{ port }}|6": {
+        "scheduler": "scheduler_q6_{{ direction }}"
+    }
 {%- endmacro -%}
 
 {%- macro generate_global_dscp_to_tc_map() %}
@@ -148,23 +195,252 @@
 {%- endmacro %}
 
 {%- macro generate_wred_profiles() %}
+    {# Default threshold values for both ToR and Leaf routers #}
+    {%- set min_threshold = "166912" %}
+    {%- set disable_wred = traffic_config.wred_threshold_limit %}
+
+    {%- set router_type = (
+        DEVICE_METADATA['localhost']['type']
+        if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type']
+        else 'ToRRouter'
+    ) %}
+
+    {%- if 'ToRRouter' in router_type %}
+        {# ToR Router thresholds - only override if different from defaults #}
+        {%- set max_threshold = "282624" %}
+    {%- elif 'LeafRouter' in router_type %}
+        {# Leaf Router thresholds - only override if different from defaults #}
+        {%- set max_threshold = "239616" %}
+    {%- endif %}
+
     "WRED_PROFILE": {
-        "AZURE_LOSSLESS" : {
-            "wred_green_enable"      : "true",
-            "wred_yellow_enable"     : "true",
-            "wred_red_enable"        : "true",
-            "ecn"                    : "ecn_all",
-            "green_max_threshold"    : "10000000",
-            "green_min_threshold"    : "2000000",
-            "yellow_max_threshold"   : "10000000",
-            "yellow_min_threshold"   : "2000000",
-            "red_max_threshold"      : "10000000",
-            "red_min_threshold"      : "2000000",
-            "green_drop_probability" : "5",
+        "AZURE_LOSSY_DOWNLINK_Q1": {
+            "wred_green_enable": "false",
+            "wred_yellow_enable": "false",
+            "wred_red_enable": "false",
+            "ecn": "ecn_all",
+            "green_max_threshold": "{{ max_threshold }}",
+            "green_min_threshold": "{{ min_threshold }}",
+            "yellow_max_threshold": "{{ max_threshold }}",
+            "yellow_min_threshold": "{{ min_threshold }}",
+            "red_max_threshold": "{{ max_threshold }}",
+            "red_min_threshold": "{{ min_threshold }}",
+            "green_drop_probability": "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability": "5"
+        },
+        "AZURE_LOSSY_DOWNLINK_Q2": {
+            "wred_green_enable": "false",
+            "wred_yellow_enable": "false",
+            "wred_red_enable": "false",
+            "ecn": "ecn_all",
+            "green_max_threshold": "{{ max_threshold }}",
+            "green_min_threshold": "{{ min_threshold }}",
+            "yellow_max_threshold": "{{ max_threshold }}",
+            "yellow_min_threshold": "{{ min_threshold }}",
+            "red_max_threshold": "{{ max_threshold }}",
+            "red_min_threshold": "{{ min_threshold }}",
+            "green_drop_probability": "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability": "5"
+        },
+        "AZURE_LOSSY_DOWNLINK_Q3": {
+            "wred_green_enable": "false",
+            "wred_yellow_enable": "false",
+            "wred_red_enable": "false",
+            "ecn": "ecn_all",
+            "green_max_threshold": "{{ max_threshold }}",
+            "green_min_threshold": "{{ min_threshold }}",
+            "yellow_max_threshold": "{{ max_threshold }}",
+            "yellow_min_threshold": "{{ min_threshold }}",
+            "red_max_threshold": "{{ max_threshold }}",
+            "red_min_threshold": "{{ min_threshold }}",
+            "green_drop_probability": "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability": "5"
+        },
+        "AZURE_LOSSY_DOWNLINK_Q4": {
+            "wred_green_enable": "false",
+            "wred_yellow_enable": "false",
+            "wred_red_enable": "false",
+            "ecn": "ecn_all",
+            "green_max_threshold": "{{ disable_wred }}",
+            "green_min_threshold": "{{ disable_wred }}",
+            "yellow_max_threshold": "{{ disable_wred }}",
+            "yellow_min_threshold": "{{ disable_wred }}",
+            "red_max_threshold": "{{ disable_wred }}",
+            "red_min_threshold": "{{ disable_wred }}",
+            "green_drop_probability": "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability": "5"
+        },
+        "AZURE_LOSSY_DOWNLINK_Q5": {
+            "wred_green_enable": "false",
+            "wred_yellow_enable": "false",
+            "wred_red_enable": "false",
+            "ecn": "ecn_all",
+            "green_max_threshold": "{{ disable_wred }}",
+            "green_min_threshold": "{{ disable_wred }}",
+            "yellow_max_threshold": "{{ disable_wred }}",
+            "yellow_min_threshold": "{{ disable_wred }}",
+            "red_max_threshold": "{{ disable_wred }}",
+            "red_min_threshold": "{{ disable_wred }}",
+            "green_drop_probability": "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability": "5"
+        },
+        "AZURE_LOSSY_UPLINK_Q1": {
+            "wred_green_enable": "false",
+            "wred_yellow_enable": "false",
+            "wred_red_enable": "false",
+            "ecn": "ecn_all",
+            "green_max_threshold": "{{ max_threshold }}",
+            "green_min_threshold": "{{ min_threshold }}",
+            "yellow_max_threshold": "{{ max_threshold }}",
+            "yellow_min_threshold": "{{ min_threshold }}",
+            "red_max_threshold": "{{ max_threshold }}",
+            "red_min_threshold": "{{ min_threshold }}",
+            "green_drop_probability": "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability": "5"
+        },
+        "AZURE_LOSSY_UPLINK_Q2": {
+            "wred_green_enable": "false",
+            "wred_yellow_enable": "false",
+            "wred_red_enable": "false",
+            "ecn": "ecn_all",
+            "green_max_threshold": "{{ max_threshold }}",
+            "green_min_threshold": "{{ min_threshold }}",
+            "yellow_max_threshold": "{{ max_threshold }}",
+            "yellow_min_threshold": "{{ min_threshold }}",
+            "red_max_threshold": "{{ max_threshold }}",
+            "red_min_threshold": "{{ min_threshold }}",
+            "green_drop_probability": "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability": "5"
+        },
+        "AZURE_LOSSY_UPLINK_Q3": {
+            "wred_green_enable": "false",
+            "wred_yellow_enable": "false",
+            "wred_red_enable": "false",
+            "ecn": "ecn_all",
+            "green_max_threshold": "{{ max_threshold }}",
+            "green_min_threshold": "{{ min_threshold }}",
+            "yellow_max_threshold": "{{ max_threshold }}",
+            "yellow_min_threshold": "{{ min_threshold }}",
+            "red_max_threshold": "{{ max_threshold }}",
+            "red_min_threshold": "{{ min_threshold }}",
+            "green_drop_probability": "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability": "5"
+        },
+        "AZURE_LOSSY_UPLINK_Q4": {
+            "wred_green_enable": "false",
+            "wred_yellow_enable": "false",
+            "wred_red_enable": "false",
+            "ecn": "ecn_all",
+            "green_max_threshold": "{{ disable_wred }}",
+            "green_min_threshold": "{{ disable_wred }}",
+            "yellow_max_threshold": "{{ disable_wred }}",
+            "yellow_min_threshold": "{{ disable_wred }}",
+            "red_max_threshold": "{{ disable_wred }}",
+            "red_min_threshold": "{{ disable_wred }}",
+            "green_drop_probability": "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability": "5"
+        },
+        "AZURE_LOSSY_UPLINK_Q5": {
+            "wred_green_enable": "false",
+            "wred_yellow_enable": "false",
+            "wred_red_enable": "false",
+            "ecn": "ecn_all",
+            "green_max_threshold": "{{ disable_wred }}",
+            "green_min_threshold": "{{ disable_wred }}",
+            "yellow_max_threshold": "{{ disable_wred }}",
+            "yellow_min_threshold": "{{ disable_wred }}",
+            "red_max_threshold": "{{ disable_wred }}",
+            "red_min_threshold": "{{ disable_wred }}",
+            "green_drop_probability": "5",
             "yellow_drop_probability": "5",
-            "red_drop_probability"   : "5"
+            "red_drop_probability": "5"
         }
     },
 {%- endmacro %}
 
+{%- macro generate_lossless_tc_list(lossless_tc_list) %}
+{#
+    This macro intentionally does nothing, leaving LOSSLESS_TC as an empty list
+    Use the following to generate other lists like 3, 4
+    {%- if lossless_tc_list.append('3') -%}{%- endif -%}
+    {%- if lossless_tc_list.append('4') -%}{%- endif -%}
+#}
+{%- endmacro %}
+
+{%- macro generate_tc_to_queue_map_per_sku() -%}
+    "TC_TO_QUEUE_MAP": {
+        "AZURE": {
+            "0": "0",
+            "1": "1",
+            "2": "2",
+            "3": "3",
+            "4": "4",
+            "5": "5",
+            "6": "6",
+            "7": "7"
+{%- if traffic_config.traffic_classification_enable %}
+            ,
+            "8": "4"
+{%- endif %}
+        }
+    },
+{%- endmacro -%}
+
+{% macro generate_tc_to_dscp_map_per_sku() %}
+{%- if traffic_config.traffic_classification_enable %}
+    "TC_TO_DSCP_MAP": {
+        {% if 'type' in DEVICE_METADATA['localhost'] %}
+            {%- if 'ToRRouter' in DEVICE_METADATA['localhost']['type'] -%}
+                "AZURE_DOWNLINK_BT0": {
+                    "8": "21"
+                },
+                "AZURE_UPLINK_BT0": {
+                    "8": "11"
+                }
+            {%- elif 'LeafRouter' in DEVICE_METADATA['localhost']['type'] -%}
+                "AZURE_DOWNLINK_BT1": {
+                    "8": "11"
+                }
+            {% endif %}
+        {% endif -%}
+    },
+{%- endif %}
+{%- endmacro -%}
+
+{%- macro generate_port_qos_map_per_sku(ports, direction) -%}
+{%- for port in ports.split(',') %}
+        "{{ port }}": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "pfc_enable"      : "",
+            "pfcwd_sw_enable" : "",
+            {% if traffic_config.traffic_classification_enable %}
+                {% if direction == 'downlink' and 'ToRRouter' in DEVICE_METADATA['localhost']['type'] %}
+                    "tc_to_pg_map": "AZURE",
+                    "tc_to_dscp_map": "AZURE_DOWNLINK_BT0"
+                {% elif direction == 'uplink' and 'ToRRouter' in DEVICE_METADATA['localhost']['type'] %}
+                    "tc_to_pg_map": "AZURE",
+                    "tc_to_dscp_map": "AZURE_UPLINK_BT0"
+                {% elif direction == 'downlink' and 'LeafRouter' in DEVICE_METADATA['localhost']['type'] %}
+                    "tc_to_pg_map": "AZURE",
+                    "tc_to_dscp_map": "AZURE_DOWNLINK_BT1"
+                {% else %}
+                    "tc_to_pg_map": "AZURE"
+                {% endif %}
+            {% else %}
+                "tc_to_pg_map": "AZURE"
+            {% endif %}
+        }{% if not loop.last %},{% endif %}
+{%- endfor %}
+{%- endmacro -%}
+
 {%- include 'qos_config.j2' %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai.profile
index 271c8cf70fd..c27ec9fdaff 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai.profile
@@ -2,3 +2,4 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x100g.xml
 SAI_INDEPENDENT_MODULE_MODE=1
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
 SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
+SAI_KEY_DISABLE_PORT_ALPHA=1
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/traffic_config.j2
new file mode 100644
index 00000000000..df45502cdf9
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/traffic_config.j2
@@ -0,0 +1,34 @@
+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+
+{# Set traffic_classification_enable to false for Moose platform #}
+{%- set traffic_classification_enable = false %}
+
+{#
+The calculation formula for wred_threshold_limit is as follows:
+egress_lossless_pool total size / 12 / 1024
+Where:
+- egress_lossless_pool total size = 158229504 bytes
+- 12 represents the number of queues
+- 1024 is used to convert the unit from bytes to KB
+
+The result is 12876 (rounded down).
+
+So, wred_threshold_limit = 158229504 / 12 / 1024 = 12876 (KB per queue)
+
+The final total value is:
+12876 (KB) * 12 (queues) * 1024 = 158220288 bytes
+#}
+{% set wred_threshold_limit = 158220288 %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json
index 52088a40302..b7049aa37aa 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json
@@ -1,391 +1,647 @@
 {
     "interfaces": {
         "Ethernet0": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet4": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet8": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet12": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet16": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet20": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet24": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet28": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet32": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet36": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet40": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet44": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet48": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet52": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet56": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet60": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet64": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet68": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet72": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet76": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet80": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet84": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet88": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet92": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet96": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet100": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet104": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet108": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet112": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet116": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet120": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet124": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet128": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet132": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet136": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet140": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet144": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet148": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet152": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet156": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet160": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet164": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet168": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet172": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet176": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet180": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet184": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet188": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet192": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet196": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet200": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet204": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet208": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet212": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet216": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet220": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet224": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet228": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet232": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet236": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet240": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet244": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet248": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet252": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet256": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet260": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet264": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet268": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet272": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet276": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet280": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet284": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet288": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet292": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet296": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet300": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet304": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet308": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet312": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet316": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet320": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet324": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet328": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet332": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet336": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet340": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet344": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet348": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet352": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet356": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet360": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet364": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet368": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet372": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet376": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet380": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet384": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet388": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet392": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet396": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet400": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet404": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet408": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet412": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet416": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet420": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet424": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet428": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet432": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet436": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet440": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet444": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet448": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet452": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet456": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet460": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet464": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet468": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet472": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet476": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet480": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet484": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet488": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet492": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet496": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet500": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet504": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet508": {
-            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet512": {
-            "default_brkout_mode": "1x25G(1)[10G]"
+            "default_brkout_mode": "1x25G[10G]"
         }
     }
 }
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/media_settings.json
new file mode 120000
index 00000000000..2f4f358b3ba
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN5600-V256/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/optics_si_settings.json
new file mode 120000
index 00000000000..f0e582a4d77
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN5600-V256/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/pmon_daemon_control.json
new file mode 100644
index 00000000000..208fa63ca29
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/pmon_daemon_control.json
@@ -0,0 +1,6 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": false
+}
+
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile
index 73fbbd1609b..3fd37cabc97 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_sn5600_128x400g_1x25g.xml
+SAI_INDEPENDENT_MODULE_MODE=1
 SAI_HOSTIF_OPER_STATUS_UPDATE_BY_APP=1
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
index 377d4116c10..896233eb914 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
@@ -14,34 +14,34 @@
                         "lane7": "0x00000000"
                     },
                     "pre2": {
-                        "lane0": "0x00000005",
-                        "lane1": "0x00000005",
-                        "lane2": "0x00000005",
-                        "lane3": "0x00000005",
-                        "lane4": "0x00000005",
-                        "lane5": "0x00000005",
-                        "lane6": "0x00000005",
-                        "lane7": "0x00000005"
+                        "lane0": "0x00000003",
+                        "lane1": "0x00000003",
+                        "lane2": "0x00000003",
+                        "lane3": "0x00000003",
+                        "lane4": "0x00000003",
+                        "lane5": "0x00000003",
+                        "lane6": "0x00000003",
+                        "lane7": "0x00000003"
                     },
                     "pre1": {
-                        "lane0": "0xfffffff1",
-                        "lane1": "0xfffffff1",
-                        "lane2": "0xfffffff1",
-                        "lane3": "0xfffffff1",
-                        "lane4": "0xfffffff1",
-                        "lane5": "0xfffffff1",
-                        "lane6": "0xfffffff1",
-                        "lane7": "0xfffffff1"
+                        "lane0": "0xffffffec",
+                        "lane1": "0xffffffec",
+                        "lane2": "0xffffffec",
+                        "lane3": "0xffffffec",
+                        "lane4": "0xffffffec",
+                        "lane5": "0xffffffec",
+                        "lane6": "0xffffffec",
+                        "lane7": "0xffffffec"
                     },
                     "main": {
-                        "lane0": "0x0000002b",
-                        "lane1": "0x0000002b",
-                        "lane2": "0x0000002b",
-                        "lane3": "0x0000002b",
-                        "lane4": "0x0000002b",
-                        "lane5": "0x0000002b",
-                        "lane6": "0x0000002b",
-                        "lane7": "0x0000002b"
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028",
+                        "lane4": "0x00000028",
+                        "lane5": "0x00000028",
+                        "lane6": "0x00000028",
+                        "lane7": "0x00000028"
                     },
                     "post1": {
                         "lane0": "0x00000000",
@@ -54,14 +54,14 @@
                         "lane7": "0x00000000"
                     },
                     "idriver": {
-                        "lane0": "0x00000032",
-                        "lane1": "0x00000032",
-                        "lane2": "0x00000032",
-                        "lane3": "0x00000032",
-                        "lane4": "0x00000032",
-                        "lane5": "0x00000032",
-                        "lane6": "0x00000032",
-                        "lane7": "0x00000032"
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
                     }
                 },
                 "speed:100GAUI-1-S": {
@@ -76,34 +76,34 @@
                         "lane7": "0x00000000"
                     },
                     "pre2": {
-                        "lane0": "0x00000005",
-                        "lane1": "0x00000005",
-                        "lane2": "0x00000005",
-                        "lane3": "0x00000005",
-                        "lane4": "0x00000005",
-                        "lane5": "0x00000005",
-                        "lane6": "0x00000005",
-                        "lane7": "0x00000005"
+                        "lane0": "0x00000003",
+                        "lane1": "0x00000003",
+                        "lane2": "0x00000003",
+                        "lane3": "0x00000003",
+                        "lane4": "0x00000003",
+                        "lane5": "0x00000003",
+                        "lane6": "0x00000003",
+                        "lane7": "0x00000003"
                     },
                     "pre1": {
-                        "lane0": "0xfffffff1",
-                        "lane1": "0xfffffff1",
-                        "lane2": "0xfffffff1",
-                        "lane3": "0xfffffff1",
-                        "lane4": "0xfffffff1",
-                        "lane5": "0xfffffff1",
-                        "lane6": "0xfffffff1",
-                        "lane7": "0xfffffff1"
+                        "lane0": "0xffffffec",
+                        "lane1": "0xffffffec",
+                        "lane2": "0xffffffec",
+                        "lane3": "0xffffffec",
+                        "lane4": "0xffffffec",
+                        "lane5": "0xffffffec",
+                        "lane6": "0xffffffec",
+                        "lane7": "0xffffffec"
                     },
                     "main": {
-                        "lane0": "0x0000002b",
-                        "lane1": "0x0000002b",
-                        "lane2": "0x0000002b",
-                        "lane3": "0x0000002b",
-                        "lane4": "0x0000002b",
-                        "lane5": "0x0000002b",
-                        "lane6": "0x0000002b",
-                        "lane7": "0x0000002b"
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028",
+                        "lane4": "0x00000028",
+                        "lane5": "0x00000028",
+                        "lane6": "0x00000028",
+                        "lane7": "0x00000028"
                     },
                     "post1": {
                         "lane0": "0x00000000",
@@ -116,14 +116,14 @@
                         "lane7": "0x00000000"
                     },
                     "idriver": {
-                        "lane0": "0x00000032",
-                        "lane1": "0x00000032",
-                        "lane2": "0x00000032",
-                        "lane3": "0x00000032",
-                        "lane4": "0x00000032",
-                        "lane5": "0x00000032",
-                        "lane6": "0x00000032",
-                        "lane7": "0x00000032"
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
                     }
                 },
                 "speed:200GAUI-2-S": {
@@ -138,34 +138,34 @@
                         "lane7": "0x00000000"
                     },
                     "pre2": {
-                        "lane0": "0x00000005",
-                        "lane1": "0x00000005",
-                        "lane2": "0x00000005",
-                        "lane3": "0x00000005",
-                        "lane4": "0x00000005",
-                        "lane5": "0x00000005",
-                        "lane6": "0x00000005",
-                        "lane7": "0x00000005"
+                        "lane0": "0x00000003",
+                        "lane1": "0x00000003",
+                        "lane2": "0x00000003",
+                        "lane3": "0x00000003",
+                        "lane4": "0x00000003",
+                        "lane5": "0x00000003",
+                        "lane6": "0x00000003",
+                        "lane7": "0x00000003"
                     },
                     "pre1": {
-                        "lane0": "0xfffffff1",
-                        "lane1": "0xfffffff1",
-                        "lane2": "0xfffffff1",
-                        "lane3": "0xfffffff1",
-                        "lane4": "0xfffffff1",
-                        "lane5": "0xfffffff1",
-                        "lane6": "0xfffffff1",
-                        "lane7": "0xfffffff1"
+                        "lane0": "0xffffffec",
+                        "lane1": "0xffffffec",
+                        "lane2": "0xffffffec",
+                        "lane3": "0xffffffec",
+                        "lane4": "0xffffffec",
+                        "lane5": "0xffffffec",
+                        "lane6": "0xffffffec",
+                        "lane7": "0xffffffec"
                     },
                     "main": {
-                        "lane0": "0x0000002b",
-                        "lane1": "0x0000002b",
-                        "lane2": "0x0000002b",
-                        "lane3": "0x0000002b",
-                        "lane4": "0x0000002b",
-                        "lane5": "0x0000002b",
-                        "lane6": "0x0000002b",
-                        "lane7": "0x0000002b"
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028",
+                        "lane4": "0x00000028",
+                        "lane5": "0x00000028",
+                        "lane6": "0x00000028",
+                        "lane7": "0x00000028"
                     },
                     "post1": {
                         "lane0": "0x00000000",
@@ -178,14 +178,14 @@
                         "lane7": "0x00000000"
                     },
                     "idriver": {
-                        "lane0": "0x00000032",
-                        "lane1": "0x00000032",
-                        "lane2": "0x00000032",
-                        "lane3": "0x00000032",
-                        "lane4": "0x00000032",
-                        "lane5": "0x00000032",
-                        "lane6": "0x00000032",
-                        "lane7": "0x00000032"
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
                     }
                 },
                 "speed:200GAUI-2-L": {
@@ -200,34 +200,34 @@
                         "lane7": "0x00000000"
                     },
                     "pre2": {
-                        "lane0": "0x00000005",
-                        "lane1": "0x00000005",
-                        "lane2": "0x00000005",
-                        "lane3": "0x00000005",
-                        "lane4": "0x00000005",
-                        "lane5": "0x00000005",
-                        "lane6": "0x00000005",
-                        "lane7": "0x00000005"
+                        "lane0": "0x00000003",
+                        "lane1": "0x00000003",
+                        "lane2": "0x00000003",
+                        "lane3": "0x00000003",
+                        "lane4": "0x00000003",
+                        "lane5": "0x00000003",
+                        "lane6": "0x00000003",
+                        "lane7": "0x00000003"
                     },
                     "pre1": {
-                        "lane0": "0xfffffff1",
-                        "lane1": "0xfffffff1",
-                        "lane2": "0xfffffff1",
-                        "lane3": "0xfffffff1",
-                        "lane4": "0xfffffff1",
-                        "lane5": "0xfffffff1",
-                        "lane6": "0xfffffff1",
-                        "lane7": "0xfffffff1"
+                        "lane0": "0xffffffec",
+                        "lane1": "0xffffffec",
+                        "lane2": "0xffffffec",
+                        "lane3": "0xffffffec",
+                        "lane4": "0xffffffec",
+                        "lane5": "0xffffffec",
+                        "lane6": "0xffffffec",
+                        "lane7": "0xffffffec"
                     },
                     "main": {
-                        "lane0": "0x0000002b",
-                        "lane1": "0x0000002b",
-                        "lane2": "0x0000002b",
-                        "lane3": "0x0000002b",
-                        "lane4": "0x0000002b",
-                        "lane5": "0x0000002b",
-                        "lane6": "0x0000002b",
-                        "lane7": "0x0000002b"
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028",
+                        "lane4": "0x00000028",
+                        "lane5": "0x00000028",
+                        "lane6": "0x00000028",
+                        "lane7": "0x00000028"
                     },
                     "post1": {
                         "lane0": "0x00000000",
@@ -240,14 +240,14 @@
                         "lane7": "0x00000000"
                     },
                     "idriver": {
-                        "lane0": "0x00000032",
-                        "lane1": "0x00000032",
-                        "lane2": "0x00000032",
-                        "lane3": "0x00000032",
-                        "lane4": "0x00000032",
-                        "lane5": "0x00000032",
-                        "lane6": "0x00000032",
-                        "lane7": "0x00000032"
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
                     }
                 },
                 "speed:200GAUI-4": {
@@ -324,34 +324,34 @@
                         "lane7": "0x00000000"
                     },
                     "pre2": {
-                        "lane0": "0x00000005",
-                        "lane1": "0x00000005",
-                        "lane2": "0x00000005",
-                        "lane3": "0x00000005",
-                        "lane4": "0x00000005",
-                        "lane5": "0x00000005",
-                        "lane6": "0x00000005",
-                        "lane7": "0x00000005"
+                        "lane0": "0x00000003",
+                        "lane1": "0x00000003",
+                        "lane2": "0x00000003",
+                        "lane3": "0x00000003",
+                        "lane4": "0x00000003",
+                        "lane5": "0x00000003",
+                        "lane6": "0x00000003",
+                        "lane7": "0x00000003"
                     },
                     "pre1": {
-                        "lane0": "0xfffffff1",
-                        "lane1": "0xfffffff1",
-                        "lane2": "0xfffffff1",
-                        "lane3": "0xfffffff1",
-                        "lane4": "0xfffffff1",
-                        "lane5": "0xfffffff1",
-                        "lane6": "0xfffffff1",
-                        "lane7": "0xfffffff1"
+                        "lane0": "0xffffffec",
+                        "lane1": "0xffffffec",
+                        "lane2": "0xffffffec",
+                        "lane3": "0xffffffec",
+                        "lane4": "0xffffffec",
+                        "lane5": "0xffffffec",
+                        "lane6": "0xffffffec",
+                        "lane7": "0xffffffec"
                     },
                     "main": {
-                        "lane0": "0x0000002b",
-                        "lane1": "0x0000002b",
-                        "lane2": "0x0000002b",
-                        "lane3": "0x0000002b",
-                        "lane4": "0x0000002b",
-                        "lane5": "0x0000002b",
-                        "lane6": "0x0000002b",
-                        "lane7": "0x0000002b"
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028",
+                        "lane4": "0x00000028",
+                        "lane5": "0x00000028",
+                        "lane6": "0x00000028",
+                        "lane7": "0x00000028"
                     },
                     "post1": {
                         "lane0": "0x00000000",
@@ -364,15 +364,15 @@
                         "lane7": "0x00000000"
                     },
                     "idriver": {
-                        "lane0": "0x00000032",
-                        "lane1": "0x00000032",
-                        "lane2": "0x00000032",
-                        "lane3": "0x00000032",
-                        "lane4": "0x00000032",
-                        "lane5": "0x00000032",
-                        "lane6": "0x00000032",
-                        "lane7": "0x00000032"
-                    }
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
+		    }
                 },
                 "speed:400GAUI-4-S": {
                     "pre3": {
@@ -386,34 +386,34 @@
                         "lane7": "0x00000000"
                     },
                     "pre2": {
-                        "lane0": "0x00000005",
-                        "lane1": "0x00000005",
-                        "lane2": "0x00000005",
-                        "lane3": "0x00000005",
-                        "lane4": "0x00000005",
-                        "lane5": "0x00000005",
-                        "lane6": "0x00000005",
-                        "lane7": "0x00000005"
+                        "lane0": "0x00000003",
+                        "lane1": "0x00000003",
+                        "lane2": "0x00000003",
+                        "lane3": "0x00000003",
+                        "lane4": "0x00000003",
+                        "lane5": "0x00000003",
+                        "lane6": "0x00000003",
+                        "lane7": "0x00000003"
                     },
                     "pre1": {
-                        "lane0": "0xfffffff1",
-                        "lane1": "0xfffffff1",
-                        "lane2": "0xfffffff1",
-                        "lane3": "0xfffffff1",
-                        "lane4": "0xfffffff1",
-                        "lane5": "0xfffffff1",
-                        "lane6": "0xfffffff1",
-                        "lane7": "0xfffffff1"
+                        "lane0": "0xffffffec",
+                        "lane1": "0xffffffec",
+                        "lane2": "0xffffffec",
+                        "lane3": "0xffffffec",
+                        "lane4": "0xffffffec",
+                        "lane5": "0xffffffec",
+                        "lane6": "0xffffffec",
+                        "lane7": "0xffffffec"
                     },
                     "main": {
-                        "lane0": "0x0000002b",
-                        "lane1": "0x0000002b",
-                        "lane2": "0x0000002b",
-                        "lane3": "0x0000002b",
-                        "lane4": "0x0000002b",
-                        "lane5": "0x0000002b",
-                        "lane6": "0x0000002b",
-                        "lane7": "0x0000002b"
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028",
+                        "lane4": "0x00000028",
+                        "lane5": "0x00000028",
+                        "lane6": "0x00000028",
+                        "lane7": "0x00000028"
                     },
                     "post1": {
                         "lane0": "0x00000000",
@@ -426,14 +426,14 @@
                         "lane7": "0x00000000"
                     },
                     "idriver": {
-                        "lane0": "0x00000032",
-                        "lane1": "0x00000032",
-                        "lane2": "0x00000032",
-                        "lane3": "0x00000032",
-                        "lane4": "0x00000032",
-                        "lane5": "0x00000032",
-                        "lane6": "0x00000032",
-                        "lane7": "0x00000032"
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
                     }
                 },
                 "speed:800G": {
@@ -448,34 +448,34 @@
                         "lane7": "0x00000000"
                     },
                     "pre2": {
-                        "lane0": "0x00000005",
-                        "lane1": "0x00000005",
-                        "lane2": "0x00000005",
-                        "lane3": "0x00000005",
-                        "lane4": "0x00000005",
-                        "lane5": "0x00000005",
-                        "lane6": "0x00000005",
-                        "lane7": "0x00000005"
+                        "lane0": "0x00000003",
+                        "lane1": "0x00000003",
+                        "lane2": "0x00000003",
+                        "lane3": "0x00000003",
+                        "lane4": "0x00000003",
+                        "lane5": "0x00000003",
+                        "lane6": "0x00000003",
+                        "lane7": "0x00000003"
                     },
                     "pre1": {
-                        "lane0": "0xfffffff1",
-                        "lane1": "0xfffffff1",
-                        "lane2": "0xfffffff1",
-                        "lane3": "0xfffffff1",
-                        "lane4": "0xfffffff1",
-                        "lane5": "0xfffffff1",
-                        "lane6": "0xfffffff1",
-                        "lane7": "0xfffffff1"
+                        "lane0": "0xffffffec",
+                        "lane1": "0xffffffec",
+                        "lane2": "0xffffffec",
+                        "lane3": "0xffffffec",
+                        "lane4": "0xffffffec",
+                        "lane5": "0xffffffec",
+                        "lane6": "0xffffffec",
+                        "lane7": "0xffffffec"
                     },
                     "main": {
-                        "lane0": "0x0000002b",
-                        "lane1": "0x0000002b",
-                        "lane2": "0x0000002b",
-                        "lane3": "0x0000002b",
-                        "lane4": "0x0000002b",
-                        "lane5": "0x0000002b",
-                        "lane6": "0x0000002b",
-                        "lane7": "0x0000002b"
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028",
+                        "lane4": "0x00000028",
+                        "lane5": "0x00000028",
+                        "lane6": "0x00000028",
+                        "lane7": "0x00000028"
                     },
                     "post1": {
                         "lane0": "0x00000000",
@@ -488,14 +488,14 @@
                         "lane7": "0x00000000"
                     },
                     "idriver": {
-                        "lane0": "0x00000032",
-                        "lane1": "0x00000032",
-                        "lane2": "0x00000032",
-                        "lane3": "0x00000032",
-                        "lane4": "0x00000032",
-                        "lane5": "0x00000032",
-                        "lane6": "0x00000032",
-                        "lane7": "0x00000032"
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
                     }
                 }
             },
@@ -512,34 +512,34 @@
                         "lane7": "0x00000000"
                     },
                     "pre2": {
-                        "lane0": "0x00000005",
-                        "lane1": "0x00000005",
-                        "lane2": "0x00000005",
-                        "lane3": "0x00000005",
-                        "lane4": "0x00000005",
-                        "lane5": "0x00000005",
-                        "lane6": "0x00000005",
-                        "lane7": "0x00000005"
+                        "lane0": "0x00000003",
+                        "lane1": "0x00000003",
+                        "lane2": "0x00000003",
+                        "lane3": "0x00000003",
+                        "lane4": "0x00000003",
+                        "lane5": "0x00000003",
+                        "lane6": "0x00000003",
+                        "lane7": "0x00000003"
                     },
                     "pre1": {
-                        "lane0": "0xfffffff1",
-                        "lane1": "0xfffffff1",
-                        "lane2": "0xfffffff1",
-                        "lane3": "0xfffffff1",
-                        "lane4": "0xfffffff1",
-                        "lane5": "0xfffffff1",
-                        "lane6": "0xfffffff1",
-                        "lane7": "0xfffffff1"
+                        "lane0": "0xffffffec",
+                        "lane1": "0xffffffec",
+                        "lane2": "0xffffffec",
+                        "lane3": "0xffffffec",
+                        "lane4": "0xffffffec",
+                        "lane5": "0xffffffec",
+                        "lane6": "0xffffffec",
+                        "lane7": "0xffffffec"
                     },
                     "main": {
-                        "lane0": "0x0000002b",
-                        "lane1": "0x0000002b",
-                        "lane2": "0x0000002b",
-                        "lane3": "0x0000002b",
-                        "lane4": "0x0000002b",
-                        "lane5": "0x0000002b",
-                        "lane6": "0x0000002b",
-                        "lane7": "0x0000002b"
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028",
+                        "lane4": "0x00000028",
+                        "lane5": "0x00000028",
+                        "lane6": "0x00000028",
+                        "lane7": "0x00000028"
                     },
                     "post1": {
                         "lane0": "0x00000000",
@@ -552,14 +552,14 @@
                         "lane7": "0x00000000"
                     },
                     "idriver": {
-                        "lane0": "0x00000032",
-                        "lane1": "0x00000032",
-                        "lane2": "0x00000032",
-                        "lane3": "0x00000032",
-                        "lane4": "0x00000032",
-                        "lane5": "0x00000032",
-                        "lane6": "0x00000032",
-                        "lane7": "0x00000032"
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
                     }
                 },
                 "speed:400GAUI-4-S": {
@@ -574,34 +574,34 @@
                         "lane7": "0x00000000"
                     },
                     "pre2": {
-                        "lane0": "0x00000005",
-                        "lane1": "0x00000005",
-                        "lane2": "0x00000005",
-                        "lane3": "0x00000005",
-                        "lane4": "0x00000005",
-                        "lane5": "0x00000005",
-                        "lane6": "0x00000005",
-                        "lane7": "0x00000005"
+                        "lane0": "0x00000003",
+                        "lane1": "0x00000003",
+                        "lane2": "0x00000003",
+                        "lane3": "0x00000003",
+                        "lane4": "0x00000003",
+                        "lane5": "0x00000003",
+                        "lane6": "0x00000003",
+                        "lane7": "0x00000003"
                     },
                     "pre1": {
-                        "lane0": "0xfffffff1",
-                        "lane1": "0xfffffff1",
-                        "lane2": "0xfffffff1",
-                        "lane3": "0xfffffff1",
-                        "lane4": "0xfffffff1",
-                        "lane5": "0xfffffff1",
-                        "lane6": "0xfffffff1",
-                        "lane7": "0xfffffff1"
+                        "lane0": "0xffffffec",
+                        "lane1": "0xffffffec",
+                        "lane2": "0xffffffec",
+                        "lane3": "0xffffffec",
+                        "lane4": "0xffffffec",
+                        "lane5": "0xffffffec",
+                        "lane6": "0xffffffec",
+                        "lane7": "0xffffffec"
                     },
                     "main": {
-                        "lane0": "0x0000002b",
-                        "lane1": "0x0000002b",
-                        "lane2": "0x0000002b",
-                        "lane3": "0x0000002b",
-                        "lane4": "0x0000002b",
-                        "lane5": "0x0000002b",
-                        "lane6": "0x0000002b",
-                        "lane7": "0x0000002b"
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028",
+                        "lane4": "0x00000028",
+                        "lane5": "0x00000028",
+                        "lane6": "0x00000028",
+                        "lane7": "0x00000028"
                     },
                     "post1": {
                         "lane0": "0x00000000",
@@ -614,14 +614,14 @@
                         "lane7": "0x00000000"
                     },
                     "idriver": {
-                        "lane0": "0x00000032",
-                        "lane1": "0x00000032",
-                        "lane2": "0x00000032",
-                        "lane3": "0x00000032",
-                        "lane4": "0x00000032",
-                        "lane5": "0x00000032",
-                        "lane6": "0x00000032",
-                        "lane7": "0x00000032"
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
                     }
                 },
                 "speed:400GAUI-8": {
@@ -698,34 +698,34 @@
                         "lane7": "0x00000000"
                     },
                     "pre2": {
-                        "lane0": "0x00000005",
-                        "lane1": "0x00000005",
-                        "lane2": "0x00000005",
-                        "lane3": "0x00000005",
-                        "lane4": "0x00000005",
-                        "lane5": "0x00000005",
-                        "lane6": "0x00000005",
-                        "lane7": "0x00000005"
+                        "lane0": "0x00000003",
+                        "lane1": "0x00000003",
+                        "lane2": "0x00000003",
+                        "lane3": "0x00000003",
+                        "lane4": "0x00000003",
+                        "lane5": "0x00000003",
+                        "lane6": "0x00000003",
+                        "lane7": "0x00000003"
                     },
                     "pre1": {
-                        "lane0": "0xfffffff1",
-                        "lane1": "0xfffffff1",
-                        "lane2": "0xfffffff1",
-                        "lane3": "0xfffffff1",
-                        "lane4": "0xfffffff1",
-                        "lane5": "0xfffffff1",
-                        "lane6": "0xfffffff1",
-                        "lane7": "0xfffffff1"
+                        "lane0": "0xffffffec",
+                        "lane1": "0xffffffec",
+                        "lane2": "0xffffffec",
+                        "lane3": "0xffffffec",
+                        "lane4": "0xffffffec",
+                        "lane5": "0xffffffec",
+                        "lane6": "0xffffffec",
+                        "lane7": "0xffffffec"
                     },
                     "main": {
-                        "lane0": "0x0000002b",
-                        "lane1": "0x0000002b",
-                        "lane2": "0x0000002b",
-                        "lane3": "0x0000002b",
-                        "lane4": "0x0000002b",
-                        "lane5": "0x0000002b",
-                        "lane6": "0x0000002b",
-                        "lane7": "0x0000002b"
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028",
+                        "lane4": "0x00000028",
+                        "lane5": "0x00000028",
+                        "lane6": "0x00000028",
+                        "lane7": "0x00000028"
                     },
                     "post1": {
                         "lane0": "0x00000000",
@@ -738,14 +738,14 @@
                         "lane7": "0x00000000"
                     },
                     "idriver": {
-                        "lane0": "0x00000032",
-                        "lane1": "0x00000032",
-                        "lane2": "0x00000032",
-                        "lane3": "0x00000032",
-                        "lane4": "0x00000032",
-                        "lane5": "0x00000032",
-                        "lane6": "0x00000032",
-                        "lane7": "0x00000032"
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
                     }
                 },
                 "speed:200GAUI-2-L": {
@@ -760,34 +760,34 @@
                         "lane7": "0x00000000"
                     },
                     "pre2": {
-                        "lane0": "0x00000005",
-                        "lane1": "0x00000005",
-                        "lane2": "0x00000005",
-                        "lane3": "0x00000005",
-                        "lane4": "0x00000005",
-                        "lane5": "0x00000005",
-                        "lane6": "0x00000005",
-                        "lane7": "0x00000005"
+                        "lane0": "0x00000003",
+                        "lane1": "0x00000003",
+                        "lane2": "0x00000003",
+                        "lane3": "0x00000003",
+                        "lane4": "0x00000003",
+                        "lane5": "0x00000003",
+                        "lane6": "0x00000003",
+                        "lane7": "0x00000003"
                     },
                     "pre1": {
-                        "lane0": "0xfffffff1",
-                        "lane1": "0xfffffff1",
-                        "lane2": "0xfffffff1",
-                        "lane3": "0xfffffff1",
-                        "lane4": "0xfffffff1",
-                        "lane5": "0xfffffff1",
-                        "lane6": "0xfffffff1",
-                        "lane7": "0xfffffff1"
+                        "lane0": "0xffffffec",
+                        "lane1": "0xffffffec",
+                        "lane2": "0xffffffec",
+                        "lane3": "0xffffffec",
+                        "lane4": "0xffffffec",
+                        "lane5": "0xffffffec",
+                        "lane6": "0xffffffec",
+                        "lane7": "0xffffffec"
                     },
                     "main": {
-                        "lane0": "0x0000002b",
-                        "lane1": "0x0000002b",
-                        "lane2": "0x0000002b",
-                        "lane3": "0x0000002b",
-                        "lane4": "0x0000002b",
-                        "lane5": "0x0000002b",
-                        "lane6": "0x0000002b",
-                        "lane7": "0x0000002b"
+                        "lane0": "0x00000028",
+                        "lane1": "0x00000028",
+                        "lane2": "0x00000028",
+                        "lane3": "0x00000028",
+                        "lane4": "0x00000028",
+                        "lane5": "0x00000028",
+                        "lane6": "0x00000028",
+                        "lane7": "0x00000028"
                     },
                     "post1": {
                         "lane0": "0x00000000",
@@ -800,14 +800,14 @@
                         "lane7": "0x00000000"
                     },
                     "idriver": {
-                        "lane0": "0x00000032",
-                        "lane1": "0x00000032",
-                        "lane2": "0x00000032",
-                        "lane3": "0x00000032",
-                        "lane4": "0x00000032",
-                        "lane5": "0x00000032",
-                        "lane6": "0x00000032",
-                        "lane7": "0x00000032"
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
                     }
                 },
                 "speed:200GAUI-4": {
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile
index 8677e1faf33..e4e957aefcd 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x200g.xml
 SAI_INDEPENDENT_MODULE_MODE=1
+SAI_KEY_DISABLE_PORT_ALPHA=1
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/traffic_config.j2
new file mode 120000
index 00000000000..71760a2a064
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/traffic_config.j2
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/traffic_config.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/buffers_defaults_t0.j2
index e4ece1cdbf0..257a2fad1cc 100644
--- a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/buffers_defaults_t0.j2
+++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/buffers_defaults_t0.j2
@@ -1,6 +1,6 @@
 {#
     SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
@@ -22,10 +22,10 @@
             'spinerouter_leafrouter' : '0m'
        }
 -%}
-{% set ingress_lossless_pool_size =  '144189440' %}
+{% set ingress_lossless_pool_size =  '144069632' %}
 {% set ingress_lossless_pool_xoff =  '0' %}
 {% set egress_lossless_pool_size =  '158229504' %}
-{% set egress_lossy_pool_size =  '144189440' %}
+{% set egress_lossy_pool_size =  '144069632' %}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/buffers_defaults_t1.j2
index e4ece1cdbf0..257a2fad1cc 100644
--- a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/buffers_defaults_t1.j2
+++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/buffers_defaults_t1.j2
@@ -1,6 +1,6 @@
 {#
     SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
@@ -22,10 +22,10 @@
             'spinerouter_leafrouter' : '0m'
        }
 -%}
-{% set ingress_lossless_pool_size =  '144189440' %}
+{% set ingress_lossless_pool_size =  '144069632' %}
 {% set ingress_lossless_pool_xoff =  '0' %}
 {% set egress_lossless_pool_size =  '158229504' %}
-{% set egress_lossy_pool_size =  '144189440' %}
+{% set egress_lossy_pool_size =  '144069632' %}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/sai.profile b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/sai.profile
index 407a331b666..ed67732ff26 100644
--- a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/sai.profile
@@ -2,3 +2,4 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5610n_224x100g_8x400g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
 SAI_INDEPENDENT_MODULE_MODE=1
 SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
+SAI_KEY_DISABLE_PORT_ALPHA=1
diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/traffic_config.j2
new file mode 120000
index 00000000000..71760a2a064
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/traffic_config.j2
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/traffic_config.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/buffers_defaults_t0.j2
index 3a4a3fd94a3..04beb9570b7 100644
--- a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/buffers_defaults_t0.j2
+++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/buffers_defaults_t0.j2
@@ -1,6 +1,6 @@
 {#
     SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
@@ -22,10 +22,10 @@
             'spinerouter_leafrouter' : '0m'
        }
 -%}
-{% set ingress_lossless_pool_size =  '142645248' %}
+{% set ingress_lossless_pool_size =  '142644224' %}
 {% set ingress_lossless_pool_xoff =  '0' %}
 {% set egress_lossless_pool_size =  '158229504' %}
-{% set egress_lossy_pool_size =  '142645248' %}
+{% set egress_lossy_pool_size =  '142644224' %}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/buffers_defaults_t1.j2
index 3a4a3fd94a3..04beb9570b7 100644
--- a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/buffers_defaults_t1.j2
+++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/buffers_defaults_t1.j2
@@ -1,6 +1,6 @@
 {#
     SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
@@ -22,10 +22,10 @@
             'spinerouter_leafrouter' : '0m'
        }
 -%}
-{% set ingress_lossless_pool_size =  '142645248' %}
+{% set ingress_lossless_pool_size =  '142644224' %}
 {% set ingress_lossless_pool_xoff =  '0' %}
 {% set egress_lossless_pool_size =  '158229504' %}
-{% set egress_lossy_pool_size =  '142645248' %}
+{% set egress_lossy_pool_size =  '142644224' %}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/pg_profile_lookup.ini
index 8bb46b30c64..3f86fed1f29 100644
--- a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/pg_profile_lookup.ini
+++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/pg_profile_lookup.ini
@@ -1,6 +1,6 @@
 ##
 ## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
@@ -17,36 +17,35 @@
 ##
 #  PG lossless profiles.
 # speed cable  size   xon    xoff   threshold
-  10000    5m 39936   19456  20480         0
-  25000    5m 40960   19456  21504         0
-  40000    5m 44032   19456  24576         0
-  50000    5m 46080   19456  26624         0
- 100000    5m 63488   19456  44032         0
- 200000    5m 69632   19456  50176         0
- 400000    5m 105472  19456  86016         0
- 800000    5m 134144  38912  95232         0
-  10000   40m 39936   19456  20480         0
-  25000   40m 41984   19456  22528         0
-  40000   40m 45056   19456  25600         0
-  50000   40m 48128   19456  28672         0
- 100000   40m 68608   19456  49152         0
- 200000   40m 79872   19456  60416         0
- 400000   40m 123904  19456  104448        0
- 800000   40m 171008  38912  132096        0
-  10000  300m 43008   19456  23552         0
-  25000  300m 50176   19456  30720         0
-  40000  300m 59392   19456  39936         0
-  50000  300m 65536   19456  46080         0
- 100000  300m 103424  19456  83968         0
- 200000  300m 149504  19456  130048        0
- 400000  300m 263168  19456  243712        0
- 800000  300m 450560  38912  411648        0
-  10000  1000m 19456   19456  24576        0
-  25000  1000m 19456   19456  46080        0
-  40000  1000m 19456   19456  68608        0
-  50000  1000m 19456   19456  83968        0
+  10000    5m 19456   19456  20480         0
+  25000    5m 19456   19456  21504         0
+  40000    5m 19456   19456  24576         0
+  50000    5m 19456   19456  26624         0
+ 100000    5m 19456   19456  44032         0
+ 200000    5m 19456   19456  50176         0
+ 400000    5m 19456   19456  86016         0
+ 800000    5m 38912   38912  95232         0
+  10000   40m 19456   19456  20480         0
+  25000   40m 19456   19456  22528         0
+  40000   40m 19456   19456  25600         0
+  50000   40m 19456   19456  28672         0
+ 100000   40m 19456   19456  49152         0
+ 200000   40m 19456   19456  60416         0
+ 400000   40m 19456   19456  104448        0
+ 800000   40m 38912   38912  132096        0
+  10000  250m 19456   19456  14336         0
+  25000  250m 19456   19456  20480         0
+  40000  250m 19456   19456  28672         0
+  50000  250m 19456   19456  33792         0
+ 100000  250m 19456   19456  68608         0
+ 200000  250m 19456   19456  107520        0
+ 400000  250m 19456   19456  208896        0
+ 800000  250m 38912   38912  349184        0
+  10000  1000m 19456  19456  24576         0
+  25000  1000m 19456  19456  46080         0
+  40000  1000m 19456  19456  68608         0
+  50000  1000m 19456  19456  83968         0
  100000  1000m 19456  19456  168960        0
  200000  1000m 19456  19456  308224        0
  400000  1000m 19456  19456  610304        0
  800000  1000m 38912  38912  1153024       0
-
diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/sai.profile b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/sai.profile
index b9b78d462b8..c0e8674f81c 100644
--- a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/sai.profile
@@ -2,3 +2,4 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5610n_256x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
 SAI_INDEPENDENT_MODULE_MODE=1
 SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
+SAI_KEY_DISABLE_PORT_ALPHA=1
diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/traffic_config.j2
new file mode 120000
index 00000000000..71760a2a064
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/traffic_config.j2
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/traffic_config.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5610n-r0/platform.json
index 411fe3153e0..230ef0fbd88 100644
--- a/device/mellanox/x86_64-nvidia_sn5610n-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/platform.json
@@ -689,640 +689,576 @@
             "index": "1,1,1,1,1,1,1,1",
             "lanes": "0,1,2,3,4,5,6,7",
             "breakout_modes": {
-                "1x400G": ["etp1"],
-                "2x400G[200G]": ["etp1a", "etp1b"],
-                "4x200G[100G]": ["etp1a", "etp1b", "etp1c", "etp1d"],
-                "8x100G[50G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp1"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp1a", "etp1b"],
+                "4x200G[100G,50G,25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d"]
             }
         },
         "Ethernet8": {
             "index": "2,2,2,2,2,2,2,2",
             "lanes": "8,9,10,11,12,13,14,15",
             "breakout_modes": {
-                "1x400G": ["etp2"],
-                "2x400G[200G]": ["etp2a", "etp2b"],
-                "4x200G[100G]": ["etp2a", "etp2b", "etp2c", "etp2d"],
-                "8x100G[50G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g","etp2h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp2"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp2a", "etp2b"],
+                "4x200G[100G,50G,25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d"]
             }
         },
         "Ethernet16": {
             "index": "3,3,3,3,3,3,3,3",
             "lanes": "16,17,18,19,20,21,22,23",
             "breakout_modes": {
-                "1x400G": ["etp3"],
-                "2x400G[200G]": ["etp3a", "etp3b"],
-                "4x200G[100G]": ["etp3a", "etp3b", "etp3c", "etp3d"],
-                "8x100G[50G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp3"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp3a", "etp3b"],
+                "4x200G[100G,50G,25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d"]
             }
         },
         "Ethernet24": {
             "index": "4,4,4,4,4,4,4,4",
             "lanes": "24,25,26,27,28,29,30,31",
             "breakout_modes": {
-                "1x400G": ["etp4"],
-                "2x400G[200G]": ["etp4a", "etp4b"],
-                "4x200G[100G]": ["etp4a", "etp4b", "etp4c", "etp4d"],
-                "8x100G[50G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp4"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp4a", "etp4b"],
+                "4x200G[100G,50G,25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d"]
             }
         },
         "Ethernet32": {
             "index": "5,5,5,5,5,5,5,5",
             "lanes": "32,33,34,35,36,37,38,39",
             "breakout_modes": {
-                "1x400G": ["etp5"],
-                "2x400G[200G]": ["etp5a", "etp5b"],
-                "4x200G[100G]": ["etp5a", "etp5b", "etp5c", "etp5d"],
-                "8x100G[50G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp5"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp5a", "etp5b"],
+                "4x200G[100G,50G,25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d"]
             }
         },
         "Ethernet40": {
             "index": "6,6,6,6,6,6,6,6",
             "lanes": "40,41,42,43,44,45,46,47",
             "breakout_modes": {
-                "1x400G": ["etp6"],
-                "2x400G[200G]": ["etp6a", "etp6b"],
-                "4x200G[100G]": ["etp6a", "etp6b", "etp6c", "etp6d"],
-                "8x100G[50G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp6"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp6a", "etp6b"],
+                "4x200G[100G,50G,25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d"]
             }
         },
         "Ethernet48": {
             "index": "7,7,7,7,7,7,7,7",
             "lanes": "48,49,50,51,52,53,54,55",
             "breakout_modes": {
-                "1x400G": ["etp7"],
-                "2x400G[200G]": ["etp7a", "etp7b"],
-                "4x200G[100G]": ["etp7a", "etp7b", "etp7c", "etp7d"],
-                "8x100G[50G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp7"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp7a", "etp7b"],
+                "4x200G[100G,50G,25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d"]
             }
         },
         "Ethernet56": {
             "index": "8,8,8,8,8,8,8,8",
             "lanes": "56,57,58,59,60,61,62,63",
             "breakout_modes": {
-                "1x400G": ["etp8"],
-                "2x400G[200G]": ["etp8a", "etp8b"],
-                "4x200G[100G]": ["etp8a", "etp8b", "etp8c", "etp8d"],
-                "8x100G[50G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f",  "etp8g", "etp8h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp8"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp8a", "etp8b"],
+                "4x200G[100G,50G,25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d"]
             }
         },
         "Ethernet64": {
             "index": "9,9,9,9,9,9,9,9",
             "lanes": "64,65,66,67,68,69,70,71",
             "breakout_modes": {
-                "1x400G": ["etp9"],
-                "2x400G[200G]": ["etp9a", "etp9b"],
-                "4x200G[100G]": ["etp9a", "etp9b", "etp9c", "etp9d"],
-                "8x100G[50G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp9"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp9a", "etp9b"],
+                "4x200G[100G,50G,25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d"]
             }
         },
         "Ethernet72": {
             "index": "10,10,10,10,10,10,10,10",
             "lanes": "72,73,74,75,76,77,78,79",
             "breakout_modes": {
-                "1x400G": ["etp10"],
-                "2x400G[200G]": ["etp10a", "etp10b"],
-                "4x200G[100G]": ["etp10a", "etp10b", "etp10c", "etp10d"],
-                "8x100G[50G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp10"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp10a", "etp10b"],
+                "4x200G[100G,50G,25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d"]
             }
         },
         "Ethernet80": {
             "index": "11,11,11,11,11,11,11,11",
             "lanes": "80,81,82,83,84,85,86,87",
             "breakout_modes": {
-                "1x400G": ["etp11"],
-                "2x400G[200G]": ["etp11a", "etp11b"],
-                "4x200G[100G]": ["etp11a", "etp11b", "etp11c", "etp11d"],
-                "8x100G[50G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp11"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp11a", "etp11b"],
+                "4x200G[100G,50G,25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d"]
             }
         },
         "Ethernet88": {
             "index": "12,12,12,12,12,12,12,12",
             "lanes": "88,89,90,91,92,93,94,95",
             "breakout_modes": {
-                "1x400G": ["etp12"],
-                "2x400G[200G]": ["etp12a", "etp12b"],
-                "4x200G[100G]": ["etp12a", "etp12b", "etp12c", "etp12d"],
-                "8x100G[50G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp12"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp12a", "etp12b"],
+                "4x200G[100G,50G,25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d"]
             }
         },
         "Ethernet96": {
             "index": "13,13,13,13,13,13,13,13",
             "lanes": "96,97,98,99,100,101,102,103",
             "breakout_modes": {
-                "1x400G": ["etp13"],
-                "2x400G[200G]": ["etp13a", "etp13b"],
-                "4x200G[100G]": ["etp13a", "etp13b", "etp13c", "etp13d"],
-                "8x100G[50G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp13"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp13a", "etp13b"],
+                "4x200G[100G,50G,25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d"]
             }
         },
         "Ethernet104": {
             "index": "14,14,14,14,14,14,14,14",
             "lanes": "104,105,106,107,108,109,110,111",
             "breakout_modes": {
-                "1x400G": ["etp14"],
-                "2x400G[200G]": ["etp14a", "etp14b"],
-                "4x200G[100G]": ["etp14a", "etp14b", "etp14c", "etp14d"],
-                "8x100G[50G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp14"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp14a", "etp14b"],
+                "4x200G[100G,50G,25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d"]
             }
         },
         "Ethernet112": {
             "index": "15,15,15,15,15,15,15,15",
             "lanes": "112,113,114,115,116,117,118,119",
             "breakout_modes": {
-                "1x400G": ["etp15"],
-                "2x400G[200G]": ["etp15a", "etp15b"],
-                "4x200G[100G]": ["etp15a", "etp15b", "etp15c", "etp15d"],
-                "8x100G[50G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp15"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp15a", "etp15b"],
+                "4x200G[100G,50G,25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d"]
             }
         },
         "Ethernet120": {
             "index": "16,16,16,16,16,16,16,16",
             "lanes": "120,121,122,123,124,125,126,127",
             "breakout_modes": {
-                "1x400G": ["etp16"],
-                "2x400G[200G]": ["etp16a", "etp16b"],
-                "4x200G[100G]": ["etp16a", "etp16b", "etp16c", "etp16d"],
-                "8x100G[50G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp16"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp16a", "etp16b"],
+                "4x200G[100G,50G,25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d"]
             }
         },
         "Ethernet128": {
             "index": "17,17,17,17,17,17,17,17",
             "lanes": "128,129,130,131,132,133,134,135",
             "breakout_modes": {
-                "1x400G": ["etp17"],
-                "2x400G[200G]": ["etp17a", "etp17b"],
-                "4x200G[100G]": ["etp17a", "etp17b", "etp17c", "etp17d"],
-                "8x100G[50G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp17"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp17a", "etp17b"],
+                "4x200G[100G,50G,25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d"]
             }
         },
         "Ethernet136": {
             "index": "18,18,18,18,18,18,18,18",
             "lanes": "136,137,138,139,140,141,142,143",
             "breakout_modes": {
-                "1x400G": ["etp18"],
-                "2x400G[200G]": ["etp18a", "etp18b"],
-                "4x200G[100G]": ["etp18a", "etp18b", "etp18c", "etp18d"],
-                "8x100G[50G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp18"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp18a", "etp18b"],
+                "4x200G[100G,50G,25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d"]
             }
         },
         "Ethernet144": {
             "index": "19,19,19,19,19,19,19,19",
             "lanes": "144,145,146,147,148,149,150,151",
             "breakout_modes": {
-                "1x400G": ["etp19"],
-                "2x400G[200G]": ["etp19a", "etp19b"],
-                "4x200G[100G]": ["etp19a", "etp19b", "etp19c", "etp19d"],
-                "8x100G[50G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp19"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp19a", "etp19b"],
+                "4x200G[100G,50G,25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d"]
             }
         },
         "Ethernet152": {
             "index": "20,20,20,20,20,20,20,20",
             "lanes": "152,153,154,155,156,157,158,159",
             "breakout_modes": {
-                "1x400G": ["etp20"],
-                "2x400G[200G]": ["etp20a", "etp20b"],
-                "4x200G[100G]": ["etp20a", "etp20b", "etp20c", "etp20d"],
-                "8x100G[50G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp20"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp20a", "etp20b"],
+                "4x200G[100G,50G,25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d"]
             }
         },
         "Ethernet160": {
             "index": "21,21,21,21,21,21,21,21",
             "lanes": "160,161,162,163,164,165,166,167",
             "breakout_modes": {
-                "1x400G": ["etp21"],
-                "2x400G[200G]": ["etp21a", "etp21b"],
-                "4x200G[100G]": ["etp21a", "etp21b", "etp21c", "etp21d"],
-                "8x100G[50G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp21"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp21a", "etp21b"],
+                "4x200G[100G,50G,25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d"]
             }
         },
         "Ethernet168": {
             "index": "22,22,22,22,22,22,22,22",
             "lanes": "168,169,170,171,172,173,174,175",
             "breakout_modes": {
-                "1x400G": ["etp22"],
-                "2x400G[200G]": ["etp22a", "etp22b"],
-                "4x200G[100G]": ["etp22a", "etp22b", "etp22c", "etp22d"],
-                "8x100G[50G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp22"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp22a", "etp22b"],
+                "4x200G[100G,50G,25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d"]
             }
         },
         "Ethernet176": {
             "index": "23,23,23,23,23,23,23,23",
             "lanes": "176,177,178,179,180,181,182,183",
             "breakout_modes": {
-                "1x400G": ["etp23"],
-                "2x400G[200G]": ["etp23a", "etp23b"],
-                "4x200G[100G]": ["etp23a", "etp23b", "etp23c", "etp23d"],
-                "8x100G[50G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp23"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp23a", "etp23b"],
+                "4x200G[100G,50G,25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d"]
             }
         },
         "Ethernet184": {
             "index": "24,24,24,24,24,24,24,24",
             "lanes": "184,185,186,187,188,189,190,191",
             "breakout_modes": {
-                "1x400G": ["etp24"],
-                "2x400G[200G]": ["etp24a", "etp24b"],
-                "4x200G[100G]": ["etp24a", "etp24b", "etp24c", "etp24d"],
-                "8x100G[50G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp24"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp24a", "etp24b"],
+                "4x200G[100G,50G,25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d"]
             }
         },
         "Ethernet192": {
             "index": "25,25,25,25,25,25,25,25",
             "lanes": "192,193,194,195,196,197,198,199",
             "breakout_modes": {
-                "1x400G": ["etp25"],
-                "2x400G[200G]": ["etp25a", "etp25b"],
-                "4x200G[100G]": ["etp25a", "etp25b", "etp25c", "etp25d"],
-                "8x100G[50G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp25"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp25a", "etp25b"],
+                "4x200G[100G,50G,25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d"]
             }
         },
         "Ethernet200": {
             "index": "26,26,26,26,26,26,26,26",
             "lanes": "200,201,202,203,204,205,206,207",
             "breakout_modes": {
-                "1x400G": ["etp26"],
-                "2x400G[200G]": ["etp26a", "etp26b"],
-                "4x200G[100G]": ["etp26a", "etp26b", "etp26c", "etp26d"],
-                "8x100G[50G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp26"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp26a", "etp26b"],
+                "4x200G[100G,50G,25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d"]
             }
         },
         "Ethernet208": {
             "index": "27,27,27,27,27,27,27,27",
             "lanes": "208,209,210,211,212,213,214,215",
             "breakout_modes": {
-                "1x400G": ["etp27"],
-                "2x400G[200G]": ["etp27a", "etp27b"],
-                "4x200G[100G]": ["etp27a", "etp27b", "etp27c", "etp27d"],
-                "8x100G[50G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp27"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp27a", "etp27b"],
+                "4x200G[100G,50G,25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d"]
             }
         },
         "Ethernet216": {
             "index": "28,28,28,28,28,28,28,28",
             "lanes": "216,217,218,219,220,221,222,223",
             "breakout_modes": {
-                "1x400G": ["etp28"],
-                "2x400G[200G]": ["etp28a", "etp28b"],
-                "4x200G[100G]": ["etp28a", "etp28b", "etp28c", "etp28d"],
-                "8x100G[50G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp28"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp28a", "etp28b"],
+                "4x200G[100G,50G,25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d"]
             }
         },
         "Ethernet224": {
             "index": "29,29,29,29,29,29,29,29",
             "lanes": "224,225,226,227,228,229,230,231",
             "breakout_modes": {
-                "1x400G": ["etp29"],
-                "2x400G[200G]": ["etp29a", "etp29b"],
-                "4x200G[100G]": ["etp29a", "etp29b", "etp29c", "etp29d"],
-                "8x100G[50G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp29"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp29a", "etp29b"],
+                "4x200G[100G,50G,25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d"]
             }
         },
         "Ethernet232": {
             "index": "30,30,30,30,30,30,30,30",
             "lanes": "232,233,234,235,236,237,238,239",
             "breakout_modes": {
-                "1x400G": ["etp30"],
-                "2x400G[200G]": ["etp30a", "etp30b"],
-                "4x200G[100G]": ["etp30a", "etp30b", "etp30c", "etp30d"],
-                "8x100G[50G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp30"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp30a", "etp30b"],
+                "4x200G[100G,50G,25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d"]
             }
         },
         "Ethernet240": {
             "index": "31,31,31,31,31,31,31,31",
             "lanes": "240,241,242,243,244,245,246,247",
             "breakout_modes": {
-                "1x400G": ["etp31"],
-                "2x400G[200G]": ["etp31a", "etp31b"],
-                "4x200G[100G]": ["etp31a", "etp31b", "etp31c", "etp31d"],
-                "8x100G[50G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp31"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp31a", "etp31b"],
+                "4x200G[100G,50G,25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d"]
             }
         },
         "Ethernet248": {
             "index": "32,32,32,32,32,32,32,32",
             "lanes": "248,249,250,251,252,253,254,255",
             "breakout_modes": {
-                "1x400G": ["etp32"],
-                "2x400G[200G]": ["etp32a", "etp32b"],
-                "4x200G[100G]": ["etp32a", "etp32b", "etp32c", "etp32d"],
-                "8x100G[50G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp32"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp32a", "etp32b"],
+                "4x200G[100G,50G,25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d"]
             }
         },
         "Ethernet256": {
             "index": "33,33,33,33,33,33,33,33",
             "lanes": "256,257,258,259,260,261,262,263",
             "breakout_modes": {
-                "1x400G": ["etp33"],
-                "2x400G[200G]": ["etp33a", "etp33b"],
-                "4x200G[100G]": ["etp33a", "etp33b", "etp33c", "etp33d"],
-                "8x100G[50G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f",  "etp33g", "etp33h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp33"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp33a", "etp33b"],
+                "4x200G[100G,50G,25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d"]
             }
         },
         "Ethernet264": {
             "index": "34,34,34,34,34,34,34,34",
             "lanes": "264,265,266,267,268,269,270,271",
             "breakout_modes": {
-                "1x400G": ["etp34"],
-                "2x400G[200G]": ["etp34a", "etp34b"],
-                "4x200G[100G]": ["etp34a", "etp34b", "etp34c", "etp34d"],
-                "8x100G[50G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp34"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp34a", "etp34b"],
+                "4x200G[100G,50G,25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d"]
             }
         },
         "Ethernet272": {
             "index": "35,35,35,35,35,35,35,35",
             "lanes": "272,273,274,275,276,277,278,279",
             "breakout_modes": {
-                "1x400G": ["etp35"],
-                "2x400G[200G]": ["etp35a", "etp35b"],
-                "4x200G[100G]": ["etp35a", "etp35b", "etp35c", "etp35d"],
-                "8x100G[50G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp35"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp35a", "etp35b"],
+                "4x200G[100G,50G,25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d"]
             }
         },
         "Ethernet280": {
             "index": "36,36,36,36,36,36,36,36",
             "lanes": "280,281,282,283,284,285,286,287",
             "breakout_modes": {
-                "1x400G": ["etp36"],
-                "2x400G[200G]": ["etp36a", "etp36b"],
-                "4x200G[100G]": ["etp36a", "etp36b", "etp36c", "etp36d"],
-                "8x100G[50G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp36"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp36a", "etp36b"],
+                "4x200G[100G,50G,25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d"]
             }
         },
         "Ethernet288": {
             "index": "37,37,37,37,37,37,37,37",
             "lanes": "288,289,290,291,292,293,294,295",
             "breakout_modes": {
-                "1x400G": ["etp37"],
-                "2x400G[200G]": ["etp37a", "etp37b"],
-                "4x200G[100G]": ["etp37a", "etp37b", "etp37c", "etp37d"],
-                "8x100G[50G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp37"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp37a", "etp37b"],
+                "4x200G[100G,50G,25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d"]
             }
         },
         "Ethernet296": {
             "index": "38,38,38,38,38,38,38,38",
             "lanes": "296,297,298,299,300,301,302,303",
             "breakout_modes": {
-                "1x400G": ["etp38"],
-                "2x400G[200G]": ["etp38a", "etp38b"],
-                "4x200G[100G]": ["etp38a", "etp38b", "etp38c", "etp38d"],
-                "8x100G[50G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp38"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp38a", "etp38b"],
+                "4x200G[100G,50G,25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d"]
             }
         },
         "Ethernet304": {
             "index": "39,39,39,39,39,39,39,39",
             "lanes": "304,305,306,307,308,309,310,311",
             "breakout_modes": {
-                "1x400G": ["etp39"],
-                "2x400G[200G]": ["etp39a", "etp39b"],
-                "4x200G[100G]": ["etp39a", "etp39b", "etp39c", "etp39d" ],
-                "8x100G[50G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp39"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp39a", "etp39b"],
+                "4x200G[100G,50G,25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d"]
             }
         },
         "Ethernet312": {
             "index": "40,40,40,40,40,40,40,40",
             "lanes": "312,313,314,315,316,317,318,319",
             "breakout_modes": {
-                "1x400G": ["etp40"],
-                "2x400G[200G]": ["etp40a", "etp40b"],
-                "4x200G[100G]": ["etp40a", "etp40b", "etp40c", "etp40d"],
-                "8x100G[50G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp40"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp40a", "etp40b"],
+                "4x200G[100G,50G,25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d"]
             }
         },
         "Ethernet320": {
             "index": "41,41,41,41,41,41,41,41",
             "lanes": "320,321,322,323,324,325,326,327",
             "breakout_modes": {
-                "1x400G": ["etp41"],
-                "2x400G[200G]": ["etp41a", "etp41b"],
-                "4x200G[100G]": ["etp41a", "etp41b", "etp41c", "etp41d"],
-                "8x100G[50G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp41"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp41a", "etp41b"],
+                "4x200G[100G,50G,25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d"]
             }
         },
         "Ethernet328": {
             "index": "42,42,42,42,42,42,42,42",
             "lanes": "328,329,330,331,332,333,334,335",
             "breakout_modes": {
-                "1x400G": ["etp42"],
-                "2x400G[200G]": ["etp42a", "etp42b"],
-                "4x200G[100G]": ["etp42a", "etp42b", "etp42c", "etp42d"],
-                "8x100G[50G]": ["etp42a",  "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp42"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp42a", "etp42b"],
+                "4x200G[100G,50G,25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d"]
             }
         },
         "Ethernet336": {
             "index": "43,43,43,43,43,43,43,43",
             "lanes": "336,337,338,339,340,341,342,343",
             "breakout_modes": {
-                "1x400G": ["etp43"],
-                "2x400G[200G]": ["etp43a", "etp43b"],
-                "4x200G[100G]": ["etp43a", "etp43b", "etp43c", "etp43d"],
-                "8x100G[50G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp43"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp43a", "etp43b"],
+                "4x200G[100G,50G,25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d"]
             }
         },
         "Ethernet344": {
             "index": "44,44,44,44,44,44,44,44",
             "lanes": "344,345,346,347,348,349,350,351",
             "breakout_modes": {
-                "1x400G": ["etp44"],
-                "2x400G[200G]": ["etp44a", "etp44b"],
-                "4x200G[100G]": ["etp44a", "etp44b", "etp44c", "etp44d"],
-                "8x100G[50G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp44"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp44a", "etp44b"],
+                "4x200G[100G,50G,25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d"]
             }
         },
         "Ethernet352": {
             "index": "45,45,45,45,45,45,45,45",
             "lanes": "352,353,354,355,356,357,358,359",
             "breakout_modes": {
-                "1x400G": ["etp45"],
-                "2x400G[200G]": ["etp45a", "etp45b"],
-                "4x200G[100G]": ["etp45a", "etp45b", "etp45c", "etp45d"],
-                "8x100G[50G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp45"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp45a", "etp45b"],
+                "4x200G[100G,50G,25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d"]
             }
         },
         "Ethernet360": {
             "index": "46,46,46,46,46,46,46,46",
             "lanes": "360,361,362,363,364,365,366,367",
             "breakout_modes": {
-                "1x400G": ["etp46"],
-                "2x400G[200G]": ["etp46a", "etp46b"],
-                "4x200G[100G]": ["etp46a", "etp46b", "etp46c", "etp46d"],
-                "8x100G[50G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp46"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp46a", "etp46b"],
+                "4x200G[100G,50G,25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d"]
             }
         },
         "Ethernet368": {
             "index": "47,47,47,47,47,47,47,47",
             "lanes": "368,369,370,371,372,373,374,375",
             "breakout_modes": {
-                "1x400G": ["etp47"],
-                "2x400G[200G]": ["etp47a", "etp47b"],
-                "4x200G[100G]": ["etp47a", "etp47b", "etp47c", "etp47d"],
-                "8x100G[50G]": ["etp47a", "etp47b","etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp47"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp47a", "etp47b"],
+                "4x200G[100G,50G,25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d"]
             }
         },
         "Ethernet376": {
             "index": "48,48,48,48,48,48,48,48",
             "lanes": "376,377,378,379,380,381,382,383",
             "breakout_modes": {
-                "1x400G": ["etp48"],
-                "2x400G[200G]": ["etp48a", "etp48b"],
-                "4x200G[100G]": ["etp48a", "etp48b", "etp48c", "etp48d"],
-                "8x100G[50G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp48"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp48a", "etp48b"],
+                "4x200G[100G,50G,25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d"]
             }
         },
         "Ethernet384": {
             "index": "49,49,49,49,49,49,49,49",
             "lanes": "384,385,386,387,388,389,390,391",
             "breakout_modes": {
-                "1x400G": ["etp49"],
-                "2x400G[200G]": ["etp49a", "etp49b"],
-                "4x200G[100G]": ["etp49a", "etp49b", "etp49c", "etp49d"],
-                "8x100G[50G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp49"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp49a", "etp49b"],
+                "4x200G[100G,50G,25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d"]
             }
         },
         "Ethernet392": {
             "index": "50,50,50,50,50,50,50,50",
             "lanes": "392,393,394,395,396,397,398,399",
             "breakout_modes": {
-                "1x400G": ["etp50"],
-                "2x400G[200G]": ["etp50a", "etp50b"],
-                "4x200G[100G]": ["etp50a", "etp50b", "etp50c", "etp50d"],
-                "8x100G[50G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp50"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp50a", "etp50b"],
+                "4x200G[100G,50G,25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d"]
             }
         },
         "Ethernet400": {
             "index": "51,51,51,51,51,51,51,51",
             "lanes": "400,401,402,403,404,405,406,407",
             "breakout_modes": {
-                "1x400G": ["etp51"],
-                "2x400G[200G]": ["etp51a", "etp51b"],
-                "4x200G[100G]": ["etp51a", "etp51b", "etp51c", "etp51d"],
-                "8x100G[50G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp51"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp51a", "etp51b"],
+                "4x200G[100G,50G,25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d"]
             }
         },
         "Ethernet408": {
             "index": "52,52,52,52,52,52,52,52",
             "lanes": "408,409,410,411,412,413,414,415",
             "breakout_modes": {
-                "1x400G": ["etp52"],
-                "2x400G[200G]": ["etp52a", "etp52b"],
-                "4x200G[100G]": ["etp52a", "etp52b", "etp52c", "etp52d"],
-                "8x100G[50G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp52"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp52a", "etp52b"],
+                "4x200G[100G,50G,25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d"]
             }
         },
-            "Ethernet416": {
+        "Ethernet416": {
             "index": "53,53,53,53,53,53,53,53",
             "lanes": "416,417,418,419,420,421,422,423",
             "breakout_modes": {
-                "1x400G": ["etp53"],
-                "2x400G[200G]": ["etp53a", "etp53b"],
-                "4x200G[100G]": ["etp53a", "etp53b", "etp53c", "etp53d"],
-                "8x100G[50G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp53"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp53a", "etp53b"],
+                "4x200G[100G,50G,25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d"]
             }
         },
         "Ethernet424": {
             "index": "54,54,54,54,54,54,54,54",
             "lanes": "424,425,426,427,428,429,430,431",
             "breakout_modes": {
-                "1x400G": ["etp54"],
-                "2x400G[200G]": ["etp54a", "etp54b"],
-                "4x200G[100G]": ["etp54a", "etp54b", "etp54c", "etp54d"],
-                "8x100G[50G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp54"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp54a", "etp54b"],
+                "4x200G[100G,50G,25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d"]
             }
         },
         "Ethernet432": {
             "index": "55,55,55,55,55,55,55,55",
             "lanes": "432,433,434,435,436,437,438,439",
             "breakout_modes": {
-                "1x400G": ["etp55"],
-                "2x400G[200G]": ["etp55a", "etp55b"],
-                "4x200G[100G]": ["etp55a", "etp55b", "etp55c", "etp55d"],
-                "8x100G[50G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp55"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp55a", "etp55b"],
+                "4x200G[100G,50G,25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d"]
             }
         },
         "Ethernet440": {
             "index": "56,56,56,56,56,56,56,56",
             "lanes": "440,441,442,443,444,445,446,447",
             "breakout_modes": {
-                "1x400G": ["etp56"],
-                "2x400G[200G]": ["etp56a", "etp56b"],
-                "4x200G[100G]": ["etp56a", "etp56b", "etp56c", "etp56d"],
-                "8x100G[50G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp56"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp56a", "etp56b"],
+                "4x200G[100G,50G,25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d"]
             }
         },
         "Ethernet448": {
             "index": "57,57,57,57,57,57,57,57",
             "lanes": "448,449,450,451,452,453,454,455",
             "breakout_modes": {
-                "1x400G": ["etp57"],
-                "2x400G[200G]": ["etp57a", "etp57b"],
-                "4x200G[100G]": ["etp57a", "etp57b", "etp57c", "etp57d"],
-                "8x100G[50G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp57"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp57a", "etp57b"],
+                "4x200G[100G,50G,25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d"]
             }
         },
         "Ethernet456": {
             "index": "58,58,58,58,58,58,58,58",
             "lanes": "456,457,458,459,460,461,462,463",
             "breakout_modes": {
-                "1x400G": ["etp58"],
-                "2x400G[200G]": ["etp58a", "etp58b"],
-                "4x200G[100G]": ["etp58a", "etp58b", "etp58c", "etp58d"],
-                "8x100G[50G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp58"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp58a", "etp58b"],
+                "4x200G[100G,50G,25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d"]
             }
         },
         "Ethernet464": {
             "index": "59,59,59,59,59,59,59,59",
             "lanes": "464,465,466,467,468,469,470,471",
             "breakout_modes": {
-                "1x400G": ["etp59"],
-                "2x400G[200G]": ["etp59a", "etp59b"],
-                "4x200G[100G]": ["etp59a", "etp59b", "etp59c", "etp59d"],
-                "8x100G[50G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp59"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp59a", "etp59b"],
+                "4x200G[100G,50G,25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d"]
             }
         },
         "Ethernet472": {
             "index": "60,60,60,60,60,60,60,60",
             "lanes": "472,473,474,475,476,477,478,479",
             "breakout_modes": {
-                "1x400G": ["etp60"],
-                "2x400G[200G]": ["etp60a", "etp60b"],
-                "4x200G[100G]": ["etp60a", "etp60b", "etp60c", "etp60d"],
-                "8x100G[50G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e",  "etp60f", "etp60g", "etp60h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp60"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp60a", "etp60b"],
+                "4x200G[100G,50G,25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d"]
             }
         },
         "Ethernet480": {
             "index": "61,61,61,61,61,61,61,61",
             "lanes": "480,481,482,483,484,485,486,487",
             "breakout_modes": {
-                "1x400G": ["etp61"],
-                "2x400G[200G]": ["etp61a", "etp61b"],
-                "4x200G[100G]": ["etp61a", "etp61b", "etp61c", "etp61d"],
-                "8x100G[50G]": ["etp61a", "etp61b", "etp61c",  "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp61"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp61a", "etp61b"],
+                "4x200G[100G,50G,25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d"]
             }
         },
         "Ethernet488": {
             "index": "62,62,62,62,62,62,62,62",
             "lanes": "488,489,490,491,492,493,494,495",
             "breakout_modes": {
-                "1x400G": ["etp62"],
-                "2x400G[200G]": ["etp62a", "etp62b"],
-                "4x200G[100G]": ["etp62a", "etp62b", "etp62c", "etp62d"],
-                "8x100G[50G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e",  "etp62f", "etp62g", "etp62h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp62"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp62a", "etp62b"],
+                "4x200G[100G,50G,25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d"]
             }
         },
         "Ethernet496": {
             "index": "63,63,63,63,63,63,63,63",
             "lanes": "496,497,498,499,500,501,502,503",
             "breakout_modes": {
-                "1x400G": ["etp63"],
-                "2x400G[200G]": ["etp63a", "etp63b"],
-                "4x200G[100G]": ["etp63a", "etp63b", "etp63c", "etp63d"],
-                "8x100G[50G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp63"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp63a", "etp63b"],
+                "4x200G[100G,50G,25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d"]
             }
         },
         "Ethernet504": {
             "index": "64,64,64,64,64,64,64,64",
             "lanes": "504,505,506,507,508,509,510,511",
             "breakout_modes": {
-                "1x400G": ["etp64"],
-                "2x400G[200G]": ["etp64a", "etp64b"],
-                "4x200G[100G]": ["etp64a", "etp64b", "etp64c", "etp64d"],
-                "8x100G[50G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"]
+                "1x800G[400G,200G,100G,50G,40G,25G,10G]": ["etp64"],
+                "2x400G[200G,100G,50G,40G,25G,10G]": ["etp64a", "etp64b"],
+                "4x200G[100G,50G,25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d"]
             }
         },
         "Ethernet512": {
diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn5610n-r0/sensors.conf
index cac9a5e83e7..900def2bc38 100644
--- a/device/mellanox/x86_64-nvidia_sn5610n-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/sensors.conf
@@ -1,7 +1,7 @@
 ##################################################################################
-# Copyright (c) 2019-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 #
-# Platform specific sensors config for SN5640
+# Platform specific sensors config for SN5610N
 ##################################################################################
 
 # Fan and port ambient temperature sensors
@@ -357,8 +357,8 @@ chip "mp2891-i2c-*-6e"
     label power2   "PMIC-11 VDDSCC Rail Pwr (out1)"
     label power3   "PMIC-11 DVDD_M Rail Pwr (out2)"
     label curr1    "PMIC-11 13V5 VDDSCC DVDD_M Rail Curr (in1)"
-    label curr2    "PMIC-11 VDDSCC Rail Curr (out1)"
-    label curr3    "PMIC-11 DVDD_M Rail Curr (out2)"
+    label curr2    "PMIC-11 DVDD_M Rail Curr (out1)"
+    label curr3    "PMIC-11 VDDSCC Rail Curr (out2)"
     ignore curr4
     ignore curr5
     ignore curr6
@@ -372,8 +372,8 @@ chip "xdpe1a2g7-i2c-*-6e"
     label power2   "PMIC-11 VDDSCC Rail Pwr (out1)"
     label power3   "PMIC-11 DVDD_M Rail Pwr (out2)"
     label curr1    "PMIC-11 13V5 VDDSCC DVDD_M Rail Curr (in1)"
-    label curr2    "PMIC-11 VDDSCC Rail Curr (out1)"
-    label curr3    "PMIC-11 DVDD_M Rail Curr (out2)"
+    label curr2    "PMIC-11 DVDD_M Rail Curr (out1)"
+    label curr3    "PMIC-11 VDDSCC Rail Curr (out2)"
     ignore curr4
     ignore curr5
     ignore curr6
@@ -382,7 +382,7 @@ chip "xdpe1a2g7-i2c-*-6e"
 chip "dps460-i2c-*-59"
     label in1 "PSU-1(L) 220V Rail (in)"
     ignore in2
-    label in3 "PSU-1(L) 54V Rail (out)"
+    label in3 "PSU-1(L) 12V Rail (out)"
     ignore fan2
     ignore fan3
     label fan1 "PSU-1(L) Fan 1"
@@ -390,29 +390,29 @@ chip "dps460-i2c-*-59"
     label temp2 "PSU-1(L) Temp 2"
     label temp3 "PSU-1(L) Temp 3"
     label power1 "PSU-1(L) 220V Rail Pwr (in)"
-    label power2 "PSU-1(L) 54V Rail Pwr (out)"
+    label power2 "PSU-1(L) 12V Rail Pwr (out)"
     label curr1 "PSU-1(L) 220V Rail Curr (in)"
-    label curr2 "PSU-1(L) 54V Rail Curr (out)"
+    label curr2 "PSU-1(L) 12V Rail Curr (out)"
     set power2_cap 0
 chip "dps460-i2c-*-58"
-    label in1 "PSU-2(R) 220V Rail (in)"
+    label in1 "PSU-2(L) 220V Rail (in)"
     ignore in2
-    label in3 "PSU-2(R) 54V Rail (out)"
+    label in3 "PSU-2(L) 12V Rail (out)"
     ignore fan2
     ignore fan3
-    label fan1 "PSU-2(R) Fan 1"
-    label temp1 "PSU-2(R) Temp 1"
-    label temp2 "PSU-2(R) Temp 2"
-    label temp3 "PSU-2(R) Temp 3"
-    label power1 "PSU-2(R) 220V Rail Pwr (in)"
-    label power2 "PSU-2(R) 54V Rail Pwr (out)"
-    label curr1 "PSU-2(R) 220V Rail Curr (in)"
-    label curr2 "PSU-2(R) 54V Rail Curr (out)"
+    label fan1 "PSU-2(L) Fan 1"
+    label temp1 "PSU-2(L) Temp 1"
+    label temp2 "PSU-2(L) Temp 2"
+    label temp3 "PSU-2(L) Temp 3"
+    label power1 "PSU-2(L) 220V Rail Pwr (in)"
+    label power2 "PSU-2(L) 12V Rail Pwr (out)"
+    label curr1 "PSU-2(L) 220V Rail Curr (in)"
+    label curr2 "PSU-2(L) 12V Rail Curr (out)"
     set power2_cap 0
 chip "dps460-i2c-*-5b"
     label in1 "PSU-3(R) 220V Rail (in)"
     ignore in2
-    label in3 "PSU-3(R) 54V Rail (out)"
+    label in3 "PSU-3(R) 12V Rail (out)"
     ignore fan2
     ignore fan3
     label fan1 "PSU-3(R) Fan 1"
@@ -420,14 +420,14 @@ chip "dps460-i2c-*-5b"
     label temp2 "PSU-3(R) Temp 2"
     label temp3 "PSU-3(R) Temp 3"
     label power1 "PSU-3(R) 220V Rail Pwr (in)"
-    label power2 "PSU-3(R) 54V Rail Pwr (out)"
+    label power2 "PSU-3(R) 12V Rail Pwr (out)"
     label curr1 "PSU-3(R) 220V Rail Curr (in)"
-    label curr2 "PSU-3(R) 54V Rail Curr (out)"
+    label curr2 "PSU-3(R) 12V Rail Curr (out)"
     set power2_cap 0
 chip "dps460-i2c-*-5a"
     label in1 "PSU-4(R) 220V Rail (in)"
     ignore in2
-    label in3 "PSU-4(R) 54V Rail (out)"
+    label in3 "PSU-4(R) 12V Rail (out)"
     ignore fan2
     ignore fan3
     label fan1 "PSU-4(R) Fan 1"
@@ -435,11 +435,24 @@ chip "dps460-i2c-*-5a"
     label temp2 "PSU-4(R) Temp 2"
     label temp3 "PSU-4(R) Temp 3"
     label power1 "PSU-4(R) 220V Rail Pwr (in)"
-    label power2 "PSU-4(R) 54V Rail Pwr (out)"
+    label power2 "PSU-4(R) 12V Rail Pwr (out)"
     label curr1 "PSU-4(R) 220V Rail Curr (in)"
-    label curr2 "PSU-4(R) 54V Rail Curr (out)"
+    label curr2 "PSU-4(R) 12V Rail Curr (out)"
     set power2_cap 0
 
+# Chassis fans
+chip "mlxreg_fan-isa-*"
+    label fan1 "Chassis Fan Drawer-1 Tach 1"
+    label fan2 "Chassis Fan Drawer-1 Tach 2"
+    label fan3 "Chassis Fan Drawer-2 Tach 1"
+    label fan4 "Chassis Fan Drawer-2 Tach 2"
+    label fan5 "Chassis Fan Drawer-3 Tach 1"
+    label fan6 "Chassis Fan Drawer-3 Tach 2"
+    label fan7 "Chassis Fan Drawer-4 Tach 1"
+    label fan8 "Chassis Fan Drawer-4 Tach 2"
+    label fan9 "Chassis Fan Drawer-5 Tach 1"
+    label fan10 "Chassis Fan Drawer-5 Tach 2"
+
 # AMD Comex Power controllers
 chip "mp2855-i2c-*-69"
     label in1 "PMIC-12 COMEX (in) VDDCR INPUT VOLT"
@@ -486,5 +499,5 @@ chip "nvme-pci-*"
     ignore temp3
 
 # Ethernet PHY temperature sensor
-chip "00000500400-mdio-5"
-   label temp1 "PHY TEMP"
+chip "*-mdio-*"
+   ignore temp1
diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/pmon_daemon_control.json
deleted file mode 100644
index 208fa63ca29..00000000000
--- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/pmon_daemon_control.json
+++ /dev/null
@@ -1,6 +0,0 @@
-{
-    "skip_ledd": true,
-    "skip_fancontrol": true,
-    "skip_xcvrd_cmis_mgr": false
-}
-
diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/pmon_daemon_control.json
new file mode 120000
index 00000000000..e31c68ca746
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/pmon_daemon_control.json
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai.profile b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai.profile
index 67754135419..48d3deae762 100644
--- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai.profile
@@ -1,4 +1,4 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640_448x100g_16x400g.xml
-SAI_INDEPENDENT_MODULE_MODE=1
 SAI_KEY_SPC5_LOSSY_SCHEDULING=1
-SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_INDEPENDENT_MODULE_MODE=1
+SAI_KEY_DISABLE_PORT_ALPHA=1
diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/traffic_config.j2
new file mode 120000
index 00000000000..459b2cd345e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/traffic_config.j2
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/traffic_config.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/pmon_daemon_control.json
deleted file mode 100644
index 208fa63ca29..00000000000
--- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/pmon_daemon_control.json
+++ /dev/null
@@ -1,6 +0,0 @@
-{
-    "skip_ledd": true,
-    "skip_fancontrol": true,
-    "skip_xcvrd_cmis_mgr": false
-}
-
diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/pmon_daemon_control.json
new file mode 120000
index 00000000000..e31c68ca746
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/pmon_daemon_control.json
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai.profile b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai.profile
index 0b29739b9bd..df8f73d4c36 100644
--- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai.profile
@@ -1,4 +1,4 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640_512x100g.xml
-SAI_INDEPENDENT_MODULE_MODE=1
 SAI_KEY_SPC5_LOSSY_SCHEDULING=1
-SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_INDEPENDENT_MODULE_MODE=1
+SAI_KEY_DISABLE_PORT_ALPHA=1
diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/traffic_config.j2
new file mode 100644
index 00000000000..b61ba3da1b6
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/traffic_config.j2
@@ -0,0 +1,34 @@
+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+
+{# Set traffic_classification_enable to true for Bison platform #}
+{%- set traffic_classification_enable = true %}
+
+{#
+The calculation formula for wred_threshold_limit is as follows:
+egress_lossless_pool total size / 12 / 1024
+Where:
+- egress_lossless_pool total size = 136209408 bytes
+- 12 represents the number of queues
+- 1024 is used to convert the unit from bytes to KB
+
+The result is 11084 (rounded down).
+
+So, wred_threshold_limit = 136209408 / 12 / 1024 = 11084 (KB per queue)
+
+The final total value is:
+11084 (KB) * 12 (queues) * 1024 = 136200192 bytes
+#}
+{% set wred_threshold_limit = 136200192 %}
diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn5640-r0/sensors.conf
index 209768788ac..df7cd5bf0a2 100644
--- a/device/mellanox/x86_64-nvidia_sn5640-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn5640-r0/sensors.conf
@@ -1,13 +1,9 @@
 ##################################################################################
-# Copyright (c) 2019-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 #
 # Platform specific sensors config for SN5640
 ##################################################################################
 
-# ASIC temperature sensor
-chip "mlxsw-i2c-*-48"
-    label temp1 "Ambient ASIC Temp"
-
 # Fan and port ambient temperature sensors
 chip "tmp102-i2c-*-49"
     label temp1 "Ambient Fan Side Temp (air exhaust)"
@@ -361,8 +357,8 @@ chip "mp2891-i2c-*-6e"
     label power2   "PMIC-11 VDDSCC Rail Pwr (out1)"
     label power3   "PMIC-11 DVDD_M Rail Pwr (out2)"
     label curr1    "PMIC-11 13V5 VDDSCC DVDD_M Rail Curr (in1)"
-    label curr2    "PMIC-11 VDDSCC Rail Curr (out1)"
-    label curr3    "PMIC-11 DVDD_M Rail Curr (out2)"
+    label curr2    "PMIC-11 DVDD_M Rail Curr (out1)"
+    label curr3    "PMIC-11 VDDSCC Rail Curr (out2)"
     ignore curr4
     ignore curr5
     ignore curr6
@@ -376,8 +372,8 @@ chip "xdpe1a2g7-i2c-*-6e"
     label power2   "PMIC-11 VDDSCC Rail Pwr (out1)"
     label power3   "PMIC-11 DVDD_M Rail Pwr (out2)"
     label curr1    "PMIC-11 13V5 VDDSCC DVDD_M Rail Curr (in1)"
-    label curr2    "PMIC-11 VDDSCC Rail Curr (out1)"
-    label curr3    "PMIC-11 DVDD_M Rail Curr (out2)"
+    label curr2    "PMIC-11 DVDD_M Rail Curr (out1)"
+    label curr3    "PMIC-11 VDDSCC Rail Curr (out2)"
     ignore curr4
     ignore curr5
     ignore curr6
@@ -406,7 +402,7 @@ chip "dps460-i2c-*-58"
     ignore fan3
     label fan1 "PSU-2(L) Fan 1"
     label temp1 "PSU-2(L) Temp 1"
-    label temp2 "PSU-2(R) Temp 2"
+    label temp2 "PSU-2(L) Temp 2"
     label temp3 "PSU-2(L) Temp 3"
     label power1 "PSU-2(L) 220V Rail Pwr (in)"
     label power2 "PSU-2(L) 12V Rail Pwr (out)"
@@ -444,6 +440,19 @@ chip "dps460-i2c-*-5a"
     label curr2 "PSU-4(R) 12V Rail Curr (out)"
     set power2_cap 0
 
+# Chassis fans
+chip "mlxreg_fan-isa-*"
+    label fan1 "Chassis Fan Drawer-1 Tach 1"
+    label fan2 "Chassis Fan Drawer-1 Tach 2"
+    label fan3 "Chassis Fan Drawer-2 Tach 1"
+    label fan4 "Chassis Fan Drawer-2 Tach 2"
+    label fan5 "Chassis Fan Drawer-3 Tach 1"
+    label fan6 "Chassis Fan Drawer-3 Tach 2"
+    label fan7 "Chassis Fan Drawer-4 Tach 1"
+    label fan8 "Chassis Fan Drawer-4 Tach 2"
+    label fan9 "Chassis Fan Drawer-5 Tach 1"
+    label fan10 "Chassis Fan Drawer-5 Tach 2"
+
 # AMD Comex Power controllers
 chip "mp2855-i2c-*-69"
     label in1 "PMIC-12 COMEX (in) VDDCR INPUT VOLT"
@@ -490,5 +499,5 @@ chip "nvme-pci-*"
     ignore temp3
 
 # Ethernet PHY temperature sensor
-chip "00000400400-mdio-4"
-   label temp1 "Eth Phy Temp"
+chip "*-mdio-*"
+   ignore temp1
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile
index fc98a5ebf90..b31cf264e80 100644
--- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile
@@ -1,4 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640.xml
 SAI_KEY_SPC5_LOSSY_SCHEDULING=1
-SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
-
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/hwsku.json b/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/hwsku.json
index 664c6740cc9..ad7a971ede7 100644
--- a/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/hwsku.json
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/hwsku.json
@@ -1,100 +1,164 @@
 {
 	"interfaces": {
         "Ethernet1": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet5": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet9": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet13": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet17": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet21": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet25": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet29": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet33": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet37": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet41": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet45": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet49": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet53": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet57": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet61": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet65": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet69": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet73": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet77": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet81": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet85": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet89": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet93": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet97": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet101": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet105": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet109": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet113": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet117": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet121": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         },
         "Ethernet125": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "none"
         }
 	}
 }
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/common_config_support b/device/micas/x86_64-micas_m2-w6510-32c-r0/common_config_support
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6510-32c-r0/custom_led.bin
index 2800e7b4ee9..abe558477e8 100644
Binary files a/device/micas/x86_64-micas_m2-w6510-32c-r0/custom_led.bin and b/device/micas/x86_64-micas_m2-w6510-32c-r0/custom_led.bin differ
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/installer.conf b/device/micas/x86_64-micas_m2-w6510-32c-r0/installer.conf
index 7a9fec8cc99..55b86ec10a3 100644
--- a/device/micas/x86_64-micas_m2-w6510-32c-r0/installer.conf
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/installer.conf
@@ -1,2 +1,3 @@
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
\ No newline at end of file
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
+ONIE_IMAGE_PART_SIZE=1048576
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/ssd_util.py
index e8cf2e1a7cb..74ac0921ddf 100644
--- a/device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/ssd_util.py
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/ssd_util.py
@@ -63,6 +63,7 @@ def __init__(self, diskdev):
         """
         self.model_attr = {
              "ER2-GD"       : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "ER3-GD"       : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
              "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
              "SSDSCK"       : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
              "SM619GXC"     : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/port_config.ini b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/port_config.ini
old mode 100755
new mode 100644
index 46414e44002..475104931ea
--- a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/port_config.ini
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/port_config.ini
@@ -1,53 +1,53 @@
-# name          lanes                alias                     index      speed
-Ethernet1       26                  gigabitE0/1                 0          1000
-Ethernet2       25                  gigabitE0/2                 1          1000
-Ethernet3       28                  gigabitE0/3                 2          1000
-Ethernet4       27                  gigabitE0/4                 3          1000
-Ethernet5       30                  gigabitE0/5                 4          1000
-Ethernet6       29                  gigabitE0/6                 5          1000
-Ethernet7       32                  gigabitE0/7                 6          1000
-Ethernet8       31                  gigabitE0/8                 7          1000
-Ethernet9       34                  gigabitE0/9                 8          1000
-Ethernet10      33                  gigabitE0/10                9          1000
-Ethernet11      36                  gigabitE0/11                10         1000
-Ethernet12      35                  gigabitE0/12                11         1000
-Ethernet13      38                  gigabitE0/13                12         1000
-Ethernet14      37                  gigabitE0/14                13         1000
-Ethernet15      40                  gigabitE0/15                14         1000
-Ethernet16      39                  gigabitE0/16                15         1000
-Ethernet17      42                  gigabitE0/17                16         1000
-Ethernet18      41                  gigabitE0/18                17         1000
-Ethernet19      44                  gigabitE0/19                18         1000
-Ethernet20      43                  gigabitE0/20                19         1000
-Ethernet21      50                  gigabitE0/21                20         1000
-Ethernet22      49                  gigabitE0/22                21         1000
-Ethernet23      52                  gigabitE0/23                22         1000
-Ethernet24      51                  gigabitE0/24                23         1000
-Ethernet25      1                   gigabitE0/25                24         1000
-Ethernet26      2                   gigabitE0/26                25         1000
-Ethernet27      3                   gigabitE0/27                26         1000
-Ethernet28      4                   gigabitE0/28                27         1000
-Ethernet29      5                   gigabitE0/29                28         1000
-Ethernet30      6                   gigabitE0/30                29         1000
-Ethernet31      7                   gigabitE0/31                30         1000
-Ethernet32      8                   gigabitE0/32                31         1000
-Ethernet33      9                   gigabitE0/33                32         1000
-Ethernet34      10                  gigabitE0/34                33         1000
-Ethernet35      11                  gigabitE0/35                34         1000
-Ethernet36      12                  gigabitE0/36                35         1000
-Ethernet37      13                  gigabitE0/37                36         1000
-Ethernet38      14                  gigabitE0/38                37         1000
-Ethernet39      15                  gigabitE0/39                38         1000
-Ethernet40      16                  gigabitE0/40                39         1000
-Ethernet41      17                  gigabitE0/41                40         1000
-Ethernet42      18                  gigabitE0/42                41         1000
-Ethernet43      19                  gigabitE0/43                42         1000
-Ethernet44      20                  gigabitE0/44                43         1000
-Ethernet45      21                  gigabitE0/45                44         1000
-Ethernet46      22                  gigabitE0/46                45         1000
-Ethernet47      23                  gigabitE0/47                46         1000
-Ethernet48      24                  gigabitE0/48                47         1000
-Ethernet49      58               twentyfiveGigE0/1              48         25000
-Ethernet50      57               twentyfiveGigE0/2              49         25000
-Ethernet51      60               twentyfiveGigE0/3              50         25000
-Ethernet52      59               twentyfiveGigE0/4              51         25000
\ No newline at end of file
+# name          lanes                alias                     index      speed        autoneg        fec
+Ethernet1       26                  gigabitE0/1                 0          1000        on             none
+Ethernet2       25                  gigabitE0/2                 1          1000        on             none
+Ethernet3       28                  gigabitE0/3                 2          1000        on             none
+Ethernet4       27                  gigabitE0/4                 3          1000        on             none
+Ethernet5       30                  gigabitE0/5                 4          1000        on             none
+Ethernet6       29                  gigabitE0/6                 5          1000        on             none
+Ethernet7       32                  gigabitE0/7                 6          1000        on             none
+Ethernet8       31                  gigabitE0/8                 7          1000        on             none
+Ethernet9       34                  gigabitE0/9                 8          1000        on             none
+Ethernet10      33                  gigabitE0/10                9          1000        on             none
+Ethernet11      36                  gigabitE0/11                10         1000        on             none
+Ethernet12      35                  gigabitE0/12                11         1000        on             none
+Ethernet13      38                  gigabitE0/13                12         1000        on             none
+Ethernet14      37                  gigabitE0/14                13         1000        on             none
+Ethernet15      40                  gigabitE0/15                14         1000        on             none
+Ethernet16      39                  gigabitE0/16                15         1000        on             none
+Ethernet17      42                  gigabitE0/17                16         1000        on             none
+Ethernet18      41                  gigabitE0/18                17         1000        on             none
+Ethernet19      44                  gigabitE0/19                18         1000        on             none
+Ethernet20      43                  gigabitE0/20                19         1000        on             none
+Ethernet21      50                  gigabitE0/21                20         1000        on             none
+Ethernet22      49                  gigabitE0/22                21         1000        on             none
+Ethernet23      52                  gigabitE0/23                22         1000        on             none
+Ethernet24      51                  gigabitE0/24                23         1000        on             none
+Ethernet25      1                   gigabitE0/25                24         1000        on             none
+Ethernet26      2                   gigabitE0/26                25         1000        on             none
+Ethernet27      3                   gigabitE0/27                26         1000        on             none
+Ethernet28      4                   gigabitE0/28                27         1000        on             none
+Ethernet29      5                   gigabitE0/29                28         1000        on             none
+Ethernet30      6                   gigabitE0/30                29         1000        on             none
+Ethernet31      7                   gigabitE0/31                30         1000        on             none
+Ethernet32      8                   gigabitE0/32                31         1000        on             none
+Ethernet33      9                   gigabitE0/33                32         1000        on             none
+Ethernet34      10                  gigabitE0/34                33         1000        on             none
+Ethernet35      11                  gigabitE0/35                34         1000        on             none
+Ethernet36      12                  gigabitE0/36                35         1000        on             none
+Ethernet37      13                  gigabitE0/37                36         1000        on             none
+Ethernet38      14                  gigabitE0/38                37         1000        on             none
+Ethernet39      15                  gigabitE0/39                38         1000        on             none
+Ethernet40      16                  gigabitE0/40                39         1000        on             none
+Ethernet41      17                  gigabitE0/41                40         1000        on             none
+Ethernet42      18                  gigabitE0/42                41         1000        on             none
+Ethernet43      19                  gigabitE0/43                42         1000        on             none
+Ethernet44      20                  gigabitE0/44                43         1000        on             none
+Ethernet45      21                  gigabitE0/45                44         1000        on             none
+Ethernet46      22                  gigabitE0/46                45         1000        on             none
+Ethernet47      23                  gigabitE0/47                46         1000        on             none
+Ethernet48      24                  gigabitE0/48                47         1000        on             none
+Ethernet49      58               twentyfiveGigE0/1              48         25000       off            none
+Ethernet50      57               twentyfiveGigE0/2              49         25000       off            none
+Ethernet51      60               twentyfiveGigE0/3              50         25000       off            none
+Ethernet52      59               twentyfiveGigE0/4              51         25000       off            none
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/common_config_support b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/common_config_support
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/installer.conf b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/installer.conf
index 7fd2c7a28d4..5e6fb414f27 100644
--- a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/installer.conf
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/installer.conf
@@ -1,4 +1,5 @@
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt sdhci.debug_quirks2=0x1cc modprobe.blacklist=i2c_ismt,i2c_i801,r8169,spi_intel,spi_intel_platform,spi_intel_pci,pnd2_edac"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt sdhci.debug_quirks2=0x1cc modprobe.blacklist=i2c_ismt,i2c_i801,r8169,spi_intel,spi_intel_platform,spi_intel_pci,pnd2_edac irqpoll"
 CONSOLE_PORT=0xe060
-CONSOLE_DEV=0
\ No newline at end of file
+CONSOLE_DEV=0
+ONIE_IMAGE_PART_SIZE=1048576
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml
index 03062f6be93..f236dba2bf8 100644
--- a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml
@@ -111,12 +111,6 @@
   id: 19dc
   name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
     11)'
-- bus: '00'
-  dev: 1f
-  fn: '1'
-  id: 19dd
-  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Primary
-    to Side Band (P2SB) Bridge (rev 11)'
 - bus: '00'
   dev: 1f
   fn: '2'
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json
index 9a5a4d2b642..def9742f1c5 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json
@@ -1,172 +1,284 @@
 {
-	"interfaces": {
-			"Ethernet1": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet2": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet3": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet4": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet5": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet6": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet7": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet8": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet9": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet10": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet11": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet12": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet13": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet14": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet15": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet16": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet17": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet18": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet19": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet20": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet21": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet22": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet23": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet24": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet25": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet26": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet27": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet28": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet29": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet30": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet31": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet32": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet33": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet34": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet35": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet36": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet37": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet38": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet39": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet40": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet41": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet42": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet43": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet44": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet45": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet46": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet47": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet48": {
-				"default_brkout_mode": "1x25G"
-			},
-			"Ethernet49": {
-				"default_brkout_mode": "1x100G"
-			},
-			"Ethernet53": {
-				"default_brkout_mode": "1x100G"
-			},
-			"Ethernet57": {
-				"default_brkout_mode": "1x100G"
-			},
-			"Ethernet61": {
-				"default_brkout_mode": "1x100G"
-			},
-			"Ethernet65": {
-				"default_brkout_mode": "1x100G"
-			},
-			"Ethernet69": {
-				"default_brkout_mode": "1x100G"
-			},
-			"Ethernet73": {
-				"default_brkout_mode": "1x100G"
-			},
-			"Ethernet77": {
-				"default_brkout_mode": "1x100G"
-			}
-	}
+    "interfaces": {
+            "Ethernet1": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet2": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet3": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet4": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet5": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet6": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet7": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet8": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet9": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet10": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet11": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet12": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet13": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet14": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet15": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet16": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet17": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet18": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet19": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet20": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet21": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet22": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet23": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet24": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet25": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet26": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet27": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet28": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet29": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet30": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet31": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet32": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet33": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet34": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet35": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet36": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet37": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet38": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet39": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet40": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet41": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet42": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet43": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet44": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet45": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet46": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet47": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet48": {
+                "default_brkout_mode": "1x25G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet49": {
+                "default_brkout_mode": "1x100G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet53": {
+                "default_brkout_mode": "1x100G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet57": {
+                "default_brkout_mode": "1x100G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet61": {
+                "default_brkout_mode": "1x100G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet65": {
+                "default_brkout_mode": "1x100G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet69": {
+                "default_brkout_mode": "1x100G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet73": {
+                "default_brkout_mode": "1x100G",
+                "autoneg": "off",
+                "fec": "none"
+            },
+            "Ethernet77": {
+                "default_brkout_mode": "1x100G",
+                "autoneg": "off",
+                "fec": "none"
+            }
+    }
 }
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/common_config_support b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/common_config_support
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/custom_led.bin
index e02f94e7ed8..38b14c5fa1b 100644
Binary files a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/custom_led.bin and b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/custom_led.bin differ
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
index 921c511b10c..2135020186a 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
@@ -1 +1 @@
-M2-W6510-48V8C t1
+M2-W6510-48V8C l2
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
index 2a5d7d83f10..10ee7197a97 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
@@ -1,2 +1,3 @@
 CONSOLE_SPEED=115200
 ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll modprobe.blacklist=spi_intel,spi_intel_platform,spi_intel_pci"
+ONIE_IMAGE_PART_SIZE=1048576
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/hwsku.json b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/hwsku.json
index cadf2fb312e..ad84930929d 100644
--- a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/hwsku.json
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/hwsku.json
@@ -1,100 +1,164 @@
 {
     "interfaces": {
         "Ethernet1": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet5": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet9": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet13": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet17": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet21": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet25": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet29": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet33": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet37": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet41": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet45": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet49": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet53": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet57": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet61": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet65": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet69": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet73": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet77": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet81": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet85": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet89": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet93": {
-            "default_brkout_mode": "1x200G"
+            "default_brkout_mode": "1x200G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet97": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet105": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet113": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet121": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet129": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet137": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet145": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet153": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         }
     }
 }
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G-copper.yml b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G-copper.yml
index 8a7c7a7e9fb..9392fc54e7f 100644
--- a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G-copper.yml
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G-copper.yml
@@ -4,7 +4,7 @@ bcm_device:
         global:
             bcm_tunnel_term_compatible_mode: 1
             vlan_flooding_l2mc_num_reserved: 2048
-            l3_alpm_template: 2
+            l3_alpm_template: 1
             l3_alpm2_bnk_threshold: 100
             uft_mode: 1
             l3_enable: 1
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G.yml b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G.yml
index 779f4b79d1b..2c01164a93b 100644
--- a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G.yml
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G.yml
@@ -5,13 +5,12 @@ bcm_device:
             bcm_tunnel_term_compatible_mode: 1
             vlan_flooding_l2mc_num_reserved: 0
             shared_block_mask_section: uc_bc
-            l3_alpm_template: 2
+            l3_alpm_template: 1
             l3_alpm2_bnk_threshold: 100
             svi_my_station_optimization: 1
-            sai_nbr_bcast_ifp_optimized: 2
             uft_mode: 1
             l3_enable: 1
-            l2_hitbit_enable: 0
+            l2_hitbit_enable: 1
             pktio_mode: 1
             sai_optimized_mmu: 1
             sai_pfc_defaults_disable: 1
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/common_config_support b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/common_config_support
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/installer.conf
index 7a9fec8cc99..55b86ec10a3 100644
--- a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/installer.conf
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/installer.conf
@@ -1,2 +1,3 @@
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
\ No newline at end of file
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
+ONIE_IMAGE_PART_SIZE=1048576
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/hwsku.json b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/hwsku.json
index 1535dc8ad4d..526b0c10ccb 100644
--- a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/hwsku.json
+++ b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/hwsku.json
@@ -1,172 +1,284 @@
 {
     "interfaces": {
         "Ethernet1": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet2": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet3": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet4": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet5": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet6": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet7": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet8": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet9": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet10": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet11": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet12": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet13": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet14": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet15": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet16": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet17": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet18": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet19": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet20": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet21": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet22": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet23": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet24": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet25": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet26": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet27": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet28": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet29": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet30": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet31": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet32": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet33": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet34": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet35": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet36": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet37": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet38": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet39": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet40": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet41": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet42": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet43": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet44": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet45": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet46": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet47": {
-            "default_brkout_mode": "1x100G"
-        },
-        "Ethernet48": {
-            "default_brkout_mode": "1x100G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet49": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet51": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet53": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet55": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet57": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet59": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet61": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet63": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet65": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet67": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet69": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet71": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet73": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet75": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet77": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet79": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet81": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet83": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet85": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet87": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet89": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet91": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet93": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet95": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet97": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet105": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet113": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet121": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet129": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet137": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet145": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet153": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         }
     }
 }
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/port_config.ini b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/port_config.ini
index ec85bf921d9..d01243d4e20 100644
--- a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/port_config.ini
+++ b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/port_config.ini
@@ -1,57 +1,57 @@
 # name                lanes                                    alias                      index     speed
 Ethernet1             41,42                                    hundredGigE0/1             0         100000
-Ethernet2             43,44                                    hundredGigE0/2             1         100000
-Ethernet3             45,46                                    hundredGigE0/3             2         100000
-Ethernet4             47,48                                    hundredGigE0/4             3         100000
-Ethernet5             49,50                                    hundredGigE0/5             4         100000
-Ethernet6             51,52                                    hundredGigE0/6             5         100000
-Ethernet7             53,54                                    hundredGigE0/7             6         100000
-Ethernet8             55,56                                    hundredGigE0/8             7         100000
-Ethernet9             57,58                                    hundredGigE0/9             8         100000
-Ethernet10            59,60                                    hundredGigE0/10            9         100000
-Ethernet11            61,62                                    hundredGigE0/11            10        100000
-Ethernet12            63,64                                    hundredGigE0/12            11        100000
-Ethernet13            9,10                                     hundredGigE0/13            12        100000
-Ethernet14            11,12                                    hundredGigE0/14            13        100000
-Ethernet15            13,14                                    hundredGigE0/15            14        100000
-Ethernet16            15,16                                    hundredGigE0/16            15        100000
-Ethernet17            17,18                                    hundredGigE0/17            16        100000
-Ethernet18            19,20                                    hundredGigE0/18            17        100000
-Ethernet19            21,22                                    hundredGigE0/19            18        100000
-Ethernet20            23,24                                    hundredGigE0/20            19        100000
-Ethernet21            25,26                                    hundredGigE0/21            20        100000
-Ethernet22            27,28                                    hundredGigE0/22            21        100000
-Ethernet23            29,30                                    hundredGigE0/23            22        100000
-Ethernet24            31,32                                    hundredGigE0/24            23        100000
-Ethernet25            81,82                                    hundredGigE0/25            24        100000
-Ethernet26            83,84                                    hundredGigE0/26            25        100000
-Ethernet27            85,86                                    hundredGigE0/27            26        100000
-Ethernet28            87,88                                    hundredGigE0/28            27        100000
-Ethernet29            89,90                                    hundredGigE0/29            28        100000
-Ethernet30            91,92                                    hundredGigE0/30            29        100000
-Ethernet31            93,94                                    hundredGigE0/31            30        100000
-Ethernet32            95,96                                    hundredGigE0/32            31        100000
-Ethernet33            97,98                                    hundredGigE0/33            32        100000
-Ethernet34            99,100                                   hundredGigE0/34            33        100000
-Ethernet35            101,102                                  hundredGigE0/35            34        100000
-Ethernet36            103,104                                  hundredGigE0/36            35        100000
-Ethernet37            137,138                                  hundredGigE0/37            36        100000
-Ethernet38            139,140                                  hundredGigE0/38            37        100000
-Ethernet39            141,142                                  hundredGigE0/39            38        100000
-Ethernet40            143,144                                  hundredGigE0/40            39        100000
-Ethernet41            145,146                                  hundredGigE0/41            40        100000
-Ethernet42            147,148                                  hundredGigE0/42            41        100000
-Ethernet43            149,150                                  hundredGigE0/43            42        100000
-Ethernet44            151,152                                  hundredGigE0/44            43        100000
-Ethernet45            153,154                                  hundredGigE0/45            44        100000
-Ethernet46            155,156                                  hundredGigE0/46            45        100000
-Ethernet47            157,158                                  hundredGigE0/47            46        100000
-Ethernet48            159,160                                  hundredGigE0/48            47        100000
-Ethernet49            1,2,3,4,5,6,7,8                          fourHundredGigE0/1         48        400000
-Ethernet57            33,34,35,36,37,38,39,40                  fourHundredGigE0/2         49        400000
-Ethernet65            73,74,75,76,77,78,79,80                  fourHundredGigE0/3         50        400000
-Ethernet73            65,66,67,68,69,70,71,72                  fourHundredGigE0/4         51        400000
-Ethernet81            105,106,107,108,109,110,111,112          fourHundredGigE0/5         52        400000
-Ethernet89            113,114,115,116,117,118,119,120          fourHundredGigE0/6         53        400000
-Ethernet97            129,130,131,132,133,134,135,136          fourHundredGigE0/7         54        400000
-Ethernet105           121,122,123,124,125,126,127,128          fourHundredGigE0/8         55        400000
+Ethernet3             43,44                                    hundredGigE0/2             1         100000
+Ethernet5             45,46                                    hundredGigE0/3             2         100000
+Ethernet7             47,48                                    hundredGigE0/4             3         100000
+Ethernet9             49,50                                    hundredGigE0/5             4         100000
+Ethernet11            51,52                                    hundredGigE0/6             5         100000
+Ethernet13            53,54                                    hundredGigE0/7             6         100000
+Ethernet15            55,56                                    hundredGigE0/8             7         100000
+Ethernet17            57,58                                    hundredGigE0/9             8         100000
+Ethernet19            59,60                                    hundredGigE0/10            9         100000
+Ethernet21            61,62                                    hundredGigE0/11            10        100000
+Ethernet23            63,64                                    hundredGigE0/12            11        100000
+Ethernet25            9,10                                     hundredGigE0/13            12        100000
+Ethernet27            11,12                                    hundredGigE0/14            13        100000
+Ethernet29            13,14                                    hundredGigE0/15            14        100000
+Ethernet31            15,16                                    hundredGigE0/16            15        100000
+Ethernet33            17,18                                    hundredGigE0/17            16        100000
+Ethernet35            19,20                                    hundredGigE0/18            17        100000
+Ethernet37            21,22                                    hundredGigE0/19            18        100000
+Ethernet39            23,24                                    hundredGigE0/20            19        100000
+Ethernet41            25,26                                    hundredGigE0/21            20        100000
+Ethernet43            27,28                                    hundredGigE0/22            21        100000
+Ethernet45            29,30                                    hundredGigE0/23            22        100000
+Ethernet47            31,32                                    hundredGigE0/24            23        100000
+Ethernet49            81,82                                    hundredGigE0/25            24        100000
+Ethernet51            83,84                                    hundredGigE0/26            25        100000
+Ethernet53            85,86                                    hundredGigE0/27            26        100000
+Ethernet55            87,88                                    hundredGigE0/28            27        100000
+Ethernet57            89,90                                    hundredGigE0/29            28        100000
+Ethernet59            91,92                                    hundredGigE0/30            29        100000
+Ethernet61            93,94                                    hundredGigE0/31            30        100000
+Ethernet63            95,96                                    hundredGigE0/32            31        100000
+Ethernet65            97,98                                    hundredGigE0/33            32        100000
+Ethernet67            99,100                                   hundredGigE0/34            33        100000
+Ethernet69            101,102                                  hundredGigE0/35            34        100000
+Ethernet71            103,104                                  hundredGigE0/36            35        100000
+Ethernet73            137,138                                  hundredGigE0/37            36        100000
+Ethernet75            139,140                                  hundredGigE0/38            37        100000
+Ethernet77            141,142                                  hundredGigE0/39            38        100000
+Ethernet79            143,144                                  hundredGigE0/40            39        100000
+Ethernet81            145,146                                  hundredGigE0/41            40        100000
+Ethernet83            147,148                                  hundredGigE0/42            41        100000
+Ethernet85            149,150                                  hundredGigE0/43            42        100000
+Ethernet87            151,152                                  hundredGigE0/44            43        100000
+Ethernet89            153,154                                  hundredGigE0/45            44        100000
+Ethernet91            155,156                                  hundredGigE0/46            45        100000
+Ethernet93            157,158                                  hundredGigE0/47            46        100000
+Ethernet95            159,160                                  hundredGigE0/48            47        100000
+Ethernet97            1,2,3,4,5,6,7,8                          fourHundredGigE0/1         48        400000
+Ethernet105           33,34,35,36,37,38,39,40                  fourHundredGigE0/2         49        400000
+Ethernet113           73,74,75,76,77,78,79,80                  fourHundredGigE0/3         50        400000
+Ethernet121           65,66,67,68,69,70,71,72                  fourHundredGigE0/4         51        400000
+Ethernet129           105,106,107,108,109,110,111,112          fourHundredGigE0/5         52        400000
+Ethernet137           113,114,115,116,117,118,119,120          fourHundredGigE0/6         53        400000
+Ethernet145           129,130,131,132,133,134,135,136          fourHundredGigE0/7         54        400000
+Ethernet153           121,122,123,124,125,126,127,128          fourHundredGigE0/8         55        400000
diff --git a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/td4-m2-w6520-48c8qc-48x100G-8x400G.yml b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/td4-m2-w6520-48c8qc-48x100G-8x400G.yml
index f86594bcff1..98e9bc04e65 100644
--- a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/td4-m2-w6520-48c8qc-48x100G-8x400G.yml
+++ b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/M2-W6520-48C8QC/td4-m2-w6520-48c8qc-48x100G-8x400G.yml
@@ -2,16 +2,29 @@
 bcm_device:
     0:
         global:
+            sai_tunnel_support: 1
+            riot_enable: 1
+            ctr_evict_enable: 0
+            sai_brcm_sonic_acl_enhancements: 1
+            sai_field_group_auto_prioritize: 1
+            sai_modify_hash_flexdigest: 1
+            sai_fast_convergence_support: 1
+            sai_port_queue_ecn_counter: 1
+            l2_table_default_view: 1
+            flexctr_action_reserved_ipmc_hitbit: 1
+            default_cpu_tx_queue: 7
+            max_vp_lags: 1024
+            multi_network_groups: 1
+            use_all_splithorizon_groups: 1
             bcm_tunnel_term_compatible_mode: 1
             vlan_flooding_l2mc_num_reserved: 0
             shared_block_mask_section: uc_bc
             l3_alpm_template: 1
             l3_alpm2_bnk_threshold: 100
             svi_my_station_optimization: 1
-            sai_nbr_bcast_ifp_optimized: 2
             uft_mode: 1
             l3_enable: 1
-            l2_hitbit_enable: 0
+            l2_hitbit_enable: 1
             pktio_mode: 1
             sai_optimized_mmu: 1
             sai_pfc_defaults_disable: 1
@@ -33,119 +46,6 @@ bcm_device:
         port:
             "*":
                 encap_mode: IEEE
-                dport_map_enable: 1
-            20:
-              dport_map_port: 1
-            21:
-              dport_map_port: 2
-            22:
-              dport_map_port: 3
-            23:
-              dport_map_port: 4
-            24:
-              dport_map_port: 5
-            25:
-              dport_map_port: 6
-            26:
-              dport_map_port: 7
-            27:
-              dport_map_port: 8
-            28:
-              dport_map_port: 9
-            29:
-              dport_map_port: 10
-            30:
-              dport_map_port: 11
-            31:
-              dport_map_port: 12
-            3:
-              dport_map_port: 13
-            4:
-              dport_map_port: 14
-            5:
-              dport_map_port: 15
-            6:
-              dport_map_port: 16
-            7:
-              dport_map_port: 17
-            8:
-              dport_map_port: 18
-            9:
-              dport_map_port: 19
-            10:
-              dport_map_port: 20
-            11:
-              dport_map_port: 21
-            12:
-              dport_map_port: 22
-            13:
-              dport_map_port: 23
-            14:
-              dport_map_port: 24
-            40:
-              dport_map_port: 25
-            41:
-              dport_map_port: 26
-            42:
-              dport_map_port: 27
-            43:
-              dport_map_port: 28
-            44:
-              dport_map_port: 29
-            45:
-              dport_map_port: 30
-            46:
-              dport_map_port: 31
-            47:
-              dport_map_port: 32
-            48:
-              dport_map_port: 33
-            49:
-              dport_map_port: 34
-            50:
-              dport_map_port: 35
-            51:
-              dport_map_port: 36
-            64:
-              dport_map_port: 37
-            65:
-              dport_map_port: 38
-            66:
-              dport_map_port: 39
-            67:
-              dport_map_port: 40
-            68:
-              dport_map_port: 41
-            69:
-              dport_map_port: 42
-            70:
-              dport_map_port: 43
-            71:
-              dport_map_port: 44
-            72:
-              dport_map_port: 45
-            73:
-              dport_map_port: 46
-            74:
-              dport_map_port: 47
-            75:
-                dport_map_port: 48
-            1:
-                dport_map_port: 49
-            15:
-                dport_map_port: 50
-            34:
-                dport_map_port: 51
-            32:
-                dport_map_port: 52
-            52:
-                dport_map_port: 53
-            54:
-                dport_map_port: 54
-            62:
-                dport_map_port: 55
-            60:
-                dport_map_port: 56
 ...
 
 ---
@@ -683,8 +583,7 @@ device:
                           64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75,
                           1, 15, 32, 34, 52, 54, 60, 62]
             :
-                MEDIUM_TYPE_AUTO: 0
-                MEDIUM_TYPE: PC_PHY_MEDIUM_COPPER
+                MEDIUM_TYPE_AUTO: 1
 ...
 
 ---
@@ -692,4 +591,4 @@ device:
     0:
         TM_SCHEDULER_CONFIG:
             NUM_MC_Q: NUM_MC_Q_4
-...
\ No newline at end of file
+...
diff --git a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/common_config_support b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/common_config_support
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/custom_led.bin
index 58044f407ee..ce5beefb02d 100644
Binary files a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/custom_led.bin and b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/custom_led.bin differ
diff --git a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/dev.xml
index 05a40388be8..e9a957b8584 100644
--- a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/dev.xml
+++ b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/dev.xml
@@ -8,187 +8,187 @@
 <catalog>
     <fans>
         <fan id="fan1" >
-           <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
-           <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/75-0050/eeprom"/>
-           <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
-           <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/75-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
         </fan>
         <fan id="fan2" >
-           <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1" />
-           <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/74-0050/eeprom"/>
-           <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
-           <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1" />
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/74-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
         </fan>
         <fan id="fan3" >
-           <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
-           <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/73-0050/eeprom"/>
-           <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
-           <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/73-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
         </fan>
         <fan id="fan4" >
-           <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
-           <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/72-0050/eeprom"/>
-           <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
-           <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/72-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
         </fan>
         <fan id="fan5" >
-           <property name="present" location="/sys/wb_plat/fan/fan5/present"       type="4" decode="fanpresent" default="1"/>
-           <property name="status"  location="/sys/wb_plat/fan/fan5/motor0/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="status2" location="/sys/wb_plat/fan/fan5/motor1/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/71-0050/eeprom"/>
-           <property name="rotor1_speed" location="/sys/wb_plat/fan/fan5/motor0/speed"/>
-           <property name="rotor2_speed" location="/sys/wb_plat/fan/fan5/motor1/speed"/>
+            <property name="present" location="/sys/wb_plat/fan/fan5/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan5/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan5/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/71-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan5/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan5/motor1/speed"/>
         </fan>
         <fan id="fan6" >
-           <property name="present" location="/sys/wb_plat/fan/fan6/present"       type="4" decode="fanpresent" default="1"/>
-           <property name="status"  location="/sys/wb_plat/fan/fan6/motor0/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="status2" location="/sys/wb_plat/fan/fan6/motor1/status" type="4" decode="fanstatus"  default="1"/>
-           <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/70-0050/eeprom"/>
-           <property name="rotor1_speed" location="/sys/wb_plat/fan/fan6/motor0/speed"/>
-           <property name="rotor2_speed" location="/sys/wb_plat/fan/fan6/motor1/speed"/>
+            <property name="present" location="/sys/wb_plat/fan/fan6/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan6/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan6/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/70-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan6/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan6/motor1/speed"/>
         </fan>
     </fans>
     <temps>
         <temp id="air_inlet_TL" >
-           <property name="temp1_input" location="/sys/bus/i2c/devices/80-004f/hwmon/*/temp1_input" type="1" />
-           <property name="temp1_max"     location="/sys/bus/i2c/devices/80-004f/hwmon/*/temp1_max" type="1" />
-           <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/80-004f/hwmon/*/temp1_max_hyst" type="1"/>
+            <property name="temp1_input" location="/sys/bus/i2c/devices/80-004f/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/80-004f/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/80-004f/hwmon/*/temp1_max_hyst" type="1"/>
         </temp>
         <temp id="air_inlet_BL" >
-           <property name="temp1_input" location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_input" type="1" />
-           <property name="temp1_max"     location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_max" type="1" />
-           <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_max_hyst" type="1"/>
+            <property name="temp1_input" location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_max_hyst" type="1"/>
         </temp>
         <temp id="air_outlet_L" >
-           <property name="temp1_input" location="/sys/bus/i2c/devices/76-0048/hwmon/*/temp1_input" type="1" />
-           <property name="temp1_max"     location="/sys/bus/i2c/devices/76-0048/hwmon/*/temp1_max" type="1" />
-           <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/76-0048/hwmon/*/temp1_max_hyst" type="1"/>
+            <property name="temp1_input" location="/sys/bus/i2c/devices/76-0048/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/76-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/76-0048/hwmon/*/temp1_max_hyst" type="1"/>
         </temp>
         <temp id="air_outlet_R" >
-           <property name="temp1_input" location="/sys/bus/i2c/devices/76-0049/hwmon/*/temp1_input" type="1" />
-           <property name="temp1_max"     location="/sys/bus/i2c/devices/76-0049/hwmon/*/temp1_max" type="1" />
-           <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/76-0049/hwmon/*/temp1_max_hyst" type="1"/>
+            <property name="temp1_input" location="/sys/bus/i2c/devices/76-0049/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/76-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/76-0049/hwmon/*/temp1_max_hyst" type="1"/>
         </temp>
         <temp id="air_hotlet" >
-           <property name="temp1_input" location="/sys/bus/i2c/devices/80-004e/hwmon/*/temp1_input" type="1" />
-           <property name="temp1_max"     location="/sys/bus/i2c/devices/80-004e/hwmon/*/temp1_max" type="1" />
-           <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/80-004e/hwmon/*/temp1_max_hyst" type="1"/>
+            <property name="temp1_input" location="/sys/bus/i2c/devices/80-004e/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/80-004e/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/80-004e/hwmon/*/temp1_max_hyst" type="1"/>
         </temp>
     </temps>
     <psus>
         <psu id="psu1" >
-           <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
-           <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
-           <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/81-0050/eeprom"/>
-           <property name="in_current"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/curr1_input" type="1" />
-           <property name="in_voltage"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/in1_input"  type="1"/>
-           <property name="out_voltage"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/in2_input" type="1" />
-           <property name="out_current"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/curr2_input" type="1" />
-           <property name="temp"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/temp1_input" type="1"/>
-           <property name="fan_speed"     location="/sys/bus/i2c/devices/81-0058/hwmon/*/fan1_input" />
-           <property name="in_power"      location="/sys/bus/i2c/devices/81-0058/hwmon/*/power1_input"  type="5"/>
-           <property name="out_power"     location="/sys/bus/i2c/devices/81-0058/hwmon/*/power2_input"  type="5"/>
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/81-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/81-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/81-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/81-0058/hwmon/*/power2_input"  type="5"/>
         </psu>
         <psu id="psu2" >
-           <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
-           <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
-           <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/82-0050/eeprom"/>
-           <property name="in_current"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/curr1_input" type="1" />
-           <property name="in_voltage"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/in1_input"  type="1"/>
-           <property name="out_voltage"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/in2_input" type="1" />
-           <property name="out_current"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/curr2_input" type="1" />
-           <property name="temp"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/temp1_input" type="1"/>
-           <property name="fan_speed"     location="/sys/bus/i2c/devices/82-0058/hwmon/*/fan1_input" />
-           <property name="in_power"      location="/sys/bus/i2c/devices/82-0058/hwmon/*/power1_input"  type="5"/>
-           <property name="out_power"     location="/sys/bus/i2c/devices/82-0058/hwmon/*/power2_input"  type="5"/>
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/82-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/82-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/82-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/82-0058/hwmon/*/power2_input"  type="5"/>
         </psu>
     </psus>
     <dcdcs>
         <dcdc id="VDD5V_CLK_MCU" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in1_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="5.750" />
-           <property name="dcdc_min"   gettype="config" value="4.250" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.750" />
+            <property name="dcdc_min"   gettype="config" value="4.250" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="VDD3.3_CLK" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in2_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="3.795" />
-           <property name="dcdc_min"   gettype="config" value="2.805" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="VDD1.0V" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in3_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="1.150" />
-           <property name="dcdc_min"   gettype="config" value="0.850" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.150" />
+            <property name="dcdc_min"   gettype="config" value="0.850" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="VDD1.8V" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in4_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="2.070" />
-           <property name="dcdc_min"   gettype="config" value="1.530" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="MAC_BOARD_VDD3.3V" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in5_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="3.795" />
-           <property name="dcdc_min"   gettype="config" value="2.805" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="VDD1.2V" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in6_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="1.380" />
-           <property name="dcdc_min"   gettype="config" value="1.020" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="VDD_CORE" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in7_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="1.100" />
-           <property name="dcdc_min"   gettype="config" value="0.600" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.100" />
+            <property name="dcdc_min"   gettype="config" value="0.600" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="ANALOG0.75V" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in8_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="1.000" />
-           <property name="dcdc_min"   gettype="config" value="0.615" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in8_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="0.615" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="MAC_VDD1.2V" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in9_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="1.380" />
-           <property name="dcdc_min"   gettype="config" value="1.020" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in9_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="VDDO1.8V" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in10_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="2.070" />
-           <property name="dcdc_min"   gettype="config" value="1.530" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in10_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="MAC_ANA1.2V" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in11_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="1.380" />
-           <property name="dcdc_min"   gettype="config" value="1.020" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in11_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="MAC_ANA1.8V" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in12_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="2.070" />
-           <property name="dcdc_min"   gettype="config" value="1.530" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in12_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="QSFP56_VDD3.3V_A" >
-           <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in13_input" type="6" />
-           <property name="dcdc_max"   gettype="config" value="3.795" />
-           <property name="dcdc_min"   gettype="config" value="2.805" />
-           <property name="dcdc_unit"   gettype="config" value="V" />
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in13_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
         </dcdc>
         <dcdc id="QSFP56_VDD3.3V_B" >
             <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in14_input" type="6" />
@@ -327,7 +327,7 @@
             <property name="power_input" location="/sys/bus/i2c/devices/83-005b/hwmon/hwmon*/power1_input"  type="5"/>
         </macpower>
         <macpower id="MAC_Analog" >
-            <property name="power_input" location="/sys/bus/i2c/devices/83-005b/hwmon/hwmon*/power3_input"  type="5"/>
+            <property name="power_input" location="/sys/bus/i2c/devices/83-005b/hwmon/hwmon*/power2_input"  type="5"/>
         </macpower>
     </macpowers>
     <cpus location="/sys/class/hwmon/hwmon0"/>
@@ -351,9 +351,14 @@
     <psutype>
         <code key="DPS-1300AB-6 S" value="PA1300I-F"/>
         <code key="GW-CRPS1300D" value="PA1300I-F"/>
+        <code key="CRPS1300D3R" value="PA1300I-R"/>
+        <code key="DPS-1300AB-11 C" value="PA1300I-R"/>
     </psutype>
     <fan_display_name>
         <code key="M1HFAN II-F" value="M1HFAN II-F"/>
+        <code key="M1HFAN IV-R" value="M1HFAN IV-R"/>
     </fan_display_name>
     </decode>
 </catalog>
+
+
diff --git a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/dev_exhaust.xml b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/dev_exhaust.xml
new file mode 100644
index 00000000000..09f32067b0e
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/dev_exhaust.xml
@@ -0,0 +1,364 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type    1 result/1000
+          type    2 result/100
+          type    3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/75-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1" />
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/74-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/73-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/72-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+        </fan>
+        <fan id="fan5" >
+            <property name="present" location="/sys/wb_plat/fan/fan5/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan5/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan5/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/71-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan5/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan5/motor1/speed"/>
+        </fan>
+        <fan id="fan6" >
+            <property name="present" location="/sys/wb_plat/fan/fan6/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan6/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan6/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/70-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan6/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan6/motor1/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="air_outlet_TL" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/80-004f/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/80-004f/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/80-004f/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="air_outlet_BL" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="air_inlet_L" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/76-0048/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/76-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/76-0048/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="air_inlet_R" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/76-0049/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/76-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/76-0049/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="air_hotlet" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/80-004e/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/80-004e/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/80-004e/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/81-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/81-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/81-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/81-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/81-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/82-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/82-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/82-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/82-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/82-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+    </psus>
+    <dcdcs>
+        <dcdc id="VDD5V_CLK_MCU" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.750" />
+            <property name="dcdc_min"   gettype="config" value="4.250" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD3.3_CLK" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.0V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.150" />
+            <property name="dcdc_min"   gettype="config" value="0.850" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_BOARD_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD_CORE" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.100" />
+            <property name="dcdc_min"   gettype="config" value="0.600" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="ANALOG0.75V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in8_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="0.615" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in9_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDDO1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in10_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_ANA1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in11_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_ANA1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in12_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="QSFP56_VDD3.3V_A" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in13_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="QSFP56_VDD3.3V_B" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in14_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="QSFPDD_VDD3.3V_A" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in15_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="QSFPDD_VDD3.3V_B" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/85-005b/hwmon/hwmon*/in16_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD5.0V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/64-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.750" />
+            <property name="dcdc_min"   gettype="config" value="4.250" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="SW_VDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/64-005b/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD2.5V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/64-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.875" />
+            <property name="dcdc_min"   gettype="config" value="2.125" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="CONNECT_BOARD_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/64-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD12V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/64-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.800" />
+            <property name="dcdc_min"   gettype="config" value="10.200" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD3.3_STBY" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/64-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="SSD_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/64-005b/hwmon/hwmon*/in8_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VCCIN" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/65-0067/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.244" />
+            <property name="dcdc_min"   gettype="config" value="1.368" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P1V05" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/65-0067/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.232" />
+            <property name="dcdc_min"   gettype="config" value="0.882" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VCCD_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/65-006c/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.452" />
+            <property name="dcdc_min"   gettype="config" value="0.990" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VCCSCSUS_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/65-006c/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.265" />
+            <property name="dcdc_min"   gettype="config" value="0.855" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P3V3_STBY_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/65-0043/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.004" />
+            <property name="dcdc_min"   gettype="config" value="2.682" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P5V_AUX_IN" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/65-0043/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.347" />
+            <property name="dcdc_min"   gettype="config" value="3.852" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P1V7_VCCSCFUSESUS_IN" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/65-0043/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.057" />
+            <property name="dcdc_min"   gettype="config" value="1.377" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/84-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/84-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/84-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/84-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/84-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/84-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_6" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/84-0044/hwmon/hwmon*/temp7_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_7" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/84-0044/hwmon/hwmon*/temp8_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_8" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/84-0044/hwmon/hwmon*/temp9_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <macpowers>
+        <macpower id="MAC_Core" >
+            <property name="power_input" location="/sys/bus/i2c/devices/83-005b/hwmon/hwmon*/power1_input"  type="5"/>
+        </macpower>
+        <macpower id="MAC_Analog" >
+            <property name="power_input" location="/sys/bus/i2c/devices/83-005b/hwmon/hwmon*/power2_input"  type="5"/>
+        </macpower>
+    </macpowers>
+    <cpus location="/sys/class/hwmon/hwmon0"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="DPS-1300AB-6 S" value="PA1300I-F"/>
+        <code key="GW-CRPS1300D" value="PA1300I-F"/>
+        <code key="CRPS1300D3R" value="PA1300I-R"/>
+        <code key="DPS-1300AB-11 C" value="PA1300I-R"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1HFAN II-F" value="M1HFAN II-F"/>
+        <code key="M1HFAN IV-R" value="M1HFAN IV-R"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
+
diff --git a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/hwsku.json b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/hwsku.json
index 1535dc8ad4d..e4b25d5f210 100644
--- a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/hwsku.json
+++ b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/hwsku.json
@@ -3,169 +3,169 @@
         "Ethernet1": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet2": {
+        "Ethernet3": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet3": {
+        "Ethernet5": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet4": {
+        "Ethernet7": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet5": {
+        "Ethernet9": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet6": {
+        "Ethernet11": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet7": {
+        "Ethernet13": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet8": {
+        "Ethernet15": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet9": {
+        "Ethernet17": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet10": {
+        "Ethernet19": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet11": {
+        "Ethernet21": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet12": {
+        "Ethernet23": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet13": {
+        "Ethernet25": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet14": {
+        "Ethernet27": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet15": {
+        "Ethernet29": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet16": {
+        "Ethernet31": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet17": {
+        "Ethernet33": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet18": {
+        "Ethernet35": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet19": {
+        "Ethernet37": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet20": {
+        "Ethernet39": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet21": {
+        "Ethernet41": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet22": {
+        "Ethernet43": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet23": {
+        "Ethernet45": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet24": {
+        "Ethernet47": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet25": {
+        "Ethernet49": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet26": {
+        "Ethernet51": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet27": {
+        "Ethernet53": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet28": {
+        "Ethernet55": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet29": {
+        "Ethernet57": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet30": {
+        "Ethernet59": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet31": {
+        "Ethernet61": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet32": {
+        "Ethernet63": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet33": {
+        "Ethernet65": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet34": {
+        "Ethernet67": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet35": {
+        "Ethernet69": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet36": {
+        "Ethernet71": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet37": {
+        "Ethernet73": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet38": {
+        "Ethernet75": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet39": {
+        "Ethernet77": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet40": {
+        "Ethernet79": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet41": {
+        "Ethernet81": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet42": {
+        "Ethernet83": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet43": {
+        "Ethernet85": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet44": {
+        "Ethernet87": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet45": {
+        "Ethernet89": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet46": {
+        "Ethernet91": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet47": {
+        "Ethernet93": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet48": {
+        "Ethernet95": {
             "default_brkout_mode": "1x100G"
         },
-        "Ethernet49": {
+        "Ethernet97": {
             "default_brkout_mode": "1x400G"
         },
-        "Ethernet57": {
+        "Ethernet105": {
             "default_brkout_mode": "1x400G"
         },
-        "Ethernet65": {
+        "Ethernet113": {
             "default_brkout_mode": "1x400G"
         },
-        "Ethernet73": {
+        "Ethernet121": {
             "default_brkout_mode": "1x400G"
         },
-        "Ethernet81": {
+        "Ethernet129": {
             "default_brkout_mode": "1x400G"
         },
-        "Ethernet89": {
+        "Ethernet137": {
             "default_brkout_mode": "1x400G"
         },
-        "Ethernet97": {
+        "Ethernet145": {
             "default_brkout_mode": "1x400G"
         },
-        "Ethernet105": {
+        "Ethernet153": {
             "default_brkout_mode": "1x400G"
         }
     }
diff --git a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/installer.conf
index 7a9fec8cc99..55b86ec10a3 100644
--- a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/installer.conf
+++ b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/installer.conf
@@ -1,2 +1,3 @@
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
\ No newline at end of file
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
+ONIE_IMAGE_PART_SIZE=1048576
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/media_settings.json
index 7ada042c450..3cf2472c866 100644
--- a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/media_settings.json
+++ b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/media_settings.json
@@ -1,7 +1,7 @@
 {
     "PORT_MEDIA_SETTINGS": {
         "0": {
-            "Default": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000006"
@@ -26,25 +26,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "1": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000006"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xffffffe8",
                     "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x0000008C",
-                    "lane1": "0x00000080"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088"
                 },
                 "post1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xfffffffc"
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -56,8 +54,8 @@
                 }
             }
         },
-        "2": {
-            "Default": {
+        "1": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000006"
@@ -67,11 +65,11 @@
                     "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000084"
+                    "lane0": "0x0000008C",
+                    "lane1": "0x00000080"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
+                    "lane0": "0xfffffff4",
                     "lane1": "0xfffffffc"
                 },
                 "post2": {
@@ -82,25 +80,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "3": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000006"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xffffffe8",
                     "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000080"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -112,8 +108,8 @@
                 }
             }
         },
-        "4": {
-            "Default": {
+        "2": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000006"
@@ -138,25 +134,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "5": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000006"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffe4"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8"
                 },
                 "main": {
-                    "lane0": "0x00000090",
-                    "lane1": "0x00000080"
+                    "lane0": "0x00000084",
+                    "lane1": "0x0000008c"
                 },
                 "post1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xfffffffc"
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -168,8 +162,8 @@
                 }
             }
         },
-        "6": {
-            "Default": {
+        "3": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000006"
@@ -179,11 +173,11 @@
                     "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000090",
-                    "lane1": "0x00000084"
+                    "lane0": "0x00000094",
+                    "lane1": "0x00000080"
                 },
                 "post1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xfffffffc",
                     "lane1": "0xfffffffc"
                 },
                 "post2": {
@@ -194,25 +188,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "7": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
+                    "lane0": "0x00000084",
                     "lane1": "0x00000088"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -224,19 +216,19 @@
                 }
             }
         },
-        "8": {
-            "Default": {
+        "4": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000006"
                 },
                 "pre1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
                     "lane0": "0x00000094",
-                    "lane1": "0x0000008C"
+                    "lane1": "0x00000084"
                 },
                 "post1": {
                     "lane0": "0xfffffffc",
@@ -250,25 +242,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "9": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000090",
+                    "lane0": "0x00000084",
                     "lane1": "0x00000088"
                 },
                 "post1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xfffffff8"
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -280,8 +270,8 @@
                 }
             }
         },
-        "10": {
-            "Default": {
+        "5": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000006"
@@ -292,7 +282,7 @@
                 },
                 "main": {
                     "lane0": "0x00000090",
-                    "lane1": "0x00000084"
+                    "lane1": "0x00000080"
                 },
                 "post1": {
                     "lane0": "0xfffffff4",
@@ -306,25 +296,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "11": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x0000008C"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -336,8 +324,8 @@
                 }
             }
         },
-        "12": {
-            "Default": {
+        "6": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000006"
@@ -362,25 +350,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "13": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000006"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xffffffe8",
                     "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000080"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -392,22 +378,22 @@
                 }
             }
         },
-        "14": {
-            "Default": {
+        "7": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000006"
+                    "lane1": "0x00000000"
                 },
                 "pre1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xffffffe4"
+                    "lane1": "0xffffffec"
                 },
                 "main": {
-                    "lane0": "0x0000008C",
-                    "lane1": "0x00000080"
+                    "lane0": "0x00000094",
+                    "lane1": "0x00000088"
                 },
                 "post1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xfffffffc",
                     "lane1": "0xfffffffc"
                 },
                 "post2": {
@@ -418,25 +404,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "15": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000090",
+                    "lane0": "0x00000084",
                     "lane1": "0x00000088"
                 },
                 "post1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xfffffff8"
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -448,8 +432,8 @@
                 }
             }
         },
-        "16": {
-            "Default": {
+        "8": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
@@ -460,11 +444,11 @@
                 },
                 "main": {
                     "lane0": "0x00000094",
-                    "lane1": "0x00000088"
+                    "lane1": "0x0000008C"
                 },
                 "post1": {
                     "lane0": "0xfffffffc",
-                    "lane1": "0xfffffff8"
+                    "lane1": "0xfffffffc"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -474,25 +458,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "17": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000090"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -504,8 +486,8 @@
                 }
             }
         },
-        "18": {
-            "Default": {
+        "9": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
@@ -519,8 +501,8 @@
                     "lane1": "0x00000088"
                 },
                 "post1": {
-                    "lane0": "0xfffffff8",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -530,25 +512,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "19": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000090"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -560,22 +540,22 @@
                 }
             }
         },
-        "20": {
-            "Default": {
+        "10": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000006"
                 },
                 "pre1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x0000008C"
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
+                    "lane0": "0xfffffff4",
                     "lane1": "0xfffffffc"
                 },
                 "post2": {
@@ -586,25 +566,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "21": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000090"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -616,8 +594,8 @@
                 }
             }
         },
-        "22": {
-            "Default": {
+        "11": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
@@ -628,7 +606,7 @@
                 },
                 "main": {
                     "lane0": "0x00000094",
-                    "lane1": "0x00000090"
+                    "lane1": "0x0000008C"
                 },
                 "post1": {
                     "lane0": "0xfffffffc",
@@ -642,25 +620,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "23": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000090"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -672,22 +648,22 @@
                 }
             }
         },
-        "24": {
-            "Default": {
+        "12": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000006"
                 },
                 "pre1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x0000008C"
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
+                    "lane0": "0xfffffff4",
                     "lane1": "0xfffffffc"
                 },
                 "post2": {
@@ -698,25 +674,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "25": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000088",
-                    "lane1": "0x00000090"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -728,19 +702,19 @@
                 }
             }
         },
-        "26": {
-            "Default": {
+        "13": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000006"
                 },
                 "pre1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
                     "lane0": "0x00000094",
-                    "lane1": "0x0000008C"
+                    "lane1": "0x00000080"
                 },
                 "post1": {
                     "lane0": "0xfffffffc",
@@ -754,25 +728,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "27": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000090"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -784,22 +756,22 @@
                 }
             }
         },
-        "28": {
-            "Default": {
+        "14": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000006"
                 },
                 "pre1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x0000008C"
+                    "lane0": "0x0000008C",
+                    "lane1": "0x00000080"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
+                    "lane0": "0xfffffff4",
                     "lane1": "0xfffffffc"
                 },
                 "post2": {
@@ -810,25 +782,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "29": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000006"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000090"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -840,8 +810,8 @@
                 }
             }
         },
-        "30": {
-            "Default": {
+        "15": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
@@ -851,12 +821,12 @@
                     "lane1": "0xffffffec"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000090"
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000088"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -866,25 +836,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "31": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000090"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -896,8 +864,8 @@
                 }
             }
         },
-        "32": {
-            "Default": {
+        "16": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
@@ -908,11 +876,37 @@
                 },
                 "main": {
                     "lane0": "0x00000094",
-                    "lane1": "0x0000008C"
+                    "lane1": "0x00000088"
                 },
                 "post1": {
                     "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane1": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000"
+                }
+            },
+            "COPPER50": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -924,8 +918,8 @@
                 }
             }
         },
-        "33": {
-            "Default": {
+        "17": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
@@ -950,25 +944,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "34": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x0000008C"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -980,8 +972,8 @@
                 }
             }
         },
-        "35": {
-            "Default": {
+        "18": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
@@ -991,11 +983,11 @@
                     "lane1": "0xffffffec"
                 },
                 "main": {
-                    "lane0": "0x00000094",
-                    "lane1": "0x00000090"
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000088"
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                 "post1": {
-                    "lane0": "0xfffffffc",
+                    "lane0": "0xfffffff8",
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                 },
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@@ -1006,10 +998,36 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
+            },
+            "COPPER50": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000"
+                }
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                     "lane1": "0x00000000"
@@ -1034,25 +1052,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "37": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000006"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xffffffe8",
                     "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
+                    "lane0": "0x00000084",
                     "lane1": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -1064,8 +1080,8 @@
                 }
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-            "Default": {
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                     "lane1": "0x00000000"
@@ -1075,11 +1091,11 @@
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                 },
                 "main": {
-                    "lane0": "0x00000090",
+                    "lane0": "0x00000094",
                     "lane1": "0x0000008C"
                 },
                 "post1": {
-                    "lane0": "0xfffffff8",
+                    "lane0": "0xfffffffc",
                     "lane1": "0xfffffffc"
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@@ -1090,25 +1106,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "39": {
-            "Default": {
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+            "COPPER50": {
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                     "lane0": "0x00000000",
-                    "lane1": "0x00000000"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xffffffec"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000090",
-                    "lane1": "0x00000090"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffff8",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -1120,8 +1134,8 @@
                 }
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         },
-        "40": {
-            "Default": {
+        "21": {
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                     "lane1": "0x00000000"
@@ -1132,7 +1146,7 @@
                 },
                 "main": {
                     "lane0": "0x00000094",
-                    "lane1": "0x00000088"
+                    "lane1": "0x00000090"
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                 "post1": {
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@@ -1146,25 +1160,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "41": {
-            "Default": {
+            },
+            "COPPER50": {
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                     "lane0": "0x00000000",
-                    "lane1": "0x00000006"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xffffffe8",
                     "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
+                    "lane0": "0x00000084",
                     "lane1": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -1176,19 +1188,19 @@
                 }
             }
         },
-        "42": {
-            "Default": {
+        "22": {
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                     "lane0": "0x00000000",
-                    "lane1": "0x00000006"
+                    "lane1": "0x00000000"
                 },
                 "pre1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xffffffe4"
+                    "lane1": "0xffffffec"
                 },
                 "main": {
                     "lane0": "0x00000094",
-                    "lane1": "0x00000084"
+                    "lane1": "0x00000090"
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@@ -1202,25 +1214,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "43": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000006"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xffffffe8",
                     "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000090",
+                    "lane0": "0x00000084",
                     "lane1": "0x00000084"
                 },
                 "post1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xfffffffc"
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -1232,8 +1242,8 @@
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         },
-        "44": {
-            "Default": {
+        "23": {
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                     "lane1": "0x00000000"
@@ -1244,7 +1254,7 @@
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                 "main": {
                     "lane0": "0x00000094",
-                    "lane1": "0x0000008C"
+                    "lane1": "0x00000090"
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@@ -1258,25 +1268,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "45": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000006"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xffffffe8",
                     "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000094",
+                    "lane0": "0x00000084",
                     "lane1": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -1288,22 +1296,22 @@
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         },
-        "46": {
-            "Default": {
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                     "lane0": "0x00000000",
-                    "lane1": "0x00000006"
+                    "lane1": "0x00000000"
                 },
                 "pre1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xffffffe4"
+                    "lane1": "0xffffffec"
                 },
                 "main": {
-                    "lane0": "0x0000008C",
-                    "lane1": "0x00000084"
+                    "lane0": "0x00000094",
+                    "lane1": "0x0000008C"
                 },
                 "post1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xfffffffc",
                     "lane1": "0xfffffffc"
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@@ -1314,25 +1322,23 @@
                     "lane0": "0x00000000",
                     "lane1": "0x00000000"
                 }
-            }
-        },
-        "47": {
-            "Default": {
+            },
+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
-                    "lane1": "0x00000006"
+                    "lane1": "0x00000004"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xffffffe8",
                     "lane1": "0xffffffe4"
                 },
                 "main": {
-                    "lane0": "0x00000090",
-                    "lane1": "0x00000080"
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084"
                 },
                 "post1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xfffffffc"
+                    "lane1": "0x00000000"
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                 "post2": {
                     "lane0": "0x00000000",
@@ -1344,35 +1350,1277 @@
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         },
-        "48": {
-            "Default": {
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-                    "lane1": "0x00000000",
-                    "lane2": "0x00000000",
-                    "lane3": "0x00000000",
-                    "lane4": "0x00000000",
-                    "lane5": "0x00000000",
-                    "lane6": "0x00000000",
-                    "lane7": "0x00000000"
+                    "lane1": "0x00000000"
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                 "pre1": {
-                    "lane0": "0xfffffff0",
-                    "lane1": "0xfffffff0",
-                    "lane2": "0xfffffff0",
-                    "lane3": "0xfffffff0",
-                    "lane4": "0xfffffff4",
-                    "lane5": "0xfffffff0",
-                    "lane6": "0xfffffff4",
-                    "lane7": "0xfffffff4"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xffffffec"
                 },
                 "main": {
-                    "lane0": "0x0000008A",
-                    "lane1": "0x0000008A",
-                    "lane2": "0x0000008A",
-                    "lane3": "0x0000008A",
-                    "lane4": "0x00000090",
-                    "lane5": "0x0000008A",
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000090"
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+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000"
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+            "COPPER50": {
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+                    "lane1": "0x00000004"
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+                "pre1": {
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+                    "lane1": "0x00000084"
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+                    "lane1": "0x00000000"
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+                    "lane1": "0x00000000"
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+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
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+                "main": {
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+                    "lane1": "0x0000008A",
+                    "lane2": "0x0000008A",
+                    "lane3": "0x0000008A",
+                    "lane4": "0x00000090",
+                    "lane5": "0x0000008A",
                     "lane6": "0x00000090",
                     "lane7": "0x00000090"
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@@ -1381,9 +2629,387 @@
                     "lane1": "0xfffffff4",
                     "lane2": "0xfffffff4",
                     "lane3": "0xfffffff4",
-                    "lane4": "0xfffffff4",
-                    "lane5": "0xfffffff4",
-                    "lane6": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
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+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+            "COPPER50": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000006",
+                    "lane5": "0x00000006",
+                    "lane6": "0x00000006",
+                    "lane7": "0x00000000"
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+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe8"
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+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000084"
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+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0x00000000",
+                    "lane7": "0xfffffff4"
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+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+        "49": {
+            "OPTICAL50": {
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+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x0000008E",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
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+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
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+            "COPPER50": {
+                "pre2": {
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+                    "lane1": "0x00000006",
+                    "lane2": "0x00000006",
+                    "lane3": "0x00000006",
+                    "lane4": "0x00000006",
+                    "lane5": "0x00000006",
+                    "lane6": "0x00000006",
+                    "lane7": "0x00000006"
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+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe0"
+                },
+                "main": {
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+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080",
+                    "lane4": "0x00000080",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000080",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "50": {
+            "OPTICAL50": {
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+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
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+                "post2": {
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+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+            "COPPER50": {
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+                    "lane1": "0x00000006",
+                    "lane2": "0x00000006",
+                    "lane3": "0x00000000",
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+                    "lane6": "0x00000006",
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+                    "lane6": "0xffffffe0",
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+                    "lane4": "0x00000080",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000080",
+                    "lane7": "0x00000084"
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+                    "lane1": "0xfffffffc",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffff4"
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+                "post2": {
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+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+        "51": {
+            "OPTICAL50": {
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+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
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+                "pre1": {
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+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000008A",
+                    "lane1": "0x0000008A",
+                    "lane2": "0x0000008A",
+                    "lane3": "0x0000008A",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
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+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
                     "lane7": "0xfffffff4"
                 },
                 "post2": {
@@ -1406,49 +3032,47 @@
                     "lane6": "0x00000000",
                     "lane7": "0x00000000"
                 }
-            }
-        },
-        "49": {
-            "Default": {
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+            "COPPER50": {
                 "pre2": {
-                    "lane0": "0x00000000",
-                    "lane1": "0x00000000",
+                    "lane0": "0x00000006",
+                    "lane1": "0x00000006",
                     "lane2": "0x00000000",
                     "lane3": "0x00000000",
-                    "lane4": "0x00000000",
+                    "lane4": "0x00000006",
                     "lane5": "0x00000000",
                     "lane6": "0x00000000",
                     "lane7": "0x00000000"
                 },
                 "pre1": {
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-                    "lane1": "0xfffffff0",
-                    "lane2": "0xfffffff4",
-                    "lane3": "0xfffffff4",
-                    "lane4": "0xfffffff4",
-                    "lane5": "0xfffffff4",
-                    "lane6": "0xfffffff4",
-                    "lane7": "0xfffffff4"
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
                 },
                 "main": {
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-                    "lane1": "0x00000088",
-                    "lane2": "0x00000090",
-                    "lane3": "0x00000088",
-                    "lane4": "0x00000088",
-                    "lane5": "0x00000088",
-                    "lane6": "0x00000088",
-                    "lane7": "0x00000088"
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000080",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000084"
                 },
                 "post1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xfffffff4",
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
                     "lane2": "0xfffffff4",
-                    "lane3": "0xfffffff0",
-                    "lane4": "0xfffffff0",
-                    "lane5": "0xfffffff0",
-                    "lane6": "0xfffffff0",
-                    "lane7": "0xfffffff0"
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -1472,8 +3096,8 @@
                 }
             }
         },
-        "50": {
-            "Default": {
+        "52": {
+            "OPTICAL50": {
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                     "lane0": "0x00000000",
                     "lane1": "0x00000000",
@@ -1489,30 +3113,30 @@
                     "lane1": "0xfffffff4",
                     "lane2": "0xfffffff4",
                     "lane3": "0xfffffff4",
-                    "lane4": "0xfffffff2",
+                    "lane4": "0xfffffff4",
                     "lane5": "0xfffffff4",
                     "lane6": "0xfffffff4",
                     "lane7": "0xfffffff4"
                 },
                 "main": {
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-                    "lane1": "0x0000008C",
-                    "lane2": "0x00000088",
-                    "lane3": "0x00000088",
-                    "lane4": "0x00000084",
-                    "lane5": "0x00000084",
-                    "lane6": "0x00000088",
-                    "lane7": "0x00000088"
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x0000008E",
+                    "lane3": "0x0000008E",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x0000008E",
+                    "lane7": "0x00000090"
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                 "post1": {
-                    "lane0": "0xffffffec",
-                    "lane1": "0xfffffff0",
-                    "lane2": "0xffffffec",
-                    "lane3": "0xffffffec",
-                    "lane4": "0xffffffe8",
-                    "lane5": "0xffffffe8",
-                    "lane6": "0xffffffec",
-                    "lane7": "0xffffffec"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
                 },
                 "post2": {
                     "lane0": "0x00000000",
@@ -1534,10 +3158,8 @@
                     "lane6": "0x00000000",
                     "lane7": "0x00000000"
                 }
-            }
-        },
-        "51": {
-            "Default": {
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+            "COPPER50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000000",
@@ -1549,21 +3171,21 @@
                     "lane7": "0x00000000"
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-                    "lane1": "0xfffffff0",
-                    "lane2": "0xfffffff0",
-                    "lane3": "0xfffffff0",
-                    "lane4": "0xfffffff0",
-                    "lane5": "0xfffffff0",
-                    "lane6": "0xfffffff0",
-                    "lane7": "0xfffffff0"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
                 },
                 "main": {
-                    "lane0": "0x0000008A",
-                    "lane1": "0x0000008A",
-                    "lane2": "0x0000008A",
-                    "lane3": "0x0000008A",
-                    "lane4": "0x00000088",
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000084",
                     "lane5": "0x00000084",
                     "lane6": "0x00000084",
                     "lane7": "0x00000084"
@@ -1573,9 +3195,9 @@
                     "lane1": "0xfffffff4",
                     "lane2": "0xfffffff4",
                     "lane3": "0xfffffff4",
-                    "lane4": "0xfffffff0",
-                    "lane5": "0xfffffff0",
-                    "lane6": "0xfffffff0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
                     "lane7": "0xfffffff4"
                 },
                 "post2": {
@@ -1600,8 +3222,8 @@
                 }
             }
         },
-        "52": {
-            "Default": {
+        "53": {
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                     "lane1": "0x00000000",
@@ -1614,29 +3236,29 @@
                 },
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                     "lane0": "0xfffffff4",
-                    "lane1": "0xfffffff4",
+                    "lane1": "0xfffffff0",
                     "lane2": "0xfffffff4",
                     "lane3": "0xfffffff4",
                     "lane4": "0xfffffff4",
                     "lane5": "0xfffffff4",
-                    "lane6": "0xfffffff4",
+                    "lane6": "0xfffffff0",
                     "lane7": "0xfffffff4"
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                 "main": {
                     "lane0": "0x00000090",
-                    "lane1": "0x00000090",
-                    "lane2": "0x0000008E",
-                    "lane3": "0x0000008E",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
                     "lane4": "0x00000090",
                     "lane5": "0x00000090",
-                    "lane6": "0x0000008E",
+                    "lane6": "0x00000084",
                     "lane7": "0x00000090"
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                 "post1": {
                     "lane0": "0xfffffff4",
-                    "lane1": "0xfffffff8",
-                    "lane2": "0xfffffff8",
-                    "lane3": "0xfffffff8",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
                     "lane4": "0xfffffff4",
                     "lane5": "0xfffffff4",
                     "lane6": "0xfffffff4",
@@ -1662,46 +3284,44 @@
                     "lane6": "0x00000000",
                     "lane7": "0x00000000"
                 }
-            }
-        },
-        "53": {
-            "Default": {
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+            "COPPER50": {
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                     "lane0": "0x00000000",
                     "lane1": "0x00000000",
                     "lane2": "0x00000000",
                     "lane3": "0x00000000",
-                    "lane4": "0x00000000",
+                    "lane4": "0x00000006",
                     "lane5": "0x00000000",
                     "lane6": "0x00000000",
                     "lane7": "0x00000000"
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                 "pre1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xfffffff0",
-                    "lane2": "0xfffffff4",
-                    "lane3": "0xfffffff4",
-                    "lane4": "0xfffffff4",
-                    "lane5": "0xfffffff4",
-                    "lane6": "0xfffffff0",
-                    "lane7": "0xfffffff4"
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
                 },
                 "main": {
-                    "lane0": "0x00000090",
+                    "lane0": "0x00000084",
                     "lane1": "0x00000084",
-                    "lane2": "0x00000090",
-                    "lane3": "0x00000090",
-                    "lane4": "0x00000090",
-                    "lane5": "0x00000090",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000080",
+                    "lane5": "0x00000084",
                     "lane6": "0x00000084",
-                    "lane7": "0x00000090"
+                    "lane7": "0x00000084"
                 },
                 "post1": {
                     "lane0": "0xfffffff4",
                     "lane1": "0xfffffff4",
                     "lane2": "0xfffffff4",
                     "lane3": "0xfffffff4",
-                    "lane4": "0xfffffff4",
+                    "lane4": "0x00000000",
                     "lane5": "0xfffffff4",
                     "lane6": "0xfffffff4",
                     "lane7": "0xfffffff4"
@@ -1729,7 +3349,7 @@
             }
         },
         "54": {
-            "Default": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000000",
@@ -1790,10 +3410,72 @@
                     "lane6": "0x00000000",
                     "lane7": "0x00000000"
                 }
+            },
+            "COPPER50": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000006",
+                    "lane6": "0x00000006",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000080",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
             }
         },
         "55": {
-            "Default": {
+            "OPTICAL50": {
                 "pre2": {
                     "lane0": "0x00000000",
                     "lane1": "0x00000000",
@@ -1854,7 +3536,69 @@
                     "lane6": "0x00000000",
                     "lane7": "0x00000000"
                 }
+            },
+            "COPPER50": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000006",
+                    "lane6": "0x00000006",
+                    "lane7": "0x00000006"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000080",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
             }
         }
     }
-}
\ No newline at end of file
+}
diff --git a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/platform.json b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/platform.json
index 5741f32ad45..34df0fee60d 100644
--- a/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/platform.json
+++ b/device/micas/x86_64-micas_m2-w6520-48c8qc-r0/platform.json
@@ -597,438 +597,535 @@
             "index": "0,0",
             "lanes": "41,42",
             "breakout_modes": {
+                "1x25G(1)": ["Eth1"],
+                "2x25G": ["Eth1/1", "Eth1/2"],
                 "1x100G": [
                     "Eth1"
                 ]
             }
         },
-        "Ethernet2": {
+        "Ethernet3": {
             "index": "1,1",
             "lanes": "43,44",
             "breakout_modes": {
+                "1x25G(1)": ["Eth2"],
+                "2x25G": ["Eth2/1", "Eth2/2"],
                 "1x100G": [
                     "Eth2"
                 ]
             }
         },
-        "Ethernet3": {
+        "Ethernet5": {
             "index": "2,2",
             "lanes": "45,46",
             "breakout_modes": {
+                "1x25G(1)": ["Eth3"],
+                "2x25G": ["Eth3/1", "Eth3/2"],
                 "1x100G": [
                     "Eth3"
                 ]
             }
         },
-        "Ethernet4": {
+        "Ethernet7": {
             "index": "3,3",
             "lanes": "47,48",
             "breakout_modes": {
+                "1x25G(1)": ["Eth4"],
+                "2x25G": ["Eth4/1", "Eth4/2"],
                 "1x100G": [
                     "Eth4"
                 ]
             }
         },
-        "Ethernet5": {
+        "Ethernet9": {
             "index": "4,4",
             "lanes": "49,50",
             "breakout_modes": {
+                "1x25G(1)": ["Eth5"],
+                "2x25G": ["Eth5/1", "Eth5/2"],
                 "1x100G": [
                     "Eth5"
                 ]
             }
         },
-        "Ethernet6": {
+        "Ethernet11": {
             "index": "5,5",
             "lanes": "51,52",
             "breakout_modes": {
+                "1x25G(1)": ["Eth6"],
+                "2x25G": ["Eth6/1", "Eth6/2"],
                 "1x100G": [
                     "Eth6"
                 ]
             }
         },
-        "Ethernet7": {
+        "Ethernet13": {
             "index": "6,6",
             "lanes": "53,54",
             "breakout_modes": {
+                "1x25G(1)": ["Eth7"],
+                "2x25G": ["Eth7/1", "Eth7/2"],
                 "1x100G": [
                     "Eth7"
                 ]
             }
         },
-        "Ethernet8": {
+        "Ethernet15": {
             "index": "7,7",
             "lanes": "55,56",
             "breakout_modes": {
+                "1x25G(1)": ["Eth8"],
+                "2x25G": ["Eth8/1", "Eth8/2"],
                 "1x100G": [
                     "Eth8"
                 ]
             }
         },
-        "Ethernet9": {
+        "Ethernet17": {
             "index": "8,8",
             "lanes": "57,58",
             "breakout_modes": {
+                "1x25G(1)": ["Eth9"],
+                "2x25G": ["Eth9/1", "Eth9/2"],
                 "1x100G": [
                     "Eth9"
                 ]
             }
         },
-        "Ethernet10": {
+        "Ethernet19": {
             "index": "9,9",
             "lanes": "59,60",
             "breakout_modes": {
+                "1x25G(1)": ["Eth10"],
+                "2x25G": ["Eth10/1", "Eth10/2"],
                 "1x100G": [
                     "Eth10"
                 ]
             }
         },
-        "Ethernet11": {
+        "Ethernet21": {
             "index": "10,10",
             "lanes": "61,62",
             "breakout_modes": {
+                "1x25G(1)": ["Eth11"],
+                "2x25G": ["Eth11/1", "Eth11/2"],
                 "1x100G": [
                     "Eth11"
                 ]
             }
         },
-        "Ethernet12": {
+        "Ethernet23": {
             "index": "11,11",
             "lanes": "63,64",
             "breakout_modes": {
+                "1x25G(1)": ["Eth12"],
+                "2x25G": ["Eth12/1", "Eth12/2"],
                 "1x100G": [
                     "Eth12"
                 ]
             }
         },
-        "Ethernet13": {
+        "Ethernet25": {
             "index": "12,12",
             "lanes": "9,10",
             "breakout_modes": {
+                "1x25G(1)": ["Eth13"],
+                "2x25G": ["Eth13/1", "Eth13/2"],
                 "1x100G": [
                     "Eth13"
                 ]
             }
         },
-        "Ethernet14": {
+        "Ethernet27": {
             "index": "13,13",
             "lanes": "11,12",
             "breakout_modes": {
+                "1x25G(1)": ["Eth14"],
+                "2x25G": ["Eth14/1", "Eth14/2"],
                 "1x100G": [
                     "Eth14"
                 ]
             }
         },
-        "Ethernet15": {
+        "Ethernet29": {
             "index": "14,14",
             "lanes": "13,14",
             "breakout_modes": {
+                "1x25G(1)": ["Eth15"],
+                "2x25G": ["Eth15/1", "Eth15/2"],
                 "1x100G": [
                     "Eth15"
                 ]
             }
         },
-        "Ethernet16": {
+        "Ethernet31": {
             "index": "15,15",
             "lanes": "15,16",
             "breakout_modes": {
+                "1x25G(1)": ["Eth16"],
+                "2x25G": ["Eth16/1", "Eth16/2"],
                 "1x100G": [
                     "Eth16"
                 ]
             }
         },
-        "Ethernet17": {
+        "Ethernet33": {
             "index": "16,16",
             "lanes": "17,18",
             "breakout_modes": {
+                "1x25G(1)": ["Eth17"],
+                "2x25G": ["Eth17/1", "Eth17/2"],
                 "1x100G": [
                     "Eth17"
                 ]
             }
         },
-        "Ethernet18": {
+        "Ethernet35": {
             "index": "17,17",
             "lanes": "19,20",
             "breakout_modes": {
+                "1x25G(1)": ["Eth18"],
+                "2x25G": ["Eth18/1", "Eth18/2"],
                 "1x100G": [
                     "Eth18"
                 ]
             }
         },
-        "Ethernet19": {
+        "Ethernet37": {
             "index": "18,18",
             "lanes": "21,22",
             "breakout_modes": {
+                "1x25G(1)": ["Eth19"],
+                "2x25G": ["Eth19/1", "Eth19/2"],
                 "1x100G": [
                     "Eth19"
                 ]
             }
         },
-        "Ethernet20": {
+        "Ethernet39": {
             "index": "19,19",
             "lanes": "23,24",
             "breakout_modes": {
+                "1x25G(1)": ["Eth20"],
+                "2x25G": ["Eth20/1", "Eth20/2"],
                 "1x100G": [
                     "Eth20"
                 ]
             }
         },
-        "Ethernet21": {
+        "Ethernet41": {
             "index": "20,20",
             "lanes": "25,26",
             "breakout_modes": {
+                "1x25G(1)": ["Eth21"],
+                "2x25G": ["Eth21/1", "Eth21/2"],
                 "1x100G": [
                     "Eth21"
                 ]
             }
         },
-        "Ethernet22": {
+        "Ethernet43": {
             "index": "21,21",
             "lanes": "27,28",
             "breakout_modes": {
+                "1x25G(1)": ["Eth22"],
+                "2x25G": ["Eth22/1", "Eth22/2"],
                 "1x100G": [
                     "Eth22"
                 ]
             }
         },
-        "Ethernet23": {
+        "Ethernet45": {
             "index": "22,22",
             "lanes": "29,30",
             "breakout_modes": {
+                "1x25G(1)": ["Eth23"],
+                "2x25G": ["Eth23/1", "Eth23/2"],
                 "1x100G": [
                     "Eth23"
                 ]
             }
         },
-        "Ethernet24": {
+        "Ethernet47": {
             "index": "23,23",
             "lanes": "31,32",
             "breakout_modes": {
+                "1x25G(1)": ["Eth24"],
+                "2x25G": ["Eth24/1", "Eth24/2"],
                 "1x100G": [
                     "Eth24"
                 ]
             }
         },
-        "Ethernet25": {
+        "Ethernet49": {
             "index": "24,24",
             "lanes": "81,82",
             "breakout_modes": {
+                "1x25G(1)": ["Eth25"],
+                "2x25G": ["Eth25/1", "Eth25/2"],
                 "1x100G": [
                     "Eth25"
                 ]
             }
         },
-        "Ethernet26": {
+        "Ethernet51": {
             "index": "25,25",
             "lanes": "83,84",
             "breakout_modes": {
+                "1x25G(1)": ["Eth26"],
+                "2x25G": ["Eth26/1", "Eth26/2"],
                 "1x100G": [
                     "Eth26"
                 ]
             }
         },
-        "Ethernet27": {
+        "Ethernet53": {
             "index": "26,26",
             "lanes": "85,86",
             "breakout_modes": {
+                "1x25G(1)": ["Eth27"],
+                "2x25G": ["Eth27/1", "Eth27/2"],
                 "1x100G": [
                     "Eth27"
                 ]
             }
         },
-        "Ethernet28": {
+        "Ethernet55": {
             "index": "27,27",
             "lanes": "87,88",
             "breakout_modes": {
+                "1x25G(1)": ["Eth28"],
+                "2x25G": ["Eth28/1", "Eth28/2"],
                 "1x100G": [
                     "Eth28"
                 ]
             }
         },
-        "Ethernet29": {
+        "Ethernet57": {
             "index": "28,28",
             "lanes": "89,90",
             "breakout_modes": {
+                "1x25G(1)": ["Eth29"],
+                "2x25G": ["Eth29/1", "Eth29/2"],
                 "1x100G": [
                     "Eth29"
                 ]
             }
         },
-        "Ethernet30": {
+        "Ethernet59": {
             "index": "29,29",
             "lanes": "91,92",
             "breakout_modes": {
+                "1x25G(1)": ["Eth30"],
+                "2x25G": ["Eth30/1", "Eth30/2"],
                 "1x100G": [
                     "Eth30"
                 ]
             }
         },
-        "Ethernet31": {
+        "Ethernet61": {
             "index": "30,30",
             "lanes": "93,94",
             "breakout_modes": {
+                "1x25G(1)": ["Eth31"],
+                "2x25G": ["Eth31/1", "Eth31/2"],
                 "1x100G": [
                     "Eth31"
                 ]
             }
         },
-        "Ethernet32": {
+        "Ethernet63": {
             "index": "31,31",
             "lanes": "95,96",
             "breakout_modes": {
+                "1x25G(1)": ["Eth32"],
+                "2x25G": ["Eth32/1", "Eth32/2"],
                 "1x100G": [
                     "Eth32"
                 ]
             }
         },
-        "Ethernet33": {
+        "Ethernet65": {
             "index": "32,32",
             "lanes": "97,98",
             "breakout_modes": {
+                "1x25G(1)": ["Eth33"],
+                "2x25G": ["Eth33/1", "Eth33/2"],
                 "1x100G": [
                     "Eth33"
                 ]
             }
         },
-        "Ethernet34": {
+        "Ethernet67": {
             "index": "33,33",
             "lanes": "99,100",
             "breakout_modes": {
+                "1x25G(1)": ["Eth34"],
+                "2x25G": ["Eth34/1", "Eth34/2"],
                 "1x100G": [
                     "Eth34"
                 ]
             }
         },
-        "Ethernet35": {
+        "Ethernet69": {
             "index": "34,34",
             "lanes": "101,102",
             "breakout_modes": {
+                "1x25G(1)": ["Eth35"],
+                "2x25G": ["Eth35/1", "Eth35/2"],
                 "1x100G": [
                     "Eth35"
                 ]
             }
         },
-        "Ethernet36": {
+        "Ethernet71": {
             "index": "35,35",
             "lanes": "103,104",
             "breakout_modes": {
+                "1x25G(1)": ["Eth36"],
+                "2x25G": ["Eth36/1", "Eth36/2"],
                 "1x100G": [
                     "Eth36"
                 ]
             }
         },
-        "Ethernet37": {
+        "Ethernet73": {
             "index": "36,36",
             "lanes": "137,138",
             "breakout_modes": {
+                "1x25G(1)": ["Eth37"],
+                "2x25G": ["Eth37/1", "Eth37/2"],
                 "1x100G": [
                     "Eth37"
                 ]
             }
         },
-        "Ethernet38": {
+        "Ethernet75": {
             "index": "37,37",
             "lanes": "139,140",
             "breakout_modes": {
+                "1x25G(1)": ["Eth38"],
+                "2x25G": ["Eth38/1", "Eth38/2"],
                 "1x100G": [
                     "Eth38"
                 ]
             }
         },
-        "Ethernet39": {
+        "Ethernet77": {
             "index": "38,38",
             "lanes": "141,142",
             "breakout_modes": {
+                "1x25G(1)": ["Eth39"],
+                "2x25G": ["Eth39/1", "Eth39/2"],
                 "1x100G": [
                     "Eth39"
                 ]
             }
         },
-        "Ethernet40": {
+        "Ethernet79": {
             "index": "39,39",
             "lanes": "143,144",
             "breakout_modes": {
+                "1x25G(1)": ["Eth40"],
+                "2x25G": ["Eth40/1", "Eth40/2"],
                 "1x100G": [
                     "Eth40"
                 ]
             }
         },
-        "Ethernet41": {
+        "Ethernet81": {
             "index": "40,40",
             "lanes": "145,146",
             "breakout_modes": {
+                "1x25G(1)": ["Eth41"],
+                "2x25G": ["Eth41/1", "Eth41/2"],
                 "1x100G": [
                     "Eth41"
                 ]
             }
         },
-        "Ethernet42": {
+        "Ethernet83": {
             "index": "41,41",
             "lanes": "147,148",
             "breakout_modes": {
+                "1x25G(1)": ["Eth42"],
+                "2x25G": ["Eth42/1", "Eth42/2"],
                 "1x100G": [
                     "Eth42"
                 ]
             }
         },
-        "Ethernet43": {
+        "Ethernet85": {
             "index": "42,42",
             "lanes": "149,150",
             "breakout_modes": {
+                "1x25G(1)": ["Eth43"],
+                "2x25G": ["Eth43/1", "Eth43/2"],
                 "1x100G": [
                     "Eth43"
                 ]
             }
         },
-        "Ethernet44": {
+        "Ethernet87": {
             "index": "43,43",
             "lanes": "151,152",
             "breakout_modes": {
+                "1x25G(1)": ["Eth44"],
+                "2x25G": ["Eth44/1", "Eth44/2"],
                 "1x100G": [
                     "Eth44"
                 ]
             }
         },
-        "Ethernet45": {
+        "Ethernet89": {
             "index": "44,44",
             "lanes": "153,154",
             "breakout_modes": {
+                "1x25G(1)": ["Eth45"],
+                "2x25G": ["Eth45/1", "Eth45/2"],
                 "1x100G": [
                     "Eth45"
                 ]
             }
         },
-        "Ethernet46": {
+        "Ethernet91": {
             "index": "45,45",
             "lanes": "155,156",
             "breakout_modes": {
+                "1x25G(1)": ["Eth46"],
+                "2x25G": ["Eth46/1", "Eth46/2"],
                 "1x100G": [
                     "Eth46"
                 ]
             }
         },
-        "Ethernet47": {
+        "Ethernet93": {
             "index": "46,46",
             "lanes": "157,158",
             "breakout_modes": {
+                "1x25G(1)": ["Eth47"],
+                "2x25G": ["Eth47/1", "Eth47/2"],
                 "1x100G": [
                     "Eth47"
                 ]
             }
         },
-        "Ethernet48": {
+        "Ethernet95": {
             "index": "47,47",
             "lanes": "159,160",
             "breakout_modes": {
+                "1x25G(1)": ["Eth48"],
+                "2x25G": ["Eth48/1", "Eth48/2"],
                 "1x100G": [
                     "Eth48"
                 ]
             }
         },
-        "Ethernet49": {
+        "Ethernet97": {
             "index": "48,48,48,48,48,48,48,48",
             "lanes": "1,2,3,4,5,6,7,8",
             "breakout_modes": {
+                "1x100G(4)": ["Eth49" ],
                 "4x100G": [
                     "Eth49/1",
                     "Eth49/2",
@@ -1044,10 +1141,11 @@
                 ]
             }
         },
-        "Ethernet57": {
+        "Ethernet105": {
             "index": "49,49,49,49,49,49,49,49",
             "lanes": "33,34,35,36,37,38,39,40",
             "breakout_modes": {
+                "1x100G(4)": ["Eth50" ],
                 "4x100G": [
                     "Eth50/1",
                     "Eth50/2",
@@ -1063,10 +1161,11 @@
                 ]
             }
         },
-        "Ethernet65": {
+        "Ethernet113": {
             "index": "50,50,50,50,50,50,50,50",
             "lanes": "73,74,75,76,77,78,79,80",
             "breakout_modes": {
+                "1x100G(4)": ["Eth51" ],
                 "4x100G": [
                     "Eth51/1",
                     "Eth51/2",
@@ -1082,10 +1181,11 @@
                 ]
             }
         },
-        "Ethernet73": {
+        "Ethernet121": {
             "index": "51,51,51,51,51,51,51,51",
             "lanes": "65,66,67,68,69,70,71,72",
             "breakout_modes": {
+                "1x100G(4)": ["Eth52" ],
                 "4x100G": [
                     "Eth52/1",
                     "Eth52/2",
@@ -1101,10 +1201,11 @@
                 ]
             }
         },
-        "Ethernet81": {
+        "Ethernet129": {
             "index": "52,52,52,52,52,52,52,52",
             "lanes": "105,106,107,108,109,110,111,112",
             "breakout_modes": {
+                "1x100G(4)": ["Eth53" ],
                 "4x100G": [
                     "Eth53/1",
                     "Eth53/2",
@@ -1120,28 +1221,49 @@
                 ]
             }
         },
-        "Ethernet89": {
+        "Ethernet137": {
             "index": "53,53,53,53,53,53,53,53",
             "lanes": "113,114,115,116,117,118,119,120",
             "breakout_modes": {
+                "1x100G(4)": ["Eth54" ],
+                "4x100G": [
+                    "Eth54/1",
+                    "Eth54/2",
+                    "Eth54/3",
+                    "Eth54/4"
+                ],
                 "1x400G": [
                     "Eth54"
                 ]
             }
         },
-        "Ethernet97": {
+        "Ethernet145": {
             "index": "54,54,54,54,54,54,54,54",
             "lanes": "129,130,131,132,133,134,135,136",
             "breakout_modes": {
+                "1x100G(4)": ["Eth55" ],
+                "4x100G": [
+                    "Eth55/1",
+                    "Eth55/2",
+                    "Eth55/3",
+                    "Eth55/4"
+                ],
                 "1x400G": [
                     "Eth55"
                 ]
             }
         },
-        "Ethernet105": {
+        "Ethernet153": {
             "index": "55,55,55,55,55,55,55,55",
             "lanes": "121,122,123,124,125,126,127,128",
             "breakout_modes": {
+                "1x100G(4)": ["Eth56" ],
+                "4x100G": [
+                    "Eth56/1",
+                    "Eth56/2",
+                    "Eth56/3",
+                    "Eth56/4"
+                ],
                 "1x400G": [
                     "Eth56"
                 ]
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json
index 5401dfda99f..3536a8739db 100644
--- a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json
@@ -1,106 +1,172 @@
 {
-	"interfaces": {
-		"Ethernet1": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet9": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet17": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet25": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet33": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet41": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet49": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet57": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet65": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet73": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet81": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet89": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet97": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet105": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet113": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet121": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet129": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet137": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet145": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet153": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet161": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet169": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet177": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet185": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet193": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet201": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet209": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet217": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet225": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet233": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet241": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet249": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet257": {
-			"default_brkout_mode": "1x10G"
-		},
-		"Ethernet258": {
-			"default_brkout_mode": "1x10G"
-		}
-	}
+    "interfaces": {
+        "Ethernet1": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet9": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet17": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet25": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet33": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet41": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet49": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet57": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet65": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet73": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet81": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet89": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet97": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet105": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet113": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet121": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet129": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet137": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet145": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet153": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet161": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet169": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet177": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet185": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet193": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet201": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet209": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet217": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet225": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet233": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet241": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet249": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "none"
+        },
+        "Ethernet257": {
+            "default_brkout_mode": "1x10G",
+            "fec": "none"
+        },
+        "Ethernet258": {
+            "default_brkout_mode": "1x10G",
+            "fec": "none"
+        }
+    }
 }
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/common_config_support b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/common_config_support
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin
index ef516314027..bc9ca8dc64a 100644
Binary files a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin and b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin differ
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf
index 60549859fca..c8f43bb76b0 100644
--- a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf
@@ -1,4 +1,5 @@
 CONSOLE_SPEED=115200
 ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=i2c_ismt,i2c_i801,r8169,r8168,intel_spi_pci,sdhci_pci"
 CONSOLE_PORT=0xf060
-CONSOLE_DEV=0
\ No newline at end of file
+CONSOLE_DEV=0
+ONIE_IMAGE_PART_SIZE=1048576
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml
index e419f403257..478a87a7dff 100644
--- a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml
@@ -105,12 +105,6 @@
   id: 19dc
   name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
     11)'
-- bus: '00'
-  dev: 1f
-  fn: '1'
-  id: 19dd
-  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Primary
-    to Side Band (P2SB) Bridge (rev 11)'
 - bus: '00'
   dev: 1f
   fn: '2'
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json
index b958c147ecc..a5f7a406d39 100644
--- a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json
@@ -1,197 +1,325 @@
 {
-	"interfaces": {
-		"Ethernet1": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet9": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet17": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet25": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet33": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet41": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet49": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet57": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet65": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet73": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet81": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet89": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet97": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet105": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet113": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet121": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet129": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet137": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet145": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet153": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet161": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet169": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet177": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet185": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet193": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet201": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet209": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet217": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet225": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet233": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet241": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet249": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet257": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet265": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet273": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet281": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet289": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet297": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet305": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet313": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet321": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet329": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet337": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet345": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet353": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet361": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet369": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet377": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet385": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet393": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet401": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet409": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet417": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet425": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet433": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet441": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet449": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet457": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet465": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet473": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet481": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet489": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet497": {
-			"default_brkout_mode": "1x400G"
-		},
-		"Ethernet505": {
-			"default_brkout_mode": "1x400G"
-		}
-	}
+    "interfaces": {
+        "Ethernet1": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet9": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet17": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet25": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet33": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet41": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet49": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet57": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet65": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet73": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet81": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet89": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet97": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet105": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet113": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet121": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet129": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet137": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet145": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet153": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet161": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet169": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet177": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet185": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet193": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet201": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet209": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet217": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet225": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet233": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet241": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet249": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet257": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet265": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet273": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet281": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet289": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet297": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet305": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet313": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet321": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet329": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet337": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet345": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet353": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet361": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet369": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet377": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet385": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet393": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet401": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet409": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet417": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet425": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet433": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet441": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet449": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet457": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet465": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet473": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet481": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet489": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet497": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet505": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        }
+    }
 }
 
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini
index d6bdd4bf54d..e898df85172 100644
--- a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini
@@ -1,65 +1,65 @@
-# name            lanes                                  alias                     index     speed
-Ethernet1         65,66,67,68,69,70,71,72                fourHundredGigE0/1        0         400000
-Ethernet9         69,70,71,72,73,74,75,76                fourHundredGigE0/2        1         400000
-Ethernet17        25,26,27,28,29,30,31,32                fourHundredGigE0/3        2         400000
-Ethernet25        21,22,23,24,25,26,27,28                fourHundredGigE0/4        3         400000
-Ethernet33        73,74,75,76,77,78,79,80                fourHundredGigE0/5        4         400000
-Ethernet41        77,78,79,80,81,82,83,84                fourHundredGigE0/6        5         400000
-Ethernet49        33,34,35,36,37,38,39,40                fourHundredGigE0/7        6         400000
-Ethernet57        29,30,31,32,33,34,35,36                fourHundredGigE0/8        7         400000
-Ethernet65        81,82,83,84,85,86,87,88                fourHundredGigE0/9        8         400000
-Ethernet73        85,86,87,88,89,90,91,92                fourHundredGigE0/10       9         400000
-Ethernet81        41,42,43,44,45,46,47,48                fourHundredGigE0/11       10        400000
-Ethernet89        37,38,39,40,41,42,43,44                fourHundredGigE0/12       11        400000
-Ethernet97        89,90,91,92,93,94,95,96                fourHundredGigE0/13       12        400000
-Ethernet105       93,94,95,96,97,98,99,100               fourHundredGigE0/14       13        400000
-Ethernet113       49,50,51,52,53,54,55,56                fourHundredGigE0/15       14        400000
-Ethernet121       45,46,47,48,49,50,51,52                fourHundredGigE0/16       15        400000
-Ethernet129       97,98,99,100,101,102,103,104           fourHundredGigE0/17       16        400000
-Ethernet137       101,102,103,104,105,106,107,108        fourHundredGigE0/18       17        400000
-Ethernet145       57,58,59,60,61,62,63,64                fourHundredGigE0/19       18        400000
-Ethernet153       53,54,55,56,57,58,59,60                fourHundredGigE0/20       19        400000
-Ethernet161       105,106,107,108,109,110,111,112        fourHundredGigE0/21       20        400000
-Ethernet169       109,110,111,112,113,114,115,116        fourHundredGigE0/22       21        400000
-Ethernet177       17,18,19,20,21,22,23,24                fourHundredGigE0/23       22        400000
-Ethernet185       61,62,63,64,65,66,67,68                fourHundredGigE0/24       23        400000
-Ethernet193       113,114,115,116,117,118,119,120        fourHundredGigE0/25       24        400000
-Ethernet201       117,118,119,120,121,122,123,124        fourHundredGigE0/26       25        400000
-Ethernet209       9,10,11,12,13,14,15,16                 fourHundredGigE0/27       26        400000
-Ethernet217       13,14,15,16,17,18,19,20                fourHundredGigE0/28       27        400000
-Ethernet225       121,122,123,124,125,126,127,128        fourHundredGigE0/29       28        400000
-Ethernet233       125,126,127,128,129,130,131,132        fourHundredGigE0/30       29        400000
-Ethernet241       1,2,3,4,5,6,7,8                        fourHundredGigE0/31       30        400000
-Ethernet249       5,6,7,8,9,10,11,12                     fourHundredGigE0/32       31        400000
-Ethernet257       133,134,135,136,137,138,139,140        fourHundredGigE0/33       32        400000
-Ethernet265       129,130,131,132,133,134,135,136        fourHundredGigE0/34       33        400000
-Ethernet273       249,250,251,252,253,254,255,256        fourHundredGigE0/35       34        400000
-Ethernet281       253,254,255,256,257,258,259,260        fourHundredGigE0/36       35        400000
-Ethernet289       141,142,143,144,145,146,147,148        fourHundredGigE0/37       36        400000
-Ethernet297       137,138,139,140,141,142,143,144        fourHundredGigE0/38       37        400000
-Ethernet305       241,242,243,244,245,246,247,248        fourHundredGigE0/39       38        400000
-Ethernet313       245,246,247,248,249,250,251,252        fourHundredGigE0/40       39        400000
-Ethernet321       149,150,151,152,153,154,155,156        fourHundredGigE0/41       40        400000
-Ethernet329       145,146,147,148,149,150,151,152        fourHundredGigE0/42       41        400000
-Ethernet337       237,238,239,240,241,242,243,244        fourHundredGigE0/43       42        400000
-Ethernet345       197,198,199,200,201,202,203,204        fourHundredGigE0/44       43        400000
-Ethernet353       157,158,159,160,161,162,163,164        fourHundredGigE0/45       44        400000
-Ethernet361       153,154,155,156,157,158,159,160        fourHundredGigE0/46       45        400000
-Ethernet369       193,194,195,196,197,198,199,200        fourHundredGigE0/47       46        400000
-Ethernet377       205,206,207,208,209,210,211,212        fourHundredGigE0/48       47        400000
-Ethernet385       165,166,167,168,169,170,171,172        fourHundredGigE0/49       48        400000
-Ethernet393       161,162,163,164,165,166,167,168        fourHundredGigE0/50       49        400000
-Ethernet401       201,202,203,204,205,206,207,208        fourHundredGigE0/51       50        400000
-Ethernet409       213,214,215,216,217,218,219,220        fourHundredGigE0/52       51        400000
-Ethernet417       173,174,175,176,177,178,179,180        fourHundredGigE0/53       52        400000
-Ethernet425       169,170,171,172,173,174,175,176        fourHundredGigE0/54       53        400000
-Ethernet433       209,210,211,212,213,214,215,216        fourHundredGigE0/55       54        400000
-Ethernet441       221,222,223,224,225,226,227,228        fourHundredGigE0/56       55        400000
-Ethernet449       181,182,183,184,185,186,187,188        fourHundredGigE0/57       56        400000
-Ethernet457       177,178,179,180,181,182,183,184        fourHundredGigE0/58       57        400000
-Ethernet465       217,218,219,220,221,222,223,224        fourHundredGigE0/59       58        400000
-Ethernet473       229,230,231,232,233,234,235,236        fourHundredGigE0/60       59        400000
-Ethernet481       189,190,191,192,193,194,195,196        fourHundredGigE0/61       60        400000
-Ethernet489       185,186,187,188,189,190,191,192        fourHundredGigE0/62       61        400000
-Ethernet497       225,226,227,228,229,230,231,232        fourHundredGigE0/63       62        400000
-Ethernet505       233,234,235,236,237,238,239,240        fourHundredGigE0/64       63        400000
+# name            lanes                                          alias                     index     speed
+Ethernet1         129,130,131,132,133,134,135,136                fourHundredGigE0/1        0         400000
+Ethernet9         137,138,139,140,141,142,143,144                fourHundredGigE0/2        1         400000
+Ethernet17        49,50,51,52,53,54,55,56                        fourHundredGigE0/3        2         400000
+Ethernet25        41,42,43,44,45,46,47,48                        fourHundredGigE0/4        3         400000
+Ethernet33        145,146,147,148,149,150,151,152                fourHundredGigE0/5        4         400000
+Ethernet41        153,154,155,156,157,158,159,160                fourHundredGigE0/6        5         400000
+Ethernet49        65,66,67,68,69,70,71,72                        fourHundredGigE0/7        6         400000
+Ethernet57        57,58,59,60,61,62,63,64                        fourHundredGigE0/8        7         400000
+Ethernet65        161,162,163,164,165,166,167,168                fourHundredGigE0/9        8         400000
+Ethernet73        169,170,171,172,173,174,175,176                fourHundredGigE0/10       9         400000
+Ethernet81        81,82,83,84,85,86,87,88                        fourHundredGigE0/11       10        400000
+Ethernet89        73,74,75,76,77,78,79,80                        fourHundredGigE0/12       11        400000
+Ethernet97        177,178,179,180,181,182,183,184                fourHundredGigE0/13       12        400000
+Ethernet105       185,186,187,188,189,190,191,192                fourHundredGigE0/14       13        400000
+Ethernet113       97,98,99,100,101,102,103,104                   fourHundredGigE0/15       14        400000
+Ethernet121       89,90,91,92,93,94,95,96                        fourHundredGigE0/16       15        400000
+Ethernet129       193,194,195,196,197,198,199,200                fourHundredGigE0/17       16        400000
+Ethernet137       201,202,203,204,205,206,207,208                fourHundredGigE0/18       17        400000
+Ethernet145       113,114,115,116,117,118,119,120                fourHundredGigE0/19       18        400000
+Ethernet153       105,106,107,108,109,110,111,112                fourHundredGigE0/20       19        400000
+Ethernet161       209,210,211,212,213,214,215,216                fourHundredGigE0/21       20        400000
+Ethernet169       217,218,219,220,221,222,223,224                fourHundredGigE0/22       21        400000
+Ethernet177       33,34,35,36,37,38,39,40                        fourHundredGigE0/23       22        400000
+Ethernet185       121,122,123,124,125,126,127,128                fourHundredGigE0/24       23        400000
+Ethernet193       225,226,227,228,229,230,231,232                fourHundredGigE0/25       24        400000
+Ethernet201       233,234,235,236,237,238,239,240                fourHundredGigE0/26       25        400000
+Ethernet209       17,18,19,20,21,22,23,24                        fourHundredGigE0/27       26        400000
+Ethernet217       25,26,27,28,29,30,31,32                        fourHundredGigE0/28       27        400000
+Ethernet225       241,242,243,244,245,246,247,248                fourHundredGigE0/29       28        400000
+Ethernet233       249,250,251,252,253,254,255,256                fourHundredGigE0/30       29        400000
+Ethernet241       1,2,3,4,5,6,7,8                                fourHundredGigE0/31       30        400000
+Ethernet249       9,10,11,12,13,14,15,16                         fourHundredGigE0/32       31        400000
+Ethernet257       265,266,267,268,269,270,271,272                fourHundredGigE0/33       32        400000
+Ethernet265       257,258,259,260,261,262,263,264                fourHundredGigE0/34       33        400000
+Ethernet273       497,498,499,500,501,502,503,504                fourHundredGigE0/35       34        400000
+Ethernet281       505,506,507,508,509,510,511,512                fourHundredGigE0/36       35        400000
+Ethernet289       281,282,283,284,285,286,287,288                fourHundredGigE0/37       36        400000
+Ethernet297       273,274,275,276,277,278,279,280                fourHundredGigE0/38       37        400000
+Ethernet305       481,482,483,484,485,486,487,488                fourHundredGigE0/39       38        400000
+Ethernet313       489,490,491,492,493,494,495,496                fourHundredGigE0/40       39        400000
+Ethernet321       297,298,299,300,301,302,303,304                fourHundredGigE0/41       40        400000
+Ethernet329       289,290,291,292,293,294,295,296                fourHundredGigE0/42       41        400000
+Ethernet337       473,474,475,476,477,478,479,480                fourHundredGigE0/43       42        400000
+Ethernet345       393,394,395,396,397,398,399,400                fourHundredGigE0/44       43        400000
+Ethernet353       313,314,315,316,317,318,319,320                fourHundredGigE0/45       44        400000
+Ethernet361       305,306,307,308,309,310,311,312                fourHundredGigE0/46       45        400000
+Ethernet369       385,386,387,388,389,390,391,392                fourHundredGigE0/47       46        400000
+Ethernet377       409,410,411,412,413,414,415,416                fourHundredGigE0/48       47        400000
+Ethernet385       329,330,331,332,333,334,335,336                fourHundredGigE0/49       48        400000
+Ethernet393       321,322,323,324,325,326,327,328                fourHundredGigE0/50       49        400000
+Ethernet401       401,402,403,404,405,406,407,408                fourHundredGigE0/51       50        400000
+Ethernet409       425,426,427,428,429,430,431,432                fourHundredGigE0/52       51        400000
+Ethernet417       345,346,347,348,349,350,351,352                fourHundredGigE0/53       52        400000
+Ethernet425       337,338,339,340,341,342,343,344                fourHundredGigE0/54       53        400000
+Ethernet433       417,418,419,420,421,422,423,424                fourHundredGigE0/55       54        400000
+Ethernet441       441,442,443,444,445,446,447,448                fourHundredGigE0/56       55        400000
+Ethernet449       361,362,363,364,365,366,367,368                fourHundredGigE0/57       56        400000
+Ethernet457       353,354,355,356,357,358,359,360                fourHundredGigE0/58       57        400000
+Ethernet465       433,434,435,436,437,438,439,440                fourHundredGigE0/59       58        400000
+Ethernet473       457,458,459,460,461,462,463,464                fourHundredGigE0/60       59        400000
+Ethernet481       377,378,379,380,381,382,383,384                fourHundredGigE0/61       60        400000
+Ethernet489       369,370,371,372,373,374,375,376                fourHundredGigE0/62       61        400000
+Ethernet497       449,450,451,452,453,454,455,456                fourHundredGigE0/63       62        400000
+Ethernet505       465,466,467,468,469,470,471,472                fourHundredGigE0/64       63        400000
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml
index d2b24e2cb1a..3af958db305 100644
--- a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml
@@ -16,7 +16,8 @@ bcm_device:
             sai_pfc_defaults_disable: 1
             sai_optimized_mmu: 1
             sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc
-            sai_port_pmap_phy_lanes: 1
+            stat_custom_receive0_management_mode: 1
+            sai_port_pmap_phy_lanes: 0
 ...
 
 ---
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/common_config_support b/device/micas/x86_64-micas_m2-w6930-64qc-r0/common_config_support
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf
index 7a9fec8cc99..55b86ec10a3 100644
--- a/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf
@@ -1,2 +1,3 @@
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
\ No newline at end of file
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
+ONIE_IMAGE_PART_SIZE=1048576
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json
index 208b81383ec..90363c6426f 100644
--- a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json
@@ -818,7 +818,7 @@
     "interfaces": {
         "Ethernet1": {
             "index": "0,0,0,0,0,0,0,0",
-            "lanes": "65,66,67,68",
+            "lanes": "129,130,131,132,133,134,135,136",
             "breakout_modes": {
                 "1x400G": [
                     "Eth1"
@@ -837,7 +837,7 @@
         },
         "Ethernet9": {
             "index": "1,1,1,1,1,1,1,1",
-            "lanes": "69,70,71,72",
+            "lanes": "137,138,139,140,141,142,143,144",
             "breakout_modes": {
                 "1x400G": [
                     "Eth2"
@@ -856,7 +856,7 @@
         },
         "Ethernet17": {
             "index": "2,2,2,2,2,2,2,2",
-            "lanes": "25,26,27,28",
+            "lanes": "49,50,51,52,53,54,55,56",
             "breakout_modes": {
                 "1x400G": [
                     "Eth3"
@@ -875,7 +875,7 @@
         },
         "Ethernet25": {
             "index": "3,3,3,3,3,3,3,3",
-            "lanes": "21,22,23,24",
+            "lanes": "41,42,43,44,45,46,47,48",
             "breakout_modes": {
                 "1x400G": [
                     "Eth4"
@@ -894,7 +894,7 @@
         },
         "Ethernet33": {
             "index": "4,4,4,4,4,4,4,4",
-            "lanes": "73,74,75,76",
+            "lanes": "145,146,147,148,149,150,151,152",
             "breakout_modes": {
                 "1x400G": [
                     "Eth5"
@@ -913,7 +913,7 @@
         },
         "Ethernet41": {
             "index": "5,5,5,5,5,5,5,5",
-            "lanes": "77,78,79,80",
+            "lanes": "153,154,155,156,157,158,159,160",
             "breakout_modes": {
                 "1x400G": [
                     "Eth6"
@@ -932,7 +932,7 @@
         },
         "Ethernet49": {
             "index": "6,6,6,6,6,6,6,6",
-            "lanes": "33,34,35,36",
+            "lanes": "65,66,67,68,69,70,71,72",
             "breakout_modes": {
                 "1x400G": [
                     "Eth7"
@@ -951,7 +951,7 @@
         },
         "Ethernet57": {
             "index": "7,7,7,7,7,7,7,7",
-            "lanes": "29,30,31,32",
+            "lanes": "57,58,59,60,61,62,63,64",
             "breakout_modes": {
                 "1x400G": [
                     "Eth8"
@@ -970,7 +970,7 @@
         },
         "Ethernet65": {
             "index": "8,8,8,8,8,8,8,8",
-            "lanes": "81,82,83,84",
+            "lanes": "161,162,163,164,165,166,167,168",
             "breakout_modes": {
                 "1x400G": [
                     "Eth9"
@@ -989,7 +989,7 @@
         },
         "Ethernet73": {
             "index": "9,9,9,9,9,9,9,9",
-            "lanes": "85,86,87,88",
+            "lanes": "169,170,171,172,173,174,175,176",
             "breakout_modes": {
                 "1x400G": [
                     "Eth10"
@@ -1008,7 +1008,7 @@
         },
         "Ethernet81": {
             "index": "10,10,10,10,10,10,10,10",
-            "lanes": "41,42,43,44",
+            "lanes": "81,82,83,84,85,86,87,88",
             "breakout_modes": {
                 "1x400G": [
                     "Eth11"
@@ -1027,7 +1027,7 @@
         },
         "Ethernet89": {
             "index": "11,11,11,11,11,11,11,11",
-            "lanes": "37,38,39,40",
+            "lanes": "73,74,75,76,77,78,79,80",
             "breakout_modes": {
                 "1x400G": [
                     "Eth12"
@@ -1046,7 +1046,7 @@
         },
         "Ethernet97": {
             "index": "12,12,12,12,12,12,12,12",
-            "lanes": "89,90,91,92",
+            "lanes": "177,178,179,180,181,182,183,184",
             "breakout_modes": {
                 "1x400G": [
                     "Eth13"
@@ -1065,7 +1065,7 @@
         },
         "Ethernet105": {
             "index": "13,13,13,13,13,13,13,13",
-            "lanes": "93,94,95,96",
+            "lanes": "185,186,187,188,189,190,191,192",
             "breakout_modes": {
                 "1x400G": [
                     "Eth14"
@@ -1084,7 +1084,7 @@
         },
         "Ethernet113": {
             "index": "14,14,14,14,14,14,14,14",
-            "lanes": "49,50,51,52",
+            "lanes": "97,98,99,100,101,102,103,104",
             "breakout_modes": {
                 "1x400G": [
                     "Eth15"
@@ -1103,7 +1103,7 @@
         },
         "Ethernet121": {
             "index": "15,15,15,15,15,15,15,15",
-            "lanes": "45,46,47,48",
+            "lanes": "89,90,91,92,93,94,95,96",
             "breakout_modes": {
                 "1x400G": [
                     "Eth16"
@@ -1122,7 +1122,7 @@
         },
         "Ethernet129": {
             "index": "16,16,16,16,16,16,16,16",
-            "lanes": "97,98,99,100",
+            "lanes": "193,194,195,196,197,198,199,200",
             "breakout_modes": {
                 "1x400G": [
                     "Eth17"
@@ -1141,7 +1141,7 @@
         },
         "Ethernet137": {
             "index": "17,17,17,17,17,17,17,17",
-            "lanes": "101,102,103,104",
+            "lanes": "201,202,203,204,205,206,207,208",
             "breakout_modes": {
                 "1x400G": [
                     "Eth18"
@@ -1160,7 +1160,7 @@
         },
         "Ethernet145": {
             "index": "18,18,18,18,18,18,18,18",
-            "lanes": "57,58,59,60",
+            "lanes": "113,114,115,116,117,118,119,120",
             "breakout_modes": {
                 "1x400G": [
                     "Eth19"
@@ -1179,7 +1179,7 @@
         },
         "Ethernet153": {
             "index": "19,19,19,19,19,19,19,19",
-            "lanes": "53,54,55,56",
+            "lanes": "105,106,107,108,109,110,111,112",
             "breakout_modes": {
                 "1x400G": [
                     "Eth20"
@@ -1198,7 +1198,7 @@
         },
         "Ethernet161": {
             "index": "20,20,20,20,20,20,20,20",
-            "lanes": "105,106,107,108",
+            "lanes": "209,210,211,212,213,214,215,216",
             "breakout_modes": {
                 "1x400G": [
                     "Eth21"
@@ -1217,7 +1217,7 @@
         },
         "Ethernet169": {
             "index": "21,21,21,21,21,21,21,21",
-            "lanes": "109,110,111,112",
+            "lanes": "217,218,219,220,221,222,223,224",
             "breakout_modes": {
                 "1x400G": [
                     "Eth22"
@@ -1236,7 +1236,7 @@
         },
         "Ethernet177": {
             "index": "22,22,22,22,22,22,22,22",
-            "lanes": "17,18,19,20",
+            "lanes": "33,34,35,36,37,38,39,40",
             "breakout_modes": {
                 "1x400G": [
                     "Eth23"
@@ -1255,7 +1255,7 @@
         },
         "Ethernet185": {
             "index": "23,23,23,23,23,23,23,23",
-            "lanes": "61,62,63,64",
+            "lanes": "121,122,123,124,125,126,127,128",
             "breakout_modes": {
                 "1x400G": [
                     "Eth24"
@@ -1274,7 +1274,7 @@
         },
         "Ethernet193": {
             "index": "24,24,24,24,24,24,24,24",
-            "lanes": "113,114,115,116",
+            "lanes": "225,226,227,228,229,230,231,232",
             "breakout_modes": {
                 "1x400G": [
                     "Eth25"
@@ -1293,7 +1293,7 @@
         },
         "Ethernet201": {
             "index": "25,25,25,25,25,25,25,25",
-            "lanes": "117,118,119,120",
+            "lanes": "233,234,235,236,237,238,239,240",
             "breakout_modes": {
                 "1x400G": [
                     "Eth26"
@@ -1312,7 +1312,7 @@
         },
         "Ethernet209": {
             "index": "26,26,26,26,26,26,26,26",
-            "lanes": "9,10,11,12",
+            "lanes": "17,18,19,20,21,22,23,24",
             "breakout_modes": {
                 "1x400G": [
                     "Eth27"
@@ -1331,7 +1331,7 @@
         },
         "Ethernet217": {
             "index": "27,27,27,27,27,27,27,27",
-            "lanes": "13,14,15,16",
+            "lanes": "25,26,27,28,29,30,31,32",
             "breakout_modes": {
                 "1x400G": [
                     "Eth28"
@@ -1350,7 +1350,7 @@
         },
         "Ethernet225": {
             "index": "28,28,28,28,28,28,28,28",
-            "lanes": "121,122,123,124",
+            "lanes": "241,242,243,244,245,246,247,248",
             "breakout_modes": {
                 "1x400G": [
                     "Eth29"
@@ -1369,7 +1369,7 @@
         },
         "Ethernet233": {
             "index": "29,29,29,29,29,29,29,29",
-            "lanes": "125,126,127,128",
+            "lanes": "249,250,251,252,253,254,255,256",
             "breakout_modes": {
                 "1x400G": [
                     "Eth30"
@@ -1388,7 +1388,7 @@
         },
         "Ethernet241": {
             "index": "30,30,30,30,30,30,30,30",
-            "lanes": "1,2,3,4",
+            "lanes": "1,2,3,4,5,6,7,8",
             "breakout_modes": {
                 "1x400G": [
                     "Eth31"
@@ -1407,7 +1407,7 @@
         },
         "Ethernet249": {
             "index": "31,31,31,31,31,31,31,31",
-            "lanes": "5,6,7,8",
+            "lanes": "9,10,11,12,13,14,15,16",
             "breakout_modes": {
                 "1x400G": [
                     "Eth32"
@@ -1426,7 +1426,7 @@
         },
         "Ethernet257": {
             "index": "32,32,32,32,32,32,32,32",
-            "lanes": "133,134,135,136",
+            "lanes": "265,266,267,268,269,270,271,272",
             "breakout_modes": {
                 "1x400G": [
                     "Eth33"
@@ -1445,7 +1445,7 @@
         },
         "Ethernet265": {
             "index": "33,33,33,33,33,33,33,33",
-            "lanes": "129,130,131,132",
+            "lanes": "257,258,259,260,261,262,263,264",
             "breakout_modes": {
                 "1x400G": [
                     "Eth34"
@@ -1464,7 +1464,7 @@
         },
         "Ethernet273": {
             "index": "34,34,34,34,34,34,34,34",
-            "lanes": "249,250,251,252",
+            "lanes": "497,498,499,500,501,502,503,504",
             "breakout_modes": {
                 "1x400G": [
                     "Eth35"
@@ -1483,7 +1483,7 @@
         },
         "Ethernet281": {
             "index": "35,35,35,35,35,35,35,35",
-            "lanes": "253,254,255,256",
+            "lanes": "505,506,507,508,509,510,511,512",
             "breakout_modes": {
                 "1x400G": [
                     "Eth36"
@@ -1502,7 +1502,7 @@
         },
         "Ethernet289": {
             "index": "36,36,36,36,36,36,36,36",
-            "lanes": "141,142,143,144",
+            "lanes": "281,282,283,284,285,286,287,288",
             "breakout_modes": {
                 "1x400G": [
                     "Eth37"
@@ -1521,7 +1521,7 @@
         },
         "Ethernet297": {
             "index": "37,37,37,37,37,37,37,37",
-            "lanes": "137,138,139,140",
+            "lanes": "273,274,275,276,277,278,279,280",
             "breakout_modes": {
                 "1x400G": [
                     "Eth38"
@@ -1540,7 +1540,7 @@
         },
         "Ethernet305": {
             "index": "38,38,38,38,38,38,38,38",
-            "lanes": "241,242,243,244",
+            "lanes": "481,482,483,484,485,486,487,488",
             "breakout_modes": {
                 "1x400G": [
                     "Eth39"
@@ -1559,7 +1559,7 @@
         },
         "Ethernet313": {
             "index": "39,39,39,39,39,39,39,39",
-            "lanes": "245,246,247,248",
+            "lanes": "489,490,491,492,493,494,495,496",
             "breakout_modes": {
                 "1x400G": [
                     "Eth40"
@@ -1578,7 +1578,7 @@
         },
         "Ethernet321": {
             "index": "40,40,40,40,40,40,40,40",
-            "lanes": "149,150,151,152",
+            "lanes": "297,298,299,300,301,302,303,304",
             "breakout_modes": {
                 "1x400G": [
                     "Eth41"
@@ -1597,7 +1597,7 @@
         },
         "Ethernet329": {
             "index": "41,41,41,41,41,41,41,41",
-            "lanes": "145,146,147,148",
+            "lanes": "289,290,291,292,293,294,295,296",
             "breakout_modes": {
                 "1x400G": [
                     "Eth42"
@@ -1616,7 +1616,7 @@
         },
         "Ethernet337": {
             "index": "42,42,42,42,42,42,42,42",
-            "lanes": "237,238,239,240",
+            "lanes": "473,474,475,476,477,478,479,480",
             "breakout_modes": {
                 "1x400G": [
                     "Eth43"
@@ -1635,7 +1635,7 @@
         },
         "Ethernet345": {
             "index": "43,43,43,43,43,43,43,43",
-            "lanes": "197,198,199,200",
+            "lanes": "393,394,395,396,397,398,399,400",
             "breakout_modes": {
                 "1x400G": [
                     "Eth44"
@@ -1654,7 +1654,7 @@
         },
         "Ethernet353": {
             "index": "44,44,44,44,44,44,44,44",
-            "lanes": "157,158,159,160",
+            "lanes": "313,314,315,316,317,318,319,320",
             "breakout_modes": {
                 "1x400G": [
                     "Eth45"
@@ -1673,7 +1673,7 @@
         },
         "Ethernet361": {
             "index": "45,45,45,45,45,45,45,45",
-            "lanes": "153,154,155,156",
+            "lanes": "305,306,307,308,309,310,311,312",
             "breakout_modes": {
                 "1x400G": [
                     "Eth46"
@@ -1692,7 +1692,7 @@
         },
         "Ethernet369": {
             "index": "46,46,46,46,46,46,46,46",
-            "lanes": "193,194,195,196",
+            "lanes": "385,386,387,388,389,390,391,392",
             "breakout_modes": {
                 "1x400G": [
                     "Eth47"
@@ -1711,7 +1711,7 @@
         },
         "Ethernet377": {
             "index": "47,47,47,47,47,47,47,47",
-            "lanes": "205,206,207,208",
+            "lanes": "409,410,411,412,413,414,415,416",
             "breakout_modes": {
                 "1x400G": [
                     "Eth48"
@@ -1730,7 +1730,7 @@
         },
         "Ethernet385": {
             "index": "48,48,48,48,48,48,48,48",
-            "lanes": "165,166,167,168",
+            "lanes": "329,330,331,332,333,334,335,336",
             "breakout_modes": {
                 "1x400G": [
                     "Eth49"
@@ -1749,7 +1749,7 @@
         },
         "Ethernet393": {
             "index": "49,49,49,49,49,49,49,49",
-            "lanes": "161,162,163,164",
+            "lanes": "321,322,323,324,325,326,327,328",
             "breakout_modes": {
                 "1x400G": [
                     "Eth50"
@@ -1768,7 +1768,7 @@
         },
         "Ethernet401": {
             "index": "50,50,50,50,50,50,50,50",
-            "lanes": "201,202,203,204",
+            "lanes": "401,402,403,404,405,406,407,408",
             "breakout_modes": {
                 "1x400G": [
                     "Eth51"
@@ -1787,7 +1787,7 @@
         },
         "Ethernet409": {
             "index": "51,51,51,51,51,51,51,51",
-            "lanes": "213,214,215,216",
+            "lanes": "425,426,427,428,429,430,431,432",
             "breakout_modes": {
                 "1x400G": [
                     "Eth52"
@@ -1806,7 +1806,7 @@
         },
         "Ethernet417": {
             "index": "52,52,52,52,52,52,52,52",
-            "lanes": "173,174,175,176",
+            "lanes": "345,346,347,348,349,350,351,352",
             "breakout_modes": {
                 "1x400G": [
                     "Eth53"
@@ -1825,7 +1825,7 @@
         },
         "Ethernet425": {
             "index": "53,53,53,53,53,53,53,53",
-            "lanes": "169,170,171,172",
+            "lanes": "337,338,339,340,341,342,343,344",
             "breakout_modes": {
                 "1x400G": [
                     "Eth54"
@@ -1844,7 +1844,7 @@
         },
         "Ethernet433": {
             "index": "54,54,54,54,54,54,54,54",
-            "lanes": "209,210,211,212",
+            "lanes": "417,418,419,420,421,422,423,424",
             "breakout_modes": {
                 "1x400G": [
                     "Eth55"
@@ -1863,7 +1863,7 @@
         },
         "Ethernet441": {
             "index": "55,55,55,55,55,55,55,55",
-            "lanes": "221,222,223,224",
+            "lanes": "441,442,443,444,445,446,447,448",
             "breakout_modes": {
                 "1x400G": [
                     "Eth56"
@@ -1882,7 +1882,7 @@
         },
         "Ethernet449": {
             "index": "56,56,56,56,56,56,56,56",
-            "lanes": "181,182,183,184",
+            "lanes": "361,362,363,364,365,366,367,368",
             "breakout_modes": {
                 "1x400G": [
                     "Eth57"
@@ -1901,7 +1901,7 @@
         },
         "Ethernet457": {
             "index": "57,57,57,57,57,57,57,57",
-            "lanes": "177,178,179,180",
+            "lanes": "353,354,355,356,357,358,359,360",
             "breakout_modes": {
                 "1x400G": [
                     "Eth58"
@@ -1920,7 +1920,7 @@
         },
         "Ethernet465": {
             "index": "58,58,58,58,58,58,58,58",
-            "lanes": "217,218,219,220",
+            "lanes": "433,434,435,436,437,438,439,440",
             "breakout_modes": {
                 "1x400G": [
                     "Eth59"
@@ -1939,7 +1939,7 @@
         },
         "Ethernet473": {
             "index": "59,59,59,59,59,59,59,59",
-            "lanes": "229,230,231,232",
+            "lanes": "457,458,459,460,461,462,463,464",
             "breakout_modes": {
                 "1x400G": [
                     "Eth60"
@@ -1958,7 +1958,7 @@
         },
         "Ethernet481": {
             "index": "60,60,60,60,60,60,60,60",
-            "lanes": "189,190,191,192",
+            "lanes": "377,378,379,380,381,382,383,384",
             "breakout_modes": {
                 "1x400G": [
                     "Eth61"
@@ -1977,7 +1977,7 @@
         },
         "Ethernet489": {
             "index": "61,61,61,61,61,61,61,61",
-            "lanes": "185,186,187,188",
+            "lanes": "369,370,371,372,373,374,375,376",
             "breakout_modes": {
                 "1x400G": [
                     "Eth62"
@@ -1996,7 +1996,7 @@
         },
         "Ethernet497": {
             "index": "62,62,62,62,62,62,62,62",
-            "lanes": "225,226,227,228",
+            "lanes": "449,450,451,452,453,454,455,456",
             "breakout_modes": {
                 "1x400G": [
                     "Eth63"
@@ -2015,7 +2015,7 @@
         },
         "Ethernet505": {
             "index": "63,63,63,63,63,63,63,63",
-            "lanes": "233,234,235,236",
+            "lanes": "465,466,467,468,469,470,471,472",
             "breakout_modes": {
                 "1x400G": [
                     "Eth64"
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json
index bb061f71ec6..5e88d9c21ed 100644
--- a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json
@@ -1,388 +1,644 @@
 {
     "interfaces": {
         "Ethernet1": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet5": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet9": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet13": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet17": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet21": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet25": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet29": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet33": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet37": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet41": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet45": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet49": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet53": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet57": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet61": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet65": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet69": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet73": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet77": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet81": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet85": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet89": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet93": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet97": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet101": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet105": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet109": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet113": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet117": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet121": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet125": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet129": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet133": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet137": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet141": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet145": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet149": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet153": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet157": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet161": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet165": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet169": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet173": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet177": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet181": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet185": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet189": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet193": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet197": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet201": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet205": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet209": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet213": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet217": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet221": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet225": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet229": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet233": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet237": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet241": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet245": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet249": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet253": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet257": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet261": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet265": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet269": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet273": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet277": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet281": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet285": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet289": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet293": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet297": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet301": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet305": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet309": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet313": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet317": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet321": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet325": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet329": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet333": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet337": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet341": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet345": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet349": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet353": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet357": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet361": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet365": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet369": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet373": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet377": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet381": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet385": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet389": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet393": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet397": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet401": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet405": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet409": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet413": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet417": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet421": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet425": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet429": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet433": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet437": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet441": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet445": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet449": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet453": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet457": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet461": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet465": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet469": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet473": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet477": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet481": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet485": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet489": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet493": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet497": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet501": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet505": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         },
         "Ethernet509": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
         }
     }
 }
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml
index cba00ec82fc..a4b52017b4b 100644
--- a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml
@@ -1342,6 +1342,12 @@ device:
 ---
 device:
     0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
         FP_CONFIG:
             FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
 ...
@@ -1349,9 +1355,42 @@ device:
 bcm_device:
     0:
         global:
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_hit_skip: 1
+            sai_svi_my_station_optimization: 1
+            sai_tcam_opt_support_all_rifs_disable: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            sai_tunnel_support: 1
+            sai_tunnel_vxlan_scale: 0
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            l3_ecmp_member_secondary_mem_size: 4096
+            riot_overlay_l3_egress_mem_size: 16384
+            riot_overlay_l3_intf_mem_size: 4096
+            sai_tunnel_ecmp_sharing_mode: 0
+            #enable port queue drop stats
+            sai_stats_support_mask: 0
+            sai_l3_byte1_udf_disable: 1
+            sai_l3_neighbor_discard_flag_capable: 0
+            sai_l3_route_discard_flag_capable: 0
+            # nbr_bcast (0-Default/LargeIFP-DB, 1-Small-IFP-DB, 2-Disable)
+            # Disable to save on MGID(512) resources
+            sai_nbr_bcast_ifp_optimized: 2
+            vlan_default_port: 1
+            flowtracker_enable: 1
+            flowtracker_hardware_learn_enable: 2
+            ecmp_dlb_port_speeds: 1
+            sai_common_hash_crc: 1
+            # Modify RX Drops scope . Removes RDROP, PDISC, VLANDR, RIPD4,RIPD6
+            sai_adjust_port_if_in_discards: 1
+            sai_cpu_mirror_queue: 28
+            sai_cpu_drop_mirror_queue: 29       
             bcm_tunnel_term_compatible_mode: 1
-            vlan_flooding_l2mc_num_reserved: 2048
-            l3_alpm_template: 2
+            vlan_flooding_l2mc_num_reserved: 0
+            l3_alpm_template: 1
             l3_alpm2_bnk_threshold: 100
             uft_mode: 1
             l3_enable: 1
@@ -1359,6 +1398,16 @@ bcm_device:
             pktio_mode: 1
             sai_pfc_defaults_disable: 1
             sai_optimized_mmu: 1
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+            flowtracker_flexctr_alloc_enable: 1
+            stat_custom_receive0_management_mode: 1
             sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc
 ...
 
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf
index 7dfbba766f3..90c6af8cfd2 100644
--- a/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf
@@ -2,3 +2,4 @@ CONSOLE_SPEED=115200
 ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=r8168,r8169,ice,mei_me,i2c_i801,i2c_ismt"
 CONSOLE_PORT=0x5060
 CONSOLE_DEV=0
+ONIE_IMAGE_PART_SIZE=1048576
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json
index 56d71ff4811..9abe8c4c432 100644
--- a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json
@@ -1,203 +1,335 @@
 {
-	"interfaces": {
-		"Ethernet1": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet9": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet17": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet25": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet33": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet41": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet49": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet57": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet65": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet73": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet81": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet89": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet97": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet105": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet113": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet121": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet129": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet137": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet145": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet153": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet161": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet169": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet177": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet185": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet193": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet201": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet209": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet217": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet225": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet233": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet241": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet249": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet257": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet265": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet273": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet281": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet289": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet297": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet305": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet313": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet321": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet329": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet337": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet345": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet353": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet361": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet369": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet377": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet385": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet393": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet401": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet409": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet417": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet425": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet433": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet441": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet449": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet457": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet465": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet473": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet481": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet489": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet497": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet505": {
-			"default_brkout_mode": "1x800G"
-		},
-		"Ethernet513": {
-			"default_brkout_mode": "1x25G"
-		},
-		"Ethernet515": {
-			"default_brkout_mode": "1x25G"
-		}
-	}
+    "interfaces": {
+        "Ethernet1": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet9": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet17": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet25": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet33": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet41": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet49": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet57": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet65": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet73": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet81": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet89": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet97": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet105": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet113": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet121": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet129": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet137": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet145": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet153": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet161": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet169": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet177": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet185": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet193": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet201": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet209": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet217": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet225": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet233": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet241": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet249": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet257": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet265": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet273": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet281": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet289": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet297": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet305": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet313": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet321": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet329": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet337": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet345": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet353": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet361": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet369": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet377": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet385": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet393": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet401": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet409": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet417": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet425": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet433": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet441": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet449": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet457": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet465": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet473": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet481": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet489": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet497": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet505": {
+            "default_brkout_mode": "1x800G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet515": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        }
+    }
 }
 
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml
index 33f2781d7b9..8fc520056c0 100644
--- a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml
@@ -1120,6 +1120,12 @@ device:
 ---
 device:
     0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
         FP_CONFIG:
             FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
 ...
@@ -1128,9 +1134,42 @@ device:
 bcm_device:
     0:
         global:
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_hit_skip: 1
+            sai_svi_my_station_optimization: 1
+            sai_tcam_opt_support_all_rifs_disable: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            sai_tunnel_support: 1
+            sai_tunnel_vxlan_scale: 0
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            l3_ecmp_member_secondary_mem_size: 4096
+            riot_overlay_l3_egress_mem_size: 16384
+            riot_overlay_l3_intf_mem_size: 4096
+            sai_tunnel_ecmp_sharing_mode: 0
+            #enable port queue drop stats
+            sai_stats_support_mask: 0
+            sai_l3_byte1_udf_disable: 1
+            sai_l3_neighbor_discard_flag_capable: 0
+            sai_l3_route_discard_flag_capable: 0
+            # nbr_bcast (0-Default/LargeIFP-DB, 1-Small-IFP-DB, 2-Disable)
+            # Disable to save on MGID(512) resources
+            sai_nbr_bcast_ifp_optimized: 2
+            vlan_default_port: 1
+            flowtracker_enable: 1
+            flowtracker_hardware_learn_enable: 2
+            ecmp_dlb_port_speeds: 1
+            sai_common_hash_crc: 1
+            # Modify RX Drops scope. Removes RDROP, PDISC, VLANDR, RIPD4,RIPD6
+            sai_adjust_port_if_in_discards: 1
+            sai_cpu_mirror_queue: 28
+            sai_cpu_drop_mirror_queue: 29          
             bcm_tunnel_term_compatible_mode: 1
-            vlan_flooding_l2mc_num_reserved: 2048
-            l3_alpm_template: 2
+            vlan_flooding_l2mc_num_reserved: 0
+            l3_alpm_template: 1
             l3_alpm2_bnk_threshold: 100
             uft_mode: 1
             l3_enable: 1
@@ -1138,6 +1177,16 @@ bcm_device:
             pktio_mode: 1
             sai_pfc_defaults_disable: 1
             sai_optimized_mmu: 1
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+            flowtracker_flexctr_alloc_enable: 1
+            stat_custom_receive0_management_mode: 1
             sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc
 ...
 
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf
index deb97654ad4..b3f12a34c33 100644
--- a/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf
@@ -1,4 +1,5 @@
 CONSOLE_SPEED=115200
 ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=ice,mei_me,i2c_i801,i2c_ismt,iTCO_wdt"
 CONSOLE_PORT=0x5060
-CONSOLE_DEV=0
\ No newline at end of file
+CONSOLE_DEV=0
+ONIE_IMAGE_PART_SIZE=1048576
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json
index 154b1abe6ff..23740aa376e 100644
--- a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json
@@ -23,10 +23,10 @@
                 "name": "MAC_CPLDC"
             },
             {
-                "name": "FAN_CPLD"
+                "name": "MGMT_CPLD"
             },
             {
-                "name": "MGMT_CPLD"
+                "name": "FAN_CPLD"
             },
             {
                 "name": "MAC_FPGA"
@@ -321,17 +321,7 @@
         ],
         "thermals": [
             {
-                "name": "BOARD_TEMP",
-                "controllable": false,
-                "low-crit-threshold": true,
-                "high-crit-threshold": true,
-                "low-threshold": true,
-                "high-threshold": true,
-                "minimum-recorded": true,
-                "maximum-recorded": true
-            },
-            {
-                "name": "CPU_TEMP",
+                "name": "ASIC_TEMP",
                 "controllable": false,
                 "low-crit-threshold": true,
                 "high-crit-threshold": true,
@@ -341,7 +331,7 @@
                 "maximum-recorded": true
             },
             {
-                "name": "INLET_TEMP",
+                "name": "BOARD_TEMP",
                 "controllable": false,
                 "low-crit-threshold": true,
                 "high-crit-threshold": true,
@@ -351,7 +341,7 @@
                 "maximum-recorded": true
             },
             {
-                "name": "OUTLET_TEMP",
+                "name": "CPU_TEMP",
                 "controllable": false,
                 "low-crit-threshold": true,
                 "high-crit-threshold": true,
@@ -361,7 +351,7 @@
                 "maximum-recorded": true
             },
             {
-                "name": "ASIC_TEMP",
+                "name": "INLET_TEMP",
                 "controllable": false,
                 "low-crit-threshold": true,
                 "high-crit-threshold": true,
@@ -371,7 +361,7 @@
                 "maximum-recorded": true
             },
             {
-                "name": "PSU1_TEMP",
+                "name": "MOS_TEMP",
                 "controllable": false,
                 "low-crit-threshold": true,
                 "high-crit-threshold": true,
@@ -381,7 +371,7 @@
                 "maximum-recorded": true
             },
             {
-                "name": "PSU2_TEMP",
+                "name": "OUTLET_TEMP",
                 "controllable": false,
                 "low-crit-threshold": true,
                 "high-crit-threshold": true,
@@ -391,7 +381,7 @@
                 "maximum-recorded": true
             },
             {
-                "name": "PSU3_TEMP",
+                "name": "PSU1_TEMP",
                 "controllable": false,
                 "low-crit-threshold": true,
                 "high-crit-threshold": true,
@@ -401,7 +391,7 @@
                 "maximum-recorded": true
             },
             {
-                "name": "PSU4_TEMP",
+                "name": "PSU2_TEMP",
                 "controllable": false,
                 "low-crit-threshold": true,
                 "high-crit-threshold": true,
@@ -1650,4 +1640,4 @@
             }
         }
     }
-}
\ No newline at end of file
+}
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
index 118ea62d5a4..6e998cb8a37 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
@@ -1 +1 @@
-7333f3669bbbd18bcc3890028d7afb39
\ No newline at end of file
+4130a4ca246a30a82f69bdef7c971f1d
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
index 58080123473..e9ca1109f1e 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askboard" sid="f5800f14-68b6-4eed-bd32-d93056a9feef">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2025-05-15-1.11" profile="Askboard" sid="e4650fda-5634-40b1-9d26-860af3e20dcf">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -183,6 +183,24 @@ with IEEE 1588v2 PTP Support</askboardplt:description>
 with IEEE 1588v2 PTP Support</askboardplt:description>
           <askboardplt:value>6</askboardplt:value>
         </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1781</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1781, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2110</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2110, Integrated Octal 10/100/1000/2.5G/5GBASE-T
+Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, Integrated Octal 10/100/1000/2.5G/5GBASE-T
+Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>physical-port-num-type</askboardplt:name>
@@ -513,15 +531,6 @@ with IEEE 1588v2 PTP Support</askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
         <askboardplt:max>1</askboardplt:max>
       </askboardplt:typedef>
-      <askboardplt:typedef>
-        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
-        <askboardplt:type>string</askboardplt:type>
-        <askboardplt:description>A hexadecimal string with octets represented as hex digits
-separated by colons.  The canonical representation uses
-lowercase characters.</askboardplt:description>
-        <askboardplt:min>3</askboardplt:min>
-        <askboardplt:max>11</askboardplt:max>
-      </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>bit-type</askboardplt:name>
         <askboardplt:type>uint32</askboardplt:type>
@@ -642,6 +651,11 @@ lowercase characters.</askboardplt:description>
           <askboardplt:description>FALCON</askboardplt:description>
           <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5P</askboardplt:name>
+          <askboardplt:description>AC5P</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>mpp-num-type</askboardplt:name>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
index 40176ed8e3f..d9a2ca3084f 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
@@ -1 +1 @@
-1f97e3150eec3a7ee6f56f51f9229db3
\ No newline at end of file
+5a9092f68a3a43ced5cc1585aa47e813
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
index 9e377e9cfb1..5e6c450b250 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askl1" sid="46b72b06-f2b0-4910-a4a3-b77166e84219">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2025-02-13-1.11" profile="Askl1" sid="ddddc28e-5798-463b-9b23-60159595df8b">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
@@ -21,6 +21,11 @@
           <ASKL1plt:description>FALCON</ASKL1plt:description>
           <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_AC5P</ASKL1plt:name>
+          <ASKL1plt:description>AC5P</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
@@ -254,26 +259,6 @@
         <ASKL1plt:min>0</ASKL1plt:min>
         <ASKL1plt:max>1023</ASKL1plt:max>
       </ASKL1plt:typedef>
-      <ASKL1plt:typedef>
-        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
-        <ASKL1plt:type>enumeration</ASKL1plt:type>
-        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre</ASKL1plt:name>
-          <ASKL1plt:description>pre</ASKL1plt:description>
-          <ASKL1plt:value>0</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>post</ASKL1plt:name>
-          <ASKL1plt:description>post</ASKL1plt:description>
-          <ASKL1plt:value>1</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>peak</ASKL1plt:name>
-          <ASKL1plt:description>peak</ASKL1plt:description>
-          <ASKL1plt:value>2</ASKL1plt:value>
-        </ASKL1plt:enum>
-      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>rx-param-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -448,6 +433,96 @@
           <ASKL1plt:description>maxRes1</ASKL1plt:description>
           <ASKL1plt:value>33</ASKL1plt:value>
         </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90AnaReg</ASKL1plt:name>
+          <ASKL1plt:description>align90AnaReg</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>boolean-type</ASKL1plt:name>
@@ -539,6 +614,36 @@
           <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-media-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Port media type - values match definition in sai_port_media_type_t (saiport.h)</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_not_present</ASKL1plt:name>
+          <ASKL1plt:description>Not present</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_unknown</ASKL1plt:name>
+          <ASKL1plt:description>Unknown</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_fiber</ASKL1plt:name>
+          <ASKL1plt:description>Fiber</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_copper</ASKL1plt:name>
+          <ASKL1plt:description>Copper</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_backplane</ASKL1plt:name>
+          <ASKL1plt:description>Backplane</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
     </ASKL1plt:typedefs>
     <ASKL1plt:ASIC_Type ASKL1plt:type="asic-type">ASIC_AC5X</ASKL1plt:ASIC_Type>
     <ASKL1plt:IfModeName>
@@ -596,18 +701,12 @@
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
         <ASKL1plt:laneList-list>
           <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">1</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-C28G>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint32">0</ASKL1plt:pre>
+            <ASKL1plt:peak ASKL1plt:type="uint32">1</ASKL1plt:peak>
+            <ASKL1plt:post ASKL1plt:type="uint32">0</ASKL1plt:post>
+          </ASKL1plt:txParams-C28G>
           <ASKL1plt:phySysSideTxParams-comphy>
             <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
             <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
@@ -615,6 +714,7 @@
             <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
           </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
@@ -623,6 +723,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
@@ -631,6 +732,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
@@ -639,6 +741,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
@@ -647,6 +750,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
@@ -655,6 +759,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
@@ -663,6 +768,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
@@ -671,6 +777,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
@@ -681,18 +788,12 @@
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
         <ASKL1plt:laneList-list>
           <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">5</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-C28G>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint32">0</ASKL1plt:pre>
+            <ASKL1plt:peak ASKL1plt:type="uint32">5</ASKL1plt:peak>
+            <ASKL1plt:post ASKL1plt:type="uint32">0</ASKL1plt:post>
+          </ASKL1plt:txParams-C28G>
           <ASKL1plt:phySysSideTxParams-comphy>
             <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
             <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
@@ -700,6 +801,7 @@
             <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
           </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
@@ -708,6 +810,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
@@ -716,6 +819,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
@@ -724,6 +828,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
@@ -732,6 +837,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
@@ -740,6 +846,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
@@ -748,6 +855,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
@@ -756,6 +864,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
@@ -766,18 +875,12 @@
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
         <ASKL1plt:laneList-list>
           <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">9</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-C28G>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint32">0</ASKL1plt:pre>
+            <ASKL1plt:peak ASKL1plt:type="uint32">9</ASKL1plt:peak>
+            <ASKL1plt:post ASKL1plt:type="uint32">0</ASKL1plt:post>
+          </ASKL1plt:txParams-C28G>
           <ASKL1plt:phySysSideTxParams-comphy>
             <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
             <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
@@ -785,6 +888,7 @@
             <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
           </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
@@ -793,6 +897,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
@@ -801,6 +906,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
@@ -809,6 +915,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
@@ -817,6 +924,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
@@ -825,6 +933,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
@@ -833,6 +942,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
@@ -841,6 +951,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
@@ -851,18 +962,12 @@
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
         <ASKL1plt:laneList-list>
           <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">10</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-C28G>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint32">0</ASKL1plt:pre>
+            <ASKL1plt:peak ASKL1plt:type="uint32">10</ASKL1plt:peak>
+            <ASKL1plt:post ASKL1plt:type="uint32">0</ASKL1plt:post>
+          </ASKL1plt:txParams-C28G>
           <ASKL1plt:phySysSideTxParams-comphy>
             <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
             <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
@@ -870,6 +975,7 @@
             <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
           </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
@@ -878,6 +984,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
@@ -886,6 +993,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
@@ -894,6 +1002,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
@@ -902,6 +1011,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
@@ -910,6 +1020,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
@@ -918,6 +1029,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
@@ -926,6 +1038,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
@@ -936,18 +1049,12 @@
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
         <ASKL1plt:laneList-list>
           <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">14</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-C28G>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint32">0</ASKL1plt:pre>
+            <ASKL1plt:peak ASKL1plt:type="uint32">14</ASKL1plt:peak>
+            <ASKL1plt:post ASKL1plt:type="uint32">0</ASKL1plt:post>
+          </ASKL1plt:txParams-C28G>
           <ASKL1plt:phySysSideTxParams-comphy>
             <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
             <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
@@ -955,6 +1062,7 @@
             <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
           </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
@@ -963,6 +1071,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
@@ -971,6 +1080,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
@@ -979,6 +1089,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
@@ -987,6 +1098,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
@@ -995,6 +1107,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
@@ -1003,6 +1116,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
@@ -1011,6 +1125,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
@@ -1021,18 +1136,12 @@
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
         <ASKL1plt:laneList-list>
           <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">11</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-C28G>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint32">0</ASKL1plt:pre>
+            <ASKL1plt:peak ASKL1plt:type="uint32">11</ASKL1plt:peak>
+            <ASKL1plt:post ASKL1plt:type="uint32">0</ASKL1plt:post>
+          </ASKL1plt:txParams-C28G>
           <ASKL1plt:phySysSideTxParams-comphy>
             <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
             <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
@@ -1040,6 +1149,7 @@
             <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
           </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
@@ -1048,6 +1158,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
@@ -1056,6 +1167,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
@@ -1064,6 +1176,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
@@ -1072,6 +1185,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
@@ -1080,6 +1194,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
@@ -1088,6 +1203,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
@@ -1096,6 +1212,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
@@ -1106,19 +1223,14 @@
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
         <ASKL1plt:laneList-list>
           <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">9</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-C28G>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint32">0</ASKL1plt:pre>
+            <ASKL1plt:peak ASKL1plt:type="uint32">0</ASKL1plt:peak>
+            <ASKL1plt:post ASKL1plt:type="uint32">9</ASKL1plt:post>
+          </ASKL1plt:txParams-C28G>
         </ASKL1plt:laneList-list>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
@@ -1129,19 +1241,14 @@
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
         <ASKL1plt:laneList-list>
           <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">10</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-C28G>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint32">0</ASKL1plt:pre>
+            <ASKL1plt:peak ASKL1plt:type="uint32">0</ASKL1plt:peak>
+            <ASKL1plt:post ASKL1plt:type="uint32">10</ASKL1plt:post>
+          </ASKL1plt:txParams-C28G>
         </ASKL1plt:laneList-list>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
@@ -1152,19 +1259,14 @@
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
         <ASKL1plt:laneList-list>
           <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">9</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-C28G>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint32">0</ASKL1plt:pre>
+            <ASKL1plt:peak ASKL1plt:type="uint32">0</ASKL1plt:peak>
+            <ASKL1plt:post ASKL1plt:type="uint32">9</ASKL1plt:post>
+          </ASKL1plt:txParams-C28G>
         </ASKL1plt:laneList-list>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
@@ -1175,19 +1277,14 @@
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
         <ASKL1plt:laneList-list>
           <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">10</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
-          <ASKL1plt:txParams-list>
-            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
-            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
-          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-C28G>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint32">0</ASKL1plt:pre>
+            <ASKL1plt:peak ASKL1plt:type="uint32">0</ASKL1plt:peak>
+            <ASKL1plt:post ASKL1plt:type="uint32">10</ASKL1plt:post>
+          </ASKL1plt:txParams-C28G>
         </ASKL1plt:laneList-list>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
     </ASKL1plt:Port>
   </ASKL1plt:ASK-L1>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
index fc68f9ae33b..00b6068a4ad 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
@@ -1 +1 @@
-306e882317520250db0161d1cf4c8a3b
\ No newline at end of file
+c13419ca649e9e414df0cbea6c73df29
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
index f15449bd5e2..967c387bc18 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askpp" sid="6abefd8a-3345-40a7-b180-4e9375f341df">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2025-02-25-1.11" profile="Askpp" sid="69bab25d-d8f6-4bfe-baf5-bdcb26c08ff6">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
@@ -378,7 +378,7 @@
       <askppplt:typedef>
         <askppplt:name>number-physical-port-type</askppplt:name>
         <askppplt:type>enumeration</askppplt:type>
-        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:description>AC3X/AC5X/AC5P 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
         <askppplt:enum>
           <askppplt:name>no-ports</askppplt:name>
           <askppplt:description>no-ports</askppplt:description>
@@ -538,6 +538,11 @@
           <askppplt:description>FALCON</askppplt:description>
           <askppplt:value>2</askppplt:value>
         </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5P</askppplt:name>
+          <askppplt:description>AC5P</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
       </askppplt:typedef>
     </askppplt:typedefs>
     <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_AC5X</askppplt:ASIC_Type>
@@ -882,10 +887,12 @@
         <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
         <askppplt:Pha-params>
           <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
-          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">01</askppplt:phaFwImageId>
           <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
         </askppplt:Pha-params>
       </askppplt:LibInit>
+      <askppplt:PhaParams>
+        <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">DEFAULT</askppplt:phaFwImageId>
+      </askppplt:PhaParams>
     </askppplt:PPInit>
   </askppplt:ASK-PP>
 </data>
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
index 3d57599d00f..d60e04a18fc 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
@@ -1 +1 @@
-05614f693742dfda5c7140c186516f0c
\ No newline at end of file
+0bc31702ef865bc96664fa917a8ab34d
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
index be2b470f78c..b1042ff5ca5 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="SAI" sid="b48431f8-351b-4524-babb-1ce99b72cd68">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2025-02-25-1.11" profile="SAI" sid="e29ba6fe-f08d-4673-ac2d-2961846d0e1c">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
@@ -166,6 +166,26 @@
           <SAIplt:description>FALCON</SAIplt:description>
           <SAIplt:value>2</SAIplt:value>
         </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5P</SAIplt:name>
+          <SAIplt:description>AC5P</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>boolean-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Boolean 32 bits , due to bing endian</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>false</SAIplt:name>
+          <SAIplt:description>False</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>true</SAIplt:name>
+          <SAIplt:description>True</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
       </SAIplt:typedef>
     </SAIplt:typedefs>
     <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_AC5X</SAIplt:ASIC_Type>
@@ -453,7 +473,7 @@
       <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
     </SAIplt:Logging>
     <SAIplt:Feature>
-      <SAIplt:MACsec SAIplt:type="Feature-enable">Disabled</SAIplt:MACsec>
+      <SAIplt:PHY_Temperature SAIplt:type="Feature-enable">Disabled</SAIplt:PHY_Temperature>
     </SAIplt:Feature>
     <SAIplt:Features-using-acl>
       <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_asic b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_asic
index a554752878b..5cbe9d002a5 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_asic
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_asic
@@ -1 +1 @@
-marvell
+marvell-prestera
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
index a496cb2c2f6..67c577bbc85 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-5f045bfae7ef6c920d6831384abdb4e7
\ No newline at end of file
+342ec6232b3021e5e22b322fd2375774
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
index a068de1fd3b..559658dd87e 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-10-24-1.10" profile="Askboard" sid="7093bb99-b026-4a69-990a-db984aab32e7">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2025-05-15-1.11" profile="Askboard" dsig="md5" sid="e4650fda-5634-40b1-9d26-860af3e20dcf">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -189,6 +189,18 @@ with IEEE 1588v2 PTP Support</askboardplt:description>
 Efficient Ethernet Transceiver</askboardplt:description>
           <askboardplt:value>7</askboardplt:value>
         </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2110</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2110, Integrated Octal 10/100/1000/2.5G/5GBASE-T
+Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, Integrated Octal 10/100/1000/2.5G/5GBASE-T
+Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>physical-port-num-type</askboardplt:name>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
index ed83782bc56..63eb2ee80cf 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
@@ -1 +1 @@
-2d025404156c5f923911a8729062c82a
\ No newline at end of file
+91af1f907f6485066da07c400b64c4c0
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
index 295e3c7839e..d6e96388909 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-10-24-1.10" profile="Askl1" dsig="md5" sid="20d097a2-1bdd-4b0a-8660-ad188e4d486c">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2025-02-13-1.11" profile="Askl1" dsig="md5" sid="ddddc28e-5798-463b-9b23-60159595df8b">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
@@ -614,6 +614,36 @@
           <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-media-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Port media type - values match definition in sai_port_media_type_t (saiport.h)</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_not_present</ASKL1plt:name>
+          <ASKL1plt:description>Not present</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_unknown</ASKL1plt:name>
+          <ASKL1plt:description>Unknown</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_fiber</ASKL1plt:name>
+          <ASKL1plt:description>Fiber</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_copper</ASKL1plt:name>
+          <ASKL1plt:description>Copper</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_backplane</ASKL1plt:name>
+          <ASKL1plt:description>Backplane</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
     </ASKL1plt:typedefs>
     <ASKL1plt:ASIC_Type ASKL1plt:type="asic-type">ASIC_AC3X</ASKL1plt:ASIC_Type>
     <ASKL1plt:IfModeName>
@@ -675,6 +705,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
@@ -682,6 +713,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
@@ -689,6 +721,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
@@ -696,6 +729,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
@@ -703,6 +737,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
@@ -710,6 +745,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
@@ -717,6 +753,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
@@ -724,6 +761,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
@@ -731,6 +769,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
@@ -738,6 +777,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
@@ -745,6 +785,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
@@ -752,6 +793,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
@@ -759,6 +801,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
@@ -766,6 +809,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
@@ -773,6 +817,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
@@ -780,6 +825,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
@@ -787,6 +833,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
@@ -794,6 +841,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
@@ -801,6 +849,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
@@ -808,6 +857,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
@@ -815,6 +865,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
@@ -822,6 +873,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
@@ -829,6 +881,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
@@ -836,6 +889,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
@@ -843,6 +897,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
@@ -850,6 +905,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
@@ -857,6 +913,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
@@ -864,6 +921,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:portNumber>
@@ -871,6 +929,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
     </ASKL1plt:Port>
   </ASKL1plt:ASK-L1>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
index 87381520f93..66dc9ceba22 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
@@ -1 +1 @@
-6a58d46ff8f965e0ae7638314fae0f7e
\ No newline at end of file
+41bd7c6c35063e85d1696b702c3d2649
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
index f4d2743ecba..2f2d4e216a9 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-10-24-1.10" profile="Askl1" dsig="md5" sid="20d097a2-1bdd-4b0a-8660-ad188e4d486c">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2025-02-13-1.11" profile="Askl1" dsig="md5" sid="ddddc28e-5798-463b-9b23-60159595df8b">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
@@ -614,6 +614,36 @@
           <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-media-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Port media type - values match definition in sai_port_media_type_t (saiport.h)</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_not_present</ASKL1plt:name>
+          <ASKL1plt:description>Not present</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_unknown</ASKL1plt:name>
+          <ASKL1plt:description>Unknown</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_fiber</ASKL1plt:name>
+          <ASKL1plt:description>Fiber</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_copper</ASKL1plt:name>
+          <ASKL1plt:description>Copper</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>media_backplane</ASKL1plt:name>
+          <ASKL1plt:description>Backplane</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
     </ASKL1plt:typedefs>
     <ASKL1plt:ASIC_Type ASKL1plt:type="asic-type">ASIC_AC3X</ASKL1plt:ASIC_Type>
     <ASKL1plt:IfModeName>
@@ -675,6 +705,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
@@ -682,6 +713,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
@@ -689,6 +721,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
@@ -696,6 +729,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
@@ -703,6 +737,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
@@ -710,6 +745,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
@@ -717,6 +753,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
@@ -724,6 +761,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
@@ -731,6 +769,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
@@ -738,6 +777,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
@@ -745,6 +785,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
@@ -752,6 +793,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
@@ -759,6 +801,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
@@ -766,6 +809,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
@@ -773,6 +817,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
@@ -780,6 +825,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
@@ -787,6 +833,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
@@ -794,6 +841,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
@@ -801,6 +849,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
@@ -808,6 +857,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
@@ -815,6 +865,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
@@ -822,6 +873,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
@@ -829,6 +881,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
@@ -836,6 +889,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_copper</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
@@ -843,6 +897,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
@@ -850,6 +905,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
@@ -857,6 +913,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
@@ -864,6 +921,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:portNumber>
@@ -871,6 +929,7 @@
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:supportedMediaType ASKL1plt:type="port-media-type">media_unknown</ASKL1plt:supportedMediaType>
       </ASKL1plt:port-list>
     </ASKL1plt:Port>
   </ASKL1plt:ASK-L1>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
index 9f67bcbb892..a2090aeb32d 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-19b775f23ff3aedee2a5b56bcb9fedcf
\ No newline at end of file
+c20931491067b3c9950252f466d3e5c6
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
index a58528c9844..8f66f7d51d2 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-10-24-1.10" profile="Askpp" dsig="md5" sid="85d852e5-1e5a-4b9b-a68d-7c1f65f7a541">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2025-02-25-1.11" profile="Askpp" dsig="md5" sid="69bab25d-d8f6-4bfe-baf5-bdcb26c08ff6">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
index b43b8a42dc8..b80b11546dd 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-1443be47e4d9938e916ec95674e489d5
\ No newline at end of file
+6033e7d87d97f28510467bb380d867ca
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
index 756b0d16816..5c34d173d9e 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-10-24-1.10" profile="SAI" dsig="md5" sid="92a3e944-e664-45d1-a29f-df4774c889db">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2025-02-25-1.11" profile="SAI" dsig="md5" sid="e29ba6fe-f08d-4673-ac2d-2961846d0e1c">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/platform_asic b/device/nokia/armhf-nokia_ixs7215_52x-r0/platform_asic
index a554752878b..5cbe9d002a5 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/platform_asic
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/platform_asic
@@ -1 +1 @@
-marvell
+marvell-prestera
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffer_ports.j2 b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffer_ports.j2
new file mode 100644
index 00000000000..fc4168e3a60
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffer_ports.j2
@@ -0,0 +1,12 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(1,9) %}
+        {% if PORT_ALL.append("Ethernet%d" % ((port_idx - 1) * 2)) %}{% endif %}
+    {% endfor %}
+    {% for port_idx in range(9,29) %}
+        {% if PORT_ALL.append("Ethernet%d" % ((port_idx * 4) - 20)) %}{% endif %}
+    {% endfor %}
+    {% for port_idx in range(29,36) %}
+        {% if PORT_ALL.append("Ethernet%d" % ((port_idx * 8) - 136)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffers.json.j2 b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffers.json.j2
new file mode 100644
index 00000000000..0b1cb2c541b
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffers_defaults_t0.j2 b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffers_defaults_t0.j2
new file mode 100644
index 00000000000..a92311553fe
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+   "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "84219120",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "20325220"
+        },
+        "egress_lossless_pool": {
+            "size": "84219120",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+   },
+   "BUFFER_PROFILE": {
+       "egress_lossless_profile": {
+           "dynamic_th": "2",
+           "pool": "egress_lossless_pool",
+           "size": "0"
+       },
+       "egress_lossy_profile": {
+           "dynamic_th": "-4",
+           "pool": "egress_lossless_pool",
+           "size": "0"
+       },
+       "ingress_lossy_profile": {
+           "dynamic_th": "-1",
+           "pool": "ingress_lossless_pool",
+           "size": "0"
+       }
+   },
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffers_defaults_t1.j2 b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..a92311553fe
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+   "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "84219120",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "20325220"
+        },
+        "egress_lossless_pool": {
+            "size": "84219120",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+   },
+   "BUFFER_PROFILE": {
+       "egress_lossless_profile": {
+           "dynamic_th": "2",
+           "pool": "egress_lossless_pool",
+           "size": "0"
+       },
+       "egress_lossy_profile": {
+           "dynamic_th": "-4",
+           "pool": "egress_lossless_pool",
+           "size": "0"
+       },
+       "ingress_lossy_profile": {
+           "dynamic_th": "-1",
+           "pool": "ingress_lossless_pool",
+           "size": "0"
+       }
+   },
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/context_config.json b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/context_config.json
new file mode 100644
index 00000000000..65c0a9b6b70
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/context_config.json
@@ -0,0 +1,42 @@
+{
+    "CONTEXTS": [
+        {
+            "guid" : 0,
+            "name" : "asic0",
+            "dbAsic" : "ASIC_DB",
+            "dbCounters" : "COUNTERS_DB",
+            "dbFlex": "FLEX_COUNTER_DB",
+            "dbState" : "STATE_DB",
+            "zmq_enable" : false,
+            "zmq_endpoint": "tcp://127.0.0.1:5555",
+            "zmq_ntf_endpoint": "tcp://127.0.0.1:5556",
+            "switches": [
+                {
+                    "index" : 0,
+                    "hwinfo" : ""
+                }
+            ]
+        },
+        {
+            "guid" : 1,
+            "name" : "phys",
+            "dbAsic" : "GB_ASIC_DB",
+            "dbCounters" : "GB_COUNTERS_DB",
+            "dbFlex": "GB_FLEX_COUNTER_DB",
+            "dbState" : "STATE_DB",
+            "zmq_enable" : false,
+            "zmq_endpoint": "tcp://127.0.0.1:5565",
+            "zmq_ntf_endpoint": "tcp://127.0.0.1:5566",
+            "switches": [
+                {
+                    "index" : 0,
+                    "hwinfo" : "0"
+                },
+                {
+                    "index" : 1,
+                    "hwinfo" : "36"
+                }
+            ]
+        }
+   ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/gearbox_config.json b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/gearbox_config.json
new file mode 100644
index 00000000000..4f8857b9bee
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/gearbox_config.json
@@ -0,0 +1,200 @@
+{
+  "phys": [
+    {
+      "phy_id": 1,
+      "name": "phy1",
+      "address": "1",
+      "lib_name": "libsai.so",
+      "firmware_path": "",
+      "config_file": "/usr/share/sonic/hwsku/phy1_config.json",
+      "sai_init_config_file": "",
+      "phy_access": "mdio",
+      "bus_id": 0,
+      "context_id": 1,
+      "hwinfo": "0"
+    },
+    {
+      "phy_id": 2,
+      "name": "phy2",
+      "address": "2",
+      "lib_name": "libsai.so",
+      "firmware_path": "",
+      "config_file": "/usr/share/sonic/hwsku/phy2_config.json",
+      "sai_init_config_file": "",
+      "phy_access": "mdio",
+      "bus_id": 0,
+      "context_id": 1,
+      "hwinfo": "36"
+    }
+  ],
+  "interfaces": [
+    {
+      "name": "Ethernet0",
+      "index": 1,
+      "phy_id": 1,
+      "system_lanes": [16,17],
+      "line_lanes": [0,1,2,3],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre": [-20,-20],
+      "system_tx_fir_main": [148,148],
+      "system_tx_fir_post": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre": [-4,-4,-4,-4],
+      "line_tx_fir_main": [69,69,69,69],
+      "line_tx_fir_post": [-8,-8,-8,-8],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet2",
+      "index": 2,
+      "phy_id": 1,
+      "system_lanes": [18,19],
+      "line_lanes": [4,5,6,7],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre": [-20,-20],
+      "system_tx_fir_main": [148,148],
+      "system_tx_fir_post": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre": [-4,-4,-4,-4],
+      "line_tx_fir_main": [69,69,69,69],
+      "line_tx_fir_post": [-8,-8,-8,-8],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet4",
+      "index": 3,
+      "phy_id": 1,
+      "system_lanes": [20,21],
+      "line_lanes": [8,9,10,11],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre": [-20,-20],
+      "system_tx_fir_main": [148,148],
+      "system_tx_fir_post": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre": [-4,-4,-4,-4],
+      "line_tx_fir_main": [69,69,69,69],
+      "line_tx_fir_post": [-8,-8,-8,-8],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet6",
+      "index": 4,
+      "phy_id": 1,
+      "system_lanes": [22,23],
+      "line_lanes": [12,13,14,15],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre": [-20,-20],
+      "system_tx_fir_main": [148,148],
+      "system_tx_fir_post": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre": [-4,-4,-4,-4],
+      "line_tx_fir_main": [69,69,69,69],
+      "line_tx_fir_post": [-8,-8,-8,-8],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet8",
+      "index": 5,
+      "phy_id": 2,
+      "system_lanes": [40,41],
+      "line_lanes": [24,25,26,27],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre": [-20,-20],
+      "system_tx_fir_main": [148,148],
+      "system_tx_fir_post": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre": [-4,-4,-4,-4],
+      "line_tx_fir_main": [69,69,69,69],
+      "line_tx_fir_post": [-8,-8,-8,-8],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet10",
+      "index": 6,
+      "phy_id": 2,
+      "system_lanes": [42,43],
+      "line_lanes": [28,29,30,31],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre": [-20,-20],
+      "system_tx_fir_main": [148,148],
+      "system_tx_fir_post": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre": [-4,-4,-4,-4],
+      "line_tx_fir_main": [69,69,69,69],
+      "line_tx_fir_post": [-8,-8,-8,-8],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet12",
+      "index": 7,
+      "phy_id": 2,
+      "system_lanes": [44,45],
+      "line_lanes": [32,33,34,35],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre": [-20,-20],
+      "system_tx_fir_main": [148,148],
+      "system_tx_fir_post": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre": [-4,-4,-4,-4],
+      "line_tx_fir_main": [69,69,69,69],
+      "line_tx_fir_post": [-8,-8,-8,-8],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet14",
+      "index": 8,
+      "phy_id": 2,
+      "system_lanes": [46,47],
+      "line_lanes": [36,37,38,39],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre": [-20,-20],
+      "system_tx_fir_main": [148,148],
+      "system_tx_fir_post": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre": [-4,-4,-4,-4],
+      "line_tx_fir_main": [69,69,69,69],
+      "line_tx_fir_post": [-8,-8,-8,-8],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    }
+  ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/milleniob.bcm b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/milleniob.bcm
new file mode 100644
index 00000000000..9e2fa1619cf
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/milleniob.bcm
@@ -0,0 +1,68 @@
+### PHY CONFIGURATION FILE
+### Please refer to config_file_format.txt in the top level folder for configuration file format
+
+### PHY CONFIGURATIONS
+phy_init_config_chip_id:0 = 81356
+phy_init_config_chip_id:36 = 81356
+
+### LANE CONFIGURATIONS
+#----------------------------------------------------------------------------------------------------------------
+#  Lane_Property  : Global_Lane = PHY_ID, IF_Side, Local_Lane, Tx_Lane_Map, Rx_Lane_Map, Tx_Polarity, Rx_Polarity
+#----------------------------------------------------------------------------------------------------------------
+# Line side lane properties:
+phy_lane_property :     0       =  0,      0,         0,          0,           0,            0,           0
+phy_lane_property :     1       =  0,      0,         1,          1,           1,            0,           0
+phy_lane_property :     2       =  0,      0,         2,          2,           2,            0,           0
+phy_lane_property :     3       =  0,      0,         3,          3,           3,            0,           0
+phy_lane_property :     4       =  0,      0,         4,          4,           4,            0,           0
+phy_lane_property :     5       =  0,      0,         5,          5,           5,            0,           0
+phy_lane_property :     6       =  0,      0,         6,          6,           6,            0,           0
+phy_lane_property :     7       =  0,      0,         7,          7,           7,            0,           0
+phy_lane_property :     8       =  0,      0,         8,          8,           8,            0,           0
+phy_lane_property :     9       =  0,      0,         9,          9,           9,            0,           0
+phy_lane_property :     10      =  0,      0,         10,         10,          10,           0,           0
+phy_lane_property :     11      =  0,      0,         11,         11,          11,           0,           0
+phy_lane_property :     12      =  0,      0,         12,         12,          12,           0,           0
+phy_lane_property :     13      =  0,      0,         13,         13,          13,           0,           0
+phy_lane_property :     14      =  0,      0,         14,         14,          14,           0,           0
+phy_lane_property :     15      =  0,      0,         15,         15,          15,           0,           0
+# System side lanes properties:
+phy_lane_property :     16      =  0,      1,         0,          0,           0,            0,           0
+phy_lane_property :     17      =  0,      1,         1,          1,           1,            0,           0
+phy_lane_property :     18      =  0,      1,         4,          4,           4,            0,           0
+phy_lane_property :     19      =  0,      1,         5,          5,           5,            0,           0
+phy_lane_property :     20      =  0,      1,         8,          8,           8,            0,           0
+phy_lane_property :     21      =  0,      1,         9,          9,           9,            0,           0
+phy_lane_property :     22      =  0,      1,         12,         12,          12,           0,           0
+phy_lane_property :     23      =  0,      1,         13,         13,          13,           0,           0
+
+
+### LANE CONFIGURATIONS -- PHY2
+#
+# Line side lane properties:
+phy_lane_property :     24      =  36,    0,         0,          0,           0,            0,           0
+phy_lane_property :     25      =  36,    0,         1,          1,           1,            0,           0
+phy_lane_property :     26      =  36,    0,         2,          2,           2,            0,           0
+phy_lane_property :     27      =  36,    0,         3,          3,           3,            0,           0
+phy_lane_property :     28      =  36,    0,         4,          4,           4,            0,           0
+phy_lane_property :     29      =  36,    0,         5,          5,           5,            0,           0
+phy_lane_property :     30      =  36,    0,         6,          6,           6,            0,           0
+phy_lane_property :     31      =  36,    0,         7,          7,           7,            0,           0
+phy_lane_property :     32      =  36,    0,         8,          8,           8,            0,           0
+phy_lane_property :     33      =  36,    0,         9,          9,           9,            0,           0
+phy_lane_property :     34      =  36,    0,         10,         10,          10,           0,           0
+phy_lane_property :     35      =  36,    0,         11,         11,          11,           0,           0
+phy_lane_property :     36      =  36,    0,         12,         12,          12,           0,           0
+phy_lane_property :     37      =  36,    0,         13,         13,          13,           0,           0
+phy_lane_property :     38      =  36,    0,         14,         14,          14,           0,           0
+phy_lane_property :     39      =  36,    0,         15,         15,          15,           0,           0
+# System side lanes properties:
+phy_lane_property :     40      =  36,    1,         0,          0,           0,            0,           0
+phy_lane_property :     41      =  36,    1,         1,          1,           1,            0,           0
+phy_lane_property :     42      =  36,    1,         4,          4,           4,            0,           0
+phy_lane_property :     43      =  36,    1,         5,          5,           5,            0,           0
+phy_lane_property :     44      =  36,    1,         8,          8,           8,            0,           0
+phy_lane_property :     45      =  36,    1,         9,          9,           9,            0,           0
+phy_lane_property :     46      =  36,    1,         12,         12,          12,           0,           0
+phy_lane_property :     47      =  36,    1,         13,         13,          13,           0,           0
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/pg_profile_lookup.ini
new file mode 100644
index 00000000000..d4c94cc074e
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/pg_profile_lookup.ini
@@ -0,0 +1,10 @@
+# PG lossless profiles.
+#speed  cable    size    xon  xoff     threshold    xon_offset
+100000  5m       1272    2544 75366    0            2544
+400000  5m       1272    2544 154548   0            2544
+100000  40m      1272    2544 81726    0            2544
+400000  40m      1272    2544 180624   0            2544
+100000  100m     1272    2544 89040    0            2544
+400000  100m     1272    2544 209562   0            2544
+100000  300m     1272    2544 117978   0            2544
+400000  300m     1272    2544 325632   0            2544
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/phy1_config.json b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/phy1_config.json
new file mode 100644
index 00000000000..96350261cd1
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/phy1_config.json
@@ -0,0 +1,101 @@
+{
+  "lanes": [
+    {
+      "index": 255,
+      "local_lane_id": 255,
+      "system_side": true,
+      "tx_polarity": 255,
+      "rx_polarity": 255,
+      "line_tx_lanemap": 255,
+      "line_rx_lanemap": 255,
+      "line_to_system_lanemap": 255,
+      "mdio_addr": ""
+    }
+  ],
+  "ports": [
+    {
+      "index": 1,
+      "mdio_addr": "0",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": true,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 2,
+      "mdio_addr": "0",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": true,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 3,
+      "mdio_addr": "0",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": true,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 4,
+      "mdio_addr": "0",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": true,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    }
+  ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/phy2_config.json b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/phy2_config.json
new file mode 100644
index 00000000000..c2fc480ba6e
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/phy2_config.json
@@ -0,0 +1,101 @@
+{
+  "lanes": [
+    {
+      "index": 255,
+      "local_lane_id": 255,
+      "system_side": true,
+      "tx_polarity": 255,
+      "rx_polarity": 255,
+      "line_tx_lanemap": 255,
+      "line_rx_lanemap": 255,
+      "line_to_system_lanemap": 255,
+      "mdio_addr": ""
+    }
+  ],
+  "ports": [
+    {
+      "index": 5,
+      "mdio_addr": "36",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": true,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 6,
+      "mdio_addr": "36",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": true,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 7,
+      "mdio_addr": "36",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": true,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 8,
+      "mdio_addr": "36",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": true,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    }
+  ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/port_config.ini
new file mode 100644
index 00000000000..5a37585a7a5
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/port_config.ini
@@ -0,0 +1,37 @@
+# name          lanes                             alias                index     speed
+Ethernet0       17,18                             Ethernet1/1          1         100000
+Ethernet2       19,20                             Ethernet2/1          2         100000
+Ethernet4       21,22                             Ethernet3/1          3         100000
+Ethernet6       23,24                             Ethernet4/1          4         100000
+Ethernet8       25,26                             Ethernet5/1          5         100000
+Ethernet10      27,28                             Ethernet6/1          6         100000
+Ethernet12      29,30                             Ethernet7/1          7         100000
+Ethernet14      31,32                             Ethernet8/1          8         100000
+Ethernet16      1,2,3,4                           Ethernet9/1          9         100000
+Ethernet20      5,6,7,8                           Ethernet10/1         10        100000
+Ethernet24      9,10,11,12                        Ethernet11/1         11        100000
+Ethernet28      13,14,15,16                       Ethernet12/1         12        100000
+Ethernet32      33,34,35,36                       Ethernet13/1         13        100000
+Ethernet36      37,38,39,40                       Ethernet14/1         14        100000
+Ethernet40      41,42,43,44                       Ethernet15/1         15        100000
+Ethernet44      45,46,47,48                       Ethernet16/1         16        100000
+Ethernet48      49,50,51,52                       Ethernet17/1         17        100000
+Ethernet52      53,54,55,56                       Ethernet18/1         18        100000
+Ethernet56      57,58,59,60                       Ethernet19/1         19        100000
+Ethernet60      61,62,63,64                       Ethernet20/1         20        100000
+Ethernet64      65,66,67,68                       Ethernet21/1         21        100000
+Ethernet68      69,70,71,72                       Ethernet22/1         22        100000
+Ethernet72      73,74,75,76                       Ethernet23/1         23        100000
+Ethernet76      77,78,79,80                       Ethernet24/1         24        100000
+Ethernet80      145,146,147,148                   Ethernet25/1         25        100000
+Ethernet84      149,150,151,152                   Ethernet26/1         26        100000
+Ethernet88      153,154,155,156                   Ethernet27/1         27        100000
+Ethernet92      157,158,159,160                   Ethernet28/1         28        100000
+Ethernet96      81,82,83,84,85,86,87,88           Ethernet29/1         29        400000
+Ethernet104     89,90,91,92,93,94,95,96           Ethernet30/1         30        400000
+Ethernet112     97,98,99,100,101,102,103,104      Ethernet31/1         31        400000
+Ethernet120     105,106,107,108,109,110,111,112   Ethernet32/1         32        400000
+Ethernet128     113,114,115,116,117,118,119,120   Ethernet33/1         33        400000
+Ethernet136     121,122,123,124,125,126,127,128   Ethernet34/1         34        400000
+Ethernet144     129,130,131,132,133,134,135,136   Ethernet35/1         35        400000
+Ethernet152     137,138,139,140,141,142,143,144   Ethernet36/1         36        400000
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/profile.ini b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/profile.ini
new file mode 100644
index 00000000000..4eda67c91a6
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=XX:XX:XX:XX:XX:XX
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/psai.profile b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/psai.profile
new file mode 100644
index 00000000000..863a2403f5f
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/psai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/milleniob.bcm
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/qos.json.j2 b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/qos.json.j2
new file mode 100644
index 00000000000..3e548325ea3
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/sai.profile b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/sai.profile
new file mode 100644
index 00000000000..8068b2abf9b
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td4_28x100g_8x400g.yml
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/td4_28x100g_8x400g.yml b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/td4_28x100g_8x400g.yml
new file mode 100644
index 00000000000..11f27b8ba1f
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/td4_28x100g_8x400g.yml
@@ -0,0 +1,561 @@
+#
+# BCM56780 28x100g+8x400g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+# $Copyright: (c) 2019 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            # CORE CLOCK FREQUENCY
+            CORE_CLK_FREQ: CLK_1350MHZ
+            # PP CLOCK FREQUENCY
+            PP_CLK_FREQ: CLK_1350MHZ
+...
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23014567
+                TX_LANE_MAP: 0x45672301
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x0
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x27403516
+                TX_LANE_MAP: 0x23014765
+                RX_POLARITY_FLIP: 0x7c
+                TX_POLARITY_FLIP: 0x64
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x10325476
+                TX_LANE_MAP: 0x01324567
+                RX_POLARITY_FLIP: 0x65
+                TX_POLARITY_FLIP: 0x30
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x10325476
+                TX_LANE_MAP: 0x01324567
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x3F
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x45672301
+                TX_LANE_MAP: 0x32014567
+                RX_POLARITY_FLIP: 0x9A
+                TX_POLARITY_FLIP: 0x31
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32106475
+                TX_LANE_MAP: 0x54673210
+                RX_POLARITY_FLIP: 0x3F
+                TX_POLARITY_FLIP: 0x9A
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23014657
+                TX_LANE_MAP: 0x54673210
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0xE2
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23014657
+                TX_LANE_MAP: 0x54673210
+                RX_POLARITY_FLIP: 0xC0
+                TX_POLARITY_FLIP: 0x9A
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x05763142
+                TX_LANE_MAP: 0x57462301
+                RX_POLARITY_FLIP: 0x5F
+                TX_POLARITY_FLIP: 0x60
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x45672103
+                TX_LANE_MAP: 0x23014567
+                RX_POLARITY_FLIP: 0xA0
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x01672345
+                TX_LANE_MAP: 0x67014523
+                RX_POLARITY_FLIP: 0xAA
+                TX_POLARITY_FLIP: 0x0
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42763105
+                TX_LANE_MAP: 0x46015723
+                RX_POLARITY_FLIP: 0x0
+                TX_POLARITY_FLIP: 0x64
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x57014623
+                TX_LANE_MAP: 0x10673254
+                RX_POLARITY_FLIP: 0x9A
+                TX_POLARITY_FLIP: 0xCF
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x57014623
+                TX_LANE_MAP: 0x67105432
+                RX_POLARITY_FLIP: 0x9A
+                TX_POLARITY_FLIP: 0xC0
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x75106432
+                TX_LANE_MAP: 0x10673254
+                RX_POLARITY_FLIP: 0x65
+                TX_POLARITY_FLIP: 0xCF
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x01672345
+                TX_LANE_MAP: 0x01673245
+                RX_POLARITY_FLIP: 0x95
+                TX_POLARITY_FLIP: 0x30
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x10763254
+                TX_LANE_MAP: 0x67014532
+                RX_POLARITY_FLIP: 0x6A
+                TX_POLARITY_FLIP: 0x3F
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x10763254
+                TX_LANE_MAP: 0x01673245
+                RX_POLARITY_FLIP: 0x6A
+                TX_POLARITY_FLIP: 0x10
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x75613240
+                TX_LANE_MAP: 0x74563210
+                RX_POLARITY_FLIP: 0x0
+                TX_POLARITY_FLIP: 0x0
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x45673210
+                TX_LANE_MAP: 0x32105476
+                RX_POLARITY_FLIP: 0x0
+                TX_POLARITY_FLIP: 0x0
+...
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                # CPU port
+                PORT_ID: 0
+            :
+                PC_PHYS_PORT_ID: 0
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1 #TSC-BH7 0 in Pipe 0
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 5 #TSC-BH7 0 in Pipe 0
+            ?
+                PORT_ID: 6
+            :
+                PC_PHYS_PORT_ID: 9 #TSC-BH7 1 in Pipe 0
+            ?
+                PORT_ID: 7
+            :
+                PC_PHYS_PORT_ID: 13 #TSC-BH7 1 in Pipe 0
+            ?
+                PORT_ID: 8
+            :
+                PC_PHYS_PORT_ID: 17 #TSC-BH7 2 in Pipe 0
+            ?
+                PORT_ID: 9
+            :
+                PC_PHYS_PORT_ID: 19 #TSC-BH7 2 in Pipe 0
+            ?
+                PORT_ID: 10
+            :
+                PC_PHYS_PORT_ID: 21 #TSC-BH7 2 in Pipe 0
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 23 #TSC-BH7 2 in Pipe 0
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 25 #TSC-BH7 3 in Pipe 0
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 27 #TSC-BH7 3 in Pipe 0
+            ?
+                PORT_ID: 14
+            :
+                PC_PHYS_PORT_ID: 29 #TSC-BH7 3 in Pipe 0
+            ?
+                PORT_ID: 15
+            :
+                PC_PHYS_PORT_ID: 31 #TSC-BH7 3 in Pipe 0
+            ?
+                PORT_ID: 16
+            :
+                PC_PHYS_PORT_ID: 33 #TSC-BH7 4 in Pipe 0
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 37 #TSC-BH7 4 in Pipe 0
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 41 #TSC-BH7 5 in Pipe 1
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 45 #TSC-BH7 5 in Pipe 1
+            ?
+                PORT_ID: 28
+            :
+                PC_PHYS_PORT_ID: 49 #TSC-BH7 6 in Pipe 1
+            ?
+                PORT_ID: 29
+            :
+                PC_PHYS_PORT_ID: 53 #TSC-BH7 6 in Pipe 1
+            ?
+                PORT_ID: 30
+            :
+                PC_PHYS_PORT_ID: 57 #TSC-BH7 7 in Pipe 1
+            ?
+                PORT_ID: 31
+            :
+                PC_PHYS_PORT_ID: 61 #TSC-BH7 7 in Pipe 1
+            ?
+                PORT_ID: 32
+            :
+                PC_PHYS_PORT_ID: 65 #TSC-BH7 8 in Pipe 1
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 69 #TSC-BH7 8 in Pipe 1
+            ?
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 73 #TSC-BH7 9 in Pipe 1
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 77 #TSC-BH7 9 in Pipe 1
+            ?
+                PORT_ID: 40
+            :
+                PC_PHYS_PORT_ID: 81 #TSC-BH7 10 in Pipe 2
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 89 #TSC-BH7 11 in Pipe 2
+            ?
+                PORT_ID: 48
+            :
+                PC_PHYS_PORT_ID: 97 #TSC-BH7 12 in Pipe 3
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 105 #TSC-BH7 13 in Pipe 3
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 113 #TSC-BH7 14 in Pipe 3
+            ?
+                PORT_ID: 60
+            :
+                PC_PHYS_PORT_ID: 121 #TSC-BH7 15 in Pipe 4
+            ?
+                PORT_ID: 61
+            :
+                PC_PHYS_PORT_ID: 129 #TSC-BH7 16 in Pipe 4
+            ?
+                PORT_ID: 62
+            :
+                PC_PHYS_PORT_ID: 137 #TSC-BH7 17 in Pipe 4
+            ?
+                PORT_ID: 64
+            :
+                PC_PHYS_PORT_ID: 145 #TSC-BH7 18 in Pipe 4
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 149 #TSC-BH7 18 in Pipe 4
+            ?
+                PORT_ID: 72
+            :
+                PC_PHYS_PORT_ID: 153 #TSC-BH7 19 in Pipe 4
+            ?
+                PORT_ID: 63
+            :
+                PC_PHYS_PORT_ID: 157 #TSC-BH7 19 in Pipe 4
+            ?
+                # loopback port
+                PORT_ID: 39
+            :
+                PC_PHYS_PORT_ID: 163
+            ?
+                # loopback port
+                PORT_ID: 79
+            :
+                PC_PHYS_PORT_ID: 164
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 0
+            :
+                &port_mode_10g
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [39, 79]
+            :
+                &port_mode_10g
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [40, 44, 48, 52, 56, 60, 61, 62]
+            :
+                &port_mode_400g
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+                #LINK_TRAINING: 1
+            ?
+                PORT_ID: [[8, 15]]
+            :
+                &port_mode_100g
+                ENABLE: 0
+                SPEED: 100000
+                NUM_LANES: 2
+                FEC_MODE: PC_FEC_RS544
+                MAX_FRAME_SIZE: 9416
+                LINK_TRAINING: 1
+            ?
+                PORT_ID: [1, 5, 6, 7, 16, 17, 20, 24,
+                          [28, 35],
+                          63, 64, 68, 72]
+            :
+                &port_mode_100g
+                ENABLE: 0
+                SPEED: 100000
+                NUM_LANES: 4
+                #FEC_MODE: PC_FEC_RS528
+                MAX_FRAME_SIZE: 9416
+                #LINK_TRAINING: 1
+
+        PC_PMD_FIRMWARE:
+            ?
+                PORT_ID: [[8, 15], 1, 5, 6, 7, 16, 17, 20, 24,
+                          [28, 35],
+                          [60, 63],
+                          40, 44, 48, 52, 56, 64, 68, 72]
+            :
+                MEDIUM_TYPE_AUTO: 0
+                MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE
+
+...
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[8, 15], 1, 5, 6, 7, 16, 17, 20, 24,
+                          [28, 35],
+                          [60, 63],
+                          40, 44, 48, 52, 56, 64, 68, 72]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+...
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            sai_brcm_sonic_acl_enhancements: 1
+            sai_remap_prio_on_tnl_egress: 1
+            bcm_tunnel_term_compatible_mode: 1
+            vlan_flooding_l2mc_num_reserved: 0
+            l2_hitbit_enable: 0
+            uft_mode: 1
+            l3_enable: 1
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            l3_alpm_template: 1
+            skip_protocol_default_entries: 1
+            sai_tunnel_support: 1
+            default_cpu_tx_queue: 7
+            multi_network_groups: 1
+            sai_nbr_bcast_ifp_optimized: 1
+            flexctr_action_reserved_ipmc_hitbit: 1
+            use_all_splithorizon_groups: 1
+            riot_enable: 1
+            riot_overlay_l3_intf_mem_size: 8192
+            riot_overlay_l3_egress_mem_size: 32768
+            l3_ecmp_levels: 2
+            riot_overlay_ecmp_resilient_hash_size: 16384
+            sai_fast_convergence_support: 1
+            sai_modify_hash_flexdigest: 1
+            sai_port_phy_time_sync_en: 1
+            egress_pkt_pri_remark_mode: 1
+            sai_mdio_access_clause45: 1
+...
+---
+device:
+    0:
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/custom_led.bin b/device/nokia/x86_64-nokia_ixr7220_d4-r0/custom_led.bin
new file mode 100644
index 00000000000..3701ff7eada
Binary files /dev/null and b/device/nokia/x86_64-nokia_ixr7220_d4-r0/custom_led.bin differ
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/default_sku b/device/nokia/x86_64-nokia_ixr7220_d4-r0/default_sku
new file mode 100644
index 00000000000..a1f5937a22f
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/default_sku
@@ -0,0 +1 @@
+Nokia-IXR7220-D4-36D t1
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/gbsyncd.ini b/device/nokia/x86_64-nokia_ixr7220_d4-r0/gbsyncd.ini
new file mode 100644
index 00000000000..b85f757a016
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/gbsyncd.ini
@@ -0,0 +1 @@
+platform=gbsyncd-milleniob
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7220_d4-r0/installer.conf
new file mode 100644
index 00000000000..7af555c1197
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_PORT=0x3f8
+CONSOLE_DEV=0
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="amd_iommu=off"
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/led_proc_init.soc b/device/nokia/x86_64-nokia_ixr7220_d4-r0/led_proc_init.soc
new file mode 100644
index 00000000000..eda09a0dd1f
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/led_proc_init.soc
@@ -0,0 +1,4 @@
+led stop
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/pcie.yaml b/device/nokia/x86_64-nokia_ixr7220_d4-r0/pcie.yaml
new file mode 100644
index 00000000000..af61dd20610
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/pcie.yaml
@@ -0,0 +1,435 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 6f00
+  name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
+    (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 6f02
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 6f04
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '2'
+  id: 6f06
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 6f08
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 6f28
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Map/VTd_Misc/System Management (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '1'
+  id: 6f29
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Hot Plug (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: 6f2a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO RAS/Control Status/Global Errors (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: 6f2c
+  name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
+    03)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 8c31
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    xHCI (rev 05)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 8c10
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #1 (rev d5)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 8c26
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    EHCI #1 (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 8c54
+  name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
+    SKU LPC Controller (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 8c02
+  name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
+    SATA Controller 1 [AHCI mode] (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '3'
+  id: 8c22
+  name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
+    (rev 05)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: 6f50
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 0'
+- bus: '02'
+  dev: '00'
+  fn: '1'
+  id: 6f51
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 1'
+- bus: '02'
+  dev: '00'
+  fn: '2'
+  id: 6f52
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 2'
+- bus: '02'
+  dev: '00'
+  fn: '3'
+  id: 6f53
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 3'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '03'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: b780
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b780 (rev 01)'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: '1538'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: ff
+  dev: 0b
+  fn: '0'
+  id: 6f81
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '1'
+  id: 6f36
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '2'
+  id: 6f37
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '3'
+  id: 6f76
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link Debug (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '0'
+  id: 6fe0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '1'
+  id: 6fe1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '2'
+  id: 6fe2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '3'
+  id: 6fe3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '4'
+  id: 6fe4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '5'
+  id: 6fe5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '6'
+  id: 6fe6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '7'
+  id: 6fe7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '0'
+  id: 6ff8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '4'
+  id: 6ffc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '5'
+  id: 6ffd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '6'
+  id: 6ffe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '0'
+  id: 6f1d
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '1'
+  id: 6f34
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '5'
+  id: 6f1e
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '6'
+  id: 6f7d
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '7'
+  id: 6f1f
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '0'
+  id: 6fa0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '1'
+  id: 6f30
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '0'
+  id: 6fa8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '1'
+  id: 6f71
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '2'
+  id: 6faa
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '3'
+  id: 6fab
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '4'
+  id: 6fac
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '5'
+  id: 6fad
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '6'
+  id: 6fae
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Broadcast (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '7'
+  id: 6faf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Global Broadcast (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '0'
+  id: 6fb0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '1'
+  id: 6fb1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '2'
+  id: 6fb2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '3'
+  id: 6fb3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '4'
+  id: 6fbc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '5'
+  id: 6fbd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '6'
+  id: 6fbe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '7'
+  id: 6fbf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '0'
+  id: 6fb4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '1'
+  id: 6fb5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '2'
+  id: 6fb6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Error (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '3'
+  id: 6fb7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Error (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: 6f98
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: 6f99
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 6f9a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 6fc0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 6f9c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '0'
+  id: 6f88
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '2'
+  id: 6f8a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform.json
new file mode 100644
index 00000000000..83f4e6caf2a
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform.json
@@ -0,0 +1,546 @@
+{
+    "chassis": {
+        "name": "7220 IXR-D4",
+        "components": [
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CPUPLD"
+            },
+            {
+                "name": "SWPLD1"
+            },
+            {
+                "name": "SWPLD2"
+            },
+            {
+                "name": "SWPLD3"
+            },
+            {
+                "name": "FANPLD"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fan1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan3",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan4",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan5",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan6",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan7",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan8",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan9",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan10",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan11",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan12",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38,
+                    "default": 50
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan3",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan4",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan5",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan6",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan7",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan8",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer5",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan9",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan10",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer6",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan11",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan12",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 38,
+                            "default": 50
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            },
+            {
+                "name": "PSU2",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            }
+        ],
+        "thermals": [
+            {
+                "name": "MB Front",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Rear",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU Board",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "ASIC TD4",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            }
+        ],
+        "sfps": [
+            {
+                "name": "QSFP28_1"
+            },
+            {
+                "name": "QSFP28_2"
+            },
+            {
+                "name": "QSFP28_3"
+            },
+            {
+                "name": "QSFP28_4"
+            },
+            {
+                "name": "QSFP28_5"
+            },
+            {
+                "name": "QSFP28_6"
+            },
+            {
+                "name": "QSFP28_7"
+            },
+            {
+                "name": "QSFP28_8"
+            },
+            {
+                "name": "QSFP28_9"
+            },
+            {
+                "name": "QSFP28_10"
+            },
+            {
+                "name": "QSFP28_11"
+            },
+            {
+                "name": "QSFP28_12"
+            },
+            {
+                "name": "QSFP28_13"
+            },
+            {
+                "name": "QSFP28_14"
+            },
+            {
+                "name": "QSFP28_15"
+            },
+            {
+                "name": "QSFP28_16"
+            },
+            {
+                "name": "QSFP28_17"
+            },
+            {
+                "name": "QSFP28_18"
+            },
+            {
+                "name": "QSFP28_19"
+            },
+            {
+                "name": "QSFP28_20"
+            },
+            {
+                "name": "QSFP28_21"
+            },
+            {
+                "name": "QSFP28_22"
+            },
+            {
+                "name": "QSFP28_23"
+            },
+            {
+                "name": "QSFP28_24"
+            },
+            {
+                "name": "QSFP28_25"
+            },
+            {
+                "name": "QSFP28_26"
+            },
+            {
+                "name": "QSFP28_27"
+            },
+            {
+                "name": "QSFP28_28"
+            },
+            {
+                "name": "QSFPDD_1"
+            },
+            {
+                "name": "QSFPDD_2"
+            },
+            {
+                "name": "QSFPDD_3"
+            },
+            {
+                "name": "QSFPDD_4"
+            },
+            {
+                "name": "QSFPDD_5"
+            },
+            {
+                "name": "QSFPDD_6"
+            },
+            {
+                "name": "QSFPDD_7"
+            },
+            {
+                "name": "QSFPDD_8"
+            }
+       	]
+    },
+    "interfaces": {},
+    "asic_sensors": {
+        "poll_interval": "10",
+        "poll_admin_status": "enable"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform_asic b/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform_asic
new file mode 100644
index 00000000000..96046765276
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform_env.conf b/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform_env.conf
new file mode 100644
index 00000000000..b4f7155e6b1
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform_env.conf
@@ -0,0 +1,3 @@
+SYNCD_SHM_SIZE=512m
+is_ltsw_chip=1
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7220_d4-r0/plugins/led_control.py
new file mode 100644
index 00000000000..3e413336b66
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/plugins/led_control.py
@@ -0,0 +1,93 @@
+"""
+    led_control.py
+
+    Platform-specific LED control functionality for SONiC
+"""
+
+try:
+    from sonic_led.led_control_base import LedControlBase
+    import os
+    import time
+    import syslog
+    from mmap import *
+    import sonic_platform.platform
+    import sonic_platform.chassis
+except ImportError as e:
+    raise ImportError(str(e) + " - required module not found")
+
+FANS_PER_DRAWER = 2
+FAN_DRAWERS     = 6
+
+CPLD1_DIR = "/sys/bus/i2c/devices/10-0060/"
+
+def DBG_PRINT(str):
+    syslog.openlog("nokia-led")
+    syslog.syslog(syslog.LOG_INFO, str)
+    syslog.closelog()
+
+class LedControl(LedControlBase):
+    """Platform specific LED control class"""
+
+    # Constructor
+    def __init__(self):
+        self.chassis = sonic_platform.platform.Platform().get_chassis()
+        self._initDefaultConfig()
+
+    def _initDefaultConfig(self):
+        # The fan tray leds and system led managed by new chassis class API
+        # leaving only a couple other front panel leds to be done old style
+        DBG_PRINT("starting system leds")
+        self._initSystemLed()
+        DBG_PRINT(" led done")
+
+    def _write_sysfs_file(self, sysfs_file, value):
+        # On successful write, the value read will be written on
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'w') as fd:
+                rv = fd.write(value)
+                fd.close()
+        except Exception as e:
+            rv = 'ERR'
+
+        return rv
+
+    def _initSystemLed(self):
+        # Front Panel System LEDs setting
+        old_led_green   = False
+        first_iteration = True
+
+        # Write sys led
+        status  = self._write_sysfs_file(CPLD1_DIR + 'sys_led', "4")
+        if status == "ERR":
+            DBG_PRINT(" System LED NOT set correctly")
+        else:
+            DBG_PRINT(" System LED set O.K. ")
+
+        # Timer loop to monitor and set front panel Fan LEDs
+        while True:
+            if not (os.path.isfile(CPLD1_DIR + "fan_led")):
+                time.sleep(6)
+                continue
+
+            good_fan = 0
+            for fan in self.chassis.get_all_fans():
+                if fan.get_status() == True:
+                    good_fan = good_fan + 1
+            fan_type = self.chassis.get_chassis_fan_type()
+
+            if (good_fan == FAN_DRAWERS * FANS_PER_DRAWER) and fan_type:
+                if not old_led_green or first_iteration:
+                    self._write_sysfs_file(CPLD1_DIR + "fan_led", "2")
+                    old_led_green = True
+            else:
+                if old_led_green or first_iteration:
+                    self._write_sysfs_file(CPLD1_DIR + "fan_led", "1")
+                    old_led_green = False
+
+            first_iteration = False
+            time.sleep(6)
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7220_d4-r0/system_health_monitoring_config.json
new file mode 100644
index 00000000000..93836514166
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/system_health_monitoring_config.json
@@ -0,0 +1,14 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "blue",
+        "booting": "green"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7220_d4-r0/thermal_policy.json
new file mode 100644
index 00000000000..293879e6e2c
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/thermal_policy.json
@@ -0,0 +1,84 @@
+{
+    "thermal_control_algorithm": {
+        "run_at_boot_up": "false",
+        "fan_speed_when_suspend": "60"
+    },
+    "info_types": [
+        {
+            "type": "fan_info"
+        },
+        {
+            "type": "thermal_info"
+        },
+        {
+            "type": "chassis_info"
+        }
+    ],
+    "policies": [
+        {
+            "name": "any fan absence",
+            "conditions": [
+                {
+                    "type": "fan.any.absence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal_control.control",
+                    "status": "false"
+                },
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "100"
+                }
+            ]
+        },
+        {
+            "name": "all f2b fan presence",
+            "conditions": [
+                {
+                    "type": "fan.f2b.all.presence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal.temp_check_and_set_all_f2b_fan_speed",
+                    "default_speed": "41",
+                    "threshold1_speed": "46",
+                    "threshold2_speed": "69",
+                    "hightemp_speed": "100"
+                }
+            ]
+        },
+        {
+            "name": "all b2f fan presence",
+            "conditions": [
+                {
+                    "type": "fan.b2f.all.presence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal.temp_check_and_set_all_b2f_fan_speed",
+                    "default_speed": "41",
+                    "threshold1_speed": "46",
+                    "threshold2_speed": "53",
+                    "hightemp_speed": "100"
+                }
+            ]
+        },
+	    {
+            "name": "temp over high critical threshold",
+            "conditions": [
+                {
+                    "type": "thermal.over.high_critical_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "switch.shutdown"
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffer_ports.j2 b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffer_ports.j2
new file mode 100644
index 00000000000..775f0d7663e
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffer_ports.j2
@@ -0,0 +1,7 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 256, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+    {% if PORT_ALL.append("Ethernet513") %}{% endif %}
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffers.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffers.json.j2
new file mode 100644
index 00000000000..0b1cb2c541b
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffers_defaults_t0.j2 b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffers_defaults_t0.j2
new file mode 100644
index 00000000000..f5ffee150eb
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "80424520",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "14760448"        
+        },
+        "egress_lossless_pool": {
+            "size": "80424520",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-1"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-4"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffers_defaults_t1.j2 b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffers_defaults_t1.j2
new file mode 100644
index 00000000000..f5ffee150eb
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "80424520",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "14760448"        
+        },
+        "egress_lossless_pool": {
+            "size": "80424520",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-1"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-4"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/hwsku.json b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/hwsku.json
new file mode 100644
index 00000000000..a192d320e92
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/hwsku.json
@@ -0,0 +1,107 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet257": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/ixr7220_h5_32d_800g.yml b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/ixr7220_h5_32d_800g.yml
new file mode 100755
index 00000000000..649f17ae5da
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/ixr7220_h5_32d_800g.yml
@@ -0,0 +1,679 @@
+# $Copyright: Broadcom Ltd.$
+#
+# BCM56993 port configuration.
+# configuration yaml file
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            default_cpu_tx_queue: 7
+            stat_custom_receive0_management_mode: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0xB1
+                TX_POLARITY_FLIP: 0x9C
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0xB1
+                TX_POLARITY_FLIP: 0x9C
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0xB1
+                TX_POLARITY_FLIP: 0x9C
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x52706413
+                TX_LANE_MAP: 0x75461023
+                RX_POLARITY_FLIP: 0x59
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32160475
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x75461023
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32160475
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67015342
+                TX_LANE_MAP: 0x56473120
+                RX_POLARITY_FLIP: 0xC4
+                TX_POLARITY_FLIP: 0xA3
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32160475
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x4C
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x05412763
+                RX_POLARITY_FLIP: 0x3D
+                TX_POLARITY_FLIP: 0xB1
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x07431652
+                TX_LANE_MAP: 0x35712460
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xC0
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x05412763
+                RX_POLARITY_FLIP: 0x3F
+                TX_POLARITY_FLIP: 0xB1
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x07431652
+                TX_LANE_MAP: 0x35712460
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xC0
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x35712460
+                TX_LANE_MAP: 0x27630541
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0xE4
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x25613470
+                TX_LANE_MAP: 0x17530642
+                RX_POLARITY_FLIP: 0x1D
+                TX_POLARITY_FLIP: 0xCF
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x35712460
+                TX_LANE_MAP: 0x27630541
+                RX_POLARITY_FLIP: 0x34
+                TX_POLARITY_FLIP: 0xE4
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x25613470
+                TX_LANE_MAP: 0x17530642
+                RX_POLARITY_FLIP: 0x1D
+                TX_POLARITY_FLIP: 0xCF
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x10762435
+                TX_LANE_MAP: 0x31205647
+                RX_POLARITY_FLIP: 0xCD
+                TX_POLARITY_FLIP: 0xC5
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x57406123
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0x1B
+                TX_POLARITY_FLIP: 0xDC
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x10237546
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0xC6
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x57406123
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0x1B
+                TX_POLARITY_FLIP: 0x9C
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x10237546
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0xC6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x57406123
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0x1B
+                TX_POLARITY_FLIP: 0x9C
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x36
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x57406123
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0x1B
+                TX_POLARITY_FLIP: 0x9C
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x36
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0xB1
+                TX_POLARITY_FLIP: 0x9C
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x60537241
+                RX_POLARITY_FLIP: 0xB1
+                TX_POLARITY_FLIP: 0x9C
+            ?
+                PC_PM_ID: 65
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x3210
+                TX_LANE_MAP: 0x3210
+                RX_POLARITY_FLIP: 0x01
+                TX_POLARITY_FLIP: 0x00
+...
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 121
+            # SFP+
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[264, 265],
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342],
+                          [1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78]]
+            :
+                ENABLE: 0
+                SPEED: 800000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [76, 274]
+            :
+                ENABLE: 0
+                SPEED: 10000
+                NUM_LANES: 1
+                FEC_MODE: PC_FEC_NONE
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration. Enable PPIU Mode
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[264, 265],
+                          274,
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342],
+                          [1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          76,
+                          [77, 78]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+...
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/media_settings.json b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/media_settings.json
new file mode 100644
index 00000000000..9e5f48b2ddc
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/media_settings.json
@@ -0,0 +1,4100 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "1": {
+            "Default": {
+                "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
+                    "main": {
+                        "lane0": "0x74",
+                        "lane1": "0x74",
+                        "lane2": "0x74",
+                        "lane3": "0x74",
+                        "lane4": "0x74",
+                        "lane5": "0x74",
+                        "lane6": "0x74",
+                        "lane7": "0x74"
+                    },
+                    "post1": {
+                        "lane0": "0xFFFFFFEC",
+                        "lane1": "0xFFFFFFEC",
+                        "lane2": "0xFFFFFFEC",
+                        "lane3": "0xFFFFFFEC",
+                        "lane4": "0xFFFFFFEC",
+                        "lane5": "0xFFFFFFEC",
+                        "lane6": "0xFFFFFFEC",
+                        "lane7": "0xFFFFFFEC"
+                    },
+                    "post2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "pre1": {
+                        "lane0": "0xFFFFFFFC",
+                        "lane1": "0xFFFFFFFC",
+                        "lane2": "0xFFFFFFFC",
+                        "lane3": "0xFFFFFFFC",
+                        "lane4": "0xFFFFFFFC",
+                        "lane5": "0xFFFFFFFC",
+                        "lane6": "0xFFFFFFFC",
+                        "lane7": "0xFFFFFFFC"
+                    },
+                    "pre2": {
+                        "lane0": "0x0",
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+                        "lane2": "0x4",
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+                        "lane4": "0x4",
+                        "lane5": "0x4",
+                        "lane6": "0x4",
+                        "lane7": "0x4"
+                    },
+                    "pre3": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    }
+                }
+            }
+        },
+        "32": {
+            "Default": {
+                "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
+                    "main": {
+                        "lane0": "0x74",
+                        "lane1": "0x74",
+                        "lane2": "0x74",
+                        "lane3": "0x74",
+                        "lane4": "0x74",
+                        "lane5": "0x74",
+                        "lane6": "0x74",
+                        "lane7": "0x74"
+                    },
+                    "post1": {
+                        "lane0": "0xFFFFFFEC",
+                        "lane1": "0xFFFFFFEC",
+                        "lane2": "0xFFFFFFEC",
+                        "lane3": "0xFFFFFFEC",
+                        "lane4": "0xFFFFFFEC",
+                        "lane5": "0xFFFFFFEC",
+                        "lane6": "0xFFFFFFEC",
+                        "lane7": "0xFFFFFFEC"
+                    },
+                    "post2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "pre1": {
+                        "lane0": "0xFFFFFFFC",
+                        "lane1": "0xFFFFFFFC",
+                        "lane2": "0xFFFFFFFC",
+                        "lane3": "0xFFFFFFFC",
+                        "lane4": "0xFFFFFFFC",
+                        "lane5": "0xFFFFFFFC",
+                        "lane6": "0xFFFFFFFC",
+                        "lane7": "0xFFFFFFFC"
+                    },
+                    "pre2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "pre3": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    }
+                },
+                "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
+                    "main": {
+                        "lane0": "0x88",
+                        "lane1": "0x88",
+                        "lane2": "0x88",
+                        "lane3": "0x88",
+                        "lane4": "0x88",
+                        "lane5": "0x88",
+                        "lane6": "0x88",
+                        "lane7": "0x88"
+                    },
+                    "post1": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "post2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "pre1": {
+                        "lane0": "0xFFFFFFE4",
+                        "lane1": "0xFFFFFFE4",
+                        "lane2": "0xFFFFFFE4",
+                        "lane3": "0xFFFFFFE4",
+                        "lane4": "0xFFFFFFE4",
+                        "lane5": "0xFFFFFFE4",
+                        "lane6": "0xFFFFFFE4",
+                        "lane7": "0xFFFFFFE4"
+                    },
+                    "pre2": {
+                        "lane0": "0x4",
+                        "lane1": "0x4",
+                        "lane2": "0x4",
+                        "lane3": "0x4",
+                        "lane4": "0x4",
+                        "lane5": "0x4",
+                        "lane6": "0x4",
+                        "lane7": "0x4"
+                    },
+                    "pre3": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    }
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/pg_profile_lookup.ini
new file mode 100644
index 00000000000..1ef8929259c
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/pg_profile_lookup.ini
@@ -0,0 +1,24 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
+  10000  5m   1248    2288 35776   0        2288
+  25000  5m   1248    2288 53248   0        2288
+  40000  5m   1248    2288 66560   0        2288
+  50000  5m   1248    2288 90272   0        2288
+ 100000  5m   1248    2288 165568  0        2288
+ 400000  5m   1248    2288 307848  0        2288
+ 800000  5m   1248    2288 572516  0        2288
+  10000  40m  1248    2288 37024   0        2288
+  25000  40m  1248    2288 53248   0        2288
+  40000  40m  1248    2288 71552   0        2288
+  50000  40m  1248    2288 96096   0        2288
+ 100000  40m  1248    2288 177632  0        2288
+ 400000  40m  1248    2288 330200  0        2288
+ 800000  40m  1248    2288 614172  0        2288
+  10000  300m 1248    2288 46176   0        2288
+  25000  300m 1248    2288 79040   0        2288
+  40000  300m 1248    2288 108160  0        2288
+  50000  300m 1248    2288 141856  0        2288
+ 100000  300m 1248    2288 268736  0        2288
+ 400000  300m 1248    2288 499618  0        2288
+ 800000  300m 1248    2288 929132  0        2288
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/port_config.ini
new file mode 100644
index 00000000000..49a79b5e906
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/port_config.ini
@@ -0,0 +1,35 @@
+# name          lanes                             alias               index     speed
+Ethernet0       393,394,395,396,397,398,399,400   Ethernet1/1  1      800000
+Ethernet8       385,386,387,388,389,390,391,392   Ethernet2/1  2      800000
+Ethernet16      409,410,411,412,413,414,415,416   Ethernet3/1  3      800000
+Ethernet24      401,402,403,404,405,406,407,408   Ethernet4/1  4      800000
+Ethernet32      425,426,427,428,429,430,431,432   Ethernet5/1  5      800000
+Ethernet40      417,418,419,420,421,422,423,424   Ethernet6/1  6      800000
+Ethernet48      441,442,443,444,445,446,447,448   Ethernet7/1  7      800000
+Ethernet56      433,434,435,436,437,438,439,440   Ethernet8/1  8      800000
+Ethernet64      457,458,459,460,461,462,463,464   Ethernet9/1  9      800000
+Ethernet72      449,450,451,452,453,454,455,456   Ethernet10/1 10     800000
+Ethernet80      473,474,475,476,477,478,479,480   Ethernet11/1 11     800000
+Ethernet88      465,466,467,468,469,470,471,472   Ethernet12/1 12     800000
+Ethernet96      489,490,491,492,493,494,495,496   Ethernet13/1 13     800000
+Ethernet104     481,482,483,484,485,486,487,488   Ethernet14/1 14     800000
+Ethernet112     505,506,507,508,509,510,511,512   Ethernet15/1 15     800000
+Ethernet120     497,498,499,500,501,502,503,504   Ethernet16/1 16     800000
+Ethernet128     1,2,3,4,5,6,7,8                   Ethernet17/1 17     800000
+Ethernet136     9,10,11,12,13,14,15,16            Ethernet18/1 18     800000
+Ethernet144     17,18,19,20,21,22,23,24           Ethernet19/1 19     800000
+Ethernet152     25,26,27,28,29,30,31,32           Ethernet20/1 20     800000
+Ethernet160     33,34,35,36,37,38,39,40           Ethernet21/1 21     800000
+Ethernet168     41,42,43,44,45,46,47,48           Ethernet22/1 22     800000
+Ethernet176     49,50,51,52,53,54,55,56           Ethernet23/1 23     800000
+Ethernet184     57,58,59,60,61,62,63,64           Ethernet24/1 24     800000
+Ethernet192     65,66,67,68,69,70,71,72           Ethernet25/1 25     800000
+Ethernet200     73,74,75,76,77,78,79,80           Ethernet26/1 26     800000
+Ethernet208     81,82,83,84,85,86,87,88           Ethernet27/1 27     800000
+Ethernet216     89,90,91,92,93,94,95,96           Ethernet28/1 28     800000
+Ethernet224     97,98,99,100,101,102,103,104      Ethernet29/1 29     800000
+Ethernet232     105,106,107,108,109,110,111,112   Ethernet30/1 30     800000
+Ethernet240     113,114,115,116,117,118,119,120   Ethernet31/1 31     800000
+Ethernet248     121,122,123,124,125,126,127,128   Ethernet32/1 32     800000
+Ethernet256     513                               Ethernet33   33     10000
+Ethernet257     515                               Ethernet34   34     10000
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/profile.ini b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/profile.ini
new file mode 100644
index 00000000000..4eda67c91a6
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=XX:XX:XX:XX:XX:XX
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/qos.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/qos.json.j2
new file mode 100644
index 00000000000..3e548325ea3
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/sai.profile b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/sai.profile
new file mode 100644
index 00000000000..77919a64271
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/Nokia-IXR7220-H5-32D/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ixr7220_h5_32d_800g.yml
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/custom_led.bin b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/custom_led.bin
new file mode 100644
index 00000000000..23660e776b8
Binary files /dev/null and b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/custom_led.bin differ
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/default_sku b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/default_sku
new file mode 100644
index 00000000000..cbfdb904a71
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/default_sku
@@ -0,0 +1 @@
+Nokia-IXR7220-H5-32D t1
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/installer.conf
new file mode 100644
index 00000000000..7d070a40bb2
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tpm_tis.interrupts=0"
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/led_proc_init.soc b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/led_proc_init.soc
new file mode 100644
index 00000000000..eda09a0dd1f
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/led_proc_init.soc
@@ -0,0 +1,4 @@
+led stop
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/pcie.yaml b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/pcie.yaml
new file mode 100644
index 00000000000..3a2bf01c7aa
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/pcie.yaml
@@ -0,0 +1,225 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 14b5
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Root
+    Complex (rev 01)'
+- bus: '00'
+  dev: '00'
+  fn: '2'
+  id: 14b6
+  name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Family 17h-19h IOMMU'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 14b7
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy
+    Host Bridge (rev 01)'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: 14b8
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '2'
+  id: 14b8
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe GPP Bridge'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 14b7
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy
+    Host Bridge (rev 01)'
+- bus: '00'
+  dev: '02'
+  fn: '1'
+  id: 14ba
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe GPP Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 14b7
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy
+    Host Bridge (rev 01)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 14b7
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy
+    Host Bridge (rev 01)'
+- bus: '00'
+  dev: 08
+  fn: '0'
+  id: 14b7
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy
+    Host Bridge (rev 01)'
+- bus: '00'
+  dev: 08
+  fn: '1'
+  id: 14b9
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe
+    GPP Bridge (rev 10)'
+- bus: '00'
+  dev: 08
+  fn: '2'
+  id: 14b9
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe
+    GPP Bridge (rev 10)'
+- bus: '00'
+  dev: 08
+  fn: '3'
+  id: 14b9
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe
+    GPP Bridge (rev 10)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 790b
+  name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 71)'
+- bus: '00'
+  dev: '14'
+  fn: '3'
+  id: 790e
+  name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: '1679'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 0'
+- bus: '00'
+  dev: '18'
+  fn: '1'
+  id: 167a
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 1'
+- bus: '00'
+  dev: '18'
+  fn: '2'
+  id: 167b
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 2'
+- bus: '00'
+  dev: '18'
+  fn: '3'
+  id: 167c
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 3'
+- bus: '00'
+  dev: '18'
+  fn: '4'
+  id: 167d
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 4'
+- bus: '00'
+  dev: '18'
+  fn: '5'
+  id: 167e
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 5'
+- bus: '00'
+  dev: '18'
+  fn: '6'
+  id: 167f
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 6'
+- bus: '00'
+  dev: '18'
+  fn: '7'
+  id: '1680'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 7'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: 9c1d
+  name: 'Unassigned class [ff00]: Lattice Semiconductor Corporation Device 9c1d (rev
+    01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: f902
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM78902 Switch ASIC
+    [Tomahawk5T] (rev 11)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: 145a
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD/ATI]
+    Dummy Function (absent graphics controller)'
+- bus: '04'
+  dev: '00'
+  fn: '2'
+  id: '1649'
+  name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] VanGogh PSP/CCP'
+- bus: '04'
+  dev: '00'
+  fn: '3'
+  id: 161d
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller
+    #3'
+- bus: '04'
+  dev: '00'
+  fn: '4'
+  id: 161e
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller
+    #4'
+- bus: '04'
+  dev: '00'
+  fn: '5'
+  id: 15e2
+  name: 'Multimedia controller: Advanced Micro Devices, Inc. [AMD] ACP/ACP3X/ACP6x
+    Audio Coprocessor (rev 60)'
+- bus: '04'
+  dev: '00'
+  fn: '6'
+  id: 15e3
+  name: 'Audio device: Advanced Micro Devices, Inc. [AMD] Family 17h/19h HD Audio
+    Controller'
+- bus: '04'
+  dev: '00'
+  fn: '7'
+  id: 15e4
+  name: 'Signal processing controller: Advanced Micro Devices, Inc. [AMD] Sensor Fusion
+    Hub'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: '7901'
+  name: 'SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI
+    mode] (rev a1)'
+- bus: '05'
+  dev: '00'
+  fn: '2'
+  id: '1458'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: '05'
+  dev: '00'
+  fn: '3'
+  id: '1458'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: 145a
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
+    Zeppelin/Raven/Raven2 PCIe Dummy Function'
+- bus: '06'
+  dev: '00'
+  fn: '3'
+  id: 15d6
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller
+    #5'
+- bus: '06'
+  dev: '00'
+  fn: '4'
+  id: 15d7
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller
+    #6'
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform.json
new file mode 100644
index 00000000000..3b84478591d
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform.json
@@ -0,0 +1,1613 @@
+{
+    "chassis": {
+        "name": "7220 IXR-H5-32D",
+        "components": [
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CPUPLD"
+            },
+            {
+                "name": "SysFPGA"
+            },
+            {
+                "name": "SWPLD2"
+            },
+            {
+                "name": "SWPLD3"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fan1",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan2",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan3",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan4",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan5",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan6",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan7",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan8",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan9",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan10",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan11",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan12",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan13",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan14",
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan1",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan2",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan3",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan4",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan5",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan6",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan7",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan8",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer5",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan9",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan10",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer6",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan11",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan12",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer7",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan13",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan14",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            },
+            {
+                "name": "PSU2",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            }
+        ],
+        "thermals": [
+            {
+                "name": "CPU Board",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MAC Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MAC Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB MAC",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "Fan Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "Fan Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "ASIC TH5",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            }
+        ],
+        "sfps": [
+            {
+                "name": "QSFPDD_1"
+            },
+            {
+                "name": "QSFPDD_2"
+            },
+            {
+                "name": "QSFPDD_3"
+            },
+            {
+                "name": "QSFPDD_4"
+            },
+            {
+                "name": "QSFPDD_5"
+            },
+            {
+                "name": "QSFPDD_6"
+            },
+            {
+                "name": "QSFPDD_7"
+            },
+            {
+                "name": "QSFPDD_8"
+            },
+            {
+                "name": "QSFPDD_9"
+            },
+            {
+                "name": "QSFPDD_10"
+            },
+            {
+                "name": "QSFPDD_11"
+            },
+            {
+                "name": "QSFPDD_12"
+            },
+            {
+                "name": "QSFPDD_13"
+            },
+            {
+                "name": "QSFPDD_14"
+            },
+            {
+                "name": "QSFPDD_15"
+            },
+            {
+                "name": "QSFPDD_16"
+            },
+            {
+                "name": "QSFPDD_17"
+            },
+            {
+                "name": "QSFPDD_18"
+            },
+            {
+                "name": "QSFPDD_19"
+            },
+            {
+                "name": "QSFPDD_20"
+            },
+            {
+                "name": "QSFPDD_21"
+            },
+            {
+                "name": "QSFPDD_22"
+            },
+            {
+                "name": "QSFPDD_23"
+            },
+            {
+                "name": "QSFPDD_24"
+            },
+            {
+                "name": "QSFPDD_25"
+            },
+            {
+                "name": "QSFPDD_26"
+            },
+            {
+                "name": "QSFPDD_27"
+            },
+            {
+                "name": "QSFPDD_28"
+            },
+            {
+                "name": "QSFPDD_29"
+            },
+            {
+                "name": "QSFPDD_30"
+            },
+            {
+                "name": "QSFPDD_31"
+            },
+            {
+                "name": "QSFPDD_32"
+            },
+            {
+                "name": "SFP+_0"
+            },
+            {
+                "name": "SFP+_1"
+            }
+       	]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "393,394,395,396,397,398,399,400",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet1/1"
+                ],
+                "1x400G": [
+                    "Ethernet1/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet1/1"
+                ],
+                "2x400G": [
+                    "Ethernet1/1",
+                    "Ethernet1/5"
+                ],
+                "4x200G": [
+                    "Ethernet1/1",
+                    "Ethernet1/3",
+                    "Ethernet1/5",
+                    "Ethernet1/7"
+                ],
+                "8x100G": [
+                    "Ethernet1/1",
+                    "Ethernet1/2",
+                    "Ethernet1/3",
+                    "Ethernet1/4",
+                    "Ethernet1/5",
+                    "Ethernet1/6",
+                    "Ethernet1/7",
+                    "Ethernet1/8"
+                ]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "385,386,387,388,389,390,391,392",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet2/1"
+                ],
+                "1x400G": [
+                    "Ethernet2/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet2/1"
+                ],
+                "2x400G": [
+                    "Ethernet2/1",
+                    "Ethernet2/5"
+                ],
+                "4x200G": [
+                    "Ethernet2/1",
+                    "Ethernet2/3",
+                    "Ethernet2/5",
+                    "Ethernet2/7"
+                ],
+                "8x100G": [
+                    "Ethernet2/1",
+                    "Ethernet2/2",
+                    "Ethernet2/3",
+                    "Ethernet2/4",
+                    "Ethernet2/5",
+                    "Ethernet2/6",
+                    "Ethernet2/7",
+                    "Ethernet2/8"
+                ]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "409,410,411,412,413,414,415,416",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet3/1"
+                ],
+                "1x400G": [
+                    "Ethernet3/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet3/1"
+                ],
+                "2x400G": [
+                    "Ethernet3/1",
+                    "Ethernet3/5"
+                ],
+                "4x200G": [
+                    "Ethernet3/1",
+                    "Ethernet3/3",
+                    "Ethernet3/5",
+                    "Ethernet3/7"
+                ],
+                "8x100G": [
+                    "Ethernet3/1",
+                    "Ethernet3/2",
+                    "Ethernet3/3",
+                    "Ethernet3/4",
+                    "Ethernet3/5",
+                    "Ethernet3/6",
+                    "Ethernet3/7",
+                    "Ethernet3/8"
+                ]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "401,402,403,404,405,406,407,408",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet4/1"
+                ],
+                "1x400G": [
+                    "Ethernet4/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet4/1"
+                ],
+                "2x400G": [
+                    "Ethernet4/1",
+                    "Ethernet4/5"
+                ],
+                "4x200G": [
+                    "Ethernet4/1",
+                    "Ethernet4/3",
+                    "Ethernet4/5",
+                    "Ethernet4/7"
+                ],
+                "8x100G": [
+                    "Ethernet4/1",
+                    "Ethernet4/2",
+                    "Ethernet4/3",
+                    "Ethernet4/4",
+                    "Ethernet4/5",
+                    "Ethernet4/6",
+                    "Ethernet4/7",
+                    "Ethernet4/8"
+                ]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "425,426,427,428,429,430,431,432",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet5/1"
+                ],
+                "1x400G": [
+                    "Ethernet5/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet5/1"
+                ],
+                "2x400G": [
+                    "Ethernet5/1",
+                    "Ethernet5/5"
+                ],
+                "4x200G": [
+                    "Ethernet5/1",
+                    "Ethernet5/3",
+                    "Ethernet5/5",
+                    "Ethernet5/7"
+                ],
+                "8x100G": [
+                    "Ethernet5/1",
+                    "Ethernet5/2",
+                    "Ethernet5/3",
+                    "Ethernet5/4",
+                    "Ethernet5/5",
+                    "Ethernet5/6",
+                    "Ethernet5/7",
+                    "Ethernet5/8"
+                ]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "417,418,419,420,421,422,423,424",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet6/1"
+                ],
+                "1x400G": [
+                    "Ethernet6/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet6/1"
+                ],
+                "2x400G": [
+                    "Ethernet6/1",
+                    "Ethernet6/5"
+                ],
+                "4x200G": [
+                    "Ethernet6/1",
+                    "Ethernet6/3",
+                    "Ethernet6/5",
+                    "Ethernet6/7"
+                ],
+                "8x100G": [
+                    "Ethernet6/1",
+                    "Ethernet6/2",
+                    "Ethernet6/3",
+                    "Ethernet6/4",
+                    "Ethernet6/5",
+                    "Ethernet6/6",
+                    "Ethernet6/7",
+                    "Ethernet6/8"
+                ]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "441,442,443,444,445,446,447,448",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet7/1"
+                ],
+                "1x400G": [
+                    "Ethernet7/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet7/1"
+                ],
+                "2x400G": [
+                    "Ethernet7/1",
+                    "Ethernet7/5"
+                ],
+                "4x200G": [
+                    "Ethernet7/1",
+                    "Ethernet7/3",
+                    "Ethernet7/5",
+                    "Ethernet7/7"
+                ],
+                "8x100G": [
+                    "Ethernet7/1",
+                    "Ethernet7/2",
+                    "Ethernet7/3",
+                    "Ethernet7/4",
+                    "Ethernet7/5",
+                    "Ethernet7/6",
+                    "Ethernet7/7",
+                    "Ethernet7/8"
+                ]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "433,434,435,436,437,438,439,440",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet8/1"
+                ],
+                "1x400G": [
+                    "Ethernet8/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet8/1"
+                ],
+                "2x400G": [
+                    "Ethernet8/1",
+                    "Ethernet8/5"
+                ],
+                "4x200G": [
+                    "Ethernet8/1",
+                    "Ethernet8/3",
+                    "Ethernet8/5",
+                    "Ethernet8/7"
+                ],
+                "8x100G": [
+                    "Ethernet8/1",
+                    "Ethernet8/2",
+                    "Ethernet8/3",
+                    "Ethernet8/4",
+                    "Ethernet8/5",
+                    "Ethernet8/6",
+                    "Ethernet8/7",
+                    "Ethernet8/8"
+                ]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "457,458,459,460,461,462,463,464",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet9/1"
+                ],
+                "1x400G": [
+                    "Ethernet9/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet9/1"
+                ],
+                "2x400G": [
+                    "Ethernet9/1",
+                    "Ethernet9/5"
+                ],
+                "4x200G": [
+                    "Ethernet9/1",
+                    "Ethernet9/3",
+                    "Ethernet9/5",
+                    "Ethernet9/7"
+                ],
+                "8x100G": [
+                    "Ethernet9/1",
+                    "Ethernet9/2",
+                    "Ethernet9/3",
+                    "Ethernet9/4",
+                    "Ethernet9/5",
+                    "Ethernet9/6",
+                    "Ethernet9/7",
+                    "Ethernet9/8"
+                ]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "449,450,451,452,453,454,455,456",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet10/1"
+                ],
+                "1x400G": [
+                    "Ethernet10/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet10/1"
+                ],
+                "2x400G": [
+                    "Ethernet10/1",
+                    "Ethernet10/5"
+                ],
+                "4x200G": [
+                    "Ethernet10/1",
+                    "Ethernet10/3",
+                    "Ethernet10/5",
+                    "Ethernet10/7"
+                ],
+                "8x100G": [
+                    "Ethernet10/1",
+                    "Ethernet10/2",
+                    "Ethernet10/3",
+                    "Ethernet10/4",
+                    "Ethernet10/5",
+                    "Ethernet10/6",
+                    "Ethernet10/7",
+                    "Ethernet10/8"
+                ]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "473,474,475,476,477,478,479,480",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet11/1"
+                ],
+                "1x400G": [
+                    "Ethernet11/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet11/1"
+                ],
+                "2x400G": [
+                    "Ethernet11/1",
+                    "Ethernet11/5"
+                ],
+                "4x200G": [
+                    "Ethernet11/1",
+                    "Ethernet11/3",
+                    "Ethernet11/5",
+                    "Ethernet11/7"
+                ],
+                "8x100G": [
+                    "Ethernet11/1",
+                    "Ethernet11/2",
+                    "Ethernet11/3",
+                    "Ethernet11/4",
+                    "Ethernet11/5",
+                    "Ethernet11/6",
+                    "Ethernet11/7",
+                    "Ethernet11/8"
+                ]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "465,466,467,468,469,470,471,472",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet12/1"
+                ],
+                "1x400G": [
+                    "Ethernet12/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet12/1"
+                ],
+                "2x400G": [
+                    "Ethernet12/1",
+                    "Ethernet12/5"
+                ],
+                "4x200G": [
+                    "Ethernet12/1",
+                    "Ethernet12/3",
+                    "Ethernet12/5",
+                    "Ethernet12/7"
+                ],
+                "8x100G": [
+                    "Ethernet12/1",
+                    "Ethernet12/2",
+                    "Ethernet12/3",
+                    "Ethernet12/4",
+                    "Ethernet12/5",
+                    "Ethernet12/6",
+                    "Ethernet12/7",
+                    "Ethernet12/8"
+                ]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "489,490,491,492,493,494,495,496",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet13/1"
+                ],
+                "1x400G": [
+                    "Ethernet13/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet13/1"
+                ],
+                "2x400G": [
+                    "Ethernet13/1",
+                    "Ethernet13/5"
+                ],
+                "4x200G": [
+                    "Ethernet13/1",
+                    "Ethernet13/3",
+                    "Ethernet13/5",
+                    "Ethernet13/7"
+                ],
+                "8x100G": [
+                    "Ethernet13/1",
+                    "Ethernet13/2",
+                    "Ethernet13/3",
+                    "Ethernet13/4",
+                    "Ethernet13/5",
+                    "Ethernet13/6",
+                    "Ethernet13/7",
+                    "Ethernet13/8"
+                ]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "481,482,483,484,485,486,487,488",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet14/1"
+                ],
+                "1x400G": [
+                    "Ethernet14/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet14/1"
+                ],
+                "2x400G": [
+                    "Ethernet14/1",
+                    "Ethernet14/5"
+                ],
+                "4x200G": [
+                    "Ethernet14/1",
+                    "Ethernet14/3",
+                    "Ethernet14/5",
+                    "Ethernet14/7"
+                ],
+                "8x100G": [
+                    "Ethernet14/1",
+                    "Ethernet14/2",
+                    "Ethernet14/3",
+                    "Ethernet14/4",
+                    "Ethernet14/5",
+                    "Ethernet14/6",
+                    "Ethernet14/7",
+                    "Ethernet14/8"
+                ]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "505,506,507,508,509,510,511,512",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet15/1"
+                ],
+                "1x400G": [
+                    "Ethernet15/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet15/1"
+                ],
+                "2x400G": [
+                    "Ethernet15/1",
+                    "Ethernet15/5"
+                ],
+                "4x200G": [
+                    "Ethernet15/1",
+                    "Ethernet15/3",
+                    "Ethernet15/5",
+                    "Ethernet15/7"
+                ],
+                "8x100G": [
+                    "Ethernet15/1",
+                    "Ethernet15/2",
+                    "Ethernet15/3",
+                    "Ethernet15/4",
+                    "Ethernet15/5",
+                    "Ethernet15/6",
+                    "Ethernet15/7",
+                    "Ethernet15/8"
+                ]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "497,498,499,500,501,502,503,504",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet16/1"
+                ],
+                "1x400G": [
+                    "Ethernet16/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet16/1"
+                ],
+                "2x400G": [
+                    "Ethernet16/1",
+                    "Ethernet16/5"
+                ],
+                "4x200G": [
+                    "Ethernet16/1",
+                    "Ethernet16/3",
+                    "Ethernet16/5",
+                    "Ethernet16/7"
+                ],
+                "8x100G": [
+                    "Ethernet16/1",
+                    "Ethernet16/2",
+                    "Ethernet16/3",
+                    "Ethernet16/4",
+                    "Ethernet16/5",
+                    "Ethernet16/6",
+                    "Ethernet16/7",
+                    "Ethernet16/8"
+                ]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet17/1"
+                ],
+                "1x400G": [
+                    "Ethernet17/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet17/1"
+                ],
+                "2x400G": [
+                    "Ethernet17/1",
+                    "Ethernet17/5"
+                ],
+                "4x200G": [
+                    "Ethernet17/1",
+                    "Ethernet17/3",
+                    "Ethernet17/5",
+                    "Ethernet17/7"
+                ],
+                "8x100G": [
+                    "Ethernet17/1",
+                    "Ethernet17/2",
+                    "Ethernet17/3",
+                    "Ethernet17/4",
+                    "Ethernet17/5",
+                    "Ethernet17/6",
+                    "Ethernet17/7",
+                    "Ethernet17/8"
+                ]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet18/1"
+                ],
+                "1x400G": [
+                    "Ethernet18/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet18/1"
+                ],
+                "2x400G": [
+                    "Ethernet18/1",
+                    "Ethernet18/5"
+                ],
+                "4x200G": [
+                    "Ethernet18/1",
+                    "Ethernet18/3",
+                    "Ethernet18/5",
+                    "Ethernet18/7"
+                ],
+                "8x100G": [
+                    "Ethernet18/1",
+                    "Ethernet18/2",
+                    "Ethernet18/3",
+                    "Ethernet18/4",
+                    "Ethernet18/5",
+                    "Ethernet18/6",
+                    "Ethernet18/7",
+                    "Ethernet18/8"
+                ]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet19/1"
+                ],
+                "1x400G": [
+                    "Ethernet19/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet19/1"
+                ],
+                "2x400G": [
+                    "Ethernet19/1",
+                    "Ethernet19/5"
+                ],
+                "4x200G": [
+                    "Ethernet19/1",
+                    "Ethernet19/3",
+                    "Ethernet19/5",
+                    "Ethernet19/7"
+                ],
+                "8x100G": [
+                    "Ethernet19/1",
+                    "Ethernet19/2",
+                    "Ethernet19/3",
+                    "Ethernet19/4",
+                    "Ethernet19/5",
+                    "Ethernet19/6",
+                    "Ethernet19/7",
+                    "Ethernet19/8"
+                ]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet20/1"
+                ],
+                "1x400G": [
+                    "Ethernet20/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet20/1"
+                ],
+                "2x400G": [
+                    "Ethernet20/1",
+                    "Ethernet20/5"
+                ],
+                "4x200G": [
+                    "Ethernet20/1",
+                    "Ethernet20/3",
+                    "Ethernet20/5",
+                    "Ethernet20/7"
+                ],
+                "8x100G": [
+                    "Ethernet20/1",
+                    "Ethernet20/2",
+                    "Ethernet20/3",
+                    "Ethernet20/4",
+                    "Ethernet20/5",
+                    "Ethernet20/6",
+                    "Ethernet20/7",
+                    "Ethernet20/8"
+                ]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet21/1"
+                ],
+                "1x400G": [
+                    "Ethernet21/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet21/1"
+                ],
+                "2x400G": [
+                    "Ethernet21/1",
+                    "Ethernet21/5"
+                ],
+                "4x200G": [
+                    "Ethernet21/1",
+                    "Ethernet21/3",
+                    "Ethernet21/5",
+                    "Ethernet21/7"
+                ],
+                "8x100G": [
+                    "Ethernet21/1",
+                    "Ethernet21/2",
+                    "Ethernet21/3",
+                    "Ethernet21/4",
+                    "Ethernet21/5",
+                    "Ethernet21/6",
+                    "Ethernet21/7",
+                    "Ethernet21/8"
+                ]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet22/1"
+                ],
+                "1x400G": [
+                    "Ethernet22/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet22/1"
+                ],
+                "2x400G": [
+                    "Ethernet22/1",
+                    "Ethernet22/5"
+                ],
+                "4x200G": [
+                    "Ethernet22/1",
+                    "Ethernet22/3",
+                    "Ethernet22/5",
+                    "Ethernet22/7"
+                ],
+                "8x100G": [
+                    "Ethernet22/1",
+                    "Ethernet22/2",
+                    "Ethernet22/3",
+                    "Ethernet22/4",
+                    "Ethernet22/5",
+                    "Ethernet22/6",
+                    "Ethernet22/7",
+                    "Ethernet22/8"
+                ]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet23/1"
+                ],
+                "1x400G": [
+                    "Ethernet23/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet23/1"
+                ],
+                "2x400G": [
+                    "Ethernet23/1",
+                    "Ethernet23/5"
+                ],
+                "4x200G": [
+                    "Ethernet23/1",
+                    "Ethernet23/3",
+                    "Ethernet23/5",
+                    "Ethernet23/7"
+                ],
+                "8x100G": [
+                    "Ethernet23/1",
+                    "Ethernet23/2",
+                    "Ethernet23/3",
+                    "Ethernet23/4",
+                    "Ethernet23/5",
+                    "Ethernet23/6",
+                    "Ethernet23/7",
+                    "Ethernet23/8"
+                ]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet24/1"
+                ],
+                "1x400G": [
+                    "Ethernet24/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet24/1"
+                ],
+                "2x400G": [
+                    "Ethernet24/1",
+                    "Ethernet24/5"
+                ],
+                "4x200G": [
+                    "Ethernet24/1",
+                    "Ethernet24/3",
+                    "Ethernet24/5",
+                    "Ethernet24/7"
+                ],
+                "8x100G": [
+                    "Ethernet24/1",
+                    "Ethernet24/2",
+                    "Ethernet24/3",
+                    "Ethernet24/4",
+                    "Ethernet24/5",
+                    "Ethernet24/6",
+                    "Ethernet24/7",
+                    "Ethernet24/8"
+                ]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet25/1"
+                ],
+                "1x400G": [
+                    "Ethernet25/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet25/1"
+                ],
+                "2x400G": [
+                    "Ethernet25/1",
+                    "Ethernet25/5"
+                ],
+                "4x200G": [
+                    "Ethernet25/1",
+                    "Ethernet25/3",
+                    "Ethernet25/5",
+                    "Ethernet25/7"
+                ],
+                "8x100G": [
+                    "Ethernet25/1",
+                    "Ethernet25/2",
+                    "Ethernet25/3",
+                    "Ethernet25/4",
+                    "Ethernet25/5",
+                    "Ethernet25/6",
+                    "Ethernet25/7",
+                    "Ethernet25/8"
+                ]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet26/1"
+                ],
+                "1x400G": [
+                    "Ethernet26/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet26/1"
+                ],
+                "2x400G": [
+                    "Ethernet26/1",
+                    "Ethernet26/5"
+                ],
+                "4x200G": [
+                    "Ethernet26/1",
+                    "Ethernet26/3",
+                    "Ethernet26/5",
+                    "Ethernet26/7"
+                ],
+                "8x100G": [
+                    "Ethernet26/1",
+                    "Ethernet26/2",
+                    "Ethernet26/3",
+                    "Ethernet26/4",
+                    "Ethernet26/5",
+                    "Ethernet26/6",
+                    "Ethernet26/7",
+                    "Ethernet26/8"
+                ]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet27/1"
+                ],
+                "1x400G": [
+                    "Ethernet27/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet27/1"
+                ],
+                "2x400G": [
+                    "Ethernet27/1",
+                    "Ethernet27/5"
+                ],
+                "4x200G": [
+                    "Ethernet27/1",
+                    "Ethernet27/3",
+                    "Ethernet27/5",
+                    "Ethernet27/7"
+                ],
+                "8x100G": [
+                    "Ethernet27/1",
+                    "Ethernet27/2",
+                    "Ethernet27/3",
+                    "Ethernet27/4",
+                    "Ethernet27/5",
+                    "Ethernet27/6",
+                    "Ethernet27/7",
+                    "Ethernet27/8"
+                ]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet28/1"
+                ],
+                "1x400G": [
+                    "Ethernet28/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet28/1"
+                ],
+                "2x400G": [
+                    "Ethernet28/1",
+                    "Ethernet28/5"
+                ],
+                "4x200G": [
+                    "Ethernet28/1",
+                    "Ethernet28/3",
+                    "Ethernet28/5",
+                    "Ethernet28/7"
+                ],
+                "8x100G": [
+                    "Ethernet28/1",
+                    "Ethernet28/2",
+                    "Ethernet28/3",
+                    "Ethernet28/4",
+                    "Ethernet28/5",
+                    "Ethernet28/6",
+                    "Ethernet28/7",
+                    "Ethernet28/8"
+                ]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet29/1"
+                ],
+                "1x400G": [
+                    "Ethernet29/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet29/1"
+                ],
+                "2x400G": [
+                    "Ethernet29/1",
+                    "Ethernet29/5"
+                ],
+                "4x200G": [
+                    "Ethernet29/1",
+                    "Ethernet29/3",
+                    "Ethernet29/5",
+                    "Ethernet29/7"
+                ],
+                "8x100G": [
+                    "Ethernet29/1",
+                    "Ethernet29/2",
+                    "Ethernet29/3",
+                    "Ethernet29/4",
+                    "Ethernet29/5",
+                    "Ethernet29/6",
+                    "Ethernet29/7",
+                    "Ethernet29/8"
+                ]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet30/1"
+                ],
+                "1x400G": [
+                    "Ethernet30/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet30/1"
+                ],
+                "2x400G": [
+                    "Ethernet30/1",
+                    "Ethernet30/5"
+                ],
+                "4x200G": [
+                    "Ethernet30/1",
+                    "Ethernet30/3",
+                    "Ethernet30/5",
+                    "Ethernet30/7"
+                ],
+                "8x100G": [
+                    "Ethernet30/1",
+                    "Ethernet30/2",
+                    "Ethernet30/3",
+                    "Ethernet30/4",
+                    "Ethernet30/5",
+                    "Ethernet30/6",
+                    "Ethernet30/7",
+                    "Ethernet30/8"
+                ]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet31/1"
+                ],
+                "1x400G": [
+                    "Ethernet31/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet31/1"
+                ],
+                "2x400G": [
+                    "Ethernet31/1",
+                    "Ethernet31/5"
+                ],
+                "4x200G": [
+                    "Ethernet31/1",
+                    "Ethernet31/3",
+                    "Ethernet31/5",
+                    "Ethernet31/7"
+                ],
+                "8x100G": [
+                    "Ethernet31/1",
+                    "Ethernet31/2",
+                    "Ethernet31/3",
+                    "Ethernet31/4",
+                    "Ethernet31/5",
+                    "Ethernet31/6",
+                    "Ethernet31/7",
+                    "Ethernet31/8"
+                ]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet32/1"
+                ],
+                "1x400G": [
+                    "Ethernet32/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet32/1"
+                ],
+                "2x400G": [
+                    "Ethernet32/1",
+                    "Ethernet32/5"
+                ],
+                "4x200G": [
+                    "Ethernet32/1",
+                    "Ethernet32/3",
+                    "Ethernet32/5",
+                    "Ethernet32/7"
+                ],
+                "8x100G": [
+                    "Ethernet32/1",
+                    "Ethernet32/2",
+                    "Ethernet32/3",
+                    "Ethernet32/4",
+                    "Ethernet32/5",
+                    "Ethernet32/6",
+                    "Ethernet32/7",
+                    "Ethernet32/8"
+                ]
+            }
+        },
+        "Ethernet256": {
+            "index": "33",
+            "lanes": "513",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet33"
+                ]
+            }
+        },
+        "Ethernet257": {
+            "index": "34",
+            "lanes": "515",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet34"
+                ]
+            }
+        }
+    },
+    "asic_sensors": {
+        "poll_interval": "10",
+        "poll_admin_status": "enable"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform_asic b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform_asic
new file mode 100644
index 00000000000..96046765276
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform_env.conf b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform_env.conf
new file mode 100644
index 00000000000..b4f7155e6b1
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform_env.conf
@@ -0,0 +1,3 @@
+SYNCD_SHM_SIZE=512m
+is_ltsw_chip=1
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform_reboot b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform_reboot
new file mode 100755
index 00000000000..06fba6c414e
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/platform_reboot
@@ -0,0 +1,12 @@
+#!/bin/bash
+
+dd=$(date -u "+%y%m%d%H%M%S")
+i2cset -y 0 0x68 0x03 0x${dd:10:2}
+i2cset -y 0 0x68 0x04 0x${dd:8:2}
+i2cset -y 0 0x68 0x05 0x${dd:6:2}
+i2cset -y 0 0x68 0x06 0x${dd:4:2}
+i2cset -y 0 0x68 0x08 0x${dd:2:2}
+i2cset -y 0 0x68 0x09 0x${dd:0:2}
+i2cset -y 0 0x68 0x0F 0x38
+
+exec /sbin/reboot
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/plugins/eeprom.py b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/plugins/eeprom.py
new file mode 100644
index 00000000000..7b357e673e9
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/plugins/eeprom.py
@@ -0,0 +1,16 @@
+try:
+    import os
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class board(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, name, path, cpld_root, ro):
+        self.eeprom_path = "/sys/bus/i2c/devices/4-0054/eeprom"
+        if not os.path.exists(self.eeprom_path):
+            file = "/sys/bus/i2c/devices/i2c-4/new_device"
+            with open(file, 'w') as f:
+                f.write('24c02 0x54\n')
+        super(board, self).__init__(self.eeprom_path, 0, '', True)
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/plugins/led_control.py
new file mode 100644
index 00000000000..59a181dc859
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/plugins/led_control.py
@@ -0,0 +1,109 @@
+"""
+    led_control.py
+
+    Platform-specific LED control functionality for SONiC
+"""
+
+try:
+    from sonic_led.led_control_base import LedControlBase
+    import os
+    import time
+    import syslog
+    import sonic_platform.platform
+    import sonic_platform.chassis
+except ImportError as e:
+    raise ImportError(str(e) + " - required module not found")
+
+FAN_DRAWERS = 7
+FANS_PER_DRAWER = 2
+FPGA_DIR = "/sys/kernel/sys_fpga/"
+
+def DBG_PRINT(str):
+    syslog.openlog("nokia-led")
+    syslog.syslog(syslog.LOG_INFO, str)
+    syslog.closelog()
+
+class LedControl(LedControlBase):
+    """Platform specific LED control class"""
+
+    # Constructor
+    def __init__(self):
+        self.chassis = sonic_platform.platform.Platform().get_chassis()
+        self._initDefaultConfig()
+
+    def _initDefaultConfig(self):
+        # The fan tray leds and system led managed by new chassis class API
+        # leaving only a couple other front panel leds to be done old style
+        DBG_PRINT("starting system leds")
+        self._initSystemLed()
+        DBG_PRINT(" led done")
+
+    def _read_sysfs_file(self, sysfs_file):
+        # On successful read, returns the value read from given
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if not os.path.isfile(sysfs_file):
+            return rv
+        try:
+            with open(sysfs_file, 'r') as fd:
+                rv = fd.read()
+                fd.close()
+        except Exception as e:
+            rv = 'ERR'
+
+        rv = rv.rstrip('\r\n')
+        rv = rv.lstrip(" ")
+        return rv
+
+    def _write_sysfs_file(self, sysfs_file, value):
+        # On successful write, the value read will be written on
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if not os.path.isfile(sysfs_file):
+            return rv
+        try:
+            with open(sysfs_file, 'w') as fd:
+                rv = fd.write(value)
+                fd.close()
+        except Exception as e:
+            rv = 'ERR'
+
+        return rv
+
+    def _initSystemLed(self):
+        # Front Panel System LEDs setting
+        oldfan = 0xf    # 0=amber, 1=green
+
+        # Write sys led
+        status  = self._write_sysfs_file(FPGA_DIR + 'led_sys', "3")
+        if status == "ERR":
+            DBG_PRINT(" System LED NOT set correctly")
+        else:
+            DBG_PRINT(" System LED set O.K. ")
+
+        # Timer loop to monitor and set front panel Status, Fan, and PSU LEDs
+        while True:
+            # Front Panel FAN Panel LED setting
+            good_fan = 0
+            for fan in self.chassis._fan_list:
+                if fan.get_status():
+                    good_fan = good_fan + 1
+
+            if good_fan == FAN_DRAWERS * FANS_PER_DRAWER:
+                if os.path.isfile(FPGA_DIR + "led_fan"):
+                    if oldfan != 0x1:
+                        self._write_sysfs_file(FPGA_DIR + "led_fan", "1")
+                        oldfan = 0x1
+                else:
+                    oldfan = 0xf
+            else:
+                if os.path.isfile(FPGA_DIR + "led_fan"):
+                    if oldfan != 0x0:
+                        self._write_sysfs_file(FPGA_DIR + "led_fan", "2")
+                        oldfan = 0x0
+                else:
+                    oldfan = 0xf
+
+            time.sleep(6)
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/system_health_monitoring_config.json
new file mode 100644
index 00000000000..d5f3a7b9830
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/system_health_monitoring_config.json
@@ -0,0 +1,14 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "blinking green"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/thermal_policy.json
new file mode 100644
index 00000000000..28d5cc190bd
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_32d-r0/thermal_policy.json
@@ -0,0 +1,67 @@
+{   
+    "thermal_control_algorithm": {
+        "run_at_boot_up": "false",
+        "fan_speed_when_suspend": "60"
+    },
+    "info_types": [
+        {
+            "type": "fan_info"
+        },
+        {
+            "type": "thermal_info"
+        },
+        {
+            "type": "chassis_info"
+        }
+    ],
+    "policies": [
+        {
+            "name": "any fan absence",
+            "conditions": [
+                {
+                    "type": "fan.any.absence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal_control.control",
+                    "status": "false"
+                },
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "100"
+                }
+            ]
+        },
+        {
+            "name": "all fan presence",
+            "conditions": [
+                {
+                    "type": "fan.all.presence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal.temp_check_and_set_all_fan_speed",
+                    "default_speed": "45",
+                    "threshold1_speed": "60",
+                    "threshold2_speed": "70",
+                    "hightemp_speed": "90"
+                }
+            ]
+        },
+	{
+            "name": "temp over high critical threshold",
+            "conditions": [
+                {
+                    "type": "thermal.over.high_critical_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "switch.shutdown"
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/h5_64dx400g.yml b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/h5_64dx400g.yml
deleted file mode 100644
index 878ceacffd4..00000000000
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/h5_64dx400g.yml
+++ /dev/null
@@ -1,1239 +0,0 @@
-#
-# $Copyright: (c) 2022 Broadcom.
-# Broadcom Proprietary and Confidential. All rights reserved.$
-#
-# BCM78900 64x800g port configuration.
-#
-# configuration yaml file
-#   device:
-#       <unit>:
-#           <table>:
-#               ?
-#                   <key_fld_1>: <value>
-#                   <key_fld_2>: <value>
-#                   ...
-#                   <key_fld_n>: <value>
-#               :
-#                   <data_fld_1>: <value>
-#                   <data_fld_2>: <value>
-#                   ...
-#                   <data_fld_n>: <value>
-#
-
----
-bcm_device:
-    0:
-        global:
-            pktio_mode: 1
-            vlan_flooding_l2mc_num_reserved: 0
-            ipv6_lpm_128b_enable: 1
-            shared_block_mask_section: uc_bc
-            skip_protocol_default_entries: 1
-            # LTSW uses value 1 for ALPM combined mode
-            l3_alpm_template: 1
-            l3_alpm_hit_skip: 1
-            sai_feat_tail_timestamp : 1
-            sai_port_phy_time_sync_en : 1
-            sai_field_group_auto_prioritize: 1
-            #l3_intf_vlan_split_egress for MTU at L3IF
-            l3_intf_vlan_split_egress : 1
-            pfc_deadlock_seq_control : 1
-            sai_tunnel_support: 2
-            bcm_tunnel_term_compatible_mode: 1
-            l3_ecmp_member_first_lkup_mem_size: 12288
-            default_cpu_tx_queue: 7
-            sai_l3_byte1_udf_disable: 1
----
-device:
-    0:
-        PC_PM_CORE:
-            ?
-                PC_PM_ID: 1
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x35712460
-                TX_LANE_MAP: 0x34702561
-                RX_POLARITY_FLIP: 0x30
-                TX_POLARITY_FLIP: 0x2E
-            ?
-                PC_PM_ID: 3
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x17530642
-                TX_LANE_MAP: 0x35712460
-                RX_POLARITY_FLIP: 0xC2
-                TX_POLARITY_FLIP: 0x6A
-            ?
-                PC_PM_ID: 4
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x17530642
-                TX_LANE_MAP: 0x35712460
-                RX_POLARITY_FLIP: 0x9A
-                TX_POLARITY_FLIP: 0x3F
-            ?
-                PC_PM_ID: 2
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x17530642
-                TX_LANE_MAP: 0x16520743
-                RX_POLARITY_FLIP: 0x9A
-                TX_POLARITY_FLIP: 0xDE
-            ?
-                PC_PM_ID: 5
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x10762435
-                TX_LANE_MAP: 0x04153627
-                RX_POLARITY_FLIP: 0xCD
-                TX_POLARITY_FLIP: 0x2D
-            ?
-                PC_PM_ID: 7
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0x27
-                TX_POLARITY_FLIP: 0x6C
-            ?
-                PC_PM_ID: 8
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0xD8
-                TX_POLARITY_FLIP: 0x93
-            ?
-                PC_PM_ID: 6
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x62517043
-                RX_POLARITY_FLIP: 0xD8
-                TX_POLARITY_FLIP: 0xCD
-            ?
-                PC_PM_ID: 9
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x67205143
-                TX_LANE_MAP: 0x34071526
-                RX_POLARITY_FLIP: 0x4E
-                TX_POLARITY_FLIP: 0x6C
-            ?
-                PC_PM_ID: 11
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0x27
-                TX_POLARITY_FLIP: 0x6C
-            ?
-                PC_PM_ID: 12
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0xD8
-                TX_POLARITY_FLIP: 0x93
-            ?
-                PC_PM_ID: 10
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x62517043
-                RX_POLARITY_FLIP: 0xD8
-                TX_POLARITY_FLIP: 0xC9
-            ?
-                PC_PM_ID: 13
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x67205143
-                TX_LANE_MAP: 0x34071526
-                RX_POLARITY_FLIP: 0x4E
-                TX_POLARITY_FLIP: 0x6C
-            ?
-                PC_PM_ID: 15
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0x27
-                TX_POLARITY_FLIP: 0x6C
-            ?
-                PC_PM_ID: 16
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0xD8
-                TX_POLARITY_FLIP: 0x93
-            ?
-                PC_PM_ID: 14
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x62517043
-                RX_POLARITY_FLIP: 0xD8
-                TX_POLARITY_FLIP: 0xC9
-            ?
-                PC_PM_ID: 17
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x31670524
-                TX_LANE_MAP: 0x70634251
-                RX_POLARITY_FLIP: 0xDB
-                TX_POLARITY_FLIP: 0xD3
-            ?
-                PC_PM_ID: 19
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x72614053
-                RX_POLARITY_FLIP: 0xBD
-                TX_POLARITY_FLIP: 0x97
-            ?
-                PC_PM_ID: 20
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x72614053
-                RX_POLARITY_FLIP: 0x42
-                TX_POLARITY_FLIP: 0x68
-            ?
-                PC_PM_ID: 18
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x15243607
-                RX_POLARITY_FLIP: 0x42
-                TX_POLARITY_FLIP: 0x34
-            ?
-                PC_PM_ID: 21
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x31670524
-                TX_LANE_MAP: 0x70634251
-                RX_POLARITY_FLIP: 0xDB
-                TX_POLARITY_FLIP: 0xD3
-            ?
-                PC_PM_ID: 23
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x72614053
-                RX_POLARITY_FLIP: 0xBD
-                TX_POLARITY_FLIP: 0x97
-            ?
-                PC_PM_ID: 24
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x72614053
-                RX_POLARITY_FLIP: 0x42
-                TX_POLARITY_FLIP: 0x68
-            ?
-                PC_PM_ID: 22
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x15243607
-                RX_POLARITY_FLIP: 0x42
-                TX_POLARITY_FLIP: 0x34
-            ?
-                PC_PM_ID: 25
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x31670524
-                TX_LANE_MAP: 0x70634251
-                RX_POLARITY_FLIP: 0xDB
-                TX_POLARITY_FLIP: 0xD3
-            ?
-                PC_PM_ID: 27
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x72614053
-                RX_POLARITY_FLIP: 0xBD
-                TX_POLARITY_FLIP: 0x93
-            ?
-                PC_PM_ID: 28
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x20461537
-                TX_LANE_MAP: 0x51627340
-                RX_POLARITY_FLIP: 0x24
-                TX_POLARITY_FLIP: 0xC5
-            ?
-                PC_PM_ID: 26
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x15243607
-                RX_POLARITY_FLIP: 0x42
-                TX_POLARITY_FLIP: 0x34
-            ?
-                PC_PM_ID: 30
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x53174206
-                TX_LANE_MAP: 0x52164307
-                RX_POLARITY_FLIP: 0x3F
-                TX_POLARITY_FLIP: 0x74
-            ?
-                PC_PM_ID: 32
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x71356024
-                TX_LANE_MAP: 0x53174206
-                RX_POLARITY_FLIP: 0xCF
-                TX_POLARITY_FLIP: 0x65
-            ?
-                PC_PM_ID: 31
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x71356024
-                TX_LANE_MAP: 0x53174206
-                RX_POLARITY_FLIP: 0xCA
-                TX_POLARITY_FLIP: 0x3F
-            ?
-                PC_PM_ID: 29
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x71356024
-                TX_LANE_MAP: 0x70346125
-                RX_POLARITY_FLIP: 0xCA
-                TX_POLARITY_FLIP: 0xDE
-            ?
-                PC_PM_ID: 35
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x71356024
-                TX_LANE_MAP: 0x70346125
-                RX_POLARITY_FLIP: 0x30
-                TX_POLARITY_FLIP: 0xD1
-            ?
-                PC_PM_ID: 33
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x71356024
-                TX_LANE_MAP: 0x53174206
-                RX_POLARITY_FLIP: 0x30
-                TX_POLARITY_FLIP: 0x9A
-            ?
-                PC_PM_ID: 34
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x71356024
-                TX_LANE_MAP: 0x53174206
-                RX_POLARITY_FLIP: 0x35
-                TX_POLARITY_FLIP: 0xC0
-            ?
-                PC_PM_ID: 36
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x53174206
-                TX_LANE_MAP: 0x52164307
-                RX_POLARITY_FLIP: 0xCA
-                TX_POLARITY_FLIP: 0x84
-            ?
-                PC_PM_ID: 40
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x15243607
-                RX_POLARITY_FLIP: 0x42
-                TX_POLARITY_FLIP: 0x34
-            ?
-                PC_PM_ID: 38
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x72614053
-                RX_POLARITY_FLIP: 0x42
-                TX_POLARITY_FLIP: 0x6C
-            ?
-                PC_PM_ID: 37
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x20461537
-                TX_LANE_MAP: 0x51627340
-                RX_POLARITY_FLIP: 0xDB
-                TX_POLARITY_FLIP: 0x3A
-            ?
-                PC_PM_ID: 39
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x31670524
-                TX_LANE_MAP: 0x70634251
-                RX_POLARITY_FLIP: 0xDB
-                TX_POLARITY_FLIP: 0xD3
-            ?
-                PC_PM_ID: 44
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x15243607
-                RX_POLARITY_FLIP: 0x42
-                TX_POLARITY_FLIP: 0x34
-            ?
-                PC_PM_ID: 42
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x72614053
-                RX_POLARITY_FLIP: 0x42
-                TX_POLARITY_FLIP: 0x68
-            ?
-                PC_PM_ID: 41
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x72614053
-                RX_POLARITY_FLIP: 0xBD
-                TX_POLARITY_FLIP: 0x97
-            ?
-                PC_PM_ID: 43
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x31670524
-                TX_LANE_MAP: 0x70634251
-                RX_POLARITY_FLIP: 0xDB
-                TX_POLARITY_FLIP: 0xD3
-            ?
-                PC_PM_ID: 48
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x15243607
-                RX_POLARITY_FLIP: 0x42
-                TX_POLARITY_FLIP: 0x34
-            ?
-                PC_PM_ID: 46
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x72614053
-                RX_POLARITY_FLIP: 0x42
-                TX_POLARITY_FLIP: 0x68
-            ?
-                PC_PM_ID: 45
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76134250
-                TX_LANE_MAP: 0x72614053
-                RX_POLARITY_FLIP: 0xBD
-                TX_POLARITY_FLIP: 0x97
-            ?
-                PC_PM_ID: 47
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x31670524
-                TX_LANE_MAP: 0x70634251
-                RX_POLARITY_FLIP: 0xDB
-                TX_POLARITY_FLIP: 0xD3
-            ?
-                PC_PM_ID: 52
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x62517043
-                RX_POLARITY_FLIP: 0xD8
-                TX_POLARITY_FLIP: 0xC9
-            ?
-                PC_PM_ID: 50
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0xD8
-                TX_POLARITY_FLIP: 0x93
-            ?
-                PC_PM_ID: 49
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0x27
-                TX_POLARITY_FLIP: 0x6C
-            ?
-                PC_PM_ID: 51
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x67205143
-                TX_LANE_MAP: 0x34071526
-                RX_POLARITY_FLIP: 0x4E
-                TX_POLARITY_FLIP: 0x6C
-            ?
-                PC_PM_ID: 56
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x62517043
-                RX_POLARITY_FLIP: 0xD8
-                TX_POLARITY_FLIP: 0xC9
-            ?
-                PC_PM_ID: 54
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0xD8
-                TX_POLARITY_FLIP: 0x93
-            ?
-                PC_PM_ID: 53
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0x27
-                TX_POLARITY_FLIP: 0x6C
-            ?
-                PC_PM_ID: 55
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x67205143
-                TX_LANE_MAP: 0x34071526
-                RX_POLARITY_FLIP: 0x4E
-                TX_POLARITY_FLIP: 0x6C
-            ?
-                PC_PM_ID: 60
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x67015342
-                TX_LANE_MAP: 0x72635140
-                RX_POLARITY_FLIP: 0xC4
-                TX_POLARITY_FLIP: 0x4B
-            ?
-                PC_PM_ID: 58
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0xD8
-                TX_POLARITY_FLIP: 0x93
-            ?
-                PC_PM_ID: 57
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x02763415
-                TX_LANE_MAP: 0x35061427
-                RX_POLARITY_FLIP: 0x27
-                TX_POLARITY_FLIP: 0x6C
-            ?
-                PC_PM_ID: 59
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x67205143
-                TX_LANE_MAP: 0x34071526
-                RX_POLARITY_FLIP: 0x4E
-                TX_POLARITY_FLIP: 0x4C
-            ?
-                PC_PM_ID: 64
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x17530642
-                TX_LANE_MAP: 0x16520743
-                RX_POLARITY_FLIP: 0x3F
-                TX_POLARITY_FLIP: 0x8B
-            ?
-                PC_PM_ID: 62
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x17530642
-                TX_LANE_MAP: 0x35712460
-                RX_POLARITY_FLIP: 0x3D
-                TX_POLARITY_FLIP: 0x95
-            ?
-                PC_PM_ID: 61
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x17530642
-                TX_LANE_MAP: 0x35712460
-                RX_POLARITY_FLIP: 0x65
-                TX_POLARITY_FLIP: 0xC0
-            ?
-                PC_PM_ID: 63
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x35712460
-                TX_LANE_MAP: 0x34702561
-                RX_POLARITY_FLIP: 0x6A
-                TX_POLARITY_FLIP: 0x84
-            ?
-                PC_PM_ID: 65
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x3210
-                TX_LANE_MAP: 0x3210
-                RX_POLARITY_FLIP: 0x04
-                TX_POLARITY_FLIP: 0x00
-...
----
-device:
-    0:
-        PC_PORT_PHYS_MAP:
-            ?
-                # CPU port
-                PORT_ID: 0
-            :
-                PC_PHYS_PORT_ID: 0
-            ?
-                PORT_ID: 1
-            :
-                PC_PHYS_PORT_ID: 1
-            ?
-                PORT_ID: 2
-            :
-                PC_PHYS_PORT_ID: 9
-            ?
-                PORT_ID: 11
-            :
-                PC_PHYS_PORT_ID: 17
-            ?
-                PORT_ID: 12
-            :
-                PC_PHYS_PORT_ID: 25
-            ?
-                PORT_ID: 22
-            :
-                PC_PHYS_PORT_ID: 33
-            ?
-                PORT_ID: 23
-            :
-                PC_PHYS_PORT_ID: 41
-            ?
-                PORT_ID: 33
-            :
-                PC_PHYS_PORT_ID: 49
-            ?
-                PORT_ID: 34
-            :
-                PC_PHYS_PORT_ID: 57
-            ?
-                PORT_ID: 44
-            :
-                PC_PHYS_PORT_ID: 65
-            ?
-                PORT_ID: 45
-            :
-                PC_PHYS_PORT_ID: 73
-            ?
-                PORT_ID: 55
-            :
-                PC_PHYS_PORT_ID: 81
-            ?
-                PORT_ID: 56
-            :
-                PC_PHYS_PORT_ID: 89
-            ?
-                PORT_ID: 66
-            :
-                PC_PHYS_PORT_ID: 97
-            ?
-                PORT_ID: 67
-            :
-                PC_PHYS_PORT_ID: 105
-            ?
-                PORT_ID: 77
-            :
-                PC_PHYS_PORT_ID: 113
-            ?
-                PORT_ID: 78
-            :
-                PC_PHYS_PORT_ID: 121
-            ?
-                PORT_ID: 88
-            :
-                PC_PHYS_PORT_ID: 129
-            ?
-                PORT_ID: 89
-            :
-                PC_PHYS_PORT_ID: 137
-            ?
-                PORT_ID: 99
-            :
-                PC_PHYS_PORT_ID: 145
-            ?
-                PORT_ID: 100
-            :
-                PC_PHYS_PORT_ID: 153
-            ?
-                PORT_ID: 110
-            :
-                PC_PHYS_PORT_ID: 161
-            ?
-                PORT_ID: 111
-            :
-                PC_PHYS_PORT_ID: 169
-            ?
-                PORT_ID: 121
-            :
-                PC_PHYS_PORT_ID: 177
-            ?
-                PORT_ID: 122
-            :
-                PC_PHYS_PORT_ID: 185
-            ?
-                PORT_ID: 132
-            :
-                PC_PHYS_PORT_ID: 193
-            ?
-                PORT_ID: 133
-            :
-                PC_PHYS_PORT_ID: 201
-            ?
-                PORT_ID: 143
-            :
-                PC_PHYS_PORT_ID: 209
-            ?
-                PORT_ID: 144
-            :
-                PC_PHYS_PORT_ID: 217
-            ?
-                PORT_ID: 154
-            :
-                PC_PHYS_PORT_ID: 225
-            ?
-                PORT_ID: 155
-            :
-                PC_PHYS_PORT_ID: 233
-            ?
-                PORT_ID: 165
-            :
-                PC_PHYS_PORT_ID: 241
-            ?
-                PORT_ID: 166
-            :
-                PC_PHYS_PORT_ID: 249
-            ?
-                PORT_ID: 176
-            :
-                PC_PHYS_PORT_ID: 257
-            ?
-                PORT_ID: 177
-            :
-                PC_PHYS_PORT_ID: 265
-            ?
-                PORT_ID: 187
-            :
-                PC_PHYS_PORT_ID: 273
-            ?
-                PORT_ID: 188
-            :
-                PC_PHYS_PORT_ID: 281
-            ?
-                PORT_ID: 198
-            :
-                PC_PHYS_PORT_ID: 289
-            ?
-                PORT_ID: 199
-            :
-                PC_PHYS_PORT_ID: 297
-            ?
-                PORT_ID: 209
-            :
-                PC_PHYS_PORT_ID: 305
-            ?
-                PORT_ID: 210
-            :
-                PC_PHYS_PORT_ID: 313
-            ?
-                PORT_ID: 220
-            :
-                PC_PHYS_PORT_ID: 321
-            ?
-                PORT_ID: 221
-            :
-                PC_PHYS_PORT_ID: 329
-            ?
-                PORT_ID: 231
-            :
-                PC_PHYS_PORT_ID: 337
-            ?
-                PORT_ID: 232
-            :
-                PC_PHYS_PORT_ID: 345
-            ?
-                PORT_ID: 242
-            :
-                PC_PHYS_PORT_ID: 353
-            ?
-                PORT_ID: 243
-            :
-                PC_PHYS_PORT_ID: 361
-            ?
-                PORT_ID: 253
-            :
-                PC_PHYS_PORT_ID: 369
-            ?
-                PORT_ID: 254
-            :
-                PC_PHYS_PORT_ID: 377
-            ?
-                PORT_ID: 264
-            :
-                PC_PHYS_PORT_ID: 385
-            ?
-                PORT_ID: 265
-            :
-                PC_PHYS_PORT_ID: 393
-            ?
-                PORT_ID: 275
-            :
-                PC_PHYS_PORT_ID: 401
-            ?
-                PORT_ID: 276
-            :
-                PC_PHYS_PORT_ID: 409
-            ?
-                PORT_ID: 286
-            :
-                PC_PHYS_PORT_ID: 417
-            ?
-                PORT_ID: 287
-            :
-                PC_PHYS_PORT_ID: 425
-            ?
-                PORT_ID: 297
-            :
-                PC_PHYS_PORT_ID: 433
-            ?
-                PORT_ID: 298
-            :
-                PC_PHYS_PORT_ID: 441
-            ?
-                PORT_ID: 308
-            :
-                PC_PHYS_PORT_ID: 449
-            ?
-                PORT_ID: 309
-            :
-                PC_PHYS_PORT_ID: 457
-            ?
-                PORT_ID: 319
-            :
-                PC_PHYS_PORT_ID: 465
-            ?
-                PORT_ID: 320
-            :
-                PC_PHYS_PORT_ID: 473
-            ?
-                PORT_ID: 330
-            :
-                PC_PHYS_PORT_ID: 481
-            ?
-                PORT_ID: 331
-            :
-                PC_PHYS_PORT_ID: 489
-            ?
-                PORT_ID: 341
-            :
-                PC_PHYS_PORT_ID: 497
-            ?
-                PORT_ID: 342
-            :
-                PC_PHYS_PORT_ID: 505
-            # mgmt port
-            ?
-                PORT_ID: 186
-            :
-                PC_PHYS_PORT_ID: 516
-            ?
-                PORT_ID: 274
-            :
-                PC_PHYS_PORT_ID: 515
-...
----
-device:
-    0:
-        PC_PORT:
-            ?
-                PORT_ID: 0
-            :
-                &port_mode_10g
-                ENABLE: 1
-                SPEED: 10000
-                NUM_LANES: 1
-            ?
-                PORT_ID: [[1, 2],
-                          [11, 12],
-                          [22, 23],
-                          [33, 34],
-                          [44, 45],
-                          [55, 56],
-                          [66, 67],
-                          [77, 78],
-                          [88, 89],
-                          [99, 100],
-                          [110, 111],
-                          [121, 122],
-                          [132, 133],
-                          [143, 144],
-                          [154, 155],
-                          [165, 166],
-                          [176, 177],
-                          [187, 188],
-                          [198, 199],
-                          [209, 210],
-                          [220, 221],
-                          [231, 232],
-                          [242, 243],
-                          [253, 254],
-                          [264, 265],
-                          [275, 276],
-                          [286, 287],
-                          [297, 298],
-                          [308, 309],
-                          [319, 320],
-                          [330, 331],
-                          [341, 342]]
-            :
-                ENABLE: 0
-                SPEED: 400000
-                NUM_LANES: 4
-                FEC_MODE: PC_FEC_RS544_2XN
-                MAX_FRAME_SIZE: 9416
-                LINK_TRAINING: 0
-            ?
-                PORT_ID: [274, 186]
-            :
-                ENABLE: 0
-                SPEED: 10000
-                NUM_LANES: 1
-                MAX_FRAME_SIZE: 9416
-
-...
----
-bcm_device:
-    0:
-        global:
-            ftem_mem_entries: 65536
-...
----
-device:
-    0:
-        # Per pipe flex counter configuration
-        CTR_EFLEX_CONFIG:
-            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
-            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
-
-        # IFP mode
-        FP_CONFIG:
-            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
-...
----
-device:
-    0:
-        DEVICE_CONFIG:
-            AUTOLOAD_BOARD_SETTINGS: 0
-...
----
-device:
-    0:
-        TM_THD_CONFIG:
-            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
-...
----
-device:
-    0:
-        TM_ING_PORT_PRI_GRP:
-            ?
-                PORT_ID: [[1, 2],
-                          [11, 12],
-                          [22, 23],
-                          [33, 34],
-                          [44, 45],
-                          [55, 56],
-                          [66, 67],
-                          [77, 78],
-                          [88, 89],
-                          [99, 100],
-                          [110, 111],
-                          [121, 122],
-                          [132, 133],
-                          [143, 144],
-                          [154, 155],
-                          [165, 166],
-                          [176, 177],
-                          186,
-                          [187, 188],
-                          [198, 199],
-                          [209, 210],
-                          [220, 221],
-                          [231, 232],
-                          [242, 243],
-                          [253, 254],
-                          [264, 265],
-                          274,
-                          [275, 276],
-                          [286, 287],
-                          [297, 298],
-                          [308, 309],
-                          [319, 320],
-                          [330, 331],
-                          [341, 342]]
-                TM_PRI_GRP_ID: [3,4]
-            :
-                PFC: 1
-                LOSSLESS: 1
-...
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/h5_64dx800g.yml b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/h5_64dx800g.yml
new file mode 100644
index 00000000000..f9c011a77c9
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/h5_64dx800g.yml
@@ -0,0 +1,1250 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            default_cpu_tx_queue: 7
+            sai_l3_byte1_udf_disable: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x35712460
+                TX_LANE_MAP: 0x34702561
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x2E
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x35712460
+                RX_POLARITY_FLIP: 0xC2
+                TX_POLARITY_FLIP: 0x6A
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x35712460
+                RX_POLARITY_FLIP: 0x9A
+                TX_POLARITY_FLIP: 0x3F
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x16520743
+                RX_POLARITY_FLIP: 0x9A
+                TX_POLARITY_FLIP: 0xDE
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x10762435
+                TX_LANE_MAP: 0x04153627
+                RX_POLARITY_FLIP: 0xCD
+                TX_POLARITY_FLIP: 0x2D
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0xCD
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x34071526
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0xC9
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x34071526
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0xC9
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0xBD
+                TX_POLARITY_FLIP: 0x97
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0xBD
+                TX_POLARITY_FLIP: 0x97
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0xBD
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20461537
+                TX_LANE_MAP: 0x51627340
+                RX_POLARITY_FLIP: 0x24
+                TX_POLARITY_FLIP: 0xC5
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x53174206
+                TX_LANE_MAP: 0x52164307
+                RX_POLARITY_FLIP: 0x3F
+                TX_POLARITY_FLIP: 0x74
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x53174206
+                RX_POLARITY_FLIP: 0xCF
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x53174206
+                RX_POLARITY_FLIP: 0xCA
+                TX_POLARITY_FLIP: 0x3F
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x70346125
+                RX_POLARITY_FLIP: 0xCA
+                TX_POLARITY_FLIP: 0xDE
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x70346125
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0xD1
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x53174206
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x9A
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x53174206
+                RX_POLARITY_FLIP: 0x35
+                TX_POLARITY_FLIP: 0xC0
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x53174206
+                TX_LANE_MAP: 0x52164307
+                RX_POLARITY_FLIP: 0xCA
+                TX_POLARITY_FLIP: 0x84
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20461537
+                TX_LANE_MAP: 0x51627340
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0x3A
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0xBD
+                TX_POLARITY_FLIP: 0x97
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0xBD
+                TX_POLARITY_FLIP: 0x97
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0xC9
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x34071526
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0xC9
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x34071526
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67015342
+                TX_LANE_MAP: 0x72635140
+                RX_POLARITY_FLIP: 0xC4
+                TX_POLARITY_FLIP: 0x4B
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x34071526
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x4C
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x16520743
+                RX_POLARITY_FLIP: 0x3F
+                TX_POLARITY_FLIP: 0x8B
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x35712460
+                RX_POLARITY_FLIP: 0x3D
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x35712460
+                RX_POLARITY_FLIP: 0x65
+                TX_POLARITY_FLIP: 0xC0
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x35712460
+                TX_LANE_MAP: 0x34702561
+                RX_POLARITY_FLIP: 0x6A
+                TX_POLARITY_FLIP: 0x84
+            ?
+                PC_PM_ID: 65
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x3210
+                TX_LANE_MAP: 0x3210
+                RX_POLARITY_FLIP: 0x04
+                TX_POLARITY_FLIP: 0x00
+...
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                # CPU port
+                PORT_ID: 0
+            :
+                PC_PHYS_PORT_ID: 0
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 505
+            # mgmt port
+            ?
+                PORT_ID: 186
+            :
+                PC_PHYS_PORT_ID: 516
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 0
+            :
+                &port_mode_10g
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 177],
+                          [187, 188],
+                          [198, 199],
+                          [209, 210],
+                          [220, 221],
+                          [231, 232],
+                          [242, 243],
+                          [253, 254],
+                          [264, 265],
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+            :
+                ENABLE: 0
+                SPEED: 800000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+                LINK_TRAINING: 0
+            ?
+                PORT_ID: [274, 186]
+            :
+                ENABLE: 0
+                SPEED: 10000
+                NUM_LANES: 1
+                MAX_FRAME_SIZE: 9416
+
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration. Enable PPIU Mode
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 177],
+                          186,
+                          [187, 188],
+                          [198, 199],
+                          [209, 210],
+                          [220, 221],
+                          [231, 232],
+                          [242, 243],
+                          [253, 254],
+                          [264, 265],
+                          274,
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+...
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/hwsku.json b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/hwsku.json
index a186d539b50..cd39d0357da 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/hwsku.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/hwsku.json
@@ -1,196 +1,196 @@
 {
     "interfaces": {
         "Ethernet0": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet8": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet16": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet24": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet32": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet40": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet48": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet56": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet64": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet72": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet80": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet88": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet96": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet104": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet112": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet120": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet128": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet136": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet144": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet152": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet160": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet168": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet176": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet184": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet192": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet200": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet208": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet216": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet224": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet232": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet240": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet248": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet256": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet264": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet272": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet280": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet288": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet296": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet304": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet312": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet320": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet328": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet336": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet344": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet352": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet360": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet368": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet376": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet384": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet392": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet400": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet408": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet416": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet424": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet432": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet440": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet448": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet456": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet464": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet472": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet480": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet488": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet496": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet504": {
-            "default_brkout_mode": "1x400G"
+            "default_brkout_mode": "1x800G[400G]"
         },
         "Ethernet512": {
             "default_brkout_mode": "1x10G"
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/media_settings.json b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/media_settings.json
index 07e8f2f46dc..cb42811b973 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/media_settings.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/media_settings.json
@@ -2,7 +2,7 @@
   "PORT_MEDIA_SETTINGS": {
     "1": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -64,7 +64,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -130,7 +130,7 @@
     },
     "2": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -192,7 +192,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -258,7 +258,7 @@
     },
     "3": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -320,7 +320,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -386,7 +386,7 @@
     },
     "4": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -448,7 +448,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -514,7 +514,7 @@
     },
     "5": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -576,7 +576,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -642,7 +642,7 @@
     },
     "6": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -704,7 +704,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -770,7 +770,7 @@
     },
     "7": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -832,7 +832,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -898,7 +898,7 @@
     },
     "8": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -960,7 +960,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -1026,7 +1026,7 @@
     },
     "9": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -1088,7 +1088,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -1154,7 +1154,7 @@
     },
     "10": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -1216,7 +1216,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -1282,7 +1282,7 @@
     },
     "11": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -1344,7 +1344,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -1410,7 +1410,7 @@
     },
     "12": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -1472,7 +1472,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -1538,7 +1538,7 @@
     },
     "13": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -1600,7 +1600,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -1666,7 +1666,7 @@
     },
     "14": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -1728,7 +1728,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -1794,7 +1794,7 @@
     },
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@@ -1856,7 +1856,7 @@
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+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -1922,7 +1922,7 @@
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@@ -1984,7 +1984,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
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@@ -2050,7 +2050,7 @@
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@@ -2112,7 +2112,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -2178,7 +2178,7 @@
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@@ -2240,7 +2240,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
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@@ -2306,7 +2306,7 @@
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@@ -2368,7 +2368,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
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@@ -2434,7 +2434,7 @@
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@@ -2496,7 +2496,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -2562,7 +2562,7 @@
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@@ -2624,7 +2624,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
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@@ -2690,7 +2690,7 @@
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@@ -2752,7 +2752,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -2818,7 +2818,7 @@
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@@ -2880,7 +2880,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -2946,7 +2946,7 @@
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@@ -3008,7 +3008,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -3074,7 +3074,7 @@
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@@ -3136,7 +3136,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -3202,7 +3202,7 @@
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@@ -3264,7 +3264,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -3330,7 +3330,7 @@
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@@ -3392,7 +3392,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -3458,7 +3458,7 @@
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@@ -3520,7 +3520,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -3586,7 +3586,7 @@
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@@ -3648,7 +3648,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -3714,7 +3714,7 @@
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@@ -3776,7 +3776,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -3842,7 +3842,7 @@
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@@ -3904,7 +3904,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -3970,7 +3970,7 @@
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@@ -4032,7 +4032,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -4098,7 +4098,7 @@
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@@ -4160,7 +4160,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -4226,7 +4226,7 @@
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@@ -4288,7 +4288,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
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@@ -4354,7 +4354,7 @@
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@@ -4416,7 +4416,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
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@@ -4482,7 +4482,7 @@
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@@ -4544,7 +4544,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -4610,7 +4610,7 @@
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@@ -4672,7 +4672,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -4738,7 +4738,7 @@
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@@ -4800,7 +4800,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -4866,7 +4866,7 @@
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@@ -4928,7 +4928,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -4994,7 +4994,7 @@
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@@ -5056,7 +5056,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
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@@ -5122,7 +5122,7 @@
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@@ -5184,7 +5184,7 @@
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-        "speed:800GAUI-8|800G|100GAUI-1-L": {
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@@ -5250,7 +5250,7 @@
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@@ -5312,7 +5312,7 @@
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@@ -5378,7 +5378,7 @@
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@@ -5440,7 +5440,7 @@
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@@ -5506,7 +5506,7 @@
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@@ -5568,7 +5568,7 @@
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@@ -5634,7 +5634,7 @@
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@@ -5696,7 +5696,7 @@
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         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -5762,7 +5762,7 @@
     },
     "46": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x94",
             "lane1": "0x94",
@@ -5824,7 +5824,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -5890,7 +5890,7 @@
     },
     "47": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x94",
             "lane1": "0x94",
@@ -5952,7 +5952,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6018,7 +6018,7 @@
     },
     "48": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -6080,7 +6080,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6146,7 +6146,7 @@
     },
     "49": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -6208,7 +6208,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6274,7 +6274,7 @@
     },
     "50": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -6336,7 +6336,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6402,7 +6402,7 @@
     },
     "51": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6464,7 +6464,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6530,7 +6530,7 @@
     },
     "52": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6592,7 +6592,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6658,7 +6658,7 @@
     },
     "53": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6720,7 +6720,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6786,7 +6786,7 @@
     },
     "54": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6848,7 +6848,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6914,7 +6914,7 @@
     },
     "55": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -6976,7 +6976,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -7042,7 +7042,7 @@
     },
     "56": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -7104,7 +7104,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -7170,7 +7170,7 @@
     },
     "57": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -7232,7 +7232,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -7298,7 +7298,7 @@
     },
     "58": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -7360,7 +7360,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -7426,7 +7426,7 @@
     },
     "59": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -7488,7 +7488,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -7554,7 +7554,7 @@
     },
     "60": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x84",
             "lane1": "0x84",
@@ -7616,7 +7616,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -7682,7 +7682,7 @@
     },
     "61": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x84",
             "lane1": "0x84",
@@ -7744,7 +7744,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -7810,7 +7810,7 @@
     },
     "62": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x84",
             "lane1": "0x84",
@@ -7872,7 +7872,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x8C",
             "lane1": "0x8C",
@@ -7938,7 +7938,7 @@
     },
     "63": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x84",
             "lane1": "0x84",
@@ -8000,7 +8000,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -8066,7 +8066,7 @@
     },
     "64": {
       "Default": {
-        "speed:400GAUI-8|400G": {
+        "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
           "main": {
             "lane0": "0x84",
             "lane1": "0x84",
@@ -8128,7 +8128,7 @@
             "lane7": "0x0"
           }
         },
-        "speed:800GAUI-8|800G|100GAUI-1-L": {
+        "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
           "main": {
             "lane0": "0x88",
             "lane1": "0x88",
@@ -8191,50 +8191,6 @@
           }
         }
       }
-    },
-    "65": {
-      "Default": {
-        "main": {
-          "lane0": "0x11"
-        },
-        "post1": {
-          "lane0": "0x4"
-        },
-        "post2": {
-          "lane0": "0x0"
-        },
-        "post3": {
-          "lane0": "0x0"
-        },
-        "pre1": {
-          "lane0": "0x1"
-        },
-        "pre2": {
-          "lane0": "0x0"
-        }
-      }
-    },
-    "66": {
-      "Default": {
-        "main": {
-          "lane0": "0x11"
-        },
-        "post1": {
-          "lane0": "0x5"
-        },
-        "post2": {
-          "lane0": "0x0"
-        },
-        "post3": {
-          "lane0": "0x0"
-        },
-        "pre1": {
-          "lane0": "0x1"
-        },
-        "pre2": {
-          "lane0": "0x0"
-        }
-      }
     }
   }
-}
\ No newline at end of file
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/pg_profile_lookup.ini
index 4dc3bdd5d22..1ef8929259c 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/pg_profile_lookup.ini
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/pg_profile_lookup.ini
@@ -21,4 +21,4 @@
  100000  300m 1248    2288 268736  0        2288
  400000  300m 1248    2288 499618  0        2288
  800000  300m 1248    2288 929132  0        2288
- 
\ No newline at end of file
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/port_config.ini
index ce4a1069363..b1234fe77a6 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/port_config.ini
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/port_config.ini
@@ -1,67 +1,67 @@
 # name       lanes                            alias         index  speed   fec
-Ethernet0    1,2,3,4,5,6,7,8                  Ethernet1/1   1      400000  rs
-Ethernet8    17,18,19,20,21,22,23,24          Ethernet2/1   2      400000  rs
-Ethernet16   33,34,35,36,37,38,39,40          Ethernet3/1   3      400000  rs
-Ethernet24   49,50,51,52,53,54,55,56          Ethernet4/1   4      400000  rs
-Ethernet32   65,66,67,68,69,70,71,72          Ethernet5/1   5      400000  rs
-Ethernet40   81,82,83,84,85,86,87,88          Ethernet6/1   6      400000  rs
-Ethernet48   97,98,99,100,101,102,103,104     Ethernet7/1   7      400000  rs
-Ethernet56   113,114,115,116,117,118,119,120  Ethernet8/1   8      400000  rs
-Ethernet64   129,130,131,132,133,134,135,136  Ethernet9/1   9      400000  rs
-Ethernet72   145,146,147,148,149,150,151,152  Ethernet10/1  10     400000  rs
-Ethernet80   161,162,163,164,165,166,167,168  Ethernet11/1  11     400000  rs
-Ethernet88   177,178,179,180,181,182,183,184  Ethernet12/1  12     400000  rs
-Ethernet96   193,194,195,196,197,198,199,200  Ethernet13/1  13     400000  rs
-Ethernet104  209,210,211,212,213,214,215,216  Ethernet14/1  14     400000  rs
-Ethernet112  233,234,235,236,237,238,239,240  Ethernet15/1  15     400000  rs
-Ethernet120  249,250,251,252,253,254,255,256  Ethernet16/1  16     400000  rs
-Ethernet128  273,274,275,276,277,278,279,280  Ethernet17/1  17     400000  rs
-Ethernet136  257,258,259,260,261,262,263,264  Ethernet18/1  18     400000  rs
-Ethernet144  313,314,315,316,317,318,319,320  Ethernet19/1  19     400000  rs
-Ethernet152  297,298,299,300,301,302,303,304  Ethernet20/1  20     400000  rs
-Ethernet160  345,346,347,348,349,350,351,352  Ethernet21/1  21     400000  rs
-Ethernet168  329,330,331,332,333,334,335,336  Ethernet22/1  22     400000  rs
-Ethernet176  377,378,379,380,381,382,383,384  Ethernet23/1  23     400000  rs
-Ethernet184  361,362,363,364,365,366,367,368  Ethernet24/1  24     400000  rs
-Ethernet192  409,410,411,412,413,414,415,416  Ethernet25/1  25     400000  rs
-Ethernet200  393,394,395,396,397,398,399,400  Ethernet26/1  26     400000  rs
-Ethernet208  441,442,443,444,445,446,447,448  Ethernet27/1  27     400000  rs
-Ethernet216  425,426,427,428,429,430,431,432  Ethernet28/1  28     400000  rs
-Ethernet224  473,474,475,476,477,478,479,480  Ethernet29/1  29     400000  rs
-Ethernet232  457,458,459,460,461,462,463,464  Ethernet30/1  30     400000  rs
-Ethernet240  505,506,507,508,509,510,511,512  Ethernet31/1  31     400000  rs
-Ethernet248  489,490,491,492,493,494,495,496  Ethernet32/1  32     400000  rs
-Ethernet256  25,26,27,28,29,30,31,32          Ethernet33/1  33     400000  rs
-Ethernet264  9,10,11,12,13,14,15,16           Ethernet34/1  34     400000  rs
-Ethernet272  57,58,59,60,61,62,63,64          Ethernet35/1  35     400000  rs
-Ethernet280  41,42,43,44,45,46,47,48          Ethernet36/1  36     400000  rs
-Ethernet288  89,90,91,92,93,94,95,96          Ethernet37/1  37     400000  rs
-Ethernet296  73,74,75,76,77,78,79,80          Ethernet38/1  38     400000  rs
-Ethernet304  121,122,123,124,125,126,127,128  Ethernet39/1  39     400000  rs
-Ethernet312  105,106,107,108,109,110,111,112  Ethernet40/1  40     400000  rs
-Ethernet320  153,154,155,156,157,158,159,160  Ethernet41/1  41     400000  rs
-Ethernet328  137,138,139,140,141,142,143,144  Ethernet42/1  42     400000  rs
-Ethernet336  185,186,187,188,189,190,191,192  Ethernet43/1  43     400000  rs
-Ethernet344  169,170,171,172,173,174,175,176  Ethernet44/1  44     400000  rs
-Ethernet352  217,218,219,220,221,222,223,224  Ethernet45/1  45     400000  rs
-Ethernet360  201,202,203,204,205,206,207,208  Ethernet46/1  46     400000  rs
-Ethernet368  241,242,243,244,245,246,247,248  Ethernet47/1  47     400000  rs
-Ethernet376  225,226,227,228,229,230,231,232  Ethernet48/1  48     400000  rs
-Ethernet384  265,266,267,268,269,270,271,272  Ethernet49/1  49     400000  rs
-Ethernet392  281,282,283,284,285,286,287,288  Ethernet50/1  50     400000  rs
-Ethernet400  289,290,291,292,293,294,295,296  Ethernet51/1  51     400000  rs
-Ethernet408  305,306,307,308,309,310,311,312  Ethernet52/1  52     400000  rs
-Ethernet416  321,322,323,324,325,326,327,328  Ethernet53/1  53     400000  rs
-Ethernet424  337,338,339,340,341,342,343,344  Ethernet54/1  54     400000  rs
-Ethernet432  353,354,355,356,357,358,359,360  Ethernet55/1  55     400000  rs
-Ethernet440  369,370,371,372,373,374,375,376  Ethernet56/1  56     400000  rs
-Ethernet448  385,386,387,388,389,390,391,392  Ethernet57/1  57     400000  rs
-Ethernet456  401,402,403,404,405,406,407,408  Ethernet58/1  58     400000  rs
-Ethernet464  417,418,419,420,421,422,423,424  Ethernet59/1  59     400000  rs
-Ethernet472  433,434,435,436,437,438,439,440  Ethernet60/1  60     400000  rs
-Ethernet480  449,450,451,452,453,454,455,456  Ethernet61/1  61     400000  rs
-Ethernet488  465,466,467,468,469,470,471,472  Ethernet62/1  62     400000  rs
-Ethernet496  481,482,483,484,485,486,487,488  Ethernet63/1  63     400000  rs
-Ethernet504  497,498,499,500,501,502,503,504  Ethernet64/1  64     400000  rs
+Ethernet0    1,2,3,4,5,6,7,8                  Ethernet1/1   1      800000  rs
+Ethernet8    17,18,19,20,21,22,23,24          Ethernet2/1   2      800000  rs
+Ethernet16   33,34,35,36,37,38,39,40          Ethernet3/1   3      800000  rs
+Ethernet24   49,50,51,52,53,54,55,56          Ethernet4/1   4      800000  rs
+Ethernet32   65,66,67,68,69,70,71,72          Ethernet5/1   5      800000  rs
+Ethernet40   81,82,83,84,85,86,87,88          Ethernet6/1   6      800000  rs
+Ethernet48   97,98,99,100,101,102,103,104     Ethernet7/1   7      800000  rs
+Ethernet56   113,114,115,116,117,118,119,120  Ethernet8/1   8      800000  rs
+Ethernet64   129,130,131,132,133,134,135,136  Ethernet9/1   9      800000  rs
+Ethernet72   145,146,147,148,149,150,151,152  Ethernet10/1  10     800000  rs
+Ethernet80   161,162,163,164,165,166,167,168  Ethernet11/1  11     800000  rs
+Ethernet88   177,178,179,180,181,182,183,184  Ethernet12/1  12     800000  rs
+Ethernet96   193,194,195,196,197,198,199,200  Ethernet13/1  13     800000  rs
+Ethernet104  209,210,211,212,213,214,215,216  Ethernet14/1  14     800000  rs
+Ethernet112  233,234,235,236,237,238,239,240  Ethernet15/1  15     800000  rs
+Ethernet120  249,250,251,252,253,254,255,256  Ethernet16/1  16     800000  rs
+Ethernet128  273,274,275,276,277,278,279,280  Ethernet17/1  17     800000  rs
+Ethernet136  257,258,259,260,261,262,263,264  Ethernet18/1  18     800000  rs
+Ethernet144  313,314,315,316,317,318,319,320  Ethernet19/1  19     800000  rs
+Ethernet152  297,298,299,300,301,302,303,304  Ethernet20/1  20     800000  rs
+Ethernet160  345,346,347,348,349,350,351,352  Ethernet21/1  21     800000  rs
+Ethernet168  329,330,331,332,333,334,335,336  Ethernet22/1  22     800000  rs
+Ethernet176  377,378,379,380,381,382,383,384  Ethernet23/1  23     800000  rs
+Ethernet184  361,362,363,364,365,366,367,368  Ethernet24/1  24     800000  rs
+Ethernet192  409,410,411,412,413,414,415,416  Ethernet25/1  25     800000  rs
+Ethernet200  393,394,395,396,397,398,399,400  Ethernet26/1  26     800000  rs
+Ethernet208  441,442,443,444,445,446,447,448  Ethernet27/1  27     800000  rs
+Ethernet216  425,426,427,428,429,430,431,432  Ethernet28/1  28     800000  rs
+Ethernet224  473,474,475,476,477,478,479,480  Ethernet29/1  29     800000  rs
+Ethernet232  457,458,459,460,461,462,463,464  Ethernet30/1  30     800000  rs
+Ethernet240  505,506,507,508,509,510,511,512  Ethernet31/1  31     800000  rs
+Ethernet248  489,490,491,492,493,494,495,496  Ethernet32/1  32     800000  rs
+Ethernet256  25,26,27,28,29,30,31,32          Ethernet33/1  33     800000  rs
+Ethernet264  9,10,11,12,13,14,15,16           Ethernet34/1  34     800000  rs
+Ethernet272  57,58,59,60,61,62,63,64          Ethernet35/1  35     800000  rs
+Ethernet280  41,42,43,44,45,46,47,48          Ethernet36/1  36     800000  rs
+Ethernet288  89,90,91,92,93,94,95,96          Ethernet37/1  37     800000  rs
+Ethernet296  73,74,75,76,77,78,79,80          Ethernet38/1  38     800000  rs
+Ethernet304  121,122,123,124,125,126,127,128  Ethernet39/1  39     800000  rs
+Ethernet312  105,106,107,108,109,110,111,112  Ethernet40/1  40     800000  rs
+Ethernet320  153,154,155,156,157,158,159,160  Ethernet41/1  41     800000  rs
+Ethernet328  137,138,139,140,141,142,143,144  Ethernet42/1  42     800000  rs
+Ethernet336  185,186,187,188,189,190,191,192  Ethernet43/1  43     800000  rs
+Ethernet344  169,170,171,172,173,174,175,176  Ethernet44/1  44     800000  rs
+Ethernet352  217,218,219,220,221,222,223,224  Ethernet45/1  45     800000  rs
+Ethernet360  201,202,203,204,205,206,207,208  Ethernet46/1  46     800000  rs
+Ethernet368  241,242,243,244,245,246,247,248  Ethernet47/1  47     800000  rs
+Ethernet376  225,226,227,228,229,230,231,232  Ethernet48/1  48     800000  rs
+Ethernet384  265,266,267,268,269,270,271,272  Ethernet49/1  49     800000  rs
+Ethernet392  281,282,283,284,285,286,287,288  Ethernet50/1  50     800000  rs
+Ethernet400  289,290,291,292,293,294,295,296  Ethernet51/1  51     800000  rs
+Ethernet408  305,306,307,308,309,310,311,312  Ethernet52/1  52     800000  rs
+Ethernet416  321,322,323,324,325,326,327,328  Ethernet53/1  53     800000  rs
+Ethernet424  337,338,339,340,341,342,343,344  Ethernet54/1  54     800000  rs
+Ethernet432  353,354,355,356,357,358,359,360  Ethernet55/1  55     800000  rs
+Ethernet440  369,370,371,372,373,374,375,376  Ethernet56/1  56     800000  rs
+Ethernet448  385,386,387,388,389,390,391,392  Ethernet57/1  57     800000  rs
+Ethernet456  401,402,403,404,405,406,407,408  Ethernet58/1  58     800000  rs
+Ethernet464  417,418,419,420,421,422,423,424  Ethernet59/1  59     800000  rs
+Ethernet472  433,434,435,436,437,438,439,440  Ethernet60/1  60     800000  rs
+Ethernet480  449,450,451,452,453,454,455,456  Ethernet61/1  61     800000  rs
+Ethernet488  465,466,467,468,469,470,471,472  Ethernet62/1  62     800000  rs
+Ethernet496  481,482,483,484,485,486,487,488  Ethernet63/1  63     800000  rs
+Ethernet504  497,498,499,500,501,502,503,504  Ethernet64/1  64     800000  rs
 Ethernet512  515                              Ethernet65    65     10000   none
 Ethernet513  516                              Ethernet66    66     10000   none
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/sai.profile b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/sai.profile
index dbdfc2c4791..6063c128528 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/sai.profile
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/sai.profile
@@ -1 +1 @@
-SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/h5_64dx400g.yml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/h5_64dx800g.yml
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/installer.conf
index e69de29bb2d..7d070a40bb2 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/installer.conf
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tpm_tis.interrupts=0"
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
index 4870d494c9c..dd8fc654acf 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
@@ -482,6 +482,9 @@
                 "1x400G": [
                     "Ethernet1/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet1/1"
+                ],
                 "2x400G": [
                     "Ethernet1/1",
                     "Ethernet1/5"
@@ -514,6 +517,9 @@
                 "1x400G": [
                     "Ethernet2/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet2/1"
+                ],
                 "2x400G": [
                     "Ethernet2/1",
                     "Ethernet2/5"
@@ -546,6 +552,9 @@
                 "1x400G": [
                     "Ethernet3/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet3/1"
+                ],
                 "2x400G": [
                     "Ethernet3/1",
                     "Ethernet3/5"
@@ -578,6 +587,9 @@
                 "1x400G": [
                     "Ethernet4/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet4/1"
+                ],
                 "2x400G": [
                     "Ethernet4/1",
                     "Ethernet4/5"
@@ -610,6 +622,9 @@
                 "1x400G": [
                     "Ethernet5/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet5/1"
+                ],
                 "2x400G": [
                     "Ethernet5/1",
                     "Ethernet5/5"
@@ -642,6 +657,9 @@
                 "1x400G": [
                     "Ethernet6/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet6/1"
+                ],
                 "2x400G": [
                     "Ethernet6/1",
                     "Ethernet6/5"
@@ -674,6 +692,9 @@
                 "1x400G": [
                     "Ethernet7/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet7/1"
+                ],
                 "2x400G": [
                     "Ethernet7/1",
                     "Ethernet7/5"
@@ -706,6 +727,9 @@
                 "1x400G": [
                     "Ethernet8/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet8/1"
+                ],
                 "2x400G": [
                     "Ethernet8/1",
                     "Ethernet8/5"
@@ -738,6 +762,9 @@
                 "1x400G": [
                     "Ethernet9/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet9/1"
+                ],
                 "2x400G": [
                     "Ethernet9/1",
                     "Ethernet9/5"
@@ -770,6 +797,9 @@
                 "1x400G": [
                     "Ethernet10/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet10/1"
+                ],
                 "2x400G": [
                     "Ethernet10/1",
                     "Ethernet10/5"
@@ -802,6 +832,9 @@
                 "1x400G": [
                     "Ethernet11/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet11/1"
+                ],
                 "2x400G": [
                     "Ethernet11/1",
                     "Ethernet11/5"
@@ -834,6 +867,9 @@
                 "1x400G": [
                     "Ethernet12/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet12/1"
+                ],
                 "2x400G": [
                     "Ethernet12/1",
                     "Ethernet12/5"
@@ -866,6 +902,9 @@
                 "1x400G": [
                     "Ethernet13/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet13/1"
+                ],
                 "2x400G": [
                     "Ethernet13/1",
                     "Ethernet13/5"
@@ -898,6 +937,9 @@
                 "1x400G": [
                     "Ethernet14/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet14/1"
+                ],
                 "2x400G": [
                     "Ethernet14/1",
                     "Ethernet14/5"
@@ -930,6 +972,9 @@
                 "1x400G": [
                     "Ethernet15/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet15/1"
+                ],
                 "2x400G": [
                     "Ethernet15/1",
                     "Ethernet15/5"
@@ -962,6 +1007,9 @@
                 "1x400G": [
                     "Ethernet16/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet16/1"
+                ],
                 "2x400G": [
                     "Ethernet16/1",
                     "Ethernet16/5"
@@ -994,6 +1042,9 @@
                 "1x400G": [
                     "Ethernet17/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet17/1"
+                ],
                 "2x400G": [
                     "Ethernet17/1",
                     "Ethernet17/5"
@@ -1026,6 +1077,9 @@
                 "1x400G": [
                     "Ethernet18/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet18/1"
+                ],
                 "2x400G": [
                     "Ethernet18/1",
                     "Ethernet18/5"
@@ -1058,6 +1112,9 @@
                 "1x400G": [
                     "Ethernet19/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet19/1"
+                ],
                 "2x400G": [
                     "Ethernet19/1",
                     "Ethernet19/5"
@@ -1090,6 +1147,9 @@
                 "1x400G": [
                     "Ethernet20/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet20/1"
+                ],
                 "2x400G": [
                     "Ethernet20/1",
                     "Ethernet20/5"
@@ -1122,6 +1182,9 @@
                 "1x400G": [
                     "Ethernet21/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet21/1"
+                ],
                 "2x400G": [
                     "Ethernet21/1",
                     "Ethernet21/5"
@@ -1154,6 +1217,9 @@
                 "1x400G": [
                     "Ethernet22/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet22/1"
+                ],
                 "2x400G": [
                     "Ethernet22/1",
                     "Ethernet22/5"
@@ -1186,6 +1252,9 @@
                 "1x400G": [
                     "Ethernet23/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet23/1"
+                ],
                 "2x400G": [
                     "Ethernet23/1",
                     "Ethernet23/5"
@@ -1218,6 +1287,9 @@
                 "1x400G": [
                     "Ethernet24/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet24/1"
+                ],
                 "2x400G": [
                     "Ethernet24/1",
                     "Ethernet24/5"
@@ -1250,6 +1322,9 @@
                 "1x400G": [
                     "Ethernet25/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet25/1"
+                ],
                 "2x400G": [
                     "Ethernet25/1",
                     "Ethernet25/5"
@@ -1282,6 +1357,9 @@
                 "1x400G": [
                     "Ethernet26/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet26/1"
+                ],
                 "2x400G": [
                     "Ethernet26/1",
                     "Ethernet26/5"
@@ -1314,6 +1392,9 @@
                 "1x400G": [
                     "Ethernet27/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet27/1"
+                ],
                 "2x400G": [
                     "Ethernet27/1",
                     "Ethernet27/5"
@@ -1346,6 +1427,9 @@
                 "1x400G": [
                     "Ethernet28/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet28/1"
+                ],
                 "2x400G": [
                     "Ethernet28/1",
                     "Ethernet28/5"
@@ -1378,6 +1462,9 @@
                 "1x400G": [
                     "Ethernet29/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet29/1"
+                ],
                 "2x400G": [
                     "Ethernet29/1",
                     "Ethernet29/5"
@@ -1410,6 +1497,9 @@
                 "1x400G": [
                     "Ethernet30/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet30/1"
+                ],
                 "2x400G": [
                     "Ethernet30/1",
                     "Ethernet30/5"
@@ -1442,6 +1532,9 @@
                 "1x400G": [
                     "Ethernet31/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet31/1"
+                ],
                 "2x400G": [
                     "Ethernet31/1",
                     "Ethernet31/5"
@@ -1474,6 +1567,9 @@
                 "1x400G": [
                     "Ethernet32/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet32/1"
+                ],
                 "2x400G": [
                     "Ethernet32/1",
                     "Ethernet32/5"
@@ -1506,6 +1602,9 @@
                 "1x400G": [
                     "Ethernet33/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet33/1"
+                ],
                 "2x400G": [
                     "Ethernet33/1",
                     "Ethernet33/5"
@@ -1538,6 +1637,9 @@
                 "1x400G": [
                     "Ethernet34/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet34/1"
+                ],
                 "2x400G": [
                     "Ethernet34/1",
                     "Ethernet34/5"
@@ -1570,6 +1672,9 @@
                 "1x400G": [
                     "Ethernet35/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet35/1"
+                ],
                 "2x400G": [
                     "Ethernet35/1",
                     "Ethernet35/5"
@@ -1602,6 +1707,9 @@
                 "1x400G": [
                     "Ethernet36/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet36/1"
+                ],
                 "2x400G": [
                     "Ethernet36/1",
                     "Ethernet36/5"
@@ -1634,6 +1742,9 @@
                 "1x400G": [
                     "Ethernet37/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet37/1"
+                ],
                 "2x400G": [
                     "Ethernet37/1",
                     "Ethernet37/5"
@@ -1666,6 +1777,9 @@
                 "1x400G": [
                     "Ethernet38/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet38/1"
+                ],
                 "2x400G": [
                     "Ethernet38/1",
                     "Ethernet38/5"
@@ -1698,6 +1812,9 @@
                 "1x400G": [
                     "Ethernet39/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet39/1"
+                ],
                 "2x400G": [
                     "Ethernet39/1",
                     "Ethernet39/5"
@@ -1730,6 +1847,9 @@
                 "1x400G": [
                     "Ethernet40/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet40/1"
+                ],
                 "2x400G": [
                     "Ethernet40/1",
                     "Ethernet40/5"
@@ -1762,6 +1882,9 @@
                 "1x400G": [
                     "Ethernet41/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet41/1"
+                ],
                 "2x400G": [
                     "Ethernet41/1",
                     "Ethernet41/5"
@@ -1794,6 +1917,9 @@
                 "1x400G": [
                     "Ethernet42/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet42/1"
+                ],
                 "2x400G": [
                     "Ethernet42/1",
                     "Ethernet42/5"
@@ -1826,6 +1952,9 @@
                 "1x400G": [
                     "Ethernet43/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet43/1"
+                ],
                 "2x400G": [
                     "Ethernet43/1",
                     "Ethernet43/5"
@@ -1858,6 +1987,9 @@
                 "1x400G": [
                     "Ethernet44/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet44/1"
+                ],
                 "2x400G": [
                     "Ethernet44/1",
                     "Ethernet44/5"
@@ -1890,6 +2022,9 @@
                 "1x400G": [
                     "Ethernet45/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet45/1"
+                ],
                 "2x400G": [
                     "Ethernet45/1",
                     "Ethernet45/5"
@@ -1922,6 +2057,9 @@
                 "1x400G": [
                     "Ethernet46/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet46/1"
+                ],
                 "2x400G": [
                     "Ethernet46/1",
                     "Ethernet46/5"
@@ -1954,6 +2092,9 @@
                 "1x400G": [
                     "Ethernet47/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet47/1"
+                ],
                 "2x400G": [
                     "Ethernet47/1",
                     "Ethernet47/5"
@@ -1986,6 +2127,9 @@
                 "1x400G": [
                     "Ethernet48/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet48/1"
+                ],
                 "2x400G": [
                     "Ethernet48/1",
                     "Ethernet48/5"
@@ -2018,6 +2162,9 @@
                 "1x400G": [
                     "Ethernet49/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet49/1"
+                ],
                 "2x400G": [
                     "Ethernet49/1",
                     "Ethernet49/5"
@@ -2050,6 +2197,9 @@
                 "1x400G": [
                     "Ethernet50/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet50/1"
+                ],
                 "2x400G": [
                     "Ethernet50/1",
                     "Ethernet50/5"
@@ -2082,6 +2232,9 @@
                 "1x400G": [
                     "Ethernet51/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet51/1"
+                ],
                 "2x400G": [
                     "Ethernet51/1",
                     "Ethernet51/5"
@@ -2114,6 +2267,9 @@
                 "1x400G": [
                     "Ethernet52/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet52/1"
+                ],
                 "2x400G": [
                     "Ethernet52/1",
                     "Ethernet52/5"
@@ -2146,6 +2302,9 @@
                 "1x400G": [
                     "Ethernet53/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet53/1"
+                ],
                 "2x400G": [
                     "Ethernet53/1",
                     "Ethernet53/5"
@@ -2178,6 +2337,9 @@
                 "1x400G": [
                     "Ethernet54/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet54/1"
+                ],
                 "2x400G": [
                     "Ethernet54/1",
                     "Ethernet54/5"
@@ -2210,6 +2372,9 @@
                 "1x400G": [
                     "Ethernet55/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet55/1"
+                ],
                 "2x400G": [
                     "Ethernet55/1",
                     "Ethernet55/5"
@@ -2242,6 +2407,9 @@
                 "1x400G": [
                     "Ethernet56/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet56/1"
+                ],
                 "2x400G": [
                     "Ethernet56/1",
                     "Ethernet56/5"
@@ -2274,6 +2442,9 @@
                 "1x400G": [
                     "Ethernet57/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet57/1"
+                ],
                 "2x400G": [
                     "Ethernet57/1",
                     "Ethernet57/5"
@@ -2306,6 +2477,9 @@
                 "1x400G": [
                     "Ethernet58/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet58/1"
+                ],
                 "2x400G": [
                     "Ethernet58/1",
                     "Ethernet58/5"
@@ -2338,6 +2512,9 @@
                 "1x400G": [
                     "Ethernet59/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet59/1"
+                ],
                 "2x400G": [
                     "Ethernet59/1",
                     "Ethernet59/5"
@@ -2370,6 +2547,9 @@
                 "1x400G": [
                     "Ethernet60/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet60/1"
+                ],
                 "2x400G": [
                     "Ethernet60/1",
                     "Ethernet60/5"
@@ -2402,6 +2582,9 @@
                 "1x400G": [
                     "Ethernet61/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet61/1"
+                ],
                 "2x400G": [
                     "Ethernet61/1",
                     "Ethernet61/5"
@@ -2434,6 +2617,9 @@
                 "1x400G": [
                     "Ethernet62/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet62/1"
+                ],
                 "2x400G": [
                     "Ethernet62/1",
                     "Ethernet62/5"
@@ -2466,6 +2652,9 @@
                 "1x400G": [
                     "Ethernet63/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet63/1"
+                ],
                 "2x400G": [
                     "Ethernet63/1",
                     "Ethernet63/5"
@@ -2498,6 +2687,9 @@
                 "1x400G": [
                     "Ethernet64/1"
                 ],
+                "1x100G(4)": [
+                    "Ethernet64/1"
+                ],
                 "2x400G": [
                     "Ethernet64/1",
                     "Ethernet64/5"
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform_reboot b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform_reboot
index 836a11ed835..06fba6c414e 100755
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform_reboot
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform_reboot
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-dd=$(date "+%y%m%d%H%M%S")
+dd=$(date -u "+%y%m%d%H%M%S")
 i2cset -y 0 0x68 0x03 0x${dd:10:2}
 i2cset -y 0 0x68 0x04 0x${dd:8:2}
 i2cset -y 0 0x68 0x05 0x${dd:6:2}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/thermal_policy.json
index 1d0926914f8..28d5cc190bd 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/thermal_policy.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/thermal_policy.json
@@ -29,7 +29,7 @@
                 },
                 {
                     "type": "fan.all.set_speed",
-                    "speed": "90"
+                    "speed": "100"
                 }
             ]
         },
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffer_ports.j2 b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffer_ports.j2
new file mode 100755
index 00000000000..25a254905a5
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffer_ports.j2
@@ -0,0 +1,7 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+    {% if PORT_ALL.append("Ethernet513") %}{% endif %}
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffers.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffers.json.j2
new file mode 100755
index 00000000000..0b1cb2c541b
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffers_defaults_t0.j2 b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffers_defaults_t0.j2
new file mode 100755
index 00000000000..e28dd965a51
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "161176208",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "29520896"
+        },
+        "egress_lossless_pool": {
+            "size": "161176208",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-1"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-4"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffers_defaults_t1.j2 b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffers_defaults_t1.j2
new file mode 100755
index 00000000000..e28dd965a51
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "161176208",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "29520896"
+        },
+        "egress_lossless_pool": {
+            "size": "161176208",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-1"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-4"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/h5_64o.yml b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/h5_64o.yml
new file mode 100644
index 00000000000..07ae132146b
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/h5_64o.yml
@@ -0,0 +1,1238 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            default_cpu_tx_queue: 7
+            sai_l3_byte1_udf_disable: 1
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x30217465
+                TX_LANE_MAP: 0x67452301
+                RX_POLARITY_FLIP: 0xE7
+                TX_POLARITY_FLIP: 0x27
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x03124756
+                TX_LANE_MAP: 0x65742301
+                RX_POLARITY_FLIP: 0xC2
+                TX_POLARITY_FLIP: 0x97
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x12037654
+                TX_LANE_MAP: 0x74653021
+                RX_POLARITY_FLIP: 0x0E
+                TX_POLARITY_FLIP: 0x3A
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x47560312
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x24
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15267430
+                TX_LANE_MAP: 0x21463057
+                RX_POLARITY_FLIP: 0x1A
+                TX_POLARITY_FLIP: 0xA6
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36051274
+                TX_LANE_MAP: 0x25041376
+                RX_POLARITY_FLIP: 0xF5
+                TX_POLARITY_FLIP: 0x07
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x05362471
+                TX_LANE_MAP: 0x04253716
+                RX_POLARITY_FLIP: 0x07
+                TX_POLARITY_FLIP: 0xF0
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x65032471
+                TX_LANE_MAP: 0x40527361
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xA1
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x63502147
+                TX_LANE_MAP: 0x20451376
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x87
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36051274
+                TX_LANE_MAP: 0x25041376
+                RX_POLARITY_FLIP: 0xF5
+                TX_POLARITY_FLIP: 0x07
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x05362471
+                TX_LANE_MAP: 0x04253716
+                RX_POLARITY_FLIP: 0x07
+                TX_POLARITY_FLIP: 0xF0
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x65032471
+                TX_LANE_MAP: 0x40527361
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xE1
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x63502147
+                TX_LANE_MAP: 0x20451376
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x87
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36051274
+                TX_LANE_MAP: 0x25041376
+                RX_POLARITY_FLIP: 0xF5
+                TX_POLARITY_FLIP: 0x07
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x05362471
+                TX_LANE_MAP: 0x04253716
+                RX_POLARITY_FLIP: 0x07
+                TX_POLARITY_FLIP: 0xF0
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x65032471
+                TX_LANE_MAP: 0x40527361
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xE1
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x34076521
+                TX_LANE_MAP: 0x56024731
+                RX_POLARITY_FLIP: 0x0C
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43705612
+                TX_LANE_MAP: 0x52604731
+                RX_POLARITY_FLIP: 0x1D
+                TX_POLARITY_FLIP: 0xE8
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70436215
+                TX_LANE_MAP: 0x60527341
+                RX_POLARITY_FLIP: 0xB6
+                TX_POLARITY_FLIP: 0x4F
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x30746215
+                TX_LANE_MAP: 0x06253714
+                RX_POLARITY_FLIP: 0xF6
+                TX_POLARITY_FLIP: 0x9E
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x34076521
+                TX_LANE_MAP: 0x56024731
+                RX_POLARITY_FLIP: 0x0C
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43705612
+                TX_LANE_MAP: 0x52604731
+                RX_POLARITY_FLIP: 0x1D
+                TX_POLARITY_FLIP: 0xE8
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70436215
+                TX_LANE_MAP: 0x60527341
+                RX_POLARITY_FLIP: 0xB6
+                TX_POLARITY_FLIP: 0x4F
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x30746215
+                TX_LANE_MAP: 0x06253714
+                RX_POLARITY_FLIP: 0xF6
+                TX_POLARITY_FLIP: 0x9E
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x34076521
+                TX_LANE_MAP: 0x56024731
+                RX_POLARITY_FLIP: 0x0C
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43705612
+                TX_LANE_MAP: 0x52604731
+                RX_POLARITY_FLIP: 0x1D
+                TX_POLARITY_FLIP: 0xF8
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x27160543
+                TX_LANE_MAP: 0x63415072
+                RX_POLARITY_FLIP: 0xB9
+                TX_POLARITY_FLIP: 0x81
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x30746215
+                TX_LANE_MAP: 0x06253714
+                RX_POLARITY_FLIP: 0xF6
+                TX_POLARITY_FLIP: 0x9E
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x56471203
+                TX_LANE_MAP: 0x01234567
+                RX_POLARITY_FLIP: 0x81
+                TX_POLARITY_FLIP: 0x8D
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x65742130
+                TX_LANE_MAP: 0x03124567
+                RX_POLARITY_FLIP: 0x53
+                TX_POLARITY_FLIP: 0x0D
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x74651032
+                TX_LANE_MAP: 0x12035647
+                RX_POLARITY_FLIP: 0x16
+                TX_POLARITY_FLIP: 0x3A
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x21306574
+                RX_POLARITY_FLIP: 0xC6
+                TX_POLARITY_FLIP: 0x24
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x74653021
+                TX_LANE_MAP: 0x23016745
+                RX_POLARITY_FLIP: 0xE7
+                TX_POLARITY_FLIP: 0xD8
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x47560312
+                TX_LANE_MAP: 0x21306745
+                RX_POLARITY_FLIP: 0xCA
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x56473210
+                TX_LANE_MAP: 0x30217465
+                RX_POLARITY_FLIP: 0x16
+                TX_POLARITY_FLIP: 0x5C
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76543210
+                TX_LANE_MAP: 0x03124756
+                RX_POLARITY_FLIP: 0xC6
+                TX_POLARITY_FLIP: 0xBD
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70431256
+                TX_LANE_MAP: 0x02563147
+                RX_POLARITY_FLIP: 0xFC
+                TX_POLARITY_FLIP: 0x2D
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x07342165
+                TX_LANE_MAP: 0x06253147
+                RX_POLARITY_FLIP: 0xED
+                TX_POLARITY_FLIP: 0x1D
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x34071562
+                TX_LANE_MAP: 0x25061437
+                RX_POLARITY_FLIP: 0x46
+                TX_POLARITY_FLIP: 0xB6
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x21674305
+                TX_LANE_MAP: 0x41637250
+                RX_POLARITY_FLIP: 0x09
+                TX_POLARITY_FLIP: 0x53
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70431256
+                TX_LANE_MAP: 0x02563147
+                RX_POLARITY_FLIP: 0xFC
+                TX_POLARITY_FLIP: 0xAD
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x07342165
+                TX_LANE_MAP: 0x06253147
+                RX_POLARITY_FLIP: 0xED
+                TX_POLARITY_FLIP: 0x1D
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x34071562
+                TX_LANE_MAP: 0x25061437
+                RX_POLARITY_FLIP: 0x46
+                TX_POLARITY_FLIP: 0xB6
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x74301562
+                TX_LANE_MAP: 0x52604173
+                RX_POLARITY_FLIP: 0x06
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70431256
+                TX_LANE_MAP: 0x02563147
+                RX_POLARITY_FLIP: 0xFC
+                TX_POLARITY_FLIP: 0xAD
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x07342165
+                TX_LANE_MAP: 0x06253147
+                RX_POLARITY_FLIP: 0xED
+                TX_POLARITY_FLIP: 0x1D
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x34071562
+                TX_LANE_MAP: 0x25061437
+                RX_POLARITY_FLIP: 0x46
+                TX_POLARITY_FLIP: 0xB6
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x74301562
+                TX_LANE_MAP: 0x52604173
+                RX_POLARITY_FLIP: 0x06
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x05367412
+                TX_LANE_MAP: 0x45207613
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0xD2
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x50634721
+                TX_LANE_MAP: 0x40527613
+                RX_POLARITY_FLIP: 0x9C
+                TX_POLARITY_FLIP: 0x62
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x63507124
+                TX_LANE_MAP: 0x52406173
+                RX_POLARITY_FLIP: 0x92
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x03657124
+                TX_LANE_MAP: 0x25041637
+                RX_POLARITY_FLIP: 0xE2
+                TX_POLARITY_FLIP: 0x87
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x05367412
+                TX_LANE_MAP: 0x45207613
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0xD2
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x50634721
+                TX_LANE_MAP: 0x40527613
+                RX_POLARITY_FLIP: 0x9C
+                TX_POLARITY_FLIP: 0x62
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x63507124
+                TX_LANE_MAP: 0x52406173
+                RX_POLARITY_FLIP: 0x92
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x03657124
+                TX_LANE_MAP: 0x25041637
+                RX_POLARITY_FLIP: 0xE2
+                TX_POLARITY_FLIP: 0x87
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x05367412
+                TX_LANE_MAP: 0x45207613
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0xD2
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26153074
+                TX_LANE_MAP: 0x41625730
+                RX_POLARITY_FLIP: 0xA4
+                TX_POLARITY_FLIP: 0xE6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x63507124
+                TX_LANE_MAP: 0x52406173
+                RX_POLARITY_FLIP: 0x92
+                TX_POLARITY_FLIP: 0x79
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x03657124
+                TX_LANE_MAP: 0x25041637
+                RX_POLARITY_FLIP: 0xE2
+                TX_POLARITY_FLIP: 0x87
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x12035647
+                TX_LANE_MAP: 0x45670123
+                RX_POLARITY_FLIP: 0x83
+                TX_POLARITY_FLIP: 0x72
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x21306574
+                TX_LANE_MAP: 0x47560123
+                RX_POLARITY_FLIP: 0x53
+                TX_POLARITY_FLIP: 0xF2
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x30215476
+                TX_LANE_MAP: 0x56471203
+                RX_POLARITY_FLIP: 0x94
+                TX_POLARITY_FLIP: 0x5C
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x10325476
+                TX_LANE_MAP: 0x65742130
+                RX_POLARITY_FLIP: 0xE4
+                TX_POLARITY_FLIP: 0xBD
+...
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                # CPU port
+                PORT_ID: 0
+            :
+                PC_PHYS_PORT_ID: 0
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 505
+            # mgmt port
+            ?
+                PORT_ID: 186
+            :
+                PC_PHYS_PORT_ID: 516
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 0
+            :
+                &port_mode_10g
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 177],
+                          [187, 188],
+                          [198, 199],
+                          [209, 210],
+                          [220, 221],
+                          [231, 232],
+                          [242, 243],
+                          [253, 254],
+                          [264, 265],
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+            :
+                ENABLE: 0
+                SPEED: 800000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+                LINK_TRAINING: 0
+            ?
+                PORT_ID: [274, 186]
+            :
+                ENABLE: 0
+                SPEED: 10000
+                NUM_LANES: 1
+                MAX_FRAME_SIZE: 9416
+
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration. Enable PPIU Mode
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 177],
+                          186,
+                          [187, 188],
+                          [198, 199],
+                          [209, 210],
+                          [220, 221],
+                          [231, 232],
+                          [242, 243],
+                          [253, 254],
+                          [264, 265],
+                          274,
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+...
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/hwsku.json b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/hwsku.json
new file mode 100644
index 00000000000..62b564403fd
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/hwsku.json
@@ -0,0 +1,202 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/media_settings.json b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/media_settings.json
new file mode 100644
index 00000000000..6570ebd5e2e
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/media_settings.json
@@ -0,0 +1,8196 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "1": {
+            "Default": {
+                "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
+                    "main": {
+                        "lane0": "0x7C",
+                        "lane1": "0x7C",
+                        "lane2": "0x7C",
+                        "lane3": "0x7C",
+                        "lane4": "0x7C",
+                        "lane5": "0x7C",
+                        "lane6": "0x7C",
+                        "lane7": "0x7C"
+                    },
+                    "post1": {
+                        "lane0": "0xFFFFFFE4",
+                        "lane1": "0xFFFFFFE4",
+                        "lane2": "0xFFFFFFE4",
+                        "lane3": "0xFFFFFFE4",
+                        "lane4": "0xFFFFFFE4",
+                        "lane5": "0xFFFFFFE4",
+                        "lane6": "0xFFFFFFE4",
+                        "lane7": "0xFFFFFFE4"
+                    },
+                    "post2": {
+                        "lane0": "0xFFFFFFF8",
+                        "lane1": "0xFFFFFFF8",
+                        "lane2": "0xFFFFFFF8",
+                        "lane3": "0xFFFFFFF8",
+                        "lane4": "0xFFFFFFF8",
+                        "lane5": "0xFFFFFFF8",
+                        "lane6": "0xFFFFFFF8",
+                        "lane7": "0xFFFFFFF8"
+                    },
+                    "pre1": {
+                        "lane0": "0xFFFFFFF8",
+                        "lane1": "0xFFFFFFF8",
+                        "lane2": "0xFFFFFFF8",
+                        "lane3": "0xFFFFFFF8",
+                        "lane4": "0xFFFFFFF8",
+                        "lane5": "0xFFFFFFF8",
+                        "lane6": "0xFFFFFFF8",
+                        "lane7": "0xFFFFFFF8"
+                    },
+                    "pre2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "pre3": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    }
+                },
+                "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
+                    "main": {
+                        "lane0": "0x8C",
+                        "lane1": "0x8C",
+                        "lane2": "0x8C",
+                        "lane3": "0x8C",
+                        "lane4": "0x8C",
+                        "lane5": "0x8C",
+                        "lane6": "0x8C",
+                        "lane7": "0x8C"
+                    },
+                    "post1": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "post2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "pre1": {
+                        "lane0": "0xFFFFFFE8",
+                        "lane1": "0xFFFFFFE8",
+                        "lane2": "0xFFFFFFE8",
+                        "lane3": "0xFFFFFFE8",
+                        "lane4": "0xFFFFFFE8",
+                        "lane5": "0xFFFFFFE8",
+                        "lane6": "0xFFFFFFE8",
+                        "lane7": "0xFFFFFFE8"
+                    },
+                    "pre2": {
+                        "lane0": "0x4",
+                        "lane1": "0x4",
+                        "lane2": "0x4",
+                        "lane3": "0x4",
+                        "lane4": "0x4",
+                        "lane5": "0x4",
+                        "lane6": "0x4",
+                        "lane7": "0x4"
+                    },
+                    "pre3": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    }
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
+                    "main": {
+                        "lane0": "0x7C",
+                        "lane1": "0x7C",
+                        "lane2": "0x7C",
+                        "lane3": "0x7C",
+                        "lane4": "0x7C",
+                        "lane5": "0x7C",
+                        "lane6": "0x7C",
+                        "lane7": "0x7C"
+                    },
+                    "post1": {
+                        "lane0": "0xFFFFFFE4",
+                        "lane1": "0xFFFFFFE4",
+                        "lane2": "0xFFFFFFE4",
+                        "lane3": "0xFFFFFFE4",
+                        "lane4": "0xFFFFFFE4",
+                        "lane5": "0xFFFFFFE4",
+                        "lane6": "0xFFFFFFE4",
+                        "lane7": "0xFFFFFFE4"
+                    },
+                    "post2": {
+                        "lane0": "0xFFFFFFF8",
+                        "lane1": "0xFFFFFFF8",
+                        "lane2": "0xFFFFFFF8",
+                        "lane3": "0xFFFFFFF8",
+                        "lane4": "0xFFFFFFF8",
+                        "lane5": "0xFFFFFFF8",
+                        "lane6": "0xFFFFFFF8",
+                        "lane7": "0xFFFFFFF8"
+                    },
+                    "pre1": {
+                        "lane0": "0xFFFFFFF8",
+                        "lane1": "0xFFFFFFF8",
+                        "lane2": "0xFFFFFFF8",
+                        "lane3": "0xFFFFFFF8",
+                        "lane4": "0xFFFFFFF8",
+                        "lane5": "0xFFFFFFF8",
+                        "lane6": "0xFFFFFFF8",
+                        "lane7": "0xFFFFFFF8"
+                    },
+                    "pre2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "pre3": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    }
+                },
+                "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
+                    "main": {
+                        "lane0": "0x8C",
+                        "lane1": "0x8C",
+                        "lane2": "0x8C",
+                        "lane3": "0x8C",
+                        "lane4": "0x8C",
+                        "lane5": "0x8C",
+                        "lane6": "0x8C",
+                        "lane7": "0x8C"
+                    },
+                    "post1": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "post2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
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+                        "lane1": "0x4",
+                        "lane2": "0x4",
+                        "lane3": "0x4",
+                        "lane4": "0x4",
+                        "lane5": "0x4",
+                        "lane6": "0x4",
+                        "lane7": "0x4"
+                    },
+                    "pre3": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    }
+                }
+            }
+        },
+        "63": {
+            "Default": {
+                "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
+                    "main": {
+                        "lane0": "0x7C",
+                        "lane1": "0x7C",
+                        "lane2": "0x7C",
+                        "lane3": "0x7C",
+                        "lane4": "0x7C",
+                        "lane5": "0x7C",
+                        "lane6": "0x7C",
+                        "lane7": "0x7C"
+                    },
+                    "post1": {
+                        "lane0": "0xFFFFFFE4",
+                        "lane1": "0xFFFFFFE4",
+                        "lane2": "0xFFFFFFE4",
+                        "lane3": "0xFFFFFFE4",
+                        "lane4": "0xFFFFFFE4",
+                        "lane5": "0xFFFFFFE4",
+                        "lane6": "0xFFFFFFE4",
+                        "lane7": "0xFFFFFFE4"
+                    },
+                    "post2": {
+                        "lane0": "0xFFFFFFF8",
+                        "lane1": "0xFFFFFFF8",
+                        "lane2": "0xFFFFFFF8",
+                        "lane3": "0xFFFFFFF8",
+                        "lane4": "0xFFFFFFF8",
+                        "lane5": "0xFFFFFFF8",
+                        "lane6": "0xFFFFFFF8",
+                        "lane7": "0xFFFFFFF8"
+                    },
+                    "pre1": {
+                        "lane0": "0xFFFFFFF8",
+                        "lane1": "0xFFFFFFF8",
+                        "lane2": "0xFFFFFFF8",
+                        "lane3": "0xFFFFFFF8",
+                        "lane4": "0xFFFFFFF8",
+                        "lane5": "0xFFFFFFF8",
+                        "lane6": "0xFFFFFFF8",
+                        "lane7": "0xFFFFFFF8"
+                    },
+                    "pre2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "pre3": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    }
+                },
+                "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
+                    "main": {
+                        "lane0": "0x8C",
+                        "lane1": "0x8C",
+                        "lane2": "0x8C",
+                        "lane3": "0x8C",
+                        "lane4": "0x8C",
+                        "lane5": "0x8C",
+                        "lane6": "0x8C",
+                        "lane7": "0x8C"
+                    },
+                    "post1": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "post2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "pre1": {
+                        "lane0": "0xFFFFFFE8",
+                        "lane1": "0xFFFFFFE8",
+                        "lane2": "0xFFFFFFE8",
+                        "lane3": "0xFFFFFFE8",
+                        "lane4": "0xFFFFFFE8",
+                        "lane5": "0xFFFFFFE8",
+                        "lane6": "0xFFFFFFE8",
+                        "lane7": "0xFFFFFFE8"
+                    },
+                    "pre2": {
+                        "lane0": "0x4",
+                        "lane1": "0x4",
+                        "lane2": "0x4",
+                        "lane3": "0x4",
+                        "lane4": "0x4",
+                        "lane5": "0x4",
+                        "lane6": "0x4",
+                        "lane7": "0x4"
+                    },
+                    "pre3": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    }
+                }
+            }
+        },
+        "64": {
+            "Default": {
+                "speed:400G|400GAUI-8|200GAUI-4|100GAUI-2": {
+                    "main": {
+                        "lane0": "0x7C",
+                        "lane1": "0x7C",
+                        "lane2": "0x7C",
+                        "lane3": "0x7C",
+                        "lane4": "0x7C",
+                        "lane5": "0x7C",
+                        "lane6": "0x7C",
+                        "lane7": "0x7C"
+                    },
+                    "post1": {
+                        "lane0": "0xFFFFFFE4",
+                        "lane1": "0xFFFFFFE4",
+                        "lane2": "0xFFFFFFE4",
+                        "lane3": "0xFFFFFFE4",
+                        "lane4": "0xFFFFFFE4",
+                        "lane5": "0xFFFFFFE4",
+                        "lane6": "0xFFFFFFE4",
+                        "lane7": "0xFFFFFFE4"
+                    },
+                    "post2": {
+                        "lane0": "0xFFFFFFF8",
+                        "lane1": "0xFFFFFFF8",
+                        "lane2": "0xFFFFFFF8",
+                        "lane3": "0xFFFFFFF8",
+                        "lane4": "0xFFFFFFF8",
+                        "lane5": "0xFFFFFFF8",
+                        "lane6": "0xFFFFFFF8",
+                        "lane7": "0xFFFFFFF8"
+                    },
+                    "pre1": {
+                        "lane0": "0xFFFFFFF8",
+                        "lane1": "0xFFFFFFF8",
+                        "lane2": "0xFFFFFFF8",
+                        "lane3": "0xFFFFFFF8",
+                        "lane4": "0xFFFFFFF8",
+                        "lane5": "0xFFFFFFF8",
+                        "lane6": "0xFFFFFFF8",
+                        "lane7": "0xFFFFFFF8"
+                    },
+                    "pre2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "pre3": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    }
+                },
+                "speed:800G|800GAUI-8|400GAUI-4-L|400GAUI-4-S|200GAUI-2-L|200GAUI-2-S|100GAUI-1-L|100GAUI-1-S": {
+                    "main": {
+                        "lane0": "0x8C",
+                        "lane1": "0x8C",
+                        "lane2": "0x8C",
+                        "lane3": "0x8C",
+                        "lane4": "0x8C",
+                        "lane5": "0x8C",
+                        "lane6": "0x8C",
+                        "lane7": "0x8C"
+                    },
+                    "post1": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "post2": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    },
+                    "pre1": {
+                        "lane0": "0xFFFFFFE8",
+                        "lane1": "0xFFFFFFE8",
+                        "lane2": "0xFFFFFFE8",
+                        "lane3": "0xFFFFFFE8",
+                        "lane4": "0xFFFFFFE8",
+                        "lane5": "0xFFFFFFE8",
+                        "lane6": "0xFFFFFFE8",
+                        "lane7": "0xFFFFFFE8"
+                    },
+                    "pre2": {
+                        "lane0": "0x4",
+                        "lane1": "0x4",
+                        "lane2": "0x4",
+                        "lane3": "0x4",
+                        "lane4": "0x4",
+                        "lane5": "0x4",
+                        "lane6": "0x4",
+                        "lane7": "0x4"
+                    },
+                    "pre3": {
+                        "lane0": "0x0",
+                        "lane1": "0x0",
+                        "lane2": "0x0",
+                        "lane3": "0x0",
+                        "lane4": "0x0",
+                        "lane5": "0x0",
+                        "lane6": "0x0",
+                        "lane7": "0x0"
+                    }
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/pg_profile_lookup.ini
new file mode 100755
index 00000000000..f7e31b0f6d4
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/pg_profile_lookup.ini
@@ -0,0 +1,23 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
+  10000  5m   1248    2288 35776   0        2288
+  25000  5m   1248    2288 53248   0        2288
+  40000  5m   1248    2288 66560   0        2288
+  50000  5m   1248    2288 90272   0        2288
+ 100000  5m   1248    2288 165568  0        2288
+ 400000  5m   1248    2288 307848  0        2288
+ 800000  5m   1248    2288 572516  0        2288
+  10000  40m  1248    2288 37024   0        2288
+  25000  40m  1248    2288 53248   0        2288
+  40000  40m  1248    2288 71552   0        2288
+  50000  40m  1248    2288 96096   0        2288
+ 100000  40m  1248    2288 177632  0        2288
+ 400000  40m  1248    2288 330200  0        2288
+ 800000  40m  1248    2288 614172  0        2288
+  10000  300m 1248    2288 46176   0        2288
+  25000  300m 1248    2288 79040   0        2288
+  40000  300m 1248    2288 108160  0        2288
+  50000  300m 1248    2288 141856  0        2288
+ 100000  300m 1248    2288 268736  0        2288
+ 400000  300m 1248    2288 499618  0        2288
+ 800000  300m 1248    2288 929132  0        2288
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/port_config.ini
new file mode 100644
index 00000000000..fd03625e219
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/port_config.ini
@@ -0,0 +1,67 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    1,2,3,4,5,6,7,8                  Ethernet1/1   1      800000  rs
+Ethernet8    17,18,19,20,21,22,23,24          Ethernet2/1   2      800000  rs
+Ethernet16   33,34,35,36,37,38,39,40          Ethernet3/1   3      800000  rs
+Ethernet24   49,50,51,52,53,54,55,56          Ethernet4/1   4      800000  rs
+Ethernet32   65,66,67,68,69,70,71,72          Ethernet5/1   5      800000  rs
+Ethernet40   81,82,83,84,85,86,87,88          Ethernet6/1   6      800000  rs
+Ethernet48   97,98,99,100,101,102,103,104     Ethernet7/1   7      800000  rs
+Ethernet56   113,114,115,116,117,118,119,120  Ethernet8/1   8      800000  rs
+Ethernet64   129,130,131,132,133,134,135,136  Ethernet9/1   9      800000  rs
+Ethernet72   145,146,147,148,149,150,151,152  Ethernet10/1  10     800000  rs
+Ethernet80   161,162,163,164,165,166,167,168  Ethernet11/1  11     800000  rs
+Ethernet88   177,178,179,180,181,182,183,184  Ethernet12/1  12     800000  rs
+Ethernet96   193,194,195,196,197,198,199,200  Ethernet13/1  13     800000  rs
+Ethernet104  209,210,211,212,213,214,215,216  Ethernet14/1  14     800000  rs
+Ethernet112  233,234,235,236,237,238,239,240  Ethernet15/1  15     800000  rs
+Ethernet120  249,250,251,252,253,254,255,256  Ethernet16/1  16     800000  rs
+Ethernet128  257,258,259,260,261,262,263,264  Ethernet17/1  17     800000  rs
+Ethernet136  273,274,275,276,277,278,279,280  Ethernet18/1  18     800000  rs
+Ethernet144  297,298,299,300,301,302,303,304  Ethernet19/1  19     800000  rs
+Ethernet152  313,314,315,316,317,318,319,320  Ethernet20/1  20     800000  rs
+Ethernet160  329,330,331,332,333,334,335,336  Ethernet21/1  21     800000  rs
+Ethernet168  345,346,347,348,349,350,351,352  Ethernet22/1  22     800000  rs
+Ethernet176  361,362,363,364,365,366,367,368  Ethernet23/1  23     800000  rs
+Ethernet184  377,378,379,380,381,382,383,384  Ethernet24/1  24     800000  rs
+Ethernet192  393,394,395,396,397,398,399,400  Ethernet25/1  25     800000  rs
+Ethernet200  409,410,411,412,413,414,415,416  Ethernet26/1  26     800000  rs
+Ethernet208  425,426,427,428,429,430,431,432  Ethernet27/1  27     800000  rs
+Ethernet216  441,442,443,444,445,446,447,448  Ethernet28/1  28     800000  rs
+Ethernet224  457,458,459,460,461,462,463,464  Ethernet29/1  29     800000  rs
+Ethernet232  473,474,475,476,477,478,479,480  Ethernet30/1  30     800000  rs
+Ethernet240  489,490,491,492,493,494,495,496  Ethernet31/1  31     800000  rs
+Ethernet248  505,506,507,508,509,510,511,512  Ethernet32/1  32     800000  rs
+Ethernet256  25,26,27,28,29,30,31,32          Ethernet33/1  33     800000  rs
+Ethernet264  9,10,11,12,13,14,15,16           Ethernet34/1  34     800000  rs
+Ethernet272  57,58,59,60,61,62,63,64          Ethernet35/1  35     800000  rs
+Ethernet280  41,42,43,44,45,46,47,48          Ethernet36/1  36     800000  rs
+Ethernet288  89,90,91,92,93,94,95,96          Ethernet37/1  37     800000  rs
+Ethernet296  73,74,75,76,77,78,79,80          Ethernet38/1  38     800000  rs
+Ethernet304  121,122,123,124,125,126,127,128  Ethernet39/1  39     800000  rs
+Ethernet312  105,106,107,108,109,110,111,112  Ethernet40/1  40     800000  rs
+Ethernet320  153,154,155,156,157,158,159,160  Ethernet41/1  41     800000  rs
+Ethernet328  137,138,139,140,141,142,143,144  Ethernet42/1  42     800000  rs
+Ethernet336  185,186,187,188,189,190,191,192  Ethernet43/1  43     800000  rs
+Ethernet344  169,170,171,172,173,174,175,176  Ethernet44/1  44     800000  rs
+Ethernet352  217,218,219,220,221,222,223,224  Ethernet45/1  45     800000  rs
+Ethernet360  201,202,203,204,205,206,207,208  Ethernet46/1  46     800000  rs
+Ethernet368  241,242,243,244,245,246,247,248  Ethernet47/1  47     800000  rs
+Ethernet376  225,226,227,228,229,230,231,232  Ethernet48/1  48     800000  rs
+Ethernet384  281,282,283,284,285,286,287,288  Ethernet49/1  49     800000  rs
+Ethernet392  265,266,267,268,269,270,271,272  Ethernet50/1  50     800000  rs
+Ethernet400  305,306,307,308,309,310,311,312  Ethernet51/1  51     800000  rs
+Ethernet408  289,290,291,292,293,294,295,296  Ethernet52/1  52     800000  rs
+Ethernet416  337,338,339,340,341,342,343,344  Ethernet53/1  53     800000  rs
+Ethernet424  321,322,323,324,325,326,327,328  Ethernet54/1  54     800000  rs
+Ethernet432  369,370,371,372,373,374,375,376  Ethernet55/1  55     800000  rs
+Ethernet440  353,354,355,356,357,358,359,360  Ethernet56/1  56     800000  rs
+Ethernet448  401,402,403,404,405,406,407,408  Ethernet57/1  57     800000  rs
+Ethernet456  385,386,387,388,389,390,391,392  Ethernet58/1  58     800000  rs
+Ethernet464  433,434,435,436,437,438,439,440  Ethernet59/1  59     800000  rs
+Ethernet472  417,418,419,420,421,422,423,424  Ethernet60/1  60     800000  rs
+Ethernet480  465,466,467,468,469,470,471,472  Ethernet61/1  61     800000  rs
+Ethernet488  449,450,451,452,453,454,455,456  Ethernet62/1  62     800000  rs
+Ethernet496  497,498,499,500,501,502,503,504  Ethernet63/1  63     800000  rs
+Ethernet504  481,482,483,484,485,486,487,488  Ethernet64/1  64     800000  rs
+Ethernet512  515                              Ethernet65    65     10000   none
+Ethernet513  516                              Ethernet66    66     10000   none
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/profile.ini b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/profile.ini
new file mode 100755
index 00000000000..4eda67c91a6
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=XX:XX:XX:XX:XX:XX
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/qos.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/qos.json.j2
new file mode 100755
index 00000000000..3e548325ea3
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/sai.profile b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/sai.profile
new file mode 100755
index 00000000000..ba23cb46a8c
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/Nokia-IXR7220-H5-64O/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/h5_64o.yml
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/custom_led.bin b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/custom_led.bin
new file mode 100644
index 00000000000..ee4e5eeb3e7
Binary files /dev/null and b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/custom_led.bin differ
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/default_sku b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/default_sku
new file mode 100755
index 00000000000..944e6ea84ed
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/default_sku
@@ -0,0 +1 @@
+Nokia-IXR7220-H5-64O t1
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/installer.conf
new file mode 100755
index 00000000000..cdaaf72f616
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tpm_tis.interrupts=0"
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/led_proc_init.soc b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/led_proc_init.soc
new file mode 100755
index 00000000000..eda09a0dd1f
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/led_proc_init.soc
@@ -0,0 +1,4 @@
+led stop
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/pcie.yaml b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/pcie.yaml
new file mode 100755
index 00000000000..26abd2fb0b0
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/pcie.yaml
@@ -0,0 +1,225 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 14b5
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Root
+    Complex (rev 01)'
+- bus: '00'
+  dev: '00'
+  fn: '2'
+  id: 14b6
+  name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Family 17h-19h IOMMU'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 14b7
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy
+    Host Bridge (rev 01)'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: 14b8
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '2'
+  id: 14b8
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe GPP Bridge'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 14b7
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy
+    Host Bridge (rev 01)'
+- bus: '00'
+  dev: '02'
+  fn: '1'
+  id: 14ba
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe GPP Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 14b7
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy
+    Host Bridge (rev 01)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 14b7
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy
+    Host Bridge (rev 01)'
+- bus: '00'
+  dev: 08
+  fn: '0'
+  id: 14b7
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy
+    Host Bridge (rev 01)'
+- bus: '00'
+  dev: 08
+  fn: '1'
+  id: 14b9
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe
+    GPP Bridge (rev 10)'
+- bus: '00'
+  dev: 08
+  fn: '2'
+  id: 14b9
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe
+    GPP Bridge (rev 10)'
+- bus: '00'
+  dev: 08
+  fn: '3'
+  id: 14b9
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe
+    GPP Bridge (rev 10)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 790b
+  name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 71)'
+- bus: '00'
+  dev: '14'
+  fn: '3'
+  id: 790e
+  name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: '1679'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 0'
+- bus: '00'
+  dev: '18'
+  fn: '1'
+  id: 167a
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 1'
+- bus: '00'
+  dev: '18'
+  fn: '2'
+  id: 167b
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 2'
+- bus: '00'
+  dev: '18'
+  fn: '3'
+  id: 167c
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 3'
+- bus: '00'
+  dev: '18'
+  fn: '4'
+  id: 167d
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 4'
+- bus: '00'
+  dev: '18'
+  fn: '5'
+  id: 167e
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 5'
+- bus: '00'
+  dev: '18'
+  fn: '6'
+  id: 167f
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 6'
+- bus: '00'
+  dev: '18'
+  fn: '7'
+  id: '1680'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device
+    18h; Function 7'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: 9c1d
+  name: 'Unassigned class [ff00]: Lattice Semiconductor Corporation Device 9c1d (rev
+    01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: f900
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM78900 Switch ASIC
+    [Tomahawk5] (rev 11)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: 145a
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD/ATI]
+    Dummy Function (absent graphics controller)'
+- bus: '04'
+  dev: '00'
+  fn: '2'
+  id: '1649'
+  name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] VanGogh PSP/CCP'
+- bus: '04'
+  dev: '00'
+  fn: '3'
+  id: 161d
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller
+    #3'
+- bus: '04'
+  dev: '00'
+  fn: '4'
+  id: 161e
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller
+    #4'
+- bus: '04'
+  dev: '00'
+  fn: '5'
+  id: 15e2
+  name: 'Multimedia controller: Advanced Micro Devices, Inc. [AMD] ACP/ACP3X/ACP6x
+    Audio Coprocessor (rev 60)'
+- bus: '04'
+  dev: '00'
+  fn: '6'
+  id: 15e3
+  name: 'Audio device: Advanced Micro Devices, Inc. [AMD] Family 17h/19h HD Audio
+    Controller'
+- bus: '04'
+  dev: '00'
+  fn: '7'
+  id: 15e4
+  name: 'Signal processing controller: Advanced Micro Devices, Inc. [AMD] Sensor Fusion
+    Hub'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: '7901'
+  name: 'SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI
+    mode] (rev a1)'
+- bus: '05'
+  dev: '00'
+  fn: '2'
+  id: '1458'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: '05'
+  dev: '00'
+  fn: '3'
+  id: '1458'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: 145a
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
+    Zeppelin/Raven/Raven2 PCIe Dummy Function'
+- bus: '06'
+  dev: '00'
+  fn: '3'
+  id: 15d6
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller
+    #5'
+- bus: '06'
+  dev: '00'
+  fn: '4'
+  id: 15d7
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller
+    #6'
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform.json
new file mode 100755
index 00000000000..0e0d867ea0b
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform.json
@@ -0,0 +1,2738 @@
+{
+    "chassis": {
+        "name": "7220 IXR-H5-64O",
+        "components": [
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CPUPLD"
+            },
+            {
+                "name": "SysFPGA"
+            },
+            {
+                "name": "SWPLD2"
+            },
+            {
+                "name": "SWPLD3"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fan1",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan2",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan3",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan4",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan5",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan6",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan7",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan8",
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan1",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan2",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan3",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan4",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan5",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan6",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan7",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan8",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }            
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            },
+            {
+                "name": "PSU2",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            }
+        ],
+        "thermals": [
+            {
+                "name": "MB Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Front",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB MAC",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "PSU Top",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "PSU Bottom",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU Board",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "Fan Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "Fan Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "ASIC TH5",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            }
+        ],
+        "sfps": [
+            {
+                "name": "OSFP_1"
+            },
+            {
+                "name": "OSFP_2"
+            },
+            {
+                "name": "OSFP_3"
+            },
+            {
+                "name": "OSFP_4"
+            },
+            {
+                "name": "OSFP_5"
+            },
+            {
+                "name": "OSFP_6"
+            },
+            {
+                "name": "OSFP_7"
+            },
+            {
+                "name": "OSFP_8"
+            },
+            {
+                "name": "OSFP_9"
+            },
+            {
+                "name": "OSFP_10"
+            },
+            {
+                "name": "OSFP_11"
+            },
+            {
+                "name": "OSFP_12"
+            },
+            {
+                "name": "OSFP_13"
+            },
+            {
+                "name": "OSFP_14"
+            },
+            {
+                "name": "OSFP_15"
+            },
+            {
+                "name": "OSFP_16"
+            },
+            {
+                "name": "OSFP_17"
+            },
+            {
+                "name": "OSFP_18"
+            },
+            {
+                "name": "OSFP_19"
+            },
+            {
+                "name": "OSFP_20"
+            },
+            {
+                "name": "OSFP_21"
+            },
+            {
+                "name": "OSFP_22"
+            },
+            {
+                "name": "OSFP_23"
+            },
+            {
+                "name": "OSFP_24"
+            },
+            {
+                "name": "OSFP_25"
+            },
+            {
+                "name": "OSFP_26"
+            },
+            {
+                "name": "OSFP_27"
+            },
+            {
+                "name": "OSFP_28"
+            },
+            {
+                "name": "OSFP_29"
+            },
+            {
+                "name": "OSFP_30"
+            },
+            {
+                "name": "OSFP_31"
+            },
+            {
+                "name": "OSFP_32"
+            },
+            {
+                "name": "OSFP_33"
+            },
+            {
+                "name": "OSFP_34"
+            },
+            {
+                "name": "OSFP_35"
+            },
+            {
+                "name": "OSFP_36"
+            },
+            {
+                "name": "OSFP_37"
+            },
+            {
+                "name": "OSFP_38"
+            },
+            {
+                "name": "OSFP_39"
+            },
+            {
+                "name": "OSFP_40"
+            },
+            {
+                "name": "OSFP_41"
+            },
+            {
+                "name": "OSFP_42"
+            },
+            {
+                "name": "OSFP_43"
+            },
+            {
+                "name": "OSFP_44"
+            },
+            {
+                "name": "OSFP_45"
+            },
+            {
+                "name": "OSFP_46"
+            },
+            {
+                "name": "OSFP_47"
+            },
+            {
+                "name": "OSFP_48"
+            },
+            {
+                "name": "OSFP_49"
+            },
+            {
+                "name": "OSFP_50"
+            },
+            {
+                "name": "OSFP_51"
+            },
+            {
+                "name": "OSFP_52"
+            },
+            {
+                "name": "OSFP_53"
+            },
+            {
+                "name": "OSFP_54"
+            },
+            {
+                "name": "OSFP_55"
+            },
+            {
+                "name": "OSFP_56"
+            },
+            {
+                "name": "OSFP_57"
+            },
+            {
+                "name": "OSFP_58"
+            },
+            {
+                "name": "OSFP_59"
+            },
+            {
+                "name": "OSFP_60"
+            },
+            {
+                "name": "OSFP_61"
+            },
+            {
+                "name": "OSFP_62"
+            },
+            {
+                "name": "OSFP_63"
+            },
+            {
+                "name": "OSFP_64"
+            },
+            {
+                "name": "SFP+_0"
+            },
+            {
+                "name": "SFP+_1"
+            }
+       	]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet1/1"
+                ],  
+                "1x400G": [
+                    "Ethernet1/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet1/1"
+                ],
+                "2x400G": [
+                    "Ethernet1/1",
+                    "Ethernet1/5"
+                ],
+                "4x200G": [
+                    "Ethernet1/1",
+                    "Ethernet1/3",
+                    "Ethernet1/5",
+                    "Ethernet1/7"
+                ],
+                "8x100G": [
+                    "Ethernet1/1",
+                    "Ethernet1/2",
+                    "Ethernet1/3",
+                    "Ethernet1/4",
+                    "Ethernet1/5",
+                    "Ethernet1/6",
+                    "Ethernet1/7",
+                    "Ethernet1/8"
+                ]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet2/1"
+                ],
+                "1x400G": [
+                    "Ethernet2/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet2/1"
+                ],
+                "2x400G": [
+                    "Ethernet2/1",
+                    "Ethernet2/5"
+                ],
+                "4x200G": [
+                    "Ethernet2/1",
+                    "Ethernet2/3",
+                    "Ethernet2/5",
+                    "Ethernet2/7"
+                ],
+                "8x100G": [
+                    "Ethernet2/1",
+                    "Ethernet2/2",
+                    "Ethernet2/3",
+                    "Ethernet2/4",
+                    "Ethernet2/5",
+                    "Ethernet2/6",
+                    "Ethernet2/7",
+                    "Ethernet2/8"
+                ]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet3/1"
+                ],
+                "1x400G": [
+                    "Ethernet3/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet3/1"
+                ],
+                "2x400G": [
+                    "Ethernet3/1",
+                    "Ethernet3/5"
+                ],
+                "4x200G": [
+                    "Ethernet3/1",
+                    "Ethernet3/3",
+                    "Ethernet3/5",
+                    "Ethernet3/7"
+                ],
+                "8x100G": [
+                    "Ethernet3/1",
+                    "Ethernet3/2",
+                    "Ethernet3/3",
+                    "Ethernet3/4",
+                    "Ethernet3/5",
+                    "Ethernet3/6",
+                    "Ethernet3/7",
+                    "Ethernet3/8"
+                ]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet4/1"
+                ],
+                "1x400G": [
+                    "Ethernet4/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet4/1"
+                ],
+                "2x400G": [
+                    "Ethernet4/1",
+                    "Ethernet4/5"
+                ],
+                "4x200G": [
+                    "Ethernet4/1",
+                    "Ethernet4/3",
+                    "Ethernet4/5",
+                    "Ethernet4/7"
+                ],
+                "8x100G": [
+                    "Ethernet4/1",
+                    "Ethernet4/2",
+                    "Ethernet4/3",
+                    "Ethernet4/4",
+                    "Ethernet4/5",
+                    "Ethernet4/6",
+                    "Ethernet4/7",
+                    "Ethernet4/8"
+                ]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet5/1"
+                ],
+                "1x400G": [
+                    "Ethernet5/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet5/1"
+                ],
+                "2x400G": [
+                    "Ethernet5/1",
+                    "Ethernet5/5"
+                ],
+                "4x200G": [
+                    "Ethernet5/1",
+                    "Ethernet5/3",
+                    "Ethernet5/5",
+                    "Ethernet5/7"
+                ],
+                "8x100G": [
+                    "Ethernet5/1",
+                    "Ethernet5/2",
+                    "Ethernet5/3",
+                    "Ethernet5/4",
+                    "Ethernet5/5",
+                    "Ethernet5/6",
+                    "Ethernet5/7",
+                    "Ethernet5/8"
+                ]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet6/1"
+                ],
+                "1x400G": [
+                    "Ethernet6/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet6/1"
+                ],
+                "2x400G": [
+                    "Ethernet6/1",
+                    "Ethernet6/5"
+                ],
+                "4x200G": [
+                    "Ethernet6/1",
+                    "Ethernet6/3",
+                    "Ethernet6/5",
+                    "Ethernet6/7"
+                ],
+                "8x100G": [
+                    "Ethernet6/1",
+                    "Ethernet6/2",
+                    "Ethernet6/3",
+                    "Ethernet6/4",
+                    "Ethernet6/5",
+                    "Ethernet6/6",
+                    "Ethernet6/7",
+                    "Ethernet6/8"
+                ]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet7/1"
+                ],
+                "1x400G": [
+                    "Ethernet7/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet7/1"
+                ],
+                "2x400G": [
+                    "Ethernet7/1",
+                    "Ethernet7/5"
+                ],
+                "4x200G": [
+                    "Ethernet7/1",
+                    "Ethernet7/3",
+                    "Ethernet7/5",
+                    "Ethernet7/7"
+                ],
+                "8x100G": [
+                    "Ethernet7/1",
+                    "Ethernet7/2",
+                    "Ethernet7/3",
+                    "Ethernet7/4",
+                    "Ethernet7/5",
+                    "Ethernet7/6",
+                    "Ethernet7/7",
+                    "Ethernet7/8"
+                ]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet8/1"
+                ],
+                "1x400G": [
+                    "Ethernet8/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet8/1"
+                ],
+                "2x400G": [
+                    "Ethernet8/1",
+                    "Ethernet8/5"
+                ],
+                "4x200G": [
+                    "Ethernet8/1",
+                    "Ethernet8/3",
+                    "Ethernet8/5",
+                    "Ethernet8/7"
+                ],
+                "8x100G": [
+                    "Ethernet8/1",
+                    "Ethernet8/2",
+                    "Ethernet8/3",
+                    "Ethernet8/4",
+                    "Ethernet8/5",
+                    "Ethernet8/6",
+                    "Ethernet8/7",
+                    "Ethernet8/8"
+                ]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet9/1"
+                ],
+                "1x400G": [
+                    "Ethernet9/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet9/1"
+                ],
+                "2x400G": [
+                    "Ethernet9/1",
+                    "Ethernet9/5"
+                ],
+                "4x200G": [
+                    "Ethernet9/1",
+                    "Ethernet9/3",
+                    "Ethernet9/5",
+                    "Ethernet9/7"
+                ],
+                "8x100G": [
+                    "Ethernet9/1",
+                    "Ethernet9/2",
+                    "Ethernet9/3",
+                    "Ethernet9/4",
+                    "Ethernet9/5",
+                    "Ethernet9/6",
+                    "Ethernet9/7",
+                    "Ethernet9/8"
+                ]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet10/1"
+                ],
+                "1x400G": [
+                    "Ethernet10/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet10/1"
+                ],
+                "2x400G": [
+                    "Ethernet10/1",
+                    "Ethernet10/5"
+                ],
+                "4x200G": [
+                    "Ethernet10/1",
+                    "Ethernet10/3",
+                    "Ethernet10/5",
+                    "Ethernet10/7"
+                ],
+                "8x100G": [
+                    "Ethernet10/1",
+                    "Ethernet10/2",
+                    "Ethernet10/3",
+                    "Ethernet10/4",
+                    "Ethernet10/5",
+                    "Ethernet10/6",
+                    "Ethernet10/7",
+                    "Ethernet10/8"
+                ]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "161,162,163,164,165,166,167,168",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet11/1"
+                ],
+                "1x400G": [
+                    "Ethernet11/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet11/1"
+                ],
+                "2x400G": [
+                    "Ethernet11/1",
+                    "Ethernet11/5"
+                ],
+                "4x200G": [
+                    "Ethernet11/1",
+                    "Ethernet11/3",
+                    "Ethernet11/5",
+                    "Ethernet11/7"
+                ],
+                "8x100G": [
+                    "Ethernet11/1",
+                    "Ethernet11/2",
+                    "Ethernet11/3",
+                    "Ethernet11/4",
+                    "Ethernet11/5",
+                    "Ethernet11/6",
+                    "Ethernet11/7",
+                    "Ethernet11/8"
+                ]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "177,178,179,180,181,182,183,184",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet12/1"
+                ],
+                "1x400G": [
+                    "Ethernet12/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet12/1"
+                ],
+                "2x400G": [
+                    "Ethernet12/1",
+                    "Ethernet12/5"
+                ],
+                "4x200G": [
+                    "Ethernet12/1",
+                    "Ethernet12/3",
+                    "Ethernet12/5",
+                    "Ethernet12/7"
+                ],
+                "8x100G": [
+                    "Ethernet12/1",
+                    "Ethernet12/2",
+                    "Ethernet12/3",
+                    "Ethernet12/4",
+                    "Ethernet12/5",
+                    "Ethernet12/6",
+                    "Ethernet12/7",
+                    "Ethernet12/8"
+                ]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "193,194,195,196,197,198,199,200",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet13/1"
+                ],
+                "1x400G": [
+                    "Ethernet13/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet13/1"
+                ],
+                "2x400G": [
+                    "Ethernet13/1",
+                    "Ethernet13/5"
+                ],
+                "4x200G": [
+                    "Ethernet13/1",
+                    "Ethernet13/3",
+                    "Ethernet13/5",
+                    "Ethernet13/7"
+                ],
+                "8x100G": [
+                    "Ethernet13/1",
+                    "Ethernet13/2",
+                    "Ethernet13/3",
+                    "Ethernet13/4",
+                    "Ethernet13/5",
+                    "Ethernet13/6",
+                    "Ethernet13/7",
+                    "Ethernet13/8"
+                ]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "209,210,211,212,213,214,215,216",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet14/1"
+                ],
+                "1x400G": [
+                    "Ethernet14/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet14/1"
+                ],
+                "2x400G": [
+                    "Ethernet14/1",
+                    "Ethernet14/5"
+                ],
+                "4x200G": [
+                    "Ethernet14/1",
+                    "Ethernet14/3",
+                    "Ethernet14/5",
+                    "Ethernet14/7"
+                ],
+                "8x100G": [
+                    "Ethernet14/1",
+                    "Ethernet14/2",
+                    "Ethernet14/3",
+                    "Ethernet14/4",
+                    "Ethernet14/5",
+                    "Ethernet14/6",
+                    "Ethernet14/7",
+                    "Ethernet14/8"
+                ]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "233,234,235,236,237,238,239,240",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet15/1"
+                ],
+                "1x400G": [
+                    "Ethernet15/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet15/1"
+                ],
+                "2x400G": [
+                    "Ethernet15/1",
+                    "Ethernet15/5"
+                ],
+                "4x200G": [
+                    "Ethernet15/1",
+                    "Ethernet15/3",
+                    "Ethernet15/5",
+                    "Ethernet15/7"
+                ],
+                "8x100G": [
+                    "Ethernet15/1",
+                    "Ethernet15/2",
+                    "Ethernet15/3",
+                    "Ethernet15/4",
+                    "Ethernet15/5",
+                    "Ethernet15/6",
+                    "Ethernet15/7",
+                    "Ethernet15/8"
+                ]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "249,250,251,252,253,254,255,256",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet16/1"
+                ],
+                "1x400G": [
+                    "Ethernet16/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet16/1"
+                ],
+                "2x400G": [
+                    "Ethernet16/1",
+                    "Ethernet16/5"
+                ],
+                "4x200G": [
+                    "Ethernet16/1",
+                    "Ethernet16/3",
+                    "Ethernet16/5",
+                    "Ethernet16/7"
+                ],
+                "8x100G": [
+                    "Ethernet16/1",
+                    "Ethernet16/2",
+                    "Ethernet16/3",
+                    "Ethernet16/4",
+                    "Ethernet16/5",
+                    "Ethernet16/6",
+                    "Ethernet16/7",
+                    "Ethernet16/8"
+                ]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "257,258,259,260,261,262,263,264",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet17/1"
+                ],
+                "1x400G": [
+                    "Ethernet17/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet17/1"
+                ],
+                "2x400G": [
+                    "Ethernet17/1",
+                    "Ethernet17/5"
+                ],
+                "4x200G": [
+                    "Ethernet17/1",
+                    "Ethernet17/3",
+                    "Ethernet17/5",
+                    "Ethernet17/7"
+                ],
+                "8x100G": [
+                    "Ethernet17/1",
+                    "Ethernet17/2",
+                    "Ethernet17/3",
+                    "Ethernet17/4",
+                    "Ethernet17/5",
+                    "Ethernet17/6",
+                    "Ethernet17/7",
+                    "Ethernet17/8"
+                ]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "273,274,275,276,277,278,279,280",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet18/1"
+                ],
+                "1x400G": [
+                    "Ethernet18/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet18/1"
+                ],
+                "2x400G": [
+                    "Ethernet18/1",
+                    "Ethernet18/5"
+                ],
+                "4x200G": [
+                    "Ethernet18/1",
+                    "Ethernet18/3",
+                    "Ethernet18/5",
+                    "Ethernet18/7"
+                ],
+                "8x100G": [
+                    "Ethernet18/1",
+                    "Ethernet18/2",
+                    "Ethernet18/3",
+                    "Ethernet18/4",
+                    "Ethernet18/5",
+                    "Ethernet18/6",
+                    "Ethernet18/7",
+                    "Ethernet18/8"
+                ]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "297,298,299,300,301,302,303,304",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet19/1"
+                ],
+                "1x400G": [
+                    "Ethernet19/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet19/1"
+                ],
+                "2x400G": [
+                    "Ethernet19/1",
+                    "Ethernet19/5"
+                ],
+                "4x200G": [
+                    "Ethernet19/1",
+                    "Ethernet19/3",
+                    "Ethernet19/5",
+                    "Ethernet19/7"
+                ],
+                "8x100G": [
+                    "Ethernet19/1",
+                    "Ethernet19/2",
+                    "Ethernet19/3",
+                    "Ethernet19/4",
+                    "Ethernet19/5",
+                    "Ethernet19/6",
+                    "Ethernet19/7",
+                    "Ethernet19/8"
+                ]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "313,314,315,316,317,318,319,320",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet20/1"
+                ],
+                "1x400G": [
+                    "Ethernet20/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet20/1"
+                ],
+                "2x400G": [
+                    "Ethernet20/1",
+                    "Ethernet20/5"
+                ],
+                "4x200G": [
+                    "Ethernet20/1",
+                    "Ethernet20/3",
+                    "Ethernet20/5",
+                    "Ethernet20/7"
+                ],
+                "8x100G": [
+                    "Ethernet20/1",
+                    "Ethernet20/2",
+                    "Ethernet20/3",
+                    "Ethernet20/4",
+                    "Ethernet20/5",
+                    "Ethernet20/6",
+                    "Ethernet20/7",
+                    "Ethernet20/8"
+                ]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "329,330,331,332,333,334,335,336",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet21/1"
+                ],
+                "1x400G": [
+                    "Ethernet21/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet21/1"
+                ],
+                "2x400G": [
+                    "Ethernet21/1",
+                    "Ethernet21/5"
+                ],
+                "4x200G": [
+                    "Ethernet21/1",
+                    "Ethernet21/3",
+                    "Ethernet21/5",
+                    "Ethernet21/7"
+                ],
+                "8x100G": [
+                    "Ethernet21/1",
+                    "Ethernet21/2",
+                    "Ethernet21/3",
+                    "Ethernet21/4",
+                    "Ethernet21/5",
+                    "Ethernet21/6",
+                    "Ethernet21/7",
+                    "Ethernet21/8"
+                ]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "345,346,347,348,349,350,351,352",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet22/1"
+                ],
+                "1x400G": [
+                    "Ethernet22/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet22/1"
+                ],
+                "2x400G": [
+                    "Ethernet22/1",
+                    "Ethernet22/5"
+                ],
+                "4x200G": [
+                    "Ethernet22/1",
+                    "Ethernet22/3",
+                    "Ethernet22/5",
+                    "Ethernet22/7"
+                ],
+                "8x100G": [
+                    "Ethernet22/1",
+                    "Ethernet22/2",
+                    "Ethernet22/3",
+                    "Ethernet22/4",
+                    "Ethernet22/5",
+                    "Ethernet22/6",
+                    "Ethernet22/7",
+                    "Ethernet22/8"
+                ]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "361,362,363,364,365,366,367,368",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet23/1"
+                ],
+                "1x400G": [
+                    "Ethernet23/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet23/1"
+                ],
+                "2x400G": [
+                    "Ethernet23/1",
+                    "Ethernet23/5"
+                ],
+                "4x200G": [
+                    "Ethernet23/1",
+                    "Ethernet23/3",
+                    "Ethernet23/5",
+                    "Ethernet23/7"
+                ],
+                "8x100G": [
+                    "Ethernet23/1",
+                    "Ethernet23/2",
+                    "Ethernet23/3",
+                    "Ethernet23/4",
+                    "Ethernet23/5",
+                    "Ethernet23/6",
+                    "Ethernet23/7",
+                    "Ethernet23/8"
+                ]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "377,378,379,380,381,382,383,384",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet24/1"
+                ],
+                "1x400G": [
+                    "Ethernet24/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet24/1"
+                ],
+                "2x400G": [
+                    "Ethernet24/1",
+                    "Ethernet24/5"
+                ],
+                "4x200G": [
+                    "Ethernet24/1",
+                    "Ethernet24/3",
+                    "Ethernet24/5",
+                    "Ethernet24/7"
+                ],
+                "8x100G": [
+                    "Ethernet24/1",
+                    "Ethernet24/2",
+                    "Ethernet24/3",
+                    "Ethernet24/4",
+                    "Ethernet24/5",
+                    "Ethernet24/6",
+                    "Ethernet24/7",
+                    "Ethernet24/8"
+                ]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "393,394,395,396,397,398,399,400",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet25/1"
+                ],
+                "1x400G": [
+                    "Ethernet25/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet25/1"
+                ],
+                "2x400G": [
+                    "Ethernet25/1",
+                    "Ethernet25/5"
+                ],
+                "4x200G": [
+                    "Ethernet25/1",
+                    "Ethernet25/3",
+                    "Ethernet25/5",
+                    "Ethernet25/7"
+                ],
+                "8x100G": [
+                    "Ethernet25/1",
+                    "Ethernet25/2",
+                    "Ethernet25/3",
+                    "Ethernet25/4",
+                    "Ethernet25/5",
+                    "Ethernet25/6",
+                    "Ethernet25/7",
+                    "Ethernet25/8"
+                ]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "409,410,411,412,413,414,415,416",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet26/1"
+                ],
+                "1x400G": [
+                    "Ethernet26/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet26/1"
+                ],
+                "2x400G": [
+                    "Ethernet26/1",
+                    "Ethernet26/5"
+                ],
+                "4x200G": [
+                    "Ethernet26/1",
+                    "Ethernet26/3",
+                    "Ethernet26/5",
+                    "Ethernet26/7"
+                ],
+                "8x100G": [
+                    "Ethernet26/1",
+                    "Ethernet26/2",
+                    "Ethernet26/3",
+                    "Ethernet26/4",
+                    "Ethernet26/5",
+                    "Ethernet26/6",
+                    "Ethernet26/7",
+                    "Ethernet26/8"
+                ]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "425,426,427,428,429,430,431,432",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet27/1"
+                ],
+                "1x400G": [
+                    "Ethernet27/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet27/1"
+                ],
+                "2x400G": [
+                    "Ethernet27/1",
+                    "Ethernet27/5"
+                ],
+                "4x200G": [
+                    "Ethernet27/1",
+                    "Ethernet27/3",
+                    "Ethernet27/5",
+                    "Ethernet27/7"
+                ],
+                "8x100G": [
+                    "Ethernet27/1",
+                    "Ethernet27/2",
+                    "Ethernet27/3",
+                    "Ethernet27/4",
+                    "Ethernet27/5",
+                    "Ethernet27/6",
+                    "Ethernet27/7",
+                    "Ethernet27/8"
+                ]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "441,442,443,444,445,446,447,448",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet28/1"
+                ],
+                "1x400G": [
+                    "Ethernet28/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet28/1"
+                ],
+                "2x400G": [
+                    "Ethernet28/1",
+                    "Ethernet28/5"
+                ],
+                "4x200G": [
+                    "Ethernet28/1",
+                    "Ethernet28/3",
+                    "Ethernet28/5",
+                    "Ethernet28/7"
+                ],
+                "8x100G": [
+                    "Ethernet28/1",
+                    "Ethernet28/2",
+                    "Ethernet28/3",
+                    "Ethernet28/4",
+                    "Ethernet28/5",
+                    "Ethernet28/6",
+                    "Ethernet28/7",
+                    "Ethernet28/8"
+                ]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "457,458,459,460,461,462,463,464",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet29/1"
+                ],
+                "1x400G": [
+                    "Ethernet29/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet29/1"
+                ],
+                "2x400G": [
+                    "Ethernet29/1",
+                    "Ethernet29/5"
+                ],
+                "4x200G": [
+                    "Ethernet29/1",
+                    "Ethernet29/3",
+                    "Ethernet29/5",
+                    "Ethernet29/7"
+                ],
+                "8x100G": [
+                    "Ethernet29/1",
+                    "Ethernet29/2",
+                    "Ethernet29/3",
+                    "Ethernet29/4",
+                    "Ethernet29/5",
+                    "Ethernet29/6",
+                    "Ethernet29/7",
+                    "Ethernet29/8"
+                ]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "473,474,475,476,477,478,479,480",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet30/1"
+                ],
+                "1x400G": [
+                    "Ethernet30/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet30/1"
+                ],
+                "2x400G": [
+                    "Ethernet30/1",
+                    "Ethernet30/5"
+                ],
+                "4x200G": [
+                    "Ethernet30/1",
+                    "Ethernet30/3",
+                    "Ethernet30/5",
+                    "Ethernet30/7"
+                ],
+                "8x100G": [
+                    "Ethernet30/1",
+                    "Ethernet30/2",
+                    "Ethernet30/3",
+                    "Ethernet30/4",
+                    "Ethernet30/5",
+                    "Ethernet30/6",
+                    "Ethernet30/7",
+                    "Ethernet30/8"
+                ]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "489,490,491,492,493,494,495,496",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet31/1"
+                ],
+                "1x400G": [
+                    "Ethernet31/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet31/1"
+                ],
+                "2x400G": [
+                    "Ethernet31/1",
+                    "Ethernet31/5"
+                ],
+                "4x200G": [
+                    "Ethernet31/1",
+                    "Ethernet31/3",
+                    "Ethernet31/5",
+                    "Ethernet31/7"
+                ],
+                "8x100G": [
+                    "Ethernet31/1",
+                    "Ethernet31/2",
+                    "Ethernet31/3",
+                    "Ethernet31/4",
+                    "Ethernet31/5",
+                    "Ethernet31/6",
+                    "Ethernet31/7",
+                    "Ethernet31/8"
+                ]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "505,506,507,508,509,510,511,512",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet32/1"
+                ],
+                "1x400G": [
+                    "Ethernet32/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet32/1"
+                ],
+                "2x400G": [
+                    "Ethernet32/1",
+                    "Ethernet32/5"
+                ],
+                "4x200G": [
+                    "Ethernet32/1",
+                    "Ethernet32/3",
+                    "Ethernet32/5",
+                    "Ethernet32/7"
+                ],
+                "8x100G": [
+                    "Ethernet32/1",
+                    "Ethernet32/2",
+                    "Ethernet32/3",
+                    "Ethernet32/4",
+                    "Ethernet32/5",
+                    "Ethernet32/6",
+                    "Ethernet32/7",
+                    "Ethernet32/8"
+                ]
+            }
+        },
+        "Ethernet256": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet33/1"
+                ],
+                "1x400G": [
+                    "Ethernet33/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet33/1"
+                ],
+                "2x400G": [
+                    "Ethernet33/1",
+                    "Ethernet33/5"
+                ],
+                "4x200G": [
+                    "Ethernet33/1",
+                    "Ethernet33/3",
+                    "Ethernet33/5",
+                    "Ethernet33/7"
+                ],
+                "8x100G": [
+                    "Ethernet33/1",
+                    "Ethernet33/2",
+                    "Ethernet33/3",
+                    "Ethernet33/4",
+                    "Ethernet33/5",
+                    "Ethernet33/6",
+                    "Ethernet33/7",
+                    "Ethernet33/8"
+                ]
+            }
+        },
+        "Ethernet264": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet34/1"
+                ],
+                "1x400G": [
+                    "Ethernet34/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet34/1"
+                ],
+                "2x400G": [
+                    "Ethernet34/1",
+                    "Ethernet34/5"
+                ],
+                "4x200G": [
+                    "Ethernet34/1",
+                    "Ethernet34/3",
+                    "Ethernet34/5",
+                    "Ethernet34/7"
+                ],
+                "8x100G": [
+                    "Ethernet34/1",
+                    "Ethernet34/2",
+                    "Ethernet34/3",
+                    "Ethernet34/4",
+                    "Ethernet34/5",
+                    "Ethernet34/6",
+                    "Ethernet34/7",
+                    "Ethernet34/8"
+                ]
+            }
+        },
+        "Ethernet272": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet35/1"
+                ],
+                "1x400G": [
+                    "Ethernet35/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet35/1"
+                ],
+                "2x400G": [
+                    "Ethernet35/1",
+                    "Ethernet35/5"
+                ],
+                "4x200G": [
+                    "Ethernet35/1",
+                    "Ethernet35/3",
+                    "Ethernet35/5",
+                    "Ethernet35/7"
+                ],
+                "8x100G": [
+                    "Ethernet35/1",
+                    "Ethernet35/2",
+                    "Ethernet35/3",
+                    "Ethernet35/4",
+                    "Ethernet35/5",
+                    "Ethernet35/6",
+                    "Ethernet35/7",
+                    "Ethernet35/8"
+                ]
+            }
+        },
+        "Ethernet280": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet36/1"
+                ],
+                "1x400G": [
+                    "Ethernet36/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet36/1"
+                ],
+                "2x400G": [
+                    "Ethernet36/1",
+                    "Ethernet36/5"
+                ],
+                "4x200G": [
+                    "Ethernet36/1",
+                    "Ethernet36/3",
+                    "Ethernet36/5",
+                    "Ethernet36/7"
+                ],
+                "8x100G": [
+                    "Ethernet36/1",
+                    "Ethernet36/2",
+                    "Ethernet36/3",
+                    "Ethernet36/4",
+                    "Ethernet36/5",
+                    "Ethernet36/6",
+                    "Ethernet36/7",
+                    "Ethernet36/8"
+                ]
+            }
+        },
+        "Ethernet288": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet37/1"
+                ],
+                "1x400G": [
+                    "Ethernet37/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet37/1"
+                ],
+                "2x400G": [
+                    "Ethernet37/1",
+                    "Ethernet37/5"
+                ],
+                "4x200G": [
+                    "Ethernet37/1",
+                    "Ethernet37/3",
+                    "Ethernet37/5",
+                    "Ethernet37/7"
+                ],
+                "8x100G": [
+                    "Ethernet37/1",
+                    "Ethernet37/2",
+                    "Ethernet37/3",
+                    "Ethernet37/4",
+                    "Ethernet37/5",
+                    "Ethernet37/6",
+                    "Ethernet37/7",
+                    "Ethernet37/8"
+                ]
+            }
+        },
+        "Ethernet296": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet38/1"
+                ],
+                "1x400G": [
+                    "Ethernet38/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet38/1"
+                ],
+                "2x400G": [
+                    "Ethernet38/1",
+                    "Ethernet38/5"
+                ],
+                "4x200G": [
+                    "Ethernet38/1",
+                    "Ethernet38/3",
+                    "Ethernet38/5",
+                    "Ethernet38/7"
+                ],
+                "8x100G": [
+                    "Ethernet38/1",
+                    "Ethernet38/2",
+                    "Ethernet38/3",
+                    "Ethernet38/4",
+                    "Ethernet38/5",
+                    "Ethernet38/6",
+                    "Ethernet38/7",
+                    "Ethernet38/8"
+                ]
+            }
+        },
+        "Ethernet304": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet39/1"
+                ],
+                "1x400G": [
+                    "Ethernet39/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet39/1"
+                ],
+                "2x400G": [
+                    "Ethernet39/1",
+                    "Ethernet39/5"
+                ],
+                "4x200G": [
+                    "Ethernet39/1",
+                    "Ethernet39/3",
+                    "Ethernet39/5",
+                    "Ethernet39/7"
+                ],
+                "8x100G": [
+                    "Ethernet39/1",
+                    "Ethernet39/2",
+                    "Ethernet39/3",
+                    "Ethernet39/4",
+                    "Ethernet39/5",
+                    "Ethernet39/6",
+                    "Ethernet39/7",
+                    "Ethernet39/8"
+                ]
+            }
+        },
+        "Ethernet312": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet40/1"
+                ],
+                "1x400G": [
+                    "Ethernet40/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet40/1"
+                ],
+                "2x400G": [
+                    "Ethernet40/1",
+                    "Ethernet40/5"
+                ],
+                "4x200G": [
+                    "Ethernet40/1",
+                    "Ethernet40/3",
+                    "Ethernet40/5",
+                    "Ethernet40/7"
+                ],
+                "8x100G": [
+                    "Ethernet40/1",
+                    "Ethernet40/2",
+                    "Ethernet40/3",
+                    "Ethernet40/4",
+                    "Ethernet40/5",
+                    "Ethernet40/6",
+                    "Ethernet40/7",
+                    "Ethernet40/8"
+                ]
+            }
+        },
+        "Ethernet320": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet41/1"
+                ],
+                "1x400G": [
+                    "Ethernet41/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet41/1"
+                ],
+                "2x400G": [
+                    "Ethernet41/1",
+                    "Ethernet41/5"
+                ],
+                "4x200G": [
+                    "Ethernet41/1",
+                    "Ethernet41/3",
+                    "Ethernet41/5",
+                    "Ethernet41/7"
+                ],
+                "8x100G": [
+                    "Ethernet41/1",
+                    "Ethernet41/2",
+                    "Ethernet41/3",
+                    "Ethernet41/4",
+                    "Ethernet41/5",
+                    "Ethernet41/6",
+                    "Ethernet41/7",
+                    "Ethernet41/8"
+                ]
+            }
+        },
+        "Ethernet328": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet42/1"
+                ],
+                "1x400G": [
+                    "Ethernet42/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet42/1"
+                ],
+                "2x400G": [
+                    "Ethernet42/1",
+                    "Ethernet42/5"
+                ],
+                "4x200G": [
+                    "Ethernet42/1",
+                    "Ethernet42/3",
+                    "Ethernet42/5",
+                    "Ethernet42/7"
+                ],
+                "8x100G": [
+                    "Ethernet42/1",
+                    "Ethernet42/2",
+                    "Ethernet42/3",
+                    "Ethernet42/4",
+                    "Ethernet42/5",
+                    "Ethernet42/6",
+                    "Ethernet42/7",
+                    "Ethernet42/8"
+                ]
+            }
+        },
+        "Ethernet336": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "185,186,187,188,189,190,191,192",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet43/1"
+                ],
+                "1x400G": [
+                    "Ethernet43/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet43/1"
+                ],
+                "2x400G": [
+                    "Ethernet43/1",
+                    "Ethernet43/5"
+                ],
+                "4x200G": [
+                    "Ethernet43/1",
+                    "Ethernet43/3",
+                    "Ethernet43/5",
+                    "Ethernet43/7"
+                ],
+                "8x100G": [
+                    "Ethernet43/1",
+                    "Ethernet43/2",
+                    "Ethernet43/3",
+                    "Ethernet43/4",
+                    "Ethernet43/5",
+                    "Ethernet43/6",
+                    "Ethernet43/7",
+                    "Ethernet43/8"
+                ]
+            }
+        },
+        "Ethernet344": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "169,170,171,172,173,174,175,176",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet44/1"
+                ],
+                "1x400G": [
+                    "Ethernet44/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet44/1"
+                ],
+                "2x400G": [
+                    "Ethernet44/1",
+                    "Ethernet44/5"
+                ],
+                "4x200G": [
+                    "Ethernet44/1",
+                    "Ethernet44/3",
+                    "Ethernet44/5",
+                    "Ethernet44/7"
+                ],
+                "8x100G": [
+                    "Ethernet44/1",
+                    "Ethernet44/2",
+                    "Ethernet44/3",
+                    "Ethernet44/4",
+                    "Ethernet44/5",
+                    "Ethernet44/6",
+                    "Ethernet44/7",
+                    "Ethernet44/8"
+                ]
+            }
+        },
+        "Ethernet352": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "217,218,219,220,221,222,223,224",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet45/1"
+                ],
+                "1x400G": [
+                    "Ethernet45/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet45/1"
+                ],
+                "2x400G": [
+                    "Ethernet45/1",
+                    "Ethernet45/5"
+                ],
+                "4x200G": [
+                    "Ethernet45/1",
+                    "Ethernet45/3",
+                    "Ethernet45/5",
+                    "Ethernet45/7"
+                ],
+                "8x100G": [
+                    "Ethernet45/1",
+                    "Ethernet45/2",
+                    "Ethernet45/3",
+                    "Ethernet45/4",
+                    "Ethernet45/5",
+                    "Ethernet45/6",
+                    "Ethernet45/7",
+                    "Ethernet45/8"
+                ]
+            }
+        },
+        "Ethernet360": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "201,202,203,204,205,206,207,208",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet46/1"
+                ],
+                "1x400G": [
+                    "Ethernet46/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet46/1"
+                ],
+                "2x400G": [
+                    "Ethernet46/1",
+                    "Ethernet46/5"
+                ],
+                "4x200G": [
+                    "Ethernet46/1",
+                    "Ethernet46/3",
+                    "Ethernet46/5",
+                    "Ethernet46/7"
+                ],
+                "8x100G": [
+                    "Ethernet46/1",
+                    "Ethernet46/2",
+                    "Ethernet46/3",
+                    "Ethernet46/4",
+                    "Ethernet46/5",
+                    "Ethernet46/6",
+                    "Ethernet46/7",
+                    "Ethernet46/8"
+                ]
+            }
+        },
+        "Ethernet368": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "241,242,243,244,245,246,247,248",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet47/1"
+                ],
+                "1x400G": [
+                    "Ethernet47/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet47/1"
+                ],
+                "2x400G": [
+                    "Ethernet47/1",
+                    "Ethernet47/5"
+                ],
+                "4x200G": [
+                    "Ethernet47/1",
+                    "Ethernet47/3",
+                    "Ethernet47/5",
+                    "Ethernet47/7"
+                ],
+                "8x100G": [
+                    "Ethernet47/1",
+                    "Ethernet47/2",
+                    "Ethernet47/3",
+                    "Ethernet47/4",
+                    "Ethernet47/5",
+                    "Ethernet47/6",
+                    "Ethernet47/7",
+                    "Ethernet47/8"
+                ]
+            }
+        },
+        "Ethernet376": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "225,226,227,228,229,230,231,232",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet48/1"
+                ],
+                "1x400G": [
+                    "Ethernet48/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet48/1"
+                ],
+                "2x400G": [
+                    "Ethernet48/1",
+                    "Ethernet48/5"
+                ],
+                "4x200G": [
+                    "Ethernet48/1",
+                    "Ethernet48/3",
+                    "Ethernet48/5",
+                    "Ethernet48/7"
+                ],
+                "8x100G": [
+                    "Ethernet48/1",
+                    "Ethernet48/2",
+                    "Ethernet48/3",
+                    "Ethernet48/4",
+                    "Ethernet48/5",
+                    "Ethernet48/6",
+                    "Ethernet48/7",
+                    "Ethernet48/8"
+                ]
+            }
+        },
+        "Ethernet384": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "281,282,283,284,285,286,287,288",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet49/1"
+                ],
+                "1x400G": [
+                    "Ethernet49/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet49/1"
+                ],
+                "2x400G": [
+                    "Ethernet49/1",
+                    "Ethernet49/5"
+                ],
+                "4x200G": [
+                    "Ethernet49/1",
+                    "Ethernet49/3",
+                    "Ethernet49/5",
+                    "Ethernet49/7"
+                ],
+                "8x100G": [
+                    "Ethernet49/1",
+                    "Ethernet49/2",
+                    "Ethernet49/3",
+                    "Ethernet49/4",
+                    "Ethernet49/5",
+                    "Ethernet49/6",
+                    "Ethernet49/7",
+                    "Ethernet49/8"
+                ]
+            }
+        },
+        "Ethernet392": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "265,266,267,268,269,270,271,272",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet50/1"
+                ],
+                "1x400G": [
+                    "Ethernet50/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet50/1"
+                ],
+                "2x400G": [
+                    "Ethernet50/1",
+                    "Ethernet50/5"
+                ],
+                "4x200G": [
+                    "Ethernet50/1",
+                    "Ethernet50/3",
+                    "Ethernet50/5",
+                    "Ethernet50/7"
+                ],
+                "8x100G": [
+                    "Ethernet50/1",
+                    "Ethernet50/2",
+                    "Ethernet50/3",
+                    "Ethernet50/4",
+                    "Ethernet50/5",
+                    "Ethernet50/6",
+                    "Ethernet50/7",
+                    "Ethernet50/8"
+                ]
+            }
+        },
+        "Ethernet400": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "305,306,307,308,309,310,311,312",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet51/1"
+                ],
+                "1x400G": [
+                    "Ethernet51/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet51/1"
+                ],
+                "2x400G": [
+                    "Ethernet51/1",
+                    "Ethernet51/5"
+                ],
+                "4x200G": [
+                    "Ethernet51/1",
+                    "Ethernet51/3",
+                    "Ethernet51/5",
+                    "Ethernet51/7"
+                ],
+                "8x100G": [
+                    "Ethernet51/1",
+                    "Ethernet51/2",
+                    "Ethernet51/3",
+                    "Ethernet51/4",
+                    "Ethernet51/5",
+                    "Ethernet51/6",
+                    "Ethernet51/7",
+                    "Ethernet51/8"
+                ]
+            }
+        },
+        "Ethernet408": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "289,290,291,292,293,294,295,296",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet52/1"
+                ],
+                "1x400G": [
+                    "Ethernet52/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet52/1"
+                ],
+                "2x400G": [
+                    "Ethernet52/1",
+                    "Ethernet52/5"
+                ],
+                "4x200G": [
+                    "Ethernet52/1",
+                    "Ethernet52/3",
+                    "Ethernet52/5",
+                    "Ethernet52/7"
+                ],
+                "8x100G": [
+                    "Ethernet52/1",
+                    "Ethernet52/2",
+                    "Ethernet52/3",
+                    "Ethernet52/4",
+                    "Ethernet52/5",
+                    "Ethernet52/6",
+                    "Ethernet52/7",
+                    "Ethernet52/8"
+                ]
+            }
+        },
+        "Ethernet416": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "337,338,339,340,341,342,343,344",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet53/1"
+                ],
+                "1x400G": [
+                    "Ethernet53/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet53/1"
+                ],
+                "2x400G": [
+                    "Ethernet53/1",
+                    "Ethernet53/5"
+                ],
+                "4x200G": [
+                    "Ethernet53/1",
+                    "Ethernet53/3",
+                    "Ethernet53/5",
+                    "Ethernet53/7"
+                ],
+                "8x100G": [
+                    "Ethernet53/1",
+                    "Ethernet53/2",
+                    "Ethernet53/3",
+                    "Ethernet53/4",
+                    "Ethernet53/5",
+                    "Ethernet53/6",
+                    "Ethernet53/7",
+                    "Ethernet53/8"
+                ]
+            }
+        },
+        "Ethernet424": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "321,322,323,324,325,326,327,328",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet54/1"
+                ],
+                "1x400G": [
+                    "Ethernet54/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet54/1"
+                ],
+                "2x400G": [
+                    "Ethernet54/1",
+                    "Ethernet54/5"
+                ],
+                "4x200G": [
+                    "Ethernet54/1",
+                    "Ethernet54/3",
+                    "Ethernet54/5",
+                    "Ethernet54/7"
+                ],
+                "8x100G": [
+                    "Ethernet54/1",
+                    "Ethernet54/2",
+                    "Ethernet54/3",
+                    "Ethernet54/4",
+                    "Ethernet54/5",
+                    "Ethernet54/6",
+                    "Ethernet54/7",
+                    "Ethernet54/8"
+                ]
+            }
+        },
+        "Ethernet432": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "369,370,371,372,373,374,375,376",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet55/1"
+                ],
+                "1x400G": [
+                    "Ethernet55/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet55/1"
+                ],
+                "2x400G": [
+                    "Ethernet55/1",
+                    "Ethernet55/5"
+                ],
+                "4x200G": [
+                    "Ethernet55/1",
+                    "Ethernet55/3",
+                    "Ethernet55/5",
+                    "Ethernet55/7"
+                ],
+                "8x100G": [
+                    "Ethernet55/1",
+                    "Ethernet55/2",
+                    "Ethernet55/3",
+                    "Ethernet55/4",
+                    "Ethernet55/5",
+                    "Ethernet55/6",
+                    "Ethernet55/7",
+                    "Ethernet55/8"
+                ]
+            }
+        },
+        "Ethernet440": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "353,354,355,356,357,358,359,360",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet56/1"
+                ],
+                "1x400G": [
+                    "Ethernet56/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet56/1"
+                ],
+                "2x400G": [
+                    "Ethernet56/1",
+                    "Ethernet56/5"
+                ],
+                "4x200G": [
+                    "Ethernet56/1",
+                    "Ethernet56/3",
+                    "Ethernet56/5",
+                    "Ethernet56/7"
+                ],
+                "8x100G": [
+                    "Ethernet56/1",
+                    "Ethernet56/2",
+                    "Ethernet56/3",
+                    "Ethernet56/4",
+                    "Ethernet56/5",
+                    "Ethernet56/6",
+                    "Ethernet56/7",
+                    "Ethernet56/8"
+                ]
+            }
+        },
+        "Ethernet448": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "401,402,403,404,405,406,407,408",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet57/1"
+                ],
+                "1x400G": [
+                    "Ethernet57/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet57/1"
+                ],
+                "2x400G": [
+                    "Ethernet57/1",
+                    "Ethernet57/5"
+                ],
+                "4x200G": [
+                    "Ethernet57/1",
+                    "Ethernet57/3",
+                    "Ethernet57/5",
+                    "Ethernet57/7"
+                ],
+                "8x100G": [
+                    "Ethernet57/1",
+                    "Ethernet57/2",
+                    "Ethernet57/3",
+                    "Ethernet57/4",
+                    "Ethernet57/5",
+                    "Ethernet57/6",
+                    "Ethernet57/7",
+                    "Ethernet57/8"
+                ]
+            }
+        },
+        "Ethernet456": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "385,386,387,388,389,390,391,392",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet58/1"
+                ],
+                "1x400G": [
+                    "Ethernet58/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet58/1"
+                ],
+                "2x400G": [
+                    "Ethernet58/1",
+                    "Ethernet58/5"
+                ],
+                "4x200G": [
+                    "Ethernet58/1",
+                    "Ethernet58/3",
+                    "Ethernet58/5",
+                    "Ethernet58/7"
+                ],
+                "8x100G": [
+                    "Ethernet58/1",
+                    "Ethernet58/2",
+                    "Ethernet58/3",
+                    "Ethernet58/4",
+                    "Ethernet58/5",
+                    "Ethernet58/6",
+                    "Ethernet58/7",
+                    "Ethernet58/8"
+                ]
+            }
+        },
+        "Ethernet464": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "433,434,435,436,437,438,439,440",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet59/1"
+                ],
+                "1x400G": [
+                    "Ethernet59/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet59/1"
+                ],
+                "2x400G": [
+                    "Ethernet59/1",
+                    "Ethernet59/5"
+                ],
+                "4x200G": [
+                    "Ethernet59/1",
+                    "Ethernet59/3",
+                    "Ethernet59/5",
+                    "Ethernet59/7"
+                ],
+                "8x100G": [
+                    "Ethernet59/1",
+                    "Ethernet59/2",
+                    "Ethernet59/3",
+                    "Ethernet59/4",
+                    "Ethernet59/5",
+                    "Ethernet59/6",
+                    "Ethernet59/7",
+                    "Ethernet59/8"
+                ]
+            }
+        },
+        "Ethernet472": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "417,418,419,420,421,422,423,424",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet60/1"
+                ],
+                "1x400G": [
+                    "Ethernet60/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet60/1"
+                ],
+                "2x400G": [
+                    "Ethernet60/1",
+                    "Ethernet60/5"
+                ],
+                "4x200G": [
+                    "Ethernet60/1",
+                    "Ethernet60/3",
+                    "Ethernet60/5",
+                    "Ethernet60/7"
+                ],
+                "8x100G": [
+                    "Ethernet60/1",
+                    "Ethernet60/2",
+                    "Ethernet60/3",
+                    "Ethernet60/4",
+                    "Ethernet60/5",
+                    "Ethernet60/6",
+                    "Ethernet60/7",
+                    "Ethernet60/8"
+                ]
+            }
+        },
+        "Ethernet480": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "465,466,467,468,469,470,471,472",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet61/1"
+                ],
+                "1x400G": [
+                    "Ethernet61/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet61/1"
+                ],
+                "2x400G": [
+                    "Ethernet61/1",
+                    "Ethernet61/5"
+                ],
+                "4x200G": [
+                    "Ethernet61/1",
+                    "Ethernet61/3",
+                    "Ethernet61/5",
+                    "Ethernet61/7"
+                ],
+                "8x100G": [
+                    "Ethernet61/1",
+                    "Ethernet61/2",
+                    "Ethernet61/3",
+                    "Ethernet61/4",
+                    "Ethernet61/5",
+                    "Ethernet61/6",
+                    "Ethernet61/7",
+                    "Ethernet61/8"
+                ]
+            }
+        },
+        "Ethernet488": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "449,450,451,452,453,454,455,456",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet62/1"
+                ],
+                "1x400G": [
+                    "Ethernet62/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet62/1"
+                ],
+                "2x400G": [
+                    "Ethernet62/1",
+                    "Ethernet62/5"
+                ],
+                "4x200G": [
+                    "Ethernet62/1",
+                    "Ethernet62/3",
+                    "Ethernet62/5",
+                    "Ethernet62/7"
+                ],
+                "8x100G": [
+                    "Ethernet62/1",
+                    "Ethernet62/2",
+                    "Ethernet62/3",
+                    "Ethernet62/4",
+                    "Ethernet62/5",
+                    "Ethernet62/6",
+                    "Ethernet62/7",
+                    "Ethernet62/8"
+                ]
+            }
+        },
+        "Ethernet496": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "497,498,499,500,501,502,503,504",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet63/1"
+                ],
+                "1x400G": [
+                    "Ethernet63/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet63/1"
+                ],
+                "2x400G": [
+                    "Ethernet63/1",
+                    "Ethernet63/5"
+                ],
+                "4x200G": [
+                    "Ethernet63/1",
+                    "Ethernet63/3",
+                    "Ethernet63/5",
+                    "Ethernet63/7"
+                ],
+                "8x100G": [
+                    "Ethernet63/1",
+                    "Ethernet63/2",
+                    "Ethernet63/3",
+                    "Ethernet63/4",
+                    "Ethernet63/5",
+                    "Ethernet63/6",
+                    "Ethernet63/7",
+                    "Ethernet63/8"
+                ]
+            }
+        },
+        "Ethernet504": {
+            "index": "64,64,64,64,64,64,64,64",
+            "lanes": "481,482,483,484,485,486,487,488",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet64/1"
+                ],
+                "1x400G": [
+                    "Ethernet64/1"
+                ],
+                "1x100G(4)": [
+                    "Ethernet64/1"
+                ],
+                "2x400G": [
+                    "Ethernet64/1",
+                    "Ethernet64/5"
+                ],
+                "4x200G": [
+                    "Ethernet64/1",
+                    "Ethernet64/3",
+                    "Ethernet64/5",
+                    "Ethernet64/7"
+                ],
+                "8x100G": [
+                    "Ethernet64/1",
+                    "Ethernet64/2",
+                    "Ethernet64/3",
+                    "Ethernet64/4",
+                    "Ethernet64/5",
+                    "Ethernet64/6",
+                    "Ethernet64/7",
+                    "Ethernet64/8"
+                ]
+            }
+        },
+        "Ethernet512": {
+            "index": "65",
+            "lanes": "515",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet65"
+                ]
+            }
+        },
+        "Ethernet513": {
+            "index": "66",
+            "lanes": "516",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet66"
+                ]
+            }
+        }
+    },
+    "asic_sensors": {
+        "poll_interval": "10",
+        "poll_admin_status": "enable"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform_asic b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform_asic
new file mode 100755
index 00000000000..96046765276
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform_env.conf b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform_env.conf
new file mode 100755
index 00000000000..b4f7155e6b1
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform_env.conf
@@ -0,0 +1,3 @@
+SYNCD_SHM_SIZE=512m
+is_ltsw_chip=1
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform_reboot b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform_reboot
new file mode 100755
index 00000000000..06fba6c414e
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/platform_reboot
@@ -0,0 +1,12 @@
+#!/bin/bash
+
+dd=$(date -u "+%y%m%d%H%M%S")
+i2cset -y 0 0x68 0x03 0x${dd:10:2}
+i2cset -y 0 0x68 0x04 0x${dd:8:2}
+i2cset -y 0 0x68 0x05 0x${dd:6:2}
+i2cset -y 0 0x68 0x06 0x${dd:4:2}
+i2cset -y 0 0x68 0x08 0x${dd:2:2}
+i2cset -y 0 0x68 0x09 0x${dd:0:2}
+i2cset -y 0 0x68 0x0F 0x38
+
+exec /sbin/reboot
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/plugins/eeprom.py b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/plugins/eeprom.py
new file mode 100755
index 00000000000..7b357e673e9
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/plugins/eeprom.py
@@ -0,0 +1,16 @@
+try:
+    import os
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class board(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, name, path, cpld_root, ro):
+        self.eeprom_path = "/sys/bus/i2c/devices/4-0054/eeprom"
+        if not os.path.exists(self.eeprom_path):
+            file = "/sys/bus/i2c/devices/i2c-4/new_device"
+            with open(file, 'w') as f:
+                f.write('24c02 0x54\n')
+        super(board, self).__init__(self.eeprom_path, 0, '', True)
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/plugins/led_control.py
new file mode 100755
index 00000000000..234e0d691ea
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/plugins/led_control.py
@@ -0,0 +1,113 @@
+"""
+    led_control.py
+
+    Platform-specific LED control functionality for SONiC
+"""
+
+try:
+    from sonic_led.led_control_base import LedControlBase
+    import os
+    import time
+    import syslog
+    from mmap import *
+    import sonic_platform.platform
+    import sonic_platform.chassis
+except ImportError as e:
+    raise ImportError(str(e) + " - required module not found")
+
+FAN_DRAWERS = 4
+FANS_PER_DRAWER = 2
+FPGA_DIR = "/sys/kernel/sys_fpga/"
+
+def DBG_PRINT(str):
+    syslog.openlog("nokia-led")
+    syslog.syslog(syslog.LOG_INFO, str)
+    syslog.closelog()
+
+class LedControl(LedControlBase):
+    """Platform specific LED control class"""
+
+    # Constructor
+    def __init__(self):
+        self.chassis = sonic_platform.platform.Platform().get_chassis()
+        self._initDefaultConfig()
+
+    def _initDefaultConfig(self):
+        # The fan tray leds and system led managed by new chassis class API
+        # leaving only a couple other front panel leds to be done old style
+        DBG_PRINT("starting system leds")
+        self._initSystemLed()
+        DBG_PRINT(" led done")
+
+    def _read_sysfs_file(self, sysfs_file):
+        # On successful read, returns the value read from given
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'r') as fd:
+                rv = fd.read()
+                fd.close()
+        except Exception as e:
+            rv = 'ERR'
+
+        rv = rv.rstrip('\r\n')
+        rv = rv.lstrip(" ")
+        return rv
+
+    def _write_sysfs_file(self, sysfs_file, value):
+        # On successful write, the value read will be written on
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'w') as fd:
+                rv = fd.write(value)
+                fd.close()
+        except Exception as e:
+            rv = 'ERR'
+
+        return rv
+    
+    def _initSystemLed(self):
+        # Front Panel System LEDs setting
+        oldfan = 0xf    # 0=amber, 1=green
+        oldpsu = 0xf    # 0=amber, 1=green
+
+        # Write sys led
+        status  = self._write_sysfs_file(FPGA_DIR + 'led_sys', "3")
+        if status == "ERR":
+            DBG_PRINT(" System LED NOT set correctly")
+        else:
+            DBG_PRINT(" System LED set O.K. ")
+        
+        # Timer loop to monitor and set front panel Status, Fan, and PSU LEDs
+        while True:
+            # Front Panel FAN Panel LED setting
+            good_fan = 0
+            for fan in self.chassis._fan_list:
+                if fan.get_status() == True:
+                    good_fan = good_fan + 1
+            
+            if (good_fan == FAN_DRAWERS * FANS_PER_DRAWER):
+                if (os.path.isfile(FPGA_DIR + "led_fan")):
+                    if oldfan != 0x1:
+                        self._write_sysfs_file(FPGA_DIR + "led_fan", "1")
+                        oldfan = 0x1
+                else:
+                    oldfan = 0xf
+            else:
+                if (os.path.isfile(FPGA_DIR + "led_fan")):
+                    if oldfan != 0x0:
+                        self._write_sysfs_file(FPGA_DIR + "led_fan", "2")
+                        oldfan = 0x0
+                else:
+                    oldfan = 0xf
+
+            
+            time.sleep(6)
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/system_health_monitoring_config.json
new file mode 100755
index 00000000000..d5f3a7b9830
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/system_health_monitoring_config.json
@@ -0,0 +1,14 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "blinking green"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/thermal_policy.json
new file mode 100755
index 00000000000..28d5cc190bd
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64o-r0/thermal_policy.json
@@ -0,0 +1,67 @@
+{   
+    "thermal_control_algorithm": {
+        "run_at_boot_up": "false",
+        "fan_speed_when_suspend": "60"
+    },
+    "info_types": [
+        {
+            "type": "fan_info"
+        },
+        {
+            "type": "thermal_info"
+        },
+        {
+            "type": "chassis_info"
+        }
+    ],
+    "policies": [
+        {
+            "name": "any fan absence",
+            "conditions": [
+                {
+                    "type": "fan.any.absence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal_control.control",
+                    "status": "false"
+                },
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "100"
+                }
+            ]
+        },
+        {
+            "name": "all fan presence",
+            "conditions": [
+                {
+                    "type": "fan.all.presence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal.temp_check_and_set_all_fan_speed",
+                    "default_speed": "45",
+                    "threshold1_speed": "60",
+                    "threshold2_speed": "70",
+                    "hightemp_speed": "90"
+                }
+            ]
+        },
+	{
+            "name": "temp over high critical threshold",
+            "conditions": [
+                {
+                    "type": "thermal.over.high_critical_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "switch.shutdown"
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/context_config.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/context_config.json
new file mode 100644
index 00000000000..444b842d598
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/context_config.json
@@ -0,0 +1,58 @@
+{
+    "CONTEXTS": [
+        {
+            "guid" : 0,
+            "name" : "asic0",
+            "dbAsic" : "ASIC_DB",
+            "dbCounters" : "COUNTERS_DB",
+            "dbFlex": "FLEX_COUNTER_DB",
+            "dbState" : "STATE_DB",
+            "zmq_enable" : false,
+            "zmq_endpoint": "tcp://127.0.0.1:5555",
+            "zmq_ntf_endpoint": "tcp://127.0.0.1:5556",
+            "switches": [
+                {
+                    "index" : 0,
+                    "hwinfo" : ""
+                }
+            ]
+        },
+        {
+            "guid" : 1,
+            "name" : "phys",
+            "dbAsic" : "GB_ASIC_DB",
+            "dbCounters" : "GB_COUNTERS_DB",
+            "dbFlex": "GB_FLEX_COUNTER_DB",
+            "dbState" : "STATE_DB",
+            "zmq_enable" : false,
+            "zmq_endpoint": "tcp://127.0.0.1:5565",
+            "zmq_ntf_endpoint": "tcp://127.0.0.1:5566",
+            "switches": [
+                {
+                    "index" : 0,
+                    "hwinfo" : "0x120"
+                },
+                {
+                    "index" : 1,
+                    "hwinfo" : "0x140"
+                },
+                {
+                    "index" : 2,
+                    "hwinfo" : "0x160"
+                },
+                {
+                    "index" : 3,
+                    "hwinfo" : "0x200"
+                },
+                {
+                    "index" : 4,
+                    "hwinfo" : "0x220"
+                },
+                {
+                    "index" : 5,
+                    "hwinfo" : "0x240"
+                }
+            ]
+        }
+   ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/gearbox_config.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/gearbox_config.json
new file mode 100644
index 00000000000..a12bf1204c1
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/gearbox_config.json
@@ -0,0 +1,588 @@
+{
+  "phys": [
+    {
+      "phy_id": 1,
+      "name": "phy1",
+      "address": "1",
+      "lib_name": "libsai.so",
+      "firmware_path": "",
+      "config_file": "/usr/share/sonic/hwsku/phy1_config.json",
+      "sai_init_config_file": "",
+      "phy_access": "mdio",
+      "bus_id": 0,
+      "context_id": 1,
+      "hwinfo": "0x120"
+    },
+    {
+      "phy_id": 2,
+      "name": "phy2",
+      "address": "2",
+      "lib_name": "libsai.so",
+      "firmware_path": "",
+      "config_file": "/usr/share/sonic/hwsku/phy2_config.json",
+      "sai_init_config_file": "",
+      "phy_access": "mdio",
+      "bus_id": 0,
+      "context_id": 1,
+      "hwinfo": "0x140"
+    },
+    {
+      "phy_id": 3,
+      "name": "phy3",
+      "address": "3",
+      "lib_name": "libsai.so",
+      "firmware_path": "",
+      "config_file": "/usr/share/sonic/hwsku/phy3_config.json",
+      "sai_init_config_file": "",
+      "phy_access": "mdio",
+      "bus_id": 0,
+      "context_id": 1,
+      "hwinfo": "0x160"
+    },
+    {
+      "phy_id": 4,
+      "name": "phy4",
+      "address": "4",
+      "lib_name": "libsai.so",
+      "firmware_path": "",
+      "config_file": "/usr/share/sonic/hwsku/phy4_config.json",
+      "sai_init_config_file": "",
+      "phy_access": "mdio",
+      "bus_id": 0,
+      "context_id": 1,
+      "hwinfo": "0x200"
+    },
+    {
+      "phy_id": 5,
+      "name": "phy5",
+      "address": "5",
+      "lib_name": "libsai.so",
+      "firmware_path": "",
+      "config_file": "/usr/share/sonic/hwsku/phy5_config.json",
+      "sai_init_config_file": "",
+      "phy_access": "mdio",
+      "bus_id": 0,
+      "context_id": 1,
+      "hwinfo": "0x220"
+    },
+    {
+      "phy_id": 6,
+      "name": "phy6",
+      "address": "6",
+      "lib_name": "libsai.so",
+      "firmware_path": "",
+      "config_file": "/usr/share/sonic/hwsku/phy6_config.json",
+      "sai_init_config_file": "",
+      "phy_access": "mdio",
+      "bus_id": 0,
+      "context_id": 1,
+      "hwinfo": "0x240"
+    }
+  ],
+  "interfaces": [
+    {
+      "name": "Ethernet0",
+      "index": 1,
+      "phy_id": 1,
+      "system_lanes": [18,19],
+      "line_lanes": [4,5,6,7],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet8",
+      "index": 2,
+      "phy_id": 1,
+      "system_lanes": [16,17],
+      "line_lanes": [0,1,2,3],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet16",
+      "index": 3,
+      "phy_id": 1,
+      "system_lanes": [22,23],
+      "line_lanes": [12,13,14,15],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet24",
+      "index": 4,
+      "phy_id": 1,
+      "system_lanes": [20,21],
+      "line_lanes": [8,9,10,11],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet32",
+      "index": 5,
+      "phy_id": 2,
+      "system_lanes": [42,43],
+      "line_lanes": [28,29,30,31],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet40",
+      "index": 6,
+      "phy_id": 2,
+      "system_lanes": [40,41],
+      "line_lanes": [24,25,26,27],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet48",
+      "index": 7,
+      "phy_id": 2,
+      "system_lanes": [46,47],
+      "line_lanes": [36,37,38,39],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet56",
+      "index": 8,
+      "phy_id": 2,
+      "system_lanes": [44,45],
+      "line_lanes": [32,33,34,35],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet64",
+      "index": 9,
+      "phy_id": 3,
+      "system_lanes": [66,67],
+      "line_lanes": [52,53,54,55],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet72",
+      "index": 10,
+      "phy_id": 3,
+      "system_lanes": [64,65],
+      "line_lanes": [48,49,50,51],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet80",
+      "index": 11,
+      "phy_id": 3,
+      "system_lanes": [70,71],
+      "line_lanes": [60,61,62,63],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet88",
+      "index": 12,
+      "phy_id": 3,
+      "system_lanes": [68,69],
+      "line_lanes": [56,57,58,59],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet96",
+      "index": 13,
+      "phy_id": 4,
+      "system_lanes": [90,91],
+      "line_lanes": [76,77,78,79],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet104",
+      "index": 14,
+      "phy_id": 4,
+      "system_lanes": [88,89],
+      "line_lanes": [72,73,74,75],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet112",
+      "index": 15,
+      "phy_id": 4,
+      "system_lanes": [94,95],
+      "line_lanes": [84,85,86,87],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet120",
+      "index": 16,
+      "phy_id": 4,
+      "system_lanes": [92,93],
+      "line_lanes": [80,81,82,83],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet128",
+      "index": 17,
+      "phy_id": 5,
+      "system_lanes": [114,115],
+      "line_lanes": [100,101,102,103],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet136",
+      "index": 18,
+      "phy_id": 5,
+      "system_lanes": [112,113],
+      "line_lanes": [96,97,98,99],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet144",
+      "index": 19,
+      "phy_id": 5,
+      "system_lanes": [118,119],
+      "line_lanes": [108,109,110,111],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet152",
+      "index": 20,
+      "phy_id": 5,
+      "system_lanes": [116,117],
+      "line_lanes": [104,105,106,107],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet160",
+      "index": 21,
+      "phy_id": 6,
+      "system_lanes": [138,139],
+      "line_lanes": [124,125,126,127],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet168",
+      "index": 22,
+      "phy_id": 6,
+      "system_lanes": [136,137],
+      "line_lanes": [120,121,122,123],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet176",
+      "index": 23,
+      "phy_id": 6,
+      "system_lanes": [142,143],
+      "line_lanes": [132,133,134,135],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    },
+    {
+      "name": "Ethernet184",
+      "index": 24,
+      "phy_id": 6,
+      "system_lanes": [140,141],
+      "line_lanes": [128,129,130,131],
+      "system_tx_fir_pre3": [0,0],
+      "system_tx_fir_pre2": [0,0],
+      "system_tx_fir_pre1": [-8,-8],
+      "system_tx_fir_main": [132,132],
+      "system_tx_fir_post1": [0,0],
+      "system_tx_fir_post2": [0,0],
+      "system_tx_fir_post3": [0,0],
+      "line_tx_fir_pre3": [0,0,0,0],
+      "line_tx_fir_pre2": [0,0,0,0],
+      "line_tx_fir_pre1": [-8,-8,-8,-8],
+      "line_tx_fir_main": [75,75,75,75],
+      "line_tx_fir_post1": [0,0,0,0],
+      "line_tx_fir_post2": [0,0,0,0],
+      "line_tx_fir_post3": [0,0,0,0]
+    }
+  ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/millenio.bcm b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/millenio.bcm
new file mode 100644
index 00000000000..b7fe1302d1f
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/millenio.bcm
@@ -0,0 +1,196 @@
+### PHY CONFIGURATION FILE
+### Please refer to config_file_format.txt in the top level folder for configuration file format
+
+### PHY CONFIGURATIONS
+phy_init_config_chip_id:288 = 81724
+phy_init_config_chip_id:320 = 81724
+phy_init_config_chip_id:352 = 81724
+phy_init_config_chip_id:512 = 81724
+phy_init_config_chip_id:544 = 81724
+phy_init_config_chip_id:576 = 81724
+
+### LANE CONFIGURATIONS PHY1
+#----------------------------------------------------------------------------------------------------------------
+#  Lane_Property  : Global_Lane = PHY_ID, IF_Side, Local_Lane, Tx_Lane_Map, Rx_Lane_Map, Tx_Polarity, Rx_Polarity
+#----------------------------------------------------------------------------------------------------------------
+# Line side lane properties:
+phy_lane_property :     0       =  288,      0,         0,          0,           0,            1,           0
+phy_lane_property :     1       =  288,      0,         1,          1,           1,            1,           0
+phy_lane_property :     2       =  288,      0,         2,          2,           2,            1,           0
+phy_lane_property :     3       =  288,      0,         3,          3,           3,            1,           0
+phy_lane_property :     4       =  288,      0,         4,          4,           4,            1,           0
+phy_lane_property :     5       =  288,      0,         5,          5,           5,            1,           0
+phy_lane_property :     6       =  288,      0,         6,          6,           6,            1,           0
+phy_lane_property :     7       =  288,      0,         7,          7,           7,            1,           0
+phy_lane_property :     8       =  288,      0,         8,          8,           8,            1,           0
+phy_lane_property :     9       =  288,      0,         9,          9,           9,            1,           0
+phy_lane_property :     10      =  288,      0,         10,         10,          10,           1,           0
+phy_lane_property :     11      =  288,      0,         11,         11,          11,           1,           0
+phy_lane_property :     12      =  288,      0,         12,         12,          12,           1,           0
+phy_lane_property :     13      =  288,      0,         13,         13,          13,           1,           0
+phy_lane_property :     14      =  288,      0,         14,         14,          14,           1,           0
+phy_lane_property :     15      =  288,      0,         15,         15,          15,           1,           0
+# System side lanes properties:
+phy_lane_property :     16      =  288,      1,         0,          0,           0,            0,           0
+phy_lane_property :     17      =  288,      1,         1,          1,           1,            0,           0
+phy_lane_property :     18      =  288,      1,         2,          2,           2,            0,           0
+phy_lane_property :     19      =  288,      1,         3,          3,           3,            0,           0
+phy_lane_property :     20      =  288,      1,         4,          4,           4,            0,           0
+phy_lane_property :     21      =  288,      1,         5,          5,           5,            0,           0
+phy_lane_property :     22      =  288,      1,         6,          6,           6,            0,           0
+phy_lane_property :     23      =  288,      1,         7,          7,           7,            0,           0
+
+### LANE CONFIGURATIONS PHY2
+#----------------------------------------------------------------------------------------------------------------
+#  Lane_Property  : Global_Lane = PHY_ID, IF_Side, Local_Lane, Tx_Lane_Map, Rx_Lane_Map, Tx_Polarity, Rx_Polarity
+#----------------------------------------------------------------------------------------------------------------
+# Line side lane properties:
+phy_lane_property :     24      =  320,      0,         0,          0,           0,            1,           0
+phy_lane_property :     25      =  320,      0,         1,          1,           1,            1,           0
+phy_lane_property :     26      =  320,      0,         2,          2,           2,            1,           0
+phy_lane_property :     27      =  320,      0,         3,          3,           3,            1,           0
+phy_lane_property :     28      =  320,      0,         4,          4,           4,            1,           0
+phy_lane_property :     29      =  320,      0,         5,          5,           5,            1,           0
+phy_lane_property :     30      =  320,      0,         6,          6,           6,            1,           0
+phy_lane_property :     31      =  320,      0,         7,          7,           7,            1,           0
+phy_lane_property :     32      =  320,      0,         8,          8,           8,            1,           0
+phy_lane_property :     33      =  320,      0,         9,          9,           9,            1,           0
+phy_lane_property :     34      =  320,      0,         10,         10,          10,           1,           0
+phy_lane_property :     35      =  320,      0,         11,         11,          11,           1,           0
+phy_lane_property :     36      =  320,      0,         12,         12,          12,           1,           0
+phy_lane_property :     37      =  320,      0,         13,         13,          13,           1,           0
+phy_lane_property :     38      =  320,      0,         14,         14,          14,           1,           0
+phy_lane_property :     39      =  320,      0,         15,         15,          15,           1,           0
+# System side lanes properties:
+phy_lane_property :     40      =  320,      1,         0,          0,           0,            0,           0
+phy_lane_property :     41      =  320,      1,         1,          1,           1,            0,           0
+phy_lane_property :     42      =  320,      1,         2,          2,           2,            0,           0
+phy_lane_property :     43      =  320,      1,         3,          3,           3,            0,           0
+phy_lane_property :     44      =  320,      1,         4,          4,           4,            0,           0
+phy_lane_property :     45      =  320,      1,         5,          5,           5,            0,           0
+phy_lane_property :     46      =  320,      1,         6,          6,           6,            0,           0
+phy_lane_property :     47      =  320,      1,         7,          7,           7,            0,           0
+
+### LANE CONFIGURATIONS PHY3
+#----------------------------------------------------------------------------------------------------------------
+#  Lane_Property  : Global_Lane = PHY_ID, IF_Side, Local_Lane, Tx_Lane_Map, Rx_Lane_Map, Tx_Polarity, Rx_Polarity
+#----------------------------------------------------------------------------------------------------------------
+# Line side lane properties:
+phy_lane_property :     48      =  352,      0,         0,          0,           0,            1,           0
+phy_lane_property :     49      =  352,      0,         1,          1,           1,            1,           0
+phy_lane_property :     50      =  352,      0,         2,          2,           2,            1,           0
+phy_lane_property :     51      =  352,      0,         3,          3,           3,            1,           0
+phy_lane_property :     52      =  352,      0,         4,          4,           4,            1,           0
+phy_lane_property :     53      =  352,      0,         5,          5,           5,            1,           0
+phy_lane_property :     54      =  352,      0,         6,          6,           6,            1,           0
+phy_lane_property :     55      =  352,      0,         7,          7,           7,            1,           0
+phy_lane_property :     56      =  352,      0,         8,          8,           8,            1,           0
+phy_lane_property :     57      =  352,      0,         9,          9,           9,            1,           0
+phy_lane_property :     58      =  352,      0,         10,         10,          10,           1,           0
+phy_lane_property :     59      =  352,      0,         11,         11,          11,           1,           0
+phy_lane_property :     60      =  352,      0,         12,         12,          12,           1,           0
+phy_lane_property :     61      =  352,      0,         13,         13,          13,           1,           0
+phy_lane_property :     62      =  352,      0,         14,         14,          14,           1,           0
+phy_lane_property :     63      =  352,      0,         15,         15,          15,           1,           0
+# System side lanes properties:
+phy_lane_property :     64      =  352,      1,         0,          0,           0,            0,           0
+phy_lane_property :     65      =  352,      1,         1,          1,           1,            0,           0
+phy_lane_property :     66      =  352,      1,         2,          2,           2,            0,           0
+phy_lane_property :     67      =  352,      1,         3,          3,           3,            0,           0
+phy_lane_property :     68      =  352,      1,         4,          4,           4,            0,           0
+phy_lane_property :     69      =  352,      1,         5,          5,           5,            0,           0
+phy_lane_property :     70      =  352,      1,         6,          6,           6,            0,           0
+phy_lane_property :     71      =  352,      1,         7,          7,           7,            0,           0
+
+### LANE CONFIGURATIONS PHY4
+#----------------------------------------------------------------------------------------------------------------
+#  Lane_Property  : Global_Lane = PHY_ID, IF_Side, Local_Lane, Tx_Lane_Map, Rx_Lane_Map, Tx_Polarity, Rx_Polarity
+#----------------------------------------------------------------------------------------------------------------
+# Line side lane properties:
+phy_lane_property :     72      =  512,      0,         0,          0,           0,            1,           0
+phy_lane_property :     73      =  512,      0,         1,          1,           1,            1,           0
+phy_lane_property :     74      =  512,      0,         2,          2,           2,            1,           0
+phy_lane_property :     75      =  512,      0,         3,          3,           3,            1,           0
+phy_lane_property :     76      =  512,      0,         4,          4,           4,            1,           0
+phy_lane_property :     77      =  512,      0,         5,          5,           5,            1,           0
+phy_lane_property :     78      =  512,      0,         6,          6,           6,            1,           0
+phy_lane_property :     79      =  512,      0,         7,          7,           7,            1,           0
+phy_lane_property :     80      =  512,      0,         8,          8,           8,            1,           0
+phy_lane_property :     81      =  512,      0,         9,          9,           9,            1,           0
+phy_lane_property :     82      =  512,      0,         10,         10,          10,           1,           0
+phy_lane_property :     83      =  512,      0,         11,         11,          11,           1,           0
+phy_lane_property :     84      =  512,      0,         12,         12,          12,           1,           0
+phy_lane_property :     85      =  512,      0,         13,         13,          13,           1,           0
+phy_lane_property :     86      =  512,      0,         14,         14,          14,           1,           0
+phy_lane_property :     87      =  512,      0,         15,         15,          15,           1,           0
+# System side lanes properties:
+phy_lane_property :     88      =  512,      1,         0,          0,           0,            0,           0
+phy_lane_property :     89      =  512,      1,         1,          1,           1,            0,           0
+phy_lane_property :     90      =  512,      1,         2,          2,           2,            0,           0
+phy_lane_property :     91      =  512,      1,         3,          3,           3,            0,           0
+phy_lane_property :     92      =  512,      1,         4,          4,           4,            0,           0
+phy_lane_property :     93      =  512,      1,         5,          5,           5,            0,           0
+phy_lane_property :     94      =  512,      1,         6,          6,           6,            0,           0
+phy_lane_property :     95      =  512,      1,         7,          7,           7,            0,           0
+
+### LANE CONFIGURATIONS PHY5
+#----------------------------------------------------------------------------------------------------------------
+#  Lane_Property  : Global_Lane = PHY_ID, IF_Side, Local_Lane, Tx_Lane_Map, Rx_Lane_Map, Tx_Polarity, Rx_Polarity
+#----------------------------------------------------------------------------------------------------------------
+# Line side lane properties:
+phy_lane_property :     96      =  544,      0,         0,          0,           0,            1,           0
+phy_lane_property :     97      =  544,      0,         1,          1,           1,            1,           0
+phy_lane_property :     98      =  544,      0,         2,          2,           2,            1,           0
+phy_lane_property :     99      =  544,      0,         3,          3,           3,            1,           0
+phy_lane_property :     100     =  544,      0,         4,          4,           4,            1,           0
+phy_lane_property :     101     =  544,      0,         5,          5,           5,            1,           0
+phy_lane_property :     102     =  544,      0,         6,          6,           6,            1,           0
+phy_lane_property :     103     =  544,      0,         7,          7,           7,            1,           0
+phy_lane_property :     104     =  544,      0,         8,          8,           8,            1,           0
+phy_lane_property :     105     =  544,      0,         9,          9,           9,            1,           0
+phy_lane_property :     106     =  544,      0,         10,         10,          10,           1,           0
+phy_lane_property :     107     =  544,      0,         11,         11,          11,           1,           0
+phy_lane_property :     108     =  544,      0,         12,         12,          12,           1,           0
+phy_lane_property :     109     =  544,      0,         13,         13,          13,           1,           0
+phy_lane_property :     110     =  544,      0,         14,         14,          14,           1,           0
+phy_lane_property :     111     =  544,      0,         15,         15,          15,           1,           0
+# System side lanes properties:
+phy_lane_property :     112     =  544,      1,         0,          0,           0,            0,           0
+phy_lane_property :     113     =  544,      1,         1,          1,           1,            0,           0
+phy_lane_property :     114     =  544,      1,         2,          2,           2,            0,           0
+phy_lane_property :     115     =  544,      1,         3,          3,           3,            0,           0
+phy_lane_property :     116     =  544,      1,         4,          4,           4,            0,           0
+phy_lane_property :     117     =  544,      1,         5,          5,           5,            0,           0
+phy_lane_property :     118     =  544,      1,         6,          6,           6,            0,           0
+phy_lane_property :     119     =  544,      1,         7,          7,           7,            0,           0
+
+### LANE CONFIGURATIONS PHY6
+#----------------------------------------------------------------------------------------------------------------
+#  Lane_Property  : Global_Lane = PHY_ID, IF_Side, Local_Lane, Tx_Lane_Map, Rx_Lane_Map, Tx_Polarity, Rx_Polarity
+#----------------------------------------------------------------------------------------------------------------
+# Line side lane properties:
+phy_lane_property :     120     =  576,      0,         0,          0,           0,            1,           0
+phy_lane_property :     121     =  576,      0,         1,          1,           1,            1,           0
+phy_lane_property :     122     =  576,      0,         2,          2,           2,            1,           0
+phy_lane_property :     123     =  576,      0,         3,          3,           3,            1,           0
+phy_lane_property :     124     =  576,      0,         4,          4,           4,            1,           0
+phy_lane_property :     125     =  576,      0,         5,          5,           5,            1,           0
+phy_lane_property :     126     =  576,      0,         6,          6,           6,            1,           0
+phy_lane_property :     127     =  576,      0,         7,          7,           7,            1,           0
+phy_lane_property :     128     =  576,      0,         8,          8,           8,            1,           0
+phy_lane_property :     129     =  576,      0,         9,          9,           9,            1,           0
+phy_lane_property :     130     =  576,      0,         10,         10,          10,           1,           0
+phy_lane_property :     131     =  576,      0,         11,         11,          11,           1,           0
+phy_lane_property :     132     =  576,      0,         12,         12,          12,           1,           0
+phy_lane_property :     133     =  576,      0,         13,         13,          13,           1,           0
+phy_lane_property :     134     =  576,      0,         14,         14,          14,           1,           0
+phy_lane_property :     135     =  576,      0,         15,         15,          15,           1,           0
+# System side lanes properties:
+phy_lane_property :     136     =  576,      1,         0,          0,           0,            0,           0
+phy_lane_property :     137     =  576,      1,         1,          1,           1,            0,           0
+phy_lane_property :     138     =  576,      1,         2,          2,           2,            0,           0
+phy_lane_property :     139     =  576,      1,         3,          3,           3,            0,           0
+phy_lane_property :     140     =  576,      1,         4,          4,           4,            0,           0
+phy_lane_property :     141     =  576,      1,         5,          5,           5,            0,           0
+phy_lane_property :     142     =  576,      1,         6,          6,           6,            0,           0
+phy_lane_property :     143     =  576,      1,         7,          7,           7,            0,           0
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy1_config.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy1_config.json
new file mode 100644
index 00000000000..07dac87ab5d
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy1_config.json
@@ -0,0 +1,101 @@
+{
+  "lanes": [
+    {
+      "index": 255,
+      "local_lane_id": 255,
+      "system_side": true,
+      "tx_polarity": 255,
+      "rx_polarity": 255,
+      "line_tx_lanemap": 255,
+      "line_rx_lanemap": 255,
+      "line_to_system_lanemap": 255,
+      "mdio_addr": ""
+    }
+  ],
+  "ports": [
+    {
+      "index": 1,
+      "mdio_addr": "288",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": false,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 2,
+      "mdio_addr": "288",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": false,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 3,
+      "mdio_addr": "288",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": false,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 4,
+      "mdio_addr": "288",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": false,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    }
+  ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy2_config.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy2_config.json
new file mode 100644
index 00000000000..14d69c77f48
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy2_config.json
@@ -0,0 +1,101 @@
+{
+  "lanes": [
+    {
+      "index": 255,
+      "local_lane_id": 255,
+      "system_side": true,
+      "tx_polarity": 255,
+      "rx_polarity": 255,
+      "line_tx_lanemap": 255,
+      "line_rx_lanemap": 255,
+      "line_to_system_lanemap": 255,
+      "mdio_addr": ""
+    }
+  ],
+  "ports": [
+    {
+      "index": 5,
+      "mdio_addr": "320",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": false,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 6,
+      "mdio_addr": "320",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": false,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 7,
+      "mdio_addr": "320",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": false,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    },
+    {
+      "index": 8,
+      "mdio_addr": "320",
+      "system_speed": 50000,
+      "system_fec": "rs",
+      "system_auto_neg": false,
+      "system_loopback": "none",
+      "system_training": false,
+      "line_speed": 25000,
+      "line_fec": "rs",
+      "line_auto_neg": false,
+      "line_loopback": "none",
+      "line_training": false,
+      "line_media_type": "fiber",
+      "line_intf_type": "none",
+      "line_adver_speed": [],
+      "line_adver_fec": [],
+      "line_adver_auto_neg": false,
+      "line_adver_asym_pause": false,
+      "line_adver_media_type": "fiber"
+    }
+  ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy3_config.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy3_config.json
new file mode 100644
index 00000000000..a20d434b1f7
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy3_config.json
@@ -0,0 +1,102 @@
+{
+    "lanes": [
+      {
+        "index": 255,
+        "local_lane_id": 255,
+        "system_side": true,
+        "tx_polarity": 255,
+        "rx_polarity": 255,
+        "line_tx_lanemap": 255,
+        "line_rx_lanemap": 255,
+        "line_to_system_lanemap": 255,
+        "mdio_addr": ""
+      }
+    ],
+    "ports": [
+      {
+        "index": 9,
+        "mdio_addr": "352",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 10,
+        "mdio_addr": "352",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 11,
+        "mdio_addr": "352",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 12,
+        "mdio_addr": "352",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      }
+    ]
+  }
+  
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy4_config.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy4_config.json
new file mode 100644
index 00000000000..ccf918944f4
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy4_config.json
@@ -0,0 +1,102 @@
+{
+    "lanes": [
+      {
+        "index": 255,
+        "local_lane_id": 255,
+        "system_side": true,
+        "tx_polarity": 255,
+        "rx_polarity": 255,
+        "line_tx_lanemap": 255,
+        "line_rx_lanemap": 255,
+        "line_to_system_lanemap": 255,
+        "mdio_addr": ""
+      }
+    ],
+    "ports": [
+      {
+        "index": 13,
+        "mdio_addr": "512",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 14,
+        "mdio_addr": "512",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 15,
+        "mdio_addr": "512",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 16,
+        "mdio_addr": "512",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      }
+    ]
+  }
+  
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy5_config.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy5_config.json
new file mode 100644
index 00000000000..a0bfc6b6a0a
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy5_config.json
@@ -0,0 +1,102 @@
+{
+    "lanes": [
+      {
+        "index": 255,
+        "local_lane_id": 255,
+        "system_side": true,
+        "tx_polarity": 255,
+        "rx_polarity": 255,
+        "line_tx_lanemap": 255,
+        "line_rx_lanemap": 255,
+        "line_to_system_lanemap": 255,
+        "mdio_addr": ""
+      }
+    ],
+    "ports": [
+      {
+        "index": 17,
+        "mdio_addr": "544",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 18,
+        "mdio_addr": "544",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 19,
+        "mdio_addr": "544",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 20,
+        "mdio_addr": "544",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      }
+    ]
+  }
+  
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy6_config.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy6_config.json
new file mode 100644
index 00000000000..39f7f98bf44
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/phy6_config.json
@@ -0,0 +1,102 @@
+{
+    "lanes": [
+      {
+        "index": 255,
+        "local_lane_id": 255,
+        "system_side": true,
+        "tx_polarity": 255,
+        "rx_polarity": 255,
+        "line_tx_lanemap": 255,
+        "line_rx_lanemap": 255,
+        "line_to_system_lanemap": 255,
+        "mdio_addr": ""
+      }
+    ],
+    "ports": [
+      {
+        "index": 21,
+        "mdio_addr": "576",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 22,
+        "mdio_addr": "576",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 23,
+        "mdio_addr": "576",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      },
+      {
+        "index": 24,
+        "mdio_addr": "576",
+        "system_speed": 50000,
+        "system_fec": "rs",
+        "system_auto_neg": false,
+        "system_loopback": "none",
+        "system_training": false,
+        "line_speed": 25000,
+        "line_fec": "rs",
+        "line_auto_neg": false,
+        "line_loopback": "none",
+        "line_training": false,
+        "line_media_type": "fiber",
+        "line_intf_type": "none",
+        "line_adver_speed": [],
+        "line_adver_fec": [],
+        "line_adver_auto_neg": false,
+        "line_adver_asym_pause": false,
+        "line_adver_media_type": "fiber"
+      }
+    ]
+  }
+  
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/port_config.ini b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/port_config.ini
new file mode 100644
index 00000000000..2ab35d687c6
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/port_config.ini
@@ -0,0 +1,37 @@
+# name       lanes                             alias         index  speed
+Ethernet0    74,75                             eth1          1      100000
+Ethernet8    72,73                             eth2          2      100000
+Ethernet16   78,79                             eth3          3      100000
+Ethernet24   76,77                             eth4          4      100000
+Ethernet32   82,83                             eth5          5      100000
+Ethernet40   80,81                             eth6          6      100000
+Ethernet48   86,87                             eth7          7      100000
+Ethernet56   84,85                             eth8          8      100000
+Ethernet64   90,91                             eth9          9      100000
+Ethernet72   88,89                             eth10         10     100000
+Ethernet80   94,95                             eth11         11     100000
+Ethernet88   92,93                             eth12         12     100000
+Ethernet96   98,99                             eth13         13     100000
+Ethernet104  96,97                             eth14         14     100000
+Ethernet112  102,103                           eth15         15     100000
+Ethernet120  100,101                           eth16         16     100000
+Ethernet128  106,107                           eth17         17     100000
+Ethernet136  104,105                           eth18         18     100000
+Ethernet144  110,111                           eth19         19     100000
+Ethernet152  108,109                           eth20         20     100000
+Ethernet160  114,115                           eth21         21     100000
+Ethernet168  112,113                           eth22         22     100000
+Ethernet176  118,119                           eth23         23     100000
+Ethernet184  116,117                           eth24         24     100000
+Ethernet192  120,121,122,123,124,125,126,127   eth25         25     400000
+Ethernet200  128,129,130,131,132,133,134,135   eth26         26     400000
+Ethernet208  136,137,138,139,140,141,142,143   eth27         27     400000
+Ethernet216  64,65,66,67,68,69,70,71           eth28         28     400000
+Ethernet224  56,57,58,59,60,61,62,63           eth29         29     400000
+Ethernet232  48,49,50,51,52,53,54,55           eth30         30     400000
+Ethernet240  40,41,42,43,44,45,46,47           eth31         31     400000
+Ethernet248  32,33,34,35,36,37,38,39           eth32         32     400000
+Ethernet256  24,25,26,27,28,29,30,31           eth33         33     400000
+Ethernet264  16,17,18,19,20,21,22,23           eth34         34     400000
+Ethernet272  0,1,2,3,4,5,6,7                   eth35         35     400000
+Ethernet280  8,9,10,11,12,13,14,15             eth36         36     400000
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/psai.profile b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/psai.profile
new file mode 100644
index 00000000000..0ddca9e40a2
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/psai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/millenio.bcm
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/q2cp-nokia-24x100g-12x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/q2cp-nokia-24x100g-12x400g-config.bcm
new file mode 100644
index 00000000000..d79a7c4acae
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/q2cp-nokia-24x100g-12x400g-config.bcm
@@ -0,0 +1,1684 @@
+appl_enable_intr_init=1
+appl_enable_learn_and_limit_init=0
+appl_enable_oam=0
+appl_enable_oam_fwd_idx_wa_init=0
+appl_enable_oam_stat_wa_init=0
+dma_desc_aggregator_buff_size_kb=100
+dma_desc_aggregator_chain_length_max=1000
+dma_desc_aggregator_enable_specific_MDB_LPM=1
+dma_desc_aggregator_timeout_usec=1000
+dport_map_direct=1
+dtm_flow_mapping_mode_region_64=3
+dtm_flow_mapping_mode_region_65=3
+dtm_flow_mapping_mode_region_66=3
+dtm_flow_mapping_mode_region_67=3
+dtm_flow_mapping_mode_region_68=3
+dtm_flow_mapping_mode_region_69=3
+dtm_flow_mapping_mode_region_70=3
+dtm_flow_mapping_mode_region_71=3
+dtm_flow_mapping_mode_region_72=3
+dtm_flow_mapping_mode_region_73=3
+dtm_flow_mapping_mode_region_74=3
+dtm_flow_mapping_mode_region_75=3
+dtm_flow_mapping_mode_region_76=3
+dtm_flow_mapping_mode_region_77=3
+dtm_flow_mapping_mode_region_78=3
+dtm_flow_mapping_mode_region_79=7
+dtm_flow_mapping_mode_region_80=3
+dtm_flow_mapping_mode_region_81=1
+dtm_flow_mapping_mode_region_82=3
+dtm_flow_mapping_mode_region_83=3
+dtm_flow_mapping_mode_region_84=3
+dtm_flow_mapping_mode_region_85=3
+dtm_flow_mapping_mode_region_86=3
+dtm_flow_mapping_mode_region_87=3
+dtm_flow_mapping_mode_region_88=3
+dtm_flow_mapping_mode_region_89=3
+dtm_flow_mapping_mode_region_90=3
+dtm_flow_mapping_mode_region_91=3
+dtm_flow_mapping_mode_region_92=3
+dtm_flow_mapping_mode_region_93=3
+dtm_flow_mapping_mode_region_94=3
+dtm_flow_nof_remote_cores_region_1=2
+dtm_flow_nof_remote_cores_region_10=2
+dtm_flow_nof_remote_cores_region_11=2
+dtm_flow_nof_remote_cores_region_12=2
+dtm_flow_nof_remote_cores_region_13=2
+dtm_flow_nof_remote_cores_region_14=2
+dtm_flow_nof_remote_cores_region_15=2
+dtm_flow_nof_remote_cores_region_16=2
+dtm_flow_nof_remote_cores_region_17=2
+dtm_flow_nof_remote_cores_region_18=2
+dtm_flow_nof_remote_cores_region_19=2
+dtm_flow_nof_remote_cores_region_2=2
+dtm_flow_nof_remote_cores_region_20=2
+dtm_flow_nof_remote_cores_region_21=2
+dtm_flow_nof_remote_cores_region_22=2
+dtm_flow_nof_remote_cores_region_23=2
+dtm_flow_nof_remote_cores_region_24=2
+dtm_flow_nof_remote_cores_region_25=2
+dtm_flow_nof_remote_cores_region_26=2
+dtm_flow_nof_remote_cores_region_27=2
+dtm_flow_nof_remote_cores_region_28=2
+dtm_flow_nof_remote_cores_region_29=2
+dtm_flow_nof_remote_cores_region_3=2
+dtm_flow_nof_remote_cores_region_30=2
+dtm_flow_nof_remote_cores_region_31=2
+dtm_flow_nof_remote_cores_region_32=2
+dtm_flow_nof_remote_cores_region_33=2
+dtm_flow_nof_remote_cores_region_34=2
+dtm_flow_nof_remote_cores_region_35=2
+dtm_flow_nof_remote_cores_region_36=2
+dtm_flow_nof_remote_cores_region_37=2
+dtm_flow_nof_remote_cores_region_38=2
+dtm_flow_nof_remote_cores_region_39=2
+dtm_flow_nof_remote_cores_region_4=2
+dtm_flow_nof_remote_cores_region_40=2
+dtm_flow_nof_remote_cores_region_41=2
+dtm_flow_nof_remote_cores_region_42=2
+dtm_flow_nof_remote_cores_region_43=2
+dtm_flow_nof_remote_cores_region_44=2
+dtm_flow_nof_remote_cores_region_45=2
+dtm_flow_nof_remote_cores_region_46=2
+dtm_flow_nof_remote_cores_region_47=2
+dtm_flow_nof_remote_cores_region_48=2
+dtm_flow_nof_remote_cores_region_49=2
+dtm_flow_nof_remote_cores_region_5=2
+dtm_flow_nof_remote_cores_region_50=2
+dtm_flow_nof_remote_cores_region_51=2
+dtm_flow_nof_remote_cores_region_52=2
+dtm_flow_nof_remote_cores_region_53=2
+dtm_flow_nof_remote_cores_region_54=2
+dtm_flow_nof_remote_cores_region_55=2
+dtm_flow_nof_remote_cores_region_56=2
+dtm_flow_nof_remote_cores_region_57=2
+dtm_flow_nof_remote_cores_region_58=2
+dtm_flow_nof_remote_cores_region_59=2
+dtm_flow_nof_remote_cores_region_6=2
+dtm_flow_nof_remote_cores_region_60=2
+dtm_flow_nof_remote_cores_region_7=2
+dtm_flow_nof_remote_cores_region_8=2
+dtm_flow_nof_remote_cores_region_9=2
+dtm_flow_nof_remote_cores_region_73.BCM8869X=2
+dtm_flow_mapping_mode_region_73.BCM8869X=0
+dtm_flow_nof_remote_cores_region_74.BCM8869X=2
+dtm_flow_mapping_mode_region_74.BCM8869X=0
+dtm_flow_nof_remote_cores_region_75.BCM8869X=2
+dtm_flow_mapping_mode_region_75.BCM8869X=0
+ext_ram_enabled_bitmap=3
+ext_ram_freq=1200
+dram_temperature_threshold_restore_traffic=89
+dram_temperature_threshold_power_down=102
+dram_temperature_threshold_stop_traffic=94
+dram_temperature_monitor_enable=1
+ftmh_stacking_extension_size=0
+j2_ftmh_lb_key_extension_size=3
+j_ftmh_lb_key_extension_size=0
+
+#######
+#Debug with pcp disabled
+######
+custom_feature_pcp_force_no_packing=1
+
+######################################################################################################
+# NIF LANE MAPPING FOR FIREFLY
+# EDITED ON 23-NOV-2023 by josmond
+######################################################################################################
+#firefly port 35, Falcon ports 49,52,55,58
+lane_to_serdes_map_nif_lane0=rx5:tx5
+lane_to_serdes_map_nif_lane1=rx1:tx3
+lane_to_serdes_map_nif_lane2=rx0:tx2
+lane_to_serdes_map_nif_lane3=rx4:tx4
+lane_to_serdes_map_nif_lane4=rx7:tx1
+lane_to_serdes_map_nif_lane5=rx2:tx6
+lane_to_serdes_map_nif_lane6=rx3:tx7
+lane_to_serdes_map_nif_lane7=rx6:tx0
+
+#firefly port 36, Falcon ports 37, 40, 43, 46
+lane_to_serdes_map_nif_lane8=rx10:tx15
+lane_to_serdes_map_nif_lane9=rx9:tx12
+lane_to_serdes_map_nif_lane10=rx13:tx10
+lane_to_serdes_map_nif_lane11=rx14:tx9
+lane_to_serdes_map_nif_lane12=rx11:tx11
+lane_to_serdes_map_nif_lane13=rx8:tx8
+lane_to_serdes_map_nif_lane14=rx15:tx13
+lane_to_serdes_map_nif_lane15=rx12:tx14
+
+#firefly port 34, Falcon ports 56-57, 59-60
+lane_to_serdes_map_nif_lane16=rx16:tx16
+lane_to_serdes_map_nif_lane17=rx17:tx17
+lane_to_serdes_map_nif_lane18=rx18:tx18
+lane_to_serdes_map_nif_lane19=rx19:tx19
+lane_to_serdes_map_nif_lane20=rx20:tx20
+lane_to_serdes_map_nif_lane21=rx21:tx21
+lane_to_serdes_map_nif_lane22=rx22:tx22
+lane_to_serdes_map_nif_lane23=rx23:tx23
+
+#firefly port 33, Falcon ports 50-51, 53-54
+lane_to_serdes_map_nif_lane24=rx24:tx24
+lane_to_serdes_map_nif_lane25=rx25:tx25
+lane_to_serdes_map_nif_lane26=rx26:tx26
+lane_to_serdes_map_nif_lane27=rx27:tx27
+lane_to_serdes_map_nif_lane28=rx28:tx28
+lane_to_serdes_map_nif_lane29=rx29:tx29
+lane_to_serdes_map_nif_lane30=rx30:tx30
+lane_to_serdes_map_nif_lane31=rx31:tx31
+
+#firefly port 32, Falcon ports 44-45, 47-48
+lane_to_serdes_map_nif_lane32=rx32:tx32
+lane_to_serdes_map_nif_lane33=rx33:tx33
+lane_to_serdes_map_nif_lane34=rx34:tx34
+lane_to_serdes_map_nif_lane35=rx35:tx35
+lane_to_serdes_map_nif_lane36=rx36:tx36
+lane_to_serdes_map_nif_lane37=rx37:tx37
+lane_to_serdes_map_nif_lane38=rx38:tx38
+lane_to_serdes_map_nif_lane39=rx39:tx39
+
+#firefly port 31, Falcon ports 41-42
+lane_to_serdes_map_nif_lane40=rx40:tx40
+lane_to_serdes_map_nif_lane41=rx41:tx41
+lane_to_serdes_map_nif_lane42=rx42:tx42
+lane_to_serdes_map_nif_lane43=rx43:tx43
+lane_to_serdes_map_nif_lane44=rx44:tx44
+lane_to_serdes_map_nif_lane45=rx45:tx45
+lane_to_serdes_map_nif_lane46=rx46:tx46
+lane_to_serdes_map_nif_lane47=rx47:tx47
+
+#firefly port 30, Falcon ports 38-39
+lane_to_serdes_map_nif_lane48=rx48:tx48
+lane_to_serdes_map_nif_lane49=rx49:tx49
+lane_to_serdes_map_nif_lane50=rx50:tx50
+lane_to_serdes_map_nif_lane51=rx51:tx51
+lane_to_serdes_map_nif_lane52=rx52:tx52
+lane_to_serdes_map_nif_lane53=rx53:tx53
+lane_to_serdes_map_nif_lane54=rx54:tx54
+lane_to_serdes_map_nif_lane55=rx55:tx55
+
+#firefly port 29, Falcon ports 20-21, 23-24
+lane_to_serdes_map_nif_lane56=rx56:tx56
+lane_to_serdes_map_nif_lane57=rx57:tx57
+lane_to_serdes_map_nif_lane58=rx58:tx58
+lane_to_serdes_map_nif_lane59=rx59:tx59
+lane_to_serdes_map_nif_lane60=rx60:tx60
+lane_to_serdes_map_nif_lane61=rx61:tx61
+lane_to_serdes_map_nif_lane62=rx62:tx62
+lane_to_serdes_map_nif_lane63=rx63:tx63
+
+#firefly port 28, Falcon ports 35-36
+lane_to_serdes_map_nif_lane64=rx64:tx64
+lane_to_serdes_map_nif_lane65=rx65:tx65
+lane_to_serdes_map_nif_lane66=rx66:tx66
+lane_to_serdes_map_nif_lane67=rx67:tx67
+lane_to_serdes_map_nif_lane68=rx68:tx68
+lane_to_serdes_map_nif_lane69=rx69:tx69
+lane_to_serdes_map_nif_lane70=rx70:tx70
+lane_to_serdes_map_nif_lane71=rx71:tx71
+
+#Firefly ports 1-4, Falcon ports 1,4,7,10
+#using firefly port mapping
+lane_to_serdes_map_nif_lane72=rx72:tx79
+lane_to_serdes_map_nif_lane73=rx76:tx77
+lane_to_serdes_map_nif_lane74=rx79:tx73
+lane_to_serdes_map_nif_lane75=rx74:tx76
+lane_to_serdes_map_nif_lane76=rx78:tx74
+lane_to_serdes_map_nif_lane77=rx77:tx72
+lane_to_serdes_map_nif_lane78=rx73:tx78
+lane_to_serdes_map_nif_lane79=rx75:tx75
+
+#firefly ports 5-8, Falcon ports 13,16,19,22
+lane_to_serdes_map_nif_lane80=rx81:tx85
+lane_to_serdes_map_nif_lane81=rx85:tx84
+lane_to_serdes_map_nif_lane82=rx87:tx81
+lane_to_serdes_map_nif_lane83=rx83:tx82
+lane_to_serdes_map_nif_lane84=rx84:tx83
+lane_to_serdes_map_nif_lane85=rx86:tx80
+lane_to_serdes_map_nif_lane86=rx80:tx86
+lane_to_serdes_map_nif_lane87=rx82:tx87
+
+#firefly ports 9-12, Falcon ports 25, 28, 31, 34
+lane_to_serdes_map_nif_lane88=rx89:tx88
+lane_to_serdes_map_nif_lane89=rx88:tx91
+lane_to_serdes_map_nif_lane90=rx90:tx89
+lane_to_serdes_map_nif_lane91=rx92:tx92
+lane_to_serdes_map_nif_lane92=rx91:tx90
+lane_to_serdes_map_nif_lane93=rx93:tx93
+lane_to_serdes_map_nif_lane94=rx94:tx94
+lane_to_serdes_map_nif_lane95=rx95:tx95
+
+#firefly ports 13-16, Falcon ports 2-3, 5-6
+lane_to_serdes_map_nif_lane96=rx97:tx96
+lane_to_serdes_map_nif_lane97=rx96:tx99
+lane_to_serdes_map_nif_lane98=rx98:tx98
+lane_to_serdes_map_nif_lane99=rx100:tx100
+lane_to_serdes_map_nif_lane100=rx99:tx97
+lane_to_serdes_map_nif_lane101=rx101:tx101
+lane_to_serdes_map_nif_lane102=rx102:tx103
+lane_to_serdes_map_nif_lane103=rx103:tx102
+
+#firefly ports 17-20, Falcon ports 8-9, 11-12
+lane_to_serdes_map_nif_lane104=rx104:tx105
+lane_to_serdes_map_nif_lane105=rx106:tx104
+lane_to_serdes_map_nif_lane106=rx105:tx106
+lane_to_serdes_map_nif_lane107=rx107:tx107
+lane_to_serdes_map_nif_lane108=rx109:tx111
+lane_to_serdes_map_nif_lane109=rx108:tx108
+lane_to_serdes_map_nif_lane110=rx111:tx109
+lane_to_serdes_map_nif_lane111=rx110:tx110
+
+#firefly ports 21-24, Falcon ports 14-15, 17-18
+lane_to_serdes_map_nif_lane112=rx113:tx112
+lane_to_serdes_map_nif_lane113=rx112:tx115
+lane_to_serdes_map_nif_lane114=rx114:tx113
+lane_to_serdes_map_nif_lane115=rx115:tx116
+lane_to_serdes_map_nif_lane116=rx116:tx114
+lane_to_serdes_map_nif_lane117=rx117:tx117
+lane_to_serdes_map_nif_lane118=rx118:tx118
+lane_to_serdes_map_nif_lane119=rx119:tx119
+
+#firefly ports 25, Falcon ports 26-27
+lane_to_serdes_map_nif_lane120=rx120:tx120
+lane_to_serdes_map_nif_lane121=rx121:tx121
+lane_to_serdes_map_nif_lane122=rx122:tx122
+lane_to_serdes_map_nif_lane123=rx123:tx123
+lane_to_serdes_map_nif_lane124=rx124:tx124
+lane_to_serdes_map_nif_lane125=rx125:tx125
+lane_to_serdes_map_nif_lane126=rx126:tx126
+lane_to_serdes_map_nif_lane127=rx127:tx127
+
+#firefly ports 26, Falcon ports 29-30
+lane_to_serdes_map_nif_lane128=rx128:tx128
+lane_to_serdes_map_nif_lane129=rx129:tx129
+lane_to_serdes_map_nif_lane130=rx130:tx130
+lane_to_serdes_map_nif_lane131=rx131:tx131
+lane_to_serdes_map_nif_lane132=rx132:tx132
+lane_to_serdes_map_nif_lane133=rx133:tx133
+lane_to_serdes_map_nif_lane134=rx134:tx134
+lane_to_serdes_map_nif_lane135=rx135:tx135
+
+#firefly port 27, Falcon ports 32-33
+lane_to_serdes_map_nif_lane136=rx136:tx136
+lane_to_serdes_map_nif_lane137=rx137:tx137
+lane_to_serdes_map_nif_lane138=rx138:tx138
+lane_to_serdes_map_nif_lane139=rx139:tx139
+lane_to_serdes_map_nif_lane140=rx140:tx140
+lane_to_serdes_map_nif_lane141=rx141:tx141
+lane_to_serdes_map_nif_lane142=rx142:tx142
+lane_to_serdes_map_nif_lane143=rx143:tx143
+
+
+mdb_profile=Balanced-Exem
+mdb_profile_kaps_cfg=2
+mdio_output_delay=16
+mem_cache_enable_ecc=1
+mem_cache_enable_parity=1
+miim_intr_enable=0
+os=unix
+outlif_logical_to_physical_phase_map_1=S1
+outlif_logical_to_physical_phase_map_2=L1
+outlif_logical_to_physical_phase_map_3=XL
+outlif_logical_to_physical_phase_map_4=L2
+outlif_logical_to_physical_phase_map_5=M1
+outlif_logical_to_physical_phase_map_6=M2
+outlif_logical_to_physical_phase_map_7=M3
+outlif_logical_to_physical_phase_map_8=S2
+outlif_physical_phase_data_granularity_L1=60
+outlif_physical_phase_data_granularity_L2=60
+outlif_physical_phase_data_granularity_M1=60
+outlif_physical_phase_data_granularity_M2=60
+outlif_physical_phase_data_granularity_M3=60
+outlif_physical_phase_data_granularity_S1=60
+outlif_physical_phase_data_granularity_S2=60
+outlif_physical_phase_data_granularity_XL=60
+pdma_continuous_mode_enable=1
+
+
+######################################################################################################
+# NIF RX POLARITY SWAPPING FOR FIREFLY
+# EDITED ON 23-NOV-2023 by josmond
+######################################################################################################
+phy_rx_polarity_flip_phy0=1
+phy_rx_polarity_flip_phy1=1
+phy_rx_polarity_flip_phy2=1
+phy_rx_polarity_flip_phy3=1
+phy_rx_polarity_flip_phy4=0
+phy_rx_polarity_flip_phy5=1
+phy_rx_polarity_flip_phy6=0
+phy_rx_polarity_flip_phy7=1
+
+phy_rx_polarity_flip_phy8=1
+phy_rx_polarity_flip_phy9=0
+phy_rx_polarity_flip_phy10=0
+phy_rx_polarity_flip_phy11=0
+phy_rx_polarity_flip_phy12=1
+phy_rx_polarity_flip_phy13=0
+phy_rx_polarity_flip_phy14=0
+phy_rx_polarity_flip_phy15=1
+
+phy_rx_polarity_flip_phy16=1
+phy_rx_polarity_flip_phy17=0
+phy_rx_polarity_flip_phy18=1
+phy_rx_polarity_flip_phy19=0
+phy_rx_polarity_flip_phy20=1
+phy_rx_polarity_flip_phy21=1
+phy_rx_polarity_flip_phy22=1
+phy_rx_polarity_flip_phy23=1
+
+phy_rx_polarity_flip_phy24=0
+phy_rx_polarity_flip_phy25=1
+phy_rx_polarity_flip_phy26=0
+phy_rx_polarity_flip_phy27=1
+phy_rx_polarity_flip_phy28=1
+phy_rx_polarity_flip_phy29=1
+phy_rx_polarity_flip_phy30=0
+phy_rx_polarity_flip_phy31=1
+
+phy_rx_polarity_flip_phy32=1
+phy_rx_polarity_flip_phy33=0
+phy_rx_polarity_flip_phy34=1
+phy_rx_polarity_flip_phy35=0
+phy_rx_polarity_flip_phy36=0
+phy_rx_polarity_flip_phy37=0
+phy_rx_polarity_flip_phy38=0
+phy_rx_polarity_flip_phy39=1
+
+phy_rx_polarity_flip_phy40=1
+phy_rx_polarity_flip_phy41=1
+phy_rx_polarity_flip_phy42=0
+phy_rx_polarity_flip_phy43=1
+phy_rx_polarity_flip_phy44=1
+phy_rx_polarity_flip_phy45=0
+phy_rx_polarity_flip_phy46=0
+phy_rx_polarity_flip_phy47=1
+
+phy_rx_polarity_flip_phy48=0
+phy_rx_polarity_flip_phy49=1
+phy_rx_polarity_flip_phy50=0
+phy_rx_polarity_flip_phy51=0
+phy_rx_polarity_flip_phy52=0
+phy_rx_polarity_flip_phy53=1
+phy_rx_polarity_flip_phy54=0
+phy_rx_polarity_flip_phy55=0
+
+phy_rx_polarity_flip_phy56=0
+phy_rx_polarity_flip_phy57=0
+phy_rx_polarity_flip_phy58=0
+phy_rx_polarity_flip_phy59=0
+phy_rx_polarity_flip_phy60=0
+phy_rx_polarity_flip_phy61=0
+phy_rx_polarity_flip_phy62=1
+phy_rx_polarity_flip_phy63=1
+
+phy_rx_polarity_flip_phy64=0
+phy_rx_polarity_flip_phy65=0
+phy_rx_polarity_flip_phy66=0
+phy_rx_polarity_flip_phy67=0
+phy_rx_polarity_flip_phy68=0
+phy_rx_polarity_flip_phy69=0
+phy_rx_polarity_flip_phy70=0
+phy_rx_polarity_flip_phy71=0
+
+#josmond change for firefly
+#phy_rx_polarity_flip_phy72=0
+#phy_rx_polarity_flip_phy73=0
+#phy_rx_polarity_flip_phy74=1
+#phy_rx_polarity_flip_phy75=1
+#phy_rx_polarity_flip_phy76=0
+#phy_rx_polarity_flip_phy77=0
+#phy_rx_polarity_flip_phy78=1
+#phy_rx_polarity_flip_phy79=0
+
+phy_rx_polarity_flip_phy72=0
+phy_rx_polarity_flip_phy73=0
+phy_rx_polarity_flip_phy74=0
+phy_rx_polarity_flip_phy75=1
+phy_rx_polarity_flip_phy76=1
+phy_rx_polarity_flip_phy77=0
+phy_rx_polarity_flip_phy78=0
+phy_rx_polarity_flip_phy79=1
+
+#phy_rx_polarity_flip_phy80=0
+#phy_rx_polarity_flip_phy81=1
+#phy_rx_polarity_flip_phy82=0
+#phy_rx_polarity_flip_phy83=0
+#phy_rx_polarity_flip_phy84=1
+#phy_rx_polarity_flip_phy85=1
+#phy_rx_polarity_flip_phy86=1
+#phy_rx_polarity_flip_phy87=1
+
+phy_rx_polarity_flip_phy80=1
+phy_rx_polarity_flip_phy81=1
+phy_rx_polarity_flip_phy82=1
+phy_rx_polarity_flip_phy83=0
+phy_rx_polarity_flip_phy84=1
+phy_rx_polarity_flip_phy85=1
+phy_rx_polarity_flip_phy86=0
+phy_rx_polarity_flip_phy87=0
+
+#phy_rx_polarity_flip_phy88=1
+#phy_rx_polarity_flip_phy89=1
+#phy_rx_polarity_flip_phy90=1
+#phy_rx_polarity_flip_phy91=1
+#phy_rx_polarity_flip_phy92=1
+#phy_rx_polarity_flip_phy93=1
+#phy_rx_polarity_flip_phy94=1
+#phy_rx_polarity_flip_phy95=1
+
+phy_rx_polarity_flip_phy88=1
+phy_rx_polarity_flip_phy89=1
+phy_rx_polarity_flip_phy90=1
+phy_rx_polarity_flip_phy91=1
+phy_rx_polarity_flip_phy92=1
+phy_rx_polarity_flip_phy93=1
+phy_rx_polarity_flip_phy94=1
+phy_rx_polarity_flip_phy95=1
+
+#phy_rx_polarity_flip_phy96=1
+#phy_rx_polarity_flip_phy97=1
+#phy_rx_polarity_flip_phy98=0
+#phy_rx_polarity_flip_phy99=1
+#phy_rx_polarity_flip_phy100=1
+#phy_rx_polarity_flip_phy101=0
+#phy_rx_polarity_flip_phy102=1
+#phy_rx_polarity_flip_phy103=1
+
+phy_rx_polarity_flip_phy96=1
+phy_rx_polarity_flip_phy97=1
+phy_rx_polarity_flip_phy98=0
+phy_rx_polarity_flip_phy99=1
+phy_rx_polarity_flip_phy100=1
+phy_rx_polarity_flip_phy101=0
+phy_rx_polarity_flip_phy102=1
+phy_rx_polarity_flip_phy103=1
+
+#phy_rx_polarity_flip_phy104=0
+#phy_rx_polarity_flip_phy105=1
+#phy_rx_polarity_flip_phy106=0
+#phy_rx_polarity_flip_phy107=0
+#phy_rx_polarity_flip_phy108=0
+#phy_rx_polarity_flip_phy109=1
+#phy_rx_polarity_flip_phy110=1
+#phy_rx_polarity_flip_phy111=0
+
+phy_rx_polarity_flip_phy104=0
+phy_rx_polarity_flip_phy105=0
+phy_rx_polarity_flip_phy106=1
+phy_rx_polarity_flip_phy107=0
+phy_rx_polarity_flip_phy108=1
+phy_rx_polarity_flip_phy109=0
+phy_rx_polarity_flip_phy110=0
+phy_rx_polarity_flip_phy111=1
+
+#phy_rx_polarity_flip_phy112=1
+#phy_rx_polarity_flip_phy113=0
+#phy_rx_polarity_flip_phy114=1
+#phy_rx_polarity_flip_phy115=0
+#phy_rx_polarity_flip_phy116=0
+#phy_rx_polarity_flip_phy117=0
+#phy_rx_polarity_flip_phy118=0
+#phy_rx_polarity_flip_phy119=1
+
+phy_rx_polarity_flip_phy112=0
+phy_rx_polarity_flip_phy113=1
+phy_rx_polarity_flip_phy114=1
+phy_rx_polarity_flip_phy115=0
+phy_rx_polarity_flip_phy116=0
+phy_rx_polarity_flip_phy117=0
+phy_rx_polarity_flip_phy118=0
+phy_rx_polarity_flip_phy119=1
+
+phy_rx_polarity_flip_phy120=1
+phy_rx_polarity_flip_phy121=0
+phy_rx_polarity_flip_phy122=0
+phy_rx_polarity_flip_phy123=1
+phy_rx_polarity_flip_phy124=0
+phy_rx_polarity_flip_phy125=1
+phy_rx_polarity_flip_phy126=1
+phy_rx_polarity_flip_phy127=0
+
+phy_rx_polarity_flip_phy128=0
+phy_rx_polarity_flip_phy129=0
+phy_rx_polarity_flip_phy130=1
+phy_rx_polarity_flip_phy131=0
+phy_rx_polarity_flip_phy132=0
+phy_rx_polarity_flip_phy133=1
+phy_rx_polarity_flip_phy134=1
+phy_rx_polarity_flip_phy135=0
+
+phy_rx_polarity_flip_phy136=1
+phy_rx_polarity_flip_phy137=0
+phy_rx_polarity_flip_phy138=0
+phy_rx_polarity_flip_phy139=1
+phy_rx_polarity_flip_phy140=1
+phy_rx_polarity_flip_phy141=1
+phy_rx_polarity_flip_phy142=0
+phy_rx_polarity_flip_phy143=1
+
+#######################################################################################################
+# NIF TX POLARITY SWAPPING FOR FIREFLY
+# EDITED ON 23-NOV-2023 by josmond
+######################################################################################################
+phy_tx_polarity_flip_phy0=1
+phy_tx_polarity_flip_phy1=1
+phy_tx_polarity_flip_phy2=0
+phy_tx_polarity_flip_phy3=0
+phy_tx_polarity_flip_phy4=1
+phy_tx_polarity_flip_phy5=0
+phy_tx_polarity_flip_phy6=0
+phy_tx_polarity_flip_phy7=1
+
+phy_tx_polarity_flip_phy8=1
+phy_tx_polarity_flip_phy9=1
+phy_tx_polarity_flip_phy10=0
+phy_tx_polarity_flip_phy11=0
+phy_tx_polarity_flip_phy12=0
+phy_tx_polarity_flip_phy13=0
+phy_tx_polarity_flip_phy14=1
+phy_tx_polarity_flip_phy15=0
+
+phy_tx_polarity_flip_phy16=1
+phy_tx_polarity_flip_phy17=1
+phy_tx_polarity_flip_phy18=0
+phy_tx_polarity_flip_phy19=0
+phy_tx_polarity_flip_phy20=1
+phy_tx_polarity_flip_phy21=1
+phy_tx_polarity_flip_phy22=0
+phy_tx_polarity_flip_phy23=0
+
+phy_tx_polarity_flip_phy24=0
+phy_tx_polarity_flip_phy25=0
+phy_tx_polarity_flip_phy26=0
+phy_tx_polarity_flip_phy27=1
+phy_tx_polarity_flip_phy28=0
+phy_tx_polarity_flip_phy29=0
+phy_tx_polarity_flip_phy30=0
+phy_tx_polarity_flip_phy31=0
+
+phy_tx_polarity_flip_phy32=1
+phy_tx_polarity_flip_phy33=1
+phy_tx_polarity_flip_phy34=1
+phy_tx_polarity_flip_phy35=0
+phy_tx_polarity_flip_phy36=1
+phy_tx_polarity_flip_phy37=1
+phy_tx_polarity_flip_phy38=1
+phy_tx_polarity_flip_phy39=0
+
+phy_tx_polarity_flip_phy40=0
+phy_tx_polarity_flip_phy41=0
+phy_tx_polarity_flip_phy42=1
+phy_tx_polarity_flip_phy43=1
+phy_tx_polarity_flip_phy44=0
+phy_tx_polarity_flip_phy45=0
+phy_tx_polarity_flip_phy46=1
+phy_tx_polarity_flip_phy47=0
+
+phy_tx_polarity_flip_phy48=1
+phy_tx_polarity_flip_phy49=1
+phy_tx_polarity_flip_phy50=1
+phy_tx_polarity_flip_phy51=0
+phy_tx_polarity_flip_phy52=1
+phy_tx_polarity_flip_phy53=0
+phy_tx_polarity_flip_phy54=0
+phy_tx_polarity_flip_phy55=0
+
+phy_tx_polarity_flip_phy56=0
+phy_tx_polarity_flip_phy57=1
+phy_tx_polarity_flip_phy58=0
+phy_tx_polarity_flip_phy59=0
+phy_tx_polarity_flip_phy60=0
+phy_tx_polarity_flip_phy61=0
+phy_tx_polarity_flip_phy62=0
+phy_tx_polarity_flip_phy63=0
+
+phy_tx_polarity_flip_phy64=0
+phy_tx_polarity_flip_phy65=1
+phy_tx_polarity_flip_phy66=1
+phy_tx_polarity_flip_phy67=0
+phy_tx_polarity_flip_phy68=1
+phy_tx_polarity_flip_phy69=0
+phy_tx_polarity_flip_phy70=0
+phy_tx_polarity_flip_phy71=1
+
+#phy_tx_polarity_flip_phy72=1
+#phy_tx_polarity_flip_phy73=1
+#phy_tx_polarity_flip_phy74=0
+#phy_tx_polarity_flip_phy75=1
+#phy_tx_polarity_flip_phy76=1
+#phy_tx_polarity_flip_phy77=1
+#phy_tx_polarity_flip_phy78=0
+#phy_tx_polarity_flip_phy79=1
+
+phy_tx_polarity_flip_phy72=1
+phy_tx_polarity_flip_phy73=1
+phy_tx_polarity_flip_phy74=1
+phy_tx_polarity_flip_phy75=1
+phy_tx_polarity_flip_phy76=0
+phy_tx_polarity_flip_phy77=1
+phy_tx_polarity_flip_phy78=0
+phy_tx_polarity_flip_phy79=1
+
+#phy_tx_polarity_flip_phy80=0
+#phy_tx_polarity_flip_phy81=0
+#phy_tx_polarity_flip_phy82=1
+#phy_tx_polarity_flip_phy83=0
+#phy_tx_polarity_flip_phy84=0
+#phy_tx_polarity_flip_phy85=0
+#phy_tx_polarity_flip_phy86=1
+#phy_tx_polarity_flip_phy87=1
+
+phy_tx_polarity_flip_phy80=0
+phy_tx_polarity_flip_phy81=0
+phy_tx_polarity_flip_phy82=0
+phy_tx_polarity_flip_phy83=1
+phy_tx_polarity_flip_phy84=0
+phy_tx_polarity_flip_phy85=0
+phy_tx_polarity_flip_phy86=1
+phy_tx_polarity_flip_phy87=1
+
+#phy_tx_polarity_flip_phy88=1
+#phy_tx_polarity_flip_phy89=0
+#phy_tx_polarity_flip_phy90=1
+#phy_tx_polarity_flip_phy91=1
+#phy_tx_polarity_flip_phy92=1
+#phy_tx_polarity_flip_phy93=0
+#phy_tx_polarity_flip_phy94=1
+#phy_tx_polarity_flip_phy95=0
+
+phy_tx_polarity_flip_phy88=1
+phy_tx_polarity_flip_phy89=1
+phy_tx_polarity_flip_phy90=0
+phy_tx_polarity_flip_phy91=1
+phy_tx_polarity_flip_phy92=1
+phy_tx_polarity_flip_phy93=0
+phy_tx_polarity_flip_phy94=1
+phy_tx_polarity_flip_phy95=0
+
+#phy_tx_polarity_flip_phy96=1
+#phy_tx_polarity_flip_phy97=0
+#phy_tx_polarity_flip_phy98=1
+#phy_tx_polarity_flip_phy99=0
+#phy_tx_polarity_flip_phy100=1
+#phy_tx_polarity_flip_phy101=1
+#phy_tx_polarity_flip_phy102=0
+#phy_tx_polarity_flip_phy103=1
+
+phy_tx_polarity_flip_phy96=1
+phy_tx_polarity_flip_phy97=0
+phy_tx_polarity_flip_phy98=1
+phy_tx_polarity_flip_phy99=1
+phy_tx_polarity_flip_phy100=0
+phy_tx_polarity_flip_phy101=1
+phy_tx_polarity_flip_phy102=1
+phy_tx_polarity_flip_phy103=0
+
+#phy_tx_polarity_flip_phy104=1
+#phy_tx_polarity_flip_phy105=0
+#phy_tx_polarity_flip_phy106=0
+#phy_tx_polarity_flip_phy107=1
+#phy_tx_polarity_flip_phy108=0
+#phy_tx_polarity_flip_phy109=0
+#phy_tx_polarity_flip_phy110=0
+#phy_tx_polarity_flip_phy111=1
+
+phy_tx_polarity_flip_phy104=0
+phy_tx_polarity_flip_phy105=1
+phy_tx_polarity_flip_phy106=0
+phy_tx_polarity_flip_phy107=1
+phy_tx_polarity_flip_phy108=1
+phy_tx_polarity_flip_phy109=0
+phy_tx_polarity_flip_phy110=0
+phy_tx_polarity_flip_phy111=0
+
+#phy_tx_polarity_flip_phy112=0
+#phy_tx_polarity_flip_phy113=0
+#phy_tx_polarity_flip_phy114=1
+#phy_tx_polarity_flip_phy115=0
+#phy_tx_polarity_flip_phy116=0
+#phy_tx_polarity_flip_phy117=1
+#phy_tx_polarity_flip_phy118=0
+#phy_tx_polarity_flip_phy119=1
+
+phy_tx_polarity_flip_phy112=0
+phy_tx_polarity_flip_phy113=0
+phy_tx_polarity_flip_phy114=0
+phy_tx_polarity_flip_phy115=0
+phy_tx_polarity_flip_phy116=1
+phy_tx_polarity_flip_phy117=1
+phy_tx_polarity_flip_phy118=0
+phy_tx_polarity_flip_phy119=1
+
+phy_tx_polarity_flip_phy120=0
+phy_tx_polarity_flip_phy121=1
+phy_tx_polarity_flip_phy122=1
+phy_tx_polarity_flip_phy123=0
+phy_tx_polarity_flip_phy124=0
+phy_tx_polarity_flip_phy125=0
+phy_tx_polarity_flip_phy126=1
+phy_tx_polarity_flip_phy127=0
+
+phy_tx_polarity_flip_phy128=1
+phy_tx_polarity_flip_phy129=1
+phy_tx_polarity_flip_phy130=0
+phy_tx_polarity_flip_phy131=0
+phy_tx_polarity_flip_phy132=0
+phy_tx_polarity_flip_phy133=1
+phy_tx_polarity_flip_phy134=0
+phy_tx_polarity_flip_phy135=0
+
+phy_tx_polarity_flip_phy136=0
+phy_tx_polarity_flip_phy137=0
+phy_tx_polarity_flip_phy138=0
+phy_tx_polarity_flip_phy139=0
+phy_tx_polarity_flip_phy140=0
+phy_tx_polarity_flip_phy141=0
+phy_tx_polarity_flip_phy142=0
+phy_tx_polarity_flip_phy143=0
+
+
+polled_irq_delay=5
+polled_irq_mode=0
+
+######################################################################################################
+# NIF TRAINING OFF for 100Gbe, (~7.5db max, 0.925db/inch), ~1db J2C+ package loss
+# JOSMOND - REMOVED THE CL72 SETTINGS FOR FORMER FALCON PORTS 37-60. LEFT THE SETTINGS IN FOR FABRIC.
+######################################################################################################
+port_init_cl72_1=0
+port_init_cl72_2=0
+port_init_cl72_3=0
+port_init_cl72_4=0
+port_init_cl72_5=0
+port_init_cl72_6=0
+port_init_cl72_7=0
+port_init_cl72_8=0
+port_init_cl72_9=0
+port_init_cl72_10=0
+port_init_cl72_11=0
+port_init_cl72_12=0
+port_init_cl72_13=0
+port_init_cl72_14=0
+port_init_cl72_15=0
+port_init_cl72_16=0
+port_init_cl72_17=0
+port_init_cl72_18=0
+port_init_cl72_19=0
+port_init_cl72_20=0
+port_init_cl72_21=0
+port_init_cl72_22=0
+port_init_cl72_23=0
+port_init_cl72_24=0
+port_init_cl72_25=0
+port_init_cl72_26=0
+port_init_cl72_27=0
+port_init_cl72_28=0
+port_init_cl72_29=0
+port_init_cl72_30=0
+port_init_cl72_31=0
+port_init_cl72_32=0
+port_init_cl72_33=0
+port_init_cl72_34=0
+port_init_cl72_35=0
+port_init_cl72_36=0
+
+port_init_cl72_256=0
+port_init_cl72_257=0
+port_init_cl72_258=0
+port_init_cl72_259=0
+port_init_cl72_260=0
+port_init_cl72_261=0
+port_init_cl72_262=0
+port_init_cl72_263=0
+port_init_cl72_264=0
+port_init_cl72_265=0
+port_init_cl72_266=0
+port_init_cl72_267=0
+port_init_cl72_268=0
+port_init_cl72_269=0
+port_init_cl72_270=0
+port_init_cl72_271=0
+port_init_cl72_272=0
+port_init_cl72_273=0
+port_init_cl72_274=0
+port_init_cl72_275=0
+port_init_cl72_276=0
+port_init_cl72_277=0
+port_init_cl72_278=0
+port_init_cl72_279=0
+port_init_cl72_280=0
+port_init_cl72_281=0
+port_init_cl72_282=0
+port_init_cl72_283=0
+port_init_cl72_284=0
+port_init_cl72_285=0
+port_init_cl72_286=0
+port_init_cl72_287=0
+port_init_cl72_288=0
+port_init_cl72_289=0
+port_init_cl72_290=0
+port_init_cl72_291=0
+port_init_cl72_292=0
+port_init_cl72_293=0
+port_init_cl72_294=0
+port_init_cl72_295=0
+port_init_cl72_296=0
+port_init_cl72_297=0
+port_init_cl72_298=0
+port_init_cl72_299=0
+port_init_cl72_300=0
+port_init_cl72_301=0
+port_init_cl72_302=0
+port_init_cl72_303=0
+port_init_cl72_304=0
+port_init_cl72_305=0
+port_init_cl72_306=0
+port_init_cl72_307=0
+port_init_cl72_308=0
+port_init_cl72_309=0
+port_init_cl72_310=0
+port_init_cl72_311=0
+port_init_cl72_312=0
+port_init_cl72_313=0
+port_init_cl72_314=0
+port_init_cl72_315=0
+port_init_cl72_316=0
+port_init_cl72_317=0
+port_init_cl72_318=0
+port_init_cl72_319=0
+port_init_cl72_320=0
+port_init_cl72_321=0
+port_init_cl72_322=0
+port_init_cl72_323=0
+port_init_cl72_324=0
+port_init_cl72_325=0
+port_init_cl72_326=0
+port_init_cl72_327=0
+port_init_cl72_328=0
+port_init_cl72_329=0
+port_init_cl72_330=0
+port_init_cl72_331=0
+port_init_cl72_332=0
+port_init_cl72_333=0
+port_init_cl72_334=0
+port_init_cl72_335=0
+port_init_cl72_336=0
+port_init_cl72_337=0
+port_init_cl72_338=0
+port_init_cl72_339=0
+port_init_cl72_340=0
+port_init_cl72_341=0
+port_init_cl72_342=0
+port_init_cl72_343=0
+port_init_cl72_344=0
+port_init_cl72_345=0
+port_init_cl72_346=0
+port_init_cl72_347=0
+port_init_cl72_348=0
+port_init_cl72_349=0
+port_init_cl72_350=0
+port_init_cl72_351=0
+port_init_cl72_352=0
+port_init_cl72_353=0
+port_init_cl72_354=0
+port_init_cl72_355=0
+port_init_cl72_356=0
+port_init_cl72_357=0
+port_init_cl72_358=0
+port_init_cl72_359=0
+port_init_cl72_360=0
+port_init_cl72_361=0
+port_init_cl72_362=0
+port_init_cl72_363=0
+port_init_cl72_364=0
+port_init_cl72_365=0
+port_init_cl72_366=0
+port_init_cl72_367=0
+port_init_cl72_368=0
+port_init_cl72_369=0
+port_init_cl72_370=0
+port_init_cl72_371=0
+port_init_cl72_372=0
+port_init_cl72_373=0
+port_init_cl72_374=0
+port_init_cl72_375=0
+port_init_cl72_376=0
+port_init_cl72_377=0
+port_init_cl72_378=0
+port_init_cl72_379=0
+port_init_cl72_380=0
+port_init_cl72_381=0
+port_init_cl72_382=0
+port_init_cl72_383=0
+port_init_cl72_384=0
+port_init_cl72_385=0
+port_init_cl72_386=0
+port_init_cl72_387=0
+port_init_cl72_388=0
+port_init_cl72_389=0
+port_init_cl72_390=0
+port_init_cl72_391=0
+port_init_cl72_392=0
+port_init_cl72_393=0
+port_init_cl72_394=0
+port_init_cl72_395=0
+port_init_cl72_396=0
+port_init_cl72_397=0
+port_init_cl72_398=0
+port_init_cl72_399=0
+port_init_cl72_400=0
+port_init_cl72_401=0
+port_init_cl72_402=0
+port_init_cl72_403=0
+port_init_cl72_404=0
+port_init_cl72_405=0
+port_init_cl72_406=0
+port_init_cl72_407=0
+port_init_cl72_408=0
+port_init_cl72_409=0
+port_init_cl72_410=0
+port_init_cl72_411=0
+port_init_cl72_412=0
+port_init_cl72_413=0
+port_init_cl72_414=0
+port_init_cl72_415=0
+port_init_cl72_416=0
+port_init_cl72_417=0
+port_init_cl72_418=0
+port_init_cl72_419=0
+port_init_cl72_420=0
+port_init_cl72_421=0
+port_init_cl72_422=0
+port_init_cl72_423=0
+port_init_cl72_424=0
+port_init_cl72_425=0
+port_init_cl72_426=0
+port_init_cl72_427=0
+port_init_cl72_428=0
+port_init_cl72_429=0
+port_init_cl72_430=0
+port_init_cl72_431=0
+port_init_cl72_432=0
+port_init_cl72_433=0
+port_init_cl72_434=0
+port_init_cl72_435=0
+port_init_cl72_436=0
+port_init_cl72_437=0
+port_init_cl72_438=0
+port_init_cl72_439=0
+port_init_cl72_440=0
+port_init_cl72_441=0
+port_init_cl72_442=0
+port_init_cl72_443=0
+port_init_cl72_444=0
+port_init_cl72_445=0
+port_init_cl72_446=0
+port_init_cl72_447=0
+
+port_init_speed_cc=200000
+port_init_speed_cd=400000
+port_init_speed_ce=100000
+port_init_speed_il=10312
+port_init_speed_le=50000
+port_init_speed_xe=10000
+port_init_speed_xl=40000
+port_priorities=8
+protocol_traps_mode=IN_LIF
+rate_ext_mdio_divisor=15
+schan_intr_enable=0
+schan_timeout_usec=900000
+serdes_nif_clk_freq_in0=1
+serdes_nif_clk_freq_in1=1
+serdes_nif_clk_freq_out0=bypass
+serdes_nif_clk_freq_out1=bypass
+###############################################################################################
+# Yee had these clock settings in the standalone file, not sure if these are needed or not.
+# JOSMOND - WILL OMIT THESE FOR NOW.
+#core_clock_speed_khz=1350000
+#system_ref_core_clock_khz=1600000
+#############################################################################################
+soc_family=BCM8885X
+stable_filename=/tmp/warmboot_data
+stable_location=3
+stable_size=800000000
+sw_state_max_size=750000000
+system_headers_mode=1
+tdma_intr_enable=0
+tdma_timeout_usec=1000000
+tm_port_header_type_in_0=INJECTED_2
+tm_port_header_type_in_200=INJECTED_2_PP
+tm_port_header_type_in_201=INJECTED_2_PP
+tm_port_header_type_in_202=INJECTED_2_PP
+tm_port_header_type_in_203=INJECTED_2_PP
+tm_port_header_type_in_232=INJECTED_2
+tm_port_header_type_in_38=INJECTED_2
+tm_port_header_type_out_0=CPU
+tm_port_header_type_out_200=ETH
+tm_port_header_type_out_201=ETH
+tm_port_header_type_out_202=ETH
+tm_port_header_type_out_203=ETH
+tm_port_header_type_out_232=CPU
+tm_port_header_type_out_37=ETH
+tm_port_header_type_in_37=ETH
+tm_port_header_type_out_38=RAW
+tslam_intr_enable=0
+tslam_timeout_usec=1000000
+ucode_port_0=CPU.0:core_0.0
+ucode_port_200=CPU.8:core_1.200
+######################################################################################################
+# PORT INDEXING PORTS 1-24 (RGB connections) FOR FIREFLY
+# EDITED ON 23-NOV-2023 by josmond
+######################################################################################################
+#RGB1
+ucode_port_1=CGE2_37:core_1.1
+ucode_port_2=CGE2_36:core_1.2
+ucode_port_3=CGE2_39:core_1.3
+ucode_port_4=CGE2_38:core_1.4
+
+#RGB2
+ucode_port_5=CGE2_41:core_1.5
+ucode_port_6=CGE2_40:core_1.6
+ucode_port_7=CGE2_43:core_1.7
+ucode_port_8=CGE2_42:core_1.8
+
+#RGB3
+ucode_port_9=CGE2_45:core_1.9
+ucode_port_10=CGE2_44:core_1.10
+ucode_port_11=CGE2_47:core_1.11
+ucode_port_12=CGE2_46:core_1.12
+
+#RGB4
+ucode_port_13=CGE2_49:core_1.13
+ucode_port_14=CGE2_48:core_1.14
+ucode_port_15=CGE2_51:core_1.15
+ucode_port_16=CGE2_50:core_1.16
+
+#RGB5
+ucode_port_17=CGE2_53:core_1.17
+ucode_port_18=CGE2_52:core_1.18
+ucode_port_19=CGE2_55:core_1.19
+ucode_port_20=CGE2_54:core_1.20
+
+#RGB6
+ucode_port_21=CGE2_57:core_1.21
+ucode_port_22=CGE2_56:core_1.22
+ucode_port_23=CGE2_59:core_1.23
+ucode_port_24=CGE2_58:core_1.24
+
+######################################################################################################
+# PORT INDEXING PORTS 25-36 (400GE connections) FOR FIREFLY
+# EDITED ON 23-NOV-2023 by josmond
+######################################################################################################
+
+ucode_port_25=CDGE15:core_1.25
+ucode_port_26=CDGE16:core_1.26
+ucode_port_27=CDGE17:core_1.27
+ucode_port_28=CDGE8:core_0.28
+ucode_port_29=CDGE7:core_0.29
+ucode_port_30=CDGE6:core_0.30
+ucode_port_31=CDGE5:core_0.31
+ucode_port_32=CDGE4:core_0.32
+ucode_port_33=CDGE3:core_0.33
+ucode_port_34=CDGE2:core_0.34
+ucode_port_35=CDGE0:core_0.35
+ucode_port_36=CDGE1:core_0.36
+
+######################################################################################################
+# RECYLE & OFF-LOAD PROCESSOR FOR FOR FIREFLY (Not sure if these settings are correct, followed Falcon format)
+# EDITED ON 23-NOV-2023 by josmond
+######################################################################################################
+ucode_port_37=RCY0:core_0.37
+ucode_port_38=OLP:core_1.38
+
+######################################################################################################
+# NIF Serdes DFE & LPDFE ON FIREFLY
+# EDITED ON 23-NOV-2023 by josmond
+#####################################################################################################
+serdes_lane_config_dfe_1=on
+serdes_lane_config_dfe_2=on
+serdes_lane_config_dfe_3=on
+serdes_lane_config_dfe_4=on
+serdes_lane_config_dfe_5=on
+serdes_lane_config_dfe_6=on
+serdes_lane_config_dfe_7=on
+serdes_lane_config_dfe_8=on
+serdes_lane_config_dfe_9=on
+serdes_lane_config_dfe_10=on
+serdes_lane_config_dfe_11=on
+serdes_lane_config_dfe_12=on
+serdes_lane_config_dfe_13=on
+serdes_lane_config_dfe_14=on
+serdes_lane_config_dfe_15=on
+serdes_lane_config_dfe_16=on
+serdes_lane_config_dfe_17=on
+serdes_lane_config_dfe_18=on
+serdes_lane_config_dfe_19=on
+serdes_lane_config_dfe_20=on
+serdes_lane_config_dfe_21=on
+serdes_lane_config_dfe_22=on
+serdes_lane_config_dfe_23=on
+serdes_lane_config_dfe_24=on
+serdes_lane_config_dfe_25=on
+serdes_lane_config_dfe_26=on
+serdes_lane_config_dfe_27=on
+serdes_lane_config_dfe_28=on
+serdes_lane_config_dfe_29=on
+serdes_lane_config_dfe_30=on
+serdes_lane_config_dfe_31=on
+serdes_lane_config_dfe_32=on
+serdes_lane_config_dfe_33=on
+serdes_lane_config_dfe_34=on
+serdes_lane_config_dfe_35=on
+serdes_lane_config_dfe_36=on
+
+# QSFP28 SETTINGS, ORIGINAL
+port_fec_1=3
+port_fec_2=3
+port_fec_3=3
+port_fec_4=3
+port_fec_5=3
+port_fec_6=3
+port_fec_7=3
+port_fec_8=3
+port_fec_9=3
+port_fec_10=3
+port_fec_11=3
+port_fec_12=3
+port_fec_13=3
+port_fec_14=3
+port_fec_15=3
+port_fec_16=3
+port_fec_17=3
+port_fec_18=3
+port_fec_19=3
+port_fec_20=3
+port_fec_21=3
+port_fec_22=3
+port_fec_23=3
+port_fec_24=3
+
+#port_fec_1=2
+#port_fec_2=2
+#port_fec_3=2
+#port_fec_4=2
+#port_fec_5=2
+#port_fec_6=2
+#port_fec_7=2
+#port_fec_8=2
+#port_fec_9=2
+#port_fec_10=2
+#port_fec_11=2
+#port_fec_12=2
+#port_fec_13=2
+#port_fec_14=2
+#port_fec_15=2
+#port_fec_16=2
+#port_fec_17=2
+#port_fec_18=2
+#port_fec_19=2
+#port_fec_20=2
+#port_fec_21=2
+#port_fec_22=2
+#port_fec_23=2
+#port_fec_24=2
+
+# QSFP-DD SETTINGS
+port_fec_25=9
+port_fec_26=9
+port_fec_27=9
+port_fec_28=9
+port_fec_29=9
+port_fec_30=9
+port_fec_31=9
+port_fec_32=9
+port_fec_33=9
+port_fec_34=9
+port_fec_35=9
+port_fec_36=9
+
+
+######################################################################################################
+# NIF Serdes TXFIR for 100GE ports 1-24
+######################################################################################################
+#RGB #1 ports 1-4
+serdes_tx_taps_1=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_2=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_3=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_4=pam4:-24:132:-12:0:0:0
+#RGB #2 ports 5-8
+serdes_tx_taps_5=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_6=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_7=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_8=pam4:-24:132:-12:0:0:0
+#RGB #3 ports 9-12
+serdes_tx_taps_9=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_10=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_11=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_12=pam4:-24:132:-12:0:0:0
+#RGB #4 ports 13-16
+serdes_tx_taps_13=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_14=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_15=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_16=pam4:-24:132:-12:0:0:0
+#RGB #5 ports 17-20
+serdes_tx_taps_17=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_18=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_19=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_20=pam4:-24:132:-12:0:0:0
+#RGB #6 ports 21-24
+serdes_tx_taps_21=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_22=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_23=pam4:-24:132:-12:0:0:0
+serdes_tx_taps_24=pam4:-24:132:-12:0:0:0
+
+######################################################################################################
+# NIF Serdes TXFIR for 400GE ports 25-36
+######################################################################################################
+#QSFD-DD ports 25-27
+serdes_tx_taps_25=pam4:-4:128:0:0:0:0
+serdes_tx_taps_26=pam4:-4:128:0:0:0:0
+serdes_tx_taps_27=pam4:-4:128:0:0:0:0
+serdes_tx_taps_28=pam4:-4:128:0:0:0:0
+serdes_tx_taps_29=pam4:-4:128:0:0:0:0
+serdes_tx_taps_30=pam4:-4:128:0:0:0:0
+serdes_tx_taps_31=pam4:-4:128:0:0:0:0
+serdes_tx_taps_32=pam4:-8:130:-8:0:0:0
+serdes_tx_taps_33=pam4:-4:128:0:0:0:0
+serdes_tx_taps_34=pam4:-8:130:-8:0:0:0
+serdes_tx_taps_35=pam4:-8:130:-8:0:0:0
+serdes_tx_taps_36=pam4:-8:130:-8:0:0:0
+
+##########################################################################################################
+# SFI Serdes Config Force all SFI lanes to NR mode and set TXFIR to 0,-20,148
+# JOSMOND - NOT USED ON FIREFLY. LEAVING THIS SECTION INTACT FOR NOW.
+##########################################################################################################
+serdes_lane_config_channel_mode_256=force_nr
+serdes_lane_config_channel_mode_257=force_nr
+serdes_lane_config_channel_mode_258=force_nr
+serdes_lane_config_channel_mode_259=force_nr
+serdes_lane_config_channel_mode_260=force_nr
+serdes_lane_config_channel_mode_261=force_nr
+serdes_lane_config_channel_mode_262=force_nr
+serdes_lane_config_channel_mode_263=force_nr
+serdes_lane_config_channel_mode_264=force_nr
+serdes_lane_config_channel_mode_265=force_nr
+serdes_lane_config_channel_mode_266=force_nr
+serdes_lane_config_channel_mode_267=force_nr
+serdes_lane_config_channel_mode_268=force_nr
+serdes_lane_config_channel_mode_269=force_nr
+serdes_lane_config_channel_mode_270=force_nr
+serdes_lane_config_channel_mode_271=force_nr
+serdes_lane_config_channel_mode_272=force_nr
+serdes_lane_config_channel_mode_273=force_nr
+serdes_lane_config_channel_mode_274=force_nr
+serdes_lane_config_channel_mode_275=force_nr
+serdes_lane_config_channel_mode_276=force_nr
+serdes_lane_config_channel_mode_277=force_nr
+serdes_lane_config_channel_mode_278=force_nr
+serdes_lane_config_channel_mode_279=force_nr
+serdes_lane_config_channel_mode_280=force_nr
+serdes_lane_config_channel_mode_281=force_nr
+serdes_lane_config_channel_mode_282=force_nr
+serdes_lane_config_channel_mode_283=force_nr
+serdes_lane_config_channel_mode_284=force_nr
+serdes_lane_config_channel_mode_285=force_nr
+serdes_lane_config_channel_mode_286=force_nr
+serdes_lane_config_channel_mode_287=force_nr
+serdes_lane_config_channel_mode_288=force_nr
+serdes_lane_config_channel_mode_289=force_nr
+serdes_lane_config_channel_mode_290=force_nr
+serdes_lane_config_channel_mode_291=force_nr
+serdes_lane_config_channel_mode_292=force_nr
+serdes_lane_config_channel_mode_293=force_nr
+serdes_lane_config_channel_mode_294=force_nr
+serdes_lane_config_channel_mode_295=force_nr
+serdes_lane_config_channel_mode_296=force_nr
+serdes_lane_config_channel_mode_297=force_nr
+serdes_lane_config_channel_mode_298=force_nr
+serdes_lane_config_channel_mode_299=force_nr
+serdes_lane_config_channel_mode_300=force_nr
+serdes_lane_config_channel_mode_301=force_nr
+serdes_lane_config_channel_mode_302=force_nr
+serdes_lane_config_channel_mode_303=force_nr
+serdes_lane_config_channel_mode_304=force_nr
+serdes_lane_config_channel_mode_305=force_nr
+serdes_lane_config_channel_mode_306=force_nr
+serdes_lane_config_channel_mode_307=force_nr
+serdes_lane_config_channel_mode_308=force_nr
+serdes_lane_config_channel_mode_309=force_nr
+serdes_lane_config_channel_mode_310=force_nr
+serdes_lane_config_channel_mode_311=force_nr
+serdes_lane_config_channel_mode_312=force_nr
+serdes_lane_config_channel_mode_313=force_nr
+serdes_lane_config_channel_mode_314=force_nr
+serdes_lane_config_channel_mode_315=force_nr
+serdes_lane_config_channel_mode_316=force_nr
+serdes_lane_config_channel_mode_317=force_nr
+serdes_lane_config_channel_mode_318=force_nr
+serdes_lane_config_channel_mode_319=force_nr
+serdes_lane_config_channel_mode_320=force_nr
+serdes_lane_config_channel_mode_321=force_nr
+serdes_lane_config_channel_mode_322=force_nr
+serdes_lane_config_channel_mode_323=force_nr
+serdes_lane_config_channel_mode_324=force_nr
+serdes_lane_config_channel_mode_325=force_nr
+serdes_lane_config_channel_mode_326=force_nr
+serdes_lane_config_channel_mode_327=force_nr
+serdes_lane_config_channel_mode_328=force_nr
+serdes_lane_config_channel_mode_329=force_nr
+serdes_lane_config_channel_mode_330=force_nr
+serdes_lane_config_channel_mode_331=force_nr
+serdes_lane_config_channel_mode_332=force_nr
+serdes_lane_config_channel_mode_333=force_nr
+serdes_lane_config_channel_mode_334=force_nr
+serdes_lane_config_channel_mode_335=force_nr
+serdes_lane_config_channel_mode_336=force_nr
+serdes_lane_config_channel_mode_337=force_nr
+serdes_lane_config_channel_mode_338=force_nr
+serdes_lane_config_channel_mode_339=force_nr
+serdes_lane_config_channel_mode_340=force_nr
+serdes_lane_config_channel_mode_341=force_nr
+serdes_lane_config_channel_mode_342=force_nr
+serdes_lane_config_channel_mode_343=force_nr
+serdes_lane_config_channel_mode_344=force_nr
+serdes_lane_config_channel_mode_345=force_nr
+serdes_lane_config_channel_mode_346=force_nr
+serdes_lane_config_channel_mode_347=force_nr
+serdes_lane_config_channel_mode_348=force_nr
+serdes_lane_config_channel_mode_349=force_nr
+serdes_lane_config_channel_mode_350=force_nr
+serdes_lane_config_channel_mode_351=force_nr
+serdes_lane_config_channel_mode_352=force_nr
+serdes_lane_config_channel_mode_353=force_nr
+serdes_lane_config_channel_mode_354=force_nr
+serdes_lane_config_channel_mode_355=force_nr
+serdes_lane_config_channel_mode_356=force_nr
+serdes_lane_config_channel_mode_357=force_nr
+serdes_lane_config_channel_mode_358=force_nr
+serdes_lane_config_channel_mode_359=force_nr
+serdes_lane_config_channel_mode_360=force_nr
+serdes_lane_config_channel_mode_361=force_nr
+serdes_lane_config_channel_mode_362=force_nr
+serdes_lane_config_channel_mode_363=force_nr
+serdes_lane_config_channel_mode_364=force_nr
+serdes_lane_config_channel_mode_365=force_nr
+serdes_lane_config_channel_mode_366=force_nr
+serdes_lane_config_channel_mode_367=force_nr
+serdes_lane_config_channel_mode_368=force_nr
+serdes_lane_config_channel_mode_369=force_nr
+serdes_lane_config_channel_mode_370=force_nr
+serdes_lane_config_channel_mode_371=force_nr
+serdes_lane_config_channel_mode_372=force_nr
+serdes_lane_config_channel_mode_373=force_nr
+serdes_lane_config_channel_mode_374=force_nr
+serdes_lane_config_channel_mode_375=force_nr
+serdes_lane_config_channel_mode_376=force_nr
+serdes_lane_config_channel_mode_377=force_nr
+serdes_lane_config_channel_mode_378=force_nr
+serdes_lane_config_channel_mode_379=force_nr
+serdes_lane_config_channel_mode_380=force_nr
+serdes_lane_config_channel_mode_381=force_nr
+serdes_lane_config_channel_mode_382=force_nr
+serdes_lane_config_channel_mode_383=force_nr
+serdes_lane_config_channel_mode_384=force_nr
+serdes_lane_config_channel_mode_385=force_nr
+serdes_lane_config_channel_mode_386=force_nr
+serdes_lane_config_channel_mode_387=force_nr
+serdes_lane_config_channel_mode_388=force_nr
+serdes_lane_config_channel_mode_389=force_nr
+serdes_lane_config_channel_mode_390=force_nr
+serdes_lane_config_channel_mode_391=force_nr
+serdes_lane_config_channel_mode_392=force_nr
+serdes_lane_config_channel_mode_393=force_nr
+serdes_lane_config_channel_mode_394=force_nr
+serdes_lane_config_channel_mode_395=force_nr
+serdes_lane_config_channel_mode_396=force_nr
+serdes_lane_config_channel_mode_397=force_nr
+serdes_lane_config_channel_mode_398=force_nr
+serdes_lane_config_channel_mode_399=force_nr
+serdes_lane_config_channel_mode_400=force_nr
+serdes_lane_config_channel_mode_401=force_nr
+serdes_lane_config_channel_mode_402=force_nr
+serdes_lane_config_channel_mode_403=force_nr
+serdes_lane_config_channel_mode_404=force_nr
+serdes_lane_config_channel_mode_405=force_nr
+serdes_lane_config_channel_mode_406=force_nr
+serdes_lane_config_channel_mode_407=force_nr
+serdes_lane_config_channel_mode_408=force_nr
+serdes_lane_config_channel_mode_409=force_nr
+serdes_lane_config_channel_mode_410=force_nr
+serdes_lane_config_channel_mode_411=force_nr
+serdes_lane_config_channel_mode_412=force_nr
+serdes_lane_config_channel_mode_413=force_nr
+serdes_lane_config_channel_mode_414=force_nr
+serdes_lane_config_channel_mode_415=force_nr
+serdes_lane_config_channel_mode_416=force_nr
+serdes_lane_config_channel_mode_417=force_nr
+serdes_lane_config_channel_mode_418=force_nr
+serdes_lane_config_channel_mode_419=force_nr
+serdes_lane_config_channel_mode_420=force_nr
+serdes_lane_config_channel_mode_421=force_nr
+serdes_lane_config_channel_mode_422=force_nr
+serdes_lane_config_channel_mode_423=force_nr
+serdes_lane_config_channel_mode_424=force_nr
+serdes_lane_config_channel_mode_425=force_nr
+serdes_lane_config_channel_mode_426=force_nr
+serdes_lane_config_channel_mode_427=force_nr
+serdes_lane_config_channel_mode_428=force_nr
+serdes_lane_config_channel_mode_429=force_nr
+serdes_lane_config_channel_mode_430=force_nr
+serdes_lane_config_channel_mode_431=force_nr
+serdes_lane_config_channel_mode_432=force_nr
+serdes_lane_config_channel_mode_433=force_nr
+serdes_lane_config_channel_mode_434=force_nr
+serdes_lane_config_channel_mode_435=force_nr
+serdes_lane_config_channel_mode_436=force_nr
+serdes_lane_config_channel_mode_437=force_nr
+serdes_lane_config_channel_mode_438=force_nr
+serdes_lane_config_channel_mode_439=force_nr
+serdes_lane_config_channel_mode_440=force_nr
+serdes_lane_config_channel_mode_441=force_nr
+serdes_lane_config_channel_mode_442=force_nr
+serdes_lane_config_channel_mode_443=force_nr
+serdes_lane_config_channel_mode_444=force_nr
+serdes_lane_config_channel_mode_445=force_nr
+serdes_lane_config_channel_mode_446=force_nr
+serdes_lane_config_channel_mode_447=force_nr
+serdes_tx_taps_256=pam4:-20:148:0:0:0:0
+serdes_tx_taps_257=pam4:-20:148:0:0:0:0
+serdes_tx_taps_258=pam4:-20:148:0:0:0:0
+serdes_tx_taps_259=pam4:-20:148:0:0:0:0
+serdes_tx_taps_260=pam4:-20:148:0:0:0:0
+serdes_tx_taps_261=pam4:-20:148:0:0:0:0
+serdes_tx_taps_262=pam4:-20:148:0:0:0:0
+serdes_tx_taps_263=pam4:-20:148:0:0:0:0
+serdes_tx_taps_264=pam4:-20:148:0:0:0:0
+serdes_tx_taps_265=pam4:-20:148:0:0:0:0
+serdes_tx_taps_266=pam4:-20:148:0:0:0:0
+serdes_tx_taps_267=pam4:-20:148:0:0:0:0
+serdes_tx_taps_268=pam4:-20:148:0:0:0:0
+serdes_tx_taps_269=pam4:-20:148:0:0:0:0
+serdes_tx_taps_270=pam4:-20:148:0:0:0:0
+serdes_tx_taps_271=pam4:-20:148:0:0:0:0
+serdes_tx_taps_272=pam4:-20:148:0:0:0:0
+serdes_tx_taps_273=pam4:-20:148:0:0:0:0
+serdes_tx_taps_274=pam4:-20:148:0:0:0:0
+serdes_tx_taps_275=pam4:-20:148:0:0:0:0
+serdes_tx_taps_276=pam4:-20:148:0:0:0:0
+serdes_tx_taps_277=pam4:-20:148:0:0:0:0
+serdes_tx_taps_278=pam4:-20:148:0:0:0:0
+serdes_tx_taps_279=pam4:-20:148:0:0:0:0
+serdes_tx_taps_280=pam4:-20:148:0:0:0:0
+serdes_tx_taps_281=pam4:-20:148:0:0:0:0
+serdes_tx_taps_282=pam4:-20:148:0:0:0:0
+serdes_tx_taps_283=pam4:-20:148:0:0:0:0
+serdes_tx_taps_284=pam4:-20:148:0:0:0:0
+serdes_tx_taps_285=pam4:-20:148:0:0:0:0
+serdes_tx_taps_286=pam4:-20:148:0:0:0:0
+serdes_tx_taps_287=pam4:-20:148:0:0:0:0
+serdes_tx_taps_288=pam4:-20:148:0:0:0:0
+serdes_tx_taps_289=pam4:-20:148:0:0:0:0
+serdes_tx_taps_290=pam4:-20:148:0:0:0:0
+serdes_tx_taps_291=pam4:-20:148:0:0:0:0
+serdes_tx_taps_292=pam4:-20:148:0:0:0:0
+serdes_tx_taps_293=pam4:-20:148:0:0:0:0
+serdes_tx_taps_294=pam4:-20:148:0:0:0:0
+serdes_tx_taps_295=pam4:-20:148:0:0:0:0
+serdes_tx_taps_296=pam4:-20:148:0:0:0:0
+serdes_tx_taps_297=pam4:-20:148:0:0:0:0
+serdes_tx_taps_298=pam4:-20:148:0:0:0:0
+serdes_tx_taps_299=pam4:-20:148:0:0:0:0
+serdes_tx_taps_300=pam4:-20:148:0:0:0:0
+serdes_tx_taps_301=pam4:-20:148:0:0:0:0
+serdes_tx_taps_302=pam4:-20:148:0:0:0:0
+serdes_tx_taps_303=pam4:-20:148:0:0:0:0
+serdes_tx_taps_304=pam4:-20:148:0:0:0:0
+serdes_tx_taps_305=pam4:-20:148:0:0:0:0
+serdes_tx_taps_306=pam4:-20:148:0:0:0:0
+serdes_tx_taps_307=pam4:-20:148:0:0:0:0
+serdes_tx_taps_308=pam4:-20:148:0:0:0:0
+serdes_tx_taps_309=pam4:-20:148:0:0:0:0
+serdes_tx_taps_310=pam4:-20:148:0:0:0:0
+serdes_tx_taps_311=pam4:-20:148:0:0:0:0
+serdes_tx_taps_312=pam4:-20:148:0:0:0:0
+serdes_tx_taps_313=pam4:-20:148:0:0:0:0
+serdes_tx_taps_314=pam4:-20:148:0:0:0:0
+serdes_tx_taps_315=pam4:-20:148:0:0:0:0
+serdes_tx_taps_316=pam4:-20:148:0:0:0:0
+serdes_tx_taps_317=pam4:-20:148:0:0:0:0
+serdes_tx_taps_318=pam4:-20:148:0:0:0:0
+serdes_tx_taps_319=pam4:-20:148:0:0:0:0
+serdes_tx_taps_320=pam4:-20:148:0:0:0:0
+serdes_tx_taps_321=pam4:-20:148:0:0:0:0
+serdes_tx_taps_322=pam4:-20:148:0:0:0:0
+serdes_tx_taps_323=pam4:-20:148:0:0:0:0
+serdes_tx_taps_324=pam4:-20:148:0:0:0:0
+serdes_tx_taps_325=pam4:-20:148:0:0:0:0
+serdes_tx_taps_326=pam4:-20:148:0:0:0:0
+serdes_tx_taps_327=pam4:-20:148:0:0:0:0
+serdes_tx_taps_328=pam4:-20:148:0:0:0:0
+serdes_tx_taps_329=pam4:-20:148:0:0:0:0
+serdes_tx_taps_330=pam4:-20:148:0:0:0:0
+serdes_tx_taps_331=pam4:-20:148:0:0:0:0
+serdes_tx_taps_332=pam4:-20:148:0:0:0:0
+serdes_tx_taps_333=pam4:-20:148:0:0:0:0
+serdes_tx_taps_334=pam4:-20:148:0:0:0:0
+serdes_tx_taps_335=pam4:-20:148:0:0:0:0
+serdes_tx_taps_336=pam4:-20:148:0:0:0:0
+serdes_tx_taps_337=pam4:-20:148:0:0:0:0
+serdes_tx_taps_338=pam4:-20:148:0:0:0:0
+serdes_tx_taps_339=pam4:-20:148:0:0:0:0
+serdes_tx_taps_340=pam4:-20:148:0:0:0:0
+serdes_tx_taps_341=pam4:-20:148:0:0:0:0
+serdes_tx_taps_342=pam4:-20:148:0:0:0:0
+serdes_tx_taps_343=pam4:-20:148:0:0:0:0
+serdes_tx_taps_344=pam4:-20:148:0:0:0:0
+serdes_tx_taps_345=pam4:-20:148:0:0:0:0
+serdes_tx_taps_346=pam4:-20:148:0:0:0:0
+serdes_tx_taps_347=pam4:-20:148:0:0:0:0
+serdes_tx_taps_348=pam4:-20:148:0:0:0:0
+serdes_tx_taps_349=pam4:-20:148:0:0:0:0
+serdes_tx_taps_350=pam4:-20:148:0:0:0:0
+serdes_tx_taps_351=pam4:-20:148:0:0:0:0
+serdes_tx_taps_352=pam4:-20:148:0:0:0:0
+serdes_tx_taps_353=pam4:-20:148:0:0:0:0
+serdes_tx_taps_354=pam4:-20:148:0:0:0:0
+serdes_tx_taps_355=pam4:-20:148:0:0:0:0
+serdes_tx_taps_356=pam4:-20:148:0:0:0:0
+serdes_tx_taps_357=pam4:-20:148:0:0:0:0
+serdes_tx_taps_358=pam4:-20:148:0:0:0:0
+serdes_tx_taps_359=pam4:-20:148:0:0:0:0
+serdes_tx_taps_360=pam4:-20:148:0:0:0:0
+serdes_tx_taps_361=pam4:-20:148:0:0:0:0
+serdes_tx_taps_362=pam4:-20:148:0:0:0:0
+serdes_tx_taps_363=pam4:-20:148:0:0:0:0
+serdes_tx_taps_364=pam4:-20:148:0:0:0:0
+serdes_tx_taps_365=pam4:-20:148:0:0:0:0
+serdes_tx_taps_366=pam4:-20:148:0:0:0:0
+serdes_tx_taps_367=pam4:-20:148:0:0:0:0
+serdes_tx_taps_368=pam4:-20:148:0:0:0:0
+serdes_tx_taps_369=pam4:-20:148:0:0:0:0
+serdes_tx_taps_370=pam4:-20:148:0:0:0:0
+serdes_tx_taps_371=pam4:-20:148:0:0:0:0
+serdes_tx_taps_372=pam4:-20:148:0:0:0:0
+serdes_tx_taps_373=pam4:-20:148:0:0:0:0
+serdes_tx_taps_374=pam4:-20:148:0:0:0:0
+serdes_tx_taps_375=pam4:-20:148:0:0:0:0
+serdes_tx_taps_376=pam4:-20:148:0:0:0:0
+serdes_tx_taps_377=pam4:-20:148:0:0:0:0
+serdes_tx_taps_378=pam4:-20:148:0:0:0:0
+serdes_tx_taps_379=pam4:-20:148:0:0:0:0
+serdes_tx_taps_380=pam4:-20:148:0:0:0:0
+serdes_tx_taps_381=pam4:-20:148:0:0:0:0
+serdes_tx_taps_382=pam4:-20:148:0:0:0:0
+serdes_tx_taps_383=pam4:-20:148:0:0:0:0
+serdes_tx_taps_384=pam4:-20:148:0:0:0:0
+serdes_tx_taps_385=pam4:-20:148:0:0:0:0
+serdes_tx_taps_386=pam4:-20:148:0:0:0:0
+serdes_tx_taps_387=pam4:-20:148:0:0:0:0
+serdes_tx_taps_388=pam4:-20:148:0:0:0:0
+serdes_tx_taps_389=pam4:-20:148:0:0:0:0
+serdes_tx_taps_390=pam4:-20:148:0:0:0:0
+serdes_tx_taps_391=pam4:-20:148:0:0:0:0
+serdes_tx_taps_392=pam4:-20:148:0:0:0:0
+serdes_tx_taps_393=pam4:-20:148:0:0:0:0
+serdes_tx_taps_394=pam4:-20:148:0:0:0:0
+serdes_tx_taps_395=pam4:-20:148:0:0:0:0
+serdes_tx_taps_396=pam4:-20:148:0:0:0:0
+serdes_tx_taps_397=pam4:-20:148:0:0:0:0
+serdes_tx_taps_398=pam4:-20:148:0:0:0:0
+serdes_tx_taps_399=pam4:-20:148:0:0:0:0
+serdes_tx_taps_400=pam4:-20:148:0:0:0:0
+serdes_tx_taps_401=pam4:-20:148:0:0:0:0
+serdes_tx_taps_402=pam4:-20:148:0:0:0:0
+serdes_tx_taps_403=pam4:-20:148:0:0:0:0
+serdes_tx_taps_404=pam4:-20:148:0:0:0:0
+serdes_tx_taps_405=pam4:-20:148:0:0:0:0
+serdes_tx_taps_406=pam4:-20:148:0:0:0:0
+serdes_tx_taps_407=pam4:-20:148:0:0:0:0
+serdes_tx_taps_408=pam4:-20:148:0:0:0:0
+serdes_tx_taps_409=pam4:-20:148:0:0:0:0
+serdes_tx_taps_410=pam4:-20:148:0:0:0:0
+serdes_tx_taps_411=pam4:-20:148:0:0:0:0
+serdes_tx_taps_412=pam4:-20:148:0:0:0:0
+serdes_tx_taps_413=pam4:-20:148:0:0:0:0
+serdes_tx_taps_414=pam4:-20:148:0:0:0:0
+serdes_tx_taps_415=pam4:-20:148:0:0:0:0
+serdes_tx_taps_416=pam4:-20:148:0:0:0:0
+serdes_tx_taps_417=pam4:-20:148:0:0:0:0
+serdes_tx_taps_418=pam4:-20:148:0:0:0:0
+serdes_tx_taps_419=pam4:-20:148:0:0:0:0
+serdes_tx_taps_420=pam4:-20:148:0:0:0:0
+serdes_tx_taps_421=pam4:-20:148:0:0:0:0
+serdes_tx_taps_422=pam4:-20:148:0:0:0:0
+serdes_tx_taps_423=pam4:-20:148:0:0:0:0
+serdes_tx_taps_424=pam4:-20:148:0:0:0:0
+serdes_tx_taps_425=pam4:-20:148:0:0:0:0
+serdes_tx_taps_426=pam4:-20:148:0:0:0:0
+serdes_tx_taps_427=pam4:-20:148:0:0:0:0
+serdes_tx_taps_428=pam4:-20:148:0:0:0:0
+serdes_tx_taps_429=pam4:-20:148:0:0:0:0
+serdes_tx_taps_430=pam4:-20:148:0:0:0:0
+serdes_tx_taps_431=pam4:-20:148:0:0:0:0
+serdes_tx_taps_432=pam4:-20:148:0:0:0:0
+serdes_tx_taps_433=pam4:-20:148:0:0:0:0
+serdes_tx_taps_434=pam4:-20:148:0:0:0:0
+serdes_tx_taps_435=pam4:-20:148:0:0:0:0
+serdes_tx_taps_436=pam4:-20:148:0:0:0:0
+serdes_tx_taps_437=pam4:-20:148:0:0:0:0
+serdes_tx_taps_438=pam4:-20:148:0:0:0:0
+serdes_tx_taps_439=pam4:-20:148:0:0:0:0
+serdes_tx_taps_440=pam4:-20:148:0:0:0:0
+serdes_tx_taps_441=pam4:-20:148:0:0:0:0
+serdes_tx_taps_442=pam4:-20:148:0:0:0:0
+serdes_tx_taps_443=pam4:-20:148:0:0:0:0
+serdes_tx_taps_444=pam4:-20:148:0:0:0:0
+serdes_tx_taps_445=pam4:-20:148:0:0:0:0
+serdes_tx_taps_446=pam4:-20:148:0:0:0:0
+serdes_tx_taps_447=pam4:-20:148:0:0:0:0
+
+rif_id_max=24576
+dpp_db_path=/usr/share/bcm/db
+udh_exists=1
+
+cmic_dma_abort_in_cold_boot=0
+sai_pfc_dlr_init_capability=0
+trunk_group_max_members=16
+sai_default_cpu_tx_tc=7
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/sai.profile b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/sai.profile
new file mode 100644
index 00000000000..dff1f16d563
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/q2cp-nokia-24x100g-12x400g-config.bcm
+SAI_SWITCH_NON_ECMP_MAX_SIZE=3072
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/default_sku b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/default_sku
new file mode 100755
index 00000000000..9089663ea7a
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/default_sku
@@ -0,0 +1 @@
+Nokia-IXR7250-X1b t1
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/gbsyncd.ini b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/gbsyncd.ini
new file mode 100644
index 00000000000..b85f757a016
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/gbsyncd.ini
@@ -0,0 +1 @@
+platform=gbsyncd-milleniob
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/installer.conf
new file mode 100644
index 00000000000..7af555c1197
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_PORT=0x3f8
+CONSOLE_DEV=0
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="amd_iommu=off"
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/pcie.yaml b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/pcie.yaml
new file mode 100644
index 00000000000..a2db8c375d2
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/pcie.yaml
@@ -0,0 +1,243 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1450'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Root Complex'
+- bus: '00'
+  dev: '00'
+  fn: '2'
+  id: '1451'
+  name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) I/O
+    Memory Management Unit'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '2'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '3'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '4'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '1'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '2'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '3'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '4'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '07'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '07'
+  fn: '1'
+  id: '1454'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Internal PCIe GPP Bridge 0 to Bus B'
+- bus: '00'
+  dev: 08
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: 08
+  fn: '1'
+  id: '1454'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Internal PCIe GPP Bridge 0 to Bus B'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 790b
+  name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 59)'
+- bus: '00'
+  dev: '14'
+  fn: '3'
+  id: 790e
+  name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: '1460'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 0'
+- bus: '00'
+  dev: '18'
+  fn: '1'
+  id: '1461'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 1'
+- bus: '00'
+  dev: '18'
+  fn: '2'
+  id: '1462'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 2'
+- bus: '00'
+  dev: '18'
+  fn: '3'
+  id: '1463'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 3'
+- bus: '00'
+  dev: '18'
+  fn: '4'
+  id: '1464'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 4'
+- bus: '00'
+  dev: '18'
+  fn: '5'
+  id: '1465'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 5'
+- bus: '00'
+  dev: '18'
+  fn: '6'
+  id: '1466'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 6'
+- bus: '00'
+  dev: '18'
+  fn: '7'
+  id: '1467'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 7'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: '0030'
+  name: 'Unassigned class [ff00]: Alcatel Device 0030 (rev 35)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: 157b
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: '0033'
+  name: 'Unassigned class [ff00]: Alcatel Device 0033 (rev 35)'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: '8850'
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device 8850 (rev 01)'
+- bus: 09
+  dev: '00'
+  fn: '0'
+  id: 145a
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
+    Zeppelin/Raven/Raven2 PCIe Dummy Function'
+- bus: 09
+  dev: '00'
+  fn: '2'
+  id: '1456'
+  name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 17h (Models
+    00h-0fh) Platform Security Processor (PSP) 3.0 Device'
+- bus: 09
+  dev: '00'
+  fn: '3'
+  id: 145f
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 xHCI
+    Compliant Host Controller'
+- bus: 0a
+  dev: '00'
+  fn: '0'
+  id: '1455'
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
+    Zeppelin/Renoir PCIe Dummy Function'
+- bus: 0a
+  dev: '00'
+  fn: '1'
+  id: '1468'
+  name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Zeppelin Cryptographic
+    Coprocessor NTBCCP'
+- bus: 0a
+  dev: '00'
+  fn: '2'
+  id: '7901'
+  name: 'SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI
+    mode] (rev 51)'
+- bus: 0a
+  dev: '00'
+  fn: '3'
+  id: '1457'
+  name: 'Audio device: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    HD Audio Controller'
+- bus: 0a
+  dev: '00'
+  fn: '4'
+  id: '1458'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: 0a
+  dev: '00'
+  fn: '5'
+  id: '1458'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: 0a
+  dev: '00'
+  fn: '6'
+  id: '1459'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: 0a
+  dev: '00'
+  fn: '7'
+  id: '1459'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform.json
new file mode 100644
index 00000000000..24b820d867f
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform.json
@@ -0,0 +1,479 @@
+{
+    "chassis": {
+        "name": "7250 IXR-X1b",
+        "components": [
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CpuCtlFpga"
+            },
+            {
+                "name": "IoCtlFpga"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fan1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan3",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan4",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan5",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan6",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan7",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan8",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan9",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan10",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan11",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan12",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 38
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan1",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan2",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan3",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan4",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan5",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan6",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan7",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan8",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan9",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan10",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan11",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan12",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }            
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            },
+            {
+                "name": "PSU2",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            }
+        ],
+        "thermals": [
+            {
+                "name": "FPGA",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "MB Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "MB Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "MB Center",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "MB CPU",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "DDR1",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "DDR2",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "Max Port Temp.",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "ASIC_DRAM0",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "ASIC_DRAM1",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "ASIC",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "CPU",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
+            }
+        ],
+        "sfps": [
+            {
+                "name": "QSFP28_1"
+            },
+            {
+                "name": "QSFP28_2"
+            },
+            {
+                "name": "QSFP28_3"
+            },
+            {
+                "name": "QSFP28_4"
+            },
+            {
+                "name": "QSFP28_5"
+            },
+            {
+                "name": "QSFP28_6"
+            },
+            {
+                "name": "QSFP28_7"
+            },
+            {
+                "name": "QSFP28_8"
+            },
+            {
+                "name": "QSFP28_9"
+            },
+            {
+                "name": "QSFP28_10"
+            },
+            {
+                "name": "QSFP28_11"
+            },
+            {
+                "name": "QSFP28_12"
+            },
+            {
+                "name": "QSFP28_13"
+            },
+            {
+                "name": "QSFP28_14"
+            },
+            {
+                "name": "QSFP28_15"
+            },
+            {
+                "name": "QSFP28_16"
+            },
+            {
+                "name": "QSFP28_17"
+            },
+            {
+                "name": "QSFP28_18"
+            },
+            {
+                "name": "QSFP28_19"
+            },
+            {
+                "name": "QSFP28_20"
+            },
+            {
+                "name": "QSFP28_21"
+            },
+            {
+                "name": "QSFP28_22"
+            },
+            {
+                "name": "QSFP28_23"
+            },
+            {
+                "name": "QSFP28_24"
+            },
+            {
+                "name": "QSFPDD_1"
+            },
+            {
+                "name": "QSFPDD_2"
+            },
+            {
+                "name": "QSFPDD_3"
+            },
+            {
+                "name": "QSFPDD_4"
+            },
+            {
+                "name": "QSFPDD_5"
+            },
+            {
+                "name": "QSFPDD_6"
+            },
+            {
+                "name": "QSFPDD_7"
+            },
+            {
+                "name": "QSFPDD_8"
+            },
+            {
+                "name": "QSFPDD_9"
+            },
+            {
+                "name": "QSFPDD_10"
+            },
+            {
+                "name": "QSFPDD_11"
+            },
+            {
+                "name": "QSFPDD_12"
+            }
+       	]
+    },
+    "interfaces": {
+    },
+    "asic_sensors": {
+        "poll_interval": "10",
+        "poll_admin_status": "enable"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_asic b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_asic
new file mode 100644
index 00000000000..9ba24ca3e75
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_asic
@@ -0,0 +1 @@
+broadcom-dnx
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_components.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_components.json
new file mode 100644
index 00000000000..b614c9c0cf4
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_components.json
@@ -0,0 +1,11 @@
+{
+    "chassis": {
+        "7250 IXR-X1b": {
+            "component": {
+                "BIOS": {},
+                "CpuCtlFpga": {},
+                "IoCtlFpga": {}
+            }
+        }
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_env.conf b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_env.conf
new file mode 100644
index 00000000000..4fd55b29f10
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_env.conf
@@ -0,0 +1,5 @@
+usemsi=1
+dmasize=512M
+default_mtu=9100
+macsec_enabled=1
+SYNCD_SHM_SIZE=512m
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_reboot b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_reboot
new file mode 100755
index 00000000000..1276e6cac43
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/platform_reboot
@@ -0,0 +1,14 @@
+#!/bin/bash
+
+systemctl stop nokia-watchdog.service
+sleep 2
+echo "w" > /dev/watchdog
+kick_date=`date -u`
+echo "last watchdog kick $kick_date" > /var/log/nokia-watchdog-last.log
+sync
+
+if [ -c "/dev/rtc1" ]; then
+    sudo hwclock -w -f /dev/rtc1
+fi
+
+exec /sbin/reboot $@
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/plugins/led_control.py
new file mode 100644
index 00000000000..1fe8ab98f52
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/plugins/led_control.py
@@ -0,0 +1,261 @@
+"""
+    led_control.py
+
+    Platform-specific LED control functionality for SONiC
+"""
+
+try:
+    from sonic_led.led_control_base import LedControlBase
+    from sonic_py_common import daemon_base
+    from sonic_py_common import multi_asic
+    from sonic_py_common import logger
+    from sonic_py_common.interface import backplane_prefix, inband_prefix, recirc_prefix
+    from swsscommon import swsscommon
+    import os
+    import time
+    import sonic_platform.platform
+    import sonic_platform.chassis
+except ImportError as e:
+    raise ImportError(str(e) + " - required module not found")
+
+SELECT_TIMEOUT = 1000
+FAN_DRAWERS = 3
+QSFP_NUMS = 36
+REG_DIR = "/sys/bus/pci/devices/0000:01:00.0/"
+PORT_DIR = "/sys/bus/pci/devices/0000:05:00.0/"
+FILE_OPERSTATE = "/sys/class/net/eth0/operstate"
+FILE_DUPLEX = "/sys/class/net/eth0/duplex"
+FILE_RX_PACKETS = "/sys/class/net/eth0/statistics/rx_packets"
+FILE_TX_PACKETS = "/sys/class/net/eth0/statistics/tx_packets"
+FILE_RX_ERRORS = "/sys/class/net/eth0/statistics/rx_errors"
+FILE_TX_ERRORS = "/sys/class/net/eth0/statistics/tx_errors"
+
+SYSLOG_IDENTIFIER = "nokia-ledd"
+sonic_logger = logger.Logger(SYSLOG_IDENTIFIER)
+sonic_logger.set_min_log_priority_info()
+
+class LedControl(LedControlBase):
+    """Platform specific LED control class"""
+
+    # Constructor
+    def __init__(self):
+        self.chassis = sonic_platform.platform.Platform().get_chassis()
+        self._initDefaultConfig()
+
+    def _initDefaultConfig(self):
+        # The fan tray leds and system led managed by new chassis class API
+        # leaving only a couple other front panel leds to be done old style
+        sonic_logger.log_info("starting system leds")
+
+        if multi_asic.is_multi_asic():
+            # Load the namespace details first from the database_global.json file.
+            if not swsscommon.SonicDBConfig.isGlobalInit():
+                swsscommon.SonicDBConfig.initializeGlobalConfig()
+
+        # Get the namespaces in the platform. For multi-asic devices we get the namespaces
+        # of front-end ascis which have front-panel interfaces.
+        namespaces = multi_asic.get_front_end_namespaces()
+
+        # Subscribe to PORT table notifications in the Application DB
+        appl_db = {}
+        self.sst = {}
+        self.sel = swsscommon.Select()
+
+        for namespace in namespaces:
+            # Open a handle to the Application database, in all namespaces
+            appl_db[namespace] = daemon_base.db_connect("APPL_DB", namespace=namespace)
+            self.sst[namespace] = swsscommon.SubscriberStateTable(appl_db[namespace], swsscommon.APP_PORT_TABLE_NAME)
+            self.sel.addSelectable(self.sst[namespace])
+
+        self._pre_port_led_stat = ['off'] * QSFP_NUMS
+        
+        self._initSystemLed()
+
+    def _read_sysfs_file(self, sysfs_file):
+        # On successful read, returns the value read from given
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'r') as fd:
+                rv = fd.read()
+                fd.close()
+        except Exception as e:
+            rv = 'ERR'
+
+        rv = rv.rstrip('\r\n')
+        rv = rv.lstrip(" ")
+        return rv
+    
+    def _write_sysfs_file(self, sysfs_file, value):
+        # On successful write, the value read will be written on
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'w') as fd:
+                rv = fd.write(value)
+                fd.close()
+        except Exception as e:
+            rv = 'ERR'
+
+        return rv
+    
+    def _initSystemLed(self):
+        self.oldfan = 'off'
+        self.oldpsu = 'off'
+        count = 0
+        self.mgmt_link = 'off'
+        self.mgmt_actv = 'off'
+        self.mgmt_rx_packets = int(self._read_sysfs_file(FILE_RX_PACKETS))
+        self.mgmt_tx_packets = int(self._read_sysfs_file(FILE_TX_PACKETS))
+
+        # Timer loop to monitor and set Port Leds and 
+        # front panel Status, Fan, and PSU LEDs
+        while True:
+            self.port_state_check()
+            self.mgmt_check()
+            count = count + 1
+            if count == 30:
+                self.fp_check()
+                count = 0
+                
+    def port_state_check(self):
+        # Use timeout to prevent ignoring the signals we want to handle
+        # in signal_handler() (e.g. SIGTERM for graceful shutdown)
+        (state, selectableObj) = self.sel.select(SELECT_TIMEOUT)
+
+        if state == swsscommon.Select.TIMEOUT:
+            # Do not flood log when select times out
+            return 1
+
+        if state != swsscommon.Select.OBJECT:
+            sonic_logger.log_warning("sel.select() did not return swsscommon.Select.OBJECT")
+            return 2
+
+        # Get the redisselect object from selectable object
+        redisSelectObj = swsscommon.CastSelectableToRedisSelectObj(selectableObj)
+
+        # Get the corresponding namespace from redisselect db connector object
+        namespace = redisSelectObj.getDbConnector().getNamespace()
+
+        (key, op, fvp) = self.sst[namespace].pop()
+        if fvp:
+            # TODO: Once these flag entries have been removed from the DB,
+            # we can remove this check
+            if key in ["PortConfigDone", "PortInitDone"]:
+                return 3
+
+            fvp_dict = dict(fvp)
+
+            if op == "SET" and "oper_status" in fvp_dict:
+                if not key.startswith((backplane_prefix(), inband_prefix(), recirc_prefix())):
+                    self.port_link_state_change(key, fvp_dict["oper_status"])
+        else:
+            return 4
+
+        return 0
+    
+    def port_link_state_change(self, port, state):
+        """
+        Called when port link state changes. Update port link state LED here.
+
+        :param port: A string, SONiC port name (e.g., "Ethernet0")
+        :param state: A string, the port link state (either "up" or "down")
+        """
+        intf_prefix = 'Ethernet'
+        if port.startswith(intf_prefix) is False:
+            return
+        else:
+            port_idx = int(port[len(intf_prefix):]) // 8 + 1
+            if port_idx < 1 or port_idx > QSFP_NUMS:
+                return
+
+        if state == 'up':
+            if self._pre_port_led_stat[port_idx-1] != 'green':
+                self._write_sysfs_file(PORT_DIR + f"port_{port_idx}_led", '0x1')
+                self._pre_port_led_stat[port_idx-1] = 'green'
+        elif state == 'down':
+            if self._pre_port_led_stat[port_idx-1] != 'off':
+                self._write_sysfs_file(PORT_DIR + f"port_{port_idx}_led", '0x0')
+                self._pre_port_led_stat[port_idx-1] = 'off'
+        else:
+            return
+    
+    def fp_check(self):
+        # Front Panel FAN Panel LED setting
+        good_fan_drawer = 0
+        for fan_drawer in self.chassis._fan_drawer_list:
+            if fan_drawer.get_status() == True:
+                good_fan_drawer = good_fan_drawer + 1
+                fan_drawer.set_status_led('green')
+            else:
+                fan_drawer.set_status_led('amber')
+        
+        if (good_fan_drawer == FAN_DRAWERS):
+            if self.oldfan != 'green':
+                self._write_sysfs_file(REG_DIR + 'led_fan', '0x6400')
+                self.oldfan = 'green'
+        else:
+            if self.oldfan != 'amber':
+                self._write_sysfs_file(REG_DIR + 'led_fan', '0xa4c700')
+                self.oldfan = 'amber'
+        
+        # Front Panel PSU Panel LED setting
+        if (self.chassis.get_psu(0).get_status() == self.chassis.get_psu(1).get_status() == True):
+            if self.oldpsu != 'green':
+                self._write_sysfs_file(REG_DIR + 'led_psu', '0x6400')
+                self.oldpsu = 'green'
+        else:
+            if self.oldpsu != 'amber':
+                self._write_sysfs_file(REG_DIR + 'led_psu', '0xa4c700')
+                self.oldpsu = 'amber'
+    
+    def mgmt_check(self):
+        link_stat = self._read_sysfs_file(FILE_OPERSTATE)
+        if link_stat == 'up':
+            duplex = self._read_sysfs_file(FILE_DUPLEX)
+            if duplex == 'full':
+                if self.mgmt_link != 'green':
+                    self._write_sysfs_file(REG_DIR + 'led_mgmt_link', '0x1')
+                    self.mgmt_link = 'green'
+            elif duplex == 'half':
+                if self.mgmt_link != 'blink_green':
+                    self._write_sysfs_file(REG_DIR + 'led_mgmt_link', '0x0')
+                    self._write_sysfs_file(REG_DIR + 'led_mgmt_link', '0xf5')
+                    self.mgmt_link = 'blink_green'
+            else:
+                if self.mgmt_link != 'off':
+                    self._write_sysfs_file(REG_DIR + 'led_mgmt_link', '0x0')
+                    self.mgmt_link = 'off'
+            
+            mgmt_rx_packets = int(self._read_sysfs_file(FILE_RX_PACKETS))
+            mgmt_tx_packets = int(self._read_sysfs_file(FILE_TX_PACKETS))
+            mgmt_rx_errors = int(self._read_sysfs_file(FILE_RX_ERRORS))
+            mgmt_tx_errors = int(self._read_sysfs_file(FILE_TX_ERRORS))
+            if mgmt_rx_errors > 0 or mgmt_tx_errors > 0:
+                if self.mgmt_actv != 'amber':
+                    self._write_sysfs_file(REG_DIR + 'led_mgmt_actv', '0x2')
+                    self.mgmt_actv = 'amber'
+            elif mgmt_rx_packets > self.mgmt_rx_packets or mgmt_tx_packets > self.mgmt_tx_packets:
+                self.mgmt_rx_packets = mgmt_rx_packets
+                self.mgmt_tx_packets = mgmt_tx_packets
+                if self.mgmt_actv != 'fast_blink_green':
+                    self._write_sysfs_file(REG_DIR + 'led_mgmt_actv', '0x0')
+                    self._write_sysfs_file(REG_DIR + 'led_mgmt_actv', '0x75')
+                    self.mgmt_actv = 'fast_blink_green'
+            else:
+                if self.mgmt_actv != 'off':
+                    self._write_sysfs_file(REG_DIR + 'led_mgmt_actv', '0x0')
+                    self.mgmt_actv = 'off'
+        else:
+            if self.mgmt_link != 'off':
+                    self._write_sysfs_file(REG_DIR + 'led_mgmt_link', '0x0')
+                    self.mgmt_link = 'off'
+            if self.mgmt_actv != 'off':
+                    self._write_sysfs_file(REG_DIR + 'led_mgmt_actv', '0x0')
+                    self.mgmt_actv = 'off'
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/plugins/ssd_util.py b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/plugins/ssd_util.py
new file mode 100755
index 00000000000..1a98e477ee3
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/plugins/ssd_util.py
@@ -0,0 +1,139 @@
+#
+# ssd_util.py
+#
+
+try:
+    import re
+    import subprocess
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+NOT_AVAILABLE = "N/A"
+SMARTCTL = "smartctl {} -a"
+GENERIC_HEALTH_ID = 169
+PHISON_HEALTH_ID = 231
+
+class SsdUtil(StorageBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+
+        self.vendor_ssd_utility = {
+            "Generic"  : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }
+        }
+
+        self.dev = diskdev
+        self.fetch_parse_info(diskdev)
+
+    def fetch_parse_info(self, diskdev):
+        self.fetch_generic_ssd_info(diskdev)
+        self.parse_generic_ssd_info()
+
+    def _execute_shell(self, cmd):
+        process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+        output, error = process.communicate()
+        return output
+
+    def _parse_re(self, pattern, buffer):
+        res_list = re.findall(pattern, buffer)
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def fetch_generic_ssd_info(self, diskdev):
+        self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+    def parse_generic_ssd_info(self):
+        self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+        if self.model.startswith('VTSM'):
+            health_id = PHISON_HEALTH_ID
+        else:
+            health_id = GENERIC_HEALTH_ID
+
+        health_raw = self.parse_id_number(health_id, self.ssd_info)
+        if health_raw == NOT_AVAILABLE:
+            self.health = NOT_AVAILABLE
+        else: self.health = health_raw.split()[-1]
+
+        temp_raw = self._parse_re('Temperature_Celsius\s*(.+?)\n', self.ssd_info)
+        if temp_raw == NOT_AVAILABLE:
+            self.temperature = NOT_AVAILABLE
+        else:
+            self.temperature = temp_raw.split()[7].split()[0]
+
+        self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        return self.health
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        return self.temperature
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
+    def parse_id_number(self, id, buffer):
+        if buffer:
+            buffer_lines = buffer.split('\n')
+            for line in buffer_lines:
+                if line.strip().startswith(str(id)):
+                    return line[len(str(id)):]
+
+        return NOT_AVAILABLE
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/pmon_daemon_control.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/pmon_daemon_control.json
new file mode 100644
index 00000000000..0b4f504a314
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "enable_xcvrd_sff_mgr": true
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/sysObjectID.txt b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/sysObjectID.txt
new file mode 100644
index 00000000000..687074de2e6
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/sysObjectID.txt
@@ -0,0 +1 @@
+.1.3.6.1.4.1.6527.1.20.92
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/system_health_monitoring_config.json
new file mode 100644
index 00000000000..d5f3a7b9830
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/system_health_monitoring_config.json
@@ -0,0 +1,14 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "blinking green"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/thermal_policy.json
new file mode 100644
index 00000000000..24c2d6d22f7
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/thermal_policy.json
@@ -0,0 +1,47 @@
+{
+    "thermal_control_algorithm": {
+        "run_at_boot_up": "false",
+        "fan_speed_when_suspend": "60"
+    },
+    "info_types": [
+        {
+            "type": "fan_info"
+        },
+        {
+            "type": "thermal_info"
+        },
+        {
+            "type": "chassis_info"
+        }
+    ],
+    "policies": [
+        {
+            "name": "any fan presence",
+            "conditions": [
+                {
+                    "type": "fan.any.presence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal.temp_check_and_set_all_fan_speed",
+                    "default_speed": "60",
+                    "hightemp_speed": "100"
+                }
+            ]
+        },
+	    {
+            "name": "temp over high critical threshold",
+            "conditions": [
+                {
+                    "type": "thermal.over.high_critical_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "switch.shutdown"
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/buffers.json.j2 b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/buffers.json.j2
new file mode 100644
index 00000000000..f34a844f4a8
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't2' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/buffers_defaults_t2.j2
new file mode 100644
index 00000000000..cf0e02f6d7c
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/buffers_defaults_t2.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- set ports2cable = {
+        'torrouter_server'       : '300m',
+        'leafrouter_torrouter'   : '300m',
+        'spinerouter_leafrouter' : '2000m',
+        'regionalhub_spinerouter': '120000m',
+        'aznghub_spinerouter'    : '120000m'
+        }
+-%}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0,36) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "6441610000",
+            "type": "both",
+            "mode": "dynamic",
+            "xoff": "1582033305"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"0"
+        },
+        "egress_lossless_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-1"
+        },
+        "egress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-4"
+        }
+    },
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/context_config.json b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/context_config.json
new file mode 100644
index 00000000000..a2f40a0b84f
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/context_config.json
@@ -0,0 +1,21 @@
+{
+    "CONTEXTS": [
+        {
+            "guid" : 0,
+            "name" : "syncd0",
+            "dbAsic" : "ASIC_DB",
+            "dbCounters" : "COUNTERS_DB",
+            "dbFlex": "FLEX_COUNTER_DB",
+            "dbState" : "STATE_DB",
+            "zmq_enable": false,
+            "zmq_endpoint": "tcp://127.0.0.1:5555",
+            "zmq_ntf_endpoint": "tcp://127.0.0.1:5556",
+            "switches": [
+                {
+                    "index" : 0,
+                    "hwinfo" : "08:00.0"
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/jr2cp-nokia-18x400g-config.bcm
new file mode 100644
index 00000000000..4b9cc1875d5
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/jr2cp-nokia-18x400g-config.bcm
@@ -0,0 +1,2155 @@
+appl_param_nof_devices.BCM8885X=2
+appl_enable_mesh_topology_init=0
+appl_enable_intr_init.BCM8885X=1
+appl_enable_learn_and_limit_init.BCM8885X=0
+appl_enable_oam.BCM8885X=0
+appl_enable_oam_fwd_idx_wa_init.BCM8885X=0
+appl_enable_oam_stat_wa_init.BCM8885X=0
+dma_desc_aggregator_buff_size_kb.BCM8885X=100
+dma_desc_aggregator_chain_length_max.BCM8885X=1000
+dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1
+dma_desc_aggregator_timeout_usec.BCM8885X=1000
+dport_map_direct.BCM8885X=1
+programmability_image_name.BCM8885X=standard_1
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
+dtm_flow_mapping_mode_region_64.BCM8885X=3
+dtm_flow_mapping_mode_region_65.BCM8885X=3
+dtm_flow_mapping_mode_region_66.BCM8885X=3
+dtm_flow_mapping_mode_region_67.BCM8885X=3
+dtm_flow_mapping_mode_region_68.BCM8885X=3
+dtm_flow_mapping_mode_region_69.BCM8885X=3
+dtm_flow_mapping_mode_region_70.BCM8885X=3
+dtm_flow_mapping_mode_region_71.BCM8885X=3
+dtm_flow_mapping_mode_region_72.BCM8885X=3
+dtm_flow_mapping_mode_region_73.BCM8885X=3
+dtm_flow_mapping_mode_region_74.BCM8885X=3
+dtm_flow_mapping_mode_region_75.BCM8885X=3
+dtm_flow_mapping_mode_region_76.BCM8885X=3
+dtm_flow_mapping_mode_region_77.BCM8885X=3
+dtm_flow_mapping_mode_region_78.BCM8885X=3
+dtm_flow_mapping_mode_region_79.BCM8885X=7
+dtm_flow_mapping_mode_region_80.BCM8885X=3
+dtm_flow_mapping_mode_region_81.BCM8885X=1
+dtm_flow_mapping_mode_region_82.BCM8885X=3
+dtm_flow_mapping_mode_region_83.BCM8885X=3
+dtm_flow_mapping_mode_region_84.BCM8885X=3
+dtm_flow_mapping_mode_region_85.BCM8885X=3
+dtm_flow_mapping_mode_region_86.BCM8885X=3
+dtm_flow_mapping_mode_region_87.BCM8885X=3
+dtm_flow_mapping_mode_region_88.BCM8885X=3
+dtm_flow_mapping_mode_region_89.BCM8885X=3
+dtm_flow_mapping_mode_region_90.BCM8885X=3
+dtm_flow_mapping_mode_region_91.BCM8885X=3
+dtm_flow_mapping_mode_region_92.BCM8885X=3
+dtm_flow_mapping_mode_region_93.BCM8885X=3
+dtm_flow_mapping_mode_region_94.BCM8885X=3
+dtm_flow_nof_remote_cores_region_1.BCM8885X=2
+dtm_flow_nof_remote_cores_region_10.BCM8885X=2
+dtm_flow_nof_remote_cores_region_11.BCM8885X=2
+dtm_flow_nof_remote_cores_region_12.BCM8885X=2
+dtm_flow_nof_remote_cores_region_13.BCM8885X=2
+dtm_flow_nof_remote_cores_region_14.BCM8885X=2
+dtm_flow_nof_remote_cores_region_15.BCM8885X=2
+dtm_flow_nof_remote_cores_region_16.BCM8885X=2
+dtm_flow_nof_remote_cores_region_17.BCM8885X=2
+dtm_flow_nof_remote_cores_region_18.BCM8885X=2
+dtm_flow_nof_remote_cores_region_19.BCM8885X=2
+dtm_flow_nof_remote_cores_region_2.BCM8885X=2
+dtm_flow_nof_remote_cores_region_20.BCM8885X=2
+dtm_flow_nof_remote_cores_region_21.BCM8885X=2
+dtm_flow_nof_remote_cores_region_22.BCM8885X=2
+dtm_flow_nof_remote_cores_region_23.BCM8885X=2
+dtm_flow_nof_remote_cores_region_24.BCM8885X=2
+dtm_flow_nof_remote_cores_region_25.BCM8885X=2
+dtm_flow_nof_remote_cores_region_26.BCM8885X=2
+dtm_flow_nof_remote_cores_region_27.BCM8885X=2
+dtm_flow_nof_remote_cores_region_28.BCM8885X=2
+dtm_flow_nof_remote_cores_region_29.BCM8885X=2
+dtm_flow_nof_remote_cores_region_3.BCM8885X=2
+dtm_flow_nof_remote_cores_region_30.BCM8885X=2
+dtm_flow_nof_remote_cores_region_31.BCM8885X=2
+dtm_flow_nof_remote_cores_region_32.BCM8885X=2
+dtm_flow_nof_remote_cores_region_33.BCM8885X=2
+dtm_flow_nof_remote_cores_region_34.BCM8885X=2
+dtm_flow_nof_remote_cores_region_35.BCM8885X=2
+dtm_flow_nof_remote_cores_region_36.BCM8885X=2
+dtm_flow_nof_remote_cores_region_37.BCM8885X=2
+dtm_flow_nof_remote_cores_region_38.BCM8885X=2
+dtm_flow_nof_remote_cores_region_39.BCM8885X=2
+dtm_flow_nof_remote_cores_region_4.BCM8885X=2
+dtm_flow_nof_remote_cores_region_40.BCM8885X=2
+dtm_flow_nof_remote_cores_region_41.BCM8885X=2
+dtm_flow_nof_remote_cores_region_42.BCM8885X=2
+dtm_flow_nof_remote_cores_region_43.BCM8885X=2
+dtm_flow_nof_remote_cores_region_44.BCM8885X=2
+dtm_flow_nof_remote_cores_region_45.BCM8885X=2
+dtm_flow_nof_remote_cores_region_46.BCM8885X=2
+dtm_flow_nof_remote_cores_region_47.BCM8885X=2
+dtm_flow_nof_remote_cores_region_48.BCM8885X=2
+dtm_flow_nof_remote_cores_region_49.BCM8885X=2
+dtm_flow_nof_remote_cores_region_5.BCM8885X=2
+dtm_flow_nof_remote_cores_region_50.BCM8885X=2
+dtm_flow_nof_remote_cores_region_51.BCM8885X=2
+dtm_flow_nof_remote_cores_region_52.BCM8885X=2
+dtm_flow_nof_remote_cores_region_53.BCM8885X=2
+dtm_flow_nof_remote_cores_region_54.BCM8885X=2
+dtm_flow_nof_remote_cores_region_55.BCM8885X=2
+dtm_flow_nof_remote_cores_region_56.BCM8885X=2
+dtm_flow_nof_remote_cores_region_57.BCM8885X=2
+dtm_flow_nof_remote_cores_region_58.BCM8885X=2
+dtm_flow_nof_remote_cores_region_59.BCM8885X=2
+dtm_flow_nof_remote_cores_region_6.BCM8885X=2
+dtm_flow_nof_remote_cores_region_60.BCM8885X=2
+dtm_flow_nof_remote_cores_region_7.BCM8885X=2
+dtm_flow_nof_remote_cores_region_8.BCM8885X=2
+dtm_flow_nof_remote_cores_region_9.BCM8885X=2
+dtm_flow_nof_remote_cores_region_73.BCM8869X=2
+dtm_flow_mapping_mode_region_73.BCM8869X=0
+dtm_flow_nof_remote_cores_region_74.BCM8869X=2
+dtm_flow_mapping_mode_region_74.BCM8869X=0
+dtm_flow_nof_remote_cores_region_75.BCM8869X=2
+dtm_flow_mapping_mode_region_75.BCM8869X=0
+ext_ram_enabled_bitmap.BCM8885X=3
+ext_ram_freq.BCM8885X=1200
+dram_temperature_threshold_restore_traffic.BCM8885X=89
+dram_temperature_threshold_power_down.BCM8885X=102
+dram_temperature_threshold_stop_traffic.BCM8885X=94
+dram_temperature_monitor_enable.BCM8885X=1
+fabric_connect_mode.BCM8885X=MESH
+fabric_mesh_multicast_enable=1
+fabric_num_pipes=2
+fabric_pipe_map_uc=0
+fabric_pipe_map_mc=1
+system_contains_multiple_pipe_device=1
+ftmh_stacking_extension_size=0
+j2_ftmh_lb_key_extension_size=3
+j_ftmh_lb_key_extension_size=0
+
+
+lane_to_serdes_map_fabric_lane0.BCM8885X=rx0:tx0
+lane_to_serdes_map_fabric_lane1.BCM8885X=rx1:tx1
+lane_to_serdes_map_fabric_lane2.BCM8885X=rx2:tx2
+lane_to_serdes_map_fabric_lane3.BCM8885X=rx3:tx3
+lane_to_serdes_map_fabric_lane4.BCM8885X=rx4:tx4
+lane_to_serdes_map_fabric_lane5.BCM8885X=rx5:tx5
+lane_to_serdes_map_fabric_lane6.BCM8885X=rx6:tx6
+lane_to_serdes_map_fabric_lane7.BCM8885X=rx7:tx7
+lane_to_serdes_map_fabric_lane8.BCM8885X=rx8:tx11
+lane_to_serdes_map_fabric_lane9.BCM8885X=rx9:tx8
+lane_to_serdes_map_fabric_lane10.BCM8885X=rx10:tx9
+lane_to_serdes_map_fabric_lane11.BCM8885X=rx11:tx10
+lane_to_serdes_map_fabric_lane12.BCM8885X=rx12:tx15
+lane_to_serdes_map_fabric_lane13.BCM8885X=rx13:tx12
+lane_to_serdes_map_fabric_lane14.BCM8885X=rx14:tx14
+lane_to_serdes_map_fabric_lane15.BCM8885X=rx15:tx13
+lane_to_serdes_map_fabric_lane16.BCM8885X=rx16:tx16
+lane_to_serdes_map_fabric_lane17.BCM8885X=rx17:tx17
+lane_to_serdes_map_fabric_lane18.BCM8885X=rx18:tx18
+lane_to_serdes_map_fabric_lane19.BCM8885X=rx19:tx19
+
+lane_to_serdes_map_fabric_lane20.BCM8885X=rx20:tx20
+lane_to_serdes_map_fabric_lane21.BCM8885X=rx21:tx21
+lane_to_serdes_map_fabric_lane22.BCM8885X=rx22:tx22
+lane_to_serdes_map_fabric_lane23.BCM8885X=rx23:tx23
+lane_to_serdes_map_fabric_lane24.BCM8885X=rx24:tx24
+lane_to_serdes_map_fabric_lane25.BCM8885X=rx25:tx25
+lane_to_serdes_map_fabric_lane26.BCM8885X=rx26:tx26
+lane_to_serdes_map_fabric_lane27.BCM8885X=rx27:tx27
+
+lane_to_serdes_map_fabric_lane28.BCM8885X=rx28:tx28
+lane_to_serdes_map_fabric_lane29.BCM8885X=rx29:tx29
+lane_to_serdes_map_fabric_lane30.BCM8885X=rx30:tx30
+lane_to_serdes_map_fabric_lane31.BCM8885X=rx31:tx31
+lane_to_serdes_map_fabric_lane32.BCM8885X=rx32:tx32
+lane_to_serdes_map_fabric_lane33.BCM8885X=rx33:tx33
+lane_to_serdes_map_fabric_lane34.BCM8885X=rx34:tx34
+lane_to_serdes_map_fabric_lane35.BCM8885X=rx35:tx35
+
+lane_to_serdes_map_fabric_lane36.BCM8885X=rx36:tx36
+lane_to_serdes_map_fabric_lane37.BCM8885X=rx37:tx37
+lane_to_serdes_map_fabric_lane38.BCM8885X=rx38:tx38
+lane_to_serdes_map_fabric_lane39.BCM8885X=rx39:tx39
+lane_to_serdes_map_fabric_lane40.BCM8885X=rx40:tx40
+lane_to_serdes_map_fabric_lane41.BCM8885X=rx41:tx41
+lane_to_serdes_map_fabric_lane42.BCM8885X=rx42:tx42
+lane_to_serdes_map_fabric_lane43.BCM8885X=rx43:tx43
+lane_to_serdes_map_fabric_lane44.BCM8885X=rx44:tx44
+lane_to_serdes_map_fabric_lane45.BCM8885X=rx45:tx45
+lane_to_serdes_map_fabric_lane46.BCM8885X=rx46:tx46
+lane_to_serdes_map_fabric_lane47.BCM8885X=rx47:tx47
+lane_to_serdes_map_fabric_lane48.BCM8885X=rx48:tx48
+lane_to_serdes_map_fabric_lane49.BCM8885X=rx49:tx49
+lane_to_serdes_map_fabric_lane50.BCM8885X=rx50:tx50
+lane_to_serdes_map_fabric_lane51.BCM8885X=rx51:tx51
+
+lane_to_serdes_map_fabric_lane52.BCM8885X=rx52:tx52
+lane_to_serdes_map_fabric_lane53.BCM8885X=rx53:tx53
+lane_to_serdes_map_fabric_lane54.BCM8885X=rx54:tx54
+lane_to_serdes_map_fabric_lane55.BCM8885X=rx55:tx55
+lane_to_serdes_map_fabric_lane56.BCM8885X=rx56:tx56
+lane_to_serdes_map_fabric_lane57.BCM8885X=rx57:tx57
+lane_to_serdes_map_fabric_lane58.BCM8885X=rx58:tx58
+lane_to_serdes_map_fabric_lane59.BCM8885X=rx59:tx59
+lane_to_serdes_map_fabric_lane60.BCM8885X=rx60:tx60
+lane_to_serdes_map_fabric_lane61.BCM8885X=rx61:tx61
+lane_to_serdes_map_fabric_lane62.BCM8885X=rx62:tx62
+lane_to_serdes_map_fabric_lane63.BCM8885X=rx63:tx63
+lane_to_serdes_map_fabric_lane64.BCM8885X=rx64:tx64
+lane_to_serdes_map_fabric_lane65.BCM8885X=rx65:tx65
+lane_to_serdes_map_fabric_lane66.BCM8885X=rx66:tx66
+lane_to_serdes_map_fabric_lane67.BCM8885X=rx67:tx67
+
+lane_to_serdes_map_fabric_lane68.BCM8885X=rx68:tx68
+lane_to_serdes_map_fabric_lane69.BCM8885X=rx69:tx69
+lane_to_serdes_map_fabric_lane70.BCM8885X=rx70:tx70
+lane_to_serdes_map_fabric_lane71.BCM8885X=rx71:tx71
+lane_to_serdes_map_fabric_lane72.BCM8885X=rx72:tx72
+lane_to_serdes_map_fabric_lane73.BCM8885X=rx73:tx73
+lane_to_serdes_map_fabric_lane74.BCM8885X=rx74:tx74
+lane_to_serdes_map_fabric_lane75.BCM8885X=rx75:tx75
+lane_to_serdes_map_fabric_lane76.BCM8885X=rx76:tx76
+lane_to_serdes_map_fabric_lane77.BCM8885X=rx77:tx77
+lane_to_serdes_map_fabric_lane78.BCM8885X=rx78:tx78
+lane_to_serdes_map_fabric_lane79.BCM8885X=rx79:tx79
+lane_to_serdes_map_fabric_lane80.BCM8885X=rx80:tx80
+lane_to_serdes_map_fabric_lane81.BCM8885X=rx81:tx81
+lane_to_serdes_map_fabric_lane82.BCM8885X=rx82:tx82
+lane_to_serdes_map_fabric_lane83.BCM8885X=rx83:tx83
+
+lane_to_serdes_map_fabric_lane84.BCM8885X=rx84:tx84
+lane_to_serdes_map_fabric_lane85.BCM8885X=rx85:tx85
+lane_to_serdes_map_fabric_lane86.BCM8885X=rx86:tx86
+lane_to_serdes_map_fabric_lane87.BCM8885X=rx87:tx87
+
+lane_to_serdes_map_fabric_lane88.BCM8885X=rx88:tx88
+lane_to_serdes_map_fabric_lane89.BCM8885X=rx89:tx90
+lane_to_serdes_map_fabric_lane90.BCM8885X=rx90:tx89
+lane_to_serdes_map_fabric_lane91.BCM8885X=rx91:tx91
+
+lane_to_serdes_map_fabric_lane92.BCM8885X=rx92:tx94
+lane_to_serdes_map_fabric_lane93.BCM8885X=rx93:tx95
+lane_to_serdes_map_fabric_lane94.BCM8885X=rx94:tx93
+lane_to_serdes_map_fabric_lane95.BCM8885X=rx95:tx92
+lane_to_serdes_map_fabric_lane96.BCM8885X=rx96:tx96
+lane_to_serdes_map_fabric_lane97.BCM8885X=rx97:tx97
+lane_to_serdes_map_fabric_lane98.BCM8885X=rx98:tx98
+lane_to_serdes_map_fabric_lane99.BCM8885X=rx99:tx99
+
+lane_to_serdes_map_fabric_lane100.BCM8885X=rx100:tx100
+lane_to_serdes_map_fabric_lane101.BCM8885X=rx101:tx101
+lane_to_serdes_map_fabric_lane102.BCM8885X=rx102:tx102
+lane_to_serdes_map_fabric_lane103.BCM8885X=rx103:tx103
+lane_to_serdes_map_fabric_lane104.BCM8885X=rx104:tx107
+lane_to_serdes_map_fabric_lane105.BCM8885X=rx105:tx104
+lane_to_serdes_map_fabric_lane106.BCM8885X=rx106:tx106
+lane_to_serdes_map_fabric_lane107.BCM8885X=rx107:tx105
+lane_to_serdes_map_fabric_lane108.BCM8885X=rx108:tx111
+lane_to_serdes_map_fabric_lane109.BCM8885X=rx109:tx108
+lane_to_serdes_map_fabric_lane110.BCM8885X=rx110:tx109
+lane_to_serdes_map_fabric_lane111.BCM8885X=rx111:tx110
+lane_to_serdes_map_fabric_lane112.BCM8885X=rx112:tx112
+lane_to_serdes_map_fabric_lane113.BCM8885X=rx113:tx113
+lane_to_serdes_map_fabric_lane114.BCM8885X=rx114:tx114
+lane_to_serdes_map_fabric_lane115.BCM8885X=rx115:tx115
+
+lane_to_serdes_map_fabric_lane116.BCM8885X=rx116:tx116
+lane_to_serdes_map_fabric_lane117.BCM8885X=rx117:tx119
+lane_to_serdes_map_fabric_lane118.BCM8885X=rx118:tx118
+lane_to_serdes_map_fabric_lane119.BCM8885X=rx119:tx117
+lane_to_serdes_map_fabric_lane120.BCM8885X=rx120:tx120
+lane_to_serdes_map_fabric_lane121.BCM8885X=rx121:tx123
+lane_to_serdes_map_fabric_lane122.BCM8885X=rx122:tx121
+lane_to_serdes_map_fabric_lane123.BCM8885X=rx123:tx122
+lane_to_serdes_map_fabric_lane124.BCM8885X=rx124:tx125
+lane_to_serdes_map_fabric_lane125.BCM8885X=rx125:tx126
+lane_to_serdes_map_fabric_lane126.BCM8885X=rx126:tx124
+lane_to_serdes_map_fabric_lane127.BCM8885X=rx127:tx127
+
+lane_to_serdes_map_fabric_lane128.BCM8885X=rx128:tx128
+lane_to_serdes_map_fabric_lane129.BCM8885X=rx129:tx129
+lane_to_serdes_map_fabric_lane130.BCM8885X=rx130:tx130
+lane_to_serdes_map_fabric_lane131.BCM8885X=rx131:tx131
+
+lane_to_serdes_map_fabric_lane132.BCM8885X=rx132:tx132
+lane_to_serdes_map_fabric_lane133.BCM8885X=rx133:tx133
+lane_to_serdes_map_fabric_lane134.BCM8885X=rx134:tx134
+lane_to_serdes_map_fabric_lane135.BCM8885X=rx135:tx135
+lane_to_serdes_map_fabric_lane136.BCM8885X=rx136:tx136
+lane_to_serdes_map_fabric_lane137.BCM8885X=rx137:tx137
+lane_to_serdes_map_fabric_lane138.BCM8885X=rx138:tx138
+lane_to_serdes_map_fabric_lane139.BCM8885X=rx139:tx139
+lane_to_serdes_map_fabric_lane140.BCM8885X=rx140:tx140
+lane_to_serdes_map_fabric_lane141.BCM8885X=rx141:tx141
+lane_to_serdes_map_fabric_lane142.BCM8885X=rx142:tx142
+lane_to_serdes_map_fabric_lane143.BCM8885X=rx143:tx143
+lane_to_serdes_map_fabric_lane144.BCM8885X=rx144:tx144
+lane_to_serdes_map_fabric_lane145.BCM8885X=rx145:tx145
+lane_to_serdes_map_fabric_lane146.BCM8885X=rx146:tx146
+lane_to_serdes_map_fabric_lane147.BCM8885X=rx147:tx147
+
+lane_to_serdes_map_fabric_lane148.BCM8885X=rx148:tx148
+lane_to_serdes_map_fabric_lane149.BCM8885X=rx149:tx149
+lane_to_serdes_map_fabric_lane150.BCM8885X=rx150:tx150
+lane_to_serdes_map_fabric_lane151.BCM8885X=rx151:tx151
+lane_to_serdes_map_fabric_lane152.BCM8885X=rx152:tx152
+lane_to_serdes_map_fabric_lane153.BCM8885X=rx153:tx153
+lane_to_serdes_map_fabric_lane154.BCM8885X=rx154:tx154
+lane_to_serdes_map_fabric_lane155.BCM8885X=rx155:tx155
+lane_to_serdes_map_fabric_lane156.BCM8885X=rx156:tx156
+lane_to_serdes_map_fabric_lane157.BCM8885X=rx157:tx157
+lane_to_serdes_map_fabric_lane158.BCM8885X=rx158:tx158
+lane_to_serdes_map_fabric_lane159.BCM8885X=rx159:tx159
+lane_to_serdes_map_fabric_lane160.BCM8885X=rx160:tx160
+lane_to_serdes_map_fabric_lane161.BCM8885X=rx161:tx161
+lane_to_serdes_map_fabric_lane162.BCM8885X=rx162:tx162
+lane_to_serdes_map_fabric_lane163.BCM8885X=rx163:tx163
+
+lane_to_serdes_map_fabric_lane164.BCM8885X=rx164:tx164
+lane_to_serdes_map_fabric_lane165.BCM8885X=rx165:tx165
+lane_to_serdes_map_fabric_lane166.BCM8885X=rx166:tx166
+lane_to_serdes_map_fabric_lane167.BCM8885X=rx167:tx167
+lane_to_serdes_map_fabric_lane168.BCM8885X=rx168:tx168
+lane_to_serdes_map_fabric_lane169.BCM8885X=rx169:tx169
+lane_to_serdes_map_fabric_lane170.BCM8885X=rx170:tx170
+lane_to_serdes_map_fabric_lane171.BCM8885X=rx171:tx171
+lane_to_serdes_map_fabric_lane172.BCM8885X=rx172:tx172
+lane_to_serdes_map_fabric_lane173.BCM8885X=rx173:tx173
+lane_to_serdes_map_fabric_lane174.BCM8885X=rx174:tx174
+lane_to_serdes_map_fabric_lane175.BCM8885X=rx175:tx175
+lane_to_serdes_map_fabric_lane176.BCM8885X=rx176:tx176
+lane_to_serdes_map_fabric_lane177.BCM8885X=rx177:tx177
+lane_to_serdes_map_fabric_lane178.BCM8885X=rx178:tx178
+lane_to_serdes_map_fabric_lane179.BCM8885X=rx179:tx179
+
+lane_to_serdes_map_fabric_lane180.BCM8885X=rx180:tx180
+lane_to_serdes_map_fabric_lane181.BCM8885X=rx181:tx181
+lane_to_serdes_map_fabric_lane182.BCM8885X=rx182:tx182
+lane_to_serdes_map_fabric_lane183.BCM8885X=rx183:tx183
+
+lane_to_serdes_map_fabric_lane184.BCM8885X=rx184:tx184
+lane_to_serdes_map_fabric_lane185.BCM8885X=rx185:tx186
+lane_to_serdes_map_fabric_lane186.BCM8885X=rx186:tx185
+lane_to_serdes_map_fabric_lane187.BCM8885X=rx187:tx187
+
+lane_to_serdes_map_fabric_lane188.BCM8885X=rx188:tx190
+lane_to_serdes_map_fabric_lane189.BCM8885X=rx189:tx188
+lane_to_serdes_map_fabric_lane190.BCM8885X=rx190:tx191
+lane_to_serdes_map_fabric_lane191.BCM8885X=rx191:tx189
+
+
+phy_rx_polarity_flip_fabric0.BCM8885X=1
+phy_rx_polarity_flip_fabric1.BCM8885X=1
+phy_rx_polarity_flip_fabric2.BCM8885X=1
+phy_rx_polarity_flip_fabric3.BCM8885X=1
+phy_rx_polarity_flip_fabric4.BCM8885X=1
+phy_rx_polarity_flip_fabric5.BCM8885X=1
+phy_rx_polarity_flip_fabric6.BCM8885X=1
+phy_rx_polarity_flip_fabric7.BCM8885X=1
+phy_rx_polarity_flip_fabric8.BCM8885X=1
+phy_rx_polarity_flip_fabric9.BCM8885X=0
+phy_rx_polarity_flip_fabric10.BCM8885X=0
+phy_rx_polarity_flip_fabric11.BCM8885X=0
+phy_rx_polarity_flip_fabric12.BCM8885X=0
+phy_rx_polarity_flip_fabric13.BCM8885X=1
+phy_rx_polarity_flip_fabric14.BCM8885X=0
+phy_rx_polarity_flip_fabric15.BCM8885X=0
+phy_rx_polarity_flip_fabric16.BCM8885X=0
+phy_rx_polarity_flip_fabric17.BCM8885X=0
+phy_rx_polarity_flip_fabric18.BCM8885X=0
+phy_rx_polarity_flip_fabric19.BCM8885X=0
+phy_rx_polarity_flip_fabric20.BCM8885X=1
+phy_rx_polarity_flip_fabric21.BCM8885X=0
+phy_rx_polarity_flip_fabric22.BCM8885X=0
+phy_rx_polarity_flip_fabric23.BCM8885X=1
+phy_rx_polarity_flip_fabric24.BCM8885X=0
+phy_rx_polarity_flip_fabric25.BCM8885X=0
+phy_rx_polarity_flip_fabric26.BCM8885X=1
+phy_rx_polarity_flip_fabric27.BCM8885X=0
+phy_rx_polarity_flip_fabric28.BCM8885X=1
+phy_rx_polarity_flip_fabric29.BCM8885X=0
+phy_rx_polarity_flip_fabric30.BCM8885X=0
+phy_rx_polarity_flip_fabric31.BCM8885X=0
+phy_rx_polarity_flip_fabric32.BCM8885X=1
+phy_rx_polarity_flip_fabric33.BCM8885X=1
+phy_rx_polarity_flip_fabric34.BCM8885X=1
+phy_rx_polarity_flip_fabric35.BCM8885X=1
+phy_rx_polarity_flip_fabric36.BCM8885X=1
+phy_rx_polarity_flip_fabric37.BCM8885X=1
+phy_rx_polarity_flip_fabric38.BCM8885X=1
+phy_rx_polarity_flip_fabric39.BCM8885X=1
+phy_rx_polarity_flip_fabric40.BCM8885X=1
+phy_rx_polarity_flip_fabric41.BCM8885X=1
+phy_rx_polarity_flip_fabric42.BCM8885X=1
+phy_rx_polarity_flip_fabric43.BCM8885X=1
+phy_rx_polarity_flip_fabric44.BCM8885X=0
+phy_rx_polarity_flip_fabric45.BCM8885X=0
+phy_rx_polarity_flip_fabric46.BCM8885X=0
+phy_rx_polarity_flip_fabric47.BCM8885X=0
+phy_rx_polarity_flip_fabric48.BCM8885X=0
+phy_rx_polarity_flip_fabric49.BCM8885X=0
+phy_rx_polarity_flip_fabric50.BCM8885X=0
+phy_rx_polarity_flip_fabric51.BCM8885X=0
+phy_rx_polarity_flip_fabric52.BCM8885X=0
+phy_rx_polarity_flip_fabric53.BCM8885X=0
+phy_rx_polarity_flip_fabric54.BCM8885X=0
+phy_rx_polarity_flip_fabric55.BCM8885X=0
+phy_rx_polarity_flip_fabric56.BCM8885X=1
+phy_rx_polarity_flip_fabric57.BCM8885X=1
+phy_rx_polarity_flip_fabric58.BCM8885X=1
+phy_rx_polarity_flip_fabric59.BCM8885X=1
+phy_rx_polarity_flip_fabric60.BCM8885X=0
+phy_rx_polarity_flip_fabric61.BCM8885X=0
+phy_rx_polarity_flip_fabric62.BCM8885X=0
+phy_rx_polarity_flip_fabric63.BCM8885X=0
+phy_rx_polarity_flip_fabric64.BCM8885X=0
+phy_rx_polarity_flip_fabric65.BCM8885X=0
+phy_rx_polarity_flip_fabric66.BCM8885X=0
+phy_rx_polarity_flip_fabric67.BCM8885X=0
+phy_rx_polarity_flip_fabric68.BCM8885X=0
+phy_rx_polarity_flip_fabric69.BCM8885X=0
+phy_rx_polarity_flip_fabric70.BCM8885X=0
+phy_rx_polarity_flip_fabric71.BCM8885X=0
+phy_rx_polarity_flip_fabric72.BCM8885X=0
+phy_rx_polarity_flip_fabric73.BCM8885X=0
+phy_rx_polarity_flip_fabric74.BCM8885X=0
+phy_rx_polarity_flip_fabric75.BCM8885X=0
+phy_rx_polarity_flip_fabric76.BCM8885X=1
+phy_rx_polarity_flip_fabric77.BCM8885X=1
+phy_rx_polarity_flip_fabric78.BCM8885X=1
+phy_rx_polarity_flip_fabric79.BCM8885X=1
+phy_rx_polarity_flip_fabric80.BCM8885X=0
+phy_rx_polarity_flip_fabric81.BCM8885X=0
+phy_rx_polarity_flip_fabric82.BCM8885X=0
+phy_rx_polarity_flip_fabric83.BCM8885X=0
+phy_rx_polarity_flip_fabric84.BCM8885X=0
+phy_rx_polarity_flip_fabric85.BCM8885X=0
+phy_rx_polarity_flip_fabric86.BCM8885X=0
+phy_rx_polarity_flip_fabric87.BCM8885X=0
+phy_rx_polarity_flip_fabric88.BCM8885X=0
+phy_rx_polarity_flip_fabric89.BCM8885X=0
+phy_rx_polarity_flip_fabric90.BCM8885X=0
+phy_rx_polarity_flip_fabric91.BCM8885X=0
+phy_rx_polarity_flip_fabric92.BCM8885X=0
+phy_rx_polarity_flip_fabric93.BCM8885X=0
+phy_rx_polarity_flip_fabric94.BCM8885X=0
+phy_rx_polarity_flip_fabric95.BCM8885X=0
+phy_rx_polarity_flip_fabric96.BCM8885X=1
+phy_rx_polarity_flip_fabric97.BCM8885X=1
+phy_rx_polarity_flip_fabric98.BCM8885X=1
+phy_rx_polarity_flip_fabric99.BCM8885X=1
+phy_rx_polarity_flip_fabric100.BCM8885X=1
+phy_rx_polarity_flip_fabric101.BCM8885X=1
+phy_rx_polarity_flip_fabric102.BCM8885X=1
+phy_rx_polarity_flip_fabric103.BCM8885X=1
+phy_rx_polarity_flip_fabric104.BCM8885X=1
+phy_rx_polarity_flip_fabric105.BCM8885X=0
+phy_rx_polarity_flip_fabric106.BCM8885X=0
+phy_rx_polarity_flip_fabric107.BCM8885X=0
+phy_rx_polarity_flip_fabric108.BCM8885X=0
+phy_rx_polarity_flip_fabric109.BCM8885X=1
+phy_rx_polarity_flip_fabric110.BCM8885X=0
+phy_rx_polarity_flip_fabric111.BCM8885X=0
+phy_rx_polarity_flip_fabric112.BCM8885X=0
+phy_rx_polarity_flip_fabric113.BCM8885X=0
+phy_rx_polarity_flip_fabric114.BCM8885X=0
+phy_rx_polarity_flip_fabric115.BCM8885X=0
+phy_rx_polarity_flip_fabric116.BCM8885X=1
+phy_rx_polarity_flip_fabric117.BCM8885X=0
+phy_rx_polarity_flip_fabric118.BCM8885X=0
+phy_rx_polarity_flip_fabric119.BCM8885X=1
+phy_rx_polarity_flip_fabric120.BCM8885X=0
+phy_rx_polarity_flip_fabric121.BCM8885X=0
+phy_rx_polarity_flip_fabric122.BCM8885X=1
+phy_rx_polarity_flip_fabric123.BCM8885X=0
+phy_rx_polarity_flip_fabric124.BCM8885X=0
+phy_rx_polarity_flip_fabric125.BCM8885X=0
+phy_rx_polarity_flip_fabric126.BCM8885X=0
+phy_rx_polarity_flip_fabric127.BCM8885X=0
+phy_rx_polarity_flip_fabric128.BCM8885X=1
+phy_rx_polarity_flip_fabric129.BCM8885X=1
+phy_rx_polarity_flip_fabric130.BCM8885X=1
+phy_rx_polarity_flip_fabric131.BCM8885X=1
+phy_rx_polarity_flip_fabric132.BCM8885X=1
+phy_rx_polarity_flip_fabric133.BCM8885X=1
+phy_rx_polarity_flip_fabric134.BCM8885X=1
+phy_rx_polarity_flip_fabric135.BCM8885X=1
+phy_rx_polarity_flip_fabric136.BCM8885X=1
+phy_rx_polarity_flip_fabric137.BCM8885X=1
+phy_rx_polarity_flip_fabric138.BCM8885X=1
+phy_rx_polarity_flip_fabric139.BCM8885X=1
+phy_rx_polarity_flip_fabric140.BCM8885X=0
+phy_rx_polarity_flip_fabric141.BCM8885X=0
+phy_rx_polarity_flip_fabric142.BCM8885X=0
+phy_rx_polarity_flip_fabric143.BCM8885X=0
+phy_rx_polarity_flip_fabric144.BCM8885X=0
+phy_rx_polarity_flip_fabric145.BCM8885X=0
+phy_rx_polarity_flip_fabric146.BCM8885X=0
+phy_rx_polarity_flip_fabric147.BCM8885X=0
+phy_rx_polarity_flip_fabric148.BCM8885X=0
+phy_rx_polarity_flip_fabric149.BCM8885X=0
+phy_rx_polarity_flip_fabric150.BCM8885X=0
+phy_rx_polarity_flip_fabric151.BCM8885X=0
+phy_rx_polarity_flip_fabric152.BCM8885X=1
+phy_rx_polarity_flip_fabric153.BCM8885X=1
+phy_rx_polarity_flip_fabric154.BCM8885X=1
+phy_rx_polarity_flip_fabric155.BCM8885X=1
+phy_rx_polarity_flip_fabric156.BCM8885X=0
+phy_rx_polarity_flip_fabric157.BCM8885X=0
+phy_rx_polarity_flip_fabric158.BCM8885X=0
+phy_rx_polarity_flip_fabric159.BCM8885X=0
+phy_rx_polarity_flip_fabric160.BCM8885X=0
+phy_rx_polarity_flip_fabric161.BCM8885X=0
+phy_rx_polarity_flip_fabric162.BCM8885X=0
+phy_rx_polarity_flip_fabric163.BCM8885X=0
+phy_rx_polarity_flip_fabric164.BCM8885X=0
+phy_rx_polarity_flip_fabric165.BCM8885X=0
+phy_rx_polarity_flip_fabric166.BCM8885X=0
+phy_rx_polarity_flip_fabric167.BCM8885X=0
+phy_rx_polarity_flip_fabric168.BCM8885X=0
+phy_rx_polarity_flip_fabric169.BCM8885X=0
+phy_rx_polarity_flip_fabric170.BCM8885X=0
+phy_rx_polarity_flip_fabric171.BCM8885X=0
+phy_rx_polarity_flip_fabric172.BCM8885X=1
+phy_rx_polarity_flip_fabric173.BCM8885X=1
+phy_rx_polarity_flip_fabric174.BCM8885X=1
+phy_rx_polarity_flip_fabric175.BCM8885X=1
+phy_rx_polarity_flip_fabric176.BCM8885X=0
+phy_rx_polarity_flip_fabric177.BCM8885X=0
+phy_rx_polarity_flip_fabric178.BCM8885X=0
+phy_rx_polarity_flip_fabric179.BCM8885X=0
+phy_rx_polarity_flip_fabric180.BCM8885X=0
+phy_rx_polarity_flip_fabric181.BCM8885X=0
+phy_rx_polarity_flip_fabric182.BCM8885X=0
+phy_rx_polarity_flip_fabric183.BCM8885X=0
+phy_rx_polarity_flip_fabric184.BCM8885X=0
+phy_rx_polarity_flip_fabric185.BCM8885X=0
+phy_rx_polarity_flip_fabric186.BCM8885X=0
+phy_rx_polarity_flip_fabric187.BCM8885X=0
+phy_rx_polarity_flip_fabric188.BCM8885X=0
+phy_rx_polarity_flip_fabric189.BCM8885X=0
+phy_rx_polarity_flip_fabric190.BCM8885X=0
+phy_rx_polarity_flip_fabric191.BCM8885X=0
+
+
+phy_tx_polarity_flip_fabric0.BCM8885X=0
+phy_tx_polarity_flip_fabric1.BCM8885X=0
+phy_tx_polarity_flip_fabric2.BCM8885X=0
+phy_tx_polarity_flip_fabric3.BCM8885X=0
+phy_tx_polarity_flip_fabric4.BCM8885X=0
+phy_tx_polarity_flip_fabric5.BCM8885X=0
+phy_tx_polarity_flip_fabric6.BCM8885X=0
+phy_tx_polarity_flip_fabric7.BCM8885X=0
+phy_tx_polarity_flip_fabric8.BCM8885X=0
+phy_tx_polarity_flip_fabric9.BCM8885X=0
+phy_tx_polarity_flip_fabric10.BCM8885X=0
+phy_tx_polarity_flip_fabric11.BCM8885X=0
+phy_tx_polarity_flip_fabric12.BCM8885X=0
+phy_tx_polarity_flip_fabric13.BCM8885X=0
+phy_tx_polarity_flip_fabric14.BCM8885X=0
+phy_tx_polarity_flip_fabric15.BCM8885X=0
+phy_tx_polarity_flip_fabric16.BCM8885X=0
+phy_tx_polarity_flip_fabric17.BCM8885X=0
+phy_tx_polarity_flip_fabric18.BCM8885X=0
+phy_tx_polarity_flip_fabric19.BCM8885X=0
+phy_tx_polarity_flip_fabric20.BCM8885X=0
+phy_tx_polarity_flip_fabric21.BCM8885X=0
+phy_tx_polarity_flip_fabric22.BCM8885X=0
+phy_tx_polarity_flip_fabric23.BCM8885X=0
+phy_tx_polarity_flip_fabric24.BCM8885X=0
+phy_tx_polarity_flip_fabric25.BCM8885X=0
+phy_tx_polarity_flip_fabric26.BCM8885X=0
+phy_tx_polarity_flip_fabric27.BCM8885X=0
+phy_tx_polarity_flip_fabric28.BCM8885X=0
+phy_tx_polarity_flip_fabric29.BCM8885X=0
+phy_tx_polarity_flip_fabric30.BCM8885X=0
+phy_tx_polarity_flip_fabric31.BCM8885X=0
+phy_tx_polarity_flip_fabric32.BCM8885X=0
+phy_tx_polarity_flip_fabric33.BCM8885X=0
+phy_tx_polarity_flip_fabric34.BCM8885X=0
+phy_tx_polarity_flip_fabric35.BCM8885X=0
+phy_tx_polarity_flip_fabric36.BCM8885X=0
+phy_tx_polarity_flip_fabric37.BCM8885X=0
+phy_tx_polarity_flip_fabric38.BCM8885X=0
+phy_tx_polarity_flip_fabric39.BCM8885X=0
+phy_tx_polarity_flip_fabric40.BCM8885X=0
+phy_tx_polarity_flip_fabric41.BCM8885X=0
+phy_tx_polarity_flip_fabric42.BCM8885X=0
+phy_tx_polarity_flip_fabric43.BCM8885X=0
+phy_tx_polarity_flip_fabric44.BCM8885X=0
+phy_tx_polarity_flip_fabric45.BCM8885X=0
+phy_tx_polarity_flip_fabric46.BCM8885X=0
+phy_tx_polarity_flip_fabric47.BCM8885X=0
+phy_tx_polarity_flip_fabric48.BCM8885X=0
+phy_tx_polarity_flip_fabric49.BCM8885X=0
+phy_tx_polarity_flip_fabric50.BCM8885X=0
+phy_tx_polarity_flip_fabric51.BCM8885X=0
+phy_tx_polarity_flip_fabric52.BCM8885X=0
+phy_tx_polarity_flip_fabric53.BCM8885X=0
+phy_tx_polarity_flip_fabric54.BCM8885X=0
+phy_tx_polarity_flip_fabric55.BCM8885X=0
+phy_tx_polarity_flip_fabric56.BCM8885X=0
+phy_tx_polarity_flip_fabric57.BCM8885X=0
+phy_tx_polarity_flip_fabric58.BCM8885X=0
+phy_tx_polarity_flip_fabric59.BCM8885X=0
+phy_tx_polarity_flip_fabric60.BCM8885X=0
+phy_tx_polarity_flip_fabric61.BCM8885X=0
+phy_tx_polarity_flip_fabric62.BCM8885X=0
+phy_tx_polarity_flip_fabric63.BCM8885X=0
+phy_tx_polarity_flip_fabric64.BCM8885X=0
+phy_tx_polarity_flip_fabric65.BCM8885X=0
+phy_tx_polarity_flip_fabric66.BCM8885X=0
+phy_tx_polarity_flip_fabric67.BCM8885X=0
+phy_tx_polarity_flip_fabric68.BCM8885X=0
+phy_tx_polarity_flip_fabric69.BCM8885X=0
+phy_tx_polarity_flip_fabric70.BCM8885X=0
+phy_tx_polarity_flip_fabric71.BCM8885X=0
+phy_tx_polarity_flip_fabric72.BCM8885X=0
+phy_tx_polarity_flip_fabric73.BCM8885X=0
+phy_tx_polarity_flip_fabric74.BCM8885X=0
+phy_tx_polarity_flip_fabric75.BCM8885X=0
+phy_tx_polarity_flip_fabric76.BCM8885X=0
+phy_tx_polarity_flip_fabric77.BCM8885X=0
+phy_tx_polarity_flip_fabric78.BCM8885X=0
+phy_tx_polarity_flip_fabric79.BCM8885X=0
+phy_tx_polarity_flip_fabric80.BCM8885X=0
+phy_tx_polarity_flip_fabric81.BCM8885X=0
+phy_tx_polarity_flip_fabric82.BCM8885X=0
+phy_tx_polarity_flip_fabric83.BCM8885X=0
+phy_tx_polarity_flip_fabric84.BCM8885X=0
+phy_tx_polarity_flip_fabric85.BCM8885X=0
+phy_tx_polarity_flip_fabric86.BCM8885X=0
+phy_tx_polarity_flip_fabric87.BCM8885X=0
+phy_tx_polarity_flip_fabric88.BCM8885X=0
+phy_tx_polarity_flip_fabric89.BCM8885X=0
+phy_tx_polarity_flip_fabric90.BCM8885X=0
+phy_tx_polarity_flip_fabric91.BCM8885X=0
+phy_tx_polarity_flip_fabric92.BCM8885X=0
+phy_tx_polarity_flip_fabric93.BCM8885X=0
+phy_tx_polarity_flip_fabric94.BCM8885X=0
+phy_tx_polarity_flip_fabric95.BCM8885X=0
+phy_tx_polarity_flip_fabric96.BCM8885X=0
+phy_tx_polarity_flip_fabric97.BCM8885X=0
+phy_tx_polarity_flip_fabric98.BCM8885X=0
+phy_tx_polarity_flip_fabric99.BCM8885X=0
+phy_tx_polarity_flip_fabric100.BCM8885X=0
+phy_tx_polarity_flip_fabric101.BCM8885X=0
+phy_tx_polarity_flip_fabric102.BCM8885X=0
+phy_tx_polarity_flip_fabric103.BCM8885X=0
+phy_tx_polarity_flip_fabric104.BCM8885X=0
+phy_tx_polarity_flip_fabric105.BCM8885X=0
+phy_tx_polarity_flip_fabric106.BCM8885X=0
+phy_tx_polarity_flip_fabric107.BCM8885X=0
+phy_tx_polarity_flip_fabric108.BCM8885X=0
+phy_tx_polarity_flip_fabric109.BCM8885X=0
+phy_tx_polarity_flip_fabric110.BCM8885X=0
+phy_tx_polarity_flip_fabric111.BCM8885X=0
+phy_tx_polarity_flip_fabric112.BCM8885X=0
+phy_tx_polarity_flip_fabric113.BCM8885X=0
+phy_tx_polarity_flip_fabric114.BCM8885X=0
+phy_tx_polarity_flip_fabric115.BCM8885X=0
+phy_tx_polarity_flip_fabric116.BCM8885X=0
+phy_tx_polarity_flip_fabric117.BCM8885X=0
+phy_tx_polarity_flip_fabric118.BCM8885X=0
+phy_tx_polarity_flip_fabric119.BCM8885X=0
+phy_tx_polarity_flip_fabric120.BCM8885X=0
+phy_tx_polarity_flip_fabric121.BCM8885X=0
+phy_tx_polarity_flip_fabric122.BCM8885X=0
+phy_tx_polarity_flip_fabric123.BCM8885X=0
+phy_tx_polarity_flip_fabric124.BCM8885X=0
+phy_tx_polarity_flip_fabric125.BCM8885X=0
+phy_tx_polarity_flip_fabric126.BCM8885X=0
+phy_tx_polarity_flip_fabric127.BCM8885X=0
+phy_tx_polarity_flip_fabric128.BCM8885X=0
+phy_tx_polarity_flip_fabric129.BCM8885X=0
+phy_tx_polarity_flip_fabric130.BCM8885X=0
+phy_tx_polarity_flip_fabric131.BCM8885X=0
+phy_tx_polarity_flip_fabric132.BCM8885X=0
+phy_tx_polarity_flip_fabric133.BCM8885X=0
+phy_tx_polarity_flip_fabric134.BCM8885X=0
+phy_tx_polarity_flip_fabric135.BCM8885X=0
+phy_tx_polarity_flip_fabric136.BCM8885X=0
+phy_tx_polarity_flip_fabric137.BCM8885X=0
+phy_tx_polarity_flip_fabric138.BCM8885X=0
+phy_tx_polarity_flip_fabric139.BCM8885X=0
+phy_tx_polarity_flip_fabric140.BCM8885X=0
+phy_tx_polarity_flip_fabric141.BCM8885X=0
+phy_tx_polarity_flip_fabric142.BCM8885X=0
+phy_tx_polarity_flip_fabric143.BCM8885X=0
+phy_tx_polarity_flip_fabric144.BCM8885X=0
+phy_tx_polarity_flip_fabric145.BCM8885X=0
+phy_tx_polarity_flip_fabric146.BCM8885X=0
+phy_tx_polarity_flip_fabric147.BCM8885X=0
+phy_tx_polarity_flip_fabric148.BCM8885X=0
+phy_tx_polarity_flip_fabric149.BCM8885X=0
+phy_tx_polarity_flip_fabric150.BCM8885X=0
+phy_tx_polarity_flip_fabric151.BCM8885X=0
+phy_tx_polarity_flip_fabric152.BCM8885X=0
+phy_tx_polarity_flip_fabric153.BCM8885X=0
+phy_tx_polarity_flip_fabric154.BCM8885X=0
+phy_tx_polarity_flip_fabric155.BCM8885X=0
+phy_tx_polarity_flip_fabric156.BCM8885X=0
+phy_tx_polarity_flip_fabric157.BCM8885X=0
+phy_tx_polarity_flip_fabric158.BCM8885X=0
+phy_tx_polarity_flip_fabric159.BCM8885X=0
+phy_tx_polarity_flip_fabric160.BCM8885X=0
+phy_tx_polarity_flip_fabric161.BCM8885X=0
+phy_tx_polarity_flip_fabric162.BCM8885X=0
+phy_tx_polarity_flip_fabric163.BCM8885X=0
+phy_tx_polarity_flip_fabric164.BCM8885X=0
+phy_tx_polarity_flip_fabric165.BCM8885X=0
+phy_tx_polarity_flip_fabric166.BCM8885X=0
+phy_tx_polarity_flip_fabric167.BCM8885X=0
+phy_tx_polarity_flip_fabric168.BCM8885X=0
+phy_tx_polarity_flip_fabric169.BCM8885X=0
+phy_tx_polarity_flip_fabric170.BCM8885X=0
+phy_tx_polarity_flip_fabric171.BCM8885X=0
+phy_tx_polarity_flip_fabric172.BCM8885X=0
+phy_tx_polarity_flip_fabric173.BCM8885X=0
+phy_tx_polarity_flip_fabric174.BCM8885X=0
+phy_tx_polarity_flip_fabric175.BCM8885X=0
+phy_tx_polarity_flip_fabric176.BCM8885X=0
+phy_tx_polarity_flip_fabric177.BCM8885X=0
+phy_tx_polarity_flip_fabric178.BCM8885X=0
+phy_tx_polarity_flip_fabric179.BCM8885X=0
+phy_tx_polarity_flip_fabric180.BCM8885X=0
+phy_tx_polarity_flip_fabric181.BCM8885X=0
+phy_tx_polarity_flip_fabric182.BCM8885X=0
+phy_tx_polarity_flip_fabric183.BCM8885X=0
+phy_tx_polarity_flip_fabric184.BCM8885X=0
+phy_tx_polarity_flip_fabric185.BCM8885X=0
+phy_tx_polarity_flip_fabric186.BCM8885X=0
+phy_tx_polarity_flip_fabric187.BCM8885X=0
+phy_tx_polarity_flip_fabric188.BCM8885X=0
+phy_tx_polarity_flip_fabric189.BCM8885X=0
+phy_tx_polarity_flip_fabric190.BCM8885X=0
+phy_tx_polarity_flip_fabric191.BCM8885X=0
+
+
+lane_to_serdes_map_nif_lane0.BCM8885X=rx0:tx0
+lane_to_serdes_map_nif_lane1.BCM8885X=rx1:tx1
+lane_to_serdes_map_nif_lane2.BCM8885X=rx2:tx2
+lane_to_serdes_map_nif_lane3.BCM8885X=rx3:tx3
+lane_to_serdes_map_nif_lane4.BCM8885X=rx4:tx4
+lane_to_serdes_map_nif_lane5.BCM8885X=rx5:tx5
+lane_to_serdes_map_nif_lane6.BCM8885X=rx6:tx6
+lane_to_serdes_map_nif_lane7.BCM8885X=rx7:tx7
+
+lane_to_serdes_map_nif_lane8.BCM8885X=rx8:tx8
+lane_to_serdes_map_nif_lane9.BCM8885X=rx9:tx9
+lane_to_serdes_map_nif_lane10.BCM8885X=rx10:tx10
+lane_to_serdes_map_nif_lane11.BCM8885X=rx11:tx11
+lane_to_serdes_map_nif_lane12.BCM8885X=rx12:tx12
+lane_to_serdes_map_nif_lane13.BCM8885X=rx13:tx13
+lane_to_serdes_map_nif_lane14.BCM8885X=rx14:tx14
+lane_to_serdes_map_nif_lane15.BCM8885X=rx15:tx15
+
+lane_to_serdes_map_nif_lane16.BCM8885X=rx16:tx16
+lane_to_serdes_map_nif_lane17.BCM8885X=rx17:tx17
+lane_to_serdes_map_nif_lane18.BCM8885X=rx18:tx18
+lane_to_serdes_map_nif_lane19.BCM8885X=rx19:tx19
+lane_to_serdes_map_nif_lane20.BCM8885X=rx20:tx20
+lane_to_serdes_map_nif_lane21.BCM8885X=rx21:tx21
+lane_to_serdes_map_nif_lane22.BCM8885X=rx22:tx22
+lane_to_serdes_map_nif_lane23.BCM8885X=rx23:tx23
+
+lane_to_serdes_map_nif_lane24.BCM8885X=rx24:tx24
+lane_to_serdes_map_nif_lane25.BCM8885X=rx25:tx25
+lane_to_serdes_map_nif_lane26.BCM8885X=rx26:tx26
+lane_to_serdes_map_nif_lane27.BCM8885X=rx27:tx27
+lane_to_serdes_map_nif_lane28.BCM8885X=rx28:tx28
+lane_to_serdes_map_nif_lane29.BCM8885X=rx29:tx29
+lane_to_serdes_map_nif_lane30.BCM8885X=rx30:tx30
+lane_to_serdes_map_nif_lane31.BCM8885X=rx31:tx31
+
+lane_to_serdes_map_nif_lane32.BCM8885X=rx32:tx32
+lane_to_serdes_map_nif_lane33.BCM8885X=rx33:tx33
+lane_to_serdes_map_nif_lane34.BCM8885X=rx34:tx34
+lane_to_serdes_map_nif_lane35.BCM8885X=rx35:tx35
+lane_to_serdes_map_nif_lane36.BCM8885X=rx36:tx36
+lane_to_serdes_map_nif_lane37.BCM8885X=rx37:tx37
+lane_to_serdes_map_nif_lane38.BCM8885X=rx38:tx38
+lane_to_serdes_map_nif_lane39.BCM8885X=rx39:tx39
+
+lane_to_serdes_map_nif_lane40.BCM8885X=rx40:tx40
+lane_to_serdes_map_nif_lane41.BCM8885X=rx41:tx41
+lane_to_serdes_map_nif_lane42.BCM8885X=rx42:tx42
+lane_to_serdes_map_nif_lane43.BCM8885X=rx43:tx43
+lane_to_serdes_map_nif_lane44.BCM8885X=rx44:tx44
+lane_to_serdes_map_nif_lane45.BCM8885X=rx45:tx45
+lane_to_serdes_map_nif_lane46.BCM8885X=rx46:tx46
+lane_to_serdes_map_nif_lane47.BCM8885X=rx47:tx47
+
+lane_to_serdes_map_nif_lane48.BCM8885X=rx48:tx48
+lane_to_serdes_map_nif_lane49.BCM8885X=rx49:tx49
+lane_to_serdes_map_nif_lane50.BCM8885X=rx50:tx50
+lane_to_serdes_map_nif_lane51.BCM8885X=rx51:tx51
+lane_to_serdes_map_nif_lane52.BCM8885X=rx52:tx52
+lane_to_serdes_map_nif_lane53.BCM8885X=rx53:tx53
+lane_to_serdes_map_nif_lane54.BCM8885X=rx54:tx54
+lane_to_serdes_map_nif_lane55.BCM8885X=rx55:tx55
+
+lane_to_serdes_map_nif_lane56.BCM8885X=rx56:tx56
+lane_to_serdes_map_nif_lane57.BCM8885X=rx57:tx57
+lane_to_serdes_map_nif_lane58.BCM8885X=rx58:tx58
+lane_to_serdes_map_nif_lane59.BCM8885X=rx59:tx59
+lane_to_serdes_map_nif_lane60.BCM8885X=rx60:tx60
+lane_to_serdes_map_nif_lane61.BCM8885X=rx61:tx61
+lane_to_serdes_map_nif_lane62.BCM8885X=rx62:tx62
+lane_to_serdes_map_nif_lane63.BCM8885X=rx63:tx63
+
+lane_to_serdes_map_nif_lane64.BCM8885X=rx64:tx64
+lane_to_serdes_map_nif_lane65.BCM8885X=rx65:tx65
+lane_to_serdes_map_nif_lane66.BCM8885X=rx66:tx66
+lane_to_serdes_map_nif_lane67.BCM8885X=rx67:tx67
+lane_to_serdes_map_nif_lane68.BCM8885X=rx68:tx68
+lane_to_serdes_map_nif_lane69.BCM8885X=rx69:tx69
+lane_to_serdes_map_nif_lane70.BCM8885X=rx70:tx70
+lane_to_serdes_map_nif_lane71.BCM8885X=rx71:tx71
+
+lane_to_serdes_map_nif_lane72.BCM8885X=rx72:tx72
+lane_to_serdes_map_nif_lane73.BCM8885X=rx73:tx73
+lane_to_serdes_map_nif_lane74.BCM8885X=rx74:tx74
+lane_to_serdes_map_nif_lane75.BCM8885X=rx75:tx75
+lane_to_serdes_map_nif_lane76.BCM8885X=rx76:tx76
+lane_to_serdes_map_nif_lane77.BCM8885X=rx77:tx77
+lane_to_serdes_map_nif_lane78.BCM8885X=rx78:tx78
+lane_to_serdes_map_nif_lane79.BCM8885X=rx79:tx79
+
+lane_to_serdes_map_nif_lane80.BCM8885X=rx80:tx80
+lane_to_serdes_map_nif_lane81.BCM8885X=rx81:tx81
+lane_to_serdes_map_nif_lane82.BCM8885X=rx82:tx82
+lane_to_serdes_map_nif_lane83.BCM8885X=rx83:tx83
+lane_to_serdes_map_nif_lane84.BCM8885X=rx84:tx84
+lane_to_serdes_map_nif_lane85.BCM8885X=rx85:tx85
+lane_to_serdes_map_nif_lane86.BCM8885X=rx86:tx86
+lane_to_serdes_map_nif_lane87.BCM8885X=rx87:tx87
+
+lane_to_serdes_map_nif_lane88.BCM8885X=rx88:tx88
+lane_to_serdes_map_nif_lane89.BCM8885X=rx89:tx89
+lane_to_serdes_map_nif_lane90.BCM8885X=rx90:tx90
+lane_to_serdes_map_nif_lane91.BCM8885X=rx91:tx91
+lane_to_serdes_map_nif_lane92.BCM8885X=rx92:tx92
+lane_to_serdes_map_nif_lane93.BCM8885X=rx93:tx93
+lane_to_serdes_map_nif_lane94.BCM8885X=rx94:tx94
+lane_to_serdes_map_nif_lane95.BCM8885X=rx95:tx95
+
+lane_to_serdes_map_nif_lane96.BCM8885X=rx96:tx96
+lane_to_serdes_map_nif_lane97.BCM8885X=rx97:tx97
+lane_to_serdes_map_nif_lane98.BCM8885X=rx98:tx98
+lane_to_serdes_map_nif_lane99.BCM8885X=rx99:tx99
+lane_to_serdes_map_nif_lane100.BCM8885X=rx100:tx100
+lane_to_serdes_map_nif_lane101.BCM8885X=rx101:tx101
+lane_to_serdes_map_nif_lane102.BCM8885X=rx102:tx102
+lane_to_serdes_map_nif_lane103.BCM8885X=rx103:tx103
+
+lane_to_serdes_map_nif_lane104.BCM8885X=rx104:tx104
+lane_to_serdes_map_nif_lane105.BCM8885X=rx105:tx105
+lane_to_serdes_map_nif_lane106.BCM8885X=rx106:tx106
+lane_to_serdes_map_nif_lane107.BCM8885X=rx107:tx107
+lane_to_serdes_map_nif_lane108.BCM8885X=rx108:tx108
+lane_to_serdes_map_nif_lane109.BCM8885X=rx109:tx109
+lane_to_serdes_map_nif_lane110.BCM8885X=rx110:tx110
+lane_to_serdes_map_nif_lane111.BCM8885X=rx111:tx111
+
+lane_to_serdes_map_nif_lane112.BCM8885X=rx112:tx112
+lane_to_serdes_map_nif_lane113.BCM8885X=rx113:tx113
+lane_to_serdes_map_nif_lane114.BCM8885X=rx114:tx114
+lane_to_serdes_map_nif_lane115.BCM8885X=rx115:tx115
+lane_to_serdes_map_nif_lane116.BCM8885X=rx116:tx116
+lane_to_serdes_map_nif_lane117.BCM8885X=rx117:tx117
+lane_to_serdes_map_nif_lane118.BCM8885X=rx118:tx118
+lane_to_serdes_map_nif_lane119.BCM8885X=rx119:tx119
+
+lane_to_serdes_map_nif_lane120.BCM8885X=rx120:tx120
+lane_to_serdes_map_nif_lane121.BCM8885X=rx121:tx121
+lane_to_serdes_map_nif_lane122.BCM8885X=rx122:tx122
+lane_to_serdes_map_nif_lane123.BCM8885X=rx123:tx123
+lane_to_serdes_map_nif_lane124.BCM8885X=rx124:tx124
+lane_to_serdes_map_nif_lane125.BCM8885X=rx125:tx125
+lane_to_serdes_map_nif_lane126.BCM8885X=rx126:tx126
+lane_to_serdes_map_nif_lane127.BCM8885X=rx127:tx127
+
+lane_to_serdes_map_nif_lane128.BCM8885X=rx128:tx128
+lane_to_serdes_map_nif_lane129.BCM8885X=rx129:tx129
+lane_to_serdes_map_nif_lane130.BCM8885X=rx130:tx130
+lane_to_serdes_map_nif_lane131.BCM8885X=rx131:tx131
+lane_to_serdes_map_nif_lane132.BCM8885X=rx132:tx132
+lane_to_serdes_map_nif_lane133.BCM8885X=rx133:tx133
+lane_to_serdes_map_nif_lane134.BCM8885X=rx134:tx134
+lane_to_serdes_map_nif_lane135.BCM8885X=rx135:tx135
+
+lane_to_serdes_map_nif_lane136.BCM8885X=rx136:tx136
+lane_to_serdes_map_nif_lane137.BCM8885X=rx137:tx137
+lane_to_serdes_map_nif_lane138.BCM8885X=rx138:tx138
+lane_to_serdes_map_nif_lane139.BCM8885X=rx139:tx139
+lane_to_serdes_map_nif_lane140.BCM8885X=rx140:tx140
+lane_to_serdes_map_nif_lane141.BCM8885X=rx141:tx141
+lane_to_serdes_map_nif_lane142.BCM8885X=rx142:tx142
+lane_to_serdes_map_nif_lane143.BCM8885X=rx143:tx143
+
+
+mdb_profile=Balanced-Exem
+mdb_profile_kaps_cfg.BCM8885X=2
+mdio_output_delay=16
+mem_cache_enable_ecc.BCM8885X=1
+mem_cache_enable_parity.BCM8885X=1
+miim_intr_enable.BCM8885X=0
+os=unix
+outlif_logical_to_physical_phase_map_1=S1
+outlif_logical_to_physical_phase_map_2=L1
+outlif_logical_to_physical_phase_map_3=XL
+outlif_logical_to_physical_phase_map_4=L2
+outlif_logical_to_physical_phase_map_5=M1
+outlif_logical_to_physical_phase_map_6=M2
+outlif_logical_to_physical_phase_map_7=M3
+outlif_logical_to_physical_phase_map_8=S2
+outlif_physical_phase_data_granularity_L1=60
+outlif_physical_phase_data_granularity_L2=60
+outlif_physical_phase_data_granularity_M1=60
+outlif_physical_phase_data_granularity_M2=60
+outlif_physical_phase_data_granularity_M3=60
+outlif_physical_phase_data_granularity_S1=60
+outlif_physical_phase_data_granularity_S2=60
+outlif_physical_phase_data_granularity_XL=60
+pdma_continuous_mode_enable.BCM8885X=1
+
+
+phy_rx_polarity_flip_phy0.BCM8885X=1
+phy_rx_polarity_flip_phy1.BCM8885X=0
+phy_rx_polarity_flip_phy2.BCM8885X=1
+phy_rx_polarity_flip_phy3.BCM8885X=0
+phy_rx_polarity_flip_phy4.BCM8885X=1
+phy_rx_polarity_flip_phy5.BCM8885X=1
+phy_rx_polarity_flip_phy6.BCM8885X=1
+phy_rx_polarity_flip_phy7.BCM8885X=0
+
+phy_rx_polarity_flip_phy8.BCM8885X=0
+phy_rx_polarity_flip_phy9.BCM8885X=0
+phy_rx_polarity_flip_phy10.BCM8885X=1
+phy_rx_polarity_flip_phy11.BCM8885X=0
+phy_rx_polarity_flip_phy12.BCM8885X=1
+phy_rx_polarity_flip_phy13.BCM8885X=0
+phy_rx_polarity_flip_phy14.BCM8885X=0
+phy_rx_polarity_flip_phy15.BCM8885X=0
+
+phy_rx_polarity_flip_phy16.BCM8885X=1
+phy_rx_polarity_flip_phy17.BCM8885X=0
+phy_rx_polarity_flip_phy18.BCM8885X=1
+phy_rx_polarity_flip_phy19.BCM8885X=0
+phy_rx_polarity_flip_phy20.BCM8885X=1
+phy_rx_polarity_flip_phy21.BCM8885X=1
+phy_rx_polarity_flip_phy22.BCM8885X=1
+phy_rx_polarity_flip_phy23.BCM8885X=1
+
+phy_rx_polarity_flip_phy24.BCM8885X=0
+phy_rx_polarity_flip_phy25.BCM8885X=1
+phy_rx_polarity_flip_phy26.BCM8885X=0
+phy_rx_polarity_flip_phy27.BCM8885X=1
+phy_rx_polarity_flip_phy28.BCM8885X=1
+phy_rx_polarity_flip_phy29.BCM8885X=1
+phy_rx_polarity_flip_phy30.BCM8885X=0
+phy_rx_polarity_flip_phy31.BCM8885X=1
+
+phy_rx_polarity_flip_phy32.BCM8885X=1
+phy_rx_polarity_flip_phy33.BCM8885X=0
+phy_rx_polarity_flip_phy34.BCM8885X=1
+phy_rx_polarity_flip_phy35.BCM8885X=0
+phy_rx_polarity_flip_phy36.BCM8885X=0
+phy_rx_polarity_flip_phy37.BCM8885X=0
+phy_rx_polarity_flip_phy38.BCM8885X=0
+phy_rx_polarity_flip_phy39.BCM8885X=1
+
+phy_rx_polarity_flip_phy40.BCM8885X=1
+phy_rx_polarity_flip_phy41.BCM8885X=1
+phy_rx_polarity_flip_phy42.BCM8885X=0
+phy_rx_polarity_flip_phy43.BCM8885X=1
+phy_rx_polarity_flip_phy44.BCM8885X=1
+phy_rx_polarity_flip_phy45.BCM8885X=0
+phy_rx_polarity_flip_phy46.BCM8885X=0
+phy_rx_polarity_flip_phy47.BCM8885X=1
+
+phy_rx_polarity_flip_phy48.BCM8885X=0
+phy_rx_polarity_flip_phy49.BCM8885X=1
+phy_rx_polarity_flip_phy50.BCM8885X=0
+phy_rx_polarity_flip_phy51.BCM8885X=0
+phy_rx_polarity_flip_phy52.BCM8885X=0
+phy_rx_polarity_flip_phy53.BCM8885X=1
+phy_rx_polarity_flip_phy54.BCM8885X=0
+phy_rx_polarity_flip_phy55.BCM8885X=0
+
+phy_rx_polarity_flip_phy56.BCM8885X=0
+phy_rx_polarity_flip_phy57.BCM8885X=0
+phy_rx_polarity_flip_phy58.BCM8885X=0
+phy_rx_polarity_flip_phy59.BCM8885X=0
+phy_rx_polarity_flip_phy60.BCM8885X=0
+phy_rx_polarity_flip_phy61.BCM8885X=0
+phy_rx_polarity_flip_phy62.BCM8885X=1
+phy_rx_polarity_flip_phy63.BCM8885X=1
+
+phy_rx_polarity_flip_phy64.BCM8885X=0
+phy_rx_polarity_flip_phy65.BCM8885X=0
+phy_rx_polarity_flip_phy66.BCM8885X=0
+phy_rx_polarity_flip_phy67.BCM8885X=0
+phy_rx_polarity_flip_phy68.BCM8885X=0
+phy_rx_polarity_flip_phy69.BCM8885X=0
+phy_rx_polarity_flip_phy70.BCM8885X=0
+phy_rx_polarity_flip_phy71.BCM8885X=0
+
+phy_rx_polarity_flip_phy72.BCM8885X=1
+phy_rx_polarity_flip_phy73.BCM8885X=0
+phy_rx_polarity_flip_phy74.BCM8885X=0
+phy_rx_polarity_flip_phy75.BCM8885X=1
+phy_rx_polarity_flip_phy76.BCM8885X=1
+phy_rx_polarity_flip_phy77.BCM8885X=1
+phy_rx_polarity_flip_phy78.BCM8885X=0
+phy_rx_polarity_flip_phy79.BCM8885X=1
+
+phy_rx_polarity_flip_phy80.BCM8885X=1
+phy_rx_polarity_flip_phy81.BCM8885X=0
+phy_rx_polarity_flip_phy82.BCM8885X=1
+phy_rx_polarity_flip_phy83.BCM8885X=1
+phy_rx_polarity_flip_phy84.BCM8885X=0
+phy_rx_polarity_flip_phy85.BCM8885X=0
+phy_rx_polarity_flip_phy86.BCM8885X=1
+phy_rx_polarity_flip_phy87.BCM8885X=1
+
+phy_rx_polarity_flip_phy88.BCM8885X=0
+phy_rx_polarity_flip_phy89.BCM8885X=1
+phy_rx_polarity_flip_phy90.BCM8885X=0
+phy_rx_polarity_flip_phy91.BCM8885X=0
+phy_rx_polarity_flip_phy92.BCM8885X=0
+phy_rx_polarity_flip_phy93.BCM8885X=0
+phy_rx_polarity_flip_phy94.BCM8885X=0
+phy_rx_polarity_flip_phy95.BCM8885X=1
+
+phy_rx_polarity_flip_phy96.BCM8885X=0
+phy_rx_polarity_flip_phy97.BCM8885X=0
+phy_rx_polarity_flip_phy98.BCM8885X=0
+phy_rx_polarity_flip_phy99.BCM8885X=0
+phy_rx_polarity_flip_phy100.BCM8885X=0
+phy_rx_polarity_flip_phy101.BCM8885X=1
+phy_rx_polarity_flip_phy102.BCM8885X=1
+phy_rx_polarity_flip_phy103.BCM8885X=0
+
+phy_rx_polarity_flip_phy104.BCM8885X=1
+phy_rx_polarity_flip_phy105.BCM8885X=1
+phy_rx_polarity_flip_phy106.BCM8885X=1
+phy_rx_polarity_flip_phy107.BCM8885X=1
+phy_rx_polarity_flip_phy108.BCM8885X=0
+phy_rx_polarity_flip_phy109.BCM8885X=1
+phy_rx_polarity_flip_phy110.BCM8885X=1
+phy_rx_polarity_flip_phy111.BCM8885X=1
+
+phy_rx_polarity_flip_phy112.BCM8885X=0
+phy_rx_polarity_flip_phy113.BCM8885X=1
+phy_rx_polarity_flip_phy114.BCM8885X=1
+phy_rx_polarity_flip_phy115.BCM8885X=1
+phy_rx_polarity_flip_phy116.BCM8885X=1
+phy_rx_polarity_flip_phy117.BCM8885X=1
+phy_rx_polarity_flip_phy118.BCM8885X=0
+phy_rx_polarity_flip_phy119.BCM8885X=0
+
+phy_rx_polarity_flip_phy120.BCM8885X=1
+phy_rx_polarity_flip_phy121.BCM8885X=0
+phy_rx_polarity_flip_phy122.BCM8885X=0
+phy_rx_polarity_flip_phy123.BCM8885X=1
+phy_rx_polarity_flip_phy124.BCM8885X=0
+phy_rx_polarity_flip_phy125.BCM8885X=1
+phy_rx_polarity_flip_phy126.BCM8885X=1
+phy_rx_polarity_flip_phy127.BCM8885X=0
+
+phy_rx_polarity_flip_phy128.BCM8885X=0
+phy_rx_polarity_flip_phy129.BCM8885X=0
+phy_rx_polarity_flip_phy130.BCM8885X=1
+phy_rx_polarity_flip_phy131.BCM8885X=0
+phy_rx_polarity_flip_phy132.BCM8885X=0
+phy_rx_polarity_flip_phy133.BCM8885X=1
+phy_rx_polarity_flip_phy134.BCM8885X=1
+phy_rx_polarity_flip_phy135.BCM8885X=0
+
+phy_rx_polarity_flip_phy136.BCM8885X=1
+phy_rx_polarity_flip_phy137.BCM8885X=0
+phy_rx_polarity_flip_phy138.BCM8885X=0
+phy_rx_polarity_flip_phy139.BCM8885X=1
+phy_rx_polarity_flip_phy140.BCM8885X=1
+phy_rx_polarity_flip_phy141.BCM8885X=1
+phy_rx_polarity_flip_phy142.BCM8885X=0
+phy_rx_polarity_flip_phy143.BCM8885X=1
+
+
+phy_tx_polarity_flip_phy0.BCM8885X=1
+phy_tx_polarity_flip_phy1.BCM8885X=0
+phy_tx_polarity_flip_phy2.BCM8885X=0
+phy_tx_polarity_flip_phy3.BCM8885X=0
+phy_tx_polarity_flip_phy4.BCM8885X=1
+phy_tx_polarity_flip_phy5.BCM8885X=0
+phy_tx_polarity_flip_phy6.BCM8885X=0
+phy_tx_polarity_flip_phy7.BCM8885X=1
+
+phy_tx_polarity_flip_phy8.BCM8885X=0
+phy_tx_polarity_flip_phy9.BCM8885X=1
+phy_tx_polarity_flip_phy10.BCM8885X=0
+phy_tx_polarity_flip_phy11.BCM8885X=1
+phy_tx_polarity_flip_phy12.BCM8885X=1
+phy_tx_polarity_flip_phy13.BCM8885X=1
+phy_tx_polarity_flip_phy14.BCM8885X=0
+phy_tx_polarity_flip_phy15.BCM8885X=1
+
+phy_tx_polarity_flip_phy16.BCM8885X=1
+phy_tx_polarity_flip_phy17.BCM8885X=1
+phy_tx_polarity_flip_phy18.BCM8885X=0
+phy_tx_polarity_flip_phy19.BCM8885X=0
+phy_tx_polarity_flip_phy20.BCM8885X=1
+phy_tx_polarity_flip_phy21.BCM8885X=1
+phy_tx_polarity_flip_phy22.BCM8885X=0
+phy_tx_polarity_flip_phy23.BCM8885X=0
+
+phy_tx_polarity_flip_phy24.BCM8885X=0
+phy_tx_polarity_flip_phy25.BCM8885X=0
+phy_tx_polarity_flip_phy26.BCM8885X=0
+phy_tx_polarity_flip_phy27.BCM8885X=1
+phy_tx_polarity_flip_phy28.BCM8885X=0
+phy_tx_polarity_flip_phy29.BCM8885X=0
+phy_tx_polarity_flip_phy30.BCM8885X=0
+phy_tx_polarity_flip_phy31.BCM8885X=0
+
+phy_tx_polarity_flip_phy32.BCM8885X=1
+phy_tx_polarity_flip_phy33.BCM8885X=1
+phy_tx_polarity_flip_phy34.BCM8885X=1
+phy_tx_polarity_flip_phy35.BCM8885X=0
+phy_tx_polarity_flip_phy36.BCM8885X=1
+phy_tx_polarity_flip_phy37.BCM8885X=1
+phy_tx_polarity_flip_phy38.BCM8885X=1
+phy_tx_polarity_flip_phy39.BCM8885X=0
+
+phy_tx_polarity_flip_phy40.BCM8885X=0
+phy_tx_polarity_flip_phy41.BCM8885X=0
+phy_tx_polarity_flip_phy42.BCM8885X=1
+phy_tx_polarity_flip_phy43.BCM8885X=1
+phy_tx_polarity_flip_phy44.BCM8885X=0
+phy_tx_polarity_flip_phy45.BCM8885X=0
+phy_tx_polarity_flip_phy46.BCM8885X=1
+phy_tx_polarity_flip_phy47.BCM8885X=0
+
+phy_tx_polarity_flip_phy48.BCM8885X=1
+phy_tx_polarity_flip_phy49.BCM8885X=1
+phy_tx_polarity_flip_phy50.BCM8885X=1
+phy_tx_polarity_flip_phy51.BCM8885X=0
+phy_tx_polarity_flip_phy52.BCM8885X=1
+phy_tx_polarity_flip_phy53.BCM8885X=0
+phy_tx_polarity_flip_phy54.BCM8885X=0
+phy_tx_polarity_flip_phy55.BCM8885X=0
+
+phy_tx_polarity_flip_phy56.BCM8885X=0
+phy_tx_polarity_flip_phy57.BCM8885X=1
+phy_tx_polarity_flip_phy58.BCM8885X=0
+phy_tx_polarity_flip_phy59.BCM8885X=0
+phy_tx_polarity_flip_phy60.BCM8885X=0
+phy_tx_polarity_flip_phy61.BCM8885X=0
+phy_tx_polarity_flip_phy62.BCM8885X=0
+phy_tx_polarity_flip_phy63.BCM8885X=0
+
+phy_tx_polarity_flip_phy64.BCM8885X=0
+phy_tx_polarity_flip_phy65.BCM8885X=1
+phy_tx_polarity_flip_phy66.BCM8885X=1
+phy_tx_polarity_flip_phy67.BCM8885X=0
+phy_tx_polarity_flip_phy68.BCM8885X=1
+phy_tx_polarity_flip_phy69.BCM8885X=0
+phy_tx_polarity_flip_phy70.BCM8885X=0
+phy_tx_polarity_flip_phy71.BCM8885X=1
+
+phy_tx_polarity_flip_phy72.BCM8885X=1
+phy_tx_polarity_flip_phy73.BCM8885X=1
+phy_tx_polarity_flip_phy74.BCM8885X=0
+phy_tx_polarity_flip_phy75.BCM8885X=1
+phy_tx_polarity_flip_phy76.BCM8885X=1
+phy_tx_polarity_flip_phy77.BCM8885X=0
+phy_tx_polarity_flip_phy78.BCM8885X=0
+phy_tx_polarity_flip_phy79.BCM8885X=1
+
+phy_tx_polarity_flip_phy80.BCM8885X=1
+phy_tx_polarity_flip_phy81.BCM8885X=0
+phy_tx_polarity_flip_phy82.BCM8885X=0
+phy_tx_polarity_flip_phy83.BCM8885X=0
+phy_tx_polarity_flip_phy84.BCM8885X=0
+phy_tx_polarity_flip_phy85.BCM8885X=0
+phy_tx_polarity_flip_phy86.BCM8885X=1
+phy_tx_polarity_flip_phy87.BCM8885X=0
+
+phy_tx_polarity_flip_phy88.BCM8885X=1
+phy_tx_polarity_flip_phy89.BCM8885X=0
+phy_tx_polarity_flip_phy90.BCM8885X=1
+phy_tx_polarity_flip_phy91.BCM8885X=1
+phy_tx_polarity_flip_phy92.BCM8885X=1
+phy_tx_polarity_flip_phy93.BCM8885X=0
+phy_tx_polarity_flip_phy94.BCM8885X=1
+phy_tx_polarity_flip_phy95.BCM8885X=1
+
+phy_tx_polarity_flip_phy96.BCM8885X=1
+phy_tx_polarity_flip_phy97.BCM8885X=1
+phy_tx_polarity_flip_phy98.BCM8885X=1
+phy_tx_polarity_flip_phy99.BCM8885X=0
+phy_tx_polarity_flip_phy100.BCM8885X=1
+phy_tx_polarity_flip_phy101.BCM8885X=1
+phy_tx_polarity_flip_phy102.BCM8885X=1
+phy_tx_polarity_flip_phy103.BCM8885X=0
+
+phy_tx_polarity_flip_phy104.BCM8885X=0
+phy_tx_polarity_flip_phy105.BCM8885X=0
+phy_tx_polarity_flip_phy106.BCM8885X=0
+phy_tx_polarity_flip_phy107.BCM8885X=1
+phy_tx_polarity_flip_phy108.BCM8885X=1
+phy_tx_polarity_flip_phy109.BCM8885X=0
+phy_tx_polarity_flip_phy110.BCM8885X=1
+phy_tx_polarity_flip_phy111.BCM8885X=0
+
+phy_tx_polarity_flip_phy112.BCM8885X=0
+phy_tx_polarity_flip_phy113.BCM8885X=1
+phy_tx_polarity_flip_phy114.BCM8885X=1
+phy_tx_polarity_flip_phy115.BCM8885X=0
+phy_tx_polarity_flip_phy116.BCM8885X=0
+phy_tx_polarity_flip_phy117.BCM8885X=1
+phy_tx_polarity_flip_phy118.BCM8885X=0
+phy_tx_polarity_flip_phy119.BCM8885X=0
+
+phy_tx_polarity_flip_phy120.BCM8885X=0
+phy_tx_polarity_flip_phy121.BCM8885X=1
+phy_tx_polarity_flip_phy122.BCM8885X=1
+phy_tx_polarity_flip_phy123.BCM8885X=0
+phy_tx_polarity_flip_phy124.BCM8885X=0
+phy_tx_polarity_flip_phy125.BCM8885X=0
+phy_tx_polarity_flip_phy126.BCM8885X=1
+phy_tx_polarity_flip_phy127.BCM8885X=0
+
+phy_tx_polarity_flip_phy128.BCM8885X=1
+phy_tx_polarity_flip_phy129.BCM8885X=1
+phy_tx_polarity_flip_phy130.BCM8885X=0
+phy_tx_polarity_flip_phy131.BCM8885X=0
+phy_tx_polarity_flip_phy132.BCM8885X=0
+phy_tx_polarity_flip_phy133.BCM8885X=1
+phy_tx_polarity_flip_phy134.BCM8885X=0
+phy_tx_polarity_flip_phy135.BCM8885X=0
+
+phy_tx_polarity_flip_phy136.BCM8885X=0
+phy_tx_polarity_flip_phy137.BCM8885X=0
+phy_tx_polarity_flip_phy138.BCM8885X=0
+phy_tx_polarity_flip_phy139.BCM8885X=0
+phy_tx_polarity_flip_phy140.BCM8885X=0
+phy_tx_polarity_flip_phy141.BCM8885X=0
+phy_tx_polarity_flip_phy142.BCM8885X=0
+phy_tx_polarity_flip_phy143.BCM8885X=0
+
+
+polled_irq_delay.BCM8885X=5
+polled_irq_mode.BCM8885X=0
+port_fec_fabric.BCM8885X=7
+bcm_stat_interval.BCM8885X=1000000
+
+
+port_init_cl72_1=0
+port_init_cl72_2=0
+port_init_cl72_3=0
+port_init_cl72_4=0
+port_init_cl72_5=0
+port_init_cl72_6=0
+port_init_cl72_7=0
+port_init_cl72_8=0
+port_init_cl72_9=0
+port_init_cl72_10=0
+port_init_cl72_11=0
+port_init_cl72_12=0
+port_init_cl72_13=0
+port_init_cl72_14=0
+port_init_cl72_15=0
+port_init_cl72_16=0
+port_init_cl72_17=0
+port_init_cl72_18=0
+
+# Set to 1 to enable link training
+port_init_cl72_256=1
+port_init_cl72_257=1
+port_init_cl72_258=1
+port_init_cl72_259=1
+port_init_cl72_260=1
+port_init_cl72_261=1
+port_init_cl72_262=1
+port_init_cl72_263=1
+port_init_cl72_264=1
+#265 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_265=0
+#266 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_266=0
+#267 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_267=0
+#268 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_268=0
+port_init_cl72_269=1
+#270 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_270=0
+#271 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_271=0
+port_init_cl72_272=1
+port_init_cl72_273=1
+port_init_cl72_274=1
+port_init_cl72_275=1
+port_init_cl72_276=1
+port_init_cl72_277=1
+port_init_cl72_278=1
+port_init_cl72_279=1
+port_init_cl72_280=1
+port_init_cl72_281=1
+port_init_cl72_282=1
+port_init_cl72_283=1
+port_init_cl72_284=1
+port_init_cl72_285=1
+port_init_cl72_286=1
+port_init_cl72_287=1
+port_init_cl72_288=1
+port_init_cl72_289=1
+port_init_cl72_290=1
+port_init_cl72_291=1
+port_init_cl72_292=1
+port_init_cl72_293=1
+port_init_cl72_294=1
+port_init_cl72_295=1
+port_init_cl72_296=1
+port_init_cl72_297=1
+port_init_cl72_298=1
+port_init_cl72_299=1
+port_init_cl72_300=1
+port_init_cl72_301=1
+port_init_cl72_302=1
+port_init_cl72_303=1
+port_init_cl72_304=1
+port_init_cl72_305=1
+port_init_cl72_306=1
+port_init_cl72_307=1
+port_init_cl72_308=1
+port_init_cl72_309=1
+port_init_cl72_310=1
+port_init_cl72_311=1
+port_init_cl72_312=1
+port_init_cl72_313=1
+port_init_cl72_314=1
+port_init_cl72_315=1
+port_init_cl72_316=1
+port_init_cl72_317=1
+port_init_cl72_318=1
+port_init_cl72_319=1
+port_init_cl72_320=1
+port_init_cl72_321=1
+port_init_cl72_322=1
+port_init_cl72_323=1
+port_init_cl72_324=1
+port_init_cl72_325=1
+port_init_cl72_326=1
+port_init_cl72_327=1
+port_init_cl72_328=1
+port_init_cl72_329=1
+port_init_cl72_330=1
+port_init_cl72_331=1
+port_init_cl72_332=1
+port_init_cl72_333=1
+port_init_cl72_334=1
+port_init_cl72_335=1
+port_init_cl72_336=1
+port_init_cl72_337=1
+port_init_cl72_338=1
+port_init_cl72_339=1
+port_init_cl72_340=1
+port_init_cl72_341=1
+port_init_cl72_342=1
+port_init_cl72_343=1
+port_init_cl72_344=1
+port_init_cl72_345=1
+#346 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_346=0
+#347 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_347=0
+#348 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_348=0
+#349 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_349=0
+#350 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_350=0
+#351 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_351=0
+port_init_cl72_352=1
+port_init_cl72_353=1
+port_init_cl72_354=1
+port_init_cl72_355=1
+port_init_cl72_356=1
+port_init_cl72_357=1
+port_init_cl72_358=1
+port_init_cl72_359=1
+port_init_cl72_360=1
+#361 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_361=0
+#362 is NC and causing crosstalk on 365 when enable. Set TXFIR to its min. Can't do link training
+port_init_cl72_362=0
+#363 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_363=0
+#364 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_364=0
+port_init_cl72_365=1
+#366 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_366=0
+#367 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_367=0
+port_init_cl72_368=1
+port_init_cl72_369=1
+port_init_cl72_370=1
+port_init_cl72_371=1
+port_init_cl72_372=1
+port_init_cl72_373=1
+port_init_cl72_374=1
+port_init_cl72_375=1
+port_init_cl72_376=1
+port_init_cl72_377=1
+port_init_cl72_378=1
+port_init_cl72_379=1
+port_init_cl72_380=1
+port_init_cl72_381=1
+#382 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_382=0
+port_init_cl72_383=1
+port_init_cl72_384=1
+port_init_cl72_385=1
+port_init_cl72_386=1
+port_init_cl72_387=1
+port_init_cl72_388=1
+port_init_cl72_389=1
+port_init_cl72_390=1
+port_init_cl72_391=1
+port_init_cl72_392=1
+port_init_cl72_393=1
+port_init_cl72_394=1
+port_init_cl72_395=1
+port_init_cl72_396=1
+port_init_cl72_397=1
+port_init_cl72_398=1
+port_init_cl72_399=1
+port_init_cl72_400=1
+#401 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_401=0
+port_init_cl72_402=1
+#403 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_403=0
+#404 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_404=0
+#405 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_405=0
+#406 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_406=0
+port_init_cl72_407=1
+port_init_cl72_408=1
+port_init_cl72_409=1
+port_init_cl72_410=1
+port_init_cl72_411=1
+port_init_cl72_412=1
+port_init_cl72_413=1
+port_init_cl72_414=1
+port_init_cl72_415=1
+port_init_cl72_416=1
+port_init_cl72_417=1
+port_init_cl72_418=1
+port_init_cl72_419=1
+port_init_cl72_420=1
+port_init_cl72_421=1
+port_init_cl72_422=1
+port_init_cl72_423=1
+port_init_cl72_424=1
+port_init_cl72_425=1
+port_init_cl72_426=1
+port_init_cl72_427=1
+port_init_cl72_428=1
+port_init_cl72_429=1
+port_init_cl72_430=1
+port_init_cl72_431=1
+port_init_cl72_432=1
+port_init_cl72_433=1
+port_init_cl72_434=1
+port_init_cl72_435=1
+port_init_cl72_436=1
+port_init_cl72_437=1
+port_init_cl72_438=1
+port_init_cl72_439=1
+port_init_cl72_440=1
+port_init_cl72_441=1
+port_init_cl72_442=1
+port_init_cl72_443=1
+port_init_cl72_444=1
+port_init_cl72_445=1
+port_init_cl72_446=1
+port_init_cl72_447=1
+
+
+port_init_speed_cc.BCM8885X=200000
+port_init_speed_cd.BCM8885X=400000
+port_init_speed_ce.BCM8885X=100000
+port_init_speed_fabric.BCM8885X=53125
+port_init_speed_il.BCM8885X=10312
+port_init_speed_le.BCM8885X=50000
+port_init_speed_xe.BCM8885X=10000
+port_init_speed_xl.BCM8885X=40000
+port_priorities.BCM8885X=8
+protocol_traps_mode.BCM8885X=IN_LIF
+rate_ext_mdio_divisor=16
+schan_intr_enable.BCM8885X=0
+schan_timeout_usec.BCM8885X=900000
+serdes_fabric_clk_freq_in.BCM8885X=1
+serdes_fabric_clk_freq_out.BCM8885X=bypass
+serdes_nif_clk_freq_in0.BCM8885X=1
+serdes_nif_clk_freq_in1.BCM8885X=1
+serdes_nif_clk_freq_out0.BCM8885X=bypass
+serdes_nif_clk_freq_out1.BCM8885X=bypass
+soc_family.BCM8885X=BCM8885X
+stable_filename.BCM8885X=/tmp/warmboot_data
+stable_location.BCM8885X=3
+stable_size.BCM8885X=800000000
+sw_state_max_size.BCM8885X=750000000
+system_headers_mode=1
+tdma_intr_enable.BCM8885X=0
+tdma_timeout_usec.BCM8885X=1000000
+tm_port_header_type_in_0.BCM8885X=INJECTED_2
+tm_port_header_type_in_200.BCM8885X=INJECTED_2_PP
+tm_port_header_type_in_201.BCM8885X=INJECTED_2_PP
+tm_port_header_type_in_202.BCM8885X=INJECTED_2_PP
+tm_port_header_type_in_203.BCM8885X=INJECTED_2_PP
+tm_port_header_type_in_232.BCM8885X=INJECTED_2
+tm_port_header_type_in_19.BCM8885X=ETH
+tm_port_header_type_in_20.BCM8885X=ETH
+tm_port_header_type_out_0.BCM8885X=CPU
+tm_port_header_type_out_200.BCM8885X=ETH
+tm_port_header_type_out_201.BCM8885X=ETH
+tm_port_header_type_out_202.BCM8885X=ETH
+tm_port_header_type_out_203.BCM8885X=ETH
+tm_port_header_type_out_232.BCM8885X=CPU
+tm_port_header_type_out_19.BCM8885X=ETH
+tm_port_header_type_out_20.BCM8885X=ETH
+tslam_intr_enable.BCM8885X=0
+tslam_timeout_usec.BCM8885X=1000000
+ucode_port_0.BCM8885X=CPU.0:core_0.0
+ucode_port_200.BCM8885X=CPU.8:core_1.200
+ucode_port_201.BCM8885X=CPU.16:core_1.201
+ucode_port_202.BCM8885X=CPU.24:core_1.202
+ucode_port_203.BCM8885X=CPU.32:core_1.203
+
+
+ucode_port_1.BCM8885X=CDGE9:core_1.1
+ucode_port_2.BCM8885X=CDGE10:core_1.2
+ucode_port_3.BCM8885X=CDGE11:core_1.3
+ucode_port_4.BCM8885X=CDGE12:core_1.4
+ucode_port_5.BCM8885X=CDGE13:core_1.5
+ucode_port_6.BCM8885X=CDGE14:core_1.6
+ucode_port_7.BCM8885X=CDGE15:core_1.7
+ucode_port_8.BCM8885X=CDGE16:core_1.8
+ucode_port_9.BCM8885X=CDGE17:core_1.9
+ucode_port_10.BCM8885X=CDGE8:core_0.10
+ucode_port_11.BCM8885X=CDGE7:core_0.11
+ucode_port_12.BCM8885X=CDGE6:core_0.12
+ucode_port_13.BCM8885X=CDGE5:core_0.13
+ucode_port_14.BCM8885X=CDGE4:core_0.14
+ucode_port_15.BCM8885X=CDGE3:core_0.15
+ucode_port_16.BCM8885X=CDGE2:core_0.16
+ucode_port_17.BCM8885X=CDGE1:core_0.17
+ucode_port_18.BCM8885X=CDGE0:core_0.18
+ucode_port_19.BCM8885X=RCY0:core_0.19
+ucode_port_20.BCM8885X=RCY1:core_1.20
+ucode_port_21.BCM8885X=OLP:core_1.21
+
+ucode_port_100.BCM8885X=RCY_MIRROR.0:core_0.100
+ucode_port_101.BCM8885X=RCY_MIRROR.1:core_0.101
+ucode_port_102.BCM8885X=RCY_MIRROR.2:core_0.102
+ucode_port_103.BCM8885X=RCY_MIRROR.3:core_0.103
+ucode_port_104.BCM8885X=RCY_MIRROR.4:core_0.104
+ucode_port_105.BCM8885X=RCY_MIRROR.5:core_0.105
+ucode_port_106.BCM8885X=RCY_MIRROR.6:core_0.106
+ucode_port_107.BCM8885X=RCY_MIRROR.7:core_0.107
+ucode_port_108.BCM8885X=RCY_MIRROR.8:core_0.108
+ucode_port_109.BCM8885X=RCY_MIRROR.9:core_0.109
+ucode_port_110.BCM8885X=RCY_MIRROR.10:core_0.110
+ucode_port_111.BCM8885X=RCY_MIRROR.11:core_0.111
+ucode_port_112.BCM8885X=RCY_MIRROR.12:core_0.112
+ucode_port_113.BCM8885X=RCY_MIRROR.13:core_0.113
+ucode_port_114.BCM8885X=RCY_MIRROR.14:core_0.114
+ucode_port_115.BCM8885X=RCY_MIRROR.15:core_0.115
+ucode_port_116.BCM8885X=RCY_MIRROR.16:core_0.116
+ucode_port_117.BCM8885X=RCY_MIRROR.17:core_0.117
+ucode_port_118.BCM8885X=RCY_MIRROR.18:core_0.118
+ucode_port_119.BCM8885X=RCY_MIRROR.19:core_0.119
+ucode_port_120.BCM8885X=RCY_MIRROR.0:core_1.120
+ucode_port_121.BCM8885X=RCY_MIRROR.1:core_1.121
+ucode_port_122.BCM8885X=RCY_MIRROR.2:core_1.122
+ucode_port_123.BCM8885X=RCY_MIRROR.3:core_1.123
+ucode_port_124.BCM8885X=RCY_MIRROR.4:core_1.124
+ucode_port_125.BCM8885X=RCY_MIRROR.5:core_1.125
+ucode_port_126.BCM8885X=RCY_MIRROR.6:core_1.126
+ucode_port_127.BCM8885X=RCY_MIRROR.7:core_1.127
+ucode_port_128.BCM8885X=RCY_MIRROR.8:core_1.128
+ucode_port_129.BCM8885X=RCY_MIRROR.9:core_1.129
+ucode_port_130.BCM8885X=RCY_MIRROR.10:core_1.130
+ucode_port_131.BCM8885X=RCY_MIRROR.11:core_1.131
+ucode_port_132.BCM8885X=RCY_MIRROR.12:core_1.132
+ucode_port_133.BCM8885X=RCY_MIRROR.13:core_1.133
+ucode_port_134.BCM8885X=RCY_MIRROR.14:core_1.134
+ucode_port_135.BCM8885X=RCY_MIRROR.15:core_1.135
+ucode_port_136.BCM8885X=RCY_MIRROR.16:core_1.136
+ucode_port_137.BCM8885X=RCY_MIRROR.17:core_1.137
+ucode_port_138.BCM8885X=RCY_MIRROR.18:core_1.138
+ucode_port_139.BCM8885X=RCY_MIRROR.19:core_1.139
+
+serdes_lane_config_dfe_1.BCM8885X=on
+serdes_lane_config_dfe_2.BCM8885X=on
+serdes_lane_config_dfe_3.BCM8885X=on
+serdes_lane_config_dfe_4.BCM8885X=on
+serdes_lane_config_dfe_5.BCM8885X=on
+serdes_lane_config_dfe_6.BCM8885X=on
+serdes_lane_config_dfe_7.BCM8885X=on
+serdes_lane_config_dfe_8.BCM8885X=on
+serdes_lane_config_dfe_9.BCM8885X=on
+serdes_lane_config_dfe_10.BCM8885X=on
+serdes_lane_config_dfe_11.BCM8885X=on
+serdes_lane_config_dfe_12.BCM8885X=on
+serdes_lane_config_dfe_13.BCM8885X=on
+serdes_lane_config_dfe_14.BCM8885X=on
+serdes_lane_config_dfe_15.BCM8885X=on
+serdes_lane_config_dfe_16.BCM8885X=on
+serdes_lane_config_dfe_17.BCM8885X=on
+serdes_lane_config_dfe_18.BCM8885X=on
+
+
+serdes_lane_config_channel_mode_1.BCM8885X=force_nr
+serdes_lane_config_channel_mode_2.BCM8885X=force_nr
+serdes_lane_config_channel_mode_3.BCM8885X=force_nr
+serdes_lane_config_channel_mode_4.BCM8885X=force_nr
+serdes_lane_config_channel_mode_5.BCM8885X=force_nr
+serdes_lane_config_channel_mode_6.BCM8885X=force_nr
+serdes_lane_config_channel_mode_7.BCM8885X=force_nr
+serdes_lane_config_channel_mode_8.BCM8885X=force_nr
+serdes_lane_config_channel_mode_9.BCM8885X=force_nr
+serdes_lane_config_channel_mode_10.BCM8885X=force_nr
+serdes_lane_config_channel_mode_11.BCM8885X=force_nr
+serdes_lane_config_channel_mode_12.BCM8885X=force_nr
+serdes_lane_config_channel_mode_13.BCM8885X=force_nr
+serdes_lane_config_channel_mode_14.BCM8885X=force_nr
+serdes_lane_config_channel_mode_15.BCM8885X=force_nr
+serdes_lane_config_channel_mode_16.BCM8885X=force_nr
+serdes_lane_config_channel_mode_17.BCM8885X=force_nr
+serdes_lane_config_channel_mode_18.BCM8885X=force_nr
+
+
+serdes_lane_config_media_type_1.BCM8885X=backplane
+serdes_lane_config_media_type_2.BCM8885X=backplane
+serdes_lane_config_media_type_3.BCM8885X=backplane
+serdes_lane_config_media_type_4.BCM8885X=backplane
+serdes_lane_config_media_type_5.BCM8885X=backplane
+serdes_lane_config_media_type_6.BCM8885X=backplane
+serdes_lane_config_media_type_7.BCM8885X=backplane
+serdes_lane_config_media_type_8.BCM8885X=backplane
+serdes_lane_config_media_type_9.BCM8885X=backplane
+serdes_lane_config_media_type_10.BCM8885X=backplane
+serdes_lane_config_media_type_11.BCM8885X=backplane
+serdes_lane_config_media_type_12.BCM8885X=backplane
+serdes_lane_config_media_type_13.BCM8885X=backplane
+serdes_lane_config_media_type_14.BCM8885X=backplane
+serdes_lane_config_media_type_15.BCM8885X=backplane
+serdes_lane_config_media_type_16.BCM8885X=backplane
+serdes_lane_config_media_type_17.BCM8885X=backplane
+serdes_lane_config_media_type_18.BCM8885X=backplane
+
+
+port_fec.1.BCM8885x=9
+port_fec.2.BCM8885x=9
+port_fec.3.BCM8885x=9
+port_fec.4.BCM8885x=9
+port_fec.5.BCM8885x=9
+port_fec.6.BCM8885x=9
+port_fec.7.BCM8885x=9
+port_fec.8.BCM8885x=9
+port_fec.9.BCM8885x=9
+port_fec.10.BCM8885x=9
+port_fec.11.BCM8885x=9
+port_fec.12.BCM8885x=9
+port_fec.13.BCM8885x=9
+port_fec.14.BCM8885x=9
+port_fec.15.BCM8885x=9
+port_fec.16.BCM8885x=9
+port_fec.17.BCM8885x=9
+port_fec.18.BCM8885x=9
+
+
+serdes_tx_taps_1.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_2.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_3.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_4.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_5.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_6.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_7.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_8.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_9.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_10.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_11.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_12.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_13.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_14.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_15.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_16.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_17.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_18.BCM8885X=pam4:-4:128:0:0:0:0
+
+
+# mask if you want to enable link training.
+#serdes_tx_taps_256.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_257.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_258.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_259.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_260.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_261.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_262.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_263.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_264.BCM8885X=pam4:-20:148:0:0:0:0
+#265 is NC, set TXFIR to its min.
+serdes_tx_taps_265.BCM8885X=pam4:0:0:0:0:0:0
+#266 is NC, set TXFIR to its min.
+serdes_tx_taps_266.BCM8885X=pam4:0:0:0:0:0:0
+#267 is NC, set TXFIR to its min.
+serdes_tx_taps_267.BCM8885X=pam4:0:0:0:0:0:0
+#268 is NC, set TXFIR to its min.
+serdes_tx_taps_268.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_269.BCM8885X=pam4:-20:148:0:0:0:0
+#270 is NC, set TXFIR to its min.
+serdes_tx_taps_270.BCM8885X=pam4:0:0:0:0:0:0
+#271 is NC, set TXFIR to its min.
+serdes_tx_taps_271.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_272.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_273.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_274.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_275.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_276.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_277.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_278.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_279.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_280.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_281.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_282.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_283.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_284.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_285.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_286.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_287.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_288.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_289.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_290.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_291.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_292.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_293.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_294.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_295.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_296.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_297.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_298.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_299.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_300.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_301.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_302.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_303.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_304.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_305.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_306.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_307.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_308.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_309.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_310.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_311.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_312.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_313.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_314.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_315.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_316.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_317.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_318.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_319.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_320.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_321.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_322.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_323.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_324.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_325.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_326.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_327.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_328.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_329.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_330.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_331.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_332.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_333.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_334.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_335.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_336.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_337.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_338.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_339.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_340.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_341.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_342.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_343.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_344.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_345.BCM8885X=pam4:-20:148:0:0:0:0
+#346 is NC, set TXFIR to its min.
+serdes_tx_taps_346.BCM8885X=pam4:0:0:0:0:0:0
+#347 is NC, set TXFIR to its min.
+serdes_tx_taps_347.BCM8885X=pam4:0:0:0:0:0:0
+#348 is NC, set TXFIR to its min.
+serdes_tx_taps_348.BCM8885X=pam4:0:0:0:0:0:0
+#349 is NC, set TXFIR to its min.
+serdes_tx_taps_349.BCM8885X=pam4:0:0:0:0:0:0
+#350 is NC, set TXFIR to its min.
+serdes_tx_taps_350.BCM8885X=pam4:0:0:0:0:0:0
+#351 is NC, set TXFIR to its min.
+serdes_tx_taps_351.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_352.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_353.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_354.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_355.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_356.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_357.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_358.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_359.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_360.BCM8885X=pam4:-20:148:0:0:0:0
+#361 is NC, set TXFIR to its min.
+serdes_tx_taps_361.BCM8885X=pam4:0:0:0:0:0:0
+#362 is NC and causing crosstalk on 365 when enable. Set TXFIR to its min.
+serdes_tx_taps_362.BCM8885X=pam4:0:0:0:0:0:0
+#363 is NC, set TXFIR to its min.
+serdes_tx_taps_363.BCM8885X=pam4:0:0:0:0:0:0
+#364 is NC, set TXFIR to its min.
+serdes_tx_taps_364.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_365.BCM8885X=pam4:-20:148:0:0:0:0
+#366 is NC, set TXFIR to its min.
+serdes_tx_taps_366.BCM8885X=pam4:0:0:0:0:0:0
+#367 is NC, set TXFIR to its min.
+serdes_tx_taps_367.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_368.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_369.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_370.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_371.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_372.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_373.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_374.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_375.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_376.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_377.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_378.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_379.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_380.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_381.BCM8885X=pam4:-20:148:0:0:0:0
+#382 is NC, set TXFIR to its min.
+serdes_tx_taps_382.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_383.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_384.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_385.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_386.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_387.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_388.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_389.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_390.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_391.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_392.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_393.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_394.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_395.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_396.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_397.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_398.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_399.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_400.BCM8885X=pam4:-20:148:0:0:0:0
+#401 is NC, set TXFIR to its min.
+serdes_tx_taps_401.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_402.BCM8885X=pam4:-20:148:0:0:0:0
+#403 is NC, set TXFIR to its min.
+serdes_tx_taps_403.BCM8885X=pam4:0:0:0:0:0:0
+#404 is NC, set TXFIR to its min.
+serdes_tx_taps_404.BCM8885X=pam4:0:0:0:0:0:0
+#405 is NC, set TXFIR to its min.
+serdes_tx_taps_405.BCM8885X=pam4:0:0:0:0:0:0
+#406 is NC, set TXFIR to its min.
+serdes_tx_taps_406.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_407.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_408.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_409.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_410.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_411.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_412.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_413.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_414.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_415.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_416.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_417.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_418.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_419.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_420.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_421.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_422.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_423.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_424.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_425.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_426.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_427.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_428.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_429.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_430.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_431.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_432.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_433.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_434.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_435.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_436.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_437.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_438.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_439.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_440.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_441.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_442.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_443.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_444.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_445.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_446.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_447.BCM8885X=pam4:-20:148:0:0:0:0
+
+
+# mask if you want to enable link training.
+#serdes_lane_config_channel_mode_256=force_nr
+#serdes_lane_config_channel_mode_257=force_nr
+#serdes_lane_config_channel_mode_258=force_nr
+#serdes_lane_config_channel_mode_259=force_nr
+#serdes_lane_config_channel_mode_260=force_nr
+#serdes_lane_config_channel_mode_261=force_nr
+#serdes_lane_config_channel_mode_262=force_nr
+#serdes_lane_config_channel_mode_263=force_nr
+#serdes_lane_config_channel_mode_264=force_nr
+#265 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_265=force_nr
+#266 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_266=force_nr
+#267 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_267=force_nr
+#268 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_268=force_nr
+#serdes_lane_config_channel_mode_269=force_nr
+#270 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_270=force_nr
+#271 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_271=force_nr
+#serdes_lane_config_channel_mode_272=force_nr
+#serdes_lane_config_channel_mode_273=force_nr
+#serdes_lane_config_channel_mode_274=force_nr
+#serdes_lane_config_channel_mode_275=force_nr
+#serdes_lane_config_channel_mode_276=force_nr
+#serdes_lane_config_channel_mode_277=force_nr
+#serdes_lane_config_channel_mode_278=force_nr
+#serdes_lane_config_channel_mode_279=force_nr
+#serdes_lane_config_channel_mode_280=force_nr
+#serdes_lane_config_channel_mode_281=force_nr
+#serdes_lane_config_channel_mode_282=force_nr
+#serdes_lane_config_channel_mode_283=force_nr
+#serdes_lane_config_channel_mode_284=force_nr
+#serdes_lane_config_channel_mode_285=force_nr
+#serdes_lane_config_channel_mode_286=force_nr
+#serdes_lane_config_channel_mode_287=force_nr
+#serdes_lane_config_channel_mode_288=force_nr
+#serdes_lane_config_channel_mode_289=force_nr
+#serdes_lane_config_channel_mode_290=force_nr
+#serdes_lane_config_channel_mode_291=force_nr
+#serdes_lane_config_channel_mode_292=force_nr
+#serdes_lane_config_channel_mode_293=force_nr
+#serdes_lane_config_channel_mode_294=force_nr
+#serdes_lane_config_channel_mode_295=force_nr
+#serdes_lane_config_channel_mode_296=force_nr
+#serdes_lane_config_channel_mode_297=force_nr
+#serdes_lane_config_channel_mode_298=force_nr
+#serdes_lane_config_channel_mode_299=force_nr
+#serdes_lane_config_channel_mode_300=force_nr
+#serdes_lane_config_channel_mode_301=force_nr
+#serdes_lane_config_channel_mode_302=force_nr
+#serdes_lane_config_channel_mode_303=force_nr
+#serdes_lane_config_channel_mode_304=force_nr
+#serdes_lane_config_channel_mode_305=force_nr
+#serdes_lane_config_channel_mode_306=force_nr
+#serdes_lane_config_channel_mode_307=force_nr
+#serdes_lane_config_channel_mode_308=force_nr
+#serdes_lane_config_channel_mode_309=force_nr
+#serdes_lane_config_channel_mode_310=force_nr
+#serdes_lane_config_channel_mode_311=force_nr
+#serdes_lane_config_channel_mode_312=force_nr
+#serdes_lane_config_channel_mode_313=force_nr
+#serdes_lane_config_channel_mode_314=force_nr
+#serdes_lane_config_channel_mode_315=force_nr
+#serdes_lane_config_channel_mode_316=force_nr
+#serdes_lane_config_channel_mode_317=force_nr
+#serdes_lane_config_channel_mode_318=force_nr
+#serdes_lane_config_channel_mode_319=force_nr
+#serdes_lane_config_channel_mode_320=force_nr
+#serdes_lane_config_channel_mode_321=force_nr
+#serdes_lane_config_channel_mode_322=force_nr
+#serdes_lane_config_channel_mode_323=force_nr
+#serdes_lane_config_channel_mode_324=force_nr
+#serdes_lane_config_channel_mode_325=force_nr
+#serdes_lane_config_channel_mode_326=force_nr
+#serdes_lane_config_channel_mode_327=force_nr
+#serdes_lane_config_channel_mode_328=force_nr
+#serdes_lane_config_channel_mode_329=force_nr
+#serdes_lane_config_channel_mode_330=force_nr
+#serdes_lane_config_channel_mode_331=force_nr
+#serdes_lane_config_channel_mode_332=force_nr
+#serdes_lane_config_channel_mode_333=force_nr
+#serdes_lane_config_channel_mode_334=force_nr
+#serdes_lane_config_channel_mode_335=force_nr
+#serdes_lane_config_channel_mode_336=force_nr
+#serdes_lane_config_channel_mode_337=force_nr
+#serdes_lane_config_channel_mode_338=force_nr
+#serdes_lane_config_channel_mode_339=force_nr
+#serdes_lane_config_channel_mode_340=force_nr
+#serdes_lane_config_channel_mode_341=force_nr
+#serdes_lane_config_channel_mode_342=force_nr
+#serdes_lane_config_channel_mode_343=force_nr
+#serdes_lane_config_channel_mode_344=force_nr
+#serdes_lane_config_channel_mode_345=force_nr
+#346 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_346=force_nr
+#347 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_347=force_nr
+#348 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_348=force_nr
+#349 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_349=force_nr
+#350 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_350=force_nr
+#351 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_351=force_nr
+#serdes_lane_config_channel_mode_352=force_nr
+#serdes_lane_config_channel_mode_353=force_nr
+#serdes_lane_config_channel_mode_354=force_nr
+#serdes_lane_config_channel_mode_355=force_nr
+#serdes_lane_config_channel_mode_356=force_nr
+#serdes_lane_config_channel_mode_357=force_nr
+#serdes_lane_config_channel_mode_358=force_nr
+#serdes_lane_config_channel_mode_359=force_nr
+#serdes_lane_config_channel_mode_360=force_nr
+#361 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_361=force_nr
+#362 is NC and causing crosstalk on 365 when enable. Set TXFIR to its min.
+serdes_lane_config_channel_mode_362=force_nr
+#363 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_363=force_nr
+#364 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_364=force_nr
+#serdes_lane_config_channel_mode_365=force_nr
+#366 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_366=force_nr
+#367 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_367=force_nr
+#serdes_lane_config_channel_mode_368=force_nr
+#serdes_lane_config_channel_mode_369=force_nr
+#serdes_lane_config_channel_mode_370=force_nr
+#serdes_lane_config_channel_mode_371=force_nr
+#serdes_lane_config_channel_mode_372=force_nr
+#serdes_lane_config_channel_mode_373=force_nr
+#serdes_lane_config_channel_mode_374=force_nr
+#serdes_lane_config_channel_mode_375=force_nr
+#serdes_lane_config_channel_mode_376=force_nr
+#serdes_lane_config_channel_mode_377=force_nr
+#serdes_lane_config_channel_mode_378=force_nr
+#serdes_lane_config_channel_mode_379=force_nr
+#serdes_lane_config_channel_mode_380=force_nr
+#serdes_lane_config_channel_mode_381=force_nr
+#382 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_382=force_nr
+#serdes_lane_config_channel_mode_383=force_nr
+#serdes_lane_config_channel_mode_384=force_nr
+#serdes_lane_config_channel_mode_385=force_nr
+#serdes_lane_config_channel_mode_386=force_nr
+#serdes_lane_config_channel_mode_387=force_nr
+#serdes_lane_config_channel_mode_388=force_nr
+#serdes_lane_config_channel_mode_389=force_nr
+#serdes_lane_config_channel_mode_390=force_nr
+#serdes_lane_config_channel_mode_391=force_nr
+#serdes_lane_config_channel_mode_392=force_nr
+#serdes_lane_config_channel_mode_393=force_nr
+#serdes_lane_config_channel_mode_394=force_nr
+#serdes_lane_config_channel_mode_395=force_nr
+#serdes_lane_config_channel_mode_396=force_nr
+#serdes_lane_config_channel_mode_397=force_nr
+#serdes_lane_config_channel_mode_398=force_nr
+#serdes_lane_config_channel_mode_399=force_nr
+#serdes_lane_config_channel_mode_400=force_nr
+#401 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_401=force_nr
+#serdes_lane_config_channel_mode_402=force_nr
+#403 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_403=force_nr
+#404 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_404=force_nr
+#405 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_405=force_nr
+#406 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_406=force_nr
+#serdes_lane_config_channel_mode_407=force_nr
+#serdes_lane_config_channel_mode_408=force_nr
+#serdes_lane_config_channel_mode_409=force_nr
+#serdes_lane_config_channel_mode_410=force_nr
+#serdes_lane_config_channel_mode_411=force_nr
+#serdes_lane_config_channel_mode_412=force_nr
+#serdes_lane_config_channel_mode_413=force_nr
+#serdes_lane_config_channel_mode_414=force_nr
+#serdes_lane_config_channel_mode_415=force_nr
+#serdes_lane_config_channel_mode_416=force_nr
+#serdes_lane_config_channel_mode_417=force_nr
+#serdes_lane_config_channel_mode_418=force_nr
+#serdes_lane_config_channel_mode_419=force_nr
+#serdes_lane_config_channel_mode_420=force_nr
+#serdes_lane_config_channel_mode_421=force_nr
+#serdes_lane_config_channel_mode_422=force_nr
+#serdes_lane_config_channel_mode_423=force_nr
+#serdes_lane_config_channel_mode_424=force_nr
+#serdes_lane_config_channel_mode_425=force_nr
+#serdes_lane_config_channel_mode_426=force_nr
+#serdes_lane_config_channel_mode_427=force_nr
+#serdes_lane_config_channel_mode_428=force_nr
+#serdes_lane_config_channel_mode_429=force_nr
+#serdes_lane_config_channel_mode_430=force_nr
+#serdes_lane_config_channel_mode_431=force_nr
+#serdes_lane_config_channel_mode_432=force_nr
+#serdes_lane_config_channel_mode_433=force_nr
+#serdes_lane_config_channel_mode_434=force_nr
+#serdes_lane_config_channel_mode_435=force_nr
+#serdes_lane_config_channel_mode_436=force_nr
+#serdes_lane_config_channel_mode_437=force_nr
+#serdes_lane_config_channel_mode_438=force_nr
+#serdes_lane_config_channel_mode_439=force_nr
+#serdes_lane_config_channel_mode_440=force_nr
+#serdes_lane_config_channel_mode_441=force_nr
+#serdes_lane_config_channel_mode_442=force_nr
+#serdes_lane_config_channel_mode_443=force_nr
+#serdes_lane_config_channel_mode_444=force_nr
+#serdes_lane_config_channel_mode_445=force_nr
+#serdes_lane_config_channel_mode_446=force_nr
+#serdes_lane_config_channel_mode_447=force_nr
+
+rif_id_max=24576
+dpp_db_path=/usr/share/bcm/db
+sai_recycle_port_lane_base=200
+appl_param_nof_ports_per_modid=64
+udh_exists=1
+custom_feature_pcp_force_no_packing=1
+
+xflow_macsec_secure_chan_to_num_secure_assoc_encrypt=2
+xflow_macsec_secure_chan_to_num_secure_assoc_decrypt=4
+cmic_dma_abort_in_cold_boot=0
+sai_pfc_dlr_init_capability=0
+sai_disable_srcmacqedstmac_ctrl=1
+trunk_group_max_members=16
+sai_default_cpu_tx_tc=7
+sai_disable_srcmacqedstmac_ctrl=1
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/pg_profile_lookup.ini
new file mode 100644
index 00000000000..ba784705e06
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/pg_profile_lookup.ini
@@ -0,0 +1,17 @@
+# PG lossless profiles.
+# speed cable    size    xon  xoff threshold xon_offset
+ 40000   300m      0    2560 69632    -6      181753
+ 100000  300m      0    2560 110592   -6      363506
+ 400000  300m      0    2560 315392   -5      1454025
+ 40000   1000m     0    2560 114688   -6      181753
+ 100000  1000m     0    2560 225280   -6      363506
+ 400000  1000m     0    2560 778240   -5      1454025
+ 40000   2000m     0    2560 184320   -6      181753
+ 100000  2000m     0    2560 393216   -6      363506
+ 400000  2000m     0    2560 1445888  -5      1454025
+ 40000   80000m    0    2560 5369856  -6      181753
+ 100000  80000m    0    2560 13357056 -6      363506
+ 400000  80000m    0    2560 53305344 -5      1454025
+ 40000   120000m   0    2560 8028160  -6      181753
+ 100000  120000m   0    2560 20004864 -6      363506
+ 400000  120000m   0    2560 79900672 -5      1454025
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/port_config.ini b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/port_config.ini
new file mode 100644
index 00000000000..18449e8cbcb
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/port_config.ini
@@ -0,0 +1,21 @@
+# name         lanes                            alias         index  role  speed   asic_port_name  core_id  core_port_id  num_voq
+Ethernet0      72,73,74,75,76,77,78,79          Ethernet1/1   1      Ext   400000  Eth0            1       1           8
+Ethernet8      80,81,82,83,84,85,86,87          Ethernet2/1   2      Ext   400000  Eth8            1       2           8
+Ethernet16     88,89,90,91,92,93,94,95          Ethernet3/1   3      Ext   400000  Eth16           1       3           8
+Ethernet24     96,97,98,99,100,101,102,103      Ethernet4/1   4      Ext   400000  Eth24           1       4           8
+Ethernet32     104,105,106,107,108,109,110,111  Ethernet5/1   5      Ext   400000  Eth32           1       5           8
+Ethernet40     112,113,114,115,116,117,118,119  Ethernet6/1   6      Ext   400000  Eth40           1       6           8
+Ethernet48     120,121,122,123,124,125,126,127  Ethernet7/1   7      Ext   400000  Eth48           1       7           8
+Ethernet56     128,129,130,131,132,133,134,135  Ethernet8/1   8      Ext   400000  Eth56           1       8           8
+Ethernet64     136,137,138,139,140,141,142,143  Ethernet9/1   9      Ext   400000  Eth64           1       9           8
+Ethernet72     64,65,66,67,68,69,70,71          Ethernet10/1  10     Ext   400000  Eth72           0       10          8
+Ethernet80     56,57,58,59,60,61,62,63          Ethernet11/1  11     Ext   400000  Eth80           0       11          8
+Ethernet88     48,49,50,51,52,53,54,55          Ethernet12/1  12     Ext   400000  Eth88           0       12          8
+Ethernet96     40,41,42,43,44,45,46,47          Ethernet13/1  13     Ext   400000  Eth96           0       13          8
+Ethernet104    32,33,34,35,36,37,38,39          Ethernet14/1  14     Ext   400000  Eth104          0       14          8
+Ethernet112    24,25,26,27,28,29,30,31          Ethernet15/1  15     Ext   400000  Eth112          0       15          8
+Ethernet120    16,17,18,19,20,21,22,23          Ethernet16/1  16     Ext   400000  Eth120          0       16          8
+Ethernet128    8,9,10,11,12,13,14,15            Ethernet17/1  17     Ext   400000  Eth128          0       17          8
+Ethernet136    0,1,2,3,4,5,6,7                  Ethernet18/1  18     Ext   400000  Eth136          0       18          8
+Ethernet-IB0   219                              Recirc0/0     37     Inb   10000   Rcy0            0       19          8
+Ethernet-Rec0  220                              Recirc0/1     39     Rec   10000   Rcy1            1       20          8
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/qos.json.j2 b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/qos.json.j2
new file mode 100644
index 00000000000..411942ab526
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/qos.json.j2
@@ -0,0 +1,21 @@
+{%- macro generate_wred_profiles() %}
+    "WRED_PROFILE": {
+        "AZURE_LOSSLESS" : {
+            "wred_green_enable"      : "true",
+            "wred_yellow_enable"     : "true",
+            "wred_red_enable"        : "true",
+            "ecn"                    : "ecn_all",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
+            "green_drop_probability" : "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability"   : "5"
+        }
+    },
+{%- endmacro %}
+
+{%- include 'qos_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/sai.profile b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/sai.profile
new file mode 100644
index 00000000000..65cfb73f3b3
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/jr2cp-nokia-18x400g-config.bcm
+SAI_SWITCH_NON_ECMP_MAX_SIZE=3072
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/sai_postinit_cmd.soc
new file mode 100644
index 00000000000..7fbac3b5175
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/sai_postinit_cmd.soc
@@ -0,0 +1,31 @@
+cint /usr/share/sonic/hwsku/mesh_config.cint
+
+INTeRrupt ENAble id=2209
+INTeRrupt ENAble id=2210
+INTeRrupt ENAble id=2211
+INTeRrupt ENAble id=2212
+INTeRrupt ENAble id=2213
+INTeRrupt ENAble id=2214
+INTeRrupt ENAble id=2215
+INTeRrupt ENAble id=2216
+INTeRrupt ENAble id=2217
+INTeRrupt ENAble id=2218
+INTeRrupt ENAble id=2219
+INTeRrupt ENAble id=2220
+INTeRrupt ENAble id=2221
+INTeRrupt ENAble id=2222
+INTeRrupt ENAble id=2223
+INTeRrupt ENAble id=2224
+INTeRrupt ENAble id=2225
+INTeRrupt ENAble id=2226
+
+INTeRrupt ENAble id=482
+INTeRrupt ENAble id=483
+INTeRrupt ENAble id=484
+INTeRrupt ENAble id=485
+INTeRrupt ENAble id=486
+INTeRrupt ENAble id=487
+INTeRrupt ENAble id=488
+
+INTeRrupt ENAble id=1597
+debug intr error
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/buffers.json.j2 b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/buffers.json.j2
new file mode 100644
index 00000000000..f34a844f4a8
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't2' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/buffers_defaults_t2.j2
new file mode 100644
index 00000000000..cf0e02f6d7c
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/buffers_defaults_t2.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- set ports2cable = {
+        'torrouter_server'       : '300m',
+        'leafrouter_torrouter'   : '300m',
+        'spinerouter_leafrouter' : '2000m',
+        'regionalhub_spinerouter': '120000m',
+        'aznghub_spinerouter'    : '120000m'
+        }
+-%}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0,36) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "6441610000",
+            "type": "both",
+            "mode": "dynamic",
+            "xoff": "1582033305"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"0"
+        },
+        "egress_lossless_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-1"
+        },
+        "egress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-4"
+        }
+    },
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/context_config.json b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/context_config.json
new file mode 100644
index 00000000000..5caa2e8eef8
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/context_config.json
@@ -0,0 +1,21 @@
+{
+    "CONTEXTS": [
+        {
+            "guid" : 0,
+            "name" : "syncd1",
+            "dbAsic" : "ASIC_DB",
+            "dbCounters" : "COUNTERS_DB",
+            "dbFlex": "FLEX_COUNTER_DB",
+            "dbState" : "STATE_DB",
+            "zmq_enable": false,
+            "zmq_endpoint": "tcp://127.0.0.1:5555",
+            "zmq_ntf_endpoint": "tcp://127.0.0.1:5556",
+            "switches": [
+                {
+                    "index" : 1,
+                    "hwinfo" : "07:00.0"
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/jr2cp-nokia-18x400g-config.bcm
new file mode 100644
index 00000000000..8906632aeb4
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/jr2cp-nokia-18x400g-config.bcm
@@ -0,0 +1,2159 @@
+appl_param_nof_devices.BCM8885X=2
+appl_enable_mesh_topology_init=0
+appl_enable_intr_init.BCM8885X=1
+appl_enable_learn_and_limit_init.BCM8885X=0
+appl_enable_oam.BCM8885X=0
+appl_enable_oam_fwd_idx_wa_init.BCM8885X=0
+appl_enable_oam_stat_wa_init.BCM8885X=0
+dma_desc_aggregator_buff_size_kb.BCM8885X=100
+dma_desc_aggregator_chain_length_max.BCM8885X=1000
+dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1
+dma_desc_aggregator_timeout_usec.BCM8885X=1000
+dport_map_direct.BCM8885X=1
+programmability_image_name.BCM8885X=standard_1
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
+dtm_flow_mapping_mode_region_64.BCM8885X=3
+dtm_flow_mapping_mode_region_65.BCM8885X=3
+dtm_flow_mapping_mode_region_66.BCM8885X=3
+dtm_flow_mapping_mode_region_67.BCM8885X=3
+dtm_flow_mapping_mode_region_68.BCM8885X=3
+dtm_flow_mapping_mode_region_69.BCM8885X=3
+dtm_flow_mapping_mode_region_70.BCM8885X=3
+dtm_flow_mapping_mode_region_71.BCM8885X=3
+dtm_flow_mapping_mode_region_72.BCM8885X=3
+dtm_flow_mapping_mode_region_73.BCM8885X=3
+dtm_flow_mapping_mode_region_74.BCM8885X=3
+dtm_flow_mapping_mode_region_75.BCM8885X=3
+dtm_flow_mapping_mode_region_76.BCM8885X=3
+dtm_flow_mapping_mode_region_77.BCM8885X=3
+dtm_flow_mapping_mode_region_78.BCM8885X=3
+dtm_flow_mapping_mode_region_79.BCM8885X=7
+dtm_flow_mapping_mode_region_80.BCM8885X=3
+dtm_flow_mapping_mode_region_81.BCM8885X=1
+dtm_flow_mapping_mode_region_82.BCM8885X=3
+dtm_flow_mapping_mode_region_83.BCM8885X=3
+dtm_flow_mapping_mode_region_84.BCM8885X=3
+dtm_flow_mapping_mode_region_85.BCM8885X=3
+dtm_flow_mapping_mode_region_86.BCM8885X=3
+dtm_flow_mapping_mode_region_87.BCM8885X=3
+dtm_flow_mapping_mode_region_88.BCM8885X=3
+dtm_flow_mapping_mode_region_89.BCM8885X=3
+dtm_flow_mapping_mode_region_90.BCM8885X=3
+dtm_flow_mapping_mode_region_91.BCM8885X=3
+dtm_flow_mapping_mode_region_92.BCM8885X=3
+dtm_flow_mapping_mode_region_93.BCM8885X=3
+dtm_flow_mapping_mode_region_94.BCM8885X=3
+dtm_flow_nof_remote_cores_region_1.BCM8885X=2
+dtm_flow_nof_remote_cores_region_10.BCM8885X=2
+dtm_flow_nof_remote_cores_region_11.BCM8885X=2
+dtm_flow_nof_remote_cores_region_12.BCM8885X=2
+dtm_flow_nof_remote_cores_region_13.BCM8885X=2
+dtm_flow_nof_remote_cores_region_14.BCM8885X=2
+dtm_flow_nof_remote_cores_region_15.BCM8885X=2
+dtm_flow_nof_remote_cores_region_16.BCM8885X=2
+dtm_flow_nof_remote_cores_region_17.BCM8885X=2
+dtm_flow_nof_remote_cores_region_18.BCM8885X=2
+dtm_flow_nof_remote_cores_region_19.BCM8885X=2
+dtm_flow_nof_remote_cores_region_2.BCM8885X=2
+dtm_flow_nof_remote_cores_region_20.BCM8885X=2
+dtm_flow_nof_remote_cores_region_21.BCM8885X=2
+dtm_flow_nof_remote_cores_region_22.BCM8885X=2
+dtm_flow_nof_remote_cores_region_23.BCM8885X=2
+dtm_flow_nof_remote_cores_region_24.BCM8885X=2
+dtm_flow_nof_remote_cores_region_25.BCM8885X=2
+dtm_flow_nof_remote_cores_region_26.BCM8885X=2
+dtm_flow_nof_remote_cores_region_27.BCM8885X=2
+dtm_flow_nof_remote_cores_region_28.BCM8885X=2
+dtm_flow_nof_remote_cores_region_29.BCM8885X=2
+dtm_flow_nof_remote_cores_region_3.BCM8885X=2
+dtm_flow_nof_remote_cores_region_30.BCM8885X=2
+dtm_flow_nof_remote_cores_region_31.BCM8885X=2
+dtm_flow_nof_remote_cores_region_32.BCM8885X=2
+dtm_flow_nof_remote_cores_region_33.BCM8885X=2
+dtm_flow_nof_remote_cores_region_34.BCM8885X=2
+dtm_flow_nof_remote_cores_region_35.BCM8885X=2
+dtm_flow_nof_remote_cores_region_36.BCM8885X=2
+dtm_flow_nof_remote_cores_region_37.BCM8885X=2
+dtm_flow_nof_remote_cores_region_38.BCM8885X=2
+dtm_flow_nof_remote_cores_region_39.BCM8885X=2
+dtm_flow_nof_remote_cores_region_4.BCM8885X=2
+dtm_flow_nof_remote_cores_region_40.BCM8885X=2
+dtm_flow_nof_remote_cores_region_41.BCM8885X=2
+dtm_flow_nof_remote_cores_region_42.BCM8885X=2
+dtm_flow_nof_remote_cores_region_43.BCM8885X=2
+dtm_flow_nof_remote_cores_region_44.BCM8885X=2
+dtm_flow_nof_remote_cores_region_45.BCM8885X=2
+dtm_flow_nof_remote_cores_region_46.BCM8885X=2
+dtm_flow_nof_remote_cores_region_47.BCM8885X=2
+dtm_flow_nof_remote_cores_region_48.BCM8885X=2
+dtm_flow_nof_remote_cores_region_49.BCM8885X=2
+dtm_flow_nof_remote_cores_region_5.BCM8885X=2
+dtm_flow_nof_remote_cores_region_50.BCM8885X=2
+dtm_flow_nof_remote_cores_region_51.BCM8885X=2
+dtm_flow_nof_remote_cores_region_52.BCM8885X=2
+dtm_flow_nof_remote_cores_region_53.BCM8885X=2
+dtm_flow_nof_remote_cores_region_54.BCM8885X=2
+dtm_flow_nof_remote_cores_region_55.BCM8885X=2
+dtm_flow_nof_remote_cores_region_56.BCM8885X=2
+dtm_flow_nof_remote_cores_region_57.BCM8885X=2
+dtm_flow_nof_remote_cores_region_58.BCM8885X=2
+dtm_flow_nof_remote_cores_region_59.BCM8885X=2
+dtm_flow_nof_remote_cores_region_6.BCM8885X=2
+dtm_flow_nof_remote_cores_region_60.BCM8885X=2
+dtm_flow_nof_remote_cores_region_7.BCM8885X=2
+dtm_flow_nof_remote_cores_region_8.BCM8885X=2
+dtm_flow_nof_remote_cores_region_9.BCM8885X=2
+dtm_flow_nof_remote_cores_region_73.BCM8869X=2
+dtm_flow_mapping_mode_region_73.BCM8869X=0
+dtm_flow_nof_remote_cores_region_74.BCM8869X=2
+dtm_flow_mapping_mode_region_74.BCM8869X=0
+dtm_flow_nof_remote_cores_region_75.BCM8869X=2
+dtm_flow_mapping_mode_region_75.BCM8869X=0
+ext_ram_enabled_bitmap.BCM8885X=3
+ext_ram_freq.BCM8885X=1200
+dram_temperature_threshold_restore_traffic.BCM8885X=89
+dram_temperature_threshold_power_down.BCM8885X=102
+dram_temperature_threshold_stop_traffic.BCM8885X=94
+dram_temperature_monitor_enable.BCM8885X=1
+fabric_connect_mode.BCM8885X=MESH
+fabric_mesh_multicast_enable=1
+fabric_num_pipes=2
+fabric_pipe_map_uc=0
+fabric_pipe_map_mc=1
+system_contains_multiple_pipe_device=1
+ftmh_stacking_extension_size=0
+j2_ftmh_lb_key_extension_size=3
+j_ftmh_lb_key_extension_size=0
+
+
+lane_to_serdes_map_fabric_lane0.BCM8885X=rx0:tx0
+lane_to_serdes_map_fabric_lane1.BCM8885X=rx1:tx1
+lane_to_serdes_map_fabric_lane2.BCM8885X=rx2:tx2
+lane_to_serdes_map_fabric_lane3.BCM8885X=rx3:tx3
+lane_to_serdes_map_fabric_lane4.BCM8885X=rx4:tx4
+lane_to_serdes_map_fabric_lane5.BCM8885X=rx5:tx5
+lane_to_serdes_map_fabric_lane6.BCM8885X=rx6:tx6
+lane_to_serdes_map_fabric_lane7.BCM8885X=rx7:tx7
+lane_to_serdes_map_fabric_lane8.BCM8885X=rx8:tx11
+lane_to_serdes_map_fabric_lane9.BCM8885X=rx9:tx8
+lane_to_serdes_map_fabric_lane10.BCM8885X=rx10:tx9
+lane_to_serdes_map_fabric_lane11.BCM8885X=rx11:tx10
+lane_to_serdes_map_fabric_lane12.BCM8885X=rx12:tx15
+lane_to_serdes_map_fabric_lane13.BCM8885X=rx13:tx12
+lane_to_serdes_map_fabric_lane14.BCM8885X=rx14:tx14
+lane_to_serdes_map_fabric_lane15.BCM8885X=rx15:tx13
+lane_to_serdes_map_fabric_lane16.BCM8885X=rx16:tx16
+lane_to_serdes_map_fabric_lane17.BCM8885X=rx17:tx17
+lane_to_serdes_map_fabric_lane18.BCM8885X=rx18:tx18
+lane_to_serdes_map_fabric_lane19.BCM8885X=rx19:tx19
+
+lane_to_serdes_map_fabric_lane20.BCM8885X=rx20:tx20
+lane_to_serdes_map_fabric_lane21.BCM8885X=rx21:tx21
+lane_to_serdes_map_fabric_lane22.BCM8885X=rx22:tx22
+lane_to_serdes_map_fabric_lane23.BCM8885X=rx23:tx23
+lane_to_serdes_map_fabric_lane24.BCM8885X=rx24:tx24
+lane_to_serdes_map_fabric_lane25.BCM8885X=rx25:tx26
+lane_to_serdes_map_fabric_lane26.BCM8885X=rx26:tx25
+lane_to_serdes_map_fabric_lane27.BCM8885X=rx27:tx27
+
+lane_to_serdes_map_fabric_lane28.BCM8885X=rx28:tx28
+lane_to_serdes_map_fabric_lane29.BCM8885X=rx29:tx29
+lane_to_serdes_map_fabric_lane30.BCM8885X=rx30:tx30
+lane_to_serdes_map_fabric_lane31.BCM8885X=rx31:tx31
+lane_to_serdes_map_fabric_lane32.BCM8885X=rx32:tx32
+lane_to_serdes_map_fabric_lane33.BCM8885X=rx33:tx33
+lane_to_serdes_map_fabric_lane34.BCM8885X=rx34:tx34
+lane_to_serdes_map_fabric_lane35.BCM8885X=rx35:tx35
+
+lane_to_serdes_map_fabric_lane36.BCM8885X=rx36:tx36
+lane_to_serdes_map_fabric_lane37.BCM8885X=rx37:tx37
+lane_to_serdes_map_fabric_lane38.BCM8885X=rx38:tx38
+lane_to_serdes_map_fabric_lane39.BCM8885X=rx39:tx39
+lane_to_serdes_map_fabric_lane40.BCM8885X=rx40:tx40
+lane_to_serdes_map_fabric_lane41.BCM8885X=rx41:tx41
+lane_to_serdes_map_fabric_lane42.BCM8885X=rx42:tx42
+lane_to_serdes_map_fabric_lane43.BCM8885X=rx43:tx43
+lane_to_serdes_map_fabric_lane44.BCM8885X=rx44:tx44
+lane_to_serdes_map_fabric_lane45.BCM8885X=rx45:tx45
+lane_to_serdes_map_fabric_lane46.BCM8885X=rx46:tx46
+lane_to_serdes_map_fabric_lane47.BCM8885X=rx47:tx47
+lane_to_serdes_map_fabric_lane48.BCM8885X=rx48:tx48
+lane_to_serdes_map_fabric_lane49.BCM8885X=rx49:tx49
+lane_to_serdes_map_fabric_lane50.BCM8885X=rx50:tx50
+lane_to_serdes_map_fabric_lane51.BCM8885X=rx51:tx51
+
+lane_to_serdes_map_fabric_lane52.BCM8885X=rx52:tx52
+lane_to_serdes_map_fabric_lane53.BCM8885X=rx53:tx53
+lane_to_serdes_map_fabric_lane54.BCM8885X=rx54:tx54
+lane_to_serdes_map_fabric_lane55.BCM8885X=rx55:tx55
+lane_to_serdes_map_fabric_lane56.BCM8885X=rx56:tx56
+lane_to_serdes_map_fabric_lane57.BCM8885X=rx57:tx57
+lane_to_serdes_map_fabric_lane58.BCM8885X=rx58:tx58
+lane_to_serdes_map_fabric_lane59.BCM8885X=rx59:tx59
+lane_to_serdes_map_fabric_lane60.BCM8885X=rx60:tx60
+lane_to_serdes_map_fabric_lane61.BCM8885X=rx61:tx61
+lane_to_serdes_map_fabric_lane62.BCM8885X=rx62:tx62
+lane_to_serdes_map_fabric_lane63.BCM8885X=rx63:tx63
+lane_to_serdes_map_fabric_lane64.BCM8885X=rx64:tx64
+lane_to_serdes_map_fabric_lane65.BCM8885X=rx65:tx65
+lane_to_serdes_map_fabric_lane66.BCM8885X=rx66:tx66
+lane_to_serdes_map_fabric_lane67.BCM8885X=rx67:tx67
+
+lane_to_serdes_map_fabric_lane68.BCM8885X=rx68:tx68
+lane_to_serdes_map_fabric_lane69.BCM8885X=rx69:tx69
+lane_to_serdes_map_fabric_lane70.BCM8885X=rx70:tx70
+lane_to_serdes_map_fabric_lane71.BCM8885X=rx71:tx71
+lane_to_serdes_map_fabric_lane72.BCM8885X=rx72:tx72
+lane_to_serdes_map_fabric_lane73.BCM8885X=rx73:tx73
+lane_to_serdes_map_fabric_lane74.BCM8885X=rx74:tx74
+lane_to_serdes_map_fabric_lane75.BCM8885X=rx75:tx75
+lane_to_serdes_map_fabric_lane76.BCM8885X=rx76:tx76
+lane_to_serdes_map_fabric_lane77.BCM8885X=rx77:tx77
+lane_to_serdes_map_fabric_lane78.BCM8885X=rx78:tx78
+lane_to_serdes_map_fabric_lane79.BCM8885X=rx79:tx79
+lane_to_serdes_map_fabric_lane80.BCM8885X=rx80:tx80
+lane_to_serdes_map_fabric_lane81.BCM8885X=rx81:tx81
+lane_to_serdes_map_fabric_lane82.BCM8885X=rx82:tx82
+lane_to_serdes_map_fabric_lane83.BCM8885X=rx83:tx83
+
+lane_to_serdes_map_fabric_lane84.BCM8885X=rx84:tx84
+lane_to_serdes_map_fabric_lane85.BCM8885X=rx85:tx85
+lane_to_serdes_map_fabric_lane86.BCM8885X=rx86:tx86
+lane_to_serdes_map_fabric_lane87.BCM8885X=rx87:tx87
+
+lane_to_serdes_map_fabric_lane88.BCM8885X=rx88:tx88
+lane_to_serdes_map_fabric_lane89.BCM8885X=rx89:tx89
+lane_to_serdes_map_fabric_lane90.BCM8885X=rx90:tx90
+lane_to_serdes_map_fabric_lane91.BCM8885X=rx91:tx91
+lane_to_serdes_map_fabric_lane92.BCM8885X=rx92:tx92
+lane_to_serdes_map_fabric_lane93.BCM8885X=rx93:tx93
+lane_to_serdes_map_fabric_lane94.BCM8885X=rx94:tx94
+lane_to_serdes_map_fabric_lane95.BCM8885X=rx95:tx95
+
+lane_to_serdes_map_fabric_lane96.BCM8885X=rx96:tx96
+lane_to_serdes_map_fabric_lane97.BCM8885X=rx97:tx97
+lane_to_serdes_map_fabric_lane98.BCM8885X=rx98:tx98
+lane_to_serdes_map_fabric_lane99.BCM8885X=rx99:tx99
+
+lane_to_serdes_map_fabric_lane100.BCM8885X=rx100:tx100
+lane_to_serdes_map_fabric_lane101.BCM8885X=rx101:tx101
+lane_to_serdes_map_fabric_lane102.BCM8885X=rx102:tx102
+lane_to_serdes_map_fabric_lane103.BCM8885X=rx103:tx103
+lane_to_serdes_map_fabric_lane104.BCM8885X=rx104:tx107
+lane_to_serdes_map_fabric_lane105.BCM8885X=rx105:tx104
+lane_to_serdes_map_fabric_lane106.BCM8885X=rx106:tx106
+lane_to_serdes_map_fabric_lane107.BCM8885X=rx107:tx105
+lane_to_serdes_map_fabric_lane108.BCM8885X=rx108:tx111
+lane_to_serdes_map_fabric_lane109.BCM8885X=rx109:tx108
+lane_to_serdes_map_fabric_lane110.BCM8885X=rx110:tx109
+lane_to_serdes_map_fabric_lane111.BCM8885X=rx111:tx110
+lane_to_serdes_map_fabric_lane112.BCM8885X=rx112:tx112
+lane_to_serdes_map_fabric_lane113.BCM8885X=rx113:tx113
+lane_to_serdes_map_fabric_lane114.BCM8885X=rx114:tx114
+lane_to_serdes_map_fabric_lane115.BCM8885X=rx115:tx115
+
+lane_to_serdes_map_fabric_lane116.BCM8885X=rx116:tx116
+lane_to_serdes_map_fabric_lane117.BCM8885X=rx117:tx117
+lane_to_serdes_map_fabric_lane118.BCM8885X=rx118:tx118
+lane_to_serdes_map_fabric_lane119.BCM8885X=rx119:tx119
+
+lane_to_serdes_map_fabric_lane120.BCM8885X=rx120:tx120
+lane_to_serdes_map_fabric_lane121.BCM8885X=rx121:tx121
+lane_to_serdes_map_fabric_lane122.BCM8885X=rx122:tx122
+lane_to_serdes_map_fabric_lane123.BCM8885X=rx123:tx123
+
+lane_to_serdes_map_fabric_lane124.BCM8885X=rx124:tx124
+lane_to_serdes_map_fabric_lane125.BCM8885X=rx125:tx125
+lane_to_serdes_map_fabric_lane126.BCM8885X=rx126:tx126
+lane_to_serdes_map_fabric_lane127.BCM8885X=rx127:tx127
+
+lane_to_serdes_map_fabric_lane128.BCM8885X=rx128:tx128
+lane_to_serdes_map_fabric_lane129.BCM8885X=rx129:tx129
+lane_to_serdes_map_fabric_lane130.BCM8885X=rx130:tx130
+lane_to_serdes_map_fabric_lane131.BCM8885X=rx131:tx131
+
+lane_to_serdes_map_fabric_lane132.BCM8885X=rx132:tx132
+lane_to_serdes_map_fabric_lane133.BCM8885X=rx133:tx133
+lane_to_serdes_map_fabric_lane134.BCM8885X=rx134:tx134
+lane_to_serdes_map_fabric_lane135.BCM8885X=rx135:tx135
+lane_to_serdes_map_fabric_lane136.BCM8885X=rx136:tx136
+lane_to_serdes_map_fabric_lane137.BCM8885X=rx137:tx137
+lane_to_serdes_map_fabric_lane138.BCM8885X=rx138:tx138
+lane_to_serdes_map_fabric_lane139.BCM8885X=rx139:tx139
+lane_to_serdes_map_fabric_lane140.BCM8885X=rx140:tx140
+lane_to_serdes_map_fabric_lane141.BCM8885X=rx141:tx141
+lane_to_serdes_map_fabric_lane142.BCM8885X=rx142:tx142
+lane_to_serdes_map_fabric_lane143.BCM8885X=rx143:tx143
+lane_to_serdes_map_fabric_lane144.BCM8885X=rx144:tx144
+lane_to_serdes_map_fabric_lane145.BCM8885X=rx145:tx145
+lane_to_serdes_map_fabric_lane146.BCM8885X=rx146:tx146
+lane_to_serdes_map_fabric_lane147.BCM8885X=rx147:tx147
+
+lane_to_serdes_map_fabric_lane148.BCM8885X=rx148:tx148
+lane_to_serdes_map_fabric_lane149.BCM8885X=rx149:tx149
+lane_to_serdes_map_fabric_lane150.BCM8885X=rx150:tx150
+lane_to_serdes_map_fabric_lane151.BCM8885X=rx151:tx151
+lane_to_serdes_map_fabric_lane152.BCM8885X=rx152:tx152
+lane_to_serdes_map_fabric_lane153.BCM8885X=rx153:tx153
+lane_to_serdes_map_fabric_lane154.BCM8885X=rx154:tx154
+lane_to_serdes_map_fabric_lane155.BCM8885X=rx155:tx155
+lane_to_serdes_map_fabric_lane156.BCM8885X=rx156:tx156
+lane_to_serdes_map_fabric_lane157.BCM8885X=rx157:tx157
+lane_to_serdes_map_fabric_lane158.BCM8885X=rx158:tx158
+lane_to_serdes_map_fabric_lane159.BCM8885X=rx159:tx159
+lane_to_serdes_map_fabric_lane160.BCM8885X=rx160:tx160
+lane_to_serdes_map_fabric_lane161.BCM8885X=rx161:tx161
+lane_to_serdes_map_fabric_lane162.BCM8885X=rx162:tx162
+lane_to_serdes_map_fabric_lane163.BCM8885X=rx163:tx163
+
+lane_to_serdes_map_fabric_lane164.BCM8885X=rx164:tx164
+lane_to_serdes_map_fabric_lane165.BCM8885X=rx165:tx165
+lane_to_serdes_map_fabric_lane166.BCM8885X=rx166:tx166
+lane_to_serdes_map_fabric_lane167.BCM8885X=rx167:tx167
+lane_to_serdes_map_fabric_lane168.BCM8885X=rx168:tx168
+lane_to_serdes_map_fabric_lane169.BCM8885X=rx169:tx169
+lane_to_serdes_map_fabric_lane170.BCM8885X=rx170:tx170
+lane_to_serdes_map_fabric_lane171.BCM8885X=rx171:tx171
+lane_to_serdes_map_fabric_lane172.BCM8885X=rx172:tx172
+lane_to_serdes_map_fabric_lane173.BCM8885X=rx173:tx173
+lane_to_serdes_map_fabric_lane174.BCM8885X=rx174:tx174
+lane_to_serdes_map_fabric_lane175.BCM8885X=rx175:tx175
+lane_to_serdes_map_fabric_lane176.BCM8885X=rx176:tx176
+lane_to_serdes_map_fabric_lane177.BCM8885X=rx177:tx177
+lane_to_serdes_map_fabric_lane178.BCM8885X=rx178:tx178
+lane_to_serdes_map_fabric_lane179.BCM8885X=rx179:tx179
+
+lane_to_serdes_map_fabric_lane180.BCM8885X=rx180:tx180
+lane_to_serdes_map_fabric_lane181.BCM8885X=rx181:tx181
+lane_to_serdes_map_fabric_lane182.BCM8885X=rx182:tx182
+lane_to_serdes_map_fabric_lane183.BCM8885X=rx183:tx183
+
+lane_to_serdes_map_fabric_lane184.BCM8885X=rx184:tx184
+lane_to_serdes_map_fabric_lane185.BCM8885X=rx185:tx186
+lane_to_serdes_map_fabric_lane186.BCM8885X=rx186:tx185
+lane_to_serdes_map_fabric_lane187.BCM8885X=rx187:tx187
+
+lane_to_serdes_map_fabric_lane188.BCM8885X=rx188:tx190
+lane_to_serdes_map_fabric_lane189.BCM8885X=rx189:tx188
+lane_to_serdes_map_fabric_lane190.BCM8885X=rx190:tx191
+lane_to_serdes_map_fabric_lane191.BCM8885X=rx191:tx189
+
+
+phy_rx_polarity_flip_fabric0.BCM8885X=1
+phy_rx_polarity_flip_fabric1.BCM8885X=1
+phy_rx_polarity_flip_fabric2.BCM8885X=1
+phy_rx_polarity_flip_fabric3.BCM8885X=1
+phy_rx_polarity_flip_fabric4.BCM8885X=1
+phy_rx_polarity_flip_fabric5.BCM8885X=1
+phy_rx_polarity_flip_fabric6.BCM8885X=1
+phy_rx_polarity_flip_fabric7.BCM8885X=1
+phy_rx_polarity_flip_fabric8.BCM8885X=1
+phy_rx_polarity_flip_fabric9.BCM8885X=0
+phy_rx_polarity_flip_fabric10.BCM8885X=0
+phy_rx_polarity_flip_fabric11.BCM8885X=0
+phy_rx_polarity_flip_fabric12.BCM8885X=0
+phy_rx_polarity_flip_fabric13.BCM8885X=1
+phy_rx_polarity_flip_fabric14.BCM8885X=0
+phy_rx_polarity_flip_fabric15.BCM8885X=0
+phy_rx_polarity_flip_fabric16.BCM8885X=0
+phy_rx_polarity_flip_fabric17.BCM8885X=0
+phy_rx_polarity_flip_fabric18.BCM8885X=0
+phy_rx_polarity_flip_fabric19.BCM8885X=0
+phy_rx_polarity_flip_fabric20.BCM8885X=1
+phy_rx_polarity_flip_fabric21.BCM8885X=0
+phy_rx_polarity_flip_fabric22.BCM8885X=0
+phy_rx_polarity_flip_fabric23.BCM8885X=1
+phy_rx_polarity_flip_fabric24.BCM8885X=0
+phy_rx_polarity_flip_fabric25.BCM8885X=0
+phy_rx_polarity_flip_fabric26.BCM8885X=0
+phy_rx_polarity_flip_fabric27.BCM8885X=0
+phy_rx_polarity_flip_fabric28.BCM8885X=1
+phy_rx_polarity_flip_fabric29.BCM8885X=0
+phy_rx_polarity_flip_fabric30.BCM8885X=0
+phy_rx_polarity_flip_fabric31.BCM8885X=0
+phy_rx_polarity_flip_fabric32.BCM8885X=1
+phy_rx_polarity_flip_fabric33.BCM8885X=1
+phy_rx_polarity_flip_fabric34.BCM8885X=1
+phy_rx_polarity_flip_fabric35.BCM8885X=1
+phy_rx_polarity_flip_fabric36.BCM8885X=1
+phy_rx_polarity_flip_fabric37.BCM8885X=1
+phy_rx_polarity_flip_fabric38.BCM8885X=1
+phy_rx_polarity_flip_fabric39.BCM8885X=1
+phy_rx_polarity_flip_fabric40.BCM8885X=1
+phy_rx_polarity_flip_fabric41.BCM8885X=1
+phy_rx_polarity_flip_fabric42.BCM8885X=1
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+
+
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+lane_to_serdes_map_nif_lane2.BCM8885X=rx2:tx2
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+lane_to_serdes_map_nif_lane5.BCM8885X=rx5:tx5
+lane_to_serdes_map_nif_lane6.BCM8885X=rx6:tx6
+lane_to_serdes_map_nif_lane7.BCM8885X=rx7:tx7
+
+lane_to_serdes_map_nif_lane8.BCM8885X=rx8:tx8
+lane_to_serdes_map_nif_lane9.BCM8885X=rx9:tx9
+lane_to_serdes_map_nif_lane10.BCM8885X=rx10:tx10
+lane_to_serdes_map_nif_lane11.BCM8885X=rx11:tx11
+lane_to_serdes_map_nif_lane12.BCM8885X=rx12:tx12
+lane_to_serdes_map_nif_lane13.BCM8885X=rx13:tx13
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+lane_to_serdes_map_nif_lane15.BCM8885X=rx15:tx15
+
+lane_to_serdes_map_nif_lane16.BCM8885X=rx16:tx16
+lane_to_serdes_map_nif_lane17.BCM8885X=rx17:tx17
+lane_to_serdes_map_nif_lane18.BCM8885X=rx18:tx18
+lane_to_serdes_map_nif_lane19.BCM8885X=rx19:tx19
+lane_to_serdes_map_nif_lane20.BCM8885X=rx20:tx20
+lane_to_serdes_map_nif_lane21.BCM8885X=rx21:tx21
+lane_to_serdes_map_nif_lane22.BCM8885X=rx22:tx22
+lane_to_serdes_map_nif_lane23.BCM8885X=rx23:tx23
+
+lane_to_serdes_map_nif_lane24.BCM8885X=rx24:tx24
+lane_to_serdes_map_nif_lane25.BCM8885X=rx25:tx25
+lane_to_serdes_map_nif_lane26.BCM8885X=rx26:tx26
+lane_to_serdes_map_nif_lane27.BCM8885X=rx27:tx27
+lane_to_serdes_map_nif_lane28.BCM8885X=rx28:tx28
+lane_to_serdes_map_nif_lane29.BCM8885X=rx29:tx29
+lane_to_serdes_map_nif_lane30.BCM8885X=rx30:tx30
+lane_to_serdes_map_nif_lane31.BCM8885X=rx31:tx31
+
+lane_to_serdes_map_nif_lane32.BCM8885X=rx32:tx32
+lane_to_serdes_map_nif_lane33.BCM8885X=rx33:tx33
+lane_to_serdes_map_nif_lane34.BCM8885X=rx34:tx34
+lane_to_serdes_map_nif_lane35.BCM8885X=rx35:tx35
+lane_to_serdes_map_nif_lane36.BCM8885X=rx36:tx36
+lane_to_serdes_map_nif_lane37.BCM8885X=rx37:tx37
+lane_to_serdes_map_nif_lane38.BCM8885X=rx38:tx38
+lane_to_serdes_map_nif_lane39.BCM8885X=rx39:tx39
+
+lane_to_serdes_map_nif_lane40.BCM8885X=rx40:tx40
+lane_to_serdes_map_nif_lane41.BCM8885X=rx41:tx41
+lane_to_serdes_map_nif_lane42.BCM8885X=rx42:tx42
+lane_to_serdes_map_nif_lane43.BCM8885X=rx43:tx43
+lane_to_serdes_map_nif_lane44.BCM8885X=rx44:tx44
+lane_to_serdes_map_nif_lane45.BCM8885X=rx45:tx45
+lane_to_serdes_map_nif_lane46.BCM8885X=rx46:tx46
+lane_to_serdes_map_nif_lane47.BCM8885X=rx47:tx47
+
+lane_to_serdes_map_nif_lane48.BCM8885X=rx48:tx48
+lane_to_serdes_map_nif_lane49.BCM8885X=rx49:tx49
+lane_to_serdes_map_nif_lane50.BCM8885X=rx50:tx50
+lane_to_serdes_map_nif_lane51.BCM8885X=rx51:tx51
+lane_to_serdes_map_nif_lane52.BCM8885X=rx52:tx52
+lane_to_serdes_map_nif_lane53.BCM8885X=rx53:tx53
+lane_to_serdes_map_nif_lane54.BCM8885X=rx54:tx54
+lane_to_serdes_map_nif_lane55.BCM8885X=rx55:tx55
+
+lane_to_serdes_map_nif_lane56.BCM8885X=rx56:tx56
+lane_to_serdes_map_nif_lane57.BCM8885X=rx57:tx57
+lane_to_serdes_map_nif_lane58.BCM8885X=rx58:tx58
+lane_to_serdes_map_nif_lane59.BCM8885X=rx59:tx59
+lane_to_serdes_map_nif_lane60.BCM8885X=rx60:tx60
+lane_to_serdes_map_nif_lane61.BCM8885X=rx61:tx61
+lane_to_serdes_map_nif_lane62.BCM8885X=rx62:tx62
+lane_to_serdes_map_nif_lane63.BCM8885X=rx63:tx63
+
+lane_to_serdes_map_nif_lane64.BCM8885X=rx64:tx64
+lane_to_serdes_map_nif_lane65.BCM8885X=rx65:tx65
+lane_to_serdes_map_nif_lane66.BCM8885X=rx66:tx66
+lane_to_serdes_map_nif_lane67.BCM8885X=rx67:tx67
+lane_to_serdes_map_nif_lane68.BCM8885X=rx68:tx68
+lane_to_serdes_map_nif_lane69.BCM8885X=rx69:tx69
+lane_to_serdes_map_nif_lane70.BCM8885X=rx70:tx70
+lane_to_serdes_map_nif_lane71.BCM8885X=rx71:tx71
+
+lane_to_serdes_map_nif_lane72.BCM8885X=rx72:tx72
+lane_to_serdes_map_nif_lane73.BCM8885X=rx73:tx73
+lane_to_serdes_map_nif_lane74.BCM8885X=rx74:tx74
+lane_to_serdes_map_nif_lane75.BCM8885X=rx75:tx75
+lane_to_serdes_map_nif_lane76.BCM8885X=rx76:tx76
+lane_to_serdes_map_nif_lane77.BCM8885X=rx77:tx77
+lane_to_serdes_map_nif_lane78.BCM8885X=rx78:tx78
+lane_to_serdes_map_nif_lane79.BCM8885X=rx79:tx79
+
+lane_to_serdes_map_nif_lane80.BCM8885X=rx80:tx80
+lane_to_serdes_map_nif_lane81.BCM8885X=rx81:tx81
+lane_to_serdes_map_nif_lane82.BCM8885X=rx82:tx82
+lane_to_serdes_map_nif_lane83.BCM8885X=rx83:tx83
+lane_to_serdes_map_nif_lane84.BCM8885X=rx84:tx84
+lane_to_serdes_map_nif_lane85.BCM8885X=rx85:tx85
+lane_to_serdes_map_nif_lane86.BCM8885X=rx86:tx86
+lane_to_serdes_map_nif_lane87.BCM8885X=rx87:tx87
+
+lane_to_serdes_map_nif_lane88.BCM8885X=rx88:tx88
+lane_to_serdes_map_nif_lane89.BCM8885X=rx89:tx89
+lane_to_serdes_map_nif_lane90.BCM8885X=rx90:tx90
+lane_to_serdes_map_nif_lane91.BCM8885X=rx91:tx91
+lane_to_serdes_map_nif_lane92.BCM8885X=rx92:tx92
+lane_to_serdes_map_nif_lane93.BCM8885X=rx93:tx93
+lane_to_serdes_map_nif_lane94.BCM8885X=rx94:tx94
+lane_to_serdes_map_nif_lane95.BCM8885X=rx95:tx95
+
+lane_to_serdes_map_nif_lane96.BCM8885X=rx96:tx96
+lane_to_serdes_map_nif_lane97.BCM8885X=rx97:tx97
+lane_to_serdes_map_nif_lane98.BCM8885X=rx98:tx98
+lane_to_serdes_map_nif_lane99.BCM8885X=rx99:tx99
+lane_to_serdes_map_nif_lane100.BCM8885X=rx100:tx100
+lane_to_serdes_map_nif_lane101.BCM8885X=rx101:tx101
+lane_to_serdes_map_nif_lane102.BCM8885X=rx102:tx102
+lane_to_serdes_map_nif_lane103.BCM8885X=rx103:tx103
+
+lane_to_serdes_map_nif_lane104.BCM8885X=rx104:tx104
+lane_to_serdes_map_nif_lane105.BCM8885X=rx105:tx105
+lane_to_serdes_map_nif_lane106.BCM8885X=rx106:tx106
+lane_to_serdes_map_nif_lane107.BCM8885X=rx107:tx107
+lane_to_serdes_map_nif_lane108.BCM8885X=rx108:tx108
+lane_to_serdes_map_nif_lane109.BCM8885X=rx109:tx109
+lane_to_serdes_map_nif_lane110.BCM8885X=rx110:tx110
+lane_to_serdes_map_nif_lane111.BCM8885X=rx111:tx111
+
+lane_to_serdes_map_nif_lane112.BCM8885X=rx112:tx112
+lane_to_serdes_map_nif_lane113.BCM8885X=rx113:tx113
+lane_to_serdes_map_nif_lane114.BCM8885X=rx114:tx114
+lane_to_serdes_map_nif_lane115.BCM8885X=rx115:tx115
+lane_to_serdes_map_nif_lane116.BCM8885X=rx116:tx116
+lane_to_serdes_map_nif_lane117.BCM8885X=rx117:tx117
+lane_to_serdes_map_nif_lane118.BCM8885X=rx118:tx118
+lane_to_serdes_map_nif_lane119.BCM8885X=rx119:tx119
+
+lane_to_serdes_map_nif_lane120.BCM8885X=rx120:tx120
+lane_to_serdes_map_nif_lane121.BCM8885X=rx121:tx121
+lane_to_serdes_map_nif_lane122.BCM8885X=rx122:tx122
+lane_to_serdes_map_nif_lane123.BCM8885X=rx123:tx123
+lane_to_serdes_map_nif_lane124.BCM8885X=rx124:tx124
+lane_to_serdes_map_nif_lane125.BCM8885X=rx125:tx125
+lane_to_serdes_map_nif_lane126.BCM8885X=rx126:tx126
+lane_to_serdes_map_nif_lane127.BCM8885X=rx127:tx127
+
+lane_to_serdes_map_nif_lane128.BCM8885X=rx128:tx128
+lane_to_serdes_map_nif_lane129.BCM8885X=rx129:tx129
+lane_to_serdes_map_nif_lane130.BCM8885X=rx130:tx130
+lane_to_serdes_map_nif_lane131.BCM8885X=rx131:tx131
+lane_to_serdes_map_nif_lane132.BCM8885X=rx132:tx132
+lane_to_serdes_map_nif_lane133.BCM8885X=rx133:tx133
+lane_to_serdes_map_nif_lane134.BCM8885X=rx134:tx134
+lane_to_serdes_map_nif_lane135.BCM8885X=rx135:tx135
+
+lane_to_serdes_map_nif_lane136.BCM8885X=rx136:tx136
+lane_to_serdes_map_nif_lane137.BCM8885X=rx137:tx137
+lane_to_serdes_map_nif_lane138.BCM8885X=rx138:tx138
+lane_to_serdes_map_nif_lane139.BCM8885X=rx139:tx139
+lane_to_serdes_map_nif_lane140.BCM8885X=rx140:tx140
+lane_to_serdes_map_nif_lane141.BCM8885X=rx141:tx141
+lane_to_serdes_map_nif_lane142.BCM8885X=rx142:tx142
+lane_to_serdes_map_nif_lane143.BCM8885X=rx143:tx143
+
+
+mdb_profile=Balanced-Exem
+mdb_profile_kaps_cfg.BCM8885X=2
+mdio_output_delay=16
+mem_cache_enable_ecc.BCM8885X=1
+mem_cache_enable_parity.BCM8885X=1
+miim_intr_enable.BCM8885X=0
+os=unix
+outlif_logical_to_physical_phase_map_1=S1
+outlif_logical_to_physical_phase_map_2=L1
+outlif_logical_to_physical_phase_map_3=XL
+outlif_logical_to_physical_phase_map_4=L2
+outlif_logical_to_physical_phase_map_5=M1
+outlif_logical_to_physical_phase_map_6=M2
+outlif_logical_to_physical_phase_map_7=M3
+outlif_logical_to_physical_phase_map_8=S2
+outlif_physical_phase_data_granularity_L1=60
+outlif_physical_phase_data_granularity_L2=60
+outlif_physical_phase_data_granularity_M1=60
+outlif_physical_phase_data_granularity_M2=60
+outlif_physical_phase_data_granularity_M3=60
+outlif_physical_phase_data_granularity_S1=60
+outlif_physical_phase_data_granularity_S2=60
+outlif_physical_phase_data_granularity_XL=60
+pdma_continuous_mode_enable.BCM8885X=1
+
+
+phy_rx_polarity_flip_phy0.BCM8885X=0
+phy_rx_polarity_flip_phy1.BCM8885X=0
+phy_rx_polarity_flip_phy2.BCM8885X=1
+phy_rx_polarity_flip_phy3.BCM8885X=0
+phy_rx_polarity_flip_phy4.BCM8885X=0
+phy_rx_polarity_flip_phy5.BCM8885X=0
+phy_rx_polarity_flip_phy6.BCM8885X=1
+phy_rx_polarity_flip_phy7.BCM8885X=0
+
+phy_rx_polarity_flip_phy8.BCM8885X=0
+phy_rx_polarity_flip_phy9.BCM8885X=1
+phy_rx_polarity_flip_phy10.BCM8885X=1
+phy_rx_polarity_flip_phy11.BCM8885X=1
+phy_rx_polarity_flip_phy12.BCM8885X=1
+phy_rx_polarity_flip_phy13.BCM8885X=0
+phy_rx_polarity_flip_phy14.BCM8885X=0
+phy_rx_polarity_flip_phy15.BCM8885X=1
+
+phy_rx_polarity_flip_phy16.BCM8885X=1
+phy_rx_polarity_flip_phy17.BCM8885X=0
+phy_rx_polarity_flip_phy18.BCM8885X=1
+phy_rx_polarity_flip_phy19.BCM8885X=0
+phy_rx_polarity_flip_phy20.BCM8885X=1
+phy_rx_polarity_flip_phy21.BCM8885X=1
+phy_rx_polarity_flip_phy22.BCM8885X=1
+phy_rx_polarity_flip_phy23.BCM8885X=1
+
+phy_rx_polarity_flip_phy24.BCM8885X=0
+phy_rx_polarity_flip_phy25.BCM8885X=1
+phy_rx_polarity_flip_phy26.BCM8885X=0
+phy_rx_polarity_flip_phy27.BCM8885X=1
+phy_rx_polarity_flip_phy28.BCM8885X=1
+phy_rx_polarity_flip_phy29.BCM8885X=1
+phy_rx_polarity_flip_phy30.BCM8885X=0
+phy_rx_polarity_flip_phy31.BCM8885X=1
+
+phy_rx_polarity_flip_phy32.BCM8885X=1
+phy_rx_polarity_flip_phy33.BCM8885X=0
+phy_rx_polarity_flip_phy34.BCM8885X=1
+phy_rx_polarity_flip_phy35.BCM8885X=0
+phy_rx_polarity_flip_phy36.BCM8885X=0
+phy_rx_polarity_flip_phy37.BCM8885X=0
+phy_rx_polarity_flip_phy38.BCM8885X=0
+phy_rx_polarity_flip_phy39.BCM8885X=1
+
+phy_rx_polarity_flip_phy40.BCM8885X=1
+phy_rx_polarity_flip_phy41.BCM8885X=1
+phy_rx_polarity_flip_phy42.BCM8885X=0
+phy_rx_polarity_flip_phy43.BCM8885X=1
+phy_rx_polarity_flip_phy44.BCM8885X=1
+phy_rx_polarity_flip_phy45.BCM8885X=0
+phy_rx_polarity_flip_phy46.BCM8885X=0
+phy_rx_polarity_flip_phy47.BCM8885X=1
+
+phy_rx_polarity_flip_phy48.BCM8885X=0
+phy_rx_polarity_flip_phy49.BCM8885X=1
+phy_rx_polarity_flip_phy50.BCM8885X=0
+phy_rx_polarity_flip_phy51.BCM8885X=0
+phy_rx_polarity_flip_phy52.BCM8885X=0
+phy_rx_polarity_flip_phy53.BCM8885X=1
+phy_rx_polarity_flip_phy54.BCM8885X=0
+phy_rx_polarity_flip_phy55.BCM8885X=0
+
+phy_rx_polarity_flip_phy56.BCM8885X=0
+phy_rx_polarity_flip_phy57.BCM8885X=0
+phy_rx_polarity_flip_phy58.BCM8885X=0
+phy_rx_polarity_flip_phy59.BCM8885X=0
+phy_rx_polarity_flip_phy60.BCM8885X=0
+phy_rx_polarity_flip_phy61.BCM8885X=0
+phy_rx_polarity_flip_phy62.BCM8885X=1
+phy_rx_polarity_flip_phy63.BCM8885X=1
+
+phy_rx_polarity_flip_phy64.BCM8885X=0
+phy_rx_polarity_flip_phy65.BCM8885X=0
+phy_rx_polarity_flip_phy66.BCM8885X=0
+phy_rx_polarity_flip_phy67.BCM8885X=0
+phy_rx_polarity_flip_phy68.BCM8885X=0
+phy_rx_polarity_flip_phy69.BCM8885X=0
+phy_rx_polarity_flip_phy70.BCM8885X=0
+phy_rx_polarity_flip_phy71.BCM8885X=0
+
+phy_rx_polarity_flip_phy72.BCM8885X=1
+phy_rx_polarity_flip_phy73.BCM8885X=0
+phy_rx_polarity_flip_phy74.BCM8885X=0
+phy_rx_polarity_flip_phy75.BCM8885X=1
+phy_rx_polarity_flip_phy76.BCM8885X=1
+phy_rx_polarity_flip_phy77.BCM8885X=1
+phy_rx_polarity_flip_phy78.BCM8885X=0
+phy_rx_polarity_flip_phy79.BCM8885X=1
+
+phy_rx_polarity_flip_phy80.BCM8885X=1
+phy_rx_polarity_flip_phy81.BCM8885X=0
+phy_rx_polarity_flip_phy82.BCM8885X=1
+phy_rx_polarity_flip_phy83.BCM8885X=1
+phy_rx_polarity_flip_phy84.BCM8885X=0
+phy_rx_polarity_flip_phy85.BCM8885X=0
+phy_rx_polarity_flip_phy86.BCM8885X=1
+phy_rx_polarity_flip_phy87.BCM8885X=1
+
+phy_rx_polarity_flip_phy88.BCM8885X=0
+phy_rx_polarity_flip_phy89.BCM8885X=1
+phy_rx_polarity_flip_phy90.BCM8885X=0
+phy_rx_polarity_flip_phy91.BCM8885X=0
+phy_rx_polarity_flip_phy92.BCM8885X=0
+phy_rx_polarity_flip_phy93.BCM8885X=0
+phy_rx_polarity_flip_phy94.BCM8885X=0
+phy_rx_polarity_flip_phy95.BCM8885X=1
+
+phy_rx_polarity_flip_phy96.BCM8885X=0
+phy_rx_polarity_flip_phy97.BCM8885X=0
+phy_rx_polarity_flip_phy98.BCM8885X=0
+phy_rx_polarity_flip_phy99.BCM8885X=0
+phy_rx_polarity_flip_phy100.BCM8885X=0
+phy_rx_polarity_flip_phy101.BCM8885X=1
+phy_rx_polarity_flip_phy102.BCM8885X=1
+phy_rx_polarity_flip_phy103.BCM8885X=0
+
+phy_rx_polarity_flip_phy104.BCM8885X=1
+phy_rx_polarity_flip_phy105.BCM8885X=1
+phy_rx_polarity_flip_phy106.BCM8885X=1
+phy_rx_polarity_flip_phy107.BCM8885X=1
+phy_rx_polarity_flip_phy108.BCM8885X=0
+phy_rx_polarity_flip_phy109.BCM8885X=1
+phy_rx_polarity_flip_phy110.BCM8885X=1
+phy_rx_polarity_flip_phy111.BCM8885X=1
+
+phy_rx_polarity_flip_phy112.BCM8885X=0
+phy_rx_polarity_flip_phy113.BCM8885X=1
+phy_rx_polarity_flip_phy114.BCM8885X=1
+phy_rx_polarity_flip_phy115.BCM8885X=1
+phy_rx_polarity_flip_phy116.BCM8885X=1
+phy_rx_polarity_flip_phy117.BCM8885X=1
+phy_rx_polarity_flip_phy118.BCM8885X=0
+phy_rx_polarity_flip_phy119.BCM8885X=0
+
+phy_rx_polarity_flip_phy120.BCM8885X=1
+phy_rx_polarity_flip_phy121.BCM8885X=0
+phy_rx_polarity_flip_phy122.BCM8885X=0
+phy_rx_polarity_flip_phy123.BCM8885X=1
+phy_rx_polarity_flip_phy124.BCM8885X=0
+phy_rx_polarity_flip_phy125.BCM8885X=1
+phy_rx_polarity_flip_phy126.BCM8885X=1
+phy_rx_polarity_flip_phy127.BCM8885X=0
+
+phy_rx_polarity_flip_phy128.BCM8885X=0
+phy_rx_polarity_flip_phy129.BCM8885X=0
+phy_rx_polarity_flip_phy130.BCM8885X=1
+phy_rx_polarity_flip_phy131.BCM8885X=0
+phy_rx_polarity_flip_phy132.BCM8885X=0
+phy_rx_polarity_flip_phy133.BCM8885X=1
+phy_rx_polarity_flip_phy134.BCM8885X=1
+phy_rx_polarity_flip_phy135.BCM8885X=0
+
+phy_rx_polarity_flip_phy136.BCM8885X=1
+phy_rx_polarity_flip_phy137.BCM8885X=0
+phy_rx_polarity_flip_phy138.BCM8885X=0
+phy_rx_polarity_flip_phy139.BCM8885X=1
+phy_rx_polarity_flip_phy140.BCM8885X=1
+phy_rx_polarity_flip_phy141.BCM8885X=1
+phy_rx_polarity_flip_phy142.BCM8885X=0
+phy_rx_polarity_flip_phy143.BCM8885X=1
+
+
+phy_tx_polarity_flip_phy0.BCM8885X=1
+phy_tx_polarity_flip_phy1.BCM8885X=0
+phy_tx_polarity_flip_phy2.BCM8885X=0
+phy_tx_polarity_flip_phy3.BCM8885X=0
+phy_tx_polarity_flip_phy4.BCM8885X=1
+phy_tx_polarity_flip_phy5.BCM8885X=0
+phy_tx_polarity_flip_phy6.BCM8885X=0
+phy_tx_polarity_flip_phy7.BCM8885X=1
+
+phy_tx_polarity_flip_phy8.BCM8885X=0
+phy_tx_polarity_flip_phy9.BCM8885X=1
+phy_tx_polarity_flip_phy10.BCM8885X=0
+phy_tx_polarity_flip_phy11.BCM8885X=1
+phy_tx_polarity_flip_phy12.BCM8885X=1
+phy_tx_polarity_flip_phy13.BCM8885X=1
+phy_tx_polarity_flip_phy14.BCM8885X=0
+phy_tx_polarity_flip_phy15.BCM8885X=1
+
+phy_tx_polarity_flip_phy16.BCM8885X=1
+phy_tx_polarity_flip_phy17.BCM8885X=1
+phy_tx_polarity_flip_phy18.BCM8885X=0
+phy_tx_polarity_flip_phy19.BCM8885X=0
+phy_tx_polarity_flip_phy20.BCM8885X=1
+phy_tx_polarity_flip_phy21.BCM8885X=1
+phy_tx_polarity_flip_phy22.BCM8885X=0
+phy_tx_polarity_flip_phy23.BCM8885X=0
+
+phy_tx_polarity_flip_phy24.BCM8885X=0
+phy_tx_polarity_flip_phy25.BCM8885X=0
+phy_tx_polarity_flip_phy26.BCM8885X=0
+phy_tx_polarity_flip_phy27.BCM8885X=1
+phy_tx_polarity_flip_phy28.BCM8885X=0
+phy_tx_polarity_flip_phy29.BCM8885X=0
+phy_tx_polarity_flip_phy30.BCM8885X=0
+phy_tx_polarity_flip_phy31.BCM8885X=0
+
+phy_tx_polarity_flip_phy32.BCM8885X=1
+phy_tx_polarity_flip_phy33.BCM8885X=1
+phy_tx_polarity_flip_phy34.BCM8885X=1
+phy_tx_polarity_flip_phy35.BCM8885X=0
+phy_tx_polarity_flip_phy36.BCM8885X=1
+phy_tx_polarity_flip_phy37.BCM8885X=1
+phy_tx_polarity_flip_phy38.BCM8885X=1
+phy_tx_polarity_flip_phy39.BCM8885X=0
+
+phy_tx_polarity_flip_phy40.BCM8885X=0
+phy_tx_polarity_flip_phy41.BCM8885X=0
+phy_tx_polarity_flip_phy42.BCM8885X=1
+phy_tx_polarity_flip_phy43.BCM8885X=1
+phy_tx_polarity_flip_phy44.BCM8885X=0
+phy_tx_polarity_flip_phy45.BCM8885X=0
+phy_tx_polarity_flip_phy46.BCM8885X=1
+phy_tx_polarity_flip_phy47.BCM8885X=0
+
+phy_tx_polarity_flip_phy48.BCM8885X=1
+phy_tx_polarity_flip_phy49.BCM8885X=1
+phy_tx_polarity_flip_phy50.BCM8885X=1
+phy_tx_polarity_flip_phy51.BCM8885X=0
+phy_tx_polarity_flip_phy52.BCM8885X=1
+phy_tx_polarity_flip_phy53.BCM8885X=0
+phy_tx_polarity_flip_phy54.BCM8885X=0
+phy_tx_polarity_flip_phy55.BCM8885X=0
+
+phy_tx_polarity_flip_phy56.BCM8885X=0
+phy_tx_polarity_flip_phy57.BCM8885X=1
+phy_tx_polarity_flip_phy58.BCM8885X=0
+phy_tx_polarity_flip_phy59.BCM8885X=0
+phy_tx_polarity_flip_phy60.BCM8885X=0
+phy_tx_polarity_flip_phy61.BCM8885X=0
+phy_tx_polarity_flip_phy62.BCM8885X=0
+phy_tx_polarity_flip_phy63.BCM8885X=0
+
+phy_tx_polarity_flip_phy64.BCM8885X=0
+phy_tx_polarity_flip_phy65.BCM8885X=1
+phy_tx_polarity_flip_phy66.BCM8885X=1
+phy_tx_polarity_flip_phy67.BCM8885X=0
+phy_tx_polarity_flip_phy68.BCM8885X=1
+phy_tx_polarity_flip_phy69.BCM8885X=0
+phy_tx_polarity_flip_phy70.BCM8885X=0
+phy_tx_polarity_flip_phy71.BCM8885X=1
+
+phy_tx_polarity_flip_phy72.BCM8885X=1
+phy_tx_polarity_flip_phy73.BCM8885X=1
+phy_tx_polarity_flip_phy74.BCM8885X=0
+phy_tx_polarity_flip_phy75.BCM8885X=1
+phy_tx_polarity_flip_phy76.BCM8885X=1
+phy_tx_polarity_flip_phy77.BCM8885X=0
+phy_tx_polarity_flip_phy78.BCM8885X=0
+phy_tx_polarity_flip_phy79.BCM8885X=1
+
+phy_tx_polarity_flip_phy80.BCM8885X=1
+phy_tx_polarity_flip_phy81.BCM8885X=0
+phy_tx_polarity_flip_phy82.BCM8885X=0
+phy_tx_polarity_flip_phy83.BCM8885X=0
+phy_tx_polarity_flip_phy84.BCM8885X=0
+phy_tx_polarity_flip_phy85.BCM8885X=0
+phy_tx_polarity_flip_phy86.BCM8885X=1
+phy_tx_polarity_flip_phy87.BCM8885X=0
+
+phy_tx_polarity_flip_phy88.BCM8885X=1
+phy_tx_polarity_flip_phy89.BCM8885X=0
+phy_tx_polarity_flip_phy90.BCM8885X=1
+phy_tx_polarity_flip_phy91.BCM8885X=1
+phy_tx_polarity_flip_phy92.BCM8885X=1
+phy_tx_polarity_flip_phy93.BCM8885X=0
+phy_tx_polarity_flip_phy94.BCM8885X=1
+phy_tx_polarity_flip_phy95.BCM8885X=1
+
+phy_tx_polarity_flip_phy96.BCM8885X=1
+phy_tx_polarity_flip_phy97.BCM8885X=1
+phy_tx_polarity_flip_phy98.BCM8885X=1
+phy_tx_polarity_flip_phy99.BCM8885X=0
+phy_tx_polarity_flip_phy100.BCM8885X=1
+phy_tx_polarity_flip_phy101.BCM8885X=1
+phy_tx_polarity_flip_phy102.BCM8885X=1
+phy_tx_polarity_flip_phy103.BCM8885X=0
+
+phy_tx_polarity_flip_phy104.BCM8885X=0
+phy_tx_polarity_flip_phy105.BCM8885X=0
+phy_tx_polarity_flip_phy106.BCM8885X=0
+phy_tx_polarity_flip_phy107.BCM8885X=1
+phy_tx_polarity_flip_phy108.BCM8885X=1
+phy_tx_polarity_flip_phy109.BCM8885X=0
+phy_tx_polarity_flip_phy110.BCM8885X=1
+phy_tx_polarity_flip_phy111.BCM8885X=0
+
+phy_tx_polarity_flip_phy112.BCM8885X=0
+phy_tx_polarity_flip_phy113.BCM8885X=1
+phy_tx_polarity_flip_phy114.BCM8885X=1
+phy_tx_polarity_flip_phy115.BCM8885X=0
+phy_tx_polarity_flip_phy116.BCM8885X=0
+phy_tx_polarity_flip_phy117.BCM8885X=1
+phy_tx_polarity_flip_phy118.BCM8885X=0
+phy_tx_polarity_flip_phy119.BCM8885X=0
+
+phy_tx_polarity_flip_phy120.BCM8885X=0
+phy_tx_polarity_flip_phy121.BCM8885X=1
+phy_tx_polarity_flip_phy122.BCM8885X=1
+phy_tx_polarity_flip_phy123.BCM8885X=0
+phy_tx_polarity_flip_phy124.BCM8885X=0
+phy_tx_polarity_flip_phy125.BCM8885X=0
+phy_tx_polarity_flip_phy126.BCM8885X=1
+phy_tx_polarity_flip_phy127.BCM8885X=0
+
+phy_tx_polarity_flip_phy128.BCM8885X=1
+phy_tx_polarity_flip_phy129.BCM8885X=1
+phy_tx_polarity_flip_phy130.BCM8885X=0
+phy_tx_polarity_flip_phy131.BCM8885X=0
+phy_tx_polarity_flip_phy132.BCM8885X=0
+phy_tx_polarity_flip_phy133.BCM8885X=1
+phy_tx_polarity_flip_phy134.BCM8885X=0
+phy_tx_polarity_flip_phy135.BCM8885X=0
+
+phy_tx_polarity_flip_phy136.BCM8885X=0
+phy_tx_polarity_flip_phy137.BCM8885X=0
+phy_tx_polarity_flip_phy138.BCM8885X=0
+phy_tx_polarity_flip_phy139.BCM8885X=0
+phy_tx_polarity_flip_phy140.BCM8885X=0
+phy_tx_polarity_flip_phy141.BCM8885X=0
+phy_tx_polarity_flip_phy142.BCM8885X=0
+phy_tx_polarity_flip_phy143.BCM8885X=0
+
+
+polled_irq_delay.BCM8885X=5
+polled_irq_mode.BCM8885X=0
+port_fec_fabric.BCM8885X=7
+bcm_stat_interval.BCM8885X=1000000
+
+
+port_init_cl72_1=0
+port_init_cl72_2=0
+port_init_cl72_3=0
+port_init_cl72_4=0
+port_init_cl72_5=0
+port_init_cl72_6=0
+port_init_cl72_7=0
+port_init_cl72_8=0
+port_init_cl72_9=0
+port_init_cl72_10=0
+port_init_cl72_11=0
+port_init_cl72_12=0
+port_init_cl72_13=0
+port_init_cl72_14=0
+port_init_cl72_15=0
+port_init_cl72_16=0
+port_init_cl72_17=0
+port_init_cl72_18=0
+
+# Set to 1 to enable link training
+port_init_cl72_256=1
+port_init_cl72_257=1
+port_init_cl72_258=1
+port_init_cl72_259=1
+port_init_cl72_260=1
+port_init_cl72_261=1
+port_init_cl72_262=1
+port_init_cl72_263=1
+port_init_cl72_264=1
+#265 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_265=0
+#266 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_266=0
+#267 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_267=0
+#268 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_268=0
+port_init_cl72_269=1
+#270 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_270=0
+#271 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_271=0
+port_init_cl72_272=1
+port_init_cl72_273=1
+port_init_cl72_274=1
+port_init_cl72_275=1
+port_init_cl72_276=1
+port_init_cl72_277=1
+port_init_cl72_278=1
+port_init_cl72_279=1
+port_init_cl72_280=1
+port_init_cl72_281=1
+#282 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_282=0
+port_init_cl72_283=1
+port_init_cl72_284=1
+port_init_cl72_285=1
+port_init_cl72_286=1
+port_init_cl72_287=1
+port_init_cl72_288=1
+port_init_cl72_289=1
+port_init_cl72_290=1
+port_init_cl72_291=1
+port_init_cl72_292=1
+port_init_cl72_293=1
+port_init_cl72_294=1
+port_init_cl72_295=1
+port_init_cl72_296=1
+port_init_cl72_297=1
+port_init_cl72_298=1
+port_init_cl72_299=1
+port_init_cl72_300=1
+port_init_cl72_301=1
+port_init_cl72_302=1
+port_init_cl72_303=1
+port_init_cl72_304=1
+#305 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_305=0
+port_init_cl72_306=1
+#307 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_307=0
+#308 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_308=0
+#309 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_309=0
+#310 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_310=0
+port_init_cl72_311=1
+port_init_cl72_312=1
+port_init_cl72_313=1
+port_init_cl72_314=1
+port_init_cl72_315=1
+port_init_cl72_316=1
+port_init_cl72_317=1
+port_init_cl72_318=1
+port_init_cl72_319=1
+port_init_cl72_320=1
+port_init_cl72_321=1
+port_init_cl72_322=1
+port_init_cl72_323=1
+port_init_cl72_324=1
+port_init_cl72_325=1
+port_init_cl72_326=1
+port_init_cl72_327=1
+port_init_cl72_328=1
+port_init_cl72_329=1
+port_init_cl72_330=1
+port_init_cl72_331=1
+port_init_cl72_332=1
+port_init_cl72_333=1
+port_init_cl72_334=1
+port_init_cl72_335=1
+port_init_cl72_336=1
+port_init_cl72_337=1
+port_init_cl72_338=1
+port_init_cl72_339=1
+port_init_cl72_340=1
+port_init_cl72_341=1
+port_init_cl72_342=1
+port_init_cl72_343=1
+port_init_cl72_344=1
+port_init_cl72_345=1
+port_init_cl72_346=1
+port_init_cl72_347=1
+port_init_cl72_348=1
+port_init_cl72_349=1
+port_init_cl72_350=1
+port_init_cl72_351=1
+port_init_cl72_352=1
+port_init_cl72_353=1
+port_init_cl72_354=1
+port_init_cl72_355=1
+port_init_cl72_356=1
+port_init_cl72_357=1
+port_init_cl72_358=1
+port_init_cl72_359=1
+port_init_cl72_360=1
+#361 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_361=0
+#362 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_362=0
+#363 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_363=0
+#364 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_364=0
+port_init_cl72_365=1
+#366 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_366=0
+#367 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_367=0
+port_init_cl72_368=1
+port_init_cl72_369=1
+port_init_cl72_370=1
+port_init_cl72_371=1
+port_init_cl72_372=1
+port_init_cl72_373=1
+port_init_cl72_374=1
+port_init_cl72_375=1
+port_init_cl72_376=1
+port_init_cl72_377=1
+port_init_cl72_378=1
+port_init_cl72_379=1
+port_init_cl72_380=1
+port_init_cl72_381=1
+port_init_cl72_382=1
+port_init_cl72_383=1
+port_init_cl72_384=1
+port_init_cl72_385=1
+port_init_cl72_386=1
+port_init_cl72_387=1
+port_init_cl72_388=1
+port_init_cl72_389=1
+port_init_cl72_390=1
+port_init_cl72_391=1
+port_init_cl72_392=1
+port_init_cl72_393=1
+port_init_cl72_394=1
+port_init_cl72_395=1
+port_init_cl72_396=1
+port_init_cl72_397=1
+port_init_cl72_398=1
+port_init_cl72_399=1
+port_init_cl72_400=1
+port_init_cl72_401=1
+port_init_cl72_402=1
+port_init_cl72_403=1
+port_init_cl72_404=1
+port_init_cl72_405=1
+port_init_cl72_406=1
+port_init_cl72_407=1
+port_init_cl72_408=1
+port_init_cl72_409=1
+port_init_cl72_410=1
+port_init_cl72_411=1
+port_init_cl72_412=1
+port_init_cl72_413=1
+port_init_cl72_414=1
+port_init_cl72_415=1
+port_init_cl72_416=1
+port_init_cl72_417=1
+port_init_cl72_418=1
+port_init_cl72_419=1
+port_init_cl72_420=1
+port_init_cl72_421=1
+port_init_cl72_422=1
+port_init_cl72_423=1
+port_init_cl72_424=1
+port_init_cl72_425=1
+port_init_cl72_426=1
+port_init_cl72_427=1
+port_init_cl72_428=1
+port_init_cl72_429=1
+port_init_cl72_430=1
+port_init_cl72_431=1
+port_init_cl72_432=1
+port_init_cl72_433=1
+port_init_cl72_434=1
+port_init_cl72_435=1
+port_init_cl72_436=1
+port_init_cl72_437=1
+port_init_cl72_438=1
+port_init_cl72_439=1
+port_init_cl72_440=1
+port_init_cl72_441=1
+#442 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_442=0
+#443 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_443=0
+#444 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_444=0
+#445 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_445=0
+#446 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_446=0
+#447 is NC, set TXFIR to its min. Can't do link training
+port_init_cl72_447=0
+
+
+port_init_speed_cc.BCM8885X=200000
+port_init_speed_cd.BCM8885X=400000
+port_init_speed_ce.BCM8885X=100000
+port_init_speed_fabric.BCM8885X=53125
+port_init_speed_il.BCM8885X=10312
+port_init_speed_le.BCM8885X=50000
+port_init_speed_xe.BCM8885X=10000
+port_init_speed_xl.BCM8885X=40000
+port_priorities.BCM8885X=8
+protocol_traps_mode.BCM8885X=IN_LIF
+rate_ext_mdio_divisor=16
+schan_intr_enable.BCM8885X=0
+schan_timeout_usec.BCM8885X=900000
+serdes_fabric_clk_freq_in.BCM8885X=1
+serdes_fabric_clk_freq_out.BCM8885X=bypass
+serdes_nif_clk_freq_in0.BCM8885X=1
+serdes_nif_clk_freq_in1.BCM8885X=1
+serdes_nif_clk_freq_out0.BCM8885X=bypass
+serdes_nif_clk_freq_out1.BCM8885X=bypass
+soc_family.BCM8885X=BCM8885X
+stable_filename.BCM8885X=/tmp/warmboot_data
+stable_location.BCM8885X=3
+stable_size.BCM8885X=800000000
+sw_state_max_size.BCM8885X=750000000
+system_headers_mode=1
+tdma_intr_enable.BCM8885X=0
+tdma_timeout_usec.BCM8885X=1000000
+tm_port_header_type_in_0.BCM8885X=INJECTED_2
+tm_port_header_type_in_200.BCM8885X=INJECTED_2_PP
+tm_port_header_type_in_201.BCM8885X=INJECTED_2_PP
+tm_port_header_type_in_202.BCM8885X=INJECTED_2_PP
+tm_port_header_type_in_203.BCM8885X=INJECTED_2_PP
+tm_port_header_type_in_232.BCM8885X=INJECTED_2
+tm_port_header_type_in_19.BCM8885X=ETH
+tm_port_header_type_in_20.BCM8885X=ETH
+tm_port_header_type_out_0.BCM8885X=CPU
+tm_port_header_type_out_200.BCM8885X=ETH
+tm_port_header_type_out_201.BCM8885X=ETH
+tm_port_header_type_out_202.BCM8885X=ETH
+tm_port_header_type_out_203.BCM8885X=ETH
+tm_port_header_type_out_232.BCM8885X=CPU
+tm_port_header_type_out_19.BCM8885X=ETH
+tm_port_header_type_out_20.BCM8885X=ETH
+tslam_intr_enable.BCM8885X=0
+tslam_timeout_usec.BCM8885X=1000000
+ucode_port_0.BCM8885X=CPU.0:core_0.0
+ucode_port_200.BCM8885X=CPU.8:core_1.200
+ucode_port_201.BCM8885X=CPU.16:core_1.201
+ucode_port_202.BCM8885X=CPU.24:core_1.202
+ucode_port_203.BCM8885X=CPU.32:core_1.203
+
+
+ucode_port_1.BCM8885X=CDGE9:core_1.1
+ucode_port_2.BCM8885X=CDGE10:core_1.2
+ucode_port_3.BCM8885X=CDGE11:core_1.3
+ucode_port_4.BCM8885X=CDGE12:core_1.4
+ucode_port_5.BCM8885X=CDGE13:core_1.5
+ucode_port_6.BCM8885X=CDGE14:core_1.6
+ucode_port_7.BCM8885X=CDGE15:core_1.7
+ucode_port_8.BCM8885X=CDGE16:core_1.8
+ucode_port_9.BCM8885X=CDGE17:core_1.9
+ucode_port_10.BCM8885X=CDGE8:core_0.10
+ucode_port_11.BCM8885X=CDGE7:core_0.11
+ucode_port_12.BCM8885X=CDGE6:core_0.12
+ucode_port_13.BCM8885X=CDGE5:core_0.13
+ucode_port_14.BCM8885X=CDGE4:core_0.14
+ucode_port_15.BCM8885X=CDGE3:core_0.15
+ucode_port_16.BCM8885X=CDGE2:core_0.16
+ucode_port_17.BCM8885X=CDGE1:core_0.17
+ucode_port_18.BCM8885X=CDGE0:core_0.18
+ucode_port_19.BCM8885X=RCY0:core_0.19
+ucode_port_20.BCM8885X=RCY1:core_1.20
+ucode_port_21.BCM8885X=OLP:core_1.21
+
+ucode_port_100.BCM8885X=RCY_MIRROR.0:core_0.100
+ucode_port_101.BCM8885X=RCY_MIRROR.1:core_0.101
+ucode_port_102.BCM8885X=RCY_MIRROR.2:core_0.102
+ucode_port_103.BCM8885X=RCY_MIRROR.3:core_0.103
+ucode_port_104.BCM8885X=RCY_MIRROR.4:core_0.104
+ucode_port_105.BCM8885X=RCY_MIRROR.5:core_0.105
+ucode_port_106.BCM8885X=RCY_MIRROR.6:core_0.106
+ucode_port_107.BCM8885X=RCY_MIRROR.7:core_0.107
+ucode_port_108.BCM8885X=RCY_MIRROR.8:core_0.108
+ucode_port_109.BCM8885X=RCY_MIRROR.9:core_0.109
+ucode_port_110.BCM8885X=RCY_MIRROR.10:core_0.110
+ucode_port_111.BCM8885X=RCY_MIRROR.11:core_0.111
+ucode_port_112.BCM8885X=RCY_MIRROR.12:core_0.112
+ucode_port_113.BCM8885X=RCY_MIRROR.13:core_0.113
+ucode_port_114.BCM8885X=RCY_MIRROR.14:core_0.114
+ucode_port_115.BCM8885X=RCY_MIRROR.15:core_0.115
+ucode_port_116.BCM8885X=RCY_MIRROR.16:core_0.116
+ucode_port_117.BCM8885X=RCY_MIRROR.17:core_0.117
+ucode_port_118.BCM8885X=RCY_MIRROR.18:core_0.118
+ucode_port_119.BCM8885X=RCY_MIRROR.19:core_0.119
+ucode_port_120.BCM8885X=RCY_MIRROR.0:core_1.120
+ucode_port_121.BCM8885X=RCY_MIRROR.1:core_1.121
+ucode_port_122.BCM8885X=RCY_MIRROR.2:core_1.122
+ucode_port_123.BCM8885X=RCY_MIRROR.3:core_1.123
+ucode_port_124.BCM8885X=RCY_MIRROR.4:core_1.124
+ucode_port_125.BCM8885X=RCY_MIRROR.5:core_1.125
+ucode_port_126.BCM8885X=RCY_MIRROR.6:core_1.126
+ucode_port_127.BCM8885X=RCY_MIRROR.7:core_1.127
+ucode_port_128.BCM8885X=RCY_MIRROR.8:core_1.128
+ucode_port_129.BCM8885X=RCY_MIRROR.9:core_1.129
+ucode_port_130.BCM8885X=RCY_MIRROR.10:core_1.130
+ucode_port_131.BCM8885X=RCY_MIRROR.11:core_1.131
+ucode_port_132.BCM8885X=RCY_MIRROR.12:core_1.132
+ucode_port_133.BCM8885X=RCY_MIRROR.13:core_1.133
+ucode_port_134.BCM8885X=RCY_MIRROR.14:core_1.134
+ucode_port_135.BCM8885X=RCY_MIRROR.15:core_1.135
+ucode_port_136.BCM8885X=RCY_MIRROR.16:core_1.136
+ucode_port_137.BCM8885X=RCY_MIRROR.17:core_1.137
+ucode_port_138.BCM8885X=RCY_MIRROR.18:core_1.138
+ucode_port_139.BCM8885X=RCY_MIRROR.19:core_1.139
+
+serdes_lane_config_dfe_1.BCM8885X=on
+serdes_lane_config_dfe_2.BCM8885X=on
+serdes_lane_config_dfe_3.BCM8885X=on
+serdes_lane_config_dfe_4.BCM8885X=on
+serdes_lane_config_dfe_5.BCM8885X=on
+serdes_lane_config_dfe_6.BCM8885X=on
+serdes_lane_config_dfe_7.BCM8885X=on
+serdes_lane_config_dfe_8.BCM8885X=on
+serdes_lane_config_dfe_9.BCM8885X=on
+serdes_lane_config_dfe_10.BCM8885X=on
+serdes_lane_config_dfe_11.BCM8885X=on
+serdes_lane_config_dfe_12.BCM8885X=on
+serdes_lane_config_dfe_13.BCM8885X=on
+serdes_lane_config_dfe_14.BCM8885X=on
+serdes_lane_config_dfe_15.BCM8885X=on
+serdes_lane_config_dfe_16.BCM8885X=on
+serdes_lane_config_dfe_17.BCM8885X=on
+serdes_lane_config_dfe_18.BCM8885X=on
+
+
+serdes_lane_config_channel_mode_1.BCM8885X=force_nr
+serdes_lane_config_channel_mode_2.BCM8885X=force_nr
+serdes_lane_config_channel_mode_3.BCM8885X=force_nr
+serdes_lane_config_channel_mode_4.BCM8885X=force_nr
+serdes_lane_config_channel_mode_5.BCM8885X=force_nr
+serdes_lane_config_channel_mode_6.BCM8885X=force_nr
+serdes_lane_config_channel_mode_7.BCM8885X=force_nr
+serdes_lane_config_channel_mode_8.BCM8885X=force_nr
+serdes_lane_config_channel_mode_9.BCM8885X=force_nr
+serdes_lane_config_channel_mode_10.BCM8885X=force_nr
+serdes_lane_config_channel_mode_11.BCM8885X=force_nr
+serdes_lane_config_channel_mode_12.BCM8885X=force_nr
+serdes_lane_config_channel_mode_13.BCM8885X=force_nr
+serdes_lane_config_channel_mode_14.BCM8885X=force_nr
+serdes_lane_config_channel_mode_15.BCM8885X=force_nr
+serdes_lane_config_channel_mode_16.BCM8885X=force_nr
+serdes_lane_config_channel_mode_17.BCM8885X=force_nr
+serdes_lane_config_channel_mode_18.BCM8885X=force_nr
+
+
+serdes_lane_config_media_type_1.BCM8885X=backplane
+serdes_lane_config_media_type_2.BCM8885X=backplane
+serdes_lane_config_media_type_3.BCM8885X=backplane
+serdes_lane_config_media_type_4.BCM8885X=backplane
+serdes_lane_config_media_type_5.BCM8885X=backplane
+serdes_lane_config_media_type_6.BCM8885X=backplane
+serdes_lane_config_media_type_7.BCM8885X=backplane
+serdes_lane_config_media_type_8.BCM8885X=backplane
+serdes_lane_config_media_type_9.BCM8885X=backplane
+serdes_lane_config_media_type_10.BCM8885X=backplane
+serdes_lane_config_media_type_11.BCM8885X=backplane
+serdes_lane_config_media_type_12.BCM8885X=backplane
+serdes_lane_config_media_type_13.BCM8885X=backplane
+serdes_lane_config_media_type_14.BCM8885X=backplane
+serdes_lane_config_media_type_15.BCM8885X=backplane
+serdes_lane_config_media_type_16.BCM8885X=backplane
+serdes_lane_config_media_type_17.BCM8885X=backplane
+serdes_lane_config_media_type_18.BCM8885X=backplane
+
+
+port_fec.1.BCM8885x=9
+port_fec.2.BCM8885x=9
+port_fec.3.BCM8885x=9
+port_fec.4.BCM8885x=9
+port_fec.5.BCM8885x=9
+port_fec.6.BCM8885x=9
+port_fec.7.BCM8885x=9
+port_fec.8.BCM8885x=9
+port_fec.9.BCM8885x=9
+port_fec.10.BCM8885x=9
+port_fec.11.BCM8885x=9
+port_fec.12.BCM8885x=9
+port_fec.13.BCM8885x=9
+port_fec.14.BCM8885x=9
+port_fec.15.BCM8885x=9
+port_fec.16.BCM8885x=9
+port_fec.17.BCM8885x=9
+port_fec.18.BCM8885x=9
+
+
+serdes_tx_taps_1.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_2.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_3.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_4.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_5.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_6.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_7.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_8.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_9.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_10.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_11.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_12.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_13.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_14.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_15.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_16.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_17.BCM8885X=pam4:-4:128:0:0:0:0
+serdes_tx_taps_18.BCM8885X=pam4:-4:128:0:0:0:0
+
+
+# mask if you want to enable link training.
+#serdes_tx_taps_256.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_257.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_258.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_259.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_260.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_261.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_262.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_263.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_264.BCM8885X=pam4:-20:148:0:0:0:0
+#265 is NC, set TXFIR to its min.
+serdes_tx_taps_265.BCM8885X=pam4:0:0:0:0:0:0
+#266 is NC, set TXFIR to its min.
+serdes_tx_taps_266.BCM8885X=pam4:0:0:0:0:0:0
+#267 is NC, set TXFIR to its min.
+serdes_tx_taps_267.BCM8885X=pam4:0:0:0:0:0:0
+#268 is NC, set TXFIR to its min.
+serdes_tx_taps_268.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_269.BCM8885X=pam4:-20:148:0:0:0:0
+#270 is NC, set TXFIR to its min.
+serdes_tx_taps_270.BCM8885X=pam4:0:0:0:0:0:0
+#271 is NC, set TXFIR to its min.
+serdes_tx_taps_271.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_272.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_273.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_274.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_275.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_276.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_277.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_278.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_279.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_280.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_281.BCM8885X=pam4:-20:148:0:0:0:0
+#282 is NC, set TXFIR to its min.
+serdes_tx_taps_282.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_283.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_284.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_285.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_286.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_287.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_288.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_289.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_290.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_291.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_292.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_293.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_294.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_295.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_296.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_297.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_298.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_299.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_300.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_301.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_302.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_303.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_304.BCM8885X=pam4:-20:148:0:0:0:0
+#305 is NC, set TXFIR to its min.
+serdes_tx_taps_305.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_306.BCM8885X=pam4:-20:148:0:0:0:0
+#307 is NC, set TXFIR to its min.
+serdes_tx_taps_307.BCM8885X=pam4:0:0:0:0:0:0
+#308 is NC, set TXFIR to its min.
+serdes_tx_taps_308.BCM8885X=pam4:0:0:0:0:0:0
+#309 is NC, set TXFIR to its min.
+serdes_tx_taps_309.BCM8885X=pam4:0:0:0:0:0:0
+#310 is NC, set TXFIR to its min.
+serdes_tx_taps_310.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_311.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_312.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_313.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_314.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_315.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_316.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_317.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_318.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_319.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_320.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_321.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_322.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_323.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_324.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_325.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_326.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_327.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_328.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_329.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_330.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_331.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_332.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_333.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_334.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_335.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_336.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_337.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_338.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_339.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_340.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_341.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_342.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_343.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_344.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_345.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_346.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_347.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_348.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_349.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_350.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_351.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_352.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_353.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_354.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_355.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_356.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_357.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_358.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_359.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_360.BCM8885X=pam4:-20:148:0:0:0:0
+#361 is NC, set TXFIR to its min.
+serdes_tx_taps_361.BCM8885X=pam4:0:0:0:0:0:0
+#362 is NC, set TXFIR to its min.
+serdes_tx_taps_362.BCM8885X=pam4:0:0:0:0:0:0
+#363 is NC, set TXFIR to its min.
+serdes_tx_taps_363.BCM8885X=pam4:0:0:0:0:0:0
+#364 is NC, set TXFIR to its min.
+serdes_tx_taps_364.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_365.BCM8885X=pam4:-20:148:0:0:0:0
+#366 is NC, set TXFIR to its min.
+serdes_tx_taps_366.BCM8885X=pam4:0:0:0:0:0:0
+#367 is NC, set TXFIR to its min.
+serdes_tx_taps_367.BCM8885X=pam4:0:0:0:0:0:0
+#serdes_tx_taps_368.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_369.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_370.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_371.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_372.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_373.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_374.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_375.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_376.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_377.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_378.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_379.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_380.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_381.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_382.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_383.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_384.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_385.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_386.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_387.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_388.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_389.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_390.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_391.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_392.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_393.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_394.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_395.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_396.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_397.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_398.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_399.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_400.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_401.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_402.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_403.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_404.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_405.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_406.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_407.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_408.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_409.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_410.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_411.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_412.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_413.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_414.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_415.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_416.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_417.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_418.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_419.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_420.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_421.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_422.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_423.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_424.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_425.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_426.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_427.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_428.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_429.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_430.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_431.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_432.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_433.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_434.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_435.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_436.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_437.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_438.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_439.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_440.BCM8885X=pam4:-20:148:0:0:0:0
+#serdes_tx_taps_441.BCM8885X=pam4:-20:148:0:0:0:0
+#442 is NC, set TXFIR to its min.
+serdes_tx_taps_442.BCM8885X=pam4:0:0:0:0:0:0
+#443 is NC, set TXFIR to its min.
+serdes_tx_taps_443.BCM8885X=pam4:0:0:0:0:0:0
+#444 is NC, set TXFIR to its min.
+serdes_tx_taps_444.BCM8885X=pam4:0:0:0:0:0:0
+#445 is NC, set TXFIR to its min.
+serdes_tx_taps_445.BCM8885X=pam4:0:0:0:0:0:0
+#446 is NC, set TXFIR to its min.
+serdes_tx_taps_446.BCM8885X=pam4:0:0:0:0:0:0
+#447 is NC, set TXFIR to its min.
+serdes_tx_taps_447.BCM8885X=pam4:0:0:0:0:0:0
+
+
+# mask if you want to enable link training.
+#serdes_lane_config_channel_mode_256=force_nr
+#serdes_lane_config_channel_mode_257=force_nr
+#serdes_lane_config_channel_mode_258=force_nr
+#serdes_lane_config_channel_mode_259=force_nr
+#serdes_lane_config_channel_mode_260=force_nr
+#serdes_lane_config_channel_mode_261=force_nr
+#serdes_lane_config_channel_mode_262=force_nr
+#serdes_lane_config_channel_mode_263=force_nr
+#serdes_lane_config_channel_mode_264=force_nr
+#265 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_265=force_nr
+#266 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_266=force_nr
+#267 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_267=force_nr
+#268 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_268=force_nr
+#serdes_lane_config_channel_mode_269=force_nr
+#270 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_270=force_nr
+#271 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_271=force_nr
+#serdes_lane_config_channel_mode_272=force_nr
+#serdes_lane_config_channel_mode_273=force_nr
+#serdes_lane_config_channel_mode_274=force_nr
+#serdes_lane_config_channel_mode_275=force_nr
+#serdes_lane_config_channel_mode_276=force_nr
+#serdes_lane_config_channel_mode_277=force_nr
+#serdes_lane_config_channel_mode_278=force_nr
+#serdes_lane_config_channel_mode_279=force_nr
+#serdes_lane_config_channel_mode_280=force_nr
+#serdes_lane_config_channel_mode_281=force_nr
+#282 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_282=force_nr
+#serdes_lane_config_channel_mode_283=force_nr
+#serdes_lane_config_channel_mode_284=force_nr
+#serdes_lane_config_channel_mode_285=force_nr
+#serdes_lane_config_channel_mode_286=force_nr
+#serdes_lane_config_channel_mode_287=force_nr
+#serdes_lane_config_channel_mode_288=force_nr
+#serdes_lane_config_channel_mode_289=force_nr
+#serdes_lane_config_channel_mode_290=force_nr
+#serdes_lane_config_channel_mode_291=force_nr
+#serdes_lane_config_channel_mode_292=force_nr
+#serdes_lane_config_channel_mode_293=force_nr
+#serdes_lane_config_channel_mode_294=force_nr
+#serdes_lane_config_channel_mode_295=force_nr
+#serdes_lane_config_channel_mode_296=force_nr
+#serdes_lane_config_channel_mode_297=force_nr
+#serdes_lane_config_channel_mode_298=force_nr
+#serdes_lane_config_channel_mode_299=force_nr
+#serdes_lane_config_channel_mode_300=force_nr
+#serdes_lane_config_channel_mode_301=force_nr
+#serdes_lane_config_channel_mode_302=force_nr
+#serdes_lane_config_channel_mode_303=force_nr
+#serdes_lane_config_channel_mode_304=force_nr
+#305 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_305=force_nr
+#serdes_lane_config_channel_mode_306=force_nr
+#307 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_307=force_nr
+#308 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_308=force_nr
+#309 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_309=force_nr
+#310 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_310=force_nr
+#serdes_lane_config_channel_mode_311=force_nr
+#serdes_lane_config_channel_mode_312=force_nr
+#serdes_lane_config_channel_mode_313=force_nr
+#serdes_lane_config_channel_mode_314=force_nr
+#serdes_lane_config_channel_mode_315=force_nr
+#serdes_lane_config_channel_mode_316=force_nr
+#serdes_lane_config_channel_mode_317=force_nr
+#serdes_lane_config_channel_mode_318=force_nr
+#serdes_lane_config_channel_mode_319=force_nr
+#serdes_lane_config_channel_mode_320=force_nr
+#serdes_lane_config_channel_mode_321=force_nr
+#serdes_lane_config_channel_mode_322=force_nr
+#serdes_lane_config_channel_mode_323=force_nr
+#serdes_lane_config_channel_mode_324=force_nr
+#serdes_lane_config_channel_mode_325=force_nr
+#serdes_lane_config_channel_mode_326=force_nr
+#serdes_lane_config_channel_mode_327=force_nr
+#serdes_lane_config_channel_mode_328=force_nr
+#serdes_lane_config_channel_mode_329=force_nr
+#serdes_lane_config_channel_mode_330=force_nr
+#serdes_lane_config_channel_mode_331=force_nr
+#serdes_lane_config_channel_mode_332=force_nr
+#serdes_lane_config_channel_mode_333=force_nr
+#serdes_lane_config_channel_mode_334=force_nr
+#serdes_lane_config_channel_mode_335=force_nr
+#serdes_lane_config_channel_mode_336=force_nr
+#serdes_lane_config_channel_mode_337=force_nr
+#serdes_lane_config_channel_mode_338=force_nr
+#serdes_lane_config_channel_mode_339=force_nr
+#serdes_lane_config_channel_mode_340=force_nr
+#serdes_lane_config_channel_mode_341=force_nr
+#serdes_lane_config_channel_mode_342=force_nr
+#serdes_lane_config_channel_mode_343=force_nr
+#serdes_lane_config_channel_mode_344=force_nr
+#serdes_lane_config_channel_mode_345=force_nr
+#serdes_lane_config_channel_mode_346=force_nr
+#serdes_lane_config_channel_mode_347=force_nr
+#serdes_lane_config_channel_mode_348=force_nr
+#serdes_lane_config_channel_mode_349=force_nr
+#serdes_lane_config_channel_mode_350=force_nr
+#serdes_lane_config_channel_mode_351=force_nr
+#serdes_lane_config_channel_mode_352=force_nr
+#serdes_lane_config_channel_mode_353=force_nr
+#serdes_lane_config_channel_mode_354=force_nr
+#serdes_lane_config_channel_mode_355=force_nr
+#serdes_lane_config_channel_mode_356=force_nr
+#serdes_lane_config_channel_mode_357=force_nr
+#serdes_lane_config_channel_mode_358=force_nr
+#serdes_lane_config_channel_mode_359=force_nr
+#serdes_lane_config_channel_mode_360=force_nr
+#361 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_361=force_nr
+#362 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_362=force_nr
+#363 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_363=force_nr
+#364 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_364=force_nr
+#serdes_lane_config_channel_mode_365=force_nr
+#366 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_366=force_nr
+#367 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_367=force_nr
+#serdes_lane_config_channel_mode_368=force_nr
+#serdes_lane_config_channel_mode_369=force_nr
+#serdes_lane_config_channel_mode_370=force_nr
+#serdes_lane_config_channel_mode_371=force_nr
+#serdes_lane_config_channel_mode_372=force_nr
+#serdes_lane_config_channel_mode_373=force_nr
+#serdes_lane_config_channel_mode_374=force_nr
+#serdes_lane_config_channel_mode_375=force_nr
+#serdes_lane_config_channel_mode_376=force_nr
+#serdes_lane_config_channel_mode_377=force_nr
+#serdes_lane_config_channel_mode_378=force_nr
+#serdes_lane_config_channel_mode_379=force_nr
+#serdes_lane_config_channel_mode_380=force_nr
+#serdes_lane_config_channel_mode_381=force_nr
+#serdes_lane_config_channel_mode_382=force_nr
+#serdes_lane_config_channel_mode_383=force_nr
+#serdes_lane_config_channel_mode_384=force_nr
+#serdes_lane_config_channel_mode_385=force_nr
+#serdes_lane_config_channel_mode_386=force_nr
+#serdes_lane_config_channel_mode_387=force_nr
+#serdes_lane_config_channel_mode_388=force_nr
+#serdes_lane_config_channel_mode_389=force_nr
+#serdes_lane_config_channel_mode_390=force_nr
+#serdes_lane_config_channel_mode_391=force_nr
+#serdes_lane_config_channel_mode_392=force_nr
+#serdes_lane_config_channel_mode_393=force_nr
+#serdes_lane_config_channel_mode_394=force_nr
+#serdes_lane_config_channel_mode_395=force_nr
+#serdes_lane_config_channel_mode_396=force_nr
+#serdes_lane_config_channel_mode_397=force_nr
+#serdes_lane_config_channel_mode_398=force_nr
+#serdes_lane_config_channel_mode_399=force_nr
+#serdes_lane_config_channel_mode_400=force_nr
+#serdes_lane_config_channel_mode_401=force_nr
+#serdes_lane_config_channel_mode_402=force_nr
+#serdes_lane_config_channel_mode_403=force_nr
+#serdes_lane_config_channel_mode_404=force_nr
+#serdes_lane_config_channel_mode_405=force_nr
+#serdes_lane_config_channel_mode_406=force_nr
+#serdes_lane_config_channel_mode_407=force_nr
+#serdes_lane_config_channel_mode_408=force_nr
+#serdes_lane_config_channel_mode_409=force_nr
+#serdes_lane_config_channel_mode_410=force_nr
+#serdes_lane_config_channel_mode_411=force_nr
+#serdes_lane_config_channel_mode_412=force_nr
+#serdes_lane_config_channel_mode_413=force_nr
+#serdes_lane_config_channel_mode_414=force_nr
+#serdes_lane_config_channel_mode_415=force_nr
+#serdes_lane_config_channel_mode_416=force_nr
+#serdes_lane_config_channel_mode_417=force_nr
+#serdes_lane_config_channel_mode_418=force_nr
+#serdes_lane_config_channel_mode_419=force_nr
+#serdes_lane_config_channel_mode_420=force_nr
+#serdes_lane_config_channel_mode_421=force_nr
+#serdes_lane_config_channel_mode_422=force_nr
+#serdes_lane_config_channel_mode_423=force_nr
+#serdes_lane_config_channel_mode_424=force_nr
+#serdes_lane_config_channel_mode_425=force_nr
+#serdes_lane_config_channel_mode_426=force_nr
+#serdes_lane_config_channel_mode_427=force_nr
+#serdes_lane_config_channel_mode_428=force_nr
+#serdes_lane_config_channel_mode_429=force_nr
+#serdes_lane_config_channel_mode_430=force_nr
+#serdes_lane_config_channel_mode_431=force_nr
+#serdes_lane_config_channel_mode_432=force_nr
+#serdes_lane_config_channel_mode_433=force_nr
+#serdes_lane_config_channel_mode_434=force_nr
+#serdes_lane_config_channel_mode_435=force_nr
+#serdes_lane_config_channel_mode_436=force_nr
+#serdes_lane_config_channel_mode_437=force_nr
+#serdes_lane_config_channel_mode_438=force_nr
+#serdes_lane_config_channel_mode_439=force_nr
+#serdes_lane_config_channel_mode_440=force_nr
+#serdes_lane_config_channel_mode_441=force_nr
+#442 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_442=force_nr
+#443 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_443=force_nr
+#444 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_444=force_nr
+#445 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_445=force_nr
+#446 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_446=force_nr
+#447 is NC, set TXFIR to its min.
+serdes_lane_config_channel_mode_447=force_nr
+
+
+
+rif_id_max=24576
+dpp_db_path=/usr/share/bcm/db
+sai_recycle_port_lane_base=200
+appl_param_nof_ports_per_modid=64
+udh_exists=1
+custom_feature_pcp_force_no_packing=1
+
+xflow_macsec_secure_chan_to_num_secure_assoc_encrypt=2
+xflow_macsec_secure_chan_to_num_secure_assoc_decrypt=4
+cmic_dma_abort_in_cold_boot=0
+sai_pfc_dlr_init_capability=0
+sai_disable_srcmacqedstmac_ctrl=1
+trunk_group_max_members=16
+sai_default_cpu_tx_tc=7
+sai_disable_srcmacqedstmac_ctrl=1
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/pg_profile_lookup.ini
new file mode 100644
index 00000000000..ba784705e06
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/pg_profile_lookup.ini
@@ -0,0 +1,17 @@
+# PG lossless profiles.
+# speed cable    size    xon  xoff threshold xon_offset
+ 40000   300m      0    2560 69632    -6      181753
+ 100000  300m      0    2560 110592   -6      363506
+ 400000  300m      0    2560 315392   -5      1454025
+ 40000   1000m     0    2560 114688   -6      181753
+ 100000  1000m     0    2560 225280   -6      363506
+ 400000  1000m     0    2560 778240   -5      1454025
+ 40000   2000m     0    2560 184320   -6      181753
+ 100000  2000m     0    2560 393216   -6      363506
+ 400000  2000m     0    2560 1445888  -5      1454025
+ 40000   80000m    0    2560 5369856  -6      181753
+ 100000  80000m    0    2560 13357056 -6      363506
+ 400000  80000m    0    2560 53305344 -5      1454025
+ 40000   120000m   0    2560 8028160  -6      181753
+ 100000  120000m   0    2560 20004864 -6      363506
+ 400000  120000m   0    2560 79900672 -5      1454025
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/port_config.ini b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/port_config.ini
new file mode 100644
index 00000000000..faccc8e39de
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/port_config.ini
@@ -0,0 +1,21 @@
+# name         lanes                            alias         index  role  speed   asic_port_name  core_id  core_port_id  num_voq
+Ethernet144    72,73,74,75,76,77,78,79          Ethernet19/1  19     Ext   400000  Eth0            1       1           8
+Ethernet152    80,81,82,83,84,85,86,87          Ethernet20/1  20     Ext   400000  Eth8            1       2           8
+Ethernet160    88,89,90,91,92,93,94,95          Ethernet21/1  21     Ext   400000  Eth16           1       3           8
+Ethernet168    96,97,98,99,100,101,102,103      Ethernet22/1  22     Ext   400000  Eth24           1       4           8
+Ethernet176    104,105,106,107,108,109,110,111  Ethernet23/1  23     Ext   400000  Eth32           1       5           8
+Ethernet184    112,113,114,115,116,117,118,119  Ethernet24/1  24     Ext   400000  Eth40           1       6           8
+Ethernet192    120,121,122,123,124,125,126,127  Ethernet25/1  25     Ext   400000  Eth48           1       7           8
+Ethernet200    128,129,130,131,132,133,134,135  Ethernet26/1  26     Ext   400000  Eth56           1       8           8
+Ethernet208    136,137,138,139,140,141,142,143  Ethernet27/1  27     Ext   400000  Eth64           1       9           8
+Ethernet216    64,65,66,67,68,69,70,71          Ethernet28/1  28     Ext   400000  Eth72           0       10          8
+Ethernet224    56,57,58,59,60,61,62,63          Ethernet29/1  29     Ext   400000  Eth80           0       11          8
+Ethernet232    48,49,50,51,52,53,54,55          Ethernet30/1  30     Ext   400000  Eth88           0       12          8
+Ethernet240    40,41,42,43,44,45,46,47          Ethernet31/1  31     Ext   400000  Eth96           0       13          8
+Ethernet248    32,33,34,35,36,37,38,39          Ethernet32/1  32     Ext   400000  Eth104          0       14          8
+Ethernet256    24,25,26,27,28,29,30,31          Ethernet33/1  33     Ext   400000  Eth112          0       15          8
+Ethernet264    16,17,18,19,20,21,22,23          Ethernet34/1  34     Ext   400000  Eth120          0       16          8
+Ethernet272    8,9,10,11,12,13,14,15            Ethernet35/1  35     Ext   400000  Eth128          0       17          8
+Ethernet280    0,1,2,3,4,5,6,7                  Ethernet36/1  36     Ext   400000  Eth136          0       18          8
+Ethernet-IB1   219                              Recirc1/0     38     Inb   10000   Rcy0            0       19          8
+Ethernet-Rec1  220                              Recirc1/1     40     Rec   10000   Rcy1            1       20          8
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/qos.json.j2 b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/qos.json.j2
new file mode 100644
index 00000000000..411942ab526
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/qos.json.j2
@@ -0,0 +1,21 @@
+{%- macro generate_wred_profiles() %}
+    "WRED_PROFILE": {
+        "AZURE_LOSSLESS" : {
+            "wred_green_enable"      : "true",
+            "wred_yellow_enable"     : "true",
+            "wred_red_enable"        : "true",
+            "ecn"                    : "ecn_all",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
+            "green_drop_probability" : "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability"   : "5"
+        }
+    },
+{%- endmacro %}
+
+{%- include 'qos_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/sai.profile b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/sai.profile
new file mode 100644
index 00000000000..65cfb73f3b3
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/jr2cp-nokia-18x400g-config.bcm
+SAI_SWITCH_NON_ECMP_MAX_SIZE=3072
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/sai_postinit_cmd.soc
new file mode 100644
index 00000000000..7fbac3b5175
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/sai_postinit_cmd.soc
@@ -0,0 +1,31 @@
+cint /usr/share/sonic/hwsku/mesh_config.cint
+
+INTeRrupt ENAble id=2209
+INTeRrupt ENAble id=2210
+INTeRrupt ENAble id=2211
+INTeRrupt ENAble id=2212
+INTeRrupt ENAble id=2213
+INTeRrupt ENAble id=2214
+INTeRrupt ENAble id=2215
+INTeRrupt ENAble id=2216
+INTeRrupt ENAble id=2217
+INTeRrupt ENAble id=2218
+INTeRrupt ENAble id=2219
+INTeRrupt ENAble id=2220
+INTeRrupt ENAble id=2221
+INTeRrupt ENAble id=2222
+INTeRrupt ENAble id=2223
+INTeRrupt ENAble id=2224
+INTeRrupt ENAble id=2225
+INTeRrupt ENAble id=2226
+
+INTeRrupt ENAble id=482
+INTeRrupt ENAble id=483
+INTeRrupt ENAble id=484
+INTeRrupt ENAble id=485
+INTeRrupt ENAble id=486
+INTeRrupt ENAble id=487
+INTeRrupt ENAble id=488
+
+INTeRrupt ENAble id=1597
+debug intr error
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/fabric_monitor_config.json
new file mode 100644
index 00000000000..7c360948fcf
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/fabric_monitor_config.json
@@ -0,0 +1,10 @@
+{
+   "FABRIC_MONITOR_DATA": {
+      "monErrThreshCrcCells": 1,
+      "monErrThreshRxCells": 61035156,
+      "monPollThreshRecovery": 8,
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 85,
+      "monState": "enable"
+   }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/fabric_port_config.ini b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/fabric_port_config.ini
new file mode 100644
index 00000000000..1ffb084a133
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/fabric_port_config.ini
@@ -0,0 +1,193 @@
+# name              lanes     isolateStatus    forceUnisolateStatus
+Fabric0             0         False            0
+Fabric1             1         False            0
+Fabric2             2         False            0
+Fabric3             3         False            0
+Fabric4             4         False            0
+Fabric5             5         False            0
+Fabric6             6         False            0
+Fabric7             7         False            0
+Fabric8             8         False            0
+Fabric9             9         False            0
+Fabric10            10        False            0
+Fabric11            11        False            0
+Fabric12            12        False            0
+Fabric13            13        False            0
+Fabric14            14        False            0
+Fabric15            15        False            0
+Fabric16            16        False            0
+Fabric17            17        False            0
+Fabric18            18        False            0
+Fabric19            19        False            0
+Fabric20            20        False            0
+Fabric21            21        False            0
+Fabric22            22        False            0
+Fabric23            23        False            0
+Fabric24            24        False            0
+Fabric25            25        False            0
+Fabric26            26        False            0
+Fabric27            27        False            0
+Fabric28            28        False            0
+Fabric29            29        False            0
+Fabric30            30        False            0
+Fabric31            31        False            0
+Fabric32            32        False            0
+Fabric33            33        False            0
+Fabric34            34        False            0
+Fabric35            35        False            0
+Fabric36            36        False            0
+Fabric37            37        False            0
+Fabric38            38        False            0
+Fabric39            39        False            0
+Fabric40            40        False            0
+Fabric41            41        False            0
+Fabric42            42        False            0
+Fabric43            43        False            0
+Fabric44            44        False            0
+Fabric45            45        False            0
+Fabric46            46        False            0
+Fabric47            47        False            0
+Fabric48            48        False            0
+Fabric49            49        False            0
+Fabric50            50        False            0
+Fabric51            51        False            0
+Fabric52            52        False            0
+Fabric53            53        False            0
+Fabric54            54        False            0
+Fabric55            55        False            0
+Fabric56            56        False            0
+Fabric57            57        False            0
+Fabric58            58        False            0
+Fabric59            59        False            0
+Fabric60            60        False            0
+Fabric61            61        False            0
+Fabric62            62        False            0
+Fabric63            63        False            0
+Fabric64            64        False            0
+Fabric65            65        False            0
+Fabric66            66        False            0
+Fabric67            67        False            0
+Fabric68            68        False            0
+Fabric69            69        False            0
+Fabric70            70        False            0
+Fabric71            71        False            0
+Fabric72            72        False            0
+Fabric73            73        False            0
+Fabric74            74        False            0
+Fabric75            75        False            0
+Fabric76            76        False            0
+Fabric77            77        False            0
+Fabric78            78        False            0
+Fabric79            79        False            0
+Fabric80            80        False            0
+Fabric81            81        False            0
+Fabric82            82        False            0
+Fabric83            83        False            0
+Fabric84            84        False            0
+Fabric85            85        False            0
+Fabric86            86        False            0
+Fabric87            87        False            0
+Fabric88            88        False            0
+Fabric89            89        False            0
+Fabric90            90        False            0
+Fabric91            91        False            0
+Fabric92            92        False            0
+Fabric93            93        False            0
+Fabric94            94        False            0
+Fabric95            95        False            0
+Fabric96            96        False            0
+Fabric97            97        False            0
+Fabric98            98        False            0
+Fabric99            99        False            0
+Fabric100           100       False            0
+Fabric101           101       False            0
+Fabric102           102       False            0
+Fabric103           103       False            0
+Fabric104           104       False            0
+Fabric105           105       False            0
+Fabric106           106       False            0
+Fabric107           107       False            0
+Fabric108           108       False            0
+Fabric109           109       False            0
+Fabric110           110       False            0
+Fabric111           111       False            0
+Fabric112           112       False            0
+Fabric113           113       False            0
+Fabric114           114       False            0
+Fabric115           115       False            0
+Fabric116           116       False            0
+Fabric117           117       False            0
+Fabric118           118       False            0
+Fabric119           119       False            0
+Fabric120           120       False            0
+Fabric121           121       False            0
+Fabric122           122       False            0
+Fabric123           123       False            0
+Fabric124           124       False            0
+Fabric125           125       False            0
+Fabric126           126       False            0
+Fabric127           127       False            0
+Fabric128           128       False            0
+Fabric129           129       False            0
+Fabric130           130       False            0
+Fabric131           131       False            0
+Fabric132           132       False            0
+Fabric133           133       False            0
+Fabric134           134       False            0
+Fabric135           135       False            0
+Fabric136           136       False            0
+Fabric137           137       False            0
+Fabric138           138       False            0
+Fabric139           139       False            0
+Fabric140           140       False            0
+Fabric141           141       False            0
+Fabric142           142       False            0
+Fabric143           143       False            0
+Fabric144           144       False            0
+Fabric145           145       False            0
+Fabric146           146       False            0
+Fabric147           147       False            0
+Fabric148           148       False            0
+Fabric149           149       False            0
+Fabric150           150       False            0
+Fabric151           151       False            0
+Fabric152           152       False            0
+Fabric153           153       False            0
+Fabric154           154       False            0
+Fabric155           155       False            0
+Fabric156           156       False            0
+Fabric157           157       False            0
+Fabric158           158       False            0
+Fabric159           159       False            0
+Fabric160           160       False            0
+Fabric161           161       False            0
+Fabric162           162       False            0
+Fabric163           163       False            0
+Fabric164           164       False            0
+Fabric165           165       False            0
+Fabric166           166       False            0
+Fabric167           167       False            0
+Fabric168           168       False            0
+Fabric169           169       False            0
+Fabric170           170       False            0
+Fabric171           171       False            0
+Fabric172           172       False            0
+Fabric173           173       False            0
+Fabric174           174       False            0
+Fabric175           175       False            0
+Fabric176           176       False            0
+Fabric177           177       False            0
+Fabric178           178       False            0
+Fabric179           179       False            0
+Fabric180           180       False            0
+Fabric181           181       False            0
+Fabric182           182       False            0
+Fabric183           183       False            0
+Fabric184           184       False            0
+Fabric185           185       False            0
+Fabric186           186       False            0
+Fabric187           187       False            0
+Fabric188           188       False            0
+Fabric189           189       False            0
+Fabric190           190       False            0
+Fabric191           191       False            0
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/profile.ini b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/profile.ini
new file mode 100644
index 00000000000..4eda67c91a6
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=XX:XX:XX:XX:XX:XX
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/asic.conf b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/asic.conf
new file mode 100644
index 00000000000..e00f5bcffbe
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/asic.conf
@@ -0,0 +1,3 @@
+NUM_ASIC=2
+DEV_ID_ASIC_0=08:00.0
+DEV_ID_ASIC_1=07:00.0
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/chassisdb.conf b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/chassisdb.conf
new file mode 100644
index 00000000000..3ce45b2fb9c
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/chassisdb.conf
@@ -0,0 +1,4 @@
+start_chassis_db=1
+chassis_db_address=240.127.1.1
+lag_id_start=1
+lag_id_end=1023
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/default_sku b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/default_sku
new file mode 100644
index 00000000000..3419e86e7e9
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/default_sku
@@ -0,0 +1 @@
+Nokia-IXR7250-X3B t2
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/installer.conf
new file mode 100644
index 00000000000..7af555c1197
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_PORT=0x3f8
+CONSOLE_DEV=0
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="amd_iommu=off"
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/pcie.yaml b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/pcie.yaml
new file mode 100644
index 00000000000..1ea9d18f49c
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/pcie.yaml
@@ -0,0 +1,248 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1450'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Root Complex'
+- bus: '00'
+  dev: '00'
+  fn: '2'
+  id: '1451'
+  name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) I/O
+    Memory Management Unit'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '2'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '3'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '4'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '1'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '2'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '3'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '4'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '07'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '07'
+  fn: '1'
+  id: '1454'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Internal PCIe GPP Bridge 0 to Bus B'
+- bus: '00'
+  dev: 08
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: 08
+  fn: '1'
+  id: '1454'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Internal PCIe GPP Bridge 0 to Bus B'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 790b
+  name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 59)'
+- bus: '00'
+  dev: '14'
+  fn: '3'
+  id: 790e
+  name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: '1460'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 0'
+- bus: '00'
+  dev: '18'
+  fn: '1'
+  id: '1461'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 1'
+- bus: '00'
+  dev: '18'
+  fn: '2'
+  id: '1462'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 2'
+- bus: '00'
+  dev: '18'
+  fn: '3'
+  id: '1463'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 3'
+- bus: '00'
+  dev: '18'
+  fn: '4'
+  id: '1464'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 4'
+- bus: '00'
+  dev: '18'
+  fn: '5'
+  id: '1465'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 5'
+- bus: '00'
+  dev: '18'
+  fn: '6'
+  id: '1466'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 6'
+- bus: '00'
+  dev: '18'
+  fn: '7'
+  id: '1467'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 7'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: '0030'
+  name: 'Unassigned class [ff00]: Alcatel Device 0030 (rev 35)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: 157b
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: '0033'
+  name: 'Unassigned class [ff00]: Alcatel Device 0033 (rev 35)'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: '8854'
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device 8854 (rev 03)'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: '8854'
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device 8854 (rev 03)'
+- bus: 09
+  dev: '00'
+  fn: '0'
+  id: 145a
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
+    Zeppelin/Raven/Raven2 PCIe Dummy Function'
+- bus: 09
+  dev: '00'
+  fn: '2'
+  id: '1456'
+  name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 17h (Models
+    00h-0fh) Platform Security Processor (PSP) 3.0 Device'
+- bus: 09
+  dev: '00'
+  fn: '3'
+  id: 145f
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 xHCI
+    Compliant Host Controller'
+- bus: 0a
+  dev: '00'
+  fn: '0'
+  id: '1455'
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
+    Zeppelin/Renoir PCIe Dummy Function'
+- bus: 0a
+  dev: '00'
+  fn: '1'
+  id: '1468'
+  name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Zeppelin Cryptographic
+    Coprocessor NTBCCP'
+- bus: 0a
+  dev: '00'
+  fn: '2'
+  id: '7901'
+  name: 'SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI
+    mode] (rev 51)'
+- bus: 0a
+  dev: '00'
+  fn: '3'
+  id: '1457'
+  name: 'Audio device: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    HD Audio Controller'
+- bus: 0a
+  dev: '00'
+  fn: '4'
+  id: '1458'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: 0a
+  dev: '00'
+  fn: '5'
+  id: '1458'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: 0a
+  dev: '00'
+  fn: '6'
+  id: '1459'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: 0a
+  dev: '00'
+  fn: '7'
+  id: '1459'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform.json b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform.json
new file mode 100644
index 00000000000..7d0353ed32a
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform.json
@@ -0,0 +1,391 @@
+{
+    "chassis": {
+        "name": "7250 IXR-X3B",
+        "components": [
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CpuCtlFpga"
+            },
+            {
+                "name": "IoCtlFpga"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fan1",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan2",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan3",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan4",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan5",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan6",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan7",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan8",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan9",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan10",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan11",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan12",
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan1",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan2",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan3",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan4",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan5",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan6",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan7",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan8",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan9",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan10",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan11",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan12",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }            
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            },
+            {
+                "name": "PSU2",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            }
+        ],
+        "thermals": [
+            {
+                "name": "FPGA",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Center",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "ASIC0",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "ASIC1",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            }
+        ],
+        "sfps": [
+            {
+                "name": "QSFPDD_1"
+            },
+            {
+                "name": "QSFPDD_2"
+            },
+            {
+                "name": "QSFPDD_3"
+            },
+            {
+                "name": "QSFPDD_4"
+            },
+            {
+                "name": "QSFPDD_5"
+            },
+            {
+                "name": "QSFPDD_6"
+            },
+            {
+                "name": "QSFPDD_7"
+            },
+            {
+                "name": "QSFPDD_8"
+            },
+            {
+                "name": "QSFPDD_9"
+            },
+            {
+                "name": "QSFPDD_10"
+            },
+            {
+                "name": "QSFPDD_11"
+            },
+            {
+                "name": "QSFPDD_12"
+            },
+            {
+                "name": "QSFPDD_13"
+            },
+            {
+                "name": "QSFPDD_14"
+            },
+            {
+                "name": "QSFPDD_15"
+            },
+            {
+                "name": "QSFPDD_16"
+            },
+            {
+                "name": "QSFPDD_17"
+            },
+            {
+                "name": "QSFPDD_18"
+            },
+            {
+                "name": "QSFPDD_19"
+            },
+            {
+                "name": "QSFPDD_20"
+            },
+            {
+                "name": "QSFPDD_21"
+            },
+            {
+                "name": "QSFPDD_22"
+            },
+            {
+                "name": "QSFPDD_23"
+            },
+            {
+                "name": "QSFPDD_24"
+            },
+            {
+                "name": "QSFPDD_25"
+            },
+            {
+                "name": "QSFPDD_26"
+            },
+            {
+                "name": "QSFPDD_27"
+            },
+            {
+                "name": "QSFPDD_28"
+            },
+            {
+                "name": "QSFPDD_29"
+            },
+            {
+                "name": "QSFPDD_30"
+            },
+            {
+                "name": "QSFPDD_31"
+            },
+            {
+                "name": "QSFPDD_32"
+            },
+            {
+                "name": "QSFPDD_33"
+            },
+            {
+                "name": "QSFPDD_34"
+            },
+            {
+                "name": "QSFPDD_35"
+            },
+            {
+                "name": "QSFPDD_36"
+            }
+       	]
+    },
+    "interfaces": {
+    },
+    "asic_sensors": {
+        "poll_interval": "10",
+        "poll_admin_status": "enable"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform.json.bak b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform.json.bak
new file mode 100644
index 00000000000..d4622faa188
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform.json.bak
@@ -0,0 +1,285 @@
+{
+    "chassis": {
+        "name": "7250 IXR-X3B",
+        "components": [
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CPUCTL"
+            },
+            {
+                "name": "IOCTL"
+            }
+        ],
+        "watchdog": {
+	    "disarm": false
+	},
+	"get_module_attributes": {
+	    "model": false,
+	    "serial": false,
+	    "base_mac": false,
+	    "system_eeprom_info": false,
+            "reboot_other_modules": false
+	},
+        "thermal_temperature": {
+	     "minimum": 0,
+	     "maximum": 110
+	},
+        "fans": [],
+        "fan_drawers": [],
+        "master_psu_led_color": [], 
+        "psus": [],
+        "thermals": [
+	    {
+	        "name": "ASIC0_0--FAB0",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC0_1--FAB1",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC0_2--FAB2",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC0_3--FAB3",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC0_4--NIF0",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC0_5--NIF1",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC0_6--PRM",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC0_7--EMI0",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC0_8--EMI1",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC0_9--DRAM0",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC0_10--DRAM1",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC1_0--FAB0",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC1_1--FAB1",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC1_2--FAB2",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC1_3--FAB3",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC1_4--NIF0",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC1_5--NIF1",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC1_6--PRM",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC1_7--EMI0",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC1_8--EMI1",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC1_9--DRAM0",
+		"controllable": false
+	    },
+	    {
+	        "name": "ASIC1_10--DRAM1",
+		"controllable": false
+	    },
+            {
+                "name": "temp_1(fan)",
+		"controllable": false
+            },
+            {
+                "name": "temp_2(fan)",
+		"controllable": false
+            },
+            {
+                "name": "temp_3(fan)",
+		"controllable": false
+            },
+            {
+                "name": "temp_4(fan)",
+		"controllable": false
+            },
+            {
+                "name": "temp_5",
+		"controllable": false
+            },
+            {
+                "name": "temp_6",
+		"controllable": false
+            },
+            {
+                "name": "temp_7(fan)",
+		"controllable": false
+            },
+            {
+                "name": "temp_8(fan)",
+		"controllable": false
+            },
+            {
+                "name": "temp_9(fan)",
+		"controllable": false
+            },
+            {
+                "name": "temp_10(fan)",
+		"controllable": false
+            },
+            {
+                "name": "temp_11(fan)",
+		"controllable": false
+            }
+        ],
+        "sfps": [
+            {
+                "name": "QSFPDD_1"
+            },
+        {
+                "name": "QSFPDD_2"
+            },
+        {
+                "name": "QSFPDD_3"
+            },
+        {
+                "name": "QSFPDD_4"
+            },
+        {
+                "name": "QSFPDD_5"
+            },
+        {
+                "name": "QSFPDD_6"
+            },
+        {
+                "name": "QSFPDD_7"
+            },
+        {
+                "name": "QSFPDD_8"
+            },
+        {
+                "name": "QSFPDD_9"
+            },
+        {
+                "name": "QSFPDD_10"
+            },
+        {
+                "name": "QSFPDD_11"
+            },
+        {
+                "name": "QSFPDD_12"
+            },
+        {
+                "name": "QSFPDD_13"
+            },
+        {
+                "name": "QSFPDD_14"
+            },
+        {
+                "name": "QSFPDD_15"
+            },
+        {
+                "name": "QSFPDD_16"
+            },
+        {
+                "name": "QSFPDD_17"
+            },
+        {
+                "name": "QSFPDD_18"
+            },
+        {
+                "name": "QSFPDD_19"
+            },
+        {
+                "name": "QSFPDD_20"
+            },
+        {
+                "name": "QSFPDD_21"
+            },
+        {
+                "name": "QSFPDD_22"
+            },
+        {
+                "name": "QSFPDD_23"
+            },
+        {
+                "name": "QSFPDD_24"
+            },
+        {
+                "name": "QSFPDD_25"
+            },
+        {
+                "name": "QSFPDD_26"
+            },
+        {
+                "name": "QSFPDD_27"
+            },
+        {
+                "name": "QSFPDD_28"
+            },
+        {
+                "name": "QSFPDD_29"
+            },
+        {
+                "name": "QSFPDD_30"
+            },
+        {
+                "name": "QSFPDD_31"
+            },
+        {
+                "name": "QSFPDD_32"
+            },
+        {
+                "name": "QSFPDD_33"
+            },
+        {
+                "name": "QSFPDD_34"
+            },
+        {
+                "name": "QSFPDD_35"
+            },
+        {
+                "name": "QSFPDD_36"
+            }
+        ]
+    },
+    "interfaces": {
+        
+    },
+    "asic_sensors": {
+        "poll_interval": "10",
+        "poll_admin_status": "enable"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_asic b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_asic
new file mode 100644
index 00000000000..9ba24ca3e75
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_asic
@@ -0,0 +1 @@
+broadcom-dnx
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_components.json b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_components.json
new file mode 100755
index 00000000000..727475691f9
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_components.json
@@ -0,0 +1,11 @@
+{
+    "chassis": {
+        "Nokia-IXR7250-X3B": {
+            "component": {
+                "FPGA2": {},
+                "FPGA1": {},
+                "BIOS": {}
+            }
+        }
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_env.conf b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_env.conf
new file mode 100644
index 00000000000..3aa3ac21274
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_env.conf
@@ -0,0 +1,6 @@
+usemsi=1
+dmasize=512M
+default_mtu=9100
+macsec_enabled=1
+SYNCD_SHM_SIZE=512m
+disaggregated_chassis=1
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_reboot b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_reboot
new file mode 100755
index 00000000000..1276e6cac43
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/platform_reboot
@@ -0,0 +1,14 @@
+#!/bin/bash
+
+systemctl stop nokia-watchdog.service
+sleep 2
+echo "w" > /dev/watchdog
+kick_date=`date -u`
+echo "last watchdog kick $kick_date" > /var/log/nokia-watchdog-last.log
+sync
+
+if [ -c "/dev/rtc1" ]; then
+    sudo hwclock -w -f /dev/rtc1
+fi
+
+exec /sbin/reboot $@
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/plugins/led_control.py
new file mode 100644
index 00000000000..9c790f85091
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/plugins/led_control.py
@@ -0,0 +1,188 @@
+"""
+    led_control.py
+
+    Platform-specific LED control functionality for SONiC
+"""
+
+try:
+    from sonic_led.led_control_base import LedControlBase
+    from sonic_py_common import daemon_base
+    from sonic_py_common import multi_asic
+    from sonic_py_common import logger
+    from sonic_py_common.interface import backplane_prefix, inband_prefix, recirc_prefix
+    from swsscommon import swsscommon
+    import os
+    import time
+    import sonic_platform.platform
+    import sonic_platform.chassis
+except ImportError as e:
+    raise ImportError(str(e) + " - required module not found")
+
+SELECT_TIMEOUT = 1000
+FAN_DRAWERS = 3
+QSFP_NUMS = 36
+REG_DIR = "/sys/bus/pci/devices/0000:01:00.0/"
+PORT_DIR = "/sys/bus/pci/devices/0000:05:00.0/"
+
+SYSLOG_IDENTIFIER = "nokia-ledd"
+sonic_logger = logger.Logger(SYSLOG_IDENTIFIER)
+sonic_logger.set_min_log_priority_info()
+
+class LedControl(LedControlBase):
+    """Platform specific LED control class"""
+
+    # Constructor
+    def __init__(self):
+        self.chassis = sonic_platform.platform.Platform().get_chassis()
+        self._initDefaultConfig()        
+
+    def _initDefaultConfig(self):
+        # The fan tray leds and system led managed by new chassis class API
+        # leaving only a couple other front panel leds to be done old style
+        sonic_logger.log_info("starting system leds")
+
+        if multi_asic.is_multi_asic():
+            # Load the namespace details first from the database_global.json file.
+            swsscommon.SonicDBConfig.initializeGlobalConfig()
+
+        # Get the namespaces in the platform. For multi-asic devices we get the namespaces
+        # of front-end ascis which have front-panel interfaces.
+        namespaces = multi_asic.get_front_end_namespaces()
+
+        # Subscribe to PORT table notifications in the Application DB
+        appl_db = {}
+        self.sst = {}
+        self.sel = swsscommon.Select()
+
+        for namespace in namespaces:
+            # Open a handle to the Application database, in all namespaces
+            appl_db[namespace] = daemon_base.db_connect("APPL_DB", namespace=namespace)
+            self.sst[namespace] = swsscommon.SubscriberStateTable(appl_db[namespace], swsscommon.APP_PORT_TABLE_NAME)
+            self.sel.addSelectable(self.sst[namespace])
+
+        self._pre_port_led_stat = ['off'] * QSFP_NUMS
+        
+        self._initSystemLed()
+
+    def _write_sysfs_file(self, sysfs_file, value):
+        # On successful write, the value read will be written on
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'w') as fd:
+                rv = fd.write(value)
+                fd.close()
+        except Exception as e:
+            rv = 'ERR'
+
+        return rv
+    
+    def _initSystemLed(self):
+        self.oldfan = 'off'
+        self.oldpsu = 'off'
+        count = 0
+
+        # Timer loop to monitor and set Port Leds and 
+        # front panel Status, Fan, and PSU LEDs
+        while True:
+            self.port_state_check()
+            
+            time.sleep(0.1)
+            count = count + 1
+            if count == 60:
+                self.fp_check()
+                count = 0
+                
+    def port_state_check(self):
+        # Use timeout to prevent ignoring the signals we want to handle
+        # in signal_handler() (e.g. SIGTERM for graceful shutdown)
+        (state, selectableObj) = self.sel.select(SELECT_TIMEOUT)
+
+        if state == swsscommon.Select.TIMEOUT:
+            # Do not flood log when select times out
+            return 1
+
+        if state != swsscommon.Select.OBJECT:
+            sonic_logger.log_warning("sel.select() did not return swsscommon.Select.OBJECT")
+            return 2
+
+        # Get the redisselect object from selectable object
+        redisSelectObj = swsscommon.CastSelectableToRedisSelectObj(selectableObj)
+
+        # Get the corresponding namespace from redisselect db connector object
+        namespace = redisSelectObj.getDbConnector().getNamespace()
+
+        (key, op, fvp) = self.sst[namespace].pop()
+        if fvp:
+            # TODO: Once these flag entries have been removed from the DB,
+            # we can remove this check
+            if key in ["PortConfigDone", "PortInitDone"]:
+                return 3
+
+            fvp_dict = dict(fvp)
+
+            if op == "SET" and "oper_status" in fvp_dict:
+                if not key.startswith((backplane_prefix(), inband_prefix(), recirc_prefix())):
+                    self.port_link_state_change(key, fvp_dict["oper_status"])
+        else:
+            return 4
+
+        return 0
+    
+    def port_link_state_change(self, port, state):
+        """
+        Called when port link state changes. Update port link state LED here.
+
+        :param port: A string, SONiC port name (e.g., "Ethernet0")
+        :param state: A string, the port link state (either "up" or "down")
+        """
+        intf_prefix = 'Ethernet'
+        if port.startswith(intf_prefix) is False:
+            return
+        else:
+            port_idx = int(port[len(intf_prefix):]) // 8 + 1
+            if port_idx < 1 or port_idx > QSFP_NUMS:
+                return
+
+        if state == 'up':
+            if self._pre_port_led_stat[port_idx-1] != 'green':
+                self._write_sysfs_file(PORT_DIR + f"port_{port_idx}_led", '0x1')
+                self._pre_port_led_stat[port_idx-1] = 'green'
+        elif state == 'down':
+            if self._pre_port_led_stat[port_idx-1] != 'off':
+                self._write_sysfs_file(PORT_DIR + f"port_{port_idx}_led", '0x0')
+                self._pre_port_led_stat[port_idx-1] = 'off'
+        else:
+            return
+    
+    def fp_check(self):
+        # Front Panel FAN Panel LED setting
+        good_fan_drawer = 0
+        for fan_drawer in self.chassis._fan_drawer_list:
+            if fan_drawer.get_status() == True:
+                good_fan_drawer = good_fan_drawer + 1
+                fan_drawer.set_status_led('green')
+            else:
+                fan_drawer.set_status_led('amber')
+        
+        if (good_fan_drawer == FAN_DRAWERS):
+            if self.oldfan != 'green':
+                self._write_sysfs_file(REG_DIR + 'led_fan', '0x6400')
+                self.oldfan = 'green'
+        else:
+            if self.oldfan != 'amber':
+                self._write_sysfs_file(REG_DIR + 'led_fan', '0xa4c700')
+                self.oldfan = 'amber'
+        
+        # Front Panel PSU Panel LED setting
+        if (self.chassis.get_psu(0).get_status() == self.chassis.get_psu(1).get_status() == True):
+            if self.oldpsu != 'green':
+                self._write_sysfs_file(REG_DIR + 'led_psu', '0x6400')
+                self.oldpsu = 'green'
+        else:
+            if self.oldpsu != 'amber':
+                self._write_sysfs_file(REG_DIR + 'led_psu', '0xa4c700')
+                self.oldpsu = 'amber'
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/plugins/ssd_util.py b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/plugins/ssd_util.py
new file mode 100755
index 00000000000..1a98e477ee3
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/plugins/ssd_util.py
@@ -0,0 +1,139 @@
+#
+# ssd_util.py
+#
+
+try:
+    import re
+    import subprocess
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+NOT_AVAILABLE = "N/A"
+SMARTCTL = "smartctl {} -a"
+GENERIC_HEALTH_ID = 169
+PHISON_HEALTH_ID = 231
+
+class SsdUtil(StorageBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+
+        self.vendor_ssd_utility = {
+            "Generic"  : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }
+        }
+
+        self.dev = diskdev
+        self.fetch_parse_info(diskdev)
+
+    def fetch_parse_info(self, diskdev):
+        self.fetch_generic_ssd_info(diskdev)
+        self.parse_generic_ssd_info()
+
+    def _execute_shell(self, cmd):
+        process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+        output, error = process.communicate()
+        return output
+
+    def _parse_re(self, pattern, buffer):
+        res_list = re.findall(pattern, buffer)
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def fetch_generic_ssd_info(self, diskdev):
+        self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+    def parse_generic_ssd_info(self):
+        self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+        if self.model.startswith('VTSM'):
+            health_id = PHISON_HEALTH_ID
+        else:
+            health_id = GENERIC_HEALTH_ID
+
+        health_raw = self.parse_id_number(health_id, self.ssd_info)
+        if health_raw == NOT_AVAILABLE:
+            self.health = NOT_AVAILABLE
+        else: self.health = health_raw.split()[-1]
+
+        temp_raw = self._parse_re('Temperature_Celsius\s*(.+?)\n', self.ssd_info)
+        if temp_raw == NOT_AVAILABLE:
+            self.temperature = NOT_AVAILABLE
+        else:
+            self.temperature = temp_raw.split()[7].split()[0]
+
+        self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        return self.health
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        return self.temperature
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
+    def parse_id_number(self, id, buffer):
+        if buffer:
+            buffer_lines = buffer.split('\n')
+            for line in buffer_lines:
+                if line.strip().startswith(str(id)):
+                    return line[len(str(id)):]
+
+        return NOT_AVAILABLE
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/pmon_daemon_control.json b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/pmon_daemon_control.json
new file mode 100644
index 00000000000..94592fa8ceb
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "skip_ledd": true
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/services.conf b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/services.conf
new file mode 100644
index 00000000000..2a0a236a8af
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/services.conf
@@ -0,0 +1 @@
+startup_tsa_tsb.service
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/startup-tsa-tsb.conf b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/startup-tsa-tsb.conf
new file mode 100644
index 00000000000..15033749325
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/startup-tsa-tsb.conf
@@ -0,0 +1 @@
+STARTUP_TSB_TIMER=900
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/system_health_monitoring_config.json
new file mode 100644
index 00000000000..d5f3a7b9830
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/system_health_monitoring_config.json
@@ -0,0 +1,14 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "blinking green"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/thermal_policy.json
new file mode 100644
index 00000000000..5427406e643
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/thermal_policy.json
@@ -0,0 +1,67 @@
+{
+    "thermal_control_algorithm": {
+        "run_at_boot_up": "false",
+        "fan_speed_when_suspend": "60"
+    },
+    "info_types": [
+        {
+            "type": "fan_info"
+        },
+        {
+            "type": "thermal_info"
+        },
+        {
+            "type": "chassis_info"
+        }
+    ],
+    "policies": [
+        {
+            "name": "any fan absence",
+            "conditions": [
+                {
+                    "type": "fan.any.absence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal_control.control",
+                    "status": "false"
+                },
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "90"
+                }
+            ]
+        },
+        {
+            "name": "all fan presence",
+            "conditions": [
+                {
+                    "type": "fan.all.presence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal.temp_check_and_set_all_fan_speed",
+                    "default_speed": "45",
+                    "threshold1_speed": "60",
+                    "threshold2_speed": "70",
+                    "hightemp_speed": "90"
+                }
+            ]
+        },
+	{
+            "name": "temp over high critical threshold",
+            "conditions": [
+                {
+                    "type": "thermal.over.high_critical_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "switch.shutdown"
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
index b746a19540a..921fac5bf0c 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -2100,3 +2100,6 @@ trunk_group_max_members=16
 sai_default_cpu_tx_tc=7
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 sai_disable_srcmacqedstmac_ctrl=1
+sai_instru_stat_accum_enable=1
+appl_param_active_links_thr_low=1
+appl_param_active_links_thr_high=112
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
index 81e490410c8..d60508a6c35 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -2101,3 +2101,6 @@ trunk_group_max_members=16
 sai_default_cpu_tx_tc=7
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 sai_disable_srcmacqedstmac_ctrl=1
+sai_instru_stat_accum_enable=1
+appl_param_active_links_thr_low=1
+appl_param_active_links_thr_high=112
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json
index 7c360948fcf..19dcb1ff5e9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json
@@ -4,7 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 85,
+      "monCapacityThreshWarn": 75,
       "monState": "enable"
    }
 }
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
index da3a5a7c17a..a711a73e541 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
@@ -2101,3 +2101,6 @@ sai_pfc_dlr_init_capability=0
 trunk_group_max_members=16
 sai_default_cpu_tx_tc=7
 sai_disable_srcmacqedstmac_ctrl=1
+sai_instru_stat_accum_enable=1
+appl_param_active_links_thr_low=1
+appl_param_active_links_thr_high=112
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
index 2a3743d1f80..e4b53ed97e7 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
@@ -2103,3 +2103,6 @@ sai_pfc_dlr_init_capability=0
 trunk_group_max_members=16
 sai_default_cpu_tx_tc=7
 sai_disable_srcmacqedstmac_ctrl=1
+sai_instru_stat_accum_enable=1
+appl_param_active_links_thr_low=1
+appl_param_active_links_thr_high=112
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json
index 7c360948fcf..19dcb1ff5e9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json
@@ -4,7 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 85,
+      "monCapacityThreshWarn": 75,
       "monState": "enable"
    }
 }
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/installer.conf
index e0202983dac..b1b779acdcb 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/installer.conf
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="amd_iommu=off pci=resource_alignment=48@00:03.1 pci=noaer"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="amd_iommu=off pci=resource_alignment=48@00:03.1 crashkernel=8G-:1G"
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
index 8e920732bd1..53dd91558b9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
@@ -1399,3 +1399,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
index 2768b97881b..0c73e87cb0a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
@@ -1396,3 +1396,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
index f4744e6b736..a6944650f49 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
@@ -1395,3 +1395,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
index 4529e2a1455..d84833c2d42 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
@@ -1396,3 +1396,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
index a5ee6b4bf50..59a8568fb6f 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
@@ -1395,3 +1395,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
index 160f2e3b7bc..f1102119110 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
@@ -1396,3 +1396,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
index 4537abd251c..bebf0e6fbc1 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
@@ -1397,3 +1397,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
index 0bd17ca6aa0..2a38e866863 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
@@ -1396,3 +1396,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
index 036df946101..e33171e5c9f 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
@@ -1395,3 +1395,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
index 845d9048366..fd22dbf2089 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
@@ -1396,3 +1396,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
index 89cdab2df45..7de76e0cb44 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
@@ -1395,3 +1395,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
index f6ec2ab3f6d..15bf6d7d792 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
@@ -1396,3 +1396,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
index 88c6f6a6a4a..62ce901b415 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
@@ -1395,3 +1395,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
index 457e1da59c8..7e6822f53a9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
@@ -1396,3 +1396,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
index 8e291460261..b45112d20e3 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
@@ -1395,3 +1395,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
index 42d0d1f2a30..a2d93022ace 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
@@ -1396,3 +1396,4 @@ serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
 
 dpp_db_path=/usr/share/bcm/db
+sai_instru_stat_accum_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/installer.conf
index 2578a7d28be..29972b362bc 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/installer.conf
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x2f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="amd_iommu=off pci=resource_alignment=26@00:01.4 pci=noaer"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="amd_iommu=off pci=resource_alignment=26@00:01.4 crashkernel=8G-:1G"
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/context_config.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/context_config.json
new file mode 100644
index 00000000000..37e8eaa8900
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/context_config.json
@@ -0,0 +1,21 @@
+{
+    "CONTEXTS": [
+        {
+            "guid" : 0,
+            "name" : "syncd0",
+            "dbAsic" : "ASIC_DB",
+            "dbCounters" : "COUNTERS_DB",
+            "dbFlex": "FLEX_COUNTER_DB",
+            "dbState" : "STATE_DB",
+            "zmq_enable": true,
+            "zmq_endpoint": "tcp://127.0.0.1:5555",
+            "zmq_ntf_endpoint": "tcp://127.0.0.1:5556",
+            "switches": [
+                {
+                    "index" : 0,
+                    "hwinfo" : ""
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf
index 66c2a99a31e..ad01b4b0a82 100644
--- a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf
@@ -1,2 +1,2 @@
 GRUB_CMDLINE_LINUX="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x13010000 quiet"
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="isolcpus=1-13 nohz_full=1-13 rcu_nocbs=1-13"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="isolcpus=1-10 nohz_full=1-10 rcu_nocbs=1-10"
diff --git a/device/pensando/arm64-elba-asic-flash128-r0/Pensando-elba/context_config.json b/device/pensando/arm64-elba-asic-flash128-r0/Pensando-elba/context_config.json
new file mode 100644
index 00000000000..37e8eaa8900
--- /dev/null
+++ b/device/pensando/arm64-elba-asic-flash128-r0/Pensando-elba/context_config.json
@@ -0,0 +1,21 @@
+{
+    "CONTEXTS": [
+        {
+            "guid" : 0,
+            "name" : "syncd0",
+            "dbAsic" : "ASIC_DB",
+            "dbCounters" : "COUNTERS_DB",
+            "dbFlex": "FLEX_COUNTER_DB",
+            "dbState" : "STATE_DB",
+            "zmq_enable": true,
+            "zmq_endpoint": "tcp://127.0.0.1:5555",
+            "zmq_ntf_endpoint": "tcp://127.0.0.1:5556",
+            "switches": [
+                {
+                    "index" : 0,
+                    "hwinfo" : ""
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/pensando/arm64-elba-asic-flash128-r0/Pensando-elba/port_config.ini b/device/pensando/arm64-elba-asic-flash128-r0/Pensando-elba/port_config.ini
index 213c010aa66..8b2d8a104eb 100644
--- a/device/pensando/arm64-elba-asic-flash128-r0/Pensando-elba/port_config.ini
+++ b/device/pensando/arm64-elba-asic-flash128-r0/Pensando-elba/port_config.ini
@@ -1,2 +1,2 @@
 #name          lanes alias speed autoneg fec
-Ethernet0 0,1,2,3 etp1 200000 on rs
+Ethernet0 0,1,2,3 etp1 200000 off rs
diff --git a/device/pensando/arm64-elba-asic-flash128-r0/default_sku b/device/pensando/arm64-elba-asic-flash128-r0/default_sku
index 732fd350928..57e3c8fa065 100644
--- a/device/pensando/arm64-elba-asic-flash128-r0/default_sku
+++ b/device/pensando/arm64-elba-asic-flash128-r0/default_sku
@@ -1 +1 @@
-Pensando-elba t1
+Pensando-elba t1-smartswitch
diff --git a/device/pensando/arm64-elba-asic-flash128-r0/platform.json b/device/pensando/arm64-elba-asic-flash128-r0/platform.json
index 03dee435de9..38933d52919 100644
--- a/device/pensando/arm64-elba-asic-flash128-r0/platform.json
+++ b/device/pensando/arm64-elba-asic-flash128-r0/platform.json
@@ -1,4 +1,12 @@
 {
-	"interfaces": {},
-	"DPU":{}
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1",
+            "lanes": "0,1,2,3",
+            "breakout_modes": {
+                "1x200G": ["etp1"]
+            }
+        }
+    },
+    "DPU":{}
 }
diff --git a/device/pensando/arm64-elba-asic-flash128-r0/pre_reboot_hook b/device/pensando/arm64-elba-asic-flash128-r0/pre_reboot_hook
new file mode 100755
index 00000000000..574e42a1a0d
--- /dev/null
+++ b/device/pensando/arm64-elba-asic-flash128-r0/pre_reboot_hook
@@ -0,0 +1,26 @@
+#!/bin/bash
+
+LOG_MSG() {
+    echo "$1" | tee /dev/kmsg /dev/stderr /dev/console
+}
+
+LOG_MSG "Flushing file system buffers..."
+sync
+
+LOG_MSG "Flushing eMMC partitions..."
+for dev in $(lsblk -nd -o NAME | grep -E 'mmcblk'); do
+    LOG_MSG "Flushing /dev/$dev"
+    blockdev --flushbufs "/dev/$dev"
+done
+
+LOG_MSG "Ensuring all IOs are completed..."
+sync
+sleep 2  # Give time for completion
+
+LOG_MSG "Dropping caches..."
+LOG_MSG 3 > /proc/sys/vm/drop_caches
+LOG_MSG "Cache cleared."
+
+LOG_MSG "Pre-reboot flush and cache clear complete."
+LOG_MSG "Platform specific pre-shutdown is successful"
+
diff --git a/device/pensando/arm64-elba-asic-flash128-r0/system_health_monitoring_config.json b/device/pensando/arm64-elba-asic-flash128-r0/system_health_monitoring_config.json
index 6e51604ac60..b4440ac5041 100644
--- a/device/pensando/arm64-elba-asic-flash128-r0/system_health_monitoring_config.json
+++ b/device/pensando/arm64-elba-asic-flash128-r0/system_health_monitoring_config.json
@@ -1,5 +1,5 @@
 {
-    "services_to_ignore": [],
+    "services_to_ignore": ["vlanmgrd", "vxlanmgrd"],
     "devices_to_ignore": ["psu","fan"],
     "user_defined_checkers": ["fetch_dpu_status"],
     "polling_interval": 60,
@@ -8,4 +8,4 @@
         "normal": "green",
         "booting": "amber_blink"
     }
-}
\ No newline at end of file
+}
diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json
index 58aa6892210..3f2a4c4d6bf 100644
--- a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json
+++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json
@@ -81,7 +81,7 @@
     },
     "SMBUS1": {
         "dev_info": {
-            "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM" 
+            "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM"
         },
         "i2c": {
             "topo_info": {
@@ -102,7 +102,7 @@
                 },
                 {
                     "dev": "FAN-CTRL"
-                }                
+                }
             ]
         }
     },
@@ -326,7 +326,7 @@
                 }
             ]
         }
-    },   
+    },
     "GPIO2": {
         "dev_info": {
             "device_type": "GPIO",
@@ -663,7 +663,7 @@
                 }
             ]
         }
-    }, 
+    },
     "CPLD1": {
         "dev_info": {
             "device_type": "CPLD",
@@ -851,7 +851,7 @@
                 }
             ]
         }
-    },    
+    },
     "PSU1": {
         "dev_info": {
             "device_type": "PSU",
@@ -879,7 +879,7 @@
                     }
                 ]
             }
-        }        
+        }
     },
     "PSU1-PMBUS": {
         "dev_info": {
@@ -949,7 +949,7 @@
                     "attr_mask": "0x0",
                     "attr_cmpval": "0xff",
                     "attr_len": "2"
-                },                
+                },
                 {
                     "attr_name": "psu_v_out",
                     "attr_devaddr": "0x58",
@@ -1027,7 +1027,7 @@
     },
     "PSU1-EEPROM":
     {
-        "dev_info": { 
+        "dev_info": {
             "device_type":"",
             "device_name":"PSU1-EEPROM",
             "device_parent":"MUX1",
@@ -1035,17 +1035,17 @@
         },
         "i2c":
         {
-            "topo_info":{ 
+            "topo_info":{
                 "parent_bus":"0x2",
                 "dev_addr":"0x50",
                 "dev_type":"eeprom"
-            }, 
-            "attr_list": 
-            [  
+            },
+            "attr_list":
+            [
                 { "attr_name":"eeprom" }
             ]
         }
-    },    
+    },
     "PSU2": {
         "dev_info": {
             "device_type": "PSU",
@@ -1073,7 +1073,7 @@
                     }
                 ]
             }
-        }        
+        }
     },
     "PSU2-PMBUS": {
         "dev_info": {
@@ -1143,7 +1143,7 @@
                     "attr_mask": "0x0",
                     "attr_cmpval": "0xff",
                     "attr_len": "2"
-                },                
+                },
                 {
                     "attr_name": "psu_v_out",
                     "attr_devaddr": "0x59",
@@ -1218,10 +1218,10 @@
                 }
             ]
         }
-    },    
+    },
     "PSU2-EEPROM":
     {
-        "dev_info": { 
+        "dev_info": {
             "device_type":"",
             "device_name":"PSU2-EEPROM",
             "device_parent":"MUX1",
@@ -1229,17 +1229,17 @@
         },
         "i2c":
         {
-            "topo_info":{ 
+            "topo_info":{
                 "parent_bus":"0x2",
                 "dev_addr":"0x51",
                 "dev_type":"eeprom"
-            }, 
-            "attr_list": 
-            [  
+            },
+            "attr_list":
+            [
                 { "attr_name":"eeprom" }
             ]
         }
-    }, 
+    },
     "FAN-CTRL": {
         "dev_info": {
             "device_type": "FAN",
@@ -1296,7 +1296,7 @@
                 }
             ]
         }
-    },                                                         
+    },
     "SYS_LED": {
         "dev_info": {
             "device_type": "LED",
@@ -2343,4 +2343,4 @@
             ]
         }
     }
-}
\ No newline at end of file
+}
diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/td3-x5-s7801-54xs.config.bcm b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/td3-x5-s7801-54xs.config.bcm
index bfbc045d02e..2b373e1b474 100644
--- a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/td3-x5-s7801-54xs.config.bcm
+++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/td3-x5-s7801-54xs.config.bcm
@@ -379,7 +379,7 @@ portmap_59=57:100
 #FC19 not use
 
 # dport
-dport_map_enable=1
+dport_map_enable=0
 
 dport_map_port_1=1
 dport_map_port_2=2
diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/td3-x5-s8901-54xc.config.bcm b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/td3-x5-s8901-54xc.config.bcm
index 37d9d8ec80d..e2d3613506c 100644
--- a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/td3-x5-s8901-54xc.config.bcm
+++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/td3-x5-s8901-54xc.config.bcm
@@ -379,7 +379,7 @@ portmap_59=57:100
 #FC19 not use
 
 # dport
-dport_map_enable=1
+dport_map_enable=0
 
 dport_map_port_1=1
 dport_map_port_2=2
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm
index 5a82d6e2fa6..47ed702a3db 100644
--- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm
+++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm
@@ -605,7 +605,7 @@ portmap_123=121:100
 portmap_127=125:100
 
 
-dport_map_enable=1
+dport_map_enable=0
 
 dport_map_port_1=1
 dport_map_port_5=2
diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml
old mode 100755
new mode 100644
diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json
index c741940a1c1..cb40707fb05 100644
--- a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json
+++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json
@@ -24,10 +24,6 @@
             "i2c":
             {
                 "valmap": { "1":true, "0":false }
-            },
-            "bmc":
-            {
-                "valmap": { "Device Present":true, "Device Absent":false }
             }
         }, 
 		
@@ -36,11 +32,7 @@
             "i2c":
             {
                 "valmap": { "1": true, "0":false }
-            },
-            "bmc":
-            {
-                "valmap": { "State Asserted":true, "State Deasserted":false }
-            }        
+            }
         },
 
         "psu_fan_dir":
diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json
index dbb64c7dbc9..9f656f911b6 100644
--- a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json
+++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json
@@ -185,7 +185,7 @@
                         "raw": "0",
                         "field_name": "TEMP_CPU_ENV",
                         "field_pos": "18"
-                    }               
+                    }
                 ]
             }
         }
@@ -407,6 +407,14 @@
                 {
                     "chn": "4",
                     "dev": "GPIO2"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PSU1"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PSU2"
                 }
             ]
         }
@@ -1060,34 +1068,20 @@
         "dev_info": {
             "device_type": "PSU",
             "device_name": "PSU1",
-            "device_parent": "SMBUS0"
+            "device_parent": "MUX1"
         },
         "dev_attr": {
             "dev_idx": "1",
             "num_psu_fans": "1"
         },
         "i2c": {
-            "interface": []
+            "interface": [
+                { "itf":"eeprom", "dev":"PSU1-EEPROM" }
+            ]
         },
         "bmc": {
             "ipmitool": {
                 "attr_list": [
-                    {
-                        "attr_name": "psu_present",
-                        "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU0_PRSNT_L",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
-                    {
-                        "attr_name": "psu_power_good",
-                        "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU0_PWROK_H",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
                     {
                         "attr_name": "psu_v_out",
                         "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
@@ -1175,38 +1169,59 @@
             }
         }
     },
+    "PSU1-EEPROM": {
+        "dev_info": {
+            "device_type": "PSU-EEPROM",
+            "device_name": "PSU1-EEPROM",
+            "device_parent": "MUX1",
+            "virt_parent": "PSU1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x5a",
+                "dev_type": "psu_eeprom"
+            },
+            "attr_list": [
+                {
+                    "attr_name":"psu_present",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x4",
+                    "attr_cmpval":"0x0",
+                    "attr_len":"1"
+                },
+                {
+                    "attr_name":"psu_power_good",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x1",
+                    "attr_cmpval":"0x1",
+                    "attr_len":"1"
+                }
+            ]
+        }
+    },
     "PSU2": {
         "dev_info": {
             "device_type": "PSU",
             "device_name": "PSU2",
-            "device_parent": "SMBUS0"
+            "device_parent": "MUX1"
         },
         "dev_attr": {
             "dev_idx": "2",
             "num_psu_fans": "1"
         },
         "i2c": {
-            "interface": []
+            "interface": [
+                { "itf":"eeprom", "dev":"PSU2-EEPROM" }
+            ]
         },
         "bmc": {
             "ipmitool": {
                 "attr_list": [
-                    {
-                        "attr_name": "psu_present",
-                        "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU1_PRSNT_L",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
-                    {
-                        "attr_name": "psu_power_good",
-                        "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU1_PWROK_H",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
                     {
                         "attr_name": "psu_v_out",
                         "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
@@ -1294,6 +1309,41 @@
             }
         }
     },
+    "PSU2-EEPROM": {
+        "dev_info": {
+            "device_type": "PSU-EEPROM",
+            "device_name": "PSU2-EEPROM",
+            "device_parent": "MUX1",
+            "virt_parent": "PSU2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x5b",
+                "dev_type": "psu_eeprom"
+            },
+            "attr_list": [
+                {
+                    "attr_name":"psu_present",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x8",
+                    "attr_cmpval":"0x0",
+                    "attr_len":"1"
+                },
+                {
+                    "attr_name":"psu_power_good",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x2",
+                    "attr_cmpval":"0x2",
+                    "attr_len":"1"
+                }
+            ]
+        }
+    },
     "FAN-CTRL": {
         "dev_info": {
             "device_type": "FAN",
@@ -1722,7 +1772,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT1": {
         "dev_info": {
             "device_type": "QSFP-DD",
diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform.json
index 71a41880e6a..efa10958e84 100644
--- a/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform.json
+++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform.json
@@ -292,9 +292,22 @@
             "lanes": "1,2,3,4,5,6,7,8",
             "breakout_modes": {
                 "1x400G": ["Eth0(Port0)"],
+                "1x200G(4)": ["Eth0(Port0)"],
+                "1x100G(2)": ["Eth0(Port0)"],
+                "1x100G(4)": ["Eth0(Port0)"],
+                "1x50G(2)": ["Eth0(Port0)"],
+                "1x40G(4)": ["Eth0(Port0)"],
+                "1x25G(1)": ["Eth0(Port0)"],
                 "2x200G": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
+                "2x100G": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
+                "2x50G(2)": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
+                "2x50G(4)": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
+                "2x40G": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
                 "4x100G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"],
-                "8x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)", "Eth0/5(Port0)", "Eth0/6(Port0)", "Eth0/7(Port0)", "Eth0/8(Port0)"]
+                "4x25G(4)": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"],
+                "4x10G(4)": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"],
+                "8x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)", "Eth0/5(Port0)", "Eth0/6(Port0)", "Eth0/7(Port0)", "Eth0/8(Port0)"],
+                "8x25G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)", "Eth0/5(Port0)", "Eth0/6(Port0)", "Eth0/7(Port0)", "Eth0/8(Port0)"]
             }
         },
 
@@ -303,9 +316,22 @@
             "lanes": "9,10,11,12,13,14,15,16",
             "breakout_modes": {
                 "1x400G": ["Eth1(Port1)"],
+                "1x200G(4)": ["Eth1(Port1)"],
+                "1x100G(2)": ["Eth1(Port1)"],
+                "1x100G(4)": ["Eth1(Port1)"],
+                "1x50G(2)": ["Eth1(Port1)"],
+                "1x40G(4)": ["Eth1(Port1)"],
+                "1x25G(1)": ["Eth1(Port1)"],
                 "2x200G": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "2x100G": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "2x50G(2)": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "2x50G(4)": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "2x40G": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
                 "4x100G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"],
-                "8x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)", "Eth1/5(Port1)", "Eth1/6(Port1)", "Eth1/7(Port1)", "Eth1/8(Port1)"]
+                "4x25G(4)": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"],
+                "4x10G(4)": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"],
+                "8x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)", "Eth1/5(Port1)", "Eth1/6(Port1)", "Eth1/7(Port1)", "Eth1/8(Port1)"],
+                "8x25G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)", "Eth1/5(Port1)", "Eth1/6(Port1)", "Eth1/7(Port1)", "Eth1/8(Port1)"]
             }
        },
 
@@ -314,9 +340,22 @@
             "lanes": "17,18,19,20,21,22,23,24",
             "breakout_modes": {
                 "1x400G": ["Eth2(Port2)"],
+                "1x200G(4)": ["Eth2(Port2)"],
+                "1x100G(2)": ["Eth2(Port2)"],
+                "1x100G(4)": ["Eth2(Port2)"],
+                "1x50G(2)": ["Eth2(Port2)"],
+                "1x40G(4)": ["Eth2(Port2)"],
+                "1x25G(1)": ["Eth2(Port2)"],
                 "2x200G": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "2x100G": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "2x50G(2)": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "2x50G(4)": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "2x40G": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
                 "4x100G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"],
-                "8x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)", "Eth2/5(Port2)", "Eth2/6(Port2)", "Eth2/7(Port2)", "Eth2/8(Port2)"]
+                "4x25G(4)": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"],
+                "4x10G(4)": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"],
+                "8x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)", "Eth2/5(Port2)", "Eth2/6(Port2)", "Eth2/7(Port2)", "Eth2/8(Port2)"],
+                "8x25G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)", "Eth2/5(Port2)", "Eth2/6(Port2)", "Eth2/7(Port2)", "Eth2/8(Port2)"]
             }
         },
 
@@ -325,9 +364,22 @@
             "lanes": "25,26,27,28,29,30,31,32",
             "breakout_modes": {
                 "1x400G": ["Eth3(Port3)"],
+                "1x200G(4)": ["Eth3(Port3)"],
+                "1x100G(2)": ["Eth3(Port3)"],
+                "1x100G(4)": ["Eth3(Port3)"],
+                "1x50G(2)": ["Eth3(Port3)"],
+                "1x40G(4)": ["Eth3(Port3)"],
+                "1x25G(1)": ["Eth3(Port3)"],
                 "2x200G": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "2x100G": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "2x50G(2)": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "2x50G(4)": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "2x40G": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
                 "4x100G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"],
-                "8x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)", "Eth3/5(Port3)", "Eth3/6(Port3)", "Eth3/7(Port3)", "Eth3/8(Port3)"]
+                "4x25G(4)": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"],
+                "4x10G(4)": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"],
+                "8x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)", "Eth3/5(Port3)", "Eth3/6(Port3)", "Eth3/7(Port3)", "Eth3/8(Port3)"],
+                "8x25G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)", "Eth3/5(Port3)", "Eth3/6(Port3)", "Eth3/7(Port3)", "Eth3/8(Port3)"]
             }
         },
 
@@ -336,9 +388,22 @@
             "lanes": "33,34,35,36,37,38,39,40",
             "breakout_modes": {
                 "1x400G": ["Eth4(Port4)"],
+                "1x200G(4)": ["Eth4(Port4)"],
+                "1x100G(2)": ["Eth4(Port4)"],
+                "1x100G(4)": ["Eth4(Port4)"],
+                "1x50G(2)": ["Eth4(Port4)"],
+                "1x40G(4)": ["Eth4(Port4)"],
+                "1x25G(1)": ["Eth4(Port4)"],
                 "2x200G": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "2x100G": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "2x50G(2)": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "2x50G(4)": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "2x40G": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
                 "4x100G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"],
-                "8x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)", "Eth4/5(Port4)", "Eth4/6(Port4)", "Eth4/7(Port4)", "Eth4/8(Port4)"]
+                "4x25G(4)": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"],
+                "4x10G(4)": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"],
+                "8x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)", "Eth4/5(Port4)", "Eth4/6(Port4)", "Eth4/7(Port4)", "Eth4/8(Port4)"],
+                "8x25G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)", "Eth4/5(Port4)", "Eth4/6(Port4)", "Eth4/7(Port4)", "Eth4/8(Port4)"]
             }
         },
 
@@ -347,9 +412,22 @@
             "lanes": "41,42,43,44,45,46,47,48",
             "breakout_modes": {
                 "1x400G": ["Eth5(Port5)"],
+                "1x200G(4)": ["Eth5(Port5)"],
+                "1x100G(2)": ["Eth5(Port5)"],
+                "1x100G(4)": ["Eth5(Port5)"],
+                "1x50G(2)": ["Eth5(Port5)"],
+                "1x40G(4)": ["Eth5(Port5)"],
+                "1x25G(1)": ["Eth5(Port5)"],
                 "2x200G": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "2x100G": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "2x50G(2)": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "2x50G(4)": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "2x40G": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
                 "4x100G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"],
-                "8x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)", "Eth5/5(Port5)", "Eth5/6(Port5)", "Eth5/7(Port5)", "Eth5/8(Port5)"]
+                "4x25G(4)": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"],
+                "4x10G(4)": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"],
+                "8x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)", "Eth5/5(Port5)", "Eth5/6(Port5)", "Eth5/7(Port5)", "Eth5/8(Port5)"],
+                "8x25G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)", "Eth5/5(Port5)", "Eth5/6(Port5)", "Eth5/7(Port5)", "Eth5/8(Port5)"]
             }
         },
 
@@ -358,9 +436,22 @@
             "lanes": "49,50,51,52,53,54,55,56",
             "breakout_modes": {
                 "1x400G": ["Eth6(Port6)"],
+                "1x200G(4)": ["Eth6(Port6)"],
+                "1x100G(2)": ["Eth6(Port6)"],
+                "1x100G(4)": ["Eth6(Port6)"],
+                "1x50G(2)": ["Eth6(Port6)"],
+                "1x40G(4)": ["Eth6(Port6)"],
+                "1x25G(1)": ["Eth6(Port6)"],
                 "2x200G": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "2x100G": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "2x50G(2)": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "2x50G(4)": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "2x40G": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
                 "4x100G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"],
-                "8x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)", "Eth6/5(Port6)", "Eth6/6(Port6)", "Eth6/7(Port6)", "Eth6/8(Port6)"]
+                "4x25G(4)": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"],
+                "4x10G(4)": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"],
+                "8x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)", "Eth6/5(Port6)", "Eth6/6(Port6)", "Eth6/7(Port6)", "Eth6/8(Port6)"],
+                "8x25G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)", "Eth6/5(Port6)", "Eth6/6(Port6)", "Eth6/7(Port6)", "Eth6/8(Port6)"]
             }
         },
 
@@ -369,9 +460,22 @@
             "lanes": "57,58,59,60,61,62,63,64",
             "breakout_modes": {
                 "1x400G": ["Eth7(Port7)"],
+                "1x200G(4)": ["Eth7(Port7)"],
+                "1x100G(2)": ["Eth7(Port7)"],
+                "1x100G(4)": ["Eth7(Port7)"],
+                "1x50G(2)": ["Eth7(Port7)"],
+                "1x40G(4)": ["Eth7(Port7)"],
+                "1x25G(1)": ["Eth7(Port7)"],
                 "2x200G": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "2x100G": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "2x50G(2)": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "2x50G(4)": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "2x40G": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
                 "4x100G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"],
-                "8x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)", "Eth7/5(Port7)", "Eth7/6(Port7)", "Eth7/7(Port7)", "Eth7/8(Port7)"]
+                "4x25G(4)": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"],
+                "4x10G(4)": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"],
+                "8x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)", "Eth7/5(Port7)", "Eth7/6(Port7)", "Eth7/7(Port7)", "Eth7/8(Port7)"],
+                "8x25G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)", "Eth7/5(Port7)", "Eth7/6(Port7)", "Eth7/7(Port7)", "Eth7/8(Port7)"]
             }
         },
 
@@ -380,9 +484,22 @@
             "lanes": "65,66,67,68,69,70,71,72",
             "breakout_modes": {
                 "1x400G": ["Eth8(Port8)"],
+                "1x200G(4)": ["Eth8(Port8)"],
+                "1x100G(2)": ["Eth8(Port8)"],
+                "1x100G(4)": ["Eth8(Port8)"],
+                "1x50G(2)": ["Eth8(Port8)"],
+                "1x40G(4)": ["Eth8(Port8)"],
+                "1x25G(1)": ["Eth8(Port8)"],
                 "2x200G": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "2x100G": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "2x50G(2)": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "2x50G(4)": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "2x40G": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
                 "4x100G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"],
-                "8x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)", "Eth8/5(Port8)", "Eth8/6(Port8)", "Eth8/7(Port8)", "Eth8/8(Port8)"]
+                "4x25G(4)": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"],
+                "4x10G(4)": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"],
+                "8x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)", "Eth8/5(Port8)", "Eth8/6(Port8)", "Eth8/7(Port8)", "Eth8/8(Port8)"],
+                "8x25G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)", "Eth8/5(Port8)", "Eth8/6(Port8)", "Eth8/7(Port8)", "Eth8/8(Port8)"]
             }
         },
 
@@ -391,9 +508,22 @@
             "lanes": "73,74,75,76,77,78,79,80",
             "breakout_modes": {
                 "1x400G": ["Eth9(Port9)"],
+                "1x200G(4)": ["Eth9(Port9)"],
+                "1x100G(2)": ["Eth9(Port9)"],
+                "1x100G(4)": ["Eth9(Port9)"],
+                "1x50G(2)": ["Eth9(Port9)"],
+                "1x40G(4)": ["Eth9(Port9)"],
+                "1x25G(1)": ["Eth9(Port9)"],
                 "2x200G": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "2x100G": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "2x50G(2)": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "2x50G(4)": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "2x40G": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
                 "4x100G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"],
-                "8x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)", "Eth9/5(Port9)", "Eth9/6(Port9)", "Eth9/7(Port9)", "Eth9/8(Port9)"]
+                "4x25G(4)": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"],
+                "4x10G(4)": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"],
+                "8x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)", "Eth9/5(Port9)", "Eth9/6(Port9)", "Eth9/7(Port9)", "Eth9/8(Port9)"],
+                "8x25G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)", "Eth9/5(Port9)", "Eth9/6(Port9)", "Eth9/7(Port9)", "Eth9/8(Port9)"]
             }
         },
 
@@ -402,9 +532,22 @@
             "lanes": "81,82,83,84,85,86,87,88",
             "breakout_modes": {
                 "1x400G": ["Eth10(Port10)"],
+                "1x200G(4)": ["Eth10(Port10)"],
+                "1x100G(2)": ["Eth10(Port10)"],
+                "1x100G(4)": ["Eth10(Port10)"],
+                "1x50G(2)": ["Eth10(Port10)"],
+                "1x40G(4)": ["Eth10(Port10)"],
+                "1x25G(1)": ["Eth10(Port10)"],
                 "2x200G": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "2x100G": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "2x50G(2)": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "2x50G(4)": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "2x40G": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
                 "4x100G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"],
-                "8x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)", "Eth10/5(Port10)", "Eth10/6(Port10)", "Eth10/7(Port10)", "Eth10/8(Port10)"]
+                "4x25G(4)": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"],
+                "4x10G(4)": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"],
+                "8x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)", "Eth10/5(Port10)", "Eth10/6(Port10)", "Eth10/7(Port10)", "Eth10/8(Port10)"],
+                "8x25G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)", "Eth10/5(Port10)", "Eth10/6(Port10)", "Eth10/7(Port10)", "Eth10/8(Port10)"]
             }
         },
         
@@ -413,9 +556,22 @@
             "lanes": "89,90,91,92,93,94,95,96",
             "breakout_modes": {
                 "1x400G": ["Eth11(Port11)"],
+                "1x200G(4)": ["Eth11(Port11)"],
+                "1x100G(2)": ["Eth11(Port11)"],
+                "1x100G(4)": ["Eth11(Port11)"],
+                "1x50G(2)": ["Eth11(Port11)"],
+                "1x40G(4)": ["Eth11(Port11)"],
+                "1x25G(1)": ["Eth11(Port11)"],
                 "2x200G": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "2x100G": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "2x50G(2)": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "2x50G(4)": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "2x40G": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
                 "4x100G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"],
-                "8x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)", "Eth11/5(Port11)", "Eth11/6(Port11)", "Eth11/7(Port11)", "Eth11/8(Port11)"]
+                "4x25G(4)": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"],
+                "4x10G(4)": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"],
+                "8x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)", "Eth11/5(Port11)", "Eth11/6(Port11)", "Eth11/7(Port11)", "Eth11/8(Port11)"],
+                "8x25G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)", "Eth11/5(Port11)", "Eth11/6(Port11)", "Eth11/7(Port11)", "Eth11/8(Port11)"]
             }
         },
         
@@ -424,9 +580,22 @@
             "lanes": "97,98,99,100,101,102,103,104",
             "breakout_modes": {
                 "1x400G": ["Eth12(Port12)"],
+                "1x200G(4)": ["Eth12(Port12)"],
+                "1x100G(2)": ["Eth12(Port12)"],
+                "1x100G(4)": ["Eth12(Port12)"],
+                "1x50G(2)": ["Eth12(Port12)"],
+                "1x40G(4)": ["Eth12(Port12)"],
+                "1x25G(1)": ["Eth12(Port12)"],
                 "2x200G": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "2x100G": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "2x50G(2)": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "2x50G(4)": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "2x40G": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
                 "4x100G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"],
-                "8x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)", "Eth12/5(Port12)", "Eth12/6(Port12)", "Eth12/7(Port12)", "Eth12/8(Port12)"]
+                "4x25G(4)": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"],
+                "4x10G(4)": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"],
+                "8x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)", "Eth12/5(Port12)", "Eth12/6(Port12)", "Eth12/7(Port12)", "Eth12/8(Port12)"],
+                "8x25G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)", "Eth12/5(Port12)", "Eth12/6(Port12)", "Eth12/7(Port12)", "Eth12/8(Port12)"]
             }
         },
 
@@ -435,9 +604,22 @@
             "lanes": "105,106,107,108,109,110,111,112",
             "breakout_modes": {
                 "1x400G": ["Eth13(Port13)"],
+                "1x200G(4)": ["Eth13(Port13)"],
+                "1x100G(2)": ["Eth13(Port13)"],
+                "1x100G(4)": ["Eth13(Port13)"],
+                "1x50G(2)": ["Eth13(Port13)"],
+                "1x40G(4)": ["Eth13(Port13)"],
+                "1x25G(1)": ["Eth13(Port13)"],
                 "2x200G": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "2x100G": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "2x50G(2)": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "2x50G(4)": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "2x40G": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
                 "4x100G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"],
-                "8x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)", "Eth13/5(Port13)", "Eth13/6(Port13)", "Eth13/7(Port13)", "Eth13/8(Port13)"]
+                "4x25G(4)": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"],
+                "4x10G(4)": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"],
+                "8x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)", "Eth13/5(Port13)", "Eth13/6(Port13)", "Eth13/7(Port13)", "Eth13/8(Port13)"],
+                "8x25G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)", "Eth13/5(Port13)", "Eth13/6(Port13)", "Eth13/7(Port13)", "Eth13/8(Port13)"]
             }
         },
 
@@ -446,9 +628,22 @@
             "lanes": "113,114,115,116,117,118,119,120",
             "breakout_modes": {
                 "1x400G": ["Eth14(Port14)"],
+                "1x200G(4)": ["Eth14(Port14)"],
+                "1x100G(2)": ["Eth14(Port14)"],
+                "1x100G(4)": ["Eth14(Port14)"],
+                "1x50G(2)": ["Eth14(Port14)"],
+                "1x40G(4)": ["Eth14(Port14)"],
+                "1x25G(1)": ["Eth14(Port14)"],
                 "2x200G": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "2x100G": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "2x50G(2)": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "2x50G(4)": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "2x40G": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
                 "4x100G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"],
-                "8x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)", "Eth14/5(Port14)", "Eth14/6(Port14)", "Eth14/7(Port14)", "Eth14/8(Port14)"]
+                "4x25G(4)": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"],
+                "4x10G(4)": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"],
+                "8x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)", "Eth14/5(Port14)", "Eth14/6(Port14)", "Eth14/7(Port14)", "Eth14/8(Port14)"],
+                "8x25G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)", "Eth14/5(Port14)", "Eth14/6(Port14)", "Eth14/7(Port14)", "Eth14/8(Port14)"]
             }
         },
 
@@ -457,9 +652,22 @@
             "lanes": "121,122,123,124,125,126,127,128",
             "breakout_modes": {
                 "1x400G": ["Eth15(Port15)"],
+                "1x200G(4)": ["Eth15(Port15)"],
+                "1x100G(2)": ["Eth15(Port15)"],
+                "1x100G(4)": ["Eth15(Port15)"],
+                "1x50G(2)": ["Eth15(Port15)"],
+                "1x40G(4)": ["Eth15(Port15)"],
+                "1x25G(1)": ["Eth15(Port15)"],
                 "2x200G": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "2x100G": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "2x50G(2)": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "2x50G(4)": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "2x40G": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
                 "4x100G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"],
-                "8x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)", "Eth15/5(Port15)", "Eth15/6(Port15)", "Eth15/7(Port15)", "Eth15/8(Port15)"]
+                "4x25G(4)": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"],
+                "4x10G(4)": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"],
+                "8x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)", "Eth15/5(Port15)", "Eth15/6(Port15)", "Eth15/7(Port15)", "Eth15/8(Port15)"],
+                "8x25G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)", "Eth15/5(Port15)", "Eth15/6(Port15)", "Eth15/7(Port15)", "Eth15/8(Port15)"]
             }
         },
 
@@ -468,9 +676,22 @@
             "lanes": "129,130,131,132,133,134,135,136",
             "breakout_modes": {
                 "1x400G": ["Eth16(Port16)"],
+                "1x200G(4)": ["Eth16(Port16)"],
+                "1x100G(2)": ["Eth16(Port16)"],
+                "1x100G(4)": ["Eth16(Port16)"],
+                "1x50G(2)": ["Eth16(Port16)"],
+                "1x40G(4)": ["Eth16(Port16)"],
+                "1x25G(1)": ["Eth16(Port16)"],
                 "2x200G": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "2x100G": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "2x50G(2)": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "2x50G(4)": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "2x40G": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
                 "4x100G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"],
-                "8x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)", "Eth16/5(Port16)", "Eth16/6(Port16)", "Eth16/7(Port16)", "Eth16/8(Port16)"]
+                "4x25G(4)": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"],
+                "4x10G(4)": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"],
+                "8x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)", "Eth16/5(Port16)", "Eth16/6(Port16)", "Eth16/7(Port16)", "Eth16/8(Port16)"],
+                "8x25G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)", "Eth16/5(Port16)", "Eth16/6(Port16)", "Eth16/7(Port16)", "Eth16/8(Port16)"]
             }
         },
 
@@ -479,9 +700,22 @@
             "lanes": "137,138,139,140,141,142,143,144",
             "breakout_modes": {
                 "1x400G": ["Eth17(Port17)"],
+                "1x200G(4)": ["Eth17(Port17)"],
+                "1x100G(2)": ["Eth17(Port17)"],
+                "1x100G(4)": ["Eth17(Port17)"],
+                "1x50G(2)": ["Eth17(Port17)"],
+                "1x40G(4)": ["Eth17(Port17)"],
+                "1x25G(1)": ["Eth17(Port17)"],
                 "2x200G": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "2x100G": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "2x50G(2)": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "2x50G(4)": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "2x40G": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
                 "4x100G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"],
-                "8x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)", "Eth17/5(Port17)", "Eth17/6(Port17)", "Eth17/7(Port17)", "Eth17/8(Port17)"]
+                "4x25G(4)": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"],
+                "4x10G(4)": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"],
+                "8x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)", "Eth17/5(Port17)", "Eth17/6(Port17)", "Eth17/7(Port17)", "Eth17/8(Port17)"],
+                "8x25G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)", "Eth17/5(Port17)", "Eth17/6(Port17)", "Eth17/7(Port17)", "Eth17/8(Port17)"]
             }
         },
 
@@ -490,9 +724,22 @@
             "lanes": "145,146,147,148,149,150,151,152",
             "breakout_modes": {
                 "1x400G": ["Eth18(Port18)"],
+                "1x200G(4)": ["Eth18(Port18)"],
+                "1x100G(2)": ["Eth18(Port18)"],
+                "1x100G(4)": ["Eth18(Port18)"],
+                "1x50G(2)": ["Eth18(Port18)"],
+                "1x40G(4)": ["Eth18(Port18)"],
+                "1x25G(1)": ["Eth18(Port18)"],
                 "2x200G": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "2x100G": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "2x50G(2)": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "2x50G(4)": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "2x40G": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
                 "4x100G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"],
-                "8x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)", "Eth18/5(Port18)", "Eth18/6(Port18)", "Eth18/7(Port18)", "Eth18/8(Port18)"]
+                "4x25G(4)": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"],
+                "4x10G(4)": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"],
+                "8x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)", "Eth18/5(Port18)", "Eth18/6(Port18)", "Eth18/7(Port18)", "Eth18/8(Port18)"],
+                "8x25G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)", "Eth18/5(Port18)", "Eth18/6(Port18)", "Eth18/7(Port18)", "Eth18/8(Port18)"]
             }
         },
 
@@ -501,9 +748,22 @@
             "lanes": "153,154,155,156,157,158,159,160",
             "breakout_modes": {
                 "1x400G": ["Eth19(Port19)"],
+                "1x200G(4)": ["Eth19(Port19)"],
+                "1x100G(2)": ["Eth19(Port19)"],
+                "1x100G(4)": ["Eth19(Port19)"],
+                "1x50G(2)": ["Eth19(Port19)"],
+                "1x40G(4)": ["Eth19(Port19)"],
+                "1x25G(1)": ["Eth19(Port19)"],
                 "2x200G": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "2x100G": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "2x50G(2)": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "2x50G(4)": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "2x40G": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
                 "4x100G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"],
-                "8x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)", "Eth19/5(Port19)", "Eth19/6(Port19)", "Eth19/7(Port19)", "Eth19/8(Port19)"]
+                "4x25G(4)": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"],
+                "4x10G(4)": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"],
+                "8x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)", "Eth19/5(Port19)", "Eth19/6(Port19)", "Eth19/7(Port19)", "Eth19/8(Port19)"],
+                "8x25G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)", "Eth19/5(Port19)", "Eth19/6(Port19)", "Eth19/7(Port19)", "Eth19/8(Port19)"]
             }
         },
 
@@ -512,9 +772,22 @@
             "lanes": "161,162,163,164,165,166,167,168",
             "breakout_modes": {
                 "1x400G": ["Eth20(Port20)"],
+                "1x200G(4)": ["Eth20(Port20)"],
+                "1x100G(2)": ["Eth20(Port20)"],
+                "1x100G(4)": ["Eth20(Port20)"],
+                "1x50G(2)": ["Eth20(Port20)"],
+                "1x40G(4)": ["Eth20(Port20)"],
+                "1x25G(1)": ["Eth20(Port20)"],
                 "2x200G": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "2x100G": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "2x50G(2)": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "2x50G(4)": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "2x40G": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
                 "4x100G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"],
-                "8x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)", "Eth20/5(Port20)", "Eth20/6(Port20)", "Eth20/7(Port20)", "Eth20/8(Port20)"]
+                "4x25G(4)": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"],
+                "4x10G(4)": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"],
+                "8x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)", "Eth20/5(Port20)", "Eth20/6(Port20)", "Eth20/7(Port20)", "Eth20/8(Port20)"],
+                "8x25G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)", "Eth20/5(Port20)", "Eth20/6(Port20)", "Eth20/7(Port20)", "Eth20/8(Port20)"]
             }
         },
 
@@ -523,9 +796,22 @@
             "lanes": "169,170,171,172,173,174,175,176",
             "breakout_modes": {
                 "1x400G": ["Eth21(Port21)"],
+                "1x200G(4)": ["Eth21(Port21)"],
+                "1x100G(2)": ["Eth21(Port21)"],
+                "1x100G(4)": ["Eth21(Port21)"],
+                "1x50G(2)": ["Eth21(Port21)"],
+                "1x40G(4)": ["Eth21(Port21)"],
+                "1x25G(1)": ["Eth21(Port21)"],
                 "2x200G": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "2x100G": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "2x50G(2)": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "2x50G(4)": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "2x40G": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
                 "4x100G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"],
-                "8x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)", "Eth21/5(Port21)", "Eth21/6(Port21)", "Eth21/7(Port21)", "Eth21/8(Port21)"]
+                "4x25G(4)": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"],
+                "4x10G(4)": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"],
+                "8x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)", "Eth21/5(Port21)", "Eth21/6(Port21)", "Eth21/7(Port21)", "Eth21/8(Port21)"],
+                "8x25G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)", "Eth21/5(Port21)", "Eth21/6(Port21)", "Eth21/7(Port21)", "Eth21/8(Port21)"]
             }
         },                        
 
@@ -534,9 +820,22 @@
             "lanes": "177,178,179,180,181,182,183,184",
             "breakout_modes": {
                 "1x400G": ["Eth22(Port22)"],
+                "1x200G(4)": ["Eth22(Port22)"],
+                "1x100G(2)": ["Eth22(Port22)"],
+                "1x100G(4)": ["Eth22(Port22)"],
+                "1x50G(2)": ["Eth22(Port22)"],
+                "1x40G(4)": ["Eth22(Port22)"],
+                "1x25G(1)": ["Eth22(Port22)"],
                 "2x200G": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "2x100G": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "2x50G(2)": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "2x50G(4)": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "2x40G": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
                 "4x100G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"],
-                "8x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)", "Eth22/5(Port22)", "Eth22/6(Port22)", "Eth22/7(Port22)", "Eth22/8(Port22)"]
+                "4x25G(4)": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"],
+                "4x10G(4)": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"],
+                "8x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)", "Eth22/5(Port22)", "Eth22/6(Port22)", "Eth22/7(Port22)", "Eth22/8(Port22)"],
+                "8x25G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)", "Eth22/5(Port22)", "Eth22/6(Port22)", "Eth22/7(Port22)", "Eth22/8(Port22)"]
             }
         },
       
@@ -545,9 +844,22 @@
             "lanes": "185,186,187,188,189,190,191,192",
             "breakout_modes": {
                 "1x400G": ["Eth23(Port23)"],
+                "1x200G(4)": ["Eth23(Port23)"],
+                "1x100G(2)": ["Eth23(Port23)"],
+                "1x100G(4)": ["Eth23(Port23)"],
+                "1x50G(2)": ["Eth23(Port23)"],
+                "1x40G(4)": ["Eth23(Port23)"],
+                "1x25G(1)": ["Eth23(Port23)"],
                 "2x200G": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "2x100G": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "2x50G(2)": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "2x50G(4)": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "2x40G": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
                 "4x100G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"],
-                "8x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)", "Eth23/5(Port23)", "Eth23/6(Port23)", "Eth23/7(Port23)", "Eth23/8(Port23)"]
+                "4x25G(4)": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"],
+                "4x10G(4)": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"],
+                "8x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)", "Eth23/5(Port23)", "Eth23/6(Port23)", "Eth23/7(Port23)", "Eth23/8(Port23)"],
+                "8x25G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)", "Eth23/5(Port23)", "Eth23/6(Port23)", "Eth23/7(Port23)", "Eth23/8(Port23)"]
             }
         },
 
@@ -556,9 +868,22 @@
             "lanes": "193,194,195,196,197,198,199,200",
             "breakout_modes": {
                 "1x400G": ["Eth24(Port24)"],
+                "1x200G(4)": ["Eth24(Port24)"],
+                "1x100G(2)": ["Eth24(Port24)"],
+                "1x100G(4)": ["Eth24(Port24)"],
+                "1x50G(2)": ["Eth24(Port24)"],
+                "1x40G(4)": ["Eth24(Port24)"],
+                "1x25G(1)": ["Eth24(Port24)"],
                 "2x200G": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "2x100G": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "2x50G(2)": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "2x50G(4)": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "2x40G": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
                 "4x100G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
-                "8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"]
+                "4x25G(4)": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
+                "4x10G(4)": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
+                "8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"],
+                "8x25G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"]
             }
         },
 
@@ -567,9 +892,22 @@
             "lanes": "201,202,203,204,205,206,207,208",
             "breakout_modes": {
                 "1x400G": ["Eth25(Port25)"],
+                "1x200G(4)": ["Eth25(Port25)"],
+                "1x100G(2)": ["Eth25(Port25)"],
+                "1x100G(4)": ["Eth25(Port25)"],
+                "1x50G(2)": ["Eth25(Port25)"],
+                "1x40G(4)": ["Eth25(Port25)"],
+                "1x25G(1)": ["Eth25(Port25)"],
                 "2x200G": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "2x100G": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "2x50G(2)": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "2x50G(4)": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "2x40G": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
                 "4x100G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
-                "8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"]
+                "4x25G(4)": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
+                "4x10G(4)": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
+                "8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"],
+                "8x25G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"]
             }
         },
 
@@ -578,9 +916,22 @@
             "lanes": "209,210,211,212,213,214,215,216",
             "breakout_modes": {
                 "1x400G": ["Eth26(Port26)"],
+                "1x200G(4)": ["Eth26(Port26)"],
+                "1x100G(2)": ["Eth26(Port26)"],
+                "1x100G(4)": ["Eth26(Port26)"],
+                "1x50G(2)": ["Eth26(Port26)"],
+                "1x40G(4)": ["Eth26(Port26)"],
+                "1x25G(1)": ["Eth26(Port26)"],
                 "2x200G": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "2x100G": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "2x50G(2)": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "2x50G(4)": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "2x40G": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
                 "4x100G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
-                "8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"]
+                "4x25G(4)": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
+                "4x10G(4)": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
+                "8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"],
+                "8x25G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"]
             }
         },
         
@@ -589,9 +940,22 @@
             "lanes": "217,218,219,220,221,222,223,224",
             "breakout_modes": {
                 "1x400G": ["Eth27(Port27)"],
+                "1x200G(4)": ["Eth27(Port27)"],
+                "1x100G(2)": ["Eth27(Port27)"],
+                "1x100G(4)": ["Eth27(Port27)"],
+                "1x50G(2)": ["Eth27(Port27)"],
+                "1x40G(4)": ["Eth27(Port27)"],
+                "1x25G(1)": ["Eth27(Port27)"],
                 "2x200G": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "2x100G": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "2x50G(2)": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "2x50G(4)": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "2x40G": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
                 "4x100G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
-                "8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"]
+                "4x25G(4)": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
+                "4x10G(4)": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
+                "8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"],
+                "8x25G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"]
             }
         },
 
@@ -600,9 +964,22 @@
             "lanes": "225,226,227,228,229,230,231,232",
             "breakout_modes": {
                 "1x400G": ["Eth28(Port28)"],
+                "1x200G(4)": ["Eth28(Port28)"],
+                "1x100G(2)": ["Eth28(Port28)"],
+                "1x100G(4)": ["Eth28(Port28)"],
+                "1x50G(2)": ["Eth28(Port28)"],
+                "1x40G(4)": ["Eth28(Port28)"],
+                "1x25G(1)": ["Eth28(Port28)"],
                 "2x200G": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "2x100G": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "2x50G(2)": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "2x50G(4)": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "2x40G": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
                 "4x100G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
-                "8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"]
+                "4x25G(4)": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
+                "4x10G(4)": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
+                "8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"],
+                "8x25G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"]
             }
         },
 
@@ -611,9 +988,22 @@
             "lanes": "233,234,235,236,237,238,239,240",
             "breakout_modes": {
                 "1x400G": ["Eth29(Port29)"],
+                "1x200G(4)": ["Eth29(Port29)"],
+                "1x100G(2)": ["Eth29(Port29)"],
+                "1x100G(4)": ["Eth29(Port29)"],
+                "1x50G(2)": ["Eth29(Port29)"],
+                "1x40G(4)": ["Eth29(Port29)"],
+                "1x25G(1)": ["Eth29(Port29)"],
                 "2x200G": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "2x100G": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "2x50G(2)": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "2x50G(4)": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "2x40G": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
                 "4x100G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
-                "8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"]
+                "4x25G(4)": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
+                "4x10G(4)": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
+                "8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"],
+                "8x25G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"]
             }
         },
 
@@ -622,9 +1012,22 @@
             "lanes": "241,242,243,244,245,246,247,248",
             "breakout_modes": {
                 "1x400G": ["Eth30(Port30)"],
+                "1x200G(4)": ["Eth30(Port30)"],
+                "1x100G(2)": ["Eth30(Port30)"],
+                "1x100G(4)": ["Eth30(Port30)"],
+                "1x50G(2)": ["Eth30(Port30)"],
+                "1x40G(4)": ["Eth30(Port30)"],
+                "1x25G(1)": ["Eth30(Port30)"],
                 "2x200G": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "2x100G": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "2x50G(2)": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "2x50G(4)": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "2x40G": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
                 "4x100G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
-                "8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"]
+                "4x25G(4)": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
+                "4x10G(4)": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
+                "8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"],
+                "8x25G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"]
             }
         },
 
@@ -633,9 +1036,22 @@
             "lanes": "249,250,251,252,253,254,255,256",
             "breakout_modes": {
                 "1x400G": ["Eth31(Port31)"],
+                "1x200G(4)": ["Eth31(Port31)"],
+                "1x100G(2)": ["Eth31(Port31)"],
+                "1x100G(4)": ["Eth31(Port31)"],
+                "1x50G(2)": ["Eth31(Port31)"],
+                "1x40G(4)": ["Eth31(Port31)"],
+                "1x25G(1)": ["Eth31(Port31)"],
                 "2x200G": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "2x100G": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "2x50G(2)": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "2x50G(4)": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "2x40G": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
                 "4x100G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
-                "8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"]
+                "4x25G(4)": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
+                "4x10G(4)": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
+                "8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"],
+                "8x25G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"]
             }
         },
 
@@ -643,7 +1059,7 @@
             "index": "32",
             "lanes": "257",
             "breakout_modes": {
-                "1x10G": ["Eth32(Port32)"]
+                "1x10G": ["Eth312(Port32)"]
             }
         },
         
@@ -651,7 +1067,7 @@
             "index": "33",
             "lanes": "259",
             "breakout_modes": {
-                "1x10G": ["Eth33(Port33)"]
+                "1x10G": ["Eth313(Port33)"]
             }
         }
     }
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm
index 6f6e84b4d20..b3d7fcd35cb 100644
--- a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm
@@ -245,7 +245,7 @@ serdes_core_rx_polarity_flip_physical{249}=0x78
 serdes_core_tx_polarity_flip_physical{249}=0x03
 
 
-dport_map_enable=1
+dport_map_enable=0
 
 dport_map_port_1=0
 dport_map_port_5=1
@@ -281,4 +281,4 @@ dport_map_port_148=30
 dport_map_port_152=31
 
 dport_map_port_38=32
-dport_map_port_118=33
\ No newline at end of file
+dport_map_port_118=33
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json
index 24aa151f89c..65fa7b94600 100644
--- a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json
@@ -24,10 +24,6 @@
             "i2c":
             {
                 "valmap": { "1":true, "0":false }
-            },
-            "bmc":
-            {
-                "valmap": { "Device Present":true, "Device Absent":false }
             }
         }, 
 		
@@ -36,11 +32,7 @@
             "i2c":
             {
                 "valmap": { "1": true, "0":false }
-            },
-            "bmc":
-            {
-                "valmap": { "State Asserted":true, "State Deasserted":false }
-            }        
+            }
         },
 
         "psu_fan_dir":
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json
index ac5052e6459..eef0114b662 100644
--- a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json
@@ -148,7 +148,7 @@
                         "raw": "0",
                         "field_name": "TEMP_CPU_PECI",
                         "field_pos": "18"
-                    }              
+                    }
                 ]
             }
         }
@@ -185,7 +185,7 @@
                         "raw": "0",
                         "field_name": "TEMP_CPU_ENV",
                         "field_pos": "18"
-                    }               
+                    }
                 ]
             }
         }
@@ -222,7 +222,7 @@
                         "raw": "0",
                         "field_name": "TEMP_CPU_ENV_2",
                         "field_pos": "18"
-                    }              
+                    }
                 ]
             }
         }
@@ -259,7 +259,7 @@
                         "raw": "0",
                         "field_name": "TEMP_MAC_ENV",
                         "field_pos": "18"
-                    }               
+                    }
                 ]
             }
         }
@@ -296,7 +296,7 @@
                         "raw": "0",
                         "field_name": "TEMP_MAC_DIE",
                         "field_pos": "18"
-                    }              
+                    }
                 ]
             }
         }
@@ -333,7 +333,7 @@
                         "raw": "0",
                         "field_name": "TEMP_CAGE",
                         "field_pos": "18"
-                    }              
+                    }
                 ]
             }
         }
@@ -370,7 +370,7 @@
                         "raw": "0",
                         "field_name": "TEMP_PSU_CONN",
                         "field_pos": "18"
-                    }              
+                    }
                 ]
             }
         }
@@ -407,6 +407,14 @@
                 {
                     "chn": "4",
                     "dev": "GPIO2"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PSU1"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PSU2"
                 }
             ]
         }
@@ -1060,34 +1068,20 @@
         "dev_info": {
             "device_type": "PSU",
             "device_name": "PSU1",
-            "device_parent": "SMBUS0"
+            "device_parent": "MUX1"
         },
         "dev_attr": {
             "dev_idx": "1",
             "num_psu_fans": "1"
         },
         "i2c": {
-            "interface": []
+            "interface": [
+                { "itf":"eeprom", "dev":"PSU1-EEPROM" }
+            ]
         },
         "bmc": {
             "ipmitool": {
                 "attr_list": [
-                    {
-                        "attr_name": "psu_present",
-                        "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU0_PRSNT_L",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
-                    {
-                        "attr_name": "psu_power_good",
-                        "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU0_PWROK_H",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
                     {
                         "attr_name": "psu_v_out",
                         "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
@@ -1175,38 +1169,59 @@
             }
         }
     },
+    "PSU1-EEPROM": {
+        "dev_info": {
+            "device_type": "PSU-EEPROM",
+            "device_name": "PSU1-EEPROM",
+            "device_parent": "MUX1",
+            "virt_parent": "PSU1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x5a",
+                "dev_type": "psu_eeprom"
+            },
+            "attr_list": [
+                {
+                    "attr_name":"psu_present",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x4",
+                    "attr_cmpval":"0x0",
+                    "attr_len":"1"
+                },
+                {
+                    "attr_name":"psu_power_good",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x1",
+                    "attr_cmpval":"0x1",
+                    "attr_len":"1"
+                }
+            ]
+        }
+    },
     "PSU2": {
         "dev_info": {
             "device_type": "PSU",
             "device_name": "PSU2",
-            "device_parent": "SMBUS0"
+            "device_parent": "MUX1"
         },
         "dev_attr": {
             "dev_idx": "2",
             "num_psu_fans": "1"
         },
         "i2c": {
-            "interface": []
+            "interface": [
+                { "itf":"eeprom", "dev":"PSU2-EEPROM" }
+            ]
         },
         "bmc": {
             "ipmitool": {
                 "attr_list": [
-                    {
-                        "attr_name": "psu_present",
-                        "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU1_PRSNT_L",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
-                    {
-                        "attr_name": "psu_power_good",
-                        "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU1_PWROK_H",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
                     {
                         "attr_name": "psu_v_out",
                         "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
@@ -1294,6 +1309,41 @@
             }
         }
     },
+    "PSU2-EEPROM": {
+        "dev_info": {
+            "device_type": "PSU-EEPROM",
+            "device_name": "PSU2-EEPROM",
+            "device_parent": "MUX1",
+            "virt_parent": "PSU2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x5b",
+                "dev_type": "psu_eeprom"
+            },
+            "attr_list": [
+                {
+                    "attr_name":"psu_present",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x8",
+                    "attr_cmpval":"0x0",
+                    "attr_len":"1"
+                },
+                {
+                    "attr_name":"psu_power_good",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x2",
+                    "attr_cmpval":"0x2",
+                    "attr_len":"1"
+                }
+            ]
+        }
+    },
     "FAN-CTRL": {
         "dev_info": {
             "device_type": "FAN",
@@ -1722,7 +1772,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT1": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -2019,7 +2069,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT4": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -2118,7 +2168,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT5": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -2217,7 +2267,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT6": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -2316,7 +2366,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT7": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -2415,7 +2465,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT8": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -2514,7 +2564,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT9": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -2613,7 +2663,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT10": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -2811,7 +2861,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT12": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -2910,7 +2960,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT13": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -3009,7 +3059,7 @@
                 }
             ]
         }
-    },        
+    },
     "PORT14": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -3207,7 +3257,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT16": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -3306,7 +3356,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT17": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -3504,7 +3554,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT19": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -3603,7 +3653,7 @@
                 }
             ]
         }
-    },            
+    },
     "PORT20": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -3999,7 +4049,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT24": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4098,7 +4148,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT25": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4296,7 +4346,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT27": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4395,7 +4445,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT28": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4494,7 +4544,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT29": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4593,7 +4643,7 @@
                 }
             ]
         }
-    },        
+    },
     "PORT30": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4692,7 +4742,7 @@
                 }
             ]
         }
-    },        
+    },
     "PORT31": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4890,7 +4940,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT33": {
         "dev_info": {
             "device_type": "SFP",
@@ -5088,5 +5138,5 @@
                 }
             ]
         }
-    }    
+    }
 }
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml
old mode 100755
new mode 100644
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json
index 76096d82e35..df69c706a57 100644
--- a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json
@@ -24,10 +24,6 @@
             "i2c":
             {
                 "valmap": { "1":true, "0":false }
-            },
-            "bmc":
-            {
-                "valmap": { "Device Present":true, "Device Absent":false }
             }
         }, 
 		
@@ -36,11 +32,7 @@
             "i2c":
             {
                 "valmap": { "1": true, "0":false }
-            },
-            "bmc":
-            {
-                "valmap": { "State Asserted":true, "State Deasserted":false }
-            }        
+            }
         },
 
         "psu_fan_dir":
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json
index a7b4bf73d10..ec82a0768de 100644
--- a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json
@@ -148,7 +148,7 @@
                         "raw": "0",
                         "field_name": "TEMP_CPU_PECI",
                         "field_pos": "18"
-                    }              
+                    }
                 ]
             }
         }
@@ -185,7 +185,7 @@
                         "raw": "0",
                         "field_name": "TEMP_CPU_ENV",
                         "field_pos": "18"
-                    }               
+                    }
                 ]
             }
         }
@@ -222,7 +222,7 @@
                         "raw": "0",
                         "field_name": "TEMP_CPU_ENV_2",
                         "field_pos": "18"
-                    }               
+                    }
                 ]
             }
         }
@@ -259,7 +259,7 @@
                         "raw": "0",
                         "field_name": "TEMP_MAC_ENV",
                         "field_pos": "18"
-                    }               
+                    }
                 ]
             }
         }
@@ -296,7 +296,7 @@
                         "raw": "0",
                         "field_name": "TEMP_MAC_DIE",
                         "field_pos": "18"
-                    }               
+                    }
                 ]
             }
         }
@@ -333,7 +333,7 @@
                         "raw": "0",
                         "field_name": "TEMP_CAGE",
                         "field_pos": "18"
-                    }               
+                    }
                 ]
             }
         }
@@ -370,7 +370,7 @@
                         "raw": "0",
                         "field_name": "TEMP_PSU_CONN",
                         "field_pos": "18"
-                    }              
+                    }
                 ]
             }
         }
@@ -407,6 +407,14 @@
                 {
                     "chn": "4",
                     "dev": "GPIO2"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PSU1"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PSU2"
                 }
             ]
         }
@@ -1052,34 +1060,20 @@
         "dev_info": {
             "device_type": "PSU",
             "device_name": "PSU1",
-            "device_parent": "SMBUS0"
+            "device_parent": "MUX1"
         },
         "dev_attr": {
             "dev_idx": "1",
             "num_psu_fans": "1"
         },
         "i2c": {
-            "interface": []
+            "interface": [
+                { "itf":"eeprom", "dev":"PSU1-EEPROM" }
+            ]
         },
         "bmc": {
             "ipmitool": {
                 "attr_list": [
-                    {
-                        "attr_name": "psu_present",
-                        "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU0_PRSNT_L",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
-                    {
-                        "attr_name": "psu_power_good",
-                        "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU0_PWROK_H",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
                     {
                         "attr_name": "psu_v_out",
                         "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
@@ -1162,43 +1156,64 @@
                         "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1",
                         "raw": "1",
                         "type": "raw"
-                    }                 
+                    }
                 ]
             }
         }
     },
+    "PSU1-EEPROM": {
+        "dev_info": {
+            "device_type": "PSU-EEPROM",
+            "device_name": "PSU1-EEPROM",
+            "device_parent": "MUX1",
+            "virt_parent": "PSU1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x5a",
+                "dev_type": "psu_eeprom"
+            },
+            "attr_list": [
+                {
+                    "attr_name":"psu_present",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x4",
+                    "attr_cmpval":"0x0",
+                    "attr_len":"1"
+                },
+                {
+                    "attr_name":"psu_power_good",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x1",
+                    "attr_cmpval":"0x1",
+                    "attr_len":"1"
+                }
+            ]
+        }
+    },
     "PSU2": {
         "dev_info": {
             "device_type": "PSU",
             "device_name": "PSU2",
-            "device_parent": "SMBUS0"
+            "device_parent": "MUX1"
         },
         "dev_attr": {
             "dev_idx": "2",
             "num_psu_fans": "1"
         },
         "i2c": {
-            "interface": []
+            "interface": [
+                { "itf":"eeprom", "dev":"PSU2-EEPROM" }
+            ]
         },
         "bmc": {
             "ipmitool": {
                 "attr_list": [
-                    {
-                        "attr_name": "psu_present",
-                        "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU1_PRSNT_L",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
-                    {
-                        "attr_name": "psu_power_good",
-                        "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
-                        "raw": "0",
-                        "field_name": "PSU1_PWROK_H",
-                        "field_pos": "5",
-                        "separator": ","
-                    },
                     {
                         "attr_name": "psu_v_out",
                         "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
@@ -1286,6 +1301,41 @@
             }
         }
     },
+    "PSU2-EEPROM": {
+        "dev_info": {
+            "device_type": "PSU-EEPROM",
+            "device_name": "PSU2-EEPROM",
+            "device_parent": "MUX1",
+            "virt_parent": "PSU2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x5b",
+                "dev_type": "psu_eeprom"
+            },
+            "attr_list": [
+                {
+                    "attr_name":"psu_present",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x8",
+                    "attr_cmpval":"0x0",
+                    "attr_len":"1"
+                },
+                {
+                    "attr_name":"psu_power_good",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x2",
+                    "attr_cmpval":"0x2",
+                    "attr_len":"1"
+                }
+            ]
+        }
+    },
     "FAN-CTRL": {
         "dev_info": {
             "device_type": "FAN",
@@ -1714,7 +1764,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT1": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -2011,7 +2061,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT4": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -2110,7 +2160,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT5": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -2209,7 +2259,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT6": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -2308,7 +2358,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT7": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -2407,7 +2457,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT8": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -2506,7 +2556,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT9": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -2605,7 +2655,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT10": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -2803,7 +2853,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT12": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -2902,7 +2952,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT13": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -3001,7 +3051,7 @@
                 }
             ]
         }
-    },        
+    },
     "PORT14": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -3199,7 +3249,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT16": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -3298,7 +3348,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT17": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -3496,7 +3546,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT19": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -3595,7 +3645,7 @@
                 }
             ]
         }
-    },            
+    },
     "PORT20": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -3991,7 +4041,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT24": {
         "dev_info": {
             "device_type": "QSFP28",
@@ -4090,7 +4140,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT25": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4288,7 +4338,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT27": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4387,7 +4437,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT28": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4486,7 +4536,7 @@
                 }
             ]
         }
-    },    
+    },
     "PORT29": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4585,7 +4635,7 @@
                 }
             ]
         }
-    },        
+    },
     "PORT30": {
         "dev_info": {
             "device_type": "QSFP-DD",
@@ -4684,7 +4734,7 @@
                 }
             ]
         }
-    },        
+    },
     "PORT31": {
         "dev_info": {
             "device_type": "QSFP-DD",
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json
index 65a45fd2414..de3bac4400f 100644
--- a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json
@@ -286,8 +286,17 @@
             "lanes": "1,2,3,4",
             "breakout_modes": {
                 "1x200G": ["Eth0(Port0)"],
-                "2x100G": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
-                "4x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"]
+                "1x100G(2)": ["Eth0(Port0)"],
+                "1x100G(4)": ["Eth0(Port0)"],
+                "1x50G(2)": ["Eth0(Port0)"],
+                "1x40G(4)": ["Eth0(Port0)"],
+                "1x25G(1)": ["Eth0(Port0)"],
+                "2x100G(4)": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
+                "2x50G(2)": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
+                "2x25G(2)": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
+                "4x50G(4)": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"],
+                "4x25G(4)": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"],
+                "4x10G(4)": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"]
             }
         },
 
@@ -296,8 +305,17 @@
             "lanes": "5,6,7,8",
             "breakout_modes": {
                 "1x200G": ["Eth1(Port1)"],
-                "2x100G": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
-                "4x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"]
+                "1x100G(2)": ["Eth1(Port1)"],
+                "1x100G(4)": ["Eth1(Port1)"],
+                "1x50G(2)": ["Eth1(Port1)"],
+                "1x40G(4)": ["Eth1(Port1)"],
+                "1x25G(1)": ["Eth1(Port1)"],
+                "2x100G(4)": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "2x50G(2)": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "2x25G(2)": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "4x50G(4)": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"],
+                "4x25G(4)": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"],
+                "4x10G(4)": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"]
             }
         },
 
@@ -306,8 +324,17 @@
             "lanes": "9,10,11,12",
             "breakout_modes": {
                 "1x200G": ["Eth2(Port2)"],
-                "2x100G": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
-                "4x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"]
+                "1x100G(2)": ["Eth2(Port2)"],
+                "1x100G(4)": ["Eth2(Port2)"],
+                "1x50G(2)": ["Eth2(Port2)"],
+                "1x40G(4)": ["Eth2(Port2)"],
+                "1x25G(1)": ["Eth2(Port2)"],
+                "2x100G(4)": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "2x50G(2)": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "2x25G(2)": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "4x50G(4)": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"],
+                "4x25G(4)": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"],
+                "4x10G(4)": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"]
             }
         },
 
@@ -316,8 +343,17 @@
             "lanes": "13,14,15,16",
             "breakout_modes": {
                 "1x200G": ["Eth3(Port3)"],
-                "2x100G": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
-                "4x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"]
+                "1x100G(2)": ["Eth3(Port3)"],
+                "1x100G(4)": ["Eth3(Port3)"],
+                "1x50G(2)": ["Eth3(Port3)"],
+                "1x40G(4)": ["Eth3(Port3)"],
+                "1x25G(1)": ["Eth3(Port3)"],
+                "2x100G(4)": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "2x50G(2)": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "2x25G(2)": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "4x50G(4)": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"],
+                "4x25G(4)": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"],
+                "4x10G(4)": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"]
             }
         },
 
@@ -326,8 +362,17 @@
             "lanes": "17,18,19,20",
             "breakout_modes": {
                 "1x200G": ["Eth4(Port4)"],
-                "2x100G": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
-                "4x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"]
+                "1x100G(2)": ["Eth4(Port4)"],
+                "1x100G(4)": ["Eth4(Port4)"],
+                "1x50G(2)": ["Eth4(Port4)"],
+                "1x40G(4)": ["Eth4(Port4)"],
+                "1x25G(1)": ["Eth4(Port4)"],
+                "2x100G(4)": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "2x50G(2)": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "2x25G(2)": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "4x50G(4)": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"],
+                "4x25G(4)": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"],
+                "4x10G(4)": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"]
             }
         },
 
@@ -336,8 +381,17 @@
             "lanes": "21,22,23,24",
             "breakout_modes": {
                 "1x200G": ["Eth5(Port5)"],
-                "2x100G": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
-                "4x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"]
+                "1x100G(2)": ["Eth5(Port5)"],
+                "1x100G(4)": ["Eth5(Port5)"],
+                "1x50G(2)": ["Eth5(Port5)"],
+                "1x40G(4)": ["Eth5(Port5)"],
+                "1x25G(1)": ["Eth5(Port5)"],
+                "2x100G(4)": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "2x50G(2)": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "2x25G(2)": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "4x50G(4)": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"],
+                "4x25G(4)": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"],
+                "4x10G(4)": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"]
             }
         },
 
@@ -346,8 +400,17 @@
             "lanes": "25,26,27,28",
             "breakout_modes": {
                 "1x200G": ["Eth6(Port6)"],
-                "2x100G": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
-                "4x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"]
+                "1x100G(2)": ["Eth6(Port6)"],
+                "1x100G(4)": ["Eth6(Port6)"],
+                "1x50G(2)": ["Eth6(Port6)"],
+                "1x40G(4)": ["Eth6(Port6)"],
+                "1x25G(1)": ["Eth6(Port6)"],
+                "2x100G(4)": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "2x50G(2)": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "2x25G(2)": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "4x50G(4)": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"],
+                "4x25G(4)": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"],
+                "4x10G(4)": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"]
             }
         },
 
@@ -356,8 +419,17 @@
             "lanes": "29,30,31,32",
             "breakout_modes": {
                 "1x200G": ["Eth7(Port7)"],
-                "2x100G": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
-                "4x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"]
+                "1x100G(2)": ["Eth7(Port7)"],
+                "1x100G(4)": ["Eth7(Port7)"],
+                "1x50G(2)": ["Eth7(Port7)"],
+                "1x40G(4)": ["Eth7(Port7)"],
+                "1x25G(1)": ["Eth7(Port7)"],
+                "2x100G(4)": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "2x50G(2)": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "2x25G(2)": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "4x50G(4)": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"],
+                "4x25G(4)": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"],
+                "4x10G(4)": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"]
             }
         },
 
@@ -366,8 +438,17 @@
             "lanes": "33,34,35,36",
             "breakout_modes": {
                 "1x200G": ["Eth8(Port8)"],
-                "2x100G": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
-                "4x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"]
+                "1x100G(2)": ["Eth8(Port8)"],
+                "1x100G(4)": ["Eth8(Port8)"],
+                "1x50G(2)": ["Eth8(Port8)"],
+                "1x40G(4)": ["Eth8(Port8)"],
+                "1x25G(1)": ["Eth8(Port8)"],
+                "2x100G(4)": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "2x50G(2)": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "2x25G(2)": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "4x50G(4)": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"],
+                "4x25G(4)": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"],
+                "4x10G(4)": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"]
             }
         },
 
@@ -376,8 +457,17 @@
             "lanes": "37,38,39,40",
             "breakout_modes": {
                 "1x200G": ["Eth9(Port9)"],
-                "2x100G": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
-                "4x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"]
+                "1x100G(2)": ["Eth9(Port9)"],
+                "1x100G(4)": ["Eth9(Port9)"],
+                "1x50G(2)": ["Eth9(Port9)"],
+                "1x40G(4)": ["Eth9(Port9)"],
+                "1x25G(1)": ["Eth9(Port9)"],
+                "2x100G(4)": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "2x50G(2)": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "2x25G(2)": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "4x50G(4)": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"],
+                "4x25G(4)": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"],
+                "4x10G(4)": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"]
             }
         },
 
@@ -386,8 +476,17 @@
             "lanes": "41,42,43,44",
             "breakout_modes": {
                 "1x200G": ["Eth10(Port10)"],
-                "2x100G": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
-                "4x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"]
+                "1x100G(2)": ["Eth10(Port10)"],
+                "1x100G(4)": ["Eth10(Port10)"],
+                "1x50G(2)": ["Eth10(Port10)"],
+                "1x40G(4)": ["Eth10(Port10)"],
+                "1x25G(1)": ["Eth10(Port10)"],
+                "2x100G(4)": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "2x50G(2)": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "2x25G(2)": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "4x50G(4)": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"],
+                "4x25G(4)": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"],
+                "4x10G(4)": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"]
             }
         },
 
@@ -396,8 +495,17 @@
             "lanes": "45,46,47,48",
             "breakout_modes": {
                 "1x200G": ["Eth11(Port11)"],
-                "2x100G": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
-                "4x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"]
+                "1x100G(2)": ["Eth11(Port11)"],
+                "1x100G(4)": ["Eth11(Port11)"],
+                "1x50G(2)": ["Eth11(Port11)"],
+                "1x40G(4)": ["Eth11(Port11)"],
+                "1x25G(1)": ["Eth11(Port11)"],
+                "2x100G(4)": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "2x50G(2)": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "2x25G(2)": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "4x50G(4)": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"],
+                "4x25G(4)": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"],
+                "4x10G(4)": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"]
             }
         },
 
@@ -406,8 +514,17 @@
             "lanes": "49,50,51,52",
             "breakout_modes": {
                 "1x200G": ["Eth12(Port12)"],
-                "2x100G": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
-                "4x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"]
+                "1x100G(2)": ["Eth12(Port12)"],
+                "1x100G(4)": ["Eth12(Port12)"],
+                "1x50G(2)": ["Eth12(Port12)"],
+                "1x40G(4)": ["Eth12(Port12)"],
+                "1x25G(1)": ["Eth12(Port12)"],
+                "2x100G(4)": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "2x50G(2)": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "2x25G(2)": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "4x50G(4)": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"],
+                "4x25G(4)": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"],
+                "4x10G(4)": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"]
             }
         },
 
@@ -416,8 +533,17 @@
             "lanes": "53,54,55,56",
             "breakout_modes": {
                 "1x200G": ["Eth13(Port13)"],
-                "2x100G": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
-                "4x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"]
+                "1x100G(2)": ["Eth13(Port13)"],
+                "1x100G(4)": ["Eth13(Port13)"],
+                "1x50G(2)": ["Eth13(Port13)"],
+                "1x40G(4)": ["Eth13(Port13)"],
+                "1x25G(1)": ["Eth13(Port13)"],
+                "2x100G(4)": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "2x50G(2)": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "2x25G(2)": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "4x50G(4)": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"],
+                "4x25G(4)": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"],
+                "4x10G(4)": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"]
             }
         },
 
@@ -426,8 +552,17 @@
             "lanes": "57,58,59,60",
             "breakout_modes": {
                 "1x200G": ["Eth14(Port14)"],
-                "2x100G": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
-                "4x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"]
+                "1x100G(2)": ["Eth14(Port14)"],
+                "1x100G(4)": ["Eth14(Port14)"],
+                "1x50G(2)": ["Eth14(Port14)"],
+                "1x40G(4)": ["Eth14(Port14)"],
+                "1x25G(1)": ["Eth14(Port14)"],
+                "2x100G(4)": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "2x50G(2)": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "2x25G(2)": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "4x50G(4)": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"],
+                "4x25G(4)": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"],
+                "4x10G(4)": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"]
             }
         },
 
@@ -436,8 +571,17 @@
             "lanes": "61,62,63,64",
             "breakout_modes": {
                 "1x200G": ["Eth15(Port15)"],
-                "2x100G": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
-                "4x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"]
+                "1x100G(2)": ["Eth15(Port15)"],
+                "1x100G(4)": ["Eth15(Port15)"],
+                "1x50G(2)": ["Eth15(Port15)"],
+                "1x40G(4)": ["Eth15(Port15)"],
+                "1x25G(1)": ["Eth15(Port15)"],
+                "2x100G(4)": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "2x50G(2)": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "2x25G(2)": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "4x50G(4)": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"],
+                "4x25G(4)": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"],
+                "4x10G(4)": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"]
             }
         },
 
@@ -446,8 +590,17 @@
             "lanes": "65,66,67,68",
             "breakout_modes": {
                 "1x200G": ["Eth16(Port16)"],
-                "2x100G": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
-                "4x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"]
+                "1x100G(2)": ["Eth16(Port16)"],
+                "1x100G(4)": ["Eth16(Port16)"],
+                "1x50G(2)": ["Eth16(Port16)"],
+                "1x40G(4)": ["Eth16(Port16)"],
+                "1x25G(1)": ["Eth16(Port16)"],
+                "2x100G(4)": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "2x50G(2)": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "2x25G(2)": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "4x50G(4)": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"],
+                "4x25G(4)": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"],
+                "4x10G(4)": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"]
             }
         },
 
@@ -456,8 +609,17 @@
             "lanes": "69,70,71,72",
             "breakout_modes": {
                 "1x200G": ["Eth17(Port17)"],
-                "2x100G": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
-                "4x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"]
+                "1x100G(2)": ["Eth17(Port17)"],
+                "1x100G(4)": ["Eth17(Port17)"],
+                "1x50G(2)": ["Eth17(Port17)"],
+                "1x40G(4)": ["Eth17(Port17)"],
+                "1x25G(1)": ["Eth17(Port17)"],
+                "2x100G(4)": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "2x50G(2)": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "2x25G(2)": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "4x50G(4)": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"],
+                "4x25G(4)": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"],
+                "4x10G(4)": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"]
             }
         },
 
@@ -466,8 +628,17 @@
             "lanes": "73,74,75,76",
             "breakout_modes": {
                 "1x200G": ["Eth18(Port18)"],
-                "2x100G": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
-                "4x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"]
+                "1x100G(2)": ["Eth18(Port18)"],
+                "1x100G(4)": ["Eth18(Port18)"],
+                "1x50G(2)": ["Eth18(Port18)"],
+                "1x40G(4)": ["Eth18(Port18)"],
+                "1x25G(1)": ["Eth18(Port18)"],
+                "2x100G(4)": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "2x50G(2)": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "2x25G(2)": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "4x50G(4)": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"],
+                "4x25G(4)": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"],
+                "4x10G(4)": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"]
             }
         },
 
@@ -476,8 +647,17 @@
             "lanes": "77,78,79,80",
             "breakout_modes": {
                 "1x200G": ["Eth19(Port19)"],
-                "2x100G": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
-                "4x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"]
+                "1x100G(2)": ["Eth19(Port19)"],
+                "1x100G(4)": ["Eth19(Port19)"],
+                "1x50G(2)": ["Eth19(Port19)"],
+                "1x40G(4)": ["Eth19(Port19)"],
+                "1x25G(1)": ["Eth19(Port19)"],
+                "2x100G(4)": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "2x50G(2)": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "2x25G(2)": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "4x50G(4)": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"],
+                "4x25G(4)": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"],
+                "4x10G(4)": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"]
             }
         },
 
@@ -486,8 +666,17 @@
             "lanes": "81,82,83,84",
             "breakout_modes": {
                 "1x200G": ["Eth20(Port20)"],
-                "2x100G": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
-                "4x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"]
+                "1x100G(2)": ["Eth20(Port20)"],
+                "1x100G(4)": ["Eth20(Port20)"],
+                "1x50G(2)": ["Eth20(Port20)"],
+                "1x40G(4)": ["Eth20(Port20)"],
+                "1x25G(1)": ["Eth20(Port20)"],
+                "2x100G(4)": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "2x50G(2)": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "2x25G(2)": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "4x50G(4)": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"],
+                "4x25G(4)": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"],
+                "4x10G(4)": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"]
             }
         },
 
@@ -496,8 +685,17 @@
             "lanes": "85,86,87,88",
             "breakout_modes": {
                 "1x200G": ["Eth21(Port21)"],
-                "2x100G": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
-                "4x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"]
+                "1x100G(2)": ["Eth21(Port21)"],
+                "1x100G(4)": ["Eth21(Port21)"],
+                "1x50G(2)": ["Eth21(Port21)"],
+                "1x40G(4)": ["Eth21(Port21)"],
+                "1x25G(1)": ["Eth21(Port21)"],
+                "2x100G(4)": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "2x50G(2)": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "2x25G(2)": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "4x50G(4)": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"],
+                "4x25G(4)": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"],
+                "4x10G(4)": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"]
             }
         },
 
@@ -506,8 +704,17 @@
             "lanes": "89,90,91,92",
             "breakout_modes": {
                 "1x200G": ["Eth22(Port22)"],
-                "2x100G": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
-                "4x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"]
+                "1x100G(2)": ["Eth22(Port22)"],
+                "1x100G(4)": ["Eth22(Port22)"],
+                "1x50G(2)": ["Eth22(Port22)"],
+                "1x40G(4)": ["Eth22(Port22)"],
+                "1x25G(1)": ["Eth22(Port22)"],
+                "2x100G(4)": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "2x50G(2)": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "2x25G(2)": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "4x50G(4)": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"],
+                "4x25G(4)": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"],
+                "4x10G(4)": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"]
             }
         },
 
@@ -516,8 +723,17 @@
             "lanes": "93,94,95,96",
             "breakout_modes": {
                 "1x200G": ["Eth23(Port23)"],
-                "2x100G": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
-                "4x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"]
+                "1x100G(2)": ["Eth23(Port23)"],
+                "1x100G(4)": ["Eth23(Port23)"],
+                "1x50G(2)": ["Eth23(Port23)"],
+                "1x40G(4)": ["Eth23(Port23)"],
+                "1x25G(1)": ["Eth23(Port23)"],
+                "2x100G(4)": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "2x50G(2)": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "2x25G(2)": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "4x50G(4)": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"],
+                "4x25G(4)": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"],
+                "4x10G(4)": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"]
             }
         },
 
@@ -526,9 +742,22 @@
             "lanes": "97,98,99,100,101,102,103,104",
             "breakout_modes": {
                 "1x400G": ["Eth24(Port24)"],
+                "1x200G(4)": ["Eth24(Port24)"],
+                "1x100G(2)": ["Eth24(Port24)"],
+                "1x100G(4)": ["Eth24(Port24)"],
+                "1x50G(2)": ["Eth24(Port24)"],
+                "1x40G(4)": ["Eth24(Port24)"],
+                "1x25G(1)": ["Eth24(Port24)"],
                 "2x200G": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "2x100G(8)": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "2x50G(2)": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "2x50G(4)": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "2x40G": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
                 "4x100G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
-                "8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"]
+                "4x25G(4)": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
+                "4x10G(4)": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
+                "8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"],
+                "8x25G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"]
             }
         },
 
@@ -537,9 +766,22 @@
             "lanes": "105,106,107,108,109,110,111,112",
             "breakout_modes": {
                 "1x400G": ["Eth25(Port25)"],
+                "1x200G(4)": ["Eth25(Port25)"],
+                "1x100G(2)": ["Eth25(Port25)"],
+                "1x100G(4)": ["Eth25(Port25)"],
+                "1x50G(2)": ["Eth25(Port25)"],
+                "1x40G(4)": ["Eth25(Port25)"],
+                "1x25G(1)": ["Eth25(Port25)"],
                 "2x200G": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "2x100G(8)": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "2x50G(2)": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "2x50G(4)": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "2x40G": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
                 "4x100G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
-                "8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"]
+                "4x25G(4)": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
+                "4x10G(4)": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
+                "8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"],
+                "8x25G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"]
             }
         },
 
@@ -548,9 +790,22 @@
             "lanes": "113,114,115,116,117,118,119,120",
             "breakout_modes": {
                 "1x400G": ["Eth26(Port26)"],
+                "1x200G(4)": ["Eth26(Port26)"],
+                "1x100G(2)": ["Eth26(Port26)"],
+                "1x100G(4)": ["Eth26(Port26)"],
+                "1x50G(2)": ["Eth26(Port26)"],
+                "1x40G(4)": ["Eth26(Port26)"],
+                "1x25G(1)": ["Eth26(Port26)"],
                 "2x200G": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "2x100G(8)": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "2x50G(2)": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "2x50G(4)": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "2x40G": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
                 "4x100G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
-                "8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"]
+                "4x25G(4)": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
+                "4x10G(4)": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
+                "8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"],
+                "8x25G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"]
             }
         },
         
@@ -559,9 +814,22 @@
             "lanes": "121,122,123,124,125,126,127,128",
             "breakout_modes": {
                 "1x400G": ["Eth27(Port27)"],
+                "1x200G(4)": ["Eth27(Port27)"],
+                "1x100G(2)": ["Eth27(Port27)"],
+                "1x100G(4)": ["Eth27(Port27)"],
+                "1x50G(2)": ["Eth27(Port27)"],
+                "1x40G(4)": ["Eth27(Port27)"],
+                "1x25G(1)": ["Eth27(Port27)"],
                 "2x200G": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "2x100G(8)": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "2x50G(2)": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "2x50G(4)": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "2x40G": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
                 "4x100G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
-                "8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"]
+                "4x25G(4)": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
+                "4x10G(4)": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
+                "8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"],
+                "8x25G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"]
             }
         },
 
@@ -570,9 +838,22 @@
             "lanes": "129,130,131,132,133,134,135,136",
             "breakout_modes": {
                 "1x400G": ["Eth28(Port28)"],
+                "1x200G(4)": ["Eth28(Port28)"],
+                "1x100G(2)": ["Eth28(Port28)"],
+                "1x100G(4)": ["Eth28(Port28)"],
+                "1x50G(2)": ["Eth28(Port28)"],
+                "1x40G(4)": ["Eth28(Port28)"],
+                "1x25G(1)": ["Eth28(Port28)"],
                 "2x200G": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "2x100G(8)": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "2x50G(2)": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "2x50G(4)": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "2x40G": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
                 "4x100G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
-                "8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"]
+                "4x25G(4)": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
+                "4x10G(4)": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
+                "8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"],
+                "8x25G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"]
             }
         },
 
@@ -581,9 +862,22 @@
             "lanes": "137,138,139,140,141,142,143,144",
             "breakout_modes": {
                 "1x400G": ["Eth29(Port29)"],
+                "1x200G(4)": ["Eth29(Port29)"],
+                "1x100G(2)": ["Eth29(Port29)"],
+                "1x100G(4)": ["Eth29(Port29)"],
+                "1x50G(2)": ["Eth29(Port29)"],
+                "1x40G(4)": ["Eth29(Port29)"],
+                "1x25G(1)": ["Eth29(Port29)"],
                 "2x200G": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "2x100G(8)": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "2x50G(2)": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "2x50G(4)": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "2x40G": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
                 "4x100G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
-                "8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"]
+                "4x25G(4)": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
+                "4x10G(4)": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
+                "8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"],
+                "8x25G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"]
             }
         },
 
@@ -592,20 +886,45 @@
             "lanes": "145,146,147,148,149,150,151,152",
             "breakout_modes": {
                 "1x400G": ["Eth30(Port30)"],
+                "1x200G(4)": ["Eth30(Port30)"],
+                "1x100G(2)": ["Eth30(Port30)"],
+                "1x100G(4)": ["Eth30(Port30)"],
+                "1x50G(2)": ["Eth30(Port30)"],
+                "1x40G(4)": ["Eth30(Port30)"],
+                "1x25G(1)": ["Eth30(Port30)"],
                 "2x200G": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "2x100G(8)": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "2x50G(2)": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "2x50G(4)": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "2x40G": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
                 "4x100G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
-                "8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"]
+                "4x25G(4)": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
+                "4x10G(4)": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
+                "8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"],
+                "8x25G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"]
             }
         },
-
         "Ethernet152": {
             "index": "31,31,31,31,31,31,31,31",
             "lanes": "153,154,155,156,157,158,159,160",
             "breakout_modes": {
                 "1x400G": ["Eth31(Port31)"],
+                "1x200G(4)": ["Eth31(Port31)"],
+                "1x100G(2)": ["Eth31(Port31)"],
+                "1x100G(4)": ["Eth31(Port31)"],
+                "1x50G(2)": ["Eth31(Port31)"],
+                "1x40G(4)": ["Eth31(Port31)"],
+                "1x25G(1)": ["Eth31(Port31)"],
                 "2x200G": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "2x100G(8)": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "2x50G(2)": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "2x50G(4)": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "2x40G": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
                 "4x100G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
-                "8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"]
+                "4x25G(4)": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
+                "4x10G(4)": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
+                "8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"],
+                "8x25G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"]
             }
         }
     }
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/UFISPACE-S9321-64E/hwsku.json b/device/ufispace/x86_64-ufispace_s9321_64e-r0/UFISPACE-S9321-64E/hwsku.json
new file mode 100644
index 00000000000..cf2a2fc403e
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/UFISPACE-S9321-64E/hwsku.json
@@ -0,0 +1,197 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "1x800G"
+        }
+    }
+}
+
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/UFISPACE-S9321-64E/sai.profile b/device/ufispace/x86_64-ufispace_s9321_64e-r0/UFISPACE-S9321-64E/sai.profile
new file mode 100644
index 00000000000..a74033b9c5d
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/UFISPACE-S9321-64E/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-s9321-64e-64x800G.config.yml
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/UFISPACE-S9321-64E/th5-s9321-64e-64x800G.config.yml b/device/ufispace/x86_64-ufispace_s9321_64e-r0/UFISPACE-S9321-64E/th5-s9321-64e-64x800G.config.yml
new file mode 100644
index 00000000000..c68682b8e86
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/UFISPACE-S9321-64E/th5-s9321-64e-64x800G.config.yml
@@ -0,0 +1,1200 @@
+---
+bcm_device:
+    0:
+      global:
+        pktio_mode: 1
+        vlan_flooding_l2mc_num_reserved: 0
+        ipv6_lpm_128b_enable: 1
+        shared_block_mask_section: uc_bc
+        skip_protocol_default_entries: 1
+        # LTSW uses value 1 for ALPM combined mode
+        l3_alpm_template: 1
+        l3_alpm_hit_skip: 1
+        sai_feat_tail_timestamp : 1
+        sai_field_group_auto_prioritize: 1
+        #l3_intf_vlan_split_egress for MTU at L3IF
+        l3_intf_vlan_split_egress : 1
+        pfc_deadlock_seq_control : 1
+        sai_tunnel_support: 1
+        sai_tunnel_vxlan_scale: 0
+        bcm_tunnel_term_compatible_mode: 1
+        l3_ecmp_member_first_lkup_mem_size: 12288
+        riot_overlay_l3_egress_mem_size: 16384
+        riot_overlay_l3_intf_mem_size: 4096
+        sai_tunnel_ecmp_sharing_mode: 2
+        sai_l3_byte1_udf_disable: 1
+        sai_svi_my_station_optimization : 1
+        sai_l3_neighbor_discard_flag_capable: 0
+        sai_l3_route_discard_flag_capable: 0
+        #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc 
+        global_flexctr_ing_action_num_reserved: 20
+        global_flexctr_ing_pool_num_reserved: 8
+        global_flexctr_ing_op_profile_num_reserved: 20
+        global_flexctr_ing_group_num_reserved: 2
+        global_flexctr_egr_action_num_reserved: 8
+        global_flexctr_egr_pool_num_reserved: 5
+        global_flexctr_egr_op_profile_num_reserved: 10
+        global_flexctr_egr_group_num_reserved: 1
+        flowtracker_enable: 1
+        flowtracker_hardware_learn_enable: 2
+        flowtracker_flexctr_alloc_enable: 2
+        flowtracker_max_flows: 131072
+        sai_create_dflt_trap: 1
+        default_cpu_tx_queue: 7
+        sai_port_queue_ecn_counter: 1
+        stat_custom_receive0_management_mode: 1
+...
+---
+device:
+  0:
+    PC_PM_CORE:
+      ?
+        PC_PM_ID: 1
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x16
+        TX_POLARITY_FLIP: 0x6e
+      ?
+        PC_PM_ID: 2
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x22
+        TX_POLARITY_FLIP: 0x30
+      ?
+        PC_PM_ID: 3
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x07
+        TX_POLARITY_FLIP: 0x28
+      ?
+        PC_PM_ID: 4
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x53
+        TX_POLARITY_FLIP: 0x39
+      ?
+        PC_PM_ID: 5
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x80
+        TX_POLARITY_FLIP: 0xf3
+      ?
+        PC_PM_ID: 6
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x3c
+        TX_POLARITY_FLIP: 0x22
+      ?
+        PC_PM_ID: 7
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 8
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 9
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x06
+        TX_POLARITY_FLIP: 0xa0
+      ?
+        PC_PM_ID: 10
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0x29
+      ?
+        PC_PM_ID: 11
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 12
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 13
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x26
+        TX_POLARITY_FLIP: 0xa0
+      ?
+        PC_PM_ID: 14
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x30
+        TX_POLARITY_FLIP: 0x55
+      ?
+        PC_PM_ID: 15
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 16
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 17
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x66
+        TX_POLARITY_FLIP: 0x96
+      ?
+        PC_PM_ID: 18
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x4d
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 19
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x6d
+      ?
+        PC_PM_ID: 20
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x6d
+      ?
+        PC_PM_ID: 21
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe2
+        TX_POLARITY_FLIP: 0xd7
+      ?
+        PC_PM_ID: 22
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xfa
+        TX_POLARITY_FLIP: 0x91
+      ?
+        PC_PM_ID: 23
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x6d
+      ?
+        PC_PM_ID: 24
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x6d
+      ?
+        PC_PM_ID: 25
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe6
+        TX_POLARITY_FLIP: 0x9f
+      ?
+        PC_PM_ID: 26
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x68
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 27
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x6c
+      ?
+        PC_PM_ID: 28
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x8b
+        TX_POLARITY_FLIP: 0xb2
+      ?
+        PC_PM_ID: 29
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xdd
+        TX_POLARITY_FLIP: 0xcc
+      ?
+        PC_PM_ID: 30
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x33
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 31
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xdd
+        TX_POLARITY_FLIP: 0xcc
+      ?
+        PC_PM_ID: 32
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x33
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 33
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xcc
+        TX_POLARITY_FLIP: 0x55
+      ?
+        PC_PM_ID: 34
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x22
+        TX_POLARITY_FLIP: 0x33
+      ?
+        PC_PM_ID: 35
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xcc
+        TX_POLARITY_FLIP: 0x55
+      ?
+        PC_PM_ID: 36
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x22
+        TX_POLARITY_FLIP: 0x33
+      ?
+        PC_PM_ID: 37
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x74
+        TX_POLARITY_FLIP: 0x4d
+      ?
+        PC_PM_ID: 38
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe8
+        TX_POLARITY_FLIP: 0x93
+      ?
+        PC_PM_ID: 39
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x2d
+      ?
+        PC_PM_ID: 40
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x1f
+        TX_POLARITY_FLIP: 0x68
+      ?
+        PC_PM_ID: 41
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe8
+        TX_POLARITY_FLIP: 0x92
+      ?
+        PC_PM_ID: 42
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe8
+        TX_POLARITY_FLIP: 0x92
+      ?
+        PC_PM_ID: 43
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x61
+      ?
+        PC_PM_ID: 44
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x5d
+        TX_POLARITY_FLIP: 0x68
+      ?
+        PC_PM_ID: 45
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe8
+        TX_POLARITY_FLIP: 0x92
+      ?
+        PC_PM_ID: 46
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe8
+        TX_POLARITY_FLIP: 0x92
+      ?
+        PC_PM_ID: 47
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x5f
+        TX_POLARITY_FLIP: 0x7d
+      ?
+        PC_PM_ID: 48
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x1d
+        TX_POLARITY_FLIP: 0x68
+      ?
+        PC_PM_ID: 49
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 50
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 51
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xb0
+        TX_POLARITY_FLIP: 0x88
+      ?
+        PC_PM_ID: 52
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf9
+        TX_POLARITY_FLIP: 0x5f
+      ?
+        PC_PM_ID: 53
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 54
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 55
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xbb
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 56
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf9
+        TX_POLARITY_FLIP: 0x5f
+      ?
+        PC_PM_ID: 57
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 58
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 59
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x53
+      ?
+        PC_PM_ID: 60
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x7f
+        TX_POLARITY_FLIP: 0x0c
+      ?
+        PC_PM_ID: 61
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x07
+        TX_POLARITY_FLIP: 0xf3
+      ?
+        PC_PM_ID: 62
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x08
+        TX_POLARITY_FLIP: 0xd7
+      ?
+        PC_PM_ID: 63
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x43
+        TX_POLARITY_FLIP: 0xcd
+      ?
+        PC_PM_ID: 64
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x36
+        TX_POLARITY_FLIP: 0x91
+...
+---
+device:
+  0:
+    PC_PORT_PHYS_MAP:
+      ?
+        PORT_ID: 0
+      :
+        PC_PHYS_PORT_ID: 0
+      ?
+        PORT_ID: 33
+      :
+        PC_PHYS_PORT_ID: 49
+      ?
+        PORT_ID: 34
+      :
+        PC_PHYS_PORT_ID: 57
+      ?
+        PORT_ID: 55
+      :
+        PC_PHYS_PORT_ID: 81
+      ?
+        PORT_ID: 56
+      :
+        PC_PHYS_PORT_ID: 89
+      ?
+        PORT_ID: 77
+      :
+        PC_PHYS_PORT_ID: 113
+      ?
+        PORT_ID: 78
+      :
+        PC_PHYS_PORT_ID: 121
+      ?
+        PORT_ID: 99
+      :
+        PC_PHYS_PORT_ID: 145
+      ?
+        PORT_ID: 100
+      :
+        PC_PHYS_PORT_ID: 153
+      ?
+        PORT_ID: 121
+      :
+        PC_PHYS_PORT_ID: 177
+      ?
+        PORT_ID: 122
+      :
+        PC_PHYS_PORT_ID: 185
+      ?
+        PORT_ID: 143
+      :
+        PC_PHYS_PORT_ID: 209
+      ?
+        PORT_ID: 144
+      :
+        PC_PHYS_PORT_ID: 217
+      ?
+        PORT_ID: 154
+      :
+        PC_PHYS_PORT_ID: 225
+      ?
+        PORT_ID: 155
+      :
+        PC_PHYS_PORT_ID: 233
+      ?
+        PORT_ID: 165
+      :
+        PC_PHYS_PORT_ID: 241
+      ?
+        PORT_ID: 166
+      :
+        PC_PHYS_PORT_ID: 249
+      ?
+        PORT_ID: 177
+      :
+        PC_PHYS_PORT_ID: 265
+      ?
+        PORT_ID: 176
+      :
+        PC_PHYS_PORT_ID: 257
+      ?
+        PORT_ID: 188
+      :
+        PC_PHYS_PORT_ID: 281
+      ?
+        PORT_ID: 187
+      :
+        PC_PHYS_PORT_ID: 273
+      ?
+        PORT_ID: 199
+      :
+        PC_PHYS_PORT_ID: 297
+      ?
+        PORT_ID: 198
+      :
+        PC_PHYS_PORT_ID: 289
+      ?
+        PORT_ID: 221
+      :
+        PC_PHYS_PORT_ID: 329
+      ?
+        PORT_ID: 220
+      :
+        PC_PHYS_PORT_ID: 321
+      ?
+        PORT_ID: 243
+      :
+        PC_PHYS_PORT_ID: 361
+      ?
+        PORT_ID: 242
+      :
+        PC_PHYS_PORT_ID: 353
+      ?
+        PORT_ID: 265
+      :
+        PC_PHYS_PORT_ID: 393
+      ?
+        PORT_ID: 264
+      :
+        PC_PHYS_PORT_ID: 385
+      ?
+        PORT_ID: 287
+      :
+        PC_PHYS_PORT_ID: 425
+      ?
+        PORT_ID: 286
+      :
+        PC_PHYS_PORT_ID: 417
+      ?
+        PORT_ID: 309
+      :
+        PC_PHYS_PORT_ID: 457
+      ?
+        PORT_ID: 308
+      :
+        PC_PHYS_PORT_ID: 449
+      ?
+        PORT_ID: 23
+      :
+        PC_PHYS_PORT_ID: 41
+      ?
+        PORT_ID: 22
+      :
+        PC_PHYS_PORT_ID: 33
+      ?
+        PORT_ID: 45
+      :
+        PC_PHYS_PORT_ID: 73
+      ?
+        PORT_ID: 44
+      :
+        PC_PHYS_PORT_ID: 65
+      ?
+        PORT_ID: 67
+      :
+        PC_PHYS_PORT_ID: 105
+      ?
+        PORT_ID: 66
+      :
+        PC_PHYS_PORT_ID: 97
+      ?
+        PORT_ID: 89
+      :
+        PC_PHYS_PORT_ID: 137
+      ?
+        PORT_ID: 88
+      :
+        PC_PHYS_PORT_ID: 129
+      ?
+        PORT_ID: 111
+      :
+        PC_PHYS_PORT_ID: 169
+      ?
+        PORT_ID: 110
+      :
+        PC_PHYS_PORT_ID: 161
+      ?
+        PORT_ID: 133
+      :
+        PC_PHYS_PORT_ID: 201
+      ?
+        PORT_ID: 132
+      :
+        PC_PHYS_PORT_ID: 193
+      ?
+        PORT_ID: 11
+      :
+        PC_PHYS_PORT_ID: 17
+      ?
+        PORT_ID: 12
+      :
+        PC_PHYS_PORT_ID: 25
+      ?
+        PORT_ID: 1
+      :
+        PC_PHYS_PORT_ID: 1
+      ?
+        PORT_ID: 2
+      :
+        PC_PHYS_PORT_ID: 9
+      ?
+        PORT_ID: 342
+      :
+        PC_PHYS_PORT_ID: 505
+      ?
+        PORT_ID: 341
+      :
+        PC_PHYS_PORT_ID: 497
+      ?
+        PORT_ID: 331
+      :
+        PC_PHYS_PORT_ID: 489
+      ?
+        PORT_ID: 330
+      :
+        PC_PHYS_PORT_ID: 481
+      ?
+        PORT_ID: 209
+      :
+        PC_PHYS_PORT_ID: 305
+      ?
+        PORT_ID: 210
+      :
+        PC_PHYS_PORT_ID: 313
+      ?
+        PORT_ID: 231
+      :
+        PC_PHYS_PORT_ID: 337
+      ?
+        PORT_ID: 232
+      :
+        PC_PHYS_PORT_ID: 345
+      ?
+        PORT_ID: 253
+      :
+        PC_PHYS_PORT_ID: 369
+      ?
+        PORT_ID: 254
+      :
+        PC_PHYS_PORT_ID: 377
+      ?
+        PORT_ID: 275
+      :
+        PC_PHYS_PORT_ID: 401
+      ?
+        PORT_ID: 276
+      :
+        PC_PHYS_PORT_ID: 409
+      ?
+        PORT_ID: 297
+      :
+        PC_PHYS_PORT_ID: 433
+      ?
+        PORT_ID: 298
+      :
+        PC_PHYS_PORT_ID: 441
+      ?
+        PORT_ID: 319
+      :
+        PC_PHYS_PORT_ID: 465
+      ?
+        PORT_ID: 320
+      :
+        PC_PHYS_PORT_ID: 473
+...
+---
+device:
+  0:
+    PC_PORT:
+      ?
+        PORT_ID: [[1, 2],
+                  [11, 12],
+                  [22, 23],
+                  [33, 34],
+                  [44, 45],
+                  [55, 56],
+                  [66, 67],
+                  [77, 78],
+                  [88, 89],
+                  [99, 100],
+                  [110, 111],
+                  [121, 122],
+                  [132, 133],
+                  [143, 144],
+                  [154, 155],
+                  [165, 166],
+                  [176, 177],
+                  [187, 188],
+                  [198, 199],
+                  [209, 210],
+                  [220, 221],
+                  [231, 232],
+                  [242, 243],
+                  [253, 254],
+                  [264, 265],
+                  [275, 276],
+                  [286, 287],
+                  [297, 298],
+                  [308, 309],
+                  [319, 320],
+                  [330, 331],
+                  [341, 342]]
+      :
+        ENABLE: 0
+        SPEED: 800000
+        NUM_LANES: 8
+        FEC_MODE: PC_FEC_RS544_2XN
+        MAX_FRAME_SIZE: 9416
+      ?
+        PORT_ID: 0
+      :
+        ENABLE: 1
+        SPEED: 10000
+        NUM_LANES: 1
+        FEC_MODE: PC_FEC_NONE
+
+    PC_PMD_FIRMWARE:
+      ?
+        PORT_ID: [[1, 2], [11, 12], [22, 23], [33, 34], [44, 45], [55, 56], [66, 67], [77, 78], [88, 89], [99, 100], [110, 111], [121, 122], [132, 133], [143, 144], [154, 155], [165, 166], [176, 177], [187, 188], [198, 199], [209, 210], [220, 221], [231, 232], [242, 243], [253, 254], [264, 265], [275, 276], [286, 287], [297, 298], [308, 309], [319, 320], [330, 331], [341, 342]]
+      :
+        MEDIUM_TYPE_AUTO: 1
+        MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE
+        NORMAL_REACH_PAM4_AUTO: 1
+        NORMAL_REACH_PAM4: 0xff
+        EXTENDED_REACH_PAM4_AUTO: 1
+        EXTENDED_REACH_PAM4: 0xff
+        LP_TX_PRECODER_ON_AUTO: 1
+        LP_TX_PRECODER_ON: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration. Enable PPIU Mode
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        TM_SCHEDULER_CONFIG:
+            DYNAMIC_VOQ: 0
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+        TM_SCHEDULER_CONFIG:
+            DYNAMIC_VOQ: 0
+...
+
+#Lossless buffer configs
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            SKIP_BUFFER_RESERVATION: 0
+            THRESHOLD_MODE: LOSSY
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,20], [22,42], [44,64], [66,86], [88,108], [110,130], [132,152], [154,174], [176,196], [198,218], [220,240], [242,262], [264,284], [286,306], [308,328], [330,350]]
+                TM_PRI_GRP_ID: [[3,4]]
+            :
+                LOSSLESS: 0
+...
+
+---
+device:
+    0:
+        # Q-Group reservations
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,20], [22,42], [44,64], [66,86], [88,108], [110,130], [132,152], [154,174], [176,196], [198,218], [220,240], [242,262], [264,284], [286,306], [308,328], [330,350]]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 14
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 14
+...
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9321_64e-r0/custom_led.bin
new file mode 100644
index 00000000000..c46d3d5f27c
Binary files /dev/null and b/device/ufispace/x86_64-ufispace_s9321_64e-r0/custom_led.bin differ
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/default_sku b/device/ufispace/x86_64-ufispace_s9321_64e-r0/default_sku
new file mode 100644
index 00000000000..2572a7f5f2e
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/default_sku
@@ -0,0 +1 @@
+UFISPACE-S9321-64E t1
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/fancontrol b/device/ufispace/x86_64-ufispace_s9321_64e-r0/fancontrol
new file mode 100644
index 00000000000..1234cd994f3
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/fancontrol
@@ -0,0 +1,10 @@
+# Configuration file generated by pwmconfig, changes will be lost
+INTERVAL=10
+DEVPATH=
+DEVNAME=
+FCTEMPS=
+FCFANS=
+MINTEMP=
+MAXTEMP=
+MINSTART=
+MINSTOP=
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9321_64e-r0/installer.conf
new file mode 100644
index 00000000000..0fc3e43b5ca
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_PORT=0x3f8
+CONSOLE_DEV=0
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx,i2c_ismt,ice,vmd nomodeset pcie_aspm=off"
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9321_64e-r0/led_proc_init.soc
new file mode 100644
index 00000000000..eda09a0dd1f
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/led_proc_init.soc
@@ -0,0 +1,4 @@
+led stop
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s9321_64e-r0/pcie.yaml
new file mode 100644
index 00000000000..bf7f8791948
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/pcie.yaml
@@ -0,0 +1,510 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Ice Lake Memory Map/VT-d (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Ice Lake Mesh 2 PCIe (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Ice Lake RAS (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '2'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '3'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '4'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '5'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '6'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '7'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 09a6
+  name: 'System peripheral: Intel Corporation Ice Lake MSM'
+- bus: '00'
+  dev: '02'
+  fn: '1'
+  id: 09a7
+  name: 'System peripheral: Intel Corporation Ice Lake PMON MSM'
+- bus: '00'
+  dev: '02'
+  fn: '4'
+  id: '3456'
+  name: 'Non-Essential Instrumentation [1300]: Intel Corporation Ice Lake NorthPeak
+    (rev 01)'
+- bus: '00'
+  dev: 08
+  fn: '0'
+  id: 18c2
+  name: 'SATA controller: Intel Corporation Device 18c2 (rev 11)'
+- bus: '00'
+  dev: 09
+  fn: '0'
+  id: 18a4
+  name: 'PCI bridge: Intel Corporation Device 18a4 (rev 11)'
+- bus: '00'
+  dev: 0f
+  fn: '0'
+  id: 18ac
+  name: 'System peripheral: Intel Corporation Device 18ac (rev 11)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 18ad
+  name: 'PCI bridge: Intel Corporation Device 18ad (rev 11)'
+- bus: '00'
+  dev: '17'
+  fn: '0'
+  id: 18a2
+  name: 'PCI bridge: Intel Corporation Device 18a2 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 18d3
+  name: 'Communication controller: Intel Corporation Atom Processor P5xxx Series MEI
+    Controller (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '4'
+  id: 18d6
+  name: 'Communication controller: Intel Corporation Atom Processor P5xxx Series MEI
+    Controller (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '0'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '1'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '2'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '3'
+  id: 18d9
+  name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: '00'
+  dev: 1e
+  fn: '0'
+  id: 18d0
+  name: 'USB controller: Intel Corporation Atom Processor P5xxx Series USB xHCI Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 18dc
+  name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: 18df
+  name: 'SMBus: Intel Corporation Atom Processor P5xxx Series SMBus Controller (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: 18e0
+  name: 'Serial bus controller: Intel Corporation Atom Processor P5xxx Series SPI
+    Controller (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '7'
+  id: 18e1
+  name: 'Non-Essential Instrumentation [1300]: Intel Corporation Atom Processor P5xxx
+    Series Trace Hub (rev 11)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: '1150'
+  name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 06)'
+- bus: '15'
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Ice Lake Memory Map/VT-d (rev 04)'
+- bus: '15'
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Ice Lake Mesh 2 PCIe (rev 04)'
+- bus: '15'
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Ice Lake RAS (rev 04)'
+- bus: '15'
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '15'
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: '15'
+  dev: '02'
+  fn: '0'
+  id: 347a
+  name: 'PCI bridge: Intel Corporation Device 347a (rev 06)'
+- bus: '15'
+  dev: '03'
+  fn: '0'
+  id: 347b
+  name: 'PCI bridge: Intel Corporation Device 347b (rev 06)'
+- bus: '15'
+  dev: '04'
+  fn: '0'
+  id: 347c
+  name: 'PCI bridge: Intel Corporation Device 347c (rev 06)'
+- bus: '15'
+  dev: '05'
+  fn: '0'
+  id: 347d
+  name: 'PCI bridge: Intel Corporation Device 347d (rev 06)'
+- bus: '18'
+  dev: '00'
+  fn: '0'
+  id: '0001'
+  name: 'Non-VGA unclassified device: Device 0000:0001 (rev 01)'
+- bus: '19'
+  dev: '00'
+  fn: '0'
+  id: f900
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM78900 Switch ASIC
+    [Tomahawk5] (rev 11)'
+- bus: '84'
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Ice Lake Memory Map/VT-d (rev 04)'
+- bus: '84'
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Ice Lake Mesh 2 PCIe (rev 04)'
+- bus: '84'
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Ice Lake RAS (rev 04)'
+- bus: '84'
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '84'
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: '84'
+  dev: '04'
+  fn: '0'
+  id: 18d1
+  name: 'PCI bridge: Intel Corporation Device 18d1'
+- bus: '85'
+  dev: '00'
+  fn: '0'
+  id: 188a
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-C for backplane'
+- bus: '85'
+  dev: '00'
+  fn: '1'
+  id: 188a
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-C for backplane'
+- bus: '85'
+  dev: '00'
+  fn: '2'
+  id: 188a
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-C for backplane'
+- bus: '85'
+  dev: '00'
+  fn: '3'
+  id: 188a
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-C for backplane'
+- bus: 8c
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Ice Lake Memory Map/VT-d (rev 04)'
+- bus: 8c
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Ice Lake Mesh 2 PCIe (rev 04)'
+- bus: 8c
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Ice Lake RAS (rev 04)'
+- bus: 8c
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: 8c
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: 8c
+  dev: '00'
+  fn: '5'
+  id: 28c0
+  name: 'RAID bus controller: Intel Corporation Volume Management Device NVMe RAID
+    Controller (rev 04)'
+- bus: 8c
+  dev: '02'
+  fn: '0'
+  id: 09ab
+  name: 'System peripheral: Intel Corporation RST VMD Managed Controller'
+- bus: 8c
+  dev: '03'
+  fn: '0'
+  id: 09ab
+  name: 'System peripheral: Intel Corporation RST VMD Managed Controller'
+- bus: 8c
+  dev: '04'
+  fn: '0'
+  id: 347c
+  name: 'PCI bridge: Intel Corporation Device 347c (rev 06)'
+- bus: 8c
+  dev: '05'
+  fn: '0'
+  id: 347d
+  name: 'PCI bridge: Intel Corporation Device 347d (rev 06)'
+- bus: fe
+  dev: '00'
+  fn: '0'
+  id: '3450'
+  name: 'System peripheral: Intel Corporation Device 3450'
+- bus: fe
+  dev: '00'
+  fn: '1'
+  id: '3451'
+  name: 'System peripheral: Intel Corporation Device 3451'
+- bus: fe
+  dev: '00'
+  fn: '2'
+  id: '3452'
+  name: 'System peripheral: Intel Corporation Device 3452'
+- bus: fe
+  dev: '00'
+  fn: '3'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: fe
+  dev: '00'
+  fn: '5'
+  id: '3455'
+  name: 'System peripheral: Intel Corporation Device 3455'
+- bus: fe
+  dev: 0b
+  fn: '0'
+  id: '3448'
+  name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+  dev: 0b
+  fn: '1'
+  id: '3448'
+  name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+  dev: 0b
+  fn: '2'
+  id: 344b
+  name: 'System peripheral: Intel Corporation Device 344b'
+- bus: fe
+  dev: 0c
+  fn: '0'
+  id: 344a
+  name: 'Performance counters: Intel Corporation Device 344a'
+- bus: fe
+  dev: 0d
+  fn: '0'
+  id: 344a
+  name: 'Performance counters: Intel Corporation Device 344a'
+- bus: fe
+  dev: 1a
+  fn: '0'
+  id: '2880'
+  name: 'Performance counters: Intel Corporation Device 2880'
+- bus: fe
+  dev: 1b
+  fn: '0'
+  id: '2880'
+  name: 'Performance counters: Intel Corporation Device 2880'
+- bus: ff
+  dev: '00'
+  fn: '0'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '1'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '2'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '3'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '4'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '5'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: 0a
+  fn: '0'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '1'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '2'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '3'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '4'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '5'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 1d
+  fn: '0'
+  id: 344f
+  name: 'System peripheral: Intel Corporation Device 344f'
+- bus: ff
+  dev: 1d
+  fn: '1'
+  id: '3457'
+  name: 'System peripheral: Intel Corporation Device 3457'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: '3458'
+  name: 'System peripheral: Intel Corporation Device 3458 (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: '3459'
+  name: 'System peripheral: Intel Corporation Device 3459 (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 345a
+  name: 'System peripheral: Intel Corporation Device 345a (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 345b
+  name: 'System peripheral: Intel Corporation Device 345b (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 345c
+  name: 'System peripheral: Intel Corporation Device 345c (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '5'
+  id: 345d
+  name: 'System peripheral: Intel Corporation Device 345d (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '6'
+  id: 345e
+  name: 'System peripheral: Intel Corporation Device 345e (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '7'
+  id: 345f
+  name: 'System peripheral: Intel Corporation Device 345f (rev 01)'
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9321_64e-r0/pddf/pd-plugin.json
new file mode 100644
index 00000000000..2fe81c251fb
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/pddf/pd-plugin.json
@@ -0,0 +1,84 @@
+{
+
+    "XCVR":
+    {
+        "xcvr_present":
+        {
+           "i2c":
+           {
+               "valmap-SFP": {"1":true, "0":false },
+               "valmap-QSFP-DD": {"1":true, "0":false},
+               "valmap-QSFP": {"1":true, "0":false}
+           }
+        },
+        "status":
+        {
+            "inserted": "1",
+            "removed": "0"
+        }
+    },
+
+    "PSU":
+    {
+        "psu_present":
+        {
+            "i2c":
+            {
+                "valmap": { "1":true, "0":false }
+            }
+        },
+
+        "psu_power_good":
+        {
+            "i2c":
+            {
+                "valmap": { "1": true, "0":false }
+            }
+        },
+
+        "psu_fan_dir":
+        {
+            "bmc":
+            {
+                "valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"}
+            }
+        },
+        "psu_support_list":
+        [
+            {"Manufacturer": "DELTA","Name": "DTQ3000AN12C12", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Type":"AC", "Dir": "EXHAUST"},
+            {"Manufacturer": "DELTA","Name": "DTQ3001DS12L1P", "MaxSpd": "PSU_DC_FAN_MAX_SPEED", "Type":"DC", "Dir": "EXHAUST"}
+        ],
+
+        "valmap": {"PSU_AC_FAN_MAX_SPEED": "25000", "PSU_DC_FAN_MAX_SPEED":"32500", "DEFAULT_TYPE": "AC"}
+    },
+
+    "FAN":
+    {
+        "direction":
+        {
+            "bmc":
+            {
+                "valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"}
+            }
+        },
+
+        "present":
+        {
+            "i2c":
+            {
+                "valmap": {"1":true, "0":false}
+            },
+            "bmc":
+            {
+                "valmap": {"Device Present":true, "Device Absent":false}
+            }
+        },
+        "FAN_R_MAX_SPEED":"11300",
+        "FAN_F_MAX_SPEED":"12000"
+    },
+
+    "REBOOT_CAUSE":
+    {
+        "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt"
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9321_64e-r0/pddf/pddf-device.json
new file mode 100644
index 00000000000..66e854a0302
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/pddf/pddf-device.json
@@ -0,0 +1,8287 @@
+{
+    "PLATFORM": {
+        "num_psus": 2,
+        "num_fantrays": 4,
+        "num_fans_pertray": 2,
+        "num_ports": 66,
+        "num_temps": 12,
+        "pddf_dev_types": {
+            "description": "PDDF supported devices",
+            "CPLD": [
+                "i2c_cpld"
+            ],
+            "PSU": [
+                "psu_eeprom",
+                "psu_pmbus"
+            ],
+            "PORT_MODULE": [
+                "pddf_xcvr"
+            ],
+            "CPLDMUX": [
+                "cpld_mux"
+            ]
+        },
+        "std_perm_kos": [
+            "i2c-i801"
+        ],
+        "std_kos": [
+            "i2c_dev",
+            "i2c_mux_pca954x",
+            "optoe",
+            "gpio-pca953x"
+        ],
+        "pddf_kos": [
+            "pddf_client_module",
+            "pddf_cpld_module",
+            "pddf_cpld_driver",
+            "pddf_mux_module",
+            "pddf_cpldmux_module",
+            "pddf_cpldmux_driver",
+            "pddf_xcvr_module",
+            "pddf_fpgapci_driver",
+            "pddf_xcvr_driver_module",
+            "pddf_psu_driver_module",
+            "pddf_psu_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
+            "pddf_fan_driver_module",
+            "pddf_fan_module",
+            "pddf_led_module",
+            "pddf_gpio_module"
+        ],
+        "custom_kos": [
+            "x86-64-ufispace-s9321-64e-lpc",
+            "x86-64-ufispace-s9321-64e-sys-eeprom",
+            "pddf_custom_sysstatus_module",
+            "pddf_custom_cpldmux_driver"
+        ]
+    },
+    "SYSTEM": {
+        "dev_info": {
+            "device_type": "CPU",
+            "device_name": "ROOT_COMPLEX",
+            "device_parent": null
+        },
+        "i2c": {
+            "CONTROLLERS": [
+                {
+                    "dev_name": "i2c-0",
+                    "dev": "SMBUS0"
+                }
+            ]
+        }
+    },
+    "SMBUS0": {
+        "dev_info": {
+            "device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"
+        },
+        "i2c": {
+            "topo_info": {
+                "dev_addr": "0x0"
+            },
+            "DEVICES": [
+                {
+                    "dev": "EEPROM1"
+                },
+                {
+                    "dev": "MUX1"
+                },
+                {
+                    "dev": "MUX2"
+                }
+            ]
+        }
+    },
+    "EEPROM1": {
+        "dev_info": {
+            "device_type": "EEPROM",
+            "device_name": "EEPROM1",
+            "device_parent": "SMBUS0"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x57",
+                "dev_type": "sys_eeprom"
+            },
+            "dev_attr": {
+                "access_mode": "BLOCK"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "MUX1": {
+        "dev_info": { "device_type": "MUX", "device_name": "MUX1", "device_parent": "SMBUS0"},
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x72",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x1",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "CPLD1"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLD2"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLDMUX1"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLD3"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLDMUX2"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLD4"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLDMUX3"
+                },
+                {
+                    "chn": "0",
+                    "dev": "PSU1"
+                },
+                {
+                    "chn": "0",
+                    "dev": "PSU2"
+                },
+                {
+                    "chn": "3",
+                    "dev": "GPIO1"
+                }
+            ]
+        }
+    },
+    "MUX2": {
+        "dev_info": { "device_type": "MUX", "device_name": "MUX2", "device_parent": "SMBUS0"},
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x73",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x9",
+                "idle_state": "-2"
+            },
+            "channel": [ ]
+        }
+    },
+    "CPLD1": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD1",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x30",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLD2": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD2",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x31",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLDMUX1":
+    {
+        "dev_info": { "device_type":"CPLDMUX", "device_name":"CPLD2_MUX", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1", "dev_type":"cpld_mux", "dev_id":"1"},
+            "dev_attr": { "base_chan":"0x11", "num_chan":"32", "cpld_name":"CPLD2", "chan_cache": "0"},
+            "channel":
+            [
+                { "chan":"0" , "dev":["PORT1"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x81", "cpld_desel": "0x80"},
+                { "chan":"1" , "dev":["PORT2"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x82", "cpld_desel": "0x80"},
+                { "chan":"2" , "dev":["PORT3"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x83", "cpld_desel": "0x80"},
+                { "chan":"3" , "dev":["PORT4"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x84", "cpld_desel": "0x80"},
+                { "chan":"4" , "dev":["PORT5"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x85", "cpld_desel": "0x80"},
+                { "chan":"5" , "dev":["PORT6"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x86", "cpld_desel": "0x80"},
+                { "chan":"6" , "dev":["PORT7"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x87", "cpld_desel": "0x80"},
+                { "chan":"7" , "dev":["PORT8"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x88", "cpld_desel": "0x80"},
+                { "chan":"8" , "dev":["PORT9"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x89", "cpld_desel": "0x80"},
+                { "chan":"9" , "dev":["PORT10"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8A", "cpld_desel": "0x80"},
+                { "chan":"10", "dev":["PORT11"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8B", "cpld_desel": "0x80"},
+                { "chan":"11", "dev":["PORT12"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8C", "cpld_desel": "0x80"},
+                { "chan":"12", "dev":["PORT13"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8D", "cpld_desel": "0x80"},
+                { "chan":"13", "dev":["PORT14"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8E", "cpld_desel": "0x80"},
+                { "chan":"14", "dev":["PORT15"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8F", "cpld_desel": "0x80"},
+                { "chan":"15", "dev":["PORT16"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x90", "cpld_desel": "0x80"},
+                { "chan":"16", "dev":["PORT33"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x91", "cpld_desel": "0x80"},
+                { "chan":"17", "dev":["PORT34"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x92", "cpld_desel": "0x80"},
+                { "chan":"18", "dev":["PORT35"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x93", "cpld_desel": "0x80"},
+                { "chan":"19", "dev":["PORT36"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x94", "cpld_desel": "0x80"},
+                { "chan":"20", "dev":["PORT37"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x95", "cpld_desel": "0x80"},
+                { "chan":"21", "dev":["PORT38"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x96", "cpld_desel": "0x80"},
+                { "chan":"22", "dev":["PORT39"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x97", "cpld_desel": "0x80"},
+                { "chan":"23", "dev":["PORT40"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x98", "cpld_desel": "0x80"},
+                { "chan":"24", "dev":["PORT41"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x99", "cpld_desel": "0x80"},
+                { "chan":"25", "dev":["PORT42"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9A", "cpld_desel": "0x80"},
+                { "chan":"26", "dev":["PORT43"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9B", "cpld_desel": "0x80"},
+                { "chan":"27", "dev":["PORT44"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9C", "cpld_desel": "0x80"},
+                { "chan":"28", "dev":["PORT45"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9D", "cpld_desel": "0x80"},
+                { "chan":"29", "dev":["PORT46"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9E", "cpld_desel": "0x80"},
+                { "chan":"30", "dev":["PORT47"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9F", "cpld_desel": "0x80"},
+                { "chan":"31", "dev":["PORT48"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0xA0", "cpld_desel": "0x80"}
+            ]
+        }
+    },
+    "CPLD3": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD3",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x32",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLDMUX2":
+    {
+        "dev_info": { "device_type":"CPLDMUX", "device_name":"CPLD3_MUX", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1", "dev_type":"cpld_mux", "dev_id":"2"},
+            "dev_attr": { "base_chan":"0x31", "num_chan":"32", "cpld_name":"CPLD3", "chan_cache": "0"},
+            "channel":
+            [
+                { "chan":"0" , "dev":["PORT17"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x81", "cpld_desel": "0x80"},
+                { "chan":"1" , "dev":["PORT18"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x82", "cpld_desel": "0x80"},
+                { "chan":"2" , "dev":["PORT19"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x83", "cpld_desel": "0x80"},
+                { "chan":"3" , "dev":["PORT20"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x84", "cpld_desel": "0x80"},
+                { "chan":"4" , "dev":["PORT21"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x85", "cpld_desel": "0x80"},
+                { "chan":"5" , "dev":["PORT22"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x86", "cpld_desel": "0x80"},
+                { "chan":"6" , "dev":["PORT23"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x87", "cpld_desel": "0x80"},
+                { "chan":"7" , "dev":["PORT24"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x88", "cpld_desel": "0x80"},
+                { "chan":"8" , "dev":["PORT25"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x89", "cpld_desel": "0x80"},
+                { "chan":"9" , "dev":["PORT26"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8A", "cpld_desel": "0x80"},
+                { "chan":"10", "dev":["PORT27"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8B", "cpld_desel": "0x80"},
+                { "chan":"11", "dev":["PORT28"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8C", "cpld_desel": "0x80"},
+                { "chan":"12", "dev":["PORT29"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8D", "cpld_desel": "0x80"},
+                { "chan":"13", "dev":["PORT30"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8E", "cpld_desel": "0x80"},
+                { "chan":"14", "dev":["PORT31"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8F", "cpld_desel": "0x80"},
+                { "chan":"15", "dev":["PORT32"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x90", "cpld_desel": "0x80"},
+                { "chan":"16", "dev":["PORT49"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x91", "cpld_desel": "0x80"},
+                { "chan":"17", "dev":["PORT50"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x92", "cpld_desel": "0x80"},
+                { "chan":"18", "dev":["PORT51"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x93", "cpld_desel": "0x80"},
+                { "chan":"19", "dev":["PORT52"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x94", "cpld_desel": "0x80"},
+                { "chan":"20", "dev":["PORT53"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x95", "cpld_desel": "0x80"},
+                { "chan":"21", "dev":["PORT54"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x96", "cpld_desel": "0x80"},
+                { "chan":"22", "dev":["PORT55"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x97", "cpld_desel": "0x80"},
+                { "chan":"23", "dev":["PORT56"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x98", "cpld_desel": "0x80"},
+                { "chan":"24", "dev":["PORT57"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x99", "cpld_desel": "0x80"},
+                { "chan":"25", "dev":["PORT58"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9A", "cpld_desel": "0x80"},
+                { "chan":"26", "dev":["PORT59"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9B", "cpld_desel": "0x80"},
+                { "chan":"27", "dev":["PORT60"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9C", "cpld_desel": "0x80"},
+                { "chan":"28", "dev":["PORT61"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9D", "cpld_desel": "0x80"},
+                { "chan":"29", "dev":["PORT62"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9E", "cpld_desel": "0x80"},
+                { "chan":"30", "dev":["PORT63"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9F", "cpld_desel": "0x80"},
+                { "chan":"31", "dev":["PORT64"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0xA0", "cpld_desel": "0x80"}
+            ]
+        }
+    },
+    "CPLD4": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD4",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x37",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLDMUX3":
+    {
+        "dev_info": { "device_type":"CPLDMUX", "device_name":"FPGA_MUX", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1", "dev_type":"cpld_mux", "dev_id":"3"},
+            "dev_attr": { "base_chan":"0x51", "num_chan":"2", "cpld_name":"CPLD4", "chan_cache": "0"},
+            "channel":
+            [
+                { "chan":"0" , "dev":["PORT65"] , "cpld_devaddr":"0x37", "cpld_offset":"0x40", "cpld_sel":"0x81", "cpld_desel": "0x80"},
+                { "chan":"1" , "dev":["PORT66"] , "cpld_devaddr":"0x37", "cpld_offset":"0x40", "cpld_sel":"0x82", "cpld_desel": "0x80"}
+            ]
+        }
+    },
+    "GPIO1": {
+        "dev_info": {
+            "device_type": "GPIO",
+            "device_name": "GPIO1",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4",
+                "dev_addr": "0x20",
+                "dev_type": "pca9555"
+            },
+            "dev_attr": {
+                "gpio_base": "0x10"
+            },
+            "ports": [
+                {"port_num": "15" , "direction": "out", "value": "0", "edge": "", "active_low": ""}
+            ]
+        }
+    },
+    "TEMP1": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP1",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV_CPU"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_CPU",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_CPU",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_CPU",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_CPU",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_CPU",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_CPU",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP2": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP2",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_CPU_PECI"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_CPU_PECI",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_CPU_PECI",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_CPU_PECI",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP3": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP3",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV1"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV1",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV1",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV1",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP4": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP4",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV2"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV2",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV2",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV2",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV2",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV2",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV2",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP5": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP5",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV3"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV3",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV3",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV3",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV3",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV3",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV3",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP6": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP6",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV4"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV4",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV4",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV4",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV4",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV4",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV4",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP7": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP7",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV5"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV5",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV5",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV5",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV5",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV5",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV5",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP8": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP8",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV_RISER"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_RISER",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_RISER",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_RISER",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_RISER",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_RISER",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_RISER",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP9": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP9",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV_FAN0"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN0",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN0",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN0",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN0",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN0",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN0",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP10": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP10",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV_FAN1"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN1",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN1",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN1",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP11": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP11",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_PSU0_TEMP1"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_TEMP1",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_TEMP1",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP12": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP12",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_PSU1_TEMP1"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_TEMP1",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_TEMP1",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "SYSSTATUS": {
+        "dev_info": {
+            "device_type": "SYSSTAT",
+            "device_name": "SYSSTATUS"
+        },
+        "dev_attr": {},
+        "attr_list":
+        [
+            {
+                "attr_name": "board_sku_id",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x0",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "board_hw_id",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x1",
+                "attr_mask": "0x03",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "board_deph_id",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x1",
+                "attr_mask": "0x4",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "board_build_id",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x1",
+                "attr_mask": "0x38",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld1_major_ver",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x2",
+                "attr_mask": "0xc0",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld1_minor_ver",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x2",
+                "attr_mask": "0x3f",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld1_build",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x4",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_major_ver",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x2",
+                "attr_mask": "0xc0",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_minor_ver",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x2",
+                "attr_mask": "0x3f",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_build",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x4",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_major_ver",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0x2",
+                "attr_mask": "0xc0",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_minor_ver",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0x2",
+                "attr_mask": "0x3f",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_build",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0x4",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "fpga_major_ver",
+                "attr_devaddr": "0x37",
+                "attr_offset": "0x2",
+                "attr_mask": "0xc0",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "fpga_minor_ver",
+                "attr_devaddr": "0x37",
+                "attr_offset": "0x2",
+                "attr_mask": "0x3f",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "fpga_build",
+                "attr_devaddr": "0x37",
+                "attr_offset": "0x4",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "psu_status",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x51",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "system_led_sys_fan",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x80",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "system_led_psu",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x81",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "system_led_sync",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x82",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_i2c_ctrl",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0xA0",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_i2c_ctrl",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0xA0",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld_mac_rov",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x54",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld1_evt_ctrl",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x3F",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_evt_ctrl",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x3F",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_evt_ctrl",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0x3F",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "fpga_evt_ctrl",
+                "attr_devaddr": "0x37",
+                "attr_offset": "0x3F",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld_port_led_clr",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x85",
+                "attr_mask": "0x1",
+                "attr_len": "0x1"
+            }
+        ]
+    },
+    "PSU1": {
+        "dev_info": {
+            "device_type": "PSU",
+            "device_name": "PSU1",
+            "device_parent": "MUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "1",
+            "num_psu_fans": "1"
+        },
+        "i2c": {
+            "interface": [
+                { "itf":"eeprom", "dev":"PSU1-EEPROM" }
+            ]
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list":
+                [
+                    {
+                        "attr_name": "psu_v_out",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_VOUT",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_out",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_IOUT",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_TEMP1",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_fan1_speed_rpm",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_FAN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_FAN",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_mfr_id",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Manufacturer",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_model_name",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | grep 'Part Number'|| echo 'Part Number : N/A'); _rv2=$(echo $_rv | cut -d':' -f 2 | awk '{$1=$1};1'); echo 'Part Number : '$_rv2",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Part Number",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_serial_num",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Serial",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    }
+                ]
+            }
+        }
+    },
+    "PSU1-EEPROM": {
+        "dev_info": {
+            "device_type": "PSU-EEPROM",
+            "device_name": "PSU1-EEPROM",
+            "device_parent": "MUX1",
+            "virt_parent": "PSU1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x5a",
+                "dev_type": "psu_eeprom"
+            },
+            "attr_list": [
+                {
+                    "attr_name":"psu_present",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x1",
+                    "attr_cmpval":"0x0",
+                    "attr_len":"1"
+                },
+                {
+                    "attr_name":"psu_power_good",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x10",
+                    "attr_cmpval":"0x10",
+                    "attr_len":"1"
+                }
+            ]
+        }
+    },
+    "PSU2": {
+        "dev_info": {
+            "device_type": "PSU",
+            "device_name": "PSU2",
+            "device_parent": "MUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "2",
+            "num_psu_fans": "1"
+        },
+        "i2c": {
+            "interface": [
+                { "itf":"eeprom", "dev":"PSU2-EEPROM" }
+            ]
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list":
+                [
+                    {
+                        "attr_name": "psu_v_out",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_VOUT",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_out",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_IOUT",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_TEMP1",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_fan1_speed_rpm",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_FAN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_FAN",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_mfr_id",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Manufacturer",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_model_name",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | grep 'Part Number'|| echo 'Part Number : N/A'); _rv2=$(echo $_rv | cut -d':' -f 2 | awk '{$1=$1};1'); echo 'Part Number : '$_rv2",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Part Number",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_serial_num",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Serial",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    }
+                ]
+            }
+        }
+    },
+    "PSU2-EEPROM": {
+        "dev_info": {
+            "device_type": "PSU-EEPROM",
+            "device_name": "PSU2-EEPROM",
+            "device_parent": "MUX1",
+            "virt_parent": "PSU2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x5b",
+                "dev_type": "psu_eeprom"
+            },
+            "attr_list": [
+                {
+                    "attr_name":"psu_present",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x2",
+                    "attr_cmpval":"0x0",
+                    "attr_len":"1"
+                },
+                {
+                    "attr_name":"psu_power_good",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x20",
+                    "attr_cmpval":"0x20",
+                    "attr_len":"1"
+                }
+            ]
+        }
+    },
+    "FAN-CTRL": {
+        "dev_info": {
+            "device_type": "FAN",
+            "device_name": "FAN-CTRL",
+            "device_parent": ""
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "fan1_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN0_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan2_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN0_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan3_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN1_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan4_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN1_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan5_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN2_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan6_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN2_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan7_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN3_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN3_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan8_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN3_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN3_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan1_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_FRONT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN0_RPM_FRONT",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan2_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_REAR | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN0_RPM_REAR",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan3_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_FRONT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN1_RPM_FRONT",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan4_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_REAR | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN1_RPM_REAR",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan5_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_FRONT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN2_RPM_FRONT",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan6_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_REAR | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN2_RPM_REAR",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan7_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN3_RPM_FRONT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN3_RPM_FRONT",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan8_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN3_RPM_REAR | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN3_RPM_REAR",
+                        "field_pos": "2"
+                    }
+                ]
+            }
+        }
+    },
+    "SYNC_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "DIAG_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "rw"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "3:0",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "3:0",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "3:0",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "3:0",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "3:2",
+                    "descr": "Off",
+                    "value": "0x1;0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                }
+            ]
+        }
+    },
+    "SYS_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "SYS_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "3:0",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "3:0",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "3:0",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "3:0",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "3:2",
+                    "descr": "Off",
+                    "value": "0x01;0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                }
+            ]
+        }
+    },
+    "FAN_LED": {
+        "dev_info": {
+                "device_type": "LED",
+                "device_name": "FAN_LED"
+        },
+        "dev_attr": {
+                "index": "0",
+                "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "7:4",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "7:4",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "7:4",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "7:4",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "7:6",
+                    "descr": "Off",
+                    "value": "0x01;0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                }
+            ]
+        }
+    },
+    "PSU1_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "PSU_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "3:0",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "3:0",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "3:0",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "3:0",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "3:2",
+                    "descr": "Off",
+                    "value": "0x01;0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                }
+            ]
+        }
+    },
+    "PSU2_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "PSU_LED"
+        },
+        "dev_attr": {
+            "index": "1",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "7:4",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "7:4",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "7:4",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "7:4",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "7:6",
+                    "descr": "Off",
+                    "value": "0x01;0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                }
+            ]
+        }
+    },
+    "LOC_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "LOC_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "rw"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "blue",
+                    "bits": "0",
+                    "descr": "Blue",
+                    "value": "1",
+                    "attr_devname": "GPIO1",
+                    "swpld_addr_offset": "0xF",
+                    "attr_devtype": "gpio"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "0",
+                    "descr": "Off",
+                    "value": "0",
+                    "attr_devname": "GPIO1",
+                    "swpld_addr_offset": "0xF",
+                    "attr_devtype": "gpio"
+                }
+            ]
+        }
+    },
+    "PORT1": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT1",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "1"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                        "dev": "PORT1-EEPROM"
+                    },
+                    {
+                        "itf": "control",
+                        "dev": "PORT1-CTRL"
+                    }
+            ]
+        }
+    },
+    "PORT1-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT1-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x11",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT1-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT1-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x11",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT2": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT2",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "2"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT2-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT2-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT2-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT2-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x12",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT2-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT2-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x12",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT3": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT3",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "3"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT3-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT3-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT3-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT3-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT3"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x13",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT3-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT3-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT3"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x13",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT4": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT4",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "4"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT4-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT4-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT4-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT4-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT4"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x14",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT4-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT4-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT4"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x14",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT5": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT5",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "5"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT5-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT5-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT5-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT5-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT5"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x15",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT5-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT5-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT5"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x15",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT6": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT6",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+                "dev_idx": "6"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT6-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT6-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT6-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT6-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT6"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x16",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT6-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT6-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT6"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x16",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT7": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT7",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "7"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT7-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT7-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT7-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT7-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT7"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x17",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT7-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT7-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT7"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x17",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT8": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT8",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "8"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT8-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT8-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT8-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT8-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT8"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x18",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT8-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT8-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT8"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x18",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT9": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT9",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "9"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT9-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT9-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT9-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT9-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT9"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x19",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT9-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT9-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT9"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x19",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT10": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT10",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "10"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT10-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT10-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT10-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT10-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT10"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1A",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT10-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT10-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT10"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1A",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT11": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT11",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "11"
+        },
+        "i2c": {
+            "interface": [
+                {
+                "itf": "eeprom",
+                "dev": "PORT11-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT11-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT11-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT11-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT11"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1B",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT11-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT11-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT11"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1B",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT12": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT12",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "12"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT12-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT12-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT12-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT12-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT12"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1C",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT12-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT12-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT12"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1C",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT13": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT13",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "13"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT13-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT13-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT13-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT13-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT13"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1D",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT13-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT13-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT13"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1D",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT14": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT14",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "14"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT14-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT14-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT14-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT14-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT14"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1E",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT14-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT14-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT14"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1E",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT15": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT15",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "15"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT15-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT15-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT15-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT15-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT15"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1F",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT15-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT15-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT15"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1F",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT16": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT16",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "16"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT16-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT16-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT16-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT16-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT16"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x20",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT16-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT16-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT16"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x20",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT17": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT17",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "17"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT17-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT17-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT17-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT17-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT17"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x31",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT17-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT17-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT17"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x31",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT18": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT18",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "18"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT18-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT18-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT18-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT18-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT18"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x32",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT18-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT18-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT18"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x32",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT19": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT19",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "19"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT19-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT19-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT19-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT19-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT19"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x33",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT19-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT19-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT19"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x33",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT20": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT20",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "20"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT20-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT20-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT20-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT20-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT20"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x34",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT20-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT20-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT20"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x34",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT21": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT21",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "21"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT21-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT21-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT21-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT21-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT21"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x35",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT21-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT21-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT21"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x35",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT22": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT22",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "22"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT22-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT22-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT22-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT22-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT22"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x36",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT22-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT22-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT22"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x36",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT23": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT23",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "23"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT23-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT23-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT23-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT23-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT23"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x37",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT23-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT23-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT23"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x37",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT24": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT24",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "24"
+        },
+        "i2c": {
+            "interface": [
+                {
+                        "itf": "eeprom",
+                        "dev": "PORT24-EEPROM"
+                },
+                {
+                        "itf": "control",
+                        "dev": "PORT24-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT24-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT24-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT24"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x38",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT24-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT24-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT24"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x38",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT25": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT25",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "25"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT25-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT25-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT25-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT25-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT25"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x39",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT25-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT25-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT25"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x39",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT26": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT26",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "26"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT26-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT26-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT26-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT26-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT26"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3A",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT26-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT26-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT26"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3A",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT27": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT27",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "27"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT27-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT27-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT27-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT27-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT27"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3B",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT27-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT27-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT27"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3B",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT28": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT28",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "28"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT28-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT28-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT28-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT28-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT28"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3C",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT28-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT28-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT28"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3C",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT29": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT29",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "29"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT29-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT29-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT29-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT29-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT29"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3D",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT29-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT29-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT29"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3D",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT30": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT30",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "30"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT30-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT30-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT30-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT30-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT30"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3E",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT30-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT30-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT30"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3E",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT31": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT31",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "31"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT31-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT31-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT31-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT31-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT31"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3F",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT31-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT31-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT31"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3F",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT32": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT32",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "32"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT32-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT32-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT32-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT32-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT32"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x40",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT32-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT32-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT32"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x40",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT33": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT33",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "33"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                        "dev": "PORT33-EEPROM"
+                    },
+                    {
+                        "itf": "control",
+                        "dev": "PORT33-CTRL"
+                    }
+            ]
+        }
+    },
+    "PORT33-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT33-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT33"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x21",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT33-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT33-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT33"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x21",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT34": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT34",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "34"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT34-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT34-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT34-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT34-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT34"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x22",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT34-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT34-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT34"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x22",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT35": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT35",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "35"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT35-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT35-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT35-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT35-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT35"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x23",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT35-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT35-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT35"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x23",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT36": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT36",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "36"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT36-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT36-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT36-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT36-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT36"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x24",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT36-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT36-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT36"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x24",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT37": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT37",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "37"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT37-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT37-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT37-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT37-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT37"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x25",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT37-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT37-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT37"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x25",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT38": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT38",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+                "dev_idx": "38"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT38-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT38-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT38-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT38-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT38"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x26",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT38-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT38-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT38"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x26",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT39": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT39",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "39"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT39-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT39-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT39-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT39-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT39"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x27",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT39-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT39-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT39"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x27",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT40": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT40",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "40"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT40-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT40-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT40-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT40-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT40"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x28",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT40-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT40-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT40"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x28",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT41": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT41",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "41"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT41-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT41-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT41-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT41-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT41"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x29",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT41-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT41-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT41"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x29",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT42": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT42",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "42"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT42-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT42-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT42-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT42-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT42"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2A",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT42-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT42-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT42"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2A",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT43": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT43",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "43"
+        },
+        "i2c": {
+            "interface": [
+                {
+                "itf": "eeprom",
+                "dev": "PORT43-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT43-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT43-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT43-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT43"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2B",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT43-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT43-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT43"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2B",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT44": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT44",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "44"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT44-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT44-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT44-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT44-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT44"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2C",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT44-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT44-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT44"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2C",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT45": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT45",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "45"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT45-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT45-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT45-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT45-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT45"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2D",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT45-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT45-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT45"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2D",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT46": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT46",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "46"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT46-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT46-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT46-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT46-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT46"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2E",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT46-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT46-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT46"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2E",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT47": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT47",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "47"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT47-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT47-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT47-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT47-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT47"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2F",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT47-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT47-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT47"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2F",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT48": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT48",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "48"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT48-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT48-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT48-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT48-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT48"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x30",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT48-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT48-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT48"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x30",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT49": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT49",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "49"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT49-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT49-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT49-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT49-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT49"
+        },
+        "i2c": {
+            "topo_info": {
+            "parent_bus": "0x41",
+            "dev_addr": "0x50",
+            "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT49-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT49-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT49"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x41",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT50": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT50",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "50"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT50-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT50-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT50-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT50-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT50"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x42",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT50-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT50-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT50"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x42",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT51": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT51",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "51"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT51-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT51-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT51-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT51-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT51"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x43",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT51-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT51-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT51"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x43",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT52": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT52",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "52"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT52-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT52-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT52-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT52-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT52"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x44",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT52-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT52-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT52"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x44",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT53": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT53",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "53"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT53-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT53-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT53-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT53-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT53"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x45",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT53-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT53-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT53"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x45",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT54": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT54",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "54"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT54-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT54-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT54-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT54-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT54"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x46",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT54-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT54-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT54"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x46",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT55": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT55",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "55"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT55-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT55-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT55-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT55-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT55"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x47",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT55-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT55-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT55"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x47",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT56": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT56",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "56"
+        },
+        "i2c": {
+            "interface": [
+                {
+                        "itf": "eeprom",
+                        "dev": "PORT56-EEPROM"
+                },
+                {
+                        "itf": "control",
+                        "dev": "PORT56-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT56-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT56-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT56"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x48",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT56-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT56-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT56"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x48",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT57": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT57",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "57"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT57-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT57-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT57-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT57-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT57"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x49",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT57-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT57-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT57"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x49",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT58": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT58",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "58"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT58-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT58-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT58-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT58-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT58"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4A",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT58-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT58-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT58"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4A",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT59": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT59",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "59"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT59-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT59-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT59-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT59-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT59"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4B",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT59-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT59-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT59"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4B",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT60": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT60",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "60"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT60-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT60-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT60-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT60-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT60"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4C",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT60-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT60-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT60"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4C",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT61": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT61",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "61"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT61-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT61-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT61-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT61-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT61"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4D",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT61-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT61-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT61"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4D",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT62": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT62",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "62"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT62-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT62-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT62-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT62-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT62"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4E",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT62-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT62-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT62"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4E",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT63": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT63",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "63"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT63-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT63-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT63-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT63-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT63"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4F",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT63-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT63-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT63"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4F",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT64": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT64",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "64"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT64-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT64-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT64-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT64-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT64"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x50",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT64-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT64-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT64"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x50",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT65": {
+        "dev_info": {
+            "device_type": "SFP28",
+            "device_name": "PORT65",
+            "device_parent": "CPLDMUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "65"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT65-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT65-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT65-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT65",
+            "device_parent": "CPLDMUX3",
+            "virt_parent": "PORT65"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x51",
+                "dev_addr": "0x50",
+                "dev_type": "optoe2"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT65-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT65-CTRL",
+            "device_parent": "CPLDMUX3",
+            "virt_parent": "PORT65"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x51",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_rxlos",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txfault",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txdisable",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x0C",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT66": {
+        "dev_info": {
+            "device_type": "SFP28",
+            "device_name": "PORT66",
+            "device_parent": "CPLDMUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "66"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT66-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT66-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT66-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT66",
+            "device_parent": "CPLDMUX3",
+            "virt_parent": "PORT66"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x52",
+                "dev_addr": "0x50",
+                "dev_type": "optoe2"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT66-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT66-CTRL",
+            "device_parent": "CPLDMUX3",
+            "virt_parent": "PORT66"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x52",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_rxlos",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txfault",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txdisable",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x0C",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9321_64e-r0/pddf_support
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform.json b/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform.json
new file mode 100644
index 00000000000..910bc566529
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform.json
@@ -0,0 +1,1010 @@
+{
+    "chassis": {
+        "name": "S9321-64E",
+        "components": [
+            {
+                "name": "CPU_CPLD"
+            },
+            {
+                "name": "CPLD1"
+            },
+            {
+                "name": "CPLD2"
+            },
+            {
+                "name": "CPLD3"
+            },
+            {
+                "name": "FPGA"
+            },
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "BMC"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1"
+            },
+            {
+                "name": "Fantray1_2"
+            },
+            {
+                "name": "Fantray2_1"
+            },
+            {
+                "name": "Fantray2_2"
+            },
+            {
+                "name": "Fantray3_1"
+            },
+            {
+                "name": "Fantray3_2"
+            },
+            {
+                "name": "Fantray4_1"
+            },
+            {
+                "name": "Fantray4_2"
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray1_1"
+                    },
+                    {
+                        "name": "Fantray1_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray2_1"
+                    },
+                    {
+                        "name": "Fantray2_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray3",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray3_1"
+                    },
+                    {
+                        "name": "Fantray3_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray4",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray4_1"
+                    },
+                    {
+                        "name": "Fantray4_2"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU1_TEMP1"
+                    }
+                ]
+            },
+            {
+                "name": "PSU2",
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU2_TEMP1"
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "TEMP_ENV_CPU"
+            },
+            {
+                "name": "TEMP_CPU_PECI"
+            },
+            {
+                "name": "TEMP_ENV1"
+            },
+            {
+                "name": "TEMP_ENV2"
+            },
+            {
+                "name": "TEMP_ENV3"
+            },
+            {
+                "name": "TEMP_ENV4"
+            },
+            {
+                "name": "TEMP_ENV5"
+            },
+            {
+                "name": "TEMP_ENV_RISER"
+            },
+            {
+                "name": "TEMP_ENV_FAN0"
+            },
+            {
+                "name": "TEMP_ENV_FAN1"
+            },
+            {
+                "name": "TEMP_PSU0_TEMP1"
+            },
+            {
+                "name": "TEMP_PSU1_TEMP1"
+            }
+        ],
+        "sfps": [
+            {
+                "name": "Ethernet0"
+            },
+            {
+                "name": "Ethernet8"
+            },
+            {
+                "name": "Ethernet16"
+            },
+            {
+                "name": "Ethernet24"
+            },
+            {
+                "name": "Ethernet32"
+            },
+            {
+                "name": "Ethernet40"
+            },
+            {
+                "name": "Ethernet48"
+            },
+            {
+                "name": "Ethernet56"
+            },
+            {
+                "name": "Ethernet64"
+            },
+            {
+                "name": "Ethernet72"
+            },
+            {
+                "name": "Ethernet80"
+            },
+            {
+                "name": "Ethernet88"
+            },
+            {
+                "name": "Ethernet96"
+            },
+            {
+                "name": "Ethernet104"
+            },
+            {
+                "name": "Ethernet112"
+            },
+            {
+                "name": "Ethernet120"
+            },
+            {
+                "name": "Ethernet128"
+            },
+            {
+                "name": "Ethernet136"
+            },
+            {
+                "name": "Ethernet144"
+            },
+            {
+                "name": "Ethernet152"
+            },
+            {
+                "name": "Ethernet160"
+            },
+            {
+                "name": "Ethernet168"
+            },
+            {
+                "name": "Ethernet176"
+            },
+            {
+                "name": "Ethernet184"
+            },
+            {
+                "name": "Ethernet192"
+            },
+            {
+                "name": "Ethernet200"
+            },
+            {
+                "name": "Ethernet208"
+            },
+            {
+                "name": "Ethernet216"
+            },
+            {
+                "name": "Ethernet224"
+            },
+            {
+                "name": "Ethernet232"
+            },
+            {
+                "name": "Ethernet240"
+            },
+            {
+                "name": "Ethernet248"
+            },
+            {
+                "name": "Ethernet256"
+            },
+            {
+                "name": "Ethernet264"
+            },
+            {
+                "name": "Ethernet272"
+            },
+            {
+                "name": "Ethernet280"
+            },
+            {
+                "name": "Ethernet288"
+            },
+            {
+                "name": "Ethernet296"
+            },
+            {
+                "name": "Ethernet304"
+            },
+            {
+                "name": "Ethernet312"
+            },
+            {
+                "name": "Ethernet320"
+            },
+            {
+                "name": "Ethernet328"
+            },
+            {
+                "name": "Ethernet336"
+            },
+            {
+                "name": "Ethernet344"
+            },
+            {
+                "name": "Ethernet352"
+            },
+            {
+                "name": "Ethernet360"
+            },
+            {
+                "name": "Ethernet368"
+            },
+            {
+                "name": "Ethernet376"
+            },
+            {
+                "name": "Ethernet384"
+            },
+            {
+                "name": "Ethernet392"
+            },
+            {
+                "name": "Ethernet400"
+            },
+            {
+                "name": "Ethernet408"
+            },
+            {
+                "name": "Ethernet416"
+            },
+            {
+                "name": "Ethernet424"
+            },
+            {
+                "name": "Ethernet432"
+            },
+            {
+                "name": "Ethernet440"
+            },
+            {
+                "name": "Ethernet448"
+            },
+            {
+                "name": "Ethernet456"
+            },
+            {
+                "name": "Ethernet464"
+            },
+            {
+                "name": "Ethernet472"
+            },
+            {
+                "name": "Ethernet480"
+            },
+            {
+                "name": "Ethernet488"
+            },
+            {
+                "name": "Ethernet496"
+            },
+            {
+                "name": "Ethernet504"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "0,0,0,0,0,0,0,0",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                "1x800G": ["Eth0(Port0)"],
+                "1x400G": ["Eth0(Port0)"],
+                "2x400G[200G, 100G]": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
+                "4x200G[100G]": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"]
+            }
+        },
+
+        "Ethernet8": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                "1x800G": ["Eth1(Port1)"],
+                "1x400G": ["Eth1(Port1)"],
+                "2x400G[200G, 100G]": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "4x200G[100G]": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"]
+            }
+       },
+
+        "Ethernet16": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                "1x800G": ["Eth2(Port2)"],
+                "1x400G": ["Eth2(Port2)"],
+                "2x400G[200G, 100G]": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "4x200G[100G]": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"]
+            }
+        },
+        "Ethernet24": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                "1x800G": ["Eth3(Port3)"],
+                "1x400G": ["Eth3(Port3)"],
+                "2x400G[200G, 100G]": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "4x200G[100G]": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"]
+            }
+        },
+        "Ethernet32": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x800G": ["Eth4(Port4)"],
+                "1x400G": ["Eth4(Port4)"],
+                "2x400G[200G, 100G]": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "4x200G[100G]": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"]
+            }
+        },
+        "Ethernet40": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x800G": ["Eth5(Port5)"],
+                "1x400G": ["Eth5(Port5)"],
+                "2x400G[200G, 100G]": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "4x200G[100G]": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"]
+            }
+        },
+        "Ethernet48": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                "1x800G": ["Eth6(Port6)"],
+                "1x400G": ["Eth6(Port6)"],
+                "2x400G[200G, 100G]": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "4x200G[100G]": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"]
+            }
+        },
+        "Ethernet56": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                "1x800G": ["Eth7(Port7)"],
+                "1x400G": ["Eth7(Port7)"],
+                "2x400G[200G, 100G]": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "4x200G[100G]": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"]
+            }
+        },
+        "Ethernet64": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "177,178,179,180,181,182,183,184",
+            "breakout_modes": {
+                "1x800G": ["Eth8(Port8)"],
+                "1x400G": ["Eth8(Port8)"],
+                "2x400G[200G, 100G]": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "4x200G[100G]": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"]
+            }
+        },
+
+        "Ethernet72": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "185,186,187,188,189,190,191,192",
+            "breakout_modes": {
+                "1x800G": ["Eth9(Port9)"],
+                "1x400G": ["Eth9(Port9)"],
+                "2x400G[200G, 100G]": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "4x200G[100G]": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"]
+            }
+        },
+        "Ethernet80": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "209,210,211,212,213,214,215,216",
+            "breakout_modes": {
+                "1x800G": ["Eth10(Port10)"],
+                "1x400G": ["Eth10(Port10)"],
+                "2x400G[200G, 100G]": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "4x200G[100G]": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"]
+            }
+        },
+        "Ethernet88": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "217,218,219,220,221,222,223,224",
+            "breakout_modes": {
+                "1x800G": ["Eth11(Port11)"],
+                "1x400G": ["Eth11(Port11)"],
+                "2x400G[200G, 100G]": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "4x200G[100G]": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"]
+            }
+        },
+        "Ethernet96": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "225,226,227,228,229,230,231,232",
+            "breakout_modes": {
+                "1x800G": ["Eth12(Port12)"],
+                "1x400G": ["Eth12(Port12)"],
+                "2x400G[200G, 100G]": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "4x200G[100G]": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"]
+            }
+        },
+        "Ethernet104": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "233,234,235,236,237,238,239,240",
+            "breakout_modes": {
+                "1x800G": ["Eth13(Port13)"],
+                "1x400G": ["Eth13(Port13)"],
+                "2x400G[200G, 100G]": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "4x200G[100G]": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"]
+            }
+        },
+        "Ethernet112": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "241,242,243,244,245,246,247,248",
+            "breakout_modes": {
+                "1x800G": ["Eth14(Port14)"],
+                "1x400G": ["Eth14(Port14)"],
+                "2x400G[200G, 100G]": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "4x200G[100G]": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"]
+            }
+        },
+        "Ethernet120": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "249,250,251,252,253,254,255,256",
+            "breakout_modes": {
+                "1x800G": ["Eth15(Port15)"],
+                "1x400G": ["Eth15(Port15)"],
+                "2x400G[200G, 100G]": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "4x200G[100G]": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"]
+            }
+        },
+        "Ethernet128": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "265,266,267,268,269,270,271,272",
+            "breakout_modes": {
+                "1x800G": ["Eth16(Port16)"],
+                "1x400G": ["Eth16(Port16)"],
+                "2x400G[200G, 100G]": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "4x200G[100G]": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"]
+            }
+        },
+        "Ethernet136": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "257,258,259,260,261,262,263,264",
+            "breakout_modes": {
+                "1x800G": ["Eth17(Port17)"],
+                "1x400G": ["Eth17(Port17)"],
+                "2x400G[200G, 100G]": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "4x200G[100G]": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"]
+            }
+        },
+        "Ethernet144": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "281,282,283,284,285,286,287,288",
+            "breakout_modes": {
+                "1x800G": ["Eth18(Port18)"],
+                "1x400G": ["Eth18(Port18)"],
+                "2x400G[200G, 100G]": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "4x200G[100G]": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"]
+            }
+        },
+        "Ethernet152": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "273,274,275,276,277,278,279,280",
+            "breakout_modes": {
+                "1x800G": ["Eth19(Port19)"],
+                "1x400G": ["Eth19(Port19)"],
+                "2x400G[200G, 100G]": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "4x200G[100G]": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"]
+            }
+        },
+        "Ethernet160": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "297,298,299,300,301,302,303,304",
+            "breakout_modes": {
+                "1x800G": ["Eth20(Port20)"],
+                "1x400G": ["Eth20(Port20)"],
+                "2x400G[200G, 100G]": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "4x200G[100G]": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"]
+            }
+        },
+        "Ethernet168": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "289,290,291,292,293,294,295,296",
+            "breakout_modes": {
+                "1x800G": ["Eth21(Port21)"],
+                "1x400G": ["Eth21(Port21)"],
+                "2x400G[200G, 100G]": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "4x200G[100G]": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"]
+            }
+        },
+        "Ethernet176": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "329,330,331,332,333,334,335,336",
+            "breakout_modes": {
+                "1x800G": ["Eth22(Port22)"],
+                "1x400G": ["Eth22(Port22)"],
+                "2x400G[200G, 100G]": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "4x200G[100G]": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"]
+            }
+        },
+        "Ethernet184": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "321,322,323,324,325,326,327,328",
+            "breakout_modes": {
+                "1x800G": ["Eth23(Port23)"],
+                "1x400G": ["Eth23(Port23)"],
+                "2x400G[200G, 100G]": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "4x200G[100G]": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"]
+            }
+        },
+        "Ethernet192": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "361,362,363,364,365,366,367,368",
+            "breakout_modes": {
+                "1x800G": ["Eth24(Port24)"],
+                "1x400G": ["Eth24(Port24)"],
+                "2x400G[200G, 100G]": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "4x200G[100G]": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"]
+            }
+        },
+        "Ethernet200": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "353,354,355,356,357,358,359,360",
+            "breakout_modes": {
+                "1x800G": ["Eth25(Port25)"],
+                "1x400G": ["Eth25(Port25)"],
+                "2x400G[200G, 100G]": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "4x200G[100G]": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"]
+            }
+        },
+        "Ethernet208": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "393,394,395,396,397,398,399,400",
+            "breakout_modes": {
+                "1x800G": ["Eth26(Port26)"],
+                "1x400G": ["Eth26(Port26)"],
+                "2x400G[200G, 100G]": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "4x200G[100G]": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"]
+            }
+        },
+        "Ethernet216": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "385,386,387,388,389,390,391,392",
+            "breakout_modes": {
+                "1x800G": ["Eth27(Port27)"],
+                "1x400G": ["Eth27(Port27)"],
+                "2x400G[200G, 100G]": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "4x200G[100G]": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"]
+            }
+        },
+        "Ethernet224": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "425,426,427,428,429,430,431,432",
+            "breakout_modes": {
+                "1x800G": ["Eth28(Port28)"],
+                "1x400G": ["Eth28(Port28)"],
+                "2x400G[200G, 100G]": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "4x200G[100G]": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"]
+            }
+        },
+        "Ethernet232": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "417,418,419,420,421,422,423,424",
+            "breakout_modes": {
+                "1x800G": ["Eth29(Port29)"],
+                "1x400G": ["Eth29(Port29)"],
+                "2x400G[200G, 100G]": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "4x200G[100G]": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"]
+            }
+        },
+        "Ethernet240": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "457,458,459,460,461,462,463,464",
+            "breakout_modes": {
+                "1x800G": ["Eth30(Port30)"],
+                "1x400G": ["Eth30(Port30)"],
+                "2x400G[200G, 100G]": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "4x200G[100G]": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"]
+            }
+        },
+        "Ethernet248": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "449,450,451,452,453,454,455,456",
+            "breakout_modes": {
+                "1x800G": ["Eth31(Port31)"],
+                "1x400G": ["Eth31(Port31)"],
+                "2x400G[200G, 100G]": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "4x200G[100G]": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"]
+            }
+        },
+        "Ethernet256": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                "1x800G": ["Eth32(Port32)"],
+                "1x400G": ["Eth32(Port32)"],
+                "2x400G[200G, 100G]": ["Eth32/1(Port32)", "Eth32/2(Port32)"],
+                "4x200G[100G]": ["Eth32/1(Port32)", "Eth32/2(Port32)", "Eth32/3(Port32)", "Eth32/4(Port32)"]
+            }
+        },
+        "Ethernet264": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x800G": ["Eth33(Port33)"],
+                "1x400G": ["Eth33(Port33)"],
+                "2x400G[200G, 100G]": ["Eth33/1(Port33)", "Eth33/2(Port33)"],
+                "4x200G[100G]": ["Eth33/1(Port33)", "Eth33/2(Port33)", "Eth33/3(Port33)", "Eth33/4(Port33)"]
+            }
+        },
+        "Ethernet272": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x800G": ["Eth34(Port34)"],
+                "1x400G": ["Eth34(Port34)"],
+                "2x400G[200G, 100G]": ["Eth34/1(Port34)", "Eth34/2(Port34)"],
+                "4x200G[100G]": ["Eth34/1(Port34)", "Eth34/2(Port34)", "Eth34/3(Port34)", "Eth34/4(Port34)"]
+            }
+        },
+        "Ethernet280": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x800G": ["Eth35(Port35)"],
+                "1x400G": ["Eth35(Port35)"],
+                "2x400G[200G, 100G]": ["Eth35/1(Port35)", "Eth35/2(Port35)"],
+                "4x200G[100G]": ["Eth35/1(Port35)", "Eth35/2(Port35)", "Eth35/3(Port35)", "Eth35/4(Port35)"]
+            }
+        },
+        "Ethernet288": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x800G": ["Eth36(Port36)"],
+                "1x400G": ["Eth36(Port36)"],
+                "2x400G[200G, 100G]": ["Eth36/1(Port36)", "Eth36/2(Port36)"],
+                "4x200G[100G]": ["Eth36/1(Port36)", "Eth36/2(Port36)", "Eth36/3(Port36)", "Eth36/4(Port36)"]
+            }
+        },
+        "Ethernet296": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x800G": ["Eth37(Port37)"],
+                "1x400G": ["Eth37(Port37)"],
+                "2x400G[200G, 100G]": ["Eth37/1(Port37)", "Eth37/2(Port37)"],
+                "4x200G[100G]": ["Eth37/1(Port37)", "Eth37/2(Port37)", "Eth37/3(Port37)", "Eth37/4(Port37)"]
+            }
+        },
+        "Ethernet304": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                "1x800G": ["Eth38(Port38)"],
+                "1x400G": ["Eth38(Port38)"],
+                "2x400G[200G, 100G]": ["Eth38/1(Port38)", "Eth38/2(Port38)"],
+                "4x200G[100G]": ["Eth38/1(Port38)", "Eth38/2(Port38)", "Eth38/3(Port38)", "Eth38/4(Port38)"]
+            }
+        },
+        "Ethernet312": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                "1x800G": ["Eth39(Port39)"],
+                "1x400G": ["Eth39(Port39)"],
+                "2x400G[200G, 100G]": ["Eth39/1(Port39)", "Eth39/2(Port39)"],
+                "4x200G[100G]": ["Eth39/1(Port39)", "Eth39/2(Port39)", "Eth39/3(Port39)", "Eth39/4(Port39)"]
+            }
+        },
+        "Ethernet320": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "169,170,171,172,173,174,175,176",
+            "breakout_modes": {
+                "1x800G": ["Eth40(Port40)"],
+                "1x400G": ["Eth40(Port40)"],
+                "2x400G[200G, 100G]": ["Eth40/1(Port40)", "Eth40/2(Port40)"],
+                "4x200G[100G]": ["Eth40/1(Port40)", "Eth40/2(Port40)", "Eth40/3(Port40)", "Eth40/4(Port40)"]
+            }
+        },
+        "Ethernet328": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "161,162,163,164,165,166,167,168",
+            "breakout_modes": {
+                "1x800G": ["Eth41(Port41)"],
+                "1x400G": ["Eth41(Port41)"],
+                "2x400G[200G, 100G]": ["Eth41/1(Port41)", "Eth41/2(Port41)"],
+                "4x200G[100G]": ["Eth41/1(Port41)", "Eth41/2(Port41)", "Eth41/3(Port41)", "Eth41/4(Port41)"]
+            }
+        },
+        "Ethernet336": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "201,202,203,204,205,206,207,208",
+            "breakout_modes": {
+                "1x800G": ["Eth42(Port42)"],
+                "1x400G": ["Eth42(Port42)"],
+                "2x400G[200G, 100G]": ["Eth42/1(Port42)", "Eth42/2(Port42)"],
+                "4x200G[100G]": ["Eth42/1(Port42)", "Eth42/2(Port42)", "Eth42/3(Port42)", "Eth42/4(Port42)"]
+            }
+        },
+        "Ethernet344": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "193,194,195,196,197,198,199,200",
+            "breakout_modes": {
+                "1x800G": ["Eth43(Port43)"],
+                "1x400G": ["Eth43(Port43)"],
+                "2x400G[200G, 100G]": ["Eth43/1(Port43)", "Eth43/2(Port43)"],
+                "4x200G[100G]": ["Eth43/1(Port43)", "Eth43/2(Port43)", "Eth43/3(Port43)", "Eth43/4(Port43)"]
+            }
+        },
+        "Ethernet352": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                "1x800G": ["Eth44(Port44)"],
+                "1x400G": ["Eth44(Port44)"],
+                "2x400G[200G, 100G]": ["Eth44/1(Port44)", "Eth44/2(Port44)"],
+                "4x200G[100G]": ["Eth44/1(Port44)", "Eth44/2(Port44)", "Eth44/3(Port44)", "Eth44/4(Port44)"]
+            }
+        },
+        "Ethernet360": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                "1x800G": ["Eth45(Port45)"],
+                "1x400G": ["Eth45(Port45)"],
+                "2x400G[200G, 100G]": ["Eth45/1(Port45)", "Eth45/2(Port45)"],
+                "4x200G[100G]": ["Eth45/1(Port45)", "Eth45/2(Port45)", "Eth45/3(Port45)", "Eth45/4(Port45)"]
+            }
+        },
+        "Ethernet368": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x800G": ["Eth46(Port46)"],
+                "1x400G": ["Eth46(Port46)"],
+                "2x400G[200G, 100G]": ["Eth46/1(Port46)", "Eth46/2(Port46)"],
+                "4x200G[100G]": ["Eth46/1(Port46)", "Eth46/2(Port46)", "Eth46/3(Port46)", "Eth46/4(Port46)"]
+            }
+        },
+        "Ethernet376": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                "1x800G": ["Eth47(Port47)"],
+                "1x400G": ["Eth47(Port47)"],
+                "2x400G[200G, 100G]": ["Eth47/1(Port47)", "Eth47/2(Port47)"],
+                "4x200G[100G]": ["Eth47/1(Port47)", "Eth47/2(Port47)", "Eth47/3(Port47)", "Eth47/4(Port47)"]
+            }
+        },
+        "Ethernet384": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "505,506,507,508,509,510,511,512",
+            "breakout_modes": {
+                "1x800G": ["Eth48(Port48)"],
+                "1x400G": ["Eth48(Port48)"],
+                "2x400G[200G, 100G]": ["Eth48/1(Port48)", "Eth48/2(Port48)"],
+                "4x200G[100G]": ["Eth48/1(Port48)", "Eth48/2(Port48)", "Eth48/3(Port48)", "Eth48/4(Port48)"]
+            }
+        },
+        "Ethernet392": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "497,498,499,500,501,502,503,504",
+            "breakout_modes": {
+                "1x800G": ["Eth49(Port49)"],
+                "1x400G": ["Eth49(Port49)"],
+                "2x400G[200G, 100G]": ["Eth49/1(Port49)", "Eth49/2(Port49)"],
+                "4x200G[100G]": ["Eth49/1(Port49)", "Eth49/2(Port49)", "Eth49/3(Port49)", "Eth49/4(Port49)"]
+            }
+        },
+        "Ethernet400": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "489,490,491,492,493,494,495,496",
+            "breakout_modes": {
+                "1x800G": ["Eth50(Port50)"],
+                "1x400G": ["Eth50(Port50)"],
+                "2x400G[200G, 100G]": ["Eth50/1(Port50)", "Eth50/2(Port50)"],
+                "4x200G[100G]": ["Eth50/1(Port50)", "Eth50/2(Port50)", "Eth50/3(Port50)", "Eth50/4(Port50)"]
+            }
+        },
+        "Ethernet408": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "481,482,483,484,485,486,487,488",
+            "breakout_modes": {
+                "1x800G": ["Eth51(Port51)"],
+                "1x400G": ["Eth51(Port51)"],
+                "2x400G[200G, 100G]": ["Eth51/1(Port51)", "Eth51/2(Port51)"],
+                "4x200G[100G]": ["Eth51/1(Port51)", "Eth51/2(Port51)", "Eth51/3(Port51)", "Eth51/4(Port51)"]
+            }
+        },
+        "Ethernet416": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "305,306,307,308,309,310,311,312",
+            "breakout_modes": {
+                "1x800G": ["Eth52(Port52)"],
+                "1x400G": ["Eth52(Port52)"],
+                "2x400G[200G, 100G]": ["Eth52/1(Port52)", "Eth52/2(Port52)"],
+                "4x200G[100G]": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"]
+            }
+        },
+        "Ethernet424": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "313,314,315,316,317,318,319,320",
+            "breakout_modes": {
+                "1x800G": ["Eth53(Port53)"],
+                "1x400G": ["Eth53(Port53)"],
+                "2x400G[200G, 100G]": ["Eth53/1(Port53)", "Eth53/2(Port53)"],
+                "4x200G[100G]": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"]
+            }
+        },
+        "Ethernet432": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "337,338,339,340,341,342,343,344",
+            "breakout_modes": {
+                "1x800G": ["Eth54(Port54)"],
+                "1x400G": ["Eth54(Port54)"],
+                "2x400G[200G, 100G]": ["Eth54/1(Port54)", "Eth54/2(Port54)"],
+                "4x200G[100G]": ["Eth54/1(Port54)", "Eth54/2(Port54)", "Eth54/3(Port54)", "Eth54/4(Port54)"]
+            }
+        },
+        "Ethernet440": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "345,346,347,348,349,350,351,352",
+            "breakout_modes": {
+                "1x800G": ["Eth55(Port55)"],
+                "1x400G": ["Eth55(Port55)"],
+                "2x400G[200G, 100G]": ["Eth55/1(Port55)", "Eth55/2(Port55)"],
+                "4x200G[100G]": ["Eth55/1(Port55)", "Eth55/2(Port55)", "Eth55/3(Port55)", "Eth55/4(Port55)"]
+            }
+        },
+        "Ethernet448": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "369,370,371,372,373,374,375,376",
+            "breakout_modes": {
+                "1x800G": ["Eth56(Port56)"],
+                "1x400G": ["Eth56(Port56)"],
+                "2x400G[200G, 100G]": ["Eth56/1(Port56)", "Eth56/2(Port56)"],
+                "4x200G[100G]": ["Eth56/1(Port56)", "Eth56/2(Port56)", "Eth56/3(Port56)", "Eth56/4(Port56)"]
+            }
+        },
+        "Ethernet456": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "377,378,379,380,381,382,383,384",
+            "breakout_modes": {
+                "1x800G": ["Eth57(Port57)"],
+                "1x400G": ["Eth57(Port57)"],
+                "2x400G[200G, 100G]": ["Eth57/1(Port57)", "Eth57/2(Port57)"],
+                "4x200G[100G]": ["Eth57/1(Port57)", "Eth57/2(Port57)", "Eth57/3(Port57)", "Eth57/4(Port57)"]
+            }
+        },
+        "Ethernet464": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "401,402,403,404,405,406,407,408",
+            "breakout_modes": {
+                "1x800G": ["Eth58(Port58)"],
+                "1x400G": ["Eth58(Port58)"],
+                "2x400G[200G, 100G]": ["Eth58/1(Port58)", "Eth58/2(Port58)"],
+                "4x200G[100G]": ["Eth58/1(Port58)", "Eth58/2(Port58)", "Eth58/3(Port58)", "Eth58/4(Port58)"]
+            }
+        },
+        "Ethernet472": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "409,410,411,412,413,414,415,416",
+            "breakout_modes": {
+                "1x800G": ["Eth59(Port59)"],
+                "1x400G": ["Eth59(Port59)"],
+                "2x400G[200G, 100G]": ["Eth59/1(Port59)", "Eth59/2(Port59)"],
+                "4x200G[100G]": ["Eth59/1(Port59)", "Eth59/2(Port59)", "Eth59/3(Port59)", "Eth59/4(Port59)"]
+            }
+        },
+        "Ethernet480": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "433,434,435,436,437,438,439,440",
+            "breakout_modes": {
+                "1x800G": ["Eth60(Port60)"],
+                "1x400G": ["Eth60(Port60)"],
+                "2x400G[200G, 100G]": ["Eth60/1(Port60)", "Eth60/2(Port60)"],
+                "4x200G[100G]": ["Eth60/1(Port60)", "Eth60/2(Port60)", "Eth60/3(Port60)", "Eth60/4(Port60)"]
+            }
+        },
+        "Ethernet488": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "441,442,443,444,445,446,447,448",
+            "breakout_modes": {
+                "1x800G": ["Eth61(Port61)"],
+                "1x400G": ["Eth61(Port61)"],
+                "2x400G[200G, 100G]": ["Eth61/1(Port61)", "Eth61/2(Port61)"],
+                "4x200G[100G]": ["Eth61/1(Port61)", "Eth61/2(Port61)", "Eth61/3(Port61)", "Eth61/4(Port61)"]
+            }
+        },
+        "Ethernet496": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "465,466,467,468,469,470,471,472",
+            "breakout_modes": {
+                "1x800G": ["Eth62(Port62)"],
+                "1x400G": ["Eth62(Port62)"],
+                "2x400G[200G, 100G]": ["Eth62/1(Port62)", "Eth62/2(Port62)"],
+                "4x200G[100G]": ["Eth62/1(Port62)", "Eth62/2(Port62)", "Eth62/3(Port62)", "Eth62/4(Port62)"]
+            }
+        },
+        "Ethernet504": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "473,474,475,476,477,478,479,480",
+            "breakout_modes": {
+                "1x800G": ["Eth63(Port63)"],
+                "1x400G": ["Eth63(Port63)"],
+                "2x400G[200G, 100G]": ["Eth63/1(Port63)", "Eth63/2(Port63)"],
+                "4x200G[100G]": ["Eth63/1(Port63)", "Eth63/2(Port63)", "Eth63/3(Port63)", "Eth63/4(Port63)"]
+            }
+        }
+    }
+}
+
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform_asic
new file mode 100644
index 00000000000..96046765276
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform_components.json
new file mode 100644
index 00000000000..5655a5549f2
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform_components.json
@@ -0,0 +1,15 @@
+{
+    "chassis": {
+        "x86_64-ufispace_s9321_64e-r0": {
+            "component": {
+                "CPU_CPLD": { },
+                "CPLD1": { },
+                "CPLD2": { },
+                "CPLD3": { },
+                "FPGA": { },
+                "BIOS": { },
+                "BMC": {}
+            }
+        }
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform_env.conf
new file mode 100644
index 00000000000..aee1c756bf5
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/platform_env.conf
@@ -0,0 +1,2 @@
+SYNCD_SHM_SIZE=1G
+is_ltsw_chip=1
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9321_64e-r0/pmon_daemon_control.json
new file mode 100644
index 00000000000..e2c74a89dcd
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/pmon_daemon_control.json
@@ -0,0 +1,9 @@
+{
+    "skip_pcied": true,
+    "skip_fancontrol": false,
+    "skip_thermalctld": false,
+    "skip_ledd": true,
+    "skip_xcvrd": false,
+    "skip_psud": false,
+    "skip_syseepromd": false
+}
diff --git a/device/ufispace/x86_64-ufispace_s9321_64e-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9321_64e-r0/system_health_monitoring_config.json
new file mode 100644
index 00000000000..43816ab5516
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64e-r0/system_health_monitoring_config.json
@@ -0,0 +1,15 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu",
+        "fan"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "yellow_blink",
+        "normal": "green",
+        "booting": "green_blink"
+    }
+}
\ No newline at end of file
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/UFISPACE-S9321-64EO/hwsku.json b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/UFISPACE-S9321-64EO/hwsku.json
new file mode 100644
index 00000000000..cf2a2fc403e
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/UFISPACE-S9321-64EO/hwsku.json
@@ -0,0 +1,197 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "1x800G"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "1x800G"
+        }
+    }
+}
+
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/UFISPACE-S9321-64EO/sai.profile b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/UFISPACE-S9321-64EO/sai.profile
new file mode 100644
index 00000000000..532a86dfa58
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/UFISPACE-S9321-64EO/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-s9321-64eo-64x800G.config.yml
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/UFISPACE-S9321-64EO/th5-s9321-64eo-64x800G.config.yml b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/UFISPACE-S9321-64EO/th5-s9321-64eo-64x800G.config.yml
new file mode 100644
index 00000000000..c68682b8e86
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/UFISPACE-S9321-64EO/th5-s9321-64eo-64x800G.config.yml
@@ -0,0 +1,1200 @@
+---
+bcm_device:
+    0:
+      global:
+        pktio_mode: 1
+        vlan_flooding_l2mc_num_reserved: 0
+        ipv6_lpm_128b_enable: 1
+        shared_block_mask_section: uc_bc
+        skip_protocol_default_entries: 1
+        # LTSW uses value 1 for ALPM combined mode
+        l3_alpm_template: 1
+        l3_alpm_hit_skip: 1
+        sai_feat_tail_timestamp : 1
+        sai_field_group_auto_prioritize: 1
+        #l3_intf_vlan_split_egress for MTU at L3IF
+        l3_intf_vlan_split_egress : 1
+        pfc_deadlock_seq_control : 1
+        sai_tunnel_support: 1
+        sai_tunnel_vxlan_scale: 0
+        bcm_tunnel_term_compatible_mode: 1
+        l3_ecmp_member_first_lkup_mem_size: 12288
+        riot_overlay_l3_egress_mem_size: 16384
+        riot_overlay_l3_intf_mem_size: 4096
+        sai_tunnel_ecmp_sharing_mode: 2
+        sai_l3_byte1_udf_disable: 1
+        sai_svi_my_station_optimization : 1
+        sai_l3_neighbor_discard_flag_capable: 0
+        sai_l3_route_discard_flag_capable: 0
+        #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc 
+        global_flexctr_ing_action_num_reserved: 20
+        global_flexctr_ing_pool_num_reserved: 8
+        global_flexctr_ing_op_profile_num_reserved: 20
+        global_flexctr_ing_group_num_reserved: 2
+        global_flexctr_egr_action_num_reserved: 8
+        global_flexctr_egr_pool_num_reserved: 5
+        global_flexctr_egr_op_profile_num_reserved: 10
+        global_flexctr_egr_group_num_reserved: 1
+        flowtracker_enable: 1
+        flowtracker_hardware_learn_enable: 2
+        flowtracker_flexctr_alloc_enable: 2
+        flowtracker_max_flows: 131072
+        sai_create_dflt_trap: 1
+        default_cpu_tx_queue: 7
+        sai_port_queue_ecn_counter: 1
+        stat_custom_receive0_management_mode: 1
+...
+---
+device:
+  0:
+    PC_PM_CORE:
+      ?
+        PC_PM_ID: 1
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x16
+        TX_POLARITY_FLIP: 0x6e
+      ?
+        PC_PM_ID: 2
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x22
+        TX_POLARITY_FLIP: 0x30
+      ?
+        PC_PM_ID: 3
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x07
+        TX_POLARITY_FLIP: 0x28
+      ?
+        PC_PM_ID: 4
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x53
+        TX_POLARITY_FLIP: 0x39
+      ?
+        PC_PM_ID: 5
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x80
+        TX_POLARITY_FLIP: 0xf3
+      ?
+        PC_PM_ID: 6
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x3c
+        TX_POLARITY_FLIP: 0x22
+      ?
+        PC_PM_ID: 7
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 8
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 9
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x06
+        TX_POLARITY_FLIP: 0xa0
+      ?
+        PC_PM_ID: 10
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0x29
+      ?
+        PC_PM_ID: 11
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 12
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 13
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x26
+        TX_POLARITY_FLIP: 0xa0
+      ?
+        PC_PM_ID: 14
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x30
+        TX_POLARITY_FLIP: 0x55
+      ?
+        PC_PM_ID: 15
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 16
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x5a
+      ?
+        PC_PM_ID: 17
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x66
+        TX_POLARITY_FLIP: 0x96
+      ?
+        PC_PM_ID: 18
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x4d
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 19
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x6d
+      ?
+        PC_PM_ID: 20
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x6d
+      ?
+        PC_PM_ID: 21
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe2
+        TX_POLARITY_FLIP: 0xd7
+      ?
+        PC_PM_ID: 22
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xfa
+        TX_POLARITY_FLIP: 0x91
+      ?
+        PC_PM_ID: 23
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x6d
+      ?
+        PC_PM_ID: 24
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x6d
+      ?
+        PC_PM_ID: 25
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe6
+        TX_POLARITY_FLIP: 0x9f
+      ?
+        PC_PM_ID: 26
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x68
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 27
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x6c
+      ?
+        PC_PM_ID: 28
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x8b
+        TX_POLARITY_FLIP: 0xb2
+      ?
+        PC_PM_ID: 29
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xdd
+        TX_POLARITY_FLIP: 0xcc
+      ?
+        PC_PM_ID: 30
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x33
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 31
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xdd
+        TX_POLARITY_FLIP: 0xcc
+      ?
+        PC_PM_ID: 32
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x33
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 33
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xcc
+        TX_POLARITY_FLIP: 0x55
+      ?
+        PC_PM_ID: 34
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x22
+        TX_POLARITY_FLIP: 0x33
+      ?
+        PC_PM_ID: 35
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xcc
+        TX_POLARITY_FLIP: 0x55
+      ?
+        PC_PM_ID: 36
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x22
+        TX_POLARITY_FLIP: 0x33
+      ?
+        PC_PM_ID: 37
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x74
+        TX_POLARITY_FLIP: 0x4d
+      ?
+        PC_PM_ID: 38
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe8
+        TX_POLARITY_FLIP: 0x93
+      ?
+        PC_PM_ID: 39
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x17
+        TX_POLARITY_FLIP: 0x2d
+      ?
+        PC_PM_ID: 40
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x1f
+        TX_POLARITY_FLIP: 0x68
+      ?
+        PC_PM_ID: 41
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe8
+        TX_POLARITY_FLIP: 0x92
+      ?
+        PC_PM_ID: 42
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe8
+        TX_POLARITY_FLIP: 0x92
+      ?
+        PC_PM_ID: 43
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x61
+      ?
+        PC_PM_ID: 44
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x5d
+        TX_POLARITY_FLIP: 0x68
+      ?
+        PC_PM_ID: 45
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe8
+        TX_POLARITY_FLIP: 0x92
+      ?
+        PC_PM_ID: 46
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xe8
+        TX_POLARITY_FLIP: 0x92
+      ?
+        PC_PM_ID: 47
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x5f
+        TX_POLARITY_FLIP: 0x7d
+      ?
+        PC_PM_ID: 48
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x1d
+        TX_POLARITY_FLIP: 0x68
+      ?
+        PC_PM_ID: 49
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 50
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 51
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xb0
+        TX_POLARITY_FLIP: 0x88
+      ?
+        PC_PM_ID: 52
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf9
+        TX_POLARITY_FLIP: 0x5f
+      ?
+        PC_PM_ID: 53
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 54
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 55
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xbb
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 56
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf9
+        TX_POLARITY_FLIP: 0x5f
+      ?
+        PC_PM_ID: 57
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 58
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x0c
+        TX_POLARITY_FLIP: 0xa5
+      ?
+        PC_PM_ID: 59
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0xf3
+        TX_POLARITY_FLIP: 0x53
+      ?
+        PC_PM_ID: 60
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x7f
+        TX_POLARITY_FLIP: 0x0c
+      ?
+        PC_PM_ID: 61
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x07
+        TX_POLARITY_FLIP: 0xf3
+      ?
+        PC_PM_ID: 62
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x08
+        TX_POLARITY_FLIP: 0xd7
+      ?
+        PC_PM_ID: 63
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x43
+        TX_POLARITY_FLIP: 0xcd
+      ?
+        PC_PM_ID: 64
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x76543210
+        TX_LANE_MAP: 0x76543210
+        RX_POLARITY_FLIP: 0x36
+        TX_POLARITY_FLIP: 0x91
+...
+---
+device:
+  0:
+    PC_PORT_PHYS_MAP:
+      ?
+        PORT_ID: 0
+      :
+        PC_PHYS_PORT_ID: 0
+      ?
+        PORT_ID: 33
+      :
+        PC_PHYS_PORT_ID: 49
+      ?
+        PORT_ID: 34
+      :
+        PC_PHYS_PORT_ID: 57
+      ?
+        PORT_ID: 55
+      :
+        PC_PHYS_PORT_ID: 81
+      ?
+        PORT_ID: 56
+      :
+        PC_PHYS_PORT_ID: 89
+      ?
+        PORT_ID: 77
+      :
+        PC_PHYS_PORT_ID: 113
+      ?
+        PORT_ID: 78
+      :
+        PC_PHYS_PORT_ID: 121
+      ?
+        PORT_ID: 99
+      :
+        PC_PHYS_PORT_ID: 145
+      ?
+        PORT_ID: 100
+      :
+        PC_PHYS_PORT_ID: 153
+      ?
+        PORT_ID: 121
+      :
+        PC_PHYS_PORT_ID: 177
+      ?
+        PORT_ID: 122
+      :
+        PC_PHYS_PORT_ID: 185
+      ?
+        PORT_ID: 143
+      :
+        PC_PHYS_PORT_ID: 209
+      ?
+        PORT_ID: 144
+      :
+        PC_PHYS_PORT_ID: 217
+      ?
+        PORT_ID: 154
+      :
+        PC_PHYS_PORT_ID: 225
+      ?
+        PORT_ID: 155
+      :
+        PC_PHYS_PORT_ID: 233
+      ?
+        PORT_ID: 165
+      :
+        PC_PHYS_PORT_ID: 241
+      ?
+        PORT_ID: 166
+      :
+        PC_PHYS_PORT_ID: 249
+      ?
+        PORT_ID: 177
+      :
+        PC_PHYS_PORT_ID: 265
+      ?
+        PORT_ID: 176
+      :
+        PC_PHYS_PORT_ID: 257
+      ?
+        PORT_ID: 188
+      :
+        PC_PHYS_PORT_ID: 281
+      ?
+        PORT_ID: 187
+      :
+        PC_PHYS_PORT_ID: 273
+      ?
+        PORT_ID: 199
+      :
+        PC_PHYS_PORT_ID: 297
+      ?
+        PORT_ID: 198
+      :
+        PC_PHYS_PORT_ID: 289
+      ?
+        PORT_ID: 221
+      :
+        PC_PHYS_PORT_ID: 329
+      ?
+        PORT_ID: 220
+      :
+        PC_PHYS_PORT_ID: 321
+      ?
+        PORT_ID: 243
+      :
+        PC_PHYS_PORT_ID: 361
+      ?
+        PORT_ID: 242
+      :
+        PC_PHYS_PORT_ID: 353
+      ?
+        PORT_ID: 265
+      :
+        PC_PHYS_PORT_ID: 393
+      ?
+        PORT_ID: 264
+      :
+        PC_PHYS_PORT_ID: 385
+      ?
+        PORT_ID: 287
+      :
+        PC_PHYS_PORT_ID: 425
+      ?
+        PORT_ID: 286
+      :
+        PC_PHYS_PORT_ID: 417
+      ?
+        PORT_ID: 309
+      :
+        PC_PHYS_PORT_ID: 457
+      ?
+        PORT_ID: 308
+      :
+        PC_PHYS_PORT_ID: 449
+      ?
+        PORT_ID: 23
+      :
+        PC_PHYS_PORT_ID: 41
+      ?
+        PORT_ID: 22
+      :
+        PC_PHYS_PORT_ID: 33
+      ?
+        PORT_ID: 45
+      :
+        PC_PHYS_PORT_ID: 73
+      ?
+        PORT_ID: 44
+      :
+        PC_PHYS_PORT_ID: 65
+      ?
+        PORT_ID: 67
+      :
+        PC_PHYS_PORT_ID: 105
+      ?
+        PORT_ID: 66
+      :
+        PC_PHYS_PORT_ID: 97
+      ?
+        PORT_ID: 89
+      :
+        PC_PHYS_PORT_ID: 137
+      ?
+        PORT_ID: 88
+      :
+        PC_PHYS_PORT_ID: 129
+      ?
+        PORT_ID: 111
+      :
+        PC_PHYS_PORT_ID: 169
+      ?
+        PORT_ID: 110
+      :
+        PC_PHYS_PORT_ID: 161
+      ?
+        PORT_ID: 133
+      :
+        PC_PHYS_PORT_ID: 201
+      ?
+        PORT_ID: 132
+      :
+        PC_PHYS_PORT_ID: 193
+      ?
+        PORT_ID: 11
+      :
+        PC_PHYS_PORT_ID: 17
+      ?
+        PORT_ID: 12
+      :
+        PC_PHYS_PORT_ID: 25
+      ?
+        PORT_ID: 1
+      :
+        PC_PHYS_PORT_ID: 1
+      ?
+        PORT_ID: 2
+      :
+        PC_PHYS_PORT_ID: 9
+      ?
+        PORT_ID: 342
+      :
+        PC_PHYS_PORT_ID: 505
+      ?
+        PORT_ID: 341
+      :
+        PC_PHYS_PORT_ID: 497
+      ?
+        PORT_ID: 331
+      :
+        PC_PHYS_PORT_ID: 489
+      ?
+        PORT_ID: 330
+      :
+        PC_PHYS_PORT_ID: 481
+      ?
+        PORT_ID: 209
+      :
+        PC_PHYS_PORT_ID: 305
+      ?
+        PORT_ID: 210
+      :
+        PC_PHYS_PORT_ID: 313
+      ?
+        PORT_ID: 231
+      :
+        PC_PHYS_PORT_ID: 337
+      ?
+        PORT_ID: 232
+      :
+        PC_PHYS_PORT_ID: 345
+      ?
+        PORT_ID: 253
+      :
+        PC_PHYS_PORT_ID: 369
+      ?
+        PORT_ID: 254
+      :
+        PC_PHYS_PORT_ID: 377
+      ?
+        PORT_ID: 275
+      :
+        PC_PHYS_PORT_ID: 401
+      ?
+        PORT_ID: 276
+      :
+        PC_PHYS_PORT_ID: 409
+      ?
+        PORT_ID: 297
+      :
+        PC_PHYS_PORT_ID: 433
+      ?
+        PORT_ID: 298
+      :
+        PC_PHYS_PORT_ID: 441
+      ?
+        PORT_ID: 319
+      :
+        PC_PHYS_PORT_ID: 465
+      ?
+        PORT_ID: 320
+      :
+        PC_PHYS_PORT_ID: 473
+...
+---
+device:
+  0:
+    PC_PORT:
+      ?
+        PORT_ID: [[1, 2],
+                  [11, 12],
+                  [22, 23],
+                  [33, 34],
+                  [44, 45],
+                  [55, 56],
+                  [66, 67],
+                  [77, 78],
+                  [88, 89],
+                  [99, 100],
+                  [110, 111],
+                  [121, 122],
+                  [132, 133],
+                  [143, 144],
+                  [154, 155],
+                  [165, 166],
+                  [176, 177],
+                  [187, 188],
+                  [198, 199],
+                  [209, 210],
+                  [220, 221],
+                  [231, 232],
+                  [242, 243],
+                  [253, 254],
+                  [264, 265],
+                  [275, 276],
+                  [286, 287],
+                  [297, 298],
+                  [308, 309],
+                  [319, 320],
+                  [330, 331],
+                  [341, 342]]
+      :
+        ENABLE: 0
+        SPEED: 800000
+        NUM_LANES: 8
+        FEC_MODE: PC_FEC_RS544_2XN
+        MAX_FRAME_SIZE: 9416
+      ?
+        PORT_ID: 0
+      :
+        ENABLE: 1
+        SPEED: 10000
+        NUM_LANES: 1
+        FEC_MODE: PC_FEC_NONE
+
+    PC_PMD_FIRMWARE:
+      ?
+        PORT_ID: [[1, 2], [11, 12], [22, 23], [33, 34], [44, 45], [55, 56], [66, 67], [77, 78], [88, 89], [99, 100], [110, 111], [121, 122], [132, 133], [143, 144], [154, 155], [165, 166], [176, 177], [187, 188], [198, 199], [209, 210], [220, 221], [231, 232], [242, 243], [253, 254], [264, 265], [275, 276], [286, 287], [297, 298], [308, 309], [319, 320], [330, 331], [341, 342]]
+      :
+        MEDIUM_TYPE_AUTO: 1
+        MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE
+        NORMAL_REACH_PAM4_AUTO: 1
+        NORMAL_REACH_PAM4: 0xff
+        EXTENDED_REACH_PAM4_AUTO: 1
+        EXTENDED_REACH_PAM4: 0xff
+        LP_TX_PRECODER_ON_AUTO: 1
+        LP_TX_PRECODER_ON: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration. Enable PPIU Mode
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        TM_SCHEDULER_CONFIG:
+            DYNAMIC_VOQ: 0
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+        TM_SCHEDULER_CONFIG:
+            DYNAMIC_VOQ: 0
+...
+
+#Lossless buffer configs
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            SKIP_BUFFER_RESERVATION: 0
+            THRESHOLD_MODE: LOSSY
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,20], [22,42], [44,64], [66,86], [88,108], [110,130], [132,152], [154,174], [176,196], [198,218], [220,240], [242,262], [264,284], [286,306], [308,328], [330,350]]
+                TM_PRI_GRP_ID: [[3,4]]
+            :
+                LOSSLESS: 0
+...
+
+---
+device:
+    0:
+        # Q-Group reservations
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,20], [22,42], [44,64], [66,86], [88,108], [110,130], [132,152], [154,174], [176,196], [198,218], [220,240], [242,262], [264,284], [286,306], [308,328], [330,350]]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 14
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 14
+...
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/custom_led.bin
new file mode 100644
index 00000000000..c46d3d5f27c
Binary files /dev/null and b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/custom_led.bin differ
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/default_sku b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/default_sku
new file mode 100644
index 00000000000..7fe33f69e24
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/default_sku
@@ -0,0 +1 @@
+UFISPACE-S9321-64EO t1
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/fancontrol b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/fancontrol
new file mode 100644
index 00000000000..1234cd994f3
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/fancontrol
@@ -0,0 +1,10 @@
+# Configuration file generated by pwmconfig, changes will be lost
+INTERVAL=10
+DEVPATH=
+DEVNAME=
+FCTEMPS=
+FCFANS=
+MINTEMP=
+MAXTEMP=
+MINSTART=
+MINSTOP=
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/installer.conf
new file mode 100644
index 00000000000..0fc3e43b5ca
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_PORT=0x3f8
+CONSOLE_DEV=0
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx,i2c_ismt,ice,vmd nomodeset pcie_aspm=off"
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/led_proc_init.soc
new file mode 100644
index 00000000000..eda09a0dd1f
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/led_proc_init.soc
@@ -0,0 +1,4 @@
+led stop
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pcie.yaml
new file mode 100644
index 00000000000..bf7f8791948
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pcie.yaml
@@ -0,0 +1,510 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Ice Lake Memory Map/VT-d (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Ice Lake Mesh 2 PCIe (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Ice Lake RAS (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '2'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '3'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '4'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '5'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '6'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '01'
+  fn: '7'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 09a6
+  name: 'System peripheral: Intel Corporation Ice Lake MSM'
+- bus: '00'
+  dev: '02'
+  fn: '1'
+  id: 09a7
+  name: 'System peripheral: Intel Corporation Ice Lake PMON MSM'
+- bus: '00'
+  dev: '02'
+  fn: '4'
+  id: '3456'
+  name: 'Non-Essential Instrumentation [1300]: Intel Corporation Ice Lake NorthPeak
+    (rev 01)'
+- bus: '00'
+  dev: 08
+  fn: '0'
+  id: 18c2
+  name: 'SATA controller: Intel Corporation Device 18c2 (rev 11)'
+- bus: '00'
+  dev: 09
+  fn: '0'
+  id: 18a4
+  name: 'PCI bridge: Intel Corporation Device 18a4 (rev 11)'
+- bus: '00'
+  dev: 0f
+  fn: '0'
+  id: 18ac
+  name: 'System peripheral: Intel Corporation Device 18ac (rev 11)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 18ad
+  name: 'PCI bridge: Intel Corporation Device 18ad (rev 11)'
+- bus: '00'
+  dev: '17'
+  fn: '0'
+  id: 18a2
+  name: 'PCI bridge: Intel Corporation Device 18a2 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 18d3
+  name: 'Communication controller: Intel Corporation Atom Processor P5xxx Series MEI
+    Controller (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '4'
+  id: 18d6
+  name: 'Communication controller: Intel Corporation Atom Processor P5xxx Series MEI
+    Controller (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '0'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '1'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '2'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '3'
+  id: 18d9
+  name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: '00'
+  dev: 1e
+  fn: '0'
+  id: 18d0
+  name: 'USB controller: Intel Corporation Atom Processor P5xxx Series USB xHCI Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 18dc
+  name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: 18df
+  name: 'SMBus: Intel Corporation Atom Processor P5xxx Series SMBus Controller (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: 18e0
+  name: 'Serial bus controller: Intel Corporation Atom Processor P5xxx Series SPI
+    Controller (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '7'
+  id: 18e1
+  name: 'Non-Essential Instrumentation [1300]: Intel Corporation Atom Processor P5xxx
+    Series Trace Hub (rev 11)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: '1150'
+  name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 06)'
+- bus: '15'
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Ice Lake Memory Map/VT-d (rev 04)'
+- bus: '15'
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Ice Lake Mesh 2 PCIe (rev 04)'
+- bus: '15'
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Ice Lake RAS (rev 04)'
+- bus: '15'
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '15'
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: '15'
+  dev: '02'
+  fn: '0'
+  id: 347a
+  name: 'PCI bridge: Intel Corporation Device 347a (rev 06)'
+- bus: '15'
+  dev: '03'
+  fn: '0'
+  id: 347b
+  name: 'PCI bridge: Intel Corporation Device 347b (rev 06)'
+- bus: '15'
+  dev: '04'
+  fn: '0'
+  id: 347c
+  name: 'PCI bridge: Intel Corporation Device 347c (rev 06)'
+- bus: '15'
+  dev: '05'
+  fn: '0'
+  id: 347d
+  name: 'PCI bridge: Intel Corporation Device 347d (rev 06)'
+- bus: '18'
+  dev: '00'
+  fn: '0'
+  id: '0001'
+  name: 'Non-VGA unclassified device: Device 0000:0001 (rev 01)'
+- bus: '19'
+  dev: '00'
+  fn: '0'
+  id: f900
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM78900 Switch ASIC
+    [Tomahawk5] (rev 11)'
+- bus: '84'
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Ice Lake Memory Map/VT-d (rev 04)'
+- bus: '84'
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Ice Lake Mesh 2 PCIe (rev 04)'
+- bus: '84'
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Ice Lake RAS (rev 04)'
+- bus: '84'
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '84'
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: '84'
+  dev: '04'
+  fn: '0'
+  id: 18d1
+  name: 'PCI bridge: Intel Corporation Device 18d1'
+- bus: '85'
+  dev: '00'
+  fn: '0'
+  id: 188a
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-C for backplane'
+- bus: '85'
+  dev: '00'
+  fn: '1'
+  id: 188a
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-C for backplane'
+- bus: '85'
+  dev: '00'
+  fn: '2'
+  id: 188a
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-C for backplane'
+- bus: '85'
+  dev: '00'
+  fn: '3'
+  id: 188a
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-C for backplane'
+- bus: 8c
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Ice Lake Memory Map/VT-d (rev 04)'
+- bus: 8c
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Ice Lake Mesh 2 PCIe (rev 04)'
+- bus: 8c
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Ice Lake RAS (rev 04)'
+- bus: 8c
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: 8c
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: 8c
+  dev: '00'
+  fn: '5'
+  id: 28c0
+  name: 'RAID bus controller: Intel Corporation Volume Management Device NVMe RAID
+    Controller (rev 04)'
+- bus: 8c
+  dev: '02'
+  fn: '0'
+  id: 09ab
+  name: 'System peripheral: Intel Corporation RST VMD Managed Controller'
+- bus: 8c
+  dev: '03'
+  fn: '0'
+  id: 09ab
+  name: 'System peripheral: Intel Corporation RST VMD Managed Controller'
+- bus: 8c
+  dev: '04'
+  fn: '0'
+  id: 347c
+  name: 'PCI bridge: Intel Corporation Device 347c (rev 06)'
+- bus: 8c
+  dev: '05'
+  fn: '0'
+  id: 347d
+  name: 'PCI bridge: Intel Corporation Device 347d (rev 06)'
+- bus: fe
+  dev: '00'
+  fn: '0'
+  id: '3450'
+  name: 'System peripheral: Intel Corporation Device 3450'
+- bus: fe
+  dev: '00'
+  fn: '1'
+  id: '3451'
+  name: 'System peripheral: Intel Corporation Device 3451'
+- bus: fe
+  dev: '00'
+  fn: '2'
+  id: '3452'
+  name: 'System peripheral: Intel Corporation Device 3452'
+- bus: fe
+  dev: '00'
+  fn: '3'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Ice Lake IEH'
+- bus: fe
+  dev: '00'
+  fn: '5'
+  id: '3455'
+  name: 'System peripheral: Intel Corporation Device 3455'
+- bus: fe
+  dev: 0b
+  fn: '0'
+  id: '3448'
+  name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+  dev: 0b
+  fn: '1'
+  id: '3448'
+  name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+  dev: 0b
+  fn: '2'
+  id: 344b
+  name: 'System peripheral: Intel Corporation Device 344b'
+- bus: fe
+  dev: 0c
+  fn: '0'
+  id: 344a
+  name: 'Performance counters: Intel Corporation Device 344a'
+- bus: fe
+  dev: 0d
+  fn: '0'
+  id: 344a
+  name: 'Performance counters: Intel Corporation Device 344a'
+- bus: fe
+  dev: 1a
+  fn: '0'
+  id: '2880'
+  name: 'Performance counters: Intel Corporation Device 2880'
+- bus: fe
+  dev: 1b
+  fn: '0'
+  id: '2880'
+  name: 'Performance counters: Intel Corporation Device 2880'
+- bus: ff
+  dev: '00'
+  fn: '0'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '1'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '2'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '3'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '4'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '5'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: 0a
+  fn: '0'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '1'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '2'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '3'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '4'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '5'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 1d
+  fn: '0'
+  id: 344f
+  name: 'System peripheral: Intel Corporation Device 344f'
+- bus: ff
+  dev: 1d
+  fn: '1'
+  id: '3457'
+  name: 'System peripheral: Intel Corporation Device 3457'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: '3458'
+  name: 'System peripheral: Intel Corporation Device 3458 (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: '3459'
+  name: 'System peripheral: Intel Corporation Device 3459 (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 345a
+  name: 'System peripheral: Intel Corporation Device 345a (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 345b
+  name: 'System peripheral: Intel Corporation Device 345b (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 345c
+  name: 'System peripheral: Intel Corporation Device 345c (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '5'
+  id: 345d
+  name: 'System peripheral: Intel Corporation Device 345d (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '6'
+  id: 345e
+  name: 'System peripheral: Intel Corporation Device 345e (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '7'
+  id: 345f
+  name: 'System peripheral: Intel Corporation Device 345f (rev 01)'
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pddf/pd-plugin.json
new file mode 100644
index 00000000000..2fe81c251fb
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pddf/pd-plugin.json
@@ -0,0 +1,84 @@
+{
+
+    "XCVR":
+    {
+        "xcvr_present":
+        {
+           "i2c":
+           {
+               "valmap-SFP": {"1":true, "0":false },
+               "valmap-QSFP-DD": {"1":true, "0":false},
+               "valmap-QSFP": {"1":true, "0":false}
+           }
+        },
+        "status":
+        {
+            "inserted": "1",
+            "removed": "0"
+        }
+    },
+
+    "PSU":
+    {
+        "psu_present":
+        {
+            "i2c":
+            {
+                "valmap": { "1":true, "0":false }
+            }
+        },
+
+        "psu_power_good":
+        {
+            "i2c":
+            {
+                "valmap": { "1": true, "0":false }
+            }
+        },
+
+        "psu_fan_dir":
+        {
+            "bmc":
+            {
+                "valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"}
+            }
+        },
+        "psu_support_list":
+        [
+            {"Manufacturer": "DELTA","Name": "DTQ3000AN12C12", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Type":"AC", "Dir": "EXHAUST"},
+            {"Manufacturer": "DELTA","Name": "DTQ3001DS12L1P", "MaxSpd": "PSU_DC_FAN_MAX_SPEED", "Type":"DC", "Dir": "EXHAUST"}
+        ],
+
+        "valmap": {"PSU_AC_FAN_MAX_SPEED": "25000", "PSU_DC_FAN_MAX_SPEED":"32500", "DEFAULT_TYPE": "AC"}
+    },
+
+    "FAN":
+    {
+        "direction":
+        {
+            "bmc":
+            {
+                "valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"}
+            }
+        },
+
+        "present":
+        {
+            "i2c":
+            {
+                "valmap": {"1":true, "0":false}
+            },
+            "bmc":
+            {
+                "valmap": {"Device Present":true, "Device Absent":false}
+            }
+        },
+        "FAN_R_MAX_SPEED":"11300",
+        "FAN_F_MAX_SPEED":"12000"
+    },
+
+    "REBOOT_CAUSE":
+    {
+        "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt"
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pddf/pddf-device.json
new file mode 100644
index 00000000000..94535c44f2c
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pddf/pddf-device.json
@@ -0,0 +1,8269 @@
+{
+    "PLATFORM": {
+        "num_psus": 2,
+        "num_fantrays": 4,
+        "num_fans_pertray": 2,
+        "num_ports": 66,
+        "num_temps": 12,
+        "pddf_dev_types": {
+            "description": "PDDF supported devices",
+            "CPLD": [
+                "i2c_cpld"
+            ],
+            "PSU": [
+                "psu_eeprom",
+                "psu_pmbus"
+            ],
+            "PORT_MODULE": [
+                "pddf_xcvr"
+            ],
+            "CPLDMUX": [
+                "cpld_mux"
+            ]
+        },
+        "std_perm_kos": [
+            "i2c-i801"
+        ],
+        "std_kos": [
+            "i2c_dev",
+            "i2c_mux_pca954x",
+            "optoe",
+            "gpio-pca953x"
+        ],
+        "pddf_kos": [
+            "pddf_client_module",
+            "pddf_cpld_module",
+            "pddf_cpld_driver",
+            "pddf_mux_module",
+            "pddf_cpldmux_module",
+            "pddf_cpldmux_driver",
+            "pddf_xcvr_module",
+            "pddf_fpgapci_driver",
+            "pddf_xcvr_driver_module",
+            "pddf_psu_driver_module",
+            "pddf_psu_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
+            "pddf_fan_driver_module",
+            "pddf_fan_module",
+            "pddf_led_module",
+            "pddf_gpio_module"
+        ],
+        "custom_kos": [
+            "x86-64-ufispace-s9321-64eo-lpc",
+            "x86-64-ufispace-s9321-64eo-sys-eeprom",
+            "pddf_custom_sysstatus_module",
+            "pddf_custom_cpldmux_driver"
+        ]
+    },
+    "SYSTEM": {
+        "dev_info": {
+            "device_type": "CPU",
+            "device_name": "ROOT_COMPLEX",
+            "device_parent": null
+        },
+        "i2c": {
+            "CONTROLLERS": [
+                {
+                    "dev_name": "i2c-0",
+                    "dev": "SMBUS0"
+                }
+            ]
+        }
+    },
+    "SMBUS0": {
+        "dev_info": {
+            "device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"
+        },
+        "i2c": {
+            "topo_info": {
+                "dev_addr": "0x0"
+            },
+            "DEVICES": [
+                {
+                    "dev": "EEPROM1"
+                },
+                {
+                    "dev": "MUX1"
+                },
+                {
+                    "dev": "MUX2"
+                }
+            ]
+        }
+    },
+    "EEPROM1": {
+        "dev_info": {
+            "device_type": "EEPROM",
+            "device_name": "EEPROM1",
+            "device_parent": "SMBUS0"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x57",
+                "dev_type": "sys_eeprom"
+            },
+            "dev_attr": {
+                "access_mode": "BLOCK"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "MUX1": {
+        "dev_info": { "device_type": "MUX", "device_name": "MUX1", "device_parent": "SMBUS0"},
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x72",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x1",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "CPLD1"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLD2"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLDMUX1"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLD3"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLDMUX2"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLD4"
+                },
+                {
+                    "chn": "0",
+                    "dev": "CPLDMUX3"
+                },
+                {
+                    "chn": "0",
+                    "dev": "PSU1"
+                },
+                {
+                    "chn": "0",
+                    "dev": "PSU2"
+                }
+            ]
+        }
+    },
+    "MUX2": {
+        "dev_info": { "device_type": "MUX", "device_name": "MUX2", "device_parent": "SMBUS0"},
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x73",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x9",
+                "idle_state": "-2"
+            },
+            "channel": [ ]
+        }
+    },
+    "CPLD1": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD1",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x30",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLD2": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD2",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x31",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLDMUX1":
+    {
+        "dev_info": { "device_type":"CPLDMUX", "device_name":"CPLD2_MUX", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1", "dev_type":"cpld_mux", "dev_id":"1"},
+            "dev_attr": { "base_chan":"0x11", "num_chan":"32", "cpld_name":"CPLD2", "chan_cache": "0"},
+            "channel":
+            [
+                { "chan":"0" , "dev":["PORT1"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x81", "cpld_desel": "0x80"},
+                { "chan":"1" , "dev":["PORT2"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x82", "cpld_desel": "0x80"},
+                { "chan":"2" , "dev":["PORT3"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x83", "cpld_desel": "0x80"},
+                { "chan":"3" , "dev":["PORT4"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x84", "cpld_desel": "0x80"},
+                { "chan":"4" , "dev":["PORT5"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x85", "cpld_desel": "0x80"},
+                { "chan":"5" , "dev":["PORT6"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x86", "cpld_desel": "0x80"},
+                { "chan":"6" , "dev":["PORT7"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x87", "cpld_desel": "0x80"},
+                { "chan":"7" , "dev":["PORT8"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x88", "cpld_desel": "0x80"},
+                { "chan":"8" , "dev":["PORT9"] , "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x89", "cpld_desel": "0x80"},
+                { "chan":"9" , "dev":["PORT10"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8A", "cpld_desel": "0x80"},
+                { "chan":"10", "dev":["PORT11"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8B", "cpld_desel": "0x80"},
+                { "chan":"11", "dev":["PORT12"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8C", "cpld_desel": "0x80"},
+                { "chan":"12", "dev":["PORT13"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8D", "cpld_desel": "0x80"},
+                { "chan":"13", "dev":["PORT14"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8E", "cpld_desel": "0x80"},
+                { "chan":"14", "dev":["PORT15"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x8F", "cpld_desel": "0x80"},
+                { "chan":"15", "dev":["PORT16"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x90", "cpld_desel": "0x80"},
+                { "chan":"16", "dev":["PORT33"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x91", "cpld_desel": "0x80"},
+                { "chan":"17", "dev":["PORT34"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x92", "cpld_desel": "0x80"},
+                { "chan":"18", "dev":["PORT35"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x93", "cpld_desel": "0x80"},
+                { "chan":"19", "dev":["PORT36"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x94", "cpld_desel": "0x80"},
+                { "chan":"20", "dev":["PORT37"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x95", "cpld_desel": "0x80"},
+                { "chan":"21", "dev":["PORT38"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x96", "cpld_desel": "0x80"},
+                { "chan":"22", "dev":["PORT39"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x97", "cpld_desel": "0x80"},
+                { "chan":"23", "dev":["PORT40"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x98", "cpld_desel": "0x80"},
+                { "chan":"24", "dev":["PORT41"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x99", "cpld_desel": "0x80"},
+                { "chan":"25", "dev":["PORT42"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9A", "cpld_desel": "0x80"},
+                { "chan":"26", "dev":["PORT43"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9B", "cpld_desel": "0x80"},
+                { "chan":"27", "dev":["PORT44"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9C", "cpld_desel": "0x80"},
+                { "chan":"28", "dev":["PORT45"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9D", "cpld_desel": "0x80"},
+                { "chan":"29", "dev":["PORT46"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9E", "cpld_desel": "0x80"},
+                { "chan":"30", "dev":["PORT47"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0x9F", "cpld_desel": "0x80"},
+                { "chan":"31", "dev":["PORT48"], "cpld_devaddr":"0x31", "cpld_offset":"0xA5", "cpld_sel":"0xA0", "cpld_desel": "0x80"}
+            ]
+        }
+    },
+    "CPLD3": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD3",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x32",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLDMUX2":
+    {
+        "dev_info": { "device_type":"CPLDMUX", "device_name":"CPLD3_MUX", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1", "dev_type":"cpld_mux", "dev_id":"2"},
+            "dev_attr": { "base_chan":"0x31", "num_chan":"32", "cpld_name":"CPLD3", "chan_cache": "0"},
+            "channel":
+            [
+                { "chan":"0" , "dev":["PORT17"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x81", "cpld_desel": "0x80"},
+                { "chan":"1" , "dev":["PORT18"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x82", "cpld_desel": "0x80"},
+                { "chan":"2" , "dev":["PORT19"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x83", "cpld_desel": "0x80"},
+                { "chan":"3" , "dev":["PORT20"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x84", "cpld_desel": "0x80"},
+                { "chan":"4" , "dev":["PORT21"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x85", "cpld_desel": "0x80"},
+                { "chan":"5" , "dev":["PORT22"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x86", "cpld_desel": "0x80"},
+                { "chan":"6" , "dev":["PORT23"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x87", "cpld_desel": "0x80"},
+                { "chan":"7" , "dev":["PORT24"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x88", "cpld_desel": "0x80"},
+                { "chan":"8" , "dev":["PORT25"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x89", "cpld_desel": "0x80"},
+                { "chan":"9" , "dev":["PORT26"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8A", "cpld_desel": "0x80"},
+                { "chan":"10", "dev":["PORT27"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8B", "cpld_desel": "0x80"},
+                { "chan":"11", "dev":["PORT28"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8C", "cpld_desel": "0x80"},
+                { "chan":"12", "dev":["PORT29"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8D", "cpld_desel": "0x80"},
+                { "chan":"13", "dev":["PORT30"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8E", "cpld_desel": "0x80"},
+                { "chan":"14", "dev":["PORT31"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x8F", "cpld_desel": "0x80"},
+                { "chan":"15", "dev":["PORT32"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x90", "cpld_desel": "0x80"},
+                { "chan":"16", "dev":["PORT49"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x91", "cpld_desel": "0x80"},
+                { "chan":"17", "dev":["PORT50"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x92", "cpld_desel": "0x80"},
+                { "chan":"18", "dev":["PORT51"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x93", "cpld_desel": "0x80"},
+                { "chan":"19", "dev":["PORT52"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x94", "cpld_desel": "0x80"},
+                { "chan":"20", "dev":["PORT53"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x95", "cpld_desel": "0x80"},
+                { "chan":"21", "dev":["PORT54"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x96", "cpld_desel": "0x80"},
+                { "chan":"22", "dev":["PORT55"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x97", "cpld_desel": "0x80"},
+                { "chan":"23", "dev":["PORT56"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x98", "cpld_desel": "0x80"},
+                { "chan":"24", "dev":["PORT57"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x99", "cpld_desel": "0x80"},
+                { "chan":"25", "dev":["PORT58"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9A", "cpld_desel": "0x80"},
+                { "chan":"26", "dev":["PORT59"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9B", "cpld_desel": "0x80"},
+                { "chan":"27", "dev":["PORT60"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9C", "cpld_desel": "0x80"},
+                { "chan":"28", "dev":["PORT61"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9D", "cpld_desel": "0x80"},
+                { "chan":"29", "dev":["PORT62"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9E", "cpld_desel": "0x80"},
+                { "chan":"30", "dev":["PORT63"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0x9F", "cpld_desel": "0x80"},
+                { "chan":"31", "dev":["PORT64"], "cpld_devaddr":"0x32", "cpld_offset":"0xA5", "cpld_sel":"0xA0", "cpld_desel": "0x80"}
+            ]
+        }
+    },
+    "CPLD4": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD4",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x37",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLDMUX3":
+    {
+        "dev_info": { "device_type":"CPLDMUX", "device_name":"FPGA_MUX", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1", "dev_type":"cpld_mux", "dev_id":"3"},
+            "dev_attr": { "base_chan":"0x51", "num_chan":"2", "cpld_name":"CPLD4", "chan_cache": "0"},
+            "channel":
+            [
+                { "chan":"0" , "dev":["PORT65"] , "cpld_devaddr":"0x37", "cpld_offset":"0x40", "cpld_sel":"0x81", "cpld_desel": "0x80"},
+                { "chan":"1" , "dev":["PORT66"] , "cpld_devaddr":"0x37", "cpld_offset":"0x40", "cpld_sel":"0x82", "cpld_desel": "0x80"}
+            ]
+        }
+    },
+    "TEMP1": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP1",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV_CPU"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_CPU",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_CPU",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_CPU",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_CPU",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_CPU",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_CPU",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP2": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP2",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_CPU_PECI"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_CPU_PECI",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_CPU_PECI",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_CPU_PECI",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP3": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP3",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV1"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV1",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV1",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV1",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP4": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP4",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV2"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV2",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV2",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV2",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV2",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV2",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV2",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP5": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP5",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV3"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV3",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV3",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV3",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV3",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV3",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV3",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP6": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP6",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV4"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV4",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV4",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV4",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV4",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV4",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV4",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP7": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP7",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV5"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV5",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV5",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV5",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV5",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV5",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV5",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP8": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP8",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV_RISER"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_RISER",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_RISER",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_RISER",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_RISER",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_RISER",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_RISER",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP9": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP9",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV_FAN0"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN0",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN0",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN0",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN0",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN0",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN0",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP10": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP10",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_ENV_FAN1"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN1",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN1",
+                        "field_pos": "13"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_FAN1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "TEMP_ENV_FAN1",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP11": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP11",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_PSU0_TEMP1"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_TEMP1",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_TEMP1",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "TEMP12": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP12",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "TEMP_PSU1_TEMP1"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_TEMP1",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_TEMP1",
+                        "field_pos": "12"
+                    }
+                ]
+            }
+        }
+    },
+    "SYSSTATUS": {
+        "dev_info": {
+            "device_type": "SYSSTAT",
+            "device_name": "SYSSTATUS"
+        },
+        "dev_attr": {},
+        "attr_list":
+        [
+            {
+                "attr_name": "board_sku_id",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x0",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "board_hw_id",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x1",
+                "attr_mask": "0x03",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "board_deph_id",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x1",
+                "attr_mask": "0x4",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "board_build_id",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x1",
+                "attr_mask": "0x38",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld1_major_ver",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x2",
+                "attr_mask": "0xc0",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld1_minor_ver",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x2",
+                "attr_mask": "0x3f",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld1_build",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x4",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_major_ver",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x2",
+                "attr_mask": "0xc0",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_minor_ver",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x2",
+                "attr_mask": "0x3f",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_build",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x4",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_major_ver",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0x2",
+                "attr_mask": "0xc0",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_minor_ver",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0x2",
+                "attr_mask": "0x3f",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_build",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0x4",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "fpga_major_ver",
+                "attr_devaddr": "0x37",
+                "attr_offset": "0x2",
+                "attr_mask": "0xc0",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "fpga_minor_ver",
+                "attr_devaddr": "0x37",
+                "attr_offset": "0x2",
+                "attr_mask": "0x3f",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "fpga_build",
+                "attr_devaddr": "0x37",
+                "attr_offset": "0x4",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "psu_status",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x51",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "system_led_sys_fan",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x80",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "system_led_psu",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x81",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "system_led_sync",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x82",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_i2c_ctrl",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0xA0",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_i2c_ctrl",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0xA0",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld_mac_rov",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x54",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld1_evt_ctrl",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x3F",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_evt_ctrl",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x3F",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_evt_ctrl",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0x3F",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "fpga_evt_ctrl",
+                "attr_devaddr": "0x37",
+                "attr_offset": "0x3F",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld_port_led_clr",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x85",
+                "attr_mask": "0x1",
+                "attr_len": "0x1"
+            }
+        ]
+    },
+    "PSU1": {
+        "dev_info": {
+            "device_type": "PSU",
+            "device_name": "PSU1",
+            "device_parent": "MUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "1",
+            "num_psu_fans": "1"
+        },
+        "i2c": {
+            "interface": [
+                { "itf":"eeprom", "dev":"PSU1-EEPROM" }
+            ]
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list":
+                [
+                    {
+                        "attr_name": "psu_v_out",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_VOUT",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_out",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_IOUT",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_TEMP1",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_fan1_speed_rpm",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_FAN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_FAN",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_mfr_id",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Manufacturer",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_model_name",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | grep 'Part Number'|| echo 'Part Number : N/A'); _rv2=$(echo $_rv | cut -d':' -f 2 | awk '{$1=$1};1'); echo 'Part Number : '$_rv2",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Part Number",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_serial_num",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Serial",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    }
+                ]
+            }
+        }
+    },
+    "PSU1-EEPROM": {
+        "dev_info": {
+            "device_type": "PSU-EEPROM",
+            "device_name": "PSU1-EEPROM",
+            "device_parent": "MUX1",
+            "virt_parent": "PSU1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x5a",
+                "dev_type": "psu_eeprom"
+            },
+            "attr_list": [
+                {
+                    "attr_name":"psu_present",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x1",
+                    "attr_cmpval":"0x0",
+                    "attr_len":"1"
+                },
+                {
+                    "attr_name":"psu_power_good",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x10",
+                    "attr_cmpval":"0x10",
+                    "attr_len":"1"
+                }
+            ]
+        }
+    },
+    "PSU2": {
+        "dev_info": {
+            "device_type": "PSU",
+            "device_name": "PSU2",
+            "device_parent": "MUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "2",
+            "num_psu_fans": "1"
+        },
+        "i2c": {
+            "interface": [
+                { "itf":"eeprom", "dev":"PSU2-EEPROM" }
+            ]
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list":
+                [
+                    {
+                        "attr_name": "psu_v_out",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_VOUT",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_out",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_IOUT",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_temp1_input",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_TEMP1",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_fan1_speed_rpm",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_FAN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_FAN",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_mfr_id",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Manufacturer",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_model_name",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | grep 'Part Number'|| echo 'Part Number : N/A'); _rv2=$(echo $_rv | cut -d':' -f 2 | awk '{$1=$1};1'); echo 'Part Number : '$_rv2",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Part Number",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_serial_num",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Serial",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    }
+                ]
+            }
+        }
+    },
+    "PSU2-EEPROM": {
+        "dev_info": {
+            "device_type": "PSU-EEPROM",
+            "device_name": "PSU2-EEPROM",
+            "device_parent": "MUX1",
+            "virt_parent": "PSU2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1",
+                "dev_addr": "0x5b",
+                "dev_type": "psu_eeprom"
+            },
+            "attr_list": [
+                {
+                    "attr_name":"psu_present",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x2",
+                    "attr_cmpval":"0x0",
+                    "attr_len":"1"
+                },
+                {
+                    "attr_name":"psu_power_good",
+                    "attr_devaddr":"0x30",
+                    "attr_devtype":"cpld",
+                    "attr_offset":"0x51",
+                    "attr_mask":"0x20",
+                    "attr_cmpval":"0x20",
+                    "attr_len":"1"
+                }
+            ]
+        }
+    },
+    "FAN-CTRL": {
+        "dev_info": {
+            "device_type": "FAN",
+            "device_name": "FAN-CTRL",
+            "device_parent": ""
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "fan1_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN0_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan2_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN0_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan3_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN1_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan4_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN1_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan5_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN2_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan6_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN2_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan7_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN3_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN3_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan8_present",
+                        "bmc_cmd": "ipmitool sdr get -c FAN3_PRSNT_H",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN3_PRSNT_H",
+                        "field_pos": "5"
+                    },
+                    {
+                        "attr_name": "fan1_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_FRONT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN0_RPM_FRONT",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan2_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_REAR | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN0_RPM_REAR",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan3_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_FRONT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN1_RPM_FRONT",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan4_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_REAR | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN1_RPM_REAR",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan5_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_FRONT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN2_RPM_FRONT",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan6_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_REAR | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN2_RPM_REAR",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan7_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN3_RPM_FRONT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN3_RPM_FRONT",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "fan8_input",
+                        "bmc_cmd": "ipmitool sdr get -c FAN3_RPM_REAR | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "FAN3_RPM_REAR",
+                        "field_pos": "2"
+                    }
+                ]
+            }
+        }
+    },
+    "SYNC_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "DIAG_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "rw"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "3:0",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "3:0",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "3:0",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "3:0",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "3:2",
+                    "descr": "Off",
+                    "value": "0x1;0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                }
+            ]
+        }
+    },
+    "SYS_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "SYS_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "3:0",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "3:0",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "3:0",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "3:0",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "3:2",
+                    "descr": "Off",
+                    "value": "0x01;0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                }
+            ]
+        }
+    },
+    "FAN_LED": {
+        "dev_info": {
+                "device_type": "LED",
+                "device_name": "FAN_LED"
+        },
+        "dev_attr": {
+                "index": "0",
+                "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "7:4",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "7:4",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "7:4",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "7:4",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "7:6",
+                    "descr": "Off",
+                    "value": "0x01;0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                }
+            ]
+        }
+    },
+    "PSU1_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "PSU_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "3:0",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "3:0",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "3:0",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "3:0",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "3:2",
+                    "descr": "Off",
+                    "value": "0x01;0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                }
+            ]
+        }
+    },
+    "PSU2_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "PSU_LED"
+        },
+        "dev_attr": {
+            "index": "1",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "7:4",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "7:4",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "7:4",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "7:4",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "7:6",
+                    "descr": "Off",
+                    "value": "0x01;0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                }
+            ]
+        }
+    },
+    "LOC_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "LOC_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "rw"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "blue",
+                    "bits": "7:5",
+                    "descr": "Blue",
+                    "value": "0x04;0x05",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                },
+                {
+                    "attr_name": "blue_blink",
+                    "bits": "7:5",
+                    "descr": "Blue Blinking",
+                    "value": "0x06;0x07",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "7:6",
+                    "descr": "Off",
+                    "value": "0x01;0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x82"
+                }
+            ]
+        }
+    },
+    "PORT1": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT1",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "1"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                        "dev": "PORT1-EEPROM"
+                    },
+                    {
+                        "itf": "control",
+                        "dev": "PORT1-CTRL"
+                    }
+            ]
+        }
+    },
+    "PORT1-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT1-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x11",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT1-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT1-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x11",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT2": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT2",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "2"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT2-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT2-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT2-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT2-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x12",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT2-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT2-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x12",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT3": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT3",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "3"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT3-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT3-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT3-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT3-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT3"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x13",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT3-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT3-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT3"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x13",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT4": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT4",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "4"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT4-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT4-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT4-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT4-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT4"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x14",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT4-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT4-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT4"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x14",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT5": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT5",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "5"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT5-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT5-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT5-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT5-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT5"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x15",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT5-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT5-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT5"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x15",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT6": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT6",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+                "dev_idx": "6"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT6-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT6-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT6-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT6-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT6"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x16",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT6-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT6-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT6"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x16",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT7": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT7",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "7"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT7-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT7-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT7-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT7-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT7"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x17",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT7-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT7-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT7"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x17",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT8": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT8",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "8"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT8-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT8-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT8-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT8-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT8"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x18",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT8-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT8-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT8"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x18",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT9": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT9",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "9"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT9-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT9-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT9-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT9-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT9"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x19",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT9-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT9-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT9"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x19",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT10": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT10",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "10"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT10-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT10-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT10-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT10-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT10"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1A",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT10-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT10-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT10"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1A",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT11": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT11",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "11"
+        },
+        "i2c": {
+            "interface": [
+                {
+                "itf": "eeprom",
+                "dev": "PORT11-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT11-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT11-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT11-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT11"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1B",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT11-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT11-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT11"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1B",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT12": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT12",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "12"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT12-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT12-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT12-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT12-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT12"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1C",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT12-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT12-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT12"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1C",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT13": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT13",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "13"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT13-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT13-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT13-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT13-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT13"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1D",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT13-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT13-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT13"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1D",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT14": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT14",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "14"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT14-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT14-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT14-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT14-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT14"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1E",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT14-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT14-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT14"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1E",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT15": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT15",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "15"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT15-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT15-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT15-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT15-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT15"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1F",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT15-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT15-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT15"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1F",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT16": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT16",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "16"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT16-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT16-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT16-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT16-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT16"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x20",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT16-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT16-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT16"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x20",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT17": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT17",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "17"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT17-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT17-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT17-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT17-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT17"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x31",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT17-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT17-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT17"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x31",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT18": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT18",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "18"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT18-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT18-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT18-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT18-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT18"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x32",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT18-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT18-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT18"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x32",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT19": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT19",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "19"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT19-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT19-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT19-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT19-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT19"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x33",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT19-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT19-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT19"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x33",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT20": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT20",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "20"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT20-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT20-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT20-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT20-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT20"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x34",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT20-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT20-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT20"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x34",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT21": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT21",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "21"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT21-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT21-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT21-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT21-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT21"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x35",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT21-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT21-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT21"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x35",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT22": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT22",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "22"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT22-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT22-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT22-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT22-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT22"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x36",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT22-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT22-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT22"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x36",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT23": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT23",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "23"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT23-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT23-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT23-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT23-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT23"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x37",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT23-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT23-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT23"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x37",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT24": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT24",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "24"
+        },
+        "i2c": {
+            "interface": [
+                {
+                        "itf": "eeprom",
+                        "dev": "PORT24-EEPROM"
+                },
+                {
+                        "itf": "control",
+                        "dev": "PORT24-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT24-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT24-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT24"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x38",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT24-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT24-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT24"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x38",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT25": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT25",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "25"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT25-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT25-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT25-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT25-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT25"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x39",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT25-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT25-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT25"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x39",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT26": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT26",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "26"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT26-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT26-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT26-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT26-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT26"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3A",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT26-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT26-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT26"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3A",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT27": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT27",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "27"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT27-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT27-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT27-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT27-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT27"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3B",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT27-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT27-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT27"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3B",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT28": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT28",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "28"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT28-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT28-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT28-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT28-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT28"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3C",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT28-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT28-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT28"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3C",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT29": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT29",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "29"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT29-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT29-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT29-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT29-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT29"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3D",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT29-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT29-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT29"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3D",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT30": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT30",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "30"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT30-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT30-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT30-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT30-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT30"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3E",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT30-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT30-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT30"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3E",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT31": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT31",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "31"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT31-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT31-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT31-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT31-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT31"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3F",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT31-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT31-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT31"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x3F",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT32": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT32",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "32"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT32-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT32-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT32-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT32-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT32"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x40",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT32-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT32-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT32"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x40",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT33": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT33",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "33"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                        "dev": "PORT33-EEPROM"
+                    },
+                    {
+                        "itf": "control",
+                        "dev": "PORT33-CTRL"
+                    }
+            ]
+        }
+    },
+    "PORT33-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT33-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT33"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x21",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT33-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT33-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT33"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x21",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT34": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT34",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "34"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT34-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT34-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT34-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT34-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT34"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x22",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT34-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT34-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT34"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x22",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT35": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT35",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "35"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT35-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT35-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT35-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT35-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT35"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x23",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT35-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT35-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT35"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x23",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT36": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT36",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "36"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT36-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT36-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT36-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT36-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT36"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x24",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT36-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT36-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT36"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x24",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT37": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT37",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "37"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT37-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT37-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT37-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT37-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT37"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x25",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT37-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT37-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT37"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x25",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT38": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT38",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+                "dev_idx": "38"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT38-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT38-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT38-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT38-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT38"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x26",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT38-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT38-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT38"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x26",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT39": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT39",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "39"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT39-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT39-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT39-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT39-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT39"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x27",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT39-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT39-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT39"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x27",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT40": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT40",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "40"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT40-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT40-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT40-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT40-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT40"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x28",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT40-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT40-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT40"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x28",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT41": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT41",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "41"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT41-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT41-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT41-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT41-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT41"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x29",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT41-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT41-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT41"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x29",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT42": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT42",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "42"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT42-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT42-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT42-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT42-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT42"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2A",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT42-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT42-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT42"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2A",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT43": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT43",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "43"
+        },
+        "i2c": {
+            "interface": [
+                {
+                "itf": "eeprom",
+                "dev": "PORT43-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT43-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT43-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT43-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT43"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2B",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT43-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT43-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT43"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2B",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT44": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT44",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "44"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT44-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT44-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT44-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT44-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT44"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2C",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT44-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT44-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT44"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2C",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT45": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT45",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "45"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT45-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT45-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT45-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT45-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT45"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2D",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT45-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT45-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT45"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2D",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT46": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT46",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "46"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT46-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT46-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT46-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT46-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT46"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2E",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT46-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT46-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT46"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2E",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT47": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT47",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "47"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT47-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT47-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT47-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT47-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT47"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2F",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT47-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT47-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT47"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2F",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT48": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT48",
+            "device_parent": "CPLDMUX1"
+        },
+        "dev_attr": {
+            "dev_idx": "48"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT48-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT48-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT48-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT48-EEPROM",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT48"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x30",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT48-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT48-CTRL",
+            "device_parent": "CPLDMUX1",
+            "virt_parent": "PORT48"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x30",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT49": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT49",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "49"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT49-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT49-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT49-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT49-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT49"
+        },
+        "i2c": {
+            "topo_info": {
+            "parent_bus": "0x41",
+            "dev_addr": "0x50",
+            "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT49-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT49-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT49"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x41",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT50": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT50",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "50"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT50-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT50-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT50-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT50-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT50"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x42",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT50-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT50-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT50"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x42",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT51": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT51",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "51"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT51-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT51-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT51-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT51-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT51"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x43",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT51-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT51-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT51"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x43",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT52": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT52",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "52"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT52-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT52-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT52-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT52-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT52"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x44",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT52-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT52-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT52"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x44",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT53": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT53",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "53"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT53-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT53-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT53-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT53-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT53"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x45",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT53-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT53-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT53"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x45",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT54": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT54",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "54"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT54-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT54-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT54-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT54-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT54"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x46",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT54-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT54-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT54"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x46",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT55": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT55",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "55"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT55-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT55-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT55-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT55-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT55"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x47",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT55-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT55-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT55"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x47",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT56": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT56",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "56"
+        },
+        "i2c": {
+            "interface": [
+                {
+                        "itf": "eeprom",
+                        "dev": "PORT56-EEPROM"
+                },
+                {
+                        "itf": "control",
+                        "dev": "PORT56-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT56-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT56-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT56"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x48",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT56-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT56-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT56"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x48",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT57": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT57",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "57"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT57-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT57-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT57-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT57-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT57"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x49",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT57-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT57-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT57"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x49",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT58": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT58",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "58"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT58-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT58-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT58-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT58-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT58"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4A",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT58-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT58-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT58"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4A",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT59": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT59",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "59"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT59-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT59-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT59-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT59-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT59"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4B",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT59-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT59-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT59"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4B",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT60": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT60",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "60"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT60-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT60-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT60-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT60-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT60"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4C",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT60-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT60-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT60"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4C",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT61": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT61",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "61"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT61-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT61-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT61-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT61-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT61"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4D",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT61-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT61-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT61"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4D",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT62": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT62",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "62"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT62-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT62-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT62-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT62-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT62"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4E",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT62-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT62-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT62"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4E",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT63": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT63",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "63"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT63-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT63-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT63-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT63-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT63"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4F",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT63-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT63-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT63"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x4F",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT64": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT64",
+            "device_parent": "CPLDMUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "64"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT64-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT64-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT64-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT64-EEPROM",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT64"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x50",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT64-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT64-CTRL",
+            "device_parent": "CPLDMUX2",
+            "virt_parent": "PORT64"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x50",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x32",
+                    "attr_devname": "CPLD3",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT65": {
+        "dev_info": {
+            "device_type": "SFP28",
+            "device_name": "PORT65",
+            "device_parent": "CPLDMUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "65"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT65-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT65-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT65-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT65",
+            "device_parent": "CPLDMUX3",
+            "virt_parent": "PORT65"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x51",
+                "dev_addr": "0x50",
+                "dev_type": "optoe2"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT65-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT65-CTRL",
+            "device_parent": "CPLDMUX3",
+            "virt_parent": "PORT65"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x51",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_rxlos",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txfault",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txdisable",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x0C",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT66": {
+        "dev_info": {
+            "device_type": "SFP28",
+            "device_name": "PORT66",
+            "device_parent": "CPLDMUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "66"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT66-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT66-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT66-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT66",
+            "device_parent": "CPLDMUX3",
+            "virt_parent": "PORT66"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x52",
+                "dev_addr": "0x50",
+                "dev_type": "optoe2"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT66-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT66-CTRL",
+            "device_parent": "CPLDMUX3",
+            "virt_parent": "PORT66"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x52",
+                "dev_addr": "0x5f",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_rxlos",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txfault",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txdisable",
+                    "attr_devaddr": "0x37",
+                    "attr_devname": "CPLD4",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x0C",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pddf_support
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform.json b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform.json
new file mode 100644
index 00000000000..ff5450e19b1
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform.json
@@ -0,0 +1,1010 @@
+{
+    "chassis": {
+        "name": "S9321-64EO",
+        "components": [
+            {
+                "name": "CPU_CPLD"
+            },
+            {
+                "name": "CPLD1"
+            },
+            {
+                "name": "CPLD2"
+            },
+            {
+                "name": "CPLD3"
+            },
+            {
+                "name": "FPGA"
+            },
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "BMC"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1"
+            },
+            {
+                "name": "Fantray1_2"
+            },
+            {
+                "name": "Fantray2_1"
+            },
+            {
+                "name": "Fantray2_2"
+            },
+            {
+                "name": "Fantray3_1"
+            },
+            {
+                "name": "Fantray3_2"
+            },
+            {
+                "name": "Fantray4_1"
+            },
+            {
+                "name": "Fantray4_2"
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray1_1"
+                    },
+                    {
+                        "name": "Fantray1_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray2_1"
+                    },
+                    {
+                        "name": "Fantray2_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray3",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray3_1"
+                    },
+                    {
+                        "name": "Fantray3_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray4",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray4_1"
+                    },
+                    {
+                        "name": "Fantray4_2"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU1_TEMP1"
+                    }
+                ]
+            },
+            {
+                "name": "PSU2",
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU2_TEMP1"
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "TEMP_ENV_CPU"
+            },
+            {
+                "name": "TEMP_CPU_PECI"
+            },
+            {
+                "name": "TEMP_ENV1"
+            },
+            {
+                "name": "TEMP_ENV2"
+            },
+            {
+                "name": "TEMP_ENV3"
+            },
+            {
+                "name": "TEMP_ENV4"
+            },
+            {
+                "name": "TEMP_ENV5"
+            },
+            {
+                "name": "TEMP_ENV_RISER"
+            },
+            {
+                "name": "TEMP_ENV_FAN0"
+            },
+            {
+                "name": "TEMP_ENV_FAN1"
+            },
+            {
+                "name": "TEMP_PSU0_TEMP1"
+            },
+            {
+                "name": "TEMP_PSU1_TEMP1"
+            }
+        ],
+        "sfps": [
+            {
+                "name": "Ethernet0"
+            },
+            {
+                "name": "Ethernet8"
+            },
+            {
+                "name": "Ethernet16"
+            },
+            {
+                "name": "Ethernet24"
+            },
+            {
+                "name": "Ethernet32"
+            },
+            {
+                "name": "Ethernet40"
+            },
+            {
+                "name": "Ethernet48"
+            },
+            {
+                "name": "Ethernet56"
+            },
+            {
+                "name": "Ethernet64"
+            },
+            {
+                "name": "Ethernet72"
+            },
+            {
+                "name": "Ethernet80"
+            },
+            {
+                "name": "Ethernet88"
+            },
+            {
+                "name": "Ethernet96"
+            },
+            {
+                "name": "Ethernet104"
+            },
+            {
+                "name": "Ethernet112"
+            },
+            {
+                "name": "Ethernet120"
+            },
+            {
+                "name": "Ethernet128"
+            },
+            {
+                "name": "Ethernet136"
+            },
+            {
+                "name": "Ethernet144"
+            },
+            {
+                "name": "Ethernet152"
+            },
+            {
+                "name": "Ethernet160"
+            },
+            {
+                "name": "Ethernet168"
+            },
+            {
+                "name": "Ethernet176"
+            },
+            {
+                "name": "Ethernet184"
+            },
+            {
+                "name": "Ethernet192"
+            },
+            {
+                "name": "Ethernet200"
+            },
+            {
+                "name": "Ethernet208"
+            },
+            {
+                "name": "Ethernet216"
+            },
+            {
+                "name": "Ethernet224"
+            },
+            {
+                "name": "Ethernet232"
+            },
+            {
+                "name": "Ethernet240"
+            },
+            {
+                "name": "Ethernet248"
+            },
+            {
+                "name": "Ethernet256"
+            },
+            {
+                "name": "Ethernet264"
+            },
+            {
+                "name": "Ethernet272"
+            },
+            {
+                "name": "Ethernet280"
+            },
+            {
+                "name": "Ethernet288"
+            },
+            {
+                "name": "Ethernet296"
+            },
+            {
+                "name": "Ethernet304"
+            },
+            {
+                "name": "Ethernet312"
+            },
+            {
+                "name": "Ethernet320"
+            },
+            {
+                "name": "Ethernet328"
+            },
+            {
+                "name": "Ethernet336"
+            },
+            {
+                "name": "Ethernet344"
+            },
+            {
+                "name": "Ethernet352"
+            },
+            {
+                "name": "Ethernet360"
+            },
+            {
+                "name": "Ethernet368"
+            },
+            {
+                "name": "Ethernet376"
+            },
+            {
+                "name": "Ethernet384"
+            },
+            {
+                "name": "Ethernet392"
+            },
+            {
+                "name": "Ethernet400"
+            },
+            {
+                "name": "Ethernet408"
+            },
+            {
+                "name": "Ethernet416"
+            },
+            {
+                "name": "Ethernet424"
+            },
+            {
+                "name": "Ethernet432"
+            },
+            {
+                "name": "Ethernet440"
+            },
+            {
+                "name": "Ethernet448"
+            },
+            {
+                "name": "Ethernet456"
+            },
+            {
+                "name": "Ethernet464"
+            },
+            {
+                "name": "Ethernet472"
+            },
+            {
+                "name": "Ethernet480"
+            },
+            {
+                "name": "Ethernet488"
+            },
+            {
+                "name": "Ethernet496"
+            },
+            {
+                "name": "Ethernet504"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "0,0,0,0,0,0,0,0",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                "1x800G": ["Eth0(Port0)"],
+                "1x400G": ["Eth0(Port0)"],
+                "2x400G[200G, 100G]": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
+                "4x200G[100G]": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"]
+            }
+        },
+
+        "Ethernet8": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                "1x800G": ["Eth1(Port1)"],
+                "1x400G": ["Eth1(Port1)"],
+                "2x400G[200G, 100G]": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "4x200G[100G]": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"]
+            }
+       },
+
+        "Ethernet16": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                "1x800G": ["Eth2(Port2)"],
+                "1x400G": ["Eth2(Port2)"],
+                "2x400G[200G, 100G]": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "4x200G[100G]": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"]
+            }
+        },
+        "Ethernet24": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                "1x800G": ["Eth3(Port3)"],
+                "1x400G": ["Eth3(Port3)"],
+                "2x400G[200G, 100G]": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "4x200G[100G]": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"]
+            }
+        },
+        "Ethernet32": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x800G": ["Eth4(Port4)"],
+                "1x400G": ["Eth4(Port4)"],
+                "2x400G[200G, 100G]": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "4x200G[100G]": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"]
+            }
+        },
+        "Ethernet40": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x800G": ["Eth5(Port5)"],
+                "1x400G": ["Eth5(Port5)"],
+                "2x400G[200G, 100G]": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "4x200G[100G]": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"]
+            }
+        },
+        "Ethernet48": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                "1x800G": ["Eth6(Port6)"],
+                "1x400G": ["Eth6(Port6)"],
+                "2x400G[200G, 100G]": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "4x200G[100G]": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"]
+            }
+        },
+        "Ethernet56": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                "1x800G": ["Eth7(Port7)"],
+                "1x400G": ["Eth7(Port7)"],
+                "2x400G[200G, 100G]": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "4x200G[100G]": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"]
+            }
+        },
+        "Ethernet64": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "177,178,179,180,181,182,183,184",
+            "breakout_modes": {
+                "1x800G": ["Eth8(Port8)"],
+                "1x400G": ["Eth8(Port8)"],
+                "2x400G[200G, 100G]": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "4x200G[100G]": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"]
+            }
+        },
+
+        "Ethernet72": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "185,186,187,188,189,190,191,192",
+            "breakout_modes": {
+                "1x800G": ["Eth9(Port9)"],
+                "1x400G": ["Eth9(Port9)"],
+                "2x400G[200G, 100G]": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "4x200G[100G]": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"]
+            }
+        },
+        "Ethernet80": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "209,210,211,212,213,214,215,216",
+            "breakout_modes": {
+                "1x800G": ["Eth10(Port10)"],
+                "1x400G": ["Eth10(Port10)"],
+                "2x400G[200G, 100G]": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "4x200G[100G]": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"]
+            }
+        },
+        "Ethernet88": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "217,218,219,220,221,222,223,224",
+            "breakout_modes": {
+                "1x800G": ["Eth11(Port11)"],
+                "1x400G": ["Eth11(Port11)"],
+                "2x400G[200G, 100G]": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "4x200G[100G]": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"]
+            }
+        },
+        "Ethernet96": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "225,226,227,228,229,230,231,232",
+            "breakout_modes": {
+                "1x800G": ["Eth12(Port12)"],
+                "1x400G": ["Eth12(Port12)"],
+                "2x400G[200G, 100G]": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "4x200G[100G]": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"]
+            }
+        },
+        "Ethernet104": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "233,234,235,236,237,238,239,240",
+            "breakout_modes": {
+                "1x800G": ["Eth13(Port13)"],
+                "1x400G": ["Eth13(Port13)"],
+                "2x400G[200G, 100G]": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "4x200G[100G]": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"]
+            }
+        },
+        "Ethernet112": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "241,242,243,244,245,246,247,248",
+            "breakout_modes": {
+                "1x800G": ["Eth14(Port14)"],
+                "1x400G": ["Eth14(Port14)"],
+                "2x400G[200G, 100G]": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "4x200G[100G]": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"]
+            }
+        },
+        "Ethernet120": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "249,250,251,252,253,254,255,256",
+            "breakout_modes": {
+                "1x800G": ["Eth15(Port15)"],
+                "1x400G": ["Eth15(Port15)"],
+                "2x400G[200G, 100G]": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "4x200G[100G]": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"]
+            }
+        },
+        "Ethernet128": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "265,266,267,268,269,270,271,272",
+            "breakout_modes": {
+                "1x800G": ["Eth16(Port16)"],
+                "1x400G": ["Eth16(Port16)"],
+                "2x400G[200G, 100G]": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "4x200G[100G]": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"]
+            }
+        },
+        "Ethernet136": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "257,258,259,260,261,262,263,264",
+            "breakout_modes": {
+                "1x800G": ["Eth17(Port17)"],
+                "1x400G": ["Eth17(Port17)"],
+                "2x400G[200G, 100G]": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "4x200G[100G]": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"]
+            }
+        },
+        "Ethernet144": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "281,282,283,284,285,286,287,288",
+            "breakout_modes": {
+                "1x800G": ["Eth18(Port18)"],
+                "1x400G": ["Eth18(Port18)"],
+                "2x400G[200G, 100G]": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "4x200G[100G]": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"]
+            }
+        },
+        "Ethernet152": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "273,274,275,276,277,278,279,280",
+            "breakout_modes": {
+                "1x800G": ["Eth19(Port19)"],
+                "1x400G": ["Eth19(Port19)"],
+                "2x400G[200G, 100G]": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "4x200G[100G]": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"]
+            }
+        },
+        "Ethernet160": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "297,298,299,300,301,302,303,304",
+            "breakout_modes": {
+                "1x800G": ["Eth20(Port20)"],
+                "1x400G": ["Eth20(Port20)"],
+                "2x400G[200G, 100G]": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "4x200G[100G]": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"]
+            }
+        },
+        "Ethernet168": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "289,290,291,292,293,294,295,296",
+            "breakout_modes": {
+                "1x800G": ["Eth21(Port21)"],
+                "1x400G": ["Eth21(Port21)"],
+                "2x400G[200G, 100G]": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "4x200G[100G]": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"]
+            }
+        },
+        "Ethernet176": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "329,330,331,332,333,334,335,336",
+            "breakout_modes": {
+                "1x800G": ["Eth22(Port22)"],
+                "1x400G": ["Eth22(Port22)"],
+                "2x400G[200G, 100G]": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "4x200G[100G]": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"]
+            }
+        },
+        "Ethernet184": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "321,322,323,324,325,326,327,328",
+            "breakout_modes": {
+                "1x800G": ["Eth23(Port23)"],
+                "1x400G": ["Eth23(Port23)"],
+                "2x400G[200G, 100G]": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "4x200G[100G]": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"]
+            }
+        },
+        "Ethernet192": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "361,362,363,364,365,366,367,368",
+            "breakout_modes": {
+                "1x800G": ["Eth24(Port24)"],
+                "1x400G": ["Eth24(Port24)"],
+                "2x400G[200G, 100G]": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "4x200G[100G]": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"]
+            }
+        },
+        "Ethernet200": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "353,354,355,356,357,358,359,360",
+            "breakout_modes": {
+                "1x800G": ["Eth25(Port25)"],
+                "1x400G": ["Eth25(Port25)"],
+                "2x400G[200G, 100G]": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "4x200G[100G]": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"]
+            }
+        },
+        "Ethernet208": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "393,394,395,396,397,398,399,400",
+            "breakout_modes": {
+                "1x800G": ["Eth26(Port26)"],
+                "1x400G": ["Eth26(Port26)"],
+                "2x400G[200G, 100G]": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "4x200G[100G]": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"]
+            }
+        },
+        "Ethernet216": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "385,386,387,388,389,390,391,392",
+            "breakout_modes": {
+                "1x800G": ["Eth27(Port27)"],
+                "1x400G": ["Eth27(Port27)"],
+                "2x400G[200G, 100G]": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "4x200G[100G]": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"]
+            }
+        },
+        "Ethernet224": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "425,426,427,428,429,430,431,432",
+            "breakout_modes": {
+                "1x800G": ["Eth28(Port28)"],
+                "1x400G": ["Eth28(Port28)"],
+                "2x400G[200G, 100G]": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "4x200G[100G]": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"]
+            }
+        },
+        "Ethernet232": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "417,418,419,420,421,422,423,424",
+            "breakout_modes": {
+                "1x800G": ["Eth29(Port29)"],
+                "1x400G": ["Eth29(Port29)"],
+                "2x400G[200G, 100G]": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "4x200G[100G]": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"]
+            }
+        },
+        "Ethernet240": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "457,458,459,460,461,462,463,464",
+            "breakout_modes": {
+                "1x800G": ["Eth30(Port30)"],
+                "1x400G": ["Eth30(Port30)"],
+                "2x400G[200G, 100G]": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "4x200G[100G]": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"]
+            }
+        },
+        "Ethernet248": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "449,450,451,452,453,454,455,456",
+            "breakout_modes": {
+                "1x800G": ["Eth31(Port31)"],
+                "1x400G": ["Eth31(Port31)"],
+                "2x400G[200G, 100G]": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "4x200G[100G]": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"]
+            }
+        },
+        "Ethernet256": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                "1x800G": ["Eth32(Port32)"],
+                "1x400G": ["Eth32(Port32)"],
+                "2x400G[200G, 100G]": ["Eth32/1(Port32)", "Eth32/2(Port32)"],
+                "4x200G[100G]": ["Eth32/1(Port32)", "Eth32/2(Port32)", "Eth32/3(Port32)", "Eth32/4(Port32)"]
+            }
+        },
+        "Ethernet264": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x800G": ["Eth33(Port33)"],
+                "1x400G": ["Eth33(Port33)"],
+                "2x400G[200G, 100G]": ["Eth33/1(Port33)", "Eth33/2(Port33)"],
+                "4x200G[100G]": ["Eth33/1(Port33)", "Eth33/2(Port33)", "Eth33/3(Port33)", "Eth33/4(Port33)"]
+            }
+        },
+        "Ethernet272": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x800G": ["Eth34(Port34)"],
+                "1x400G": ["Eth34(Port34)"],
+                "2x400G[200G, 100G]": ["Eth34/1(Port34)", "Eth34/2(Port34)"],
+                "4x200G[100G]": ["Eth34/1(Port34)", "Eth34/2(Port34)", "Eth34/3(Port34)", "Eth34/4(Port34)"]
+            }
+        },
+        "Ethernet280": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x800G": ["Eth35(Port35)"],
+                "1x400G": ["Eth35(Port35)"],
+                "2x400G[200G, 100G]": ["Eth35/1(Port35)", "Eth35/2(Port35)"],
+                "4x200G[100G]": ["Eth35/1(Port35)", "Eth35/2(Port35)", "Eth35/3(Port35)", "Eth35/4(Port35)"]
+            }
+        },
+        "Ethernet288": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x800G": ["Eth36(Port36)"],
+                "1x400G": ["Eth36(Port36)"],
+                "2x400G[200G, 100G]": ["Eth36/1(Port36)", "Eth36/2(Port36)"],
+                "4x200G[100G]": ["Eth36/1(Port36)", "Eth36/2(Port36)", "Eth36/3(Port36)", "Eth36/4(Port36)"]
+            }
+        },
+        "Ethernet296": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x800G": ["Eth37(Port37)"],
+                "1x400G": ["Eth37(Port37)"],
+                "2x400G[200G, 100G]": ["Eth37/1(Port37)", "Eth37/2(Port37)"],
+                "4x200G[100G]": ["Eth37/1(Port37)", "Eth37/2(Port37)", "Eth37/3(Port37)", "Eth37/4(Port37)"]
+            }
+        },
+        "Ethernet304": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                "1x800G": ["Eth38(Port38)"],
+                "1x400G": ["Eth38(Port38)"],
+                "2x400G[200G, 100G]": ["Eth38/1(Port38)", "Eth38/2(Port38)"],
+                "4x200G[100G]": ["Eth38/1(Port38)", "Eth38/2(Port38)", "Eth38/3(Port38)", "Eth38/4(Port38)"]
+            }
+        },
+        "Ethernet312": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                "1x800G": ["Eth39(Port39)"],
+                "1x400G": ["Eth39(Port39)"],
+                "2x400G[200G, 100G]": ["Eth39/1(Port39)", "Eth39/2(Port39)"],
+                "4x200G[100G]": ["Eth39/1(Port39)", "Eth39/2(Port39)", "Eth39/3(Port39)", "Eth39/4(Port39)"]
+            }
+        },
+        "Ethernet320": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "169,170,171,172,173,174,175,176",
+            "breakout_modes": {
+                "1x800G": ["Eth40(Port40)"],
+                "1x400G": ["Eth40(Port40)"],
+                "2x400G[200G, 100G]": ["Eth40/1(Port40)", "Eth40/2(Port40)"],
+                "4x200G[100G]": ["Eth40/1(Port40)", "Eth40/2(Port40)", "Eth40/3(Port40)", "Eth40/4(Port40)"]
+            }
+        },
+        "Ethernet328": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "161,162,163,164,165,166,167,168",
+            "breakout_modes": {
+                "1x800G": ["Eth41(Port41)"],
+                "1x400G": ["Eth41(Port41)"],
+                "2x400G[200G, 100G]": ["Eth41/1(Port41)", "Eth41/2(Port41)"],
+                "4x200G[100G]": ["Eth41/1(Port41)", "Eth41/2(Port41)", "Eth41/3(Port41)", "Eth41/4(Port41)"]
+            }
+        },
+        "Ethernet336": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "201,202,203,204,205,206,207,208",
+            "breakout_modes": {
+                "1x800G": ["Eth42(Port42)"],
+                "1x400G": ["Eth42(Port42)"],
+                "2x400G[200G, 100G]": ["Eth42/1(Port42)", "Eth42/2(Port42)"],
+                "4x200G[100G]": ["Eth42/1(Port42)", "Eth42/2(Port42)", "Eth42/3(Port42)", "Eth42/4(Port42)"]
+            }
+        },
+        "Ethernet344": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "193,194,195,196,197,198,199,200",
+            "breakout_modes": {
+                "1x800G": ["Eth43(Port43)"],
+                "1x400G": ["Eth43(Port43)"],
+                "2x400G[200G, 100G]": ["Eth43/1(Port43)", "Eth43/2(Port43)"],
+                "4x200G[100G]": ["Eth43/1(Port43)", "Eth43/2(Port43)", "Eth43/3(Port43)", "Eth43/4(Port43)"]
+            }
+        },
+        "Ethernet352": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                "1x800G": ["Eth44(Port44)"],
+                "1x400G": ["Eth44(Port44)"],
+                "2x400G[200G, 100G]": ["Eth44/1(Port44)", "Eth44/2(Port44)"],
+                "4x200G[100G]": ["Eth44/1(Port44)", "Eth44/2(Port44)", "Eth44/3(Port44)", "Eth44/4(Port44)"]
+            }
+        },
+        "Ethernet360": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                "1x800G": ["Eth45(Port45)"],
+                "1x400G": ["Eth45(Port45)"],
+                "2x400G[200G, 100G]": ["Eth45/1(Port45)", "Eth45/2(Port45)"],
+                "4x200G[100G]": ["Eth45/1(Port45)", "Eth45/2(Port45)", "Eth45/3(Port45)", "Eth45/4(Port45)"]
+            }
+        },
+        "Ethernet368": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x800G": ["Eth46(Port46)"],
+                "1x400G": ["Eth46(Port46)"],
+                "2x400G[200G, 100G]": ["Eth46/1(Port46)", "Eth46/2(Port46)"],
+                "4x200G[100G]": ["Eth46/1(Port46)", "Eth46/2(Port46)", "Eth46/3(Port46)", "Eth46/4(Port46)"]
+            }
+        },
+        "Ethernet376": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                "1x800G": ["Eth47(Port47)"],
+                "1x400G": ["Eth47(Port47)"],
+                "2x400G[200G, 100G]": ["Eth47/1(Port47)", "Eth47/2(Port47)"],
+                "4x200G[100G]": ["Eth47/1(Port47)", "Eth47/2(Port47)", "Eth47/3(Port47)", "Eth47/4(Port47)"]
+            }
+        },
+        "Ethernet384": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "505,506,507,508,509,510,511,512",
+            "breakout_modes": {
+                "1x800G": ["Eth48(Port48)"],
+                "1x400G": ["Eth48(Port48)"],
+                "2x400G[200G, 100G]": ["Eth48/1(Port48)", "Eth48/2(Port48)"],
+                "4x200G[100G]": ["Eth48/1(Port48)", "Eth48/2(Port48)", "Eth48/3(Port48)", "Eth48/4(Port48)"]
+            }
+        },
+        "Ethernet392": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "497,498,499,500,501,502,503,504",
+            "breakout_modes": {
+                "1x800G": ["Eth49(Port49)"],
+                "1x400G": ["Eth49(Port49)"],
+                "2x400G[200G, 100G]": ["Eth49/1(Port49)", "Eth49/2(Port49)"],
+                "4x200G[100G]": ["Eth49/1(Port49)", "Eth49/2(Port49)", "Eth49/3(Port49)", "Eth49/4(Port49)"]
+            }
+        },
+        "Ethernet400": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "489,490,491,492,493,494,495,496",
+            "breakout_modes": {
+                "1x800G": ["Eth50(Port50)"],
+                "1x400G": ["Eth50(Port50)"],
+                "2x400G[200G, 100G]": ["Eth50/1(Port50)", "Eth50/2(Port50)"],
+                "4x200G[100G]": ["Eth50/1(Port50)", "Eth50/2(Port50)", "Eth50/3(Port50)", "Eth50/4(Port50)"]
+            }
+        },
+        "Ethernet408": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "481,482,483,484,485,486,487,488",
+            "breakout_modes": {
+                "1x800G": ["Eth51(Port51)"],
+                "1x400G": ["Eth51(Port51)"],
+                "2x400G[200G, 100G]": ["Eth51/1(Port51)", "Eth51/2(Port51)"],
+                "4x200G[100G]": ["Eth51/1(Port51)", "Eth51/2(Port51)", "Eth51/3(Port51)", "Eth51/4(Port51)"]
+            }
+        },
+        "Ethernet416": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "305,306,307,308,309,310,311,312",
+            "breakout_modes": {
+                "1x800G": ["Eth52(Port52)"],
+                "1x400G": ["Eth52(Port52)"],
+                "2x400G[200G, 100G]": ["Eth52/1(Port52)", "Eth52/2(Port52)"],
+                "4x200G[100G]": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"]
+            }
+        },
+        "Ethernet424": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "313,314,315,316,317,318,319,320",
+            "breakout_modes": {
+                "1x800G": ["Eth53(Port53)"],
+                "1x400G": ["Eth53(Port53)"],
+                "2x400G[200G, 100G]": ["Eth53/1(Port53)", "Eth53/2(Port53)"],
+                "4x200G[100G]": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"]
+            }
+        },
+        "Ethernet432": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "337,338,339,340,341,342,343,344",
+            "breakout_modes": {
+                "1x800G": ["Eth54(Port54)"],
+                "1x400G": ["Eth54(Port54)"],
+                "2x400G[200G, 100G]": ["Eth54/1(Port54)", "Eth54/2(Port54)"],
+                "4x200G[100G]": ["Eth54/1(Port54)", "Eth54/2(Port54)", "Eth54/3(Port54)", "Eth54/4(Port54)"]
+            }
+        },
+        "Ethernet440": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "345,346,347,348,349,350,351,352",
+            "breakout_modes": {
+                "1x800G": ["Eth55(Port55)"],
+                "1x400G": ["Eth55(Port55)"],
+                "2x400G[200G, 100G]": ["Eth55/1(Port55)", "Eth55/2(Port55)"],
+                "4x200G[100G]": ["Eth55/1(Port55)", "Eth55/2(Port55)", "Eth55/3(Port55)", "Eth55/4(Port55)"]
+            }
+        },
+        "Ethernet448": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "369,370,371,372,373,374,375,376",
+            "breakout_modes": {
+                "1x800G": ["Eth56(Port56)"],
+                "1x400G": ["Eth56(Port56)"],
+                "2x400G[200G, 100G]": ["Eth56/1(Port56)", "Eth56/2(Port56)"],
+                "4x200G[100G]": ["Eth56/1(Port56)", "Eth56/2(Port56)", "Eth56/3(Port56)", "Eth56/4(Port56)"]
+            }
+        },
+        "Ethernet456": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "377,378,379,380,381,382,383,384",
+            "breakout_modes": {
+                "1x800G": ["Eth57(Port57)"],
+                "1x400G": ["Eth57(Port57)"],
+                "2x400G[200G, 100G]": ["Eth57/1(Port57)", "Eth57/2(Port57)"],
+                "4x200G[100G]": ["Eth57/1(Port57)", "Eth57/2(Port57)", "Eth57/3(Port57)", "Eth57/4(Port57)"]
+            }
+        },
+        "Ethernet464": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "401,402,403,404,405,406,407,408",
+            "breakout_modes": {
+                "1x800G": ["Eth58(Port58)"],
+                "1x400G": ["Eth58(Port58)"],
+                "2x400G[200G, 100G]": ["Eth58/1(Port58)", "Eth58/2(Port58)"],
+                "4x200G[100G]": ["Eth58/1(Port58)", "Eth58/2(Port58)", "Eth58/3(Port58)", "Eth58/4(Port58)"]
+            }
+        },
+        "Ethernet472": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "409,410,411,412,413,414,415,416",
+            "breakout_modes": {
+                "1x800G": ["Eth59(Port59)"],
+                "1x400G": ["Eth59(Port59)"],
+                "2x400G[200G, 100G]": ["Eth59/1(Port59)", "Eth59/2(Port59)"],
+                "4x200G[100G]": ["Eth59/1(Port59)", "Eth59/2(Port59)", "Eth59/3(Port59)", "Eth59/4(Port59)"]
+            }
+        },
+        "Ethernet480": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "433,434,435,436,437,438,439,440",
+            "breakout_modes": {
+                "1x800G": ["Eth60(Port60)"],
+                "1x400G": ["Eth60(Port60)"],
+                "2x400G[200G, 100G]": ["Eth60/1(Port60)", "Eth60/2(Port60)"],
+                "4x200G[100G]": ["Eth60/1(Port60)", "Eth60/2(Port60)", "Eth60/3(Port60)", "Eth60/4(Port60)"]
+            }
+        },
+        "Ethernet488": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "441,442,443,444,445,446,447,448",
+            "breakout_modes": {
+                "1x800G": ["Eth61(Port61)"],
+                "1x400G": ["Eth61(Port61)"],
+                "2x400G[200G, 100G]": ["Eth61/1(Port61)", "Eth61/2(Port61)"],
+                "4x200G[100G]": ["Eth61/1(Port61)", "Eth61/2(Port61)", "Eth61/3(Port61)", "Eth61/4(Port61)"]
+            }
+        },
+        "Ethernet496": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "465,466,467,468,469,470,471,472",
+            "breakout_modes": {
+                "1x800G": ["Eth62(Port62)"],
+                "1x400G": ["Eth62(Port62)"],
+                "2x400G[200G, 100G]": ["Eth62/1(Port62)", "Eth62/2(Port62)"],
+                "4x200G[100G]": ["Eth62/1(Port62)", "Eth62/2(Port62)", "Eth62/3(Port62)", "Eth62/4(Port62)"]
+            }
+        },
+        "Ethernet504": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "473,474,475,476,477,478,479,480",
+            "breakout_modes": {
+                "1x800G": ["Eth63(Port63)"],
+                "1x400G": ["Eth63(Port63)"],
+                "2x400G[200G, 100G]": ["Eth63/1(Port63)", "Eth63/2(Port63)"],
+                "4x200G[100G]": ["Eth63/1(Port63)", "Eth63/2(Port63)", "Eth63/3(Port63)", "Eth63/4(Port63)"]
+            }
+        }
+    }
+}
+
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform_asic
new file mode 100644
index 00000000000..96046765276
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform_components.json
new file mode 100644
index 00000000000..752bdbf0722
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform_components.json
@@ -0,0 +1,15 @@
+{
+    "chassis": {
+        "x86_64-ufispace_s9321_64eo-r0": {
+            "component": {
+                "CPU_CPLD": { },
+                "CPLD1": { },
+                "CPLD2": { },
+                "CPLD3": { },
+                "FPGA": { },
+                "BIOS": { },
+                "BMC": {}
+            }
+        }
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform_env.conf
new file mode 100644
index 00000000000..aee1c756bf5
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/platform_env.conf
@@ -0,0 +1,2 @@
+SYNCD_SHM_SIZE=1G
+is_ltsw_chip=1
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pmon_daemon_control.json
new file mode 100644
index 00000000000..e2c74a89dcd
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/pmon_daemon_control.json
@@ -0,0 +1,9 @@
+{
+    "skip_pcied": true,
+    "skip_fancontrol": false,
+    "skip_thermalctld": false,
+    "skip_ledd": true,
+    "skip_xcvrd": false,
+    "skip_psud": false,
+    "skip_syseepromd": false
+}
diff --git a/device/ufispace/x86_64-ufispace_s9321_64eo-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/system_health_monitoring_config.json
new file mode 100644
index 00000000000..43816ab5516
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9321_64eo-r0/system_health_monitoring_config.json
@@ -0,0 +1,15 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu",
+        "fan"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "yellow_blink",
+        "normal": "green",
+        "booting": "green_blink"
+    }
+}
\ No newline at end of file
diff --git a/device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/context_config.json b/device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/context_config.json
new file mode 100644
index 00000000000..37e8eaa8900
--- /dev/null
+++ b/device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/context_config.json
@@ -0,0 +1,21 @@
+{
+    "CONTEXTS": [
+        {
+            "guid" : 0,
+            "name" : "syncd0",
+            "dbAsic" : "ASIC_DB",
+            "dbCounters" : "COUNTERS_DB",
+            "dbFlex": "FLEX_COUNTER_DB",
+            "dbState" : "STATE_DB",
+            "zmq_enable": true,
+            "zmq_endpoint": "tcp://127.0.0.1:5555",
+            "zmq_ntf_endpoint": "tcp://127.0.0.1:5556",
+            "switches": [
+                {
+                    "index" : 0,
+                    "hwinfo" : ""
+                }
+            ]
+        }
+    ]
+}
diff --git a/dockers/docker-auditd-watchdog/Dockerfile.j2 b/dockers/docker-auditd-watchdog/Dockerfile.j2
new file mode 100644
index 00000000000..fca1e1b4cd3
--- /dev/null
+++ b/dockers/docker-auditd-watchdog/Dockerfile.j2
@@ -0,0 +1,39 @@
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} AS builder
+
+# Update apt's cache of available packages
+RUN apt-get update && apt-get install -y \
+    build-essential
+
+# Install Rust/Cargo via rustup
+ARG RUST_ROOT=/usr/.cargo
+RUN RUSTUP_HOME=$RUST_ROOT CARGO_HOME=$RUST_ROOT bash -c \
+    'curl --proto "=https" -sSf https://sh.rustup.rs | sh -s -- --default-toolchain 1.79.0 -y'
+ENV RUSTUP_HOME=$RUST_ROOT
+ENV PATH $PATH:$RUST_ROOT/bin
+
+# Copy watchdog source into /watchdog
+WORKDIR /watchdog
+COPY watchdog/ ./
+
+# Build from within /watchdog
+RUN cargo build --release
+
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+ARG image_version
+RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf
+
+ENV DEBIAN_FRONTEND=noninteractive
+ENV IMAGE_VERSION=$image_version
+
+RUN apt-get update
+
+# Copy supervisord.conf into final stage
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+
+# Copy the compiled Rust binary from the builder stage
+COPY --from=builder /watchdog/target/release/watchdog /usr/bin/auditd_watchdog
+RUN chmod +x /usr/bin/auditd_watchdog
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/dockers/docker-auditd-watchdog/supervisord.conf b/dockers/docker-auditd-watchdog/supervisord.conf
new file mode 100644
index 00000000000..e49ec9ef41c
--- /dev/null
+++ b/dockers/docker-auditd-watchdog/supervisord.conf
@@ -0,0 +1,37 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=unexpected
+stdout_logfile=NONE
+stdout_syslog=true
+stderr_logfile=NONE
+stderr_syslog=true
+dependent_startup=true
+
+[program:auditd_watchdog]
+command=/usr/bin/auditd_watchdog
+priority=3
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=NONE
+stdout_syslog=true
+stderr_logfile=NONE
+stderr_syslog=true
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
diff --git a/dockers/docker-auditd-watchdog/watchdog/Cargo.lock b/dockers/docker-auditd-watchdog/watchdog/Cargo.lock
new file mode 100644
index 00000000000..a1c0c6691e3
--- /dev/null
+++ b/dockers/docker-auditd-watchdog/watchdog/Cargo.lock
@@ -0,0 +1,7 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 4
+
+[[package]]
+name = "watchdog"
+version = "0.1.0"
diff --git a/dockers/docker-auditd-watchdog/watchdog/Cargo.toml b/dockers/docker-auditd-watchdog/watchdog/Cargo.toml
new file mode 100644
index 00000000000..ddae59f5b95
--- /dev/null
+++ b/dockers/docker-auditd-watchdog/watchdog/Cargo.toml
@@ -0,0 +1,6 @@
+[package]
+name = "watchdog"
+version = "0.1.0"
+edition = "2021"
+
+[dependencies]
diff --git a/dockers/docker-auditd-watchdog/watchdog/Makefile b/dockers/docker-auditd-watchdog/watchdog/Makefile
new file mode 100644
index 00000000000..ff44e8686b4
--- /dev/null
+++ b/dockers/docker-auditd-watchdog/watchdog/Makefile
@@ -0,0 +1,27 @@
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -e
+
+#
+# Debug build targets
+#
+build:
+	cargo build --all
+
+test:
+	cargo test --all
+
+clean:
+	cargo clean
+
+#
+# Release build targets
+#
+build-release:
+	cargo build --release --all
+
+test-release:
+	cargo test --release --all
+
+clean-release:
+	cargo clean --release
diff --git a/dockers/docker-auditd-watchdog/watchdog/debian/changelog b/dockers/docker-auditd-watchdog/watchdog/debian/changelog
new file mode 100644
index 00000000000..fc0271a5234
--- /dev/null
+++ b/dockers/docker-auditd-watchdog/watchdog/debian/changelog
@@ -0,0 +1,5 @@
+sonic (1.0.0) stable; urgency=medium
+
+  * Initial release
+
+ -- Mai Bui <maibui@microsoft.com>  Fri, 28 Feb 2025 03:13:12 +0000
diff --git a/dockers/docker-auditd-watchdog/watchdog/debian/compat b/dockers/docker-auditd-watchdog/watchdog/debian/compat
new file mode 100644
index 00000000000..9d607966b72
--- /dev/null
+++ b/dockers/docker-auditd-watchdog/watchdog/debian/compat
@@ -0,0 +1 @@
+11
\ No newline at end of file
diff --git a/dockers/docker-auditd-watchdog/watchdog/debian/control b/dockers/docker-auditd-watchdog/watchdog/debian/control
new file mode 100644
index 00000000000..174e52856bd
--- /dev/null
+++ b/dockers/docker-auditd-watchdog/watchdog/debian/control
@@ -0,0 +1,9 @@
+Source: sonic
+Maintainer: Mai Bui <maibui@microsoft.com>
+Section: net
+Priority: optional
+Standards-Version: 1.0.0
+
+Package: sonic-auditd-watchdog
+Architecture: any
+Description: auditd watchdog for KubeSONiC project
diff --git a/dockers/docker-auditd-watchdog/watchdog/debian/install b/dockers/docker-auditd-watchdog/watchdog/debian/install
new file mode 100644
index 00000000000..8f7777470ba
--- /dev/null
+++ b/dockers/docker-auditd-watchdog/watchdog/debian/install
@@ -0,0 +1 @@
+target/release/watchdog /usr/bin
diff --git a/dockers/docker-auditd-watchdog/watchdog/debian/rules b/dockers/docker-auditd-watchdog/watchdog/debian/rules
new file mode 100755
index 00000000000..0ecfaac60f9
--- /dev/null
+++ b/dockers/docker-auditd-watchdog/watchdog/debian/rules
@@ -0,0 +1,17 @@
+#!/usr/bin/make -f
+# See debhelper(7) (uncomment to enable)
+# output every command that modifies files on the build system.
+#export DH_VERBOSE = 1
+
+%:
+	dh $@
+
+override_dh_auto_build:
+	cargo build --release --all
+
+override_dh_auto_clean:
+	cargo clean --release
+
+override_dh_auto_test:
+	# do nothing
+	:
diff --git a/dockers/docker-auditd-watchdog/watchdog/src/main.rs b/dockers/docker-auditd-watchdog/watchdog/src/main.rs
new file mode 100644
index 00000000000..81e2c25f47b
--- /dev/null
+++ b/dockers/docker-auditd-watchdog/watchdog/src/main.rs
@@ -0,0 +1,189 @@
+use std::io::{Read, Write};
+use std::net::TcpListener;
+use std::process::Command;
+
+static NSENTER_CMD: &str = "nsenter --target 1 --pid --mount --uts --ipc --net";
+
+// Helper to run commands
+fn run_command(cmd: &str) -> Result<String, String> {
+    let output = Command::new("sh")
+        .arg("-c")
+        .arg(cmd)
+        .output()
+        .map_err(|e| format!("Failed to spawn command '{}': {}", cmd, e))?;
+
+    if !output.status.success() {
+        return Err(format!(
+            "Command '{}' failed with status {}: {}",
+            cmd,
+            output.status.code().map_or("unknown".to_string(), |c| c.to_string()),
+            String::from_utf8_lossy(&output.stderr)
+        ));
+    }
+    Ok(String::from_utf8_lossy(&output.stdout).to_string())
+}
+
+// Check auditd.conf sha1sum
+fn check_auditd_conf() -> String {
+    let cmd = format!(r#"{NSENTER_CMD} cat /etc/audit/auditd.conf | sha1sum"#);
+    match run_command(&cmd) {
+        Ok(s) => {
+            if s.contains("7cdbd1450570c7c12bdc67115b46d9ae778cbd76") {
+                "OK".to_string()
+            } else {
+                format!("FAIL (sha1 = {})", s.trim())
+            }
+        }
+        Err(e) => format!("FAIL ({})", e),
+    }
+}
+
+// Check syslog.conf
+fn check_syslog_conf() -> String {
+    let cmd = format!(r#"{NSENTER_CMD} grep '^active = yes' /etc/audit/plugins.d/syslog.conf"#);
+    match run_command(&cmd) {
+        Ok(_) => "OK".to_string(),
+        Err(e) => format!("FAIL (syslog.conf does not contain 'active = yes': {})", e),
+    }
+}
+
+// Check auditd rules sha1, depends on HW SKU
+// - If HW SKU contains "Nokia-7215" or "Nokia-M0-7215", expect 65a4379b1401159cf2699f34a2a014f1b50c021d
+// - Otherwise expect 317040ff8516bd74f97e5f5570834955f52c28b6
+fn check_auditd_rules() -> String {
+    // Get HW SKU
+    let hwsku_cmd = format!(r#"{NSENTER_CMD} sonic-cfggen -d -v DEVICE_METADATA.localhost.hwsku"#);
+    let hwsku = match run_command(&hwsku_cmd) {
+        Ok(s) => s.trim().to_string(),
+        Err(e) => return format!("FAIL (could not get HW SKU: {})", e),
+    };
+
+    let expected = if hwsku.contains("Nokia-7215") || hwsku.contains("Nokia-M0-7215") {
+        "bd574779fb4e1116838d18346187bb7f7bd089c9"
+    } else {
+        "f88174f901ec8709bacaf325158f10ec62909d13"
+    };
+
+    let cmd = format!(
+        r#"{NSENTER_CMD} find /etc/audit/rules.d -type f -name "[0-9][0-9]-*.rules" \
+            ! -name "30-audisp-tacplus.rules" -exec cat {{}} + | sort | sha1sum"#
+    );
+
+    match run_command(&cmd) {
+        Ok(s) => {
+            if s.contains(expected) {
+                "OK".to_string()
+            } else {
+                format!("FAIL (rules sha1 = {}, expected {})", s.trim(), expected)
+            }
+        }
+        Err(e) => format!("FAIL ({})", e),
+    }
+}
+
+// Check auditd.service
+fn check_auditd_service() -> String {
+    let cmd = format!(r#"{NSENTER_CMD} grep '^CPUQuota=10%' /lib/systemd/system/auditd.service"#);
+    match run_command(&cmd) {
+        Ok(_) => "OK".to_string(),
+        Err(e) => format!("FAIL (auditd.service does not contain 'CPUQuota=10%': {})", e),
+    }
+}
+
+// Check that auditd is active
+fn check_auditd_active() -> String {
+    let cmd = format!(r#"{NSENTER_CMD} systemctl is-active auditd"#);
+    match run_command(&cmd) {
+        Ok(s) => {
+            let trimmed = s.trim();
+            if trimmed == "active" {
+                "OK".to_string()
+            } else {
+                format!("FAIL (auditd status = {})", trimmed)
+            }
+        }
+        Err(e) => format!("FAIL ({})", e),
+    }
+}
+
+// Check reload auditd rules
+fn check_auditd_reload_status() -> String {
+    let cmd = format!(r#"{NSENTER_CMD} auditctl -R /etc/audit/audit.rules"#);
+    match run_command(&cmd) {
+        Ok(_) => "OK".to_string(),
+        Err(e) => format!("FAIL (error message = {})", e),
+    }
+}
+
+fn main() {
+    // Start a HTTP server listening on port 50058
+    let listener = TcpListener::bind("127.0.0.1:50058")
+        .expect("Failed to bind to 127.0.0.1:50058");
+
+    println!("Watchdog HTTP server running on http://127.0.0.1:50058");
+
+    for stream_result in listener.incoming() {
+        match stream_result {
+            Ok(mut stream) => {
+                let mut buffer = [0_u8; 512];
+                if let Ok(bytes_read) = stream.read(&mut buffer) {
+                    let req_str = String::from_utf8_lossy(&buffer[..bytes_read]);
+                    println!("Received request: {}", req_str);
+                }
+
+                let conf_result      = check_auditd_conf();
+                let syslog_result    = check_syslog_conf();
+                let rules_result     = check_auditd_rules();
+                let srvc_result      = check_auditd_service();
+                let srvc_active      = check_auditd_active();
+                let reload_result    = check_auditd_reload_status();
+
+                // Build a JSON object
+                let json_body = format!(
+                    r#"{{
+  "auditd_conf":"{}",
+  "syslog_conf":"{}",
+  "auditd_rules":"{}",
+  "auditd_service":"{}",
+  "auditd_active":"{}",
+  "auditd_reload":"{}"
+}}"#,
+                    conf_result,
+                    syslog_result,
+                    rules_result,
+                    srvc_result,
+                    srvc_active,
+                    reload_result
+                );
+
+                // Determine overall status
+                let all_results = vec![
+                    &conf_result,
+                    &syslog_result,
+                    &rules_result,
+                    &srvc_result,
+                    &srvc_active,
+                    &reload_result
+                ];
+                let all_passed = all_results.iter().all(|r| r.starts_with("OK"));
+
+                let (status_line, content_length) = if all_passed {
+                    ("HTTP/1.1 200 OK", json_body.len())
+                } else {
+                    ("HTTP/1.1 500 Internal Server Error", json_body.len())
+                };
+
+                let response = format!(
+                    "{status_line}\r\nContent-Type: application/json\r\nContent-Length: {content_length}\r\n\r\n{json_body}"
+                );
+
+                if let Err(e) = stream.write_all(response.as_bytes()) {
+                    eprintln!("Failed to write response: {}", e);
+                }
+            }
+            Err(e) => {
+                eprintln!("Error accepting connection: {}", e);
+            }
+        }
+    }
+}
diff --git a/dockers/docker-auditd/Dockerfile.j2 b/dockers/docker-auditd/Dockerfile.j2
new file mode 100644
index 00000000000..2d6d2b95072
--- /dev/null
+++ b/dockers/docker-auditd/Dockerfile.j2
@@ -0,0 +1,22 @@
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+ARG image_version
+RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf
+
+# Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+# Pass the image_version to container
+ENV IMAGE_VERSION=$image_version
+
+# Update apt's cache of available packages
+RUN apt-get update
+
+COPY ["config_checker.py", "/usr/bin/"]
+COPY ["auditd_config_files/", "/usr/share/sonic/auditd_config_files/"]
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+
+RUN chmod +x /usr/bin/config_checker.py
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/dockers/docker-auditd/auditd_config_files/30-audisp-tacplus.rules b/dockers/docker-auditd/auditd_config_files/30-audisp-tacplus.rules
new file mode 100644
index 00000000000..573638a5832
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/30-audisp-tacplus.rules
@@ -0,0 +1,47 @@
+# This file contains the auditctl rules that are loaded
+# whenever the audit daemon is started via the initscripts.
+# The rules are simply the parameters that would be passed
+# to auditctl.  This file can be loaded with
+#   auditctl -R audisp-tacplus.rules
+# In debian wheezy, it can be installed in /etc/audisp/plugins.d 
+# and it will be loaded when audispd starts.
+# In debian jessie, it needs to be installed into /etc/auditd/rules.d
+# and then run the augenrules program.  This package assumes jessie,
+# and installs into the jessie location, and attempts to run augenrules
+# in the postinst
+
+# Do not use -D in this file!  This file is loaded after
+# auditd.rules
+
+# The following rules are for TACACS+ accounting with audisp-tacplus
+# don't write audit records for process where auid isn't set (-1), or for
+# "system" uids, including "cumulus"
+# We want to catch exec and exit for the start and stop accounting
+
+# Use the "tacplus" key for ease of use with ausearch, etc.
+# We assume here that user 1000 is the first local user, and therefore
+# should not be looked up for tacacs.  You may need to change this for
+# your local configuration
+-a always,exit -F arch=b32 -S execve -S exit -S exit_group -F auid>1000 -F auid!=4294967295 -k tacplus
+-a always,exit -F arch=b64 -S execve -S exit -S exit_group -F auid>1000 -F auid!=4294967295 -k tacplus
+
+# In newer distributions (such as debian jessie), a number of auditing events
+# are logged by default even after the -D initialization.  If you are using
+# auditing only for TACACS+ accounting, you may want to include the rules below, to
+# reduce the growth of the audit log.  EXECVE is needed in order to get the args
+# to the exec syscall so we can send them to accounting.
+
+-a exclude,always -F msgtype=CRED_ACQ
+-a exclude,always -F msgtype=CRED_DISP
+-a exclude,always -F msgtype=CRED_REFR
+-a exclude,always -F msgtype=CWD
+-a exclude,always -F msgtype=LOGIN
+-a exclude,always -F msgtype=PATH
+-a exclude,always -F msgtype=PROCTITLE
+-a exclude,always -F msgtype=SERVICE_START
+-a exclude,always -F msgtype=SERVICE_STOP
+-a exclude,always -F msgtype=USER_ACCT
+-a exclude,always -F msgtype=USER_AUTH
+-a exclude,always -F msgtype=USER_CMD
+-a exclude,always -F msgtype=USER_END
+-a exclude,always -F msgtype=USER_START
diff --git a/dockers/docker-auditd/auditd_config_files/31-file_deletion.rules b/dockers/docker-auditd/auditd_config_files/31-file_deletion.rules
new file mode 100644
index 00000000000..ce32ba4caa0
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/31-file_deletion.rules
@@ -0,0 +1,2 @@
+-a always,exit -F arch=b64 -S unlink -S unlinkat -F auid>=1000 -F auid!=4294967295 -F key=file_deletion
+-a always,exit -F arch=b32 -S unlink -S unlinkat -F auid>=1000 -F auid!=4294967295 -F key=file_deletion
diff --git a/dockers/docker-auditd/auditd_config_files/31-process_audit.rules b/dockers/docker-auditd/auditd_config_files/31-process_audit.rules
new file mode 100644
index 00000000000..54e70f438cd
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/31-process_audit.rules
@@ -0,0 +1,2 @@
+-a always,exit -F arch=b64 -S execve -F auid>=1000 -F auid!=4294967295 -F key=process_audit
+-a always,exit -F arch=b32 -S execve -F auid>=1000 -F auid!=4294967295 -F key=process_audit
diff --git a/dockers/docker-auditd/auditd_config_files/31-user_group_management.rules b/dockers/docker-auditd/auditd_config_files/31-user_group_management.rules
new file mode 100644
index 00000000000..eaa436e4594
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/31-user_group_management.rules
@@ -0,0 +1,2 @@
+-a always,exit -F arch=b64 -S setuid,setresuid,setreuid,setfsuid,setgid,setresgid,setregid,setfsgid -F auid>=1000 -F auid!=4294967295 -F key=user_group_management
+-a always,exit -F arch=b32 -S setuid,setresuid,setreuid,setfsuid,setgid,setresgid,setregid,setfsgid -F auid>=1000 -F auid!=4294967295 -F key=user_group_management
diff --git a/dockers/docker-auditd/auditd_config_files/32-auth_logs.rules b/dockers/docker-auditd/auditd_config_files/32-auth_logs.rules
new file mode 100644
index 00000000000..1ace310e54a
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-auth_logs.rules
@@ -0,0 +1 @@
+-w /var/log/auth.log -p wa -F auid>=1000 -F auid!=4294967295 -k auth_logs
diff --git a/dockers/docker-auditd/auditd_config_files/32-bin_changes.rules b/dockers/docker-auditd/auditd_config_files/32-bin_changes.rules
new file mode 100644
index 00000000000..83f4fff4d04
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-bin_changes.rules
@@ -0,0 +1 @@
+-w /bin -p wa -F auid>=1000 -F auid!=4294967295 -k bin_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-cron_changes.rules b/dockers/docker-auditd/auditd_config_files/32-cron_changes.rules
new file mode 100644
index 00000000000..ec4b78d1167
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-cron_changes.rules
@@ -0,0 +1,6 @@
+-w /etc/crontab -p wa -F auid>=1000 -F auid!=4294967295 -k cron_changes
+-w /etc/cron.d -p wa -F auid>=1000 -F auid!=4294967295 -k cron_changes
+-w /etc/cron.daily -p wa -F auid>=1000 -F auid!=4294967295 -k cron_changes
+-w /etc/cron.hourly -p wa -F auid>=1000 -F auid!=4294967295 -k cron_changes
+-w /etc/cron.weekly -p wa -F auid>=1000 -F auid!=4294967295 -k cron_changes
+-w /etc/cron.monthly -p wa -F auid>=1000 -F auid!=4294967295 -k cron_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-dns_changes.rules b/dockers/docker-auditd/auditd_config_files/32-dns_changes.rules
new file mode 100644
index 00000000000..84bc075a614
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-dns_changes.rules
@@ -0,0 +1 @@
+-w /etc/resolv.conf -p wa -F auid>=1000 -F auid!=4294967295 -k dns_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-docker_commands.rules b/dockers/docker-auditd/auditd_config_files/32-docker_commands.rules
new file mode 100644
index 00000000000..90ef1d84a9a
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-docker_commands.rules
@@ -0,0 +1 @@
+-a always,exit -F arch=b64 -S execve -F path=/usr/bin/docker -F auid>=1000 -F auid!=4294967295 -k docker_commands
diff --git a/dockers/docker-auditd/auditd_config_files/32-docker_config.rules b/dockers/docker-auditd/auditd_config_files/32-docker_config.rules
new file mode 100644
index 00000000000..955747725dd
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-docker_config.rules
@@ -0,0 +1 @@
+-w /etc/docker/daemon.json -p wa -F auid>=1000 -F auid!=4294967295 -k docker_config
diff --git a/dockers/docker-auditd/auditd_config_files/32-docker_daemon.rules b/dockers/docker-auditd/auditd_config_files/32-docker_daemon.rules
new file mode 100644
index 00000000000..5f6f3821d1c
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-docker_daemon.rules
@@ -0,0 +1 @@
+-w /usr/bin/dockerd -p wa -F auid>=1000 -F auid!=4294967295 -k docker_daemon
diff --git a/dockers/docker-auditd/auditd_config_files/32-docker_service.rules b/dockers/docker-auditd/auditd_config_files/32-docker_service.rules
new file mode 100644
index 00000000000..c021f69d47f
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-docker_service.rules
@@ -0,0 +1 @@
+-w /lib/systemd/system/docker.service -p wa -F auid>=1000 -F auid!=4294967295 -k docker_service
diff --git a/dockers/docker-auditd/auditd_config_files/32-docker_socket.rules b/dockers/docker-auditd/auditd_config_files/32-docker_socket.rules
new file mode 100644
index 00000000000..0adcc658d16
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-docker_socket.rules
@@ -0,0 +1 @@
+-w /lib/systemd/system/docker.socket -p wa -F auid>=1000 -F auid!=4294967295 -k docker_socket
diff --git a/dockers/docker-auditd/auditd_config_files/32-docker_storage.rules b/dockers/docker-auditd/auditd_config_files/32-docker_storage.rules
new file mode 100644
index 00000000000..f169b54fd82
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-docker_storage.rules
@@ -0,0 +1 @@
+-w /var/lib/docker/ -p wa -F auid>=1000 -F auid!=4294967295 -k docker_storage
diff --git a/dockers/docker-auditd/auditd_config_files/32-group_changes.rules b/dockers/docker-auditd/auditd_config_files/32-group_changes.rules
new file mode 100644
index 00000000000..3c5c70b075c
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-group_changes.rules
@@ -0,0 +1 @@
+-w /etc/group -p wa -F auid>=1000 -F auid!=4294967295 -k group_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-hosts_changes.rules b/dockers/docker-auditd/auditd_config_files/32-hosts_changes.rules
new file mode 100644
index 00000000000..19a1206187d
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-hosts_changes.rules
@@ -0,0 +1 @@
+-w /etc/hosts -p wa -F auid>=1000 -F auid!=4294967295 -k hosts_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-log_changes.rules b/dockers/docker-auditd/auditd_config_files/32-log_changes.rules
new file mode 100644
index 00000000000..8997a43ae8d
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-log_changes.rules
@@ -0,0 +1,2 @@
+-w /var/log -p wa -F auid>=1000 -F auid!=4294967295 -k log_changes
+-w /var/log.tmpfs -p wa -F auid>=1000 -F auid!=4294967295 -k log_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-modules_changes.rules b/dockers/docker-auditd/auditd_config_files/32-modules_changes.rules
new file mode 100644
index 00000000000..2b5e06613c7
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-modules_changes.rules
@@ -0,0 +1,3 @@
+-w /sbin/insmod -p x -F auid>=1000 -F auid!=4294967295 -k modules_changes
+-w /sbin/rmmod -p x -F auid>=1000 -F auid!=4294967295 -k modules_changes
+-w /sbin/modprobe -p x -F auid>=1000 -F auid!=4294967295 -k modules_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-passwd_changes.rules b/dockers/docker-auditd/auditd_config_files/32-passwd_changes.rules
new file mode 100644
index 00000000000..0415ca8725d
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-passwd_changes.rules
@@ -0,0 +1 @@
+-w /etc/passwd -p wa -F auid>=1000 -F auid!=4294967295 -k passwd_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-sbin_changes.rules b/dockers/docker-auditd/auditd_config_files/32-sbin_changes.rules
new file mode 100644
index 00000000000..b1861d3001e
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-sbin_changes.rules
@@ -0,0 +1 @@
+-w /sbin -p wa -F auid>=1000 -F auid!=4294967295 -k sbin_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-shadow_changes.rules b/dockers/docker-auditd/auditd_config_files/32-shadow_changes.rules
new file mode 100644
index 00000000000..5c34f55a1dc
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-shadow_changes.rules
@@ -0,0 +1 @@
+-w /etc/shadow -p wa -F auid>=1000 -F auid!=4294967295 -k shadow_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-shutdown_reboot.rules b/dockers/docker-auditd/auditd_config_files/32-shutdown_reboot.rules
new file mode 100644
index 00000000000..360e1b64d0b
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-shutdown_reboot.rules
@@ -0,0 +1 @@
+-w /var/log/wtmp -p wa -F auid>=1000 -F auid!=4294967295 -k shutdown_reboot
diff --git a/dockers/docker-auditd/auditd_config_files/32-sudoers_changes.rules b/dockers/docker-auditd/auditd_config_files/32-sudoers_changes.rules
new file mode 100644
index 00000000000..859c53af279
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-sudoers_changes.rules
@@ -0,0 +1 @@
+-w /etc/sudoers -p wa -F auid>=1000 -F auid!=4294967295 -k sudoers_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-time_changes.rules b/dockers/docker-auditd/auditd_config_files/32-time_changes.rules
new file mode 100644
index 00000000000..6dd41892c0d
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-time_changes.rules
@@ -0,0 +1 @@
+-w /etc/localtime -p wa -F auid>=1000 -F auid!=4294967295 -k time_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-usr_bin_changes.rules b/dockers/docker-auditd/auditd_config_files/32-usr_bin_changes.rules
new file mode 100644
index 00000000000..2cb1d7f2cc2
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-usr_bin_changes.rules
@@ -0,0 +1 @@
+-w /usr/bin -p wa -F auid>=1000 -F auid!=4294967295 -k usr_bin_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32-usr_sbin_changes.rules b/dockers/docker-auditd/auditd_config_files/32-usr_sbin_changes.rules
new file mode 100644
index 00000000000..f2426b88cd8
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32-usr_sbin_changes.rules
@@ -0,0 +1 @@
+-w /usr/sbin -p wa -F auid>=1000 -F auid!=4294967295 -k usr_sbin_changes
diff --git a/dockers/docker-auditd/auditd_config_files/32bit/30-audisp-tacplus.rules b/dockers/docker-auditd/auditd_config_files/32bit/30-audisp-tacplus.rules
new file mode 100644
index 00000000000..403e172ac41
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32bit/30-audisp-tacplus.rules
@@ -0,0 +1,47 @@
+# This file contains the auditctl rules that are loaded
+# whenever the audit daemon is started via the initscripts.
+# The rules are simply the parameters that would be passed
+# to auditctl.  This file can be loaded with
+#   auditctl -R audisp-tacplus.rules
+# In debian wheezy, it can be installed in /etc/audisp/plugins.d 
+# and it will be loaded when audispd starts.
+# In debian jessie, it needs to be installed into /etc/auditd/rules.d
+# and then run the augenrules program.  This package assumes jessie,
+# and installs into the jessie location, and attempts to run augenrules
+# in the postinst
+
+# Do not use -D in this file!  This file is loaded after
+# auditd.rules
+
+# The following rules are for TACACS+ accounting with audisp-tacplus
+# don't write audit records for process where auid isn't set (-1), or for
+# "system" uids, including "cumulus"
+# We want to catch exec and exit for the start and stop accounting
+
+# Use the "tacplus" key for ease of use with ausearch, etc.
+# We assume here that user 1000 is the first local user, and therefore
+# should not be looked up for tacacs.  You may need to change this for
+# your local configuration
+-a always,exit -F arch=b32 -S execve -S exit -S exit_group -F auid>1000 -F auid!=4294967295 -k tacplus
+# No 64bit support -a always,exit -F arch=b64 -S execve -S exit -S exit_group -F auid>1000 -F auid!=4294967295 -k tacplus
+
+# In newer distributions (such as debian jessie), a number of auditing events
+# are logged by default even after the -D initialization.  If you are using
+# auditing only for TACACS+ accounting, you may want to include the rules below, to
+# reduce the growth of the audit log.  EXECVE is needed in order to get the args
+# to the exec syscall so we can send them to accounting.
+
+-a exclude,always -F msgtype=CRED_ACQ
+-a exclude,always -F msgtype=CRED_DISP
+-a exclude,always -F msgtype=CRED_REFR
+-a exclude,always -F msgtype=CWD
+-a exclude,always -F msgtype=LOGIN
+-a exclude,always -F msgtype=PATH
+-a exclude,always -F msgtype=PROCTITLE
+-a exclude,always -F msgtype=SERVICE_START
+-a exclude,always -F msgtype=SERVICE_STOP
+-a exclude,always -F msgtype=USER_ACCT
+-a exclude,always -F msgtype=USER_AUTH
+-a exclude,always -F msgtype=USER_CMD
+-a exclude,always -F msgtype=USER_END
+-a exclude,always -F msgtype=USER_START
diff --git a/dockers/docker-auditd/auditd_config_files/32bit/31-file_deletion.rules b/dockers/docker-auditd/auditd_config_files/32bit/31-file_deletion.rules
new file mode 100644
index 00000000000..4bf6f8f7d0a
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32bit/31-file_deletion.rules
@@ -0,0 +1 @@
+-a always,exit -F arch=b32 -S unlink -S unlinkat -F auid>=1000 -F auid!=4294967295 -F key=file_deletion
diff --git a/dockers/docker-auditd/auditd_config_files/32bit/31-process_audit.rules b/dockers/docker-auditd/auditd_config_files/32bit/31-process_audit.rules
new file mode 100644
index 00000000000..c1a66e36fe9
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32bit/31-process_audit.rules
@@ -0,0 +1 @@
+-a always,exit -F arch=b32 -S execve -F auid>=1000 -F auid!=4294967295 -F key=process_audit
diff --git a/dockers/docker-auditd/auditd_config_files/32bit/31-user_group_management.rules b/dockers/docker-auditd/auditd_config_files/32bit/31-user_group_management.rules
new file mode 100644
index 00000000000..478ac7e153d
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32bit/31-user_group_management.rules
@@ -0,0 +1 @@
+-a always,exit -F arch=b32 -S setuid,setresuid,setreuid,setfsuid,setgid,setresgid,setregid,setfsgid -F auid>=1000 -F auid!=4294967295 -F key=user_group_management
diff --git a/dockers/docker-auditd/auditd_config_files/32bit/32-docker_commands.rules b/dockers/docker-auditd/auditd_config_files/32bit/32-docker_commands.rules
new file mode 100644
index 00000000000..6e2f91825b3
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/32bit/32-docker_commands.rules
@@ -0,0 +1 @@
+-a always,exit -F arch=b32 -S execve -F path=/usr/bin/docker -F auid>=1000 -F auid!=4294967295 -k docker_commands
diff --git a/dockers/docker-auditd/auditd_config_files/39-exclusions.rules b/dockers/docker-auditd/auditd_config_files/39-exclusions.rules
new file mode 100644
index 00000000000..51fd3cc215d
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/39-exclusions.rules
@@ -0,0 +1,3 @@
+-a always,exclude -F msgtype=EOE
+-a always,exclude -F msgtype=EXECVE
+-a always,exclude -F msgtype=PATH -F auid<1000
diff --git a/dockers/docker-auditd/auditd_config_files/audit.rules b/dockers/docker-auditd/auditd_config_files/audit.rules
new file mode 100644
index 00000000000..95537b5583b
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/audit.rules
@@ -0,0 +1,15 @@
+## First rule - delete all
+-D
+
+## Increase the buffers to survive stress events.
+## Make this bigger for busy systems
+-b 8192
+
+## This determine how long to wait in burst of events
+--backlog_wait_time 60000
+
+## Set failure mode to syslog
+-f 1
+
+## Set auditd rate limit
+-r 100
diff --git a/dockers/docker-auditd/auditd_config_files/auditd.conf b/dockers/docker-auditd/auditd_config_files/auditd.conf
new file mode 100644
index 00000000000..537ff823b3d
--- /dev/null
+++ b/dockers/docker-auditd/auditd_config_files/auditd.conf
@@ -0,0 +1,39 @@
+#
+# This file controls the configuration of the audit daemon
+#
+
+local_events = yes
+write_logs = no
+log_file = /var/log/audit/audit.log
+log_group = adm
+log_format = ENRICHED
+flush = INCREMENTAL_ASYNC
+freq = 50
+max_log_file = 8
+num_logs = 5
+priority_boost = 4
+name_format = NONE
+##name = mydomain
+max_log_file_action = SYSLOG
+space_left = 75
+space_left_action = SYSLOG
+verify_email = yes
+action_mail_acct = root
+admin_space_left = 50
+admin_space_left_action = SYSLOG
+disk_full_action = SYSLOG
+disk_error_action = SYSLOG
+use_libwrap = yes
+##tcp_listen_port = 60
+tcp_listen_queue = 5
+tcp_max_per_addr = 1
+##tcp_client_ports = 1024-65535
+tcp_client_max_idle = 0
+transport = TCP
+krb5_principal = auditd
+##krb5_key_file = /etc/audit/audit.key
+distribute_network = no
+q_depth = 400
+overflow_action = SYSLOG
+max_restarts = 10
+plugin_dir = /etc/audit/plugins.d
diff --git a/dockers/docker-auditd/config_checker.py b/dockers/docker-auditd/config_checker.py
new file mode 100644
index 00000000000..2a6e7504419
--- /dev/null
+++ b/dockers/docker-auditd/config_checker.py
@@ -0,0 +1,107 @@
+#!/usr/bin/env python3
+
+import json
+import subprocess
+from sonic_py_common import logger as log
+
+logger = log.Logger()
+
+
+RULES_DIR = "/etc/audit/rules.d/"
+SYSLOG_CONF = "/etc/audit/plugins.d/syslog.conf"
+AUDIT_CONF = "/etc/audit/auditd.conf"
+AUDIT_SERVICE = "/lib/systemd/system/auditd.service"
+CONFIG_FILES = "/usr/share/sonic/auditd_config_files/"
+
+RULES_HASH_CMD = r"""find {} -type f -name "[0-9][0-9]-*.rules" \
+! -name "30-audisp-tacplus.rules" \
+-exec cat {{}} + | \
+sort | \
+sha1sum""".format(RULES_DIR)
+AUDIT_CONF_HASH_CMD = "cat {} | sha1sum".format(AUDIT_CONF)
+
+
+def run_command(cmd):
+    p = subprocess.Popen(cmd,
+                         text=True,
+                         shell=True, # nosemgrep
+                         executable='/bin/bash',
+                         stdout=subprocess.PIPE,
+                         stderr=subprocess.PIPE)
+    output, error = p.communicate()
+    if p.returncode == 0:
+        return p.returncode, output
+    return p.returncode, error
+
+
+def get_hwsku():
+    with open("/etc/sonic/config_db.json") as fp:
+        config_db = json.load(fp)
+    if "DEVICE_METADATA" in config_db and "hwsku" in config_db["DEVICE_METADATA"]["localhost"]:
+        return str(config_db['DEVICE_METADATA']['localhost']['hwsku'])
+    return None
+
+
+def is_auditd_rules_configured():
+    EXPECTED_HASH = "f88174f901ec8709bacaf325158f10ec62909d13"
+    NOKIA_EXPECTED_HASH = "bd574779fb4e1116838d18346187bb7f7bd089c9"
+    hwsku = get_hwsku()
+    if "Nokia-7215" in hwsku or "Nokia-M0-7215" in hwsku:
+        EXPECTED_HASH = NOKIA_EXPECTED_HASH
+
+    rc, out = run_command(RULES_HASH_CMD)
+    is_configured = EXPECTED_HASH in out
+    logger.log_info("auditd rules are already configured" if is_configured else "auditd rules are not configured")
+    return is_configured
+
+
+def is_syslog_conf_configured():
+    rc, out = run_command("grep '^active = yes' {}".format(SYSLOG_CONF))
+    is_configured = rc == 0
+    logger.log_info("syslog.conf is already configured" if is_configured else "syslog.conf is not configured")
+    return is_configured
+
+
+def is_auditd_conf_configured():
+    rc, out = run_command(AUDIT_CONF_HASH_CMD)
+    is_configured = "7cdbd1450570c7c12bdc67115b46d9ae778cbd76" in out
+    logger.log_info("auditd.conf is already configured" if is_configured else "auditd.conf is not configured")
+    return is_configured
+
+
+def is_auditd_service_configured():
+    rc, out = run_command("grep '^CPUQuota=10%' {}".format(AUDIT_SERVICE))
+    is_configured = rc == 0
+    logger.log_info("auditd.service is already configured" if is_configured else "auditd.service is not configured")
+    return is_configured
+
+
+def main():
+    is_configured = True
+    hwsku = get_hwsku()
+    if not is_auditd_rules_configured():
+        run_command("rm -f {}/*.rules".format(RULES_DIR))
+        run_command("cp {}/*.rules {}".format(CONFIG_FILES, RULES_DIR))
+        if "Nokia-7215" in hwsku or "Nokia-M0-7215" in hwsku:
+            run_command("cp {}/32bit/*.rules {}".format(CONFIG_FILES, RULES_DIR))
+        is_configured = False
+
+    if not is_syslog_conf_configured():
+        run_command("sed -i 's/^active = no/active = yes/' {}".format(SYSLOG_CONF))
+        is_configured = False
+
+    if not is_auditd_conf_configured():
+        run_command("cp {}/auditd.conf {}".format(CONFIG_FILES, AUDIT_CONF))
+        is_configured = False
+
+    if not is_auditd_service_configured():
+        run_command(r"""sed -i '/\[Service\]/a CPUQuota=10%' {}""".format(AUDIT_SERVICE))
+        is_configured = False
+
+    if not is_configured:
+        run_command("nsenter --target 1 --pid --mount --uts --ipc --net systemctl daemon-reload")
+        run_command("nsenter --target 1 --pid --mount --uts --ipc --net systemctl restart auditd")
+
+
+if __name__ == "__main__":
+    main()
diff --git a/dockers/docker-auditd/supervisord.conf b/dockers/docker-auditd/supervisord.conf
new file mode 100644
index 00000000000..125c15ee17c
--- /dev/null
+++ b/dockers/docker-auditd/supervisord.conf
@@ -0,0 +1,37 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=unexpected
+stdout_logfile=NONE
+stdout_syslog=true
+stderr_logfile=NONE
+stderr_syslog=true
+dependent_startup=true
+
+[program:config_checker]
+command=/usr/bin/config_checker.py
+priority=3
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=NONE
+stdout_syslog=true
+stderr_logfile=NONE
+stderr_syslog=true
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
diff --git a/dockers/docker-base-buster/Dockerfile.j2 b/dockers/docker-base-buster/Dockerfile.j2
index b1940e90d79..28bc424cf36 100644
--- a/dockers/docker-base-buster/Dockerfile.j2
+++ b/dockers/docker-base-buster/Dockerfile.j2
@@ -65,15 +65,15 @@ RUN apt-get update &&        \
 
 # Install redis-tools
 {% if CONFIGURED_ARCH == "armhf" %}
-RUN curl -k -o redis-tools_6.0.6-1~bpo10+1_armhf.deb "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1_bpo10+1_armhf.deb"
+RUN curl -k -o redis-tools_6.0.6-1~bpo10+1_armhf.deb "https://packages.trafficmanager.net/public/redis/redis-tools_6.0.6-1_bpo10+1_armhf.deb"
 RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_armhf.deb || apt-get install -f -y
 RUN rm redis-tools_6.0.6-1~bpo10+1_armhf.deb
 {% elif CONFIGURED_ARCH == "arm64" %}
-RUN curl -o redis-tools_6.0.6-1~bpo10+1_arm64.deb "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1_bpo10+1_arm64.deb"
+RUN curl -o redis-tools_6.0.6-1~bpo10+1_arm64.deb "https://packages.trafficmanager.net/public/redis/redis-tools_6.0.6-1_bpo10+1_arm64.deb"
 RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_arm64.deb || apt-get install -f -y
 RUN rm redis-tools_6.0.6-1~bpo10+1_arm64.deb
 {% else %}
-RUN curl -o redis-tools_6.0.6-1~bpo10+1_amd64.deb "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1~bpo10+1_amd64.deb"
+RUN curl -o redis-tools_6.0.6-1~bpo10+1_amd64.deb "https://packages.trafficmanager.net/public/redis/redis-tools_6.0.6-1~bpo10+1_amd64.deb"
 RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_amd64.deb || apt-get install -f -y
 RUN rm redis-tools_6.0.6-1~bpo10+1_amd64.deb
 {% endif %}
diff --git a/dockers/docker-base-stretch/Dockerfile.j2 b/dockers/docker-base-stretch/Dockerfile.j2
index df1025749cb..3e0145f5d26 100644
--- a/dockers/docker-base-stretch/Dockerfile.j2
+++ b/dockers/docker-base-stretch/Dockerfile.j2
@@ -64,15 +64,15 @@ RUN apt-get -y -t stretch-backports install rsyslog
 # Install redis-tools
 
 {% if CONFIGURED_ARCH == "armhf" %}
-    RUN curl -o  redis-tools_6.0.6-1~bpo10+1_armhf.deb "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1_bpo10+1_armhf.deb"
+    RUN curl -o  redis-tools_6.0.6-1~bpo10+1_armhf.deb "https://packages.trafficmanager.net/public/redis/redis-tools_6.0.6-1_bpo10+1_armhf.deb"
     RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_armhf.deb || apt-get install -f -y
     RUN rm redis-tools_6.0.6-1~bpo10+1_armhf.deb
 {% elif CONFIGURED_ARCH == "arm64" %}
-    RUN curl -o  redis-tools_6.0.6-1~bpo10+1_arm64.deb  "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1_bpo10+1_arm64.deb"
+    RUN curl -o  redis-tools_6.0.6-1~bpo10+1_arm64.deb  "https://packages.trafficmanager.net/public/redis/redis-tools_6.0.6-1_bpo10+1_arm64.deb"
     RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_arm64.deb || apt-get install -f -y
     RUN rm redis-tools_6.0.6-1~bpo10+1_arm64.deb
 {% else %}
-    RUN curl -o redis-tools_6.0.6-1~bpo10+1_amd64.deb "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1~bpo10+1_amd64.deb"
+    RUN curl -o redis-tools_6.0.6-1~bpo10+1_amd64.deb "https://packages.trafficmanager.net/public/redis/redis-tools_6.0.6-1~bpo10+1_amd64.deb"
     RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_amd64.deb || apt-get install -f -y
     RUN rm redis-tools_6.0.6-1~bpo10+1_amd64.deb
 {% endif %}
diff --git a/dockers/docker-bmp-watchdog/Dockerfile.j2 b/dockers/docker-bmp-watchdog/Dockerfile.j2
new file mode 100644
index 00000000000..16397e9d3d8
--- /dev/null
+++ b/dockers/docker-bmp-watchdog/Dockerfile.j2
@@ -0,0 +1,39 @@
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} AS builder
+
+# Update apt's cache of available packages
+RUN apt-get update && apt-get install -y \
+    build-essential
+
+# Install Rust/Cargo via rustup
+ARG RUST_ROOT=/usr/.cargo
+RUN RUSTUP_HOME=$RUST_ROOT CARGO_HOME=$RUST_ROOT bash -c \
+    'curl --proto "=https" -sSf https://sh.rustup.rs | sh -s -- --default-toolchain 1.79.0 -y'
+ENV RUSTUP_HOME=$RUST_ROOT
+ENV PATH $PATH:$RUST_ROOT/bin
+
+# Copy watchdog source into /watchdog
+WORKDIR /watchdog
+COPY watchdog/ ./
+
+# Build from within /watchdog
+RUN cargo build --release
+
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+ARG image_version
+RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf
+
+ENV DEBIAN_FRONTEND=noninteractive
+ENV IMAGE_VERSION=$image_version
+
+RUN apt-get update
+
+# Copy supervisord.conf into final stage
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+
+# Copy the compiled Rust binary from the builder stage
+COPY --from=builder /watchdog/target/release/bmp_watchdog /usr/bin/bmp_watchdog
+RUN chmod +x /usr/bin/bmp_watchdog
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/dockers/docker-bmp-watchdog/supervisord.conf b/dockers/docker-bmp-watchdog/supervisord.conf
new file mode 100644
index 00000000000..f6dab37e85e
--- /dev/null
+++ b/dockers/docker-bmp-watchdog/supervisord.conf
@@ -0,0 +1,37 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=unexpected
+stdout_logfile=NONE
+stdout_syslog=true
+stderr_logfile=NONE
+stderr_syslog=true
+dependent_startup=true
+
+[program:bmp_watchdog]
+command=/usr/bin/bmp_watchdog
+priority=3
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=NONE
+stdout_syslog=true
+stderr_logfile=NONE
+stderr_syslog=true
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
diff --git a/dockers/docker-bmp-watchdog/watchdog/Cargo.lock b/dockers/docker-bmp-watchdog/watchdog/Cargo.lock
new file mode 100644
index 00000000000..32204956daa
--- /dev/null
+++ b/dockers/docker-bmp-watchdog/watchdog/Cargo.lock
@@ -0,0 +1,7 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 4
+
+[[package]]
+name = "watchdog"
+version = "0.1.0"
\ No newline at end of file
diff --git a/dockers/docker-bmp-watchdog/watchdog/Cargo.toml b/dockers/docker-bmp-watchdog/watchdog/Cargo.toml
new file mode 100644
index 00000000000..d4f6b9d9958
--- /dev/null
+++ b/dockers/docker-bmp-watchdog/watchdog/Cargo.toml
@@ -0,0 +1,17 @@
+[package]
+name = "bmp_watchdog"
+version = "0.1.0"
+edition = "2021"
+description = "watchdog for bmp container"
+license = "MIT"
+authors = ["Feng Pan"]
+
+[dependencies]
+daemonize = "0.5"
+chrono = "0.4"
+serde = { version = "1.0", features = ["derive"] }
+serde_json = "1.0"
+
+[[bin]]
+name = "bmp_watchdog"
+path = "src/main.rs"
diff --git a/dockers/docker-bmp-watchdog/watchdog/Makefile b/dockers/docker-bmp-watchdog/watchdog/Makefile
new file mode 100644
index 00000000000..ff44e8686b4
--- /dev/null
+++ b/dockers/docker-bmp-watchdog/watchdog/Makefile
@@ -0,0 +1,27 @@
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -e
+
+#
+# Debug build targets
+#
+build:
+	cargo build --all
+
+test:
+	cargo test --all
+
+clean:
+	cargo clean
+
+#
+# Release build targets
+#
+build-release:
+	cargo build --release --all
+
+test-release:
+	cargo test --release --all
+
+clean-release:
+	cargo clean --release
diff --git a/dockers/docker-bmp-watchdog/watchdog/debian/changelog b/dockers/docker-bmp-watchdog/watchdog/debian/changelog
new file mode 100644
index 00000000000..505e315956b
--- /dev/null
+++ b/dockers/docker-bmp-watchdog/watchdog/debian/changelog
@@ -0,0 +1,5 @@
+sonic (1.0.0) stable; urgency=medium
+
+  * Initial release
+
+ -- Feng Pan <fenpan@microsoft.com>  Tue, 15 Apr 2025 03:13:12 +0000
diff --git a/dockers/docker-bmp-watchdog/watchdog/debian/compat b/dockers/docker-bmp-watchdog/watchdog/debian/compat
new file mode 100644
index 00000000000..9d607966b72
--- /dev/null
+++ b/dockers/docker-bmp-watchdog/watchdog/debian/compat
@@ -0,0 +1 @@
+11
\ No newline at end of file
diff --git a/dockers/docker-bmp-watchdog/watchdog/debian/control b/dockers/docker-bmp-watchdog/watchdog/debian/control
new file mode 100644
index 00000000000..d687c5891ab
--- /dev/null
+++ b/dockers/docker-bmp-watchdog/watchdog/debian/control
@@ -0,0 +1,9 @@
+Source: sonic
+Maintainer: Feng Pan <fenpan@microsoft.com>
+Section: net
+Priority: optional
+Standards-Version: 1.0.0
+
+Package: sonic-bmp-watchdog
+Architecture: any
+Description: bmp watchdog for KubeSONiC project
diff --git a/dockers/docker-bmp-watchdog/watchdog/debian/install b/dockers/docker-bmp-watchdog/watchdog/debian/install
new file mode 100644
index 00000000000..1bd818c8612
--- /dev/null
+++ b/dockers/docker-bmp-watchdog/watchdog/debian/install
@@ -0,0 +1 @@
+target/release/bmp_watchdog /usr/bin
diff --git a/dockers/docker-bmp-watchdog/watchdog/debian/rules b/dockers/docker-bmp-watchdog/watchdog/debian/rules
new file mode 100644
index 00000000000..0ecfaac60f9
--- /dev/null
+++ b/dockers/docker-bmp-watchdog/watchdog/debian/rules
@@ -0,0 +1,17 @@
+#!/usr/bin/make -f
+# See debhelper(7) (uncomment to enable)
+# output every command that modifies files on the build system.
+#export DH_VERBOSE = 1
+
+%:
+	dh $@
+
+override_dh_auto_build:
+	cargo build --release --all
+
+override_dh_auto_clean:
+	cargo clean --release
+
+override_dh_auto_test:
+	# do nothing
+	:
diff --git a/dockers/docker-bmp-watchdog/watchdog/src/main.rs b/dockers/docker-bmp-watchdog/watchdog/src/main.rs
new file mode 100644
index 00000000000..b3129dfb8f8
--- /dev/null
+++ b/dockers/docker-bmp-watchdog/watchdog/src/main.rs
@@ -0,0 +1,88 @@
+use std::io::{BufRead, BufReader, Write};
+use std::net::TcpListener;
+use std::process::Command;
+ 
+use serde::Serialize;
+ 
+#[derive(Serialize)]
+struct HealthStatus {
+    check_bmp_supervisorctl: String,
+    check_bmp_db: String,
+    check_bmp_port: String,
+}
+ 
+fn check_bmp_supervisorctl() -> String {
+    // TODO: Replace with real health check
+    "OK".to_string()
+}
+ 
+fn check_bmp_db() -> String {
+    // TODO: Replace with real health check
+    "OK".to_string()
+}
+ 
+fn check_bmp_port() -> String {
+    // TODO: Replace with real health check
+    "OK".to_string()
+}
+ 
+fn main() {
+    // Start a HTTP server listening on port 50058
+    let listener = TcpListener::bind("127.0.0.1:50058")
+    .expect("Failed to bind to 127.0.0.1:50058");
+
+    println!("Watchdog HTTP server running on http://127.0.0.1:50058");
+
+    for stream_result in listener.incoming() {
+        match stream_result {
+            Ok(mut stream) => {
+                let mut reader = BufReader::new(&stream);
+                let mut request_line = String::new();
+ 
+                if let Ok(_) = reader.read_line(&mut request_line) {
+                    println!("Received request: {}", request_line.trim_end());
+ 
+                    if !request_line.starts_with("GET /") {
+                        let response = "HTTP/1.1 405 Method Not Allowed\r\n\r\n";
+                        stream.write_all(response.as_bytes()).ok();
+                        continue;
+                    }
+ 
+                    let supervisorctl_result = check_bmp_supervisorctl();
+                    let db_result = check_bmp_db();
+                    let port_result = check_bmp_port();
+ 
+                    let status = HealthStatus {
+                        check_bmp_supervisorctl: supervisorctl_result.clone(),
+                        check_bmp_db: db_result.clone(),
+                        check_bmp_port: port_result.clone(),
+                    };
+ 
+                    let json_body = serde_json::to_string(&status).unwrap();
+                    let all_passed = [supervisorctl_result, db_result, port_result]
+                        .iter()
+                        .all(|s| s.starts_with("OK"));
+ 
+                    let status_line = if all_passed {
+                        "HTTP/1.1 200 OK"
+                    } else {
+                        "HTTP/1.1 500 Internal Server Error"
+                    };
+ 
+                    let response = format!(
+                        "{status_line}\r\nContent-Type: application/json\r\nContent-Length: {}\r\n\r\n{}",
+                        json_body.len(),
+                        json_body
+                    );
+ 
+                    if let Err(e) = stream.write_all(response.as_bytes()) {
+                        eprintln!("Failed to write response: {}", e);
+                    }
+                }
+            }
+            Err(e) => {
+                eprintln!("Error accepting connection: {}", e);
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/dockers/docker-config-engine-bullseye/Dockerfile.j2 b/dockers/docker-config-engine-bullseye/Dockerfile.j2
index 700af660a91..f6804de903b 100644
--- a/dockers/docker-config-engine-bullseye/Dockerfile.j2
+++ b/dockers/docker-config-engine-bullseye/Dockerfile.j2
@@ -23,10 +23,6 @@ RUN apt-get install -y        \
 RUN pip3 install pyangbind==0.8.1
 RUN pip3 uninstall -y enum34
 
-# Fix armhf build failure
-# The option --no-build-isolation can be removed when upgrading PyYAML to 6.0.1
-RUN pip3 install PyYAML==5.4.1 --no-build-isolation
-
 # Install python-redis
 RUN pip3 install redis==4.5.4
 
diff --git a/dockers/docker-config-engine-buster/Dockerfile.j2 b/dockers/docker-config-engine-buster/Dockerfile.j2
index cfa61bc0ba8..084956eed5f 100644
--- a/dockers/docker-config-engine-buster/Dockerfile.j2
+++ b/dockers/docker-config-engine-buster/Dockerfile.j2
@@ -23,10 +23,6 @@ RUN apt-get install -y        \
 RUN pip3 install pyangbind==0.8.1
 RUN pip3 uninstall -y enum34
 
-# Fix armhf build failure
-# The option --no-build-isolation can be removed when upgrading PyYAML to 6.0.1
-RUN pip3 install PyYAML==5.4.1 --no-build-isolation
-
 # Install python-redis
 RUN pip3 install redis==4.5.4
 
diff --git a/dockers/docker-dash-ha/Dockerfile.j2 b/dockers/docker-dash-ha/Dockerfile.j2
new file mode 100644
index 00000000000..7b74e79f907
--- /dev/null
+++ b/dockers/docker-dash-ha/Dockerfile.j2
@@ -0,0 +1,27 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
+FROM docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+
+ENV DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update
+
+{% if docker_dash_ha_debs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_dash_ha_debs.split(' '), "/debs/") }}
+
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_dash_ha_debs.split(' ')) }}
+{%- endif %}
+
+RUN apt-get clean -y      && \
+    apt-get autoclean -y  && \
+    apt-get autoremove -y && \
+    rm -rf /debs
+
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
+COPY ["critical_processes", "/etc/supervisor"]
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/dockers/docker-dash-ha/critical_processes b/dockers/docker-dash-ha/critical_processes
new file mode 100644
index 00000000000..9ce0c623138
--- /dev/null
+++ b/dockers/docker-dash-ha/critical_processes
@@ -0,0 +1,2 @@
+program:swbusd
+
diff --git a/dockers/docker-dash-ha/supervisord.conf b/dockers/docker-dash-ha/supervisord.conf
new file mode 100644
index 00000000000..7ab4da0eabf
--- /dev/null
+++ b/dockers/docker-dash-ha/supervisord.conf
@@ -0,0 +1,55 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[eventlistener:supervisor-proc-exit-listener]
+command=/usr/bin/supervisor-proc-exit-listener --container-name dash-ha
+events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING
+autostart=true
+autorestart=unexpected
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=false
+stdout_logfile=NONE
+stdout_syslog=true
+stderr_logfile=NONE
+stderr_syslog=true
+dependent_startup=true
+
+[program:swbusd]
+command=/bin/bash -c 'SLOT=${DEV: -1}; exec /usr/bin/swbusd -s "$SLOT"'
+priority=2
+autostart=false
+autorestart=false
+stdout_logfile=NONE
+stdout_syslog=true
+stderr_logfile=NONE
+stderr_syslog=true
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
+
+;[program:hamgrd]
+;command=/usr/bin/hamgrd
+;priority=4
+;autostart=false
+;autorestart=false
+;stdout_logfile=NONE
+;stdout_syslog=true
+;stderr_logfile=NONE
+;stderr_syslog=true
+;dependent_startup=true
+;dependent_startup_wait_for=swbusd:running
diff --git a/dockers/docker-dhcp-relay/cli-plugin-tests/test_clear_dhcp_relay.py b/dockers/docker-dhcp-relay/cli-plugin-tests/test_clear_dhcp_relay.py
new file mode 100644
index 00000000000..a837258c6f5
--- /dev/null
+++ b/dockers/docker-dhcp-relay/cli-plugin-tests/test_clear_dhcp_relay.py
@@ -0,0 +1,321 @@
+import click
+import pytest
+import os
+import copy
+import json
+import signal
+import fcntl
+import importlib.util
+import psutil
+import re
+import utilities_common.cli as clicommon
+
+from click.testing import CliRunner
+
+from unittest.mock import patch, call, MagicMock, ANY
+original_import_module = importlib.import_module
+
+
+@pytest.fixture(scope="module")
+def patch_import_module():
+    # We need to mock import module because clear_dhcp_relay.py has below import
+    # dhcp6_relay = importlib.import_module('show.plugins.dhcp-relay')
+    # When install current container, sonic-application-extension would move below file to destination in switch
+    # Src: dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
+    # Dst: python-package-patch/show/plugins/dhcp-relay.py
+    # The dst path doesn't exist in UT env, hence we need to mock it
+    fake_dhcp6_relay = MagicMock()
+
+    with patch('importlib.import_module') as mock_import:
+        def side_effect(name):
+            if name == 'show.plugins.dhcp-relay':
+                return fake_dhcp6_relay
+            return original_import_module(name)  # fallback
+
+        mock_import.side_effect = side_effect
+
+        clear_dhcp_relay_path = os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "cli", "clear", "plugins",
+                                                             "clear_dhcp_relay.py"))
+        spec = importlib.util.spec_from_file_location("clear_dhcp_relay", clear_dhcp_relay_path)
+        clear_dhcp_relay = importlib.util.module_from_spec(spec)
+        spec.loader.exec_module(clear_dhcp_relay)
+        yield clear_dhcp_relay
+
+
+def test_plugin_registration(patch_import_module):
+    cli = MagicMock()
+    clear_dhcp_relay = patch_import_module
+    clear_dhcp_relay.register(cli)
+
+
+@pytest.mark.parametrize("interface", [None, "Vlan1000"])
+def test_clear_dhcp_relay_ipv6_counter(interface, patch_import_module):
+    clear_dhcp_relay = patch_import_module
+    gotten_interfaces = ["Ethernet0, Ethernet1"]
+
+    mock_counter = MagicMock()
+    clear_dhcp_relay.dhcp6_relay.DHCPv6_Counter.return_value = mock_counter
+    mock_counter.get_interface.return_value = gotten_interfaces
+    clear_dhcp_relay.clear_dhcp_relay_ipv6_counter(interface)
+    if interface:
+        mock_counter.clear_table.assert_called_once_with(interface)
+    else:
+        calls = [call(intf) for intf in gotten_interfaces]
+        mock_counter.clear_table.assert_has_calls(calls)
+
+
+@pytest.mark.parametrize("test_param_result", [
+    ["", True, True],
+    ["Vlan1000", True, True],
+    ["Vlan1000", False, False]
+])
+def test_is_vlan_interface_valid(patch_import_module, test_param_result):
+    clear_dhcp_relay = patch_import_module
+    mock_db = MagicMock()
+    vlan_interface = test_param_result[0]
+    mock_db.exists.return_value = test_param_result[1]
+    exp_res = test_param_result[2]
+    act_res = clear_dhcp_relay.is_vlan_interface_valid(vlan_interface, mock_db)
+    assert act_res == exp_res, ("Result {} is unexpected with [vlan_interface: {}, exists: {}]"
+                                .format(act_res, vlan_interface, test_param_result[1]))
+
+
+@pytest.mark.parametrize("direction, type, keys, db_dhcp_type, paused_vlans", [
+    (None, None, ["DHCPV4_COUNTER_TABLE:Vlan100:Ethernet1", "DHCPV4_COUNTER_TABLE_Vlan100",
+                             "DHCPV4_COUNTER_TABLE_Vlan1000"], set(["Discover"]), set(["Vlan100"])),
+    ("RX", "Offer", ["DHCPV4_COUNTER_TABLE:Vlan100:Ethernet1", "DHCPV4_COUNTER_TABLE_Vlan100",
+                                "DHCPV4_COUNTER_TABLE_Vlan1000"], set(["Discover", "Offer"]), set(["Vlan100"])),
+    ("TX", "Ack", ["DHCPV4_COUNTER_TABLE:Vlan100:Ethernet1", "DHCPV4_COUNTER_TABLE_Vlan100",
+                              "DHCPV4_COUNTER_TABLE_Vlan1000"], set(["Discover", "Offer"]), set(["Vlan100"])),
+    ("TX", "Ack", ["DHCPV4_COUNTER_TABLE:Vlan100:Ethernet1", "DHCPV4_COUNTER_TABLE_Vlan100",
+                              "DHCPV4_COUNTER_TABLE_Vlan1000"], None, set(["Vlan100"]))
+])
+def test_clear_dhcpv4_db_counters(patch_import_module, direction, type, keys,
+                                  db_dhcp_type, paused_vlans):
+    clear_dhcp_relay = patch_import_module
+    mock_db = MagicMock()
+    directions = [direction] if direction else clear_dhcp_relay.SUPPORTED_DIR
+    types = [type] if type else clear_dhcp_relay.SUPPORTED_DHCP_TYPE
+    mock_db.keys.return_value = keys
+    count_obj = {}
+    if db_dhcp_type is not None:
+        for current_type in db_dhcp_type:
+            if current_type not in clear_dhcp_relay.SUPPORTED_DHCP_TYPE:
+                continue
+            # Set it to non zero before clearing
+            count_obj[current_type] = "1"
+        mock_db.get.return_value = json.dumps(count_obj).replace("\"", "\'")
+    else:
+        mock_db.get.return_value = None
+    with patch.object(clear_dhcp_relay, "is_vlan_interface_valid", return_value=True):
+        clear_dhcp_relay.clear_dhcpv4_db_counters(mock_db, direction, type, paused_vlans)
+        calls = []
+        for vlan_interface in paused_vlans:
+            for key in keys:
+                if not (":{}:".format(vlan_interface) in key or key.endswith(vlan_interface)):
+                    continue
+                for curr_dir in directions:
+                    current_count_obj = copy.deepcopy(count_obj)
+                    for curr_type in types:
+                        current_count_obj[curr_type] = "0"
+                # Expect set count to zero
+                calls.append(call(ANY, key, curr_dir, json.dumps(current_count_obj).replace("\"", "\'")))
+        mock_db.set.assert_has_calls(calls, any_order=True)
+
+
+@pytest.mark.parametrize("sig, vlan_interface, procs", [
+    (signal.SIGUSR1, "Vlan1000", []),
+    (signal.SIGUSR2, "", [["dhcpmon", "5", "", ""]]),
+    (signal.SIGUSR2, "", [["dhcrelay", "5", "dhcpmon -id Vlan1000", ""]]),
+    (signal.SIGUSR2, "Vlan2000", [["dhcrelay", "5", "dhcpmon -id Vlan1000", ""]]),
+    (100, "Vlan1000", [])
+])
+def test_notify_dhcpmon_processes(patch_import_module, sig, vlan_interface, procs):
+    clear_dhcp_relay = patch_import_module
+    with patch.object(click, "echo") as mock_echo, \
+         patch.object(psutil, "process_iter") as mock_iterator, \
+         patch.object(os, "kill") as mock_kill:
+        mock_procs = []
+        for proc in procs:
+            mock_proc = MagicMock()
+            mock_proc.name.return_value = proc[0]
+            mock_proc.pid = proc[1]
+            mock_proc.cmdline.return_value = proc[2]
+            mock_procs.append(mock_proc)
+        mock_iterator.return_value = mock_procs
+        clear_dhcp_relay.notify_dhcpmon_processes(vlan_interface, sig)
+        try:
+            signal.Signals(sig)
+        except ValueError:
+            mock_echo.assert_called_once_with("Invalid signal, skip it")
+            mock_iterator.assert_not_called()
+            mock_kill.assert_not_called()
+            return
+        mock_kill_calls = []
+        expected_notified_vlans = set()
+        for proc in procs:
+            if proc[3]:
+                mock_kill_calls.append(call(int(proc[1]), sig))
+                expected_notified_vlans.add(proc[3])
+        if mock_kill_calls:
+            mock_kill.assert_has_calls(mock_kill_calls)
+        else:
+            mock_kill.assert_not_called()
+
+
+@pytest.mark.parametrize("interface", ["Vlan1000", None])
+def test_clear_dhcp6relay_clear_counters(patch_import_module, interface):
+    clear_dhcp_relay = patch_import_module
+    runner = CliRunner()
+    with patch.object(clear_dhcp_relay, "clear_dhcp_relay_ipv6_counter") as mock_clear:
+        if interface:
+            result = runner.invoke(clear_dhcp_relay.dhcp6relay_clear.commands["dhcp6relay_counters"],
+                                   ["--interface={}".format(interface)])
+        else:
+            result = runner.invoke(clear_dhcp_relay.dhcp6relay_clear.commands["dhcp6relay_counters"])
+        assert result.exit_code == 0
+        mock_clear.assert_called_once_with(interface)
+
+
+@pytest.mark.parametrize("interface", ["Vlan1000", None])
+def test_clear_dhcp_relay_ipv6_counters(patch_import_module, interface):
+    clear_dhcp_relay = patch_import_module
+    runner = CliRunner()
+    args = ["--interface={}".format(interface)] if interface else []
+    with patch.object(clear_dhcp_relay, "clear_dhcp_relay_ipv6_counter") as mock_clear:
+        result = runner.invoke(clear_dhcp_relay.dhcp_relay.commands["ipv6"].commands["counters"], args)
+        assert result.exit_code == 0
+        mock_clear.assert_called_once_with(interface)
+
+
+def test_clear_dhcp_relay_ipv4_counters_no_root(patch_import_module):
+    clear_dhcp_relay = patch_import_module
+    runner = CliRunner()
+    with patch.object(os, "geteuid", return_value=1), \
+         patch.object(click, "get_current_context") as mock_get_ctx:
+        mock_ctx = MagicMock()
+        mock_get_ctx.return_value = mock_ctx
+        result = runner.invoke(clear_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"])
+        assert result.exit_code == 0
+        mock_ctx.fail.assert_called_once_with("Clear DHCPv4 counter need to be run with sudo permission")
+
+
+def test_clear_dhcp_relay_ipv4_counters_locked(patch_import_module):
+    clear_dhcp_relay = patch_import_module
+    runner = CliRunner()
+    with patch.object(os, "geteuid", return_value=0), \
+         patch.object(clear_dhcp_relay, "open"), \
+         patch.object(fcntl, "flock", side_effect=BlockingIOError) as mock_flock, \
+         patch.object(clear_dhcp_relay, "notify_dhcpmon_processes"), \
+         patch.object(clear_dhcp_relay, "clear_dhcpv4_db_counters"), \
+         patch.object(click, "get_current_context") as mock_get_ctx:
+        mock_ctx = MagicMock()
+        mock_get_ctx.return_value = mock_ctx
+        result = runner.invoke(clear_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"])
+        assert result.exit_code != 0
+        mock_ctx.fail.assert_called_once_with("Cannot lock {}".format(clear_dhcp_relay.DHCPV4_CLEAR_COUNTER_LOCK_FILE) + 
+                                              ", seems another user is clearing DHCPv4 relay counter simultaneous")
+        mock_flock.assert_has_calls([
+            call(ANY, fcntl.LOCK_EX | fcntl.LOCK_NB),
+            call(ANY, fcntl.LOCK_UN)
+        ])
+
+
+def test_clear_dhcp_relay_ipv4_counters_vlan_invalid(patch_import_module):
+    clear_dhcp_relay = patch_import_module
+    runner = CliRunner()
+    with patch.object(os, "geteuid", return_value=0), \
+         patch.object(clear_dhcp_relay, "is_vlan_interface_valid", return_value=False), \
+         patch.object(click, "get_current_context") as mock_get_ctx:
+        mock_ctx = MagicMock()
+        mock_get_ctx.return_value = mock_ctx
+        result = runner.invoke(clear_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"], "--interface=Vlan1000")
+        assert result.exit_code == 0
+        mock_ctx.fail.assert_called_once_with("Vlan1000 doesn't exist")
+
+
+@pytest.mark.parametrize("interface", ["", "Vlan1000"])
+@pytest.mark.parametrize("dir", [None, "RX", "TX"])
+@pytest.mark.parametrize("type", [None, "Discover"])
+@pytest.mark.parametrize("failed_vlans", [{}, {"Vlan1000": set(["RX", "TX"])}])
+def test_clear_dhcp_relay_ipv4_counters(patch_import_module, interface, dir, type, failed_vlans):
+    clear_dhcp_relay = patch_import_module
+    runner = CliRunner()
+    args = []
+    if interface != "":
+        args.append("--interface={}".format(interface))
+    if dir is not None:
+        args.append("--dir={}".format(dir))
+    if type is not None:
+        args.append("--type={}".format(type))
+    paused_vlans = set()
+    with patch.object(os, "geteuid", return_value=0), \
+         patch.object(clear_dhcp_relay, "open"), \
+         patch.object(fcntl, "flock") as mock_flock, \
+         patch.object(clear_dhcp_relay, "notify_dhcpmon_processes", return_value=set()) as mock_notify, \
+         patch.object(clear_dhcp_relay, "get_paused_vlans", return_value=paused_vlans), \
+         patch.object(clear_dhcp_relay, "clear_dhcpv4_db_counters") as mock_clear, \
+         patch.object(clear_dhcp_relay, "is_vlan_interface_valid", return_value=True), \
+         patch.object(clear_dhcp_relay, "get_failed_vlans", return_value=failed_vlans), \
+         patch.object(clear_dhcp_relay, "clear_writing_state_db_flag") as mock_clear_writing_state_db_flag, \
+         patch.object(click, "get_current_context") as mock_get_ctx:
+        mock_ctx = MagicMock()
+        mock_get_ctx.return_value = mock_ctx
+        result = runner.invoke(clear_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"], args)
+        assert result.exit_code == 0
+        mock_flock.assert_has_calls([
+            call(ANY, fcntl.LOCK_EX | fcntl.LOCK_NB),
+            call(ANY, fcntl.LOCK_UN)
+        ])
+        mock_notify.assert_has_calls([
+            call(interface, signal.SIGUSR1),
+            call(interface, signal.SIGUSR2)
+        ])
+        mock_clear.assert_called_once_with(ANY, dir, type, paused_vlans)
+        if failed_vlans:
+            mock_ctx.fail.assert_called_once()
+        mock_clear_writing_state_db_flag.assert_has_calls([
+            call(ANY),
+            call(ANY)
+        ])
+
+
+@pytest.mark.parametrize("mock_get_result", ["done", ""])
+def test_get_failed_vlans(patch_import_module, mock_get_result):
+    clear_dhcp_relay = patch_import_module
+    mock_db = MagicMock()
+    mock_db.get.return_value = mock_get_result
+    failed_vlans = clear_dhcp_relay.get_failed_vlans(mock_db, set(["Vlan1000", "Vlan2000"]))
+    if mock_get_result == "done":
+        assert failed_vlans == {}
+    else:
+        assert failed_vlans == {"Vlan1000": set(["RX", "TX"]), "Vlan2000": set(["RX", "TX"])}
+
+
+def test_clear_writing_state_db_flag(patch_import_module):
+    clear_dhcp_relay = patch_import_module
+    mock_db = MagicMock()
+    keys = ["key1", "key2", "key3"]
+    mock_db.keys.return_value = keys
+    clear_dhcp_relay.clear_writing_state_db_flag(mock_db)
+    mock_db.delete.assert_has_calls([call(ANY, key) for key in keys])
+
+
+@pytest.mark.parametrize("is_write_db_paused, vlans, result", [
+    (True, set(["Vlan1000", "Vlan2000"]), set(["Vlan1000", "Vlan2000"])),
+    (False,set( ["Vlan1000", "Vlan2000"]), set()),
+    (True, set(), set()),
+    (False, set(), set())
+])
+def test_get_paused_vlans(patch_import_module, is_write_db_paused, vlans, result):
+    clear_dhcp_relay = patch_import_module
+    with patch.object(clear_dhcp_relay, "is_write_db_paused", return_value=is_write_db_paused):
+        paused_vlans = clear_dhcp_relay.get_paused_vlans(MagicMock(), "table_name", vlans)
+    assert paused_vlans == result
+
+
+def test_is_write_db_paused(patch_import_module):
+    clear_dhcp_relay = patch_import_module
+    mock_db = MagicMock()
+    clear_dhcp_relay.is_write_db_paused(mock_db, "table_name", "vlan_interface")
+    mock_db.get.assert_called_once_with(ANY, "table_name|vlan_interface", "pause_write_to_db")
diff --git a/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp4relay_counters.py b/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp4relay_counters.py
new file mode 100644
index 00000000000..576e40fbbf4
--- /dev/null
+++ b/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp4relay_counters.py
@@ -0,0 +1,380 @@
+import click
+import copy
+import pytest
+import sys
+sys.path.append("../cli/show/plugins/")
+import show_dhcp_relay
+
+from unittest.mock import patch, call, MagicMock, ANY
+from click.testing import CliRunner
+
+SUPPORTED_DHCPV4_TYPE = [
+    "Unknown", "Discover", "Offer", "Request", "Decline", "Ack", "Nak", "Release", "Inform", "Bootp"
+]
+SUPPORTED_DIR = ["TX", "RX"]
+
+
+def test_plugin_registration():
+    cli = MagicMock()
+    show_dhcp_relay.register(cli)
+
+
+@pytest.mark.parametrize("valid", [True, False])
+@pytest.mark.parametrize("vlan_interface", ["Vlan1000", ""])
+def test_is_vlan_interface_valid(valid, vlan_interface):
+    mock_db = MagicMock()
+    mock_db.exists.return_value = valid
+    result = show_dhcp_relay.is_vlan_interface_valid(vlan_interface, mock_db)
+    if vlan_interface:
+        assert result == valid
+    else:
+        assert result
+
+
+def test_get_vlan_members_from_config_db():
+    mock_db = MagicMock()
+    mock_db.keys.return_value = [
+        "VLAN_MEMBER|Vlan1000|Ethernet1",
+        "VLAN_MEMBER|Vlan1000|Ethernet2",
+        "VLAN_MEMBER|Vlan2000|Ethernet3"
+    ]
+    result = show_dhcp_relay.get_vlan_members_from_config_db(mock_db, "Vlan1000")
+    assert result == {
+        "Vlan1000": set(["Ethernet1", "Ethernet2"])
+    }
+
+
+@pytest.mark.parametrize("get, expected_res", [
+    (None, 0),
+    ("{'Unknown':'0','Discover':'1','Offer':'0'}", "1"),
+    ("{'Unknown':'0','Request':'1','Offer':'0'}", "0")
+])
+def test_get_count_from_db(get, expected_res):
+    mock_db = MagicMock()
+    mock_db.get.return_value = get
+    res = show_dhcp_relay.get_count_from_db(mock_db, "", "", "Discover")
+    assert res == expected_res
+
+
+@pytest.mark.parametrize("vlan, dirs_count", [
+    ("Vlan1000", {"RX": "1", "TX": "5"}),
+    ("Vlan1000", {"RX": "3"})
+])
+def test_append_vlan_count_with_type_specified(vlan, dirs_count):
+    def mock_get_count_from_db(db, key, current_dir, current_type):
+        return dirs_count[current_dir]
+
+    with patch.object(show_dhcp_relay, "get_count_from_db", side_effect=mock_get_count_from_db):
+        dummy_summary = "dummy"
+        data = {
+            dummy_summary: [],
+            "Intf Type": []
+        }
+        for dir in dirs_count.keys():
+            data[dir] = []
+        expected_res = copy.deepcopy(data)
+        show_dhcp_relay.append_vlan_count_with_type_specified(data, MagicMock, list(dirs_count.keys()), vlan, "",
+                                                              dummy_summary)
+        expected_res["Intf Type"].append("VLAN")
+        expected_res[dummy_summary].append(vlan)
+        for dir, count in dirs_count.items():
+            expected_res[dir].append(count)
+        assert expected_res == data
+
+
+@pytest.mark.parametrize("interface_name, vlan_interface, expected_result", [
+    ("Ethernet1", "Vlan1000", "Downlink"),
+    ("Ethernet4", "Vlan1000", "Uplink"),
+    ("Ethernet5", "Vlan3000", "Unknown"),
+    ("eth0", "Vlan3000", "MGMT")
+])
+def test_get_interfaces_type(interface_name, vlan_interface, expected_result):
+    vlan_members = {
+        "Vlan1000": set(["Ethernet1", "Ethernet2"]),
+        "Vlan2000": set(["Ethernet3"])
+    }
+    mgmt_intfs = ["eth0"]
+    result = show_dhcp_relay.get_interfaces_type(interface_name, mgmt_intfs, vlan_interface, vlan_members)
+    assert result == expected_result
+
+
+@pytest.mark.parametrize("interfaces, dirs_count, vlan_interface", [
+    (["Ethernet1", "Ethernet2", "Ethernet3", "Ethernet4"], {"RX": "1", "TX": "5"}, "Vlan1000"),
+    (["eth0", "Ethernet3", "Ethernet4", "Ethernet5"], {"RX": "3 ", "TX": "5"}, "Vlan3000"),
+])
+def test_append_interfaces_count_with_type_specified(interfaces, dirs_count, vlan_interface):
+    def mock_get_count_from_db(db, key, current_dir, current_type):
+        return dirs_count[current_dir]
+
+    vlan_members = {
+        "Vlan1000": set(["Ethernet1", "Ethernet2"]),
+        "Vlan2000": set(["Ethernet3"])
+    }
+    mgmt_intfs = ["eth0"]
+    with patch.object(show_dhcp_relay, "get_count_from_db", side_effect=mock_get_count_from_db):
+        dummy_summary = "dummy"
+        data = {
+            dummy_summary: [],
+            "Intf Type": []
+        }
+        for dir in dirs_count.keys():
+            data[dir] = []
+        expected_data = copy.deepcopy(data)
+        mock_db = MagicMock()
+        mock_db.keys.return_value = ["DHCPV4_COUNTER_TABLE:" + vlan_interface + ":" + intf for intf in interfaces]
+        show_dhcp_relay.append_interfaces_count_with_type_specified(data, mock_db, list(dirs_count.keys()),
+                                                                    vlan_interface, "", dummy_summary, vlan_members,
+                                                                    mgmt_intfs)
+        expected_data[dummy_summary] = interfaces
+        for intf in interfaces:
+            if intf in mgmt_intfs:
+                expected_data["Intf Type"].append("MGMT")
+            elif vlan_interface not in vlan_members:
+                expected_data["Intf Type"].append("Unknown")
+            elif intf in vlan_members[vlan_interface]:
+                expected_data["Intf Type"].append("Downlink")
+            else:
+                expected_data["Intf Type"].append("Uplink")
+            for dir in dirs_count.keys():
+                expected_data[dir].append(dirs_count[dir])
+        assert expected_data == data
+
+
+def test_generate_output_with_type_specified():
+    expected_output = """\
++------------------+-----------+----+----+
+| Vlan1000 (Offer) | Intf Type | RX | TX |
++------------------+-----------+----+----+
+| Vlan1000         | VLAN      | 5  | 5  |
+| Ethernet0        | Downlink  | 10 | 10 |
+| Ethernet1        | Uplink    | 20 | 20 |
++------------------+-----------+----+----+
+"""
+
+    def mock_append_vlan(data, db, dirs, vlan_interface, current_type, summary):
+        data[summary].append("Vlan1000")
+        data["Intf Type"].append("VLAN")
+        for dir in dirs:
+            data[dir].append("5")
+
+    def mock_append_interfaces(data, db, dirs, vlan_interface, current_type, summary, vlan_members, mgmt_intfs):
+        data[summary].extend(["Ethernet0", "Ethernet1"])
+        data["Intf Type"].extend(["Downlink", "Uplink"])
+        for dir in dirs:
+            data[dir].extend(["10", "20"])
+
+    with patch.object(show_dhcp_relay, "append_vlan_count_with_type_specified", side_effect=mock_append_vlan), \
+         patch.object(show_dhcp_relay, "append_interfaces_count_with_type_specified",
+                      side_effect=mock_append_interfaces):
+        output = show_dhcp_relay.generate_output_with_type_specified(MagicMock(), [], ["Offer"], ["RX", "TX"],
+                                                                     "Vlan1000", [])
+        assert output == expected_output
+
+
+@pytest.mark.parametrize("vlan, types_count", [
+    ("Vlan1000", {"Discover": "1", "Offer": "5"}),
+    ("Vlan1000", {"Ack": "3"})
+])
+def test_append_vlan_count_without_type_specified(vlan, types_count):
+    def mock_get_count_from_db(db, key, current_dir, current_type):
+        return types_count[current_type]
+
+    with patch.object(show_dhcp_relay, "get_count_from_db", side_effect=mock_get_count_from_db):
+        dummy_summary = "dummy"
+        data = {
+            dummy_summary: [],
+            "Intf Type": []
+        }
+        for type in types_count.keys():
+            data[type] = []
+        expected_res = copy.deepcopy(data)
+        show_dhcp_relay.append_vlan_count_without_type_specified(data, MagicMock(), "", vlan, list(types_count.keys()),
+                                                                 dummy_summary)
+        expected_res["Intf Type"].append("VLAN")
+        expected_res[dummy_summary].append(vlan)
+        for type, count in types_count.items():
+            expected_res[type].append(count)
+        assert expected_res == data
+
+
+def test_natural_sort_key():
+    assert show_dhcp_relay.natural_sort_key("Ethernet12") == ["ethernet", 12, ""]
+
+
+@pytest.mark.parametrize("types_count", [{"Discover": "5", "Offer": "10"}, {"Request": "3", "Ack": "5"}])
+def test_append_interfaces_count_without_type_specified(types_count):
+    def mock_get_count_from_db(db, key, current_dir, current_type):
+        return types_count[current_type]
+
+    mock_db = MagicMock()
+    interfaces = ["Ethernet0", "Ethernet1"]
+    mock_db.keys.return_value = ["DHCPV4_COUNTER_TABLE:Vlan1000:{}".format(intf) for intf in interfaces]
+    dummy_summary = "dummy"
+    data = {
+        dummy_summary: [],
+        "Intf Type": []
+    }
+    for type in types_count.keys():
+        data[type] = []
+    with patch.object(show_dhcp_relay, "get_interfaces_type", return_value="Downlink"), \
+         patch.object(show_dhcp_relay, "get_count_from_db", side_effect=mock_get_count_from_db):
+        expected_data = copy.deepcopy(data)
+        show_dhcp_relay.append_interfaces_count_without_type_specified(data, mock_db, "", "", list(types_count.keys()),
+                                                                       dummy_summary, {}, [])
+        expected_data[dummy_summary].extend(interfaces)
+        expected_data["Intf Type"].extend(["Downlink", "Downlink"])
+        for type, count in types_count.items():
+            expected_data[type].extend([count, count])
+        assert expected_data == data
+
+
+def test_generate_output_without_type_specified():
+    expected_output = """\
++---------------+-----------+----------+-------+
+| Vlan1000 (RX) | Intf Type | Discover | Offer |
++---------------+-----------+----------+-------+
+| Vlan1000      | VLAN      | 10       | 10    |
+| Ethernet0     | Downlink  | 20       | 20    |
+| Ethernet1     | Uplink    | 30       | 30    |
++---------------+-----------+----------+-------+
+"""
+
+    def mock_append_vlan(data, db, dir, vlan_interface, types, summary):
+        data[summary].append("Vlan1000")
+        data["Intf Type"].append("VLAN")
+        for type in types:
+            data[type].append("10")
+
+    def mock_append_interfaces(data, db, dir, vlan_interface, types, summary, vlan_members,
+                               mgmt_intfs):
+        data[summary].extend(["Ethernet0", "Ethernet1"])
+        data["Intf Type"].extend(["Downlink", "Uplink"])
+        for type in types:
+            data[type].extend(["20", "30"])
+    with patch.object(show_dhcp_relay, "append_vlan_count_without_type_specified", side_effect=mock_append_vlan), \
+            patch.object(show_dhcp_relay, "append_interfaces_count_without_type_specified",
+                         side_effect=mock_append_interfaces):
+        output = show_dhcp_relay.generate_output_without_type_specified(MagicMock(), {}, ["Discover", "Offer"], "RX",
+                                                                        "Vlan1000", [])
+        assert expected_output == output
+
+
+def test_get_mgmt_intfs():
+    mock_db = MagicMock()
+    mock_db.keys.return_value = [
+        "MGMT_PORT|eth0",
+        "MGMT_PORT|eth1"
+    ]
+    result = show_dhcp_relay.get_mgmt_intfs_from_config_db(mock_db)
+    assert result == ["eth0", "eth1"]
+
+
+@pytest.mark.parametrize("vlan, expected_result", [
+    ("", set(["Vlan1000", "Vlan2000", "Vlan100"])),
+    ("Vlan1000", set(["Vlan1000"])),
+    ("Vlan100", set(["Vlan100"]))
+])
+def test_get_vlans_from_counters_db(vlan, expected_result):
+    mock_db = MagicMock()
+    mock_db.keys.return_value = [
+        "DHCPV4_COUNTER_TABLE:Vlan1000",
+        "DHCPV4_COUNTER_TABLE:Vlan100",
+        "DHCPV4_COUNTER_TABLE:Vlan1000:Ethernet0",
+        "DHCPV4_COUNTER_TABLE:Vlan2000"
+    ]
+    result = show_dhcp_relay.get_vlans_from_counters_db(vlan, mock_db)
+    assert result == expected_result
+
+
+def test_print_dhcpv4_relay_counter_data_with_type_specified():
+    mock_vlans = ["Vlan1000", "Vlan2000"]
+    mock_vlan_members = {"Vlan1000": set(["Ethernet0"]), "Vlan2000": set(["Ethernet1"])}
+    mock_mgmt_intfs = ["eth0"]
+    types = ["Discover"]
+    dirs = ["RX", "TX"]
+    with patch.object(show_dhcp_relay, "get_vlans_from_counters_db", return_value=mock_vlans), \
+         patch.object(show_dhcp_relay, "get_vlan_members_from_config_db", return_value=mock_vlan_members), \
+         patch.object(show_dhcp_relay, "get_mgmt_intfs_from_config_db", return_value=mock_mgmt_intfs), \
+         patch.object(show_dhcp_relay, "generate_output_with_type_specified",
+                      return_value="") as mock_generate_with_type_specified, \
+         patch.object(show_dhcp_relay,
+                      "generate_output_without_type_specified",
+                      return_value="") as mock_generate_withtout_type_specified:
+        show_dhcp_relay.print_dhcpv4_relay_counter_data("", dirs, types, MagicMock())
+
+        # Verify calls for generate_output_with_type_specified
+        expected_calls = [
+            call(ANY, mock_vlan_members, types, dirs, vlan, mock_mgmt_intfs)
+            for vlan in mock_vlans
+        ]
+        mock_generate_with_type_specified.assert_has_calls(expected_calls)
+
+        # Verify calls for generate_output_without_type_specified
+        mock_generate_withtout_type_specified.assert_not_called()
+
+
+def test_print_dhcpv4_relay_counter_data_without_type_specified():
+    mock_vlans = ["Vlan1000", "Vlan2000"]
+    mock_vlan_members = {"Vlan1000": set(["Ethernet0"]), "Vlan2000": set(["Ethernet1"])}
+    mock_mgmt_intfs = ["eth0"]
+    types = ["Discover", "Offer", "Request", "ack"]
+    dirs = ["RX", "TX"]
+    with patch.object(show_dhcp_relay, "get_vlans_from_counters_db", return_value=mock_vlans), \
+         patch.object(show_dhcp_relay, "get_vlan_members_from_config_db", return_value=mock_vlan_members), \
+         patch.object(show_dhcp_relay, "get_mgmt_intfs_from_config_db", return_value=mock_mgmt_intfs), \
+         patch.object(show_dhcp_relay, "generate_output_with_type_specified",
+                      return_value="") as mock_generate_with_type_specified, \
+         patch.object(show_dhcp_relay,
+                      "generate_output_without_type_specified",
+                      return_value="") as mock_generate_withtout_type_specified:
+        show_dhcp_relay.print_dhcpv4_relay_counter_data("", dirs, types, MagicMock())
+
+        # Verify calls for generate_output_with_type_specified
+        mock_generate_with_type_specified.assert_not_called()
+
+        # Verify calls for generate_output_without_type_specified
+        calls = []
+        for vlan in mock_vlans:
+            for dir in dirs:
+                calls.append(call(ANY, mock_vlan_members, types, dir, vlan, mock_mgmt_intfs))
+        mock_generate_withtout_type_specified.assert_has_calls(calls)
+
+
+def test_dhcp_relay_ip4counters_vlan_invalid():
+    runner = CliRunner()
+    with patch.object(show_dhcp_relay, "is_vlan_interface_valid", return_value=False) as mock_check, \
+         patch.object(click, "echo") as mock_echo, \
+         patch.object(show_dhcp_relay, "print_dhcpv4_relay_counter_data") as mock_print:
+        vlan = "Vlan1000"
+        result = runner.invoke(show_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"], vlan)
+        assert result.exit_code == 0
+        mock_check.assert_called_once_with(vlan, ANY)
+        mock_echo.assert_called_once_with("Vlan interface {} doesn't have any count data".format(vlan))
+        mock_print.assert_not_called()
+
+
+@pytest.mark.parametrize("dir, type, expected_dirs, expected_types", [
+    (None, None, SUPPORTED_DIR, SUPPORTED_DHCPV4_TYPE),
+    (None, "Discover", SUPPORTED_DIR, ["Discover"]),
+    ("RX", None, ["RX"], SUPPORTED_DHCPV4_TYPE),
+    ("RX", "Offer", ["RX"], ["Offer"])
+])
+def test_dhcp_relay_ip4counters(dir, type, expected_dirs, expected_types):
+    runner = CliRunner()
+    with patch.object(show_dhcp_relay, "is_vlan_interface_valid", return_value=True), \
+         patch.object(show_dhcp_relay, "print_dhcpv4_relay_counter_data") as mock_print:
+        args = []
+        if dir:
+            args.append("--dir={}".format(dir))
+        if type:
+            args.append("--type={}".format(type))
+        result = runner.invoke(show_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"], args)
+        assert result.exit_code == 0
+        mock_print.assert_called_once_with("", expected_dirs, expected_types, ANY)
+
+
+@pytest.mark.parametrize("args", ["--dir=fail", "--type=fail"])
+def test_dhcp_relay_ip4counters_incorrect_dir(args):
+    runner = CliRunner()
+    result = runner.invoke(show_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"], args)
+    assert result.exit_code != 0
diff --git a/dockers/docker-dhcp-relay/cli/clear/plugins/clear_dhcp6relay_counter.py b/dockers/docker-dhcp-relay/cli/clear/plugins/clear_dhcp6relay_counter.py
deleted file mode 100644
index bfa5af45ae7..00000000000
--- a/dockers/docker-dhcp-relay/cli/clear/plugins/clear_dhcp6relay_counter.py
+++ /dev/null
@@ -1,56 +0,0 @@
-import click
-import importlib
-dhcp6_relay = importlib.import_module('show.plugins.dhcp-relay')
-
-import utilities_common.cli as clicommon
-
-
-def clear_dhcp_relay_ipv6_counter(interface):
-    counter = dhcp6_relay.DHCPv6_Counter()
-    counter_intf = counter.get_interface()
-
-    if interface:
-        counter.clear_table(interface)
-    else:
-        for intf in counter_intf:
-            counter.clear_table(intf)
-
-
-# sonic-clear dhcp6relay_counters
-@click.group(cls=clicommon.AliasedGroup)
-def dhcp6relay_clear():
-    pass
-
-
-@dhcp6relay_clear.command('dhcp6relay_counters')
-@click.option('-i', '--interface', required=False)
-def dhcp6relay_clear_counters(interface):
-    """ Clear dhcp6relay message counts """
-    clear_dhcp_relay_ipv6_counter(interface)
-
-
-@click.group(cls=clicommon.AliasedGroup, name="dhcp_relay")
-def dhcp_relay():
-    pass
-
-
-@dhcp_relay.group(cls=clicommon.AliasedGroup, name="ipv6")
-def dhcp_relay_ipv6():
-    pass
-
-
-@dhcp_relay_ipv6.command('counters')
-@click.option('-i', '--interface', required=False)
-def clear_dhcp_relay_ipv6_counters(interface):
-    """ Clear dhcp_relay ipv6 message counts """
-    clear_dhcp_relay_ipv6_counter(interface)
-
-
-def register(cli):
-    cli.add_command(dhcp6relay_clear_counters)
-    cli.add_command(dhcp_relay)
-
-
-if __name__ == '__main__':
-    dhcp6relay_clear_counters()
-    dhcp_relay()
diff --git a/dockers/docker-dhcp-relay/cli/clear/plugins/clear_dhcp_relay.py b/dockers/docker-dhcp-relay/cli/clear/plugins/clear_dhcp_relay.py
new file mode 100644
index 00000000000..2e753e6926f
--- /dev/null
+++ b/dockers/docker-dhcp-relay/cli/clear/plugins/clear_dhcp_relay.py
@@ -0,0 +1,219 @@
+import click
+import fcntl
+import importlib
+import json
+import signal
+import syslog
+import os
+import psutil
+import time
+import re
+dhcp6_relay = importlib.import_module('show.plugins.dhcp-relay')
+
+import utilities_common.cli as clicommon
+
+DHCPV4_CLEAR_COUNTER_LOCK_FILE = "/tmp/clear_dhcpv4_counter.lock"
+SUPPORTED_DHCP_TYPE = [
+    "Unknown", "Discover", "Offer", "Request", "Decline", "Ack", "Nak", "Release", "Inform", "Bootp"
+]
+SUPPORTED_DIR = ["TX", "RX"]
+DHCPV4_COUNTER_TABLE_PREFIX = "DHCPV4_COUNTER_TABLE"
+COUNTERS_DB_SEPRATOR = ":"
+DHCPV4_COUNTER_UPDATE_STATE_TABLE = "DHCPV4_COUNTER_UPDATE"
+STATE_DB_SEPRATOR = "|"
+WAITING_DB_WRITING_RETRY_TIMES = 2
+
+
+def clear_dhcp_relay_ipv6_counter(interface):
+    counter = dhcp6_relay.DHCPv6_Counter()
+    counter_intf = counter.get_interface()
+    if interface:
+        counter.clear_table(interface)
+    else:
+        for intf in counter_intf:
+            counter.clear_table(intf)
+
+
+def is_vlan_interface_valid(vlan_interface, db):
+    # If not vlan interface specified, treat it as valid
+    if vlan_interface == "":
+        return True
+    # If vlan interface is not in config_db VLAN table, treat it as invalid
+    if not db.exists(db.CONFIG_DB, "VLAN|{}".format(vlan_interface)):
+        return False
+    return True
+
+
+def clear_dhcpv4_db_counters(db, direction, type, paused_vlans):
+    types = SUPPORTED_DHCP_TYPE if type is None else [type]
+    directions = SUPPORTED_DIR if direction is None else [direction]
+    for vlan in paused_vlans:
+        counters_key = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan + "*"
+        for key in db.keys(db.COUNTERS_DB, counters_key):
+            # Make sure we clear the correct interface
+            # Sample: If we want to clear Vlan100, but there is a Vlan1000 exists too, we need to exclude Vlan1000
+            if not (":{}:".format(vlan) in key or key.endswith(vlan)):
+                continue
+            for dir in directions:
+                count_str = db.get(db.COUNTERS_DB, key, dir)
+                if count_str is None:
+                    # Would add new entry if corresponding dir doesn't exist in COUNTERS_DB
+                    count_str = "{}"
+                count_str = count_str.replace("\'", "\"")
+                count_obj = json.loads(count_str)
+                for current_type in types:
+                    # Would set count for types to 0 no matter whether this type exists in COUNTERS_DB
+                    count_obj[current_type] = "0"
+                count_str = json.dumps(count_obj).replace("\"", "\'")
+                db.set(db.COUNTERS_DB, key, dir, count_str)
+
+
+def notify_dhcpmon_processes(vlan_interface, sig):
+    notified_vlans = set()
+    try:
+        signal.Signals(sig)
+    except ValueError:
+        click.echo("Invalid signal, skip it")
+        return
+
+    for proc in psutil.process_iter():
+        try:
+            if proc.name() != "dhcpmon":
+                continue
+            match = re.search(r'-id\s+(Vlan\d+)', " ".join(proc.cmdline()))
+            if not match:
+                continue
+            if vlan_interface != "" and vlan_interface != match.group(1):
+                continue
+            pid = proc.pid
+            os.kill(int(pid), sig)
+            syslog.syslog(syslog.LOG_INFO, "Clear DHCPv4 counter: Sent signal {} to pid {}".format(sig, pid))
+            notified_vlans.add(match.group(1))
+        except (psutil.NoSuchProcess, psutil.ZombieProcess):
+            pass
+
+    return notified_vlans
+
+
+def is_write_db_paused(db, table_name, vlan_interface):
+    return db.get(db.STATE_DB, table_name + STATE_DB_SEPRATOR + vlan_interface, "pause_write_to_db") == "done"
+
+
+def get_paused_vlans(db, table_name, vlans):
+    paused_vlan = set()
+    for _ in range(WAITING_DB_WRITING_RETRY_TIMES + 1):
+        for vlan in vlans:
+            if is_write_db_paused(db, table_name, vlan):
+                paused_vlan.add(vlan)
+        if len(paused_vlan) == len(vlans):
+            break
+        time.sleep(1)
+    else:
+        click.echo("Skip clearing counter for {} due to writing COUNTERS_DB hasn't been stopped."
+                   .format(vlans - paused_vlan))
+    return paused_vlan
+
+
+def clear_writing_state_db_flag(db):
+    for key in db.keys(db.STATE_DB, DHCPV4_COUNTER_UPDATE_STATE_TABLE + STATE_DB_SEPRATOR + "*"):
+        db.delete(db.STATE_DB, key)
+
+
+def get_failed_vlans(db, vlans):
+    failed_vlans = {vlan: set(["RX", "TX"]) for vlan in vlans}
+    for _ in range(WAITING_DB_WRITING_RETRY_TIMES + 1):
+        for vlan in vlans:
+            if db.get(db.STATE_DB, DHCPV4_COUNTER_UPDATE_STATE_TABLE + STATE_DB_SEPRATOR + vlan,
+                      "rx_cache_update") == "done":
+                failed_vlans[vlan].discard("RX")
+            if db.get(db.STATE_DB, DHCPV4_COUNTER_UPDATE_STATE_TABLE + STATE_DB_SEPRATOR + vlan,
+                      "tx_cache_update") == "done":
+                failed_vlans[vlan].discard("TX")
+            if not failed_vlans[vlan]:
+                del failed_vlans[vlan]
+        if len(failed_vlans) == 0:
+            return failed_vlans
+        time.sleep(1)
+    return failed_vlans
+
+
+# sonic-clear dhcp6relay_counters
+@click.group(cls=clicommon.AliasedGroup)
+def dhcp6relay_clear():
+    pass
+
+
+@dhcp6relay_clear.command('dhcp6relay_counters')
+@click.option('-i', '--interface', required=False)
+def dhcp6relay_clear_counters(interface):
+    """ Clear dhcp6relay message counts """
+    clear_dhcp_relay_ipv6_counter(interface)
+
+
+@click.group(cls=clicommon.AliasedGroup, name="dhcp_relay")
+def dhcp_relay():
+    pass
+
+
+@dhcp_relay.group(cls=clicommon.AliasedGroup, name="ipv6")
+def dhcp_relay_ipv6():
+    pass
+
+
+@dhcp_relay_ipv6.command('counters')
+@click.option('-i', '--interface', required=False)
+def clear_dhcp_relay_ipv6_counters(interface):
+    """ Clear dhcp_relay ipv6 message counts """
+    clear_dhcp_relay_ipv6_counter(interface)
+
+
+@dhcp_relay.group(cls=clicommon.AliasedGroup, name="ipv4")
+def dhcp_relay_ipv4():
+    pass
+
+
+@dhcp_relay_ipv4.command('counters')
+@click.option('-i', '--interface', required=False, default="")
+@click.option('--dir', type=click.Choice(SUPPORTED_DIR), required=False)
+@click.option('--type', type=click.Choice(SUPPORTED_DHCP_TYPE), required=False)
+@clicommon.pass_db
+def clear_dhcp_relay_ipv4_counters(db, interface, dir, type):
+    """ Clear dhcp_relay ipv4 counts """
+    ctx = click.get_current_context()
+    if os.geteuid() != 0:
+        ctx.fail("Clear DHCPv4 counter need to be run with sudo permission")
+        return
+    if not is_vlan_interface_valid(interface, db.db):
+        ctx.fail("{} doesn't exist".format(interface))
+        return
+    with open(DHCPV4_CLEAR_COUNTER_LOCK_FILE, "w") as lock_file:
+        try:
+            fcntl.flock(lock_file, fcntl.LOCK_EX | fcntl.LOCK_NB)
+            clear_writing_state_db_flag(db.db)
+            notified_vlans = notify_dhcpmon_processes(interface, signal.SIGUSR1)
+            # Fetch the vlans that has been stopped to writing COUNTERS_DB
+            paused_vlans = get_paused_vlans(db.db, DHCPV4_COUNTER_UPDATE_STATE_TABLE, notified_vlans)
+            clear_dhcpv4_db_counters(db.db, dir, type, paused_vlans)
+            notify_dhcpmon_processes(interface, signal.SIGUSR2)
+            failed_vlans = get_failed_vlans(db.db, paused_vlans)
+            if failed_vlans:
+                failed_msg = ", ".join(["{}({})".format(vlan, ",".join(dirs)) for vlan, dirs in failed_vlans.items()])
+                ctx.fail("Failed to clear counter for {}".format(failed_msg))
+                return
+            click.echo("Clear DHCPv4 relay counter done")
+        except BlockingIOError:
+            ctx.fail("Cannot lock {}, seems another user is clearing DHCPv4 relay counter simultaneous"
+                     .format(DHCPV4_CLEAR_COUNTER_LOCK_FILE))
+        finally:
+            clear_writing_state_db_flag(db.db)
+            fcntl.flock(lock_file, fcntl.LOCK_UN)
+
+
+def register(cli):
+    cli.add_command(dhcp6relay_clear_counters)
+    cli.add_command(dhcp_relay)
+
+
+if __name__ == '__main__':
+    dhcp6relay_clear_counters()
+    dhcp_relay()
diff --git a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
index 7a3ea15d5f4..cdcad466ebf 100644
--- a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
+++ b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
@@ -1,4 +1,6 @@
 import click
+import json
+import re
 from natsort import natsorted
 from tabulate import tabulate
 import show.vlan as show_vlan
@@ -20,6 +22,15 @@
 VLAN = "VLAN"
 DHCPV6_SERVERS = "dhcpv6_servers"
 DHCPV4_SERVERS = "dhcp_servers"
+SUPPORTED_DHCPV4_TYPE = [
+    "Unknown", "Discover", "Offer", "Request", "Decline", "Ack", "Nak", "Release", "Inform", "Bootp"
+]
+SUPPORTED_DIR = ["TX", "RX"]
+DHCPV4_COUNTER_TABLE_PREFIX = "DHCPV4_COUNTER_TABLE"
+VLAN_MEMBER_TABLE_PREFIX = "VLAN_MEMBER"
+COUNTERS_DB_SEPRATOR = ":"
+CONFIG_DB_SEPRATOR = "|"
+MGMT_PORT_TABLE = "MGMT_PORT"
 config_db = ConfigDBConnector()
 
 
@@ -165,6 +176,180 @@ def get_dhcp_relay(table_name, entry_name, with_header):
             print(output)
 
 
+def is_vlan_interface_valid(vlan_interface, db):
+    # If not vlan interface specified, treat it as valid
+    if vlan_interface == "":
+        return True
+    if not db.exists(db.COUNTERS_DB, DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface):
+        return False
+    return True
+
+
+def get_vlan_members_from_config_db(db, vlan_interface):
+    vlan_members = {}
+    for key in db.keys(db.CONFIG_DB, VLAN_MEMBER_TABLE_PREFIX + CONFIG_DB_SEPRATOR + vlan_interface + "*"):
+        splits = key.split(CONFIG_DB_SEPRATOR)
+        if not splits[1].endswith(vlan_interface):
+            continue
+        if splits[1] not in vlan_members:
+            vlan_members[splits[1]] = set()
+        vlan_members[splits[1]].add(splits[2])
+    return vlan_members
+
+
+def get_count_from_db(db, key, dir, type):
+    count_str = db.get(db.COUNTERS_DB, key, dir)
+    count = 0
+    if count_str is not None:
+        try:
+            count = json.loads(count_str.replace("\'", "\"")).get(type, "0")
+        except json.JSONDecodeError:
+            pass
+    return count
+
+
+def append_vlan_count_with_type_specified(data, db, dirs, vlan_interface, current_type, summary):
+    key = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface
+    data[summary].append(vlan_interface)
+    data["Intf Type"].append("VLAN")
+    for current_dir in dirs:
+        count = get_count_from_db(db, key, current_dir, current_type)
+        data[current_dir].append(count)
+
+
+def get_interfaces_type(interface_name, mgmt_intfs, vlan_interface, vlan_members):
+    if interface_name in mgmt_intfs:
+        interface_type = "MGMT"
+    elif vlan_interface not in vlan_members:
+        interface_type = "Unknown"
+    elif interface_name in vlan_members[vlan_interface]:
+        interface_type = "Downlink"
+    else:
+        interface_type = "Uplink"
+    return interface_type
+
+
+def append_interfaces_count_with_type_specified(data, db, dirs, vlan_interface, current_type, summary, vlan_members,
+                                                mgmt_intfs):
+    key_pattern = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface + COUNTERS_DB_SEPRATOR + "*"
+    keys = sorted(db.keys(db.COUNTERS_DB, key_pattern), key=natural_sort_key)
+    for key in keys:
+        interface_name = key.split(COUNTERS_DB_SEPRATOR)[2]
+        data[summary].append(interface_name)
+        interface_type = get_interfaces_type(interface_name, mgmt_intfs, vlan_interface, vlan_members)
+        data["Intf Type"].append(interface_type)
+        for current_dir in dirs:
+            count = get_count_from_db(db, key, current_dir, current_type)
+            data[current_dir].append(count)
+
+
+def generate_output_with_type_specified(db, vlan_members, types, dirs, vlan_interface, mgmt_intfs):
+    # If type specified, then there would be only 1 type
+    current_type = types[0]
+    summary = "{} ({})".format(vlan_interface, current_type)
+
+    # Data need to be printed
+    data = {
+        summary: [],
+        "Intf Type": []
+    }
+    for dir in dirs:
+        data.setdefault(dir, [])
+
+    # Get Vlan interface count
+    append_vlan_count_with_type_specified(data, db, dirs, vlan_interface, current_type, summary)
+    # Get physical interfaces count
+    append_interfaces_count_with_type_specified(data, db, dirs, vlan_interface, current_type, summary,
+                                                vlan_members, mgmt_intfs)
+    return tabulate(data, tablefmt="pretty", stralign="left", headers="keys") + "\n"
+
+
+def append_vlan_count_without_type_specified(data, db, dir, vlan_interface, types, summary):
+    key = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface
+    data[summary].append(vlan_interface)
+    data["Intf Type"].append("VLAN")
+    for current_type in types:
+        count = get_count_from_db(db, key, dir, current_type)
+        data[current_type].append(count)
+
+
+def natural_sort_key(string):
+    return [int(text) if text.isdigit() else text.lower() for text in re.split(r'(\d+)', string)]
+
+
+def append_interfaces_count_without_type_specified(data, db, dir, vlan_interface, types, summary, vlan_members,
+                                                   mgmt_intfs):
+    key_pattern = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface + COUNTERS_DB_SEPRATOR + "*"
+    keys = sorted(db.keys(db.COUNTERS_DB, key_pattern), key=natural_sort_key)
+    for key in keys:
+        interface_name = key.split(COUNTERS_DB_SEPRATOR)[2]
+        data[summary].append(interface_name)
+        interface_type = get_interfaces_type(interface_name, mgmt_intfs, vlan_interface, vlan_members)
+        data["Intf Type"].append(interface_type)
+        for current_type in types:
+            count = get_count_from_db(db, key, dir, current_type)
+            data[current_type].append(count)
+
+
+def generate_output_without_type_specified(db, vlan_members, types, dir, vlan_interface, mgmt_intfs):
+    summary = "{} ({})".format(vlan_interface, dir)
+    data = {
+        summary: [],
+        "Intf Type": []
+    }
+    for type in types:
+        data.setdefault(type, [])
+
+    # Get vlan interface count
+    append_vlan_count_without_type_specified(data, db, dir, vlan_interface, types, summary)
+    # Get physical interfaces count
+    append_interfaces_count_without_type_specified(data, db, dir, vlan_interface, types, summary, vlan_members,
+                                                   mgmt_intfs)
+    return tabulate(data, tablefmt="pretty", stralign="left", headers="keys") + "\n"
+
+
+def get_mgmt_intfs_from_config_db(db):
+    mgmt_intfs = [
+        key.split(CONFIG_DB_SEPRATOR)[1] for key in db.keys(db.CONFIG_DB, MGMT_PORT_TABLE + CONFIG_DB_SEPRATOR + "*")
+        if len(key.split(CONFIG_DB_SEPRATOR)) > 1
+    ]
+    return mgmt_intfs
+
+
+def get_vlans_from_counters_db(vlan_interface, db):
+    # Get vlan set from COUNTERS_DB
+    counters_key = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface + "*"
+    vlans = set()
+    for key in db.keys(db.COUNTERS_DB, counters_key):
+        splits = key.split(COUNTERS_DB_SEPRATOR)
+        if vlan_interface == "" or vlan_interface == splits[1]:
+            vlans.add(splits[1])
+    return vlans
+
+
+def print_dhcpv4_relay_counter_data(vlan_interface, dirs, types, db):
+    # Get vlan set from COUNTERS_DB
+    vlans = get_vlans_from_counters_db(vlan_interface, db)
+
+    # Get vlan members
+    vlan_members = get_vlan_members_from_config_db(db, vlan_interface)
+
+    # Get mgmt interfaces
+    mgmt_intfs = get_mgmt_intfs_from_config_db(db)
+
+    # If user specify type
+    if len(types) == 1:
+        for vlan in vlans:
+            output = generate_output_with_type_specified(db, vlan_members, types, dirs, vlan, mgmt_intfs)
+            print(output)
+    # type not specified
+    else:
+        for vlan in vlans:
+            for dir in dirs:
+                output = generate_output_without_type_specified(db, vlan_members, types, dir, vlan, mgmt_intfs)
+                print(output)
+
+
 @dhcp_relay_helper.command('ipv6')
 def get_dhcpv6_helper_address():
     """Parse through DHCP_RELAY table for each interface in config_db.json and print dhcpv6 helpers in table format"""
@@ -174,12 +359,12 @@ def get_dhcpv6_helper_address():
 def get_data(table_data, vlan):
     vlan_data = table_data.get(vlan, {})
     helpers_data = vlan_data.get('dhcpv6_servers')
-    addr = {vlan:[]}
+    addr = {vlan: []}
     output = ''
     if helpers_data is not None:
         for ip in helpers_data:
             addr[vlan].append(ip)
-        output = tabulate({'Interface':[vlan], vlan:addr.get(vlan)}, tablefmt='simple', stralign='right') + '\n'
+        output = tabulate({'Interface': [vlan], vlan: addr.get(vlan)}, tablefmt='simple', stralign='right') + '\n'
     return output
 
 
@@ -215,6 +400,20 @@ def dhcp_relay_ip6counters(interface):
     ipv6_counters(interface)
 
 
+@dhcp_relay_ipv4.command("counters")
+@clicommon.pass_db
+@click.argument("vlan_interface", required=False, default="")
+@click.option('--dir', type=click.Choice(SUPPORTED_DIR), required=False)
+@click.option('--type', type=click.Choice(SUPPORTED_DHCPV4_TYPE), required=False)
+def dhcp_relay_ip4counters(db, vlan_interface, dir, type):
+    if not is_vlan_interface_valid(vlan_interface, db.db):
+        click.echo("Vlan interface {} doesn't have any count data".format(vlan_interface))
+        return
+    dirs = [dir] if dir else SUPPORTED_DIR
+    types = [type] if type else SUPPORTED_DHCPV4_TYPE
+    print_dhcpv4_relay_counter_data(vlan_interface, dirs, types, db.db)
+
+
 def register(cli):
     cli.add_command(dhcp6relay_counters)
     cli.add_command(dhcp_relay_helper)
diff --git a/dockers/docker-dhcp-relay/dhcp-relay.monitors.j2 b/dockers/docker-dhcp-relay/dhcp-relay.monitors.j2
index 168a9d9e486..e63c4fb0c19 100644
--- a/dockers/docker-dhcp-relay/dhcp-relay.monitors.j2
+++ b/dockers/docker-dhcp-relay/dhcp-relay.monitors.j2
@@ -1,44 +1,25 @@
 [group:dhcpmon]
 programs=
 {%- set add_preceding_comma = { 'flag': False } %}
-{% set monitor_instance = { 'flag': False } %}
-{% for vlan_name in VLAN_INTERFACE %}
-{% if VLAN and vlan_name in VLAN and 'dhcp_servers' in VLAN[vlan_name] and VLAN[vlan_name]['dhcp_servers']|length > 0 %}
-{% set _dummy = monitor_instance.update({'flag': True}) %}
-{%- endif %}
-{% if DHCP_RELAY and vlan_name in DHCP_RELAY and DHCP_RELAY[vlan_name]['dhcpv6_servers']|length > 0 %}
-{% set _dummy = monitor_instance.update({'flag': True}) %}
-{%- endif %}
-{% if monitor_instance.flag %}
-{% if add_preceding_comma.flag %},{% endif %}
-{% set _dummy = add_preceding_comma.update({'flag': True}) %}
+{% set vlan_list = [] %}
+{# Go through Vlan interfaces, if not ipv4 address or dhcpv4 server configured, then do not generate dhcpmon for them #}
+{% for (vlan_name, prefix) in VLAN_INTERFACE | pfx_filter %}
+    {%- if prefix | ipv4 and VLAN and vlan_name in VLAN and 'dhcp_servers' in VLAN[vlan_name] and VLAN[vlan_name]['dhcp_servers']|length > 0 %}
+        {%- for dhcp_server in VLAN[vlan_name]['dhcp_servers'] %}
+            {%- if dhcp_server | ipv4 %}
+                {%- set _ = vlan_list.append(vlan_name) %}
+            {%- endif %}
+        {%- endfor %}
+    {%- endif %}
+{% endfor %}
+{% for vlan_name in vlan_list | unique %}
+    {%- if add_preceding_comma.flag %},{% endif %}
+        {%- set _dummy = add_preceding_comma.update({'flag': True}) %}
 dhcpmon-{{ vlan_name }}
-{%- set _dummy = monitor_instance.update({'flag': False}) %}
-{%- endif %}
-{% endfor %}
+{%- endfor%}
 
 
-{# Create a program entry for each DHCP MONitor instance #}
-{% set relay_for_ipv4 = { 'flag': False } %}
-{% set relay_for_ipv6 = { 'flag': False } %}
-{% for vlan_name in VLAN_INTERFACE %}
-{# Check DHCPv4 agents #}
-{% if VLAN and vlan_name in VLAN and 'dhcp_servers' in VLAN[vlan_name] and VLAN[vlan_name]['dhcp_servers']|length > 0 %}
-{% for dhcp_server in VLAN[vlan_name]['dhcp_servers'] %}
-{% if dhcp_server | ipv4 %}
-{% set _dummy = relay_for_ipv4.update({'flag': True}) %}
-{% endif %}
-{% endfor %}
-{% endif %}
-{# Check DHCPv6 agents #}
-{% if DHCP_RELAY and vlan_name in DHCP_RELAY and DHCP_RELAY[vlan_name]['dhcpv6_servers']|length > 0 %}
-{% for dhcpv6_server in DHCP_RELAY[vlan_name]['dhcpv6_servers'] %}
-{% if dhcpv6_server | ipv6 %}
-{% set _dummy = relay_for_ipv6.update({'flag': True}) %}
-{% endif %}
-{% endfor %}
-{% endif %}
-{% if relay_for_ipv4.flag or relay_for_ipv6.flag %}
+{% for vlan_name in vlan_list | unique %}
 [program:dhcpmon-{{ vlan_name }}]
 {# We treat this VLAN as a downstream interface (-id), as we only want to listen for requests #}
 command=/usr/sbin/dhcpmon -id {{ vlan_name }}
@@ -68,11 +49,6 @@ stdout_syslog=true
 stderr_logfile=NONE
 stderr_syslog=true
 dependent_startup=true
-dependent_startup_wait_for=
-{%- if relay_for_ipv4.flag %}isc-dhcpv4-relay-{{ vlan_name }}:running {% endif %}
+dependent_startup_wait_for=isc-dhcpv4-relay-{{ vlan_name }}:running
 
-
-{% set _dummy = relay_for_ipv4.update({'flag': False}) %}
-{% set _dummy = relay_for_ipv6.update({'flag': False}) %}
-{% endif %}
 {% endfor %}
diff --git a/dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 b/dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2
index d26346613f3..0f5068c03ff 100644
--- a/dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2
+++ b/dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2
@@ -63,8 +63,12 @@ dependent_startup_wait_for=rsyslogd:running
 {# Create a program entry for each DHCP relay agent instance #}
 {% set relay_for_ipv4 = { 'flag': False } %}
 {% set relay_for_ipv6 = { 'flag': False } %}
-{% for vlan_name in VLAN_INTERFACE %}
-{% include 'dhcpv4-relay.agents.j2' %}
+{% set added_vlan = []%}
+{% for (vlan_name, prefix) in VLAN_INTERFACE|pfx_filter %}
+    {%- if prefix | ipv4 and vlan_name not in added_vlan %}
+        {%- include 'dhcpv4-relay.agents.j2' %}
+        {%- set _ = added_vlan.append(vlan_name) %}
+    {%- endif %}
 {% endfor %}
 
 {% include 'dhcpv6-relay.agents.j2' %}
diff --git a/dockers/docker-dhcp-relay/start.sh b/dockers/docker-dhcp-relay/start.sh
index 87a9e5711f2..a05e1578667 100755
--- a/dockers/docker-dhcp-relay/start.sh
+++ b/dockers/docker-dhcp-relay/start.sh
@@ -10,6 +10,11 @@ then
     ${CTR_SCRIPT} -f dhcp_relay -o ${RUNTIME_OWNER} -v ${IMAGE_VERSION}
 fi
 
+keys=$(sonic-db-cli COUNTERS_DB keys "DHCPV4_COUNTER_TABLE:*")
+for key in $keys; do
+    sonic-db-cli COUNTERS_DB del "$key"
+done
+
 # If our supervisor config has entries in the "dhcp-relay" group...
 if [ $(supervisorctl status | grep -c "^dhcp-relay:") -gt 0 ]; then
     # Wait for all interfaces to come up and be assigned IPv4 addresses before
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index faa067fdeea..6f8b0e7667e 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -221,6 +221,17 @@ def test_show_dhcp_server_ipv4_info_with_customized_options(self, mock_db):
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
         assert result.stdout == expected_stdout
 
+        expected_stdout = """\
++-------------+--------+-----------+---------------+-----------------+----------+----------------------+
+| Interface   | Mode   | Gateway   | Netmask       |   Lease Time(s) | State    | Customized Options   |
++=============+========+===========+===============+=================+==========+======================+
+| Vlan300     | PORT   | 100.1.1.1 | 255.255.255.0 |            3600 | disabled |                      |
++-------------+--------+-----------+---------------+-----------------+----------+----------------------+
+"""
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["info"], ["Vlan300", "--with_customized_options"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
     def test_show_dhcp_server_ipv4_option_without_name(self, mock_db):
         expected_stdout = """\
 +---------------+-------------+-------------+--------+
diff --git a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
index 2e7a55a0f84..9bdfdc7aad0 100644
--- a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
@@ -112,7 +112,7 @@ def info(db, dhcp_interface, with_customized_options):
         interface = key.split("|")[1]
         table.append([interface, entry["mode"], entry["gateway"], entry["netmask"], entry["lease_time"], entry["state"]])
         if with_customized_options:
-            table[-1].append(entry["customized_options@"])
+            table[-1].append(entry["customized_options@"] if "customized_options@" in entry else "")
     click.echo(tabulate(table, headers=headers, tablefmt="grid"))
 
 
diff --git a/dockers/docker-fpm-frr/base_image_files/TS b/dockers/docker-fpm-frr/base_image_files/TS
index fb1c077cb37..1a04385370c 100755
--- a/dockers/docker-fpm-frr/base_image_files/TS
+++ b/dockers/docker-fpm-frr/base_image_files/TS
@@ -4,10 +4,11 @@
 [ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment
 
 PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
-type=`sonic-db-cli CONFIG_DB hget 'DEVICE_METADATA|localhost' 'type'`
+subtype=`sonic-db-cli CONFIG_DB hget 'DEVICE_METADATA|localhost' 'subtype'`
 TSA_CHASSIS_STATE=false
 
-if [[ $type == *"SpineRouter"* ]]; then
+if [[ $subtype == *"UpstreamLC"* || $subtype == *"DownstreamLC"* ]]; then
+ # Check supervisor TSA state, only required on chassis linecard
  TSA_CHASSIS_STATE="$(sonic-db-cli CHASSIS_APP_DB HGET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled)"
 fi
 
diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA
index 47c052e6983..a2d98d4db2a 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSA
+++ b/dockers/docker-fpm-frr/base_image_files/TSA
@@ -3,15 +3,19 @@
 # Source the platform_utils script
 source "$(dirname "$0")/platform_utils" > /dev/null 2>&1
 
-${SMARTSWITCH:=false}
-
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then
   echo "Root priveleges are needed for this operation"
   exit 1
 fi
 
-if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then
+PLATFORM="$(sonic-cfggen -d -v DEVICE_METADATA.localhost.platform)"
+PLATFORM_ENV_CONF_FILE=/usr/share/sonic/device/$PLATFORM/platform_env.conf
+if [ -f $PLATFORM_ENV_CONF_FILE ]; then
+  source $PLATFORM_ENV_CONF_FILE
+fi
+
+if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] && [[ $disaggregated_chassis -ne 1 ]]; then
   CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "true""
   CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}'
   current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
@@ -52,11 +56,9 @@ if [ -z "$STARTED_BY_TSA_TSB_SERVICE" ]; then
 fi
 
 /usr/bin/TS TSA
-if [[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.type)" == *"SpineRouter"* ]] ; then
-  if [[ "$1" != "chassis" ]] ; then
-    echo "Please execute 'sudo config save' to preserve System mode in Maintenance after reboot or config reload"
-    echo -e "\nWARNING: Please execute 'TSA' on all other linecards of the chassis to fully isolate this device"    
-  fi
-else
-  echo "Please execute 'sudo config save' to preserve System mode in Maintenance after reboot or config reload"
-fi
+echo "Please execute 'sudo config save' to preserve System mode in Maintenance after reboot or config reload"
+
+subtype=`sonic-db-cli CONFIG_DB hget 'DEVICE_METADATA|localhost' 'subtype'`
+if [[ $subtype == *"UpstreamLC"* || $subtype == *"DownstreamLC"* ]] ; then
+  echo -e "\nWARNING: Please execute 'TSA' on Supervisor or on all other linecards of the chassis to fully isolate the chassis"
+fi
\ No newline at end of file
diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB
index 4ea469a623c..d79d8a5d034 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSB
+++ b/dockers/docker-fpm-frr/base_image_files/TSB
@@ -3,15 +3,19 @@
 # Source the platform_utils script
 source "$(dirname "$0")/platform_utils" > /dev/null 2>&1
 
-${SMARTSWITCH:=false}
-
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then
   echo "Root priveleges are needed for this operation"
   exit 1
 fi
 
-if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then
+PLATFORM="$(sonic-cfggen -d -v DEVICE_METADATA.localhost.platform)"
+PLATFORM_ENV_CONF_FILE=/usr/share/sonic/device/$PLATFORM/platform_env.conf
+if [ -f $PLATFORM_ENV_CONF_FILE ]; then
+  source $PLATFORM_ENV_CONF_FILE
+fi
+
+if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] && [[ $disaggregated_chassis -ne 1 ]]; then
   CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "false""
   CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}'
   current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
@@ -51,10 +55,4 @@ if [ -z "$STARTED_BY_TSA_TSB_SERVICE" ]; then
 fi
 
 /usr/bin/TS TSB
-if [[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.type)" == *"SpineRouter"* ]] ; then
-  if [[ "$1" != "chassis" ]] ; then
-    echo "Please execute 'sudo config save' to preserve System mode in Normal state after reboot or config reload"    
-  fi
-else
-  echo "Please execute 'sudo config save' to preserve System mode in Normal state after reboot or config reload"
-fi
+echo "Please execute 'sudo config save' to preserve System mode in Normal state after reboot or config reload"
diff --git a/dockers/docker-fpm-frr/base_image_files/TSC b/dockers/docker-fpm-frr/base_image_files/TSC
index 2796e34679f..f449272f184 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSC
+++ b/dockers/docker-fpm-frr/base_image_files/TSC
@@ -3,15 +3,19 @@
 # Source the platform_utils script
 source "$(dirname "$0")/platform_utils" > /dev/null 2>&1
 
-${SMARTSWITCH:=false}
-
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then
   echo "Root priveleges are needed for this operation"
   exit 1
 fi
 
-if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then
+PLATFORM="$(sonic-cfggen -d -v DEVICE_METADATA.localhost.platform)"
+PLATFORM_ENV_CONF_FILE=/usr/share/sonic/device/$PLATFORM/platform_env.conf
+if [ -f $PLATFORM_ENV_CONF_FILE ]; then
+  source $PLATFORM_ENV_CONF_FILE
+fi
+
+if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] && [[ $disaggregated_chassis -ne 1 ]]; then
   if [[ $1 == "no-stats" ]]; then
     rexec all -c "sudo TSC no-stats"
   else
diff --git a/dockers/docker-fpm-frr/base_image_files/idf_isolation b/dockers/docker-fpm-frr/base_image_files/idf_isolation
index 7312b99648c..9872cf2a451 100755
--- a/dockers/docker-fpm-frr/base_image_files/idf_isolation
+++ b/dockers/docker-fpm-frr/base_image_files/idf_isolation
@@ -12,10 +12,18 @@ if [[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.type)" != *"SpineRouter"*
     exit 1
 fi
 
+PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
+
 # Skip operation on chassis supervisor
-if [ -f /etc/sonic/chassisdb.conf ]; then  
-    echo "Skipping Operation on chassis supervisor"
-    exit 0
+if [ -f /etc/sonic/chassisdb.conf ]; then
+    PLATFORM_ENV_CONF_FILE=/usr/share/sonic/device/$PLATFORM/platform_env.conf
+    if [ -f "$PLATFORM_ENV_CONF_FILE" ]; then
+        source $PLATFORM_ENV_CONF_FILE
+    fi
+    if [[ $disaggregated_chassis -ne 1 ]]; then
+        echo "Skipping Operation on chassis supervisor"
+        exit 0
+    fi
 fi
 
 idf_isolation_states=("isolated_no_export" "isolated_withdraw_all" "unisolated" "status")
@@ -38,8 +46,6 @@ IDF_ISOLATION_STATE="{\"BGP_DEVICE_GLOBAL\":{\"STATE\":{\"idf_isolation_state\":
 # read SONiC immutable variables
 [ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment
 
-PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
-
 # Parse the device specific asic conf file, if it exists
 ASIC_CONF=/usr/share/sonic/device/$PLATFORM/asic.conf
 [ -f $ASIC_CONF ] && . $ASIC_CONF
@@ -84,4 +90,4 @@ fi
 
 if [ $1 != 'status' ]; then
     echo "Please execute 'sudo config save' to preserve IDF isolation state after reboot or config reload"
-fi
\ No newline at end of file
+fi
diff --git a/dockers/docker-fpm-frr/base_image_files/prefix_list b/dockers/docker-fpm-frr/base_image_files/prefix_list
index a3d09f140f2..3c8ff0e2d98 100755
--- a/dockers/docker-fpm-frr/base_image_files/prefix_list
+++ b/dockers/docker-fpm-frr/base_image_files/prefix_list
@@ -35,18 +35,20 @@ check_root_privileges() {
 # Function to check if the device is supported device with type spine routers and subtype UpstreamLC
 check_spine_router() {
     type=$(sonic-cfggen -d -v DEVICE_METADATA.localhost.type)
-    sub_type=$(sonic-cfggen -d -v DEVICE_METADATA.localhost.sub_type)
-    
-    # only supported on spine routers and UpstreamLC
-    if [[ "$type" != "SpineRouter" ||  "$sub_type" != "UpstreamLC" ]]; then
-        echo "Operation is only supported on UpstreamLC of SpineRouter." >&2
-        exit 1
+    subtype=$(sonic-cfggen -d -v DEVICE_METADATA.localhost.subtype)
+
+    # only supported on UpstreamLC or UpperSpineRouter
+    if [[ ("$type" == "SpineRouter" && "$subtype" == "UpstreamLC") || "$type" == "UpperSpineRouter" ]]; then
+        return
     fi
+
+    echo "Operation is only supported on Upstream SpineRouter." >&2
+    exit 1
 }
 
 # Function to skip operation on chassis supervisor
 skip_chassis_supervisor() {
-    if [ -f /etc/sonic/chassisdb.conf ]; then  
+    if [ -f /etc/sonic/chassisdb.conf ]; then
         echo "Skipping Operation on chassis supervisor"
         exit 0
     fi
@@ -72,12 +74,19 @@ validate_operation() {
     fi
 
     # Check if the prefix type is supported or not if the operation is not status
-    if [ $1 != "status" ]; then
-        for prefix_type in "${supported_prefix_types[@]}"; do
-        if [[ "$2" == "$prefix_type" ]]; then
-            valid_prefix_type=true
-            break
+    if [ "$1" == "status" ]; then
+        if [ -n "$2" ]; then
+            echo "No additional parameters required for status operation." >&2
+            echo ""
+            display_help
+            exit 1
         fi
+    else
+        for prefix_type in "${supported_prefix_types[@]}"; do
+            if [[ "$2" == "$prefix_type" ]]; then
+                valid_prefix_type=true
+                break
+            fi
         done
 
         if [ $valid_prefix_type == false ]; then
@@ -144,7 +153,9 @@ if [[ "$1" == "-h" || "$1" == "--help" ]]; then
     display_help
 fi
 
-check_root_privileges
+if [ "$1" != "status" ]; then
+    check_root_privileges
+fi
 check_spine_router
 skip_chassis_supervisor
 
@@ -162,7 +173,7 @@ ASIC_CONF=/usr/share/sonic/device/$PLATFORM/asic.conf
 if [[ ($NUM_ASIC -gt 1) ]]; then
     asic=0
     while [ $asic -lt $NUM_ASIC ]
-    do        
+    do
         sub_role=`sonic-cfggen -d -v "DEVICE_METADATA['localhost']['sub_role']" -n asic$asic`
         if [ $sub_role == 'FrontEnd' ]; then
             handle_prefix_list_asic $asic $1 $2 $3
diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh
index e24585945cc..f5d855f5784 100755
--- a/dockers/docker-fpm-frr/docker_init.sh
+++ b/dockers/docker-fpm-frr/docker_init.sh
@@ -49,6 +49,10 @@ write_default_zebra_config()
         echo "no fpm use-next-hop-groups" >> $FILE_NAME
         echo "fpm address 127.0.0.1" >> $FILE_NAME
     }
+
+    grep -q '^no zebra nexthop kernel enable' $FILE_NAME || {
+        echo "no zebra nexthop kernel enable" >> $FILE_NAME
+    }
 }
 
 if [[ ! -z "$NAMESPACE_ID" ]]; then
diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
index db11d662a3a..0f848195af3 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
@@ -88,8 +88,10 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }}
   bgp graceful-restart select-defer-time {{ constants.bgp.graceful_restart.select_defer_time | default(45) }}
 {% endif %}
 !
-{# set bmp info #}
-{% if (FEATURE is defined) and ('bmp' in FEATURE) and ('state' in FEATURE['bmp']) and (FEATURE['bmp']['state'] == 'enabled') %}
+{# set frr_bmp info #}
+{% if (FEATURE is defined) and
+      (('frr_bmp' in FEATURE and 'state' in FEATURE['frr_bmp'] and FEATURE['frr_bmp']['state'] == 'enabled') or
+      ('bmp' in FEATURE and 'state' in FEATURE['bmp'] and FEATURE['bmp']['state'] == 'enabled')) %}
 !
   bmp mirror buffer-limit 4294967214
 !
@@ -97,7 +99,7 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }}
   bmp stats interval 1000
   bmp monitor ipv4 unicast pre-policy
   bmp monitor ipv6 unicast pre-policy
-  bmp connect 127.0.0.1 port 5000 min-retry 1000 max-retry 2000
+  bmp connect 127.0.0.1 port 5000 min-retry 10000 max-retry 15000
 !
 !
 {% endif %}
diff --git a/dockers/docker-fpm-frr/frr/bgpd/radian/add_radian.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/radian/add_radian.conf.j2
index b17de180842..1cdfb69b393 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/radian/add_radian.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/radian/add_radian.conf.j2
@@ -1,11 +1,10 @@
-{{ data.ipv }} prefix-list ANCHOR_CONTRIBUTING_ROUTES permit {{ data.prefix }} ge 48
-{# #}
-router bgp {{ data.bgp_asn }}
-{% if data.ipv == 'ip' -%}
- address-family ipv4 unicast
-{% else -%}
- address-family ipv6 unicast
-{% endif %}
- aggregate-address {{ data.prefix }} route-map TAG_ANCHOR_COMMUNITY
- exit
+{{ data.ipv }} prefix-list ANCHOR_CONTRIBUTING_ROUTES permit {{ data.prefix }} ge {{ data.prefixlen + 1 }}
+router bgp {{ data.bgp_asn }}
+{% if data.ipv == 'ip' -%}
+ address-family ipv4 unicast
+{% else -%}
+ address-family ipv6 unicast
+{% endif %}
+ aggregate-address {{ data.prefix }} route-map TAG_ANCHOR_COMMUNITY
+ exit
 exit
\ No newline at end of file
diff --git a/dockers/docker-fpm-frr/frr/bgpd/radian/del_radian.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/radian/del_radian.conf.j2
index 77374be9ae9..8a53620680b 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/radian/del_radian.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/radian/del_radian.conf.j2
@@ -1,4 +1,4 @@
-no {{ data.ipv }} prefix-list ANCHOR_CONTRIBUTING_ROUTES permit {{ data.prefix }} ge 48 
+no {{ data.ipv }} prefix-list ANCHOR_CONTRIBUTING_ROUTES permit {{ data.prefix }} ge {{ data.prefixlen + 1 }}
 router bgp {{ data.bgp_asn }}
 {% if data.ipv == 'ip' -%}
  address-family ipv4 unicast
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/dynamic/delete.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/dynamic/delete.conf.j2
new file mode 100644
index 00000000000..36205a629d1
--- /dev/null
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/dynamic/delete.conf.j2
@@ -0,0 +1,7 @@
+!
+! template: bgpd/templates/dynamic/delete.conf.j2
+!
+no neighbor {{ neighbor_addr }}
+!
+! end of template: bgpd/templates/dynamic/delete.conf.j2
+!
\ No newline at end of file
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/dynamic/update.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/dynamic/update.conf.j2
new file mode 100644
index 00000000000..343129dcfaf
--- /dev/null
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/dynamic/update.conf.j2
@@ -0,0 +1,12 @@
+!
+! template: bgpd/templates/dynamic/update.conf.j2
+!
+{% for ip_range in delete_ranges %}
+  no bgp listen range {{ ip_range }} peer-group {{ bgp_session['name'] }}
+{% endfor %}
+{% for ip_range in add_ranges %}
+  bgp listen range {{ ip_range }} peer-group {{ bgp_session['name'] }}
+{% endfor %}
+!
+! end of template: bgpd/templates/dynamic/update.conf.j2
+!
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/general/peer-group.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/general/peer-group.conf.j2
index 69477cda2e3..7c7758000a3 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/general/peer-group.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/general/peer-group.conf.j2
@@ -14,7 +14,7 @@
     neighbor PEER_V4 soft-reconfiguration inbound
     neighbor PEER_V4 route-map FROM_BGP_PEER_V4 in
     neighbor PEER_V4 route-map TO_BGP_PEER_V4 out
-{% if CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'SpineRouter' %}
+{% if (CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'SpineRouter' and CONFIG_DB__DEVICE_METADATA['localhost']['subtype'] == 'UpstreamLC') or CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'UpperSpineRouter' %}
     table-map SELECTIVE_ROUTE_DOWNLOAD_V4
 {% endif %}
   exit-address-family
@@ -29,7 +29,7 @@
     neighbor PEER_V6 soft-reconfiguration inbound
     neighbor PEER_V6 route-map FROM_BGP_PEER_V6 in
     neighbor PEER_V6 route-map TO_BGP_PEER_V6 out
-{% if CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'SpineRouter' %}
+{% if (CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'SpineRouter' and CONFIG_DB__DEVICE_METADATA['localhost']['subtype'] == 'UpstreamLC') or CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'UpperSpineRouter' %}
     table-map SELECTIVE_ROUTE_DOWNLOAD_V6
 {% endif %}
   exit-address-family
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2
index 07cea2e22e9..f15a1362f78 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2
@@ -100,8 +100,9 @@ route-map CHECK_IDF_ISOLATION permit 10
 !
 !
 !
-{% if CONFIG_DB__DEVICE_METADATA and 'localhost' in CONFIG_DB__DEVICE_METADATA and 'type' in CONFIG_DB__DEVICE_METADATA['localhost'] and 'subtype' in CONFIG_DB__DEVICE_METADATA['localhost'] %}
-{% if CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'SpineRouter' and CONFIG_DB__DEVICE_METADATA['localhost']['subtype'] == 'UpstreamLC' %}
+{% if CONFIG_DB__DEVICE_METADATA and 'localhost' in CONFIG_DB__DEVICE_METADATA and 'type' in CONFIG_DB__DEVICE_METADATA['localhost'] %}
+{% if (CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'SpineRouter' and 'subtype' in CONFIG_DB__DEVICE_METADATA['localhost'] and CONFIG_DB__DEVICE_METADATA['localhost']['subtype'] == 'UpstreamLC') or
+CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'UpperSpineRouter' %}
 bgp community-list standard ANCHOR_ROUTE_COMMUNITY permit {{ constants.bgp.anchor_route_community }}
 bgp community-list standard LOCAL_ANCHOR_ROUTE_COMMUNITY permit {{ constants.bgp.local_anchor_route_community }}
 bgp community-list standard ANCHOR_CONTRIBUTING_ROUTE_COMMUNITY permit {{ constants.bgp.anchor_contributing_route_community }}
@@ -119,20 +120,20 @@ route-map SELECTIVE_ROUTE_DOWNLOAD_V6 permit 1000
 route-map TAG_ANCHOR_COMMUNITY permit 10
   set community {{ constants.bgp.local_anchor_route_community }} {{ constants.bgp.anchor_route_community }} additive
 !
-route-map TO_BGP_PEER_V6 permit 30
+route-map TO_BGP_PEER_V6 permit 50
   match ipv6 address prefix-list ANCHOR_CONTRIBUTING_ROUTES
   set community {{ constants.bgp.anchor_contributing_route_community }} additive
   on-match next
 !
-route-map TO_BGP_PEER_V6 permit 40
+route-map TO_BGP_PEER_V6 permit 60
   set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete
 !
-route-map TO_BGP_PEER_V4 permit 30
-  match ipv6 address prefix-list ANCHOR_CONTRIBUTING_ROUTES
+route-map TO_BGP_PEER_V4 permit 50
+  match ip address prefix-list ANCHOR_CONTRIBUTING_ROUTES
   set community {{ constants.bgp.anchor_contributing_route_community }} additive
   on-match next
 !
-route-map TO_BGP_PEER_V4 permit 40
+route-map TO_BGP_PEER_V4 permit 60
   set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete
 !
 {% endif %}
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
index c0e49cc9040..421edc5c199 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
@@ -26,6 +26,7 @@ route-map FROM_BGP_INTERNAL_PEER_V6 permit 2
 {% elif CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
 bgp community-list standard DEVICE_INTERNAL_COMMUNITY permit {{ constants.bgp.internal_community }}
 bgp community-list standard DEVICE_INTERNAL_FALLBACK_COMMUNITY permit {{ constants.bgp.internal_fallback_community }}
+bgp community-list standard LOCAL_ANCHOR_ROUTE_COMMUNITY permit {{ constants.bgp.local_anchor_route_community }}
 bgp community-list standard NO_EXPORT permit no-export
 !
 route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
@@ -78,10 +79,16 @@ route-map TO_BGP_INTERNAL_PEER_V4 permit 1
   match ip address prefix-list PL_LoopbackV4
   set community {{ constants.bgp.internal_community }}
 !
+route-map TO_BGP_INTERNAL_PEER_V4 deny 15
+  match community LOCAL_ANCHOR_ROUTE_COMMUNITY
+!
 route-map TO_BGP_INTERNAL_PEER_V6 permit 2
   match ipv6 address prefix-list PL_LoopbackV6
   set community {{ constants.bgp.internal_community }}
 !
+route-map TO_BGP_INTERNAL_PEER_V6 deny 15
+  match community LOCAL_ANCHOR_ROUTE_COMMUNITY
+!
 {% else %}
 route-map FROM_BGP_INTERNAL_PEER_V6 permit 1
  set ipv6 next-hop prefer-global
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/monitors/peer-group.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/monitors/peer-group.conf.j2
index 45c60b81788..e1f9c791a5e 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/monitors/peer-group.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/monitors/peer-group.conf.j2
@@ -2,7 +2,7 @@
 ! template: bgpd/templates/BGPMON/peer-group.conf.j2
 !
   neighbor BGPMON peer-group
-{% if CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'SpineRouter' %}
+{% if CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'voq' or CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
   neighbor BGPMON update-source Loopback4096
 {% elif loopback0_ipv4 %}
   neighbor BGPMON update-source {{ loopback0_ipv4 | ip }}
@@ -16,7 +16,7 @@
     neighbor BGPMON maximum-prefix 1
   exit-address-family
 
-{% if CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'SpineRouter' %}
+{% if CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'voq' or CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
   address-family ipv6
     neighbor BGPMON activate
     neighbor BGPMON route-map FROM_BGPMON in
diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
index eca9dfb2d98..33bbf37d6e9 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
@@ -98,7 +98,9 @@ dependent_startup_wait_for=zebra:running
 {% endif %}
 
 [program:bgpd]
-{% if FEATURE is defined and FEATURE.bmp is defined and FEATURE.bmp.state is defined and FEATURE.bmp.state == "enabled" %}
+{% if FEATURE is defined and
+      (FEATURE.frr_bmp is defined and FEATURE.frr_bmp.state is defined and FEATURE.frr_bmp.state == "enabled") or
+      (FEATURE.bmp is defined and FEATURE.bmp.state is defined and FEATURE.bmp.state == "enabled") %}
 command=/usr/lib/frr/bgpd -A 127.0.0.1 -P 0 -M snmp -M bmp
 {% else %}
 command=/usr/lib/frr/bgpd -A 127.0.0.1 -P 0 -M snmp
@@ -206,7 +208,7 @@ dependent_startup_wait_for=bgpd:running
 
 {% endif %}
 
-{% if DEVICE_METADATA.localhost.switch_type is defined and DEVICE_METADATA.localhost.switch_type == "dpu" %}
+{% if SYSTEM_DEFAULTS is defined and SYSTEM_DEFAULTS.software_bfd is defined and SYSTEM_DEFAULTS.software_bfd.status is defined and SYSTEM_DEFAULTS.software_bfd.status == "enabled" %}
 [program:bfdmon]
 command=/usr/local/bin/bfdmon
 priority=6
diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
index 759cd2f8c38..128bc9c5870 100644
--- a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
+++ b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
@@ -7,6 +7,8 @@
 {% endblock banner %}
 !
 {% block fpm %}
+! Force disable next hop group support
+no zebra nexthop kernel enable
 {% if ( ('localhost' in DEVICE_METADATA) and ('nexthop_group' in  DEVICE_METADATA['localhost']) and
         (DEVICE_METADATA['localhost']['nexthop_group'] == 'enabled') ) %}
 ! enable next hop group support
diff --git a/dockers/docker-gnmi-watchdog/Dockerfile.j2 b/dockers/docker-gnmi-watchdog/Dockerfile.j2
new file mode 100644
index 00000000000..d7f37c8410d
--- /dev/null
+++ b/dockers/docker-gnmi-watchdog/Dockerfile.j2
@@ -0,0 +1,41 @@
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} AS builder
+
+# Update apt's cache of available packages
+RUN apt-get update && apt-get install -y \
+    build-essential
+
+# Install Rust/Cargo via rustup
+ARG RUST_ROOT=/usr/.cargo
+RUN RUSTUP_HOME=$RUST_ROOT CARGO_HOME=$RUST_ROOT bash -c \
+    'curl --proto "=https" -sSf https://sh.rustup.rs | sh -s -- --default-toolchain 1.79.0 -y'
+ENV RUSTUP_HOME=$RUST_ROOT
+ENV PATH $PATH:$RUST_ROOT/bin
+
+# Copy watchdog source into /watchdog
+WORKDIR /watchdog
+COPY watchdog/ ./
+
+# Build from within /watchdog
+RUN cargo build --release
+
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+ARG image_version
+RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf
+
+ENV DEBIAN_FRONTEND=noninteractive
+ENV IMAGE_VERSION=$image_version
+
+RUN apt-get update
+# Remove build-essential after building
+RUN apt-get remove -y build-essential && apt-get autoremove -y
+
+# Copy supervisord.conf into final stage
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+
+# Copy the compiled Rust binary from the builder stage
+COPY --from=builder /watchdog/target/release/watchdog /usr/bin/gnmi_watchdog
+RUN chmod +x /usr/bin/gnmi_watchdog
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/dockers/docker-gnmi-watchdog/supervisord.conf b/dockers/docker-gnmi-watchdog/supervisord.conf
new file mode 100644
index 00000000000..8e0b4f41a09
--- /dev/null
+++ b/dockers/docker-gnmi-watchdog/supervisord.conf
@@ -0,0 +1,37 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=unexpected
+stdout_logfile=NONE
+stdout_syslog=true
+stderr_logfile=NONE
+stderr_syslog=true
+dependent_startup=true
+
+[program:gnmi_watchdog]
+command=/usr/bin/gnmi_watchdog
+priority=3
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=NONE
+stdout_syslog=true
+stderr_logfile=NONE
+stderr_syslog=true
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
diff --git a/dockers/docker-gnmi-watchdog/watchdog/Cargo.toml b/dockers/docker-gnmi-watchdog/watchdog/Cargo.toml
new file mode 100644
index 00000000000..8699815a723
--- /dev/null
+++ b/dockers/docker-gnmi-watchdog/watchdog/Cargo.toml
@@ -0,0 +1,7 @@
+[package]
+name = "watchdog"
+version = "0.1.0"
+edition = "2021"
+
+[dependencies]
+chrono = "0.4"
diff --git a/dockers/docker-gnmi-watchdog/watchdog/Makefile b/dockers/docker-gnmi-watchdog/watchdog/Makefile
new file mode 100644
index 00000000000..ff44e8686b4
--- /dev/null
+++ b/dockers/docker-gnmi-watchdog/watchdog/Makefile
@@ -0,0 +1,27 @@
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -e
+
+#
+# Debug build targets
+#
+build:
+	cargo build --all
+
+test:
+	cargo test --all
+
+clean:
+	cargo clean
+
+#
+# Release build targets
+#
+build-release:
+	cargo build --release --all
+
+test-release:
+	cargo test --release --all
+
+clean-release:
+	cargo clean --release
diff --git a/dockers/docker-gnmi-watchdog/watchdog/src/main.rs b/dockers/docker-gnmi-watchdog/watchdog/src/main.rs
new file mode 100644
index 00000000000..00ea0672853
--- /dev/null
+++ b/dockers/docker-gnmi-watchdog/watchdog/src/main.rs
@@ -0,0 +1,82 @@
+use std::io::{Read, Write};
+use std::net::TcpListener;
+use std::process::Command;
+use chrono::{TimeZone};
+
+// Helper to run commands
+fn run_command(cmd: &str) -> Result<String, String> {
+    let output = Command::new("sh")
+        .arg("-c")
+        .arg(cmd)
+        .output()
+        .map_err(|e| format!("Failed to spawn command '{}': {}", cmd, e))?;
+
+    if !output.status.success() {
+        return Err(format!(
+            "Command '{}' failed with status {}: {}",
+            cmd,
+            output.status.code().map_or("unknown".to_string(), |c| c.to_string()),
+            String::from_utf8_lossy(&output.stderr).to_string() // Clone the error message
+        ));
+    }
+
+    Ok(String::from_utf8_lossy(&output.stdout).to_string()) // Clone the output
+}
+
+// Check gnmi program status
+fn check_gnmi_status() -> String {
+
+    "OK".to_string()
+}
+
+fn main() {
+    let watchdog_port = 51000;
+    // Start a HTTP server listening on port 51000
+    let listener = TcpListener::bind(format!("127.0.0.1:{}", watchdog_port))
+        .expect(&format!("Failed to bind to 127.0.0.1:{}", watchdog_port));
+
+    println!("Watchdog HTTP server running on http://127.0.0.1:{}", watchdog_port);
+
+    for stream_result in listener.incoming() {
+        match stream_result {
+            Ok(mut stream) => {
+                let mut buffer = [0_u8; 512];
+                if let Ok(bytes_read) = stream.read(&mut buffer) {
+                    let req_str = String::from_utf8_lossy(&buffer[..bytes_read]);
+                    println!("Received request: {}", req_str);
+                }
+
+                let gnmi_result      = check_gnmi_status();
+
+                // Build a JSON object
+                let json_body = format!(
+                    r#"{{"gnmi_status":"{}"}}"#,
+                    gnmi_result
+                );
+
+                // Determine overall status
+                let all_results = vec![
+                    &gnmi_result
+                ];
+                let all_passed = all_results.iter().all(|r| r.starts_with("OK"));
+
+                let (status_line, content_length) = if all_passed {
+                    ("HTTP/1.1 200 OK", json_body.len())
+                } else {
+                    ("HTTP/1.1 500 Internal Server Error", json_body.len())
+                };
+
+                let response = format!(
+                    "{status_line}\r\nContent-Type: application/json\r\nContent-Length: {content_length}\r\n\r\n{json_body}"
+                );
+
+                if let Err(e) = stream.write_all(response.as_bytes()) {
+                    eprintln!("Failed to write response: {}", e);
+                }
+            }
+            Err(e) => {
+                eprintln!("Error accepting connection: {}", e);
+            }
+        }
+    }
+}
diff --git a/dockers/docker-orchagent/docker-init.j2 b/dockers/docker-orchagent/docker-init.j2
index 39e95c73332..88ebba30ed8 100755
--- a/dockers/docker-orchagent/docker-init.j2
+++ b/dockers/docker-orchagent/docker-init.j2
@@ -10,7 +10,9 @@ CFGGEN_PARAMS=" \
 {% if ENABLE_ASAN == "y" %}
      -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" \
 {% endif %}
+    -a "{\"ASIC_VENDOR\":\"${ASIC_VENDOR:-unknown}\"}" \
     -y /etc/sonic/constants.yml \
+    -t /usr/share/sonic/templates/orch_zmq_tables.conf.j2,/etc/swss/orch_zmq_tables.conf \
     -t /usr/share/sonic/templates/switch.json.j2,/etc/swss/config.d/switch.json \
     -t /usr/share/sonic/templates/vxlan.json.j2,/etc/swss/config.d/vxlan.json \
     -t /usr/share/sonic/templates/ipinip.json.j2,/etc/swss/config.d/ipinip.json \
diff --git a/dockers/docker-orchagent/ipinip.json.j2 b/dockers/docker-orchagent/ipinip.json.j2
index 9b8b57185eb..1f2c1840724 100644
--- a/dockers/docker-orchagent/ipinip.json.j2
+++ b/dockers/docker-orchagent/ipinip.json.j2
@@ -1,6 +1,13 @@
 {% if DEVICE_METADATA['localhost']['switch_type'] == "dpu" %}
 []
 {% else %}
+
+{# Check if the ASIC is Broadcom #}
+{% set is_broadcom = false %}
+{% if ASIC_VENDOR is defined and "broadcom" in ASIC_VENDOR|lower %}
+  {% set is_broadcom = true %}
+{% endif %}
+
 {% set ipv4_addresses = [] %}
 {% set ipv6_addresses = [] %}
 {% set ipv4_vlan_addresses = [] %}
@@ -59,18 +66,28 @@
 {%- set ipv4_addresses = [] %}
 {%- set ipv6_addresses = [] %}
 {% endif %}
+
+{# Check if AZURE QoS map exists #}
+{% set azure_qos_exists = false %}
+{% if DSCP_TO_TC_MAP is defined and DSCP_TO_TC_MAP.AZURE is defined %}
+{% set azure_qos_exists = true %}
+{% endif %}
+
 [
 {% if ipv4_loopback_addresses %}
 {% if subnet_decap.enable %}
     {
         "TUNNEL_DECAP_TABLE:IPINIP_SUBNET" : {
             "tunnel_type":"IPINIP",
+{% if is_broadcom %}
             "dscp_mode":"uniform",
-{% if "mlnx" in DEVICE_METADATA.localhost.platform %}
-            "ecn_mode":"standard",
 {% else %}
-            "ecn_mode":"copy_from_outer",
+            "dscp_mode":"pipe",
+{% if azure_qos_exists %}
+            "decap_dscp_to_tc_map":"AZURE",
 {% endif %}
+{% endif %}
+            "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
@@ -88,12 +105,15 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
+{% if is_broadcom %}
             "dscp_mode":"uniform",
-{% if "mlnx" in DEVICE_METADATA.localhost.platform %}
-            "ecn_mode":"standard",
 {% else %}
-            "ecn_mode":"copy_from_outer",
+            "dscp_mode":"pipe",
+{% if azure_qos_exists %}
+            "decap_dscp_to_tc_map":"AZURE",
+{% endif %}
 {% endif %}
+            "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
@@ -118,12 +138,15 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_SUBNET_V6" : {
             "tunnel_type":"IPINIP",
+{% if is_broadcom %}
             "dscp_mode":"uniform",
-{% if "mlnx" in DEVICE_METADATA.localhost.platform %}
-            "ecn_mode":"standard",
 {% else %}
-            "ecn_mode":"copy_from_outer",
+            "dscp_mode":"pipe",
+{% if azure_qos_exists %}
+            "decap_dscp_to_tc_map":"AZURE",
+{% endif %}
 {% endif %}
+            "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
@@ -141,12 +164,15 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
+{% if is_broadcom %}
             "dscp_mode":"uniform",
-{% if "mlnx" in DEVICE_METADATA.localhost.platform %}
-            "ecn_mode":"standard",
 {% else %}
-            "ecn_mode":"copy_from_outer",
+            "dscp_mode":"pipe",
+{% if azure_qos_exists %}
+            "decap_dscp_to_tc_map":"AZURE",
 {% endif %}
+{% endif %}
+            "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
diff --git a/dockers/docker-orchagent/orch_zmq_tables.conf.j2 b/dockers/docker-orchagent/orch_zmq_tables.conf.j2
new file mode 100644
index 00000000000..b3cb9f99644
--- /dev/null
+++ b/dockers/docker-orchagent/orch_zmq_tables.conf.j2
@@ -0,0 +1,29 @@
+{% if DEVICE_METADATA.localhost.orch_dash_zmq_enabled == "false"  %}
+DASH_VNET_TABLE
+DASH_QOS_TABLE
+DASH_ENI_TABLE
+DASH_ACL_IN_TABLE
+DASH_ACL_OUT_TABLE
+DASH_ACL_GROUP_TABLE
+DASH_ACL_RULE_TABLE
+DASH_HA_SET_TABLE
+DASH_HA_SCOPE_TABLE
+DASH_PREFIX_TAG_TABLE
+DASH_ROUTING_TYPE_TABLE
+DASH_APPLIANCE_TABLE
+DASH_ROUTE_TABLE
+DASH_ROUTE_RULE_TABLE
+DASH_VNET_MAPPING_TABLE
+DASH_ENI_ROUTE_TABLE
+DASH_ROUTE_GROUP_TABLE
+DASH_TUNNEL_TABLE
+DASH_PA_VALIDATION_TABLE
+DASH_METER_POLICY_TABLE
+DASH_METER_RULE_TABLE
+DASH_ROUTING_APPLIANCE_TABLE
+DASH_ENI_FORWARD_TABLE
+{% endif %}
+{% if DEVICE_METADATA.localhost.orch_route_zmq_enabled == "true"  %}
+ROUTE_TABLE
+LABEL_ROUTE_TABLE
+{% endif %}
diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh
index b0d19823f02..aee9ecb1a50 100755
--- a/dockers/docker-orchagent/orchagent.sh
+++ b/dockers/docker-orchagent/orchagent.sh
@@ -28,9 +28,13 @@ else
     ORCHAGENT_ARGS+="-b 1024 "
 fi
 
-# Set synchronous mode if it is enabled in CONFIG_DB
+# Set zmq mode by default for smartswitch DPU
+# Otherwise, set synchronous mode if it is enabled in CONFIG_DB
 SYNC_MODE=$(echo $SWSS_VARS | jq -r '.synchronous_mode')
-if [ "$SYNC_MODE" == "enable" ]; then
+SWITCH_TYPE=$(echo $SWSS_VARS | jq -r '.switch_type')
+if [ "$SWITCH_TYPE" == "dpu" ]; then
+    ORCHAGENT_ARGS+="-z zmq_sync "
+elif [ "$SYNC_MODE" == "enable" ]; then
     ORCHAGENT_ARGS+="-s "
 fi
 
@@ -78,7 +82,7 @@ elif [ "$platform" == "pensando" ]; then
         MAC_ADDRESS=$(ip link show eth0-midplane | grep ether | awk '{print $2}')
     fi
     ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
-elif [ "$platform" == "marvell" ]; then
+elif [ "$platform" == "marvell-prestera" ]; then
     ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
     CREATE_SWITCH_TIMEOUT=`cat $HWSKU_DIR/sai.profile | grep "createSwitchTimeout" | cut -d'=' -f 2`
     if [[ ! -z $CREATE_SWITCH_TIMEOUT ]]; then
@@ -117,4 +121,7 @@ if [[ x"${ORCHDAEMON_RING_ENABLED}" == x"true" ]]; then
     ORCHAGENT_ARGS+=" -R"
 fi
 
+# Mask SIGHUP signal to avoid orchagent termination by logrotate before orchagent registers its handler.
+trap '' SIGHUP
+
 exec /usr/bin/orchagent ${ORCHAGENT_ARGS}
diff --git a/dockers/docker-orchagent/switch.json.j2 b/dockers/docker-orchagent/switch.json.j2
index 63d3e80e317..88620bab782 100644
--- a/dockers/docker-orchagent/switch.json.j2
+++ b/dockers/docker-orchagent/switch.json.j2
@@ -13,6 +13,10 @@
 {% set lag_hash_offset_value = 10 %}
 {% elif "SpineRouter" in DEVICE_METADATA.localhost.type %}
 {% set hash_seed = 25 %}
+{% elif "FabricSpineRouter" in DEVICE_METADATA.localhost.type %}
+{% set hash_seed = 40 %}
+{% elif "UpperSpineRouter" in DEVICE_METADATA.localhost.type %}
+{% set hash_seed = 50 %}
 {% endif %}
 {% endif %}
 {% if DEVICE_METADATA.localhost.namespace_id %}
diff --git a/dockers/docker-pde/syncd_init_common.sh b/dockers/docker-pde/syncd_init_common.sh
index 762242b659c..f3a1b2985c4 100755
--- a/dockers/docker-pde/syncd_init_common.sh
+++ b/dockers/docker-pde/syncd_init_common.sh
@@ -153,7 +153,7 @@ config_syncd_centec()
     [ -e /dev/net/tun ] || ( mkdir -p /dev/net && mknod /dev/net/tun c 10 200 )
 }
 
-config_syncd_marvell()
+config_syncd_marvell_prestera()
 {
     CMD_ARGS+=" -p $HWSKU_DIR/sai.profile"
 
@@ -214,8 +214,8 @@ config_syncd()
         config_syncd_mlnx
     elif [ "$SONIC_ASIC_TYPE" == "centec" ]; then
         config_syncd_centec
-    elif [ "$SONIC_ASIC_TYPE" == "marvell" ]; then
-        config_syncd_marvell
+    elif [ "$SONIC_ASIC_TYPE" == "marvell-prestera" ]; then
+        config_syncd_marvell_prestera
      elif [ "$SONIC_ASIC_TYPE" == "barefoot" ]; then
          config_syncd_barefoot
     elif [ "$SONIC_ASIC_TYPE" == "nephos" ]; then
diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2
index 0dc97abaa20..de44cf83544 100755
--- a/dockers/docker-platform-monitor/Dockerfile.j2
+++ b/dockers/docker-platform-monitor/Dockerfile.j2
@@ -15,6 +15,7 @@ RUN apt-get update &&   \
     apt-get install -y  \
         build-essential \
         python3-dev     \
+        ipmitool        \
         librrd8         \
         librrd-dev      \
         rrdtool         \
@@ -60,6 +61,8 @@ RUN pip3 install psutil
 # Install blkinfo for block device information gathering operations
 RUN pip3 install blkinfo
 
+# Install smbus2 for SMBus/PMBus I2C transactions
+RUN pip3 install smbus2
 
 {% if docker_platform_monitor_debs.strip() -%}
 # Copy locally-built Debian package dependencies
diff --git a/dockers/docker-platform-monitor/docker_init.j2 b/dockers/docker-platform-monitor/docker_init.j2
index c8e2943e668..a024aa7f66b 100755
--- a/dockers/docker-platform-monitor/docker_init.j2
+++ b/dockers/docker-platform-monitor/docker_init.j2
@@ -9,6 +9,7 @@ FANCONTROL_CONF_FILE="/usr/share/sonic/platform/fancontrol"
 SUPERVISOR_CONF_TEMPLATE="/usr/share/sonic/templates/docker-pmon.supervisord.conf.j2"
 SUPERVISOR_CONF_FILE="/etc/supervisor/conf.d/supervisord.conf"
 MODULAR_CHASSISDB_CONF_FILE="/usr/share/sonic/platform/chassisdb.conf"
+PLATFORM_ENV_CONF_FILE="/usr/share/sonic/platform/platform_env.conf"
 
 HAVE_SENSORS_CONF=0
 HAVE_FANCONTROL_CONF=0
@@ -115,7 +116,11 @@ if [ -e $FANCONTROL_CONF_FILE ]; then
     /bin/cp -f $FANCONTROL_CONF_FILE /etc/
 fi
 
-if [ -e $MODULAR_CHASSISDB_CONF_FILE ]; then
+if [ -e $PLATFORM_ENV_CONF_FILE ]; then
+    source $PLATFORM_ENV_CONF_FILE
+fi
+
+if [ -e $MODULAR_CHASSISDB_CONF_FILE ] && [[ $disaggregated_chassis -ne 1 ]]; then
     IS_MODULAR_CHASSIS=1
 fi
 
diff --git a/dockers/docker-ptf-sai/Dockerfile.j2 b/dockers/docker-ptf-sai/Dockerfile.j2
index b10c1868d22..4509bb6bf53 100644
--- a/dockers/docker-ptf-sai/Dockerfile.j2
+++ b/dockers/docker-ptf-sai/Dockerfile.j2
@@ -11,6 +11,9 @@ RUN apt-get update              \
     && apt-get install -y       \
     python3-pip             
 
+{% if PTF_ENV_PY_VER == "py3" %}
+RUN pip3 install setuptools==51.0.0
+{% endif %}
 RUN pip3 install crc16          \
         netifaces               \
         getmac                  \
@@ -38,10 +41,13 @@ debs/{{ deb }}{{' '}}
 # Remove old ptf package
 RUN dpkg -r python-ptf
 
+{% if PTF_ENV_PY_VER == "py3" %}
+RUN pip3 install setuptools==51.0.0
+{% endif %}
 # Install new ptf package
 RUN git clone https://github.com/p4lang/ptf.git \
         && cd ptf                               \
-        && python3.7 setup.py install --single-version-externally-managed --record /tmp/ptf_install.txt
+        && python3 setup.py install --single-version-externally-managed --record /tmp/ptf_install.txt
 
 run echo "declare -x LANG=\"C.UTF-8\"" >> /root/.bashrc
 run echo "declare -x LC_ALL=\"C.UTF-8\"" >> /root/.bashrc
diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2
index 45aab2a99a3..aa167d4f5f0 100644
--- a/dockers/docker-ptf/Dockerfile.j2
+++ b/dockers/docker-ptf/Dockerfile.j2
@@ -9,7 +9,7 @@ FROM {{ prefix}}debian:buster
 FROM {{ prefix }}debian:bullseye
 {% endif %}
 
-{% from "dockers/dockerfile-macros.j2" import install_python_wheels, copy_files %}
+{% from "dockers/dockerfile-macros.j2" import install_python_wheels, copy_files, install_offending_packages %}
 
 USER root
 WORKDIR /root
@@ -91,8 +91,10 @@ RUN apt-get update          \
         gdb                 \
         automake            \
         iproute2            \
+        iptables            \
         wireshark-common    \
-        freeradius
+        freeradius          \
+        quilt
 
 {% if PTF_ENV_PY_VER == "py3" %}
 RUN update-alternatives --install /usr/bin/python python /usr/bin/python3 1 \
@@ -180,7 +182,11 @@ RUN git clone https://github.com/facebook/tac_plus \
     && ./configure \
     && make install \
     && ln -s /usr/local/sbin/tac_plus /usr/sbin/tac_plus \
-    && ln -s /usr/local/bin/tac_pwd /usr/sbin/tac_pwd
+    && ln -s /usr/local/bin/tac_pwd /usr/sbin/tac_pwd \
+    && mkdir /etc/tacacs+ \
+    && chmod 0755 /etc/tacacs+
+COPY ["tacacs_plus", "/etc/init.d"]
+COPY ["tacacs+", "/etc/default"]
 {% endif %}
 
 {% if PTF_ENV_PY_VER == "mixed" %}
@@ -194,14 +200,37 @@ ENV LANG=C.UTF-8 LC_ALL=C.UTF-8 PYTHONIOENCODING=UTF-8
 
 {% if PTF_ENV_PY_VER == "mixed" %}
 RUN python3 -m pip install --upgrade --ignore-installed pip
-{% else %}
-RUN pip3 install --upgrade --ignore-installed pip
 {% endif %}
 
-# Install all python modules from pypi. python3-scapy is exception, ptf debian package requires python3-scapy
+# For py3 image the following offending packages below do not use the updated 
+# setuptools on Python 3.9. The packages downgrade setuptools 
+# to 40.x causing further installations to fail
+{% if PTF_ENV_PY_VER == "py3" %}
+{% set offending_packages = ["supervisor", "ipython==5.4.1", "exabgp==4.2.25", "grpcio-tools", "pybrctl", "pyrasite", "scapy==2.5.0", "thrift"] %}
+{{ install_offending_packages(offending_packages) }}
+{% else %}
 RUN pip3 install setuptools \
-    && pip3 install supervisor \
-    && pip3 install ipython==5.4.1 \
+        && pip3 install supervisor \
+        && pip3 install ipython==5.4.1 \
+        && pip3 install exabgp==4.2.25 \
+        && pip3 install grpcio-tools \
+        && pip3 install pybrctl \
+        && pip3 install pyrasite \
+        && pip3 install scapy==2.5.0 \
+        && pip3 install thrift
+{% endif %}
+
+# Install all python modules from pypi. python3-scapy is exception, 
+# ptf debian package requires python3-scapy
+{% if PTF_ENV_PY_VER == "py3" %}
+# Werkzeug 3.1.3 has a bug and causes announce routes to fail
+# by returning 413 Request Entity Too Large though request buffers
+# have been increased.
+RUN pip3 install Flask==3.0.3   \
+    && pip3 install Werkzeug==3.1.2 \
+{% else %}
+RUN pip3 install Flask \
+{% endif %}
     && pip3 install Cython \
     && pip3 install cffi    \
     && pip3 install nnpy    \
@@ -213,20 +242,16 @@ RUN pip3 install setuptools \
     && pip3 install Flask   \
     && pip3 install exabgp \
     && pip3 install pyaml   \
-    && pip3 install pybrctl pyro4 rpyc \
+    && pip3 install pyro4 rpyc \
     && pip3 install unittest-xml-reporting \
-    && pip3 install pyrasite \
     && pip3 install python-libpcap \
     && pip3 install enum34 \
     && pip3 install grpcio \
-    && pip3 install grpcio-tools \
     && pip3 install protobuf \
     && pip3 install six==1.16.0 \
     && pip3 install itsdangerous \
     && pip3 install retrying \
-    && pip3 install jinja2 \
-    && pip3 install scapy==2.5.0 \
-    && pip3 install thrift
+    && pip3 install jinja2
 
 {% if docker_ptf_whls.strip() -%}
 # Copy locally-built Python wheel dependencies
@@ -261,17 +286,32 @@ RUN ln -s /usr/bin/tcpdump /usr/sbin/tcpdump
 RUN mkdir -p /var/log/supervisor
 
 # Install Python-based GNMI client
-RUN git clone https://github.com/lguohan/gnxi.git \
+RUN git clone https://github.com/google/gnxi.git \
     && cd gnxi \
-    && git checkout 3adf8b9 \
+    && git checkout 208acfa85f5b5b8717e14896e9d6ee93cfda9d5f
+
+COPY gnxi-patches/ gnxi/patches/
+
+RUN cd gnxi \
+    && quilt push -a \
     && cd gnmi_cli_py \
 {% if PTF_ENV_PY_VER == "mixed" %}
     && pip install -r requirements.txt
 {% else %}
+    && pip3 install setuptools==51.0.0 \
     && cat requirements.txt | grep -v futures > /tmp/requirements.txt \
     && pip3 install -r /tmp/requirements.txt
 {% endif %}
 
+# Install gnoic tool
+RUN git clone https://github.com/karimra/gnoic.git \
+    && cd gnoic \
+    && git checkout 57aac3d \
+    && chmod +x install.sh \
+    && ./install.sh \
+    && cd .. \
+    && rm -rf gnoic
+
 COPY \
 {% for deb in docker_ptf_debs.split(' ') -%}
 debs/{{ deb }}{{' '}}
@@ -285,8 +325,8 @@ debs/{{ deb }}{{' '}}
 
 {% if PTF_ENV_PY_VER == "py3" %}
 # Create symlink so that test scripts and ptf_runner invocation path
-# is same across python 2 and python 3 envs. Note that for virtual-env 
-# ptf is under /root/env-python3/bin. 
+# is same across python 2 and python 3 envs. Note that for virtual-env
+# ptf is under /root/env-python3/bin.
 # TODO - cleanup when the supported PTF image is py3only across all branches
 RUN mkdir -p /root/env-python3/bin \
     && ln -s /usr/local/bin/ptf /usr/bin/ptf \
diff --git a/dockers/docker-ptf/gnxi-patches/0001-add-xpath_target-option.patch b/dockers/docker-ptf/gnxi-patches/0001-add-xpath_target-option.patch
new file mode 100644
index 00000000000..8d1f86e3b53
--- /dev/null
+++ b/dockers/docker-ptf/gnxi-patches/0001-add-xpath_target-option.patch
@@ -0,0 +1,76 @@
+From d01b36e471f387007680e0f07d8bfe32db8e0269 Mon Sep 17 00:00:00 2001
+From: Guohan Lu <lguohan@gmail.com>
+Date: Fri, 3 Jul 2020 09:17:32 +0000
+Subject: [PATCH 1/5] add xpath_target option
+
+Signed-off-by: Guohan Lu <lguohan@gmail.com>
+---
+ gnmi_cli_py/py_gnmicli.py | 19 ++++++++++++-------
+ 1 file changed, 12 insertions(+), 7 deletions(-)
+
+diff --git a/gnmi_cli_py/py_gnmicli.py b/gnmi_cli_py/py_gnmicli.py
+index 7c9e92b..062dee7 100644
+--- a/gnmi_cli_py/py_gnmicli.py
++++ b/gnmi_cli_py/py_gnmicli.py
+@@ -126,6 +126,9 @@ def _create_parser():
+                       required=False, action='store_true')
+   parser.add_argument('-x', '--xpath', type=str, help='The gNMI path utilized'
+                       'in the GetRequest or Subscirbe', required=True)
++  parser.add_argument('-xt', '--xpath_target', type=str, help='The gNMI prefix'
++                      'target in the GetRequest or Subscirbe', default=None,
++                      required=False)
+   parser.add_argument('-o', '--host_override', type=str, help='Use this as '
+                       'Targets hostname/peername when checking it\'s'
+                       'certificate CN. You can check the cert with:\nopenssl '
+@@ -258,7 +261,7 @@ def _get_val(json_value):
+   return val
+ 
+ 
+-def _get(stub, paths, username, password):
++def _get(stub, paths, username, password, prefix):
+   """Create a gNMI GetRequest.
+ 
+   Args:
+@@ -266,16 +269,17 @@ def _get(stub, paths, username, password):
+     paths: gNMI Path
+     username: (str) Username used when building the channel.
+     password: (str) Password used when building the channel.
++    prefix: gNMI Path
+ 
+   Returns:
+     a gnmi_pb2.GetResponse object representing a gNMI GetResponse.
+   """
++  kwargs = {}
+   if username:  # User/pass supplied for Authentication.
+-    return stub.Get(
+-        gnmi_pb2.GetRequest(path=[paths], encoding='JSON_IETF'),
+-        metadata=[('username', username), ('password', password)])
+-  return stub.Get(gnmi_pb2.GetRequest(path=[paths], encoding='JSON_IETF'))
+-
++    kwargs = {'metadata': [('username', username), ('password', password)]}
++  return stub.Get(
++      gnmi_pb2.GetRequest(prefix=prefix, path=[paths], encoding='JSON_IETF'),
++                  **kwargs)
+ 
+ def _set(stub, paths, set_type, username, password, json_value):
+   """Create a gNMI SetRequest.
+@@ -368,6 +372,7 @@ def main():
+   json_value = args['value']
+   private_key = args['private_key']
+   xpath = args['xpath']
++  prefix = gnmi_pb2.Path(target=args['xpath_target'])
+   host_override = args['host_override']
+   user = args['username']
+   password = args['password']
+@@ -381,7 +386,7 @@ def main():
+   if mode == 'get':
+     print('Performing GetRequest, encoding=JSON_IETF', 'to', target,
+           ' with the following gNMI Path\n', '-'*25, '\n', paths)
+-    response = _get(stub, paths, user, password)
++    response = _get(stub, paths, user, password, prefix)
+     print('The GetResponse is below\n' + '-'*25 + '\n')
+     if form == 'protobuff':
+       print(response)
+-- 
+2.48.1.windows.1
+
diff --git a/dockers/docker-ptf/gnxi-patches/0002-Adding-support-for-subscribe-mode-1.patch b/dockers/docker-ptf/gnxi-patches/0002-Adding-support-for-subscribe-mode-1.patch
new file mode 100644
index 00000000000..eca4176d39f
--- /dev/null
+++ b/dockers/docker-ptf/gnxi-patches/0002-Adding-support-for-subscribe-mode-1.patch
@@ -0,0 +1,166 @@
+From 53901aba9ead82be21f1408a601b6266dcf1e3e4 Mon Sep 17 00:00:00 2001
+From: macikgozwa <74217992+macikgozwa@users.noreply.github.com>
+Date: Mon, 9 Nov 2020 16:19:24 -0800
+Subject: [PATCH 2/5] Adding support for subscribe mode (#1)
+
+- Adding support for subscribe mode. The code is mostly based on this patch: https://github.com/google/gnxi/pull/65
+- Adding a new parameter to limit the number of updates, e.g. after a number of streaming updates the client would stop listening. It is convenient for testing purposes.
+- Changing the sample interval unit to millisecond. This is also required for testing cases.
+
+Co-authored-by: Murat Acikgoz <muacikgo@microsoft.com>
+---
+ gnmi_cli_py/py_gnmicli.py | 102 +++++++++++++++++++++++++++++++++++---
+ 1 file changed, 95 insertions(+), 7 deletions(-)
+
+diff --git a/gnmi_cli_py/py_gnmicli.py b/gnmi_cli_py/py_gnmicli.py
+index 062dee7..7152f13 100644
+--- a/gnmi_cli_py/py_gnmicli.py
++++ b/gnmi_cli_py/py_gnmicli.py
+@@ -24,9 +24,7 @@ Current supported gNMI features:
+ - Auto-loads Target cert from Target if not specified
+ - User/password based authentication
+ - Certifificate based authentication
+-
+-Current unsupported gNMI features:
+-- Subscribe
++- Subscribe request
+ """
+ 
+ from __future__ import absolute_import
+@@ -40,14 +38,16 @@ import re
+ import ssl
+ import sys
+ import six
++import datetime
+ try:
+   import gnmi_pb2
+ except ImportError:
+   print('ERROR: Ensure you\'ve installed dependencies from requirements.txt\n'
+         'eg, pip install -r requirements.txt')
+ import gnmi_pb2_grpc
++import grpc
+ 
+-__version__ = '0.4'
++__version__ = '0.5'
+ 
+ _RE_PATH_COMPONENT = re.compile(r'''
+ ^
+@@ -143,6 +143,21 @@ def _create_parser():
+                       required=False, action='store_true')
+   parser.add_argument('-n', '--notls', help='gRPC insecure mode',
+                       required=False, action='store_true')
++  parser.add_argument('--interval', default=10000, type=int,
++                      help='sample interval in millisecond (default: 10000ms)')
++  parser.add_argument('--timeout', type=int, help='subscription'
++                      'duration in seconds (default: none)')
++  parser.add_argument('--heartbeat', default=0, type=int, help='heartbeat interval (default: None)')
++  parser.add_argument('--aggregate', action='store_true', help='allow aggregation')
++  parser.add_argument('--suppress', action='store_true', help='suppress redundant')
++  parser.add_argument('--submode', default=2, type=int,
++                      help='subscription mode [0=TARGET_DEFINED, 1=ON_CHANGE, 2=SAMPLE]')
++  parser.add_argument('--update_count', default=0, type=int, help='Max number of streaming updates to receive. 0 means no limit.')
++  parser.add_argument('--subscribe_mode', default=0, type=int, help='[0=STREAM, 1=ONCE, 2=POLL]')
++  parser.add_argument('--encoding', default=0, type=int, help='[0=JSON, 1=BYTES, 2=PROTO, 3=ASCII, 4=JSON_IETF]')
++  parser.add_argument('--qos', default=0, type=int, help='')
++  parser.add_argument('--use_alias', action='store_true', help='use alias')
++  parser.add_argument('--prefix', default='', help='gRPC path prefix (default: none)')
+   return parser
+ 
+ 
+@@ -353,6 +368,79 @@ def _open_certs(**kwargs):
+   return kwargs
+ 
+ 
++def gen_request(paths, opt, prefix):
++    """Create subscribe request for passed xpath.
++    Args:
++        paths: (str) gNMI path.
++        opt: (dict) Command line argument passed for subscribe reqeust.
++    Returns:
++      gNMI SubscribeRequest object.
++    """
++    mysubs = []
++    mysub = gnmi_pb2.Subscription(path=paths, mode=opt["submode"],
++      sample_interval=opt["interval"]*1000000,
++        heartbeat_interval=opt['heartbeat']*1000000,
++          suppress_redundant=opt['suppress'])
++    mysubs.append(mysub)
++
++    if prefix:
++      myprefix = prefix
++    elif opt["prefix"]:
++        myprefix = _parse_path(_path_names(opt["prefix"]))
++    else:
++        myprefix = None
++
++    if opt["qos"]:
++        myqos = gnmi_pb2.QOSMarking(marking=opt["qos"])
++    else:
++        myqos = None
++    mysblist = gnmi_pb2.SubscriptionList(prefix=myprefix, mode=opt['subscribe_mode'],
++      allow_aggregation=opt['aggregate'], encoding=opt['encoding'],
++      subscription=mysubs, use_aliases=opt['use_alias'], qos=myqos)
++    mysubreq = gnmi_pb2.SubscribeRequest(subscribe=mysblist)
++
++    print('Sending SubscribeRequest\n'+str(mysubreq))
++    yield mysubreq
++
++
++def subscribe_start(stub, options, req_iterator):
++  """ RPC Start for Subscribe reqeust
++  Args:
++      stub: (class) gNMI Stub used to build the secure channel.
++      options: (dict) Command line argument passed for subscribe reqeust.
++      req_iterator: gNMI Subscribe Request from gen_request.
++  Returns:
++      Start Subscribe and printing response of gNMI Subscribe Response.
++  """
++  metadata = [('username', options['username']), ('password', options['password'])]
++  max_update_count = options["update_count"]
++  try:
++      responses = stub.Subscribe(req_iterator, options['timeout'], metadata=metadata)
++      update_count = 0
++      for response in responses:
++          print('{0} response received: '.format(datetime.datetime.now()))
++          if response.HasField('sync_response'):
++              print(str(response))
++          elif response.HasField('error'):
++              print('gNMI Error '+str(response.error.code)+\
++                ' received\n'+str(response.error.message) + str(response.error))
++          elif response.HasField('update'):
++              print(response)
++              update_count = update_count+1
++          else:
++              print('Unknown response received:\n'+str(response))
++          
++          if max_update_count != 0 and update_count == max_update_count:
++            print("Max update count reached {0}".format(update_count))
++            break
++  except KeyboardInterrupt:
++      print("Subscribe Session stopped by user.")
++  except grpc.RpcError as x:
++      print("grpc.RpcError received:\n%s" %x)
++  except Exception as err:
++      print(err)
++
++
+ def main():
+   argparser = _create_parser()
+   args = vars(argparser.parse_args())
+@@ -414,9 +502,9 @@ def main():
+     response = _set(stub, paths, 'delete', user, password, json_value)
+     print('The SetRequest response is below\n' + '-'*25 + '\n', response)
+   elif mode == 'subscribe':
+-    print('This mode not available in this version')
+-    sys.exit()
++    request_iterator = gen_request(paths, args, prefix)
++    subscribe_start(stub, args, request_iterator)
+ 
+ 
+ if __name__ == '__main__':
+-  main()
++  main()
+\ No newline at end of file
+-- 
+2.48.1.windows.1
+
diff --git a/dockers/docker-ptf/gnxi-patches/0003-gNMI_client-Add-an-option-to-trigger-memory-spike-on.patch b/dockers/docker-ptf/gnxi-patches/0003-gNMI_client-Add-an-option-to-trigger-memory-spike-on.patch
new file mode 100644
index 00000000000..42d893b6193
--- /dev/null
+++ b/dockers/docker-ptf/gnxi-patches/0003-gNMI_client-Add-an-option-to-trigger-memory-spike-on.patch
@@ -0,0 +1,167 @@
+From f2b11e45b16ab13485ae14933f30c18ee6336499 Mon Sep 17 00:00:00 2001
+From: yozhao101 <56170650+yozhao101@users.noreply.github.com>
+Date: Thu, 14 Jul 2022 15:02:01 -0700
+Subject: [PATCH 3/5] [gNMI_client] Add an option to trigger memory spike on
+ gNMI server. (#2)
+
+What is the motivation of this PR?
+This PR aims to trigger memory spike on gNMI server side without explicitly closing the channels (TCP connections) from gNMI client side.
+
+How did you do it?
+I added an option --trigger_mem_spike in this python client script such that the user can specify this option to trigger memory spike.
+
+How did you test/verify it?
+I verify this on the ptf docker container binding to the lab device str-s6000-acs-11. The command line I used is as following:
+python /gnxi/gnmi_cli_py/py_gnmicli.py -g -t *.*.*.* -p 50051 -m subscribe -x DOCKER_STATS,TEST_STATS -xt STATE_DB -o "ndastreamingservertest" --trigger_mem_spike
+
+Signed-off-by: Yong Zhao <yozhao@microsoft.com>
+---
+ gnmi_cli_py/py_gnmicli.py | 105 ++++++++++++++++++++++++--------------
+ 1 file changed, 67 insertions(+), 38 deletions(-)
+
+diff --git a/gnmi_cli_py/py_gnmicli.py b/gnmi_cli_py/py_gnmicli.py
+index 7152f13..62d4ec8 100644
+--- a/gnmi_cli_py/py_gnmicli.py
++++ b/gnmi_cli_py/py_gnmicli.py
+@@ -57,7 +57,8 @@ _RE_PATH_COMPONENT = re.compile(r'''
+ (?P<value>.*)    # gNMI path value
+ \])?$
+ ''', re.VERBOSE)
+-
++INVALID_GNMI_CLIENT_CONNECTION_NUMBER = 1
++GNMI_SERVER_UNAVAILABLE = 2
+ 
+ class Error(Exception):
+   """Module-level Exception class."""
+@@ -157,6 +158,10 @@ def _create_parser():
+   parser.add_argument('--encoding', default=0, type=int, help='[0=JSON, 1=BYTES, 2=PROTO, 3=ASCII, 4=JSON_IETF]')
+   parser.add_argument('--qos', default=0, type=int, help='')
+   parser.add_argument('--use_alias', action='store_true', help='use alias')
++  parser.add_argument('--create_connections', type=int, nargs='?', const=1, default=1,
++                      help='Creates specific number of TCP connections with gNMI server side. '
++                      'Default number of TCP connections is 1 and use -1 to create '
++                      'infinite TCP connections.')
+   parser.add_argument('--prefix', default='', help='gRPC path prefix (default: none)')
+   return parser
+ 
+@@ -435,8 +440,9 @@ def subscribe_start(stub, options, req_iterator):
+             break
+   except KeyboardInterrupt:
+       print("Subscribe Session stopped by user.")
+-  except grpc.RpcError as x:
+-      print("grpc.RpcError received:\n%s" %x)
++  except grpc.RpcError as err:
++      print("Received an exception from server side and error message is: '{}'.".format(err))
++      raise
+   except Exception as err:
+       print(err)
+ 
+@@ -465,46 +471,69 @@ def main():
+   user = args['username']
+   password = args['password']
+   form = args['format']
++  create_connections = args['create_connections']
+   paths = _parse_path(_path_names(xpath))
+   kwargs = {'root_cert': root_cert, 'cert_chain': cert_chain,
+             'private_key': private_key}
+   certs = _open_certs(**kwargs)
+   creds = _build_creds(target, port, get_cert, certs, notls)
+-  stub = _create_stub(creds, target, port, host_override)
+-  if mode == 'get':
+-    print('Performing GetRequest, encoding=JSON_IETF', 'to', target,
+-          ' with the following gNMI Path\n', '-'*25, '\n', paths)
+-    response = _get(stub, paths, user, password, prefix)
+-    print('The GetResponse is below\n' + '-'*25 + '\n')
+-    if form == 'protobuff':
+-      print(response)
+-    elif response.notification[0].update[0].val.json_ietf_val:
+-      print(json.dumps(json.loads(response.notification[0].update[0].val.
+-                                  json_ietf_val), indent=2))
+-    elif response.notification[0].update[0].val.string_val:
+-      print(response.notification[0].update[0].val.string_val)
+-    else:
+-      print('JSON Format specified, but gNMI Response was not json_ietf_val')
+-      print(response)
+-  elif mode == 'set-update':
+-    print('Performing SetRequest Update, encoding=JSON_IETF', ' to ', target,
+-          ' with the following gNMI Path\n', '-'*25, '\n', paths, json_value)
+-    response = _set(stub, paths, 'update', user, password, json_value)
+-    print('The SetRequest response is below\n' + '-'*25 + '\n', response)
+-  elif mode == 'set-replace':
+-    print('Performing SetRequest Replace, encoding=JSON_IETF', ' to ', target,
+-          ' with the following gNMI Path\n', '-'*25, '\n', paths)
+-    response = _set(stub, paths, 'replace', user, password, json_value)
+-    print('The SetRequest response is below\n' + '-'*25 + '\n', response)
+-  elif mode == 'set-delete':
+-    print('Performing SetRequest Delete, encoding=JSON_IETF', ' to ', target,
+-          ' with the following gNMI Path\n', '-'*25, '\n', paths)
+-    response = _set(stub, paths, 'delete', user, password, json_value)
+-    print('The SetRequest response is below\n' + '-'*25 + '\n', response)
+-  elif mode == 'subscribe':
+-    request_iterator = gen_request(paths, args, prefix)
+-    subscribe_start(stub, args, request_iterator)
++
++  if create_connections < -1:
++    print('''
++          Default number of TCP connections with gNMI server is 1.
++          Please use the '--create_connections <positive_number>' to
++          create TCP connections or use '--create_connections -1' to
++          create infinite TCP connections.
++          ''', file=sys.stderr)
++    sys.exit(INVALID_GNMI_CLIENT_CONNECTION_NUMBER)
++
++  while True:
++    if create_connections > 0:
++        create_connections -= 1
++    elif create_connections == 0:
++        break
++
++    try:
++      stub = _create_stub(creds, target, port, host_override)
++      if mode == 'get':
++        print('Performing GetRequest, encoding=JSON_IETF', 'to', target,
++              ' with the following gNMI Path\n', '-'*25, '\n', paths)
++        response = _get(stub, paths, user, password, prefix)
++        print('The GetResponse is below\n' + '-'*25 + '\n')
++        if form == 'protobuff':
++          print(response)
++        elif response.notification[0].update[0].val.json_ietf_val:
++          print(json.dumps(json.loads(response.notification[0].update[0].val.
++                                      json_ietf_val), indent=2))
++        elif response.notification[0].update[0].val.string_val:
++          print(response.notification[0].update[0].val.string_val)
++        else:
++          print('JSON Format specified, but gNMI Response was not json_ietf_val')
++          print(response)
++      elif mode == 'set-update':
++        print('Performing SetRequest Update, encoding=JSON_IETF', ' to ', target,
++              ' with the following gNMI Path\n', '-'*25, '\n', paths, json_value)
++        response = _set(stub, paths, 'update', user, password, json_value)
++        print('The SetRequest response is below\n' + '-'*25 + '\n', response)
++      elif mode == 'set-replace':
++        print('Performing SetRequest Replace, encoding=JSON_IETF', ' to ', target,
++              ' with the following gNMI Path\n', '-'*25, '\n', paths)
++        response = _set(stub, paths, 'replace', user, password, json_value)
++        print('The SetRequest response is below\n' + '-'*25 + '\n', response)
++      elif mode == 'set-delete':
++        print('Performing SetRequest Delete, encoding=JSON_IETF', ' to ', target,
++              ' with the following gNMI Path\n', '-'*25, '\n', paths)
++        response = _set(stub, paths, 'delete', user, password, json_value)
++        print('The SetRequest response is below\n' + '-'*25 + '\n', response)
++      elif mode == 'subscribe':
++        request_iterator = gen_request(paths, args, prefix)
++        subscribe_start(stub, args, request_iterator)
++    except grpc.RpcError as err:
++      if err.code() == grpc.StatusCode.UNAVAILABLE:
++        print("Client receives an exception '{}' indicating gNMI server is shut down and Exiting ..."
++              .format(err.details()))
++        sys.exit(GNMI_SERVER_UNAVAILABLE)
+ 
+ 
+ if __name__ == '__main__':
+-  main()
+\ No newline at end of file
++  main()
+-- 
+2.48.1.windows.1
+
diff --git a/dockers/docker-ptf/gnxi-patches/0004-Add-support-for-streaming-structured-events-in-night.patch b/dockers/docker-ptf/gnxi-patches/0004-Add-support-for-streaming-structured-events-in-night.patch
new file mode 100644
index 00000000000..8d82b86492d
--- /dev/null
+++ b/dockers/docker-ptf/gnxi-patches/0004-Add-support-for-streaming-structured-events-in-night.patch
@@ -0,0 +1,88 @@
+From b85e4ab565df4472fdcfcded2a53e6bf57aa493f Mon Sep 17 00:00:00 2001
+From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
+Date: Tue, 20 Jun 2023 13:58:42 -0700
+Subject: [PATCH 4/5] Add support for streaming structured events in nightly
+ test (#3)
+
+What is the motivation of this PR?
+
+This PR adds support for testing structured events as part of nightly test, by adding params: filter_event and event_op_file
+When subscribing to EVENTS/all we will check for filter_event as part of response and then we will add response that contains filter to op_file. Test will then fetch this output file then do parsing logic for yang validation.
+
+How did you do it?
+
+I added options filter_event and event_op_file for supporting nightly tests for event
+
+How did you test/verify it?
+
+I verify this on the ptf docker container binding to the lab device str-s6000-on-6. The command line I used is as following:
+python /gnxi/gnmi_cli_py/py_gnmicli.py -g -t ... -p 50051 -m subscribe -x all -xt EVENTS -o "ndastreamingservertest" --filter_event_regex sonic-events-bgp:bgp-state
+---
+ gnmi_cli_py/py_gnmicli.py | 23 +++++++++++++++++++++--
+ 1 file changed, 21 insertions(+), 2 deletions(-)
+
+diff --git a/gnmi_cli_py/py_gnmicli.py b/gnmi_cli_py/py_gnmicli.py
+index 62d4ec8..c46592a 100644
+--- a/gnmi_cli_py/py_gnmicli.py
++++ b/gnmi_cli_py/py_gnmicli.py
+@@ -37,6 +37,7 @@ import os
+ import re
+ import ssl
+ import sys
++import string
+ import six
+ import datetime
+ try:
+@@ -162,6 +163,7 @@ def _create_parser():
+                       help='Creates specific number of TCP connections with gNMI server side. '
+                       'Default number of TCP connections is 1 and use -1 to create '
+                       'infinite TCP connections.')
++  parser.add_argument('--filter_event_regex', help='Regex to filter event when querying events path')
+   parser.add_argument('--prefix', default='', help='gRPC path prefix (default: none)')
+   return parser
+ 
+@@ -408,6 +410,12 @@ def gen_request(paths, opt, prefix):
+     yield mysubreq
+ 
+ 
++def check_event_response(response, filter_event_regex):
++    resp = str(response)
++    match = re.findall(filter_event_regex, resp)
++    return match
++
++
+ def subscribe_start(stub, options, req_iterator):
+   """ RPC Start for Subscribe reqeust
+   Args:
+@@ -419,6 +427,8 @@ def subscribe_start(stub, options, req_iterator):
+   """
+   metadata = [('username', options['username']), ('password', options['password'])]
+   max_update_count = options["update_count"]
++  filter_event_regex = options["filter_event_regex"]
++
+   try:
+       responses = stub.Subscribe(req_iterator, options['timeout'], metadata=metadata)
+       update_count = 0
+@@ -430,8 +440,17 @@ def subscribe_start(stub, options, req_iterator):
+               print('gNMI Error '+str(response.error.code)+\
+                 ' received\n'+str(response.error.message) + str(response.error))
+           elif response.HasField('update'):
+-              print(response)
+-              update_count = update_count+1
++              if filter_event_regex is not None:
++                  if filter_event_regex is not "":
++                      match = check_event_response(response, filter_event_regex)
++                      if len(match) is not 0:
++                          print(response)
++                          update_count = update_count + 1
++                  else:
++                      raise Exception("Filter event regex should not be empty")
++              else:
++                  print(response)
++                  update_count = update_count+1
+           else:
+               print('Unknown response received:\n'+str(response))
+           
+-- 
+2.48.1.windows.1
+
diff --git a/dockers/docker-ptf/gnxi-patches/0005-Enhance-gnmi_cli_py-4.patch b/dockers/docker-ptf/gnxi-patches/0005-Enhance-gnmi_cli_py-4.patch
new file mode 100644
index 00000000000..78101fbba14
--- /dev/null
+++ b/dockers/docker-ptf/gnxi-patches/0005-Enhance-gnmi_cli_py-4.patch
@@ -0,0 +1,327 @@
+From 3adf8b97755b49947e465b5a14645f11e79fa0cd Mon Sep 17 00:00:00 2001
+From: ganglv <88995770+ganglyu@users.noreply.github.com>
+Date: Fri, 8 Sep 2023 13:15:29 +0800
+Subject: [PATCH 5/5] Enhance gnmi_cli_py (#4)
+
+1. Upgrade grpcio and grpcio-tools
+2. Support origin in gnmi prefix
+3. Print grpc error code
+4. Support PROTO encoding for gnmi get
+5. Ignore / in []
+6. Support proto_bytes for gnmi set
+7. Support multiple path and value for gnmi set, get and subscribe
+---
+ gnmi_cli_py/py_gnmicli.py    | 161 ++++++++++++++++++++++++++---------
+ gnmi_cli_py/requirements.txt |   4 +-
+ 2 files changed, 125 insertions(+), 40 deletions(-)
+
+diff --git a/gnmi_cli_py/py_gnmicli.py b/gnmi_cli_py/py_gnmicli.py
+index c46592a..0ea6f3d 100644
+--- a/gnmi_cli_py/py_gnmicli.py
++++ b/gnmi_cli_py/py_gnmicli.py
+@@ -111,8 +111,11 @@ def _create_parser():
+                       'file (prepend filename with "@")', default='get')
+   parser.add_argument('-val', '--value', type=str, help='Value for SetRequest.'
+                       '\nCan be Leaf value or JSON file. If JSON file, prepend'
+-                      ' with "@"; eg "@interfaces.json".',
+-                      required=False)
++                      ' with "@"; eg "@interfaces.json".'
++                      '\n If empty value for delete operation, use "".',
++                      nargs="+", required=False)
++  parser.add_argument('--proto', type=str, help='Output files for proto bytes',
++                      nargs="*", required=False)
+   parser.add_argument('-pkey', '--private_key', type=str, help='Fully'
+                       'quallified path to Private key to use when establishing'
+                       'a gNMI Channel to the Target', required=False)
+@@ -127,10 +130,13 @@ def _create_parser():
+                       'Target when establishing secure gRPC channel.',
+                       required=False, action='store_true')
+   parser.add_argument('-x', '--xpath', type=str, help='The gNMI path utilized'
+-                      'in the GetRequest or Subscirbe', required=True)
++                      'in the GetRequest or Subscirbe', nargs="+", required=True)
+   parser.add_argument('-xt', '--xpath_target', type=str, help='The gNMI prefix'
+                       'target in the GetRequest or Subscirbe', default=None,
+                       required=False)
++  parser.add_argument('-xo', '--xpath_origin', type=str, help='The gNMI prefix'
++                      'origin in the GetRequest, SetRequest or Subscirbe', default=None,
++                      required=False)
+   parser.add_argument('-o', '--host_override', type=str, help='Use this as '
+                       'Targets hostname/peername when checking it\'s'
+                       'certificate CN. You can check the cert with:\nopenssl '
+@@ -181,7 +187,53 @@ def _path_names(xpath):
+   """
+   if not xpath or xpath == '/':  # A blank xpath was provided at CLI.
+     return []
+-  return xpath.strip().strip('/').split('/')  # Remove leading and trailing '/'.
++  xpath = xpath.strip().strip('/')
++  path = []
++  xpath = xpath + '/'
++  # insideBrackets is true when at least one '[' has been found and no
++  # ']' has been found. It is false when a closing ']' has been found.
++  insideBrackets = False
++  # begin marks the beginning of a path element, which is separated by
++  # '/' unclosed between '[' and ']'.
++  begin = 0
++  # end marks the end of a path element, which is separated by '/'
++  # unclosed between '[' and ']'.
++  end = 0
++
++  # Split the given string using unescaped '/'.
++  while end < len(xpath):
++    if xpath[end] == '/':
++      if not insideBrackets:
++        # Current '/' is a valid path element
++        # separator.
++        if end > begin:
++          path.append(xpath[begin:end])
++        end += 1
++        begin = end
++      else:
++        # Current '/' must be part of a List key value
++        # string.
++        end += 1
++    elif xpath[end] == '[':
++      if (end == 0 or xpath[end-1] != '\\') and not insideBrackets:
++        # Current '[' is unescacped, and is the
++        # beginning of List key-value pair(s) string.
++        insideBrackets = True
++      end += 1
++    elif xpath[end] == ']':
++      if (end == 0 or xpath[end-1] != '\\') and insideBrackets:
++        # Current ']' is unescacped, and is the end of
++        # List key-value pair(s) string.
++        insideBrackets = False
++      end += 1
++    else:
++      end += 1
++
++  if insideBrackets:
++    print("missing ] in path string: %s" % xpath)
++    return []
++
++  return path
+ 
+ 
+ def _parse_path(p_names):
+@@ -275,6 +327,16 @@ def _get_val(json_value):
+       raise JsonReadError('Error while loading JSON: %s' % str(e))
+     val.json_ietf_val = json.dumps(set_json).encode()
+     return val
++  elif '$' in json_value:
++    try:
++      proto_bytes = six.moves.builtins.open(json_value.strip('$'), 'rb').read()
++    except (IOError, ValueError) as e:
++      raise ValueError('Error while loading %s: %s' % (json_value.strip('$'), str(e)))
++    val.proto_bytes = proto_bytes
++    return val
++  elif json_value == '':
++    # GNMI client should use delete operation for empty string
++    return None
+   coerced_val = _format_type(json_value)
+   type_to_value = {bool: 'bool_val', int: 'int_val', float: 'float_val',
+                    str: 'string_val'}
+@@ -283,16 +345,16 @@ def _get_val(json_value):
+   return val
+ 
+ 
+-def _get(stub, paths, username, password, prefix):
++def _get(stub, paths, username, password, prefix, encoding):
+   """Create a gNMI GetRequest.
+ 
+   Args:
+     stub: (class) gNMI Stub used to build the secure channel.
+-    paths: gNMI Path
++    paths: (list) gNMI Path
+     username: (str) Username used when building the channel.
+     password: (str) Password used when building the channel.
+     prefix: gNMI Path
+-
++    encoding: (int) Encoding
+   Returns:
+     a gnmi_pb2.GetResponse object representing a gNMI GetResponse.
+   """
+@@ -300,35 +366,40 @@ def _get(stub, paths, username, password, prefix):
+   if username:  # User/pass supplied for Authentication.
+     kwargs = {'metadata': [('username', username), ('password', password)]}
+   return stub.Get(
+-      gnmi_pb2.GetRequest(prefix=prefix, path=[paths], encoding='JSON_IETF'),
++      gnmi_pb2.GetRequest(prefix=prefix, path=paths, encoding=encoding),
+                   **kwargs)
+ 
+-def _set(stub, paths, set_type, username, password, json_value):
++def _set(stub, prefix, paths, set_type, username, password, value_list):
+   """Create a gNMI SetRequest.
+ 
+   Args:
+     stub: (class) gNMI Stub used to build the secure channel.
+-    paths: gNMI Path
++    paths: (list) gNMI Path
+     set_type: (str) Type of gNMI SetRequest.
+     username: (str) Username used when building the channel.
+     password: (str) Password used when building the channel.
+-    json_value: (str) JSON_IETF or file.
++    value_list: (list) JSON_IETF or file.
+ 
+   Returns:
+     a gnmi_pb2.SetResponse object representing a gNMI SetResponse.
+   """
+-  if json_value:  # Specifying ONLY a path is possible (eg delete).
+-    val = _get_val(json_value)
+-    path_val = gnmi_pb2.Update(path=paths, val=val,)
+-
++  delete_list = []
++  update_list = []
++  replace_list = []
++  for path, value in zip(paths, value_list):
++    val = _get_val(value)
++    if val is None:
++      delete_list.append(path)
++    elif set_type == 'update':
++      path_val = gnmi_pb2.Update(path=path, val=val,)
++      update_list.append(path_val)
++    elif set_type == 'replace':
++      path_val = gnmi_pb2.Update(path=path, val=val,)
++      replace_list.append(path_val)
+   kwargs = {}
+   if username:
+     kwargs = {'metadata': [('username', username), ('password', password)]}
+-  if set_type == 'delete':
+-    return stub.Set(gnmi_pb2.SetRequest(delete=[paths]), **kwargs)
+-  elif set_type == 'update':
+-    return stub.Set(gnmi_pb2.SetRequest(update=[path_val]), **kwargs)
+-  return stub.Set(gnmi_pb2.SetRequest(replace=[path_val]), **kwargs)
++  return stub.Set(gnmi_pb2.SetRequest(prefix=prefix, delete=delete_list, update=update_list, replace=replace_list), **kwargs)
+ 
+ 
+ def _build_creds(target, port, get_cert, certs, notls):
+@@ -378,17 +441,18 @@ def _open_certs(**kwargs):
+ def gen_request(paths, opt, prefix):
+     """Create subscribe request for passed xpath.
+     Args:
+-        paths: (str) gNMI path.
++        paths: (list) gNMI path.
+         opt: (dict) Command line argument passed for subscribe reqeust.
+     Returns:
+       gNMI SubscribeRequest object.
+     """
+     mysubs = []
+-    mysub = gnmi_pb2.Subscription(path=paths, mode=opt["submode"],
+-      sample_interval=opt["interval"]*1000000,
+-        heartbeat_interval=opt['heartbeat']*1000000,
+-          suppress_redundant=opt['suppress'])
+-    mysubs.append(mysub)
++    for path in paths:
++      mysub = gnmi_pb2.Subscription(path=path, mode=opt["submode"],
++        sample_interval=opt["interval"]*1000000,
++          heartbeat_interval=opt['heartbeat']*1000000,
++            suppress_redundant=opt['suppress'])
++      mysubs.append(mysub)
+ 
+     if prefix:
+       myprefix = prefix
+@@ -482,16 +546,22 @@ def main():
+   get_cert = args['get_cert']
+   root_cert = args['root_cert']
+   cert_chain = args['cert_chain']
+-  json_value = args['value']
++  value_list = args['value']
+   private_key = args['private_key']
+-  xpath = args['xpath']
+-  prefix = gnmi_pb2.Path(target=args['xpath_target'])
++  xpath_list = args['xpath']
++  proto_list = args['proto']
++  # In the case that a prefix is specified, it MUST specify any required origin
++  prefix = gnmi_pb2.Path(origin=args['xpath_origin'], target=args['xpath_target'])
+   host_override = args['host_override']
+   user = args['username']
+   password = args['password']
+   form = args['format']
+   create_connections = args['create_connections']
+-  paths = _parse_path(_path_names(xpath))
++  encoding = args['encoding']
++  paths = []
++  if xpath_list:
++    for xpath in xpath_list:
++      paths.append(_parse_path(_path_names(xpath)))
+   kwargs = {'root_cert': root_cert, 'cert_chain': cert_chain,
+             'private_key': private_key}
+   certs = _open_certs(**kwargs)
+@@ -517,13 +587,25 @@ def main():
+       if mode == 'get':
+         print('Performing GetRequest, encoding=JSON_IETF', 'to', target,
+               ' with the following gNMI Path\n', '-'*25, '\n', paths)
+-        response = _get(stub, paths, user, password, prefix)
++        response = _get(stub, paths, user, password, prefix, encoding)
+         print('The GetResponse is below\n' + '-'*25 + '\n')
+-        if form == 'protobuff':
++        if encoding == 2:
++          i = 0
++          for notification in response.notification:
++            for update in notification.update:
++              if i >= len(proto_list):
++                print("Not enough files: %s" % str(proto_list))
++                sys.exit(1)
++              with open(proto_list[i], 'wb') as fp:
++                fp.write(update.val.proto_bytes)
++              i += 1
++        elif form == 'protobuff':
+           print(response)
+         elif response.notification[0].update[0].val.json_ietf_val:
+-          print(json.dumps(json.loads(response.notification[0].update[0].val.
+-                                      json_ietf_val), indent=2))
++          for notification in response.notification:
++            for update in notification.update:
++              print(json.dumps(json.loads(update.val.json_ietf_val), indent=2))
++              print('-'*25 + '\n')
+         elif response.notification[0].update[0].val.string_val:
+           print(response.notification[0].update[0].val.string_val)
+         else:
+@@ -531,18 +613,18 @@ def main():
+           print(response)
+       elif mode == 'set-update':
+         print('Performing SetRequest Update, encoding=JSON_IETF', ' to ', target,
+-              ' with the following gNMI Path\n', '-'*25, '\n', paths, json_value)
+-        response = _set(stub, paths, 'update', user, password, json_value)
++              ' with the following gNMI Path\n', '-'*25, '\n', paths, value_list)
++        response = _set(stub, prefix, paths, 'update', user, password, value_list)
+         print('The SetRequest response is below\n' + '-'*25 + '\n', response)
+       elif mode == 'set-replace':
+         print('Performing SetRequest Replace, encoding=JSON_IETF', ' to ', target,
+               ' with the following gNMI Path\n', '-'*25, '\n', paths)
+-        response = _set(stub, paths, 'replace', user, password, json_value)
++        response = _set(stub, prefix, paths, 'replace', user, password, value_list)
+         print('The SetRequest response is below\n' + '-'*25 + '\n', response)
+       elif mode == 'set-delete':
+         print('Performing SetRequest Delete, encoding=JSON_IETF', ' to ', target,
+               ' with the following gNMI Path\n', '-'*25, '\n', paths)
+-        response = _set(stub, paths, 'delete', user, password, json_value)
++        response = _set(stub, prefix, paths, 'delete', user, password, value_list)
+         print('The SetRequest response is below\n' + '-'*25 + '\n', response)
+       elif mode == 'subscribe':
+         request_iterator = gen_request(paths, args, prefix)
+@@ -552,6 +634,9 @@ def main():
+         print("Client receives an exception '{}' indicating gNMI server is shut down and Exiting ..."
+               .format(err.details()))
+         sys.exit(GNMI_SERVER_UNAVAILABLE)
++      else:
++        print("GRPC error\n {}".format(err.details()))
++        sys.exit(1)
+ 
+ 
+ if __name__ == '__main__':
+diff --git a/gnmi_cli_py/requirements.txt b/gnmi_cli_py/requirements.txt
+index dab2db6..e32b3ff 100644
+--- a/gnmi_cli_py/requirements.txt
++++ b/gnmi_cli_py/requirements.txt
+@@ -1,6 +1,6 @@
+ enum34==1.1.6
+ futures==3.2.0
+-grpcio==1.18.0
+-grpcio-tools==1.15.0
++grpcio==1.41.1
++grpcio-tools==1.41.1
+ protobuf==3.6.1 --no-binary=protobuf
+ six==1.12.0
+-- 
+2.48.1.windows.1
+
diff --git a/dockers/docker-ptf/gnxi-patches/0006-Add-support-for-extensive-configurations.patch b/dockers/docker-ptf/gnxi-patches/0006-Add-support-for-extensive-configurations.patch
new file mode 100644
index 00000000000..a84d9bb2305
--- /dev/null
+++ b/dockers/docker-ptf/gnxi-patches/0006-Add-support-for-extensive-configurations.patch
@@ -0,0 +1,48 @@
+From 5c8bc9e0142952748b327375ea2a45813dfe297f Mon Sep 17 00:00:00 2001
+From: ganglyu <ganglv@microsoft.com>
+Date: Wed, 9 Apr 2025 16:04:04 +0800
+Subject: [PATCH] Add args file to support huge configurations
+
+The command line has a length limitation, which restricts the number of configurations it can support. To overcome this limitation, introduce a new argument: arg_file. Users can place extensive configurations within the arg_file, enabling the GNMI client to handle a larger and more complex set of configurations.
+
+---
+ gnmi_cli_py/py_gnmicli.py | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/gnmi_cli_py/py_gnmicli.py b/gnmi_cli_py/py_gnmicli.py
+index 0ea6f3d..00549e3 100644
+--- a/gnmi_cli_py/py_gnmicli.py
++++ b/gnmi_cli_py/py_gnmicli.py
+@@ -35,6 +35,7 @@ import json
+ import logging
+ import os
+ import re
++import shlex
+ import ssl
+ import sys
+ import string
+@@ -94,6 +95,8 @@ def _create_parser():
+       '\npython py_gnmicli.py -t 127.0.0.1 -p 8080 -x \'/access-points/'
+       'access-point[hostname=test-ap]/\' -rcert ~/certs/target-cert.crt -o '
+       'openconfig.example.com')
++  parser.add_argument('--arg_file', type=str, help='The args file',
++                      required=False)
+   parser.add_argument('-t', '--target', type=str, help='The gNMI Target',
+                       required=True)
+   parser.add_argument('-p', '--port', type=str, help='The port the gNMI Target '
+@@ -533,6 +536,12 @@ def subscribe_start(stub, options, req_iterator):
+ def main():
+   argparser = _create_parser()
+   args = vars(argparser.parse_args())
++  # Merge input args with args from arg_file if specified
++  if args['arg_file']:
++      with open(args['arg_file'], 'r') as file:
++          file_content = file.read()
++          simulated_args = shlex.split(file_content)
++          args.update(vars(argparser.parse_args(simulated_args)))
+   if args['version']:
+     print(__version__)
+     sys.exit()
+-- 
+2.48.1.windows.1
+
diff --git a/dockers/docker-ptf/gnxi-patches/0007-Fix-py_gnmicli.py-POLL-mode.patch b/dockers/docker-ptf/gnxi-patches/0007-Fix-py_gnmicli.py-POLL-mode.patch
new file mode 100644
index 00000000000..c7693bf5c62
--- /dev/null
+++ b/dockers/docker-ptf/gnxi-patches/0007-Fix-py_gnmicli.py-POLL-mode.patch
@@ -0,0 +1,111 @@
+From 8bda329bbcf455b7d403b1d1b06bb616578615c7 Mon Sep 17 00:00:00 2001
+From: Zain Budhwani <zainbudhwani@microsoft.com>
+Date: Mon, 21 Apr 2025 20:55:38 +0000
+Subject: [PATCH] Fix py_gnmicli.py POLL mode
+
+---
+ gnmi_cli_py/py_gnmicli.py | 26 ++++++++++++++++++++++++--
+ 1 file changed, 24 insertions(+), 2 deletions(-)
+
+diff --git a/gnmi_cli_py/py_gnmicli.py b/gnmi_cli_py/py_gnmicli.py
+index 0ea6f3d..473d193 100644
+--- a/gnmi_cli_py/py_gnmicli.py
++++ b/gnmi_cli_py/py_gnmicli.py
+@@ -39,6 +39,7 @@ import ssl
+ import sys
+ import string
+ import six
++import time
+ import datetime
+ try:
+   import gnmi_pb2
+@@ -47,6 +48,7 @@ except ImportError:
+         'eg, pip install -r requirements.txt')
+ import gnmi_pb2_grpc
+ import grpc
++from gnmi_pb2 import Poll
+ 
+ __version__ = '0.5'
+ 
+@@ -153,6 +155,8 @@ def _create_parser():
+                       required=False, action='store_true')
+   parser.add_argument('--interval', default=10000, type=int,
+                       help='sample interval in millisecond (default: 10000ms)')
++  parser.add_argument('--polling_interval', default=10, type=int,
++                      help='polling interval in second (default: 10)')
+   parser.add_argument('--timeout', type=int, help='subscription'
+                       'duration in seconds (default: none)')
+   parser.add_argument('--heartbeat', default=0, type=int, help='heartbeat interval (default: None)')
+@@ -161,6 +165,7 @@ def _create_parser():
+   parser.add_argument('--submode', default=2, type=int,
+                       help='subscription mode [0=TARGET_DEFINED, 1=ON_CHANGE, 2=SAMPLE]')
+   parser.add_argument('--update_count', default=0, type=int, help='Max number of streaming updates to receive. 0 means no limit.')
++  parser.add_argument('--max_sync_count', default=-1, type=int, help='Max number of sync responses to receive. -1 means no limit.')
+   parser.add_argument('--subscribe_mode', default=0, type=int, help='[0=STREAM, 1=ONCE, 2=POLL]')
+   parser.add_argument('--encoding', default=0, type=int, help='[0=JSON, 1=BYTES, 2=PROTO, 3=ASCII, 4=JSON_IETF]')
+   parser.add_argument('--qos', default=0, type=int, help='')
+@@ -203,11 +208,17 @@ def _path_names(xpath):
+   # Split the given string using unescaped '/'.
+   while end < len(xpath):
+     if xpath[end] == '/':
++      if end > 0:
++        if xpath[end-1] == '\\':
++          end += 1
++          continue
+       if not insideBrackets:
+         # Current '/' is a valid path element
+         # separator.
+         if end > begin:
+-          path.append(xpath[begin:end])
++          element = xpath[begin:end]
++          element = element.replace('\\', '')
++          path.append(element)
+         end += 1
+         begin = end
+       else:
+@@ -473,6 +484,11 @@ def gen_request(paths, opt, prefix):
+     print('Sending SubscribeRequest\n'+str(mysubreq))
+     yield mysubreq
+ 
++    if opt["subscribe_mode"] == gnmi_pb2.SubscriptionList.POLL:
++      while True:
++        poll_request = gnmi_pb2.SubscribeRequest(poll = Poll())
++        yield poll_request
++        time.sleep(opt["polling_interval"])
+ 
+ def check_event_response(response, filter_event_regex):
+     resp = str(response)
+@@ -491,15 +507,21 @@ def subscribe_start(stub, options, req_iterator):
+   """
+   metadata = [('username', options['username']), ('password', options['password'])]
+   max_update_count = options["update_count"]
++  max_sync_count = options["max_sync_count"]
+   filter_event_regex = options["filter_event_regex"]
+ 
+   try:
+       responses = stub.Subscribe(req_iterator, options['timeout'], metadata=metadata)
+       update_count = 0
++      sync_count = 0
+       for response in responses:
++          if sync_count != -1 and sync_count == max_sync_count:
++            print("Max sync responses count reached {0}".format(sync_count))
++            break
+           print('{0} response received: '.format(datetime.datetime.now()))
+           if response.HasField('sync_response'):
+               print(str(response))
++              sync_count = sync_count + 1
+           elif response.HasField('error'):
+               print('gNMI Error '+str(response.error.code)+\
+                 ' received\n'+str(response.error.message) + str(response.error))
+@@ -517,7 +539,7 @@ def subscribe_start(stub, options, req_iterator):
+                   update_count = update_count+1
+           else:
+               print('Unknown response received:\n'+str(response))
+-          
++
+           if max_update_count != 0 and update_count == max_update_count:
+             print("Max update count reached {0}".format(update_count))
+             break
+-- 
+2.25.1
+
diff --git a/dockers/docker-ptf/gnxi-patches/series b/dockers/docker-ptf/gnxi-patches/series
new file mode 100644
index 00000000000..f74c348cc05
--- /dev/null
+++ b/dockers/docker-ptf/gnxi-patches/series
@@ -0,0 +1,7 @@
+0001-add-xpath_target-option.patch
+0002-Adding-support-for-subscribe-mode-1.patch
+0003-gNMI_client-Add-an-option-to-trigger-memory-spike-on.patch
+0004-Add-support-for-streaming-structured-events-in-night.patch
+0005-Enhance-gnmi_cli_py-4.patch
+0006-Add-support-for-extensive-configurations.patch
+0007-Fix-py_gnmicli.py-POLL-mode.patch
diff --git a/dockers/docker-ptf/tacacs+ b/dockers/docker-ptf/tacacs+
new file mode 100644
index 00000000000..9468ca42d16
--- /dev/null
+++ b/dockers/docker-ptf/tacacs+
@@ -0,0 +1,6 @@
+# This is the configuration file for /etc/init.d/tacacs+
+# You can overwrite default arguments passed to the daemon here.
+# See man(8) tac_plus
+
+
+DAEMON_OPTS="-d 2058 -l /var/log/tac_plus.log -C /etc/tacacs+/tac_plus.conf"
\ No newline at end of file
diff --git a/dockers/docker-ptf/tacacs_plus b/dockers/docker-ptf/tacacs_plus
new file mode 100755
index 00000000000..b01b7938a44
--- /dev/null
+++ b/dockers/docker-ptf/tacacs_plus
@@ -0,0 +1,247 @@
+#!/bin/sh
+### BEGIN INIT INFO
+# Provides:          tacacs+
+# Required-Start:    $network $local_fs $syslog $remote_fs
+# Required-Stop:     $network $local_fs $remote_fs
+# Should-Start:      $named
+# Default-Start:     2 3 4 5
+# Default-Stop:      0 1 6
+# Short-Description: TACACS+ authentication daemon
+### END INIT INFO
+
+# tacacs+ 4.0.4.28 compiled from source on PTF image based
+# on Bullseye (Debian 11) contains the old sysvinit script
+# This LSB compatible debian script replaces that.
+
+PATH=/usr/local/sbin:/usr/local/bin:/sbin:/bin:/usr/sbin:/usr/bin
+
+DAEMON=/usr/sbin/tac_plus
+NAME="tacacs+"              
+DESC="TACACS+ authentication daemon"              
+LOGDIR=/var/log/
+STARTTIME=1
+
+PIDFILE=/var/run/tac_plus.pid
+
+test -x $DAEMON || exit 0
+
+. /lib/lsb/init-functions
+
+# Default options, these can be overriden by the information
+# at /etc/default/$NAME
+DAEMON_OPTS="-C /etc/tacacs+/tac_plus.conf"          # Additional options given to the server
+
+                        
+LOGFILE=$LOGDIR/tac_plus.log  # Server logfile
+
+# Include defaults if available
+if [ -f /etc/default/$NAME ] ; then
+	. /etc/default/$NAME
+fi
+
+# Check that the user exists (if we set a user)
+# Does the user exist?
+if [ -n "$DAEMONUSER" ] ; then
+    if getent passwd | grep -q "^$DAEMONUSER:"; then
+        # Obtain the uid and gid
+        DAEMONUID=`getent passwd |grep "^$DAEMONUSER:" | awk -F : '{print $3}'`
+        DAEMONGID=`getent passwd |grep "^$DAEMONUSER:" | awk -F : '{print $4}'`
+    else
+        log_failure_msg "The user $DAEMONUSER, required to run $NAME does not exist."
+        exit 1
+    fi
+fi
+
+
+set -e
+
+running_pid() {
+# Check if a given process pid's cmdline matches a given name
+    pid=$1
+    name=$2
+    [ -z "$pid" ] && return 1
+    [ ! -d /proc/$pid ] &&  return 1
+    cmd=`cat /proc/$pid/cmdline | tr "\000" "\n"|head -n 1 |cut -d : -f 1`
+    # Is this the expected server
+    [ "$cmd" != "$name" ] &&  return 1
+    return 0
+}
+
+running() {
+# Check if the process is running looking at /proc
+# (works for all users)
+
+    # No pidfile, probably no daemon present
+    [ ! -f "$PIDFILE" ] && return 1
+    pid=`cat $PIDFILE`
+    running_pid $pid $DAEMON || return 1
+    return 0
+}
+
+start_server() {
+# Start the process using the wrapper
+    if check_config_quiet ; then
+         start-stop-daemon --start --quiet --pidfile $PIDFILE \
+                --exec $DAEMON -- $DAEMON_OPTS
+         errcode=$?
+         return $errcode
+    else
+         return $?
+    fi
+
+}
+
+stop_server() {
+    killproc -p $PIDFILE $DAEMON
+    return $?
+}
+
+reload_server() {
+    if check_config_quiet ; then
+         [ ! -f "$PIDFILE" ] && return 1
+         pid=`cat $PIDFILE` # This is the daemon's pid
+         # Send a SIGHUP
+         kill -1 $pid
+         return $?
+    else
+         return $?
+    fi
+}
+
+check_config() {
+	$DAEMON -P $DAEMON_OPTS
+	return $?	
+}
+
+check_config_quiet() {
+	$DAEMON -P $DAEMON_OPTS >/dev/null 2>&1
+	return $?	
+}
+
+force_stop() {
+# Force the process to die killing it manually
+	[ ! -e "$PIDFILE" ] && return
+	if running ; then
+		kill -15 $pid
+	# Is it really dead?
+		sleep "$DIETIME"s
+		if running ; then
+			kill -9 $pid
+			sleep "$DIETIME"s
+			if running ; then
+				echo "Cannot kill $NAME (pid=$pid)!"
+				exit 1
+			fi
+		fi
+	fi
+	rm -f $PIDFILE
+}
+
+
+case "$1" in
+  start)
+	log_daemon_msg "Starting $DESC " "$NAME"
+        # Check if it's running first
+        if running ;  then
+            log_progress_msg "apparently already running"
+            log_end_msg 0
+            exit 0
+        fi
+        if start_server ; then
+            # NOTE: Some servers might die some time after they start,
+            # this code will detect this issue if STARTTIME is set
+            # to a reasonable value
+            [ -n "$STARTTIME" ] && sleep $STARTTIME # Wait some time 
+            if  running ;  then
+                # It's ok, the server started and is running
+                log_end_msg 0
+            else
+                # It is not running after we did start
+                log_end_msg 1
+            fi
+        else
+            # Either we could not start it
+            log_end_msg 1
+        fi
+	;;
+  stop)
+        log_daemon_msg "Stopping $DESC" "$NAME"
+        if running ; then
+            # Only stop the server if we see it running
+			errcode=0
+            stop_server || errcode=$?
+            log_end_msg $errcode
+        else
+            # If it's not running don't do anything
+            log_progress_msg "apparently not running"
+            log_end_msg 0
+            exit 0
+        fi
+        ;;
+  force-stop)
+        # First try to stop gracefully the program
+        $0 stop
+        if running; then
+            # If it's still running try to kill it more forcefully
+            log_daemon_msg "Stopping (force) $DESC" "$NAME"
+			errcode=0
+            force_stop || errcode=$?
+            log_end_msg $errcode
+        fi
+	;;
+  restart|force-reload)
+        log_daemon_msg "Restarting $DESC" "$NAME"
+		errcode=0
+        stop_server || errcode=$?
+        # Wait some sensible amount, some server need this
+        [ -n "$DIETIME" ] && sleep $DIETIME
+        start_server || errcode=$?
+        [ -n "$STARTTIME" ] && sleep $STARTTIME
+        running || errcode=$?
+        log_end_msg $errcode
+	;;
+  status)
+
+        log_daemon_msg "Checking status of $DESC" "$NAME"
+        if running ;  then
+            log_progress_msg "running"
+            log_end_msg 0
+        else
+            log_progress_msg "apparently not running"
+            log_end_msg 1
+            exit 1
+        fi
+        ;;
+  # Use this if the daemon cannot reload
+  reload)
+	log_daemon_msg "Reloading $DESC configuration files" "$NAME"
+	if reload_server ; then
+		if running ; then
+			log_end_msg 0
+		else 
+			log_progress_msg "$NAME not running"
+			log_end_msg 1
+		fi
+	else
+		log_progress_msg "Reload failled"
+		log_end_msg 1
+	fi
+        ;;
+  check)
+	check_config
+	if [ X$? = "X0" ]
+	then
+		log_daemon_msg "Checking $DESC configuration files successful" "$NAME"
+	else
+		log_daemon_msg "Checking $DESC configuration files failed"
+		exit 1
+	fi
+	;;
+  *)
+	N=/etc/init.d/tacacs_plus
+	echo "Usage: $N {start|stop|force-stop|restart|reload|force-reload|status|check}" >&2
+	exit 1
+	;;
+esac
+
+exit 0
diff --git a/dockers/docker-sonic-bmp/Dockerfile.j2 b/dockers/docker-sonic-bmp/Dockerfile.j2
index 2e79001dbf9..8b4fbbae067 100755
--- a/dockers/docker-sonic-bmp/Dockerfile.j2
+++ b/dockers/docker-sonic-bmp/Dockerfile.j2
@@ -40,11 +40,10 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["critical_processes", "/etc/supervisor/"]
 
 RUN chmod +x /usr/bin/bmp.sh
-RUN touch /var/log/openbmpd.log
 
 RUN apt-get clean -y      && \
     apt-get autoclean -y  && \
     apt-get autoremove -y && \
     rm -rf /debs
 
-ENTRYPOINT ["/usr/local/bin/supervisord"]
\ No newline at end of file
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/dockers/docker-sonic-bmp/base_image_files/monit_bmp b/dockers/docker-sonic-bmp/base_image_files/monit_bmp
index 353a716455d..ed239bcdf70 100644
--- a/dockers/docker-sonic-bmp/base_image_files/monit_bmp
+++ b/dockers/docker-sonic-bmp/base_image_files/monit_bmp
@@ -1,5 +1,5 @@
 ###############################################################################
 ## Monit configuration for bmp container
 ###############################################################################
-check program container_memory_bmp with path "/usr/bin/memory_checker bmp 419430400"
+check program container_memory_bmp with path "/usr/bin/memory_checker bmp 838860800"
     if status == 3 for 10 times within 20 cycles then exec "/usr/bin/docker exec bmp supervisorctl restart openbmpd"
diff --git a/dockers/docker-sonic-bmp/supervisord.conf b/dockers/docker-sonic-bmp/supervisord.conf
index c36907f85e7..c58316ff166 100644
--- a/dockers/docker-sonic-bmp/supervisord.conf
+++ b/dockers/docker-sonic-bmp/supervisord.conf
@@ -55,8 +55,9 @@ stderr_syslog=true
 dependent_startup=true
 
 [program:openbmpd]
-command=/usr/bin/openbmpd -f -l /var/log/openbmpd.log -c /etc/bmp/openbmpd.conf
+command=/usr/bin/openbmpd -f -c /etc/bmp/openbmpd.conf
 priority=3
+stopsignal=KILL
 autostart=false
 autorestart=false
 stdout_logfile=NONE
diff --git a/dockers/docker-sonic-mgmt/0003-add-dataplane-mask-counters-to-avoid-dataplane-noise.patch b/dockers/docker-sonic-mgmt/0003-add-dataplane-mask-counters-to-avoid-dataplane-noise.patch
new file mode 100644
index 00000000000..a3014ed0292
--- /dev/null
+++ b/dockers/docker-sonic-mgmt/0003-add-dataplane-mask-counters-to-avoid-dataplane-noise.patch
@@ -0,0 +1,57 @@
+From a1e0c25218b5bac0adeebcbd95b29618b4cadf3d Mon Sep 17 00:00:00 2001
+From: wenda <wendachu@microsoft.com>
+Date: Fri, 11 Apr 2025 09:57:23 +0000
+Subject: [PATCH] 0003-add-dataplane-mask-counters-to-avoid-dataplane-noise
+
+---
+ src/ptf/dataplane.py | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+diff --git a/src/ptf/dataplane.py b/src/ptf/dataplane.py
+index a5d4664..0aee7ab 100644
+--- a/src/ptf/dataplane.py
++++ b/src/ptf/dataplane.py
+@@ -574,6 +574,12 @@ class DataPlane(Thread):
+         # counters of transmited packets
+         self.tx_counters = defaultdict(int)
+ 
++        # rx/tx counters of packets that matching the packet mask
++        # the key of dict is mask
++        # the value is a dict of device number, port number to count
++        self.mask_rx_cnt = {}
++        self.mask_tx_cnt = {}
++
+         # cvar serves double duty as a regular top level lock and
+         # as a condition variable
+         self.cvar = Condition()
+@@ -665,6 +671,9 @@ class DataPlane(Thread):
+                             self.logger.debug("Discarding oldest packet to make room")
+                         queue.append((pkt, timestamp))
+                         self.rx_counters[(device_number, port_number)] += 1
++                        for mask, cnt in self.mask_rx_cnt.items():
++                            if match_exp_pkt(mask, pkt):
++                                cnt[(device_number, port_number)] += 1
+                 self.cvar.notify_all()
+ 
+         self.logger.info("Thread exit")
+@@ -731,6 +740,9 @@ class DataPlane(Thread):
+             self.pcap_writer.write(packet, time.time(), device_number, port_number)
+         bytes = self.ports[(device_number, port_number)].send(packet)
+         self.tx_counters[(device_number, port_number)] += 1
++        for mask, cnt in self.mask_tx_cnt.items():
++            if match_exp_pkt(mask, packet):
++                cnt[(device_number, port_number)] += 1
+         if bytes != len(packet):
+             self.logger.error(
+                 "Unhandled send error, length mismatch %d != %d" % (bytes, len(packet))
+@@ -1038,3 +1050,8 @@ class DataPlane(Thread):
+                 self.pcap_writer.close()
+                 self.pcap_writer = None
+                 self.cvar.notify_all()
++
++    def create_mask_counters(self, mask):
++        """Create a new mask counters"""
++        self.mask_rx_cnt[mask] = defaultdict(int)
++        self.mask_tx_cnt[mask] = defaultdict(int)
+-- 
+2.49.0
diff --git a/dockers/docker-sonic-mgmt/Dockerfile.j2 b/dockers/docker-sonic-mgmt/Dockerfile.j2
index 831786288c2..3f0b350a01d 100755
--- a/dockers/docker-sonic-mgmt/Dockerfile.j2
+++ b/dockers/docker-sonic-mgmt/Dockerfile.j2
@@ -39,7 +39,8 @@ RUN apt-get update && apt-get install -y apt-transport-https \
                                          sudo \
                                          tcpdump \
                                          telnet \
-                                         vim
+                                         vim \
+                                         bats
 
 RUN python3 -m pip install --upgrade pip setuptools wheel
 RUN python3 -m pip install aiohttp \
@@ -61,7 +62,7 @@ RUN python3 -m pip install aiohttp \
                  ipaddr \
                  ipython==8.12.2 \
                  ixload \
-                 ixnetwork-restpy==1.0.64 \
+                 ixnetwork-restpy==1.6.1 \
                  ixnetwork-open-traffic-generator==0.0.79 \
                  jinja2==3.1.2 \
                  jsonpatch \
@@ -103,13 +104,13 @@ RUN python3 -m pip install aiohttp \
                  scapy==2.5.0 \
                  setuptools-rust \
                  six \
-                 snappi==0.9.1 \
-                 snappi-convergence==0.4.1 \
-                 snappi-ixnetwork==0.9.1 \
+                 snappi==1.27.1 \
+                 snappi-ixnetwork==1.27.2 \
                  tabulate \
                  textfsm==1.1.2 \
                  thrift==0.11.0 \
                  virtualenv \
+                 debugpy \
     && wget https://github.com/nanomsg/nanomsg/archive/1.2.tar.gz \
     && tar xvfz 1.2.tar.gz \
     && cd nanomsg-1.2      \
@@ -142,14 +143,17 @@ RUN python2 -m pip install allure-pytest==2.8.22 \
                 "future>=0.16.0" \
                 gitpython \
                 ipaddr \
+                ipaddress \
                 ipython==5.4.1 \
                 ixload \
                 ixnetwork-restpy==1.0.64 \
                 ixnetwork-open-traffic-generator==0.0.79 \
+                snappi_ixload==0.0.5 \
                 jinja2==2.10.1 \
                 jsonpatch \
                 lazy-object-proxy==1.6.0 \
                 lxml \
+                macaddress \
                 mock \
                 msrest==0.6.21 \
                 natsort \
@@ -209,16 +213,18 @@ RUN mkdir -p /etc/apt/keyrings \
     && echo "deb [arch=`dpkg --print-architecture` signed-by=/etc/apt/keyrings/microsoft.gpg] https://packages.microsoft.com/repos/azure-cli/ `lsb_release -cs` main" | tee /etc/apt/sources.list.d/azure-cli.list \
     && apt-get update && apt-get install -y azure-cli
 
+# Remove old python protobuf package if existing
+RUN python3 -m pip show protobuf && python3 -m pip uninstall -y protobuf
 # Install protobuf 3.21.12 which is from https://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.dsc
 RUN mkdir -p /tmp/protobuf \
     && cd /tmp/protobuf \
-    && wget https://sonicstorage.blob.core.windows.net/public/ubuntu/20.04/libprotobuf-dev_3.21.12-3_amd64.deb \
-    && wget https://sonicstorage.blob.core.windows.net/public/ubuntu/20.04/libprotobuf-lite32_3.21.12-3_amd64.deb \
-    && wget https://sonicstorage.blob.core.windows.net/public/ubuntu/20.04/libprotobuf32_3.21.12-3_amd64.deb \
-    && wget https://sonicstorage.blob.core.windows.net/public/ubuntu/20.04/libprotoc-dev_3.21.12-3_amd64.deb \
-    && wget https://sonicstorage.blob.core.windows.net/public/ubuntu/20.04/libprotoc32_3.21.12-3_amd64.deb \
-    && wget https://sonicstorage.blob.core.windows.net/public/ubuntu/20.04/protobuf-compiler_3.21.12-3_amd64.deb \
-    && wget https://sonicstorage.blob.core.windows.net/public/ubuntu/20.04/python3-protobuf_3.21.12-3_amd64.deb \
+    && wget https://packages.trafficmanager.net/public/ubuntu/20.04/libprotobuf-dev_3.21.12-3_amd64.deb \
+    && wget https://packages.trafficmanager.net/public/ubuntu/20.04/libprotobuf-lite32_3.21.12-3_amd64.deb \
+    && wget https://packages.trafficmanager.net/public/ubuntu/20.04/libprotobuf32_3.21.12-3_amd64.deb \
+    && wget https://packages.trafficmanager.net/public/ubuntu/20.04/libprotoc-dev_3.21.12-3_amd64.deb \
+    && wget https://packages.trafficmanager.net/public/ubuntu/20.04/libprotoc32_3.21.12-3_amd64.deb \
+    && wget https://packages.trafficmanager.net/public/ubuntu/20.04/protobuf-compiler_3.21.12-3_amd64.deb \
+    && wget https://packages.trafficmanager.net/public/ubuntu/20.04/python3-protobuf_3.21.12-3_amd64.deb \
     && dpkg -i *.deb \
     && rm -rf /tmp/protobuf
 
@@ -227,6 +233,16 @@ COPY debs/sonic-device-data_*.deb debs/libdashapi_*.deb debs/
 
 RUN dpkg -i debs/sonic-device-data_*.deb debs/libdashapi_*.deb
 
+# Install dash-pipeline-utils
+COPY ["files/github_get.py", "/usr/bin"]
+RUN cd /tmp \
+    && python3 /usr/bin/github_get.py https://api.github.com/repos/sonic-net/DASH/contents/dash-pipeline/utils \
+    && cd utils \
+    && python3 setup.py bdist_wheel \
+    && python3 -m pip install dist/dash_pipeline_utils*.whl \
+    && cd / \
+    && rm -rf /tmp/utils
+
 RUN mkdir /var/run/sshd
 EXPOSE 22
 
@@ -264,12 +280,14 @@ WORKDIR /azp
 COPY start.sh \
      0001-Fix-getattr-AttributeError-in-multi-thread-scenario.patch \
      0002-extend-dataplane-poll-method-to-support-multi-ptf-nn.patch \
+     0003-add-dataplane-mask-counters-to-avoid-dataplane-noise.patch \
      ./
 RUN chmod +x start.sh \
     && ln -sf /usr/bin/python3 /usr/bin/python \
     && ln -sf `which pip3` /usr/bin/pip \
     && ln -sf `which pip3` /usr/local/sbin/pip \
     && patch -u -b /usr/local/lib/python3.8/dist-packages/ptf/dataplane.py  -i /azp/0002-extend-dataplane-poll-method-to-support-multi-ptf-nn.patch \
+    && patch -u -b /usr/local/lib/python3.8/dist-packages/ptf/dataplane.py  -i /azp/0003-add-dataplane-mask-counters-to-avoid-dataplane-noise.patch \
     && patch -u -b /usr/local/lib/python3.8/dist-packages/ansible/plugins/loader.py -i /azp/0001-Fix-getattr-AttributeError-in-multi-thread-scenario.patch
 
 USER $user
diff --git a/dockers/docker-sysmgr/Dockerfile.j2 b/dockers/docker-sysmgr/Dockerfile.j2
new file mode 100644
index 00000000000..722dbd64655
--- /dev/null
+++ b/dockers/docker-sysmgr/Dockerfile.j2
@@ -0,0 +1,36 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update        && \
+    apt-get install -f -y    \
+        libdbus-1-3          \
+        libdbus-c++-1-0v5
+
+{% if docker_sysmgr_debs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_sysmgr_debs.split(' '), "/debs/") }}
+
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_sysmgr_debs.split(' ')) }}
+{%- endif %}
+
+RUN apt-get clean -y      && \
+    apt-get autoclean -   && \
+    apt-get autoremove -y && \
+    rm -rf /debs /var/lib/apt/lists/* /tmp/* ~/.cache/
+
+# creating sonic conig_status file.
+RUN mkdir -p /var/sonic
+RUN echo "# Config files managed by sonic-config-engine" > /var/sonic/config_status
+
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
+COPY ["critical_processes", "/etc/supervisor"]
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/dockers/docker-sysmgr/critical_processes b/dockers/docker-sysmgr/critical_processes
new file mode 100644
index 00000000000..9f6a0c22124
--- /dev/null
+++ b/dockers/docker-sysmgr/critical_processes
@@ -0,0 +1 @@
+program:rebootbackend
diff --git a/dockers/docker-sysmgr/supervisord.conf b/dockers/docker-sysmgr/supervisord.conf
new file mode 100644
index 00000000000..7624801ca49
--- /dev/null
+++ b/dockers/docker-sysmgr/supervisord.conf
@@ -0,0 +1,43 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+loglevel=warn
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup --log-level warn
+autostart=true
+autorestart=unexpected
+stdout_logfile=syslog
+stderr_logfile=syslog
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=50
+
+[eventlistener:supervisor-proc-exit-listener]
+command=/usr/bin/supervisor-proc-exit-listener --container-name sysmgr
+events=PROCESS_STATE_EXITED
+autostart=true
+autorestart=unexpected
+stdout_logfile=syslog
+stderr_logfile=syslog
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=unexpected
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+
+[program:rebootbackend]
+command=/usr/bin/rebootbackend
+priority=2
+autostart=false
+autorestart=true
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=start:exited
diff --git a/dockers/docker-sysmgr/sysmgr.sh b/dockers/docker-sysmgr/sysmgr.sh
new file mode 100755
index 00000000000..1e5549139ff
--- /dev/null
+++ b/dockers/docker-sysmgr/sysmgr.sh
@@ -0,0 +1,4 @@
+#!/usr/bin/env bash
+
+
+exec /usr/local/bin/sysmgr --logtostderr
diff --git a/dockers/dockerfile-macros.j2 b/dockers/dockerfile-macros.j2
index 9917cb17aba..6cfb81b1bc7 100644
--- a/dockers/dockerfile-macros.j2
+++ b/dockers/dockerfile-macros.j2
@@ -1,5 +1,5 @@
 {% macro install_debian_packages(packages) -%}
-RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; \
+RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f --no-remove; } || return 1; }; \
     {%- for deb in packages %}
         dpkg_apt /debs/{{ deb }} {%- if not loop.last %} && \ {%- endif %}
     {%- endfor %}
@@ -37,3 +37,10 @@ COPY \
     {%- endfor %}
     {{ dest }}
 {%- endmacro %}
+
+{% macro install_offending_packages(packages) -%}
+    {%- for pkg in packages %}
+        RUN pip3 install {{ pkg }}
+        RUN pip3 install setuptools==51.0.0
+    {%- endfor %}
+{%- endmacro %}
\ No newline at end of file
diff --git a/files/Aboot/boot0.j2 b/files/Aboot/boot0.j2
index fc062cba1ed..cfaf5c97255 100644
--- a/files/Aboot/boot0.j2
+++ b/files/Aboot/boot0.j2
@@ -474,6 +474,11 @@ read_system_eeprom() {
     read_eeprom /tmp/.system-prefdl
 }
 
+get_eeprom_value() {
+    local key="$1"
+    sed -n "s#^$key: *##p" "$target_path/.system-prefdl" || :
+}
+
 write_platform_specific_cmdline() {
     local platform="$(cmdline_get platform)"
     local sid="$(cmdline_get sid | sed 's/Ssd$//')"
@@ -537,6 +542,10 @@ write_platform_specific_cmdline() {
         cmdline_add logs_inram=on
         cmdline_add libata.force=2.00:noncq
     fi
+    if [ "$sid" = "LodogaPrime" ]; then
+        aboot_machine=arista_7050cx3_32c
+        cmdline_add logs_inram=on
+    fi
     if [ "$sid" = "Marysville" ]; then
         aboot_machine=arista_7050sx3_48yc8
         flash_size=7382
@@ -629,6 +638,13 @@ write_platform_specific_cmdline() {
     if in_array "$sid" "Shearwater4Mk2QuicksilverP" "Shearwater4Mk2NQuicksilverP"; then
         aboot_machine=arista_7060x6_64pe
     fi
+    if in_array "$sid" "Redstart8Mk2QuicksilverP512" "Redstart8Mk2NQuicksilverP512" \
+                "Redstart832Mk2QuicksilverP512" "Redstart832Mk2NQuicksilverP512"; then
+        aboot_machine=arista_7060x6_64pe_b
+    fi
+    if in_array "$sid" "MorandaP"; then
+        aboot_machine=arista_7060x6_32pe
+    fi
 
     # disable cpu c-state other than C1
     local cpuvendor="$(sed -nr 's/vendor_id[\t ]*: (.*)/\1/p' /proc/cpuinfo | head -n 1)"
@@ -637,7 +653,7 @@ write_platform_specific_cmdline() {
         cmdline_add intel_idle.max_cstate=0
     fi
 
-    if in_array "$platform" "rook" "magpie" "woodpecker" "sprucefish"; then
+    if in_array "$platform" "rook" "magpie" "woodpecker" "sprucefish" "puffin"; then
         cmdline_add tsc=reliable
         cmdline_add pcie_ports=native
         cmdline_add rhash_entries=1
@@ -659,7 +675,7 @@ write_platform_specific_cmdline() {
         cmdline_add sdhci.append_quirks2=0x40
         read_system_eeprom
     fi
-    if in_array "$platform" "woodpecker"; then
+    if in_array "$platform" "woodpecker" "puffin" "skylark"; then
         cmdline_add modprobe.blacklist=snd_hda_intel,hdaudio
         read_system_eeprom
     fi
@@ -671,7 +687,7 @@ write_platform_specific_cmdline() {
         read_system_eeprom
     fi
     if in_array "$platform" "shearwater" "redstart"; then
-        cmdline_add modprobe.blacklist=snd_hda_intel,hdaudio
+        cmdline_add modprobe.blacklist=snd_hda_intel,hdaudio,amd_sfh
         if [ -f /tmp/.switch-prefdl ]; then
             read_switch_eeprom
         else
@@ -679,7 +695,13 @@ write_platform_specific_cmdline() {
         fi
     fi
     if in_array "$sid" "Moby" "RedstartFixed8CNMoby"; then
-        aboot_machine=arista_7060x6_16pe_384c
+        aboot_machine=arista_7060x6_16pe_384c_b
+
+        local hw_api="$(get_eeprom_value HwApi)"
+        info "HwApi for Moby: $hw_api"
+        if [ -z "$hw_api" ] || [ "$hw_api" = "01.00" ]; then
+            aboot_machine=arista_7060x6_16pe_384c
+        fi
     fi
 
     if [ $varlog_size -eq 0 ]; then
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
index 5e2e7ffd93b..3a7c0c32fc6 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
@@ -1,12 +1,17 @@
-bfscripts==4.9.0-13347
-doca-cx-libs==2.8.0064-1
-kernel-mft-dkms==4.30.2-23
-kernel-mft-dkms-modules-6.1.0-22-2-arm64==4.28.0
+bfscripts==4.11.0-13611
+doca-sdk-argp==2.9.0072-1
+doca-sdk-common==2.9.0072-1
+doca-sdk-dpdk-bridge==2.9.0072-1
+doca-sdk-flow==2.9.0072-1
+kernel-mft-dkms==4.32.0-120
+kernel-mft-dkms-modules-6.1.0-29-2-arm64==4.32.0
 libdashapi==1.0.0
-libdoca-cx-libs-dev==2.8.0064-1
+libdoca-sdk-argp-dev==2.9.0072-1
+libdoca-sdk-common-dev==2.9.0072-1
+libdoca-sdk-dpdk-bridge-dev==2.9.0072-1
+libdoca-sdk-flow-dev==2.9.0072-1
 libgrpc-dev==1.39.0-1
-libibverbs-dev==2407mlnx52-1.2407061
-libnl-3-200==3.7.0-0.2+b1sonic1
+libibverbs-dev==2501mlnx56-1.2501060
 libnl-3-dev==3.7.0-0.2+b1sonic1
 libnl-cli-3-200==3.7.0-0.2+b1sonic1
 libnl-cli-3-dev==3.7.0-0.2+b1sonic1
@@ -14,7 +19,6 @@ libnl-genl-3-200==3.7.0-0.2+b1sonic1
 libnl-genl-3-dev==3.7.0-0.2+b1sonic1
 libnl-nf-3-200==3.7.0-0.2+b1sonic1
 libnl-nf-3-dev==3.7.0-0.2+b1sonic1
-libnl-route-3-200==3.7.0-0.2+b1sonic1
 libnl-route-3-dev==3.7.0-0.2+b1sonic1
 librxpcompiler-dev==22.05.1
 libsai==1.0.0
@@ -35,24 +39,24 @@ libteamdctl0==1.31-1
 libyang==1.0.73
 libyang-cpp==1.0.73
 libyang-dev==1.0.73
-linux-headers-6.1.0-22-2-amd64==6.1.94-1
-linux-headers-6.1.0-22-2-arm64==6.1.94-1
-linux-headers-6.1.0-22-2-common==6.1.94-1
-mft==4.28.0-96
-mft-oem==4.28.0-96
-mlnx-dpdk==22.11.0-2407.0.6
-mlnx-dpdk-dev==22.11.0-2407.0.6
-mlnx-iproute2==6.9.0-1.2407061
-mlnx-ofed-kernel-utils==24.07.OFED.24.07.0.6.1.1-1
-mlnx-tools==24.07.0-1.2407061
+linux-headers-6.1.0-29-2-amd64==6.1.123-1
+linux-headers-6.1.0-29-2-arm64==6.1.123-1
+linux-headers-6.1.0-29-2-common==6.1.123-1
+mft==4.32.0-120
+mft-oem==4.32.0-120
+mlnx-dpdk==22.11.0-2410.1.0
+mlnx-dpdk-dev==22.11.0-2410.1.0
+mlnx-iproute2==6.12.0-1.2501060
+mlnx-ofed-kernel-utils==25.01.OFED.25.01.0.6.0.1-1
+mlnx-tools==25.01-0.2501060
 mlxbf-bootctl==2.1
-mlxbf-bootimages==4.9.0-13347
+mlxbf-bootimages==4.11.0-13611
 p4lang-bmv2==1.15.0-7
 p4lang-p4c==1.2.4.2-2
 p4lang-pi==0.1.0-15
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
-rdma-core==2407mlnx52-1.2407061
+rdma-core==2501mlnx56-1.2501060
 rxp-compiler==22.05.1
 sdn-appliance==1.5-1mlnx1
 sonic-bmp==0.1
@@ -60,5 +64,6 @@ sonic-mgmt-common==1.0.0
 sonic-mgmt-common-codegen==1.0.0
 sonic-platform-pddf==1.1
 sonic-platform-pddf-sym==1.1
-sys-sdk-dev==1.mlnx.4.7.2164
-sys-sdk-main==1.mlnx.4.7.2164
+stp==1.0.0
+sys-sdk-dev==1.mlnx.4.7.4040
+sys-sdk-main==1.mlnx.4.7.4040
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64
new file mode 100644
index 00000000000..5a72f480300
--- /dev/null
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64
@@ -0,0 +1,2 @@
+libnl-3-200==3.7.0-0.2+b1sonic1
+libnl-route-3-200==3.7.0-0.2+b1sonic1
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
index 7c9c07cd202..e34f6e49f8f 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
@@ -1 +1,3 @@
-linux-headers-6.1.0-22-2-armmp==6.1.94-1
+libnl-3-200==3.7.0-0.2+b1sonic1
+libnl-route-3-200==3.7.0-0.2+b1sonic1
+linux-headers-6.1.0-29-2-armmp==6.1.123-1
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
index db932ec9c2c..04b81f01ff0 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
@@ -1,7 +1,5 @@
-bitarray==2.8.1
 blessed==1.20.0
 cffi==1.17.1
-click==7.0
 click-log==0.4.0
 colorful==0.5.6
 deepdiff==6.2.2
@@ -18,7 +16,6 @@ jsondiff==2.2.1
 jsonpatch==1.33
 jsonpointer==3.0.0
 jsonschema==2.6.0
-lxml==4.9.1
 natsort==8.4.0
 netaddr==0.8.0
 netifaces==0.11.0
@@ -33,15 +30,12 @@ pycparser==2.22
 pynacl==1.5.0
 pyroute2==0.7.12
 python-arptable==0.0.2
-python-sdk-api==4.7.2164
-pyyaml==6.0.1
+python-sdk-api==4.7.4040
 scp==0.14.5
 semantic-version==2.10.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
-urllib3==2.3.0
 wcwidth==0.2.13
 www-authenticate==0.9.2
 xmltodict==0.12.0
-zipp==1.2.0
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-arm64 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-arm64
new file mode 100644
index 00000000000..c16fded3ed1
--- /dev/null
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-arm64
@@ -0,0 +1,6 @@
+bitarray==2.8.1
+click==7.0
+lxml==4.9.1
+pyyaml==6.0.1
+urllib3==2.3.0
+zipp==1.2.0
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf
new file mode 100644
index 00000000000..c16fded3ed1
--- /dev/null
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf
@@ -0,0 +1,6 @@
+bitarray==2.8.1
+click==7.0
+lxml==4.9.1
+pyyaml==6.0.1
+urllib3==2.3.0
+zipp==1.2.0
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
index 8b948830991..a67b06f9a39 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
@@ -2,6 +2,7 @@ bitarray==2.8.1
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.2.1
+jsonpointer==3.0.0
 natsort==8.4.0
 netaddr==0.8.0
 pyyaml==6.0.1
diff --git a/files/build/versions/build/build-sonic-slave-buster/versions-py3 b/files/build/versions/build/build-sonic-slave-buster/versions-py3
index dd31a1ab274..de78a39a0bb 100644
--- a/files/build/versions/build/build-sonic-slave-buster/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-buster/versions-py3
@@ -2,6 +2,7 @@ bitarray==2.8.1
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.0.0
+jsonpointer==3.0.0
 natsort==6.2.1
 netaddr==0.8.0
 pyyaml==6.0.1
diff --git a/files/build/versions/default/versions-docker b/files/build/versions/default/versions-docker
index d3b62896aa2..8a55b150919 100644
--- a/files/build/versions/default/versions-docker
+++ b/files/build/versions/default/versions-docker
@@ -1,15 +1,15 @@
-amd64:amd64/debian:bookworm==sha256:205dda701e0a814eec0990918e33c6a0c937406131c214caf36f7aab92d67622
+amd64:amd64/debian:bookworm==sha256:f8358091727a86df2275a4dc8b91e69a71225ae563837c32357b584c7b3607fc
 amd64:amd64/debian:bullseye==sha256:da5c2dc5e036efbfa25b4a0abfb41e497a44c3e9ab630e8ef6699600790511e7
-amd64:debian:bookworm==sha256:321341744acb788e251ebd374aecc1a42d60ce65da7bd4ee9207ff6be6686a62
-amd64:debian:bullseye==sha256:e5bfb7364038fd100c2faebdd674145bd1bc758a57f3c67023cced99d0eff0f7
+amd64:debian:bookworm==sha256:d42b86d7e24d78a33edcf1ef4f65a20e34acb1e1abd53cabc3f7cdf769fc4082
+amd64:debian:bullseye==sha256:6d4f6b40afca63b59a44ffcedbb2e457e83b645710916d7f094b79c6c591ac28
 amd64:debian:buster==sha256:58ce6f1271ae1c8a2006ff7d3e54e9874d839f573d8009c20154ad0f2fb0a225
 amd64:p4lang/behavioral-model@sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32==sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32
-arm64:arm64v8/debian:bookworm==sha256:eecb88f92f9f4e3e0b1ccef4f7db9f95b577d64f15a73e33243604484001a7fd
-arm64:arm64v8/debian:bullseye==sha256:abb36821ef051d2e7b489deae6f16e0c123bc330200060572fb8c6eb89de6b92
-arm64:debian:bookworm==sha256:321341744acb788e251ebd374aecc1a42d60ce65da7bd4ee9207ff6be6686a62
-arm64:debian:bullseye==sha256:e5bfb7364038fd100c2faebdd674145bd1bc758a57f3c67023cced99d0eff0f7
+arm64:arm64v8/debian:bookworm==sha256:5d8e08483c19febed86ca47f3fce17308585874ae4e2ba047c6fcc6cefae0ea1
+arm64:arm64v8/debian:bullseye==sha256:6861e278c779adeeaa96eb520588ea8fd85a7af29a7b2400a68316613f3f87ee
+arm64:debian:bookworm==sha256:d42b86d7e24d78a33edcf1ef4f65a20e34acb1e1abd53cabc3f7cdf769fc4082
+arm64:debian:bullseye==sha256:6d4f6b40afca63b59a44ffcedbb2e457e83b645710916d7f094b79c6c591ac28
 arm64:debian:buster==sha256:58ce6f1271ae1c8a2006ff7d3e54e9874d839f573d8009c20154ad0f2fb0a225
-armhf:arm32v7/debian:bookworm==sha256:e8ef33b9b7b1decf574780daf4a06b2b99046164fe7879aceac6aa5ca09e2b7a
-armhf:debian:bookworm==sha256:321341744acb788e251ebd374aecc1a42d60ce65da7bd4ee9207ff6be6686a62
-armhf:debian:bullseye==sha256:e5bfb7364038fd100c2faebdd674145bd1bc758a57f3c67023cced99d0eff0f7
+armhf:arm32v7/debian:bookworm==sha256:878df3e9efc935672fb6e70784a829a9083c161cfce4190efa1157580b58a0da
+armhf:debian:bookworm==sha256:d42b86d7e24d78a33edcf1ef4f65a20e34acb1e1abd53cabc3f7cdf769fc4082
+armhf:debian:bullseye==sha256:6d4f6b40afca63b59a44ffcedbb2e457e83b645710916d7f094b79c6c591ac28
 armhf:debian:buster==sha256:58ce6f1271ae1c8a2006ff7d3e54e9874d839f573d8009c20154ad0f2fb0a225
diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git
index 9a90e2a3d83..f1f1f959e82 100644
--- a/files/build/versions/default/versions-git
+++ b/files/build/versions/default/versions-git
@@ -1,22 +1,23 @@
-https://chromium.googlesource.com/chromium/tools/depot_tools.git==6e2031a2ddde16d317c670c9f59ca19de11d7ed2
+https://chromium.googlesource.com/chromium/tools/depot_tools.git==abc51098824678cbce29d7913c4951a857033c49
 https://github.com/aristanetworks/swi-tools.git==989aec67105f565836364b4167c9566c132d0b54
-https://github.com/CESNET/libyang.git==03e294d83b610f89e8ba7b2156a80dc0ad534443
+https://github.com/CESNET/libyang.git==da7272e19d9e27d1bfdd68108fa9dce25fbdf5e8
 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6
 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b
 https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287
-https://github.com/flashrom/flashrom.git==15e6b337437b906a817a87481301dec53b77bb66
-https://github.com/FreeRADIUS/freeradius-server.git==2ed588ee9c560f1789f1d8d54a3aeffb1e252587
-https://github.com/FreeRADIUS/pam_radius.git==5e043859f177f12fed604da0f8e4c7577acadcb9
+https://github.com/facebook/tac_plus==4b1d611e0ee243ba6d98eaead76cddbebf6b0d18
+https://github.com/flashrom/flashrom.git==966cd5194c10bb1913605fb72e7d3727b0b6c641
+https://github.com/FreeRADIUS/freeradius-server.git==ecfa4bf70159b3462145703726f3a4ce309cb9b4
+https://github.com/FreeRADIUS/pam_radius.git==d17fc655f0007728b67d0d25c0ca20b6048aa7a1
+https://github.com/google/gnxi.git==f34a75d41930dc645a2fb6b93bad1fa69a82338d
 https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce
-https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd
+https://github.com/karimra/gnoic.git==57aac3de930960cc90bb32692c7d34149d59c188
 https://github.com/Mellanox/libpsample.git==62bb27d9a49424e45191eee81df7ce0d8c74e774
 https://github.com/openconfig/oc-pyang.git==4607fd1987d4f586aba03b40f222015cb3ef8161
-https://github.com/p4lang/ptf.git==c554f83685186be4cfa9387eb5d6d700d2bbd7c0
-https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479
-https://github.com/redis/librdb.git==664a7be04b1da8759eed0447d73d6430cd487680
-https://github.com/sflow/host-sflow==489de4cdcc9fcc76f4fd3366ece2bc030f647fce
-https://github.com/sflow/sflowtool==0ee84f23ae9a107fbd08fd1c33b21a2415a5fc18
-https://github.com/sonic-net/DASH.git==abd0d1a591adbd18c0586776fab741aa2a857660
-https://salsa.debian.org/kernel-team/initramfs-tools.git==fe0846fea0879e7f7b206409eb0420a9e4fa2d68
+https://github.com/p4lang/ptf.git==6af750831ffe14512c5195383f2b39691744503e
+https://github.com/redis/librdb.git==b0e6b98f5da7864c2669cbffa747ec652b57a155
+https://github.com/sflow/host-sflow==cc127965d2e24d2857ec0bcca2b34ffcf499ec19
+https://github.com/sflow/sflowtool==45fe9276d10f6af6f3cc1cf6ba93da9151e2b9bf
+https://github.com/sonic-net/DASH.git==57e599c9d8e1f538ea01fad28781d8a0c2706ba5
+https://salsa.debian.org/kernel-team/initramfs-tools.git==e29f76a13e9cc06103caacce25a0be6ac2624ab6
 https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d
 https://salsa.debian.org/tai271828/rasdaemon.git==51a7f485f8b2e2ae43e613f19c5a387595174132
diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror
index 06f527e63d0..bb47153e16e 100644
--- a/files/build/versions/default/versions-mirror
+++ b/files/build/versions/default/versions-mirror
@@ -1,24 +1,28 @@
 archive.ubuntu.com_ubuntu_dists_focal==2020-04-23T17:33:17Z
-archive.ubuntu.com_ubuntu_dists_focal-backports==2025-02-01T00:20:19Z
-archive.ubuntu.com_ubuntu_dists_focal-updates==2025-02-01T03:30:47Z
+archive.ubuntu.com_ubuntu_dists_focal-backports==2025-07-06T03:30:17Z
+archive.ubuntu.com_ubuntu_dists_focal-updates==2025-07-06T04:50:27Z
+deb.debian.org_debian-security_dists_bookworm-security==2025-07-04T19:24:54Z
+deb.debian.org_debian_dists_bookworm==2025-05-17T09:13:04Z
+deb.debian.org_debian_dists_bookworm-backports==2025-07-06T02:09:02Z
+deb.debian.org_debian_dists_bookworm-updates==2025-07-06T02:09:02Z
 deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z
 deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z
 deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z
-debian==20250130T000911Z
-debian-security==20250131T000840Z
-download.docker.com_linux_debian_dists_bookworm==2025-01-22T16:40:51Z
-download.docker.com_linux_debian_dists_bullseye==2025-01-22T16:40:51Z
+debian==20250705T001524Z
+debian-security==20250704T001248Z
+download.docker.com_linux_debian_dists_bookworm==2025-07-02T22:46:33Z
+download.docker.com_linux_debian_dists_bullseye==2025-07-02T22:46:33Z
 download.docker.com_linux_debian_dists_buster==2024-06-17T16:53:50Z
-packages.trafficmanager.net_snapshot_debian-security_20250131T000840Z_dists_bookworm-security==2025-01-30T21:52:45Z
-packages.trafficmanager.net_snapshot_debian-security_20250131T000840Z_dists_bullseye-security==2025-01-30T21:52:44Z
-packages.trafficmanager.net_snapshot_debian-security_20250131T000840Z_dists_buster_updates==2024-12-29T19:56:34Z
-packages.trafficmanager.net_snapshot_debian_20250130T000911Z_dists_bookworm==2025-01-11T10:25:55Z
-packages.trafficmanager.net_snapshot_debian_20250130T000911Z_dists_bookworm-backports==2025-01-29T20:14:27Z
-packages.trafficmanager.net_snapshot_debian_20250130T000911Z_dists_bookworm-updates==2025-01-29T20:14:27Z
-packages.trafficmanager.net_snapshot_debian_20250130T000911Z_dists_bullseye==2024-08-31T11:02:15Z
-packages.trafficmanager.net_snapshot_debian_20250130T000911Z_dists_bullseye-backports==2025-01-29T20:14:27Z
-packages.trafficmanager.net_snapshot_debian_20250130T000911Z_dists_bullseye-updates==2025-01-29T20:14:27Z
-packages.trafficmanager.net_snapshot_debian_20250130T000911Z_dists_buster==2023-06-10T08:53:33Z
-packages.trafficmanager.net_snapshot_debian_20250130T000911Z_dists_buster-backports==2024-03-09T20:54:54Z
-packages.trafficmanager.net_snapshot_debian_20250130T000911Z_dists_buster-updates==2023-06-10T08:55:10Z
-security.ubuntu.com_ubuntu_dists_focal-security==2025-02-01T00:11:12Z
+packages.trafficmanager.net_snapshot_debian-security_20250704T001248Z_dists_bookworm-security==2025-07-03T18:17:33Z
+packages.trafficmanager.net_snapshot_debian-security_20250704T001248Z_dists_bullseye-security==2025-07-03T18:17:33Z
+packages.trafficmanager.net_snapshot_debian-security_20250704T001248Z_dists_buster_updates==2024-12-29T19:56:34Z
+packages.trafficmanager.net_snapshot_debian_20250705T001524Z_dists_bookworm==2025-05-17T09:13:04Z
+packages.trafficmanager.net_snapshot_debian_20250705T001524Z_dists_bookworm-backports==2025-07-04T20:14:36Z
+packages.trafficmanager.net_snapshot_debian_20250705T001524Z_dists_bookworm-updates==2025-07-04T20:14:36Z
+packages.trafficmanager.net_snapshot_debian_20250705T001524Z_dists_bullseye==2024-08-31T11:02:15Z
+packages.trafficmanager.net_snapshot_debian_20250705T001524Z_dists_bullseye-backports==2025-07-04T20:14:36Z
+packages.trafficmanager.net_snapshot_debian_20250705T001524Z_dists_bullseye-updates==2025-07-04T20:14:36Z
+packages.trafficmanager.net_snapshot_debian_20250705T001524Z_dists_buster==2023-06-10T08:53:33Z
+packages.trafficmanager.net_snapshot_debian_20250705T001524Z_dists_buster-backports==2024-03-09T20:54:54Z
+packages.trafficmanager.net_snapshot_debian_20250705T001524Z_dists_buster-updates==2023-06-10T08:55:10Z
+security.ubuntu.com_ubuntu_dists_focal-security==2025-07-06T03:22:56Z
diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web
index 92a3c76d431..4e0cc52a170 100644
--- a/files/build/versions/default/versions-web
+++ b/files/build/versions/default/versions-web
@@ -20,10 +20,11 @@ http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.debian.tar.xz==b9d8e4ce4cb66385250cf6dded0ef57a
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.dsc==ee4f5c84d621a5dbfbe368baad031af4
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0.orig.tar.gz==551d3780d615557674e93fa11210499d
-http://www.mellanox.com/downloads/MFT/mft-4.28.0-96-arm64-deb.tgz==39b3244a00029f97734ee75e5a321065
-http://www.mellanox.com/downloads/MFT/mft-4.30.2-23-x86_64-deb.tgz==7551c4e5f2f9de935d8080cee2a1613f
+http://www.mellanox.com/downloads/MFT/mft-4.32.0-120-arm64-deb.tgz==aa764d986742a82303c1e77b7bda8e71
+http://www.mellanox.com/downloads/MFT/mft-4.32.0-120-x86_64-deb.tgz==3a1a489483241240701576ca4cace1f9
+https://api.github.com/repos/karimra/gnoic/releases/latest==dd7a61ea515c3815f4303ab45be9f405
 https://archive.apache.org/dist/thrift/0.14.1/thrift-0.14.1.tar.gz==c64434548438df2cb1e53fb27c600e85
-https://bootstrap.pypa.io/pip/2.7/get-pip.py==60e8267eb1b7bc71dc4843eb7bd294d3
+https://bootstrap.pypa.io/pip/get-pip.py==a9c622fd4e0f4bcc1d070e374f3c68eb
 https://deb.debian.org/debian/pool/main/k/kdump-tools/kdump-tools_1.8.1.dsc==cf20d7dc926e6efb6946622f25728074
 https://deb.debian.org/debian/pool/main/k/kdump-tools/kdump-tools_1.8.1.tar.xz==bf690b241ae1ef3ac9226ba40995575a
 https://deb.debian.org/debian/pool/main/libn/libnl3/libnl3_3.7.0-0.2.debian.tar.xz==a36598f37197fcad7228f22196dd7f2f
@@ -40,8 +41,8 @@ https://deb.nodesource.com/node_14.x/dists/buster/Release==42875141604382f0abb4d
 https://deb.nodesource.com/setup_14.x==c30873f4a513bb935afaf8f65e7de9e1
 https://download.docker.com/linux/debian/gpg==1afae06b34a13c1b3d9cb61a26285a15
 https://github.com/aristanetworks/sonic-firmware/raw/24716c4e03f223d8e18afff786ac427f6ac77fe0/phy/phy-credo_1.0_amd64.deb==14e233cd68bc5db22eb8c9e177242851
-https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-amd64==438eb187c83e0cf08b5fb017c8c14bf9
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+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/libkrb5-dev_1.18.3-6+deb11u5+fips_arm64.deb==ace98b760ba3dda467c8d9c82f8c1226
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/libkrb5support0_1.18.3-6+deb11u5+fips_arm64.deb==53b0013f0dd89dd9b5a5fa06ff260dbc
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/libpython3.9-minimal_3.9.2-1+fips_arm64.deb==c6f2c45ed249e385993bd173ba1da5ed
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/libpython3.9-stdlib_3.9.2-1+fips_arm64.deb==848ac1cd3b379f99da90da095a98212d
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/libpython3.9_3.9.2-1+fips_arm64.deb==edae5c269e2c401873e7cff3d4f93a7a
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/libssl-dev_1.1.1n-0+deb11u5+fips_arm64.deb==2116b0e949a521b02098f01aee5a33d4
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/libssl-doc_1.1.1n-0+deb11u5+fips_all.deb==3ac7462c370d85e42c03b11d26f35016
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/libssl1.1_1.1.1n-0+deb11u5+fips_arm64.deb==a6a6a6f2d23d91398f44570da6e2e80c
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/openssh-client_8.4p1-5+deb11u2+fips_arm64.deb==b30c745ca94e392740c67225802e9068
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/openssh-server_8.4p1-5+deb11u2+fips_arm64.deb==8ab6d9e3bac9d486bda5664e40f634ef
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/openssh-sftp-server_8.4p1-5+deb11u2+fips_arm64.deb==73c51fa8f165a014571c2bdbd843c517
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/openssl_1.1.1n-0+deb11u5+fips_arm64.deb==5c16b501e97678e7f55c616afa6423bb
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/python3.9-minimal_3.9.2-1+fips_arm64.deb==146da01b9364f54ec022b77f2502cb1c
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/python3.9_3.9.2-1+fips_arm64.deb==4d6307dabcd3060235d6188cfa0346b8
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/ssh_8.4p1-5+deb11u2+fips_all.deb==d1f50482046b4b4e39fd2a0273f5ecef
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/arm64/symcrypt-openssl_0.13_arm64.deb==596652c7d5df5981844f5236d5615d40
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/armhf/golang-1.15-go_1.15.15-1~deb11u4+fips_armhf.deb==62c200bd7bf79df11cfdace12a351a73
+https://packages.trafficmanager.net/public/fips/bullseye/0.13/armhf/golang-1.15-src_1.15.15-1~deb11u4+fips_armhf.deb==644145b4473d863edc1aaf98dfc92acf
+https://packages.trafficmanager.net/public/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso==54e11e450a461b1f4ae39c3ce3f15eff
+https://packages.trafficmanager.net/public/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso==1d8b8d3fa37f842d0184b5205be22be9
+https://packages.trafficmanager.net/public/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso==58494305d4ac201daedf9364a1018a1b
+https://packages.trafficmanager.net/public/sai/bcmpai/REL_3.11/3.11/libsaibroncos_3.11_amd64.deb==6e21a16126e833516a9659d4c35c284e
+https://static.rust-lang.org/rustup/dist/aarch64-unknown-linux-gnu/rustup-init==17d1313bdd6bbcfcec9344f6dd7e05ca
+https://static.rust-lang.org/rustup/dist/armv7-unknown-linux-gnueabihf/rustup-init==e59124baaee31e5dce382b468f76c3e4
+https://static.rust-lang.org/rustup/dist/x86_64-unknown-linux-gnu/rustup-init==b492784060539969a92e14663c0796d1
 https://storage.googleapis.com/golang/go1.15.15.linux-amd64.tar.gz==b75227438c6129b5013da053b3aa3f38
 https://storage.googleapis.com/golang/go1.15.15.linux-arm64.tar.gz==6d721146a9195592d92a80cf27d475f9
 https://storage.googleapis.com/golang/go1.15.15.linux-armv6l.tar.gz==23d140bbeedc978b954de1a199a22bdb
diff --git a/files/build/versions/dockers/docker-auditd-watchdog/versions-deb-bookworm b/files/build/versions/dockers/docker-auditd-watchdog/versions-deb-bookworm
new file mode 100644
index 00000000000..19c39538040
--- /dev/null
+++ b/files/build/versions/dockers/docker-auditd-watchdog/versions-deb-bookworm
@@ -0,0 +1,38 @@
+apt-utils==2.6.1
+binutils-common==2.40-2
+dpkg-dev==1.21.22
+icu-devtools==72.1-3+deb12u1
+libboost-serialization1.74.0==1.74.0+ds1-21
+libc-dev-bin==2.36-9+deb12u10
+libc6-dev==2.36-9+deb12u10
+libcrypt-dev==1:4.4.33-2
+libhiredis0.14==0.14.1-3
+libicu-dev==72.1-3+deb12u1
+libicu72==72.1-3+deb12u1
+libjs-jquery==3.6.1+dfsg+~3.5.14-1
+libk5crypto3==1.20.1-2+deb12u3
+libnl-3-200==3.7.0-0.2+b1sonic1
+libnl-cli-3-200==3.7.0-0.2+b1sonic1
+libnl-genl-3-200==3.7.0-0.2+b1sonic1
+libnl-nf-3-200==3.7.0-0.2+b1sonic1
+libnl-route-3-200==3.7.0-0.2+b1sonic1
+libnsl-dev==1.3.0-2
+libpcre3==2:8.39-15
+libpython3.11==3.11.2-6+deb12u6
+libswsscommon==1.0.0
+libtirpc-dev==1.3.3+ds-1
+libxml2==2.9.14+dfsg-1.3~deb12u2
+libxml2-dev==2.9.14+dfsg-1.3~deb12u2
+libxslt1-dev==1.1.35-1+deb12u1
+libxslt1.1==1.1.35-1+deb12u1
+libyaml-0-2==0.2.5-1
+libyang==1.0.73
+libyang-cpp==1.0.73
+linux-libc-dev==6.1.140-1
+python3-swsscommon==1.0.0
+python3-yaml==6.0-3+b2
+python3-yang==1.0.73
+rpcsvc-proto==1.4.3-1
+sonic-db-cli==1.0.0
+sonic-eventd==1.0.0-0
+zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-auditd-watchdog/versions-py3 b/files/build/versions/dockers/docker-auditd-watchdog/versions-py3
new file mode 100644
index 00000000000..11f10ec1e0f
--- /dev/null
+++ b/files/build/versions/dockers/docker-auditd-watchdog/versions-py3
@@ -0,0 +1,18 @@
+async-timeout==5.0.1
+bitarray==2.8.1
+ijson==3.2.3
+ipaddress==1.0.23
+jsondiff==2.2.1
+jsonpointer==3.0.0
+lxml==4.9.1
+natsort==8.4.0
+netaddr==0.8.0
+pyang==2.6.1
+pyangbind==0.8.2
+pyyaml==6.0.1
+redis==5.0.1
+redis-dump-load==1.1
+regex==2024.11.6
+six==1.17.0
+tabulate==0.9.0
+xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
index 04c3aa1f26e..095602a5871 100644
--- a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
@@ -1,14 +1,14 @@
-ca-certificates==20230311
-curl==7.88.1-10+deb12u8
+ca-certificates==20230311+deb12u1
+curl==7.88.1-10+deb12u12
 iproute2==6.1.0-3
 jq==1.6-2.1
 less==590-2.1~deb12u2
-libatomic1==12.2.0-14
+libatomic1==12.2.0-14+deb12u1
 libbpf1==1:1.1.0-1
 libbrotli1==1.0.9-2+b6
 libbsd0==0.11.7-2
-libcap2-bin==1:2.66-4
-libcurl4==7.88.1-10+deb12u8
+libcap2-bin==1:2.66-4+deb12u1
+libcurl4==7.88.1-10+deb12u12
 libdaemon0==0.14-7.1
 libdbus-1-3==1.14.10-1~deb12u1
 libelf1==0.188-2.1
@@ -17,14 +17,14 @@ libexpat1==2.5.0-1+deb12u1
 libfastjson4==1.2304.0-1
 libgdbm-compat4==1.23-3
 libgdbm6==1.23-3
-libgssapi-krb5-2==1.20.1-2+deb12u2
+libgssapi-krb5-2==1.20.1-2+deb12u3
 libjansson4==2.14-2
 libjemalloc2==5.3.0-1
 libjq1==1.6-2.1
 libk5crypto3==1.20.1-2+deb12u1+fips
 libkeyutils1==1.6.3-2
-libkrb5-3==1.20.1-2+deb12u2
-libkrb5support0==1.20.1-2+deb12u2
+libkrb5-3==1.20.1-2+deb12u3
+libkrb5support0==1.20.1-2+deb12u3
 libldap-2.5-0==2.5.13+dfsg-5
 liblognorm5==2.0.6-4
 liblzf1==3.6-3
@@ -34,13 +34,13 @@ libnghttp2-14==1.52.0-1+deb12u2
 libnorm1==1.5.9+dfsg-2
 libnsl2==1.3.0-2
 libonig5==6.9.8-1
-libperl5.36==5.36.0-7+deb12u1
+libperl5.36==5.36.0-7+deb12u2
 libpgm-5.3-0==5.3.128~dfsg-2
 libproc2-0==2:4.0.2-3
 libpsl5==0.21.2-1
 libpython3-stdlib==3.11.2-1+b1
-libpython3.11-minimal==3.11.2-6+deb12u5
-libpython3.11-stdlib==3.11.2-6+deb12u5
+libpython3.11-minimal==3.11.2-6+deb12u6
+libpython3.11-stdlib==3.11.2-6+deb12u6
 libreadline8==8.2-1.3
 librtmp1==2.4+20151223.gitfa8646d.1-2+b2
 libsasl2-2==2.1.28+dfsg-10
@@ -56,10 +56,10 @@ libwrap0==7.6.q-32
 libxtables12==1.8.9-2
 libzmq5==4.3.4-6
 media-types==10.0.0
-net-tools==2.10-0.1
+net-tools==2.10-0.1+deb12u2
 openssl==3.0.11-1~deb12u2+fips
-perl==5.36.0-7+deb12u1
-perl-modules-5.36==5.36.0-7+deb12u1
+perl==5.36.0-7+deb12u2
+perl-modules-5.36==5.36.0-7+deb12u2
 procps==2:4.0.2-3
 python-is-python3==3.11.2-1+deb12u1
 python3==3.11.2-1+b1
@@ -69,12 +69,12 @@ python3-minimal==3.11.2-1+b1
 python3-pkg-resources==66.1.1-1+deb12u1
 python3-setuptools==66.1.1-1+deb12u1
 python3-wheel==0.38.4-2
-python3.11==3.11.2-6+deb12u5
-python3.11-minimal==3.11.2-6+deb12u5
+python3.11==3.11.2-6+deb12u6
+python3.11-minimal==3.11.2-6+deb12u6
 readline-common==8.2-1.3
-redis-tools==5:7.0.15-1~deb12u3
-rsyslog==8.2302.0-1
+redis-tools==5:7.0.15-1~deb12u4
+rsyslog==8.2302.0-1+deb12u1
 socat==1.7.4.1-3
 symcrypt-openssl==0.1
-vim-common==2:9.0.1378-2
-vim-tiny==2:9.0.1378-2
+vim-common==2:9.0.1378-2+deb12u2
+vim-tiny==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-py3 b/files/build/versions/dockers/docker-base-bookworm/versions-py3
index d346f0f116e..f2fe7b34ed4 100644
--- a/files/build/versions/dockers/docker-base-bookworm/versions-py3
+++ b/files/build/versions/dockers/docker-base-bookworm/versions-py3
@@ -1,7 +1,7 @@
 j2cli==0.3.10
 jinja2==3.1.5
 markupsafe==3.0.2
-pip==25.0
+pip==25.0.1
 setuptools==66.1.1
 supervisor==4.2.5
 supervisord-dependent-startup==1.4.0
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
index 918861773e7..55244845adf 100644
--- a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
@@ -1,20 +1,20 @@
 ca-certificates==20210119
-curl==7.74.0-1.3+deb11u14
+curl==7.74.0-1.3+deb11u15
 iproute2==5.10.0-4
 jq==1.6-2.1
 less==551-2+deb11u2
 libatomic1==10.2.1-6
-libbpf0==1:0.3-2
+libbpf0==1:0.3-2+deb11u1
 libbrotli1==1.0.9-2+b2
 libbsd0==0.11.3-1+deb11u1
-libcap2==1:2.44-1
-libcap2-bin==1:2.44-1
-libcurl4==7.74.0-1.3+deb11u14
+libcap2==1:2.44-1+deb11u1
+libcap2-bin==1:2.44-1+deb11u1
+libcurl4==7.74.0-1.3+deb11u15
 libdaemon0==0.14-7.1
 libdbus-1-3==1.12.28-0+deb11u1
 libelf1==0.183-1
 libestr0==0.1.10-2.1+b1
-libexpat1==2.2.10-2+deb11u6
+libexpat1==2.2.10-2+deb11u7
 libfastjson4==0.99.9-1
 libgdbm-compat4==1.19-2
 libgdbm6==1.19-2
@@ -39,8 +39,8 @@ libpgm-5.3-0==5.3.128~dfsg-2
 libprocps8==2:3.3.17-5
 libpsl5==0.21.0-1.2
 libpython3-stdlib==3.9.2-3
-libpython3.9-minimal==3.9.2-1+deb11u2
-libpython3.9-stdlib==3.9.2-1+deb11u2
+libpython3.9-minimal==3.9.2-1+deb11u3
+libpython3.9-stdlib==3.9.2-1+deb11u3
 libreadline8==8.1-1
 librtmp1==2.4+20151223.gitfa8646d.1-2+b2
 libsasl2-2==2.1.27+dfsg-2.1+deb11u1
@@ -56,7 +56,7 @@ libzmq5==4.3.4-1+deb11u1
 lua-bitop==1.0.2-5
 lua-cjson==2.1.0+dfsg-2.1
 media-types==4.0.0
-net-tools==1.60+git20181103.0eebece-1+deb11u1
+net-tools==1.60+git20181103.0eebece-1+deb11u2
 openssl==1.1.1n-0+deb11u5+fips
 perl==5.32.1-4+deb11u4
 perl-modules-5.32==5.32.1-4+deb11u4
@@ -66,13 +66,13 @@ python3==3.9.2-3
 python3-distutils==3.9.2-1
 python3-lib2to3==3.9.2-1
 python3-minimal==3.9.2-3
-python3.9==3.9.2-1+deb11u2
-python3.9-minimal==3.9.2-1+deb11u2
+python3.9==3.9.2-1+deb11u3
+python3.9-minimal==3.9.2-1+deb11u3
 readline-common==8.1-1
-redis-tools==5:6.0.16-1+deb11u5
+redis-tools==5:6.0.16-1+deb11u6
 rsyslog==8.2302.0-1~bpo11+1
 socat==1.7.4.1-3
 symcrypt-openssl==0.1
-vim-common==2:8.2.2434-3+deb11u1
-vim-tiny==2:8.2.2434-3+deb11u1
-xxd==2:8.2.2434-3+deb11u1
+vim-common==2:8.2.2434-3+deb11u3
+vim-tiny==2:8.2.2434-3+deb11u3
+xxd==2:8.2.2434-3+deb11u3
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-py3 b/files/build/versions/dockers/docker-base-bullseye/versions-py3
index c047b7a76ba..a85fa50eecf 100644
--- a/files/build/versions/dockers/docker-base-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-base-bullseye/versions-py3
@@ -1,7 +1,7 @@
 j2cli==0.3.10
 jinja2==3.1.5
 markupsafe==3.0.2
-pip==25.0
+pip==25.0.1
 setuptools==49.6.0
 supervisor==4.2.1
 supervisord-dependent-startup==1.4.0
diff --git a/files/build/versions/dockers/docker-bmp-watchdog/versions-deb-bookworm b/files/build/versions/dockers/docker-bmp-watchdog/versions-deb-bookworm
new file mode 100644
index 00000000000..19c39538040
--- /dev/null
+++ b/files/build/versions/dockers/docker-bmp-watchdog/versions-deb-bookworm
@@ -0,0 +1,38 @@
+apt-utils==2.6.1
+binutils-common==2.40-2
+dpkg-dev==1.21.22
+icu-devtools==72.1-3+deb12u1
+libboost-serialization1.74.0==1.74.0+ds1-21
+libc-dev-bin==2.36-9+deb12u10
+libc6-dev==2.36-9+deb12u10
+libcrypt-dev==1:4.4.33-2
+libhiredis0.14==0.14.1-3
+libicu-dev==72.1-3+deb12u1
+libicu72==72.1-3+deb12u1
+libjs-jquery==3.6.1+dfsg+~3.5.14-1
+libk5crypto3==1.20.1-2+deb12u3
+libnl-3-200==3.7.0-0.2+b1sonic1
+libnl-cli-3-200==3.7.0-0.2+b1sonic1
+libnl-genl-3-200==3.7.0-0.2+b1sonic1
+libnl-nf-3-200==3.7.0-0.2+b1sonic1
+libnl-route-3-200==3.7.0-0.2+b1sonic1
+libnsl-dev==1.3.0-2
+libpcre3==2:8.39-15
+libpython3.11==3.11.2-6+deb12u6
+libswsscommon==1.0.0
+libtirpc-dev==1.3.3+ds-1
+libxml2==2.9.14+dfsg-1.3~deb12u2
+libxml2-dev==2.9.14+dfsg-1.3~deb12u2
+libxslt1-dev==1.1.35-1+deb12u1
+libxslt1.1==1.1.35-1+deb12u1
+libyaml-0-2==0.2.5-1
+libyang==1.0.73
+libyang-cpp==1.0.73
+linux-libc-dev==6.1.140-1
+python3-swsscommon==1.0.0
+python3-yaml==6.0-3+b2
+python3-yang==1.0.73
+rpcsvc-proto==1.4.3-1
+sonic-db-cli==1.0.0
+sonic-eventd==1.0.0-0
+zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-bmp-watchdog/versions-py3 b/files/build/versions/dockers/docker-bmp-watchdog/versions-py3
new file mode 100644
index 00000000000..11f10ec1e0f
--- /dev/null
+++ b/files/build/versions/dockers/docker-bmp-watchdog/versions-py3
@@ -0,0 +1,18 @@
+async-timeout==5.0.1
+bitarray==2.8.1
+ijson==3.2.3
+ipaddress==1.0.23
+jsondiff==2.2.1
+jsonpointer==3.0.0
+lxml==4.9.1
+natsort==8.4.0
+netaddr==0.8.0
+pyang==2.6.1
+pyangbind==0.8.2
+pyyaml==6.0.1
+redis==5.0.1
+redis-dump-load==1.1
+regex==2024.11.6
+six==1.17.0
+tabulate==0.9.0
+xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
index 2aa955c8af3..19c39538040 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
@@ -1,16 +1,16 @@
 apt-utils==2.6.1
 binutils-common==2.40-2
 dpkg-dev==1.21.22
-icu-devtools==72.1-3
+icu-devtools==72.1-3+deb12u1
 libboost-serialization1.74.0==1.74.0+ds1-21
-libc-dev-bin==2.36-9+deb12u9
-libc6-dev==2.36-9+deb12u9
+libc-dev-bin==2.36-9+deb12u10
+libc6-dev==2.36-9+deb12u10
 libcrypt-dev==1:4.4.33-2
 libhiredis0.14==0.14.1-3
-libicu-dev==72.1-3
-libicu72==72.1-3
+libicu-dev==72.1-3+deb12u1
+libicu72==72.1-3+deb12u1
 libjs-jquery==3.6.1+dfsg+~3.5.14-1
-libk5crypto3==1.20.1-2+deb12u2
+libk5crypto3==1.20.1-2+deb12u3
 libnl-3-200==3.7.0-0.2+b1sonic1
 libnl-cli-3-200==3.7.0-0.2+b1sonic1
 libnl-genl-3-200==3.7.0-0.2+b1sonic1
@@ -18,17 +18,17 @@ libnl-nf-3-200==3.7.0-0.2+b1sonic1
 libnl-route-3-200==3.7.0-0.2+b1sonic1
 libnsl-dev==1.3.0-2
 libpcre3==2:8.39-15
-libpython3.11==3.11.2-6+deb12u5
+libpython3.11==3.11.2-6+deb12u6
 libswsscommon==1.0.0
 libtirpc-dev==1.3.3+ds-1
-libxml2==2.9.14+dfsg-1.3~deb12u1
-libxml2-dev==2.9.14+dfsg-1.3~deb12u1
-libxslt1-dev==1.1.35-1
-libxslt1.1==1.1.35-1
+libxml2==2.9.14+dfsg-1.3~deb12u2
+libxml2-dev==2.9.14+dfsg-1.3~deb12u2
+libxslt1-dev==1.1.35-1+deb12u1
+libxslt1.1==1.1.35-1+deb12u1
 libyaml-0-2==0.2.5-1
 libyang==1.0.73
 libyang-cpp==1.0.73
-linux-libc-dev==6.1.124-1
+linux-libc-dev==6.1.140-1
 python3-swsscommon==1.0.0
 python3-yaml==6.0-3+b2
 python3-yang==1.0.73
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
index b8ebcce71da..11f10ec1e0f 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
@@ -3,6 +3,7 @@ bitarray==2.8.1
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.2.1
+jsonpointer==3.0.0
 lxml==4.9.1
 natsort==8.4.0
 netaddr==0.8.0
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
index 81ffe6136b5..5352e7ae3e6 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
@@ -3,6 +3,7 @@ dpkg-dev==1.20.13
 icu-devtools==67.1-7
 libboost-serialization1.74.0==1.74.0-9
 libc-dev-bin==2.31-13+deb11u11
+libc6==2.31-13+deb11u13
 libc6-dev==2.31-13+deb11u11
 libcrypt-dev==1:4.4.18-4
 libhiredis0.14==0.14.1-1
@@ -15,7 +16,7 @@ libnl-genl-3-200==3.7.0-0.2+b1sonic1
 libnl-nf-3-200==3.7.0-0.2+b1sonic1
 libnl-route-3-200==3.7.0-0.2+b1sonic1
 libnsl-dev==1.3.0-2
-libpython3.9==3.9.2-1+deb11u2
+libpython3.9==3.9.2-1+deb11u3
 libswsscommon==1.0.0
 libtirpc-dev==1.3.1-1+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u5
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye-arm64
new file mode 100644
index 00000000000..66af7bcfd52
--- /dev/null
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye-arm64
@@ -0,0 +1,10 @@
+icu-devtools==67.1-7+deb11u1
+libc-dev-bin==2.31-13+deb11u13
+libc6-dev==2.31-13+deb11u13
+libicu-dev==67.1-7+deb11u1
+libicu67==67.1-7+deb11u1
+libxml2==2.9.10+dfsg-6.7+deb11u7
+libxml2-dev==2.9.10+dfsg-6.7+deb11u7
+libxslt1-dev==1.1.34-4+deb11u2
+libxslt1.1==1.1.34-4+deb11u2
+linux-libc-dev==5.10.237-1
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
index 4d51d609b05..cc0832c581b 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
@@ -3,6 +3,7 @@ bitarray==2.8.1
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.2.1
+jsonpointer==3.0.0
 lxml==4.9.1
 natsort==8.4.0
 netaddr==0.8.0
diff --git a/files/build/versions/dockers/docker-dash-engine/versions-deb-focal b/files/build/versions/dockers/docker-dash-engine/versions-deb-focal
index c8a2a945e07..bfefec03a5e 100644
--- a/files/build/versions/dockers/docker-dash-engine/versions-deb-focal
+++ b/files/build/versions/dockers/docker-dash-engine/versions-deb-focal
@@ -1,12 +1,12 @@
-binutils==2.34-6ubuntu1.9
-binutils-common==2.34-6ubuntu1.9
-binutils-x86-64-linux-gnu==2.34-6ubuntu1.9
+binutils==2.34-6ubuntu1.11
+binutils-common==2.34-6ubuntu1.11
+binutils-x86-64-linux-gnu==2.34-6ubuntu1.11
 build-essential==12.8ubuntu1.1
 ca-certificates==20240203~20.04.1
 cpp==4:9.3.0-1ubuntu2
 cpp-9==9.4.0-1ubuntu1~20.04.2
 cron==3.0pl1-136ubuntu1
-dirmngr==2.2.19-3ubuntu2.2
+dirmngr==2.2.19-3ubuntu2.4
 dpkg-dev==1.19.7ubuntu3.2
 fakeroot==1.24-1
 g++==4:9.3.0-1ubuntu2
@@ -15,16 +15,16 @@ gcc==4:9.3.0-1ubuntu2
 gcc-10-base==10.5.0-1ubuntu1~20.04
 gcc-9==9.4.0-1ubuntu1~20.04.2
 gcc-9-base==9.4.0-1ubuntu1~20.04.2
-gnupg==2.2.19-3ubuntu2.2
-gnupg-l10n==2.2.19-3ubuntu2.2
-gnupg-utils==2.2.19-3ubuntu2.2
-gpg==2.2.19-3ubuntu2.2
-gpg-agent==2.2.19-3ubuntu2.2
-gpg-wks-client==2.2.19-3ubuntu2.2
-gpg-wks-server==2.2.19-3ubuntu2.2
-gpgconf==2.2.19-3ubuntu2.2
-gpgsm==2.2.19-3ubuntu2.2
-gpgv==2.2.19-3ubuntu2.2
+gnupg==2.2.19-3ubuntu2.4
+gnupg-l10n==2.2.19-3ubuntu2.4
+gnupg-utils==2.2.19-3ubuntu2.4
+gpg==2.2.19-3ubuntu2.4
+gpg-agent==2.2.19-3ubuntu2.4
+gpg-wks-client==2.2.19-3ubuntu2.4
+gpg-wks-server==2.2.19-3ubuntu2.4
+gpgconf==2.2.19-3ubuntu2.4
+gpgsm==2.2.19-3ubuntu2.4
+gpgv==2.2.19-3ubuntu2.4
 libalgorithm-diff-perl==1.19.03-2
 libalgorithm-diff-xs-perl==0.04-6
 libalgorithm-merge-perl==0.08-3
@@ -32,10 +32,10 @@ libasan5==9.4.0-1ubuntu1~20.04.2
 libasn1-8-heimdal==7.7.0+dfsg-1ubuntu1.4
 libassuan0==2.5.3-7ubuntu2
 libatomic1==10.5.0-1ubuntu1~20.04
-libbinutils==2.34-6ubuntu1.9
+libbinutils==2.34-6ubuntu1.11
 libcc1-0==10.5.0-1ubuntu1~20.04
-libctf-nobfd0==2.34-6ubuntu1.9
-libctf0==2.34-6ubuntu1.9
+libctf-nobfd0==2.34-6ubuntu1.11
+libctf0==2.34-6ubuntu1.11
 libdpkg-perl==1.19.7ubuntu3.2
 libestr0==0.1.10-2.1
 libexpat1==2.2.9-1ubuntu0.8
@@ -67,10 +67,10 @@ libnpth0==1.6-1
 libperl5.30==5.30.0-9ubuntu0.5
 libpopt0==1.16-14
 libpython3-dev==3.8.2-0ubuntu2
-libpython3.8==3.8.10-0ubuntu1~20.04.14
-libpython3.8-dev==3.8.10-0ubuntu1~20.04.14
-libpython3.8-minimal==3.8.10-0ubuntu1~20.04.14
-libpython3.8-stdlib==3.8.10-0ubuntu1~20.04.14
+libpython3.8==3.8.10-0ubuntu1~20.04.18
+libpython3.8-dev==3.8.10-0ubuntu1~20.04.18
+libpython3.8-minimal==3.8.10-0ubuntu1~20.04.18
+libpython3.8-stdlib==3.8.10-0ubuntu1~20.04.18
 libquadmath0==10.5.0-1ubuntu1~20.04
 libroken18-heimdal==7.7.0+dfsg-1ubuntu1.4
 libstdc++-9-dev==9.4.0-1ubuntu1~20.04.2
@@ -80,9 +80,9 @@ libubsan1==10.5.0-1ubuntu1~20.04
 libwind0-heimdal==7.7.0+dfsg-1ubuntu1.4
 logrotate==3.14.0-4ubuntu3
 make==4.2.1-1.2
-net-tools==1.60+git20180626.aebd88e-1ubuntu1
+net-tools==1.60+git20180626.aebd88e-1ubuntu1.3
 netbase==6.1
-openssl==1.1.1f-1ubuntu2.23
+openssl==1.1.1f-1ubuntu2.24
 patch==2.7.6-6
 perl==5.30.0-9ubuntu0.5
 perl-base==5.30.0-9ubuntu0.5
@@ -92,9 +92,9 @@ python-pip-whl==20.0.2-5ubuntu1.11
 python3-dev==3.8.2-0ubuntu2
 python3-pip==20.0.2-5ubuntu1.11
 python3-wheel==0.34.2-1ubuntu0.1
-python3.8==3.8.10-0ubuntu1~20.04.14
-python3.8-dev==3.8.10-0ubuntu1~20.04.14
-python3.8-minimal==3.8.10-0ubuntu1~20.04.14
+python3.8==3.8.10-0ubuntu1~20.04.18
+python3.8-dev==3.8.10-0ubuntu1~20.04.18
+python3.8-minimal==3.8.10-0ubuntu1~20.04.18
 rsyslog==8.2001.0-1ubuntu1.3
 supervisor==4.1.0-1ubuntu1
 ucf==3.0038+nmu1
diff --git a/files/build/versions/dockers/docker-dash-ha/versions-deb-bookworm b/files/build/versions/dockers/docker-dash-ha/versions-deb-bookworm
new file mode 100644
index 00000000000..0e2a05119df
--- /dev/null
+++ b/files/build/versions/dockers/docker-dash-ha/versions-deb-bookworm
@@ -0,0 +1,33 @@
+dash-ha==1.0.0
+dash-ha-dbgsym==1.0.0
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u12
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u6
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3+deb12u1
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+swss-dbg==1.0.0
+ucf==3.0043+nmu1+deb12u1
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-database/versions-deb-bookworm b/files/build/versions/dockers/docker-database/versions-deb-bookworm
index f4c2645ccf7..e62485f8972 100644
--- a/files/build/versions/dockers/docker-database/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-database/versions-deb-bookworm
@@ -3,32 +3,32 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdashapi==1.0.0
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libprotobuf-lite32==3.21.12-3
 libprotobuf32==3.21.12-3
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
-redis-server==5:7.0.15-1~deb12u3
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
+redis-server==5:7.0.15-1~deb12u4
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
 strace==6.1-0.1
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
index b3e60ca36db..6aaf023a95e 100644
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
@@ -5,39 +5,39 @@ isc-dhcp-relay-dbgsym==4.4.3-P1-2
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libevent-2.1-7==2.1.12-stable-8
+libevent-core-2.1-7==2.1.12-stable-8
+libevent-pthreads-2.1-7==2.1.12-stable-8
 libexplain51==1.4.D001-12+b1
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libjsoncpp-dev==1.9.5-4
 libjsoncpp25==1.9.5-4
-liblua5.1-0==5.1.5-9
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 lsof==4.95.0-1
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sonic-dhcp6relay==1.0.0-0
 sonic-dhcp6relay-dbgsym==1.0.0-0
 sonic-dhcpmon==1.0.0-0
 sonic-dhcpmon-dbgsym==1.0.0-0
-sonic-rsyslog-plugin==1.0.0-0
 sshpass==1.09-1+b1
 strace==6.1-0.1
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-py3 b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
index 2f3b68a199d..d3b7ef75c4b 100644
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-py3
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
@@ -1,3 +1,3 @@
 freezegun==1.5.1
-psutil==6.1.1
+psutil==7.0.0
 python-dateutil==2.9.0.post0
diff --git a/files/build/versions/dockers/docker-dhcp-server/versions-deb-bookworm b/files/build/versions/dockers/docker-dhcp-server/versions-deb-bookworm
index ae4c8987e1d..9f05a98030b 100644
--- a/files/build/versions/dockers/docker-dhcp-server/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-dhcp-server/versions-deb-bookworm
@@ -2,10 +2,10 @@ kea-common==2.2.0-6
 kea-dhcp4-server==2.2.0-6
 liblog4cplus-2.0.5==2.0.8-1
 liblua5.1-0==5.1.5-9
-libmariadb3==1:10.11.6-0+deb12u1
+libmariadb3==1:10.11.11-0+deb12u1
 libpcap0.8==1.10.3-1
-libpq5==15.10-0+deb12u1
-mariadb-common==1:10.11.6-0+deb12u1
+libpq5==15.13-0+deb12u1
+mariadb-common==1:10.11.11-0+deb12u1
 mysql-common==5.8+1.1.0
 sonic-rsyslog-plugin==1.0.0-0
 tcpdump==4.99.3-1
diff --git a/files/build/versions/dockers/docker-dhcp-server/versions-py3 b/files/build/versions/dockers/docker-dhcp-server/versions-py3
index 2f3b68a199d..d3b7ef75c4b 100644
--- a/files/build/versions/dockers/docker-dhcp-server/versions-py3
+++ b/files/build/versions/dockers/docker-dhcp-server/versions-py3
@@ -1,3 +1,3 @@
 freezegun==1.5.1
-psutil==6.1.1
+psutil==7.0.0
 python-dateutil==2.9.0.post0
diff --git a/files/build/versions/dockers/docker-eventd/versions-deb-bookworm b/files/build/versions/dockers/docker-eventd/versions-deb-bookworm
index 07c80f1e81c..479a037c37a 100644
--- a/files/build/versions/dockers/docker-eventd/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-eventd/versions-deb-bookworm
@@ -3,29 +3,29 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sonic-eventd-dbgsym==1.0.0-0
 sshpass==1.09-1+b1
 strace==6.1-0.1
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm
index 025082dacd5..7d91f8ea591 100644
--- a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm
@@ -1,29 +1,29 @@
 cron==3.0pl1-162
 cron-daemon-common==3.0pl1-162
-frr==10.0.1-sonic-0
-frr-dbgsym==10.0.1-sonic-0
-frr-snmp==10.0.1-sonic-0
-frr-snmp-dbgsym==10.0.1-sonic-0
+frr==10.3-sonic-0
+frr-dbgsym==10.3-sonic-0
+frr-snmp==10.3-sonic-0
+frr-snmp-dbgsym==10.3-sonic-0
 gdb==13.1-3
 gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libc-ares2==1.18.1-3
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libjson-c5==0.16-2
-liblua5.1-0==5.1.5-9
 libmpfr6==4.2.0-1
 libpci3==1:3.9.0-4
+libpcre2-posix3==10.42-1
 libpopt0==1.19+dfsg-1
 libprotobuf-c1==1.4.1-1+b1
 libsensors-config==1:3.6.0-7.1
@@ -32,22 +32,21 @@ libsnmp-base==5.9.3+dfsg-2
 libsnmp40==5.9.3+dfsg-2
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 libyang2t64==2.1.148-0.2
 libyang2t64-dbgsym==2.1.148-0.2
 logrotate==3.21.0-1
 lsof==4.95.0-1
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 pci.ids==0.0~2023.04.11-1
 sensible-utils==0.0.17+nmu1
-sonic-rsyslog-plugin==1.0.0-0
 sshpass==1.09-1+b1
 strace==6.1-0.1
 swss-dbg==1.0.0
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bookworm b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bookworm
new file mode 100644
index 00000000000..18f76ab185e
--- /dev/null
+++ b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bookworm
@@ -0,0 +1,44 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libc-dev-bin==2.36-9+deb12u10
+libc6-dev==2.36-9+deb12u10
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u12
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u6
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3+deb12u1
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libnsl-dev==1.3.0-2
+libprotobuf-dev==3.21.12-3
+libprotobuf-lite32==3.21.12-3
+libprotobuf32==3.21.12-3
+libsaibroncos==3.11
+libsaimetadata==1.0.0
+libsairedis==1.0.0
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
+libswsscommon-dbgsym==1.0.0
+libtirpc-dev==1.3.3+ds-1
+libunwind8==1.6.2-3
+linux-libc-dev==6.1.140-1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
+rpcsvc-proto==1.4.3-1
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+syncd==1.0.0
+ucf==3.0043+nmu1+deb12u1
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
+zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
deleted file mode 100644
index fe9596db1ad..00000000000
--- a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
+++ /dev/null
@@ -1,38 +0,0 @@
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u11
-libc6-dev==2.31-13+deb11u11
-libcbor0==0.5.0+dfsg-2
-libcrypt-dev==1:4.4.18-4
-libcurl3-gnutls==7.74.0-1.3+deb11u14
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u5
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libmpfr6==4.1.0-3
-libnsl-dev==1.3.0-2
-libprotobuf-dev==3.12.4-1+deb11u1
-libprotobuf-lite23==3.12.4-1+deb11u1
-libprotobuf23==3.12.4-1+deb11u1
-libsaibroncos==3.11
-libsaimetadata==1.0.0
-libsairedis==1.0.0
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libtirpc-dev==1.3.1-1+deb11u1
-libunwind8==1.3.2-2
-linux-libc-dev==5.10.226-1
-openssh-client==1:8.4p1-5+deb11u3
-sshpass==1.09-1+b1
-strace==5.10-1
-syncd==1.0.0
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
-zlib1g-dev==1:1.2.11.dfsg-2+deb11u2
diff --git a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bookworm b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bookworm
new file mode 100644
index 00000000000..3d051a9361d
--- /dev/null
+++ b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bookworm
@@ -0,0 +1,36 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u12
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u6
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3+deb12u1
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libsaicredo==0.9.9
+libsaicredo-blackhawk==0.9.9
+libsaicredo-owl==0.9.9
+libsaimetadata==1.0.0
+libsairedis==1.0.0
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+syncd==1.0.0
+ucf==3.0043+nmu1+deb12u1
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
deleted file mode 100644
index cd6fdfa4360..00000000000
--- a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
+++ /dev/null
@@ -1,30 +0,0 @@
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u14
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u5
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libmpfr6==4.1.0-3
-libsaicredo==0.9.9
-libsaicredo-blackhawk==0.9.9
-libsaicredo-owl==0.9.9
-libsaimetadata==1.0.0
-libsairedis==1.0.0
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u3
-sshpass==1.09-1+b1
-strace==5.10-1
-syncd==1.0.0
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
index 1be6d70b521..5ec8d063e73 100644
--- a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
@@ -6,19 +6,19 @@ binutils-x86-64-linux-gnu==2.40-2
 clang==1:14.0-55.7~deb12u1
 clang-14==1:14.0.6-12
 cpp==4:12.2.0-3
-cpp-12==12.2.0-14
+cpp-12==12.2.0-14+deb12u1
 file==1:5.44-3
 flex==2.6.4-8.2
 gcc==4:12.2.0-3
-gcc-12==12.2.0-14
+gcc-12==12.2.0-14+deb12u1
 gdb==13.1-3
 gdbserver==13.1-3
-gfortran-12==12.2.0-14
+gfortran-12==12.2.0-14+deb12u1
 ibverbs-providers==44.0-2
-icu-devtools==72.1-3
-libabsl-dev==20220623.1-1
-libabsl20220623==20220623.1-1
-libasan8==12.2.0-14
+icu-devtools==72.1-3+deb12u1
+libabsl-dev==20220623.1-1+deb12u2
+libabsl20220623==20220623.1-1+deb12u2
+libasan8==12.2.0-14+deb12u1
 libbabeltrace1==1.5.11-1+b2
 libbinutils==2.40-2
 libboost-all-dev==1.74.0.3
@@ -120,17 +120,17 @@ libboost1.74-tools-dev==1.74.0+ds1-21
 libbpf-dev==1:1.1.0-1
 libc-ares-dev==1.18.1-3
 libc-ares2==1.18.1-3
-libc-dev-bin==2.36-9+deb12u9
-libc6-dev==2.36-9+deb12u9
+libc-dev-bin==2.36-9+deb12u10
+libc6-dev==2.36-9+deb12u10
 libcbor0.8==0.8.0-2+b1
-libcc1-0==12.2.0-14
+libcc1-0==12.2.0-14+deb12u1
 libclang-common-14-dev==1:14.0.6-12
 libclang-cpp14==1:14.0.6-12
 libclang1-14==1:14.0.6-12
 libctf-nobfd0==2.40-2
 libctf0==2.40-2
-libcurl3-gnutls==7.88.1-10+deb12u8
-libcurl3-nss==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
+libcurl3-nss==7.88.1-10+deb12u12
 libdbus-1-dev==1.14.10-1~deb12u1
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
@@ -151,13 +151,13 @@ libfl-dev==2.6.4-8.2
 libfl2==2.6.4-8.2
 libgc-dev==1:8.2.2-3
 libgc1==1:8.2.2-3
-libgcc-12-dev==12.2.0-14
-libgfortran-12-dev==12.2.0-14
-libgfortran5==12.2.0-14
-libglib2.0-0==2.74.6-2+deb12u5
+libgcc-12-dev==12.2.0-14+deb12u1
+libgfortran-12-dev==12.2.0-14+deb12u1
+libgfortran5==12.2.0-14+deb12u1
+libglib2.0-0==2.74.6-2+deb12u6
 libgmp-dev==2:6.2.1+dfsg1-1.1
 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1
-libgomp1==12.2.0-14
+libgomp1==12.2.0-14+deb12u1
 libgpm2==1.20.7-10+b1
 libgprofng0==2.40-2
 libgrpc++-dev==1.51.1-3+b1
@@ -169,16 +169,16 @@ libhwloc-plugins==2.9.0-1
 libhwloc15==2.9.0-1
 libibverbs-dev==44.0-2
 libibverbs1==44.0-2
-libicu-dev==72.1-3
-libicu72==72.1-3
+libicu-dev==72.1-3+deb12u1
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libisl23==0.25-1.1
-libitm1==12.2.0-14
+libitm1==12.2.0-14+deb12u1
 libjs-jquery-ui==1.13.2+dfsg-1
 libjs-sphinxdoc==5.3.0-4
 libjs-underscore==1.13.4~dfsg+~1.11.4-3
 libllvm14==1:14.0.6-12
-liblsan0==12.2.0-14
+liblsan0==12.2.0-14+deb12u1
 libltdl-dev==2.4.7-7~deb12u1
 libltdl7==2.4.7-7~deb12u1
 libmagic-mgc==1:5.44-3
@@ -195,8 +195,8 @@ libnspr4==2:4.35-1
 libnss3==2:3.87.1-1+deb12u1
 libnuma-dev==2.0.16-1
 libnuma1==2.0.16-1
-libobjc-12-dev==12.2.0-14
-libobjc4==12.2.0-14
+libobjc-12-dev==12.2.0-14+deb12u1
+libobjc4==12.2.0-14+deb12u1
 libopenmpi-dev==4.1.4-3+b1
 libopenmpi3==4.1.4-3+b1
 libpcap-dev==1.10.3-1
@@ -216,11 +216,11 @@ libprotoc32==3.21.12-3
 libpsm-infinipath1==3.3+20.604758e7-6.2
 libpsm2-2==11.2.185-2
 libpython3-dev==3.11.2-1+b1
-libpython3.11-dev==3.11.2-6+deb12u5
-libqt5core5a==5.15.8+dfsg-11+deb12u2
-libqt5dbus5==5.15.8+dfsg-11+deb12u2
-libqt5network5==5.15.8+dfsg-11+deb12u2
-libquadmath0==12.2.0-14
+libpython3.11-dev==3.11.2-6+deb12u6
+libqt5core5a==5.15.8+dfsg-11+deb12u3
+libqt5dbus5==5.15.8+dfsg-11+deb12u3
+libqt5network5==5.15.8+dfsg-11+deb12u3
+libquadmath0==12.2.0-14+deb12u1
 librdmacm1==44.0-2
 libre2-9==20220601+dfsg-1+b1
 libre2-dev==20220601+dfsg-1+b1
@@ -233,16 +233,16 @@ libsaivs==1.0.0
 libsaivs-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
-libstdc++-12-dev==12.2.0-14
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
+libstdc++-12-dev==12.2.0-14+deb12u1
 libswsscommon-dbgsym==1.0.0
 libthrift-0.17.0==0.17.0-2+b2
 libthrift-dev==0.17.0-2+b2
 libtirpc-dev==1.3.3+ds-1
 libtool==2.4.7-7~deb12u1
-libtsan2==12.2.0-14
-libubsan1==12.2.0-14
+libtsan2==12.2.0-14+deb12u1
+libubsan1==12.2.0-14+deb12u1
 libucx0==1.13.1-1
 libunwind8==1.6.2-3
 libx11-6==2:1.8.4-2+deb12u2
@@ -251,10 +251,10 @@ libxau6==1:1.0.9-1
 libxcb1==1.15-1
 libxdmcp6==1:1.1.2-3
 libxext6==2:1.3.4-1+b1
-libxml2==2.9.14+dfsg-1.3~deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u2
 libxnvctrl0==525.85.05-3~deb12u1
 libz3-4==4.8.12-3.1
-linux-libc-dev==6.1.124-1
+linux-libc-dev==6.1.140-1
 llvm==1:14.0-55.7~deb12u1
 llvm-14==1:14.0.6-12
 llvm-14-linker-tools==1:14.0.6-12
@@ -268,8 +268,8 @@ nss-plugin-pem==1.0.8+1-1
 ocl-icd-libopencl1==2.3.1-1
 openmpi-bin==4.1.4-3+b1
 openmpi-common==4.1.4-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 p4lang-bmv2==1.15.0-7
 p4lang-p4c==1.2.4.2-2
 p4lang-pi==0.1.0-15
@@ -287,7 +287,7 @@ python3-pyroute2==0.7.2-2
 python3-scapy==2.5.0+dfsg-2
 python3-six==1.16.0-4
 python3-thrift==0.17.0-2+b2
-python3.11-dev==3.11.2-6+deb12u5
+python3.11-dev==3.11.2-6+deb12u6
 rpcsvc-proto==1.4.3-1
 sensible-utils==0.0.17+nmu1
 sgml-base==1.31
@@ -299,7 +299,7 @@ syncd-vs-dbgsym==1.0.0
 tcpdump==4.99.3-1
 thrift-compiler==0.17.0-2+b2
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
 xml-core==0.18+nmu1
 zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-gnmi-watchdog/versions-deb-bookworm b/files/build/versions/dockers/docker-gnmi-watchdog/versions-deb-bookworm
new file mode 100644
index 00000000000..19c39538040
--- /dev/null
+++ b/files/build/versions/dockers/docker-gnmi-watchdog/versions-deb-bookworm
@@ -0,0 +1,38 @@
+apt-utils==2.6.1
+binutils-common==2.40-2
+dpkg-dev==1.21.22
+icu-devtools==72.1-3+deb12u1
+libboost-serialization1.74.0==1.74.0+ds1-21
+libc-dev-bin==2.36-9+deb12u10
+libc6-dev==2.36-9+deb12u10
+libcrypt-dev==1:4.4.33-2
+libhiredis0.14==0.14.1-3
+libicu-dev==72.1-3+deb12u1
+libicu72==72.1-3+deb12u1
+libjs-jquery==3.6.1+dfsg+~3.5.14-1
+libk5crypto3==1.20.1-2+deb12u3
+libnl-3-200==3.7.0-0.2+b1sonic1
+libnl-cli-3-200==3.7.0-0.2+b1sonic1
+libnl-genl-3-200==3.7.0-0.2+b1sonic1
+libnl-nf-3-200==3.7.0-0.2+b1sonic1
+libnl-route-3-200==3.7.0-0.2+b1sonic1
+libnsl-dev==1.3.0-2
+libpcre3==2:8.39-15
+libpython3.11==3.11.2-6+deb12u6
+libswsscommon==1.0.0
+libtirpc-dev==1.3.3+ds-1
+libxml2==2.9.14+dfsg-1.3~deb12u2
+libxml2-dev==2.9.14+dfsg-1.3~deb12u2
+libxslt1-dev==1.1.35-1+deb12u1
+libxslt1.1==1.1.35-1+deb12u1
+libyaml-0-2==0.2.5-1
+libyang==1.0.73
+libyang-cpp==1.0.73
+linux-libc-dev==6.1.140-1
+python3-swsscommon==1.0.0
+python3-yaml==6.0-3+b2
+python3-yang==1.0.73
+rpcsvc-proto==1.4.3-1
+sonic-db-cli==1.0.0
+sonic-eventd==1.0.0-0
+zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-gnmi-watchdog/versions-py3 b/files/build/versions/dockers/docker-gnmi-watchdog/versions-py3
new file mode 100644
index 00000000000..11f10ec1e0f
--- /dev/null
+++ b/files/build/versions/dockers/docker-gnmi-watchdog/versions-py3
@@ -0,0 +1,18 @@
+async-timeout==5.0.1
+bitarray==2.8.1
+ijson==3.2.3
+ipaddress==1.0.23
+jsondiff==2.2.1
+jsonpointer==3.0.0
+lxml==4.9.1
+natsort==8.4.0
+netaddr==0.8.0
+pyang==2.6.1
+pyangbind==0.8.2
+pyyaml==6.0.1
+redis==5.0.1
+redis-dump-load==1.1
+regex==2024.11.6
+six==1.17.0
+tabulate==0.9.0
+xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-lldp/versions-deb-bookworm b/files/build/versions/dockers/docker-lldp/versions-deb-bookworm
index 8a45c23a957..49054a4630f 100644
--- a/files/build/versions/dockers/docker-lldp/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-lldp/versions-deb-bookworm
@@ -3,16 +3,16 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libevent-2.1-7==2.1.12-stable-8
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libpci3==1:3.9.0-4
@@ -22,19 +22,19 @@ libsnmp-base==5.9.3+dfsg-2
 libsnmp40==5.9.3+dfsg-2
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-libxml2==2.9.14+dfsg-1.3~deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u2
 lldpd==1.0.16-1+deb12u1
 lldpd-dbgsym==1.0.16-1+deb12u1
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 pci.ids==0.0~2023.04.11-1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
 strace==6.1-0.1
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-macsec/versions-deb-bookworm b/files/build/versions/dockers/docker-macsec/versions-deb-bookworm
index 4375c80f9db..91fc8a96909 100644
--- a/files/build/versions/dockers/docker-macsec/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-macsec/versions-deb-bookworm
@@ -3,32 +3,32 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libpcsclite1==1.9.9-2
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
 strace==6.1-0.1
 swss-dbg==1.0.0
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
 wpasupplicant==2:2.9.0-14
 wpasupplicant-dbgsym==2:2.9.0-14
diff --git a/files/build/versions/dockers/docker-mux/versions-deb-bookworm b/files/build/versions/dockers/docker-mux/versions-deb-bookworm
index 6bf075969d0..1f38df5b0cf 100644
--- a/files/build/versions/dockers/docker-mux/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-mux/versions-deb-bookworm
@@ -7,30 +7,30 @@ libboost-program-options1.74.0==1.74.0+ds1-21
 libboost-regex1.74.0==1.74.0+ds1-21
 libboost-thread1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sonic-linkmgrd==1.0.0-1
 sonic-linkmgrd-dbgsym==1.0.0-1
 sshpass==1.09-1+b1
 strace==6.1-0.1
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-nat/versions-deb-bookworm b/files/build/versions/dockers/docker-nat/versions-deb-bookworm
index e27658ff287..ff8a9bcd1f5 100644
--- a/files/build/versions/dockers/docker-nat/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-nat/versions-deb-bookworm
@@ -6,15 +6,15 @@ iptables==1.8.9-2
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libip4tc2==1.8.9-2
 libip6tc2==1.8.9-2
 libipt2==2.0.5-1
@@ -25,17 +25,17 @@ libnfnetlink0==1.0.2-2
 libnftnl11==1.2.4-2
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 netbase==6.4
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
 strace==6.1-0.1
 swss-dbg==1.0.0
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm b/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
index b86ffd5d458..8d2d3de861e 100644
--- a/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
@@ -7,18 +7,17 @@ ifupdown==0.8.41
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libkmod2==30+20221128-1
-liblua5.1-0==5.1.5-9
 libmpfr6==4.2.0-1
 libnet1==1.1.6+dfsg-3.2
 libnetfilter-conntrack3==1.0.9-3
@@ -28,24 +27,23 @@ libpci3==1:3.9.0-4
 libsairedis-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 ndisc6==1.0.5-1+b2
 ndppd==0.2.5-6
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
 python3-protobuf==3.21.12-3
 sensible-utils==0.0.17+nmu1
 sgml-base==1.31
-sonic-rsyslog-plugin==1.0.0-0
 sshpass==1.09-1+b1
 strace==6.1-0.1
 swss-dbg==1.0.0
 tcpdump==4.99.3-1
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
index fd291952ea1..815fcacc7fa 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
@@ -9,16 +9,18 @@ fancontrol==1:3.6.0-7.1
 fontconfig==2.14.1-4
 fontconfig-config==2.14.1-4
 fonts-dejavu-core==2.37-6
+freeipmi-common==1.6.10-1
 gdb==13.1-3
 gdbserver==13.1-3
 i2c-tools==4.3-2+b3
+ipmitool==1.8.19-4+deb12u2
 iputils-ping==3:20221126-1+deb12u1
 libapparmor1==3.0.8-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcairo2==1.16.0-7
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdatrie1==0.2.13-2+b1
 libdbi1==0.9.0-6
 libdebuginfod-common==0.188-2.1
@@ -27,14 +29,15 @@ libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
 libfontconfig1==2.14.1-4
-libfreetype6==2.12.1+dfsg-5+deb12u3
+libfreeipmi17==1.6.10-1+b1
+libfreetype6==2.12.1+dfsg-5+deb12u4
 libfribidi0==1.0.8-2.1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
 libgraphite2-3==1.3.14-1
 libharfbuzz0b==6.0.0+dfsg-3
 libi2c0==4.3-2+b3
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libjson-c5==0.16-2
 libkmod2==30+20221128-1
@@ -53,8 +56,8 @@ libsensors5==1:3.6.0-7.1
 libsensors5-dbgsym==1:3.6.0-7.1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libthai-data==0.1.29-1
 libthai0==0.1.29-1
@@ -67,14 +70,14 @@ libxcb-shm0==1.15-1
 libxcb1==1.15-1
 libxdmcp6==1:1.1.2-3
 libxext6==2:1.3.4-1+b1
-libxml2==2.9.14+dfsg-1.3~deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u2
 libxrender1==1:0.9.10-1.1
 lm-sensors==1:3.6.0-7.1
 lm-sensors-dbgsym==1:3.6.0-7.1
-mft==4.28.0-96
+mft==4.32.0-120
 nvme-cli==2.4+really2.3-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
 psmisc==23.6-1
@@ -90,8 +93,8 @@ smartmontools==7.4-2~bpo12+1
 sshpass==1.09-1+b1
 strace==6.1-0.1
 ucf==3.0043+nmu1+deb12u1
-udev==252.33-1~deb12u1
+udev==252.38-1~deb12u1
 uuid-runtime==2.38.1-5+deb12u3
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
-xxd==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
+xxd==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-py3 b/files/build/versions/dockers/docker-platform-monitor/versions-py3
index b369fbabb75..abac181ec87 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-py3
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-py3
@@ -13,8 +13,9 @@ libpci==0.2
 netifaces==0.11.0
 nose==1.3.7
 protobuf==4.25.6
-psutil==6.1.1
+psutil==7.0.0
 pyrsistent==0.18.1
 requests==2.32.3
+smbus2==0.5.0
 thrift==0.13.0
 urllib3==2.3.0
diff --git a/files/build/versions/dockers/docker-ptf-sai/versions-py3 b/files/build/versions/dockers/docker-ptf-sai/versions-py3
index 4b9feb000c8..8e1d34823a2 100644
--- a/files/build/versions/dockers/docker-ptf-sai/versions-py3
+++ b/files/build/versions/dockers/docker-ptf-sai/versions-py3
@@ -1,18 +1,18 @@
 crc16==0.1.1
 getmac==0.9.5
-importlib-metadata==6.7.0
 netifaces==0.11.0
 packaging==24.0
 packet-helper==0.0.1
-psutil==6.1.1
+psutil==7.0.0
 ptf==0.0.0
 pyperclip==1.8.2
 pysubnettree==0.37
 scapy-helper==0.14.8
+setuptools==51.0.0
 setuptools-scm==7.1.0
 tabulate==0.8.10
 thrift==0.14.1
 tomli==2.0.1
 typing-extensions==4.7.1
+typing_extensions==4.7.1
 xmlrunner==1.7.7
-zipp==3.15.0
diff --git a/files/build/versions/dockers/docker-ptf/versions-deb-bullseye b/files/build/versions/dockers/docker-ptf/versions-deb-bullseye
new file mode 100644
index 00000000000..64693828b20
--- /dev/null
+++ b/files/build/versions/dockers/docker-ptf/versions-deb-bullseye
@@ -0,0 +1,507 @@
+adwaita-icon-theme==3.38.0-1
+alsa-topology-conf==1.2.4-1
+alsa-ucm-conf==1.2.4-2
+arping==2.21-2
+at-spi2-core==2.38.0-4+deb11u1
+autoconf==2.69-14
+automake==1:1.16.3-2
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+python3-distutils==3.9.2-1
+python3-ipython==7.20.0-1+deb11u1
+python3-ipython-genutils==0.2.0-4
+python3-jedi==0.18.0-1
+python3-lib2to3==3.9.2-1
+python3-minimal==3.9.2-3
+python3-parso==0.8.1-1
+python3-pexpect==4.8.0-2
+python3-pickleshare==0.7.5-3
+python3-pip==20.3.4-4+deb11u1
+python3-pkg-resources==52.0.0-4+deb11u2
+python3-prompt-toolkit==3.0.14-1
+python3-ptyprocess==0.7.0-1
+python3-pygments==2.7.1+dfsg-2.1
+python3-scapy==2.4.4-4
+python3-setuptools==52.0.0-4+deb11u2
+python3-six==1.16.0-2
+python3-thrift==0.14.1
+python3-traitlets==5.0.5-1
+python3-venv==3.9.2-3
+python3-wcwidth==0.1.9+dfsg1-2
+python3-wheel==0.34.2-1
+python3.9==3.9.2-1+deb11u3
+python3.9-dev==3.9.2-1+deb11u3
+python3.9-minimal==3.9.2-1+deb11u3
+python3.9-venv==3.9.2-1+deb11u3
+qt5-gtk-platformtheme==5.15.2+dfsg-9+deb11u1
+qttranslations5-l10n==5.15.2-2
+quilt==0.66-2.1
+readline-common==8.1-1
+rsyslog==8.2102.0-2+deb11u1
+runit-helper==2.10.3
+sensible-utils==0.0.14
+shared-mime-info==2.0-1
+sntp==1:4.2.8p15+dfsg-1
+sphinx-rtd-theme-common==0.5.1+dfsg-1
+ssl-cert==1.1.0+nmu1
+systemd==247.3-7+deb11u6
+systemd-sysv==247.3-7+deb11u6
+tcpd==7.6.q-31
+tcpdump==4.99.0-2+deb11u1
+telnet==0.17-42
+tmux==3.1c-1+deb11u1
+traceroute==1:2.1.0-2+deb11u1
+ucf==3.0043+deb11u2
+unzip==6.0-26+deb11u1
+vim==2:8.2.2434-3+deb11u3
+vim-common==2:8.2.2434-3+deb11u3
+vim-runtime==2:8.2.2434-3+deb11u3
+wget==1.21-1+deb11u2
+wireshark==3.4.16-0+deb11u1
+wireshark-common==3.4.16-0+deb11u1
+wireshark-qt==3.4.16-0+deb11u1
+x11-common==1:7.7+22
+xauth==1:1.1-1
+xdg-user-dirs==0.17-2
+xkb-data==2.29-2
+xxd==2:8.2.2434-3+deb11u3
+xz-utils==5.2.5-2.1~deb11u1
+zlib1g-dev==1:1.2.11.dfsg-2+deb11u2
diff --git a/files/build/versions/dockers/docker-ptf/versions-py3 b/files/build/versions/dockers/docker-ptf/versions-py3
index e8d1cb8d483..ef089565606 100644
--- a/files/build/versions/dockers/docker-ptf/versions-py3
+++ b/files/build/versions/dockers/docker-ptf/versions-py3
@@ -1,33 +1,77 @@
 asn1crypto==0.24.0
+backcall==0.2.0
+bcrypt==4.3.0
+blinker==1.9.0
+cffi==1.17.1
+click==8.1.8
 cryptography==2.6.1
 cycler==0.10.0
+cython==3.1.2
 decorator==4.3.0
+dpkt==1.9.8
 entrypoints==0.3
-ipython==5.8.0
+enum34==1.1.6
+exabgp==4.2.25
+flask==3.0.3
+grpcio==1.41.1
+grpcio-tools==1.41.1
+importlib_metadata==8.7.0
+ipaddress==1.0.23
+ipython==5.4.1
 ipython-genutils==0.2.0
+ipython_genutils==0.2.0
+itsdangerous==2.2.0
+jedi==0.18.0
+jinja2==3.1.6
 keyring==17.1.1
 keyrings.alt==3.1.1
 kiwisolver==1.0.1
+lxml==5.4.0
+markupsafe==3.0.2
 matplotlib==3.0.2
+nnpy==1.4.2
 numpy==1.16.2
 olefile==0.46
-pexpect==4.6.0
+paramiko==2.12.0
+parso==0.8.1
+pexpect==4.8.0
 pickleshare==0.7.5
 pillow==5.4.1
-pip==18.1
-prompt-toolkit==1.0.15
+pip==25.1.1
+plumbum==1.9.0
+prompt-toolkit==1.0.18
+protobuf==3.6.1
+ptyprocess==0.7.0
+pyaml==25.5.0
+pybrctl==0.1.4
+pycparser==2.22
 pycrypto==2.6.1
 pygments==2.3.1
 pygobject==3.30.4
+pynacl==1.5.0
 pyparsing==2.2.0
+pyrasite==2.0
+pyro4==4.82
+pysubnettree==0.37
 python-dateutil==2.7.3
+python-libpcap==0.5.2
 pyx==0.14.1
 pyxdg==0.25
-scapy==2.4.0
+pyyaml==6.0.2
+retrying==1.3.5
+rpyc==6.0.2
+scapy==2.5.0
 secretstorage==2.3.1
+serpent==1.41
 setuptools==40.8.0
 simplegeneric==0.8.1
 six==1.12.0
-traitlets==4.3.2
+supervisor==4.2.5
+thrift==0.22.0
+tornado==6.5.1
+traitlets==5.0.5
+unittest-xml-reporting==3.2.0
 wcwidth==0.1.7
-wheel==0.32.3
+werkzeug==3.1.2
+wheel==0.34.2
+zipp==3.23.0
diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
index 03e35cab0a8..20b11d0aa92 100644
--- a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
@@ -3,29 +3,29 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 radvd==1:2.19-1+b1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
 strace==6.1-0.1
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-sflow/versions-deb-bookworm b/files/build/versions/dockers/docker-sflow/versions-deb-bookworm
index 1600941bd0b..7d109b8f863 100644
--- a/files/build/versions/dockers/docker-sflow/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-sflow/versions-deb-bookworm
@@ -6,25 +6,25 @@ hsflowd-dbgsym==2.0.51-26
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 psample==1.1-1
 sensible-utils==0.0.17+nmu1
 sflowtool==5.04
@@ -32,5 +32,5 @@ sshpass==1.09-1+b1
 strace==6.1-0.1
 swss-dbg==1.0.0
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-snmp/versions-deb-bookworm b/files/build/versions/dockers/docker-snmp/versions-deb-bookworm
index 3bf740cdd56..49e8bfb9c44 100644
--- a/files/build/versions/dockers/docker-snmp/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-snmp/versions-deb-bookworm
@@ -4,18 +4,18 @@ gdbserver==13.1-3
 ipmitool==1.8.19-4+deb12u2
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
-libc-l10n==2.36-9+deb12u9
+libc-l10n==2.36-9+deb12u10
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
 libfreeipmi17==1.6.10-1+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libpci3==1:3.9.0-4
@@ -26,13 +26,13 @@ libsnmp40==5.9.3+dfsg-2
 libsnmp40-dbgsym==5.9.3+dfsg-2
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-locales==2.36-9+deb12u9
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+locales==2.36-9+deb12u10
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 pci.ids==0.0~2023.04.11-1
 sensible-utils==0.0.17+nmu1
 snmp==5.9.3+dfsg-2
@@ -42,5 +42,5 @@ snmpd-dbgsym==5.9.3+dfsg-2
 sshpass==1.09-1+b1
 strace==6.1-0.1
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-snmp/versions-py3 b/files/build/versions/dockers/docker-snmp/versions-py3
index 3e6342768b0..1e17665bcc9 100644
--- a/files/build/versions/dockers/docker-snmp/versions-py3
+++ b/files/build/versions/dockers/docker-snmp/versions-py3
@@ -1,4 +1,4 @@
 hiredis==3.1.0
-psutil==6.1.1
+psutil==7.0.0
 python-arptable==0.0.2
 smbus==1.1.post2
diff --git a/files/build/versions/dockers/docker-sonic-bmp/versions-deb-bookworm b/files/build/versions/dockers/docker-sonic-bmp/versions-deb-bookworm
index 5170f994384..b3577b6984a 100644
--- a/files/build/versions/dockers/docker-sonic-bmp/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-sonic-bmp/versions-deb-bookworm
@@ -3,29 +3,29 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sonic-bmp==0.1
 sshpass==1.09-1+b1
 strace==6.1-0.1
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm
index 3247ce828e2..96b0ad45bd9 100644
--- a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm
@@ -3,30 +3,30 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sonic-gnmi==0.1
 sonic-mgmt-common==1.0.0
 sshpass==1.09-1+b1
 strace==6.1-0.1
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm
index 3f664a4d831..fa498bafb16 100644
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm
@@ -5,27 +5,27 @@ libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
 libcjson-dev==1.7.15-1+deb12u2
 libcjson1==1.7.15-1+deb12u2
-libcurl3-gnutls==7.88.1-10+deb12u8
-libcurl4-openssl-dev==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
+libcurl4-openssl-dev==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-libxml2==2.9.14+dfsg-1.3~deb12u1
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u2
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sonic-mgmt-common==1.0.0
 sonic-mgmt-framework==1.0-01
@@ -33,5 +33,5 @@ sonic-mgmt-framework-dbg==1.0-01
 sshpass==1.09-1+b1
 strace==6.1-0.1
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bookworm b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bookworm
index be43ea4283c..f0b770affb9 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bookworm
@@ -14,7 +14,7 @@ dirmngr==2.2.40-1.1
 ethtool==1:6.1-1
 fontconfig-config==2.14.1-4
 fonts-dejavu-core==2.37-6
-frr==10.0.1-sonic-0
+frr==10.3-sonic-0
 gir1.2-glib-2.0==1.74.0-3
 gnupg==2.2.40-1.1
 gnupg-l10n==2.2.40-1.1
@@ -25,7 +25,7 @@ gpg-wks-client==2.2.40-1.1
 gpg-wks-server==2.2.40-1.1
 gpgconf==2.2.40-1.1
 gpgsm==2.2.40-1.1
-icu-devtools==72.1-3
+icu-devtools==72.1-3+deb12u1
 ifupdown==0.8.41
 iptables==1.8.9-2
 krb5-multidev==1.20.1-2+deb12u1+fips
@@ -33,18 +33,21 @@ libapparmor1==3.0.8-3
 libassuan0==2.5.5-5
 libbsd-dev==0.11.7-2
 libc-ares2==1.18.1-3
-libc-dev-bin==2.36-9+deb12u9
-libc6-dev==2.36-9+deb12u9
+libc-dev-bin==2.36-9+deb12u10
+libc6-dev==2.36-9+deb12u10
 libcbor0.8==0.8.0-2+b1
+libdbus-c++-1-0v5==0.9.0-11
+libecore1==1.26.3-1+b1
 libedit2==3.1-20221030-2
+libeina1a==1.26.3-1+b1
 libfido2-1==1.12.0-2+b1
 libgirepository-1.0-1==1.74.0-3
-libglib2.0-0==2.74.6-2+deb12u5
-libglib2.0-data==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
+libglib2.0-data==2.74.6-2+deb12u6
 libgssapi-krb5-2==1.20.1-2+deb12u1+fips
 libgssrpc4==1.20.1-2+deb12u1+fips
-libicu-dev==72.1-3
-libicu72==72.1-3
+libicu-dev==72.1-3+deb12u1
+libicu72==72.1-3+deb12u1
 libip4tc2==1.8.9-2
 libip6tc2==1.8.9-2
 libjson-c5==0.16-2
@@ -52,7 +55,7 @@ libjudydebian1==1.0.5-5+b2
 libk5crypto3==1.20.1-2+deb12u1+fips
 libkadm5clnt-mit12==1.20.1-2+deb12u1+fips
 libkadm5srv-mit12==1.20.1-2+deb12u1+fips
-libkdb5-10==1.20.1-2+deb12u2
+libkdb5-10==1.20.1-2+deb12u3
 libkrb5-3==1.20.1-2+deb12u1+fips
 libkrb5-dev==1.20.1-2+deb12u1+fips
 libkrb5support0==1.20.1-2+deb12u1+fips
@@ -67,6 +70,7 @@ libnorm-dev==1.5.9+dfsg-2
 libnpth0==1.6-3
 libnsl-dev==1.3.0-2
 libpcap0.8==1.10.3-1
+libpcre2-posix3==10.42-1
 libpgm-dev==5.3.128~dfsg-2
 libpopt0==1.19+dfsg-1
 libprotobuf-c-dev==1.4.1-1+b1
@@ -76,29 +80,29 @@ libqt5core5a==5.15.8+dfsg-11+deb12u2
 libsai==1.0.0
 libsaivs==1.0.0
 libsodium-dev==1.0.18-1
-libssl3==3.0.15-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libteam-utils==1.31-1
 libtirpc-dev==1.3.3+ds-1
 libunwind8==1.6.2-3
-libxml2==2.9.14+dfsg-1.3~deb12u1
-libxml2-dev==2.9.14+dfsg-1.3~deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u2
+libxml2-dev==2.9.14+dfsg-1.3~deb12u2
 libyang2t64==2.1.148-0.2
 libzmq3-dev==4.3.4-6
-linux-libc-dev==6.1.124-1
+linux-libc-dev==6.1.140-1
 logrotate==3.21.0-1
 lsof==4.95.0-1
 ndisc6==1.0.5-1+b2
 netbase==6.4
-openssh-client==1:9.2p1-2+deb12u4
-openssh-server==1:9.2p1-2+deb12u4
-openssh-sftp-server==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssh-server==1:9.2p1-2+deb12u6
+openssh-sftp-server==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 pinentry-curses==1.2.1-1
 pkgconf==1.8.1-1
 protobuf-c-compiler==1.4.1-1+b1
 psmisc==23.6-1
 python3-scapy==2.5.0+dfsg-2
-redis-server==5:7.0.15-1~deb12u3
+redis-server==5:7.0.15-1~deb12u4
 rpcsvc-proto==1.4.3-1
 runit-helper==2.15.2
 sensible-utils==0.0.17+nmu1
@@ -108,6 +112,7 @@ sonic-device-data==1.0-1
 sonic-host-services-data==1.0-1
 sonic-utilities-data==1.0-1
 syncd-vs==1.0.0
+sysmgr==1.0.0
 tcpdump==4.99.3-1
 ucf==3.0043+nmu1+deb12u1
 uuid-dev==2.38.1-5+deb12u3
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-py3 b/files/build/versions/dockers/docker-sonic-vs/versions-py3
index 1d4c27ac2e6..4ca9c36ab68 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-py3
@@ -7,7 +7,7 @@ charset-normalizer==3.4.1
 click==7.0
 click-log==0.4.0
 colorful==0.5.6
-cryptography==44.0.0
+cryptography==44.0.1
 dbus-python==1.3.2
 docker==7.1.0
 docker-image-py==0.1.13
@@ -18,14 +18,15 @@ importlib-metadata==6.1.0
 jsonpatch==1.33
 jsonpointer==3.0.0
 lazy-object-proxy==1.10.0
-m2crypto==0.43.0
+m2crypto==0.44.0
 netifaces==0.11.0
 packaging==24.0
 paramiko==2.11.0
 pexpect==4.9.0
 prefixed==0.9.0
 prettyprinter==0.18.0
-psutil==6.1.1
+protobuf==6.31.1
+psutil==7.0.0
 ptyprocess==0.7.0
 pyangbind==0.8.1
 pycairo==1.26.1
diff --git a/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm
index 23a9cb8066e..e1d2ca4bafe 100644
--- a/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm
@@ -2,52 +2,64 @@ binutils==2.40-2
 binutils-aarch64-linux-gnu==2.40-2
 binutils-dev==2.40-2
 doca-cx-libs==2.8.0064-1
+doca-sdk-argp==2.9.0072-1
+doca-sdk-common==2.9.0072-1
+doca-sdk-dpdk-bridge==2.9.0072-1
+doca-sdk-flow==2.9.0072-1
 ethtool==1:6.1-1
 hwdata==0.368-1
-ibverbs-providers==2407mlnx52-1.2407061
+ibverbs-providers==2501mlnx56-1.2501060
 kmod==30+20221128-1
 libatm1==1:2.5.1-4+b2
 libbinutils==2.40-2
 libctf-nobfd0==2.40-2
 libctf0==2.40-2
+libdbus-1-dev==1.14.10-1~deb12u1
 libexpat1-dev==2.5.0-1+deb12u1
 libgprofng0==2.40-2
 libgrpc-dev==1.39.0-1
-libibverbs-dev==2404mlnx51-1.2404066
-libibverbs1==2407mlnx52-1.2407061
+libibverbs-dev==2501mlnx56-1.2501060
+libibverbs1==2501mlnx56-1.2501060
 libjs-sphinxdoc==5.3.0-4
 libjs-underscore==1.13.4~dfsg+~1.11.4-3
 libjson-c5==0.16-2
 libkmod2==30+20221128-1
 libnl-3-200==3.7.0-0.2+b1
-libnl-3-dev==3.7.0-0.2+b1
+libnl-3-dev==3.7.0-0.2+b1sonic1
 libnl-cli-3-200==3.7.0-0.2+b1
 libnl-genl-3-200==3.7.0-0.2+b1
 libnl-nf-3-200==3.7.0-0.2+b1
 libnl-route-3-200==3.7.0-0.2+b1
-libnl-route-3-dev==3.7.0-0.2+b1
+libnl-route-3-dev==3.7.0-0.2+b1sonic1
 libnuma1==2.0.16-1
 libpcap0.8==1.10.3-1
+libpcap0.8-dev==1.10.3-1
 libpci3==1:3.9.0-4
+libpkgconf3==1.8.1-1
 libpython3-dev==3.11.2-1+b1
-libpython3.11-dev==3.11.2-6+deb12u5
+libpython3.11-dev==3.11.2-6+deb12u6
 librxpcompiler-dev==22.05.1
 libsaimetadata==1.0.0
 libsairedis==1.0.0
 lsof==4.95.0-1
-mft==4.28.0-96
-mlnx-dpdk==22.11.0-2407.0.6
-mlnx-iproute2==6.9.0-1.2407061
-mlnx-ofed-kernel-utils==24.07.OFED.24.07.0.6.1.1-1
-mlnx-sai==1.mlnx.SAIBuild0.0.36.0
-mlnx-tools==24.07.0-1.2407061
+mft==4.32.0-120
+mlnx-dpdk==22.11.0-2410.1.0
+mlnx-iproute2==6.12.0-1.2501060
+mlnx-ofed-kernel-utils==25.01.OFED.25.01.0.6.0.1-1
+mlnx-sai==1.mlnx.SAIBuild0.0.41.0
+mlnx-tools==25.01-0.2501060
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
+pkg-config==1.8.1-1
+pkgconf==1.8.1-1
+pkgconf-bin==1.8.1-1
 python3-dev==3.11.2-1+b1
 python3-pip==23.0.1+dfsg-1
-python3.11-dev==3.11.2-6+deb12u5
+python3.11-dev==3.11.2-6+deb12u6
 rxp-compiler==22.05.1
 sdn-appliance==1.5-1mlnx1
+sgml-base==1.31
 syncd==1.0.0
-udev==252.33-1~deb12u1
+udev==252.38-1~deb12u1
 usb.ids==2024.07.04-0+deb12u1
+xml-core==0.18+nmu1
diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bookworm
index 70810c026f0..fa057f5568d 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bookworm
@@ -1,19 +1,19 @@
 cmake-data==3.25.1-1
 libdouble-conversion3==3.2.1-1
-libglib2.0-0==2.74.6-2+deb12u5
-libicu72==72.1-3
+libglib2.0-0==2.74.6-2+deb12u6
+libicu72==72.1-3+deb12u1
 libnanomsg-dev==1.1.5+dfsg-1.1+b1
 libnanomsg5==1.1.5+dfsg-1.1+b1
 libpcre2-16-0==10.42-1
-libqt5core5a==5.15.8+dfsg-11+deb12u2
-libqt5dbus5==5.15.8+dfsg-11+deb12u2
-libqt5network5==5.15.8+dfsg-11+deb12u2
-libssl3==3.0.15-1~deb12u1
+libqt5core5a==5.15.8+dfsg-11+deb12u3
+libqt5dbus5==5.15.8+dfsg-11+deb12u3
+libqt5network5==5.15.8+dfsg-11+deb12u3
+libssl3==3.0.16-1~deb12u1
 libthrift-0.17.0==0.17.0-2+b2
-libxml2==2.9.14+dfsg-1.3~deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u2
 netbase==6.4
-openssl==3.0.15-1~deb12u1
+openssl==3.0.16-1~deb12u1
 python3-scapy==2.5.0+dfsg-2
 shared-mime-info==2.2-1
 syncd-rpc==1.0.0
-wget==1.21.3-1+b2
+wget==1.21.3-1+deb12u1
diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bookworm
index 540a708ec24..bd680b29975 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bookworm
@@ -5,15 +5,15 @@ kmod==30+20221128-1
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libkmod2==30+20221128-1
 libmpfr6==4.2.0-1
@@ -23,18 +23,19 @@ libsairedis==1.0.0
 libsairedis-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 lz4==1.9.4-1
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
+sswsyncd==1.0.0
 strace==6.1-0.1
 syncd==1.0.0
 syncd-dbgsym==1.0.0
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bookworm
index 70810c026f0..fa057f5568d 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bookworm
@@ -1,19 +1,19 @@
 cmake-data==3.25.1-1
 libdouble-conversion3==3.2.1-1
-libglib2.0-0==2.74.6-2+deb12u5
-libicu72==72.1-3
+libglib2.0-0==2.74.6-2+deb12u6
+libicu72==72.1-3+deb12u1
 libnanomsg-dev==1.1.5+dfsg-1.1+b1
 libnanomsg5==1.1.5+dfsg-1.1+b1
 libpcre2-16-0==10.42-1
-libqt5core5a==5.15.8+dfsg-11+deb12u2
-libqt5dbus5==5.15.8+dfsg-11+deb12u2
-libqt5network5==5.15.8+dfsg-11+deb12u2
-libssl3==3.0.15-1~deb12u1
+libqt5core5a==5.15.8+dfsg-11+deb12u3
+libqt5dbus5==5.15.8+dfsg-11+deb12u3
+libqt5network5==5.15.8+dfsg-11+deb12u3
+libssl3==3.0.16-1~deb12u1
 libthrift-0.17.0==0.17.0-2+b2
-libxml2==2.9.14+dfsg-1.3~deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u2
 netbase==6.4
-openssl==3.0.15-1~deb12u1
+openssl==3.0.16-1~deb12u1
 python3-scapy==2.5.0+dfsg-2
 shared-mime-info==2.2-1
 syncd-rpc==1.0.0
-wget==1.21.3-1+b2
+wget==1.21.3-1+deb12u1
diff --git a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bookworm
index 540a708ec24..bd680b29975 100644
--- a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bookworm
@@ -5,15 +5,15 @@ kmod==30+20221128-1
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libkmod2==30+20221128-1
 libmpfr6==4.2.0-1
@@ -23,18 +23,19 @@ libsairedis==1.0.0
 libsairedis-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 lz4==1.9.4-1
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
+sswsyncd==1.0.0
 strace==6.1-0.1
 syncd==1.0.0
 syncd-dbgsym==1.0.0
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
index 006a33aef28..7ed1efbf492 100644
--- a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
@@ -15,20 +15,20 @@ libarchive13==3.4.3-2+deb11u2
 libasan6==10.2.1-6
 libbinutils==2.35.2-2
 libboost-atomic1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u11
-libc6-dev==2.31-13+deb11u11
+libc-dev-bin==2.31-13+deb11u13
+libc6-dev==2.31-13+deb11u13
 libcc1-0==10.2.1-6
 libcrypt-dev==1:4.4.18-4
 libctf-nobfd0==2.35.2-2
 libctf0==2.35.2-2
 libdouble-conversion3==3.1.5-6.1
 libdpkg-perl==1.20.13
-libexpat1-dev==2.2.10-2+deb11u6
+libexpat1-dev==2.2.10-2+deb11u7
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
-libglib2.0-0==2.66.8-1+deb11u5
+libglib2.0-0==2.66.8-1+deb11u6
 libgomp1==10.2.1-6
-libicu67==67.1-7
+libicu67==67.1-7+deb11u1
 libisl23==0.23-1
 libitm1==10.2.1-6
 libjsoncpp24==1.9.4-4
@@ -48,16 +48,16 @@ libqt5dbus5==5.15.2+dfsg-9+deb11u1
 libqt5network5==5.15.2+dfsg-9+deb11u1
 libquadmath0==10.2.1-6
 librhash0==1.4.1-2
-libssl-dev==1.1.1w-0+deb11u2
-libssl1.1==1.1.1w-0+deb11u2
+libssl-dev==1.1.1w-0+deb11u3
+libssl1.1==1.1.1w-0+deb11u3
 libstdc++-10-dev==10.2.1-6
 libthrift-0.11.0==0.11.0-4
 libtirpc-dev==1.3.1-1+deb11u1
 libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2+deb11u1
-libxml2==2.9.10+dfsg-6.7+deb11u5
-linux-libc-dev==5.10.226-1
+libxml2==2.9.10+dfsg-6.7+deb11u7
+linux-libc-dev==5.10.237-1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
@@ -74,10 +74,10 @@ python2.7==2.7.18-8+deb11u1
 python2.7-dev==2.7.18-8+deb11u1
 python2.7-minimal==2.7.18-8+deb11u1
 python3-pip==20.3.4-4+deb11u1
-python3-pkg-resources==52.0.0-4+deb11u1
-python3-setuptools==52.0.0-4+deb11u1
+python3-pkg-resources==52.0.0-4+deb11u2
+python3-setuptools==52.0.0-4+deb11u2
 python3-wheel==0.34.2-1
 shared-mime-info==2.0-1
 syncd-rpc==1.0.0
-wget==1.21-1+deb11u1
+wget==1.21-1+deb11u2
 xz-utils==5.2.5-2.1~deb11u1
diff --git a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
index 12856bd058a..d113d51be39 100644
--- a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
@@ -4,15 +4,15 @@ kmod==28-1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u14
+libcurl3-gnutls==7.74.0-1.3+deb11u15
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u5
+libglib2.0-0==2.66.8-1+deb11u6
 libgpm2==1.20.7-8
 libhiredis0.14-dbgsym==0.14.1-1
-libicu67==67.1-7
+libicu67==67.1-7+deb11u1
 libipt2==2.0.3-1
 libkmod2==28-1
 libmpfr6==4.1.0-3
@@ -24,9 +24,9 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbg==1.0.0
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u3
+openssh-client==1:8.4p1-5+deb11u5
 sshpass==1.09-1+b1
 strace==5.10-1
 syncd==1.0.0
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
+vim==2:8.2.2434-3+deb11u3
+vim-runtime==2:8.2.2434-3+deb11u3
diff --git a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64 b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64
index e8eae8a18fc..676560386cd 100644
--- a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64
+++ b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64
@@ -5,7 +5,7 @@ libdbus-1-dev==1.12.28-0+deb11u1
 libdevmapper1.02.1==2:1.02.175-2.1
 libdpkg-perl==1.20.13
 libevent-2.1-7==2.1.12-stable-1
-libexpat1-dev==2.2.10-2+deb11u6
+libexpat1-dev==2.2.10-2+deb11u7
 libnfsidmap2==0.25-6
 libpcap-dev==1.10.0-2
 libpcap0.8==1.10.0-2
diff --git a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm
index 77f6b7e2f51..6ea4de9940b 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm
@@ -1,21 +1,21 @@
 cmake-data==3.25.1-1
 libboost-atomic1.74.0==1.74.0+ds1-21
 libdouble-conversion3==3.2.1-1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libnanomsg-dev==1.1.5+dfsg-1.1+b1
 libnanomsg5==1.1.5+dfsg-1.1+b1
 libpcre2-16-0==10.42-1
-libqt5core5a==5.15.8+dfsg-11+deb12u2
-libqt5dbus5==5.15.8+dfsg-11+deb12u2
-libqt5network5==5.15.8+dfsg-11+deb12u2
-libssl3==3.0.15-1~deb12u1
+libqt5core5a==5.15.8+dfsg-11+deb12u3
+libqt5dbus5==5.15.8+dfsg-11+deb12u3
+libqt5network5==5.15.8+dfsg-11+deb12u3
+libssl3==3.0.16-1~deb12u1
 libthrift-0.17.0==0.17.0-2+b2
 netbase==6.4
-openssl==3.0.15-1~deb12u1
+openssl==3.0.16-1~deb12u1
 python3-pip==23.0.1+dfsg-1
 python3-scapy==2.5.0+dfsg-2
 python3-thrift==0.17.0-2+b2
 shared-mime-info==2.2-1
 syncd-rpc==1.0.0
 thrift-compiler==0.17.0-2+b2
-wget==1.21.3-1+b2
+wget==1.21.3-1+deb12u1
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
index b98c98bf5bd..fd4acc4fa5e 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
@@ -8,16 +8,16 @@ libboost-regex1.74.0==1.74.0+ds1-21
 libc-dev-bin==2.36-9+deb12u7
 libc6-dev==2.36-9+deb12u7
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libexpat1-dev==2.5.0-1
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libjs-sphinxdoc==5.3.0-4
 libjs-underscore==1.13.4~dfsg+~1.11.4-3
@@ -31,18 +31,18 @@ libsairedis==1.0.0
 libsairedis-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libtirpc-dev==1.3.3+ds-1
 libunwind8==1.6.2-3
-libxml2==2.9.14+dfsg-1.3~deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u2
 linux-libc-dev==6.1.99-1
-mft==4.30.2-23
+mft==4.32.0-120
 mft-fwtrace-cfg==1.0.0
-mlnx-sai==1.mlnx.SAIBuild2411.2405.30.1
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+mlnx-sai==1.mlnx.SAIBuild2411.32.0.0
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 python-sdk-api==1.mlnx.4.6.4072
 python3-attr==22.2.0-1
 python3-dev==3.11.2-1+b1
@@ -69,11 +69,11 @@ sxd-libs==1.mlnx.4.6.4072
 sxd-libs-dev==1.mlnx.4.6.4072
 syncd==1.0.0
 syncd-dbgsym==1.0.0
-sys-sdk-dev==1.mlnx.4.7.2164
-sys-sdk-main==1.mlnx.4.7.2164
+sys-sdk-dev==1.mlnx.4.7.4040
+sys-sdk-main==1.mlnx.4.7.4040
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
 wjh-libs==1.mlnx.4.6.4072
 wjh-libs-dev==1.mlnx.4.6.4072
 zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3 b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
index a79ab9f1ee9..fdf136c807d 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
@@ -3,6 +3,6 @@ importlib-metadata==1.6.0
 jsonschema==4.10.3
 more-itertools==4.2.0
 pyrsistent==0.18.1
-python-sdk-api==4.7.2164
+python-sdk-api==4.7.4040
 python_sdk_api==4.6.3064
 zipp==1.0.0
diff --git a/files/build/versions/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-arm64 b/files/build/versions/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-arm64
new file mode 100644
index 00000000000..031827155a1
--- /dev/null
+++ b/files/build/versions/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-arm64
@@ -0,0 +1,24 @@
+iputils-ping==3:20221126-1+deb12u1
+libdbus-1-dev==1.14.10-1~deb12u1
+libexpat1-dev==2.5.0-1+deb12u1
+libjs-sphinxdoc==5.3.0-4
+libjs-underscore==1.13.4~dfsg+~1.11.4-3
+libpcap-dev==1.10.3-1
+libpcap0.8==1.10.3-1
+libpcap0.8-dev==1.10.3-1
+libpkgconf3==1.8.1-1
+libpython3-dev==3.11.2-1+b1
+libpython3.11-dev==3.11.2-6+deb12u6
+libsaimetadata==1.0.0
+libsairedis==1.0.0
+mrvllibsai==1.15.1-1
+pkg-config==1.8.1-1
+pkgconf==1.8.1-1
+pkgconf-bin==1.8.1-1
+python3-dev==3.11.2-1+b1
+python3.11-dev==3.11.2-6+deb12u6
+sgml-base==1.31
+swig==4.1.0-0.2
+swig4.0==4.1.0-0.2
+syncd==1.0.0
+xml-core==0.18+nmu1
diff --git a/files/build/versions/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-armhf b/files/build/versions/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-armhf
new file mode 100644
index 00000000000..031827155a1
--- /dev/null
+++ b/files/build/versions/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-armhf
@@ -0,0 +1,24 @@
+iputils-ping==3:20221126-1+deb12u1
+libdbus-1-dev==1.14.10-1~deb12u1
+libexpat1-dev==2.5.0-1+deb12u1
+libjs-sphinxdoc==5.3.0-4
+libjs-underscore==1.13.4~dfsg+~1.11.4-3
+libpcap-dev==1.10.3-1
+libpcap0.8==1.10.3-1
+libpcap0.8-dev==1.10.3-1
+libpkgconf3==1.8.1-1
+libpython3-dev==3.11.2-1+b1
+libpython3.11-dev==3.11.2-6+deb12u6
+libsaimetadata==1.0.0
+libsairedis==1.0.0
+mrvllibsai==1.15.1-1
+pkg-config==1.8.1-1
+pkgconf==1.8.1-1
+pkgconf-bin==1.8.1-1
+python3-dev==3.11.2-1+b1
+python3.11-dev==3.11.2-6+deb12u6
+sgml-base==1.31
+swig==4.1.0-0.2
+swig4.0==4.1.0-0.2
+syncd==1.0.0
+xml-core==0.18+nmu1
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
index e08ce693889..ae21d59f66b 100644
--- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
@@ -11,7 +11,7 @@ libpython3-dev==3.11.2-1+b1
 libpython3.11-dev==3.11.2-6+deb12u5
 libsaimetadata==1.0.0
 libsairedis==1.0.0
-mrvllibsai==1.14.0-1
+mrvllibsai==1.15.1-1
 pkg-config==1.8.1-1
 pkgconf==1.8.1-1
 pkgconf-bin==1.8.1-1
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
index e08ce693889..ae21d59f66b 100644
--- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
@@ -11,7 +11,7 @@ libpython3-dev==3.11.2-1+b1
 libpython3.11-dev==3.11.2-6+deb12u5
 libsaimetadata==1.0.0
 libsairedis==1.0.0
-mrvllibsai==1.14.0-1
+mrvllibsai==1.15.1-1
 pkg-config==1.8.1-1
 pkgconf==1.8.1-1
 pkgconf-bin==1.8.1-1
diff --git a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
index 1be6d70b521..5ec8d063e73 100644
--- a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
@@ -6,19 +6,19 @@ binutils-x86-64-linux-gnu==2.40-2
 clang==1:14.0-55.7~deb12u1
 clang-14==1:14.0.6-12
 cpp==4:12.2.0-3
-cpp-12==12.2.0-14
+cpp-12==12.2.0-14+deb12u1
 file==1:5.44-3
 flex==2.6.4-8.2
 gcc==4:12.2.0-3
-gcc-12==12.2.0-14
+gcc-12==12.2.0-14+deb12u1
 gdb==13.1-3
 gdbserver==13.1-3
-gfortran-12==12.2.0-14
+gfortran-12==12.2.0-14+deb12u1
 ibverbs-providers==44.0-2
-icu-devtools==72.1-3
-libabsl-dev==20220623.1-1
-libabsl20220623==20220623.1-1
-libasan8==12.2.0-14
+icu-devtools==72.1-3+deb12u1
+libabsl-dev==20220623.1-1+deb12u2
+libabsl20220623==20220623.1-1+deb12u2
+libasan8==12.2.0-14+deb12u1
 libbabeltrace1==1.5.11-1+b2
 libbinutils==2.40-2
 libboost-all-dev==1.74.0.3
@@ -120,17 +120,17 @@ libboost1.74-tools-dev==1.74.0+ds1-21
 libbpf-dev==1:1.1.0-1
 libc-ares-dev==1.18.1-3
 libc-ares2==1.18.1-3
-libc-dev-bin==2.36-9+deb12u9
-libc6-dev==2.36-9+deb12u9
+libc-dev-bin==2.36-9+deb12u10
+libc6-dev==2.36-9+deb12u10
 libcbor0.8==0.8.0-2+b1
-libcc1-0==12.2.0-14
+libcc1-0==12.2.0-14+deb12u1
 libclang-common-14-dev==1:14.0.6-12
 libclang-cpp14==1:14.0.6-12
 libclang1-14==1:14.0.6-12
 libctf-nobfd0==2.40-2
 libctf0==2.40-2
-libcurl3-gnutls==7.88.1-10+deb12u8
-libcurl3-nss==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
+libcurl3-nss==7.88.1-10+deb12u12
 libdbus-1-dev==1.14.10-1~deb12u1
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
@@ -151,13 +151,13 @@ libfl-dev==2.6.4-8.2
 libfl2==2.6.4-8.2
 libgc-dev==1:8.2.2-3
 libgc1==1:8.2.2-3
-libgcc-12-dev==12.2.0-14
-libgfortran-12-dev==12.2.0-14
-libgfortran5==12.2.0-14
-libglib2.0-0==2.74.6-2+deb12u5
+libgcc-12-dev==12.2.0-14+deb12u1
+libgfortran-12-dev==12.2.0-14+deb12u1
+libgfortran5==12.2.0-14+deb12u1
+libglib2.0-0==2.74.6-2+deb12u6
 libgmp-dev==2:6.2.1+dfsg1-1.1
 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1
-libgomp1==12.2.0-14
+libgomp1==12.2.0-14+deb12u1
 libgpm2==1.20.7-10+b1
 libgprofng0==2.40-2
 libgrpc++-dev==1.51.1-3+b1
@@ -169,16 +169,16 @@ libhwloc-plugins==2.9.0-1
 libhwloc15==2.9.0-1
 libibverbs-dev==44.0-2
 libibverbs1==44.0-2
-libicu-dev==72.1-3
-libicu72==72.1-3
+libicu-dev==72.1-3+deb12u1
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libisl23==0.25-1.1
-libitm1==12.2.0-14
+libitm1==12.2.0-14+deb12u1
 libjs-jquery-ui==1.13.2+dfsg-1
 libjs-sphinxdoc==5.3.0-4
 libjs-underscore==1.13.4~dfsg+~1.11.4-3
 libllvm14==1:14.0.6-12
-liblsan0==12.2.0-14
+liblsan0==12.2.0-14+deb12u1
 libltdl-dev==2.4.7-7~deb12u1
 libltdl7==2.4.7-7~deb12u1
 libmagic-mgc==1:5.44-3
@@ -195,8 +195,8 @@ libnspr4==2:4.35-1
 libnss3==2:3.87.1-1+deb12u1
 libnuma-dev==2.0.16-1
 libnuma1==2.0.16-1
-libobjc-12-dev==12.2.0-14
-libobjc4==12.2.0-14
+libobjc-12-dev==12.2.0-14+deb12u1
+libobjc4==12.2.0-14+deb12u1
 libopenmpi-dev==4.1.4-3+b1
 libopenmpi3==4.1.4-3+b1
 libpcap-dev==1.10.3-1
@@ -216,11 +216,11 @@ libprotoc32==3.21.12-3
 libpsm-infinipath1==3.3+20.604758e7-6.2
 libpsm2-2==11.2.185-2
 libpython3-dev==3.11.2-1+b1
-libpython3.11-dev==3.11.2-6+deb12u5
-libqt5core5a==5.15.8+dfsg-11+deb12u2
-libqt5dbus5==5.15.8+dfsg-11+deb12u2
-libqt5network5==5.15.8+dfsg-11+deb12u2
-libquadmath0==12.2.0-14
+libpython3.11-dev==3.11.2-6+deb12u6
+libqt5core5a==5.15.8+dfsg-11+deb12u3
+libqt5dbus5==5.15.8+dfsg-11+deb12u3
+libqt5network5==5.15.8+dfsg-11+deb12u3
+libquadmath0==12.2.0-14+deb12u1
 librdmacm1==44.0-2
 libre2-9==20220601+dfsg-1+b1
 libre2-dev==20220601+dfsg-1+b1
@@ -233,16 +233,16 @@ libsaivs==1.0.0
 libsaivs-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
-libstdc++-12-dev==12.2.0-14
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
+libstdc++-12-dev==12.2.0-14+deb12u1
 libswsscommon-dbgsym==1.0.0
 libthrift-0.17.0==0.17.0-2+b2
 libthrift-dev==0.17.0-2+b2
 libtirpc-dev==1.3.3+ds-1
 libtool==2.4.7-7~deb12u1
-libtsan2==12.2.0-14
-libubsan1==12.2.0-14
+libtsan2==12.2.0-14+deb12u1
+libubsan1==12.2.0-14+deb12u1
 libucx0==1.13.1-1
 libunwind8==1.6.2-3
 libx11-6==2:1.8.4-2+deb12u2
@@ -251,10 +251,10 @@ libxau6==1:1.0.9-1
 libxcb1==1.15-1
 libxdmcp6==1:1.1.2-3
 libxext6==2:1.3.4-1+b1
-libxml2==2.9.14+dfsg-1.3~deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u2
 libxnvctrl0==525.85.05-3~deb12u1
 libz3-4==4.8.12-3.1
-linux-libc-dev==6.1.124-1
+linux-libc-dev==6.1.140-1
 llvm==1:14.0-55.7~deb12u1
 llvm-14==1:14.0.6-12
 llvm-14-linker-tools==1:14.0.6-12
@@ -268,8 +268,8 @@ nss-plugin-pem==1.0.8+1-1
 ocl-icd-libopencl1==2.3.1-1
 openmpi-bin==4.1.4-3+b1
 openmpi-common==4.1.4-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 p4lang-bmv2==1.15.0-7
 p4lang-p4c==1.2.4.2-2
 p4lang-pi==0.1.0-15
@@ -287,7 +287,7 @@ python3-pyroute2==0.7.2-2
 python3-scapy==2.5.0+dfsg-2
 python3-six==1.16.0-4
 python3-thrift==0.17.0-2+b2
-python3.11-dev==3.11.2-6+deb12u5
+python3.11-dev==3.11.2-6+deb12u6
 rpcsvc-proto==1.4.3-1
 sensible-utils==0.0.17+nmu1
 sgml-base==1.31
@@ -299,7 +299,7 @@ syncd-vs-dbgsym==1.0.0
 tcpdump==4.99.3-1
 thrift-compiler==0.17.0-2+b2
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
 xml-core==0.18+nmu1
 zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-sysmgr/versions-deb-bookworm b/files/build/versions/dockers/docker-sysmgr/versions-deb-bookworm
new file mode 100644
index 00000000000..4d995b01c31
--- /dev/null
+++ b/files/build/versions/dockers/docker-sysmgr/versions-deb-bookworm
@@ -0,0 +1,36 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u12
+libdbus-c++-1-0v5==0.9.0-11
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libecore1==1.26.3-1+b1
+libedit2==3.1-20221030-2
+libeina1a==1.26.3-1+b1
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u6
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3+deb12u1
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libprotobuf32==3.21.12-3
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+sysmgr==1.0.0
+sysmgr-dbg==1.0.0
+ucf==3.0043+nmu1+deb12u1
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/docker-teamd/versions-deb-bookworm b/files/build/versions/dockers/docker-teamd/versions-deb-bookworm
index 950f931eb53..872e219ba99 100644
--- a/files/build/versions/dockers/docker-teamd/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-teamd/versions-deb-bookworm
@@ -3,32 +3,32 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
 libgpm2==1.20.7-10+b1
-libicu72==72.1-3
+libicu72==72.1-3+deb12u1
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libteam-utils==1.31-1
 libteam-utils-dbgsym==1.31-1
 libteamdctl0-dbgsym==1.31-1
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
 strace==6.1-0.1
 swss-dbg==1.0.0
 ucf==3.0043+nmu1+deb12u1
-vim==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
index d7dd0adc2fe..b8ed2302f8d 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
@@ -42,7 +42,7 @@ build-essential==12.9
 byacc==1:2.0.20221106-1
 bzip2==1.0.8-5+b1
 bzip2-doc==1.0.8-5
-ca-certificates==20230311
+ca-certificates==20230311+deb12u1
 ca-certificates-java==20230710~deb12u1
 cdbs==0.4.166
 check==0.15.2-2+b1
@@ -59,14 +59,14 @@ cowbuilder==0.89
 cowdancer==0.89
 cpio==2.13+dfsg-7.1
 cpp==4:12.2.0-3
-cpp-12==12.2.0-14
+cpp-12==12.2.0-14+deb12u1
 cpp-12-arm-linux-gnueabihf==12.2.0-14cross1
 cpp-arm-linux-gnueabihf==4:12.2.0-3
 cppcheck==2.10-2
 cppzmq-dev==4.9.0-1
 cron==3.0pl1-162
 cron-daemon-common==3.0pl1-162
-curl==7.88.1-10+deb12u8
+curl==7.88.1-10+deb12u12
 cython3==0.29.32-2+b1
 dbus==1.14.10-1~deb12u1
 dbus-bin==1.14.10-1~deb12u1
@@ -97,7 +97,7 @@ dh-strip-nondeterminism==1.13.1-1
 dictionaries-common==1.29.5
 diffstat==1.65-1
 dirmngr==2.2.40-1.1
-distro-info-data==0.58+deb12u3
+distro-info-data==0.58+deb12u4
 dkms==3.0.10-8+deb12u1
 dmidecode==3.4-1
 dmsetup==2:1.02.185-2
@@ -110,7 +110,7 @@ docbook-xml==4.5-12
 docker-buildx-plugin==0.10.5-1~debian.12~bookworm
 docker-ce==5:24.0.2-1~debian.12~bookworm
 docker-ce-cli==5:24.0.2-1~debian.12~bookworm
-docker-ce-rootless-extras==5:27.5.1-1~debian.12~bookworm
+docker-ce-rootless-extras==5:28.3.1-1~debian.12~bookworm
 docker-compose-plugin==2.18.1-1~debian.12~bookworm
 docutils-common==0.19+dfsg-6
 dosfstools==4.2-1
@@ -126,12 +126,12 @@ efibootmgr==17-2
 emacsen-common==3.0.5
 enchant-2==2.3.3-2
 equivs==2.3.1
-exim4-base==4.96-15+deb12u6
-exim4-config==4.96-15+deb12u6
-exim4-daemon-light==4.96-15+deb12u6
+exim4-base==4.96-15+deb12u7
+exim4-config==4.96-15+deb12u7
+exim4-daemon-light==4.96-15+deb12u7
 expat==2.5.0-1+deb12u1
 fakeroot==1.31-1.2
-fig2dev==1:3.2.8b-3
+fig2dev==1:3.2.8b-3+deb12u1
 file==1:5.44-3
 flex==2.6.4-8.2
 fontconfig==2.14.1-4
@@ -149,14 +149,14 @@ fonts-texgyre==20180621-6
 fonts-texgyre-math==20180621-6
 fonts-urw-base35==20200910-7
 g++==4:12.2.0-3
-g++-12==12.2.0-14
+g++-12==12.2.0-14+deb12u1
 gawk==1:5.2.1-2
 gcc==4:12.2.0-3
-gcc-12==12.2.0-14
+gcc-12==12.2.0-14+deb12u1
 gcc-12-arm-linux-gnueabihf==12.2.0-14cross1
 gcc-12-arm-linux-gnueabihf-base==12.2.0-14cross1
 gcc-12-cross-base==12.2.0-14cross1
-gcc-12-multilib==12.2.0-14
+gcc-12-multilib==12.2.0-14+deb12u1
 gcc-arm-linux-gnueabihf==4:12.2.0-3
 gcc-multilib==4:12.2.0-3
 gcovr==5.2-1
@@ -166,12 +166,12 @@ gem2deb-test-runner==2.1
 gettext==0.21-12
 gettext-base==0.21-12
 gfortran==4:12.2.0-3
-gfortran-12==12.2.0-14
-ghostscript==10.0.0~dfsg-11+deb12u6
+gfortran-12==12.2.0-14+deb12u1
+ghostscript==10.0.0~dfsg-11+deb12u7
 gir1.2-atk-1.0==2.46.0-5
 gir1.2-atspi-2.0==2.46.0-5
 gir1.2-freedesktop==1.74.0-3
-gir1.2-gdkpixbuf-2.0==2.42.10+dfsg-1+deb12u1
+gir1.2-gdkpixbuf-2.0==2.42.10+dfsg-1+deb12u2
 gir1.2-glib-2.0==1.74.0-3
 gir1.2-gtk-3.0==3.24.38-2~deb12u3
 gir1.2-harfbuzz-0.0==6.0.0+dfsg-3
@@ -224,10 +224,10 @@ hwdata==0.368-1
 i965-va-driver==2.4.1+dfsg1-1
 ibverbs-providers==44.0-2
 icc-profiles-free==2.0.1+dfsg-1.1
-icu-devtools==72.1-3
-imagemagick==8:6.9.11.60+dfsg-1.6+deb12u2
-imagemagick-6-common==8:6.9.11.60+dfsg-1.6+deb12u2
-imagemagick-6.q16==8:6.9.11.60+dfsg-1.6+deb12u2
+icu-devtools==72.1-3+deb12u1
+imagemagick==8:6.9.11.60+dfsg-1.6+deb12u3
+imagemagick-6-common==8:6.9.11.60+dfsg-1.6+deb12u3
+imagemagick-6.q16==8:6.9.11.60+dfsg-1.6+deb12u3
 inetutils-telnet==2:2.4-2+deb12u1
 inkscape==1.2.2-2+b1
 install-info==6.8-6+b1
@@ -250,24 +250,24 @@ junit4==4.13.2-3
 junit5==5.9.2-1
 kernel-wedge==2.104
 kmod==30+20221128-1
-krb5-locales==1.20.1-2+deb12u2
-krb5-multidev==1.20.1-2+deb12u2
+krb5-locales==1.20.1-2+deb12u3
+krb5-multidev==1.20.1-2+deb12u3
 lcov==1.16-1
 less==590-2.1~deb12u2
 lib2geom1.2.0==1.2.2-3
-lib32asan8==12.2.0-14
-lib32atomic1==12.2.0-14
-lib32gcc-12-dev==12.2.0-14
-lib32gcc-s1==12.2.0-14
-lib32gomp1==12.2.0-14
-lib32itm1==12.2.0-14
-lib32quadmath0==12.2.0-14
-lib32stdc++6==12.2.0-14
-lib32ubsan1==12.2.0-14
+lib32asan8==12.2.0-14+deb12u1
+lib32atomic1==12.2.0-14+deb12u1
+lib32gcc-12-dev==12.2.0-14+deb12u1
+lib32gcc-s1==12.2.0-14+deb12u1
+lib32gomp1==12.2.0-14+deb12u1
+lib32itm1==12.2.0-14+deb12u1
+lib32quadmath0==12.2.0-14+deb12u1
+lib32stdc++6==12.2.0-14+deb12u1
+lib32ubsan1==12.2.0-14+deb12u1
 libaa1==1.4p5-50
 libaacs0==0.11.1-2
-libabsl-dev==20220623.1-1
-libabsl20220623==20220623.1-1
+libabsl-dev==20220623.1-1+deb12u2
+libabsl20220623==20220623.1-1+deb12u2
 libacl1-dev==2.3.1-3
 libaio1==0.3.113-4
 libalgorithm-c3-perl==0.11-2
@@ -289,7 +289,7 @@ libarchive-zip-perl==1.68-1
 libarchive13==3.6.2-1+deb12u2
 libargon2-1==0~20171227-0.3+deb12u1
 libarray-intspan-perl==2.004-2
-libasan8==12.2.0-14
+libasan8==12.2.0-14+deb12u1
 libasan8-armhf-cross==12.2.0-14cross1
 libasm-java==9.4-1
 libasound2==1.2.8-1+b1
@@ -308,7 +308,7 @@ libatk1.0-dev==2.46.0-5
 libatkmm-1.6-1v5==2.28.3-1
 libatm1==1:2.5.1-4+b2
 libatm1-dev==1:2.5.1-4+b2
-libatomic1==12.2.0-14
+libatomic1==12.2.0-14+deb12u1
 libatomic1-armhf-cross==12.2.0-14cross1
 libatspi2.0-0==2.46.0-5
 libatspi2.0-dev==2.46.0-5
@@ -325,7 +325,7 @@ libavc1394-0==0.5.4-5
 libavcodec59==7:5.1.6-0+deb12u1
 libavfilter8==7:5.1.6-0+deb12u1
 libavformat59==7:5.1.6-0+deb12u1
-libavif15==0.11.1-1
+libavif15==0.11.1-1+deb12u1
 libavutil57==7:5.1.6-0+deb12u1
 libb-hooks-endofscope-perl==0.26-1
 libb-hooks-op-check-perl==0.22-2+b1
@@ -451,16 +451,16 @@ libbsh-java==2.0b4-20
 libbz2-dev==1.0.8-5+b1
 libc-ares-dev==1.18.1-3
 libc-ares2==1.18.1-3
-libc-dev-bin==2.36-9+deb12u9
-libc-devtools==2.36-9+deb12u9
-libc-l10n==2.36-9+deb12u9
+libc-dev-bin==2.36-9+deb12u10
+libc-devtools==2.36-9+deb12u10
+libc-l10n==2.36-9+deb12u10
 libc6-armhf-cross==2.36-8cross1
-libc6-dbg==2.36-9+deb12u9
-libc6-dev==2.36-9+deb12u9
-libc6-dev-i386==2.36-9+deb12u9
-libc6-dev-x32==2.36-9+deb12u9
-libc6-i386==2.36-9+deb12u9
-libc6-x32==2.36-9+deb12u9
+libc6-dbg==2.36-9+deb12u10
+libc6-dev==2.36-9+deb12u10
+libc6-dev-i386==2.36-9+deb12u10
+libc6-dev-x32==2.36-9+deb12u10
+libc6-i386==2.36-9+deb12u10
+libc6-x32==2.36-9+deb12u10
 libcaca0==0.99.beta20-3
 libcacard0==1:2.8.0-3
 libcaf-openmpi-3==2.10.1-1+b1
@@ -469,14 +469,14 @@ libcairo-script-interpreter2==1.16.0-7
 libcairo2==1.16.0-7
 libcairo2-dev==1.16.0-7
 libcairomm-1.0-1v5==1.14.4-2
-libcap-dev==1:2.66-4
+libcap-dev==1:2.66-4+deb12u1
 libcap-ng-dev==0.8.3-1+b3
-libcap2-bin==1:2.66-4
+libcap2-bin==1:2.66-4+deb12u1
 libcapstone4==4.0.2-5
 libcapture-tiny-perl==0.48-2
 libcarp-clan-perl==6.08-2
 libcbor0.8==0.8.0-2+b1
-libcc1-0==12.2.0-14
+libcc1-0==12.2.0-14+deb12u1
 libcdi-api-java==1.2-3
 libcdparanoia0==3.10.2+debian-14
 libcdr-0.1-1==0.1.6-2+b2
@@ -536,10 +536,10 @@ libctf0==2.40-2
 libcunit1==2.1-3-dfsg-2.6
 libcunit1-dev==2.1-3-dfsg-2.6
 libcups2==2.4.2-3+deb12u8
-libcurl3-gnutls==7.88.1-10+deb12u8
-libcurl3-nss==7.88.1-10+deb12u8
-libcurl4==7.88.1-10+deb12u8
-libcurl4-openssl-dev==7.88.1-10+deb12u8
+libcurl3-gnutls==7.88.1-10+deb12u12
+libcurl3-nss==7.88.1-10+deb12u12
+libcurl4==7.88.1-10+deb12u12
+libcurl4-openssl-dev==7.88.1-10+deb12u12
 libdaemon-dev==0.14-7.1
 libdaemon0==0.14-7.1
 libdata-dpath-perl==0.58-2
@@ -561,6 +561,9 @@ libdb5.3-dev==5.3.28+dfsg2-1
 libdbi1==0.9.0-6
 libdbus-1-3==1.14.10-1~deb12u1
 libdbus-1-dev==1.14.10-1~deb12u1
+libdbus-c++-1-0v5==0.9.0-11
+libdbus-c++-bin==0.9.0-11
+libdbus-c++-dev==0.9.0-11
 libdbus-glib-1-2==0.112-3
 libdbus-glib-1-dev==0.112-3
 libdbus-glib-1-dev-bin==0.112-3
@@ -605,6 +608,7 @@ libdw-dev==0.188-2.1
 libdw1==0.188-2.1
 libdynaloader-functions-perl==0.003-3
 libeatmydata1==130-2+b1
+libecore1==1.26.3-1+b1
 libedit-dev==3.1-20221030-2
 libedit2==3.1-20221030-2
 libefiboot1==37-6
@@ -613,6 +617,7 @@ libegl-dev==1.6.0-1
 libegl-mesa0==22.3.6-1+deb12u1
 libegl1==1.6.0-1
 libegl1-mesa-dev==22.3.6-1+deb12u1
+libeina1a==1.26.3-1+b1
 libel-api-java==3.0.0-3
 libelf-dev==0.188-2.1
 libelf1==0.188-2.1
@@ -659,7 +664,7 @@ libfile-copy-recursive-perl==0.45-4
 libfile-desktopentry-perl==0.22-3
 libfile-dirlist-perl==0.05-3
 libfile-fcntllock-perl==0.22-4+b1
-libfile-find-rule-perl==0.34-3
+libfile-find-rule-perl==0.34-4~deb12u1
 libfile-homedir-perl==1.006-2
 libfile-listing-perl==6.15-1
 libfile-mimeinfo-perl==0.33-1
@@ -680,8 +685,8 @@ libfontconfig-dev==2.14.1-4
 libfontconfig1==2.14.1-4
 libfontenc1==1:1.1.4-1
 libfop-java==1:2.8-2
-libfreetype-dev==2.12.1+dfsg-5+deb12u3
-libfreetype6==2.12.1+dfsg-5+deb12u3
+libfreetype-dev==2.12.1+dfsg-5+deb12u4
+libfreetype6==2.12.1+dfsg-5+deb12u4
 libfreezethaw-perl==0.5001-3
 libfribidi-dev==1.0.8-2.1
 libfribidi0==1.0.8-2.1
@@ -695,25 +700,25 @@ libgav1-1==0.18.0-1+b1
 libgbm1==22.3.6-1+deb12u1
 libgc-dev==1:8.2.2-3
 libgc1==1:8.2.2-3
-libgcc-12-dev==12.2.0-14
+libgcc-12-dev==12.2.0-14+deb12u1
 libgcc-12-dev-armhf-cross==12.2.0-14cross1
 libgcc-s1-armhf-cross==12.2.0-14cross1
 libgd-perl==2.76-4+b1
 libgd3==2.3.3-9
 libgdbm-compat4==1.23-3
 libgdbm6==1.23-3
-libgdk-pixbuf-2.0-0==2.42.10+dfsg-1+deb12u1
-libgdk-pixbuf-2.0-dev==2.42.10+dfsg-1+deb12u1
-libgdk-pixbuf2.0-bin==2.42.10+dfsg-1+deb12u1
-libgdk-pixbuf2.0-common==2.42.10+dfsg-1+deb12u1
+libgdk-pixbuf-2.0-0==2.42.10+dfsg-1+deb12u2
+libgdk-pixbuf-2.0-dev==2.42.10+dfsg-1+deb12u2
+libgdk-pixbuf2.0-bin==2.42.10+dfsg-1+deb12u2
+libgdk-pixbuf2.0-common==2.42.10+dfsg-1+deb12u2
 libgeronimo-annotation-1.3-spec-java==1.3-1
 libgeronimo-interceptor-3.0-spec-java==1.0.1-4
 libgetopt-long-descriptive-perl==0.111-1
 libgettextpo-dev==0.21-12
 libgettextpo0==0.21-12
 libgfapi0==10.3-5
-libgfortran-12-dev==12.2.0-14
-libgfortran5==12.2.0-14
+libgfortran-12-dev==12.2.0-14+deb12u1
+libgfortran5==12.2.0-14+deb12u1
 libgfrpc0==10.3-5
 libgfxdr0==10.3-5
 libgif7==5.2.1-2.5
@@ -728,11 +733,11 @@ libglapi-mesa==22.3.6-1+deb12u1
 libgles-dev==1.6.0-1
 libgles1==1.6.0-1
 libgles2==1.6.0-1
-libglib2.0-0==2.74.6-2+deb12u5
-libglib2.0-bin==2.74.6-2+deb12u5
-libglib2.0-data==2.74.6-2+deb12u5
-libglib2.0-dev==2.74.6-2+deb12u5
-libglib2.0-dev-bin==2.74.6-2+deb12u5
+libglib2.0-0==2.74.6-2+deb12u6
+libglib2.0-bin==2.74.6-2+deb12u6
+libglib2.0-data==2.74.6-2+deb12u6
+libglib2.0-dev==2.74.6-2+deb12u6
+libglib2.0-dev-bin==2.74.6-2+deb12u6
 libglibmm-2.4-1v5==2.66.5-2
 libglu1-mesa==9.0.2-1.1
 libglu1-mesa-dev==9.0.2-1.1
@@ -747,8 +752,8 @@ libgme0==0.6.3-6
 libgmock-dev==1.12.1-0.2
 libgmp-dev==2:6.2.1+dfsg1-1.1
 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1
-libgnutls-dane0==3.7.9-2+deb12u3
-libgomp1==12.2.0-14
+libgnutls-dane0==3.7.9-2+deb12u4
+libgomp1==12.2.0-14+deb12u1
 libgomp1-armhf-cross==12.2.0-14cross1
 libgoogle-perftools4==2.10-1
 libgpgme11==1.18.0-3+b1
@@ -760,16 +765,16 @@ libgrpc++-dev==1.51.1-3+b1
 libgrpc++1.51==1.51.1-3+b1
 libgrpc-dev==1.51.1-3+b1
 libgrpc29==1.51.1-3+b1
-libgs-common==10.0.0~dfsg-11+deb12u6
-libgs10==10.0.0~dfsg-11+deb12u6
-libgs10-common==10.0.0~dfsg-11+deb12u6
+libgs-common==10.0.0~dfsg-11+deb12u7
+libgs10==10.0.0~dfsg-11+deb12u7
+libgs10-common==10.0.0~dfsg-11+deb12u7
 libgsl27==2.7.1+dfsg-5+deb12u1
 libgslcblas0==2.7.1+dfsg-5+deb12u1
 libgsm1==1.0.22-1
 libgspell-1-2==1.12.0-1+b2
 libgspell-1-common==1.12.0-1
-libgssapi-krb5-2==1.20.1-2+deb12u2
-libgssrpc4==1.20.1-2+deb12u2
+libgssapi-krb5-2==1.20.1-2+deb12u3
+libgssrpc4==1.20.1-2+deb12u3
 libgstreamer-plugins-base1.0-0==1.22.0-3+deb12u4
 libgstreamer1.0-0==1.22.0-2+deb12u1
 libgtest-dev==1.12.1-0.2
@@ -814,7 +819,7 @@ libhttp-tiny-multipart-perl==0.08-2
 libhttpclient-java==4.5.14-1
 libhttpcore-java==4.4.16-1
 libhunspell-1.7-0==1.7.1-1
-libhwasan0==12.2.0-14
+libhwasan0==12.2.0-14+deb12u1
 libhwloc-dev==2.9.0-1
 libhwloc-plugins==2.9.0-1
 libhwloc15==2.9.0-1
@@ -824,14 +829,14 @@ libibverbs-dev==44.0-2
 libibverbs1==44.0-2
 libice-dev==2:1.0.10-1
 libice6==2:1.0.10-1
-libicu-dev==72.1-3
-libicu72==72.1-3
+libicu-dev==72.1-3+deb12u1
+libicu72==72.1-3+deb12u1
 libidn12==1.41-1
 libiec61883-0==1.2.0-6+b1
 libigdgmm12==22.3.3+ds1-1
 libijs-0.35==0.35-15
-libimage-magick-perl==8:6.9.11.60+dfsg-1.6+deb12u2
-libimage-magick-q16-perl==8:6.9.11.60+dfsg-1.6+deb12u2
+libimage-magick-perl==8:6.9.11.60+dfsg-1.6+deb12u3
+libimage-magick-q16-perl==8:6.9.11.60+dfsg-1.6+deb12u3
 libimagequant0==2.17.0-1
 libimath-3-1-29==3.1.6-1
 libimport-into-perl==1.002005-2
@@ -860,7 +865,7 @@ libisl23==0.25-1.1
 libiterator-perl==0.03+ds1-2
 libiterator-util-perl==0.02+ds1-2
 libitext1-java==1.4-7
-libitm1==12.2.0-14
+libitm1==12.2.0-14+deb12u1
 libjack-jackd2-0==1.9.21~dfsg-3
 libjansi-java==2.4.0-2
 libjansson-dev==2.14-2
@@ -873,12 +878,12 @@ libjbig2dec0==0.19-3
 libjcode-pm-perl==2.06-1.1
 libjemalloc-dev==5.3.0-1
 libjemalloc2==5.3.0-1
-libjetty9-java==9.4.50-4+deb12u3
+libjetty9-java==9.4.57-0+deb12u1
 libjpeg-dev==1:2.1.5-2
 libjpeg62-turbo==1:2.1.5-2
 libjpeg62-turbo-dev==1:2.1.5-2
 libjq1==1.6-2.1
-libjs-bootstrap4==4.6.1+dfsg1-4
+libjs-bootstrap4==4.6.1+dfsg1-4+deb12u1
 libjs-d3==3.5.17-4
 libjs-jquery==3.6.1+dfsg+~3.5.14-1
 libjs-jquery-hotkeys==0~20130707+git2d51e3a9+dfsg-2.1
@@ -907,16 +912,16 @@ libjudydebian1==1.0.5-5+b2
 libjxl0.7==0.7.0-10
 libjxr-tools==1.2~git20170615.f752187-5
 libjxr0==1.2~git20170615.f752187-5
-libk5crypto3==1.20.1-2+deb12u2
-libkadm5clnt-mit12==1.20.1-2+deb12u2
-libkadm5srv-mit12==1.20.1-2+deb12u2
-libkdb5-10==1.20.1-2+deb12u2
+libk5crypto3==1.20.1-2+deb12u3
+libkadm5clnt-mit12==1.20.1-2+deb12u3
+libkadm5srv-mit12==1.20.1-2+deb12u3
+libkdb5-10==1.20.1-2+deb12u3
 libkeyutils1==1.6.3-2
 libkmod2==30+20221128-1
 libkpathsea6==2022.20220321.62855-5.1+deb12u2
-libkrb5-3==1.20.1-2+deb12u2
-libkrb5-dev==1.20.1-2+deb12u2
-libkrb5support0==1.20.1-2+deb12u2
+libkrb5-3==1.20.1-2+deb12u3
+libkrb5-dev==1.20.1-2+deb12u3
+libkrb5support0==1.20.1-2+deb12u3
 libksba8==1.6.3-2
 liblab-gamut1==2.42.2-7+deb12u1
 liblapack3==3.11.0-2
@@ -943,7 +948,7 @@ liblog-any-adapter-screen-perl==0.140-2
 liblog-any-perl==1.713-1
 liblognorm5==2.0.6-4
 liblqr-1-0==0.4.2-2.1
-liblsan0==12.2.0-14
+liblsan0==12.2.0-14+deb12u1
 libltdl-dev==2.4.7-7~deb12u1
 libltdl7==2.4.7-7~deb12u1
 liblua5.1-0==5.1.5-9
@@ -952,20 +957,20 @@ liblua5.3-0==5.3.6-2
 liblwp-mediatypes-perl==6.04-2
 liblwp-protocol-https-perl==6.10-1
 liblz1==1.13-5
-liblzma-dev==5.4.1-0.2
+liblzma-dev==5.4.1-1
 liblzo2-2==2.10-2
 liblzo2-dev==2.10-2
 libmagic-mgc==1:5.44-3
 libmagic1==1:5.44-3
-libmagick++-6.q16-8==8:6.9.11.60+dfsg-1.6+deb12u2
-libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u2
-libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.6+deb12u2
-libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u2
+libmagick++-6.q16-8==8:6.9.11.60+dfsg-1.6+deb12u3
+libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u3
+libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.6+deb12u3
+libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u3
 libmail-sendmail-perl==0.80-3
 libmailtools-perl==2.21-2
-libmariadb-dev==1:10.11.6-0+deb12u1
-libmariadb-dev-compat==1:10.11.6-0+deb12u1
-libmariadb3==1:10.11.6-0+deb12u1
+libmariadb-dev==1:10.11.11-0+deb12u1
+libmariadb-dev-compat==1:10.11.11-0+deb12u1
+libmariadb3==1:10.11.11-0+deb12u1
 libmarkdown2==2.2.7-2
 libmath-base85-perl==0.5+dfsg-2
 libmaven-archiver-java==3.6.0-1
@@ -1055,13 +1060,13 @@ libnpth0==1.6-3
 libnsl-dev==1.3.0-2
 libnsl2==1.3.0-2
 libnspr4==2:4.35-1
-libnss-systemd==252.33-1~deb12u1
+libnss-systemd==252.38-1~deb12u1
 libnss3==2:3.87.1-1+deb12u1
 libnuma-dev==2.0.16-1
 libnuma1==2.0.16-1
 libnumber-compare-perl==0.03-3
-libobjc-12-dev==12.2.0-14
-libobjc4==12.2.0-14
+libobjc-12-dev==12.2.0-14+deb12u1
+libobjc4==12.2.0-14+deb12u1
 libobject-pad-perl==0.78-1
 libogg0==1.3.5-3
 libole-storage-lite-perl==0.20-2
@@ -1093,8 +1098,8 @@ libpackage-stash-perl==0.40-1
 libpackage-stash-xs-perl==0.30-1+b1
 libpackagekit-glib2-18==1.2.6-5
 libpadwalker-perl==2.5-1+b3
-libpam-cap==1:2.66-4
-libpam-systemd==252.33-1~deb12u1
+libpam-cap==1:2.66-4+deb12u1
+libpam-systemd==252.38-1~deb12u1
 libpam0g-dev==1.5.2-6+deb12u1
 libpango-1.0-0==1.50.12+ds-1
 libpango1.0-dev==1.50.12+ds-1
@@ -1129,8 +1134,8 @@ libpcrecpp0v5==2:8.39-15
 libpcsclite-dev==1.9.9-2
 libpcsclite1==1.9.9-2
 libpdfbox-java==1:1.8.16-2
-libperl-dev==5.36.0-7+deb12u1
-libperl5.36==5.36.0-7+deb12u1
+libperl-dev==5.36.0-7+deb12u2
+libperl5.36==5.36.0-7+deb12u2
 libperlio-gzip-perl==0.20-1+b1
 libperlio-utf8-strict-perl==0.010-1
 libpfm4==4.13.0-1
@@ -1170,8 +1175,8 @@ libpod-constants-perl==0.19-2
 libpod-parser-perl==1.65-1
 libpolkit-agent-1-0==122-3
 libpolkit-gobject-1-0==122-3
-libpoppler-glib8==22.12.0-2+b1
-libpoppler126==22.12.0-2+b1
+libpoppler-glib8==22.12.0-2+deb12u1
+libpoppler126==22.12.0-2+deb12u1
 libpopt-dev==1.19+dfsg-1
 libpopt0==1.19+dfsg-1
 libpostproc56==7:5.1.6-0+deb12u1
@@ -1197,35 +1202,35 @@ libpython3-all-dev==3.11.2-1+b1
 libpython3-dbg==3.11.2-1+b1
 libpython3-dev==3.11.2-1+b1
 libpython3-stdlib==3.11.2-1+b1
-libpython3.11==3.11.2-6+deb12u5
-libpython3.11-dbg==3.11.2-6+deb12u5
-libpython3.11-dev==3.11.2-6+deb12u5
-libpython3.11-minimal==3.11.2-6+deb12u5
-libpython3.11-stdlib==3.11.2-6+deb12u5
+libpython3.11==3.11.2-6+deb12u6
+libpython3.11-dbg==3.11.2-6+deb12u6
+libpython3.11-dev==3.11.2-6+deb12u6
+libpython3.11-minimal==3.11.2-6+deb12u6
+libpython3.11-stdlib==3.11.2-6+deb12u6
 libqdox-java==1.12.1-3
 libqdox2-java==2.0.3-1
 libqhull-r8.0==2020.2-5
-libqt5concurrent5==5.15.8+dfsg-11+deb12u2
-libqt5core5a==5.15.8+dfsg-11+deb12u2
-libqt5dbus5==5.15.8+dfsg-11+deb12u2
-libqt5gui5==5.15.8+dfsg-11+deb12u2
-libqt5network5==5.15.8+dfsg-11+deb12u2
-libqt5opengl5==5.15.8+dfsg-11+deb12u2
-libqt5opengl5-dev==5.15.8+dfsg-11+deb12u2
-libqt5printsupport5==5.15.8+dfsg-11+deb12u2
+libqt5concurrent5==5.15.8+dfsg-11+deb12u3
+libqt5core5a==5.15.8+dfsg-11+deb12u3
+libqt5dbus5==5.15.8+dfsg-11+deb12u3
+libqt5gui5==5.15.8+dfsg-11+deb12u3
+libqt5network5==5.15.8+dfsg-11+deb12u3
+libqt5opengl5==5.15.8+dfsg-11+deb12u3
+libqt5opengl5-dev==5.15.8+dfsg-11+deb12u3
+libqt5printsupport5==5.15.8+dfsg-11+deb12u3
 libqt5qml5==5.15.8+dfsg-3
 libqt5qmlmodels5==5.15.8+dfsg-3
 libqt5quick5==5.15.8+dfsg-3
-libqt5sql5==5.15.8+dfsg-11+deb12u2
-libqt5sql5-sqlite==5.15.8+dfsg-11+deb12u2
+libqt5sql5==5.15.8+dfsg-11+deb12u3
+libqt5sql5-sqlite==5.15.8+dfsg-11+deb12u3
 libqt5svg5==5.15.8-3
-libqt5test5==5.15.8+dfsg-11+deb12u2
+libqt5test5==5.15.8+dfsg-11+deb12u3
 libqt5waylandclient5==5.15.8-2
 libqt5waylandcompositor5==5.15.8-2
-libqt5widgets5==5.15.8+dfsg-11+deb12u2
-libqt5xml5==5.15.8+dfsg-11+deb12u2
-libquadmath0==12.2.0-14
-librabbitmq4==0.11.0-1+b1
+libqt5widgets5==5.15.8+dfsg-11+deb12u3
+libqt5xml5==5.15.8+dfsg-11+deb12u3
+libquadmath0==12.2.0-14+deb12u1
+librabbitmq4==0.11.0-1+deb12u1
 librados2==16.2.15+ds-0+deb12u1
 libraqm0==0.7.0-4.1
 librav1e0==0.5.1-6
@@ -1326,9 +1331,9 @@ libsrt1.5-gnutls==1.5.1-1+deb12u1
 libssh-4==0.10.6-0+deb12u1
 libssh-gcrypt-4==0.10.6-0+deb12u1
 libssh2-1==1.10.0-3+b1
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
-libstdc++-12-dev==12.2.0-14
+libssl-dev==3.0.16-1~deb12u1
+libssl3==3.0.16-1~deb12u1
+libstdc++-12-dev==12.2.0-14+deb12u1
 libstdc++6-armhf-cross==12.2.0-14cross1
 libstemmer0d==2.2.0-2
 libstrictures-perl==2.000006-1
@@ -1354,8 +1359,8 @@ libsynctex2==2022.20220321.62855-5.1+deb12u2
 libsyntax-keyword-try-perl==0.28-1
 libsys-cpuaffinity-perl==1.13~03-2+b1
 libsys-hostname-long-perl==1.5-3
-libsystemd-dev==252.33-1~deb12u1
-libsystemd-shared==252.33-1~deb12u1
+libsystemd-dev==252.38-1~deb12u1
+libsystemd-shared==252.38-1~deb12u1
 libtag1v5==1.13-2
 libtag1v5-vanilla==1.13-2
 libtask-weaken-perl==1.06-2
@@ -1402,16 +1407,16 @@ libtraceevent1==1:1.7.1-1
 libtracefs-dev==1.6.4-1
 libtracefs1==1.6.4-1
 libtry-tiny-perl==0.31-2
-libtsan2==12.2.0-14
+libtsan2==12.2.0-14+deb12u1
 libtwolame0==0.4.0-2
 libtype-tiny-perl==2.002001-1
 libtype-tiny-xs-perl==0.025-1
 libtypes-serialiser-perl==1.01-1
-libubsan1==12.2.0-14
+libubsan1==12.2.0-14+deb12u1
 libubsan1-armhf-cross==12.2.0-14cross1
 libuchardet0==0.0.7-1
 libucx0==1.13.1-1
-libudev-dev==252.33-1~deb12u1
+libudev-dev==252.38-1~deb12u1
 libudfread0==1.1.2-1
 libunbound8==1.17.1-2+deb12u2
 libunicode-map-perl==0.112-13+b1
@@ -1448,7 +1453,7 @@ libvisual-0.4-0==0.4.0-19
 libvorbis0a==1.3.7-1
 libvorbisenc2==1.3.7-1
 libvorbisfile3==1.3.7-1
-libvpx7==1.12.0-1+deb12u3
+libvpx7==1.12.0-1+deb12u4
 libvte-2.91-0==0.70.6-2~deb12u1
 libvte-2.91-common==0.70.6-2~deb12u1
 libvulkan-dev==1.3.239.0-1
@@ -1489,15 +1494,15 @@ libx11-protocol-perl==0.56-9
 libx11-xcb1==2:1.8.4-2+deb12u2
 libx264-164==2:0.164.3095+gitbaee400-3
 libx265-199==3.5-2+b1
-libx32asan8==12.2.0-14
-libx32atomic1==12.2.0-14
-libx32gcc-12-dev==12.2.0-14
-libx32gcc-s1==12.2.0-14
-libx32gomp1==12.2.0-14
-libx32itm1==12.2.0-14
-libx32quadmath0==12.2.0-14
-libx32stdc++6==12.2.0-14
-libx32ubsan1==12.2.0-14
+libx32asan8==12.2.0-14+deb12u1
+libx32atomic1==12.2.0-14+deb12u1
+libx32gcc-12-dev==12.2.0-14+deb12u1
+libx32gcc-s1==12.2.0-14+deb12u1
+libx32gomp1==12.2.0-14+deb12u1
+libx32itm1==12.2.0-14+deb12u1
+libx32quadmath0==12.2.0-14+deb12u1
+libx32stdc++6==12.2.0-14+deb12u1
+libx32ubsan1==12.2.0-14+deb12u1
 libxalan2-java==2.7.2-4
 libxapian30==1.4.22-1
 libxau-dev==1:1.0.9-1
@@ -1561,9 +1566,9 @@ libxml-sax-perl==1.02+dfsg-3
 libxml-simple-perl==2.25-2
 libxml-twig-perl==1:3.52-2
 libxml-xpathengine-perl==0.14-2
-libxml2==2.9.14+dfsg-1.3~deb12u1
-libxml2-dev==2.9.14+dfsg-1.3~deb12u1
-libxml2-utils==2.9.14+dfsg-1.3~deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u2
+libxml2-dev==2.9.14+dfsg-1.3~deb12u2
+libxml2-utils==2.9.14+dfsg-1.3~deb12u2
 libxmlb2==0.3.10-2
 libxmlgraphics-commons-java==2.8-2
 libxmlrpc-lite-perl==0.717-5
@@ -1579,8 +1584,8 @@ libxs-parse-keyword-perl==0.33-1
 libxs-parse-sublike-perl==0.16-1+b2
 libxshmfence1==1.3-1
 libxsimd-dev==8.1.0-7
-libxslt1-dev==1.1.35-1
-libxslt1.1==1.1.35-1
+libxslt1-dev==1.1.35-1+deb12u1
+libxslt1.1==1.1.35-1+deb12u1
 libxss1==1:1.2.3-1
 libxstring-perl==0.005-2+b1
 libxt-dev==1:1.2.1-1.1
@@ -1614,14 +1619,14 @@ libzvbi0==0.2.41-1
 libzzip-0-13==0.13.72+dfsg.1-1.1
 licensecheck==3.3.5-1
 lintian==2.116.3
-linux-compiler-gcc-12-x86==6.1.124-1
-linux-headers-6.1.0-30-amd64==6.1.124-1
-linux-headers-6.1.0-30-arm64==6.1.124-1
-linux-headers-6.1.0-30-common==6.1.124-1
-linux-headers-amd64==6.1.124-1
-linux-headers-arm64==6.1.124-1
-linux-kbuild-6.1==6.1.124-1
-linux-libc-dev==6.1.124-1
+linux-compiler-gcc-12-x86==6.1.140-1
+linux-headers-6.1.0-37-amd64==6.1.140-1
+linux-headers-6.1.0-37-arm64==6.1.140-1
+linux-headers-6.1.0-37-common==6.1.140-1
+linux-headers-amd64==6.1.140-1
+linux-headers-arm64==6.1.140-1
+linux-kbuild-6.1==6.1.140-1
+linux-libc-dev==6.1.140-1
 linuxdoc-tools==0.9.82-1
 llvm==1:14.0-55.7~deb12u1
 llvm-14==1:14.0.6-12
@@ -1631,7 +1636,7 @@ llvm-14-runtime==1:14.0.6-12
 llvm-14-tools==1:14.0.6-12
 llvm-runtime==1:14.0-55.7~deb12u1
 lmodern==2.005-1
-locales==2.36-9+deb12u9
+locales==2.36-9+deb12u10
 logrotate==3.21.0-1
 lsb-release==12.0-1
 lsof==4.95.0-1
@@ -1650,7 +1655,7 @@ man-db==2.11.2-2
 man2html-base==1.6g-14
 manpages==6.03-2
 manpages-dev==6.03-2
-mariadb-common==1:10.11.6-0+deb12u1
+mariadb-common==1:10.11.11-0+deb12u1
 maven==3.8.7-1
 maven-debian-helper==2.6.3
 maven-repo-helper==1.11
@@ -1667,7 +1672,7 @@ mpi-default-dev==1.14
 mupdf-tools==1.21.1+ds2-1+b4
 mysql-common==5.8+1.1.0
 ncurses-term==6.4-4
-net-tools==2.10-0.1
+net-tools==2.10-0.1+deb12u2
 netbase==6.4
 netpbm==2:11.01.00-2
 nftables==1.0.6-2+deb12u2
@@ -1684,19 +1689,19 @@ nodejs-doc==18.19.0+dfsg-6~deb12u2
 nss-plugin-pem==1.0.8+1-1
 ocl-icd-libopencl1==2.3.1-1
 openjade==1.4devel1-22
-openjdk-17-jdk==17.0.13+11-2~deb12u1
-openjdk-17-jdk-headless==17.0.13+11-2~deb12u1
-openjdk-17-jre==17.0.13+11-2~deb12u1
-openjdk-17-jre-headless==17.0.13+11-2~deb12u1
+openjdk-17-jdk==17.0.15+6-1~deb12u1
+openjdk-17-jdk-headless==17.0.15+6-1~deb12u1
+openjdk-17-jre==17.0.15+6-1~deb12u1
+openjdk-17-jre-headless==17.0.15+6-1~deb12u1
 openmpi-bin==4.1.4-3+b1
 openmpi-common==4.1.4-3
 opensp==1.5.2-13+b2
-openssh-client==1:9.2p1-2+deb12u4
-openssh-server==1:9.2p1-2+deb12u4
-openssh-sftp-server==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u6
+openssh-server==1:9.2p1-2+deb12u6
+openssh-sftp-server==1:9.2p1-2+deb12u6
+openssl==3.0.16-1~deb12u1
 os-prober==1.81
-ovmf==2022.11-6+deb12u1
+ovmf==2022.11-6+deb12u2
 packagekit==1.2.6-5
 packagekit-tools==1.2.6-5
 pahole==1.24-4.1
@@ -1709,8 +1714,8 @@ pbuilder==0.231
 pbzip2==1.1.13-1
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
-perl==5.36.0-7+deb12u1
-perl-modules-5.36==5.36.0-7+deb12u1
+perl==5.36.0-7+deb12u2
+perl-modules-5.36==5.36.0-7+deb12u2
 perl-openssl-defaults==7+b1
 php-cli==2:8.2+93
 php-codecoverage==9.2.26+dfsg-1
@@ -1728,12 +1733,12 @@ php-text-template==2.0.4-2
 php-timer==5.0.3-3
 php-tokenizer==1.2.1-1
 php-xml==2:8.2+93
-php8.2-cli==8.2.26-1~deb12u1
-php8.2-common==8.2.26-1~deb12u1
-php8.2-mbstring==8.2.26-1~deb12u1
-php8.2-opcache==8.2.26-1~deb12u1
-php8.2-readline==8.2.26-1~deb12u1
-php8.2-xml==8.2.26-1~deb12u1
+php8.2-cli==8.2.28-1~deb12u1
+php8.2-common==8.2.28-1~deb12u1
+php8.2-mbstring==8.2.28-1~deb12u1
+php8.2-opcache==8.2.28-1~deb12u1
+php8.2-readline==8.2.28-1~deb12u1
+php8.2-xml==8.2.28-1~deb12u1
 phpunit==9.6.7-1
 phpunit-cli-parser==1.0.1-3
 phpunit-code-unit==1.0.8-3
@@ -1839,7 +1844,7 @@ python3-iniconfig==1.1.1-2
 python3-ipython==8.5.0-4
 python3-isort==5.6.4-1
 python3-jedi==0.18.2-1
-python3-jinja2==3.1.2-1+deb12u1
+python3-jinja2==3.1.2-1+deb12u2
 python3-jwt==2.6.0-1
 python3-kiwisolver==1.4.4-1+b1
 python3-lazr.restfulclient==0.14.5-1
@@ -1934,22 +1939,22 @@ python3-xdg==0.28-2
 python3-yaml==6.0-3+b2
 python3-zipp==1.0.0-6
 python3-zope.interface==5.5.2-1+b1
-python3.11==3.11.2-6+deb12u5
-python3.11-dbg==3.11.2-6+deb12u5
-python3.11-dev==3.11.2-6+deb12u5
-python3.11-minimal==3.11.2-6+deb12u5
-python3.11-venv==3.11.2-6+deb12u5
-qemu-block-extra==1:7.2+dfsg-7+deb12u12
-qemu-system-common==1:7.2+dfsg-7+deb12u12
-qemu-system-data==1:7.2+dfsg-7+deb12u12
-qemu-system-gui==1:7.2+dfsg-7+deb12u12
-qemu-system-x86==1:7.2+dfsg-7+deb12u12
-qemu-utils==1:7.2+dfsg-7+deb12u12
-qt5-gtk-platformtheme==5.15.8+dfsg-11+deb12u2
-qt5-qmake==5.15.8+dfsg-11+deb12u2
-qt5-qmake-bin==5.15.8+dfsg-11+deb12u2
-qtbase5-dev==5.15.8+dfsg-11+deb12u2
-qtbase5-dev-tools==5.15.8+dfsg-11+deb12u2
+python3.11==3.11.2-6+deb12u6
+python3.11-dbg==3.11.2-6+deb12u6
+python3.11-dev==3.11.2-6+deb12u6
+python3.11-minimal==3.11.2-6+deb12u6
+python3.11-venv==3.11.2-6+deb12u6
+qemu-block-extra==1:7.2+dfsg-7+deb12u13
+qemu-system-common==1:7.2+dfsg-7+deb12u13
+qemu-system-data==1:7.2+dfsg-7+deb12u13
+qemu-system-gui==1:7.2+dfsg-7+deb12u13
+qemu-system-x86==1:7.2+dfsg-7+deb12u13
+qemu-utils==1:7.2+dfsg-7+deb12u13
+qt5-gtk-platformtheme==5.15.8+dfsg-11+deb12u3
+qt5-qmake==5.15.8+dfsg-11+deb12u3
+qt5-qmake-bin==5.15.8+dfsg-11+deb12u3
+qtbase5-dev==5.15.8+dfsg-11+deb12u3
+qtbase5-dev-tools==5.15.8+dfsg-11+deb12u3
 qtchooser==66-2
 qttranslations5-l10n==5.15.8-2
 qtwayland5==5.15.8-2
@@ -1962,7 +1967,7 @@ rpm-common==4.18.0+dfsg-1+deb12u1
 rpm2cpio==4.18.0+dfsg-1+deb12u1
 rrdtool==1.7.2-4+b8
 rsync==3.2.7-1+deb12u2
-rsyslog==8.2302.0-1
+rsyslog==8.2302.0-1+deb12u1
 ruby==1:3.1
 ruby-all-dev==1:3.1
 ruby-asciidoctor==2.0.18-2
@@ -1997,12 +2002,12 @@ sphinx-rtd-theme-common==1.2.0+dfsg-1
 squashfs-tools==1:4.5.1-1
 stgit==0.19-1.1
 strace==6.1-0.1
-sudo==1.9.13p3-1+deb12u1
+sudo==1.9.13p3-1+deb12u2
 swig==4.1.0-0.2
 swig4.0==4.1.0-0.2
-systemd==252.33-1~deb12u1
-systemd-sysv==252.33-1~deb12u1
-systemd-timesyncd==252.33-1~deb12u1
+systemd==252.38-1~deb12u1
+systemd-sysv==252.38-1~deb12u1
+systemd-timesyncd==252.38-1~deb12u1
 t1utils==1.41-4
 tcl==8.6.13
 tcl8.6==8.6.13+dfsg-2
@@ -2030,7 +2035,7 @@ tk==8.6.13
 tk8.6==8.6.13-2
 tk8.6-blt2.5==2.5.3+dfsg-4.1
 ucf==3.0043+nmu1+deb12u1
-udev==252.33-1~deb12u1
+udev==252.38-1~deb12u1
 unicode-data==15.0.0-1
 unzip==6.0-28
 usb.ids==2024.07.04-0+deb12u1
@@ -2041,13 +2046,13 @@ valgrind==1:3.19.0-1
 valgrind-dbg==1:3.19.0-1
 vdpau-driver-all==1.5-2
 velocity==1.7-6
-vim==2:9.0.1378-2
-vim-common==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
+vim==2:9.0.1378-2+deb12u2
+vim-common==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
 watchdog==5.16-1+b2
 wayland-protocols==1.31-1
 wdiff==1.2.2-5
-wget==1.21.3-1+b2
+wget==1.21.3-1+deb12u1
 x11-common==1:7.7+23
 x11-utils==7.7+5
 x11-xserver-utils==7.7+9+b1
@@ -2063,10 +2068,10 @@ xkb-data==2.35.1-1
 xml-core==0.18+nmu1
 xmlstarlet==1.6.1-3
 xorg-sgml-doctools==1:1.11-1.1
-xsltproc==1.1.35-1
+xsltproc==1.1.35-1+deb12u1
 xtrans-dev==1.4.0-1
-xxd==2:9.0.1378-2
-xz-utils==5.4.1-0.2
+xxd==2:9.0.1378-2+deb12u2
+xz-utils==5.4.1-1
 zip==3.0-13
 zlib1g-dev==1:1.2.13.dfsg-1
 zstd==1.5.4+dfsg2-5
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
index 3b6c4c09238..f37240eefec 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
@@ -4,4 +4,3 @@ dvipng==1.15-1.1
 libnanomsg-dev==1.1.5+dfsg-1.1
 libnanomsg5==1.1.5+dfsg-1.1
 watchdog==5.16-1+b1
-wget==1.21.3-1+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
index bb2bf6d6df6..c6c1db1e539 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
@@ -3,8 +3,7 @@ dctrl-tools==2.24-3
 dvipng==1.15-1.1
 libnanomsg-dev==1.1.5+dfsg-1.1
 libnanomsg5==1.1.5+dfsg-1.1
-linux-compiler-gcc-12-arm==6.1.124-1
-linux-headers-6.1.0-30-armmp==6.1.124-1
-linux-headers-armmp==6.1.124-1
+linux-compiler-gcc-12-arm==6.1.140-1
+linux-headers-6.1.0-37-armmp==6.1.140-1
+linux-headers-armmp==6.1.140-1
 watchdog==5.16-1+b1
-wget==1.21.3-1+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
index e4be5e40102..9d8c17a730a 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
@@ -10,7 +10,7 @@ backcall==0.2.0
 bcrypt==3.2.2
 beautifulsoup4==4.11.2
 beniget==0.4.1
-bitarray==3.0.0
+bitarray==3.1.0
 blinker==1.5
 blkinfo==0.2.0
 brotli==1.0.9
@@ -39,7 +39,7 @@ executing==1.2.0
 fastentrypoints==0.12
 fonttools==4.38.0
 fs==2.4.16
-fsspec==2024.12.0
+fsspec==2025.2.0
 gast==0.5.2
 gbp==0.9.30
 gcovr==5.2
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
index 3299a8a522a..1f4189bd830 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
@@ -1,2 +1,2 @@
 protobuf==4.25.6
-psutil==6.1.1
+psutil==7.0.0
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
index 3299a8a522a..1f4189bd830 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
@@ -1,2 +1,2 @@
 protobuf==4.25.6
-psutil==6.1.1
+psutil==7.0.0
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
index 54c91fc0345..71b1f6e40a8 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
@@ -24,9 +24,9 @@ autopoint==0.21-4
 autotools-dev==20180224.1+nmu1
 bash-completion==1:2.11-2
 bc==1.07.1-2+b2
-bind9-dnsutils==1:9.16.50-1~deb11u2
-bind9-host==1:9.16.50-1~deb11u2
-bind9-libs==1:9.16.50-1~deb11u2
+bind9-dnsutils==1:9.16.50-1~deb11u3
+bind9-host==1:9.16.50-1~deb11u3
+bind9-libs==1:9.16.50-1~deb11u3
 binfmt-support==2.2.1-1+deb11u1
 binutils==2.35.2-2
 binutils-aarch64-linux-gnu==2.35.2-2
@@ -62,7 +62,7 @@ cpp-10-arm-linux-gnueabihf==10.2.1-6cross1
 cpp-arm-linux-gnueabihf==4:10.2.1-1
 cppcheck==2.3-1
 cron==3.0pl1-137
-curl==7.74.0-1.3+deb11u14
+curl==7.74.0-1.3+deb11u15
 cython3==0.29.21-3+b1
 dblatex==0.3.12py3-1
 dblatex-doc==0.3.12py3-1
@@ -92,11 +92,11 @@ dh-strip-nondeterminism==1.12.0-1
 dictionaries-common==1.28.4
 diffstat==1.64-1
 dirmngr==2.2.27-2+deb11u2
-distro-info-data==0.51+deb11u7
+distro-info-data==0.51+deb11u8
 dkms==2.8.4-3
 dmeventd==2:1.02.175-2.1
 dmsetup==2:1.02.175-2.1
-dnsutils==1:9.16.50-1~deb11u2
+dnsutils==1:9.16.50-1~deb11u3
 docbook==4.5-6
 docbook-dsssl==1.79-9.2
 docbook-to-man==1:2.0.0-45
@@ -106,7 +106,7 @@ docbook-xsl==1.79.2+dfsg-1
 docker-buildx-plugin==0.10.5-1~debian.11~bullseye
 docker-ce==5:24.0.2-1~debian.11~bullseye
 docker-ce-cli==5:24.0.2-1~debian.11~bullseye
-docker-ce-rootless-extras==5:27.5.1-1~debian.11~bullseye
+docker-ce-rootless-extras==5:28.3.1-1~debian.11~bullseye
 docker-compose-plugin==2.18.1-1~debian.11~bullseye
 docutils-common==0.16+dfsg-4
 dosfstools==4.2-1
@@ -120,16 +120,16 @@ dwarves==1.20-1
 dwz==0.13+20210201-1
 eatmydata==105-9
 ed==1.17-1
-emacs-bin-common==1:27.1+1-3.1+deb11u5
-emacs-common==1:27.1+1-3.1+deb11u5
-emacs-el==1:27.1+1-3.1+deb11u5
-emacs-nox==1:27.1+1-3.1+deb11u5
+emacs-bin-common==1:27.1+1-3.1+deb11u6
+emacs-common==1:27.1+1-3.1+deb11u6
+emacs-el==1:27.1+1-3.1+deb11u6
+emacs-nox==1:27.1+1-3.1+deb11u6
 emacsen-common==3.0.4
 equivs==2.3.1
 exim4-base==4.94.2-7+deb11u4
 exim4-config==4.94.2-7+deb11u4
 exim4-daemon-light==4.94.2-7+deb11u4
-expat==2.2.10-2+deb11u6
+expat==2.2.10-2+deb11u7
 fakeroot==1.25.3-1.1
 file==1:5.39-3+deb11u1
 flex==2.6.4-8
@@ -166,11 +166,11 @@ gettext==0.21-4
 gettext-base==0.21-4
 gfortran==4:10.2.1-1
 gfortran-10==10.2.1-6
-ghostscript==9.53.3~dfsg-7+deb11u9
+ghostscript==9.53.3~dfsg-7+deb11u10
 gir1.2-atk-1.0==2.36.0-2
 gir1.2-atspi-2.0==2.38.0-4+deb11u1
 gir1.2-freedesktop==1.66.1-1+b1
-gir1.2-gdkpixbuf-2.0==2.42.2+dfsg-1+deb11u2
+gir1.2-gdkpixbuf-2.0==2.42.2+dfsg-1+deb11u3
 gir1.2-glib-2.0==1.66.1-1+b1
 gir1.2-gtk-3.0==3.24.24-4+deb11u4
 gir1.2-harfbuzz-0.0==2.7.4-1
@@ -206,7 +206,7 @@ gsettings-desktop-schemas==3.38.0-2
 gsfonts==1:8.11+urwcyr1.0.7~pre44-4.5
 gstreamer1.0-libav==1.18.4-3
 gstreamer1.0-plugins-base==1.18.4-2+deb11u3
-gstreamer1.0-plugins-good==1.18.4-2+deb11u2
+gstreamer1.0-plugins-good==1.18.4-2+deb11u3
 gstreamer1.0-x==1.18.4-2+deb11u3
 gtk-update-icon-cache==3.24.24-4+deb11u4
 guile-2.2-libs==2.2.7+1-6
@@ -215,10 +215,10 @@ hicolor-icon-theme==0.17-2
 i965-va-driver==2.4.1+dfsg1-1
 ibverbs-providers==33.2-1
 icc-profiles-free==2.0.1+dfsg-1.1
-icu-devtools==67.1-7
-imagemagick==8:6.9.11.60+dfsg-1.3+deb11u4
-imagemagick-6-common==8:6.9.11.60+dfsg-1.3+deb11u4
-imagemagick-6.q16==8:6.9.11.60+dfsg-1.3+deb11u4
+icu-devtools==67.1-7+deb11u1
+imagemagick==8:6.9.11.60+dfsg-1.3+deb11u5
+imagemagick-6-common==8:6.9.11.60+dfsg-1.3+deb11u5
+imagemagick-6.q16==8:6.9.11.60+dfsg-1.3+deb11u5
 install-info==6.7.0.dfsg.2-6
 intel-media-va-driver==21.1.1+dfsg1-1
 intltool-debian==0.35.0+20060710.5
@@ -235,7 +235,7 @@ jq==1.6-2.1
 junit5==5.3.2-4
 kernel-wedge==2.104
 kmod==28-1
-krb5-multidev==1.18.3-6+deb11u5
+krb5-multidev==1.18.3-6+deb11u7
 lcov==1.14-2
 less==551-2+deb11u2
 lib32asan6==10.2.1-6
@@ -249,8 +249,8 @@ lib32stdc++6==10.2.1-6
 lib32ubsan1==10.2.1-6
 libaa1==1.4p5-48
 libaacs0==0.9.0-2
-libabsl-dev==0~20200923.3-2
-libabsl20200923==0~20200923.3-2
+libabsl-dev==0~20200923.3-2+deb11u1
+libabsl20200923==0~20200923.3-2+deb11u1
 libacl1-dev==2.2.53-10
 libaio1==0.3.112-9
 libalgorithm-c3-perl==0.11-1
@@ -307,10 +307,10 @@ libavahi-client3==0.8-5+deb11u3
 libavahi-common-data==0.8-5+deb11u3
 libavahi-common3==0.8-5+deb11u3
 libavc1394-0==0.5.4-5
-libavcodec58==7:4.3.8-0+deb11u1
-libavfilter7==7:4.3.8-0+deb11u1
-libavformat58==7:4.3.8-0+deb11u1
-libavutil56==7:4.3.8-0+deb11u1
+libavcodec58==7:4.3.8-0+deb11u3
+libavfilter7==7:4.3.8-0+deb11u3
+libavformat58==7:4.3.8-0+deb11u3
+libavutil56==7:4.3.8-0+deb11u3
 libb-hooks-endofscope-perl==0.24-1.1
 libb-hooks-op-check-perl==0.22-1+b3
 libbabeltrace-dev==1.5.8-1+b3
@@ -423,8 +423,8 @@ libboost-wave1.74-dev==1.74.0-9
 libboost-wave1.74.0==1.74.0-9
 libboost1.74-dev==1.74.0-9
 libboost1.74-tools-dev==1.74.0-9
-libbpf-dev==1:0.3-2
-libbpf0==1:0.3-2
+libbpf-dev==1:0.3-2+deb11u1
+libbpf0==1:0.3-2+deb11u1
 libbrlapi0.8==6.3+dfsg-1+deb11u1
 libbrotli-dev==1.0.9-2+b2
 libbrotli1==1.0.9-2+b2
@@ -435,16 +435,16 @@ libbsh-java==2.0b4-20
 libbz2-dev==1.0.8-4
 libc-ares-dev==1.17.1-1+deb11u3
 libc-ares2==1.17.1-1+deb11u3
-libc-dev-bin==2.31-13+deb11u11
-libc-devtools==2.31-13+deb11u11
-libc-l10n==2.31-13+deb11u11
+libc-dev-bin==2.31-13+deb11u13
+libc-devtools==2.31-13+deb11u13
+libc-l10n==2.31-13+deb11u13
 libc6-armhf-cross==2.31-9cross4
-libc6-dbg==2.31-13+deb11u11
-libc6-dev==2.31-13+deb11u11
-libc6-dev-i386==2.31-13+deb11u11
-libc6-dev-x32==2.31-13+deb11u11
-libc6-i386==2.31-13+deb11u11
-libc6-x32==2.31-13+deb11u11
+libc6-dbg==2.31-13+deb11u13
+libc6-dev==2.31-13+deb11u13
+libc6-dev-i386==2.31-13+deb11u13
+libc6-dev-x32==2.31-13+deb11u13
+libc6-i386==2.31-13+deb11u13
+libc6-x32==2.31-13+deb11u13
 libcaca0==0.99.beta19-2.2
 libcacard0==1:2.8.0-3
 libcaf-openmpi-3==2.9.2-3
@@ -452,10 +452,10 @@ libcairo-gobject2==1.16.0-5
 libcairo-script-interpreter2==1.16.0-5
 libcairo2==1.16.0-5
 libcairo2-dev==1.16.0-5
-libcap-dev==1:2.44-1
+libcap-dev==1:2.44-1+deb11u1
 libcap-ng-dev==0.7.9-2.2+b1
-libcap2==1:2.44-1
-libcap2-bin==1:2.44-1
+libcap2==1:2.44-1+deb11u1
+libcap2-bin==1:2.44-1+deb11u1
 libcapstone4==4.0.2-3
 libcapture-tiny-perl==0.48-1
 libcarp-clan-perl==6.08-1
@@ -468,8 +468,8 @@ libcgi-fast-perl==1:2.15-1
 libcgi-pm-perl==4.51-1
 libcgraph6==2.42.2-5+deb11u1
 libchromaprint1==1.5.0-2
-libcjson-dev==1.7.14-1+deb11u1
-libcjson1==1.7.14-1+deb11u1
+libcjson-dev==1.7.14-1+deb11u2
+libcjson1==1.7.14-1+deb11u2
 libclang-common-11-dev==1:11.0.1-2
 libclang-cpp11==1:11.0.1-2
 libclang1-11==1:11.0.1-2
@@ -491,7 +491,7 @@ libcoarrays-openmpi-dev==2.9.2-3
 libcodec2-0.9==0.9.2-4
 libcolord2==1.4.5-3
 libcommon-sense-perl==3.75-1+b4
-libcommons-beanutils-java==1.9.4-1
+libcommons-beanutils-java==1.9.4-1+deb11u1
 libcommons-cli-java==1.4-2
 libcommons-codec-java==1.15-1
 libcommons-collections3-java==3.2.2-2
@@ -516,9 +516,9 @@ libctf0==2.35.2-2
 libcunit1==2.1-3-dfsg-2.3
 libcunit1-dev==2.1-3-dfsg-2.3
 libcups2==2.3.3op2-3+deb11u9
-libcurl3-gnutls==7.74.0-1.3+deb11u14
-libcurl4==7.74.0-1.3+deb11u14
-libcurl4-openssl-dev==7.74.0-1.3+deb11u14
+libcurl3-gnutls==7.74.0-1.3+deb11u15
+libcurl4==7.74.0-1.3+deb11u15
+libcurl4-openssl-dev==7.74.0-1.3+deb11u15
 libdaemon-dev==0.14-7.1
 libdaemon0==0.14-7.1
 libdata-dpath-perl==0.58-1
@@ -602,8 +602,8 @@ libevent-openssl-2.1-7==2.1.12-stable-1
 libevent-pthreads-2.1-7==2.1.12-stable-1
 libexception-class-perl==1.44-1
 libexecs0==1.3-1
-libexpat1==2.2.10-2+deb11u6
-libexpat1-dev==2.2.10-2+deb11u6
+libexpat1==2.2.10-2+deb11u7
+libexpat1-dev==2.2.10-2+deb11u7
 libexplain-dev==1.4.D001-11+deb11u1
 libexplain51==1.4.D001-11+deb11u1
 libexporter-lite-perl==0.08-1
@@ -625,7 +625,7 @@ libfile-copy-recursive-perl==0.45-1
 libfile-desktopentry-perl==0.22-2
 libfile-dirlist-perl==0.05-2
 libfile-fcntllock-perl==0.22-3+b7
-libfile-find-rule-perl==0.34-1
+libfile-find-rule-perl==0.34-1+deb11u1
 libfile-homedir-perl==1.006-1
 libfile-listing-perl==6.14-1
 libfile-mimeinfo-perl==0.30-1
@@ -646,9 +646,9 @@ libfontconfig1==2.13.1-4.2
 libfontconfig1-dev==2.13.1-4.2
 libfontenc1==1:1.1.4-1
 libfop-java==1:2.5-3
-libfreetype-dev==2.10.4+dfsg-1+deb11u1
-libfreetype6==2.10.4+dfsg-1+deb11u1
-libfreetype6-dev==2.10.4+dfsg-1+deb11u1
+libfreetype-dev==2.10.4+dfsg-1+deb11u2
+libfreetype6==2.10.4+dfsg-1+deb11u2
+libfreetype6-dev==2.10.4+dfsg-1+deb11u2
 libfribidi-dev==1.0.8-2+deb11u1
 libfribidi0==1.0.8-2+deb11u1
 libfstrm0==0.6.0-1+b1
@@ -662,10 +662,10 @@ libgd-perl==2.73-1+b1
 libgd3==2.3.0-2
 libgdbm-compat4==1.19-2
 libgdbm6==1.19-2
-libgdk-pixbuf-2.0-0==2.42.2+dfsg-1+deb11u2
-libgdk-pixbuf-2.0-dev==2.42.2+dfsg-1+deb11u2
-libgdk-pixbuf2.0-bin==2.42.2+dfsg-1+deb11u2
-libgdk-pixbuf2.0-common==2.42.2+dfsg-1+deb11u2
+libgdk-pixbuf-2.0-0==2.42.2+dfsg-1+deb11u3
+libgdk-pixbuf-2.0-dev==2.42.2+dfsg-1+deb11u3
+libgdk-pixbuf2.0-bin==2.42.2+dfsg-1+deb11u3
+libgdk-pixbuf2.0-common==2.42.2+dfsg-1+deb11u3
 libgeronimo-annotation-1.3-spec-java==1.3-1
 libgeronimo-interceptor-3.0-spec-java==1.0.1-4
 libgetopt-long-descriptive-perl==0.105-1
@@ -685,11 +685,11 @@ libglapi-mesa==20.3.5-1
 libgles-dev==1.3.2-1
 libgles1==1.3.2-1
 libgles2==1.3.2-1
-libglib2.0-0==2.66.8-1+deb11u5
-libglib2.0-bin==2.66.8-1+deb11u5
-libglib2.0-data==2.66.8-1+deb11u5
-libglib2.0-dev==2.66.8-1+deb11u5
-libglib2.0-dev-bin==2.66.8-1+deb11u5
+libglib2.0-0==2.66.8-1+deb11u6
+libglib2.0-bin==2.66.8-1+deb11u6
+libglib2.0-data==2.66.8-1+deb11u6
+libglib2.0-dev==2.66.8-1+deb11u6
+libglib2.0-dev-bin==2.66.8-1+deb11u6
 libglu1-mesa==9.0.1-1
 libglu1-mesa-dev==9.0.1-1
 libglvnd-dev==1.3.2-1
@@ -701,7 +701,7 @@ libgme0==0.6.3-2
 libgmock-dev==1.10.0.20201025-1.1
 libgmp-dev==2:6.2.1+dfsg-1+deb11u1
 libgmpxx4ldbl==2:6.2.1+dfsg-1+deb11u1
-libgnutls-dane0==3.7.1-5+deb11u6
+libgnutls-dane0==3.7.1-5+deb11u7
 libgomp1==10.2.1-6
 libgomp1-armhf-cross==10.2.1-6cross1
 libgoogle-gson-java==2.8.6-1+deb11u1
@@ -713,11 +713,11 @@ libgraphite2-3==1.3.14-1
 libgraphite2-dev==1.3.14-1
 libgrpc++1==1.30.2-3
 libgrpc10==1.30.2-3
-libgs9==9.53.3~dfsg-7+deb11u9
-libgs9-common==9.53.3~dfsg-7+deb11u9
+libgs9==9.53.3~dfsg-7+deb11u10
+libgs9-common==9.53.3~dfsg-7+deb11u10
 libgsasl7==1.10.0-4+deb11u1
 libgsm1==1.0.18-2
-libgssrpc4==1.18.3-6+deb11u5
+libgssrpc4==1.18.3-6+deb11u7
 libgstreamer-plugins-base1.0-0==1.18.4-2+deb11u3
 libgstreamer1.0-0==1.18.4-2.1+deb11u1
 libgtest-dev==1.10.0.20201025-1.1
@@ -764,8 +764,8 @@ libibverbs-dev==33.2-1
 libibverbs1==33.2-1
 libice-dev==2:1.0.10-1
 libice6==2:1.0.10-1
-libicu-dev==67.1-7
-libicu67==67.1-7
+libicu-dev==67.1-7+deb11u1
+libicu67==67.1-7+deb11u1
 libidn11==1.33-3
 libiec61883-0==1.2.0-4
 libigdgmm11==20.4.1+ds1-1
@@ -812,10 +812,10 @@ libjbig0==2.1-3.1+b2
 libjbig2dec0==0.19-2
 libjemalloc-dev==5.2.1-3
 libjemalloc2==5.2.1-3
-libjetty9-java==9.4.50-4+deb11u2
+libjetty9-java==9.4.57-0+deb11u2
 libjpeg62-turbo==1:2.0.6-4
 libjq1==1.6-2.1
-libjs-bootstrap4==4.5.2+dfsg1-8~deb11u1
+libjs-bootstrap4==4.5.2+dfsg1-8~deb11u2
 libjs-d3==3.5.17-4
 libjs-jquery==3.5.1+dfsg+~3.5.5-7
 libjs-jquery-easing==12-3
@@ -846,12 +846,12 @@ libjudy-dev==1.0.5-5+b2
 libjudydebian1==1.0.5-5+b2
 libjxr-tools==1.1-6+b1
 libjxr0==1.1-6+b1
-libkadm5clnt-mit12==1.18.3-6+deb11u5
-libkadm5srv-mit12==1.18.3-6+deb11u5
-libkdb5-10==1.18.3-6+deb11u5
+libkadm5clnt-mit12==1.18.3-6+deb11u7
+libkadm5srv-mit12==1.18.3-6+deb11u7
+libkdb5-10==1.18.3-6+deb11u7
 libkmod2==28-1
 libkpathsea6==2020.20200327.54578-7+deb11u2
-libkrb5-dev==1.18.3-6+deb11u5
+libkrb5-dev==1.18.3-6+deb11u7
 libksba8==1.5.0-3+deb11u2
 liblab-gamut1==2.42.2-5+deb11u1
 liblapack3==3.9.0-3+deb11u1
@@ -890,15 +890,15 @@ liblzo2-2==2.10-2
 liblzo2-dev==2.10-2
 libmagic-mgc==1:5.39-3+deb11u1
 libmagic1==1:5.39-3+deb11u1
-libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.3+deb11u4
-libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.3+deb11u4
-libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.3+deb11u4
+libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.3+deb11u5
+libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.3+deb11u5
+libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.3+deb11u5
 libmail-sendmail-perl==0.80-1.1
 libmailtools-perl==2.21-1
 libmailutils7==1:3.10-3+b1
-libmariadb-dev==1:10.5.26-0+deb11u2
-libmariadb-dev-compat==1:10.5.26-0+deb11u2
-libmariadb3==1:10.5.26-0+deb11u2
+libmariadb-dev==1:10.5.29-0+deb11u1
+libmariadb-dev-compat==1:10.5.29-0+deb11u1
+libmariadb3==1:10.5.29-0+deb11u1
 libmarkdown2==2.2.6-1
 libmaven-archiver-java==3.2.0-2.1
 libmaven-clean-plugin-java==3.1.0-1
@@ -1002,7 +1002,7 @@ libopencsd0==0.14.4-1
 libopenexr25==2.5.4-2+deb11u1
 libopengl-dev==1.3.2-1
 libopengl0==1.3.2-1
-libopenjp2-7==2.4.0-3
+libopenjp2-7==2.4.0-3+deb11u1
 libopenmpi-dev==4.1.0-10
 libopenmpi3==4.1.0-10
 libopenmpt0==0.4.11-1
@@ -1021,7 +1021,7 @@ libpackage-stash-perl==0.39-1
 libpackage-stash-xs-perl==0.29-1+b2
 libpackagekit-glib2-18==1.2.2-2
 libpadwalker-perl==2.5-1+b1
-libpam-cap==1:2.44-1
+libpam-cap==1:2.44-1+deb11u1
 libpam-systemd==247.3-7+deb11u6
 libpam0g-dev==1.4.0-9+deb11u1
 libpango-1.0-0==1.46.2-3
@@ -1096,7 +1096,7 @@ libpod-parser-perl==1.63-2
 libpolkit-agent-1-0==0.105-31+deb11u1
 libpolkit-gobject-1-0==0.105-31+deb11u1
 libpopt0==1.18-2
-libpostproc55==7:4.3.8-0+deb11u1
+libpostproc55==7:4.3.8-0+deb11u3
 libproc-processtable-perl==0.59-2+b1
 libprocps8==2:3.3.17-5
 libprotobuf-c-dev==1.3.3-1+b2
@@ -1121,11 +1121,11 @@ libpython3-all-dev==3.9.2-3
 libpython3-dbg==3.9.2-3
 libpython3-dev==3.9.2-3
 libpython3-stdlib==3.9.2-3
-libpython3.9==3.9.2-1+deb11u2
-libpython3.9-dbg==3.9.2-1+deb11u2
-libpython3.9-dev==3.9.2-1+deb11u2
-libpython3.9-minimal==3.9.2-1+deb11u2
-libpython3.9-stdlib==3.9.2-1+deb11u2
+libpython3.9==3.9.2-1+deb11u3
+libpython3.9-dbg==3.9.2-1+deb11u3
+libpython3.9-dev==3.9.2-1+deb11u3
+libpython3.9-minimal==3.9.2-1+deb11u3
+libpython3.9-stdlib==3.9.2-1+deb11u3
 libqdox-java==1.12.1-3
 libqdox2-java==2.0.0-1
 libqt5concurrent5==5.15.2+dfsg-9+deb11u1
@@ -1143,7 +1143,7 @@ libqt5test5==5.15.2+dfsg-9+deb11u1
 libqt5widgets5==5.15.2+dfsg-9+deb11u1
 libqt5xml5==5.15.2+dfsg-9+deb11u1
 libquadmath0==10.2.1-6
-librabbitmq4==0.10.0-1
+librabbitmq4==0.10.0-1+deb11u1
 libraw1394-11==2.1.2-2
 librdmacm1==33.2-1
 libre-engine-re2-perl==0.14-1
@@ -1165,7 +1165,7 @@ librsvg2-2==2.50.3+dfsg-1+deb11u1
 librsvg2-common==2.50.3+dfsg-1+deb11u1
 librtmp1==2.4+20151223.gitfa8646d.1-2+b2
 librubberband2==1.9.0-1
-libruby2.7==2.7.4-1+deb11u3
+libruby2.7==2.7.4-1+deb11u5
 libsamplerate0==0.2.1+ds0-1
 libsasl2-2==2.1.27+dfsg-2.1+deb11u1
 libsasl2-modules==2.1.27+dfsg-2.1+deb11u1
@@ -1208,8 +1208,8 @@ libsombok3==2.4.0-2+b1
 libsord-0-0==0.16.8-2
 libsort-key-perl==1.33-2+b3
 libsort-versions-perl==1.62-1
-libsoup-gnome2.4-1==2.72.0-2+deb11u1
-libsoup2.4-1==2.72.0-2+deb11u1
+libsoup-gnome2.4-1==2.72.0-2+deb11u2
+libsoup2.4-1==2.72.0-2+deb11u2
 libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libsoxr0==0.1.3-4
@@ -1222,7 +1222,7 @@ libsratom-0-0==0.6.8-1
 libsrt1.4-gnutls==1.4.2-1.3
 libssh-gcrypt-4==0.9.8-0+deb11u1
 libssh2-1==1.9.0-2+deb11u1
-libssl-dev==1.1.1w-0+deb11u2
+libssl-dev==1.1.1w-0+deb11u3
 libstdc++-10-dev==10.2.1-6
 libstdc++6-armhf-cross==10.2.1-6cross1
 libstemmer0d==2.1.0-1
@@ -1241,8 +1241,8 @@ libsubunit-dev==1.4.0-3
 libsubunit0==1.4.0-3
 libsurefire-java==2.22.3-1
 libswitch-perl==2.17-2.1
-libswresample3==7:4.3.8-0+deb11u1
-libswscale5==7:4.3.8-0+deb11u1
+libswresample3==7:4.3.8-0+deb11u3
+libswscale5==7:4.3.8-0+deb11u3
 libsynctex2==2020.20200327.54578-7+deb11u2
 libsys-cpuaffinity-perl==1.13~03-1
 libsys-hostname-long-perl==1.5-2
@@ -1329,7 +1329,7 @@ libvisual-0.4-0==0.4.0-17
 libvorbis0a==1.3.7-1
 libvorbisenc2==1.3.7-1
 libvorbisfile3==1.3.7-1
-libvpx6==1.9.0-1+deb11u3
+libvpx6==1.9.0-1+deb11u4
 libvte-2.91-0==0.62.3-1
 libvte-2.91-common==0.62.3-1
 libvulkan-dev==1.2.162.0-1
@@ -1448,9 +1448,9 @@ libxml-sax-perl==1.02+dfsg-1
 libxml-simple-perl==2.25-1
 libxml-twig-perl==1:3.52-1
 libxml-xpathengine-perl==0.14-1
-libxml2==2.9.10+dfsg-6.7+deb11u5
-libxml2-dev==2.9.10+dfsg-6.7+deb11u5
-libxml2-utils==2.9.10+dfsg-6.7+deb11u5
+libxml2==2.9.10+dfsg-6.7+deb11u7
+libxml2-dev==2.9.10+dfsg-6.7+deb11u7
+libxml2-utils==2.9.10+dfsg-6.7+deb11u7
 libxmlgraphics-commons-java==2.4-2~deb11u1
 libxmlrpc-lite-perl==0.717-4
 libxmu6==2:1.1.2-2+b3
@@ -1462,8 +1462,8 @@ libxrandr2==2:1.5.1-1
 libxrender-dev==1:0.9.10-1
 libxrender1==1:0.9.10-1
 libxshmfence1==1.3-1
-libxslt1-dev==1.1.34-4+deb11u1
-libxslt1.1==1.1.34-4+deb11u1
+libxslt1-dev==1.1.34-4+deb11u2
+libxslt1.1==1.1.34-4+deb11u2
 libxss1==1:1.2.3-1
 libxstring-perl==0.005-1+b1
 libxt-dev==1:1.2.0-1
@@ -1491,21 +1491,21 @@ libzvbi0==0.2.35-18
 libzzip-0-13==0.13.62-3.3+deb11u1
 licensecheck==3.1.1-2
 lintian==2.104.0
-linux-compiler-gcc-10-x86==5.10.226-1
-linux-headers-5.10.0-33-amd64==5.10.226-1
-linux-headers-5.10.0-33-arm64==5.10.226-1
-linux-headers-5.10.0-33-common==5.10.226-1
-linux-headers-amd64==5.10.226-1
-linux-headers-arm64==5.10.226-1
-linux-kbuild-5.10==5.10.226-1
-linux-libc-dev==5.10.226-1
+linux-compiler-gcc-10-x86==5.10.237-1
+linux-headers-5.10.0-35-amd64==5.10.237-1
+linux-headers-5.10.0-35-arm64==5.10.237-1
+linux-headers-5.10.0-35-common==5.10.237-1
+linux-headers-amd64==5.10.237-1
+linux-headers-arm64==5.10.237-1
+linux-kbuild-5.10==5.10.237-1
+linux-libc-dev==5.10.237-1
 linuxdoc-tools==0.9.82-1
 llvm==1:11.0-51+nmu5
 llvm-11==1:11.0.1-2
 llvm-11-runtime==1:11.0.1-2
 llvm-runtime==1:11.0-51+nmu5
 lmodern==2.004.5-6.1
-locales==2.31-13+deb11u11
+locales==2.31-13+deb11u13
 logrotate==3.18.0-2+deb11u2
 lsb-release==11.1.0
 lsof==4.93.2+dfsg-1.1
@@ -1528,7 +1528,7 @@ man-db==2.9.4-2
 man2html-base==1.6g-14
 manpages==5.10-1
 manpages-dev==5.10-1
-mariadb-common==1:10.5.26-0+deb11u2
+mariadb-common==1:10.5.29-0+deb11u1
 maven==3.6.3-5
 maven-debian-helper==2.6
 maven-repo-helper==1.10
@@ -1542,7 +1542,7 @@ mpi-default-bin==1.13
 mpi-default-dev==1.13
 mysql-common==5.8+1.0.7
 ncurses-term==6.2+20201114-2+deb11u2
-net-tools==1.60+git20181103.0eebece-1+deb11u1
+net-tools==1.60+git20181103.0eebece-1+deb11u2
 netbase==6.3
 netpbm==2:10.0-15.4
 nftables==0.9.8-3.1+deb11u2
@@ -1551,18 +1551,18 @@ node-jquery==3.5.1+dfsg+~3.5.5-7
 nodejs==14.21.3-deb-1nodesource1
 ocl-icd-libopencl1==2.2.14-2
 openjade==1.4devel1-22
-openjdk-11-jdk==11.0.25+9-1~deb11u1
-openjdk-11-jdk-headless==11.0.25+9-1~deb11u1
-openjdk-11-jre==11.0.25+9-1~deb11u1
-openjdk-11-jre-headless==11.0.25+9-1~deb11u1
+openjdk-11-jdk==11.0.27+6-1~deb11u1
+openjdk-11-jdk-headless==11.0.27+6-1~deb11u1
+openjdk-11-jre==11.0.27+6-1~deb11u1
+openjdk-11-jre-headless==11.0.27+6-1~deb11u1
 openmpi-bin==4.1.0-10
 openmpi-common==4.1.0-10
 opensp==1.5.2-13+b2
-openssh-client==1:8.4p1-5+deb11u3
-openssh-server==1:8.4p1-5+deb11u3
-openssh-sftp-server==1:8.4p1-5+deb11u3
-openssl==1.1.1w-0+deb11u2
-ovmf==2020.11-2+deb11u2
+openssh-client==1:8.4p1-5+deb11u5
+openssh-server==1:8.4p1-5+deb11u5
+openssh-sftp-server==1:8.4p1-5+deb11u5
+openssl==1.1.1w-0+deb11u3
+ovmf==2020.11-2+deb11u3
 packagekit==1.2.2-2
 packagekit-tools==1.2.2-2
 pango1.0-tools==1.46.2-3
@@ -1595,13 +1595,13 @@ php-timer==5.0.3-2
 php-tokenizer==1.2.0-1
 php-webmozart-assert==1.9.1-2
 php-xml==2:7.4+76
-php7.4-cli==7.4.33-1+deb11u7
-php7.4-common==7.4.33-1+deb11u7
-php7.4-json==7.4.33-1+deb11u7
-php7.4-mbstring==7.4.33-1+deb11u7
-php7.4-opcache==7.4.33-1+deb11u7
-php7.4-readline==7.4.33-1+deb11u7
-php7.4-xml==7.4.33-1+deb11u7
+php7.4-cli==7.4.33-1+deb11u8
+php7.4-common==7.4.33-1+deb11u8
+php7.4-json==7.4.33-1+deb11u8
+php7.4-mbstring==7.4.33-1+deb11u8
+php7.4-opcache==7.4.33-1+deb11u8
+php7.4-readline==7.4.33-1+deb11u8
+php7.4-xml==7.4.33-1+deb11u8
 phpunit==9.5.2-1
 phpunit-cli-parser==1.0.1-1
 phpunit-code-unit==1.0.8-1
@@ -1697,7 +1697,7 @@ python3-ipython==7.20.0-1+deb11u1
 python3-ipython-genutils==0.2.0-4
 python3-isort==5.6.4-1
 python3-jedi==0.18.0-1
-python3-jinja2==2.11.3-1+deb11u2
+python3-jinja2==2.11.3-1+deb11u4
 python3-lazy-object-proxy==1.5.2-1
 python3-lib2to3==3.9.2-1
 python3-logilab-common==1.8.1-1
@@ -1719,7 +1719,7 @@ python3-parso==0.8.1-1
 python3-pexpect==4.8.0-2
 python3-pickleshare==0.7.5-3
 python3-pil==8.1.2+dfsg-0.3+deb11u2
-python3-pkg-resources==52.0.0-4+deb11u1
+python3-pkg-resources==52.0.0-4+deb11u2
 python3-pluggy==0.13.0-6
 python3-ply==3.11-4
 python3-prompt-toolkit==3.0.14-1
@@ -1738,7 +1738,7 @@ python3-requests==2.25.1+dfsg-2
 python3-roman==2.0.0-5
 python3-scapy==2.4.4-4
 python3-service-identity==18.1.0-6
-python3-setuptools==52.0.0-4+deb11u1
+python3-setuptools==52.0.0-4+deb11u2
 python3-six==1.16.0-2
 python3-snowballstemmer==2.1.0-1
 python3-software-properties==0.96.20.2-2.1
@@ -1764,16 +1764,16 @@ python3-wrapt==1.12.1-4+b1
 python3-xdg==0.27-2
 python3-zipp==1.0.0-3
 python3-zope.interface==5.2.0-1
-python3.9==3.9.2-1+deb11u2
-python3.9-dbg==3.9.2-1+deb11u2
-python3.9-dev==3.9.2-1+deb11u2
-python3.9-minimal==3.9.2-1+deb11u2
-python3.9-venv==3.9.2-1+deb11u2
-qemu-system-common==1:5.2+dfsg-11+deb11u3
-qemu-system-data==1:5.2+dfsg-11+deb11u3
-qemu-system-gui==1:5.2+dfsg-11+deb11u3
-qemu-system-x86==1:5.2+dfsg-11+deb11u3
-qemu-utils==1:5.2+dfsg-11+deb11u3
+python3.9==3.9.2-1+deb11u3
+python3.9-dbg==3.9.2-1+deb11u3
+python3.9-dev==3.9.2-1+deb11u3
+python3.9-minimal==3.9.2-1+deb11u3
+python3.9-venv==3.9.2-1+deb11u3
+qemu-system-common==1:5.2+dfsg-11+deb11u4
+qemu-system-data==1:5.2+dfsg-11+deb11u4
+qemu-system-gui==1:5.2+dfsg-11+deb11u4
+qemu-system-x86==1:5.2+dfsg-11+deb11u4
+qemu-utils==1:5.2+dfsg-11+deb11u4
 qt5-gtk-platformtheme==5.15.2+dfsg-9+deb11u1
 qt5-qmake==5.15.2+dfsg-9+deb11u1
 qt5-qmake-bin==5.15.2+dfsg-9+deb11u1
@@ -1817,15 +1817,15 @@ ruby-rspec-expectations==3.9.0c2e2m1s3-2
 ruby-rspec-mocks==3.9.0c2e2m1s3-2
 ruby-rspec-support==3.9.0c2e2m1s3-2
 ruby-ruby2-keywords==0.0.2-2
-ruby-rubygems==3.2.5-2
+ruby-rubygems==3.2.5-2+deb11u1
 ruby-signet==0.14.0-4
 ruby-simplecov==0.19.1-1
 ruby-simplecov-html==0.12.3-1
 ruby-test-unit==3.3.9-1
 ruby-xmlrpc==0.3.0-2
-ruby2.7==2.7.4-1+deb11u3
-ruby2.7-dev==2.7.4-1+deb11u3
-ruby2.7-doc==2.7.4-1+deb11u3
+ruby2.7==2.7.4-1+deb11u5
+ruby2.7-dev==2.7.4-1+deb11u5
+ruby2.7-doc==2.7.4-1+deb11u5
 rubygems-integration==1.18
 runit-helper==2.10.3
 sbsigntool==0.9.2-2
@@ -1844,7 +1844,7 @@ sphinx-rtd-theme-common==0.5.1+dfsg-1
 squashfs-tools==1:4.4-2+deb11u2
 stgit==0.19-1
 strace==5.10-1
-sudo==1.9.5p2-3+deb11u1
+sudo==1.9.5p2-3+deb11u2
 swig==4.0.2-1
 swig4.0==4.0.2-1
 systemd==247.3-7+deb11u6
@@ -1893,12 +1893,12 @@ valgrind==1:3.16.1-1
 valgrind-dbg==1:3.16.1-1
 vdpau-driver-all==1.4-3
 velocity==1.7-6
-vim==2:8.2.2434-3+deb11u1
-vim-common==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
+vim==2:8.2.2434-3+deb11u3
+vim-common==2:8.2.2434-3+deb11u3
+vim-runtime==2:8.2.2434-3+deb11u3
 wayland-protocols==1.20-1
 wdiff==1.2.2-2+b1
-wget==1.21-1+deb11u1
+wget==1.21-1+deb11u2
 x11-common==1:7.7+22
 x11-utils==7.7+5
 x11-xserver-utils==7.7+8
@@ -1919,9 +1919,9 @@ xkb-data==2.29-2
 xml-core==0.18+nmu1
 xmlto==0.0.28-2.1
 xorg-sgml-doctools==1:1.11-1.1
-xsltproc==1.1.34-4+deb11u1
+xsltproc==1.1.34-4+deb11u2
 xtrans-dev==1.4.0-1
-xxd==2:8.2.2434-3+deb11u1
+xxd==2:8.2.2434-3+deb11u3
 xz-utils==5.2.5-2.1~deb11u1
 zip==3.0-12
 zlib1g-dev==1:1.2.11.dfsg-2+deb11u2
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
index 4dd945f910c..f1051c6454c 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
@@ -3,7 +3,7 @@ dvipng==1.15-1.1
 libjpeg-dev==1:2.0.6-4
 libjpeg62-turbo-dev==1:2.0.6-4
 libunicode-linebreak-perl==0.0.20190101-1+b2
-linux-compiler-gcc-10-arm==5.10.226-1
-linux-headers-5.10.0-33-armmp==5.10.226-1
-linux-headers-armmp==5.10.226-1
+linux-compiler-gcc-10-arm==5.10.237-1
+linux-headers-5.10.0-35-armmp==5.10.237-1
+linux-headers-armmp==5.10.237-1
 nasm==2.15.05-1
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
index 88bf2bc55b9..f6222a9290e 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
@@ -7,7 +7,7 @@ babel==2.8.0
 backcall==0.2.0
 bcrypt==3.1.7
 beautifulsoup4==4.9.3
-bitarray==3.0.0
+bitarray==3.1.0
 blkinfo==0.2.0
 certifi==2020.6.20
 chardet==4.0.0
@@ -101,7 +101,6 @@ python-debian==0.1.39
 python-magic==0.4.20
 pytz==2021.1
 pyxdg==0.27
-pyyaml==5.4.1
 redis==5.2.1
 regex==2024.11.6
 requests==2.25.1
@@ -109,6 +108,7 @@ roman==2.0.0
 scapy==2.4.4
 service-identity==18.1.0
 setuptools==49.6.0
+setuptools-scm==8.1.0
 six==1.16.0
 snowballstemmer==2.1.0
 soupsieve==2.2.1
@@ -118,6 +118,7 @@ stdeb==0.10.0
 stgit==0.19
 thrift==0.13.0
 toml==0.10.1
+tomli==2.2.1
 traitlets==5.0.5
 twisted==20.3.0
 typing-extensions==3.7.4.3
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64
index 5e5d9b1d2e7..4a6ecefc58c 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64
@@ -1 +1 @@
-psutil==6.1.1
+psutil==7.0.0
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf
index 5e5d9b1d2e7..4a6ecefc58c 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf
@@ -1 +1 @@
-psutil==6.1.1
+psutil==7.0.0
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-py2 b/files/build/versions/dockers/sonic-slave-buster/versions-py2
index ffa16652238..ec1f386fd2d 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-py2
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-py2
@@ -75,7 +75,6 @@ pytest-cov==2.6.0
 pytest-runner==4.4
 pytz==2019.1
 pyxdg==0.25
-pyyaml==5.4.1
 redis==3.5.3
 requests==2.21.0
 roman==2.0.0
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-py3 b/files/build/versions/dockers/sonic-slave-buster/versions-py3
index b5cf8cfbeec..0b8ef237260 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-py3
@@ -4,7 +4,7 @@ async-timeout==4.0.3
 atomicwrites==1.1.5
 attrs==18.2.0
 babel==2.6.0
-bitarray==3.0.0
+bitarray==3.1.0
 blkinfo==0.2.0
 certifi==2018.8.24
 chardet==3.0.4
@@ -26,7 +26,7 @@ jinja2==3.0.3
 keyring==17.1.1
 keyrings.alt==3.1.1
 lxml==4.9.1
-m2crypto==0.43.0
+m2crypto==0.44.0
 mako==1.0.7
 markdown==3.0.1
 markupsafe==2.0.1
@@ -44,7 +44,7 @@ pexpect==4.8.0
 pillow==9.4.0
 pip==24.0
 pluggy==0.8.0
-psutil==6.1.1
+psutil==7.0.0
 ptyprocess==0.7.0
 py==1.7.0
 pyang==2.4.0
@@ -65,7 +65,6 @@ python-debian==0.1.35
 python-magic==0.4.16
 pytz==2019.1
 pyxdg==0.25
-pyyaml==5.4.1
 redis==5.0.8
 regex==2024.4.16
 requests==2.21.0
diff --git a/files/build/versions/host-base-image/versions-deb-bookworm b/files/build/versions/host-base-image/versions-deb-bookworm
index 42d80aaef7d..4f8340fcace 100644
--- a/files/build/versions/host-base-image/versions-deb-bookworm
+++ b/files/build/versions/host-base-image/versions-deb-bookworm
@@ -1,19 +1,19 @@
 adduser==3.134
 apt==2.6.1
-base-files==12.4+deb12u9
+base-files==12.4+deb12u11
 base-passwd==3.6.1
-bash==5.2.15-2+b7
+bash==5.2.15-2+b8
 bsdutils==1:2.38.1-5+deb12u3
 coreutils==9.1-1
 dash==0.5.12-2
 debconf==1.5.82
-debian-archive-keyring==2023.3+deb12u1
+debian-archive-keyring==2023.3+deb12u2
 debianutils==5.7-0.5~deb12u1
 diffutils==1:3.8-4
 dpkg==1.21.22
 e2fsprogs==1.47.0-2
 findutils==4.9.0-4
-gcc-12-base==12.2.0-14
+gcc-12-base==12.2.0-14+deb12u1
 gpgv==2.2.40-1.1
 grep==3.8-5
 gzip==1.12-1
@@ -26,25 +26,25 @@ libaudit-common==1:3.0.9-1
 libaudit1==1:3.0.9-1
 libblkid1==2.38.1-5+deb12u3
 libbz2-1.0==1.0.8-5+b1
-libc-bin==2.36-9+deb12u9
-libc6==2.36-9+deb12u9
+libc-bin==2.36-9+deb12u10
+libc6==2.36-9+deb12u10
 libcap-ng0==0.8.3-1+b3
-libcap2==1:2.66-4
+libcap2==1:2.66-4+deb12u1
 libcom-err2==1.47.0-2
 libcrypt1==1:4.4.33-2
 libdb5.3==5.3.28+dfsg2-1
 libdebconfclient0==0.270
 libext2fs2==1.47.0-2
 libffi8==3.4.4-1
-libgcc-s1==12.2.0-14
+libgcc-s1==12.2.0-14+deb12u1
 libgcrypt20==1.10.1-3
 libgmp10==2:6.2.1+dfsg1-1.1
-libgnutls30==3.7.9-2+deb12u3
+libgnutls30==3.7.9-2+deb12u4
 libgpg-error0==1.46-1
 libhogweed6==3.8.1-2
 libidn2-0==2.3.3-1+b1
 liblz4-1==1.9.4-1
-liblzma5==5.4.1-0.2
+liblzma5==5.4.1-1
 libmd0==1.0.4-2
 libmount1==2.38.1-5+deb12u3
 libnettle8==3.8.1-2
@@ -61,27 +61,27 @@ libsemanage2==3.4-1+b5
 libsepol2==3.4-2.1
 libsmartcols1==2.38.1-5+deb12u3
 libss2==1.47.0-2
-libstdc++6==12.2.0-14
-libsystemd0==252.33-1~deb12u1
-libtasn1-6==4.19.0-2
+libstdc++6==12.2.0-14+deb12u1
+libsystemd0==252.36-1~deb12u1
+libtasn1-6==4.19.0-2+deb12u1
 libtinfo6==6.4-4
-libudev1==252.33-1~deb12u1
+libudev1==252.36-1~deb12u1
 libunistring2==1.0-2
 libuuid1==2.38.1-5+deb12u3
 libxxhash0==0.8.1-1
 libzstd1==1.5.4+dfsg2-5
-login==1:4.13+dfsg1-1+b1
+login==1:4.13+dfsg1-1+deb12u1
 logsave==1.47.0-2
 mawk==1.3.4.20200120-3.1
 mount==2.38.1-5+deb12u3
 ncurses-base==6.4-4
 ncurses-bin==6.4-4
-passwd==1:4.13+dfsg1-1+b1
-perl-base==5.36.0-7+deb12u1
+passwd==1:4.13+dfsg1-1+deb12u1
+perl-base==5.36.0-7+deb12u2
 sed==4.9-1
 sysvinit-utils==3.06-4
 tar==1.34+dfsg-1.2+deb12u1
-tzdata==2024b-0+deb12u1
+tzdata==2025b-0+deb12u1
 usr-is-merged==37~deb12u1
 util-linux==2.38.1-5+deb12u3
 util-linux-extra==2.38.1-5+deb12u3
diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm
index cea4b8d1bdf..968d73762b5 100644
--- a/files/build/versions/host-image/versions-deb-bookworm
+++ b/files/build/versions/host-image/versions-deb-bookworm
@@ -7,7 +7,7 @@ auditd==1:3.0.9-1
 bash==5.1-2
 bash-completion==1:2.11-6
 bash-tacplus==1.0.0
-bfscripts==4.9.0-13347
+bfscripts==4.11.0-13611
 binutils==2.40-2
 binutils-aarch64-linux-gnu==2.40-2
 binutils-common==2.40-2
@@ -16,24 +16,25 @@ bluefield-platform-modules==1.0
 bridge-utils==1.7.1-1
 bsdextrautils==2.38.1-5+deb12u3
 bsdmainutils==12.1.8
-busybox==1:1.35.0-4+b3
-ca-certificates==20230311
+busybox==1:1.35.0-4+b4
+ca-certificates==20230311+deb12u1
 cgroup-tools==2.0.2-2
+chrony==4.3-2+deb12u1
 conntrack==1:1.4.7-1+b2
 containerd.io==1.6.21-1
 cpio==2.13+dfsg-7.1
 cpp==4:12.2.0-3
-cpp-12==12.2.0-14
+cpp-12==12.2.0-14+deb12u1
 cron==3.0pl1-162
 cron-daemon-common==3.0pl1-162
-curl==7.88.1-10+deb12u8
+curl==7.88.1-10+deb12u12
 dbus==1.14.10-1~deb12u1
 dbus-bin==1.14.10-1~deb12u1
 dbus-daemon==1.14.10-1~deb12u1
 dbus-session-bus-common==1.14.10-1~deb12u1
 dbus-system-bus-common==1.14.10-1~deb12u1
 device-tree-compiler==1.6.1-4+b1
-distro-info-data==0.58+deb12u3
+distro-info-data==0.58+deb12u4
 dmidecode==3.4-1
 dmsetup==2:1.02.185-2
 docker-ce==5:24.0.2-1~debian.12~bookworm
@@ -54,7 +55,7 @@ fontconfig-config==2.14.1-4
 fonts-dejavu-core==2.37-6
 freeipmi-common==1.6.10-1
 gcc==4:12.2.0-3
-gcc-12==12.2.0-14
+gcc-12==12.2.0-14+deb12u1
 gdisk==1.0.9-2.1
 gettext-base==0.21-12
 gir1.2-glib-2.0==1.74.0-3
@@ -65,14 +66,13 @@ grub2-common==2.06-13+deb12u1
 haveged==1.9.14-1+b1
 hdparm==9.65+ds-1
 hping3==3.a2.ds2-10
-hw-management==1.mlnx.7.0040.2000
+hw-management==1.mlnx.7.0040.4001
 i2c-tools==4.3-2+b3
-icu-devtools==72.1-3
+icu-devtools==72.1-3+deb12u1
 ifmetric==0.3-5
 ifupdown2==3.0.0-1
 initramfs-tools==0.142
 initramfs-tools-core==0.142
-ionic-modules==22.11.1-001
 ipmitool==1.8.19-4+deb12u2
 iproute2==6.1.0-3
 iptables==1.8.9-2
@@ -82,19 +82,19 @@ isc-dhcp-client==4.4.3-P1-2
 j2cli==0.3.12b-4
 jq==1.6-2.1
 kdump-tools==1:1.8.1
-kernel-mft-dkms-modules-6.1.0-22-2-amd64==4.30.2
-kernel-mft-dkms-modules-6.1.0-22-2-arm64==4.28.0
+kernel-mft-dkms-modules-6.1.0-29-2-amd64==4.32.0
+kernel-mft-dkms-modules-6.1.0-29-2-arm64==4.32.0
 kexec-tools==1:2.0.25-3+deb12u1
 klibc-utils==2.0.12-1
 kmod==30+20221128-1
 ldap-utils==2.5.13+dfsg-5
 less==590-2.1~deb12u2
-libabsl20220623==20220623.1-1
+libabsl20220623==20220623.1-1+deb12u2
 libapparmor1==3.0.8-3
 libargon2-1==0~20171227-0.3+deb12u1
-libasan8==12.2.0-14
+libasan8==12.2.0-14+deb12u1
 libassuan0==2.5.5-5
-libatomic1==12.2.0-14
+libatomic1==12.2.0-14+deb12u1
 libauparse0==1:3.0.9-1
 libavahi-client3==0.8-10+deb12u1
 libavahi-common-data==0.8-10+deb12u1
@@ -106,19 +106,19 @@ libbpf1==1:1.1.0-1
 libbrotli1==1.0.9-2+b6
 libbsd0==0.11.7-2
 libc-ares2==1.18.1-3
-libc-dev-bin==2.36-9+deb12u9
-libc-l10n==2.36-9+deb12u9
-libc6-dev==2.36-9+deb12u9
-libcap2-bin==1:2.66-4
+libc-dev-bin==2.36-9+deb12u10
+libc-l10n==2.36-9+deb12u10
+libc6-dev==2.36-9+deb12u10
+libcap2-bin==1:2.66-4+deb12u1
 libcbor0.8==0.8.0-2+b1
-libcc1-0==12.2.0-14
+libcc1-0==12.2.0-14+deb12u1
 libcgroup2==2.0.2-2
 libcrack2==2.9.6-5+b1
 libcrypt-dev==1:4.4.33-2
 libcryptsetup12==2:2.6.1-4~deb12u2
 libctf-nobfd0==2.40-2
 libctf0==2.40-2
-libcurl4==7.88.1-10+deb12u8
+libcurl4==7.88.1-10+deb12u12
 libdashapi==1.0.0
 libdbd-sqlite3-perl==1.72-1
 libdbi-perl==1.643-4
@@ -138,45 +138,45 @@ libfdt1==1.6.1-4+b1
 libffi-dev==3.4.4-1
 libfido2-1==1.12.0-2+b1
 libfreeipmi17==1.6.10-1+b1
-libfreetype6==2.12.1+dfsg-5+deb12u3
+libfreetype6==2.12.1+dfsg-5+deb12u4
 libfuse2==2.9.9-6+b1
-libgcc-12-dev==12.2.0-14
+libgcc-12-dev==12.2.0-14+deb12u1
 libgdbm-compat4==1.23-3
 libgdbm6==1.23-3
 libgirepository-1.0-1==1.74.0-3
-libglib2.0-0==2.74.6-2+deb12u5
-libgomp1==12.2.0-14
+libglib2.0-0==2.74.6-2+deb12u6
+libgomp1==12.2.0-14+deb12u1
 libgpm2==1.20.7-10+b1
 libgprofng0==2.40-2
 libgrpc++1.51==1.51.1-3+b1
 libgrpc29==1.51.1-3+b1
-libgssapi-krb5-2==1.20.1-2+deb12u2
+libgssapi-krb5-2==1.20.1-2+deb12u3
 libhavege2==1.9.14-1+b1
 libhiredis0.14==0.14.1-3
-libhwasan0==12.2.0-14
+libhwasan0==12.2.0-14+deb12u1
 libi2c0==4.3-2+b3
-libicu-dev==72.1-3
-libicu72==72.1-3
+libicu-dev==72.1-3+deb12u1
+libicu72==72.1-3+deb12u1
 libiio-utils==0.24-4
 libiio0==0.24-4
 libiniparser1==4.1-6
 libip4tc2==1.8.9-2
 libip6tc2==1.8.9-2
 libisl23==0.25-1.1
-libitm1==12.2.0-14
+libitm1==12.2.0-14+deb12u1
 libjansson4==2.14-2
 libjq1==1.6-2.1
 libjs-jquery==3.6.1+dfsg+~3.5.14-1
 libjson-c5==0.16-2
-libk5crypto3==1.20.1-2+deb12u2
+libk5crypto3==1.20.1-2+deb12u1+fips
 libkeyutils1==1.6.3-2
 libklibc==2.0.12-1
 libkmod2==30+20221128-1
-libkrb5-3==1.20.1-2+deb12u2
-libkrb5support0==1.20.1-2+deb12u2
+libkrb5-3==1.20.1-2+deb12u3
+libkrb5support0==1.20.1-2+deb12u3
 libldap-2.5-0==2.5.13+dfsg-5
 liblognorm5==2.0.6-4
-liblsan0==12.2.0-14
+liblsan0==12.2.0-14+deb12u1
 liblua5.1-0==5.1.5-9
 liblzo2-2==2.10-2
 libmagic-mgc==1:5.44-3
@@ -213,7 +213,7 @@ libpam-tacplus==1.4.1-1
 libpcap0.8==1.10.3-1
 libpci3==1:3.9.0-4
 libpcre3==2:8.39-15
-libperl5.36==5.36.0-7+deb12u1
+libperl5.36==5.36.0-7+deb12u2
 libpgm-5.3-0==5.3.128~dfsg-2
 libpng16-16==1.6.39-2
 libpopt0==1.19+dfsg-1
@@ -225,10 +225,10 @@ libpsl5==0.21.2-1
 libpwquality-common==1.4.5-1
 libpwquality1==1.4.5-1+b1
 libpython3-stdlib==3.11.2-1+b1
-libpython3.11==3.11.2-6+deb12u5
-libpython3.11-minimal==3.11.2-6+deb12u5
-libpython3.11-stdlib==3.11.2-6+deb12u5
-libquadmath0==12.2.0-14
+libpython3.11==3.11.2-6+fips
+libpython3.11-minimal==3.11.2-6+fips
+libpython3.11-stdlib==3.11.2-6+fips
+libquadmath0==12.2.0-14+deb12u1
 libre2-9==20220601+dfsg-1+b1
 libreadline8==8.2-1.3
 librtmp1==2.4+20151223.gitfa8646d.1-2+b2
@@ -240,38 +240,40 @@ libslang2==2.3.3-3
 libsodium23==1.0.18-1
 libsqlite3-0==3.40.1-2+deb12u1
 libssh2-1==1.10.0-3+b1
-libssl-dev==3.0.15-1~deb12u1
-libssl3==3.0.15-1~deb12u1
+libssl-dev==3.0.11-1~deb12u2+fips
+libssl3==3.0.11-1~deb12u2+fips
 libswsscommon==1.0.0
 libsysfs2==2.1.1-4
-libsystemd-shared==252.33-1~deb12u1
+libsystemd-shared==252.38-1~deb12u1
+libsystemd0==252.38-1~deb12u1
 libtac2==1.4.1-1
 libtcl8.6==8.6.13+dfsg-2
 libtirpc-common==1.3.3+ds-1
 libtirpc-dev==1.3.3+ds-1
 libtirpc3==1.3.3+ds-1
-libtsan2==12.2.0-14
+libtsan2==12.2.0-14+deb12u1
 libubootenv-tool==0.3.2-1
 libubootenv0.1==0.3.2-1
-libubsan1==12.2.0-14
+libubsan1==12.2.0-14+deb12u1
+libudev1==252.38-1~deb12u1
 libunwind8==1.6.2-3
 libusb-1.0-0==2:1.0.26-1
 libutempter0==1.2.1-3
 libwrap0==7.6.q-32
-libxencall1==4.17.5+23-ga4e5191dc0-1
-libxendevicemodel1==4.17.5+23-ga4e5191dc0-1
-libxenevtchn1==4.17.5+23-ga4e5191dc0-1
-libxenforeignmemory1==4.17.5+23-ga4e5191dc0-1
-libxengnttab1==4.17.5+23-ga4e5191dc0-1
-libxenhypfs1==4.17.5+23-ga4e5191dc0-1
-libxenmisc4.17==4.17.5+23-ga4e5191dc0-1
-libxenstore4==4.17.5+23-ga4e5191dc0-1
-libxentoolcore1==4.17.5+23-ga4e5191dc0-1
-libxentoollog1==4.17.5+23-ga4e5191dc0-1
-libxml2==2.9.14+dfsg-1.3~deb12u1
-libxml2-dev==2.9.14+dfsg-1.3~deb12u1
-libxslt1-dev==1.1.35-1
-libxslt1.1==1.1.35-1
+libxencall1==4.17.5+23-ga4e5191dc0-1+deb12u1
+libxendevicemodel1==4.17.5+23-ga4e5191dc0-1+deb12u1
+libxenevtchn1==4.17.5+23-ga4e5191dc0-1+deb12u1
+libxenforeignmemory1==4.17.5+23-ga4e5191dc0-1+deb12u1
+libxengnttab1==4.17.5+23-ga4e5191dc0-1+deb12u1
+libxenhypfs1==4.17.5+23-ga4e5191dc0-1+deb12u1
+libxenmisc4.17==4.17.5+23-ga4e5191dc0-1+deb12u1
+libxenstore4==4.17.5+23-ga4e5191dc0-1+deb12u1
+libxentoolcore1==4.17.5+23-ga4e5191dc0-1+deb12u1
+libxentoollog1==4.17.5+23-ga4e5191dc0-1+deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u2
+libxml2-dev==2.9.14+dfsg-1.3~deb12u2
+libxslt1-dev==1.1.35-1+deb12u1
+libxslt1.1==1.1.35-1+deb12u1
 libxtables12==1.8.9-2
 libyajl2==2.1.0-3+deb12u2
 libyaml-0-2==0.2.5-1
@@ -279,52 +281,46 @@ libyang==1.0.73
 libyang-cpp==1.0.73
 libzmq5==4.3.4-6
 linux-base==4.9
-linux-image-6.1.0-22-2-amd64-unsigned==6.1.94-1
-linux-image-6.1.0-22-2-arm64-unsigned==6.1.94-1
-linux-libc-dev==6.1.124-1
-linux-perf==6.1.124-1
-locales==2.36-9+deb12u9
+linux-image-6.1.0-29-2-amd64-unsigned==6.1.123-1
+linux-image-6.1.0-29-2-arm64-unsigned==6.1.123-1
+linux-libc-dev==6.1.140-1
+linux-perf==6.1.140-1
+locales==2.36-9+deb12u10
 logrotate==3.21.0-1
 lsof==4.95.0-1
 makedev==2.3.1-97
 makedumpfile==1:1.7.2-1
 media-types==10.0.0
-mft==4.30.2-23
+mft==4.32.0-120
 mft-fwtrace-cfg==1.0.0
-mft-oem==4.30.2-23
+mft-oem==4.32.0-120
 minicom==2.8-2
-mlnx-iproute2==6.9.0-1.2407061
-mlnx-ofed-kernel-modules-6.1.0-22-2-arm64==24.07.OFED.24.07.0.6.1.1
-mlnx-ofed-kernel-utils==24.07.OFED.24.07.0.6.1.1-1
-mlnx-tools==24.07.0-1.2407061
+mlnx-iproute2==6.12.0-1.2501060
+mlnx-ofed-kernel-modules-6.1.0-29-2-arm64==25.01.OFED.25.01.0.6.0.1
+mlnx-ofed-kernel-utils==25.01.OFED.25.01.0.6.0.1-1
+mlnx-tools==25.01-0.2501060
 mlxbf-bootctl==2.1
-mlxbf-bootimages==4.9.0-13347
+mlxbf-bootimages==4.11.0-13611
 mokutil==0.6.0-2
 monit==1:5.20.0-6
 mtd-utils==1:2.1.5-1
 mtr-tiny==0.95-1
 ncal==12.1.8
 ndisc6==1.0.5-1+b2
-net-tools==2.10-0.1
+net-tools==2.10-0.1+deb12u2
 netbase==6.4
 netfilter-persistent==1.0.20
 nslcd==0.9.12-4
-ntp==1:4.2.8p15+dfsg-2~1.2.2+dfsg1-1+deb12u1
-ntpdate==1:4.2.8p15+dfsg-2~1.2.2+dfsg1-1+deb12u1
-ntpsec==1.2.2+dfsg1-1+deb12u1
-ntpsec-ntpdate==1.2.2+dfsg1-1+deb12u1
-ntpsec-ntpdig==1.2.2+dfsg1-1+deb12u1
-ntpstat==0.0.0.1-2+b1
 nvme-cli==2.4+really2.3-3
 opennsl-modules==7.1.0.0
-openssh-client==1:9.2p1-2+deb12u4
-openssh-server==1:9.2p1-2+deb12u4
-openssh-sftp-server==1:9.2p1-2+deb12u4
-openssl==3.0.15-1~deb12u1
+openssh-client==1:9.2p1-2+deb12u5+fips
+openssh-server==1:9.2p1-2+deb12u5+fips
+openssh-sftp-server==1:9.2p1-2+deb12u5+fips
+openssl==3.0.11-1~deb12u2+fips
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
-perl==5.36.0-7+deb12u1
-perl-modules-5.36==5.36.0-7+deb12u1
+perl==5.36.0-7+deb12u2
+perl-modules-5.36==5.36.0-7+deb12u2
 picocom==3.1-4
 pigz==2.6-1
 pkgconf==1.8.1-1
@@ -339,13 +335,13 @@ python3-cffi-backend==1.15.1-5+b1
 python3-cryptography==38.0.4-3+deb12u1
 python3-dbus==1.3.2-4+b1
 python3-distutils==3.11.2-3
-python3-jinja2==3.1.2-1+deb12u1
+python3-gi==3.42.2-3+b1
+python3-jinja2==3.1.2-1+deb12u2
 python3-lib2to3==3.11.2-3
 python3-m2crypto==0.38.0-4+b1
 python3-markupsafe==2.1.2-1+b1
 python3-minimal==3.11.2-1+b1
 python3-nacl==1.5.0-2
-python3-ntp==1.2.2+dfsg1-1+deb12u1
 python3-pip==23.0.1+dfsg-1
 python3-pkg-resources==66.1.1-1+deb12u1
 python3-ply==3.11-5
@@ -355,14 +351,14 @@ python3-swsscommon==1.0.0
 python3-wheel==0.38.4-2
 python3-yaml==6.0-3+b2
 python3-yang==1.0.73
-python3.11==3.11.2-6+deb12u5
-python3.11-minimal==3.11.2-6+deb12u5
+python3.11==3.11.2-6+fips
+python3.11-minimal==3.11.2-6+fips
 rasdaemon==0.6.8-1
 readline-common==8.2-1.3
 resolvconf==1.91+nmu1
 rpcsvc-proto==1.4.3-1
-rshim==2.0.40
-rsyslog==8.2302.0-1
+rshim==2.3.8
+rsyslog==8.2302.0-1+deb12u1
 runit-helper==2.15.2
 sbsigntool==0.9.4-3.1
 screen==4.9.0-4
@@ -378,33 +374,33 @@ sonic-rsyslog-plugin==1.0.0-0
 sonic-utilities-data==1.0-1
 sqlite3==3.40.1-2+deb12u1
 squashfs-tools==1:4.5.1-1
-ssh==1:9.2p1-2+deb12u3+fips
-sudo==1.9.13p3-1+deb12u1
-sx-kernel==1.mlnx.4.7.2164
+ssh==1:9.2p1-2+deb12u5+fips
+sudo==1.9.13p3-1+deb12u2
+sx-kernel==1.mlnx.4.7.4040
 symcrypt-openssl==0.1
 sysfsutils==2.1.1-4
 sysstat==12.6.1-1
-systemd==252.33-1~deb12u1
+systemd==252.38-1~deb12u1
 systemd-bootchart==234-2+b1
 systemd-sonic-generator==1.0.0
-systemd-sysv==252.33-1~deb12u1
+systemd-sysv==252.38-1~deb12u1
 tcpdump==4.99.3-1
 tcptraceroute==1.5beta7+debian-4.1+b1
 traceroute==1:2.1.2-1
 u-boot-tools==2023.01+dfsg-2+deb12u1
 ucf==3.0043+nmu1+deb12u1
-udev==252.33-1~deb12u1
+udev==252.38-1~deb12u1
 unzip==6.0-28
 usbutils==1:014-1+deb12u1
 uuid-runtime==2.38.1-5+deb12u3
-vim==2:9.0.1378-2
-vim-common==2:9.0.1378-2
-vim-runtime==2:9.0.1378-2
-wireless-regdb==2022.06.06-1
+vim==2:9.0.1378-2+deb12u2
+vim-common==2:9.0.1378-2+deb12u2
+vim-runtime==2:9.0.1378-2+deb12u2
+wireless-regdb==2025.02.20-1~deb12u1
 x11-common==1:7.7+23
 xml-core==0.18+nmu1
 xmlstarlet==1.6.1-3
-xxd==2:9.0.1378-2
-xz-utils==5.4.1-0.2
+xxd==2:9.0.1378-2+deb12u2
+xz-utils==5.4.1-1
 zlib1g-dev==1:1.2.13.dfsg-1
 zstd==1.5.4+dfsg2-5
diff --git a/files/build/versions/host-image/versions-deb-bookworm-arm64 b/files/build/versions/host-image/versions-deb-bookworm-arm64
index d82ad88387e..8260d1e41f8 100644
--- a/files/build/versions/host-image/versions-deb-bookworm-arm64
+++ b/files/build/versions/host-image/versions-deb-bookworm-arm64
@@ -1,3 +1,2 @@
 mrvlprestera==1.0
-ntpstat==0.0.0.1-2
 tsingma-bsp==1.0
diff --git a/files/build/versions/host-image/versions-deb-bookworm-armhf b/files/build/versions/host-image/versions-deb-bookworm-armhf
index 2b7299ce9be..580a4199f73 100644
--- a/files/build/versions/host-image/versions-deb-bookworm-armhf
+++ b/files/build/versions/host-image/versions-deb-bookworm-armhf
@@ -1,5 +1,3 @@
 binutils-arm-linux-gnueabihf==2.40-2
-linux-image-6.1.0-22-2-armmp==6.1.94-1
+linux-image-6.1.0-29-2-armmp==6.1.123-1
 mrvlprestera==1.0
-ntpstat==0.0.0.1-2
-python3-gi==3.42.2-3+b1
diff --git a/files/build/versions/host-image/versions-py3 b/files/build/versions/host-image/versions-py3
index 0bd13f625d6..c1082dbbeee 100644
--- a/files/build/versions/host-image/versions-py3
+++ b/files/build/versions/host-image/versions-py3
@@ -17,8 +17,8 @@ docker==7.1.0
 docker-image-py==0.1.13
 enlighten==1.13.0
 filelock==3.17.0
-grpcio==1.51.1
-grpcio-tools==1.51.1
+grpcio==1.58.0
+grpcio-tools==1.58.0
 idna==3.10
 ijson==3.2.3
 inotify==0.2.10
@@ -38,7 +38,6 @@ natsort==8.4.0
 netaddr==0.8.0
 netifaces==0.11.0
 nose==1.3.7
-ntpsec==1.2.2
 paramiko==2.11.0
 pathtools==0.1.2
 perf==0.1
@@ -48,14 +47,14 @@ ply==3.11
 prefixed==0.9.0
 prettyprinter==0.18.0
 protobuf==4.25.6
-psutil==6.1.1
+psutil==7.0.0
 ptyprocess==0.7.0
 pyang==2.6.1
 pyangbind==0.8.2
 pycairo==1.26.1
 pycparser==2.21
 pygments==2.19.1
-pygobject==3.50.0
+pygobject==3.42.2
 pynacl==1.5.0
 pyroute2==0.7.12
 python-apt==2.6.0
@@ -69,8 +68,10 @@ scp==0.14.5
 semantic-version==2.10.0
 setuptools==66.1.1
 six==1.16.0
+smbus2==0.5.0
 systemd-python==235
 tabulate==0.9.0
+telnetlib3==2.0.4
 toposort==1.6
 urllib3==2.3.0
 watchdog==0.10.3
diff --git a/files/build/versions/host-image/versions-py3-all-arm64 b/files/build/versions/host-image/versions-py3-all-arm64
deleted file mode 100644
index c35f5e74ff2..00000000000
--- a/files/build/versions/host-image/versions-py3-all-arm64
+++ /dev/null
@@ -1 +0,0 @@
-protobuf==5.29.3
diff --git a/files/build/versions/host-image/versions-py3-all-armhf b/files/build/versions/host-image/versions-py3-all-armhf
index dce2a2bae64..c35f5e74ff2 100644
--- a/files/build/versions/host-image/versions-py3-all-armhf
+++ b/files/build/versions/host-image/versions-py3-all-armhf
@@ -1,2 +1 @@
 protobuf==5.29.3
-pygobject==3.42.2
diff --git a/files/build_templates/arp_update_vars.j2 b/files/build_templates/arp_update_vars.j2
index d17f17ac884..629c8b07042 100644
--- a/files/build_templates/arp_update_vars.j2
+++ b/files/build_templates/arp_update_vars.j2
@@ -1,9 +1,10 @@
 {
     "switch_type": "{% if DEVICE_METADATA and 'localhost' in DEVICE_METADATA and 'switch_type' in DEVICE_METADATA['localhost'] %}{{ DEVICE_METADATA['localhost']['switch_type'] }}{%endif %}",
+    "type": "{% if DEVICE_METADATA and 'localhost' in DEVICE_METADATA and 'type' in DEVICE_METADATA['localhost'] %}{{ DEVICE_METADATA['localhost']['type'] }}{%endif %}",
     "interface": "{% for (name, prefix) in INTERFACE|pfx_filter %}{% if prefix|ipv6 %}{{ name }} {% endif %}{% endfor %}",
     "pc_interface" : "{% for (name, prefix) in PORTCHANNEL_INTERFACE|pfx_filter %}{% if prefix|ipv6 %}{{ name }} {% endif %}{% endfor %}",
     "vlan_sub_interface": "{% for (name, prefix) in VLAN_SUB_INTERFACE|pfx_filter %}{% if prefix|ipv6 %}{{ name }} {% endif %}{% endfor %}",
     "vlan" : "{% if VLAN %}{{ VLAN.keys() | join(' ') }}{% endif %}",
-    "static_route_nexthops": "{% if STATIC_ROUTE %}{% for static_route_prefix, static_route_attr in STATIC_ROUTE.items() %}{%- if static_route_prefix -%}{{ static_route_attr['nexthop'].split(',') | join(' ') | lower + " " }}{%- endif -%}{% endfor %}{% endif %}",
+    "static_route_nexthops": "{% if STATIC_ROUTE %}{% for static_route_prefix, static_route_attr in STATIC_ROUTE.items() %}{%- if static_route_prefix and 'nexthop' in static_route_attr -%}{{ static_route_attr['nexthop'].split(',') | join(' ') | lower + " " }}{%- endif -%}{% endfor %}{% endif %}",
     "static_route_ifnames": "{% if STATIC_ROUTE %}{% for static_route_prefix, static_route_attr in STATIC_ROUTE.items() %}{%- if static_route_prefix and 'ifname' in static_route_attr -%}{{ static_route_attr['ifname'].split(',') | join(' ') + " " }}{%- endif -%}{% endfor %}{% endif %}"
 }
diff --git a/files/build_templates/buffers_config.j2 b/files/build_templates/buffers_config.j2
index 76cab5d0f8e..22480df9bc4 100644
--- a/files/build_templates/buffers_config.j2
+++ b/files/build_templates/buffers_config.j2
@@ -9,16 +9,30 @@ def
 {# Determine device topology and filename postfix #}
 {%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost']['type'] is defined %}
 {%-     set switch_role = DEVICE_METADATA['localhost']['type'] %}
+{%  if DEVICE_METADATA['localhost']['subtype'] is defined %}
+{%-     set switch_subrole = DEVICE_METADATA['localhost']['subtype'] %}
+{%- else %}
+{%-     set switch_subrole = '' %}
+{%- endif %}
 {%-     if 'torrouter' in switch_role.lower() and 'mgmt' not in switch_role.lower()%}
 {%-         set filename_postfix = 't0' %}
 {%-     elif 'leafrouter' in switch_role.lower() and 'mgmt' not in switch_role.lower()%}
 {%-         set filename_postfix = 't1' %}
+{%-     elif 'spinerouter' in switch_role.lower() and 'mgmt' not in switch_role.lower()%}
+    {%-     if 'lowerspinerouter' == switch_subrole.lower() %}
+    {%-         set filename_postfix = 'lt2' %}
+    {%-     elif 'fabricspinerouter' == switch_role.lower() %}
+    {%-         set filename_postfix = 'ft2' %}
+    {%-     else %}
+    {%-         set filename_postfix = 't2' %}
+    {%-     endif -%}
 {%-     else %}
 {%-         set filename_postfix = set_default_topology() %}
-{%-     endif %}
+{%-     endif -%}
 {%- else %}
-{%-     set filename_postfix = set_default_topology() %}
-{%-     set switch_role      = '' %}
+{%-         set filename_postfix = set_default_topology() %}
+{%-         set switch_role      = '' %}
+{%-         set switch_subrole   = '' %}
 {%- endif -%}
 
 {% set voq_chassis = false %}
@@ -26,10 +40,12 @@ def
 {%-  set voq_chassis = true %}
 {%- endif -%}
 
-{# Import default values from device HWSKU folder #}
-{%- import 'buffers_defaults_%s.j2' % filename_postfix as defs with context %}
-
-{%- set default_cable = defs.default_cable -%}
+{# Allow includer to pre-package defs without needing an import #}
+{%- if defs is not defined -%}
+    {# Import default values from device HWSKU folder #}
+    {%- import 'buffers_defaults_%s.j2' % filename_postfix as defs with context %}
+    {%- set default_cable = defs.default_cable -%}
+{%- endif -%}
 
 {# Port configuration to cable length look-up table #}
 {# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #}
@@ -48,6 +64,7 @@ def
     -%}
 {%- endif %}
 
+{%- if cable_length is not defined %}
 {%- macro cable_length(port_name) %}
     {%- set cable_len = [] %}
     {%- for local_port in DEVICE_NEIGHBOR %}
@@ -84,7 +101,12 @@ def
     {%- elif cable_len -%}
         {{ cable_len.0 }}
     {%- else %}
-        {%- if 'torrouter' in switch_role.lower() and 'mgmt' not in switch_role.lower()%}
+        {%- if port_name.startswith('Ethernet-BP') %}
+            {%- if 'internal' not in ports2cable %}
+                {%- set _ = ports2cable.update({'internal': '5m'}) %}
+            {%- endif -%}
+            {%- set _ = cable_len.append(ports2cable['internal']) %}
+        {%- elif 'torrouter' in switch_role.lower() and 'mgmt' not in switch_role.lower()%}
             {%- for local_port in VLAN_MEMBER %}
                 {%- if local_port[1] == port_name %}
                     {%- set roles3 = switch_role + '_' + 'server' %}
@@ -95,23 +117,15 @@ def
                     {%- endif %}
                 {%- endif %}
             {%- endfor %}
-            {%- if cable_len -%}
-                {{ cable_len.0 }}
-            {%- else -%}
-                {{ default_cable }}
-            {%- endif %}
+        {%- endif %}
+        {%- if cable_len -%}
+            {{ cable_len.0 }}
         {%- else -%}
-            {%- if port_name.startswith('Ethernet-BP') %}
-                {%- if 'internal' not in ports2cable %}
-                    {%- set _ = ports2cable.update({'internal': '5m'}) %}
-                {%- endif -%}
-                {{ ports2cable['internal'] }}
-            {%- else -%}
-                {{ default_cable }}
-            {%- endif %}
+            {{ default_cable }}
         {%- endif %}
     {%- endif %}
 {%- endmacro %}
+{%- endif %}
 
 {%- set PORT_ALL  = [] %}
 {%- set PORT_BP  = [] %}
@@ -195,7 +209,16 @@ def
     {%- if port_names_list_inactive.append(port) %}{%- endif %}
 {%- endfor %}
 {%- set port_names_inactive  = port_names_list_inactive  | join(',') %}
+
 {
+{% if (defs.generate_cable_length_config is defined) %}
+    {%- set port_names_list_all  = [] %}
+    {%- for port in PORT_ALL %}
+        {%- if port_names_list_all.append(port) %}{%- endif %}
+    {%- endfor %}
+    {%- set port_names_all  = port_names_list_all  | join(',') %}
+    {{- defs.generate_cable_length_config(port_names_all) }}
+{% else %}
     "CABLE_LENGTH": {
         "AZURE": {
     {% for port in PORT_ALL %}
@@ -205,6 +228,7 @@ def
     {% endfor %}
     }
     },
+{% endif %}
 
 {% if defs.generate_buffer_pool_and_profiles is defined %}
 {{ defs.generate_buffer_pool_and_profiles() }}
diff --git a/files/build_templates/default_manifest b/files/build_templates/default_manifest
index f6821b4ef48..27a4b8010ee 100644
--- a/files/build_templates/default_manifest
+++ b/files/build_templates/default_manifest
@@ -52,9 +52,9 @@
         "show": [],
         "config": [],
         "clear": [],
-        "auto-generate-show": false,
-        "auto-generate-config": false,
-        "auto-generate-show-source-yang-modules": [],
-        "auto-generate-config-source-yang-modules": []
+        "auto-generate-show": true,
+        "auto-generate-config": true,
+        "auto-generate-show-source-yang-modules": [sonic-fine-grained-ecmp],
+        "auto-generate-config-source-yang-modules": [sonic-fine-grained-ecmp]
     }
 }
diff --git a/files/build_templates/dhcp_relay.service.j2 b/files/build_templates/dhcp_relay.service.j2
index d87186e4dce..bd99940ab15 100644
--- a/files/build_templates/dhcp_relay.service.j2
+++ b/files/build_templates/dhcp_relay.service.j2
@@ -4,7 +4,6 @@ Requires=config-setup.service
 After=config-setup.service swss.service syncd.service teamd.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 StartLimitIntervalSec=1200
 StartLimitBurst=3
 
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 8377b5346a6..3fb74cac91f 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -111,7 +111,12 @@ function preStartAction()
         systemctl stop watchdog-control.service
     fi
 {%- elif docker_container_name == "snmp" %}
-    $SONIC_DB_CLI STATE_DB HSET 'DEVICE_METADATA|localhost' chassis_serial_number $(decode-syseeprom -s)
+    if decode-syseeprom -s > /dev/null 2>&1; then
+        $SONIC_DB_CLI STATE_DB HSET 'DEVICE_METADATA|localhost' chassis_serial_number $(decode-syseeprom -s)
+    else
+        echo "Cannot fetch system eeprom information. Setting chassis serial number to N/A."
+        $SONIC_DB_CLI STATE_DB HSET 'DEVICE_METADATA|localhost' chassis_serial_number "N/A"
+    fi
 {%- else %}
     : # nothing
 {%- endif %}
@@ -166,6 +171,7 @@ function waitForAllInstanceDatabaseConfigJsonFilesReady()
 function postStartAction()
 {
 {%- if docker_container_name == "database" %}
+    midplane_ip=""
     CHASSISDB_CONF="/usr/share/sonic/device/$PLATFORM/chassisdb.conf"
     [ -f $CHASSISDB_CONF ] && source $CHASSISDB_CONF
     if [[ "$DEV" && $DATABASE_TYPE != "dpudb" ]]; then
@@ -201,12 +207,27 @@ function postStartAction()
            ip link set dev ns-eth1"$NET_NS" netns "$NET_NS"
            ip netns exec "$NET_NS" ip link set ns-eth1"$NET_NS" name eth1
 
+           if [[ -n "$lc_ip_offset" ]]; then
+	       # Use ip offset provided by platform vendor via chassisdb.conf to prevent any conflict
+	       # with any platform IP range, e.g., LC eth1-midplane IP.
+               ip_offset=$lc_ip_offset
+           else
+	       # If Vendor has not provided an ip offset, Use 10 as default offset. Platform vendor should
+	       # ensure there is no conflict with platform IP range for any slot.
+               ip_offset=10
+           fi
+
            # Configure IP address and enable eth1
-           slot_ip_address=`echo $midplane_subnet | awk -F. '{print $1 "." $2}'`.$slot_id.$(($DEV + 10))
+           slot_ip_address=`echo $midplane_subnet | awk -F. '{print $1 "." $2}'`.$slot_id.$(($DEV + $ip_offset))
            slot_subnet_mask=${midplane_subnet#*/}
            ip netns exec "$NET_NS" ip addr add $slot_ip_address/$slot_subnet_mask dev eth1
            ip netns exec "$NET_NS" ip link set dev eth1 up
 
+           # Don't run for supervisor
+           if [[ "${slot_id}" != "${supervisor_slot_id}" ]]; then
+                   midplane_ip=$slot_ip_address
+           fi
+
            # Allow localnet routing on the new interfaces if midplane is using a
            # subnet in the 127/8 range.
            if [[ "${midplane_subnet#127}" != "$midplane_subnet" ]]; then
@@ -283,7 +304,7 @@ function postStartAction()
         fi
 
         # In SUP, enforce CHASSIS_APP_DB.tsa_enabled to be in sync with BGP_DEVICE_GLOBAL.STATE.tsa_enabled
-        if [[ -z "$DEV" ]] && [[ -f /etc/sonic/chassisdb.conf ]]; then
+        if [[ -z "$DEV" ]] && [[ -f /etc/sonic/chassisdb.conf ]] && [[ $disaggregated_chassis -ne 1 ]]; then
            tsa_cfg="$($SONIC_DB_CLI CONFIG_DB HGET "BGP_DEVICE_GLOBAL|STATE" "tsa_enabled")"
            if [[ -n "$tsa_cfg" ]]; then
               docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled ${tsa_cfg}
@@ -309,6 +330,14 @@ function postStartAction()
         REDIS_SOCK="/var/run/redis-chassis/redis_chassis.sock"
     fi
     chgrp -f redis $REDIS_SOCK && chmod -f 0760 $REDIS_SOCK
+
+    if [[ $DEV && $midplane_ip ]]; then
+        IFS=_ read ip port < <(jq -r '.INSTANCES | [.redis.hostname, .redis.port] | join("_")' /var/run/redis$DEV/sonic-db/database_config.json)
+        bound_ips=$(redis-cli --raw -h $ip -p $port config get bind | sed -n '2,2 p')
+        redis-cli -h $ip -p $port config set bind "$bound_ips $midplane_ip"
+        redis-cli -h $ip -p $port config rewrite
+    fi
+
 {%- elif docker_container_name == "swss" %}
     # Wait until swss container state is Running
     until [[ ($(docker inspect -f {{"'{{.State.Running}}'"}} swss$DEV) == "true") ]]; do
@@ -349,6 +378,7 @@ function postStartAction()
 {%- else %}
     : # nothing
 {%- endif %}
+    /etc/resolvconf/update-libc.d/update-containers ${DOCKERNAME} &
 }
 
 start() {
@@ -379,6 +409,7 @@ start() {
         source $PLATFORM_ENV_CONF
     fi
 
+
     {%- if sonic_asic_platform == "broadcom" %}
     {%- if docker_container_name == "syncd" %}
     # Set the SYNCD_SHM_SIZE if this variable not defined
@@ -546,6 +577,11 @@ start() {
     else
         DB_OPT=$DB_OPT" --add-host=redis_chassis.server:$chassis_db_address "
     fi
+    {%- elif docker_container_name == "dash-ha" %}
+    REDIS_MNT="-v /var/run/redis:/var/run/redis:rw"
+    REDIS_MNT=$REDIS_MNT" -v /var/run/redis$DEV:/var/run/redis$DEV:rw "
+    {%- else %}
+    REDIS_MNT="-v /var/run/redis$DEV:/var/run/redis:rw"
     {%- endif %}
 
     if [[ -z "$DEV" || $DATABASE_TYPE == "dpudb" ]]; then
@@ -560,6 +596,7 @@ start() {
         # redis_dir_list is a string of form "/var/run/redis0/ /var/run/redis1/ /var/run/redis2/"
 
         {%- if docker_container_name != "database" %}
+
         if [ -n "$redis_dir_list" ]; then
             for redis_dir in $redis_dir_list
             do
@@ -589,7 +626,7 @@ start() {
         if [ -n "$redis_dir_list" ]; then
             id=`expr $DEV + 1`
             redis_dir=`echo $redis_dir_list | cut -d " " -f $id`
-            REDIS_MNT=" -v $redis_dir:$redis_dir:rw "
+            REDIS_MNT=$REDIS_MNT" -v $redis_dir:$redis_dir:rw "
         fi
 
         {%- if docker_container_name == "database" %}
@@ -618,9 +655,9 @@ start() {
     # TODO: Mellanox will remove the --tmpfs exception after SDK socket path changed in new SDK version
 {%- if docker_container_name == "pmon" %}
     if [[ $NUM_DPU -gt 0 ]]; then
-        SMARTSWITCH_MNT= " -v /var/run/dbus/system_bus_socket:/var/run/dbus/system_bus_socket"
+        SMARTSWITCH_MNT=" -v /var/run/dbus/system_bus_socket:/var/run/dbus/system_bus_socket"
     else
-        SMARTSWITCH_MNT= ""
+        SMARTSWITCH_MNT=""
     fi
 {%- endif %}
 {%- endif %}
@@ -645,6 +682,7 @@ start() {
         -v /tmp/nv-syncd-shared/:/tmp \
         -v /dev/shm:/dev/shm:rw \
         -v /var/log/sai_failure_dump:/var/log/sai_failure_dump:rw \
+        -v /usr/bin/asic_detect:/usr/bin/asic_detect:rw \
         -e SX_API_SOCKET_FILE=/var/run/sx_sdk/sx_api.sock \
 {%- elif docker_container_name == "pmon" %}
         -v /var/run/hw-management:/var/run/hw-management:rw \
@@ -660,9 +698,14 @@ start() {
 {%- endif %}
 {%- endif %}
 {%- endif %}
+{%- if sonic_asic_platform == "nvidia-bluefield" %}
+{%- if docker_container_name == "syncd" %}
+        -v /usr/bin/asic_detect:/usr/bin/asic_detect:rw \
+{%- endif %}
+{%- endif %}
 {%- if sonic_asic_platform == "broadcom" %}
 {%- if docker_container_name == "syncd" %}
-        --shm-size=${SYNCD_SHM_SIZE:-64m} \
+        --shm-size=${SYNCD_SHM_SIZE:-512m} \
         -v /var/run/docker-syncd$DEV:/var/run/sswsyncd \
 {%- endif %}
 {%- endif %}
@@ -681,7 +724,6 @@ start() {
 {%- if docker_container_name == "database" %}
         $DB_OPT \
 {%- else %}
-        -v /var/run/redis$DEV:/var/run/redis:rw \
         -v /var/run/redis-chassis:/var/run/redis-chassis:ro \
         -v /usr/share/sonic/device/$PLATFORM/$HWSKU/$DEV:/usr/share/sonic/hwsku:ro \
 {%- endif %}
@@ -708,6 +750,8 @@ start() {
 {%- if docker_container_name == "gbsyncd" %}
         -v /var/run/docker-syncd$DEV:/var/run/sswsyncd \
         "docker-$GBSYNCD_PLATFORM":latest \
+{%- elif docker_image_reference is defined and docker_image_reference is not none %}
+        {{docker_image_reference}} \
 {%- elif docker_image_name is defined %}
         {{docker_image_name}}:latest \
 {%- else %}
diff --git a/files/build_templates/gnmi.service.j2 b/files/build_templates/gnmi.service.j2
index 7710a8fd0d0..3959640131c 100644
--- a/files/build_templates/gnmi.service.j2
+++ b/files/build_templates/gnmi.service.j2
@@ -2,7 +2,6 @@
 Description=GNMI container
 Requires=database.service
 After=database.service swss.service syncd.service
-Before=ntp-config.service
 BindsTo=sonic.target
 After=sonic.target
 StartLimitIntervalSec=1200
diff --git a/files/build_templates/lldp.service.j2 b/files/build_templates/lldp.service.j2
deleted file mode 120000
index 1adb318b915..00000000000
--- a/files/build_templates/lldp.service.j2
+++ /dev/null
@@ -1 +0,0 @@
-per_namespace/lldp.service.j2
\ No newline at end of file
diff --git a/files/build_templates/mgmt-framework.service.j2 b/files/build_templates/mgmt-framework.service.j2
index ff99afe62bc..b6b6968210d 100644
--- a/files/build_templates/mgmt-framework.service.j2
+++ b/files/build_templates/mgmt-framework.service.j2
@@ -4,7 +4,6 @@ Requires=database.service
 After=database.service swss.service syncd.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 
 [Service]
 User={{ sonicadmin_user }}
diff --git a/files/build_templates/mux.service.j2 b/files/build_templates/mux.service.j2
index 6e54f137e0a..4e8bf092639 100644
--- a/files/build_templates/mux.service.j2
+++ b/files/build_templates/mux.service.j2
@@ -8,6 +8,7 @@ StartLimitIntervalSec=1200
 StartLimitBurst=3
 
 [Service]
+TimeoutStartSec=180
 User={{ sonicadmin_user }}
 ExecStartPre=/usr/local/bin/write_standby.py
 ExecStartPre=/usr/local/bin/mark_dhcp_packet.py
diff --git a/files/build_templates/nat.service.j2 b/files/build_templates/nat.service.j2
index 095bcd40cf4..507c6de76d1 100644
--- a/files/build_templates/nat.service.j2
+++ b/files/build_templates/nat.service.j2
@@ -4,7 +4,6 @@ Requires=config-setup.service
 After=config-setup.service swss.service syncd.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 StartLimitIntervalSec=1200
 StartLimitBurst=3
 
diff --git a/files/build_templates/p4rt.service.j2 b/files/build_templates/p4rt.service.j2
index b4adce5332d..5a06a02c215 100644
--- a/files/build_templates/p4rt.service.j2
+++ b/files/build_templates/p4rt.service.j2
@@ -4,7 +4,6 @@ Requires=database.service
 After=database.service swss.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 StartLimitIntervalSec=1200
 StartLimitBurst=3
 
diff --git a/files/build_templates/per_namespace/bgp.service.j2 b/files/build_templates/per_namespace/bgp.service.j2
index 52d7d108460..2b8497265bc 100644
--- a/files/build_templates/per_namespace/bgp.service.j2
+++ b/files/build_templates/per_namespace/bgp.service.j2
@@ -6,7 +6,6 @@ Requires=config-setup.service
 After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 After=swss{% if multi_instance == 'true' %}@%i{% endif %}.service
 After=interfaces-config.service
 StartLimitIntervalSec=1200
diff --git a/files/build_templates/per_namespace/dash-ha.service.j2 b/files/build_templates/per_namespace/dash-ha.service.j2
new file mode 100644
index 00000000000..10700e1cf18
--- /dev/null
+++ b/files/build_templates/per_namespace/dash-ha.service.j2
@@ -0,0 +1,19 @@
+[Unit]
+Description=DASH HA container
+Requires=database{% if multi_instance == 'true' %}@%i{% endif %}.service config-setup.service swss.service
+After=database{% if multi_instance == 'true' %}@%i{% endif %}.service swss.service interfaces-config.service
+BindsTo=sonic.target
+After=sonic.target
+Before=ntp-config.service
+StartLimitIntervalSec=1200
+StartLimitBurst=3
+
+[Service]
+User={{ sonicadmin_user }}
+ExecStartPre=/usr/local/bin/{{docker_container_name}}.sh start{% if multi_instance == 'true' %} %i{% endif %}
+ExecStart=/usr/local/bin/{{docker_container_name}}.sh wait{% if multi_instance == 'true' %} %i{% endif %}
+ExecStop=/usr/local/bin/{{docker_container_name}}.sh stop{% if multi_instance == 'true' %} %i{% endif %}
+RestartSec=30
+
+[Install]
+WantedBy=sonic.target
diff --git a/files/build_templates/per_namespace/gbsyncd.service.j2 b/files/build_templates/per_namespace/gbsyncd.service.j2
index 7a6de8c7d1e..876161c65df 100644
--- a/files/build_templates/per_namespace/gbsyncd.service.j2
+++ b/files/build_templates/per_namespace/gbsyncd.service.j2
@@ -7,7 +7,6 @@ After=interfaces-config.service
 After=swss{% if multi_instance == 'true' %}@%i{% endif %}.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 
 [Service]
 User=root
diff --git a/files/build_templates/per_namespace/lldp.service.j2 b/files/build_templates/per_namespace/lldp.service.j2
index 95d938472ea..ac8f4ae7661 100644
--- a/files/build_templates/per_namespace/lldp.service.j2
+++ b/files/build_templates/per_namespace/lldp.service.j2
@@ -10,7 +10,6 @@ BindsTo=sonic.target
 After=sonic.target
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 StartLimitIntervalSec=1200
 StartLimitBurst=3
 
diff --git a/files/build_templates/per_namespace/swss.service.j2 b/files/build_templates/per_namespace/swss.service.j2
index b0560aabc57..9e07f78d79d 100644
--- a/files/build_templates/per_namespace/swss.service.j2
+++ b/files/build_templates/per_namespace/swss.service.j2
@@ -13,7 +13,6 @@ Requires=config-setup.service
 After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 StartLimitIntervalSec=1200
 StartLimitBurst=3
 
diff --git a/files/build_templates/per_namespace/syncd.service.j2 b/files/build_templates/per_namespace/syncd.service.j2
index 842eaebc756..5a3e4891a3b 100644
--- a/files/build_templates/per_namespace/syncd.service.j2
+++ b/files/build_templates/per_namespace/syncd.service.j2
@@ -18,7 +18,6 @@ Requires=config-setup.service
 After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 {% if sonic_asic_platform == 'mellanox' %}
 Requires=nv-syncd-shared.service
 After=nv-syncd-shared.service
diff --git a/files/build_templates/per_namespace/teamd.service.j2 b/files/build_templates/per_namespace/teamd.service.j2
index ddf6691eae9..2ec784a483f 100644
--- a/files/build_templates/per_namespace/teamd.service.j2
+++ b/files/build_templates/per_namespace/teamd.service.j2
@@ -9,7 +9,6 @@ Requires=config-setup.service
 After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 StartLimitIntervalSec=1200
 StartLimitBurst=3
 
diff --git a/files/build_templates/pmon.service.j2 b/files/build_templates/pmon.service.j2
index b2cd75ac70a..75a997ce258 100644
--- a/files/build_templates/pmon.service.j2
+++ b/files/build_templates/pmon.service.j2
@@ -7,7 +7,6 @@ After=syncd.service
 {% endif %}
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 StartLimitIntervalSec=1200
 StartLimitBurst=3
 
diff --git a/files/build_templates/qos_config.j2 b/files/build_templates/qos_config.j2
index a7be7d59699..beae0003891 100644
--- a/files/build_templates/qos_config.j2
+++ b/files/build_templates/qos_config.j2
@@ -2,6 +2,9 @@
 {%- set PORT_BP = [] %}
 {%- set PORT_DPC  = [] %}
 {%- set SYSTEM_PORT_ALL = [] %}
+{%- set PORT_QOS_BYPASS = [] %}
+{%- set PORT_UPLINK = [] %}
+{%- set PORT_DOWNLINK = [] %}
 
 {%- set voq_chassis = false %}
 {%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost']['switch_type'] is defined and  DEVICE_METADATA['localhost']['switch_type']  == 'voq' %}
@@ -31,6 +34,9 @@
 {%- if generate_bp_port_list is defined %}
     {%- if generate_bp_port_list(PORT,PORT_BP) %} {% endif %}
 {%- endif %}
+{%- if generate_qos_bypass_port_list is defined %}
+    {%- if generate_qos_bypass_port_list(PORT_QOS_BYPASS) %} {% endif %}
+{%- endif %}
 
 {%- if PORT_ALL | sort_by_port_index %}{% endif %}
 
@@ -55,8 +61,43 @@
         {%- if PORT_ACTIVE.append(port) %}{%- endif %}
     {%- endfor %}
 {%- endif %}
+{%- set PORT_ACTIVE = PORT_ACTIVE | reject('in', PORT_QOS_BYPASS) | list %}
 {%- if PORT_ACTIVE | sort_by_port_index %}{% endif %}
 
+{# Generate uplink and downlink port lists based on router type and neighbors #}
+{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined %}
+    {%- if 'type' in DEVICE_METADATA['localhost'] and DEVICE_NEIGHBOR is defined %}
+        {%- set local_router_type = DEVICE_METADATA['localhost']['type'] %}
+        {%- for port in PORT_ACTIVE %}
+            {%- if DEVICE_NEIGHBOR.get(port) and DEVICE_NEIGHBOR[port].name is defined and DEVICE_NEIGHBOR_METADATA is defined and DEVICE_NEIGHBOR[port].name in DEVICE_NEIGHBOR_METADATA %}
+                {%- set neighbor_info = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name] %}
+                {%- if 'LeafRouter' in local_router_type %}
+                    {%- if 'ToRRouter' in neighbor_info.type %}
+                        {%- if PORT_DOWNLINK.append(port) %}{%- endif %}
+                    {%- elif 'SpineRouter' in neighbor_info.type %}
+                        {%- if PORT_UPLINK.append(port) %}{%- endif %}
+                    {%- endif %}
+                {%- elif 'ToRRouter' in local_router_type %}
+                    {%- if 'LeafRouter' in neighbor_info.type %}
+                        {%- if PORT_UPLINK.append(port) %}{%- endif %}
+                    {%- else %}
+                        {%- if PORT_DOWNLINK.append(port) %}{%- endif %}
+                    {%- endif %}
+                {%- endif %}
+            {%- else %}
+                {%- if PORT_DOWNLINK.append(port) %}{%- endif %}
+            {%- endif %}
+        {%- endfor %}
+    {%- else %}
+        {%- for port in PORT_ACTIVE %}
+            {%- if PORT_DOWNLINK.append(port) %}{%- endif %}
+        {%- endfor %}
+    {%- endif %}
+{%- endif %}
+
+{%- set port_names_downlink = PORT_DOWNLINK | join(',') -%}
+{%- set port_names_uplink = PORT_UPLINK | join(',') -%}
+
 {%- set port_names_list_active = [] %}
 {%- for port in PORT_ACTIVE %}
     {%- if port_names_list_active.append(port) %}{%- endif %}
@@ -77,6 +118,13 @@
 {% endif %}
 {%- endfor %}
 
+{%- set LOSSLESS_TC = [] %}
+{%- if generate_lossless_tc_list is defined %}
+    {{- generate_lossless_tc_list(LOSSLESS_TC) }}
+{%- else %}
+    {%- set LOSSLESS_TC = ['3','4'] %}
+{%- endif %}
+
 {%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot'] -%}
 {%- set backend_device_types = ['BackEndToRRouter', 'BackEndLeafRouter'] -%}
 {%- set apollo_resource_types = ['DL-NPU-Apollo'] -%}
@@ -120,6 +168,9 @@
         }
     },
 {% endif %}
+{% if (generate_pfc_to_queue_map is defined) %}
+    {{- generate_pfc_to_queue_map() }}
+{% else %}
     "MAP_PFC_PRIORITY_TO_QUEUE": {
         "AZURE": {
             "0": "0",
@@ -132,6 +183,7 @@
             "7": "7"
         }
     },
+{% endif %}
 {% if (generate_tc_to_queue_map is defined) and tunnel_qos_remap_enable %}
     {{- generate_tc_to_queue_map() }}
 {% elif (generate_tc_to_queue_map_per_sku is defined) %}
@@ -246,7 +298,12 @@
 {% endif %}
 {% if (generate_tc_to_dscp_map is defined) and tunnel_qos_remap_enable %}
     {{- generate_tc_to_dscp_map() }}
+{% elif (generate_tc_to_dscp_map_per_sku is defined) %}
+    {{ generate_tc_to_dscp_map_per_sku() }}
 {% endif %}
+{% if (generate_scheduler_config is defined) %}
+    {{- generate_scheduler_config() }}
+{% else %}
 {% if 'resource_type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['resource_type'] in apollo_resource_types %}
     "SCHEDULER": {
         "scheduler.0": {
@@ -299,6 +356,7 @@
         }
     },
 {% endif %}
+{% endif %}
 {% if asic_type in pfc_to_pg_map_supported_asics  %}
     "PFC_PRIORITY_TO_PRIORITY_GROUP_MAP": {
 {% if port_names_list_extra_queues|length > 0 %}
@@ -315,6 +373,18 @@
         }
     },
 {% endif %}
+{% if (generate_port_qos_map is defined) %}
+    {{- generate_port_qos_map(port_names_active) }}
+{% elif (generate_port_qos_map_per_sku is defined) and (PORT_DOWNLINK|length > 0 or PORT_UPLINK|length > 0) %}
+    "PORT_QOS_MAP": {
+        {% if port_names_downlink and port_names_downlink.strip() %}
+        {{ generate_port_qos_map_per_sku(port_names_downlink, 'downlink') }}{% if port_names_uplink and port_names_uplink.strip() %},{% endif %}
+        {% endif %}
+        {% if port_names_uplink and port_names_uplink.strip() %}
+        {{ generate_port_qos_map_per_sku(port_names_uplink, 'uplink') }}
+        {% endif %}
+    },
+{% else %}
     "PORT_QOS_MAP": {
 {% if generate_global_dscp_to_tc_map is defined %}
         {{- generate_global_dscp_to_tc_map() }}
@@ -359,9 +429,9 @@
 {% if port in port_names_list_extra_queues %}
             "pfc_enable"      : "2,3,4,6",
 {% else %}
-            "pfc_enable"      : "3,4",
+            "pfc_enable"      : "{{ LOSSLESS_TC|join(',') }}",
 {% endif %}
-            "pfcwd_sw_enable" : "3,4",
+            "pfcwd_sw_enable" : "{{ LOSSLESS_TC|join(',') }}",
 {% endif %}
 {% if port not in PORT_DPC %}
             "tc_to_pg_map"    : "AZURE",
@@ -373,6 +443,7 @@
 
 {% endfor %}
     },
+{% endif %}
 {% if generate_wred_profiles is defined %}
     {{- generate_wred_profiles() }}
 {% else %}
@@ -434,6 +505,17 @@
         }{% if not loop.last %},{% endif %}
 {% endfor %}
     }
+{% elif generate_direction_based_queue_per_sku is defined and (PORT_DOWNLINK|length > 0 or PORT_UPLINK|length > 0) %}
+    "QUEUE": {
+{% for port in PORT_DOWNLINK %}
+    {{ generate_direction_based_queue_per_sku(port, 'downlink') }}
+    {%- if not loop.last or PORT_UPLINK|length > 0 -%},{% endif %}
+{% endfor %}
+{% for port in PORT_UPLINK %}
+    {{ generate_direction_based_queue_per_sku(port, 'uplink') }}
+        {%- if not loop.last -%},{% endif %}
+{% endfor %}
+    }
 {% elif generate_single_queue_per_sku is defined %}
     "QUEUE": {
 {% for port in PORT_ACTIVE %}
@@ -441,6 +523,8 @@
         {%- if not loop.last -%},{% endif %}
 {% endfor %}
     }
+{% elif generate_queue_config is defined %}
+    {{- generate_queue_config(port_names_active) }}
 {% else %}
    "QUEUE": {
 {% if 'type' in DEVICE_METADATA['localhost'] and
diff --git a/files/build_templates/radv.service.j2 b/files/build_templates/radv.service.j2
index 4c414a83c38..4205abc0aa3 100644
--- a/files/build_templates/radv.service.j2
+++ b/files/build_templates/radv.service.j2
@@ -2,7 +2,6 @@
 Description=Router advertiser container
 Requires=config-setup.service
 After=config-setup.service swss.service syncd.service
-Before=ntp-config.service
 BindsTo=sonic.target
 After=sonic.target
 StartLimitIntervalSec=1200
diff --git a/files/build_templates/restapi.service.j2 b/files/build_templates/restapi.service.j2
index c82510238a8..49d436193ec 100644
--- a/files/build_templates/restapi.service.j2
+++ b/files/build_templates/restapi.service.j2
@@ -4,7 +4,6 @@ Requires=config-setup.service
 After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 
 [Service]
 User={{ sonicadmin_user }}
diff --git a/files/build_templates/sflow.service.j2 b/files/build_templates/sflow.service.j2
index b83e7e594be..5c78311a252 100644
--- a/files/build_templates/sflow.service.j2
+++ b/files/build_templates/sflow.service.j2
@@ -4,7 +4,6 @@ Requisite=swss.service
 After=swss.service syncd.service hostcfgd.service interfaces-config.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 StartLimitIntervalSec=1200
 StartLimitBurst=3
 
diff --git a/files/build_templates/snmp.service.j2 b/files/build_templates/snmp.service.j2
index db3ac1907f6..3b608d6e332 100644
--- a/files/build_templates/snmp.service.j2
+++ b/files/build_templates/snmp.service.j2
@@ -5,7 +5,6 @@ Requisite=swss.service
 After=config-setup.service swss.service syncd.service interfaces-config.service
 BindsTo=sonic.target
 After=sonic.target
-Before=ntp-config.service
 StartLimitIntervalSec=1200
 StartLimitBurst=3
 
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index e959fb24f93..4de5559ea34 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -77,6 +77,41 @@ else
     sudo chroot $FILESYSTEM_ROOT $DOCKER_CTL_SCRIPT start
 fi
 
+install_pip_package() {
+    pip_wheel=$1
+    if [[ -z "$pip_wheel" ]]; then
+        return
+    fi
+    sudo cp $pip_wheel $FILESYSTEM_ROOT/
+    basename_pip_wheel=$(basename -a $@)
+    sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $basename_pip_wheel
+    ( cd $FILESYSTEM_ROOT; sudo rm -f $basename_pip_wheel )
+}
+
+install_deb_package() {
+    deb_packages=$@
+    if [[ -z "$deb_packages" ]]; then
+        return
+    fi
+    sudo cp $deb_packages $FILESYSTEM_ROOT/
+    basename_deb_packages=$(basename -a $@)
+    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT dpkg -i $basename_deb_packages || \
+        sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+    ( cd $FILESYSTEM_ROOT; sudo rm -f $basename_deb_packages )
+}
+
+install_deb_package_lazy() {
+    deb_packages=$@
+    if [[ -z "$deb_packages" ]]; then
+        return
+    fi
+    sudo cp $deb_packages $FILESYSTEM_ROOT/
+    basename_deb_packages=$(basename -a $@)
+    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT dpkg -i $basename_deb_packages || \
+        sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f --download-only
+    ( cd $FILESYSTEM_ROOT; sudo rm -f $basename_deb_packages )
+}
+
 # Update apt's snapshot of its repos
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get update
 
@@ -100,8 +135,7 @@ sudo mkdir -p $FILESYSTEM_ROOT_USR_SHARE_SONIC_FIRMWARE/
 sudo mkdir -p $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
 
 # Install sonic-nettools
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-nettools_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/sonic-nettools_*.deb
 sudo setcap 'cap_net_raw=+ep' $FILESYSTEM_ROOT/usr/bin/wol
 
 # This is needed for moving monit logs, state and logrotate status to tmpfs
@@ -110,13 +144,7 @@ sudo bash -c "echo \"d	/dev/shm/logrotate/ 0755 root root\" > $FILESYSTEM_ROOT/e
 
 
 # Install a patched version of ifupdown2  (and its dependencies via 'apt-get -y install -f')
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/ifupdown2_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
-
-# Install a patched version of ntp  (and its dependencies via 'apt-get -y install -f')
-sudo dpkg --root=$FILESYSTEM_ROOT --force-confdef --force-confold -i $debs_path/ntp_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y \
-    -o Dpkg::Options::="--force-confdef" -o Dpkg::Options::="--force-confold" install -f
+install_deb_package $debs_path/ifupdown2_*.deb
 
 # Install dependencies for SONiC config engine
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install \
@@ -130,10 +158,8 @@ sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install "redis
 
 # Install redis-dump-load Python 3 package
 # Note: the scripts will be overwritten by corresponding Python 2 package
-REDIS_DUMP_LOAD_PY3_WHEEL_NAME=$(basename {{redis_dump_load_py3_wheel_path}})
-sudo cp {{redis_dump_load_py3_wheel_path}} $FILESYSTEM_ROOT/$REDIS_DUMP_LOAD_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $REDIS_DUMP_LOAD_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$REDIS_DUMP_LOAD_PY3_WHEEL_NAME
+
+install_pip_package {{redis_dump_load_py3_wheel_path}}
 
 # Install Python module for psutil
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install psutil
@@ -150,11 +176,14 @@ if [[ $CONFIGURED_ARCH == amd64 || $CONFIGURED_ARCH == arm64 ]]; then
     sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install "grpcio-tools==1.58.0"
 fi
 
+# Install Python module for smbus2
+sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install smbus2
+
+# Install Python module for telnetlib3
+sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install telnetlib3
+
 # Install sonic-py-common Python 3 package
-SONIC_PY_COMMON_PY3_WHEEL_NAME=$(basename {{sonic_py_common_py3_wheel_path}})
-sudo cp {{sonic_py_common_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_PY_COMMON_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_PY_COMMON_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$SONIC_PY_COMMON_PY3_WHEEL_NAME
+install_pip_package {{sonic_py_common_py3_wheel_path}}
 
 # Install dependency pkgs for SONiC config engine Python 2 package
 if [[ $CONFIGURED_ARCH == armhf || $CONFIGURED_ARCH == arm64 ]]; then
@@ -162,18 +191,11 @@ if [[ $CONFIGURED_ARCH == armhf || $CONFIGURED_ARCH == arm64 ]]; then
 fi
 
 # Install sonic-yang-models Python 3 package, install dependencies
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libyang_*.deb $debs_path/libyang-cpp_*.deb $debs_path/python3-yang_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
-SONIC_YANG_MODEL_PY3_WHEEL_NAME=$(basename {{sonic_yang_models_py3_wheel_path}})
-sudo cp {{sonic_yang_models_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_YANG_MODEL_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_YANG_MODEL_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$SONIC_YANG_MODEL_PY3_WHEEL_NAME
+install_deb_package $debs_path/libyang_*.deb $debs_path/libyang-cpp_*.deb $debs_path/python3-yang_*.deb
+install_pip_package {{sonic_yang_models_py3_wheel_path}}
 
 # Install sonic-yang-mgmt Python3 package
-SONIC_YANG_MGMT_PY3_WHEEL_NAME=$(basename {{sonic_yang_mgmt_py3_wheel_path}})
-sudo cp {{sonic_yang_mgmt_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_YANG_MGMT_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_YANG_MGMT_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$SONIC_YANG_MGMT_PY3_WHEEL_NAME
+install_pip_package {{sonic_yang_mgmt_py3_wheel_path}}
 
 # For sonic-config-engine Python 3 package
 # Install pyangbind here, outside sonic-config-engine dependencies, as pyangbind causes enum34 to be installed.
@@ -184,24 +206,15 @@ sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install pyangb
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 uninstall -y enum34
 
 # Install SONiC config engine Python 3 package
-CONFIG_ENGINE_PY3_WHEEL_NAME=$(basename {{config_engine_py3_wheel_path}})
-sudo cp {{config_engine_py3_wheel_path}} $FILESYSTEM_ROOT/$CONFIG_ENGINE_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $CONFIG_ENGINE_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$CONFIG_ENGINE_PY3_WHEEL_NAME
+install_pip_package {{config_engine_py3_wheel_path}}
 
 
 # Install sonic-platform-common Python 3 package
-PLATFORM_COMMON_PY3_WHEEL_NAME=$(basename {{platform_common_py3_wheel_path}})
-sudo cp {{platform_common_py3_wheel_path}} $FILESYSTEM_ROOT/$PLATFORM_COMMON_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $PLATFORM_COMMON_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$PLATFORM_COMMON_PY3_WHEEL_NAME
+install_pip_package {{platform_common_py3_wheel_path}}
 
 {% if pddf_support == "y" %}
 # Install pddf-platform-api-base Python 3 package
-PLATFORM_PDDF_COMMON_PY3_WHEEL_NAME=$(basename {{pddf_platform_api_base_py3_wheel_path}})
-sudo cp {{pddf_platform_api_base_py3_wheel_path}} $FILESYSTEM_ROOT/$PLATFORM_PDDF_COMMON_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $PLATFORM_PDDF_COMMON_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$PLATFORM_PDDF_COMMON_PY3_WHEEL_NAME
+install_pip_package {{pddf_platform_api_base_py3_wheel_path}}
 {% endif %}
 
 {# Barefoot platform vendors' sonic_platform packages import the Python 'thrift' library #}
@@ -210,10 +223,7 @@ sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install thrift
 {% endif %}
 
 # Install system-health Python 3 package
-SYSTEM_HEALTH_PY3_WHEEL_NAME=$(basename {{system_health_py3_wheel_path}})
-sudo cp {{system_health_py3_wheel_path}} $FILESYSTEM_ROOT/$SYSTEM_HEALTH_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SYSTEM_HEALTH_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$SYSTEM_HEALTH_PY3_WHEEL_NAME
+install_pip_package {{system_health_py3_wheel_path}}
 
 # Install m2crypto, cryptography, cffi, and pynacl packages, used by sonic-utilities
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install python3-m2crypto python3-cryptography python3-cffi python3-nacl
@@ -222,18 +232,13 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install libffi-dev
 
 # Install SONiC Utilities Python package
-SONIC_UTILITIES_PY3_WHEEL_NAME=$(basename {{sonic_utilities_py3_wheel_path}})
-sudo cp {{sonic_utilities_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_UTILITIES_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_UTILITIES_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$SONIC_UTILITIES_PY3_WHEEL_NAME
+install_pip_package {{sonic_utilities_py3_wheel_path}}
 
 # Install sonic-utilities data files (and any dependencies via 'apt-get -y install -f')
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-utilities-data_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/sonic-utilities-data_*.deb
 
 # Install customized bash version to patch bash plugin support.
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/bash_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/bash_*.deb
 
 # sonic-utilities-data installs bash-completion as a dependency. However, it is disabled by default
 # in bash.bashrc, so we copy a version of the file with it enabled here.
@@ -253,42 +258,30 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-mark manu
 # Install systemd-python for SONiC host services
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install systemd-python
 
-if [[ $CONFIGURED_ARCH == armhf ]]; then
-    # Install pygobject from apt repos, since it has armhf prebuilt. The version in Debian is
-    # a bit older than what is in pip.
-    #
-    # When doing the next Debian upgrade (to Trixie), consider installing this package for all
-    # architectures instead of just armhf.
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install python3-gi
-fi
+# Install pygobject from apt repos. The version in Debian is
+# a bit older than what is in pip, but it should be fine.
+sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install python3-gi
 
 # Install SONiC host services package
-SONIC_HOST_SERVICES_PY3_WHEEL_NAME=$(basename {{sonic_host_services_py3_wheel_path}})
-sudo cp {{sonic_host_services_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_HOST_SERVICES_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_HOST_SERVICES_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$SONIC_HOST_SERVICES_PY3_WHEEL_NAME
+install_pip_package {{sonic_host_services_py3_wheel_path}}
 
 # Install SONiC host services data files (and any dependencies via 'apt-get -y install -f')
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-host-services-data_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/sonic-host-services-data_*.deb
 
 {% if enable_ztp == "y" %}
 # Install ZTP (and its dependencies via 'apt-get -y install -f')
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-ztp_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/sonic-ztp_*.deb
 {% endif %}
 
 {% for machine_debs in lazy_build_installer_debs.strip().split() -%}
 {% set machine, pkgname = machine_debs.split('|') %}
 if [[ -z "{{machine}}" || -n "{{machine}}" && $TARGET_MACHINE == "{{machine}}" ]]; then
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/{{pkgname}} || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/{{pkgname}}
 fi
 {% endfor %}
 
 # Install SONiC Device Data  (and its dependencies via 'apt-get -y install -f')
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-device-data_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/sonic-device-data_*.deb
 
 # package for supporting password hardening
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install libpam-pwquality
@@ -307,18 +300,13 @@ sudo LANG=C chroot $FILESYSTEM_ROOT systemctl stop nslcd.service
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl mask nslcd.service
 
 # Install pam-tacplus and nss-tacplus
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libtac2_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libpam-tacplus_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libnss-tacplus_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/libtac2_*.deb
+install_deb_package $debs_path/libpam-tacplus_*.deb
+install_deb_package $debs_path/libnss-tacplus_*.deb
 # Install bash-tacplus
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/bash-tacplus_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/bash-tacplus_*.deb
 # Install audisp-tacplus
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/audisp-tacplus_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/audisp-tacplus_*.deb
 # Disable tacplus and LDAP by default
 ## NOTE: this syntax of pam-auth-update is meant to be used when the package gets removed, not for specifying
 ## some local configuration of a PAM module. Currently, there's no clean way of noninteractively specifying
@@ -330,10 +318,8 @@ sudo LANG=C chroot $FILESYSTEM_ROOT pam-auth-update --remove tacplus ldap
 sudo sed -i -e '/^passwd/s/ tacplus//' $FILESYSTEM_ROOT/etc/nsswitch.conf
 
 # Install pam-radius-auth and nss-radius
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libpam-radius-auth_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libnss-radius_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/libpam-radius-auth_*.deb
+install_deb_package $debs_path/libnss-radius_*.deb
 # Disable radius by default
 # radius does not have any profiles
 #sudo LANG=C chroot $FILESYSTEM_ROOT pam-auth-update --remove radius tacplus
@@ -341,8 +327,7 @@ sudo sed -i -e '/^passwd/s/ radius//' $FILESYSTEM_ROOT/etc/nsswitch.conf
 
 # Install a custom version of kdump-tools  (and its dependencies via 'apt-get -y install -f')
 if [ "$TARGET_BOOTLOADER" != uboot ]; then
-sudo DEBIAN_FRONTEND=noninteractive dpkg --root=$FILESYSTEM_ROOT -i $debs_path/kdump-tools_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive DEBCONF_NONINTERACTIVE_SEEN=true chroot $FILESYSTEM_ROOT apt-get -q --no-install-suggests --no-install-recommends install
+    install_deb_package $debs_path/kdump-tools_*.deb
     cat $IMAGE_CONFIGS/kdump/kdump-tools | sudo tee -a $FILESYSTEM_ROOT/etc/default/kdump-tools > /dev/null
 
 for kernel_release in $(ls $FILESYSTEM_ROOT/lib/modules/); do
@@ -354,24 +339,21 @@ fi
 # Install python-swss-common package and all its dependent packages
 {% if python_swss_debs.strip() -%}
 {% for deb in python_swss_debs.strip().split(' ') -%}
-sudo dpkg --root=$FILESYSTEM_ROOT -i {{deb}} || sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package {{deb}}
 {% endfor %}
 {% endif %}
 
 # Install sonic-db-cli
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-db-cli_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/sonic-db-cli_*.deb
 
 
 {% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
 # Install sonic-rsyslog-plugin
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-rsyslog-plugin_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/sonic-rsyslog-plugin_*.deb
 {% endif %}
 
 # Install custom-built monit package and SONiC configuration files
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/monit_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/monit_*.deb
 sudo cp $IMAGE_CONFIGS/monit/monitrc $FILESYSTEM_ROOT/etc/monit/
 sudo chmod 600 $FILESYSTEM_ROOT/etc/monit/monitrc
 sudo cp $IMAGE_CONFIGS/monit/conf.d/* $FILESYSTEM_ROOT/etc/monit/conf.d/
@@ -395,29 +377,27 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
 sudo cp $IMAGE_CONFIGS/smartmontools/smartmontools $FILESYSTEM_ROOT/etc/default/smartmontools
 
 # Install custom-built openssh sshd
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/openssh-server_${OPENSSH_VERSION_FULL}_*.deb $debs_path/openssh-client_${OPENSSH_VERSION_FULL}_*.deb $debs_path/openssh-sftp-server_${OPENSSH_VERSION_FULL}_*.deb
+install_deb_package $debs_path/openssh-server_${OPENSSH_VERSION_FULL}_*.deb $debs_path/openssh-client_${OPENSSH_VERSION_FULL}_*.deb $debs_path/openssh-sftp-server_${OPENSSH_VERSION_FULL}_*.deb
 
 {% if sonic_asic_platform == 'broadcom' %}
 # Install custom-built flashrom
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/flashrom_*.deb
+install_deb_package $debs_path/flashrom_*.deb
 {% endif %}
 
 # Copy crontabs
 sudo cp -f $IMAGE_CONFIGS/cron.d/* $FILESYSTEM_ROOT/etc/cron.d/
 
 # Copy NTP configuration files and templates
-sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT \
-    apt-get -y install ntpdate
-sudo rm -f $FILESYSTEM_ROOT/etc/network/if-up.d/ntpsec-ntpdate
-sudo cp $IMAGE_CONFIGS/ntp/ntp-config.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
-echo "ntp-config.service" | sudo tee -a $GENERATED_SERVICE_FILE
-sudo cp $IMAGE_CONFIGS/ntp/ntp-config.sh $FILESYSTEM_ROOT/usr/bin/
-sudo cp $IMAGE_CONFIGS/ntp/ntp.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
-sudo cp $IMAGE_CONFIGS/ntp/ntp.keys.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
-sudo cp $IMAGE_CONFIGS/ntp/ntp-systemd-wrapper $FILESYSTEM_ROOT/usr/libexec/ntpsec/
-sudo mkdir $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/ntpsec.service.d
-sudo cp $IMAGE_CONFIGS/ntp/sonic-target.conf $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/ntpsec.service.d/
-echo "ntpsec.service" | sudo tee -a $GENERATED_SERVICE_FILE
+sudo cp $IMAGE_CONFIGS/chrony/chrony-config.sh $FILESYSTEM_ROOT/usr/bin/
+sudo cp $IMAGE_CONFIGS/chrony/chrony.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
+sudo cp $IMAGE_CONFIGS/chrony/chrony.keys.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
+sudo cp $IMAGE_CONFIGS/chrony/chronyd-starter.sh $FILESYSTEM_ROOT/usr/local/sbin/
+sudo cp $IMAGE_CONFIGS/chrony/check_ntp_status.sh $FILESYSTEM_ROOT/usr/local/bin/
+sudo mkdir $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/chrony.service.d
+# Don't start chrony with multi-user.target, add our override, and start it with sonic.target
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable chrony.service
+sudo cp $IMAGE_CONFIGS/chrony/override.conf $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/chrony.service.d/
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable chrony.service
 
 # Copy DNS templates
 sudo cp $BUILD_TEMPLATES/dns.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
@@ -463,6 +443,7 @@ echo "system-health.service" | sudo tee -a $GENERATED_SERVICE_FILE
 # Copy logrotate.d configuration files
 sudo cp -f $IMAGE_CONFIGS/logrotate/logrotate.d/* $FILESYSTEM_ROOT/etc/logrotate.d/
 sudo cp $IMAGE_CONFIGS/logrotate/rsyslog.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
+sudo cp $IMAGE_CONFIGS/logrotate/on_demand_archived_log_clean_up.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
 sudo cp $IMAGE_CONFIGS/logrotate/logrotate-config.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
 sudo cp $IMAGE_CONFIGS/logrotate/logrotate-config.sh $FILESYSTEM_ROOT/usr/bin/
 sudo mkdir -p $FILESYSTEM_ROOT/etc/systemd/system/logrotate.timer.d
@@ -518,8 +499,7 @@ sudo chmod og-rw $FILESYSTEM_ROOT_ETC_SONIC/core_analyzer.rc.json
 if [[ $CONFIGURED_ARCH == amd64 ]]; then
     # Install rasdaemon package
     # NOTE: Can be installed from debian directly when we move to trixie
-    sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/rasdaemon_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+    install_deb_package $debs_path/rasdaemon_*.deb
 
     # Rasdaemon service configuration. Use timer to start rasdaemon with a delay for better fast/warm boot performance
     sudo cp $IMAGE_CONFIGS/rasdaemon/rasdaemon.timer $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
@@ -703,7 +683,15 @@ echo "midplane-network-npu.service" | sudo tee -a $GENERATED_SERVICE_FILE
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable midplane-network-npu.service
 echo "midplane-network-dpu.service" | sudo tee -a $GENERATED_SERVICE_FILE
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable midplane-network-dpu.service
-
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/dash-ha.service
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/dash-ha@dpu0.service
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/dash-ha@dpu1.service
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/dash-ha@dpu2.service
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/dash-ha@dpu3.service
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/dash-ha@dpu4.service
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/dash-ha@dpu5.service
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/dash-ha@dpu6.service
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/dash-ha@dpu7.service
 # According to the issue: https://github.com/systemd/systemd/issues/19106, To disable ManageForeignRoutingPolicyRules to avoid the ip rules being deleted by systemd-networkd
 sudo sed -i 's/#ManageForeignRoutingPolicyRules=yes/ManageForeignRoutingPolicyRules=no/g' $FILESYSTEM_ROOT/etc/systemd/networkd.conf
 
@@ -751,7 +739,7 @@ fi
 
 {% if installer_debs.strip() -%}
 {% for deb in installer_debs.strip().split(' ') -%}
-sudo dpkg --root=$FILESYSTEM_ROOT -i {{deb}} || sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package {{deb}}
 {% endfor %}
 {% endif %}
 
@@ -765,7 +753,7 @@ PACKAGE_NAME=$(dpkg-deb -f {{deb}} Package)
 PACKAGE_VERSION=$(dpkg-deb -f {{deb}} Version)
 INSTALLED_VERSION=$(dpkg-query --showformat='${Version}' --show $PACKAGE_NAME || true)
 if [ "$INSTALLED_VERSION" != "" ] && [ "$INSTALLED_VERSION" != "$PACKAGE_VERSION" ]; then
-    sudo dpkg --root=$FILESYSTEM_ROOT -i {{deb}}
+    install_deb_package {{deb}}
 fi
 
 ## SONiC packages may have lower version than Debian offical package, install offical Debian package will break feature
@@ -787,7 +775,7 @@ sudo LANG=C chroot $FILESYSTEM_ROOT depmod -a {{kversion}}
 {% set debfilename = deb.split('/')|last -%}
 {% set debname = debfilename.split('_')|first -%}
 
-sudo dpkg --root=$FILESYSTEM_ROOT -i {{deb}} || sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f --download-only
+install_deb_package_lazy {{deb}}
 
 sudo mkdir -p $FILESYSTEM_ROOT/$PLATFORM_DIR/{{dev}}
 sudo mkdir -p $FILESYSTEM_ROOT/$PLATFORM_DIR/common
@@ -798,7 +786,7 @@ for f in $(find $FILESYSTEM_ROOT/var/cache/apt/archives -name "*.deb"); do
     sudo ln -sf "../common/$(basename $f)" "$FILESYSTEM_ROOT/$PLATFORM_DIR/{{dev}}/$(basename $f)"
 done
 
-sudo dpkg --root=$FILESYSTEM_ROOT -P {{ debname }}
+sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT dpkg -P {{ debname }}
 
 {% endfor %}
 # create a trivial apt repo if any of the debs have dependencies, including between lazy debs
@@ -1039,7 +1027,7 @@ sudo LANG=C cp $SCRIPTS_DIR/asic_status.sh $FILESYSTEM_ROOT/usr/local/bin/asic_s
 sudo LANG=C cp $SCRIPTS_DIR/asic_status.py $FILESYSTEM_ROOT/usr/local/bin/asic_status.py
 sudo LANG=C cp $SCRIPTS_DIR/startup_tsa_tsb.py $FILESYSTEM_ROOT/usr/local/bin/startup_tsa_tsb.py
 sudo LANG=C cp $SCRIPTS_DIR/sonic-dpu-mgmt-traffic.sh $FILESYSTEM_ROOT/usr/local/bin/sonic-dpu-mgmt-traffic.sh
-
+sudo LANG=C cp $SCRIPTS_DIR/dash-ha.sh $FILESYSTEM_ROOT/usr/local/bin/dash-ha.sh
 # Copy sonic-netns-exec script
 sudo LANG=C cp $SCRIPTS_DIR/sonic-netns-exec $FILESYSTEM_ROOT/usr/bin/sonic-netns-exec
 
@@ -1078,6 +1066,7 @@ declare -rA FW_FILE_MAP=( \
     [$MLNX_SPC2_FW_FILE]="fw-SPC2.mfa" \
     [$MLNX_SPC3_FW_FILE]="fw-SPC3.mfa" \
     [$MLNX_SPC4_FW_FILE]="fw-SPC4.mfa" \
+    [$MLNX_SPC5_FW_FILE]="fw-SPC5.mfa" \
 )
 sudo mkdir -p $FILESYSTEM_ROOT/$PLATFORM_DIR/fw/asic/
 sudo mkdir -p $FILESYSTEM_ROOT_ETC/mlnx/
@@ -1098,18 +1087,20 @@ sudo mkdir -p $FILESYSTEM_ROOT/etc/mlnx/cpld/
 for MLNX_CPLD_ARCHIVE in $MLNX_CPLD_ARCHIVES; do
     sudo cp $files_path/$MLNX_CPLD_ARCHIVE $FILESYSTEM_ROOT/etc/mlnx/cpld/
 done
-sudo cp platform/mellanox/get_component_versions/get_component_versions.py $FILESYSTEM_ROOT/usr/bin/get_component_versions.py
+
+j2 platform/mellanox/get_component_versions/get_component_versions.j2 | sudo tee $FILESYSTEM_ROOT/usr/bin/get_component_versions.py
+sudo sed -i '1d' $FILESYSTEM_ROOT/usr/bin/get_component_versions.py
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/get_component_versions.py
+
 sudo cp platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py $FILESYSTEM_ROOT/usr/bin/cmis_host_mgmt.py
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/cmis_host_mgmt.py
 j2 platform/mellanox/mlnx-fw-upgrade.j2 | sudo tee $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
+sudo cp -r platform/mellanox/asic_detect $FILESYSTEM_ROOT/usr/bin/asic_detect
+sudo chmod -R 777 $FILESYSTEM_ROOT/usr/bin/asic_detect/
 
 # Install mlnx-sonic-platform Python 3 package
-MLNX_SONIC_PLATFORM_PY3_WHEEL_NAME=$(basename {{mlnx_platform_api_py3_wheel_path}})
-sudo cp {{mlnx_platform_api_py3_wheel_path}} $FILESYSTEM_ROOT/$MLNX_SONIC_PLATFORM_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $MLNX_SONIC_PLATFORM_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$MLNX_SONIC_PLATFORM_PY3_WHEEL_NAME
+install_pip_package {{mlnx_platform_api_py3_wheel_path}}
 
 # Install service that manages Nvidia specific shared storage
 sudo cp platform/mellanox/nv-syncd-shared/nv-syncd-shared.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
@@ -1120,22 +1111,13 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
 sudo mkdir -p $FILESYSTEM_ROOT/etc/minicom/
 sudo cp platform/mellanox/minirc.dfl $FILESYSTEM_ROOT/etc/minicom/
 
-# Install rshim script
-sudo install -m 755 platform/mellanox/rshim/files/rshim.sh $FILESYSTEM_ROOT/usr/bin/rshim.sh
+# Install dpu-udev-manager script
+sudo install -m 755 platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.sh $FILESYSTEM_ROOT/usr/bin/dpu-udev-manager.sh
 
-# Install rshim services
-sudo cp platform/mellanox/rshim/files/rshim@.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
-sudo cp platform/mellanox/rshim/files/rshim-manager.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
+# Install dpu-udev-manager service
+sudo install -m 644 platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable dpu-udev-manager
 
-# Install dpuctl script and config file
-sudo install -m 755 platform/mellanox/smartswitch/dpuctl/dpuctl.sh $FILESYSTEM_ROOT/usr/bin/dpuctl.sh
-sudo install -m 755 platform/mellanox/smartswitch/dpuctl/dpu.conf $FILESYSTEM_ROOT_ETC/mlnx/
-
-# Install dpuctl services
-sudo cp platform/mellanox/smartswitch/dpuctl/dpuctl.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
-
-# Install dpumap script
-sudo install -m 755 platform/mellanox/smartswitch/dpumap.sh $FILESYSTEM_ROOT/usr/bin/dpumap.sh
 {% endif %}
 
 {% if sonic_asic_platform == "nvidia-bluefield" %}
@@ -1152,18 +1134,23 @@ done
 sudo install -m 755 platform/nvidia-bluefield/byo/sonic-byo.py $FILESYSTEM_ROOT/usr/bin/sonic-byo.py
 SONIC_PLATFORM={{sonic_asic_platform}} j2 platform/mellanox/mlnx-fw-upgrade.j2 | sudo tee $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
+sudo cp -r platform/mellanox/asic_detect $FILESYSTEM_ROOT/usr/bin/asic_detect
+sudo chmod -R 777 $FILESYSTEM_ROOT/usr/bin/asic_detect/
 
-SONIC_PLATFORM_PY3_WHEEL_NAME=$(basename {{platform_api_py3_wheel_path}})
-sudo cp {{platform_api_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_PLATFORM_PY3_WHEEL_NAME
-sudo rm -rf $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME
+install_pip_package {{platform_api_py3_wheel_path}}
 
 
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libdashapi_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+install_deb_package $debs_path/libdashapi_*.deb
 
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install xmlstarlet
 
+# Copy component-versions file
+sudo cp $files_path/$COMPONENT_VERSIONS_FILE $FILESYSTEM_ROOT/etc/mlnx/component-versions
+
+# Install current running versions script
+j2 platform/mellanox/get_component_versions/get_component_versions.j2 | sudo tee $FILESYSTEM_ROOT/usr/bin/get_component_versions.py
+sudo sed -i '1d' $FILESYSTEM_ROOT/usr/bin/get_component_versions.py
+sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/get_component_versions.py
 {% endif %}
 
 {%- if SONIC_ROUTING_STACK == "frr" %}
@@ -1188,7 +1175,7 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
 if [ "$INCLUDE_FIPS" == y ]; then
     {% if installer_python_debs.strip() -%}
     {% for deb in installer_python_debs.strip().split(' ') -%}
-    sudo dpkg --root=$FILESYSTEM_ROOT -i {{deb}}
+    install_deb_package {{deb}}
     {% endfor %}
     {% endif %}
 fi
diff --git a/files/build_templates/swss_vars.j2 b/files/build_templates/swss_vars.j2
index 53639f01f7f..6eb2f0bc5e4 100644
--- a/files/build_templates/swss_vars.j2
+++ b/files/build_templates/swss_vars.j2
@@ -11,5 +11,6 @@
     "supporting_bulk_counter_groups": "{{ DEVICE_METADATA.localhost.supporting_bulk_counter_groups|join(',') }}",
     {% endif -%}
     "dual_tor": {% if DEVICE_METADATA.localhost.type == "ToRRouter" and DEVICE_METADATA.localhost.subtype == "DualToR" %}"enable"{% else %}"disable"{% endif %},
-    "dscp_remapping": {% if SYSTEM_DEFAULTS is defined and SYSTEM_DEFAULTS.tunnel_qos_remap is defined and SYSTEM_DEFAULTS.tunnel_qos_remap.status == "enabled" %}"enable"{% else %}"disable"{% endif %}
+    "dscp_remapping": {% if SYSTEM_DEFAULTS is defined and SYSTEM_DEFAULTS.tunnel_qos_remap is defined and SYSTEM_DEFAULTS.tunnel_qos_remap.status == "enabled" %}"enable"{% else %}"disable"{% endif %},
+    "switch_type": "{{ DEVICE_METADATA.localhost.switch_type }}"
 }
diff --git a/files/build_templates/sysmgr.service.j2 b/files/build_templates/sysmgr.service.j2
new file mode 100644
index 00000000000..ec81aa55067
--- /dev/null
+++ b/files/build_templates/sysmgr.service.j2
@@ -0,0 +1,22 @@
+[Unit]
+Description=Sysmgr Container
+Requires=database.service
+After=database.service swss.service
+BindsTo=sonic.target
+After=sonic.target
+Before=ntp-config.service
+StartLimitIntervalSec=1200
+StartLimitBurst=3
+
+
+[Service]
+User={{ sonicadmin_user }}
+ExecStartPre=/usr/bin/{{docker_container_name}}.sh start
+ExecStart=/usr/bin/{{docker_container_name}}.sh wait
+ExecStop=/usr/bin/{{docker_container_name}}.sh stop
+Restart=always
+RestartSec=30
+
+
+[Install]
+WantedBy=sonic.target
diff --git a/files/build_templates/telemetry.service.j2 b/files/build_templates/telemetry.service.j2
index ebdd484dc87..97b622fc67c 100644
--- a/files/build_templates/telemetry.service.j2
+++ b/files/build_templates/telemetry.service.j2
@@ -2,7 +2,6 @@
 Description=Telemetry container
 Requires=database.service
 After=database.service swss.service syncd.service
-Before=ntp-config.service
 BindsTo=sonic.target
 After=sonic.target
 StartLimitIntervalSec=1200
diff --git a/files/dsc/dpu.init b/files/dsc/dpu.init
index cce251665fc..5f424f7a5d0 100755
--- a/files/dsc/dpu.init
+++ b/files/dsc/dpu.init
@@ -62,6 +62,21 @@ function start_polaris()
     docker ps -a --format "{{.ID}}\t{{.Image}}" | grep "$IMAGE_NAME:$TAG" | awk '{print $1}' | xargs -I {} docker rm {}
 
     docker run -v $HOST_DIR_POLARIS/update:/update -v $HOST_DIR_POLARIS/sysconfig/config0:/sysconfig/config0 -v $HOST_DIR_POLARIS/sysconfig/config1:/sysconfig/config1 -v $HOST_DIR_POLARIS/obfl/a:/obfl -v $HOST_DIR_POLARIS/obfl:/var/log/obfl -v $HOST_DIR_POLARIS/data:/data -v $HOST_DIR_POLARIS/share:/share -v $HOST_DIR_POLARIS/share:/external -v $HOST_DIR_POLARIS/mnt/a:/ro -v /dev:/dev -v /sys:/sys --net=host --name=$CONTAINER_NAME_POLARIS --privileged $IMAGE_NAME:$TAG &
+
+    if [ -f /boot/first_boot ]; then
+        device="/usr/share/sonic/device"
+        platform=$(grep 'onie_platform=' /host/machine.conf | cut -d '=' -f 2)
+        echo "python3 -m pip install $device/$platform/sonic_platform-1.0-py3-none-any.whl"
+        python3 -m pip install $device/$platform/sonic_platform-1.0-py3-none-any.whl
+        rm /boot/first_boot
+    fi
+
+    sleep 5
+    INTERFACE="eth0-midplane"
+    if ip link show "$INTERFACE" &> /dev/null; then
+        echo "dhclient $INTERFACE"
+        /usr/sbin/dhclient $INTERFACE
+    fi
 }
 
 function start_dpu()
diff --git a/files/dsc/install_debian.j2 b/files/dsc/install_debian.j2
index a8397c974c9..5680e230ff1 100755
--- a/files/dsc/install_debian.j2
+++ b/files/dsc/install_debian.j2
@@ -15,7 +15,7 @@ image_dir=image-$image_version
 
 INSTALLER_PAYLOAD=fs.zip
 DOCKERFS_DIR=docker
-{% if BUILD_REDUCE_IMAGE_SIZE == "y" -%}
+{% if BUILD_REDUCE_IMAGE_SIZE | default("n") == "y" -%}
 FILESYSTEM_DOCKERFS=dockerfs.tar.zstd
 {%- else -%}
 FILESYSTEM_DOCKERFS=dockerfs.tar.gz
@@ -248,8 +248,8 @@ cat <<EOF >> $root_mnt/$BL_CONF
 default main
 
 label main
-    kernel /$image_dir/boot/vmlinuz-6.1.0-22-2-arm64
-    initrd /$image_dir/boot/initrd.img-6.1.0-22-2-arm64
+    kernel /$image_dir/boot/vmlinuz-6.1.0-29-2-arm64
+    initrd /$image_dir/boot/initrd.img-6.1.0-29-2-arm64
     devicetree /$image_dir/boot/elba-asic-psci.dtb
     append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs
 }
diff --git a/files/image_config/chrony/check_ntp_status.sh b/files/image_config/chrony/check_ntp_status.sh
new file mode 100755
index 00000000000..1cb556057a3
--- /dev/null
+++ b/files/image_config/chrony/check_ntp_status.sh
@@ -0,0 +1,6 @@
+#!/bin/bash
+
+if chronyc -c tracking | grep -q "Not synchronised"; then
+    echo "NTP is not synchronized with servers"
+    exit 1
+fi
diff --git a/files/image_config/chrony/chrony-config.sh b/files/image_config/chrony/chrony-config.sh
new file mode 100755
index 00000000000..7d5e9b937d7
--- /dev/null
+++ b/files/image_config/chrony/chrony-config.sh
@@ -0,0 +1,5 @@
+#!/bin/bash
+
+sonic-cfggen -d -t /usr/share/sonic/templates/chrony.conf.j2 >/etc/chrony/chrony.conf
+sonic-cfggen -d -t /usr/share/sonic/templates/chrony.keys.j2 >/etc/chrony/chrony.keys
+chmod o-r /etc/chrony/chrony.keys
diff --git a/files/image_config/chrony/chrony.conf.j2 b/files/image_config/chrony/chrony.conf.j2
new file mode 100644
index 00000000000..3c92c4e8e64
--- /dev/null
+++ b/files/image_config/chrony/chrony.conf.j2
@@ -0,0 +1,164 @@
+###############################################################################
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by chrony-config.sh
+###############################################################################
+
+# Welcome to the chrony configuration file. See chrony.conf(5) for more
+# information about usable directives.
+
+# Include configuration files found in /etc/chrony/conf.d.
+confdir /etc/chrony/conf.d
+
+{# Getting NTP global configuration -#}
+{% set global = (NTP | d({})).get('global', {}) -%}
+
+{# Getting DEVICE_METADATA localhost configuration -#}
+{% set device_metadata = (DEVICE_METADATA | d({})).get('localhost', {}) -%}
+
+{# Adding NTP servers. We need to know if we have some pools, to set proper config -#}
+{% set ns = namespace(is_pools=false) %}
+{% for server in NTP_SERVER if NTP_SERVER[server].admin_state != 'disabled' -%}
+    {% set config = NTP_SERVER[server] -%}
+    {# Server options -#}
+    {% set soptions = '' -%}
+
+    {# Define defaults if not defined -#}
+    {% set association_type = config.association_type | d('server') -%}
+    {% set resolve_as = config.resolve_as | d(server) -%}
+
+    {# Authentication key -#}
+    {% if global.authentication == 'enabled' -%}
+        {% if config.key -%}
+            {% set soptions = soptions ~ ' key ' ~ config.key -%}
+        {% endif -%}
+    {% endif -%}
+
+    {# Aggressive polling -#}
+    {% if config.iburst -%}
+        {% set soptions = soptions ~ ' iburst' -%}
+    {% endif -%}
+
+    {# Protocol version -#}
+    {% if config.version -%}
+        {% set soptions = soptions ~ ' version ' ~ config.version -%}
+    {% endif -%}
+
+    {# Check if there are any pool configured. BTW it doesn't matter what was
+    configured as "resolve_as" for pools. If they were configured with FQDN they
+    must remain like that -#}
+    {% if association_type == 'pool' -%}
+        {% set resolve_as = server -%}
+    {% endif -%}
+
+{{ association_type }} {{ resolve_as }}{{ soptions }}
+
+{% endfor -%}
+
+{# Enable the NTP server configuration only if the switch type is smartswitch -#}
+{% if device_metadata.subtype == 'SmartSwitch' and device_metadata.type != 'SmartSwitchDPU' -%}
+{# Enable NTP server functionality if server_role is enabled or DHCP configuration is enabled -#}
+{% if global.server_role == 'enabled' or global.dhcp == 'enabled' -%}
+allow
+binddevice bridge-midplane
+{% endif -%}
+{% endif -%}
+
+{# use source interface if configured to send NTP requests, else use eth0 if running in mgmt
+vrf (default is not to listen on anything) -#}
+
+{# Set interface to listen on:
+     * Set global variable for configured source interface name.
+     * Set global boolean to indicate if the ip of the configured source
+       interface is configured.
+     * If the source interface is configured but no ip on that
+       interface, then listen on another interface based on existing logic. -#}
+{%- macro check_ip_on_interface(interface_name, table_name) %}
+    {%- set ns = namespace(valid_intf = 'false') %}
+    {%- if table_name %}
+        {%- for (name, source_prefix) in table_name|pfx_filter %}
+            {%- if source_prefix and name == interface_name %}
+                {%- set ns.valid_intf = 'true' %}
+            {%- endif %}
+        {%- endfor %}
+    {%- endif %}
+{{ ns.valid_intf }}
+{%- endmacro %}
+
+{% set ns = namespace(source_intf = "") %}
+{%- set ns = namespace(source_intf_ip = 'false') %}
+{%- if global.src_intf  %}
+    {%- set ns.source_intf = global.src_intf %}
+    {%- if ns.source_intf != "" %}
+        {%- if ns.source_intf == "eth0" %}
+            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, MGMT_INTERFACE) %}
+        {%- elif ns.source_intf.startswith('Vlan') %}
+            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, VLAN_INTERFACE) %}
+        {%- elif ns.source_intf.startswith('Ethernet') %}
+            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, INTERFACE) %}
+        {%- elif ns.source_intf.startswith('PortChannel') %}
+            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, PORTCHANNEL_INTERFACE) %}
+        {%- elif ns.source_intf.startswith('Loopback') %}
+            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, LOOPBACK_INTERFACE) %}
+        {%- endif %}
+    {%- endif %}
+{% endif %}
+
+{% if ns.source_intf_ip == 'true' -%}
+bindacqdevice {{ns.source_intf}}
+{% elif (NTP) and NTP['global']['vrf'] == 'mgmt' -%}
+bindacqdevice eth0
+{% endif %}
+
+# Use time sources from DHCP.
+sourcedir /run/chrony-dhcp
+
+# Use NTP sources found in /etc/chrony/sources.d.
+sourcedir /etc/chrony/sources.d
+
+{% if global.authentication == 'enabled' %}
+# This directive specify the location of the file containing ID/key pairs for
+# NTP authentication.
+keyfile /etc/chrony/chrony.keys
+{% endif %}
+
+# This directive specify the file into which chronyd will store the rate
+# information.
+driftfile /var/lib/chrony/chrony.drift
+
+# Save NTS keys and cookies.
+ntsdumpdir /var/lib/chrony
+
+# Uncomment the following line to turn logging on.
+#log tracking measurements statistics
+
+# Log files location.
+logdir /var/log/chrony
+
+# Stop bad estimates upsetting machine clock.
+maxupdateskew 100.0
+
+# This directive enables kernel synchronisation (every 11 minutes) of the
+# real-time clock. Note that it can’t be used along with the 'rtcfile' directive.
+#rtcsync
+
+# Instead of having the kernel manage the real-time clock, have chrony do this
+# instead. The reason for this is that if the system time and the real-time clock
+# are signficantly different from the actual time, then the system time must be
+# slewed, while the real-time clock can be stepped to the actual time. That way,
+# when the device next reboots (whether it be cold, warm, or fast), it will come
+# up with the actual time from the real-time clock.
+rtcfile /var/lib/chrony/rtc
+hwclockfile /etc/adjtime
+rtconutc
+rtcautotrim 15
+
+# Step the system clock instead of slewing it if the adjustment is larger than
+# one second, but only in the first three clock updates.
+#
+# Disabled because we don't want chrony to do any clock steps; it should only slew
+#makestep 1 3
+
+# Get TAI-UTC offset and leap seconds from the system tz database.
+# This directive must be commented out when using time sources serving
+# leap-smeared time.
+leapsectz right/UTC
diff --git a/files/image_config/chrony/chrony.keys.j2 b/files/image_config/chrony/chrony.keys.j2
new file mode 100644
index 00000000000..14f190bfdb3
--- /dev/null
+++ b/files/image_config/chrony/chrony.keys.j2
@@ -0,0 +1,18 @@
+###############################################################################
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by chrony-config.sh
+###############################################################################
+
+{# We can connect only to the servers we trust. Determine those servers -#}
+{% set trusted_arr = [] -%}
+{% for server in NTP_SERVER if NTP_SERVER[server].trusted == 'yes' and
+                               NTP_SERVER[server].resolve_as -%}
+    {% set _ = trusted_arr.append(NTP_SERVER[server].resolve_as) -%}
+{% endfor -%}
+
+{# Define authentication keys inventory -#}
+{% set trusted_str = ' ' ~ trusted_arr|join(',') -%}
+{% for keyid in NTP_KEY if NTP_KEY[keyid].type and NTP_KEY[keyid].value %}
+{% set keyval = NTP_KEY[keyid].value | b64decode %}
+{{ keyid }} {{ NTP_KEY[keyid].type | upper }} {{ keyval }}{{trusted_str}}
+{% endfor -%}
diff --git a/files/image_config/chrony/chronyd-starter.sh b/files/image_config/chrony/chronyd-starter.sh
new file mode 100755
index 00000000000..d2a0c328993
--- /dev/null
+++ b/files/image_config/chrony/chronyd-starter.sh
@@ -0,0 +1,16 @@
+#!/bin/sh
+
+VRF_ENABLED=$(sonic-db-cli CONFIG_DB HGET "MGMT_VRF_CONFIG|vrf_global" "mgmtVrfEnabled" 2> /dev/null)
+if [ "$VRF_ENABLED" = "true" ]; then
+    VRF_CONFIGURED=$(sonic-db-cli CONFIG_DB HGET "NTP|global" "vrf" 2> /dev/null)
+    if [ "$VRF_CONFIGURED" = "default" ]; then
+        echo "Starting NTP server in default-vrf for default set as NTP vrf"
+        exec /usr/sbin/chronyd $DAEMON_OPTS
+    else
+        echo "Starting NTP server in mgmt-vrf"
+        exec ip vrf exec mgmt /usr/sbin/chronyd $DAEMON_OPTS
+    fi
+else
+    echo "Starting NTP server in default-vrf"
+    exec /usr/sbin/chronyd $DAEMON_OPTS
+fi
diff --git a/files/image_config/chrony/override.conf b/files/image_config/chrony/override.conf
new file mode 100644
index 00000000000..0b9c664cf7a
--- /dev/null
+++ b/files/image_config/chrony/override.conf
@@ -0,0 +1,16 @@
+[Unit]
+Requires=config-setup.service
+After=config-setup.service
+BindsTo=sonic.target
+After=sonic.target
+
+[Service]
+ExecStartPre=!/usr/bin/chrony-config.sh
+ExecStart=
+ExecStart=!/usr/local/sbin/chronyd-starter.sh
+ProtectControlGroups=no
+ProcSubset=all
+
+[Install]
+WantedBy=
+WantedBy=sonic.target
diff --git a/files/image_config/config-setup/config-setup b/files/image_config/config-setup/config-setup
index a823d84970b..7053cab08a3 100755
--- a/files/image_config/config-setup/config-setup
+++ b/files/image_config/config-setup/config-setup
@@ -139,6 +139,9 @@ apply_tacacs()
         sonic-cfggen -j /etc/sonic/old_config/${TACACS_JSON_BACKUP} --write-to-db
         echo "Applied tacacs json to restore tacacs credentials"
         config save -y
+
+        # Change tacacs config file name, so tacacs config will not be revert when device reboot.
+        mv /etc/sonic/old_config/${TACACS_JSON_BACKUP} /etc/sonic/old_config/${TACACS_JSON_BACKUP}_backup
     else
         echo "Missing tacacs json to restore tacacs credentials"
     fi
@@ -332,7 +335,7 @@ do_db_migration()
     sonic-db-cli CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1"
 
     #Enforce CHASSIS_APP_DB.tsa_enabled to be in sync with BGP_DEVICE_GLOBAL.STATE.tsa_enabled
-    if [[ -f /etc/sonic/chassisdb.conf ]]; then
+    if [[ -f /etc/sonic/chassisdb.conf ]] && [[ $disaggregated_chassis -ne 1 ]]; then
        tsa_cfg="$(sonic-db-cli CONFIG_DB HGET "BGP_DEVICE_GLOBAL|STATE" "tsa_enabled")"
        sonic-db-cli CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled ${tsa_cfg}
        OP_CODE=$?
@@ -452,6 +455,10 @@ if [[ -f "$ASIC_CONF" ]]; then
     source $ASIC_CONF
 fi
 
+PLATFORM_ENV_CONF_FILE=/usr/share/sonic/device/$PLATFORM/platform_env.conf
+if [[ -f "$PLATFORM_ENV_CONF_FILE" ]]; then
+    source $PLATFORM_ENV_CONF_FILE
+fi
 
 CMD=$1
 # Default command is boot
diff --git a/files/image_config/copp/copp_cfg.j2 b/files/image_config/copp/copp_cfg.j2
index dcae06fc0bb..fc2002cffd3 100755
--- a/files/image_config/copp/copp_cfg.j2
+++ b/files/image_config/copp/copp_cfg.j2
@@ -63,6 +63,16 @@
 		    "cbs":"600",
 		    "red_action":"drop"
 	    },
+	    "queue1_group3": {
+		    "trap_action":"trap",
+		    "trap_priority":"1",
+		    "queue": "1",
+		    "meter_type":"packets",
+		    "mode":"sr_tcm",
+		    "cir":"200",
+		    "cbs":"200",
+		    "red_action":"drop"
+	    },
 	    "queue2_group1": {
 		    "cbs": "1000",
 		    "cir": "1000",
@@ -121,6 +131,11 @@
 	    "sflow": {
 		    "trap_group": "queue2_group1",
 		    "trap_ids": "sample_packet"
+	    },
+	    "neighbor_miss": {
+		    "trap_ids": "neighbor_miss",
+		    "trap_group": "queue1_group3",
+		    "always_enabled": "true"
 	    }
     }
 }
diff --git a/files/image_config/interfaces/interfaces.j2 b/files/image_config/interfaces/interfaces.j2
index ea04fa80e93..ef3a47ba043 100644
--- a/files/image_config/interfaces/interfaces.j2
+++ b/files/image_config/interfaces/interfaces.j2
@@ -131,7 +131,11 @@ iface {{ name }} {{ 'inet' if prefix | ipv4 else 'inet6' }} static
 {# TODO: COPP policy type rules #}
 {% endfor %}
 {% else %}
-{% if not (DEVICE_METADATA['localhost']['subtype'] == 'SmartSwitch' and DEVICE_METADATA['localhost']['switch_type'] == 'dpu') %}
+{% if (DEVICE_METADATA is not defined)
+      or (DEVICE_METADATA['localhost']['subtype'] is not defined)
+      or (DEVICE_METADATA['localhost']['switch_type'] is not defined)
+      or not (DEVICE_METADATA['localhost']['subtype'] == 'SmartSwitch'
+              and DEVICE_METADATA['localhost']['switch_type'] == 'dpu') %}
 auto eth0
 iface eth0 inet dhcp
     metric 202
diff --git a/files/image_config/logrotate/on_demand_archived_log_clean_up.j2 b/files/image_config/logrotate/on_demand_archived_log_clean_up.j2
new file mode 100644
index 00000000000..bd06d058185
--- /dev/null
+++ b/files/image_config/logrotate/on_demand_archived_log_clean_up.j2
@@ -0,0 +1,48 @@
+        # Adjust NUM_LOGS_TO_ROTATE to reflect number of log files that trigger this block specified above
+        NUM_LOGS_TO_ROTATE=8
+
+        # Adjust LOG_FILE_ROTATE_SIZE_KB to reflect the "size" parameter specified above, in kB
+{% if var_log_kb <= 204800 %}
+        LOG_FILE_ROTATE_SIZE_KB=1024
+{% elif var_log_kb <= 409600 %}
+        LOG_FILE_ROTATE_SIZE_KB=2048
+{% else %}
+        LOG_FILE_ROTATE_SIZE_KB=16384
+{% endif %}
+
+        # Reserve space for btmp, wtmp, dpkg.log, monit.log, etc., as well as logs that
+        # should be disabled, just in case they get created and rotated
+        RESERVED_SPACE_KB=4096
+
+        VAR_LOG_SIZE_KB={{var_log_kb}}
+
+        # Limit usable space to 90% of the partition minus the reserved space for other logs
+        USABLE_SPACE_KB=$(( (VAR_LOG_SIZE_KB * 90 / 100) - RESERVED_SPACE_KB))
+
+        # Set our threshold so as to maintain enough space to write all logs from empty to full
+        # Most likely, some logs will have non-zero size when this is called, so this errs on the side
+        # of caution, giving us a bit of a cushion if a log grows quickly and passes its rotation size
+        THRESHOLD_KB=$((USABLE_SPACE_KB - (NUM_LOGS_TO_ROTATE * LOG_FILE_ROTATE_SIZE_KB * 2)))
+
+        # First, delete any *.1.gz files that might be left around from a prior incomplete
+        # logrotate execution, otherwise logrotate will fail to do its job
+        find /var/log/ -name '*.1.gz' -type f -exec rm -f {} +
+
+        while true; do
+            USED_KB=$(du -s /var/log | awk '{ print $1; }')
+
+            if [ $USED_KB -lt $THRESHOLD_KB ]; then
+                break
+            else
+                OLDEST_ARCHIVE_FILE=$(find /var/log -type f -printf '%T+ %p\n' | grep -E '.+\.[0-9]+(\.gz)?$' | sort  | awk 'NR == 1 {print $2}')
+
+                if [ -z "$OLDEST_ARCHIVE_FILE" ]; then
+                    logger -p syslog.err -t "logrotate" "No archive file to delete -- potential for filling up /var/log partition!"
+                    break
+                fi
+
+                logger -p syslog.info -t "logrotate" "Deleting archive file $OLDEST_ARCHIVE_FILE to free up space"
+                rm -rf "$OLDEST_ARCHIVE_FILE"
+            fi
+        done
+
diff --git a/files/image_config/logrotate/rsyslog.j2 b/files/image_config/logrotate/rsyslog.j2
index 8622b23473e..e9f2491ad46 100644
--- a/files/image_config/logrotate/rsyslog.j2
+++ b/files/image_config/logrotate/rsyslog.j2
@@ -27,7 +27,6 @@
 
 /var/log/auth.log
 /var/log/cron.log
-/var/log/syslog
 /var/log/teamd.log
 /var/log/telemetry.log
 /var/log/stpd.log
@@ -37,6 +36,7 @@
 /var/log/swss/sairedis*.rec
 /var/log/swss/swss*.rec
 /var/log/swss/responsepublisher.rec
+/var/log/syslog
 {
 {% if var_log_kb <= 204800 %}
     size 1M
@@ -52,53 +52,7 @@
     delaycompress
     nosharedscripts
     firstaction
-        # Adjust NUM_LOGS_TO_ROTATE to reflect number of log files that trigger this block specified above
-        NUM_LOGS_TO_ROTATE=8
-
-        # Adjust LOG_FILE_ROTATE_SIZE_KB to reflect the "size" parameter specified above, in kB
-{% if var_log_kb <= 204800 %}
-        LOG_FILE_ROTATE_SIZE_KB=1024
-{% elif var_log_kb <= 409600 %}
-        LOG_FILE_ROTATE_SIZE_KB=2048
-{% else %}
-        LOG_FILE_ROTATE_SIZE_KB=16384
-{% endif %}
-
-        # Reserve space for btmp, wtmp, dpkg.log, monit.log, etc., as well as logs that
-        # should be disabled, just in case they get created and rotated
-        RESERVED_SPACE_KB=4096
-
-        VAR_LOG_SIZE_KB={{var_log_kb}}
-
-        # Limit usable space to 90% of the partition minus the reserved space for other logs
-        USABLE_SPACE_KB=$(( (VAR_LOG_SIZE_KB * 90 / 100) - RESERVED_SPACE_KB))
-
-        # Set our threshold so as to maintain enough space to write all logs from empty to full
-        # Most likely, some logs will have non-zero size when this is called, so this errs on the side
-        # of caution, giving us a bit of a cushion if a log grows quickly and passes its rotation size
-        THRESHOLD_KB=$((USABLE_SPACE_KB - (NUM_LOGS_TO_ROTATE * LOG_FILE_ROTATE_SIZE_KB * 2)))
-
-        # First, delete any *.1.gz files that might be left around from a prior incomplete
-        # logrotate execution, otherwise logrotate will fail to do its job
-        find /var/log/ -name '*.1.gz' -type f -exec rm -f {} +
-
-        while true; do
-            USED_KB=$(du -s /var/log | awk '{ print $1; }')
-
-            if [ $USED_KB -lt $THRESHOLD_KB ]; then
-                break
-            else
-                OLDEST_ARCHIVE_FILE=$(find /var/log -type f -printf '%T+ %p\n' | grep -E '.+\.[0-9]+(\.gz)?$' | sort  | awk 'NR == 1 {print $2}')
-
-                if [ -z "$OLDEST_ARCHIVE_FILE" ]; then
-                    logger -p syslog.err -t "logrotate" "No archive file to delete -- potential for filling up /var/log partition!"
-                    break
-                fi
-
-                logger -p syslog.info -t "logrotate" "Deleting archive file $OLDEST_ARCHIVE_FILE to free up space"
-                rm -rf "$OLDEST_ARCHIVE_FILE"
-            fi
-        done
+{% include 'on_demand_archived_log_clean_up.j2' %}
     endscript
     postrotate
         if [ $(echo $1 | grep -c "/var/log/swss/") -gt 0 ]; then
@@ -123,5 +77,17 @@
                 /bin/kill -HUP $(cat /var/run/rsyslogd.pid)
             fi
         fi
+
+        # The clean up removes archived files till log partition has enough space
+        # So one time running during a logrotate is enough.
+        # Supposedly, the clean up happens on the firstaction which before the rotations.
+        # But there's a corner case, that on firstaction, no archived log files found(all files are origin logs, e.g. syslog, swss.rec)
+        # After rotated all log files are empty since log partition is full, then logrotate skips since it asserts notifempty and file size.
+        # On that condition, we need to clean up on postrotate
+        # Again, one time clean up during a logrotate round is enough, more running just add useless scanning.
+        # Hook and trigger clean up on rotation on syslog(last rotation log in the configuration), to avoid useless running on other log files
+        if [ $(echo $1 | grep -c "/var/log/syslog") -gt 0 ]; then
+{% include 'on_demand_archived_log_clean_up.j2' %}
+        fi
     endscript
 }
diff --git a/files/image_config/monit/conf.d/sonic-host b/files/image_config/monit/conf.d/sonic-host
index 6a16d4e1bdf..30d539464b2 100644
--- a/files/image_config/monit/conf.d/sonic-host
+++ b/files/image_config/monit/conf.d/sonic-host
@@ -70,3 +70,7 @@ check program controlPlaneDropCheck with path "/usr/bin/control_plane_drop_check
 check program mgmtOperStatus with path "/usr/bin/mgmt_oper_status.py"
     every 1 cycles
     if status != 0 for 3 cycle then alert repeat every 1 cycles
+
+# check if NTP is synchronized
+#check program ntp with path "/usr/local/bin/check_ntp_status.sh"
+#    if status != 0 for 3 cycle then alert repeat every 5 cycles
diff --git a/files/image_config/monit/container_checker b/files/image_config/monit/container_checker
index 168888fc8a0..769755b7c66 100755
--- a/files/image_config/monit/container_checker
+++ b/files/image_config/monit/container_checker
@@ -69,6 +69,9 @@ def get_expected_running_containers():
 
     container_list = []
     for container_name in feature_table.keys():
+        # skip frr_bmp since it's not container just bmp option used by bgpd
+        if container_name == "frr_bmp":
+            continue
         # slim image does not have telemetry container and corresponding docker image
         if container_name == "telemetry":
             ret = check_docker_image("docker-sonic-telemetry")
@@ -108,7 +111,7 @@ def get_expected_running_containers():
             else:
                 always_running_containers.add(container_name)
 
-    if device_info.is_supervisor() or device_info.is_smartswitch():
+    if device_info.is_supervisor() or device_info.is_disaggregated_chassis() or device_info.is_smartswitch():
         always_running_containers.add("database-chassis")
 
     if device_info.is_smartswitch():
@@ -216,11 +219,6 @@ def main():
         print("Expected containers not running: " + ", ".join(not_running_containers))
         sys.exit(3)
 
-    unexpected_running_containers = current_running_containers.difference(expected_running_containers)
-    if unexpected_running_containers:
-        print("Unexpected running containers: " + ", ".join(unexpected_running_containers))
-        sys.exit(4)
-
 
 if __name__ == "__main__":
     main()
diff --git a/files/image_config/monit/memory_checker b/files/image_config/monit/memory_checker
index 6ea00cbc5e3..4120ccf8464 100755
--- a/files/image_config/monit/memory_checker
+++ b/files/image_config/monit/memory_checker
@@ -114,25 +114,27 @@ def get_memory_usage(container_id):
     Args:
         container_id: A string indicates the full ID of a container.
     Returns:
-        memory_usage_in_bytes: A string indicates memory usage (Bytes) of a container.
+        A string indicates memory usage (Bytes) of a container.
     """
-    memory_usage_in_bytes = ""
-
     validate_container_id(container_id)
 
     docker_memory_usage_file_path = CGROUP_DOCKER_MEMORY_DIR + container_id + "/memory.usage_in_bytes"
-    if not os.path.exists(docker_memory_usage_file_path):
-        syslog.syslog(syslog.LOG_ERR, ERROR_CGROUP_MEMORY_USAGE_NOT_FOUND.format(docker_memory_usage_file_path, container_id))
-        sys.exit(INTERNAL_ERROR)
 
-    try:
-        with open(docker_memory_usage_file_path, 'r') as file:
-            memory_usage_in_bytes = file.read().strip()
-    except IOError as err:
-        syslog.syslog(syslog.LOG_ERR, ERROR_CONTAINER_MEMORY_USAGE_NOT_FOUND.format(container_id))
-        sys.exit(INTERNAL_ERROR)
+    for attempt in range(3):
+        try:
+            with open(docker_memory_usage_file_path, 'r') as file:
+                return file.read().strip()
+        except FileNotFoundError:
+            if attempt < 2:
+                time.sleep(0.1)  # retry after short delay
+            else:
+                break
+        except IOError:
+            syslog.syslog(syslog.LOG_ERR, ERROR_CONTAINER_MEMORY_USAGE_NOT_FOUND.format(container_id))
+            sys.exit(INTERNAL_ERROR)
 
-    return memory_usage_in_bytes
+    syslog.syslog(syslog.LOG_ERR, ERROR_CGROUP_MEMORY_USAGE_NOT_FOUND.format(docker_memory_usage_file_path, container_id))
+    sys.exit(INTERNAL_ERROR)
 
 def get_inactive_cache_usage(container_id):
     """Reads the container's cache usage from the field 'total_inactive_file' in control
diff --git a/files/image_config/ntp/ntp-apparmor b/files/image_config/ntp/ntp-apparmor
deleted file mode 100644
index 78edef66a51..00000000000
--- a/files/image_config/ntp/ntp-apparmor
+++ /dev/null
@@ -1,9 +0,0 @@
-# Apparmor configuration
-# /etc/apparmor.d/local/usr.sbin.ntpd
-
-  # Allow read access to "rw" mount path of fs.squashfs
-  # Eg: /host/image-HEAD-sonic.../rw/usr/sbin 
-  /**/{,s}bin/      r,
-  /**/usr/{,s}bin/  r,
-  /**/usr/local/{,s}bin/  r,
-
diff --git a/files/image_config/ntp/ntp-config.service b/files/image_config/ntp/ntp-config.service
deleted file mode 100644
index 97ee960bdad..00000000000
--- a/files/image_config/ntp/ntp-config.service
+++ /dev/null
@@ -1,16 +0,0 @@
-[Unit]
-Description=Update NTP configuration
-Requires=config-setup.service
-After=config-setup.service
-BindsTo=sonic.target
-After=sonic.target
-Before=ntp.service
-StartLimitIntervalSec=0
-
-[Service]
-Type=oneshot
-RemainAfterExit=yes
-ExecStart=/usr/bin/ntp-config.sh
-
-[Install]
-WantedBy=sonic.target
diff --git a/files/image_config/ntp/ntp-config.sh b/files/image_config/ntp/ntp-config.sh
deleted file mode 100755
index 13469c58966..00000000000
--- a/files/image_config/ntp/ntp-config.sh
+++ /dev/null
@@ -1,34 +0,0 @@
-#!/bin/bash
-
-ntp_default_file='/etc/default/ntpsec'
-ntp_temp_file='/tmp/ntp.orig'
-
-reboot_type='cold'
-
-function get_database_reboot_type()
-{
-    SYSTEM_WARM_START=`sonic-db-cli STATE_DB hget "WARM_RESTART_ENABLE_TABLE|system" enable`
-    SYSTEM_FAST_START=`sonic-db-cli STATE_DB hget "FAST_RESTART_ENABLE_TABLE|system" enable`
-
-    if [[ x"${SYSTEM_WARM_START}" == x"true" ]]; then
-        reboot_type='warm'
-    elif [[ x"${SYSTEM_FAST_START}" == x"true" ]]; then
-        reboot_type='fast'
-    fi
-}
-
-function modify_ntp_default
-{
-    cp ${ntp_default_file} ${ntp_temp_file}
-    sed -e "$1" ${ntp_temp_file} >${ntp_default_file}
-}
-
-sonic-cfggen -d -t /usr/share/sonic/templates/ntp.conf.j2 >/etc/ntpsec/ntp.conf
-sonic-cfggen -d -t /usr/share/sonic/templates/ntp.keys.j2 >/etc/ntpsec/ntp.keys
-chmod o-r /etc/ntp.keys
-
-get_database_reboot_type
-echo "Disabling NTP long jump for reboot type ${reboot_type} ..."
-modify_ntp_default "s/NTPD_OPTS=\"-g -N\"/NTPD_OPTS=\"-x -N\"/"
-
-systemctl --no-block restart ntp
diff --git a/files/image_config/ntp/ntp-systemd-wrapper b/files/image_config/ntp/ntp-systemd-wrapper
deleted file mode 100644
index 71e061ed512..00000000000
--- a/files/image_config/ntp/ntp-systemd-wrapper
+++ /dev/null
@@ -1,65 +0,0 @@
-#!/bin/sh
-
-# This file was originally created automatically as part of default NTP application installation from debian package.
-# This is now manually modified for supporting NTP in management VRF.
-# When management VRF is enabled, the NTP application should be started using "ip vrf exec mgmt".
-# Check has been added to verify the management VRF enabled status and use "ip vrf exec mgmt"  when it is enabled.
-# This file will be copied to /usr/libexec/ntpsec/ntp-systemd-wrapper file that gets created during build process.
-DAEMON=/usr/sbin/ntpd
-PIDFILE=/run/ntpd.pid
-LOCKFILE=/run/lock/ntpsec-ntpdate
-NTPLOGDIR=/var/log/ntpsec
-
-if [ -r /etc/default/ntpsec ]; then
-        . /etc/default/ntpsec
-fi
-
-dhcp=$(/usr/local/bin/sonic-cfggen -d -v 'NTP["global"]["dhcp"]' 2> /dev/null)
-if [ "$IGNORE_DHCP" != "yes" ] && [ -e /run/ntpsec/ntp.conf.dhcp ] && [ "$dhcp" = "enabled" ]; then
-        NTPD_OPTS="$NTPD_OPTS -c /run/ntpsec/ntp.conf.dhcp"
-else
-	# List the default -c first, so if the admin has specified -c in
-	# NTPD_OPTS, it is honored.
-	NTPD_OPTS="-c /etc/ntpsec/ntp.conf $NTPD_OPTS"
-fi
-
-NTPD_OPTS="$NTPD_OPTS -u ntpsec:ntpsec"
-
-if [ ! -e $NTPLOGDIR ]; then
-    mkdir $NTPLOGDIR
-    chmod 777 $NTPLOGDIR
-fi
-
-# Protect the service startup against concurrent ntpdate ifup hooks
-(
-        if flock -w 180 9; then
-                ntpEnabled=$(/usr/local/bin/sonic-cfggen -d -v 'NTP["global"]["admin_state"]' 2> /dev/null)
-                if [ "$ntpEnabled" = "disabled" ]
-                then
-                        echo "Stopping NTP daemon"
-                        kill -9 $(cat $PIDFILE)
-                        exit 0
-                fi
-
-                # when mgmt vrf is configured, ntp starts in mgmt vrf by default unless user configures otherwise
-                vrfEnabled=$(/usr/local/bin/sonic-cfggen -d -v 'MGMT_VRF_CONFIG["vrf_global"]["mgmtVrfEnabled"]' 2> /dev/null)
-                vrfConfigured=$(/usr/local/bin/sonic-cfggen -d -v 'NTP["global"]["vrf"]' 2> /dev/null)
-                if [ "$vrfEnabled" = "true" ]
-                then
-                        if [ "$vrfConfigured" = "default" ]
-                        then
-                                    echo "Starting NTP server in default-vrf for default set as NTP vrf"
-                                    exec $DAEMON -p $PIDFILE $NTPD_OPTS
-                        else
-                                    echo "Starting NTP server in mgmt-vrf"
-                                    exec ip vrf exec mgmt $DAEMON -p $PIDFILE $NTPD_OPTS
-                        fi
-                else
-                        echo "Starting NTP server in default-vrf"
-                        exec $DAEMON -p $PIDFILE $NTPD_OPTS
-                fi
-        else
-                echo "Timeout waiting for $LOCKFILE"
-                exit 1
-        fi
-) 9>$LOCKFILE
diff --git a/files/image_config/ntp/ntp.conf.j2 b/files/image_config/ntp/ntp.conf.j2
deleted file mode 100644
index a3b0f090972..00000000000
--- a/files/image_config/ntp/ntp.conf.j2
+++ /dev/null
@@ -1,163 +0,0 @@
-###############################################################################
-# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
-# Controlled by ntp-config.service
-###############################################################################
-
-# /etc/ntp.conf, configuration for ntpd; see ntp.conf(5) for help
-
-# To avoid ntpd from panic and exit if the drift between new time and
-# current system time is large.
-tinker panic 0
-
-driftfile /var/lib/ntpsec/ntp.drift
-leapfile /usr/share/zoneinfo/leap-seconds.list
-
-{# Getting NTP global configuration -#}
-{% set global = (NTP | d({})).get('global', {}) -%}
-
-{# Adding NTP servers. We need to know if we have some pools, to set proper
-config -#}
-{% set ns = namespace(is_pools=false) %}
-{% set ip_ver_ns = namespace(ipv4_server=false, ipv6_server=false) %}
-{% for server in NTP_SERVER if NTP_SERVER[server].admin_state != 'disabled' -%}
-    {% set config = NTP_SERVER[server] -%}
-    {# Server options -#}
-    {% set soptions = '' -%}
-
-    {# Define defaults if not defined -#}
-    {% set association_type = config.association_type | d('server') -%}
-    {% set resolve_as = config.resolve_as | d(server) -%}
-
-    {# Authentication key -#}
-    {% if global.authentication == 'enabled' -%}
-        {% if config.key -%}
-            {% set soptions = soptions ~ ' key ' ~ config.key -%}
-        {% endif -%}
-    {% endif -%}
-
-    {# Aggressive polling -#}
-    {% if config.iburst -%}
-        {% set soptions = soptions ~ ' iburst' -%}
-    {% endif -%}
-
-    {# Protocol version -#}
-    {% if config.version -%}
-        {% set soptions = soptions ~ ' version ' ~ config.version -%}
-    {% endif -%}
-
-    {# Check if there are any pool configured. BTW it doesn't matter what was
-    configured as "resolve_as" for pools. If they were configured with FQDN they
-    must remain like that -#}
-    {% if association_type == 'pool' -%}
-        {% set resolve_as = server -%}
-    {% endif -%}
-
-{{ association_type }} {{ resolve_as }}{{ soptions }}
-{% if global.server_role == 'disabled' %}
-restrict {{ resolve_as }} kod limited nomodify noquery
-{% endif %}
-
-{% if resolve_as | ipv4 -%}
-    {% set ip_ver_ns.ipv4_server = true %}
-{% elif resolve_as | ipv6 %}
-    {% set ip_ver_ns.ipv6_server = true %}
-{% endif -%}
-
-
-{% endfor -%}
-
-{% set trusted_keys_arr = [] -%}
-{% for key in NTP_KEY -%}
-    {% set keydata = NTP_KEY[key] -%}
-    {% if keydata.trusted == 'yes' -%}
-        {% set trusted_keys_arr = trusted_keys_arr.append(key) -%}
-    {% endif -%}
-{% endfor %}
-
-{% if global.authentication == 'enabled' %}
-keys /etc/ntpsec/ntp.keys
-{% if trusted_keys_arr != [] %}
-trustedkey {{ trusted_keys_arr|join(' ') }}
-{% endif %}
-{% endif %}
-
-{# listen on source interface if configured, else only listen on MGMT_INTERFACE,
-LOOPBACK_INTERFACE ip when MGMT_INTERFACE is not defined, or eth0 if we don't
-have both of them (default is to listen on all ip addresses) -#}
-interface ignore wildcard
-
-{# Set interface to listen on:
-     * Set global variable for configured source interface name.
-     * Set global boolean to indicate if the ip of the configured source
-       interface is configured.
-     * If the source interface is configured but no ip on that
-       interface, then listen on another interface based on existing logic. -#}
-{%- macro check_ip_on_interface(interface_name, table_name) %}
-    {%- set ns = namespace(valid_intf = 'false') %}
-    {%- if table_name %}
-        {%- for (name, source_prefix) in table_name|pfx_filter %}
-            {%- if source_prefix and name == interface_name %}
-                {%- set ns.valid_intf = 'true' %}
-            {%- endif %}
-        {%- endfor %}
-    {%- endif %}
-{{ ns.valid_intf }}
-{%- endmacro %}
-
-{% set ns = namespace(source_intf = "") %}
-{%- set ns = namespace(source_intf_ip = 'false') %}
-{%- if global.src_intf  %}
-    {%- set ns.source_intf = global.src_intf %}
-    {%- if ns.source_intf != "" %}
-        {%- if ns.source_intf == "eth0" %}
-            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, MGMT_INTERFACE) %}
-        {%- elif ns.source_intf.startswith('Vlan') %}
-            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, VLAN_INTERFACE) %}
-        {%- elif ns.source_intf.startswith('Ethernet') %}
-            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, INTERFACE) %}
-        {%- elif ns.source_intf.startswith('PortChannel') %}
-            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, PORTCHANNEL_INTERFACE) %}
-        {%- elif ns.source_intf.startswith('Loopback') %}
-            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, LOOPBACK_INTERFACE) %}
-        {%- endif %}
-    {%- endif %}
-{% endif %}
-
-{% if ns.source_intf_ip == 'true' %}
-interface listen {{ns.source_intf}}
-{% elif (NTP) and NTP['global']['vrf'] == 'mgmt' %}
-interface listen eth0
-{% elif MGMT_INTERFACE %}
-{% for (mgmt_intf, mgmt_prefix) in MGMT_INTERFACE|pfx_filter %}
-interface listen {{ mgmt_prefix | ip }}
-{% endfor %}
-{% elif LOOPBACK_INTERFACE %}
-{% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %}
-{% if name == 'Loopback0' %}
-{% if prefix | ipv4 and ip_ver_ns.ipv4_server or prefix | ipv6 and ip_ver_ns.ipv6_server %}
-interface listen {{ prefix | ip }}
-{% endif %}
-{% endif %}
-{% endfor %}
-{% else %}
-interface listen eth0
-{% endif %}
-interface listen 127.0.0.1
-
-{# Access control options -#}
-{% set options = '' -%}
-
-{# Disable NTP server functionality. Should stay on when dhcp is enabled -#}
-{# {% if global.server_role == 'disabled' and global.dhcp == 'disabled' -%}
-    {% set options = options ~ ' ignore' -%}
-{% endif -%} #}
-
-# Access control configuration
-# By default, exchange time with everybody, but don't allow configuration.
-# NTPsec doesn't establish peer associations, and so nopeer has no effect, and
-# has been removed from here
-restrict default kod nomodify noquery limited{{ options }}
-
-# Local users may interrogate the ntp server more closely.
-restrict 127.0.0.1
-restrict ::1
diff --git a/files/image_config/ntp/ntp.keys.j2 b/files/image_config/ntp/ntp.keys.j2
deleted file mode 100644
index 961fc753269..00000000000
--- a/files/image_config/ntp/ntp.keys.j2
+++ /dev/null
@@ -1,18 +0,0 @@
-###############################################################################
-# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
-# Controlled by ntp-config.service
-###############################################################################
-
-{# We can connect only to the servers we trust. Determine those servers -#}
-{% set trusted_arr = [] -%}
-{% for server in NTP_SERVER if NTP_SERVER[server].trusted == 'yes' and
-                               NTP_SERVER[server].resolve_as -%}
-    {% set _ = trusted_arr.append(NTP_SERVER[server].resolve_as) -%}
-{% endfor -%}
-
-{# Define authentication keys inventory -#}
-{% set trusted_str = ' ' ~ trusted_arr|join(',') -%}
-{% for keyid in NTP_KEY if NTP_KEY[keyid].type and NTP_KEY[keyid].value %}
-{% set keyval = NTP_KEY[keyid].value | b64decode %}
-{{ keyid }} {{ NTP_KEY[keyid].type }} {{ keyval }}{{trusted_str}}
-{% endfor -%}
diff --git a/files/image_config/ntp/sonic-target.conf b/files/image_config/ntp/sonic-target.conf
deleted file mode 100644
index 83dd118fe5e..00000000000
--- a/files/image_config/ntp/sonic-target.conf
+++ /dev/null
@@ -1,3 +0,0 @@
-[Unit]
-BindsTo=sonic.target
-After=sonic.target
diff --git a/files/image_config/resolv-config/update-containers b/files/image_config/resolv-config/update-containers
index 891fd2ea746..ca2ef3f8b2d 100755
--- a/files/image_config/resolv-config/update-containers
+++ b/files/image_config/resolv-config/update-containers
@@ -1,12 +1,120 @@
 #!/bin/bash
 
+SCRIPT_NAME=$(basename "$0")
+DEBUG=${DEBUG:-false}
+WAIT_TIMEOUT=5  # 5 seconds timeout for waiting containers to start
+
+# Function to log messages to syslog
+log_message() {
+    local level=$1
+    local message=$2
+    local caller=${FUNCNAME[1]}
+    # Skip debug messages if DEBUG is not true
+    if [[ "$level" == "debug" && "$DEBUG" != "true" ]]; then
+        return
+    fi
+    logger -t "resolv-config" -p "user.${level}" "[${SCRIPT_NAME}:${caller}] ${message}"
+}
+
+# Function to wait for container to start
+# Used only when updating a specific container that is not running
+wait_for_container() {
+    local container=$1
+    local start_time=$(date +%s)
+    local container_name=$(docker inspect --format '{{.Name}}' ${container} | sed 's/^\///')
+    while [[ $(($(date +%s) - start_time)) -lt $WAIT_TIMEOUT ]]; do
+        if docker inspect --format '{{.State.Status}}' ${container} | grep -q "running"; then
+            log_message "info" "Container ${container_name} (${container}) is now running"
+            return 0
+        fi
+        sleep 1
+    done
+    return 1
+}
+
+# Function to update resolv.conf for a single container
+# Parameters:
+#   $1: container ID
+#   $2: wait_for_start (optional) - if true, will attempt to start and wait for stopped containers
+update_container_resolv() {
+    local container=$1
+    local wait_for_start=${2:-false}  # Default to false for bulk updates
+    local container_name=$(docker inspect --format '{{.Name}}' ${container} | sed 's/^\///')
+    local container_state=$(docker inspect --format '{{.State.Status}}' ${container})
+    if [[ "$container_state" != "running" ]]; then
+        if [[ "$wait_for_start" == "true" ]]; then
+            log_message "debug" "Container ${container_name} (${container}) is not running, attempting to start it"
+            if ! docker start ${container}; then
+                log_message "error" "Failed to start container ${container_name} (${container})"
+                return 1
+            fi
+            if ! wait_for_container "$container"; then
+                log_message "error" "Container ${container_name} (${container}) failed to start within timeout"
+                return 1
+            fi
+        else
+            log_message "debug" "Container ${container_name} (${container}) is not running, skipping update"
+            return 0
+        fi
+    fi
+    if ! docker exec -t ${container} bash -c "echo '${RESOLV_CONTENT}' > /etc/resolv.conf"; then
+        log_message "info" "Failed to update resolv.conf for container ${container_name} (${container})"
+        return 1
+    fi
+    log_message "debug" "Successfully updated resolv.conf for container ${container_name} (${container})"
+}
+
+# Read resolv.conf content once
+RESOLV_CONTENT=$(cat /etc/resolv.conf)
+# Empty resolv.conf is valid, so we don't check for empty content
+if [[ ! -f /etc/resolv.conf ]]; then
+    log_message "error" "File /etc/resolv.conf does not exist"
+    exit 1
+fi
+
+# Check if a container name was provided as an argument
+if [[ $# -gt 0 ]]; then
+    container_name=$1
+    # Find container ID by name (including stopped containers)
+    container_id=$(docker ps -aq -f "name=^${container_name}$")
+    if [[ -z "$container_id" ]]; then
+        log_message "error" "Container with name '${container_name}' not found"
+        exit 1
+    fi
+    log_message "info" "Updating resolv.conf for container ${container_name}"
+    # For single container updates, attempt to start and wait if container is stopped
+    update_container_resolv "$container_id" "true"
+    exit $?
+fi
+
+# Check if networking service is active (only for bulk updates)
 networking_status=$(systemctl is-active networking.service 2>/dev/null)
 if [[ $networking_status != "active" ]]; then
+    log_message "info" "Networking service is not active, skipping container updates"
     exit 0
 fi
 
-for container in $(docker ps -q); do
-    docker cp -L /etc/resolv.conf ${container}:/_resolv.conf
-    docker exec -t ${container} bash -c "cat /_resolv.conf > /etc/resolv.conf"
-    docker exec -t ${container} bash -c "rm /_resolv.conf"
+# If no container name provided, update only running containers
+log_message "info" "Starting resolv.conf update for running containers"
+
+# Get list of running containers only
+containers=$(docker ps -q)
+container_count=$(echo "${containers}" | wc -l)
+log_message "info" "Found ${container_count} running containers to process"
+
+# Run updates in parallel using background processes
+# For bulk updates, skip any non-running containers without waiting
+for container in $containers; do
+    update_container_resolv "$container" "false" &
 done
+
+# Wait for all background processes to complete
+wait
+
+# Check if any updates failed
+if [[ $? -ne 0 ]]; then
+    log_message "error" "Some container updates failed"
+    exit 1
+fi
+
+log_message "info" "Completed resolv.conf updates for all running containers"
diff --git a/files/image_config/rsyslog/rsyslog-config.sh b/files/image_config/rsyslog/rsyslog-config.sh
index 9c2da978011..0760a04546c 100755
--- a/files/image_config/rsyslog/rsyslog-config.sh
+++ b/files/image_config/rsyslog/rsyslog-config.sh
@@ -25,8 +25,18 @@ fi
 
 hostname=$(hostname)
 
+syslog_with_osversion=$(sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "syslog_with_osversion")
+if [ -z "$syslog_with_osversion" ]; then
+    syslog_with_osversion="false"
+fi
+
+os_version=$(sonic-cfggen -y /etc/sonic/sonic_version.yml -v build_version)
+if [ -z "$os_version" ]; then
+    os_version="Unknown"
+fi
+
 sonic-cfggen -d -t /usr/share/sonic/templates/rsyslog.conf.j2 \
-    -a "{\"udp_server_ip\": \"$udp_server_ip\", \"hostname\": \"$hostname\", \"docker0_ip\": \"$docker0_ip\"}" \
+    -a "{\"udp_server_ip\": \"$udp_server_ip\", \"hostname\": \"$hostname\", \"docker0_ip\": \"$docker0_ip\", \"forward_with_osversion\": \"$syslog_with_osversion\", \"os_version\": \"$os_version\"}" \
     > /etc/rsyslog.conf
 
 systemctl restart rsyslog
diff --git a/files/image_config/rsyslog/rsyslog.conf.j2 b/files/image_config/rsyslog/rsyslog.conf.j2
index b68ba2e77e5..a7067750dd6 100644
--- a/files/image_config/rsyslog/rsyslog.conf.j2
+++ b/files/image_config/rsyslog/rsyslog.conf.j2
@@ -58,40 +58,19 @@ $UDPServerRun 514
 $template SONiCFileFormat,"%timegenerated:::date-year% %timegenerated%.%timegenerated:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
 $ActionFileDefaultTemplate SONiCFileFormat
 $template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$template SONiCForwardFormatWithOsVersion,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME%  {{os_version}} %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+
+{% if forward_with_osversion and forward_with_osversion == "true" %}
+$ActionForwardDefaultTemplate SONiCForwardFormatWithOsVersion
+{% else%}
 $ActionForwardDefaultTemplate SONiCForwardFormat
+{% endif%}
+
 
 template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall time=\"%timereported\
 :::date-year%-%timereported:::date-month%-%timereported:::date-day% %timereported:::date-hour%:%timereported:::date-minute%:%timereported\
 :::date-second%\" fw=\"{{ fw_name }}\" pri=%syslogpriority% msg=\"%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\"\n")
 
-#
-# Set the default permissions for all log files.
-#
-$FileOwner root
-$FileGroup adm
-$FileCreateMode 0640
-$DirCreateMode 0755
-$Umask 0022
-
-#
-# Where to place spool and state files
-#
-$WorkDirectory /var/spool/rsyslog
-
-#
-# Include all config files in /etc/rsyslog.d/
-#
-$IncludeConfig /etc/rsyslog.d/*.conf
-
-#
-# Suppress duplicate messages and report "message repeated n times"
-#
-$RepeatedMsgReduction on
-
-###############
-#### RULES ####
-###############
-
 #
 # Remote syslog logging
 #
@@ -114,7 +93,15 @@ $RepeatedMsgReduction on
 
 {% set fmodifier = '!' if filter == 'exclude' else '' %}
 {% set device = vrf if vrf != '' and vrf != 'default' -%}
-{% set template = 'WelfRemoteFormat' if format == 'welf' else 'SONiCForwardFormat' -%}
+
+{% if format == 'welf' %}
+{% set template = 'WelfRemoteFormat'%}
+{% elif forward_with_osversion and forward_with_osversion == "true"%}
+{% set template = 'SONiCForwardFormatWithOsVersion'%}
+{% else%}
+{% set template = 'SONiCForwardFormat'%}
+{% endif%}
+
 
 {# Server extra options -#}
 {% set options = '' -%}
@@ -134,3 +121,31 @@ $RepeatedMsgReduction on
 *.{{ severity }}
 action(type="omfwd" Target="{{ server }}" Port="{{ port }}" Protocol="{{ proto }}" Template="{{ template }}"{{ options }})
 {% endfor %}
+
+#
+# Set the default permissions for all log files.
+#
+$FileOwner root
+$FileGroup adm
+$FileCreateMode 0640
+$DirCreateMode 0755
+$Umask 0022
+
+#
+# Where to place spool and state files
+#
+$WorkDirectory /var/spool/rsyslog
+
+#
+# Include all config files in /etc/rsyslog.d/
+#
+$IncludeConfig /etc/rsyslog.d/*.conf
+
+#
+# Suppress duplicate messages and report "message repeated n times"
+#
+$RepeatedMsgReduction on
+
+###############
+#### RULES ####
+###############
diff --git a/files/image_config/sonic_release b/files/image_config/sonic_release
new file mode 100644
index 00000000000..18668166124
--- /dev/null
+++ b/files/image_config/sonic_release
@@ -0,0 +1 @@
+202505
diff --git a/files/image_config/watchdog-control/watchdog-control.sh b/files/image_config/watchdog-control/watchdog-control.sh
index f01b21d7e69..062d2ee8613 100755
--- a/files/image_config/watchdog-control/watchdog-control.sh
+++ b/files/image_config/watchdog-control/watchdog-control.sh
@@ -3,6 +3,11 @@
 VERBOSE=no
 WATCHDOG_UTIL="/usr/local/bin/watchdogutil"
 
+# read SONiC immutable variables
+[ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment
+PLATFORM=${PLATFORM:-$(sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' platform)}
+PLATFORM_JSON="/usr/share/sonic/device/$PLATFORM/platform.json"
+
 function debug()
 {
     /usr/bin/logger "$0 : $1"
@@ -34,6 +39,19 @@ function getBootType()
     echo "${TYPE}"
 }
 
+function is_smart_switch_dpu()
+{
+    if [[ ! -f "$PLATFORM_JSON" ]]; then
+        return 1
+    fi
+
+    if jq -e 'has("DPU")' "$PLATFORM_JSON" > /dev/null; then
+        return 0
+    else
+        return 1
+    fi
+}
+
 function disable_watchdog()
 {
     # Obtain boot type from kernel arguments
@@ -44,4 +62,20 @@ function disable_watchdog()
     fi
 }
 
-disable_watchdog
+function enable_watchdog()
+{
+    if [[ -x ${WATCHDOG_UTIL} ]]; then
+        debug "Enabling Watchdog"
+        ${WATCHDOG_UTIL} arm
+    fi
+}
+
+if is_smart_switch_dpu; then
+    # Keep watchdog enabled for smart switch DPUs
+    # Smart switch DPUs uses ARM SBSA Generic Watchdog,
+    # which is capable of monitoring the system in runtime.
+    enable_watchdog
+else
+    # Disable watchdog for all other platforms
+    disable_watchdog
+fi
diff --git a/files/initramfs-tools/union-mount.j2 b/files/initramfs-tools/union-mount.j2
index de2cb5c7596..6df78736405 100644
--- a/files/initramfs-tools/union-mount.j2
+++ b/files/initramfs-tools/union-mount.j2
@@ -218,9 +218,6 @@ mkdir -p ${rootmnt}/boot
 mkdir -p ${rootmnt}/host/$image_dir/boot
 mount --bind ${rootmnt}/host/$image_dir/boot ${rootmnt}/boot
 
-## Mount the /tmp directory as tmpfs
-mount -t tmpfs -o rw,nosuid,nodev,size=25% tmpfs ${rootmnt}/tmp
-
 ## Mount loop device or tmpfs for /var/log
 if $logs_inram; then
     # NOTE: some platforms, when reaching initramfs stage, have a small
diff --git a/files/scripts/arp_update b/files/scripts/arp_update
index ced805d5ace..b1cb8fdec1a 100755
--- a/files/scripts/arp_update
+++ b/files/scripts/arp_update
@@ -18,49 +18,59 @@ while /bin/true; do
   # find L3 interfaces which are UP, send ipv6 multicast pings
   ARP_UPDATE_VARS=$(sonic-cfggen -d -t ${ARP_UPDATE_VARS_FILE})
   SWITCH_TYPE=$(echo $ARP_UPDATE_VARS | jq -r '.switch_type')
-  if [[ "$SWITCH_TYPE" == "chassis-packet" ]]; then
+  TYPE=$(echo $ARP_UPDATE_VARS | jq -r '.type')
+  if [[ "$SWITCH_TYPE" == "chassis-packet" ]] || [[ "$TYPE" == "BackEndToRRouter" ]]; then
       # Get array of Nexthops and ifnames. Nexthops and ifnames are mapped one to one
       STATIC_ROUTE_NEXTHOPS=($(echo $ARP_UPDATE_VARS | jq -r '.static_route_nexthops'))
       STATIC_ROUTE_IFNAMES=($(echo $ARP_UPDATE_VARS | jq -r '.static_route_ifnames'))
-      # on supervisor/rp exit the script gracefully
+
       if [[ -z "$STATIC_ROUTE_NEXTHOPS" ]] || [[ -z "$STATIC_ROUTE_IFNAMES" ]]; then
-          logger "exiting as no static route in packet based chassis"
-          exit 0
-      fi
-      for i in ${!STATIC_ROUTE_NEXTHOPS[@]}; do
-          nexthop="${STATIC_ROUTE_NEXTHOPS[i]}"
-          if [[ $nexthop == *"."* ]]; then
-              neigh_state=$(ip -4 neigh show | grep -w $nexthop | tr -s ' ')
-              ping_prefix=ping
-          elif [[ $nexthop == *":"* ]] ; then
-              neigh_state=$(ip -6 neigh show | grep -w $nexthop | tr -s ' ')
-              ping_prefix=ping6
+          if [[ "$SWITCH_TYPE" == "chassis-packet" ]]; then
+              # exit gracefully if running on supervisor/rp
+              logger "exiting as no static route in packet based chassis"
+              exit 0
           fi
-          # Check if there is an INCOMPLETE, FAILED, or STALE entry and try to resolve it again.
-          # STALE entries may be present if there is no traffic on a path. A far-end down event may not
-          # clear the STALE entry. Refresh the STALE entry to clear the table.
-          if [[ -z "${neigh_state}" ]] || [[ -n $(echo ${neigh_state} | grep 'INCOMPLETE\|FAILED\|STALE') ]]; then
-              interface="${STATIC_ROUTE_IFNAMES[i]}"
-              if [[ -z "$interface" ]]; then
-                  # should never be here, handling just in case
-                  logger -p error "missing interface entry for static route $nexthop"
-                  continue
+          # continue if running on BT0
+      else
+          for i in ${!STATIC_ROUTE_NEXTHOPS[@]}; do
+              nexthop="${STATIC_ROUTE_NEXTHOPS[i]}"
+              if [[ $nexthop == *"."* ]]; then
+                  neigh_state=$(ip -4 neigh show | grep -w $nexthop | tr -s ' ')
+                  ping_prefix=ping
+              elif [[ $nexthop == *":"* ]] ; then
+                  neigh_state=$(ip -6 neigh show | grep -w $nexthop | tr -s ' ')
+                  ping_prefix=ping6
               fi
-              intf_up=$(ip link show $interface | grep "state UP")
-              if [[ -n "$intf_up" ]]; then
-                  pingcmd="timeout 0.2 $ping_prefix -I ${interface} -n -q -i 0 -c 1 -W 1 $nexthop >/dev/null"
-                  eval $pingcmd
-                  # STALE entries may appear more often, not logging to prevent periodic syslogs
-                  if [[ -z $(echo ${neigh_state} | grep 'STALE') ]]; then
-                      logger "static route nexthop not resolved ($neigh_state), pinging $nexthop on $interface"
+              # Check if there is an INCOMPLETE, FAILED, or STALE entry and try to resolve it again.
+              # STALE entries may be present if there is no traffic on a path. A far-end down event may not
+              # clear the STALE entry. Refresh the STALE entry to clear the table.
+              if [[ -z "${neigh_state}" ]] || [[ -n $(echo ${neigh_state} | grep 'INCOMPLETE\|FAILED\|STALE') ]]; then
+                  interface="${STATIC_ROUTE_IFNAMES[i]}"
+                  if [[ -z "$interface" ]]; then
+                      # should never be here, handling just in case
+                      logger -p error "missing interface entry for static route $nexthop"
+                      continue
+                  fi
+                  intf_up=$(ip link show $interface | grep "state UP")
+                  if [[ -n "$intf_up" ]]; then
+                      pingcmd="timeout 0.2 $ping_prefix -I ${interface} -n -q -i 0 -c 1 -W 1 $nexthop >/dev/null"
+                      eval $pingcmd
+                      # STALE entries may appear more often, not logging to prevent periodic syslogs
+                      if [[ -z $(echo ${neigh_state} | grep 'STALE') ]]; then
+                          logger "static route nexthop not resolved ($neigh_state), pinging $nexthop on $interface"
+                      fi
                   fi
               fi
-          fi
-      done
+          done
 
-      sleep 150
-      continue
+          if [[ "$SWITCH_TYPE" == "chassis-packet" ]]; then
+            sleep 150
+            # skip the rest of the script if running on a packet chassis
+            continue
+          fi
+      fi
   fi
+
   # find L3 interfaces which are UP, send ipv6 multicast pings
   INTERFACE=$(echo $ARP_UPDATE_VARS | jq -r '.interface')
   PC_INTERFACE=$(echo $ARP_UPDATE_VARS | jq -r '.pc_interface')
@@ -122,7 +132,7 @@ while /bin/true; do
       ndisc6cmd="sed -e 's/^/ndisc6 -q -w 0 -1 /' -e 's/$/;/'"
       ip6cmd="ip -6 neigh show | grep -v fe80 | grep $vlan | cut -d ' ' -f 1,3 | $ndisc6cmd"
       eval `eval $ip6cmd`
- 
+
       if [[ $SUBTYPE == "dualtor" ]]; then
         # capture all current failed/incomplete IPv6 neighbors in the kernel to avoid situations where new neighbors are learned
         # in the middle of the below sequence of commands
@@ -161,13 +171,13 @@ while /bin/true; do
         # ip neigh replace <neighbor IPv6> dev <VLAN name> nud incomplete
         failed_kernel_neighbors=$(ip -6 neigh show | grep -v fe80 | grep $vlan | grep -E 'FAILED')
         if [[ ! -z "$failed_kernel_neighbors" ]]; then
-            neigh_replace_template="sed -e 's/^/ip neigh replace /' -e 's/,/ dev /' -e 's/$/ nud incomplete;/'" 
+            neigh_replace_template="sed -e 's/^/ip neigh replace /' -e 's/,/ dev /' -e 's/$/ nud incomplete;/'"
             ip_neigh_replace_cmd="echo \"$failed_kernel_neighbors\" | cut -d ' ' -f 1,3 --output-delimiter=',' | $neigh_replace_template"
             eval `eval "$ip_neigh_replace_cmd"`
         fi
       fi
   done
-  
+
 
   # sleep here before handling the mismatch as it is not required during startup
   sleep 300
diff --git a/files/scripts/asic_status.sh b/files/scripts/asic_status.sh
index e3140eda598..2e67b2a901b 100755
--- a/files/scripts/asic_status.sh
+++ b/files/scripts/asic_status.sh
@@ -2,8 +2,13 @@
 
 is_chassis_supervisor() {
     if [ -f /etc/sonic/chassisdb.conf ]; then
-        true
-        return
+        PLATFORM=$(sonic-db-cli CONFIG_DB HGET "DEVICE_METADATA|localhost" "platform")
+        PLATFORM_ENV_CONF=/usr/share/sonic/device/$PLATFORM/platform_env.conf
+        [ -f $PLATFORM_ENV_CONF ] && . $PLATFORM_ENV_CONF
+        if [[ $disaggregated_chassis -ne 1 ]]; then
+            true
+            return
+        fi
     fi
     false
     return
diff --git a/files/scripts/dash-ha.sh b/files/scripts/dash-ha.sh
new file mode 100755
index 00000000000..8cc3d9dd7e9
--- /dev/null
+++ b/files/scripts/dash-ha.sh
@@ -0,0 +1,41 @@
+#!/bin/bash
+
+function debug()
+{
+    /usr/bin/logger $1
+    /bin/echo `date` "- $1" >> ${DEBUGLOG}
+}
+
+start() {
+    debug "Starting ${SERVICE}$DEV service..."
+
+    # start service docker
+    /usr/bin/${SERVICE}.sh start $DEV
+    debug "Started ${SERVICE}$DEV service..."
+}
+
+wait() {
+    /usr/bin/${SERVICE}.sh wait $DEV
+}
+
+stop() {
+    debug "Stopping ${SERVICE}$DEV service..."
+
+    /usr/bin/${SERVICE}.sh stop $DEV
+    debug "Stopped ${SERVICE}$DEV service..."
+}
+
+DEV=$2
+
+SERVICE="dash-ha"
+DEBUGLOG="/tmp/dash-ha$DEV.log"
+
+case "$1" in
+    start|wait|stop)
+        $1
+        ;;
+    *)
+        echo "Usage: $0 {start|wait|stop}"
+        exit 1
+        ;;
+esac
diff --git a/files/scripts/network_setup b/files/scripts/network_setup
new file mode 100644
index 00000000000..045dffc5ad0
--- /dev/null
+++ b/files/scripts/network_setup
@@ -0,0 +1,22 @@
+#!/bin/sh
+PREREQ=""
+
+prereqs() {
+    echo "$PREREQ"
+}
+
+case "$1" in
+    prereqs)
+        prereqs
+        exit 0
+        ;;
+esac
+
+. /usr/share/initramfs-tools/hook-functions
+
+# Add dhclient and its dependencies
+copy_exec /sbin/dhclient /sbin
+copy_exec /sbin/dhclient-script /sbin
+
+# Add the necessary network modules
+manual_add_modules e1000e
diff --git a/files/scripts/network_setup.sh b/files/scripts/network_setup.sh
new file mode 100644
index 00000000000..53e355ec0d2
--- /dev/null
+++ b/files/scripts/network_setup.sh
@@ -0,0 +1,56 @@
+#!/bin/sh
+
+# Read USE_KDUMP variable from /etc/default/kdump-tools
+if [ -f /etc/default/kdump-tools ]; then
+    . /etc/default/kdump-tools
+else
+    USE_KDUMP=0  # Default to 0 if the file doesn't exist
+fi
+
+# Check if USE_KDUMP is enabled or disabled.
+if [ "$USE_KDUMP" -ne 1 ]; then
+    echo "KDUMP is not enabled. Skipping network setup."
+    exit 0
+fi
+
+# Function to get the IP address of the eth0 interface
+get_eth0_ip() {
+    ip addr show eth0 | grep 'inet ' | awk '{print $2}' | cut -d'/' -f1
+}
+
+# Function to get the default gateway
+get_default_gateway() {
+    ip route | grep default | awk '{print $3}'
+}
+
+# Wait for the network interface to appear
+for i in {1..10}; do
+    if ip link show eth0; then
+        break
+    fi
+    sleep 1
+done
+
+# Bring up the network interface
+ip link set eth0 up
+
+# Use DHCP to obtain IP address and default gateway
+dhclient eth0
+# Wait a few seconds to ensure the IP is assigned
+sleep 6
+ETH0_IP=$(get_eth0_ip)
+DEFAULT_GW=$(get_default_gateway)
+
+if [ -z "$ETH0_IP" ] || [ -z "$DEFAULT_GW" ]; then
+    echo "DHCP failed to assign IP. Please enter a static IP and gateway."
+
+    read -p "Enter static IP address: " STATIC_IP
+    read -p "Enter default gateway: " STATIC_GW
+
+    # Set the static IP and gateway
+    ip addr add $STATIC_IP/24 dev eth0
+    ip route add default via $STATIC_GW
+else
+
+    echo "DHCP succeeded. IP: $ETH0_IP, Gateway: $DEFAULT_GW"
+fi
\ No newline at end of file
diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh
index aa4c4ee1f77..bd9c9316080 100755
--- a/files/scripts/swss.sh
+++ b/files/scripts/swss.sh
@@ -339,6 +339,17 @@ start() {
         $SONIC_DB_CLI APPL_STATE_DB FLUSHDB
         clean_up_chassis_db_tables
         rm -rf /tmp/cache
+        MEDIA_SETTINGS="/usr/share/sonic/device/$PLATFORM/media_settings.json"
+        if [ -f $MEDIA_SETTINGS ]; then
+            if [ "$( docker inspect -f '{{.State.Running}}' pmon )" != "true" ]; then
+                debug "pmon not running so skip restarting xcvrd"
+            else
+                # Need to restart XCVRD on media_settings.json skus due to
+                # https://github.com/sonic-net/sonic-buildimage/issues/21902
+                debug "Restarting xcvrd service..."
+                /usr/bin/docker exec pmon supervisorctl restart xcvrd
+            fi
+        fi
     fi
 
     # On supervisor card, skip starting asic related services here. In wait(),
diff --git a/files/scripts/write_standby.py b/files/scripts/write_standby.py
index 13009922f57..9d882cdf58f 100755
--- a/files/scripts/write_standby.py
+++ b/files/scripts/write_standby.py
@@ -136,7 +136,7 @@ def tunnel_exists(self):
         tunnel_key_pattern = 'ASIC_STATE:SAI_OBJECT_TYPE_TUNNEL:*'
         return len(self.asic_db.keys('ASIC_DB', tunnel_key_pattern)) > 0
 
-    def wait_for_tunnel(self, interval=1, timeout=90):
+    def wait_for_tunnel(self, interval=1, timeout=160):
         """
         Waits until the IP-in-IP tunnel has been created
 
diff --git a/get_docker-base.sh b/get_docker-base.sh
index 0951e5fa1f5..91359c49bed 100755
--- a/get_docker-base.sh
+++ b/get_docker-base.sh
@@ -12,7 +12,7 @@ set -x -e
 TARGET_PATH=$(sed -n 's/TARGET_PATH\s*=\s*//p' slave.mk)
 
 ## [SuppressMessage("Microsoft.Security", "CS002:SecretInNextLine", Justification="Read-only link of Azure Blob storage with shared access signature (SAS)")]
-BASE_URL="https://sonicstorage.blob.core.windows.net/public/docker-base.ea507753d98b0769e2a15be13003331f8ad38d1c15b40a683e05fc53b1463b10.gz"
+BASE_URL="https://packages.trafficmanager.net/public/docker-base.ea507753d98b0769e2a15be13003331f8ad38d1c15b40a683e05fc53b1463b10.gz"
 
 base_image_name=docker-base
 docker_try_rmi $base_image_name
diff --git a/installer/default_platform.conf b/installer/default_platform.conf
index 04cae5995ac..c8d10b94401 100755
--- a/installer/default_platform.conf
+++ b/installer/default_platform.conf
@@ -484,6 +484,9 @@ bootloader_menu_config()
     if echo "$CPUVENDOR" | grep -i 'Intel' >/dev/null 2>&1; then
         echo "Switch CPU cstates are: disabled"
         CSTATES="processor.max_cstate=1 intel_idle.max_cstate=0"
+    elif echo "$CPUVENDOR" | grep -i 'AMD' >/dev/null 2>&1; then
+        echo "Switch CPU cstates are: disabled"
+        CSTATES="processor.max_cstate=1 amd_idle.max_cstate=0"
     else
         CSTATES=""
     fi
@@ -590,13 +593,13 @@ menuentry '$demo_grub_entry' {
         if [ x$grub_platform = xxen ]; then insmod xzio; insmod lzopio; fi
         insmod part_msdos
         insmod ext2
-        $GRUB_CFG_LINUX_CMD   /$image_dir/boot/vmlinuz-6.1.0-22-2-${arch} root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX  \
+        $GRUB_CFG_LINUX_CMD   /$image_dir/boot/vmlinuz-6.1.0-29-2-${arch} root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX  \
                 net.ifnames=0 biosdevname=0 \
                 loop=$image_dir/$FILESYSTEM_SQUASHFS loopfstype=squashfs                       \
                 systemd.unified_cgroup_hierarchy=0 \
                 apparmor=1 security=apparmor varlog_size=$VAR_LOG_SIZE usbcore.autosuspend=-1 $ONIE_PLATFORM_EXTRA_CMDLINE_LINUX
         echo    'Loading $demo_volume_label $demo_type initial ramdisk ...'
-        $GRUB_CFG_INITRD_CMD  /$image_dir/boot/initrd.img-6.1.0-22-2-${arch}
+        $GRUB_CFG_INITRD_CMD  /$image_dir/boot/initrd.img-6.1.0-29-2-${arch}
 }
 EOF
 
diff --git a/onie-image-arm64.conf b/onie-image-arm64.conf
index 28f83855d77..c5a35c0badb 100644
--- a/onie-image-arm64.conf
+++ b/onie-image-arm64.conf
@@ -28,7 +28,7 @@ FILESYSTEM_DOCKERFS=dockerfs.tar.gz
 DOCKERFS_DIR=docker
 
 ## docker ramfs disk space
-DOCKER_RAMFS_SIZE=2500M
+DOCKER_RAMFS_SIZE=3500M
 
 ## Output file name for onie installer
 OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE.bin
diff --git a/onie-image-armhf.conf b/onie-image-armhf.conf
index f3d88fc6f97..85629edb59c 100644
--- a/onie-image-armhf.conf
+++ b/onie-image-armhf.conf
@@ -28,7 +28,7 @@ FILESYSTEM_DOCKERFS=dockerfs.tar.gz
 DOCKERFS_DIR=docker
 
 ## docker ramfs disk space
-DOCKER_RAMFS_SIZE=2500M
+DOCKER_RAMFS_SIZE=3500M
 
 ## Output file name for onie installer
 OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.bin
diff --git a/onie-image.conf b/onie-image.conf
index c61008f7f0c..a7328aa5718 100644
--- a/onie-image.conf
+++ b/onie-image.conf
@@ -28,7 +28,7 @@ FILESYSTEM_DOCKERFS=dockerfs.tar.gz
 DOCKERFS_DIR=docker
 
 ## docker ramfs disk space
-DOCKER_RAMFS_SIZE=2500M
+DOCKER_RAMFS_SIZE=3500M
 
 ## Output file name for onie installer
 OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE.bin
diff --git a/platform/barefoot/bfn-modules/debian/control b/platform/barefoot/bfn-modules/debian/control
index 1d7a74bde59..7496dc58bed 100644
--- a/platform/barefoot/bfn-modules/debian/control
+++ b/platform/barefoot/bfn-modules/debian/control
@@ -7,6 +7,6 @@ Standards-Version: 3.9.3
 
 Package: bfn-modules
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for bfn asic for mmap
 
diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista
index 589c02ff643..7fb67de3124 160000
--- a/platform/barefoot/sonic-platform-modules-arista
+++ b/platform/barefoot/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit 589c02ff64379f22febb360ab195767ae56b7873
+Subproject commit 7fb67de3124c26bab817aa6c457dd64c52afa7ec
diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control
index eff91a7fa33..53d3f4949c9 100644
--- a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control
+++ b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control
@@ -7,6 +7,6 @@ Standards-Version: 3.9.3
 
 Package: sonic-platform-modules-bfn-montara
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control
index 0bcc98273d6..67d10a387a0 100644
--- a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control
+++ b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control
@@ -7,11 +7,11 @@ Standards-Version: 3.9.3
 
 Package: sonic-platform-modules-bfn-newport-as9516
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel module for bfn platform fpga and scripts for the devices such as fan, led, sfp
 
 Package: sonic-platform-modules-bfn-newport-as9516bf
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel module for bfn platform fpga and scripts for the devices such as fan, led, sfp
 
diff --git a/platform/barefoot/sonic-platform-modules-bfn/debian/control b/platform/barefoot/sonic-platform-modules-bfn/debian/control
index 78a556eead0..abc535abe3c 100644
--- a/platform/barefoot/sonic-platform-modules-bfn/debian/control
+++ b/platform/barefoot/sonic-platform-modules-bfn/debian/control
@@ -7,6 +7,6 @@ Standards-Version: 3.9.3
 
 Package: sonic-platform-modules-bfn
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control
index 7e60b796ce2..871bc30083d 100644
--- a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control
+++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control
@@ -7,6 +7,6 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-wnc-osw1800
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
diff --git a/platform/broadcom/docker-saiserver-brcm.mk b/platform/broadcom/docker-saiserver-brcm.mk
index 389578d98b7..dd6324e0f26 100644
--- a/platform/broadcom/docker-saiserver-brcm.mk
+++ b/platform/broadcom/docker-saiserver-brcm.mk
@@ -3,13 +3,14 @@
 DOCKER_SAISERVER_BRCM = docker-saiserver$(SAITHRIFT_VER)-brcm.gz
 $(DOCKER_SAISERVER_BRCM)_PATH = $(PLATFORM_PATH)/docker-saiserver-brcm
 $(DOCKER_SAISERVER_BRCM)_DEPENDS += $(SAISERVER)
+$(DOCKER_SAISERVER_BRCM)_DEPENDS += $(SSWSYNCD)
 
 # Use syncd_init_common.sh to init hardware platform
 SYNCD_INIT_COMMON_SCRIPT = syncd_init_common.sh
 $(SYNCD_INIT_COMMON_SCRIPT)_PATH = $(SRC_PATH)/sonic-sairedis/syncd/scripts
 SONIC_COPY_FILES += $(SYNCD_INIT_COMMON_SCRIPT)
 
-$(DOCKER_SAISERVER_BRCM)_FILES += $(DSSERVE) $(BCMCMD) $(SYNCD_INIT_COMMON_SCRIPT)
+$(DOCKER_SAISERVER_BRCM)_FILES += $(SYNCD_INIT_COMMON_SCRIPT)
 $(DOCKER_SAISERVER_BRCM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_BRCM)
 SONIC_BOOKWORM_DOCKERS += $(DOCKER_SAISERVER_BRCM)
diff --git a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
index 88c04a3136d..ef98780eb1c 100644
--- a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
+++ b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
@@ -4,6 +4,7 @@ DOCKER_SYNCD_BRCM_DNX_RPC = docker-syncd-brcm-dnx-rpc.gz
 DOCKER_SYNCD_DNX_BASE = docker-syncd-brcm-dnx.gz
 $(DOCKER_SYNCD_BRCM_DNX_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-brcm-dnx-rpc
 $(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC)
+$(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SSWSYNCD)
 ifeq ($(INSTALL_DEBUG_TOOLS), y)
 $(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
                                     $(LIBSWSSCOMMON_DBG) \
@@ -11,7 +12,7 @@ $(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
                                     $(LIBSAIREDIS_DBG)
 endif
 $(DOCKER_SYNCD_BRCM_DNX_RPC)_PYTHON_WHEELS += $(PTF_PY3)
-$(DOCKER_SYNCD_BRCM_DNX_RPC)_FILES += $(DSSERVE) $(BCMCMD) $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
+$(DOCKER_SYNCD_BRCM_DNX_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 $(DOCKER_SYNCD_BRCM_DNX_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_DNX_BASE)
 SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_DNX_RPC)
 ifeq ($(ENABLE_SYNCD_RPC),y)
diff --git a/platform/broadcom/docker-syncd-brcm-dnx.mk b/platform/broadcom/docker-syncd-brcm-dnx.mk
index febb19c4931..1b765b56228 100644
--- a/platform/broadcom/docker-syncd-brcm-dnx.mk
+++ b/platform/broadcom/docker-syncd-brcm-dnx.mk
@@ -24,7 +24,8 @@ endif
 
 $(DOCKER_SYNCD_DNX_BASE)_DEPENDS += $(SYNCD)
 $(DOCKER_SYNCD_DNX_BASE)_DEPENDS += $(BRCM_DNX_SAI)
-$(DOCKER_SYNCD_DNX_BASE)_FILES += $(DSSERVE) $(BCMCMD) $(RDB-CLI)
+$(DOCKER_SYNCD_DNX_BASE)_DEPENDS += $(SSWSYNCD)
+$(DOCKER_SYNCD_DNX_BASE)_FILES += $(RDB-CLI)
 
 ifeq ($(INSTALL_DEBUG_TOOLS), y)
 $(DOCKER_SYNCD_DNX_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
diff --git a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
index 6bceef873d5..3de94b192ed 100755
--- a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
+++ b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
@@ -23,8 +23,8 @@ RUN apt-get install -yf kmod
 ## BRCM uses ethtool to set host interface speed
 RUN apt-get install -y ethtool
 
-COPY ["files/dsserve", "files/bcmcmd", "start.sh", "start_led.sh", "bcmsh", "files/rdb-cli", "/usr/bin/"]
-RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd /usr/bin/rdb-cli
+COPY ["start.sh", "start_led.sh", "bcmsh", "files/rdb-cli", "/usr/bin/"]
+RUN chmod +x /usr/bin/rdb-cli
 
 COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
diff --git a/platform/broadcom/docker-syncd-brcm-rpc.mk b/platform/broadcom/docker-syncd-brcm-rpc.mk
index 98e443a9f13..9077482ac40 100644
--- a/platform/broadcom/docker-syncd-brcm-rpc.mk
+++ b/platform/broadcom/docker-syncd-brcm-rpc.mk
@@ -7,10 +7,11 @@ ifeq ($(INSTALL_DEBUG_TOOLS), y)
 $(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
                                     $(LIBSWSSCOMMON_DBG) \
                                     $(LIBSAIMETADATA_DBG) \
-                                    $(LIBSAIREDIS_DBG)
+                                    $(LIBSAIREDIS_DBG) \
+                                    $(SSWSYNCD)
 endif
 $(DOCKER_SYNCD_BRCM_RPC)_PYTHON_WHEELS += $(PTF_PY3)
-$(DOCKER_SYNCD_BRCM_RPC)_FILES += $(DSSERVE) $(BCMCMD) $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
+$(DOCKER_SYNCD_BRCM_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 $(DOCKER_SYNCD_BRCM_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE)
 SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_RPC)
 ifeq ($(ENABLE_SYNCD_RPC),y)
diff --git a/platform/broadcom/docker-syncd-brcm.dep b/platform/broadcom/docker-syncd-brcm.dep
index c020a72f2a0..c5160690b10 100644
--- a/platform/broadcom/docker-syncd-brcm.dep
+++ b/platform/broadcom/docker-syncd-brcm.dep
@@ -1,10 +1,10 @@
 #DPKG FRK
 DPATH       := $($(DOCKER_SYNCD_BASE)_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/broadcom/docker-syncd-brcm.mk platform/broadcom/docker-syncd-brcm.dep platform/broadcom/sai.mk 
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/broadcom/docker-syncd-brcm.mk platform/broadcom/docker-syncd-brcm.dep platform/broadcom/sai.mk
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(DPATH))
 
-$(DOCKER_SYNCD_BASE)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(DOCKER_SYNCD_BASE)_CACHE_MODE  := GIT_CONTENT_SHA
 $(DOCKER_SYNCD_BASE)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
 $(DOCKER_SYNCD_BASE)_DEP_FILES   := $(DEP_FILES)
 
diff --git a/platform/broadcom/docker-syncd-brcm.mk b/platform/broadcom/docker-syncd-brcm.mk
index 24b36640f03..8ae78a6bf30 100644
--- a/platform/broadcom/docker-syncd-brcm.mk
+++ b/platform/broadcom/docker-syncd-brcm.mk
@@ -5,7 +5,8 @@ include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
 
 $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD)
 $(DOCKER_SYNCD_BASE)_DEPENDS += $(BRCM_XGS_SAI)
-$(DOCKER_SYNCD_BASE)_FILES += $(DSSERVE) $(BCMCMD) $(RDB-CLI)
+$(DOCKER_SYNCD_BASE)_DEPENDS += $(SSWSYNCD)
+$(DOCKER_SYNCD_BASE)_FILES += $(RDB-CLI)
 
 $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
                                 $(LIBSWSSCOMMON_DBG) \
diff --git a/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2
index 4dd4dbc0b21..85578f6e9e3 100755
--- a/platform/broadcom/docker-syncd-brcm/Dockerfile.j2
+++ b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2
@@ -23,8 +23,8 @@ RUN apt-get install -yf kmod
 ## BRCM uses ethtool to set host interface speed
 RUN apt-get install -y ethtool
 
-COPY ["files/dsserve", "files/bcmcmd", "start.sh", "start_led.sh", "bcmsh", "files/rdb-cli", "/usr/bin/"]
-RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd /usr/bin/rdb-cli
+COPY ["start.sh", "start_led.sh", "bcmsh", "files/rdb-cli", "/usr/bin/"]
+RUN chmod +x /usr/bin/rdb-cli
 
 COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index 1af454dbc3a..a2476e4cb40 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -85,10 +85,15 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(RUIJIE_B6510_48VS8CQ_PLATFORM_MODULE) \
                                $(RAGILE_RA_B6510_48V8C_PLATFORM_MODULE) \
                                $(NOKIA_IXR7250_PLATFORM_MODULE) \
+                               $(NOKIA_IXR7220D4_PLATFORM_MODULE) \
                                $(NOKIA_IXR7220H3_PLATFORM_MODULE) \
                                $(NOKIA_IXR7220H4_32D_PLATFORM_MODULE) \
                                $(NOKIA_IXR7220H4_64D_PLATFORM_MODULE) \
+                               $(NOKIA_IXR7220H5_64O_PLATFORM_MODULE) \
                                $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE) \
+                               $(NOKIA_IXR7220H5_32D_PLATFORM_MODULE) \
+                               $(NOKIA_IXR7250X1B_PLATFORM_MODULE) \
+                               $(NOKIA_IXR7250X3B_PLATFORM_MODULE) \
                                $(TENCENT_TCS8400_PLATFORM_MODULE) \
                                $(TENCENT_TCS9400_PLATFORM_MODULE) \
                                $(UFISPACE_S6301_56ST_PLATFORM_MODULE) \
@@ -98,6 +103,8 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(UFISPACE_S9300_32D_PLATFORM_MODULE) \
                                $(UFISPACE_S9301_32D_PLATFORM_MODULE) \
                                $(UFISPACE_S9301_32DB_PLATFORM_MODULE) \
+                               $(UFISPACE_S9321_64E_PLATFORM_MODULE) \
+                               $(UFISPACE_S9321_64EO_PLATFORM_MODULE) \
                                $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE) \
@@ -117,3 +124,4 @@ $(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES)
 endif
 
 SONIC_INSTALLERS += $(SONIC_ONE_IMAGE)
+
diff --git a/platform/broadcom/platform-modules-arista.mk b/platform/broadcom/platform-modules-arista.mk
index ea31d341857..bf1ab1e1128 100644
--- a/platform/broadcom/platform-modules-arista.mk
+++ b/platform/broadcom/platform-modules-arista.mk
@@ -23,7 +23,7 @@ export ARISTA_PLATFORM_MODULE \
        ARISTA_PLATFORM_MODULE_DRIVERS \
        ARISTA_PLATFORM_MODULE_LIBS
 
-ARISTA_FWUTIL_VERSION = 1.0.1
+ARISTA_FWUTIL_VERSION = 1.0.3
 ARISTA_FWUTIL = arista-fwutil_$(ARISTA_FWUTIL_VERSION)_amd64.deb
 $(ARISTA_FWUTIL)_PATH = $(PLATFORM_PATH)/extra-debs
 
diff --git a/platform/broadcom/platform-modules-nokia.mk b/platform/broadcom/platform-modules-nokia.mk
index b671de05844..eb830efb13c 100644
--- a/platform/broadcom/platform-modules-nokia.mk
+++ b/platform/broadcom/platform-modules-nokia.mk
@@ -1,16 +1,22 @@
 # Nokia Platform modules
 
 NOKIA_IXR7250_PLATFORM_MODULE_VERSION = 1.0
+NOKIA_IXR7220D4_PLATFORM_MODULE_VERSION = 1.0
 NOKIA_IXR7220H3_PLATFORM_MODULE_VERSION = 1.0
 NOKIA_IXR7220H4_32D_PLATFORM_MODULE_VERSION = 1.0
 NOKIA_IXR7220H4_64D_PLATFORM_MODULE_VERSION = 1.0
 NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION = 1.0
+NOKIA_IXR7220H5_64O_PLATFORM_MODULE_VERSION = 1.0
+NOKIA_IXR7220H5_32D_PLATFORM_MODULE_VERSION = 1.0
 
 export NOKIA_IXR7250_PLATFORM_MODULE_VERSION
+export NOKIA_IXR7220D4_PLATFORM_MODULE_VERSION
 export NOKIA_IXR7220H3_PLATFORM_MODULE_VERSION
 export NOKIA_IXR7220H4_32D_PLATFORM_MODULE_VERSION
 export NOKIA_IXR7220H4_64D_PLATFORM_MODULE_VERSION
 export NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION
+export NOKIA_IXR7220H5_64O_PLATFORM_MODULE_VERSION
+export NOKIA_IXR7220H5_32D_PLATFORM_MODULE_VERSION
 
 NOKIA_IXR7250_PLATFORM_MODULE = sonic-platform-nokia-chassis_$(NOKIA_IXR7250_PLATFORM_MODULE_VERSION)_amd64.deb
 $(NOKIA_IXR7250_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-nokia
@@ -19,6 +25,11 @@ $(NOKIA_IXR7250_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7250e_sup-r0
 $(NOKIA_IXR7250_PLATFORM_MODULE)_PLATFORM += x86_64-nokia_ixr7250e_36x400g-r0
 SONIC_DPKG_DEBS += $(NOKIA_IXR7250_PLATFORM_MODULE)
 
+NOKIA_IXR7220D4_PLATFORM_MODULE = sonic-platform-nokia-ixr7220d4_$(NOKIA_IXR7220D4_PLATFORM_MODULE_VERSION)_amd64.deb
+$(NOKIA_IXR7220D4_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+$(NOKIA_IXR7220D4_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_d4-r0
+$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220D4_PLATFORM_MODULE)))
+
 NOKIA_IXR7220H3_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h3_$(NOKIA_IXR7220H3_PLATFORM_MODULE_VERSION)_amd64.deb
 $(NOKIA_IXR7220H3_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) 
 $(NOKIA_IXR7220H3_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h3-r0
@@ -34,7 +45,27 @@ $(NOKIA_IXR7220H4_64D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADE
 $(NOKIA_IXR7220H4_64D_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h4-r0
 $(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H4_64D_PLATFORM_MODULE)))
 
+NOKIA_IXR7220H5_64O_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h5-64o_$(NOKIA_IXR7220H5_64O_PLATFORM_MODULE_VERSION)_amd64.deb
+$(NOKIA_IXR7220H5_64O_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+$(NOKIA_IXR7220H5_64O_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h5_64o-r0
+$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H5_64O_PLATFORM_MODULE)))
+
 NOKIA_IXR7220H5_64D_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h5-64d_$(NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION)_amd64.deb
 $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) 
 $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h5_64d-r0
 $(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H5_64D_PLATFORM_MODULE)))
+
+NOKIA_IXR7220H5_32D_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h5-32d_$(NOKIA_IXR7220H5_32D_PLATFORM_MODULE_VERSION)_amd64.deb
+$(NOKIA_IXR7220H5_32D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) 
+$(NOKIA_IXR7220H5_32D_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h5_32d-r0
+$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H5_32D_PLATFORM_MODULE)))
+
+NOKIA_IXR7250X1B_PLATFORM_MODULE = sonic-platform-nokia-ixr7250x1b_$(NOKIA_IXR7250_PLATFORM_MODULE_VERSION)_amd64.deb
+$(NOKIA_IXR7250X1B_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+$(NOKIA_IXR7250X1B_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7250_x1b-r0
+$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7250X1B_PLATFORM_MODULE)))
+
+NOKIA_IXR7250X3B_PLATFORM_MODULE = sonic-platform-nokia-ixr7250x3b_$(NOKIA_IXR7250_PLATFORM_MODULE_VERSION)_amd64.deb
+$(NOKIA_IXR7250X3B_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+$(NOKIA_IXR7250X3B_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7250_x3b-r0
+$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7250X3B_PLATFORM_MODULE)))
diff --git a/platform/broadcom/platform-modules-ufispace.mk b/platform/broadcom/platform-modules-ufispace.mk
index 18bba6f5088..6087a036741 100644
--- a/platform/broadcom/platform-modules-ufispace.mk
+++ b/platform/broadcom/platform-modules-ufispace.mk
@@ -3,6 +3,8 @@
 UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION = 1.0.0
 UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION = 1.0.0
 UFISPACE_S9301_32DB_PLATFORM_MODULE_VERSION = 1.0.0
+UFISPACE_S9321_64E_PLATFORM_MODULE_VERSION = 1.0.0
+UFISPACE_S9321_64EO_PLATFORM_MODULE_VERSION = 1.0.0
 UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION = 1.0.0
 UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION = 1.0.0
 UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION = 1.0.0
@@ -11,6 +13,8 @@ UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION = 1.0.0
 export UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION
 export UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION
 export UFISPACE_S9301_32DB_PLATFORM_MODULE_VERSION
+export UFISPACE_S9321_64E_PLATFORM_MODULE_VERSION
+export UFISPACE_S9321_64EO_PLATFORM_MODULE_VERSION
 export UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION
 export UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION
 export UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION
@@ -30,6 +34,14 @@ UFISPACE_S9301_32DB_PLATFORM_MODULE = sonic-platform-ufispace-s9301-32db_$(UFISP
 $(UFISPACE_S9301_32DB_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9301_32db-r0
 $(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9301_32DB_PLATFORM_MODULE)))
 
+UFISPACE_S9321_64E_PLATFORM_MODULE = sonic-platform-ufispace-s9321-64e_$(UFISPACE_S9321_64E_PLATFORM_MODULE_VERSION)_amd64.deb
+$(UFISPACE_S9321_64E_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9321_64e-r0
+$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9321_64E_PLATFORM_MODULE)))
+
+UFISPACE_S9321_64EO_PLATFORM_MODULE = sonic-platform-ufispace-s9321-64eo_$(UFISPACE_S9321_64EO_PLATFORM_MODULE_VERSION)_amd64.deb
+$(UFISPACE_S9321_64EO_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9321_64eo-r0
+$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9321_64EO_PLATFORM_MODULE)))
+
 UFISPACE_S9110_32X_PLATFORM_MODULE = sonic-platform-ufispace-s9110-32x_$(UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION)_amd64.deb
 $(UFISPACE_S9110_32X_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9110_32x-r0
 $(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9110_32X_PLATFORM_MODULE)))
diff --git a/platform/broadcom/rules.dep b/platform/broadcom/rules.dep
index fbdbb865e4d..2c1731c21bc 100644
--- a/platform/broadcom/rules.dep
+++ b/platform/broadcom/rules.dep
@@ -25,6 +25,7 @@ include $(PLATFORM_PATH)/platform-modules-micas.dep
 include $(PLATFORM_PATH)/docker-syncd-brcm.dep
 include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.dep
 include $(PLATFORM_PATH)/docker-saiserver-brcm.dep
+include $(PLATFORM_PATH)/sswsyncd.dep
 ifeq ($(INCLUDE_PDE), y)
 include $(PLATFORM_PATH)/docker-pde.dep
 include $(PLATFORM_PATH)/sonic-pde-tests.dep
@@ -38,4 +39,5 @@ include $(PLATFORM_PATH)/docker-syncd-brcm-dnx-rpc.dep
 ifeq ($(INCLUDE_GBSYNCD), y)
 include $(PLATFORM_PATH)/../components/docker-gbsyncd-credo.dep
 include $(PLATFORM_PATH)/../components/docker-gbsyncd-broncos.dep
+include $(PLATFORM_PATH)/../components/docker-gbsyncd-milleniob.dep
 endif
diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk
index e3f0e46cccc..7689dc8ecf0 100755
--- a/platform/broadcom/rules.mk
+++ b/platform/broadcom/rules.mk
@@ -1,5 +1,6 @@
 include $(PLATFORM_PATH)/sai-modules.mk
 include $(PLATFORM_PATH)/sai.mk
+include $(PLATFORM_PATH)/sswsyncd.mk
 # TODO: re-enable once the following have been updated for bookworm:
 # * Nokia
 # * Juniper
@@ -38,13 +39,14 @@ include $(PLATFORM_PATH)/docker-syncd-brcm-dnx-rpc.mk
 ifeq ($(INCLUDE_GBSYNCD), y)
 include $(PLATFORM_PATH)/../components/docker-gbsyncd-credo.mk
 include $(PLATFORM_PATH)/../components/docker-gbsyncd-broncos.mk
+include $(PLATFORM_PATH)/../components/docker-gbsyncd-milleniob.mk
 endif
 
 BCMCMD = bcmcmd
-$(BCMCMD)_URL = "https://sonicstorage.blob.core.windows.net/public/20190307/bcmcmd"
+$(BCMCMD)_URL = "https://packages.trafficmanager.net/public/20190307/bcmcmd"
 
 DSSERVE = dsserve
-$(DSSERVE)_URL = "https://sonicstorage.blob.core.windows.net/public/20190307/dsserve"
+$(DSSERVE)_URL = "https://packages.trafficmanager.net/public/20190307/dsserve"
 
 SONIC_ONLINE_FILES += $(BCMCMD) $(DSSERVE)
 
diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index 2eb459dd0d5..c354e410303 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -1,6 +1,6 @@
 # Broadcom SAI modules
 
-BRCM_OPENNSL_KERNEL_VERSION = 12.1.0.2
+BRCM_OPENNSL_KERNEL_VERSION = 13.2.1.0
 
 BRCM_OPENNSL_KERNEL = opennsl-modules_$(BRCM_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules
@@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom
 SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL)
 
 # SAI bcm modules for DNX family ASIC
-BRCM_DNX_OPENNSL_KERNEL_VERSION = 12.3.2.2
+BRCM_DNX_OPENNSL_KERNEL_VERSION = 13.2.1.1
 
 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx
diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 371cad75549..27fd78c7364 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,9 +1,9 @@
-LIBSAIBCM_XGS_VERSION = 12.3.2.2
-LIBSAIBCM_DNX_VERSION = 12.3.2.2
-LIBSAIBCM_XGS_BRANCH_NAME = SAI_12.3.0_master
-LIBSAIBCM_DNX_BRANCH_NAME = SAI_12.3.0_master
-LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
-LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"
+LIBSAIBCM_XGS_VERSION = 13.2.1.3
+LIBSAIBCM_DNX_VERSION = 13.2.1.1
+LIBSAIBCM_XGS_BRANCH_NAME = SAI_13.2.1_GA
+LIBSAIBCM_DNX_BRANCH_NAME = SAI_13.2.1_GA
+LIBSAIBCM_XGS_URL_PREFIX = "https://packages.trafficmanager.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
+LIBSAIBCM_DNX_URL_PREFIX = "https://packages.trafficmanager.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"
 
 BRCM_XGS_SAI = libsaibcm_$(LIBSAIBCM_XGS_VERSION)_amd64.deb
 $(BRCM_XGS_SAI)_URL = "$(LIBSAIBCM_XGS_URL_PREFIX)/$(BRCM_XGS_SAI)"
diff --git a/platform/broadcom/saibcm-modules-dnx b/platform/broadcom/saibcm-modules-dnx
index dc9e8850939..be155cce3ec 160000
--- a/platform/broadcom/saibcm-modules-dnx
+++ b/platform/broadcom/saibcm-modules-dnx
@@ -1 +1 @@
-Subproject commit dc9e88509398011df02db2e7efd030e796f4cb09
+Subproject commit be155cce3ec8451bc98336620f20afa27754c955
diff --git a/platform/broadcom/saibcm-modules/debian/changelog b/platform/broadcom/saibcm-modules/debian/changelog
index d6d19cde8f4..9550e853560 100644
--- a/platform/broadcom/saibcm-modules/debian/changelog
+++ b/platform/broadcom/saibcm-modules/debian/changelog
@@ -1,3 +1,15 @@
+opennsl (13.2.1.0) unstable; urgency=medium
+
+  * Update to Broadcom SAI 13.2.1.0
+
+ -- Ziting Guo <zitingguo@microsoft.com> Wed, 25 Jun 2025 05:46:10 +0000
+
+opennsl (13.2.0.0) unstable; urgency=medium
+
+  * Update to Broadcom SAI 13.2.0.0
+
+ -- Ziting Guo <zitingguo@microsoft.com> Wed, 21 May 2025 01:43:59 +0000
+
 opennsl (12.1.0.2) unstable; urgency=medium
 
   * Update to Broadcom SAI 12.1.0.2
diff --git a/platform/broadcom/saibcm-modules/debian/control b/platform/broadcom/saibcm-modules/debian/control
index 09648fd9ad8..2d7e95ce5e1 100644
--- a/platform/broadcom/saibcm-modules/debian/control
+++ b/platform/broadcom/saibcm-modules/debian/control
@@ -10,5 +10,5 @@ Standards-Version: 3.9.3
 Package: opennsl-modules
 Architecture: amd64
 Section: main
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for broadcom SAI
diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs b/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs
index 1fc81d87042..d6ce28eba51 100644
--- a/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs
+++ b/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs
@@ -1 +1 @@
-lib/modules/6.1.0-22-2-amd64/extra
+lib/modules/6.1.0-29-2-amd64/extra
diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.install b/platform/broadcom/saibcm-modules/debian/opennsl-modules.install
index 999195fda78..b55fedafcee 100644
--- a/platform/broadcom/saibcm-modules/debian/opennsl-modules.install
+++ b/platform/broadcom/saibcm-modules/debian/opennsl-modules.install
@@ -1,8 +1,8 @@
-systems/linux/user/x86-smp_generic_64-2_6/linux-bcm-knet.ko lib/modules/6.1.0-22-2-amd64/extra
-systems/linux/user/x86-smp_generic_64-2_6/linux-kernel-bde.ko lib/modules/6.1.0-22-2-amd64/extra
-systems/linux/user/x86-smp_generic_64-2_6/linux-user-bde.ko lib/modules/6.1.0-22-2-amd64/extra
-systems/linux/user/x86-smp_generic_64-2_6/linux-knet-cb.ko lib/modules/6.1.0-22-2-amd64/extra
+systems/linux/user/x86-smp_generic_64-2_6/linux-bcm-knet.ko lib/modules/6.1.0-29-2-amd64/extra
+systems/linux/user/x86-smp_generic_64-2_6/linux-kernel-bde.ko lib/modules/6.1.0-29-2-amd64/extra
+systems/linux/user/x86-smp_generic_64-2_6/linux-user-bde.ko lib/modules/6.1.0-29-2-amd64/extra
+systems/linux/user/x86-smp_generic_64-2_6/linux-knet-cb.ko lib/modules/6.1.0-29-2-amd64/extra
 systemd/opennsl-modules.service lib/systemd/system
-sdklt/build/bde/linux_ngbde.ko lib/modules/6.1.0-22-2-amd64/extra
-sdklt/build/knet/linux_ngknet.ko lib/modules/6.1.0-22-2-amd64/extra
-sdklt/build/knetcb/linux_ngknetcb.ko lib/modules/6.1.0-22-2-amd64/extra
+sdklt/build/bde/linux_ngbde.ko lib/modules/6.1.0-29-2-amd64/extra
+sdklt/build/knet/linux_ngknet.ko lib/modules/6.1.0-29-2-amd64/extra
+sdklt/build/knetcb/linux_ngknetcb.ko lib/modules/6.1.0-29-2-amd64/extra
diff --git a/platform/broadcom/saibcm-modules/debian/rules b/platform/broadcom/saibcm-modules/debian/rules
index 2c81ab6d061..894adc628bd 100755
--- a/platform/broadcom/saibcm-modules/debian/rules
+++ b/platform/broadcom/saibcm-modules/debian/rules
@@ -34,8 +34,8 @@ sname:=opennsl
 PACKAGE=opennsl-modules
 # modifieable for experiments or debugging m-a
 MA_DIR ?= /usr/share/modass
-KVERSION ?= 6.1.0-22-2-amd64
-KERNVERSION ?= 6.1.0-22-2
+KVERSION ?= 6.1.0-29-2-amd64
+KERNVERSION ?= 6.1.0-29-2
 
 # load generic variable handling
 -include $(MA_DIR)/include/generic.make
diff --git a/platform/broadcom/saibcm-modules/include/ibde.h b/platform/broadcom/saibcm-modules/include/ibde.h
index c28db2a76ad..56430ab37dd 100644
--- a/platform/broadcom/saibcm-modules/include/ibde.h
+++ b/platform/broadcom/saibcm-modules/include/ibde.h
@@ -104,7 +104,9 @@ typedef struct ibde_s {
 #define BDE_256K_REG_SPACE    0x20000000          /* Map 256K (v 64K) */
 #define BDE_128K_REG_SPACE    0x40000000          /* Map 128K (v 64K) */
 #define BDE_320K_REG_SPACE    0x80000000          /* Map 256K+64K */
-
+#ifdef INCLUDE_SRAM_DMA
+#define BDE_TEST_DEVICES 1
+#endif
 
 /* Bus supports only 16bit reads */
 #define BDE_DEV_BUS_RD_16BIT  SAL_DEV_BUS_RD_16BIT 
diff --git a/platform/broadcom/saibcm-modules/include/kcom.h b/platform/broadcom/saibcm-modules/include/kcom.h
index 17d3f3fb5c4..0b93cf540cf 100644
--- a/platform/broadcom/saibcm-modules/include/kcom.h
+++ b/platform/broadcom/saibcm-modules/include/kcom.h
@@ -72,7 +72,7 @@
 #define KCOM_M_CLOCK_CMD        52 /* Clock Commands */
 #define KCOM_M_PCIE_LINK_STATUS 53 /* PCIe link status */
 
-#define KCOM_VERSION            17 /* Protocol version */
+#define KCOM_VERSION            18 /* Protocol version */
 
 /*
  * Message status codes
diff --git a/platform/broadcom/saibcm-modules/include/soc/devids.h b/platform/broadcom/saibcm-modules/include/soc/devids.h
index 421e5e63237..2aac087b3de 100644
--- a/platform/broadcom/saibcm-modules/include/soc/devids.h
+++ b/platform/broadcom/saibcm-modules/include/soc/devids.h
@@ -1730,6 +1730,12 @@
 #define DNXC_A2_REV_ID          0x0003
 #define DNXC_B0_REV_ID          0x0011
 #define DNXC_B1_REV_ID          0x0012
+#define DNXC_B2_REV_ID          0x0013
+#define DNXC_C0_REV_ID          0x0021
+#define DNXC_C1_REV_ID          0x0022
+#define DNXC_C2_REV_ID          0x0023
+#define DNXC_D0_REV_ID          0x0031
+#define DNXC_D1_REV_ID          0x0032
 #define DNXC_DEVID_FAMILY_MASK  0xfff0
 #define BCM88790_DEVICE_ID      0x8790
 #define BCM88790_A0_REV_ID      DNXC_A0_REV_ID
@@ -1748,7 +1754,7 @@
 #define BCM8879C_DEVICE_ID      0x879C
 #define BCM8879D_DEVICE_ID      0x879D
 #define BCM8879E_DEVICE_ID      0x879E
-#define BCM8879F_DEVICE_ID      0x879F
+#define BCM8879F_DEVICE_ID      0x879F  
 #ifdef BCM_DNXF3_SUPPORT
 #define RAMON2_DEVICE_ID      0x8910
 #define BCM8891F_DEVICE_ID      0x891F
@@ -2051,8 +2057,10 @@
 #define Q3D_DEVICE_ID           0x8870
 #ifdef BCM_Q3A_SUPPORT
 #define Q3A_DEVICE_ID           0x8490
-#define Q3U_DEVICE_ID           0x8400
-#define Q3N_DEVICE_ID           0x8405
+#define Q3U_DEVICE_ID           0x84A0
+#define Q3N_DEVICE_ID           0x84A5
+#define Q3U_ORIG_DEVICE_ID      0x8400
+#define Q3N_ORIG_DEVICE_ID      0x8405
 #endif
 #endif
 #define Q2A_DEVICE_ID           0x8480
@@ -2194,7 +2202,7 @@
 
 #define PLX9056_DEVICE_ID       0x9056 /* needed for DNX_TEST_BOARD */
 
-/* Trident4 X11c*/
+/* Trident4 X11c */
 #define BCM56890_DEVICE_ID 0xb890
 #define BCM56890_A0_REV_ID 0x0001
 #define BCM56891_DEVICE_ID 0xb891
@@ -2206,15 +2214,18 @@
 #define BCM56896_DEVICE_ID 0xb896
 #define BCM56896_A0_REV_ID 0x0001
 
-/* Trident4 X7*/
+/* Trident4 X7 */
 #define BCM56690_DEVICE_ID 0xb690
 #define BCM56690_A0_REV_ID 0x0001
 #define BCM56692_DEVICE_ID 0xb692
 #define BCM56692_A0_REV_ID 0x0001
 
-/* Trident5 X12*/
+/* Trident5 X12 */
 #define BCM78800_DEVICE_ID 0xf800
 #define BCM78800_A0_REV_ID 0x0001
+/* Trident5 X12 8Tbps */
+#define BCM78808_DEVICE_ID 0xf808
+#define BCM78808_A0_REV_ID 0x0001
 
 /* Trident4 */
 #define BCM56880_DEVICE_ID 0xb880
@@ -2300,10 +2311,8 @@
 /* Tomahawk5 */
 #define BCM78900_DEVICE_ID 0xf900
 #define BCM78900_B0_REV_ID 0x0011
-
 #define BCM78902_DEVICE_ID 0xf902
 #define BCM78902_B0_REV_ID 0x0011
-
 #define BCM78903_DEVICE_ID 0xf903
 #define BCM78903_B0_REV_ID 0x0011
 
@@ -2311,6 +2320,10 @@
 #define BCM78905_DEVICE_ID 0xf905
 #define BCM78905_A0_REV_ID 0x0001
 
+/* Tomahawk5-512 */
+#define BCM78907_DEVICE_ID 0xf907
+#define BCM78907_A0_REV_ID 0x0001
+
 /* Firelight2 */
 #define BCM56080_DEVICE_ID 0xb080
 #define BCM56080_A0_REV_ID 0x0001
diff --git a/platform/broadcom/saibcm-modules/make/Make.clang b/platform/broadcom/saibcm-modules/make/Make.clang
index fc80fb079bd..ee1e30842e5 100644
--- a/platform/broadcom/saibcm-modules/make/Make.clang
+++ b/platform/broadcom/saibcm-modules/make/Make.clang
@@ -41,12 +41,7 @@ ifeq (true,$(shell [ $(CLANG_MAJOR) -ge 10 ] && echo true))
 export KERNEL_LLVM ?= 1
 
 # Suppress various Clang warnings
-CLANG_ADD_CFLAGS += \
-    -Wno-gnu-designator \
-    -Wno-gnu-variable-sized-type-not-at-end \
-    -Wno-address-of-packed-member \
-    -Wno-unused-command-line-argument \
-    -Wno-misleading-indentation
+CLANG_ADD_CFLAGS += -Wno-gnu-variable-sized-type-not-at-end
 
 # Suppress Clang build issues on TCL Bindings
 ifeq (TCL,$(findstring TCL,$(FEATURE_LIST)))
@@ -61,9 +56,10 @@ endif
 
 # Use LLD by default
 LDFLAGS += -fuse-ld=lld
+
+# Need these lines in order for GTS Make.custom.all.clang to build
+CLANG_ADD_CFLAGS += -Wno-unused-command-line-argument
 CLANG_ADD_CFLAGS += -fuse-ld=lld
 
-# Use DWARF V4 for compatibility
-CLANG_ADD_CFLAGS += -gdwarf-4
 endif
 endif
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts
index 2f7b90d0636..690e0eb8d62 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts
@@ -82,52 +82,37 @@ export TCL840  := 1
 # Common CFLAGS
 CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1
 #CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT
-OPT_CFLAGS += -Wno-error=unused-value
-OPT_CFLAGS += -Wno-error=unused-function
-OPT_CFLAGS += -Wno-error=cpp
-OPT_CFLAGS += -Wno-error=array-bounds
-OPT_CFLAGS += -Wno-error=strict-overflow
+ifneq (1,$(USE_CLANG))
 CFLAGS += -L$(TOOLCHAIN_DIR)/lib
 CFLAGS += -L$(TOOLCHAIN_DIR)/lib64
+endif
 #OPT_CFLAGS += -Wl,--rpath=/lib64                                 # may need to set rpath and dynamic-linker path here (and possibly in KLFAGS below) in the future, #
 #OPT_CFLAGS += -Wl,--dynamic-linker=/lib64/ld-linux-x86-64.so.2   # if we want to build the target executable to be used with shared libs #
 
+# Needed for a warning in src/soc/phy/fcmap/src/bfcmap88060_a0.c that can't be
+# fixed because of a Montreal2 FW dependency
+ifeq ($(LOCALDIR),src/soc/phy/fcmap/src)
+OPT_CFLAGS += -Wno-address-of-packed-member
+endif
+
 # Compiler-specific CFLAGS
 ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS
-OPT_CFLAGS += -Wno-strlcpy-strlcat-size
-OPT_CFLAGS += -Wno-strncat-size
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1"
 	export LIBNSL_DEPRECATED := 1
 endif
 else # GCC-specific CFLAGS
-OPT_CFLAGS += -Wno-error=unused-but-set-variable
-OPT_CFLAGS += -Wno-error=maybe-uninitialized
-OPT_CFLAGS += -Wno-error=aggressive-loop-optimizations
-OPT_CFLAGS += -Wno-error=sizeof-pointer-div #SDK-233830
-OPT_CFLAGS += -Wno-error=memset-elt-size #SDK-232626
-OPT_CFLAGS += -Wno-error=unused-variable #SDK-232993
-OPT_CFLAGS += -Wno-deprecated-declarations #SDK-233174
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1"
-	OPT_CFLAGS += -Wno-stringop-overflow
-	OPT_CFLAGS += -Wno-stringop-truncation
-	OPT_CFLAGS += -Wno-error=restrict
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1"
-	OPT_CFLAGS += -Wno-address-of-packed-member
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1"
-	OPT_CFLAGS += -Wno-error=uninitialized
-	OPT_CFLAGS += -Wno-error=format-overflow
 	CFLAGS += -fcommon
-	OPT_CFLAGS += -Wno-zero-length-bounds
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1"
 	CFLAGS += -flarge-source-files
-	OPT_CFLAGS += -Wno-error=address
 	export LIBNSL_DEPRECATED := 1
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1"
-	OPT_CFLAGS += -Wno-error=enum-int-mismatch
 	CFLAGS += -fcf-protection
 endif
 endif # Compiler-specific CFLAGS
@@ -137,9 +122,9 @@ CFGFLAGS += -fgnu89-inline
 
 # set up KFLAGS appropriately. #
 ifeq (,$(KFLAGS))
-KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm
+KFLAGS := -I$(KERNDIR) -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm
 ifneq (1,$(USE_CLANG))
-KFLAGS += -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack
+KFLAGS += -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -lc -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack
 else
 KFLAGS += -fno-pie
 endif
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc
index 5e6a37d1619..067b225b714 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc
@@ -77,32 +77,18 @@ ENDIAN = LE_HOST=1
 endif
 
 CFLAGS += -fno-aggressive-loop-optimizations
-OPT_CFLAGS += -Wno-error=maybe-uninitialized
-OPT_CFLAGS += -Wno-error=unused-function
-OPT_CFLAGS += -Wno-error=array-bounds
-OPT_CFLAGS += -Wno-error=unused-variable
-OPT_CFLAGS += -Wno-error=memset-elt-size #SDK-232626
-OPT_CFLAGS += -Wno-error=unused-const-variable
 CFLAGS += -fgnu89-inline
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1"
-    OPT_CFLAGS += -Wno-stringop-overflow
-    OPT_CFLAGS += -Wno-stringop-truncation
-    OPT_CFLAGS += -Wno-error=restrict
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1"
-	OPT_CFLAGS += -Wno-address-of-packed-member
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1"
-	OPT_CFLAGS += -Wno-error=uninitialized
-	OPT_CFLAGS += -Wno-error=format-overflow
 	CFLAGS += -fcommon
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1"
 	CFLAGS += -flarge-source-files
-	OPT_CFLAGS += -Wno-error=address
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1"
-	OPT_CFLAGS += -Wno-error=enum-int-mismatch
 endif
 
 CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64
index 1a5f5bb7328..96aede74a6f 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64
@@ -81,40 +81,27 @@ else
 CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0
 ENDIAN = LE_HOST=1
 endif
-# JIRA SONIC-69062
-CFGFLAGS += -Wp,-w 
+
+# Needed for a warning in src/soc/phy/fcmap/src/bfcmap88060_a0.c that can't be
+# fixed because of a Montreal2 FW dependency
+ifeq ($(LOCALDIR),src/soc/phy/fcmap/src)
+OPT_CFLAGS += -Wno-address-of-packed-member
+endif
+
 CFGFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS
 CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS
 CFLAGS += -fno-aggressive-loop-optimizations -fno-strict-overflow
-OPT_CFLAGS += -Wno-error=maybe-uninitialized
-OPT_CFLAGS += -Wno-error=unused-function
-OPT_CFLAGS += -Wno-error=array-bounds
-OPT_CFLAGS += -Wno-error=format-overflow
 CFLAGS += -fgnu89-inline
-ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1"
-    OPT_CFLAGS += -Wno-stringop-overflow
-    OPT_CFLAGS += -Wno-stringop-truncation
-    OPT_CFLAGS += -Wno-error=restrict
-endif
-ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1"
-	OPT_CFLAGS += -Wno-address-of-packed-member
-endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1"
-	OPT_CFLAGS += -Wno-error=uninitialized
-	OPT_CFLAGS += -Wno-error=format-overflow
 	CFLAGS += -fcommon
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1"
 	CFLAGS += -flarge-source-files
-	OPT_CFLAGS += -Wno-error=address
-endif
-ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1"
-	OPT_CFLAGS += -Wno-error=enum-int-mismatch
 endif
 
 CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD
 CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\"
-CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=16
+#CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=16
 
 ARCH = arm64
 KBUILD_VERBOSE = 1
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule
index e14b6cd89b9..dcf9a92e22d 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule
@@ -58,8 +58,6 @@ ifeq (1,$(NO_PRECOMPILED_MODULE))
 # SDK 'include' directories. 
 #
 ccflags-y   := \
-  -Wno-pointer-to-int-cast \
-  -Wno-int-to-pointer-cast \
   -I$(SDK)/include \
   -I$(SDK)/systems/bde/linux/include \
   -I$(SDK)/systems/bde/shared/include \
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk
index 8cdb29fd8af..9f22e2c6e4d 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk
@@ -93,7 +93,7 @@ CLANG_ADD_CFLAGS += --target=$(TARGET_ARCHITECTURE) --gcc-toolchain=$(TOOLCHAIN_
 export KERNEL_LLVM = 0
 OPT_KERNEL_TOOLCHAIN = CC=$(CROSS_COMPILE)gcc LD=$(CROSS_COMPILE)ld AR=$(CROSS_COMPILE)ar
 else
-OPT_CFLAGS += -Wno-unused-value -Wno-unused-but-set-variable -Wno-sizeof-pointer-memaccess -fno-aggressive-loop-optimizations
+OPT_CFLAGS += -fno-aggressive-loop-optimizations
 endif
 
 ifdef DPP_CHIPS
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10
index 5d938777473..ef36d714c71 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10
@@ -49,9 +49,6 @@ export BINUTILSVER := 2.41
 #
 # For ESW compilation, suppress 'stringop-overflow'
 #
-ifeq ($(BCM_ESW_SUPPORT),1)
-    OPT_CFLAGS += -Wno-error=stringop-overflow
-endif
 ifeq (1,$(GCC_12_1_0))
     export GCCVER := 12.1.0
     TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER)
@@ -68,16 +65,34 @@ else ifeq (1,$(GCC_13_1_0))
       OPT_CFLAGS += -Wno-error=array-bounds=
     # }
     endif
+else ifeq (1,$(GCC_14_1_0))
+    export GCCVER := 14.1.0
+    TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER)
+    ifneq ($(DEBUG_OPTIMIZE),FALSE)
+    # {
+      # These flags are required for -O2 'optimized' compilation
+      # We leave the suppression of array-bounds since, currently,
+      # GCC emits many 'false positive' errors of this kind (among a
+      # few that are justified)
+      OPT_CFLAGS += -Wno-error=array-bounds=
+    # }
+    endif
 else
     export GCCVER := 11.2.0
     TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/11.2.0-x86_64
-    ifneq ($(USE_CLANG),1)
-      OPT_CFLAGS += -Wno-error=array-bounds
-    endif
 endif
 
 #The LCOV tool is not compatible with GCC version 9.x and newer, thus we are forced to compile with older one.
 ifeq (1,$(GCOV))
+  use_gcc_8_1_0 = 1
+endif
+
+#Valgrind does not have symbolic traceback on newer gcc versions
+ifeq (1,$(VALGRIND_SUPPORT))
+  use_gcc_8_1_0 = 1
+endif
+
+ifeq (1,$(use_gcc_8_1_0))
   ifeq ($(targetplat),user)
     # GCC 8.1 does not work with binutils 2.41 and newer
     export BINUTILSVER := 2.38
@@ -88,6 +103,7 @@ endif
 
 BINUTILS_DIR = /tools/oss/packages/x86_64-rhel7/binutils/$(BINUTILSVER)/bin
 export TCL860 := 1
+$(info INFO from make/Makefile.linux-x86-5_10. GCCVER is $(GCCVER). BINUTILSVER is $(BINUTILSVER))
 
 # For GCC versions >= 4.7
 USE_GCC_TOOLS := 1
@@ -126,15 +142,6 @@ endif
 CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1
 #CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT
 #
-#Flags to prevent gcc 8.1.0 new warnings to appear as errors.
-#(All these flags have been removed so as to activate the maximal types of
-#warning)
-#
-#OPT_CFLAGS += -Wno-error=unused-value
-#OPT_CFLAGS += -Wno-error=unused-but-set-variable
-#OPT_CFLAGS += -Wno-error=maybe-uninitialized
-#OPT_CFLAGS += -Wno-error=aggressive-loop-optimizations
-#OPT_CFLAGS += -Wno-error=array-bounds
 
 # set up KFLAGS appropriately. #
 # -fno-builtin needed for using kernel's version of memcpy instead of the gcc inline version
@@ -219,7 +226,7 @@ CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0
 ENDIAN = LE_HOST=1
 CFGFLAGS += -D$(ENDIAN)
 CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\"
-CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32
+CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=192
 
 # Extra variables.
 EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags)
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28
index 1533626e508..f96cdd06db9 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28
@@ -47,14 +47,10 @@
 #
 # For ESW compilation, suppress 'stringop-overflow'
 #
-ifeq ($(BCM_ESW_SUPPORT),1)
-    OPT_CFLAGS += -Wno-error=stringop-overflow
-endif
 ifeq (1,$(GCC_11_2_0))
   export BINUTILSVER := 2.41
   export GCCVER := 11.2.0
   TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/11.2.0-x86_64
-  OPT_CFLAGS += -Wno-error=array-bounds
 else
   ifeq (1,$(GCC_12_1_0))
     export BINUTILSVER := 2.41
@@ -126,16 +122,6 @@ CFGFLAGS += -D__DUNE_GTS_BCM_CPU__
 endif
 CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1
 #CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT
-#
-#Flags to prevent gcc 8.1.0 new warnings to appear as errors.
-#(All these flags have been removed so as to activate the maximal types of
-#warning)
-#
-#OPT_CFLAGS += -Wno-error=unused-value
-#OPT_CFLAGS += -Wno-error=unused-but-set-variable
-#OPT_CFLAGS += -Wno-error=maybe-uninitialized
-#OPT_CFLAGS += -Wno-error=aggressive-loop-optimizations
-#OPT_CFLAGS += -Wno-error=array-bounds
 
 # set up KFLAGS appropriately. #
 # -fno-builtin needed for using kernel's version of memcpy instead of the gcc inline version
@@ -149,10 +135,6 @@ ifneq (1,$(USE_CLANG))
 # {
   KFLAGS += -Wno-error=maybe-uninitialized -lc -fno-delete-null-pointer-checks -maccumulate-outgoing-args -fconserve-stack -mpreferred-stack-boundary=3
 # }
-else
-# {
-  OPTFLAGS +=  -Wno-error=address-of-packed-member
-# }
 endif
 ifeq (1,$(NO_PRECOMPILED_MODULE))
 # {
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6
index bbfcc82867c..6393e955dce 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6
@@ -42,7 +42,6 @@ endif
 
 # Target machine for EDK-Host defconfig
 TARGET_MACHINE ?= x86_64
-
 # Noisy kernel build
 KBUILD_VERBOSE = 1
 
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6
index 90651a35729..2577dd9ef21 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6
@@ -48,13 +48,15 @@ endif
 GCC_MAJOR_VER  = $(shell GCCVER=$(GCCVER) $(CC) -dumpversion | cut -d'.' -f1)
 
 ifeq (${GCC_MAJOR_VER}, 11)
-	CFGFLAGS += -Wno-error=sizeof-array-div
-	CFGFLAGS += -Wno-error=stringop-overread
+CFGFLAGS += -Wno-error=sizeof-array-div
+CFGFLAGS += -Wno-error=stringop-overread
 endif
+ifneq (1,$(USE_CLANG))
 CFGFLAGS += -Wno-error=stringop-truncation
 CFGFLAGS += -Wno-error=maybe-uninitialized
 CFGFLAGS += -Wno-error=format-overflow
 CFGFLAGS += -Wno-error=array-bounds
+endif
 
 ifdef LTSW_CHIPS
 # Ensure we do not use an out-of-date libelf.so
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr
index 2f7b90d0636..690e0eb8d62 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr
@@ -82,52 +82,37 @@ export TCL840  := 1
 # Common CFLAGS
 CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1
 #CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT
-OPT_CFLAGS += -Wno-error=unused-value
-OPT_CFLAGS += -Wno-error=unused-function
-OPT_CFLAGS += -Wno-error=cpp
-OPT_CFLAGS += -Wno-error=array-bounds
-OPT_CFLAGS += -Wno-error=strict-overflow
+ifneq (1,$(USE_CLANG))
 CFLAGS += -L$(TOOLCHAIN_DIR)/lib
 CFLAGS += -L$(TOOLCHAIN_DIR)/lib64
+endif
 #OPT_CFLAGS += -Wl,--rpath=/lib64                                 # may need to set rpath and dynamic-linker path here (and possibly in KLFAGS below) in the future, #
 #OPT_CFLAGS += -Wl,--dynamic-linker=/lib64/ld-linux-x86-64.so.2   # if we want to build the target executable to be used with shared libs #
 
+# Needed for a warning in src/soc/phy/fcmap/src/bfcmap88060_a0.c that can't be
+# fixed because of a Montreal2 FW dependency
+ifeq ($(LOCALDIR),src/soc/phy/fcmap/src)
+OPT_CFLAGS += -Wno-address-of-packed-member
+endif
+
 # Compiler-specific CFLAGS
 ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS
-OPT_CFLAGS += -Wno-strlcpy-strlcat-size
-OPT_CFLAGS += -Wno-strncat-size
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1"
 	export LIBNSL_DEPRECATED := 1
 endif
 else # GCC-specific CFLAGS
-OPT_CFLAGS += -Wno-error=unused-but-set-variable
-OPT_CFLAGS += -Wno-error=maybe-uninitialized
-OPT_CFLAGS += -Wno-error=aggressive-loop-optimizations
-OPT_CFLAGS += -Wno-error=sizeof-pointer-div #SDK-233830
-OPT_CFLAGS += -Wno-error=memset-elt-size #SDK-232626
-OPT_CFLAGS += -Wno-error=unused-variable #SDK-232993
-OPT_CFLAGS += -Wno-deprecated-declarations #SDK-233174
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1"
-	OPT_CFLAGS += -Wno-stringop-overflow
-	OPT_CFLAGS += -Wno-stringop-truncation
-	OPT_CFLAGS += -Wno-error=restrict
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1"
-	OPT_CFLAGS += -Wno-address-of-packed-member
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1"
-	OPT_CFLAGS += -Wno-error=uninitialized
-	OPT_CFLAGS += -Wno-error=format-overflow
 	CFLAGS += -fcommon
-	OPT_CFLAGS += -Wno-zero-length-bounds
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1"
 	CFLAGS += -flarge-source-files
-	OPT_CFLAGS += -Wno-error=address
 	export LIBNSL_DEPRECATED := 1
 endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1"
-	OPT_CFLAGS += -Wno-error=enum-int-mismatch
 	CFLAGS += -fcf-protection
 endif
 endif # Compiler-specific CFLAGS
@@ -137,9 +122,9 @@ CFGFLAGS += -fgnu89-inline
 
 # set up KFLAGS appropriately. #
 ifeq (,$(KFLAGS))
-KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm
+KFLAGS := -I$(KERNDIR) -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm
 ifneq (1,$(USE_CLANG))
-KFLAGS += -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack
+KFLAGS += -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -lc -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack
 else
 KFLAGS += -fno-pie
 endif
diff --git a/platform/broadcom/saibcm-modules/sdklt/Makefile b/platform/broadcom/saibcm-modules/sdklt/Makefile
index 968d2ad3e39..45442dcfbf5 100644
--- a/platform/broadcom/saibcm-modules/sdklt/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/Makefile
@@ -57,12 +57,15 @@ KNETCB_BLDDIR := $(OUTPUT_DIR)/knetcb
 BCMGENL_BLDDIR := $(OUTPUT_DIR)/bcmgenl
 GENL_PACKET_BLDDIR := $(OUTPUT_DIR)/genl-packet
 EDK_BLDDIR := $(OUTPUT_DIR)/edk
-PTP_BLDDIR := $(OUTPUT_DIR)/ptpclock
+PTPCLOCK_BLDDIR := $(OUTPUT_DIR)/ptpclock
+ST_BLDDIR := $(OUTPUT_DIR)/st
 
 LKM_CFLAGS += -UNGKNET_NETIF_MAX -DNGKNET_NETIF_MAX=1056 -UNGKNET_FILTER_MAX -DNGKNET_FILTER_MAX=1025
 export LKM_CFLAGS
 
-kmod: bde knet knetcb genl-packet bcmgenl edk ptpclock
+KMODS := bde knet knetcb genl-packet bcmgenl edk ptpclock st
+
+kmod: $(KMODS)
 
 bde:
 	$(MAKE) -C $(SDK)/linux/bde SDK=$(SDK) \
@@ -98,13 +101,20 @@ edk: bde
 		LKM_BLDDIR=$(EDK_BLDDIR) $(TARGET)
 	ln -sf $(EDK_BLDDIR)/*.ko $(OUTPUT_DIR)
 
-ptpclock: knet edk
+ptpclock: bde knet edk
 	$(MAKE) -C $(SDK)/linux/ptpclock SDK=$(SDK) \
-		KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \
+		KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \
+		KBUILD_EXTRA_SYMBOLS+=$(KNET_BLDDIR)/Module.symvers \
 		KBUILD_EXTRA_SYMBOLS+=$(EDK_BLDDIR)/Module.symvers \
-		KBUILD_EXTRA_SYMBOLS+=$(BDE_BLDDIR)/Module.symvers \
-		LKM_BLDDIR=$(PTP_BLDDIR) $(TARGET)
-	ln -sf $(PTP_BLDDIR)/*.ko $(OUTPUT_DIR)
+		LKM_BLDDIR=$(PTPCLOCK_BLDDIR) $(TARGET)
+	ln -sf $(PTPCLOCK_BLDDIR)/*.ko $(OUTPUT_DIR)
+
+st: bde
+	$(MAKE) -C $(SDK)/linux/st SDK=$(SDK) \
+		KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \
+		LKM_BLDDIR=$(ST_BLDDIR) $(TARGET)
+	ln -sf $(ST_BLDDIR)/*.ko $(OUTPUT_DIR)
+
 clean:
 	$(MAKE) kmod TARGET=$@
 	rm -f $(OUTPUT_DIR)/*.ko
@@ -113,4 +123,4 @@ distclean:
 	$(MAKE) kmod TARGET=$@
 	rm -rf $(OUTPUT_DIR)
 
-.PHONY: help kmod bde knet knetcb genl-packet bcmgenl edk ptpclock clean distclean
+.PHONY: help kmod clean distclean $(KMODS)
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78907_a0/bcm78907_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78907_a0/bcm78907_a0_pdma_attach.c
new file mode 100644
index 00000000000..17e4e62b5e3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78907_a0/bcm78907_a0_pdma_attach.c
@@ -0,0 +1,38 @@
+/*! \file bcm78907_a0_pdma_attach.c
+ *
+ * Initialize PDMA driver resources.
+ *
+ */
+/*
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ */
+
+#include <bcmcnet/bcmcnet_core.h>
+#include <bcmcnet/bcmcnet_dev.h>
+#include <bcmcnet/bcmcnet_cmicr.h>
+
+int
+bcm78907_a0_cnet_pdma_attach(struct pdma_dev *dev)
+{
+    return bcmcnet_cmicr_pdma_driver_attach(dev);
+}
+
+int
+bcm78907_a0_cnet_pdma_detach(struct pdma_dev *dev)
+{
+    return bcmcnet_cmicr_pdma_driver_detach(dev);
+}
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c
index 6a322030492..5cf72ff861d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c
@@ -539,20 +539,21 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
         }
 
         /* Update the indicators */
-        if (!(rxq->state & PDMA_RX_BATCH_REFILL) && rxq->halt != curr) {
+        if (!(rxq->state & PDMA_RX_BATCH_REFILL)) {
             sal_spinlock_lock(rxq->lock);
-            if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
+            if (!(rxq->status & PDMA_RX_QUEUE_XOFF) && (rxq->halt != curr)) {
                 /* Descriptor cherry pick */
                 rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * curr;
                 hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
                 rxq->halt = curr;
             }
             curr = (curr + 1) % rxq->nb_desc;
+            rxq->curr = curr;
             sal_spinlock_unlock(rxq->lock);
         } else {
             curr = (curr + 1) % rxq->nb_desc;
+            rxq->curr = curr;
         }
-        rxq->curr = curr;
         done++;
 
         /* Restart DMA if in chain mode */
@@ -1024,6 +1025,8 @@ cmicd_pdma_rx_suspend(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
 static int
 cmicd_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
 {
+    struct cmicd_rx_desc *ring = (struct cmicd_rx_desc *)rxq->ring;
+
     sal_spinlock_lock(rxq->lock);
     if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
         sal_spinlock_unlock(rxq->lock);
@@ -1032,8 +1035,9 @@ cmicd_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
     if (rxq->state & PDMA_RX_BATCH_REFILL) {
         rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * rxq->halt;
         hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
-    } else if (rxq->halt == rxq->curr || (rxq->halt == rxq->nb_desc && rxq->curr == 0)) {
-        rxq->halt = (rxq->curr + 1) % rxq->nb_desc;
+    } else if ((rxq->halt == rxq->curr) &&
+               (ring[(rxq->curr + 1) % rxq->nb_desc].md.status == 0)) {
+        rxq->halt = (rxq->curr + rxq->nb_desc - 1) % rxq->nb_desc;
         rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * rxq->halt;
         hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
     }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c
index 8def9753956..58513c888e0 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c
@@ -615,20 +615,21 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
         }
 
         /* Update the indicators */
-        if (!(rxq->state & PDMA_RX_BATCH_REFILL) && rxq->halt != curr) {
+        if (!(rxq->state & PDMA_RX_BATCH_REFILL)) {
             sal_spinlock_lock(rxq->lock);
-            if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
+            if (!(rxq->status & PDMA_RX_QUEUE_XOFF) && (rxq->halt != curr)) {
                 /* Descriptor cherry pick */
                 rxq->halt_addr = rxq->ring_addr + sizeof(RX_DCB_t) * curr;
                 hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
                 rxq->halt = curr;
             }
             curr = (curr + 1) % rxq->nb_desc;
+            rxq->curr = curr;
             sal_spinlock_unlock(rxq->lock);
         } else {
             curr = (curr + 1) % rxq->nb_desc;
+            rxq->curr = curr;
         }
-        rxq->curr = curr;
         done++;
 
         /* Restart DMA if in chain mode */
@@ -1104,6 +1105,8 @@ cmicr_pdma_rx_suspend(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
 static int
 cmicr_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
 {
+    volatile RX_DCB_t *ring = (volatile RX_DCB_t *)rxq->ring;
+
     sal_spinlock_lock(rxq->lock);
     if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
         sal_spinlock_unlock(rxq->lock);
@@ -1112,8 +1115,9 @@ cmicr_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
     if (rxq->state & PDMA_RX_BATCH_REFILL) {
         rxq->halt_addr = rxq->ring_addr + sizeof(RX_DCB_t) * rxq->halt;
         hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
-    } else if (rxq->halt == rxq->curr || (rxq->halt == rxq->nb_desc && rxq->curr == 0)) {
-        rxq->halt = (rxq->curr + 1) % rxq->nb_desc;
+    } else if ((rxq->halt == rxq->curr) &&
+               !RX_DCB_STATUS_GET(ring[(rxq->curr + 1) % rxq->nb_desc])) {
+        rxq->halt = (rxq->curr + rxq->nb_desc - 1) % rxq->nb_desc;
         rxq->halt_addr = rxq->ring_addr + sizeof(RX_DCB_t) * rxq->halt;
         hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
     }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c
index 690bf865f66..5515399f308 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c
@@ -579,20 +579,21 @@ cmicx_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
         }
 
         /* Update the indicators */
-        if (!(rxq->state & PDMA_RX_BATCH_REFILL) && rxq->halt != curr) {
+        if (!(rxq->state & PDMA_RX_BATCH_REFILL)) {
             sal_spinlock_lock(rxq->lock);
-            if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
+            if (!(rxq->status & PDMA_RX_QUEUE_XOFF) && (rxq->halt != curr)) {
                 /* Descriptor cherry pick */
                 rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * curr;
                 hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
                 rxq->halt = curr;
             }
             curr = (curr + 1) % rxq->nb_desc;
+            rxq->curr = curr;
             sal_spinlock_unlock(rxq->lock);
         } else {
             curr = (curr + 1) % rxq->nb_desc;
+            rxq->curr = curr;
         }
-        rxq->curr = curr;
         done++;
 
         /* Restart DMA if in chain mode */
@@ -1064,6 +1065,8 @@ cmicx_pdma_rx_suspend(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
 static int
 cmicx_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
 {
+    struct cmicx_rx_desc *ring = (struct cmicx_rx_desc *)rxq->ring;
+
     sal_spinlock_lock(rxq->lock);
     if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
         sal_spinlock_unlock(rxq->lock);
@@ -1072,8 +1075,9 @@ cmicx_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
     if (rxq->state & PDMA_RX_BATCH_REFILL) {
         rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * rxq->halt;
         hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
-    } else if (rxq->halt == rxq->curr || (rxq->halt == rxq->nb_desc && rxq->curr == 0)) {
-        rxq->halt = (rxq->curr + 1) % rxq->nb_desc;
+    } else if ((rxq->halt == rxq->curr) &&
+               (ring[(rxq->curr + 1) % rxq->nb_desc].status == 0)) {
+        rxq->halt = (rxq->curr + rxq->nb_desc - 1) % rxq->nb_desc;
         rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * rxq->halt;
         hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
     }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h
index edc77c18335..67808e167ee 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h
@@ -347,8 +347,9 @@ typedef void (*pdma_dev_stats_get_f)(struct pdma_dev *dev);
  * Reset device statistics.
  *
  * \param [in] dev Pointer to device structure.
+ * \param [in] dir Direction of packets specified to reset statistics.
  */
-typedef void (*pdma_dev_stats_reset_f)(struct pdma_dev *dev);
+typedef void (*pdma_dev_stats_reset_f)(struct pdma_dev *dev, pdma_dir_t dir);
 
 /*!
  * Convert logic queue to physical queue.
@@ -847,6 +848,9 @@ struct pdma_dev {
     /*! Device statistics data */
     struct bcmcnet_dev_stats stats;
 
+    /*! Device statistics base data */
+    struct bcmcnet_dev_stats stats_base;
+
     /*! Private data */
     void *priv;
 
@@ -1078,12 +1082,13 @@ bcmcnet_pdma_dev_stats_get(struct pdma_dev *dev);
  * \brief Reset device statistics.
  *
  * \param [in] dev Device structure point.
+ * \param [in] dir Direction of packets specified to reset statistics.
  *
  * \retval SHR_E_NONE No errors.
  * \retval SHR_E_XXXX Operation failed.
  */
 extern int
-bcmcnet_pdma_dev_stats_reset(struct pdma_dev *dev);
+bcmcnet_pdma_dev_stats_reset(struct pdma_dev *dev, pdma_dir_t dir);
 
 /*!
  * \brief Change queue number to channel number.
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h
index 36dd2cf2ef1..de42a7194fe 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h
@@ -54,35 +54,6 @@ enum buf_mode {
     PDMA_BUF_MODE_MAX
 };
 
-/*!
- * \brief Rx queue statistics.
- */
-struct rx_stats {
-    /*! Number of received packets */
-    uint64_t packets;
-
-    /*! Number of received bytes */
-    uint64_t bytes;
-
-    /*! Number of dropped packets */
-    uint64_t dropped;
-
-    /*! Number of errors */
-    uint64_t errors;
-
-    /*! Number of head errors */
-    uint64_t head_errors;
-
-    /*! Number of data errors */
-    uint64_t data_errors;
-
-    /*! Number of cell errors */
-    uint64_t cell_errors;
-
-    /*! Number of failed allocation */
-    uint64_t nomems;
-};
-
 /*!
  * Rx queue structure
  */
@@ -133,7 +104,7 @@ struct pdma_rx_queue {
     int intr_coalescing;
 
     /*! Queue statistics */
-    struct rx_stats stats;
+    struct bcmcnet_rxq_stats stats;
 
     /*! Rx queue spin lock */
     sal_spinlock_t lock;
@@ -163,26 +134,6 @@ struct pdma_rx_queue {
     uint32_t page_order;
 };
 
-/*!
- * \brief Tx queue statistics.
- */
-struct tx_stats {
-    /*! Number of sent packets */
-    uint64_t packets;
-
-    /*! Number of sent bytes */
-    uint64_t bytes;
-
-    /*! Number of dropped packets */
-    uint64_t dropped;
-
-    /*! Number of errors */
-    uint64_t errors;
-
-    /*! Number of suspends */
-    uint64_t xoffs;
-};
-
 /*!
  * \brief Tx queue structure.
  */
@@ -233,7 +184,7 @@ struct pdma_tx_queue {
     int intr_coalescing;
 
     /*! Queue statistics */
-    struct tx_stats stats;
+    struct bcmcnet_txq_stats stats;
 
     /*! Tx queue spin lock */
     sal_spinlock_t lock;
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h
index 26c1992e0f5..51ffdeec6b9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h
@@ -52,10 +52,17 @@
 /*!
  * \brief Transmission direction.
  */
-enum pdma_dir {
-    PDMA_Q_RX = 0,
-    PDMA_Q_TX
-};
+typedef enum pdma_dir_e {
+    PDMA_DIR_RX = 0,
+    PDMA_DIR_TX,
+    PDMA_DIR_RXTX
+} pdma_dir_t;
+
+/*! Channel in Rx direction */
+#define PDMA_Q_RX           PDMA_DIR_RX
+
+/*! Channel in Tx direction */
+#define PDMA_Q_TX           PDMA_DIR_TX
 
 /*!
  * \brief Device information.
@@ -129,89 +136,72 @@ typedef struct bcmcnet_dev_info {
 } bcmcnet_dev_info_t;
 
 /*!
- * \brief Device statistics.
+ * \brief Rx queue statistics.
  */
-typedef struct bcmcnet_dev_stats {
-    /*! Number of successfully received packets */
-    uint64_t rx_packets;
+typedef struct bcmcnet_rxq_stats {
+    /*! Number of received packets */
+    uint64_t packets;
 
-    /*! Number of successfully received bytes */
-    uint64_t rx_bytes;
+    /*! Number of received bytes */
+    uint64_t bytes;
 
     /*! Number of dropped packets */
-    uint64_t rx_dropped;
+    uint64_t dropped;
 
-    /*! Number of erroneous received packets */
-    uint64_t rx_errors;
+    /*! Number of errors */
+    uint64_t errors;
 
-    /*! Number of error head packets */
-    uint64_t rx_head_errors;
+    /*! Number of head errors */
+    uint64_t head_errors;
 
-    /*! Number of error data packets */
-    uint64_t rx_data_errors;
+    /*! Number of data errors */
+    uint64_t data_errors;
 
-    /*! Number of error cell packets */
-    uint64_t rx_cell_errors;
+    /*! Number of cell errors */
+    uint64_t cell_errors;
 
-    /*! Number of RX pktbuf allocation failures */
-    uint64_t rx_nomems;
+    /*! Number of failed allocation */
+    uint64_t nomems;
+} bcmcnet_rxq_stats_t;
 
-    /*! Number of successfully transmitted packets */
-    uint64_t tx_packets;
+/*!
+ * \brief Tx queue statistics.
+ */
+typedef struct bcmcnet_txq_stats {
+    /*! Number of sent packets */
+    uint64_t packets;
 
-    /*! Number of successfully transmitted bytes */
-    uint64_t tx_bytes;
+    /*! Number of sent bytes */
+    uint64_t bytes;
 
     /*! Number of dropped packets */
-    uint64_t tx_dropped;
-
-    /*! Number of failed transmitted packets */
-    uint64_t tx_errors;
-
-    /*! Number of suspended transmission */
-    uint64_t tx_xoffs;
-
-    /*! Number of interrupts */
-    uint64_t intrs;
-
-    /*! Number of successfully received packets per queue */
-    uint64_t rxq_packets[NUM_Q_MAX];
+    uint64_t dropped;
 
-    /*! Number of successfully received bytes per queue */
-    uint64_t rxq_bytes[NUM_Q_MAX];
+    /*! Number of errors */
+    uint64_t errors;
 
-    /*! Number of dropped packets per queue */
-    uint64_t rxq_dropped[NUM_Q_MAX];
+    /*! Number of suspends */
+    uint64_t xoffs;
+} bcmcnet_txq_stats_t;
 
-    /*! Number of erroneous received packets per queue */
-    uint64_t rxq_errors[NUM_Q_MAX];
-
-    /*! Number of error head packets per queue */
-    uint64_t rxq_head_errors[NUM_Q_MAX];
-
-    /*! Number of error data packets per queue */
-    uint64_t rxq_data_errors[NUM_Q_MAX];
-
-    /*! Number of error cell packets per queue */
-    uint64_t rxq_cell_errors[NUM_Q_MAX];
-
-    /*! Number of RX pktbuf allocation failures per queue */
-    uint64_t rxq_nomems[NUM_Q_MAX];
-
-    /*! Number of successfully transmitted bytes per queue */
-    uint64_t txq_packets[NUM_Q_MAX];
+/*!
+ * \brief Device statistics.
+ */
+typedef struct bcmcnet_dev_stats {
+    /*! Queue statistics for Rx */
+    bcmcnet_rxq_stats_t rxq[NUM_Q_MAX];
 
-    /*! Number of successfully transmitted bytes per queue */
-    uint64_t txq_bytes[NUM_Q_MAX];
+    /*! Global statistics for all Rx queues */
+    bcmcnet_rxq_stats_t rxqs;
 
-    /*! Number of dropped packets per queue */
-    uint64_t txq_dropped[NUM_Q_MAX];
+    /*! Queue statistics for Tx */
+    bcmcnet_txq_stats_t txq[NUM_Q_MAX];
 
-    /*! Number of failed transmitted packets per queue */
-    uint64_t txq_errors[NUM_Q_MAX];
+    /*! Global statistics for all Tx queues */
+    bcmcnet_txq_stats_t txqs;
 
-    /*! Number of suspended transmission per queue */
-    uint64_t txq_xoffs[NUM_Q_MAX];
+    /*! Number of interrupts */
+    uint64_t intrs;
 } bcmcnet_dev_stats_t;
 
 /*!
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c
index 6089df9ad9f..46cce7eece9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c
@@ -375,13 +375,13 @@ bcmcnet_pdma_dev_stats_get(struct pdma_dev *dev)
  * Reset device statistics
  */
 int
-bcmcnet_pdma_dev_stats_reset(struct pdma_dev *dev)
+bcmcnet_pdma_dev_stats_reset(struct pdma_dev *dev, pdma_dir_t dir)
 {
     if (!dev->ops || !dev->ops->dev_stats_reset) {
         return SHR_E_INTERNAL;
     }
 
-    dev->ops->dev_stats_reset(dev);
+    dev->ops->dev_stats_reset(dev, dir);
 
     return SHR_E_NONE;
 }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c
index 1277187d603..994bfa06b93 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c
@@ -506,6 +506,36 @@ bcmcnet_pdma_info_get(struct pdma_dev *dev)
     }
 }
 
+/*!
+ * Add values in uint64_t array to values
+ * in another array of the same size.
+ */
+static void
+bcmcnet_uint64s_add(void *src, void *add, int num)
+{
+    uint64_t *a = src, *b = add;
+    int i;
+
+    for (i = 0; i < num; i++) {
+        a[i] += b[i];
+    }
+}
+
+/*!
+ * Subtract values in uint64_t array from values
+ * in another array of the same size.
+ */
+static void
+bcmcnet_uint64s_sub(void *src, void *sub, int num)
+{
+    uint64_t *a = src, *b = sub;
+    int i;
+
+    for (i = 0; i < num; i++) {
+        a[i] -= b[i];
+    }
+}
+
 /*!
  * Get device statistics
  */
@@ -513,107 +543,79 @@ static void
 bcmcnet_pdma_stats_get(struct pdma_dev *dev)
 {
     struct dev_ctrl *ctrl = &dev->ctrl;
+    struct bcmcnet_dev_stats *stats = &dev->stats;
+    struct bcmcnet_dev_stats *stats_base = &dev->stats_base;
     struct pdma_rx_queue *rxq = NULL;
     struct pdma_tx_queue *txq = NULL;
-    uint32_t packets = 0, bytes = 0, dropped = 0, errors = 0, nomems = 0, xoffs = 0;
-    uint32_t head_errors = 0, data_errors = 0, cell_errors = 0;
-    uint32_t qi;
+    uint32_t stats_size, stats_num, qi;
 
+    stats_size = sizeof(bcmcnet_rxq_stats_t);
+    stats_num = sizeof(bcmcnet_rxq_stats_t) / sizeof(uint64_t);
+    sal_memset(&stats->rxqs, 0, stats_size);
     for (qi = 0; qi < ctrl->nb_rxq; qi++) {
         rxq = (struct pdma_rx_queue *)ctrl->rx_queue[qi];
         if (!rxq) {
             continue;
         }
-        packets += rxq->stats.packets;
-        bytes += rxq->stats.bytes;
-        dropped += rxq->stats.dropped;
-        errors += rxq->stats.errors;
-        head_errors += rxq->stats.head_errors;
-        data_errors += rxq->stats.data_errors;
-        cell_errors += rxq->stats.cell_errors;
-        nomems += rxq->stats.nomems;
-        dev->stats.rxq_packets[qi] = rxq->stats.packets;
-        dev->stats.rxq_bytes[qi] = rxq->stats.bytes;
-        dev->stats.rxq_dropped[qi] = rxq->stats.dropped;
-        dev->stats.rxq_errors[qi] = rxq->stats.errors;
-        dev->stats.rxq_head_errors[qi] = rxq->stats.head_errors;
-        dev->stats.rxq_data_errors[qi] = rxq->stats.data_errors;
-        dev->stats.rxq_cell_errors[qi] = rxq->stats.cell_errors;
-        dev->stats.rxq_nomems[qi] = rxq->stats.nomems;
+        sal_memcpy(&stats->rxq[qi], &rxq->stats, stats_size);
+        bcmcnet_uint64s_add(&stats->rxqs, &stats->rxq[qi], stats_num);
+        bcmcnet_uint64s_sub(&stats->rxq[qi], &stats_base->rxq[qi], stats_num);
     }
+    bcmcnet_uint64s_sub(&stats->rxqs, &stats_base->rxqs, stats_num);
 
-    dev->stats.rx_packets = packets;
-    dev->stats.rx_bytes = bytes;
-    dev->stats.rx_dropped = dropped;
-    dev->stats.rx_errors = errors;
-    dev->stats.rx_head_errors = head_errors;
-    dev->stats.rx_data_errors = data_errors;
-    dev->stats.rx_cell_errors = cell_errors;
-    dev->stats.rx_nomems = nomems;
-
-    packets = bytes = dropped = errors = 0;
+    stats_size = sizeof(bcmcnet_txq_stats_t);
+    stats_num = sizeof(bcmcnet_txq_stats_t) / sizeof(uint64_t);
+    sal_memset(&stats->txqs, 0, stats_size);
     for (qi = 0; qi < ctrl->nb_txq; qi++) {
         txq = (struct pdma_tx_queue *)ctrl->tx_queue[qi];
         if (!txq) {
             continue;
         }
-        packets += txq->stats.packets;
-        bytes += txq->stats.bytes;
-        dropped += txq->stats.dropped;
-        errors += txq->stats.errors;
-        xoffs += txq->stats.xoffs;
-        dev->stats.txq_packets[qi] = txq->stats.packets;
-        dev->stats.txq_bytes[qi] = txq->stats.bytes;
-        dev->stats.txq_dropped[qi] = txq->stats.dropped;
-        dev->stats.txq_errors[qi] = txq->stats.errors;
-        dev->stats.txq_xoffs[qi] = txq->stats.xoffs;
+        sal_memcpy(&stats->txq[qi], &txq->stats, stats_size);
+        bcmcnet_uint64s_add(&stats->txqs, &stats->txq[qi], stats_num);
+        bcmcnet_uint64s_sub(&stats->txq[qi], &stats_base->txq[qi], stats_num);
     }
-
-    dev->stats.tx_packets = packets;
-    dev->stats.tx_bytes = bytes;
-    dev->stats.tx_dropped = dropped;
-    dev->stats.tx_errors = errors;
-    dev->stats.tx_xoffs = xoffs;
+    bcmcnet_uint64s_sub(&stats->txqs, &stats_base->txqs, stats_num);
 }
 
 /*!
  * Reset device statistics
  */
 static void
-bcmcnet_pdma_stats_reset(struct pdma_dev *dev)
+bcmcnet_pdma_stats_reset(struct pdma_dev *dev, pdma_dir_t dir)
 {
     struct dev_ctrl *ctrl = &dev->ctrl;
+    struct bcmcnet_dev_stats *stats = &dev->stats_base;
     struct pdma_rx_queue *rxq = NULL;
     struct pdma_tx_queue *txq = NULL;
-    uint32_t qi;
-
-    sal_memset(&dev->stats, 0, sizeof(struct bcmcnet_dev_stats));
-
-    for (qi = 0; qi < ctrl->nb_rxq; qi++) {
-        rxq = (struct pdma_rx_queue *)ctrl->rx_queue[qi];
-        if (!rxq) {
-            continue;
+    uint32_t stats_size, stats_num, qi;
+
+    if (dir == PDMA_DIR_RX || dir == PDMA_DIR_RXTX) {
+        stats_size = sizeof(bcmcnet_rxq_stats_t);
+        stats_num = sizeof(bcmcnet_rxq_stats_t) / sizeof(uint64_t);
+        sal_memset(&stats->rxqs, 0, stats_size);
+        for (qi = 0; qi < ctrl->nb_rxq; qi++) {
+            rxq = (struct pdma_rx_queue *)ctrl->rx_queue[qi];
+            if (!rxq) {
+                continue;
+            }
+            sal_memcpy(&stats->rxq[qi], &rxq->stats, stats_size);
+            bcmcnet_uint64s_add(&stats->rxqs, &stats->rxq[qi], stats_num);
         }
-        rxq->stats.packets = 0;
-        rxq->stats.bytes = 0;
-        rxq->stats.dropped = 0;
-        rxq->stats.errors = 0;
-        rxq->stats.head_errors = 0;
-        rxq->stats.data_errors = 0;
-        rxq->stats.cell_errors = 0;
-        rxq->stats.nomems = 0;
     }
 
-    for (qi = 0; qi < ctrl->nb_txq; qi++) {
-        txq = (struct pdma_tx_queue *)ctrl->tx_queue[qi];
-        if (!txq) {
-            continue;
+    if (dir == PDMA_DIR_TX || dir == PDMA_DIR_RXTX) {
+        stats_size = sizeof(bcmcnet_txq_stats_t);
+        stats_num = sizeof(bcmcnet_txq_stats_t) / sizeof(uint64_t);
+        sal_memset(&stats->txqs, 0, stats_size);
+        for (qi = 0; qi < ctrl->nb_txq; qi++) {
+            txq = (struct pdma_tx_queue *)ctrl->tx_queue[qi];
+            if (!txq) {
+                continue;
+            }
+            sal_memcpy(&stats->txq[qi], &txq->stats, stats_size);
+            bcmcnet_uint64s_add(&stats->txqs, &stats->txq[qi], stats_num);
         }
-        txq->stats.packets = 0;
-        txq->stats.bytes = 0;
-        txq->stats.dropped = 0;
-        txq->stats.errors = 0;
-        txq->stats.xoffs = 0;
     }
 }
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h
index da607bc2a91..cd4c62694ca 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h
@@ -256,6 +256,11 @@
 #define BCM78905_DEVICE_ID                0xf905
 #define BCM78905_REV_A0                     0x01
 
+/* BCM78907 */
+#define BCM78907_VENDOR_ID                0x14e4
+#define BCM78907_DEVICE_ID                0xf907
+#define BCM78907_REV_A0                     0x01
+
 /*
  * End of Supported Devices and Revisions
  */
@@ -851,6 +856,14 @@ BCMDRD_DEVLIST_ENTRY(BCM78905, BCM78905_VENDOR_ID, BCM78905_DEVICE_ID, BCM78905_
                      "51.2 Tbps Multilayer Switch", 0, 0)
 #endif
 
+#if BCMDRD_CONFIG_INCLUDE_BCM78907_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+BCMDRD_DEVLIST_ENTRY(BCM78907, BCM78907_VENDOR_ID, BCM78907_DEVICE_ID, BCM78907_REV_A0, \
+                     0, 0, \
+                     bcm78907_a0, bcm78907_a0, bcm78907_a0, \
+                     "Tomahawk5-512", "BCM78907", \
+                     "51.2 Tbps Multilayer Switch", 0, 0)
+#endif
+
 /* End BCMDRD_DEVLIST_ENTRY Macros */
 
 #ifdef BCMDRD_DEVLIST_INCLUDE_ALL
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h
index 0a8faeb1362..273d41fb9e6 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h
@@ -511,6 +511,19 @@ typedef struct bcmdrd_symbol_s {
  */
 typedef int (*bcmdrd_sym_mem_cmp_f)(void *ent_a, void *ent_b);
 
+/*!
+ * Memory clear-on-read control structure.
+ */
+typedef struct bcmdrd_sym_mem_corctrl_s {
+
+    /*! Memory clear-on-read control register. */
+    bcmdrd_sid_t sid;
+
+    /*! Memory clear-on-read control field. */
+    bcmdrd_fid_t fid;
+
+} bcmdrd_sym_mem_corctrl_t;
+
 /*!
  * Memory profile structure.
  */
@@ -522,6 +535,9 @@ typedef struct bcmdrd_sym_mem_profile_s {
     /*! Null entry data array. */
     const void *null_ent;
 
+    /*! Memory clear-on-read control. */
+    bcmdrd_sym_mem_corctrl_t *cor_ctrl;
+
 } bcmdrd_sym_mem_profile_t;
 
 /*!
@@ -1031,21 +1047,37 @@ bcmdrd_sym_mem_cmp_fun_get(const bcmdrd_symbols_t *symbols,
 /*!
  * \brief Get null entry of a specified memory symbol.
  *
- * The memory null entry is stored in \c profile of \ref bcmdrd_symbol_t.
- * And \ref bcmdrd_sym_mem_profile_t is used for profile structure of
- * memory symbols. The function is mainly to retrieve the null-entry
+ * The memory null entry is stored in the \c profile member of
+ * \ref bcmdrd_symbol_t. This function is used to retrieve the null-entry
  * pre-defined for memory symbols.
  *
  * \param [in] symbols Symbol table structure.
  * \param [in] symbol Symbol structure.
  *
  * \return Memory null entry pointer. NULL on failure or
- *            no null entry is specified.
+ *         no null entry is specified.
  */
 extern const void *
 bcmdrd_sym_mem_null_ent_get(const bcmdrd_symbols_t *symbols,
                             const bcmdrd_symbol_t *symbol);
 
+/*!
+ * \brief Get the clear-on-read control for a specified memory symbol.
+ *
+ * The memory clear-on-read control is stored in the \c profile member of
+ * \ref bcmdrd_symbol_t. This function is used to retrieve the clear-on-read
+ * control for memory symbols.
+ *
+ * \param [in] symbols Symbol table structure.
+ * \param [in] symbol Symbol structure.
+ *
+ * \return Pointer to the memory clear-on-read control struct. NULL on failure
+ *         or the control is not availabe.
+ */
+extern const bcmdrd_sym_mem_corctrl_t *
+bcmdrd_sym_mem_cor_ctrl_get(const bcmdrd_symbols_t *symbols,
+                            const bcmdrd_symbol_t *symbol);
+
 /*!
  * \brief Get reset value and mask of a specified register symbol.
  *
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h
index 1829a216394..dae17cb1950 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h
@@ -26,17 +26,17 @@
  *
  *     (1) #define BCMDRD_CONFIG_INCLUDE_<CHIPNAME> [1|0]
  *             -- Include or exclude all revisions of the given device
- *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080    1
+ *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780    1
  *
  *     (2) #define BCMDRD_CONFIG_INCLUDE_<CHIPNAME>_<REV>X [1|0]
  *             -- Include or exclude all versions of the given revision
- *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_Ax 0
- *                      #define BCMDRD_CONFIG_INCLUde_BCM56080_Bx 1
+ *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_Ax 0
+ *                      #define BCMDRD_CONFIG_INCLUde_BCM56780_Bx 1
  *
  *     (3) #define BCMDRD_CONFIG_INCLUDE_<EXACT_CHIP> [1|0]
  *             -- Include or exclude an exact device
- *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
- *                      #define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 0
+ *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+ *                      #define BCMDRD_CONFIG_INCLUDE_BCM56780_A1 0
  *
  *
  * The value of BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT is used for any
@@ -63,28 +63,34 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080
-#define BCMDRD_CONFIG_INCLUDE_BCM56080 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56080 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_Ax BCMDRD_CONFIG_INCLUDE_BCM56080
+#  define BCMDRD_CONFIG_INCLUDE_BCM56080_Ax BCMDRD_CONFIG_INCLUDE_BCM56080
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_BCM56080_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_BCM56080_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 BCMDRD_CONFIG_INCLUDE_BCM56080_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 BCMDRD_CONFIG_INCLUDE_BCM56080_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56080_A1 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56080_A0) && BCMDRD_CONFIG_INCLUDE_BCM56080_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -94,35 +100,41 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56081
-#define BCMDRD_CONFIG_INCLUDE_BCM56081 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56081 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56081_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56081_Ax BCMDRD_CONFIG_INCLUDE_BCM56081
+#  define BCMDRD_CONFIG_INCLUDE_BCM56081_Ax BCMDRD_CONFIG_INCLUDE_BCM56081
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56081_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56081_A0 BCMDRD_CONFIG_INCLUDE_BCM56081_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56081_A0 BCMDRD_CONFIG_INCLUDE_BCM56081_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56081_A1
-#define BCMDRD_CONFIG_INCLUDE_BCM56081_A1 BCMDRD_CONFIG_INCLUDE_BCM56081_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56081_A1 BCMDRD_CONFIG_INCLUDE_BCM56081_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56081_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56081_A1 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56080_A0) && BCMDRD_CONFIG_INCLUDE_BCM56080_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -132,35 +144,41 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56082
-#define BCMDRD_CONFIG_INCLUDE_BCM56082 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56082 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56082_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56082_Ax BCMDRD_CONFIG_INCLUDE_BCM56082
+#  define BCMDRD_CONFIG_INCLUDE_BCM56082_Ax BCMDRD_CONFIG_INCLUDE_BCM56082
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56082_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56082_A0 BCMDRD_CONFIG_INCLUDE_BCM56082_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56082_A0 BCMDRD_CONFIG_INCLUDE_BCM56082_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56082_A1
-#define BCMDRD_CONFIG_INCLUDE_BCM56082_A1 BCMDRD_CONFIG_INCLUDE_BCM56082_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56082_A1 BCMDRD_CONFIG_INCLUDE_BCM56082_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56082_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56082_A1 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56080_A0) && BCMDRD_CONFIG_INCLUDE_BCM56080_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -170,35 +188,41 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56083
-#define BCMDRD_CONFIG_INCLUDE_BCM56083 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56083 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56083_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56083_Ax BCMDRD_CONFIG_INCLUDE_BCM56083
+#  define BCMDRD_CONFIG_INCLUDE_BCM56083_Ax BCMDRD_CONFIG_INCLUDE_BCM56083
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56083_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56083_A0 BCMDRD_CONFIG_INCLUDE_BCM56083_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56083_A0 BCMDRD_CONFIG_INCLUDE_BCM56083_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56083_A1
-#define BCMDRD_CONFIG_INCLUDE_BCM56083_A1 BCMDRD_CONFIG_INCLUDE_BCM56083_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56083_A1 BCMDRD_CONFIG_INCLUDE_BCM56083_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56083_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56083_A1 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56080_A0) && BCMDRD_CONFIG_INCLUDE_BCM56080_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -208,35 +232,41 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56084
-#define BCMDRD_CONFIG_INCLUDE_BCM56084 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56084 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56084_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56084_Ax BCMDRD_CONFIG_INCLUDE_BCM56084
+#  define BCMDRD_CONFIG_INCLUDE_BCM56084_Ax BCMDRD_CONFIG_INCLUDE_BCM56084
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56084_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56084_A0 BCMDRD_CONFIG_INCLUDE_BCM56084_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56084_A0 BCMDRD_CONFIG_INCLUDE_BCM56084_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56084_A1
-#define BCMDRD_CONFIG_INCLUDE_BCM56084_A1 BCMDRD_CONFIG_INCLUDE_BCM56084_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56084_A1 BCMDRD_CONFIG_INCLUDE_BCM56084_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56084_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56084_A1 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56080_A0) && BCMDRD_CONFIG_INCLUDE_BCM56080_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -246,35 +276,41 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56085
-#define BCMDRD_CONFIG_INCLUDE_BCM56085 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56085 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56085_Ax BCMDRD_CONFIG_INCLUDE_BCM56085
+#  define BCMDRD_CONFIG_INCLUDE_BCM56085_Ax BCMDRD_CONFIG_INCLUDE_BCM56085
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56085_A0 BCMDRD_CONFIG_INCLUDE_BCM56085_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56085_A0 BCMDRD_CONFIG_INCLUDE_BCM56085_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_A1
-#define BCMDRD_CONFIG_INCLUDE_BCM56085_A1 BCMDRD_CONFIG_INCLUDE_BCM56085_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56085_A1 BCMDRD_CONFIG_INCLUDE_BCM56085_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56085_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56085_A1 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56080_A0) && BCMDRD_CONFIG_INCLUDE_BCM56080_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -284,14 +320,20 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56690
-#define BCMDRD_CONFIG_INCLUDE_BCM56690 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56690 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56690_Ax BCMDRD_CONFIG_INCLUDE_BCM56690
+#  define BCMDRD_CONFIG_INCLUDE_BCM56690_Ax BCMDRD_CONFIG_INCLUDE_BCM56690
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 BCMDRD_CONFIG_INCLUDE_BCM56690_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 BCMDRD_CONFIG_INCLUDE_BCM56690_Ax
+#endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56690_A0) && BCMDRD_CONFIG_INCLUDE_BCM56690_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -301,25 +343,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56692
-#define BCMDRD_CONFIG_INCLUDE_BCM56692 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56692 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56692_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56692_Ax BCMDRD_CONFIG_INCLUDE_BCM56692
+#  define BCMDRD_CONFIG_INCLUDE_BCM56692_Ax BCMDRD_CONFIG_INCLUDE_BCM56692
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56692_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56692_A0 BCMDRD_CONFIG_INCLUDE_BCM56692_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56692_A0 BCMDRD_CONFIG_INCLUDE_BCM56692_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56692_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56690_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56690_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56690_A0) && BCMDRD_CONFIG_INCLUDE_BCM56690_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -329,35 +377,41 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56089
-#define BCMDRD_CONFIG_INCLUDE_BCM56089 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56089 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56089_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56089_Ax BCMDRD_CONFIG_INCLUDE_BCM56089
+#  define BCMDRD_CONFIG_INCLUDE_BCM56089_Ax BCMDRD_CONFIG_INCLUDE_BCM56089
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56089_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56089_A0 BCMDRD_CONFIG_INCLUDE_BCM56089_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56089_A0 BCMDRD_CONFIG_INCLUDE_BCM56089_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56089_A1
-#define BCMDRD_CONFIG_INCLUDE_BCM56089_A1 BCMDRD_CONFIG_INCLUDE_BCM56089_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56089_A1 BCMDRD_CONFIG_INCLUDE_BCM56089_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56089_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56089_A1 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56780_A0) && BCMDRD_CONFIG_INCLUDE_BCM56780_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -367,14 +421,20 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780
-#define BCMDRD_CONFIG_INCLUDE_BCM56780 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56780 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_Ax BCMDRD_CONFIG_INCLUDE_BCM56780
+#  define BCMDRD_CONFIG_INCLUDE_BCM56780_Ax BCMDRD_CONFIG_INCLUDE_BCM56780
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_BCM56780_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_BCM56780_Ax
+#endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56780_A0) && BCMDRD_CONFIG_INCLUDE_BCM56780_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -384,35 +444,41 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56782
-#define BCMDRD_CONFIG_INCLUDE_BCM56782 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56782 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56782_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56782_Ax BCMDRD_CONFIG_INCLUDE_BCM56782
+#  define BCMDRD_CONFIG_INCLUDE_BCM56782_Ax BCMDRD_CONFIG_INCLUDE_BCM56782
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56782_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56782_A0 BCMDRD_CONFIG_INCLUDE_BCM56782_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56782_A0 BCMDRD_CONFIG_INCLUDE_BCM56782_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56782_A1
-#define BCMDRD_CONFIG_INCLUDE_BCM56782_A1 BCMDRD_CONFIG_INCLUDE_BCM56782_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56782_A1 BCMDRD_CONFIG_INCLUDE_BCM56782_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56782_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56782_A1 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56780_A0) && BCMDRD_CONFIG_INCLUDE_BCM56780_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -422,25 +488,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56784
-#define BCMDRD_CONFIG_INCLUDE_BCM56784 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56784 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56784_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56784_Ax BCMDRD_CONFIG_INCLUDE_BCM56784
+#  define BCMDRD_CONFIG_INCLUDE_BCM56784_Ax BCMDRD_CONFIG_INCLUDE_BCM56784
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56784_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56784_A0 BCMDRD_CONFIG_INCLUDE_BCM56784_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56784_A0 BCMDRD_CONFIG_INCLUDE_BCM56784_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56784_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56780_A0) && BCMDRD_CONFIG_INCLUDE_BCM56780_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -450,25 +522,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56785
-#define BCMDRD_CONFIG_INCLUDE_BCM56785 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56785 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56785_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56785_Ax BCMDRD_CONFIG_INCLUDE_BCM56785
+#  define BCMDRD_CONFIG_INCLUDE_BCM56785_Ax BCMDRD_CONFIG_INCLUDE_BCM56785
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56785_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56785_A0 BCMDRD_CONFIG_INCLUDE_BCM56785_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56785_A0 BCMDRD_CONFIG_INCLUDE_BCM56785_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56785_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56780_A0) && BCMDRD_CONFIG_INCLUDE_BCM56780_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -478,35 +556,41 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56786
-#define BCMDRD_CONFIG_INCLUDE_BCM56786 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56786 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56786_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56786_Ax BCMDRD_CONFIG_INCLUDE_BCM56786
+#  define BCMDRD_CONFIG_INCLUDE_BCM56786_Ax BCMDRD_CONFIG_INCLUDE_BCM56786
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56786_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56786_A0 BCMDRD_CONFIG_INCLUDE_BCM56786_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56786_A0 BCMDRD_CONFIG_INCLUDE_BCM56786_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56786_A1
-#define BCMDRD_CONFIG_INCLUDE_BCM56786_A1 BCMDRD_CONFIG_INCLUDE_BCM56786_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56786_A1 BCMDRD_CONFIG_INCLUDE_BCM56786_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56786_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56786_A1 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56780_A0) && BCMDRD_CONFIG_INCLUDE_BCM56780_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -516,35 +600,41 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56787
-#define BCMDRD_CONFIG_INCLUDE_BCM56787 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56787 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56787_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56787_Ax BCMDRD_CONFIG_INCLUDE_BCM56787
+#  define BCMDRD_CONFIG_INCLUDE_BCM56787_Ax BCMDRD_CONFIG_INCLUDE_BCM56787
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56787_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56787_A0 BCMDRD_CONFIG_INCLUDE_BCM56787_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56787_A0 BCMDRD_CONFIG_INCLUDE_BCM56787_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56787_A1
-#define BCMDRD_CONFIG_INCLUDE_BCM56787_A1 BCMDRD_CONFIG_INCLUDE_BCM56787_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56787_A1 BCMDRD_CONFIG_INCLUDE_BCM56787_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56787_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56787_A1 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56780_A0) && BCMDRD_CONFIG_INCLUDE_BCM56780_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -554,35 +644,41 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56788
-#define BCMDRD_CONFIG_INCLUDE_BCM56788 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56788 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56788_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56788_Ax BCMDRD_CONFIG_INCLUDE_BCM56788
+#  define BCMDRD_CONFIG_INCLUDE_BCM56788_Ax BCMDRD_CONFIG_INCLUDE_BCM56788
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56788_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56788_A0 BCMDRD_CONFIG_INCLUDE_BCM56788_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56788_A0 BCMDRD_CONFIG_INCLUDE_BCM56788_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56788_A1
-#define BCMDRD_CONFIG_INCLUDE_BCM56788_A1 BCMDRD_CONFIG_INCLUDE_BCM56788_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56788_A1 BCMDRD_CONFIG_INCLUDE_BCM56788_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56788_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56788_A1 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56780_A0) && BCMDRD_CONFIG_INCLUDE_BCM56780_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -592,25 +688,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56789
-#define BCMDRD_CONFIG_INCLUDE_BCM56789 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56789 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56789_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56789_Ax BCMDRD_CONFIG_INCLUDE_BCM56789
+#  define BCMDRD_CONFIG_INCLUDE_BCM56789_Ax BCMDRD_CONFIG_INCLUDE_BCM56789
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56789_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56789_A0 BCMDRD_CONFIG_INCLUDE_BCM56789_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56789_A0 BCMDRD_CONFIG_INCLUDE_BCM56789_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56789_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56780_A0) && BCMDRD_CONFIG_INCLUDE_BCM56780_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -620,31 +722,37 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56880
-#define BCMDRD_CONFIG_INCLUDE_BCM56880 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56880 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56880_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_Ax BCMDRD_CONFIG_INCLUDE_BCM56880
+#  define BCMDRD_CONFIG_INCLUDE_BCM56880_Ax BCMDRD_CONFIG_INCLUDE_BCM56880
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 BCMDRD_CONFIG_INCLUDE_BCM56880_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 BCMDRD_CONFIG_INCLUDE_BCM56880_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56880_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_Bx BCMDRD_CONFIG_INCLUDE_BCM56880
+#  define BCMDRD_CONFIG_INCLUDE_BCM56880_Bx BCMDRD_CONFIG_INCLUDE_BCM56880
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56880_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_B0 BCMDRD_CONFIG_INCLUDE_BCM56880_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM56880_B0 BCMDRD_CONFIG_INCLUDE_BCM56880_Bx
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56880_B0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56880_A0) && BCMDRD_CONFIG_INCLUDE_BCM56880_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -654,38 +762,44 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56881
-#define BCMDRD_CONFIG_INCLUDE_BCM56881 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56881 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56881_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56881_Ax BCMDRD_CONFIG_INCLUDE_BCM56881
+#  define BCMDRD_CONFIG_INCLUDE_BCM56881_Ax BCMDRD_CONFIG_INCLUDE_BCM56881
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56881_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56881_A0 BCMDRD_CONFIG_INCLUDE_BCM56881_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56881_A0 BCMDRD_CONFIG_INCLUDE_BCM56881_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56881_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM56881_Bx BCMDRD_CONFIG_INCLUDE_BCM56881
+#  define BCMDRD_CONFIG_INCLUDE_BCM56881_Bx BCMDRD_CONFIG_INCLUDE_BCM56881
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56881_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56881_B0 BCMDRD_CONFIG_INCLUDE_BCM56881_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM56881_B0 BCMDRD_CONFIG_INCLUDE_BCM56881_Bx
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56881_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56881_B0 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56880_A0) && BCMDRD_CONFIG_INCLUDE_BCM56880_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -695,38 +809,44 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56883
-#define BCMDRD_CONFIG_INCLUDE_BCM56883 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56883 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56883_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56883_Ax BCMDRD_CONFIG_INCLUDE_BCM56883
+#  define BCMDRD_CONFIG_INCLUDE_BCM56883_Ax BCMDRD_CONFIG_INCLUDE_BCM56883
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56883_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56883_A0 BCMDRD_CONFIG_INCLUDE_BCM56883_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56883_A0 BCMDRD_CONFIG_INCLUDE_BCM56883_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56883_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM56883_Bx BCMDRD_CONFIG_INCLUDE_BCM56883
+#  define BCMDRD_CONFIG_INCLUDE_BCM56883_Bx BCMDRD_CONFIG_INCLUDE_BCM56883
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56883_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56883_B0 BCMDRD_CONFIG_INCLUDE_BCM56883_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM56883_B0 BCMDRD_CONFIG_INCLUDE_BCM56883_Bx
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56883_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56883_B0 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56880_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56880_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56880_A0) && BCMDRD_CONFIG_INCLUDE_BCM56880_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -736,14 +856,20 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56890
-#define BCMDRD_CONFIG_INCLUDE_BCM56890 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56890 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_Ax BCMDRD_CONFIG_INCLUDE_BCM56890
+#  define BCMDRD_CONFIG_INCLUDE_BCM56890_Ax BCMDRD_CONFIG_INCLUDE_BCM56890
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_BCM56890_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_BCM56890_Ax
+#endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56890_A0) && BCMDRD_CONFIG_INCLUDE_BCM56890_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -753,25 +879,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56891
-#define BCMDRD_CONFIG_INCLUDE_BCM56891 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56891 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56891_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56891_Ax BCMDRD_CONFIG_INCLUDE_BCM56891
+#  define BCMDRD_CONFIG_INCLUDE_BCM56891_Ax BCMDRD_CONFIG_INCLUDE_BCM56891
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56891_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56891_A0 BCMDRD_CONFIG_INCLUDE_BCM56891_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56891_A0 BCMDRD_CONFIG_INCLUDE_BCM56891_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56891_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56890_A0) && BCMDRD_CONFIG_INCLUDE_BCM56890_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -781,25 +913,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56892
-#define BCMDRD_CONFIG_INCLUDE_BCM56892 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56892 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56892_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56892_Ax BCMDRD_CONFIG_INCLUDE_BCM56892
+#  define BCMDRD_CONFIG_INCLUDE_BCM56892_Ax BCMDRD_CONFIG_INCLUDE_BCM56892
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56892_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56892_A0 BCMDRD_CONFIG_INCLUDE_BCM56892_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56892_A0 BCMDRD_CONFIG_INCLUDE_BCM56892_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56892_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56890_A0) && BCMDRD_CONFIG_INCLUDE_BCM56890_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -809,25 +947,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56895
-#define BCMDRD_CONFIG_INCLUDE_BCM56895 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56895 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56895_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56895_Ax BCMDRD_CONFIG_INCLUDE_BCM56895
+#  define BCMDRD_CONFIG_INCLUDE_BCM56895_Ax BCMDRD_CONFIG_INCLUDE_BCM56895
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56895_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56895_A0 BCMDRD_CONFIG_INCLUDE_BCM56895_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56895_A0 BCMDRD_CONFIG_INCLUDE_BCM56895_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56895_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56890_A0) && BCMDRD_CONFIG_INCLUDE_BCM56890_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -837,25 +981,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56896
-#define BCMDRD_CONFIG_INCLUDE_BCM56896 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56896 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56896_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56896_Ax BCMDRD_CONFIG_INCLUDE_BCM56896
+#  define BCMDRD_CONFIG_INCLUDE_BCM56896_Ax BCMDRD_CONFIG_INCLUDE_BCM56896
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56896_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56896_A0 BCMDRD_CONFIG_INCLUDE_BCM56896_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56896_A0 BCMDRD_CONFIG_INCLUDE_BCM56896_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56896_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56890_A0) && BCMDRD_CONFIG_INCLUDE_BCM56890_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -865,20 +1015,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56990
-#define BCMDRD_CONFIG_INCLUDE_BCM56990 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56990 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56990_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_Ax BCMDRD_CONFIG_INCLUDE_BCM56990
+#  define BCMDRD_CONFIG_INCLUDE_BCM56990_Ax BCMDRD_CONFIG_INCLUDE_BCM56990
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56990_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_A0 BCMDRD_CONFIG_INCLUDE_BCM56990_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56990_A0 BCMDRD_CONFIG_INCLUDE_BCM56990_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56990_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_Bx BCMDRD_CONFIG_INCLUDE_BCM56990
+#  define BCMDRD_CONFIG_INCLUDE_BCM56990_Bx BCMDRD_CONFIG_INCLUDE_BCM56990
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 BCMDRD_CONFIG_INCLUDE_BCM56990_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 BCMDRD_CONFIG_INCLUDE_BCM56990_Bx
+#endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56990_A0) && BCMDRD_CONFIG_INCLUDE_BCM56990_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
+#endif
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56990_B0) && BCMDRD_CONFIG_INCLUDE_BCM56990_B0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -888,25 +1049,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56991
-#define BCMDRD_CONFIG_INCLUDE_BCM56991 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56991 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56991_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM56991_Bx BCMDRD_CONFIG_INCLUDE_BCM56991
+#  define BCMDRD_CONFIG_INCLUDE_BCM56991_Bx BCMDRD_CONFIG_INCLUDE_BCM56991
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56991_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56991_B0 BCMDRD_CONFIG_INCLUDE_BCM56991_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM56991_B0 BCMDRD_CONFIG_INCLUDE_BCM56991_Bx
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56991_B0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56990_B0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56990_B0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56990_B0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56990_B0) && BCMDRD_CONFIG_INCLUDE_BCM56990_B0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -916,25 +1083,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56992
-#define BCMDRD_CONFIG_INCLUDE_BCM56992 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56992 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56992_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM56992_Bx BCMDRD_CONFIG_INCLUDE_BCM56992
+#  define BCMDRD_CONFIG_INCLUDE_BCM56992_Bx BCMDRD_CONFIG_INCLUDE_BCM56992
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56992_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56992_B0 BCMDRD_CONFIG_INCLUDE_BCM56992_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM56992_B0 BCMDRD_CONFIG_INCLUDE_BCM56992_Bx
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56992_B0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56990_B0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56990_B0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56990_B0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56990_B0) && BCMDRD_CONFIG_INCLUDE_BCM56990_B0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -944,25 +1117,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56993
-#define BCMDRD_CONFIG_INCLUDE_BCM56993 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56993 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56993_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM56993_Bx BCMDRD_CONFIG_INCLUDE_BCM56993
+#  define BCMDRD_CONFIG_INCLUDE_BCM56993_Bx BCMDRD_CONFIG_INCLUDE_BCM56993
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56993_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56993_B0 BCMDRD_CONFIG_INCLUDE_BCM56993_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM56993_B0 BCMDRD_CONFIG_INCLUDE_BCM56993_Bx
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56993_B0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56990_B0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56990_B0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56990_B0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56990_B0) && BCMDRD_CONFIG_INCLUDE_BCM56990_B0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -972,20 +1151,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56996
-#define BCMDRD_CONFIG_INCLUDE_BCM56996 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56996 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56996_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56996_Ax BCMDRD_CONFIG_INCLUDE_BCM56996
+#  define BCMDRD_CONFIG_INCLUDE_BCM56996_Ax BCMDRD_CONFIG_INCLUDE_BCM56996
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56996_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56996_A0 BCMDRD_CONFIG_INCLUDE_BCM56996_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56996_A0 BCMDRD_CONFIG_INCLUDE_BCM56996_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56996_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM56996_Bx BCMDRD_CONFIG_INCLUDE_BCM56996
+#  define BCMDRD_CONFIG_INCLUDE_BCM56996_Bx BCMDRD_CONFIG_INCLUDE_BCM56996
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56996_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56996_B0 BCMDRD_CONFIG_INCLUDE_BCM56996_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM56996_B0 BCMDRD_CONFIG_INCLUDE_BCM56996_Bx
+#endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56996_A0) && BCMDRD_CONFIG_INCLUDE_BCM56996_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
+#endif
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56996_B0) && BCMDRD_CONFIG_INCLUDE_BCM56996_B0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -995,41 +1185,52 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56997
-#define BCMDRD_CONFIG_INCLUDE_BCM56997 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56997 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56997_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56997_Ax BCMDRD_CONFIG_INCLUDE_BCM56997
+#  define BCMDRD_CONFIG_INCLUDE_BCM56997_Ax BCMDRD_CONFIG_INCLUDE_BCM56997
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56997_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56997_A0 BCMDRD_CONFIG_INCLUDE_BCM56997_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56997_A0 BCMDRD_CONFIG_INCLUDE_BCM56997_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56997_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM56997_Bx BCMDRD_CONFIG_INCLUDE_BCM56997
+#  define BCMDRD_CONFIG_INCLUDE_BCM56997_Bx BCMDRD_CONFIG_INCLUDE_BCM56997
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56997_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56997_B0 BCMDRD_CONFIG_INCLUDE_BCM56997_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM56997_B0 BCMDRD_CONFIG_INCLUDE_BCM56997_Bx
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56997_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56996_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56996_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56996_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56996_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56996_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56996_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56996_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56996_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56996_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56996_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56996_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56996_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56997_B0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56996_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56996_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56996_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56996_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56996_B0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56996_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56996_B0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56996_B0_IMPLIED 1
+#  endif
 #endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56996_B0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56996_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56996_B0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56996_B0_IMPLIED 1
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56996_A0) && BCMDRD_CONFIG_INCLUDE_BCM56996_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56996_B0) && BCMDRD_CONFIG_INCLUDE_BCM56996_B0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -1039,14 +1240,20 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56998
-#define BCMDRD_CONFIG_INCLUDE_BCM56998 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56998 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56998_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56998_Ax BCMDRD_CONFIG_INCLUDE_BCM56998
+#  define BCMDRD_CONFIG_INCLUDE_BCM56998_Ax BCMDRD_CONFIG_INCLUDE_BCM56998
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56998_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56998_A0 BCMDRD_CONFIG_INCLUDE_BCM56998_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56998_A0 BCMDRD_CONFIG_INCLUDE_BCM56998_Ax
+#endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56998_A0) && BCMDRD_CONFIG_INCLUDE_BCM56998_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -1056,38 +1263,44 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56995
-#define BCMDRD_CONFIG_INCLUDE_BCM56995 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56995 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56995_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56995_Ax BCMDRD_CONFIG_INCLUDE_BCM56995
+#  define BCMDRD_CONFIG_INCLUDE_BCM56995_Ax BCMDRD_CONFIG_INCLUDE_BCM56995
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56995_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56995_A0 BCMDRD_CONFIG_INCLUDE_BCM56995_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56995_A0 BCMDRD_CONFIG_INCLUDE_BCM56995_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56995_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM56995_Bx BCMDRD_CONFIG_INCLUDE_BCM56995
+#  define BCMDRD_CONFIG_INCLUDE_BCM56995_Bx BCMDRD_CONFIG_INCLUDE_BCM56995
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56995_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56995_B0 BCMDRD_CONFIG_INCLUDE_BCM56995_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM56995_B0 BCMDRD_CONFIG_INCLUDE_BCM56995_Bx
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56995_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED 1
-#endif
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED 1
+#  endif
 #endif
 #if BCMDRD_CONFIG_INCLUDE_BCM56995_B0 == 1
-#if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED 1
+#  if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56999_A0) && BCMDRD_CONFIG_INCLUDE_BCM56999_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -1097,31 +1310,37 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56999
-#define BCMDRD_CONFIG_INCLUDE_BCM56999 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM56999 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_Ax BCMDRD_CONFIG_INCLUDE_BCM56999
+#  define BCMDRD_CONFIG_INCLUDE_BCM56999_Ax BCMDRD_CONFIG_INCLUDE_BCM56999
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 BCMDRD_CONFIG_INCLUDE_BCM56999_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 BCMDRD_CONFIG_INCLUDE_BCM56999_Ax
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_Bx BCMDRD_CONFIG_INCLUDE_BCM56999
+#  define BCMDRD_CONFIG_INCLUDE_BCM56999_Bx BCMDRD_CONFIG_INCLUDE_BCM56999
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_B0 BCMDRD_CONFIG_INCLUDE_BCM56999_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM56999_B0 BCMDRD_CONFIG_INCLUDE_BCM56999_Bx
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56999_B0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM56999_A0) && BCMDRD_CONFIG_INCLUDE_BCM56999_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSX
+#  endif
 #endif
 
 
@@ -1131,14 +1350,20 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78800
-#define BCMDRD_CONFIG_INCLUDE_BCM78800 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM78800 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78800_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM78800_Ax BCMDRD_CONFIG_INCLUDE_BCM78800
+#  define BCMDRD_CONFIG_INCLUDE_BCM78800_Ax BCMDRD_CONFIG_INCLUDE_BCM78800
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78800_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 BCMDRD_CONFIG_INCLUDE_BCM78800_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 BCMDRD_CONFIG_INCLUDE_BCM78800_Ax
+#endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM78800_A0) && BCMDRD_CONFIG_INCLUDE_BCM78800_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#  endif
 #endif
 
 
@@ -1148,25 +1373,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78808
-#define BCMDRD_CONFIG_INCLUDE_BCM78808 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM78808 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78808_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM78808_Ax BCMDRD_CONFIG_INCLUDE_BCM78808
+#  define BCMDRD_CONFIG_INCLUDE_BCM78808_Ax BCMDRD_CONFIG_INCLUDE_BCM78808
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78808_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM78808_A0 BCMDRD_CONFIG_INCLUDE_BCM78808_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM78808_A0 BCMDRD_CONFIG_INCLUDE_BCM78808_Ax
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM78808_A0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM78800_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM78800_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM78800_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM78800_A0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM78800_A0
+#    define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM78800_A0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM78800_A0) && BCMDRD_CONFIG_INCLUDE_BCM78800_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#  endif
 #endif
 
 
@@ -1176,14 +1407,20 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78900
-#define BCMDRD_CONFIG_INCLUDE_BCM78900 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM78900 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM78900_Bx BCMDRD_CONFIG_INCLUDE_BCM78900
+#  define BCMDRD_CONFIG_INCLUDE_BCM78900_Bx BCMDRD_CONFIG_INCLUDE_BCM78900
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_BCM78900_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_BCM78900_Bx
+#endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM78900_B0) && BCMDRD_CONFIG_INCLUDE_BCM78900_B0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#  endif
 #endif
 
 
@@ -1193,25 +1430,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78902
-#define BCMDRD_CONFIG_INCLUDE_BCM78902 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM78902 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78902_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM78902_Bx BCMDRD_CONFIG_INCLUDE_BCM78902
+#  define BCMDRD_CONFIG_INCLUDE_BCM78902_Bx BCMDRD_CONFIG_INCLUDE_BCM78902
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78902_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM78902_B0 BCMDRD_CONFIG_INCLUDE_BCM78902_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM78902_B0 BCMDRD_CONFIG_INCLUDE_BCM78902_Bx
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM78902_B0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM78900_B0) && BCMDRD_CONFIG_INCLUDE_BCM78900_B0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#  endif
 #endif
 
 
@@ -1221,25 +1464,31 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78903
-#define BCMDRD_CONFIG_INCLUDE_BCM78903 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM78903 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78903_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM78903_Bx BCMDRD_CONFIG_INCLUDE_BCM78903
+#  define BCMDRD_CONFIG_INCLUDE_BCM78903_Bx BCMDRD_CONFIG_INCLUDE_BCM78903
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78903_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM78903_B0 BCMDRD_CONFIG_INCLUDE_BCM78903_Bx
+#  define BCMDRD_CONFIG_INCLUDE_BCM78903_B0 BCMDRD_CONFIG_INCLUDE_BCM78903_Bx
 #endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM78903_B0 == 1
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
-#endif
-#if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 != 1
-#undef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 1
-#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  endif
+#  if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 != 1
+#    undef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
+#    define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 1
+#    define BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED 1
+#  endif
 #endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM78900_B0) && BCMDRD_CONFIG_INCLUDE_BCM78900_B0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#  endif
 #endif
 
 
@@ -1249,14 +1498,43 @@
 
 /* Sets the default include state if it was not given */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78905
-#define BCMDRD_CONFIG_INCLUDE_BCM78905 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#  define BCMDRD_CONFIG_INCLUDE_BCM78905 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_Ax
-#define BCMDRD_CONFIG_INCLUDE_BCM78905_Ax BCMDRD_CONFIG_INCLUDE_BCM78905
+#  define BCMDRD_CONFIG_INCLUDE_BCM78905_Ax BCMDRD_CONFIG_INCLUDE_BCM78905
 #endif
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_A0
-#define BCMDRD_CONFIG_INCLUDE_BCM78905_A0 BCMDRD_CONFIG_INCLUDE_BCM78905_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM78905_A0 BCMDRD_CONFIG_INCLUDE_BCM78905_Ax
+#endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM78905_A0) && BCMDRD_CONFIG_INCLUDE_BCM78905_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#  endif
+#endif
+
+
+/*
+ * BCM78907
+ */
+
+/* Sets the default include state if it was not given */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78907
+#  define BCMDRD_CONFIG_INCLUDE_BCM78907 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+/* Resolve revision dependencies */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78907_Ax
+#  define BCMDRD_CONFIG_INCLUDE_BCM78907_Ax BCMDRD_CONFIG_INCLUDE_BCM78907
+#endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78907_A0
+#  define BCMDRD_CONFIG_INCLUDE_BCM78907_A0 BCMDRD_CONFIG_INCLUDE_BCM78907_Ax
+#endif
+/* Chip architecture */
+#if defined(BCMDRD_CONFIG_INCLUDE_BCM78907_A0) && BCMDRD_CONFIG_INCLUDE_BCM78907_A0 == 1
+#  ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#    define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR
+#  endif
 #endif
 
 
@@ -1456,5 +1734,11 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_A0)
 #ifdef BCMDRD_CONFIG_INCLUDE_BCM78905_A0_IMPLIED
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_A0_IMPLIED)
 #endif
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78907)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78907_Ax)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78907_A0)
+#ifdef BCMDRD_CONFIG_INCLUDE_BCM78907_A0_IMPLIED
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78907_A0_IMPLIED)
+#endif
 #undef CONFIG_OPTION
 #endif /* #ifdef CONFIG_OPTION */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h
index 684b80a9970..703ac6470d2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h
@@ -27,9 +27,11 @@
 #define BCMLRD_VARIANT_DEFS_INTERNAL_H
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 /*+replace reverse */
+#include "../../defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h"
-#include "../../defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_lrd_variant_def.h"
 #include "../../defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h"
@@ -37,18 +39,18 @@
 #include "../../defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_lrd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h"
 /*-replace*/
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_lrd_variant_def.h
deleted file mode 100644
index c5376c11ef1..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_lrd_variant_def.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56690_A0_DNA_6_5_31_7_0_LRD_VARIANT_DEF_H
-#define GEN_BCM56690_A0_DNA_6_5_31_7_0_LRD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLRD_VARIANT_BCM56690_A0_DNA_6_5_31_7_0 BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_31_7_0
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56690_A0_DNA_6_5_31_7_0_LRD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h
new file mode 100644
index 00000000000..0a64d43e1e4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56690_A0_DNA_6_5_32_5_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56690_A0_DNA_6_5_32_5_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56690_A0_DNA_6_5_32_5_0 BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_32_5_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56690_A0_DNA_6_5_32_5_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_lrd_variant_def.h
deleted file mode 100644
index 57b0eb30cd0..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_lrd_variant_def.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLRD_VARIANT_BCM56780_A0_CNA_6_5_31_3_0 BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_31_3_0
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56780_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_lrd_variant_def.h
new file mode 100644
index 00000000000..89e67a78f8f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56780_A0_CNA_6_5_32_3_0 BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_32_3_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_lrd_variant_def.h
deleted file mode 100644
index 99fc561ffe8..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_lrd_variant_def.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLRD_VARIANT_BCM56780_A0_HNA_6_5_31_3_0 BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_31_3_0
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56780_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_lrd_variant_def.h
new file mode 100644
index 00000000000..f486aa11cd7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56780_A0_HNA_6_5_32_2_0 BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_32_2_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_lrd_variant_def.h
deleted file mode 100644
index 1a1e632b9ed..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_lrd_variant_def.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLRD_VARIANT_BCM56880_A0_HNA_6_5_31_3_0 BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_31_3_0
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_HNA_6_5_31_3_0_LRD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_lrd_variant_def.h
new file mode 100644
index 00000000000..1a9f0d3ebca
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56880_A0_HNA_6_5_32_2_0 BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_32_2_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_lrd_variant_def.h
deleted file mode 100644
index e7e9cb62e80..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_lrd_variant_def.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_NFA_6_5_31_3_1_LRD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_NFA_6_5_31_3_1_LRD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLRD_VARIANT_BCM56880_A0_NFA_6_5_31_3_1 BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_31_3_1
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_NFA_6_5_31_3_1_LRD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_lrd_variant_def.h
new file mode 100644
index 00000000000..ba6647a3350
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_NFA_6_5_32_1_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_NFA_6_5_32_1_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56880_A0_NFA_6_5_32_1_0 BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_32_1_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_NFA_6_5_32_1_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_lrd_variant_def.h
deleted file mode 100644
index 70385f1d6ac..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_lrd_variant_def.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H
-#define GEN_BCM56890_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLRD_VARIANT_BCM56890_A0_CNA_6_5_31_3_0 BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_31_3_0
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56890_A0_CNA_6_5_31_3_0_LRD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_lrd_variant_def.h
new file mode 100644
index 00000000000..7b99b51f993
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56890_A0_CNA_6_5_32_3_0 BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_32_3_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_lrd_variant_def.h
deleted file mode 100644
index 1203b6c1d7d..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_lrd_variant_def.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_DNA_6_5_31_6_0_LRD_VARIANT_DEF_H
-#define GEN_BCM56890_A0_DNA_6_5_31_6_0_LRD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLRD_VARIANT_BCM56890_A0_DNA_6_5_31_6_0 BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_31_6_0
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56890_A0_DNA_6_5_31_6_0_LRD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_lrd_variant_def.h
new file mode 100644
index 00000000000..cce4363fd95
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_DNA_6_5_32_4_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_DNA_6_5_32_4_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56890_A0_DNA_6_5_32_4_0 BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_32_4_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_DNA_6_5_32_4_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_lrd_variant_def.h
new file mode 100644
index 00000000000..42ebeae8751
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H
+#define GEN_BCM78800_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM78800_A0_CNA_6_5_32_3_0 BCMLTD_VARIANT_BCM78800_A0_CNA_6_5_32_3_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78800_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_lrd_variant_def.h
deleted file mode 100644
index 7d884106722..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_lrd_variant_def.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM78800_A0_DNA_6_5_31_5_0_LRD_VARIANT_DEF_H
-#define GEN_BCM78800_A0_DNA_6_5_31_5_0_LRD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLRD_VARIANT_BCM78800_A0_DNA_6_5_31_5_0 BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_31_5_0
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM78800_A0_DNA_6_5_31_5_0_LRD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h
new file mode 100644
index 00000000000..01a934813d2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_DNA_6_5_32_3_0_LRD_VARIANT_DEF_H
+#define GEN_BCM78800_A0_DNA_6_5_32_3_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM78800_A0_DNA_6_5_32_3_0 BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_32_3_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78800_A0_DNA_6_5_32_3_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h
new file mode 100644
index 00000000000..fdbdd4aedbb
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78907_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM78907_A0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM78907_A0_BASE BCMLTD_VARIANT_BCM78907_A0_BASE
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78907_A0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h
index d459f0845d3..fa342c4895b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h
@@ -27,9 +27,11 @@
 #define GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 /*+replace reverse */
+#include "../../conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h"
-#include "../../conf/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_config_variant.h"
 #include "../../conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h"
@@ -37,18 +39,18 @@
 #include "../../conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_config_variant.h"
-#include "../../conf/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h"
 /*-replace*/
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h
index 7592194dda5..e5b157c6bee 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h
@@ -27,9 +27,11 @@
 #define GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 /*+replace reverse */
+#include "../../defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h"
-#include "../../defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_def.h"
 #include "../../defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h"
@@ -37,18 +39,18 @@
 #include "../../defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h"
 /*-replace*/
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h
index 98eced708e0..7dc89f996bd 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h
@@ -43,15 +43,17 @@
 #include "../../entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h"
 #include "../../entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h"
 #include "../../entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_entry.h"
 #include "../../entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_entry.h"
 #include "../../entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_entry.h"
-#include "../../entry/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h"
 /*-replace*/
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h
index 0be4c327776..13480e7384d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_MAX 24
+#define BCMLTD_VARIANT_MAX 26
 
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_config_variant.h
deleted file mode 100644
index c683383ecee..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_config_variant.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_CONFIG_VARIANT_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0
-#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0 == 1
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE
-#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE 1
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0=1, BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE=0.
-#endif
-#endif
-#else
-#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0 0
-#endif
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h
new file mode 100644
index 00000000000..4280d6a0da2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56690_A0_DNA_6_5_32_5_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56690_A0_DNA_6_5_32_5_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_32_5_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_32_5_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_32_5_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_32_5_0=1, BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_32_5_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56690_A0_DNA_6_5_32_5_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_config_variant.h
deleted file mode 100644
index 7a296324c3e..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_config_variant.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0 == 1
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
-#endif
-#endif
-#else
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0 0
-#endif
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_config_variant.h
new file mode 100644
index 00000000000..24af997af39
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_config_variant.h
deleted file mode 100644
index 24eaa4a6926..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_config_variant.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0 == 1
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
-#endif
-#endif
-#else
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0 0
-#endif
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_config_variant.h
new file mode 100644
index 00000000000..15e388cd266
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_config_variant.h
deleted file mode 100644
index 3a9bdb8cd5d..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_config_variant.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0 == 1
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
-#endif
-#endif
-#else
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0 0
-#endif
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_config_variant.h
new file mode 100644
index 00000000000..8e40f4074ff
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_config_variant.h
deleted file mode 100644
index 485fb9fac68..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_config_variant.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_CONFIG_VARIANT_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1 == 1
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
-#endif
-#endif
-#else
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1 0
-#endif
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_config_variant.h
new file mode 100644
index 00000000000..2eab97d7713
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_config_variant.h
deleted file mode 100644
index 74e6cbc17a4..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_config_variant.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0
-#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0 == 1
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE
-#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0.
-#endif
-#endif
-#else
-#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0 0
-#endif
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_config_variant.h
new file mode 100644
index 00000000000..b1891654fc7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_config_variant.h
deleted file mode 100644
index b4681302bc6..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_config_variant.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_CONFIG_VARIANT_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0
-#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0 == 1
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE
-#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0.
-#endif
-#endif
-#else
-#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0 0
-#endif
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_config_variant.h
new file mode 100644
index 00000000000..580e11e8644
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_config_variant.h
new file mode 100644
index 00000000000..94b08cde07d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0
+#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_config_variant.h
deleted file mode 100644
index 35271bf4f8a..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_config_variant.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_CONFIG_VARIANT_H
-#define GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_CONFIG_VARIANT_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0
-#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0 == 1
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE
-#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE 1
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0=1, BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE=0.
-#endif
-#endif
-#else
-#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0 0
-#endif
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h
new file mode 100644
index 00000000000..014b425071f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_DNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM78800_A0_DNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_32_3_0
+#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_32_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_32_3_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_32_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_32_3_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78800_A0_DNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h
new file mode 100644
index 00000000000..fbc6d433d38
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78907_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM78907_A0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM78907_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM78907_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM78907_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM78907_A0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM78907_A0_BASE 15
+#define BCMLTD_VARIANT_LOCAL_BCM78907_A0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78907_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_def.h
deleted file mode 100644
index 6fb7c867c37..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_31_7_0 15
-#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_31_7_0 1
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h
new file mode 100644
index 00000000000..092c5f2154e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56690_A0_DNA_6_5_32_5_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56690_A0_DNA_6_5_32_5_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_32_5_0 16
+#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_32_5_0 1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56690_A0_DNA_6_5_32_5_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_def.h
deleted file mode 100644
index d707be6af2b..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_31_3_0 16
-#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_31_3_0 1
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_def.h
new file mode 100644
index 00000000000..4aca2448242
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_32_3_0 17
+#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_32_3_0 1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h
index 163fec8a8bf..5d113cd8512 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_31_7_0 17
+#define BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_31_7_0 18
 #define BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_6_5_31_7_0 2
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_def.h
deleted file mode 100644
index 838935637d4..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_31_3_0 18
-#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_31_3_0 3
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_def.h
new file mode 100644
index 00000000000..4ecac153e17
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_32_2_0 19
+#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_32_2_0 3
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h
index 4873018ebe7..66b0bed89e9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_31_6_0 19
+#define BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_31_6_0 20
 #define BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_6_5_31_6_0 1
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_def.h
deleted file mode 100644
index bde6d690d8a..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_31_3_0 20
-#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_31_3_0 2
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_def.h
new file mode 100644
index 00000000000..85057a5a319
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_32_2_0 21
+#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_32_2_0 2
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_def.h
deleted file mode 100644
index 0795df27263..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_31_3_1 21
-#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_31_3_1 3
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_def.h
new file mode 100644
index 00000000000..731e165c331
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_32_1_0 22
+#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_32_1_0 3
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_def.h
deleted file mode 100644
index 648b0bb7be9..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_31_3_0 22
-#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_31_3_0 1
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_def.h
new file mode 100644
index 00000000000..4b5505a6a8f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_32_3_0 23
+#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_32_3_0 1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_def.h
deleted file mode 100644
index fef26892e23..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_31_6_0 23
-#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_31_6_0 2
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_def.h
new file mode 100644
index 00000000000..9ee9f13502a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_32_4_0 24
+#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_32_4_0 2
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_def.h
new file mode 100644
index 00000000000..93572c80ea0
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H
+#define GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM78800_A0_CNA_6_5_32_3_0 25
+#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_CNA_6_5_32_3_0 1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_def.h
deleted file mode 100644
index 9aa5fa6be63..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_DEF_H
-#define GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_31_5_0 24
-#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_31_5_0 1
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h
new file mode 100644
index 00000000000..3518d18d113
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_DNA_6_5_32_3_0_LTD_VARIANT_DEF_H
+#define GEN_BCM78800_A0_DNA_6_5_32_3_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_32_3_0 26
+#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_32_3_0 2
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78800_A0_DNA_6_5_32_3_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h
new file mode 100644
index 00000000000..98d49494a1e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78907_A0_LTD_VARIANT_DEF_H
+#define GEN_BCM78907_A0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM78907_A0_BASE 15
+#define BCMLTD_VARIANT_LOCAL_BCM78907_A0_BASE 0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78907_A0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_entry.h
deleted file mode 100644
index a0df0dec630..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_ltd_variant_def.h>
-#endif /* GEN_BCM56690_A0_DNA_6_5_31_7_0_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_31_7_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56690_a0,BCM56690_A0,dna_6_5_31_7_0,DNA_6_5_31_7_0,_,BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_31_7_0,BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_31_7_0,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h
new file mode 100644
index 00000000000..494c23e895c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56690_A0_DNA_6_5_32_5_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56690_A0_DNA_6_5_32_5_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h>
+#endif /* GEN_BCM56690_A0_DNA_6_5_32_5_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_32_5_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56690_a0,BCM56690_A0,dna_6_5_32_5_0,DNA_6_5_32_5_0,_,BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_32_5_0,BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_32_5_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_entry.h
deleted file mode 100644
index fe5104f682e..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_ltd_variant_def.h>
-#endif /* GEN_BCM56780_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_31_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_6_5_31_3_0,CNA_6_5_31_3_0,_,BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_31_3_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_31_3_0,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_entry.h
new file mode 100644
index 00000000000..a90516ffde1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_def.h>
+#endif /* GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_6_5_32_3_0,CNA_6_5_32_3_0,_,BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_32_3_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_32_3_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_entry.h
deleted file mode 100644
index 5d05e665042..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_ltd_variant_def.h>
-#endif /* GEN_BCM56780_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_31_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_6_5_31_3_0,HNA_6_5_31_3_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_31_3_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_31_3_0,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_entry.h
new file mode 100644
index 00000000000..411f25c588c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_def.h>
+#endif /* GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_6_5_32_2_0,HNA_6_5_32_2_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_32_2_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_32_2_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_entry.h
deleted file mode 100644
index 84fca45e908..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_ltd_variant_def.h>
-#endif /* GEN_BCM56880_A0_HNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_31_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_6_5_31_3_0,HNA_6_5_31_3_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_31_3_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_31_3_0,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_entry.h
new file mode 100644
index 00000000000..9dc25470c03
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_def.h>
+#endif /* GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_6_5_32_2_0,HNA_6_5_32_2_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_32_2_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_32_2_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_entry.h
deleted file mode 100644
index c99f56d3960..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_ltd_variant_def.h>
-#endif /* GEN_BCM56880_A0_NFA_6_5_31_3_1_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_31_3_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,nfa_6_5_31_3_1,NFA_6_5_31_3_1,_,BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_31_3_1,BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_31_3_1,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_entry.h
new file mode 100644
index 00000000000..acabbaf5a55
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_def.h>
+#endif /* GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,nfa_6_5_32_1_0,NFA_6_5_32_1_0,_,BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_32_1_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_32_1_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_entry.h
deleted file mode 100644
index b0af4c032f9..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_ltd_variant_def.h>
-#endif /* GEN_BCM56890_A0_CNA_6_5_31_3_0_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_31_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,cna_6_5_31_3_0,CNA_6_5_31_3_0,_,BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_31_3_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_31_3_0,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_entry.h
new file mode 100644
index 00000000000..61a0c9af8e9
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_def.h>
+#endif /* GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,cna_6_5_32_3_0,CNA_6_5_32_3_0,_,BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_32_3_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_32_3_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_entry.h
deleted file mode 100644
index ae3385c9c03..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_ltd_variant_def.h>
-#endif /* GEN_BCM56890_A0_DNA_6_5_31_6_0_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_31_6_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_6_5_31_6_0,DNA_6_5_31_6_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_31_6_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_31_6_0,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_entry.h
new file mode 100644
index 00000000000..6e2bac0eaf3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_def.h>
+#endif /* GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_6_5_32_4_0,DNA_6_5_32_4_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_32_4_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_32_4_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_entry.h
new file mode 100644
index 00000000000..ce4ce5ec99f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_def.h>
+#endif /* GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm78800_a0,BCM78800_A0,cna_6_5_32_3_0,CNA_6_5_32_3_0,_,BCMLTD_VARIANT_BCM78800_A0_CNA_6_5_32_3_0,BCMLTD_VARIANT_LOCAL_BCM78800_A0_CNA_6_5_32_3_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_entry.h
deleted file mode 100644
index 7421d022d0f..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_ltd_variant_def.h>
-#endif /* GEN_BCM78800_A0_DNA_6_5_31_5_0_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_31_5_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm78800_a0,BCM78800_A0,dna_6_5_31_5_0,DNA_6_5_31_5_0,_,BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_31_5_0,BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_31_5_0,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h
new file mode 100644
index 00000000000..68776fbb52a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_DNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM78800_A0_DNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h>
+#endif /* GEN_BCM78800_A0_DNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_32_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm78800_a0,BCM78800_A0,dna_6_5_32_3_0,DNA_6_5_32_3_0,_,BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_32_3_0,BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_32_3_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h
new file mode 100644
index 00000000000..bf9b4969402
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78907_A0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM78907_A0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h>
+#endif /* GEN_BCM78907_A0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM78907_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm78907_a0,BCM78907_A0,,BASE,,BCMLTD_VARIANT_BCM78907_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM78907_A0_BASE,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c
index 296dbdedd67..74e2543c89c 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c
@@ -235,22 +235,6 @@ const bcmpkt_lbhdr_fget_t bcm56080_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -297,22 +281,6 @@ const bcmpkt_lbhdr_fset_t bcm56080_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -332,7 +300,6 @@ static shr_enum_map_t bcm56080_a0_lbhdr_view_types[] = {
 static int bcm56080_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, -2,
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.c
new file mode 100644
index 00000000000..8d3fd4beaaa
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.c
@@ -0,0 +1,3550 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM56080_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_0_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 0;
+    return info;
+}
+
+static void
+field_fmt_0_0_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_0_0_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_11_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 11;
+    return info;
+}
+
+static void
+field_fmt_0_11_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffff000) | (*val & 0xfff);
+}
+
+static void
+field_fmt_0_11_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_12_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 12;
+    return info;
+}
+
+static void
+field_fmt_0_12_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffe000) | (*val & 0x1fff);
+}
+
+static void
+field_fmt_0_12_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_6_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 6;
+    return info;
+}
+
+static void
+field_fmt_0_6_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff80) | (*val & 0x7f);
+}
+
+static void
+field_fmt_0_6_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_0_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffc00) | (*val & 0x3ff);
+}
+
+static void
+field_fmt_0_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x3ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_100_102_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 100;
+    info.maxbit = 102;
+    return info;
+}
+
+static void
+field_fmt_100_102_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffff8f) | ((*val & 0x7) << 4);
+}
+
+static void
+field_fmt_100_102_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 4) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_100_105_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 100;
+    info.maxbit = 105;
+    return info;
+}
+
+static void
+field_fmt_100_105_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffc0f) | ((*val & 0x3f) << 4);
+}
+
+static void
+field_fmt_100_105_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 4) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_106_107_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 106;
+    info.maxbit = 107;
+    return info;
+}
+
+static void
+field_fmt_106_107_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffff3ff) | ((*val & 0x3) << 10);
+}
+
+static void
+field_fmt_106_107_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 10) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_108_109_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 108;
+    info.maxbit = 109;
+    return info;
+}
+
+static void
+field_fmt_108_109_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffcfff) | ((*val & 0x3) << 12);
+}
+
+static void
+field_fmt_108_109_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 12) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_25_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 25;
+    return info;
+}
+
+static void
+field_fmt_10_25_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfc0003ff) | ((*val & 0xffff) << 10);
+}
+
+static void
+field_fmt_10_25_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_110_110_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 110;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_110_110_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_110_110_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_110_121_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 110;
+    info.maxbit = 121;
+    return info;
+}
+
+static void
+field_fmt_110_121_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfc003fff) | ((*val & 0xfff) << 14);
+}
+
+static void
+field_fmt_110_121_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 14) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_111_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 111;
+    return info;
+}
+
+static void
+field_fmt_111_111_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_111_111_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_116_119_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 116;
+    info.maxbit = 119;
+    return info;
+}
+
+static void
+field_fmt_116_119_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xff0fffff) | ((*val & 0xf) << 20);
+}
+
+static void
+field_fmt_116_119_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 20) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_120_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_120_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_122_123_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 122;
+    info.maxbit = 123;
+    return info;
+}
+
+static void
+field_fmt_122_123_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xf3ffffff) | ((*val & 0x3) << 26);
+}
+
+static void
+field_fmt_122_123_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 26) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_124_124_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 124;
+    info.maxbit = 124;
+    return info;
+}
+
+static void
+field_fmt_124_124_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_124_124_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_125_125_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 125;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_125_125_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_125_125_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_126_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 126;
+    return info;
+}
+
+static void
+field_fmt_126_126_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_126_126_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_127_127_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 127;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_127_127_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_127_127_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_128_135_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 128;
+    info.maxbit = 135;
+    return info;
+}
+
+static void
+field_fmt_128_135_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_128_135_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[8] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_13_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 13;
+    return info;
+}
+
+static void
+field_fmt_12_13_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffcfff) | ((*val & 0x3) << 12);
+}
+
+static void
+field_fmt_12_13_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_15_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 15;
+    return info;
+}
+
+static void
+field_fmt_12_15_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffff0fff) | ((*val & 0xf) << 12);
+}
+
+static void
+field_fmt_12_15_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_136_138_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 136;
+    info.maxbit = 138;
+    return info;
+}
+
+static void
+field_fmt_136_138_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffff8ff) | ((*val & 0x7) << 8);
+}
+
+static void
+field_fmt_136_138_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 8) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_139_139_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 139;
+    info.maxbit = 139;
+    return info;
+}
+
+static void
+field_fmt_139_139_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_139_139_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_140_142_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 140;
+    info.maxbit = 142;
+    return info;
+}
+
+static void
+field_fmt_140_142_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffff8fff) | ((*val & 0x7) << 12);
+}
+
+static void
+field_fmt_140_142_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 12) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_143_154_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 143;
+    info.maxbit = 154;
+    return info;
+}
+
+static void
+field_fmt_143_154_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xf8007fff) | ((*val & 0xfff) << 15);
+}
+
+static void
+field_fmt_143_154_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 15) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_14_21_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 14;
+    info.maxbit = 21;
+    return info;
+}
+
+static void
+field_fmt_14_21_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffc03fff) | ((*val & 0xff) << 14);
+}
+
+static void
+field_fmt_14_21_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 14) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_155_156_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 155;
+    info.maxbit = 156;
+    return info;
+}
+
+static void
+field_fmt_155_156_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xe7ffffff) | ((*val & 0x3) << 27);
+}
+
+static void
+field_fmt_155_156_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 27) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_157_157_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 157;
+    info.maxbit = 157;
+    return info;
+}
+
+static void
+field_fmt_157_157_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_157_157_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_158_158_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 158;
+    info.maxbit = 158;
+    return info;
+}
+
+static void
+field_fmt_158_158_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_158_158_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_159_159_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 159;
+    info.maxbit = 159;
+    return info;
+}
+
+static void
+field_fmt_159_159_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_159_159_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_15_30_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 15;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_15_30_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x80007fff) | ((*val & 0xffff) << 15);
+}
+
+static void
+field_fmt_15_30_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 15) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_160_173_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 160;
+    info.maxbit = 173;
+    return info;
+}
+
+static void
+field_fmt_160_173_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffc000) | (*val & 0x3fff);
+}
+
+static void
+field_fmt_160_173_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[7] & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_16_16_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 16;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_16_16_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_16_16_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_174_185_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 174;
+    info.maxbit = 185;
+    return info;
+}
+
+static void
+field_fmt_174_185_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xfc003fff) | ((*val & 0xfff) << 14);
+}
+
+static void
+field_fmt_174_185_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 14) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_186_190_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 186;
+    info.maxbit = 190;
+    return info;
+}
+
+static void
+field_fmt_186_190_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x83ffffff) | ((*val & 0x1f) << 26);
+}
+
+static void
+field_fmt_186_190_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 26) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_191_191_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 191;
+    info.maxbit = 191;
+    return info;
+}
+
+static void
+field_fmt_191_191_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_191_191_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_192_211_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 192;
+    info.maxbit = 211;
+    return info;
+}
+
+static void
+field_fmt_192_211_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xfff00000) | (*val & 0xfffff);
+}
+
+static void
+field_fmt_192_211_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[6] & 0xfffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_1_2_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 1;
+    info.maxbit = 2;
+    return info;
+}
+
+static void
+field_fmt_1_2_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_1_2_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_1_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 1;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_1_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe01) | ((*val & 0xff) << 1);
+}
+
+static void
+field_fmt_1_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 1) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_212_220_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 212;
+    info.maxbit = 220;
+    return info;
+}
+
+static void
+field_fmt_212_220_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xe00fffff) | ((*val & 0x1ff) << 20);
+}
+
+static void
+field_fmt_212_220_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 20) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_221_221_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 221;
+    info.maxbit = 221;
+    return info;
+}
+
+static void
+field_fmt_221_221_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_221_221_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_222_223_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 222;
+    info.maxbit = 223;
+    return info;
+}
+
+static void
+field_fmt_222_223_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_222_223_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_224_255_5_5_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 224;
+    info.maxbit = 255;
+    return info;
+}
+
+static void
+field_fmt_224_255_5_5_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[5] = *val;
+}
+
+static void
+field_fmt_224_255_5_5_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[5];
+}
+
+static bcmpkt_field_info_t
+field_fmt_22_27_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 22;
+    info.maxbit = 27;
+    return info;
+}
+
+static void
+field_fmt_22_27_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xf03fffff) | ((*val & 0x3f) << 22);
+}
+
+static void
+field_fmt_22_27_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 22) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_256_261_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 256;
+    info.maxbit = 261;
+    return info;
+}
+
+static void
+field_fmt_256_261_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffffffc0) | (*val & 0x3f);
+}
+
+static void
+field_fmt_256_261_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[4] & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_256_287_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 256;
+    info.maxbit = 287;
+    return info;
+}
+
+static void
+field_fmt_256_287_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = *val;
+}
+
+static void
+field_fmt_256_287_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[4];
+}
+
+static bcmpkt_field_info_t
+field_fmt_25_28_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 25;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_25_28_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_25_28_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_26_29_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 26;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_26_29_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xc3ffffff) | ((*val & 0xf) << 26);
+}
+
+static void
+field_fmt_26_29_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 26) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_288_415_3_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 288;
+    info.maxbit = 415;
+    return info;
+}
+
+static void
+field_fmt_288_415_3_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = val[0];
+    pmd[2] = val[1];
+    pmd[1] = val[2];
+    pmd[0] = val[3];
+}
+
+static void
+field_fmt_288_415_3_0_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[3];
+    val[1] = pmd[2];
+    val[2] = pmd[1];
+    val[3] = pmd[0];
+}
+
+static bcmpkt_field_info_t
+field_fmt_28_28_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 28;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_28_28_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_28_28_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_30_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_30_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_34_3_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_31_34_3_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+    pmd[2] = (pmd[2] & 0xfffffff8) | ((*val >> 1) & 0x7);
+}
+
+static void
+field_fmt_31_34_3_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[3] >> 31) | (pmd[2] << 1)) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[11] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_35_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_32_35_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_32_35_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_95_11_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_32_95_11_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = val[0];
+    pmd[10] = val[1];
+}
+
+static void
+field_fmt_32_95_11_10_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[11];
+    val[1] = pmd[10];
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_33_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 33;
+    return info;
+}
+
+static void
+field_fmt_33_33_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_33_33_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_40_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_33_40_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffe01) | ((*val & 0xff) << 1);
+}
+
+static void
+field_fmt_33_40_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 1) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_34_34_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 34;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_34_34_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_34_34_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_36_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_36_36_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_36_36_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_37_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_36_37_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffffcf) | ((*val & 0x3) << 4);
+}
+
+static void
+field_fmt_36_37_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 4) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_39_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_36_39_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff0f) | ((*val & 0xf) << 4);
+}
+
+static void
+field_fmt_36_39_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 4) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_38_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_38_38_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_38_38_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_41_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_38_41_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffc3f) | ((*val & 0xf) << 6);
+}
+
+static void
+field_fmt_38_41_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 6) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_39_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_39_39_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_39_39_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_3_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 3;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_3_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe07) | ((*val & 0x3f) << 3);
+}
+
+static void
+field_fmt_3_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 3) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_40_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_40_40_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_40_40_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_41_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_40_41_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffcff) | ((*val & 0x3) << 8);
+}
+
+static void
+field_fmt_40_41_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 8) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_41_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_41_41_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_41_41_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_44_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_41_44_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffe1ff) | ((*val & 0xf) << 9);
+}
+
+static void
+field_fmt_41_44_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 9) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_42_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_42_42_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_42_42_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_42_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_42_42_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_42_42_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_50_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_42_50_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff803ff) | ((*val & 0x1ff) << 10);
+}
+
+static void
+field_fmt_42_50_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 10) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_43_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_43_43_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_43_43_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_43_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffc7ff) | ((*val & 0x7) << 11);
+}
+
+static void
+field_fmt_43_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 11) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_48_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 48;
+    return info;
+}
+
+static void
+field_fmt_45_48_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffe1fff) | ((*val & 0xf) << 13);
+}
+
+static void
+field_fmt_45_48_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_48_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 48;
+    return info;
+}
+
+static void
+field_fmt_48_48_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_48_48_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_49_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 49;
+    return info;
+}
+
+static void
+field_fmt_48_49_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_48_49_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_49_49_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 49;
+    info.maxbit = 49;
+    return info;
+}
+
+static void
+field_fmt_49_49_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_49_49_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_50_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_50_50_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_50_50_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_50_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff3ffff) | ((*val & 0x3) << 18);
+}
+
+static void
+field_fmt_50_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 18) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_50_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff03ffff) | ((*val & 0x3f) << 18);
+}
+
+static void
+field_fmt_50_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 18) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_51_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_51_51_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_51_51_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_56_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 56;
+    return info;
+}
+
+static void
+field_fmt_51_56_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfe07ffff) | ((*val & 0x3f) << 19);
+}
+
+static void
+field_fmt_51_56_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 19) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_52_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_52_52_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_52_52_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_52_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffcfffff) | ((*val & 0x3) << 20);
+}
+
+static void
+field_fmt_52_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_53_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_53_53_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_53_53_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_54_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_54_54_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_54_54_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_54_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_54_54_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_54_54_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_55_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_55_55_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_55_55_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_62_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 62;
+    return info;
+}
+
+static void
+field_fmt_55_62_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x807fffff) | ((*val & 0xff) << 23);
+}
+
+static void
+field_fmt_55_62_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 23) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_56_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 56;
+    return info;
+}
+
+static void
+field_fmt_56_56_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_56_56_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_58_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 58;
+    return info;
+}
+
+static void
+field_fmt_56_58_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf8ffffff) | ((*val & 0x7) << 24);
+}
+
+static void
+field_fmt_56_58_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 24) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_57_57_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 57;
+    info.maxbit = 57;
+    return info;
+}
+
+static void
+field_fmt_57_57_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfdffffff) | ((*val & 0x1) << 25);
+}
+
+static void
+field_fmt_57_57_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 25) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_57_70_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 57;
+    info.maxbit = 70;
+    return info;
+}
+
+static void
+field_fmt_57_70_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x1ffffff) | (*val << 25);
+    pmd[1] = (pmd[1] & 0xffffff80) | ((*val >> 7) & 0x7f);
+}
+
+static void
+field_fmt_57_70_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 25) | (pmd[1] << 7)) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_59_59_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 59;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_59_59_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf7ffffff) | ((*val & 0x1) << 27);
+}
+
+static void
+field_fmt_59_59_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 27) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_60_60_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 60;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_60_60_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_60_60_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_61_61_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 61;
+    info.maxbit = 61;
+    return info;
+}
+
+static void
+field_fmt_61_61_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_61_61_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_62_62_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 62;
+    info.maxbit = 62;
+    return info;
+}
+
+static void
+field_fmt_62_62_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_62_62_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_62_67_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 62;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_62_67_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x3fffffff) | (*val << 30);
+    pmd[1] = (pmd[1] & 0xfffffff0) | ((*val >> 2) & 0xf);
+}
+
+static void
+field_fmt_62_67_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 30) | (pmd[1] << 2)) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_63_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_63_63_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_63_63_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_63_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_63_63_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_63_63_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_64_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 64;
+    return info;
+}
+
+static void
+field_fmt_64_64_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_64_64_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[10] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_64_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 64;
+    return info;
+}
+
+static void
+field_fmt_64_64_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_64_64_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[1] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_65_65_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 65;
+    info.maxbit = 65;
+    return info;
+}
+
+static void
+field_fmt_65_65_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_65_65_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_65_65_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 65;
+    info.maxbit = 65;
+    return info;
+}
+
+static void
+field_fmt_65_65_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_65_65_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_66_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 66;
+    return info;
+}
+
+static void
+field_fmt_66_66_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_66_66_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_66_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 66;
+    return info;
+}
+
+static void
+field_fmt_66_66_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_66_66_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_67_67_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 67;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_67_67_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_67_67_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_69_69_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 69;
+    info.maxbit = 69;
+    return info;
+}
+
+static void
+field_fmt_69_69_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_69_69_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_69_69_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 69;
+    info.maxbit = 69;
+    return info;
+}
+
+static void
+field_fmt_69_69_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_69_69_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_70_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 70;
+    return info;
+}
+
+static void
+field_fmt_70_70_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_70_70_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_71_71_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 71;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_71_71_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_71_71_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_71_74_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 71;
+    info.maxbit = 74;
+    return info;
+}
+
+static void
+field_fmt_71_74_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffff87f) | ((*val & 0xf) << 7);
+}
+
+static void
+field_fmt_71_74_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 7) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_72_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 72;
+    return info;
+}
+
+static void
+field_fmt_72_72_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_72_72_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_73_73_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 73;
+    info.maxbit = 73;
+    return info;
+}
+
+static void
+field_fmt_73_73_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_73_73_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_74_74_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 74;
+    info.maxbit = 74;
+    return info;
+}
+
+static void
+field_fmt_74_74_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_74_74_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_75_75_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 75;
+    info.maxbit = 75;
+    return info;
+}
+
+static void
+field_fmt_75_75_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_75_75_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_75_77_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 75;
+    info.maxbit = 77;
+    return info;
+}
+
+static void
+field_fmt_75_77_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffc7ff) | ((*val & 0x7) << 11);
+}
+
+static void
+field_fmt_75_77_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 11) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_76_77_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 76;
+    info.maxbit = 77;
+    return info;
+}
+
+static void
+field_fmt_76_77_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffcfff) | ((*val & 0x3) << 12);
+}
+
+static void
+field_fmt_76_77_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 12) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_78_78_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 78;
+    info.maxbit = 78;
+    return info;
+}
+
+static void
+field_fmt_78_78_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_78_78_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_78_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 78;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_78_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff3fff) | ((*val & 0x3) << 14);
+}
+
+static void
+field_fmt_78_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 14) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_79_79_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 79;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_79_79_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_79_79_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_88_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 88;
+    return info;
+}
+
+static void
+field_fmt_81_88_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfe01ffff) | ((*val & 0xff) << 17);
+}
+
+static void
+field_fmt_81_88_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_89_89_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 89;
+    info.maxbit = 89;
+    return info;
+}
+
+static void
+field_fmt_89_89_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfdffffff) | ((*val & 0x1) << 25);
+}
+
+static void
+field_fmt_89_89_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 25) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_90_90_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 90;
+    info.maxbit = 90;
+    return info;
+}
+
+static void
+field_fmt_90_90_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfbffffff) | ((*val & 0x1) << 26);
+}
+
+static void
+field_fmt_90_90_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 26) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_90_92_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 90;
+    info.maxbit = 92;
+    return info;
+}
+
+static void
+field_fmt_90_92_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xe3ffffff) | ((*val & 0x7) << 26);
+}
+
+static void
+field_fmt_90_92_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 26) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_93_93_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 93;
+    info.maxbit = 93;
+    return info;
+}
+
+static void
+field_fmt_93_93_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_93_93_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_94_109_1_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 94;
+    info.maxbit = 109;
+    return info;
+}
+
+static void
+field_fmt_94_109_1_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x3fffffff) | (*val << 30);
+    pmd[0] = (pmd[0] & 0xffffc000) | ((*val >> 2) & 0x3fff);
+}
+
+static void
+field_fmt_94_109_1_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[1] >> 30) | (pmd[0] << 2)) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_96_99_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 96;
+    info.maxbit = 99;
+    return info;
+}
+
+static void
+field_fmt_96_99_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_96_99_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[9] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_14_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 14;
+    return info;
+}
+
+static void
+field_fmt_9_14_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffff81ff) | ((*val & 0x3f) << 9);
+}
+
+static void
+field_fmt_9_14_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_24_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 24;
+    return info;
+}
+
+static void
+field_fmt_9_24_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfe0001ff) | ((*val & 0xffff) << 9);
+}
+
+static void
+field_fmt_9_24_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0xffff;
+}
+
+static const shr_enum_map_t bcm56080_a0_rxpmd_timestamp_type_names[] =
+{
+    BCM56080_A0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56080_a0_rxpmd_fields[BCM56080_A0_RXPMD_COUNT] = {
+    {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0},
+    {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0},
+    {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0},
+    {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0},
+    {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0},
+    {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0},
+    {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0},
+    {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0},
+    {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0},
+    {1, field_fmt_100_105_9_9_info, field_fmt_100_105_9_9_set, field_fmt_100_105_9_9_get, NULL, 0},
+    {1, field_fmt_100_102_9_9_info, field_fmt_100_102_9_9_set, field_fmt_100_102_9_9_get, NULL, 0},
+    {1, field_fmt_106_107_9_9_info, field_fmt_106_107_9_9_set, field_fmt_106_107_9_9_get, NULL, 0},
+    {1, field_fmt_108_109_9_9_info, field_fmt_108_109_9_9_set, field_fmt_108_109_9_9_get, NULL, 0},
+    {1, field_fmt_110_121_9_9_info, field_fmt_110_121_9_9_set, field_fmt_110_121_9_9_get, NULL, 0},
+    {1, field_fmt_122_123_9_9_info, field_fmt_122_123_9_9_set, field_fmt_122_123_9_9_get, NULL, 0},
+    {1, field_fmt_124_124_9_9_info, field_fmt_124_124_9_9_set, field_fmt_124_124_9_9_get, NULL, 0},
+    {1, field_fmt_125_125_9_9_info, field_fmt_125_125_9_9_set, field_fmt_125_125_9_9_get, NULL, 0},
+    {1, field_fmt_126_126_9_9_info, field_fmt_126_126_9_9_set, field_fmt_126_126_9_9_get, NULL, 0},
+    {1, field_fmt_127_127_9_9_info, field_fmt_127_127_9_9_set, field_fmt_127_127_9_9_get, NULL, 0},
+    {1, field_fmt_128_135_8_8_info, field_fmt_128_135_8_8_set, field_fmt_128_135_8_8_get, NULL, 0},
+    {1, field_fmt_136_138_8_8_info, field_fmt_136_138_8_8_set, field_fmt_136_138_8_8_get, NULL, 0},
+    {1, field_fmt_139_139_8_8_info, field_fmt_139_139_8_8_set, field_fmt_139_139_8_8_get, NULL, 0},
+    {1, field_fmt_140_142_8_8_info, field_fmt_140_142_8_8_set, field_fmt_140_142_8_8_get, NULL, 0},
+    {1, field_fmt_143_154_8_8_info, field_fmt_143_154_8_8_set, field_fmt_143_154_8_8_get, NULL, 0},
+    {1, field_fmt_155_156_8_8_info, field_fmt_155_156_8_8_set, field_fmt_155_156_8_8_get, NULL, 0},
+    {1, field_fmt_157_157_8_8_info, field_fmt_157_157_8_8_set, field_fmt_157_157_8_8_get, NULL, 0},
+    {1, field_fmt_158_158_8_8_info, field_fmt_158_158_8_8_set, field_fmt_158_158_8_8_get, NULL, 0},
+    {1, field_fmt_159_159_8_8_info, field_fmt_159_159_8_8_set, field_fmt_159_159_8_8_get, NULL, 0},
+    {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0},
+    {1, field_fmt_174_185_7_7_info, field_fmt_174_185_7_7_set, field_fmt_174_185_7_7_get, NULL, 0},
+    {1, field_fmt_186_190_7_7_info, field_fmt_186_190_7_7_set, field_fmt_186_190_7_7_get, NULL, 0},
+    {1, field_fmt_191_191_7_7_info, field_fmt_191_191_7_7_set, field_fmt_191_191_7_7_get, NULL, 0},
+    {1, field_fmt_192_211_6_6_info, field_fmt_192_211_6_6_set, field_fmt_192_211_6_6_get, NULL, 0},
+    {1, field_fmt_212_220_6_6_info, field_fmt_212_220_6_6_set, field_fmt_212_220_6_6_get, NULL, 0},
+    {1, field_fmt_221_221_6_6_info, field_fmt_221_221_6_6_set, field_fmt_221_221_6_6_get, NULL, 0},
+    {1, field_fmt_222_223_6_6_info, field_fmt_222_223_6_6_set, field_fmt_222_223_6_6_get, bcm56080_a0_rxpmd_timestamp_type_names, 0},
+    {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0},
+    {1, field_fmt_256_287_4_4_info, field_fmt_256_287_4_4_set, field_fmt_256_287_4_4_get, NULL, 0},
+    {1, field_fmt_256_261_4_4_info, field_fmt_256_261_4_4_set, field_fmt_256_261_4_4_get, NULL, 0},
+    {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56080_a0_rxpmd_names[] =
+{
+    BCM56080_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56080_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56080_a0_rxpmd_info = {13, BCM56080_A0_RXPMD_COUNT, bcm56080_a0_rxpmd_names, bcm56080_a0_rxpmd_fields};
+    return bcm56080_a0_rxpmd_info;
+}
+
+static const shr_enum_map_t bcm56080_a0_rx_reason_cpu_sflow_names[] =
+{
+    BCM56080_A0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56080_a0_rx_reason_mpls_proc_error_names[] =
+{
+    BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56080_a0_rx_reason_oam_processing_names[] =
+{
+    BCM56080_A0_RX_REASON_OAM_PROCESSING_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56080_a0_rx_reason_fields[BCM56080_A0_RX_REASON_COUNT] = {
+    {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0},
+    {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0},
+    {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0},
+    {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0},
+    {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0},
+    {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0},
+    {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0},
+    {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0},
+    {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0},
+    {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0},
+    {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0},
+    {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0},
+    {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0},
+    {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0},
+    {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0},
+    {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0},
+    {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56080_a0_rx_reason_cpu_sflow_names, 0},
+    {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0},
+    {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0},
+    {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0},
+    {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0},
+    {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0},
+    {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0},
+    {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56080_a0_rx_reason_mpls_proc_error_names, 0},
+    {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0},
+    {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0},
+    {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0},
+    {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0},
+    {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0},
+    {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0},
+    {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0},
+    {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0},
+    {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0},
+    {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0},
+    {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0},
+    {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0},
+    {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0},
+    {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0},
+    {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0},
+    {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0},
+    {1, field_fmt_75_77_10_10_info, field_fmt_75_77_10_10_set, field_fmt_75_77_10_10_get, bcm56080_a0_rx_reason_oam_processing_names, 0},
+    {1, field_fmt_78_78_10_10_info, field_fmt_78_78_10_10_set, field_fmt_78_78_10_10_get, NULL, 0},
+    {1, field_fmt_79_79_10_10_info, field_fmt_79_79_10_10_set, field_fmt_79_79_10_10_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56080_a0_rx_reason_names[] =
+{
+    BCM56080_A0_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56080_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56080_a0_rx_reason_info = {13, BCM56080_A0_RX_REASON_COUNT, bcm56080_a0_rx_reason_names, bcm56080_a0_rx_reason_fields};
+    return bcm56080_a0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm56080_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56080_a0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56080_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm56080_a0_txpmd_cpu_tx_destination_type_names[] =
+{
+    BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56080_a0_txpmd_oam_downmep_tx_destination_type_names[] =
+{
+    BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56080_a0_txpmd_sobmh_from_cpu_destination_type_names[] =
+{
+    BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56080_a0_txpmd_header_type_names[] =
+{
+    BCM56080_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56080_a0_txpmd_start_names[] =
+{
+    BCM56080_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56080_a0_txpmd_fields[BCM56080_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_9_3_3_info, field_fmt_0_9_3_3_set, field_fmt_0_9_3_3_get, NULL, 2},
+    {1, field_fmt_0_6_3_3_info, field_fmt_0_6_3_3_set, field_fmt_0_6_3_3_get, NULL, 2},
+    {1, field_fmt_10_25_3_3_info, field_fmt_10_25_3_3_set, field_fmt_10_25_3_3_get, NULL, 2},
+    {1, field_fmt_26_29_3_3_info, field_fmt_26_29_3_3_set, field_fmt_26_29_3_3_get, bcm56080_a0_txpmd_cpu_tx_destination_type_names, 2},
+    {1, field_fmt_30_31_3_3_info, field_fmt_30_31_3_3_set, field_fmt_30_31_3_3_get, NULL, 2},
+    {1, field_fmt_32_35_2_2_info, field_fmt_32_35_2_2_set, field_fmt_32_35_2_2_get, NULL, 2},
+    {1, field_fmt_36_37_2_2_info, field_fmt_36_37_2_2_set, field_fmt_36_37_2_2_get, NULL, 2},
+    {1, field_fmt_38_41_2_2_info, field_fmt_38_41_2_2_set, field_fmt_38_41_2_2_get, NULL, 2},
+    {1, field_fmt_42_42_2_2_info, field_fmt_42_42_2_2_set, field_fmt_42_42_2_2_get, NULL, 2},
+    {1, field_fmt_43_45_2_2_info, field_fmt_43_45_2_2_set, field_fmt_43_45_2_2_get, NULL, 2},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 2},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 2},
+    {1, field_fmt_48_48_2_2_info, field_fmt_48_48_2_2_set, field_fmt_48_48_2_2_get, NULL, 2},
+    {1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2},
+    {1, field_fmt_50_55_2_2_info, field_fmt_50_55_2_2_set, field_fmt_50_55_2_2_get, NULL, 2},
+    {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 2},
+    {1, field_fmt_57_57_2_2_info, field_fmt_57_57_2_2_set, field_fmt_57_57_2_2_get, NULL, 2},
+    {1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 12},
+    {1, field_fmt_1_8_3_3_info, field_fmt_1_8_3_3_set, field_fmt_1_8_3_3_get, NULL, 12},
+    {1, field_fmt_9_14_3_3_info, field_fmt_9_14_3_3_set, field_fmt_9_14_3_3_get, NULL, 12},
+    {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 12},
+    {1, field_fmt_31_34_3_2_info, field_fmt_31_34_3_2_set, field_fmt_31_34_3_2_get, bcm56080_a0_txpmd_oam_downmep_tx_destination_type_names, 12},
+    {1, field_fmt_35_35_2_2_info, field_fmt_35_35_2_2_set, field_fmt_35_35_2_2_get, NULL, 12},
+    {1, field_fmt_36_39_2_2_info, field_fmt_36_39_2_2_set, field_fmt_36_39_2_2_get, NULL, 12},
+    {1, field_fmt_40_41_2_2_info, field_fmt_40_41_2_2_set, field_fmt_40_41_2_2_get, NULL, 12},
+    {1, field_fmt_42_50_2_2_info, field_fmt_42_50_2_2_set, field_fmt_42_50_2_2_get, NULL, 12},
+    {1, field_fmt_51_56_2_2_info, field_fmt_51_56_2_2_set, field_fmt_51_56_2_2_get, NULL, 12},
+    {1, field_fmt_57_70_2_1_info, field_fmt_57_70_2_1_set, field_fmt_57_70_2_1_get, NULL, 12},
+    {1, field_fmt_71_74_1_1_info, field_fmt_71_74_1_1_set, field_fmt_71_74_1_1_get, NULL, 12},
+    {1, field_fmt_75_75_1_1_info, field_fmt_75_75_1_1_set, field_fmt_75_75_1_1_get, NULL, 12},
+    {1, field_fmt_76_77_1_1_info, field_fmt_76_77_1_1_set, field_fmt_76_77_1_1_get, NULL, 12},
+    {1, field_fmt_78_79_1_1_info, field_fmt_78_79_1_1_set, field_fmt_78_79_1_1_get, NULL, 12},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 12},
+    {1, field_fmt_81_88_1_1_info, field_fmt_81_88_1_1_set, field_fmt_81_88_1_1_get, NULL, 12},
+    {1, field_fmt_89_89_1_1_info, field_fmt_89_89_1_1_set, field_fmt_89_89_1_1_get, NULL, 12},
+    {1, field_fmt_90_90_1_1_info, field_fmt_90_90_1_1_set, field_fmt_90_90_1_1_get, NULL, 12},
+    {1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1},
+    {1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1},
+    {1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1},
+    {1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1},
+    {1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm56080_a0_txpmd_sobmh_from_cpu_destination_type_names, 1},
+    {1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1},
+    {1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1},
+    {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1},
+    {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 1},
+    {1, field_fmt_33_40_2_2_info, field_fmt_33_40_2_2_set, field_fmt_33_40_2_2_get, NULL, 1},
+    {1, field_fmt_41_44_2_2_info, field_fmt_41_44_2_2_set, field_fmt_41_44_2_2_get, NULL, 1},
+    {1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 1},
+    {1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 1},
+    {1, field_fmt_50_51_2_2_info, field_fmt_50_51_2_2_set, field_fmt_50_51_2_2_get, NULL, 1},
+    {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 1},
+    {1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 1},
+    {1, field_fmt_55_62_2_2_info, field_fmt_55_62_2_2_set, field_fmt_55_62_2_2_get, NULL, 1},
+    {1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1},
+    {1, field_fmt_64_64_1_1_info, field_fmt_64_64_1_1_set, field_fmt_64_64_1_1_get, NULL, 1},
+    {1, field_fmt_65_65_1_1_info, field_fmt_65_65_1_1_set, field_fmt_65_65_1_1_get, NULL, 1},
+    {1, field_fmt_66_66_1_1_info, field_fmt_66_66_1_1_set, field_fmt_66_66_1_1_get, NULL, 1},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56080_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56080_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm56080_a0_txpmd_names[] =
+{
+    BCM56080_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56080_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56080_a0_txpmd_info = {4, BCM56080_A0_TXPMD_COUNT, bcm56080_a0_txpmd_names, bcm56080_a0_txpmd_fields};
+    return bcm56080_a0_txpmd_info;
+}
+
+static const shr_enum_map_t bcm56080_a0_lbhdr_header_type_names[] =
+{
+    BCM56080_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56080_a0_lbhdr_fields[BCM56080_A0_LBHDR_COUNT] = {
+    {1, field_fmt_0_6_3_3_info, field_fmt_0_6_3_3_set, field_fmt_0_6_3_3_get, NULL, 0},
+    {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 0},
+    {1, field_fmt_62_67_2_1_info, field_fmt_62_67_2_1_set, field_fmt_62_67_2_1_get, NULL, 0},
+    {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 0},
+    {1, field_fmt_69_69_1_1_info, field_fmt_69_69_1_1_set, field_fmt_69_69_1_1_get, NULL, 0},
+    {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0},
+    {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0},
+    {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0},
+    {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0},
+    {1, field_fmt_111_111_0_0_info, field_fmt_111_111_0_0_set, field_fmt_111_111_0_0_get, bcm56080_a0_lbhdr_header_type_names, 0},
+    {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0},
+    {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56080_a0_lbhdr_names[] =
+{
+    BCM56080_A0_LBHDR_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56080_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56080_a0_lbhdr_info = {4, BCM56080_A0_LBHDR_COUNT, bcm56080_a0_lbhdr_names, bcm56080_a0_lbhdr_fields};
+    return bcm56080_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c
index 41cedab3911..9a6d771facf 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c
@@ -73,22 +73,6 @@ const bcmpkt_lbhdr_fget_t bcm56690_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -135,22 +119,6 @@ const bcmpkt_lbhdr_fset_t bcm56690_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -168,7 +136,6 @@ static shr_enum_map_t bcm56690_a0_lbhdr_view_types[] = {
 
 /* -2: unsupported, -1: global, others: view's value */
 static int bcm56690_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.c
new file mode 100644
index 00000000000..75f674f7253
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.c
@@ -0,0 +1,1214 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM56690_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_447_17_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 447;
+    return info;
+}
+
+static void
+field_fmt_0_447_17_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[17] = val[0];
+    pmd[16] = val[1];
+    pmd[15] = val[2];
+    pmd[14] = val[3];
+    pmd[13] = val[4];
+    pmd[12] = val[5];
+    pmd[11] = val[6];
+    pmd[10] = val[7];
+    pmd[9] = val[8];
+    pmd[8] = val[9];
+    pmd[7] = val[10];
+    pmd[6] = val[11];
+    pmd[5] = val[12];
+    pmd[4] = val[13];
+}
+
+static void
+field_fmt_0_447_17_4_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[17];
+    val[1] = pmd[16];
+    val[2] = pmd[15];
+    val[3] = pmd[14];
+    val[4] = pmd[13];
+    val[5] = pmd[12];
+    val[6] = pmd[11];
+    val[7] = pmd[10];
+    val[8] = pmd[9];
+    val[9] = pmd[8];
+    val[10] = pmd[7];
+    val[11] = pmd[6];
+    val[12] = pmd[5];
+    val[13] = pmd[4];
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_23_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_10_23_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xff0003ff) | ((*val & 0x3fff) << 10);
+}
+
+static void
+field_fmt_10_23_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_43_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_38_43_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffff03f) | ((*val & 0x3f) << 6);
+}
+
+static void
+field_fmt_38_43_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 6) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_449_454_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 449;
+    info.maxbit = 454;
+    return info;
+}
+
+static void
+field_fmt_449_454_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff81) | ((*val & 0x3f) << 1);
+}
+
+static void
+field_fmt_449_454_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 1) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_455_455_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 455;
+    info.maxbit = 455;
+    return info;
+}
+
+static void
+field_fmt_455_455_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_455_455_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_456_459_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 456;
+    info.maxbit = 459;
+    return info;
+}
+
+static void
+field_fmt_456_459_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffff0ff) | ((*val & 0xf) << 8);
+}
+
+static void
+field_fmt_456_459_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_460_462_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 460;
+    info.maxbit = 462;
+    return info;
+}
+
+static void
+field_fmt_460_462_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffff8fff) | ((*val & 0x7) << 12);
+}
+
+static void
+field_fmt_460_462_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 12) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_464_465_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 464;
+    info.maxbit = 465;
+    return info;
+}
+
+static void
+field_fmt_464_465_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_464_465_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_466_467_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 466;
+    info.maxbit = 467;
+    return info;
+}
+
+static void
+field_fmt_466_467_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfff3ffff) | ((*val & 0x3) << 18);
+}
+
+static void
+field_fmt_466_467_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 18) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_468_468_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 468;
+    info.maxbit = 468;
+    return info;
+}
+
+static void
+field_fmt_468_468_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_468_468_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_469_469_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 469;
+    info.maxbit = 469;
+    return info;
+}
+
+static void
+field_fmt_469_469_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_469_469_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_470_470_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 470;
+    info.maxbit = 470;
+    return info;
+}
+
+static void
+field_fmt_470_470_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_470_470_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_473_479_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 473;
+    info.maxbit = 479;
+    return info;
+}
+
+static void
+field_fmt_473_479_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x1ffffff) | (*val << 25);
+}
+
+static void
+field_fmt_473_479_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 25) & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_50_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_47_50_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff87fff) | ((*val & 0xf) << 15);
+}
+
+static void
+field_fmt_47_50_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_480_511_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 480;
+    info.maxbit = 511;
+    return info;
+}
+
+static void
+field_fmt_480_511_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = *val;
+}
+
+static void
+field_fmt_480_511_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2];
+}
+
+static bcmpkt_field_info_t
+field_fmt_512_527_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 512;
+    info.maxbit = 527;
+    return info;
+}
+
+static void
+field_fmt_512_527_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_512_527_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[1] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_52_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_51_52_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffe7ffff) | ((*val & 0x3) << 19);
+}
+
+static void
+field_fmt_51_52_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 19) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_528_543_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 528;
+    info.maxbit = 543;
+    return info;
+}
+
+static void
+field_fmt_528_543_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff) | (*val << 16);
+}
+
+static void
+field_fmt_528_543_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_54_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_53_54_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff9fffff) | ((*val & 0x3) << 21);
+}
+
+static void
+field_fmt_53_54_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 21) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_544_545_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 544;
+    info.maxbit = 545;
+    return info;
+}
+
+static void
+field_fmt_544_545_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffffffc) | (*val & 0x3);
+}
+
+static void
+field_fmt_544_545_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[0] & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_546_551_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 546;
+    info.maxbit = 551;
+    return info;
+}
+
+static void
+field_fmt_546_551_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff03) | ((*val & 0x3f) << 2);
+}
+
+static void
+field_fmt_546_551_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 2) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_552_552_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 552;
+    info.maxbit = 552;
+    return info;
+}
+
+static void
+field_fmt_552_552_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_552_552_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_553_556_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 553;
+    info.maxbit = 556;
+    return info;
+}
+
+static void
+field_fmt_553_556_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffe1ff) | ((*val & 0xf) << 9);
+}
+
+static void
+field_fmt_553_556_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 9) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_557_557_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 557;
+    info.maxbit = 557;
+    return info;
+}
+
+static void
+field_fmt_557_557_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_557_557_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_558_558_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 558;
+    info.maxbit = 558;
+    return info;
+}
+
+static void
+field_fmt_558_558_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_558_558_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_559_559_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 559;
+    info.maxbit = 559;
+    return info;
+}
+
+static void
+field_fmt_559_559_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_559_559_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_55_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_55_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_560_575_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 560;
+    info.maxbit = 575;
+    return info;
+}
+
+static void
+field_fmt_560_575_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff) | (*val << 16);
+}
+
+static void
+field_fmt_560_575_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 16) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_59_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_56_59_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xf0ffffff) | ((*val & 0xf) << 24);
+}
+
+static void
+field_fmt_56_59_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_65_71_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 65;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_65_71_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffff01) | ((*val & 0x7f) << 1);
+}
+
+static void
+field_fmt_65_71_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 1) & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_72_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_72_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_81_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_81_81_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_81_81_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_82_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_82_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_85_85_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 85;
+    info.maxbit = 85;
+    return info;
+}
+
+static void
+field_fmt_85_85_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_85_85_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_86_86_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 86;
+    info.maxbit = 86;
+    return info;
+}
+
+static void
+field_fmt_86_86_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_86_86_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_87_96_1_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 87;
+    info.maxbit = 96;
+    return info;
+}
+
+static void
+field_fmt_87_96_1_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x7fffff) | (*val << 23);
+    pmd[0] = (pmd[0] & 0xfffffffe) | ((*val >> 9) & 0x1);
+}
+
+static void
+field_fmt_87_96_1_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[1] >> 23) | (pmd[0] << 9)) & 0x3ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_97_97_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 97;
+    info.maxbit = 97;
+    return info;
+}
+
+static void
+field_fmt_97_97_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_97_97_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_98_103_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 98;
+    info.maxbit = 103;
+    return info;
+}
+
+static void
+field_fmt_98_103_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff03) | ((*val & 0x3f) << 2);
+}
+
+static void
+field_fmt_98_103_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 2) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x1;
+}
+
+static bcmpkt_pmd_field_t bcm56690_a0_rxpmd_fields[BCM56690_A0_RXPMD_COUNT] = {
+    {14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0},
+    {1, field_fmt_449_454_3_3_info, field_fmt_449_454_3_3_set, field_fmt_449_454_3_3_get, NULL, 0},
+    {1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0},
+    {1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0},
+    {1, field_fmt_460_462_3_3_info, field_fmt_460_462_3_3_set, field_fmt_460_462_3_3_get, NULL, 0},
+    {1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0},
+    {1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0},
+    {1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0},
+    {1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0},
+    {1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0},
+    {1, field_fmt_473_479_3_3_info, field_fmt_473_479_3_3_set, field_fmt_473_479_3_3_get, NULL, 0},
+    {1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0},
+    {1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0},
+    {1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0},
+    {1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0},
+    {1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0},
+    {1, field_fmt_552_552_0_0_info, field_fmt_552_552_0_0_set, field_fmt_552_552_0_0_get, NULL, 0},
+    {1, field_fmt_553_556_0_0_info, field_fmt_553_556_0_0_set, field_fmt_553_556_0_0_get, NULL, 0},
+    {1, field_fmt_557_557_0_0_info, field_fmt_557_557_0_0_set, field_fmt_557_557_0_0_get, NULL, 0},
+    {1, field_fmt_558_558_0_0_info, field_fmt_558_558_0_0_set, field_fmt_558_558_0_0_get, NULL, 0},
+    {1, field_fmt_559_559_0_0_info, field_fmt_559_559_0_0_set, field_fmt_559_559_0_0_get, NULL, 0},
+    {1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56690_a0_rxpmd_names[] =
+{
+    BCM56690_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56690_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56690_a0_rxpmd_info = {18, BCM56690_A0_RXPMD_COUNT, bcm56690_a0_rxpmd_names, bcm56690_a0_rxpmd_fields};
+    return bcm56690_a0_rxpmd_info;
+}
+
+bcmpkt_pmd_info_t bcm56690_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56690_a0_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56690_a0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm56690_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56690_a0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56690_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm56690_a0_txpmd_header_type_names[] =
+{
+    BCM56690_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56690_a0_txpmd_start_names[] =
+{
+    BCM56690_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56690_a0_txpmd_fields[BCM56690_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0},
+    {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0},
+    {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0},
+    {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0},
+    {1, field_fmt_37_37_2_2_info, field_fmt_37_37_2_2_set, field_fmt_37_37_2_2_get, NULL, 0},
+    {1, field_fmt_38_43_2_2_info, field_fmt_38_43_2_2_set, field_fmt_38_43_2_2_get, NULL, 0},
+    {1, field_fmt_44_44_2_2_info, field_fmt_44_44_2_2_set, field_fmt_44_44_2_2_get, NULL, 0},
+    {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_50_2_2_info, field_fmt_47_50_2_2_set, field_fmt_47_50_2_2_get, NULL, 0},
+    {1, field_fmt_51_52_2_2_info, field_fmt_51_52_2_2_set, field_fmt_51_52_2_2_get, NULL, 0},
+    {1, field_fmt_53_54_2_2_info, field_fmt_53_54_2_2_set, field_fmt_53_54_2_2_get, NULL, 0},
+    {1, field_fmt_55_55_2_2_info, field_fmt_55_55_2_2_set, field_fmt_55_55_2_2_get, NULL, 0},
+    {1, field_fmt_56_59_2_2_info, field_fmt_56_59_2_2_set, field_fmt_56_59_2_2_get, NULL, 0},
+    {1, field_fmt_65_71_1_1_info, field_fmt_65_71_1_1_set, field_fmt_65_71_1_1_get, NULL, 0},
+    {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0},
+    {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0},
+    {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0},
+    {1, field_fmt_85_85_1_1_info, field_fmt_85_85_1_1_set, field_fmt_85_85_1_1_get, NULL, 0},
+    {1, field_fmt_86_86_1_1_info, field_fmt_86_86_1_1_set, field_fmt_86_86_1_1_get, NULL, 0},
+    {1, field_fmt_87_96_1_0_info, field_fmt_87_96_1_0_set, field_fmt_87_96_1_0_get, NULL, 0},
+    {1, field_fmt_97_97_0_0_info, field_fmt_97_97_0_0_set, field_fmt_97_97_0_0_get, NULL, 0},
+    {1, field_fmt_98_103_0_0_info, field_fmt_98_103_0_0_set, field_fmt_98_103_0_0_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56690_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56690_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm56690_a0_txpmd_names[] =
+{
+    BCM56690_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56690_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56690_a0_txpmd_info = {4, BCM56690_A0_TXPMD_COUNT, bcm56690_a0_txpmd_names, bcm56690_a0_txpmd_fields};
+    return bcm56690_a0_txpmd_info;
+}
+
+bcmpkt_pmd_info_t bcm56690_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56690_a0_lbhdr_info = {0, 0, NULL, NULL};
+    return bcm56690_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c
index 4a987adc72b..c64685aa2ac 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c
@@ -73,22 +73,6 @@ const bcmpkt_lbhdr_fget_t bcm56780_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -135,22 +119,6 @@ const bcmpkt_lbhdr_fset_t bcm56780_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -168,7 +136,6 @@ static shr_enum_map_t bcm56780_a0_lbhdr_view_types[] = {
 
 /* -2: unsupported, -1: global, others: view's value */
 static int bcm56780_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.c
new file mode 100644
index 00000000000..b3febee5fef
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.c
@@ -0,0 +1,1102 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM56780_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_447_17_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 447;
+    return info;
+}
+
+static void
+field_fmt_0_447_17_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[17] = val[0];
+    pmd[16] = val[1];
+    pmd[15] = val[2];
+    pmd[14] = val[3];
+    pmd[13] = val[4];
+    pmd[12] = val[5];
+    pmd[11] = val[6];
+    pmd[10] = val[7];
+    pmd[9] = val[8];
+    pmd[8] = val[9];
+    pmd[7] = val[10];
+    pmd[6] = val[11];
+    pmd[5] = val[12];
+    pmd[4] = val[13];
+}
+
+static void
+field_fmt_0_447_17_4_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[17];
+    val[1] = pmd[16];
+    val[2] = pmd[15];
+    val[3] = pmd[14];
+    val[4] = pmd[13];
+    val[5] = pmd[12];
+    val[6] = pmd[11];
+    val[7] = pmd[10];
+    val[8] = pmd[9];
+    val[9] = pmd[8];
+    val[10] = pmd[7];
+    val[11] = pmd[6];
+    val[12] = pmd[5];
+    val[13] = pmd[4];
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_0_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe00) | (*val & 0x1ff);
+}
+
+static void
+field_fmt_0_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_10_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 10;
+    return info;
+}
+
+static void
+field_fmt_10_10_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_10_10_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_11_24_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 11;
+    info.maxbit = 24;
+    return info;
+}
+
+static void
+field_fmt_11_24_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfe0007ff) | ((*val & 0x3fff) << 11);
+}
+
+static void
+field_fmt_11_24_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 11) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_44_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_39_44_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffe07f) | ((*val & 0x3f) << 7);
+}
+
+static void
+field_fmt_39_44_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_448_454_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 448;
+    info.maxbit = 454;
+    return info;
+}
+
+static void
+field_fmt_448_454_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff80) | (*val & 0x7f);
+}
+
+static void
+field_fmt_448_454_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_455_455_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 455;
+    info.maxbit = 455;
+    return info;
+}
+
+static void
+field_fmt_455_455_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_455_455_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_456_459_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 456;
+    info.maxbit = 459;
+    return info;
+}
+
+static void
+field_fmt_456_459_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffff0ff) | ((*val & 0xf) << 8);
+}
+
+static void
+field_fmt_456_459_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_460_463_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 460;
+    info.maxbit = 463;
+    return info;
+}
+
+static void
+field_fmt_460_463_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffff0fff) | ((*val & 0xf) << 12);
+}
+
+static void
+field_fmt_460_463_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 12) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_464_465_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 464;
+    info.maxbit = 465;
+    return info;
+}
+
+static void
+field_fmt_464_465_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_464_465_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_466_467_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 466;
+    info.maxbit = 467;
+    return info;
+}
+
+static void
+field_fmt_466_467_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfff3ffff) | ((*val & 0x3) << 18);
+}
+
+static void
+field_fmt_466_467_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 18) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_468_468_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 468;
+    info.maxbit = 468;
+    return info;
+}
+
+static void
+field_fmt_468_468_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_468_468_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_469_469_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 469;
+    info.maxbit = 469;
+    return info;
+}
+
+static void
+field_fmt_469_469_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_469_469_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_470_470_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 470;
+    info.maxbit = 470;
+    return info;
+}
+
+static void
+field_fmt_470_470_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_470_470_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_471_471_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 471;
+    info.maxbit = 471;
+    return info;
+}
+
+static void
+field_fmt_471_471_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_471_471_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_472_475_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 472;
+    info.maxbit = 475;
+    return info;
+}
+
+static void
+field_fmt_472_475_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xf0ffffff) | ((*val & 0xf) << 24);
+}
+
+static void
+field_fmt_472_475_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 24) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_476_476_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 476;
+    info.maxbit = 476;
+    return info;
+}
+
+static void
+field_fmt_476_476_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_476_476_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_477_477_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 477;
+    info.maxbit = 477;
+    return info;
+}
+
+static void
+field_fmt_477_477_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_477_477_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_478_478_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 478;
+    info.maxbit = 478;
+    return info;
+}
+
+static void
+field_fmt_478_478_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_478_478_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_479_479_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 479;
+    info.maxbit = 479;
+    return info;
+}
+
+static void
+field_fmt_479_479_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_479_479_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_480_511_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 480;
+    info.maxbit = 511;
+    return info;
+}
+
+static void
+field_fmt_480_511_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = *val;
+}
+
+static void
+field_fmt_480_511_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2];
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_48_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_48_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_512_527_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 512;
+    info.maxbit = 527;
+    return info;
+}
+
+static void
+field_fmt_512_527_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_512_527_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[1] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_528_543_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 528;
+    info.maxbit = 543;
+    return info;
+}
+
+static void
+field_fmt_528_543_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff) | (*val << 16);
+}
+
+static void
+field_fmt_528_543_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_52_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffcfffff) | ((*val & 0x3) << 20);
+}
+
+static void
+field_fmt_52_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_544_545_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 544;
+    info.maxbit = 545;
+    return info;
+}
+
+static void
+field_fmt_544_545_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffffffc) | (*val & 0x3);
+}
+
+static void
+field_fmt_544_545_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[0] & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_546_551_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 546;
+    info.maxbit = 551;
+    return info;
+}
+
+static void
+field_fmt_546_551_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff03) | ((*val & 0x3f) << 2);
+}
+
+static void
+field_fmt_546_551_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 2) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_54_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff3fffff) | ((*val & 0x3) << 22);
+}
+
+static void
+field_fmt_54_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_552_559_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 552;
+    info.maxbit = 559;
+    return info;
+}
+
+static void
+field_fmt_552_559_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_552_559_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_560_575_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 560;
+    info.maxbit = 575;
+    return info;
+}
+
+static void
+field_fmt_560_575_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff) | (*val << 16);
+}
+
+static void
+field_fmt_560_575_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 16) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_56_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 56;
+    return info;
+}
+
+static void
+field_fmt_56_56_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_56_56_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_57_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 57;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_57_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_57_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_71_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_64_71_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_64_71_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[1] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_72_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_72_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_81_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_81_81_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_81_81_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_82_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_82_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x1;
+}
+
+static bcmpkt_pmd_field_t bcm56780_a0_rxpmd_fields[BCM56780_A0_RXPMD_COUNT] = {
+    {14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0},
+    {1, field_fmt_448_454_3_3_info, field_fmt_448_454_3_3_set, field_fmt_448_454_3_3_get, NULL, 0},
+    {1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0},
+    {1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0},
+    {1, field_fmt_460_463_3_3_info, field_fmt_460_463_3_3_set, field_fmt_460_463_3_3_get, NULL, 0},
+    {1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0},
+    {1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0},
+    {1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0},
+    {1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0},
+    {1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0},
+    {1, field_fmt_471_471_3_3_info, field_fmt_471_471_3_3_set, field_fmt_471_471_3_3_get, NULL, 0},
+    {1, field_fmt_472_475_3_3_info, field_fmt_472_475_3_3_set, field_fmt_472_475_3_3_get, NULL, 0},
+    {1, field_fmt_476_476_3_3_info, field_fmt_476_476_3_3_set, field_fmt_476_476_3_3_get, NULL, 0},
+    {1, field_fmt_477_477_3_3_info, field_fmt_477_477_3_3_set, field_fmt_477_477_3_3_get, NULL, 0},
+    {1, field_fmt_478_478_3_3_info, field_fmt_478_478_3_3_set, field_fmt_478_478_3_3_get, NULL, 0},
+    {1, field_fmt_479_479_3_3_info, field_fmt_479_479_3_3_set, field_fmt_479_479_3_3_get, NULL, 0},
+    {1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0},
+    {1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0},
+    {1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0},
+    {1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0},
+    {1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0},
+    {1, field_fmt_552_559_0_0_info, field_fmt_552_559_0_0_set, field_fmt_552_559_0_0_get, NULL, 0},
+    {1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56780_a0_rxpmd_names[] =
+{
+    BCM56780_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56780_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56780_a0_rxpmd_info = {18, BCM56780_A0_RXPMD_COUNT, bcm56780_a0_rxpmd_names, bcm56780_a0_rxpmd_fields};
+    return bcm56780_a0_rxpmd_info;
+}
+
+bcmpkt_pmd_info_t bcm56780_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56780_a0_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56780_a0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm56780_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56780_a0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56780_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm56780_a0_txpmd_header_type_names[] =
+{
+    BCM56780_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56780_a0_txpmd_start_names[] =
+{
+    BCM56780_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56780_a0_txpmd_fields[BCM56780_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 0},
+    {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0},
+    {1, field_fmt_10_10_3_3_info, field_fmt_10_10_3_3_set, field_fmt_10_10_3_3_get, NULL, 0},
+    {1, field_fmt_11_24_3_3_info, field_fmt_11_24_3_3_set, field_fmt_11_24_3_3_get, NULL, 0},
+    {1, field_fmt_39_44_2_2_info, field_fmt_39_44_2_2_set, field_fmt_39_44_2_2_get, NULL, 0},
+    {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0},
+    {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0},
+    {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0},
+    {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0},
+    {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0},
+    {1, field_fmt_64_71_1_1_info, field_fmt_64_71_1_1_set, field_fmt_64_71_1_1_get, NULL, 0},
+    {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0},
+    {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0},
+    {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56780_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56780_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm56780_a0_txpmd_names[] =
+{
+    BCM56780_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56780_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56780_a0_txpmd_info = {4, BCM56780_A0_TXPMD_COUNT, bcm56780_a0_txpmd_names, bcm56780_a0_txpmd_fields};
+    return bcm56780_a0_txpmd_info;
+}
+
+bcmpkt_pmd_info_t bcm56780_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56780_a0_lbhdr_info = {0, 0, NULL, NULL};
+    return bcm56780_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c
index b03a6b61958..653db2b54fb 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c
@@ -73,22 +73,6 @@ const bcmpkt_lbhdr_fget_t bcm56880_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -135,22 +119,6 @@ const bcmpkt_lbhdr_fset_t bcm56880_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -168,7 +136,6 @@ static shr_enum_map_t bcm56880_a0_lbhdr_view_types[] = {
 
 /* -2: unsupported, -1: global, others: view's value */
 static int bcm56880_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.c
new file mode 100644
index 00000000000..4672a7a8d4f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.c
@@ -0,0 +1,1034 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM56880_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_23_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_10_23_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xff0003ff) | ((*val & 0x3fff) << 10);
+}
+
+static void
+field_fmt_10_23_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_447_16_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 447;
+    return info;
+}
+
+static void
+field_fmt_32_447_16_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[16] = val[0];
+    pmd[15] = val[1];
+    pmd[14] = val[2];
+    pmd[13] = val[3];
+    pmd[12] = val[4];
+    pmd[11] = val[5];
+    pmd[10] = val[6];
+    pmd[9] = val[7];
+    pmd[8] = val[8];
+    pmd[7] = val[9];
+    pmd[6] = val[10];
+    pmd[5] = val[11];
+    pmd[4] = val[12];
+}
+
+static void
+field_fmt_32_447_16_4_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[16];
+    val[1] = pmd[15];
+    val[2] = pmd[14];
+    val[3] = pmd[13];
+    val[4] = pmd[12];
+    val[5] = pmd[11];
+    val[6] = pmd[10];
+    val[7] = pmd[9];
+    val[8] = pmd[8];
+    val[9] = pmd[7];
+    val[10] = pmd[6];
+    val[11] = pmd[5];
+    val[12] = pmd[4];
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_44_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_39_44_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffe07f) | ((*val & 0x3f) << 7);
+}
+
+static void
+field_fmt_39_44_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_448_454_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 448;
+    info.maxbit = 454;
+    return info;
+}
+
+static void
+field_fmt_448_454_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff80) | (*val & 0x7f);
+}
+
+static void
+field_fmt_448_454_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_456_457_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 456;
+    info.maxbit = 457;
+    return info;
+}
+
+static void
+field_fmt_456_457_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffcff) | ((*val & 0x3) << 8);
+}
+
+static void
+field_fmt_456_457_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_458_459_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 458;
+    info.maxbit = 459;
+    return info;
+}
+
+static void
+field_fmt_458_459_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffff3ff) | ((*val & 0x3) << 10);
+}
+
+static void
+field_fmt_458_459_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_464_464_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 464;
+    info.maxbit = 464;
+    return info;
+}
+
+static void
+field_fmt_464_464_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_464_464_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_465_465_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 465;
+    info.maxbit = 465;
+    return info;
+}
+
+static void
+field_fmt_465_465_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_465_465_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_468_468_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 468;
+    info.maxbit = 468;
+    return info;
+}
+
+static void
+field_fmt_468_468_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_468_468_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_469_469_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 469;
+    info.maxbit = 469;
+    return info;
+}
+
+static void
+field_fmt_469_469_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_469_469_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_472_475_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 472;
+    info.maxbit = 475;
+    return info;
+}
+
+static void
+field_fmt_472_475_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xf0ffffff) | ((*val & 0xf) << 24);
+}
+
+static void
+field_fmt_472_475_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 24) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_476_476_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 476;
+    info.maxbit = 476;
+    return info;
+}
+
+static void
+field_fmt_476_476_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_476_476_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_477_477_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 477;
+    info.maxbit = 477;
+    return info;
+}
+
+static void
+field_fmt_477_477_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_477_477_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_478_478_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 478;
+    info.maxbit = 478;
+    return info;
+}
+
+static void
+field_fmt_478_478_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_478_478_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_479_479_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 479;
+    info.maxbit = 479;
+    return info;
+}
+
+static void
+field_fmt_479_479_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_479_479_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_480_511_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 480;
+    info.maxbit = 511;
+    return info;
+}
+
+static void
+field_fmt_480_511_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = *val;
+}
+
+static void
+field_fmt_480_511_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2];
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_48_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_48_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_512_527_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 512;
+    info.maxbit = 527;
+    return info;
+}
+
+static void
+field_fmt_512_527_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_512_527_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[1] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_528_543_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 528;
+    info.maxbit = 543;
+    return info;
+}
+
+static void
+field_fmt_528_543_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff) | (*val << 16);
+}
+
+static void
+field_fmt_528_543_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_52_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffcfffff) | ((*val & 0x3) << 20);
+}
+
+static void
+field_fmt_52_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_544_545_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 544;
+    info.maxbit = 545;
+    return info;
+}
+
+static void
+field_fmt_544_545_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffffffc) | (*val & 0x3);
+}
+
+static void
+field_fmt_544_545_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[0] & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_546_551_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 546;
+    info.maxbit = 551;
+    return info;
+}
+
+static void
+field_fmt_546_551_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff03) | ((*val & 0x3f) << 2);
+}
+
+static void
+field_fmt_546_551_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 2) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_54_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff3fffff) | ((*val & 0x3) << 22);
+}
+
+static void
+field_fmt_54_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_552_559_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 552;
+    info.maxbit = 559;
+    return info;
+}
+
+static void
+field_fmt_552_559_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_552_559_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_560_575_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 560;
+    info.maxbit = 575;
+    return info;
+}
+
+static void
+field_fmt_560_575_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff) | (*val << 16);
+}
+
+static void
+field_fmt_560_575_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 16) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_56_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 56;
+    return info;
+}
+
+static void
+field_fmt_56_56_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_56_56_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_57_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 57;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_57_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_57_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_71_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_64_71_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_64_71_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[1] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_72_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_72_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_81_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_81_81_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_81_81_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_82_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_82_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x1;
+}
+
+static bcmpkt_pmd_field_t bcm56880_a0_rxpmd_fields[BCM56880_A0_RXPMD_COUNT] = {
+    {13, field_fmt_32_447_16_4_info, field_fmt_32_447_16_4_set, field_fmt_32_447_16_4_get, NULL, 0},
+    {1, field_fmt_448_454_3_3_info, field_fmt_448_454_3_3_set, field_fmt_448_454_3_3_get, NULL, 0},
+    {1, field_fmt_456_457_3_3_info, field_fmt_456_457_3_3_set, field_fmt_456_457_3_3_get, NULL, 0},
+    {1, field_fmt_458_459_3_3_info, field_fmt_458_459_3_3_set, field_fmt_458_459_3_3_get, NULL, 0},
+    {1, field_fmt_464_464_3_3_info, field_fmt_464_464_3_3_set, field_fmt_464_464_3_3_get, NULL, 0},
+    {1, field_fmt_465_465_3_3_info, field_fmt_465_465_3_3_set, field_fmt_465_465_3_3_get, NULL, 0},
+    {1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0},
+    {1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0},
+    {1, field_fmt_472_475_3_3_info, field_fmt_472_475_3_3_set, field_fmt_472_475_3_3_get, NULL, 0},
+    {1, field_fmt_476_476_3_3_info, field_fmt_476_476_3_3_set, field_fmt_476_476_3_3_get, NULL, 0},
+    {1, field_fmt_477_477_3_3_info, field_fmt_477_477_3_3_set, field_fmt_477_477_3_3_get, NULL, 0},
+    {1, field_fmt_478_478_3_3_info, field_fmt_478_478_3_3_set, field_fmt_478_478_3_3_get, NULL, 0},
+    {1, field_fmt_479_479_3_3_info, field_fmt_479_479_3_3_set, field_fmt_479_479_3_3_get, NULL, 0},
+    {1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0},
+    {1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0},
+    {1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0},
+    {1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0},
+    {1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0},
+    {1, field_fmt_552_559_0_0_info, field_fmt_552_559_0_0_set, field_fmt_552_559_0_0_get, NULL, 0},
+    {1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56880_a0_rxpmd_names[] =
+{
+    BCM56880_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56880_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56880_a0_rxpmd_info = {18, BCM56880_A0_RXPMD_COUNT, bcm56880_a0_rxpmd_names, bcm56880_a0_rxpmd_fields};
+    return bcm56880_a0_rxpmd_info;
+}
+
+bcmpkt_pmd_info_t bcm56880_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56880_a0_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56880_a0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm56880_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56880_a0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56880_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm56880_a0_txpmd_header_type_names[] =
+{
+    BCM56880_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56880_a0_txpmd_start_names[] =
+{
+    BCM56880_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56880_a0_txpmd_fields[BCM56880_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0},
+    {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0},
+    {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0},
+    {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0},
+    {1, field_fmt_39_44_2_2_info, field_fmt_39_44_2_2_set, field_fmt_39_44_2_2_get, NULL, 0},
+    {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0},
+    {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0},
+    {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0},
+    {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0},
+    {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0},
+    {1, field_fmt_64_71_1_1_info, field_fmt_64_71_1_1_set, field_fmt_64_71_1_1_get, NULL, 0},
+    {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0},
+    {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0},
+    {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56880_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56880_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm56880_a0_txpmd_names[] =
+{
+    BCM56880_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56880_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56880_a0_txpmd_info = {4, BCM56880_A0_TXPMD_COUNT, bcm56880_a0_txpmd_names, bcm56880_a0_txpmd_fields};
+    return bcm56880_a0_txpmd_info;
+}
+
+bcmpkt_pmd_info_t bcm56880_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56880_a0_lbhdr_info = {0, 0, NULL, NULL};
+    return bcm56880_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c
index c2cc9de6779..fbe82b1b60e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c
@@ -73,22 +73,6 @@ const bcmpkt_lbhdr_fget_t bcm56890_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -135,22 +119,6 @@ const bcmpkt_lbhdr_fset_t bcm56890_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -168,7 +136,6 @@ static shr_enum_map_t bcm56890_a0_lbhdr_view_types[] = {
 
 /* -2: unsupported, -1: global, others: view's value */
 static int bcm56890_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.c
new file mode 100644
index 00000000000..08996622a1f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.c
@@ -0,0 +1,1215 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM56890_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_447_17_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 447;
+    return info;
+}
+
+static void
+field_fmt_0_447_17_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[17] = val[0];
+    pmd[16] = val[1];
+    pmd[15] = val[2];
+    pmd[14] = val[3];
+    pmd[13] = val[4];
+    pmd[12] = val[5];
+    pmd[11] = val[6];
+    pmd[10] = val[7];
+    pmd[9] = val[8];
+    pmd[8] = val[9];
+    pmd[7] = val[10];
+    pmd[6] = val[11];
+    pmd[5] = val[12];
+    pmd[4] = val[13];
+}
+
+static void
+field_fmt_0_447_17_4_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[17];
+    val[1] = pmd[16];
+    val[2] = pmd[15];
+    val[3] = pmd[14];
+    val[4] = pmd[13];
+    val[5] = pmd[12];
+    val[6] = pmd[11];
+    val[7] = pmd[10];
+    val[8] = pmd[9];
+    val[9] = pmd[8];
+    val[10] = pmd[7];
+    val[11] = pmd[6];
+    val[12] = pmd[5];
+    val[13] = pmd[4];
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_23_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_10_23_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xff0003ff) | ((*val & 0x3fff) << 10);
+}
+
+static void
+field_fmt_10_23_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_43_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_38_43_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffff03f) | ((*val & 0x3f) << 6);
+}
+
+static void
+field_fmt_38_43_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 6) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_449_454_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 449;
+    info.maxbit = 454;
+    return info;
+}
+
+static void
+field_fmt_449_454_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff81) | ((*val & 0x3f) << 1);
+}
+
+static void
+field_fmt_449_454_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 1) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_455_455_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 455;
+    info.maxbit = 455;
+    return info;
+}
+
+static void
+field_fmt_455_455_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_455_455_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_456_459_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 456;
+    info.maxbit = 459;
+    return info;
+}
+
+static void
+field_fmt_456_459_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffff0ff) | ((*val & 0xf) << 8);
+}
+
+static void
+field_fmt_456_459_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_460_462_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 460;
+    info.maxbit = 462;
+    return info;
+}
+
+static void
+field_fmt_460_462_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffff8fff) | ((*val & 0x7) << 12);
+}
+
+static void
+field_fmt_460_462_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 12) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_464_465_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 464;
+    info.maxbit = 465;
+    return info;
+}
+
+static void
+field_fmt_464_465_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_464_465_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_466_467_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 466;
+    info.maxbit = 467;
+    return info;
+}
+
+static void
+field_fmt_466_467_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfff3ffff) | ((*val & 0x3) << 18);
+}
+
+static void
+field_fmt_466_467_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 18) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_468_468_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 468;
+    info.maxbit = 468;
+    return info;
+}
+
+static void
+field_fmt_468_468_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_468_468_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_469_469_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 469;
+    info.maxbit = 469;
+    return info;
+}
+
+static void
+field_fmt_469_469_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_469_469_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_470_470_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 470;
+    info.maxbit = 470;
+    return info;
+}
+
+static void
+field_fmt_470_470_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_470_470_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_471_479_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 471;
+    info.maxbit = 479;
+    return info;
+}
+
+static void
+field_fmt_471_479_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffff) | (*val << 23);
+}
+
+static void
+field_fmt_471_479_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 23) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_50_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_47_50_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff87fff) | ((*val & 0xf) << 15);
+}
+
+static void
+field_fmt_47_50_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_480_511_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 480;
+    info.maxbit = 511;
+    return info;
+}
+
+static void
+field_fmt_480_511_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = *val;
+}
+
+static void
+field_fmt_480_511_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2];
+}
+
+static bcmpkt_field_info_t
+field_fmt_512_527_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 512;
+    info.maxbit = 527;
+    return info;
+}
+
+static void
+field_fmt_512_527_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_512_527_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[1] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_52_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_51_52_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffe7ffff) | ((*val & 0x3) << 19);
+}
+
+static void
+field_fmt_51_52_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 19) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_528_543_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 528;
+    info.maxbit = 543;
+    return info;
+}
+
+static void
+field_fmt_528_543_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff) | (*val << 16);
+}
+
+static void
+field_fmt_528_543_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_54_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_53_54_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff9fffff) | ((*val & 0x3) << 21);
+}
+
+static void
+field_fmt_53_54_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 21) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_544_545_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 544;
+    info.maxbit = 545;
+    return info;
+}
+
+static void
+field_fmt_544_545_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffffffc) | (*val & 0x3);
+}
+
+static void
+field_fmt_544_545_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[0] & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_546_551_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 546;
+    info.maxbit = 551;
+    return info;
+}
+
+static void
+field_fmt_546_551_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff03) | ((*val & 0x3f) << 2);
+}
+
+static void
+field_fmt_546_551_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 2) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_552_552_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 552;
+    info.maxbit = 552;
+    return info;
+}
+
+static void
+field_fmt_552_552_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_552_552_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_553_556_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 553;
+    info.maxbit = 556;
+    return info;
+}
+
+static void
+field_fmt_553_556_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffe1ff) | ((*val & 0xf) << 9);
+}
+
+static void
+field_fmt_553_556_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 9) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_557_557_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 557;
+    info.maxbit = 557;
+    return info;
+}
+
+static void
+field_fmt_557_557_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_557_557_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_558_558_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 558;
+    info.maxbit = 558;
+    return info;
+}
+
+static void
+field_fmt_558_558_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_558_558_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_559_559_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 559;
+    info.maxbit = 559;
+    return info;
+}
+
+static void
+field_fmt_559_559_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_559_559_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_55_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_55_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_560_575_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 560;
+    info.maxbit = 575;
+    return info;
+}
+
+static void
+field_fmt_560_575_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff) | (*val << 16);
+}
+
+static void
+field_fmt_560_575_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 16) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_59_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_56_59_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xf0ffffff) | ((*val & 0xf) << 24);
+}
+
+static void
+field_fmt_56_59_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_71_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_63_71_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31);
+    pmd[1] = (pmd[1] & 0xffffff00) | ((*val >> 1) & 0xff);
+}
+
+static void
+field_fmt_63_71_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 31) | (pmd[1] << 1)) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_72_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_72_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_81_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_81_81_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_81_81_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_82_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_82_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_85_85_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 85;
+    info.maxbit = 85;
+    return info;
+}
+
+static void
+field_fmt_85_85_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_85_85_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_86_86_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 86;
+    info.maxbit = 86;
+    return info;
+}
+
+static void
+field_fmt_86_86_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_86_86_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_87_96_1_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 87;
+    info.maxbit = 96;
+    return info;
+}
+
+static void
+field_fmt_87_96_1_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x7fffff) | (*val << 23);
+    pmd[0] = (pmd[0] & 0xfffffffe) | ((*val >> 9) & 0x1);
+}
+
+static void
+field_fmt_87_96_1_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[1] >> 23) | (pmd[0] << 9)) & 0x3ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_97_97_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 97;
+    info.maxbit = 97;
+    return info;
+}
+
+static void
+field_fmt_97_97_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_97_97_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_98_103_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 98;
+    info.maxbit = 103;
+    return info;
+}
+
+static void
+field_fmt_98_103_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff03) | ((*val & 0x3f) << 2);
+}
+
+static void
+field_fmt_98_103_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 2) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x1;
+}
+
+static bcmpkt_pmd_field_t bcm56890_a0_rxpmd_fields[BCM56890_A0_RXPMD_COUNT] = {
+    {14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0},
+    {1, field_fmt_449_454_3_3_info, field_fmt_449_454_3_3_set, field_fmt_449_454_3_3_get, NULL, 0},
+    {1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0},
+    {1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0},
+    {1, field_fmt_460_462_3_3_info, field_fmt_460_462_3_3_set, field_fmt_460_462_3_3_get, NULL, 0},
+    {1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0},
+    {1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0},
+    {1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0},
+    {1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0},
+    {1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0},
+    {1, field_fmt_471_479_3_3_info, field_fmt_471_479_3_3_set, field_fmt_471_479_3_3_get, NULL, 0},
+    {1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0},
+    {1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0},
+    {1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0},
+    {1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0},
+    {1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0},
+    {1, field_fmt_552_552_0_0_info, field_fmt_552_552_0_0_set, field_fmt_552_552_0_0_get, NULL, 0},
+    {1, field_fmt_553_556_0_0_info, field_fmt_553_556_0_0_set, field_fmt_553_556_0_0_get, NULL, 0},
+    {1, field_fmt_557_557_0_0_info, field_fmt_557_557_0_0_set, field_fmt_557_557_0_0_get, NULL, 0},
+    {1, field_fmt_558_558_0_0_info, field_fmt_558_558_0_0_set, field_fmt_558_558_0_0_get, NULL, 0},
+    {1, field_fmt_559_559_0_0_info, field_fmt_559_559_0_0_set, field_fmt_559_559_0_0_get, NULL, 0},
+    {1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56890_a0_rxpmd_names[] =
+{
+    BCM56890_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56890_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56890_a0_rxpmd_info = {18, BCM56890_A0_RXPMD_COUNT, bcm56890_a0_rxpmd_names, bcm56890_a0_rxpmd_fields};
+    return bcm56890_a0_rxpmd_info;
+}
+
+bcmpkt_pmd_info_t bcm56890_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56890_a0_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56890_a0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm56890_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56890_a0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56890_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm56890_a0_txpmd_header_type_names[] =
+{
+    BCM56890_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56890_a0_txpmd_start_names[] =
+{
+    BCM56890_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56890_a0_txpmd_fields[BCM56890_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0},
+    {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0},
+    {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0},
+    {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0},
+    {1, field_fmt_37_37_2_2_info, field_fmt_37_37_2_2_set, field_fmt_37_37_2_2_get, NULL, 0},
+    {1, field_fmt_38_43_2_2_info, field_fmt_38_43_2_2_set, field_fmt_38_43_2_2_get, NULL, 0},
+    {1, field_fmt_44_44_2_2_info, field_fmt_44_44_2_2_set, field_fmt_44_44_2_2_get, NULL, 0},
+    {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_50_2_2_info, field_fmt_47_50_2_2_set, field_fmt_47_50_2_2_get, NULL, 0},
+    {1, field_fmt_51_52_2_2_info, field_fmt_51_52_2_2_set, field_fmt_51_52_2_2_get, NULL, 0},
+    {1, field_fmt_53_54_2_2_info, field_fmt_53_54_2_2_set, field_fmt_53_54_2_2_get, NULL, 0},
+    {1, field_fmt_55_55_2_2_info, field_fmt_55_55_2_2_set, field_fmt_55_55_2_2_get, NULL, 0},
+    {1, field_fmt_56_59_2_2_info, field_fmt_56_59_2_2_set, field_fmt_56_59_2_2_get, NULL, 0},
+    {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0},
+    {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0},
+    {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0},
+    {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0},
+    {1, field_fmt_85_85_1_1_info, field_fmt_85_85_1_1_set, field_fmt_85_85_1_1_get, NULL, 0},
+    {1, field_fmt_86_86_1_1_info, field_fmt_86_86_1_1_set, field_fmt_86_86_1_1_get, NULL, 0},
+    {1, field_fmt_87_96_1_0_info, field_fmt_87_96_1_0_set, field_fmt_87_96_1_0_get, NULL, 0},
+    {1, field_fmt_97_97_0_0_info, field_fmt_97_97_0_0_set, field_fmt_97_97_0_0_get, NULL, 0},
+    {1, field_fmt_98_103_0_0_info, field_fmt_98_103_0_0_set, field_fmt_98_103_0_0_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56890_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56890_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm56890_a0_txpmd_names[] =
+{
+    BCM56890_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56890_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56890_a0_txpmd_info = {4, BCM56890_A0_TXPMD_COUNT, bcm56890_a0_txpmd_names, bcm56890_a0_txpmd_fields};
+    return bcm56890_a0_txpmd_info;
+}
+
+bcmpkt_pmd_info_t bcm56890_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56890_a0_lbhdr_info = {0, 0, NULL, NULL};
+    return bcm56890_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c
index 0075799c744..7c46f0f1306 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c
@@ -493,22 +493,6 @@ const bcmpkt_lbhdr_fget_t bcm56990_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -555,22 +539,6 @@ const bcmpkt_lbhdr_fset_t bcm56990_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -593,7 +561,6 @@ static shr_enum_map_t bcm56990_a0_lbhdr_view_types[] = {
 static int bcm56990_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.c
new file mode 100644
index 00000000000..0b70fa65a0e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.c
@@ -0,0 +1,2965 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM56990_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_11_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 11;
+    return info;
+}
+
+static void
+field_fmt_0_11_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffff000) | (*val & 0xfff);
+}
+
+static void
+field_fmt_0_11_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_3_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 3;
+    return info;
+}
+
+static void
+field_fmt_0_3_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_0_3_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_0_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe00) | (*val & 0x1ff);
+}
+
+static void
+field_fmt_0_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_100_100_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 100;
+    info.maxbit = 100;
+    return info;
+}
+
+static void
+field_fmt_100_100_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_100_100_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_103_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 103;
+    return info;
+}
+
+static void
+field_fmt_101_103_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffff1f) | ((*val & 0x7) << 5);
+}
+
+static void
+field_fmt_101_103_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_106_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 106;
+    return info;
+}
+
+static void
+field_fmt_101_106_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffff81f) | ((*val & 0x3f) << 5);
+}
+
+static void
+field_fmt_101_106_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_107_108_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 107;
+    info.maxbit = 108;
+    return info;
+}
+
+static void
+field_fmt_107_108_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffe7ff) | ((*val & 0x3) << 11);
+}
+
+static void
+field_fmt_107_108_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 11) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_109_110_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 109;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_109_110_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffff9fff) | ((*val & 0x3) << 13);
+}
+
+static void
+field_fmt_109_110_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 13) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_23_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_10_23_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xff0003ff) | ((*val & 0x3fff) << 10);
+}
+
+static void
+field_fmt_10_23_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_110_110_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 110;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_110_110_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_110_110_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_115_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 115;
+    return info;
+}
+
+static void
+field_fmt_111_115_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfff07fff) | ((*val & 0x1f) << 15);
+}
+
+static void
+field_fmt_111_115_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_123_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 123;
+    return info;
+}
+
+static void
+field_fmt_111_123_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xf0007fff) | ((*val & 0x1fff) << 15);
+}
+
+static void
+field_fmt_111_123_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 15) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_116_119_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 116;
+    info.maxbit = 119;
+    return info;
+}
+
+static void
+field_fmt_116_119_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xff0fffff) | ((*val & 0xf) << 20);
+}
+
+static void
+field_fmt_116_119_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 20) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_11_14_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 11;
+    info.maxbit = 14;
+    return info;
+}
+
+static void
+field_fmt_11_14_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffff87ff) | ((*val & 0xf) << 11);
+}
+
+static void
+field_fmt_11_14_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 11) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_120_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_120_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_124_125_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 124;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_124_125_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xcfffffff) | ((*val & 0x3) << 28);
+}
+
+static void
+field_fmt_124_125_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 28) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_126_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 126;
+    return info;
+}
+
+static void
+field_fmt_126_126_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_126_126_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_127_127_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 127;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_127_127_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_127_127_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_128_130_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 128;
+    info.maxbit = 130;
+    return info;
+}
+
+static void
+field_fmt_128_130_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffff8) | (*val & 0x7);
+}
+
+static void
+field_fmt_128_130_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[8] & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_13_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 13;
+    return info;
+}
+
+static void
+field_fmt_12_13_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffcfff) | ((*val & 0x3) << 12);
+}
+
+static void
+field_fmt_12_13_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_15_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 15;
+    return info;
+}
+
+static void
+field_fmt_12_15_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffff0fff) | ((*val & 0xf) << 12);
+}
+
+static void
+field_fmt_12_15_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_131_138_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 131;
+    info.maxbit = 138;
+    return info;
+}
+
+static void
+field_fmt_131_138_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffff807) | ((*val & 0xff) << 3);
+}
+
+static void
+field_fmt_131_138_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 3) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_139_141_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 139;
+    info.maxbit = 141;
+    return info;
+}
+
+static void
+field_fmt_139_141_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffc7ff) | ((*val & 0x7) << 11);
+}
+
+static void
+field_fmt_139_141_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 11) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_142_142_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 142;
+    info.maxbit = 142;
+    return info;
+}
+
+static void
+field_fmt_142_142_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_142_142_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_143_145_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 143;
+    info.maxbit = 145;
+    return info;
+}
+
+static void
+field_fmt_143_145_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffc7fff) | ((*val & 0x7) << 15);
+}
+
+static void
+field_fmt_143_145_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 15) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_146_157_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 146;
+    info.maxbit = 157;
+    return info;
+}
+
+static void
+field_fmt_146_157_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xc003ffff) | ((*val & 0xfff) << 18);
+}
+
+static void
+field_fmt_146_157_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 18) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_14_21_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 14;
+    info.maxbit = 21;
+    return info;
+}
+
+static void
+field_fmt_14_21_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffc03fff) | ((*val & 0xff) << 14);
+}
+
+static void
+field_fmt_14_21_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 14) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_158_159_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 158;
+    info.maxbit = 159;
+    return info;
+}
+
+static void
+field_fmt_158_159_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_158_159_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_15_30_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 15;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_15_30_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x80007fff) | ((*val & 0xffff) << 15);
+}
+
+static void
+field_fmt_15_30_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 15) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_160_173_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 160;
+    info.maxbit = 173;
+    return info;
+}
+
+static void
+field_fmt_160_173_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffc000) | (*val & 0x3fff);
+}
+
+static void
+field_fmt_160_173_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[7] & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_174_174_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 174;
+    info.maxbit = 174;
+    return info;
+}
+
+static void
+field_fmt_174_174_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_174_174_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_175_191_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 175;
+    info.maxbit = 191;
+    return info;
+}
+
+static void
+field_fmt_175_191_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x7fff) | (*val << 15);
+}
+
+static void
+field_fmt_175_191_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 15) & 0x1ffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_193_212_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 193;
+    info.maxbit = 212;
+    return info;
+}
+
+static void
+field_fmt_193_212_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffe00001) | ((*val & 0xfffff) << 1);
+}
+
+static void
+field_fmt_193_212_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 1) & 0xfffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_213_213_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 213;
+    info.maxbit = 213;
+    return info;
+}
+
+static void
+field_fmt_213_213_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_213_213_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_214_222_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 214;
+    info.maxbit = 222;
+    return info;
+}
+
+static void
+field_fmt_214_222_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x803fffff) | ((*val & 0x1ff) << 22);
+}
+
+static void
+field_fmt_214_222_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 22) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_223_223_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 223;
+    info.maxbit = 223;
+    return info;
+}
+
+static void
+field_fmt_223_223_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_223_223_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_224_255_5_5_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 224;
+    info.maxbit = 255;
+    return info;
+}
+
+static void
+field_fmt_224_255_5_5_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[5] = *val;
+}
+
+static void
+field_fmt_224_255_5_5_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[5];
+}
+
+static bcmpkt_field_info_t
+field_fmt_22_27_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 22;
+    info.maxbit = 27;
+    return info;
+}
+
+static void
+field_fmt_22_27_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xf03fffff) | ((*val & 0x3f) << 22);
+}
+
+static void
+field_fmt_22_27_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 22) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_24_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 24;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_24_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_24_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_256_271_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 256;
+    info.maxbit = 271;
+    return info;
+}
+
+static void
+field_fmt_256_271_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_256_271_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[4] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_272_273_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 272;
+    info.maxbit = 273;
+    return info;
+}
+
+static void
+field_fmt_272_273_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_272_273_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_274_278_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 274;
+    info.maxbit = 278;
+    return info;
+}
+
+static void
+field_fmt_274_278_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff83ffff) | ((*val & 0x1f) << 18);
+}
+
+static void
+field_fmt_274_278_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 18) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_279_279_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 279;
+    info.maxbit = 279;
+    return info;
+}
+
+static void
+field_fmt_279_279_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_279_279_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_280_280_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 280;
+    info.maxbit = 280;
+    return info;
+}
+
+static void
+field_fmt_280_280_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_280_280_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_281_287_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 281;
+    info.maxbit = 287;
+    return info;
+}
+
+static void
+field_fmt_281_287_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0x1ffffff) | (*val << 25);
+}
+
+static void
+field_fmt_281_287_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 25) & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_288_415_3_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 288;
+    info.maxbit = 415;
+    return info;
+}
+
+static void
+field_fmt_288_415_3_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = val[0];
+    pmd[2] = val[1];
+    pmd[1] = val[2];
+    pmd[0] = val[3];
+}
+
+static void
+field_fmt_288_415_3_0_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[3];
+    val[1] = pmd[2];
+    val[2] = pmd[1];
+    val[3] = pmd[0];
+}
+
+static bcmpkt_field_info_t
+field_fmt_28_28_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 28;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_28_28_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_28_28_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[11] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_39_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_32_39_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_32_39_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_95_11_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_32_95_11_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = val[0];
+    pmd[10] = val[1];
+}
+
+static void
+field_fmt_32_95_11_10_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[11];
+    val[1] = pmd[10];
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_33_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 33;
+    return info;
+}
+
+static void
+field_fmt_33_33_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_33_33_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_34_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_33_34_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_33_34_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_34_34_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 34;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_34_34_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_34_34_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_38_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_35_38_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff87) | ((*val & 0xf) << 3);
+}
+
+static void
+field_fmt_35_38_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 3) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_36_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_36_36_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_36_36_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_38_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_38_38_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_38_38_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_39_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_39_39_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_39_39_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_40_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_39_40_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffe7f) | ((*val & 0x3) << 7);
+}
+
+static void
+field_fmt_39_40_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_40_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_40_40_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_40_40_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_40_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffc0ff) | ((*val & 0x3f) << 8);
+}
+
+static void
+field_fmt_40_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 8) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_41_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_41_41_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_41_41_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_52_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_41_52_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffe001ff) | ((*val & 0xfff) << 9);
+}
+
+static void
+field_fmt_41_52_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 9) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_42_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_42_42_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_42_42_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_43_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_43_43_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_43_43_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_49_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 49;
+    return info;
+}
+
+static void
+field_fmt_48_49_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_48_49_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_48_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_48_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_4_5_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 4;
+    info.maxbit = 5;
+    return info;
+}
+
+static void
+field_fmt_4_5_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffffcf) | ((*val & 0x3) << 4);
+}
+
+static void
+field_fmt_4_5_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 4) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_50_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_50_50_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_50_50_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_51_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_51_51_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_51_51_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_52_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_52_52_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_52_52_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_52_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffcfffff) | ((*val & 0x3) << 20);
+}
+
+static void
+field_fmt_52_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_53_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_53_53_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_53_53_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_65_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 65;
+    return info;
+}
+
+static void
+field_fmt_53_65_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x1fffff) | (*val << 21);
+    pmd[1] = (pmd[1] & 0xfffffffc) | ((*val >> 11) & 0x3);
+}
+
+static void
+field_fmt_53_65_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 21) | (pmd[1] << 11)) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_54_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_54_54_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_54_54_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_54_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff3fffff) | ((*val & 0x3) << 22);
+}
+
+static void
+field_fmt_54_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_55_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_55_55_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_55_55_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_56_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 56;
+    return info;
+}
+
+static void
+field_fmt_56_56_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_56_56_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_58_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 58;
+    return info;
+}
+
+static void
+field_fmt_56_58_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf8ffffff) | ((*val & 0x7) << 24);
+}
+
+static void
+field_fmt_56_58_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 24) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_57_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 57;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_57_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_57_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_59_59_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 59;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_59_59_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf7ffffff) | ((*val & 0x1) << 27);
+}
+
+static void
+field_fmt_59_59_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 27) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_60_60_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 60;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_60_60_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_60_60_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_61_61_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 61;
+    info.maxbit = 61;
+    return info;
+}
+
+static void
+field_fmt_61_61_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_61_61_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_62_62_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 62;
+    info.maxbit = 62;
+    return info;
+}
+
+static void
+field_fmt_62_62_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_62_62_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_63_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_63_63_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_63_63_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_71_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_63_71_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31);
+    pmd[1] = (pmd[1] & 0xffffff00) | ((*val >> 1) & 0xff);
+}
+
+static void
+field_fmt_63_71_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 31) | (pmd[1] << 1)) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_64_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 64;
+    return info;
+}
+
+static void
+field_fmt_64_64_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_64_64_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[10] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_65_65_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 65;
+    info.maxbit = 65;
+    return info;
+}
+
+static void
+field_fmt_65_65_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_65_65_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_66_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 66;
+    return info;
+}
+
+static void
+field_fmt_66_66_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_66_66_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_66_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 66;
+    return info;
+}
+
+static void
+field_fmt_66_66_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_66_66_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_67_67_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 67;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_67_67_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_67_67_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_69_69_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 69;
+    info.maxbit = 69;
+    return info;
+}
+
+static void
+field_fmt_69_69_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_69_69_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_70_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 70;
+    return info;
+}
+
+static void
+field_fmt_70_70_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_70_70_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_77_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 77;
+    return info;
+}
+
+static void
+field_fmt_70_77_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffc03f) | ((*val & 0xff) << 6);
+}
+
+static void
+field_fmt_70_77_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 6) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_71_71_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 71;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_71_71_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_71_71_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_72_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 72;
+    return info;
+}
+
+static void
+field_fmt_72_72_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_72_72_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_72_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_72_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_73_73_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 73;
+    info.maxbit = 73;
+    return info;
+}
+
+static void
+field_fmt_73_73_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_73_73_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_74_74_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 74;
+    info.maxbit = 74;
+    return info;
+}
+
+static void
+field_fmt_74_74_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_74_74_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_78_78_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 78;
+    info.maxbit = 78;
+    return info;
+}
+
+static void
+field_fmt_78_78_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_78_78_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_81_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_81_81_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_81_81_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_82_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_82_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_90_92_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 90;
+    info.maxbit = 92;
+    return info;
+}
+
+static void
+field_fmt_90_92_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xe3ffffff) | ((*val & 0x7) << 26);
+}
+
+static void
+field_fmt_90_92_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 26) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_93_93_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 93;
+    info.maxbit = 93;
+    return info;
+}
+
+static void
+field_fmt_93_93_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_93_93_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_94_109_1_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 94;
+    info.maxbit = 109;
+    return info;
+}
+
+static void
+field_fmt_94_109_1_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x3fffffff) | (*val << 30);
+    pmd[0] = (pmd[0] & 0xffffc000) | ((*val >> 2) & 0x3fff);
+}
+
+static void
+field_fmt_94_109_1_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[1] >> 30) | (pmd[0] << 2)) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_96_99_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 96;
+    info.maxbit = 99;
+    return info;
+}
+
+static void
+field_fmt_96_99_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_96_99_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[9] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_10_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 10;
+    return info;
+}
+
+static void
+field_fmt_9_10_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffff9ff) | ((*val & 0x3) << 9);
+}
+
+static void
+field_fmt_9_10_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x1;
+}
+
+static const shr_enum_map_t bcm56990_a0_rxpmd_timestamp_type_names[] =
+{
+    BCM56990_A0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56990_a0_rxpmd_fields[BCM56990_A0_RXPMD_COUNT] = {
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0},
+    {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0},
+    {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0},
+    {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0},
+    {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0},
+    {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0},
+    {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0},
+    {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0},
+    {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0},
+    {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0},
+    {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0},
+    {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0},
+    {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0},
+    {1, field_fmt_111_123_9_9_info, field_fmt_111_123_9_9_set, field_fmt_111_123_9_9_get, NULL, 0},
+    {1, field_fmt_124_125_9_9_info, field_fmt_124_125_9_9_set, field_fmt_124_125_9_9_get, NULL, 0},
+    {1, field_fmt_126_126_9_9_info, field_fmt_126_126_9_9_set, field_fmt_126_126_9_9_get, NULL, 0},
+    {1, field_fmt_127_127_9_9_info, field_fmt_127_127_9_9_set, field_fmt_127_127_9_9_get, NULL, 0},
+    {1, field_fmt_128_130_8_8_info, field_fmt_128_130_8_8_set, field_fmt_128_130_8_8_get, NULL, 0},
+    {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0},
+    {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0},
+    {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0},
+    {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0},
+    {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0},
+    {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0},
+    {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0},
+    {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0},
+    {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0},
+    {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0},
+    {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0},
+    {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0},
+    {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0},
+    {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0},
+    {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0},
+    {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56990_a0_rxpmd_timestamp_type_names, 0},
+    {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0},
+    {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0},
+    {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0},
+    {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0},
+    {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56990_a0_rxpmd_names[] =
+{
+    BCM56990_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56990_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56990_a0_rxpmd_info = {13, BCM56990_A0_RXPMD_COUNT, bcm56990_a0_rxpmd_names, bcm56990_a0_rxpmd_fields};
+    return bcm56990_a0_rxpmd_info;
+}
+
+static const shr_enum_map_t bcm56990_a0_rx_reason_cpu_sflow_names[] =
+{
+    BCM56990_A0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56990_a0_rx_reason_mpls_proc_error_names[] =
+{
+    BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56990_a0_rx_reason_fields[BCM56990_A0_RX_REASON_COUNT] = {
+    {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0},
+    {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0},
+    {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0},
+    {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0},
+    {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0},
+    {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0},
+    {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0},
+    {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0},
+    {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0},
+    {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0},
+    {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0},
+    {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0},
+    {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0},
+    {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0},
+    {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0},
+    {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0},
+    {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56990_a0_rx_reason_cpu_sflow_names, 0},
+    {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0},
+    {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0},
+    {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0},
+    {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0},
+    {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0},
+    {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0},
+    {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56990_a0_rx_reason_mpls_proc_error_names, 0},
+    {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0},
+    {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0},
+    {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0},
+    {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0},
+    {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0},
+    {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0},
+    {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0},
+    {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0},
+    {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0},
+    {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0},
+    {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0},
+    {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0},
+    {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0},
+    {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0},
+    {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0},
+    {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56990_a0_rx_reason_names[] =
+{
+    BCM56990_A0_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56990_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56990_a0_rx_reason_info = {13, BCM56990_A0_RX_REASON_COUNT, bcm56990_a0_rx_reason_names, bcm56990_a0_rx_reason_fields};
+    return bcm56990_a0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm56990_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56990_a0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56990_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm56990_a0_txpmd_header_type_names[] =
+{
+    BCM56990_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56990_a0_txpmd_start_names[] =
+{
+    BCM56990_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56990_a0_txpmd_fields[BCM56990_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0},
+    {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0},
+    {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0},
+    {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0},
+    {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0},
+    {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0},
+    {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0},
+    {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0},
+    {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0},
+    {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0},
+    {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0},
+    {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0},
+    {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0},
+    {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0},
+    {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56990_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56990_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm56990_a0_txpmd_names[] =
+{
+    BCM56990_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56990_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56990_a0_txpmd_info = {4, BCM56990_A0_TXPMD_COUNT, bcm56990_a0_txpmd_names, bcm56990_a0_txpmd_fields};
+    return bcm56990_a0_txpmd_info;
+}
+
+static const shr_enum_map_t bcm56990_a0_lbhdr_ethernet_subflow_type_names[] =
+{
+    BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56990_a0_lbhdr_ethernet_destination_type_names[] =
+{
+    BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56990_a0_lbhdr_header_type_names[] =
+{
+    BCM56990_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56990_a0_lbhdr_fields[BCM56990_A0_LBHDR_COUNT] = {
+    {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3},
+    {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56990_a0_lbhdr_ethernet_subflow_type_names, 3},
+    {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56990_a0_lbhdr_ethernet_destination_type_names, 3},
+    {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3},
+    {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3},
+    {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3},
+    {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3},
+    {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3},
+    {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3},
+    {1, field_fmt_41_52_2_2_info, field_fmt_41_52_2_2_set, field_fmt_41_52_2_2_get, NULL, 3},
+    {1, field_fmt_53_65_2_1_info, field_fmt_53_65_2_1_set, field_fmt_53_65_2_1_get, NULL, 3},
+    {1, field_fmt_66_66_1_1_info, field_fmt_66_66_1_1_set, field_fmt_66_66_1_1_get, NULL, 3},
+    {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3},
+    {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1},
+    {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0},
+    {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0},
+    {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0},
+    {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0},
+    {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56990_a0_lbhdr_header_type_names, 0},
+    {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0},
+    {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56990_a0_lbhdr_names[] =
+{
+    BCM56990_A0_LBHDR_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56990_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56990_a0_lbhdr_info = {4, BCM56990_A0_LBHDR_COUNT, bcm56990_a0_lbhdr_names, bcm56990_a0_lbhdr_fields};
+    return bcm56990_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c
index 62a0b38ce76..1194c17f858 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c
@@ -493,22 +493,6 @@ const bcmpkt_lbhdr_fget_t bcm56990_b0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -555,22 +539,6 @@ const bcmpkt_lbhdr_fset_t bcm56990_b0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -593,7 +561,6 @@ static shr_enum_map_t bcm56990_b0_lbhdr_view_types[] = {
 static int bcm56990_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.c
new file mode 100644
index 00000000000..3050d261c30
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.c
@@ -0,0 +1,3031 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM56990_B0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_11_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 11;
+    return info;
+}
+
+static void
+field_fmt_0_11_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffff000) | (*val & 0xfff);
+}
+
+static void
+field_fmt_0_11_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_12_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 12;
+    return info;
+}
+
+static void
+field_fmt_0_12_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffe000) | (*val & 0x1fff);
+}
+
+static void
+field_fmt_0_12_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_3_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 3;
+    return info;
+}
+
+static void
+field_fmt_0_3_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_0_3_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_0_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe00) | (*val & 0x1ff);
+}
+
+static void
+field_fmt_0_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_100_100_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 100;
+    info.maxbit = 100;
+    return info;
+}
+
+static void
+field_fmt_100_100_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_100_100_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_103_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 103;
+    return info;
+}
+
+static void
+field_fmt_101_103_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffff1f) | ((*val & 0x7) << 5);
+}
+
+static void
+field_fmt_101_103_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_106_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 106;
+    return info;
+}
+
+static void
+field_fmt_101_106_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffff81f) | ((*val & 0x3f) << 5);
+}
+
+static void
+field_fmt_101_106_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_107_108_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 107;
+    info.maxbit = 108;
+    return info;
+}
+
+static void
+field_fmt_107_108_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffe7ff) | ((*val & 0x3) << 11);
+}
+
+static void
+field_fmt_107_108_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 11) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_109_110_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 109;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_109_110_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffff9fff) | ((*val & 0x3) << 13);
+}
+
+static void
+field_fmt_109_110_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 13) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_23_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_10_23_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xff0003ff) | ((*val & 0x3fff) << 10);
+}
+
+static void
+field_fmt_10_23_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_110_110_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 110;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_110_110_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_110_110_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_115_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 115;
+    return info;
+}
+
+static void
+field_fmt_111_115_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfff07fff) | ((*val & 0x1f) << 15);
+}
+
+static void
+field_fmt_111_115_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_125_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_111_125_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xc0007fff) | ((*val & 0x7fff) << 15);
+}
+
+static void
+field_fmt_111_125_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 15) & 0x7fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_116_119_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 116;
+    info.maxbit = 119;
+    return info;
+}
+
+static void
+field_fmt_116_119_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xff0fffff) | ((*val & 0xf) << 20);
+}
+
+static void
+field_fmt_116_119_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 20) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_11_14_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 11;
+    info.maxbit = 14;
+    return info;
+}
+
+static void
+field_fmt_11_14_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffff87ff) | ((*val & 0xf) << 11);
+}
+
+static void
+field_fmt_11_14_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 11) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_120_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_120_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_129_129_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 129;
+    info.maxbit = 129;
+    return info;
+}
+
+static void
+field_fmt_129_129_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_129_129_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_13_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 13;
+    return info;
+}
+
+static void
+field_fmt_12_13_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffcfff) | ((*val & 0x3) << 12);
+}
+
+static void
+field_fmt_12_13_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_15_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 15;
+    return info;
+}
+
+static void
+field_fmt_12_15_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffff0fff) | ((*val & 0xf) << 12);
+}
+
+static void
+field_fmt_12_15_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_130_130_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 130;
+    info.maxbit = 130;
+    return info;
+}
+
+static void
+field_fmt_130_130_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_130_130_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_131_138_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 131;
+    info.maxbit = 138;
+    return info;
+}
+
+static void
+field_fmt_131_138_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffff807) | ((*val & 0xff) << 3);
+}
+
+static void
+field_fmt_131_138_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 3) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_139_141_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 139;
+    info.maxbit = 141;
+    return info;
+}
+
+static void
+field_fmt_139_141_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffc7ff) | ((*val & 0x7) << 11);
+}
+
+static void
+field_fmt_139_141_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 11) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_142_142_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 142;
+    info.maxbit = 142;
+    return info;
+}
+
+static void
+field_fmt_142_142_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_142_142_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_143_145_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 143;
+    info.maxbit = 145;
+    return info;
+}
+
+static void
+field_fmt_143_145_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffc7fff) | ((*val & 0x7) << 15);
+}
+
+static void
+field_fmt_143_145_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 15) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_146_157_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 146;
+    info.maxbit = 157;
+    return info;
+}
+
+static void
+field_fmt_146_157_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xc003ffff) | ((*val & 0xfff) << 18);
+}
+
+static void
+field_fmt_146_157_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 18) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_14_21_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 14;
+    info.maxbit = 21;
+    return info;
+}
+
+static void
+field_fmt_14_21_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffc03fff) | ((*val & 0xff) << 14);
+}
+
+static void
+field_fmt_14_21_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 14) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_158_159_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 158;
+    info.maxbit = 159;
+    return info;
+}
+
+static void
+field_fmt_158_159_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_158_159_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_15_30_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 15;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_15_30_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x80007fff) | ((*val & 0xffff) << 15);
+}
+
+static void
+field_fmt_15_30_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 15) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_160_173_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 160;
+    info.maxbit = 173;
+    return info;
+}
+
+static void
+field_fmt_160_173_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffc000) | (*val & 0x3fff);
+}
+
+static void
+field_fmt_160_173_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[7] & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_16_16_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 16;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_16_16_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_16_16_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_174_174_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 174;
+    info.maxbit = 174;
+    return info;
+}
+
+static void
+field_fmt_174_174_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_174_174_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_175_191_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 175;
+    info.maxbit = 191;
+    return info;
+}
+
+static void
+field_fmt_175_191_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x7fff) | (*val << 15);
+}
+
+static void
+field_fmt_175_191_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 15) & 0x1ffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_193_212_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 193;
+    info.maxbit = 212;
+    return info;
+}
+
+static void
+field_fmt_193_212_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffe00001) | ((*val & 0xfffff) << 1);
+}
+
+static void
+field_fmt_193_212_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 1) & 0xfffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_213_213_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 213;
+    info.maxbit = 213;
+    return info;
+}
+
+static void
+field_fmt_213_213_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_213_213_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_214_222_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 214;
+    info.maxbit = 222;
+    return info;
+}
+
+static void
+field_fmt_214_222_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x803fffff) | ((*val & 0x1ff) << 22);
+}
+
+static void
+field_fmt_214_222_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 22) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_223_223_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 223;
+    info.maxbit = 223;
+    return info;
+}
+
+static void
+field_fmt_223_223_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_223_223_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_224_255_5_5_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 224;
+    info.maxbit = 255;
+    return info;
+}
+
+static void
+field_fmt_224_255_5_5_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[5] = *val;
+}
+
+static void
+field_fmt_224_255_5_5_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[5];
+}
+
+static bcmpkt_field_info_t
+field_fmt_22_27_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 22;
+    info.maxbit = 27;
+    return info;
+}
+
+static void
+field_fmt_22_27_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xf03fffff) | ((*val & 0x3f) << 22);
+}
+
+static void
+field_fmt_22_27_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 22) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_24_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 24;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_24_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_24_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_256_271_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 256;
+    info.maxbit = 271;
+    return info;
+}
+
+static void
+field_fmt_256_271_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_256_271_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[4] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_272_273_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 272;
+    info.maxbit = 273;
+    return info;
+}
+
+static void
+field_fmt_272_273_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_272_273_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_274_278_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 274;
+    info.maxbit = 278;
+    return info;
+}
+
+static void
+field_fmt_274_278_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff83ffff) | ((*val & 0x1f) << 18);
+}
+
+static void
+field_fmt_274_278_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 18) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_279_279_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 279;
+    info.maxbit = 279;
+    return info;
+}
+
+static void
+field_fmt_279_279_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_279_279_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_280_280_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 280;
+    info.maxbit = 280;
+    return info;
+}
+
+static void
+field_fmt_280_280_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_280_280_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_281_287_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 281;
+    info.maxbit = 287;
+    return info;
+}
+
+static void
+field_fmt_281_287_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0x1ffffff) | (*val << 25);
+}
+
+static void
+field_fmt_281_287_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 25) & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_288_415_3_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 288;
+    info.maxbit = 415;
+    return info;
+}
+
+static void
+field_fmt_288_415_3_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = val[0];
+    pmd[2] = val[1];
+    pmd[1] = val[2];
+    pmd[0] = val[3];
+}
+
+static void
+field_fmt_288_415_3_0_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[3];
+    val[1] = pmd[2];
+    val[2] = pmd[1];
+    val[3] = pmd[0];
+}
+
+static bcmpkt_field_info_t
+field_fmt_28_28_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 28;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_28_28_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_28_28_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[11] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_39_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_32_39_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_32_39_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_95_11_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_32_95_11_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = val[0];
+    pmd[10] = val[1];
+}
+
+static void
+field_fmt_32_95_11_10_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[11];
+    val[1] = pmd[10];
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_33_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 33;
+    return info;
+}
+
+static void
+field_fmt_33_33_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_33_33_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_34_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_33_34_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_33_34_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_34_34_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 34;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_34_34_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_34_34_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_38_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_35_38_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff87) | ((*val & 0xf) << 3);
+}
+
+static void
+field_fmt_35_38_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 3) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_36_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_36_36_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_36_36_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_38_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_38_38_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_38_38_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_39_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_39_39_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_39_39_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_40_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_39_40_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffe7f) | ((*val & 0x3) << 7);
+}
+
+static void
+field_fmt_39_40_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_40_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_40_40_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_40_40_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_40_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffc0ff) | ((*val & 0x3f) << 8);
+}
+
+static void
+field_fmt_40_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 8) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_41_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_41_41_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_41_41_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_54_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_41_54_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff8001ff) | ((*val & 0x3fff) << 9);
+}
+
+static void
+field_fmt_41_54_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 9) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_42_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_42_42_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_42_42_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_43_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_43_43_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_43_43_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_49_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 49;
+    return info;
+}
+
+static void
+field_fmt_48_49_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_48_49_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_48_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_48_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_4_5_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 4;
+    info.maxbit = 5;
+    return info;
+}
+
+static void
+field_fmt_4_5_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffffcf) | ((*val & 0x3) << 4);
+}
+
+static void
+field_fmt_4_5_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 4) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_50_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_50_50_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_50_50_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_51_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_51_51_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_51_51_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_52_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_52_52_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_52_52_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_52_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffcfffff) | ((*val & 0x3) << 20);
+}
+
+static void
+field_fmt_52_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_53_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_53_53_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_53_53_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_54_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_54_54_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_54_54_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_54_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff3fffff) | ((*val & 0x3) << 22);
+}
+
+static void
+field_fmt_54_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_55_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_55_55_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_55_55_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_67_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_55_67_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffff) | (*val << 23);
+    pmd[1] = (pmd[1] & 0xfffffff0) | ((*val >> 9) & 0xf);
+}
+
+static void
+field_fmt_55_67_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 23) | (pmd[1] << 9)) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_56_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 56;
+    return info;
+}
+
+static void
+field_fmt_56_56_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_56_56_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_58_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 58;
+    return info;
+}
+
+static void
+field_fmt_56_58_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf8ffffff) | ((*val & 0x7) << 24);
+}
+
+static void
+field_fmt_56_58_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 24) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_57_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 57;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_57_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_57_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_59_59_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 59;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_59_59_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf7ffffff) | ((*val & 0x1) << 27);
+}
+
+static void
+field_fmt_59_59_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 27) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_60_60_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 60;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_60_60_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_60_60_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_61_61_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 61;
+    info.maxbit = 61;
+    return info;
+}
+
+static void
+field_fmt_61_61_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_61_61_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_62_62_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 62;
+    info.maxbit = 62;
+    return info;
+}
+
+static void
+field_fmt_62_62_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_62_62_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_63_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_63_63_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_63_63_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_71_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_63_71_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31);
+    pmd[1] = (pmd[1] & 0xffffff00) | ((*val >> 1) & 0xff);
+}
+
+static void
+field_fmt_63_71_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 31) | (pmd[1] << 1)) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_64_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 64;
+    return info;
+}
+
+static void
+field_fmt_64_64_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_64_64_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[10] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_65_65_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 65;
+    info.maxbit = 65;
+    return info;
+}
+
+static void
+field_fmt_65_65_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_65_65_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_66_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 66;
+    return info;
+}
+
+static void
+field_fmt_66_66_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_66_66_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_67_67_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 67;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_67_67_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_67_67_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_69_69_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 69;
+    info.maxbit = 69;
+    return info;
+}
+
+static void
+field_fmt_69_69_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_69_69_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_70_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 70;
+    return info;
+}
+
+static void
+field_fmt_70_70_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_70_70_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_77_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 77;
+    return info;
+}
+
+static void
+field_fmt_70_77_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffc03f) | ((*val & 0xff) << 6);
+}
+
+static void
+field_fmt_70_77_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 6) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_71_71_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 71;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_71_71_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_71_71_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_72_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 72;
+    return info;
+}
+
+static void
+field_fmt_72_72_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_72_72_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_72_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_72_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_73_73_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 73;
+    info.maxbit = 73;
+    return info;
+}
+
+static void
+field_fmt_73_73_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_73_73_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_74_74_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 74;
+    info.maxbit = 74;
+    return info;
+}
+
+static void
+field_fmt_74_74_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_74_74_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_75_75_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 75;
+    info.maxbit = 75;
+    return info;
+}
+
+static void
+field_fmt_75_75_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_75_75_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_76_76_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 76;
+    info.maxbit = 76;
+    return info;
+}
+
+static void
+field_fmt_76_76_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_76_76_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_78_78_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 78;
+    info.maxbit = 78;
+    return info;
+}
+
+static void
+field_fmt_78_78_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_78_78_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_81_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_81_81_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_81_81_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_82_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_82_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_90_92_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 90;
+    info.maxbit = 92;
+    return info;
+}
+
+static void
+field_fmt_90_92_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xe3ffffff) | ((*val & 0x7) << 26);
+}
+
+static void
+field_fmt_90_92_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 26) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_93_93_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 93;
+    info.maxbit = 93;
+    return info;
+}
+
+static void
+field_fmt_93_93_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_93_93_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_94_109_1_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 94;
+    info.maxbit = 109;
+    return info;
+}
+
+static void
+field_fmt_94_109_1_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x3fffffff) | (*val << 30);
+    pmd[0] = (pmd[0] & 0xffffc000) | ((*val >> 2) & 0x3fff);
+}
+
+static void
+field_fmt_94_109_1_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[1] >> 30) | (pmd[0] << 2)) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_96_99_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 96;
+    info.maxbit = 99;
+    return info;
+}
+
+static void
+field_fmt_96_99_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_96_99_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[9] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_10_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 10;
+    return info;
+}
+
+static void
+field_fmt_9_10_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffff9ff) | ((*val & 0x3) << 9);
+}
+
+static void
+field_fmt_9_10_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x1;
+}
+
+static const shr_enum_map_t bcm56990_b0_rxpmd_timestamp_type_names[] =
+{
+    BCM56990_B0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56990_b0_rxpmd_fields[BCM56990_B0_RXPMD_COUNT] = {
+    {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0},
+    {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0},
+    {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0},
+    {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0},
+    {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0},
+    {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0},
+    {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0},
+    {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0},
+    {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0},
+    {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0},
+    {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0},
+    {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0},
+    {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0},
+    {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0},
+    {1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0},
+    {1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0},
+    {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0},
+    {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0},
+    {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0},
+    {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0},
+    {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0},
+    {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0},
+    {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0},
+    {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0},
+    {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0},
+    {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0},
+    {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0},
+    {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0},
+    {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0},
+    {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0},
+    {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0},
+    {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0},
+    {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0},
+    {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56990_b0_rxpmd_timestamp_type_names, 0},
+    {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0},
+    {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0},
+    {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0},
+    {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0},
+    {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56990_b0_rxpmd_names[] =
+{
+    BCM56990_B0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56990_b0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56990_b0_rxpmd_info = {13, BCM56990_B0_RXPMD_COUNT, bcm56990_b0_rxpmd_names, bcm56990_b0_rxpmd_fields};
+    return bcm56990_b0_rxpmd_info;
+}
+
+static const shr_enum_map_t bcm56990_b0_rx_reason_cpu_sflow_names[] =
+{
+    BCM56990_B0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56990_b0_rx_reason_mpls_proc_error_names[] =
+{
+    BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56990_b0_rx_reason_fields[BCM56990_B0_RX_REASON_COUNT] = {
+    {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0},
+    {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0},
+    {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0},
+    {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0},
+    {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0},
+    {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0},
+    {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0},
+    {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0},
+    {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0},
+    {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0},
+    {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0},
+    {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0},
+    {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0},
+    {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0},
+    {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0},
+    {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0},
+    {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56990_b0_rx_reason_cpu_sflow_names, 0},
+    {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0},
+    {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0},
+    {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0},
+    {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0},
+    {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0},
+    {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0},
+    {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56990_b0_rx_reason_mpls_proc_error_names, 0},
+    {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0},
+    {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0},
+    {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0},
+    {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0},
+    {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0},
+    {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0},
+    {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0},
+    {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0},
+    {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0},
+    {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0},
+    {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0},
+    {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0},
+    {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0},
+    {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0},
+    {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0},
+    {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0},
+    {1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0},
+    {1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56990_b0_rx_reason_names[] =
+{
+    BCM56990_B0_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56990_b0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56990_b0_rx_reason_info = {13, BCM56990_B0_RX_REASON_COUNT, bcm56990_b0_rx_reason_names, bcm56990_b0_rx_reason_fields};
+    return bcm56990_b0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm56990_b0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56990_b0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56990_b0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm56990_b0_txpmd_header_type_names[] =
+{
+    BCM56990_B0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56990_b0_txpmd_start_names[] =
+{
+    BCM56990_B0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56990_b0_txpmd_fields[BCM56990_B0_TXPMD_COUNT] = {
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0},
+    {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0},
+    {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0},
+    {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0},
+    {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0},
+    {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0},
+    {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0},
+    {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0},
+    {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0},
+    {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0},
+    {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0},
+    {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0},
+    {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0},
+    {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0},
+    {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56990_b0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56990_b0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm56990_b0_txpmd_names[] =
+{
+    BCM56990_B0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56990_b0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56990_b0_txpmd_info = {4, BCM56990_B0_TXPMD_COUNT, bcm56990_b0_txpmd_names, bcm56990_b0_txpmd_fields};
+    return bcm56990_b0_txpmd_info;
+}
+
+static const shr_enum_map_t bcm56990_b0_lbhdr_ethernet_subflow_type_names[] =
+{
+    BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56990_b0_lbhdr_ethernet_destination_type_names[] =
+{
+    BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56990_b0_lbhdr_header_type_names[] =
+{
+    BCM56990_B0_LBHDR_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56990_b0_lbhdr_fields[BCM56990_B0_LBHDR_COUNT] = {
+    {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3},
+    {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56990_b0_lbhdr_ethernet_subflow_type_names, 3},
+    {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56990_b0_lbhdr_ethernet_destination_type_names, 3},
+    {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3},
+    {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3},
+    {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3},
+    {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3},
+    {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3},
+    {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3},
+    {1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3},
+    {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3},
+    {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3},
+    {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3},
+    {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1},
+    {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0},
+    {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0},
+    {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0},
+    {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0},
+    {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56990_b0_lbhdr_header_type_names, 0},
+    {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0},
+    {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56990_b0_lbhdr_names[] =
+{
+    BCM56990_B0_LBHDR_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56990_b0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56990_b0_lbhdr_info = {4, BCM56990_B0_LBHDR_COUNT, bcm56990_b0_lbhdr_names, bcm56990_b0_lbhdr_fields};
+    return bcm56990_b0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c
index e5af6791080..787ef149de5 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c
@@ -493,22 +493,6 @@ const bcmpkt_lbhdr_fget_t bcm56996_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -555,22 +539,6 @@ const bcmpkt_lbhdr_fset_t bcm56996_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -593,7 +561,6 @@ static shr_enum_map_t bcm56996_a0_lbhdr_view_types[] = {
 static int bcm56996_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.c
new file mode 100644
index 00000000000..3e097c3fca8
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.c
@@ -0,0 +1,3031 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM56996_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_11_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 11;
+    return info;
+}
+
+static void
+field_fmt_0_11_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffff000) | (*val & 0xfff);
+}
+
+static void
+field_fmt_0_11_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_12_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 12;
+    return info;
+}
+
+static void
+field_fmt_0_12_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffe000) | (*val & 0x1fff);
+}
+
+static void
+field_fmt_0_12_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_3_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 3;
+    return info;
+}
+
+static void
+field_fmt_0_3_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_0_3_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_0_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe00) | (*val & 0x1ff);
+}
+
+static void
+field_fmt_0_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_100_100_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 100;
+    info.maxbit = 100;
+    return info;
+}
+
+static void
+field_fmt_100_100_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_100_100_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_103_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 103;
+    return info;
+}
+
+static void
+field_fmt_101_103_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffff1f) | ((*val & 0x7) << 5);
+}
+
+static void
+field_fmt_101_103_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_106_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 106;
+    return info;
+}
+
+static void
+field_fmt_101_106_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffff81f) | ((*val & 0x3f) << 5);
+}
+
+static void
+field_fmt_101_106_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_107_108_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 107;
+    info.maxbit = 108;
+    return info;
+}
+
+static void
+field_fmt_107_108_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffe7ff) | ((*val & 0x3) << 11);
+}
+
+static void
+field_fmt_107_108_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 11) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_109_110_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 109;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_109_110_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffff9fff) | ((*val & 0x3) << 13);
+}
+
+static void
+field_fmt_109_110_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 13) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_23_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_10_23_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xff0003ff) | ((*val & 0x3fff) << 10);
+}
+
+static void
+field_fmt_10_23_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_110_110_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 110;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_110_110_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_110_110_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_115_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 115;
+    return info;
+}
+
+static void
+field_fmt_111_115_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfff07fff) | ((*val & 0x1f) << 15);
+}
+
+static void
+field_fmt_111_115_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_125_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_111_125_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xc0007fff) | ((*val & 0x7fff) << 15);
+}
+
+static void
+field_fmt_111_125_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 15) & 0x7fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_116_119_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 116;
+    info.maxbit = 119;
+    return info;
+}
+
+static void
+field_fmt_116_119_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xff0fffff) | ((*val & 0xf) << 20);
+}
+
+static void
+field_fmt_116_119_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 20) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_11_14_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 11;
+    info.maxbit = 14;
+    return info;
+}
+
+static void
+field_fmt_11_14_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffff87ff) | ((*val & 0xf) << 11);
+}
+
+static void
+field_fmt_11_14_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 11) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_120_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_120_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_129_129_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 129;
+    info.maxbit = 129;
+    return info;
+}
+
+static void
+field_fmt_129_129_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_129_129_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_13_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 13;
+    return info;
+}
+
+static void
+field_fmt_12_13_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffcfff) | ((*val & 0x3) << 12);
+}
+
+static void
+field_fmt_12_13_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_15_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 15;
+    return info;
+}
+
+static void
+field_fmt_12_15_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffff0fff) | ((*val & 0xf) << 12);
+}
+
+static void
+field_fmt_12_15_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_130_130_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 130;
+    info.maxbit = 130;
+    return info;
+}
+
+static void
+field_fmt_130_130_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_130_130_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_131_138_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 131;
+    info.maxbit = 138;
+    return info;
+}
+
+static void
+field_fmt_131_138_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffff807) | ((*val & 0xff) << 3);
+}
+
+static void
+field_fmt_131_138_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 3) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_139_141_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 139;
+    info.maxbit = 141;
+    return info;
+}
+
+static void
+field_fmt_139_141_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffc7ff) | ((*val & 0x7) << 11);
+}
+
+static void
+field_fmt_139_141_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 11) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_142_142_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 142;
+    info.maxbit = 142;
+    return info;
+}
+
+static void
+field_fmt_142_142_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_142_142_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_143_145_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 143;
+    info.maxbit = 145;
+    return info;
+}
+
+static void
+field_fmt_143_145_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffc7fff) | ((*val & 0x7) << 15);
+}
+
+static void
+field_fmt_143_145_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 15) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_146_157_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 146;
+    info.maxbit = 157;
+    return info;
+}
+
+static void
+field_fmt_146_157_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xc003ffff) | ((*val & 0xfff) << 18);
+}
+
+static void
+field_fmt_146_157_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 18) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_14_21_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 14;
+    info.maxbit = 21;
+    return info;
+}
+
+static void
+field_fmt_14_21_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffc03fff) | ((*val & 0xff) << 14);
+}
+
+static void
+field_fmt_14_21_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 14) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_158_159_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 158;
+    info.maxbit = 159;
+    return info;
+}
+
+static void
+field_fmt_158_159_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_158_159_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_15_30_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 15;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_15_30_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x80007fff) | ((*val & 0xffff) << 15);
+}
+
+static void
+field_fmt_15_30_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 15) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_160_173_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 160;
+    info.maxbit = 173;
+    return info;
+}
+
+static void
+field_fmt_160_173_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffc000) | (*val & 0x3fff);
+}
+
+static void
+field_fmt_160_173_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[7] & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_16_16_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 16;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_16_16_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_16_16_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_174_174_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 174;
+    info.maxbit = 174;
+    return info;
+}
+
+static void
+field_fmt_174_174_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_174_174_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_175_191_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 175;
+    info.maxbit = 191;
+    return info;
+}
+
+static void
+field_fmt_175_191_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x7fff) | (*val << 15);
+}
+
+static void
+field_fmt_175_191_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 15) & 0x1ffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_193_212_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 193;
+    info.maxbit = 212;
+    return info;
+}
+
+static void
+field_fmt_193_212_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffe00001) | ((*val & 0xfffff) << 1);
+}
+
+static void
+field_fmt_193_212_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 1) & 0xfffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_213_213_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 213;
+    info.maxbit = 213;
+    return info;
+}
+
+static void
+field_fmt_213_213_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_213_213_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_214_222_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 214;
+    info.maxbit = 222;
+    return info;
+}
+
+static void
+field_fmt_214_222_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x803fffff) | ((*val & 0x1ff) << 22);
+}
+
+static void
+field_fmt_214_222_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 22) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_223_223_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 223;
+    info.maxbit = 223;
+    return info;
+}
+
+static void
+field_fmt_223_223_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_223_223_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_224_255_5_5_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 224;
+    info.maxbit = 255;
+    return info;
+}
+
+static void
+field_fmt_224_255_5_5_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[5] = *val;
+}
+
+static void
+field_fmt_224_255_5_5_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[5];
+}
+
+static bcmpkt_field_info_t
+field_fmt_22_27_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 22;
+    info.maxbit = 27;
+    return info;
+}
+
+static void
+field_fmt_22_27_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xf03fffff) | ((*val & 0x3f) << 22);
+}
+
+static void
+field_fmt_22_27_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 22) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_24_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 24;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_24_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_24_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_256_271_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 256;
+    info.maxbit = 271;
+    return info;
+}
+
+static void
+field_fmt_256_271_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_256_271_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[4] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_272_273_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 272;
+    info.maxbit = 273;
+    return info;
+}
+
+static void
+field_fmt_272_273_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_272_273_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_274_278_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 274;
+    info.maxbit = 278;
+    return info;
+}
+
+static void
+field_fmt_274_278_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff83ffff) | ((*val & 0x1f) << 18);
+}
+
+static void
+field_fmt_274_278_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 18) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_279_279_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 279;
+    info.maxbit = 279;
+    return info;
+}
+
+static void
+field_fmt_279_279_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_279_279_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_280_280_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 280;
+    info.maxbit = 280;
+    return info;
+}
+
+static void
+field_fmt_280_280_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_280_280_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_281_287_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 281;
+    info.maxbit = 287;
+    return info;
+}
+
+static void
+field_fmt_281_287_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0x1ffffff) | (*val << 25);
+}
+
+static void
+field_fmt_281_287_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 25) & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_288_415_3_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 288;
+    info.maxbit = 415;
+    return info;
+}
+
+static void
+field_fmt_288_415_3_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = val[0];
+    pmd[2] = val[1];
+    pmd[1] = val[2];
+    pmd[0] = val[3];
+}
+
+static void
+field_fmt_288_415_3_0_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[3];
+    val[1] = pmd[2];
+    val[2] = pmd[1];
+    val[3] = pmd[0];
+}
+
+static bcmpkt_field_info_t
+field_fmt_28_28_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 28;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_28_28_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_28_28_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[11] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_39_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_32_39_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_32_39_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_95_11_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_32_95_11_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = val[0];
+    pmd[10] = val[1];
+}
+
+static void
+field_fmt_32_95_11_10_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[11];
+    val[1] = pmd[10];
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_33_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 33;
+    return info;
+}
+
+static void
+field_fmt_33_33_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_33_33_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_34_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_33_34_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_33_34_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_34_34_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 34;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_34_34_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_34_34_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_38_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_35_38_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff87) | ((*val & 0xf) << 3);
+}
+
+static void
+field_fmt_35_38_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 3) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_36_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_36_36_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_36_36_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_38_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_38_38_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_38_38_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_39_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_39_39_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_39_39_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_40_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_39_40_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffe7f) | ((*val & 0x3) << 7);
+}
+
+static void
+field_fmt_39_40_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_40_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_40_40_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_40_40_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_40_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffc0ff) | ((*val & 0x3f) << 8);
+}
+
+static void
+field_fmt_40_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 8) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_41_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_41_41_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_41_41_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_54_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_41_54_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff8001ff) | ((*val & 0x3fff) << 9);
+}
+
+static void
+field_fmt_41_54_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 9) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_42_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_42_42_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_42_42_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_43_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_43_43_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_43_43_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_49_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 49;
+    return info;
+}
+
+static void
+field_fmt_48_49_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_48_49_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_48_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_48_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_4_5_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 4;
+    info.maxbit = 5;
+    return info;
+}
+
+static void
+field_fmt_4_5_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffffcf) | ((*val & 0x3) << 4);
+}
+
+static void
+field_fmt_4_5_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 4) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_50_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_50_50_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_50_50_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_51_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_51_51_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_51_51_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_52_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_52_52_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_52_52_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_52_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffcfffff) | ((*val & 0x3) << 20);
+}
+
+static void
+field_fmt_52_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_53_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_53_53_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_53_53_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_54_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_54_54_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_54_54_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_54_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff3fffff) | ((*val & 0x3) << 22);
+}
+
+static void
+field_fmt_54_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_55_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_55_55_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_55_55_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_67_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_55_67_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffff) | (*val << 23);
+    pmd[1] = (pmd[1] & 0xfffffff0) | ((*val >> 9) & 0xf);
+}
+
+static void
+field_fmt_55_67_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 23) | (pmd[1] << 9)) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_56_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 56;
+    return info;
+}
+
+static void
+field_fmt_56_56_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_56_56_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_58_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 58;
+    return info;
+}
+
+static void
+field_fmt_56_58_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf8ffffff) | ((*val & 0x7) << 24);
+}
+
+static void
+field_fmt_56_58_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 24) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_57_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 57;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_57_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_57_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_59_59_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 59;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_59_59_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf7ffffff) | ((*val & 0x1) << 27);
+}
+
+static void
+field_fmt_59_59_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 27) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_60_60_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 60;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_60_60_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_60_60_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_61_61_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 61;
+    info.maxbit = 61;
+    return info;
+}
+
+static void
+field_fmt_61_61_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_61_61_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_62_62_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 62;
+    info.maxbit = 62;
+    return info;
+}
+
+static void
+field_fmt_62_62_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_62_62_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_63_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_63_63_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_63_63_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_71_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_63_71_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31);
+    pmd[1] = (pmd[1] & 0xffffff00) | ((*val >> 1) & 0xff);
+}
+
+static void
+field_fmt_63_71_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 31) | (pmd[1] << 1)) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_64_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 64;
+    return info;
+}
+
+static void
+field_fmt_64_64_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_64_64_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[10] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_65_65_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 65;
+    info.maxbit = 65;
+    return info;
+}
+
+static void
+field_fmt_65_65_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_65_65_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_66_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 66;
+    return info;
+}
+
+static void
+field_fmt_66_66_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_66_66_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_67_67_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 67;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_67_67_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_67_67_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_69_69_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 69;
+    info.maxbit = 69;
+    return info;
+}
+
+static void
+field_fmt_69_69_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_69_69_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_70_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 70;
+    return info;
+}
+
+static void
+field_fmt_70_70_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_70_70_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_77_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 77;
+    return info;
+}
+
+static void
+field_fmt_70_77_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffc03f) | ((*val & 0xff) << 6);
+}
+
+static void
+field_fmt_70_77_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 6) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_71_71_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 71;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_71_71_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_71_71_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_72_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 72;
+    return info;
+}
+
+static void
+field_fmt_72_72_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_72_72_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_72_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_72_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_73_73_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 73;
+    info.maxbit = 73;
+    return info;
+}
+
+static void
+field_fmt_73_73_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_73_73_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_74_74_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 74;
+    info.maxbit = 74;
+    return info;
+}
+
+static void
+field_fmt_74_74_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_74_74_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_75_75_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 75;
+    info.maxbit = 75;
+    return info;
+}
+
+static void
+field_fmt_75_75_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_75_75_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_76_76_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 76;
+    info.maxbit = 76;
+    return info;
+}
+
+static void
+field_fmt_76_76_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_76_76_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_78_78_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 78;
+    info.maxbit = 78;
+    return info;
+}
+
+static void
+field_fmt_78_78_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_78_78_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_81_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_81_81_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_81_81_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_82_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_82_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_90_92_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 90;
+    info.maxbit = 92;
+    return info;
+}
+
+static void
+field_fmt_90_92_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xe3ffffff) | ((*val & 0x7) << 26);
+}
+
+static void
+field_fmt_90_92_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 26) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_93_93_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 93;
+    info.maxbit = 93;
+    return info;
+}
+
+static void
+field_fmt_93_93_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_93_93_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_94_109_1_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 94;
+    info.maxbit = 109;
+    return info;
+}
+
+static void
+field_fmt_94_109_1_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x3fffffff) | (*val << 30);
+    pmd[0] = (pmd[0] & 0xffffc000) | ((*val >> 2) & 0x3fff);
+}
+
+static void
+field_fmt_94_109_1_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[1] >> 30) | (pmd[0] << 2)) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_96_99_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 96;
+    info.maxbit = 99;
+    return info;
+}
+
+static void
+field_fmt_96_99_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_96_99_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[9] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_10_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 10;
+    return info;
+}
+
+static void
+field_fmt_9_10_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffff9ff) | ((*val & 0x3) << 9);
+}
+
+static void
+field_fmt_9_10_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x1;
+}
+
+static const shr_enum_map_t bcm56996_a0_rxpmd_timestamp_type_names[] =
+{
+    BCM56996_A0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56996_a0_rxpmd_fields[BCM56996_A0_RXPMD_COUNT] = {
+    {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0},
+    {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0},
+    {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0},
+    {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0},
+    {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0},
+    {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0},
+    {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0},
+    {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0},
+    {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0},
+    {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0},
+    {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0},
+    {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0},
+    {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0},
+    {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0},
+    {1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0},
+    {1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0},
+    {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0},
+    {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0},
+    {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0},
+    {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0},
+    {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0},
+    {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0},
+    {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0},
+    {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0},
+    {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0},
+    {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0},
+    {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0},
+    {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0},
+    {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0},
+    {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0},
+    {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0},
+    {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0},
+    {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0},
+    {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56996_a0_rxpmd_timestamp_type_names, 0},
+    {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0},
+    {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0},
+    {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0},
+    {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0},
+    {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56996_a0_rxpmd_names[] =
+{
+    BCM56996_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56996_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56996_a0_rxpmd_info = {13, BCM56996_A0_RXPMD_COUNT, bcm56996_a0_rxpmd_names, bcm56996_a0_rxpmd_fields};
+    return bcm56996_a0_rxpmd_info;
+}
+
+static const shr_enum_map_t bcm56996_a0_rx_reason_cpu_sflow_names[] =
+{
+    BCM56996_A0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56996_a0_rx_reason_mpls_proc_error_names[] =
+{
+    BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56996_a0_rx_reason_fields[BCM56996_A0_RX_REASON_COUNT] = {
+    {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0},
+    {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0},
+    {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0},
+    {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0},
+    {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0},
+    {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0},
+    {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0},
+    {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0},
+    {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0},
+    {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0},
+    {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0},
+    {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0},
+    {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0},
+    {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0},
+    {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0},
+    {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0},
+    {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56996_a0_rx_reason_cpu_sflow_names, 0},
+    {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0},
+    {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0},
+    {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0},
+    {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0},
+    {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0},
+    {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0},
+    {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56996_a0_rx_reason_mpls_proc_error_names, 0},
+    {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0},
+    {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0},
+    {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0},
+    {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0},
+    {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0},
+    {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0},
+    {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0},
+    {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0},
+    {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0},
+    {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0},
+    {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0},
+    {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0},
+    {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0},
+    {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0},
+    {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0},
+    {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0},
+    {1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0},
+    {1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56996_a0_rx_reason_names[] =
+{
+    BCM56996_A0_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56996_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56996_a0_rx_reason_info = {13, BCM56996_A0_RX_REASON_COUNT, bcm56996_a0_rx_reason_names, bcm56996_a0_rx_reason_fields};
+    return bcm56996_a0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm56996_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56996_a0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56996_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm56996_a0_txpmd_header_type_names[] =
+{
+    BCM56996_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56996_a0_txpmd_start_names[] =
+{
+    BCM56996_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56996_a0_txpmd_fields[BCM56996_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0},
+    {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0},
+    {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0},
+    {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0},
+    {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0},
+    {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0},
+    {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0},
+    {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0},
+    {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0},
+    {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0},
+    {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0},
+    {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0},
+    {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0},
+    {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0},
+    {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56996_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56996_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm56996_a0_txpmd_names[] =
+{
+    BCM56996_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56996_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56996_a0_txpmd_info = {4, BCM56996_A0_TXPMD_COUNT, bcm56996_a0_txpmd_names, bcm56996_a0_txpmd_fields};
+    return bcm56996_a0_txpmd_info;
+}
+
+static const shr_enum_map_t bcm56996_a0_lbhdr_ethernet_subflow_type_names[] =
+{
+    BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56996_a0_lbhdr_ethernet_destination_type_names[] =
+{
+    BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56996_a0_lbhdr_header_type_names[] =
+{
+    BCM56996_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56996_a0_lbhdr_fields[BCM56996_A0_LBHDR_COUNT] = {
+    {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3},
+    {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56996_a0_lbhdr_ethernet_subflow_type_names, 3},
+    {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56996_a0_lbhdr_ethernet_destination_type_names, 3},
+    {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3},
+    {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3},
+    {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3},
+    {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3},
+    {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3},
+    {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3},
+    {1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3},
+    {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3},
+    {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3},
+    {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3},
+    {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1},
+    {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0},
+    {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0},
+    {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0},
+    {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0},
+    {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56996_a0_lbhdr_header_type_names, 0},
+    {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0},
+    {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56996_a0_lbhdr_names[] =
+{
+    BCM56996_A0_LBHDR_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56996_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56996_a0_lbhdr_info = {4, BCM56996_A0_LBHDR_COUNT, bcm56996_a0_lbhdr_names, bcm56996_a0_lbhdr_fields};
+    return bcm56996_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c
index 1a84e343ceb..579124c1f36 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c
@@ -493,22 +493,6 @@ const bcmpkt_lbhdr_fget_t bcm56996_b0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -555,22 +539,6 @@ const bcmpkt_lbhdr_fset_t bcm56996_b0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -593,7 +561,6 @@ static shr_enum_map_t bcm56996_b0_lbhdr_view_types[] = {
 static int bcm56996_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.c
new file mode 100644
index 00000000000..949b448c117
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.c
@@ -0,0 +1,3031 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM56996_B0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_11_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 11;
+    return info;
+}
+
+static void
+field_fmt_0_11_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffff000) | (*val & 0xfff);
+}
+
+static void
+field_fmt_0_11_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_12_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 12;
+    return info;
+}
+
+static void
+field_fmt_0_12_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffe000) | (*val & 0x1fff);
+}
+
+static void
+field_fmt_0_12_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_3_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 3;
+    return info;
+}
+
+static void
+field_fmt_0_3_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_0_3_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_0_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe00) | (*val & 0x1ff);
+}
+
+static void
+field_fmt_0_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_100_100_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 100;
+    info.maxbit = 100;
+    return info;
+}
+
+static void
+field_fmt_100_100_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_100_100_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_103_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 103;
+    return info;
+}
+
+static void
+field_fmt_101_103_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffff1f) | ((*val & 0x7) << 5);
+}
+
+static void
+field_fmt_101_103_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_106_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 106;
+    return info;
+}
+
+static void
+field_fmt_101_106_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffff81f) | ((*val & 0x3f) << 5);
+}
+
+static void
+field_fmt_101_106_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_107_108_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 107;
+    info.maxbit = 108;
+    return info;
+}
+
+static void
+field_fmt_107_108_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffe7ff) | ((*val & 0x3) << 11);
+}
+
+static void
+field_fmt_107_108_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 11) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_109_110_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 109;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_109_110_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffff9fff) | ((*val & 0x3) << 13);
+}
+
+static void
+field_fmt_109_110_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 13) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_23_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_10_23_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xff0003ff) | ((*val & 0x3fff) << 10);
+}
+
+static void
+field_fmt_10_23_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_110_110_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 110;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_110_110_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_110_110_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_115_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 115;
+    return info;
+}
+
+static void
+field_fmt_111_115_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfff07fff) | ((*val & 0x1f) << 15);
+}
+
+static void
+field_fmt_111_115_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_125_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_111_125_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xc0007fff) | ((*val & 0x7fff) << 15);
+}
+
+static void
+field_fmt_111_125_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 15) & 0x7fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_116_119_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 116;
+    info.maxbit = 119;
+    return info;
+}
+
+static void
+field_fmt_116_119_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xff0fffff) | ((*val & 0xf) << 20);
+}
+
+static void
+field_fmt_116_119_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 20) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_11_14_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 11;
+    info.maxbit = 14;
+    return info;
+}
+
+static void
+field_fmt_11_14_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffff87ff) | ((*val & 0xf) << 11);
+}
+
+static void
+field_fmt_11_14_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 11) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_120_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_120_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_129_129_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 129;
+    info.maxbit = 129;
+    return info;
+}
+
+static void
+field_fmt_129_129_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_129_129_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_13_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 13;
+    return info;
+}
+
+static void
+field_fmt_12_13_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffcfff) | ((*val & 0x3) << 12);
+}
+
+static void
+field_fmt_12_13_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_15_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 15;
+    return info;
+}
+
+static void
+field_fmt_12_15_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffff0fff) | ((*val & 0xf) << 12);
+}
+
+static void
+field_fmt_12_15_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_130_130_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 130;
+    info.maxbit = 130;
+    return info;
+}
+
+static void
+field_fmt_130_130_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_130_130_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_131_138_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 131;
+    info.maxbit = 138;
+    return info;
+}
+
+static void
+field_fmt_131_138_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffff807) | ((*val & 0xff) << 3);
+}
+
+static void
+field_fmt_131_138_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 3) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_139_141_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 139;
+    info.maxbit = 141;
+    return info;
+}
+
+static void
+field_fmt_139_141_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffc7ff) | ((*val & 0x7) << 11);
+}
+
+static void
+field_fmt_139_141_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 11) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_142_142_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 142;
+    info.maxbit = 142;
+    return info;
+}
+
+static void
+field_fmt_142_142_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_142_142_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_143_145_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 143;
+    info.maxbit = 145;
+    return info;
+}
+
+static void
+field_fmt_143_145_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffc7fff) | ((*val & 0x7) << 15);
+}
+
+static void
+field_fmt_143_145_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 15) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_146_157_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 146;
+    info.maxbit = 157;
+    return info;
+}
+
+static void
+field_fmt_146_157_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xc003ffff) | ((*val & 0xfff) << 18);
+}
+
+static void
+field_fmt_146_157_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 18) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_14_21_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 14;
+    info.maxbit = 21;
+    return info;
+}
+
+static void
+field_fmt_14_21_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffc03fff) | ((*val & 0xff) << 14);
+}
+
+static void
+field_fmt_14_21_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 14) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_158_159_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 158;
+    info.maxbit = 159;
+    return info;
+}
+
+static void
+field_fmt_158_159_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_158_159_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_15_30_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 15;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_15_30_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x80007fff) | ((*val & 0xffff) << 15);
+}
+
+static void
+field_fmt_15_30_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 15) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_160_173_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 160;
+    info.maxbit = 173;
+    return info;
+}
+
+static void
+field_fmt_160_173_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffc000) | (*val & 0x3fff);
+}
+
+static void
+field_fmt_160_173_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[7] & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_16_16_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 16;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_16_16_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_16_16_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_174_174_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 174;
+    info.maxbit = 174;
+    return info;
+}
+
+static void
+field_fmt_174_174_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_174_174_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_175_191_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 175;
+    info.maxbit = 191;
+    return info;
+}
+
+static void
+field_fmt_175_191_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x7fff) | (*val << 15);
+}
+
+static void
+field_fmt_175_191_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 15) & 0x1ffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_193_212_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 193;
+    info.maxbit = 212;
+    return info;
+}
+
+static void
+field_fmt_193_212_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffe00001) | ((*val & 0xfffff) << 1);
+}
+
+static void
+field_fmt_193_212_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 1) & 0xfffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_213_213_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 213;
+    info.maxbit = 213;
+    return info;
+}
+
+static void
+field_fmt_213_213_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_213_213_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_214_222_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 214;
+    info.maxbit = 222;
+    return info;
+}
+
+static void
+field_fmt_214_222_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x803fffff) | ((*val & 0x1ff) << 22);
+}
+
+static void
+field_fmt_214_222_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 22) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_223_223_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 223;
+    info.maxbit = 223;
+    return info;
+}
+
+static void
+field_fmt_223_223_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_223_223_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_224_255_5_5_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 224;
+    info.maxbit = 255;
+    return info;
+}
+
+static void
+field_fmt_224_255_5_5_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[5] = *val;
+}
+
+static void
+field_fmt_224_255_5_5_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[5];
+}
+
+static bcmpkt_field_info_t
+field_fmt_22_27_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 22;
+    info.maxbit = 27;
+    return info;
+}
+
+static void
+field_fmt_22_27_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xf03fffff) | ((*val & 0x3f) << 22);
+}
+
+static void
+field_fmt_22_27_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 22) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_24_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 24;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_24_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_24_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_256_271_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 256;
+    info.maxbit = 271;
+    return info;
+}
+
+static void
+field_fmt_256_271_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_256_271_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[4] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_272_273_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 272;
+    info.maxbit = 273;
+    return info;
+}
+
+static void
+field_fmt_272_273_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_272_273_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_274_278_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 274;
+    info.maxbit = 278;
+    return info;
+}
+
+static void
+field_fmt_274_278_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff83ffff) | ((*val & 0x1f) << 18);
+}
+
+static void
+field_fmt_274_278_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 18) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_279_279_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 279;
+    info.maxbit = 279;
+    return info;
+}
+
+static void
+field_fmt_279_279_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_279_279_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_280_280_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 280;
+    info.maxbit = 280;
+    return info;
+}
+
+static void
+field_fmt_280_280_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_280_280_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_281_287_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 281;
+    info.maxbit = 287;
+    return info;
+}
+
+static void
+field_fmt_281_287_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0x1ffffff) | (*val << 25);
+}
+
+static void
+field_fmt_281_287_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 25) & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_288_415_3_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 288;
+    info.maxbit = 415;
+    return info;
+}
+
+static void
+field_fmt_288_415_3_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = val[0];
+    pmd[2] = val[1];
+    pmd[1] = val[2];
+    pmd[0] = val[3];
+}
+
+static void
+field_fmt_288_415_3_0_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[3];
+    val[1] = pmd[2];
+    val[2] = pmd[1];
+    val[3] = pmd[0];
+}
+
+static bcmpkt_field_info_t
+field_fmt_28_28_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 28;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_28_28_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_28_28_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[11] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_39_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_32_39_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_32_39_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_95_11_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_32_95_11_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = val[0];
+    pmd[10] = val[1];
+}
+
+static void
+field_fmt_32_95_11_10_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[11];
+    val[1] = pmd[10];
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_33_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 33;
+    return info;
+}
+
+static void
+field_fmt_33_33_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_33_33_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_34_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_33_34_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_33_34_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_34_34_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 34;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_34_34_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_34_34_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_38_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_35_38_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff87) | ((*val & 0xf) << 3);
+}
+
+static void
+field_fmt_35_38_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 3) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_36_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_36_36_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_36_36_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_38_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_38_38_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_38_38_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_39_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_39_39_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_39_39_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_40_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_39_40_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffe7f) | ((*val & 0x3) << 7);
+}
+
+static void
+field_fmt_39_40_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_40_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_40_40_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_40_40_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_40_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffc0ff) | ((*val & 0x3f) << 8);
+}
+
+static void
+field_fmt_40_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 8) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_41_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_41_41_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_41_41_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_54_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_41_54_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff8001ff) | ((*val & 0x3fff) << 9);
+}
+
+static void
+field_fmt_41_54_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 9) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_42_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_42_42_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_42_42_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_43_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_43_43_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_43_43_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_49_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 49;
+    return info;
+}
+
+static void
+field_fmt_48_49_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_48_49_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_48_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_48_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_4_5_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 4;
+    info.maxbit = 5;
+    return info;
+}
+
+static void
+field_fmt_4_5_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffffcf) | ((*val & 0x3) << 4);
+}
+
+static void
+field_fmt_4_5_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 4) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_50_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_50_50_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_50_50_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_51_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_51_51_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_51_51_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_52_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_52_52_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_52_52_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_52_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffcfffff) | ((*val & 0x3) << 20);
+}
+
+static void
+field_fmt_52_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_53_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_53_53_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_53_53_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_54_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_54_54_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_54_54_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_54_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff3fffff) | ((*val & 0x3) << 22);
+}
+
+static void
+field_fmt_54_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_55_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_55_55_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_55_55_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_67_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_55_67_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffff) | (*val << 23);
+    pmd[1] = (pmd[1] & 0xfffffff0) | ((*val >> 9) & 0xf);
+}
+
+static void
+field_fmt_55_67_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 23) | (pmd[1] << 9)) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_56_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 56;
+    return info;
+}
+
+static void
+field_fmt_56_56_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_56_56_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_58_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 58;
+    return info;
+}
+
+static void
+field_fmt_56_58_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf8ffffff) | ((*val & 0x7) << 24);
+}
+
+static void
+field_fmt_56_58_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 24) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_57_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 57;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_57_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_57_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_59_59_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 59;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_59_59_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf7ffffff) | ((*val & 0x1) << 27);
+}
+
+static void
+field_fmt_59_59_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 27) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_60_60_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 60;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_60_60_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_60_60_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_61_61_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 61;
+    info.maxbit = 61;
+    return info;
+}
+
+static void
+field_fmt_61_61_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_61_61_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_62_62_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 62;
+    info.maxbit = 62;
+    return info;
+}
+
+static void
+field_fmt_62_62_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_62_62_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_63_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_63_63_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_63_63_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_71_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_63_71_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31);
+    pmd[1] = (pmd[1] & 0xffffff00) | ((*val >> 1) & 0xff);
+}
+
+static void
+field_fmt_63_71_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 31) | (pmd[1] << 1)) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_64_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 64;
+    return info;
+}
+
+static void
+field_fmt_64_64_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_64_64_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[10] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_65_65_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 65;
+    info.maxbit = 65;
+    return info;
+}
+
+static void
+field_fmt_65_65_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_65_65_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_66_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 66;
+    return info;
+}
+
+static void
+field_fmt_66_66_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_66_66_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_67_67_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 67;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_67_67_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_67_67_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_69_69_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 69;
+    info.maxbit = 69;
+    return info;
+}
+
+static void
+field_fmt_69_69_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_69_69_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_70_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 70;
+    return info;
+}
+
+static void
+field_fmt_70_70_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_70_70_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_77_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 77;
+    return info;
+}
+
+static void
+field_fmt_70_77_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffc03f) | ((*val & 0xff) << 6);
+}
+
+static void
+field_fmt_70_77_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 6) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_71_71_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 71;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_71_71_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_71_71_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_72_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 72;
+    return info;
+}
+
+static void
+field_fmt_72_72_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_72_72_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_72_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_72_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_73_73_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 73;
+    info.maxbit = 73;
+    return info;
+}
+
+static void
+field_fmt_73_73_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_73_73_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_74_74_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 74;
+    info.maxbit = 74;
+    return info;
+}
+
+static void
+field_fmt_74_74_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_74_74_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_75_75_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 75;
+    info.maxbit = 75;
+    return info;
+}
+
+static void
+field_fmt_75_75_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_75_75_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_76_76_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 76;
+    info.maxbit = 76;
+    return info;
+}
+
+static void
+field_fmt_76_76_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_76_76_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_78_78_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 78;
+    info.maxbit = 78;
+    return info;
+}
+
+static void
+field_fmt_78_78_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_78_78_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_81_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_81_81_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_81_81_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_82_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_82_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_90_92_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 90;
+    info.maxbit = 92;
+    return info;
+}
+
+static void
+field_fmt_90_92_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xe3ffffff) | ((*val & 0x7) << 26);
+}
+
+static void
+field_fmt_90_92_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 26) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_93_93_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 93;
+    info.maxbit = 93;
+    return info;
+}
+
+static void
+field_fmt_93_93_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_93_93_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_94_109_1_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 94;
+    info.maxbit = 109;
+    return info;
+}
+
+static void
+field_fmt_94_109_1_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x3fffffff) | (*val << 30);
+    pmd[0] = (pmd[0] & 0xffffc000) | ((*val >> 2) & 0x3fff);
+}
+
+static void
+field_fmt_94_109_1_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[1] >> 30) | (pmd[0] << 2)) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_96_99_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 96;
+    info.maxbit = 99;
+    return info;
+}
+
+static void
+field_fmt_96_99_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_96_99_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[9] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_10_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 10;
+    return info;
+}
+
+static void
+field_fmt_9_10_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffff9ff) | ((*val & 0x3) << 9);
+}
+
+static void
+field_fmt_9_10_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x1;
+}
+
+static const shr_enum_map_t bcm56996_b0_rxpmd_timestamp_type_names[] =
+{
+    BCM56996_B0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56996_b0_rxpmd_fields[BCM56996_B0_RXPMD_COUNT] = {
+    {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0},
+    {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0},
+    {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0},
+    {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0},
+    {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0},
+    {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0},
+    {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0},
+    {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0},
+    {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0},
+    {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0},
+    {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0},
+    {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0},
+    {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0},
+    {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0},
+    {1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0},
+    {1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0},
+    {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0},
+    {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0},
+    {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0},
+    {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0},
+    {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0},
+    {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0},
+    {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0},
+    {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0},
+    {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0},
+    {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0},
+    {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0},
+    {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0},
+    {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0},
+    {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0},
+    {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0},
+    {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0},
+    {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0},
+    {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56996_b0_rxpmd_timestamp_type_names, 0},
+    {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0},
+    {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0},
+    {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0},
+    {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0},
+    {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56996_b0_rxpmd_names[] =
+{
+    BCM56996_B0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56996_b0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56996_b0_rxpmd_info = {13, BCM56996_B0_RXPMD_COUNT, bcm56996_b0_rxpmd_names, bcm56996_b0_rxpmd_fields};
+    return bcm56996_b0_rxpmd_info;
+}
+
+static const shr_enum_map_t bcm56996_b0_rx_reason_cpu_sflow_names[] =
+{
+    BCM56996_B0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56996_b0_rx_reason_mpls_proc_error_names[] =
+{
+    BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56996_b0_rx_reason_fields[BCM56996_B0_RX_REASON_COUNT] = {
+    {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0},
+    {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0},
+    {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0},
+    {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0},
+    {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0},
+    {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0},
+    {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0},
+    {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0},
+    {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0},
+    {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0},
+    {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0},
+    {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0},
+    {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0},
+    {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0},
+    {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0},
+    {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0},
+    {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56996_b0_rx_reason_cpu_sflow_names, 0},
+    {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0},
+    {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0},
+    {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0},
+    {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0},
+    {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0},
+    {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0},
+    {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56996_b0_rx_reason_mpls_proc_error_names, 0},
+    {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0},
+    {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0},
+    {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0},
+    {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0},
+    {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0},
+    {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0},
+    {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0},
+    {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0},
+    {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0},
+    {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0},
+    {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0},
+    {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0},
+    {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0},
+    {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0},
+    {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0},
+    {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0},
+    {1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0},
+    {1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56996_b0_rx_reason_names[] =
+{
+    BCM56996_B0_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56996_b0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56996_b0_rx_reason_info = {13, BCM56996_B0_RX_REASON_COUNT, bcm56996_b0_rx_reason_names, bcm56996_b0_rx_reason_fields};
+    return bcm56996_b0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm56996_b0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56996_b0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56996_b0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm56996_b0_txpmd_header_type_names[] =
+{
+    BCM56996_B0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56996_b0_txpmd_start_names[] =
+{
+    BCM56996_B0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56996_b0_txpmd_fields[BCM56996_B0_TXPMD_COUNT] = {
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0},
+    {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0},
+    {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0},
+    {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0},
+    {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0},
+    {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0},
+    {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0},
+    {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0},
+    {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0},
+    {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0},
+    {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0},
+    {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0},
+    {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0},
+    {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0},
+    {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56996_b0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56996_b0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm56996_b0_txpmd_names[] =
+{
+    BCM56996_B0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56996_b0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56996_b0_txpmd_info = {4, BCM56996_B0_TXPMD_COUNT, bcm56996_b0_txpmd_names, bcm56996_b0_txpmd_fields};
+    return bcm56996_b0_txpmd_info;
+}
+
+static const shr_enum_map_t bcm56996_b0_lbhdr_ethernet_subflow_type_names[] =
+{
+    BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56996_b0_lbhdr_ethernet_destination_type_names[] =
+{
+    BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56996_b0_lbhdr_header_type_names[] =
+{
+    BCM56996_B0_LBHDR_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56996_b0_lbhdr_fields[BCM56996_B0_LBHDR_COUNT] = {
+    {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3},
+    {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56996_b0_lbhdr_ethernet_subflow_type_names, 3},
+    {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56996_b0_lbhdr_ethernet_destination_type_names, 3},
+    {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3},
+    {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3},
+    {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3},
+    {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3},
+    {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3},
+    {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3},
+    {1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3},
+    {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3},
+    {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3},
+    {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3},
+    {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1},
+    {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0},
+    {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0},
+    {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0},
+    {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0},
+    {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56996_b0_lbhdr_header_type_names, 0},
+    {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0},
+    {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56996_b0_lbhdr_names[] =
+{
+    BCM56996_B0_LBHDR_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56996_b0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56996_b0_lbhdr_info = {4, BCM56996_B0_LBHDR_COUNT, bcm56996_b0_lbhdr_names, bcm56996_b0_lbhdr_fields};
+    return bcm56996_b0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c
index 0e2f538a370..83e3eef556c 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c
@@ -493,22 +493,6 @@ const bcmpkt_lbhdr_fget_t bcm56998_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -555,22 +539,6 @@ const bcmpkt_lbhdr_fset_t bcm56998_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -593,7 +561,6 @@ static shr_enum_map_t bcm56998_a0_lbhdr_view_types[] = {
 static int bcm56998_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.c
new file mode 100644
index 00000000000..b966cc00edd
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.c
@@ -0,0 +1,3097 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM56998_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_11_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 11;
+    return info;
+}
+
+static void
+field_fmt_0_11_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffff000) | (*val & 0xfff);
+}
+
+static void
+field_fmt_0_11_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_12_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 12;
+    return info;
+}
+
+static void
+field_fmt_0_12_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffe000) | (*val & 0x1fff);
+}
+
+static void
+field_fmt_0_12_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_3_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 3;
+    return info;
+}
+
+static void
+field_fmt_0_3_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_0_3_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_0_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe00) | (*val & 0x1ff);
+}
+
+static void
+field_fmt_0_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_100_100_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 100;
+    info.maxbit = 100;
+    return info;
+}
+
+static void
+field_fmt_100_100_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_100_100_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_103_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 103;
+    return info;
+}
+
+static void
+field_fmt_101_103_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffff1f) | ((*val & 0x7) << 5);
+}
+
+static void
+field_fmt_101_103_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_106_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 106;
+    return info;
+}
+
+static void
+field_fmt_101_106_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffff81f) | ((*val & 0x3f) << 5);
+}
+
+static void
+field_fmt_101_106_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_107_108_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 107;
+    info.maxbit = 108;
+    return info;
+}
+
+static void
+field_fmt_107_108_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffe7ff) | ((*val & 0x3) << 11);
+}
+
+static void
+field_fmt_107_108_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 11) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_109_110_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 109;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_109_110_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffff9fff) | ((*val & 0x3) << 13);
+}
+
+static void
+field_fmt_109_110_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 13) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_23_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_10_23_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xff0003ff) | ((*val & 0x3fff) << 10);
+}
+
+static void
+field_fmt_10_23_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_110_110_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 110;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_110_110_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_110_110_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_115_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 115;
+    return info;
+}
+
+static void
+field_fmt_111_115_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfff07fff) | ((*val & 0x1f) << 15);
+}
+
+static void
+field_fmt_111_115_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_125_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_111_125_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xc0007fff) | ((*val & 0x7fff) << 15);
+}
+
+static void
+field_fmt_111_125_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 15) & 0x7fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_116_119_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 116;
+    info.maxbit = 119;
+    return info;
+}
+
+static void
+field_fmt_116_119_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xff0fffff) | ((*val & 0xf) << 20);
+}
+
+static void
+field_fmt_116_119_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 20) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_11_14_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 11;
+    info.maxbit = 14;
+    return info;
+}
+
+static void
+field_fmt_11_14_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffff87ff) | ((*val & 0xf) << 11);
+}
+
+static void
+field_fmt_11_14_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 11) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_120_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_120_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_128_128_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 128;
+    info.maxbit = 128;
+    return info;
+}
+
+static void
+field_fmt_128_128_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_128_128_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[8] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_129_129_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 129;
+    info.maxbit = 129;
+    return info;
+}
+
+static void
+field_fmt_129_129_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_129_129_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_13_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 13;
+    return info;
+}
+
+static void
+field_fmt_12_13_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffcfff) | ((*val & 0x3) << 12);
+}
+
+static void
+field_fmt_12_13_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_15_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 15;
+    return info;
+}
+
+static void
+field_fmt_12_15_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffff0fff) | ((*val & 0xf) << 12);
+}
+
+static void
+field_fmt_12_15_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_130_130_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 130;
+    info.maxbit = 130;
+    return info;
+}
+
+static void
+field_fmt_130_130_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_130_130_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_131_138_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 131;
+    info.maxbit = 138;
+    return info;
+}
+
+static void
+field_fmt_131_138_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffff807) | ((*val & 0xff) << 3);
+}
+
+static void
+field_fmt_131_138_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 3) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_139_141_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 139;
+    info.maxbit = 141;
+    return info;
+}
+
+static void
+field_fmt_139_141_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffc7ff) | ((*val & 0x7) << 11);
+}
+
+static void
+field_fmt_139_141_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 11) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_142_142_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 142;
+    info.maxbit = 142;
+    return info;
+}
+
+static void
+field_fmt_142_142_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_142_142_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_143_145_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 143;
+    info.maxbit = 145;
+    return info;
+}
+
+static void
+field_fmt_143_145_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffc7fff) | ((*val & 0x7) << 15);
+}
+
+static void
+field_fmt_143_145_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 15) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_146_157_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 146;
+    info.maxbit = 157;
+    return info;
+}
+
+static void
+field_fmt_146_157_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xc003ffff) | ((*val & 0xfff) << 18);
+}
+
+static void
+field_fmt_146_157_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 18) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_14_21_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 14;
+    info.maxbit = 21;
+    return info;
+}
+
+static void
+field_fmt_14_21_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffc03fff) | ((*val & 0xff) << 14);
+}
+
+static void
+field_fmt_14_21_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 14) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_158_159_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 158;
+    info.maxbit = 159;
+    return info;
+}
+
+static void
+field_fmt_158_159_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_158_159_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_15_30_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 15;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_15_30_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x80007fff) | ((*val & 0xffff) << 15);
+}
+
+static void
+field_fmt_15_30_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 15) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_160_173_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 160;
+    info.maxbit = 173;
+    return info;
+}
+
+static void
+field_fmt_160_173_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffc000) | (*val & 0x3fff);
+}
+
+static void
+field_fmt_160_173_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[7] & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_16_16_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 16;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_16_16_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_16_16_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_174_174_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 174;
+    info.maxbit = 174;
+    return info;
+}
+
+static void
+field_fmt_174_174_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_174_174_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_175_191_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 175;
+    info.maxbit = 191;
+    return info;
+}
+
+static void
+field_fmt_175_191_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x7fff) | (*val << 15);
+}
+
+static void
+field_fmt_175_191_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 15) & 0x1ffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_192_192_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 192;
+    info.maxbit = 192;
+    return info;
+}
+
+static void
+field_fmt_192_192_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_192_192_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[6] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_193_212_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 193;
+    info.maxbit = 212;
+    return info;
+}
+
+static void
+field_fmt_193_212_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffe00001) | ((*val & 0xfffff) << 1);
+}
+
+static void
+field_fmt_193_212_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 1) & 0xfffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_213_213_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 213;
+    info.maxbit = 213;
+    return info;
+}
+
+static void
+field_fmt_213_213_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_213_213_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_214_222_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 214;
+    info.maxbit = 222;
+    return info;
+}
+
+static void
+field_fmt_214_222_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x803fffff) | ((*val & 0x1ff) << 22);
+}
+
+static void
+field_fmt_214_222_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 22) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_223_223_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 223;
+    info.maxbit = 223;
+    return info;
+}
+
+static void
+field_fmt_223_223_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_223_223_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_224_255_5_5_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 224;
+    info.maxbit = 255;
+    return info;
+}
+
+static void
+field_fmt_224_255_5_5_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[5] = *val;
+}
+
+static void
+field_fmt_224_255_5_5_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[5];
+}
+
+static bcmpkt_field_info_t
+field_fmt_22_27_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 22;
+    info.maxbit = 27;
+    return info;
+}
+
+static void
+field_fmt_22_27_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xf03fffff) | ((*val & 0x3f) << 22);
+}
+
+static void
+field_fmt_22_27_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 22) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_24_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 24;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_24_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_24_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_256_271_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 256;
+    info.maxbit = 271;
+    return info;
+}
+
+static void
+field_fmt_256_271_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_256_271_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[4] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_272_273_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 272;
+    info.maxbit = 273;
+    return info;
+}
+
+static void
+field_fmt_272_273_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_272_273_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_274_278_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 274;
+    info.maxbit = 278;
+    return info;
+}
+
+static void
+field_fmt_274_278_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff83ffff) | ((*val & 0x1f) << 18);
+}
+
+static void
+field_fmt_274_278_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 18) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_279_279_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 279;
+    info.maxbit = 279;
+    return info;
+}
+
+static void
+field_fmt_279_279_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_279_279_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_280_280_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 280;
+    info.maxbit = 280;
+    return info;
+}
+
+static void
+field_fmt_280_280_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_280_280_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_281_287_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 281;
+    info.maxbit = 287;
+    return info;
+}
+
+static void
+field_fmt_281_287_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0x1ffffff) | (*val << 25);
+}
+
+static void
+field_fmt_281_287_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 25) & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_288_415_3_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 288;
+    info.maxbit = 415;
+    return info;
+}
+
+static void
+field_fmt_288_415_3_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = val[0];
+    pmd[2] = val[1];
+    pmd[1] = val[2];
+    pmd[0] = val[3];
+}
+
+static void
+field_fmt_288_415_3_0_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[3];
+    val[1] = pmd[2];
+    val[2] = pmd[1];
+    val[3] = pmd[0];
+}
+
+static bcmpkt_field_info_t
+field_fmt_28_28_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 28;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_28_28_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_28_28_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[11] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_39_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_32_39_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_32_39_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_95_11_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_32_95_11_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = val[0];
+    pmd[10] = val[1];
+}
+
+static void
+field_fmt_32_95_11_10_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[11];
+    val[1] = pmd[10];
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_33_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 33;
+    return info;
+}
+
+static void
+field_fmt_33_33_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_33_33_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_34_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_33_34_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_33_34_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_34_34_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 34;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_34_34_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_34_34_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_38_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_35_38_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff87) | ((*val & 0xf) << 3);
+}
+
+static void
+field_fmt_35_38_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 3) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_36_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_36_36_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_36_36_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_38_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_38_38_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_38_38_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_39_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_39_39_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_39_39_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_40_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_39_40_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffe7f) | ((*val & 0x3) << 7);
+}
+
+static void
+field_fmt_39_40_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_40_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_40_40_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_40_40_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_40_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffc0ff) | ((*val & 0x3f) << 8);
+}
+
+static void
+field_fmt_40_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 8) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_41_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_41_41_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_41_41_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_54_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_41_54_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff8001ff) | ((*val & 0x3fff) << 9);
+}
+
+static void
+field_fmt_41_54_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 9) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_42_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_42_42_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_42_42_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_43_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_43_43_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_43_43_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_49_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 49;
+    return info;
+}
+
+static void
+field_fmt_48_49_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_48_49_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_48_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_48_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_4_5_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 4;
+    info.maxbit = 5;
+    return info;
+}
+
+static void
+field_fmt_4_5_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffffcf) | ((*val & 0x3) << 4);
+}
+
+static void
+field_fmt_4_5_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 4) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_50_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_50_50_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_50_50_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_51_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_51_51_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_51_51_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_52_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_52_52_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_52_52_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_52_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffcfffff) | ((*val & 0x3) << 20);
+}
+
+static void
+field_fmt_52_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_53_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_53_53_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_53_53_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_54_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_54_54_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_54_54_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_54_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff3fffff) | ((*val & 0x3) << 22);
+}
+
+static void
+field_fmt_54_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_55_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_55_55_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_55_55_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_67_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_55_67_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffff) | (*val << 23);
+    pmd[1] = (pmd[1] & 0xfffffff0) | ((*val >> 9) & 0xf);
+}
+
+static void
+field_fmt_55_67_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 23) | (pmd[1] << 9)) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_56_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 56;
+    return info;
+}
+
+static void
+field_fmt_56_56_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_56_56_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_58_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 58;
+    return info;
+}
+
+static void
+field_fmt_56_58_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf8ffffff) | ((*val & 0x7) << 24);
+}
+
+static void
+field_fmt_56_58_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 24) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_57_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 57;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_57_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_57_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_59_59_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 59;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_59_59_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf7ffffff) | ((*val & 0x1) << 27);
+}
+
+static void
+field_fmt_59_59_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 27) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_60_60_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 60;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_60_60_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_60_60_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_61_61_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 61;
+    info.maxbit = 61;
+    return info;
+}
+
+static void
+field_fmt_61_61_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_61_61_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_62_62_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 62;
+    info.maxbit = 62;
+    return info;
+}
+
+static void
+field_fmt_62_62_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_62_62_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_63_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_63_63_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_63_63_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_71_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_63_71_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31);
+    pmd[1] = (pmd[1] & 0xffffff00) | ((*val >> 1) & 0xff);
+}
+
+static void
+field_fmt_63_71_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 31) | (pmd[1] << 1)) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_64_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 64;
+    return info;
+}
+
+static void
+field_fmt_64_64_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_64_64_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[10] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_65_65_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 65;
+    info.maxbit = 65;
+    return info;
+}
+
+static void
+field_fmt_65_65_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_65_65_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_66_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 66;
+    return info;
+}
+
+static void
+field_fmt_66_66_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_66_66_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_67_67_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 67;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_67_67_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_67_67_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_69_69_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 69;
+    info.maxbit = 69;
+    return info;
+}
+
+static void
+field_fmt_69_69_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_69_69_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_70_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 70;
+    return info;
+}
+
+static void
+field_fmt_70_70_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_70_70_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_77_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 77;
+    return info;
+}
+
+static void
+field_fmt_70_77_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffc03f) | ((*val & 0xff) << 6);
+}
+
+static void
+field_fmt_70_77_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 6) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_71_71_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 71;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_71_71_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_71_71_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_72_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 72;
+    return info;
+}
+
+static void
+field_fmt_72_72_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_72_72_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_72_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_72_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_73_73_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 73;
+    info.maxbit = 73;
+    return info;
+}
+
+static void
+field_fmt_73_73_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_73_73_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_74_74_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 74;
+    info.maxbit = 74;
+    return info;
+}
+
+static void
+field_fmt_74_74_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_74_74_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_75_75_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 75;
+    info.maxbit = 75;
+    return info;
+}
+
+static void
+field_fmt_75_75_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_75_75_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_76_76_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 76;
+    info.maxbit = 76;
+    return info;
+}
+
+static void
+field_fmt_76_76_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_76_76_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_77_77_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 77;
+    info.maxbit = 77;
+    return info;
+}
+
+static void
+field_fmt_77_77_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_77_77_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_78_78_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 78;
+    info.maxbit = 78;
+    return info;
+}
+
+static void
+field_fmt_78_78_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_78_78_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_81_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_81_81_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_81_81_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_82_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_82_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_90_92_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 90;
+    info.maxbit = 92;
+    return info;
+}
+
+static void
+field_fmt_90_92_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xe3ffffff) | ((*val & 0x7) << 26);
+}
+
+static void
+field_fmt_90_92_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 26) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_93_93_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 93;
+    info.maxbit = 93;
+    return info;
+}
+
+static void
+field_fmt_93_93_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_93_93_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_94_109_1_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 94;
+    info.maxbit = 109;
+    return info;
+}
+
+static void
+field_fmt_94_109_1_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x3fffffff) | (*val << 30);
+    pmd[0] = (pmd[0] & 0xffffc000) | ((*val >> 2) & 0x3fff);
+}
+
+static void
+field_fmt_94_109_1_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[1] >> 30) | (pmd[0] << 2)) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_96_99_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 96;
+    info.maxbit = 99;
+    return info;
+}
+
+static void
+field_fmt_96_99_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_96_99_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[9] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_10_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 10;
+    return info;
+}
+
+static void
+field_fmt_9_10_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffff9ff) | ((*val & 0x3) << 9);
+}
+
+static void
+field_fmt_9_10_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x1;
+}
+
+static const shr_enum_map_t bcm56998_a0_rxpmd_timestamp_type_names[] =
+{
+    BCM56998_A0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56998_a0_rxpmd_fields[BCM56998_A0_RXPMD_COUNT] = {
+    {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0},
+    {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0},
+    {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0},
+    {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0},
+    {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0},
+    {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0},
+    {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0},
+    {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0},
+    {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0},
+    {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0},
+    {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0},
+    {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0},
+    {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0},
+    {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0},
+    {1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0},
+    {1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0},
+    {1, field_fmt_128_128_8_8_info, field_fmt_128_128_8_8_set, field_fmt_128_128_8_8_get, NULL, 0},
+    {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0},
+    {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0},
+    {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0},
+    {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0},
+    {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0},
+    {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0},
+    {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0},
+    {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0},
+    {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0},
+    {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0},
+    {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0},
+    {1, field_fmt_192_192_6_6_info, field_fmt_192_192_6_6_set, field_fmt_192_192_6_6_get, NULL, 0},
+    {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0},
+    {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0},
+    {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0},
+    {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0},
+    {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0},
+    {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0},
+    {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56998_a0_rxpmd_timestamp_type_names, 0},
+    {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0},
+    {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0},
+    {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0},
+    {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0},
+    {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56998_a0_rxpmd_names[] =
+{
+    BCM56998_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56998_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56998_a0_rxpmd_info = {13, BCM56998_A0_RXPMD_COUNT, bcm56998_a0_rxpmd_names, bcm56998_a0_rxpmd_fields};
+    return bcm56998_a0_rxpmd_info;
+}
+
+static const shr_enum_map_t bcm56998_a0_rx_reason_cpu_sflow_names[] =
+{
+    BCM56998_A0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56998_a0_rx_reason_mpls_proc_error_names[] =
+{
+    BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56998_a0_rx_reason_fields[BCM56998_A0_RX_REASON_COUNT] = {
+    {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0},
+    {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0},
+    {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0},
+    {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0},
+    {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0},
+    {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0},
+    {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0},
+    {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0},
+    {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0},
+    {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0},
+    {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0},
+    {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0},
+    {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0},
+    {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0},
+    {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0},
+    {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0},
+    {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56998_a0_rx_reason_cpu_sflow_names, 0},
+    {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0},
+    {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0},
+    {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0},
+    {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0},
+    {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0},
+    {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0},
+    {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56998_a0_rx_reason_mpls_proc_error_names, 0},
+    {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0},
+    {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0},
+    {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0},
+    {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0},
+    {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0},
+    {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0},
+    {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0},
+    {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0},
+    {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0},
+    {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0},
+    {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0},
+    {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0},
+    {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0},
+    {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0},
+    {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0},
+    {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0},
+    {1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0},
+    {1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0},
+    {1, field_fmt_77_77_10_10_info, field_fmt_77_77_10_10_set, field_fmt_77_77_10_10_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56998_a0_rx_reason_names[] =
+{
+    BCM56998_A0_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56998_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56998_a0_rx_reason_info = {13, BCM56998_A0_RX_REASON_COUNT, bcm56998_a0_rx_reason_names, bcm56998_a0_rx_reason_fields};
+    return bcm56998_a0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm56998_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56998_a0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56998_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm56998_a0_txpmd_header_type_names[] =
+{
+    BCM56998_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56998_a0_txpmd_start_names[] =
+{
+    BCM56998_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56998_a0_txpmd_fields[BCM56998_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0},
+    {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0},
+    {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0},
+    {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0},
+    {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0},
+    {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0},
+    {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0},
+    {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0},
+    {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0},
+    {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0},
+    {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0},
+    {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0},
+    {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0},
+    {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0},
+    {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56998_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56998_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm56998_a0_txpmd_names[] =
+{
+    BCM56998_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56998_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56998_a0_txpmd_info = {4, BCM56998_A0_TXPMD_COUNT, bcm56998_a0_txpmd_names, bcm56998_a0_txpmd_fields};
+    return bcm56998_a0_txpmd_info;
+}
+
+static const shr_enum_map_t bcm56998_a0_lbhdr_ethernet_subflow_type_names[] =
+{
+    BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56998_a0_lbhdr_ethernet_destination_type_names[] =
+{
+    BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56998_a0_lbhdr_header_type_names[] =
+{
+    BCM56998_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56998_a0_lbhdr_fields[BCM56998_A0_LBHDR_COUNT] = {
+    {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3},
+    {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56998_a0_lbhdr_ethernet_subflow_type_names, 3},
+    {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56998_a0_lbhdr_ethernet_destination_type_names, 3},
+    {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3},
+    {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3},
+    {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3},
+    {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3},
+    {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3},
+    {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3},
+    {1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3},
+    {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3},
+    {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3},
+    {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3},
+    {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1},
+    {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0},
+    {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0},
+    {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0},
+    {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0},
+    {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56998_a0_lbhdr_header_type_names, 0},
+    {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0},
+    {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56998_a0_lbhdr_names[] =
+{
+    BCM56998_A0_LBHDR_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56998_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56998_a0_lbhdr_info = {4, BCM56998_A0_LBHDR_COUNT, bcm56998_a0_lbhdr_names, bcm56998_a0_lbhdr_fields};
+    return bcm56998_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c
index c2870f507f6..f085fab81a2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c
@@ -493,22 +493,6 @@ const bcmpkt_lbhdr_fget_t bcm56999_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -555,22 +539,6 @@ const bcmpkt_lbhdr_fset_t bcm56999_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -593,7 +561,6 @@ static shr_enum_map_t bcm56999_a0_lbhdr_view_types[] = {
 static int bcm56999_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.c
new file mode 100644
index 00000000000..318177e9982
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.c
@@ -0,0 +1,3031 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM56999_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_11_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 11;
+    return info;
+}
+
+static void
+field_fmt_0_11_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffff000) | (*val & 0xfff);
+}
+
+static void
+field_fmt_0_11_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_12_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 12;
+    return info;
+}
+
+static void
+field_fmt_0_12_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffe000) | (*val & 0x1fff);
+}
+
+static void
+field_fmt_0_12_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_3_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 3;
+    return info;
+}
+
+static void
+field_fmt_0_3_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_0_3_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_0_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe00) | (*val & 0x1ff);
+}
+
+static void
+field_fmt_0_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_100_100_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 100;
+    info.maxbit = 100;
+    return info;
+}
+
+static void
+field_fmt_100_100_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_100_100_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_103_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 103;
+    return info;
+}
+
+static void
+field_fmt_101_103_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffff1f) | ((*val & 0x7) << 5);
+}
+
+static void
+field_fmt_101_103_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_101_106_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 101;
+    info.maxbit = 106;
+    return info;
+}
+
+static void
+field_fmt_101_106_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffff81f) | ((*val & 0x3f) << 5);
+}
+
+static void
+field_fmt_101_106_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 5) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_107_108_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 107;
+    info.maxbit = 108;
+    return info;
+}
+
+static void
+field_fmt_107_108_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffffe7ff) | ((*val & 0x3) << 11);
+}
+
+static void
+field_fmt_107_108_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 11) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_109_110_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 109;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_109_110_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xffff9fff) | ((*val & 0x3) << 13);
+}
+
+static void
+field_fmt_109_110_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 13) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_23_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_10_23_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xff0003ff) | ((*val & 0x3fff) << 10);
+}
+
+static void
+field_fmt_10_23_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_110_110_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 110;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_110_110_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_110_110_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_115_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 115;
+    return info;
+}
+
+static void
+field_fmt_111_115_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfff07fff) | ((*val & 0x1f) << 15);
+}
+
+static void
+field_fmt_111_115_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_125_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_111_125_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xc0007fff) | ((*val & 0x7fff) << 15);
+}
+
+static void
+field_fmt_111_125_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 15) & 0x7fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_116_119_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 116;
+    info.maxbit = 119;
+    return info;
+}
+
+static void
+field_fmt_116_119_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xff0fffff) | ((*val & 0xf) << 20);
+}
+
+static void
+field_fmt_116_119_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 20) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_11_14_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 11;
+    info.maxbit = 14;
+    return info;
+}
+
+static void
+field_fmt_11_14_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffff87ff) | ((*val & 0xf) << 11);
+}
+
+static void
+field_fmt_11_14_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 11) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_120_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_120_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_129_129_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 129;
+    info.maxbit = 129;
+    return info;
+}
+
+static void
+field_fmt_129_129_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_129_129_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_13_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 13;
+    return info;
+}
+
+static void
+field_fmt_12_13_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffcfff) | ((*val & 0x3) << 12);
+}
+
+static void
+field_fmt_12_13_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_15_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 15;
+    return info;
+}
+
+static void
+field_fmt_12_15_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffff0fff) | ((*val & 0xf) << 12);
+}
+
+static void
+field_fmt_12_15_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_130_130_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 130;
+    info.maxbit = 130;
+    return info;
+}
+
+static void
+field_fmt_130_130_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_130_130_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_131_138_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 131;
+    info.maxbit = 138;
+    return info;
+}
+
+static void
+field_fmt_131_138_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffff807) | ((*val & 0xff) << 3);
+}
+
+static void
+field_fmt_131_138_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 3) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_139_141_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 139;
+    info.maxbit = 141;
+    return info;
+}
+
+static void
+field_fmt_139_141_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffc7ff) | ((*val & 0x7) << 11);
+}
+
+static void
+field_fmt_139_141_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 11) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_142_142_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 142;
+    info.maxbit = 142;
+    return info;
+}
+
+static void
+field_fmt_142_142_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_142_142_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_143_145_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 143;
+    info.maxbit = 145;
+    return info;
+}
+
+static void
+field_fmt_143_145_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffc7fff) | ((*val & 0x7) << 15);
+}
+
+static void
+field_fmt_143_145_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 15) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_146_157_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 146;
+    info.maxbit = 157;
+    return info;
+}
+
+static void
+field_fmt_146_157_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xc003ffff) | ((*val & 0xfff) << 18);
+}
+
+static void
+field_fmt_146_157_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 18) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_14_21_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 14;
+    info.maxbit = 21;
+    return info;
+}
+
+static void
+field_fmt_14_21_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffc03fff) | ((*val & 0xff) << 14);
+}
+
+static void
+field_fmt_14_21_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 14) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_158_159_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 158;
+    info.maxbit = 159;
+    return info;
+}
+
+static void
+field_fmt_158_159_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_158_159_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_15_30_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 15;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_15_30_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x80007fff) | ((*val & 0xffff) << 15);
+}
+
+static void
+field_fmt_15_30_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 15) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_160_173_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 160;
+    info.maxbit = 173;
+    return info;
+}
+
+static void
+field_fmt_160_173_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffc000) | (*val & 0x3fff);
+}
+
+static void
+field_fmt_160_173_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[7] & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_16_16_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 16;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_16_16_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_16_16_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_174_174_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 174;
+    info.maxbit = 174;
+    return info;
+}
+
+static void
+field_fmt_174_174_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_174_174_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_175_191_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 175;
+    info.maxbit = 191;
+    return info;
+}
+
+static void
+field_fmt_175_191_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x7fff) | (*val << 15);
+}
+
+static void
+field_fmt_175_191_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 15) & 0x1ffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_193_212_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 193;
+    info.maxbit = 212;
+    return info;
+}
+
+static void
+field_fmt_193_212_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffe00001) | ((*val & 0xfffff) << 1);
+}
+
+static void
+field_fmt_193_212_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 1) & 0xfffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_213_213_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 213;
+    info.maxbit = 213;
+    return info;
+}
+
+static void
+field_fmt_213_213_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_213_213_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_214_222_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 214;
+    info.maxbit = 222;
+    return info;
+}
+
+static void
+field_fmt_214_222_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x803fffff) | ((*val & 0x1ff) << 22);
+}
+
+static void
+field_fmt_214_222_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 22) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_223_223_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 223;
+    info.maxbit = 223;
+    return info;
+}
+
+static void
+field_fmt_223_223_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_223_223_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_224_255_5_5_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 224;
+    info.maxbit = 255;
+    return info;
+}
+
+static void
+field_fmt_224_255_5_5_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[5] = *val;
+}
+
+static void
+field_fmt_224_255_5_5_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[5];
+}
+
+static bcmpkt_field_info_t
+field_fmt_22_27_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 22;
+    info.maxbit = 27;
+    return info;
+}
+
+static void
+field_fmt_22_27_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xf03fffff) | ((*val & 0x3f) << 22);
+}
+
+static void
+field_fmt_22_27_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 22) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_24_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 24;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_24_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff) | (*val << 24);
+}
+
+static void
+field_fmt_24_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 24) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_256_271_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 256;
+    info.maxbit = 271;
+    return info;
+}
+
+static void
+field_fmt_256_271_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_256_271_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[4] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_272_273_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 272;
+    info.maxbit = 273;
+    return info;
+}
+
+static void
+field_fmt_272_273_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_272_273_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_274_278_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 274;
+    info.maxbit = 278;
+    return info;
+}
+
+static void
+field_fmt_274_278_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff83ffff) | ((*val & 0x1f) << 18);
+}
+
+static void
+field_fmt_274_278_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 18) & 0x1f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_279_279_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 279;
+    info.maxbit = 279;
+    return info;
+}
+
+static void
+field_fmt_279_279_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_279_279_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_280_280_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 280;
+    info.maxbit = 280;
+    return info;
+}
+
+static void
+field_fmt_280_280_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_280_280_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_281_287_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 281;
+    info.maxbit = 287;
+    return info;
+}
+
+static void
+field_fmt_281_287_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0x1ffffff) | (*val << 25);
+}
+
+static void
+field_fmt_281_287_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 25) & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_288_415_3_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 288;
+    info.maxbit = 415;
+    return info;
+}
+
+static void
+field_fmt_288_415_3_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = val[0];
+    pmd[2] = val[1];
+    pmd[1] = val[2];
+    pmd[0] = val[3];
+}
+
+static void
+field_fmt_288_415_3_0_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[3];
+    val[1] = pmd[2];
+    val[2] = pmd[1];
+    val[3] = pmd[0];
+}
+
+static bcmpkt_field_info_t
+field_fmt_28_28_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 28;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_28_28_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_28_28_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[11] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_39_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_32_39_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_32_39_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_95_11_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_32_95_11_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = val[0];
+    pmd[10] = val[1];
+}
+
+static void
+field_fmt_32_95_11_10_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[11];
+    val[1] = pmd[10];
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_33_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 33;
+    return info;
+}
+
+static void
+field_fmt_33_33_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_33_33_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_34_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_33_34_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_33_34_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_34_34_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 34;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_34_34_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_34_34_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_38_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_35_38_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff87) | ((*val & 0xf) << 3);
+}
+
+static void
+field_fmt_35_38_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 3) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_36_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_36_36_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_36_36_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_38_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_38_38_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_38_38_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_39_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_39_39_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_39_39_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_40_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_39_40_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffe7f) | ((*val & 0x3) << 7);
+}
+
+static void
+field_fmt_39_40_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_40_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_40_40_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_40_40_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_40_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffc0ff) | ((*val & 0x3f) << 8);
+}
+
+static void
+field_fmt_40_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 8) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_41_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_41_41_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_41_41_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_54_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_41_54_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff8001ff) | ((*val & 0x3fff) << 9);
+}
+
+static void
+field_fmt_41_54_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 9) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_42_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_42_42_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_42_42_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_43_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_43_43_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_43_43_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_49_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 49;
+    return info;
+}
+
+static void
+field_fmt_48_49_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_48_49_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_48_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_48_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_4_5_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 4;
+    info.maxbit = 5;
+    return info;
+}
+
+static void
+field_fmt_4_5_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffffcf) | ((*val & 0x3) << 4);
+}
+
+static void
+field_fmt_4_5_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 4) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_50_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_50_50_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_50_50_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_51_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_51_51_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_51_51_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_52_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_52_52_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_52_52_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_52_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffcfffff) | ((*val & 0x3) << 20);
+}
+
+static void
+field_fmt_52_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_53_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_53_53_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_53_53_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_54_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_54_54_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_54_54_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_54_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff3fffff) | ((*val & 0x3) << 22);
+}
+
+static void
+field_fmt_54_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_55_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_55_55_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_55_55_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_67_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_55_67_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffff) | (*val << 23);
+    pmd[1] = (pmd[1] & 0xfffffff0) | ((*val >> 9) & 0xf);
+}
+
+static void
+field_fmt_55_67_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 23) | (pmd[1] << 9)) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_56_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 56;
+    return info;
+}
+
+static void
+field_fmt_56_56_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_56_56_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_58_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 58;
+    return info;
+}
+
+static void
+field_fmt_56_58_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf8ffffff) | ((*val & 0x7) << 24);
+}
+
+static void
+field_fmt_56_58_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 24) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_57_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 57;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_57_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_57_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_59_59_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 59;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_59_59_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xf7ffffff) | ((*val & 0x1) << 27);
+}
+
+static void
+field_fmt_59_59_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 27) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_60_60_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 60;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_60_60_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_60_60_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_61_61_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 61;
+    info.maxbit = 61;
+    return info;
+}
+
+static void
+field_fmt_61_61_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_61_61_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_62_62_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 62;
+    info.maxbit = 62;
+    return info;
+}
+
+static void
+field_fmt_62_62_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_62_62_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_63_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_63_63_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_63_63_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_71_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_63_71_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31);
+    pmd[1] = (pmd[1] & 0xffffff00) | ((*val >> 1) & 0xff);
+}
+
+static void
+field_fmt_63_71_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 31) | (pmd[1] << 1)) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_64_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 64;
+    return info;
+}
+
+static void
+field_fmt_64_64_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_64_64_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[10] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_65_65_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 65;
+    info.maxbit = 65;
+    return info;
+}
+
+static void
+field_fmt_65_65_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_65_65_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_66_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 66;
+    return info;
+}
+
+static void
+field_fmt_66_66_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_66_66_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_67_67_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 67;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_67_67_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_67_67_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_69_69_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 69;
+    info.maxbit = 69;
+    return info;
+}
+
+static void
+field_fmt_69_69_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_69_69_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_70_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 70;
+    return info;
+}
+
+static void
+field_fmt_70_70_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_70_70_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_70_77_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 70;
+    info.maxbit = 77;
+    return info;
+}
+
+static void
+field_fmt_70_77_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffc03f) | ((*val & 0xff) << 6);
+}
+
+static void
+field_fmt_70_77_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 6) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_71_71_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 71;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_71_71_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_71_71_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_72_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 72;
+    return info;
+}
+
+static void
+field_fmt_72_72_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_72_72_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_72_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_72_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_73_73_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 73;
+    info.maxbit = 73;
+    return info;
+}
+
+static void
+field_fmt_73_73_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_73_73_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_74_74_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 74;
+    info.maxbit = 74;
+    return info;
+}
+
+static void
+field_fmt_74_74_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_74_74_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_75_75_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 75;
+    info.maxbit = 75;
+    return info;
+}
+
+static void
+field_fmt_75_75_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_75_75_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_76_76_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 76;
+    info.maxbit = 76;
+    return info;
+}
+
+static void
+field_fmt_76_76_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_76_76_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_78_78_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 78;
+    info.maxbit = 78;
+    return info;
+}
+
+static void
+field_fmt_78_78_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_78_78_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_81_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_81_81_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_81_81_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_82_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_82_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_90_92_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 90;
+    info.maxbit = 92;
+    return info;
+}
+
+static void
+field_fmt_90_92_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xe3ffffff) | ((*val & 0x7) << 26);
+}
+
+static void
+field_fmt_90_92_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 26) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_93_93_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 93;
+    info.maxbit = 93;
+    return info;
+}
+
+static void
+field_fmt_93_93_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_93_93_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_94_109_1_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 94;
+    info.maxbit = 109;
+    return info;
+}
+
+static void
+field_fmt_94_109_1_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x3fffffff) | (*val << 30);
+    pmd[0] = (pmd[0] & 0xffffc000) | ((*val >> 2) & 0x3fff);
+}
+
+static void
+field_fmt_94_109_1_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[1] >> 30) | (pmd[0] << 2)) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_96_99_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 96;
+    info.maxbit = 99;
+    return info;
+}
+
+static void
+field_fmt_96_99_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_96_99_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[9] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_10_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 10;
+    return info;
+}
+
+static void
+field_fmt_9_10_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffff9ff) | ((*val & 0x3) << 9);
+}
+
+static void
+field_fmt_9_10_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x1;
+}
+
+static const shr_enum_map_t bcm56999_a0_rxpmd_timestamp_type_names[] =
+{
+    BCM56999_A0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56999_a0_rxpmd_fields[BCM56999_A0_RXPMD_COUNT] = {
+    {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0},
+    {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0},
+    {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0},
+    {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0},
+    {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0},
+    {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0},
+    {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0},
+    {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0},
+    {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0},
+    {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0},
+    {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0},
+    {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0},
+    {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0},
+    {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0},
+    {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0},
+    {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0},
+    {1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0},
+    {1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0},
+    {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0},
+    {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0},
+    {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0},
+    {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0},
+    {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0},
+    {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0},
+    {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0},
+    {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0},
+    {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0},
+    {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0},
+    {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0},
+    {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0},
+    {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0},
+    {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0},
+    {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0},
+    {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0},
+    {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0},
+    {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56999_a0_rxpmd_timestamp_type_names, 0},
+    {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0},
+    {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0},
+    {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0},
+    {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0},
+    {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56999_a0_rxpmd_names[] =
+{
+    BCM56999_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56999_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56999_a0_rxpmd_info = {13, BCM56999_A0_RXPMD_COUNT, bcm56999_a0_rxpmd_names, bcm56999_a0_rxpmd_fields};
+    return bcm56999_a0_rxpmd_info;
+}
+
+static const shr_enum_map_t bcm56999_a0_rx_reason_cpu_sflow_names[] =
+{
+    BCM56999_A0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56999_a0_rx_reason_mpls_proc_error_names[] =
+{
+    BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56999_a0_rx_reason_fields[BCM56999_A0_RX_REASON_COUNT] = {
+    {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0},
+    {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0},
+    {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0},
+    {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0},
+    {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0},
+    {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0},
+    {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0},
+    {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0},
+    {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0},
+    {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0},
+    {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0},
+    {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0},
+    {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0},
+    {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0},
+    {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0},
+    {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0},
+    {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56999_a0_rx_reason_cpu_sflow_names, 0},
+    {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0},
+    {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0},
+    {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0},
+    {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0},
+    {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0},
+    {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0},
+    {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56999_a0_rx_reason_mpls_proc_error_names, 0},
+    {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0},
+    {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0},
+    {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0},
+    {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0},
+    {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0},
+    {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0},
+    {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0},
+    {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0},
+    {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0},
+    {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0},
+    {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0},
+    {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0},
+    {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0},
+    {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0},
+    {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0},
+    {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0},
+    {1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0},
+    {1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56999_a0_rx_reason_names[] =
+{
+    BCM56999_A0_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56999_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56999_a0_rx_reason_info = {13, BCM56999_A0_RX_REASON_COUNT, bcm56999_a0_rx_reason_names, bcm56999_a0_rx_reason_fields};
+    return bcm56999_a0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm56999_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56999_a0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm56999_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm56999_a0_txpmd_header_type_names[] =
+{
+    BCM56999_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56999_a0_txpmd_start_names[] =
+{
+    BCM56999_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56999_a0_txpmd_fields[BCM56999_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0},
+    {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0},
+    {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0},
+    {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0},
+    {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0},
+    {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0},
+    {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0},
+    {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0},
+    {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0},
+    {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0},
+    {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0},
+    {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0},
+    {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0},
+    {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0},
+    {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56999_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56999_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm56999_a0_txpmd_names[] =
+{
+    BCM56999_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56999_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56999_a0_txpmd_info = {4, BCM56999_A0_TXPMD_COUNT, bcm56999_a0_txpmd_names, bcm56999_a0_txpmd_fields};
+    return bcm56999_a0_txpmd_info;
+}
+
+static const shr_enum_map_t bcm56999_a0_lbhdr_ethernet_subflow_type_names[] =
+{
+    BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56999_a0_lbhdr_ethernet_destination_type_names[] =
+{
+    BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm56999_a0_lbhdr_header_type_names[] =
+{
+    BCM56999_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm56999_a0_lbhdr_fields[BCM56999_A0_LBHDR_COUNT] = {
+    {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3},
+    {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56999_a0_lbhdr_ethernet_subflow_type_names, 3},
+    {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56999_a0_lbhdr_ethernet_destination_type_names, 3},
+    {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3},
+    {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3},
+    {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3},
+    {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3},
+    {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3},
+    {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3},
+    {1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3},
+    {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3},
+    {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3},
+    {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3},
+    {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2},
+    {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1},
+    {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1},
+    {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0},
+    {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0},
+    {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0},
+    {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0},
+    {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56999_a0_lbhdr_header_type_names, 0},
+    {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0},
+    {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm56999_a0_lbhdr_names[] =
+{
+    BCM56999_A0_LBHDR_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm56999_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm56999_a0_lbhdr_info = {4, BCM56999_A0_LBHDR_COUNT, bcm56999_a0_lbhdr_names, bcm56999_a0_lbhdr_fields};
+    return bcm56999_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c
index fd8db6259be..a4c4aed11a6 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c
@@ -73,22 +73,6 @@ const bcmpkt_lbhdr_fget_t bcm78800_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -135,22 +119,6 @@ const bcmpkt_lbhdr_fset_t bcm78800_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -168,7 +136,6 @@ static shr_enum_map_t bcm78800_a0_lbhdr_view_types[] = {
 
 /* -2: unsupported, -1: global, others: view's value */
 static int bcm78800_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2,
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c
index c9e685ec968..eb09375b09b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c
@@ -34,6 +34,10 @@
 #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
 #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
 
+#define RXPMD_FIXED_WORD_COUNT   4
+
+extern const bcmpkt_rxpmd_fget_t bcm78800_a0_rxpmd_fget;
+
 int bcm78800_a0_rxpmd_flex_fget(uint32_t *data,
                                 bcmpkt_flex_field_metadata_t *fld_info,
                                 int prof,
@@ -47,6 +51,16 @@ int bcm78800_a0_rxpmd_flex_fget(uint32_t *data,
     uint32_t high_bit = maxbit - (minword * 32);
     uint32_t diff = high_bit - low_bit;
     uint32_t index = hdr_words - minword - 1;
+    /*
+     * data - points to beginning of RXPMD flex data.
+     * rxpmd_data - points to beginning of RXPMD data.
+     * First 4 words of RXPMD header are fixed words and the subsequent
+     * 14 words are flex words.
+     */
+    uint32_t *rxpmd_data = data - RXPMD_FIXED_WORD_COUNT;
+    uint32_t egr_recirc_profile_index = 0;
+    uint32_t cpu_dma_header_subtype = 0;
+    uint32_t rxpmd_header_ver = 0;
 
     /* Profile not valid for this field. */
     if ((minbit == 0xFFFFFFFF) ||
@@ -54,6 +68,22 @@ int bcm78800_a0_rxpmd_flex_fget(uint32_t *data,
         return SHR_E_PARAM;
     }
 
+    /*
+     * RXPMD flex word data[0] is set by the EPOST.
+     * cpu_dma_header_subtype = data[0][31:28].
+     * egr_recirc_profile_index = data[0][27:24].
+     */
+    if (sal_strcmp(fld_info->name, "DROP_CODE_15_0") == 0) {
+        rxpmd_header_ver = bcm78800_a0_rxpmd_fget.fget[BCMPKT_RXPMD_DMA_HEADER_VERSION](rxpmd_data);
+        if (rxpmd_header_ver == 1) {
+            cpu_dma_header_subtype = WORD_FIELD_GET(data[0], 28, 4);
+            egr_recirc_profile_index =  WORD_FIELD_GET(data[0], 24, 4);
+            if ((cpu_dma_header_subtype & 0x2) && (egr_recirc_profile_index%2)) {
+                index = 2;
+            }
+        }
+    }
+
     /* Skip fields with minbit >= 448.*/
     if (minbit >= 448) {
         *val = 0;
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.c
new file mode 100644
index 00000000000..fc13a41f672
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.c
@@ -0,0 +1,1301 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM78800_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_447_17_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 447;
+    return info;
+}
+
+static void
+field_fmt_0_447_17_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[17] = val[0];
+    pmd[16] = val[1];
+    pmd[15] = val[2];
+    pmd[14] = val[3];
+    pmd[13] = val[4];
+    pmd[12] = val[5];
+    pmd[11] = val[6];
+    pmd[10] = val[7];
+    pmd[9] = val[8];
+    pmd[8] = val[9];
+    pmd[7] = val[10];
+    pmd[6] = val[11];
+    pmd[5] = val[12];
+    pmd[4] = val[13];
+}
+
+static void
+field_fmt_0_447_17_4_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[17];
+    val[1] = pmd[16];
+    val[2] = pmd[15];
+    val[3] = pmd[14];
+    val[4] = pmd[13];
+    val[5] = pmd[12];
+    val[6] = pmd[11];
+    val[7] = pmd[10];
+    val[8] = pmd[9];
+    val[9] = pmd[8];
+    val[10] = pmd[7];
+    val[11] = pmd[6];
+    val[12] = pmd[5];
+    val[13] = pmd[4];
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_0_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe00) | (*val & 0x1ff);
+}
+
+static void
+field_fmt_0_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_10_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 10;
+    return info;
+}
+
+static void
+field_fmt_10_10_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_10_10_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_11_24_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 11;
+    info.maxbit = 24;
+    return info;
+}
+
+static void
+field_fmt_11_24_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfe0007ff) | ((*val & 0x3fff) << 11);
+}
+
+static void
+field_fmt_11_24_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 11) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_25_25_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 25;
+    info.maxbit = 25;
+    return info;
+}
+
+static void
+field_fmt_25_25_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfdffffff) | ((*val & 0x1) << 25);
+}
+
+static void
+field_fmt_25_25_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 25) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_26_26_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 26;
+    info.maxbit = 26;
+    return info;
+}
+
+static void
+field_fmt_26_26_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfbffffff) | ((*val & 0x1) << 26);
+}
+
+static void
+field_fmt_26_26_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 26) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_36_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_36_36_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_36_36_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_38_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_37_38_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff9f) | ((*val & 0x3) << 5);
+}
+
+static void
+field_fmt_37_38_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 5) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_44_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_39_44_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffe07f) | ((*val & 0x3f) << 7);
+}
+
+static void
+field_fmt_39_44_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_449_454_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 449;
+    info.maxbit = 454;
+    return info;
+}
+
+static void
+field_fmt_449_454_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff81) | ((*val & 0x3f) << 1);
+}
+
+static void
+field_fmt_449_454_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 1) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_455_455_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 455;
+    info.maxbit = 455;
+    return info;
+}
+
+static void
+field_fmt_455_455_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_455_455_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_456_459_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 456;
+    info.maxbit = 459;
+    return info;
+}
+
+static void
+field_fmt_456_459_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffff0ff) | ((*val & 0xf) << 8);
+}
+
+static void
+field_fmt_456_459_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 8) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_460_462_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 460;
+    info.maxbit = 462;
+    return info;
+}
+
+static void
+field_fmt_460_462_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffff8fff) | ((*val & 0x7) << 12);
+}
+
+static void
+field_fmt_460_462_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 12) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_464_465_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 464;
+    info.maxbit = 465;
+    return info;
+}
+
+static void
+field_fmt_464_465_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_464_465_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_466_467_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 466;
+    info.maxbit = 467;
+    return info;
+}
+
+static void
+field_fmt_466_467_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfff3ffff) | ((*val & 0x3) << 18);
+}
+
+static void
+field_fmt_466_467_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 18) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_468_468_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 468;
+    info.maxbit = 468;
+    return info;
+}
+
+static void
+field_fmt_468_468_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_468_468_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_469_469_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 469;
+    info.maxbit = 469;
+    return info;
+}
+
+static void
+field_fmt_469_469_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_469_469_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_470_470_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 470;
+    info.maxbit = 470;
+    return info;
+}
+
+static void
+field_fmt_470_470_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_470_470_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_471_478_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 471;
+    info.maxbit = 478;
+    return info;
+}
+
+static void
+field_fmt_471_478_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x807fffff) | ((*val & 0xff) << 23);
+}
+
+static void
+field_fmt_471_478_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 23) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_480_511_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 480;
+    info.maxbit = 511;
+    return info;
+}
+
+static void
+field_fmt_480_511_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = *val;
+}
+
+static void
+field_fmt_480_511_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2];
+}
+
+static bcmpkt_field_info_t
+field_fmt_48_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 48;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_48_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_48_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_512_527_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 512;
+    info.maxbit = 527;
+    return info;
+}
+
+static void
+field_fmt_512_527_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_512_527_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[1] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_528_543_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 528;
+    info.maxbit = 543;
+    return info;
+}
+
+static void
+field_fmt_528_543_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff) | (*val << 16);
+}
+
+static void
+field_fmt_528_543_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_52_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffcfffff) | ((*val & 0x3) << 20);
+}
+
+static void
+field_fmt_52_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_544_545_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 544;
+    info.maxbit = 545;
+    return info;
+}
+
+static void
+field_fmt_544_545_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffffffc) | (*val & 0x3);
+}
+
+static void
+field_fmt_544_545_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[0] & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_546_551_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 546;
+    info.maxbit = 551;
+    return info;
+}
+
+static void
+field_fmt_546_551_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffff03) | ((*val & 0x3f) << 2);
+}
+
+static void
+field_fmt_546_551_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 2) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_55_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 55;
+    return info;
+}
+
+static void
+field_fmt_54_55_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xff3fffff) | ((*val & 0x3) << 22);
+}
+
+static void
+field_fmt_54_55_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_552_552_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 552;
+    info.maxbit = 552;
+    return info;
+}
+
+static void
+field_fmt_552_552_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_552_552_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_553_556_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 553;
+    info.maxbit = 556;
+    return info;
+}
+
+static void
+field_fmt_553_556_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffe1ff) | ((*val & 0xf) << 9);
+}
+
+static void
+field_fmt_553_556_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 9) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_557_557_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 557;
+    info.maxbit = 557;
+    return info;
+}
+
+static void
+field_fmt_557_557_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_557_557_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_558_558_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 558;
+    info.maxbit = 558;
+    return info;
+}
+
+static void
+field_fmt_558_558_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_558_558_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_559_559_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 559;
+    info.maxbit = 559;
+    return info;
+}
+
+static void
+field_fmt_559_559_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_559_559_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_560_575_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 560;
+    info.maxbit = 575;
+    return info;
+}
+
+static void
+field_fmt_560_575_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff) | (*val << 16);
+}
+
+static void
+field_fmt_560_575_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 16) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_56_56_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 56;
+    info.maxbit = 56;
+    return info;
+}
+
+static void
+field_fmt_56_56_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_56_56_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_57_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 57;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_57_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_57_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_71_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 71;
+    return info;
+}
+
+static void
+field_fmt_64_71_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_64_71_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[1] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_72_79_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 72;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_72_79_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff00ff) | ((*val & 0xff) << 8);
+}
+
+static void
+field_fmt_72_79_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 8) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_80_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_80_80_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_80_80_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_81_81_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 81;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_81_81_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_81_81_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_82_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_82_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_85_85_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 85;
+    info.maxbit = 85;
+    return info;
+}
+
+static void
+field_fmt_85_85_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_85_85_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_86_86_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 86;
+    info.maxbit = 86;
+    return info;
+}
+
+static void
+field_fmt_86_86_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_86_86_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_87_94_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 87;
+    info.maxbit = 94;
+    return info;
+}
+
+static void
+field_fmt_87_94_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x807fffff) | ((*val & 0xff) << 23);
+}
+
+static void
+field_fmt_87_94_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 23) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_95_95_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 95;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_95_95_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_95_95_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_96_101_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 96;
+    info.maxbit = 101;
+    return info;
+}
+
+static void
+field_fmt_96_101_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffffffc0) | (*val & 0x3f);
+}
+
+static void
+field_fmt_96_101_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[0] & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0x1;
+}
+
+static bcmpkt_pmd_field_t bcm78800_a0_rxpmd_fields[BCM78800_A0_RXPMD_COUNT] = {
+    {14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0},
+    {1, field_fmt_449_454_3_3_info, field_fmt_449_454_3_3_set, field_fmt_449_454_3_3_get, NULL, 0},
+    {1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0},
+    {1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0},
+    {1, field_fmt_460_462_3_3_info, field_fmt_460_462_3_3_set, field_fmt_460_462_3_3_get, NULL, 0},
+    {1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0},
+    {1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0},
+    {1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0},
+    {1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0},
+    {1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0},
+    {1, field_fmt_471_478_3_3_info, field_fmt_471_478_3_3_set, field_fmt_471_478_3_3_get, NULL, 0},
+    {1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0},
+    {1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0},
+    {1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0},
+    {1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0},
+    {1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0},
+    {1, field_fmt_552_552_0_0_info, field_fmt_552_552_0_0_set, field_fmt_552_552_0_0_get, NULL, 0},
+    {1, field_fmt_553_556_0_0_info, field_fmt_553_556_0_0_set, field_fmt_553_556_0_0_get, NULL, 0},
+    {1, field_fmt_557_557_0_0_info, field_fmt_557_557_0_0_set, field_fmt_557_557_0_0_get, NULL, 0},
+    {1, field_fmt_558_558_0_0_info, field_fmt_558_558_0_0_set, field_fmt_558_558_0_0_get, NULL, 0},
+    {1, field_fmt_559_559_0_0_info, field_fmt_559_559_0_0_set, field_fmt_559_559_0_0_get, NULL, 0},
+    {1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm78800_a0_rxpmd_names[] =
+{
+    BCM78800_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78800_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78800_a0_rxpmd_info = {18, BCM78800_A0_RXPMD_COUNT, bcm78800_a0_rxpmd_names, bcm78800_a0_rxpmd_fields};
+    return bcm78800_a0_rxpmd_info;
+}
+
+bcmpkt_pmd_info_t bcm78800_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78800_a0_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm78800_a0_rx_reason_info;
+}
+
+bcmpkt_pmd_info_t bcm78800_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78800_a0_ep_rx_reason_info = {0, 0, NULL, NULL};
+    return bcm78800_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm78800_a0_txpmd_header_type_names[] =
+{
+    BCM78800_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78800_a0_txpmd_start_names[] =
+{
+    BCM78800_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm78800_a0_txpmd_fields[BCM78800_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 0},
+    {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0},
+    {1, field_fmt_10_10_3_3_info, field_fmt_10_10_3_3_set, field_fmt_10_10_3_3_get, NULL, 0},
+    {1, field_fmt_11_24_3_3_info, field_fmt_11_24_3_3_set, field_fmt_11_24_3_3_get, NULL, 0},
+    {1, field_fmt_25_25_3_3_info, field_fmt_25_25_3_3_set, field_fmt_25_25_3_3_get, NULL, 0},
+    {1, field_fmt_26_26_3_3_info, field_fmt_26_26_3_3_set, field_fmt_26_26_3_3_get, NULL, 0},
+    {1, field_fmt_35_35_2_2_info, field_fmt_35_35_2_2_set, field_fmt_35_35_2_2_get, NULL, 0},
+    {1, field_fmt_36_36_2_2_info, field_fmt_36_36_2_2_set, field_fmt_36_36_2_2_get, NULL, 0},
+    {1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, NULL, 0},
+    {1, field_fmt_39_44_2_2_info, field_fmt_39_44_2_2_set, field_fmt_39_44_2_2_get, NULL, 0},
+    {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0},
+    {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0},
+    {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0},
+    {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0},
+    {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0},
+    {1, field_fmt_64_71_1_1_info, field_fmt_64_71_1_1_set, field_fmt_64_71_1_1_get, NULL, 0},
+    {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0},
+    {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0},
+    {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0},
+    {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0},
+    {1, field_fmt_85_85_1_1_info, field_fmt_85_85_1_1_set, field_fmt_85_85_1_1_get, NULL, 0},
+    {1, field_fmt_86_86_1_1_info, field_fmt_86_86_1_1_set, field_fmt_86_86_1_1_get, NULL, 0},
+    {1, field_fmt_87_94_1_1_info, field_fmt_87_94_1_1_set, field_fmt_87_94_1_1_get, NULL, 0},
+    {1, field_fmt_95_95_1_1_info, field_fmt_95_95_1_1_set, field_fmt_95_95_1_1_get, NULL, 0},
+    {1, field_fmt_96_101_0_0_info, field_fmt_96_101_0_0_set, field_fmt_96_101_0_0_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78800_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78800_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm78800_a0_txpmd_names[] =
+{
+    BCM78800_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78800_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78800_a0_txpmd_info = {4, BCM78800_A0_TXPMD_COUNT, bcm78800_a0_txpmd_names, bcm78800_a0_txpmd_fields};
+    return bcm78800_a0_txpmd_info;
+}
+
+bcmpkt_pmd_info_t bcm78800_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78800_a0_lbhdr_info = {0, 0, NULL, NULL};
+    return bcm78800_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c
index 42607a2ef87..5af20b7def4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c
@@ -251,22 +251,6 @@ const bcmpkt_lbhdr_fget_t bcm78900_b0_lbhdr_fget = {
         bcmpkt_lbhdr_cng_eth_get,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -313,22 +297,6 @@ const bcmpkt_lbhdr_fset_t bcm78900_b0_lbhdr_fset = {
         bcmpkt_lbhdr_cng_eth_set,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -348,8 +316,7 @@ static shr_enum_map_t bcm78900_b0_lbhdr_view_types[] = {
 static int bcm78900_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1,
-     -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2, -2, -2, -2, -2, -2,
+     -1, -1, -1, -1, -1, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.c
new file mode 100644
index 00000000000..9c7e1782e93
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.c
@@ -0,0 +1,3177 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM78900_B0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_0_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 0;
+    return info;
+}
+
+static void
+field_fmt_0_0_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_0_0_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_0_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 0;
+    return info;
+}
+
+static void
+field_fmt_0_0_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_0_0_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_16_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_0_16_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffe0000) | (*val & 0x1ffff);
+}
+
+static void
+field_fmt_0_16_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1ffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_63_12_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_0_63_12_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = val[0];
+    pmd[11] = val[1];
+}
+
+static void
+field_fmt_0_63_12_11_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[12];
+    val[1] = pmd[11];
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_104_107_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 104;
+    info.maxbit = 107;
+    return info;
+}
+
+static void
+field_fmt_104_107_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffff0ff) | ((*val & 0xf) << 8);
+}
+
+static void
+field_fmt_104_107_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 8) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_108_111_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 108;
+    info.maxbit = 111;
+    return info;
+}
+
+static void
+field_fmt_108_111_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff0fff) | ((*val & 0xf) << 12);
+}
+
+static void
+field_fmt_108_111_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 12) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_108_115_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 108;
+    info.maxbit = 115;
+    return info;
+}
+
+static void
+field_fmt_108_115_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfff00fff) | ((*val & 0xff) << 12);
+}
+
+static void
+field_fmt_108_115_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 12) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_10_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 10;
+    return info;
+}
+
+static void
+field_fmt_10_10_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_10_10_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_112_113_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 112;
+    info.maxbit = 113;
+    return info;
+}
+
+static void
+field_fmt_112_113_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_112_113_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_113_127_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 113;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_113_127_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0x1ffff) | (*val << 17);
+}
+
+static void
+field_fmt_113_127_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 17) & 0x7fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_114_115_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 114;
+    info.maxbit = 115;
+    return info;
+}
+
+static void
+field_fmt_114_115_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfff3ffff) | ((*val & 0x3) << 18);
+}
+
+static void
+field_fmt_114_115_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 18) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_11_11_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 11;
+    info.maxbit = 11;
+    return info;
+}
+
+static void
+field_fmt_11_11_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_11_11_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_128_128_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 128;
+    info.maxbit = 128;
+    return info;
+}
+
+static void
+field_fmt_128_128_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_128_128_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[8] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_129_129_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 129;
+    info.maxbit = 129;
+    return info;
+}
+
+static void
+field_fmt_129_129_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_129_129_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_12_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 12;
+    return info;
+}
+
+static void
+field_fmt_12_12_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_12_12_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_130_130_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 130;
+    info.maxbit = 130;
+    return info;
+}
+
+static void
+field_fmt_130_130_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_130_130_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_131_131_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 131;
+    info.maxbit = 131;
+    return info;
+}
+
+static void
+field_fmt_131_131_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_131_131_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_132_132_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 132;
+    info.maxbit = 132;
+    return info;
+}
+
+static void
+field_fmt_132_132_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_132_132_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_133_133_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 133;
+    info.maxbit = 133;
+    return info;
+}
+
+static void
+field_fmt_133_133_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_133_133_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_134_136_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 134;
+    info.maxbit = 136;
+    return info;
+}
+
+static void
+field_fmt_134_136_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffe3f) | ((*val & 0x7) << 6);
+}
+
+static void
+field_fmt_134_136_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 6) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_134_139_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 134;
+    info.maxbit = 139;
+    return info;
+}
+
+static void
+field_fmt_134_139_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffff03f) | ((*val & 0x3f) << 6);
+}
+
+static void
+field_fmt_134_139_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 6) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_13_13_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 13;
+    info.maxbit = 13;
+    return info;
+}
+
+static void
+field_fmt_13_13_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_13_13_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_140_141_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 140;
+    info.maxbit = 141;
+    return info;
+}
+
+static void
+field_fmt_140_141_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffcfff) | ((*val & 0x3) << 12);
+}
+
+static void
+field_fmt_140_141_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 12) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_142_142_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 142;
+    info.maxbit = 142;
+    return info;
+}
+
+static void
+field_fmt_142_142_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_142_142_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_143_143_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 143;
+    info.maxbit = 143;
+    return info;
+}
+
+static void
+field_fmt_143_143_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_143_143_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_144_155_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 144;
+    info.maxbit = 155;
+    return info;
+}
+
+static void
+field_fmt_144_155_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xf000ffff) | ((*val & 0xfff) << 16);
+}
+
+static void
+field_fmt_144_155_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 16) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_14_14_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 14;
+    info.maxbit = 14;
+    return info;
+}
+
+static void
+field_fmt_14_14_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_14_14_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_156_158_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 156;
+    info.maxbit = 158;
+    return info;
+}
+
+static void
+field_fmt_156_158_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x8fffffff) | ((*val & 0x7) << 28);
+}
+
+static void
+field_fmt_156_158_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 28) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_159_159_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 159;
+    info.maxbit = 159;
+    return info;
+}
+
+static void
+field_fmt_159_159_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_159_159_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_15_15_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 15;
+    info.maxbit = 15;
+    return info;
+}
+
+static void
+field_fmt_15_15_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_15_15_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_160_162_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 160;
+    info.maxbit = 162;
+    return info;
+}
+
+static void
+field_fmt_160_162_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xfffffff8) | (*val & 0x7);
+}
+
+static void
+field_fmt_160_162_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[7] & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_163_174_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 163;
+    info.maxbit = 174;
+    return info;
+}
+
+static void
+field_fmt_163_174_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffff8007) | ((*val & 0xfff) << 3);
+}
+
+static void
+field_fmt_163_174_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 3) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_16_16_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 16;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_16_16_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_16_16_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_175_191_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 175;
+    info.maxbit = 191;
+    return info;
+}
+
+static void
+field_fmt_175_191_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x7fff) | (*val << 15);
+}
+
+static void
+field_fmt_175_191_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 15) & 0x1ffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_17_17_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 17;
+    info.maxbit = 17;
+    return info;
+}
+
+static void
+field_fmt_17_17_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_17_17_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_17_32_3_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 17;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_17_32_3_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x1ffff) | (*val << 17);
+    pmd[2] = (pmd[2] & 0xfffffffe) | ((*val >> 15) & 0x1);
+}
+
+static void
+field_fmt_17_32_3_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[3] >> 17) | (pmd[2] << 15)) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_18_18_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 18;
+    info.maxbit = 18;
+    return info;
+}
+
+static void
+field_fmt_18_18_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_18_18_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_192_192_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 192;
+    info.maxbit = 192;
+    return info;
+}
+
+static void
+field_fmt_192_192_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_192_192_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[6] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_193_212_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 193;
+    info.maxbit = 212;
+    return info;
+}
+
+static void
+field_fmt_193_212_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffe00001) | ((*val & 0xfffff) << 1);
+}
+
+static void
+field_fmt_193_212_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 1) & 0xfffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_19_19_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 19;
+    info.maxbit = 19;
+    return info;
+}
+
+static void
+field_fmt_19_19_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_19_19_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_1_1_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 1;
+    info.maxbit = 1;
+    return info;
+}
+
+static void
+field_fmt_1_1_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_1_1_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_1_2_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 1;
+    info.maxbit = 2;
+    return info;
+}
+
+static void
+field_fmt_1_2_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_1_2_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_20_20_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 20;
+    info.maxbit = 20;
+    return info;
+}
+
+static void
+field_fmt_20_20_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_20_20_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_213_213_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 213;
+    info.maxbit = 213;
+    return info;
+}
+
+static void
+field_fmt_213_213_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_213_213_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_214_222_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 214;
+    info.maxbit = 222;
+    return info;
+}
+
+static void
+field_fmt_214_222_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x803fffff) | ((*val & 0x1ff) << 22);
+}
+
+static void
+field_fmt_214_222_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 22) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_21_21_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 21;
+    info.maxbit = 21;
+    return info;
+}
+
+static void
+field_fmt_21_21_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_21_21_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_223_223_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 223;
+    info.maxbit = 223;
+    return info;
+}
+
+static void
+field_fmt_223_223_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_223_223_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_224_255_5_5_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 224;
+    info.maxbit = 255;
+    return info;
+}
+
+static void
+field_fmt_224_255_5_5_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[5] = *val;
+}
+
+static void
+field_fmt_224_255_5_5_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[5];
+}
+
+static bcmpkt_field_info_t
+field_fmt_22_22_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 22;
+    info.maxbit = 22;
+    return info;
+}
+
+static void
+field_fmt_22_22_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_22_22_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_23_23_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 23;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_23_23_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_23_23_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_24_24_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 24;
+    info.maxbit = 24;
+    return info;
+}
+
+static void
+field_fmt_24_24_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_24_24_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_256_271_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 256;
+    info.maxbit = 271;
+    return info;
+}
+
+static void
+field_fmt_256_271_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_256_271_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[4] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_25_25_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 25;
+    info.maxbit = 25;
+    return info;
+}
+
+static void
+field_fmt_25_25_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfdffffff) | ((*val & 0x1) << 25);
+}
+
+static void
+field_fmt_25_25_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 25) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_25_28_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 25;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_25_28_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_25_28_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_26_26_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 26;
+    info.maxbit = 26;
+    return info;
+}
+
+static void
+field_fmt_26_26_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfbffffff) | ((*val & 0x1) << 26);
+}
+
+static void
+field_fmt_26_26_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 26) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_272_272_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 272;
+    info.maxbit = 272;
+    return info;
+}
+
+static void
+field_fmt_272_272_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_272_272_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_273_276_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 273;
+    info.maxbit = 276;
+    return info;
+}
+
+static void
+field_fmt_273_276_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffe1ffff) | ((*val & 0xf) << 17);
+}
+
+static void
+field_fmt_273_276_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 17) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_277_277_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 277;
+    info.maxbit = 277;
+    return info;
+}
+
+static void
+field_fmt_277_277_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_277_277_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_278_278_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 278;
+    info.maxbit = 278;
+    return info;
+}
+
+static void
+field_fmt_278_278_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_278_278_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_279_280_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 279;
+    info.maxbit = 280;
+    return info;
+}
+
+static void
+field_fmt_279_280_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfe7fffff) | ((*val & 0x3) << 23);
+}
+
+static void
+field_fmt_279_280_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 23) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_27_27_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 27;
+    info.maxbit = 27;
+    return info;
+}
+
+static void
+field_fmt_27_27_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xf7ffffff) | ((*val & 0x1) << 27);
+}
+
+static void
+field_fmt_27_27_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 27) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_281_287_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 281;
+    info.maxbit = 287;
+    return info;
+}
+
+static void
+field_fmt_281_287_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0x1ffffff) | (*val << 25);
+}
+
+static void
+field_fmt_281_287_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 25) & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_288_415_3_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 288;
+    info.maxbit = 415;
+    return info;
+}
+
+static void
+field_fmt_288_415_3_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = val[0];
+    pmd[2] = val[1];
+    pmd[1] = val[2];
+    pmd[0] = val[3];
+}
+
+static void
+field_fmt_288_415_3_0_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[3];
+    val[1] = pmd[2];
+    val[2] = pmd[1];
+    val[3] = pmd[0];
+}
+
+static bcmpkt_field_info_t
+field_fmt_28_28_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 28;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_28_28_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_28_28_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_2_2_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 2;
+    info.maxbit = 2;
+    return info;
+}
+
+static void
+field_fmt_2_2_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_2_2_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[11] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_39_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_32_39_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_32_39_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_33_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 33;
+    return info;
+}
+
+static void
+field_fmt_33_33_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_33_33_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_36_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_33_36_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffffe1) | ((*val & 0xf) << 1);
+}
+
+static void
+field_fmt_33_36_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 1) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_34_34_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 34;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_34_34_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_34_34_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_36_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_36_36_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_36_36_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_38_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_37_38_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff9f) | ((*val & 0x3) << 5);
+}
+
+static void
+field_fmt_37_38_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 5) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_38_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_38_38_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_38_38_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_39_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_39_39_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_39_39_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_42_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_39_42_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffff87f) | ((*val & 0xf) << 7);
+}
+
+static void
+field_fmt_39_42_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_3_3_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 3;
+    info.maxbit = 3;
+    return info;
+}
+
+static void
+field_fmt_3_3_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_3_3_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_3_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 3;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_3_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe07) | ((*val & 0x3f) << 3);
+}
+
+static void
+field_fmt_3_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 3) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_40_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_40_40_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_40_40_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_43_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_40_43_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffff0ff) | ((*val & 0xf) << 8);
+}
+
+static void
+field_fmt_40_43_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 8) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_41_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_41_41_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_41_41_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_42_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_42_42_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_42_42_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_43_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_43_43_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_43_43_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_44_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_43_44_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffe7ff) | ((*val & 0x3) << 11);
+}
+
+static void
+field_fmt_43_44_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 11) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_44_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff8fff) | ((*val & 0x7) << 12);
+}
+
+static void
+field_fmt_44_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 12) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_48_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 48;
+    return info;
+}
+
+static void
+field_fmt_45_48_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffe1fff) | ((*val & 0xf) << 13);
+}
+
+static void
+field_fmt_45_48_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_48_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 48;
+    return info;
+}
+
+static void
+field_fmt_47_48_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffe7fff) | ((*val & 0x3) << 15);
+}
+
+static void
+field_fmt_47_48_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_49_49_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 49;
+    info.maxbit = 49;
+    return info;
+}
+
+static void
+field_fmt_49_49_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_49_49_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_49_50_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 49;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_49_50_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff9ffff) | ((*val & 0x3) << 17);
+}
+
+static void
+field_fmt_49_50_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 17) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_4_4_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 4;
+    info.maxbit = 4;
+    return info;
+}
+
+static void
+field_fmt_4_4_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_4_4_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_52_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_50_52_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffe3ffff) | ((*val & 0x7) << 18);
+}
+
+static void
+field_fmt_50_52_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 18) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_51_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_51_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_59_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_52_59_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xf00fffff) | ((*val & 0xff) << 20);
+}
+
+static void
+field_fmt_52_59_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_53_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_53_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_54_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_54_54_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_54_54_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_67_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_55_67_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffff) | (*val << 23);
+    pmd[1] = (pmd[1] & 0xfffffff0) | ((*val >> 9) & 0xf);
+}
+
+static void
+field_fmt_55_67_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 23) | (pmd[1] << 9)) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_5_5_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 5;
+    info.maxbit = 5;
+    return info;
+}
+
+static void
+field_fmt_5_5_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_5_5_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_60_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 60;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_60_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_60_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_61_61_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 61;
+    info.maxbit = 61;
+    return info;
+}
+
+static void
+field_fmt_61_61_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_61_61_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_62_62_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 62;
+    info.maxbit = 62;
+    return info;
+}
+
+static void
+field_fmt_62_62_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_62_62_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_63_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_63_63_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_63_63_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_67_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_64_67_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_64_67_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[10] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_78_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 78;
+    return info;
+}
+
+static void
+field_fmt_66_78_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff8003) | ((*val & 0x1fff) << 2);
+}
+
+static void
+field_fmt_66_78_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 2) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_79_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_68_79_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffff000f) | ((*val & 0xfff) << 4);
+}
+
+static void
+field_fmt_68_79_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_80_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_68_80_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffe000f) | ((*val & 0x1fff) << 4);
+}
+
+static void
+field_fmt_68_80_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_6_6_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 6;
+    info.maxbit = 6;
+    return info;
+}
+
+static void
+field_fmt_6_6_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_6_6_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_7_7_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 7;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_7_7_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_7_7_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_81_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_80_81_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_80_81_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_80_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff8ffff) | ((*val & 0x7) << 16);
+}
+
+static void
+field_fmt_80_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_83_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_80_83_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_80_83_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_89_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 89;
+    return info;
+}
+
+static void
+field_fmt_82_89_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfc03ffff) | ((*val & 0xff) << 18);
+}
+
+static void
+field_fmt_82_89_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 18) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_85_93_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 85;
+    info.maxbit = 93;
+    return info;
+}
+
+static void
+field_fmt_85_93_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xc01fffff) | ((*val & 0x1ff) << 21);
+}
+
+static void
+field_fmt_85_93_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 21) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_90_95_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 90;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_90_95_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0x3ffffff) | (*val << 26);
+}
+
+static void
+field_fmt_90_95_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 26) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_96_96_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 96;
+    info.maxbit = 96;
+    return info;
+}
+
+static void
+field_fmt_96_96_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_96_96_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[9] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_97_98_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 97;
+    info.maxbit = 98;
+    return info;
+}
+
+static void
+field_fmt_97_98_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_97_98_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_99_112_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 99;
+    info.maxbit = 112;
+    return info;
+}
+
+static void
+field_fmt_99_112_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffe0007) | ((*val & 0x3fff) << 3);
+}
+
+static void
+field_fmt_99_112_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 3) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_24_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 24;
+    return info;
+}
+
+static void
+field_fmt_9_24_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfe0001ff) | ((*val & 0xffff) << 9);
+}
+
+static void
+field_fmt_9_24_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 9) & 0x1;
+}
+
+static const shr_enum_map_t bcm78900_b0_rxpmd_reason_type_names[] =
+{
+    BCM78900_B0_RXPMD_REASON_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78900_b0_rxpmd_ieee_802_1as_timestamp_enabled_names[] =
+{
+    BCM78900_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm78900_b0_rxpmd_fields[BCM78900_B0_RXPMD_COUNT] = {
+    {2, field_fmt_0_63_12_11_info, field_fmt_0_63_12_11_set, field_fmt_0_63_12_11_get, NULL, 0},
+    {1, field_fmt_64_67_10_10_info, field_fmt_64_67_10_10_set, field_fmt_64_67_10_10_get, bcm78900_b0_rxpmd_reason_type_names, 0},
+    {1, field_fmt_68_80_10_10_info, field_fmt_68_80_10_10_set, field_fmt_68_80_10_10_get, NULL, 0},
+    {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0},
+    {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0},
+    {1, field_fmt_80_83_10_10_info, field_fmt_80_83_10_10_set, field_fmt_80_83_10_10_get, NULL, 0},
+    {1, field_fmt_80_81_10_10_info, field_fmt_80_81_10_10_set, field_fmt_80_81_10_10_get, NULL, 0},
+    {1, field_fmt_82_89_10_10_info, field_fmt_82_89_10_10_set, field_fmt_82_89_10_10_get, NULL, 0},
+    {1, field_fmt_84_84_10_10_info, field_fmt_84_84_10_10_set, field_fmt_84_84_10_10_get, NULL, 0},
+    {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0},
+    {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0},
+    {1, field_fmt_96_96_9_9_info, field_fmt_96_96_9_9_set, field_fmt_96_96_9_9_get, NULL, 0},
+    {1, field_fmt_97_98_9_9_info, field_fmt_97_98_9_9_set, field_fmt_97_98_9_9_get, NULL, 0},
+    {1, field_fmt_99_112_9_9_info, field_fmt_99_112_9_9_set, field_fmt_99_112_9_9_get, NULL, 0},
+    {1, field_fmt_113_127_9_9_info, field_fmt_113_127_9_9_set, field_fmt_113_127_9_9_get, NULL, 0},
+    {1, field_fmt_128_128_8_8_info, field_fmt_128_128_8_8_set, field_fmt_128_128_8_8_get, NULL, 0},
+    {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0},
+    {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0},
+    {1, field_fmt_131_131_8_8_info, field_fmt_131_131_8_8_set, field_fmt_131_131_8_8_get, NULL, 0},
+    {1, field_fmt_132_132_8_8_info, field_fmt_132_132_8_8_set, field_fmt_132_132_8_8_get, NULL, 0},
+    {1, field_fmt_133_133_8_8_info, field_fmt_133_133_8_8_set, field_fmt_133_133_8_8_get, NULL, 0},
+    {1, field_fmt_134_139_8_8_info, field_fmt_134_139_8_8_set, field_fmt_134_139_8_8_get, NULL, 0},
+    {1, field_fmt_134_136_8_8_info, field_fmt_134_136_8_8_set, field_fmt_134_136_8_8_get, NULL, 0},
+    {1, field_fmt_140_141_8_8_info, field_fmt_140_141_8_8_set, field_fmt_140_141_8_8_get, NULL, 0},
+    {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0},
+    {1, field_fmt_143_143_8_8_info, field_fmt_143_143_8_8_set, field_fmt_143_143_8_8_get, NULL, 0},
+    {1, field_fmt_144_155_8_8_info, field_fmt_144_155_8_8_set, field_fmt_144_155_8_8_get, NULL, 0},
+    {1, field_fmt_156_158_8_8_info, field_fmt_156_158_8_8_set, field_fmt_156_158_8_8_get, NULL, 0},
+    {1, field_fmt_159_159_8_8_info, field_fmt_159_159_8_8_set, field_fmt_159_159_8_8_get, NULL, 0},
+    {1, field_fmt_160_162_7_7_info, field_fmt_160_162_7_7_set, field_fmt_160_162_7_7_get, NULL, 0},
+    {1, field_fmt_163_174_7_7_info, field_fmt_163_174_7_7_set, field_fmt_163_174_7_7_get, NULL, 0},
+    {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0},
+    {1, field_fmt_192_192_6_6_info, field_fmt_192_192_6_6_set, field_fmt_192_192_6_6_get, NULL, 0},
+    {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0},
+    {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0},
+    {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0},
+    {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0},
+    {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0},
+    {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0},
+    {1, field_fmt_272_272_4_4_info, field_fmt_272_272_4_4_set, field_fmt_272_272_4_4_get, bcm78900_b0_rxpmd_ieee_802_1as_timestamp_enabled_names, 0},
+    {1, field_fmt_273_276_4_4_info, field_fmt_273_276_4_4_set, field_fmt_273_276_4_4_get, NULL, 0},
+    {1, field_fmt_277_277_4_4_info, field_fmt_277_277_4_4_set, field_fmt_277_277_4_4_get, NULL, 0},
+    {1, field_fmt_278_278_4_4_info, field_fmt_278_278_4_4_set, field_fmt_278_278_4_4_get, NULL, 0},
+    {1, field_fmt_279_280_4_4_info, field_fmt_279_280_4_4_set, field_fmt_279_280_4_4_get, NULL, 0},
+    {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0},
+    {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm78900_b0_rxpmd_names[] =
+{
+    BCM78900_B0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78900_b0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78900_b0_rxpmd_info = {13, BCM78900_B0_RXPMD_COUNT, bcm78900_b0_rxpmd_names, bcm78900_b0_rxpmd_fields};
+    return bcm78900_b0_rxpmd_info;
+}
+
+static bcmpkt_pmd_field_t bcm78900_b0_rx_reason_fields[BCM78900_B0_RX_REASON_COUNT] = {
+    {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0},
+    {1, field_fmt_1_1_12_12_info, field_fmt_1_1_12_12_set, field_fmt_1_1_12_12_get, NULL, 0},
+    {1, field_fmt_2_2_12_12_info, field_fmt_2_2_12_12_set, field_fmt_2_2_12_12_get, NULL, 0},
+    {1, field_fmt_3_3_12_12_info, field_fmt_3_3_12_12_set, field_fmt_3_3_12_12_get, NULL, 0},
+    {1, field_fmt_4_4_12_12_info, field_fmt_4_4_12_12_set, field_fmt_4_4_12_12_get, NULL, 0},
+    {1, field_fmt_5_5_12_12_info, field_fmt_5_5_12_12_set, field_fmt_5_5_12_12_get, NULL, 0},
+    {1, field_fmt_6_6_12_12_info, field_fmt_6_6_12_12_set, field_fmt_6_6_12_12_get, NULL, 0},
+    {1, field_fmt_7_7_12_12_info, field_fmt_7_7_12_12_set, field_fmt_7_7_12_12_get, NULL, 0},
+    {1, field_fmt_8_8_12_12_info, field_fmt_8_8_12_12_set, field_fmt_8_8_12_12_get, NULL, 0},
+    {1, field_fmt_9_9_12_12_info, field_fmt_9_9_12_12_set, field_fmt_9_9_12_12_get, NULL, 0},
+    {1, field_fmt_10_10_12_12_info, field_fmt_10_10_12_12_set, field_fmt_10_10_12_12_get, NULL, 0},
+    {1, field_fmt_11_11_12_12_info, field_fmt_11_11_12_12_set, field_fmt_11_11_12_12_get, NULL, 0},
+    {1, field_fmt_12_12_12_12_info, field_fmt_12_12_12_12_set, field_fmt_12_12_12_12_get, NULL, 0},
+    {1, field_fmt_13_13_12_12_info, field_fmt_13_13_12_12_set, field_fmt_13_13_12_12_get, NULL, 0},
+    {1, field_fmt_14_14_12_12_info, field_fmt_14_14_12_12_set, field_fmt_14_14_12_12_get, NULL, 0},
+    {1, field_fmt_15_15_12_12_info, field_fmt_15_15_12_12_set, field_fmt_15_15_12_12_get, NULL, 0},
+    {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0},
+    {1, field_fmt_17_17_12_12_info, field_fmt_17_17_12_12_set, field_fmt_17_17_12_12_get, NULL, 0},
+    {1, field_fmt_18_18_12_12_info, field_fmt_18_18_12_12_set, field_fmt_18_18_12_12_get, NULL, 0},
+    {1, field_fmt_19_19_12_12_info, field_fmt_19_19_12_12_set, field_fmt_19_19_12_12_get, NULL, 0},
+    {1, field_fmt_20_20_12_12_info, field_fmt_20_20_12_12_set, field_fmt_20_20_12_12_get, NULL, 0},
+    {1, field_fmt_21_21_12_12_info, field_fmt_21_21_12_12_set, field_fmt_21_21_12_12_get, NULL, 0},
+    {1, field_fmt_22_22_12_12_info, field_fmt_22_22_12_12_set, field_fmt_22_22_12_12_get, NULL, 0},
+    {1, field_fmt_23_23_12_12_info, field_fmt_23_23_12_12_set, field_fmt_23_23_12_12_get, NULL, 0},
+    {1, field_fmt_24_24_12_12_info, field_fmt_24_24_12_12_set, field_fmt_24_24_12_12_get, NULL, 0},
+    {1, field_fmt_25_25_12_12_info, field_fmt_25_25_12_12_set, field_fmt_25_25_12_12_get, NULL, 0},
+    {1, field_fmt_26_26_12_12_info, field_fmt_26_26_12_12_set, field_fmt_26_26_12_12_get, NULL, 0},
+    {1, field_fmt_27_27_12_12_info, field_fmt_27_27_12_12_set, field_fmt_27_27_12_12_get, NULL, 0},
+    {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0},
+    {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0},
+    {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0},
+    {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0},
+    {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0},
+    {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0},
+    {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0},
+    {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0},
+    {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0},
+    {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0},
+    {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0},
+    {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0},
+    {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0},
+    {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0},
+    {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0},
+    {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0},
+    {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0},
+    {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm78900_b0_rx_reason_names[] =
+{
+    BCM78900_B0_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78900_b0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78900_b0_rx_reason_info = {13, BCM78900_B0_RX_REASON_COUNT, bcm78900_b0_rx_reason_names, bcm78900_b0_rx_reason_fields};
+    return bcm78900_b0_rx_reason_info;
+}
+
+static bcmpkt_pmd_field_t bcm78900_b0_ep_rx_reason_fields[BCM78900_B0_EP_RX_REASON_COUNT] = {
+    {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm78900_b0_ep_rx_reason_names[] =
+{
+    BCM78900_B0_EP_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78900_b0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78900_b0_ep_rx_reason_info = {13, BCM78900_B0_EP_RX_REASON_COUNT, bcm78900_b0_ep_rx_reason_names, bcm78900_b0_ep_rx_reason_fields};
+    return bcm78900_b0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm78900_b0_txpmd_cpu_tx_destination_type_names[] =
+{
+    BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78900_b0_txpmd_cpu_tx_dp_names[] =
+{
+    BCM78900_B0_TXPMD_CPU_TX_DP_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78900_b0_txpmd_sobmh_from_cpu_destination_type_names[] =
+{
+    BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78900_b0_txpmd_header_type_names[] =
+{
+    BCM78900_B0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78900_b0_txpmd_start_names[] =
+{
+    BCM78900_B0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm78900_b0_txpmd_fields[BCM78900_B0_TXPMD_COUNT] = {
+    {1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2},
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2},
+    {1, field_fmt_17_32_3_2_info, field_fmt_17_32_3_2_set, field_fmt_17_32_3_2_get, NULL, 2},
+    {1, field_fmt_33_36_2_2_info, field_fmt_33_36_2_2_set, field_fmt_33_36_2_2_get, bcm78900_b0_txpmd_cpu_tx_destination_type_names, 2},
+    {1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, bcm78900_b0_txpmd_cpu_tx_dp_names, 2},
+    {1, field_fmt_39_42_2_2_info, field_fmt_39_42_2_2_set, field_fmt_39_42_2_2_get, NULL, 2},
+    {1, field_fmt_43_44_2_2_info, field_fmt_43_44_2_2_set, field_fmt_43_44_2_2_get, NULL, 2},
+    {1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 2},
+    {1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2},
+    {1, field_fmt_50_52_2_2_info, field_fmt_50_52_2_2_set, field_fmt_50_52_2_2_get, NULL, 2},
+    {1, field_fmt_53_53_2_2_info, field_fmt_53_53_2_2_set, field_fmt_53_53_2_2_get, NULL, 2},
+    {1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 2},
+    {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 2},
+    {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 2},
+    {1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1},
+    {1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1},
+    {1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1},
+    {1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1},
+    {1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm78900_b0_txpmd_sobmh_from_cpu_destination_type_names, 1},
+    {1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1},
+    {1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1},
+    {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1},
+    {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 1},
+    {1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1},
+    {1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1},
+    {1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1},
+    {1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1},
+    {1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1},
+    {1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1},
+    {1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1},
+    {1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1},
+    {1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1},
+    {1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78900_b0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78900_b0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm78900_b0_txpmd_names[] =
+{
+    BCM78900_B0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78900_b0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78900_b0_txpmd_info = {4, BCM78900_B0_TXPMD_COUNT, bcm78900_b0_txpmd_names, bcm78900_b0_txpmd_fields};
+    return bcm78900_b0_txpmd_info;
+}
+
+static const shr_enum_map_t bcm78900_b0_lbhdr_header_type_names[] =
+{
+    BCM78900_B0_LBHDR_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78900_b0_lbhdr_start_names[] =
+{
+    BCM78900_B0_LBHDR_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm78900_b0_lbhdr_fields[BCM78900_B0_LBHDR_COUNT] = {
+    {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_66_78_1_1_info, field_fmt_66_78_1_1_set, field_fmt_66_78_1_1_get, NULL, 0},
+    {1, field_fmt_80_82_1_1_info, field_fmt_80_82_1_1_set, field_fmt_80_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_85_93_1_1_info, field_fmt_85_93_1_1_set, field_fmt_85_93_1_1_get, NULL, 0},
+    {1, field_fmt_104_107_0_0_info, field_fmt_104_107_0_0_set, field_fmt_104_107_0_0_get, NULL, 0},
+    {1, field_fmt_108_115_0_0_info, field_fmt_108_115_0_0_set, field_fmt_108_115_0_0_get, NULL, 0},
+    {1, field_fmt_108_111_0_0_info, field_fmt_108_111_0_0_set, field_fmt_108_111_0_0_get, NULL, 0},
+    {1, field_fmt_112_113_0_0_info, field_fmt_112_113_0_0_set, field_fmt_112_113_0_0_get, NULL, 0},
+    {1, field_fmt_114_115_0_0_info, field_fmt_114_115_0_0_set, field_fmt_114_115_0_0_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78900_b0_lbhdr_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78900_b0_lbhdr_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm78900_b0_lbhdr_names[] =
+{
+    BCM78900_B0_LBHDR_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78900_b0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78900_b0_lbhdr_info = {4, BCM78900_B0_LBHDR_COUNT, bcm78900_b0_lbhdr_names, bcm78900_b0_lbhdr_fields};
+    return bcm78900_b0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c
index 4bae4436d0f..d40971d1a4b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c
@@ -251,22 +251,6 @@ const bcmpkt_lbhdr_fget_t bcm78905_a0_lbhdr_fget = {
         bcmpkt_lbhdr_cng_eth_get,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -313,22 +297,6 @@ const bcmpkt_lbhdr_fset_t bcm78905_a0_lbhdr_fset = {
         bcmpkt_lbhdr_cng_eth_set,
         NULL,
         NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
         NULL
     }
 };
@@ -348,8 +316,7 @@ static shr_enum_map_t bcm78905_a0_lbhdr_view_types[] = {
 static int bcm78905_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1,
-     -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2, -2, -2, -2, -2, -2,
+     -1, -1, -1, -1, -1, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.c
new file mode 100644
index 00000000000..bf5f0f4a265
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.c
@@ -0,0 +1,3177 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM78905_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_0_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 0;
+    return info;
+}
+
+static void
+field_fmt_0_0_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_0_0_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_0_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 0;
+    return info;
+}
+
+static void
+field_fmt_0_0_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_0_0_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_16_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_0_16_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffe0000) | (*val & 0x1ffff);
+}
+
+static void
+field_fmt_0_16_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1ffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_63_12_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_0_63_12_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = val[0];
+    pmd[11] = val[1];
+}
+
+static void
+field_fmt_0_63_12_11_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[12];
+    val[1] = pmd[11];
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_104_107_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 104;
+    info.maxbit = 107;
+    return info;
+}
+
+static void
+field_fmt_104_107_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffff0ff) | ((*val & 0xf) << 8);
+}
+
+static void
+field_fmt_104_107_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 8) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_108_111_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 108;
+    info.maxbit = 111;
+    return info;
+}
+
+static void
+field_fmt_108_111_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff0fff) | ((*val & 0xf) << 12);
+}
+
+static void
+field_fmt_108_111_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 12) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_108_115_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 108;
+    info.maxbit = 115;
+    return info;
+}
+
+static void
+field_fmt_108_115_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfff00fff) | ((*val & 0xff) << 12);
+}
+
+static void
+field_fmt_108_115_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 12) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_10_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 10;
+    return info;
+}
+
+static void
+field_fmt_10_10_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_10_10_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_112_113_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 112;
+    info.maxbit = 113;
+    return info;
+}
+
+static void
+field_fmt_112_113_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_112_113_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_113_127_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 113;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_113_127_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0x1ffff) | (*val << 17);
+}
+
+static void
+field_fmt_113_127_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 17) & 0x7fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_114_115_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 114;
+    info.maxbit = 115;
+    return info;
+}
+
+static void
+field_fmt_114_115_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfff3ffff) | ((*val & 0x3) << 18);
+}
+
+static void
+field_fmt_114_115_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 18) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_11_11_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 11;
+    info.maxbit = 11;
+    return info;
+}
+
+static void
+field_fmt_11_11_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_11_11_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_128_128_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 128;
+    info.maxbit = 128;
+    return info;
+}
+
+static void
+field_fmt_128_128_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_128_128_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[8] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_129_129_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 129;
+    info.maxbit = 129;
+    return info;
+}
+
+static void
+field_fmt_129_129_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_129_129_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_12_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 12;
+    return info;
+}
+
+static void
+field_fmt_12_12_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_12_12_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_130_130_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 130;
+    info.maxbit = 130;
+    return info;
+}
+
+static void
+field_fmt_130_130_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_130_130_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_131_131_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 131;
+    info.maxbit = 131;
+    return info;
+}
+
+static void
+field_fmt_131_131_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_131_131_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_132_132_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 132;
+    info.maxbit = 132;
+    return info;
+}
+
+static void
+field_fmt_132_132_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_132_132_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_133_133_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 133;
+    info.maxbit = 133;
+    return info;
+}
+
+static void
+field_fmt_133_133_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_133_133_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_134_136_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 134;
+    info.maxbit = 136;
+    return info;
+}
+
+static void
+field_fmt_134_136_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffe3f) | ((*val & 0x7) << 6);
+}
+
+static void
+field_fmt_134_136_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 6) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_134_139_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 134;
+    info.maxbit = 139;
+    return info;
+}
+
+static void
+field_fmt_134_139_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffff03f) | ((*val & 0x3f) << 6);
+}
+
+static void
+field_fmt_134_139_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 6) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_13_13_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 13;
+    info.maxbit = 13;
+    return info;
+}
+
+static void
+field_fmt_13_13_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_13_13_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_140_141_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 140;
+    info.maxbit = 141;
+    return info;
+}
+
+static void
+field_fmt_140_141_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffcfff) | ((*val & 0x3) << 12);
+}
+
+static void
+field_fmt_140_141_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 12) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_142_142_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 142;
+    info.maxbit = 142;
+    return info;
+}
+
+static void
+field_fmt_142_142_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_142_142_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_143_143_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 143;
+    info.maxbit = 143;
+    return info;
+}
+
+static void
+field_fmt_143_143_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_143_143_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_144_155_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 144;
+    info.maxbit = 155;
+    return info;
+}
+
+static void
+field_fmt_144_155_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xf000ffff) | ((*val & 0xfff) << 16);
+}
+
+static void
+field_fmt_144_155_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 16) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_14_14_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 14;
+    info.maxbit = 14;
+    return info;
+}
+
+static void
+field_fmt_14_14_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_14_14_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_156_158_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 156;
+    info.maxbit = 158;
+    return info;
+}
+
+static void
+field_fmt_156_158_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x8fffffff) | ((*val & 0x7) << 28);
+}
+
+static void
+field_fmt_156_158_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 28) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_159_159_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 159;
+    info.maxbit = 159;
+    return info;
+}
+
+static void
+field_fmt_159_159_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_159_159_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_15_15_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 15;
+    info.maxbit = 15;
+    return info;
+}
+
+static void
+field_fmt_15_15_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_15_15_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_160_162_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 160;
+    info.maxbit = 162;
+    return info;
+}
+
+static void
+field_fmt_160_162_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xfffffff8) | (*val & 0x7);
+}
+
+static void
+field_fmt_160_162_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[7] & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_163_174_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 163;
+    info.maxbit = 174;
+    return info;
+}
+
+static void
+field_fmt_163_174_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffff8007) | ((*val & 0xfff) << 3);
+}
+
+static void
+field_fmt_163_174_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 3) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_16_16_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 16;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_16_16_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_16_16_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_175_191_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 175;
+    info.maxbit = 191;
+    return info;
+}
+
+static void
+field_fmt_175_191_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x7fff) | (*val << 15);
+}
+
+static void
+field_fmt_175_191_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 15) & 0x1ffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_17_17_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 17;
+    info.maxbit = 17;
+    return info;
+}
+
+static void
+field_fmt_17_17_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_17_17_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_17_32_3_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 17;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_17_32_3_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x1ffff) | (*val << 17);
+    pmd[2] = (pmd[2] & 0xfffffffe) | ((*val >> 15) & 0x1);
+}
+
+static void
+field_fmt_17_32_3_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[3] >> 17) | (pmd[2] << 15)) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_18_18_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 18;
+    info.maxbit = 18;
+    return info;
+}
+
+static void
+field_fmt_18_18_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_18_18_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_192_192_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 192;
+    info.maxbit = 192;
+    return info;
+}
+
+static void
+field_fmt_192_192_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_192_192_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[6] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_193_212_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 193;
+    info.maxbit = 212;
+    return info;
+}
+
+static void
+field_fmt_193_212_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffe00001) | ((*val & 0xfffff) << 1);
+}
+
+static void
+field_fmt_193_212_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 1) & 0xfffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_19_19_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 19;
+    info.maxbit = 19;
+    return info;
+}
+
+static void
+field_fmt_19_19_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_19_19_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_1_1_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 1;
+    info.maxbit = 1;
+    return info;
+}
+
+static void
+field_fmt_1_1_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_1_1_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_1_2_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 1;
+    info.maxbit = 2;
+    return info;
+}
+
+static void
+field_fmt_1_2_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_1_2_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_20_20_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 20;
+    info.maxbit = 20;
+    return info;
+}
+
+static void
+field_fmt_20_20_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_20_20_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_213_213_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 213;
+    info.maxbit = 213;
+    return info;
+}
+
+static void
+field_fmt_213_213_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_213_213_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_214_222_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 214;
+    info.maxbit = 222;
+    return info;
+}
+
+static void
+field_fmt_214_222_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x803fffff) | ((*val & 0x1ff) << 22);
+}
+
+static void
+field_fmt_214_222_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 22) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_21_21_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 21;
+    info.maxbit = 21;
+    return info;
+}
+
+static void
+field_fmt_21_21_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_21_21_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_223_223_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 223;
+    info.maxbit = 223;
+    return info;
+}
+
+static void
+field_fmt_223_223_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_223_223_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_224_255_5_5_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 224;
+    info.maxbit = 255;
+    return info;
+}
+
+static void
+field_fmt_224_255_5_5_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[5] = *val;
+}
+
+static void
+field_fmt_224_255_5_5_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[5];
+}
+
+static bcmpkt_field_info_t
+field_fmt_22_22_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 22;
+    info.maxbit = 22;
+    return info;
+}
+
+static void
+field_fmt_22_22_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_22_22_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_23_23_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 23;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_23_23_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_23_23_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_24_24_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 24;
+    info.maxbit = 24;
+    return info;
+}
+
+static void
+field_fmt_24_24_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_24_24_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_256_271_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 256;
+    info.maxbit = 271;
+    return info;
+}
+
+static void
+field_fmt_256_271_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_256_271_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[4] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_25_25_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 25;
+    info.maxbit = 25;
+    return info;
+}
+
+static void
+field_fmt_25_25_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfdffffff) | ((*val & 0x1) << 25);
+}
+
+static void
+field_fmt_25_25_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 25) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_25_28_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 25;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_25_28_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_25_28_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_26_26_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 26;
+    info.maxbit = 26;
+    return info;
+}
+
+static void
+field_fmt_26_26_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfbffffff) | ((*val & 0x1) << 26);
+}
+
+static void
+field_fmt_26_26_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 26) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_272_272_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 272;
+    info.maxbit = 272;
+    return info;
+}
+
+static void
+field_fmt_272_272_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_272_272_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_273_276_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 273;
+    info.maxbit = 276;
+    return info;
+}
+
+static void
+field_fmt_273_276_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffe1ffff) | ((*val & 0xf) << 17);
+}
+
+static void
+field_fmt_273_276_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 17) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_277_277_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 277;
+    info.maxbit = 277;
+    return info;
+}
+
+static void
+field_fmt_277_277_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_277_277_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_278_278_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 278;
+    info.maxbit = 278;
+    return info;
+}
+
+static void
+field_fmt_278_278_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_278_278_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_279_280_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 279;
+    info.maxbit = 280;
+    return info;
+}
+
+static void
+field_fmt_279_280_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfe7fffff) | ((*val & 0x3) << 23);
+}
+
+static void
+field_fmt_279_280_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 23) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_27_27_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 27;
+    info.maxbit = 27;
+    return info;
+}
+
+static void
+field_fmt_27_27_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xf7ffffff) | ((*val & 0x1) << 27);
+}
+
+static void
+field_fmt_27_27_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 27) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_281_287_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 281;
+    info.maxbit = 287;
+    return info;
+}
+
+static void
+field_fmt_281_287_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0x1ffffff) | (*val << 25);
+}
+
+static void
+field_fmt_281_287_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 25) & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_288_415_3_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 288;
+    info.maxbit = 415;
+    return info;
+}
+
+static void
+field_fmt_288_415_3_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = val[0];
+    pmd[2] = val[1];
+    pmd[1] = val[2];
+    pmd[0] = val[3];
+}
+
+static void
+field_fmt_288_415_3_0_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[3];
+    val[1] = pmd[2];
+    val[2] = pmd[1];
+    val[3] = pmd[0];
+}
+
+static bcmpkt_field_info_t
+field_fmt_28_28_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 28;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_28_28_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_28_28_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_2_2_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 2;
+    info.maxbit = 2;
+    return info;
+}
+
+static void
+field_fmt_2_2_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_2_2_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[11] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_39_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_32_39_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_32_39_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_33_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 33;
+    return info;
+}
+
+static void
+field_fmt_33_33_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_33_33_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_36_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_33_36_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffffe1) | ((*val & 0xf) << 1);
+}
+
+static void
+field_fmt_33_36_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 1) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_34_34_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 34;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_34_34_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_34_34_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_36_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_36_36_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_36_36_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_38_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_37_38_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff9f) | ((*val & 0x3) << 5);
+}
+
+static void
+field_fmt_37_38_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 5) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_38_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_38_38_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_38_38_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_39_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_39_39_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_39_39_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_42_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_39_42_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffff87f) | ((*val & 0xf) << 7);
+}
+
+static void
+field_fmt_39_42_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_3_3_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 3;
+    info.maxbit = 3;
+    return info;
+}
+
+static void
+field_fmt_3_3_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_3_3_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_3_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 3;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_3_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe07) | ((*val & 0x3f) << 3);
+}
+
+static void
+field_fmt_3_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 3) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_40_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_40_40_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_40_40_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_43_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_40_43_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffff0ff) | ((*val & 0xf) << 8);
+}
+
+static void
+field_fmt_40_43_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 8) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_41_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_41_41_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_41_41_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_42_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_42_42_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_42_42_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_43_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_43_43_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_43_43_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_44_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_43_44_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffe7ff) | ((*val & 0x3) << 11);
+}
+
+static void
+field_fmt_43_44_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 11) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_44_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff8fff) | ((*val & 0x7) << 12);
+}
+
+static void
+field_fmt_44_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 12) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_48_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 48;
+    return info;
+}
+
+static void
+field_fmt_45_48_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffe1fff) | ((*val & 0xf) << 13);
+}
+
+static void
+field_fmt_45_48_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_48_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 48;
+    return info;
+}
+
+static void
+field_fmt_47_48_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffe7fff) | ((*val & 0x3) << 15);
+}
+
+static void
+field_fmt_47_48_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_49_49_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 49;
+    info.maxbit = 49;
+    return info;
+}
+
+static void
+field_fmt_49_49_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_49_49_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_49_50_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 49;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_49_50_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff9ffff) | ((*val & 0x3) << 17);
+}
+
+static void
+field_fmt_49_50_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 17) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_4_4_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 4;
+    info.maxbit = 4;
+    return info;
+}
+
+static void
+field_fmt_4_4_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_4_4_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_52_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_50_52_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffe3ffff) | ((*val & 0x7) << 18);
+}
+
+static void
+field_fmt_50_52_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 18) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_51_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_51_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_59_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_52_59_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xf00fffff) | ((*val & 0xff) << 20);
+}
+
+static void
+field_fmt_52_59_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_53_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_53_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_54_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_54_54_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_54_54_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_67_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_55_67_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffff) | (*val << 23);
+    pmd[1] = (pmd[1] & 0xfffffff0) | ((*val >> 9) & 0xf);
+}
+
+static void
+field_fmt_55_67_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 23) | (pmd[1] << 9)) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_5_5_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 5;
+    info.maxbit = 5;
+    return info;
+}
+
+static void
+field_fmt_5_5_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_5_5_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_60_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 60;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_60_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_60_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_61_61_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 61;
+    info.maxbit = 61;
+    return info;
+}
+
+static void
+field_fmt_61_61_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_61_61_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_62_62_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 62;
+    info.maxbit = 62;
+    return info;
+}
+
+static void
+field_fmt_62_62_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_62_62_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_63_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_63_63_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_63_63_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_67_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_64_67_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_64_67_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[10] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_78_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 78;
+    return info;
+}
+
+static void
+field_fmt_66_78_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff8003) | ((*val & 0x1fff) << 2);
+}
+
+static void
+field_fmt_66_78_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 2) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_79_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_68_79_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffff000f) | ((*val & 0xfff) << 4);
+}
+
+static void
+field_fmt_68_79_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_80_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_68_80_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffe000f) | ((*val & 0x1fff) << 4);
+}
+
+static void
+field_fmt_68_80_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_6_6_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 6;
+    info.maxbit = 6;
+    return info;
+}
+
+static void
+field_fmt_6_6_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_6_6_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_7_7_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 7;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_7_7_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_7_7_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_81_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_80_81_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_80_81_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_80_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff8ffff) | ((*val & 0x7) << 16);
+}
+
+static void
+field_fmt_80_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_83_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_80_83_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_80_83_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_89_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 89;
+    return info;
+}
+
+static void
+field_fmt_82_89_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfc03ffff) | ((*val & 0xff) << 18);
+}
+
+static void
+field_fmt_82_89_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 18) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_85_93_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 85;
+    info.maxbit = 93;
+    return info;
+}
+
+static void
+field_fmt_85_93_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xc01fffff) | ((*val & 0x1ff) << 21);
+}
+
+static void
+field_fmt_85_93_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 21) & 0x1ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_90_95_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 90;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_90_95_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0x3ffffff) | (*val << 26);
+}
+
+static void
+field_fmt_90_95_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 26) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_96_96_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 96;
+    info.maxbit = 96;
+    return info;
+}
+
+static void
+field_fmt_96_96_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_96_96_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[9] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_97_98_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 97;
+    info.maxbit = 98;
+    return info;
+}
+
+static void
+field_fmt_97_98_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_97_98_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_99_112_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 99;
+    info.maxbit = 112;
+    return info;
+}
+
+static void
+field_fmt_99_112_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffe0007) | ((*val & 0x3fff) << 3);
+}
+
+static void
+field_fmt_99_112_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 3) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_24_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 24;
+    return info;
+}
+
+static void
+field_fmt_9_24_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfe0001ff) | ((*val & 0xffff) << 9);
+}
+
+static void
+field_fmt_9_24_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 9) & 0x1;
+}
+
+static const shr_enum_map_t bcm78905_a0_rxpmd_reason_type_names[] =
+{
+    BCM78905_A0_RXPMD_REASON_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78905_a0_rxpmd_ieee_802_1as_timestamp_enabled_names[] =
+{
+    BCM78905_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm78905_a0_rxpmd_fields[BCM78905_A0_RXPMD_COUNT] = {
+    {2, field_fmt_0_63_12_11_info, field_fmt_0_63_12_11_set, field_fmt_0_63_12_11_get, NULL, 0},
+    {1, field_fmt_64_67_10_10_info, field_fmt_64_67_10_10_set, field_fmt_64_67_10_10_get, bcm78905_a0_rxpmd_reason_type_names, 0},
+    {1, field_fmt_68_80_10_10_info, field_fmt_68_80_10_10_set, field_fmt_68_80_10_10_get, NULL, 0},
+    {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0},
+    {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0},
+    {1, field_fmt_80_83_10_10_info, field_fmt_80_83_10_10_set, field_fmt_80_83_10_10_get, NULL, 0},
+    {1, field_fmt_80_81_10_10_info, field_fmt_80_81_10_10_set, field_fmt_80_81_10_10_get, NULL, 0},
+    {1, field_fmt_82_89_10_10_info, field_fmt_82_89_10_10_set, field_fmt_82_89_10_10_get, NULL, 0},
+    {1, field_fmt_84_84_10_10_info, field_fmt_84_84_10_10_set, field_fmt_84_84_10_10_get, NULL, 0},
+    {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0},
+    {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0},
+    {1, field_fmt_96_96_9_9_info, field_fmt_96_96_9_9_set, field_fmt_96_96_9_9_get, NULL, 0},
+    {1, field_fmt_97_98_9_9_info, field_fmt_97_98_9_9_set, field_fmt_97_98_9_9_get, NULL, 0},
+    {1, field_fmt_99_112_9_9_info, field_fmt_99_112_9_9_set, field_fmt_99_112_9_9_get, NULL, 0},
+    {1, field_fmt_113_127_9_9_info, field_fmt_113_127_9_9_set, field_fmt_113_127_9_9_get, NULL, 0},
+    {1, field_fmt_128_128_8_8_info, field_fmt_128_128_8_8_set, field_fmt_128_128_8_8_get, NULL, 0},
+    {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0},
+    {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0},
+    {1, field_fmt_131_131_8_8_info, field_fmt_131_131_8_8_set, field_fmt_131_131_8_8_get, NULL, 0},
+    {1, field_fmt_132_132_8_8_info, field_fmt_132_132_8_8_set, field_fmt_132_132_8_8_get, NULL, 0},
+    {1, field_fmt_133_133_8_8_info, field_fmt_133_133_8_8_set, field_fmt_133_133_8_8_get, NULL, 0},
+    {1, field_fmt_134_139_8_8_info, field_fmt_134_139_8_8_set, field_fmt_134_139_8_8_get, NULL, 0},
+    {1, field_fmt_134_136_8_8_info, field_fmt_134_136_8_8_set, field_fmt_134_136_8_8_get, NULL, 0},
+    {1, field_fmt_140_141_8_8_info, field_fmt_140_141_8_8_set, field_fmt_140_141_8_8_get, NULL, 0},
+    {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0},
+    {1, field_fmt_143_143_8_8_info, field_fmt_143_143_8_8_set, field_fmt_143_143_8_8_get, NULL, 0},
+    {1, field_fmt_144_155_8_8_info, field_fmt_144_155_8_8_set, field_fmt_144_155_8_8_get, NULL, 0},
+    {1, field_fmt_156_158_8_8_info, field_fmt_156_158_8_8_set, field_fmt_156_158_8_8_get, NULL, 0},
+    {1, field_fmt_159_159_8_8_info, field_fmt_159_159_8_8_set, field_fmt_159_159_8_8_get, NULL, 0},
+    {1, field_fmt_160_162_7_7_info, field_fmt_160_162_7_7_set, field_fmt_160_162_7_7_get, NULL, 0},
+    {1, field_fmt_163_174_7_7_info, field_fmt_163_174_7_7_set, field_fmt_163_174_7_7_get, NULL, 0},
+    {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0},
+    {1, field_fmt_192_192_6_6_info, field_fmt_192_192_6_6_set, field_fmt_192_192_6_6_get, NULL, 0},
+    {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0},
+    {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0},
+    {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0},
+    {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0},
+    {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0},
+    {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0},
+    {1, field_fmt_272_272_4_4_info, field_fmt_272_272_4_4_set, field_fmt_272_272_4_4_get, bcm78905_a0_rxpmd_ieee_802_1as_timestamp_enabled_names, 0},
+    {1, field_fmt_273_276_4_4_info, field_fmt_273_276_4_4_set, field_fmt_273_276_4_4_get, NULL, 0},
+    {1, field_fmt_277_277_4_4_info, field_fmt_277_277_4_4_set, field_fmt_277_277_4_4_get, NULL, 0},
+    {1, field_fmt_278_278_4_4_info, field_fmt_278_278_4_4_set, field_fmt_278_278_4_4_get, NULL, 0},
+    {1, field_fmt_279_280_4_4_info, field_fmt_279_280_4_4_set, field_fmt_279_280_4_4_get, NULL, 0},
+    {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0},
+    {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm78905_a0_rxpmd_names[] =
+{
+    BCM78905_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78905_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78905_a0_rxpmd_info = {13, BCM78905_A0_RXPMD_COUNT, bcm78905_a0_rxpmd_names, bcm78905_a0_rxpmd_fields};
+    return bcm78905_a0_rxpmd_info;
+}
+
+static bcmpkt_pmd_field_t bcm78905_a0_rx_reason_fields[BCM78905_A0_RX_REASON_COUNT] = {
+    {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0},
+    {1, field_fmt_1_1_12_12_info, field_fmt_1_1_12_12_set, field_fmt_1_1_12_12_get, NULL, 0},
+    {1, field_fmt_2_2_12_12_info, field_fmt_2_2_12_12_set, field_fmt_2_2_12_12_get, NULL, 0},
+    {1, field_fmt_3_3_12_12_info, field_fmt_3_3_12_12_set, field_fmt_3_3_12_12_get, NULL, 0},
+    {1, field_fmt_4_4_12_12_info, field_fmt_4_4_12_12_set, field_fmt_4_4_12_12_get, NULL, 0},
+    {1, field_fmt_5_5_12_12_info, field_fmt_5_5_12_12_set, field_fmt_5_5_12_12_get, NULL, 0},
+    {1, field_fmt_6_6_12_12_info, field_fmt_6_6_12_12_set, field_fmt_6_6_12_12_get, NULL, 0},
+    {1, field_fmt_7_7_12_12_info, field_fmt_7_7_12_12_set, field_fmt_7_7_12_12_get, NULL, 0},
+    {1, field_fmt_8_8_12_12_info, field_fmt_8_8_12_12_set, field_fmt_8_8_12_12_get, NULL, 0},
+    {1, field_fmt_9_9_12_12_info, field_fmt_9_9_12_12_set, field_fmt_9_9_12_12_get, NULL, 0},
+    {1, field_fmt_10_10_12_12_info, field_fmt_10_10_12_12_set, field_fmt_10_10_12_12_get, NULL, 0},
+    {1, field_fmt_11_11_12_12_info, field_fmt_11_11_12_12_set, field_fmt_11_11_12_12_get, NULL, 0},
+    {1, field_fmt_12_12_12_12_info, field_fmt_12_12_12_12_set, field_fmt_12_12_12_12_get, NULL, 0},
+    {1, field_fmt_13_13_12_12_info, field_fmt_13_13_12_12_set, field_fmt_13_13_12_12_get, NULL, 0},
+    {1, field_fmt_14_14_12_12_info, field_fmt_14_14_12_12_set, field_fmt_14_14_12_12_get, NULL, 0},
+    {1, field_fmt_15_15_12_12_info, field_fmt_15_15_12_12_set, field_fmt_15_15_12_12_get, NULL, 0},
+    {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0},
+    {1, field_fmt_17_17_12_12_info, field_fmt_17_17_12_12_set, field_fmt_17_17_12_12_get, NULL, 0},
+    {1, field_fmt_18_18_12_12_info, field_fmt_18_18_12_12_set, field_fmt_18_18_12_12_get, NULL, 0},
+    {1, field_fmt_19_19_12_12_info, field_fmt_19_19_12_12_set, field_fmt_19_19_12_12_get, NULL, 0},
+    {1, field_fmt_20_20_12_12_info, field_fmt_20_20_12_12_set, field_fmt_20_20_12_12_get, NULL, 0},
+    {1, field_fmt_21_21_12_12_info, field_fmt_21_21_12_12_set, field_fmt_21_21_12_12_get, NULL, 0},
+    {1, field_fmt_22_22_12_12_info, field_fmt_22_22_12_12_set, field_fmt_22_22_12_12_get, NULL, 0},
+    {1, field_fmt_23_23_12_12_info, field_fmt_23_23_12_12_set, field_fmt_23_23_12_12_get, NULL, 0},
+    {1, field_fmt_24_24_12_12_info, field_fmt_24_24_12_12_set, field_fmt_24_24_12_12_get, NULL, 0},
+    {1, field_fmt_25_25_12_12_info, field_fmt_25_25_12_12_set, field_fmt_25_25_12_12_get, NULL, 0},
+    {1, field_fmt_26_26_12_12_info, field_fmt_26_26_12_12_set, field_fmt_26_26_12_12_get, NULL, 0},
+    {1, field_fmt_27_27_12_12_info, field_fmt_27_27_12_12_set, field_fmt_27_27_12_12_get, NULL, 0},
+    {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0},
+    {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0},
+    {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0},
+    {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0},
+    {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0},
+    {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0},
+    {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0},
+    {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0},
+    {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0},
+    {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0},
+    {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0},
+    {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0},
+    {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0},
+    {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0},
+    {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0},
+    {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0},
+    {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0},
+    {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm78905_a0_rx_reason_names[] =
+{
+    BCM78905_A0_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78905_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78905_a0_rx_reason_info = {13, BCM78905_A0_RX_REASON_COUNT, bcm78905_a0_rx_reason_names, bcm78905_a0_rx_reason_fields};
+    return bcm78905_a0_rx_reason_info;
+}
+
+static bcmpkt_pmd_field_t bcm78905_a0_ep_rx_reason_fields[BCM78905_A0_EP_RX_REASON_COUNT] = {
+    {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm78905_a0_ep_rx_reason_names[] =
+{
+    BCM78905_A0_EP_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78905_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78905_a0_ep_rx_reason_info = {13, BCM78905_A0_EP_RX_REASON_COUNT, bcm78905_a0_ep_rx_reason_names, bcm78905_a0_ep_rx_reason_fields};
+    return bcm78905_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm78905_a0_txpmd_cpu_tx_destination_type_names[] =
+{
+    BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78905_a0_txpmd_cpu_tx_dp_names[] =
+{
+    BCM78905_A0_TXPMD_CPU_TX_DP_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78905_a0_txpmd_sobmh_from_cpu_destination_type_names[] =
+{
+    BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78905_a0_txpmd_header_type_names[] =
+{
+    BCM78905_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78905_a0_txpmd_start_names[] =
+{
+    BCM78905_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm78905_a0_txpmd_fields[BCM78905_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2},
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2},
+    {1, field_fmt_17_32_3_2_info, field_fmt_17_32_3_2_set, field_fmt_17_32_3_2_get, NULL, 2},
+    {1, field_fmt_33_36_2_2_info, field_fmt_33_36_2_2_set, field_fmt_33_36_2_2_get, bcm78905_a0_txpmd_cpu_tx_destination_type_names, 2},
+    {1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, bcm78905_a0_txpmd_cpu_tx_dp_names, 2},
+    {1, field_fmt_39_42_2_2_info, field_fmt_39_42_2_2_set, field_fmt_39_42_2_2_get, NULL, 2},
+    {1, field_fmt_43_44_2_2_info, field_fmt_43_44_2_2_set, field_fmt_43_44_2_2_get, NULL, 2},
+    {1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 2},
+    {1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2},
+    {1, field_fmt_50_52_2_2_info, field_fmt_50_52_2_2_set, field_fmt_50_52_2_2_get, NULL, 2},
+    {1, field_fmt_53_53_2_2_info, field_fmt_53_53_2_2_set, field_fmt_53_53_2_2_get, NULL, 2},
+    {1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 2},
+    {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 2},
+    {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 2},
+    {1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1},
+    {1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1},
+    {1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1},
+    {1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1},
+    {1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm78905_a0_txpmd_sobmh_from_cpu_destination_type_names, 1},
+    {1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1},
+    {1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1},
+    {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1},
+    {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 1},
+    {1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1},
+    {1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1},
+    {1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1},
+    {1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1},
+    {1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1},
+    {1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1},
+    {1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1},
+    {1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1},
+    {1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1},
+    {1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78905_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78905_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm78905_a0_txpmd_names[] =
+{
+    BCM78905_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78905_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78905_a0_txpmd_info = {4, BCM78905_A0_TXPMD_COUNT, bcm78905_a0_txpmd_names, bcm78905_a0_txpmd_fields};
+    return bcm78905_a0_txpmd_info;
+}
+
+static const shr_enum_map_t bcm78905_a0_lbhdr_header_type_names[] =
+{
+    BCM78905_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78905_a0_lbhdr_start_names[] =
+{
+    BCM78905_A0_LBHDR_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm78905_a0_lbhdr_fields[BCM78905_A0_LBHDR_COUNT] = {
+    {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_66_78_1_1_info, field_fmt_66_78_1_1_set, field_fmt_66_78_1_1_get, NULL, 0},
+    {1, field_fmt_80_82_1_1_info, field_fmt_80_82_1_1_set, field_fmt_80_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_85_93_1_1_info, field_fmt_85_93_1_1_set, field_fmt_85_93_1_1_get, NULL, 0},
+    {1, field_fmt_104_107_0_0_info, field_fmt_104_107_0_0_set, field_fmt_104_107_0_0_get, NULL, 0},
+    {1, field_fmt_108_115_0_0_info, field_fmt_108_115_0_0_set, field_fmt_108_115_0_0_get, NULL, 0},
+    {1, field_fmt_108_111_0_0_info, field_fmt_108_111_0_0_set, field_fmt_108_111_0_0_get, NULL, 0},
+    {1, field_fmt_112_113_0_0_info, field_fmt_112_113_0_0_set, field_fmt_112_113_0_0_get, NULL, 0},
+    {1, field_fmt_114_115_0_0_info, field_fmt_114_115_0_0_set, field_fmt_114_115_0_0_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78905_a0_lbhdr_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78905_a0_lbhdr_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm78905_a0_lbhdr_names[] =
+{
+    BCM78905_A0_LBHDR_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78905_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78905_a0_lbhdr_info = {4, BCM78905_A0_LBHDR_COUNT, bcm78905_a0_lbhdr_names, bcm78905_a0_lbhdr_fields};
+    return bcm78905_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_lbhdr.c
new file mode 100644
index 00000000000..76a90e95fb1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_lbhdr.c
@@ -0,0 +1,328 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides LBHDR access functions for BCM78907_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  LBHDR
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 3, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 3);
+    return val;
+}
+
+static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 13, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 13, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 22, 10, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 22, 10);
+    return val;
+}
+
+static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 2, 13, val);
+}
+
+static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 2, 13);
+    return val;
+}
+
+static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_qos_field_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_qos_field_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_opaque_object_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 11, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_opaque_object_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 11, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_qos_field_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 15, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_qos_field_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_int_pri_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 15, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_int_pri_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_int_cn_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 19, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_int_cn_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 19, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_cng_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 21, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_cng_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 21, 2);
+    return val;
+}
+
+static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_lbhdr_fget_t bcm78907_a0_lbhdr_fget = {
+    {
+        bcmpkt_lbhdr_start_get,
+        bcmpkt_lbhdr_header_type_get,
+        NULL,
+        bcmpkt_lbhdr_pkt_profile_get,
+        bcmpkt_lbhdr_visibility_pkt_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_lbhdr_pp_port_get,
+        bcmpkt_lbhdr_routed_pkt_get,
+        bcmpkt_lbhdr_vrf_get,
+        bcmpkt_lbhdr_vrf_valid_get,
+        bcmpkt_lbhdr_qos_field_valid_get,
+        bcmpkt_lbhdr_opaque_object_get,
+        bcmpkt_lbhdr_qos_field_eth_get,
+        bcmpkt_lbhdr_int_pri_eth_get,
+        bcmpkt_lbhdr_int_cn_eth_get,
+        bcmpkt_lbhdr_cng_eth_get,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm78907_a0_lbhdr_fset = {
+    {
+        bcmpkt_lbhdr_start_set,
+        bcmpkt_lbhdr_header_type_set,
+        NULL,
+        bcmpkt_lbhdr_pkt_profile_set,
+        bcmpkt_lbhdr_visibility_pkt_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_lbhdr_pp_port_set,
+        bcmpkt_lbhdr_routed_pkt_set,
+        bcmpkt_lbhdr_vrf_set,
+        bcmpkt_lbhdr_vrf_valid_set,
+        bcmpkt_lbhdr_qos_field_valid_set,
+        bcmpkt_lbhdr_opaque_object_set,
+        bcmpkt_lbhdr_qos_field_eth_set,
+        bcmpkt_lbhdr_int_pri_eth_set,
+        bcmpkt_lbhdr_int_cn_eth_set,
+        bcmpkt_lbhdr_cng_eth_set,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm78907_a0_lbhdr_figet = {
+    {
+        bcmpkt_lbhdr_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm78907_a0_lbhdr_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78907_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -2, -2, -2,
+};
+
+
+void bcm78907_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78907_a0_lbhdr_view_infos;
+    info->view_types = bcm78907_a0_lbhdr_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_rxpmd.c
new file mode 100644
index 00000000000..f48ca93b4ec
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_rxpmd.c
@@ -0,0 +1,1138 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides RXPMD access functions for BCM78907_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     416
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 22, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 22, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 26, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 26, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 26, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 26, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 17, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 17, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 4, 14, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 4, 14);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 21, 10, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 21, 10);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 4, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 4, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 0, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 0, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 1, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 1, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 20, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 20, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 7, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 7, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 3, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 3, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 7, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 7, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 4, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 4, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 13, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 13, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val)
+{
+    data[5] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[5];
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 0, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 29, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 29, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 2, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 2, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 16, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 16, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 15, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 15, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 2, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 2, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 1, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 1, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 18, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 18, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 4, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 4, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 0, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 0, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 6, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 6, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 16, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 16, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 4, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 4, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 4, 13, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 4, 13);
+    return val;
+}
+
+static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 0, 20, val);
+}
+
+static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 0, 20);
+    return val;
+}
+
+static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 17, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 17, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 5, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 5, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 25, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 25, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 16, 15, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 16, 15);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 23, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 23, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 20, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 20, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 18, 14, val & MASK(14));
+    WORD_FIELD_SET(data[8], 0, 1, (val >> 14) & MASK(1));
+}
+
+static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[9], 18, 14) | (WORD_FIELD_GET(data[8], 0, 1) << 14)) ;
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_opaque_tag_status_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 1, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_opaque_tag_status_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 1, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 16, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 16, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 13;
+}
+
+static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 11;
+    return 2;
+}
+
+static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 0;
+    return 4;
+}
+
+/*******************************************************************************
+ * SWFORMAT:  RX_REASON
+ * BLOCKS:
+ * SIZE:     46
+ ******************************************************************************/
+void bcm78907_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON)) {
+        data[1] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) {
+        data[1] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) {
+        data[1] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) {
+        data[1] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) {
+        data[1] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) {
+        data[1] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) {
+        data[1] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) {
+        data[1] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) {
+        data[1] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) {
+        data[1] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) {
+        data[1] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) {
+        data[1] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) {
+        data[1] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) {
+        data[1] |= (0x1 << 13);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) {
+        data[1] |= (0x1 << 14);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) {
+        data[1] |= (0x1 << 15);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC)) {
+        data[1] |= (0x1 << 16);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST)) {
+        data[1] |= (0x1 << 17);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) {
+        data[1] |= (0x1 << 18);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) {
+        data[1] |= (0x1 << 19);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) {
+        data[1] |= (0x1 << 20);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) {
+        data[1] |= (0x1 << 21);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK)) {
+        data[1] |= (0x1 << 22);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS)) {
+        data[1] |= (0x1 << 23);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION)) {
+        data[1] |= (0x1 << 24);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD)) {
+        data[1] |= (0x1 << 25);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) {
+        data[1] |= (0x1 << 26);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) {
+        data[1] |= (0x1 << 27);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) {
+        data[1] |= (0x1 << 28);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) {
+        data[1] |= (0x1 << 29);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) {
+        data[1] |= (0x1 << 30);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) {
+        data[1] |= (0x1 << 31);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) {
+        data[0] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) {
+        data[0] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) {
+        data[0] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) {
+        data[0] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) {
+        data[0] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) {
+        data[0] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) {
+        data[0] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX)) {
+        data[0] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) {
+        data[0] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) {
+        data[0] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) {
+        data[0] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) {
+        data[0] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) {
+        data[0] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH)) {
+        data[0] |= (0x1 << 13);
+    }
+}
+
+void bcm78907_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON);
+    }
+    if (data[1] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF);
+    }
+    if (data[1] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF);
+    }
+    if (data[1] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE);
+    }
+    if (data[1] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU);
+    }
+    if (data[1] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS);
+    }
+    if (data[1] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS);
+    }
+    if (data[1] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE);
+    }
+    if (data[1] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS);
+    }
+    if (data[1] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS);
+    }
+    if (data[1] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP);
+    }
+    if (data[1] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR);
+    }
+    if (data[1] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT);
+    }
+    if (data[1] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK);
+    }
+    if (data[1] & (0x1 << 14)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR);
+    }
+    if (data[1] & (0x1 << 15)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR);
+    }
+    if (data[1] & (0x1 << 16)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC);
+    }
+    if (data[1] & (0x1 << 17)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST);
+    }
+    if (data[1] & (0x1 << 18)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT);
+    }
+    if (data[1] & (0x1 << 19)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH);
+    }
+    if (data[1] & (0x1 << 20)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR);
+    }
+    if (data[1] & (0x1 << 21)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL);
+    }
+    if (data[1] & (0x1 << 22)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK);
+    }
+    if (data[1] & (0x1 << 23)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS);
+    }
+    if (data[1] & (0x1 << 24)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION);
+    }
+    if (data[1] & (0x1 << 25)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD);
+    }
+    if (data[1] & (0x1 << 26)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP);
+    }
+    if (data[1] & (0x1 << 27)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT);
+    }
+    if (data[1] & (0x1 << 28)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP);
+    }
+    if (data[1] & (0x1 << 29)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION);
+    }
+    if (data[1] & (0x1 << 30)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC);
+    }
+    if (data[1] & (0x1 << 31)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR);
+    }
+    if (data[0] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH);
+    }
+    if (data[0] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR);
+    }
+    if (data[0] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU);
+    }
+    if (data[0] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT);
+    }
+    if (data[0] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL);
+    }
+    if (data[0] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH);
+    }
+    if (data[0] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR);
+    }
+    if (data[0] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX);
+    }
+    if (data[0] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN);
+    }
+    if (data[0] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR);
+    }
+    if (data[0] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS);
+    }
+    if (data[0] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS);
+    }
+    if (data[0] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS);
+    }
+    if (data[0] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH);
+    }
+}
+
+/*******************************************************************************
+ * SWFORMAT:  EP_RX_REASON
+ * BLOCKS:
+ * SIZE:     64
+ ******************************************************************************/
+void bcm78907_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_EP_CTC)) {
+        data[1] |= (0x1 << 0);
+    }
+}
+
+void bcm78907_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_EP_CTC);
+    }
+}
+
+const bcmpkt_rxpmd_fget_t bcm78907_a0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        bcmpkt_rxpmd_cpu_cos_get,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_get,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_get,
+        bcmpkt_rxpmd_outer_cfi_get,
+        bcmpkt_rxpmd_outer_pri_get,
+        bcmpkt_rxpmd_special_packet_indicator_get,
+        bcmpkt_rxpmd_special_packet_type_get,
+        bcmpkt_rxpmd_change_dscp_get,
+        bcmpkt_rxpmd_dscp_get,
+        bcmpkt_rxpmd_change_ecn_get,
+        bcmpkt_rxpmd_ecn_get,
+        NULL,
+        bcmpkt_rxpmd_timestamp_get,
+        bcmpkt_rxpmd_timestamp_hi_get,
+        bcmpkt_rxpmd_mtp_index_get,
+        bcmpkt_rxpmd_bpdu_get,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_get,
+        bcmpkt_rxpmd_ing_tag_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_get,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_get,
+        bcmpkt_rxpmd_rx_bfd_session_index_get,
+        bcmpkt_rxpmd_reason_type_get,
+        bcmpkt_rxpmd_do_not_change_ttl_get,
+        bcmpkt_rxpmd_i2e_classid_type_get,
+        bcmpkt_rxpmd_i2e_classid_get,
+        bcmpkt_rxpmd_ing_l3_intf_get,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_get,
+        bcmpkt_rxpmd_entropy_label_get,
+        bcmpkt_rxpmd_tunnel_decap_type_get,
+        bcmpkt_rxpmd_dlb_id_valid_get,
+        bcmpkt_rxpmd_dlb_id_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_get,
+        bcmpkt_rxpmd_o_nhi_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_opaque_tag_status_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm78907_a0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        bcmpkt_rxpmd_cpu_cos_set,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_set,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_set,
+        bcmpkt_rxpmd_outer_cfi_set,
+        bcmpkt_rxpmd_outer_pri_set,
+        bcmpkt_rxpmd_special_packet_indicator_set,
+        bcmpkt_rxpmd_special_packet_type_set,
+        bcmpkt_rxpmd_change_dscp_set,
+        bcmpkt_rxpmd_dscp_set,
+        bcmpkt_rxpmd_change_ecn_set,
+        bcmpkt_rxpmd_ecn_set,
+        NULL,
+        bcmpkt_rxpmd_timestamp_set,
+        bcmpkt_rxpmd_timestamp_hi_set,
+        bcmpkt_rxpmd_mtp_index_set,
+        bcmpkt_rxpmd_bpdu_set,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_set,
+        bcmpkt_rxpmd_ing_tag_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_set,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_set,
+        bcmpkt_rxpmd_rx_bfd_session_index_set,
+        bcmpkt_rxpmd_reason_type_set,
+        bcmpkt_rxpmd_do_not_change_ttl_set,
+        bcmpkt_rxpmd_i2e_classid_type_set,
+        bcmpkt_rxpmd_i2e_classid_set,
+        bcmpkt_rxpmd_ing_l3_intf_set,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_set,
+        bcmpkt_rxpmd_entropy_label_set,
+        bcmpkt_rxpmd_tunnel_decap_type_set,
+        bcmpkt_rxpmd_dlb_id_valid_set,
+        bcmpkt_rxpmd_dlb_id_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_set,
+        bcmpkt_rxpmd_o_nhi_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_opaque_tag_status_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm78907_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        bcmpkt_rxpmd_i_reason_get,
+        bcmpkt_rxpmd_i_module_hdr_get,
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm78907_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78907_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -2, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
+     -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
+     -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm78907_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78907_a0_rxpmd_view_infos;
+    info->view_types = bcm78907_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_txpmd.c
new file mode 100644
index 00000000000..86bc73b902c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_txpmd.c
@@ -0,0 +1,966 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides TXPMD access functions for BCM78907_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 20, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 20, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 3, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 3, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 8, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 8, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 29, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 29, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 12, 3, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 12, 3);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 30, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 30, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 29, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 29, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 28, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 28, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 17, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 17, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 15, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 15, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 1, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 1, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 9, 16, val);
+}
+
+static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 9, 16);
+    return val;
+}
+
+static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 30, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 30, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 31, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 31, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 17, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 17);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 17, 15, val & MASK(15));
+    WORD_FIELD_SET(data[2], 0, 1, (val >> 15) & MASK(1));
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[3], 17, 15) | (WORD_FIELD_GET(data[2], 0, 1) << 15)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 1, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 1, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 5, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 5, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 7, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 7, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 11, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 11, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 13, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 13, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 18, 3, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 18, 3);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 21, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 21, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 22, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 22, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 23, 9, val & MASK(9));
+    WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4));
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 4, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 4, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm78907_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cell_error_get,
+        NULL,
+        bcmpkt_txpmd_src_modid_get,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        NULL,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cng_get,
+        bcmpkt_txpmd_destination_get,
+        bcmpkt_txpmd_destination_type_get,
+        bcmpkt_txpmd_wred_mark_eligible_get,
+        bcmpkt_txpmd_wred_response_get,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_get,
+        bcmpkt_txpmd_cpu_tx_ecmp_member_id_get,
+        bcmpkt_txpmd_cpu_tx_destination_get,
+        bcmpkt_txpmd_cpu_tx_destination_type_get,
+        bcmpkt_txpmd_cpu_tx_dp_get,
+        bcmpkt_txpmd_cpu_tx_input_pri_get,
+        bcmpkt_txpmd_cpu_tx_int_cn_get,
+        bcmpkt_txpmd_cpu_tx_int_pri_get,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get,
+        bcmpkt_txpmd_cpu_tx_pkt_profile_get,
+        bcmpkt_txpmd_cpu_tx_qos_fields_vld_get,
+        bcmpkt_txpmd_cpu_tx_routed_pkt_get,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cpu_tx_vrf_get,
+        bcmpkt_txpmd_cpu_tx_vrf_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm78907_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cell_error_set,
+        NULL,
+        bcmpkt_txpmd_src_modid_set,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        NULL,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cng_set,
+        bcmpkt_txpmd_destination_set,
+        bcmpkt_txpmd_destination_type_set,
+        bcmpkt_txpmd_wred_mark_eligible_set,
+        bcmpkt_txpmd_wred_response_set,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_set,
+        bcmpkt_txpmd_cpu_tx_ecmp_member_id_set,
+        bcmpkt_txpmd_cpu_tx_destination_set,
+        bcmpkt_txpmd_cpu_tx_destination_type_set,
+        bcmpkt_txpmd_cpu_tx_dp_set,
+        bcmpkt_txpmd_cpu_tx_input_pri_set,
+        bcmpkt_txpmd_cpu_tx_int_cn_set,
+        bcmpkt_txpmd_cpu_tx_int_pri_set,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set,
+        bcmpkt_txpmd_cpu_tx_pkt_profile_set,
+        bcmpkt_txpmd_cpu_tx_qos_fields_vld_set,
+        bcmpkt_txpmd_cpu_tx_routed_pkt_set,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cpu_tx_vrf_set,
+        bcmpkt_txpmd_cpu_tx_vrf_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm78907_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm78907_a0_txpmd_view_types[] = {
+    {"sobmh_from_cpu", 1},
+    {"cpu_tx", 2},
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78907_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -2, -2, -2, -2, -2,  1, -2,  1,  1,  1,  1,  1, -2,  1,
+      1,  1,  1,  1,  1,  1,  1, -2, -2, -2, -2, -2, -2, -2,  1,  1,
+      1,  1,  1,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2, -2,
+     -2,  2,  2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm78907_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78907_a0_txpmd_view_infos;
+    info->view_types = bcm78907_a0_txpmd_view_types;
+    info->view_type_get = bcmpkt_txpmd_header_type_get;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.c
new file mode 100644
index 00000000000..507fbe3a1a5
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.c
@@ -0,0 +1,3178 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field info for BCM78907_A0.
+ *
+ ******************************************************************************/
+
+#include <bcmpkt/bcmpkt_pmd_field_internal.h>
+#include <bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.h>
+
+static bcmpkt_field_info_t
+field_fmt_0_0_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 0;
+    return info;
+}
+
+static void
+field_fmt_0_0_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_0_0_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[12] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_0_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 0;
+    return info;
+}
+
+static void
+field_fmt_0_0_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_0_0_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_16_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_0_16_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffe0000) | (*val & 0x1ffff);
+}
+
+static void
+field_fmt_0_16_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0x1ffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_63_12_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_0_63_12_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = val[0];
+    pmd[11] = val[1];
+}
+
+static void
+field_fmt_0_63_12_11_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[12];
+    val[1] = pmd[11];
+}
+
+static bcmpkt_field_info_t
+field_fmt_0_7_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 0;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[3] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_100_113_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 100;
+    info.maxbit = 113;
+    return info;
+}
+
+static void
+field_fmt_100_113_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffc000f) | ((*val & 0x3fff) << 4);
+}
+
+static void
+field_fmt_100_113_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 4) & 0x3fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_107_110_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 107;
+    info.maxbit = 110;
+    return info;
+}
+
+static void
+field_fmt_107_110_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffff87ff) | ((*val & 0xf) << 11);
+}
+
+static void
+field_fmt_107_110_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 11) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_10_10_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 10;
+    info.maxbit = 10;
+    return info;
+}
+
+static void
+field_fmt_10_10_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_10_10_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_114_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 114;
+    return info;
+}
+
+static void
+field_fmt_111_114_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xfff87fff) | ((*val & 0xf) << 15);
+}
+
+static void
+field_fmt_111_114_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_111_118_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 111;
+    info.maxbit = 118;
+    return info;
+}
+
+static void
+field_fmt_111_118_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xff807fff) | ((*val & 0xff) << 15);
+}
+
+static void
+field_fmt_111_118_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 15) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_114_128_9_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 114;
+    info.maxbit = 128;
+    return info;
+}
+
+static void
+field_fmt_114_128_9_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0x3ffff) | (*val << 18);
+    pmd[8] = (pmd[8] & 0xfffffffe) | ((*val >> 14) & 0x1);
+}
+
+static void
+field_fmt_114_128_9_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[9] >> 18) | (pmd[8] << 14)) & 0x7fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_115_116_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 115;
+    info.maxbit = 116;
+    return info;
+}
+
+static void
+field_fmt_115_116_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xffe7ffff) | ((*val & 0x3) << 19);
+}
+
+static void
+field_fmt_115_116_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 19) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_117_118_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 117;
+    info.maxbit = 118;
+    return info;
+}
+
+static void
+field_fmt_117_118_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xff9fffff) | ((*val & 0x3) << 21);
+}
+
+static void
+field_fmt_117_118_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 21) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_11_11_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 11;
+    info.maxbit = 11;
+    return info;
+}
+
+static void
+field_fmt_11_11_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_11_11_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_120_125_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 120;
+    info.maxbit = 125;
+    return info;
+}
+
+static void
+field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24);
+}
+
+static void
+field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 24) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_126_127_0_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 126;
+    info.maxbit = 127;
+    return info;
+}
+
+static void
+field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30);
+}
+
+static void
+field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[0] >> 30) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_129_129_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 129;
+    info.maxbit = 129;
+    return info;
+}
+
+static void
+field_fmt_129_129_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_129_129_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_12_12_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 12;
+    info.maxbit = 12;
+    return info;
+}
+
+static void
+field_fmt_12_12_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_12_12_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_130_130_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 130;
+    info.maxbit = 130;
+    return info;
+}
+
+static void
+field_fmt_130_130_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_130_130_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_131_131_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 131;
+    info.maxbit = 131;
+    return info;
+}
+
+static void
+field_fmt_131_131_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_131_131_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_132_132_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 132;
+    info.maxbit = 132;
+    return info;
+}
+
+static void
+field_fmt_132_132_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_132_132_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_133_133_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 133;
+    info.maxbit = 133;
+    return info;
+}
+
+static void
+field_fmt_133_133_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_133_133_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_134_134_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 134;
+    info.maxbit = 134;
+    return info;
+}
+
+static void
+field_fmt_134_134_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_134_134_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_135_137_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 135;
+    info.maxbit = 137;
+    return info;
+}
+
+static void
+field_fmt_135_137_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffffc7f) | ((*val & 0x7) << 7);
+}
+
+static void
+field_fmt_135_137_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 7) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_135_140_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 135;
+    info.maxbit = 140;
+    return info;
+}
+
+static void
+field_fmt_135_140_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffffe07f) | ((*val & 0x3f) << 7);
+}
+
+static void
+field_fmt_135_140_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 7) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_13_13_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 13;
+    info.maxbit = 13;
+    return info;
+}
+
+static void
+field_fmt_13_13_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_13_13_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_141_142_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 141;
+    info.maxbit = 142;
+    return info;
+}
+
+static void
+field_fmt_141_142_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffff9fff) | ((*val & 0x3) << 13);
+}
+
+static void
+field_fmt_141_142_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 13) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_143_143_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 143;
+    info.maxbit = 143;
+    return info;
+}
+
+static void
+field_fmt_143_143_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_143_143_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_144_144_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 144;
+    info.maxbit = 144;
+    return info;
+}
+
+static void
+field_fmt_144_144_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_144_144_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_145_156_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 145;
+    info.maxbit = 156;
+    return info;
+}
+
+static void
+field_fmt_145_156_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0xe001ffff) | ((*val & 0xfff) << 17);
+}
+
+static void
+field_fmt_145_156_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 17) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_14_14_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 14;
+    info.maxbit = 14;
+    return info;
+}
+
+static void
+field_fmt_14_14_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_14_14_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_157_159_8_8_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 157;
+    info.maxbit = 159;
+    return info;
+}
+
+static void
+field_fmt_157_159_8_8_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[8] = (pmd[8] & 0x1fffffff) | (*val << 29);
+}
+
+static void
+field_fmt_157_159_8_8_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[8] >> 29) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_15_15_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 15;
+    info.maxbit = 15;
+    return info;
+}
+
+static void
+field_fmt_15_15_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_15_15_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_160_160_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 160;
+    info.maxbit = 160;
+    return info;
+}
+
+static void
+field_fmt_160_160_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_160_160_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[7] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_161_163_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 161;
+    info.maxbit = 163;
+    return info;
+}
+
+static void
+field_fmt_161_163_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xfffffff1) | ((*val & 0x7) << 1);
+}
+
+static void
+field_fmt_161_163_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 1) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_164_175_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 164;
+    info.maxbit = 175;
+    return info;
+}
+
+static void
+field_fmt_164_175_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0xffff000f) | ((*val & 0xfff) << 4);
+}
+
+static void
+field_fmt_164_175_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 4) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_16_16_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 16;
+    info.maxbit = 16;
+    return info;
+}
+
+static void
+field_fmt_16_16_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_16_16_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_176_190_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 176;
+    info.maxbit = 190;
+    return info;
+}
+
+static void
+field_fmt_176_190_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x8000ffff) | ((*val & 0x7fff) << 16);
+}
+
+static void
+field_fmt_176_190_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 16) & 0x7fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_17_17_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 17;
+    info.maxbit = 17;
+    return info;
+}
+
+static void
+field_fmt_17_17_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_17_17_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_17_32_3_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 17;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_17_32_3_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x1ffff) | (*val << 17);
+    pmd[2] = (pmd[2] & 0xfffffffe) | ((*val >> 15) & 0x1);
+}
+
+static void
+field_fmt_17_32_3_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[3] >> 17) | (pmd[2] << 15)) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_18_18_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 18;
+    info.maxbit = 18;
+    return info;
+}
+
+static void
+field_fmt_18_18_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffbffff) | ((*val & 0x1) << 18);
+}
+
+static void
+field_fmt_18_18_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 18) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_191_191_7_7_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 191;
+    info.maxbit = 191;
+    return info;
+}
+
+static void
+field_fmt_191_191_7_7_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[7] = (pmd[7] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_191_191_7_7_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[7] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_192_211_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 192;
+    info.maxbit = 211;
+    return info;
+}
+
+static void
+field_fmt_192_211_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xfff00000) | (*val & 0xfffff);
+}
+
+static void
+field_fmt_192_211_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[6] & 0xfffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_19_19_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 19;
+    info.maxbit = 19;
+    return info;
+}
+
+static void
+field_fmt_19_19_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_19_19_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_1_1_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 1;
+    info.maxbit = 1;
+    return info;
+}
+
+static void
+field_fmt_1_1_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_1_1_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_1_2_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 1;
+    info.maxbit = 2;
+    return info;
+}
+
+static void
+field_fmt_1_2_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffff9) | ((*val & 0x3) << 1);
+}
+
+static void
+field_fmt_1_2_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 1) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_20_20_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 20;
+    info.maxbit = 20;
+    return info;
+}
+
+static void
+field_fmt_20_20_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_20_20_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_212_212_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 212;
+    info.maxbit = 212;
+    return info;
+}
+
+static void
+field_fmt_212_212_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_212_212_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_213_222_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 213;
+    info.maxbit = 222;
+    return info;
+}
+
+static void
+field_fmt_213_222_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x801fffff) | ((*val & 0x3ff) << 21);
+}
+
+static void
+field_fmt_213_222_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 21) & 0x3ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_21_21_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 21;
+    info.maxbit = 21;
+    return info;
+}
+
+static void
+field_fmt_21_21_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_21_21_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_223_223_6_6_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 223;
+    info.maxbit = 223;
+    return info;
+}
+
+static void
+field_fmt_223_223_6_6_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_223_223_6_6_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[6] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_224_255_5_5_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 224;
+    info.maxbit = 255;
+    return info;
+}
+
+static void
+field_fmt_224_255_5_5_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[5] = *val;
+}
+
+static void
+field_fmt_224_255_5_5_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[5];
+}
+
+static bcmpkt_field_info_t
+field_fmt_22_22_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 22;
+    info.maxbit = 22;
+    return info;
+}
+
+static void
+field_fmt_22_22_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_22_22_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_23_23_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 23;
+    info.maxbit = 23;
+    return info;
+}
+
+static void
+field_fmt_23_23_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xff7fffff) | ((*val & 0x1) << 23);
+}
+
+static void
+field_fmt_23_23_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 23) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_24_24_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 24;
+    info.maxbit = 24;
+    return info;
+}
+
+static void
+field_fmt_24_24_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfeffffff) | ((*val & 0x1) << 24);
+}
+
+static void
+field_fmt_24_24_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 24) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_256_271_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 256;
+    info.maxbit = 271;
+    return info;
+}
+
+static void
+field_fmt_256_271_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffff0000) | (*val & 0xffff);
+}
+
+static void
+field_fmt_256_271_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[4] & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_25_25_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 25;
+    info.maxbit = 25;
+    return info;
+}
+
+static void
+field_fmt_25_25_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfdffffff) | ((*val & 0x1) << 25);
+}
+
+static void
+field_fmt_25_25_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 25) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_25_28_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 25;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_25_28_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xe1ffffff) | ((*val & 0xf) << 25);
+}
+
+static void
+field_fmt_25_28_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 25) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_26_26_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 26;
+    info.maxbit = 26;
+    return info;
+}
+
+static void
+field_fmt_26_26_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfbffffff) | ((*val & 0x1) << 26);
+}
+
+static void
+field_fmt_26_26_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 26) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_272_272_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 272;
+    info.maxbit = 272;
+    return info;
+}
+
+static void
+field_fmt_272_272_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfffeffff) | ((*val & 0x1) << 16);
+}
+
+static void
+field_fmt_272_272_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 16) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_273_276_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 273;
+    info.maxbit = 276;
+    return info;
+}
+
+static void
+field_fmt_273_276_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffe1ffff) | ((*val & 0xf) << 17);
+}
+
+static void
+field_fmt_273_276_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 17) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_277_277_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 277;
+    info.maxbit = 277;
+    return info;
+}
+
+static void
+field_fmt_277_277_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_277_277_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_278_278_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 278;
+    info.maxbit = 278;
+    return info;
+}
+
+static void
+field_fmt_278_278_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_278_278_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_279_280_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 279;
+    info.maxbit = 280;
+    return info;
+}
+
+static void
+field_fmt_279_280_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0xfe7fffff) | ((*val & 0x3) << 23);
+}
+
+static void
+field_fmt_279_280_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 23) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_27_27_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 27;
+    info.maxbit = 27;
+    return info;
+}
+
+static void
+field_fmt_27_27_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xf7ffffff) | ((*val & 0x1) << 27);
+}
+
+static void
+field_fmt_27_27_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 27) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_281_287_4_4_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 281;
+    info.maxbit = 287;
+    return info;
+}
+
+static void
+field_fmt_281_287_4_4_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[4] = (pmd[4] & 0x1ffffff) | (*val << 25);
+}
+
+static void
+field_fmt_281_287_4_4_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[4] >> 25) & 0x7f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_288_415_3_0_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 288;
+    info.maxbit = 415;
+    return info;
+}
+
+static void
+field_fmt_288_415_3_0_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = val[0];
+    pmd[2] = val[1];
+    pmd[1] = val[2];
+    pmd[0] = val[3];
+}
+
+static void
+field_fmt_288_415_3_0_get(uint32_t *pmd, uint32_t *val)
+{
+    val[0] = pmd[3];
+    val[1] = pmd[2];
+    val[2] = pmd[1];
+    val[3] = pmd[0];
+}
+
+static bcmpkt_field_info_t
+field_fmt_28_28_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 28;
+    info.maxbit = 28;
+    return info;
+}
+
+static void
+field_fmt_28_28_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_28_28_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_29_29_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 29;
+    info.maxbit = 29;
+    return info;
+}
+
+static void
+field_fmt_29_29_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_29_29_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_2_2_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 2;
+    info.maxbit = 2;
+    return info;
+}
+
+static void
+field_fmt_2_2_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_2_2_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_30_30_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 30;
+    info.maxbit = 30;
+    return info;
+}
+
+static void
+field_fmt_30_30_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_30_30_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_31_31_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 31;
+    info.maxbit = 31;
+    return info;
+}
+
+static void
+field_fmt_31_31_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_31_31_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_32_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 32;
+    return info;
+}
+
+static void
+field_fmt_32_32_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffe) | (*val & 0x1);
+}
+
+static void
+field_fmt_32_32_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[11] & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_32_39_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 32;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_32_39_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff00) | (*val & 0xff);
+}
+
+static void
+field_fmt_32_39_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[2] & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_33_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 33;
+    return info;
+}
+
+static void
+field_fmt_33_33_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_33_33_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_33_36_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 33;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_33_36_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffffe1) | ((*val & 0xf) << 1);
+}
+
+static void
+field_fmt_33_36_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 1) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_34_34_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 34;
+    info.maxbit = 34;
+    return info;
+}
+
+static void
+field_fmt_34_34_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffffb) | ((*val & 0x1) << 2);
+}
+
+static void
+field_fmt_34_34_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 2) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_35_35_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 35;
+    info.maxbit = 35;
+    return info;
+}
+
+static void
+field_fmt_35_35_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_35_35_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_36_36_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 36;
+    info.maxbit = 36;
+    return info;
+}
+
+static void
+field_fmt_36_36_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_36_36_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_37_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 37;
+    return info;
+}
+
+static void
+field_fmt_37_37_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_37_37_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_37_38_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 37;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_37_38_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffff9f) | ((*val & 0x3) << 5);
+}
+
+static void
+field_fmt_37_38_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 5) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_38_38_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 38;
+    info.maxbit = 38;
+    return info;
+}
+
+static void
+field_fmt_38_38_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_38_38_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_39_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 39;
+    return info;
+}
+
+static void
+field_fmt_39_39_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_39_39_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_39_42_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 39;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_39_42_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffff87f) | ((*val & 0xf) << 7);
+}
+
+static void
+field_fmt_39_42_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 7) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_3_3_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 3;
+    info.maxbit = 3;
+    return info;
+}
+
+static void
+field_fmt_3_3_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffff7) | ((*val & 0x1) << 3);
+}
+
+static void
+field_fmt_3_3_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 3) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_3_8_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 3;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_3_8_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfffffe07) | ((*val & 0x3f) << 3);
+}
+
+static void
+field_fmt_3_8_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 3) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_40_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 40;
+    return info;
+}
+
+static void
+field_fmt_40_40_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_40_40_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_40_43_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 40;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_40_43_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffff0ff) | ((*val & 0xf) << 8);
+}
+
+static void
+field_fmt_40_43_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 8) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_41_41_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 41;
+    info.maxbit = 41;
+    return info;
+}
+
+static void
+field_fmt_41_41_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_41_41_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 9) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_42_42_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 42;
+    info.maxbit = 42;
+    return info;
+}
+
+static void
+field_fmt_42_42_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffffbff) | ((*val & 0x1) << 10);
+}
+
+static void
+field_fmt_42_42_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 10) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_43_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 43;
+    return info;
+}
+
+static void
+field_fmt_43_43_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xfffff7ff) | ((*val & 0x1) << 11);
+}
+
+static void
+field_fmt_43_43_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 11) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_43_44_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 43;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_43_44_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffe7ff) | ((*val & 0x3) << 11);
+}
+
+static void
+field_fmt_43_44_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 11) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_44_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 44;
+    return info;
+}
+
+static void
+field_fmt_44_44_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffefff) | ((*val & 0x1) << 12);
+}
+
+static void
+field_fmt_44_44_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 12) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_44_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 44;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_44_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff8fff) | ((*val & 0x7) << 12);
+}
+
+static void
+field_fmt_44_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 12) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_11_11_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_11_11_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[11] = (pmd[11] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_11_11_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[11] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_45_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 45;
+    return info;
+}
+
+static void
+field_fmt_45_45_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffdfff) | ((*val & 0x1) << 13);
+}
+
+static void
+field_fmt_45_45_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_45_48_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 45;
+    info.maxbit = 48;
+    return info;
+}
+
+static void
+field_fmt_45_48_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffe1fff) | ((*val & 0xf) << 13);
+}
+
+static void
+field_fmt_45_48_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 13) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_46_46_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 46;
+    info.maxbit = 46;
+    return info;
+}
+
+static void
+field_fmt_46_46_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffffbfff) | ((*val & 0x1) << 14);
+}
+
+static void
+field_fmt_46_46_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 14) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_47_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 47;
+    return info;
+}
+
+static void
+field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15);
+}
+
+static void
+field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_47_48_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 47;
+    info.maxbit = 48;
+    return info;
+}
+
+static void
+field_fmt_47_48_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffe7fff) | ((*val & 0x3) << 15);
+}
+
+static void
+field_fmt_47_48_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 15) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_49_49_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 49;
+    info.maxbit = 49;
+    return info;
+}
+
+static void
+field_fmt_49_49_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfffdffff) | ((*val & 0x1) << 17);
+}
+
+static void
+field_fmt_49_49_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 17) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_49_50_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 49;
+    info.maxbit = 50;
+    return info;
+}
+
+static void
+field_fmt_49_50_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff9ffff) | ((*val & 0x3) << 17);
+}
+
+static void
+field_fmt_49_50_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 17) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_4_4_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 4;
+    info.maxbit = 4;
+    return info;
+}
+
+static void
+field_fmt_4_4_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_4_4_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_50_52_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 50;
+    info.maxbit = 52;
+    return info;
+}
+
+static void
+field_fmt_50_52_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffe3ffff) | ((*val & 0x7) << 18);
+}
+
+static void
+field_fmt_50_52_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 18) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_51_51_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 51;
+    info.maxbit = 51;
+    return info;
+}
+
+static void
+field_fmt_51_51_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_51_51_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_52_59_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 52;
+    info.maxbit = 59;
+    return info;
+}
+
+static void
+field_fmt_52_59_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xf00fffff) | ((*val & 0xff) << 20);
+}
+
+static void
+field_fmt_52_59_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 20) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_53_53_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 53;
+    info.maxbit = 53;
+    return info;
+}
+
+static void
+field_fmt_53_53_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffdfffff) | ((*val & 0x1) << 21);
+}
+
+static void
+field_fmt_53_53_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 21) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_54_54_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 54;
+    info.maxbit = 54;
+    return info;
+}
+
+static void
+field_fmt_54_54_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xffbfffff) | ((*val & 0x1) << 22);
+}
+
+static void
+field_fmt_54_54_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 22) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_55_67_2_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 55;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_55_67_2_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffff) | (*val << 23);
+    pmd[1] = (pmd[1] & 0xfffffff0) | ((*val >> 9) & 0xf);
+}
+
+static void
+field_fmt_55_67_2_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = ((pmd[2] >> 23) | (pmd[1] << 9)) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_5_5_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 5;
+    info.maxbit = 5;
+    return info;
+}
+
+static void
+field_fmt_5_5_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffffdf) | ((*val & 0x1) << 5);
+}
+
+static void
+field_fmt_5_5_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 5) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_60_60_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 60;
+    info.maxbit = 60;
+    return info;
+}
+
+static void
+field_fmt_60_60_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xefffffff) | ((*val & 0x1) << 28);
+}
+
+static void
+field_fmt_60_60_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 28) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_61_61_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 61;
+    info.maxbit = 61;
+    return info;
+}
+
+static void
+field_fmt_61_61_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xdfffffff) | ((*val & 0x1) << 29);
+}
+
+static void
+field_fmt_61_61_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 29) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_62_62_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 62;
+    info.maxbit = 62;
+    return info;
+}
+
+static void
+field_fmt_62_62_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0xbfffffff) | ((*val & 0x1) << 30);
+}
+
+static void
+field_fmt_62_62_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 30) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_63_63_2_2_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 63;
+    info.maxbit = 63;
+    return info;
+}
+
+static void
+field_fmt_63_63_2_2_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31);
+}
+
+static void
+field_fmt_63_63_2_2_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[2] >> 31) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_64_67_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 64;
+    info.maxbit = 67;
+    return info;
+}
+
+static void
+field_fmt_64_67_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffffff0) | (*val & 0xf);
+}
+
+static void
+field_fmt_64_67_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = pmd[10] & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_66_78_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 66;
+    info.maxbit = 78;
+    return info;
+}
+
+static void
+field_fmt_66_78_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffff8003) | ((*val & 0x1fff) << 2);
+}
+
+static void
+field_fmt_66_78_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 2) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_68_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 68;
+    return info;
+}
+
+static void
+field_fmt_68_68_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xffffffef) | ((*val & 0x1) << 4);
+}
+
+static void
+field_fmt_68_68_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 4) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_79_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 79;
+    return info;
+}
+
+static void
+field_fmt_68_79_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffff000f) | ((*val & 0xfff) << 4);
+}
+
+static void
+field_fmt_68_79_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0xfff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_68_80_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 68;
+    info.maxbit = 80;
+    return info;
+}
+
+static void
+field_fmt_68_80_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffe000f) | ((*val & 0x1fff) << 4);
+}
+
+static void
+field_fmt_68_80_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 4) & 0x1fff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_6_6_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 6;
+    info.maxbit = 6;
+    return info;
+}
+
+static void
+field_fmt_6_6_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffffbf) | ((*val & 0x1) << 6);
+}
+
+static void
+field_fmt_6_6_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 6) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_7_7_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 7;
+    info.maxbit = 7;
+    return info;
+}
+
+static void
+field_fmt_7_7_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xffffff7f) | ((*val & 0x1) << 7);
+}
+
+static void
+field_fmt_7_7_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 7) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_81_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 81;
+    return info;
+}
+
+static void
+field_fmt_80_81_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfffcffff) | ((*val & 0x3) << 16);
+}
+
+static void
+field_fmt_80_81_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 16) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_82_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 82;
+    return info;
+}
+
+static void
+field_fmt_80_82_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff8ffff) | ((*val & 0x7) << 16);
+}
+
+static void
+field_fmt_80_82_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 16) & 0x7;
+}
+
+static bcmpkt_field_info_t
+field_fmt_80_83_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 80;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_80_83_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfff0ffff) | ((*val & 0xf) << 16);
+}
+
+static void
+field_fmt_80_83_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 16) & 0xf;
+}
+
+static bcmpkt_field_info_t
+field_fmt_82_89_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 82;
+    info.maxbit = 89;
+    return info;
+}
+
+static void
+field_fmt_82_89_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xfc03ffff) | ((*val & 0xff) << 18);
+}
+
+static void
+field_fmt_82_89_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 18) & 0xff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_83_83_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 83;
+    info.maxbit = 83;
+    return info;
+}
+
+static void
+field_fmt_83_83_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0xfff7ffff) | ((*val & 0x1) << 19);
+}
+
+static void
+field_fmt_83_83_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 19) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_84_84_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 84;
+    info.maxbit = 84;
+    return info;
+}
+
+static void
+field_fmt_84_84_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0xffefffff) | ((*val & 0x1) << 20);
+}
+
+static void
+field_fmt_84_84_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 20) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_86_95_1_1_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 86;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_86_95_1_1_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[1] = (pmd[1] & 0x3fffff) | (*val << 22);
+}
+
+static void
+field_fmt_86_95_1_1_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[1] >> 22) & 0x3ff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_8_8_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 8;
+    info.maxbit = 8;
+    return info;
+}
+
+static void
+field_fmt_8_8_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffeff) | ((*val & 0x1) << 8);
+}
+
+static void
+field_fmt_8_8_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 8) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_90_95_10_10_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 90;
+    info.maxbit = 95;
+    return info;
+}
+
+static void
+field_fmt_90_95_10_10_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[10] = (pmd[10] & 0x3ffffff) | (*val << 26);
+}
+
+static void
+field_fmt_90_95_10_10_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[10] >> 26) & 0x3f;
+}
+
+static bcmpkt_field_info_t
+field_fmt_97_97_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 97;
+    info.maxbit = 97;
+    return info;
+}
+
+static void
+field_fmt_97_97_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffffd) | ((*val & 0x1) << 1);
+}
+
+static void
+field_fmt_97_97_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 1) & 0x1;
+}
+
+static bcmpkt_field_info_t
+field_fmt_98_99_9_9_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 98;
+    info.maxbit = 99;
+    return info;
+}
+
+static void
+field_fmt_98_99_9_9_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[9] = (pmd[9] & 0xfffffff3) | ((*val & 0x3) << 2);
+}
+
+static void
+field_fmt_98_99_9_9_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[9] >> 2) & 0x3;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_24_3_3_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 24;
+    return info;
+}
+
+static void
+field_fmt_9_24_3_3_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[3] = (pmd[3] & 0xfe0001ff) | ((*val & 0xffff) << 9);
+}
+
+static void
+field_fmt_9_24_3_3_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[3] >> 9) & 0xffff;
+}
+
+static bcmpkt_field_info_t
+field_fmt_9_9_12_12_info(void)
+{
+    bcmpkt_field_info_t info;
+    info.minbit = 9;
+    info.maxbit = 9;
+    return info;
+}
+
+static void
+field_fmt_9_9_12_12_set(uint32_t *pmd, uint32_t *val)
+{
+    pmd[12] = (pmd[12] & 0xfffffdff) | ((*val & 0x1) << 9);
+}
+
+static void
+field_fmt_9_9_12_12_get(uint32_t *pmd, uint32_t *val)
+{
+    *val = (pmd[12] >> 9) & 0x1;
+}
+
+static const shr_enum_map_t bcm78907_a0_rxpmd_reason_type_names[] =
+{
+    BCM78907_A0_RXPMD_REASON_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78907_a0_rxpmd_ieee_802_1as_timestamp_enabled_names[] =
+{
+    BCM78907_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm78907_a0_rxpmd_fields[BCM78907_A0_RXPMD_COUNT] = {
+    {2, field_fmt_0_63_12_11_info, field_fmt_0_63_12_11_set, field_fmt_0_63_12_11_get, NULL, 0},
+    {1, field_fmt_64_67_10_10_info, field_fmt_64_67_10_10_set, field_fmt_64_67_10_10_get, bcm78907_a0_rxpmd_reason_type_names, 0},
+    {1, field_fmt_68_80_10_10_info, field_fmt_68_80_10_10_set, field_fmt_68_80_10_10_get, NULL, 0},
+    {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0},
+    {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0},
+    {1, field_fmt_80_83_10_10_info, field_fmt_80_83_10_10_set, field_fmt_80_83_10_10_get, NULL, 0},
+    {1, field_fmt_80_81_10_10_info, field_fmt_80_81_10_10_set, field_fmt_80_81_10_10_get, NULL, 0},
+    {1, field_fmt_82_89_10_10_info, field_fmt_82_89_10_10_set, field_fmt_82_89_10_10_get, NULL, 0},
+    {1, field_fmt_84_84_10_10_info, field_fmt_84_84_10_10_set, field_fmt_84_84_10_10_get, NULL, 0},
+    {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0},
+    {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0},
+    {1, field_fmt_97_97_9_9_info, field_fmt_97_97_9_9_set, field_fmt_97_97_9_9_get, NULL, 0},
+    {1, field_fmt_98_99_9_9_info, field_fmt_98_99_9_9_set, field_fmt_98_99_9_9_get, NULL, 0},
+    {1, field_fmt_100_113_9_9_info, field_fmt_100_113_9_9_set, field_fmt_100_113_9_9_get, NULL, 0},
+    {1, field_fmt_114_128_9_8_info, field_fmt_114_128_9_8_set, field_fmt_114_128_9_8_get, NULL, 0},
+    {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0},
+    {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0},
+    {1, field_fmt_131_131_8_8_info, field_fmt_131_131_8_8_set, field_fmt_131_131_8_8_get, NULL, 0},
+    {1, field_fmt_132_132_8_8_info, field_fmt_132_132_8_8_set, field_fmt_132_132_8_8_get, NULL, 0},
+    {1, field_fmt_133_133_8_8_info, field_fmt_133_133_8_8_set, field_fmt_133_133_8_8_get, NULL, 0},
+    {1, field_fmt_134_134_8_8_info, field_fmt_134_134_8_8_set, field_fmt_134_134_8_8_get, NULL, 0},
+    {1, field_fmt_135_140_8_8_info, field_fmt_135_140_8_8_set, field_fmt_135_140_8_8_get, NULL, 0},
+    {1, field_fmt_135_137_8_8_info, field_fmt_135_137_8_8_set, field_fmt_135_137_8_8_get, NULL, 0},
+    {1, field_fmt_141_142_8_8_info, field_fmt_141_142_8_8_set, field_fmt_141_142_8_8_get, NULL, 0},
+    {1, field_fmt_143_143_8_8_info, field_fmt_143_143_8_8_set, field_fmt_143_143_8_8_get, NULL, 0},
+    {1, field_fmt_144_144_8_8_info, field_fmt_144_144_8_8_set, field_fmt_144_144_8_8_get, NULL, 0},
+    {1, field_fmt_145_156_8_8_info, field_fmt_145_156_8_8_set, field_fmt_145_156_8_8_get, NULL, 0},
+    {1, field_fmt_157_159_8_8_info, field_fmt_157_159_8_8_set, field_fmt_157_159_8_8_get, NULL, 0},
+    {1, field_fmt_160_160_7_7_info, field_fmt_160_160_7_7_set, field_fmt_160_160_7_7_get, NULL, 0},
+    {1, field_fmt_161_163_7_7_info, field_fmt_161_163_7_7_set, field_fmt_161_163_7_7_get, NULL, 0},
+    {1, field_fmt_164_175_7_7_info, field_fmt_164_175_7_7_set, field_fmt_164_175_7_7_get, NULL, 0},
+    {1, field_fmt_176_190_7_7_info, field_fmt_176_190_7_7_set, field_fmt_176_190_7_7_get, NULL, 0},
+    {1, field_fmt_191_191_7_7_info, field_fmt_191_191_7_7_set, field_fmt_191_191_7_7_get, NULL, 0},
+    {1, field_fmt_192_211_6_6_info, field_fmt_192_211_6_6_set, field_fmt_192_211_6_6_get, NULL, 0},
+    {1, field_fmt_212_212_6_6_info, field_fmt_212_212_6_6_set, field_fmt_212_212_6_6_get, NULL, 0},
+    {1, field_fmt_213_222_6_6_info, field_fmt_213_222_6_6_set, field_fmt_213_222_6_6_get, NULL, 0},
+    {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0},
+    {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0},
+    {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0},
+    {1, field_fmt_272_272_4_4_info, field_fmt_272_272_4_4_set, field_fmt_272_272_4_4_get, bcm78907_a0_rxpmd_ieee_802_1as_timestamp_enabled_names, 0},
+    {1, field_fmt_273_276_4_4_info, field_fmt_273_276_4_4_set, field_fmt_273_276_4_4_get, NULL, 0},
+    {1, field_fmt_277_277_4_4_info, field_fmt_277_277_4_4_set, field_fmt_277_277_4_4_get, NULL, 0},
+    {1, field_fmt_278_278_4_4_info, field_fmt_278_278_4_4_set, field_fmt_278_278_4_4_get, NULL, 0},
+    {1, field_fmt_279_280_4_4_info, field_fmt_279_280_4_4_set, field_fmt_279_280_4_4_get, NULL, 0},
+    {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0},
+    {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm78907_a0_rxpmd_names[] =
+{
+    BCM78907_A0_RXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78907_a0_rxpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78907_a0_rxpmd_info = {13, BCM78907_A0_RXPMD_COUNT, bcm78907_a0_rxpmd_names, bcm78907_a0_rxpmd_fields};
+    return bcm78907_a0_rxpmd_info;
+}
+
+static bcmpkt_pmd_field_t bcm78907_a0_rx_reason_fields[BCM78907_A0_RX_REASON_COUNT] = {
+    {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0},
+    {1, field_fmt_1_1_12_12_info, field_fmt_1_1_12_12_set, field_fmt_1_1_12_12_get, NULL, 0},
+    {1, field_fmt_2_2_12_12_info, field_fmt_2_2_12_12_set, field_fmt_2_2_12_12_get, NULL, 0},
+    {1, field_fmt_3_3_12_12_info, field_fmt_3_3_12_12_set, field_fmt_3_3_12_12_get, NULL, 0},
+    {1, field_fmt_4_4_12_12_info, field_fmt_4_4_12_12_set, field_fmt_4_4_12_12_get, NULL, 0},
+    {1, field_fmt_5_5_12_12_info, field_fmt_5_5_12_12_set, field_fmt_5_5_12_12_get, NULL, 0},
+    {1, field_fmt_6_6_12_12_info, field_fmt_6_6_12_12_set, field_fmt_6_6_12_12_get, NULL, 0},
+    {1, field_fmt_7_7_12_12_info, field_fmt_7_7_12_12_set, field_fmt_7_7_12_12_get, NULL, 0},
+    {1, field_fmt_8_8_12_12_info, field_fmt_8_8_12_12_set, field_fmt_8_8_12_12_get, NULL, 0},
+    {1, field_fmt_9_9_12_12_info, field_fmt_9_9_12_12_set, field_fmt_9_9_12_12_get, NULL, 0},
+    {1, field_fmt_10_10_12_12_info, field_fmt_10_10_12_12_set, field_fmt_10_10_12_12_get, NULL, 0},
+    {1, field_fmt_11_11_12_12_info, field_fmt_11_11_12_12_set, field_fmt_11_11_12_12_get, NULL, 0},
+    {1, field_fmt_12_12_12_12_info, field_fmt_12_12_12_12_set, field_fmt_12_12_12_12_get, NULL, 0},
+    {1, field_fmt_13_13_12_12_info, field_fmt_13_13_12_12_set, field_fmt_13_13_12_12_get, NULL, 0},
+    {1, field_fmt_14_14_12_12_info, field_fmt_14_14_12_12_set, field_fmt_14_14_12_12_get, NULL, 0},
+    {1, field_fmt_15_15_12_12_info, field_fmt_15_15_12_12_set, field_fmt_15_15_12_12_get, NULL, 0},
+    {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0},
+    {1, field_fmt_17_17_12_12_info, field_fmt_17_17_12_12_set, field_fmt_17_17_12_12_get, NULL, 0},
+    {1, field_fmt_18_18_12_12_info, field_fmt_18_18_12_12_set, field_fmt_18_18_12_12_get, NULL, 0},
+    {1, field_fmt_19_19_12_12_info, field_fmt_19_19_12_12_set, field_fmt_19_19_12_12_get, NULL, 0},
+    {1, field_fmt_20_20_12_12_info, field_fmt_20_20_12_12_set, field_fmt_20_20_12_12_get, NULL, 0},
+    {1, field_fmt_21_21_12_12_info, field_fmt_21_21_12_12_set, field_fmt_21_21_12_12_get, NULL, 0},
+    {1, field_fmt_22_22_12_12_info, field_fmt_22_22_12_12_set, field_fmt_22_22_12_12_get, NULL, 0},
+    {1, field_fmt_23_23_12_12_info, field_fmt_23_23_12_12_set, field_fmt_23_23_12_12_get, NULL, 0},
+    {1, field_fmt_24_24_12_12_info, field_fmt_24_24_12_12_set, field_fmt_24_24_12_12_get, NULL, 0},
+    {1, field_fmt_25_25_12_12_info, field_fmt_25_25_12_12_set, field_fmt_25_25_12_12_get, NULL, 0},
+    {1, field_fmt_26_26_12_12_info, field_fmt_26_26_12_12_set, field_fmt_26_26_12_12_get, NULL, 0},
+    {1, field_fmt_27_27_12_12_info, field_fmt_27_27_12_12_set, field_fmt_27_27_12_12_get, NULL, 0},
+    {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0},
+    {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0},
+    {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0},
+    {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0},
+    {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0},
+    {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0},
+    {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0},
+    {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0},
+    {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0},
+    {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0},
+    {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0},
+    {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0},
+    {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0},
+    {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0},
+    {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0},
+    {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0},
+    {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0},
+    {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm78907_a0_rx_reason_names[] =
+{
+    BCM78907_A0_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78907_a0_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78907_a0_rx_reason_info = {13, BCM78907_A0_RX_REASON_COUNT, bcm78907_a0_rx_reason_names, bcm78907_a0_rx_reason_fields};
+    return bcm78907_a0_rx_reason_info;
+}
+
+static bcmpkt_pmd_field_t bcm78907_a0_ep_rx_reason_fields[BCM78907_A0_EP_RX_REASON_COUNT] = {
+    {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0},
+
+};
+
+static const shr_enum_map_t bcm78907_a0_ep_rx_reason_names[] =
+{
+    BCM78907_A0_EP_RX_REASON_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78907_a0_ep_rx_reason_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78907_a0_ep_rx_reason_info = {13, BCM78907_A0_EP_RX_REASON_COUNT, bcm78907_a0_ep_rx_reason_names, bcm78907_a0_ep_rx_reason_fields};
+    return bcm78907_a0_ep_rx_reason_info;
+}
+
+static const shr_enum_map_t bcm78907_a0_txpmd_cpu_tx_destination_type_names[] =
+{
+    BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78907_a0_txpmd_cpu_tx_dp_names[] =
+{
+    BCM78907_A0_TXPMD_CPU_TX_DP_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78907_a0_txpmd_sobmh_from_cpu_destination_type_names[] =
+{
+    BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78907_a0_txpmd_header_type_names[] =
+{
+    BCM78907_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78907_a0_txpmd_start_names[] =
+{
+    BCM78907_A0_TXPMD_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm78907_a0_txpmd_fields[BCM78907_A0_TXPMD_COUNT] = {
+    {1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2},
+    {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2},
+    {1, field_fmt_17_32_3_2_info, field_fmt_17_32_3_2_set, field_fmt_17_32_3_2_get, NULL, 2},
+    {1, field_fmt_33_36_2_2_info, field_fmt_33_36_2_2_set, field_fmt_33_36_2_2_get, bcm78907_a0_txpmd_cpu_tx_destination_type_names, 2},
+    {1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, bcm78907_a0_txpmd_cpu_tx_dp_names, 2},
+    {1, field_fmt_39_42_2_2_info, field_fmt_39_42_2_2_set, field_fmt_39_42_2_2_get, NULL, 2},
+    {1, field_fmt_43_44_2_2_info, field_fmt_43_44_2_2_set, field_fmt_43_44_2_2_get, NULL, 2},
+    {1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 2},
+    {1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2},
+    {1, field_fmt_50_52_2_2_info, field_fmt_50_52_2_2_set, field_fmt_50_52_2_2_get, NULL, 2},
+    {1, field_fmt_53_53_2_2_info, field_fmt_53_53_2_2_set, field_fmt_53_53_2_2_get, NULL, 2},
+    {1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 2},
+    {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 2},
+    {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 2},
+    {1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1},
+    {1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1},
+    {1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1},
+    {1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1},
+    {1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm78907_a0_txpmd_sobmh_from_cpu_destination_type_names, 1},
+    {1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1},
+    {1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1},
+    {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1},
+    {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 1},
+    {1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1},
+    {1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1},
+    {1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1},
+    {1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1},
+    {1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1},
+    {1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1},
+    {1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1},
+    {1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1},
+    {1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1},
+    {1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78907_a0_txpmd_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78907_a0_txpmd_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm78907_a0_txpmd_names[] =
+{
+    BCM78907_A0_TXPMD_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78907_a0_txpmd_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78907_a0_txpmd_info = {4, BCM78907_A0_TXPMD_COUNT, bcm78907_a0_txpmd_names, bcm78907_a0_txpmd_fields};
+    return bcm78907_a0_txpmd_info;
+}
+
+static const shr_enum_map_t bcm78907_a0_lbhdr_header_type_names[] =
+{
+    BCM78907_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t bcm78907_a0_lbhdr_start_names[] =
+{
+    BCM78907_A0_LBHDR_START_NAME_MAP_INIT
+};
+
+static bcmpkt_pmd_field_t bcm78907_a0_lbhdr_fields[BCM78907_A0_LBHDR_COUNT] = {
+    {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0},
+    {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0},
+    {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0},
+    {1, field_fmt_66_78_1_1_info, field_fmt_66_78_1_1_set, field_fmt_66_78_1_1_get, NULL, 0},
+    {1, field_fmt_80_82_1_1_info, field_fmt_80_82_1_1_set, field_fmt_80_82_1_1_get, NULL, 0},
+    {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0},
+    {1, field_fmt_86_95_1_1_info, field_fmt_86_95_1_1_set, field_fmt_86_95_1_1_get, NULL, 0},
+    {1, field_fmt_107_110_0_0_info, field_fmt_107_110_0_0_set, field_fmt_107_110_0_0_get, NULL, 0},
+    {1, field_fmt_111_118_0_0_info, field_fmt_111_118_0_0_set, field_fmt_111_118_0_0_get, NULL, 0},
+    {1, field_fmt_111_114_0_0_info, field_fmt_111_114_0_0_set, field_fmt_111_114_0_0_get, NULL, 0},
+    {1, field_fmt_115_116_0_0_info, field_fmt_115_116_0_0_set, field_fmt_115_116_0_0_get, NULL, 0},
+    {1, field_fmt_117_118_0_0_info, field_fmt_117_118_0_0_set, field_fmt_117_118_0_0_get, NULL, 0},
+    {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78907_a0_lbhdr_header_type_names, 0},
+    {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78907_a0_lbhdr_start_names, 0},
+
+};
+
+static const shr_enum_map_t bcm78907_a0_lbhdr_names[] =
+{
+    BCM78907_A0_LBHDR_NAME_MAP_INIT
+};
+
+bcmpkt_pmd_info_t bcm78907_a0_lbhdr_info_get(void)
+{
+    bcmpkt_pmd_info_t bcm78907_a0_lbhdr_info = {4, BCM78907_A0_LBHDR_COUNT, bcm78907_a0_lbhdr_names, bcm78907_a0_lbhdr_fields};
+    return bcm78907_a0_lbhdr_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h
index 12184bda483..08df89563d0 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h
@@ -35,7 +35,7 @@
 #define BCMPKT_FLEXHDR_PROFILE_NONE    -1
 
 /*! Max profile count. */
-#define BCMPKT_FLEXHDR_PROFILE_MAX     64
+#define BCMPKT_FLEXHDR_PROFILE_MAX     128
 
 /*! Max profile count. */
 #define BCMPKT_FLEXHDR_PROFILE_BITMAP_MAX     4
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h
index a5b27b0609c..5252a33269e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h
@@ -34,6 +34,9 @@
 /*! TX Packet MetaData size (words). */
 #define BCMPKT_LBHDR_SIZE_WORDS         4
 
+/*! LBHDR FID field supported check. */
+#define BCMPKT_LBHDR_FID_SUPPORTED(_st, _f) SHR_BITGET((_st)->fbits, _f)
+
 /*!
  * \name LBHDR Dump flags. (deprecated by BCMPKT_DUMP_F_XXX)
  * \anchor BCMPKT_LBHDR_DUMP_F_XXX
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h
index ef2f1e1896d..d85047062b1 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h
@@ -156,45 +156,13 @@
 /*! CNG ethernet */
 #define BCMPKT_LBHDR_CNG_ETH                     36
 /*!  */
-#define BCMPKT_LBHDR_PKT_PROFILE_MD_ETH          37
+#define BCMPKT_LBHDR_INPUT_PRIORITY_MD_ETH       37
 /*!  */
-#define BCMPKT_LBHDR_QOS_FIELD_VALID_MD_ETH      38
+#define BCMPKT_LBHDR_VFI_VALID_MD_ETH            38
 /*!  */
-#define BCMPKT_LBHDR_PP_PORT_MD_ETH              39
-/*!  */
-#define BCMPKT_LBHDR_DESTINATION_MD_ETH          40
-/*!  */
-#define BCMPKT_LBHDR_SVTAG_TX_PRESENT_MD_ETH     41
-/*!  */
-#define BCMPKT_LBHDR_EXTENDED_DELETE_ENABLE_MD_ETH 42
-/*!  */
-#define BCMPKT_LBHDR_EXTENDED_DELETE_BYTE_COUNT_MD_ETH 43
-/*!  */
-#define BCMPKT_LBHDR_IFA_AT_OUTER_LAYER_MD_ETH   44
-/*!  */
-#define BCMPKT_LBHDR_OPAQUE_OBJECT_MD_ETH        45
-/*!  */
-#define BCMPKT_LBHDR_QOS_FIELD_ETH_MD_ETH        46
-/*!  */
-#define BCMPKT_LBHDR_INPUT_PRIORITY_MD_ETH       47
-/*!  */
-#define BCMPKT_LBHDR_CNP                         48
-/*!  */
-#define BCMPKT_LBHDR_FLIP_SECOND_PASS_L2_DENSE_MODE_ADDRESS 49
-/*!  */
-#define BCMPKT_LBHDR_VFI_VALID_MD_ETH            50
-/*!  */
-#define BCMPKT_LBHDR_VFI_MD_ETH                  51
-/*!  */
-#define BCMPKT_LBHDR_TRUNCATE_MD_ETH             52
-/*!  */
-#define BCMPKT_LBHDR_TRUNCATE_OFFSET_MD_ETH      53
-/*!  */
-#define BCMPKT_LBHDR_SVP_MD_ETH                  54
-/*!  */
-#define BCMPKT_LBHDR_CNP_OR_CNM_MD_ETH           55
+#define BCMPKT_LBHDR_VFI_MD_ETH                  39
 /*! LBHDR FIELD ID NUMBER */
-#define BCMPKT_LBHDR_FID_COUNT                   56
+#define BCMPKT_LBHDR_FID_COUNT                   40
 /*! \} */
 
 /*! LBHDR field name strings for debugging. */
@@ -236,25 +204,9 @@
     {"INT_PRI_ETH", BCMPKT_LBHDR_INT_PRI_ETH},\
     {"INT_CN_ETH", BCMPKT_LBHDR_INT_CN_ETH},\
     {"CNG_ETH", BCMPKT_LBHDR_CNG_ETH},\
-    {"PKT_PROFILE_MD_ETH", BCMPKT_LBHDR_PKT_PROFILE_MD_ETH},\
-    {"QOS_FIELD_VALID_MD_ETH", BCMPKT_LBHDR_QOS_FIELD_VALID_MD_ETH},\
-    {"PP_PORT_MD_ETH", BCMPKT_LBHDR_PP_PORT_MD_ETH},\
-    {"DESTINATION_MD_ETH", BCMPKT_LBHDR_DESTINATION_MD_ETH},\
-    {"SVTAG_TX_PRESENT_MD_ETH", BCMPKT_LBHDR_SVTAG_TX_PRESENT_MD_ETH},\
-    {"EXTENDED_DELETE_ENABLE_MD_ETH", BCMPKT_LBHDR_EXTENDED_DELETE_ENABLE_MD_ETH},\
-    {"EXTENDED_DELETE_BYTE_COUNT_MD_ETH", BCMPKT_LBHDR_EXTENDED_DELETE_BYTE_COUNT_MD_ETH},\
-    {"IFA_AT_OUTER_LAYER_MD_ETH", BCMPKT_LBHDR_IFA_AT_OUTER_LAYER_MD_ETH},\
-    {"OPAQUE_OBJECT_MD_ETH", BCMPKT_LBHDR_OPAQUE_OBJECT_MD_ETH},\
-    {"QOS_FIELD_ETH_MD_ETH", BCMPKT_LBHDR_QOS_FIELD_ETH_MD_ETH},\
     {"INPUT_PRIORITY_MD_ETH", BCMPKT_LBHDR_INPUT_PRIORITY_MD_ETH},\
-    {"CNP", BCMPKT_LBHDR_CNP},\
-    {"FLIP_SECOND_PASS_L2_DENSE_MODE_ADDRESS", BCMPKT_LBHDR_FLIP_SECOND_PASS_L2_DENSE_MODE_ADDRESS},\
     {"VFI_VALID_MD_ETH", BCMPKT_LBHDR_VFI_VALID_MD_ETH},\
     {"VFI_MD_ETH", BCMPKT_LBHDR_VFI_MD_ETH},\
-    {"TRUNCATE_MD_ETH", BCMPKT_LBHDR_TRUNCATE_MD_ETH},\
-    {"TRUNCATE_OFFSET_MD_ETH", BCMPKT_LBHDR_TRUNCATE_OFFSET_MD_ETH},\
-    {"SVP_MD_ETH", BCMPKT_LBHDR_SVP_MD_ETH},\
-    {"CNP_OR_CNM_MD_ETH", BCMPKT_LBHDR_CNP_OR_CNM_MD_ETH},\
     {"fid count", BCMPKT_LBHDR_FID_COUNT}
 
 /*!
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h
index a028547fe91..5a64cd9a2d4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h
@@ -42,6 +42,9 @@
 /*! CELL Error status bitmap. */
 #define BCMPKT_RXMETA_ST_CELL_ERROR     (0x1 << 18)
 
+/*! RXPMD FID field supported check. */
+#define BCMPKT_RXPMD_FID_SUPPORTED(_st, _f) SHR_BITGET((_st)->fbits, _f)
+
 /*! \brief Packet reasons bitmap.
  * Set of "reasons" (\ref BCMPKT_RX_REASON_XXX) why a packet came to the CPU.
  */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h
index 3b94fe60a2a..01f29bdb8c8 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h
@@ -489,6 +489,49 @@
     {"CTC_INITIATED_FROM_IP", BCMPKT_RXPMD_REASON_T_FROM_IP},\
     {"CTC_INITIATED_FROM_EP", BCMPKT_RXPMD_REASON_T_FROM_EP},\
 
+/*!
+ * \name BCMPKT_RXPMD_TUNNEL_DECAP_TYPE encodings.
+ * \anchor BCMPKT_RXPMD_TUNNEL_DECAP_TYPE_XXX
+ */
+/*! \{ */
+/*! No decapsulation */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_T_NONE         0
+/*! IP */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_T_IP           1
+/*! L2 MPLS with one label */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_T_L2MPLS_1LABEL 2
+/*! L2 MPLS with two labels */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_T_L2MPLS_2LABEL 3
+/*! L2 MPLS with three labels */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_T_L2MPLS_3LABEL 4
+/*! L3 MPLS with one label */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_T_L3MPLS_1LABEL 5
+/*! L3 MPLS with two labels */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_T_L3MPLS_2LABEL 6
+/*! L3 MPLS with three labels */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_T_L3MPLS_3LABEL 7
+/*! VxLAN */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_T_VXLAN        8
+/*! SRv6 with L2 */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_T_SRV6_L2      9
+/*! SRv6 with SRH */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_T_SRV6_SRH     10
+/*! \} */
+
+/*! BCMPKT_RXPMD_TUNNEL_DECAP_TYPE encoding name strings for debugging. */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_TYPE_NAME_MAP_INIT \
+    {"NONE", BCMPKT_RXPMD_TUNNEL_DECAP_T_NONE},\
+    {"IP", BCMPKT_RXPMD_TUNNEL_DECAP_T_IP},\
+    {"L2MPLS_1LABEL", BCMPKT_RXPMD_TUNNEL_DECAP_T_L2MPLS_1LABEL},\
+    {"L2MPLS_2LABEL", BCMPKT_RXPMD_TUNNEL_DECAP_T_L2MPLS_2LABEL},\
+    {"L2MPLS_3LABEL", BCMPKT_RXPMD_TUNNEL_DECAP_T_L2MPLS_3LABEL},\
+    {"L3MPLS_1LABEL", BCMPKT_RXPMD_TUNNEL_DECAP_T_L3MPLS_1LABEL},\
+    {"L3MPLS_2LABEL", BCMPKT_RXPMD_TUNNEL_DECAP_T_L3MPLS_2LABEL},\
+    {"L3MPLS_3LABEL", BCMPKT_RXPMD_TUNNEL_DECAP_T_L3MPLS_3LABEL},\
+    {"VXLAN", BCMPKT_RXPMD_TUNNEL_DECAP_T_VXLAN},\
+    {"SRV6_L2", BCMPKT_RXPMD_TUNNEL_DECAP_T_SRV6_L2},\
+    {"SRV6_SRH", BCMPKT_RXPMD_TUNNEL_DECAP_T_SRV6_SRH},\
+
 /*!
  * \name RX packet metadata internal usage field IDs.
  * \anchor BCMPKT_RXPMD_I_XXX
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h
index cb07deee402..10a7f687993 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h
@@ -34,6 +34,9 @@
 /*! TX Packet MetaData size (words). */
 #define BCMPKT_TXPMD_SIZE_WORDS         4
 
+/*! TXPMD FID field supported check. */
+#define BCMPKT_TXPMD_FID_SUPPORTED(_st, _f) SHR_BITGET((_st)->fbits, _f)
+
 /*!
  * \name TXPMD Dump flags. (deprecated by BCMPKT_DUMP_F_XXX)
  * \anchor BCMPKT_TXPMD_DUMP_F_XXX
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.h
new file mode 100644
index 00000000000..2f83a4c9ba5
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.h
@@ -0,0 +1,570 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM56080_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM56080_A0_PMD_FIELD_H
+#define BCM56080_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM56080_A0_RXPMD_ING_L3_INTF                                0
+#define BCM56080_A0_RXPMD_I2E_CLASSID                                1
+#define BCM56080_A0_RXPMD_RX_BFD_SESSION_INDEX                       2
+#define BCM56080_A0_RXPMD_I2E_CLASSID_TYPE                           3
+#define BCM56080_A0_RXPMD_RX_BFD_START_OFFSET_TYPE                   4
+#define BCM56080_A0_RXPMD_RX_BFD_START_OFFSET                        5
+#define BCM56080_A0_RXPMD_ING_L3_INTF_VALID                          6
+#define BCM56080_A0_RXPMD_CPU_COS                                    7
+#define BCM56080_A0_RXPMD_QUEUE_NUM                                  8
+#define BCM56080_A0_RXPMD_BPDU                                       9
+#define BCM56080_A0_RXPMD_CHANGE_DSCP                                10
+#define BCM56080_A0_RXPMD_CHANGE_ECN                                 11
+#define BCM56080_A0_RXPMD_DO_NOT_CHANGE_TTL                          12
+#define BCM56080_A0_RXPMD_REASON                                     13
+#define BCM56080_A0_RXPMD_REASON_TYPE                                14
+#define BCM56080_A0_RXPMD_DSCP                                       15
+#define BCM56080_A0_RXPMD_SPECIAL_PACKET_TYPE                        16
+#define BCM56080_A0_RXPMD_ECN                                        17
+#define BCM56080_A0_RXPMD_INCOMING_TAG_STATUS                        18
+#define BCM56080_A0_RXPMD_O_NHI                                      19
+#define BCM56080_A0_RXPMD_ING_OTAG_ACTION                            20
+#define BCM56080_A0_RXPMD_IEU                                        21
+#define BCM56080_A0_RXPMD_IEU_VALID                                  22
+#define BCM56080_A0_RXPMD_L3ONLY                                     23
+#define BCM56080_A0_RXPMD_REGEN_CRC                                  24
+#define BCM56080_A0_RXPMD_MATCHED_RULE                               25
+#define BCM56080_A0_RXPMD_MTP_INDEX                                  26
+#define BCM56080_A0_RXPMD_OUTER_CFI                                  27
+#define BCM56080_A0_RXPMD_OUTER_PRI                                  28
+#define BCM56080_A0_RXPMD_OUTER_VID                                  29
+#define BCM56080_A0_RXPMD_INCOMING_INT_HDR_TYPE                      30
+#define BCM56080_A0_RXPMD_IP_ROUTED                                  31
+#define BCM56080_A0_RXPMD_SPECIAL_PACKET_INDICATOR                   32
+#define BCM56080_A0_RXPMD_SWITCH                                     33
+#define BCM56080_A0_RXPMD_PKT_LENGTH                                 34
+#define BCM56080_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  35
+#define BCM56080_A0_RXPMD_TUNNEL_DECAP_TYPE                          36
+#define BCM56080_A0_RXPMD_UC_SW_COPY_DROPPED                         37
+#define BCM56080_A0_RXPMD_ENTROPY_LABEL                              38
+#define BCM56080_A0_RXPMD_SRC_PORT_NUM                               39
+#define BCM56080_A0_RXPMD_UNICAST_QUEUE                              40
+#define BCM56080_A0_RXPMD_TIMESTAMP_TYPE                             41
+#define BCM56080_A0_RXPMD_TIMESTAMP                                  42
+#define BCM56080_A0_RXPMD_TIMESTAMP_HI                               43
+#define BCM56080_A0_RXPMD_VRF                                        44
+#define BCM56080_A0_RXPMD_MODULE_HDR                                 45
+#define BCM56080_A0_RXPMD_COUNT                                      46
+
+/* RXPMD name map */
+#define BCM56080_A0_RXPMD_NAME_MAP_INIT \
+    {"ING_L3_INTF", BCM56080_A0_RXPMD_ING_L3_INTF}, \
+    {"I2E_CLASSID", BCM56080_A0_RXPMD_I2E_CLASSID}, \
+    {"RX_BFD_SESSION_INDEX", BCM56080_A0_RXPMD_RX_BFD_SESSION_INDEX}, \
+    {"I2E_CLASSID_TYPE", BCM56080_A0_RXPMD_I2E_CLASSID_TYPE}, \
+    {"RX_BFD_START_OFFSET_TYPE", BCM56080_A0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \
+    {"RX_BFD_START_OFFSET", BCM56080_A0_RXPMD_RX_BFD_START_OFFSET}, \
+    {"ING_L3_INTF_VALID", BCM56080_A0_RXPMD_ING_L3_INTF_VALID}, \
+    {"CPU_COS", BCM56080_A0_RXPMD_CPU_COS}, \
+    {"QUEUE_NUM", BCM56080_A0_RXPMD_QUEUE_NUM}, \
+    {"BPDU", BCM56080_A0_RXPMD_BPDU}, \
+    {"CHANGE_DSCP", BCM56080_A0_RXPMD_CHANGE_DSCP}, \
+    {"CHANGE_ECN", BCM56080_A0_RXPMD_CHANGE_ECN}, \
+    {"DO_NOT_CHANGE_TTL", BCM56080_A0_RXPMD_DO_NOT_CHANGE_TTL}, \
+    {"REASON", BCM56080_A0_RXPMD_REASON}, \
+    {"REASON_TYPE", BCM56080_A0_RXPMD_REASON_TYPE}, \
+    {"DSCP", BCM56080_A0_RXPMD_DSCP}, \
+    {"SPECIAL_PACKET_TYPE", BCM56080_A0_RXPMD_SPECIAL_PACKET_TYPE}, \
+    {"ECN", BCM56080_A0_RXPMD_ECN}, \
+    {"INCOMING_TAG_STATUS", BCM56080_A0_RXPMD_INCOMING_TAG_STATUS}, \
+    {"O_NHI", BCM56080_A0_RXPMD_O_NHI}, \
+    {"ING_OTAG_ACTION", BCM56080_A0_RXPMD_ING_OTAG_ACTION}, \
+    {"IEU", BCM56080_A0_RXPMD_IEU}, \
+    {"IEU_VALID", BCM56080_A0_RXPMD_IEU_VALID}, \
+    {"L3ONLY", BCM56080_A0_RXPMD_L3ONLY}, \
+    {"REGEN_CRC", BCM56080_A0_RXPMD_REGEN_CRC}, \
+    {"MATCHED_RULE", BCM56080_A0_RXPMD_MATCHED_RULE}, \
+    {"MTP_INDEX", BCM56080_A0_RXPMD_MTP_INDEX}, \
+    {"OUTER_CFI", BCM56080_A0_RXPMD_OUTER_CFI}, \
+    {"OUTER_PRI", BCM56080_A0_RXPMD_OUTER_PRI}, \
+    {"OUTER_VID", BCM56080_A0_RXPMD_OUTER_VID}, \
+    {"INCOMING_INT_HDR_TYPE", BCM56080_A0_RXPMD_INCOMING_INT_HDR_TYPE}, \
+    {"IP_ROUTED", BCM56080_A0_RXPMD_IP_ROUTED}, \
+    {"SPECIAL_PACKET_INDICATOR", BCM56080_A0_RXPMD_SPECIAL_PACKET_INDICATOR}, \
+    {"SWITCH", BCM56080_A0_RXPMD_SWITCH}, \
+    {"PKT_LENGTH", BCM56080_A0_RXPMD_PKT_LENGTH}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM56080_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"TUNNEL_DECAP_TYPE", BCM56080_A0_RXPMD_TUNNEL_DECAP_TYPE}, \
+    {"UC_SW_COPY_DROPPED", BCM56080_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"ENTROPY_LABEL", BCM56080_A0_RXPMD_ENTROPY_LABEL}, \
+    {"SRC_PORT_NUM", BCM56080_A0_RXPMD_SRC_PORT_NUM}, \
+    {"UNICAST_QUEUE", BCM56080_A0_RXPMD_UNICAST_QUEUE}, \
+    {"TIMESTAMP_TYPE", BCM56080_A0_RXPMD_TIMESTAMP_TYPE}, \
+    {"TIMESTAMP", BCM56080_A0_RXPMD_TIMESTAMP}, \
+    {"TIMESTAMP_HI", BCM56080_A0_RXPMD_TIMESTAMP_HI}, \
+    {"VRF", BCM56080_A0_RXPMD_VRF}, \
+    {"MODULE_HDR", BCM56080_A0_RXPMD_MODULE_HDR}, \
+    {"COUNT", BCM56080_A0_RXPMD_COUNT}
+
+/*!
+ * \name BCM56080_A0_RXPMD_TIMESTAMP_TYPE encodings.
+ * \anchor BCM56080_A0_RXPMD_TIMESTAMP_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56080_A0_RXPMD_TIMESTAMP_TYPE_INVALID                     0
+#define BCM56080_A0_RXPMD_TIMESTAMP_TYPE_OAM_LM                      1
+#define BCM56080_A0_RXPMD_TIMESTAMP_TYPE_OAM_DM                      2
+#define BCM56080_A0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS                3
+/*! \} */
+
+/*! BCM56080_A0_RXPMD_TIMESTAMP_TYPE encoding name strings maps. */
+#define BCM56080_A0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT \
+    {"INVALID", BCM56080_A0_RXPMD_TIMESTAMP_TYPE_INVALID},\
+    {"OAM_LM", BCM56080_A0_RXPMD_TIMESTAMP_TYPE_OAM_LM},\
+    {"OAM_DM", BCM56080_A0_RXPMD_TIMESTAMP_TYPE_OAM_DM},\
+    {"IEEE_802_1AS", BCM56080_A0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS},\
+    {NULL, 0}
+
+/* RX_REASON defines */
+#define BCM56080_A0_RX_REASON_CPU_UVLAN                              0
+#define BCM56080_A0_RX_REASON_CPU_SLF                                1
+#define BCM56080_A0_RX_REASON_CPU_DLF                                2
+#define BCM56080_A0_RX_REASON_CPU_L2MOVE                             3
+#define BCM56080_A0_RX_REASON_CPU_L2CPU                              4
+#define BCM56080_A0_RX_REASON_CPU_L3SRC_MISS                         5
+#define BCM56080_A0_RX_REASON_CPU_L3DST_MISS                         6
+#define BCM56080_A0_RX_REASON_CPU_L3SRC_MOVE                         7
+#define BCM56080_A0_RX_REASON_CPU_MC_MISS                            8
+#define BCM56080_A0_RX_REASON_CPU_IPMC_MISS                          9
+#define BCM56080_A0_RX_REASON_CPU_FFP                                10
+#define BCM56080_A0_RX_REASON_CPU_L3HDR_ERR                          11
+#define BCM56080_A0_RX_REASON_CPU_PROTOCOL_PKT                       12
+#define BCM56080_A0_RX_REASON_CPU_DOS_ATTACK                         13
+#define BCM56080_A0_RX_REASON_CPU_MARTIAN_ADDR                       14
+#define BCM56080_A0_RX_REASON_CPU_TUNNEL_ERR                         15
+#define BCM56080_A0_RX_REASON_CPU_SFLOW                              16
+#define BCM56080_A0_RX_REASON_ICMP_REDIRECT                          17
+#define BCM56080_A0_RX_REASON_L3_SLOWPATH                            18
+#define BCM56080_A0_RX_REASON_PARITY_ERROR                           19
+#define BCM56080_A0_RX_REASON_L3_MTU_CHECK_FAIL                      20
+#define BCM56080_A0_RX_REASON_MCIDX_ERROR                            21
+#define BCM56080_A0_RX_REASON_CPU_VFP                                22
+#define BCM56080_A0_RX_REASON_MPLS_PROC_ERROR                        23
+#define BCM56080_A0_RX_REASON_PBT_NONUC_PKT                          24
+#define BCM56080_A0_RX_REASON_L3_NEXT_HOP                            25
+#define BCM56080_A0_RX_REASON_MY_STATION                             26
+#define BCM56080_A0_RX_REASON_TIME_SYNC                              27
+#define BCM56080_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR                 28
+#define BCM56080_A0_RX_REASON_BFD_SLOWPATH                           29
+#define BCM56080_A0_RX_REASON_BFD_ERROR                              30
+#define BCM56080_A0_RX_REASON_PACKET_TRACE_TO_CPU                    31
+#define BCM56080_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT               32
+#define BCM56080_A0_RX_REASON_MPLS_ALERT_LABEL                       33
+#define BCM56080_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH            34
+#define BCM56080_A0_RX_REASON_SRV6_ERROR                             35
+#define BCM56080_A0_RX_REASON_VXLAN_VN_ID_MISS                       36
+#define BCM56080_A0_RX_REASON_VXLAN_SIP_MISS                         37
+#define BCM56080_A0_RX_REASON_ADAPT_MISS                             38
+#define BCM56080_A0_RX_REASON_NH_PROTO_STATUS_DOWN                   39
+#define BCM56080_A0_RX_REASON_OAM_PROCESSING                         40
+#define BCM56080_A0_RX_REASON_SUBPORT_ID_LOOKUP_MISS                 41
+#define BCM56080_A0_RX_REASON_SVTAG_CPU_BIT_SET                      42
+#define BCM56080_A0_RX_REASON_COUNT                                  43
+
+/* RX_REASON name map */
+#define BCM56080_A0_RX_REASON_NAME_MAP_INIT \
+    {"CPU_UVLAN", BCM56080_A0_RX_REASON_CPU_UVLAN}, \
+    {"CPU_SLF", BCM56080_A0_RX_REASON_CPU_SLF}, \
+    {"CPU_DLF", BCM56080_A0_RX_REASON_CPU_DLF}, \
+    {"CPU_L2MOVE", BCM56080_A0_RX_REASON_CPU_L2MOVE}, \
+    {"CPU_L2CPU", BCM56080_A0_RX_REASON_CPU_L2CPU}, \
+    {"CPU_L3SRC_MISS", BCM56080_A0_RX_REASON_CPU_L3SRC_MISS}, \
+    {"CPU_L3DST_MISS", BCM56080_A0_RX_REASON_CPU_L3DST_MISS}, \
+    {"CPU_L3SRC_MOVE", BCM56080_A0_RX_REASON_CPU_L3SRC_MOVE}, \
+    {"CPU_MC_MISS", BCM56080_A0_RX_REASON_CPU_MC_MISS}, \
+    {"CPU_IPMC_MISS", BCM56080_A0_RX_REASON_CPU_IPMC_MISS}, \
+    {"CPU_FFP", BCM56080_A0_RX_REASON_CPU_FFP}, \
+    {"CPU_L3HDR_ERR", BCM56080_A0_RX_REASON_CPU_L3HDR_ERR}, \
+    {"CPU_PROTOCOL_PKT", BCM56080_A0_RX_REASON_CPU_PROTOCOL_PKT}, \
+    {"CPU_DOS_ATTACK", BCM56080_A0_RX_REASON_CPU_DOS_ATTACK}, \
+    {"CPU_MARTIAN_ADDR", BCM56080_A0_RX_REASON_CPU_MARTIAN_ADDR}, \
+    {"CPU_TUNNEL_ERR", BCM56080_A0_RX_REASON_CPU_TUNNEL_ERR}, \
+    {"CPU_SFLOW", BCM56080_A0_RX_REASON_CPU_SFLOW}, \
+    {"ICMP_REDIRECT", BCM56080_A0_RX_REASON_ICMP_REDIRECT}, \
+    {"L3_SLOWPATH", BCM56080_A0_RX_REASON_L3_SLOWPATH}, \
+    {"PARITY_ERROR", BCM56080_A0_RX_REASON_PARITY_ERROR}, \
+    {"L3_MTU_CHECK_FAIL", BCM56080_A0_RX_REASON_L3_MTU_CHECK_FAIL}, \
+    {"MCIDX_ERROR", BCM56080_A0_RX_REASON_MCIDX_ERROR}, \
+    {"CPU_VFP", BCM56080_A0_RX_REASON_CPU_VFP}, \
+    {"MPLS_PROC_ERROR", BCM56080_A0_RX_REASON_MPLS_PROC_ERROR}, \
+    {"PBT_NONUC_PKT", BCM56080_A0_RX_REASON_PBT_NONUC_PKT}, \
+    {"L3_NEXT_HOP", BCM56080_A0_RX_REASON_L3_NEXT_HOP}, \
+    {"MY_STATION", BCM56080_A0_RX_REASON_MY_STATION}, \
+    {"TIME_SYNC", BCM56080_A0_RX_REASON_TIME_SYNC}, \
+    {"TUNNEL_DECAP_ECN_ERROR", BCM56080_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \
+    {"BFD_SLOWPATH", BCM56080_A0_RX_REASON_BFD_SLOWPATH}, \
+    {"BFD_ERROR", BCM56080_A0_RX_REASON_BFD_ERROR}, \
+    {"PACKET_TRACE_TO_CPU", BCM56080_A0_RX_REASON_PACKET_TRACE_TO_CPU}, \
+    {"MPLS_UNKNOWN_CONTROL_PKT", BCM56080_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \
+    {"MPLS_ALERT_LABEL", BCM56080_A0_RX_REASON_MPLS_ALERT_LABEL}, \
+    {"CPU_IPMC_INTERFACE_MISMATCH", BCM56080_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \
+    {"SRV6_ERROR", BCM56080_A0_RX_REASON_SRV6_ERROR}, \
+    {"VXLAN_VN_ID_MISS", BCM56080_A0_RX_REASON_VXLAN_VN_ID_MISS}, \
+    {"VXLAN_SIP_MISS", BCM56080_A0_RX_REASON_VXLAN_SIP_MISS}, \
+    {"ADAPT_MISS", BCM56080_A0_RX_REASON_ADAPT_MISS}, \
+    {"NH_PROTO_STATUS_DOWN", BCM56080_A0_RX_REASON_NH_PROTO_STATUS_DOWN}, \
+    {"OAM_PROCESSING", BCM56080_A0_RX_REASON_OAM_PROCESSING}, \
+    {"SUBPORT_ID_LOOKUP_MISS", BCM56080_A0_RX_REASON_SUBPORT_ID_LOOKUP_MISS}, \
+    {"SVTAG_CPU_BIT_SET", BCM56080_A0_RX_REASON_SVTAG_CPU_BIT_SET}, \
+    {"COUNT", BCM56080_A0_RX_REASON_COUNT}
+
+/*!
+ * \name BCM56080_A0_RX_REASON_CPU_SFLOW encodings.
+ * \anchor BCM56080_A0_RX_REASON_CPU_SFLOW_XXX
+ */
+/*! \{ */
+#define BCM56080_A0_RX_REASON_CPU_SFLOW_INVALID                      0
+#define BCM56080_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX               1
+#define BCM56080_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST                2
+#define BCM56080_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC                3
+/*! \} */
+
+/*! BCM56080_A0_RX_REASON_CPU_SFLOW encoding name strings maps. */
+#define BCM56080_A0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT \
+    {"INVALID", BCM56080_A0_RX_REASON_CPU_SFLOW_INVALID},\
+    {"CPU_SFLOW_FLEX", BCM56080_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX},\
+    {"CPU_SFLOW_DST", BCM56080_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST},\
+    {"CPU_SFLOW_SRC", BCM56080_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56080_A0_RX_REASON_MPLS_PROC_ERROR encodings.
+ * \anchor BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_XXX
+ */
+/*! \{ */
+#define BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_NOP                    0
+#define BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD        1
+#define BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION         2
+#define BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS             3
+#define BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL         4
+/*! \} */
+
+/*! BCM56080_A0_RX_REASON_MPLS_PROC_ERROR encoding name strings maps. */
+#define BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT \
+    {"NOP", BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_NOP},\
+    {"INVALID_PAYLOAD", BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD},\
+    {"INVALID_ACTION", BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION},\
+    {"LABEL_MISS", BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS},\
+    {"TTL_CHECK_FAIL", BCM56080_A0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56080_A0_RX_REASON_OAM_PROCESSING encodings.
+ * \anchor BCM56080_A0_RX_REASON_OAM_PROCESSING_XXX
+ */
+/*! \{ */
+#define BCM56080_A0_RX_REASON_OAM_PROCESSING_INVALID                 0
+#define BCM56080_A0_RX_REASON_OAM_PROCESSING_OAM_CCM                 1
+#define BCM56080_A0_RX_REASON_OAM_PROCESSING_OAM_LM                  2
+#define BCM56080_A0_RX_REASON_OAM_PROCESSING_OAM_DM                  3
+#define BCM56080_A0_RX_REASON_OAM_PROCESSING_OAM_OTHER_OPCODES       4
+/*! \} */
+
+/*! BCM56080_A0_RX_REASON_OAM_PROCESSING encoding name strings maps. */
+#define BCM56080_A0_RX_REASON_OAM_PROCESSING_NAME_MAP_INIT \
+    {"INVALID", BCM56080_A0_RX_REASON_OAM_PROCESSING_INVALID},\
+    {"OAM_CCM", BCM56080_A0_RX_REASON_OAM_PROCESSING_OAM_CCM},\
+    {"OAM_LM", BCM56080_A0_RX_REASON_OAM_PROCESSING_OAM_LM},\
+    {"OAM_DM", BCM56080_A0_RX_REASON_OAM_PROCESSING_OAM_DM},\
+    {"OAM_OTHER_OPCODES", BCM56080_A0_RX_REASON_OAM_PROCESSING_OAM_OTHER_OPCODES},\
+    {NULL, 0}
+
+/* TXPMD defines */
+#define BCM56080_A0_TXPMD_CPU_TX_ECMP_MEMBER_ID                      0
+#define BCM56080_A0_TXPMD_CPU_TX_MCAST_LB_INDEX                      1
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION                         2
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE                    3
+#define BCM56080_A0_TXPMD_CPU_TX_DP                                  4
+#define BCM56080_A0_TXPMD_CPU_TX_INPUT_PRI                           5
+#define BCM56080_A0_TXPMD_CPU_TX_INT_CN                              6
+#define BCM56080_A0_TXPMD_CPU_TX_INT_PRI                             7
+#define BCM56080_A0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD                  8
+#define BCM56080_A0_TXPMD_CPU_TX_PKT_PROFILE                         9
+#define BCM56080_A0_TXPMD_CPU_TX_QOS_FIELDS_VLD                      10
+#define BCM56080_A0_TXPMD_CPU_TX_ROUTED_PKT                          11
+#define BCM56080_A0_TXPMD_CPU_TX_SOP                                 12
+#define BCM56080_A0_TXPMD_CPU_TX_UNICAST                             13
+#define BCM56080_A0_TXPMD_CPU_TX_VRF                                 14
+#define BCM56080_A0_TXPMD_CPU_TX_VRF_VALID                           15
+#define BCM56080_A0_TXPMD_CPU_TX_WCMP_SEL                            16
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_CELL_ERROR                  17
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_CELL_LENGTH                 18
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_COS                         19
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_DESTINATION                 20
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE            21
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_EOP                         22
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_INPUT_PRI                   23
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION           24
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ID               25
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_OAM_REPLACEMENT_OFFSET      26
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_PKT_LENGTH                  27
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_RQE_Q_NUM                   28
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_SOP                         29
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_SPAP                        30
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_SPID                        31
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_SPID_OVERRIDE               32
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_SRC_MODID                   33
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION            34
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_UNICAST                     35
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR                  36
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_CNG                         37
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_COS                         38
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION                 39
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE            40
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_EOP                         41
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN 42
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE    43
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM 44
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET 45
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI                   46
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM                   47
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_SOP                         48
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_SPAP                        49
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_SPID                        50
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE               51
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_SRC_MODID                   52
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_TX_TS                       53
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_UNICAST                     54
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE          55
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE               56
+#define BCM56080_A0_TXPMD_HEADER_TYPE                                57
+#define BCM56080_A0_TXPMD_START                                      58
+#define BCM56080_A0_TXPMD_COUNT                                      59
+
+/* TXPMD name map */
+#define BCM56080_A0_TXPMD_NAME_MAP_INIT \
+    {"CPU_TX::ECMP_MEMBER_ID", BCM56080_A0_TXPMD_CPU_TX_ECMP_MEMBER_ID}, \
+    {"CPU_TX::MCAST_LB_INDEX", BCM56080_A0_TXPMD_CPU_TX_MCAST_LB_INDEX}, \
+    {"CPU_TX::DESTINATION", BCM56080_A0_TXPMD_CPU_TX_DESTINATION}, \
+    {"CPU_TX::DESTINATION_TYPE", BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE}, \
+    {"CPU_TX::DP", BCM56080_A0_TXPMD_CPU_TX_DP}, \
+    {"CPU_TX::INPUT_PRI", BCM56080_A0_TXPMD_CPU_TX_INPUT_PRI}, \
+    {"CPU_TX::INT_CN", BCM56080_A0_TXPMD_CPU_TX_INT_CN}, \
+    {"CPU_TX::INT_PRI", BCM56080_A0_TXPMD_CPU_TX_INT_PRI}, \
+    {"CPU_TX::MCAST_LB_INDEX_VLD", BCM56080_A0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD}, \
+    {"CPU_TX::PKT_PROFILE", BCM56080_A0_TXPMD_CPU_TX_PKT_PROFILE}, \
+    {"CPU_TX::QOS_FIELDS_VLD", BCM56080_A0_TXPMD_CPU_TX_QOS_FIELDS_VLD}, \
+    {"CPU_TX::ROUTED_PKT", BCM56080_A0_TXPMD_CPU_TX_ROUTED_PKT}, \
+    {"CPU_TX::SOP", BCM56080_A0_TXPMD_CPU_TX_SOP}, \
+    {"CPU_TX::UNICAST", BCM56080_A0_TXPMD_CPU_TX_UNICAST}, \
+    {"CPU_TX::VRF", BCM56080_A0_TXPMD_CPU_TX_VRF}, \
+    {"CPU_TX::VRF_VALID", BCM56080_A0_TXPMD_CPU_TX_VRF_VALID}, \
+    {"CPU_TX::WCMP_SEL", BCM56080_A0_TXPMD_CPU_TX_WCMP_SEL}, \
+    {"OAM_DOWNMEP_TX::CELL_ERROR", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_CELL_ERROR}, \
+    {"OAM_DOWNMEP_TX::CELL_LENGTH", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_CELL_LENGTH}, \
+    {"OAM_DOWNMEP_TX::COS", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_COS}, \
+    {"OAM_DOWNMEP_TX::DESTINATION", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_DESTINATION}, \
+    {"OAM_DOWNMEP_TX::DESTINATION_TYPE", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE}, \
+    {"OAM_DOWNMEP_TX::EOP", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_EOP}, \
+    {"OAM_DOWNMEP_TX::INPUT_PRI", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_INPUT_PRI}, \
+    {"OAM_DOWNMEP_TX::LM_COUNTER_ACTION", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION}, \
+    {"OAM_DOWNMEP_TX::LM_COUNTER_ID", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ID}, \
+    {"OAM_DOWNMEP_TX::OAM_REPLACEMENT_OFFSET", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_OAM_REPLACEMENT_OFFSET}, \
+    {"OAM_DOWNMEP_TX::PKT_LENGTH", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_PKT_LENGTH}, \
+    {"OAM_DOWNMEP_TX::RQE_Q_NUM", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_RQE_Q_NUM}, \
+    {"OAM_DOWNMEP_TX::SOP", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_SOP}, \
+    {"OAM_DOWNMEP_TX::SPAP", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_SPAP}, \
+    {"OAM_DOWNMEP_TX::SPID", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_SPID}, \
+    {"OAM_DOWNMEP_TX::SPID_OVERRIDE", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_SPID_OVERRIDE}, \
+    {"OAM_DOWNMEP_TX::SRC_MODID", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_SRC_MODID}, \
+    {"OAM_DOWNMEP_TX::TIMESTAMP_ACTION", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION}, \
+    {"OAM_DOWNMEP_TX::UNICAST", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_UNICAST}, \
+    {"SOBMH_FROM_CPU::CELL_ERROR", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR}, \
+    {"SOBMH_FROM_CPU::CNG", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_CNG}, \
+    {"SOBMH_FROM_CPU::COS", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_COS}, \
+    {"SOBMH_FROM_CPU::DESTINATION", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION}, \
+    {"SOBMH_FROM_CPU::DESTINATION_TYPE", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE}, \
+    {"SOBMH_FROM_CPU::EOP", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_EOP}, \
+    {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE}, \
+    {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"SOBMH_FROM_CPU::INPUT_PRI", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI}, \
+    {"SOBMH_FROM_CPU::RQE_Q_NUM", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM}, \
+    {"SOBMH_FROM_CPU::SOP", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_SOP}, \
+    {"SOBMH_FROM_CPU::SPAP", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_SPAP}, \
+    {"SOBMH_FROM_CPU::SPID", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_SPID}, \
+    {"SOBMH_FROM_CPU::SPID_OVERRIDE", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE}, \
+    {"SOBMH_FROM_CPU::SRC_MODID", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_SRC_MODID}, \
+    {"SOBMH_FROM_CPU::TX_TS", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_TX_TS}, \
+    {"SOBMH_FROM_CPU::UNICAST", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_UNICAST}, \
+    {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE}, \
+    {"SOBMH_FROM_CPU::WRED_RESPONSE", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE}, \
+    {"HEADER_TYPE", BCM56080_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM56080_A0_TXPMD_START}, \
+    {"COUNT", BCM56080_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE encodings.
+ * \anchor BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT        0
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI                1
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP               2
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER        3
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC               4
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC               5
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD         6
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_L2_PBM             7
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID             8
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_INVALID            9
+/*! \} */
+
+/*! BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings maps. */
+#define BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT},\
+    {"NHI", BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI},\
+    {"ECMP", BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP},\
+    {"ECMP_MEMBER", BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER},\
+    {"IPMC", BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC},\
+    {"L2MC", BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC},\
+    {"VLAN_FLOOD", BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD},\
+    {"L2_PBM", BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_L2_PBM},\
+    {"LAG_ID", BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID},\
+    {"INVALID", BCM56080_A0_TXPMD_CPU_TX_DESTINATION_TYPE_INVALID},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE encodings.
+ * \anchor BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE_EGRESS_PORT 0
+/*! \} */
+
+/*! BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE encoding name strings maps. */
+#define BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCM56080_A0_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE_EGRESS_PORT},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encodings.
+ * \anchor BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT 0
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM     7
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID    9
+/*! \} */
+
+/*! BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encoding name strings maps. */
+#define BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT},\
+    {"L2_PBM", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM},\
+    {"INVALID", BCM56080_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56080_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM56080_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56080_A0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM56080_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU                 1
+#define BCM56080_A0_TXPMD_HEADER_TYPE_CPU_TX                         2
+#define BCM56080_A0_TXPMD_HEADER_TYPE_OAM_DOWNMEP_TX                 12
+/*! \} */
+
+/*! BCM56080_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM56080_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56080_A0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_CPU", BCM56080_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU},\
+    {"CPU_TX", BCM56080_A0_TXPMD_HEADER_TYPE_CPU_TX},\
+    {"OAM_DOWNMEP_TX", BCM56080_A0_TXPMD_HEADER_TYPE_OAM_DOWNMEP_TX},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56080_A0_TXPMD_START encodings.
+ * \anchor BCM56080_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM56080_A0_TXPMD_START_RESERVED_0                           0
+#define BCM56080_A0_TXPMD_START_RESERVED_1                           1
+#define BCM56080_A0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM56080_A0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM56080_A0_TXPMD_START encoding name strings maps. */
+#define BCM56080_A0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56080_A0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM56080_A0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM56080_A0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM56080_A0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+/* LBHDR defines */
+#define BCM56080_A0_LBHDR_PP_PORT                                    0
+#define BCM56080_A0_LBHDR_ROUTED_PKT                                 1
+#define BCM56080_A0_LBHDR_VRF                                        2
+#define BCM56080_A0_LBHDR_VRF_VALID                                  3
+#define BCM56080_A0_LBHDR_ZERO                                       4
+#define BCM56080_A0_LBHDR_PKT_PROFILE                                5
+#define BCM56080_A0_LBHDR_VISIBILITY_PKT                             6
+#define BCM56080_A0_LBHDR_SOURCE                                     7
+#define BCM56080_A0_LBHDR_SOURCE_TYPE                                8
+#define BCM56080_A0_LBHDR_HEADER_TYPE                                9
+#define BCM56080_A0_LBHDR_INPUT_PRIORITY                             10
+#define BCM56080_A0_LBHDR_START                                      11
+#define BCM56080_A0_LBHDR_COUNT                                      12
+
+/* LBHDR name map */
+#define BCM56080_A0_LBHDR_NAME_MAP_INIT \
+    {"PP_PORT", BCM56080_A0_LBHDR_PP_PORT}, \
+    {"ROUTED_PKT", BCM56080_A0_LBHDR_ROUTED_PKT}, \
+    {"VRF", BCM56080_A0_LBHDR_VRF}, \
+    {"VRF_VALID", BCM56080_A0_LBHDR_VRF_VALID}, \
+    {"ZERO", BCM56080_A0_LBHDR_ZERO}, \
+    {"PKT_PROFILE", BCM56080_A0_LBHDR_PKT_PROFILE}, \
+    {"VISIBILITY_PKT", BCM56080_A0_LBHDR_VISIBILITY_PKT}, \
+    {"SOURCE", BCM56080_A0_LBHDR_SOURCE}, \
+    {"SOURCE_TYPE", BCM56080_A0_LBHDR_SOURCE_TYPE}, \
+    {"HEADER_TYPE", BCM56080_A0_LBHDR_HEADER_TYPE}, \
+    {"INPUT_PRIORITY", BCM56080_A0_LBHDR_INPUT_PRIORITY}, \
+    {"START", BCM56080_A0_LBHDR_START}, \
+    {"COUNT", BCM56080_A0_LBHDR_COUNT}
+
+/*!
+ * \name BCM56080_A0_LBHDR_HEADER_TYPE encodings.
+ * \anchor BCM56080_A0_LBHDR_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56080_A0_LBHDR_HEADER_TYPE_GENERIC                        0
+/*! \} */
+
+/*! BCM56080_A0_LBHDR_HEADER_TYPE encoding name strings maps. */
+#define BCM56080_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \
+    {"GENERIC", BCM56080_A0_LBHDR_HEADER_TYPE_GENERIC},\
+    {NULL, 0}
+
+#endif /* BCM56080_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.h
new file mode 100644
index 00000000000..fd5116f6eb9
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.h
@@ -0,0 +1,180 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM56690_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM56690_A0_PMD_FIELD_H
+#define BCM56690_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM56690_A0_RXPMD_FLEX_DATA                                  0
+#define BCM56690_A0_RXPMD_MPB_FLEX_DATA_TYPE                         1
+#define BCM56690_A0_RXPMD_DOP_TRIGGER                                2
+#define BCM56690_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX 3
+#define BCM56690_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4                 4
+#define BCM56690_A0_RXPMD_INT_CN                                     5
+#define BCM56690_A0_RXPMD_CNG                                        6
+#define BCM56690_A0_RXPMD_MULTICAST                                  7
+#define BCM56690_A0_RXPMD_IP_ROUTED                                  8
+#define BCM56690_A0_RXPMD_COPY_TO_CPU                                9
+#define BCM56690_A0_RXPMD_SRC_PORT_NUM                               10
+#define BCM56690_A0_RXPMD_ARC_ID_LO                                  11
+#define BCM56690_A0_RXPMD_ARC_ID_HI                                  12
+#define BCM56690_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  13
+#define BCM56690_A0_RXPMD_DMA_HEADER_VERSION                         14
+#define BCM56690_A0_RXPMD_QUEUE_NUM                                  15
+#define BCM56690_A0_RXPMD_TRUNCATE_CPU_COPY                          16
+#define BCM56690_A0_RXPMD_EGR_ZONE_REMAP_CTRL                        17
+#define BCM56690_A0_RXPMD_SWITCH                                     18
+#define BCM56690_A0_RXPMD_L3ONLY                                     19
+#define BCM56690_A0_RXPMD_UC_SW_COPY_DROPPED                         20
+#define BCM56690_A0_RXPMD_PKT_LENGTH                                 21
+#define BCM56690_A0_RXPMD_COUNT                                      22
+
+/* RXPMD name map */
+#define BCM56690_A0_RXPMD_NAME_MAP_INIT \
+    {"FLEX_DATA", BCM56690_A0_RXPMD_FLEX_DATA}, \
+    {"MPB_FLEX_DATA_TYPE", BCM56690_A0_RXPMD_MPB_FLEX_DATA_TYPE}, \
+    {"DOP_TRIGGER", BCM56690_A0_RXPMD_DOP_TRIGGER}, \
+    {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX", BCM56690_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX}, \
+    {"EPARSE_EXTRACT_OFFSETS_6_4", BCM56690_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4}, \
+    {"INT_CN", BCM56690_A0_RXPMD_INT_CN}, \
+    {"CNG", BCM56690_A0_RXPMD_CNG}, \
+    {"MULTICAST", BCM56690_A0_RXPMD_MULTICAST}, \
+    {"IP_ROUTED", BCM56690_A0_RXPMD_IP_ROUTED}, \
+    {"COPY_TO_CPU", BCM56690_A0_RXPMD_COPY_TO_CPU}, \
+    {"SRC_PORT_NUM", BCM56690_A0_RXPMD_SRC_PORT_NUM}, \
+    {"ARC_ID_LO", BCM56690_A0_RXPMD_ARC_ID_LO}, \
+    {"ARC_ID_HI", BCM56690_A0_RXPMD_ARC_ID_HI}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM56690_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"DMA_HEADER_VERSION", BCM56690_A0_RXPMD_DMA_HEADER_VERSION}, \
+    {"QUEUE_NUM", BCM56690_A0_RXPMD_QUEUE_NUM}, \
+    {"TRUNCATE_CPU_COPY", BCM56690_A0_RXPMD_TRUNCATE_CPU_COPY}, \
+    {"EGR_ZONE_REMAP_CTRL", BCM56690_A0_RXPMD_EGR_ZONE_REMAP_CTRL}, \
+    {"SWITCH", BCM56690_A0_RXPMD_SWITCH}, \
+    {"L3ONLY", BCM56690_A0_RXPMD_L3ONLY}, \
+    {"UC_SW_COPY_DROPPED", BCM56690_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"PKT_LENGTH", BCM56690_A0_RXPMD_PKT_LENGTH}, \
+    {"COUNT", BCM56690_A0_RXPMD_COUNT}
+
+/* TXPMD defines */
+#define BCM56690_A0_TXPMD_CELL_LENGTH                                0
+#define BCM56690_A0_TXPMD_EOP                                        1
+#define BCM56690_A0_TXPMD_SOP                                        2
+#define BCM56690_A0_TXPMD_PKT_LENGTH                                 3
+#define BCM56690_A0_TXPMD_COPY_TO_DEBUG                              4
+#define BCM56690_A0_TXPMD_COS                                        5
+#define BCM56690_A0_TXPMD_UNICAST_PKT                                6
+#define BCM56690_A0_TXPMD_UNICAST                                    7
+#define BCM56690_A0_TXPMD_SET_L2BM                                   8
+#define BCM56690_A0_TXPMD_RQE_Q_NUM                                  9
+#define BCM56690_A0_TXPMD_SPAP                                       10
+#define BCM56690_A0_TXPMD_SPID                                       11
+#define BCM56690_A0_TXPMD_SPID_OVERRIDE                              12
+#define BCM56690_A0_TXPMD_INPUT_PRI                                  13
+#define BCM56690_A0_TXPMD_LOCAL_DEST_PORT                            14
+#define BCM56690_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET              15
+#define BCM56690_A0_TXPMD_TX_TS                                      16
+#define BCM56690_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN            17
+#define BCM56690_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM                18
+#define BCM56690_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE                   19
+#define BCM56690_A0_TXPMD_TS_ACTION_LSB                              20
+#define BCM56690_A0_TXPMD_CELL_ERROR                                 21
+#define BCM56690_A0_TXPMD_TS_ACTION_MSB                              22
+#define BCM56690_A0_TXPMD_TS_TYPE                                    23
+#define BCM56690_A0_TXPMD_DST_SUBPORT_NUM                            24
+#define BCM56690_A0_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE                 25
+#define BCM56690_A0_TXPMD_UDP_CHECKSUM_OFFSET                        26
+#define BCM56690_A0_TXPMD_HEADER_TYPE                                27
+#define BCM56690_A0_TXPMD_START                                      28
+#define BCM56690_A0_TXPMD_COUNT                                      29
+
+/* TXPMD name map */
+#define BCM56690_A0_TXPMD_NAME_MAP_INIT \
+    {"CELL_LENGTH", BCM56690_A0_TXPMD_CELL_LENGTH}, \
+    {"EOP", BCM56690_A0_TXPMD_EOP}, \
+    {"SOP", BCM56690_A0_TXPMD_SOP}, \
+    {"PKT_LENGTH", BCM56690_A0_TXPMD_PKT_LENGTH}, \
+    {"COPY_TO_DEBUG", BCM56690_A0_TXPMD_COPY_TO_DEBUG}, \
+    {"COS", BCM56690_A0_TXPMD_COS}, \
+    {"UNICAST_PKT", BCM56690_A0_TXPMD_UNICAST_PKT}, \
+    {"UNICAST", BCM56690_A0_TXPMD_UNICAST}, \
+    {"SET_L2BM", BCM56690_A0_TXPMD_SET_L2BM}, \
+    {"RQE_Q_NUM", BCM56690_A0_TXPMD_RQE_Q_NUM}, \
+    {"SPAP", BCM56690_A0_TXPMD_SPAP}, \
+    {"SPID", BCM56690_A0_TXPMD_SPID}, \
+    {"SPID_OVERRIDE", BCM56690_A0_TXPMD_SPID_OVERRIDE}, \
+    {"INPUT_PRI", BCM56690_A0_TXPMD_INPUT_PRI}, \
+    {"LOCAL_DEST_PORT", BCM56690_A0_TXPMD_LOCAL_DEST_PORT}, \
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM56690_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"TX_TS", BCM56690_A0_TXPMD_TX_TS}, \
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM56690_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCM56690_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"IEEE1588_ONE_STEP_ENABLE", BCM56690_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \
+    {"TS_ACTION_LSB", BCM56690_A0_TXPMD_TS_ACTION_LSB}, \
+    {"CELL_ERROR", BCM56690_A0_TXPMD_CELL_ERROR}, \
+    {"TS_ACTION_MSB", BCM56690_A0_TXPMD_TS_ACTION_MSB}, \
+    {"TS_TYPE", BCM56690_A0_TXPMD_TS_TYPE}, \
+    {"DST_SUBPORT_NUM", BCM56690_A0_TXPMD_DST_SUBPORT_NUM}, \
+    {"UDP_CHECKSUM_UPDATE_ENABLE", BCM56690_A0_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE}, \
+    {"UDP_CHECKSUM_OFFSET", BCM56690_A0_TXPMD_UDP_CHECKSUM_OFFSET}, \
+    {"HEADER_TYPE", BCM56690_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM56690_A0_TXPMD_START}, \
+    {"COUNT", BCM56690_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM56690_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM56690_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56690_A0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM56690_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_INTERNAL_PORT       1
+/*! \} */
+
+/*! BCM56690_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM56690_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56690_A0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_INTERNAL_PORT", BCM56690_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_INTERNAL_PORT},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56690_A0_TXPMD_START encodings.
+ * \anchor BCM56690_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM56690_A0_TXPMD_START_RESERVED_0                           0
+#define BCM56690_A0_TXPMD_START_RESERVED_1                           1
+#define BCM56690_A0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM56690_A0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM56690_A0_TXPMD_START encoding name strings maps. */
+#define BCM56690_A0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56690_A0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM56690_A0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM56690_A0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM56690_A0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+#endif /* BCM56690_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.h
new file mode 100644
index 00000000000..2250f099ecf
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.h
@@ -0,0 +1,168 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM56780_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM56780_A0_PMD_FIELD_H
+#define BCM56780_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM56780_A0_RXPMD_FLEX_DATA                                  0
+#define BCM56780_A0_RXPMD_MPB_FLEX_DATA_TYPE                         1
+#define BCM56780_A0_RXPMD_DOP_TRIGGER                                2
+#define BCM56780_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX 3
+#define BCM56780_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_7_4                 4
+#define BCM56780_A0_RXPMD_INT_CN                                     5
+#define BCM56780_A0_RXPMD_CNG                                        6
+#define BCM56780_A0_RXPMD_MULTICAST                                  7
+#define BCM56780_A0_RXPMD_IP_ROUTED                                  8
+#define BCM56780_A0_RXPMD_COPY_TO_CPU                                9
+#define BCM56780_A0_RXPMD_TRUNCATE_CPU_COPY                          10
+#define BCM56780_A0_RXPMD_EGR_ZONE_REMAP_CTRL                        11
+#define BCM56780_A0_RXPMD_SWITCH                                     12
+#define BCM56780_A0_RXPMD_L3ONLY                                     13
+#define BCM56780_A0_RXPMD_UC_SW_COPY_DROPPED                         14
+#define BCM56780_A0_RXPMD_UNICAST_QUEUE                              15
+#define BCM56780_A0_RXPMD_MATCH_ID_LO                                16
+#define BCM56780_A0_RXPMD_MATCH_ID_HI                                17
+#define BCM56780_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  18
+#define BCM56780_A0_RXPMD_DMA_HEADER_VERSION                         19
+#define BCM56780_A0_RXPMD_QUEUE_NUM                                  20
+#define BCM56780_A0_RXPMD_SRC_PORT_NUM                               21
+#define BCM56780_A0_RXPMD_PKT_LENGTH                                 22
+#define BCM56780_A0_RXPMD_COUNT                                      23
+
+/* RXPMD name map */
+#define BCM56780_A0_RXPMD_NAME_MAP_INIT \
+    {"FLEX_DATA", BCM56780_A0_RXPMD_FLEX_DATA}, \
+    {"MPB_FLEX_DATA_TYPE", BCM56780_A0_RXPMD_MPB_FLEX_DATA_TYPE}, \
+    {"DOP_TRIGGER", BCM56780_A0_RXPMD_DOP_TRIGGER}, \
+    {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX", BCM56780_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX}, \
+    {"EPARSE_EXTRACT_OFFSETS_7_4", BCM56780_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_7_4}, \
+    {"INT_CN", BCM56780_A0_RXPMD_INT_CN}, \
+    {"CNG", BCM56780_A0_RXPMD_CNG}, \
+    {"MULTICAST", BCM56780_A0_RXPMD_MULTICAST}, \
+    {"IP_ROUTED", BCM56780_A0_RXPMD_IP_ROUTED}, \
+    {"COPY_TO_CPU", BCM56780_A0_RXPMD_COPY_TO_CPU}, \
+    {"TRUNCATE_CPU_COPY", BCM56780_A0_RXPMD_TRUNCATE_CPU_COPY}, \
+    {"EGR_ZONE_REMAP_CTRL", BCM56780_A0_RXPMD_EGR_ZONE_REMAP_CTRL}, \
+    {"SWITCH", BCM56780_A0_RXPMD_SWITCH}, \
+    {"L3ONLY", BCM56780_A0_RXPMD_L3ONLY}, \
+    {"UC_SW_COPY_DROPPED", BCM56780_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"UNICAST_QUEUE", BCM56780_A0_RXPMD_UNICAST_QUEUE}, \
+    {"MATCH_ID_LO", BCM56780_A0_RXPMD_MATCH_ID_LO}, \
+    {"MATCH_ID_HI", BCM56780_A0_RXPMD_MATCH_ID_HI}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM56780_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"DMA_HEADER_VERSION", BCM56780_A0_RXPMD_DMA_HEADER_VERSION}, \
+    {"QUEUE_NUM", BCM56780_A0_RXPMD_QUEUE_NUM}, \
+    {"SRC_PORT_NUM", BCM56780_A0_RXPMD_SRC_PORT_NUM}, \
+    {"PKT_LENGTH", BCM56780_A0_RXPMD_PKT_LENGTH}, \
+    {"COUNT", BCM56780_A0_RXPMD_COUNT}
+
+/* TXPMD defines */
+#define BCM56780_A0_TXPMD_CELL_LENGTH                                0
+#define BCM56780_A0_TXPMD_EOP                                        1
+#define BCM56780_A0_TXPMD_SOP                                        2
+#define BCM56780_A0_TXPMD_PKT_LENGTH                                 3
+#define BCM56780_A0_TXPMD_COS                                        4
+#define BCM56780_A0_TXPMD_UNICAST_PKT                                5
+#define BCM56780_A0_TXPMD_UNICAST                                    6
+#define BCM56780_A0_TXPMD_SET_L2BM                                   7
+#define BCM56780_A0_TXPMD_RQE_Q_NUM                                  8
+#define BCM56780_A0_TXPMD_SPAP                                       9
+#define BCM56780_A0_TXPMD_SPID                                       10
+#define BCM56780_A0_TXPMD_SPID_OVERRIDE                              11
+#define BCM56780_A0_TXPMD_INPUT_PRI                                  12
+#define BCM56780_A0_TXPMD_LOCAL_DEST_PORT                            13
+#define BCM56780_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET              14
+#define BCM56780_A0_TXPMD_TX_TS                                      15
+#define BCM56780_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN            16
+#define BCM56780_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM                17
+#define BCM56780_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE                   18
+#define BCM56780_A0_TXPMD_CELL_ERROR                                 19
+#define BCM56780_A0_TXPMD_HEADER_TYPE                                20
+#define BCM56780_A0_TXPMD_START                                      21
+#define BCM56780_A0_TXPMD_COUNT                                      22
+
+/* TXPMD name map */
+#define BCM56780_A0_TXPMD_NAME_MAP_INIT \
+    {"CELL_LENGTH", BCM56780_A0_TXPMD_CELL_LENGTH}, \
+    {"EOP", BCM56780_A0_TXPMD_EOP}, \
+    {"SOP", BCM56780_A0_TXPMD_SOP}, \
+    {"PKT_LENGTH", BCM56780_A0_TXPMD_PKT_LENGTH}, \
+    {"COS", BCM56780_A0_TXPMD_COS}, \
+    {"UNICAST_PKT", BCM56780_A0_TXPMD_UNICAST_PKT}, \
+    {"UNICAST", BCM56780_A0_TXPMD_UNICAST}, \
+    {"SET_L2BM", BCM56780_A0_TXPMD_SET_L2BM}, \
+    {"RQE_Q_NUM", BCM56780_A0_TXPMD_RQE_Q_NUM}, \
+    {"SPAP", BCM56780_A0_TXPMD_SPAP}, \
+    {"SPID", BCM56780_A0_TXPMD_SPID}, \
+    {"SPID_OVERRIDE", BCM56780_A0_TXPMD_SPID_OVERRIDE}, \
+    {"INPUT_PRI", BCM56780_A0_TXPMD_INPUT_PRI}, \
+    {"LOCAL_DEST_PORT", BCM56780_A0_TXPMD_LOCAL_DEST_PORT}, \
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM56780_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"TX_TS", BCM56780_A0_TXPMD_TX_TS}, \
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM56780_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCM56780_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"IEEE1588_ONE_STEP_ENABLE", BCM56780_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \
+    {"CELL_ERROR", BCM56780_A0_TXPMD_CELL_ERROR}, \
+    {"HEADER_TYPE", BCM56780_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM56780_A0_TXPMD_START}, \
+    {"COUNT", BCM56780_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM56780_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM56780_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56780_A0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM56780_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_INTERNAL_PORT       1
+/*! \} */
+
+/*! BCM56780_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM56780_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56780_A0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_INTERNAL_PORT", BCM56780_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_INTERNAL_PORT},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56780_A0_TXPMD_START encodings.
+ * \anchor BCM56780_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM56780_A0_TXPMD_START_RESERVED_0                           0
+#define BCM56780_A0_TXPMD_START_RESERVED_1                           1
+#define BCM56780_A0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM56780_A0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM56780_A0_TXPMD_START encoding name strings maps. */
+#define BCM56780_A0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56780_A0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM56780_A0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM56780_A0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM56780_A0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+#endif /* BCM56780_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.h
new file mode 100644
index 00000000000..1f963fb4f4a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.h
@@ -0,0 +1,162 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM56880_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM56880_A0_PMD_FIELD_H
+#define BCM56880_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM56880_A0_RXPMD_FLEX_DATA                                  0
+#define BCM56880_A0_RXPMD_MPB_FLEX_DATA_TYPE                         1
+#define BCM56880_A0_RXPMD_INT_CN                                     2
+#define BCM56880_A0_RXPMD_CNG                                        3
+#define BCM56880_A0_RXPMD_MULTICAST                                  4
+#define BCM56880_A0_RXPMD_IP_ROUTED                                  5
+#define BCM56880_A0_RXPMD_COPY_TO_CPU                                6
+#define BCM56880_A0_RXPMD_TRUNCATE_CPU_COPY                          7
+#define BCM56880_A0_RXPMD_EGR_ZONE_REMAP_CTRL                        8
+#define BCM56880_A0_RXPMD_SWITCH                                     9
+#define BCM56880_A0_RXPMD_L3ONLY                                     10
+#define BCM56880_A0_RXPMD_UC_SW_COPY_DROPPED                         11
+#define BCM56880_A0_RXPMD_UNICAST_QUEUE                              12
+#define BCM56880_A0_RXPMD_MATCH_ID_LO                                13
+#define BCM56880_A0_RXPMD_MATCH_ID_HI                                14
+#define BCM56880_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  15
+#define BCM56880_A0_RXPMD_DMA_HEADER_VERSION                         16
+#define BCM56880_A0_RXPMD_QUEUE_NUM                                  17
+#define BCM56880_A0_RXPMD_SRC_PORT_NUM                               18
+#define BCM56880_A0_RXPMD_PKT_LENGTH                                 19
+#define BCM56880_A0_RXPMD_COUNT                                      20
+
+/* RXPMD name map */
+#define BCM56880_A0_RXPMD_NAME_MAP_INIT \
+    {"FLEX_DATA", BCM56880_A0_RXPMD_FLEX_DATA}, \
+    {"MPB_FLEX_DATA_TYPE", BCM56880_A0_RXPMD_MPB_FLEX_DATA_TYPE}, \
+    {"INT_CN", BCM56880_A0_RXPMD_INT_CN}, \
+    {"CNG", BCM56880_A0_RXPMD_CNG}, \
+    {"MULTICAST", BCM56880_A0_RXPMD_MULTICAST}, \
+    {"IP_ROUTED", BCM56880_A0_RXPMD_IP_ROUTED}, \
+    {"COPY_TO_CPU", BCM56880_A0_RXPMD_COPY_TO_CPU}, \
+    {"TRUNCATE_CPU_COPY", BCM56880_A0_RXPMD_TRUNCATE_CPU_COPY}, \
+    {"EGR_ZONE_REMAP_CTRL", BCM56880_A0_RXPMD_EGR_ZONE_REMAP_CTRL}, \
+    {"SWITCH", BCM56880_A0_RXPMD_SWITCH}, \
+    {"L3ONLY", BCM56880_A0_RXPMD_L3ONLY}, \
+    {"UC_SW_COPY_DROPPED", BCM56880_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"UNICAST_QUEUE", BCM56880_A0_RXPMD_UNICAST_QUEUE}, \
+    {"MATCH_ID_LO", BCM56880_A0_RXPMD_MATCH_ID_LO}, \
+    {"MATCH_ID_HI", BCM56880_A0_RXPMD_MATCH_ID_HI}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM56880_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"DMA_HEADER_VERSION", BCM56880_A0_RXPMD_DMA_HEADER_VERSION}, \
+    {"QUEUE_NUM", BCM56880_A0_RXPMD_QUEUE_NUM}, \
+    {"SRC_PORT_NUM", BCM56880_A0_RXPMD_SRC_PORT_NUM}, \
+    {"PKT_LENGTH", BCM56880_A0_RXPMD_PKT_LENGTH}, \
+    {"COUNT", BCM56880_A0_RXPMD_COUNT}
+
+/* TXPMD defines */
+#define BCM56880_A0_TXPMD_CELL_LENGTH                                0
+#define BCM56880_A0_TXPMD_EOP                                        1
+#define BCM56880_A0_TXPMD_SOP                                        2
+#define BCM56880_A0_TXPMD_PKT_LENGTH                                 3
+#define BCM56880_A0_TXPMD_COS                                        4
+#define BCM56880_A0_TXPMD_UNICAST_PKT                                5
+#define BCM56880_A0_TXPMD_UNICAST                                    6
+#define BCM56880_A0_TXPMD_SET_L2BM                                   7
+#define BCM56880_A0_TXPMD_RQE_Q_NUM                                  8
+#define BCM56880_A0_TXPMD_SPAP                                       9
+#define BCM56880_A0_TXPMD_SPID                                       10
+#define BCM56880_A0_TXPMD_SPID_OVERRIDE                              11
+#define BCM56880_A0_TXPMD_INPUT_PRI                                  12
+#define BCM56880_A0_TXPMD_LOCAL_DEST_PORT                            13
+#define BCM56880_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET              14
+#define BCM56880_A0_TXPMD_TX_TS                                      15
+#define BCM56880_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN            16
+#define BCM56880_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM                17
+#define BCM56880_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE                   18
+#define BCM56880_A0_TXPMD_CELL_ERROR                                 19
+#define BCM56880_A0_TXPMD_HEADER_TYPE                                20
+#define BCM56880_A0_TXPMD_START                                      21
+#define BCM56880_A0_TXPMD_COUNT                                      22
+
+/* TXPMD name map */
+#define BCM56880_A0_TXPMD_NAME_MAP_INIT \
+    {"CELL_LENGTH", BCM56880_A0_TXPMD_CELL_LENGTH}, \
+    {"EOP", BCM56880_A0_TXPMD_EOP}, \
+    {"SOP", BCM56880_A0_TXPMD_SOP}, \
+    {"PKT_LENGTH", BCM56880_A0_TXPMD_PKT_LENGTH}, \
+    {"COS", BCM56880_A0_TXPMD_COS}, \
+    {"UNICAST_PKT", BCM56880_A0_TXPMD_UNICAST_PKT}, \
+    {"UNICAST", BCM56880_A0_TXPMD_UNICAST}, \
+    {"SET_L2BM", BCM56880_A0_TXPMD_SET_L2BM}, \
+    {"RQE_Q_NUM", BCM56880_A0_TXPMD_RQE_Q_NUM}, \
+    {"SPAP", BCM56880_A0_TXPMD_SPAP}, \
+    {"SPID", BCM56880_A0_TXPMD_SPID}, \
+    {"SPID_OVERRIDE", BCM56880_A0_TXPMD_SPID_OVERRIDE}, \
+    {"INPUT_PRI", BCM56880_A0_TXPMD_INPUT_PRI}, \
+    {"LOCAL_DEST_PORT", BCM56880_A0_TXPMD_LOCAL_DEST_PORT}, \
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM56880_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"TX_TS", BCM56880_A0_TXPMD_TX_TS}, \
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM56880_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCM56880_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"IEEE1588_ONE_STEP_ENABLE", BCM56880_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \
+    {"CELL_ERROR", BCM56880_A0_TXPMD_CELL_ERROR}, \
+    {"HEADER_TYPE", BCM56880_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM56880_A0_TXPMD_START}, \
+    {"COUNT", BCM56880_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM56880_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM56880_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56880_A0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM56880_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU                 1
+/*! \} */
+
+/*! BCM56880_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM56880_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56880_A0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_CPU", BCM56880_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56880_A0_TXPMD_START encodings.
+ * \anchor BCM56880_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM56880_A0_TXPMD_START_RESERVED_0                           0
+#define BCM56880_A0_TXPMD_START_RESERVED_1                           1
+#define BCM56880_A0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM56880_A0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM56880_A0_TXPMD_START encoding name strings maps. */
+#define BCM56880_A0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56880_A0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM56880_A0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM56880_A0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM56880_A0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+#endif /* BCM56880_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.h
new file mode 100644
index 00000000000..20e99923550
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.h
@@ -0,0 +1,180 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM56890_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM56890_A0_PMD_FIELD_H
+#define BCM56890_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM56890_A0_RXPMD_FLEX_DATA                                  0
+#define BCM56890_A0_RXPMD_MPB_FLEX_DATA_TYPE                         1
+#define BCM56890_A0_RXPMD_DOP_TRIGGER                                2
+#define BCM56890_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX 3
+#define BCM56890_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4                 4
+#define BCM56890_A0_RXPMD_INT_CN                                     5
+#define BCM56890_A0_RXPMD_CNG                                        6
+#define BCM56890_A0_RXPMD_MULTICAST                                  7
+#define BCM56890_A0_RXPMD_IP_ROUTED                                  8
+#define BCM56890_A0_RXPMD_COPY_TO_CPU                                9
+#define BCM56890_A0_RXPMD_SRC_PORT_NUM                               10
+#define BCM56890_A0_RXPMD_ARC_ID_LO                                  11
+#define BCM56890_A0_RXPMD_ARC_ID_HI                                  12
+#define BCM56890_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  13
+#define BCM56890_A0_RXPMD_DMA_HEADER_VERSION                         14
+#define BCM56890_A0_RXPMD_QUEUE_NUM                                  15
+#define BCM56890_A0_RXPMD_TRUNCATE_CPU_COPY                          16
+#define BCM56890_A0_RXPMD_EGR_ZONE_REMAP_CTRL                        17
+#define BCM56890_A0_RXPMD_SWITCH                                     18
+#define BCM56890_A0_RXPMD_L3ONLY                                     19
+#define BCM56890_A0_RXPMD_UC_SW_COPY_DROPPED                         20
+#define BCM56890_A0_RXPMD_PKT_LENGTH                                 21
+#define BCM56890_A0_RXPMD_COUNT                                      22
+
+/* RXPMD name map */
+#define BCM56890_A0_RXPMD_NAME_MAP_INIT \
+    {"FLEX_DATA", BCM56890_A0_RXPMD_FLEX_DATA}, \
+    {"MPB_FLEX_DATA_TYPE", BCM56890_A0_RXPMD_MPB_FLEX_DATA_TYPE}, \
+    {"DOP_TRIGGER", BCM56890_A0_RXPMD_DOP_TRIGGER}, \
+    {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX", BCM56890_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX}, \
+    {"EPARSE_EXTRACT_OFFSETS_6_4", BCM56890_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4}, \
+    {"INT_CN", BCM56890_A0_RXPMD_INT_CN}, \
+    {"CNG", BCM56890_A0_RXPMD_CNG}, \
+    {"MULTICAST", BCM56890_A0_RXPMD_MULTICAST}, \
+    {"IP_ROUTED", BCM56890_A0_RXPMD_IP_ROUTED}, \
+    {"COPY_TO_CPU", BCM56890_A0_RXPMD_COPY_TO_CPU}, \
+    {"SRC_PORT_NUM", BCM56890_A0_RXPMD_SRC_PORT_NUM}, \
+    {"ARC_ID_LO", BCM56890_A0_RXPMD_ARC_ID_LO}, \
+    {"ARC_ID_HI", BCM56890_A0_RXPMD_ARC_ID_HI}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM56890_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"DMA_HEADER_VERSION", BCM56890_A0_RXPMD_DMA_HEADER_VERSION}, \
+    {"QUEUE_NUM", BCM56890_A0_RXPMD_QUEUE_NUM}, \
+    {"TRUNCATE_CPU_COPY", BCM56890_A0_RXPMD_TRUNCATE_CPU_COPY}, \
+    {"EGR_ZONE_REMAP_CTRL", BCM56890_A0_RXPMD_EGR_ZONE_REMAP_CTRL}, \
+    {"SWITCH", BCM56890_A0_RXPMD_SWITCH}, \
+    {"L3ONLY", BCM56890_A0_RXPMD_L3ONLY}, \
+    {"UC_SW_COPY_DROPPED", BCM56890_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"PKT_LENGTH", BCM56890_A0_RXPMD_PKT_LENGTH}, \
+    {"COUNT", BCM56890_A0_RXPMD_COUNT}
+
+/* TXPMD defines */
+#define BCM56890_A0_TXPMD_CELL_LENGTH                                0
+#define BCM56890_A0_TXPMD_EOP                                        1
+#define BCM56890_A0_TXPMD_SOP                                        2
+#define BCM56890_A0_TXPMD_PKT_LENGTH                                 3
+#define BCM56890_A0_TXPMD_COPY_TO_DEBUG                              4
+#define BCM56890_A0_TXPMD_COS                                        5
+#define BCM56890_A0_TXPMD_UNICAST_PKT                                6
+#define BCM56890_A0_TXPMD_UNICAST                                    7
+#define BCM56890_A0_TXPMD_SET_L2BM                                   8
+#define BCM56890_A0_TXPMD_RQE_Q_NUM                                  9
+#define BCM56890_A0_TXPMD_SPAP                                       10
+#define BCM56890_A0_TXPMD_SPID                                       11
+#define BCM56890_A0_TXPMD_SPID_OVERRIDE                              12
+#define BCM56890_A0_TXPMD_INPUT_PRI                                  13
+#define BCM56890_A0_TXPMD_LOCAL_DEST_PORT                            14
+#define BCM56890_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET              15
+#define BCM56890_A0_TXPMD_TX_TS                                      16
+#define BCM56890_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN            17
+#define BCM56890_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM                18
+#define BCM56890_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE                   19
+#define BCM56890_A0_TXPMD_TS_ACTION_LSB                              20
+#define BCM56890_A0_TXPMD_CELL_ERROR                                 21
+#define BCM56890_A0_TXPMD_TS_ACTION_MSB                              22
+#define BCM56890_A0_TXPMD_TS_TYPE                                    23
+#define BCM56890_A0_TXPMD_DST_SUBPORT_NUM                            24
+#define BCM56890_A0_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE                 25
+#define BCM56890_A0_TXPMD_UDP_CHECKSUM_OFFSET                        26
+#define BCM56890_A0_TXPMD_HEADER_TYPE                                27
+#define BCM56890_A0_TXPMD_START                                      28
+#define BCM56890_A0_TXPMD_COUNT                                      29
+
+/* TXPMD name map */
+#define BCM56890_A0_TXPMD_NAME_MAP_INIT \
+    {"CELL_LENGTH", BCM56890_A0_TXPMD_CELL_LENGTH}, \
+    {"EOP", BCM56890_A0_TXPMD_EOP}, \
+    {"SOP", BCM56890_A0_TXPMD_SOP}, \
+    {"PKT_LENGTH", BCM56890_A0_TXPMD_PKT_LENGTH}, \
+    {"COPY_TO_DEBUG", BCM56890_A0_TXPMD_COPY_TO_DEBUG}, \
+    {"COS", BCM56890_A0_TXPMD_COS}, \
+    {"UNICAST_PKT", BCM56890_A0_TXPMD_UNICAST_PKT}, \
+    {"UNICAST", BCM56890_A0_TXPMD_UNICAST}, \
+    {"SET_L2BM", BCM56890_A0_TXPMD_SET_L2BM}, \
+    {"RQE_Q_NUM", BCM56890_A0_TXPMD_RQE_Q_NUM}, \
+    {"SPAP", BCM56890_A0_TXPMD_SPAP}, \
+    {"SPID", BCM56890_A0_TXPMD_SPID}, \
+    {"SPID_OVERRIDE", BCM56890_A0_TXPMD_SPID_OVERRIDE}, \
+    {"INPUT_PRI", BCM56890_A0_TXPMD_INPUT_PRI}, \
+    {"LOCAL_DEST_PORT", BCM56890_A0_TXPMD_LOCAL_DEST_PORT}, \
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM56890_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"TX_TS", BCM56890_A0_TXPMD_TX_TS}, \
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM56890_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCM56890_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"IEEE1588_ONE_STEP_ENABLE", BCM56890_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \
+    {"TS_ACTION_LSB", BCM56890_A0_TXPMD_TS_ACTION_LSB}, \
+    {"CELL_ERROR", BCM56890_A0_TXPMD_CELL_ERROR}, \
+    {"TS_ACTION_MSB", BCM56890_A0_TXPMD_TS_ACTION_MSB}, \
+    {"TS_TYPE", BCM56890_A0_TXPMD_TS_TYPE}, \
+    {"DST_SUBPORT_NUM", BCM56890_A0_TXPMD_DST_SUBPORT_NUM}, \
+    {"UDP_CHECKSUM_UPDATE_ENABLE", BCM56890_A0_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE}, \
+    {"UDP_CHECKSUM_OFFSET", BCM56890_A0_TXPMD_UDP_CHECKSUM_OFFSET}, \
+    {"HEADER_TYPE", BCM56890_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM56890_A0_TXPMD_START}, \
+    {"COUNT", BCM56890_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM56890_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM56890_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56890_A0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM56890_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_INTERNAL_PORT       1
+/*! \} */
+
+/*! BCM56890_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM56890_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56890_A0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_INTERNAL_PORT", BCM56890_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_INTERNAL_PORT},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56890_A0_TXPMD_START encodings.
+ * \anchor BCM56890_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM56890_A0_TXPMD_START_RESERVED_0                           0
+#define BCM56890_A0_TXPMD_START_RESERVED_1                           1
+#define BCM56890_A0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM56890_A0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM56890_A0_TXPMD_START encoding name strings maps. */
+#define BCM56890_A0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56890_A0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM56890_A0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM56890_A0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM56890_A0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+#endif /* BCM56890_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.h
new file mode 100644
index 00000000000..06d48e85b6b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.h
@@ -0,0 +1,478 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM56990_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM56990_A0_PMD_FIELD_H
+#define BCM56990_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM56990_A0_RXPMD_I2E_CLASSID                                0
+#define BCM56990_A0_RXPMD_RX_BFD_SESSION_INDEX                       1
+#define BCM56990_A0_RXPMD_I2E_CLASSID_TYPE                           2
+#define BCM56990_A0_RXPMD_RX_BFD_START_OFFSET_TYPE                   3
+#define BCM56990_A0_RXPMD_RX_BFD_START_OFFSET                        4
+#define BCM56990_A0_RXPMD_CPU_COS                                    5
+#define BCM56990_A0_RXPMD_QUEUE_NUM                                  6
+#define BCM56990_A0_RXPMD_BPDU                                       7
+#define BCM56990_A0_RXPMD_CHANGE_DSCP                                8
+#define BCM56990_A0_RXPMD_CHANGE_ECN                                 9
+#define BCM56990_A0_RXPMD_DLB_ID_VALID                               10
+#define BCM56990_A0_RXPMD_REASON                                     11
+#define BCM56990_A0_RXPMD_REASON_TYPE                                12
+#define BCM56990_A0_RXPMD_DO_NOT_CHANGE_TTL                          13
+#define BCM56990_A0_RXPMD_DSCP                                       14
+#define BCM56990_A0_RXPMD_SPECIAL_PACKET_TYPE                        15
+#define BCM56990_A0_RXPMD_ECN                                        16
+#define BCM56990_A0_RXPMD_INCOMING_TAG_STATUS                        17
+#define BCM56990_A0_RXPMD_ING_L3_INTF                                18
+#define BCM56990_A0_RXPMD_ING_OTAG_ACTION                            19
+#define BCM56990_A0_RXPMD_IP_ROUTED                                  20
+#define BCM56990_A0_RXPMD_L3ONLY                                     21
+#define BCM56990_A0_RXPMD_LOOPBACK_PACKET_TYPE                       22
+#define BCM56990_A0_RXPMD_MATCHED_RULE                               23
+#define BCM56990_A0_RXPMD_MTP_INDEX                                  24
+#define BCM56990_A0_RXPMD_OUTER_CFI                                  25
+#define BCM56990_A0_RXPMD_OUTER_PRI                                  26
+#define BCM56990_A0_RXPMD_OUTER_VID                                  27
+#define BCM56990_A0_RXPMD_INCOMING_INT_HDR_TYPE                      28
+#define BCM56990_A0_RXPMD_PKT_LENGTH                                 29
+#define BCM56990_A0_RXPMD_REGEN_CRC                                  30
+#define BCM56990_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  31
+#define BCM56990_A0_RXPMD_ENTROPY_LABEL                              32
+#define BCM56990_A0_RXPMD_SPECIAL_PACKET_INDICATOR                   33
+#define BCM56990_A0_RXPMD_SRC_PORT_NUM                               34
+#define BCM56990_A0_RXPMD_SWITCH                                     35
+#define BCM56990_A0_RXPMD_TIMESTAMP                                  36
+#define BCM56990_A0_RXPMD_TIMESTAMP_HI                               37
+#define BCM56990_A0_RXPMD_TIMESTAMP_TYPE                             38
+#define BCM56990_A0_RXPMD_TUNNEL_DECAP_TYPE                          39
+#define BCM56990_A0_RXPMD_UC_SW_COPY_DROPPED                         40
+#define BCM56990_A0_RXPMD_UNICAST_QUEUE                              41
+#define BCM56990_A0_RXPMD_DLB_ID                                     42
+#define BCM56990_A0_RXPMD_MODULE_HDR                                 43
+#define BCM56990_A0_RXPMD_COUNT                                      44
+
+/* RXPMD name map */
+#define BCM56990_A0_RXPMD_NAME_MAP_INIT \
+    {"I2E_CLASSID", BCM56990_A0_RXPMD_I2E_CLASSID}, \
+    {"RX_BFD_SESSION_INDEX", BCM56990_A0_RXPMD_RX_BFD_SESSION_INDEX}, \
+    {"I2E_CLASSID_TYPE", BCM56990_A0_RXPMD_I2E_CLASSID_TYPE}, \
+    {"RX_BFD_START_OFFSET_TYPE", BCM56990_A0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \
+    {"RX_BFD_START_OFFSET", BCM56990_A0_RXPMD_RX_BFD_START_OFFSET}, \
+    {"CPU_COS", BCM56990_A0_RXPMD_CPU_COS}, \
+    {"QUEUE_NUM", BCM56990_A0_RXPMD_QUEUE_NUM}, \
+    {"BPDU", BCM56990_A0_RXPMD_BPDU}, \
+    {"CHANGE_DSCP", BCM56990_A0_RXPMD_CHANGE_DSCP}, \
+    {"CHANGE_ECN", BCM56990_A0_RXPMD_CHANGE_ECN}, \
+    {"DLB_ID_VALID", BCM56990_A0_RXPMD_DLB_ID_VALID}, \
+    {"REASON", BCM56990_A0_RXPMD_REASON}, \
+    {"REASON_TYPE", BCM56990_A0_RXPMD_REASON_TYPE}, \
+    {"DO_NOT_CHANGE_TTL", BCM56990_A0_RXPMD_DO_NOT_CHANGE_TTL}, \
+    {"DSCP", BCM56990_A0_RXPMD_DSCP}, \
+    {"SPECIAL_PACKET_TYPE", BCM56990_A0_RXPMD_SPECIAL_PACKET_TYPE}, \
+    {"ECN", BCM56990_A0_RXPMD_ECN}, \
+    {"INCOMING_TAG_STATUS", BCM56990_A0_RXPMD_INCOMING_TAG_STATUS}, \
+    {"ING_L3_INTF", BCM56990_A0_RXPMD_ING_L3_INTF}, \
+    {"ING_OTAG_ACTION", BCM56990_A0_RXPMD_ING_OTAG_ACTION}, \
+    {"IP_ROUTED", BCM56990_A0_RXPMD_IP_ROUTED}, \
+    {"L3ONLY", BCM56990_A0_RXPMD_L3ONLY}, \
+    {"LOOPBACK_PACKET_TYPE", BCM56990_A0_RXPMD_LOOPBACK_PACKET_TYPE}, \
+    {"MATCHED_RULE", BCM56990_A0_RXPMD_MATCHED_RULE}, \
+    {"MTP_INDEX", BCM56990_A0_RXPMD_MTP_INDEX}, \
+    {"OUTER_CFI", BCM56990_A0_RXPMD_OUTER_CFI}, \
+    {"OUTER_PRI", BCM56990_A0_RXPMD_OUTER_PRI}, \
+    {"OUTER_VID", BCM56990_A0_RXPMD_OUTER_VID}, \
+    {"INCOMING_INT_HDR_TYPE", BCM56990_A0_RXPMD_INCOMING_INT_HDR_TYPE}, \
+    {"PKT_LENGTH", BCM56990_A0_RXPMD_PKT_LENGTH}, \
+    {"REGEN_CRC", BCM56990_A0_RXPMD_REGEN_CRC}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM56990_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"ENTROPY_LABEL", BCM56990_A0_RXPMD_ENTROPY_LABEL}, \
+    {"SPECIAL_PACKET_INDICATOR", BCM56990_A0_RXPMD_SPECIAL_PACKET_INDICATOR}, \
+    {"SRC_PORT_NUM", BCM56990_A0_RXPMD_SRC_PORT_NUM}, \
+    {"SWITCH", BCM56990_A0_RXPMD_SWITCH}, \
+    {"TIMESTAMP", BCM56990_A0_RXPMD_TIMESTAMP}, \
+    {"TIMESTAMP_HI", BCM56990_A0_RXPMD_TIMESTAMP_HI}, \
+    {"TIMESTAMP_TYPE", BCM56990_A0_RXPMD_TIMESTAMP_TYPE}, \
+    {"TUNNEL_DECAP_TYPE", BCM56990_A0_RXPMD_TUNNEL_DECAP_TYPE}, \
+    {"UC_SW_COPY_DROPPED", BCM56990_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"UNICAST_QUEUE", BCM56990_A0_RXPMD_UNICAST_QUEUE}, \
+    {"DLB_ID", BCM56990_A0_RXPMD_DLB_ID}, \
+    {"MODULE_HDR", BCM56990_A0_RXPMD_MODULE_HDR}, \
+    {"COUNT", BCM56990_A0_RXPMD_COUNT}
+
+/*!
+ * \name BCM56990_A0_RXPMD_TIMESTAMP_TYPE encodings.
+ * \anchor BCM56990_A0_RXPMD_TIMESTAMP_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56990_A0_RXPMD_TIMESTAMP_TYPE_INVALID                     0
+#define BCM56990_A0_RXPMD_TIMESTAMP_TYPE_OAM_LM                      1
+#define BCM56990_A0_RXPMD_TIMESTAMP_TYPE_OAM_DM                      2
+#define BCM56990_A0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS                3
+/*! \} */
+
+/*! BCM56990_A0_RXPMD_TIMESTAMP_TYPE encoding name strings maps. */
+#define BCM56990_A0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT \
+    {"INVALID", BCM56990_A0_RXPMD_TIMESTAMP_TYPE_INVALID},\
+    {"OAM_LM", BCM56990_A0_RXPMD_TIMESTAMP_TYPE_OAM_LM},\
+    {"OAM_DM", BCM56990_A0_RXPMD_TIMESTAMP_TYPE_OAM_DM},\
+    {"IEEE_802_1AS", BCM56990_A0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS},\
+    {NULL, 0}
+
+/* RX_REASON defines */
+#define BCM56990_A0_RX_REASON_CPU_UVLAN                              0
+#define BCM56990_A0_RX_REASON_CPU_SLF                                1
+#define BCM56990_A0_RX_REASON_CPU_DLF                                2
+#define BCM56990_A0_RX_REASON_CPU_L2MOVE                             3
+#define BCM56990_A0_RX_REASON_CPU_L2CPU                              4
+#define BCM56990_A0_RX_REASON_CPU_L3SRC_MISS                         5
+#define BCM56990_A0_RX_REASON_CPU_L3DST_MISS                         6
+#define BCM56990_A0_RX_REASON_CPU_L3SRC_MOVE                         7
+#define BCM56990_A0_RX_REASON_CPU_MC_MISS                            8
+#define BCM56990_A0_RX_REASON_CPU_IPMC_MISS                          9
+#define BCM56990_A0_RX_REASON_CPU_FFP                                10
+#define BCM56990_A0_RX_REASON_CPU_L3HDR_ERR                          11
+#define BCM56990_A0_RX_REASON_CPU_PROTOCOL_PKT                       12
+#define BCM56990_A0_RX_REASON_CPU_DOS_ATTACK                         13
+#define BCM56990_A0_RX_REASON_CPU_MARTIAN_ADDR                       14
+#define BCM56990_A0_RX_REASON_CPU_TUNNEL_ERR                         15
+#define BCM56990_A0_RX_REASON_CPU_SFLOW                              16
+#define BCM56990_A0_RX_REASON_ICMP_REDIRECT                          17
+#define BCM56990_A0_RX_REASON_L3_SLOWPATH                            18
+#define BCM56990_A0_RX_REASON_PARITY_ERROR                           19
+#define BCM56990_A0_RX_REASON_L3_MTU_CHECK_FAIL                      20
+#define BCM56990_A0_RX_REASON_MCIDX_ERROR                            21
+#define BCM56990_A0_RX_REASON_CPU_VFP                                22
+#define BCM56990_A0_RX_REASON_MPLS_PROC_ERROR                        23
+#define BCM56990_A0_RX_REASON_PBT_NONUC_PKT                          24
+#define BCM56990_A0_RX_REASON_L3_NEXT_HOP                            25
+#define BCM56990_A0_RX_REASON_MY_STATION                             26
+#define BCM56990_A0_RX_REASON_TIME_SYNC                              27
+#define BCM56990_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR                 28
+#define BCM56990_A0_RX_REASON_BFD_SLOWPATH                           29
+#define BCM56990_A0_RX_REASON_BFD_ERROR                              30
+#define BCM56990_A0_RX_REASON_PACKET_TRACE_TO_CPU                    31
+#define BCM56990_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT               32
+#define BCM56990_A0_RX_REASON_MPLS_ALERT_LABEL                       33
+#define BCM56990_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH            34
+#define BCM56990_A0_RX_REASON_DLB_MONITOR                            35
+#define BCM56990_A0_RX_REASON_INT_TURN_AROUND                        36
+#define BCM56990_A0_RX_REASON_ETRAP_MONITOR                          37
+#define BCM56990_A0_RX_REASON_SRV6_ERROR                             38
+#define BCM56990_A0_RX_REASON_VXLAN_VN_ID_MISS                       39
+#define BCM56990_A0_RX_REASON_COUNT                                  40
+
+/* RX_REASON name map */
+#define BCM56990_A0_RX_REASON_NAME_MAP_INIT \
+    {"CPU_UVLAN", BCM56990_A0_RX_REASON_CPU_UVLAN}, \
+    {"CPU_SLF", BCM56990_A0_RX_REASON_CPU_SLF}, \
+    {"CPU_DLF", BCM56990_A0_RX_REASON_CPU_DLF}, \
+    {"CPU_L2MOVE", BCM56990_A0_RX_REASON_CPU_L2MOVE}, \
+    {"CPU_L2CPU", BCM56990_A0_RX_REASON_CPU_L2CPU}, \
+    {"CPU_L3SRC_MISS", BCM56990_A0_RX_REASON_CPU_L3SRC_MISS}, \
+    {"CPU_L3DST_MISS", BCM56990_A0_RX_REASON_CPU_L3DST_MISS}, \
+    {"CPU_L3SRC_MOVE", BCM56990_A0_RX_REASON_CPU_L3SRC_MOVE}, \
+    {"CPU_MC_MISS", BCM56990_A0_RX_REASON_CPU_MC_MISS}, \
+    {"CPU_IPMC_MISS", BCM56990_A0_RX_REASON_CPU_IPMC_MISS}, \
+    {"CPU_FFP", BCM56990_A0_RX_REASON_CPU_FFP}, \
+    {"CPU_L3HDR_ERR", BCM56990_A0_RX_REASON_CPU_L3HDR_ERR}, \
+    {"CPU_PROTOCOL_PKT", BCM56990_A0_RX_REASON_CPU_PROTOCOL_PKT}, \
+    {"CPU_DOS_ATTACK", BCM56990_A0_RX_REASON_CPU_DOS_ATTACK}, \
+    {"CPU_MARTIAN_ADDR", BCM56990_A0_RX_REASON_CPU_MARTIAN_ADDR}, \
+    {"CPU_TUNNEL_ERR", BCM56990_A0_RX_REASON_CPU_TUNNEL_ERR}, \
+    {"CPU_SFLOW", BCM56990_A0_RX_REASON_CPU_SFLOW}, \
+    {"ICMP_REDIRECT", BCM56990_A0_RX_REASON_ICMP_REDIRECT}, \
+    {"L3_SLOWPATH", BCM56990_A0_RX_REASON_L3_SLOWPATH}, \
+    {"PARITY_ERROR", BCM56990_A0_RX_REASON_PARITY_ERROR}, \
+    {"L3_MTU_CHECK_FAIL", BCM56990_A0_RX_REASON_L3_MTU_CHECK_FAIL}, \
+    {"MCIDX_ERROR", BCM56990_A0_RX_REASON_MCIDX_ERROR}, \
+    {"CPU_VFP", BCM56990_A0_RX_REASON_CPU_VFP}, \
+    {"MPLS_PROC_ERROR", BCM56990_A0_RX_REASON_MPLS_PROC_ERROR}, \
+    {"PBT_NONUC_PKT", BCM56990_A0_RX_REASON_PBT_NONUC_PKT}, \
+    {"L3_NEXT_HOP", BCM56990_A0_RX_REASON_L3_NEXT_HOP}, \
+    {"MY_STATION", BCM56990_A0_RX_REASON_MY_STATION}, \
+    {"TIME_SYNC", BCM56990_A0_RX_REASON_TIME_SYNC}, \
+    {"TUNNEL_DECAP_ECN_ERROR", BCM56990_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \
+    {"BFD_SLOWPATH", BCM56990_A0_RX_REASON_BFD_SLOWPATH}, \
+    {"BFD_ERROR", BCM56990_A0_RX_REASON_BFD_ERROR}, \
+    {"PACKET_TRACE_TO_CPU", BCM56990_A0_RX_REASON_PACKET_TRACE_TO_CPU}, \
+    {"MPLS_UNKNOWN_CONTROL_PKT", BCM56990_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \
+    {"MPLS_ALERT_LABEL", BCM56990_A0_RX_REASON_MPLS_ALERT_LABEL}, \
+    {"CPU_IPMC_INTERFACE_MISMATCH", BCM56990_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \
+    {"DLB_MONITOR", BCM56990_A0_RX_REASON_DLB_MONITOR}, \
+    {"INT_TURN_AROUND", BCM56990_A0_RX_REASON_INT_TURN_AROUND}, \
+    {"ETRAP_MONITOR", BCM56990_A0_RX_REASON_ETRAP_MONITOR}, \
+    {"SRV6_ERROR", BCM56990_A0_RX_REASON_SRV6_ERROR}, \
+    {"VXLAN_VN_ID_MISS", BCM56990_A0_RX_REASON_VXLAN_VN_ID_MISS}, \
+    {"COUNT", BCM56990_A0_RX_REASON_COUNT}
+
+/*!
+ * \name BCM56990_A0_RX_REASON_CPU_SFLOW encodings.
+ * \anchor BCM56990_A0_RX_REASON_CPU_SFLOW_XXX
+ */
+/*! \{ */
+#define BCM56990_A0_RX_REASON_CPU_SFLOW_INVALID                      0
+#define BCM56990_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX               1
+#define BCM56990_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST                2
+#define BCM56990_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC                3
+/*! \} */
+
+/*! BCM56990_A0_RX_REASON_CPU_SFLOW encoding name strings maps. */
+#define BCM56990_A0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT \
+    {"INVALID", BCM56990_A0_RX_REASON_CPU_SFLOW_INVALID},\
+    {"CPU_SFLOW_FLEX", BCM56990_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX},\
+    {"CPU_SFLOW_DST", BCM56990_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST},\
+    {"CPU_SFLOW_SRC", BCM56990_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56990_A0_RX_REASON_MPLS_PROC_ERROR encodings.
+ * \anchor BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_XXX
+ */
+/*! \{ */
+#define BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_NOP                    0
+#define BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD        1
+#define BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION         2
+#define BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS             3
+#define BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL         4
+/*! \} */
+
+/*! BCM56990_A0_RX_REASON_MPLS_PROC_ERROR encoding name strings maps. */
+#define BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT \
+    {"NOP", BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_NOP},\
+    {"INVALID_PAYLOAD", BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD},\
+    {"INVALID_ACTION", BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION},\
+    {"LABEL_MISS", BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS},\
+    {"TTL_CHECK_FAIL", BCM56990_A0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL},\
+    {NULL, 0}
+
+/* TXPMD defines */
+#define BCM56990_A0_TXPMD_CELL_LENGTH                                0
+#define BCM56990_A0_TXPMD_EOP                                        1
+#define BCM56990_A0_TXPMD_SOP                                        2
+#define BCM56990_A0_TXPMD_PKT_LENGTH                                 3
+#define BCM56990_A0_TXPMD_IPCF_PTR                                   4
+#define BCM56990_A0_TXPMD_SRC_MODID                                  5
+#define BCM56990_A0_TXPMD_COS                                        6
+#define BCM56990_A0_TXPMD_UNICAST                                    7
+#define BCM56990_A0_TXPMD_SET_L2BM                                   8
+#define BCM56990_A0_TXPMD_RQE_Q_NUM                                  9
+#define BCM56990_A0_TXPMD_SPAP                                       10
+#define BCM56990_A0_TXPMD_SPID                                       11
+#define BCM56990_A0_TXPMD_SPID_OVERRIDE                              12
+#define BCM56990_A0_TXPMD_INPUT_PRI                                  13
+#define BCM56990_A0_TXPMD_LOCAL_DEST_PORT                            14
+#define BCM56990_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET              15
+#define BCM56990_A0_TXPMD_TX_TS                                      16
+#define BCM56990_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN            17
+#define BCM56990_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM                18
+#define BCM56990_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE                   19
+#define BCM56990_A0_TXPMD_CELL_ERROR                                 20
+#define BCM56990_A0_TXPMD_HEADER_TYPE                                21
+#define BCM56990_A0_TXPMD_START                                      22
+#define BCM56990_A0_TXPMD_COUNT                                      23
+
+/* TXPMD name map */
+#define BCM56990_A0_TXPMD_NAME_MAP_INIT \
+    {"CELL_LENGTH", BCM56990_A0_TXPMD_CELL_LENGTH}, \
+    {"EOP", BCM56990_A0_TXPMD_EOP}, \
+    {"SOP", BCM56990_A0_TXPMD_SOP}, \
+    {"PKT_LENGTH", BCM56990_A0_TXPMD_PKT_LENGTH}, \
+    {"IPCF_PTR", BCM56990_A0_TXPMD_IPCF_PTR}, \
+    {"SRC_MODID", BCM56990_A0_TXPMD_SRC_MODID}, \
+    {"COS", BCM56990_A0_TXPMD_COS}, \
+    {"UNICAST", BCM56990_A0_TXPMD_UNICAST}, \
+    {"SET_L2BM", BCM56990_A0_TXPMD_SET_L2BM}, \
+    {"RQE_Q_NUM", BCM56990_A0_TXPMD_RQE_Q_NUM}, \
+    {"SPAP", BCM56990_A0_TXPMD_SPAP}, \
+    {"SPID", BCM56990_A0_TXPMD_SPID}, \
+    {"SPID_OVERRIDE", BCM56990_A0_TXPMD_SPID_OVERRIDE}, \
+    {"INPUT_PRI", BCM56990_A0_TXPMD_INPUT_PRI}, \
+    {"LOCAL_DEST_PORT", BCM56990_A0_TXPMD_LOCAL_DEST_PORT}, \
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM56990_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"TX_TS", BCM56990_A0_TXPMD_TX_TS}, \
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM56990_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCM56990_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"IEEE1588_ONE_STEP_ENABLE", BCM56990_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \
+    {"CELL_ERROR", BCM56990_A0_TXPMD_CELL_ERROR}, \
+    {"HEADER_TYPE", BCM56990_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM56990_A0_TXPMD_START}, \
+    {"COUNT", BCM56990_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM56990_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM56990_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56990_A0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM56990_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU                 1
+/*! \} */
+
+/*! BCM56990_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM56990_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56990_A0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_CPU", BCM56990_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56990_A0_TXPMD_START encodings.
+ * \anchor BCM56990_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM56990_A0_TXPMD_START_RESERVED_0                           0
+#define BCM56990_A0_TXPMD_START_RESERVED_1                           1
+#define BCM56990_A0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM56990_A0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM56990_A0_TXPMD_START encoding name strings maps. */
+#define BCM56990_A0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56990_A0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM56990_A0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM56990_A0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM56990_A0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+/* LBHDR defines */
+#define BCM56990_A0_LBHDR_ETHERNET_PP_PORT                           0
+#define BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE                      1
+#define BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE                  2
+#define BCM56990_A0_LBHDR_ETHERNET_DESTINATION                       3
+#define BCM56990_A0_LBHDR_ETHERNET_ROUTED_PKT                        4
+#define BCM56990_A0_LBHDR_ETHERNET_QOS_FIELDS_VLD                    5
+#define BCM56990_A0_LBHDR_ETHERNET_INT_CN                            6
+#define BCM56990_A0_LBHDR_ETHERNET_INT_PRI                           7
+#define BCM56990_A0_LBHDR_ETHERNET_DP                                8
+#define BCM56990_A0_LBHDR_ETHERNET_ECMP_MEMBER_ID                    9
+#define BCM56990_A0_LBHDR_ETHERNET_VRF                               10
+#define BCM56990_A0_LBHDR_ETHERNET_VRF_VALID                         11
+#define BCM56990_A0_LBHDR_ETHERNET_MCAST_LB_INDEX                    12
+#define BCM56990_A0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD                13
+#define BCM56990_A0_LBHDR_TRILL_ACCESS_NONUC_TC                      14
+#define BCM56990_A0_LBHDR_TRILL_ACCESS_NONUC_CNG                     15
+#define BCM56990_A0_LBHDR_TRILL_NETWORK_NONUC_TC                     16
+#define BCM56990_A0_LBHDR_TRILL_NETWORK_NONUC_CNG                    17
+#define BCM56990_A0_LBHDR_PKT_PROFILE                                18
+#define BCM56990_A0_LBHDR_VISIBILITY_PKT                             19
+#define BCM56990_A0_LBHDR_SOURCE                                     20
+#define BCM56990_A0_LBHDR_SOURCE_TYPE                                21
+#define BCM56990_A0_LBHDR_HEADER_TYPE                                22
+#define BCM56990_A0_LBHDR_INPUT_PRIORITY                             23
+#define BCM56990_A0_LBHDR_START                                      24
+#define BCM56990_A0_LBHDR_COUNT                                      25
+
+/* LBHDR name map */
+#define BCM56990_A0_LBHDR_NAME_MAP_INIT \
+    {"ETHERNET::PP_PORT", BCM56990_A0_LBHDR_ETHERNET_PP_PORT}, \
+    {"ETHERNET::SUBFLOW_TYPE", BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE}, \
+    {"ETHERNET::DESTINATION_TYPE", BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE}, \
+    {"ETHERNET::DESTINATION", BCM56990_A0_LBHDR_ETHERNET_DESTINATION}, \
+    {"ETHERNET::ROUTED_PKT", BCM56990_A0_LBHDR_ETHERNET_ROUTED_PKT}, \
+    {"ETHERNET::QOS_FIELDS_VLD", BCM56990_A0_LBHDR_ETHERNET_QOS_FIELDS_VLD}, \
+    {"ETHERNET::INT_CN", BCM56990_A0_LBHDR_ETHERNET_INT_CN}, \
+    {"ETHERNET::INT_PRI", BCM56990_A0_LBHDR_ETHERNET_INT_PRI}, \
+    {"ETHERNET::DP", BCM56990_A0_LBHDR_ETHERNET_DP}, \
+    {"ETHERNET::ECMP_MEMBER_ID", BCM56990_A0_LBHDR_ETHERNET_ECMP_MEMBER_ID}, \
+    {"ETHERNET::VRF", BCM56990_A0_LBHDR_ETHERNET_VRF}, \
+    {"ETHERNET::VRF_VALID", BCM56990_A0_LBHDR_ETHERNET_VRF_VALID}, \
+    {"ETHERNET::MCAST_LB_INDEX", BCM56990_A0_LBHDR_ETHERNET_MCAST_LB_INDEX}, \
+    {"ETHERNET::MCAST_LB_INDEX_VLD", BCM56990_A0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD}, \
+    {"TRILL_ACCESS_NONUC::TC", BCM56990_A0_LBHDR_TRILL_ACCESS_NONUC_TC}, \
+    {"TRILL_ACCESS_NONUC::CNG", BCM56990_A0_LBHDR_TRILL_ACCESS_NONUC_CNG}, \
+    {"TRILL_NETWORK_NONUC::TC", BCM56990_A0_LBHDR_TRILL_NETWORK_NONUC_TC}, \
+    {"TRILL_NETWORK_NONUC::CNG", BCM56990_A0_LBHDR_TRILL_NETWORK_NONUC_CNG}, \
+    {"PKT_PROFILE", BCM56990_A0_LBHDR_PKT_PROFILE}, \
+    {"VISIBILITY_PKT", BCM56990_A0_LBHDR_VISIBILITY_PKT}, \
+    {"SOURCE", BCM56990_A0_LBHDR_SOURCE}, \
+    {"SOURCE_TYPE", BCM56990_A0_LBHDR_SOURCE_TYPE}, \
+    {"HEADER_TYPE", BCM56990_A0_LBHDR_HEADER_TYPE}, \
+    {"INPUT_PRIORITY", BCM56990_A0_LBHDR_INPUT_PRIORITY}, \
+    {"START", BCM56990_A0_LBHDR_START}, \
+    {"COUNT", BCM56990_A0_LBHDR_COUNT}
+
+/*!
+ * \name BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE encodings.
+ * \anchor BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE       0
+#define BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC          1
+#define BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2           2
+#define BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3           3
+/*! \} */
+
+/*! BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE encoding name strings maps. */
+#define BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT \
+    {"CPU_MASQUERADE", BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE},\
+    {"CPU_TX_PROC", BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC},\
+    {"RESERVED_2", BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2},\
+    {"RESERVED_3", BCM56990_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE encodings.
+ * \anchor BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP             0
+#define BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI              1
+#define BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP             2
+#define BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER      3
+#define BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC             4
+#define BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC             5
+#define BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD       6
+/*! \} */
+
+/*! BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE encoding name strings maps. */
+#define BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"DGLP", BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP},\
+    {"NHI", BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI},\
+    {"ECMP", BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP},\
+    {"ECMP_MEMBER", BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER},\
+    {"IPMC", BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC},\
+    {"L2MC", BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC},\
+    {"VLAN_FLOOD", BCM56990_A0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56990_A0_LBHDR_HEADER_TYPE encodings.
+ * \anchor BCM56990_A0_LBHDR_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56990_A0_LBHDR_HEADER_TYPE_TUNNEL_TERM                    0
+#define BCM56990_A0_LBHDR_HEADER_TYPE_TRILL_NW                       1
+#define BCM56990_A0_LBHDR_HEADER_TYPE_TRILL_AC                       2
+#define BCM56990_A0_LBHDR_HEADER_TYPE_ETHERNET                       3
+/*! \} */
+
+/*! BCM56990_A0_LBHDR_HEADER_TYPE encoding name strings maps. */
+#define BCM56990_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \
+    {"TUNNEL_TERM", BCM56990_A0_LBHDR_HEADER_TYPE_TUNNEL_TERM},\
+    {"TRILL_NW", BCM56990_A0_LBHDR_HEADER_TYPE_TRILL_NW},\
+    {"TRILL_AC", BCM56990_A0_LBHDR_HEADER_TYPE_TRILL_AC},\
+    {"ETHERNET", BCM56990_A0_LBHDR_HEADER_TYPE_ETHERNET},\
+    {NULL, 0}
+
+#endif /* BCM56990_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.h
new file mode 100644
index 00000000000..b58f6039d5e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.h
@@ -0,0 +1,484 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM56990_B0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM56990_B0_PMD_FIELD_H
+#define BCM56990_B0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM56990_B0_RXPMD_ING_L3_INTF                                0
+#define BCM56990_B0_RXPMD_I2E_CLASSID                                1
+#define BCM56990_B0_RXPMD_RX_BFD_SESSION_INDEX                       2
+#define BCM56990_B0_RXPMD_I2E_CLASSID_TYPE                           3
+#define BCM56990_B0_RXPMD_RX_BFD_START_OFFSET_TYPE                   4
+#define BCM56990_B0_RXPMD_RX_BFD_START_OFFSET                        5
+#define BCM56990_B0_RXPMD_ING_L3_INTF_VALID                          6
+#define BCM56990_B0_RXPMD_CPU_COS                                    7
+#define BCM56990_B0_RXPMD_QUEUE_NUM                                  8
+#define BCM56990_B0_RXPMD_BPDU                                       9
+#define BCM56990_B0_RXPMD_CHANGE_DSCP                                10
+#define BCM56990_B0_RXPMD_CHANGE_ECN                                 11
+#define BCM56990_B0_RXPMD_DLB_ID_VALID                               12
+#define BCM56990_B0_RXPMD_REASON                                     13
+#define BCM56990_B0_RXPMD_REASON_TYPE                                14
+#define BCM56990_B0_RXPMD_DO_NOT_CHANGE_TTL                          15
+#define BCM56990_B0_RXPMD_DSCP                                       16
+#define BCM56990_B0_RXPMD_SPECIAL_PACKET_TYPE                        17
+#define BCM56990_B0_RXPMD_ECN                                        18
+#define BCM56990_B0_RXPMD_INCOMING_TAG_STATUS                        19
+#define BCM56990_B0_RXPMD_O_NHI                                      20
+#define BCM56990_B0_RXPMD_ING_OTAG_ACTION                            21
+#define BCM56990_B0_RXPMD_IP_ROUTED                                  22
+#define BCM56990_B0_RXPMD_L3ONLY                                     23
+#define BCM56990_B0_RXPMD_MATCHED_RULE                               24
+#define BCM56990_B0_RXPMD_MTP_INDEX                                  25
+#define BCM56990_B0_RXPMD_OUTER_CFI                                  26
+#define BCM56990_B0_RXPMD_OUTER_PRI                                  27
+#define BCM56990_B0_RXPMD_OUTER_VID                                  28
+#define BCM56990_B0_RXPMD_INCOMING_INT_HDR_TYPE                      29
+#define BCM56990_B0_RXPMD_PKT_LENGTH                                 30
+#define BCM56990_B0_RXPMD_REGEN_CRC                                  31
+#define BCM56990_B0_RXPMD_REPLICATION_OR_NHOP_INDEX                  32
+#define BCM56990_B0_RXPMD_ENTROPY_LABEL                              33
+#define BCM56990_B0_RXPMD_SPECIAL_PACKET_INDICATOR                   34
+#define BCM56990_B0_RXPMD_SRC_PORT_NUM                               35
+#define BCM56990_B0_RXPMD_SWITCH                                     36
+#define BCM56990_B0_RXPMD_TIMESTAMP                                  37
+#define BCM56990_B0_RXPMD_TIMESTAMP_HI                               38
+#define BCM56990_B0_RXPMD_TIMESTAMP_TYPE                             39
+#define BCM56990_B0_RXPMD_TUNNEL_DECAP_TYPE                          40
+#define BCM56990_B0_RXPMD_UC_SW_COPY_DROPPED                         41
+#define BCM56990_B0_RXPMD_UNICAST_QUEUE                              42
+#define BCM56990_B0_RXPMD_DLB_ID                                     43
+#define BCM56990_B0_RXPMD_MODULE_HDR                                 44
+#define BCM56990_B0_RXPMD_COUNT                                      45
+
+/* RXPMD name map */
+#define BCM56990_B0_RXPMD_NAME_MAP_INIT \
+    {"ING_L3_INTF", BCM56990_B0_RXPMD_ING_L3_INTF}, \
+    {"I2E_CLASSID", BCM56990_B0_RXPMD_I2E_CLASSID}, \
+    {"RX_BFD_SESSION_INDEX", BCM56990_B0_RXPMD_RX_BFD_SESSION_INDEX}, \
+    {"I2E_CLASSID_TYPE", BCM56990_B0_RXPMD_I2E_CLASSID_TYPE}, \
+    {"RX_BFD_START_OFFSET_TYPE", BCM56990_B0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \
+    {"RX_BFD_START_OFFSET", BCM56990_B0_RXPMD_RX_BFD_START_OFFSET}, \
+    {"ING_L3_INTF_VALID", BCM56990_B0_RXPMD_ING_L3_INTF_VALID}, \
+    {"CPU_COS", BCM56990_B0_RXPMD_CPU_COS}, \
+    {"QUEUE_NUM", BCM56990_B0_RXPMD_QUEUE_NUM}, \
+    {"BPDU", BCM56990_B0_RXPMD_BPDU}, \
+    {"CHANGE_DSCP", BCM56990_B0_RXPMD_CHANGE_DSCP}, \
+    {"CHANGE_ECN", BCM56990_B0_RXPMD_CHANGE_ECN}, \
+    {"DLB_ID_VALID", BCM56990_B0_RXPMD_DLB_ID_VALID}, \
+    {"REASON", BCM56990_B0_RXPMD_REASON}, \
+    {"REASON_TYPE", BCM56990_B0_RXPMD_REASON_TYPE}, \
+    {"DO_NOT_CHANGE_TTL", BCM56990_B0_RXPMD_DO_NOT_CHANGE_TTL}, \
+    {"DSCP", BCM56990_B0_RXPMD_DSCP}, \
+    {"SPECIAL_PACKET_TYPE", BCM56990_B0_RXPMD_SPECIAL_PACKET_TYPE}, \
+    {"ECN", BCM56990_B0_RXPMD_ECN}, \
+    {"INCOMING_TAG_STATUS", BCM56990_B0_RXPMD_INCOMING_TAG_STATUS}, \
+    {"O_NHI", BCM56990_B0_RXPMD_O_NHI}, \
+    {"ING_OTAG_ACTION", BCM56990_B0_RXPMD_ING_OTAG_ACTION}, \
+    {"IP_ROUTED", BCM56990_B0_RXPMD_IP_ROUTED}, \
+    {"L3ONLY", BCM56990_B0_RXPMD_L3ONLY}, \
+    {"MATCHED_RULE", BCM56990_B0_RXPMD_MATCHED_RULE}, \
+    {"MTP_INDEX", BCM56990_B0_RXPMD_MTP_INDEX}, \
+    {"OUTER_CFI", BCM56990_B0_RXPMD_OUTER_CFI}, \
+    {"OUTER_PRI", BCM56990_B0_RXPMD_OUTER_PRI}, \
+    {"OUTER_VID", BCM56990_B0_RXPMD_OUTER_VID}, \
+    {"INCOMING_INT_HDR_TYPE", BCM56990_B0_RXPMD_INCOMING_INT_HDR_TYPE}, \
+    {"PKT_LENGTH", BCM56990_B0_RXPMD_PKT_LENGTH}, \
+    {"REGEN_CRC", BCM56990_B0_RXPMD_REGEN_CRC}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM56990_B0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"ENTROPY_LABEL", BCM56990_B0_RXPMD_ENTROPY_LABEL}, \
+    {"SPECIAL_PACKET_INDICATOR", BCM56990_B0_RXPMD_SPECIAL_PACKET_INDICATOR}, \
+    {"SRC_PORT_NUM", BCM56990_B0_RXPMD_SRC_PORT_NUM}, \
+    {"SWITCH", BCM56990_B0_RXPMD_SWITCH}, \
+    {"TIMESTAMP", BCM56990_B0_RXPMD_TIMESTAMP}, \
+    {"TIMESTAMP_HI", BCM56990_B0_RXPMD_TIMESTAMP_HI}, \
+    {"TIMESTAMP_TYPE", BCM56990_B0_RXPMD_TIMESTAMP_TYPE}, \
+    {"TUNNEL_DECAP_TYPE", BCM56990_B0_RXPMD_TUNNEL_DECAP_TYPE}, \
+    {"UC_SW_COPY_DROPPED", BCM56990_B0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"UNICAST_QUEUE", BCM56990_B0_RXPMD_UNICAST_QUEUE}, \
+    {"DLB_ID", BCM56990_B0_RXPMD_DLB_ID}, \
+    {"MODULE_HDR", BCM56990_B0_RXPMD_MODULE_HDR}, \
+    {"COUNT", BCM56990_B0_RXPMD_COUNT}
+
+/*!
+ * \name BCM56990_B0_RXPMD_TIMESTAMP_TYPE encodings.
+ * \anchor BCM56990_B0_RXPMD_TIMESTAMP_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56990_B0_RXPMD_TIMESTAMP_TYPE_INVALID                     0
+#define BCM56990_B0_RXPMD_TIMESTAMP_TYPE_OAM_LM                      1
+#define BCM56990_B0_RXPMD_TIMESTAMP_TYPE_OAM_DM                      2
+#define BCM56990_B0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS                3
+/*! \} */
+
+/*! BCM56990_B0_RXPMD_TIMESTAMP_TYPE encoding name strings maps. */
+#define BCM56990_B0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT \
+    {"INVALID", BCM56990_B0_RXPMD_TIMESTAMP_TYPE_INVALID},\
+    {"OAM_LM", BCM56990_B0_RXPMD_TIMESTAMP_TYPE_OAM_LM},\
+    {"OAM_DM", BCM56990_B0_RXPMD_TIMESTAMP_TYPE_OAM_DM},\
+    {"IEEE_802_1AS", BCM56990_B0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS},\
+    {NULL, 0}
+
+/* RX_REASON defines */
+#define BCM56990_B0_RX_REASON_CPU_UVLAN                              0
+#define BCM56990_B0_RX_REASON_CPU_SLF                                1
+#define BCM56990_B0_RX_REASON_CPU_DLF                                2
+#define BCM56990_B0_RX_REASON_CPU_L2MOVE                             3
+#define BCM56990_B0_RX_REASON_CPU_L2CPU                              4
+#define BCM56990_B0_RX_REASON_CPU_L3SRC_MISS                         5
+#define BCM56990_B0_RX_REASON_CPU_L3DST_MISS                         6
+#define BCM56990_B0_RX_REASON_CPU_L3SRC_MOVE                         7
+#define BCM56990_B0_RX_REASON_CPU_MC_MISS                            8
+#define BCM56990_B0_RX_REASON_CPU_IPMC_MISS                          9
+#define BCM56990_B0_RX_REASON_CPU_FFP                                10
+#define BCM56990_B0_RX_REASON_CPU_L3HDR_ERR                          11
+#define BCM56990_B0_RX_REASON_CPU_PROTOCOL_PKT                       12
+#define BCM56990_B0_RX_REASON_CPU_DOS_ATTACK                         13
+#define BCM56990_B0_RX_REASON_CPU_MARTIAN_ADDR                       14
+#define BCM56990_B0_RX_REASON_CPU_TUNNEL_ERR                         15
+#define BCM56990_B0_RX_REASON_CPU_SFLOW                              16
+#define BCM56990_B0_RX_REASON_ICMP_REDIRECT                          17
+#define BCM56990_B0_RX_REASON_L3_SLOWPATH                            18
+#define BCM56990_B0_RX_REASON_PARITY_ERROR                           19
+#define BCM56990_B0_RX_REASON_L3_MTU_CHECK_FAIL                      20
+#define BCM56990_B0_RX_REASON_MCIDX_ERROR                            21
+#define BCM56990_B0_RX_REASON_CPU_VFP                                22
+#define BCM56990_B0_RX_REASON_MPLS_PROC_ERROR                        23
+#define BCM56990_B0_RX_REASON_PBT_NONUC_PKT                          24
+#define BCM56990_B0_RX_REASON_L3_NEXT_HOP                            25
+#define BCM56990_B0_RX_REASON_MY_STATION                             26
+#define BCM56990_B0_RX_REASON_TIME_SYNC                              27
+#define BCM56990_B0_RX_REASON_TUNNEL_DECAP_ECN_ERROR                 28
+#define BCM56990_B0_RX_REASON_BFD_SLOWPATH                           29
+#define BCM56990_B0_RX_REASON_BFD_ERROR                              30
+#define BCM56990_B0_RX_REASON_PACKET_TRACE_TO_CPU                    31
+#define BCM56990_B0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT               32
+#define BCM56990_B0_RX_REASON_MPLS_ALERT_LABEL                       33
+#define BCM56990_B0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH            34
+#define BCM56990_B0_RX_REASON_DLB_MONITOR                            35
+#define BCM56990_B0_RX_REASON_INT_TURN_AROUND                        36
+#define BCM56990_B0_RX_REASON_ETRAP_MONITOR                          37
+#define BCM56990_B0_RX_REASON_SRV6_ERROR                             38
+#define BCM56990_B0_RX_REASON_VXLAN_VN_ID_MISS                       39
+#define BCM56990_B0_RX_REASON_VXLAN_SIP_MISS                         40
+#define BCM56990_B0_RX_REASON_ADAPT_MISS                             41
+#define BCM56990_B0_RX_REASON_COUNT                                  42
+
+/* RX_REASON name map */
+#define BCM56990_B0_RX_REASON_NAME_MAP_INIT \
+    {"CPU_UVLAN", BCM56990_B0_RX_REASON_CPU_UVLAN}, \
+    {"CPU_SLF", BCM56990_B0_RX_REASON_CPU_SLF}, \
+    {"CPU_DLF", BCM56990_B0_RX_REASON_CPU_DLF}, \
+    {"CPU_L2MOVE", BCM56990_B0_RX_REASON_CPU_L2MOVE}, \
+    {"CPU_L2CPU", BCM56990_B0_RX_REASON_CPU_L2CPU}, \
+    {"CPU_L3SRC_MISS", BCM56990_B0_RX_REASON_CPU_L3SRC_MISS}, \
+    {"CPU_L3DST_MISS", BCM56990_B0_RX_REASON_CPU_L3DST_MISS}, \
+    {"CPU_L3SRC_MOVE", BCM56990_B0_RX_REASON_CPU_L3SRC_MOVE}, \
+    {"CPU_MC_MISS", BCM56990_B0_RX_REASON_CPU_MC_MISS}, \
+    {"CPU_IPMC_MISS", BCM56990_B0_RX_REASON_CPU_IPMC_MISS}, \
+    {"CPU_FFP", BCM56990_B0_RX_REASON_CPU_FFP}, \
+    {"CPU_L3HDR_ERR", BCM56990_B0_RX_REASON_CPU_L3HDR_ERR}, \
+    {"CPU_PROTOCOL_PKT", BCM56990_B0_RX_REASON_CPU_PROTOCOL_PKT}, \
+    {"CPU_DOS_ATTACK", BCM56990_B0_RX_REASON_CPU_DOS_ATTACK}, \
+    {"CPU_MARTIAN_ADDR", BCM56990_B0_RX_REASON_CPU_MARTIAN_ADDR}, \
+    {"CPU_TUNNEL_ERR", BCM56990_B0_RX_REASON_CPU_TUNNEL_ERR}, \
+    {"CPU_SFLOW", BCM56990_B0_RX_REASON_CPU_SFLOW}, \
+    {"ICMP_REDIRECT", BCM56990_B0_RX_REASON_ICMP_REDIRECT}, \
+    {"L3_SLOWPATH", BCM56990_B0_RX_REASON_L3_SLOWPATH}, \
+    {"PARITY_ERROR", BCM56990_B0_RX_REASON_PARITY_ERROR}, \
+    {"L3_MTU_CHECK_FAIL", BCM56990_B0_RX_REASON_L3_MTU_CHECK_FAIL}, \
+    {"MCIDX_ERROR", BCM56990_B0_RX_REASON_MCIDX_ERROR}, \
+    {"CPU_VFP", BCM56990_B0_RX_REASON_CPU_VFP}, \
+    {"MPLS_PROC_ERROR", BCM56990_B0_RX_REASON_MPLS_PROC_ERROR}, \
+    {"PBT_NONUC_PKT", BCM56990_B0_RX_REASON_PBT_NONUC_PKT}, \
+    {"L3_NEXT_HOP", BCM56990_B0_RX_REASON_L3_NEXT_HOP}, \
+    {"MY_STATION", BCM56990_B0_RX_REASON_MY_STATION}, \
+    {"TIME_SYNC", BCM56990_B0_RX_REASON_TIME_SYNC}, \
+    {"TUNNEL_DECAP_ECN_ERROR", BCM56990_B0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \
+    {"BFD_SLOWPATH", BCM56990_B0_RX_REASON_BFD_SLOWPATH}, \
+    {"BFD_ERROR", BCM56990_B0_RX_REASON_BFD_ERROR}, \
+    {"PACKET_TRACE_TO_CPU", BCM56990_B0_RX_REASON_PACKET_TRACE_TO_CPU}, \
+    {"MPLS_UNKNOWN_CONTROL_PKT", BCM56990_B0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \
+    {"MPLS_ALERT_LABEL", BCM56990_B0_RX_REASON_MPLS_ALERT_LABEL}, \
+    {"CPU_IPMC_INTERFACE_MISMATCH", BCM56990_B0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \
+    {"DLB_MONITOR", BCM56990_B0_RX_REASON_DLB_MONITOR}, \
+    {"INT_TURN_AROUND", BCM56990_B0_RX_REASON_INT_TURN_AROUND}, \
+    {"ETRAP_MONITOR", BCM56990_B0_RX_REASON_ETRAP_MONITOR}, \
+    {"SRV6_ERROR", BCM56990_B0_RX_REASON_SRV6_ERROR}, \
+    {"VXLAN_VN_ID_MISS", BCM56990_B0_RX_REASON_VXLAN_VN_ID_MISS}, \
+    {"VXLAN_SIP_MISS", BCM56990_B0_RX_REASON_VXLAN_SIP_MISS}, \
+    {"ADAPT_MISS", BCM56990_B0_RX_REASON_ADAPT_MISS}, \
+    {"COUNT", BCM56990_B0_RX_REASON_COUNT}
+
+/*!
+ * \name BCM56990_B0_RX_REASON_CPU_SFLOW encodings.
+ * \anchor BCM56990_B0_RX_REASON_CPU_SFLOW_XXX
+ */
+/*! \{ */
+#define BCM56990_B0_RX_REASON_CPU_SFLOW_INVALID                      0
+#define BCM56990_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX               1
+#define BCM56990_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST                2
+#define BCM56990_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC                3
+/*! \} */
+
+/*! BCM56990_B0_RX_REASON_CPU_SFLOW encoding name strings maps. */
+#define BCM56990_B0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT \
+    {"INVALID", BCM56990_B0_RX_REASON_CPU_SFLOW_INVALID},\
+    {"CPU_SFLOW_FLEX", BCM56990_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX},\
+    {"CPU_SFLOW_DST", BCM56990_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST},\
+    {"CPU_SFLOW_SRC", BCM56990_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56990_B0_RX_REASON_MPLS_PROC_ERROR encodings.
+ * \anchor BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_XXX
+ */
+/*! \{ */
+#define BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_NOP                    0
+#define BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD        1
+#define BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION         2
+#define BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS             3
+#define BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL         4
+/*! \} */
+
+/*! BCM56990_B0_RX_REASON_MPLS_PROC_ERROR encoding name strings maps. */
+#define BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT \
+    {"NOP", BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_NOP},\
+    {"INVALID_PAYLOAD", BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD},\
+    {"INVALID_ACTION", BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION},\
+    {"LABEL_MISS", BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS},\
+    {"TTL_CHECK_FAIL", BCM56990_B0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL},\
+    {NULL, 0}
+
+/* TXPMD defines */
+#define BCM56990_B0_TXPMD_CELL_LENGTH                                0
+#define BCM56990_B0_TXPMD_EOP                                        1
+#define BCM56990_B0_TXPMD_SOP                                        2
+#define BCM56990_B0_TXPMD_PKT_LENGTH                                 3
+#define BCM56990_B0_TXPMD_IPCF_PTR                                   4
+#define BCM56990_B0_TXPMD_SRC_MODID                                  5
+#define BCM56990_B0_TXPMD_COS                                        6
+#define BCM56990_B0_TXPMD_UNICAST                                    7
+#define BCM56990_B0_TXPMD_SET_L2BM                                   8
+#define BCM56990_B0_TXPMD_RQE_Q_NUM                                  9
+#define BCM56990_B0_TXPMD_SPAP                                       10
+#define BCM56990_B0_TXPMD_SPID                                       11
+#define BCM56990_B0_TXPMD_SPID_OVERRIDE                              12
+#define BCM56990_B0_TXPMD_INPUT_PRI                                  13
+#define BCM56990_B0_TXPMD_LOCAL_DEST_PORT                            14
+#define BCM56990_B0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET              15
+#define BCM56990_B0_TXPMD_TX_TS                                      16
+#define BCM56990_B0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN            17
+#define BCM56990_B0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM                18
+#define BCM56990_B0_TXPMD_IEEE1588_ONE_STEP_ENABLE                   19
+#define BCM56990_B0_TXPMD_CELL_ERROR                                 20
+#define BCM56990_B0_TXPMD_HEADER_TYPE                                21
+#define BCM56990_B0_TXPMD_START                                      22
+#define BCM56990_B0_TXPMD_COUNT                                      23
+
+/* TXPMD name map */
+#define BCM56990_B0_TXPMD_NAME_MAP_INIT \
+    {"CELL_LENGTH", BCM56990_B0_TXPMD_CELL_LENGTH}, \
+    {"EOP", BCM56990_B0_TXPMD_EOP}, \
+    {"SOP", BCM56990_B0_TXPMD_SOP}, \
+    {"PKT_LENGTH", BCM56990_B0_TXPMD_PKT_LENGTH}, \
+    {"IPCF_PTR", BCM56990_B0_TXPMD_IPCF_PTR}, \
+    {"SRC_MODID", BCM56990_B0_TXPMD_SRC_MODID}, \
+    {"COS", BCM56990_B0_TXPMD_COS}, \
+    {"UNICAST", BCM56990_B0_TXPMD_UNICAST}, \
+    {"SET_L2BM", BCM56990_B0_TXPMD_SET_L2BM}, \
+    {"RQE_Q_NUM", BCM56990_B0_TXPMD_RQE_Q_NUM}, \
+    {"SPAP", BCM56990_B0_TXPMD_SPAP}, \
+    {"SPID", BCM56990_B0_TXPMD_SPID}, \
+    {"SPID_OVERRIDE", BCM56990_B0_TXPMD_SPID_OVERRIDE}, \
+    {"INPUT_PRI", BCM56990_B0_TXPMD_INPUT_PRI}, \
+    {"LOCAL_DEST_PORT", BCM56990_B0_TXPMD_LOCAL_DEST_PORT}, \
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM56990_B0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"TX_TS", BCM56990_B0_TXPMD_TX_TS}, \
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM56990_B0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCM56990_B0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"IEEE1588_ONE_STEP_ENABLE", BCM56990_B0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \
+    {"CELL_ERROR", BCM56990_B0_TXPMD_CELL_ERROR}, \
+    {"HEADER_TYPE", BCM56990_B0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM56990_B0_TXPMD_START}, \
+    {"COUNT", BCM56990_B0_TXPMD_COUNT}
+
+/*!
+ * \name BCM56990_B0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM56990_B0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56990_B0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM56990_B0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU                 1
+/*! \} */
+
+/*! BCM56990_B0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM56990_B0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56990_B0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_CPU", BCM56990_B0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56990_B0_TXPMD_START encodings.
+ * \anchor BCM56990_B0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM56990_B0_TXPMD_START_RESERVED_0                           0
+#define BCM56990_B0_TXPMD_START_RESERVED_1                           1
+#define BCM56990_B0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM56990_B0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM56990_B0_TXPMD_START encoding name strings maps. */
+#define BCM56990_B0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56990_B0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM56990_B0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM56990_B0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM56990_B0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+/* LBHDR defines */
+#define BCM56990_B0_LBHDR_ETHERNET_PP_PORT                           0
+#define BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE                      1
+#define BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE                  2
+#define BCM56990_B0_LBHDR_ETHERNET_DESTINATION                       3
+#define BCM56990_B0_LBHDR_ETHERNET_ROUTED_PKT                        4
+#define BCM56990_B0_LBHDR_ETHERNET_QOS_FIELDS_VLD                    5
+#define BCM56990_B0_LBHDR_ETHERNET_INT_CN                            6
+#define BCM56990_B0_LBHDR_ETHERNET_INT_PRI                           7
+#define BCM56990_B0_LBHDR_ETHERNET_DP                                8
+#define BCM56990_B0_LBHDR_ETHERNET_ECMP_MEMBER_ID                    9
+#define BCM56990_B0_LBHDR_ETHERNET_VRF                               10
+#define BCM56990_B0_LBHDR_ETHERNET_VRF_VALID                         11
+#define BCM56990_B0_LBHDR_ETHERNET_MCAST_LB_INDEX                    12
+#define BCM56990_B0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD                13
+#define BCM56990_B0_LBHDR_TRILL_ACCESS_NONUC_TC                      14
+#define BCM56990_B0_LBHDR_TRILL_ACCESS_NONUC_CNG                     15
+#define BCM56990_B0_LBHDR_TRILL_NETWORK_NONUC_TC                     16
+#define BCM56990_B0_LBHDR_TRILL_NETWORK_NONUC_CNG                    17
+#define BCM56990_B0_LBHDR_PKT_PROFILE                                18
+#define BCM56990_B0_LBHDR_VISIBILITY_PKT                             19
+#define BCM56990_B0_LBHDR_SOURCE                                     20
+#define BCM56990_B0_LBHDR_SOURCE_TYPE                                21
+#define BCM56990_B0_LBHDR_HEADER_TYPE                                22
+#define BCM56990_B0_LBHDR_INPUT_PRIORITY                             23
+#define BCM56990_B0_LBHDR_START                                      24
+#define BCM56990_B0_LBHDR_COUNT                                      25
+
+/* LBHDR name map */
+#define BCM56990_B0_LBHDR_NAME_MAP_INIT \
+    {"ETHERNET::PP_PORT", BCM56990_B0_LBHDR_ETHERNET_PP_PORT}, \
+    {"ETHERNET::SUBFLOW_TYPE", BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE}, \
+    {"ETHERNET::DESTINATION_TYPE", BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE}, \
+    {"ETHERNET::DESTINATION", BCM56990_B0_LBHDR_ETHERNET_DESTINATION}, \
+    {"ETHERNET::ROUTED_PKT", BCM56990_B0_LBHDR_ETHERNET_ROUTED_PKT}, \
+    {"ETHERNET::QOS_FIELDS_VLD", BCM56990_B0_LBHDR_ETHERNET_QOS_FIELDS_VLD}, \
+    {"ETHERNET::INT_CN", BCM56990_B0_LBHDR_ETHERNET_INT_CN}, \
+    {"ETHERNET::INT_PRI", BCM56990_B0_LBHDR_ETHERNET_INT_PRI}, \
+    {"ETHERNET::DP", BCM56990_B0_LBHDR_ETHERNET_DP}, \
+    {"ETHERNET::ECMP_MEMBER_ID", BCM56990_B0_LBHDR_ETHERNET_ECMP_MEMBER_ID}, \
+    {"ETHERNET::VRF", BCM56990_B0_LBHDR_ETHERNET_VRF}, \
+    {"ETHERNET::VRF_VALID", BCM56990_B0_LBHDR_ETHERNET_VRF_VALID}, \
+    {"ETHERNET::MCAST_LB_INDEX", BCM56990_B0_LBHDR_ETHERNET_MCAST_LB_INDEX}, \
+    {"ETHERNET::MCAST_LB_INDEX_VLD", BCM56990_B0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD}, \
+    {"TRILL_ACCESS_NONUC::TC", BCM56990_B0_LBHDR_TRILL_ACCESS_NONUC_TC}, \
+    {"TRILL_ACCESS_NONUC::CNG", BCM56990_B0_LBHDR_TRILL_ACCESS_NONUC_CNG}, \
+    {"TRILL_NETWORK_NONUC::TC", BCM56990_B0_LBHDR_TRILL_NETWORK_NONUC_TC}, \
+    {"TRILL_NETWORK_NONUC::CNG", BCM56990_B0_LBHDR_TRILL_NETWORK_NONUC_CNG}, \
+    {"PKT_PROFILE", BCM56990_B0_LBHDR_PKT_PROFILE}, \
+    {"VISIBILITY_PKT", BCM56990_B0_LBHDR_VISIBILITY_PKT}, \
+    {"SOURCE", BCM56990_B0_LBHDR_SOURCE}, \
+    {"SOURCE_TYPE", BCM56990_B0_LBHDR_SOURCE_TYPE}, \
+    {"HEADER_TYPE", BCM56990_B0_LBHDR_HEADER_TYPE}, \
+    {"INPUT_PRIORITY", BCM56990_B0_LBHDR_INPUT_PRIORITY}, \
+    {"START", BCM56990_B0_LBHDR_START}, \
+    {"COUNT", BCM56990_B0_LBHDR_COUNT}
+
+/*!
+ * \name BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE encodings.
+ * \anchor BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE       0
+#define BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC          1
+#define BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2           2
+#define BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3           3
+/*! \} */
+
+/*! BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE encoding name strings maps. */
+#define BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT \
+    {"CPU_MASQUERADE", BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE},\
+    {"CPU_TX_PROC", BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC},\
+    {"RESERVED_2", BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2},\
+    {"RESERVED_3", BCM56990_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE encodings.
+ * \anchor BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP             0
+#define BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI              1
+#define BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP             2
+#define BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER      3
+#define BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC             4
+#define BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC             5
+#define BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD       6
+/*! \} */
+
+/*! BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE encoding name strings maps. */
+#define BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"DGLP", BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP},\
+    {"NHI", BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI},\
+    {"ECMP", BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP},\
+    {"ECMP_MEMBER", BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER},\
+    {"IPMC", BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC},\
+    {"L2MC", BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC},\
+    {"VLAN_FLOOD", BCM56990_B0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56990_B0_LBHDR_HEADER_TYPE encodings.
+ * \anchor BCM56990_B0_LBHDR_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56990_B0_LBHDR_HEADER_TYPE_TUNNEL_TERM                    0
+#define BCM56990_B0_LBHDR_HEADER_TYPE_TRILL_NW                       1
+#define BCM56990_B0_LBHDR_HEADER_TYPE_TRILL_AC                       2
+#define BCM56990_B0_LBHDR_HEADER_TYPE_ETHERNET                       3
+/*! \} */
+
+/*! BCM56990_B0_LBHDR_HEADER_TYPE encoding name strings maps. */
+#define BCM56990_B0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \
+    {"TUNNEL_TERM", BCM56990_B0_LBHDR_HEADER_TYPE_TUNNEL_TERM},\
+    {"TRILL_NW", BCM56990_B0_LBHDR_HEADER_TYPE_TRILL_NW},\
+    {"TRILL_AC", BCM56990_B0_LBHDR_HEADER_TYPE_TRILL_AC},\
+    {"ETHERNET", BCM56990_B0_LBHDR_HEADER_TYPE_ETHERNET},\
+    {NULL, 0}
+
+#endif /* BCM56990_B0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.h
new file mode 100644
index 00000000000..d9a8cafcc3a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.h
@@ -0,0 +1,484 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM56996_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM56996_A0_PMD_FIELD_H
+#define BCM56996_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM56996_A0_RXPMD_ING_L3_INTF                                0
+#define BCM56996_A0_RXPMD_I2E_CLASSID                                1
+#define BCM56996_A0_RXPMD_RX_BFD_SESSION_INDEX                       2
+#define BCM56996_A0_RXPMD_I2E_CLASSID_TYPE                           3
+#define BCM56996_A0_RXPMD_RX_BFD_START_OFFSET_TYPE                   4
+#define BCM56996_A0_RXPMD_RX_BFD_START_OFFSET                        5
+#define BCM56996_A0_RXPMD_ING_L3_INTF_VALID                          6
+#define BCM56996_A0_RXPMD_CPU_COS                                    7
+#define BCM56996_A0_RXPMD_QUEUE_NUM                                  8
+#define BCM56996_A0_RXPMD_BPDU                                       9
+#define BCM56996_A0_RXPMD_CHANGE_DSCP                                10
+#define BCM56996_A0_RXPMD_CHANGE_ECN                                 11
+#define BCM56996_A0_RXPMD_DLB_ID_VALID                               12
+#define BCM56996_A0_RXPMD_REASON                                     13
+#define BCM56996_A0_RXPMD_REASON_TYPE                                14
+#define BCM56996_A0_RXPMD_DO_NOT_CHANGE_TTL                          15
+#define BCM56996_A0_RXPMD_DSCP                                       16
+#define BCM56996_A0_RXPMD_SPECIAL_PACKET_TYPE                        17
+#define BCM56996_A0_RXPMD_ECN                                        18
+#define BCM56996_A0_RXPMD_INCOMING_TAG_STATUS                        19
+#define BCM56996_A0_RXPMD_O_NHI                                      20
+#define BCM56996_A0_RXPMD_ING_OTAG_ACTION                            21
+#define BCM56996_A0_RXPMD_IP_ROUTED                                  22
+#define BCM56996_A0_RXPMD_L3ONLY                                     23
+#define BCM56996_A0_RXPMD_MATCHED_RULE                               24
+#define BCM56996_A0_RXPMD_MTP_INDEX                                  25
+#define BCM56996_A0_RXPMD_OUTER_CFI                                  26
+#define BCM56996_A0_RXPMD_OUTER_PRI                                  27
+#define BCM56996_A0_RXPMD_OUTER_VID                                  28
+#define BCM56996_A0_RXPMD_INCOMING_INT_HDR_TYPE                      29
+#define BCM56996_A0_RXPMD_PKT_LENGTH                                 30
+#define BCM56996_A0_RXPMD_REGEN_CRC                                  31
+#define BCM56996_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  32
+#define BCM56996_A0_RXPMD_ENTROPY_LABEL                              33
+#define BCM56996_A0_RXPMD_SPECIAL_PACKET_INDICATOR                   34
+#define BCM56996_A0_RXPMD_SRC_PORT_NUM                               35
+#define BCM56996_A0_RXPMD_SWITCH                                     36
+#define BCM56996_A0_RXPMD_TIMESTAMP                                  37
+#define BCM56996_A0_RXPMD_TIMESTAMP_HI                               38
+#define BCM56996_A0_RXPMD_TIMESTAMP_TYPE                             39
+#define BCM56996_A0_RXPMD_TUNNEL_DECAP_TYPE                          40
+#define BCM56996_A0_RXPMD_UC_SW_COPY_DROPPED                         41
+#define BCM56996_A0_RXPMD_UNICAST_QUEUE                              42
+#define BCM56996_A0_RXPMD_DLB_ID                                     43
+#define BCM56996_A0_RXPMD_MODULE_HDR                                 44
+#define BCM56996_A0_RXPMD_COUNT                                      45
+
+/* RXPMD name map */
+#define BCM56996_A0_RXPMD_NAME_MAP_INIT \
+    {"ING_L3_INTF", BCM56996_A0_RXPMD_ING_L3_INTF}, \
+    {"I2E_CLASSID", BCM56996_A0_RXPMD_I2E_CLASSID}, \
+    {"RX_BFD_SESSION_INDEX", BCM56996_A0_RXPMD_RX_BFD_SESSION_INDEX}, \
+    {"I2E_CLASSID_TYPE", BCM56996_A0_RXPMD_I2E_CLASSID_TYPE}, \
+    {"RX_BFD_START_OFFSET_TYPE", BCM56996_A0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \
+    {"RX_BFD_START_OFFSET", BCM56996_A0_RXPMD_RX_BFD_START_OFFSET}, \
+    {"ING_L3_INTF_VALID", BCM56996_A0_RXPMD_ING_L3_INTF_VALID}, \
+    {"CPU_COS", BCM56996_A0_RXPMD_CPU_COS}, \
+    {"QUEUE_NUM", BCM56996_A0_RXPMD_QUEUE_NUM}, \
+    {"BPDU", BCM56996_A0_RXPMD_BPDU}, \
+    {"CHANGE_DSCP", BCM56996_A0_RXPMD_CHANGE_DSCP}, \
+    {"CHANGE_ECN", BCM56996_A0_RXPMD_CHANGE_ECN}, \
+    {"DLB_ID_VALID", BCM56996_A0_RXPMD_DLB_ID_VALID}, \
+    {"REASON", BCM56996_A0_RXPMD_REASON}, \
+    {"REASON_TYPE", BCM56996_A0_RXPMD_REASON_TYPE}, \
+    {"DO_NOT_CHANGE_TTL", BCM56996_A0_RXPMD_DO_NOT_CHANGE_TTL}, \
+    {"DSCP", BCM56996_A0_RXPMD_DSCP}, \
+    {"SPECIAL_PACKET_TYPE", BCM56996_A0_RXPMD_SPECIAL_PACKET_TYPE}, \
+    {"ECN", BCM56996_A0_RXPMD_ECN}, \
+    {"INCOMING_TAG_STATUS", BCM56996_A0_RXPMD_INCOMING_TAG_STATUS}, \
+    {"O_NHI", BCM56996_A0_RXPMD_O_NHI}, \
+    {"ING_OTAG_ACTION", BCM56996_A0_RXPMD_ING_OTAG_ACTION}, \
+    {"IP_ROUTED", BCM56996_A0_RXPMD_IP_ROUTED}, \
+    {"L3ONLY", BCM56996_A0_RXPMD_L3ONLY}, \
+    {"MATCHED_RULE", BCM56996_A0_RXPMD_MATCHED_RULE}, \
+    {"MTP_INDEX", BCM56996_A0_RXPMD_MTP_INDEX}, \
+    {"OUTER_CFI", BCM56996_A0_RXPMD_OUTER_CFI}, \
+    {"OUTER_PRI", BCM56996_A0_RXPMD_OUTER_PRI}, \
+    {"OUTER_VID", BCM56996_A0_RXPMD_OUTER_VID}, \
+    {"INCOMING_INT_HDR_TYPE", BCM56996_A0_RXPMD_INCOMING_INT_HDR_TYPE}, \
+    {"PKT_LENGTH", BCM56996_A0_RXPMD_PKT_LENGTH}, \
+    {"REGEN_CRC", BCM56996_A0_RXPMD_REGEN_CRC}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM56996_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"ENTROPY_LABEL", BCM56996_A0_RXPMD_ENTROPY_LABEL}, \
+    {"SPECIAL_PACKET_INDICATOR", BCM56996_A0_RXPMD_SPECIAL_PACKET_INDICATOR}, \
+    {"SRC_PORT_NUM", BCM56996_A0_RXPMD_SRC_PORT_NUM}, \
+    {"SWITCH", BCM56996_A0_RXPMD_SWITCH}, \
+    {"TIMESTAMP", BCM56996_A0_RXPMD_TIMESTAMP}, \
+    {"TIMESTAMP_HI", BCM56996_A0_RXPMD_TIMESTAMP_HI}, \
+    {"TIMESTAMP_TYPE", BCM56996_A0_RXPMD_TIMESTAMP_TYPE}, \
+    {"TUNNEL_DECAP_TYPE", BCM56996_A0_RXPMD_TUNNEL_DECAP_TYPE}, \
+    {"UC_SW_COPY_DROPPED", BCM56996_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"UNICAST_QUEUE", BCM56996_A0_RXPMD_UNICAST_QUEUE}, \
+    {"DLB_ID", BCM56996_A0_RXPMD_DLB_ID}, \
+    {"MODULE_HDR", BCM56996_A0_RXPMD_MODULE_HDR}, \
+    {"COUNT", BCM56996_A0_RXPMD_COUNT}
+
+/*!
+ * \name BCM56996_A0_RXPMD_TIMESTAMP_TYPE encodings.
+ * \anchor BCM56996_A0_RXPMD_TIMESTAMP_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56996_A0_RXPMD_TIMESTAMP_TYPE_INVALID                     0
+#define BCM56996_A0_RXPMD_TIMESTAMP_TYPE_OAM_LM                      1
+#define BCM56996_A0_RXPMD_TIMESTAMP_TYPE_OAM_DM                      2
+#define BCM56996_A0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS                3
+/*! \} */
+
+/*! BCM56996_A0_RXPMD_TIMESTAMP_TYPE encoding name strings maps. */
+#define BCM56996_A0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT \
+    {"INVALID", BCM56996_A0_RXPMD_TIMESTAMP_TYPE_INVALID},\
+    {"OAM_LM", BCM56996_A0_RXPMD_TIMESTAMP_TYPE_OAM_LM},\
+    {"OAM_DM", BCM56996_A0_RXPMD_TIMESTAMP_TYPE_OAM_DM},\
+    {"IEEE_802_1AS", BCM56996_A0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS},\
+    {NULL, 0}
+
+/* RX_REASON defines */
+#define BCM56996_A0_RX_REASON_CPU_UVLAN                              0
+#define BCM56996_A0_RX_REASON_CPU_SLF                                1
+#define BCM56996_A0_RX_REASON_CPU_DLF                                2
+#define BCM56996_A0_RX_REASON_CPU_L2MOVE                             3
+#define BCM56996_A0_RX_REASON_CPU_L2CPU                              4
+#define BCM56996_A0_RX_REASON_CPU_L3SRC_MISS                         5
+#define BCM56996_A0_RX_REASON_CPU_L3DST_MISS                         6
+#define BCM56996_A0_RX_REASON_CPU_L3SRC_MOVE                         7
+#define BCM56996_A0_RX_REASON_CPU_MC_MISS                            8
+#define BCM56996_A0_RX_REASON_CPU_IPMC_MISS                          9
+#define BCM56996_A0_RX_REASON_CPU_FFP                                10
+#define BCM56996_A0_RX_REASON_CPU_L3HDR_ERR                          11
+#define BCM56996_A0_RX_REASON_CPU_PROTOCOL_PKT                       12
+#define BCM56996_A0_RX_REASON_CPU_DOS_ATTACK                         13
+#define BCM56996_A0_RX_REASON_CPU_MARTIAN_ADDR                       14
+#define BCM56996_A0_RX_REASON_CPU_TUNNEL_ERR                         15
+#define BCM56996_A0_RX_REASON_CPU_SFLOW                              16
+#define BCM56996_A0_RX_REASON_ICMP_REDIRECT                          17
+#define BCM56996_A0_RX_REASON_L3_SLOWPATH                            18
+#define BCM56996_A0_RX_REASON_PARITY_ERROR                           19
+#define BCM56996_A0_RX_REASON_L3_MTU_CHECK_FAIL                      20
+#define BCM56996_A0_RX_REASON_MCIDX_ERROR                            21
+#define BCM56996_A0_RX_REASON_CPU_VFP                                22
+#define BCM56996_A0_RX_REASON_MPLS_PROC_ERROR                        23
+#define BCM56996_A0_RX_REASON_PBT_NONUC_PKT                          24
+#define BCM56996_A0_RX_REASON_L3_NEXT_HOP                            25
+#define BCM56996_A0_RX_REASON_MY_STATION                             26
+#define BCM56996_A0_RX_REASON_TIME_SYNC                              27
+#define BCM56996_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR                 28
+#define BCM56996_A0_RX_REASON_BFD_SLOWPATH                           29
+#define BCM56996_A0_RX_REASON_BFD_ERROR                              30
+#define BCM56996_A0_RX_REASON_PACKET_TRACE_TO_CPU                    31
+#define BCM56996_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT               32
+#define BCM56996_A0_RX_REASON_MPLS_ALERT_LABEL                       33
+#define BCM56996_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH            34
+#define BCM56996_A0_RX_REASON_DLB_MONITOR                            35
+#define BCM56996_A0_RX_REASON_INT_TURN_AROUND                        36
+#define BCM56996_A0_RX_REASON_ETRAP_MONITOR                          37
+#define BCM56996_A0_RX_REASON_SRV6_ERROR                             38
+#define BCM56996_A0_RX_REASON_VXLAN_VN_ID_MISS                       39
+#define BCM56996_A0_RX_REASON_VXLAN_SIP_MISS                         40
+#define BCM56996_A0_RX_REASON_ADAPT_MISS                             41
+#define BCM56996_A0_RX_REASON_COUNT                                  42
+
+/* RX_REASON name map */
+#define BCM56996_A0_RX_REASON_NAME_MAP_INIT \
+    {"CPU_UVLAN", BCM56996_A0_RX_REASON_CPU_UVLAN}, \
+    {"CPU_SLF", BCM56996_A0_RX_REASON_CPU_SLF}, \
+    {"CPU_DLF", BCM56996_A0_RX_REASON_CPU_DLF}, \
+    {"CPU_L2MOVE", BCM56996_A0_RX_REASON_CPU_L2MOVE}, \
+    {"CPU_L2CPU", BCM56996_A0_RX_REASON_CPU_L2CPU}, \
+    {"CPU_L3SRC_MISS", BCM56996_A0_RX_REASON_CPU_L3SRC_MISS}, \
+    {"CPU_L3DST_MISS", BCM56996_A0_RX_REASON_CPU_L3DST_MISS}, \
+    {"CPU_L3SRC_MOVE", BCM56996_A0_RX_REASON_CPU_L3SRC_MOVE}, \
+    {"CPU_MC_MISS", BCM56996_A0_RX_REASON_CPU_MC_MISS}, \
+    {"CPU_IPMC_MISS", BCM56996_A0_RX_REASON_CPU_IPMC_MISS}, \
+    {"CPU_FFP", BCM56996_A0_RX_REASON_CPU_FFP}, \
+    {"CPU_L3HDR_ERR", BCM56996_A0_RX_REASON_CPU_L3HDR_ERR}, \
+    {"CPU_PROTOCOL_PKT", BCM56996_A0_RX_REASON_CPU_PROTOCOL_PKT}, \
+    {"CPU_DOS_ATTACK", BCM56996_A0_RX_REASON_CPU_DOS_ATTACK}, \
+    {"CPU_MARTIAN_ADDR", BCM56996_A0_RX_REASON_CPU_MARTIAN_ADDR}, \
+    {"CPU_TUNNEL_ERR", BCM56996_A0_RX_REASON_CPU_TUNNEL_ERR}, \
+    {"CPU_SFLOW", BCM56996_A0_RX_REASON_CPU_SFLOW}, \
+    {"ICMP_REDIRECT", BCM56996_A0_RX_REASON_ICMP_REDIRECT}, \
+    {"L3_SLOWPATH", BCM56996_A0_RX_REASON_L3_SLOWPATH}, \
+    {"PARITY_ERROR", BCM56996_A0_RX_REASON_PARITY_ERROR}, \
+    {"L3_MTU_CHECK_FAIL", BCM56996_A0_RX_REASON_L3_MTU_CHECK_FAIL}, \
+    {"MCIDX_ERROR", BCM56996_A0_RX_REASON_MCIDX_ERROR}, \
+    {"CPU_VFP", BCM56996_A0_RX_REASON_CPU_VFP}, \
+    {"MPLS_PROC_ERROR", BCM56996_A0_RX_REASON_MPLS_PROC_ERROR}, \
+    {"PBT_NONUC_PKT", BCM56996_A0_RX_REASON_PBT_NONUC_PKT}, \
+    {"L3_NEXT_HOP", BCM56996_A0_RX_REASON_L3_NEXT_HOP}, \
+    {"MY_STATION", BCM56996_A0_RX_REASON_MY_STATION}, \
+    {"TIME_SYNC", BCM56996_A0_RX_REASON_TIME_SYNC}, \
+    {"TUNNEL_DECAP_ECN_ERROR", BCM56996_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \
+    {"BFD_SLOWPATH", BCM56996_A0_RX_REASON_BFD_SLOWPATH}, \
+    {"BFD_ERROR", BCM56996_A0_RX_REASON_BFD_ERROR}, \
+    {"PACKET_TRACE_TO_CPU", BCM56996_A0_RX_REASON_PACKET_TRACE_TO_CPU}, \
+    {"MPLS_UNKNOWN_CONTROL_PKT", BCM56996_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \
+    {"MPLS_ALERT_LABEL", BCM56996_A0_RX_REASON_MPLS_ALERT_LABEL}, \
+    {"CPU_IPMC_INTERFACE_MISMATCH", BCM56996_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \
+    {"DLB_MONITOR", BCM56996_A0_RX_REASON_DLB_MONITOR}, \
+    {"INT_TURN_AROUND", BCM56996_A0_RX_REASON_INT_TURN_AROUND}, \
+    {"ETRAP_MONITOR", BCM56996_A0_RX_REASON_ETRAP_MONITOR}, \
+    {"SRV6_ERROR", BCM56996_A0_RX_REASON_SRV6_ERROR}, \
+    {"VXLAN_VN_ID_MISS", BCM56996_A0_RX_REASON_VXLAN_VN_ID_MISS}, \
+    {"VXLAN_SIP_MISS", BCM56996_A0_RX_REASON_VXLAN_SIP_MISS}, \
+    {"ADAPT_MISS", BCM56996_A0_RX_REASON_ADAPT_MISS}, \
+    {"COUNT", BCM56996_A0_RX_REASON_COUNT}
+
+/*!
+ * \name BCM56996_A0_RX_REASON_CPU_SFLOW encodings.
+ * \anchor BCM56996_A0_RX_REASON_CPU_SFLOW_XXX
+ */
+/*! \{ */
+#define BCM56996_A0_RX_REASON_CPU_SFLOW_INVALID                      0
+#define BCM56996_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX               1
+#define BCM56996_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST                2
+#define BCM56996_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC                3
+/*! \} */
+
+/*! BCM56996_A0_RX_REASON_CPU_SFLOW encoding name strings maps. */
+#define BCM56996_A0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT \
+    {"INVALID", BCM56996_A0_RX_REASON_CPU_SFLOW_INVALID},\
+    {"CPU_SFLOW_FLEX", BCM56996_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX},\
+    {"CPU_SFLOW_DST", BCM56996_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST},\
+    {"CPU_SFLOW_SRC", BCM56996_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56996_A0_RX_REASON_MPLS_PROC_ERROR encodings.
+ * \anchor BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_XXX
+ */
+/*! \{ */
+#define BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_NOP                    0
+#define BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD        1
+#define BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION         2
+#define BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS             3
+#define BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL         4
+/*! \} */
+
+/*! BCM56996_A0_RX_REASON_MPLS_PROC_ERROR encoding name strings maps. */
+#define BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT \
+    {"NOP", BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_NOP},\
+    {"INVALID_PAYLOAD", BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD},\
+    {"INVALID_ACTION", BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION},\
+    {"LABEL_MISS", BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS},\
+    {"TTL_CHECK_FAIL", BCM56996_A0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL},\
+    {NULL, 0}
+
+/* TXPMD defines */
+#define BCM56996_A0_TXPMD_CELL_LENGTH                                0
+#define BCM56996_A0_TXPMD_EOP                                        1
+#define BCM56996_A0_TXPMD_SOP                                        2
+#define BCM56996_A0_TXPMD_PKT_LENGTH                                 3
+#define BCM56996_A0_TXPMD_IPCF_PTR                                   4
+#define BCM56996_A0_TXPMD_SRC_MODID                                  5
+#define BCM56996_A0_TXPMD_COS                                        6
+#define BCM56996_A0_TXPMD_UNICAST                                    7
+#define BCM56996_A0_TXPMD_SET_L2BM                                   8
+#define BCM56996_A0_TXPMD_RQE_Q_NUM                                  9
+#define BCM56996_A0_TXPMD_SPAP                                       10
+#define BCM56996_A0_TXPMD_SPID                                       11
+#define BCM56996_A0_TXPMD_SPID_OVERRIDE                              12
+#define BCM56996_A0_TXPMD_INPUT_PRI                                  13
+#define BCM56996_A0_TXPMD_LOCAL_DEST_PORT                            14
+#define BCM56996_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET              15
+#define BCM56996_A0_TXPMD_TX_TS                                      16
+#define BCM56996_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN            17
+#define BCM56996_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM                18
+#define BCM56996_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE                   19
+#define BCM56996_A0_TXPMD_CELL_ERROR                                 20
+#define BCM56996_A0_TXPMD_HEADER_TYPE                                21
+#define BCM56996_A0_TXPMD_START                                      22
+#define BCM56996_A0_TXPMD_COUNT                                      23
+
+/* TXPMD name map */
+#define BCM56996_A0_TXPMD_NAME_MAP_INIT \
+    {"CELL_LENGTH", BCM56996_A0_TXPMD_CELL_LENGTH}, \
+    {"EOP", BCM56996_A0_TXPMD_EOP}, \
+    {"SOP", BCM56996_A0_TXPMD_SOP}, \
+    {"PKT_LENGTH", BCM56996_A0_TXPMD_PKT_LENGTH}, \
+    {"IPCF_PTR", BCM56996_A0_TXPMD_IPCF_PTR}, \
+    {"SRC_MODID", BCM56996_A0_TXPMD_SRC_MODID}, \
+    {"COS", BCM56996_A0_TXPMD_COS}, \
+    {"UNICAST", BCM56996_A0_TXPMD_UNICAST}, \
+    {"SET_L2BM", BCM56996_A0_TXPMD_SET_L2BM}, \
+    {"RQE_Q_NUM", BCM56996_A0_TXPMD_RQE_Q_NUM}, \
+    {"SPAP", BCM56996_A0_TXPMD_SPAP}, \
+    {"SPID", BCM56996_A0_TXPMD_SPID}, \
+    {"SPID_OVERRIDE", BCM56996_A0_TXPMD_SPID_OVERRIDE}, \
+    {"INPUT_PRI", BCM56996_A0_TXPMD_INPUT_PRI}, \
+    {"LOCAL_DEST_PORT", BCM56996_A0_TXPMD_LOCAL_DEST_PORT}, \
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM56996_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"TX_TS", BCM56996_A0_TXPMD_TX_TS}, \
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM56996_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCM56996_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"IEEE1588_ONE_STEP_ENABLE", BCM56996_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \
+    {"CELL_ERROR", BCM56996_A0_TXPMD_CELL_ERROR}, \
+    {"HEADER_TYPE", BCM56996_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM56996_A0_TXPMD_START}, \
+    {"COUNT", BCM56996_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM56996_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM56996_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56996_A0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM56996_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU                 1
+/*! \} */
+
+/*! BCM56996_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM56996_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56996_A0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_CPU", BCM56996_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56996_A0_TXPMD_START encodings.
+ * \anchor BCM56996_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM56996_A0_TXPMD_START_RESERVED_0                           0
+#define BCM56996_A0_TXPMD_START_RESERVED_1                           1
+#define BCM56996_A0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM56996_A0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM56996_A0_TXPMD_START encoding name strings maps. */
+#define BCM56996_A0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56996_A0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM56996_A0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM56996_A0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM56996_A0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+/* LBHDR defines */
+#define BCM56996_A0_LBHDR_ETHERNET_PP_PORT                           0
+#define BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE                      1
+#define BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE                  2
+#define BCM56996_A0_LBHDR_ETHERNET_DESTINATION                       3
+#define BCM56996_A0_LBHDR_ETHERNET_ROUTED_PKT                        4
+#define BCM56996_A0_LBHDR_ETHERNET_QOS_FIELDS_VLD                    5
+#define BCM56996_A0_LBHDR_ETHERNET_INT_CN                            6
+#define BCM56996_A0_LBHDR_ETHERNET_INT_PRI                           7
+#define BCM56996_A0_LBHDR_ETHERNET_DP                                8
+#define BCM56996_A0_LBHDR_ETHERNET_ECMP_MEMBER_ID                    9
+#define BCM56996_A0_LBHDR_ETHERNET_VRF                               10
+#define BCM56996_A0_LBHDR_ETHERNET_VRF_VALID                         11
+#define BCM56996_A0_LBHDR_ETHERNET_MCAST_LB_INDEX                    12
+#define BCM56996_A0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD                13
+#define BCM56996_A0_LBHDR_TRILL_ACCESS_NONUC_TC                      14
+#define BCM56996_A0_LBHDR_TRILL_ACCESS_NONUC_CNG                     15
+#define BCM56996_A0_LBHDR_TRILL_NETWORK_NONUC_TC                     16
+#define BCM56996_A0_LBHDR_TRILL_NETWORK_NONUC_CNG                    17
+#define BCM56996_A0_LBHDR_PKT_PROFILE                                18
+#define BCM56996_A0_LBHDR_VISIBILITY_PKT                             19
+#define BCM56996_A0_LBHDR_SOURCE                                     20
+#define BCM56996_A0_LBHDR_SOURCE_TYPE                                21
+#define BCM56996_A0_LBHDR_HEADER_TYPE                                22
+#define BCM56996_A0_LBHDR_INPUT_PRIORITY                             23
+#define BCM56996_A0_LBHDR_START                                      24
+#define BCM56996_A0_LBHDR_COUNT                                      25
+
+/* LBHDR name map */
+#define BCM56996_A0_LBHDR_NAME_MAP_INIT \
+    {"ETHERNET::PP_PORT", BCM56996_A0_LBHDR_ETHERNET_PP_PORT}, \
+    {"ETHERNET::SUBFLOW_TYPE", BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE}, \
+    {"ETHERNET::DESTINATION_TYPE", BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE}, \
+    {"ETHERNET::DESTINATION", BCM56996_A0_LBHDR_ETHERNET_DESTINATION}, \
+    {"ETHERNET::ROUTED_PKT", BCM56996_A0_LBHDR_ETHERNET_ROUTED_PKT}, \
+    {"ETHERNET::QOS_FIELDS_VLD", BCM56996_A0_LBHDR_ETHERNET_QOS_FIELDS_VLD}, \
+    {"ETHERNET::INT_CN", BCM56996_A0_LBHDR_ETHERNET_INT_CN}, \
+    {"ETHERNET::INT_PRI", BCM56996_A0_LBHDR_ETHERNET_INT_PRI}, \
+    {"ETHERNET::DP", BCM56996_A0_LBHDR_ETHERNET_DP}, \
+    {"ETHERNET::ECMP_MEMBER_ID", BCM56996_A0_LBHDR_ETHERNET_ECMP_MEMBER_ID}, \
+    {"ETHERNET::VRF", BCM56996_A0_LBHDR_ETHERNET_VRF}, \
+    {"ETHERNET::VRF_VALID", BCM56996_A0_LBHDR_ETHERNET_VRF_VALID}, \
+    {"ETHERNET::MCAST_LB_INDEX", BCM56996_A0_LBHDR_ETHERNET_MCAST_LB_INDEX}, \
+    {"ETHERNET::MCAST_LB_INDEX_VLD", BCM56996_A0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD}, \
+    {"TRILL_ACCESS_NONUC::TC", BCM56996_A0_LBHDR_TRILL_ACCESS_NONUC_TC}, \
+    {"TRILL_ACCESS_NONUC::CNG", BCM56996_A0_LBHDR_TRILL_ACCESS_NONUC_CNG}, \
+    {"TRILL_NETWORK_NONUC::TC", BCM56996_A0_LBHDR_TRILL_NETWORK_NONUC_TC}, \
+    {"TRILL_NETWORK_NONUC::CNG", BCM56996_A0_LBHDR_TRILL_NETWORK_NONUC_CNG}, \
+    {"PKT_PROFILE", BCM56996_A0_LBHDR_PKT_PROFILE}, \
+    {"VISIBILITY_PKT", BCM56996_A0_LBHDR_VISIBILITY_PKT}, \
+    {"SOURCE", BCM56996_A0_LBHDR_SOURCE}, \
+    {"SOURCE_TYPE", BCM56996_A0_LBHDR_SOURCE_TYPE}, \
+    {"HEADER_TYPE", BCM56996_A0_LBHDR_HEADER_TYPE}, \
+    {"INPUT_PRIORITY", BCM56996_A0_LBHDR_INPUT_PRIORITY}, \
+    {"START", BCM56996_A0_LBHDR_START}, \
+    {"COUNT", BCM56996_A0_LBHDR_COUNT}
+
+/*!
+ * \name BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE encodings.
+ * \anchor BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE       0
+#define BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC          1
+#define BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2           2
+#define BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3           3
+/*! \} */
+
+/*! BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE encoding name strings maps. */
+#define BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT \
+    {"CPU_MASQUERADE", BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE},\
+    {"CPU_TX_PROC", BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC},\
+    {"RESERVED_2", BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2},\
+    {"RESERVED_3", BCM56996_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE encodings.
+ * \anchor BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP             0
+#define BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI              1
+#define BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP             2
+#define BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER      3
+#define BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC             4
+#define BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC             5
+#define BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD       6
+/*! \} */
+
+/*! BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE encoding name strings maps. */
+#define BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"DGLP", BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP},\
+    {"NHI", BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI},\
+    {"ECMP", BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP},\
+    {"ECMP_MEMBER", BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER},\
+    {"IPMC", BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC},\
+    {"L2MC", BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC},\
+    {"VLAN_FLOOD", BCM56996_A0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56996_A0_LBHDR_HEADER_TYPE encodings.
+ * \anchor BCM56996_A0_LBHDR_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56996_A0_LBHDR_HEADER_TYPE_TUNNEL_TERM                    0
+#define BCM56996_A0_LBHDR_HEADER_TYPE_TRILL_NW                       1
+#define BCM56996_A0_LBHDR_HEADER_TYPE_TRILL_AC                       2
+#define BCM56996_A0_LBHDR_HEADER_TYPE_ETHERNET                       3
+/*! \} */
+
+/*! BCM56996_A0_LBHDR_HEADER_TYPE encoding name strings maps. */
+#define BCM56996_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \
+    {"TUNNEL_TERM", BCM56996_A0_LBHDR_HEADER_TYPE_TUNNEL_TERM},\
+    {"TRILL_NW", BCM56996_A0_LBHDR_HEADER_TYPE_TRILL_NW},\
+    {"TRILL_AC", BCM56996_A0_LBHDR_HEADER_TYPE_TRILL_AC},\
+    {"ETHERNET", BCM56996_A0_LBHDR_HEADER_TYPE_ETHERNET},\
+    {NULL, 0}
+
+#endif /* BCM56996_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.h
new file mode 100644
index 00000000000..e797b92a6c2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.h
@@ -0,0 +1,484 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM56996_B0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM56996_B0_PMD_FIELD_H
+#define BCM56996_B0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM56996_B0_RXPMD_ING_L3_INTF                                0
+#define BCM56996_B0_RXPMD_I2E_CLASSID                                1
+#define BCM56996_B0_RXPMD_RX_BFD_SESSION_INDEX                       2
+#define BCM56996_B0_RXPMD_I2E_CLASSID_TYPE                           3
+#define BCM56996_B0_RXPMD_RX_BFD_START_OFFSET_TYPE                   4
+#define BCM56996_B0_RXPMD_RX_BFD_START_OFFSET                        5
+#define BCM56996_B0_RXPMD_ING_L3_INTF_VALID                          6
+#define BCM56996_B0_RXPMD_CPU_COS                                    7
+#define BCM56996_B0_RXPMD_QUEUE_NUM                                  8
+#define BCM56996_B0_RXPMD_BPDU                                       9
+#define BCM56996_B0_RXPMD_CHANGE_DSCP                                10
+#define BCM56996_B0_RXPMD_CHANGE_ECN                                 11
+#define BCM56996_B0_RXPMD_DLB_ID_VALID                               12
+#define BCM56996_B0_RXPMD_REASON                                     13
+#define BCM56996_B0_RXPMD_REASON_TYPE                                14
+#define BCM56996_B0_RXPMD_DO_NOT_CHANGE_TTL                          15
+#define BCM56996_B0_RXPMD_DSCP                                       16
+#define BCM56996_B0_RXPMD_SPECIAL_PACKET_TYPE                        17
+#define BCM56996_B0_RXPMD_ECN                                        18
+#define BCM56996_B0_RXPMD_INCOMING_TAG_STATUS                        19
+#define BCM56996_B0_RXPMD_O_NHI                                      20
+#define BCM56996_B0_RXPMD_ING_OTAG_ACTION                            21
+#define BCM56996_B0_RXPMD_IP_ROUTED                                  22
+#define BCM56996_B0_RXPMD_L3ONLY                                     23
+#define BCM56996_B0_RXPMD_MATCHED_RULE                               24
+#define BCM56996_B0_RXPMD_MTP_INDEX                                  25
+#define BCM56996_B0_RXPMD_OUTER_CFI                                  26
+#define BCM56996_B0_RXPMD_OUTER_PRI                                  27
+#define BCM56996_B0_RXPMD_OUTER_VID                                  28
+#define BCM56996_B0_RXPMD_INCOMING_INT_HDR_TYPE                      29
+#define BCM56996_B0_RXPMD_PKT_LENGTH                                 30
+#define BCM56996_B0_RXPMD_REGEN_CRC                                  31
+#define BCM56996_B0_RXPMD_REPLICATION_OR_NHOP_INDEX                  32
+#define BCM56996_B0_RXPMD_ENTROPY_LABEL                              33
+#define BCM56996_B0_RXPMD_SPECIAL_PACKET_INDICATOR                   34
+#define BCM56996_B0_RXPMD_SRC_PORT_NUM                               35
+#define BCM56996_B0_RXPMD_SWITCH                                     36
+#define BCM56996_B0_RXPMD_TIMESTAMP                                  37
+#define BCM56996_B0_RXPMD_TIMESTAMP_HI                               38
+#define BCM56996_B0_RXPMD_TIMESTAMP_TYPE                             39
+#define BCM56996_B0_RXPMD_TUNNEL_DECAP_TYPE                          40
+#define BCM56996_B0_RXPMD_UC_SW_COPY_DROPPED                         41
+#define BCM56996_B0_RXPMD_UNICAST_QUEUE                              42
+#define BCM56996_B0_RXPMD_DLB_ID                                     43
+#define BCM56996_B0_RXPMD_MODULE_HDR                                 44
+#define BCM56996_B0_RXPMD_COUNT                                      45
+
+/* RXPMD name map */
+#define BCM56996_B0_RXPMD_NAME_MAP_INIT \
+    {"ING_L3_INTF", BCM56996_B0_RXPMD_ING_L3_INTF}, \
+    {"I2E_CLASSID", BCM56996_B0_RXPMD_I2E_CLASSID}, \
+    {"RX_BFD_SESSION_INDEX", BCM56996_B0_RXPMD_RX_BFD_SESSION_INDEX}, \
+    {"I2E_CLASSID_TYPE", BCM56996_B0_RXPMD_I2E_CLASSID_TYPE}, \
+    {"RX_BFD_START_OFFSET_TYPE", BCM56996_B0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \
+    {"RX_BFD_START_OFFSET", BCM56996_B0_RXPMD_RX_BFD_START_OFFSET}, \
+    {"ING_L3_INTF_VALID", BCM56996_B0_RXPMD_ING_L3_INTF_VALID}, \
+    {"CPU_COS", BCM56996_B0_RXPMD_CPU_COS}, \
+    {"QUEUE_NUM", BCM56996_B0_RXPMD_QUEUE_NUM}, \
+    {"BPDU", BCM56996_B0_RXPMD_BPDU}, \
+    {"CHANGE_DSCP", BCM56996_B0_RXPMD_CHANGE_DSCP}, \
+    {"CHANGE_ECN", BCM56996_B0_RXPMD_CHANGE_ECN}, \
+    {"DLB_ID_VALID", BCM56996_B0_RXPMD_DLB_ID_VALID}, \
+    {"REASON", BCM56996_B0_RXPMD_REASON}, \
+    {"REASON_TYPE", BCM56996_B0_RXPMD_REASON_TYPE}, \
+    {"DO_NOT_CHANGE_TTL", BCM56996_B0_RXPMD_DO_NOT_CHANGE_TTL}, \
+    {"DSCP", BCM56996_B0_RXPMD_DSCP}, \
+    {"SPECIAL_PACKET_TYPE", BCM56996_B0_RXPMD_SPECIAL_PACKET_TYPE}, \
+    {"ECN", BCM56996_B0_RXPMD_ECN}, \
+    {"INCOMING_TAG_STATUS", BCM56996_B0_RXPMD_INCOMING_TAG_STATUS}, \
+    {"O_NHI", BCM56996_B0_RXPMD_O_NHI}, \
+    {"ING_OTAG_ACTION", BCM56996_B0_RXPMD_ING_OTAG_ACTION}, \
+    {"IP_ROUTED", BCM56996_B0_RXPMD_IP_ROUTED}, \
+    {"L3ONLY", BCM56996_B0_RXPMD_L3ONLY}, \
+    {"MATCHED_RULE", BCM56996_B0_RXPMD_MATCHED_RULE}, \
+    {"MTP_INDEX", BCM56996_B0_RXPMD_MTP_INDEX}, \
+    {"OUTER_CFI", BCM56996_B0_RXPMD_OUTER_CFI}, \
+    {"OUTER_PRI", BCM56996_B0_RXPMD_OUTER_PRI}, \
+    {"OUTER_VID", BCM56996_B0_RXPMD_OUTER_VID}, \
+    {"INCOMING_INT_HDR_TYPE", BCM56996_B0_RXPMD_INCOMING_INT_HDR_TYPE}, \
+    {"PKT_LENGTH", BCM56996_B0_RXPMD_PKT_LENGTH}, \
+    {"REGEN_CRC", BCM56996_B0_RXPMD_REGEN_CRC}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM56996_B0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"ENTROPY_LABEL", BCM56996_B0_RXPMD_ENTROPY_LABEL}, \
+    {"SPECIAL_PACKET_INDICATOR", BCM56996_B0_RXPMD_SPECIAL_PACKET_INDICATOR}, \
+    {"SRC_PORT_NUM", BCM56996_B0_RXPMD_SRC_PORT_NUM}, \
+    {"SWITCH", BCM56996_B0_RXPMD_SWITCH}, \
+    {"TIMESTAMP", BCM56996_B0_RXPMD_TIMESTAMP}, \
+    {"TIMESTAMP_HI", BCM56996_B0_RXPMD_TIMESTAMP_HI}, \
+    {"TIMESTAMP_TYPE", BCM56996_B0_RXPMD_TIMESTAMP_TYPE}, \
+    {"TUNNEL_DECAP_TYPE", BCM56996_B0_RXPMD_TUNNEL_DECAP_TYPE}, \
+    {"UC_SW_COPY_DROPPED", BCM56996_B0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"UNICAST_QUEUE", BCM56996_B0_RXPMD_UNICAST_QUEUE}, \
+    {"DLB_ID", BCM56996_B0_RXPMD_DLB_ID}, \
+    {"MODULE_HDR", BCM56996_B0_RXPMD_MODULE_HDR}, \
+    {"COUNT", BCM56996_B0_RXPMD_COUNT}
+
+/*!
+ * \name BCM56996_B0_RXPMD_TIMESTAMP_TYPE encodings.
+ * \anchor BCM56996_B0_RXPMD_TIMESTAMP_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56996_B0_RXPMD_TIMESTAMP_TYPE_INVALID                     0
+#define BCM56996_B0_RXPMD_TIMESTAMP_TYPE_OAM_LM                      1
+#define BCM56996_B0_RXPMD_TIMESTAMP_TYPE_OAM_DM                      2
+#define BCM56996_B0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS                3
+/*! \} */
+
+/*! BCM56996_B0_RXPMD_TIMESTAMP_TYPE encoding name strings maps. */
+#define BCM56996_B0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT \
+    {"INVALID", BCM56996_B0_RXPMD_TIMESTAMP_TYPE_INVALID},\
+    {"OAM_LM", BCM56996_B0_RXPMD_TIMESTAMP_TYPE_OAM_LM},\
+    {"OAM_DM", BCM56996_B0_RXPMD_TIMESTAMP_TYPE_OAM_DM},\
+    {"IEEE_802_1AS", BCM56996_B0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS},\
+    {NULL, 0}
+
+/* RX_REASON defines */
+#define BCM56996_B0_RX_REASON_CPU_UVLAN                              0
+#define BCM56996_B0_RX_REASON_CPU_SLF                                1
+#define BCM56996_B0_RX_REASON_CPU_DLF                                2
+#define BCM56996_B0_RX_REASON_CPU_L2MOVE                             3
+#define BCM56996_B0_RX_REASON_CPU_L2CPU                              4
+#define BCM56996_B0_RX_REASON_CPU_L3SRC_MISS                         5
+#define BCM56996_B0_RX_REASON_CPU_L3DST_MISS                         6
+#define BCM56996_B0_RX_REASON_CPU_L3SRC_MOVE                         7
+#define BCM56996_B0_RX_REASON_CPU_MC_MISS                            8
+#define BCM56996_B0_RX_REASON_CPU_IPMC_MISS                          9
+#define BCM56996_B0_RX_REASON_CPU_FFP                                10
+#define BCM56996_B0_RX_REASON_CPU_L3HDR_ERR                          11
+#define BCM56996_B0_RX_REASON_CPU_PROTOCOL_PKT                       12
+#define BCM56996_B0_RX_REASON_CPU_DOS_ATTACK                         13
+#define BCM56996_B0_RX_REASON_CPU_MARTIAN_ADDR                       14
+#define BCM56996_B0_RX_REASON_CPU_TUNNEL_ERR                         15
+#define BCM56996_B0_RX_REASON_CPU_SFLOW                              16
+#define BCM56996_B0_RX_REASON_ICMP_REDIRECT                          17
+#define BCM56996_B0_RX_REASON_L3_SLOWPATH                            18
+#define BCM56996_B0_RX_REASON_PARITY_ERROR                           19
+#define BCM56996_B0_RX_REASON_L3_MTU_CHECK_FAIL                      20
+#define BCM56996_B0_RX_REASON_MCIDX_ERROR                            21
+#define BCM56996_B0_RX_REASON_CPU_VFP                                22
+#define BCM56996_B0_RX_REASON_MPLS_PROC_ERROR                        23
+#define BCM56996_B0_RX_REASON_PBT_NONUC_PKT                          24
+#define BCM56996_B0_RX_REASON_L3_NEXT_HOP                            25
+#define BCM56996_B0_RX_REASON_MY_STATION                             26
+#define BCM56996_B0_RX_REASON_TIME_SYNC                              27
+#define BCM56996_B0_RX_REASON_TUNNEL_DECAP_ECN_ERROR                 28
+#define BCM56996_B0_RX_REASON_BFD_SLOWPATH                           29
+#define BCM56996_B0_RX_REASON_BFD_ERROR                              30
+#define BCM56996_B0_RX_REASON_PACKET_TRACE_TO_CPU                    31
+#define BCM56996_B0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT               32
+#define BCM56996_B0_RX_REASON_MPLS_ALERT_LABEL                       33
+#define BCM56996_B0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH            34
+#define BCM56996_B0_RX_REASON_DLB_MONITOR                            35
+#define BCM56996_B0_RX_REASON_INT_TURN_AROUND                        36
+#define BCM56996_B0_RX_REASON_ETRAP_MONITOR                          37
+#define BCM56996_B0_RX_REASON_SRV6_ERROR                             38
+#define BCM56996_B0_RX_REASON_VXLAN_VN_ID_MISS                       39
+#define BCM56996_B0_RX_REASON_VXLAN_SIP_MISS                         40
+#define BCM56996_B0_RX_REASON_ADAPT_MISS                             41
+#define BCM56996_B0_RX_REASON_COUNT                                  42
+
+/* RX_REASON name map */
+#define BCM56996_B0_RX_REASON_NAME_MAP_INIT \
+    {"CPU_UVLAN", BCM56996_B0_RX_REASON_CPU_UVLAN}, \
+    {"CPU_SLF", BCM56996_B0_RX_REASON_CPU_SLF}, \
+    {"CPU_DLF", BCM56996_B0_RX_REASON_CPU_DLF}, \
+    {"CPU_L2MOVE", BCM56996_B0_RX_REASON_CPU_L2MOVE}, \
+    {"CPU_L2CPU", BCM56996_B0_RX_REASON_CPU_L2CPU}, \
+    {"CPU_L3SRC_MISS", BCM56996_B0_RX_REASON_CPU_L3SRC_MISS}, \
+    {"CPU_L3DST_MISS", BCM56996_B0_RX_REASON_CPU_L3DST_MISS}, \
+    {"CPU_L3SRC_MOVE", BCM56996_B0_RX_REASON_CPU_L3SRC_MOVE}, \
+    {"CPU_MC_MISS", BCM56996_B0_RX_REASON_CPU_MC_MISS}, \
+    {"CPU_IPMC_MISS", BCM56996_B0_RX_REASON_CPU_IPMC_MISS}, \
+    {"CPU_FFP", BCM56996_B0_RX_REASON_CPU_FFP}, \
+    {"CPU_L3HDR_ERR", BCM56996_B0_RX_REASON_CPU_L3HDR_ERR}, \
+    {"CPU_PROTOCOL_PKT", BCM56996_B0_RX_REASON_CPU_PROTOCOL_PKT}, \
+    {"CPU_DOS_ATTACK", BCM56996_B0_RX_REASON_CPU_DOS_ATTACK}, \
+    {"CPU_MARTIAN_ADDR", BCM56996_B0_RX_REASON_CPU_MARTIAN_ADDR}, \
+    {"CPU_TUNNEL_ERR", BCM56996_B0_RX_REASON_CPU_TUNNEL_ERR}, \
+    {"CPU_SFLOW", BCM56996_B0_RX_REASON_CPU_SFLOW}, \
+    {"ICMP_REDIRECT", BCM56996_B0_RX_REASON_ICMP_REDIRECT}, \
+    {"L3_SLOWPATH", BCM56996_B0_RX_REASON_L3_SLOWPATH}, \
+    {"PARITY_ERROR", BCM56996_B0_RX_REASON_PARITY_ERROR}, \
+    {"L3_MTU_CHECK_FAIL", BCM56996_B0_RX_REASON_L3_MTU_CHECK_FAIL}, \
+    {"MCIDX_ERROR", BCM56996_B0_RX_REASON_MCIDX_ERROR}, \
+    {"CPU_VFP", BCM56996_B0_RX_REASON_CPU_VFP}, \
+    {"MPLS_PROC_ERROR", BCM56996_B0_RX_REASON_MPLS_PROC_ERROR}, \
+    {"PBT_NONUC_PKT", BCM56996_B0_RX_REASON_PBT_NONUC_PKT}, \
+    {"L3_NEXT_HOP", BCM56996_B0_RX_REASON_L3_NEXT_HOP}, \
+    {"MY_STATION", BCM56996_B0_RX_REASON_MY_STATION}, \
+    {"TIME_SYNC", BCM56996_B0_RX_REASON_TIME_SYNC}, \
+    {"TUNNEL_DECAP_ECN_ERROR", BCM56996_B0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \
+    {"BFD_SLOWPATH", BCM56996_B0_RX_REASON_BFD_SLOWPATH}, \
+    {"BFD_ERROR", BCM56996_B0_RX_REASON_BFD_ERROR}, \
+    {"PACKET_TRACE_TO_CPU", BCM56996_B0_RX_REASON_PACKET_TRACE_TO_CPU}, \
+    {"MPLS_UNKNOWN_CONTROL_PKT", BCM56996_B0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \
+    {"MPLS_ALERT_LABEL", BCM56996_B0_RX_REASON_MPLS_ALERT_LABEL}, \
+    {"CPU_IPMC_INTERFACE_MISMATCH", BCM56996_B0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \
+    {"DLB_MONITOR", BCM56996_B0_RX_REASON_DLB_MONITOR}, \
+    {"INT_TURN_AROUND", BCM56996_B0_RX_REASON_INT_TURN_AROUND}, \
+    {"ETRAP_MONITOR", BCM56996_B0_RX_REASON_ETRAP_MONITOR}, \
+    {"SRV6_ERROR", BCM56996_B0_RX_REASON_SRV6_ERROR}, \
+    {"VXLAN_VN_ID_MISS", BCM56996_B0_RX_REASON_VXLAN_VN_ID_MISS}, \
+    {"VXLAN_SIP_MISS", BCM56996_B0_RX_REASON_VXLAN_SIP_MISS}, \
+    {"ADAPT_MISS", BCM56996_B0_RX_REASON_ADAPT_MISS}, \
+    {"COUNT", BCM56996_B0_RX_REASON_COUNT}
+
+/*!
+ * \name BCM56996_B0_RX_REASON_CPU_SFLOW encodings.
+ * \anchor BCM56996_B0_RX_REASON_CPU_SFLOW_XXX
+ */
+/*! \{ */
+#define BCM56996_B0_RX_REASON_CPU_SFLOW_INVALID                      0
+#define BCM56996_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX               1
+#define BCM56996_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST                2
+#define BCM56996_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC                3
+/*! \} */
+
+/*! BCM56996_B0_RX_REASON_CPU_SFLOW encoding name strings maps. */
+#define BCM56996_B0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT \
+    {"INVALID", BCM56996_B0_RX_REASON_CPU_SFLOW_INVALID},\
+    {"CPU_SFLOW_FLEX", BCM56996_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX},\
+    {"CPU_SFLOW_DST", BCM56996_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST},\
+    {"CPU_SFLOW_SRC", BCM56996_B0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56996_B0_RX_REASON_MPLS_PROC_ERROR encodings.
+ * \anchor BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_XXX
+ */
+/*! \{ */
+#define BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_NOP                    0
+#define BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD        1
+#define BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION         2
+#define BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS             3
+#define BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL         4
+/*! \} */
+
+/*! BCM56996_B0_RX_REASON_MPLS_PROC_ERROR encoding name strings maps. */
+#define BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT \
+    {"NOP", BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_NOP},\
+    {"INVALID_PAYLOAD", BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD},\
+    {"INVALID_ACTION", BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION},\
+    {"LABEL_MISS", BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS},\
+    {"TTL_CHECK_FAIL", BCM56996_B0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL},\
+    {NULL, 0}
+
+/* TXPMD defines */
+#define BCM56996_B0_TXPMD_CELL_LENGTH                                0
+#define BCM56996_B0_TXPMD_EOP                                        1
+#define BCM56996_B0_TXPMD_SOP                                        2
+#define BCM56996_B0_TXPMD_PKT_LENGTH                                 3
+#define BCM56996_B0_TXPMD_IPCF_PTR                                   4
+#define BCM56996_B0_TXPMD_SRC_MODID                                  5
+#define BCM56996_B0_TXPMD_COS                                        6
+#define BCM56996_B0_TXPMD_UNICAST                                    7
+#define BCM56996_B0_TXPMD_SET_L2BM                                   8
+#define BCM56996_B0_TXPMD_RQE_Q_NUM                                  9
+#define BCM56996_B0_TXPMD_SPAP                                       10
+#define BCM56996_B0_TXPMD_SPID                                       11
+#define BCM56996_B0_TXPMD_SPID_OVERRIDE                              12
+#define BCM56996_B0_TXPMD_INPUT_PRI                                  13
+#define BCM56996_B0_TXPMD_LOCAL_DEST_PORT                            14
+#define BCM56996_B0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET              15
+#define BCM56996_B0_TXPMD_TX_TS                                      16
+#define BCM56996_B0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN            17
+#define BCM56996_B0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM                18
+#define BCM56996_B0_TXPMD_IEEE1588_ONE_STEP_ENABLE                   19
+#define BCM56996_B0_TXPMD_CELL_ERROR                                 20
+#define BCM56996_B0_TXPMD_HEADER_TYPE                                21
+#define BCM56996_B0_TXPMD_START                                      22
+#define BCM56996_B0_TXPMD_COUNT                                      23
+
+/* TXPMD name map */
+#define BCM56996_B0_TXPMD_NAME_MAP_INIT \
+    {"CELL_LENGTH", BCM56996_B0_TXPMD_CELL_LENGTH}, \
+    {"EOP", BCM56996_B0_TXPMD_EOP}, \
+    {"SOP", BCM56996_B0_TXPMD_SOP}, \
+    {"PKT_LENGTH", BCM56996_B0_TXPMD_PKT_LENGTH}, \
+    {"IPCF_PTR", BCM56996_B0_TXPMD_IPCF_PTR}, \
+    {"SRC_MODID", BCM56996_B0_TXPMD_SRC_MODID}, \
+    {"COS", BCM56996_B0_TXPMD_COS}, \
+    {"UNICAST", BCM56996_B0_TXPMD_UNICAST}, \
+    {"SET_L2BM", BCM56996_B0_TXPMD_SET_L2BM}, \
+    {"RQE_Q_NUM", BCM56996_B0_TXPMD_RQE_Q_NUM}, \
+    {"SPAP", BCM56996_B0_TXPMD_SPAP}, \
+    {"SPID", BCM56996_B0_TXPMD_SPID}, \
+    {"SPID_OVERRIDE", BCM56996_B0_TXPMD_SPID_OVERRIDE}, \
+    {"INPUT_PRI", BCM56996_B0_TXPMD_INPUT_PRI}, \
+    {"LOCAL_DEST_PORT", BCM56996_B0_TXPMD_LOCAL_DEST_PORT}, \
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM56996_B0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"TX_TS", BCM56996_B0_TXPMD_TX_TS}, \
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM56996_B0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCM56996_B0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"IEEE1588_ONE_STEP_ENABLE", BCM56996_B0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \
+    {"CELL_ERROR", BCM56996_B0_TXPMD_CELL_ERROR}, \
+    {"HEADER_TYPE", BCM56996_B0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM56996_B0_TXPMD_START}, \
+    {"COUNT", BCM56996_B0_TXPMD_COUNT}
+
+/*!
+ * \name BCM56996_B0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM56996_B0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56996_B0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM56996_B0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU                 1
+/*! \} */
+
+/*! BCM56996_B0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM56996_B0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56996_B0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_CPU", BCM56996_B0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56996_B0_TXPMD_START encodings.
+ * \anchor BCM56996_B0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM56996_B0_TXPMD_START_RESERVED_0                           0
+#define BCM56996_B0_TXPMD_START_RESERVED_1                           1
+#define BCM56996_B0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM56996_B0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM56996_B0_TXPMD_START encoding name strings maps. */
+#define BCM56996_B0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56996_B0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM56996_B0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM56996_B0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM56996_B0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+/* LBHDR defines */
+#define BCM56996_B0_LBHDR_ETHERNET_PP_PORT                           0
+#define BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE                      1
+#define BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE                  2
+#define BCM56996_B0_LBHDR_ETHERNET_DESTINATION                       3
+#define BCM56996_B0_LBHDR_ETHERNET_ROUTED_PKT                        4
+#define BCM56996_B0_LBHDR_ETHERNET_QOS_FIELDS_VLD                    5
+#define BCM56996_B0_LBHDR_ETHERNET_INT_CN                            6
+#define BCM56996_B0_LBHDR_ETHERNET_INT_PRI                           7
+#define BCM56996_B0_LBHDR_ETHERNET_DP                                8
+#define BCM56996_B0_LBHDR_ETHERNET_ECMP_MEMBER_ID                    9
+#define BCM56996_B0_LBHDR_ETHERNET_VRF                               10
+#define BCM56996_B0_LBHDR_ETHERNET_VRF_VALID                         11
+#define BCM56996_B0_LBHDR_ETHERNET_MCAST_LB_INDEX                    12
+#define BCM56996_B0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD                13
+#define BCM56996_B0_LBHDR_TRILL_ACCESS_NONUC_TC                      14
+#define BCM56996_B0_LBHDR_TRILL_ACCESS_NONUC_CNG                     15
+#define BCM56996_B0_LBHDR_TRILL_NETWORK_NONUC_TC                     16
+#define BCM56996_B0_LBHDR_TRILL_NETWORK_NONUC_CNG                    17
+#define BCM56996_B0_LBHDR_PKT_PROFILE                                18
+#define BCM56996_B0_LBHDR_VISIBILITY_PKT                             19
+#define BCM56996_B0_LBHDR_SOURCE                                     20
+#define BCM56996_B0_LBHDR_SOURCE_TYPE                                21
+#define BCM56996_B0_LBHDR_HEADER_TYPE                                22
+#define BCM56996_B0_LBHDR_INPUT_PRIORITY                             23
+#define BCM56996_B0_LBHDR_START                                      24
+#define BCM56996_B0_LBHDR_COUNT                                      25
+
+/* LBHDR name map */
+#define BCM56996_B0_LBHDR_NAME_MAP_INIT \
+    {"ETHERNET::PP_PORT", BCM56996_B0_LBHDR_ETHERNET_PP_PORT}, \
+    {"ETHERNET::SUBFLOW_TYPE", BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE}, \
+    {"ETHERNET::DESTINATION_TYPE", BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE}, \
+    {"ETHERNET::DESTINATION", BCM56996_B0_LBHDR_ETHERNET_DESTINATION}, \
+    {"ETHERNET::ROUTED_PKT", BCM56996_B0_LBHDR_ETHERNET_ROUTED_PKT}, \
+    {"ETHERNET::QOS_FIELDS_VLD", BCM56996_B0_LBHDR_ETHERNET_QOS_FIELDS_VLD}, \
+    {"ETHERNET::INT_CN", BCM56996_B0_LBHDR_ETHERNET_INT_CN}, \
+    {"ETHERNET::INT_PRI", BCM56996_B0_LBHDR_ETHERNET_INT_PRI}, \
+    {"ETHERNET::DP", BCM56996_B0_LBHDR_ETHERNET_DP}, \
+    {"ETHERNET::ECMP_MEMBER_ID", BCM56996_B0_LBHDR_ETHERNET_ECMP_MEMBER_ID}, \
+    {"ETHERNET::VRF", BCM56996_B0_LBHDR_ETHERNET_VRF}, \
+    {"ETHERNET::VRF_VALID", BCM56996_B0_LBHDR_ETHERNET_VRF_VALID}, \
+    {"ETHERNET::MCAST_LB_INDEX", BCM56996_B0_LBHDR_ETHERNET_MCAST_LB_INDEX}, \
+    {"ETHERNET::MCAST_LB_INDEX_VLD", BCM56996_B0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD}, \
+    {"TRILL_ACCESS_NONUC::TC", BCM56996_B0_LBHDR_TRILL_ACCESS_NONUC_TC}, \
+    {"TRILL_ACCESS_NONUC::CNG", BCM56996_B0_LBHDR_TRILL_ACCESS_NONUC_CNG}, \
+    {"TRILL_NETWORK_NONUC::TC", BCM56996_B0_LBHDR_TRILL_NETWORK_NONUC_TC}, \
+    {"TRILL_NETWORK_NONUC::CNG", BCM56996_B0_LBHDR_TRILL_NETWORK_NONUC_CNG}, \
+    {"PKT_PROFILE", BCM56996_B0_LBHDR_PKT_PROFILE}, \
+    {"VISIBILITY_PKT", BCM56996_B0_LBHDR_VISIBILITY_PKT}, \
+    {"SOURCE", BCM56996_B0_LBHDR_SOURCE}, \
+    {"SOURCE_TYPE", BCM56996_B0_LBHDR_SOURCE_TYPE}, \
+    {"HEADER_TYPE", BCM56996_B0_LBHDR_HEADER_TYPE}, \
+    {"INPUT_PRIORITY", BCM56996_B0_LBHDR_INPUT_PRIORITY}, \
+    {"START", BCM56996_B0_LBHDR_START}, \
+    {"COUNT", BCM56996_B0_LBHDR_COUNT}
+
+/*!
+ * \name BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE encodings.
+ * \anchor BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE       0
+#define BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC          1
+#define BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2           2
+#define BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3           3
+/*! \} */
+
+/*! BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE encoding name strings maps. */
+#define BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT \
+    {"CPU_MASQUERADE", BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE},\
+    {"CPU_TX_PROC", BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC},\
+    {"RESERVED_2", BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2},\
+    {"RESERVED_3", BCM56996_B0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE encodings.
+ * \anchor BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP             0
+#define BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI              1
+#define BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP             2
+#define BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER      3
+#define BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC             4
+#define BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC             5
+#define BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD       6
+/*! \} */
+
+/*! BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE encoding name strings maps. */
+#define BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"DGLP", BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP},\
+    {"NHI", BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI},\
+    {"ECMP", BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP},\
+    {"ECMP_MEMBER", BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER},\
+    {"IPMC", BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC},\
+    {"L2MC", BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC},\
+    {"VLAN_FLOOD", BCM56996_B0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56996_B0_LBHDR_HEADER_TYPE encodings.
+ * \anchor BCM56996_B0_LBHDR_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56996_B0_LBHDR_HEADER_TYPE_TUNNEL_TERM                    0
+#define BCM56996_B0_LBHDR_HEADER_TYPE_TRILL_NW                       1
+#define BCM56996_B0_LBHDR_HEADER_TYPE_TRILL_AC                       2
+#define BCM56996_B0_LBHDR_HEADER_TYPE_ETHERNET                       3
+/*! \} */
+
+/*! BCM56996_B0_LBHDR_HEADER_TYPE encoding name strings maps. */
+#define BCM56996_B0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \
+    {"TUNNEL_TERM", BCM56996_B0_LBHDR_HEADER_TYPE_TUNNEL_TERM},\
+    {"TRILL_NW", BCM56996_B0_LBHDR_HEADER_TYPE_TRILL_NW},\
+    {"TRILL_AC", BCM56996_B0_LBHDR_HEADER_TYPE_TRILL_AC},\
+    {"ETHERNET", BCM56996_B0_LBHDR_HEADER_TYPE_ETHERNET},\
+    {NULL, 0}
+
+#endif /* BCM56996_B0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.h
new file mode 100644
index 00000000000..e3043c93fc7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.h
@@ -0,0 +1,490 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM56998_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM56998_A0_PMD_FIELD_H
+#define BCM56998_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM56998_A0_RXPMD_ING_L3_INTF                                0
+#define BCM56998_A0_RXPMD_I2E_CLASSID                                1
+#define BCM56998_A0_RXPMD_RX_BFD_SESSION_INDEX                       2
+#define BCM56998_A0_RXPMD_I2E_CLASSID_TYPE                           3
+#define BCM56998_A0_RXPMD_RX_BFD_START_OFFSET_TYPE                   4
+#define BCM56998_A0_RXPMD_RX_BFD_START_OFFSET                        5
+#define BCM56998_A0_RXPMD_ING_L3_INTF_VALID                          6
+#define BCM56998_A0_RXPMD_CPU_COS                                    7
+#define BCM56998_A0_RXPMD_QUEUE_NUM                                  8
+#define BCM56998_A0_RXPMD_BPDU                                       9
+#define BCM56998_A0_RXPMD_CHANGE_DSCP                                10
+#define BCM56998_A0_RXPMD_CHANGE_ECN                                 11
+#define BCM56998_A0_RXPMD_DLB_ID_VALID                               12
+#define BCM56998_A0_RXPMD_REASON                                     13
+#define BCM56998_A0_RXPMD_REASON_TYPE                                14
+#define BCM56998_A0_RXPMD_DO_NOT_CHANGE_TTL                          15
+#define BCM56998_A0_RXPMD_DSCP                                       16
+#define BCM56998_A0_RXPMD_SPECIAL_PACKET_TYPE                        17
+#define BCM56998_A0_RXPMD_ECN                                        18
+#define BCM56998_A0_RXPMD_INCOMING_TAG_STATUS                        19
+#define BCM56998_A0_RXPMD_O_NHI                                      20
+#define BCM56998_A0_RXPMD_ING_OTAG_ACTION                            21
+#define BCM56998_A0_RXPMD_IEU                                        22
+#define BCM56998_A0_RXPMD_IEU_VALID                                  23
+#define BCM56998_A0_RXPMD_L3ONLY                                     24
+#define BCM56998_A0_RXPMD_MATCHED_RULE                               25
+#define BCM56998_A0_RXPMD_MTP_INDEX                                  26
+#define BCM56998_A0_RXPMD_OUTER_CFI                                  27
+#define BCM56998_A0_RXPMD_OUTER_PRI                                  28
+#define BCM56998_A0_RXPMD_OUTER_VID                                  29
+#define BCM56998_A0_RXPMD_INCOMING_INT_HDR_TYPE                      30
+#define BCM56998_A0_RXPMD_PKT_LENGTH                                 31
+#define BCM56998_A0_RXPMD_REGEN_CRC                                  32
+#define BCM56998_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  33
+#define BCM56998_A0_RXPMD_IP_ROUTED                                  34
+#define BCM56998_A0_RXPMD_ENTROPY_LABEL                              35
+#define BCM56998_A0_RXPMD_SPECIAL_PACKET_INDICATOR                   36
+#define BCM56998_A0_RXPMD_SRC_PORT_NUM                               37
+#define BCM56998_A0_RXPMD_SWITCH                                     38
+#define BCM56998_A0_RXPMD_TIMESTAMP                                  39
+#define BCM56998_A0_RXPMD_TIMESTAMP_HI                               40
+#define BCM56998_A0_RXPMD_TIMESTAMP_TYPE                             41
+#define BCM56998_A0_RXPMD_TUNNEL_DECAP_TYPE                          42
+#define BCM56998_A0_RXPMD_UC_SW_COPY_DROPPED                         43
+#define BCM56998_A0_RXPMD_UNICAST_QUEUE                              44
+#define BCM56998_A0_RXPMD_DLB_ID                                     45
+#define BCM56998_A0_RXPMD_MODULE_HDR                                 46
+#define BCM56998_A0_RXPMD_COUNT                                      47
+
+/* RXPMD name map */
+#define BCM56998_A0_RXPMD_NAME_MAP_INIT \
+    {"ING_L3_INTF", BCM56998_A0_RXPMD_ING_L3_INTF}, \
+    {"I2E_CLASSID", BCM56998_A0_RXPMD_I2E_CLASSID}, \
+    {"RX_BFD_SESSION_INDEX", BCM56998_A0_RXPMD_RX_BFD_SESSION_INDEX}, \
+    {"I2E_CLASSID_TYPE", BCM56998_A0_RXPMD_I2E_CLASSID_TYPE}, \
+    {"RX_BFD_START_OFFSET_TYPE", BCM56998_A0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \
+    {"RX_BFD_START_OFFSET", BCM56998_A0_RXPMD_RX_BFD_START_OFFSET}, \
+    {"ING_L3_INTF_VALID", BCM56998_A0_RXPMD_ING_L3_INTF_VALID}, \
+    {"CPU_COS", BCM56998_A0_RXPMD_CPU_COS}, \
+    {"QUEUE_NUM", BCM56998_A0_RXPMD_QUEUE_NUM}, \
+    {"BPDU", BCM56998_A0_RXPMD_BPDU}, \
+    {"CHANGE_DSCP", BCM56998_A0_RXPMD_CHANGE_DSCP}, \
+    {"CHANGE_ECN", BCM56998_A0_RXPMD_CHANGE_ECN}, \
+    {"DLB_ID_VALID", BCM56998_A0_RXPMD_DLB_ID_VALID}, \
+    {"REASON", BCM56998_A0_RXPMD_REASON}, \
+    {"REASON_TYPE", BCM56998_A0_RXPMD_REASON_TYPE}, \
+    {"DO_NOT_CHANGE_TTL", BCM56998_A0_RXPMD_DO_NOT_CHANGE_TTL}, \
+    {"DSCP", BCM56998_A0_RXPMD_DSCP}, \
+    {"SPECIAL_PACKET_TYPE", BCM56998_A0_RXPMD_SPECIAL_PACKET_TYPE}, \
+    {"ECN", BCM56998_A0_RXPMD_ECN}, \
+    {"INCOMING_TAG_STATUS", BCM56998_A0_RXPMD_INCOMING_TAG_STATUS}, \
+    {"O_NHI", BCM56998_A0_RXPMD_O_NHI}, \
+    {"ING_OTAG_ACTION", BCM56998_A0_RXPMD_ING_OTAG_ACTION}, \
+    {"IEU", BCM56998_A0_RXPMD_IEU}, \
+    {"IEU_VALID", BCM56998_A0_RXPMD_IEU_VALID}, \
+    {"L3ONLY", BCM56998_A0_RXPMD_L3ONLY}, \
+    {"MATCHED_RULE", BCM56998_A0_RXPMD_MATCHED_RULE}, \
+    {"MTP_INDEX", BCM56998_A0_RXPMD_MTP_INDEX}, \
+    {"OUTER_CFI", BCM56998_A0_RXPMD_OUTER_CFI}, \
+    {"OUTER_PRI", BCM56998_A0_RXPMD_OUTER_PRI}, \
+    {"OUTER_VID", BCM56998_A0_RXPMD_OUTER_VID}, \
+    {"INCOMING_INT_HDR_TYPE", BCM56998_A0_RXPMD_INCOMING_INT_HDR_TYPE}, \
+    {"PKT_LENGTH", BCM56998_A0_RXPMD_PKT_LENGTH}, \
+    {"REGEN_CRC", BCM56998_A0_RXPMD_REGEN_CRC}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM56998_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"IP_ROUTED", BCM56998_A0_RXPMD_IP_ROUTED}, \
+    {"ENTROPY_LABEL", BCM56998_A0_RXPMD_ENTROPY_LABEL}, \
+    {"SPECIAL_PACKET_INDICATOR", BCM56998_A0_RXPMD_SPECIAL_PACKET_INDICATOR}, \
+    {"SRC_PORT_NUM", BCM56998_A0_RXPMD_SRC_PORT_NUM}, \
+    {"SWITCH", BCM56998_A0_RXPMD_SWITCH}, \
+    {"TIMESTAMP", BCM56998_A0_RXPMD_TIMESTAMP}, \
+    {"TIMESTAMP_HI", BCM56998_A0_RXPMD_TIMESTAMP_HI}, \
+    {"TIMESTAMP_TYPE", BCM56998_A0_RXPMD_TIMESTAMP_TYPE}, \
+    {"TUNNEL_DECAP_TYPE", BCM56998_A0_RXPMD_TUNNEL_DECAP_TYPE}, \
+    {"UC_SW_COPY_DROPPED", BCM56998_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"UNICAST_QUEUE", BCM56998_A0_RXPMD_UNICAST_QUEUE}, \
+    {"DLB_ID", BCM56998_A0_RXPMD_DLB_ID}, \
+    {"MODULE_HDR", BCM56998_A0_RXPMD_MODULE_HDR}, \
+    {"COUNT", BCM56998_A0_RXPMD_COUNT}
+
+/*!
+ * \name BCM56998_A0_RXPMD_TIMESTAMP_TYPE encodings.
+ * \anchor BCM56998_A0_RXPMD_TIMESTAMP_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56998_A0_RXPMD_TIMESTAMP_TYPE_INVALID                     0
+#define BCM56998_A0_RXPMD_TIMESTAMP_TYPE_OAM_LM                      1
+#define BCM56998_A0_RXPMD_TIMESTAMP_TYPE_OAM_DM                      2
+#define BCM56998_A0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS                3
+/*! \} */
+
+/*! BCM56998_A0_RXPMD_TIMESTAMP_TYPE encoding name strings maps. */
+#define BCM56998_A0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT \
+    {"INVALID", BCM56998_A0_RXPMD_TIMESTAMP_TYPE_INVALID},\
+    {"OAM_LM", BCM56998_A0_RXPMD_TIMESTAMP_TYPE_OAM_LM},\
+    {"OAM_DM", BCM56998_A0_RXPMD_TIMESTAMP_TYPE_OAM_DM},\
+    {"IEEE_802_1AS", BCM56998_A0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS},\
+    {NULL, 0}
+
+/* RX_REASON defines */
+#define BCM56998_A0_RX_REASON_CPU_UVLAN                              0
+#define BCM56998_A0_RX_REASON_CPU_SLF                                1
+#define BCM56998_A0_RX_REASON_CPU_DLF                                2
+#define BCM56998_A0_RX_REASON_CPU_L2MOVE                             3
+#define BCM56998_A0_RX_REASON_CPU_L2CPU                              4
+#define BCM56998_A0_RX_REASON_CPU_L3SRC_MISS                         5
+#define BCM56998_A0_RX_REASON_CPU_L3DST_MISS                         6
+#define BCM56998_A0_RX_REASON_CPU_L3SRC_MOVE                         7
+#define BCM56998_A0_RX_REASON_CPU_MC_MISS                            8
+#define BCM56998_A0_RX_REASON_CPU_IPMC_MISS                          9
+#define BCM56998_A0_RX_REASON_CPU_FFP                                10
+#define BCM56998_A0_RX_REASON_CPU_L3HDR_ERR                          11
+#define BCM56998_A0_RX_REASON_CPU_PROTOCOL_PKT                       12
+#define BCM56998_A0_RX_REASON_CPU_DOS_ATTACK                         13
+#define BCM56998_A0_RX_REASON_CPU_MARTIAN_ADDR                       14
+#define BCM56998_A0_RX_REASON_CPU_TUNNEL_ERR                         15
+#define BCM56998_A0_RX_REASON_CPU_SFLOW                              16
+#define BCM56998_A0_RX_REASON_ICMP_REDIRECT                          17
+#define BCM56998_A0_RX_REASON_L3_SLOWPATH                            18
+#define BCM56998_A0_RX_REASON_PARITY_ERROR                           19
+#define BCM56998_A0_RX_REASON_L3_MTU_CHECK_FAIL                      20
+#define BCM56998_A0_RX_REASON_MCIDX_ERROR                            21
+#define BCM56998_A0_RX_REASON_CPU_VFP                                22
+#define BCM56998_A0_RX_REASON_MPLS_PROC_ERROR                        23
+#define BCM56998_A0_RX_REASON_PBT_NONUC_PKT                          24
+#define BCM56998_A0_RX_REASON_L3_NEXT_HOP                            25
+#define BCM56998_A0_RX_REASON_MY_STATION                             26
+#define BCM56998_A0_RX_REASON_TIME_SYNC                              27
+#define BCM56998_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR                 28
+#define BCM56998_A0_RX_REASON_BFD_SLOWPATH                           29
+#define BCM56998_A0_RX_REASON_BFD_ERROR                              30
+#define BCM56998_A0_RX_REASON_PACKET_TRACE_TO_CPU                    31
+#define BCM56998_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT               32
+#define BCM56998_A0_RX_REASON_MPLS_ALERT_LABEL                       33
+#define BCM56998_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH            34
+#define BCM56998_A0_RX_REASON_DLB_MONITOR                            35
+#define BCM56998_A0_RX_REASON_INT_TURN_AROUND                        36
+#define BCM56998_A0_RX_REASON_ETRAP_MONITOR                          37
+#define BCM56998_A0_RX_REASON_SRV6_ERROR                             38
+#define BCM56998_A0_RX_REASON_VXLAN_VN_ID_MISS                       39
+#define BCM56998_A0_RX_REASON_VXLAN_SIP_MISS                         40
+#define BCM56998_A0_RX_REASON_ADAPT_MISS                             41
+#define BCM56998_A0_RX_REASON_NH_PROTO_STATUS_DOWN                   42
+#define BCM56998_A0_RX_REASON_COUNT                                  43
+
+/* RX_REASON name map */
+#define BCM56998_A0_RX_REASON_NAME_MAP_INIT \
+    {"CPU_UVLAN", BCM56998_A0_RX_REASON_CPU_UVLAN}, \
+    {"CPU_SLF", BCM56998_A0_RX_REASON_CPU_SLF}, \
+    {"CPU_DLF", BCM56998_A0_RX_REASON_CPU_DLF}, \
+    {"CPU_L2MOVE", BCM56998_A0_RX_REASON_CPU_L2MOVE}, \
+    {"CPU_L2CPU", BCM56998_A0_RX_REASON_CPU_L2CPU}, \
+    {"CPU_L3SRC_MISS", BCM56998_A0_RX_REASON_CPU_L3SRC_MISS}, \
+    {"CPU_L3DST_MISS", BCM56998_A0_RX_REASON_CPU_L3DST_MISS}, \
+    {"CPU_L3SRC_MOVE", BCM56998_A0_RX_REASON_CPU_L3SRC_MOVE}, \
+    {"CPU_MC_MISS", BCM56998_A0_RX_REASON_CPU_MC_MISS}, \
+    {"CPU_IPMC_MISS", BCM56998_A0_RX_REASON_CPU_IPMC_MISS}, \
+    {"CPU_FFP", BCM56998_A0_RX_REASON_CPU_FFP}, \
+    {"CPU_L3HDR_ERR", BCM56998_A0_RX_REASON_CPU_L3HDR_ERR}, \
+    {"CPU_PROTOCOL_PKT", BCM56998_A0_RX_REASON_CPU_PROTOCOL_PKT}, \
+    {"CPU_DOS_ATTACK", BCM56998_A0_RX_REASON_CPU_DOS_ATTACK}, \
+    {"CPU_MARTIAN_ADDR", BCM56998_A0_RX_REASON_CPU_MARTIAN_ADDR}, \
+    {"CPU_TUNNEL_ERR", BCM56998_A0_RX_REASON_CPU_TUNNEL_ERR}, \
+    {"CPU_SFLOW", BCM56998_A0_RX_REASON_CPU_SFLOW}, \
+    {"ICMP_REDIRECT", BCM56998_A0_RX_REASON_ICMP_REDIRECT}, \
+    {"L3_SLOWPATH", BCM56998_A0_RX_REASON_L3_SLOWPATH}, \
+    {"PARITY_ERROR", BCM56998_A0_RX_REASON_PARITY_ERROR}, \
+    {"L3_MTU_CHECK_FAIL", BCM56998_A0_RX_REASON_L3_MTU_CHECK_FAIL}, \
+    {"MCIDX_ERROR", BCM56998_A0_RX_REASON_MCIDX_ERROR}, \
+    {"CPU_VFP", BCM56998_A0_RX_REASON_CPU_VFP}, \
+    {"MPLS_PROC_ERROR", BCM56998_A0_RX_REASON_MPLS_PROC_ERROR}, \
+    {"PBT_NONUC_PKT", BCM56998_A0_RX_REASON_PBT_NONUC_PKT}, \
+    {"L3_NEXT_HOP", BCM56998_A0_RX_REASON_L3_NEXT_HOP}, \
+    {"MY_STATION", BCM56998_A0_RX_REASON_MY_STATION}, \
+    {"TIME_SYNC", BCM56998_A0_RX_REASON_TIME_SYNC}, \
+    {"TUNNEL_DECAP_ECN_ERROR", BCM56998_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \
+    {"BFD_SLOWPATH", BCM56998_A0_RX_REASON_BFD_SLOWPATH}, \
+    {"BFD_ERROR", BCM56998_A0_RX_REASON_BFD_ERROR}, \
+    {"PACKET_TRACE_TO_CPU", BCM56998_A0_RX_REASON_PACKET_TRACE_TO_CPU}, \
+    {"MPLS_UNKNOWN_CONTROL_PKT", BCM56998_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \
+    {"MPLS_ALERT_LABEL", BCM56998_A0_RX_REASON_MPLS_ALERT_LABEL}, \
+    {"CPU_IPMC_INTERFACE_MISMATCH", BCM56998_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \
+    {"DLB_MONITOR", BCM56998_A0_RX_REASON_DLB_MONITOR}, \
+    {"INT_TURN_AROUND", BCM56998_A0_RX_REASON_INT_TURN_AROUND}, \
+    {"ETRAP_MONITOR", BCM56998_A0_RX_REASON_ETRAP_MONITOR}, \
+    {"SRV6_ERROR", BCM56998_A0_RX_REASON_SRV6_ERROR}, \
+    {"VXLAN_VN_ID_MISS", BCM56998_A0_RX_REASON_VXLAN_VN_ID_MISS}, \
+    {"VXLAN_SIP_MISS", BCM56998_A0_RX_REASON_VXLAN_SIP_MISS}, \
+    {"ADAPT_MISS", BCM56998_A0_RX_REASON_ADAPT_MISS}, \
+    {"NH_PROTO_STATUS_DOWN", BCM56998_A0_RX_REASON_NH_PROTO_STATUS_DOWN}, \
+    {"COUNT", BCM56998_A0_RX_REASON_COUNT}
+
+/*!
+ * \name BCM56998_A0_RX_REASON_CPU_SFLOW encodings.
+ * \anchor BCM56998_A0_RX_REASON_CPU_SFLOW_XXX
+ */
+/*! \{ */
+#define BCM56998_A0_RX_REASON_CPU_SFLOW_INVALID                      0
+#define BCM56998_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX               1
+#define BCM56998_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST                2
+#define BCM56998_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC                3
+/*! \} */
+
+/*! BCM56998_A0_RX_REASON_CPU_SFLOW encoding name strings maps. */
+#define BCM56998_A0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT \
+    {"INVALID", BCM56998_A0_RX_REASON_CPU_SFLOW_INVALID},\
+    {"CPU_SFLOW_FLEX", BCM56998_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX},\
+    {"CPU_SFLOW_DST", BCM56998_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST},\
+    {"CPU_SFLOW_SRC", BCM56998_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56998_A0_RX_REASON_MPLS_PROC_ERROR encodings.
+ * \anchor BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_XXX
+ */
+/*! \{ */
+#define BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_NOP                    0
+#define BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD        1
+#define BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION         2
+#define BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS             3
+#define BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL         4
+/*! \} */
+
+/*! BCM56998_A0_RX_REASON_MPLS_PROC_ERROR encoding name strings maps. */
+#define BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT \
+    {"NOP", BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_NOP},\
+    {"INVALID_PAYLOAD", BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD},\
+    {"INVALID_ACTION", BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION},\
+    {"LABEL_MISS", BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS},\
+    {"TTL_CHECK_FAIL", BCM56998_A0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL},\
+    {NULL, 0}
+
+/* TXPMD defines */
+#define BCM56998_A0_TXPMD_CELL_LENGTH                                0
+#define BCM56998_A0_TXPMD_EOP                                        1
+#define BCM56998_A0_TXPMD_SOP                                        2
+#define BCM56998_A0_TXPMD_PKT_LENGTH                                 3
+#define BCM56998_A0_TXPMD_IPCF_PTR                                   4
+#define BCM56998_A0_TXPMD_SRC_MODID                                  5
+#define BCM56998_A0_TXPMD_COS                                        6
+#define BCM56998_A0_TXPMD_UNICAST                                    7
+#define BCM56998_A0_TXPMD_SET_L2BM                                   8
+#define BCM56998_A0_TXPMD_RQE_Q_NUM                                  9
+#define BCM56998_A0_TXPMD_SPAP                                       10
+#define BCM56998_A0_TXPMD_SPID                                       11
+#define BCM56998_A0_TXPMD_SPID_OVERRIDE                              12
+#define BCM56998_A0_TXPMD_INPUT_PRI                                  13
+#define BCM56998_A0_TXPMD_LOCAL_DEST_PORT                            14
+#define BCM56998_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET              15
+#define BCM56998_A0_TXPMD_TX_TS                                      16
+#define BCM56998_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN            17
+#define BCM56998_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM                18
+#define BCM56998_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE                   19
+#define BCM56998_A0_TXPMD_CELL_ERROR                                 20
+#define BCM56998_A0_TXPMD_HEADER_TYPE                                21
+#define BCM56998_A0_TXPMD_START                                      22
+#define BCM56998_A0_TXPMD_COUNT                                      23
+
+/* TXPMD name map */
+#define BCM56998_A0_TXPMD_NAME_MAP_INIT \
+    {"CELL_LENGTH", BCM56998_A0_TXPMD_CELL_LENGTH}, \
+    {"EOP", BCM56998_A0_TXPMD_EOP}, \
+    {"SOP", BCM56998_A0_TXPMD_SOP}, \
+    {"PKT_LENGTH", BCM56998_A0_TXPMD_PKT_LENGTH}, \
+    {"IPCF_PTR", BCM56998_A0_TXPMD_IPCF_PTR}, \
+    {"SRC_MODID", BCM56998_A0_TXPMD_SRC_MODID}, \
+    {"COS", BCM56998_A0_TXPMD_COS}, \
+    {"UNICAST", BCM56998_A0_TXPMD_UNICAST}, \
+    {"SET_L2BM", BCM56998_A0_TXPMD_SET_L2BM}, \
+    {"RQE_Q_NUM", BCM56998_A0_TXPMD_RQE_Q_NUM}, \
+    {"SPAP", BCM56998_A0_TXPMD_SPAP}, \
+    {"SPID", BCM56998_A0_TXPMD_SPID}, \
+    {"SPID_OVERRIDE", BCM56998_A0_TXPMD_SPID_OVERRIDE}, \
+    {"INPUT_PRI", BCM56998_A0_TXPMD_INPUT_PRI}, \
+    {"LOCAL_DEST_PORT", BCM56998_A0_TXPMD_LOCAL_DEST_PORT}, \
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM56998_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"TX_TS", BCM56998_A0_TXPMD_TX_TS}, \
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM56998_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCM56998_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"IEEE1588_ONE_STEP_ENABLE", BCM56998_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \
+    {"CELL_ERROR", BCM56998_A0_TXPMD_CELL_ERROR}, \
+    {"HEADER_TYPE", BCM56998_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM56998_A0_TXPMD_START}, \
+    {"COUNT", BCM56998_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM56998_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM56998_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56998_A0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM56998_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU                 1
+/*! \} */
+
+/*! BCM56998_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM56998_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56998_A0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_CPU", BCM56998_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56998_A0_TXPMD_START encodings.
+ * \anchor BCM56998_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM56998_A0_TXPMD_START_RESERVED_0                           0
+#define BCM56998_A0_TXPMD_START_RESERVED_1                           1
+#define BCM56998_A0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM56998_A0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM56998_A0_TXPMD_START encoding name strings maps. */
+#define BCM56998_A0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56998_A0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM56998_A0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM56998_A0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM56998_A0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+/* LBHDR defines */
+#define BCM56998_A0_LBHDR_ETHERNET_PP_PORT                           0
+#define BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE                      1
+#define BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE                  2
+#define BCM56998_A0_LBHDR_ETHERNET_DESTINATION                       3
+#define BCM56998_A0_LBHDR_ETHERNET_ROUTED_PKT                        4
+#define BCM56998_A0_LBHDR_ETHERNET_QOS_FIELDS_VLD                    5
+#define BCM56998_A0_LBHDR_ETHERNET_INT_CN                            6
+#define BCM56998_A0_LBHDR_ETHERNET_INT_PRI                           7
+#define BCM56998_A0_LBHDR_ETHERNET_DP                                8
+#define BCM56998_A0_LBHDR_ETHERNET_ECMP_MEMBER_ID                    9
+#define BCM56998_A0_LBHDR_ETHERNET_VRF                               10
+#define BCM56998_A0_LBHDR_ETHERNET_VRF_VALID                         11
+#define BCM56998_A0_LBHDR_ETHERNET_MCAST_LB_INDEX                    12
+#define BCM56998_A0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD                13
+#define BCM56998_A0_LBHDR_TRILL_ACCESS_NONUC_TC                      14
+#define BCM56998_A0_LBHDR_TRILL_ACCESS_NONUC_CNG                     15
+#define BCM56998_A0_LBHDR_TRILL_NETWORK_NONUC_TC                     16
+#define BCM56998_A0_LBHDR_TRILL_NETWORK_NONUC_CNG                    17
+#define BCM56998_A0_LBHDR_PKT_PROFILE                                18
+#define BCM56998_A0_LBHDR_VISIBILITY_PKT                             19
+#define BCM56998_A0_LBHDR_SOURCE                                     20
+#define BCM56998_A0_LBHDR_SOURCE_TYPE                                21
+#define BCM56998_A0_LBHDR_HEADER_TYPE                                22
+#define BCM56998_A0_LBHDR_INPUT_PRIORITY                             23
+#define BCM56998_A0_LBHDR_START                                      24
+#define BCM56998_A0_LBHDR_COUNT                                      25
+
+/* LBHDR name map */
+#define BCM56998_A0_LBHDR_NAME_MAP_INIT \
+    {"ETHERNET::PP_PORT", BCM56998_A0_LBHDR_ETHERNET_PP_PORT}, \
+    {"ETHERNET::SUBFLOW_TYPE", BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE}, \
+    {"ETHERNET::DESTINATION_TYPE", BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE}, \
+    {"ETHERNET::DESTINATION", BCM56998_A0_LBHDR_ETHERNET_DESTINATION}, \
+    {"ETHERNET::ROUTED_PKT", BCM56998_A0_LBHDR_ETHERNET_ROUTED_PKT}, \
+    {"ETHERNET::QOS_FIELDS_VLD", BCM56998_A0_LBHDR_ETHERNET_QOS_FIELDS_VLD}, \
+    {"ETHERNET::INT_CN", BCM56998_A0_LBHDR_ETHERNET_INT_CN}, \
+    {"ETHERNET::INT_PRI", BCM56998_A0_LBHDR_ETHERNET_INT_PRI}, \
+    {"ETHERNET::DP", BCM56998_A0_LBHDR_ETHERNET_DP}, \
+    {"ETHERNET::ECMP_MEMBER_ID", BCM56998_A0_LBHDR_ETHERNET_ECMP_MEMBER_ID}, \
+    {"ETHERNET::VRF", BCM56998_A0_LBHDR_ETHERNET_VRF}, \
+    {"ETHERNET::VRF_VALID", BCM56998_A0_LBHDR_ETHERNET_VRF_VALID}, \
+    {"ETHERNET::MCAST_LB_INDEX", BCM56998_A0_LBHDR_ETHERNET_MCAST_LB_INDEX}, \
+    {"ETHERNET::MCAST_LB_INDEX_VLD", BCM56998_A0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD}, \
+    {"TRILL_ACCESS_NONUC::TC", BCM56998_A0_LBHDR_TRILL_ACCESS_NONUC_TC}, \
+    {"TRILL_ACCESS_NONUC::CNG", BCM56998_A0_LBHDR_TRILL_ACCESS_NONUC_CNG}, \
+    {"TRILL_NETWORK_NONUC::TC", BCM56998_A0_LBHDR_TRILL_NETWORK_NONUC_TC}, \
+    {"TRILL_NETWORK_NONUC::CNG", BCM56998_A0_LBHDR_TRILL_NETWORK_NONUC_CNG}, \
+    {"PKT_PROFILE", BCM56998_A0_LBHDR_PKT_PROFILE}, \
+    {"VISIBILITY_PKT", BCM56998_A0_LBHDR_VISIBILITY_PKT}, \
+    {"SOURCE", BCM56998_A0_LBHDR_SOURCE}, \
+    {"SOURCE_TYPE", BCM56998_A0_LBHDR_SOURCE_TYPE}, \
+    {"HEADER_TYPE", BCM56998_A0_LBHDR_HEADER_TYPE}, \
+    {"INPUT_PRIORITY", BCM56998_A0_LBHDR_INPUT_PRIORITY}, \
+    {"START", BCM56998_A0_LBHDR_START}, \
+    {"COUNT", BCM56998_A0_LBHDR_COUNT}
+
+/*!
+ * \name BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE encodings.
+ * \anchor BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE       0
+#define BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC          1
+#define BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2           2
+#define BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3           3
+/*! \} */
+
+/*! BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE encoding name strings maps. */
+#define BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT \
+    {"CPU_MASQUERADE", BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE},\
+    {"CPU_TX_PROC", BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC},\
+    {"RESERVED_2", BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2},\
+    {"RESERVED_3", BCM56998_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE encodings.
+ * \anchor BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP             0
+#define BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI              1
+#define BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP             2
+#define BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER      3
+#define BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC             4
+#define BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC             5
+#define BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD       6
+/*! \} */
+
+/*! BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE encoding name strings maps. */
+#define BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"DGLP", BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP},\
+    {"NHI", BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI},\
+    {"ECMP", BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP},\
+    {"ECMP_MEMBER", BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER},\
+    {"IPMC", BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC},\
+    {"L2MC", BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC},\
+    {"VLAN_FLOOD", BCM56998_A0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56998_A0_LBHDR_HEADER_TYPE encodings.
+ * \anchor BCM56998_A0_LBHDR_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56998_A0_LBHDR_HEADER_TYPE_TUNNEL_TERM                    0
+#define BCM56998_A0_LBHDR_HEADER_TYPE_TRILL_NW                       1
+#define BCM56998_A0_LBHDR_HEADER_TYPE_TRILL_AC                       2
+#define BCM56998_A0_LBHDR_HEADER_TYPE_ETHERNET                       3
+/*! \} */
+
+/*! BCM56998_A0_LBHDR_HEADER_TYPE encoding name strings maps. */
+#define BCM56998_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \
+    {"TUNNEL_TERM", BCM56998_A0_LBHDR_HEADER_TYPE_TUNNEL_TERM},\
+    {"TRILL_NW", BCM56998_A0_LBHDR_HEADER_TYPE_TRILL_NW},\
+    {"TRILL_AC", BCM56998_A0_LBHDR_HEADER_TYPE_TRILL_AC},\
+    {"ETHERNET", BCM56998_A0_LBHDR_HEADER_TYPE_ETHERNET},\
+    {NULL, 0}
+
+#endif /* BCM56998_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.h
new file mode 100644
index 00000000000..a1bbf33abe3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.h
@@ -0,0 +1,484 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM56999_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM56999_A0_PMD_FIELD_H
+#define BCM56999_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM56999_A0_RXPMD_ING_L3_INTF                                0
+#define BCM56999_A0_RXPMD_I2E_CLASSID                                1
+#define BCM56999_A0_RXPMD_RX_BFD_SESSION_INDEX                       2
+#define BCM56999_A0_RXPMD_I2E_CLASSID_TYPE                           3
+#define BCM56999_A0_RXPMD_RX_BFD_START_OFFSET_TYPE                   4
+#define BCM56999_A0_RXPMD_RX_BFD_START_OFFSET                        5
+#define BCM56999_A0_RXPMD_ING_L3_INTF_VALID                          6
+#define BCM56999_A0_RXPMD_CPU_COS                                    7
+#define BCM56999_A0_RXPMD_QUEUE_NUM                                  8
+#define BCM56999_A0_RXPMD_BPDU                                       9
+#define BCM56999_A0_RXPMD_CHANGE_DSCP                                10
+#define BCM56999_A0_RXPMD_CHANGE_ECN                                 11
+#define BCM56999_A0_RXPMD_DLB_ID_VALID                               12
+#define BCM56999_A0_RXPMD_REASON                                     13
+#define BCM56999_A0_RXPMD_REASON_TYPE                                14
+#define BCM56999_A0_RXPMD_DO_NOT_CHANGE_TTL                          15
+#define BCM56999_A0_RXPMD_DSCP                                       16
+#define BCM56999_A0_RXPMD_SPECIAL_PACKET_TYPE                        17
+#define BCM56999_A0_RXPMD_ECN                                        18
+#define BCM56999_A0_RXPMD_INCOMING_TAG_STATUS                        19
+#define BCM56999_A0_RXPMD_O_NHI                                      20
+#define BCM56999_A0_RXPMD_ING_OTAG_ACTION                            21
+#define BCM56999_A0_RXPMD_IP_ROUTED                                  22
+#define BCM56999_A0_RXPMD_L3ONLY                                     23
+#define BCM56999_A0_RXPMD_MATCHED_RULE                               24
+#define BCM56999_A0_RXPMD_MTP_INDEX                                  25
+#define BCM56999_A0_RXPMD_OUTER_CFI                                  26
+#define BCM56999_A0_RXPMD_OUTER_PRI                                  27
+#define BCM56999_A0_RXPMD_OUTER_VID                                  28
+#define BCM56999_A0_RXPMD_INCOMING_INT_HDR_TYPE                      29
+#define BCM56999_A0_RXPMD_PKT_LENGTH                                 30
+#define BCM56999_A0_RXPMD_REGEN_CRC                                  31
+#define BCM56999_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  32
+#define BCM56999_A0_RXPMD_ENTROPY_LABEL                              33
+#define BCM56999_A0_RXPMD_SPECIAL_PACKET_INDICATOR                   34
+#define BCM56999_A0_RXPMD_SRC_PORT_NUM                               35
+#define BCM56999_A0_RXPMD_SWITCH                                     36
+#define BCM56999_A0_RXPMD_TIMESTAMP                                  37
+#define BCM56999_A0_RXPMD_TIMESTAMP_HI                               38
+#define BCM56999_A0_RXPMD_TIMESTAMP_TYPE                             39
+#define BCM56999_A0_RXPMD_TUNNEL_DECAP_TYPE                          40
+#define BCM56999_A0_RXPMD_UC_SW_COPY_DROPPED                         41
+#define BCM56999_A0_RXPMD_UNICAST_QUEUE                              42
+#define BCM56999_A0_RXPMD_DLB_ID                                     43
+#define BCM56999_A0_RXPMD_MODULE_HDR                                 44
+#define BCM56999_A0_RXPMD_COUNT                                      45
+
+/* RXPMD name map */
+#define BCM56999_A0_RXPMD_NAME_MAP_INIT \
+    {"ING_L3_INTF", BCM56999_A0_RXPMD_ING_L3_INTF}, \
+    {"I2E_CLASSID", BCM56999_A0_RXPMD_I2E_CLASSID}, \
+    {"RX_BFD_SESSION_INDEX", BCM56999_A0_RXPMD_RX_BFD_SESSION_INDEX}, \
+    {"I2E_CLASSID_TYPE", BCM56999_A0_RXPMD_I2E_CLASSID_TYPE}, \
+    {"RX_BFD_START_OFFSET_TYPE", BCM56999_A0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \
+    {"RX_BFD_START_OFFSET", BCM56999_A0_RXPMD_RX_BFD_START_OFFSET}, \
+    {"ING_L3_INTF_VALID", BCM56999_A0_RXPMD_ING_L3_INTF_VALID}, \
+    {"CPU_COS", BCM56999_A0_RXPMD_CPU_COS}, \
+    {"QUEUE_NUM", BCM56999_A0_RXPMD_QUEUE_NUM}, \
+    {"BPDU", BCM56999_A0_RXPMD_BPDU}, \
+    {"CHANGE_DSCP", BCM56999_A0_RXPMD_CHANGE_DSCP}, \
+    {"CHANGE_ECN", BCM56999_A0_RXPMD_CHANGE_ECN}, \
+    {"DLB_ID_VALID", BCM56999_A0_RXPMD_DLB_ID_VALID}, \
+    {"REASON", BCM56999_A0_RXPMD_REASON}, \
+    {"REASON_TYPE", BCM56999_A0_RXPMD_REASON_TYPE}, \
+    {"DO_NOT_CHANGE_TTL", BCM56999_A0_RXPMD_DO_NOT_CHANGE_TTL}, \
+    {"DSCP", BCM56999_A0_RXPMD_DSCP}, \
+    {"SPECIAL_PACKET_TYPE", BCM56999_A0_RXPMD_SPECIAL_PACKET_TYPE}, \
+    {"ECN", BCM56999_A0_RXPMD_ECN}, \
+    {"INCOMING_TAG_STATUS", BCM56999_A0_RXPMD_INCOMING_TAG_STATUS}, \
+    {"O_NHI", BCM56999_A0_RXPMD_O_NHI}, \
+    {"ING_OTAG_ACTION", BCM56999_A0_RXPMD_ING_OTAG_ACTION}, \
+    {"IP_ROUTED", BCM56999_A0_RXPMD_IP_ROUTED}, \
+    {"L3ONLY", BCM56999_A0_RXPMD_L3ONLY}, \
+    {"MATCHED_RULE", BCM56999_A0_RXPMD_MATCHED_RULE}, \
+    {"MTP_INDEX", BCM56999_A0_RXPMD_MTP_INDEX}, \
+    {"OUTER_CFI", BCM56999_A0_RXPMD_OUTER_CFI}, \
+    {"OUTER_PRI", BCM56999_A0_RXPMD_OUTER_PRI}, \
+    {"OUTER_VID", BCM56999_A0_RXPMD_OUTER_VID}, \
+    {"INCOMING_INT_HDR_TYPE", BCM56999_A0_RXPMD_INCOMING_INT_HDR_TYPE}, \
+    {"PKT_LENGTH", BCM56999_A0_RXPMD_PKT_LENGTH}, \
+    {"REGEN_CRC", BCM56999_A0_RXPMD_REGEN_CRC}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM56999_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"ENTROPY_LABEL", BCM56999_A0_RXPMD_ENTROPY_LABEL}, \
+    {"SPECIAL_PACKET_INDICATOR", BCM56999_A0_RXPMD_SPECIAL_PACKET_INDICATOR}, \
+    {"SRC_PORT_NUM", BCM56999_A0_RXPMD_SRC_PORT_NUM}, \
+    {"SWITCH", BCM56999_A0_RXPMD_SWITCH}, \
+    {"TIMESTAMP", BCM56999_A0_RXPMD_TIMESTAMP}, \
+    {"TIMESTAMP_HI", BCM56999_A0_RXPMD_TIMESTAMP_HI}, \
+    {"TIMESTAMP_TYPE", BCM56999_A0_RXPMD_TIMESTAMP_TYPE}, \
+    {"TUNNEL_DECAP_TYPE", BCM56999_A0_RXPMD_TUNNEL_DECAP_TYPE}, \
+    {"UC_SW_COPY_DROPPED", BCM56999_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"UNICAST_QUEUE", BCM56999_A0_RXPMD_UNICAST_QUEUE}, \
+    {"DLB_ID", BCM56999_A0_RXPMD_DLB_ID}, \
+    {"MODULE_HDR", BCM56999_A0_RXPMD_MODULE_HDR}, \
+    {"COUNT", BCM56999_A0_RXPMD_COUNT}
+
+/*!
+ * \name BCM56999_A0_RXPMD_TIMESTAMP_TYPE encodings.
+ * \anchor BCM56999_A0_RXPMD_TIMESTAMP_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56999_A0_RXPMD_TIMESTAMP_TYPE_INVALID                     0
+#define BCM56999_A0_RXPMD_TIMESTAMP_TYPE_OAM_LM                      1
+#define BCM56999_A0_RXPMD_TIMESTAMP_TYPE_OAM_DM                      2
+#define BCM56999_A0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS                3
+/*! \} */
+
+/*! BCM56999_A0_RXPMD_TIMESTAMP_TYPE encoding name strings maps. */
+#define BCM56999_A0_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT \
+    {"INVALID", BCM56999_A0_RXPMD_TIMESTAMP_TYPE_INVALID},\
+    {"OAM_LM", BCM56999_A0_RXPMD_TIMESTAMP_TYPE_OAM_LM},\
+    {"OAM_DM", BCM56999_A0_RXPMD_TIMESTAMP_TYPE_OAM_DM},\
+    {"IEEE_802_1AS", BCM56999_A0_RXPMD_TIMESTAMP_TYPE_IEEE_802_1AS},\
+    {NULL, 0}
+
+/* RX_REASON defines */
+#define BCM56999_A0_RX_REASON_CPU_UVLAN                              0
+#define BCM56999_A0_RX_REASON_CPU_SLF                                1
+#define BCM56999_A0_RX_REASON_CPU_DLF                                2
+#define BCM56999_A0_RX_REASON_CPU_L2MOVE                             3
+#define BCM56999_A0_RX_REASON_CPU_L2CPU                              4
+#define BCM56999_A0_RX_REASON_CPU_L3SRC_MISS                         5
+#define BCM56999_A0_RX_REASON_CPU_L3DST_MISS                         6
+#define BCM56999_A0_RX_REASON_CPU_L3SRC_MOVE                         7
+#define BCM56999_A0_RX_REASON_CPU_MC_MISS                            8
+#define BCM56999_A0_RX_REASON_CPU_IPMC_MISS                          9
+#define BCM56999_A0_RX_REASON_CPU_FFP                                10
+#define BCM56999_A0_RX_REASON_CPU_L3HDR_ERR                          11
+#define BCM56999_A0_RX_REASON_CPU_PROTOCOL_PKT                       12
+#define BCM56999_A0_RX_REASON_CPU_DOS_ATTACK                         13
+#define BCM56999_A0_RX_REASON_CPU_MARTIAN_ADDR                       14
+#define BCM56999_A0_RX_REASON_CPU_TUNNEL_ERR                         15
+#define BCM56999_A0_RX_REASON_CPU_SFLOW                              16
+#define BCM56999_A0_RX_REASON_ICMP_REDIRECT                          17
+#define BCM56999_A0_RX_REASON_L3_SLOWPATH                            18
+#define BCM56999_A0_RX_REASON_PARITY_ERROR                           19
+#define BCM56999_A0_RX_REASON_L3_MTU_CHECK_FAIL                      20
+#define BCM56999_A0_RX_REASON_MCIDX_ERROR                            21
+#define BCM56999_A0_RX_REASON_CPU_VFP                                22
+#define BCM56999_A0_RX_REASON_MPLS_PROC_ERROR                        23
+#define BCM56999_A0_RX_REASON_PBT_NONUC_PKT                          24
+#define BCM56999_A0_RX_REASON_L3_NEXT_HOP                            25
+#define BCM56999_A0_RX_REASON_MY_STATION                             26
+#define BCM56999_A0_RX_REASON_TIME_SYNC                              27
+#define BCM56999_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR                 28
+#define BCM56999_A0_RX_REASON_BFD_SLOWPATH                           29
+#define BCM56999_A0_RX_REASON_BFD_ERROR                              30
+#define BCM56999_A0_RX_REASON_PACKET_TRACE_TO_CPU                    31
+#define BCM56999_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT               32
+#define BCM56999_A0_RX_REASON_MPLS_ALERT_LABEL                       33
+#define BCM56999_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH            34
+#define BCM56999_A0_RX_REASON_DLB_MONITOR                            35
+#define BCM56999_A0_RX_REASON_INT_TURN_AROUND                        36
+#define BCM56999_A0_RX_REASON_ETRAP_MONITOR                          37
+#define BCM56999_A0_RX_REASON_SRV6_ERROR                             38
+#define BCM56999_A0_RX_REASON_VXLAN_VN_ID_MISS                       39
+#define BCM56999_A0_RX_REASON_VXLAN_SIP_MISS                         40
+#define BCM56999_A0_RX_REASON_ADAPT_MISS                             41
+#define BCM56999_A0_RX_REASON_COUNT                                  42
+
+/* RX_REASON name map */
+#define BCM56999_A0_RX_REASON_NAME_MAP_INIT \
+    {"CPU_UVLAN", BCM56999_A0_RX_REASON_CPU_UVLAN}, \
+    {"CPU_SLF", BCM56999_A0_RX_REASON_CPU_SLF}, \
+    {"CPU_DLF", BCM56999_A0_RX_REASON_CPU_DLF}, \
+    {"CPU_L2MOVE", BCM56999_A0_RX_REASON_CPU_L2MOVE}, \
+    {"CPU_L2CPU", BCM56999_A0_RX_REASON_CPU_L2CPU}, \
+    {"CPU_L3SRC_MISS", BCM56999_A0_RX_REASON_CPU_L3SRC_MISS}, \
+    {"CPU_L3DST_MISS", BCM56999_A0_RX_REASON_CPU_L3DST_MISS}, \
+    {"CPU_L3SRC_MOVE", BCM56999_A0_RX_REASON_CPU_L3SRC_MOVE}, \
+    {"CPU_MC_MISS", BCM56999_A0_RX_REASON_CPU_MC_MISS}, \
+    {"CPU_IPMC_MISS", BCM56999_A0_RX_REASON_CPU_IPMC_MISS}, \
+    {"CPU_FFP", BCM56999_A0_RX_REASON_CPU_FFP}, \
+    {"CPU_L3HDR_ERR", BCM56999_A0_RX_REASON_CPU_L3HDR_ERR}, \
+    {"CPU_PROTOCOL_PKT", BCM56999_A0_RX_REASON_CPU_PROTOCOL_PKT}, \
+    {"CPU_DOS_ATTACK", BCM56999_A0_RX_REASON_CPU_DOS_ATTACK}, \
+    {"CPU_MARTIAN_ADDR", BCM56999_A0_RX_REASON_CPU_MARTIAN_ADDR}, \
+    {"CPU_TUNNEL_ERR", BCM56999_A0_RX_REASON_CPU_TUNNEL_ERR}, \
+    {"CPU_SFLOW", BCM56999_A0_RX_REASON_CPU_SFLOW}, \
+    {"ICMP_REDIRECT", BCM56999_A0_RX_REASON_ICMP_REDIRECT}, \
+    {"L3_SLOWPATH", BCM56999_A0_RX_REASON_L3_SLOWPATH}, \
+    {"PARITY_ERROR", BCM56999_A0_RX_REASON_PARITY_ERROR}, \
+    {"L3_MTU_CHECK_FAIL", BCM56999_A0_RX_REASON_L3_MTU_CHECK_FAIL}, \
+    {"MCIDX_ERROR", BCM56999_A0_RX_REASON_MCIDX_ERROR}, \
+    {"CPU_VFP", BCM56999_A0_RX_REASON_CPU_VFP}, \
+    {"MPLS_PROC_ERROR", BCM56999_A0_RX_REASON_MPLS_PROC_ERROR}, \
+    {"PBT_NONUC_PKT", BCM56999_A0_RX_REASON_PBT_NONUC_PKT}, \
+    {"L3_NEXT_HOP", BCM56999_A0_RX_REASON_L3_NEXT_HOP}, \
+    {"MY_STATION", BCM56999_A0_RX_REASON_MY_STATION}, \
+    {"TIME_SYNC", BCM56999_A0_RX_REASON_TIME_SYNC}, \
+    {"TUNNEL_DECAP_ECN_ERROR", BCM56999_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \
+    {"BFD_SLOWPATH", BCM56999_A0_RX_REASON_BFD_SLOWPATH}, \
+    {"BFD_ERROR", BCM56999_A0_RX_REASON_BFD_ERROR}, \
+    {"PACKET_TRACE_TO_CPU", BCM56999_A0_RX_REASON_PACKET_TRACE_TO_CPU}, \
+    {"MPLS_UNKNOWN_CONTROL_PKT", BCM56999_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \
+    {"MPLS_ALERT_LABEL", BCM56999_A0_RX_REASON_MPLS_ALERT_LABEL}, \
+    {"CPU_IPMC_INTERFACE_MISMATCH", BCM56999_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \
+    {"DLB_MONITOR", BCM56999_A0_RX_REASON_DLB_MONITOR}, \
+    {"INT_TURN_AROUND", BCM56999_A0_RX_REASON_INT_TURN_AROUND}, \
+    {"ETRAP_MONITOR", BCM56999_A0_RX_REASON_ETRAP_MONITOR}, \
+    {"SRV6_ERROR", BCM56999_A0_RX_REASON_SRV6_ERROR}, \
+    {"VXLAN_VN_ID_MISS", BCM56999_A0_RX_REASON_VXLAN_VN_ID_MISS}, \
+    {"VXLAN_SIP_MISS", BCM56999_A0_RX_REASON_VXLAN_SIP_MISS}, \
+    {"ADAPT_MISS", BCM56999_A0_RX_REASON_ADAPT_MISS}, \
+    {"COUNT", BCM56999_A0_RX_REASON_COUNT}
+
+/*!
+ * \name BCM56999_A0_RX_REASON_CPU_SFLOW encodings.
+ * \anchor BCM56999_A0_RX_REASON_CPU_SFLOW_XXX
+ */
+/*! \{ */
+#define BCM56999_A0_RX_REASON_CPU_SFLOW_INVALID                      0
+#define BCM56999_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX               1
+#define BCM56999_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST                2
+#define BCM56999_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC                3
+/*! \} */
+
+/*! BCM56999_A0_RX_REASON_CPU_SFLOW encoding name strings maps. */
+#define BCM56999_A0_RX_REASON_CPU_SFLOW_NAME_MAP_INIT \
+    {"INVALID", BCM56999_A0_RX_REASON_CPU_SFLOW_INVALID},\
+    {"CPU_SFLOW_FLEX", BCM56999_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX},\
+    {"CPU_SFLOW_DST", BCM56999_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST},\
+    {"CPU_SFLOW_SRC", BCM56999_A0_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56999_A0_RX_REASON_MPLS_PROC_ERROR encodings.
+ * \anchor BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_XXX
+ */
+/*! \{ */
+#define BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_NOP                    0
+#define BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD        1
+#define BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION         2
+#define BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS             3
+#define BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL         4
+/*! \} */
+
+/*! BCM56999_A0_RX_REASON_MPLS_PROC_ERROR encoding name strings maps. */
+#define BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_NAME_MAP_INIT \
+    {"NOP", BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_NOP},\
+    {"INVALID_PAYLOAD", BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD},\
+    {"INVALID_ACTION", BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION},\
+    {"LABEL_MISS", BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS},\
+    {"TTL_CHECK_FAIL", BCM56999_A0_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL},\
+    {NULL, 0}
+
+/* TXPMD defines */
+#define BCM56999_A0_TXPMD_CELL_LENGTH                                0
+#define BCM56999_A0_TXPMD_EOP                                        1
+#define BCM56999_A0_TXPMD_SOP                                        2
+#define BCM56999_A0_TXPMD_PKT_LENGTH                                 3
+#define BCM56999_A0_TXPMD_IPCF_PTR                                   4
+#define BCM56999_A0_TXPMD_SRC_MODID                                  5
+#define BCM56999_A0_TXPMD_COS                                        6
+#define BCM56999_A0_TXPMD_UNICAST                                    7
+#define BCM56999_A0_TXPMD_SET_L2BM                                   8
+#define BCM56999_A0_TXPMD_RQE_Q_NUM                                  9
+#define BCM56999_A0_TXPMD_SPAP                                       10
+#define BCM56999_A0_TXPMD_SPID                                       11
+#define BCM56999_A0_TXPMD_SPID_OVERRIDE                              12
+#define BCM56999_A0_TXPMD_INPUT_PRI                                  13
+#define BCM56999_A0_TXPMD_LOCAL_DEST_PORT                            14
+#define BCM56999_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET              15
+#define BCM56999_A0_TXPMD_TX_TS                                      16
+#define BCM56999_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN            17
+#define BCM56999_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM                18
+#define BCM56999_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE                   19
+#define BCM56999_A0_TXPMD_CELL_ERROR                                 20
+#define BCM56999_A0_TXPMD_HEADER_TYPE                                21
+#define BCM56999_A0_TXPMD_START                                      22
+#define BCM56999_A0_TXPMD_COUNT                                      23
+
+/* TXPMD name map */
+#define BCM56999_A0_TXPMD_NAME_MAP_INIT \
+    {"CELL_LENGTH", BCM56999_A0_TXPMD_CELL_LENGTH}, \
+    {"EOP", BCM56999_A0_TXPMD_EOP}, \
+    {"SOP", BCM56999_A0_TXPMD_SOP}, \
+    {"PKT_LENGTH", BCM56999_A0_TXPMD_PKT_LENGTH}, \
+    {"IPCF_PTR", BCM56999_A0_TXPMD_IPCF_PTR}, \
+    {"SRC_MODID", BCM56999_A0_TXPMD_SRC_MODID}, \
+    {"COS", BCM56999_A0_TXPMD_COS}, \
+    {"UNICAST", BCM56999_A0_TXPMD_UNICAST}, \
+    {"SET_L2BM", BCM56999_A0_TXPMD_SET_L2BM}, \
+    {"RQE_Q_NUM", BCM56999_A0_TXPMD_RQE_Q_NUM}, \
+    {"SPAP", BCM56999_A0_TXPMD_SPAP}, \
+    {"SPID", BCM56999_A0_TXPMD_SPID}, \
+    {"SPID_OVERRIDE", BCM56999_A0_TXPMD_SPID_OVERRIDE}, \
+    {"INPUT_PRI", BCM56999_A0_TXPMD_INPUT_PRI}, \
+    {"LOCAL_DEST_PORT", BCM56999_A0_TXPMD_LOCAL_DEST_PORT}, \
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM56999_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"TX_TS", BCM56999_A0_TXPMD_TX_TS}, \
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM56999_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCM56999_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"IEEE1588_ONE_STEP_ENABLE", BCM56999_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \
+    {"CELL_ERROR", BCM56999_A0_TXPMD_CELL_ERROR}, \
+    {"HEADER_TYPE", BCM56999_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM56999_A0_TXPMD_START}, \
+    {"COUNT", BCM56999_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM56999_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM56999_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56999_A0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM56999_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU                 1
+/*! \} */
+
+/*! BCM56999_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM56999_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56999_A0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_CPU", BCM56999_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_CPU},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56999_A0_TXPMD_START encodings.
+ * \anchor BCM56999_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM56999_A0_TXPMD_START_RESERVED_0                           0
+#define BCM56999_A0_TXPMD_START_RESERVED_1                           1
+#define BCM56999_A0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM56999_A0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM56999_A0_TXPMD_START encoding name strings maps. */
+#define BCM56999_A0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM56999_A0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM56999_A0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM56999_A0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM56999_A0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+/* LBHDR defines */
+#define BCM56999_A0_LBHDR_ETHERNET_PP_PORT                           0
+#define BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE                      1
+#define BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE                  2
+#define BCM56999_A0_LBHDR_ETHERNET_DESTINATION                       3
+#define BCM56999_A0_LBHDR_ETHERNET_ROUTED_PKT                        4
+#define BCM56999_A0_LBHDR_ETHERNET_QOS_FIELDS_VLD                    5
+#define BCM56999_A0_LBHDR_ETHERNET_INT_CN                            6
+#define BCM56999_A0_LBHDR_ETHERNET_INT_PRI                           7
+#define BCM56999_A0_LBHDR_ETHERNET_DP                                8
+#define BCM56999_A0_LBHDR_ETHERNET_ECMP_MEMBER_ID                    9
+#define BCM56999_A0_LBHDR_ETHERNET_VRF                               10
+#define BCM56999_A0_LBHDR_ETHERNET_VRF_VALID                         11
+#define BCM56999_A0_LBHDR_ETHERNET_MCAST_LB_INDEX                    12
+#define BCM56999_A0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD                13
+#define BCM56999_A0_LBHDR_TRILL_ACCESS_NONUC_TC                      14
+#define BCM56999_A0_LBHDR_TRILL_ACCESS_NONUC_CNG                     15
+#define BCM56999_A0_LBHDR_TRILL_NETWORK_NONUC_TC                     16
+#define BCM56999_A0_LBHDR_TRILL_NETWORK_NONUC_CNG                    17
+#define BCM56999_A0_LBHDR_PKT_PROFILE                                18
+#define BCM56999_A0_LBHDR_VISIBILITY_PKT                             19
+#define BCM56999_A0_LBHDR_SOURCE                                     20
+#define BCM56999_A0_LBHDR_SOURCE_TYPE                                21
+#define BCM56999_A0_LBHDR_HEADER_TYPE                                22
+#define BCM56999_A0_LBHDR_INPUT_PRIORITY                             23
+#define BCM56999_A0_LBHDR_START                                      24
+#define BCM56999_A0_LBHDR_COUNT                                      25
+
+/* LBHDR name map */
+#define BCM56999_A0_LBHDR_NAME_MAP_INIT \
+    {"ETHERNET::PP_PORT", BCM56999_A0_LBHDR_ETHERNET_PP_PORT}, \
+    {"ETHERNET::SUBFLOW_TYPE", BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE}, \
+    {"ETHERNET::DESTINATION_TYPE", BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE}, \
+    {"ETHERNET::DESTINATION", BCM56999_A0_LBHDR_ETHERNET_DESTINATION}, \
+    {"ETHERNET::ROUTED_PKT", BCM56999_A0_LBHDR_ETHERNET_ROUTED_PKT}, \
+    {"ETHERNET::QOS_FIELDS_VLD", BCM56999_A0_LBHDR_ETHERNET_QOS_FIELDS_VLD}, \
+    {"ETHERNET::INT_CN", BCM56999_A0_LBHDR_ETHERNET_INT_CN}, \
+    {"ETHERNET::INT_PRI", BCM56999_A0_LBHDR_ETHERNET_INT_PRI}, \
+    {"ETHERNET::DP", BCM56999_A0_LBHDR_ETHERNET_DP}, \
+    {"ETHERNET::ECMP_MEMBER_ID", BCM56999_A0_LBHDR_ETHERNET_ECMP_MEMBER_ID}, \
+    {"ETHERNET::VRF", BCM56999_A0_LBHDR_ETHERNET_VRF}, \
+    {"ETHERNET::VRF_VALID", BCM56999_A0_LBHDR_ETHERNET_VRF_VALID}, \
+    {"ETHERNET::MCAST_LB_INDEX", BCM56999_A0_LBHDR_ETHERNET_MCAST_LB_INDEX}, \
+    {"ETHERNET::MCAST_LB_INDEX_VLD", BCM56999_A0_LBHDR_ETHERNET_MCAST_LB_INDEX_VLD}, \
+    {"TRILL_ACCESS_NONUC::TC", BCM56999_A0_LBHDR_TRILL_ACCESS_NONUC_TC}, \
+    {"TRILL_ACCESS_NONUC::CNG", BCM56999_A0_LBHDR_TRILL_ACCESS_NONUC_CNG}, \
+    {"TRILL_NETWORK_NONUC::TC", BCM56999_A0_LBHDR_TRILL_NETWORK_NONUC_TC}, \
+    {"TRILL_NETWORK_NONUC::CNG", BCM56999_A0_LBHDR_TRILL_NETWORK_NONUC_CNG}, \
+    {"PKT_PROFILE", BCM56999_A0_LBHDR_PKT_PROFILE}, \
+    {"VISIBILITY_PKT", BCM56999_A0_LBHDR_VISIBILITY_PKT}, \
+    {"SOURCE", BCM56999_A0_LBHDR_SOURCE}, \
+    {"SOURCE_TYPE", BCM56999_A0_LBHDR_SOURCE_TYPE}, \
+    {"HEADER_TYPE", BCM56999_A0_LBHDR_HEADER_TYPE}, \
+    {"INPUT_PRIORITY", BCM56999_A0_LBHDR_INPUT_PRIORITY}, \
+    {"START", BCM56999_A0_LBHDR_START}, \
+    {"COUNT", BCM56999_A0_LBHDR_COUNT}
+
+/*!
+ * \name BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE encodings.
+ * \anchor BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE       0
+#define BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC          1
+#define BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2           2
+#define BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3           3
+/*! \} */
+
+/*! BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE encoding name strings maps. */
+#define BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_NAME_MAP_INIT \
+    {"CPU_MASQUERADE", BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_MASQUERADE},\
+    {"CPU_TX_PROC", BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_CPU_TX_PROC},\
+    {"RESERVED_2", BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_2},\
+    {"RESERVED_3", BCM56999_A0_LBHDR_ETHERNET_SUBFLOW_TYPE_RESERVED_3},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE encodings.
+ * \anchor BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP             0
+#define BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI              1
+#define BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP             2
+#define BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER      3
+#define BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC             4
+#define BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC             5
+#define BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD       6
+/*! \} */
+
+/*! BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE encoding name strings maps. */
+#define BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"DGLP", BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_DGLP},\
+    {"NHI", BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_NHI},\
+    {"ECMP", BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP},\
+    {"ECMP_MEMBER", BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_ECMP_MEMBER},\
+    {"IPMC", BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_IPMC},\
+    {"L2MC", BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_L2MC},\
+    {"VLAN_FLOOD", BCM56999_A0_LBHDR_ETHERNET_DESTINATION_TYPE_VLAN_FLOOD},\
+    {NULL, 0}
+
+/*!
+ * \name BCM56999_A0_LBHDR_HEADER_TYPE encodings.
+ * \anchor BCM56999_A0_LBHDR_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM56999_A0_LBHDR_HEADER_TYPE_TUNNEL_TERM                    0
+#define BCM56999_A0_LBHDR_HEADER_TYPE_TRILL_NW                       1
+#define BCM56999_A0_LBHDR_HEADER_TYPE_TRILL_AC                       2
+#define BCM56999_A0_LBHDR_HEADER_TYPE_ETHERNET                       3
+/*! \} */
+
+/*! BCM56999_A0_LBHDR_HEADER_TYPE encoding name strings maps. */
+#define BCM56999_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \
+    {"TUNNEL_TERM", BCM56999_A0_LBHDR_HEADER_TYPE_TUNNEL_TERM},\
+    {"TRILL_NW", BCM56999_A0_LBHDR_HEADER_TYPE_TRILL_NW},\
+    {"TRILL_AC", BCM56999_A0_LBHDR_HEADER_TYPE_TRILL_AC},\
+    {"ETHERNET", BCM56999_A0_LBHDR_HEADER_TYPE_ETHERNET},\
+    {NULL, 0}
+
+#endif /* BCM56999_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.h
new file mode 100644
index 00000000000..832558e88ee
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.h
@@ -0,0 +1,188 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM78800_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM78800_A0_PMD_FIELD_H
+#define BCM78800_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM78800_A0_RXPMD_FLEX_DATA                                  0
+#define BCM78800_A0_RXPMD_MPB_FLEX_DATA_TYPE                         1
+#define BCM78800_A0_RXPMD_DOP_TRIGGER                                2
+#define BCM78800_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX 3
+#define BCM78800_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4                 4
+#define BCM78800_A0_RXPMD_INT_CN                                     5
+#define BCM78800_A0_RXPMD_CNG                                        6
+#define BCM78800_A0_RXPMD_MULTICAST                                  7
+#define BCM78800_A0_RXPMD_IP_ROUTED                                  8
+#define BCM78800_A0_RXPMD_COPY_TO_CPU                                9
+#define BCM78800_A0_RXPMD_SRC_PORT_NUM                               10
+#define BCM78800_A0_RXPMD_ARC_ID_LO                                  11
+#define BCM78800_A0_RXPMD_ARC_ID_HI                                  12
+#define BCM78800_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  13
+#define BCM78800_A0_RXPMD_DMA_HEADER_VERSION                         14
+#define BCM78800_A0_RXPMD_QUEUE_NUM                                  15
+#define BCM78800_A0_RXPMD_TRUNCATE_CPU_COPY                          16
+#define BCM78800_A0_RXPMD_EGR_ZONE_REMAP_CTRL                        17
+#define BCM78800_A0_RXPMD_SWITCH                                     18
+#define BCM78800_A0_RXPMD_L3ONLY                                     19
+#define BCM78800_A0_RXPMD_UC_SW_COPY_DROPPED                         20
+#define BCM78800_A0_RXPMD_PKT_LENGTH                                 21
+#define BCM78800_A0_RXPMD_COUNT                                      22
+
+/* RXPMD name map */
+#define BCM78800_A0_RXPMD_NAME_MAP_INIT \
+    {"FLEX_DATA", BCM78800_A0_RXPMD_FLEX_DATA}, \
+    {"MPB_FLEX_DATA_TYPE", BCM78800_A0_RXPMD_MPB_FLEX_DATA_TYPE}, \
+    {"DOP_TRIGGER", BCM78800_A0_RXPMD_DOP_TRIGGER}, \
+    {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX", BCM78800_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX}, \
+    {"EPARSE_EXTRACT_OFFSETS_6_4", BCM78800_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4}, \
+    {"INT_CN", BCM78800_A0_RXPMD_INT_CN}, \
+    {"CNG", BCM78800_A0_RXPMD_CNG}, \
+    {"MULTICAST", BCM78800_A0_RXPMD_MULTICAST}, \
+    {"IP_ROUTED", BCM78800_A0_RXPMD_IP_ROUTED}, \
+    {"COPY_TO_CPU", BCM78800_A0_RXPMD_COPY_TO_CPU}, \
+    {"SRC_PORT_NUM", BCM78800_A0_RXPMD_SRC_PORT_NUM}, \
+    {"ARC_ID_LO", BCM78800_A0_RXPMD_ARC_ID_LO}, \
+    {"ARC_ID_HI", BCM78800_A0_RXPMD_ARC_ID_HI}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM78800_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"DMA_HEADER_VERSION", BCM78800_A0_RXPMD_DMA_HEADER_VERSION}, \
+    {"QUEUE_NUM", BCM78800_A0_RXPMD_QUEUE_NUM}, \
+    {"TRUNCATE_CPU_COPY", BCM78800_A0_RXPMD_TRUNCATE_CPU_COPY}, \
+    {"EGR_ZONE_REMAP_CTRL", BCM78800_A0_RXPMD_EGR_ZONE_REMAP_CTRL}, \
+    {"SWITCH", BCM78800_A0_RXPMD_SWITCH}, \
+    {"L3ONLY", BCM78800_A0_RXPMD_L3ONLY}, \
+    {"UC_SW_COPY_DROPPED", BCM78800_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"PKT_LENGTH", BCM78800_A0_RXPMD_PKT_LENGTH}, \
+    {"COUNT", BCM78800_A0_RXPMD_COUNT}
+
+/* TXPMD defines */
+#define BCM78800_A0_TXPMD_CELL_LENGTH                                0
+#define BCM78800_A0_TXPMD_EOP                                        1
+#define BCM78800_A0_TXPMD_SOP                                        2
+#define BCM78800_A0_TXPMD_PKT_LENGTH                                 3
+#define BCM78800_A0_TXPMD_COPY_TO_CPU                                4
+#define BCM78800_A0_TXPMD_COPY_TO_DEBUG                              5
+#define BCM78800_A0_TXPMD_WRED_MARK_ELIGIBLE                         6
+#define BCM78800_A0_TXPMD_WRED_RESPONSIVE                            7
+#define BCM78800_A0_TXPMD_CNG                                        8
+#define BCM78800_A0_TXPMD_COS                                        9
+#define BCM78800_A0_TXPMD_UNICAST_PKT                                10
+#define BCM78800_A0_TXPMD_UNICAST                                    11
+#define BCM78800_A0_TXPMD_SET_L2BM                                   12
+#define BCM78800_A0_TXPMD_RQE_Q_NUM                                  13
+#define BCM78800_A0_TXPMD_SPAP                                       14
+#define BCM78800_A0_TXPMD_SPID                                       15
+#define BCM78800_A0_TXPMD_SPID_OVERRIDE                              16
+#define BCM78800_A0_TXPMD_INPUT_PRI                                  17
+#define BCM78800_A0_TXPMD_LOCAL_DEST_PORT                            18
+#define BCM78800_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET              19
+#define BCM78800_A0_TXPMD_TX_TS                                      20
+#define BCM78800_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN            21
+#define BCM78800_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM                22
+#define BCM78800_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE                   23
+#define BCM78800_A0_TXPMD_TS_ACTION_LSB                              24
+#define BCM78800_A0_TXPMD_CELL_ERROR                                 25
+#define BCM78800_A0_TXPMD_TS_ACTION_MSB                              26
+#define BCM78800_A0_TXPMD_TS_TYPE                                    27
+#define BCM78800_A0_TXPMD_DST_SUBPORT_NUM                            28
+#define BCM78800_A0_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE                 29
+#define BCM78800_A0_TXPMD_UDP_CHECKSUM_OFFSET                        30
+#define BCM78800_A0_TXPMD_HEADER_TYPE                                31
+#define BCM78800_A0_TXPMD_START                                      32
+#define BCM78800_A0_TXPMD_COUNT                                      33
+
+/* TXPMD name map */
+#define BCM78800_A0_TXPMD_NAME_MAP_INIT \
+    {"CELL_LENGTH", BCM78800_A0_TXPMD_CELL_LENGTH}, \
+    {"EOP", BCM78800_A0_TXPMD_EOP}, \
+    {"SOP", BCM78800_A0_TXPMD_SOP}, \
+    {"PKT_LENGTH", BCM78800_A0_TXPMD_PKT_LENGTH}, \
+    {"COPY_TO_CPU", BCM78800_A0_TXPMD_COPY_TO_CPU}, \
+    {"COPY_TO_DEBUG", BCM78800_A0_TXPMD_COPY_TO_DEBUG}, \
+    {"WRED_MARK_ELIGIBLE", BCM78800_A0_TXPMD_WRED_MARK_ELIGIBLE}, \
+    {"WRED_RESPONSIVE", BCM78800_A0_TXPMD_WRED_RESPONSIVE}, \
+    {"CNG", BCM78800_A0_TXPMD_CNG}, \
+    {"COS", BCM78800_A0_TXPMD_COS}, \
+    {"UNICAST_PKT", BCM78800_A0_TXPMD_UNICAST_PKT}, \
+    {"UNICAST", BCM78800_A0_TXPMD_UNICAST}, \
+    {"SET_L2BM", BCM78800_A0_TXPMD_SET_L2BM}, \
+    {"RQE_Q_NUM", BCM78800_A0_TXPMD_RQE_Q_NUM}, \
+    {"SPAP", BCM78800_A0_TXPMD_SPAP}, \
+    {"SPID", BCM78800_A0_TXPMD_SPID}, \
+    {"SPID_OVERRIDE", BCM78800_A0_TXPMD_SPID_OVERRIDE}, \
+    {"INPUT_PRI", BCM78800_A0_TXPMD_INPUT_PRI}, \
+    {"LOCAL_DEST_PORT", BCM78800_A0_TXPMD_LOCAL_DEST_PORT}, \
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM78800_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"TX_TS", BCM78800_A0_TXPMD_TX_TS}, \
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM78800_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCM78800_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"IEEE1588_ONE_STEP_ENABLE", BCM78800_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \
+    {"TS_ACTION_LSB", BCM78800_A0_TXPMD_TS_ACTION_LSB}, \
+    {"CELL_ERROR", BCM78800_A0_TXPMD_CELL_ERROR}, \
+    {"TS_ACTION_MSB", BCM78800_A0_TXPMD_TS_ACTION_MSB}, \
+    {"TS_TYPE", BCM78800_A0_TXPMD_TS_TYPE}, \
+    {"DST_SUBPORT_NUM", BCM78800_A0_TXPMD_DST_SUBPORT_NUM}, \
+    {"UDP_CHECKSUM_UPDATE_ENABLE", BCM78800_A0_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE}, \
+    {"UDP_CHECKSUM_OFFSET", BCM78800_A0_TXPMD_UDP_CHECKSUM_OFFSET}, \
+    {"HEADER_TYPE", BCM78800_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM78800_A0_TXPMD_START}, \
+    {"COUNT", BCM78800_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM78800_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM78800_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78800_A0_TXPMD_HEADER_TYPE_RESERVED_0                     0
+#define BCM78800_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_INTERNAL_PORT       1
+/*! \} */
+
+/*! BCM78800_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM78800_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED_0", BCM78800_A0_TXPMD_HEADER_TYPE_RESERVED_0},\
+    {"SOBMH_FROM_INTERNAL_PORT", BCM78800_A0_TXPMD_HEADER_TYPE_SOBMH_FROM_INTERNAL_PORT},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78800_A0_TXPMD_START encodings.
+ * \anchor BCM78800_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM78800_A0_TXPMD_START_RESERVED_0                           0
+#define BCM78800_A0_TXPMD_START_RESERVED_1                           1
+#define BCM78800_A0_TXPMD_START_INTERNAL_HEADER                      2
+#define BCM78800_A0_TXPMD_START_HIGIG                                3
+/*! \} */
+
+/*! BCM78800_A0_TXPMD_START encoding name strings maps. */
+#define BCM78800_A0_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_0", BCM78800_A0_TXPMD_START_RESERVED_0},\
+    {"RESERVED_1", BCM78800_A0_TXPMD_START_RESERVED_1},\
+    {"INTERNAL_HEADER", BCM78800_A0_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCM78800_A0_TXPMD_START_HIGIG},\
+    {NULL, 0}
+
+#endif /* BCM78800_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.h
new file mode 100644
index 00000000000..ee456eb9277
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.h
@@ -0,0 +1,522 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM78900_B0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM78900_B0_PMD_FIELD_H
+#define BCM78900_B0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM78900_B0_RXPMD_REASON                                     0
+#define BCM78900_B0_RXPMD_REASON_TYPE                                1
+#define BCM78900_B0_RXPMD_ING_L3_INTF                                2
+#define BCM78900_B0_RXPMD_I2E_CLASSID                                3
+#define BCM78900_B0_RXPMD_RX_BFD_SESSION_INDEX                       4
+#define BCM78900_B0_RXPMD_I2E_CLASSID_TYPE                           5
+#define BCM78900_B0_RXPMD_RX_BFD_START_OFFSET_TYPE                   6
+#define BCM78900_B0_RXPMD_RX_BFD_START_OFFSET                        7
+#define BCM78900_B0_RXPMD_ING_L3_INTF_VALID                          8
+#define BCM78900_B0_RXPMD_CPU_COS                                    9
+#define BCM78900_B0_RXPMD_QUEUE_NUM                                  10
+#define BCM78900_B0_RXPMD_INCOMING_TAG_STATUS                        11
+#define BCM78900_B0_RXPMD_ING_OTAG_ACTION                            12
+#define BCM78900_B0_RXPMD_PKT_LENGTH                                 13
+#define BCM78900_B0_RXPMD_O_NHI                                      14
+#define BCM78900_B0_RXPMD_INCOMING_OPAQUE_TAG_STATUS                 15
+#define BCM78900_B0_RXPMD_BPDU                                       16
+#define BCM78900_B0_RXPMD_CHANGE_DSCP                                17
+#define BCM78900_B0_RXPMD_CHANGE_ECN                                 18
+#define BCM78900_B0_RXPMD_DLB_ID_VALID                               19
+#define BCM78900_B0_RXPMD_DO_NOT_CHANGE_TTL                          20
+#define BCM78900_B0_RXPMD_DSCP                                       21
+#define BCM78900_B0_RXPMD_SPECIAL_PACKET_TYPE                        22
+#define BCM78900_B0_RXPMD_ECN                                        23
+#define BCM78900_B0_RXPMD_IP_ROUTED                                  24
+#define BCM78900_B0_RXPMD_L3ONLY                                     25
+#define BCM78900_B0_RXPMD_MATCHED_RULE                               26
+#define BCM78900_B0_RXPMD_MTP_INDEX                                  27
+#define BCM78900_B0_RXPMD_OUTER_CFI                                  28
+#define BCM78900_B0_RXPMD_OUTER_PRI                                  29
+#define BCM78900_B0_RXPMD_OUTER_VID                                  30
+#define BCM78900_B0_RXPMD_REPLICATION_OR_NHOP_INDEX                  31
+#define BCM78900_B0_RXPMD_REGEN_CRC                                  32
+#define BCM78900_B0_RXPMD_ENTROPY_LABEL                              33
+#define BCM78900_B0_RXPMD_SPECIAL_PACKET_INDICATOR                   34
+#define BCM78900_B0_RXPMD_SRC_PORT_NUM                               35
+#define BCM78900_B0_RXPMD_SWITCH                                     36
+#define BCM78900_B0_RXPMD_TIMESTAMP                                  37
+#define BCM78900_B0_RXPMD_TIMESTAMP_HI                               38
+#define BCM78900_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED             39
+#define BCM78900_B0_RXPMD_TUNNEL_DECAP_TYPE                          40
+#define BCM78900_B0_RXPMD_UC_SW_COPY_DROPPED                         41
+#define BCM78900_B0_RXPMD_UNICAST_QUEUE                              42
+#define BCM78900_B0_RXPMD_INCOMING_INT_HDR_TYPE                      43
+#define BCM78900_B0_RXPMD_DLB_ID                                     44
+#define BCM78900_B0_RXPMD_MODULE_HDR                                 45
+#define BCM78900_B0_RXPMD_COUNT                                      46
+
+/* RXPMD name map */
+#define BCM78900_B0_RXPMD_NAME_MAP_INIT \
+    {"REASON", BCM78900_B0_RXPMD_REASON}, \
+    {"REASON_TYPE", BCM78900_B0_RXPMD_REASON_TYPE}, \
+    {"ING_L3_INTF", BCM78900_B0_RXPMD_ING_L3_INTF}, \
+    {"I2E_CLASSID", BCM78900_B0_RXPMD_I2E_CLASSID}, \
+    {"RX_BFD_SESSION_INDEX", BCM78900_B0_RXPMD_RX_BFD_SESSION_INDEX}, \
+    {"I2E_CLASSID_TYPE", BCM78900_B0_RXPMD_I2E_CLASSID_TYPE}, \
+    {"RX_BFD_START_OFFSET_TYPE", BCM78900_B0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \
+    {"RX_BFD_START_OFFSET", BCM78900_B0_RXPMD_RX_BFD_START_OFFSET}, \
+    {"ING_L3_INTF_VALID", BCM78900_B0_RXPMD_ING_L3_INTF_VALID}, \
+    {"CPU_COS", BCM78900_B0_RXPMD_CPU_COS}, \
+    {"QUEUE_NUM", BCM78900_B0_RXPMD_QUEUE_NUM}, \
+    {"INCOMING_TAG_STATUS", BCM78900_B0_RXPMD_INCOMING_TAG_STATUS}, \
+    {"ING_OTAG_ACTION", BCM78900_B0_RXPMD_ING_OTAG_ACTION}, \
+    {"PKT_LENGTH", BCM78900_B0_RXPMD_PKT_LENGTH}, \
+    {"O_NHI", BCM78900_B0_RXPMD_O_NHI}, \
+    {"INCOMING_OPAQUE_TAG_STATUS", BCM78900_B0_RXPMD_INCOMING_OPAQUE_TAG_STATUS}, \
+    {"BPDU", BCM78900_B0_RXPMD_BPDU}, \
+    {"CHANGE_DSCP", BCM78900_B0_RXPMD_CHANGE_DSCP}, \
+    {"CHANGE_ECN", BCM78900_B0_RXPMD_CHANGE_ECN}, \
+    {"DLB_ID_VALID", BCM78900_B0_RXPMD_DLB_ID_VALID}, \
+    {"DO_NOT_CHANGE_TTL", BCM78900_B0_RXPMD_DO_NOT_CHANGE_TTL}, \
+    {"DSCP", BCM78900_B0_RXPMD_DSCP}, \
+    {"SPECIAL_PACKET_TYPE", BCM78900_B0_RXPMD_SPECIAL_PACKET_TYPE}, \
+    {"ECN", BCM78900_B0_RXPMD_ECN}, \
+    {"IP_ROUTED", BCM78900_B0_RXPMD_IP_ROUTED}, \
+    {"L3ONLY", BCM78900_B0_RXPMD_L3ONLY}, \
+    {"MATCHED_RULE", BCM78900_B0_RXPMD_MATCHED_RULE}, \
+    {"MTP_INDEX", BCM78900_B0_RXPMD_MTP_INDEX}, \
+    {"OUTER_CFI", BCM78900_B0_RXPMD_OUTER_CFI}, \
+    {"OUTER_PRI", BCM78900_B0_RXPMD_OUTER_PRI}, \
+    {"OUTER_VID", BCM78900_B0_RXPMD_OUTER_VID}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM78900_B0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"REGEN_CRC", BCM78900_B0_RXPMD_REGEN_CRC}, \
+    {"ENTROPY_LABEL", BCM78900_B0_RXPMD_ENTROPY_LABEL}, \
+    {"SPECIAL_PACKET_INDICATOR", BCM78900_B0_RXPMD_SPECIAL_PACKET_INDICATOR}, \
+    {"SRC_PORT_NUM", BCM78900_B0_RXPMD_SRC_PORT_NUM}, \
+    {"SWITCH", BCM78900_B0_RXPMD_SWITCH}, \
+    {"TIMESTAMP", BCM78900_B0_RXPMD_TIMESTAMP}, \
+    {"TIMESTAMP_HI", BCM78900_B0_RXPMD_TIMESTAMP_HI}, \
+    {"IEEE_802_1AS_TIMESTAMP_ENABLED", BCM78900_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED}, \
+    {"TUNNEL_DECAP_TYPE", BCM78900_B0_RXPMD_TUNNEL_DECAP_TYPE}, \
+    {"UC_SW_COPY_DROPPED", BCM78900_B0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"UNICAST_QUEUE", BCM78900_B0_RXPMD_UNICAST_QUEUE}, \
+    {"INCOMING_INT_HDR_TYPE", BCM78900_B0_RXPMD_INCOMING_INT_HDR_TYPE}, \
+    {"DLB_ID", BCM78900_B0_RXPMD_DLB_ID}, \
+    {"MODULE_HDR", BCM78900_B0_RXPMD_MODULE_HDR}, \
+    {"COUNT", BCM78900_B0_RXPMD_COUNT}
+
+/*!
+ * \name BCM78900_B0_RXPMD_REASON_TYPE encodings.
+ * \anchor BCM78900_B0_RXPMD_REASON_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78900_B0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP          0
+#define BCM78900_B0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP          1
+/*! \} */
+
+/*! BCM78900_B0_RXPMD_REASON_TYPE encoding name strings maps. */
+#define BCM78900_B0_RXPMD_REASON_TYPE_NAME_MAP_INIT \
+    {"CTC_INITIATED_FROM_IP", BCM78900_B0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP},\
+    {"CTC_INITIATED_FROM_EP", BCM78900_B0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78900_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED encodings.
+ * \anchor BCM78900_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_XXX
+ */
+/*! \{ */
+#define BCM78900_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_INVALID     0
+#define BCM78900_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_IEEE_802_1AS 1
+/*! \} */
+
+/*! BCM78900_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED encoding name strings maps. */
+#define BCM78900_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_NAME_MAP_INIT \
+    {"INVALID", BCM78900_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_INVALID},\
+    {"IEEE_802_1AS", BCM78900_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_IEEE_802_1AS},\
+    {NULL, 0}
+
+/* RX_REASON defines */
+#define BCM78900_B0_RX_REASON_CPU_INVALID_REASON                     0
+#define BCM78900_B0_RX_REASON_CPU_SLF                                1
+#define BCM78900_B0_RX_REASON_CPU_DLF                                2
+#define BCM78900_B0_RX_REASON_CPU_L2MOVE                             3
+#define BCM78900_B0_RX_REASON_CPU_L2CPU                              4
+#define BCM78900_B0_RX_REASON_CPU_L3SRC_MISS                         5
+#define BCM78900_B0_RX_REASON_CPU_L3DST_MISS                         6
+#define BCM78900_B0_RX_REASON_CPU_L3SRC_MOVE                         7
+#define BCM78900_B0_RX_REASON_CPU_MC_MISS                            8
+#define BCM78900_B0_RX_REASON_CPU_IPMC_MISS                          9
+#define BCM78900_B0_RX_REASON_CPU_FFP                                10
+#define BCM78900_B0_RX_REASON_CPU_L3HDR_ERR                          11
+#define BCM78900_B0_RX_REASON_CPU_PROTOCOL_PKT                       12
+#define BCM78900_B0_RX_REASON_CPU_DOS_ATTACK                         13
+#define BCM78900_B0_RX_REASON_CPU_MARTIAN_ADDR                       14
+#define BCM78900_B0_RX_REASON_CPU_TUNNEL_ERR                         15
+#define BCM78900_B0_RX_REASON_CPU_SFLOW_SRC                          16
+#define BCM78900_B0_RX_REASON_CPU_SFLOW_DST                          17
+#define BCM78900_B0_RX_REASON_ICMP_REDIRECT                          18
+#define BCM78900_B0_RX_REASON_L3_SLOWPATH                            19
+#define BCM78900_B0_RX_REASON_PARITY_ERROR                           20
+#define BCM78900_B0_RX_REASON_L3_MTU_CHECK_FAIL                      21
+#define BCM78900_B0_RX_REASON_MPLS_TTL_CHECK                         22
+#define BCM78900_B0_RX_REASON_MPLS_LABEL_MISS                        23
+#define BCM78900_B0_RX_REASON_MPLS_INVALID_ACTION                    24
+#define BCM78900_B0_RX_REASON_MPLS_INVALID_PAYLOAD                   25
+#define BCM78900_B0_RX_REASON_CPU_VFP                                26
+#define BCM78900_B0_RX_REASON_PBT_NONUC_PKT                          27
+#define BCM78900_B0_RX_REASON_L3_NEXT_HOP                            28
+#define BCM78900_B0_RX_REASON_MY_STATION                             29
+#define BCM78900_B0_RX_REASON_TIME_SYNC                              30
+#define BCM78900_B0_RX_REASON_TUNNEL_DECAP_ECN_ERROR                 31
+#define BCM78900_B0_RX_REASON_BFD_SLOWPATH                           32
+#define BCM78900_B0_RX_REASON_BFD_ERROR                              33
+#define BCM78900_B0_RX_REASON_PACKET_TRACE_TO_CPU                    34
+#define BCM78900_B0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT               35
+#define BCM78900_B0_RX_REASON_MPLS_ALERT_LABEL                       36
+#define BCM78900_B0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH            37
+#define BCM78900_B0_RX_REASON_DLB_MONITOR                            38
+#define BCM78900_B0_RX_REASON_CPU_SFLOW_FLEX                         39
+#define BCM78900_B0_RX_REASON_CPU_UVLAN                              40
+#define BCM78900_B0_RX_REASON_SRV6_ERROR                             41
+#define BCM78900_B0_RX_REASON_VXLAN_VN_ID_MISS                       42
+#define BCM78900_B0_RX_REASON_VXLAN_SIP_MISS                         43
+#define BCM78900_B0_RX_REASON_ADAPT_MISS                             44
+#define BCM78900_B0_RX_REASON_INVALID_GSH_NON_GSH                    45
+#define BCM78900_B0_RX_REASON_COUNT                                  46
+
+/* RX_REASON name map */
+#define BCM78900_B0_RX_REASON_NAME_MAP_INIT \
+    {"CPU_INVALID_REASON", BCM78900_B0_RX_REASON_CPU_INVALID_REASON}, \
+    {"CPU_SLF", BCM78900_B0_RX_REASON_CPU_SLF}, \
+    {"CPU_DLF", BCM78900_B0_RX_REASON_CPU_DLF}, \
+    {"CPU_L2MOVE", BCM78900_B0_RX_REASON_CPU_L2MOVE}, \
+    {"CPU_L2CPU", BCM78900_B0_RX_REASON_CPU_L2CPU}, \
+    {"CPU_L3SRC_MISS", BCM78900_B0_RX_REASON_CPU_L3SRC_MISS}, \
+    {"CPU_L3DST_MISS", BCM78900_B0_RX_REASON_CPU_L3DST_MISS}, \
+    {"CPU_L3SRC_MOVE", BCM78900_B0_RX_REASON_CPU_L3SRC_MOVE}, \
+    {"CPU_MC_MISS", BCM78900_B0_RX_REASON_CPU_MC_MISS}, \
+    {"CPU_IPMC_MISS", BCM78900_B0_RX_REASON_CPU_IPMC_MISS}, \
+    {"CPU_FFP", BCM78900_B0_RX_REASON_CPU_FFP}, \
+    {"CPU_L3HDR_ERR", BCM78900_B0_RX_REASON_CPU_L3HDR_ERR}, \
+    {"CPU_PROTOCOL_PKT", BCM78900_B0_RX_REASON_CPU_PROTOCOL_PKT}, \
+    {"CPU_DOS_ATTACK", BCM78900_B0_RX_REASON_CPU_DOS_ATTACK}, \
+    {"CPU_MARTIAN_ADDR", BCM78900_B0_RX_REASON_CPU_MARTIAN_ADDR}, \
+    {"CPU_TUNNEL_ERR", BCM78900_B0_RX_REASON_CPU_TUNNEL_ERR}, \
+    {"CPU_SFLOW_SRC", BCM78900_B0_RX_REASON_CPU_SFLOW_SRC}, \
+    {"CPU_SFLOW_DST", BCM78900_B0_RX_REASON_CPU_SFLOW_DST}, \
+    {"ICMP_REDIRECT", BCM78900_B0_RX_REASON_ICMP_REDIRECT}, \
+    {"L3_SLOWPATH", BCM78900_B0_RX_REASON_L3_SLOWPATH}, \
+    {"PARITY_ERROR", BCM78900_B0_RX_REASON_PARITY_ERROR}, \
+    {"L3_MTU_CHECK_FAIL", BCM78900_B0_RX_REASON_L3_MTU_CHECK_FAIL}, \
+    {"MPLS_TTL_CHECK", BCM78900_B0_RX_REASON_MPLS_TTL_CHECK}, \
+    {"MPLS_LABEL_MISS", BCM78900_B0_RX_REASON_MPLS_LABEL_MISS}, \
+    {"MPLS_INVALID_ACTION", BCM78900_B0_RX_REASON_MPLS_INVALID_ACTION}, \
+    {"MPLS_INVALID_PAYLOAD", BCM78900_B0_RX_REASON_MPLS_INVALID_PAYLOAD}, \
+    {"CPU_VFP", BCM78900_B0_RX_REASON_CPU_VFP}, \
+    {"PBT_NONUC_PKT", BCM78900_B0_RX_REASON_PBT_NONUC_PKT}, \
+    {"L3_NEXT_HOP", BCM78900_B0_RX_REASON_L3_NEXT_HOP}, \
+    {"MY_STATION", BCM78900_B0_RX_REASON_MY_STATION}, \
+    {"TIME_SYNC", BCM78900_B0_RX_REASON_TIME_SYNC}, \
+    {"TUNNEL_DECAP_ECN_ERROR", BCM78900_B0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \
+    {"BFD_SLOWPATH", BCM78900_B0_RX_REASON_BFD_SLOWPATH}, \
+    {"BFD_ERROR", BCM78900_B0_RX_REASON_BFD_ERROR}, \
+    {"PACKET_TRACE_TO_CPU", BCM78900_B0_RX_REASON_PACKET_TRACE_TO_CPU}, \
+    {"MPLS_UNKNOWN_CONTROL_PKT", BCM78900_B0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \
+    {"MPLS_ALERT_LABEL", BCM78900_B0_RX_REASON_MPLS_ALERT_LABEL}, \
+    {"CPU_IPMC_INTERFACE_MISMATCH", BCM78900_B0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \
+    {"DLB_MONITOR", BCM78900_B0_RX_REASON_DLB_MONITOR}, \
+    {"CPU_SFLOW_FLEX", BCM78900_B0_RX_REASON_CPU_SFLOW_FLEX}, \
+    {"CPU_UVLAN", BCM78900_B0_RX_REASON_CPU_UVLAN}, \
+    {"SRV6_ERROR", BCM78900_B0_RX_REASON_SRV6_ERROR}, \
+    {"VXLAN_VN_ID_MISS", BCM78900_B0_RX_REASON_VXLAN_VN_ID_MISS}, \
+    {"VXLAN_SIP_MISS", BCM78900_B0_RX_REASON_VXLAN_SIP_MISS}, \
+    {"ADAPT_MISS", BCM78900_B0_RX_REASON_ADAPT_MISS}, \
+    {"INVALID_GSH_NON_GSH", BCM78900_B0_RX_REASON_INVALID_GSH_NON_GSH}, \
+    {"COUNT", BCM78900_B0_RX_REASON_COUNT}
+
+/* EP_RX_REASON defines */
+#define BCM78900_B0_EP_RX_REASON_EP_CTC                              0
+#define BCM78900_B0_EP_RX_REASON_COUNT                               1
+
+/* EP_RX_REASON name map */
+#define BCM78900_B0_EP_RX_REASON_NAME_MAP_INIT \
+    {"EP_CTC", BCM78900_B0_EP_RX_REASON_EP_CTC}, \
+    {"COUNT", BCM78900_B0_EP_RX_REASON_COUNT}
+
+/* TXPMD defines */
+#define BCM78900_B0_TXPMD_CPU_TX_ECMP_MEMBER_ID                      0
+#define BCM78900_B0_TXPMD_CPU_TX_MCAST_LB_INDEX                      1
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION                         2
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE                    3
+#define BCM78900_B0_TXPMD_CPU_TX_DP                                  4
+#define BCM78900_B0_TXPMD_CPU_TX_INPUT_PRI                           5
+#define BCM78900_B0_TXPMD_CPU_TX_INT_CN                              6
+#define BCM78900_B0_TXPMD_CPU_TX_INT_PRI                             7
+#define BCM78900_B0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD                  8
+#define BCM78900_B0_TXPMD_CPU_TX_PKT_PROFILE                         9
+#define BCM78900_B0_TXPMD_CPU_TX_QOS_FIELDS_VLD                      10
+#define BCM78900_B0_TXPMD_CPU_TX_ROUTED_PKT                          11
+#define BCM78900_B0_TXPMD_CPU_TX_VRF                                 12
+#define BCM78900_B0_TXPMD_CPU_TX_VRF_VALID                           13
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR                  14
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_CNG                         15
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_COS                         16
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION                 17
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE            18
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN 19
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE    20
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM 21
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET 22
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI                   23
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM                   24
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_SPAP                        25
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_SPID                        26
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE               27
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_SRC_MODID                   28
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_TX_TS                       29
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_UNICAST                     30
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE          31
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE               32
+#define BCM78900_B0_TXPMD_HEADER_TYPE                                33
+#define BCM78900_B0_TXPMD_START                                      34
+#define BCM78900_B0_TXPMD_COUNT                                      35
+
+/* TXPMD name map */
+#define BCM78900_B0_TXPMD_NAME_MAP_INIT \
+    {"CPU_TX::ECMP_MEMBER_ID", BCM78900_B0_TXPMD_CPU_TX_ECMP_MEMBER_ID}, \
+    {"CPU_TX::MCAST_LB_INDEX", BCM78900_B0_TXPMD_CPU_TX_MCAST_LB_INDEX}, \
+    {"CPU_TX::DESTINATION", BCM78900_B0_TXPMD_CPU_TX_DESTINATION}, \
+    {"CPU_TX::DESTINATION_TYPE", BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE}, \
+    {"CPU_TX::DP", BCM78900_B0_TXPMD_CPU_TX_DP}, \
+    {"CPU_TX::INPUT_PRI", BCM78900_B0_TXPMD_CPU_TX_INPUT_PRI}, \
+    {"CPU_TX::INT_CN", BCM78900_B0_TXPMD_CPU_TX_INT_CN}, \
+    {"CPU_TX::INT_PRI", BCM78900_B0_TXPMD_CPU_TX_INT_PRI}, \
+    {"CPU_TX::MCAST_LB_INDEX_VLD", BCM78900_B0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD}, \
+    {"CPU_TX::PKT_PROFILE", BCM78900_B0_TXPMD_CPU_TX_PKT_PROFILE}, \
+    {"CPU_TX::QOS_FIELDS_VLD", BCM78900_B0_TXPMD_CPU_TX_QOS_FIELDS_VLD}, \
+    {"CPU_TX::ROUTED_PKT", BCM78900_B0_TXPMD_CPU_TX_ROUTED_PKT}, \
+    {"CPU_TX::VRF", BCM78900_B0_TXPMD_CPU_TX_VRF}, \
+    {"CPU_TX::VRF_VALID", BCM78900_B0_TXPMD_CPU_TX_VRF_VALID}, \
+    {"SOBMH_FROM_CPU::CELL_ERROR", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR}, \
+    {"SOBMH_FROM_CPU::CNG", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_CNG}, \
+    {"SOBMH_FROM_CPU::COS", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_COS}, \
+    {"SOBMH_FROM_CPU::DESTINATION", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION}, \
+    {"SOBMH_FROM_CPU::DESTINATION_TYPE", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE}, \
+    {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE}, \
+    {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"SOBMH_FROM_CPU::INPUT_PRI", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI}, \
+    {"SOBMH_FROM_CPU::RQE_Q_NUM", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM}, \
+    {"SOBMH_FROM_CPU::SPAP", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_SPAP}, \
+    {"SOBMH_FROM_CPU::SPID", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_SPID}, \
+    {"SOBMH_FROM_CPU::SPID_OVERRIDE", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE}, \
+    {"SOBMH_FROM_CPU::SRC_MODID", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_SRC_MODID}, \
+    {"SOBMH_FROM_CPU::TX_TS", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_TX_TS}, \
+    {"SOBMH_FROM_CPU::UNICAST", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_UNICAST}, \
+    {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE}, \
+    {"SOBMH_FROM_CPU::WRED_RESPONSE", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE}, \
+    {"HEADER_TYPE", BCM78900_B0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM78900_B0_TXPMD_START}, \
+    {"COUNT", BCM78900_B0_TXPMD_COUNT}
+
+/*!
+ * \name BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE encodings.
+ * \anchor BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT        0
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI                1
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP               2
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER        3
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC               4
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC               5
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD         6
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID             8
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_INVALID            15
+/*! \} */
+
+/*! BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings maps. */
+#define BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT},\
+    {"NHI", BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI},\
+    {"ECMP", BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP},\
+    {"ECMP_MEMBER", BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER},\
+    {"IPMC", BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC},\
+    {"L2MC", BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC},\
+    {"VLAN_FLOOD", BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD},\
+    {"LAG_ID", BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID},\
+    {"INVALID", BCM78900_B0_TXPMD_CPU_TX_DESTINATION_TYPE_INVALID},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78900_B0_TXPMD_CPU_TX_DP encodings.
+ * \anchor BCM78900_B0_TXPMD_CPU_TX_DP_XXX
+ */
+/*! \{ */
+#define BCM78900_B0_TXPMD_CPU_TX_DP_GREEN                            0
+#define BCM78900_B0_TXPMD_CPU_TX_DP_RED                              1
+#define BCM78900_B0_TXPMD_CPU_TX_DP_YELLOW                           3
+/*! \} */
+
+/*! BCM78900_B0_TXPMD_CPU_TX_DP encoding name strings maps. */
+#define BCM78900_B0_TXPMD_CPU_TX_DP_NAME_MAP_INIT \
+    {"GREEN", BCM78900_B0_TXPMD_CPU_TX_DP_GREEN},\
+    {"RED", BCM78900_B0_TXPMD_CPU_TX_DP_RED},\
+    {"YELLOW", BCM78900_B0_TXPMD_CPU_TX_DP_YELLOW},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encodings.
+ * \anchor BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT 0
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM     7
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID    15
+/*! \} */
+
+/*! BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encoding name strings maps. */
+#define BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT},\
+    {"L2_PBM", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM},\
+    {"INVALID", BCM78900_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78900_B0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM78900_B0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78900_B0_TXPMD_HEADER_TYPE_RESERVED                       0
+#define BCM78900_B0_TXPMD_HEADER_TYPE_SOBMH                          1
+#define BCM78900_B0_TXPMD_HEADER_TYPE_CPU_TX                         2
+#define BCM78900_B0_TXPMD_HEADER_TYPE_CTC                            3
+#define BCM78900_B0_TXPMD_HEADER_TYPE_MIRROR_POSTCARD                4
+#define BCM78900_B0_TXPMD_HEADER_TYPE_RESERVED_1                     5
+#define BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_NONE                  6
+#define BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC        7
+#define BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC        8
+#define BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD              9
+#define BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD              10
+#define BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT 11
+#define BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER     12
+#define BCM78900_B0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC_TO_CPU          13
+#define BCM78900_B0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC                 14
+/*! \} */
+
+/*! BCM78900_B0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM78900_B0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED", BCM78900_B0_TXPMD_HEADER_TYPE_RESERVED},\
+    {"SOBMH", BCM78900_B0_TXPMD_HEADER_TYPE_SOBMH},\
+    {"CPU_TX", BCM78900_B0_TXPMD_HEADER_TYPE_CPU_TX},\
+    {"CTC", BCM78900_B0_TXPMD_HEADER_TYPE_CTC},\
+    {"MIRROR_POSTCARD", BCM78900_B0_TXPMD_HEADER_TYPE_MIRROR_POSTCARD},\
+    {"RESERVED_1", BCM78900_B0_TXPMD_HEADER_TYPE_RESERVED_1},\
+    {"ETH_TYPE_NONE", BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_NONE},\
+    {"ETH_TYPE_IP_ETH_CLASSIC", BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC},\
+    {"ETH_TYPE_EP_ETH_CLASSIC", BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC},\
+    {"ETH_TYPE_IP_S_MOD", BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD},\
+    {"ETH_TYPE_EP_S_MOD", BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD},\
+    {"ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT", BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT},\
+    {"ETH_TYPE_EP_REDIRECT_OTHER", BCM78900_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER},\
+    {"MIRROR_CLASSIC_TO_CPU", BCM78900_B0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC_TO_CPU},\
+    {"MIRROR_CLASSIC", BCM78900_B0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78900_B0_TXPMD_START encodings.
+ * \anchor BCM78900_B0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM78900_B0_TXPMD_START_INTERNAL                             2
+/*! \} */
+
+/*! BCM78900_B0_TXPMD_START encoding name strings maps. */
+#define BCM78900_B0_TXPMD_START_NAME_MAP_INIT \
+    {"INTERNAL", BCM78900_B0_TXPMD_START_INTERNAL},\
+    {NULL, 0}
+
+/* LBHDR defines */
+#define BCM78900_B0_LBHDR_VISIBILITY_PKT                             0
+#define BCM78900_B0_LBHDR_VRF_VALID                                  1
+#define BCM78900_B0_LBHDR_ROUTED_PKT                                 2
+#define BCM78900_B0_LBHDR_VRF                                        3
+#define BCM78900_B0_LBHDR_PKT_PROFILE                                4
+#define BCM78900_B0_LBHDR_QOS_FIELD_VALID                            5
+#define BCM78900_B0_LBHDR_PP_PORT                                    6
+#define BCM78900_B0_LBHDR_OPAQUE_OBJECT                              7
+#define BCM78900_B0_LBHDR_QOS_FIELD_ETH                              8
+#define BCM78900_B0_LBHDR_INT_PRI_ETH                                9
+#define BCM78900_B0_LBHDR_INT_CN_ETH                                 10
+#define BCM78900_B0_LBHDR_CNG_ETH                                    11
+#define BCM78900_B0_LBHDR_HEADER_TYPE                                12
+#define BCM78900_B0_LBHDR_START                                      13
+#define BCM78900_B0_LBHDR_COUNT                                      14
+
+/* LBHDR name map */
+#define BCM78900_B0_LBHDR_NAME_MAP_INIT \
+    {"VISIBILITY_PKT", BCM78900_B0_LBHDR_VISIBILITY_PKT}, \
+    {"VRF_VALID", BCM78900_B0_LBHDR_VRF_VALID}, \
+    {"ROUTED_PKT", BCM78900_B0_LBHDR_ROUTED_PKT}, \
+    {"VRF", BCM78900_B0_LBHDR_VRF}, \
+    {"PKT_PROFILE", BCM78900_B0_LBHDR_PKT_PROFILE}, \
+    {"QOS_FIELD_VALID", BCM78900_B0_LBHDR_QOS_FIELD_VALID}, \
+    {"PP_PORT", BCM78900_B0_LBHDR_PP_PORT}, \
+    {"OPAQUE_OBJECT", BCM78900_B0_LBHDR_OPAQUE_OBJECT}, \
+    {"QOS_FIELD_ETH", BCM78900_B0_LBHDR_QOS_FIELD_ETH}, \
+    {"INT_PRI_ETH", BCM78900_B0_LBHDR_INT_PRI_ETH}, \
+    {"INT_CN_ETH", BCM78900_B0_LBHDR_INT_CN_ETH}, \
+    {"CNG_ETH", BCM78900_B0_LBHDR_CNG_ETH}, \
+    {"HEADER_TYPE", BCM78900_B0_LBHDR_HEADER_TYPE}, \
+    {"START", BCM78900_B0_LBHDR_START}, \
+    {"COUNT", BCM78900_B0_LBHDR_COUNT}
+
+/*!
+ * \name BCM78900_B0_LBHDR_HEADER_TYPE encodings.
+ * \anchor BCM78900_B0_LBHDR_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78900_B0_LBHDR_HEADER_TYPE_LOOPBACK_MH                    7
+/*! \} */
+
+/*! BCM78900_B0_LBHDR_HEADER_TYPE encoding name strings maps. */
+#define BCM78900_B0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \
+    {"LOOPBACK_MH", BCM78900_B0_LBHDR_HEADER_TYPE_LOOPBACK_MH},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78900_B0_LBHDR_START encodings.
+ * \anchor BCM78900_B0_LBHDR_START_XXX
+ */
+/*! \{ */
+#define BCM78900_B0_LBHDR_START_INTERNAL                             2
+/*! \} */
+
+/*! BCM78900_B0_LBHDR_START encoding name strings maps. */
+#define BCM78900_B0_LBHDR_START_NAME_MAP_INIT \
+    {"INTERNAL", BCM78900_B0_LBHDR_START_INTERNAL},\
+    {NULL, 0}
+
+#endif /* BCM78900_B0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.h
new file mode 100644
index 00000000000..4ccefae6e9e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.h
@@ -0,0 +1,522 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM78905_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM78905_A0_PMD_FIELD_H
+#define BCM78905_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM78905_A0_RXPMD_REASON                                     0
+#define BCM78905_A0_RXPMD_REASON_TYPE                                1
+#define BCM78905_A0_RXPMD_ING_L3_INTF                                2
+#define BCM78905_A0_RXPMD_I2E_CLASSID                                3
+#define BCM78905_A0_RXPMD_RX_BFD_SESSION_INDEX                       4
+#define BCM78905_A0_RXPMD_I2E_CLASSID_TYPE                           5
+#define BCM78905_A0_RXPMD_RX_BFD_START_OFFSET_TYPE                   6
+#define BCM78905_A0_RXPMD_RX_BFD_START_OFFSET                        7
+#define BCM78905_A0_RXPMD_ING_L3_INTF_VALID                          8
+#define BCM78905_A0_RXPMD_CPU_COS                                    9
+#define BCM78905_A0_RXPMD_QUEUE_NUM                                  10
+#define BCM78905_A0_RXPMD_INCOMING_TAG_STATUS                        11
+#define BCM78905_A0_RXPMD_ING_OTAG_ACTION                            12
+#define BCM78905_A0_RXPMD_PKT_LENGTH                                 13
+#define BCM78905_A0_RXPMD_O_NHI                                      14
+#define BCM78905_A0_RXPMD_INCOMING_OPAQUE_TAG_STATUS                 15
+#define BCM78905_A0_RXPMD_BPDU                                       16
+#define BCM78905_A0_RXPMD_CHANGE_DSCP                                17
+#define BCM78905_A0_RXPMD_CHANGE_ECN                                 18
+#define BCM78905_A0_RXPMD_DLB_ID_VALID                               19
+#define BCM78905_A0_RXPMD_DO_NOT_CHANGE_TTL                          20
+#define BCM78905_A0_RXPMD_DSCP                                       21
+#define BCM78905_A0_RXPMD_SPECIAL_PACKET_TYPE                        22
+#define BCM78905_A0_RXPMD_ECN                                        23
+#define BCM78905_A0_RXPMD_IP_ROUTED                                  24
+#define BCM78905_A0_RXPMD_L3ONLY                                     25
+#define BCM78905_A0_RXPMD_MATCHED_RULE                               26
+#define BCM78905_A0_RXPMD_MTP_INDEX                                  27
+#define BCM78905_A0_RXPMD_OUTER_CFI                                  28
+#define BCM78905_A0_RXPMD_OUTER_PRI                                  29
+#define BCM78905_A0_RXPMD_OUTER_VID                                  30
+#define BCM78905_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  31
+#define BCM78905_A0_RXPMD_REGEN_CRC                                  32
+#define BCM78905_A0_RXPMD_ENTROPY_LABEL                              33
+#define BCM78905_A0_RXPMD_SPECIAL_PACKET_INDICATOR                   34
+#define BCM78905_A0_RXPMD_SRC_PORT_NUM                               35
+#define BCM78905_A0_RXPMD_SWITCH                                     36
+#define BCM78905_A0_RXPMD_TIMESTAMP                                  37
+#define BCM78905_A0_RXPMD_TIMESTAMP_HI                               38
+#define BCM78905_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED             39
+#define BCM78905_A0_RXPMD_TUNNEL_DECAP_TYPE                          40
+#define BCM78905_A0_RXPMD_UC_SW_COPY_DROPPED                         41
+#define BCM78905_A0_RXPMD_UNICAST_QUEUE                              42
+#define BCM78905_A0_RXPMD_INCOMING_INT_HDR_TYPE                      43
+#define BCM78905_A0_RXPMD_DLB_ID                                     44
+#define BCM78905_A0_RXPMD_MODULE_HDR                                 45
+#define BCM78905_A0_RXPMD_COUNT                                      46
+
+/* RXPMD name map */
+#define BCM78905_A0_RXPMD_NAME_MAP_INIT \
+    {"REASON", BCM78905_A0_RXPMD_REASON}, \
+    {"REASON_TYPE", BCM78905_A0_RXPMD_REASON_TYPE}, \
+    {"ING_L3_INTF", BCM78905_A0_RXPMD_ING_L3_INTF}, \
+    {"I2E_CLASSID", BCM78905_A0_RXPMD_I2E_CLASSID}, \
+    {"RX_BFD_SESSION_INDEX", BCM78905_A0_RXPMD_RX_BFD_SESSION_INDEX}, \
+    {"I2E_CLASSID_TYPE", BCM78905_A0_RXPMD_I2E_CLASSID_TYPE}, \
+    {"RX_BFD_START_OFFSET_TYPE", BCM78905_A0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \
+    {"RX_BFD_START_OFFSET", BCM78905_A0_RXPMD_RX_BFD_START_OFFSET}, \
+    {"ING_L3_INTF_VALID", BCM78905_A0_RXPMD_ING_L3_INTF_VALID}, \
+    {"CPU_COS", BCM78905_A0_RXPMD_CPU_COS}, \
+    {"QUEUE_NUM", BCM78905_A0_RXPMD_QUEUE_NUM}, \
+    {"INCOMING_TAG_STATUS", BCM78905_A0_RXPMD_INCOMING_TAG_STATUS}, \
+    {"ING_OTAG_ACTION", BCM78905_A0_RXPMD_ING_OTAG_ACTION}, \
+    {"PKT_LENGTH", BCM78905_A0_RXPMD_PKT_LENGTH}, \
+    {"O_NHI", BCM78905_A0_RXPMD_O_NHI}, \
+    {"INCOMING_OPAQUE_TAG_STATUS", BCM78905_A0_RXPMD_INCOMING_OPAQUE_TAG_STATUS}, \
+    {"BPDU", BCM78905_A0_RXPMD_BPDU}, \
+    {"CHANGE_DSCP", BCM78905_A0_RXPMD_CHANGE_DSCP}, \
+    {"CHANGE_ECN", BCM78905_A0_RXPMD_CHANGE_ECN}, \
+    {"DLB_ID_VALID", BCM78905_A0_RXPMD_DLB_ID_VALID}, \
+    {"DO_NOT_CHANGE_TTL", BCM78905_A0_RXPMD_DO_NOT_CHANGE_TTL}, \
+    {"DSCP", BCM78905_A0_RXPMD_DSCP}, \
+    {"SPECIAL_PACKET_TYPE", BCM78905_A0_RXPMD_SPECIAL_PACKET_TYPE}, \
+    {"ECN", BCM78905_A0_RXPMD_ECN}, \
+    {"IP_ROUTED", BCM78905_A0_RXPMD_IP_ROUTED}, \
+    {"L3ONLY", BCM78905_A0_RXPMD_L3ONLY}, \
+    {"MATCHED_RULE", BCM78905_A0_RXPMD_MATCHED_RULE}, \
+    {"MTP_INDEX", BCM78905_A0_RXPMD_MTP_INDEX}, \
+    {"OUTER_CFI", BCM78905_A0_RXPMD_OUTER_CFI}, \
+    {"OUTER_PRI", BCM78905_A0_RXPMD_OUTER_PRI}, \
+    {"OUTER_VID", BCM78905_A0_RXPMD_OUTER_VID}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM78905_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"REGEN_CRC", BCM78905_A0_RXPMD_REGEN_CRC}, \
+    {"ENTROPY_LABEL", BCM78905_A0_RXPMD_ENTROPY_LABEL}, \
+    {"SPECIAL_PACKET_INDICATOR", BCM78905_A0_RXPMD_SPECIAL_PACKET_INDICATOR}, \
+    {"SRC_PORT_NUM", BCM78905_A0_RXPMD_SRC_PORT_NUM}, \
+    {"SWITCH", BCM78905_A0_RXPMD_SWITCH}, \
+    {"TIMESTAMP", BCM78905_A0_RXPMD_TIMESTAMP}, \
+    {"TIMESTAMP_HI", BCM78905_A0_RXPMD_TIMESTAMP_HI}, \
+    {"IEEE_802_1AS_TIMESTAMP_ENABLED", BCM78905_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED}, \
+    {"TUNNEL_DECAP_TYPE", BCM78905_A0_RXPMD_TUNNEL_DECAP_TYPE}, \
+    {"UC_SW_COPY_DROPPED", BCM78905_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"UNICAST_QUEUE", BCM78905_A0_RXPMD_UNICAST_QUEUE}, \
+    {"INCOMING_INT_HDR_TYPE", BCM78905_A0_RXPMD_INCOMING_INT_HDR_TYPE}, \
+    {"DLB_ID", BCM78905_A0_RXPMD_DLB_ID}, \
+    {"MODULE_HDR", BCM78905_A0_RXPMD_MODULE_HDR}, \
+    {"COUNT", BCM78905_A0_RXPMD_COUNT}
+
+/*!
+ * \name BCM78905_A0_RXPMD_REASON_TYPE encodings.
+ * \anchor BCM78905_A0_RXPMD_REASON_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78905_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP          0
+#define BCM78905_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP          1
+/*! \} */
+
+/*! BCM78905_A0_RXPMD_REASON_TYPE encoding name strings maps. */
+#define BCM78905_A0_RXPMD_REASON_TYPE_NAME_MAP_INIT \
+    {"CTC_INITIATED_FROM_IP", BCM78905_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP},\
+    {"CTC_INITIATED_FROM_EP", BCM78905_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78905_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED encodings.
+ * \anchor BCM78905_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_XXX
+ */
+/*! \{ */
+#define BCM78905_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_INVALID     0
+#define BCM78905_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_IEEE_802_1AS 1
+/*! \} */
+
+/*! BCM78905_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED encoding name strings maps. */
+#define BCM78905_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_NAME_MAP_INIT \
+    {"INVALID", BCM78905_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_INVALID},\
+    {"IEEE_802_1AS", BCM78905_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_IEEE_802_1AS},\
+    {NULL, 0}
+
+/* RX_REASON defines */
+#define BCM78905_A0_RX_REASON_CPU_INVALID_REASON                     0
+#define BCM78905_A0_RX_REASON_CPU_SLF                                1
+#define BCM78905_A0_RX_REASON_CPU_DLF                                2
+#define BCM78905_A0_RX_REASON_CPU_L2MOVE                             3
+#define BCM78905_A0_RX_REASON_CPU_L2CPU                              4
+#define BCM78905_A0_RX_REASON_CPU_L3SRC_MISS                         5
+#define BCM78905_A0_RX_REASON_CPU_L3DST_MISS                         6
+#define BCM78905_A0_RX_REASON_CPU_L3SRC_MOVE                         7
+#define BCM78905_A0_RX_REASON_CPU_MC_MISS                            8
+#define BCM78905_A0_RX_REASON_CPU_IPMC_MISS                          9
+#define BCM78905_A0_RX_REASON_CPU_FFP                                10
+#define BCM78905_A0_RX_REASON_CPU_L3HDR_ERR                          11
+#define BCM78905_A0_RX_REASON_CPU_PROTOCOL_PKT                       12
+#define BCM78905_A0_RX_REASON_CPU_DOS_ATTACK                         13
+#define BCM78905_A0_RX_REASON_CPU_MARTIAN_ADDR                       14
+#define BCM78905_A0_RX_REASON_CPU_TUNNEL_ERR                         15
+#define BCM78905_A0_RX_REASON_CPU_SFLOW_SRC                          16
+#define BCM78905_A0_RX_REASON_CPU_SFLOW_DST                          17
+#define BCM78905_A0_RX_REASON_ICMP_REDIRECT                          18
+#define BCM78905_A0_RX_REASON_L3_SLOWPATH                            19
+#define BCM78905_A0_RX_REASON_PARITY_ERROR                           20
+#define BCM78905_A0_RX_REASON_L3_MTU_CHECK_FAIL                      21
+#define BCM78905_A0_RX_REASON_MPLS_TTL_CHECK                         22
+#define BCM78905_A0_RX_REASON_MPLS_LABEL_MISS                        23
+#define BCM78905_A0_RX_REASON_MPLS_INVALID_ACTION                    24
+#define BCM78905_A0_RX_REASON_MPLS_INVALID_PAYLOAD                   25
+#define BCM78905_A0_RX_REASON_CPU_VFP                                26
+#define BCM78905_A0_RX_REASON_PBT_NONUC_PKT                          27
+#define BCM78905_A0_RX_REASON_L3_NEXT_HOP                            28
+#define BCM78905_A0_RX_REASON_MY_STATION                             29
+#define BCM78905_A0_RX_REASON_TIME_SYNC                              30
+#define BCM78905_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR                 31
+#define BCM78905_A0_RX_REASON_BFD_SLOWPATH                           32
+#define BCM78905_A0_RX_REASON_BFD_ERROR                              33
+#define BCM78905_A0_RX_REASON_PACKET_TRACE_TO_CPU                    34
+#define BCM78905_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT               35
+#define BCM78905_A0_RX_REASON_MPLS_ALERT_LABEL                       36
+#define BCM78905_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH            37
+#define BCM78905_A0_RX_REASON_DLB_MONITOR                            38
+#define BCM78905_A0_RX_REASON_CPU_SFLOW_FLEX                         39
+#define BCM78905_A0_RX_REASON_CPU_UVLAN                              40
+#define BCM78905_A0_RX_REASON_SRV6_ERROR                             41
+#define BCM78905_A0_RX_REASON_VXLAN_VN_ID_MISS                       42
+#define BCM78905_A0_RX_REASON_VXLAN_SIP_MISS                         43
+#define BCM78905_A0_RX_REASON_ADAPT_MISS                             44
+#define BCM78905_A0_RX_REASON_INVALID_GSH_NON_GSH                    45
+#define BCM78905_A0_RX_REASON_COUNT                                  46
+
+/* RX_REASON name map */
+#define BCM78905_A0_RX_REASON_NAME_MAP_INIT \
+    {"CPU_INVALID_REASON", BCM78905_A0_RX_REASON_CPU_INVALID_REASON}, \
+    {"CPU_SLF", BCM78905_A0_RX_REASON_CPU_SLF}, \
+    {"CPU_DLF", BCM78905_A0_RX_REASON_CPU_DLF}, \
+    {"CPU_L2MOVE", BCM78905_A0_RX_REASON_CPU_L2MOVE}, \
+    {"CPU_L2CPU", BCM78905_A0_RX_REASON_CPU_L2CPU}, \
+    {"CPU_L3SRC_MISS", BCM78905_A0_RX_REASON_CPU_L3SRC_MISS}, \
+    {"CPU_L3DST_MISS", BCM78905_A0_RX_REASON_CPU_L3DST_MISS}, \
+    {"CPU_L3SRC_MOVE", BCM78905_A0_RX_REASON_CPU_L3SRC_MOVE}, \
+    {"CPU_MC_MISS", BCM78905_A0_RX_REASON_CPU_MC_MISS}, \
+    {"CPU_IPMC_MISS", BCM78905_A0_RX_REASON_CPU_IPMC_MISS}, \
+    {"CPU_FFP", BCM78905_A0_RX_REASON_CPU_FFP}, \
+    {"CPU_L3HDR_ERR", BCM78905_A0_RX_REASON_CPU_L3HDR_ERR}, \
+    {"CPU_PROTOCOL_PKT", BCM78905_A0_RX_REASON_CPU_PROTOCOL_PKT}, \
+    {"CPU_DOS_ATTACK", BCM78905_A0_RX_REASON_CPU_DOS_ATTACK}, \
+    {"CPU_MARTIAN_ADDR", BCM78905_A0_RX_REASON_CPU_MARTIAN_ADDR}, \
+    {"CPU_TUNNEL_ERR", BCM78905_A0_RX_REASON_CPU_TUNNEL_ERR}, \
+    {"CPU_SFLOW_SRC", BCM78905_A0_RX_REASON_CPU_SFLOW_SRC}, \
+    {"CPU_SFLOW_DST", BCM78905_A0_RX_REASON_CPU_SFLOW_DST}, \
+    {"ICMP_REDIRECT", BCM78905_A0_RX_REASON_ICMP_REDIRECT}, \
+    {"L3_SLOWPATH", BCM78905_A0_RX_REASON_L3_SLOWPATH}, \
+    {"PARITY_ERROR", BCM78905_A0_RX_REASON_PARITY_ERROR}, \
+    {"L3_MTU_CHECK_FAIL", BCM78905_A0_RX_REASON_L3_MTU_CHECK_FAIL}, \
+    {"MPLS_TTL_CHECK", BCM78905_A0_RX_REASON_MPLS_TTL_CHECK}, \
+    {"MPLS_LABEL_MISS", BCM78905_A0_RX_REASON_MPLS_LABEL_MISS}, \
+    {"MPLS_INVALID_ACTION", BCM78905_A0_RX_REASON_MPLS_INVALID_ACTION}, \
+    {"MPLS_INVALID_PAYLOAD", BCM78905_A0_RX_REASON_MPLS_INVALID_PAYLOAD}, \
+    {"CPU_VFP", BCM78905_A0_RX_REASON_CPU_VFP}, \
+    {"PBT_NONUC_PKT", BCM78905_A0_RX_REASON_PBT_NONUC_PKT}, \
+    {"L3_NEXT_HOP", BCM78905_A0_RX_REASON_L3_NEXT_HOP}, \
+    {"MY_STATION", BCM78905_A0_RX_REASON_MY_STATION}, \
+    {"TIME_SYNC", BCM78905_A0_RX_REASON_TIME_SYNC}, \
+    {"TUNNEL_DECAP_ECN_ERROR", BCM78905_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \
+    {"BFD_SLOWPATH", BCM78905_A0_RX_REASON_BFD_SLOWPATH}, \
+    {"BFD_ERROR", BCM78905_A0_RX_REASON_BFD_ERROR}, \
+    {"PACKET_TRACE_TO_CPU", BCM78905_A0_RX_REASON_PACKET_TRACE_TO_CPU}, \
+    {"MPLS_UNKNOWN_CONTROL_PKT", BCM78905_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \
+    {"MPLS_ALERT_LABEL", BCM78905_A0_RX_REASON_MPLS_ALERT_LABEL}, \
+    {"CPU_IPMC_INTERFACE_MISMATCH", BCM78905_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \
+    {"DLB_MONITOR", BCM78905_A0_RX_REASON_DLB_MONITOR}, \
+    {"CPU_SFLOW_FLEX", BCM78905_A0_RX_REASON_CPU_SFLOW_FLEX}, \
+    {"CPU_UVLAN", BCM78905_A0_RX_REASON_CPU_UVLAN}, \
+    {"SRV6_ERROR", BCM78905_A0_RX_REASON_SRV6_ERROR}, \
+    {"VXLAN_VN_ID_MISS", BCM78905_A0_RX_REASON_VXLAN_VN_ID_MISS}, \
+    {"VXLAN_SIP_MISS", BCM78905_A0_RX_REASON_VXLAN_SIP_MISS}, \
+    {"ADAPT_MISS", BCM78905_A0_RX_REASON_ADAPT_MISS}, \
+    {"INVALID_GSH_NON_GSH", BCM78905_A0_RX_REASON_INVALID_GSH_NON_GSH}, \
+    {"COUNT", BCM78905_A0_RX_REASON_COUNT}
+
+/* EP_RX_REASON defines */
+#define BCM78905_A0_EP_RX_REASON_EP_CTC                              0
+#define BCM78905_A0_EP_RX_REASON_COUNT                               1
+
+/* EP_RX_REASON name map */
+#define BCM78905_A0_EP_RX_REASON_NAME_MAP_INIT \
+    {"EP_CTC", BCM78905_A0_EP_RX_REASON_EP_CTC}, \
+    {"COUNT", BCM78905_A0_EP_RX_REASON_COUNT}
+
+/* TXPMD defines */
+#define BCM78905_A0_TXPMD_CPU_TX_ECMP_MEMBER_ID                      0
+#define BCM78905_A0_TXPMD_CPU_TX_MCAST_LB_INDEX                      1
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION                         2
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE                    3
+#define BCM78905_A0_TXPMD_CPU_TX_DP                                  4
+#define BCM78905_A0_TXPMD_CPU_TX_INPUT_PRI                           5
+#define BCM78905_A0_TXPMD_CPU_TX_INT_CN                              6
+#define BCM78905_A0_TXPMD_CPU_TX_INT_PRI                             7
+#define BCM78905_A0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD                  8
+#define BCM78905_A0_TXPMD_CPU_TX_PKT_PROFILE                         9
+#define BCM78905_A0_TXPMD_CPU_TX_QOS_FIELDS_VLD                      10
+#define BCM78905_A0_TXPMD_CPU_TX_ROUTED_PKT                          11
+#define BCM78905_A0_TXPMD_CPU_TX_VRF                                 12
+#define BCM78905_A0_TXPMD_CPU_TX_VRF_VALID                           13
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR                  14
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_CNG                         15
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_COS                         16
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION                 17
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE            18
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN 19
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE    20
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM 21
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET 22
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI                   23
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM                   24
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_SPAP                        25
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_SPID                        26
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE               27
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_SRC_MODID                   28
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_TX_TS                       29
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_UNICAST                     30
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE          31
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE               32
+#define BCM78905_A0_TXPMD_HEADER_TYPE                                33
+#define BCM78905_A0_TXPMD_START                                      34
+#define BCM78905_A0_TXPMD_COUNT                                      35
+
+/* TXPMD name map */
+#define BCM78905_A0_TXPMD_NAME_MAP_INIT \
+    {"CPU_TX::ECMP_MEMBER_ID", BCM78905_A0_TXPMD_CPU_TX_ECMP_MEMBER_ID}, \
+    {"CPU_TX::MCAST_LB_INDEX", BCM78905_A0_TXPMD_CPU_TX_MCAST_LB_INDEX}, \
+    {"CPU_TX::DESTINATION", BCM78905_A0_TXPMD_CPU_TX_DESTINATION}, \
+    {"CPU_TX::DESTINATION_TYPE", BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE}, \
+    {"CPU_TX::DP", BCM78905_A0_TXPMD_CPU_TX_DP}, \
+    {"CPU_TX::INPUT_PRI", BCM78905_A0_TXPMD_CPU_TX_INPUT_PRI}, \
+    {"CPU_TX::INT_CN", BCM78905_A0_TXPMD_CPU_TX_INT_CN}, \
+    {"CPU_TX::INT_PRI", BCM78905_A0_TXPMD_CPU_TX_INT_PRI}, \
+    {"CPU_TX::MCAST_LB_INDEX_VLD", BCM78905_A0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD}, \
+    {"CPU_TX::PKT_PROFILE", BCM78905_A0_TXPMD_CPU_TX_PKT_PROFILE}, \
+    {"CPU_TX::QOS_FIELDS_VLD", BCM78905_A0_TXPMD_CPU_TX_QOS_FIELDS_VLD}, \
+    {"CPU_TX::ROUTED_PKT", BCM78905_A0_TXPMD_CPU_TX_ROUTED_PKT}, \
+    {"CPU_TX::VRF", BCM78905_A0_TXPMD_CPU_TX_VRF}, \
+    {"CPU_TX::VRF_VALID", BCM78905_A0_TXPMD_CPU_TX_VRF_VALID}, \
+    {"SOBMH_FROM_CPU::CELL_ERROR", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR}, \
+    {"SOBMH_FROM_CPU::CNG", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_CNG}, \
+    {"SOBMH_FROM_CPU::COS", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_COS}, \
+    {"SOBMH_FROM_CPU::DESTINATION", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION}, \
+    {"SOBMH_FROM_CPU::DESTINATION_TYPE", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE}, \
+    {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE}, \
+    {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"SOBMH_FROM_CPU::INPUT_PRI", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI}, \
+    {"SOBMH_FROM_CPU::RQE_Q_NUM", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM}, \
+    {"SOBMH_FROM_CPU::SPAP", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_SPAP}, \
+    {"SOBMH_FROM_CPU::SPID", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_SPID}, \
+    {"SOBMH_FROM_CPU::SPID_OVERRIDE", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE}, \
+    {"SOBMH_FROM_CPU::SRC_MODID", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_SRC_MODID}, \
+    {"SOBMH_FROM_CPU::TX_TS", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_TX_TS}, \
+    {"SOBMH_FROM_CPU::UNICAST", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_UNICAST}, \
+    {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE}, \
+    {"SOBMH_FROM_CPU::WRED_RESPONSE", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE}, \
+    {"HEADER_TYPE", BCM78905_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM78905_A0_TXPMD_START}, \
+    {"COUNT", BCM78905_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE encodings.
+ * \anchor BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT        0
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI                1
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP               2
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER        3
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC               4
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC               5
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD         6
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID             8
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_INVALID            15
+/*! \} */
+
+/*! BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings maps. */
+#define BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT},\
+    {"NHI", BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI},\
+    {"ECMP", BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP},\
+    {"ECMP_MEMBER", BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER},\
+    {"IPMC", BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC},\
+    {"L2MC", BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC},\
+    {"VLAN_FLOOD", BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD},\
+    {"LAG_ID", BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID},\
+    {"INVALID", BCM78905_A0_TXPMD_CPU_TX_DESTINATION_TYPE_INVALID},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78905_A0_TXPMD_CPU_TX_DP encodings.
+ * \anchor BCM78905_A0_TXPMD_CPU_TX_DP_XXX
+ */
+/*! \{ */
+#define BCM78905_A0_TXPMD_CPU_TX_DP_GREEN                            0
+#define BCM78905_A0_TXPMD_CPU_TX_DP_RED                              1
+#define BCM78905_A0_TXPMD_CPU_TX_DP_YELLOW                           3
+/*! \} */
+
+/*! BCM78905_A0_TXPMD_CPU_TX_DP encoding name strings maps. */
+#define BCM78905_A0_TXPMD_CPU_TX_DP_NAME_MAP_INIT \
+    {"GREEN", BCM78905_A0_TXPMD_CPU_TX_DP_GREEN},\
+    {"RED", BCM78905_A0_TXPMD_CPU_TX_DP_RED},\
+    {"YELLOW", BCM78905_A0_TXPMD_CPU_TX_DP_YELLOW},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encodings.
+ * \anchor BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT 0
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM     7
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID    15
+/*! \} */
+
+/*! BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encoding name strings maps. */
+#define BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT},\
+    {"L2_PBM", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM},\
+    {"INVALID", BCM78905_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78905_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM78905_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78905_A0_TXPMD_HEADER_TYPE_RESERVED                       0
+#define BCM78905_A0_TXPMD_HEADER_TYPE_SOBMH                          1
+#define BCM78905_A0_TXPMD_HEADER_TYPE_CPU_TX                         2
+#define BCM78905_A0_TXPMD_HEADER_TYPE_CTC                            3
+#define BCM78905_A0_TXPMD_HEADER_TYPE_MIRROR_POSTCARD                4
+#define BCM78905_A0_TXPMD_HEADER_TYPE_RESERVED_1                     5
+#define BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_NONE                  6
+#define BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC        7
+#define BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC        8
+#define BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD              9
+#define BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD              10
+#define BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT 11
+#define BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER     12
+#define BCM78905_A0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC_TO_CPU          13
+#define BCM78905_A0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC                 14
+/*! \} */
+
+/*! BCM78905_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM78905_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED", BCM78905_A0_TXPMD_HEADER_TYPE_RESERVED},\
+    {"SOBMH", BCM78905_A0_TXPMD_HEADER_TYPE_SOBMH},\
+    {"CPU_TX", BCM78905_A0_TXPMD_HEADER_TYPE_CPU_TX},\
+    {"CTC", BCM78905_A0_TXPMD_HEADER_TYPE_CTC},\
+    {"MIRROR_POSTCARD", BCM78905_A0_TXPMD_HEADER_TYPE_MIRROR_POSTCARD},\
+    {"RESERVED_1", BCM78905_A0_TXPMD_HEADER_TYPE_RESERVED_1},\
+    {"ETH_TYPE_NONE", BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_NONE},\
+    {"ETH_TYPE_IP_ETH_CLASSIC", BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC},\
+    {"ETH_TYPE_EP_ETH_CLASSIC", BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC},\
+    {"ETH_TYPE_IP_S_MOD", BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD},\
+    {"ETH_TYPE_EP_S_MOD", BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD},\
+    {"ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT", BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT},\
+    {"ETH_TYPE_EP_REDIRECT_OTHER", BCM78905_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER},\
+    {"MIRROR_CLASSIC_TO_CPU", BCM78905_A0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC_TO_CPU},\
+    {"MIRROR_CLASSIC", BCM78905_A0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78905_A0_TXPMD_START encodings.
+ * \anchor BCM78905_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM78905_A0_TXPMD_START_INTERNAL                             2
+/*! \} */
+
+/*! BCM78905_A0_TXPMD_START encoding name strings maps. */
+#define BCM78905_A0_TXPMD_START_NAME_MAP_INIT \
+    {"INTERNAL", BCM78905_A0_TXPMD_START_INTERNAL},\
+    {NULL, 0}
+
+/* LBHDR defines */
+#define BCM78905_A0_LBHDR_VISIBILITY_PKT                             0
+#define BCM78905_A0_LBHDR_VRF_VALID                                  1
+#define BCM78905_A0_LBHDR_ROUTED_PKT                                 2
+#define BCM78905_A0_LBHDR_VRF                                        3
+#define BCM78905_A0_LBHDR_PKT_PROFILE                                4
+#define BCM78905_A0_LBHDR_QOS_FIELD_VALID                            5
+#define BCM78905_A0_LBHDR_PP_PORT                                    6
+#define BCM78905_A0_LBHDR_OPAQUE_OBJECT                              7
+#define BCM78905_A0_LBHDR_QOS_FIELD_ETH                              8
+#define BCM78905_A0_LBHDR_INT_PRI_ETH                                9
+#define BCM78905_A0_LBHDR_INT_CN_ETH                                 10
+#define BCM78905_A0_LBHDR_CNG_ETH                                    11
+#define BCM78905_A0_LBHDR_HEADER_TYPE                                12
+#define BCM78905_A0_LBHDR_START                                      13
+#define BCM78905_A0_LBHDR_COUNT                                      14
+
+/* LBHDR name map */
+#define BCM78905_A0_LBHDR_NAME_MAP_INIT \
+    {"VISIBILITY_PKT", BCM78905_A0_LBHDR_VISIBILITY_PKT}, \
+    {"VRF_VALID", BCM78905_A0_LBHDR_VRF_VALID}, \
+    {"ROUTED_PKT", BCM78905_A0_LBHDR_ROUTED_PKT}, \
+    {"VRF", BCM78905_A0_LBHDR_VRF}, \
+    {"PKT_PROFILE", BCM78905_A0_LBHDR_PKT_PROFILE}, \
+    {"QOS_FIELD_VALID", BCM78905_A0_LBHDR_QOS_FIELD_VALID}, \
+    {"PP_PORT", BCM78905_A0_LBHDR_PP_PORT}, \
+    {"OPAQUE_OBJECT", BCM78905_A0_LBHDR_OPAQUE_OBJECT}, \
+    {"QOS_FIELD_ETH", BCM78905_A0_LBHDR_QOS_FIELD_ETH}, \
+    {"INT_PRI_ETH", BCM78905_A0_LBHDR_INT_PRI_ETH}, \
+    {"INT_CN_ETH", BCM78905_A0_LBHDR_INT_CN_ETH}, \
+    {"CNG_ETH", BCM78905_A0_LBHDR_CNG_ETH}, \
+    {"HEADER_TYPE", BCM78905_A0_LBHDR_HEADER_TYPE}, \
+    {"START", BCM78905_A0_LBHDR_START}, \
+    {"COUNT", BCM78905_A0_LBHDR_COUNT}
+
+/*!
+ * \name BCM78905_A0_LBHDR_HEADER_TYPE encodings.
+ * \anchor BCM78905_A0_LBHDR_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78905_A0_LBHDR_HEADER_TYPE_LOOPBACK_MH                    7
+/*! \} */
+
+/*! BCM78905_A0_LBHDR_HEADER_TYPE encoding name strings maps. */
+#define BCM78905_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \
+    {"LOOPBACK_MH", BCM78905_A0_LBHDR_HEADER_TYPE_LOOPBACK_MH},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78905_A0_LBHDR_START encodings.
+ * \anchor BCM78905_A0_LBHDR_START_XXX
+ */
+/*! \{ */
+#define BCM78905_A0_LBHDR_START_INTERNAL                             2
+/*! \} */
+
+/*! BCM78905_A0_LBHDR_START encoding name strings maps. */
+#define BCM78905_A0_LBHDR_START_NAME_MAP_INIT \
+    {"INTERNAL", BCM78905_A0_LBHDR_START_INTERNAL},\
+    {NULL, 0}
+
+#endif /* BCM78905_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.h
new file mode 100644
index 00000000000..aa98c594749
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.h
@@ -0,0 +1,522 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides PMD field defines for BCM78907_A0.
+ *
+ ******************************************************************************/
+
+#ifndef BCM78907_A0_PMD_FIELD_H
+#define BCM78907_A0_PMD_FIELD_H
+
+/* RXPMD defines */
+#define BCM78907_A0_RXPMD_REASON                                     0
+#define BCM78907_A0_RXPMD_REASON_TYPE                                1
+#define BCM78907_A0_RXPMD_ING_L3_INTF                                2
+#define BCM78907_A0_RXPMD_I2E_CLASSID                                3
+#define BCM78907_A0_RXPMD_RX_BFD_SESSION_INDEX                       4
+#define BCM78907_A0_RXPMD_I2E_CLASSID_TYPE                           5
+#define BCM78907_A0_RXPMD_RX_BFD_START_OFFSET_TYPE                   6
+#define BCM78907_A0_RXPMD_RX_BFD_START_OFFSET                        7
+#define BCM78907_A0_RXPMD_ING_L3_INTF_VALID                          8
+#define BCM78907_A0_RXPMD_CPU_COS                                    9
+#define BCM78907_A0_RXPMD_QUEUE_NUM                                  10
+#define BCM78907_A0_RXPMD_INCOMING_TAG_STATUS                        11
+#define BCM78907_A0_RXPMD_ING_OTAG_ACTION                            12
+#define BCM78907_A0_RXPMD_PKT_LENGTH                                 13
+#define BCM78907_A0_RXPMD_O_NHI                                      14
+#define BCM78907_A0_RXPMD_INCOMING_OPAQUE_TAG_STATUS                 15
+#define BCM78907_A0_RXPMD_BPDU                                       16
+#define BCM78907_A0_RXPMD_CHANGE_DSCP                                17
+#define BCM78907_A0_RXPMD_CHANGE_ECN                                 18
+#define BCM78907_A0_RXPMD_DLB_ID_VALID                               19
+#define BCM78907_A0_RXPMD_DO_NOT_CHANGE_TTL                          20
+#define BCM78907_A0_RXPMD_DSCP                                       21
+#define BCM78907_A0_RXPMD_SPECIAL_PACKET_TYPE                        22
+#define BCM78907_A0_RXPMD_ECN                                        23
+#define BCM78907_A0_RXPMD_IP_ROUTED                                  24
+#define BCM78907_A0_RXPMD_L3ONLY                                     25
+#define BCM78907_A0_RXPMD_MATCHED_RULE                               26
+#define BCM78907_A0_RXPMD_MTP_INDEX                                  27
+#define BCM78907_A0_RXPMD_OUTER_CFI                                  28
+#define BCM78907_A0_RXPMD_OUTER_PRI                                  29
+#define BCM78907_A0_RXPMD_OUTER_VID                                  30
+#define BCM78907_A0_RXPMD_REPLICATION_OR_NHOP_INDEX                  31
+#define BCM78907_A0_RXPMD_REGEN_CRC                                  32
+#define BCM78907_A0_RXPMD_ENTROPY_LABEL                              33
+#define BCM78907_A0_RXPMD_SPECIAL_PACKET_INDICATOR                   34
+#define BCM78907_A0_RXPMD_SRC_PORT_NUM                               35
+#define BCM78907_A0_RXPMD_SWITCH                                     36
+#define BCM78907_A0_RXPMD_TIMESTAMP                                  37
+#define BCM78907_A0_RXPMD_TIMESTAMP_HI                               38
+#define BCM78907_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED             39
+#define BCM78907_A0_RXPMD_TUNNEL_DECAP_TYPE                          40
+#define BCM78907_A0_RXPMD_UC_SW_COPY_DROPPED                         41
+#define BCM78907_A0_RXPMD_UNICAST_QUEUE                              42
+#define BCM78907_A0_RXPMD_INCOMING_INT_HDR_TYPE                      43
+#define BCM78907_A0_RXPMD_DLB_ID                                     44
+#define BCM78907_A0_RXPMD_MODULE_HDR                                 45
+#define BCM78907_A0_RXPMD_COUNT                                      46
+
+/* RXPMD name map */
+#define BCM78907_A0_RXPMD_NAME_MAP_INIT \
+    {"REASON", BCM78907_A0_RXPMD_REASON}, \
+    {"REASON_TYPE", BCM78907_A0_RXPMD_REASON_TYPE}, \
+    {"ING_L3_INTF", BCM78907_A0_RXPMD_ING_L3_INTF}, \
+    {"I2E_CLASSID", BCM78907_A0_RXPMD_I2E_CLASSID}, \
+    {"RX_BFD_SESSION_INDEX", BCM78907_A0_RXPMD_RX_BFD_SESSION_INDEX}, \
+    {"I2E_CLASSID_TYPE", BCM78907_A0_RXPMD_I2E_CLASSID_TYPE}, \
+    {"RX_BFD_START_OFFSET_TYPE", BCM78907_A0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \
+    {"RX_BFD_START_OFFSET", BCM78907_A0_RXPMD_RX_BFD_START_OFFSET}, \
+    {"ING_L3_INTF_VALID", BCM78907_A0_RXPMD_ING_L3_INTF_VALID}, \
+    {"CPU_COS", BCM78907_A0_RXPMD_CPU_COS}, \
+    {"QUEUE_NUM", BCM78907_A0_RXPMD_QUEUE_NUM}, \
+    {"INCOMING_TAG_STATUS", BCM78907_A0_RXPMD_INCOMING_TAG_STATUS}, \
+    {"ING_OTAG_ACTION", BCM78907_A0_RXPMD_ING_OTAG_ACTION}, \
+    {"PKT_LENGTH", BCM78907_A0_RXPMD_PKT_LENGTH}, \
+    {"O_NHI", BCM78907_A0_RXPMD_O_NHI}, \
+    {"INCOMING_OPAQUE_TAG_STATUS", BCM78907_A0_RXPMD_INCOMING_OPAQUE_TAG_STATUS}, \
+    {"BPDU", BCM78907_A0_RXPMD_BPDU}, \
+    {"CHANGE_DSCP", BCM78907_A0_RXPMD_CHANGE_DSCP}, \
+    {"CHANGE_ECN", BCM78907_A0_RXPMD_CHANGE_ECN}, \
+    {"DLB_ID_VALID", BCM78907_A0_RXPMD_DLB_ID_VALID}, \
+    {"DO_NOT_CHANGE_TTL", BCM78907_A0_RXPMD_DO_NOT_CHANGE_TTL}, \
+    {"DSCP", BCM78907_A0_RXPMD_DSCP}, \
+    {"SPECIAL_PACKET_TYPE", BCM78907_A0_RXPMD_SPECIAL_PACKET_TYPE}, \
+    {"ECN", BCM78907_A0_RXPMD_ECN}, \
+    {"IP_ROUTED", BCM78907_A0_RXPMD_IP_ROUTED}, \
+    {"L3ONLY", BCM78907_A0_RXPMD_L3ONLY}, \
+    {"MATCHED_RULE", BCM78907_A0_RXPMD_MATCHED_RULE}, \
+    {"MTP_INDEX", BCM78907_A0_RXPMD_MTP_INDEX}, \
+    {"OUTER_CFI", BCM78907_A0_RXPMD_OUTER_CFI}, \
+    {"OUTER_PRI", BCM78907_A0_RXPMD_OUTER_PRI}, \
+    {"OUTER_VID", BCM78907_A0_RXPMD_OUTER_VID}, \
+    {"REPLICATION_OR_NHOP_INDEX", BCM78907_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \
+    {"REGEN_CRC", BCM78907_A0_RXPMD_REGEN_CRC}, \
+    {"ENTROPY_LABEL", BCM78907_A0_RXPMD_ENTROPY_LABEL}, \
+    {"SPECIAL_PACKET_INDICATOR", BCM78907_A0_RXPMD_SPECIAL_PACKET_INDICATOR}, \
+    {"SRC_PORT_NUM", BCM78907_A0_RXPMD_SRC_PORT_NUM}, \
+    {"SWITCH", BCM78907_A0_RXPMD_SWITCH}, \
+    {"TIMESTAMP", BCM78907_A0_RXPMD_TIMESTAMP}, \
+    {"TIMESTAMP_HI", BCM78907_A0_RXPMD_TIMESTAMP_HI}, \
+    {"IEEE_802_1AS_TIMESTAMP_ENABLED", BCM78907_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED}, \
+    {"TUNNEL_DECAP_TYPE", BCM78907_A0_RXPMD_TUNNEL_DECAP_TYPE}, \
+    {"UC_SW_COPY_DROPPED", BCM78907_A0_RXPMD_UC_SW_COPY_DROPPED}, \
+    {"UNICAST_QUEUE", BCM78907_A0_RXPMD_UNICAST_QUEUE}, \
+    {"INCOMING_INT_HDR_TYPE", BCM78907_A0_RXPMD_INCOMING_INT_HDR_TYPE}, \
+    {"DLB_ID", BCM78907_A0_RXPMD_DLB_ID}, \
+    {"MODULE_HDR", BCM78907_A0_RXPMD_MODULE_HDR}, \
+    {"COUNT", BCM78907_A0_RXPMD_COUNT}
+
+/*!
+ * \name BCM78907_A0_RXPMD_REASON_TYPE encodings.
+ * \anchor BCM78907_A0_RXPMD_REASON_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78907_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP          0
+#define BCM78907_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP          1
+/*! \} */
+
+/*! BCM78907_A0_RXPMD_REASON_TYPE encoding name strings maps. */
+#define BCM78907_A0_RXPMD_REASON_TYPE_NAME_MAP_INIT \
+    {"CTC_INITIATED_FROM_IP", BCM78907_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP},\
+    {"CTC_INITIATED_FROM_EP", BCM78907_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78907_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED encodings.
+ * \anchor BCM78907_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_XXX
+ */
+/*! \{ */
+#define BCM78907_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_INVALID     0
+#define BCM78907_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_IEEE_802_1AS 1
+/*! \} */
+
+/*! BCM78907_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED encoding name strings maps. */
+#define BCM78907_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_NAME_MAP_INIT \
+    {"INVALID", BCM78907_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_INVALID},\
+    {"IEEE_802_1AS", BCM78907_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED_IEEE_802_1AS},\
+    {NULL, 0}
+
+/* RX_REASON defines */
+#define BCM78907_A0_RX_REASON_CPU_INVALID_REASON                     0
+#define BCM78907_A0_RX_REASON_CPU_SLF                                1
+#define BCM78907_A0_RX_REASON_CPU_DLF                                2
+#define BCM78907_A0_RX_REASON_CPU_L2MOVE                             3
+#define BCM78907_A0_RX_REASON_CPU_L2CPU                              4
+#define BCM78907_A0_RX_REASON_CPU_L3SRC_MISS                         5
+#define BCM78907_A0_RX_REASON_CPU_L3DST_MISS                         6
+#define BCM78907_A0_RX_REASON_CPU_L3SRC_MOVE                         7
+#define BCM78907_A0_RX_REASON_CPU_MC_MISS                            8
+#define BCM78907_A0_RX_REASON_CPU_IPMC_MISS                          9
+#define BCM78907_A0_RX_REASON_CPU_FFP                                10
+#define BCM78907_A0_RX_REASON_CPU_L3HDR_ERR                          11
+#define BCM78907_A0_RX_REASON_CPU_PROTOCOL_PKT                       12
+#define BCM78907_A0_RX_REASON_CPU_DOS_ATTACK                         13
+#define BCM78907_A0_RX_REASON_CPU_MARTIAN_ADDR                       14
+#define BCM78907_A0_RX_REASON_CPU_TUNNEL_ERR                         15
+#define BCM78907_A0_RX_REASON_CPU_SFLOW_SRC                          16
+#define BCM78907_A0_RX_REASON_CPU_SFLOW_DST                          17
+#define BCM78907_A0_RX_REASON_ICMP_REDIRECT                          18
+#define BCM78907_A0_RX_REASON_L3_SLOWPATH                            19
+#define BCM78907_A0_RX_REASON_PARITY_ERROR                           20
+#define BCM78907_A0_RX_REASON_L3_MTU_CHECK_FAIL                      21
+#define BCM78907_A0_RX_REASON_MPLS_TTL_CHECK                         22
+#define BCM78907_A0_RX_REASON_MPLS_LABEL_MISS                        23
+#define BCM78907_A0_RX_REASON_MPLS_INVALID_ACTION                    24
+#define BCM78907_A0_RX_REASON_MPLS_INVALID_PAYLOAD                   25
+#define BCM78907_A0_RX_REASON_CPU_VFP                                26
+#define BCM78907_A0_RX_REASON_PBT_NONUC_PKT                          27
+#define BCM78907_A0_RX_REASON_L3_NEXT_HOP                            28
+#define BCM78907_A0_RX_REASON_MY_STATION                             29
+#define BCM78907_A0_RX_REASON_TIME_SYNC                              30
+#define BCM78907_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR                 31
+#define BCM78907_A0_RX_REASON_BFD_SLOWPATH                           32
+#define BCM78907_A0_RX_REASON_BFD_ERROR                              33
+#define BCM78907_A0_RX_REASON_PACKET_TRACE_TO_CPU                    34
+#define BCM78907_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT               35
+#define BCM78907_A0_RX_REASON_MPLS_ALERT_LABEL                       36
+#define BCM78907_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH            37
+#define BCM78907_A0_RX_REASON_DLB_MONITOR                            38
+#define BCM78907_A0_RX_REASON_CPU_SFLOW_FLEX                         39
+#define BCM78907_A0_RX_REASON_CPU_UVLAN                              40
+#define BCM78907_A0_RX_REASON_SRV6_ERROR                             41
+#define BCM78907_A0_RX_REASON_VXLAN_VN_ID_MISS                       42
+#define BCM78907_A0_RX_REASON_VXLAN_SIP_MISS                         43
+#define BCM78907_A0_RX_REASON_ADAPT_MISS                             44
+#define BCM78907_A0_RX_REASON_INVALID_GSH_NON_GSH                    45
+#define BCM78907_A0_RX_REASON_COUNT                                  46
+
+/* RX_REASON name map */
+#define BCM78907_A0_RX_REASON_NAME_MAP_INIT \
+    {"CPU_INVALID_REASON", BCM78907_A0_RX_REASON_CPU_INVALID_REASON}, \
+    {"CPU_SLF", BCM78907_A0_RX_REASON_CPU_SLF}, \
+    {"CPU_DLF", BCM78907_A0_RX_REASON_CPU_DLF}, \
+    {"CPU_L2MOVE", BCM78907_A0_RX_REASON_CPU_L2MOVE}, \
+    {"CPU_L2CPU", BCM78907_A0_RX_REASON_CPU_L2CPU}, \
+    {"CPU_L3SRC_MISS", BCM78907_A0_RX_REASON_CPU_L3SRC_MISS}, \
+    {"CPU_L3DST_MISS", BCM78907_A0_RX_REASON_CPU_L3DST_MISS}, \
+    {"CPU_L3SRC_MOVE", BCM78907_A0_RX_REASON_CPU_L3SRC_MOVE}, \
+    {"CPU_MC_MISS", BCM78907_A0_RX_REASON_CPU_MC_MISS}, \
+    {"CPU_IPMC_MISS", BCM78907_A0_RX_REASON_CPU_IPMC_MISS}, \
+    {"CPU_FFP", BCM78907_A0_RX_REASON_CPU_FFP}, \
+    {"CPU_L3HDR_ERR", BCM78907_A0_RX_REASON_CPU_L3HDR_ERR}, \
+    {"CPU_PROTOCOL_PKT", BCM78907_A0_RX_REASON_CPU_PROTOCOL_PKT}, \
+    {"CPU_DOS_ATTACK", BCM78907_A0_RX_REASON_CPU_DOS_ATTACK}, \
+    {"CPU_MARTIAN_ADDR", BCM78907_A0_RX_REASON_CPU_MARTIAN_ADDR}, \
+    {"CPU_TUNNEL_ERR", BCM78907_A0_RX_REASON_CPU_TUNNEL_ERR}, \
+    {"CPU_SFLOW_SRC", BCM78907_A0_RX_REASON_CPU_SFLOW_SRC}, \
+    {"CPU_SFLOW_DST", BCM78907_A0_RX_REASON_CPU_SFLOW_DST}, \
+    {"ICMP_REDIRECT", BCM78907_A0_RX_REASON_ICMP_REDIRECT}, \
+    {"L3_SLOWPATH", BCM78907_A0_RX_REASON_L3_SLOWPATH}, \
+    {"PARITY_ERROR", BCM78907_A0_RX_REASON_PARITY_ERROR}, \
+    {"L3_MTU_CHECK_FAIL", BCM78907_A0_RX_REASON_L3_MTU_CHECK_FAIL}, \
+    {"MPLS_TTL_CHECK", BCM78907_A0_RX_REASON_MPLS_TTL_CHECK}, \
+    {"MPLS_LABEL_MISS", BCM78907_A0_RX_REASON_MPLS_LABEL_MISS}, \
+    {"MPLS_INVALID_ACTION", BCM78907_A0_RX_REASON_MPLS_INVALID_ACTION}, \
+    {"MPLS_INVALID_PAYLOAD", BCM78907_A0_RX_REASON_MPLS_INVALID_PAYLOAD}, \
+    {"CPU_VFP", BCM78907_A0_RX_REASON_CPU_VFP}, \
+    {"PBT_NONUC_PKT", BCM78907_A0_RX_REASON_PBT_NONUC_PKT}, \
+    {"L3_NEXT_HOP", BCM78907_A0_RX_REASON_L3_NEXT_HOP}, \
+    {"MY_STATION", BCM78907_A0_RX_REASON_MY_STATION}, \
+    {"TIME_SYNC", BCM78907_A0_RX_REASON_TIME_SYNC}, \
+    {"TUNNEL_DECAP_ECN_ERROR", BCM78907_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \
+    {"BFD_SLOWPATH", BCM78907_A0_RX_REASON_BFD_SLOWPATH}, \
+    {"BFD_ERROR", BCM78907_A0_RX_REASON_BFD_ERROR}, \
+    {"PACKET_TRACE_TO_CPU", BCM78907_A0_RX_REASON_PACKET_TRACE_TO_CPU}, \
+    {"MPLS_UNKNOWN_CONTROL_PKT", BCM78907_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \
+    {"MPLS_ALERT_LABEL", BCM78907_A0_RX_REASON_MPLS_ALERT_LABEL}, \
+    {"CPU_IPMC_INTERFACE_MISMATCH", BCM78907_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \
+    {"DLB_MONITOR", BCM78907_A0_RX_REASON_DLB_MONITOR}, \
+    {"CPU_SFLOW_FLEX", BCM78907_A0_RX_REASON_CPU_SFLOW_FLEX}, \
+    {"CPU_UVLAN", BCM78907_A0_RX_REASON_CPU_UVLAN}, \
+    {"SRV6_ERROR", BCM78907_A0_RX_REASON_SRV6_ERROR}, \
+    {"VXLAN_VN_ID_MISS", BCM78907_A0_RX_REASON_VXLAN_VN_ID_MISS}, \
+    {"VXLAN_SIP_MISS", BCM78907_A0_RX_REASON_VXLAN_SIP_MISS}, \
+    {"ADAPT_MISS", BCM78907_A0_RX_REASON_ADAPT_MISS}, \
+    {"INVALID_GSH_NON_GSH", BCM78907_A0_RX_REASON_INVALID_GSH_NON_GSH}, \
+    {"COUNT", BCM78907_A0_RX_REASON_COUNT}
+
+/* EP_RX_REASON defines */
+#define BCM78907_A0_EP_RX_REASON_EP_CTC                              0
+#define BCM78907_A0_EP_RX_REASON_COUNT                               1
+
+/* EP_RX_REASON name map */
+#define BCM78907_A0_EP_RX_REASON_NAME_MAP_INIT \
+    {"EP_CTC", BCM78907_A0_EP_RX_REASON_EP_CTC}, \
+    {"COUNT", BCM78907_A0_EP_RX_REASON_COUNT}
+
+/* TXPMD defines */
+#define BCM78907_A0_TXPMD_CPU_TX_ECMP_MEMBER_ID                      0
+#define BCM78907_A0_TXPMD_CPU_TX_MCAST_LB_INDEX                      1
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION                         2
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE                    3
+#define BCM78907_A0_TXPMD_CPU_TX_DP                                  4
+#define BCM78907_A0_TXPMD_CPU_TX_INPUT_PRI                           5
+#define BCM78907_A0_TXPMD_CPU_TX_INT_CN                              6
+#define BCM78907_A0_TXPMD_CPU_TX_INT_PRI                             7
+#define BCM78907_A0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD                  8
+#define BCM78907_A0_TXPMD_CPU_TX_PKT_PROFILE                         9
+#define BCM78907_A0_TXPMD_CPU_TX_QOS_FIELDS_VLD                      10
+#define BCM78907_A0_TXPMD_CPU_TX_ROUTED_PKT                          11
+#define BCM78907_A0_TXPMD_CPU_TX_VRF                                 12
+#define BCM78907_A0_TXPMD_CPU_TX_VRF_VALID                           13
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR                  14
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_CNG                         15
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_COS                         16
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION                 17
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE            18
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN 19
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE    20
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM 21
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET 22
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI                   23
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM                   24
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_SPAP                        25
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_SPID                        26
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE               27
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_SRC_MODID                   28
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_TX_TS                       29
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_UNICAST                     30
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE          31
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE               32
+#define BCM78907_A0_TXPMD_HEADER_TYPE                                33
+#define BCM78907_A0_TXPMD_START                                      34
+#define BCM78907_A0_TXPMD_COUNT                                      35
+
+/* TXPMD name map */
+#define BCM78907_A0_TXPMD_NAME_MAP_INIT \
+    {"CPU_TX::ECMP_MEMBER_ID", BCM78907_A0_TXPMD_CPU_TX_ECMP_MEMBER_ID}, \
+    {"CPU_TX::MCAST_LB_INDEX", BCM78907_A0_TXPMD_CPU_TX_MCAST_LB_INDEX}, \
+    {"CPU_TX::DESTINATION", BCM78907_A0_TXPMD_CPU_TX_DESTINATION}, \
+    {"CPU_TX::DESTINATION_TYPE", BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE}, \
+    {"CPU_TX::DP", BCM78907_A0_TXPMD_CPU_TX_DP}, \
+    {"CPU_TX::INPUT_PRI", BCM78907_A0_TXPMD_CPU_TX_INPUT_PRI}, \
+    {"CPU_TX::INT_CN", BCM78907_A0_TXPMD_CPU_TX_INT_CN}, \
+    {"CPU_TX::INT_PRI", BCM78907_A0_TXPMD_CPU_TX_INT_PRI}, \
+    {"CPU_TX::MCAST_LB_INDEX_VLD", BCM78907_A0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD}, \
+    {"CPU_TX::PKT_PROFILE", BCM78907_A0_TXPMD_CPU_TX_PKT_PROFILE}, \
+    {"CPU_TX::QOS_FIELDS_VLD", BCM78907_A0_TXPMD_CPU_TX_QOS_FIELDS_VLD}, \
+    {"CPU_TX::ROUTED_PKT", BCM78907_A0_TXPMD_CPU_TX_ROUTED_PKT}, \
+    {"CPU_TX::VRF", BCM78907_A0_TXPMD_CPU_TX_VRF}, \
+    {"CPU_TX::VRF_VALID", BCM78907_A0_TXPMD_CPU_TX_VRF_VALID}, \
+    {"SOBMH_FROM_CPU::CELL_ERROR", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR}, \
+    {"SOBMH_FROM_CPU::CNG", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_CNG}, \
+    {"SOBMH_FROM_CPU::COS", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_COS}, \
+    {"SOBMH_FROM_CPU::DESTINATION", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION}, \
+    {"SOBMH_FROM_CPU::DESTINATION_TYPE", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE}, \
+    {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \
+    {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE}, \
+    {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM}, \
+    {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET}, \
+    {"SOBMH_FROM_CPU::INPUT_PRI", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI}, \
+    {"SOBMH_FROM_CPU::RQE_Q_NUM", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM}, \
+    {"SOBMH_FROM_CPU::SPAP", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_SPAP}, \
+    {"SOBMH_FROM_CPU::SPID", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_SPID}, \
+    {"SOBMH_FROM_CPU::SPID_OVERRIDE", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE}, \
+    {"SOBMH_FROM_CPU::SRC_MODID", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_SRC_MODID}, \
+    {"SOBMH_FROM_CPU::TX_TS", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_TX_TS}, \
+    {"SOBMH_FROM_CPU::UNICAST", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_UNICAST}, \
+    {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE}, \
+    {"SOBMH_FROM_CPU::WRED_RESPONSE", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE}, \
+    {"HEADER_TYPE", BCM78907_A0_TXPMD_HEADER_TYPE}, \
+    {"START", BCM78907_A0_TXPMD_START}, \
+    {"COUNT", BCM78907_A0_TXPMD_COUNT}
+
+/*!
+ * \name BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE encodings.
+ * \anchor BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT        0
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI                1
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP               2
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER        3
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC               4
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC               5
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD         6
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID             8
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_INVALID            15
+/*! \} */
+
+/*! BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings maps. */
+#define BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT},\
+    {"NHI", BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI},\
+    {"ECMP", BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP},\
+    {"ECMP_MEMBER", BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER},\
+    {"IPMC", BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC},\
+    {"L2MC", BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC},\
+    {"VLAN_FLOOD", BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD},\
+    {"LAG_ID", BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID},\
+    {"INVALID", BCM78907_A0_TXPMD_CPU_TX_DESTINATION_TYPE_INVALID},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78907_A0_TXPMD_CPU_TX_DP encodings.
+ * \anchor BCM78907_A0_TXPMD_CPU_TX_DP_XXX
+ */
+/*! \{ */
+#define BCM78907_A0_TXPMD_CPU_TX_DP_GREEN                            0
+#define BCM78907_A0_TXPMD_CPU_TX_DP_RED                              1
+#define BCM78907_A0_TXPMD_CPU_TX_DP_YELLOW                           3
+/*! \} */
+
+/*! BCM78907_A0_TXPMD_CPU_TX_DP encoding name strings maps. */
+#define BCM78907_A0_TXPMD_CPU_TX_DP_NAME_MAP_INIT \
+    {"GREEN", BCM78907_A0_TXPMD_CPU_TX_DP_GREEN},\
+    {"RED", BCM78907_A0_TXPMD_CPU_TX_DP_RED},\
+    {"YELLOW", BCM78907_A0_TXPMD_CPU_TX_DP_YELLOW},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encodings.
+ * \anchor BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT 0
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM     7
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID    15
+/*! \} */
+
+/*! BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encoding name strings maps. */
+#define BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT},\
+    {"L2_PBM", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM},\
+    {"INVALID", BCM78907_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78907_A0_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCM78907_A0_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78907_A0_TXPMD_HEADER_TYPE_RESERVED                       0
+#define BCM78907_A0_TXPMD_HEADER_TYPE_SOBMH                          1
+#define BCM78907_A0_TXPMD_HEADER_TYPE_CPU_TX                         2
+#define BCM78907_A0_TXPMD_HEADER_TYPE_CTC                            3
+#define BCM78907_A0_TXPMD_HEADER_TYPE_MIRROR_POSTCARD                4
+#define BCM78907_A0_TXPMD_HEADER_TYPE_RESERVED_1                     5
+#define BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_NONE                  6
+#define BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC        7
+#define BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC        8
+#define BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD              9
+#define BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD              10
+#define BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT 11
+#define BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER     12
+#define BCM78907_A0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC_TO_CPU          13
+#define BCM78907_A0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC                 14
+/*! \} */
+
+/*! BCM78907_A0_TXPMD_HEADER_TYPE encoding name strings maps. */
+#define BCM78907_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"RESERVED", BCM78907_A0_TXPMD_HEADER_TYPE_RESERVED},\
+    {"SOBMH", BCM78907_A0_TXPMD_HEADER_TYPE_SOBMH},\
+    {"CPU_TX", BCM78907_A0_TXPMD_HEADER_TYPE_CPU_TX},\
+    {"CTC", BCM78907_A0_TXPMD_HEADER_TYPE_CTC},\
+    {"MIRROR_POSTCARD", BCM78907_A0_TXPMD_HEADER_TYPE_MIRROR_POSTCARD},\
+    {"RESERVED_1", BCM78907_A0_TXPMD_HEADER_TYPE_RESERVED_1},\
+    {"ETH_TYPE_NONE", BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_NONE},\
+    {"ETH_TYPE_IP_ETH_CLASSIC", BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC},\
+    {"ETH_TYPE_EP_ETH_CLASSIC", BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC},\
+    {"ETH_TYPE_IP_S_MOD", BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD},\
+    {"ETH_TYPE_EP_S_MOD", BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD},\
+    {"ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT", BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT},\
+    {"ETH_TYPE_EP_REDIRECT_OTHER", BCM78907_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER},\
+    {"MIRROR_CLASSIC_TO_CPU", BCM78907_A0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC_TO_CPU},\
+    {"MIRROR_CLASSIC", BCM78907_A0_TXPMD_HEADER_TYPE_MIRROR_CLASSIC},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78907_A0_TXPMD_START encodings.
+ * \anchor BCM78907_A0_TXPMD_START_XXX
+ */
+/*! \{ */
+#define BCM78907_A0_TXPMD_START_INTERNAL                             2
+/*! \} */
+
+/*! BCM78907_A0_TXPMD_START encoding name strings maps. */
+#define BCM78907_A0_TXPMD_START_NAME_MAP_INIT \
+    {"INTERNAL", BCM78907_A0_TXPMD_START_INTERNAL},\
+    {NULL, 0}
+
+/* LBHDR defines */
+#define BCM78907_A0_LBHDR_VISIBILITY_PKT                             0
+#define BCM78907_A0_LBHDR_VRF_VALID                                  1
+#define BCM78907_A0_LBHDR_ROUTED_PKT                                 2
+#define BCM78907_A0_LBHDR_VRF                                        3
+#define BCM78907_A0_LBHDR_PKT_PROFILE                                4
+#define BCM78907_A0_LBHDR_QOS_FIELD_VALID                            5
+#define BCM78907_A0_LBHDR_PP_PORT                                    6
+#define BCM78907_A0_LBHDR_OPAQUE_OBJECT                              7
+#define BCM78907_A0_LBHDR_QOS_FIELD_ETH                              8
+#define BCM78907_A0_LBHDR_INT_PRI_ETH                                9
+#define BCM78907_A0_LBHDR_INT_CN_ETH                                 10
+#define BCM78907_A0_LBHDR_CNG_ETH                                    11
+#define BCM78907_A0_LBHDR_HEADER_TYPE                                12
+#define BCM78907_A0_LBHDR_START                                      13
+#define BCM78907_A0_LBHDR_COUNT                                      14
+
+/* LBHDR name map */
+#define BCM78907_A0_LBHDR_NAME_MAP_INIT \
+    {"VISIBILITY_PKT", BCM78907_A0_LBHDR_VISIBILITY_PKT}, \
+    {"VRF_VALID", BCM78907_A0_LBHDR_VRF_VALID}, \
+    {"ROUTED_PKT", BCM78907_A0_LBHDR_ROUTED_PKT}, \
+    {"VRF", BCM78907_A0_LBHDR_VRF}, \
+    {"PKT_PROFILE", BCM78907_A0_LBHDR_PKT_PROFILE}, \
+    {"QOS_FIELD_VALID", BCM78907_A0_LBHDR_QOS_FIELD_VALID}, \
+    {"PP_PORT", BCM78907_A0_LBHDR_PP_PORT}, \
+    {"OPAQUE_OBJECT", BCM78907_A0_LBHDR_OPAQUE_OBJECT}, \
+    {"QOS_FIELD_ETH", BCM78907_A0_LBHDR_QOS_FIELD_ETH}, \
+    {"INT_PRI_ETH", BCM78907_A0_LBHDR_INT_PRI_ETH}, \
+    {"INT_CN_ETH", BCM78907_A0_LBHDR_INT_CN_ETH}, \
+    {"CNG_ETH", BCM78907_A0_LBHDR_CNG_ETH}, \
+    {"HEADER_TYPE", BCM78907_A0_LBHDR_HEADER_TYPE}, \
+    {"START", BCM78907_A0_LBHDR_START}, \
+    {"COUNT", BCM78907_A0_LBHDR_COUNT}
+
+/*!
+ * \name BCM78907_A0_LBHDR_HEADER_TYPE encodings.
+ * \anchor BCM78907_A0_LBHDR_HEADER_TYPE_XXX
+ */
+/*! \{ */
+#define BCM78907_A0_LBHDR_HEADER_TYPE_LOOPBACK_MH                    7
+/*! \} */
+
+/*! BCM78907_A0_LBHDR_HEADER_TYPE encoding name strings maps. */
+#define BCM78907_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \
+    {"LOOPBACK_MH", BCM78907_A0_LBHDR_HEADER_TYPE_LOOPBACK_MH},\
+    {NULL, 0}
+
+/*!
+ * \name BCM78907_A0_LBHDR_START encodings.
+ * \anchor BCM78907_A0_LBHDR_START_XXX
+ */
+/*! \{ */
+#define BCM78907_A0_LBHDR_START_INTERNAL                             2
+/*! \} */
+
+/*! BCM78907_A0_LBHDR_START encoding name strings maps. */
+#define BCM78907_A0_LBHDR_START_NAME_MAP_INIT \
+    {"INTERNAL", BCM78907_A0_LBHDR_START_INTERNAL},\
+    {NULL, 0}
+
+#endif /* BCM78907_A0_PMD_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h
deleted file mode 100644
index e439f6b7b41..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,168 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_H
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T                      0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T                   1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T                      2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T                    3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T         4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T         5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T              6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T            7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T        8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T         9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T                      10
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T                11
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T                     12
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T        13
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T         14
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T                      15
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T               16
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T                  17
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T                 18
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T                  19
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T                      20
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T                 21
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T          22
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T               23
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T                     24
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T               25
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T           26
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T           27
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T        28
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T                     29
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T                 30
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T                    31
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T                     32
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T                     33
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T                       34
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T         35
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T         36
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T                 37
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T                  38
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T                  39
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T                     40
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T                   41
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T             42
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T                  43
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T                  44
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   45
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   46
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T                     47
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T                  48
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T                    49
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T             50
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T             51
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T             52
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T                 53
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T         54
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T         55
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T                      56
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T               57
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T               58
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T               59
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T                     60
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T                    61
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T                     62
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_T               63
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT    64
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T},\
-    {"authen_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T},\
-    {"cntag_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T},\
-    {"cpu_composites_0_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T},\
-    {"ep_nih_header_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T},\
-    {"ethertype_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T},\
-    {"gbp_ethernet_shim_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T},\
-    {"generic_loopback_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T},\
-    {"hg3_base_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T},\
-    {"hg3_extension_0_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T},\
-    {"hop_by_hop_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T},\
-    {"ifa_header_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T},\
-    {"ifa_metadata_a_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T},\
-    {"ifa_metadata_b_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T},\
-    {"ifa_metadata_base_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T},\
-    {"igmp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T},\
-    {"ioam_e2e_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T},\
-    {"ipfix_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T},\
-    {"p_1588_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_3_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
-    {"rarp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T},\
-    {"routing_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T},\
-    {"sflow_shim_0_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T},\
-    {"tcp_first_4bytes_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T},\
-    {"vxlan_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h
deleted file mode 100644
index 3141fd211e5..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1291 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_DATA_H
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_OPERATION     2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_AP            0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_CPI           2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DEM           3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DIAG          6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIN           7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MPT           9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_POLL          11
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_STA           13
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CNTAG_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_RPID 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_TPID 1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT          2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
-    {"RPID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_RPID},\
-    {"TPID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_TPID},\
-    {"cntag_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD         1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SPI         4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_ID          1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GBP_ETHERNET_SHIM_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS     1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED  2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID       3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE   4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER       5
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT          6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \
-    {"ETHERTYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\
-    {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\
-    {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\
-    {"SID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\
-    {"SUBTYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\
-    {"VER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\
-    {"gbp_ethernet_shim_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM    13
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"SOURCE_SYSTEM_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"SRC_SUBPORT_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\
-    {"START_BYTE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP         0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF        1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED      2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP            3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP          4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP          5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP    6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP    7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1    8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER   9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT   10
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FLAGS         0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_VNI           4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_KEY 0
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"KEY", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_KEY},\
-    {"gre_key_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_RESERVED 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name HG3_BASE_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CN                      0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CNG                     1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_TC                      11
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_VERSION                 12
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CN},\
-    {"CNG", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_CNG},\
-    {"ENTROPY", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_ENTROPY},\
-    {"EXT_HDR_PRESENT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
-    {"HG3_RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
-    {"L3_ROUTED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
-    {"MIRROR_COPY", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
-    {"RESERVED_ETYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
-    {"SYSTEM_DESTINATION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
-    {"SYSTEM_DESTINATION_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
-    {"SYSTEM_SOURCE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
-    {"TC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_TC},\
-    {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_VERSION},\
-    {"hg3_base_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT}
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP         0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF        1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED      2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP            3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP          4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP          5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP    6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP    7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1    8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER   9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT   10
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
-
-/*!
- * \name HG3_EXTENSION_0_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_SVP               5
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
-    {"CLASS_ID_LSB", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
-    {"CLASS_ID_MSB", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
-    {"DVP_OR_L3_IIF", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
-    {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
-    {"FORWARDING_DOMAIN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
-    {"SVP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
-    {"hg3_extension_0_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CODE      1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IFA_HEADER_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FLAGS      0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_GNS        1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_VER        4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FLAGS},\
-    {"GNS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_GNS},\
-    {"MAX_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
-    {"NEXT_HDR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
-    {"VER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_VER},\
-    {"ifa_header_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_A_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_CN               0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL      1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID    2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED       3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID         4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT          6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_CN},\
-    {"FWD_HDR_TTL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\
-    {"LNS_DEVICE_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\
-    {"PORT_SPEED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\
-    {"QUEUE_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\
-    {"RX_TIMESTAMP_SEC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\
-    {"ifa_metadata_a_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_B_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID         0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID        1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0             2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1             3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC   5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT    6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT          7
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PORT_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\
-    {"INGRESS_PORT_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\
-    {"MMU_STAT_0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\
-    {"MMU_STAT_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\
-    {"RESIDENCE_TIME_NANOSEC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\
-    {"RX_TIMESTAMP_NANOSEC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\
-    {"TX_QUEUE_BYTE_COUNT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\
-    {"ifa_metadata_b_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_BASE_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR            0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR           2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT          3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"REQUEST_VECTOR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\
-    {"ifa_metadata_base_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IOAM_E2E_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN  2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID  3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_RESERVED      5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_TYPE          6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FID_COUNT          7
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \
-    {"IOAM_E2E_DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\
-    {"IOAM_E2E_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\
-    {"IOAM_HDR_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\
-    {"NAMESPACE_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\
-    {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\
-    {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_RESERVED},\
-    {"TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_TYPE},\
-    {"ioam_e2e_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_DA                0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_ID                3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_OPTION            4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_SA                6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOS               7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TTL               9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_DA             0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_SA             5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACDA 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACSA 1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_BOS   0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_EXP   1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_LABEL 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
-    {"DROP_REASON", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
-    {"RESERVED_0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
-    {"SMOD_STATE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
-    {"UC_COS__COLOR__PROB_IDX", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
-    {"USER_META_DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_3_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_OPERATION     2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_DATA          0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TAG  0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"L5_BYTES_8_9", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\
-    {"unknown_l5_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_CFI  0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_PCP  1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_TPID 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_VID  3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FLAGS       0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SPI         4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index fbd78518868..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,187 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0                                  1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0               4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0        8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      10
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     11
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        12
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       13
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       14
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              15
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        16
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      17
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             18
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            19
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_6_0                        20
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    22
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    23
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0                                    24
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0                                    25
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0                             26
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    27
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  28
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0                             29
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     30
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              31
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              32
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            33
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            34
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       35
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   36
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0               37
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        38
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              39
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             40
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             41
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                42
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       43
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   44
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       45
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    48
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT                                 2
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    4
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  5
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     6
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  7
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   8
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS                         9
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     10
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               11
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      12
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   13
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           14
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      15
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      16
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           17
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      18
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            19
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        20
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            21
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        22
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    23
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      24
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      25
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      26
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      27
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      28
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      29
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      30
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      31
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            32
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              33
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  34
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    35
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          36
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              37
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            38
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SRV6                                    41
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                44
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     45
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       46
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     47
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CB_STATION_MOVE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
-    {"CML_FLAGS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DEFAULT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_ECMP_PKT_SAMPLED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_PKT_SAMPLED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
-    {"DST_FP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"EM_FT_HPAE_MISS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\
-    {"IFP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_STATIC_MOVE", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST_RSVD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
-    {"MATCHED_RULE_BIT_0", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"NO_COPY_TO_CPU", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SER_DROP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
-    {"SRV6", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\
-    {"SVP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
-    {"TRACE_DO_NOT_MIRROR", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
-    {"URPF_CHECK_FAILED", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 09bd86c3c1d..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,503 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56690_a0_dna_6_5_31_7_0_sf_match_id_info.yml
- * for device bcm56690_a0 and variant dna_6_5_31_7_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG  0
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM  1
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  2
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  3
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  4
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  5
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  6
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  7
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  8
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1  13
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2  14
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  15
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  16
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  17
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  18
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  19
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  20
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  21
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  22
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  23
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  24
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1  25
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2  26
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  27
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  28
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE  29
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  30
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E  31
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  32
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  33
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  34
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  35
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  36
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  37
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  38
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  39
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  40
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  41
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  42
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  43
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  44
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1  45
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2  46
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  47
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1  48
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2  49
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  50
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  51
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  52
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  53
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  54
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  55
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  56
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1  57
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2  58
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  59
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  60
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  61
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG  62
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM  63
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  64
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  65
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  66
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  67
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  68
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  69
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  70
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  71
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  72
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  73
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  74
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1  75
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2  76
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  77
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  78
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  79
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  80
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  81
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  82
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  83
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  84
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  85
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  86
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1  87
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2  88
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  89
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  90
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE  91
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  92
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E  93
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  94
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  95
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  96
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  97
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  98
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  99
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  100
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  101
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  102
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  103
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  104
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  105
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  106
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1  107
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2  108
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  109
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1  110
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2  111
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  112
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  113
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  114
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  115
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  116
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  117
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  118
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1  119
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2  120
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG  121
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  122
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  123
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  124
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  125
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  126
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  127
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  128
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  129
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  130
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1  131
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2  132
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  133
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  134
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  135
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  136
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1  137
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2  138
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  139
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER  140
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE  141
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  142
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  143
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  144
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  145
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  146
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1  147
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2  148
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  149
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1  150
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2  151
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  152
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  153
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  154
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  155
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  156
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  157
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1  158
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2  159
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG  160
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM  161
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  162
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  163
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  164
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  165
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  166
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  167
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  168
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  169
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  170
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  171
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  172
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1  173
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2  174
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  175
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  176
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  177
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  178
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  179
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  180
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  181
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  182
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  183
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  184
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1  185
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2  186
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  187
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  188
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE  189
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  190
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E  191
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  192
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  193
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  194
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  195
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  196
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  197
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  198
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  199
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  200
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  201
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  202
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  203
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  204
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1  205
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2  206
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  207
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1  208
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2  209
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  210
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  211
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  212
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  213
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  214
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  215
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  216
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1  217
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2  218
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  219
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  220
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  221
-#define BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_COUNT  222
-
-#define BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr.h
new file mode 100644
index 00000000000..e0bef1a4dcf
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr.h
@@ -0,0 +1,170 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_H
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T                      0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T                   1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T                      2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T                    3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T              6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T            7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T        8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T         9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T                      10
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ETHERTYPE_T                11
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T                     12
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T        13
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T         14
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T                      15
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T               16
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_KEY_T                  17
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_ROUT_T                 18
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_SEQ_T                  19
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T                      20
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T                 21
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T          22
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T               23
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T                     24
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T               25
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T           26
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T           27
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T        28
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T                     29
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T                 30
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T                    31
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T                     32
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T                     33
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T                       34
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_ERSPAN_SN_T         35
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_TRANSPORT_T         36
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T                 37
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_BV_T                  38
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T                  39
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T                     40
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T                   41
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T                      42
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T             43
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T                  44
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T                  45
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   46
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   47
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T                     48
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T                  49
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T                    50
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T             51
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T             52
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T             53
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T                 54
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T         55
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T         56
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T                      57
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T               58
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L4_T               59
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T               60
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T                     61
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T                    62
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T                     63
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_T               64
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_COUNT    65
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T},\
+    {"ethertype_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T},\
+    {"gbp_ethernet_shim_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T},\
+    {"generic_loopback_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T},\
+    {"ifa_header_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T},\
+    {"ifa_metadata_a_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T},\
+    {"ifa_metadata_b_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T},\
+    {"ifa_metadata_base_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T},\
+    {"igmp_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T},\
+    {"ioam_e2e_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T},\
+    {"ipfix_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T},\
+    {"pim_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T},\
+    {"prog_ext_hdr_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T},\
+    {"tcp_first_4bytes_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 00000000000..849390e0ac7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1308 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_AP            0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_CPI           2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_DEM           3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_FIN           7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_MPT           9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_POLL          11
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_STA           13
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_PAD         1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_ID          1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GBP_ETHERNET_SHIM_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS     1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED  2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID       3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE   4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER       5
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT          6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \
+    {"ETHERTYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\
+    {"FLAGS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\
+    {"SID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\
+    {"SUBTYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\
+    {"VER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\
+    {"gbp_ethernet_shim_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM    13
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"SOURCE_SYSTEM_PORT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"SRC_SUBPORT_NUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\
+    {"START_BYTE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP         0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED      2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP            3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP          4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP          5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP         0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED      2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP            3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP          4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP          5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP               5
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID_LSB", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
+    {"CLASS_ID_MSB", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
+    {"DVP_OR_L3_IIF", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_A_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_CN               0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL      1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID    2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED       3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID         4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT          6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_CN},\
+    {"FWD_HDR_TTL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\
+    {"PORT_SPEED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\
+    {"ifa_metadata_a_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_B_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID         0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID        1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0             2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1             3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC   5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT    6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\
+    {"MMU_STAT_0", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\
+    {"RESIDENCE_TIME_NANOSEC", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_metadata_b_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_BASE_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR            0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\
+    {"ifa_metadata_base_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IOAM_E2E_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN  2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID  3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_RESERVED      5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_TYPE          6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \
+    {"IOAM_E2E_DATA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\
+    {"IOAM_E2E_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\
+    {"IOAM_HDR_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\
+    {"NAMESPACE_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\
+    {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_RESERVED},\
+    {"TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_TYPE},\
+    {"ioam_e2e_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_DA                0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_ID                3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_SA                6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_DA             0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_SA             5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T_MACDA 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PIM_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_HDR_BYTES_0_1 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_HDR_BYTES_2_3 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_HDR_BYTES_4_5 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_HDR_BYTES_6_7 3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \
+    {"HDR_BYTES_0_1", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_HDR_BYTES_0_1},\
+    {"HDR_BYTES_2_3", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_HDR_BYTES_2_3},\
+    {"HDR_BYTES_4_5", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_HDR_BYTES_4_5},\
+    {"HDR_BYTES_6_7", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_HDR_BYTES_6_7},\
+    {"pim_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"L5_BYTES_8_9", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\
+    {"unknown_l5_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_SPI         4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 00000000000..fe9ec6edd83
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,187 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0                                  1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0               4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0        8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      10
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     11
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        12
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       13
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       14
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              15
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        16
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      17
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             18
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            19
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_6_0                        20
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    22
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    23
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0                                    24
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0                                    25
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0                             26
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    27
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  28
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0                             29
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     30
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              31
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              32
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            33
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            34
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       35
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   36
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0               37
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        38
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              39
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             40
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             41
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                42
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       43
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   44
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       45
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    48
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT                                 2
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    4
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  5
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     6
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  7
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   8
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS                         9
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     10
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               11
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      12
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   13
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           14
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      15
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      16
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           17
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      18
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            19
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        20
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            21
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        22
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    23
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      24
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      25
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      26
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      27
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      28
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      29
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      30
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      31
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            32
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              33
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  34
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    35
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          36
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              37
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            38
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6                                    41
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                44
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     45
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       46
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     47
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DEFAULT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"EM_FT_HPAE_MISS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\
+    {"IFP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SER_DROP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SRV6", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\
+    {"SVP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 00000000000..308bbd7d7ca
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,503 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56690_a0_dna_6_5_32_5_0_sf_match_id_info.yml
+ * for device bcm56690_a0 and variant dna_6_5_32_5_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG  0
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM  1
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  2
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  3
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  4
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  5
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  6
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  7
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  8
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1  13
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2  14
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  15
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  16
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  17
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  18
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  19
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  20
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  21
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  22
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  23
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  24
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1  25
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2  26
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  27
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  28
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE  29
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  30
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E  31
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  32
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  33
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  34
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  35
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  36
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  37
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  38
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  39
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  40
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  41
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  42
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  43
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  44
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1  45
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2  46
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  47
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1  48
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2  49
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  50
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  51
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  52
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  53
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  54
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  55
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  56
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1  57
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2  58
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  59
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  60
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  61
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG  62
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM  63
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  64
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  65
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  66
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  67
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  68
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  69
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  70
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  71
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  72
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  73
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  74
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1  75
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2  76
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  77
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  78
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  79
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  80
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  81
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  82
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  83
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  84
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  85
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  86
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1  87
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2  88
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  89
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  90
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE  91
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  92
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E  93
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  94
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  95
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  96
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  97
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  98
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  99
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  100
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  101
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  102
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  103
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  104
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  105
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  106
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1  107
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2  108
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  109
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1  110
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2  111
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  112
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  113
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  114
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  115
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  116
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  117
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  118
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1  119
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2  120
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG  121
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  122
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  123
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  124
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  125
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  126
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  127
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  128
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  129
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  130
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1  131
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2  132
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  133
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  134
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  135
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  136
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1  137
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2  138
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  139
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER  140
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE  141
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  142
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  143
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  144
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  145
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  146
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1  147
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2  148
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  149
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1  150
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2  151
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  152
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  153
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  154
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  155
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  156
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  157
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1  158
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2  159
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG  160
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM  161
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  162
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  163
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  164
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  165
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  166
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  167
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  168
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  169
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  170
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  171
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  172
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1  173
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2  174
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  175
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  176
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  177
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  178
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  179
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  180
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  181
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  182
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  183
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  184
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1  185
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2  186
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  187
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  188
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE  189
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  190
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E  191
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  192
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  193
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  194
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  195
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  196
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  197
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  198
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  199
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  200
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  201
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  202
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  203
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  204
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1  205
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2  206
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  207
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1  208
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2  209
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  210
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  211
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  212
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  213
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  214
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  215
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  216
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1  217
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2  218
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  219
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  220
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  221
+#define BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_COUNT  222
+
+#define BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h
deleted file mode 100644
index f97f7df1072..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T                      0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T         1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T         2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T            3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T        4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T         5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T                6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T         7
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T                     8
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T                    9
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T                     10
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T                     11
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T                       12
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T         13
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T         14
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   15
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T   16
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T   17
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T                     18
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T         19
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T         20
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T                      21
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T               22
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T               23
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T               24
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T                     25
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T                    26
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T               27
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT    28
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T},\
-    {"cpu_composites_0_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"ep_nih_header_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"ethertype_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T},\
-    {"generic_loopback_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"icmp_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T},\
-    {"ipfix_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_1_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
-    {"psamp_mirror_on_drop_2_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
-    {"rarp_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T},\
-    {"tcp_first_4bytes_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T},\
-    {"vxlan_t", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T},\
-    {"RXPMD_FLEX_T", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h
deleted file mode 100644
index 65c6f0c4a8e..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,592 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION     2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE      1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_DA                0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_ID                3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION            4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_SA                6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS               7
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL               9
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_DA             0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_SA             5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACDA 0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACSA 1
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
-    {"ING_DROP_REASON", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
-    {"MIRROR_ON_DROP_OBJ", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
-    {"MMU_DROP_CTRL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
-    {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
-    {"EGR_DROP_REASON", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
-    {"EP_COPY_SESSION_INDEX", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
-    {"RESERVED_0", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION     2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI  0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP  1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID 2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_VID  3
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT}
-
-
-#endif /* BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index c03e4160486..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0                      5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      7
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     8
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           9
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        10
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       11
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       12
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              13
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             14
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            15
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            16
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    18
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    19
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    20
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    21
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0                             22
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    23
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  24
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              25
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              26
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            27
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            28
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   29
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        30
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              31
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             32
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            33
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                34
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       35
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       36
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    21
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP                        1
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  2
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      3
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              4
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         5
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             6
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         7
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              8
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         9
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               10
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               11
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           12
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            13
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    14
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             15
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               17
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  19
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP                        20
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CML_FLAGS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"IFP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IVXLT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_DISCARD", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
-    {"L2_SRC_STATIC_MOVE", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_TTL_ERROR", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
-    {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
-    {"NO_COPY_TO_CPU", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
-    {"TRACE_DOP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"VFP", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 6df919ecd6c..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,213 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_cna_6_5_31_3_0_sf_match_id_info.yml
- * for device bcm56780_a0 and variant cna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  18
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  19
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  20
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  21
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  22
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  23
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  24
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  25
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  26
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  27
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  28
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  29
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  30
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  31
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  32
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  33
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  34
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  35
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  36
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  37
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  38
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  39
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  40
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  41
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  42
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  43
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  44
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  45
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  46
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  47
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  48
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  49
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  50
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  51
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  52
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  53
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  54
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  55
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  56
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  57
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  58
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  59
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  60
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  61
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  62
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  63
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  64
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  65
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  66
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  67
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  68
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  69
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  70
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  71
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  72
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  73
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  74
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  75
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  76
-#define BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT  77
-
-#define BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h
new file mode 100644
index 00000000000..cdb6e8f105d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h
@@ -0,0 +1,96 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T                      0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T         1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T         2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T            3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T        4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T         5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T                6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T         7
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T                     8
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T                    9
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T                     10
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T                     11
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T                       12
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T         13
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T         14
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   15
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   16
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T                     17
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T                    18
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T         19
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T         20
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T                      21
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T               22
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T               23
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T               24
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T                     25
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T                    26
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T               27
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT    28
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T},\
+    {"cpu_composites_0_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"ep_nih_header_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"ethertype_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T},\
+    {"generic_loopback_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"icmp_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T},\
+    {"ipfix_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T},\
+    {"svtag_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T},\
+    {"tcp_first_4bytes_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T},\
+    {"RXPMD_FLEX_T", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 00000000000..4a31e87fdf5
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,586 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA                0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID                3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA                6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA             0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA             5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA 0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name SVTAG_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_DATA_LWR 0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_DATA_UPR 1
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
+    {"DATA_LWR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_DATA_LWR},\
+    {"DATA_UPR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_DATA_UPR},\
+    {"svtag_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+
+#endif /* BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 00000000000..376e47ac673
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,128 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0                      5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      7
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     8
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           9
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        10
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       11
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       12
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              13
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0   14
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      15
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             16
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            17
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            18
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 19
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    20
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    21
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    22
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    23
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    24
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  25
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              26
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              27
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            28
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            29
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       30
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   31
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        32
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              33
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             34
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            35
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                36
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       37
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       38
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    22
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                      1
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP                        2
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  3
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      4
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              5
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         6
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             7
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         8
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              9
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         10
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               11
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               12
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           13
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            14
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    15
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             16
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 17
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               18
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 19
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  20
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP                        21
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"EM_FT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IVXLT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_TTL_ERROR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"NO_COPY_TO_CPU", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"TRACE_DOP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"VFP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 00000000000..8d2be75ead8
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,219 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_cna_6_5_32_3_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant cna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  4
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  5
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  6
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  7
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  8
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  9
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  10
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  11
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  12
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  13
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  14
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  15
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  16
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  17
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  18
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  19
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  20
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  21
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  22
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  23
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  24
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  25
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  26
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  27
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  28
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  29
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  30
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  31
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  32
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  33
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  34
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  35
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  36
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  37
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  38
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  39
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  40
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  41
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  42
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  43
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  44
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  45
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  46
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  47
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  48
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  49
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  50
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  51
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  52
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  53
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  54
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  55
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  56
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  57
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  58
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  59
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  60
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  61
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  62
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  63
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  64
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  65
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  66
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  67
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  68
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  69
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  70
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  71
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  72
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  73
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  74
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  75
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  76
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  77
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  78
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  79
+#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT  80
+
+#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h
deleted file mode 100644
index 9a3103736d7..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,174 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T                      0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T                   1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T                      2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T                    3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T         4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T         5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T              6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T            7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T        8
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T         9
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T                      10
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T                     11
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T                12
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T                     13
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T         14
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T                      15
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T               16
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T                  17
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T                 18
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T                  19
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T                      20
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T               21
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T                     22
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T          23
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T          24
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T            25
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T            26
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T            27
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T               28
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T              29
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T             30
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T                     31
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T                    32
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T                     33
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T                     34
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T                       35
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T         36
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T         37
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T                 38
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T                  39
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T                  40
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T                     41
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T                   42
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T             43
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T                  44
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T                  45
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   46
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   47
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T                     48
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T                  49
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T                    50
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T             51
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T             52
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T             53
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T                 54
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T                    55
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T         56
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T         57
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T                      58
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T               59
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T               60
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T               61
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T                     62
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T                    63
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T                    64
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T                     65
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T               66
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT    67
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T},\
-    {"authen_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T},\
-    {"cntag_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T},\
-    {"cpu_composites_0_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T},\
-    {"ep_nih_header_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T},\
-    {"etag_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T},\
-    {"ethertype_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T},\
-    {"generic_loopback_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T},\
-    {"hop_by_hop_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T},\
-    {"ifa_flex_md_0_a_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T},\
-    {"ifa_flex_md_0_b_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T},\
-    {"ifa_flex_md_1_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T},\
-    {"ifa_flex_md_2_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T},\
-    {"ifa_flex_md_3_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T},\
-    {"ifa_header_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T},\
-    {"ifa_md_base_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T},\
-    {"ifa_metadata_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T},\
-    {"igmp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T},\
-    {"ipfix_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T},\
-    {"p_1588_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_3_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
-    {"rarp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T},\
-    {"routing_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T},\
-    {"sflow_shim_0_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T},\
-    {"svtag_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T},\
-    {"tcp_first_4bytes_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T},\
-    {"vntag_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T},\
-    {"vxlan_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h
deleted file mode 100644
index b63c0b7c345..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1258 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION     2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_AP            0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_CPI           2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DEM           3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DIAG          6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIN           7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MPT           9
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_POLL          11
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_STA           13
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CNTAG_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_RPID 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_TPID 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
-    {"RPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_RPID},\
-    {"TPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_TPID},\
-    {"cntag_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD         1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SPI         4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETAG_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TAG  0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TPID 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TAG},\
-    {"TPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TPID},\
-    {"etag_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_ID          1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         13
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP                14
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"SOURCE_SYSTEM_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"SVP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\
-    {"generic_loopback_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FLAGS         0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_VNI           4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_KEY 0
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"KEY", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_KEY},\
-    {"gre_key_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_RESERVED 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE      1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_A_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
-    {"FWD_HDR_TTL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
-    {"LNS_DEVICE_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
-    {"ifa_flex_md_0_a_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_B_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
-    {"PORT_SPEED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
-    {"QUEUE_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
-    {"RX_TIMESTAMP_SEC", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
-    {"ifa_flex_md_0_b_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_1_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PORT_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
-    {"INGRESS_PORT_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
-    {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
-    {"ifa_flex_md_1_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_2_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
-    {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
-    {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
-    {"ifa_flex_md_2_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_3_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
-    {"MMU_STAT_0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
-    {"MMU_STAT_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
-    {"ifa_flex_md_3_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
-
-/*!
- * \name IFA_HEADER_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FLAGS      0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_GNS        1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_VER        4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FLAGS},\
-    {"GNS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_GNS},\
-    {"MAX_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
-    {"NEXT_HDR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
-    {"VER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_VER},\
-    {"ifa_header_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
-
-/*!
- * \name IFA_MD_BASE_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
-    {"ifa_md_base_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_METADATA                 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"METADATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_METADATA},\
-    {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
-    {"ifa_metadata_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_DA                0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_ID                3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION            4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_SA                6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS               7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL               9
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_DA             0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_SA             5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACDA 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACSA 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_BOS   0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_EXP   1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_LABEL 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
-    {"DROP_REASON", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
-    {"RESERVED_0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
-    {"SMOD_STATE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
-    {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
-    {"USER_META_DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION     2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_DATA          0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TAG  0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name SVTAG_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_DATA_LWR 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_DATA_UPR 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
-    {"DATA_LWR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_DATA_LWR},\
-    {"DATA_UPR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_DATA_UPR},\
-    {"svtag_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI  0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP  1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_VID  3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VNTAG_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TAG  0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TPID 1
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TAG},\
-    {"TPID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TPID},\
-    {"vntag_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FLAGS       0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SPI         4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index 6db8d7ce812..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,181 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                                 0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                            1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                                  2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                                         3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0                                     4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0                   6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                                    7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                                    8
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                                 9
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                                10
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                                   11
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                                  12
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                                  13
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                                         14
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                                   15
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0              16
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                                 17
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                                        18
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                                       19
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                                       20
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0            21
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                               22
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                               23
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                               24
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                               25
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                               26
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                             27
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0                         28
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                                         29
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                                       30
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                                       31
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                                  32
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                              33
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                                   34
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                                         35
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                                        36
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                                        37
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                           38
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                                  39
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0              40
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       41
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    47
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    3
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  4
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     5
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  6
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   7
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     8
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               9
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      10
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   11
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           12
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      13
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      14
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           15
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      16
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            17
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        18
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            19
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        20
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    21
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      22
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      23
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      24
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      25
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      26
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      27
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      28
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      29
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            30
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              31
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  32
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    33
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY                       34
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          35
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              36
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            37
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      38
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     41
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               42
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                43
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     44
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       45
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     46
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CB_STATION_MOVE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
-    {"CML_FLAGS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
-    {"DST_FP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"IFP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_STATIC_MOVE", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST_RSVD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
-    {"MATCHED_RULE_BIT_0", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"MTOP_IPV4_GATEWAY", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\
-    {"NO_COPY_TO_CPU", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"RESERVED_TRACE_BIT", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
-    {"SER_DROP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
-    {"SVP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
-    {"TRACE_DO_NOT_MIRROR", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
-    {"URPF_CHECK_FAILED", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 965fa079889..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,405 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_hna_6_5_31_3_0_sf_match_id_info.yml
- * for device bcm56780_a0 and variant hna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  4
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  5
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  6
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  7
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  8
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  9
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  10
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  11
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  12
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  13
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  14
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  15
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  16
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  17
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  18
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  19
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  20
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  21
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  22
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  23
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  24
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  25
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  26
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  27
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  28
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  29
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  30
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  31
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  32
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  33
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  34
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  35
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  36
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  37
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  38
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  39
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  40
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  41
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  42
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  43
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  44
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  45
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  46
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  47
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  48
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  49
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  50
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  51
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  52
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  53
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  54
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  55
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  56
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  57
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  58
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  59
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  60
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  61
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  62
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  63
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  64
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  65
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  66
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  67
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  68
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  69
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  70
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  71
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  72
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  73
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  74
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  75
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  76
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  77
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  78
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  79
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  80
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  81
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  82
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  83
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  84
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  85
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  86
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  87
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  88
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  89
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  90
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  91
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  92
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  93
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  94
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  95
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  96
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  97
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  98
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  99
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  100
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  101
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  102
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  103
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  104
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  105
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  106
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  107
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  108
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  109
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  110
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  111
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  112
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  113
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  114
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  115
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  116
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  117
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  118
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  119
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  120
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  121
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  122
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  123
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  124
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  125
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  126
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  127
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  128
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  129
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  130
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  131
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  132
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  133
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  134
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  135
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  136
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  137
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  138
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  139
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  140
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  141
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  142
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  143
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  144
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  145
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  146
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  147
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  148
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  149
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  150
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  151
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  152
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  153
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  154
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  155
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  156
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  157
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  158
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  159
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  160
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  161
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  162
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  163
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  164
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  165
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  166
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  167
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  168
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  169
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  170
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  171
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  172
-#define BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT  173
-
-#define BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h
new file mode 100644
index 00000000000..8d1b304167c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h
@@ -0,0 +1,174 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T                      0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T                   1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T                      2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T                    3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T              6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T            7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T        8
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T         9
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T                      10
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T                     11
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T                12
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T                     13
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T         14
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T                      15
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T               16
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T                  17
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T                 18
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T                  19
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T                      20
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T               21
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T                     22
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T          23
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T          24
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T            25
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T            26
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T            27
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T               28
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T              29
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T             30
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T                     31
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T                    32
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T                     33
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T                     34
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T                       35
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T         36
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T         37
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T                 38
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T                  39
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T                  40
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T                     41
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T                   42
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T             43
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T                  44
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T                  45
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   46
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   47
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T                     48
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T                  49
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T                    50
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T             51
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T             52
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T             53
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T                 54
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T                    55
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T         56
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T         57
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T                      58
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T               59
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T               60
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T               61
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T                     62
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T                    63
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T                    64
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T                     65
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_T               66
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT    67
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T},\
+    {"etag_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T},\
+    {"hop_by_hop_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T},\
+    {"svtag_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T},\
+    {"tcp_first_4bytes_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 00000000000..3a0d3c3e4b4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1258 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_AP            0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_CPI           2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DEM           3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIN           7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MPT           9
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_POLL          11
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_STA           13
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD         1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TAG  0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TAG},\
+    {"TPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TPID},\
+    {"etag_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_ID          1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         13
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP                14
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"SOURCE_SYSTEM_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"SVP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\
+    {"generic_loopback_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_DA                0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_ID                3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_SA                6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_DA             0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_SA             5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACDA 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name SVTAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_DATA_LWR 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_DATA_UPR 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
+    {"DATA_LWR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_DATA_LWR},\
+    {"DATA_UPR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_DATA_UPR},\
+    {"svtag_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TAG  0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SPI         4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 00000000000..af05fd7bac4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,181 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                                 0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                            1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                                  2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                                         3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0                                     4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0                   6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                                    7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                                    8
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                                 9
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                                10
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                                   11
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                                  12
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                                  13
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                                         14
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                                   15
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0              16
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                                 17
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                                        18
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                                       19
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                                       20
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0            21
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                               22
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                               23
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                               24
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                               25
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                               26
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                             27
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0                         28
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                                         29
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                                       30
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                                       31
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                                  32
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                              33
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                                   34
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                                         35
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                                        36
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                                        37
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                           38
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                                  39
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0              40
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       41
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    47
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    3
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  4
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     5
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  6
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   7
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     8
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               9
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      10
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   11
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           12
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      13
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      14
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           15
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      16
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            17
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        18
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            19
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        20
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    21
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      22
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      23
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      24
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      25
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      26
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      27
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      28
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      29
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            30
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              31
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  32
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    33
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY                       34
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          35
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              36
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            37
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      38
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     41
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               42
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                43
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     44
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       45
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     46
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"MTOP_IPV4_GATEWAY", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\
+    {"NO_COPY_TO_CPU", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"RESERVED_TRACE_BIT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
+    {"SER_DROP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SVP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 00000000000..98ae378e5f4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,405 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_hna_6_5_32_2_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant hna_6_5_32_2_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  4
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  5
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  6
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  7
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  8
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  9
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  10
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  11
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  12
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  13
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  14
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  15
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  16
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  17
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  18
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  19
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  20
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  21
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  22
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  23
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  24
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  25
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  26
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  27
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  28
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  29
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  30
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  31
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  32
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  33
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  34
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  35
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  36
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  37
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  38
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  39
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  40
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  41
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  42
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  43
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  44
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  45
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  46
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  47
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  48
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  49
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  50
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  51
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  52
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  53
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  54
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  55
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  56
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  57
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  58
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  59
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  60
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  61
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  62
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  63
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  64
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  65
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  66
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  67
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  68
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  69
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  70
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  71
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  72
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  73
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  74
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  75
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  76
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  77
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  78
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  79
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  80
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  81
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  82
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  83
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  84
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  85
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  86
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  87
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  88
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  89
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  90
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  91
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  92
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  93
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  94
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  95
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  96
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  97
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  98
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  99
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  100
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  101
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  102
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  103
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  104
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  105
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  106
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  107
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  108
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  109
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  110
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  111
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  112
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  113
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  114
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  115
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  116
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  117
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  118
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  119
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  120
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  121
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  122
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  123
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  124
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  125
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  126
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  127
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  128
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  129
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  130
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  131
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  132
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  133
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  134
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  135
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  136
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  137
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  138
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  139
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  140
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  141
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  142
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  143
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  144
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  145
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  146
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  147
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  148
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  149
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  150
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  151
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  152
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  153
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  154
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  155
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  156
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  157
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  158
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  159
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  160
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  161
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  162
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  163
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  164
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  165
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  166
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  167
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  168
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  169
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  170
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  171
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  172
+#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT  173
+
+#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h
deleted file mode 100644
index 8717982e665..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T                      0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T                   1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T                      2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T                    3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T         4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T         5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T              6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T        7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T         8
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T                      9
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T                     10
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T                11
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T                     12
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T         13
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T                      14
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T               15
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T                  16
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T                 17
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T                  18
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T                      19
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T               20
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T                     21
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T          22
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T          23
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T            24
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T            25
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T            26
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T               27
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T              28
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T             29
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T                     30
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T                    31
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T                     32
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T                     33
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T                       34
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T         35
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T         36
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T                 37
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T                  38
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T                  39
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T                     40
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T                   41
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T             42
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T                  43
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T                  44
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   45
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   46
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T                     47
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T                  48
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T                    49
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T             50
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T             51
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T             52
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T                 53
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T         54
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T         55
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T                      56
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T               57
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T               58
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T               59
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T                     60
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T                    61
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T                    62
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T                     63
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T               64
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT    65
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T},\
-    {"authen_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T},\
-    {"cntag_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T},\
-    {"cpu_composites_0_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T},\
-    {"erspan3_fixed_hdr_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T},\
-    {"etag_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T},\
-    {"ethertype_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T},\
-    {"generic_loopback_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T},\
-    {"hop_by_hop_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T},\
-    {"ifa_flex_md_0_a_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T},\
-    {"ifa_flex_md_0_b_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T},\
-    {"ifa_flex_md_1_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T},\
-    {"ifa_flex_md_2_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T},\
-    {"ifa_flex_md_3_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T},\
-    {"ifa_header_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T},\
-    {"ifa_md_base_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T},\
-    {"ifa_metadata_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T},\
-    {"igmp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T},\
-    {"ipfix_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T},\
-    {"p_1588_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_3_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
-    {"rarp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T},\
-    {"routing_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T},\
-    {"sflow_shim_0_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T},\
-    {"tcp_first_4bytes_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T},\
-    {"vntag_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T},\
-    {"vxlan_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h
deleted file mode 100644
index 28d093fe322..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1212 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION     2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_AP            0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_CPI           2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DEM           3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DIAG          6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIN           7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MPT           9
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_POLL          11
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_STA           13
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CNTAG_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_RPID 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_TPID 1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
-    {"RPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_RPID},\
-    {"TPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_TPID},\
-    {"cntag_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD         1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SPI         4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETAG_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TAG  0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TPID 1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TAG},\
-    {"TPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_TPID},\
-    {"etag_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_ID          1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         13
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP                14
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"SOURCE_SYSTEM_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"SVP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\
-    {"generic_loopback_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FLAGS         0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_VNI           4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_KEY 0
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"KEY", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_KEY},\
-    {"gre_key_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_RESERVED 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE      1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_A_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
-    {"FWD_HDR_TTL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
-    {"LNS_DEVICE_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
-    {"ifa_flex_md_0_a_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_B_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
-    {"PORT_SPEED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
-    {"QUEUE_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
-    {"RX_TIMESTAMP_SEC", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
-    {"ifa_flex_md_0_b_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_1_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PORT_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
-    {"INGRESS_PORT_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
-    {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
-    {"ifa_flex_md_1_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_2_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
-    {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
-    {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
-    {"ifa_flex_md_2_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_3_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
-    {"MMU_STAT_0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
-    {"MMU_STAT_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
-    {"ifa_flex_md_3_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
-
-/*!
- * \name IFA_HEADER_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FLAGS      0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_GNS        1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_VER        4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FLAGS},\
-    {"GNS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_GNS},\
-    {"MAX_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
-    {"NEXT_HDR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
-    {"VER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_VER},\
-    {"ifa_header_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
-
-/*!
- * \name IFA_MD_BASE_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
-    {"ifa_md_base_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_METADATA                 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"METADATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_METADATA},\
-    {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
-    {"ifa_metadata_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_DA                0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_ID                3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION            4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_SA                6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS               7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL               9
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_DA             0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_SA             5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACDA 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACSA 1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_BOS   0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_EXP   1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_LABEL 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE               1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
-    {"DROP_REASON", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
-    {"MOD_STATE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\
-    {"RESERVED_0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
-    {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
-    {"USER_META_DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION     2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_DATA          0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TAG  0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI  0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP  1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_VID  3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VNTAG_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TAG  0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TPID 1
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TAG},\
-    {"TPID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_TPID},\
-    {"vntag_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FLAGS       0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SPI         4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index fc2a9c06291..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       8
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              9
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        10
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      11
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0                      12
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0                      13
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             14
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0             15
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 16
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    17
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    18
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    19
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    20
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    21
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  22
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              23
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              24
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            25
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            26
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       27
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   28
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        29
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              30
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             31
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             32
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                33
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       34
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    42
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  3
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  4
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   5
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     6
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               7
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      8
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   9
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           10
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      11
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      12
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           13
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      14
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            15
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        16
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            17
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        18
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    19
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      20
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      21
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      22
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      23
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      24
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      25
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      26
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      27
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            28
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              29
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  30
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    31
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          32
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              33
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            34
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      35
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                36
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         37
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     38
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               39
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       40
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     41
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CB_STATION_MOVE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
-    {"CML_FLAGS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DST_FP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"IFP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_STATIC_MOVE", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST_RSVD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
-    {"MATCHED_RULE_BIT_0", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"NO_COPY_TO_CPU", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"RESERVED_TRACE_BIT", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
-    {"SER_DROP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
-    {"SVP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"URPF_CHECK_FAILED", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 486c0ae5544..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,395 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_hna_6_5_31_3_0_sf_match_id_info.yml
- * for device bcm56880_a0 and variant hna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  4
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  5
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  6
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  7
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  8
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  9
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  10
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  11
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  12
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  13
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  14
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  15
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  16
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  17
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  18
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  19
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  20
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  21
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  22
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  23
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  24
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  25
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  26
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  27
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  28
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  29
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  30
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  31
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  32
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  33
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  34
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  35
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  36
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  37
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  38
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  39
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  40
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  41
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  42
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  43
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  44
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  45
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  46
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  47
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  48
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  49
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  50
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  51
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  52
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  53
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  54
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  55
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  56
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  57
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  58
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  59
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  60
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  61
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  62
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  63
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  64
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  65
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  66
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  67
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  68
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  69
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  70
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  71
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  72
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  73
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  74
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  75
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  76
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  77
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  78
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  79
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  80
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  81
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  82
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  83
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  84
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  85
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  86
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  87
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  88
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  89
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  90
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  91
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  92
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  93
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  94
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  95
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  96
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  97
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  98
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  99
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  100
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  101
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  102
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  103
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  104
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  105
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  106
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  107
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  108
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  109
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  110
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  111
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  112
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  113
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  114
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  115
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  116
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  117
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  118
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  119
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  120
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  121
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  122
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  123
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  124
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  125
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  126
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  127
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  128
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  129
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  130
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  131
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  132
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  133
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  134
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  135
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  136
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  137
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  138
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  139
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  140
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  141
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  142
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  143
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  144
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  145
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  146
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  147
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  148
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  149
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  150
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  151
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  152
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  153
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  154
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  155
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  156
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  157
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  158
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  159
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  160
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  161
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  162
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  163
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  164
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  165
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  166
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  167
-#define BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT  168
-
-#define BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h
new file mode 100644
index 00000000000..26c99f2beef
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h
@@ -0,0 +1,170 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T                      0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T                   1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T                      2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T                    3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T              6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T        7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T         8
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T                      9
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T                     10
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T                11
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T                     12
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T         13
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T                      14
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T               15
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T                  16
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T                 17
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T                  18
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T                      19
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T               20
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T                     21
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T          22
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T          23
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T            24
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T            25
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T            26
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T               27
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T              28
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T             29
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T                     30
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T                    31
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T                     32
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T                     33
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T                       34
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T         35
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T         36
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T                 37
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T                  38
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T                  39
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T                     40
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T                   41
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T             42
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T                  43
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T                  44
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   45
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   46
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T                     47
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T                  48
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T                    49
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T             50
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T             51
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T             52
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T                 53
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T         54
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T         55
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T                      56
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T               57
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T               58
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T               59
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T                     60
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T                    61
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T                    62
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T                     63
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_T               64
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT    65
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T},\
+    {"erspan3_fixed_hdr_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T},\
+    {"etag_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T},\
+    {"hop_by_hop_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T},\
+    {"tcp_first_4bytes_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 00000000000..1885b8067fd
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1212 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_AP            0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_CPI           2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DEM           3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIN           7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MPT           9
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_POLL          11
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_STA           13
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD         1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TAG  0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TAG},\
+    {"TPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TPID},\
+    {"etag_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_ID          1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         13
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP                14
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"SOURCE_SYSTEM_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"SVP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\
+    {"generic_loopback_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_DA                0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_ID                3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_SA                6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_DA             0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_SA             5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACDA 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE               1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"MOD_STATE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\
+    {"RESERVED_0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TAG  0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SPI         4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 00000000000..388ef71c6a0
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,165 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       8
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              9
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        10
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      11
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0                      12
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0                      13
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             14
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0             15
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 16
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    17
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    18
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    19
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    20
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    21
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  22
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              23
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              24
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            25
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            26
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       27
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   28
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        29
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              30
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             31
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             32
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                33
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       34
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    42
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  3
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  4
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   5
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     6
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               7
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      8
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   9
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           10
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      11
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      12
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           13
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      14
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            15
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        16
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            17
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        18
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    19
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      20
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      21
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      22
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      23
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      24
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      25
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      26
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      27
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            28
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              29
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  30
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    31
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          32
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              33
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            34
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      35
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                36
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         37
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     38
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               39
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       40
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     41
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DST_FP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"RESERVED_TRACE_BIT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
+    {"SER_DROP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SVP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"URPF_CHECK_FAILED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 00000000000..70d02ff7e37
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,395 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_hna_6_5_32_2_0_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant hna_6_5_32_2_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  4
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  5
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  6
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  7
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  8
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  9
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  10
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  11
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  12
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  13
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  14
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  15
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  16
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  17
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  18
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  19
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  20
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  21
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  22
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  23
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  24
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  25
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  26
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  27
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  28
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  29
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  30
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  31
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  32
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  33
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  34
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  35
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  36
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  37
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  38
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  39
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  40
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  41
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  42
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  43
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  44
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  45
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  46
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  47
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  48
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  49
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  50
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  51
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  52
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  53
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  54
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  55
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  56
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  57
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  58
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  59
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  60
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  61
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  62
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  63
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  64
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  65
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  66
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  67
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  68
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  69
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  70
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  71
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  72
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  73
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  74
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  75
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  76
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  77
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  78
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  79
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  80
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  81
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  82
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  83
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  84
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  85
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  86
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  87
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  88
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  89
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  90
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  91
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  92
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  93
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  94
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  95
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  96
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  97
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  98
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  99
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  100
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  101
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  102
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  103
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  104
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  105
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  106
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  107
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  108
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  109
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  110
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  111
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  112
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  113
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  114
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  115
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  116
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  117
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  118
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  119
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  120
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  121
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  122
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  123
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  124
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  125
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  126
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  127
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  128
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  129
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  130
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  131
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  132
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  133
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  134
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  135
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  136
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  137
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  138
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  139
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  140
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  141
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  142
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  143
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  144
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  145
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  146
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  147
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  148
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  149
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  150
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  151
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  152
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  153
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  154
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  155
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  156
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  157
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  158
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  159
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  160
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  161
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  162
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  163
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  164
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  165
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  166
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  167
+#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT  168
+
+#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr.h
deleted file mode 100644
index b7a030bb1ab..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,162 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_H
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T                      0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T                   1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T                      2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T         3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T         4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T              5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T        6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T         7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T                      8
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T                     9
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T                10
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T                     11
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T         12
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T                      13
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T               14
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T                  15
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T                 16
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T                  17
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T                      18
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T               19
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T                20
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T            21
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T             22
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T               23
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T                     24
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T                     25
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T                    26
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T                     27
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T                     28
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T                       29
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T         30
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T         31
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T                 32
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T                  33
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T                  34
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T                     35
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T                36
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T                   37
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T             38
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T                  39
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T                  40
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   41
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T   42
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T                     43
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T                  44
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T                    45
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T             46
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T             47
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T             48
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T                 49
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T         50
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T         51
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T                      52
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T               53
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T               54
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T               55
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T                     56
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T                    57
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T                    58
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T                     59
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_T               60
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_COUNT    61
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T},\
-    {"authen_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T},\
-    {"cpu_composites_0_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T},\
-    {"erspan3_fixed_hdr_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T},\
-    {"etag_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T},\
-    {"ethertype_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T},\
-    {"generic_loopback_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T},\
-    {"gtp_12byte_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T},\
-    {"gtp_8byte_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T},\
-    {"gtp_ext_4byte_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T},\
-    {"gtp_with_ext_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T},\
-    {"hop_by_hop_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T},\
-    {"igmp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T},\
-    {"ipfix_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T},\
-    {"opaquetag_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T},\
-    {"p_1588_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_1_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
-    {"rarp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T},\
-    {"routing_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T},\
-    {"sflow_shim_0_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T},\
-    {"tcp_first_4bytes_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T},\
-    {"vntag_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T},\
-    {"vxlan_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr_data.h
deleted file mode 100644
index 33148f9bae2..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1152 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_DATA_H
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_OPERATION     2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_AP            0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_CPI           2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DEM           3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DIAG          6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FIN           7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MPT           9
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_POLL          11
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_STA           13
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_PAD         1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_SPI         4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETAG_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_PCP_DEI 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_RSRVD0  1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_RSRVD1  2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_SVID    3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_TPID    4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_VID     5
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FID_COUNT          6
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
-    {"PCP_DEI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_PCP_DEI},\
-    {"RSRVD0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_RSRVD0},\
-    {"RSRVD1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_RSRVD1},\
-    {"SVID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_SVID},\
-    {"TPID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_TPID},\
-    {"VID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_VID},\
-    {"etag_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_ID          1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FLAGS         0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_VNI           4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_VN_ID_UPPER         1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"VN_ID_LOWER_ENTROPY", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\
-    {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\
-    {"gre_key_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_RESERVED 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name GTP_12BYTE_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_11_8 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_3_0  1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_7_4  2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT \
-    {"BYTES_11_8", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_11_8},\
-    {"BYTES_3_0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_3_0},\
-    {"BYTES_7_4", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_BYTES_7_4},\
-    {"gtp_12byte_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FID_COUNT}
-
-/*!
- * \name GTP_8BYTE_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_BYTES_3_0 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_BYTES_7_4 1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT \
-    {"BYTES_3_0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_BYTES_3_0},\
-    {"BYTES_7_4", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_BYTES_7_4},\
-    {"gtp_8byte_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FID_COUNT}
-
-/*!
- * \name GTP_EXT_4BYTE_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR 0
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT \
-    {"EXT_HDR", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR},\
-    {"gtp_ext_4byte_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT}
-
-/*!
- * \name GTP_WITH_EXT_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0  1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4  2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT \
-    {"BYTES_11_8", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8},\
-    {"BYTES_3_0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0},\
-    {"BYTES_7_4", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4},\
-    {"gtp_with_ext_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_CODE      1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_DA                0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_ID                3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_OPTION            4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_SA                6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TOS               7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TTL               9
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_DA             0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_SA             5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_MACDA 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_MACSA 1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_BOS   0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_EXP   1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_LABEL 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name OPAQUETAG_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_TPID     0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_VLAN_TAG 1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT \
-    {"TPID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_TPID},\
-    {"VLAN_TAG", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_VLAN_TAG},\
-    {"opaquetag_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
-    {"ING_DROP_REASON", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
-    {"MIRROR_ON_DROP_OBJ", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
-    {"MMU_DROP_CTRL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
-    {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_OPERATION     2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_DATA          0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_TAG  0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_CFI  0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_PCP  1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_TPID 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_VID  3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VNTAG_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_TAG  0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_TPID 1
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_TAG},\
-    {"TPID", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_TPID},\
-    {"vntag_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1      0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_VN_ID_UPPER           2
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"VN_ID_LOWER_RESERVED2", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2},\
-    {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_VN_ID_UPPER},\
-    {"vxlan_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FLAGS       0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_SPI         4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index fadbff5d32b..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,173 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      8
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0                            9
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0                           10
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0                           11
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             12
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            13
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    15
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    16
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    17
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    18
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    19
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  20
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     21
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              22
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              23
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            24
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            25
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SVP_15_0                                       26
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   27
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        28
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              29
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0                          30
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             31
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                32
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_VFI_15_0                                       33
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   34
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT                    46
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  2
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  3
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   4
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP                                     5
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               6
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      7
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   8
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           9
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      10
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD                          11
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      12
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           13
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      14
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            15
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        16
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            17
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        18
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    19
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      20
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      21
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      22
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      23
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      24
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      25
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      26
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      27
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 28
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              29
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  30
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    31
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          32
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF                                  33
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS                         34
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS                         35
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED                       36
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED                     37
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              38
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            39
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                40
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         41
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       44
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP                                     45
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CML_FLAGS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DST_FP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"IFP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_DISCARD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
-    {"L2_SRC_STATIC_MOVE", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST_RSVD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
-    {"MATCHED_RULE_BIT_0", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"NO_COPY_TO_CPU", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PE_RPF", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF},\
-    {"PE_VID_FWD_MISS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS},\
-    {"PE_VID_RPF_MISS", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS},\
-    {"PKT_ETAG_EXPECTED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED},\
-    {"PKT_ETAG_UNEXPECTED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SER_DROP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
-    {"SVP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"URPF_CHECK_FAILED", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 1a40cb84fbc..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,427 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_nfa_6_5_31_3_1_sf_match_id_info.yml
- * for device bcm56880_a0 and variant nfa_6_5_31_3_1.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG  4
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  5
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN  6
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  8
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  13
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  14
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  15
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  16
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  17
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  18
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  19
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  20
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  21
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  22
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE  23
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE  24
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE  25
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT  26
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  27
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  28
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  29
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  30
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  31
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  32
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  33
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  34
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  35
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  36
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  37
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  38
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  39
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  40
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  41
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  42
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  43
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  44
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  45
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  46
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  47
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  48
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  49
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  50
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  51
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  52
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  53
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  54
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  55
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG  56
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  57
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN  58
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  59
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  60
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  61
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  62
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  63
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  64
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  65
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  66
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  67
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  68
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  69
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  70
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  71
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  72
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  73
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  74
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE  75
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE  76
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE  77
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT  78
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  79
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  80
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  81
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  82
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  83
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  84
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  85
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  86
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  87
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  88
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  89
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  90
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  91
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  92
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  93
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  94
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  95
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  96
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  97
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  98
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  99
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  100
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  101
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  102
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  103
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  104
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  105
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG  106
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  107
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN  108
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  109
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  110
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  111
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  112
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  113
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  114
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  115
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  116
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  117
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  118
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  119
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  120
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  121
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  122
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  123
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  124
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  125
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  126
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  127
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  128
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  129
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  130
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  131
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  132
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  133
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  134
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  135
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG  136
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  137
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN  138
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  139
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  140
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  141
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  142
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  143
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  144
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  145
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  146
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  147
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  148
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  149
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  150
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  151
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  152
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  153
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  154
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE  155
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE  156
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE  157
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT  158
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  159
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  160
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  161
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  162
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  163
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  164
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  165
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  166
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  167
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  168
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  169
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  170
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  171
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  172
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  173
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  174
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  175
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  176
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  177
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  178
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  179
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  180
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  181
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  182
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  183
-#define BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_COUNT  184
-
-#define BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr.h
new file mode 100644
index 00000000000..3f9a197d565
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr.h
@@ -0,0 +1,162 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_H
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T                      0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T                   1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T                      2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T         3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T         4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T              5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T        6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T         7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T                      8
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T                     9
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T                10
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T                     11
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T         12
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T                      13
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T               14
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T                  15
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T                 16
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T                  17
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T                      18
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T               19
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T                20
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T            21
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T             22
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T               23
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T                     24
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T                     25
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T                    26
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T                     27
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T                     28
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T                       29
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T         30
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T         31
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T                 32
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T                  33
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T                  34
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T                     35
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T                36
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T                   37
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T             38
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T                  39
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T                  40
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   41
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T   42
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T                     43
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T                  44
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T                    45
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T             46
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T             47
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T             48
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T                 49
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T         50
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T         51
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T                      52
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T               53
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T               54
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T               55
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T                     56
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T                    57
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T                    58
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T                     59
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_T               60
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_COUNT    61
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T},\
+    {"cpu_composites_0_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T},\
+    {"erspan3_fixed_hdr_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T},\
+    {"etag_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T},\
+    {"gtp_12byte_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T},\
+    {"gtp_8byte_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T},\
+    {"gtp_ext_4byte_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T},\
+    {"gtp_with_ext_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T},\
+    {"hop_by_hop_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T},\
+    {"igmp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T},\
+    {"opaquetag_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T},\
+    {"p_1588_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_1_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
+    {"rarp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T},\
+    {"tcp_first_4bytes_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 00000000000..f23883e4d1f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1152 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_AP            0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_CPI           2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DEM           3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FIN           7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MPT           9
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_POLL          11
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_STA           13
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_PAD         1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_PCP_DEI 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_RSRVD0  1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_RSRVD1  2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_SVID    3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_TPID    4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_VID     5
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"PCP_DEI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_PCP_DEI},\
+    {"RSRVD0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_RSRVD0},\
+    {"RSRVD1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_RSRVD1},\
+    {"SVID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_SVID},\
+    {"TPID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_TPID},\
+    {"VID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_VID},\
+    {"etag_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_ID          1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER         1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"VN_ID_LOWER_ENTROPY", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\
+    {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\
+    {"gre_key_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name GTP_12BYTE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0  1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4  2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT \
+    {"BYTES_11_8", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8},\
+    {"BYTES_3_0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0},\
+    {"BYTES_7_4", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4},\
+    {"gtp_12byte_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FID_COUNT}
+
+/*!
+ * \name GTP_8BYTE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4 1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT \
+    {"BYTES_3_0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0},\
+    {"BYTES_7_4", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4},\
+    {"gtp_8byte_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FID_COUNT}
+
+/*!
+ * \name GTP_EXT_4BYTE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR 0
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT \
+    {"EXT_HDR", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR},\
+    {"gtp_ext_4byte_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT}
+
+/*!
+ * \name GTP_WITH_EXT_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0  1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4  2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT \
+    {"BYTES_11_8", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8},\
+    {"BYTES_3_0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0},\
+    {"BYTES_7_4", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4},\
+    {"gtp_with_ext_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_DA                0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_ID                3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_SA                6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_DA             0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_SA             5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_MACDA 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name OPAQUETAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_TPID     0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_VLAN_TAG 1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT \
+    {"TPID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_TPID},\
+    {"VLAN_TAG", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_VLAN_TAG},\
+    {"opaquetag_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
+    {"ING_DROP_REASON", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
+    {"MIRROR_ON_DROP_OBJ", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
+    {"MMU_DROP_CTRL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
+    {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_TAG  0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1      0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_VN_ID_UPPER           2
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"VN_ID_LOWER_RESERVED2", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2},\
+    {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_VN_ID_UPPER},\
+    {"vxlan_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_SPI         4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 00000000000..3721c3e4588
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,173 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      8
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0                            9
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0                           10
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0                           11
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             12
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            13
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    15
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    16
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    17
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    18
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    19
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  20
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     21
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              22
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              23
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            24
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            25
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       26
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   27
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        28
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              29
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0                          30
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             31
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                32
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       33
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   34
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    46
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  2
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  3
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   4
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     5
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               6
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      7
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   8
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           9
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      10
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD                          11
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      12
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           13
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      14
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            15
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        16
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            17
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        18
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    19
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      20
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      21
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      22
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      23
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      24
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      25
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      26
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      27
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 28
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              29
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  30
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    31
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          32
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF                                  33
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS                         34
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS                         35
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED                       36
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED                     37
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              38
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            39
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                40
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         41
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       44
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     45
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DST_FP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PE_RPF", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF},\
+    {"PE_VID_FWD_MISS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS},\
+    {"PE_VID_RPF_MISS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS},\
+    {"PKT_ETAG_EXPECTED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED},\
+    {"PKT_ETAG_UNEXPECTED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SER_DROP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SVP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"URPF_CHECK_FAILED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 00000000000..6916347483d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,427 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_nfa_6_5_32_1_0_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant nfa_6_5_32_1_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG  4
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  5
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN  6
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  8
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  13
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  14
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  15
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  16
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  17
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  18
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  19
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  20
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  21
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  22
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE  23
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE  24
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE  25
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT  26
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  27
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  28
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  29
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  30
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  31
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  32
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  33
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  34
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  35
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  36
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  37
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  38
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  39
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  40
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  41
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  42
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  43
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  44
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  45
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  46
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  47
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  48
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  49
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  50
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  51
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  52
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  53
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  54
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  55
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG  56
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  57
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN  58
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  59
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  60
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  61
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  62
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  63
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  64
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  65
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  66
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  67
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  68
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  69
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  70
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  71
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  72
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  73
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  74
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE  75
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE  76
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE  77
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT  78
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  79
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  80
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  81
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  82
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  83
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  84
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  85
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  86
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  87
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  88
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  89
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  90
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  91
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  92
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  93
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  94
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  95
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  96
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  97
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  98
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  99
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  100
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  101
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  102
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  103
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  104
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  105
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG  106
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  107
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN  108
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  109
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  110
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  111
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  112
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  113
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  114
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  115
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  116
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  117
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  118
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  119
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  120
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  121
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  122
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  123
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  124
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  125
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  126
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  127
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  128
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  129
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  130
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  131
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  132
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  133
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  134
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  135
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG  136
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  137
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN  138
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  139
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  140
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  141
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  142
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  143
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  144
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  145
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  146
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  147
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  148
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  149
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  150
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  151
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  152
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  153
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  154
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE  155
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE  156
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE  157
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT  158
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  159
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  160
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  161
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  162
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  163
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  164
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  165
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  166
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  167
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  168
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  169
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  170
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  171
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  172
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  173
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  174
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  175
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  176
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  177
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  178
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  179
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  180
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  181
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  182
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  183
+#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_COUNT  184
+
+#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h
deleted file mode 100644
index f40b0e50cd6..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T                      0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T         1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T         2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T            3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T        4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T         5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T                6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T         7
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T                     8
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T                    9
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T                     10
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T                     11
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T                       12
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T         13
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T         14
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   15
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T   16
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T   17
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T                     18
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T         19
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T         20
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T                      21
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T               22
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T               23
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T               24
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T                     25
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T                    26
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T               27
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT    28
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T},\
-    {"cpu_composites_0_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"ep_nih_header_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"ethertype_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T},\
-    {"generic_loopback_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"icmp_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T},\
-    {"ipfix_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_1_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
-    {"psamp_mirror_on_drop_2_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
-    {"rarp_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T},\
-    {"tcp_first_4bytes_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T},\
-    {"vxlan_t", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T},\
-    {"RXPMD_FLEX_T", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h
deleted file mode 100644
index 430a15cafe9..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,592 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION     2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE      1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_DA                0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_ID                3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION            4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_SA                6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS               7
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL               9
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_DA             0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_SA             5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACDA 0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACSA 1
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
-    {"ING_DROP_REASON", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
-    {"MIRROR_ON_DROP_OBJ", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
-    {"MMU_DROP_CTRL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
-    {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_1_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
-    {"EGR_DROP_REASON", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
-    {"EP_COPY_SESSION_INDEX", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
-    {"RESERVED_0", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_2_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION     2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI  0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP  1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID 2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_VID  3
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT}
-
-
-#endif /* BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index 92342a29d0a..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0                      5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      7
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     8
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           9
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        10
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       11
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       12
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              13
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             14
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            15
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0                            16
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    18
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    19
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    20
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    21
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0                             22
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    23
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  24
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              25
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              26
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            27
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            28
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   29
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        30
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              31
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             32
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            33
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                34
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       35
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       36
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    21
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP                        1
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  2
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      3
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              4
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         5
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             6
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         7
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              8
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         9
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               10
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               11
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           12
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            13
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    14
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             15
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               17
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  19
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP                        20
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CML_FLAGS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"IFP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IVXLT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_DISCARD", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
-    {"L2_SRC_STATIC_MOVE", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_TTL_ERROR", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
-    {"MEMBERSHIP_CHECK_FAILED", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
-    {"NO_COPY_TO_CPU", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SPANNING_TREE_CHECK_FAILED", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
-    {"TRACE_DOP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"VFP", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 30aa758fba7..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,213 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56890_a0_cna_6_5_31_3_0_sf_match_id_info.yml
- * for device bcm56890_a0 and variant cna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  18
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  19
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  20
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  21
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  22
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  23
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  24
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  25
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  26
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  27
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  28
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  29
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  30
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  31
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  32
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  33
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  34
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  35
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  36
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  37
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  38
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  39
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  40
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  41
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  42
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  43
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  44
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  45
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  46
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  47
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  48
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  49
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  50
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  51
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  52
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  53
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  54
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  55
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  56
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  57
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  58
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  59
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  60
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  61
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  62
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  63
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  64
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  65
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  66
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  67
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  68
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  69
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  70
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  71
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  72
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  73
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  74
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  75
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  76
-#define BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT  77
-
-#define BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h
new file mode 100644
index 00000000000..d9cbb66ff69
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h
@@ -0,0 +1,94 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T                      0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T         1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T         2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T            3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T        4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T         5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T                6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T         7
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T                     8
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T                    9
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T                     10
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T                     11
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T                       12
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T         13
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T         14
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   15
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   16
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T                     17
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T         18
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T         19
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T                      20
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T               21
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T               22
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T               23
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T                     24
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T                    25
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T               26
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT    27
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T},\
+    {"cpu_composites_0_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"ep_nih_header_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"ethertype_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T},\
+    {"generic_loopback_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"icmp_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T},\
+    {"ipfix_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T},\
+    {"tcp_first_4bytes_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T},\
+    {"RXPMD_FLEX_T", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 00000000000..1643a163338
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,573 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA                0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID                3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA                6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA             0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA             5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA 0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+
+#endif /* BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 00000000000..38742f2b0e5
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,127 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0                      5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      7
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     8
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           9
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        10
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       11
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       12
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              13
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      14
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             15
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            16
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0                            17
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 18
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    19
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    20
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    21
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    22
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    23
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  24
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              25
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              26
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            27
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            28
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       29
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   30
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        31
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              32
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             33
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            34
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                35
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       36
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       37
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    22
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                      1
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP                        2
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  3
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      4
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              5
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         6
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             7
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         8
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              9
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         10
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               11
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               12
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           13
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            14
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    15
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             16
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 17
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               18
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 19
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  20
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP                        21
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"EM_FT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IVXLT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_TTL_ERROR", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"NO_COPY_TO_CPU", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"TRACE_DOP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"VFP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 00000000000..ffb10fbc935
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,213 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56890_a0_cna_6_5_32_3_0_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant cna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  18
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  19
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  20
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  21
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  22
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  23
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  24
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  25
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  26
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  27
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  28
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  29
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  30
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  31
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  32
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  33
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  34
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  35
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  36
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  37
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  38
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  39
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  40
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  41
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  42
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  43
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  44
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  45
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  46
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  47
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  48
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  49
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  50
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  51
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  52
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  53
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  54
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  55
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  56
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  57
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  58
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  59
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  60
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  61
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  62
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  63
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  64
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  65
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  66
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  67
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  68
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  69
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  70
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  71
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  72
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  73
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  74
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  75
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  76
+#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT  77
+
+#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h
deleted file mode 100644
index 740cd098e3f..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,176 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_H
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T                      0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T                   1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T                      2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T                    3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T         4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T         5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T              6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T            7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T        8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T         9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T                      10
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T                11
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T                     12
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T        13
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T         14
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T                      15
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T               16
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T                  17
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T                 18
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T                  19
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T                      20
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T                 21
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T          22
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T               23
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T                     24
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T               25
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T           26
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T           27
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T        28
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T                     29
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T                 30
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T                    31
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T                     32
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T                     33
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T                       34
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T         35
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T         36
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T                 37
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T                  38
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T                  39
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T                     40
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T                   41
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T             42
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T                  43
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T                  44
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   45
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   46
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T                     47
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T                  48
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T                    49
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T      50
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T          51
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T             52
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T             53
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T             54
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T                 55
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T           56
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T                    57
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T         58
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T         59
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T                      60
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T               61
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T               62
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T               63
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T                     64
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T                    65
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T                     66
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_T               67
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT    68
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T},\
-    {"authen_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T},\
-    {"cntag_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T},\
-    {"cpu_composites_0_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T},\
-    {"ep_nih_header_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T},\
-    {"ethertype_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T},\
-    {"gbp_ethernet_shim_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T},\
-    {"generic_loopback_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T},\
-    {"hg3_base_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T},\
-    {"hg3_extension_0_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T},\
-    {"hop_by_hop_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T},\
-    {"ifa_header_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T},\
-    {"ifa_metadata_a_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T},\
-    {"ifa_metadata_b_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T},\
-    {"ifa_metadata_base_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T},\
-    {"igmp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T},\
-    {"ioam_e2e_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T},\
-    {"ipfix_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T},\
-    {"p_1588_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_3_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
-    {"rarp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T},\
-    {"routing_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T},\
-    {"segment_routing_srh_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T},\
-    {"segment_routing_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T},\
-    {"sflow_shim_0_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T},\
-    {"std_segment_id_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T},\
-    {"svtag_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T},\
-    {"tcp_first_4bytes_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T},\
-    {"vxlan_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h
deleted file mode 100644
index fc6e0c2ef07..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1361 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_DATA_H
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_OPERATION     2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_AP            0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_CPI           2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DEM           3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DIAG          6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIN           7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MPT           9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_POLL          11
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_STA           13
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CNTAG_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_RPID 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_TPID 1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
-    {"RPID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_RPID},\
-    {"TPID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_TPID},\
-    {"cntag_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD         1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SPI         4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_ID          1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GBP_ETHERNET_SHIM_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS     1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED  2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID       3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE   4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER       5
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT          6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \
-    {"ETHERTYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\
-    {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\
-    {"SID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\
-    {"SUBTYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\
-    {"VER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\
-    {"gbp_ethernet_shim_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM    13
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"SOURCE_SYSTEM_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"SRC_SUBPORT_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\
-    {"START_BYTE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP         0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF        1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED      2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP            3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP          4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP          5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP    6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP    7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1    8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER   9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT   10
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FLAGS         0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_VNI           4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_KEY 0
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"KEY", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_KEY},\
-    {"gre_key_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_RESERVED 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name HG3_BASE_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CN                      0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CNG                     1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_TC                      11
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_VERSION                 12
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CN},\
-    {"CNG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_CNG},\
-    {"ENTROPY", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_ENTROPY},\
-    {"EXT_HDR_PRESENT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
-    {"HG3_RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
-    {"L3_ROUTED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
-    {"MIRROR_COPY", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
-    {"RESERVED_ETYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
-    {"SYSTEM_DESTINATION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
-    {"SYSTEM_DESTINATION_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
-    {"SYSTEM_SOURCE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
-    {"TC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_TC},\
-    {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_VERSION},\
-    {"hg3_base_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT}
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP         0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF        1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED      2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP            3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP          4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP          5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP    6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP    7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1    8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER   9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT   10
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
-
-/*!
- * \name HG3_EXTENSION_0_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_SVP               5
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
-    {"CLASS_ID_LSB", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
-    {"CLASS_ID_MSB", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
-    {"DVP_OR_L3_IIF", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
-    {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
-    {"FORWARDING_DOMAIN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
-    {"SVP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
-    {"hg3_extension_0_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CODE      1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IFA_HEADER_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FLAGS      0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_GNS        1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_VER        4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FLAGS},\
-    {"GNS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_GNS},\
-    {"MAX_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
-    {"NEXT_HDR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
-    {"VER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_VER},\
-    {"ifa_header_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_A_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_CN               0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL      1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID    2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED       3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID         4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT          6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_CN},\
-    {"FWD_HDR_TTL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\
-    {"LNS_DEVICE_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\
-    {"PORT_SPEED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\
-    {"QUEUE_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\
-    {"RX_TIMESTAMP_SEC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\
-    {"ifa_metadata_a_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_B_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID         0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID        1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0             2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1             3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC   5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT    6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PORT_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\
-    {"INGRESS_PORT_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\
-    {"MMU_STAT_0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\
-    {"MMU_STAT_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\
-    {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\
-    {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\
-    {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\
-    {"ifa_metadata_b_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_BASE_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR            0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR           2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\
-    {"ifa_metadata_base_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IOAM_E2E_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN  2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID  3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_RESERVED      5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_TYPE          6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \
-    {"IOAM_E2E_DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\
-    {"IOAM_E2E_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\
-    {"IOAM_HDR_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\
-    {"NAMESPACE_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\
-    {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_RESERVED},\
-    {"TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_TYPE},\
-    {"ioam_e2e_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_DA                0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_ID                3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_OPTION            4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_SA                6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOS               7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TTL               9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_DA             0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_SA             5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACDA 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACSA 1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_BOS   0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_EXP   1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_LABEL 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
-    {"DROP_REASON", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
-    {"RESERVED_0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
-    {"SMOD_STATE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
-    {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
-    {"USER_META_DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_OPERATION     2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_DATA          0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TAG  0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SEGMENT_ROUTING_SRH_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS         0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN   1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY    2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER   3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE  4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG           6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\
-    {"LAST_ENTRY", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\
-    {"TAG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\
-    {"segment_routing_srh_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT}
-
-/*!
- * \name SEGMENT_ROUTING_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN      0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER      2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE     3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST         4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT    5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_TAG              6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\
-    {"LAST_ENTRY_FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\
-    {"SEG_LIST", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\
-    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\
-    {"TAG", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_TAG},\
-    {"segment_routing_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name STD_SEGMENT_ID_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_DATA 0
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_DATA},\
-    {"std_segment_id_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT}
-
-/*!
- * \name SVTAG_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_DATA_LWR 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_DATA_UPR 1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
-    {"DATA_LWR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_DATA_LWR},\
-    {"DATA_UPR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_DATA_UPR},\
-    {"svtag_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"L5_BYTES_8_9", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\
-    {"unknown_l5_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_CFI  0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_PCP  1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_TPID 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_VID  3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FLAGS       0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SPI         4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index c65223045a8..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,198 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0                        0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0                        1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0                                  3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0               6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0        10
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     11
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      12
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     13
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        14
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       15
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       16
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0                               17
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0                                18
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              19
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        20
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      21
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             22
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            23
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0                        24
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 25
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    26
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    27
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0                                    28
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0                                    29
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0                             30
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    31
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  32
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0                             33
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0                               34
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     35
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              36
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              37
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            38
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            39
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0                         40
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0               41
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0                           42
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0                43
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       44
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   45
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0                        46
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0          47
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0               48
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        49
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              50
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             51
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             52
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                53
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       54
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   55
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       56
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    48
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT                                 2
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    4
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  5
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     6
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  7
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   8
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS                         9
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     10
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               11
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      12
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   13
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           14
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      15
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      16
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           17
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      18
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            19
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        20
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            21
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        22
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    23
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      24
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      25
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      26
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      27
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      28
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      29
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      30
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      31
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            32
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              33
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  34
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    35
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          36
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              37
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            38
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SRV6                                    41
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                44
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     45
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       46
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     47
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CB_STATION_MOVE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
-    {"CML_FLAGS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DEFAULT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_ECMP_PKT_SAMPLED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_PKT_SAMPLED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
-    {"DST_FP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"EM_FT_HPAE_MISS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\
-    {"IFP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_STATIC_MOVE", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST_RSVD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
-    {"MATCHED_RULE_BIT_0", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"NO_COPY_TO_CPU", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SER_DROP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
-    {"SRV6", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\
-    {"SVP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
-    {"TRACE_DO_NOT_MIRROR", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
-    {"URPF_CHECK_FAILED", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 2fc50ab8fa9..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,515 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56890_a0_dna_6_5_31_6_0_sf_match_id_info.yml
- * for device bcm56890_a0 and variant dna_6_5_31_6_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG  0
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM  1
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  2
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  3
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  4
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  5
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  6
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  7
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  8
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  9
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  10
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  11
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  12
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  13
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1  14
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2  15
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  16
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  17
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  18
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  19
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  20
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  21
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  22
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  23
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  24
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  25
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1  26
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2  27
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  28
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  29
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE  30
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  31
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E  32
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  33
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  34
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  35
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  36
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  37
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  38
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  39
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  40
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  41
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  42
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  43
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  44
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  45
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1  46
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2  47
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  48
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1  49
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2  50
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1  51
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  52
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  53
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  54
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  55
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  56
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  57
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  58
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1  59
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2  60
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  61
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  62
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  63
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG  64
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM  65
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  66
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  67
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  68
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  69
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  70
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  71
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  72
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  73
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  74
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  75
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  76
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  77
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1  78
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2  79
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  80
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  81
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  82
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  83
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  84
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  85
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  86
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  87
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  88
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  89
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1  90
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2  91
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  92
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  93
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE  94
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  95
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E  96
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  97
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  98
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  99
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  100
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  101
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  102
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  103
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  104
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  105
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  106
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  107
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  108
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  109
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1  110
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2  111
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  112
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1  113
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2  114
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1  115
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  116
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  117
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  118
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  119
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  120
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  121
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  122
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1  123
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2  124
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG  125
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  126
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  127
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  128
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  129
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  130
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  131
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  132
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  133
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  134
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1  135
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2  136
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  137
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  138
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  139
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  140
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1  141
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2  142
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  143
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER  144
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE  145
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  146
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  147
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  148
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  149
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  150
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1  151
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2  152
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  153
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1  154
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2  155
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  156
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  157
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  158
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  159
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  160
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  161
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1  162
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2  163
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG  164
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM  165
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  166
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  167
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  168
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  169
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  170
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  171
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  172
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  173
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  174
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  175
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  176
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  177
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1  178
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2  179
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  180
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  181
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  182
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  183
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  184
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  185
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  186
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  187
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  188
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  189
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1  190
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2  191
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  192
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  193
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE  194
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  195
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E  196
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  197
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  198
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  199
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  200
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  201
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  202
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  203
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  204
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  205
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  206
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  207
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  208
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  209
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1  210
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2  211
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  212
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1  213
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2  214
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1  215
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  216
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  217
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  218
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  219
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  220
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  221
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  222
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1  223
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2  224
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  225
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  226
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  227
-#define BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_COUNT  228
-
-#define BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr.h
new file mode 100644
index 00000000000..b6c99f40678
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr.h
@@ -0,0 +1,172 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_H
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T                      0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T                   1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T                      2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T                    3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T              6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T            7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T        8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T         9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T                      10
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T                11
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T                     12
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T        13
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T         14
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T                      15
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T               16
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T                  17
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T                 18
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T                  19
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T                      20
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T                 21
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T          22
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T               23
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T                     24
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T               25
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T           26
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T           27
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T        28
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T                     29
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T                 30
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T                    31
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T                     32
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T                     33
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T                       34
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T         35
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T         36
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T                 37
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T                  38
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T                  39
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T                     40
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T                   41
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T                      42
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T             43
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T                  44
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T                  45
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   46
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   47
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T                     48
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T                  49
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T                    50
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T             51
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T             52
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T             53
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T                 54
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T                    55
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T         56
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T         57
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T                      58
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T               59
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T               60
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T               61
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T                     62
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T                    63
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T                     64
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_T               65
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_COUNT    66
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T},\
+    {"ethertype_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T},\
+    {"gbp_ethernet_shim_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T},\
+    {"generic_loopback_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T},\
+    {"ifa_header_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T},\
+    {"ifa_metadata_a_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T},\
+    {"ifa_metadata_b_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T},\
+    {"ifa_metadata_base_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T},\
+    {"igmp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T},\
+    {"ioam_e2e_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T},\
+    {"ipfix_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T},\
+    {"pim_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T},\
+    {"prog_ext_hdr_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T},\
+    {"svtag_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T},\
+    {"tcp_first_4bytes_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 00000000000..c6421da1baa
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1321 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_AP            0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_CPI           2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DEM           3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FIN           7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MPT           9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_POLL          11
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_STA           13
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_PAD         1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_ID          1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GBP_ETHERNET_SHIM_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS     1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED  2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID       3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE   4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER       5
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \
+    {"ETHERTYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\
+    {"SID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\
+    {"SUBTYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\
+    {"VER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\
+    {"gbp_ethernet_shim_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM    13
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"SOURCE_SYSTEM_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"SRC_SUBPORT_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\
+    {"START_BYTE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP         0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED      2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP            3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP          4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP          5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP         0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED      2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP            3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP          4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP          5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_SVP               5
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID_LSB", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
+    {"CLASS_ID_MSB", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
+    {"DVP_OR_L3_IIF", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_A_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_CN               0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL      1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID    2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED       3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID         4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_CN},\
+    {"FWD_HDR_TTL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\
+    {"PORT_SPEED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\
+    {"ifa_metadata_a_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_B_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID         0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID        1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0             2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1             3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC   5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT    6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\
+    {"MMU_STAT_0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\
+    {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_metadata_b_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_BASE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR            0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\
+    {"ifa_metadata_base_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IOAM_E2E_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN  2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID  3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_RESERVED      5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_TYPE          6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \
+    {"IOAM_E2E_DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\
+    {"IOAM_E2E_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\
+    {"IOAM_HDR_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\
+    {"NAMESPACE_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\
+    {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_RESERVED},\
+    {"TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_TYPE},\
+    {"ioam_e2e_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_DA                0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_ID                3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_SA                6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_DA             0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_SA             5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_MACDA 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PIM_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_0_1 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_2_3 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_4_5 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_6_7 3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \
+    {"HDR_BYTES_0_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_0_1},\
+    {"HDR_BYTES_2_3", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_2_3},\
+    {"HDR_BYTES_4_5", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_4_5},\
+    {"HDR_BYTES_6_7", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_6_7},\
+    {"pim_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name SVTAG_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_DATA_LWR 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_DATA_UPR 1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
+    {"DATA_LWR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_DATA_LWR},\
+    {"DATA_UPR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_DATA_UPR},\
+    {"svtag_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"L5_BYTES_8_9", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\
+    {"unknown_l5_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_SPI         4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 00000000000..cab2684ae61
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,194 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0                        0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0                        1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0                                  3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0               6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0        10
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     11
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      12
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     13
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        14
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       15
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       16
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0                               17
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0                                18
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              19
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        20
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      21
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             22
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            23
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0                        24
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 25
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    26
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    27
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0                                    28
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0                                    29
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0                             30
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    31
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  32
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0                             33
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0                               34
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     35
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              36
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              37
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            38
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            39
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       40
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   41
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0                        42
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0          43
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0               44
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        45
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              46
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             47
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             48
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                49
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       50
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   51
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       52
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    48
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT                                 2
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    4
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  5
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     6
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  7
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   8
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS                         9
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     10
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               11
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      12
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   13
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           14
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      15
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      16
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           17
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      18
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            19
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        20
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            21
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        22
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    23
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      24
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      25
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      26
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      27
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      28
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      29
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      30
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      31
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            32
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              33
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  34
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    35
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          36
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              37
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            38
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SRV6                                    41
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                44
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     45
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       46
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     47
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DEFAULT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"EM_FT_HPAE_MISS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\
+    {"IFP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SER_DROP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SRV6", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\
+    {"SVP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 00000000000..7216ecda1d9
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,509 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56890_a0_dna_6_5_32_4_0_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant dna_6_5_32_4_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG  0
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM  1
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  2
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  3
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  4
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  5
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  6
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  7
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  8
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  9
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  10
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  11
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  12
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  13
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1  14
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2  15
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  16
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  17
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  18
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  19
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  20
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  21
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  22
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  23
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  24
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  25
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1  26
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2  27
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  28
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  29
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE  30
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  31
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E  32
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  33
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  34
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  35
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  36
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  37
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  38
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  39
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  40
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  41
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  42
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  43
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  44
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  45
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1  46
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2  47
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  48
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1  49
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2  50
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  51
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  52
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  53
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  54
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  55
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  56
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  57
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1  58
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2  59
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  60
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  61
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  62
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG  63
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM  64
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  65
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  66
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  67
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  68
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  69
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  70
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  71
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  72
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  73
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  74
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  75
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  76
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1  77
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2  78
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  79
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  80
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  81
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  82
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  83
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  84
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  85
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  86
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  87
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  88
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1  89
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2  90
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  91
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  92
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE  93
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  94
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E  95
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  96
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  97
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  98
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  99
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  100
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  101
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  102
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  103
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  104
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  105
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  106
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  107
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  108
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1  109
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2  110
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  111
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1  112
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2  113
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  114
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  115
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  116
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  117
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  118
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  119
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  120
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1  121
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2  122
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG  123
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  124
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  125
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  126
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  127
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  128
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  129
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  130
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  131
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  132
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1  133
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2  134
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  135
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  136
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  137
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  138
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1  139
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2  140
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  141
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER  142
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE  143
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  144
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  145
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  146
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  147
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  148
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1  149
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2  150
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  151
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1  152
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2  153
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  154
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  155
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  156
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  157
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  158
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  159
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1  160
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2  161
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG  162
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM  163
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  164
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  165
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  166
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  167
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  168
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  169
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  170
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  171
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  172
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  173
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  174
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  175
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1  176
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2  177
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  178
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  179
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  180
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  181
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  182
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  183
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  184
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  185
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  186
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  187
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1  188
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2  189
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  190
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  191
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE  192
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  193
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E  194
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  195
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  196
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  197
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  198
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  199
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  200
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  201
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  202
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  203
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  204
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  205
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  206
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  207
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1  208
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2  209
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  210
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1  211
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2  212
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  213
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  214
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  215
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  216
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  217
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  218
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  219
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1  220
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2  221
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  222
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  223
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  224
+#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_COUNT  225
+
+#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h
new file mode 100644
index 00000000000..fa112f154b2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h
@@ -0,0 +1,94 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T                      0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T         1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T         2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T            3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T        4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T         5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T                6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T         7
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T                     8
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T                    9
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T                     10
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T                     11
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T                       12
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T         13
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T         14
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   15
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   16
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T                     17
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T         18
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T         19
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T                      20
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T               21
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T               22
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T               23
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T                     24
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T                    25
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T               26
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT    27
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T},\
+    {"cpu_composites_0_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"ep_nih_header_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"ethertype_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T},\
+    {"generic_loopback_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"icmp_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T},\
+    {"ipfix_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"psamp_mirror_on_drop_0_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T},\
+    {"tcp_first_4bytes_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T},\
+    {"RXPMD_FLEX_T", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 00000000000..5dfb1d73ff6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,573 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE      1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA                0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID                3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA                6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS               7
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL               9
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA             0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA             5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA 0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI  0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP  1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID 2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+
+#endif /* BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 00000000000..00c36abf368
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,127 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0                      5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      7
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     8
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           9
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        10
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       11
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       12
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              13
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      14
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             15
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            16
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            17
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 18
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    19
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    20
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0                                    21
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0                                    22
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    23
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  24
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              25
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              26
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            27
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            28
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       29
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   30
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        31
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              32
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             33
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            34
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                35
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       36
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       37
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    22
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                      1
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP                        2
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  3
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      4
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              5
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         6
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             7
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         8
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              9
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         10
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               11
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               12
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           13
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            14
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    15
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             16
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 17
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               18
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 19
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  20
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP                        21
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"EM_FT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IVXLT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_TTL_ERROR", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"NO_COPY_TO_CPU", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"TRACE_DOP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"VFP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 00000000000..db5d01fc302
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,213 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm78800_a0_cna_6_5_32_3_0_sf_match_id_info.yml
+ * for device bcm78800_a0 and variant cna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  18
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  19
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  20
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  21
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  22
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  23
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  24
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  25
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  26
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  27
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  28
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  29
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  30
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  31
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  32
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  33
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  34
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  35
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  36
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  37
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  38
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  39
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  40
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  41
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  42
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  43
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  44
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  45
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  46
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  47
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  48
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  49
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  50
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  51
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  52
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  53
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  54
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  55
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  56
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  57
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  58
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  59
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  60
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  61
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  62
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  63
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  64
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  65
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  66
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  67
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  68
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  69
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  70
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  71
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  72
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  73
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  74
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  75
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  76
+#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT  77
+
+#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr.h
deleted file mode 100644
index 7917aa9ca92..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,174 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_H
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T                      0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T                   1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T                      2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T                    3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T         4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T         5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T                      6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T              7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T            8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T        9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T         10
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T                      11
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T                12
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T                     13
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T        14
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T         15
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T                      16
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T               17
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T                  18
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T                 19
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T                  20
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T                      21
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T                 22
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T          23
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T               24
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T                     25
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T               26
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T           27
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T           28
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T        29
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T                     30
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T                 31
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T                    32
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T                     33
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T                     34
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T                       35
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T         36
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T         37
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T                 38
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T                  39
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T                  40
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T                     41
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T                   42
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T             43
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T                  44
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T                  45
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   46
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   47
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T         48
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T         49
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T                     50
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T                  51
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T                    52
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T             53
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T             54
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T             55
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T                 56
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T         57
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T         58
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T                      59
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T               60
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T               61
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T               62
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T                     63
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T                    64
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T                     65
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_T               66
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_COUNT    67
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T},\
-    {"authen_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T},\
-    {"cntag_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T},\
-    {"cpu_composites_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dcn_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T},\
-    {"dest_option_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T},\
-    {"ep_nih_header_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T},\
-    {"ethertype_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T},\
-    {"gbp_ethernet_shim_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T},\
-    {"generic_loopback_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T},\
-    {"hg3_base_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T},\
-    {"hg3_extension_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T},\
-    {"hop_by_hop_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T},\
-    {"ifa_header_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T},\
-    {"ifa_metadata_a_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T},\
-    {"ifa_metadata_b_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T},\
-    {"ifa_metadata_base_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T},\
-    {"igmp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T},\
-    {"ioam_e2e_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T},\
-    {"ipfix_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T},\
-    {"l2_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T},\
-    {"p_1588_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_3_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
-    {"psamp_postcard_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T},\
-    {"psamp_postcard_1_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T},\
-    {"rarp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T},\
-    {"routing_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T},\
-    {"sflow_shim_0_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T},\
-    {"tcp_first_4bytes_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T},\
-    {"vxlan_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr_data.h
deleted file mode 100644
index 6f186ac3a1a..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1362 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_DATA_H
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_OPERATION     2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_DATA        0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_AP            0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_CPI           2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DEM           3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DIAG          6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FIN           7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MPT           9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_POLL          11
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_STA           13
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_VERSION       15
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CNTAG_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_RPID 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_TPID 1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FID_COUNT          2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
-    {"RPID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_RPID},\
-    {"TPID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_TPID},\
-    {"cntag_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DCN_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FLAGS         0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_NEXT_PROTOCOL 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED0     2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED1     3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED2     4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED3     5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED4     6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FID_COUNT          7
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED0},\
-    {"RESERVED1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED1},\
-    {"RESERVED2", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED2},\
-    {"RESERVED3", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED3},\
-    {"RESERVED4", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_RESERVED4},\
-    {"dcn_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_PAD         1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_SPI         4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_ID          1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GBP_ETHERNET_SHIM_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS     1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED  2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID       3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE   4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER       5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT          6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \
-    {"ETHERTYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\
-    {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\
-    {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\
-    {"SID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\
-    {"SUBTYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\
-    {"VER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\
-    {"gbp_ethernet_shim_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM    13
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"SOURCE_SYSTEM_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"SRC_SUBPORT_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\
-    {"START_BYTE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP         0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF        1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED      2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP            3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP          4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP          5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP    6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP    7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1    8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER   9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT   10
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FLAGS         0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_RESERVED0     2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_RESERVED1     3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_VNI           4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_KEY 0
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"KEY", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_KEY},\
-    {"gre_key_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_RESERVED 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_VERSION  3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name HG3_BASE_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_CN                      0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_CNG                     1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_TC                      11
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_VERSION                 12
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_CN},\
-    {"CNG", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_CNG},\
-    {"ENTROPY", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_ENTROPY},\
-    {"EXT_HDR_PRESENT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
-    {"HG3_RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
-    {"L3_ROUTED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
-    {"MIRROR_COPY", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
-    {"RESERVED_ETYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
-    {"SYSTEM_DESTINATION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
-    {"SYSTEM_DESTINATION_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
-    {"SYSTEM_SOURCE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
-    {"TC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_TC},\
-    {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_VERSION},\
-    {"hg3_base_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FID_COUNT}
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP         0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF        1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED      2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP            3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP          4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP          5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP    6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP    7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1    8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER   9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT   10
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
-
-/*!
- * \name HG3_EXTENSION_0_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP               5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
-    {"CLASS_ID_LSB", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
-    {"CLASS_ID_MSB", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
-    {"DVP_OR_L3_IIF", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
-    {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
-    {"FORWARDING_DOMAIN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
-    {"SVP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
-    {"hg3_extension_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_CODE      1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IFA_HEADER_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FLAGS      0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_GNS        1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_VER        4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FLAGS},\
-    {"GNS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_GNS},\
-    {"MAX_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
-    {"NEXT_HDR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
-    {"VER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_VER},\
-    {"ifa_header_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_A_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_CN               0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL      1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID    2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED       3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID         4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT          6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_CN},\
-    {"FWD_HDR_TTL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\
-    {"LNS_DEVICE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\
-    {"PORT_SPEED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\
-    {"QUEUE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\
-    {"RX_TIMESTAMP_SEC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\
-    {"ifa_metadata_a_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_B_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID         0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID        1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0             2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1             3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC   5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT    6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT          7
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PORT_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\
-    {"INGRESS_PORT_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\
-    {"MMU_STAT_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\
-    {"MMU_STAT_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\
-    {"RESIDENCE_TIME_NANOSEC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\
-    {"RX_TIMESTAMP_NANOSEC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\
-    {"TX_QUEUE_BYTE_COUNT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\
-    {"ifa_metadata_b_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_BASE_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR            0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR           2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT          3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"REQUEST_VECTOR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\
-    {"ifa_metadata_base_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IOAM_E2E_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN  2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID  3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_RESERVED      5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_TYPE          6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT          7
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \
-    {"IOAM_E2E_DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\
-    {"IOAM_E2E_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\
-    {"IOAM_HDR_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\
-    {"NAMESPACE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\
-    {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\
-    {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_RESERVED},\
-    {"TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_TYPE},\
-    {"ioam_e2e_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_DA                0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_ID                3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_OPTION            4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_SA                6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TOS               7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TTL               9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_DA             0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_SA             5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_MACDA 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_MACSA 1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_BOS   0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_EXP   1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_LABEL 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_TTL   3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_CNTRL          0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FLAGS          3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
-    {"DROP_REASON", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
-    {"RESERVED_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
-    {"SMOD_STATE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
-    {"UC_COS__COLOR__PROB_IDX", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
-    {"USER_META_DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_3_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
-
-/*!
- * \name PSAMP_POSTCARD_0_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT    1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS     2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S      3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH    4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID     5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT          6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT},\
-    {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S},\
-    {"PSAMP_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH},\
-    {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID},\
-    {"psamp_postcard_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_POSTCARD_1_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE      1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0            2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1            3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID              4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1            5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME        6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH        7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR     8
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT          9
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT \
-    {"COLOR_IDX_COS_DROPLOC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC},\
-    {"DROP_REASON_CODE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE},\
-    {"MMU_STAT_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0},\
-    {"MMU_STAT_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1},\
-    {"QUEUE_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID},\
-    {"RESERVED_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1},\
-    {"RESIDENCE_TIME", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME},\
-    {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH},\
-    {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR},\
-    {"psamp_postcard_1_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_OPERATION     2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_DATA          0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_TAG  0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_DST_PORT   1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"L5_BYTES_8_9", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\
-    {"unknown_l5_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_CFI  0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_PCP  1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_TPID 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_VID  3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FLAGS       0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_SPI         4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index 917492f1e1f..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,186 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0                                  0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0                                  2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0               5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0        9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     10
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      11
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     12
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        13
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       14
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       15
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              16
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        17
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      18
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             19
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            20
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            21
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 22
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    23
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    24
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0                                    25
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0                                    26
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0                             27
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    28
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  29
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0                             30
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0                               31
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     32
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              33
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              34
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            35
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            36
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       37
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   38
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        39
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              40
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             41
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             42
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                43
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       44
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   45
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       46
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    47
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    3
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  4
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     5
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  6
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   7
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU                      8
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     9
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               10
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      11
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   12
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           13
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      14
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      15
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           16
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      17
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            18
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        19
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            20
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        21
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    22
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      23
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      24
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      25
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      26
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      27
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      28
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      29
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      30
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 31
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              32
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  33
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    34
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          35
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              36
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            37
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                38
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED              39
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6                                    40
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     41
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               42
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                43
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     44
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       45
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     46
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CB_STATION_MOVE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
-    {"CML_FLAGS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_ECMP_PKT_SAMPLED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_PKT_SAMPLED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
-    {"DST_FP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"IDEV_CONFIG_TO_CPU", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU},\
-    {"IFP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_STATIC_MOVE", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST_RSVD", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
-    {"MATCHED_RULE_BIT_0", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"NO_COPY_TO_CPU", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SER_DROP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
-    {"SRV6", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\
-    {"SVP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"TRACE_DO_NOT_COPY_TO_CPU", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
-    {"TRACE_DO_NOT_MIRROR", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
-    {"URPF_CHECK_FAILED", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 153181c728c..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,509 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm78800_a0_dna_6_5_31_5_0_sf_match_id_info.yml
- * for device bcm78800_a0 and variant dna_6_5_31_5_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG  0
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM  1
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  2
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  3
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  4
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  5
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  6
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  7
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  8
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN  13
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1  14
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2  15
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  16
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  17
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  18
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  19
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  20
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  21
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  22
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  23
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  24
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  25
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1  26
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2  27
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  28
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  29
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE  30
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  31
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E  32
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  33
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  34
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  35
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  36
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  37
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  38
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  39
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  40
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  41
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  42
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  43
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  44
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  45
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1  46
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2  47
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  48
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1  49
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2  50
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  51
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  52
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  53
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  54
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  55
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  56
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  57
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1  58
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2  59
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  60
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  61
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  62
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG  63
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM  64
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  65
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  66
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  67
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  68
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  69
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  70
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  71
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  72
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  73
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  74
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  75
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN  76
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1  77
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2  78
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  79
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  80
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  81
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  82
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  83
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  84
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  85
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  86
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  87
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  88
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1  89
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2  90
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  91
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  92
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE  93
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  94
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E  95
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  96
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  97
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  98
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  99
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  100
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  101
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  102
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  103
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  104
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  105
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  106
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  107
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  108
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1  109
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2  110
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  111
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1  112
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2  113
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  114
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  115
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  116
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  117
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  118
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  119
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  120
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1  121
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2  122
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG  123
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  124
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  125
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  126
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  127
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  128
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  129
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  130
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  131
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  132
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1  133
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2  134
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  135
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  136
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  137
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  138
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1  139
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2  140
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  141
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER  142
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE  143
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  144
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  145
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  146
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  147
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  148
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1  149
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2  150
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  151
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1  152
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2  153
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  154
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  155
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  156
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  157
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  158
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  159
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1  160
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2  161
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG  162
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM  163
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  164
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  165
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  166
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  167
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  168
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  169
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  170
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  171
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  172
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  173
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  174
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN  175
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1  176
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2  177
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  178
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  179
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  180
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  181
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  182
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  183
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  184
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  185
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  186
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  187
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1  188
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2  189
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  190
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  191
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE  192
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  193
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E  194
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  195
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  196
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  197
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  198
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  199
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  200
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  201
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  202
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  203
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  204
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  205
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  206
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  207
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1  208
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2  209
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  210
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1  211
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2  212
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  213
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  214
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  215
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  216
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  217
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  218
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  219
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1  220
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2  221
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  222
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  223
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  224
-#define BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_COUNT  225
-
-#define BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr.h
new file mode 100644
index 00000000000..e843951594c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr.h
@@ -0,0 +1,176 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_H
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T                      0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T                   1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T                      2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T                    3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T                      6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T              7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T            8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T        9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T         10
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T                      11
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T                12
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T                     13
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T        14
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T         15
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T                      16
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T               17
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_KEY_T                  18
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_ROUT_T                 19
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_SEQ_T                  20
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T                      21
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T                 22
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T          23
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T               24
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T                     25
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T               26
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T           27
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T           28
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T        29
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T                     30
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T                 31
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T                    32
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T                     33
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T                     34
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T                       35
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T         36
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T         37
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T                 38
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_BV_T                  39
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T                  40
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T                     41
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T                   42
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T                      43
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T             44
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T                  45
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T                  46
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   47
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   48
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T         49
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T         50
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T                     51
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T                  52
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T                    53
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T             54
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T             55
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T             56
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T                 57
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T         58
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T         59
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T                      60
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T               61
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T               62
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T               63
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T                     64
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T                    65
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T                     66
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T               67
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT    68
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dcn_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T},\
+    {"dest_option_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T},\
+    {"ethertype_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T},\
+    {"gbp_ethernet_shim_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T},\
+    {"generic_loopback_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T},\
+    {"ifa_header_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T},\
+    {"ifa_metadata_a_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T},\
+    {"ifa_metadata_b_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T},\
+    {"ifa_metadata_base_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T},\
+    {"igmp_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T},\
+    {"ioam_e2e_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T},\
+    {"ipfix_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T},\
+    {"pim_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T},\
+    {"prog_ext_hdr_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"psamp_postcard_0_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T},\
+    {"psamp_postcard_1_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T},\
+    {"rarp_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T},\
+    {"tcp_first_4bytes_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 00000000000..a9e24a3ea50
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1379 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_AP            0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_CPI           2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_DEM           3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_DIAG          6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_FIN           7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_MPT           9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_POLL          11
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_STA           13
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DCN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_FLAGS         0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_NEXT_PROTOCOL 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_RESERVED0     2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_RESERVED1     3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_RESERVED2     4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_RESERVED3     5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_RESERVED4     6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_RESERVED0},\
+    {"RESERVED1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_RESERVED1},\
+    {"RESERVED2", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_RESERVED2},\
+    {"RESERVED3", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_RESERVED3},\
+    {"RESERVED4", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_RESERVED4},\
+    {"dcn_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_PAD         1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_ID          1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GBP_ETHERNET_SHIM_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS     1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED  2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID       3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE   4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER       5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \
+    {"ETHERTYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\
+    {"FLAGS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\
+    {"SID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\
+    {"SUBTYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\
+    {"VER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\
+    {"gbp_ethernet_shim_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         13
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP                14
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"SOURCE_SYSTEM_PORT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"SVP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\
+    {"generic_loopback_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP         0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED      2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP            3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP          4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP          5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP         0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED      2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP            3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP          4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP          5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_SVP               5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID_LSB", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
+    {"CLASS_ID_MSB", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
+    {"DVP_OR_L3_IIF", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE      1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_A_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_CN               0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL      1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID    2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED       3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID         4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_CN},\
+    {"FWD_HDR_TTL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\
+    {"PORT_SPEED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\
+    {"ifa_metadata_a_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_B_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID         0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID        1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0             2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1             3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC   5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT    6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\
+    {"MMU_STAT_0", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\
+    {"RESIDENCE_TIME_NANOSEC", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\
+    {"RX_TIMESTAMP_NANOSEC", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_metadata_b_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_BASE_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR            0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR           2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\
+    {"ifa_metadata_base_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IOAM_E2E_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN  2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID  3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_RESERVED      5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_TYPE          6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \
+    {"IOAM_E2E_DATA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\
+    {"IOAM_E2E_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\
+    {"IOAM_HDR_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\
+    {"NAMESPACE_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\
+    {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_RESERVED},\
+    {"TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_TYPE},\
+    {"ioam_e2e_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_DA                0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_ID                3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_SA                6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS               7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL               9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_DA             0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_SA             5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T_MACDA 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_BOS   0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_EXP   1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PIM_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_HDR_BYTES_0_1 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_HDR_BYTES_2_3 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_HDR_BYTES_4_5 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_HDR_BYTES_6_7 3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \
+    {"HDR_BYTES_0_1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_HDR_BYTES_0_1},\
+    {"HDR_BYTES_2_3", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_HDR_BYTES_2_3},\
+    {"HDR_BYTES_4_5", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_HDR_BYTES_4_5},\
+    {"HDR_BYTES_6_7", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_HDR_BYTES_6_7},\
+    {"pim_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_POSTCARD_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT    1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS     2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S      3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH    4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID     5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT},\
+    {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S},\
+    {"PSAMP_LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH},\
+    {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID},\
+    {"psamp_postcard_0_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_POSTCARD_1_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE      1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0            2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1            3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID              4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1            5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME        6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH        7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR     8
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT          9
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT \
+    {"COLOR_IDX_COS_DROPLOC", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC},\
+    {"DROP_REASON_CODE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE},\
+    {"MMU_STAT_0", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1},\
+    {"QUEUE_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID},\
+    {"RESERVED_1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1},\
+    {"RESIDENCE_TIME", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME},\
+    {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH},\
+    {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_postcard_1_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"L5_BYTES_8_9", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\
+    {"unknown_l5_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI  0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP  1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_SPI         4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 00000000000..bbfa0a86d87
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,187 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0                                  0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0                                  2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0               5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0        9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     10
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      11
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     12
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        13
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       14
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       15
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FLEX_CTR_A0_15_0_15_0                          16
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              17
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        18
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      19
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             20
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            21
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            22
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 23
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    24
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    25
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0                                    26
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0                                    27
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0                             28
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    29
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  30
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0                             31
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0                               32
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     33
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              34
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              35
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            36
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            37
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       38
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   39
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        40
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              41
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             42
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             43
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                44
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       45
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   46
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       47
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    47
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    3
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  4
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     5
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  6
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   7
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU                      8
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     9
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               10
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      11
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   12
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           13
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      14
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      15
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           16
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      17
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            18
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        19
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            20
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        21
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    22
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      23
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      24
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      25
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      26
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      27
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      28
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      29
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      30
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 31
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              32
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  33
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    34
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          35
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              36
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            37
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                38
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED              39
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SRV6                                    40
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     41
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               42
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                43
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     44
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       45
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     46
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IDEV_CONFIG_TO_CPU", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU},\
+    {"IFP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SER_DROP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"SRV6", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\
+    {"SVP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 00000000000..7146b679d46
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,509 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm78800_a0_dna_6_5_32_3_0_sf_match_id_info.yml
+ * for device bcm78800_a0 and variant dna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG  0
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM  1
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  2
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  3
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  4
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  5
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  6
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  7
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  8
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN  13
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1  14
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2  15
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  16
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  17
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  18
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  19
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  20
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  21
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  22
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  23
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  24
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  25
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1  26
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2  27
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  28
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  29
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE  30
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  31
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E  32
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  33
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  34
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  35
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  36
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  37
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  38
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  39
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  40
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  41
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  42
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  43
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  44
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  45
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1  46
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2  47
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  48
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1  49
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2  50
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  51
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  52
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  53
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  54
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  55
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  56
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  57
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1  58
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2  59
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  60
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  61
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  62
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG  63
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM  64
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  65
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  66
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  67
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  68
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  69
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  70
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  71
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  72
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  73
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  74
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  75
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN  76
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1  77
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2  78
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  79
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  80
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  81
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  82
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  83
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  84
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  85
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  86
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  87
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  88
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1  89
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2  90
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  91
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  92
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE  93
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  94
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E  95
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  96
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  97
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  98
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  99
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  100
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  101
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  102
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  103
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  104
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  105
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  106
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  107
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  108
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1  109
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2  110
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  111
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1  112
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2  113
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  114
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  115
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  116
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  117
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  118
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  119
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  120
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1  121
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2  122
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG  123
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  124
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  125
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  126
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  127
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  128
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  129
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  130
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  131
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  132
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1  133
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2  134
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  135
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  136
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  137
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  138
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1  139
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2  140
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  141
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER  142
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE  143
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  144
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  145
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  146
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  147
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  148
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1  149
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2  150
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  151
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1  152
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2  153
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  154
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  155
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  156
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  157
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  158
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  159
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1  160
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2  161
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG  162
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM  163
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  164
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  165
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  166
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  167
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  168
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  169
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  170
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  171
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  172
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  173
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  174
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN  175
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1  176
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2  177
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  178
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  179
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  180
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  181
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  182
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  183
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  184
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  185
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  186
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  187
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1  188
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2  189
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  190
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  191
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE  192
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  193
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E  194
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  195
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  196
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  197
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  198
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  199
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  200
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  201
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  202
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  203
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  204
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  205
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  206
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  207
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1  208
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2  209
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  210
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1  211
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2  212
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  213
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  214
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  215
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  216
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  217
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  218
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  219
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1  220
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2  221
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  222
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  223
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  224
+#define BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT  225
+
+#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c
deleted file mode 100644
index dcfb0a09bb8..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c
+++ /dev/null
@@ -1,7105 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56690_a0_dna_6_5_31_7_0_sf_match_id_info.yml
- * for device bcm56690_a0 and variant dna_6_5_31_7_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h>
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] =
-{
-    0x366c,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
-{
-    0x78f0,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
-{
-    0x1fffe,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
-{
-    0xff00,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] =
-{
-    0x1e4c8,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] =
-{
-    0x10,
-    0x400000,
-    0x1dd8000,
-    0x20,
-    0x0,
-    0x0,
-    0x0,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xddfddf77,
-    0x1,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x400000,
-    0x0,
-    0x100,
-    0x800776,
-    0x0,
-    0x0,
-    0x0,
-    0xf77c0000,
-    0xefeeff77,
-    0x7ddfddfe,
-    0x777f7,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde,
-    0x0,
-    0x0,
-    0x7778,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0x77780,
-    0x0,
-    0x0,
-    0x3bbc0000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0xdde00000,
-    0x1,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0xde000000,
-    0x1d,
-    0x0,
-    0x0,
-    0xeef0,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] =
-{
-    0x0,
-    0x0,
-    0x100000,
-    0x1000000,
-    0x0,
-    0x0,
-    0x2000,
-    0x100100,
-    0x4002002,
-    0x10010040,
-    0x400400,
-    0x10008008,
-    0x40040100,
-    0x1001000,
-    0x40040020,
-    0x100100,
-    0x4002002,
-    0x80080040,
-    0x200200,
-    0x2002000,
-    0x80040040,
-    0x200800,
-    0x4004002,
-    0x80080,
-    0x401001,
-    0x2001004,
-    0x40040020,
-    0x800800,
-    0x2002,
-    0x0,
-    0x0,
-    0x40,
-    0x400,
-    0x0,
-    0x80000000,
-    0x4000000,
-    0x80080040,
-    0x1001000,
-    0x10004004,
-    0x200100,
-    0x4004002,
-    0x40010010,
-    0x800400,
-    0x4010010,
-    0x80080040,
-    0x1001000,
-    0x8020020,
-    0x80000080,
-    0x1000800,
-    0x20020010,
-    0x80080,
-    0x2001001,
-    0x40040020,
-    0x40100100,
-    0x800800,
-    0x20010010,
-    0x80080200,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xff77f77c,
-    0xddfeefee,
-    0x77f77ddf,
-    0x7,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xddf00000,
-    0xbfbbfddf,
-    0xf77f77fb,
-    0x1ddfdd,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde000,
-    0x0,
-    0x0,
-    0x7778000,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0x3bbc0000,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0x1dde,
-    0x0,
-    0x0,
-    0x7778,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0x0,
-    0xeef0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0xeef0000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x40,
-    0x0,
-    0x0,
-    0x0,
-    0x2000000,
-    0x0,
-    0x0,
-    0x8000000,
-    0x0,
-    0x0,
-    0x20000008,
-    0x0,
-    0x0,
-    0x40000,
-    0x0,
-    0x0,
-    0x40000000,
-    0x0,
-    0x0,
-    0x80000000,
-    0x0,
-    0x0,
-    0x0,
-    0x400,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1000000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x800,
-    0x0,
-    0x0,
-    0x2000,
-    0x0,
-    0x200000,
-    0x8000,
-    0x0,
-    0x0,
-    0x10,
-    0x0,
-    0x0,
-    0x10000,
-    0x0,
-    0x0,
-    0x20000,
-    0x0,
-    0x0,
-    0x10000000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] =
-{
-    0x1e,
-    0x400000,
-    0x1dd8000,
-    0x3ddcafe0,
-    0x0,
-    0x8000,
-    0xc003bb00,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xddfddf77,
-    0xff77f77d,
-    0xddfeefee,
-    0x77f77ddf,
-    0xfddfddff,
-    0x77f77fbb,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xefeeff77,
-    0x7fbbfbbe,
-    0xfbbfbbe5,
-    0xeff77f77,
-    0xbfbbeefe,
-    0xf77f77fb,
-    0xdfeefeef,
-    0x7f77ddfd,
-    0xfbbfddf7,
-    0x77f77fbb,
-    0xbeefeeff,
-    0x1bbbfb,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfddfddf0,
-    0x77f77fbb,
-    0x1ddfddf,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77c00000,
-    0xfeeff77f,
-    0xf77ddfdd,
-    0x777,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0xf0000000,
-    0xee,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0xeef,
-    0x0,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0x3bbc000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0x3bbc0000,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x1dd,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbe000000,
-    0xf77fbbfb,
-    0xefeeff77,
-    0x3bbfbbe,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xefeef800,
-    0xfddfddfe,
-    0xeefbbfbb,
-    0xeef,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0xeef00,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0xeef0000,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x1dd,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x0,
-    0x1dde00,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] =
-{
-    0x0,
-    0x400000,
-    0x0,
-    0x80,
-    0x0,
-    0x8000,
-    0x0,
-    0x8004004,
-    0x140080,
-    0x400001,
-    0x20010010,
-    0x500200,
-    0x1000004,
-    0x80040040,
-    0x1001400,
-    0x8004000,
-    0x100080,
-    0x2002801,
-    0x4008000,
-    0x80080,
-    0x2801001,
-    0x8000020,
-    0x100100,
-    0x5002002,
-    0x10000040,
-    0x80080000,
-    0x1001000,
-    0x20028,
-    0x80,
-    0x0,
-    0x100,
-    0x2000000,
-    0x0,
-    0x0,
-    0x2,
-    0x100000,
-    0x2002001,
-    0x40050,
-    0x400100,
-    0x8008004,
-    0x100140,
-    0x1000400,
-    0x50020010,
-    0x400,
-    0x2002001,
-    0xa0040040,
-    0x800,
-    0x2001002,
-    0x40040020,
-    0x800a00,
-    0x4002000,
-    0x80080040,
-    0x1001400,
-    0x4000,
-    0x40020020,
-    0xa00400,
-    0x2000008,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0xaf00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x78000000,
-    0x5,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x2,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x15e000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x8800,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x40000000,
-    0x4,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x20000000,
-    0x2,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x110000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x40020,
-    0x0,
-    0x0,
-    0x40000000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x800000,
-    0x10,
-    0x0,
-    0x0,
-    0x10000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] =
-{
-    0x18,
-    0x400000,
-    0x1dd8000,
-    0x3ddcafe0,
-    0x0,
-    0x8000,
-    0x4003bb00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x600000,
-    0x0,
-    0x100,
-    0xbf800776,
-    0xf772,
-    0x0,
-    0xec000002,
-    0x1000e,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xddfddf77,
-    0xff77f77d,
-    0xddfeefee,
-    0x77f77ddf,
-    0xfddfddff,
-    0x77f77fbb,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xefeeff77,
-    0x7fbbfbbe,
-    0xfbbfbbe5,
-    0xeff77f77,
-    0xbfbbeefe,
-    0xf77f77fb,
-    0xdfeefeef,
-    0x7f77ddfd,
-    0xfbbfddf7,
-    0x77f77fbb,
-    0xbeefeeff,
-    0x3bbfb,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf77e0000,
-    0xefeeff77,
-    0x7ddfddfe,
-    0xddf777f7,
-    0xbfbbfddf,
-    0xf77f77fb,
-    0x77fddfdd,
-    0xfeeff77f,
-    0xf77ddfdd,
-    0xefeeff77,
-    0xfddfddfe,
-    0xeefbbfbb,
-    0xef95feef,
-    0xfddfeefe,
-    0xbbfbbfdd,
-    0xdfeefeef,
-    0xfbbfddfd,
-    0x77f77fbb,
-    0x77ddfddf,
-    0xfeefeeff,
-    0xbbfddfdd,
-    0xefeefbbf,
-    0xe,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] =
-{
-    0x0,
-    0x0,
-    0x400000,
-    0x4000000,
-    0x0,
-    0x0,
-    0x8000,
-    0x400400,
-    0x10008008,
-    0x40040100,
-    0x1001000,
-    0x40020020,
-    0x100400,
-    0x4004001,
-    0x100080,
-    0x400401,
-    0x10008008,
-    0x200100,
-    0x800802,
-    0x8008000,
-    0x100100,
-    0x802002,
-    0x10010008,
-    0x200200,
-    0x1004004,
-    0x8004010,
-    0x100080,
-    0x2002001,
-    0x8008,
-    0x0,
-    0x0,
-    0x100,
-    0x1000,
-    0x0,
-    0x0,
-    0x10000002,
-    0x200100,
-    0x4004002,
-    0x40010010,
-    0x800400,
-    0x10010008,
-    0x40040,
-    0x2001001,
-    0x10040040,
-    0x200100,
-    0x4004002,
-    0x20080080,
-    0x200,
-    0x4002002,
-    0x80080040,
-    0x200200,
-    0x8004004,
-    0x100080,
-    0x400401,
-    0x2002001,
-    0x80040040,
-    0x200800,
-    0x2,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbbfbbe0,
-    0xeff77f77,
-    0xbfbbeefe,
-    0x3b,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xef800000,
-    0xfddfeefe,
-    0xbbfbbfdd,
-    0xeefeef,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0xdde00000,
-    0x1,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0xde000000,
-    0x1d,
-    0x0,
-    0x0,
-    0xeef0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0x77780,
-    0x0,
-    0xe0000000,
-    0x1dd,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x0,
-    0x3bbc00,
-    0x0,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0xbbc00000,
-    0x3,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf77f77c0,
-    0xdfeefeef,
-    0x7f77ddfd,
-    0x77,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdf000000,
-    0xfbbfddfd,
-    0x77f77fbb,
-    0x1ddfddf,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0x1dde,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0x0,
-    0xeef0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0xeef0000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0x1dde00,
-    0x0,
-    0x0,
-    0x3bbc00,
-    0x0,
-    0x0,
-    0xbbc00000,
-    0x3,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0x0,
-    0x3bbc,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] =
-{
-    0x0,
-    0x0,
-    0x58000,
-    0x580e00,
-    0x0,
-    0x0,
-    0xb00,
-    0xb0058058,
-    0x1600b00,
-    0x5805816,
-    0xc0160160,
-    0x5802c02,
-    0x16016058,
-    0x580580,
-    0x1601600b,
-    0xb0058058,
-    0x1600b00,
-    0x2c02c016,
-    0x700b00b0,
-    0xb00b00,
-    0x2c016016,
-    0xb00b02c0,
-    0x1601600,
-    0x5802c02c,
-    0x60160580,
-    0xb00581,
-    0x1601600b,
-    0xb02c02c0,
-    0xb00,
-    0x0,
-    0x0,
-    0x38000016,
-    0x160,
-    0x0,
-    0x2c000000,
-    0x1600000,
-    0x2c02c016,
-    0x60580580,
-    0x5801601,
-    0xb00b0058,
-    0x81601600,
-    0x16005805,
-    0x802c0160,
-    0x1605805,
-    0x2c02c016,
-    0x580580,
-    0x2c0b00b,
-    0x2c01c02c,
-    0x805802c0,
-    0xb00b005,
-    0x5802c02c,
-    0xb00580,
-    0x1601600b,
-    0x16058058,
-    0x802c02c0,
-    0xb005805,
-    0x2c02c0b0,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] =
-{
-    0x0,
-    0x0,
-    0x50000,
-    0x500c00,
-    0x0,
-    0x0,
-    0xa00,
-    0xa0050050,
-    0x1400a00,
-    0x5005014,
-    0x80140140,
-    0x5002802,
-    0x14014050,
-    0x500500,
-    0x1401400a,
-    0xa0050050,
-    0x1400a00,
-    0x28028014,
-    0x600a00a0,
-    0xa00a00,
-    0x28014014,
-    0xa00a0280,
-    0x1401400,
-    0x50028028,
-    0x40140500,
-    0xa00501,
-    0x1401400a,
-    0xa0280280,
-    0xa00,
-    0x0,
-    0x0,
-    0x30000014,
-    0x140,
-    0x0,
-    0x28000000,
-    0x1400000,
-    0x28028014,
-    0x40500500,
-    0x5001401,
-    0xa00a0050,
-    0x1401400,
-    0x14005005,
-    0x280140,
-    0x1405005,
-    0x28028014,
-    0x500500,
-    0x280a00a,
-    0x28018028,
-    0x500280,
-    0xa00a005,
-    0x50028028,
-    0xa00500,
-    0x1401400a,
-    0x14050050,
-    0x280280,
-    0xa005005,
-    0x280280a0,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] =
-{
-    0x0,
-    0x0,
-    0xd80000,
-    0xd80a000,
-    0x0,
-    0x0,
-    0x1b000,
-    0xd80d80,
-    0x3601b01b,
-    0xd80d8360,
-    0x3603600,
-    0xd806c06c,
-    0x60360d80,
-    0xd80d803,
-    0x603601b0,
-    0xd80d83,
-    0x3601b01b,
-    0xc06c0360,
-    0x1b01b06,
-    0x1b01b005,
-    0xc0360360,
-    0x1b06c06,
-    0x3603601b,
-    0x806c06c0,
-    0x360d80d,
-    0x1b00d836,
-    0x603601b0,
-    0x6c06c03,
-    0x1b01b,
-    0x0,
-    0x0,
-    0x80000360,
-    0x3602,
-    0x0,
-    0xc0000000,
-    0x36000006,
-    0xc06c0360,
-    0xd80d806,
-    0xd8036036,
-    0x1b00d80,
-    0x3603601b,
-    0x600d80d8,
-    0x6c03603,
-    0x360d80d8,
-    0xc06c0360,
-    0xd80d806,
-    0x6c1b01b0,
-    0xc01406c0,
-    0xd806c06,
-    0xb01b00d8,
-    0x806c06c1,
-    0x1b00d80d,
-    0x603601b0,
-    0x60d80d83,
-    0x6c06c03,
-    0xb00d80d8,
-    0xc06c1b01,
-    0x6,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x100000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] =
-{
-    0x0,
-    0x0,
-    0x1000000,
-    0x10000000,
-    0x0,
-    0x0,
-    0x20000,
-    0x1001000,
-    0x40020020,
-    0x100400,
-    0x4004001,
-    0x80080,
-    0x401001,
-    0x10010004,
-    0x400200,
-    0x1001004,
-    0x40020020,
-    0x800400,
-    0x2002008,
-    0x20020000,
-    0x400400,
-    0x2008008,
-    0x40040020,
-    0x800800,
-    0x4010010,
-    0x20010040,
-    0x400200,
-    0x8008004,
-    0x20020,
-    0x0,
-    0x0,
-    0x400,
-    0x4000,
-    0x0,
-    0x0,
-    0x40000008,
-    0x800400,
-    0x10010008,
-    0x40040,
-    0x2001001,
-    0x40040020,
-    0x100100,
-    0x8004004,
-    0x40100100,
-    0x800400,
-    0x10010008,
-    0x80200200,
-    0x800,
-    0x10008008,
-    0x200100,
-    0x800802,
-    0x20010010,
-    0x400200,
-    0x1001004,
-    0x8008004,
-    0x100100,
-    0x802002,
-    0x8,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] =
-{
-    0x0,
-    0x0,
-    0x840000,
-    0x8400000,
-    0x0,
-    0x0,
-    0x10800,
-    0x80840840,
-    0x21010810,
-    0x84084210,
-    0x2102100,
-    0x84042042,
-    0x10210840,
-    0x8408402,
-    0x10210108,
-    0x80840842,
-    0x21010810,
-    0x20420210,
-    0x1081084,
-    0x10810800,
-    0x20210210,
-    0x81084204,
-    0x21021010,
-    0x40420420,
-    0x2108408,
-    0x10808421,
-    0x10210108,
-    0x84204202,
-    0x10810,
-    0x0,
-    0x0,
-    0x210,
-    0x2100,
-    0x0,
-    0x20000000,
-    0x21000004,
-    0x20420210,
-    0x8408404,
-    0x84021021,
-    0x81080840,
-    0x21021010,
-    0x10084084,
-    0x4202102,
-    0x21084084,
-    0x20420210,
-    0x8408404,
-    0x42108108,
-    0x20000420,
-    0x8404204,
-    0x8108084,
-    0x40420421,
-    0x10808408,
-    0x10210108,
-    0x10840842,
-    0x4204202,
-    0x8084084,
-    0x20421081,
-    0x4,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x20000000,
-    0x0,
-    0x8000,
-    0x4003bb00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbbe0000,
-    0x77f77fbb,
-    0xbeefeeff,
-    0x3bbfb,
-    0x0,
-    0x0,
-    0x0,
-    0x8000,
-    0x0,
-    0xec000002,
-    0x1000e,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfeefeef8,
-    0xbbfddfdd,
-    0xefeefbbf,
-    0xe,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdde00000,
-    0x1,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0x1dde000,
-    0x0,
-    0x0,
-    0x3bbc000,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0x78000000,
-    0x77,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780,
-    0x0,
-    0x0,
-    0x1dde00,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0xeef,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0x1dde000,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] =
-{
-    0x33033198,
-    0xcc66066,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] =
-{
-    0x44044220,
-    0x11088088,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[2] =
-{
-    0xffc00000,
-    0xffffffff,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[2] =
-{
-    0x0,
-    0xfffff800,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[2] =
-{
-    0xf80f87c0,
-    0x3e1f01f0,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[2] =
-{
-    0xfffffffe,
-    0xffffffff,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[2] =
-{
-    0x1ff800,
-    0x7fe003ff,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[2] =
-{
-    0xa23a2510,
-    0xe8944744,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[14] =
-{
-    0x10,
-    0x0,
-    0x4,
-    0x20003df6,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbe00000,
-    0x7dff7dfe,
-    0xbeffbeff,
-    0xfbefdf7f,
-    0x3df7,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[35] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbc00000,
-    0x1e,
-    0x0,
-    0x0,
-    0x7bef0000,
-    0x0,
-    0x0,
-    0x0,
-    0x1efbc00,
-    0x0,
-    0x0,
-    0x0,
-    0xdf780000,
-    0x3,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x1ef,
-    0x0,
-    0x0,
-    0xdf780000,
-    0x3,
-    0x0,
-    0x0,
-    0xde000000,
-    0xf7,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x40,
-    0x0,
-    0x40000,
-    0x0,
-    0x0,
-    0x10000000,
-    0x20000000,
-    0x10001000,
-    0x8000800,
-    0x800400,
-    0x800040,
-    0x400040,
-    0x200020,
-    0x20010,
-    0x20001,
-    0x10001,
-    0x10008001,
-    0x800,
-    0x4000000,
-    0x2000200,
-    0x1000100,
-    0x100080,
-    0x8,
-    0x10002,
-    0x80008001,
-    0x8004000,
-    0x4000400,
-    0x2000200,
-    0x1000100,
-    0x100080,
-    0x10008,
-    0x80008001,
-    0x40004000,
-    0x4002000,
-    0x88000200,
-    0x88888,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[18] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbef8000,
-    0xfdf7fdf7,
-    0xfefbfefb,
-    0xdfefbf7d,
-    0xf7,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[35] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x3df7,
-    0x0,
-    0x0,
-    0xde000000,
-    0xf7,
-    0x0,
-    0x0,
-    0x0,
-    0x1efbc,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de00,
-    0x0,
-    0x0,
-    0x0,
-    0x1efbc,
-    0x0,
-    0x0,
-    0x0,
-    0x7bef00,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[35] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x40000000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x100000,
-    0x0,
-    0x0,
-    0x0,
-    0x4000,
-    0x0,
-    0x0,
-    0x100,
-    0x100,
-    0x0,
-    0x0,
-    0x0,
-    0x20000,
-    0x0,
-    0x0,
-    0x0,
-    0x1000000,
-    0x0,
-    0x0,
-    0x0,
-    0x20000,
-    0x0,
-    0x0,
-    0x0,
-    0x800000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[39] =
-{
-    0x1e,
-    0x0,
-    0x4,
-    0xe0003df6,
-    0xffffffff,
-    0x7df7117,
-    0x0,
-    0x1000000,
-    0x7d800000,
-    0xfbf8000f,
-    0x7dff7dfe,
-    0xbeffbeff,
-    0xfbefdf7f,
-    0xfbefbdf7,
-    0xfdf7fdf7,
-    0xfefbfefb,
-    0xdfefbf7d,
-    0xdfefbff7,
-    0xdff7dff7,
-    0x7dfbeff7,
-    0xffffbeff,
-    0xdf7fffff,
-    0xefbfefbf,
-    0xf7dff7df,
-    0xff7dfbef,
-    0xbe22ffbe,
-    0xdff7dfef,
-    0xeffbeff7,
-    0xbefdf7fb,
-    0xdf7fdf7f,
-    0xefbfefbf,
-    0xf7dff7df,
-    0xff7dfbef,
-    0xdff7dfbe,
-    0xeffbeff7,
-    0xf7fdf7fb,
-    0xdf7efbfd,
-    0xfffdefbf,
-    0xffffff,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdfefbe00,
-    0xdff7dff7,
-    0x7dfbeff7,
-    0x7beff,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[36] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x7de00000,
-    0xf,
-    0x0,
-    0x0,
-    0x3df78000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xefbc0000,
-    0x1,
-    0x0,
-    0x0,
-    0xde000000,
-    0xf7,
-    0x0,
-    0x0,
-    0xefbc0000,
-    0x1,
-    0x0,
-    0x0,
-    0xef000000,
-    0x7b,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x180,
-    0x0,
-    0x180000,
-    0x0,
-    0x0,
-    0x60000000,
-    0xc0000000,
-    0x60006000,
-    0x30003000,
-    0x3001800,
-    0x3000180,
-    0x1800180,
-    0xc000c0,
-    0xc0060,
-    0xc0006,
-    0x60006,
-    0x60030006,
-    0x3000,
-    0x18000000,
-    0xc000c00,
-    0x6000600,
-    0x600300,
-    0x30,
-    0x6000c,
-    0x30006,
-    0x30018003,
-    0x18001800,
-    0xc000c00,
-    0x6000600,
-    0x600300,
-    0x60030,
-    0x30006,
-    0x80018003,
-    0x1800c001,
-    0xc00,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[22] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x3fffffff,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfff80000,
-    0x3ffff,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[22] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1fffe,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xffe00000,
-    0x1f,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[22] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1fe03fc,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3fc00000,
-    0x1fe0,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[22] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x31999b30,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xb3000000,
-    0x31999,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[22] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3de1e3c0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3c000000,
-    0x3de1e,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[26] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdf7c0000,
-    0xefbfefbf,
-    0xf7dff7df,
-    0xff7dfbef,
-    0x7be,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[36] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x7bef0,
-    0x0,
-    0x0,
-    0xc0000000,
-    0x1efb,
-    0x0,
-    0x0,
-    0xf7de00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de,
-    0x0,
-    0x0,
-    0x0,
-    0x7bef00,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de,
-    0x0,
-    0x0,
-    0x0,
-    0x3df780,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[38] =
-{
-    0x0,
-    0x0,
-    0x4,
-    0x0,
-    0x40000000,
-    0x0,
-    0x0,
-    0x1000000,
-    0x0,
-    0x800000,
-    0x400040,
-    0x280020,
-    0x10,
-    0x20001,
-    0x80010001,
-    0x4000a000,
-    0x4000000,
-    0x4000800,
-    0x5000400,
-    0x200,
-    0x20,
-    0x100000,
-    0x80008,
-    0x50004,
-    0x20000002,
-    0x8000800,
-    0x4000400,
-    0x2800200,
-    0x100,
-    0x100010,
-    0x80008,
-    0x50004,
-    0x20000002,
-    0x4000000,
-    0x2000200,
-    0x1400100,
-    0x80,
-    0x8,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[26] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x117,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x22f000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[26] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x104,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x208000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x20000000,
-    0x0,
-    0x1000,
-    0x0,
-    0x0,
-    0x0,
-    0x80000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x100,
-    0x0,
-    0x100000,
-    0x0,
-    0x0,
-    0x40000000,
-    0x80000000,
-    0x40004000,
-    0x20002000,
-    0x2001000,
-    0x2000100,
-    0x1000100,
-    0x800080,
-    0x80040,
-    0x80004,
-    0x40004,
-    0x40020004,
-    0x2000,
-    0x10000000,
-    0x8000800,
-    0x4000400,
-    0x400200,
-    0x20,
-    0x40008,
-    0x20004,
-    0x20010002,
-    0x10001000,
-    0x8000800,
-    0x4000400,
-    0x400200,
-    0x40020,
-    0x20004,
-    0x10002,
-    0x10008001,
-    0x800,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] =
-{
-    0x18,
-    0x0,
-    0x4,
-    0xe0003df6,
-    0xffffffff,
-    0x7df7117,
-    0x0,
-    0x1000000,
-    0x7d800000,
-    0x8000f,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbf00000,
-    0x7dff7dfe,
-    0xbeffbeff,
-    0xfbefdf7f,
-    0xfbefbdf7,
-    0xfdf7fdf7,
-    0xfefbfefb,
-    0xdfefbf7d,
-    0xdfefbff7,
-    0xdff7dff7,
-    0x7dfbeff7,
-    0xffffbeff,
-    0xdf7fffff,
-    0xefbfefbf,
-    0xf7dff7df,
-    0xff7dfbef,
-    0xbe22ffbe,
-    0xdff7dfef,
-    0xeffbeff7,
-    0xbefdf7fb,
-    0xdf7fdf7f,
-    0xefbfefbf,
-    0xf7dff7df,
-    0xff7dfbef,
-    0xdff7dfbe,
-    0xeffbeff7,
-    0xf7fdf7fb,
-    0xdf7efbfd,
-    0x1efbf,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfffc0000,
-    0x1fffff,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfff80000,
-    0x1ffff,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfff00000,
-    0x1fff,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xffe00000,
-    0x1ff,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xffc00000,
-    0x1f,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xff800000,
-    0x1,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1f000000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xcc000000,
-    0xccccc,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x10000000,
-    0x111111,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x400,
-    0x0,
-    0x400000,
-    0x0,
-    0x0,
-    0x0,
-    0x1,
-    0x10002,
-    0x80008001,
-    0x8004000,
-    0x8000400,
-    0x4000400,
-    0x2000200,
-    0x200100,
-    0x200010,
-    0x100010,
-    0x80010,
-    0x8001,
-    0x40000000,
-    0x20002000,
-    0x10001000,
-    0x1000800,
-    0x80,
-    0x100020,
-    0x80010,
-    0x80040008,
-    0x40004000,
-    0x20002000,
-    0x10001000,
-    0x1000800,
-    0x100080,
-    0x80010,
-    0x40008,
-    0x40020004,
-    0x2000,
-    0x200000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[30] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbe000000,
-    0xdff7dfef,
-    0xeffbeff7,
-    0xbefdf7fb,
-    0x3df7f,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[37] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbef00000,
-    0x7,
-    0x0,
-    0x0,
-    0x1efbc000,
-    0x0,
-    0x0,
-    0xde000000,
-    0xf7,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de0000,
-    0x0,
-    0x0,
-    0x0,
-    0xef000000,
-    0x7b,
-    0x0,
-    0x0,
-    0xf7de0000,
-    0x0,
-    0x0,
-    0x0,
-    0xf7800000,
-    0x3d,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x400000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[34] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdf7c0000,
-    0xefbfefbf,
-    0xf7dff7df,
-    0xff7dfbef,
-    0x7be,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[37] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3df78,
-    0x0,
-    0x0,
-    0xe0000000,
-    0xf7d,
-    0x0,
-    0x0,
-    0x7bef00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x7bef,
-    0x0,
-    0x0,
-    0x0,
-    0x3df780,
-    0x0,
-    0x0,
-    0x0,
-    0x7bef,
-    0x0,
-    0x0,
-    0x0,
-    0x1efbc0,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x16,
-    0x0,
-    0x16007,
-    0x0,
-    0x0,
-    0x5800000,
-    0xb000000,
-    0x5800580,
-    0x2c002c0,
-    0x2c0160,
-    0x2c0016,
-    0x160016,
-    0x800b000b,
-    0x5800b005,
-    0x5800b000,
-    0x58005800,
-    0x5802c00,
-    0x2c0,
-    0x1600000,
-    0xb000b0,
-    0x580058,
-    0xc005802c,
-    0xb000e002,
-    0x58005800,
-    0x2c002c00,
-    0x2c01600,
-    0x1600160,
-    0xb000b0,
-    0x580058,
-    0xc005802c,
-    0x58005802,
-    0x2c002c00,
-    0x16001600,
-    0x1600b00,
-    0xb0,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x14,
-    0x0,
-    0x14006,
-    0x0,
-    0x0,
-    0x5000000,
-    0xa000000,
-    0x5000500,
-    0x2800280,
-    0x280140,
-    0x280014,
-    0x140014,
-    0xa000a,
-    0x5000a005,
-    0x5000a000,
-    0x50005000,
-    0x5002800,
-    0x280,
-    0x1400000,
-    0xa000a0,
-    0x500050,
-    0x80050028,
-    0xa000c002,
-    0x50005000,
-    0x28002800,
-    0x2801400,
-    0x1400140,
-    0xa000a0,
-    0x500050,
-    0x80050028,
-    0x50005002,
-    0x28002800,
-    0x14001400,
-    0x1400a00,
-    0xa0,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x1de0,
-    0x0,
-    0x1de0110,
-    0x0,
-    0x0,
-    0x78000000,
-    0xf0000007,
-    0x7807780e,
-    0xbc03bc07,
-    0x3bc1de03,
-    0x3bc01de0,
-    0x1de01de0,
-    0xef00ef0,
-    0x80ef0778,
-    0x80ef0077,
-    0x80778077,
-    0x783bc077,
-    0x3bc07,
-    0xde000000,
-    0xef00ef01,
-    0x77807780,
-    0x7783bc0,
-    0x2203bc,
-    0x807780ef,
-    0xc03bc077,
-    0xbc1de03b,
-    0xde01de03,
-    0xef00ef01,
-    0x77807780,
-    0x7783bc0,
-    0x807783bc,
-    0xc03bc077,
-    0xe01de03b,
-    0xde0ef01d,
-    0xef01,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x800000,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x2000,
-    0x0,
-    0x2000000,
-    0x0,
-    0x0,
-    0x0,
-    0x8,
-    0x80010,
-    0x40008,
-    0x40020004,
-    0x40002000,
-    0x20002000,
-    0x10001000,
-    0x1000800,
-    0x1000080,
-    0x800080,
-    0x400080,
-    0x40008,
-    0x0,
-    0x10002,
-    0x80008001,
-    0x8004000,
-    0x400,
-    0x800100,
-    0x400080,
-    0x200040,
-    0x20004,
-    0x10002,
-    0x80008001,
-    0x8004000,
-    0x800400,
-    0x400080,
-    0x200040,
-    0x100020,
-    0x10002,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x810,
-    0x0,
-    0x810000,
-    0x0,
-    0x0,
-    0x4000000,
-    0x8000002,
-    0x4020404,
-    0x2010202,
-    0x10208101,
-    0x10200810,
-    0x8100810,
-    0x4080408,
-    0x40408204,
-    0x40408020,
-    0x40204020,
-    0x4102020,
-    0x10202,
-    0x81000000,
-    0x40804080,
-    0x20402040,
-    0x2041020,
-    0x80000102,
-    0x40204040,
-    0x20102020,
-    0x2081010,
-    0x81008101,
-    0x40804080,
-    0x20402040,
-    0x2041020,
-    0x40204102,
-    0x20102020,
-    0x10081010,
-    0x81040808,
-    0x4080,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x1000,
-    0x0,
-    0x1000000,
-    0x0,
-    0x0,
-    0x0,
-    0x4,
-    0x40008,
-    0x20004,
-    0x20010002,
-    0x20001000,
-    0x10001000,
-    0x8000800,
-    0x800400,
-    0x800040,
-    0x400040,
-    0x200040,
-    0x20004,
-    0x0,
-    0x80008001,
-    0x40004000,
-    0x4002000,
-    0x200,
-    0x400080,
-    0x200040,
-    0x100020,
-    0x10002,
-    0x80008001,
-    0x40004000,
-    0x4002000,
-    0x400200,
-    0x200040,
-    0x100020,
-    0x80010,
-    0x8001,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x4000000,
-    0x0,
-    0x1000000,
-    0x7d800000,
-    0x8000f,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdf000000,
-    0xeffbeff7,
-    0xf7fdf7fb,
-    0xdf7efbfd,
-    0x1efbf,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x3df7,
-    0x0,
-    0x0,
-    0xde000000,
-    0xf7,
-    0x0,
-    0x0,
-    0x7bef0,
-    0x0,
-    0x0,
-    0x0,
-    0xf0000000,
-    0x7be,
-    0x0,
-    0x0,
-    0x0,
-    0x3df78,
-    0x0,
-    0x0,
-    0xf0000000,
-    0x7be,
-    0x0,
-    0x0,
-    0x0,
-    0x1efbc,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
-{
-    0x8,
-};
-
-
-static bcmpkt_rxpmd_match_id_db_t
-bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_COUNT] = {
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_CNTAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x7c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x10000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0xc004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x18000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
-        .match        = 0x30,
-        .match_mask   = 0x438,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
-        .match        = 0x40000,
-        .match_mask   = 0x40000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 18,
-        .minbit       = 18,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x80,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x44000,
-        .match_mask   = 0x5c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x40020,
-        .match_mask   = 0x40020,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x4004,
-        .match_mask   = 0x7c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x20000,
-        .match_mask   = 0x20000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 17,
-        .minbit       = 17,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
-        .match        = 0x400,
-        .match_mask   = 0x400,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 10,
-        .minbit       = 10,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
-        .match        = 0x402,
-        .match_mask   = 0x402,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
-        .match        = 0x404,
-        .match_mask   = 0x404,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
-        .match        = 0x408,
-        .match_mask   = 0x408,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
-        .match        = 0x410,
-        .match_mask   = 0x410,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
-        .match        = 0x420,
-        .match_mask   = 0x420,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
-        .match        = 0x440,
-        .match_mask   = 0x440,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x480,
-        .match_mask   = 0x480,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
-        .match        = 0x500,
-        .match_mask   = 0x500,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7ffff,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 18,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x1c000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
-        .match        = 0x8000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x8004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0xc000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
-        .match        = 0x810,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x14000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
-        .name         = "EGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x7c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x10000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0xc004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x18000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
-        .match        = 0x30,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
-        .match        = 0x40000,
-        .match_mask   = 0x40000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 18,
-        .minbit       = 18,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x80,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x44000,
-        .match_mask   = 0x5c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x40020,
-        .match_mask   = 0x40020,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x4004,
-        .match_mask   = 0x7c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x20000,
-        .match_mask   = 0x20000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 17,
-        .minbit       = 17,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
-        .match        = 0x400,
-        .match_mask   = 0x400,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 10,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
-        .match        = 0x402,
-        .match_mask   = 0x402,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
-        .match        = 0x404,
-        .match_mask   = 0x404,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
-        .match        = 0x408,
-        .match_mask   = 0x408,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
-        .match        = 0x410,
-        .match_mask   = 0x410,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
-        .match        = 0x420,
-        .match_mask   = 0x420,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
-        .match        = 0x440,
-        .match_mask   = 0x440,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x480,
-        .match_mask   = 0x480,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
-        .match        = 0x500,
-        .match_mask   = 0x500,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7ffff,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 18,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x1c000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
-        .match        = 0x8000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x8004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0xc000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
-        .match        = 0x810,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x14000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_CNTAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 19,
-        .arc_id_mask  = 0xf80000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 19,
-        .arc_id_mask  = 0xf80000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 19,
-        .arc_id_mask  = 0xf80000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 19,
-        .arc_id_mask  = 0xf80000,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 19,
-        .arc_id_mask  = 0xf80000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 19,
-        .arc_id_mask  = 0xf80000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x7c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x10000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 55,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0xc004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 42,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 55,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 55,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 29,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x18000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 45,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 56,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x4004,
-        .match_mask   = 0x7c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 48,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 56,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x20000,
-        .match_mask   = 0x20000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 17,
-        .minbit       = 17,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 48,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 48,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7ffff,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 18,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x1c000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 51,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
-        .match        = 0x8000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 29,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x8004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 54,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0xc000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 29,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x14000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 24,
-        .arc_id_mask  = 0x7ff000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_CNTAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0xfc,
-        .num_zone_bmp_words = 2,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0xfc,
-        .num_zone_bmp_words = 2,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0xfc,
-        .num_zone_bmp_words = 2,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0xfc,
-        .num_zone_bmp_words = 2,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0xfc,
-        .num_zone_bmp_words = 2,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0xfc,
-        .num_zone_bmp_words = 2,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0xfc,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0xfc,
-        .num_zone_bmp_words = 2,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0xfc,
-        .num_zone_bmp_words = 2,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x7c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x10000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 14,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 35,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0xc004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 18,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 35,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 35,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x18000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 21,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
-        .match        = 0x30,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
-        .match        = 0x40000,
-        .match_mask   = 0x40000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 18,
-        .minbit       = 18,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 22,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x80,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 22,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 22,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x44000,
-        .match_mask   = 0x5c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 22,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x40020,
-        .match_mask   = 0x40020,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 22,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x4004,
-        .match_mask   = 0x7c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 26,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x20000,
-        .match_mask   = 0x20000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 17,
-        .minbit       = 17,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 26,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 26,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 10,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 10,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
-        .match        = 0x400,
-        .match_mask   = 0x400,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 10,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
-        .match        = 0x402,
-        .match_mask   = 0x402,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
-        .match        = 0x404,
-        .match_mask   = 0x404,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
-        .match        = 0x408,
-        .match_mask   = 0x408,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
-        .match        = 0x410,
-        .match_mask   = 0x410,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
-        .match        = 0x420,
-        .match_mask   = 0x420,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
-        .match        = 0x440,
-        .match_mask   = 0x440,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x480,
-        .match_mask   = 0x480,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
-        .match        = 0x500,
-        .match_mask   = 0x500,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7ffff,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 18,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x1c000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 30,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
-        .match        = 0x8000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x8004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 34,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0xc000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
-        .match        = 0x810,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x14000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 8,
-        .arc_id_mask  = 0x7ff00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56690_a0_dna_6_5_31_7_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
-
-    },
-    {
-        /* BCM56690_A0_DNA_6_5_31_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
-        .name         = "INGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-
-    },
-};
-
-static bcmpkt_rxpmd_match_id_db_info_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info = {
-    .num_entries = 222,
-    .db = bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db
-};
-bcmpkt_rxpmd_match_id_db_info_t * bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info_get(void) {
-    return &bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_db_info;
-}
-
-static shr_enum_map_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_rxpmd_match_id_map_info_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info = {
-    .num_entries = 222,
-    .map = bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map
-};
-
-bcmpkt_rxpmd_match_id_map_info_t * bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info_get(void) {
-    return &bcm56690_a0_dna_6_5_31_7_0_rxpmd_match_id_map_info;
-}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_pkt_flexhdr.c
deleted file mode 100644
index e39a952cf40..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_pkt_flexhdr.c
+++ /dev/null
@@ -1,9339 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml
- * for device bcm56690_a0 and variant dna_6_5_31_7_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#include <sal/sal_types.h>
-#include <shr/shr_error.h>
-#include <bcmpkt/bcmpkt_flexhdr.h>
-#include <bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_31_7_0/bcm56690_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h>
-
-#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
-#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
-#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
-#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
-
-static void bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
-{
-    uint32_t *reason = data + 0;
-
-    if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
-    }
-    if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
-    }
-    if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
-    }
-    if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS);
-    }
-    if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
-    }
-    if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
-    }
-    if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
-    }
-    if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
-    }
-    if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
-    }
-    if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
-    }
-    if (reason[13] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
-    }
-    if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
-    }
-    if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
-    }
-    if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
-    }
-    if (reason[13] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
-    }
-    if (reason[13] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
-    }
-    if (reason[13] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
-    }
-    if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
-    }
-    if (reason[13] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
-    }
-    if (reason[13] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
-    }
-    if (reason[13] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
-    }
-    if (reason[13] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
-    }
-    if (reason[13] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[13] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[13] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
-    }
-    if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
-    }
-    if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
-    }
-    if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
-    }
-    if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
-    }
-    if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
-    }
-    if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
-    }
-    if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
-    }
-    if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT);
-    }
-    if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SRV6);
-    }
-    if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
-    }
-    if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
-    }
-    if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
-    }
-}
-
-static void bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
-{
-    uint32_t *reason = data + 0;
-
-    reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
-        reason[13] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
-        reason[13] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
-        reason[13] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) {
-        reason[13] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
-        reason[13] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
-        reason[13] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
-        reason[13] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
-        reason[13] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
-        reason[13] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
-        reason[13] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 15);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
-        reason[13] |= (0x1 << 16);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
-        reason[13] |= (0x1 << 17);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
-        reason[13] |= (0x1 << 18);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
-        reason[13] |= (0x1 << 19);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
-        reason[13] |= (0x1 << 20);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
-        reason[13] |= (0x1 << 21);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
-        reason[13] |= (0x1 << 22);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
-        reason[13] |= (0x1 << 23);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
-        reason[13] |= (0x1 << 24);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
-        reason[13] |= (0x1 << 25);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
-        reason[13] |= (0x1 << 26);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 27);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
-        reason[13] |= (0x1 << 28);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[13] |= (0x1 << 29);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[13] |= (0x1 << 30);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
-        reason[13] |= (0x1 << 31);
-    }
-    reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
-        reason[12] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
-        reason[12] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
-        reason[12] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
-        reason[12] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
-        reason[12] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
-        reason[12] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
-        reason[12] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
-        reason[12] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) {
-        reason[12] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
-        reason[12] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
-        reason[12] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) {
-        reason[12] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
-        reason[12] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
-        reason[12] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
-        reason[12] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
-        reason[12] |= (0x1 << 15);
-    }
-}
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_field_data[] = {
-    {
-        .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { 320, 335 }, /* Profile 10. */
-            { 320, 335 }, /* Profile 11. */
-            { 320, 335 }, /* Profile 12. */
-            { 320, 335 }, /* Profile 13. */
-            { 320, 335 }, /* Profile 14. */
-            { 320, 335 }, /* Profile 15. */
-            { 320, 335 }, /* Profile 16. */
-            { 320, 335 }, /* Profile 17. */
-            { -1, -1 }, /* Profile 18. */
-            { -1, -1 }, /* Profile 19. */
-            { -1, -1 }, /* Profile 20. */
-            { -1, -1 }, /* Profile 21. */
-            { -1, -1 }, /* Profile 22. */
-            { -1, -1 }, /* Profile 23. */
-            { -1, -1 }, /* Profile 24. */
-            { -1, -1 }, /* Profile 25. */
-            { 320, 335 }, /* Profile 26. */
-            { 320, 335 }, /* Profile 27. */
-            { 320, 335 }, /* Profile 28. */
-            { 320, 335 }, /* Profile 29. */
-            { 320, 335 }, /* Profile 30. */
-            { 320, 335 }, /* Profile 31. */
-            { 320, 335 }, /* Profile 32. */
-            { 320, 335 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "DNAT_CTRL_3_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 368, 371 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { 368, 371 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { 368, 371 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { 368, 371 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { -1, -1 }, /* Profile 12. */
-            { 368, 371 }, /* Profile 13. */
-            { -1, -1 }, /* Profile 14. */
-            { -1, -1 }, /* Profile 15. */
-            { 368, 371 }, /* Profile 16. */
-            { -1, -1 }, /* Profile 17. */
-            { 368, 371 }, /* Profile 18. */
-            { -1, -1 }, /* Profile 19. */
-            { -1, -1 }, /* Profile 20. */
-            { 368, 371 }, /* Profile 21. */
-            { -1, -1 }, /* Profile 22. */
-            { -1, -1 }, /* Profile 23. */
-            { 368, 371 }, /* Profile 24. */
-            { -1, -1 }, /* Profile 25. */
-            { 368, 371 }, /* Profile 26. */
-            { -1, -1 }, /* Profile 27. */
-            { -1, -1 }, /* Profile 28. */
-            { 368, 371 }, /* Profile 29. */
-            { -1, -1 }, /* Profile 30. */
-            { -1, -1 }, /* Profile 31. */
-            { 368, 371 }, /* Profile 32. */
-        },
-        .profile_cnt = 33,
-    },
-    {
-        .name = "DROP_CODE_15_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 48, 63 }, /* Profile 2. */
-            { 48, 63 }, /* Profile 3. */
-            { 48, 63 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { 48, 63 }, /* Profile 8. */
-            { 48, 63 }, /* Profile 9. */
-            { 48, 63 }, /* Profile 10. */
-            { 48, 63 }, /* Profile 11. */
-            { 48, 63 }, /* Profile 12. */
-            { -1, -1 }, /* Profile 13. */
-            { -1, -1 }, /* Profile 14. */
-            { -1, -1 }, /* Profile 15. */
-            { 48, 63 }, /* Profile 16. */
-            { 48, 63 }, /* Profile 17. */
-            { 48, 63 }, /* Profile 18. */
-            { 48, 63 }, /* Profile 19. */
-            { 48, 63 }, /* Profile 20. */
-            { -1, -1 }, /* Profile 21. */
-            { -1, -1 }, /* Profile 22. */
-            { -1, -1 }, /* Profile 23. */
-            { 48, 63 }, /* Profile 24. */
-            { 48, 63 }, /* Profile 25. */
-            { 48, 63 }, /* Profile 26. */
-            { 48, 63 }, /* Profile 27. */
-            { 48, 63 }, /* Profile 28. */
-            { -1, -1 }, /* Profile 29. */
-            { -1, -1 }, /* Profile 30. */
-            { -1, -1 }, /* Profile 31. */
-            { 48, 63 }, /* Profile 32. */
-            { 48, 63 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "DVP_15_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 176, 191 }, /* Profile 2. */
-            { 208, 223 }, /* Profile 3. */
-            { 208, 223 }, /* Profile 4. */
-            { 176, 191 }, /* Profile 5. */
-            { 208, 223 }, /* Profile 6. */
-            { 208, 223 }, /* Profile 7. */
-            { 176, 191 }, /* Profile 8. */
-            { 208, 223 }, /* Profile 9. */
-            { 176, 191 }, /* Profile 10. */
-            { 208, 223 }, /* Profile 11. */
-            { 208, 223 }, /* Profile 12. */
-            { 176, 191 }, /* Profile 13. */
-            { 208, 223 }, /* Profile 14. */
-            { 208, 223 }, /* Profile 15. */
-            { 176, 191 }, /* Profile 16. */
-            { 208, 223 }, /* Profile 17. */
-            { 192, 207 }, /* Profile 18. */
-            { 224, 239 }, /* Profile 19. */
-            { 224, 239 }, /* Profile 20. */
-            { 192, 207 }, /* Profile 21. */
-            { 224, 239 }, /* Profile 22. */
-            { 224, 239 }, /* Profile 23. */
-            { 192, 207 }, /* Profile 24. */
-            { 224, 239 }, /* Profile 25. */
-            { 192, 207 }, /* Profile 26. */
-            { 224, 239 }, /* Profile 27. */
-            { 224, 239 }, /* Profile 28. */
-            { 192, 207 }, /* Profile 29. */
-            { 224, 239 }, /* Profile 30. */
-            { 224, 239 }, /* Profile 31. */
-            { 192, 207 }, /* Profile 32. */
-            { 224, 239 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 144, 159 }, /* Profile 2. */
-            { 176, 191 }, /* Profile 3. */
-            { 176, 191 }, /* Profile 4. */
-            { 144, 159 }, /* Profile 5. */
-            { 176, 191 }, /* Profile 6. */
-            { 176, 191 }, /* Profile 7. */
-            { 144, 159 }, /* Profile 8. */
-            { 176, 191 }, /* Profile 9. */
-            { 144, 159 }, /* Profile 10. */
-            { 176, 191 }, /* Profile 11. */
-            { 176, 191 }, /* Profile 12. */
-            { 144, 159 }, /* Profile 13. */
-            { 176, 191 }, /* Profile 14. */
-            { 176, 191 }, /* Profile 15. */
-            { 144, 159 }, /* Profile 16. */
-            { 176, 191 }, /* Profile 17. */
-            { 160, 175 }, /* Profile 18. */
-            { 192, 207 }, /* Profile 19. */
-            { 192, 207 }, /* Profile 20. */
-            { 160, 175 }, /* Profile 21. */
-            { 192, 207 }, /* Profile 22. */
-            { 192, 207 }, /* Profile 23. */
-            { 160, 175 }, /* Profile 24. */
-            { 192, 207 }, /* Profile 25. */
-            { 160, 175 }, /* Profile 26. */
-            { 192, 207 }, /* Profile 27. */
-            { 192, 207 }, /* Profile 28. */
-            { 160, 175 }, /* Profile 29. */
-            { 192, 207 }, /* Profile 30. */
-            { 192, 207 }, /* Profile 31. */
-            { 160, 175 }, /* Profile 32. */
-            { 192, 207 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 320, 335 }, /* Profile 2. */
-            { 320, 335 }, /* Profile 3. */
-            { 320, 335 }, /* Profile 4. */
-            { 320, 335 }, /* Profile 5. */
-            { 320, 335 }, /* Profile 6. */
-            { 320, 335 }, /* Profile 7. */
-            { 320, 335 }, /* Profile 8. */
-            { 320, 335 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { -1, -1 }, /* Profile 12. */
-            { -1, -1 }, /* Profile 13. */
-            { -1, -1 }, /* Profile 14. */
-            { -1, -1 }, /* Profile 15. */
-            { -1, -1 }, /* Profile 16. */
-            { -1, -1 }, /* Profile 17. */
-            { 320, 335 }, /* Profile 18. */
-            { 320, 335 }, /* Profile 19. */
-            { 320, 335 }, /* Profile 20. */
-            { 320, 335 }, /* Profile 21. */
-            { 320, 335 }, /* Profile 22. */
-            { 320, 335 }, /* Profile 23. */
-            { 320, 335 }, /* Profile 24. */
-            { 320, 335 }, /* Profile 25. */
-        },
-        .profile_cnt = 26,
-    },
-    {
-        .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 380, 383 }, /* Profile 3. */
-            { 380, 383 }, /* Profile 4. */
-            { 384, 387 }, /* Profile 5. */
-            { 380, 383 }, /* Profile 6. */
-            { 380, 383 }, /* Profile 7. */
-            { 384, 387 }, /* Profile 8. */
-            { 380, 383 }, /* Profile 9. */
-            { 384, 387 }, /* Profile 10. */
-            { 380, 383 }, /* Profile 11. */
-            { 380, 383 }, /* Profile 12. */
-            { 384, 387 }, /* Profile 13. */
-            { 380, 383 }, /* Profile 14. */
-            { 380, 383 }, /* Profile 15. */
-            { 384, 387 }, /* Profile 16. */
-            { 380, 383 }, /* Profile 17. */
-            { 384, 387 }, /* Profile 18. */
-            { 380, 383 }, /* Profile 19. */
-            { 380, 383 }, /* Profile 20. */
-            { 384, 387 }, /* Profile 21. */
-            { 380, 383 }, /* Profile 22. */
-            { 380, 383 }, /* Profile 23. */
-            { 384, 387 }, /* Profile 24. */
-            { 380, 383 }, /* Profile 25. */
-            { 384, 387 }, /* Profile 26. */
-            { 380, 383 }, /* Profile 27. */
-            { 380, 383 }, /* Profile 28. */
-            { 384, 387 }, /* Profile 29. */
-            { 380, 383 }, /* Profile 30. */
-            { 380, 383 }, /* Profile 31. */
-            { 384, 387 }, /* Profile 32. */
-            { 380, 383 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 96, 111 }, /* Profile 2. */
-            { 96, 111 }, /* Profile 3. */
-            { 96, 111 }, /* Profile 4. */
-            { 96, 111 }, /* Profile 5. */
-            { 96, 111 }, /* Profile 6. */
-            { 96, 111 }, /* Profile 7. */
-            { 96, 111 }, /* Profile 8. */
-            { 96, 111 }, /* Profile 9. */
-            { 96, 111 }, /* Profile 10. */
-            { 96, 111 }, /* Profile 11. */
-            { 96, 111 }, /* Profile 12. */
-            { 96, 111 }, /* Profile 13. */
-            { 96, 111 }, /* Profile 14. */
-            { 96, 111 }, /* Profile 15. */
-            { 96, 111 }, /* Profile 16. */
-            { 96, 111 }, /* Profile 17. */
-            { 96, 111 }, /* Profile 18. */
-            { 96, 111 }, /* Profile 19. */
-            { 96, 111 }, /* Profile 20. */
-            { 96, 111 }, /* Profile 21. */
-            { 96, 111 }, /* Profile 22. */
-            { 96, 111 }, /* Profile 23. */
-            { 96, 111 }, /* Profile 24. */
-            { 96, 111 }, /* Profile 25. */
-            { 96, 111 }, /* Profile 26. */
-            { 96, 111 }, /* Profile 27. */
-            { 96, 111 }, /* Profile 28. */
-            { 96, 111 }, /* Profile 29. */
-            { 96, 111 }, /* Profile 30. */
-            { 96, 111 }, /* Profile 31. */
-            { 96, 111 }, /* Profile 32. */
-            { 96, 111 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
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-            { 352, 367 }, /* Profile 31. */
-            { 352, 367 }, /* Profile 32. */
-            { 352, 367 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 380, 383 }, /* Profile 2. */
-            { 376, 379 }, /* Profile 3. */
-            { 376, 379 }, /* Profile 4. */
-            { 380, 383 }, /* Profile 5. */
-            { 376, 379 }, /* Profile 6. */
-            { 376, 379 }, /* Profile 7. */
-            { 380, 383 }, /* Profile 8. */
-            { 376, 379 }, /* Profile 9. */
-            { 380, 383 }, /* Profile 10. */
-            { 376, 379 }, /* Profile 11. */
-            { 376, 379 }, /* Profile 12. */
-            { 380, 383 }, /* Profile 13. */
-            { 376, 379 }, /* Profile 14. */
-            { 376, 379 }, /* Profile 15. */
-            { 380, 383 }, /* Profile 16. */
-            { 376, 379 }, /* Profile 17. */
-            { 380, 383 }, /* Profile 18. */
-            { 376, 379 }, /* Profile 19. */
-            { 376, 379 }, /* Profile 20. */
-            { 380, 383 }, /* Profile 21. */
-            { 376, 379 }, /* Profile 22. */
-            { 376, 379 }, /* Profile 23. */
-            { 380, 383 }, /* Profile 24. */
-            { 376, 379 }, /* Profile 25. */
-            { 380, 383 }, /* Profile 26. */
-            { 376, 379 }, /* Profile 27. */
-            { 376, 379 }, /* Profile 28. */
-            { 380, 383 }, /* Profile 29. */
-            { 376, 379 }, /* Profile 30. */
-            { 376, 379 }, /* Profile 31. */
-            { 380, 383 }, /* Profile 32. */
-            { 376, 379 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 420, 423 }, /* Profile 2. */
-            { 420, 423 }, /* Profile 3. */
-            { 420, 423 }, /* Profile 4. */
-            { 420, 423 }, /* Profile 5. */
-            { 420, 423 }, /* Profile 6. */
-            { 420, 423 }, /* Profile 7. */
-            { 416, 419 }, /* Profile 8. */
-            { 416, 419 }, /* Profile 9. */
-            { 420, 423 }, /* Profile 10. */
-            { 420, 423 }, /* Profile 11. */
-            { 420, 423 }, /* Profile 12. */
-            { 420, 423 }, /* Profile 13. */
-            { 420, 423 }, /* Profile 14. */
-            { 420, 423 }, /* Profile 15. */
-            { 416, 419 }, /* Profile 16. */
-            { 416, 419 }, /* Profile 17. */
-            { 420, 423 }, /* Profile 18. */
-            { 420, 423 }, /* Profile 19. */
-            { 420, 423 }, /* Profile 20. */
-            { 420, 423 }, /* Profile 21. */
-            { 420, 423 }, /* Profile 22. */
-            { 420, 423 }, /* Profile 23. */
-            { 416, 419 }, /* Profile 24. */
-            { 416, 419 }, /* Profile 25. */
-            { 420, 423 }, /* Profile 26. */
-            { 420, 423 }, /* Profile 27. */
-            { 420, 423 }, /* Profile 28. */
-            { 420, 423 }, /* Profile 29. */
-            { 420, 423 }, /* Profile 30. */
-            { 420, 423 }, /* Profile 31. */
-            { 416, 419 }, /* Profile 32. */
-            { 416, 419 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 128, 143 }, /* Profile 2. */
-            { 160, 175 }, /* Profile 3. */
-            { 160, 175 }, /* Profile 4. */
-            { 128, 143 }, /* Profile 5. */
-            { 160, 175 }, /* Profile 6. */
-            { 160, 175 }, /* Profile 7. */
-            { 128, 143 }, /* Profile 8. */
-            { 160, 175 }, /* Profile 9. */
-            { 128, 143 }, /* Profile 10. */
-            { 160, 175 }, /* Profile 11. */
-            { 160, 175 }, /* Profile 12. */
-            { 128, 143 }, /* Profile 13. */
-            { 160, 175 }, /* Profile 14. */
-            { 160, 175 }, /* Profile 15. */
-            { 128, 143 }, /* Profile 16. */
-            { 160, 175 }, /* Profile 17. */
-            { 144, 159 }, /* Profile 18. */
-            { 176, 191 }, /* Profile 19. */
-            { 176, 191 }, /* Profile 20. */
-            { 144, 159 }, /* Profile 21. */
-            { 176, 191 }, /* Profile 22. */
-            { 176, 191 }, /* Profile 23. */
-            { 144, 159 }, /* Profile 24. */
-            { 176, 191 }, /* Profile 25. */
-            { 144, 159 }, /* Profile 26. */
-            { 176, 191 }, /* Profile 27. */
-            { 176, 191 }, /* Profile 28. */
-            { 144, 159 }, /* Profile 29. */
-            { 176, 191 }, /* Profile 30. */
-            { 176, 191 }, /* Profile 31. */
-            { 144, 159 }, /* Profile 32. */
-            { 176, 191 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 404, 407 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-            { 404, 407 }, /* Profile 5. */
-            { 400, 403 }, /* Profile 6. */
-            { 400, 403 }, /* Profile 7. */
-            { 400, 403 }, /* Profile 8. */
-            { 396, 399 }, /* Profile 9. */
-            { 404, 407 }, /* Profile 10. */
-            { 400, 403 }, /* Profile 11. */
-            { 400, 403 }, /* Profile 12. */
-            { 404, 407 }, /* Profile 13. */
-            { 400, 403 }, /* Profile 14. */
-            { 400, 403 }, /* Profile 15. */
-            { 400, 403 }, /* Profile 16. */
-            { 396, 399 }, /* Profile 17. */
-            { 404, 407 }, /* Profile 18. */
-            { 400, 403 }, /* Profile 19. */
-            { 400, 403 }, /* Profile 20. */
-            { 404, 407 }, /* Profile 21. */
-            { 400, 403 }, /* Profile 22. */
-            { 400, 403 }, /* Profile 23. */
-            { 400, 403 }, /* Profile 24. */
-            { 396, 399 }, /* Profile 25. */
-            { 404, 407 }, /* Profile 26. */
-            { 400, 403 }, /* Profile 27. */
-            { 400, 403 }, /* Profile 28. */
-            { 404, 407 }, /* Profile 29. */
-            { 400, 403 }, /* Profile 30. */
-            { 400, 403 }, /* Profile 31. */
-            { 400, 403 }, /* Profile 32. */
-            { 396, 399 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 80, 95 }, /* Profile 2. */
-            { 80, 95 }, /* Profile 3. */
-            { 80, 95 }, /* Profile 4. */
-            { 80, 95 }, /* Profile 5. */
-            { 80, 95 }, /* Profile 6. */
-            { 80, 95 }, /* Profile 7. */
-            { 80, 95 }, /* Profile 8. */
-            { 80, 95 }, /* Profile 9. */
-            { 80, 95 }, /* Profile 10. */
-            { 80, 95 }, /* Profile 11. */
-            { 80, 95 }, /* Profile 12. */
-            { 80, 95 }, /* Profile 13. */
-            { 80, 95 }, /* Profile 14. */
-            { 80, 95 }, /* Profile 15. */
-            { 80, 95 }, /* Profile 16. */
-            { 80, 95 }, /* Profile 17. */
-            { 80, 95 }, /* Profile 18. */
-            { 80, 95 }, /* Profile 19. */
-            { 80, 95 }, /* Profile 20. */
-            { 80, 95 }, /* Profile 21. */
-            { 80, 95 }, /* Profile 22. */
-            { 80, 95 }, /* Profile 23. */
-            { 80, 95 }, /* Profile 24. */
-            { 80, 95 }, /* Profile 25. */
-            { 80, 95 }, /* Profile 26. */
-            { 80, 95 }, /* Profile 27. */
-            { 80, 95 }, /* Profile 28. */
-            { 80, 95 }, /* Profile 29. */
-            { 80, 95 }, /* Profile 30. */
-            { 80, 95 }, /* Profile 31. */
-            { 80, 95 }, /* Profile 32. */
-            { 80, 95 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "TIMESTAMP_CTRL_3_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { 412, 415 }, /* Profile 6. */
-            { 412, 415 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { 408, 411 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { 412, 415 }, /* Profile 11. */
-            { 412, 415 }, /* Profile 12. */
-            { -1, -1 }, /* Profile 13. */
-            { 412, 415 }, /* Profile 14. */
-            { 412, 415 }, /* Profile 15. */
-            { -1, -1 }, /* Profile 16. */
-            { 408, 411 }, /* Profile 17. */
-            { -1, -1 }, /* Profile 18. */
-            { 412, 415 }, /* Profile 19. */
-            { 412, 415 }, /* Profile 20. */
-            { -1, -1 }, /* Profile 21. */
-            { 412, 415 }, /* Profile 22. */
-            { 412, 415 }, /* Profile 23. */
-            { -1, -1 }, /* Profile 24. */
-            { 408, 411 }, /* Profile 25. */
-            { -1, -1 }, /* Profile 26. */
-            { 412, 415 }, /* Profile 27. */
-            { 412, 415 }, /* Profile 28. */
-            { -1, -1 }, /* Profile 29. */
-            { 412, 415 }, /* Profile 30. */
-            { 412, 415 }, /* Profile 31. */
-            { -1, -1 }, /* Profile 32. */
-            { 408, 411 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 416, 419 }, /* Profile 2. */
-            { 416, 419 }, /* Profile 3. */
-            { 416, 419 }, /* Profile 4. */
-            { 416, 419 }, /* Profile 5. */
-            { 416, 419 }, /* Profile 6. */
-            { 416, 419 }, /* Profile 7. */
-            { 412, 415 }, /* Profile 8. */
-            { 412, 415 }, /* Profile 9. */
-            { 416, 419 }, /* Profile 10. */
-            { 416, 419 }, /* Profile 11. */
-            { 416, 419 }, /* Profile 12. */
-            { 416, 419 }, /* Profile 13. */
-            { 416, 419 }, /* Profile 14. */
-            { 416, 419 }, /* Profile 15. */
-            { 412, 415 }, /* Profile 16. */
-            { 412, 415 }, /* Profile 17. */
-            { 416, 419 }, /* Profile 18. */
-            { 416, 419 }, /* Profile 19. */
-            { 416, 419 }, /* Profile 20. */
-            { 416, 419 }, /* Profile 21. */
-            { 416, 419 }, /* Profile 22. */
-            { 416, 419 }, /* Profile 23. */
-            { 412, 415 }, /* Profile 24. */
-            { 412, 415 }, /* Profile 25. */
-            { 416, 419 }, /* Profile 26. */
-            { 416, 419 }, /* Profile 27. */
-            { 416, 419 }, /* Profile 28. */
-            { 416, 419 }, /* Profile 29. */
-            { 416, 419 }, /* Profile 30. */
-            { 416, 419 }, /* Profile 31. */
-            { 412, 415 }, /* Profile 32. */
-            { 412, 415 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "VFI_15_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 112, 127 }, /* Profile 2. */
-            { 112, 127 }, /* Profile 3. */
-            { 112, 127 }, /* Profile 4. */
-            { 112, 127 }, /* Profile 5. */
-            { 112, 127 }, /* Profile 6. */
-            { 112, 127 }, /* Profile 7. */
-            { 112, 127 }, /* Profile 8. */
-            { 112, 127 }, /* Profile 9. */
-            { 112, 127 }, /* Profile 10. */
-            { 112, 127 }, /* Profile 11. */
-            { 112, 127 }, /* Profile 12. */
-            { 112, 127 }, /* Profile 13. */
-            { 112, 127 }, /* Profile 14. */
-            { 112, 127 }, /* Profile 15. */
-            { 112, 127 }, /* Profile 16. */
-            { 112, 127 }, /* Profile 17. */
-            { 112, 127 }, /* Profile 18. */
-            { 112, 127 }, /* Profile 19. */
-            { 112, 127 }, /* Profile 20. */
-            { 112, 127 }, /* Profile 21. */
-            { 112, 127 }, /* Profile 22. */
-            { 112, 127 }, /* Profile 23. */
-            { 112, 127 }, /* Profile 24. */
-            { 112, 127 }, /* Profile 25. */
-            { 112, 127 }, /* Profile 26. */
-            { 112, 127 }, /* Profile 27. */
-            { 112, 127 }, /* Profile 28. */
-            { 112, 127 }, /* Profile 29. */
-            { 112, 127 }, /* Profile 30. */
-            { 112, 127 }, /* Profile 31. */
-            { 112, 127 }, /* Profile 32. */
-            { 112, 127 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-    {
-        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
-        .fid = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 372, 375 }, /* Profile 2. */
-            { 368, 371 }, /* Profile 3. */
-            { 368, 371 }, /* Profile 4. */
-            { 372, 375 }, /* Profile 5. */
-            { 368, 371 }, /* Profile 6. */
-            { 368, 371 }, /* Profile 7. */
-            { 372, 375 }, /* Profile 8. */
-            { 368, 371 }, /* Profile 9. */
-            { 372, 375 }, /* Profile 10. */
-            { 368, 371 }, /* Profile 11. */
-            { 368, 371 }, /* Profile 12. */
-            { 372, 375 }, /* Profile 13. */
-            { 368, 371 }, /* Profile 14. */
-            { 368, 371 }, /* Profile 15. */
-            { 372, 375 }, /* Profile 16. */
-            { 368, 371 }, /* Profile 17. */
-            { 372, 375 }, /* Profile 18. */
-            { 368, 371 }, /* Profile 19. */
-            { 368, 371 }, /* Profile 20. */
-            { 372, 375 }, /* Profile 21. */
-            { 368, 371 }, /* Profile 22. */
-            { 368, 371 }, /* Profile 23. */
-            { 372, 375 }, /* Profile 24. */
-            { 368, 371 }, /* Profile 25. */
-            { 372, 375 }, /* Profile 26. */
-            { 368, 371 }, /* Profile 27. */
-            { 368, 371 }, /* Profile 28. */
-            { 372, 375 }, /* Profile 29. */
-            { 368, 371 }, /* Profile 30. */
-            { 368, 371 }, /* Profile 31. */
-            { 372, 375 }, /* Profile 32. */
-            { 368, 371 }, /* Profile 33. */
-        },
-        .profile_cnt = 34,
-    },
-};
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_field_data,
-    .profile_bmp_cnt = 2,
-    .profile_bmp[0] = 0xfffffffc,
-    .profile_bmp[1] = 0x3,
-
-};
-
-static shr_enum_map_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_names[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_reasons_info_t bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_names,
-    .reason_encode = bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reason_decode,
-};
-
-
-static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_arp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_get,
-    bcmpkt_arp_t_hardware_type_get,
-    bcmpkt_arp_t_operation_get,
-    bcmpkt_arp_t_prot_addr_len_get,
-    bcmpkt_arp_t_protocol_type_get,
-    bcmpkt_arp_t_sender_ha_get,
-    bcmpkt_arp_t_sender_ip_get,
-    bcmpkt_arp_t_target_ha_get,
-    bcmpkt_arp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_arp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_set,
-    bcmpkt_arp_t_hardware_type_set,
-    bcmpkt_arp_t_operation_set,
-    bcmpkt_arp_t_prot_addr_len_set,
-    bcmpkt_arp_t_protocol_type_set,
-    bcmpkt_arp_t_sender_ha_set,
-    bcmpkt_arp_t_sender_ip_set,
-    bcmpkt_arp_t_target_ha_set,
-    bcmpkt_arp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_arp_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_arp_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_arp_t_field_data,
-};
-
-
-static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_authen_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_get,
-    bcmpkt_authen_t_next_header_get,
-    bcmpkt_authen_t_payload_len_get,
-    bcmpkt_authen_t_reserved_get,
-    bcmpkt_authen_t_seq_num_get,
-    bcmpkt_authen_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_authen_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_set,
-    bcmpkt_authen_t_next_header_set,
-    bcmpkt_authen_t_payload_len_set,
-    bcmpkt_authen_t_reserved_set,
-    bcmpkt_authen_t_seq_num_set,
-    bcmpkt_authen_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_authen_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_authen_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_authen_t_field_data,
-};
-
-
-static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 18, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 18, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 17, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 17, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 5);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 5, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 21, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 21, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_bfd_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_get,
-    bcmpkt_bfd_t_bfd_length_get,
-    bcmpkt_bfd_t_cpi_get,
-    bcmpkt_bfd_t_dem_get,
-    bcmpkt_bfd_t_desmintxintv_get,
-    bcmpkt_bfd_t_detectmult_get,
-    bcmpkt_bfd_t_diag_get,
-    bcmpkt_bfd_t_fin_get,
-    bcmpkt_bfd_t_minechorxintv_get,
-    bcmpkt_bfd_t_mpt_get,
-    bcmpkt_bfd_t_mydiscrim_get,
-    bcmpkt_bfd_t_poll_get,
-    bcmpkt_bfd_t_reqminrxintv_get,
-    bcmpkt_bfd_t_sta_get,
-    bcmpkt_bfd_t_urdiscrim_get,
-    bcmpkt_bfd_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_bfd_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_set,
-    bcmpkt_bfd_t_bfd_length_set,
-    bcmpkt_bfd_t_cpi_set,
-    bcmpkt_bfd_t_dem_set,
-    bcmpkt_bfd_t_desmintxintv_set,
-    bcmpkt_bfd_t_detectmult_set,
-    bcmpkt_bfd_t_diag_set,
-    bcmpkt_bfd_t_fin_set,
-    bcmpkt_bfd_t_minechorxintv_set,
-    bcmpkt_bfd_t_mpt_set,
-    bcmpkt_bfd_t_mydiscrim_set,
-    bcmpkt_bfd_t_poll_set,
-    bcmpkt_bfd_t_reqminrxintv_set,
-    bcmpkt_bfd_t_sta_set,
-    bcmpkt_bfd_t_urdiscrim_set,
-    bcmpkt_bfd_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_bfd_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_bfd_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_bfd_t_field_data,
-};
-
-
-static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_cntag_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_get,
-    bcmpkt_cntag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_cntag_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_set,
-    bcmpkt_cntag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_cntag_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_cntag_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CNTAG_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_cntag_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_get,
-    bcmpkt_cpu_composites_0_t_dma_cont1_get,
-    bcmpkt_cpu_composites_0_t_dma_cont2_get,
-    bcmpkt_cpu_composites_0_t_dma_cont3_get,
-    bcmpkt_cpu_composites_0_t_dma_cont4_get,
-    bcmpkt_cpu_composites_0_t_dma_cont5_get,
-    bcmpkt_cpu_composites_0_t_dma_cont6_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_set,
-    bcmpkt_cpu_composites_0_t_dma_cont1_set,
-    bcmpkt_cpu_composites_0_t_dma_cont2_set,
-    bcmpkt_cpu_composites_0_t_dma_cont3_set,
-    bcmpkt_cpu_composites_0_t_dma_cont4_set,
-    bcmpkt_cpu_composites_0_t_dma_cont5_set,
-    bcmpkt_cpu_composites_0_t_dma_cont6_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_get,
-    bcmpkt_cpu_composites_1_t_dma_cont11_get,
-    bcmpkt_cpu_composites_1_t_dma_cont12_get,
-    bcmpkt_cpu_composites_1_t_dma_cont13_get,
-    bcmpkt_cpu_composites_1_t_dma_cont14_get,
-    bcmpkt_cpu_composites_1_t_dma_cont15_get,
-    bcmpkt_cpu_composites_1_t_dma_cont16_get,
-    bcmpkt_cpu_composites_1_t_dma_cont17_get,
-    bcmpkt_cpu_composites_1_t_dma_cont7_get,
-    bcmpkt_cpu_composites_1_t_dma_cont8_get,
-    bcmpkt_cpu_composites_1_t_dma_cont9_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_set,
-    bcmpkt_cpu_composites_1_t_dma_cont11_set,
-    bcmpkt_cpu_composites_1_t_dma_cont12_set,
-    bcmpkt_cpu_composites_1_t_dma_cont13_set,
-    bcmpkt_cpu_composites_1_t_dma_cont14_set,
-    bcmpkt_cpu_composites_1_t_dma_cont15_set,
-    bcmpkt_cpu_composites_1_t_dma_cont16_set,
-    bcmpkt_cpu_composites_1_t_dma_cont17_set,
-    bcmpkt_cpu_composites_1_t_dma_cont7_set,
-    bcmpkt_cpu_composites_1_t_dma_cont8_set,
-    bcmpkt_cpu_composites_1_t_dma_cont9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_dest_option_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_get,
-    bcmpkt_dest_option_t_next_header_get,
-    bcmpkt_dest_option_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_dest_option_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_set,
-    bcmpkt_dest_option_t_next_header_set,
-    bcmpkt_dest_option_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_dest_option_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_dest_option_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_dest_option_t_field_data,
-};
-
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_get,
-    bcmpkt_ep_nih_header_t_header_type_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
-    bcmpkt_ep_nih_header_t_opaque_object_a_get,
-    bcmpkt_ep_nih_header_t_opaque_object_b_get,
-    bcmpkt_ep_nih_header_t_opaque_object_c_get,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
-    bcmpkt_ep_nih_header_t_reserved_0_get,
-    bcmpkt_ep_nih_header_t_start_get,
-    bcmpkt_ep_nih_header_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_set,
-    bcmpkt_ep_nih_header_t_header_type_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
-    bcmpkt_ep_nih_header_t_opaque_object_a_set,
-    bcmpkt_ep_nih_header_t_opaque_object_b_set,
-    bcmpkt_ep_nih_header_t_opaque_object_c_set,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
-    bcmpkt_ep_nih_header_t_reserved_0_set,
-    bcmpkt_ep_nih_header_t_start_set,
-    bcmpkt_ep_nih_header_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 11, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 11, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 10, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 10, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_get,
-    bcmpkt_erspan3_fixed_hdr_t_cos_get,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
-    bcmpkt_erspan3_fixed_hdr_t_t_get,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
-    bcmpkt_erspan3_fixed_hdr_t_ver_get,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_set,
-    bcmpkt_erspan3_fixed_hdr_t_cos_set,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
-    bcmpkt_erspan3_fixed_hdr_t_t_set,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
-    bcmpkt_erspan3_fixed_hdr_t_ver_set,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
-    bcmpkt_erspan3_subhdr_5_t_port_id_get,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
-    bcmpkt_erspan3_subhdr_5_t_port_id_set,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_data,
-};
-
-
-static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_esp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_get,
-    bcmpkt_esp_t_pad_get,
-    bcmpkt_esp_t_pad_len_get,
-    bcmpkt_esp_t_seq_num_get,
-    bcmpkt_esp_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_esp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_set,
-    bcmpkt_esp_t_pad_set,
-    bcmpkt_esp_t_pad_len_set,
-    bcmpkt_esp_t_seq_num_set,
-    bcmpkt_esp_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_esp_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_esp_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_esp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ethertype_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ethertype_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ethertype_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ethertype_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_ethertype_t_field_data,
-};
-
-
-static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_frag_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_get,
-    bcmpkt_frag_t_id_get,
-    bcmpkt_frag_t_next_header_get,
-    bcmpkt_frag_t_reserved_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_frag_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_set,
-    bcmpkt_frag_t_id_set,
-    bcmpkt_frag_t_next_header_set,
-    bcmpkt_frag_t_reserved_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_frag_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_frag_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_frag_t_field_data,
-};
-
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
-    bcmpkt_gbp_ethernet_shim_t_ethertype_get,
-    bcmpkt_gbp_ethernet_shim_t_flags_get,
-    bcmpkt_gbp_ethernet_shim_t_reserved_get,
-    bcmpkt_gbp_ethernet_shim_t_sid_get,
-    bcmpkt_gbp_ethernet_shim_t_subtype_get,
-    bcmpkt_gbp_ethernet_shim_t_ver_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
-    bcmpkt_gbp_ethernet_shim_t_ethertype_set,
-    bcmpkt_gbp_ethernet_shim_t_flags_set,
-    bcmpkt_gbp_ethernet_shim_t_reserved_set,
-    bcmpkt_gbp_ethernet_shim_t_sid_set,
-    bcmpkt_gbp_ethernet_shim_t_subtype_set,
-    bcmpkt_gbp_ethernet_shim_t_ver_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_field_data,
-};
-
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 4, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 4, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_get,
-    bcmpkt_generic_loopback_t_destination_type_get,
-    bcmpkt_generic_loopback_t_entropy_obj_get,
-    bcmpkt_generic_loopback_t_flags_get,
-    bcmpkt_generic_loopback_t_header_type_get,
-    bcmpkt_generic_loopback_t_input_priority_get,
-    bcmpkt_generic_loopback_t_interface_ctrl_get,
-    bcmpkt_generic_loopback_t_interface_obj_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
-    bcmpkt_generic_loopback_t_qos_obj_get,
-    bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_source_system_port_get,
-    bcmpkt_generic_loopback_t_src_subport_num_get,
-    bcmpkt_generic_loopback_t_start_byte_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_set,
-    bcmpkt_generic_loopback_t_destination_type_set,
-    bcmpkt_generic_loopback_t_entropy_obj_set,
-    bcmpkt_generic_loopback_t_flags_set,
-    bcmpkt_generic_loopback_t_header_type_set,
-    bcmpkt_generic_loopback_t_input_priority_set,
-    bcmpkt_generic_loopback_t_interface_ctrl_set,
-    bcmpkt_generic_loopback_t_interface_obj_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
-    bcmpkt_generic_loopback_t_qos_obj_set,
-    bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_source_system_port_set,
-    bcmpkt_generic_loopback_t_src_subport_num_set,
-    bcmpkt_generic_loopback_t_start_byte_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_field_data,
-};
-
-
-static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gpe_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_get,
-    bcmpkt_gpe_t_next_protocol_get,
-    bcmpkt_gpe_t_reserved0_get,
-    bcmpkt_gpe_t_reserved1_get,
-    bcmpkt_gpe_t_vni_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gpe_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_set,
-    bcmpkt_gpe_t_next_protocol_set,
-    bcmpkt_gpe_t_reserved0_set,
-    bcmpkt_gpe_t_reserved1_set,
-    bcmpkt_gpe_t_vni_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gpe_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gpe_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_gpe_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_get,
-    bcmpkt_gre_chksum_t_offset_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_set,
-    bcmpkt_gre_chksum_t_offset_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gre_key_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gre_key_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gre_key_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gre_key_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_gre_key_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 9);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 9, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_gre_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_get,
-    bcmpkt_gre_t_protocol_get,
-    bcmpkt_gre_t_reserved_get,
-    bcmpkt_gre_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_gre_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_set,
-    bcmpkt_gre_t_protocol_set,
-    bcmpkt_gre_t_reserved_set,
-    bcmpkt_gre_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_gre_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_gre_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_gre_t_field_data,
-};
-
-
-static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 4, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 4, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 6, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 6, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 18, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 18, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 17, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 17, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 31, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 31, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 15);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 15, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 15, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 15, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 15);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 15, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 2, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
-    bcmpkt_hg3_base_t_cn_get,
-    bcmpkt_hg3_base_t_cng_get,
-    bcmpkt_hg3_base_t_entropy_get,
-    bcmpkt_hg3_base_t_ext_hdr_present_get,
-    bcmpkt_hg3_base_t_hg3_reserved_get,
-    bcmpkt_hg3_base_t_l3_routed_get,
-    bcmpkt_hg3_base_t_mirror_copy_get,
-    bcmpkt_hg3_base_t_reserved_etype_get,
-    bcmpkt_hg3_base_t_system_destination_get,
-    bcmpkt_hg3_base_t_system_destination_type_get,
-    bcmpkt_hg3_base_t_system_source_get,
-    bcmpkt_hg3_base_t_tc_get,
-    bcmpkt_hg3_base_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
-    bcmpkt_hg3_base_t_cn_set,
-    bcmpkt_hg3_base_t_cng_set,
-    bcmpkt_hg3_base_t_entropy_set,
-    bcmpkt_hg3_base_t_ext_hdr_present_set,
-    bcmpkt_hg3_base_t_hg3_reserved_set,
-    bcmpkt_hg3_base_t_l3_routed_set,
-    bcmpkt_hg3_base_t_mirror_copy_set,
-    bcmpkt_hg3_base_t_reserved_etype_set,
-    bcmpkt_hg3_base_t_system_destination_set,
-    bcmpkt_hg3_base_t_system_destination_type_set,
-    bcmpkt_hg3_base_t_system_source_set,
-    bcmpkt_hg3_base_t_tc_set,
-    bcmpkt_hg3_base_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_BASE_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_field_data,
-};
-
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_lsb_get,
-    bcmpkt_hg3_extension_0_t_class_id_msb_get,
-    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
-    bcmpkt_hg3_extension_0_t_flags_get,
-    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
-    bcmpkt_hg3_extension_0_t_svp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_lsb_set,
-    bcmpkt_hg3_extension_0_t_class_id_msb_set,
-    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
-    bcmpkt_hg3_extension_0_t_flags_set,
-    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
-    bcmpkt_hg3_extension_0_t_svp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
-    bcmpkt_hop_by_hop_t_next_header_get,
-    bcmpkt_hop_by_hop_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
-    bcmpkt_hop_by_hop_t_next_header_set,
-    bcmpkt_hop_by_hop_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_field_data,
-};
-
-
-static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_icmp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_get,
-    bcmpkt_icmp_t_code_get,
-    bcmpkt_icmp_t_icmp_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_icmp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_set,
-    bcmpkt_icmp_t_code_set,
-    bcmpkt_icmp_t_icmp_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_icmp_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_icmp_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_icmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_get,
-    bcmpkt_ifa_header_t_gns_get,
-    bcmpkt_ifa_header_t_max_length_get,
-    bcmpkt_ifa_header_t_next_hdr_get,
-    bcmpkt_ifa_header_t_ver_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_set,
-    bcmpkt_ifa_header_t_gns_set,
-    bcmpkt_ifa_header_t_max_length_set,
-    bcmpkt_ifa_header_t_next_hdr_set,
-    bcmpkt_ifa_header_t_ver_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 26, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 26, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 24, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 20, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_a_t_cn_get,
-    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get,
-    bcmpkt_ifa_metadata_a_t_lns_device_id_get,
-    bcmpkt_ifa_metadata_a_t_port_speed_get,
-    bcmpkt_ifa_metadata_a_t_queue_id_get,
-    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_a_t_cn_set,
-    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set,
-    bcmpkt_ifa_metadata_a_t_lns_device_id_set,
-    bcmpkt_ifa_metadata_a_t_port_speed_set,
-    bcmpkt_ifa_metadata_a_t_queue_id_set,
-    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_b_t_egress_port_id_get,
-    bcmpkt_ifa_metadata_b_t_ingress_port_id_get,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_0_get,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_1_get,
-    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get,
-    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get,
-    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_b_t_egress_port_id_set,
-    bcmpkt_ifa_metadata_b_t_ingress_port_id_set,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_0_set,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_1_set,
-    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set,
-    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set,
-    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_base_t_action_vector_get,
-    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get,
-    bcmpkt_ifa_metadata_base_t_request_vector_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_base_t_action_vector_set,
-    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set,
-    bcmpkt_ifa_metadata_base_t_request_vector_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_field_data,
-};
-
-
-static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_igmp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_get,
-    bcmpkt_igmp_t_group_address_get,
-    bcmpkt_igmp_t_igmp_type_get,
-    bcmpkt_igmp_t_max_resp_time_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_igmp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_set,
-    bcmpkt_igmp_t_group_address_set,
-    bcmpkt_igmp_t_igmp_type_set,
-    bcmpkt_igmp_t_max_resp_time_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_igmp_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_igmp_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_igmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
-    bcmpkt_ioam_e2e_t_ioam_e2e_data_get,
-    bcmpkt_ioam_e2e_t_ioam_e2e_type_get,
-    bcmpkt_ioam_e2e_t_ioam_hdr_len_get,
-    bcmpkt_ioam_e2e_t_namespace_id_get,
-    bcmpkt_ioam_e2e_t_next_protocol_get,
-    bcmpkt_ioam_e2e_t_reserved_get,
-    bcmpkt_ioam_e2e_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
-    bcmpkt_ioam_e2e_t_ioam_e2e_data_set,
-    bcmpkt_ioam_e2e_t_ioam_e2e_type_set,
-    bcmpkt_ioam_e2e_t_ioam_hdr_len_set,
-    bcmpkt_ioam_e2e_t_namespace_id_set,
-    bcmpkt_ioam_e2e_t_next_protocol_set,
-    bcmpkt_ioam_e2e_t_reserved_set,
-    bcmpkt_ioam_e2e_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IOAM_E2E_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ipfix_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_get,
-    bcmpkt_ipfix_t_length_get,
-    bcmpkt_ipfix_t_obs_domain_id_get,
-    bcmpkt_ipfix_t_sequence_num_get,
-    bcmpkt_ipfix_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ipfix_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_set,
-    bcmpkt_ipfix_t_length_set,
-    bcmpkt_ipfix_t_obs_domain_id_set,
-    bcmpkt_ipfix_t_sequence_num_set,
-    bcmpkt_ipfix_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ipfix_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ipfix_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_ipfix_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ipv4_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_get,
-    bcmpkt_ipv4_t_flags_frag_offset_get,
-    bcmpkt_ipv4_t_hdr_checksum_get,
-    bcmpkt_ipv4_t_id_get,
-    bcmpkt_ipv4_t_option_get,
-    bcmpkt_ipv4_t_protocol_get,
-    bcmpkt_ipv4_t_sa_get,
-    bcmpkt_ipv4_t_tos_get,
-    bcmpkt_ipv4_t_total_length_get,
-    bcmpkt_ipv4_t_ttl_get,
-    bcmpkt_ipv4_t_version_hdr_len_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ipv4_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_set,
-    bcmpkt_ipv4_t_flags_frag_offset_set,
-    bcmpkt_ipv4_t_hdr_checksum_set,
-    bcmpkt_ipv4_t_id_set,
-    bcmpkt_ipv4_t_option_set,
-    bcmpkt_ipv4_t_protocol_set,
-    bcmpkt_ipv4_t_sa_set,
-    bcmpkt_ipv4_t_tos_set,
-    bcmpkt_ipv4_t_total_length_set,
-    bcmpkt_ipv4_t_ttl_set,
-    bcmpkt_ipv4_t_version_hdr_len_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ipv4_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ipv4_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_ipv4_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_ipv6_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_get,
-    bcmpkt_ipv6_t_flow_label_get,
-    bcmpkt_ipv6_t_hop_limit_get,
-    bcmpkt_ipv6_t_next_header_get,
-    bcmpkt_ipv6_t_payload_length_get,
-    bcmpkt_ipv6_t_sa_get,
-    bcmpkt_ipv6_t_traffic_class_get,
-    bcmpkt_ipv6_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_ipv6_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_set,
-    bcmpkt_ipv6_t_flow_label_set,
-    bcmpkt_ipv6_t_hop_limit_set,
-    bcmpkt_ipv6_t_next_header_set,
-    bcmpkt_ipv6_t_payload_length_set,
-    bcmpkt_ipv6_t_sa_set,
-    bcmpkt_ipv6_t_traffic_class_set,
-    bcmpkt_ipv6_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_ipv6_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_ipv6_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_ipv6_t_field_data,
-};
-
-
-static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_l2_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_get,
-    bcmpkt_l2_t_macsa_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_l2_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_set,
-    bcmpkt_l2_t_macsa_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_l2_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_l2_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_l2_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_get,
-    bcmpkt_mpls_ach_t_cw_type_get,
-    bcmpkt_mpls_ach_t_reserved_get,
-    bcmpkt_mpls_ach_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_set,
-    bcmpkt_mpls_ach_t_cw_type_set,
-    bcmpkt_mpls_ach_t_reserved_set,
-    bcmpkt_mpls_ach_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_get,
-    bcmpkt_mpls_cw_t_reserved_get,
-    bcmpkt_mpls_cw_t_seq_number_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_set,
-    bcmpkt_mpls_cw_t_reserved_set,
-    bcmpkt_mpls_cw_t_seq_number_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 9, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 9, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_mpls_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_get,
-    bcmpkt_mpls_t_exp_get,
-    bcmpkt_mpls_t_label_get,
-    bcmpkt_mpls_t_ttl_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_mpls_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_set,
-    bcmpkt_mpls_t_exp_set,
-    bcmpkt_mpls_t_label_set,
-    bcmpkt_mpls_t_ttl_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_mpls_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_mpls_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_mpls_t_field_data,
-};
-
-
-static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[7], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[7], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_p_1588_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_get,
-    bcmpkt_p_1588_t_correction_get,
-    bcmpkt_p_1588_t_domain_nb_get,
-    bcmpkt_p_1588_t_flags_get,
-    bcmpkt_p_1588_t_logmsginterval_get,
-    bcmpkt_p_1588_t_msg_length_get,
-    bcmpkt_p_1588_t_msg_type_get,
-    bcmpkt_p_1588_t_reserved1_get,
-    bcmpkt_p_1588_t_reserved2_get,
-    bcmpkt_p_1588_t_reserved3_get,
-    bcmpkt_p_1588_t_seq_id_get,
-    bcmpkt_p_1588_t_srcportid_get,
-    bcmpkt_p_1588_t_transportspec_get,
-    bcmpkt_p_1588_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_p_1588_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_set,
-    bcmpkt_p_1588_t_correction_set,
-    bcmpkt_p_1588_t_domain_nb_set,
-    bcmpkt_p_1588_t_flags_set,
-    bcmpkt_p_1588_t_logmsginterval_set,
-    bcmpkt_p_1588_t_msg_length_set,
-    bcmpkt_p_1588_t_msg_type_set,
-    bcmpkt_p_1588_t_reserved1_set,
-    bcmpkt_p_1588_t_reserved2_set,
-    bcmpkt_p_1588_t_reserved3_set,
-    bcmpkt_p_1588_t_seq_id_set,
-    bcmpkt_p_1588_t_srcportid_set,
-    bcmpkt_p_1588_t_transportspec_set,
-    bcmpkt_p_1588_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_p_1588_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_p_1588_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_p_1588_t_field_data,
-};
-
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
-    bcmpkt_prog_ext_hdr_t_next_header_get,
-    bcmpkt_prog_ext_hdr_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
-    bcmpkt_prog_ext_hdr_t_next_header_set,
-    bcmpkt_prog_ext_hdr_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_get,
-    bcmpkt_psamp_0_t_length_get,
-    bcmpkt_psamp_0_t_next_hop_index_get,
-    bcmpkt_psamp_0_t_obs_time_ns_get,
-    bcmpkt_psamp_0_t_obs_time_s_get,
-    bcmpkt_psamp_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_set,
-    bcmpkt_psamp_0_t_length_set,
-    bcmpkt_psamp_0_t_next_hop_index_set,
-    bcmpkt_psamp_0_t_obs_time_ns_set,
-    bcmpkt_psamp_0_t_obs_time_s_set,
-    bcmpkt_psamp_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_get,
-    bcmpkt_psamp_1_t_egress_port_get,
-    bcmpkt_psamp_1_t_epoch_get,
-    bcmpkt_psamp_1_t_ingress_port_get,
-    bcmpkt_psamp_1_t_sampled_length_get,
-    bcmpkt_psamp_1_t_user_meta_data_get,
-    bcmpkt_psamp_1_t_variable_flag_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_set,
-    bcmpkt_psamp_1_t_egress_port_set,
-    bcmpkt_psamp_1_t_epoch_set,
-    bcmpkt_psamp_1_t_ingress_port_set,
-    bcmpkt_psamp_1_t_sampled_length_set,
-    bcmpkt_psamp_1_t_user_meta_data_set,
-    bcmpkt_psamp_1_t_variable_flag_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_data,
-};
-
-
-static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_rarp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_get,
-    bcmpkt_rarp_t_hardware_type_get,
-    bcmpkt_rarp_t_operation_get,
-    bcmpkt_rarp_t_prot_addr_len_get,
-    bcmpkt_rarp_t_protocol_type_get,
-    bcmpkt_rarp_t_sender_ha_get,
-    bcmpkt_rarp_t_sender_ip_get,
-    bcmpkt_rarp_t_target_ha_get,
-    bcmpkt_rarp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_rarp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_set,
-    bcmpkt_rarp_t_hardware_type_set,
-    bcmpkt_rarp_t_operation_set,
-    bcmpkt_rarp_t_prot_addr_len_set,
-    bcmpkt_rarp_t_protocol_type_set,
-    bcmpkt_rarp_t_sender_ha_set,
-    bcmpkt_rarp_t_sender_ip_set,
-    bcmpkt_rarp_t_target_ha_set,
-    bcmpkt_rarp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_rarp_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_rarp_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_rarp_t_field_data,
-};
-
-
-static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_routing_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_get,
-    bcmpkt_routing_t_hdr_ext_len_get,
-    bcmpkt_routing_t_next_header_get,
-    bcmpkt_routing_t_routing_type_get,
-    bcmpkt_routing_t_segments_left_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_routing_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_set,
-    bcmpkt_routing_t_hdr_ext_len_set,
-    bcmpkt_routing_t_next_header_set,
-    bcmpkt_routing_t_routing_type_set,
-    bcmpkt_routing_t_segments_left_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_routing_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_routing_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_routing_t_field_data,
-};
-
-
-static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_rspan_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_get,
-    bcmpkt_rspan_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_rspan_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_set,
-    bcmpkt_rspan_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_rspan_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_rspan_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_rspan_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_get,
-    bcmpkt_sflow_shim_0_t_sys_source_get,
-    bcmpkt_sflow_shim_0_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_set,
-    bcmpkt_sflow_shim_0_t_sys_source_set,
-    bcmpkt_sflow_shim_0_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 27, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 27, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 31, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 31, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 7);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 7, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 23, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 23, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_discarded_get,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_mcast_get,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_truncated_get,
-    bcmpkt_sflow_shim_1_t_reserved_get,
-    bcmpkt_sflow_shim_1_t_sys_opcode_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_discarded_set,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_mcast_set,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_truncated_set,
-    bcmpkt_sflow_shim_1_t_reserved_set,
-    bcmpkt_sflow_shim_1_t_sys_opcode_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_get,
-    bcmpkt_sflow_shim_2_t_user_meta_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_set,
-    bcmpkt_sflow_shim_2_t_user_meta_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_get,
-    bcmpkt_snap_llc_t_snap_llc_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_set,
-    bcmpkt_snap_llc_t_snap_llc_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_get,
-    bcmpkt_tcp_first_4bytes_t_src_port_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_set,
-    bcmpkt_tcp_first_4bytes_t_src_port_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_get,
-    bcmpkt_tcp_last_16bytes_t_checksum_get,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
-    bcmpkt_tcp_last_16bytes_t_seq_num_get,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
-    bcmpkt_tcp_last_16bytes_t_win_size_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_set,
-    bcmpkt_tcp_last_16bytes_t_checksum_set,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
-    bcmpkt_tcp_last_16bytes_t_seq_num_set,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
-    bcmpkt_tcp_last_16bytes_t_win_size_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_udp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_get,
-    bcmpkt_udp_t_dst_port_get,
-    bcmpkt_udp_t_src_port_get,
-    bcmpkt_udp_t_udp_length_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_udp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_set,
-    bcmpkt_udp_t_dst_port_set,
-    bcmpkt_udp_t_src_port_set,
-    bcmpkt_udp_t_udp_length_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_udp_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_udp_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_udp_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
-    bcmpkt_unknown_l5_t_l5_bytes_8_9_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
-    bcmpkt_unknown_l5_t_l5_bytes_8_9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_field_data,
-};
-
-
-static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_vlan_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_get,
-    bcmpkt_vlan_t_pcp_get,
-    bcmpkt_vlan_t_tpid_get,
-    bcmpkt_vlan_t_vid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_vlan_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_set,
-    bcmpkt_vlan_t_pcp_set,
-    bcmpkt_vlan_t_tpid_set,
-    bcmpkt_vlan_t_vid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_vlan_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_vlan_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_vlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_vxlan_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_get,
-    bcmpkt_vxlan_t_reserved2_get,
-    bcmpkt_vxlan_t_vn_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_vxlan_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_set,
-    bcmpkt_vxlan_t_reserved2_set,
-    bcmpkt_vxlan_t_vn_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_vxlan_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_vxlan_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_vxlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_31_7_0_wesp_t_fget[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_get,
-    bcmpkt_wesp_t_header_len_get,
-    bcmpkt_wesp_t_next_header_get,
-    bcmpkt_wesp_t_seq_num_get,
-    bcmpkt_wesp_t_spi_get,
-    bcmpkt_wesp_t_trailer_len_get,
-    bcmpkt_wesp_t_wesp_iv_get,
-};
-
-bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_31_7_0_wesp_t_fset[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_set,
-    bcmpkt_wesp_t_header_len_set,
-    bcmpkt_wesp_t_next_header_set,
-    bcmpkt_wesp_t_seq_num_set,
-    bcmpkt_wesp_t_spi_set,
-    bcmpkt_wesp_t_trailer_len_set,
-    bcmpkt_wesp_t_wesp_iv_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_31_7_0_wesp_t_field_data[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_31_7_0_wesp_t_field_info = {
-    .num_fields = BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56690_a0_dna_6_5_31_7_0_wesp_t_field_data,
-};
-
-static bcmpkt_flex_pmd_info_t bcm56690_a0_dna_6_5_31_7_0_flexhdr_info_list[BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT] = {
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_arp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_arp_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_arp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_authen_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_authen_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_authen_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_bfd_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_bfd_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_bfd_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_cntag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_cntag_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_cntag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_cpu_composites_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_dest_option_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_dest_option_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_dest_option_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ep_nih_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_erspan3_fixed_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_erspan3_subhdr_5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_esp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_esp_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_esp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_ethertype_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ethertype_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ethertype_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_frag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_frag_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_frag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gbp_ethernet_shim_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_generic_loopback_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_gpe_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gpe_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gpe_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gre_chksum_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_gre_key_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gre_key_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gre_key_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gre_rout_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gre_seq_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_gre_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_gre_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_gre_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_hg3_base_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_hg3_extension_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_hop_by_hop_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_icmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_icmp_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_icmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ifa_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_a_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_b_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ifa_metadata_base_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_igmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_igmp_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_igmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ioam_e2e_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_ipfix_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ipfix_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ipfix_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_ipv4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ipv4_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ipv4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_ipv6_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_ipv6_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_ipv6_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_l2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_l2_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_l2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mirror_erspan_sn_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mirror_transport_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mpls_ach_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mpls_bv_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mpls_cw_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_mpls_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_mpls_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_mpls_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_p_1588_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_p_1588_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_p_1588_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_prog_ext_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_psamp_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_psamp_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_psamp_mirror_on_drop_3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_rarp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_rarp_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_rarp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_routing_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_routing_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_routing_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_rspan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_rspan_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_rspan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_sflow_shim_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_snap_llc_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_tcp_first_4bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_tcp_last_16bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_udp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_udp_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_udp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_unknown_l3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_unknown_l4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_unknown_l5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_vlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_vlan_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_vlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_vxlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_vxlan_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_vxlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_wesp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56690_a0_dna_6_5_31_7_0_wesp_t_fget,
-        .flex_fset = bcm56690_a0_dna_6_5_31_7_0_wesp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_field_info,
-        .reasons_info = &bcm56690_a0_dna_6_5_31_7_0_rxpmd_flex_reasons_info,
-        .flex_common_fget = bcm56690_a0_rxpmd_flex_fget,
-        .flex_common_fset = bcm56690_a0_rxpmd_flex_fset,
-    },
-};
-
-static shr_enum_map_t bcm56690_a0_dna_6_5_31_7_0_flexhdr_id_map[] = {
-    BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
-};
-
-shr_enum_map_t * bcm56690_a0_dna_6_5_31_7_0_flexhdr_map_get(void)
-{
-    return bcm56690_a0_dna_6_5_31_7_0_flexhdr_id_map;
-}
-
-bcmpkt_flex_pmd_info_t * bcm56690_a0_dna_6_5_31_7_0_flex_pmd_info_get(uint32_t hid)
-{
-    if (hid >= BCM56690_A0_DNA_6_5_31_7_0_BCMPKT_FLEXHDR_COUNT) {
-        return NULL;
-    }
-
-    return &bcm56690_a0_dna_6_5_31_7_0_flexhdr_info_list[hid];
-}
-
-int bcm56690_a0_dna_6_5_31_7_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
-    14,
-    21,
-    22,
-    63,
-};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 00000000000..da113538082
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,7057 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56690_a0_dna_6_5_32_5_0_sf_match_id_info.yml
+ * for device bcm56690_a0 and variant dna_6_5_32_5_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id_defs.h>
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] =
+{
+    0x366c,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
+{
+    0x78f0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
+{
+    0x1fffe,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
+{
+    0xff00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] =
+{
+    0x1e4c8,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] =
+{
+    0x10,
+    0x400000,
+    0x1dd8000,
+    0x20,
+    0x0,
+    0x0,
+    0x0,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0x1,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x400000,
+    0x0,
+    0x100,
+    0x800776,
+    0x0,
+    0x0,
+    0x0,
+    0xf77c0000,
+    0xefeeff77,
+    0x7ddfddfe,
+    0x777f7,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x0,
+    0x7778,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xde000000,
+    0x1d,
+    0x0,
+    0x0,
+    0xeef0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] =
+{
+    0x0,
+    0x0,
+    0x100000,
+    0x1000000,
+    0x0,
+    0x0,
+    0x2000,
+    0x100100,
+    0x4002002,
+    0x10010040,
+    0x400400,
+    0x10008008,
+    0x40040100,
+    0x1001000,
+    0x40040020,
+    0x100100,
+    0x4002002,
+    0x80080040,
+    0x200200,
+    0x2002000,
+    0x80040040,
+    0x200800,
+    0x4004002,
+    0x80080,
+    0x401001,
+    0x2001004,
+    0x40040020,
+    0x800800,
+    0x2002,
+    0x0,
+    0x0,
+    0x40,
+    0x400,
+    0x0,
+    0x80000000,
+    0x4000000,
+    0x80080040,
+    0x1001000,
+    0x10004004,
+    0x200100,
+    0x4004002,
+    0x40010010,
+    0x800400,
+    0x4010010,
+    0x80080040,
+    0x1001000,
+    0x8020020,
+    0x80000080,
+    0x1000800,
+    0x20020010,
+    0x80080,
+    0x2001001,
+    0x40040020,
+    0x40100100,
+    0x800800,
+    0x20010010,
+    0x80080200,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff77f77c,
+    0xddfeefee,
+    0x77f77ddf,
+    0x7,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xddf00000,
+    0xbfbbfddf,
+    0xf77f77fb,
+    0x1ddfdd,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0x7778000,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x0,
+    0x7778,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0xeef0000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x0,
+    0x2000000,
+    0x0,
+    0x0,
+    0x8000000,
+    0x0,
+    0x0,
+    0x20000008,
+    0x0,
+    0x0,
+    0x40000,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x80000000,
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x200000,
+    0x8000,
+    0x0,
+    0x0,
+    0x10,
+    0x0,
+    0x0,
+    0x10000,
+    0x0,
+    0x0,
+    0x20000,
+    0x0,
+    0x0,
+    0x10000000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] =
+{
+    0x1e,
+    0x400000,
+    0x1dd8000,
+    0x3ddcafe0,
+    0x0,
+    0x8000,
+    0xc003bb00,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0xff77f77d,
+    0xddfeefee,
+    0x77f77ddf,
+    0xfddfddff,
+    0x77f77fbb,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x7fbbfbbe,
+    0xfbbfbbe5,
+    0xeff77f77,
+    0xbfbbeefe,
+    0xf77f77fb,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0xfbbfddf7,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x1bbbfb,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfddfddf0,
+    0x77f77fbb,
+    0x1ddfddf,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77c00000,
+    0xfeeff77f,
+    0xf77ddfdd,
+    0x777,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0xf0000000,
+    0xee,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0xeef,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x3bbc000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1dd,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbe000000,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x3bbfbbe,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xefeef800,
+    0xfddfddfe,
+    0xeefbbfbb,
+    0xeef,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0xeef00,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0xeef0000,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1dd,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x1dde00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] =
+{
+    0x0,
+    0x400000,
+    0x0,
+    0x80,
+    0x0,
+    0x8000,
+    0x0,
+    0x8004004,
+    0x140080,
+    0x400001,
+    0x20010010,
+    0x500200,
+    0x1000004,
+    0x80040040,
+    0x1001400,
+    0x8004000,
+    0x100080,
+    0x2002801,
+    0x4008000,
+    0x80080,
+    0x2801001,
+    0x8000020,
+    0x100100,
+    0x5002002,
+    0x10000040,
+    0x80080000,
+    0x1001000,
+    0x20028,
+    0x80,
+    0x0,
+    0x100,
+    0x2000000,
+    0x0,
+    0x0,
+    0x2,
+    0x100000,
+    0x2002001,
+    0x40050,
+    0x400100,
+    0x8008004,
+    0x100140,
+    0x1000400,
+    0x50020010,
+    0x400,
+    0x2002001,
+    0xa0040040,
+    0x800,
+    0x2001002,
+    0x40040020,
+    0x800a00,
+    0x4002000,
+    0x80080040,
+    0x1001400,
+    0x4000,
+    0x40020020,
+    0xa00400,
+    0x2000008,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0xaf00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x78000000,
+    0x5,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x2,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x15e000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x8800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40000000,
+    0x4,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x2,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x110000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40020,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800000,
+    0x10,
+    0x0,
+    0x0,
+    0x10000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] =
+{
+    0x18,
+    0x400000,
+    0x1dd8000,
+    0x3ddcafe0,
+    0x0,
+    0x8000,
+    0x4003bb00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x600000,
+    0x0,
+    0x100,
+    0xbf800776,
+    0xf772,
+    0x0,
+    0xec000002,
+    0x1000e,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0xff77f77d,
+    0xddfeefee,
+    0x77f77ddf,
+    0xfddfddff,
+    0x77f77fbb,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x7fbbfbbe,
+    0xfbbfbbe5,
+    0xeff77f77,
+    0xbfbbeefe,
+    0xf77f77fb,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0xfbbfddf7,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x3bbfb,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf77e0000,
+    0xefeeff77,
+    0x7ddfddfe,
+    0xddf777f7,
+    0xbfbbfddf,
+    0xf77f77fb,
+    0x77fddfdd,
+    0xfeeff77f,
+    0xf77ddfdd,
+    0xefeeff77,
+    0xfddfddfe,
+    0xeefbbfbb,
+    0xef95feef,
+    0xfddfeefe,
+    0xbbfbbfdd,
+    0xdfeefeef,
+    0xfbbfddfd,
+    0x77f77fbb,
+    0x77ddfddf,
+    0xfeefeeff,
+    0xbbfddfdd,
+    0xefeefbbf,
+    0xe,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] =
+{
+    0x0,
+    0x0,
+    0x400000,
+    0x4000000,
+    0x0,
+    0x0,
+    0x8000,
+    0x400400,
+    0x10008008,
+    0x40040100,
+    0x1001000,
+    0x40020020,
+    0x100400,
+    0x4004001,
+    0x100080,
+    0x400401,
+    0x10008008,
+    0x200100,
+    0x800802,
+    0x8008000,
+    0x100100,
+    0x802002,
+    0x10010008,
+    0x200200,
+    0x1004004,
+    0x8004010,
+    0x100080,
+    0x2002001,
+    0x8008,
+    0x0,
+    0x0,
+    0x100,
+    0x1000,
+    0x0,
+    0x0,
+    0x10000002,
+    0x200100,
+    0x4004002,
+    0x40010010,
+    0x800400,
+    0x10010008,
+    0x40040,
+    0x2001001,
+    0x10040040,
+    0x200100,
+    0x4004002,
+    0x20080080,
+    0x200,
+    0x4002002,
+    0x80080040,
+    0x200200,
+    0x8004004,
+    0x100080,
+    0x400401,
+    0x2002001,
+    0x80040040,
+    0x200800,
+    0x2,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbbfbbe0,
+    0xeff77f77,
+    0xbfbbeefe,
+    0x3b,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef800000,
+    0xfddfeefe,
+    0xbbfbbfdd,
+    0xeefeef,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xde000000,
+    0x1d,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0xe0000000,
+    0x1dd,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x3bbc00,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xbbc00000,
+    0x3,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf77f77c0,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0x77,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdf000000,
+    0xfbbfddfd,
+    0x77f77fbb,
+    0x1ddfddf,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0xeef0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0x1dde00,
+    0x0,
+    0x0,
+    0x3bbc00,
+    0x0,
+    0x0,
+    0xbbc00000,
+    0x3,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x0,
+    0x3bbc,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] =
+{
+    0x0,
+    0x0,
+    0x58000,
+    0x580e00,
+    0x0,
+    0x0,
+    0xb00,
+    0xb0058058,
+    0x1600b00,
+    0x5805816,
+    0xc0160160,
+    0x5802c02,
+    0x16016058,
+    0x580580,
+    0x1601600b,
+    0xb0058058,
+    0x1600b00,
+    0x2c02c016,
+    0x700b00b0,
+    0xb00b00,
+    0x2c016016,
+    0xb00b02c0,
+    0x1601600,
+    0x5802c02c,
+    0x60160580,
+    0xb00581,
+    0x1601600b,
+    0xb02c02c0,
+    0xb00,
+    0x0,
+    0x0,
+    0x38000016,
+    0x160,
+    0x0,
+    0x2c000000,
+    0x1600000,
+    0x2c02c016,
+    0x60580580,
+    0x5801601,
+    0xb00b0058,
+    0x81601600,
+    0x16005805,
+    0x802c0160,
+    0x1605805,
+    0x2c02c016,
+    0x580580,
+    0x2c0b00b,
+    0x2c01c02c,
+    0x805802c0,
+    0xb00b005,
+    0x5802c02c,
+    0xb00580,
+    0x1601600b,
+    0x16058058,
+    0x802c02c0,
+    0xb005805,
+    0x2c02c0b0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] =
+{
+    0x0,
+    0x0,
+    0x50000,
+    0x500c00,
+    0x0,
+    0x0,
+    0xa00,
+    0xa0050050,
+    0x1400a00,
+    0x5005014,
+    0x80140140,
+    0x5002802,
+    0x14014050,
+    0x500500,
+    0x1401400a,
+    0xa0050050,
+    0x1400a00,
+    0x28028014,
+    0x600a00a0,
+    0xa00a00,
+    0x28014014,
+    0xa00a0280,
+    0x1401400,
+    0x50028028,
+    0x40140500,
+    0xa00501,
+    0x1401400a,
+    0xa0280280,
+    0xa00,
+    0x0,
+    0x0,
+    0x30000014,
+    0x140,
+    0x0,
+    0x28000000,
+    0x1400000,
+    0x28028014,
+    0x40500500,
+    0x5001401,
+    0xa00a0050,
+    0x1401400,
+    0x14005005,
+    0x280140,
+    0x1405005,
+    0x28028014,
+    0x500500,
+    0x280a00a,
+    0x28018028,
+    0x500280,
+    0xa00a005,
+    0x50028028,
+    0xa00500,
+    0x1401400a,
+    0x14050050,
+    0x280280,
+    0xa005005,
+    0x280280a0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] =
+{
+    0x0,
+    0x0,
+    0xd80000,
+    0xd80a000,
+    0x0,
+    0x0,
+    0x1b000,
+    0xd80d80,
+    0x3601b01b,
+    0xd80d8360,
+    0x3603600,
+    0xd806c06c,
+    0x60360d80,
+    0xd80d803,
+    0x603601b0,
+    0xd80d83,
+    0x3601b01b,
+    0xc06c0360,
+    0x1b01b06,
+    0x1b01b005,
+    0xc0360360,
+    0x1b06c06,
+    0x3603601b,
+    0x806c06c0,
+    0x360d80d,
+    0x1b00d836,
+    0x603601b0,
+    0x6c06c03,
+    0x1b01b,
+    0x0,
+    0x0,
+    0x80000360,
+    0x3602,
+    0x0,
+    0xc0000000,
+    0x36000006,
+    0xc06c0360,
+    0xd80d806,
+    0xd8036036,
+    0x1b00d80,
+    0x3603601b,
+    0x600d80d8,
+    0x6c03603,
+    0x360d80d8,
+    0xc06c0360,
+    0xd80d806,
+    0x6c1b01b0,
+    0xc01406c0,
+    0xd806c06,
+    0xb01b00d8,
+    0x806c06c1,
+    0x1b00d80d,
+    0x603601b0,
+    0x60d80d83,
+    0x6c06c03,
+    0xb00d80d8,
+    0xc06c1b01,
+    0x6,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x100000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] =
+{
+    0x0,
+    0x0,
+    0x1000000,
+    0x10000000,
+    0x0,
+    0x0,
+    0x20000,
+    0x1001000,
+    0x40020020,
+    0x100400,
+    0x4004001,
+    0x80080,
+    0x401001,
+    0x10010004,
+    0x400200,
+    0x1001004,
+    0x40020020,
+    0x800400,
+    0x2002008,
+    0x20020000,
+    0x400400,
+    0x2008008,
+    0x40040020,
+    0x800800,
+    0x4010010,
+    0x20010040,
+    0x400200,
+    0x8008004,
+    0x20020,
+    0x0,
+    0x0,
+    0x400,
+    0x4000,
+    0x0,
+    0x0,
+    0x40000008,
+    0x800400,
+    0x10010008,
+    0x40040,
+    0x2001001,
+    0x40040020,
+    0x100100,
+    0x8004004,
+    0x40100100,
+    0x800400,
+    0x10010008,
+    0x80200200,
+    0x800,
+    0x10008008,
+    0x200100,
+    0x800802,
+    0x20010010,
+    0x400200,
+    0x1001004,
+    0x8008004,
+    0x100100,
+    0x802002,
+    0x8,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] =
+{
+    0x0,
+    0x0,
+    0x840000,
+    0x8400000,
+    0x0,
+    0x0,
+    0x10800,
+    0x80840840,
+    0x21010810,
+    0x84084210,
+    0x2102100,
+    0x84042042,
+    0x10210840,
+    0x8408402,
+    0x10210108,
+    0x80840842,
+    0x21010810,
+    0x20420210,
+    0x1081084,
+    0x10810800,
+    0x20210210,
+    0x81084204,
+    0x21021010,
+    0x40420420,
+    0x2108408,
+    0x10808421,
+    0x10210108,
+    0x84204202,
+    0x10810,
+    0x0,
+    0x0,
+    0x210,
+    0x2100,
+    0x0,
+    0x20000000,
+    0x21000004,
+    0x20420210,
+    0x8408404,
+    0x84021021,
+    0x81080840,
+    0x21021010,
+    0x10084084,
+    0x4202102,
+    0x21084084,
+    0x20420210,
+    0x8408404,
+    0x42108108,
+    0x20000420,
+    0x8404204,
+    0x8108084,
+    0x40420421,
+    0x10808408,
+    0x10210108,
+    0x10840842,
+    0x4204202,
+    0x8084084,
+    0x20421081,
+    0x4,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x0,
+    0x8000,
+    0x4003bb00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbbe0000,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x3bbfb,
+    0x0,
+    0x0,
+    0x0,
+    0x8000,
+    0x0,
+    0xec000002,
+    0x1000e,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfeefeef8,
+    0xbbfddfdd,
+    0xefeefbbf,
+    0xe,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0x3bbc000,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0x78000000,
+    0x77,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0x0,
+    0x1dde00,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0xeef,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] =
+{
+    0x33033198,
+    0xcc66066,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] =
+{
+    0x44044220,
+    0x11088088,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[2] =
+{
+    0xffc00000,
+    0xffffffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[2] =
+{
+    0x0,
+    0xfffff800,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[2] =
+{
+    0xf80f87c0,
+    0x3e1f01f0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[2] =
+{
+    0xfffffffe,
+    0xffffffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[2] =
+{
+    0x1ff800,
+    0x7fe003ff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[2] =
+{
+    0xa23a2510,
+    0xe8944744,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[13] =
+{
+    0x10,
+    0x0,
+    0x4,
+    0x20003df6,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbfdf7c0,
+    0x7dfefbfe,
+    0xbeff7dff,
+    0x7beff7df,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[34] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3df780,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de,
+    0x0,
+    0x0,
+    0x78000000,
+    0x3df,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0xf0000000,
+    0x7be,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0x78000000,
+    0x3df,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x8,
+    0x0,
+    0x0,
+    0x4000,
+    0x20004000,
+    0x10002000,
+    0x8001000,
+    0x800100,
+    0x800100,
+    0x400080,
+    0x200040,
+    0x20004,
+    0x20004,
+    0x20002,
+    0x10002001,
+    0x10000000,
+    0x8000800,
+    0x4000400,
+    0x400200,
+    0x20,
+    0x40008,
+    0x20004,
+    0x20010002,
+    0x10001000,
+    0x8000800,
+    0x4000400,
+    0x400200,
+    0x40020,
+    0x20004,
+    0x10002,
+    0x20010002,
+    0x20001000,
+    0x222222,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[17] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0x7efbfdf7,
+    0x1efbfdf,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[34] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbc00000,
+    0x1e,
+    0x0,
+    0x0,
+    0x7bef0000,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc00,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef0,
+    0x0,
+    0x0,
+    0x0,
+    0x3df7800,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef0,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[34] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20,
+    0x0,
+    0x0,
+    0x80000000,
+    0x0,
+    0x0,
+    0x2000000,
+    0x2000000,
+    0x0,
+    0x0,
+    0x0,
+    0x80000,
+    0x0,
+    0x0,
+    0x0,
+    0x4000000,
+    0x0,
+    0x0,
+    0x0,
+    0x80000,
+    0x0,
+    0x0,
+    0x0,
+    0x2000000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[38] =
+{
+    0x1e,
+    0x0,
+    0x4,
+    0xe0003df6,
+    0xe22fffff,
+    0xfbe,
+    0x0,
+    0x600,
+    0x3df600,
+    0xfbfdf7e0,
+    0x7dfefbfe,
+    0xbeff7dff,
+    0x7beff7df,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0x7efbfdf7,
+    0x7fefbfdf,
+    0xbfefbfdf,
+    0xdfefbfef,
+    0x7dfefbf7,
+    0x7dffffff,
+    0xbeffbeff,
+    0xdf7fdf7f,
+    0xfdf7efbf,
+    0xf88bfefb,
+    0x7fdf7fbe,
+    0xbfefbfdf,
+    0xfbf7dfef,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xdf7fdf7f,
+    0xfdf7efbf,
+    0x7fdf7efb,
+    0xbfefbfdf,
+    0xbdf7dfef,
+    0xfbf7dfef,
+    0xffff7dfe,
+    0x3ffffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7c000000,
+    0xbfefbfdf,
+    0xdfefbfef,
+    0x7dfefbf7,
+    0xf,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[35] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbef00000,
+    0x7,
+    0x0,
+    0x0,
+    0x78000000,
+    0x3df,
+    0x0,
+    0x0,
+    0xbef00000,
+    0x7,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x1ef,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x180,
+    0x0,
+    0x30,
+    0x0,
+    0x0,
+    0x18000,
+    0xc0018000,
+    0x6000c000,
+    0x30006000,
+    0x3000600,
+    0x3000600,
+    0x1800300,
+    0xc00180,
+    0xc0018,
+    0xc0018,
+    0xc000c,
+    0x6000c006,
+    0x60000000,
+    0x30003000,
+    0x18001800,
+    0x1800c00,
+    0xc0,
+    0x180030,
+    0xc0018,
+    0xc006000c,
+    0x60006000,
+    0x30003000,
+    0x18001800,
+    0x1800c00,
+    0x1800c0,
+    0xc0018,
+    0x6000c,
+    0xc006000c,
+    0x6000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x7fff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffff0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1fe,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3fc0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1e3c,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3c780,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x5568,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xaad00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x79b0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf3600,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7df00000,
+    0xbeffbeff,
+    0xdf7fdf7f,
+    0xfdf7efbf,
+    0x1efb,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[35] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0x3df78000,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x1ef,
+    0x0,
+    0x0,
+    0x0,
+    0x3df78,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc00,
+    0x0,
+    0x0,
+    0x0,
+    0x3df78,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[37] =
+{
+    0x0,
+    0x0,
+    0x4,
+    0x0,
+    0x8000,
+    0x0,
+    0x0,
+    0x200,
+    0x0,
+    0x800100,
+    0x400080,
+    0x200050,
+    0x20000,
+    0x20004,
+    0x40010002,
+    0x8001,
+    0x10000800,
+    0x8000800,
+    0x4000a00,
+    0x400000,
+    0x400000,
+    0x200020,
+    0x140010,
+    0x80000008,
+    0x20002000,
+    0x10001000,
+    0xa000800,
+    0x400,
+    0x400040,
+    0x200020,
+    0x140010,
+    0x80000008,
+    0x10000000,
+    0x8000800,
+    0x9000400,
+    0x400,
+    0x40,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x22f0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x8bc000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x2080000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x820000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[8] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x20000000,
+    0x0,
+    0x0,
+    0x400,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x100,
+    0x0,
+    0x20,
+    0x0,
+    0x0,
+    0x10000,
+    0x80010000,
+    0x40008000,
+    0x20004000,
+    0x2000400,
+    0x2000400,
+    0x1000200,
+    0x800100,
+    0x80010,
+    0x80010,
+    0x80008,
+    0x40008004,
+    0x40000000,
+    0x20002000,
+    0x10001000,
+    0x1000800,
+    0x80,
+    0x100020,
+    0x80010,
+    0x80040008,
+    0x40004000,
+    0x20002000,
+    0x10001000,
+    0x1000800,
+    0x100080,
+    0x80010,
+    0x40008,
+    0x80040008,
+    0x4000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[9] =
+{
+    0x18,
+    0x0,
+    0x4,
+    0xe0003df6,
+    0xe22fffff,
+    0xfbe,
+    0x0,
+    0x600,
+    0x3df600,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbfdf7e0,
+    0x7dfefbfe,
+    0xbeff7dff,
+    0x7beff7df,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0x7efbfdf7,
+    0x7fefbfdf,
+    0xbfefbfdf,
+    0xdfefbfef,
+    0x7dfefbf7,
+    0x7dffffff,
+    0xbeffbeff,
+    0xdf7fdf7f,
+    0xfdf7efbf,
+    0xf88bfefb,
+    0x7fdf7fbe,
+    0xbfefbfdf,
+    0xfbf7dfef,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xdf7fdf7f,
+    0xfdf7efbf,
+    0x7fdf7efb,
+    0xbfefbfdf,
+    0xbdf7dfef,
+    0xfbf7dfef,
+    0xf7dfe,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfff00000,
+    0x7fffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffe00000,
+    0x7ffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffc00000,
+    0x7fff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff800000,
+    0x7ff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff000000,
+    0x7f,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfe000000,
+    0x7,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7c000000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x30000000,
+    0x333333,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40000000,
+    0x444444,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x80,
+    0x0,
+    0x0,
+    0x40000,
+    0x40000,
+    0x20002,
+    0x80010001,
+    0x8001000,
+    0x8001000,
+    0x4000800,
+    0x2000400,
+    0x200040,
+    0x200040,
+    0x200020,
+    0x20010,
+    0x1,
+    0x80008001,
+    0x40004000,
+    0x4002000,
+    0x200,
+    0x400080,
+    0x200040,
+    0x100020,
+    0x10002,
+    0x80008001,
+    0x40004000,
+    0x4002000,
+    0x400200,
+    0x200040,
+    0x100020,
+    0x100020,
+    0x10002,
+    0x800000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf8000000,
+    0x7fdf7fbe,
+    0xbfefbfdf,
+    0xfbf7dfef,
+    0xf7dfe,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x3df7,
+    0x0,
+    0x0,
+    0x1efbc00,
+    0x0,
+    0x0,
+    0x0,
+    0xdf780000,
+    0x3,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x1ef,
+    0x0,
+    0x0,
+    0xdf780000,
+    0x3,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x1ef,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1000000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[33] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7df00000,
+    0xbeffbeff,
+    0xdf7fdf7f,
+    0xfdf7efbf,
+    0x1efb,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbef00000,
+    0x7,
+    0x0,
+    0x0,
+    0x1efbc000,
+    0x0,
+    0x0,
+    0xde000000,
+    0xf7,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de00,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x16,
+    0xc00e0000,
+    0x2,
+    0x0,
+    0x0,
+    0x1600,
+    0xb001600,
+    0x5800b00,
+    0x2c00580,
+    0x2c0058,
+    0x2c0058,
+    0x16002c,
+    0x600b0016,
+    0x6000b001,
+    0xb000b001,
+    0x5800b000,
+    0x5800b00,
+    0x5800000,
+    0x2c002c0,
+    0x1600160,
+    0x1600b0,
+    0xc003800b,
+    0x60016002,
+    0xb000b001,
+    0xb005800,
+    0x5800580,
+    0x2c002c0,
+    0x1600160,
+    0x1600b0,
+    0x6001600b,
+    0xb000b001,
+    0xb0005800,
+    0xb005800,
+    0x580,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x14,
+    0x800c0000,
+    0x2,
+    0x0,
+    0x0,
+    0x1400,
+    0xa001400,
+    0x5000a00,
+    0x2800500,
+    0x280050,
+    0x280050,
+    0x140028,
+    0x400a0014,
+    0x4000a001,
+    0xa000a001,
+    0x5000a000,
+    0x5000a00,
+    0x5000000,
+    0x2800280,
+    0x1400140,
+    0x1400a0,
+    0x8003000a,
+    0x40014002,
+    0xa000a001,
+    0xa005000,
+    0x5000500,
+    0x2800280,
+    0x1400140,
+    0x1400a0,
+    0x4001400a,
+    0xa000a001,
+    0xa0005000,
+    0xa005000,
+    0x500,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x1de0,
+    0x2200000,
+    0x3bc,
+    0x0,
+    0x0,
+    0x1de000,
+    0xf01de000,
+    0x780ef00e,
+    0xbc077807,
+    0x3bc07783,
+    0x3bc07780,
+    0x1de03bc0,
+    0xef01de0,
+    0xef01de,
+    0xef01de,
+    0x80ef00ef,
+    0x780ef077,
+    0x78000007,
+    0xbc03bc07,
+    0xde01de03,
+    0x1de0ef01,
+    0x880ef0,
+    0x1de03bc,
+    0xef01de,
+    0xf07780ef,
+    0x7807780e,
+    0xbc03bc07,
+    0xde01de03,
+    0x1de0ef01,
+    0x1de0ef0,
+    0xef01de,
+    0x7780ef,
+    0xf07780ef,
+    0x7780e,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x2000000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x200000,
+    0x200000,
+    0x100010,
+    0x80008,
+    0x40008004,
+    0x40008000,
+    0x20004000,
+    0x10002000,
+    0x1000200,
+    0x1000200,
+    0x1000100,
+    0x100080,
+    0x8,
+    0x40008,
+    0x20004,
+    0x20010002,
+    0x1000,
+    0x2000400,
+    0x1000200,
+    0x800100,
+    0x80010,
+    0x40008,
+    0x20004,
+    0x20010002,
+    0x2001000,
+    0x1000200,
+    0x800100,
+    0x800100,
+    0x80010,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x810,
+    0x0,
+    0x102,
+    0x0,
+    0x0,
+    0x81000,
+    0x8081000,
+    0x4040804,
+    0x2020402,
+    0x10202041,
+    0x10202040,
+    0x8101020,
+    0x4080810,
+    0x408081,
+    0x80408081,
+    0x40408040,
+    0x4040820,
+    0x4000002,
+    0x2010202,
+    0x81008101,
+    0x8104080,
+    0x408,
+    0x810102,
+    0x80408081,
+    0x8204040,
+    0x4020404,
+    0x2010202,
+    0x81008101,
+    0x8104080,
+    0x810408,
+    0x80408081,
+    0x80204040,
+    0x8204040,
+    0x20404,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x1000,
+    0x0,
+    0x200,
+    0x0,
+    0x0,
+    0x100000,
+    0x100000,
+    0x80008,
+    0x40004,
+    0x20004002,
+    0x20004000,
+    0x10002000,
+    0x8001000,
+    0x800100,
+    0x800100,
+    0x800080,
+    0x80040,
+    0x4,
+    0x20004,
+    0x10002,
+    0x10008001,
+    0x800,
+    0x1000200,
+    0x800100,
+    0x400080,
+    0x40008,
+    0x20004,
+    0x10002,
+    0x10008001,
+    0x1000800,
+    0x800100,
+    0x400080,
+    0x400080,
+    0x40008,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800,
+    0x0,
+    0x600,
+    0x3df600,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7c000000,
+    0xbfefbfdf,
+    0xbdf7dfef,
+    0xfbf7dfef,
+    0xf7dfe,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef0000,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc00,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x1efb,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x1efb,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
+{
+    0x8,
+};
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x40000,
+        .match_mask   = 0x40000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 18,
+        .minbit       = 18,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x44000,
+        .match_mask   = 0x5c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x40020,
+        .match_mask   = 0x40020,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x40000,
+        .match_mask   = 0x40000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 18,
+        .minbit       = 18,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x44000,
+        .match_mask   = 0x5c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x40020,
+        .match_mask   = 0x40020,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 45,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 56,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 56,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 51,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 54,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 13,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 34,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 17,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 34,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 34,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x40000,
+        .match_mask   = 0x40000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 18,
+        .minbit       = 18,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x44000,
+        .match_mask   = 0x5c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x40020,
+        .match_mask   = 0x40020,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 8,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 9,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 33,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_32_5_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_32_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_db_info = {
+    .num_entries = 222,
+    .db = bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_map[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_map_info = {
+    .num_entries = 222,
+    .map = bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56690_a0_dna_6_5_32_5_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_pkt_flexhdr.c
new file mode 100644
index 00000000000..848134e208e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_pkt_flexhdr.c
@@ -0,0 +1,9430 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56690_a0 and variant dna_6_5_32_5_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[13] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[13] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[13] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[13] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[13] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[13] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[13] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[13] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[13] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[13] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[13] |= (0x1 << 31);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+        reason[12] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 320, 335 }, /* Profile 10. */
+            { 320, 335 }, /* Profile 11. */
+            { 320, 335 }, /* Profile 12. */
+            { 320, 335 }, /* Profile 13. */
+            { 320, 335 }, /* Profile 14. */
+            { 320, 335 }, /* Profile 15. */
+            { 320, 335 }, /* Profile 16. */
+            { 320, 335 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { 320, 335 }, /* Profile 26. */
+            { 320, 335 }, /* Profile 27. */
+            { 320, 335 }, /* Profile 28. */
+            { 320, 335 }, /* Profile 29. */
+            { 320, 335 }, /* Profile 30. */
+            { 320, 335 }, /* Profile 31. */
+            { 320, 335 }, /* Profile 32. */
+            { 320, 335 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "DNAT_CTRL_3_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 371 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 368, 371 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 368, 371 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 368, 371 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { 368, 371 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { 368, 371 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { 368, 371 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { 368, 371 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { 368, 371 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { 368, 371 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { 368, 371 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { 368, 371 }, /* Profile 32. */
+        },
+        .profile_cnt = 33,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 48, 63 }, /* Profile 8. */
+            { 48, 63 }, /* Profile 9. */
+            { 48, 63 }, /* Profile 10. */
+            { 48, 63 }, /* Profile 11. */
+            { 48, 63 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { 48, 63 }, /* Profile 16. */
+            { 48, 63 }, /* Profile 17. */
+            { 48, 63 }, /* Profile 18. */
+            { 48, 63 }, /* Profile 19. */
+            { 48, 63 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { 48, 63 }, /* Profile 24. */
+            { 48, 63 }, /* Profile 25. */
+            { 48, 63 }, /* Profile 26. */
+            { 48, 63 }, /* Profile 27. */
+            { 48, 63 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { 48, 63 }, /* Profile 32. */
+            { 48, 63 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 191 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+            { 208, 223 }, /* Profile 6. */
+            { 208, 223 }, /* Profile 7. */
+            { 176, 191 }, /* Profile 8. */
+            { 208, 223 }, /* Profile 9. */
+            { 176, 191 }, /* Profile 10. */
+            { 208, 223 }, /* Profile 11. */
+            { 208, 223 }, /* Profile 12. */
+            { 176, 191 }, /* Profile 13. */
+            { 208, 223 }, /* Profile 14. */
+            { 208, 223 }, /* Profile 15. */
+            { 176, 191 }, /* Profile 16. */
+            { 208, 223 }, /* Profile 17. */
+            { 192, 207 }, /* Profile 18. */
+            { 224, 239 }, /* Profile 19. */
+            { 224, 239 }, /* Profile 20. */
+            { 192, 207 }, /* Profile 21. */
+            { 224, 239 }, /* Profile 22. */
+            { 224, 239 }, /* Profile 23. */
+            { 192, 207 }, /* Profile 24. */
+            { 224, 239 }, /* Profile 25. */
+            { 192, 207 }, /* Profile 26. */
+            { 224, 239 }, /* Profile 27. */
+            { 224, 239 }, /* Profile 28. */
+            { 192, 207 }, /* Profile 29. */
+            { 224, 239 }, /* Profile 30. */
+            { 224, 239 }, /* Profile 31. */
+            { 192, 207 }, /* Profile 32. */
+            { 224, 239 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 144, 159 }, /* Profile 5. */
+            { 176, 191 }, /* Profile 6. */
+            { 176, 191 }, /* Profile 7. */
+            { 144, 159 }, /* Profile 8. */
+            { 176, 191 }, /* Profile 9. */
+            { 144, 159 }, /* Profile 10. */
+            { 176, 191 }, /* Profile 11. */
+            { 176, 191 }, /* Profile 12. */
+            { 144, 159 }, /* Profile 13. */
+            { 176, 191 }, /* Profile 14. */
+            { 176, 191 }, /* Profile 15. */
+            { 144, 159 }, /* Profile 16. */
+            { 176, 191 }, /* Profile 17. */
+            { 160, 175 }, /* Profile 18. */
+            { 192, 207 }, /* Profile 19. */
+            { 192, 207 }, /* Profile 20. */
+            { 160, 175 }, /* Profile 21. */
+            { 192, 207 }, /* Profile 22. */
+            { 192, 207 }, /* Profile 23. */
+            { 160, 175 }, /* Profile 24. */
+            { 192, 207 }, /* Profile 25. */
+            { 160, 175 }, /* Profile 26. */
+            { 192, 207 }, /* Profile 27. */
+            { 192, 207 }, /* Profile 28. */
+            { 160, 175 }, /* Profile 29. */
+            { 192, 207 }, /* Profile 30. */
+            { 192, 207 }, /* Profile 31. */
+            { 160, 175 }, /* Profile 32. */
+            { 192, 207 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 335 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+            { 320, 335 }, /* Profile 6. */
+            { 320, 335 }, /* Profile 7. */
+            { 320, 335 }, /* Profile 8. */
+            { 320, 335 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { 320, 335 }, /* Profile 18. */
+            { 320, 335 }, /* Profile 19. */
+            { 320, 335 }, /* Profile 20. */
+            { 320, 335 }, /* Profile 21. */
+            { 320, 335 }, /* Profile 22. */
+            { 320, 335 }, /* Profile 23. */
+            { 320, 335 }, /* Profile 24. */
+            { 320, 335 }, /* Profile 25. */
+        },
+        .profile_cnt = 26,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 380, 383 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+            { 380, 383 }, /* Profile 6. */
+            { 380, 383 }, /* Profile 7. */
+            { 384, 387 }, /* Profile 8. */
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+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+            { 396, 399 }, /* Profile 6. */
+            { 396, 399 }, /* Profile 7. */
+            { 396, 399 }, /* Profile 8. */
+            { 392, 395 }, /* Profile 9. */
+            { 400, 403 }, /* Profile 10. */
+            { 396, 399 }, /* Profile 11. */
+            { 396, 399 }, /* Profile 12. */
+            { 400, 403 }, /* Profile 13. */
+            { 396, 399 }, /* Profile 14. */
+            { 396, 399 }, /* Profile 15. */
+            { 396, 399 }, /* Profile 16. */
+            { 392, 395 }, /* Profile 17. */
+            { 400, 403 }, /* Profile 18. */
+            { 396, 399 }, /* Profile 19. */
+            { 396, 399 }, /* Profile 20. */
+            { 400, 403 }, /* Profile 21. */
+            { 396, 399 }, /* Profile 22. */
+            { 396, 399 }, /* Profile 23. */
+            { 396, 399 }, /* Profile 24. */
+            { 392, 395 }, /* Profile 25. */
+            { 400, 403 }, /* Profile 26. */
+            { 396, 399 }, /* Profile 27. */
+            { 396, 399 }, /* Profile 28. */
+            { 400, 403 }, /* Profile 29. */
+            { 396, 399 }, /* Profile 30. */
+            { 396, 399 }, /* Profile 31. */
+            { 396, 399 }, /* Profile 32. */
+            { 392, 395 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 367 }, /* Profile 2. */
+            { 352, 367 }, /* Profile 3. */
+            { 352, 367 }, /* Profile 4. */
+            { 352, 367 }, /* Profile 5. */
+            { 352, 367 }, /* Profile 6. */
+            { 352, 367 }, /* Profile 7. */
+            { 352, 367 }, /* Profile 8. */
+            { 352, 367 }, /* Profile 9. */
+            { 352, 367 }, /* Profile 10. */
+            { 352, 367 }, /* Profile 11. */
+            { 352, 367 }, /* Profile 12. */
+            { 352, 367 }, /* Profile 13. */
+            { 352, 367 }, /* Profile 14. */
+            { 352, 367 }, /* Profile 15. */
+            { 352, 367 }, /* Profile 16. */
+            { 352, 367 }, /* Profile 17. */
+            { 352, 367 }, /* Profile 18. */
+            { 352, 367 }, /* Profile 19. */
+            { 352, 367 }, /* Profile 20. */
+            { 352, 367 }, /* Profile 21. */
+            { 352, 367 }, /* Profile 22. */
+            { 352, 367 }, /* Profile 23. */
+            { 352, 367 }, /* Profile 24. */
+            { 352, 367 }, /* Profile 25. */
+            { 352, 367 }, /* Profile 26. */
+            { 352, 367 }, /* Profile 27. */
+            { 352, 367 }, /* Profile 28. */
+            { 352, 367 }, /* Profile 29. */
+            { 352, 367 }, /* Profile 30. */
+            { 352, 367 }, /* Profile 31. */
+            { 352, 367 }, /* Profile 32. */
+            { 352, 367 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 380, 383 }, /* Profile 2. */
+            { 376, 379 }, /* Profile 3. */
+            { 376, 379 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
+            { 376, 379 }, /* Profile 6. */
+            { 376, 379 }, /* Profile 7. */
+            { 380, 383 }, /* Profile 8. */
+            { 376, 379 }, /* Profile 9. */
+            { 380, 383 }, /* Profile 10. */
+            { 376, 379 }, /* Profile 11. */
+            { 376, 379 }, /* Profile 12. */
+            { 380, 383 }, /* Profile 13. */
+            { 376, 379 }, /* Profile 14. */
+            { 376, 379 }, /* Profile 15. */
+            { 380, 383 }, /* Profile 16. */
+            { 376, 379 }, /* Profile 17. */
+            { 380, 383 }, /* Profile 18. */
+            { 376, 379 }, /* Profile 19. */
+            { 376, 379 }, /* Profile 20. */
+            { 380, 383 }, /* Profile 21. */
+            { 376, 379 }, /* Profile 22. */
+            { 376, 379 }, /* Profile 23. */
+            { 380, 383 }, /* Profile 24. */
+            { 376, 379 }, /* Profile 25. */
+            { 380, 383 }, /* Profile 26. */
+            { 376, 379 }, /* Profile 27. */
+            { 376, 379 }, /* Profile 28. */
+            { 380, 383 }, /* Profile 29. */
+            { 376, 379 }, /* Profile 30. */
+            { 376, 379 }, /* Profile 31. */
+            { 380, 383 }, /* Profile 32. */
+            { 376, 379 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 420, 423 }, /* Profile 2. */
+            { 420, 423 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+            { 420, 423 }, /* Profile 5. */
+            { 420, 423 }, /* Profile 6. */
+            { 420, 423 }, /* Profile 7. */
+            { 416, 419 }, /* Profile 8. */
+            { 416, 419 }, /* Profile 9. */
+            { 420, 423 }, /* Profile 10. */
+            { 420, 423 }, /* Profile 11. */
+            { 420, 423 }, /* Profile 12. */
+            { 420, 423 }, /* Profile 13. */
+            { 420, 423 }, /* Profile 14. */
+            { 420, 423 }, /* Profile 15. */
+            { 416, 419 }, /* Profile 16. */
+            { 416, 419 }, /* Profile 17. */
+            { 420, 423 }, /* Profile 18. */
+            { 420, 423 }, /* Profile 19. */
+            { 420, 423 }, /* Profile 20. */
+            { 420, 423 }, /* Profile 21. */
+            { 420, 423 }, /* Profile 22. */
+            { 420, 423 }, /* Profile 23. */
+            { 416, 419 }, /* Profile 24. */
+            { 416, 419 }, /* Profile 25. */
+            { 420, 423 }, /* Profile 26. */
+            { 420, 423 }, /* Profile 27. */
+            { 420, 423 }, /* Profile 28. */
+            { 420, 423 }, /* Profile 29. */
+            { 420, 423 }, /* Profile 30. */
+            { 420, 423 }, /* Profile 31. */
+            { 416, 419 }, /* Profile 32. */
+            { 416, 419 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+            { 160, 175 }, /* Profile 6. */
+            { 160, 175 }, /* Profile 7. */
+            { 128, 143 }, /* Profile 8. */
+            { 160, 175 }, /* Profile 9. */
+            { 128, 143 }, /* Profile 10. */
+            { 160, 175 }, /* Profile 11. */
+            { 160, 175 }, /* Profile 12. */
+            { 128, 143 }, /* Profile 13. */
+            { 160, 175 }, /* Profile 14. */
+            { 160, 175 }, /* Profile 15. */
+            { 128, 143 }, /* Profile 16. */
+            { 160, 175 }, /* Profile 17. */
+            { 144, 159 }, /* Profile 18. */
+            { 176, 191 }, /* Profile 19. */
+            { 176, 191 }, /* Profile 20. */
+            { 144, 159 }, /* Profile 21. */
+            { 176, 191 }, /* Profile 22. */
+            { 176, 191 }, /* Profile 23. */
+            { 144, 159 }, /* Profile 24. */
+            { 176, 191 }, /* Profile 25. */
+            { 144, 159 }, /* Profile 26. */
+            { 176, 191 }, /* Profile 27. */
+            { 176, 191 }, /* Profile 28. */
+            { 144, 159 }, /* Profile 29. */
+            { 176, 191 }, /* Profile 30. */
+            { 176, 191 }, /* Profile 31. */
+            { 144, 159 }, /* Profile 32. */
+            { 176, 191 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+            { 400, 403 }, /* Profile 6. */
+            { 400, 403 }, /* Profile 7. */
+            { 400, 403 }, /* Profile 8. */
+            { 396, 399 }, /* Profile 9. */
+            { 404, 407 }, /* Profile 10. */
+            { 400, 403 }, /* Profile 11. */
+            { 400, 403 }, /* Profile 12. */
+            { 404, 407 }, /* Profile 13. */
+            { 400, 403 }, /* Profile 14. */
+            { 400, 403 }, /* Profile 15. */
+            { 400, 403 }, /* Profile 16. */
+            { 396, 399 }, /* Profile 17. */
+            { 404, 407 }, /* Profile 18. */
+            { 400, 403 }, /* Profile 19. */
+            { 400, 403 }, /* Profile 20. */
+            { 404, 407 }, /* Profile 21. */
+            { 400, 403 }, /* Profile 22. */
+            { 400, 403 }, /* Profile 23. */
+            { 400, 403 }, /* Profile 24. */
+            { 396, 399 }, /* Profile 25. */
+            { 404, 407 }, /* Profile 26. */
+            { 400, 403 }, /* Profile 27. */
+            { 400, 403 }, /* Profile 28. */
+            { 404, 407 }, /* Profile 29. */
+            { 400, 403 }, /* Profile 30. */
+            { 400, 403 }, /* Profile 31. */
+            { 400, 403 }, /* Profile 32. */
+            { 396, 399 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 95 }, /* Profile 2. */
+            { 80, 95 }, /* Profile 3. */
+            { 80, 95 }, /* Profile 4. */
+            { 80, 95 }, /* Profile 5. */
+            { 80, 95 }, /* Profile 6. */
+            { 80, 95 }, /* Profile 7. */
+            { 80, 95 }, /* Profile 8. */
+            { 80, 95 }, /* Profile 9. */
+            { 80, 95 }, /* Profile 10. */
+            { 80, 95 }, /* Profile 11. */
+            { 80, 95 }, /* Profile 12. */
+            { 80, 95 }, /* Profile 13. */
+            { 80, 95 }, /* Profile 14. */
+            { 80, 95 }, /* Profile 15. */
+            { 80, 95 }, /* Profile 16. */
+            { 80, 95 }, /* Profile 17. */
+            { 80, 95 }, /* Profile 18. */
+            { 80, 95 }, /* Profile 19. */
+            { 80, 95 }, /* Profile 20. */
+            { 80, 95 }, /* Profile 21. */
+            { 80, 95 }, /* Profile 22. */
+            { 80, 95 }, /* Profile 23. */
+            { 80, 95 }, /* Profile 24. */
+            { 80, 95 }, /* Profile 25. */
+            { 80, 95 }, /* Profile 26. */
+            { 80, 95 }, /* Profile 27. */
+            { 80, 95 }, /* Profile 28. */
+            { 80, 95 }, /* Profile 29. */
+            { 80, 95 }, /* Profile 30. */
+            { 80, 95 }, /* Profile 31. */
+            { 80, 95 }, /* Profile 32. */
+            { 80, 95 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 412, 415 }, /* Profile 6. */
+            { 412, 415 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { 408, 411 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { 412, 415 }, /* Profile 11. */
+            { 412, 415 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { 412, 415 }, /* Profile 14. */
+            { 412, 415 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { 408, 411 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { 412, 415 }, /* Profile 19. */
+            { 412, 415 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { 412, 415 }, /* Profile 22. */
+            { 412, 415 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { 408, 411 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { 412, 415 }, /* Profile 27. */
+            { 412, 415 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 412, 415 }, /* Profile 30. */
+            { 412, 415 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { 408, 411 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 416, 419 }, /* Profile 2. */
+            { 416, 419 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+            { 416, 419 }, /* Profile 5. */
+            { 416, 419 }, /* Profile 6. */
+            { 416, 419 }, /* Profile 7. */
+            { 412, 415 }, /* Profile 8. */
+            { 412, 415 }, /* Profile 9. */
+            { 416, 419 }, /* Profile 10. */
+            { 416, 419 }, /* Profile 11. */
+            { 416, 419 }, /* Profile 12. */
+            { 416, 419 }, /* Profile 13. */
+            { 416, 419 }, /* Profile 14. */
+            { 416, 419 }, /* Profile 15. */
+            { 412, 415 }, /* Profile 16. */
+            { 412, 415 }, /* Profile 17. */
+            { 416, 419 }, /* Profile 18. */
+            { 416, 419 }, /* Profile 19. */
+            { 416, 419 }, /* Profile 20. */
+            { 416, 419 }, /* Profile 21. */
+            { 416, 419 }, /* Profile 22. */
+            { 416, 419 }, /* Profile 23. */
+            { 412, 415 }, /* Profile 24. */
+            { 412, 415 }, /* Profile 25. */
+            { 416, 419 }, /* Profile 26. */
+            { 416, 419 }, /* Profile 27. */
+            { 416, 419 }, /* Profile 28. */
+            { 416, 419 }, /* Profile 29. */
+            { 416, 419 }, /* Profile 30. */
+            { 416, 419 }, /* Profile 31. */
+            { 412, 415 }, /* Profile 32. */
+            { 412, 415 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+            { 112, 127 }, /* Profile 6. */
+            { 112, 127 }, /* Profile 7. */
+            { 112, 127 }, /* Profile 8. */
+            { 112, 127 }, /* Profile 9. */
+            { 112, 127 }, /* Profile 10. */
+            { 112, 127 }, /* Profile 11. */
+            { 112, 127 }, /* Profile 12. */
+            { 112, 127 }, /* Profile 13. */
+            { 112, 127 }, /* Profile 14. */
+            { 112, 127 }, /* Profile 15. */
+            { 112, 127 }, /* Profile 16. */
+            { 112, 127 }, /* Profile 17. */
+            { 112, 127 }, /* Profile 18. */
+            { 112, 127 }, /* Profile 19. */
+            { 112, 127 }, /* Profile 20. */
+            { 112, 127 }, /* Profile 21. */
+            { 112, 127 }, /* Profile 22. */
+            { 112, 127 }, /* Profile 23. */
+            { 112, 127 }, /* Profile 24. */
+            { 112, 127 }, /* Profile 25. */
+            { 112, 127 }, /* Profile 26. */
+            { 112, 127 }, /* Profile 27. */
+            { 112, 127 }, /* Profile 28. */
+            { 112, 127 }, /* Profile 29. */
+            { 112, 127 }, /* Profile 30. */
+            { 112, 127 }, /* Profile 31. */
+            { 112, 127 }, /* Profile 32. */
+            { 112, 127 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
+        .fid = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 372, 375 }, /* Profile 2. */
+            { 368, 371 }, /* Profile 3. */
+            { 368, 371 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+            { 368, 371 }, /* Profile 6. */
+            { 368, 371 }, /* Profile 7. */
+            { 372, 375 }, /* Profile 8. */
+            { 368, 371 }, /* Profile 9. */
+            { 372, 375 }, /* Profile 10. */
+            { 368, 371 }, /* Profile 11. */
+            { 368, 371 }, /* Profile 12. */
+            { 372, 375 }, /* Profile 13. */
+            { 368, 371 }, /* Profile 14. */
+            { 368, 371 }, /* Profile 15. */
+            { 372, 375 }, /* Profile 16. */
+            { 368, 371 }, /* Profile 17. */
+            { 372, 375 }, /* Profile 18. */
+            { 368, 371 }, /* Profile 19. */
+            { 368, 371 }, /* Profile 20. */
+            { 372, 375 }, /* Profile 21. */
+            { 368, 371 }, /* Profile 22. */
+            { 368, 371 }, /* Profile 23. */
+            { 372, 375 }, /* Profile 24. */
+            { 368, 371 }, /* Profile 25. */
+            { 372, 375 }, /* Profile 26. */
+            { 368, 371 }, /* Profile 27. */
+            { 368, 371 }, /* Profile 28. */
+            { 372, 375 }, /* Profile 29. */
+            { 368, 371 }, /* Profile 30. */
+            { 368, 371 }, /* Profile 31. */
+            { 372, 375 }, /* Profile 32. */
+            { 368, 371 }, /* Profile 33. */
+        },
+        .profile_cnt = 34,
+    },
+};
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_field_data,
+    .profile_bmp_cnt = 2,
+    .profile_bmp[0] = 0xfffffffc,
+    .profile_bmp[1] = 0x3,
+
+};
+
+static shr_enum_map_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_reason_names[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_arp_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_arp_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_arp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_arp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_authen_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_authen_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_authen_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_authen_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_bfd_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_bfd_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_bfd_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_bfd_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_cntag_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_cntag_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_cntag_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_cntag_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_cpu_composites_0_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_cpu_composites_0_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_cpu_composites_0_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_cpu_composites_1_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_cpu_composites_1_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_cpu_composites_1_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_dest_option_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_dest_option_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_dest_option_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_dest_option_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_ep_nih_header_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_ep_nih_header_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_ep_nih_header_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_erspan3_fixed_hdr_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_erspan3_fixed_hdr_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_erspan3_subhdr_5_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_erspan3_subhdr_5_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_esp_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_esp_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_esp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_esp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_ethertype_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_ethertype_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_ethertype_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_ethertype_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_frag_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_frag_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_frag_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_frag_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_gbp_ethernet_shim_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_get,
+    bcmpkt_gbp_ethernet_shim_t_flags_get,
+    bcmpkt_gbp_ethernet_shim_t_reserved_get,
+    bcmpkt_gbp_ethernet_shim_t_sid_get,
+    bcmpkt_gbp_ethernet_shim_t_subtype_get,
+    bcmpkt_gbp_ethernet_shim_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_gbp_ethernet_shim_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_set,
+    bcmpkt_gbp_ethernet_shim_t_flags_set,
+    bcmpkt_gbp_ethernet_shim_t_reserved_set,
+    bcmpkt_gbp_ethernet_shim_t_sid_set,
+    bcmpkt_gbp_ethernet_shim_t_subtype_set,
+    bcmpkt_gbp_ethernet_shim_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_gbp_ethernet_shim_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_gbp_ethernet_shim_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_gbp_ethernet_shim_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_generic_loopback_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_src_subport_num_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_generic_loopback_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_src_subport_num_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_generic_loopback_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_gpe_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_gpe_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_gpe_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_gpe_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_gre_chksum_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_gre_chksum_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_gre_chksum_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_gre_key_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_gre_key_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_gre_key_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_gre_key_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_gre_rout_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_gre_rout_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_gre_rout_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_gre_rout_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_gre_seq_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_gre_seq_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_gre_seq_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_gre_seq_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_gre_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_gre_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_gre_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_gre_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 4, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 4, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 6, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 6, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 15, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 15, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 2, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_hg3_base_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_get,
+    bcmpkt_hg3_base_t_cng_get,
+    bcmpkt_hg3_base_t_entropy_get,
+    bcmpkt_hg3_base_t_ext_hdr_present_get,
+    bcmpkt_hg3_base_t_hg3_reserved_get,
+    bcmpkt_hg3_base_t_l3_routed_get,
+    bcmpkt_hg3_base_t_mirror_copy_get,
+    bcmpkt_hg3_base_t_reserved_etype_get,
+    bcmpkt_hg3_base_t_system_destination_get,
+    bcmpkt_hg3_base_t_system_destination_type_get,
+    bcmpkt_hg3_base_t_system_source_get,
+    bcmpkt_hg3_base_t_tc_get,
+    bcmpkt_hg3_base_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_hg3_base_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_set,
+    bcmpkt_hg3_base_t_cng_set,
+    bcmpkt_hg3_base_t_entropy_set,
+    bcmpkt_hg3_base_t_ext_hdr_present_set,
+    bcmpkt_hg3_base_t_hg3_reserved_set,
+    bcmpkt_hg3_base_t_l3_routed_set,
+    bcmpkt_hg3_base_t_mirror_copy_set,
+    bcmpkt_hg3_base_t_reserved_etype_set,
+    bcmpkt_hg3_base_t_system_destination_set,
+    bcmpkt_hg3_base_t_system_destination_type_set,
+    bcmpkt_hg3_base_t_system_source_set,
+    bcmpkt_hg3_base_t_tc_set,
+    bcmpkt_hg3_base_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_hg3_base_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_hg3_base_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_hg3_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_hg3_extension_0_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_get,
+    bcmpkt_hg3_extension_0_t_class_id_msb_get,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
+    bcmpkt_hg3_extension_0_t_flags_get,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
+    bcmpkt_hg3_extension_0_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_hg3_extension_0_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_set,
+    bcmpkt_hg3_extension_0_t_class_id_msb_set,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
+    bcmpkt_hg3_extension_0_t_flags_set,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
+    bcmpkt_hg3_extension_0_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_hg3_extension_0_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_hg3_extension_0_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_hg3_extension_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_hop_by_hop_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_hop_by_hop_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_hop_by_hop_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_icmp_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_icmp_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_icmp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_icmp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_ifa_header_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_ifa_header_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_ifa_header_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_ifa_header_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_a_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_a_t_cn_get,
+    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_metadata_a_t_lns_device_id_get,
+    bcmpkt_ifa_metadata_a_t_port_speed_get,
+    bcmpkt_ifa_metadata_a_t_queue_id_get,
+    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_a_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_a_t_cn_set,
+    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_metadata_a_t_lns_device_id_set,
+    bcmpkt_ifa_metadata_a_t_port_speed_set,
+    bcmpkt_ifa_metadata_a_t_queue_id_set,
+    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_a_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_a_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_b_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_b_t_egress_port_id_get,
+    bcmpkt_ifa_metadata_b_t_ingress_port_id_get,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_0_get,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_1_get,
+    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get,
+    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get,
+    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_b_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_b_t_egress_port_id_set,
+    bcmpkt_ifa_metadata_b_t_ingress_port_id_set,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_0_set,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_1_set,
+    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set,
+    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set,
+    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_b_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_b_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_base_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_base_t_action_vector_get,
+    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_base_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_base_t_action_vector_set,
+    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_base_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_base_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_igmp_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_igmp_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_igmp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_igmp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_ioam_e2e_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_get,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_get,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_get,
+    bcmpkt_ioam_e2e_t_namespace_id_get,
+    bcmpkt_ioam_e2e_t_next_protocol_get,
+    bcmpkt_ioam_e2e_t_reserved_get,
+    bcmpkt_ioam_e2e_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_ioam_e2e_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_set,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_set,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_set,
+    bcmpkt_ioam_e2e_t_namespace_id_set,
+    bcmpkt_ioam_e2e_t_next_protocol_set,
+    bcmpkt_ioam_e2e_t_reserved_set,
+    bcmpkt_ioam_e2e_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_ioam_e2e_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_ioam_e2e_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_ioam_e2e_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_ipfix_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_ipfix_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_ipfix_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_ipfix_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_ipv4_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_ipv4_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_ipv4_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_ipv4_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_ipv6_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_ipv6_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_ipv6_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_ipv6_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_l2_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_l2_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_l2_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_l2_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_mirror_erspan_sn_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_mirror_erspan_sn_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_mirror_transport_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_mirror_transport_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_mirror_transport_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_mpls_ach_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_mpls_ach_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_mpls_ach_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_mpls_bv_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_mpls_bv_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_mpls_bv_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_mpls_cw_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_mpls_cw_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_mpls_cw_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_mpls_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_mpls_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_mpls_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_mpls_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_p_1588_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_p_1588_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_p_1588_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_p_1588_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_pim_t_hdr_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_4_5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_4_5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_6_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_6_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_pim_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_FID_COUNT] = {
+    bcmpkt_pim_t_hdr_bytes_0_1_get,
+    bcmpkt_pim_t_hdr_bytes_2_3_get,
+    bcmpkt_pim_t_hdr_bytes_4_5_get,
+    bcmpkt_pim_t_hdr_bytes_6_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_pim_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_FID_COUNT] = {
+    bcmpkt_pim_t_hdr_bytes_0_1_set,
+    bcmpkt_pim_t_hdr_bytes_2_3_set,
+    bcmpkt_pim_t_hdr_bytes_4_5_set,
+    bcmpkt_pim_t_hdr_bytes_6_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_pim_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_pim_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PIM_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_pim_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_prog_ext_hdr_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_prog_ext_hdr_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_prog_ext_hdr_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_psamp_0_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_psamp_0_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_psamp_0_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_psamp_0_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_psamp_1_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_psamp_1_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_psamp_1_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_psamp_1_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_0_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_0_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_3_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_3_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_rarp_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_rarp_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_rarp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_rarp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_routing_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_routing_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_routing_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_routing_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_rspan_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_rspan_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_rspan_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_rspan_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_sflow_shim_0_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_sflow_shim_0_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_sflow_shim_0_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_sflow_shim_1_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_sflow_shim_1_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_sflow_shim_1_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_sflow_shim_2_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_sflow_shim_2_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_sflow_shim_2_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_snap_llc_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_snap_llc_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_snap_llc_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_snap_llc_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_tcp_first_4bytes_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_tcp_first_4bytes_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_tcp_last_16bytes_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_tcp_last_16bytes_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_udp_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_udp_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_udp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_udp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_unknown_l3_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_unknown_l3_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_unknown_l3_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_unknown_l4_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_unknown_l4_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_unknown_l4_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_unknown_l5_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_unknown_l5_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_unknown_l5_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_vlan_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_vlan_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_vlan_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_vlan_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_vxlan_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_vxlan_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_vxlan_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_vxlan_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_32_5_0_wesp_t_fget[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_32_5_0_wesp_t_fset[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_32_5_0_wesp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_32_5_0_wesp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_32_5_0_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56690_a0_dna_6_5_32_5_0_flexhdr_info_list[BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_arp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_authen_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_bfd_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_cntag_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_dest_option_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_esp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_ethertype_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_frag_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_gbp_ethernet_shim_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_gbp_ethernet_shim_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_gbp_ethernet_shim_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_generic_loopback_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_gpe_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_gre_chksum_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_gre_key_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_gre_rout_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_gre_seq_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_gre_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_hg3_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_hg3_base_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_hg3_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_hg3_extension_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_hg3_extension_0_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_hg3_extension_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_icmp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_ifa_header_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_a_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_b_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_base_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_ifa_metadata_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_igmp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_ioam_e2e_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_ioam_e2e_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_ioam_e2e_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_ipfix_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_ipv4_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_ipv6_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_l2_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_mirror_transport_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_mpls_ach_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_mpls_bv_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_mpls_cw_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_mpls_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_p_1588_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_pim_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_pim_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_pim_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_psamp_0_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_psamp_1_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_rarp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_routing_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_rspan_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_snap_llc_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_udp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_unknown_l3_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_unknown_l4_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_unknown_l5_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_vlan_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_vxlan_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_32_5_0_wesp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_32_5_0_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56690_a0_dna_6_5_32_5_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56690_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56690_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56690_a0_dna_6_5_32_5_0_flexhdr_id_map[] = {
+    BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56690_a0_dna_6_5_32_5_0_flexhdr_map_get(void)
+{
+    return bcm56690_a0_dna_6_5_32_5_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56690_a0_dna_6_5_32_5_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56690_A0_DNA_6_5_32_5_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56690_a0_dna_6_5_32_5_0_flexhdr_info_list[hid];
+}
+
+int bcm56690_a0_dna_6_5_32_5_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    14,
+    21,
+    22,
+    64,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c
deleted file mode 100644
index 579afded471..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c
+++ /dev/null
@@ -1,1136 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_cna_6_5_31_3_0_sf_match_id_info.yml
- * for device bcm56780_a0 and variant cna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h>
-
-
-static bcmpkt_rxpmd_match_id_db_t
-bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT] = {
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 37,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
-        .name         = "EGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 9,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
-        .name         = "INGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-};
-
-static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info = {
-    .num_entries = 77,
-    .db = bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db
-};
-bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info_get(void) {
-    return &bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info;
-}
-
-static shr_enum_map_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info = {
-    .num_entries = 77,
-    .map = bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map
-};
-
-bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info_get(void) {
-    return &bcm56780_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info;
-}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_pkt_flexhdr.c
deleted file mode 100644
index 88676df6b79..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_pkt_flexhdr.c
+++ /dev/null
@@ -1,3923 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml
- * for device bcm56780_a0 and variant cna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#include <sal/sal_types.h>
-#include <shr/shr_error.h>
-#include <bcmpkt/bcmpkt_flexhdr.h>
-#include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_31_3_0/bcm56780_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h>
-
-#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
-#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
-#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
-#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
-
-static void bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
-{
-    uint32_t *reason = data + 0;
-
-    if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
-    }
-    if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
-    }
-    if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
-    }
-    if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
-    }
-    if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
-    }
-    if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
-    }
-    if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
-    }
-    if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
-    }
-    if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
-    }
-    if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
-    }
-    if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
-    }
-    if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
-    }
-    if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
-    }
-    if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
-    }
-}
-
-static void bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
-{
-    uint32_t *reason = data + 0;
-
-    reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
-        reason[13] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
-        reason[13] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
-        reason[13] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
-        reason[13] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
-        reason[13] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
-        reason[13] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
-        reason[13] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
-        reason[13] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
-        reason[13] |= (0x1 << 16);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
-        reason[13] |= (0x1 << 17);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
-        reason[13] |= (0x1 << 18);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
-        reason[13] |= (0x1 << 19);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
-        reason[13] |= (0x1 << 23);
-    }
-    reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
-        reason[12] |= (0x1 << 15);
-    }
-}
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_field_data[] = {
-    {
-        .name = "DROP_CODE_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 48, 63 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 48, 63 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "DVP_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 336, 351 }, /* Profile 2. */
-            { 336, 351 }, /* Profile 3. */
-            { 336, 351 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 128, 135 }, /* Profile 2. */
-            { 128, 135 }, /* Profile 3. */
-            { 128, 135 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 416, 419 }, /* Profile 2. */
-            { 416, 419 }, /* Profile 3. */
-            { 416, 419 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 160, 175 }, /* Profile 2. */
-            { 160, 175 }, /* Profile 3. */
-            { 160, 175 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EP_NIH_HDR_DROP_CODE_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { 48, 63 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 396, 399 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
-            { 396, 399 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 272, 287 }, /* Profile 2. */
-            { 272, 287 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "EP_NIH_HDR_TIMESTAMP_31_16",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 288, 303 }, /* Profile 2. */
-            { 288, 303 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "ERSPAN3_GBP_SID_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 144, 159 }, /* Profile 2. */
-            { 144, 159 }, /* Profile 3. */
-            { 144, 159 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 0, 15 }, /* Profile 2. */
-            { 0, 15 }, /* Profile 3. */
-            { 0, 15 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_31_16",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 16, 31 }, /* Profile 2. */
-            { 16, 31 }, /* Profile 3. */
-            { 16, 31 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 32, 47 }, /* Profile 2. */
-            { 32, 47 }, /* Profile 3. */
-            { 32, 47 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 320, 335 }, /* Profile 2. */
-            { 320, 335 }, /* Profile 3. */
-            { 320, 335 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "ING_TIMESTAMP_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 272, 287 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "ING_TIMESTAMP_31_16",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 288, 303 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "INGRESS_PP_PORT_7_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 256, 263 }, /* Profile 2. */
-            { 256, 263 }, /* Profile 3. */
-            { 256, 263 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 176, 191 }, /* Profile 2. */
-            { 176, 191 }, /* Profile 3. */
-            { 176, 191 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 404, 407 }, /* Profile 2. */
-            { 404, 407 }, /* Profile 3. */
-            { 404, 407 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "INT_PRI_3_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 384, 387 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L2_IIF_10_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 304, 314 }, /* Profile 2. */
-            { 304, 314 }, /* Profile 3. */
-            { 304, 314 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L2_OIF_10_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 224, 234 }, /* Profile 2. */
-            { 224, 234 }, /* Profile 3. */
-            { 224, 234 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L2_TUNNEL_SVP_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 192, 207 }, /* Profile 2. */
-            { 192, 207 }, /* Profile 3. */
-            { 192, 207 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L3_IIF_13_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 352, 365 }, /* Profile 2. */
-            { 352, 365 }, /* Profile 3. */
-            { 352, 365 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L3_OIF_1_13_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 240, 253 }, /* Profile 2. */
-            { 240, 253 }, /* Profile 3. */
-            { 240, 253 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 80, 94 }, /* Profile 2. */
-            { 80, 94 }, /* Profile 3. */
-            { 80, 94 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "NHOP_INDEX_1_14_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 368, 382 }, /* Profile 2. */
-            { 368, 382 }, /* Profile 3. */
-            { 368, 382 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 64, 79 }, /* Profile 2. */
-            { 64, 79 }, /* Profile 3. */
-            { 64, 79 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 112, 127 }, /* Profile 2. */
-            { 112, 127 }, /* Profile 3. */
-            { 112, 127 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 412, 415 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 96, 111 }, /* Profile 2. */
-            { 96, 111 }, /* Profile 3. */
-            { 96, 111 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "TAG_ACTION_CTRL_1_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 408, 409 }, /* Profile 2. */
-            { 408, 409 }, /* Profile 3. */
-            { 408, 409 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "VFI_15_0",
-        .fid = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 208, 223 }, /* Profile 2. */
-            { 208, 223 }, /* Profile 3. */
-            { 208, 223 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-};
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_field_data,
-    .profile_bmp_cnt = 1,
-    .profile_bmp[0] = 0x1c,
-
-};
-
-static shr_enum_map_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_names[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_reasons_info_t bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_names,
-    .reason_encode = bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reason_decode,
-};
-
-
-static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_arp_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_get,
-    bcmpkt_arp_t_hardware_type_get,
-    bcmpkt_arp_t_operation_get,
-    bcmpkt_arp_t_prot_addr_len_get,
-    bcmpkt_arp_t_protocol_type_get,
-    bcmpkt_arp_t_sender_ha_get,
-    bcmpkt_arp_t_sender_ip_get,
-    bcmpkt_arp_t_target_ha_get,
-    bcmpkt_arp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_arp_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_set,
-    bcmpkt_arp_t_hardware_type_set,
-    bcmpkt_arp_t_operation_set,
-    bcmpkt_arp_t_prot_addr_len_set,
-    bcmpkt_arp_t_protocol_type_set,
-    bcmpkt_arp_t_sender_ha_set,
-    bcmpkt_arp_t_sender_ip_set,
-    bcmpkt_arp_t_target_ha_set,
-    bcmpkt_arp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_arp_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_arp_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_arp_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_get,
-    bcmpkt_cpu_composites_0_t_dma_cont1_get,
-    bcmpkt_cpu_composites_0_t_dma_cont2_get,
-    bcmpkt_cpu_composites_0_t_dma_cont3_get,
-    bcmpkt_cpu_composites_0_t_dma_cont4_get,
-    bcmpkt_cpu_composites_0_t_dma_cont5_get,
-    bcmpkt_cpu_composites_0_t_dma_cont6_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_set,
-    bcmpkt_cpu_composites_0_t_dma_cont1_set,
-    bcmpkt_cpu_composites_0_t_dma_cont2_set,
-    bcmpkt_cpu_composites_0_t_dma_cont3_set,
-    bcmpkt_cpu_composites_0_t_dma_cont4_set,
-    bcmpkt_cpu_composites_0_t_dma_cont5_set,
-    bcmpkt_cpu_composites_0_t_dma_cont6_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_get,
-    bcmpkt_cpu_composites_1_t_dma_cont11_get,
-    bcmpkt_cpu_composites_1_t_dma_cont12_get,
-    bcmpkt_cpu_composites_1_t_dma_cont13_get,
-    bcmpkt_cpu_composites_1_t_dma_cont14_get,
-    bcmpkt_cpu_composites_1_t_dma_cont15_get,
-    bcmpkt_cpu_composites_1_t_dma_cont16_get,
-    bcmpkt_cpu_composites_1_t_dma_cont17_get,
-    bcmpkt_cpu_composites_1_t_dma_cont7_get,
-    bcmpkt_cpu_composites_1_t_dma_cont8_get,
-    bcmpkt_cpu_composites_1_t_dma_cont9_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_set,
-    bcmpkt_cpu_composites_1_t_dma_cont11_set,
-    bcmpkt_cpu_composites_1_t_dma_cont12_set,
-    bcmpkt_cpu_composites_1_t_dma_cont13_set,
-    bcmpkt_cpu_composites_1_t_dma_cont14_set,
-    bcmpkt_cpu_composites_1_t_dma_cont15_set,
-    bcmpkt_cpu_composites_1_t_dma_cont16_set,
-    bcmpkt_cpu_composites_1_t_dma_cont17_set,
-    bcmpkt_cpu_composites_1_t_dma_cont7_set,
-    bcmpkt_cpu_composites_1_t_dma_cont8_set,
-    bcmpkt_cpu_composites_1_t_dma_cont9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_get,
-    bcmpkt_ep_nih_header_t_header_type_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
-    bcmpkt_ep_nih_header_t_opaque_object_a_get,
-    bcmpkt_ep_nih_header_t_opaque_object_b_get,
-    bcmpkt_ep_nih_header_t_opaque_object_c_get,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
-    bcmpkt_ep_nih_header_t_reserved_0_get,
-    bcmpkt_ep_nih_header_t_start_get,
-    bcmpkt_ep_nih_header_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_set,
-    bcmpkt_ep_nih_header_t_header_type_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
-    bcmpkt_ep_nih_header_t_opaque_object_a_set,
-    bcmpkt_ep_nih_header_t_opaque_object_b_set,
-    bcmpkt_ep_nih_header_t_opaque_object_c_set,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
-    bcmpkt_ep_nih_header_t_reserved_0_set,
-    bcmpkt_ep_nih_header_t_start_set,
-    bcmpkt_ep_nih_header_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 11, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 11, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 10, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 10, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_get,
-    bcmpkt_erspan3_fixed_hdr_t_cos_get,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
-    bcmpkt_erspan3_fixed_hdr_t_t_get,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
-    bcmpkt_erspan3_fixed_hdr_t_ver_get,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_set,
-    bcmpkt_erspan3_fixed_hdr_t_cos_set,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
-    bcmpkt_erspan3_fixed_hdr_t_t_set,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
-    bcmpkt_erspan3_fixed_hdr_t_ver_set,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
-    bcmpkt_erspan3_subhdr_5_t_port_id_get,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
-    bcmpkt_erspan3_subhdr_5_t_port_id_set,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_data,
-};
-
-
-static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_ethertype_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_ethertype_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_ethertype_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_ethertype_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_ethertype_t_field_data,
-};
-
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 4, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 4, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_get,
-    bcmpkt_generic_loopback_t_destination_type_get,
-    bcmpkt_generic_loopback_t_entropy_obj_get,
-    bcmpkt_generic_loopback_t_flags_get,
-    bcmpkt_generic_loopback_t_header_type_get,
-    bcmpkt_generic_loopback_t_input_priority_get,
-    bcmpkt_generic_loopback_t_interface_ctrl_get,
-    bcmpkt_generic_loopback_t_interface_obj_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
-    bcmpkt_generic_loopback_t_qos_obj_get,
-    bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_reserved_2_get,
-    bcmpkt_generic_loopback_t_source_system_port_get,
-    bcmpkt_generic_loopback_t_start_byte_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_set,
-    bcmpkt_generic_loopback_t_destination_type_set,
-    bcmpkt_generic_loopback_t_entropy_obj_set,
-    bcmpkt_generic_loopback_t_flags_set,
-    bcmpkt_generic_loopback_t_header_type_set,
-    bcmpkt_generic_loopback_t_input_priority_set,
-    bcmpkt_generic_loopback_t_interface_ctrl_set,
-    bcmpkt_generic_loopback_t_interface_obj_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
-    bcmpkt_generic_loopback_t_qos_obj_set,
-    bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_reserved_2_set,
-    bcmpkt_generic_loopback_t_source_system_port_set,
-    bcmpkt_generic_loopback_t_start_byte_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_field_data,
-};
-
-
-static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_icmp_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_get,
-    bcmpkt_icmp_t_code_get,
-    bcmpkt_icmp_t_icmp_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_icmp_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_set,
-    bcmpkt_icmp_t_code_set,
-    bcmpkt_icmp_t_icmp_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_icmp_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_icmp_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_icmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_ipfix_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_get,
-    bcmpkt_ipfix_t_length_get,
-    bcmpkt_ipfix_t_obs_domain_id_get,
-    bcmpkt_ipfix_t_sequence_num_get,
-    bcmpkt_ipfix_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_ipfix_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_set,
-    bcmpkt_ipfix_t_length_set,
-    bcmpkt_ipfix_t_obs_domain_id_set,
-    bcmpkt_ipfix_t_sequence_num_set,
-    bcmpkt_ipfix_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_ipfix_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_ipfix_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_ipfix_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_ipv4_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_get,
-    bcmpkt_ipv4_t_flags_frag_offset_get,
-    bcmpkt_ipv4_t_hdr_checksum_get,
-    bcmpkt_ipv4_t_id_get,
-    bcmpkt_ipv4_t_option_get,
-    bcmpkt_ipv4_t_protocol_get,
-    bcmpkt_ipv4_t_sa_get,
-    bcmpkt_ipv4_t_tos_get,
-    bcmpkt_ipv4_t_total_length_get,
-    bcmpkt_ipv4_t_ttl_get,
-    bcmpkt_ipv4_t_version_hdr_len_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_ipv4_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_set,
-    bcmpkt_ipv4_t_flags_frag_offset_set,
-    bcmpkt_ipv4_t_hdr_checksum_set,
-    bcmpkt_ipv4_t_id_set,
-    bcmpkt_ipv4_t_option_set,
-    bcmpkt_ipv4_t_protocol_set,
-    bcmpkt_ipv4_t_sa_set,
-    bcmpkt_ipv4_t_tos_set,
-    bcmpkt_ipv4_t_total_length_set,
-    bcmpkt_ipv4_t_ttl_set,
-    bcmpkt_ipv4_t_version_hdr_len_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_ipv4_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_ipv4_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_ipv4_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_ipv6_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_get,
-    bcmpkt_ipv6_t_flow_label_get,
-    bcmpkt_ipv6_t_hop_limit_get,
-    bcmpkt_ipv6_t_next_header_get,
-    bcmpkt_ipv6_t_payload_length_get,
-    bcmpkt_ipv6_t_sa_get,
-    bcmpkt_ipv6_t_traffic_class_get,
-    bcmpkt_ipv6_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_ipv6_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_set,
-    bcmpkt_ipv6_t_flow_label_set,
-    bcmpkt_ipv6_t_hop_limit_set,
-    bcmpkt_ipv6_t_next_header_set,
-    bcmpkt_ipv6_t_payload_length_set,
-    bcmpkt_ipv6_t_sa_set,
-    bcmpkt_ipv6_t_traffic_class_set,
-    bcmpkt_ipv6_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_ipv6_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_ipv6_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_ipv6_t_field_data,
-};
-
-
-static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_l2_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_get,
-    bcmpkt_l2_t_macsa_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_l2_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_set,
-    bcmpkt_l2_t_macsa_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_l2_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_l2_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_l2_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_rarp_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_get,
-    bcmpkt_rarp_t_hardware_type_get,
-    bcmpkt_rarp_t_operation_get,
-    bcmpkt_rarp_t_prot_addr_len_get,
-    bcmpkt_rarp_t_protocol_type_get,
-    bcmpkt_rarp_t_sender_ha_get,
-    bcmpkt_rarp_t_sender_ip_get,
-    bcmpkt_rarp_t_target_ha_get,
-    bcmpkt_rarp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_rarp_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_set,
-    bcmpkt_rarp_t_hardware_type_set,
-    bcmpkt_rarp_t_operation_set,
-    bcmpkt_rarp_t_prot_addr_len_set,
-    bcmpkt_rarp_t_protocol_type_set,
-    bcmpkt_rarp_t_sender_ha_set,
-    bcmpkt_rarp_t_sender_ip_set,
-    bcmpkt_rarp_t_target_ha_set,
-    bcmpkt_rarp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_rarp_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_rarp_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_rarp_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_get,
-    bcmpkt_tcp_first_4bytes_t_src_port_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_set,
-    bcmpkt_tcp_first_4bytes_t_src_port_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_get,
-    bcmpkt_tcp_last_16bytes_t_checksum_get,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
-    bcmpkt_tcp_last_16bytes_t_seq_num_get,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
-    bcmpkt_tcp_last_16bytes_t_win_size_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_set,
-    bcmpkt_tcp_last_16bytes_t_checksum_set,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
-    bcmpkt_tcp_last_16bytes_t_seq_num_set,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
-    bcmpkt_tcp_last_16bytes_t_win_size_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_udp_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_get,
-    bcmpkt_udp_t_dst_port_get,
-    bcmpkt_udp_t_src_port_get,
-    bcmpkt_udp_t_udp_length_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_udp_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_set,
-    bcmpkt_udp_t_dst_port_set,
-    bcmpkt_udp_t_src_port_set,
-    bcmpkt_udp_t_udp_length_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_udp_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_udp_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_udp_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_field_data,
-};
-
-
-static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_vlan_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_get,
-    bcmpkt_vlan_t_pcp_get,
-    bcmpkt_vlan_t_tpid_get,
-    bcmpkt_vlan_t_vid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_vlan_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_set,
-    bcmpkt_vlan_t_pcp_set,
-    bcmpkt_vlan_t_tpid_set,
-    bcmpkt_vlan_t_vid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_vlan_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_vlan_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_vlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_31_3_0_vxlan_t_fget[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_get,
-    bcmpkt_vxlan_t_reserved2_get,
-    bcmpkt_vxlan_t_vn_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_31_3_0_vxlan_t_fset[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_set,
-    bcmpkt_vxlan_t_reserved2_set,
-    bcmpkt_vxlan_t_vn_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_31_3_0_vxlan_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_31_3_0_vxlan_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_31_3_0_vxlan_t_field_data,
-};
-
-static bcmpkt_flex_pmd_info_t bcm56780_a0_cna_6_5_31_3_0_flexhdr_info_list[BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT] = {
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_arp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_arp_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_arp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_cpu_composites_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_ep_nih_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_ethertype_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_ethertype_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_ethertype_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_generic_loopback_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_icmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_icmp_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_icmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_ipfix_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_ipfix_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_ipfix_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_ipv4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_ipv4_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_ipv4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_ipv6_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_ipv6_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_ipv6_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_l2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_l2_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_l2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_mirror_transport_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_rarp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_rarp_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_rarp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_udp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_udp_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_udp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_unknown_l3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_unknown_l4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_unknown_l5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_vlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_vlan_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_vlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_vxlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_31_3_0_vxlan_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_31_3_0_vxlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_field_info,
-        .reasons_info = &bcm56780_a0_cna_6_5_31_3_0_rxpmd_flex_reasons_info,
-        .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
-        .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
-    },
-};
-
-static shr_enum_map_t bcm56780_a0_cna_6_5_31_3_0_flexhdr_id_map[] = {
-    BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
-};
-
-shr_enum_map_t * bcm56780_a0_cna_6_5_31_3_0_flexhdr_map_get(void)
-{
-    return bcm56780_a0_cna_6_5_31_3_0_flexhdr_id_map;
-}
-
-bcmpkt_flex_pmd_info_t * bcm56780_a0_cna_6_5_31_3_0_flex_pmd_info_get(uint32_t hid)
-{
-    if (hid >= BCM56780_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT) {
-        return NULL;
-    }
-
-    return &bcm56780_a0_cna_6_5_31_3_0_flexhdr_info_list[hid];
-}
-
-int bcm56780_a0_cna_6_5_31_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
-    7,
-    -1,
-    -1,
-    27,
-};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 00000000000..9bc67525023
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,1178 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_cna_6_5_32_3_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant cna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 16,
+        .match_minbit = 13,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 16,
+        .match_minbit = 13,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xf,
+        .match_maxbit = 16,
+        .match_minbit = 13,
+        .maxbit       = 3,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 38,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 16,
+        .match_minbit = 13,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SVTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 16,
+        .match_minbit = 13,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 5,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 5,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xf,
+        .match_maxbit = 5,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 10,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 5,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 5,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 16,
+        .match_minbit = 13,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 16,
+        .pminbit      = 13,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 16,
+        .match_minbit = 13,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 16,
+        .pminbit      = 13,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xf,
+        .match_maxbit = 16,
+        .match_minbit = 13,
+        .maxbit       = 3,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 16,
+        .pminbit      = 13,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 16,
+        .match_minbit = 13,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 16,
+        .pminbit      = 13,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 17,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 17,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 5,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 5,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 5,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 5,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xf,
+        .match_maxbit = 5,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 5,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 5,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 5,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SVTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 5,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 5,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 12,
+        .match_minbit = 6,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 6,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info = {
+    .num_entries = 80,
+    .db = bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info = {
+    .num_entries = 80,
+    .map = bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_pkt_flexhdr.c
new file mode 100644
index 00000000000..7edcb34ae0e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_pkt_flexhdr.c
@@ -0,0 +1,3902 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56780_a0 and variant cna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 367 }, /* Profile 2. */
+            { 352, 367 }, /* Profile 3. */
+            { 352, 367 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 151 }, /* Profile 2. */
+            { 144, 151 }, /* Profile 3. */
+            { 144, 151 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 436, 439 }, /* Profile 2. */
+            { 436, 439 }, /* Profile 3. */
+            { 436, 439 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 191 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EP_NIH_HDR_DROP_CODE_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 416, 419 }, /* Profile 2. */
+            { 416, 419 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_31_16",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 319 }, /* Profile 2. */
+            { 304, 319 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "ERSPAN3_GBP_SID_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 175 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 15 }, /* Profile 2. */
+            { 0, 15 }, /* Profile 3. */
+            { 0, 15 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_16",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 16, 31 }, /* Profile 2. */
+            { 16, 31 }, /* Profile 3. */
+            { 16, 31 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 336, 351 }, /* Profile 3. */
+            { 336, 351 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 399 }, /* Profile 2. */
+            { 384, 399 }, /* Profile 3. */
+            { 384, 399 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "IFP_TS_CONTROL_ACTION_3_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ING_TIMESTAMP_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_16",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 304, 319 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INGRESS_PP_PORT_7_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 279 }, /* Profile 2. */
+            { 272, 279 }, /* Profile 3. */
+            { 272, 279 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 207 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 424, 427 }, /* Profile 2. */
+            { 424, 427 }, /* Profile 3. */
+            { 424, 427 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 330 }, /* Profile 2. */
+            { 320, 330 }, /* Profile 3. */
+            { 320, 330 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 250 }, /* Profile 2. */
+            { 240, 250 }, /* Profile 3. */
+            { 240, 250 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 381 }, /* Profile 2. */
+            { 368, 381 }, /* Profile 3. */
+            { 368, 381 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 269 }, /* Profile 2. */
+            { 256, 269 }, /* Profile 3. */
+            { 256, 269 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 94 }, /* Profile 2. */
+            { 80, 94 }, /* Profile 3. */
+            { 80, 94 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "NHOP_INDEX_1_14_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 110 }, /* Profile 2. */
+            { 96, 110 }, /* Profile 3. */
+            { 96, 110 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 79 }, /* Profile 2. */
+            { 64, 79 }, /* Profile 3. */
+            { 64, 79 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 420, 423 }, /* Profile 2. */
+            { 420, 423 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 223 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 432, 435 }, /* Profile 2. */
+            { 432, 435 }, /* Profile 3. */
+            { 432, 435 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "TAG_ACTION_CTRL_1_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 401 }, /* Profile 2. */
+            { 400, 401 }, /* Profile 3. */
+            { 400, 401 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 428, 431 }, /* Profile 2. */
+            { 428, 431 }, /* Profile 3. */
+            { 428, 431 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 239 }, /* Profile 2. */
+            { 224, 239 }, /* Profile 3. */
+            { 224, 239 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+};
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_field_data,
+    .profile_bmp_cnt = 1,
+    .profile_bmp[0] = 0x1c,
+
+};
+
+static shr_enum_map_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_arp_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_arp_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_arp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_arp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_ethertype_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_ethertype_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_ethertype_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_ethertype_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_icmp_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_icmp_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_icmp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_icmp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_ipfix_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_ipfix_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_ipfix_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_ipfix_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_ipv4_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_ipv4_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_ipv4_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_ipv4_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_ipv6_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_ipv6_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_ipv6_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_ipv6_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_l2_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_l2_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_l2_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_l2_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_rarp_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_rarp_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_rarp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_rarp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_svtag_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_get,
+    bcmpkt_svtag_t_data_upr_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_svtag_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_set,
+    bcmpkt_svtag_t_data_upr_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_svtag_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_svtag_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_svtag_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_udp_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_udp_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_udp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_udp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_vlan_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_vlan_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_vlan_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_vlan_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_vxlan_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_vxlan_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_vxlan_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_vxlan_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_32_3_0_vxlan_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56780_a0_cna_6_5_32_3_0_flexhdr_info_list[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_arp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_ethertype_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_icmp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_ipfix_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_ipv4_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_ipv6_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_l2_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_rarp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_svtag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_svtag_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_svtag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_udp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_vlan_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_32_3_0_vxlan_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_32_3_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56780_a0_cna_6_5_32_3_0_flexhdr_id_map[] = {
+    BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56780_a0_cna_6_5_32_3_0_flexhdr_map_get(void)
+{
+    return bcm56780_a0_cna_6_5_32_3_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56780_a0_cna_6_5_32_3_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56780_a0_cna_6_5_32_3_0_flexhdr_info_list[hid];
+}
+
+int bcm56780_a0_cna_6_5_32_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    7,
+    -1,
+    -1,
+    27,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c
deleted file mode 100644
index 14e29e6984f..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c
+++ /dev/null
@@ -1,2480 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_hna_6_5_31_3_0_sf_match_id_info.yml
- * for device bcm56780_a0 and variant hna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h>
-
-
-static bcmpkt_rxpmd_match_id_db_t
-bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT] = {
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
-        .match        = 0x40,
-        .match_mask   = 0x60,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 41,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 41,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 41,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 41,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 41,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 41,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_SVTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 41,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
-        .match        = 0x20,
-        .match_mask   = 0x60,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 41,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
-        .match        = 0x1800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x408,
-        .match_mask   = 0x64c,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x642,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x100,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
-        .match        = 0x1830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
-        .match        = 0x2,
-        .match_mask   = 0x42,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x202,
-        .match_mask   = 0x642,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x82,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x12,
-        .match_mask   = 0x72,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
-        .match        = 0x2000,
-        .match_mask   = 0x3830,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
-        .match        = 0x404,
-        .match_mask   = 0x64c,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
-        .match        = 0x4,
-        .match_mask   = 0x4c,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
-        .match        = 0x8,
-        .match_mask   = 0x4c,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
-        .match        = 0x42,
-        .match_mask   = 0x42,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
-        .match        = 0x44,
-        .match_mask   = 0x44,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
-        .match        = 0x48,
-        .match_mask   = 0x48,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
-        .match        = 0x50,
-        .match_mask   = 0x50,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
-        .match        = 0xc0,
-        .match_mask   = 0xc0,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x140,
-        .match_mask   = 0x140,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
-        .match        = 0x240,
-        .match_mask   = 0x240,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x70,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3870,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
-        .match        = 0x30,
-        .match_mask   = 0x70,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x10,
-        .match_mask   = 0x72,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x2030,
-        .match_mask   = 0x3870,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
-        .match        = 0x830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
-        .name         = "EGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
-        .match        = 0x40,
-        .match_mask   = 0x60,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 13,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 13,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 13,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 13,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 13,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 13,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 13,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
-        .match        = 0x20,
-        .match_mask   = 0x60,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 13,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
-        .match        = 0x1800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x408,
-        .match_mask   = 0x64c,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x642,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x100,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
-        .match        = 0x1830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
-        .match        = 0x2,
-        .match_mask   = 0x42,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x202,
-        .match_mask   = 0x642,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x82,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x12,
-        .match_mask   = 0x72,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
-        .match        = 0x2000,
-        .match_mask   = 0x3830,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
-        .match        = 0x404,
-        .match_mask   = 0x64c,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
-        .match        = 0x4,
-        .match_mask   = 0x4c,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
-        .match        = 0x8,
-        .match_mask   = 0x4c,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
-        .match        = 0x42,
-        .match_mask   = 0x42,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
-        .match        = 0x44,
-        .match_mask   = 0x44,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
-        .match        = 0x48,
-        .match_mask   = 0x48,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
-        .match        = 0x50,
-        .match_mask   = 0x50,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
-        .match        = 0xc0,
-        .match_mask   = 0xc0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x140,
-        .match_mask   = 0x140,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
-        .match        = 0x240,
-        .match_mask   = 0x240,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x70,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3870,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
-        .match        = 0x30,
-        .match_mask   = 0x70,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x10,
-        .match_mask   = 0x72,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x2030,
-        .match_mask   = 0x3870,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
-        .match        = 0x830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
-        .match        = 0x40,
-        .match_mask   = 0x60,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 29,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 29,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 29,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 29,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 29,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 29,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
-        .match        = 0x20,
-        .match_mask   = 0x60,
-        .match_maxbit = 29,
-        .match_minbit = 23,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 29,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
-        .match        = 0x1800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x408,
-        .match_mask   = 0x64c,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x642,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x100,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
-        .match        = 0x2000,
-        .match_mask   = 0x3830,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
-        .match        = 0x404,
-        .match_mask   = 0x64c,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
-        .match        = 0x4,
-        .match_mask   = 0x4c,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
-        .match        = 0x8,
-        .match_mask   = 0x4c,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x2,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x70,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3870,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
-        .match        = 0x30,
-        .match_mask   = 0x70,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x3,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x10,
-        .match_mask   = 0x72,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x2030,
-        .match_mask   = 0x3870,
-        .match_maxbit = 43,
-        .match_minbit = 30,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 43,
-        .pminbit      = 30,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
-        .match        = 0x40,
-        .match_mask   = 0x60,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 8,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 8,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_SVTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
-        .match        = 0x20,
-        .match_mask   = 0x60,
-        .match_maxbit = 8,
-        .match_minbit = 2,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
-        .match        = 0x1800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x408,
-        .match_mask   = 0x64c,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x642,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x100,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
-        .match        = 0x1830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
-        .match        = 0x2,
-        .match_mask   = 0x42,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x202,
-        .match_mask   = 0x642,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x82,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x12,
-        .match_mask   = 0x72,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
-        .match        = 0x2000,
-        .match_mask   = 0x3830,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
-        .match        = 0x404,
-        .match_mask   = 0x64c,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
-        .match        = 0x4,
-        .match_mask   = 0x4c,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
-        .match        = 0x8,
-        .match_mask   = 0x4c,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
-        .match        = 0x42,
-        .match_mask   = 0x42,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
-        .match        = 0x44,
-        .match_mask   = 0x44,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
-        .match        = 0x48,
-        .match_mask   = 0x48,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
-        .match        = 0x50,
-        .match_mask   = 0x50,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
-        .match        = 0xc0,
-        .match_mask   = 0xc0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x140,
-        .match_mask   = 0x140,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
-        .match        = 0x240,
-        .match_mask   = 0x240,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x70,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3870,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
-        .match        = 0x30,
-        .match_mask   = 0x70,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x3,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x10,
-        .match_mask   = 0x72,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x2030,
-        .match_mask   = 0x3870,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
-        .match        = 0x830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
-        .name         = "INGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-};
-
-static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info = {
-    .num_entries = 173,
-    .db = bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db
-};
-bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info_get(void) {
-    return &bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info;
-}
-
-static shr_enum_map_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info = {
-    .num_entries = 173,
-    .map = bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map
-};
-
-bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info_get(void) {
-    return &bcm56780_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info;
-}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_pkt_flexhdr.c
deleted file mode 100644
index 66edd0cacff..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_pkt_flexhdr.c
+++ /dev/null
@@ -1,8374 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml
- * for device bcm56780_a0 and variant hna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#include <sal/sal_types.h>
-#include <shr/shr_error.h>
-#include <bcmpkt/bcmpkt_flexhdr.h>
-#include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_31_3_0/bcm56780_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h>
-
-#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
-#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
-#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
-#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
-
-static void bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
-{
-    uint32_t *reason = data + 0;
-
-    if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
-    }
-    if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
-    }
-    if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
-    }
-    if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
-    }
-    if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
-    }
-    if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
-    }
-    if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
-    }
-    if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
-    }
-    if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
-    }
-    if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
-    }
-    if (reason[13] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
-    }
-    if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
-    }
-    if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
-    }
-    if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
-    }
-    if (reason[13] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
-    }
-    if (reason[13] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
-    }
-    if (reason[13] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
-    }
-    if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
-    }
-    if (reason[13] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
-    }
-    if (reason[13] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
-    }
-    if (reason[13] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
-    }
-    if (reason[13] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
-    }
-    if (reason[13] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[13] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[13] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
-    }
-    if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
-    }
-    if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
-    }
-    if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
-    }
-    if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
-    }
-    if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
-    }
-    if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
-    }
-    if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
-    }
-    if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY);
-    }
-    if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
-    }
-    if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
-    }
-    if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
-    }
-}
-
-static void bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
-{
-    uint32_t *reason = data + 0;
-
-    reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
-        reason[13] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
-        reason[13] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
-        reason[13] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
-        reason[13] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
-        reason[13] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
-        reason[13] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
-        reason[13] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
-        reason[13] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
-        reason[13] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
-        reason[13] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 15);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
-        reason[13] |= (0x1 << 16);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
-        reason[13] |= (0x1 << 17);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
-        reason[13] |= (0x1 << 18);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
-        reason[13] |= (0x1 << 19);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
-        reason[13] |= (0x1 << 20);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
-        reason[13] |= (0x1 << 21);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
-        reason[13] |= (0x1 << 22);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
-        reason[13] |= (0x1 << 23);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
-        reason[13] |= (0x1 << 24);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
-        reason[13] |= (0x1 << 25);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
-        reason[13] |= (0x1 << 26);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 27);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
-        reason[13] |= (0x1 << 28);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[13] |= (0x1 << 29);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[13] |= (0x1 << 30);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
-        reason[13] |= (0x1 << 31);
-    }
-    reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
-        reason[12] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
-        reason[12] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
-        reason[12] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
-        reason[12] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
-        reason[12] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
-        reason[12] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
-        reason[12] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
-        reason[12] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) {
-        reason[12] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
-        reason[12] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
-        reason[12] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
-        reason[12] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
-        reason[12] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
-        reason[12] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
-        reason[12] |= (0x1 << 15);
-    }
-}
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_field_data[] = {
-    {
-        .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { 80, 95 }, /* Profile 12. */
-            { 80, 95 }, /* Profile 13. */
-            { 80, 95 }, /* Profile 14. */
-            { 80, 95 }, /* Profile 15. */
-            { 80, 95 }, /* Profile 16. */
-            { 80, 95 }, /* Profile 17. */
-            { 80, 95 }, /* Profile 18. */
-            { 80, 95 }, /* Profile 19. */
-            { 80, 95 }, /* Profile 20. */
-            { 80, 95 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "DROP_CODE_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 48, 63 }, /* Profile 2. */
-            { 48, 63 }, /* Profile 3. */
-            { 48, 63 }, /* Profile 4. */
-            { 48, 63 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { 48, 63 }, /* Profile 10. */
-            { 48, 63 }, /* Profile 11. */
-            { 48, 63 }, /* Profile 12. */
-            { 48, 63 }, /* Profile 13. */
-            { 48, 63 }, /* Profile 14. */
-            { 48, 63 }, /* Profile 15. */
-            { -1, -1 }, /* Profile 16. */
-            { -1, -1 }, /* Profile 17. */
-            { -1, -1 }, /* Profile 18. */
-            { -1, -1 }, /* Profile 19. */
-            { 48, 63 }, /* Profile 20. */
-            { 48, 63 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "DVP_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 368, 383 }, /* Profile 2. */
-            { 368, 383 }, /* Profile 3. */
-            { 368, 383 }, /* Profile 4. */
-            { 368, 383 }, /* Profile 5. */
-            { 368, 383 }, /* Profile 6. */
-            { 368, 383 }, /* Profile 7. */
-            { 368, 383 }, /* Profile 8. */
-            { 368, 383 }, /* Profile 9. */
-            { 368, 383 }, /* Profile 10. */
-            { 368, 383 }, /* Profile 11. */
-            { 368, 383 }, /* Profile 12. */
-            { 368, 383 }, /* Profile 13. */
-            { 368, 383 }, /* Profile 14. */
-            { 368, 383 }, /* Profile 15. */
-            { 368, 383 }, /* Profile 16. */
-            { 368, 383 }, /* Profile 17. */
-            { 368, 383 }, /* Profile 18. */
-            { 368, 383 }, /* Profile 19. */
-            { 368, 383 }, /* Profile 20. */
-            { 368, 383 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 112, 119 }, /* Profile 2. */
-            { 112, 119 }, /* Profile 3. */
-            { 112, 119 }, /* Profile 4. */
-            { 112, 119 }, /* Profile 5. */
-            { 112, 119 }, /* Profile 6. */
-            { 112, 119 }, /* Profile 7. */
-            { 112, 119 }, /* Profile 8. */
-            { 112, 119 }, /* Profile 9. */
-            { 112, 119 }, /* Profile 10. */
-            { 112, 119 }, /* Profile 11. */
-            { 112, 119 }, /* Profile 12. */
-            { 112, 119 }, /* Profile 13. */
-            { 112, 119 }, /* Profile 14. */
-            { 112, 119 }, /* Profile 15. */
-            { 112, 119 }, /* Profile 16. */
-            { 112, 119 }, /* Profile 17. */
-            { 112, 119 }, /* Profile 18. */
-            { 112, 119 }, /* Profile 19. */
-            { 112, 119 }, /* Profile 20. */
-            { 112, 119 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "EGR_MTOP_INDEX_HI_3_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 384, 387 }, /* Profile 4. */
-            { 384, 387 }, /* Profile 5. */
-            { 384, 387 }, /* Profile 6. */
-            { 384, 387 }, /* Profile 7. */
-            { 384, 387 }, /* Profile 8. */
-            { 384, 387 }, /* Profile 9. */
-            { 384, 387 }, /* Profile 10. */
-            { 384, 387 }, /* Profile 11. */
-            { 384, 387 }, /* Profile 12. */
-            { 384, 387 }, /* Profile 13. */
-            { 384, 387 }, /* Profile 14. */
-            { 384, 387 }, /* Profile 15. */
-            { 384, 387 }, /* Profile 16. */
-            { 384, 387 }, /* Profile 17. */
-            { 384, 387 }, /* Profile 18. */
-            { 384, 387 }, /* Profile 19. */
-            { 384, 387 }, /* Profile 20. */
-            { 384, 387 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { 48, 63 }, /* Profile 6. */
-            { 48, 63 }, /* Profile 7. */
-            { 48, 63 }, /* Profile 8. */
-            { 48, 63 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { -1, -1 }, /* Profile 12. */
-            { -1, -1 }, /* Profile 13. */
-            { -1, -1 }, /* Profile 14. */
-            { -1, -1 }, /* Profile 15. */
-            { 48, 63 }, /* Profile 16. */
-            { 48, 63 }, /* Profile 17. */
-            { 48, 63 }, /* Profile 18. */
-            { 48, 63 }, /* Profile 19. */
-        },
-        .profile_cnt = 20,
-    },
-    {
-        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 80, 95 }, /* Profile 2. */
-            { 80, 95 }, /* Profile 3. */
-            { 80, 95 }, /* Profile 4. */
-            { 80, 95 }, /* Profile 5. */
-            { 80, 95 }, /* Profile 6. */
-            { 80, 95 }, /* Profile 7. */
-            { 80, 95 }, /* Profile 8. */
-            { 80, 95 }, /* Profile 9. */
-            { 80, 95 }, /* Profile 10. */
-            { 80, 95 }, /* Profile 11. */
-        },
-        .profile_cnt = 12,
-    },
-    {
-        .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 424, 427 }, /* Profile 2. */
-            { 424, 427 }, /* Profile 3. */
-            { 424, 427 }, /* Profile 4. */
-            { 424, 427 }, /* Profile 5. */
-            { 424, 427 }, /* Profile 6. */
-            { 424, 427 }, /* Profile 7. */
-            { 424, 427 }, /* Profile 8. */
-            { 424, 427 }, /* Profile 9. */
-            { 424, 427 }, /* Profile 10. */
-            { 424, 427 }, /* Profile 11. */
-            { 424, 427 }, /* Profile 12. */
-            { 424, 427 }, /* Profile 13. */
-            { 424, 427 }, /* Profile 14. */
-            { 424, 427 }, /* Profile 15. */
-            { 424, 427 }, /* Profile 16. */
-            { 424, 427 }, /* Profile 17. */
-            { 424, 427 }, /* Profile 18. */
-            { 424, 427 }, /* Profile 19. */
-            { 424, 427 }, /* Profile 20. */
-            { 424, 427 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 128, 143 }, /* Profile 2. */
-            { 128, 143 }, /* Profile 3. */
-            { 128, 143 }, /* Profile 4. */
-            { 128, 143 }, /* Profile 5. */
-            { 128, 143 }, /* Profile 6. */
-            { 128, 143 }, /* Profile 7. */
-            { 128, 143 }, /* Profile 8. */
-            { 128, 143 }, /* Profile 9. */
-            { 128, 143 }, /* Profile 10. */
-            { 128, 143 }, /* Profile 11. */
-            { 128, 143 }, /* Profile 12. */
-            { 128, 143 }, /* Profile 13. */
-            { 128, 143 }, /* Profile 14. */
-            { 128, 143 }, /* Profile 15. */
-            { 128, 143 }, /* Profile 16. */
-            { 128, 143 }, /* Profile 17. */
-            { 128, 143 }, /* Profile 18. */
-            { 128, 143 }, /* Profile 19. */
-            { 128, 143 }, /* Profile 20. */
-            { 128, 143 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 256, 271 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 240, 255 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { 256, 271 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { 240, 255 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { 256, 271 }, /* Profile 12. */
-            { -1, -1 }, /* Profile 13. */
-            { 240, 255 }, /* Profile 14. */
-            { -1, -1 }, /* Profile 15. */
-            { 256, 271 }, /* Profile 16. */
-            { -1, -1 }, /* Profile 17. */
-            { 240, 255 }, /* Profile 18. */
-        },
-        .profile_cnt = 19,
-    },
-    {
-        .name = "EP_NIH_HDR_TIMESTAMP_31_16",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 272, 287 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 256, 271 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { 272, 287 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { 256, 271 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { 272, 287 }, /* Profile 12. */
-            { -1, -1 }, /* Profile 13. */
-            { 256, 271 }, /* Profile 14. */
-            { -1, -1 }, /* Profile 15. */
-            { 272, 287 }, /* Profile 16. */
-            { -1, -1 }, /* Profile 17. */
-            { 256, 271 }, /* Profile 18. */
-        },
-        .profile_cnt = 19,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 0, 15 }, /* Profile 2. */
-            { 0, 15 }, /* Profile 3. */
-            { 0, 15 }, /* Profile 4. */
-            { 0, 15 }, /* Profile 5. */
-            { 0, 15 }, /* Profile 6. */
-            { 0, 15 }, /* Profile 7. */
-            { 0, 15 }, /* Profile 8. */
-            { 0, 15 }, /* Profile 9. */
-            { 0, 15 }, /* Profile 10. */
-            { 0, 15 }, /* Profile 11. */
-            { 0, 15 }, /* Profile 12. */
-            { 0, 15 }, /* Profile 13. */
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-            { 64, 79 }, /* Profile 18. */
-            { 64, 79 }, /* Profile 19. */
-            { 64, 79 }, /* Profile 20. */
-            { 64, 79 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 408, 411 }, /* Profile 2. */
-            { 408, 411 }, /* Profile 3. */
-            { 408, 411 }, /* Profile 4. */
-            { 408, 411 }, /* Profile 5. */
-            { 408, 411 }, /* Profile 6. */
-            { 408, 411 }, /* Profile 7. */
-            { 408, 411 }, /* Profile 8. */
-            { 408, 411 }, /* Profile 9. */
-            { 408, 411 }, /* Profile 10. */
-            { 408, 411 }, /* Profile 11. */
-            { 408, 411 }, /* Profile 12. */
-            { 408, 411 }, /* Profile 13. */
-            { 408, 411 }, /* Profile 14. */
-            { 408, 411 }, /* Profile 15. */
-            { 408, 411 }, /* Profile 16. */
-            { 408, 411 }, /* Profile 17. */
-            { 408, 411 }, /* Profile 18. */
-            { 408, 411 }, /* Profile 19. */
-            { 408, 411 }, /* Profile 20. */
-            { 408, 411 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "SVP_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 288, 303 }, /* Profile 2. */
-            { 288, 303 }, /* Profile 3. */
-            { 272, 287 }, /* Profile 4. */
-            { 272, 287 }, /* Profile 5. */
-            { 288, 303 }, /* Profile 6. */
-            { 288, 303 }, /* Profile 7. */
-            { 272, 287 }, /* Profile 8. */
-            { 272, 287 }, /* Profile 9. */
-            { 288, 303 }, /* Profile 10. */
-            { 272, 287 }, /* Profile 11. */
-            { 288, 303 }, /* Profile 12. */
-            { 288, 303 }, /* Profile 13. */
-            { 272, 287 }, /* Profile 14. */
-            { 272, 287 }, /* Profile 15. */
-            { 288, 303 }, /* Profile 16. */
-            { 288, 303 }, /* Profile 17. */
-            { 272, 287 }, /* Profile 18. */
-            { 272, 287 }, /* Profile 19. */
-            { 288, 303 }, /* Profile 20. */
-            { 272, 287 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-            { 400, 403 }, /* Profile 5. */
-            { 400, 403 }, /* Profile 6. */
-            { 400, 403 }, /* Profile 7. */
-            { 400, 403 }, /* Profile 8. */
-            { 400, 403 }, /* Profile 9. */
-            { 400, 403 }, /* Profile 10. */
-            { 400, 403 }, /* Profile 11. */
-            { 400, 403 }, /* Profile 12. */
-            { 400, 403 }, /* Profile 13. */
-            { 400, 403 }, /* Profile 14. */
-            { 400, 403 }, /* Profile 15. */
-            { 400, 403 }, /* Profile 16. */
-            { 400, 403 }, /* Profile 17. */
-            { 400, 403 }, /* Profile 18. */
-            { 400, 403 }, /* Profile 19. */
-            { 400, 403 }, /* Profile 20. */
-            { 400, 403 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 208, 223 }, /* Profile 2. */
-            { 208, 223 }, /* Profile 3. */
-            { 192, 207 }, /* Profile 4. */
-            { 192, 207 }, /* Profile 5. */
-            { 208, 223 }, /* Profile 6. */
-            { 208, 223 }, /* Profile 7. */
-            { 192, 207 }, /* Profile 8. */
-            { 192, 207 }, /* Profile 9. */
-            { 208, 223 }, /* Profile 10. */
-            { 192, 207 }, /* Profile 11. */
-            { 208, 223 }, /* Profile 12. */
-            { 208, 223 }, /* Profile 13. */
-            { 192, 207 }, /* Profile 14. */
-            { 192, 207 }, /* Profile 15. */
-            { 208, 223 }, /* Profile 16. */
-            { 208, 223 }, /* Profile 17. */
-            { 192, 207 }, /* Profile 18. */
-            { 192, 207 }, /* Profile 19. */
-            { 208, 223 }, /* Profile 20. */
-            { 192, 207 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 420, 423 }, /* Profile 2. */
-            { 420, 423 }, /* Profile 3. */
-            { 420, 423 }, /* Profile 4. */
-            { 420, 423 }, /* Profile 5. */
-            { 420, 423 }, /* Profile 6. */
-            { 420, 423 }, /* Profile 7. */
-            { 420, 423 }, /* Profile 8. */
-            { 420, 423 }, /* Profile 9. */
-            { 420, 423 }, /* Profile 10. */
-            { 420, 423 }, /* Profile 11. */
-            { 420, 423 }, /* Profile 12. */
-            { 420, 423 }, /* Profile 13. */
-            { 420, 423 }, /* Profile 14. */
-            { 420, 423 }, /* Profile 15. */
-            { 420, 423 }, /* Profile 16. */
-            { 420, 423 }, /* Profile 17. */
-            { 420, 423 }, /* Profile 18. */
-            { 420, 423 }, /* Profile 19. */
-            { 420, 423 }, /* Profile 20. */
-            { 420, 423 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 192, 207 }, /* Profile 2. */
-            { 192, 207 }, /* Profile 3. */
-            { 176, 191 }, /* Profile 4. */
-            { 176, 191 }, /* Profile 5. */
-            { 192, 207 }, /* Profile 6. */
-            { 192, 207 }, /* Profile 7. */
-            { 176, 191 }, /* Profile 8. */
-            { 176, 191 }, /* Profile 9. */
-            { 192, 207 }, /* Profile 10. */
-            { 176, 191 }, /* Profile 11. */
-            { 192, 207 }, /* Profile 12. */
-            { 192, 207 }, /* Profile 13. */
-            { 176, 191 }, /* Profile 14. */
-            { 176, 191 }, /* Profile 15. */
-            { 192, 207 }, /* Profile 16. */
-            { 192, 207 }, /* Profile 17. */
-            { 176, 191 }, /* Profile 18. */
-            { 176, 191 }, /* Profile 19. */
-            { 192, 207 }, /* Profile 20. */
-            { 176, 191 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "TIMESTAMP_CTRL_3_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-            { 388, 391 }, /* Profile 5. */
-            { 388, 391 }, /* Profile 6. */
-            { 388, 391 }, /* Profile 7. */
-            { 388, 391 }, /* Profile 8. */
-            { 388, 391 }, /* Profile 9. */
-            { 388, 391 }, /* Profile 10. */
-            { 388, 391 }, /* Profile 11. */
-            { 388, 391 }, /* Profile 12. */
-            { 388, 391 }, /* Profile 13. */
-            { 388, 391 }, /* Profile 14. */
-            { 388, 391 }, /* Profile 15. */
-            { 388, 391 }, /* Profile 16. */
-            { 388, 391 }, /* Profile 17. */
-            { 388, 391 }, /* Profile 18. */
-            { 388, 391 }, /* Profile 19. */
-            { 388, 391 }, /* Profile 20. */
-            { 388, 391 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 412, 415 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-            { 412, 415 }, /* Profile 5. */
-            { 412, 415 }, /* Profile 6. */
-            { 412, 415 }, /* Profile 7. */
-            { 412, 415 }, /* Profile 8. */
-            { 412, 415 }, /* Profile 9. */
-            { 412, 415 }, /* Profile 10. */
-            { 412, 415 }, /* Profile 11. */
-            { 412, 415 }, /* Profile 12. */
-            { 412, 415 }, /* Profile 13. */
-            { 412, 415 }, /* Profile 14. */
-            { 412, 415 }, /* Profile 15. */
-            { 412, 415 }, /* Profile 16. */
-            { 412, 415 }, /* Profile 17. */
-            { 412, 415 }, /* Profile 18. */
-            { 412, 415 }, /* Profile 19. */
-            { 412, 415 }, /* Profile 20. */
-            { 412, 415 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "VFI_15_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 336, 351 }, /* Profile 2. */
-            { 336, 351 }, /* Profile 3. */
-            { 320, 335 }, /* Profile 4. */
-            { 320, 335 }, /* Profile 5. */
-            { 336, 351 }, /* Profile 6. */
-            { 336, 351 }, /* Profile 7. */
-            { 320, 335 }, /* Profile 8. */
-            { 320, 335 }, /* Profile 9. */
-            { 336, 351 }, /* Profile 10. */
-            { 320, 335 }, /* Profile 11. */
-            { 336, 351 }, /* Profile 12. */
-            { 336, 351 }, /* Profile 13. */
-            { 320, 335 }, /* Profile 14. */
-            { 320, 335 }, /* Profile 15. */
-            { 336, 351 }, /* Profile 16. */
-            { 336, 351 }, /* Profile 17. */
-            { 320, 335 }, /* Profile 18. */
-            { 320, 335 }, /* Profile 19. */
-            { 336, 351 }, /* Profile 20. */
-            { 320, 335 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-    {
-        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
-        .fid = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-            { 392, 395 }, /* Profile 5. */
-            { 392, 395 }, /* Profile 6. */
-            { 392, 395 }, /* Profile 7. */
-            { 392, 395 }, /* Profile 8. */
-            { 392, 395 }, /* Profile 9. */
-            { 392, 395 }, /* Profile 10. */
-            { 392, 395 }, /* Profile 11. */
-            { 392, 395 }, /* Profile 12. */
-            { 392, 395 }, /* Profile 13. */
-            { 392, 395 }, /* Profile 14. */
-            { 392, 395 }, /* Profile 15. */
-            { 392, 395 }, /* Profile 16. */
-            { 392, 395 }, /* Profile 17. */
-            { 392, 395 }, /* Profile 18. */
-            { 392, 395 }, /* Profile 19. */
-            { 392, 395 }, /* Profile 20. */
-            { 392, 395 }, /* Profile 21. */
-        },
-        .profile_cnt = 22,
-    },
-};
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_field_data,
-    .profile_bmp_cnt = 1,
-    .profile_bmp[0] = 0x3ffffc,
-
-};
-
-static shr_enum_map_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_names[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_reasons_info_t bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_names,
-    .reason_encode = bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reason_decode,
-};
-
-
-static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_arp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_get,
-    bcmpkt_arp_t_hardware_type_get,
-    bcmpkt_arp_t_operation_get,
-    bcmpkt_arp_t_prot_addr_len_get,
-    bcmpkt_arp_t_protocol_type_get,
-    bcmpkt_arp_t_sender_ha_get,
-    bcmpkt_arp_t_sender_ip_get,
-    bcmpkt_arp_t_target_ha_get,
-    bcmpkt_arp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_arp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_set,
-    bcmpkt_arp_t_hardware_type_set,
-    bcmpkt_arp_t_operation_set,
-    bcmpkt_arp_t_prot_addr_len_set,
-    bcmpkt_arp_t_protocol_type_set,
-    bcmpkt_arp_t_sender_ha_set,
-    bcmpkt_arp_t_sender_ip_set,
-    bcmpkt_arp_t_target_ha_set,
-    bcmpkt_arp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_arp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_arp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_arp_t_field_data,
-};
-
-
-static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_authen_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_get,
-    bcmpkt_authen_t_next_header_get,
-    bcmpkt_authen_t_payload_len_get,
-    bcmpkt_authen_t_reserved_get,
-    bcmpkt_authen_t_seq_num_get,
-    bcmpkt_authen_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_authen_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_set,
-    bcmpkt_authen_t_next_header_set,
-    bcmpkt_authen_t_payload_len_set,
-    bcmpkt_authen_t_reserved_set,
-    bcmpkt_authen_t_seq_num_set,
-    bcmpkt_authen_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_authen_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_authen_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_authen_t_field_data,
-};
-
-
-static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 18, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 18, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 17, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 17, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 5);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 5, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 21, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 21, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_bfd_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_get,
-    bcmpkt_bfd_t_bfd_length_get,
-    bcmpkt_bfd_t_cpi_get,
-    bcmpkt_bfd_t_dem_get,
-    bcmpkt_bfd_t_desmintxintv_get,
-    bcmpkt_bfd_t_detectmult_get,
-    bcmpkt_bfd_t_diag_get,
-    bcmpkt_bfd_t_fin_get,
-    bcmpkt_bfd_t_minechorxintv_get,
-    bcmpkt_bfd_t_mpt_get,
-    bcmpkt_bfd_t_mydiscrim_get,
-    bcmpkt_bfd_t_poll_get,
-    bcmpkt_bfd_t_reqminrxintv_get,
-    bcmpkt_bfd_t_sta_get,
-    bcmpkt_bfd_t_urdiscrim_get,
-    bcmpkt_bfd_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_bfd_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_set,
-    bcmpkt_bfd_t_bfd_length_set,
-    bcmpkt_bfd_t_cpi_set,
-    bcmpkt_bfd_t_dem_set,
-    bcmpkt_bfd_t_desmintxintv_set,
-    bcmpkt_bfd_t_detectmult_set,
-    bcmpkt_bfd_t_diag_set,
-    bcmpkt_bfd_t_fin_set,
-    bcmpkt_bfd_t_minechorxintv_set,
-    bcmpkt_bfd_t_mpt_set,
-    bcmpkt_bfd_t_mydiscrim_set,
-    bcmpkt_bfd_t_poll_set,
-    bcmpkt_bfd_t_reqminrxintv_set,
-    bcmpkt_bfd_t_sta_set,
-    bcmpkt_bfd_t_urdiscrim_set,
-    bcmpkt_bfd_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_bfd_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_bfd_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_bfd_t_field_data,
-};
-
-
-static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_cntag_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_get,
-    bcmpkt_cntag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_cntag_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_set,
-    bcmpkt_cntag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_cntag_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_cntag_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_cntag_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_get,
-    bcmpkt_cpu_composites_0_t_dma_cont1_get,
-    bcmpkt_cpu_composites_0_t_dma_cont2_get,
-    bcmpkt_cpu_composites_0_t_dma_cont3_get,
-    bcmpkt_cpu_composites_0_t_dma_cont4_get,
-    bcmpkt_cpu_composites_0_t_dma_cont5_get,
-    bcmpkt_cpu_composites_0_t_dma_cont6_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_set,
-    bcmpkt_cpu_composites_0_t_dma_cont1_set,
-    bcmpkt_cpu_composites_0_t_dma_cont2_set,
-    bcmpkt_cpu_composites_0_t_dma_cont3_set,
-    bcmpkt_cpu_composites_0_t_dma_cont4_set,
-    bcmpkt_cpu_composites_0_t_dma_cont5_set,
-    bcmpkt_cpu_composites_0_t_dma_cont6_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_get,
-    bcmpkt_cpu_composites_1_t_dma_cont11_get,
-    bcmpkt_cpu_composites_1_t_dma_cont12_get,
-    bcmpkt_cpu_composites_1_t_dma_cont13_get,
-    bcmpkt_cpu_composites_1_t_dma_cont14_get,
-    bcmpkt_cpu_composites_1_t_dma_cont15_get,
-    bcmpkt_cpu_composites_1_t_dma_cont16_get,
-    bcmpkt_cpu_composites_1_t_dma_cont17_get,
-    bcmpkt_cpu_composites_1_t_dma_cont7_get,
-    bcmpkt_cpu_composites_1_t_dma_cont8_get,
-    bcmpkt_cpu_composites_1_t_dma_cont9_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_set,
-    bcmpkt_cpu_composites_1_t_dma_cont11_set,
-    bcmpkt_cpu_composites_1_t_dma_cont12_set,
-    bcmpkt_cpu_composites_1_t_dma_cont13_set,
-    bcmpkt_cpu_composites_1_t_dma_cont14_set,
-    bcmpkt_cpu_composites_1_t_dma_cont15_set,
-    bcmpkt_cpu_composites_1_t_dma_cont16_set,
-    bcmpkt_cpu_composites_1_t_dma_cont17_set,
-    bcmpkt_cpu_composites_1_t_dma_cont7_set,
-    bcmpkt_cpu_composites_1_t_dma_cont8_set,
-    bcmpkt_cpu_composites_1_t_dma_cont9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_dest_option_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_get,
-    bcmpkt_dest_option_t_next_header_get,
-    bcmpkt_dest_option_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_dest_option_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_set,
-    bcmpkt_dest_option_t_next_header_set,
-    bcmpkt_dest_option_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_dest_option_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_dest_option_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_dest_option_t_field_data,
-};
-
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_get,
-    bcmpkt_ep_nih_header_t_header_type_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
-    bcmpkt_ep_nih_header_t_opaque_object_a_get,
-    bcmpkt_ep_nih_header_t_opaque_object_b_get,
-    bcmpkt_ep_nih_header_t_opaque_object_c_get,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
-    bcmpkt_ep_nih_header_t_reserved_0_get,
-    bcmpkt_ep_nih_header_t_start_get,
-    bcmpkt_ep_nih_header_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_set,
-    bcmpkt_ep_nih_header_t_header_type_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
-    bcmpkt_ep_nih_header_t_opaque_object_a_set,
-    bcmpkt_ep_nih_header_t_opaque_object_b_set,
-    bcmpkt_ep_nih_header_t_opaque_object_c_set,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
-    bcmpkt_ep_nih_header_t_reserved_0_set,
-    bcmpkt_ep_nih_header_t_start_set,
-    bcmpkt_ep_nih_header_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 11, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 11, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 10, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 10, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_get,
-    bcmpkt_erspan3_fixed_hdr_t_cos_get,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
-    bcmpkt_erspan3_fixed_hdr_t_t_get,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
-    bcmpkt_erspan3_fixed_hdr_t_ver_get,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_set,
-    bcmpkt_erspan3_fixed_hdr_t_cos_set,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
-    bcmpkt_erspan3_fixed_hdr_t_t_set,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
-    bcmpkt_erspan3_fixed_hdr_t_ver_set,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
-    bcmpkt_erspan3_subhdr_5_t_port_id_get,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
-    bcmpkt_erspan3_subhdr_5_t_port_id_set,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_data,
-};
-
-
-static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_esp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_get,
-    bcmpkt_esp_t_pad_get,
-    bcmpkt_esp_t_pad_len_get,
-    bcmpkt_esp_t_seq_num_get,
-    bcmpkt_esp_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_esp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_set,
-    bcmpkt_esp_t_pad_set,
-    bcmpkt_esp_t_pad_len_set,
-    bcmpkt_esp_t_seq_num_set,
-    bcmpkt_esp_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_esp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_esp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_esp_t_field_data,
-};
-
-
-static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_etag_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT] = {
-    bcmpkt_etag_t_tag_get,
-    bcmpkt_etag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_etag_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT] = {
-    bcmpkt_etag_t_tag_set,
-    bcmpkt_etag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_etag_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_etag_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_etag_t_field_data,
-};
-
-
-static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ethertype_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ethertype_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ethertype_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ethertype_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ethertype_t_field_data,
-};
-
-
-static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_frag_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_get,
-    bcmpkt_frag_t_id_get,
-    bcmpkt_frag_t_next_header_get,
-    bcmpkt_frag_t_reserved_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_frag_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_set,
-    bcmpkt_frag_t_id_set,
-    bcmpkt_frag_t_next_header_set,
-    bcmpkt_frag_t_reserved_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_frag_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_frag_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_frag_t_field_data,
-};
-
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 4, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 4, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_get,
-    bcmpkt_generic_loopback_t_destination_type_get,
-    bcmpkt_generic_loopback_t_entropy_obj_get,
-    bcmpkt_generic_loopback_t_flags_get,
-    bcmpkt_generic_loopback_t_header_type_get,
-    bcmpkt_generic_loopback_t_input_priority_get,
-    bcmpkt_generic_loopback_t_interface_ctrl_get,
-    bcmpkt_generic_loopback_t_interface_obj_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
-    bcmpkt_generic_loopback_t_qos_obj_get,
-    bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_source_system_port_get,
-    bcmpkt_generic_loopback_t_start_byte_get,
-    bcmpkt_generic_loopback_t_svp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_set,
-    bcmpkt_generic_loopback_t_destination_type_set,
-    bcmpkt_generic_loopback_t_entropy_obj_set,
-    bcmpkt_generic_loopback_t_flags_set,
-    bcmpkt_generic_loopback_t_header_type_set,
-    bcmpkt_generic_loopback_t_input_priority_set,
-    bcmpkt_generic_loopback_t_interface_ctrl_set,
-    bcmpkt_generic_loopback_t_interface_obj_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
-    bcmpkt_generic_loopback_t_qos_obj_set,
-    bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_source_system_port_set,
-    bcmpkt_generic_loopback_t_start_byte_set,
-    bcmpkt_generic_loopback_t_svp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_field_data,
-};
-
-
-static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gpe_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_get,
-    bcmpkt_gpe_t_next_protocol_get,
-    bcmpkt_gpe_t_reserved0_get,
-    bcmpkt_gpe_t_reserved1_get,
-    bcmpkt_gpe_t_vni_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gpe_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_set,
-    bcmpkt_gpe_t_next_protocol_set,
-    bcmpkt_gpe_t_reserved0_set,
-    bcmpkt_gpe_t_reserved1_set,
-    bcmpkt_gpe_t_vni_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gpe_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gpe_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_gpe_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_get,
-    bcmpkt_gre_chksum_t_offset_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_set,
-    bcmpkt_gre_chksum_t_offset_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gre_key_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gre_key_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gre_key_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gre_key_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_gre_key_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 9);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 9, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_gre_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_get,
-    bcmpkt_gre_t_protocol_get,
-    bcmpkt_gre_t_reserved_get,
-    bcmpkt_gre_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_gre_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_set,
-    bcmpkt_gre_t_protocol_set,
-    bcmpkt_gre_t_reserved_set,
-    bcmpkt_gre_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_gre_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_gre_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_gre_t_field_data,
-};
-
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
-    bcmpkt_hop_by_hop_t_next_header_get,
-    bcmpkt_hop_by_hop_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
-    bcmpkt_hop_by_hop_t_next_header_set,
-    bcmpkt_hop_by_hop_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_field_data,
-};
-
-
-static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_icmp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_get,
-    bcmpkt_icmp_t_code_get,
-    bcmpkt_icmp_t_icmp_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_icmp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_set,
-    bcmpkt_icmp_t_code_set,
-    bcmpkt_icmp_t_icmp_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_icmp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_icmp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_icmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
-    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
-    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_b_t_cn_get,
-    bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
-    bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
-    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_b_t_cn_set,
-    bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
-    bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
-    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
-    bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
-    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
-    bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
-    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
-    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
-    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_get,
-    bcmpkt_ifa_header_t_gns_get,
-    bcmpkt_ifa_header_t_max_length_get,
-    bcmpkt_ifa_header_t_next_hdr_get,
-    bcmpkt_ifa_header_t_ver_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_set,
-    bcmpkt_ifa_header_t_gns_set,
-    bcmpkt_ifa_header_t_max_length_set,
-    bcmpkt_ifa_header_t_next_hdr_set,
-    bcmpkt_ifa_header_t_ver_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_md_base_t_action_vector_get,
-    bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
-    bcmpkt_ifa_md_base_t_request_vector_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_md_base_t_action_vector_set,
-    bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
-    bcmpkt_ifa_md_base_t_request_vector_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_t_action_vector_get,
-    bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
-    bcmpkt_ifa_metadata_t_metadata_get,
-    bcmpkt_ifa_metadata_t_request_vector_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_t_action_vector_set,
-    bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
-    bcmpkt_ifa_metadata_t_metadata_set,
-    bcmpkt_ifa_metadata_t_request_vector_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_field_data,
-};
-
-
-static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_igmp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_get,
-    bcmpkt_igmp_t_group_address_get,
-    bcmpkt_igmp_t_igmp_type_get,
-    bcmpkt_igmp_t_max_resp_time_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_igmp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_set,
-    bcmpkt_igmp_t_group_address_set,
-    bcmpkt_igmp_t_igmp_type_set,
-    bcmpkt_igmp_t_max_resp_time_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_igmp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_igmp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_igmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ipfix_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_get,
-    bcmpkt_ipfix_t_length_get,
-    bcmpkt_ipfix_t_obs_domain_id_get,
-    bcmpkt_ipfix_t_sequence_num_get,
-    bcmpkt_ipfix_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ipfix_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_set,
-    bcmpkt_ipfix_t_length_set,
-    bcmpkt_ipfix_t_obs_domain_id_set,
-    bcmpkt_ipfix_t_sequence_num_set,
-    bcmpkt_ipfix_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ipfix_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ipfix_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ipfix_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ipv4_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_get,
-    bcmpkt_ipv4_t_flags_frag_offset_get,
-    bcmpkt_ipv4_t_hdr_checksum_get,
-    bcmpkt_ipv4_t_id_get,
-    bcmpkt_ipv4_t_option_get,
-    bcmpkt_ipv4_t_protocol_get,
-    bcmpkt_ipv4_t_sa_get,
-    bcmpkt_ipv4_t_tos_get,
-    bcmpkt_ipv4_t_total_length_get,
-    bcmpkt_ipv4_t_ttl_get,
-    bcmpkt_ipv4_t_version_hdr_len_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ipv4_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_set,
-    bcmpkt_ipv4_t_flags_frag_offset_set,
-    bcmpkt_ipv4_t_hdr_checksum_set,
-    bcmpkt_ipv4_t_id_set,
-    bcmpkt_ipv4_t_option_set,
-    bcmpkt_ipv4_t_protocol_set,
-    bcmpkt_ipv4_t_sa_set,
-    bcmpkt_ipv4_t_tos_set,
-    bcmpkt_ipv4_t_total_length_set,
-    bcmpkt_ipv4_t_ttl_set,
-    bcmpkt_ipv4_t_version_hdr_len_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ipv4_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ipv4_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ipv4_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_ipv6_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_get,
-    bcmpkt_ipv6_t_flow_label_get,
-    bcmpkt_ipv6_t_hop_limit_get,
-    bcmpkt_ipv6_t_next_header_get,
-    bcmpkt_ipv6_t_payload_length_get,
-    bcmpkt_ipv6_t_sa_get,
-    bcmpkt_ipv6_t_traffic_class_get,
-    bcmpkt_ipv6_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_ipv6_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_set,
-    bcmpkt_ipv6_t_flow_label_set,
-    bcmpkt_ipv6_t_hop_limit_set,
-    bcmpkt_ipv6_t_next_header_set,
-    bcmpkt_ipv6_t_payload_length_set,
-    bcmpkt_ipv6_t_sa_set,
-    bcmpkt_ipv6_t_traffic_class_set,
-    bcmpkt_ipv6_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_ipv6_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_ipv6_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_ipv6_t_field_data,
-};
-
-
-static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_l2_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_get,
-    bcmpkt_l2_t_macsa_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_l2_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_set,
-    bcmpkt_l2_t_macsa_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_l2_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_l2_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_l2_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_get,
-    bcmpkt_mpls_ach_t_cw_type_get,
-    bcmpkt_mpls_ach_t_reserved_get,
-    bcmpkt_mpls_ach_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_set,
-    bcmpkt_mpls_ach_t_cw_type_set,
-    bcmpkt_mpls_ach_t_reserved_set,
-    bcmpkt_mpls_ach_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_get,
-    bcmpkt_mpls_cw_t_reserved_get,
-    bcmpkt_mpls_cw_t_seq_number_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_set,
-    bcmpkt_mpls_cw_t_reserved_set,
-    bcmpkt_mpls_cw_t_seq_number_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 9, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 9, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_mpls_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_get,
-    bcmpkt_mpls_t_exp_get,
-    bcmpkt_mpls_t_label_get,
-    bcmpkt_mpls_t_ttl_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_mpls_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_set,
-    bcmpkt_mpls_t_exp_set,
-    bcmpkt_mpls_t_label_set,
-    bcmpkt_mpls_t_ttl_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_mpls_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_mpls_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_mpls_t_field_data,
-};
-
-
-static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[7], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[7], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_p_1588_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_get,
-    bcmpkt_p_1588_t_correction_get,
-    bcmpkt_p_1588_t_domain_nb_get,
-    bcmpkt_p_1588_t_flags_get,
-    bcmpkt_p_1588_t_logmsginterval_get,
-    bcmpkt_p_1588_t_msg_length_get,
-    bcmpkt_p_1588_t_msg_type_get,
-    bcmpkt_p_1588_t_reserved1_get,
-    bcmpkt_p_1588_t_reserved2_get,
-    bcmpkt_p_1588_t_reserved3_get,
-    bcmpkt_p_1588_t_seq_id_get,
-    bcmpkt_p_1588_t_srcportid_get,
-    bcmpkt_p_1588_t_transportspec_get,
-    bcmpkt_p_1588_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_p_1588_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_set,
-    bcmpkt_p_1588_t_correction_set,
-    bcmpkt_p_1588_t_domain_nb_set,
-    bcmpkt_p_1588_t_flags_set,
-    bcmpkt_p_1588_t_logmsginterval_set,
-    bcmpkt_p_1588_t_msg_length_set,
-    bcmpkt_p_1588_t_msg_type_set,
-    bcmpkt_p_1588_t_reserved1_set,
-    bcmpkt_p_1588_t_reserved2_set,
-    bcmpkt_p_1588_t_reserved3_set,
-    bcmpkt_p_1588_t_seq_id_set,
-    bcmpkt_p_1588_t_srcportid_set,
-    bcmpkt_p_1588_t_transportspec_set,
-    bcmpkt_p_1588_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_p_1588_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_p_1588_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_p_1588_t_field_data,
-};
-
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
-    bcmpkt_prog_ext_hdr_t_next_header_get,
-    bcmpkt_prog_ext_hdr_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
-    bcmpkt_prog_ext_hdr_t_next_header_set,
-    bcmpkt_prog_ext_hdr_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_get,
-    bcmpkt_psamp_0_t_length_get,
-    bcmpkt_psamp_0_t_next_hop_index_get,
-    bcmpkt_psamp_0_t_obs_time_ns_get,
-    bcmpkt_psamp_0_t_obs_time_s_get,
-    bcmpkt_psamp_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_set,
-    bcmpkt_psamp_0_t_length_set,
-    bcmpkt_psamp_0_t_next_hop_index_set,
-    bcmpkt_psamp_0_t_obs_time_ns_set,
-    bcmpkt_psamp_0_t_obs_time_s_set,
-    bcmpkt_psamp_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_get,
-    bcmpkt_psamp_1_t_egress_port_get,
-    bcmpkt_psamp_1_t_epoch_get,
-    bcmpkt_psamp_1_t_ingress_port_get,
-    bcmpkt_psamp_1_t_sampled_length_get,
-    bcmpkt_psamp_1_t_user_meta_data_get,
-    bcmpkt_psamp_1_t_variable_flag_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_set,
-    bcmpkt_psamp_1_t_egress_port_set,
-    bcmpkt_psamp_1_t_epoch_set,
-    bcmpkt_psamp_1_t_ingress_port_set,
-    bcmpkt_psamp_1_t_sampled_length_set,
-    bcmpkt_psamp_1_t_user_meta_data_set,
-    bcmpkt_psamp_1_t_variable_flag_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_data,
-};
-
-
-static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_rarp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_get,
-    bcmpkt_rarp_t_hardware_type_get,
-    bcmpkt_rarp_t_operation_get,
-    bcmpkt_rarp_t_prot_addr_len_get,
-    bcmpkt_rarp_t_protocol_type_get,
-    bcmpkt_rarp_t_sender_ha_get,
-    bcmpkt_rarp_t_sender_ip_get,
-    bcmpkt_rarp_t_target_ha_get,
-    bcmpkt_rarp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_rarp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_set,
-    bcmpkt_rarp_t_hardware_type_set,
-    bcmpkt_rarp_t_operation_set,
-    bcmpkt_rarp_t_prot_addr_len_set,
-    bcmpkt_rarp_t_protocol_type_set,
-    bcmpkt_rarp_t_sender_ha_set,
-    bcmpkt_rarp_t_sender_ip_set,
-    bcmpkt_rarp_t_target_ha_set,
-    bcmpkt_rarp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_rarp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_rarp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_rarp_t_field_data,
-};
-
-
-static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_routing_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_get,
-    bcmpkt_routing_t_hdr_ext_len_get,
-    bcmpkt_routing_t_next_header_get,
-    bcmpkt_routing_t_routing_type_get,
-    bcmpkt_routing_t_segments_left_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_routing_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_set,
-    bcmpkt_routing_t_hdr_ext_len_set,
-    bcmpkt_routing_t_next_header_set,
-    bcmpkt_routing_t_routing_type_set,
-    bcmpkt_routing_t_segments_left_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_routing_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_routing_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_routing_t_field_data,
-};
-
-
-static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_rspan_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_get,
-    bcmpkt_rspan_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_rspan_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_set,
-    bcmpkt_rspan_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_rspan_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_rspan_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_rspan_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_get,
-    bcmpkt_sflow_shim_0_t_sys_source_get,
-    bcmpkt_sflow_shim_0_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_set,
-    bcmpkt_sflow_shim_0_t_sys_source_set,
-    bcmpkt_sflow_shim_0_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 27, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 27, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 31, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 31, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 7);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 7, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 23, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 23, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_discarded_get,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_mcast_get,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_truncated_get,
-    bcmpkt_sflow_shim_1_t_reserved_get,
-    bcmpkt_sflow_shim_1_t_sys_opcode_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_discarded_set,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_mcast_set,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_truncated_set,
-    bcmpkt_sflow_shim_1_t_reserved_set,
-    bcmpkt_sflow_shim_1_t_sys_opcode_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_get,
-    bcmpkt_sflow_shim_2_t_user_meta_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_set,
-    bcmpkt_sflow_shim_2_t_user_meta_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_get,
-    bcmpkt_snap_llc_t_snap_llc_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_set,
-    bcmpkt_snap_llc_t_snap_llc_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_field_data,
-};
-
-
-static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_svtag_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FID_COUNT] = {
-    bcmpkt_svtag_t_data_lwr_get,
-    bcmpkt_svtag_t_data_upr_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_svtag_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FID_COUNT] = {
-    bcmpkt_svtag_t_data_lwr_set,
-    bcmpkt_svtag_t_data_upr_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_svtag_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_svtag_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_SVTAG_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_svtag_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_get,
-    bcmpkt_tcp_first_4bytes_t_src_port_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_set,
-    bcmpkt_tcp_first_4bytes_t_src_port_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_get,
-    bcmpkt_tcp_last_16bytes_t_checksum_get,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
-    bcmpkt_tcp_last_16bytes_t_seq_num_get,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
-    bcmpkt_tcp_last_16bytes_t_win_size_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_set,
-    bcmpkt_tcp_last_16bytes_t_checksum_set,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
-    bcmpkt_tcp_last_16bytes_t_seq_num_set,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
-    bcmpkt_tcp_last_16bytes_t_win_size_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_udp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_get,
-    bcmpkt_udp_t_dst_port_get,
-    bcmpkt_udp_t_src_port_get,
-    bcmpkt_udp_t_udp_length_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_udp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_set,
-    bcmpkt_udp_t_dst_port_set,
-    bcmpkt_udp_t_src_port_set,
-    bcmpkt_udp_t_udp_length_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_udp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_udp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_udp_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_field_data,
-};
-
-
-static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_vlan_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_get,
-    bcmpkt_vlan_t_pcp_get,
-    bcmpkt_vlan_t_tpid_get,
-    bcmpkt_vlan_t_vid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_vlan_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_set,
-    bcmpkt_vlan_t_pcp_set,
-    bcmpkt_vlan_t_tpid_set,
-    bcmpkt_vlan_t_vid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_vlan_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_vlan_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_vlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_vntag_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT] = {
-    bcmpkt_vntag_t_tag_get,
-    bcmpkt_vntag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_vntag_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT] = {
-    bcmpkt_vntag_t_tag_set,
-    bcmpkt_vntag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_vntag_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_vntag_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_vntag_t_field_data,
-};
-
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_vxlan_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_get,
-    bcmpkt_vxlan_t_reserved2_get,
-    bcmpkt_vxlan_t_vn_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_vxlan_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_set,
-    bcmpkt_vxlan_t_reserved2_set,
-    bcmpkt_vxlan_t_vn_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_vxlan_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_vxlan_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_vxlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_31_3_0_wesp_t_fget[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_get,
-    bcmpkt_wesp_t_header_len_get,
-    bcmpkt_wesp_t_next_header_get,
-    bcmpkt_wesp_t_seq_num_get,
-    bcmpkt_wesp_t_spi_get,
-    bcmpkt_wesp_t_trailer_len_get,
-    bcmpkt_wesp_t_wesp_iv_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_31_3_0_wesp_t_fset[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_set,
-    bcmpkt_wesp_t_header_len_set,
-    bcmpkt_wesp_t_next_header_set,
-    bcmpkt_wesp_t_seq_num_set,
-    bcmpkt_wesp_t_spi_set,
-    bcmpkt_wesp_t_trailer_len_set,
-    bcmpkt_wesp_t_wesp_iv_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_31_3_0_wesp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_31_3_0_wesp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_31_3_0_wesp_t_field_data,
-};
-
-static bcmpkt_flex_pmd_info_t bcm56780_a0_hna_6_5_31_3_0_flexhdr_info_list[BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT] = {
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_arp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_arp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_arp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_authen_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_authen_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_authen_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_bfd_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_bfd_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_bfd_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_cntag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_cntag_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_cntag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_cpu_composites_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_dest_option_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_dest_option_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_dest_option_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ep_nih_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_esp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_esp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_esp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_etag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_etag_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_etag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ethertype_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ethertype_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ethertype_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_frag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_frag_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_frag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_generic_loopback_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_gpe_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gpe_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gpe_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gre_chksum_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_gre_key_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gre_key_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gre_key_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gre_rout_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gre_seq_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_gre_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_gre_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_gre_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_hop_by_hop_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_icmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_icmp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_icmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_md_base_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ifa_metadata_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_igmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_igmp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_igmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ipfix_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ipfix_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ipfix_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ipv4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ipv4_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ipv4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_ipv6_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_ipv6_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_ipv6_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_l2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_l2_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_l2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mirror_transport_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mpls_ach_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mpls_bv_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mpls_cw_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_mpls_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_mpls_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_mpls_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_p_1588_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_p_1588_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_p_1588_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_psamp_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_psamp_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_rarp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_rarp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_rarp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_routing_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_routing_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_routing_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_rspan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_rspan_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_rspan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_sflow_shim_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_snap_llc_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_svtag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_svtag_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_svtag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_udp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_udp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_udp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_unknown_l3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_unknown_l4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_unknown_l5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_vlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_vlan_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_vlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_vntag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_vntag_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_vntag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_vxlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_vxlan_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_vxlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_wesp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_31_3_0_wesp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_31_3_0_wesp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_field_info,
-        .reasons_info = &bcm56780_a0_hna_6_5_31_3_0_rxpmd_flex_reasons_info,
-        .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
-        .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
-    },
-};
-
-static shr_enum_map_t bcm56780_a0_hna_6_5_31_3_0_flexhdr_id_map[] = {
-    BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
-};
-
-shr_enum_map_t * bcm56780_a0_hna_6_5_31_3_0_flexhdr_map_get(void)
-{
-    return bcm56780_a0_hna_6_5_31_3_0_flexhdr_id_map;
-}
-
-bcmpkt_flex_pmd_info_t * bcm56780_a0_hna_6_5_31_3_0_flex_pmd_info_get(uint32_t hid)
-{
-    if (hid >= BCM56780_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT) {
-        return NULL;
-    }
-
-    return &bcm56780_a0_hna_6_5_31_3_0_flexhdr_info_list[hid];
-}
-
-int bcm56780_a0_hna_6_5_31_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
-    14,
-    -1,
-    -1,
-    66,
-};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 00000000000..cb3327e731a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,2480 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_hna_6_5_32_2_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant hna_6_5_32_2_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
+        .match        = 0x40,
+        .match_mask   = 0x60,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SVTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
+        .match        = 0x20,
+        .match_mask   = 0x60,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
+        .match        = 0x40,
+        .match_mask   = 0x60,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
+        .match        = 0x20,
+        .match_mask   = 0x60,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
+        .match        = 0x40,
+        .match_mask   = 0x60,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
+        .match        = 0x20,
+        .match_mask   = 0x60,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
+        .match        = 0x40,
+        .match_mask   = 0x60,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SVTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
+        .match        = 0x20,
+        .match_mask   = 0x60,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info = {
+    .num_entries = 173,
+    .db = bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info = {
+    .num_entries = 173,
+    .map = bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_pkt_flexhdr.c
new file mode 100644
index 00000000000..21a7ece3ac1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_pkt_flexhdr.c
@@ -0,0 +1,9195 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56780_a0 and variant hna_6_5_32_2_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[13] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[13] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[13] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[13] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[13] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[13] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[13] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[13] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[13] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[13] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[13] |= (0x1 << 31);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 80, 95 }, /* Profile 12. */
+            { 80, 95 }, /* Profile 13. */
+            { 80, 95 }, /* Profile 14. */
+            { 80, 95 }, /* Profile 15. */
+            { 80, 95 }, /* Profile 16. */
+            { 80, 95 }, /* Profile 17. */
+            { 80, 95 }, /* Profile 18. */
+            { 80, 95 }, /* Profile 19. */
+            { 80, 95 }, /* Profile 20. */
+            { 80, 95 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { 80, 95 }, /* Profile 32. */
+            { 80, 95 }, /* Profile 33. */
+            { 80, 95 }, /* Profile 34. */
+            { 80, 95 }, /* Profile 35. */
+            { 80, 95 }, /* Profile 36. */
+            { 80, 95 }, /* Profile 37. */
+            { 80, 95 }, /* Profile 38. */
+            { 80, 95 }, /* Profile 39. */
+            { 80, 95 }, /* Profile 40. */
+            { 80, 95 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 48, 63 }, /* Profile 10. */
+            { 48, 63 }, /* Profile 11. */
+            { 48, 63 }, /* Profile 12. */
+            { 48, 63 }, /* Profile 13. */
+            { 48, 63 }, /* Profile 14. */
+            { 48, 63 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { 48, 63 }, /* Profile 20. */
+            { 48, 63 }, /* Profile 21. */
+            { 48, 63 }, /* Profile 22. */
+            { 48, 63 }, /* Profile 23. */
+            { 48, 63 }, /* Profile 24. */
+            { 48, 63 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 48, 63 }, /* Profile 30. */
+            { 48, 63 }, /* Profile 31. */
+            { 48, 63 }, /* Profile 32. */
+            { 48, 63 }, /* Profile 33. */
+            { 48, 63 }, /* Profile 34. */
+            { 48, 63 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { 48, 63 }, /* Profile 40. */
+            { 48, 63 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 383 }, /* Profile 2. */
+            { 368, 383 }, /* Profile 3. */
+            { 368, 383 }, /* Profile 4. */
+            { 368, 383 }, /* Profile 5. */
+            { 368, 383 }, /* Profile 6. */
+            { 368, 383 }, /* Profile 7. */
+            { 368, 383 }, /* Profile 8. */
+            { 368, 383 }, /* Profile 9. */
+            { 368, 383 }, /* Profile 10. */
+            { 368, 383 }, /* Profile 11. */
+            { 368, 383 }, /* Profile 12. */
+            { 368, 383 }, /* Profile 13. */
+            { 368, 383 }, /* Profile 14. */
+            { 368, 383 }, /* Profile 15. */
+            { 368, 383 }, /* Profile 16. */
+            { 368, 383 }, /* Profile 17. */
+            { 368, 383 }, /* Profile 18. */
+            { 368, 383 }, /* Profile 19. */
+            { 368, 383 }, /* Profile 20. */
+            { 368, 383 }, /* Profile 21. */
+            { 368, 383 }, /* Profile 22. */
+            { 368, 383 }, /* Profile 23. */
+            { 368, 383 }, /* Profile 24. */
+            { 368, 383 }, /* Profile 25. */
+            { 368, 383 }, /* Profile 26. */
+            { 368, 383 }, /* Profile 27. */
+            { 368, 383 }, /* Profile 28. */
+            { 368, 383 }, /* Profile 29. */
+            { 368, 383 }, /* Profile 30. */
+            { 368, 383 }, /* Profile 31. */
+            { 368, 383 }, /* Profile 32. */
+            { 368, 383 }, /* Profile 33. */
+            { 368, 383 }, /* Profile 34. */
+            { 368, 383 }, /* Profile 35. */
+            { 368, 383 }, /* Profile 36. */
+            { 368, 383 }, /* Profile 37. */
+            { 368, 383 }, /* Profile 38. */
+            { 368, 383 }, /* Profile 39. */
+            { 368, 383 }, /* Profile 40. */
+            { 368, 383 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 119 }, /* Profile 2. */
+            { 112, 119 }, /* Profile 3. */
+            { 112, 119 }, /* Profile 4. */
+            { 112, 119 }, /* Profile 5. */
+            { 112, 119 }, /* Profile 6. */
+            { 112, 119 }, /* Profile 7. */
+            { 112, 119 }, /* Profile 8. */
+            { 112, 119 }, /* Profile 9. */
+            { 112, 119 }, /* Profile 10. */
+            { 112, 119 }, /* Profile 11. */
+            { 112, 119 }, /* Profile 12. */
+            { 112, 119 }, /* Profile 13. */
+            { 112, 119 }, /* Profile 14. */
+            { 112, 119 }, /* Profile 15. */
+            { 112, 119 }, /* Profile 16. */
+            { 112, 119 }, /* Profile 17. */
+            { 112, 119 }, /* Profile 18. */
+            { 112, 119 }, /* Profile 19. */
+            { 112, 119 }, /* Profile 20. */
+            { 112, 119 }, /* Profile 21. */
+            { 112, 119 }, /* Profile 22. */
+            { 112, 119 }, /* Profile 23. */
+            { 112, 119 }, /* Profile 24. */
+            { 112, 119 }, /* Profile 25. */
+            { 112, 119 }, /* Profile 26. */
+            { 112, 119 }, /* Profile 27. */
+            { 112, 119 }, /* Profile 28. */
+            { 112, 119 }, /* Profile 29. */
+            { 112, 119 }, /* Profile 30. */
+            { 112, 119 }, /* Profile 31. */
+            { 112, 119 }, /* Profile 32. */
+            { 112, 119 }, /* Profile 33. */
+            { 112, 119 }, /* Profile 34. */
+            { 112, 119 }, /* Profile 35. */
+            { 112, 119 }, /* Profile 36. */
+            { 112, 119 }, /* Profile 37. */
+            { 112, 119 }, /* Profile 38. */
+            { 112, 119 }, /* Profile 39. */
+            { 112, 119 }, /* Profile 40. */
+            { 112, 119 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "EGR_MTOP_INDEX_HI_3_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+            { 384, 387 }, /* Profile 6. */
+            { 384, 387 }, /* Profile 7. */
+            { 384, 387 }, /* Profile 8. */
+            { 384, 387 }, /* Profile 9. */
+            { 384, 387 }, /* Profile 10. */
+            { 384, 387 }, /* Profile 11. */
+            { 384, 387 }, /* Profile 12. */
+            { 384, 387 }, /* Profile 13. */
+            { 384, 387 }, /* Profile 14. */
+            { 384, 387 }, /* Profile 15. */
+            { 384, 387 }, /* Profile 16. */
+            { 384, 387 }, /* Profile 17. */
+            { 384, 387 }, /* Profile 18. */
+            { 384, 387 }, /* Profile 19. */
+            { 384, 387 }, /* Profile 20. */
+            { 384, 387 }, /* Profile 21. */
+            { 384, 387 }, /* Profile 22. */
+            { 384, 387 }, /* Profile 23. */
+            { 384, 387 }, /* Profile 24. */
+            { 384, 387 }, /* Profile 25. */
+            { 384, 387 }, /* Profile 26. */
+            { 384, 387 }, /* Profile 27. */
+            { 384, 387 }, /* Profile 28. */
+            { 384, 387 }, /* Profile 29. */
+            { 384, 387 }, /* Profile 30. */
+            { 384, 387 }, /* Profile 31. */
+            { 384, 387 }, /* Profile 32. */
+            { 384, 387 }, /* Profile 33. */
+            { 384, 387 }, /* Profile 34. */
+            { 384, 387 }, /* Profile 35. */
+            { 384, 387 }, /* Profile 36. */
+            { 384, 387 }, /* Profile 37. */
+            { 384, 387 }, /* Profile 38. */
+            { 384, 387 }, /* Profile 39. */
+            { 384, 387 }, /* Profile 40. */
+            { 384, 387 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 48, 63 }, /* Profile 6. */
+            { 48, 63 }, /* Profile 7. */
+            { 48, 63 }, /* Profile 8. */
+            { 48, 63 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { 48, 63 }, /* Profile 16. */
+            { 48, 63 }, /* Profile 17. */
+            { 48, 63 }, /* Profile 18. */
+            { 48, 63 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { 48, 63 }, /* Profile 26. */
+            { 48, 63 }, /* Profile 27. */
+            { 48, 63 }, /* Profile 28. */
+            { 48, 63 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { 48, 63 }, /* Profile 36. */
+            { 48, 63 }, /* Profile 37. */
+            { 48, 63 }, /* Profile 38. */
+            { 48, 63 }, /* Profile 39. */
+        },
+        .profile_cnt = 40,
+    },
+    {
+        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 95 }, /* Profile 2. */
+            { 80, 95 }, /* Profile 3. */
+            { 80, 95 }, /* Profile 4. */
+            { 80, 95 }, /* Profile 5. */
+            { 80, 95 }, /* Profile 6. */
+            { 80, 95 }, /* Profile 7. */
+            { 80, 95 }, /* Profile 8. */
+            { 80, 95 }, /* Profile 9. */
+            { 80, 95 }, /* Profile 10. */
+            { 80, 95 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { 80, 95 }, /* Profile 22. */
+            { 80, 95 }, /* Profile 23. */
+            { 80, 95 }, /* Profile 24. */
+            { 80, 95 }, /* Profile 25. */
+            { 80, 95 }, /* Profile 26. */
+            { 80, 95 }, /* Profile 27. */
+            { 80, 95 }, /* Profile 28. */
+            { 80, 95 }, /* Profile 29. */
+            { 80, 95 }, /* Profile 30. */
+            { 80, 95 }, /* Profile 31. */
+        },
+        .profile_cnt = 32,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 424, 427 }, /* Profile 2. */
+            { 424, 427 }, /* Profile 3. */
+            { 424, 427 }, /* Profile 4. */
+            { 424, 427 }, /* Profile 5. */
+            { 424, 427 }, /* Profile 6. */
+            { 424, 427 }, /* Profile 7. */
+            { 424, 427 }, /* Profile 8. */
+            { 424, 427 }, /* Profile 9. */
+            { 424, 427 }, /* Profile 10. */
+            { 424, 427 }, /* Profile 11. */
+            { 424, 427 }, /* Profile 12. */
+            { 424, 427 }, /* Profile 13. */
+            { 424, 427 }, /* Profile 14. */
+            { 424, 427 }, /* Profile 15. */
+            { 424, 427 }, /* Profile 16. */
+            { 424, 427 }, /* Profile 17. */
+            { 424, 427 }, /* Profile 18. */
+            { 424, 427 }, /* Profile 19. */
+            { 424, 427 }, /* Profile 20. */
+            { 424, 427 }, /* Profile 21. */
+            { 424, 427 }, /* Profile 22. */
+            { 424, 427 }, /* Profile 23. */
+            { 424, 427 }, /* Profile 24. */
+            { 424, 427 }, /* Profile 25. */
+            { 424, 427 }, /* Profile 26. */
+            { 424, 427 }, /* Profile 27. */
+            { 424, 427 }, /* Profile 28. */
+            { 424, 427 }, /* Profile 29. */
+            { 424, 427 }, /* Profile 30. */
+            { 424, 427 }, /* Profile 31. */
+            { 424, 427 }, /* Profile 32. */
+            { 424, 427 }, /* Profile 33. */
+            { 424, 427 }, /* Profile 34. */
+            { 424, 427 }, /* Profile 35. */
+            { 424, 427 }, /* Profile 36. */
+            { 424, 427 }, /* Profile 37. */
+            { 424, 427 }, /* Profile 38. */
+            { 424, 427 }, /* Profile 39. */
+            { 424, 427 }, /* Profile 40. */
+            { 424, 427 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+            { 128, 143 }, /* Profile 6. */
+            { 128, 143 }, /* Profile 7. */
+            { 128, 143 }, /* Profile 8. */
+            { 128, 143 }, /* Profile 9. */
+            { 128, 143 }, /* Profile 10. */
+            { 128, 143 }, /* Profile 11. */
+            { 128, 143 }, /* Profile 12. */
+            { 128, 143 }, /* Profile 13. */
+            { 128, 143 }, /* Profile 14. */
+            { 128, 143 }, /* Profile 15. */
+            { 128, 143 }, /* Profile 16. */
+            { 128, 143 }, /* Profile 17. */
+            { 128, 143 }, /* Profile 18. */
+            { 128, 143 }, /* Profile 19. */
+            { 128, 143 }, /* Profile 20. */
+            { 128, 143 }, /* Profile 21. */
+            { 128, 143 }, /* Profile 22. */
+            { 128, 143 }, /* Profile 23. */
+            { 128, 143 }, /* Profile 24. */
+            { 128, 143 }, /* Profile 25. */
+            { 128, 143 }, /* Profile 26. */
+            { 128, 143 }, /* Profile 27. */
+            { 128, 143 }, /* Profile 28. */
+            { 128, 143 }, /* Profile 29. */
+            { 128, 143 }, /* Profile 30. */
+            { 128, 143 }, /* Profile 31. */
+            { 128, 143 }, /* Profile 32. */
+            { 128, 143 }, /* Profile 33. */
+            { 128, 143 }, /* Profile 34. */
+            { 128, 143 }, /* Profile 35. */
+            { 128, 143 }, /* Profile 36. */
+            { 128, 143 }, /* Profile 37. */
+            { 128, 143 }, /* Profile 38. */
+            { 128, 143 }, /* Profile 39. */
+            { 128, 143 }, /* Profile 40. */
+            { 128, 143 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
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+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 272, 287 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 5. */
+            { 288, 303 }, /* Profile 6. */
+            { 288, 303 }, /* Profile 7. */
+            { 272, 287 }, /* Profile 8. */
+            { 272, 287 }, /* Profile 9. */
+            { 288, 303 }, /* Profile 10. */
+            { 272, 287 }, /* Profile 11. */
+            { 288, 303 }, /* Profile 12. */
+            { 288, 303 }, /* Profile 13. */
+            { 272, 287 }, /* Profile 14. */
+            { 272, 287 }, /* Profile 15. */
+            { 288, 303 }, /* Profile 16. */
+            { 288, 303 }, /* Profile 17. */
+            { 272, 287 }, /* Profile 18. */
+            { 272, 287 }, /* Profile 19. */
+            { 288, 303 }, /* Profile 20. */
+            { 272, 287 }, /* Profile 21. */
+            { 288, 303 }, /* Profile 22. */
+            { 288, 303 }, /* Profile 23. */
+            { 272, 287 }, /* Profile 24. */
+            { 272, 287 }, /* Profile 25. */
+            { 288, 303 }, /* Profile 26. */
+            { 288, 303 }, /* Profile 27. */
+            { 272, 287 }, /* Profile 28. */
+            { 272, 287 }, /* Profile 29. */
+            { 288, 303 }, /* Profile 30. */
+            { 272, 287 }, /* Profile 31. */
+            { 288, 303 }, /* Profile 32. */
+            { 288, 303 }, /* Profile 33. */
+            { 272, 287 }, /* Profile 34. */
+            { 272, 287 }, /* Profile 35. */
+            { 288, 303 }, /* Profile 36. */
+            { 288, 303 }, /* Profile 37. */
+            { 272, 287 }, /* Profile 38. */
+            { 272, 287 }, /* Profile 39. */
+            { 288, 303 }, /* Profile 40. */
+            { 272, 287 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+            { 400, 403 }, /* Profile 6. */
+            { 400, 403 }, /* Profile 7. */
+            { 400, 403 }, /* Profile 8. */
+            { 400, 403 }, /* Profile 9. */
+            { 400, 403 }, /* Profile 10. */
+            { 400, 403 }, /* Profile 11. */
+            { 400, 403 }, /* Profile 12. */
+            { 400, 403 }, /* Profile 13. */
+            { 400, 403 }, /* Profile 14. */
+            { 400, 403 }, /* Profile 15. */
+            { 400, 403 }, /* Profile 16. */
+            { 400, 403 }, /* Profile 17. */
+            { 400, 403 }, /* Profile 18. */
+            { 400, 403 }, /* Profile 19. */
+            { 400, 403 }, /* Profile 20. */
+            { 400, 403 }, /* Profile 21. */
+            { 400, 403 }, /* Profile 22. */
+            { 400, 403 }, /* Profile 23. */
+            { 400, 403 }, /* Profile 24. */
+            { 400, 403 }, /* Profile 25. */
+            { 400, 403 }, /* Profile 26. */
+            { 400, 403 }, /* Profile 27. */
+            { 400, 403 }, /* Profile 28. */
+            { 400, 403 }, /* Profile 29. */
+            { 400, 403 }, /* Profile 30. */
+            { 400, 403 }, /* Profile 31. */
+            { 400, 403 }, /* Profile 32. */
+            { 400, 403 }, /* Profile 33. */
+            { 400, 403 }, /* Profile 34. */
+            { 400, 403 }, /* Profile 35. */
+            { 400, 403 }, /* Profile 36. */
+            { 400, 403 }, /* Profile 37. */
+            { 400, 403 }, /* Profile 38. */
+            { 400, 403 }, /* Profile 39. */
+            { 400, 403 }, /* Profile 40. */
+            { 400, 403 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 239 }, /* Profile 2. */
+            { 224, 239 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 5. */
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+            { 224, 239 }, /* Profile 7. */
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+            { 208, 223 }, /* Profile 9. */
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+            { 224, 239 }, /* Profile 12. */
+            { 224, 239 }, /* Profile 13. */
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+            { 208, 223 }, /* Profile 15. */
+            { 224, 239 }, /* Profile 16. */
+            { 224, 239 }, /* Profile 17. */
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+            { 208, 223 }, /* Profile 19. */
+            { 224, 239 }, /* Profile 20. */
+            { 208, 223 }, /* Profile 21. */
+            { 224, 239 }, /* Profile 22. */
+            { 224, 239 }, /* Profile 23. */
+            { 208, 223 }, /* Profile 24. */
+            { 208, 223 }, /* Profile 25. */
+            { 224, 239 }, /* Profile 26. */
+            { 224, 239 }, /* Profile 27. */
+            { 208, 223 }, /* Profile 28. */
+            { 208, 223 }, /* Profile 29. */
+            { 224, 239 }, /* Profile 30. */
+            { 208, 223 }, /* Profile 31. */
+            { 224, 239 }, /* Profile 32. */
+            { 224, 239 }, /* Profile 33. */
+            { 208, 223 }, /* Profile 34. */
+            { 208, 223 }, /* Profile 35. */
+            { 224, 239 }, /* Profile 36. */
+            { 224, 239 }, /* Profile 37. */
+            { 208, 223 }, /* Profile 38. */
+            { 208, 223 }, /* Profile 39. */
+            { 224, 239 }, /* Profile 40. */
+            { 208, 223 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 420, 423 }, /* Profile 2. */
+            { 420, 423 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+            { 420, 423 }, /* Profile 5. */
+            { 420, 423 }, /* Profile 6. */
+            { 420, 423 }, /* Profile 7. */
+            { 420, 423 }, /* Profile 8. */
+            { 420, 423 }, /* Profile 9. */
+            { 420, 423 }, /* Profile 10. */
+            { 420, 423 }, /* Profile 11. */
+            { 420, 423 }, /* Profile 12. */
+            { 420, 423 }, /* Profile 13. */
+            { 420, 423 }, /* Profile 14. */
+            { 420, 423 }, /* Profile 15. */
+            { 420, 423 }, /* Profile 16. */
+            { 420, 423 }, /* Profile 17. */
+            { 420, 423 }, /* Profile 18. */
+            { 420, 423 }, /* Profile 19. */
+            { 420, 423 }, /* Profile 20. */
+            { 420, 423 }, /* Profile 21. */
+            { 420, 423 }, /* Profile 22. */
+            { 420, 423 }, /* Profile 23. */
+            { 420, 423 }, /* Profile 24. */
+            { 420, 423 }, /* Profile 25. */
+            { 420, 423 }, /* Profile 26. */
+            { 420, 423 }, /* Profile 27. */
+            { 420, 423 }, /* Profile 28. */
+            { 420, 423 }, /* Profile 29. */
+            { 420, 423 }, /* Profile 30. */
+            { 420, 423 }, /* Profile 31. */
+            { 420, 423 }, /* Profile 32. */
+            { 420, 423 }, /* Profile 33. */
+            { 420, 423 }, /* Profile 34. */
+            { 420, 423 }, /* Profile 35. */
+            { 420, 423 }, /* Profile 36. */
+            { 420, 423 }, /* Profile 37. */
+            { 420, 423 }, /* Profile 38. */
+            { 420, 423 }, /* Profile 39. */
+            { 420, 423 }, /* Profile 40. */
+            { 420, 423 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { 208, 223 }, /* Profile 22. */
+            { 208, 223 }, /* Profile 23. */
+            { 192, 207 }, /* Profile 24. */
+            { 192, 207 }, /* Profile 25. */
+            { 208, 223 }, /* Profile 26. */
+            { 208, 223 }, /* Profile 27. */
+            { 192, 207 }, /* Profile 28. */
+            { 192, 207 }, /* Profile 29. */
+            { 208, 223 }, /* Profile 30. */
+            { 192, 207 }, /* Profile 31. */
+            { 208, 223 }, /* Profile 32. */
+            { 208, 223 }, /* Profile 33. */
+            { 192, 207 }, /* Profile 34. */
+            { 192, 207 }, /* Profile 35. */
+            { 208, 223 }, /* Profile 36. */
+            { 208, 223 }, /* Profile 37. */
+            { 192, 207 }, /* Profile 38. */
+            { 192, 207 }, /* Profile 39. */
+            { 208, 223 }, /* Profile 40. */
+            { 192, 207 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 416, 419 }, /* Profile 2. */
+            { 416, 419 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+            { 416, 419 }, /* Profile 5. */
+            { 416, 419 }, /* Profile 6. */
+            { 416, 419 }, /* Profile 7. */
+            { 416, 419 }, /* Profile 8. */
+            { 416, 419 }, /* Profile 9. */
+            { 416, 419 }, /* Profile 10. */
+            { 416, 419 }, /* Profile 11. */
+            { 416, 419 }, /* Profile 12. */
+            { 416, 419 }, /* Profile 13. */
+            { 416, 419 }, /* Profile 14. */
+            { 416, 419 }, /* Profile 15. */
+            { 416, 419 }, /* Profile 16. */
+            { 416, 419 }, /* Profile 17. */
+            { 416, 419 }, /* Profile 18. */
+            { 416, 419 }, /* Profile 19. */
+            { 416, 419 }, /* Profile 20. */
+            { 416, 419 }, /* Profile 21. */
+            { 416, 419 }, /* Profile 22. */
+            { 416, 419 }, /* Profile 23. */
+            { 416, 419 }, /* Profile 24. */
+            { 416, 419 }, /* Profile 25. */
+            { 416, 419 }, /* Profile 26. */
+            { 416, 419 }, /* Profile 27. */
+            { 416, 419 }, /* Profile 28. */
+            { 416, 419 }, /* Profile 29. */
+            { 416, 419 }, /* Profile 30. */
+            { 416, 419 }, /* Profile 31. */
+            { 416, 419 }, /* Profile 32. */
+            { 416, 419 }, /* Profile 33. */
+            { 416, 419 }, /* Profile 34. */
+            { 416, 419 }, /* Profile 35. */
+            { 416, 419 }, /* Profile 36. */
+            { 416, 419 }, /* Profile 37. */
+            { 416, 419 }, /* Profile 38. */
+            { 416, 419 }, /* Profile 39. */
+            { 416, 419 }, /* Profile 40. */
+            { 416, 419 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
+            { 412, 415 }, /* Profile 6. */
+            { 412, 415 }, /* Profile 7. */
+            { 412, 415 }, /* Profile 8. */
+            { 412, 415 }, /* Profile 9. */
+            { 412, 415 }, /* Profile 10. */
+            { 412, 415 }, /* Profile 11. */
+            { 412, 415 }, /* Profile 12. */
+            { 412, 415 }, /* Profile 13. */
+            { 412, 415 }, /* Profile 14. */
+            { 412, 415 }, /* Profile 15. */
+            { 412, 415 }, /* Profile 16. */
+            { 412, 415 }, /* Profile 17. */
+            { 412, 415 }, /* Profile 18. */
+            { 412, 415 }, /* Profile 19. */
+            { 412, 415 }, /* Profile 20. */
+            { 412, 415 }, /* Profile 21. */
+            { 412, 415 }, /* Profile 22. */
+            { 412, 415 }, /* Profile 23. */
+            { 412, 415 }, /* Profile 24. */
+            { 412, 415 }, /* Profile 25. */
+            { 412, 415 }, /* Profile 26. */
+            { 412, 415 }, /* Profile 27. */
+            { 412, 415 }, /* Profile 28. */
+            { 412, 415 }, /* Profile 29. */
+            { 412, 415 }, /* Profile 30. */
+            { 412, 415 }, /* Profile 31. */
+            { 412, 415 }, /* Profile 32. */
+            { 412, 415 }, /* Profile 33. */
+            { 412, 415 }, /* Profile 34. */
+            { 412, 415 }, /* Profile 35. */
+            { 412, 415 }, /* Profile 36. */
+            { 412, 415 }, /* Profile 37. */
+            { 412, 415 }, /* Profile 38. */
+            { 412, 415 }, /* Profile 39. */
+            { 412, 415 }, /* Profile 40. */
+            { 412, 415 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 336, 351 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+            { 336, 351 }, /* Profile 6. */
+            { 336, 351 }, /* Profile 7. */
+            { 320, 335 }, /* Profile 8. */
+            { 320, 335 }, /* Profile 9. */
+            { 336, 351 }, /* Profile 10. */
+            { 320, 335 }, /* Profile 11. */
+            { 336, 351 }, /* Profile 12. */
+            { 336, 351 }, /* Profile 13. */
+            { 320, 335 }, /* Profile 14. */
+            { 320, 335 }, /* Profile 15. */
+            { 336, 351 }, /* Profile 16. */
+            { 336, 351 }, /* Profile 17. */
+            { 320, 335 }, /* Profile 18. */
+            { 320, 335 }, /* Profile 19. */
+            { 336, 351 }, /* Profile 20. */
+            { 320, 335 }, /* Profile 21. */
+            { 336, 351 }, /* Profile 22. */
+            { 336, 351 }, /* Profile 23. */
+            { 320, 335 }, /* Profile 24. */
+            { 320, 335 }, /* Profile 25. */
+            { 336, 351 }, /* Profile 26. */
+            { 336, 351 }, /* Profile 27. */
+            { 320, 335 }, /* Profile 28. */
+            { 320, 335 }, /* Profile 29. */
+            { 336, 351 }, /* Profile 30. */
+            { 320, 335 }, /* Profile 31. */
+            { 336, 351 }, /* Profile 32. */
+            { 336, 351 }, /* Profile 33. */
+            { 320, 335 }, /* Profile 34. */
+            { 320, 335 }, /* Profile 35. */
+            { 336, 351 }, /* Profile 36. */
+            { 336, 351 }, /* Profile 37. */
+            { 320, 335 }, /* Profile 38. */
+            { 320, 335 }, /* Profile 39. */
+            { 336, 351 }, /* Profile 40. */
+            { 320, 335 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
+        .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
+            { 392, 395 }, /* Profile 6. */
+            { 392, 395 }, /* Profile 7. */
+            { 392, 395 }, /* Profile 8. */
+            { 392, 395 }, /* Profile 9. */
+            { 392, 395 }, /* Profile 10. */
+            { 392, 395 }, /* Profile 11. */
+            { 392, 395 }, /* Profile 12. */
+            { 392, 395 }, /* Profile 13. */
+            { 392, 395 }, /* Profile 14. */
+            { 392, 395 }, /* Profile 15. */
+            { 392, 395 }, /* Profile 16. */
+            { 392, 395 }, /* Profile 17. */
+            { 392, 395 }, /* Profile 18. */
+            { 392, 395 }, /* Profile 19. */
+            { 392, 395 }, /* Profile 20. */
+            { 392, 395 }, /* Profile 21. */
+            { 392, 395 }, /* Profile 22. */
+            { 392, 395 }, /* Profile 23. */
+            { 392, 395 }, /* Profile 24. */
+            { 392, 395 }, /* Profile 25. */
+            { 392, 395 }, /* Profile 26. */
+            { 392, 395 }, /* Profile 27. */
+            { 392, 395 }, /* Profile 28. */
+            { 392, 395 }, /* Profile 29. */
+            { 392, 395 }, /* Profile 30. */
+            { 392, 395 }, /* Profile 31. */
+            { 392, 395 }, /* Profile 32. */
+            { 392, 395 }, /* Profile 33. */
+            { 392, 395 }, /* Profile 34. */
+            { 392, 395 }, /* Profile 35. */
+            { 392, 395 }, /* Profile 36. */
+            { 392, 395 }, /* Profile 37. */
+            { 392, 395 }, /* Profile 38. */
+            { 392, 395 }, /* Profile 39. */
+            { 392, 395 }, /* Profile 40. */
+            { 392, 395 }, /* Profile 41. */
+        },
+        .profile_cnt = 42,
+    },
+};
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_field_data,
+    .profile_bmp_cnt = 2,
+    .profile_bmp[0] = 0xfffffffc,
+    .profile_bmp[1] = 0x3ff,
+
+};
+
+static shr_enum_map_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_names[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_arp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_arp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_arp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_arp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_authen_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_authen_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_authen_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_authen_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_bfd_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_bfd_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_bfd_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_bfd_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_cntag_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_cntag_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_cntag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_cntag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_dest_option_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_dest_option_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_dest_option_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_dest_option_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_esp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_esp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_esp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_esp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_etag_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_get,
+    bcmpkt_etag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_etag_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_set,
+    bcmpkt_etag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_etag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_etag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_etag_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ethertype_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ethertype_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ethertype_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ethertype_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_frag_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_frag_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_frag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_frag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+    bcmpkt_generic_loopback_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+    bcmpkt_generic_loopback_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gpe_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gpe_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gpe_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gpe_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gre_key_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gre_key_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gre_key_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gre_key_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gre_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gre_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gre_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gre_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_icmp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_icmp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_icmp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_icmp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_get,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_set,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_get,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_md_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_set,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_md_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_get,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_t_metadata_get,
+    bcmpkt_ifa_metadata_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_set,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_t_metadata_set,
+    bcmpkt_ifa_metadata_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_igmp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_igmp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_igmp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_igmp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ipfix_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ipfix_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ipfix_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ipfix_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ipv4_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ipv4_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ipv4_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ipv4_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ipv6_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ipv6_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ipv6_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ipv6_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_l2_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_l2_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_l2_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_l2_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mpls_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mpls_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mpls_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mpls_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_p_1588_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_p_1588_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_p_1588_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_p_1588_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_rarp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_rarp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_rarp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_rarp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_routing_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_routing_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_routing_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_routing_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_rspan_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_rspan_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_rspan_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_rspan_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_svtag_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_get,
+    bcmpkt_svtag_t_data_upr_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_svtag_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_set,
+    bcmpkt_svtag_t_data_upr_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_svtag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_svtag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_svtag_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_udp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_udp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_udp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_udp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_vlan_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_vlan_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_vlan_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_vlan_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_vntag_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_get,
+    bcmpkt_vntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_vntag_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_set,
+    bcmpkt_vntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_vntag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_vntag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_vntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_vxlan_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_vxlan_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_vxlan_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_vxlan_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_wesp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_wesp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_wesp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_wesp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_32_2_0_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56780_a0_hna_6_5_32_2_0_flexhdr_info_list[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_arp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_authen_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_bfd_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_cntag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_dest_option_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_esp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_etag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_etag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_etag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ethertype_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_frag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gpe_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gre_key_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gre_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_icmp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_igmp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ipfix_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ipv4_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ipv6_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_l2_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mpls_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_p_1588_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_rarp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_routing_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_rspan_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_svtag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_svtag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_svtag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_udp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_vlan_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_vntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_vntag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_vntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_vxlan_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_32_2_0_wesp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_32_2_0_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56780_a0_hna_6_5_32_2_0_flexhdr_id_map[] = {
+    BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56780_a0_hna_6_5_32_2_0_flexhdr_map_get(void)
+{
+    return bcm56780_a0_hna_6_5_32_2_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56780_a0_hna_6_5_32_2_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56780_a0_hna_6_5_32_2_0_flexhdr_info_list[hid];
+}
+
+int bcm56780_a0_hna_6_5_32_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    14,
+    -1,
+    -1,
+    66,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c
deleted file mode 100644
index 46f17d882e6..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c
+++ /dev/null
@@ -1,2410 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_hna_6_5_31_3_0_sf_match_id_info.yml
- * for device bcm56880_a0 and variant hna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h>
-
-
-static bcmpkt_rxpmd_match_id_db_t
-bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT] = {
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
-        .match        = 0x20,
-        .match_mask   = 0x30,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 40,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3f,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 5,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 40,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
-        .match        = 0x10,
-        .match_mask   = 0x30,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
-        .match        = 0x1800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x408,
-        .match_mask   = 0x64c,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x642,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x100,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
-        .match        = 0x1830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
-        .match        = 0x2,
-        .match_mask   = 0x42,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x202,
-        .match_mask   = 0x642,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x82,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x12,
-        .match_mask   = 0x72,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
-        .match        = 0x2000,
-        .match_mask   = 0x3830,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
-        .match        = 0x404,
-        .match_mask   = 0x64c,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
-        .match        = 0x4,
-        .match_mask   = 0x4c,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
-        .match        = 0x8,
-        .match_mask   = 0x4c,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
-        .match        = 0x42,
-        .match_mask   = 0x42,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
-        .match        = 0x44,
-        .match_mask   = 0x44,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
-        .match        = 0x48,
-        .match_mask   = 0x48,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
-        .match        = 0x50,
-        .match_mask   = 0x50,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
-        .match        = 0xc0,
-        .match_mask   = 0xc0,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x140,
-        .match_mask   = 0x140,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
-        .match        = 0x240,
-        .match_mask   = 0x240,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x70,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3870,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
-        .match        = 0x30,
-        .match_mask   = 0x70,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x10,
-        .match_mask   = 0x72,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x2030,
-        .match_mask   = 0x3870,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
-        .match        = 0x830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
-        .name         = "EGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
-        .match        = 0x20,
-        .match_mask   = 0x30,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 12,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 12,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 12,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3f,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 5,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 12,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 12,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 12,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
-        .match        = 0x10,
-        .match_mask   = 0x30,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 12,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
-        .match        = 0x1800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x408,
-        .match_mask   = 0x64c,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x642,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x100,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
-        .match        = 0x1830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
-        .match        = 0x2,
-        .match_mask   = 0x42,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x202,
-        .match_mask   = 0x642,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x82,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x12,
-        .match_mask   = 0x72,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
-        .match        = 0x2000,
-        .match_mask   = 0x3830,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
-        .match        = 0x404,
-        .match_mask   = 0x64c,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
-        .match        = 0x4,
-        .match_mask   = 0x4c,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
-        .match        = 0x8,
-        .match_mask   = 0x4c,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
-        .match        = 0x42,
-        .match_mask   = 0x42,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
-        .match        = 0x44,
-        .match_mask   = 0x44,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
-        .match        = 0x48,
-        .match_mask   = 0x48,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
-        .match        = 0x50,
-        .match_mask   = 0x50,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
-        .match        = 0xc0,
-        .match_mask   = 0xc0,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x140,
-        .match_mask   = 0x140,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
-        .match        = 0x240,
-        .match_mask   = 0x240,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x70,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3870,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
-        .match        = 0x30,
-        .match_mask   = 0x70,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x10,
-        .match_mask   = 0x72,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x2030,
-        .match_mask   = 0x3870,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
-        .match        = 0x830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
-        .match        = 0x20,
-        .match_mask   = 0x30,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 26,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 26,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 26,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3f,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 5,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 26,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 26,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 26,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
-        .match        = 0x10,
-        .match_mask   = 0x30,
-        .match_maxbit = 26,
-        .match_minbit = 21,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 26,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
-        .match        = 0x1800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x408,
-        .match_mask   = 0x64c,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x642,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x100,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
-        .match        = 0x2000,
-        .match_mask   = 0x3830,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
-        .match        = 0x404,
-        .match_mask   = 0x64c,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
-        .match        = 0x4,
-        .match_mask   = 0x4c,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
-        .match        = 0x8,
-        .match_mask   = 0x4c,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x2,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x70,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3870,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
-        .match        = 0x30,
-        .match_mask   = 0x70,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x3,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x10,
-        .match_mask   = 0x72,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x2030,
-        .match_mask   = 0x3870,
-        .match_maxbit = 40,
-        .match_minbit = 27,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 40,
-        .pminbit      = 27,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
-        .match        = 0x20,
-        .match_mask   = 0x30,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 6,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 6,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 6,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3f,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 5,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 6,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 6,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 6,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
-        .match        = 0x10,
-        .match_mask   = 0x30,
-        .match_maxbit = 6,
-        .match_minbit = 1,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 6,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
-        .match        = 0x1800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x408,
-        .match_mask   = 0x64c,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x642,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x100,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
-        .match        = 0x1830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
-        .match        = 0x2,
-        .match_mask   = 0x42,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x202,
-        .match_mask   = 0x642,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x82,
-        .match_mask   = 0x1c2,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x12,
-        .match_mask   = 0x72,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
-        .match        = 0x2000,
-        .match_mask   = 0x3830,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
-        .match        = 0x404,
-        .match_mask   = 0x64c,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
-        .match        = 0x4,
-        .match_mask   = 0x4c,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
-        .match        = 0x8,
-        .match_mask   = 0x4c,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 3,
-        .minbit       = 2,
-        .value        = 0x2,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
-        .match        = 0x42,
-        .match_mask   = 0x42,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
-        .match        = 0x44,
-        .match_mask   = 0x44,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
-        .match        = 0x48,
-        .match_mask   = 0x48,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
-        .match        = 0x50,
-        .match_mask   = 0x50,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
-        .match        = 0xc0,
-        .match_mask   = 0xc0,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x140,
-        .match_mask   = 0x140,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
-        .match        = 0x240,
-        .match_mask   = 0x240,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3830,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x70,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x2,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3870,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
-        .match        = 0x30,
-        .match_mask   = 0x70,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x3,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x10,
-        .match_mask   = 0x72,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 5,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x2030,
-        .match_mask   = 0x3870,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
-        .match        = 0x830,
-        .match_mask   = 0x3870,
-        .match_maxbit = 20,
-        .match_minbit = 7,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56880_A0_HNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
-        .name         = "INGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-};
-
-static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info = {
-    .num_entries = 168,
-    .db = bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db
-};
-bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info_get(void) {
-    return &bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_db_info;
-}
-
-static shr_enum_map_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info = {
-    .num_entries = 168,
-    .map = bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map
-};
-
-bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info_get(void) {
-    return &bcm56880_a0_hna_6_5_31_3_0_rxpmd_match_id_map_info;
-}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_pkt_flexhdr.c
deleted file mode 100644
index ee9d6caf69e..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_pkt_flexhdr.c
+++ /dev/null
@@ -1,7340 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml
- * for device bcm56880_a0 and variant hna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#include <sal/sal_types.h>
-#include <shr/shr_error.h>
-#include <bcmpkt/bcmpkt_flexhdr.h>
-#include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_31_3_0/bcm56880_a0_hna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h>
-
-#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
-#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
-#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
-#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
-
-static void bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
-{
-    uint32_t *reason = data + 0;
-
-    if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
-    }
-    if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
-    }
-    if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
-    }
-    if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
-    }
-    if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
-    }
-    if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
-    }
-    if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
-    }
-    if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
-    }
-    if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
-    }
-    if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
-    }
-    if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
-    }
-    if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
-    }
-    if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
-    }
-    if (reason[12] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
-    }
-    if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
-    }
-    if (reason[12] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
-    }
-    if (reason[12] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
-    }
-    if (reason[12] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
-    }
-    if (reason[12] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
-    }
-    if (reason[12] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
-    }
-    if (reason[12] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
-    }
-    if (reason[12] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
-    }
-    if (reason[12] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
-    }
-    if (reason[12] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
-    }
-    if (reason[12] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
-    }
-    if (reason[12] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
-    }
-    if (reason[12] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[12] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[12] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
-    }
-    if (reason[11] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
-    }
-    if (reason[11] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
-    }
-    if (reason[11] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
-    }
-    if (reason[11] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
-    }
-    if (reason[11] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
-    }
-    if (reason[11] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
-    }
-    if (reason[11] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
-    }
-    if (reason[11] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
-    }
-    if (reason[11] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
-    }
-    if (reason[11] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
-    }
-}
-
-static void bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
-{
-    uint32_t *reason = data + 0;
-
-    reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
-        reason[12] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
-        reason[12] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
-        reason[12] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
-        reason[12] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
-        reason[12] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
-        reason[12] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
-        reason[12] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
-        reason[12] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
-        reason[12] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
-        reason[12] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
-        reason[12] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
-        reason[12] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
-        reason[12] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
-        reason[12] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
-        reason[12] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
-        reason[12] |= (0x1 << 15);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
-        reason[12] |= (0x1 << 16);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
-        reason[12] |= (0x1 << 17);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
-        reason[12] |= (0x1 << 18);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
-        reason[12] |= (0x1 << 19);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
-        reason[12] |= (0x1 << 20);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
-        reason[12] |= (0x1 << 21);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
-        reason[12] |= (0x1 << 22);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
-        reason[12] |= (0x1 << 23);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
-        reason[12] |= (0x1 << 24);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
-        reason[12] |= (0x1 << 25);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
-        reason[12] |= (0x1 << 26);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
-        reason[12] |= (0x1 << 27);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
-        reason[12] |= (0x1 << 28);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[12] |= (0x1 << 29);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[12] |= (0x1 << 30);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
-        reason[12] |= (0x1 << 31);
-    }
-    reason[11] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
-        reason[11] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
-        reason[11] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
-        reason[11] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
-        reason[11] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
-        reason[11] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
-        reason[11] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
-        reason[11] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
-        reason[11] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
-        reason[11] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
-        reason[11] |= (0x1 << 15);
-    }
-}
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_field_data[] = {
-    {
-        .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 240, 255 }, /* Profile 4. */
-            { 224, 239 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "DROP_CODE_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 48, 63 }, /* Profile 2. */
-            { 48, 63 }, /* Profile 3. */
-            { 48, 63 }, /* Profile 4. */
-            { 48, 63 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "DVP_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 352, 367 }, /* Profile 2. */
-            { 352, 367 }, /* Profile 3. */
-            { 352, 367 }, /* Profile 4. */
-            { 352, 367 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 160, 167 }, /* Profile 2. */
-            { 144, 151 }, /* Profile 3. */
-            { 160, 167 }, /* Profile 4. */
-            { 144, 151 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 240, 255 }, /* Profile 2. */
-            { 224, 239 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 372, 375 }, /* Profile 2. */
-            { 372, 375 }, /* Profile 3. */
-            { 372, 375 }, /* Profile 4. */
-            { 372, 375 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 176, 191 }, /* Profile 2. */
-            { 160, 175 }, /* Profile 3. */
-            { 176, 191 }, /* Profile 4. */
-            { 160, 175 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_31_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 0, 31 }, /* Profile 2. */
-            { 0, 31 }, /* Profile 3. */
-            { 0, 31 }, /* Profile 4. */
-            { 0, 31 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 32, 47 }, /* Profile 2. */
-            { 32, 47 }, /* Profile 3. */
-            { 32, 47 }, /* Profile 4. */
-            { 32, 47 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 288, 303 }, /* Profile 2. */
-            { 272, 287 }, /* Profile 3. */
-            { 288, 303 }, /* Profile 4. */
-            { 272, 287 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "IFP_IOAM_GBP_ACTION_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-            { 400, 403 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "IFP_TS_CONTROL_ACTION_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 380, 383 }, /* Profile 2. */
-            { 380, 383 }, /* Profile 3. */
-            { 380, 383 }, /* Profile 4. */
-            { 380, 383 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "ING_PORT_GROUP_ID_3_0_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 408, 411 }, /* Profile 2. */
-            { 408, 411 }, /* Profile 3. */
-            { 408, 411 }, /* Profile 4. */
-            { 408, 411 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "ING_PORT_GROUP_ID_7_4_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 412, 415 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-            { 412, 415 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "ING_TIMESTAMP_31_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 64, 95 }, /* Profile 2. */
-            { 64, 95 }, /* Profile 3. */
-            { 64, 95 }, /* Profile 4. */
-            { 64, 95 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "INGRESS_PP_PORT_ITAG_PRESERVE_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 320, 335 }, /* Profile 2. */
-            { 304, 319 }, /* Profile 3. */
-            { 320, 335 }, /* Profile 4. */
-            { 304, 319 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 208, 223 }, /* Profile 2. */
-            { 192, 207 }, /* Profile 3. */
-            { 208, 223 }, /* Profile 4. */
-            { 192, 207 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-            { 388, 391 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "INT_PRI_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-            { 392, 395 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "L2_IIF_10_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 112, 122 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 112, 122 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L2_OIF_10_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { 320, 330 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { 320, 330 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "L3_IIF_13_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 144, 157 }, /* Profile 2. */
-            { 128, 141 }, /* Profile 3. */
-            { 144, 157 }, /* Profile 4. */
-            { 128, 141 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "L3_OIF_1_13_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 336, 349 }, /* Profile 2. */
-            { 336, 349 }, /* Profile 3. */
-            { 336, 349 }, /* Profile 4. */
-            { 336, 349 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 128, 143 }, /* Profile 2. */
-            { 112, 127 }, /* Profile 3. */
-            { 128, 143 }, /* Profile 4. */
-            { 112, 127 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "NHOP_INDEX_1_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 192, 207 }, /* Profile 2. */
-            { 176, 191 }, /* Profile 3. */
-            { 192, 207 }, /* Profile 4. */
-            { 176, 191 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 96, 111 }, /* Profile 2. */
-            { 96, 111 }, /* Profile 3. */
-            { 96, 111 }, /* Profile 4. */
-            { 96, 111 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 384, 387 }, /* Profile 4. */
-            { 384, 387 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "SVP_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 304, 319 }, /* Profile 2. */
-            { 288, 303 }, /* Profile 3. */
-            { 304, 319 }, /* Profile 4. */
-            { 288, 303 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 404, 407 }, /* Profile 2. */
-            { 404, 407 }, /* Profile 3. */
-            { 404, 407 }, /* Profile 4. */
-            { 404, 407 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 272, 287 }, /* Profile 2. */
-            { 256, 271 }, /* Profile 3. */
-            { 272, 287 }, /* Profile 4. */
-            { 256, 271 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 376, 379 }, /* Profile 2. */
-            { 376, 379 }, /* Profile 3. */
-            { 376, 379 }, /* Profile 4. */
-            { 376, 379 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 256, 271 }, /* Profile 2. */
-            { 240, 255 }, /* Profile 3. */
-            { 256, 271 }, /* Profile 4. */
-            { 240, 255 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "TIMESTAMP_CTRL_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 368, 371 }, /* Profile 2. */
-            { 368, 371 }, /* Profile 3. */
-            { 368, 371 }, /* Profile 4. */
-            { 368, 371 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 396, 399 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
-            { 396, 399 }, /* Profile 4. */
-            { 396, 399 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "VFI_15_0",
-        .fid = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 224, 239 }, /* Profile 2. */
-            { 208, 223 }, /* Profile 3. */
-            { 224, 239 }, /* Profile 4. */
-            { 208, 223 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-};
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_field_data,
-    .profile_bmp_cnt = 1,
-    .profile_bmp[0] = 0x3c,
-
-};
-
-static shr_enum_map_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_names[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_reasons_info_t bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_names,
-    .reason_encode = bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reason_decode,
-};
-
-
-static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_arp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_get,
-    bcmpkt_arp_t_hardware_type_get,
-    bcmpkt_arp_t_operation_get,
-    bcmpkt_arp_t_prot_addr_len_get,
-    bcmpkt_arp_t_protocol_type_get,
-    bcmpkt_arp_t_sender_ha_get,
-    bcmpkt_arp_t_sender_ip_get,
-    bcmpkt_arp_t_target_ha_get,
-    bcmpkt_arp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_arp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_set,
-    bcmpkt_arp_t_hardware_type_set,
-    bcmpkt_arp_t_operation_set,
-    bcmpkt_arp_t_prot_addr_len_set,
-    bcmpkt_arp_t_protocol_type_set,
-    bcmpkt_arp_t_sender_ha_set,
-    bcmpkt_arp_t_sender_ip_set,
-    bcmpkt_arp_t_target_ha_set,
-    bcmpkt_arp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_arp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_arp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_arp_t_field_data,
-};
-
-
-static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_authen_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_get,
-    bcmpkt_authen_t_next_header_get,
-    bcmpkt_authen_t_payload_len_get,
-    bcmpkt_authen_t_reserved_get,
-    bcmpkt_authen_t_seq_num_get,
-    bcmpkt_authen_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_authen_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_set,
-    bcmpkt_authen_t_next_header_set,
-    bcmpkt_authen_t_payload_len_set,
-    bcmpkt_authen_t_reserved_set,
-    bcmpkt_authen_t_seq_num_set,
-    bcmpkt_authen_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_authen_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_authen_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_authen_t_field_data,
-};
-
-
-static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 18, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 18, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 17, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 17, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 5);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 5, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 21, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 21, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_bfd_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_get,
-    bcmpkt_bfd_t_bfd_length_get,
-    bcmpkt_bfd_t_cpi_get,
-    bcmpkt_bfd_t_dem_get,
-    bcmpkt_bfd_t_desmintxintv_get,
-    bcmpkt_bfd_t_detectmult_get,
-    bcmpkt_bfd_t_diag_get,
-    bcmpkt_bfd_t_fin_get,
-    bcmpkt_bfd_t_minechorxintv_get,
-    bcmpkt_bfd_t_mpt_get,
-    bcmpkt_bfd_t_mydiscrim_get,
-    bcmpkt_bfd_t_poll_get,
-    bcmpkt_bfd_t_reqminrxintv_get,
-    bcmpkt_bfd_t_sta_get,
-    bcmpkt_bfd_t_urdiscrim_get,
-    bcmpkt_bfd_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_bfd_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_set,
-    bcmpkt_bfd_t_bfd_length_set,
-    bcmpkt_bfd_t_cpi_set,
-    bcmpkt_bfd_t_dem_set,
-    bcmpkt_bfd_t_desmintxintv_set,
-    bcmpkt_bfd_t_detectmult_set,
-    bcmpkt_bfd_t_diag_set,
-    bcmpkt_bfd_t_fin_set,
-    bcmpkt_bfd_t_minechorxintv_set,
-    bcmpkt_bfd_t_mpt_set,
-    bcmpkt_bfd_t_mydiscrim_set,
-    bcmpkt_bfd_t_poll_set,
-    bcmpkt_bfd_t_reqminrxintv_set,
-    bcmpkt_bfd_t_sta_set,
-    bcmpkt_bfd_t_urdiscrim_set,
-    bcmpkt_bfd_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_bfd_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_bfd_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_bfd_t_field_data,
-};
-
-
-static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_cntag_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_get,
-    bcmpkt_cntag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_cntag_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_set,
-    bcmpkt_cntag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_cntag_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_cntag_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CNTAG_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_cntag_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_get,
-    bcmpkt_cpu_composites_0_t_dma_cont1_get,
-    bcmpkt_cpu_composites_0_t_dma_cont2_get,
-    bcmpkt_cpu_composites_0_t_dma_cont3_get,
-    bcmpkt_cpu_composites_0_t_dma_cont4_get,
-    bcmpkt_cpu_composites_0_t_dma_cont5_get,
-    bcmpkt_cpu_composites_0_t_dma_cont6_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_set,
-    bcmpkt_cpu_composites_0_t_dma_cont1_set,
-    bcmpkt_cpu_composites_0_t_dma_cont2_set,
-    bcmpkt_cpu_composites_0_t_dma_cont3_set,
-    bcmpkt_cpu_composites_0_t_dma_cont4_set,
-    bcmpkt_cpu_composites_0_t_dma_cont5_set,
-    bcmpkt_cpu_composites_0_t_dma_cont6_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_get,
-    bcmpkt_cpu_composites_1_t_dma_cont11_get,
-    bcmpkt_cpu_composites_1_t_dma_cont12_get,
-    bcmpkt_cpu_composites_1_t_dma_cont13_get,
-    bcmpkt_cpu_composites_1_t_dma_cont14_get,
-    bcmpkt_cpu_composites_1_t_dma_cont15_get,
-    bcmpkt_cpu_composites_1_t_dma_cont16_get,
-    bcmpkt_cpu_composites_1_t_dma_cont17_get,
-    bcmpkt_cpu_composites_1_t_dma_cont7_get,
-    bcmpkt_cpu_composites_1_t_dma_cont8_get,
-    bcmpkt_cpu_composites_1_t_dma_cont9_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_set,
-    bcmpkt_cpu_composites_1_t_dma_cont11_set,
-    bcmpkt_cpu_composites_1_t_dma_cont12_set,
-    bcmpkt_cpu_composites_1_t_dma_cont13_set,
-    bcmpkt_cpu_composites_1_t_dma_cont14_set,
-    bcmpkt_cpu_composites_1_t_dma_cont15_set,
-    bcmpkt_cpu_composites_1_t_dma_cont16_set,
-    bcmpkt_cpu_composites_1_t_dma_cont17_set,
-    bcmpkt_cpu_composites_1_t_dma_cont7_set,
-    bcmpkt_cpu_composites_1_t_dma_cont8_set,
-    bcmpkt_cpu_composites_1_t_dma_cont9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_dest_option_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_get,
-    bcmpkt_dest_option_t_next_header_get,
-    bcmpkt_dest_option_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_dest_option_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_set,
-    bcmpkt_dest_option_t_next_header_set,
-    bcmpkt_dest_option_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_dest_option_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_dest_option_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_dest_option_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 11, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 11, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 10, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 10, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_get,
-    bcmpkt_erspan3_fixed_hdr_t_cos_get,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
-    bcmpkt_erspan3_fixed_hdr_t_t_get,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
-    bcmpkt_erspan3_fixed_hdr_t_ver_get,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_set,
-    bcmpkt_erspan3_fixed_hdr_t_cos_set,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
-    bcmpkt_erspan3_fixed_hdr_t_t_set,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
-    bcmpkt_erspan3_fixed_hdr_t_ver_set,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
-    bcmpkt_erspan3_subhdr_5_t_port_id_get,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
-    bcmpkt_erspan3_subhdr_5_t_port_id_set,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_data,
-};
-
-
-static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_esp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_get,
-    bcmpkt_esp_t_pad_get,
-    bcmpkt_esp_t_pad_len_get,
-    bcmpkt_esp_t_seq_num_get,
-    bcmpkt_esp_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_esp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_set,
-    bcmpkt_esp_t_pad_set,
-    bcmpkt_esp_t_pad_len_set,
-    bcmpkt_esp_t_seq_num_set,
-    bcmpkt_esp_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_esp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_esp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_esp_t_field_data,
-};
-
-
-static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_etag_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT] = {
-    bcmpkt_etag_t_tag_get,
-    bcmpkt_etag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_etag_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT] = {
-    bcmpkt_etag_t_tag_set,
-    bcmpkt_etag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_etag_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_etag_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETAG_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_etag_t_field_data,
-};
-
-
-static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ethertype_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ethertype_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ethertype_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ethertype_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ethertype_t_field_data,
-};
-
-
-static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_frag_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_get,
-    bcmpkt_frag_t_id_get,
-    bcmpkt_frag_t_next_header_get,
-    bcmpkt_frag_t_reserved_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_frag_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_set,
-    bcmpkt_frag_t_id_set,
-    bcmpkt_frag_t_next_header_set,
-    bcmpkt_frag_t_reserved_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_frag_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_frag_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_frag_t_field_data,
-};
-
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 4, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 4, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_get,
-    bcmpkt_generic_loopback_t_destination_type_get,
-    bcmpkt_generic_loopback_t_entropy_obj_get,
-    bcmpkt_generic_loopback_t_flags_get,
-    bcmpkt_generic_loopback_t_header_type_get,
-    bcmpkt_generic_loopback_t_input_priority_get,
-    bcmpkt_generic_loopback_t_interface_ctrl_get,
-    bcmpkt_generic_loopback_t_interface_obj_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
-    bcmpkt_generic_loopback_t_qos_obj_get,
-    bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_source_system_port_get,
-    bcmpkt_generic_loopback_t_start_byte_get,
-    bcmpkt_generic_loopback_t_svp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_set,
-    bcmpkt_generic_loopback_t_destination_type_set,
-    bcmpkt_generic_loopback_t_entropy_obj_set,
-    bcmpkt_generic_loopback_t_flags_set,
-    bcmpkt_generic_loopback_t_header_type_set,
-    bcmpkt_generic_loopback_t_input_priority_set,
-    bcmpkt_generic_loopback_t_interface_ctrl_set,
-    bcmpkt_generic_loopback_t_interface_obj_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
-    bcmpkt_generic_loopback_t_qos_obj_set,
-    bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_source_system_port_set,
-    bcmpkt_generic_loopback_t_start_byte_set,
-    bcmpkt_generic_loopback_t_svp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_field_data,
-};
-
-
-static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gpe_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_get,
-    bcmpkt_gpe_t_next_protocol_get,
-    bcmpkt_gpe_t_reserved0_get,
-    bcmpkt_gpe_t_reserved1_get,
-    bcmpkt_gpe_t_vni_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gpe_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_set,
-    bcmpkt_gpe_t_next_protocol_set,
-    bcmpkt_gpe_t_reserved0_set,
-    bcmpkt_gpe_t_reserved1_set,
-    bcmpkt_gpe_t_vni_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gpe_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gpe_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_gpe_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_get,
-    bcmpkt_gre_chksum_t_offset_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_set,
-    bcmpkt_gre_chksum_t_offset_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gre_key_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gre_key_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gre_key_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gre_key_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_gre_key_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 9);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 9, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_gre_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_get,
-    bcmpkt_gre_t_protocol_get,
-    bcmpkt_gre_t_reserved_get,
-    bcmpkt_gre_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_gre_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_set,
-    bcmpkt_gre_t_protocol_set,
-    bcmpkt_gre_t_reserved_set,
-    bcmpkt_gre_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_gre_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_gre_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_gre_t_field_data,
-};
-
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
-    bcmpkt_hop_by_hop_t_next_header_get,
-    bcmpkt_hop_by_hop_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
-    bcmpkt_hop_by_hop_t_next_header_set,
-    bcmpkt_hop_by_hop_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_field_data,
-};
-
-
-static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_icmp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_get,
-    bcmpkt_icmp_t_code_get,
-    bcmpkt_icmp_t_icmp_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_icmp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_set,
-    bcmpkt_icmp_t_code_set,
-    bcmpkt_icmp_t_icmp_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_icmp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_icmp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_icmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
-    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
-    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_b_t_cn_get,
-    bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
-    bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
-    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_b_t_cn_set,
-    bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
-    bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
-    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
-    bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
-    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
-    bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
-    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
-    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
-    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_get,
-    bcmpkt_ifa_header_t_gns_get,
-    bcmpkt_ifa_header_t_max_length_get,
-    bcmpkt_ifa_header_t_next_hdr_get,
-    bcmpkt_ifa_header_t_ver_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_set,
-    bcmpkt_ifa_header_t_gns_set,
-    bcmpkt_ifa_header_t_max_length_set,
-    bcmpkt_ifa_header_t_next_hdr_set,
-    bcmpkt_ifa_header_t_ver_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_md_base_t_action_vector_get,
-    bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
-    bcmpkt_ifa_md_base_t_request_vector_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_md_base_t_action_vector_set,
-    bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
-    bcmpkt_ifa_md_base_t_request_vector_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_t_action_vector_get,
-    bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
-    bcmpkt_ifa_metadata_t_metadata_get,
-    bcmpkt_ifa_metadata_t_request_vector_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_t_action_vector_set,
-    bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
-    bcmpkt_ifa_metadata_t_metadata_set,
-    bcmpkt_ifa_metadata_t_request_vector_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_field_data,
-};
-
-
-static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_igmp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_get,
-    bcmpkt_igmp_t_group_address_get,
-    bcmpkt_igmp_t_igmp_type_get,
-    bcmpkt_igmp_t_max_resp_time_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_igmp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_set,
-    bcmpkt_igmp_t_group_address_set,
-    bcmpkt_igmp_t_igmp_type_set,
-    bcmpkt_igmp_t_max_resp_time_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_igmp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_igmp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_igmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ipfix_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_get,
-    bcmpkt_ipfix_t_length_get,
-    bcmpkt_ipfix_t_obs_domain_id_get,
-    bcmpkt_ipfix_t_sequence_num_get,
-    bcmpkt_ipfix_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ipfix_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_set,
-    bcmpkt_ipfix_t_length_set,
-    bcmpkt_ipfix_t_obs_domain_id_set,
-    bcmpkt_ipfix_t_sequence_num_set,
-    bcmpkt_ipfix_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ipfix_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ipfix_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ipfix_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ipv4_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_get,
-    bcmpkt_ipv4_t_flags_frag_offset_get,
-    bcmpkt_ipv4_t_hdr_checksum_get,
-    bcmpkt_ipv4_t_id_get,
-    bcmpkt_ipv4_t_option_get,
-    bcmpkt_ipv4_t_protocol_get,
-    bcmpkt_ipv4_t_sa_get,
-    bcmpkt_ipv4_t_tos_get,
-    bcmpkt_ipv4_t_total_length_get,
-    bcmpkt_ipv4_t_ttl_get,
-    bcmpkt_ipv4_t_version_hdr_len_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ipv4_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_set,
-    bcmpkt_ipv4_t_flags_frag_offset_set,
-    bcmpkt_ipv4_t_hdr_checksum_set,
-    bcmpkt_ipv4_t_id_set,
-    bcmpkt_ipv4_t_option_set,
-    bcmpkt_ipv4_t_protocol_set,
-    bcmpkt_ipv4_t_sa_set,
-    bcmpkt_ipv4_t_tos_set,
-    bcmpkt_ipv4_t_total_length_set,
-    bcmpkt_ipv4_t_ttl_set,
-    bcmpkt_ipv4_t_version_hdr_len_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ipv4_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ipv4_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ipv4_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_ipv6_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_get,
-    bcmpkt_ipv6_t_flow_label_get,
-    bcmpkt_ipv6_t_hop_limit_get,
-    bcmpkt_ipv6_t_next_header_get,
-    bcmpkt_ipv6_t_payload_length_get,
-    bcmpkt_ipv6_t_sa_get,
-    bcmpkt_ipv6_t_traffic_class_get,
-    bcmpkt_ipv6_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_ipv6_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_set,
-    bcmpkt_ipv6_t_flow_label_set,
-    bcmpkt_ipv6_t_hop_limit_set,
-    bcmpkt_ipv6_t_next_header_set,
-    bcmpkt_ipv6_t_payload_length_set,
-    bcmpkt_ipv6_t_sa_set,
-    bcmpkt_ipv6_t_traffic_class_set,
-    bcmpkt_ipv6_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_ipv6_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_ipv6_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_ipv6_t_field_data,
-};
-
-
-static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_l2_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_get,
-    bcmpkt_l2_t_macsa_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_l2_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_set,
-    bcmpkt_l2_t_macsa_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_l2_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_l2_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_l2_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_get,
-    bcmpkt_mpls_ach_t_cw_type_get,
-    bcmpkt_mpls_ach_t_reserved_get,
-    bcmpkt_mpls_ach_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_set,
-    bcmpkt_mpls_ach_t_cw_type_set,
-    bcmpkt_mpls_ach_t_reserved_set,
-    bcmpkt_mpls_ach_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_get,
-    bcmpkt_mpls_cw_t_reserved_get,
-    bcmpkt_mpls_cw_t_seq_number_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_set,
-    bcmpkt_mpls_cw_t_reserved_set,
-    bcmpkt_mpls_cw_t_seq_number_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 9, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 9, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_mpls_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_get,
-    bcmpkt_mpls_t_exp_get,
-    bcmpkt_mpls_t_label_get,
-    bcmpkt_mpls_t_ttl_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_mpls_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_set,
-    bcmpkt_mpls_t_exp_set,
-    bcmpkt_mpls_t_label_set,
-    bcmpkt_mpls_t_ttl_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_mpls_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_mpls_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_mpls_t_field_data,
-};
-
-
-static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[7], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[7], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_p_1588_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_get,
-    bcmpkt_p_1588_t_correction_get,
-    bcmpkt_p_1588_t_domain_nb_get,
-    bcmpkt_p_1588_t_flags_get,
-    bcmpkt_p_1588_t_logmsginterval_get,
-    bcmpkt_p_1588_t_msg_length_get,
-    bcmpkt_p_1588_t_msg_type_get,
-    bcmpkt_p_1588_t_reserved1_get,
-    bcmpkt_p_1588_t_reserved2_get,
-    bcmpkt_p_1588_t_reserved3_get,
-    bcmpkt_p_1588_t_seq_id_get,
-    bcmpkt_p_1588_t_srcportid_get,
-    bcmpkt_p_1588_t_transportspec_get,
-    bcmpkt_p_1588_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_p_1588_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_set,
-    bcmpkt_p_1588_t_correction_set,
-    bcmpkt_p_1588_t_domain_nb_set,
-    bcmpkt_p_1588_t_flags_set,
-    bcmpkt_p_1588_t_logmsginterval_set,
-    bcmpkt_p_1588_t_msg_length_set,
-    bcmpkt_p_1588_t_msg_type_set,
-    bcmpkt_p_1588_t_reserved1_set,
-    bcmpkt_p_1588_t_reserved2_set,
-    bcmpkt_p_1588_t_reserved3_set,
-    bcmpkt_p_1588_t_seq_id_set,
-    bcmpkt_p_1588_t_srcportid_set,
-    bcmpkt_p_1588_t_transportspec_set,
-    bcmpkt_p_1588_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_p_1588_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_p_1588_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_p_1588_t_field_data,
-};
-
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
-    bcmpkt_prog_ext_hdr_t_next_header_get,
-    bcmpkt_prog_ext_hdr_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
-    bcmpkt_prog_ext_hdr_t_next_header_set,
-    bcmpkt_prog_ext_hdr_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_get,
-    bcmpkt_psamp_0_t_length_get,
-    bcmpkt_psamp_0_t_next_hop_index_get,
-    bcmpkt_psamp_0_t_obs_time_ns_get,
-    bcmpkt_psamp_0_t_obs_time_s_get,
-    bcmpkt_psamp_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_set,
-    bcmpkt_psamp_0_t_length_set,
-    bcmpkt_psamp_0_t_next_hop_index_set,
-    bcmpkt_psamp_0_t_obs_time_ns_set,
-    bcmpkt_psamp_0_t_obs_time_s_set,
-    bcmpkt_psamp_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_get,
-    bcmpkt_psamp_1_t_egress_port_get,
-    bcmpkt_psamp_1_t_epoch_get,
-    bcmpkt_psamp_1_t_ingress_port_get,
-    bcmpkt_psamp_1_t_sampled_length_get,
-    bcmpkt_psamp_1_t_user_meta_data_get,
-    bcmpkt_psamp_1_t_variable_flag_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_set,
-    bcmpkt_psamp_1_t_egress_port_set,
-    bcmpkt_psamp_1_t_epoch_set,
-    bcmpkt_psamp_1_t_ingress_port_set,
-    bcmpkt_psamp_1_t_sampled_length_set,
-    bcmpkt_psamp_1_t_user_meta_data_set,
-    bcmpkt_psamp_1_t_variable_flag_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_data,
-};
-
-
-static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_rarp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_get,
-    bcmpkt_rarp_t_hardware_type_get,
-    bcmpkt_rarp_t_operation_get,
-    bcmpkt_rarp_t_prot_addr_len_get,
-    bcmpkt_rarp_t_protocol_type_get,
-    bcmpkt_rarp_t_sender_ha_get,
-    bcmpkt_rarp_t_sender_ip_get,
-    bcmpkt_rarp_t_target_ha_get,
-    bcmpkt_rarp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_rarp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_set,
-    bcmpkt_rarp_t_hardware_type_set,
-    bcmpkt_rarp_t_operation_set,
-    bcmpkt_rarp_t_prot_addr_len_set,
-    bcmpkt_rarp_t_protocol_type_set,
-    bcmpkt_rarp_t_sender_ha_set,
-    bcmpkt_rarp_t_sender_ip_set,
-    bcmpkt_rarp_t_target_ha_set,
-    bcmpkt_rarp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_rarp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_rarp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_rarp_t_field_data,
-};
-
-
-static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_routing_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_get,
-    bcmpkt_routing_t_hdr_ext_len_get,
-    bcmpkt_routing_t_next_header_get,
-    bcmpkt_routing_t_routing_type_get,
-    bcmpkt_routing_t_segments_left_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_routing_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_set,
-    bcmpkt_routing_t_hdr_ext_len_set,
-    bcmpkt_routing_t_next_header_set,
-    bcmpkt_routing_t_routing_type_set,
-    bcmpkt_routing_t_segments_left_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_routing_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_routing_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_routing_t_field_data,
-};
-
-
-static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_rspan_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_get,
-    bcmpkt_rspan_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_rspan_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_set,
-    bcmpkt_rspan_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_rspan_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_rspan_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_rspan_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_get,
-    bcmpkt_sflow_shim_0_t_sys_source_get,
-    bcmpkt_sflow_shim_0_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_set,
-    bcmpkt_sflow_shim_0_t_sys_source_set,
-    bcmpkt_sflow_shim_0_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 27, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 27, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 31, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 31, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 7);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 7, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 23, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 23, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_discarded_get,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_mcast_get,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_truncated_get,
-    bcmpkt_sflow_shim_1_t_reserved_get,
-    bcmpkt_sflow_shim_1_t_sys_opcode_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_discarded_set,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_mcast_set,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_truncated_set,
-    bcmpkt_sflow_shim_1_t_reserved_set,
-    bcmpkt_sflow_shim_1_t_sys_opcode_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_get,
-    bcmpkt_sflow_shim_2_t_user_meta_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_set,
-    bcmpkt_sflow_shim_2_t_user_meta_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_get,
-    bcmpkt_snap_llc_t_snap_llc_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_set,
-    bcmpkt_snap_llc_t_snap_llc_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_get,
-    bcmpkt_tcp_first_4bytes_t_src_port_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_set,
-    bcmpkt_tcp_first_4bytes_t_src_port_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_get,
-    bcmpkt_tcp_last_16bytes_t_checksum_get,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
-    bcmpkt_tcp_last_16bytes_t_seq_num_get,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
-    bcmpkt_tcp_last_16bytes_t_win_size_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_set,
-    bcmpkt_tcp_last_16bytes_t_checksum_set,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
-    bcmpkt_tcp_last_16bytes_t_seq_num_set,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
-    bcmpkt_tcp_last_16bytes_t_win_size_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_udp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_get,
-    bcmpkt_udp_t_dst_port_get,
-    bcmpkt_udp_t_src_port_get,
-    bcmpkt_udp_t_udp_length_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_udp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_set,
-    bcmpkt_udp_t_dst_port_set,
-    bcmpkt_udp_t_src_port_set,
-    bcmpkt_udp_t_udp_length_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_udp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_udp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_udp_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_field_data,
-};
-
-
-static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_vlan_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_get,
-    bcmpkt_vlan_t_pcp_get,
-    bcmpkt_vlan_t_tpid_get,
-    bcmpkt_vlan_t_vid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_vlan_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_set,
-    bcmpkt_vlan_t_pcp_set,
-    bcmpkt_vlan_t_tpid_set,
-    bcmpkt_vlan_t_vid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_vlan_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_vlan_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_vlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_vntag_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT] = {
-    bcmpkt_vntag_t_tag_get,
-    bcmpkt_vntag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_vntag_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT] = {
-    bcmpkt_vntag_t_tag_set,
-    bcmpkt_vntag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_vntag_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_vntag_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VNTAG_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_vntag_t_field_data,
-};
-
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_vxlan_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_get,
-    bcmpkt_vxlan_t_reserved2_get,
-    bcmpkt_vxlan_t_vn_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_vxlan_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_set,
-    bcmpkt_vxlan_t_reserved2_set,
-    bcmpkt_vxlan_t_vn_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_vxlan_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_vxlan_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_vxlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_31_3_0_wesp_t_fget[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_get,
-    bcmpkt_wesp_t_header_len_get,
-    bcmpkt_wesp_t_next_header_get,
-    bcmpkt_wesp_t_seq_num_get,
-    bcmpkt_wesp_t_spi_get,
-    bcmpkt_wesp_t_trailer_len_get,
-    bcmpkt_wesp_t_wesp_iv_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_31_3_0_wesp_t_fset[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_set,
-    bcmpkt_wesp_t_header_len_set,
-    bcmpkt_wesp_t_next_header_set,
-    bcmpkt_wesp_t_seq_num_set,
-    bcmpkt_wesp_t_spi_set,
-    bcmpkt_wesp_t_trailer_len_set,
-    bcmpkt_wesp_t_wesp_iv_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_31_3_0_wesp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_31_3_0_wesp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_31_3_0_wesp_t_field_data,
-};
-
-static bcmpkt_flex_pmd_info_t bcm56880_a0_hna_6_5_31_3_0_flexhdr_info_list[BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT] = {
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_arp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_arp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_arp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_authen_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_authen_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_authen_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_bfd_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_bfd_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_bfd_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_cntag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_cntag_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_cntag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_cpu_composites_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_dest_option_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_dest_option_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_dest_option_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_erspan3_fixed_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_erspan3_subhdr_5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_esp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_esp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_esp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_etag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_etag_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_etag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ethertype_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ethertype_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ethertype_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_frag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_frag_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_frag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_generic_loopback_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_gpe_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gpe_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gpe_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gre_chksum_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_gre_key_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gre_key_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gre_key_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gre_rout_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gre_seq_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_gre_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_gre_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_gre_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_hop_by_hop_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_icmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_icmp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_icmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_a_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_0_b_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_flex_md_3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_md_base_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ifa_metadata_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_igmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_igmp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_igmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ipfix_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ipfix_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ipfix_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ipv4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ipv4_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ipv4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_ipv6_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_ipv6_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_ipv6_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_l2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_l2_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_l2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mirror_erspan_sn_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mirror_transport_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mpls_ach_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mpls_bv_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mpls_cw_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_mpls_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_mpls_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_mpls_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_p_1588_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_p_1588_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_p_1588_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_prog_ext_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_psamp_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_psamp_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_psamp_mirror_on_drop_3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_rarp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_rarp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_rarp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_routing_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_routing_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_routing_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_rspan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_rspan_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_rspan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_sflow_shim_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_snap_llc_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_tcp_first_4bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_tcp_last_16bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_udp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_udp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_udp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_unknown_l3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_unknown_l4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_unknown_l5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_vlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_vlan_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_vlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_vntag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_vntag_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_vntag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_vxlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_vxlan_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_vxlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_wesp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_31_3_0_wesp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_31_3_0_wesp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_field_info,
-        .reasons_info = &bcm56880_a0_hna_6_5_31_3_0_rxpmd_flex_reasons_info,
-        .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
-        .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
-    },
-};
-
-static shr_enum_map_t bcm56880_a0_hna_6_5_31_3_0_flexhdr_id_map[] = {
-    BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
-};
-
-shr_enum_map_t * bcm56880_a0_hna_6_5_31_3_0_flexhdr_map_get(void)
-{
-    return bcm56880_a0_hna_6_5_31_3_0_flexhdr_id_map;
-}
-
-bcmpkt_flex_pmd_info_t * bcm56880_a0_hna_6_5_31_3_0_flex_pmd_info_get(uint32_t hid)
-{
-    if (hid >= BCM56880_A0_HNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT) {
-        return NULL;
-    }
-
-    return &bcm56880_a0_hna_6_5_31_3_0_flexhdr_info_list[hid];
-}
-
-int bcm56880_a0_hna_6_5_31_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
-    13,
-    -1,
-    -1,
-    64,
-};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 00000000000..1247b4101d0
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,2410 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_hna_6_5_32_2_0_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant hna_6_5_32_2_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
+        .match        = 0x20,
+        .match_mask   = 0x30,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3f,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
+        .match        = 0x10,
+        .match_mask   = 0x30,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
+        .match        = 0x20,
+        .match_mask   = 0x30,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3f,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
+        .match        = 0x10,
+        .match_mask   = 0x30,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
+        .match        = 0x20,
+        .match_mask   = 0x30,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3f,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
+        .match        = 0x10,
+        .match_mask   = 0x30,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
+        .match        = 0x20,
+        .match_mask   = 0x30,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3f,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
+        .match        = 0x10,
+        .match_mask   = 0x30,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info = {
+    .num_entries = 168,
+    .db = bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info = {
+    .num_entries = 168,
+    .map = bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_pkt_flexhdr.c
new file mode 100644
index 00000000000..df72bba45b3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_pkt_flexhdr.c
@@ -0,0 +1,7480 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56880_a0 and variant hna_6_5_32_2_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[12] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[12] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[12] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[12] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[12] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[12] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[12] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[12] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[12] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[12] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[12] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[12] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[12] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[11] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[11] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[11] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[11] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[11] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[11] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[11] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[11] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[11] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+    }
+    if (reason[11] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[12] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[12] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[12] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[12] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[12] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[12] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[12] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[12] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[12] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[12] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[12] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[12] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[12] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[12] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[12] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[12] |= (0x1 << 31);
+    }
+    reason[11] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[11] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[11] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[11] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[11] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[11] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[11] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[11] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[11] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+        reason[11] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[11] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 256, 271 }, /* Profile 4. */
+            { 240, 255 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 256, 271 }, /* Profile 8. */
+            { 240, 255 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+            { 48, 63 }, /* Profile 6. */
+            { 48, 63 }, /* Profile 7. */
+            { 48, 63 }, /* Profile 8. */
+            { 48, 63 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 367 }, /* Profile 2. */
+            { 352, 367 }, /* Profile 3. */
+            { 352, 367 }, /* Profile 4. */
+            { 352, 367 }, /* Profile 5. */
+            { 352, 367 }, /* Profile 6. */
+            { 352, 367 }, /* Profile 7. */
+            { 352, 367 }, /* Profile 8. */
+            { 352, 367 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 183 }, /* Profile 2. */
+            { 160, 167 }, /* Profile 3. */
+            { 176, 183 }, /* Profile 4. */
+            { 160, 167 }, /* Profile 5. */
+            { 176, 183 }, /* Profile 6. */
+            { 160, 167 }, /* Profile 7. */
+            { 176, 183 }, /* Profile 8. */
+            { 160, 167 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 271 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 256, 271 }, /* Profile 6. */
+            { 240, 255 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 376, 379 }, /* Profile 2. */
+            { 376, 379 }, /* Profile 3. */
+            { 376, 379 }, /* Profile 4. */
+            { 376, 379 }, /* Profile 5. */
+            { 376, 379 }, /* Profile 6. */
+            { 376, 379 }, /* Profile 7. */
+            { 376, 379 }, /* Profile 8. */
+            { 376, 379 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 207 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+            { 192, 207 }, /* Profile 6. */
+            { 176, 191 }, /* Profile 7. */
+            { 192, 207 }, /* Profile 8. */
+            { 176, 191 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 31 }, /* Profile 2. */
+            { 0, 31 }, /* Profile 3. */
+            { 0, 31 }, /* Profile 4. */
+            { 0, 31 }, /* Profile 5. */
+            { 0, 31 }, /* Profile 6. */
+            { 0, 31 }, /* Profile 7. */
+            { 0, 31 }, /* Profile 8. */
+            { 0, 31 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+            { 32, 47 }, /* Profile 5. */
+            { 32, 47 }, /* Profile 6. */
+            { 32, 47 }, /* Profile 7. */
+            { 32, 47 }, /* Profile 8. */
+            { 32, 47 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+            { 112, 127 }, /* Profile 6. */
+            { 112, 127 }, /* Profile 7. */
+            { 112, 127 }, /* Profile 8. */
+            { 112, 127 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "IFP_IOAM_GBP_ACTION_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+            { 400, 403 }, /* Profile 6. */
+            { 400, 403 }, /* Profile 7. */
+            { 400, 403 }, /* Profile 8. */
+            { 400, 403 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "IFP_TS_CONTROL_ACTION_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+            { 384, 387 }, /* Profile 6. */
+            { 384, 387 }, /* Profile 7. */
+            { 384, 387 }, /* Profile 8. */
+            { 384, 387 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "ING_PORT_GROUP_ID_3_0_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+            { 408, 411 }, /* Profile 6. */
+            { 408, 411 }, /* Profile 7. */
+            { 408, 411 }, /* Profile 8. */
+            { 408, 411 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "ING_PORT_GROUP_ID_7_4_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
+            { 412, 415 }, /* Profile 6. */
+            { 412, 415 }, /* Profile 7. */
+            { 412, 415 }, /* Profile 8. */
+            { 412, 415 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 95 }, /* Profile 2. */
+            { 64, 95 }, /* Profile 3. */
+            { 64, 95 }, /* Profile 4. */
+            { 64, 95 }, /* Profile 5. */
+            { 64, 95 }, /* Profile 6. */
+            { 64, 95 }, /* Profile 7. */
+            { 64, 95 }, /* Profile 8. */
+            { 64, 95 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "INGRESS_PP_PORT_ITAG_PRESERVE_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 335 }, /* Profile 2. */
+            { 304, 319 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 304, 319 }, /* Profile 5. */
+            { 320, 335 }, /* Profile 6. */
+            { 304, 319 }, /* Profile 7. */
+            { 320, 335 }, /* Profile 8. */
+            { 304, 319 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 239 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
+            { 224, 239 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 5. */
+            { 224, 239 }, /* Profile 6. */
+            { 208, 223 }, /* Profile 7. */
+            { 224, 239 }, /* Profile 8. */
+            { 208, 223 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
+            { 392, 395 }, /* Profile 6. */
+            { 392, 395 }, /* Profile 7. */
+            { 392, 395 }, /* Profile 8. */
+            { 392, 395 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 380, 383 }, /* Profile 2. */
+            { 380, 383 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
+            { 380, 383 }, /* Profile 6. */
+            { 380, 383 }, /* Profile 7. */
+            { 380, 383 }, /* Profile 8. */
+            { 380, 383 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 138 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 128, 138 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 128, 138 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 128, 138 }, /* Profile 8. */
+        },
+        .profile_cnt = 9,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 320, 330 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 320, 330 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 320, 330 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { 320, 330 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 173 }, /* Profile 2. */
+            { 144, 157 }, /* Profile 3. */
+            { 160, 173 }, /* Profile 4. */
+            { 144, 157 }, /* Profile 5. */
+            { 160, 173 }, /* Profile 6. */
+            { 144, 157 }, /* Profile 7. */
+            { 160, 173 }, /* Profile 8. */
+            { 144, 157 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 349 }, /* Profile 2. */
+            { 336, 349 }, /* Profile 3. */
+            { 336, 349 }, /* Profile 4. */
+            { 336, 349 }, /* Profile 5. */
+            { 336, 349 }, /* Profile 6. */
+            { 336, 349 }, /* Profile 7. */
+            { 336, 349 }, /* Profile 8. */
+            { 336, 349 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 6. */
+            { 128, 143 }, /* Profile 7. */
+            { 144, 159 }, /* Profile 8. */
+            { 128, 143 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "NHOP_INDEX_1_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 223 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
+            { 208, 223 }, /* Profile 6. */
+            { 192, 207 }, /* Profile 7. */
+            { 208, 223 }, /* Profile 8. */
+            { 192, 207 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+            { 96, 111 }, /* Profile 4. */
+            { 96, 111 }, /* Profile 5. */
+            { 96, 111 }, /* Profile 6. */
+            { 96, 111 }, /* Profile 7. */
+            { 96, 111 }, /* Profile 8. */
+            { 96, 111 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
+            { 388, 391 }, /* Profile 6. */
+            { 388, 391 }, /* Profile 7. */
+            { 388, 391 }, /* Profile 8. */
+            { 388, 391 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 319 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 304, 319 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
+            { 304, 319 }, /* Profile 6. */
+            { 288, 303 }, /* Profile 7. */
+            { 304, 319 }, /* Profile 8. */
+            { 288, 303 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+            { 404, 407 }, /* Profile 6. */
+            { 404, 407 }, /* Profile 7. */
+            { 404, 407 }, /* Profile 8. */
+            { 404, 407 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 5. */
+            { 288, 303 }, /* Profile 6. */
+            { 272, 287 }, /* Profile 7. */
+            { 288, 303 }, /* Profile 8. */
+            { 272, 287 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 372, 375 }, /* Profile 2. */
+            { 372, 375 }, /* Profile 3. */
+            { 372, 375 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+            { 372, 375 }, /* Profile 6. */
+            { 372, 375 }, /* Profile 7. */
+            { 372, 375 }, /* Profile 8. */
+            { 372, 375 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 272, 287 }, /* Profile 6. */
+            { 256, 271 }, /* Profile 7. */
+            { 272, 287 }, /* Profile 8. */
+            { 256, 271 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 371 }, /* Profile 2. */
+            { 368, 371 }, /* Profile 3. */
+            { 368, 371 }, /* Profile 4. */
+            { 368, 371 }, /* Profile 5. */
+            { 368, 371 }, /* Profile 6. */
+            { 368, 371 }, /* Profile 7. */
+            { 368, 371 }, /* Profile 8. */
+            { 368, 371 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
+            { 396, 399 }, /* Profile 6. */
+            { 396, 399 }, /* Profile 7. */
+            { 396, 399 }, /* Profile 8. */
+            { 396, 399 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 255 }, /* Profile 2. */
+            { 224, 239 }, /* Profile 3. */
+            { 240, 255 }, /* Profile 4. */
+            { 224, 239 }, /* Profile 5. */
+            { 240, 255 }, /* Profile 6. */
+            { 224, 239 }, /* Profile 7. */
+            { 240, 255 }, /* Profile 8. */
+            { 224, 239 }, /* Profile 9. */
+        },
+        .profile_cnt = 10,
+    },
+};
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_field_data,
+    .profile_bmp_cnt = 1,
+    .profile_bmp[0] = 0x3fc,
+
+};
+
+static shr_enum_map_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_names[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_arp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_arp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_arp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_arp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_authen_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_authen_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_authen_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_authen_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_bfd_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_bfd_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_bfd_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_bfd_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_cntag_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_cntag_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_cntag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_cntag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_dest_option_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_dest_option_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_dest_option_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_dest_option_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_esp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_esp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_esp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_esp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_etag_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_get,
+    bcmpkt_etag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_etag_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_set,
+    bcmpkt_etag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_etag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_etag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_etag_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ethertype_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ethertype_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ethertype_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ethertype_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_frag_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_frag_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_frag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_frag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+    bcmpkt_generic_loopback_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+    bcmpkt_generic_loopback_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gpe_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gpe_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gpe_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gpe_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gre_key_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gre_key_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gre_key_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gre_key_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gre_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gre_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gre_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gre_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_icmp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_icmp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_icmp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_icmp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_get,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_set,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_get,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_md_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_set,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_md_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_get,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_t_metadata_get,
+    bcmpkt_ifa_metadata_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_set,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_t_metadata_set,
+    bcmpkt_ifa_metadata_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_igmp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_igmp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_igmp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_igmp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ipfix_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ipfix_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ipfix_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ipfix_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ipv4_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ipv4_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ipv4_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ipv4_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ipv6_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ipv6_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ipv6_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ipv6_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_l2_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_l2_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_l2_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_l2_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mpls_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mpls_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mpls_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mpls_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_p_1588_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_p_1588_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_p_1588_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_p_1588_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_rarp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_rarp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_rarp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_rarp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_routing_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_routing_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_routing_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_routing_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_rspan_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_rspan_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_rspan_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_rspan_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_udp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_udp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_udp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_udp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_vlan_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_vlan_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_vlan_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_vlan_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_vntag_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_get,
+    bcmpkt_vntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_vntag_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_set,
+    bcmpkt_vntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_vntag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_vntag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_vntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_vxlan_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_vxlan_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_vxlan_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_vxlan_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_wesp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_wesp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_wesp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_wesp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_32_2_0_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56880_a0_hna_6_5_32_2_0_flexhdr_info_list[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_arp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_authen_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_bfd_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_cntag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_dest_option_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_esp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_etag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_etag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_etag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ethertype_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_frag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gpe_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gre_key_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gre_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_icmp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_igmp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ipfix_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ipv4_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ipv6_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_l2_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mpls_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_p_1588_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_rarp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_routing_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_rspan_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_udp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_vlan_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_vntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_vntag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_vntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_vxlan_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_32_2_0_wesp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_32_2_0_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56880_a0_hna_6_5_32_2_0_flexhdr_id_map[] = {
+    BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56880_a0_hna_6_5_32_2_0_flexhdr_map_get(void)
+{
+    return bcm56880_a0_hna_6_5_32_2_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56880_a0_hna_6_5_32_2_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56880_a0_hna_6_5_32_2_0_flexhdr_info_list[hid];
+}
+
+int bcm56880_a0_hna_6_5_32_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    13,
+    -1,
+    -1,
+    64,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id.c
deleted file mode 100644
index 1c4de255495..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id.c
+++ /dev/null
@@ -1,2634 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_nfa_6_5_31_3_1_sf_match_id_info.yml
- * for device bcm56880_a0 and variant nfa_6_5_31_3_1.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_match_id_defs.h>
-
-
-static bcmpkt_rxpmd_match_id_db_t
-bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_COUNT] = {
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_OPAQUETAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_RSPAN",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
-        .match        = 0x8,
-        .match_mask   = 0x58,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x418,
-        .match_mask   = 0x658,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x646,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x98,
-        .match_mask   = 0x1d8,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
-        .match        = 0x1006,
-        .match_mask   = 0x3846,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
-        .match        = 0x4,
-        .match_mask   = 0x46,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x204,
-        .match_mask   = 0x646,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
-        .match        = 0x804,
-        .match_mask   = 0x3846,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x100,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE",
-        .match        = 0x826,
-        .match_mask   = 0x3866,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3826,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
-        .match        = 0x410,
-        .match_mask   = 0x658,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
-        .match        = 0x10,
-        .match_mask   = 0x58,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
-        .match        = 0x18,
-        .match_mask   = 0x58,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
-        .match        = 0x42,
-        .match_mask   = 0x42,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
-        .match        = 0x44,
-        .match_mask   = 0x44,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
-        .match        = 0x48,
-        .match_mask   = 0x48,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
-        .match        = 0x50,
-        .match_mask   = 0x50,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
-        .match        = 0xc0,
-        .match_mask   = 0xc0,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x140,
-        .match_mask   = 0x140,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
-        .match        = 0x240,
-        .match_mask   = 0x240,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x46,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3866,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x46,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x80,
-        .match_mask   = 0x1d8,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x1000,
-        .match_mask   = 0x3806,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
-        .match        = 0x806,
-        .match_mask   = 0x3866,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
-        .name         = "EGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_RSPAN",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
-        .match        = 0x8,
-        .match_mask   = 0x58,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x418,
-        .match_mask   = 0x658,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x646,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x98,
-        .match_mask   = 0x1d8,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
-        .match        = 0x1006,
-        .match_mask   = 0x3846,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
-        .match        = 0x4,
-        .match_mask   = 0x46,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x204,
-        .match_mask   = 0x646,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
-        .match        = 0x804,
-        .match_mask   = 0x3846,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x100,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE",
-        .match        = 0x826,
-        .match_mask   = 0x3866,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3826,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
-        .match        = 0x410,
-        .match_mask   = 0x658,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
-        .match        = 0x10,
-        .match_mask   = 0x58,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
-        .match        = 0x18,
-        .match_mask   = 0x58,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
-        .match        = 0x42,
-        .match_mask   = 0x42,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
-        .match        = 0x44,
-        .match_mask   = 0x44,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
-        .match        = 0x48,
-        .match_mask   = 0x48,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
-        .match        = 0x50,
-        .match_mask   = 0x50,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
-        .match        = 0xc0,
-        .match_mask   = 0xc0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x140,
-        .match_mask   = 0x140,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
-        .match        = 0x240,
-        .match_mask   = 0x240,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x46,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3866,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x46,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x80,
-        .match_mask   = 0x1d8,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x1000,
-        .match_mask   = 0x3806,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
-        .match        = 0x806,
-        .match_mask   = 0x3866,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 30,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 30,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 30,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 30,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_OPAQUETAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 30,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 30,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_RSPAN",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 30,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 30,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 30,
-        .match_minbit = 23,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 30,
-        .pminbit      = 23,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
-        .match        = 0x8,
-        .match_mask   = 0x58,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x418,
-        .match_mask   = 0x658,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x646,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x98,
-        .match_mask   = 0x1d8,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3826,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
-        .match        = 0x410,
-        .match_mask   = 0x658,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
-        .match        = 0x10,
-        .match_mask   = 0x58,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
-        .match        = 0x18,
-        .match_mask   = 0x58,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x46,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3866,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x46,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x80,
-        .match_mask   = 0x1d8,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x1000,
-        .match_mask   = 0x3806,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 44,
-        .match_minbit = 31,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 44,
-        .pminbit      = 31,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 8,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 8,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_RSPAN",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 8,
-        .match_minbit = 1,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 8,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
-        .match        = 0x8,
-        .match_mask   = 0x58,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x180,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x418,
-        .match_mask   = 0x658,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x646,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x98,
-        .match_mask   = 0x1d8,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x640,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
-        .match        = 0x1006,
-        .match_mask   = 0x3846,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
-        .match        = 0x4,
-        .match_mask   = 0x46,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x204,
-        .match_mask   = 0x646,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
-        .match        = 0x804,
-        .match_mask   = 0x3846,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x100,
-        .match_mask   = 0x1c0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE",
-        .match        = 0x826,
-        .match_mask   = 0x3866,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3826,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
-        .match        = 0x410,
-        .match_mask   = 0x658,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
-        .match        = 0x10,
-        .match_mask   = 0x58,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
-        .match        = 0x18,
-        .match_mask   = 0x58,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
-        .match        = 0x42,
-        .match_mask   = 0x42,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
-        .match        = 0x44,
-        .match_mask   = 0x44,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
-        .match        = 0x48,
-        .match_mask   = 0x48,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
-        .match        = 0x50,
-        .match_mask   = 0x50,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
-        .match        = 0xc0,
-        .match_mask   = 0xc0,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x140,
-        .match_mask   = 0x140,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
-        .match        = 0x240,
-        .match_mask   = 0x240,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x46,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x820,
-        .match_mask   = 0x3866,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x46,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x80,
-        .match_mask   = 0x1d8,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x1000,
-        .match_mask   = 0x3806,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
-        .match        = 0x806,
-        .match_mask   = 0x3866,
-        .match_maxbit = 22,
-        .match_minbit = 9,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 22,
-        .pminbit      = 9,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56880_A0_NFA_6_5_31_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
-        .name         = "INGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-};
-
-static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db_info = {
-    .num_entries = 184,
-    .db = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db
-};
-bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db_info_get(void) {
-    return &bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_db_info;
-}
-
-static shr_enum_map_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map_info = {
-    .num_entries = 184,
-    .map = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map
-};
-
-bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map_info_get(void) {
-    return &bcm56880_a0_nfa_6_5_31_3_1_rxpmd_match_id_map_info;
-}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_pkt_flexhdr.c
deleted file mode 100644
index 260ad0d6a1d..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_pkt_flexhdr.c
+++ /dev/null
@@ -1,7069 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml
- * for device bcm56880_a0 and variant nfa_6_5_31_3_1.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#include <sal/sal_types.h>
-#include <shr/shr_error.h>
-#include <bcmpkt/bcmpkt_flexhdr.h>
-#include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_31_3_1/bcm56880_a0_nfa_6_5_31_3_1_bcmpkt_rxpmd_flex_data.h>
-
-#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
-#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
-#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
-#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
-
-static void bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
-{
-    uint32_t *reason = data + 0;
-
-    if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
-    }
-    if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
-    }
-    if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
-    }
-    if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
-    }
-    if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
-    }
-    if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
-    }
-    if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
-    }
-    if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
-    }
-    if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
-    }
-    if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
-    }
-    if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
-    }
-    if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
-    }
-    if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
-    }
-    if (reason[12] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
-    }
-    if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
-    }
-    if (reason[12] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
-    }
-    if (reason[12] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP);
-    }
-    if (reason[12] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP);
-    }
-    if (reason[12] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
-    }
-    if (reason[12] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
-    }
-    if (reason[12] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP);
-    }
-    if (reason[12] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
-    }
-    if (reason[12] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
-    }
-    if (reason[12] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
-    }
-    if (reason[12] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
-    }
-    if (reason[12] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
-    }
-    if (reason[12] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[12] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[12] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
-    }
-    if (reason[11] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
-    }
-    if (reason[11] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
-    }
-    if (reason[11] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
-    }
-    if (reason[11] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
-    }
-    if (reason[11] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
-    }
-    if (reason[11] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
-    }
-    if (reason[11] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
-    }
-    if (reason[11] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
-    }
-    if (reason[11] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS);
-    }
-    if (reason[11] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS);
-    }
-    if (reason[11] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF);
-    }
-    if (reason[11] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED);
-    }
-    if (reason[11] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED);
-    }
-    if (reason[11] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
-    }
-}
-
-static void bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
-{
-    uint32_t *reason = data + 0;
-
-    reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
-        reason[12] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
-        reason[12] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
-        reason[12] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
-        reason[12] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
-        reason[12] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
-        reason[12] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
-        reason[12] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
-        reason[12] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
-        reason[12] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
-        reason[12] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
-        reason[12] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
-        reason[12] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
-        reason[12] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
-        reason[12] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
-        reason[12] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
-        reason[12] |= (0x1 << 15);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
-        reason[12] |= (0x1 << 16);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
-        reason[12] |= (0x1 << 17);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
-        reason[12] |= (0x1 << 18);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
-        reason[12] |= (0x1 << 19);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
-        reason[12] |= (0x1 << 20);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
-        reason[12] |= (0x1 << 21);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
-        reason[12] |= (0x1 << 22);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
-        reason[12] |= (0x1 << 23);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
-        reason[12] |= (0x1 << 24);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
-        reason[12] |= (0x1 << 25);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
-        reason[12] |= (0x1 << 26);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
-        reason[12] |= (0x1 << 27);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
-        reason[12] |= (0x1 << 28);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[12] |= (0x1 << 29);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[12] |= (0x1 << 30);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
-        reason[12] |= (0x1 << 31);
-    }
-    reason[11] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
-        reason[11] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
-        reason[11] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
-        reason[11] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
-        reason[11] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
-        reason[11] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
-        reason[11] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
-        reason[11] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
-        reason[11] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS)) {
-        reason[11] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS)) {
-        reason[11] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF)) {
-        reason[11] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED)) {
-        reason[11] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED)) {
-        reason[11] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
-        reason[11] |= (0x1 << 15);
-    }
-}
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_field_data[] = {
-    {
-        .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 144, 159 }, /* Profile 2. */
-            { 128, 143 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "DROP_CODE_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 48, 63 }, /* Profile 2. */
-            { 48, 63 }, /* Profile 3. */
-            { 48, 63 }, /* Profile 4. */
-            { 48, 63 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "DVP_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_DVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 240, 255 }, /* Profile 2. */
-            { 240, 255 }, /* Profile 3. */
-            { 240, 255 }, /* Profile 4. */
-            { 240, 255 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 160, 167 }, /* Profile 2. */
-            { 144, 151 }, /* Profile 3. */
-            { 160, 167 }, /* Profile 4. */
-            { 144, 151 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 304, 319 }, /* Profile 2. */
-            { 304, 319 }, /* Profile 3. */
-            { 304, 319 }, /* Profile 4. */
-            { 304, 319 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_31_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 0, 31 }, /* Profile 2. */
-            { 0, 31 }, /* Profile 3. */
-            { 0, 31 }, /* Profile 4. */
-            { 0, 31 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 32, 47 }, /* Profile 2. */
-            { 32, 47 }, /* Profile 3. */
-            { 32, 47 }, /* Profile 4. */
-            { 32, 47 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 288, 303 }, /* Profile 2. */
-            { 288, 303 }, /* Profile 3. */
-            { 288, 303 }, /* Profile 4. */
-            { 288, 303 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "IFP_TS_CONTROL_ACTION_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 376, 379 }, /* Profile 2. */
-            { 376, 379 }, /* Profile 3. */
-            { 376, 379 }, /* Profile 4. */
-            { 376, 379 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "ING_ETAG_ACTION_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 372, 375 }, /* Profile 2. */
-            { 372, 375 }, /* Profile 3. */
-            { 372, 375 }, /* Profile 4. */
-            { 372, 375 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "ING_ETAG_PCP_DEI_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 368, 371 }, /* Profile 2. */
-            { 368, 371 }, /* Profile 3. */
-            { 368, 371 }, /* Profile 4. */
-            { 368, 371 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "ING_ETAG_VID_16_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 144, 159 }, /* Profile 4. */
-            { 128, 143 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "ING_TIMESTAMP_31_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 64, 95 }, /* Profile 2. */
-            { 64, 95 }, /* Profile 3. */
-            { 64, 95 }, /* Profile 4. */
-            { 64, 95 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "INGRESS_PP_PORT_7_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 256, 263 }, /* Profile 2. */
-            { 256, 263 }, /* Profile 3. */
-            { 256, 263 }, /* Profile 4. */
-            { 256, 263 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 320, 335 }, /* Profile 2. */
-            { 320, 335 }, /* Profile 3. */
-            { 320, 335 }, /* Profile 4. */
-            { 320, 335 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 404, 407 }, /* Profile 2. */
-            { 404, 407 }, /* Profile 3. */
-            { 404, 407 }, /* Profile 4. */
-            { 404, 407 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "INT_PRI_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 384, 387 }, /* Profile 4. */
-            { 384, 387 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "L2_IIF_10_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 128, 138 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 128, 138 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L2_OIF_10_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { 208, 218 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { 208, 218 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "L3_IIF_13_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 352, 365 }, /* Profile 2. */
-            { 352, 365 }, /* Profile 3. */
-            { 352, 365 }, /* Profile 4. */
-            { 352, 365 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "L3_OIF_1_13_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 224, 237 }, /* Profile 2. */
-            { 224, 237 }, /* Profile 3. */
-            { 224, 237 }, /* Profile 4. */
-            { 224, 237 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "MPLS_LABEL_DECAP_COUNT_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 412, 415 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-            { 412, 415 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 336, 351 }, /* Profile 2. */
-            { 336, 351 }, /* Profile 3. */
-            { 336, 351 }, /* Profile 4. */
-            { 336, 351 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "NHOP_INDEX_1_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 176, 191 }, /* Profile 2. */
-            { 160, 175 }, /* Profile 3. */
-            { 176, 191 }, /* Profile 4. */
-            { 160, 175 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 96, 111 }, /* Profile 2. */
-            { 96, 111 }, /* Profile 3. */
-            { 96, 111 }, /* Profile 4. */
-            { 96, 111 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 408, 411 }, /* Profile 2. */
-            { 408, 411 }, /* Profile 3. */
-            { 408, 411 }, /* Profile 4. */
-            { 408, 411 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "SVP_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 192, 207 }, /* Profile 2. */
-            { 176, 191 }, /* Profile 3. */
-            { 192, 207 }, /* Profile 4. */
-            { 176, 191 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-            { 400, 403 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 112, 127 }, /* Profile 2. */
-            { 112, 127 }, /* Profile 3. */
-            { 112, 127 }, /* Profile 4. */
-            { 112, 127 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 396, 399 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
-            { 396, 399 }, /* Profile 4. */
-            { 396, 399 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "T_VLAN_TAG_VALUE_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 272, 287 }, /* Profile 2. */
-            { 272, 287 }, /* Profile 3. */
-            { 272, 287 }, /* Profile 4. */
-            { 272, 287 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "TIMESTAMP_CTRL_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 380, 383 }, /* Profile 2. */
-            { 380, 383 }, /* Profile 3. */
-            { 380, 383 }, /* Profile 4. */
-            { 380, 383 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-            { 392, 395 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "VFI_15_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_VFI_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 208, 223 }, /* Profile 2. */
-            { 192, 207 }, /* Profile 3. */
-            { 208, 223 }, /* Profile 4. */
-            { 192, 207 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-    {
-        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
-        .fid = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-            { 388, 391 }, /* Profile 5. */
-        },
-        .profile_cnt = 6,
-    },
-};
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_field_data,
-    .profile_bmp_cnt = 1,
-    .profile_bmp[0] = 0x3c,
-
-};
-
-static shr_enum_map_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_names[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_reasons_info_t bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_names,
-    .reason_encode = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reason_decode,
-};
-
-
-static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_arp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_get,
-    bcmpkt_arp_t_hardware_type_get,
-    bcmpkt_arp_t_operation_get,
-    bcmpkt_arp_t_prot_addr_len_get,
-    bcmpkt_arp_t_protocol_type_get,
-    bcmpkt_arp_t_sender_ha_get,
-    bcmpkt_arp_t_sender_ip_get,
-    bcmpkt_arp_t_target_ha_get,
-    bcmpkt_arp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_arp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_set,
-    bcmpkt_arp_t_hardware_type_set,
-    bcmpkt_arp_t_operation_set,
-    bcmpkt_arp_t_prot_addr_len_set,
-    bcmpkt_arp_t_protocol_type_set,
-    bcmpkt_arp_t_sender_ha_set,
-    bcmpkt_arp_t_sender_ip_set,
-    bcmpkt_arp_t_target_ha_set,
-    bcmpkt_arp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_arp_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_arp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_arp_t_field_data,
-};
-
-
-static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_authen_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_get,
-    bcmpkt_authen_t_next_header_get,
-    bcmpkt_authen_t_payload_len_get,
-    bcmpkt_authen_t_reserved_get,
-    bcmpkt_authen_t_seq_num_get,
-    bcmpkt_authen_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_authen_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_set,
-    bcmpkt_authen_t_next_header_set,
-    bcmpkt_authen_t_payload_len_set,
-    bcmpkt_authen_t_reserved_set,
-    bcmpkt_authen_t_seq_num_set,
-    bcmpkt_authen_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_authen_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_authen_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_authen_t_field_data,
-};
-
-
-static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 18, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 18, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 17, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 17, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 5);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 5, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 21, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 21, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_bfd_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_get,
-    bcmpkt_bfd_t_bfd_length_get,
-    bcmpkt_bfd_t_cpi_get,
-    bcmpkt_bfd_t_dem_get,
-    bcmpkt_bfd_t_desmintxintv_get,
-    bcmpkt_bfd_t_detectmult_get,
-    bcmpkt_bfd_t_diag_get,
-    bcmpkt_bfd_t_fin_get,
-    bcmpkt_bfd_t_minechorxintv_get,
-    bcmpkt_bfd_t_mpt_get,
-    bcmpkt_bfd_t_mydiscrim_get,
-    bcmpkt_bfd_t_poll_get,
-    bcmpkt_bfd_t_reqminrxintv_get,
-    bcmpkt_bfd_t_sta_get,
-    bcmpkt_bfd_t_urdiscrim_get,
-    bcmpkt_bfd_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_bfd_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_set,
-    bcmpkt_bfd_t_bfd_length_set,
-    bcmpkt_bfd_t_cpi_set,
-    bcmpkt_bfd_t_dem_set,
-    bcmpkt_bfd_t_desmintxintv_set,
-    bcmpkt_bfd_t_detectmult_set,
-    bcmpkt_bfd_t_diag_set,
-    bcmpkt_bfd_t_fin_set,
-    bcmpkt_bfd_t_minechorxintv_set,
-    bcmpkt_bfd_t_mpt_set,
-    bcmpkt_bfd_t_mydiscrim_set,
-    bcmpkt_bfd_t_poll_set,
-    bcmpkt_bfd_t_reqminrxintv_set,
-    bcmpkt_bfd_t_sta_set,
-    bcmpkt_bfd_t_urdiscrim_set,
-    bcmpkt_bfd_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_bfd_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_bfd_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_bfd_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_get,
-    bcmpkt_cpu_composites_0_t_dma_cont1_get,
-    bcmpkt_cpu_composites_0_t_dma_cont2_get,
-    bcmpkt_cpu_composites_0_t_dma_cont3_get,
-    bcmpkt_cpu_composites_0_t_dma_cont4_get,
-    bcmpkt_cpu_composites_0_t_dma_cont5_get,
-    bcmpkt_cpu_composites_0_t_dma_cont6_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_set,
-    bcmpkt_cpu_composites_0_t_dma_cont1_set,
-    bcmpkt_cpu_composites_0_t_dma_cont2_set,
-    bcmpkt_cpu_composites_0_t_dma_cont3_set,
-    bcmpkt_cpu_composites_0_t_dma_cont4_set,
-    bcmpkt_cpu_composites_0_t_dma_cont5_set,
-    bcmpkt_cpu_composites_0_t_dma_cont6_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_get,
-    bcmpkt_cpu_composites_1_t_dma_cont11_get,
-    bcmpkt_cpu_composites_1_t_dma_cont12_get,
-    bcmpkt_cpu_composites_1_t_dma_cont13_get,
-    bcmpkt_cpu_composites_1_t_dma_cont14_get,
-    bcmpkt_cpu_composites_1_t_dma_cont15_get,
-    bcmpkt_cpu_composites_1_t_dma_cont16_get,
-    bcmpkt_cpu_composites_1_t_dma_cont17_get,
-    bcmpkt_cpu_composites_1_t_dma_cont7_get,
-    bcmpkt_cpu_composites_1_t_dma_cont8_get,
-    bcmpkt_cpu_composites_1_t_dma_cont9_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_set,
-    bcmpkt_cpu_composites_1_t_dma_cont11_set,
-    bcmpkt_cpu_composites_1_t_dma_cont12_set,
-    bcmpkt_cpu_composites_1_t_dma_cont13_set,
-    bcmpkt_cpu_composites_1_t_dma_cont14_set,
-    bcmpkt_cpu_composites_1_t_dma_cont15_set,
-    bcmpkt_cpu_composites_1_t_dma_cont16_set,
-    bcmpkt_cpu_composites_1_t_dma_cont17_set,
-    bcmpkt_cpu_composites_1_t_dma_cont7_set,
-    bcmpkt_cpu_composites_1_t_dma_cont8_set,
-    bcmpkt_cpu_composites_1_t_dma_cont9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_get,
-    bcmpkt_dest_option_t_next_header_get,
-    bcmpkt_dest_option_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_set,
-    bcmpkt_dest_option_t_next_header_set,
-    bcmpkt_dest_option_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 11, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 11, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 10, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 10, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_get,
-    bcmpkt_erspan3_fixed_hdr_t_cos_get,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
-    bcmpkt_erspan3_fixed_hdr_t_t_get,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
-    bcmpkt_erspan3_fixed_hdr_t_ver_get,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_set,
-    bcmpkt_erspan3_fixed_hdr_t_cos_set,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
-    bcmpkt_erspan3_fixed_hdr_t_t_set,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
-    bcmpkt_erspan3_fixed_hdr_t_ver_set,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
-    bcmpkt_erspan3_subhdr_5_t_port_id_get,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
-    bcmpkt_erspan3_subhdr_5_t_port_id_set,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_field_data,
-};
-
-
-static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_esp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_get,
-    bcmpkt_esp_t_pad_get,
-    bcmpkt_esp_t_pad_len_get,
-    bcmpkt_esp_t_seq_num_get,
-    bcmpkt_esp_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_esp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_set,
-    bcmpkt_esp_t_pad_set,
-    bcmpkt_esp_t_pad_len_set,
-    bcmpkt_esp_t_seq_num_set,
-    bcmpkt_esp_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_esp_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_esp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_esp_t_field_data,
-};
-
-
-static int32_t bcmpkt_etag_t_pcp_dei_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_pcp_dei_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_rsrvd0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 30, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_rsrvd0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 30, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_rsrvd1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_rsrvd1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_svid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_svid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 12, val);
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 14);
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_vid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 14, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_etag_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FID_COUNT] = {
-    bcmpkt_etag_t_pcp_dei_get,
-    bcmpkt_etag_t_rsrvd0_get,
-    bcmpkt_etag_t_rsrvd1_get,
-    bcmpkt_etag_t_svid_get,
-    bcmpkt_etag_t_tpid_get,
-    bcmpkt_etag_t_vid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_etag_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FID_COUNT] = {
-    bcmpkt_etag_t_pcp_dei_set,
-    bcmpkt_etag_t_rsrvd0_set,
-    bcmpkt_etag_t_rsrvd1_set,
-    bcmpkt_etag_t_svid_set,
-    bcmpkt_etag_t_tpid_set,
-    bcmpkt_etag_t_vid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_etag_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_etag_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETAG_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_etag_t_field_data,
-};
-
-
-static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_field_data,
-};
-
-
-static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_frag_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_get,
-    bcmpkt_frag_t_id_get,
-    bcmpkt_frag_t_next_header_get,
-    bcmpkt_frag_t_reserved_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_frag_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_set,
-    bcmpkt_frag_t_id_set,
-    bcmpkt_frag_t_next_header_set,
-    bcmpkt_frag_t_reserved_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_frag_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_frag_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_frag_t_field_data,
-};
-
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 4, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 4, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_get,
-    bcmpkt_generic_loopback_t_destination_type_get,
-    bcmpkt_generic_loopback_t_entropy_obj_get,
-    bcmpkt_generic_loopback_t_flags_get,
-    bcmpkt_generic_loopback_t_header_type_get,
-    bcmpkt_generic_loopback_t_input_priority_get,
-    bcmpkt_generic_loopback_t_interface_ctrl_get,
-    bcmpkt_generic_loopback_t_interface_obj_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
-    bcmpkt_generic_loopback_t_qos_obj_get,
-    bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_reserved_2_get,
-    bcmpkt_generic_loopback_t_source_system_port_get,
-    bcmpkt_generic_loopback_t_start_byte_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_set,
-    bcmpkt_generic_loopback_t_destination_type_set,
-    bcmpkt_generic_loopback_t_entropy_obj_set,
-    bcmpkt_generic_loopback_t_flags_set,
-    bcmpkt_generic_loopback_t_header_type_set,
-    bcmpkt_generic_loopback_t_input_priority_set,
-    bcmpkt_generic_loopback_t_interface_ctrl_set,
-    bcmpkt_generic_loopback_t_interface_obj_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
-    bcmpkt_generic_loopback_t_qos_obj_set,
-    bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_reserved_2_set,
-    bcmpkt_generic_loopback_t_source_system_port_set,
-    bcmpkt_generic_loopback_t_start_byte_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_field_data,
-};
-
-
-static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gpe_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_get,
-    bcmpkt_gpe_t_next_protocol_get,
-    bcmpkt_gpe_t_reserved0_get,
-    bcmpkt_gpe_t_reserved1_get,
-    bcmpkt_gpe_t_vni_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gpe_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_set,
-    bcmpkt_gpe_t_next_protocol_set,
-    bcmpkt_gpe_t_reserved0_set,
-    bcmpkt_gpe_t_reserved1_set,
-    bcmpkt_gpe_t_vni_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gpe_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gpe_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_gpe_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_get,
-    bcmpkt_gre_chksum_t_offset_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_set,
-    bcmpkt_gre_chksum_t_offset_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_key_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_key_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_vn_id_lower_entropy_get,
-    bcmpkt_gre_key_t_vn_id_upper_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_vn_id_lower_entropy_set,
-    bcmpkt_gre_key_t_vn_id_upper_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 9);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 9, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gre_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_get,
-    bcmpkt_gre_t_protocol_get,
-    bcmpkt_gre_t_reserved_get,
-    bcmpkt_gre_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gre_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_set,
-    bcmpkt_gre_t_protocol_set,
-    bcmpkt_gre_t_reserved_set,
-    bcmpkt_gre_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gre_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gre_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_gre_t_field_data,
-};
-
-
-static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FID_COUNT] = {
-    bcmpkt_gtp_12byte_t_bytes_11_8_get,
-    bcmpkt_gtp_12byte_t_bytes_3_0_get,
-    bcmpkt_gtp_12byte_t_bytes_7_4_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FID_COUNT] = {
-    bcmpkt_gtp_12byte_t_bytes_11_8_set,
-    bcmpkt_gtp_12byte_t_bytes_3_0_set,
-    bcmpkt_gtp_12byte_t_bytes_7_4_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_12BYTE_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_field_data,
-};
-
-
-static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FID_COUNT] = {
-    bcmpkt_gtp_8byte_t_bytes_3_0_get,
-    bcmpkt_gtp_8byte_t_bytes_7_4_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FID_COUNT] = {
-    bcmpkt_gtp_8byte_t_bytes_3_0_set,
-    bcmpkt_gtp_8byte_t_bytes_7_4_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_8BYTE_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_field_data,
-};
-
-
-static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = {
-    bcmpkt_gtp_ext_4byte_t_ext_hdr_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = {
-    bcmpkt_gtp_ext_4byte_t_ext_hdr_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_field_data,
-};
-
-
-static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = {
-    bcmpkt_gtp_with_ext_t_bytes_11_8_get,
-    bcmpkt_gtp_with_ext_t_bytes_3_0_get,
-    bcmpkt_gtp_with_ext_t_bytes_7_4_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = {
-    bcmpkt_gtp_with_ext_t_bytes_11_8_set,
-    bcmpkt_gtp_with_ext_t_bytes_3_0_set,
-    bcmpkt_gtp_with_ext_t_bytes_7_4_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_field_data,
-};
-
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
-    bcmpkt_hop_by_hop_t_next_header_get,
-    bcmpkt_hop_by_hop_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
-    bcmpkt_hop_by_hop_t_next_header_set,
-    bcmpkt_hop_by_hop_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_field_data,
-};
-
-
-static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_icmp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_get,
-    bcmpkt_icmp_t_code_get,
-    bcmpkt_icmp_t_icmp_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_icmp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_set,
-    bcmpkt_icmp_t_code_set,
-    bcmpkt_icmp_t_icmp_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_icmp_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_icmp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_icmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_igmp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_get,
-    bcmpkt_igmp_t_group_address_get,
-    bcmpkt_igmp_t_igmp_type_get,
-    bcmpkt_igmp_t_max_resp_time_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_igmp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_set,
-    bcmpkt_igmp_t_group_address_set,
-    bcmpkt_igmp_t_igmp_type_set,
-    bcmpkt_igmp_t_max_resp_time_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_igmp_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_igmp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_igmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_get,
-    bcmpkt_ipfix_t_length_get,
-    bcmpkt_ipfix_t_obs_domain_id_get,
-    bcmpkt_ipfix_t_sequence_num_get,
-    bcmpkt_ipfix_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_set,
-    bcmpkt_ipfix_t_length_set,
-    bcmpkt_ipfix_t_obs_domain_id_set,
-    bcmpkt_ipfix_t_sequence_num_set,
-    bcmpkt_ipfix_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_get,
-    bcmpkt_ipv4_t_flags_frag_offset_get,
-    bcmpkt_ipv4_t_hdr_checksum_get,
-    bcmpkt_ipv4_t_id_get,
-    bcmpkt_ipv4_t_option_get,
-    bcmpkt_ipv4_t_protocol_get,
-    bcmpkt_ipv4_t_sa_get,
-    bcmpkt_ipv4_t_tos_get,
-    bcmpkt_ipv4_t_total_length_get,
-    bcmpkt_ipv4_t_ttl_get,
-    bcmpkt_ipv4_t_version_hdr_len_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_set,
-    bcmpkt_ipv4_t_flags_frag_offset_set,
-    bcmpkt_ipv4_t_hdr_checksum_set,
-    bcmpkt_ipv4_t_id_set,
-    bcmpkt_ipv4_t_option_set,
-    bcmpkt_ipv4_t_protocol_set,
-    bcmpkt_ipv4_t_sa_set,
-    bcmpkt_ipv4_t_tos_set,
-    bcmpkt_ipv4_t_total_length_set,
-    bcmpkt_ipv4_t_ttl_set,
-    bcmpkt_ipv4_t_version_hdr_len_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_get,
-    bcmpkt_ipv6_t_flow_label_get,
-    bcmpkt_ipv6_t_hop_limit_get,
-    bcmpkt_ipv6_t_next_header_get,
-    bcmpkt_ipv6_t_payload_length_get,
-    bcmpkt_ipv6_t_sa_get,
-    bcmpkt_ipv6_t_traffic_class_get,
-    bcmpkt_ipv6_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_set,
-    bcmpkt_ipv6_t_flow_label_set,
-    bcmpkt_ipv6_t_hop_limit_set,
-    bcmpkt_ipv6_t_next_header_set,
-    bcmpkt_ipv6_t_payload_length_set,
-    bcmpkt_ipv6_t_sa_set,
-    bcmpkt_ipv6_t_traffic_class_set,
-    bcmpkt_ipv6_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_field_data,
-};
-
-
-static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_l2_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_get,
-    bcmpkt_l2_t_macsa_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_l2_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_set,
-    bcmpkt_l2_t_macsa_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_l2_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_l2_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_l2_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_get,
-    bcmpkt_mpls_ach_t_cw_type_get,
-    bcmpkt_mpls_ach_t_reserved_get,
-    bcmpkt_mpls_ach_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_set,
-    bcmpkt_mpls_ach_t_cw_type_set,
-    bcmpkt_mpls_ach_t_reserved_set,
-    bcmpkt_mpls_ach_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_get,
-    bcmpkt_mpls_cw_t_reserved_get,
-    bcmpkt_mpls_cw_t_seq_number_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_set,
-    bcmpkt_mpls_cw_t_reserved_set,
-    bcmpkt_mpls_cw_t_seq_number_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 9, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 9, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_mpls_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_get,
-    bcmpkt_mpls_t_exp_get,
-    bcmpkt_mpls_t_label_get,
-    bcmpkt_mpls_t_ttl_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_mpls_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_set,
-    bcmpkt_mpls_t_exp_set,
-    bcmpkt_mpls_t_label_set,
-    bcmpkt_mpls_t_ttl_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_mpls_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_mpls_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_mpls_t_field_data,
-};
-
-
-static int32_t bcmpkt_opaquetag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_opaquetag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_opaquetag_t_vlan_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_opaquetag_t_vlan_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FID_COUNT] = {
-    bcmpkt_opaquetag_t_tpid_get,
-    bcmpkt_opaquetag_t_vlan_tag_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FID_COUNT] = {
-    bcmpkt_opaquetag_t_tpid_set,
-    bcmpkt_opaquetag_t_vlan_tag_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_OPAQUETAG_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_field_data,
-};
-
-
-static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[7], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[7], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_get,
-    bcmpkt_p_1588_t_correction_get,
-    bcmpkt_p_1588_t_domain_nb_get,
-    bcmpkt_p_1588_t_flags_get,
-    bcmpkt_p_1588_t_logmsginterval_get,
-    bcmpkt_p_1588_t_msg_length_get,
-    bcmpkt_p_1588_t_msg_type_get,
-    bcmpkt_p_1588_t_reserved1_get,
-    bcmpkt_p_1588_t_reserved2_get,
-    bcmpkt_p_1588_t_reserved3_get,
-    bcmpkt_p_1588_t_seq_id_get,
-    bcmpkt_p_1588_t_srcportid_get,
-    bcmpkt_p_1588_t_transportspec_get,
-    bcmpkt_p_1588_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_set,
-    bcmpkt_p_1588_t_correction_set,
-    bcmpkt_p_1588_t_domain_nb_set,
-    bcmpkt_p_1588_t_flags_set,
-    bcmpkt_p_1588_t_logmsginterval_set,
-    bcmpkt_p_1588_t_msg_length_set,
-    bcmpkt_p_1588_t_msg_type_set,
-    bcmpkt_p_1588_t_reserved1_set,
-    bcmpkt_p_1588_t_reserved2_set,
-    bcmpkt_p_1588_t_reserved3_set,
-    bcmpkt_p_1588_t_seq_id_set,
-    bcmpkt_p_1588_t_srcportid_set,
-    bcmpkt_p_1588_t_transportspec_set,
-    bcmpkt_p_1588_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_field_data,
-};
-
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
-    bcmpkt_prog_ext_hdr_t_next_header_get,
-    bcmpkt_prog_ext_hdr_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
-    bcmpkt_prog_ext_hdr_t_next_header_set,
-    bcmpkt_prog_ext_hdr_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_get,
-    bcmpkt_psamp_0_t_length_get,
-    bcmpkt_psamp_0_t_next_hop_index_get,
-    bcmpkt_psamp_0_t_obs_time_ns_get,
-    bcmpkt_psamp_0_t_obs_time_s_get,
-    bcmpkt_psamp_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_set,
-    bcmpkt_psamp_0_t_length_set,
-    bcmpkt_psamp_0_t_next_hop_index_set,
-    bcmpkt_psamp_0_t_obs_time_ns_set,
-    bcmpkt_psamp_0_t_obs_time_s_set,
-    bcmpkt_psamp_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_get,
-    bcmpkt_psamp_1_t_egress_port_get,
-    bcmpkt_psamp_1_t_epoch_get,
-    bcmpkt_psamp_1_t_ingress_port_get,
-    bcmpkt_psamp_1_t_sampled_length_get,
-    bcmpkt_psamp_1_t_user_meta_data_get,
-    bcmpkt_psamp_1_t_variable_flag_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_set,
-    bcmpkt_psamp_1_t_egress_port_set,
-    bcmpkt_psamp_1_t_epoch_set,
-    bcmpkt_psamp_1_t_ingress_port_set,
-    bcmpkt_psamp_1_t_sampled_length_set,
-    bcmpkt_psamp_1_t_user_meta_data_set,
-    bcmpkt_psamp_1_t_variable_flag_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_rarp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_get,
-    bcmpkt_rarp_t_hardware_type_get,
-    bcmpkt_rarp_t_operation_get,
-    bcmpkt_rarp_t_prot_addr_len_get,
-    bcmpkt_rarp_t_protocol_type_get,
-    bcmpkt_rarp_t_sender_ha_get,
-    bcmpkt_rarp_t_sender_ip_get,
-    bcmpkt_rarp_t_target_ha_get,
-    bcmpkt_rarp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_rarp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_set,
-    bcmpkt_rarp_t_hardware_type_set,
-    bcmpkt_rarp_t_operation_set,
-    bcmpkt_rarp_t_prot_addr_len_set,
-    bcmpkt_rarp_t_protocol_type_set,
-    bcmpkt_rarp_t_sender_ha_set,
-    bcmpkt_rarp_t_sender_ip_set,
-    bcmpkt_rarp_t_target_ha_set,
-    bcmpkt_rarp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_rarp_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_rarp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_rarp_t_field_data,
-};
-
-
-static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_routing_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_get,
-    bcmpkt_routing_t_hdr_ext_len_get,
-    bcmpkt_routing_t_next_header_get,
-    bcmpkt_routing_t_routing_type_get,
-    bcmpkt_routing_t_segments_left_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_routing_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_set,
-    bcmpkt_routing_t_hdr_ext_len_set,
-    bcmpkt_routing_t_next_header_set,
-    bcmpkt_routing_t_routing_type_set,
-    bcmpkt_routing_t_segments_left_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_routing_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_routing_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_routing_t_field_data,
-};
-
-
-static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_rspan_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_get,
-    bcmpkt_rspan_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_rspan_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_set,
-    bcmpkt_rspan_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_rspan_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_rspan_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_rspan_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_get,
-    bcmpkt_sflow_shim_0_t_sys_source_get,
-    bcmpkt_sflow_shim_0_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_set,
-    bcmpkt_sflow_shim_0_t_sys_source_set,
-    bcmpkt_sflow_shim_0_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 27, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 27, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 31, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 31, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 7);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 7, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 23, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 23, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_discarded_get,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_mcast_get,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_truncated_get,
-    bcmpkt_sflow_shim_1_t_reserved_get,
-    bcmpkt_sflow_shim_1_t_sys_opcode_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_discarded_set,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_mcast_set,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_truncated_set,
-    bcmpkt_sflow_shim_1_t_reserved_set,
-    bcmpkt_sflow_shim_1_t_sys_opcode_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_get,
-    bcmpkt_sflow_shim_2_t_user_meta_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_set,
-    bcmpkt_sflow_shim_2_t_user_meta_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_get,
-    bcmpkt_snap_llc_t_snap_llc_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_set,
-    bcmpkt_snap_llc_t_snap_llc_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_get,
-    bcmpkt_tcp_first_4bytes_t_src_port_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_set,
-    bcmpkt_tcp_first_4bytes_t_src_port_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_get,
-    bcmpkt_tcp_last_16bytes_t_checksum_get,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
-    bcmpkt_tcp_last_16bytes_t_seq_num_get,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
-    bcmpkt_tcp_last_16bytes_t_win_size_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_set,
-    bcmpkt_tcp_last_16bytes_t_checksum_set,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
-    bcmpkt_tcp_last_16bytes_t_seq_num_set,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
-    bcmpkt_tcp_last_16bytes_t_win_size_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_udp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_get,
-    bcmpkt_udp_t_dst_port_get,
-    bcmpkt_udp_t_src_port_get,
-    bcmpkt_udp_t_udp_length_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_udp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_set,
-    bcmpkt_udp_t_dst_port_set,
-    bcmpkt_udp_t_src_port_set,
-    bcmpkt_udp_t_udp_length_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_udp_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_udp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_udp_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_field_data,
-};
-
-
-static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_vlan_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_get,
-    bcmpkt_vlan_t_pcp_get,
-    bcmpkt_vlan_t_tpid_get,
-    bcmpkt_vlan_t_vid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_vlan_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_set,
-    bcmpkt_vlan_t_pcp_set,
-    bcmpkt_vlan_t_tpid_set,
-    bcmpkt_vlan_t_vid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_vlan_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_vlan_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_vlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_vntag_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FID_COUNT] = {
-    bcmpkt_vntag_t_tag_get,
-    bcmpkt_vntag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_vntag_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FID_COUNT] = {
-    bcmpkt_vntag_t_tag_set,
-    bcmpkt_vntag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_vntag_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_vntag_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VNTAG_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_vntag_t_field_data,
-};
-
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_get,
-    bcmpkt_vxlan_t_vn_id_lower_reserved2_get,
-    bcmpkt_vxlan_t_vn_id_upper_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_set,
-    bcmpkt_vxlan_t_vn_id_lower_reserved2_set,
-    bcmpkt_vxlan_t_vn_id_upper_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_31_3_1_wesp_t_fget[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_get,
-    bcmpkt_wesp_t_header_len_get,
-    bcmpkt_wesp_t_next_header_get,
-    bcmpkt_wesp_t_seq_num_get,
-    bcmpkt_wesp_t_spi_get,
-    bcmpkt_wesp_t_trailer_len_get,
-    bcmpkt_wesp_t_wesp_iv_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_31_3_1_wesp_t_fset[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_set,
-    bcmpkt_wesp_t_header_len_set,
-    bcmpkt_wesp_t_next_header_set,
-    bcmpkt_wesp_t_seq_num_set,
-    bcmpkt_wesp_t_spi_set,
-    bcmpkt_wesp_t_trailer_len_set,
-    bcmpkt_wesp_t_wesp_iv_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_31_3_1_wesp_t_field_data[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_31_3_1_wesp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_6_5_31_3_1_wesp_t_field_data,
-};
-
-static bcmpkt_flex_pmd_info_t bcm56880_a0_nfa_6_5_31_3_1_flexhdr_info_list[BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_COUNT] = {
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_arp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_arp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_arp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_authen_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_authen_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_authen_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_bfd_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_bfd_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_bfd_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_cpu_composites_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_dest_option_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_erspan3_fixed_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_erspan3_subhdr_5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_esp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_esp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_esp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_etag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_etag_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_etag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_ethertype_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_frag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_frag_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_frag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_generic_loopback_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gpe_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gpe_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gpe_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gre_chksum_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gre_key_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gre_rout_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gre_seq_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gre_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gre_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gre_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gtp_12byte_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gtp_8byte_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gtp_ext_4byte_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_gtp_with_ext_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_hop_by_hop_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_icmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_icmp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_icmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_igmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_igmp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_igmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_ipfix_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_ipv4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_ipv6_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_l2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_l2_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_l2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mirror_erspan_sn_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mirror_transport_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mpls_ach_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mpls_bv_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mpls_cw_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_mpls_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_mpls_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_mpls_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_opaquetag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_p_1588_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_prog_ext_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_psamp_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_psamp_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_psamp_mirror_on_drop_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_rarp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_rarp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_rarp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_routing_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_routing_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_routing_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_rspan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_rspan_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_rspan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_sflow_shim_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_snap_llc_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_tcp_first_4bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_tcp_last_16bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_udp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_udp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_udp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_unknown_l3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_unknown_l4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_unknown_l5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_vlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_vlan_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_vlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_vntag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_vntag_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_vntag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_vxlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_wesp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_6_5_31_3_1_wesp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_6_5_31_3_1_wesp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_field_info,
-        .reasons_info = &bcm56880_a0_nfa_6_5_31_3_1_rxpmd_flex_reasons_info,
-        .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
-        .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
-    },
-};
-
-static shr_enum_map_t bcm56880_a0_nfa_6_5_31_3_1_flexhdr_id_map[] = {
-    BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_NAME_MAP_INIT
-};
-
-shr_enum_map_t * bcm56880_a0_nfa_6_5_31_3_1_flexhdr_map_get(void)
-{
-    return bcm56880_a0_nfa_6_5_31_3_1_flexhdr_id_map;
-}
-
-bcmpkt_flex_pmd_info_t * bcm56880_a0_nfa_6_5_31_3_1_flex_pmd_info_get(uint32_t hid)
-{
-    if (hid >= BCM56880_A0_NFA_6_5_31_3_1_BCMPKT_FLEXHDR_COUNT) {
-        return NULL;
-    }
-
-    return &bcm56880_a0_nfa_6_5_31_3_1_flexhdr_info_list[hid];
-}
-
-int bcm56880_a0_nfa_6_5_31_3_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
-    12,
-    -1,
-    -1,
-    60,
-};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 00000000000..d14f3c9e60a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,2634 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_nfa_6_5_32_1_0_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant nfa_6_5_32_1_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OPAQUETAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_RSPAN",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x8,
+        .match_mask   = 0x58,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x418,
+        .match_mask   = 0x658,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x646,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x98,
+        .match_mask   = 0x1d8,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x1006,
+        .match_mask   = 0x3846,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x4,
+        .match_mask   = 0x46,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x204,
+        .match_mask   = 0x646,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x804,
+        .match_mask   = 0x3846,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE",
+        .match        = 0x826,
+        .match_mask   = 0x3866,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3826,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x410,
+        .match_mask   = 0x658,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x10,
+        .match_mask   = 0x58,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x18,
+        .match_mask   = 0x58,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x46,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3866,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x46,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x80,
+        .match_mask   = 0x1d8,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x806,
+        .match_mask   = 0x3866,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_RSPAN",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x8,
+        .match_mask   = 0x58,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x418,
+        .match_mask   = 0x658,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x646,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x98,
+        .match_mask   = 0x1d8,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x1006,
+        .match_mask   = 0x3846,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x4,
+        .match_mask   = 0x46,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x204,
+        .match_mask   = 0x646,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x804,
+        .match_mask   = 0x3846,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE",
+        .match        = 0x826,
+        .match_mask   = 0x3866,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3826,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x410,
+        .match_mask   = 0x658,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x10,
+        .match_mask   = 0x58,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x18,
+        .match_mask   = 0x58,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x46,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3866,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x46,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x80,
+        .match_mask   = 0x1d8,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x806,
+        .match_mask   = 0x3866,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OPAQUETAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_RSPAN",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x8,
+        .match_mask   = 0x58,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x418,
+        .match_mask   = 0x658,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x646,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x98,
+        .match_mask   = 0x1d8,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3826,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x410,
+        .match_mask   = 0x658,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x10,
+        .match_mask   = 0x58,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x18,
+        .match_mask   = 0x58,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x46,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3866,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x46,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x80,
+        .match_mask   = 0x1d8,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_RSPAN",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x8,
+        .match_mask   = 0x58,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x418,
+        .match_mask   = 0x658,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x646,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x98,
+        .match_mask   = 0x1d8,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x1006,
+        .match_mask   = 0x3846,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x4,
+        .match_mask   = 0x46,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x204,
+        .match_mask   = 0x646,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x804,
+        .match_mask   = 0x3846,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE",
+        .match        = 0x826,
+        .match_mask   = 0x3866,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3826,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x410,
+        .match_mask   = 0x658,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x10,
+        .match_mask   = 0x58,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x18,
+        .match_mask   = 0x58,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x46,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3866,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x46,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x80,
+        .match_mask   = 0x1d8,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x806,
+        .match_mask   = 0x3866,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db_info = {
+    .num_entries = 184,
+    .db = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map_info = {
+    .num_entries = 184,
+    .map = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_pkt_flexhdr.c
new file mode 100644
index 00000000000..8e659033d18
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_pkt_flexhdr.c
@@ -0,0 +1,7069 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56880_a0 and variant nfa_6_5_32_1_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[12] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[12] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[12] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[12] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[12] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[12] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[12] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[12] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[12] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[12] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[12] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[12] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[12] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[11] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[11] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[11] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[11] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[11] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[11] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[11] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[11] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[11] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS);
+    }
+    if (reason[11] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS);
+    }
+    if (reason[11] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF);
+    }
+    if (reason[11] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED);
+    }
+    if (reason[11] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED);
+    }
+    if (reason[11] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[12] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[12] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[12] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[12] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[12] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[12] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[12] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[12] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[12] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[12] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[12] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[12] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[12] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[12] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[12] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[12] |= (0x1 << 31);
+    }
+    reason[11] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[11] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[11] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[11] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[11] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[11] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[11] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[11] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[11] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS)) {
+        reason[11] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS)) {
+        reason[11] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF)) {
+        reason[11] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED)) {
+        reason[11] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED)) {
+        reason[11] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[11] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 255 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
+            { 240, 255 }, /* Profile 4. */
+            { 240, 255 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 167 }, /* Profile 2. */
+            { 144, 151 }, /* Profile 3. */
+            { 160, 167 }, /* Profile 4. */
+            { 144, 151 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 319 }, /* Profile 2. */
+            { 304, 319 }, /* Profile 3. */
+            { 304, 319 }, /* Profile 4. */
+            { 304, 319 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 31 }, /* Profile 2. */
+            { 0, 31 }, /* Profile 3. */
+            { 0, 31 }, /* Profile 4. */
+            { 0, 31 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+            { 32, 47 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "IFP_TS_CONTROL_ACTION_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 376, 379 }, /* Profile 2. */
+            { 376, 379 }, /* Profile 3. */
+            { 376, 379 }, /* Profile 4. */
+            { 376, 379 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_ETAG_ACTION_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 372, 375 }, /* Profile 2. */
+            { 372, 375 }, /* Profile 3. */
+            { 372, 375 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_ETAG_PCP_DEI_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 371 }, /* Profile 2. */
+            { 368, 371 }, /* Profile 3. */
+            { 368, 371 }, /* Profile 4. */
+            { 368, 371 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_ETAG_VID_16_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 95 }, /* Profile 2. */
+            { 64, 95 }, /* Profile 3. */
+            { 64, 95 }, /* Profile 4. */
+            { 64, 95 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_PP_PORT_7_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 263 }, /* Profile 2. */
+            { 256, 263 }, /* Profile 3. */
+            { 256, 263 }, /* Profile 4. */
+            { 256, 263 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 335 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 138 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 128, 138 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 208, 218 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 208, 218 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 365 }, /* Profile 2. */
+            { 352, 365 }, /* Profile 3. */
+            { 352, 365 }, /* Profile 4. */
+            { 352, 365 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 237 }, /* Profile 2. */
+            { 224, 237 }, /* Profile 3. */
+            { 224, 237 }, /* Profile 4. */
+            { 224, 237 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "MPLS_LABEL_DECAP_COUNT_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 336, 351 }, /* Profile 3. */
+            { 336, 351 }, /* Profile 4. */
+            { 336, 351 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "NHOP_INDEX_1_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 191 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 160, 175 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+            { 96, 111 }, /* Profile 4. */
+            { 96, 111 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 207 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "T_VLAN_TAG_VALUE_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 287 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 272, 287 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 380, 383 }, /* Profile 2. */
+            { 380, 383 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 223 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
+        .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+};
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_field_data,
+    .profile_bmp_cnt = 1,
+    .profile_bmp[0] = 0x3c,
+
+};
+
+static shr_enum_map_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_names[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_arp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_arp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_arp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_arp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_authen_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_authen_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_authen_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_authen_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_bfd_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_bfd_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_bfd_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_bfd_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_esp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_esp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_esp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_esp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_etag_t_pcp_dei_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_pcp_dei_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_rsrvd0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_rsrvd0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_rsrvd1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_rsrvd1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_svid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_svid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 14);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 14, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_etag_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_pcp_dei_get,
+    bcmpkt_etag_t_rsrvd0_get,
+    bcmpkt_etag_t_rsrvd1_get,
+    bcmpkt_etag_t_svid_get,
+    bcmpkt_etag_t_tpid_get,
+    bcmpkt_etag_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_etag_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_pcp_dei_set,
+    bcmpkt_etag_t_rsrvd0_set,
+    bcmpkt_etag_t_rsrvd1_set,
+    bcmpkt_etag_t_svid_set,
+    bcmpkt_etag_t_tpid_set,
+    bcmpkt_etag_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_etag_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_etag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_etag_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_frag_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_frag_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_frag_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_frag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gpe_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gpe_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gpe_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gpe_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_vn_id_lower_entropy_get,
+    bcmpkt_gre_key_t_vn_id_upper_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_vn_id_lower_entropy_set,
+    bcmpkt_gre_key_t_vn_id_upper_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gre_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gre_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gre_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gre_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_12byte_t_bytes_11_8_get,
+    bcmpkt_gtp_12byte_t_bytes_3_0_get,
+    bcmpkt_gtp_12byte_t_bytes_7_4_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_12byte_t_bytes_11_8_set,
+    bcmpkt_gtp_12byte_t_bytes_3_0_set,
+    bcmpkt_gtp_12byte_t_bytes_7_4_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_field_data,
+};
+
+
+static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_8byte_t_bytes_3_0_get,
+    bcmpkt_gtp_8byte_t_bytes_7_4_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_8byte_t_bytes_3_0_set,
+    bcmpkt_gtp_8byte_t_bytes_7_4_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_field_data,
+};
+
+
+static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_ext_4byte_t_ext_hdr_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_ext_4byte_t_ext_hdr_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_field_data,
+};
+
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = {
+    bcmpkt_gtp_with_ext_t_bytes_11_8_get,
+    bcmpkt_gtp_with_ext_t_bytes_3_0_get,
+    bcmpkt_gtp_with_ext_t_bytes_7_4_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = {
+    bcmpkt_gtp_with_ext_t_bytes_11_8_set,
+    bcmpkt_gtp_with_ext_t_bytes_3_0_set,
+    bcmpkt_gtp_with_ext_t_bytes_7_4_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_icmp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_icmp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_icmp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_icmp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_igmp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_igmp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_igmp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_igmp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_l2_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_l2_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_l2_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_l2_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mpls_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mpls_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mpls_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mpls_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_opaquetag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_opaquetag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_opaquetag_t_vlan_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_opaquetag_t_vlan_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = {
+    bcmpkt_opaquetag_t_tpid_get,
+    bcmpkt_opaquetag_t_vlan_tag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = {
+    bcmpkt_opaquetag_t_tpid_set,
+    bcmpkt_opaquetag_t_vlan_tag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_rarp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_rarp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_rarp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_rarp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_routing_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_routing_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_routing_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_routing_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_rspan_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_rspan_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_rspan_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_rspan_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_udp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_udp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_udp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_udp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_vlan_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_vlan_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_vlan_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_vlan_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_vntag_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_get,
+    bcmpkt_vntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_vntag_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_set,
+    bcmpkt_vntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_vntag_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_vntag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_vntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_vn_id_lower_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_upper_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_vn_id_lower_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_upper_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_wesp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_wesp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_wesp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_wesp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_32_1_0_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56880_a0_nfa_6_5_32_1_0_flexhdr_info_list[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_arp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_authen_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_bfd_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_esp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_etag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_etag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_etag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_frag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gpe_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gre_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_icmp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_igmp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_l2_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mpls_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_rarp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_routing_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_rspan_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_udp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_vlan_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_vntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_vntag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_vntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_wesp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56880_a0_nfa_6_5_32_1_0_flexhdr_id_map[] = {
+    BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56880_a0_nfa_6_5_32_1_0_flexhdr_map_get(void)
+{
+    return bcm56880_a0_nfa_6_5_32_1_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56880_a0_nfa_6_5_32_1_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56880_a0_nfa_6_5_32_1_0_flexhdr_info_list[hid];
+}
+
+int bcm56880_a0_nfa_6_5_32_1_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    12,
+    -1,
+    -1,
+    60,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c
deleted file mode 100644
index 1854e50d6c3..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id.c
+++ /dev/null
@@ -1,1443 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56890_a0_cna_6_5_31_3_0_sf_match_id_info.yml
- * for device bcm56890_a0 and variant cna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_match_id_defs.h>
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
-{
-    0x8,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
-{
-    0xe,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
-{
-    0xc,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] =
-{
-    0x7fffe,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] =
-{
-    0x810,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] =
-{
-    0x3f8,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] =
-{
-    0x1fc00,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] =
-{
-    0x20000,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] =
-{
-    0x3060,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] =
-{
-    0x2040,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] =
-{
-    0xc180,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] =
-{
-    0x40000,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] =
-{
-    0x10200,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] =
-{
-    0x8100,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] =
-{
-    0x28,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] =
-{
-    0x3e,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] =
-{
-    0x30,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] =
-{
-    0x1ffffe,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] =
-{
-    0x1010,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] =
-{
-    0x7f8,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] =
-{
-    0x7f800,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] =
-{
-    0x80000,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] =
-{
-    0x6060,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] =
-{
-    0x4040,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] =
-{
-    0x38380,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] =
-{
-    0x100000,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] =
-{
-    0x40400,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] =
-{
-    0x10100,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] =
-{
-    0x20200,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
-{
-    0x8,
-};
-
-
-static bcmpkt_rxpmd_match_id_db_t
-bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_COUNT] = {
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
-        .name         = "EGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-        .zone_minbit  = 10,
-        .arc_id_mask  = 0xc00,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-        .zone_minbit  = 10,
-        .arc_id_mask  = 0xc00,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-        .zone_minbit  = 10,
-        .arc_id_mask  = 0xc00,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 14,
-        .match_minbit = 12,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 12,
-        .zone_minbit  = 10,
-        .arc_id_mask  = 0xc00,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 21,
-        .match_minbit = 15,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 21,
-        .pminbit      = 15,
-        .zone_minbit  = 12,
-        .arc_id_mask  = 0x1f000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1c,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1c,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1c,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 4,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 4,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1c,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 11,
-        .match_minbit = 5,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 11,
-        .pminbit      = 5,
-        .zone_minbit  = 5,
-        .arc_id_mask  = 0x3e0,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_31_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
-
-    },
-    {
-        /* BCM56890_A0_CNA_6_5_31_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
-        .name         = "INGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-
-    },
-};
-
-static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info = {
-    .num_entries = 77,
-    .db = bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db
-};
-bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info_get(void) {
-    return &bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_db_info;
-}
-
-static shr_enum_map_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info = {
-    .num_entries = 77,
-    .map = bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map
-};
-
-bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info_get(void) {
-    return &bcm56890_a0_cna_6_5_31_3_0_rxpmd_match_id_map_info;
-}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_pkt_flexhdr.c
deleted file mode 100644
index 254f825fd76..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_pkt_flexhdr.c
+++ /dev/null
@@ -1,3923 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml
- * for device bcm56890_a0 and variant cna_6_5_31_3_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#include <sal/sal_types.h>
-#include <shr/shr_error.h>
-#include <bcmpkt/bcmpkt_flexhdr.h>
-#include <bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_31_3_0/bcm56890_a0_cna_6_5_31_3_0_bcmpkt_rxpmd_flex_data.h>
-
-#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
-#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
-#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
-#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
-
-static void bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
-{
-    uint32_t *reason = data + 0;
-
-    if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
-    }
-    if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
-    }
-    if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
-    }
-    if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
-    }
-    if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
-    }
-    if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
-    }
-    if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
-    }
-    if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
-    }
-    if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
-    }
-    if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
-    }
-    if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
-    }
-    if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
-    }
-    if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
-    }
-    if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
-    }
-}
-
-static void bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
-{
-    uint32_t *reason = data + 0;
-
-    reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
-        reason[13] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
-        reason[13] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
-        reason[13] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
-        reason[13] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
-        reason[13] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
-        reason[13] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
-        reason[13] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
-        reason[13] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
-        reason[13] |= (0x1 << 16);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
-        reason[13] |= (0x1 << 17);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
-        reason[13] |= (0x1 << 18);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
-        reason[13] |= (0x1 << 19);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
-        reason[13] |= (0x1 << 23);
-    }
-    reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
-        reason[12] |= (0x1 << 15);
-    }
-}
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_field_data[] = {
-    {
-        .name = "DROP_CODE_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 48, 63 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 48, 63 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "DVP_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 128, 143 }, /* Profile 2. */
-            { 112, 127 }, /* Profile 3. */
-            { 128, 143 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 336, 343 }, /* Profile 2. */
-            { 336, 343 }, /* Profile 3. */
-            { 336, 343 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 368, 383 }, /* Profile 2. */
-            { 368, 383 }, /* Profile 3. */
-            { 368, 383 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EP_NIH_HDR_DROP_CODE_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { 176, 191 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 144, 159 }, /* Profile 2. */
-            { 128, 143 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "EP_NIH_HDR_TIMESTAMP_31_16",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 160, 175 }, /* Profile 2. */
-            { 144, 159 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "ERSPAN3_GBP_SID_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 352, 367 }, /* Profile 2. */
-            { 352, 367 }, /* Profile 3. */
-            { 352, 367 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 0, 15 }, /* Profile 2. */
-            { 0, 15 }, /* Profile 3. */
-            { 0, 15 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_31_16",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 16, 31 }, /* Profile 2. */
-            { 16, 31 }, /* Profile 3. */
-            { 16, 31 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 32, 47 }, /* Profile 2. */
-            { 32, 47 }, /* Profile 3. */
-            { 32, 47 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 192, 207 }, /* Profile 2. */
-            { 192, 207 }, /* Profile 3. */
-            { 192, 207 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "ING_TIMESTAMP_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 144, 159 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "ING_TIMESTAMP_31_16",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 160, 175 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "INGRESS_PP_PORT_8_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 272, 280 }, /* Profile 2. */
-            { 272, 280 }, /* Profile 3. */
-            { 272, 280 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 208, 223 }, /* Profile 2. */
-            { 208, 223 }, /* Profile 3. */
-            { 208, 223 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 408, 411 }, /* Profile 2. */
-            { 408, 411 }, /* Profile 3. */
-            { 408, 411 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "INT_PRI_3_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 416, 419 }, /* Profile 2. */
-            { 416, 419 }, /* Profile 3. */
-            { 416, 419 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L2_IIF_10_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 224, 234 }, /* Profile 2. */
-            { 224, 234 }, /* Profile 3. */
-            { 224, 234 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L2_OIF_10_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 96, 106 }, /* Profile 2. */
-            { 80, 90 }, /* Profile 3. */
-            { 96, 106 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L2_TUNNEL_SVP_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 240, 255 }, /* Profile 2. */
-            { 240, 255 }, /* Profile 3. */
-            { 240, 255 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L3_IIF_13_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 256, 269 }, /* Profile 2. */
-            { 256, 269 }, /* Profile 3. */
-            { 256, 269 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "L3_OIF_1_13_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 112, 125 }, /* Profile 2. */
-            { 96, 109 }, /* Profile 3. */
-            { 112, 125 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 304, 318 }, /* Profile 2. */
-            { 304, 318 }, /* Profile 3. */
-            { 304, 318 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "NHOP_INDEX_1_14_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 176, 190 }, /* Profile 2. */
-            { 160, 174 }, /* Profile 3. */
-            { 176, 190 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 64, 79 }, /* Profile 2. */
-            { 48, 63 }, /* Profile 3. */
-            { 64, 79 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 404, 407 }, /* Profile 2. */
-            { 404, 407 }, /* Profile 3. */
-            { 404, 407 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 320, 335 }, /* Profile 2. */
-            { 320, 335 }, /* Profile 3. */
-            { 320, 335 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 396, 399 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
-            { 396, 399 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 288, 303 }, /* Profile 2. */
-            { 288, 303 }, /* Profile 3. */
-            { 288, 303 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "TAG_ACTION_CTRL_1_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 412, 413 }, /* Profile 2. */
-            { 412, 413 }, /* Profile 3. */
-            { 412, 413 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 384, 387 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-    {
-        .name = "VFI_15_0",
-        .fid = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 80, 95 }, /* Profile 2. */
-            { 64, 79 }, /* Profile 3. */
-            { 80, 95 }, /* Profile 4. */
-        },
-        .profile_cnt = 5,
-    },
-};
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_field_data,
-    .profile_bmp_cnt = 1,
-    .profile_bmp[0] = 0x1c,
-
-};
-
-static shr_enum_map_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_names[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_reasons_info_t bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_names,
-    .reason_encode = bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reason_decode,
-};
-
-
-static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_arp_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_get,
-    bcmpkt_arp_t_hardware_type_get,
-    bcmpkt_arp_t_operation_get,
-    bcmpkt_arp_t_prot_addr_len_get,
-    bcmpkt_arp_t_protocol_type_get,
-    bcmpkt_arp_t_sender_ha_get,
-    bcmpkt_arp_t_sender_ip_get,
-    bcmpkt_arp_t_target_ha_get,
-    bcmpkt_arp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_arp_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_set,
-    bcmpkt_arp_t_hardware_type_set,
-    bcmpkt_arp_t_operation_set,
-    bcmpkt_arp_t_prot_addr_len_set,
-    bcmpkt_arp_t_protocol_type_set,
-    bcmpkt_arp_t_sender_ha_set,
-    bcmpkt_arp_t_sender_ip_set,
-    bcmpkt_arp_t_target_ha_set,
-    bcmpkt_arp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_arp_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_arp_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_arp_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_get,
-    bcmpkt_cpu_composites_0_t_dma_cont1_get,
-    bcmpkt_cpu_composites_0_t_dma_cont2_get,
-    bcmpkt_cpu_composites_0_t_dma_cont3_get,
-    bcmpkt_cpu_composites_0_t_dma_cont4_get,
-    bcmpkt_cpu_composites_0_t_dma_cont5_get,
-    bcmpkt_cpu_composites_0_t_dma_cont6_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_set,
-    bcmpkt_cpu_composites_0_t_dma_cont1_set,
-    bcmpkt_cpu_composites_0_t_dma_cont2_set,
-    bcmpkt_cpu_composites_0_t_dma_cont3_set,
-    bcmpkt_cpu_composites_0_t_dma_cont4_set,
-    bcmpkt_cpu_composites_0_t_dma_cont5_set,
-    bcmpkt_cpu_composites_0_t_dma_cont6_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_get,
-    bcmpkt_cpu_composites_1_t_dma_cont11_get,
-    bcmpkt_cpu_composites_1_t_dma_cont12_get,
-    bcmpkt_cpu_composites_1_t_dma_cont13_get,
-    bcmpkt_cpu_composites_1_t_dma_cont14_get,
-    bcmpkt_cpu_composites_1_t_dma_cont15_get,
-    bcmpkt_cpu_composites_1_t_dma_cont16_get,
-    bcmpkt_cpu_composites_1_t_dma_cont17_get,
-    bcmpkt_cpu_composites_1_t_dma_cont7_get,
-    bcmpkt_cpu_composites_1_t_dma_cont8_get,
-    bcmpkt_cpu_composites_1_t_dma_cont9_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_set,
-    bcmpkt_cpu_composites_1_t_dma_cont11_set,
-    bcmpkt_cpu_composites_1_t_dma_cont12_set,
-    bcmpkt_cpu_composites_1_t_dma_cont13_set,
-    bcmpkt_cpu_composites_1_t_dma_cont14_set,
-    bcmpkt_cpu_composites_1_t_dma_cont15_set,
-    bcmpkt_cpu_composites_1_t_dma_cont16_set,
-    bcmpkt_cpu_composites_1_t_dma_cont17_set,
-    bcmpkt_cpu_composites_1_t_dma_cont7_set,
-    bcmpkt_cpu_composites_1_t_dma_cont8_set,
-    bcmpkt_cpu_composites_1_t_dma_cont9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_get,
-    bcmpkt_ep_nih_header_t_header_type_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
-    bcmpkt_ep_nih_header_t_opaque_object_a_get,
-    bcmpkt_ep_nih_header_t_opaque_object_b_get,
-    bcmpkt_ep_nih_header_t_opaque_object_c_get,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
-    bcmpkt_ep_nih_header_t_reserved_0_get,
-    bcmpkt_ep_nih_header_t_start_get,
-    bcmpkt_ep_nih_header_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_set,
-    bcmpkt_ep_nih_header_t_header_type_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
-    bcmpkt_ep_nih_header_t_opaque_object_a_set,
-    bcmpkt_ep_nih_header_t_opaque_object_b_set,
-    bcmpkt_ep_nih_header_t_opaque_object_c_set,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
-    bcmpkt_ep_nih_header_t_reserved_0_set,
-    bcmpkt_ep_nih_header_t_start_set,
-    bcmpkt_ep_nih_header_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 11, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 11, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 10, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 10, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_get,
-    bcmpkt_erspan3_fixed_hdr_t_cos_get,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
-    bcmpkt_erspan3_fixed_hdr_t_t_get,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
-    bcmpkt_erspan3_fixed_hdr_t_ver_get,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_set,
-    bcmpkt_erspan3_fixed_hdr_t_cos_set,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
-    bcmpkt_erspan3_fixed_hdr_t_t_set,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
-    bcmpkt_erspan3_fixed_hdr_t_ver_set,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
-    bcmpkt_erspan3_subhdr_5_t_port_id_get,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
-    bcmpkt_erspan3_subhdr_5_t_port_id_set,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_data,
-};
-
-
-static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_ethertype_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_ethertype_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_ethertype_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_ethertype_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_ethertype_t_field_data,
-};
-
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 4, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 4, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_get,
-    bcmpkt_generic_loopback_t_destination_type_get,
-    bcmpkt_generic_loopback_t_entropy_obj_get,
-    bcmpkt_generic_loopback_t_flags_get,
-    bcmpkt_generic_loopback_t_header_type_get,
-    bcmpkt_generic_loopback_t_input_priority_get,
-    bcmpkt_generic_loopback_t_interface_ctrl_get,
-    bcmpkt_generic_loopback_t_interface_obj_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
-    bcmpkt_generic_loopback_t_qos_obj_get,
-    bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_reserved_2_get,
-    bcmpkt_generic_loopback_t_source_system_port_get,
-    bcmpkt_generic_loopback_t_start_byte_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_set,
-    bcmpkt_generic_loopback_t_destination_type_set,
-    bcmpkt_generic_loopback_t_entropy_obj_set,
-    bcmpkt_generic_loopback_t_flags_set,
-    bcmpkt_generic_loopback_t_header_type_set,
-    bcmpkt_generic_loopback_t_input_priority_set,
-    bcmpkt_generic_loopback_t_interface_ctrl_set,
-    bcmpkt_generic_loopback_t_interface_obj_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
-    bcmpkt_generic_loopback_t_qos_obj_set,
-    bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_reserved_2_set,
-    bcmpkt_generic_loopback_t_source_system_port_set,
-    bcmpkt_generic_loopback_t_start_byte_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_field_data,
-};
-
-
-static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_icmp_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_get,
-    bcmpkt_icmp_t_code_get,
-    bcmpkt_icmp_t_icmp_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_icmp_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_set,
-    bcmpkt_icmp_t_code_set,
-    bcmpkt_icmp_t_icmp_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_icmp_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_icmp_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_icmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_ipfix_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_get,
-    bcmpkt_ipfix_t_length_get,
-    bcmpkt_ipfix_t_obs_domain_id_get,
-    bcmpkt_ipfix_t_sequence_num_get,
-    bcmpkt_ipfix_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_ipfix_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_set,
-    bcmpkt_ipfix_t_length_set,
-    bcmpkt_ipfix_t_obs_domain_id_set,
-    bcmpkt_ipfix_t_sequence_num_set,
-    bcmpkt_ipfix_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_ipfix_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_ipfix_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_ipfix_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_ipv4_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_get,
-    bcmpkt_ipv4_t_flags_frag_offset_get,
-    bcmpkt_ipv4_t_hdr_checksum_get,
-    bcmpkt_ipv4_t_id_get,
-    bcmpkt_ipv4_t_option_get,
-    bcmpkt_ipv4_t_protocol_get,
-    bcmpkt_ipv4_t_sa_get,
-    bcmpkt_ipv4_t_tos_get,
-    bcmpkt_ipv4_t_total_length_get,
-    bcmpkt_ipv4_t_ttl_get,
-    bcmpkt_ipv4_t_version_hdr_len_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_ipv4_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_set,
-    bcmpkt_ipv4_t_flags_frag_offset_set,
-    bcmpkt_ipv4_t_hdr_checksum_set,
-    bcmpkt_ipv4_t_id_set,
-    bcmpkt_ipv4_t_option_set,
-    bcmpkt_ipv4_t_protocol_set,
-    bcmpkt_ipv4_t_sa_set,
-    bcmpkt_ipv4_t_tos_set,
-    bcmpkt_ipv4_t_total_length_set,
-    bcmpkt_ipv4_t_ttl_set,
-    bcmpkt_ipv4_t_version_hdr_len_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_ipv4_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_ipv4_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_ipv4_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_ipv6_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_get,
-    bcmpkt_ipv6_t_flow_label_get,
-    bcmpkt_ipv6_t_hop_limit_get,
-    bcmpkt_ipv6_t_next_header_get,
-    bcmpkt_ipv6_t_payload_length_get,
-    bcmpkt_ipv6_t_sa_get,
-    bcmpkt_ipv6_t_traffic_class_get,
-    bcmpkt_ipv6_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_ipv6_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_set,
-    bcmpkt_ipv6_t_flow_label_set,
-    bcmpkt_ipv6_t_hop_limit_set,
-    bcmpkt_ipv6_t_next_header_set,
-    bcmpkt_ipv6_t_payload_length_set,
-    bcmpkt_ipv6_t_sa_set,
-    bcmpkt_ipv6_t_traffic_class_set,
-    bcmpkt_ipv6_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_ipv6_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_ipv6_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_ipv6_t_field_data,
-};
-
-
-static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_l2_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_get,
-    bcmpkt_l2_t_macsa_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_l2_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_set,
-    bcmpkt_l2_t_macsa_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_l2_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_l2_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_l2_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_rarp_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_get,
-    bcmpkt_rarp_t_hardware_type_get,
-    bcmpkt_rarp_t_operation_get,
-    bcmpkt_rarp_t_prot_addr_len_get,
-    bcmpkt_rarp_t_protocol_type_get,
-    bcmpkt_rarp_t_sender_ha_get,
-    bcmpkt_rarp_t_sender_ip_get,
-    bcmpkt_rarp_t_target_ha_get,
-    bcmpkt_rarp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_rarp_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_set,
-    bcmpkt_rarp_t_hardware_type_set,
-    bcmpkt_rarp_t_operation_set,
-    bcmpkt_rarp_t_prot_addr_len_set,
-    bcmpkt_rarp_t_protocol_type_set,
-    bcmpkt_rarp_t_sender_ha_set,
-    bcmpkt_rarp_t_sender_ip_set,
-    bcmpkt_rarp_t_target_ha_set,
-    bcmpkt_rarp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_rarp_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_rarp_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_rarp_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_get,
-    bcmpkt_tcp_first_4bytes_t_src_port_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_set,
-    bcmpkt_tcp_first_4bytes_t_src_port_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_get,
-    bcmpkt_tcp_last_16bytes_t_checksum_get,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
-    bcmpkt_tcp_last_16bytes_t_seq_num_get,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
-    bcmpkt_tcp_last_16bytes_t_win_size_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_set,
-    bcmpkt_tcp_last_16bytes_t_checksum_set,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
-    bcmpkt_tcp_last_16bytes_t_seq_num_set,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
-    bcmpkt_tcp_last_16bytes_t_win_size_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_udp_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_get,
-    bcmpkt_udp_t_dst_port_get,
-    bcmpkt_udp_t_src_port_get,
-    bcmpkt_udp_t_udp_length_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_udp_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_set,
-    bcmpkt_udp_t_dst_port_set,
-    bcmpkt_udp_t_src_port_set,
-    bcmpkt_udp_t_udp_length_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_udp_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_udp_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_udp_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_field_data,
-};
-
-
-static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_vlan_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_get,
-    bcmpkt_vlan_t_pcp_get,
-    bcmpkt_vlan_t_tpid_get,
-    bcmpkt_vlan_t_vid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_vlan_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_set,
-    bcmpkt_vlan_t_pcp_set,
-    bcmpkt_vlan_t_tpid_set,
-    bcmpkt_vlan_t_vid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_vlan_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_vlan_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_vlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_31_3_0_vxlan_t_fget[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_get,
-    bcmpkt_vxlan_t_reserved2_get,
-    bcmpkt_vxlan_t_vn_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_31_3_0_vxlan_t_fset[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_set,
-    bcmpkt_vxlan_t_reserved2_set,
-    bcmpkt_vxlan_t_vn_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_31_3_0_vxlan_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_31_3_0_vxlan_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_31_3_0_vxlan_t_field_data,
-};
-
-static bcmpkt_flex_pmd_info_t bcm56890_a0_cna_6_5_31_3_0_flexhdr_info_list[BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT] = {
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_arp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_arp_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_arp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_cpu_composites_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_ep_nih_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_erspan3_fixed_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_erspan3_subhdr_5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_ethertype_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_ethertype_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_ethertype_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_generic_loopback_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_icmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_icmp_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_icmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_ipfix_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_ipfix_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_ipfix_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_ipv4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_ipv4_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_ipv4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_ipv6_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_ipv6_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_ipv6_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_l2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_l2_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_l2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_mirror_erspan_sn_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_mirror_transport_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_psamp_mirror_on_drop_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_rarp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_rarp_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_rarp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_tcp_first_4bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_tcp_last_16bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_udp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_udp_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_udp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_unknown_l3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_unknown_l4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_unknown_l5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_vlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_vlan_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_vlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_vxlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_31_3_0_vxlan_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_31_3_0_vxlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_field_info,
-        .reasons_info = &bcm56890_a0_cna_6_5_31_3_0_rxpmd_flex_reasons_info,
-        .flex_common_fget = bcm56890_a0_rxpmd_flex_fget,
-        .flex_common_fset = bcm56890_a0_rxpmd_flex_fset,
-    },
-};
-
-static shr_enum_map_t bcm56890_a0_cna_6_5_31_3_0_flexhdr_id_map[] = {
-    BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
-};
-
-shr_enum_map_t * bcm56890_a0_cna_6_5_31_3_0_flexhdr_map_get(void)
-{
-    return bcm56890_a0_cna_6_5_31_3_0_flexhdr_id_map;
-}
-
-bcmpkt_flex_pmd_info_t * bcm56890_a0_cna_6_5_31_3_0_flex_pmd_info_get(uint32_t hid)
-{
-    if (hid >= BCM56890_A0_CNA_6_5_31_3_0_BCMPKT_FLEXHDR_COUNT) {
-        return NULL;
-    }
-
-    return &bcm56890_a0_cna_6_5_31_3_0_flexhdr_info_list[hid];
-}
-
-int bcm56890_a0_cna_6_5_31_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
-    7,
-    -1,
-    -1,
-    27,
-};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 00000000000..2e253b1973c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,1443 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56890_a0_cna_6_5_32_3_0_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant cna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h>
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
+{
+    0x14,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
+{
+    0x1e,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
+{
+    0x18,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] =
+{
+    0x7fffe,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] =
+{
+    0x810,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] =
+{
+    0x3f8,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] =
+{
+    0x1fc00,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] =
+{
+    0x20000,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] =
+{
+    0x3060,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] =
+{
+    0x2040,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] =
+{
+    0xc180,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] =
+{
+    0x40000,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] =
+{
+    0x10200,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] =
+{
+    0x8100,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] =
+{
+    0x28,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] =
+{
+    0x3e,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] =
+{
+    0x30,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] =
+{
+    0x1ffffe,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] =
+{
+    0x1010,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] =
+{
+    0x7f8,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] =
+{
+    0x7f800,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] =
+{
+    0x80000,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] =
+{
+    0x6060,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] =
+{
+    0x4040,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] =
+{
+    0x38380,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] =
+{
+    0x100000,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] =
+{
+    0x40400,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] =
+{
+    0x10100,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] =
+{
+    0x20200,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
+{
+    0x8,
+};
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0x1c00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0x1c00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0x1c00,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0x1c00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info = {
+    .num_entries = 77,
+    .db = bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info = {
+    .num_entries = 77,
+    .map = bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_pkt_flexhdr.c
new file mode 100644
index 00000000000..76ce4bcc9b6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_pkt_flexhdr.c
@@ -0,0 +1,3833 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56890_a0 and variant cna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 343 }, /* Profile 2. */
+            { 336, 343 }, /* Profile 3. */
+            { 336, 343 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 383 }, /* Profile 2. */
+            { 368, 383 }, /* Profile 3. */
+            { 368, 383 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EP_NIH_HDR_DROP_CODE_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_31_16",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 175 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "ERSPAN3_GBP_SID_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 367 }, /* Profile 2. */
+            { 352, 367 }, /* Profile 3. */
+            { 352, 367 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 15 }, /* Profile 2. */
+            { 0, 15 }, /* Profile 3. */
+            { 0, 15 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_16",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 16, 31 }, /* Profile 2. */
+            { 16, 31 }, /* Profile 3. */
+            { 16, 31 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 207 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "IFP_TS_CONTROL_ACTION_3_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 420, 423 }, /* Profile 2. */
+            { 420, 423 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ING_TIMESTAMP_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_16",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INGRESS_PP_PORT_8_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 280 }, /* Profile 2. */
+            { 272, 280 }, /* Profile 3. */
+            { 272, 280 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 223 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 234 }, /* Profile 2. */
+            { 224, 234 }, /* Profile 3. */
+            { 224, 234 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 106 }, /* Profile 2. */
+            { 80, 90 }, /* Profile 3. */
+            { 96, 106 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 269 }, /* Profile 2. */
+            { 256, 269 }, /* Profile 3. */
+            { 256, 269 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 125 }, /* Profile 2. */
+            { 96, 109 }, /* Profile 3. */
+            { 112, 125 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 318 }, /* Profile 2. */
+            { 304, 318 }, /* Profile 3. */
+            { 304, 318 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "NHOP_INDEX_1_14_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 190 }, /* Profile 2. */
+            { 160, 174 }, /* Profile 3. */
+            { 176, 190 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 79 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 64, 79 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 255 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
+            { 240, 255 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 335 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "TAG_ACTION_CTRL_1_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 416, 417 }, /* Profile 2. */
+            { 416, 417 }, /* Profile 3. */
+            { 416, 417 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 95 }, /* Profile 2. */
+            { 64, 79 }, /* Profile 3. */
+            { 80, 95 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+};
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_field_data,
+    .profile_bmp_cnt = 1,
+    .profile_bmp[0] = 0x1c,
+
+};
+
+static shr_enum_map_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_arp_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_arp_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_arp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_arp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_ethertype_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_ethertype_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_ethertype_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_ethertype_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_icmp_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_icmp_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_icmp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_icmp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_ipfix_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_ipfix_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_ipfix_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_ipfix_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_ipv4_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_ipv4_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_ipv4_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_ipv4_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_ipv6_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_ipv6_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_ipv6_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_ipv6_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_l2_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_l2_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_l2_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_l2_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_rarp_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_rarp_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_rarp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_rarp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_udp_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_udp_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_udp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_udp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_vlan_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_vlan_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_vlan_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_vlan_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_vxlan_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_vxlan_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_vxlan_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_vxlan_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_32_3_0_vxlan_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56890_a0_cna_6_5_32_3_0_flexhdr_info_list[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_arp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_ethertype_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_icmp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_ipfix_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_ipv4_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_ipv6_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_l2_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_rarp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_udp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_vlan_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_32_3_0_vxlan_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_32_3_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56890_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56890_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56890_a0_cna_6_5_32_3_0_flexhdr_id_map[] = {
+    BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56890_a0_cna_6_5_32_3_0_flexhdr_map_get(void)
+{
+    return bcm56890_a0_cna_6_5_32_3_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56890_a0_cna_6_5_32_3_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56890_a0_cna_6_5_32_3_0_flexhdr_info_list[hid];
+}
+
+int bcm56890_a0_cna_6_5_32_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    7,
+    -1,
+    -1,
+    26,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c
deleted file mode 100644
index ade5c4c33e1..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c
+++ /dev/null
@@ -1,7278 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56890_a0_dna_6_5_31_6_0_sf_match_id_info.yml
- * for device bcm56890_a0 and variant dna_6_5_31_6_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h>
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] =
-{
-    0x366c,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
-{
-    0x78f0,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
-{
-    0x1fffe,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
-{
-    0xff00,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] =
-{
-    0x1e4c8,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] =
-{
-    0x10,
-    0x400000,
-    0x1dd8000,
-    0x20,
-    0x0,
-    0x0,
-    0x0,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xddfddf77,
-    0x1,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x400000,
-    0x0,
-    0x100,
-    0x800776,
-    0x0,
-    0x0,
-    0x0,
-    0xf77c0000,
-    0xefeeff77,
-    0x7ddfddfe,
-    0x777f7,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde,
-    0x0,
-    0x0,
-    0x7778,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0x77780,
-    0x0,
-    0x0,
-    0x3bbc0000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0xdde00000,
-    0x1,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0xde000000,
-    0x1d,
-    0x0,
-    0x0,
-    0xeef0,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] =
-{
-    0x0,
-    0x0,
-    0x100000,
-    0x1000000,
-    0x0,
-    0x0,
-    0x2000,
-    0x100100,
-    0x4002002,
-    0x10010040,
-    0x400400,
-    0x10008008,
-    0x40040100,
-    0x1001000,
-    0x40040020,
-    0x100100,
-    0x4002002,
-    0x80080040,
-    0x200200,
-    0x2002000,
-    0x80040040,
-    0x200800,
-    0x4004002,
-    0x80080,
-    0x401001,
-    0x2001004,
-    0x40040020,
-    0x800800,
-    0x2002,
-    0x0,
-    0x0,
-    0x40,
-    0x400,
-    0x0,
-    0x80000000,
-    0x4000000,
-    0x80080040,
-    0x1001000,
-    0x10004004,
-    0x200100,
-    0x4004002,
-    0x40010010,
-    0x800400,
-    0x4010010,
-    0x80080040,
-    0x1001000,
-    0x8020020,
-    0x80000080,
-    0x1000800,
-    0x20020010,
-    0x80080,
-    0x2001001,
-    0x40040020,
-    0x40100100,
-    0x800800,
-    0x20010010,
-    0x80080200,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xff77f77c,
-    0xddfeefee,
-    0x77f77ddf,
-    0x7,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xddf00000,
-    0xbfbbfddf,
-    0xf77f77fb,
-    0x1ddfdd,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde000,
-    0x0,
-    0x0,
-    0x7778000,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0x3bbc0000,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0x1dde,
-    0x0,
-    0x0,
-    0x7778,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0x0,
-    0xeef0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0xeef0000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x40,
-    0x0,
-    0x0,
-    0x0,
-    0x2000000,
-    0x0,
-    0x0,
-    0x8000000,
-    0x0,
-    0x0,
-    0x20000008,
-    0x0,
-    0x0,
-    0x40000,
-    0x0,
-    0x0,
-    0x40000000,
-    0x0,
-    0x0,
-    0x80000000,
-    0x0,
-    0x0,
-    0x0,
-    0x400,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1000000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x800,
-    0x0,
-    0x0,
-    0x2000,
-    0x0,
-    0x200000,
-    0x8000,
-    0x0,
-    0x0,
-    0x10,
-    0x0,
-    0x0,
-    0x10000,
-    0x0,
-    0x0,
-    0x20000,
-    0x0,
-    0x0,
-    0x10000000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] =
-{
-    0x1e,
-    0x400000,
-    0x1dd8000,
-    0x3ddcafe0,
-    0x0,
-    0x8000,
-    0xc003bb00,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xddfddf77,
-    0xff77f77d,
-    0xddfeefee,
-    0x77f77ddf,
-    0xfddfddff,
-    0x77f77fbb,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xefeeff77,
-    0x7fbbfbbe,
-    0xfbbfbbe5,
-    0xeff77f77,
-    0xbfbbeefe,
-    0xf77f77fb,
-    0xdfeefeef,
-    0x7f77ddfd,
-    0xfbbfddf7,
-    0x77f77fbb,
-    0xbeefeeff,
-    0x1bbbfb,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfddfddf0,
-    0x77f77fbb,
-    0x1ddfddf,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77c00000,
-    0xfeeff77f,
-    0xf77ddfdd,
-    0x777,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0xf0000000,
-    0xee,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0xeef,
-    0x0,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0x3bbc000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0x3bbc0000,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x1dd,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbe000000,
-    0xf77fbbfb,
-    0xefeeff77,
-    0x3bbfbbe,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xefeef800,
-    0xfddfddfe,
-    0xeefbbfbb,
-    0xeef,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0xeef00,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0xeef0000,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x1dd,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x0,
-    0x1dde00,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] =
-{
-    0x0,
-    0x400000,
-    0x0,
-    0x80,
-    0x0,
-    0x8000,
-    0x0,
-    0x8004004,
-    0x140080,
-    0x400001,
-    0x20010010,
-    0x500200,
-    0x1000004,
-    0x80040040,
-    0x1001400,
-    0x8004000,
-    0x100080,
-    0x2002801,
-    0x4008000,
-    0x80080,
-    0x2801001,
-    0x8000020,
-    0x100100,
-    0x5002002,
-    0x10000040,
-    0x80080000,
-    0x1001000,
-    0x20028,
-    0x80,
-    0x0,
-    0x100,
-    0x2000000,
-    0x0,
-    0x0,
-    0x2,
-    0x100000,
-    0x2002001,
-    0x40050,
-    0x400100,
-    0x8008004,
-    0x100140,
-    0x1000400,
-    0x50020010,
-    0x400,
-    0x2002001,
-    0xa0040040,
-    0x800,
-    0x2001002,
-    0x40040020,
-    0x800a00,
-    0x4002000,
-    0x80080040,
-    0x1001400,
-    0x4000,
-    0x40020020,
-    0xa00400,
-    0x2000008,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0xaf00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x78000000,
-    0x5,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x2,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x15e000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x8800,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x40000000,
-    0x4,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x20000000,
-    0x2,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x110000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x40020,
-    0x0,
-    0x0,
-    0x40000000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x800000,
-    0x10,
-    0x0,
-    0x0,
-    0x10000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] =
-{
-    0x18,
-    0x400000,
-    0x1dd8000,
-    0x3ddcafe0,
-    0x0,
-    0x8000,
-    0x4003bb00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x600000,
-    0x0,
-    0x100,
-    0xbf800776,
-    0xf772,
-    0x0,
-    0xec000002,
-    0x1000e,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xddfddf77,
-    0xff77f77d,
-    0xddfeefee,
-    0x77f77ddf,
-    0xfddfddff,
-    0x77f77fbb,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xefeeff77,
-    0x7fbbfbbe,
-    0xfbbfbbe5,
-    0xeff77f77,
-    0xbfbbeefe,
-    0xf77f77fb,
-    0xdfeefeef,
-    0x7f77ddfd,
-    0xfbbfddf7,
-    0x77f77fbb,
-    0xbeefeeff,
-    0x3bbfb,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf77e0000,
-    0xefeeff77,
-    0x7ddfddfe,
-    0xddf777f7,
-    0xbfbbfddf,
-    0xf77f77fb,
-    0x77fddfdd,
-    0xfeeff77f,
-    0xf77ddfdd,
-    0xefeeff77,
-    0xfddfddfe,
-    0xeefbbfbb,
-    0xef95feef,
-    0xfddfeefe,
-    0xbbfbbfdd,
-    0xdfeefeef,
-    0xfbbfddfd,
-    0x77f77fbb,
-    0x77ddfddf,
-    0xfeefeeff,
-    0xbbfddfdd,
-    0xefeefbbf,
-    0xe,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] =
-{
-    0x0,
-    0x0,
-    0x400000,
-    0x4000000,
-    0x0,
-    0x0,
-    0x8000,
-    0x400400,
-    0x10008008,
-    0x40040100,
-    0x1001000,
-    0x40020020,
-    0x100400,
-    0x4004001,
-    0x100080,
-    0x400401,
-    0x10008008,
-    0x200100,
-    0x800802,
-    0x8008000,
-    0x100100,
-    0x802002,
-    0x10010008,
-    0x200200,
-    0x1004004,
-    0x8004010,
-    0x100080,
-    0x2002001,
-    0x8008,
-    0x0,
-    0x0,
-    0x100,
-    0x1000,
-    0x0,
-    0x0,
-    0x10000002,
-    0x200100,
-    0x4004002,
-    0x40010010,
-    0x800400,
-    0x10010008,
-    0x40040,
-    0x2001001,
-    0x10040040,
-    0x200100,
-    0x4004002,
-    0x20080080,
-    0x200,
-    0x4002002,
-    0x80080040,
-    0x200200,
-    0x8004004,
-    0x100080,
-    0x400401,
-    0x2002001,
-    0x80040040,
-    0x200800,
-    0x2,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbbfbbe0,
-    0xeff77f77,
-    0xbfbbeefe,
-    0x3b,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xef800000,
-    0xfddfeefe,
-    0xbbfbbfdd,
-    0xeefeef,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0xdde00000,
-    0x1,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0xde000000,
-    0x1d,
-    0x0,
-    0x0,
-    0xeef0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0x77780,
-    0x0,
-    0xe0000000,
-    0x1dd,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x0,
-    0x3bbc00,
-    0x0,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0xbbc00000,
-    0x3,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf77f77c0,
-    0xdfeefeef,
-    0x7f77ddfd,
-    0x77,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdf000000,
-    0xfbbfddfd,
-    0x77f77fbb,
-    0x1ddfddf,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0x1dde,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0x0,
-    0xeef0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0xeef0000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0x1dde00,
-    0x0,
-    0x0,
-    0x3bbc00,
-    0x0,
-    0x0,
-    0xbbc00000,
-    0x3,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0x0,
-    0x3bbc,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] =
-{
-    0x0,
-    0x0,
-    0x58000,
-    0x580e00,
-    0x0,
-    0x0,
-    0xb00,
-    0xb0058058,
-    0x1600b00,
-    0x5805816,
-    0xc0160160,
-    0x5802c02,
-    0x16016058,
-    0x580580,
-    0x1601600b,
-    0xb0058058,
-    0x1600b00,
-    0x2c02c016,
-    0x700b00b0,
-    0xb00b00,
-    0x2c016016,
-    0xb00b02c0,
-    0x1601600,
-    0x5802c02c,
-    0x60160580,
-    0xb00581,
-    0x1601600b,
-    0xb02c02c0,
-    0xb00,
-    0x0,
-    0x0,
-    0x38000016,
-    0x160,
-    0x0,
-    0x2c000000,
-    0x1600000,
-    0x2c02c016,
-    0x60580580,
-    0x5801601,
-    0xb00b0058,
-    0x81601600,
-    0x16005805,
-    0x802c0160,
-    0x1605805,
-    0x2c02c016,
-    0x580580,
-    0x2c0b00b,
-    0x2c01c02c,
-    0x805802c0,
-    0xb00b005,
-    0x5802c02c,
-    0xb00580,
-    0x1601600b,
-    0x16058058,
-    0x802c02c0,
-    0xb005805,
-    0x2c02c0b0,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] =
-{
-    0x0,
-    0x0,
-    0x50000,
-    0x500c00,
-    0x0,
-    0x0,
-    0xa00,
-    0xa0050050,
-    0x1400a00,
-    0x5005014,
-    0x80140140,
-    0x5002802,
-    0x14014050,
-    0x500500,
-    0x1401400a,
-    0xa0050050,
-    0x1400a00,
-    0x28028014,
-    0x600a00a0,
-    0xa00a00,
-    0x28014014,
-    0xa00a0280,
-    0x1401400,
-    0x50028028,
-    0x40140500,
-    0xa00501,
-    0x1401400a,
-    0xa0280280,
-    0xa00,
-    0x0,
-    0x0,
-    0x30000014,
-    0x140,
-    0x0,
-    0x28000000,
-    0x1400000,
-    0x28028014,
-    0x40500500,
-    0x5001401,
-    0xa00a0050,
-    0x1401400,
-    0x14005005,
-    0x280140,
-    0x1405005,
-    0x28028014,
-    0x500500,
-    0x280a00a,
-    0x28018028,
-    0x500280,
-    0xa00a005,
-    0x50028028,
-    0xa00500,
-    0x1401400a,
-    0x14050050,
-    0x280280,
-    0xa005005,
-    0x280280a0,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] =
-{
-    0x0,
-    0x0,
-    0xd80000,
-    0xd80a000,
-    0x0,
-    0x0,
-    0x1b000,
-    0xd80d80,
-    0x3601b01b,
-    0xd80d8360,
-    0x3603600,
-    0xd806c06c,
-    0x60360d80,
-    0xd80d803,
-    0x603601b0,
-    0xd80d83,
-    0x3601b01b,
-    0xc06c0360,
-    0x1b01b06,
-    0x1b01b005,
-    0xc0360360,
-    0x1b06c06,
-    0x3603601b,
-    0x806c06c0,
-    0x360d80d,
-    0x1b00d836,
-    0x603601b0,
-    0x6c06c03,
-    0x1b01b,
-    0x0,
-    0x0,
-    0x80000360,
-    0x3602,
-    0x0,
-    0xc0000000,
-    0x36000006,
-    0xc06c0360,
-    0xd80d806,
-    0xd8036036,
-    0x1b00d80,
-    0x3603601b,
-    0x600d80d8,
-    0x6c03603,
-    0x360d80d8,
-    0xc06c0360,
-    0xd80d806,
-    0x6c1b01b0,
-    0xc01406c0,
-    0xd806c06,
-    0xb01b00d8,
-    0x806c06c1,
-    0x1b00d80d,
-    0x603601b0,
-    0x60d80d83,
-    0x6c06c03,
-    0xb00d80d8,
-    0xc06c1b01,
-    0x6,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x100000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] =
-{
-    0x0,
-    0x0,
-    0x1000000,
-    0x10000000,
-    0x0,
-    0x0,
-    0x20000,
-    0x1001000,
-    0x40020020,
-    0x100400,
-    0x4004001,
-    0x80080,
-    0x401001,
-    0x10010004,
-    0x400200,
-    0x1001004,
-    0x40020020,
-    0x800400,
-    0x2002008,
-    0x20020000,
-    0x400400,
-    0x2008008,
-    0x40040020,
-    0x800800,
-    0x4010010,
-    0x20010040,
-    0x400200,
-    0x8008004,
-    0x20020,
-    0x0,
-    0x0,
-    0x400,
-    0x4000,
-    0x0,
-    0x0,
-    0x40000008,
-    0x800400,
-    0x10010008,
-    0x40040,
-    0x2001001,
-    0x40040020,
-    0x100100,
-    0x8004004,
-    0x40100100,
-    0x800400,
-    0x10010008,
-    0x80200200,
-    0x800,
-    0x10008008,
-    0x200100,
-    0x800802,
-    0x20010010,
-    0x400200,
-    0x1001004,
-    0x8008004,
-    0x100100,
-    0x802002,
-    0x8,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] =
-{
-    0x0,
-    0x0,
-    0x840000,
-    0x8400000,
-    0x0,
-    0x0,
-    0x10800,
-    0x80840840,
-    0x21010810,
-    0x84084210,
-    0x2102100,
-    0x84042042,
-    0x10210840,
-    0x8408402,
-    0x10210108,
-    0x80840842,
-    0x21010810,
-    0x20420210,
-    0x1081084,
-    0x10810800,
-    0x20210210,
-    0x81084204,
-    0x21021010,
-    0x40420420,
-    0x2108408,
-    0x10808421,
-    0x10210108,
-    0x84204202,
-    0x10810,
-    0x0,
-    0x0,
-    0x210,
-    0x2100,
-    0x0,
-    0x20000000,
-    0x21000004,
-    0x20420210,
-    0x8408404,
-    0x84021021,
-    0x81080840,
-    0x21021010,
-    0x10084084,
-    0x4202102,
-    0x21084084,
-    0x20420210,
-    0x8408404,
-    0x42108108,
-    0x20000420,
-    0x8404204,
-    0x8108084,
-    0x40420421,
-    0x10808408,
-    0x10210108,
-    0x10840842,
-    0x4204202,
-    0x8084084,
-    0x20421081,
-    0x4,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x20000000,
-    0x0,
-    0x8000,
-    0x4003bb00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbbe0000,
-    0x77f77fbb,
-    0xbeefeeff,
-    0x3bbfb,
-    0x0,
-    0x0,
-    0x0,
-    0x8000,
-    0x0,
-    0xec000002,
-    0x1000e,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfeefeef8,
-    0xbbfddfdd,
-    0xefeefbbf,
-    0xe,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdde00000,
-    0x1,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0x1dde000,
-    0x0,
-    0x0,
-    0x3bbc000,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0x78000000,
-    0x77,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780,
-    0x0,
-    0x0,
-    0x1dde00,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0xeef,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0x1dde000,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[4] =
-{
-    0x33033198,
-    0xcc66066,
-    0x198198cc,
-    0x6633033,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[4] =
-{
-    0x44044220,
-    0x11088088,
-    0x22022110,
-    0x8844044,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[4] =
-{
-    0xffc00000,
-    0xffffffff,
-    0xffe00000,
-    0x7fffffff,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[4] =
-{
-    0x0,
-    0xfffff800,
-    0x0,
-    0x7ffffc00,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[4] =
-{
-    0xf80f87c0,
-    0x3e1f01f0,
-    0x7c07c3e0,
-    0x1f0f80f8,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[4] =
-{
-    0xfffffffe,
-    0xffffffff,
-    0xffffffff,
-    0x7fffffff,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[4] =
-{
-    0x1ff800,
-    0x7fe003ff,
-    0x800ffc00,
-    0x3ff001ff,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[4] =
-{
-    0xa23a2510,
-    0xe8944744,
-    0x511d1288,
-    0x744a23a2,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag[4] =
-{
-    0x0,
-    0x0,
-    0xffffffff,
-    0x7fffffff,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[14] =
-{
-    0x10,
-    0x0,
-    0x4,
-    0x20003df6,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf7c00000,
-    0xfbfefbfd,
-    0x7dff7dfe,
-    0xf7dfbeff,
-    0x7bef,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[35] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf7800000,
-    0x3d,
-    0x0,
-    0x0,
-    0xf7de0000,
-    0x0,
-    0x0,
-    0x0,
-    0x3df7800,
-    0x0,
-    0x0,
-    0x0,
-    0xbef00000,
-    0x7,
-    0x0,
-    0x0,
-    0xf0000000,
-    0x7be,
-    0x0,
-    0x0,
-    0xfbc00000,
-    0x1e,
-    0x0,
-    0x0,
-    0x0,
-    0x1efbc00,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x40,
-    0x0,
-    0x80000,
-    0x0,
-    0x0,
-    0x40000000,
-    0x40000000,
-    0x20002000,
-    0x10001000,
-    0x1000800,
-    0x1000080,
-    0x800080,
-    0x400040,
-    0x40020,
-    0x40002,
-    0x20002,
-    0x20010002,
-    0x1000,
-    0x8000000,
-    0x4000400,
-    0x2000200,
-    0x200100,
-    0x10,
-    0x40008,
-    0x20004,
-    0x20010002,
-    0x20001000,
-    0x10001000,
-    0x8000800,
-    0x800400,
-    0x100040,
-    0x20002,
-    0x80010001,
-    0x80010000,
-    0x8001000,
-    0x11111000,
-    0x11,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[18] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf7df0000,
-    0xfbeffbef,
-    0xfdf7fdf7,
-    0xbfdf7efb,
-    0x1ef,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[36] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1efbc0,
-    0x0,
-    0x0,
-    0x0,
-    0x7bef,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x1ef,
-    0x0,
-    0x0,
-    0x0,
-    0x3df78,
-    0x0,
-    0x0,
-    0x0,
-    0x3df7800,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de0,
-    0x0,
-    0x0,
-    0x0,
-    0xde000000,
-    0xf7,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[36] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x40000000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x200000,
-    0x0,
-    0x0,
-    0x0,
-    0x8000,
-    0x0,
-    0x0,
-    0x200,
-    0x200,
-    0x0,
-    0x0,
-    0x0,
-    0x40000,
-    0x0,
-    0x0,
-    0x0,
-    0x4000000,
-    0x0,
-    0x0,
-    0x0,
-    0x100000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x100,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[40] =
-{
-    0x1e,
-    0x0,
-    0x4,
-    0xe0003df6,
-    0xffffffff,
-    0xfbef117,
-    0x0,
-    0x6000000,
-    0xf6000000,
-    0xf7e0003d,
-    0xfbfefbfd,
-    0x7dff7dfe,
-    0xf7dfbeff,
-    0xf7df7bef,
-    0xfbeffbef,
-    0xfdf7fdf7,
-    0xbfdf7efb,
-    0xbfdf7fef,
-    0xbfefbfef,
-    0xfbf7dfef,
-    0xffff7dfe,
-    0xbeffffff,
-    0xdf7fdf7f,
-    0xefbfefbf,
-    0xfefbf7df,
-    0xfc45ff7d,
-    0x7fdf7fbe,
-    0xbfefbfdf,
-    0xfbf7dfef,
-    0xfbff7dfe,
-    0x7dff7dfe,
-    0xbeffbeff,
-    0xfbefdf7f,
-    0xbf7dfdf7,
-    0xdfefbfef,
-    0xeff7dff7,
-    0xeff7defb,
-    0xbeff7dfb,
-    0xffffffff,
-    0x1ff,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbfdf7c00,
-    0xbfefbfef,
-    0xfbf7dfef,
-    0xf7dfe,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[36] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbc00000,
-    0x1e,
-    0x0,
-    0x0,
-    0x7bef0000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdf780000,
-    0x3,
-    0x0,
-    0x0,
-    0x78000000,
-    0x3df,
-    0x0,
-    0x0,
-    0x7de00000,
-    0xf,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de00,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x180,
-    0x0,
-    0x300000,
-    0x0,
-    0x0,
-    0x80000000,
-    0x80000001,
-    0xc000c001,
-    0x60006000,
-    0x6003000,
-    0x6000300,
-    0x3000300,
-    0x1800180,
-    0x1800c0,
-    0x18000c,
-    0xc000c,
-    0xc006000c,
-    0x6000,
-    0x30000000,
-    0x18001800,
-    0xc000c00,
-    0xc00600,
-    0x60,
-    0x180030,
-    0xc0018,
-    0xc006000c,
-    0xc0006000,
-    0x60006000,
-    0x30003000,
-    0x3001800,
-    0x600180,
-    0xc000c,
-    0x60006,
-    0x60003,
-    0x30006003,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[22] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x3fffffff,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfff00000,
-    0x7ffff,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[22] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1fffe,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xffc00000,
-    0x3f,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[22] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1fe03fc,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x7f800000,
-    0x3fc0,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[22] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x31999b30,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x66000000,
-    0x63333,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[22] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3de1e3c0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x78000000,
-    0x7bc3c,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[26] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbef80000,
-    0xdf7fdf7f,
-    0xefbfefbf,
-    0xfefbf7df,
-    0xf7d,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[37] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x3df7,
-    0x0,
-    0x0,
-    0x1efbc00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1efbc,
-    0x0,
-    0x0,
-    0x0,
-    0x1efbc00,
-    0x0,
-    0x0,
-    0x0,
-    0x7bef0,
-    0x0,
-    0x0,
-    0x0,
-    0xef000000,
-    0x7b,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[38] =
-{
-    0x0,
-    0x0,
-    0x4,
-    0x0,
-    0x40000000,
-    0x0,
-    0x0,
-    0x2000000,
-    0x0,
-    0x1000000,
-    0x800080,
-    0x500040,
-    0x20,
-    0x40002,
-    0x20002,
-    0x80014001,
-    0x8000000,
-    0x8001000,
-    0xa000800,
-    0x400,
-    0x40,
-    0x200000,
-    0x100010,
-    0xa0008,
-    0x40000004,
-    0x20001000,
-    0x10001000,
-    0xa000800,
-    0x400,
-    0x800040,
-    0x400040,
-    0x280020,
-    0x10,
-    0x1,
-    0x4000800,
-    0x2000400,
-    0x2000480,
-    0x200000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[26] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x117,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x45e000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[26] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x104,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x410000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[8] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x20000000,
-    0x0,
-    0x1000,
-    0x0,
-    0x4000000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x100,
-    0x0,
-    0x200000,
-    0x0,
-    0x0,
-    0x0,
-    0x1,
-    0x80008001,
-    0x40004000,
-    0x4002000,
-    0x4000200,
-    0x2000200,
-    0x1000100,
-    0x100080,
-    0x100008,
-    0x80008,
-    0x80040008,
-    0x4000,
-    0x20000000,
-    0x10001000,
-    0x8000800,
-    0x800400,
-    0x40,
-    0x100020,
-    0x80010,
-    0x80040008,
-    0x80004000,
-    0x40004000,
-    0x20002000,
-    0x2001000,
-    0x400100,
-    0x80008,
-    0x40004,
-    0x40002,
-    0x20004002,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] =
-{
-    0x18,
-    0x0,
-    0x4,
-    0xe0003df6,
-    0xffffffff,
-    0xfbef117,
-    0x0,
-    0x6000000,
-    0xf6000000,
-    0x3d,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf7e00000,
-    0xfbfefbfd,
-    0x7dff7dfe,
-    0xf7dfbeff,
-    0xf7df7bef,
-    0xfbeffbef,
-    0xfdf7fdf7,
-    0xbfdf7efb,
-    0xbfdf7fef,
-    0xbfefbfef,
-    0xfbf7dfef,
-    0xffff7dfe,
-    0xbeffffff,
-    0xdf7fdf7f,
-    0xefbfefbf,
-    0xfefbf7df,
-    0xfc45ff7d,
-    0x7fdf7fbe,
-    0xbfefbfdf,
-    0xfbf7dfef,
-    0xfbff7dfe,
-    0x7dff7dfe,
-    0xbeffbeff,
-    0xfbefdf7f,
-    0xbf7dfdf7,
-    0xdfefbfef,
-    0xeff7dff7,
-    0xeff7defb,
-    0xbeff7dfb,
-    0x7,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfffffff8,
-    0x3f,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfffffff0,
-    0x3,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3fffffe0,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3ffffc0,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3fff80,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3ff00,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3e00,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x99999800,
-    0x19,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x22222000,
-    0x22,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x400,
-    0x0,
-    0x800000,
-    0x0,
-    0x0,
-    0x0,
-    0x4,
-    0x20004,
-    0x10002,
-    0x10008001,
-    0x10000800,
-    0x8000800,
-    0x4000400,
-    0x400200,
-    0x400020,
-    0x200020,
-    0x100020,
-    0x10002,
-    0x80000000,
-    0x40004000,
-    0x20002000,
-    0x2001000,
-    0x100,
-    0x400080,
-    0x200040,
-    0x100020,
-    0x10002,
-    0x10002,
-    0x80008001,
-    0x8004000,
-    0x1000400,
-    0x200020,
-    0x100010,
-    0x100008,
-    0x80010008,
-    0x0,
-    0x40,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[30] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf8000000,
-    0x7fdf7fbe,
-    0xbfefbfdf,
-    0xfbf7dfef,
-    0xf7dfe,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[37] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x7de00000,
-    0xf,
-    0x0,
-    0x0,
-    0x3df78000,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x1ef,
-    0x0,
-    0x0,
-    0x0,
-    0xefbc0000,
-    0x1,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x1ef,
-    0x0,
-    0x0,
-    0xbef00000,
-    0x7,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de00,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[34] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbe00000,
-    0x7dff7dfe,
-    0xbeffbeff,
-    0xfbefdf7f,
-    0x3df7,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x7bef0,
-    0x0,
-    0x0,
-    0xc0000000,
-    0x1efb,
-    0x0,
-    0x0,
-    0xf7de00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de00,
-    0x0,
-    0x0,
-    0x0,
-    0x3df78,
-    0x0,
-    0x0,
-    0x0,
-    0xef000000,
-    0x7b,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[34] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf7dc000,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x16,
-    0x0,
-    0x2c007,
-    0x0,
-    0x0,
-    0x16000000,
-    0x16000000,
-    0xb000b00,
-    0x5800580,
-    0x5802c0,
-    0x58002c,
-    0x2c002c,
-    0x160016,
-    0xb001600b,
-    0xb0016000,
-    0xb000b000,
-    0xb005800,
-    0x580,
-    0x2c00000,
-    0x1600160,
-    0xb000b0,
-    0x800b0058,
-    0xc001c005,
-    0x60016002,
-    0xb000b001,
-    0xb005800,
-    0xb000580,
-    0x5800580,
-    0x2c002c0,
-    0x2c0160,
-    0xb0058016,
-    0x5800b000,
-    0x2c005800,
-    0x2c005800,
-    0x2c00580,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x14,
-    0x0,
-    0x28006,
-    0x0,
-    0x0,
-    0x14000000,
-    0x14000000,
-    0xa000a00,
-    0x5000500,
-    0x500280,
-    0x500028,
-    0x280028,
-    0x140014,
-    0xa001400a,
-    0xa0014000,
-    0xa000a000,
-    0xa005000,
-    0x500,
-    0x2800000,
-    0x1400140,
-    0xa000a0,
-    0xa0050,
-    0x80018005,
-    0x40014002,
-    0xa000a001,
-    0xa005000,
-    0xa000500,
-    0x5000500,
-    0x2800280,
-    0x280140,
-    0xa0050014,
-    0x5000a000,
-    0x28005000,
-    0x28005000,
-    0x2800500,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x1de0,
-    0x0,
-    0x3bc0110,
-    0x0,
-    0x0,
-    0xe0000000,
-    0xe000001d,
-    0xf00ef01d,
-    0x7807780e,
-    0x7783bc07,
-    0x77803bc0,
-    0x3bc03bc0,
-    0x1de01de0,
-    0x1de0ef0,
-    0x1de00ef,
-    0xef00ef,
-    0xf07780ef,
-    0x7780e,
-    0xbc000000,
-    0xde01de03,
-    0xef00ef01,
-    0xef07780,
-    0x440778,
-    0x1de03bc,
-    0xef01de,
-    0xf07780ef,
-    0xf007780e,
-    0x7807780e,
-    0xbc03bc07,
-    0x3bc1de03,
-    0x7781de0,
-    0x80ef00ef,
-    0xc0778077,
-    0xc077803b,
-    0xbc07783b,
-    0x3,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x100,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x2000,
-    0x0,
-    0x4000000,
-    0x0,
-    0x0,
-    0x0,
-    0x20,
-    0x100020,
-    0x80010,
-    0x80040008,
-    0x80004000,
-    0x40004000,
-    0x20002000,
-    0x2001000,
-    0x2000100,
-    0x1000100,
-    0x800100,
-    0x80010,
-    0x0,
-    0x20004,
-    0x10002,
-    0x10008001,
-    0x800,
-    0x2000400,
-    0x1000200,
-    0x800100,
-    0x80010,
-    0x80010,
-    0x40008,
-    0x40020004,
-    0x8002000,
-    0x1000100,
-    0x800080,
-    0x800040,
-    0x80040,
-    0x4,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x810,
-    0x0,
-    0x1020000,
-    0x0,
-    0x0,
-    0x10000000,
-    0x10000008,
-    0x8040808,
-    0x4020404,
-    0x20410202,
-    0x20401020,
-    0x10201020,
-    0x8100810,
-    0x80810408,
-    0x80810040,
-    0x80408040,
-    0x8204040,
-    0x20404,
-    0x2000000,
-    0x81008101,
-    0x40804080,
-    0x4082040,
-    0x204,
-    0x810102,
-    0x80408081,
-    0x8204040,
-    0x8020404,
-    0x4020404,
-    0x2010202,
-    0x10208101,
-    0x82040810,
-    0x40408040,
-    0x20204020,
-    0x20204010,
-    0x2020410,
-    0x1,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x1000,
-    0x0,
-    0x2000000,
-    0x0,
-    0x0,
-    0x0,
-    0x10,
-    0x80010,
-    0x40008,
-    0x40020004,
-    0x40002000,
-    0x20002000,
-    0x10001000,
-    0x1000800,
-    0x1000080,
-    0x800080,
-    0x400080,
-    0x40008,
-    0x0,
-    0x10002,
-    0x80008001,
-    0x8004000,
-    0x400,
-    0x1000200,
-    0x800100,
-    0x400080,
-    0x40008,
-    0x40008,
-    0x20004,
-    0x20010002,
-    0x4001000,
-    0x800080,
-    0x400040,
-    0x400020,
-    0x40020,
-    0x2,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x8000000,
-    0x0,
-    0x6000000,
-    0xf6000000,
-    0x3d,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdfefbe00,
-    0xeff7dff7,
-    0xeff7defb,
-    0xbeff7dfb,
-    0x7,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x7bef,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x1ef,
-    0x0,
-    0x0,
-    0xf7de0,
-    0x0,
-    0x0,
-    0x0,
-    0xe0000000,
-    0xf7d,
-    0x0,
-    0x0,
-    0x0,
-    0xf7de0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x3df7,
-    0x0,
-    0x0,
-    0x0,
-    0xbef00000,
-    0x7,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
-{
-    0x8,
-};
-
-
-static bcmpkt_rxpmd_match_id_db_t
-bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_COUNT] = {
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_CNTAG",
-        .match        = 0x100,
-        .match_mask   = 0x180,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM",
-        .match        = 0x80,
-        .match_mask   = 0x180,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x1ff,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 8,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_SVTAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x9,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0x2c000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xb,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x30000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xc,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
-        .match        = 0x30,
-        .match_mask   = 0x438,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
-        .match        = 0x18,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x80,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x10000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x38,
-        .match_mask   = 0x438,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x8000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x2c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xb,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0xc000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
-        .match        = 0x400,
-        .match_mask   = 0x400,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 10,
-        .minbit       = 10,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
-        .match        = 0x402,
-        .match_mask   = 0x402,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
-        .match        = 0x404,
-        .match_mask   = 0x404,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
-        .match        = 0x408,
-        .match_mask   = 0x408,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
-        .match        = 0x410,
-        .match_mask   = 0x410,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
-        .match        = 0x420,
-        .match_mask   = 0x420,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
-        .match        = 0x440,
-        .match_mask   = 0x440,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x480,
-        .match_mask   = 0x480,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
-        .match        = 0x500,
-        .match_mask   = 0x500,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3ffff,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x34000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xd,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
-        .match        = 0x14000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x20000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x8,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1",
-        .match        = 0x18000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x1c000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
-        .match        = 0x810,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x28000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xa,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
-        .name         = "EGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG",
-        .match        = 0x100,
-        .match_mask   = 0x180,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM",
-        .match        = 0x80,
-        .match_mask   = 0x180,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x1ff,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 8,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x9,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0x2c000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xb,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x30000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xc,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
-        .match        = 0x30,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
-        .match        = 0x18,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x80,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x10000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x38,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x8000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x2c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xb,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0xc000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
-        .match        = 0x400,
-        .match_mask   = 0x400,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 10,
-        .minbit       = 10,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
-        .match        = 0x402,
-        .match_mask   = 0x402,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
-        .match        = 0x404,
-        .match_mask   = 0x404,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
-        .match        = 0x408,
-        .match_mask   = 0x408,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
-        .match        = 0x410,
-        .match_mask   = 0x410,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
-        .match        = 0x420,
-        .match_mask   = 0x420,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
-        .match        = 0x440,
-        .match_mask   = 0x440,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x480,
-        .match_mask   = 0x480,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
-        .match        = 0x500,
-        .match_mask   = 0x500,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3ffff,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x34000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xd,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
-        .match        = 0x14000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x20000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x8,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1",
-        .match        = 0x18000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x1c000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
-        .match        = 0x810,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x28000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xa,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_CNTAG",
-        .match        = 0x100,
-        .match_mask   = 0x180,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x1ff,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 8,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 37,
-        .match_minbit = 29,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x9,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 55,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0x2c000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xb,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 42,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 55,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 55,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 29,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x30000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xc,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 45,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 56,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x8000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 48,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 56,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x2c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xb,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 48,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0xc000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 48,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3ffff,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x34000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xd,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 51,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
-        .match        = 0x14000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 29,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x20000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x8,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 54,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x1c000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 29,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x28000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xa,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 38,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 38,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_CNTAG",
-        .match        = 0x100,
-        .match_mask   = 0x180,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM",
-        .match        = 0x80,
-        .match_mask   = 0x180,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
-        .match        = 0x40,
-        .match_mask   = 0x40,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x1ff,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 8,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_SVTAG",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 10,
-        .match_minbit = 2,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x9,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 14,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 35,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0x2c000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xb,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 18,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x30000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xc,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 21,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
-        .match        = 0x30,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
-        .match        = 0x18,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 22,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x80,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 22,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 22,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x10000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 22,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x38,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 22,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x8000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 26,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x2c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xb,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 26,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0xc000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 26,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 8,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 10,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
-        .match        = 0x400,
-        .match_mask   = 0x400,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 10,
-        .minbit       = 10,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
-        .match        = 0x402,
-        .match_mask   = 0x402,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
-        .match        = 0x404,
-        .match_mask   = 0x404,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
-        .match        = 0x408,
-        .match_mask   = 0x408,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
-        .match        = 0x410,
-        .match_mask   = 0x410,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
-        .match        = 0x420,
-        .match_mask   = 0x420,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
-        .match        = 0x440,
-        .match_mask   = 0x440,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x480,
-        .match_mask   = 0x480,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
-        .match        = 0x500,
-        .match_mask   = 0x500,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3ffff,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x34000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xd,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 30,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
-        .match        = 0x14000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x20000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x8,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 34,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1",
-        .match        = 0x18000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 34,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x1c000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
-        .match        = 0x810,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x28000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 17,
-        .minbit       = 14,
-        .value        = 0xa,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 11,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 11,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_31_6_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
-
-    },
-    {
-        /* BCM56890_A0_DNA_6_5_31_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
-        .name         = "INGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-
-    },
-};
-
-static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info = {
-    .num_entries = 228,
-    .db = bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db
-};
-bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info_get(void) {
-    return &bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_db_info;
-}
-
-static shr_enum_map_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info = {
-    .num_entries = 228,
-    .map = bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map
-};
-
-bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info_get(void) {
-    return &bcm56890_a0_dna_6_5_31_6_0_rxpmd_match_id_map_info;
-}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_pkt_flexhdr.c
deleted file mode 100644
index 8b12d1f1e4f..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_pkt_flexhdr.c
+++ /dev/null
@@ -1,11480 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml
- * for device bcm56890_a0 and variant dna_6_5_31_6_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#include <sal/sal_types.h>
-#include <shr/shr_error.h>
-#include <bcmpkt/bcmpkt_flexhdr.h>
-#include <bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_31_6_0/bcm56890_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h>
-
-#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
-#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
-#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
-#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
-
-static void bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
-{
-    uint32_t *reason = data + 0;
-
-    if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
-    }
-    if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
-    }
-    if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
-    }
-    if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS);
-    }
-    if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
-    }
-    if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
-    }
-    if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
-    }
-    if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
-    }
-    if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
-    }
-    if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
-    }
-    if (reason[13] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
-    }
-    if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
-    }
-    if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
-    }
-    if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
-    }
-    if (reason[13] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
-    }
-    if (reason[13] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
-    }
-    if (reason[13] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
-    }
-    if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
-    }
-    if (reason[13] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
-    }
-    if (reason[13] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
-    }
-    if (reason[13] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
-    }
-    if (reason[13] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
-    }
-    if (reason[13] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[13] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[13] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
-    }
-    if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
-    }
-    if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
-    }
-    if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
-    }
-    if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
-    }
-    if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
-    }
-    if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
-    }
-    if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
-    }
-    if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT);
-    }
-    if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SRV6);
-    }
-    if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
-    }
-    if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
-    }
-    if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
-    }
-}
-
-static void bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
-{
-    uint32_t *reason = data + 0;
-
-    reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
-        reason[13] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
-        reason[13] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
-        reason[13] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) {
-        reason[13] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
-        reason[13] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
-        reason[13] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
-        reason[13] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
-        reason[13] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
-        reason[13] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
-        reason[13] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 15);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
-        reason[13] |= (0x1 << 16);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
-        reason[13] |= (0x1 << 17);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
-        reason[13] |= (0x1 << 18);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
-        reason[13] |= (0x1 << 19);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
-        reason[13] |= (0x1 << 20);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
-        reason[13] |= (0x1 << 21);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
-        reason[13] |= (0x1 << 22);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
-        reason[13] |= (0x1 << 23);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
-        reason[13] |= (0x1 << 24);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
-        reason[13] |= (0x1 << 25);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
-        reason[13] |= (0x1 << 26);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 27);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
-        reason[13] |= (0x1 << 28);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[13] |= (0x1 << 29);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[13] |= (0x1 << 30);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
-        reason[13] |= (0x1 << 31);
-    }
-    reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
-        reason[12] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
-        reason[12] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
-        reason[12] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
-        reason[12] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
-        reason[12] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
-        reason[12] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
-        reason[12] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
-        reason[12] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) {
-        reason[12] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
-        reason[12] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
-        reason[12] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) {
-        reason[12] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
-        reason[12] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
-        reason[12] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
-        reason[12] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
-        reason[12] |= (0x1 << 15);
-    }
-}
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_field_data[] = {
-    {
-        .name = "BSCAN_CONTROL_DATA_15_0",
-        .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 400, 415 }, /* Profile 2. */
-            { 368, 383 }, /* Profile 3. */
-            { 400, 415 }, /* Profile 4. */
-            { 400, 415 }, /* Profile 5. */
-            { 400, 415 }, /* Profile 6. */
-            { 400, 415 }, /* Profile 7. */
-            { 368, 383 }, /* Profile 8. */
-            { 400, 415 }, /* Profile 9. */
-            { 400, 415 }, /* Profile 10. */
-            { 400, 415 }, /* Profile 11. */
-            { 400, 415 }, /* Profile 12. */
-            { 368, 383 }, /* Profile 13. */
-            { 400, 415 }, /* Profile 14. */
-            { 400, 415 }, /* Profile 15. */
-            { 400, 415 }, /* Profile 16. */
-            { 368, 383 }, /* Profile 17. */
-            { 400, 415 }, /* Profile 18. */
-            { 400, 415 }, /* Profile 19. */
-            { 400, 415 }, /* Profile 20. */
-            { 400, 415 }, /* Profile 21. */
-            { 368, 383 }, /* Profile 22. */
-            { 400, 415 }, /* Profile 23. */
-            { 400, 415 }, /* Profile 24. */
-            { 400, 415 }, /* Profile 25. */
-            { 400, 415 }, /* Profile 26. */
-            { 368, 383 }, /* Profile 27. */
-            { 400, 415 }, /* Profile 28. */
-            { 400, 415 }, /* Profile 29. */
-            { 400, 415 }, /* Profile 30. */
-            { 368, 383 }, /* Profile 31. */
-            { 400, 415 }, /* Profile 32. */
-            { 400, 415 }, /* Profile 33. */
-            { 400, 415 }, /* Profile 34. */
-            { 400, 415 }, /* Profile 35. */
-            { 368, 383 }, /* Profile 36. */
-            { 400, 415 }, /* Profile 37. */
-            { 400, 415 }, /* Profile 38. */
-            { 400, 415 }, /* Profile 39. */
-            { 400, 415 }, /* Profile 40. */
-            { 368, 383 }, /* Profile 41. */
-            { 400, 415 }, /* Profile 42. */
-            { 400, 415 }, /* Profile 43. */
-            { 400, 415 }, /* Profile 44. */
-            { 368, 383 }, /* Profile 45. */
-            { 400, 415 }, /* Profile 46. */
-            { 400, 415 }, /* Profile 47. */
-            { 400, 415 }, /* Profile 48. */
-            { 400, 415 }, /* Profile 49. */
-            { 368, 383 }, /* Profile 50. */
-            { 400, 415 }, /* Profile 51. */
-            { 400, 415 }, /* Profile 52. */
-            { 400, 415 }, /* Profile 53. */
-            { 400, 415 }, /* Profile 54. */
-            { 368, 383 }, /* Profile 55. */
-            { 400, 415 }, /* Profile 56. */
-            { 400, 415 }, /* Profile 57. */
-        },
-        .profile_cnt = 58,
-    },
-    {
-        .name = "BSCAN_CONTROL_FLAGS_3_0",
-        .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 476, 479 }, /* Profile 2. */
-            { 456, 459 }, /* Profile 3. */
-            { 476, 479 }, /* Profile 4. */
-            { 476, 479 }, /* Profile 5. */
-            { 476, 479 }, /* Profile 6. */
-            { 476, 479 }, /* Profile 7. */
-            { 456, 459 }, /* Profile 8. */
-            { 476, 479 }, /* Profile 9. */
-            { 476, 479 }, /* Profile 10. */
-            { 476, 479 }, /* Profile 11. */
-            { 476, 479 }, /* Profile 12. */
-            { 456, 459 }, /* Profile 13. */
-            { 476, 479 }, /* Profile 14. */
-            { 476, 479 }, /* Profile 15. */
-            { 476, 479 }, /* Profile 16. */
-            { 456, 459 }, /* Profile 17. */
-            { 476, 479 }, /* Profile 18. */
-            { 476, 479 }, /* Profile 19. */
-            { 476, 479 }, /* Profile 20. */
-            { 476, 479 }, /* Profile 21. */
-            { 456, 459 }, /* Profile 22. */
-            { 476, 479 }, /* Profile 23. */
-            { 476, 479 }, /* Profile 24. */
-            { 476, 479 }, /* Profile 25. */
-            { 476, 479 }, /* Profile 26. */
-            { 456, 459 }, /* Profile 27. */
-            { 476, 479 }, /* Profile 28. */
-            { 476, 479 }, /* Profile 29. */
-            { 476, 479 }, /* Profile 30. */
-            { 456, 459 }, /* Profile 31. */
-            { 476, 479 }, /* Profile 32. */
-            { 476, 479 }, /* Profile 33. */
-            { 476, 479 }, /* Profile 34. */
-            { 476, 479 }, /* Profile 35. */
-            { 456, 459 }, /* Profile 36. */
-            { 476, 479 }, /* Profile 37. */
-            { 476, 479 }, /* Profile 38. */
-            { 476, 479 }, /* Profile 39. */
-            { 476, 479 }, /* Profile 40. */
-            { 456, 459 }, /* Profile 41. */
-            { 476, 479 }, /* Profile 42. */
-            { 476, 479 }, /* Profile 43. */
-            { 476, 479 }, /* Profile 44. */
-            { 456, 459 }, /* Profile 45. */
-            { 476, 479 }, /* Profile 46. */
-            { 476, 479 }, /* Profile 47. */
-            { 476, 479 }, /* Profile 48. */
-            { 476, 479 }, /* Profile 49. */
-            { 456, 459 }, /* Profile 50. */
-            { 476, 479 }, /* Profile 51. */
-            { 476, 479 }, /* Profile 52. */
-            { 476, 479 }, /* Profile 53. */
-            { 476, 479 }, /* Profile 54. */
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-            { 112, 127 }, /* Profile 17. */
-            { 112, 127 }, /* Profile 18. */
-            { 112, 127 }, /* Profile 19. */
-            { 112, 127 }, /* Profile 20. */
-            { 112, 127 }, /* Profile 21. */
-            { 112, 127 }, /* Profile 22. */
-            { 112, 127 }, /* Profile 23. */
-            { 112, 127 }, /* Profile 24. */
-            { 112, 127 }, /* Profile 25. */
-            { 112, 127 }, /* Profile 26. */
-            { 112, 127 }, /* Profile 27. */
-            { 112, 127 }, /* Profile 28. */
-            { 112, 127 }, /* Profile 29. */
-            { 112, 127 }, /* Profile 30. */
-            { 112, 127 }, /* Profile 31. */
-            { 112, 127 }, /* Profile 32. */
-            { 112, 127 }, /* Profile 33. */
-            { 112, 127 }, /* Profile 34. */
-            { 112, 127 }, /* Profile 35. */
-            { 112, 127 }, /* Profile 36. */
-            { 112, 127 }, /* Profile 37. */
-            { 112, 127 }, /* Profile 38. */
-            { 112, 127 }, /* Profile 39. */
-            { 112, 127 }, /* Profile 40. */
-            { 112, 127 }, /* Profile 41. */
-            { 112, 127 }, /* Profile 42. */
-            { 112, 127 }, /* Profile 43. */
-            { 112, 127 }, /* Profile 44. */
-            { 112, 127 }, /* Profile 45. */
-            { 112, 127 }, /* Profile 46. */
-            { 112, 127 }, /* Profile 47. */
-            { 112, 127 }, /* Profile 48. */
-            { 112, 127 }, /* Profile 49. */
-            { 112, 127 }, /* Profile 50. */
-            { 112, 127 }, /* Profile 51. */
-            { 112, 127 }, /* Profile 52. */
-            { 112, 127 }, /* Profile 53. */
-            { 112, 127 }, /* Profile 54. */
-            { 112, 127 }, /* Profile 55. */
-            { 112, 127 }, /* Profile 56. */
-            { 112, 127 }, /* Profile 57. */
-        },
-        .profile_cnt = 58,
-    },
-    {
-        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
-        .fid = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 436, 439 }, /* Profile 2. */
-            { 404, 407 }, /* Profile 3. */
-            { 440, 443 }, /* Profile 4. */
-            { 436, 439 }, /* Profile 5. */
-            { 436, 439 }, /* Profile 6. */
-            { 436, 439 }, /* Profile 7. */
-            { 404, 407 }, /* Profile 8. */
-            { 440, 443 }, /* Profile 9. */
-            { 436, 439 }, /* Profile 10. */
-            { 436, 439 }, /* Profile 11. */
-            { 436, 439 }, /* Profile 12. */
-            { 404, 407 }, /* Profile 13. */
-            { 440, 443 }, /* Profile 14. */
-            { 436, 439 }, /* Profile 15. */
-            { 436, 439 }, /* Profile 16. */
-            { 404, 407 }, /* Profile 17. */
-            { 440, 443 }, /* Profile 18. */
-            { 436, 439 }, /* Profile 19. */
-            { 436, 439 }, /* Profile 20. */
-            { 436, 439 }, /* Profile 21. */
-            { 404, 407 }, /* Profile 22. */
-            { 440, 443 }, /* Profile 23. */
-            { 436, 439 }, /* Profile 24. */
-            { 436, 439 }, /* Profile 25. */
-            { 436, 439 }, /* Profile 26. */
-            { 404, 407 }, /* Profile 27. */
-            { 440, 443 }, /* Profile 28. */
-            { 436, 439 }, /* Profile 29. */
-            { 436, 439 }, /* Profile 30. */
-            { 404, 407 }, /* Profile 31. */
-            { 440, 443 }, /* Profile 32. */
-            { 436, 439 }, /* Profile 33. */
-            { 436, 439 }, /* Profile 34. */
-            { 436, 439 }, /* Profile 35. */
-            { 404, 407 }, /* Profile 36. */
-            { 440, 443 }, /* Profile 37. */
-            { 436, 439 }, /* Profile 38. */
-            { 436, 439 }, /* Profile 39. */
-            { 436, 439 }, /* Profile 40. */
-            { 404, 407 }, /* Profile 41. */
-            { 440, 443 }, /* Profile 42. */
-            { 436, 439 }, /* Profile 43. */
-            { 436, 439 }, /* Profile 44. */
-            { 404, 407 }, /* Profile 45. */
-            { 440, 443 }, /* Profile 46. */
-            { 436, 439 }, /* Profile 47. */
-            { 436, 439 }, /* Profile 48. */
-            { 436, 439 }, /* Profile 49. */
-            { 404, 407 }, /* Profile 50. */
-            { 440, 443 }, /* Profile 51. */
-            { 436, 439 }, /* Profile 52. */
-            { 436, 439 }, /* Profile 53. */
-            { 436, 439 }, /* Profile 54. */
-            { 404, 407 }, /* Profile 55. */
-            { 440, 443 }, /* Profile 56. */
-            { 436, 439 }, /* Profile 57. */
-        },
-        .profile_cnt = 58,
-    },
-};
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_field_data,
-    .profile_bmp_cnt = 2,
-    .profile_bmp[0] = 0xfffffffc,
-    .profile_bmp[1] = 0x3ffffff,
-
-};
-
-static shr_enum_map_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_names[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_reasons_info_t bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_names,
-    .reason_encode = bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reason_decode,
-};
-
-
-static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_arp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_get,
-    bcmpkt_arp_t_hardware_type_get,
-    bcmpkt_arp_t_operation_get,
-    bcmpkt_arp_t_prot_addr_len_get,
-    bcmpkt_arp_t_protocol_type_get,
-    bcmpkt_arp_t_sender_ha_get,
-    bcmpkt_arp_t_sender_ip_get,
-    bcmpkt_arp_t_target_ha_get,
-    bcmpkt_arp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_arp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_set,
-    bcmpkt_arp_t_hardware_type_set,
-    bcmpkt_arp_t_operation_set,
-    bcmpkt_arp_t_prot_addr_len_set,
-    bcmpkt_arp_t_protocol_type_set,
-    bcmpkt_arp_t_sender_ha_set,
-    bcmpkt_arp_t_sender_ip_set,
-    bcmpkt_arp_t_target_ha_set,
-    bcmpkt_arp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_arp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_arp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_arp_t_field_data,
-};
-
-
-static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_authen_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_get,
-    bcmpkt_authen_t_next_header_get,
-    bcmpkt_authen_t_payload_len_get,
-    bcmpkt_authen_t_reserved_get,
-    bcmpkt_authen_t_seq_num_get,
-    bcmpkt_authen_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_authen_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_set,
-    bcmpkt_authen_t_next_header_set,
-    bcmpkt_authen_t_payload_len_set,
-    bcmpkt_authen_t_reserved_set,
-    bcmpkt_authen_t_seq_num_set,
-    bcmpkt_authen_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_authen_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_authen_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_authen_t_field_data,
-};
-
-
-static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 18, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 18, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 17, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 17, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 5);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 5, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 21, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 21, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_bfd_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_get,
-    bcmpkt_bfd_t_bfd_length_get,
-    bcmpkt_bfd_t_cpi_get,
-    bcmpkt_bfd_t_dem_get,
-    bcmpkt_bfd_t_desmintxintv_get,
-    bcmpkt_bfd_t_detectmult_get,
-    bcmpkt_bfd_t_diag_get,
-    bcmpkt_bfd_t_fin_get,
-    bcmpkt_bfd_t_minechorxintv_get,
-    bcmpkt_bfd_t_mpt_get,
-    bcmpkt_bfd_t_mydiscrim_get,
-    bcmpkt_bfd_t_poll_get,
-    bcmpkt_bfd_t_reqminrxintv_get,
-    bcmpkt_bfd_t_sta_get,
-    bcmpkt_bfd_t_urdiscrim_get,
-    bcmpkt_bfd_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_bfd_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_set,
-    bcmpkt_bfd_t_bfd_length_set,
-    bcmpkt_bfd_t_cpi_set,
-    bcmpkt_bfd_t_dem_set,
-    bcmpkt_bfd_t_desmintxintv_set,
-    bcmpkt_bfd_t_detectmult_set,
-    bcmpkt_bfd_t_diag_set,
-    bcmpkt_bfd_t_fin_set,
-    bcmpkt_bfd_t_minechorxintv_set,
-    bcmpkt_bfd_t_mpt_set,
-    bcmpkt_bfd_t_mydiscrim_set,
-    bcmpkt_bfd_t_poll_set,
-    bcmpkt_bfd_t_reqminrxintv_set,
-    bcmpkt_bfd_t_sta_set,
-    bcmpkt_bfd_t_urdiscrim_set,
-    bcmpkt_bfd_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_bfd_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_bfd_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_bfd_t_field_data,
-};
-
-
-static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_cntag_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_get,
-    bcmpkt_cntag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_cntag_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_set,
-    bcmpkt_cntag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_cntag_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_cntag_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CNTAG_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_cntag_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_get,
-    bcmpkt_cpu_composites_0_t_dma_cont1_get,
-    bcmpkt_cpu_composites_0_t_dma_cont2_get,
-    bcmpkt_cpu_composites_0_t_dma_cont3_get,
-    bcmpkt_cpu_composites_0_t_dma_cont4_get,
-    bcmpkt_cpu_composites_0_t_dma_cont5_get,
-    bcmpkt_cpu_composites_0_t_dma_cont6_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_set,
-    bcmpkt_cpu_composites_0_t_dma_cont1_set,
-    bcmpkt_cpu_composites_0_t_dma_cont2_set,
-    bcmpkt_cpu_composites_0_t_dma_cont3_set,
-    bcmpkt_cpu_composites_0_t_dma_cont4_set,
-    bcmpkt_cpu_composites_0_t_dma_cont5_set,
-    bcmpkt_cpu_composites_0_t_dma_cont6_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_get,
-    bcmpkt_cpu_composites_1_t_dma_cont11_get,
-    bcmpkt_cpu_composites_1_t_dma_cont12_get,
-    bcmpkt_cpu_composites_1_t_dma_cont13_get,
-    bcmpkt_cpu_composites_1_t_dma_cont14_get,
-    bcmpkt_cpu_composites_1_t_dma_cont15_get,
-    bcmpkt_cpu_composites_1_t_dma_cont16_get,
-    bcmpkt_cpu_composites_1_t_dma_cont17_get,
-    bcmpkt_cpu_composites_1_t_dma_cont7_get,
-    bcmpkt_cpu_composites_1_t_dma_cont8_get,
-    bcmpkt_cpu_composites_1_t_dma_cont9_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_set,
-    bcmpkt_cpu_composites_1_t_dma_cont11_set,
-    bcmpkt_cpu_composites_1_t_dma_cont12_set,
-    bcmpkt_cpu_composites_1_t_dma_cont13_set,
-    bcmpkt_cpu_composites_1_t_dma_cont14_set,
-    bcmpkt_cpu_composites_1_t_dma_cont15_set,
-    bcmpkt_cpu_composites_1_t_dma_cont16_set,
-    bcmpkt_cpu_composites_1_t_dma_cont17_set,
-    bcmpkt_cpu_composites_1_t_dma_cont7_set,
-    bcmpkt_cpu_composites_1_t_dma_cont8_set,
-    bcmpkt_cpu_composites_1_t_dma_cont9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_dest_option_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_get,
-    bcmpkt_dest_option_t_next_header_get,
-    bcmpkt_dest_option_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_dest_option_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_set,
-    bcmpkt_dest_option_t_next_header_set,
-    bcmpkt_dest_option_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_dest_option_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_dest_option_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_dest_option_t_field_data,
-};
-
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_get,
-    bcmpkt_ep_nih_header_t_header_type_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
-    bcmpkt_ep_nih_header_t_opaque_object_a_get,
-    bcmpkt_ep_nih_header_t_opaque_object_b_get,
-    bcmpkt_ep_nih_header_t_opaque_object_c_get,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
-    bcmpkt_ep_nih_header_t_reserved_0_get,
-    bcmpkt_ep_nih_header_t_start_get,
-    bcmpkt_ep_nih_header_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_set,
-    bcmpkt_ep_nih_header_t_header_type_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
-    bcmpkt_ep_nih_header_t_opaque_object_a_set,
-    bcmpkt_ep_nih_header_t_opaque_object_b_set,
-    bcmpkt_ep_nih_header_t_opaque_object_c_set,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
-    bcmpkt_ep_nih_header_t_reserved_0_set,
-    bcmpkt_ep_nih_header_t_start_set,
-    bcmpkt_ep_nih_header_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 11, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 11, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 10, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 10, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_get,
-    bcmpkt_erspan3_fixed_hdr_t_cos_get,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
-    bcmpkt_erspan3_fixed_hdr_t_t_get,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
-    bcmpkt_erspan3_fixed_hdr_t_ver_get,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_set,
-    bcmpkt_erspan3_fixed_hdr_t_cos_set,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
-    bcmpkt_erspan3_fixed_hdr_t_t_set,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
-    bcmpkt_erspan3_fixed_hdr_t_ver_set,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
-    bcmpkt_erspan3_subhdr_5_t_port_id_get,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
-    bcmpkt_erspan3_subhdr_5_t_port_id_set,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_data,
-};
-
-
-static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_esp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_get,
-    bcmpkt_esp_t_pad_get,
-    bcmpkt_esp_t_pad_len_get,
-    bcmpkt_esp_t_seq_num_get,
-    bcmpkt_esp_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_esp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_set,
-    bcmpkt_esp_t_pad_set,
-    bcmpkt_esp_t_pad_len_set,
-    bcmpkt_esp_t_seq_num_set,
-    bcmpkt_esp_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_esp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_esp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_esp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ethertype_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ethertype_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ethertype_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ethertype_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_ethertype_t_field_data,
-};
-
-
-static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_frag_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_get,
-    bcmpkt_frag_t_id_get,
-    bcmpkt_frag_t_next_header_get,
-    bcmpkt_frag_t_reserved_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_frag_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_set,
-    bcmpkt_frag_t_id_set,
-    bcmpkt_frag_t_next_header_set,
-    bcmpkt_frag_t_reserved_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_frag_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_frag_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_frag_t_field_data,
-};
-
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
-    bcmpkt_gbp_ethernet_shim_t_ethertype_get,
-    bcmpkt_gbp_ethernet_shim_t_flags_get,
-    bcmpkt_gbp_ethernet_shim_t_reserved_get,
-    bcmpkt_gbp_ethernet_shim_t_sid_get,
-    bcmpkt_gbp_ethernet_shim_t_subtype_get,
-    bcmpkt_gbp_ethernet_shim_t_ver_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
-    bcmpkt_gbp_ethernet_shim_t_ethertype_set,
-    bcmpkt_gbp_ethernet_shim_t_flags_set,
-    bcmpkt_gbp_ethernet_shim_t_reserved_set,
-    bcmpkt_gbp_ethernet_shim_t_sid_set,
-    bcmpkt_gbp_ethernet_shim_t_subtype_set,
-    bcmpkt_gbp_ethernet_shim_t_ver_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_field_data,
-};
-
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 4, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 4, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_get,
-    bcmpkt_generic_loopback_t_destination_type_get,
-    bcmpkt_generic_loopback_t_entropy_obj_get,
-    bcmpkt_generic_loopback_t_flags_get,
-    bcmpkt_generic_loopback_t_header_type_get,
-    bcmpkt_generic_loopback_t_input_priority_get,
-    bcmpkt_generic_loopback_t_interface_ctrl_get,
-    bcmpkt_generic_loopback_t_interface_obj_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
-    bcmpkt_generic_loopback_t_qos_obj_get,
-    bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_source_system_port_get,
-    bcmpkt_generic_loopback_t_src_subport_num_get,
-    bcmpkt_generic_loopback_t_start_byte_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_set,
-    bcmpkt_generic_loopback_t_destination_type_set,
-    bcmpkt_generic_loopback_t_entropy_obj_set,
-    bcmpkt_generic_loopback_t_flags_set,
-    bcmpkt_generic_loopback_t_header_type_set,
-    bcmpkt_generic_loopback_t_input_priority_set,
-    bcmpkt_generic_loopback_t_interface_ctrl_set,
-    bcmpkt_generic_loopback_t_interface_obj_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
-    bcmpkt_generic_loopback_t_qos_obj_set,
-    bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_source_system_port_set,
-    bcmpkt_generic_loopback_t_src_subport_num_set,
-    bcmpkt_generic_loopback_t_start_byte_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_field_data,
-};
-
-
-static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gpe_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_get,
-    bcmpkt_gpe_t_next_protocol_get,
-    bcmpkt_gpe_t_reserved0_get,
-    bcmpkt_gpe_t_reserved1_get,
-    bcmpkt_gpe_t_vni_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gpe_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_set,
-    bcmpkt_gpe_t_next_protocol_set,
-    bcmpkt_gpe_t_reserved0_set,
-    bcmpkt_gpe_t_reserved1_set,
-    bcmpkt_gpe_t_vni_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gpe_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gpe_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_gpe_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_get,
-    bcmpkt_gre_chksum_t_offset_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_set,
-    bcmpkt_gre_chksum_t_offset_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gre_key_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gre_key_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gre_key_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gre_key_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_gre_key_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 9);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 9, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_gre_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_get,
-    bcmpkt_gre_t_protocol_get,
-    bcmpkt_gre_t_reserved_get,
-    bcmpkt_gre_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_gre_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_set,
-    bcmpkt_gre_t_protocol_set,
-    bcmpkt_gre_t_reserved_set,
-    bcmpkt_gre_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_gre_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_gre_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_gre_t_field_data,
-};
-
-
-static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 4, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 4, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 6, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 6, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 18, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 18, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 17, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 17, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 31, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 31, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 15);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 15, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 15, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 15, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 15);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 15, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 2, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
-    bcmpkt_hg3_base_t_cn_get,
-    bcmpkt_hg3_base_t_cng_get,
-    bcmpkt_hg3_base_t_entropy_get,
-    bcmpkt_hg3_base_t_ext_hdr_present_get,
-    bcmpkt_hg3_base_t_hg3_reserved_get,
-    bcmpkt_hg3_base_t_l3_routed_get,
-    bcmpkt_hg3_base_t_mirror_copy_get,
-    bcmpkt_hg3_base_t_reserved_etype_get,
-    bcmpkt_hg3_base_t_system_destination_get,
-    bcmpkt_hg3_base_t_system_destination_type_get,
-    bcmpkt_hg3_base_t_system_source_get,
-    bcmpkt_hg3_base_t_tc_get,
-    bcmpkt_hg3_base_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
-    bcmpkt_hg3_base_t_cn_set,
-    bcmpkt_hg3_base_t_cng_set,
-    bcmpkt_hg3_base_t_entropy_set,
-    bcmpkt_hg3_base_t_ext_hdr_present_set,
-    bcmpkt_hg3_base_t_hg3_reserved_set,
-    bcmpkt_hg3_base_t_l3_routed_set,
-    bcmpkt_hg3_base_t_mirror_copy_set,
-    bcmpkt_hg3_base_t_reserved_etype_set,
-    bcmpkt_hg3_base_t_system_destination_set,
-    bcmpkt_hg3_base_t_system_destination_type_set,
-    bcmpkt_hg3_base_t_system_source_set,
-    bcmpkt_hg3_base_t_tc_set,
-    bcmpkt_hg3_base_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_BASE_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_field_data,
-};
-
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_lsb_get,
-    bcmpkt_hg3_extension_0_t_class_id_msb_get,
-    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
-    bcmpkt_hg3_extension_0_t_flags_get,
-    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
-    bcmpkt_hg3_extension_0_t_svp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_lsb_set,
-    bcmpkt_hg3_extension_0_t_class_id_msb_set,
-    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
-    bcmpkt_hg3_extension_0_t_flags_set,
-    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
-    bcmpkt_hg3_extension_0_t_svp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
-    bcmpkt_hop_by_hop_t_next_header_get,
-    bcmpkt_hop_by_hop_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
-    bcmpkt_hop_by_hop_t_next_header_set,
-    bcmpkt_hop_by_hop_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_field_data,
-};
-
-
-static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_icmp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_get,
-    bcmpkt_icmp_t_code_get,
-    bcmpkt_icmp_t_icmp_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_icmp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_set,
-    bcmpkt_icmp_t_code_set,
-    bcmpkt_icmp_t_icmp_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_icmp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_icmp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_icmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_get,
-    bcmpkt_ifa_header_t_gns_get,
-    bcmpkt_ifa_header_t_max_length_get,
-    bcmpkt_ifa_header_t_next_hdr_get,
-    bcmpkt_ifa_header_t_ver_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_set,
-    bcmpkt_ifa_header_t_gns_set,
-    bcmpkt_ifa_header_t_max_length_set,
-    bcmpkt_ifa_header_t_next_hdr_set,
-    bcmpkt_ifa_header_t_ver_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 26, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 26, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 24, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 20, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_a_t_cn_get,
-    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get,
-    bcmpkt_ifa_metadata_a_t_lns_device_id_get,
-    bcmpkt_ifa_metadata_a_t_port_speed_get,
-    bcmpkt_ifa_metadata_a_t_queue_id_get,
-    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_a_t_cn_set,
-    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set,
-    bcmpkt_ifa_metadata_a_t_lns_device_id_set,
-    bcmpkt_ifa_metadata_a_t_port_speed_set,
-    bcmpkt_ifa_metadata_a_t_queue_id_set,
-    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_b_t_egress_port_id_get,
-    bcmpkt_ifa_metadata_b_t_ingress_port_id_get,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_0_get,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_1_get,
-    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get,
-    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get,
-    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_b_t_egress_port_id_set,
-    bcmpkt_ifa_metadata_b_t_ingress_port_id_set,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_0_set,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_1_set,
-    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set,
-    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set,
-    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_base_t_action_vector_get,
-    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get,
-    bcmpkt_ifa_metadata_base_t_request_vector_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_base_t_action_vector_set,
-    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set,
-    bcmpkt_ifa_metadata_base_t_request_vector_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_field_data,
-};
-
-
-static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_igmp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_get,
-    bcmpkt_igmp_t_group_address_get,
-    bcmpkt_igmp_t_igmp_type_get,
-    bcmpkt_igmp_t_max_resp_time_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_igmp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_set,
-    bcmpkt_igmp_t_group_address_set,
-    bcmpkt_igmp_t_igmp_type_set,
-    bcmpkt_igmp_t_max_resp_time_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_igmp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_igmp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_igmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
-    bcmpkt_ioam_e2e_t_ioam_e2e_data_get,
-    bcmpkt_ioam_e2e_t_ioam_e2e_type_get,
-    bcmpkt_ioam_e2e_t_ioam_hdr_len_get,
-    bcmpkt_ioam_e2e_t_namespace_id_get,
-    bcmpkt_ioam_e2e_t_next_protocol_get,
-    bcmpkt_ioam_e2e_t_reserved_get,
-    bcmpkt_ioam_e2e_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
-    bcmpkt_ioam_e2e_t_ioam_e2e_data_set,
-    bcmpkt_ioam_e2e_t_ioam_e2e_type_set,
-    bcmpkt_ioam_e2e_t_ioam_hdr_len_set,
-    bcmpkt_ioam_e2e_t_namespace_id_set,
-    bcmpkt_ioam_e2e_t_next_protocol_set,
-    bcmpkt_ioam_e2e_t_reserved_set,
-    bcmpkt_ioam_e2e_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IOAM_E2E_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ipfix_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_get,
-    bcmpkt_ipfix_t_length_get,
-    bcmpkt_ipfix_t_obs_domain_id_get,
-    bcmpkt_ipfix_t_sequence_num_get,
-    bcmpkt_ipfix_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ipfix_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_set,
-    bcmpkt_ipfix_t_length_set,
-    bcmpkt_ipfix_t_obs_domain_id_set,
-    bcmpkt_ipfix_t_sequence_num_set,
-    bcmpkt_ipfix_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ipfix_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ipfix_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_ipfix_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ipv4_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_get,
-    bcmpkt_ipv4_t_flags_frag_offset_get,
-    bcmpkt_ipv4_t_hdr_checksum_get,
-    bcmpkt_ipv4_t_id_get,
-    bcmpkt_ipv4_t_option_get,
-    bcmpkt_ipv4_t_protocol_get,
-    bcmpkt_ipv4_t_sa_get,
-    bcmpkt_ipv4_t_tos_get,
-    bcmpkt_ipv4_t_total_length_get,
-    bcmpkt_ipv4_t_ttl_get,
-    bcmpkt_ipv4_t_version_hdr_len_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ipv4_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_set,
-    bcmpkt_ipv4_t_flags_frag_offset_set,
-    bcmpkt_ipv4_t_hdr_checksum_set,
-    bcmpkt_ipv4_t_id_set,
-    bcmpkt_ipv4_t_option_set,
-    bcmpkt_ipv4_t_protocol_set,
-    bcmpkt_ipv4_t_sa_set,
-    bcmpkt_ipv4_t_tos_set,
-    bcmpkt_ipv4_t_total_length_set,
-    bcmpkt_ipv4_t_ttl_set,
-    bcmpkt_ipv4_t_version_hdr_len_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ipv4_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ipv4_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_ipv4_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_ipv6_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_get,
-    bcmpkt_ipv6_t_flow_label_get,
-    bcmpkt_ipv6_t_hop_limit_get,
-    bcmpkt_ipv6_t_next_header_get,
-    bcmpkt_ipv6_t_payload_length_get,
-    bcmpkt_ipv6_t_sa_get,
-    bcmpkt_ipv6_t_traffic_class_get,
-    bcmpkt_ipv6_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_ipv6_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_set,
-    bcmpkt_ipv6_t_flow_label_set,
-    bcmpkt_ipv6_t_hop_limit_set,
-    bcmpkt_ipv6_t_next_header_set,
-    bcmpkt_ipv6_t_payload_length_set,
-    bcmpkt_ipv6_t_sa_set,
-    bcmpkt_ipv6_t_traffic_class_set,
-    bcmpkt_ipv6_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_ipv6_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_ipv6_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_ipv6_t_field_data,
-};
-
-
-static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_l2_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_get,
-    bcmpkt_l2_t_macsa_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_l2_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_set,
-    bcmpkt_l2_t_macsa_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_l2_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_l2_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_l2_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_get,
-    bcmpkt_mpls_ach_t_cw_type_get,
-    bcmpkt_mpls_ach_t_reserved_get,
-    bcmpkt_mpls_ach_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_set,
-    bcmpkt_mpls_ach_t_cw_type_set,
-    bcmpkt_mpls_ach_t_reserved_set,
-    bcmpkt_mpls_ach_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_get,
-    bcmpkt_mpls_cw_t_reserved_get,
-    bcmpkt_mpls_cw_t_seq_number_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_set,
-    bcmpkt_mpls_cw_t_reserved_set,
-    bcmpkt_mpls_cw_t_seq_number_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 9, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 9, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_mpls_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_get,
-    bcmpkt_mpls_t_exp_get,
-    bcmpkt_mpls_t_label_get,
-    bcmpkt_mpls_t_ttl_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_mpls_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_set,
-    bcmpkt_mpls_t_exp_set,
-    bcmpkt_mpls_t_label_set,
-    bcmpkt_mpls_t_ttl_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_mpls_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_mpls_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_mpls_t_field_data,
-};
-
-
-static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[7], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[7], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_p_1588_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_get,
-    bcmpkt_p_1588_t_correction_get,
-    bcmpkt_p_1588_t_domain_nb_get,
-    bcmpkt_p_1588_t_flags_get,
-    bcmpkt_p_1588_t_logmsginterval_get,
-    bcmpkt_p_1588_t_msg_length_get,
-    bcmpkt_p_1588_t_msg_type_get,
-    bcmpkt_p_1588_t_reserved1_get,
-    bcmpkt_p_1588_t_reserved2_get,
-    bcmpkt_p_1588_t_reserved3_get,
-    bcmpkt_p_1588_t_seq_id_get,
-    bcmpkt_p_1588_t_srcportid_get,
-    bcmpkt_p_1588_t_transportspec_get,
-    bcmpkt_p_1588_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_p_1588_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_set,
-    bcmpkt_p_1588_t_correction_set,
-    bcmpkt_p_1588_t_domain_nb_set,
-    bcmpkt_p_1588_t_flags_set,
-    bcmpkt_p_1588_t_logmsginterval_set,
-    bcmpkt_p_1588_t_msg_length_set,
-    bcmpkt_p_1588_t_msg_type_set,
-    bcmpkt_p_1588_t_reserved1_set,
-    bcmpkt_p_1588_t_reserved2_set,
-    bcmpkt_p_1588_t_reserved3_set,
-    bcmpkt_p_1588_t_seq_id_set,
-    bcmpkt_p_1588_t_srcportid_set,
-    bcmpkt_p_1588_t_transportspec_set,
-    bcmpkt_p_1588_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_p_1588_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_p_1588_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_p_1588_t_field_data,
-};
-
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
-    bcmpkt_prog_ext_hdr_t_next_header_get,
-    bcmpkt_prog_ext_hdr_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
-    bcmpkt_prog_ext_hdr_t_next_header_set,
-    bcmpkt_prog_ext_hdr_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_get,
-    bcmpkt_psamp_0_t_length_get,
-    bcmpkt_psamp_0_t_next_hop_index_get,
-    bcmpkt_psamp_0_t_obs_time_ns_get,
-    bcmpkt_psamp_0_t_obs_time_s_get,
-    bcmpkt_psamp_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_set,
-    bcmpkt_psamp_0_t_length_set,
-    bcmpkt_psamp_0_t_next_hop_index_set,
-    bcmpkt_psamp_0_t_obs_time_ns_set,
-    bcmpkt_psamp_0_t_obs_time_s_set,
-    bcmpkt_psamp_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_get,
-    bcmpkt_psamp_1_t_egress_port_get,
-    bcmpkt_psamp_1_t_epoch_get,
-    bcmpkt_psamp_1_t_ingress_port_get,
-    bcmpkt_psamp_1_t_sampled_length_get,
-    bcmpkt_psamp_1_t_user_meta_data_get,
-    bcmpkt_psamp_1_t_variable_flag_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_set,
-    bcmpkt_psamp_1_t_egress_port_set,
-    bcmpkt_psamp_1_t_epoch_set,
-    bcmpkt_psamp_1_t_ingress_port_set,
-    bcmpkt_psamp_1_t_sampled_length_set,
-    bcmpkt_psamp_1_t_user_meta_data_set,
-    bcmpkt_psamp_1_t_variable_flag_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_data,
-};
-
-
-static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_rarp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_get,
-    bcmpkt_rarp_t_hardware_type_get,
-    bcmpkt_rarp_t_operation_get,
-    bcmpkt_rarp_t_prot_addr_len_get,
-    bcmpkt_rarp_t_protocol_type_get,
-    bcmpkt_rarp_t_sender_ha_get,
-    bcmpkt_rarp_t_sender_ip_get,
-    bcmpkt_rarp_t_target_ha_get,
-    bcmpkt_rarp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_rarp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_set,
-    bcmpkt_rarp_t_hardware_type_set,
-    bcmpkt_rarp_t_operation_set,
-    bcmpkt_rarp_t_prot_addr_len_set,
-    bcmpkt_rarp_t_protocol_type_set,
-    bcmpkt_rarp_t_sender_ha_set,
-    bcmpkt_rarp_t_sender_ip_set,
-    bcmpkt_rarp_t_target_ha_set,
-    bcmpkt_rarp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_rarp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_rarp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_rarp_t_field_data,
-};
-
-
-static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_routing_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_get,
-    bcmpkt_routing_t_hdr_ext_len_get,
-    bcmpkt_routing_t_next_header_get,
-    bcmpkt_routing_t_routing_type_get,
-    bcmpkt_routing_t_segments_left_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_routing_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_set,
-    bcmpkt_routing_t_hdr_ext_len_set,
-    bcmpkt_routing_t_next_header_set,
-    bcmpkt_routing_t_routing_type_set,
-    bcmpkt_routing_t_segments_left_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_routing_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_routing_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_routing_t_field_data,
-};
-
-
-static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_rspan_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_get,
-    bcmpkt_rspan_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_rspan_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_set,
-    bcmpkt_rspan_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_rspan_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_rspan_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_rspan_t_field_data,
-};
-
-
-static int32_t bcmpkt_segment_routing_srh_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_last_entry_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_last_entry_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
-    bcmpkt_segment_routing_srh_t_flags_get,
-    bcmpkt_segment_routing_srh_t_hdr_ext_len_get,
-    bcmpkt_segment_routing_srh_t_last_entry_get,
-    bcmpkt_segment_routing_srh_t_next_header_get,
-    bcmpkt_segment_routing_srh_t_routing_type_get,
-    bcmpkt_segment_routing_srh_t_segments_left_get,
-    bcmpkt_segment_routing_srh_t_tag_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
-    bcmpkt_segment_routing_srh_t_flags_set,
-    bcmpkt_segment_routing_srh_t_hdr_ext_len_set,
-    bcmpkt_segment_routing_srh_t_last_entry_set,
-    bcmpkt_segment_routing_srh_t_next_header_set,
-    bcmpkt_segment_routing_srh_t_routing_type_set,
-    bcmpkt_segment_routing_srh_t_segments_left_set,
-    bcmpkt_segment_routing_srh_t_tag_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_field_data,
-};
-
-
-static int32_t bcmpkt_segment_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_last_entry_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_last_entry_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_seg_list_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_seg_list_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_segment_routing_t_hdr_ext_len_get,
-    bcmpkt_segment_routing_t_last_entry_flags_get,
-    bcmpkt_segment_routing_t_next_header_get,
-    bcmpkt_segment_routing_t_routing_type_get,
-    bcmpkt_segment_routing_t_seg_list_get,
-    bcmpkt_segment_routing_t_segments_left_get,
-    bcmpkt_segment_routing_t_tag_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_segment_routing_t_hdr_ext_len_set,
-    bcmpkt_segment_routing_t_last_entry_flags_set,
-    bcmpkt_segment_routing_t_next_header_set,
-    bcmpkt_segment_routing_t_routing_type_set,
-    bcmpkt_segment_routing_t_seg_list_set,
-    bcmpkt_segment_routing_t_segments_left_set,
-    bcmpkt_segment_routing_t_tag_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_get,
-    bcmpkt_sflow_shim_0_t_sys_source_get,
-    bcmpkt_sflow_shim_0_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_set,
-    bcmpkt_sflow_shim_0_t_sys_source_set,
-    bcmpkt_sflow_shim_0_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 27, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 27, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 31, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 31, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 7);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 7, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 23, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 23, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_discarded_get,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_mcast_get,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_truncated_get,
-    bcmpkt_sflow_shim_1_t_reserved_get,
-    bcmpkt_sflow_shim_1_t_sys_opcode_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_discarded_set,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_mcast_set,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_truncated_set,
-    bcmpkt_sflow_shim_1_t_reserved_set,
-    bcmpkt_sflow_shim_1_t_sys_opcode_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_get,
-    bcmpkt_sflow_shim_2_t_user_meta_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_set,
-    bcmpkt_sflow_shim_2_t_user_meta_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_get,
-    bcmpkt_snap_llc_t_snap_llc_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_set,
-    bcmpkt_snap_llc_t_snap_llc_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_field_data,
-};
-
-
-static int32_t bcmpkt_std_segment_id_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
-    bcmpkt_std_segment_id_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
-    bcmpkt_std_segment_id_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_field_data,
-};
-
-
-static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_svtag_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FID_COUNT] = {
-    bcmpkt_svtag_t_data_lwr_get,
-    bcmpkt_svtag_t_data_upr_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_svtag_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FID_COUNT] = {
-    bcmpkt_svtag_t_data_lwr_set,
-    bcmpkt_svtag_t_data_upr_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_svtag_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_svtag_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_SVTAG_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_svtag_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_get,
-    bcmpkt_tcp_first_4bytes_t_src_port_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_set,
-    bcmpkt_tcp_first_4bytes_t_src_port_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_get,
-    bcmpkt_tcp_last_16bytes_t_checksum_get,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
-    bcmpkt_tcp_last_16bytes_t_seq_num_get,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
-    bcmpkt_tcp_last_16bytes_t_win_size_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_set,
-    bcmpkt_tcp_last_16bytes_t_checksum_set,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
-    bcmpkt_tcp_last_16bytes_t_seq_num_set,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
-    bcmpkt_tcp_last_16bytes_t_win_size_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_udp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_get,
-    bcmpkt_udp_t_dst_port_get,
-    bcmpkt_udp_t_src_port_get,
-    bcmpkt_udp_t_udp_length_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_udp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_set,
-    bcmpkt_udp_t_dst_port_set,
-    bcmpkt_udp_t_src_port_set,
-    bcmpkt_udp_t_udp_length_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_udp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_udp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_udp_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
-    bcmpkt_unknown_l5_t_l5_bytes_8_9_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
-    bcmpkt_unknown_l5_t_l5_bytes_8_9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_field_data,
-};
-
-
-static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_vlan_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_get,
-    bcmpkt_vlan_t_pcp_get,
-    bcmpkt_vlan_t_tpid_get,
-    bcmpkt_vlan_t_vid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_vlan_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_set,
-    bcmpkt_vlan_t_pcp_set,
-    bcmpkt_vlan_t_tpid_set,
-    bcmpkt_vlan_t_vid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_vlan_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_vlan_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_vlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_vxlan_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_get,
-    bcmpkt_vxlan_t_reserved2_get,
-    bcmpkt_vxlan_t_vn_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_vxlan_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_set,
-    bcmpkt_vxlan_t_reserved2_set,
-    bcmpkt_vxlan_t_vn_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_vxlan_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_vxlan_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_vxlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_31_6_0_wesp_t_fget[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_get,
-    bcmpkt_wesp_t_header_len_get,
-    bcmpkt_wesp_t_next_header_get,
-    bcmpkt_wesp_t_seq_num_get,
-    bcmpkt_wesp_t_spi_get,
-    bcmpkt_wesp_t_trailer_len_get,
-    bcmpkt_wesp_t_wesp_iv_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_31_6_0_wesp_t_fset[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_set,
-    bcmpkt_wesp_t_header_len_set,
-    bcmpkt_wesp_t_next_header_set,
-    bcmpkt_wesp_t_seq_num_set,
-    bcmpkt_wesp_t_spi_set,
-    bcmpkt_wesp_t_trailer_len_set,
-    bcmpkt_wesp_t_wesp_iv_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_31_6_0_wesp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_31_6_0_wesp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_31_6_0_wesp_t_field_data,
-};
-
-static bcmpkt_flex_pmd_info_t bcm56890_a0_dna_6_5_31_6_0_flexhdr_info_list[BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT] = {
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_arp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_arp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_arp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_authen_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_authen_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_authen_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_bfd_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_bfd_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_bfd_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_cntag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_cntag_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_cntag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_cpu_composites_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_dest_option_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_dest_option_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_dest_option_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ep_nih_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_erspan3_fixed_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_erspan3_subhdr_5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_esp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_esp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_esp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_ethertype_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ethertype_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ethertype_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_frag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_frag_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_frag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gbp_ethernet_shim_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_generic_loopback_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_gpe_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gpe_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gpe_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gre_chksum_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_gre_key_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gre_key_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gre_key_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gre_rout_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gre_seq_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_gre_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_gre_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_gre_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_hg3_base_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_hg3_extension_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_hop_by_hop_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_icmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_icmp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_icmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ifa_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_a_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_b_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ifa_metadata_base_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_igmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_igmp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_igmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ioam_e2e_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_ipfix_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ipfix_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ipfix_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_ipv4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ipv4_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ipv4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_ipv6_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_ipv6_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_ipv6_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_l2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_l2_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_l2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mirror_erspan_sn_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mirror_transport_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mpls_ach_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mpls_bv_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mpls_cw_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_mpls_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_mpls_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_mpls_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_p_1588_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_p_1588_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_p_1588_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_prog_ext_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_psamp_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_psamp_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_psamp_mirror_on_drop_3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_rarp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_rarp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_rarp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_routing_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_routing_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_routing_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_rspan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_rspan_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_rspan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_segment_routing_srh_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_segment_routing_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_sflow_shim_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_snap_llc_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_std_segment_id_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_svtag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_svtag_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_svtag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_tcp_first_4bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_tcp_last_16bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_udp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_udp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_udp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_unknown_l3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_unknown_l4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_unknown_l5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_vlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_vlan_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_vlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_vxlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_vxlan_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_vxlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_wesp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_31_6_0_wesp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_31_6_0_wesp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_field_info,
-        .reasons_info = &bcm56890_a0_dna_6_5_31_6_0_rxpmd_flex_reasons_info,
-        .flex_common_fget = bcm56890_a0_rxpmd_flex_fget,
-        .flex_common_fset = bcm56890_a0_rxpmd_flex_fset,
-    },
-};
-
-static shr_enum_map_t bcm56890_a0_dna_6_5_31_6_0_flexhdr_id_map[] = {
-    BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
-};
-
-shr_enum_map_t * bcm56890_a0_dna_6_5_31_6_0_flexhdr_map_get(void)
-{
-    return bcm56890_a0_dna_6_5_31_6_0_flexhdr_id_map;
-}
-
-bcmpkt_flex_pmd_info_t * bcm56890_a0_dna_6_5_31_6_0_flex_pmd_info_get(uint32_t hid)
-{
-    if (hid >= BCM56890_A0_DNA_6_5_31_6_0_BCMPKT_FLEXHDR_COUNT) {
-        return NULL;
-    }
-
-    return &bcm56890_a0_dna_6_5_31_6_0_flexhdr_info_list[hid];
-}
-
-int bcm56890_a0_dna_6_5_31_6_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
-    14,
-    21,
-    22,
-    67,
-};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 00000000000..061fc839c4c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,7128 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56890_a0_dna_6_5_32_4_0_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant dna_6_5_32_4_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id_defs.h>
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] =
+{
+    0x366c,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
+{
+    0x78f0,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
+{
+    0x1fffe,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
+{
+    0xff00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] =
+{
+    0x1e4c8,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] =
+{
+    0x10,
+    0x400000,
+    0x1dd8000,
+    0x20,
+    0x0,
+    0x0,
+    0x0,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0x1,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x400000,
+    0x0,
+    0x100,
+    0x800776,
+    0x0,
+    0x0,
+    0x0,
+    0xf77c0000,
+    0xefeeff77,
+    0x7ddfddfe,
+    0x777f7,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x0,
+    0x7778,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xde000000,
+    0x1d,
+    0x0,
+    0x0,
+    0xeef0,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] =
+{
+    0x0,
+    0x0,
+    0x100000,
+    0x1000000,
+    0x0,
+    0x0,
+    0x2000,
+    0x100100,
+    0x4002002,
+    0x10010040,
+    0x400400,
+    0x10008008,
+    0x40040100,
+    0x1001000,
+    0x40040020,
+    0x100100,
+    0x4002002,
+    0x80080040,
+    0x200200,
+    0x2002000,
+    0x80040040,
+    0x200800,
+    0x4004002,
+    0x80080,
+    0x401001,
+    0x2001004,
+    0x40040020,
+    0x800800,
+    0x2002,
+    0x0,
+    0x0,
+    0x40,
+    0x400,
+    0x0,
+    0x80000000,
+    0x4000000,
+    0x80080040,
+    0x1001000,
+    0x10004004,
+    0x200100,
+    0x4004002,
+    0x40010010,
+    0x800400,
+    0x4010010,
+    0x80080040,
+    0x1001000,
+    0x8020020,
+    0x80000080,
+    0x1000800,
+    0x20020010,
+    0x80080,
+    0x2001001,
+    0x40040020,
+    0x40100100,
+    0x800800,
+    0x20010010,
+    0x80080200,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff77f77c,
+    0xddfeefee,
+    0x77f77ddf,
+    0x7,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xddf00000,
+    0xbfbbfddf,
+    0xf77f77fb,
+    0x1ddfdd,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0x7778000,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x0,
+    0x7778,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0xeef0000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x0,
+    0x2000000,
+    0x0,
+    0x0,
+    0x8000000,
+    0x0,
+    0x0,
+    0x20000008,
+    0x0,
+    0x0,
+    0x40000,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x80000000,
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x200000,
+    0x8000,
+    0x0,
+    0x0,
+    0x10,
+    0x0,
+    0x0,
+    0x10000,
+    0x0,
+    0x0,
+    0x20000,
+    0x0,
+    0x0,
+    0x10000000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] =
+{
+    0x1e,
+    0x400000,
+    0x1dd8000,
+    0x3ddcafe0,
+    0x0,
+    0x8000,
+    0xc003bb00,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0xff77f77d,
+    0xddfeefee,
+    0x77f77ddf,
+    0xfddfddff,
+    0x77f77fbb,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x7fbbfbbe,
+    0xfbbfbbe5,
+    0xeff77f77,
+    0xbfbbeefe,
+    0xf77f77fb,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0xfbbfddf7,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x1bbbfb,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfddfddf0,
+    0x77f77fbb,
+    0x1ddfddf,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77c00000,
+    0xfeeff77f,
+    0xf77ddfdd,
+    0x777,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0xf0000000,
+    0xee,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0xeef,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x3bbc000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1dd,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbe000000,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x3bbfbbe,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xefeef800,
+    0xfddfddfe,
+    0xeefbbfbb,
+    0xeef,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0xeef00,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0xeef0000,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1dd,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x1dde00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] =
+{
+    0x0,
+    0x400000,
+    0x0,
+    0x80,
+    0x0,
+    0x8000,
+    0x0,
+    0x8004004,
+    0x140080,
+    0x400001,
+    0x20010010,
+    0x500200,
+    0x1000004,
+    0x80040040,
+    0x1001400,
+    0x8004000,
+    0x100080,
+    0x2002801,
+    0x4008000,
+    0x80080,
+    0x2801001,
+    0x8000020,
+    0x100100,
+    0x5002002,
+    0x10000040,
+    0x80080000,
+    0x1001000,
+    0x20028,
+    0x80,
+    0x0,
+    0x100,
+    0x2000000,
+    0x0,
+    0x0,
+    0x2,
+    0x100000,
+    0x2002001,
+    0x40050,
+    0x400100,
+    0x8008004,
+    0x100140,
+    0x1000400,
+    0x50020010,
+    0x400,
+    0x2002001,
+    0xa0040040,
+    0x800,
+    0x2001002,
+    0x40040020,
+    0x800a00,
+    0x4002000,
+    0x80080040,
+    0x1001400,
+    0x4000,
+    0x40020020,
+    0xa00400,
+    0x2000008,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0xaf00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x78000000,
+    0x5,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x2,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x15e000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x8800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40000000,
+    0x4,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x2,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x110000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40020,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800000,
+    0x10,
+    0x0,
+    0x0,
+    0x10000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] =
+{
+    0x18,
+    0x400000,
+    0x1dd8000,
+    0x3ddcafe0,
+    0x0,
+    0x8000,
+    0x4003bb00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x600000,
+    0x0,
+    0x100,
+    0xbf800776,
+    0xf772,
+    0x0,
+    0xec000002,
+    0x1000e,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0xff77f77d,
+    0xddfeefee,
+    0x77f77ddf,
+    0xfddfddff,
+    0x77f77fbb,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x7fbbfbbe,
+    0xfbbfbbe5,
+    0xeff77f77,
+    0xbfbbeefe,
+    0xf77f77fb,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0xfbbfddf7,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x3bbfb,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf77e0000,
+    0xefeeff77,
+    0x7ddfddfe,
+    0xddf777f7,
+    0xbfbbfddf,
+    0xf77f77fb,
+    0x77fddfdd,
+    0xfeeff77f,
+    0xf77ddfdd,
+    0xefeeff77,
+    0xfddfddfe,
+    0xeefbbfbb,
+    0xef95feef,
+    0xfddfeefe,
+    0xbbfbbfdd,
+    0xdfeefeef,
+    0xfbbfddfd,
+    0x77f77fbb,
+    0x77ddfddf,
+    0xfeefeeff,
+    0xbbfddfdd,
+    0xefeefbbf,
+    0xe,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] =
+{
+    0x0,
+    0x0,
+    0x400000,
+    0x4000000,
+    0x0,
+    0x0,
+    0x8000,
+    0x400400,
+    0x10008008,
+    0x40040100,
+    0x1001000,
+    0x40020020,
+    0x100400,
+    0x4004001,
+    0x100080,
+    0x400401,
+    0x10008008,
+    0x200100,
+    0x800802,
+    0x8008000,
+    0x100100,
+    0x802002,
+    0x10010008,
+    0x200200,
+    0x1004004,
+    0x8004010,
+    0x100080,
+    0x2002001,
+    0x8008,
+    0x0,
+    0x0,
+    0x100,
+    0x1000,
+    0x0,
+    0x0,
+    0x10000002,
+    0x200100,
+    0x4004002,
+    0x40010010,
+    0x800400,
+    0x10010008,
+    0x40040,
+    0x2001001,
+    0x10040040,
+    0x200100,
+    0x4004002,
+    0x20080080,
+    0x200,
+    0x4002002,
+    0x80080040,
+    0x200200,
+    0x8004004,
+    0x100080,
+    0x400401,
+    0x2002001,
+    0x80040040,
+    0x200800,
+    0x2,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbbfbbe0,
+    0xeff77f77,
+    0xbfbbeefe,
+    0x3b,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef800000,
+    0xfddfeefe,
+    0xbbfbbfdd,
+    0xeefeef,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xde000000,
+    0x1d,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0xe0000000,
+    0x1dd,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x3bbc00,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xbbc00000,
+    0x3,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf77f77c0,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0x77,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdf000000,
+    0xfbbfddfd,
+    0x77f77fbb,
+    0x1ddfddf,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0xeef0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0x1dde00,
+    0x0,
+    0x0,
+    0x3bbc00,
+    0x0,
+    0x0,
+    0xbbc00000,
+    0x3,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x0,
+    0x3bbc,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] =
+{
+    0x0,
+    0x0,
+    0x58000,
+    0x580e00,
+    0x0,
+    0x0,
+    0xb00,
+    0xb0058058,
+    0x1600b00,
+    0x5805816,
+    0xc0160160,
+    0x5802c02,
+    0x16016058,
+    0x580580,
+    0x1601600b,
+    0xb0058058,
+    0x1600b00,
+    0x2c02c016,
+    0x700b00b0,
+    0xb00b00,
+    0x2c016016,
+    0xb00b02c0,
+    0x1601600,
+    0x5802c02c,
+    0x60160580,
+    0xb00581,
+    0x1601600b,
+    0xb02c02c0,
+    0xb00,
+    0x0,
+    0x0,
+    0x38000016,
+    0x160,
+    0x0,
+    0x2c000000,
+    0x1600000,
+    0x2c02c016,
+    0x60580580,
+    0x5801601,
+    0xb00b0058,
+    0x81601600,
+    0x16005805,
+    0x802c0160,
+    0x1605805,
+    0x2c02c016,
+    0x580580,
+    0x2c0b00b,
+    0x2c01c02c,
+    0x805802c0,
+    0xb00b005,
+    0x5802c02c,
+    0xb00580,
+    0x1601600b,
+    0x16058058,
+    0x802c02c0,
+    0xb005805,
+    0x2c02c0b0,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] =
+{
+    0x0,
+    0x0,
+    0x50000,
+    0x500c00,
+    0x0,
+    0x0,
+    0xa00,
+    0xa0050050,
+    0x1400a00,
+    0x5005014,
+    0x80140140,
+    0x5002802,
+    0x14014050,
+    0x500500,
+    0x1401400a,
+    0xa0050050,
+    0x1400a00,
+    0x28028014,
+    0x600a00a0,
+    0xa00a00,
+    0x28014014,
+    0xa00a0280,
+    0x1401400,
+    0x50028028,
+    0x40140500,
+    0xa00501,
+    0x1401400a,
+    0xa0280280,
+    0xa00,
+    0x0,
+    0x0,
+    0x30000014,
+    0x140,
+    0x0,
+    0x28000000,
+    0x1400000,
+    0x28028014,
+    0x40500500,
+    0x5001401,
+    0xa00a0050,
+    0x1401400,
+    0x14005005,
+    0x280140,
+    0x1405005,
+    0x28028014,
+    0x500500,
+    0x280a00a,
+    0x28018028,
+    0x500280,
+    0xa00a005,
+    0x50028028,
+    0xa00500,
+    0x1401400a,
+    0x14050050,
+    0x280280,
+    0xa005005,
+    0x280280a0,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] =
+{
+    0x0,
+    0x0,
+    0xd80000,
+    0xd80a000,
+    0x0,
+    0x0,
+    0x1b000,
+    0xd80d80,
+    0x3601b01b,
+    0xd80d8360,
+    0x3603600,
+    0xd806c06c,
+    0x60360d80,
+    0xd80d803,
+    0x603601b0,
+    0xd80d83,
+    0x3601b01b,
+    0xc06c0360,
+    0x1b01b06,
+    0x1b01b005,
+    0xc0360360,
+    0x1b06c06,
+    0x3603601b,
+    0x806c06c0,
+    0x360d80d,
+    0x1b00d836,
+    0x603601b0,
+    0x6c06c03,
+    0x1b01b,
+    0x0,
+    0x0,
+    0x80000360,
+    0x3602,
+    0x0,
+    0xc0000000,
+    0x36000006,
+    0xc06c0360,
+    0xd80d806,
+    0xd8036036,
+    0x1b00d80,
+    0x3603601b,
+    0x600d80d8,
+    0x6c03603,
+    0x360d80d8,
+    0xc06c0360,
+    0xd80d806,
+    0x6c1b01b0,
+    0xc01406c0,
+    0xd806c06,
+    0xb01b00d8,
+    0x806c06c1,
+    0x1b00d80d,
+    0x603601b0,
+    0x60d80d83,
+    0x6c06c03,
+    0xb00d80d8,
+    0xc06c1b01,
+    0x6,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x100000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] =
+{
+    0x0,
+    0x0,
+    0x1000000,
+    0x10000000,
+    0x0,
+    0x0,
+    0x20000,
+    0x1001000,
+    0x40020020,
+    0x100400,
+    0x4004001,
+    0x80080,
+    0x401001,
+    0x10010004,
+    0x400200,
+    0x1001004,
+    0x40020020,
+    0x800400,
+    0x2002008,
+    0x20020000,
+    0x400400,
+    0x2008008,
+    0x40040020,
+    0x800800,
+    0x4010010,
+    0x20010040,
+    0x400200,
+    0x8008004,
+    0x20020,
+    0x0,
+    0x0,
+    0x400,
+    0x4000,
+    0x0,
+    0x0,
+    0x40000008,
+    0x800400,
+    0x10010008,
+    0x40040,
+    0x2001001,
+    0x40040020,
+    0x100100,
+    0x8004004,
+    0x40100100,
+    0x800400,
+    0x10010008,
+    0x80200200,
+    0x800,
+    0x10008008,
+    0x200100,
+    0x800802,
+    0x20010010,
+    0x400200,
+    0x1001004,
+    0x8008004,
+    0x100100,
+    0x802002,
+    0x8,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] =
+{
+    0x0,
+    0x0,
+    0x840000,
+    0x8400000,
+    0x0,
+    0x0,
+    0x10800,
+    0x80840840,
+    0x21010810,
+    0x84084210,
+    0x2102100,
+    0x84042042,
+    0x10210840,
+    0x8408402,
+    0x10210108,
+    0x80840842,
+    0x21010810,
+    0x20420210,
+    0x1081084,
+    0x10810800,
+    0x20210210,
+    0x81084204,
+    0x21021010,
+    0x40420420,
+    0x2108408,
+    0x10808421,
+    0x10210108,
+    0x84204202,
+    0x10810,
+    0x0,
+    0x0,
+    0x210,
+    0x2100,
+    0x0,
+    0x20000000,
+    0x21000004,
+    0x20420210,
+    0x8408404,
+    0x84021021,
+    0x81080840,
+    0x21021010,
+    0x10084084,
+    0x4202102,
+    0x21084084,
+    0x20420210,
+    0x8408404,
+    0x42108108,
+    0x20000420,
+    0x8404204,
+    0x8108084,
+    0x40420421,
+    0x10808408,
+    0x10210108,
+    0x10840842,
+    0x4204202,
+    0x8084084,
+    0x20421081,
+    0x4,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x0,
+    0x8000,
+    0x4003bb00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbbe0000,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x3bbfb,
+    0x0,
+    0x0,
+    0x0,
+    0x8000,
+    0x0,
+    0xec000002,
+    0x1000e,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfeefeef8,
+    0xbbfddfdd,
+    0xefeefbbf,
+    0xe,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0x3bbc000,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0x78000000,
+    0x77,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0x0,
+    0x1dde00,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0xeef,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[4] =
+{
+    0x33033198,
+    0xcc66066,
+    0x198198cc,
+    0x6633033,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[4] =
+{
+    0x44044220,
+    0x11088088,
+    0x22022110,
+    0x8844044,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[4] =
+{
+    0xffc00000,
+    0xffffffff,
+    0xffe00000,
+    0x7fffffff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[4] =
+{
+    0x0,
+    0xfffff800,
+    0x0,
+    0x7ffffc00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[4] =
+{
+    0xf80f87c0,
+    0x3e1f01f0,
+    0x7c07c3e0,
+    0x1f0f80f8,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[4] =
+{
+    0xfffffffe,
+    0xffffffff,
+    0xffffffff,
+    0x7fffffff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[4] =
+{
+    0x1ff800,
+    0x7fe003ff,
+    0x800ffc00,
+    0x3ff001ff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[4] =
+{
+    0xa23a2510,
+    0xe8944744,
+    0x511d1288,
+    0x744a23a2,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag[4] =
+{
+    0x0,
+    0x0,
+    0xffffffff,
+    0x7fffffff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[13] =
+{
+    0x10,
+    0x0,
+    0x4,
+    0x20003df6,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7fbef80,
+    0xfbfdf7fd,
+    0x7dfefbfe,
+    0xf7dfefbf,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[34] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef00,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc,
+    0x0,
+    0x0,
+    0xf0000000,
+    0x7be,
+    0x0,
+    0x0,
+    0xfbc00000,
+    0x1e,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x1efb,
+    0x0,
+    0x0,
+    0xf7800000,
+    0x3d,
+    0x0,
+    0x0,
+    0xe0000000,
+    0xf7d,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x10,
+    0x0,
+    0x0,
+    0x8000,
+    0x40008000,
+    0x20004000,
+    0x10002000,
+    0x1000200,
+    0x1000200,
+    0x800100,
+    0x400080,
+    0x40008,
+    0x40008,
+    0x40004,
+    0x20004002,
+    0x20000000,
+    0x10001000,
+    0x8000800,
+    0x800400,
+    0x40,
+    0x100020,
+    0x80010,
+    0x80040008,
+    0x40004000,
+    0x20002000,
+    0x10001000,
+    0x1000800,
+    0x100080,
+    0x80010,
+    0x40008,
+    0x80040008,
+    0x80004000,
+    0x888888,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[17] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7dfefbe,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0x3df7fbe,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[34] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7800000,
+    0x3d,
+    0x0,
+    0x0,
+    0xf7de0000,
+    0x0,
+    0x0,
+    0x0,
+    0x3df7800,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de000,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[34] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x0,
+    0x1,
+    0x0,
+    0x4000000,
+    0x4000000,
+    0x0,
+    0x0,
+    0x0,
+    0x100000,
+    0x0,
+    0x0,
+    0x0,
+    0x10000000,
+    0x0,
+    0x0,
+    0x0,
+    0x200000,
+    0x0,
+    0x0,
+    0x0,
+    0x8000000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[38] =
+{
+    0x1e,
+    0x0,
+    0x4,
+    0xe0003df6,
+    0xe22fffff,
+    0x1f7d,
+    0x0,
+    0xc00,
+    0x7bec00,
+    0xf7fbefc0,
+    0xfbfdf7fd,
+    0x7dfefbfe,
+    0xf7dfefbf,
+    0xf7dfefbe,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0xffdf7fbe,
+    0x7fdf7fbe,
+    0xbfdf7fdf,
+    0xfbfdf7ef,
+    0xfbfffffe,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xfbefdf7f,
+    0xf117fdf7,
+    0xff7dfefb,
+    0xffbeff7d,
+    0xefdf7fbe,
+    0xf7fdf7fb,
+    0xfbfefbfd,
+    0x7dff7dfe,
+    0xf7dfbeff,
+    0xff7dfbef,
+    0xffbeff7d,
+    0xf7df7fbe,
+    0xefdf7fbe,
+    0xfffdf7fb,
+    0xfffffff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf8000000,
+    0x7fdf7fbe,
+    0xbfdf7fdf,
+    0xfbfdf7ef,
+    0x1e,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[35] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3df780,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0xe0000000,
+    0xf7d,
+    0x0,
+    0x0,
+    0xfbc00000,
+    0x1e,
+    0x0,
+    0x0,
+    0xf0000000,
+    0x7be,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x180,
+    0x0,
+    0x60,
+    0x0,
+    0x0,
+    0x30000,
+    0x80030000,
+    0xc0018001,
+    0x6000c000,
+    0x6000c00,
+    0x6000c00,
+    0x3000600,
+    0x1800300,
+    0x180030,
+    0x180030,
+    0x180018,
+    0xc001800c,
+    0xc0000000,
+    0x60006000,
+    0x30003000,
+    0x3001800,
+    0x180,
+    0x6000c0,
+    0x300060,
+    0x180030,
+    0x80018003,
+    0xc000c001,
+    0x60006000,
+    0x6003000,
+    0x600300,
+    0x300060,
+    0x180030,
+    0x180030,
+    0x18003,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x7fff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1fffe0,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1fe,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7f80,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1e3c,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x78f00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x5568,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x155a00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x79b0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1e6c00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbe00000,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xfbefdf7f,
+    0x3df7,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[35] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbc00000,
+    0x1e,
+    0x0,
+    0x0,
+    0x7bef0000,
+    0x0,
+    0x0,
+    0x78000000,
+    0x3df,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef000,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0,
+    0x0,
+    0x0,
+    0x0,
+    0x3df7800,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[37] =
+{
+    0x0,
+    0x0,
+    0x4,
+    0x0,
+    0x8000,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x1000200,
+    0x800100,
+    0x4000a0,
+    0x40000,
+    0x40008,
+    0x80020004,
+    0x10002,
+    0x20001000,
+    0x10001000,
+    0x8001400,
+    0x800000,
+    0x800000,
+    0x400040,
+    0x280020,
+    0x10,
+    0x80004001,
+    0x40004000,
+    0x28002000,
+    0x1000,
+    0x1000100,
+    0x800080,
+    0x500040,
+    0x20,
+    0x40000002,
+    0x20002000,
+    0x24001000,
+    0x1000,
+    0x100,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x22f0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1178000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x2080000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1040000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[8] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x20000000,
+    0x0,
+    0x0,
+    0x800,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x100,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x20000,
+    0x20000,
+    0x80010001,
+    0x40008000,
+    0x4000800,
+    0x4000800,
+    0x2000400,
+    0x1000200,
+    0x100020,
+    0x100020,
+    0x100010,
+    0x80010008,
+    0x80000000,
+    0x40004000,
+    0x20002000,
+    0x2001000,
+    0x100,
+    0x400080,
+    0x200040,
+    0x100020,
+    0x10002,
+    0x80008001,
+    0x40004000,
+    0x4002000,
+    0x400200,
+    0x200040,
+    0x100020,
+    0x100020,
+    0x10002,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[9] =
+{
+    0x18,
+    0x0,
+    0x4,
+    0xe0003df6,
+    0xe22fffff,
+    0x1f7d,
+    0x0,
+    0xc00,
+    0x7bec00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7fbefc0,
+    0xfbfdf7fd,
+    0x7dfefbfe,
+    0xf7dfefbf,
+    0xf7dfefbe,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0xffdf7fbe,
+    0x7fdf7fbe,
+    0xbfdf7fdf,
+    0xfbfdf7ef,
+    0xfbfffffe,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xfbefdf7f,
+    0xf117fdf7,
+    0xff7dfefb,
+    0xffbeff7d,
+    0xefdf7fbe,
+    0xf7fdf7fb,
+    0xfbfefbfd,
+    0x7dff7dfe,
+    0xf7dfbeff,
+    0xff7dfbef,
+    0xffbeff7d,
+    0xf7df7fbe,
+    0xefdf7fbe,
+    0x3df7fb,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffc00000,
+    0x1ffffff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff800000,
+    0x1fffff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff000000,
+    0x1ffff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfe000000,
+    0x1fff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfc000000,
+    0x1ff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf8000000,
+    0x1f,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0x1,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xc0000000,
+    0xcccccc,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1111111,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x100,
+    0x0,
+    0x0,
+    0x80000,
+    0x80000,
+    0x40004,
+    0x20002,
+    0x10002001,
+    0x10002000,
+    0x8001000,
+    0x4000800,
+    0x400080,
+    0x400080,
+    0x400040,
+    0x40020,
+    0x2,
+    0x10002,
+    0x80008001,
+    0x8004000,
+    0x400,
+    0x1000200,
+    0x800100,
+    0x400080,
+    0x40008,
+    0x20004,
+    0x10002,
+    0x10008001,
+    0x1000800,
+    0x800100,
+    0x400080,
+    0x400080,
+    0x40008,
+    0x2000000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xe0000000,
+    0xff7dfefb,
+    0xffbeff7d,
+    0xefdf7fbe,
+    0x3df7fb,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef,
+    0x0,
+    0x0,
+    0x3df7800,
+    0x0,
+    0x0,
+    0x0,
+    0xbef00000,
+    0x7,
+    0x0,
+    0x0,
+    0xf0000000,
+    0x7be,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0xf0000000,
+    0x7be,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x4000000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[33] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7c00000,
+    0xfbfefbfd,
+    0x7dff7dfe,
+    0xf7dfbeff,
+    0x7bef,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0x3df78000,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x1ef,
+    0x0,
+    0x0,
+    0x0,
+    0x3df78,
+    0x0,
+    0x0,
+    0x0,
+    0x3df7800,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef0,
+    0x0,
+    0x0,
+    0x0,
+    0x3df7800,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x16,
+    0x800e0000,
+    0x5,
+    0x0,
+    0x0,
+    0x2c00,
+    0x16002c00,
+    0xb001600,
+    0x5800b00,
+    0x5800b0,
+    0x5800b0,
+    0x2c0058,
+    0xc016002c,
+    0xc0016002,
+    0x60016002,
+    0xb0016001,
+    0xb001600,
+    0xb000000,
+    0x5800580,
+    0x2c002c0,
+    0x2c0160,
+    0x70016,
+    0x8005800b,
+    0xc002c005,
+    0x2c016002,
+    0x16001600,
+    0xb000b00,
+    0x5800580,
+    0x5802c0,
+    0x8005802c,
+    0xc002c005,
+    0xc0016002,
+    0x2c016002,
+    0x1600,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x14,
+    0xc0000,
+    0x5,
+    0x0,
+    0x0,
+    0x2800,
+    0x14002800,
+    0xa001400,
+    0x5000a00,
+    0x5000a0,
+    0x5000a0,
+    0x280050,
+    0x80140028,
+    0x80014002,
+    0x40014002,
+    0xa0014001,
+    0xa001400,
+    0xa000000,
+    0x5000500,
+    0x2800280,
+    0x280140,
+    0x60014,
+    0x5000a,
+    0x80028005,
+    0x28014002,
+    0x14001400,
+    0xa000a00,
+    0x5000500,
+    0x500280,
+    0x50028,
+    0x80028005,
+    0x80014002,
+    0x28014002,
+    0x1400,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x1de0,
+    0x2200000,
+    0x778,
+    0x0,
+    0x0,
+    0x3bc000,
+    0xe03bc000,
+    0xf01de01d,
+    0x780ef00e,
+    0x7780ef07,
+    0x7780ef00,
+    0x3bc07780,
+    0x1de03bc0,
+    0x1de03bc,
+    0x1de03bc,
+    0x1de01de,
+    0xf01de0ef,
+    0xf000000e,
+    0x7807780e,
+    0xbc03bc07,
+    0x3bc1de03,
+    0x1101de0,
+    0x7780ef0,
+    0x3bc0778,
+    0xc1de03bc,
+    0xe01de03b,
+    0xf00ef01d,
+    0x7807780e,
+    0x7783bc07,
+    0x7783bc0,
+    0x3bc0778,
+    0x1de03bc,
+    0xc1de03bc,
+    0x1de03b,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x8000000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x800,
+    0x0,
+    0x0,
+    0x400000,
+    0x400000,
+    0x200020,
+    0x100010,
+    0x80010008,
+    0x80010000,
+    0x40008000,
+    0x20004000,
+    0x2000400,
+    0x2000400,
+    0x2000200,
+    0x200100,
+    0x10,
+    0x80010,
+    0x40008,
+    0x40020004,
+    0x2000,
+    0x8001000,
+    0x4000800,
+    0x2000400,
+    0x200040,
+    0x100020,
+    0x80010,
+    0x80040008,
+    0x8004000,
+    0x4000800,
+    0x2000400,
+    0x2000400,
+    0x200040,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x810,
+    0x0,
+    0x204,
+    0x0,
+    0x0,
+    0x102000,
+    0x10102000,
+    0x8081008,
+    0x4040804,
+    0x20404082,
+    0x20404080,
+    0x10202040,
+    0x8101020,
+    0x810102,
+    0x810102,
+    0x80810081,
+    0x8081040,
+    0x8000004,
+    0x4020404,
+    0x2010202,
+    0x10208101,
+    0x810,
+    0x2040408,
+    0x1020204,
+    0x20810102,
+    0x10081010,
+    0x8040808,
+    0x4020404,
+    0x20410202,
+    0x2041020,
+    0x1020204,
+    0x810102,
+    0x20810102,
+    0x81010,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x1000,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x200000,
+    0x200000,
+    0x100010,
+    0x80008,
+    0x40008004,
+    0x40008000,
+    0x20004000,
+    0x10002000,
+    0x1000200,
+    0x1000200,
+    0x1000100,
+    0x100080,
+    0x8,
+    0x40008,
+    0x20004,
+    0x20010002,
+    0x1000,
+    0x4000800,
+    0x2000400,
+    0x1000200,
+    0x100020,
+    0x80010,
+    0x40008,
+    0x40020004,
+    0x4002000,
+    0x2000400,
+    0x1000200,
+    0x1000200,
+    0x100020,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1000,
+    0x0,
+    0xc00,
+    0x7bec00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xffbeff7d,
+    0xf7df7fbe,
+    0xefdf7fbe,
+    0x3df7fb,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0000,
+    0x0,
+    0x0,
+    0x0,
+    0x3df7800,
+    0x0,
+    0x0,
+    0xfbc00000,
+    0x1e,
+    0x0,
+    0x0,
+    0x80000000,
+    0x3df7,
+    0x0,
+    0x0,
+    0x0,
+    0x3df780,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef,
+    0x0,
+    0x0,
+    0x0,
+    0x3df780,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
+{
+    0x8,
+};
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_CNTAG",
+        .match        = 0x100,
+        .match_mask   = 0x180,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x80,
+        .match_mask   = 0x180,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1ff,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SVTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x40000,
+        .match_mask   = 0x40000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 18,
+        .minbit       = 18,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x44000,
+        .match_mask   = 0x5c000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x40020,
+        .match_mask   = 0x40020,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG",
+        .match        = 0x100,
+        .match_mask   = 0x180,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x80,
+        .match_mask   = 0x180,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1ff,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x40000,
+        .match_mask   = 0x40000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 18,
+        .minbit       = 18,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x44000,
+        .match_mask   = 0x5c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x40020,
+        .match_mask   = 0x40020,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_CNTAG",
+        .match        = 0x100,
+        .match_mask   = 0x180,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1ff,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 38,
+        .match_minbit = 30,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 38,
+        .pminbit      = 30,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 45,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 56,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 56,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 51,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 54,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 57,
+        .match_minbit = 39,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 57,
+        .pminbit      = 39,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_CNTAG",
+        .match        = 0x100,
+        .match_mask   = 0x180,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x80,
+        .match_mask   = 0x180,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1ff,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SVTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 13,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 34,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 17,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 34,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 34,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x40000,
+        .match_mask   = 0x40000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 18,
+        .minbit       = 18,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x44000,
+        .match_mask   = 0x5c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x40020,
+        .match_mask   = 0x40020,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 8,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 9,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 33,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 29,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 29,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db_info = {
+    .num_entries = 225,
+    .db = bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map_info = {
+    .num_entries = 225,
+    .map = bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_pkt_flexhdr.c
new file mode 100644
index 00000000000..0811a14dc7f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_pkt_flexhdr.c
@@ -0,0 +1,10383 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56890_a0 and variant dna_6_5_32_4_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[13] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[13] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[13] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[13] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SRV6);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[13] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[13] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[13] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[13] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[13] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[13] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[13] |= (0x1 << 31);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+        reason[12] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "BSCAN_CONTROL_DATA_15_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 415 }, /* Profile 2. */
+            { 400, 415 }, /* Profile 3. */
+            { 400, 415 }, /* Profile 4. */
+            { 400, 415 }, /* Profile 5. */
+            { 400, 415 }, /* Profile 6. */
+            { 400, 415 }, /* Profile 7. */
+            { 400, 415 }, /* Profile 8. */
+            { 400, 415 }, /* Profile 9. */
+            { 400, 415 }, /* Profile 10. */
+            { 400, 415 }, /* Profile 11. */
+            { 400, 415 }, /* Profile 12. */
+            { 400, 415 }, /* Profile 13. */
+            { 400, 415 }, /* Profile 14. */
+            { 400, 415 }, /* Profile 15. */
+            { 400, 415 }, /* Profile 16. */
+            { 400, 415 }, /* Profile 17. */
+            { 400, 415 }, /* Profile 18. */
+            { 400, 415 }, /* Profile 19. */
+            { 400, 415 }, /* Profile 20. */
+            { 400, 415 }, /* Profile 21. */
+            { 400, 415 }, /* Profile 22. */
+            { 400, 415 }, /* Profile 23. */
+            { 400, 415 }, /* Profile 24. */
+            { 400, 415 }, /* Profile 25. */
+            { 400, 415 }, /* Profile 26. */
+            { 400, 415 }, /* Profile 27. */
+            { 400, 415 }, /* Profile 28. */
+            { 400, 415 }, /* Profile 29. */
+            { 400, 415 }, /* Profile 30. */
+            { 400, 415 }, /* Profile 31. */
+            { 400, 415 }, /* Profile 32. */
+            { 400, 415 }, /* Profile 33. */
+            { 400, 415 }, /* Profile 34. */
+            { 400, 415 }, /* Profile 35. */
+            { 400, 415 }, /* Profile 36. */
+            { 400, 415 }, /* Profile 37. */
+            { 400, 415 }, /* Profile 38. */
+            { 400, 415 }, /* Profile 39. */
+            { 400, 415 }, /* Profile 40. */
+            { 400, 415 }, /* Profile 41. */
+            { 400, 415 }, /* Profile 42. */
+            { 400, 415 }, /* Profile 43. */
+            { 400, 415 }, /* Profile 44. */
+            { 400, 415 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "BSCAN_CONTROL_FLAGS_3_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 476, 479 }, /* Profile 2. */
+            { 476, 479 }, /* Profile 3. */
+            { 476, 479 }, /* Profile 4. */
+            { 476, 479 }, /* Profile 5. */
+            { 476, 479 }, /* Profile 6. */
+            { 476, 479 }, /* Profile 7. */
+            { 476, 479 }, /* Profile 8. */
+            { 476, 479 }, /* Profile 9. */
+            { 476, 479 }, /* Profile 10. */
+            { 476, 479 }, /* Profile 11. */
+            { 476, 479 }, /* Profile 12. */
+            { 476, 479 }, /* Profile 13. */
+            { 476, 479 }, /* Profile 14. */
+            { 476, 479 }, /* Profile 15. */
+            { 476, 479 }, /* Profile 16. */
+            { 476, 479 }, /* Profile 17. */
+            { 476, 479 }, /* Profile 18. */
+            { 476, 479 }, /* Profile 19. */
+            { 476, 479 }, /* Profile 20. */
+            { 476, 479 }, /* Profile 21. */
+            { 476, 479 }, /* Profile 22. */
+            { 476, 479 }, /* Profile 23. */
+            { 476, 479 }, /* Profile 24. */
+            { 476, 479 }, /* Profile 25. */
+            { 476, 479 }, /* Profile 26. */
+            { 476, 479 }, /* Profile 27. */
+            { 476, 479 }, /* Profile 28. */
+            { 476, 479 }, /* Profile 29. */
+            { 476, 479 }, /* Profile 30. */
+            { 476, 479 }, /* Profile 31. */
+            { 476, 479 }, /* Profile 32. */
+            { 476, 479 }, /* Profile 33. */
+            { 476, 479 }, /* Profile 34. */
+            { 476, 479 }, /* Profile 35. */
+            { 476, 479 }, /* Profile 36. */
+            { 476, 479 }, /* Profile 37. */
+            { 476, 479 }, /* Profile 38. */
+            { 476, 479 }, /* Profile 39. */
+            { 476, 479 }, /* Profile 40. */
+            { 476, 479 }, /* Profile 41. */
+            { 476, 479 }, /* Profile 42. */
+            { 476, 479 }, /* Profile 43. */
+            { 476, 479 }, /* Profile 44. */
+            { 476, 479 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { 272, 287 }, /* Profile 13. */
+            { 272, 287 }, /* Profile 14. */
+            { 288, 303 }, /* Profile 15. */
+            { 288, 303 }, /* Profile 16. */
+            { 272, 287 }, /* Profile 17. */
+            { 272, 287 }, /* Profile 18. */
+            { 288, 303 }, /* Profile 19. */
+            { 288, 303 }, /* Profile 20. */
+            { 272, 287 }, /* Profile 21. */
+            { 272, 287 }, /* Profile 22. */
+            { 288, 303 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { 288, 303 }, /* Profile 35. */
+            { 288, 303 }, /* Profile 36. */
+            { 304, 319 }, /* Profile 37. */
+            { 304, 319 }, /* Profile 38. */
+            { 288, 303 }, /* Profile 39. */
+            { 288, 303 }, /* Profile 40. */
+            { 304, 319 }, /* Profile 41. */
+            { 304, 319 }, /* Profile 42. */
+            { 288, 303 }, /* Profile 43. */
+            { 288, 303 }, /* Profile 44. */
+            { 304, 319 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "DNAT_CTRL_3_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 420, 423 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 420, 423 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { 420, 423 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { 420, 423 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { 420, 423 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { 420, 423 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { 420, 423 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { 420, 423 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { 420, 423 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { 420, 423 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { 420, 423 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { 420, 423 }, /* Profile 44. */
+        },
+        .profile_cnt = 45,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 48, 63 }, /* Profile 10. */
+            { 48, 63 }, /* Profile 11. */
+            { 48, 63 }, /* Profile 12. */
+            { 48, 63 }, /* Profile 13. */
+            { 48, 63 }, /* Profile 14. */
+            { 48, 63 }, /* Profile 15. */
+            { 48, 63 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { 48, 63 }, /* Profile 21. */
+            { 48, 63 }, /* Profile 22. */
+            { 48, 63 }, /* Profile 23. */
+            { 48, 63 }, /* Profile 24. */
+            { 48, 63 }, /* Profile 25. */
+            { 48, 63 }, /* Profile 26. */
+            { 48, 63 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { 48, 63 }, /* Profile 32. */
+            { 48, 63 }, /* Profile 33. */
+            { 48, 63 }, /* Profile 34. */
+            { 48, 63 }, /* Profile 35. */
+            { 48, 63 }, /* Profile 36. */
+            { 48, 63 }, /* Profile 37. */
+            { 48, 63 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { 48, 63 }, /* Profile 43. */
+            { 48, 63 }, /* Profile 44. */
+            { 48, 63 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 191 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 5. */
+            { 176, 191 }, /* Profile 6. */
+            { 176, 191 }, /* Profile 7. */
+            { 208, 223 }, /* Profile 8. */
+            { 208, 223 }, /* Profile 9. */
+            { 176, 191 }, /* Profile 10. */
+            { 176, 191 }, /* Profile 11. */
+            { 208, 223 }, /* Profile 12. */
+            { 176, 191 }, /* Profile 13. */
+            { 176, 191 }, /* Profile 14. */
+            { 208, 223 }, /* Profile 15. */
+            { 208, 223 }, /* Profile 16. */
+            { 176, 191 }, /* Profile 17. */
+            { 176, 191 }, /* Profile 18. */
+            { 208, 223 }, /* Profile 19. */
+            { 208, 223 }, /* Profile 20. */
+            { 176, 191 }, /* Profile 21. */
+            { 176, 191 }, /* Profile 22. */
+            { 208, 223 }, /* Profile 23. */
+            { 192, 207 }, /* Profile 24. */
+            { 192, 207 }, /* Profile 25. */
+            { 224, 239 }, /* Profile 26. */
+            { 224, 239 }, /* Profile 27. */
+            { 192, 207 }, /* Profile 28. */
+            { 192, 207 }, /* Profile 29. */
+            { 224, 239 }, /* Profile 30. */
+            { 224, 239 }, /* Profile 31. */
+            { 192, 207 }, /* Profile 32. */
+            { 192, 207 }, /* Profile 33. */
+            { 224, 239 }, /* Profile 34. */
+            { 192, 207 }, /* Profile 35. */
+            { 192, 207 }, /* Profile 36. */
+            { 224, 239 }, /* Profile 37. */
+            { 224, 239 }, /* Profile 38. */
+            { 192, 207 }, /* Profile 39. */
+            { 192, 207 }, /* Profile 40. */
+            { 224, 239 }, /* Profile 41. */
+            { 224, 239 }, /* Profile 42. */
+            { 192, 207 }, /* Profile 43. */
+            { 192, 207 }, /* Profile 44. */
+            { 224, 239 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { 160, 175 }, /* Profile 5. */
+            { 128, 143 }, /* Profile 6. */
+            { 128, 143 }, /* Profile 7. */
+            { 160, 175 }, /* Profile 8. */
+            { 160, 175 }, /* Profile 9. */
+            { 128, 143 }, /* Profile 10. */
+            { 128, 143 }, /* Profile 11. */
+            { 160, 175 }, /* Profile 12. */
+            { 128, 143 }, /* Profile 13. */
+            { 128, 143 }, /* Profile 14. */
+            { 160, 175 }, /* Profile 15. */
+            { 160, 175 }, /* Profile 16. */
+            { 128, 143 }, /* Profile 17. */
+            { 128, 143 }, /* Profile 18. */
+            { 160, 175 }, /* Profile 19. */
+            { 160, 175 }, /* Profile 20. */
+            { 128, 143 }, /* Profile 21. */
+            { 128, 143 }, /* Profile 22. */
+            { 160, 175 }, /* Profile 23. */
+            { 144, 159 }, /* Profile 24. */
+            { 144, 159 }, /* Profile 25. */
+            { 176, 191 }, /* Profile 26. */
+            { 176, 191 }, /* Profile 27. */
+            { 144, 159 }, /* Profile 28. */
+            { 144, 159 }, /* Profile 29. */
+            { 176, 191 }, /* Profile 30. */
+            { 176, 191 }, /* Profile 31. */
+            { 144, 159 }, /* Profile 32. */
+            { 144, 159 }, /* Profile 33. */
+            { 176, 191 }, /* Profile 34. */
+            { 144, 159 }, /* Profile 35. */
+            { 144, 159 }, /* Profile 36. */
+            { 176, 191 }, /* Profile 37. */
+            { 176, 191 }, /* Profile 38. */
+            { 144, 159 }, /* Profile 39. */
+            { 144, 159 }, /* Profile 40. */
+            { 176, 191 }, /* Profile 41. */
+            { 176, 191 }, /* Profile 42. */
+            { 144, 159 }, /* Profile 43. */
+            { 144, 159 }, /* Profile 44. */
+            { 176, 191 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 287 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
+            { 272, 287 }, /* Profile 6. */
+            { 272, 287 }, /* Profile 7. */
+            { 288, 303 }, /* Profile 8. */
+            { 288, 303 }, /* Profile 9. */
+            { 272, 287 }, /* Profile 10. */
+            { 272, 287 }, /* Profile 11. */
+            { 288, 303 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { 288, 303 }, /* Profile 24. */
+            { 288, 303 }, /* Profile 25. */
+            { 304, 319 }, /* Profile 26. */
+            { 304, 319 }, /* Profile 27. */
+            { 288, 303 }, /* Profile 28. */
+            { 288, 303 }, /* Profile 29. */
+            { 304, 319 }, /* Profile 30. */
+            { 304, 319 }, /* Profile 31. */
+            { 288, 303 }, /* Profile 32. */
+            { 288, 303 }, /* Profile 33. */
+            { 304, 319 }, /* Profile 34. */
+        },
+        .profile_cnt = 35,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 436, 439 }, /* Profile 2. */
+            { 440, 443 }, /* Profile 3. */
+            { 436, 439 }, /* Profile 4. */
+            { 436, 439 }, /* Profile 5. */
+            { 436, 439 }, /* Profile 6. */
+            { 440, 443 }, /* Profile 7. */
+            { 436, 439 }, /* Profile 8. */
+            { 436, 439 }, /* Profile 9. */
+            { 436, 439 }, /* Profile 10. */
+            { 440, 443 }, /* Profile 11. */
+            { 436, 439 }, /* Profile 12. */
+            { 436, 439 }, /* Profile 13. */
+            { 440, 443 }, /* Profile 14. */
+            { 436, 439 }, /* Profile 15. */
+            { 436, 439 }, /* Profile 16. */
+            { 436, 439 }, /* Profile 17. */
+            { 440, 443 }, /* Profile 18. */
+            { 436, 439 }, /* Profile 19. */
+            { 436, 439 }, /* Profile 20. */
+            { 436, 439 }, /* Profile 21. */
+            { 440, 443 }, /* Profile 22. */
+            { 436, 439 }, /* Profile 23. */
+            { 436, 439 }, /* Profile 24. */
+            { 440, 443 }, /* Profile 25. */
+            { 436, 439 }, /* Profile 26. */
+            { 436, 439 }, /* Profile 27. */
+            { 436, 439 }, /* Profile 28. */
+            { 440, 443 }, /* Profile 29. */
+            { 436, 439 }, /* Profile 30. */
+            { 436, 439 }, /* Profile 31. */
+            { 436, 439 }, /* Profile 32. */
+            { 440, 443 }, /* Profile 33. */
+            { 436, 439 }, /* Profile 34. */
+            { 436, 439 }, /* Profile 35. */
+            { 440, 443 }, /* Profile 36. */
+            { 436, 439 }, /* Profile 37. */
+            { 436, 439 }, /* Profile 38. */
+            { 436, 439 }, /* Profile 39. */
+            { 440, 443 }, /* Profile 40. */
+            { 436, 439 }, /* Profile 41. */
+            { 436, 439 }, /* Profile 42. */
+            { 436, 439 }, /* Profile 43. */
+            { 440, 443 }, /* Profile 44. */
+            { 436, 439 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 95 }, /* Profile 2. */
+            { 80, 95 }, /* Profile 3. */
+            { 80, 95 }, /* Profile 4. */
+            { 80, 95 }, /* Profile 5. */
+            { 80, 95 }, /* Profile 6. */
+            { 80, 95 }, /* Profile 7. */
+            { 80, 95 }, /* Profile 8. */
+            { 80, 95 }, /* Profile 9. */
+            { 80, 95 }, /* Profile 10. */
+            { 80, 95 }, /* Profile 11. */
+            { 80, 95 }, /* Profile 12. */
+            { 80, 95 }, /* Profile 13. */
+            { 80, 95 }, /* Profile 14. */
+            { 80, 95 }, /* Profile 15. */
+            { 80, 95 }, /* Profile 16. */
+            { 80, 95 }, /* Profile 17. */
+            { 80, 95 }, /* Profile 18. */
+            { 80, 95 }, /* Profile 19. */
+            { 80, 95 }, /* Profile 20. */
+            { 80, 95 }, /* Profile 21. */
+            { 80, 95 }, /* Profile 22. */
+            { 80, 95 }, /* Profile 23. */
+            { 80, 95 }, /* Profile 24. */
+            { 80, 95 }, /* Profile 25. */
+            { 80, 95 }, /* Profile 26. */
+            { 80, 95 }, /* Profile 27. */
+            { 80, 95 }, /* Profile 28. */
+            { 80, 95 }, /* Profile 29. */
+            { 80, 95 }, /* Profile 30. */
+            { 80, 95 }, /* Profile 31. */
+            { 80, 95 }, /* Profile 32. */
+            { 80, 95 }, /* Profile 33. */
+            { 80, 95 }, /* Profile 34. */
+            { 80, 95 }, /* Profile 35. */
+            { 80, 95 }, /* Profile 36. */
+            { 80, 95 }, /* Profile 37. */
+            { 80, 95 }, /* Profile 38. */
+            { 80, 95 }, /* Profile 39. */
+            { 80, 95 }, /* Profile 40. */
+            { 80, 95 }, /* Profile 41. */
+            { 80, 95 }, /* Profile 42. */
+            { 80, 95 }, /* Profile 43. */
+            { 80, 95 }, /* Profile 44. */
+            { 80, 95 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 48, 63 }, /* Profile 6. */
+            { 48, 63 }, /* Profile 7. */
+            { 48, 63 }, /* Profile 8. */
+            { 48, 63 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { 48, 63 }, /* Profile 17. */
+            { 48, 63 }, /* Profile 18. */
+            { 48, 63 }, /* Profile 19. */
+            { 48, 63 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { 48, 63 }, /* Profile 28. */
+            { 48, 63 }, /* Profile 29. */
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+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 383 }, /* Profile 2. */
+            { 368, 383 }, /* Profile 3. */
+            { 368, 383 }, /* Profile 4. */
+            { 368, 383 }, /* Profile 5. */
+            { 368, 383 }, /* Profile 6. */
+            { 368, 383 }, /* Profile 7. */
+            { 368, 383 }, /* Profile 8. */
+            { 368, 383 }, /* Profile 9. */
+            { 368, 383 }, /* Profile 10. */
+            { 368, 383 }, /* Profile 11. */
+            { 368, 383 }, /* Profile 12. */
+            { 368, 383 }, /* Profile 13. */
+            { 368, 383 }, /* Profile 14. */
+            { 368, 383 }, /* Profile 15. */
+            { 368, 383 }, /* Profile 16. */
+            { 368, 383 }, /* Profile 17. */
+            { 368, 383 }, /* Profile 18. */
+            { 368, 383 }, /* Profile 19. */
+            { 368, 383 }, /* Profile 20. */
+            { 368, 383 }, /* Profile 21. */
+            { 368, 383 }, /* Profile 22. */
+            { 368, 383 }, /* Profile 23. */
+            { 368, 383 }, /* Profile 24. */
+            { 368, 383 }, /* Profile 25. */
+            { 368, 383 }, /* Profile 26. */
+            { 368, 383 }, /* Profile 27. */
+            { 368, 383 }, /* Profile 28. */
+            { 368, 383 }, /* Profile 29. */
+            { 368, 383 }, /* Profile 30. */
+            { 368, 383 }, /* Profile 31. */
+            { 368, 383 }, /* Profile 32. */
+            { 368, 383 }, /* Profile 33. */
+            { 368, 383 }, /* Profile 34. */
+            { 368, 383 }, /* Profile 35. */
+            { 368, 383 }, /* Profile 36. */
+            { 368, 383 }, /* Profile 37. */
+            { 368, 383 }, /* Profile 38. */
+            { 368, 383 }, /* Profile 39. */
+            { 368, 383 }, /* Profile 40. */
+            { 368, 383 }, /* Profile 41. */
+            { 368, 383 }, /* Profile 42. */
+            { 368, 383 }, /* Profile 43. */
+            { 368, 383 }, /* Profile 44. */
+            { 368, 383 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 416, 419 }, /* Profile 2. */
+            { 416, 419 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+            { 416, 419 }, /* Profile 5. */
+            { 416, 419 }, /* Profile 6. */
+            { 416, 419 }, /* Profile 7. */
+            { 416, 419 }, /* Profile 8. */
+            { 416, 419 }, /* Profile 9. */
+            { 416, 419 }, /* Profile 10. */
+            { 416, 419 }, /* Profile 11. */
+            { 416, 419 }, /* Profile 12. */
+            { 416, 419 }, /* Profile 13. */
+            { 416, 419 }, /* Profile 14. */
+            { 416, 419 }, /* Profile 15. */
+            { 416, 419 }, /* Profile 16. */
+            { 416, 419 }, /* Profile 17. */
+            { 416, 419 }, /* Profile 18. */
+            { 416, 419 }, /* Profile 19. */
+            { 416, 419 }, /* Profile 20. */
+            { 416, 419 }, /* Profile 21. */
+            { 416, 419 }, /* Profile 22. */
+            { 416, 419 }, /* Profile 23. */
+            { 416, 419 }, /* Profile 24. */
+            { 416, 419 }, /* Profile 25. */
+            { 416, 419 }, /* Profile 26. */
+            { 416, 419 }, /* Profile 27. */
+            { 416, 419 }, /* Profile 28. */
+            { 416, 419 }, /* Profile 29. */
+            { 416, 419 }, /* Profile 30. */
+            { 416, 419 }, /* Profile 31. */
+            { 416, 419 }, /* Profile 32. */
+            { 416, 419 }, /* Profile 33. */
+            { 416, 419 }, /* Profile 34. */
+            { 416, 419 }, /* Profile 35. */
+            { 416, 419 }, /* Profile 36. */
+            { 416, 419 }, /* Profile 37. */
+            { 416, 419 }, /* Profile 38. */
+            { 416, 419 }, /* Profile 39. */
+            { 416, 419 }, /* Profile 40. */
+            { 416, 419 }, /* Profile 41. */
+            { 416, 419 }, /* Profile 42. */
+            { 416, 419 }, /* Profile 43. */
+            { 416, 419 }, /* Profile 44. */
+            { 416, 419 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 6. */
+            { 144, 159 }, /* Profile 7. */
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+            { 176, 191 }, /* Profile 9. */
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+            { 144, 159 }, /* Profile 11. */
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+            { 144, 159 }, /* Profile 13. */
+            { 144, 159 }, /* Profile 14. */
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+            { 176, 191 }, /* Profile 16. */
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+            { 144, 159 }, /* Profile 18. */
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+            { 176, 191 }, /* Profile 20. */
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+            { 144, 159 }, /* Profile 22. */
+            { 176, 191 }, /* Profile 23. */
+            { 160, 175 }, /* Profile 24. */
+            { 160, 175 }, /* Profile 25. */
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+            { 192, 207 }, /* Profile 27. */
+            { 160, 175 }, /* Profile 28. */
+            { 160, 175 }, /* Profile 29. */
+            { 192, 207 }, /* Profile 30. */
+            { 192, 207 }, /* Profile 31. */
+            { 160, 175 }, /* Profile 32. */
+            { 160, 175 }, /* Profile 33. */
+            { 192, 207 }, /* Profile 34. */
+            { 160, 175 }, /* Profile 35. */
+            { 160, 175 }, /* Profile 36. */
+            { 192, 207 }, /* Profile 37. */
+            { 192, 207 }, /* Profile 38. */
+            { 160, 175 }, /* Profile 39. */
+            { 160, 175 }, /* Profile 40. */
+            { 192, 207 }, /* Profile 41. */
+            { 192, 207 }, /* Profile 42. */
+            { 160, 175 }, /* Profile 43. */
+            { 160, 175 }, /* Profile 44. */
+            { 192, 207 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 456, 459 }, /* Profile 2. */
+            { 456, 459 }, /* Profile 3. */
+            { 456, 459 }, /* Profile 4. */
+            { 456, 459 }, /* Profile 5. */
+            { 456, 459 }, /* Profile 6. */
+            { 456, 459 }, /* Profile 7. */
+            { 456, 459 }, /* Profile 8. */
+            { 456, 459 }, /* Profile 9. */
+            { 452, 455 }, /* Profile 10. */
+            { 452, 455 }, /* Profile 11. */
+            { 452, 455 }, /* Profile 12. */
+            { 456, 459 }, /* Profile 13. */
+            { 456, 459 }, /* Profile 14. */
+            { 456, 459 }, /* Profile 15. */
+            { 456, 459 }, /* Profile 16. */
+            { 456, 459 }, /* Profile 17. */
+            { 456, 459 }, /* Profile 18. */
+            { 456, 459 }, /* Profile 19. */
+            { 456, 459 }, /* Profile 20. */
+            { 452, 455 }, /* Profile 21. */
+            { 452, 455 }, /* Profile 22. */
+            { 452, 455 }, /* Profile 23. */
+            { 456, 459 }, /* Profile 24. */
+            { 456, 459 }, /* Profile 25. */
+            { 456, 459 }, /* Profile 26. */
+            { 456, 459 }, /* Profile 27. */
+            { 456, 459 }, /* Profile 28. */
+            { 456, 459 }, /* Profile 29. */
+            { 456, 459 }, /* Profile 30. */
+            { 456, 459 }, /* Profile 31. */
+            { 452, 455 }, /* Profile 32. */
+            { 452, 455 }, /* Profile 33. */
+            { 452, 455 }, /* Profile 34. */
+            { 456, 459 }, /* Profile 35. */
+            { 456, 459 }, /* Profile 36. */
+            { 456, 459 }, /* Profile 37. */
+            { 456, 459 }, /* Profile 38. */
+            { 456, 459 }, /* Profile 39. */
+            { 456, 459 }, /* Profile 40. */
+            { 456, 459 }, /* Profile 41. */
+            { 456, 459 }, /* Profile 42. */
+            { 452, 455 }, /* Profile 43. */
+            { 452, 455 }, /* Profile 44. */
+            { 452, 455 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+            { 96, 111 }, /* Profile 4. */
+            { 96, 111 }, /* Profile 5. */
+            { 96, 111 }, /* Profile 6. */
+            { 96, 111 }, /* Profile 7. */
+            { 96, 111 }, /* Profile 8. */
+            { 96, 111 }, /* Profile 9. */
+            { 96, 111 }, /* Profile 10. */
+            { 96, 111 }, /* Profile 11. */
+            { 96, 111 }, /* Profile 12. */
+            { 96, 111 }, /* Profile 13. */
+            { 96, 111 }, /* Profile 14. */
+            { 96, 111 }, /* Profile 15. */
+            { 96, 111 }, /* Profile 16. */
+            { 96, 111 }, /* Profile 17. */
+            { 96, 111 }, /* Profile 18. */
+            { 96, 111 }, /* Profile 19. */
+            { 96, 111 }, /* Profile 20. */
+            { 96, 111 }, /* Profile 21. */
+            { 96, 111 }, /* Profile 22. */
+            { 96, 111 }, /* Profile 23. */
+            { 96, 111 }, /* Profile 24. */
+            { 96, 111 }, /* Profile 25. */
+            { 96, 111 }, /* Profile 26. */
+            { 96, 111 }, /* Profile 27. */
+            { 96, 111 }, /* Profile 28. */
+            { 96, 111 }, /* Profile 29. */
+            { 96, 111 }, /* Profile 30. */
+            { 96, 111 }, /* Profile 31. */
+            { 96, 111 }, /* Profile 32. */
+            { 96, 111 }, /* Profile 33. */
+            { 96, 111 }, /* Profile 34. */
+            { 96, 111 }, /* Profile 35. */
+            { 96, 111 }, /* Profile 36. */
+            { 96, 111 }, /* Profile 37. */
+            { 96, 111 }, /* Profile 38. */
+            { 96, 111 }, /* Profile 39. */
+            { 96, 111 }, /* Profile 40. */
+            { 96, 111 }, /* Profile 41. */
+            { 96, 111 }, /* Profile 42. */
+            { 96, 111 }, /* Profile 43. */
+            { 96, 111 }, /* Profile 44. */
+            { 96, 111 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 444, 447 }, /* Profile 4. */
+            { 444, 447 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 444, 447 }, /* Profile 8. */
+            { 444, 447 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 440, 443 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { 444, 447 }, /* Profile 15. */
+            { 444, 447 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { 444, 447 }, /* Profile 19. */
+            { 444, 447 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { 440, 443 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { 444, 447 }, /* Profile 26. */
+            { 444, 447 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 444, 447 }, /* Profile 30. */
+            { 444, 447 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { 440, 443 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { 444, 447 }, /* Profile 37. */
+            { 444, 447 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { 444, 447 }, /* Profile 41. */
+            { 444, 447 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { 440, 443 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 448, 451 }, /* Profile 2. */
+            { 448, 451 }, /* Profile 3. */
+            { 448, 451 }, /* Profile 4. */
+            { 448, 451 }, /* Profile 5. */
+            { 448, 451 }, /* Profile 6. */
+            { 448, 451 }, /* Profile 7. */
+            { 448, 451 }, /* Profile 8. */
+            { 448, 451 }, /* Profile 9. */
+            { 444, 447 }, /* Profile 10. */
+            { 444, 447 }, /* Profile 11. */
+            { 444, 447 }, /* Profile 12. */
+            { 448, 451 }, /* Profile 13. */
+            { 448, 451 }, /* Profile 14. */
+            { 448, 451 }, /* Profile 15. */
+            { 448, 451 }, /* Profile 16. */
+            { 448, 451 }, /* Profile 17. */
+            { 448, 451 }, /* Profile 18. */
+            { 448, 451 }, /* Profile 19. */
+            { 448, 451 }, /* Profile 20. */
+            { 444, 447 }, /* Profile 21. */
+            { 444, 447 }, /* Profile 22. */
+            { 444, 447 }, /* Profile 23. */
+            { 448, 451 }, /* Profile 24. */
+            { 448, 451 }, /* Profile 25. */
+            { 448, 451 }, /* Profile 26. */
+            { 448, 451 }, /* Profile 27. */
+            { 448, 451 }, /* Profile 28. */
+            { 448, 451 }, /* Profile 29. */
+            { 448, 451 }, /* Profile 30. */
+            { 448, 451 }, /* Profile 31. */
+            { 444, 447 }, /* Profile 32. */
+            { 444, 447 }, /* Profile 33. */
+            { 444, 447 }, /* Profile 34. */
+            { 448, 451 }, /* Profile 35. */
+            { 448, 451 }, /* Profile 36. */
+            { 448, 451 }, /* Profile 37. */
+            { 448, 451 }, /* Profile 38. */
+            { 448, 451 }, /* Profile 39. */
+            { 448, 451 }, /* Profile 40. */
+            { 448, 451 }, /* Profile 41. */
+            { 448, 451 }, /* Profile 42. */
+            { 444, 447 }, /* Profile 43. */
+            { 444, 447 }, /* Profile 44. */
+            { 444, 447 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+            { 112, 127 }, /* Profile 6. */
+            { 112, 127 }, /* Profile 7. */
+            { 112, 127 }, /* Profile 8. */
+            { 112, 127 }, /* Profile 9. */
+            { 112, 127 }, /* Profile 10. */
+            { 112, 127 }, /* Profile 11. */
+            { 112, 127 }, /* Profile 12. */
+            { 112, 127 }, /* Profile 13. */
+            { 112, 127 }, /* Profile 14. */
+            { 112, 127 }, /* Profile 15. */
+            { 112, 127 }, /* Profile 16. */
+            { 112, 127 }, /* Profile 17. */
+            { 112, 127 }, /* Profile 18. */
+            { 112, 127 }, /* Profile 19. */
+            { 112, 127 }, /* Profile 20. */
+            { 112, 127 }, /* Profile 21. */
+            { 112, 127 }, /* Profile 22. */
+            { 112, 127 }, /* Profile 23. */
+            { 112, 127 }, /* Profile 24. */
+            { 112, 127 }, /* Profile 25. */
+            { 112, 127 }, /* Profile 26. */
+            { 112, 127 }, /* Profile 27. */
+            { 112, 127 }, /* Profile 28. */
+            { 112, 127 }, /* Profile 29. */
+            { 112, 127 }, /* Profile 30. */
+            { 112, 127 }, /* Profile 31. */
+            { 112, 127 }, /* Profile 32. */
+            { 112, 127 }, /* Profile 33. */
+            { 112, 127 }, /* Profile 34. */
+            { 112, 127 }, /* Profile 35. */
+            { 112, 127 }, /* Profile 36. */
+            { 112, 127 }, /* Profile 37. */
+            { 112, 127 }, /* Profile 38. */
+            { 112, 127 }, /* Profile 39. */
+            { 112, 127 }, /* Profile 40. */
+            { 112, 127 }, /* Profile 41. */
+            { 112, 127 }, /* Profile 42. */
+            { 112, 127 }, /* Profile 43. */
+            { 112, 127 }, /* Profile 44. */
+            { 112, 127 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
+        .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 424, 427 }, /* Profile 2. */
+            { 428, 431 }, /* Profile 3. */
+            { 424, 427 }, /* Profile 4. */
+            { 424, 427 }, /* Profile 5. */
+            { 424, 427 }, /* Profile 6. */
+            { 428, 431 }, /* Profile 7. */
+            { 424, 427 }, /* Profile 8. */
+            { 424, 427 }, /* Profile 9. */
+            { 424, 427 }, /* Profile 10. */
+            { 428, 431 }, /* Profile 11. */
+            { 424, 427 }, /* Profile 12. */
+            { 424, 427 }, /* Profile 13. */
+            { 428, 431 }, /* Profile 14. */
+            { 424, 427 }, /* Profile 15. */
+            { 424, 427 }, /* Profile 16. */
+            { 424, 427 }, /* Profile 17. */
+            { 428, 431 }, /* Profile 18. */
+            { 424, 427 }, /* Profile 19. */
+            { 424, 427 }, /* Profile 20. */
+            { 424, 427 }, /* Profile 21. */
+            { 428, 431 }, /* Profile 22. */
+            { 424, 427 }, /* Profile 23. */
+            { 424, 427 }, /* Profile 24. */
+            { 428, 431 }, /* Profile 25. */
+            { 424, 427 }, /* Profile 26. */
+            { 424, 427 }, /* Profile 27. */
+            { 424, 427 }, /* Profile 28. */
+            { 428, 431 }, /* Profile 29. */
+            { 424, 427 }, /* Profile 30. */
+            { 424, 427 }, /* Profile 31. */
+            { 424, 427 }, /* Profile 32. */
+            { 428, 431 }, /* Profile 33. */
+            { 424, 427 }, /* Profile 34. */
+            { 424, 427 }, /* Profile 35. */
+            { 428, 431 }, /* Profile 36. */
+            { 424, 427 }, /* Profile 37. */
+            { 424, 427 }, /* Profile 38. */
+            { 424, 427 }, /* Profile 39. */
+            { 428, 431 }, /* Profile 40. */
+            { 424, 427 }, /* Profile 41. */
+            { 424, 427 }, /* Profile 42. */
+            { 424, 427 }, /* Profile 43. */
+            { 428, 431 }, /* Profile 44. */
+            { 424, 427 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+};
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_field_data,
+    .profile_bmp_cnt = 2,
+    .profile_bmp[0] = 0xfffffffc,
+    .profile_bmp[1] = 0x3fff,
+
+};
+
+static shr_enum_map_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_names[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_arp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_arp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_arp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_arp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_authen_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_authen_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_authen_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_authen_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_bfd_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_bfd_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_bfd_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_bfd_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_cntag_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_cntag_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_cntag_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_cntag_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_dest_option_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_dest_option_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_dest_option_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_dest_option_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_esp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_esp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_esp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_esp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ethertype_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ethertype_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ethertype_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ethertype_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_frag_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_frag_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_frag_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_frag_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_get,
+    bcmpkt_gbp_ethernet_shim_t_flags_get,
+    bcmpkt_gbp_ethernet_shim_t_reserved_get,
+    bcmpkt_gbp_ethernet_shim_t_sid_get,
+    bcmpkt_gbp_ethernet_shim_t_subtype_get,
+    bcmpkt_gbp_ethernet_shim_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_set,
+    bcmpkt_gbp_ethernet_shim_t_flags_set,
+    bcmpkt_gbp_ethernet_shim_t_reserved_set,
+    bcmpkt_gbp_ethernet_shim_t_sid_set,
+    bcmpkt_gbp_ethernet_shim_t_subtype_set,
+    bcmpkt_gbp_ethernet_shim_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_src_subport_num_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_src_subport_num_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gpe_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gpe_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gpe_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gpe_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gre_key_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gre_key_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gre_key_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gre_key_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gre_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gre_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gre_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gre_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 4, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 4, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 6, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 6, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 15, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 15, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 2, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_get,
+    bcmpkt_hg3_base_t_cng_get,
+    bcmpkt_hg3_base_t_entropy_get,
+    bcmpkt_hg3_base_t_ext_hdr_present_get,
+    bcmpkt_hg3_base_t_hg3_reserved_get,
+    bcmpkt_hg3_base_t_l3_routed_get,
+    bcmpkt_hg3_base_t_mirror_copy_get,
+    bcmpkt_hg3_base_t_reserved_etype_get,
+    bcmpkt_hg3_base_t_system_destination_get,
+    bcmpkt_hg3_base_t_system_destination_type_get,
+    bcmpkt_hg3_base_t_system_source_get,
+    bcmpkt_hg3_base_t_tc_get,
+    bcmpkt_hg3_base_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_set,
+    bcmpkt_hg3_base_t_cng_set,
+    bcmpkt_hg3_base_t_entropy_set,
+    bcmpkt_hg3_base_t_ext_hdr_present_set,
+    bcmpkt_hg3_base_t_hg3_reserved_set,
+    bcmpkt_hg3_base_t_l3_routed_set,
+    bcmpkt_hg3_base_t_mirror_copy_set,
+    bcmpkt_hg3_base_t_reserved_etype_set,
+    bcmpkt_hg3_base_t_system_destination_set,
+    bcmpkt_hg3_base_t_system_destination_type_set,
+    bcmpkt_hg3_base_t_system_source_set,
+    bcmpkt_hg3_base_t_tc_set,
+    bcmpkt_hg3_base_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_get,
+    bcmpkt_hg3_extension_0_t_class_id_msb_get,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
+    bcmpkt_hg3_extension_0_t_flags_get,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
+    bcmpkt_hg3_extension_0_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_set,
+    bcmpkt_hg3_extension_0_t_class_id_msb_set,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
+    bcmpkt_hg3_extension_0_t_flags_set,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
+    bcmpkt_hg3_extension_0_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_icmp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_icmp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_icmp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_icmp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_a_t_cn_get,
+    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_metadata_a_t_lns_device_id_get,
+    bcmpkt_ifa_metadata_a_t_port_speed_get,
+    bcmpkt_ifa_metadata_a_t_queue_id_get,
+    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_a_t_cn_set,
+    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_metadata_a_t_lns_device_id_set,
+    bcmpkt_ifa_metadata_a_t_port_speed_set,
+    bcmpkt_ifa_metadata_a_t_queue_id_set,
+    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_b_t_egress_port_id_get,
+    bcmpkt_ifa_metadata_b_t_ingress_port_id_get,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_0_get,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_1_get,
+    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get,
+    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get,
+    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_b_t_egress_port_id_set,
+    bcmpkt_ifa_metadata_b_t_ingress_port_id_set,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_0_set,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_1_set,
+    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set,
+    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set,
+    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_base_t_action_vector_get,
+    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_base_t_action_vector_set,
+    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_igmp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_igmp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_igmp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_igmp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_get,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_get,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_get,
+    bcmpkt_ioam_e2e_t_namespace_id_get,
+    bcmpkt_ioam_e2e_t_next_protocol_get,
+    bcmpkt_ioam_e2e_t_reserved_get,
+    bcmpkt_ioam_e2e_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_set,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_set,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_set,
+    bcmpkt_ioam_e2e_t_namespace_id_set,
+    bcmpkt_ioam_e2e_t_next_protocol_set,
+    bcmpkt_ioam_e2e_t_reserved_set,
+    bcmpkt_ioam_e2e_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ipfix_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ipfix_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ipfix_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ipfix_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ipv4_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ipv4_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ipv4_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ipv4_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ipv6_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ipv6_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ipv6_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ipv6_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_l2_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_l2_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_l2_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_l2_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mpls_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mpls_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mpls_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mpls_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_p_1588_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_p_1588_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_p_1588_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_p_1588_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_pim_t_hdr_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_4_5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_4_5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_6_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_6_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_pim_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FID_COUNT] = {
+    bcmpkt_pim_t_hdr_bytes_0_1_get,
+    bcmpkt_pim_t_hdr_bytes_2_3_get,
+    bcmpkt_pim_t_hdr_bytes_4_5_get,
+    bcmpkt_pim_t_hdr_bytes_6_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_pim_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FID_COUNT] = {
+    bcmpkt_pim_t_hdr_bytes_0_1_set,
+    bcmpkt_pim_t_hdr_bytes_2_3_set,
+    bcmpkt_pim_t_hdr_bytes_4_5_set,
+    bcmpkt_pim_t_hdr_bytes_6_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_pim_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_pim_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_pim_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_rarp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_rarp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_rarp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_rarp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_routing_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_routing_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_routing_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_routing_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_rspan_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_rspan_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_rspan_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_rspan_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_svtag_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_get,
+    bcmpkt_svtag_t_data_upr_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_svtag_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_set,
+    bcmpkt_svtag_t_data_upr_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_svtag_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_svtag_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_svtag_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_udp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_udp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_udp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_udp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_vlan_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_vlan_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_vlan_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_vlan_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_vxlan_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_vxlan_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_vxlan_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_vxlan_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_wesp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_wesp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_wesp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_wesp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_32_4_0_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56890_a0_dna_6_5_32_4_0_flexhdr_info_list[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_arp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_authen_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_bfd_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_cntag_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_dest_option_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_esp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ethertype_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_frag_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gpe_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gre_key_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gre_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_icmp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_igmp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ipfix_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ipv4_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ipv6_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_l2_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mpls_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_p_1588_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_pim_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_pim_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_pim_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_rarp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_routing_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_rspan_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_svtag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_svtag_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_svtag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_udp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_vlan_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_vxlan_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_32_4_0_wesp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_32_4_0_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56890_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56890_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56890_a0_dna_6_5_32_4_0_flexhdr_id_map[] = {
+    BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56890_a0_dna_6_5_32_4_0_flexhdr_map_get(void)
+{
+    return bcm56890_a0_dna_6_5_32_4_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56890_a0_dna_6_5_32_4_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56890_a0_dna_6_5_32_4_0_flexhdr_info_list[hid];
+}
+
+int bcm56890_a0_dna_6_5_32_4_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    14,
+    21,
+    22,
+    65,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 00000000000..ba8dc9e45d5
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,1443 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm78800_a0_cna_6_5_32_3_0_sf_match_id_info.yml
+ * for device bcm78800_a0 and variant cna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h>
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
+{
+    0x14,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
+{
+    0x1e,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
+{
+    0x18,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] =
+{
+    0x7fffe,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] =
+{
+    0x810,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] =
+{
+    0x3f8,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] =
+{
+    0x1fc00,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] =
+{
+    0x20000,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] =
+{
+    0x3060,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] =
+{
+    0x2040,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] =
+{
+    0xc180,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] =
+{
+    0x40000,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] =
+{
+    0x10200,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] =
+{
+    0x8100,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] =
+{
+    0x28,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] =
+{
+    0x3e,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] =
+{
+    0x30,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] =
+{
+    0x1ffffe,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] =
+{
+    0x1010,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] =
+{
+    0x7f8,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] =
+{
+    0x7f800,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] =
+{
+    0x80000,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] =
+{
+    0x6060,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] =
+{
+    0x4040,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] =
+{
+    0x38380,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] =
+{
+    0x100000,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] =
+{
+    0x40400,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] =
+{
+    0x10100,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] =
+{
+    0x20200,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
+{
+    0x8,
+};
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db[BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0x1c00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0x1c00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0x1c00,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0x1c00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 13,
+        .arc_id_mask  = 0x3e000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
+
+    },
+    {
+        /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info = {
+    .num_entries = 77,
+    .db = bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info = {
+    .num_entries = 77,
+    .map = bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_pkt_flexhdr.c
new file mode 100644
index 00000000000..0e9b7575dec
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_pkt_flexhdr.c
@@ -0,0 +1,3833 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm78800_a0 and variant cna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 263 }, /* Profile 2. */
+            { 256, 263 }, /* Profile 3. */
+            { 256, 263 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EP_NIH_HDR_DROP_CODE_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 175 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_31_16",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 191 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "ERSPAN3_GBP_SID_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 287 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 272, 287 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 15 }, /* Profile 2. */
+            { 0, 15 }, /* Profile 3. */
+            { 0, 15 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_16",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 16, 31 }, /* Profile 2. */
+            { 16, 31 }, /* Profile 3. */
+            { 16, 31 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "IFP_TS_CONTROL_ACTION_3_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 416, 419 }, /* Profile 2. */
+            { 416, 419 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ING_TIMESTAMP_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_16",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INGRESS_PP_PORT_7_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 215 }, /* Profile 2. */
+            { 208, 215 }, /* Profile 3. */
+            { 208, 215 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 319 }, /* Profile 2. */
+            { 304, 319 }, /* Profile 3. */
+            { 304, 319 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L2_IIF_11_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 331 }, /* Profile 2. */
+            { 320, 331 }, /* Profile 3. */
+            { 320, 331 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L2_OIF_11_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 107 }, /* Profile 2. */
+            { 80, 91 }, /* Profile 3. */
+            { 96, 107 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 365 }, /* Profile 2. */
+            { 352, 365 }, /* Profile 3. */
+            { 352, 365 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 125 }, /* Profile 2. */
+            { 96, 109 }, /* Profile 3. */
+            { 112, 125 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 382 }, /* Profile 2. */
+            { 368, 382 }, /* Profile 3. */
+            { 368, 382 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "NHOP_INDEX_1_14_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 206 }, /* Profile 2. */
+            { 192, 206 }, /* Profile 3. */
+            { 192, 206 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 79 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 64, 79 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 336, 351 }, /* Profile 3. */
+            { 336, 351 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 255 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
+            { 240, 255 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 239 }, /* Profile 2. */
+            { 224, 239 }, /* Profile 3. */
+            { 224, 239 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "TAG_ACTION_CTRL_1_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 413 }, /* Profile 2. */
+            { 412, 413 }, /* Profile 3. */
+            { 412, 413 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 420, 423 }, /* Profile 2. */
+            { 420, 423 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 95 }, /* Profile 2. */
+            { 64, 79 }, /* Profile 3. */
+            { 80, 95 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+};
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_field_data,
+    .profile_bmp_cnt = 1,
+    .profile_bmp[0] = 0x1c,
+
+};
+
+static shr_enum_map_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_arp_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_arp_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_arp_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_arp_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_ethertype_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_ethertype_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_ethertype_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_ethertype_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_icmp_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_icmp_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_icmp_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_icmp_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_ipfix_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_ipfix_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_ipfix_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_ipfix_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_ipv4_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_ipv4_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_ipv4_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_ipv4_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_ipv6_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_ipv6_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_ipv6_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_ipv6_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_l2_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_l2_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_l2_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_l2_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_rarp_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_rarp_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_rarp_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_rarp_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_udp_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_udp_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_udp_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_udp_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_vlan_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_vlan_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_vlan_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_vlan_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_vxlan_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_vxlan_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_vxlan_t_field_data[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_vxlan_t_field_info = {
+    .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm78800_a0_cna_6_5_32_3_0_vxlan_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm78800_a0_cna_6_5_32_3_0_flexhdr_info_list[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_arp_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_ethertype_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_icmp_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_ipfix_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_ipv4_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_ipv6_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_l2_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_rarp_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_udp_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_vlan_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_cna_6_5_32_3_0_vxlan_t_fget,
+        .flex_fset = bcm78800_a0_cna_6_5_32_3_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm78800_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm78800_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm78800_a0_cna_6_5_32_3_0_flexhdr_id_map[] = {
+    BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm78800_a0_cna_6_5_32_3_0_flexhdr_map_get(void)
+{
+    return bcm78800_a0_cna_6_5_32_3_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm78800_a0_cna_6_5_32_3_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm78800_a0_cna_6_5_32_3_0_flexhdr_info_list[hid];
+}
+
+int bcm78800_a0_cna_6_5_32_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    7,
+    -1,
+    -1,
+    26,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id.c
deleted file mode 100644
index e4cc5182134..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id.c
+++ /dev/null
@@ -1,7291 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm78800_a0_dna_6_5_31_5_0_sf_match_id_info.yml
- * for device bcm78800_a0 and variant dna_6_5_31_5_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_match_id_defs.h>
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] =
-{
-    0x366c,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
-{
-    0x78f0,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
-{
-    0x1fffe,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
-{
-    0xff00,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] =
-{
-    0x1e4c8,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] =
-{
-    0x10,
-    0x400000,
-    0x1dd8000,
-    0x20,
-    0x0,
-    0x0,
-    0x0,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xddfddf77,
-    0x1,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x400000,
-    0x0,
-    0x100,
-    0x800776,
-    0x0,
-    0x0,
-    0x0,
-    0xf77c0000,
-    0xefeeff77,
-    0x7ddfddfe,
-    0x777f7,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde,
-    0x0,
-    0x0,
-    0x7778,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0x77780,
-    0x0,
-    0x0,
-    0x3bbc0000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0xdde00000,
-    0x1,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0xde000000,
-    0x1d,
-    0x0,
-    0x0,
-    0xeef0,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] =
-{
-    0x0,
-    0x0,
-    0x100000,
-    0x1000000,
-    0x0,
-    0x0,
-    0x2000,
-    0x100100,
-    0x4002002,
-    0x10010040,
-    0x400400,
-    0x10008008,
-    0x40040100,
-    0x1001000,
-    0x40040020,
-    0x100100,
-    0x4002002,
-    0x80080040,
-    0x200200,
-    0x2002000,
-    0x80040040,
-    0x200800,
-    0x4004002,
-    0x80080,
-    0x401001,
-    0x2001004,
-    0x40040020,
-    0x800800,
-    0x2002,
-    0x0,
-    0x0,
-    0x40,
-    0x400,
-    0x0,
-    0x80000000,
-    0x4000000,
-    0x80080040,
-    0x1001000,
-    0x10004004,
-    0x200100,
-    0x4004002,
-    0x40010010,
-    0x800400,
-    0x4010010,
-    0x80080040,
-    0x1001000,
-    0x8020020,
-    0x80000080,
-    0x1000800,
-    0x20020010,
-    0x80080,
-    0x2001001,
-    0x40040020,
-    0x40100100,
-    0x800800,
-    0x20010010,
-    0x80080200,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xff77f77c,
-    0xddfeefee,
-    0x77f77ddf,
-    0x7,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xddf00000,
-    0xbfbbfddf,
-    0xf77f77fb,
-    0x1ddfdd,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde000,
-    0x0,
-    0x0,
-    0x7778000,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0x3bbc0000,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0x1dde,
-    0x0,
-    0x0,
-    0x7778,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0x0,
-    0xeef0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0xeef0000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x40,
-    0x0,
-    0x0,
-    0x0,
-    0x2000000,
-    0x0,
-    0x0,
-    0x8000000,
-    0x0,
-    0x0,
-    0x20000008,
-    0x0,
-    0x0,
-    0x40000,
-    0x0,
-    0x0,
-    0x40000000,
-    0x0,
-    0x0,
-    0x80000000,
-    0x0,
-    0x0,
-    0x0,
-    0x400,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1000000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x800,
-    0x0,
-    0x0,
-    0x2000,
-    0x0,
-    0x200000,
-    0x8000,
-    0x0,
-    0x0,
-    0x10,
-    0x0,
-    0x0,
-    0x10000,
-    0x0,
-    0x0,
-    0x20000,
-    0x0,
-    0x0,
-    0x10000000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] =
-{
-    0x1e,
-    0x400000,
-    0x1dd8000,
-    0x3ddcafe0,
-    0x0,
-    0x8000,
-    0xc003bb00,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xddfddf77,
-    0xff77f77d,
-    0xddfeefee,
-    0x77f77ddf,
-    0xfddfddff,
-    0x77f77fbb,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xefeeff77,
-    0x7fbbfbbe,
-    0xfbbfbbe5,
-    0xeff77f77,
-    0xbfbbeefe,
-    0xf77f77fb,
-    0xdfeefeef,
-    0x7f77ddfd,
-    0xfbbfddf7,
-    0x77f77fbb,
-    0xbeefeeff,
-    0x1bbbfb,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfddfddf0,
-    0x77f77fbb,
-    0x1ddfddf,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77c00000,
-    0xfeeff77f,
-    0xf77ddfdd,
-    0x777,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0xf0000000,
-    0xee,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0xeef,
-    0x0,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0x3bbc000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0x3bbc0000,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x1dd,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbe000000,
-    0xf77fbbfb,
-    0xefeeff77,
-    0x3bbfbbe,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xefeef800,
-    0xfddfddfe,
-    0xeefbbfbb,
-    0xeef,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0xeef00,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0xeef0000,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x1dd,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x0,
-    0x1dde00,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] =
-{
-    0x0,
-    0x400000,
-    0x0,
-    0x80,
-    0x0,
-    0x8000,
-    0x0,
-    0x8004004,
-    0x140080,
-    0x400001,
-    0x20010010,
-    0x500200,
-    0x1000004,
-    0x80040040,
-    0x1001400,
-    0x8004000,
-    0x100080,
-    0x2002801,
-    0x4008000,
-    0x80080,
-    0x2801001,
-    0x8000020,
-    0x100100,
-    0x5002002,
-    0x10000040,
-    0x80080000,
-    0x1001000,
-    0x20028,
-    0x80,
-    0x0,
-    0x100,
-    0x2000000,
-    0x0,
-    0x0,
-    0x2,
-    0x100000,
-    0x2002001,
-    0x40050,
-    0x400100,
-    0x8008004,
-    0x100140,
-    0x1000400,
-    0x50020010,
-    0x400,
-    0x2002001,
-    0xa0040040,
-    0x800,
-    0x2001002,
-    0x40040020,
-    0x800a00,
-    0x4002000,
-    0x80080040,
-    0x1001400,
-    0x4000,
-    0x40020020,
-    0xa00400,
-    0x2000008,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0xaf00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x78000000,
-    0x5,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x2,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x15e000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x8800,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x40000000,
-    0x4,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x20000000,
-    0x2,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x110000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x40020,
-    0x0,
-    0x0,
-    0x40000000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x800000,
-    0x10,
-    0x0,
-    0x0,
-    0x10000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] =
-{
-    0x18,
-    0x400000,
-    0x1dd8000,
-    0x3ddcafe0,
-    0x0,
-    0x8000,
-    0x4003bb00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x600000,
-    0x0,
-    0x100,
-    0xbf800776,
-    0xf772,
-    0x0,
-    0xec000002,
-    0x1000e,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xddfddf77,
-    0xff77f77d,
-    0xddfeefee,
-    0x77f77ddf,
-    0xfddfddff,
-    0x77f77fbb,
-    0xbfddfddf,
-    0xf77fbbfb,
-    0xefeeff77,
-    0x7fbbfbbe,
-    0xfbbfbbe5,
-    0xeff77f77,
-    0xbfbbeefe,
-    0xf77f77fb,
-    0xdfeefeef,
-    0x7f77ddfd,
-    0xfbbfddf7,
-    0x77f77fbb,
-    0xbeefeeff,
-    0x3bbfb,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf77e0000,
-    0xefeeff77,
-    0x7ddfddfe,
-    0xddf777f7,
-    0xbfbbfddf,
-    0xf77f77fb,
-    0x77fddfdd,
-    0xfeeff77f,
-    0xf77ddfdd,
-    0xefeeff77,
-    0xfddfddfe,
-    0xeefbbfbb,
-    0xef95feef,
-    0xfddfeefe,
-    0xbbfbbfdd,
-    0xdfeefeef,
-    0xfbbfddfd,
-    0x77f77fbb,
-    0x77ddfddf,
-    0xfeefeeff,
-    0xbbfddfdd,
-    0xefeefbbf,
-    0xe,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] =
-{
-    0x0,
-    0x0,
-    0x400000,
-    0x4000000,
-    0x0,
-    0x0,
-    0x8000,
-    0x400400,
-    0x10008008,
-    0x40040100,
-    0x1001000,
-    0x40020020,
-    0x100400,
-    0x4004001,
-    0x100080,
-    0x400401,
-    0x10008008,
-    0x200100,
-    0x800802,
-    0x8008000,
-    0x100100,
-    0x802002,
-    0x10010008,
-    0x200200,
-    0x1004004,
-    0x8004010,
-    0x100080,
-    0x2002001,
-    0x8008,
-    0x0,
-    0x0,
-    0x100,
-    0x1000,
-    0x0,
-    0x0,
-    0x10000002,
-    0x200100,
-    0x4004002,
-    0x40010010,
-    0x800400,
-    0x10010008,
-    0x40040,
-    0x2001001,
-    0x10040040,
-    0x200100,
-    0x4004002,
-    0x20080080,
-    0x200,
-    0x4002002,
-    0x80080040,
-    0x200200,
-    0x8004004,
-    0x100080,
-    0x400401,
-    0x2002001,
-    0x80040040,
-    0x200800,
-    0x2,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbbfbbe0,
-    0xeff77f77,
-    0xbfbbeefe,
-    0x3b,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xef800000,
-    0xfddfeefe,
-    0xbbfbbfdd,
-    0xeefeef,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0xdde00000,
-    0x1,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0xde000000,
-    0x1d,
-    0x0,
-    0x0,
-    0xeef0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0x77780,
-    0x0,
-    0xe0000000,
-    0x1dd,
-    0x0,
-    0xc0000000,
-    0x3bb,
-    0x0,
-    0x0,
-    0x3bbc00,
-    0x0,
-    0x0,
-    0x777800,
-    0x0,
-    0x0,
-    0xbbc00000,
-    0x3,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf77f77c0,
-    0xdfeefeef,
-    0x7f77ddfd,
-    0x77,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdf000000,
-    0xfbbfddfd,
-    0x77f77fbb,
-    0x1ddfddf,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0x1dde,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0xef000000,
-    0xe,
-    0x0,
-    0x0,
-    0xeef0,
-    0x0,
-    0x0,
-    0x1dde0,
-    0x0,
-    0x0,
-    0xeef0000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1dde0000,
-    0x0,
-    0x0,
-    0x77780000,
-    0x0,
-    0x0,
-    0x1dde00,
-    0x0,
-    0x0,
-    0x3bbc00,
-    0x0,
-    0x0,
-    0xbbc00000,
-    0x3,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0x0,
-    0x3bbc,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] =
-{
-    0x0,
-    0x0,
-    0x58000,
-    0x580e00,
-    0x0,
-    0x0,
-    0xb00,
-    0xb0058058,
-    0x1600b00,
-    0x5805816,
-    0xc0160160,
-    0x5802c02,
-    0x16016058,
-    0x580580,
-    0x1601600b,
-    0xb0058058,
-    0x1600b00,
-    0x2c02c016,
-    0x700b00b0,
-    0xb00b00,
-    0x2c016016,
-    0xb00b02c0,
-    0x1601600,
-    0x5802c02c,
-    0x60160580,
-    0xb00581,
-    0x1601600b,
-    0xb02c02c0,
-    0xb00,
-    0x0,
-    0x0,
-    0x38000016,
-    0x160,
-    0x0,
-    0x2c000000,
-    0x1600000,
-    0x2c02c016,
-    0x60580580,
-    0x5801601,
-    0xb00b0058,
-    0x81601600,
-    0x16005805,
-    0x802c0160,
-    0x1605805,
-    0x2c02c016,
-    0x580580,
-    0x2c0b00b,
-    0x2c01c02c,
-    0x805802c0,
-    0xb00b005,
-    0x5802c02c,
-    0xb00580,
-    0x1601600b,
-    0x16058058,
-    0x802c02c0,
-    0xb005805,
-    0x2c02c0b0,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] =
-{
-    0x0,
-    0x0,
-    0x50000,
-    0x500c00,
-    0x0,
-    0x0,
-    0xa00,
-    0xa0050050,
-    0x1400a00,
-    0x5005014,
-    0x80140140,
-    0x5002802,
-    0x14014050,
-    0x500500,
-    0x1401400a,
-    0xa0050050,
-    0x1400a00,
-    0x28028014,
-    0x600a00a0,
-    0xa00a00,
-    0x28014014,
-    0xa00a0280,
-    0x1401400,
-    0x50028028,
-    0x40140500,
-    0xa00501,
-    0x1401400a,
-    0xa0280280,
-    0xa00,
-    0x0,
-    0x0,
-    0x30000014,
-    0x140,
-    0x0,
-    0x28000000,
-    0x1400000,
-    0x28028014,
-    0x40500500,
-    0x5001401,
-    0xa00a0050,
-    0x1401400,
-    0x14005005,
-    0x280140,
-    0x1405005,
-    0x28028014,
-    0x500500,
-    0x280a00a,
-    0x28018028,
-    0x500280,
-    0xa00a005,
-    0x50028028,
-    0xa00500,
-    0x1401400a,
-    0x14050050,
-    0x280280,
-    0xa005005,
-    0x280280a0,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] =
-{
-    0x0,
-    0x0,
-    0xd80000,
-    0xd80a000,
-    0x0,
-    0x0,
-    0x1b000,
-    0xd80d80,
-    0x3601b01b,
-    0xd80d8360,
-    0x3603600,
-    0xd806c06c,
-    0x60360d80,
-    0xd80d803,
-    0x603601b0,
-    0xd80d83,
-    0x3601b01b,
-    0xc06c0360,
-    0x1b01b06,
-    0x1b01b005,
-    0xc0360360,
-    0x1b06c06,
-    0x3603601b,
-    0x806c06c0,
-    0x360d80d,
-    0x1b00d836,
-    0x603601b0,
-    0x6c06c03,
-    0x1b01b,
-    0x0,
-    0x0,
-    0x80000360,
-    0x3602,
-    0x0,
-    0xc0000000,
-    0x36000006,
-    0xc06c0360,
-    0xd80d806,
-    0xd8036036,
-    0x1b00d80,
-    0x3603601b,
-    0x600d80d8,
-    0x6c03603,
-    0x360d80d8,
-    0xc06c0360,
-    0xd80d806,
-    0x6c1b01b0,
-    0xc01406c0,
-    0xd806c06,
-    0xb01b00d8,
-    0x806c06c1,
-    0x1b00d80d,
-    0x603601b0,
-    0x60d80d83,
-    0x6c06c03,
-    0xb00d80d8,
-    0xc06c1b01,
-    0x6,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x100000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] =
-{
-    0x0,
-    0x0,
-    0x1000000,
-    0x10000000,
-    0x0,
-    0x0,
-    0x20000,
-    0x1001000,
-    0x40020020,
-    0x100400,
-    0x4004001,
-    0x80080,
-    0x401001,
-    0x10010004,
-    0x400200,
-    0x1001004,
-    0x40020020,
-    0x800400,
-    0x2002008,
-    0x20020000,
-    0x400400,
-    0x2008008,
-    0x40040020,
-    0x800800,
-    0x4010010,
-    0x20010040,
-    0x400200,
-    0x8008004,
-    0x20020,
-    0x0,
-    0x0,
-    0x400,
-    0x4000,
-    0x0,
-    0x0,
-    0x40000008,
-    0x800400,
-    0x10010008,
-    0x40040,
-    0x2001001,
-    0x40040020,
-    0x100100,
-    0x8004004,
-    0x40100100,
-    0x800400,
-    0x10010008,
-    0x80200200,
-    0x800,
-    0x10008008,
-    0x200100,
-    0x800802,
-    0x20010010,
-    0x400200,
-    0x1001004,
-    0x8008004,
-    0x100100,
-    0x802002,
-    0x8,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] =
-{
-    0x0,
-    0x0,
-    0x840000,
-    0x8400000,
-    0x0,
-    0x0,
-    0x10800,
-    0x80840840,
-    0x21010810,
-    0x84084210,
-    0x2102100,
-    0x84042042,
-    0x10210840,
-    0x8408402,
-    0x10210108,
-    0x80840842,
-    0x21010810,
-    0x20420210,
-    0x1081084,
-    0x10810800,
-    0x20210210,
-    0x81084204,
-    0x21021010,
-    0x40420420,
-    0x2108408,
-    0x10808421,
-    0x10210108,
-    0x84204202,
-    0x10810,
-    0x0,
-    0x0,
-    0x210,
-    0x2100,
-    0x0,
-    0x20000000,
-    0x21000004,
-    0x20420210,
-    0x8408404,
-    0x84021021,
-    0x81080840,
-    0x21021010,
-    0x10084084,
-    0x4202102,
-    0x21084084,
-    0x20420210,
-    0x8408404,
-    0x42108108,
-    0x20000420,
-    0x8404204,
-    0x8108084,
-    0x40420421,
-    0x10808408,
-    0x10210108,
-    0x10840842,
-    0x4204202,
-    0x8084084,
-    0x20421081,
-    0x4,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x20000000,
-    0x0,
-    0x8000,
-    0x4003bb00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfbbe0000,
-    0x77f77fbb,
-    0xbeefeeff,
-    0x3bbfb,
-    0x0,
-    0x0,
-    0x0,
-    0x8000,
-    0x0,
-    0xec000002,
-    0x1000e,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfeefeef8,
-    0xbbfddfdd,
-    0xefeefbbf,
-    0xe,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xdde00000,
-    0x1,
-    0x0,
-    0x77800000,
-    0x7,
-    0x0,
-    0x1dde000,
-    0x0,
-    0x0,
-    0x3bbc000,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x3b,
-    0x0,
-    0x78000000,
-    0x77,
-    0x0,
-    0x0,
-    0x3bbc0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x77780,
-    0x0,
-    0x0,
-    0x1dde00,
-    0x0,
-    0x80000000,
-    0x777,
-    0x0,
-    0x0,
-    0xeef,
-    0x0,
-    0x0,
-    0xeef000,
-    0x0,
-    0x0,
-    0x1dde000,
-    0x0,
-    0x0,
-    0xef000000,
-    0xe,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] =
-{
-    0xcc066330,
-    0x66330198,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] =
-{
-    0x10088440,
-    0x88440221,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[3] =
-{
-    0xff800000,
-    0xffffffff,
-    0x7,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[3] =
-{
-    0x0,
-    0xffffe000,
-    0x7,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[3] =
-{
-    0xe01f0f80,
-    0xf0f807c3,
-    0x1,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[3] =
-{
-    0xfffffffe,
-    0xffffffff,
-    0x7,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[3] =
-{
-    0x3ff000,
-    0xff000ffc,
-    0x3,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[3] =
-{
-    0x88744a20,
-    0x44a21d12,
-    0x7,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[15] =
-{
-    0x10,
-    0x0,
-    0x40,
-    0x1efd80,
-    0x20,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xeff7ef80,
-    0xdfefdff7,
-    0xbfdfbfef,
-    0xeff7efdf,
-    0xf7,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[37] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf7ef00,
-    0x0,
-    0x0,
-    0x0,
-    0x3dfbc00,
-    0x0,
-    0x0,
-    0x0,
-    0xf7ef000,
-    0x0,
-    0x0,
-    0x0,
-    0xf0000000,
-    0xf7e,
-    0x0,
-    0x0,
-    0x0,
-    0xf7ef000,
-    0x0,
-    0x0,
-    0x0,
-    0x1efde000,
-    0x0,
-    0x0,
-    0x0,
-    0xf0000000,
-    0xf7e,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[41] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x1000,
-    0x0,
-    0x8000000,
-    0x0,
-    0x0,
-    0x0,
-    0x1000,
-    0x80008000,
-    0x10000,
-    0x20001,
-    0x80008002,
-    0x20000,
-    0x40002,
-    0x80004,
-    0x20008,
-    0x80002,
-    0x100008,
-    0x200020,
-    0x80008,
-    0x0,
-    0x80008,
-    0x100010,
-    0x200020,
-    0x80008,
-    0x80000,
-    0x100008,
-    0x200010,
-    0x80020,
-    0x100008,
-    0x200010,
-    0x400020,
-    0x100040,
-    0x40010,
-    0x80008,
-    0x100010,
-    0x200020,
-    0x80008,
-    0x44444440,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x2000,
-    0x0,
-    0x10000000,
-    0x0,
-    0x0,
-    0x0,
-    0x2000,
-    0x10000,
-    0x20001,
-    0x40002,
-    0x10004,
-    0x40001,
-    0x80004,
-    0x100008,
-    0x40010,
-    0x100004,
-    0x200010,
-    0x400040,
-    0x100010,
-    0x0,
-    0x100010,
-    0x200020,
-    0x400040,
-    0x100010,
-    0x100000,
-    0x200010,
-    0x400020,
-    0x100040,
-    0x200010,
-    0x400020,
-    0x800040,
-    0x200080,
-    0x80020,
-    0x100010,
-    0x200020,
-    0x400040,
-    0x100010,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[19] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbfdfbe00,
-    0x7fbf7fdf,
-    0xff7effbf,
-    0xbfdfbf7e,
-    0x3df,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[37] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xef000000,
-    0xf7,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x3df,
-    0x0,
-    0x0,
-    0xf0000000,
-    0xf7e,
-    0x0,
-    0x0,
-    0x0,
-    0xf7ef000,
-    0x0,
-    0x0,
-    0x0,
-    0xf0000000,
-    0xf7e,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x1efd,
-    0x0,
-    0x0,
-    0x0,
-    0xf7ef000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[37] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x40,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x100,
-    0x0,
-    0x0,
-    0x0,
-    0x400,
-    0x0,
-    0x0,
-    0x400,
-    0x1000,
-    0x0,
-    0x0,
-    0x0,
-    0x10000000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1000,
-    0x0,
-    0x0,
-    0x0,
-    0x2000,
-    0x0,
-    0x0,
-    0x0,
-    0x10000000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[42] =
-{
-    0x1e,
-    0x0,
-    0x40,
-    0x1efd80,
-    0xffffffe0,
-    0x7ee217ff,
-    0x1f,
-    0x0,
-    0x40,
-    0x1efd80,
-    0xeff7efe0,
-    0xdfefdff7,
-    0xbfdfbfef,
-    0xeff7efdf,
-    0xbfdfbef7,
-    0x7fbf7fdf,
-    0xff7effbf,
-    0xbfdfbf7e,
-    0xff7effdf,
-    0xfefdff7e,
-    0xfdfbfdfb,
-    0xff7eff7e,
-    0xffffffff,
-    0xff7eff7e,
-    0xfefdfefd,
-    0xfdfbfdfb,
-    0xff7eff7e,
-    0xff7ef885,
-    0xfefdff7e,
-    0xfdfbfefd,
-    0xff7efdfb,
-    0xfefdff7e,
-    0xfdfbfefd,
-    0xfbf7fdfb,
-    0xfefdfbf7,
-    0xffbf7efd,
-    0xff7eff7e,
-    0xfefdfefd,
-    0xfdfbfdfb,
-    0xef7eff7e,
-    0xffffffff,
-    0x7,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[22] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xff7ef800,
-    0xfefdff7e,
-    0xfdfbfdfb,
-    0xf7eff7e,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1efde00,
-    0x0,
-    0x0,
-    0x0,
-    0x7bf7800,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x1efd,
-    0x0,
-    0x0,
-    0x0,
-    0x1efde000,
-    0x0,
-    0x0,
-    0x0,
-    0x3dfbc000,
-    0x0,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x1efd,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0xc000,
-    0x0,
-    0x60000000,
-    0x0,
-    0x0,
-    0x0,
-    0xc000,
-    0x60000,
-    0xc0006,
-    0x18000c,
-    0x60018,
-    0x180006,
-    0x300018,
-    0x600030,
-    0x180060,
-    0x600018,
-    0xc00060,
-    0x1800180,
-    0x600060,
-    0x0,
-    0x600060,
-    0xc000c0,
-    0x1800180,
-    0x600060,
-    0x600000,
-    0xc00060,
-    0x18000c0,
-    0x600180,
-    0xc00060,
-    0x18000c0,
-    0x3000180,
-    0xc00300,
-    0x3000c0,
-    0x600060,
-    0xc000c0,
-    0x1800180,
-    0x600060,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[23] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xffffff80,
-    0x3f,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf0000000,
-    0x7ffffff,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[23] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1fffe00,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xc0000000,
-    0x3fff,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[23] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfe03fc00,
-    0x1,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0x3fc07f,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[23] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x999b3000,
-    0x31,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x6333366,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[23] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xe1e3c000,
-    0x3d,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x7bc3c78,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[27] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf8000000,
-    0xff7eff7e,
-    0xfefdfefd,
-    0xfdfbfdfb,
-    0xf7eff7e,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[38] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xde000000,
-    0x1ef,
-    0x0,
-    0x0,
-    0x78000000,
-    0x7bf,
-    0x0,
-    0x0,
-    0x1efde000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x1efde000,
-    0x0,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x1efd,
-    0x0,
-    0x0,
-    0xc0000000,
-    0x3dfb,
-    0x0,
-    0x0,
-    0x0,
-    0x1efde000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[40] =
-{
-    0x0,
-    0x0,
-    0x40,
-    0x0,
-    0x0,
-    0x40,
-    0x0,
-    0x0,
-    0x40,
-    0x0,
-    0x2000200,
-    0x4000400,
-    0x8000a00,
-    0x2000000,
-    0x8000800,
-    0x10001000,
-    0x20002800,
-    0x8000000,
-    0x20002000,
-    0xa0004000,
-    0x8000,
-    0x2000,
-    0x20000000,
-    0x40002000,
-    0xa0004000,
-    0x8000,
-    0x10002000,
-    0x20002000,
-    0x40004000,
-    0x8000a000,
-    0x20000000,
-    0x40004000,
-    0x80008000,
-    0x14000,
-    0x40000001,
-    0x20000000,
-    0x40002000,
-    0xa0004000,
-    0x8000,
-    0x2000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[28] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x21780,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x85,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[28] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x20400,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x81,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[11] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x20,
-    0x200000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x20,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x8000,
-    0x0,
-    0x40000000,
-    0x0,
-    0x0,
-    0x0,
-    0x8000,
-    0x40000,
-    0x80004,
-    0x100008,
-    0x40010,
-    0x100004,
-    0x200010,
-    0x400020,
-    0x100040,
-    0x400010,
-    0x800040,
-    0x1000100,
-    0x400040,
-    0x0,
-    0x400040,
-    0x800080,
-    0x1000100,
-    0x400040,
-    0x400000,
-    0x800040,
-    0x1000080,
-    0x400100,
-    0x800040,
-    0x1000080,
-    0x2000100,
-    0x800200,
-    0x200080,
-    0x400040,
-    0x800080,
-    0x1000100,
-    0x400040,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[11] =
-{
-    0x18,
-    0x0,
-    0x40,
-    0x1efd80,
-    0xffffffe0,
-    0x7ee217ff,
-    0x1f,
-    0x0,
-    0x40,
-    0x1efd80,
-    0x20,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xeff7efc0,
-    0xdfefdff7,
-    0xbfdfbfef,
-    0xeff7efdf,
-    0xbfdfbef7,
-    0x7fbf7fdf,
-    0xff7effbf,
-    0xbfdfbf7e,
-    0xff7effdf,
-    0xfefdff7e,
-    0xfdfbfdfb,
-    0xff7eff7e,
-    0xffffffff,
-    0xff7eff7e,
-    0xfefdfefd,
-    0xfdfbfdfb,
-    0xff7eff7e,
-    0xff7ef885,
-    0xfefdff7e,
-    0xfdfbfefd,
-    0xff7efdfb,
-    0xfefdff7e,
-    0xfdfbfefd,
-    0xfbf7fdfb,
-    0xfefdfbf7,
-    0xffbf7efd,
-    0xff7eff7e,
-    0xfefdfefd,
-    0xfdfbfdfb,
-    0xf7eff7e,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[41] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xe0000000,
-    0xffffffff,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[41] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xc0000000,
-    0xfffffff,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[41] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x80000000,
-    0xffffff,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[41] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfffff,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[41] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfffe,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[41] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xffc,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[41] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf8,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[41] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x66666660,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[41] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x88888880,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[42] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x20000,
-    0x0,
-    0x0,
-    0x1,
-    0x0,
-    0x0,
-    0x20000,
-    0x100000,
-    0x200010,
-    0x400020,
-    0x100040,
-    0x400010,
-    0x800040,
-    0x1000080,
-    0x400100,
-    0x1000040,
-    0x2000100,
-    0x4000400,
-    0x1000100,
-    0x0,
-    0x1000100,
-    0x2000200,
-    0x4000400,
-    0x1000100,
-    0x1000000,
-    0x2000100,
-    0x4000200,
-    0x1000400,
-    0x2000100,
-    0x4000200,
-    0x8000400,
-    0x2000800,
-    0x800200,
-    0x1000100,
-    0x2000200,
-    0x4000400,
-    0x1000100,
-    0x0,
-    0x1,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[32] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xff7ef800,
-    0xfefdff7e,
-    0xfdfbfefd,
-    0xff7efdfb,
-    0xf7e,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3dfbc00,
-    0x0,
-    0x0,
-    0x0,
-    0xf7ef000,
-    0x0,
-    0x0,
-    0xc0000000,
-    0x3dfb,
-    0x0,
-    0x0,
-    0x0,
-    0xc0000000,
-    0x3dfb,
-    0x0,
-    0x0,
-    0x0,
-    0x3dfbc000,
-    0x0,
-    0x0,
-    0x0,
-    0x7bf78000,
-    0x0,
-    0x0,
-    0x0,
-    0xc0000000,
-    0x3dfb,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[42] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x2,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[36] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xfefdf000,
-    0xfdfbfefd,
-    0xfbf7fdfb,
-    0xfefdfbf7,
-    0x1efd,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[39] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x3df,
-    0x0,
-    0x0,
-    0xf0000000,
-    0xf7e,
-    0x0,
-    0x0,
-    0x3dfbc000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x3dfbc000,
-    0x0,
-    0x0,
-    0x0,
-    0xc0000000,
-    0x3dfb,
-    0x0,
-    0x0,
-    0x80000000,
-    0x7bf7,
-    0x0,
-    0x0,
-    0x0,
-    0x3dfbc000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x580,
-    0x0,
-    0x2c00700,
-    0x0,
-    0x0,
-    0x0,
-    0x580,
-    0x2c002c00,
-    0x58005800,
-    0xb000b000,
-    0x2c002c00,
-    0xb000b000,
-    0x60016000,
-    0xc002c001,
-    0xb000b002,
-    0xc002c000,
-    0x58002,
-    0xc00b000b,
-    0x2c002,
-    0xc0000000,
-    0x8002c002,
-    0x58005,
-    0xc00b000b,
-    0xc002c002,
-    0xc002c001,
-    0x80058002,
-    0xb0005,
-    0xc002c00b,
-    0x80058002,
-    0xb0005,
-    0x16000b,
-    0x80058016,
-    0xc0016005,
-    0x8002c002,
-    0x58005,
-    0xc00b000b,
-    0x2c002,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x500,
-    0x0,
-    0x2800600,
-    0x0,
-    0x0,
-    0x0,
-    0x500,
-    0x28002800,
-    0x50005000,
-    0xa000a000,
-    0x28002800,
-    0xa000a000,
-    0x40014000,
-    0x80028001,
-    0xa000a002,
-    0x80028000,
-    0x50002,
-    0x800a000a,
-    0x28002,
-    0x80000000,
-    0x28002,
-    0x50005,
-    0x800a000a,
-    0x80028002,
-    0x80028001,
-    0x50002,
-    0xa0005,
-    0x8002800a,
-    0x50002,
-    0xa0005,
-    0x14000a,
-    0x50014,
-    0x80014005,
-    0x28002,
-    0x50005,
-    0x800a000a,
-    0x28002,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0xef800,
-    0x0,
-    0x7c021000,
-    0x7,
-    0x0,
-    0x0,
-    0xef800,
-    0xc077c000,
-    0x80ef8077,
-    0x1df00ef,
-    0xc077c1df,
-    0x1df0077,
-    0x3be01df,
-    0x77c03be,
-    0x1df077c,
-    0x77c01df,
-    0xef8077c,
-    0x1df01df0,
-    0x77c077c,
-    0x0,
-    0x77c077c,
-    0xef80ef8,
-    0x1df01df0,
-    0x77c077c,
-    0x77c0084,
-    0xef8077c,
-    0x1df00ef8,
-    0x77c1df0,
-    0xef8077c,
-    0x1df00ef8,
-    0x3be01df0,
-    0xef83be0,
-    0x3be0ef8,
-    0x77c077c,
-    0xef80ef8,
-    0x1df01df0,
-    0x77c077c,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[42] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x4,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x100000,
-    0x0,
-    0x0,
-    0x8,
-    0x0,
-    0x0,
-    0x100000,
-    0x800000,
-    0x1000080,
-    0x2000100,
-    0x800200,
-    0x2000080,
-    0x4000200,
-    0x8000400,
-    0x2000800,
-    0x8000200,
-    0x10000800,
-    0x20002000,
-    0x8000800,
-    0x0,
-    0x8000800,
-    0x10001000,
-    0x20002000,
-    0x8000800,
-    0x8000000,
-    0x10000800,
-    0x20001000,
-    0x8002000,
-    0x10000800,
-    0x20001000,
-    0x40002000,
-    0x10004000,
-    0x4001000,
-    0x8000800,
-    0x10001000,
-    0x20002000,
-    0x8000800,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x40400,
-    0x0,
-    0x2000000,
-    0x2,
-    0x0,
-    0x0,
-    0x40400,
-    0x20202000,
-    0x40404020,
-    0x80808040,
-    0x20202080,
-    0x80808020,
-    0x1010080,
-    0x2020101,
-    0x80808202,
-    0x2020080,
-    0x4040202,
-    0x8080808,
-    0x2020202,
-    0x0,
-    0x2020202,
-    0x4040404,
-    0x8080808,
-    0x2020202,
-    0x2020000,
-    0x4040202,
-    0x8080404,
-    0x2020808,
-    0x4040202,
-    0x8080404,
-    0x10100808,
-    0x4041010,
-    0x1010404,
-    0x2020202,
-    0x4040404,
-    0x8080808,
-    0x2020202,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x80000,
-    0x0,
-    0x0,
-    0x4,
-    0x0,
-    0x0,
-    0x80000,
-    0x400000,
-    0x800040,
-    0x1000080,
-    0x400100,
-    0x1000040,
-    0x2000100,
-    0x4000200,
-    0x1000400,
-    0x4000100,
-    0x8000400,
-    0x10001000,
-    0x4000400,
-    0x0,
-    0x4000400,
-    0x8000800,
-    0x10001000,
-    0x4000400,
-    0x4000000,
-    0x8000400,
-    0x10000800,
-    0x4001000,
-    0x8000400,
-    0x10000800,
-    0x20001000,
-    0x8002000,
-    0x2000800,
-    0x4000400,
-    0x8000800,
-    0x10001000,
-    0x4000400,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x10,
-    0x0,
-    0x40,
-    0x1efd80,
-    0x20,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf8000000,
-    0xff7eff7e,
-    0xfefdfefd,
-    0xfdfbfdfb,
-    0xf7eff7e,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[40] =
-{
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xef000000,
-    0xf7,
-    0x0,
-    0x0,
-    0xbc000000,
-    0x3df,
-    0x0,
-    0x0,
-    0xf7ef000,
-    0x0,
-    0x0,
-    0x0,
-    0x0,
-    0xf7ef000,
-    0x0,
-    0x0,
-    0x0,
-    0xf0000000,
-    0xf7e,
-    0x0,
-    0x0,
-    0xe0000000,
-    0x1efd,
-    0x0,
-    0x0,
-    0x0,
-    0xf7ef000,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
-{
-    0x4,
-};
-
-static uint32_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
-{
-    0x8,
-};
-
-
-static bcmpkt_rxpmd_match_id_db_t
-bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_COUNT] = {
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_CNTAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x7c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x10000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DCN",
-        .match        = 0x810,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0xc004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x18000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
-        .match        = 0x30,
-        .match_mask   = 0x438,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
-        .match        = 0x40000,
-        .match_mask   = 0x40000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 18,
-        .minbit       = 18,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x80,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x44000,
-        .match_mask   = 0x5c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x40020,
-        .match_mask   = 0x40020,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x4004,
-        .match_mask   = 0x7c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x20000,
-        .match_mask   = 0x20000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 17,
-        .minbit       = 17,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
-        .match        = 0x400,
-        .match_mask   = 0x400,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 10,
-        .minbit       = 10,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
-        .match        = 0x402,
-        .match_mask   = 0x402,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
-        .match        = 0x404,
-        .match_mask   = 0x404,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
-        .match        = 0x408,
-        .match_mask   = 0x408,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
-        .match        = 0x410,
-        .match_mask   = 0x410,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
-        .match        = 0x420,
-        .match_mask   = 0x420,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
-        .match        = 0x440,
-        .match_mask   = 0x440,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x480,
-        .match_mask   = 0x480,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
-        .match        = 0x500,
-        .match_mask   = 0x500,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7ffff,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 18,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x1c000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
-        .match        = 0x8000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x8004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0xc000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3818,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
-        .match        = 0x2010,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x14000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
-        .name         = "EGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x7c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x10000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN",
-        .match        = 0x810,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0xc004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x18000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
-        .match        = 0x30,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
-        .match        = 0x40000,
-        .match_mask   = 0x40000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 18,
-        .minbit       = 18,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x80,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x44000,
-        .match_mask   = 0x5c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x40020,
-        .match_mask   = 0x40020,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x4004,
-        .match_mask   = 0x7c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x20000,
-        .match_mask   = 0x20000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 17,
-        .minbit       = 17,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
-        .match        = 0x400,
-        .match_mask   = 0x400,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 10,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
-        .match        = 0x402,
-        .match_mask   = 0x402,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
-        .match        = 0x404,
-        .match_mask   = 0x404,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
-        .match        = 0x408,
-        .match_mask   = 0x408,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
-        .match        = 0x410,
-        .match_mask   = 0x410,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
-        .match        = 0x420,
-        .match_mask   = 0x420,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
-        .match        = 0x440,
-        .match_mask   = 0x440,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x480,
-        .match_mask   = 0x480,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
-        .match        = 0x500,
-        .match_mask   = 0x500,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7ffff,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 18,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x1c000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
-        .match        = 0x8000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x8004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0xc000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3818,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
-        .match        = 0x2010,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x14000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_CNTAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 36,
-        .match_minbit = 29,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 36,
-        .pminbit      = 29,
-        .zone_minbit  = 20,
-        .arc_id_mask  = 0x1f00000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x7c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x10000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 55,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0xc004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 42,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 55,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 55,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 29,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x18000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 45,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 56,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x4004,
-        .match_mask   = 0x7c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 48,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 56,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x20000,
-        .match_mask   = 0x20000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 17,
-        .minbit       = 17,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 48,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 48,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7ffff,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 18,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x1c000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 51,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
-        .match        = 0x8000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 29,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x8004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 54,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 57,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0xc000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 29,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3818,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x14000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 55,
-        .match_minbit = 37,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 55,
-        .pminbit      = 37,
-        .zone_minbit  = 25,
-        .arc_id_mask  = 0xffe000000,
-        .num_zone_bmp_words = 58,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_CNTAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 2,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 2,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 3,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 3,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 3,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 3,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 3,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-        .zone_minbit  = 2,
-        .arc_id_mask  = 0x1fc,
-        .num_zone_bmp_words = 3,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
-        .match        = 0x4000,
-        .match_mask   = 0x7c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x10000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 15,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x140,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 41,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DCN",
-        .match        = 0x810,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1",
-        .match        = 0xc004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 19,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2",
-        .match        = 0x200,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x8,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x40,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 42,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x18000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 22,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x240,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x9,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
-        .match        = 0x30,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
-        .match        = 0x40000,
-        .match_mask   = 0x40000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 18,
-        .minbit       = 18,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 23,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x80,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 23,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
-        .match        = 0x1800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 23,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x44000,
-        .match_mask   = 0x5c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 23,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x40020,
-        .match_mask   = 0x40020,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 23,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
-        .match        = 0x4004,
-        .match_mask   = 0x7c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 27,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
-        .match        = 0xc0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
-        .match        = 0x800,
-        .match_mask   = 0x3818,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x20000,
-        .match_mask   = 0x20000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 17,
-        .minbit       = 17,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 28,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE",
-        .match        = 0x24000,
-        .match_mask   = 0x3c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 28,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
-        .match        = 0x100,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 11,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E",
-        .match        = 0x1000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
-        .match        = 0x2,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 11,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
-        .match        = 0x4,
-        .match_mask   = 0x406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
-        .match        = 0x400,
-        .match_mask   = 0x400,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 10,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 41,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
-        .match        = 0x402,
-        .match_mask   = 0x402,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 41,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
-        .match        = 0x404,
-        .match_mask   = 0x404,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 41,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
-        .match        = 0x408,
-        .match_mask   = 0x408,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 41,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
-        .match        = 0x410,
-        .match_mask   = 0x410,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 41,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
-        .match        = 0x420,
-        .match_mask   = 0x420,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 41,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
-        .match        = 0x440,
-        .match_mask   = 0x440,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 41,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x480,
-        .match_mask   = 0x480,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 41,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
-        .match        = 0x500,
-        .match_mask   = 0x500,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 41,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7ffff,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 18,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 42,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1",
-        .match        = 0x1c000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 32,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2",
-        .match        = 0x280,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0xa,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
-        .match        = 0x8000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 42,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1",
-        .match        = 0x8004,
-        .match_mask   = 0x1c406,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2",
-        .match        = 0x1c0,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x8,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x28,
-        .match_mask   = 0x438,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
-        .match        = 0x10,
-        .match_mask   = 0x418,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0xc000,
-        .match_mask   = 0x1c006,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x3,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 42,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3818,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
-        .match        = 0x2010,
-        .match_mask   = 0x3c18,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1",
-        .match        = 0x14000,
-        .match_mask   = 0x1c000,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 16,
-        .minbit       = 14,
-        .value        = 0x5,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2",
-        .match        = 0x180,
-        .match_mask   = 0x7c0,
-        .match_maxbit = 28,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 6,
-        .value        = 0x6,
-        .pmaxbit      = 28,
-        .pminbit      = 10,
-        .zone_minbit  = 9,
-        .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 40,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-        .num_zone_bmp_words = 1,
-        .zone_bmp = bcm78800_a0_dna_6_5_31_5_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
-
-    },
-    {
-        /* BCM78800_A0_DNA_6_5_31_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
-        .name         = "INGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-        .zone_minbit  = 0,
-        .arc_id_mask  = 0x3,
-
-    },
-};
-
-static bcmpkt_rxpmd_match_id_db_info_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db_info = {
-    .num_entries = 225,
-    .db = bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db
-};
-bcmpkt_rxpmd_match_id_db_info_t * bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db_info_get(void) {
-    return &bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_db_info;
-}
-
-static shr_enum_map_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_rxpmd_match_id_map_info_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map_info = {
-    .num_entries = 225,
-    .map = bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map
-};
-
-bcmpkt_rxpmd_match_id_map_info_t * bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map_info_get(void) {
-    return &bcm78800_a0_dna_6_5_31_5_0_rxpmd_match_id_map_info;
-}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_pkt_flexhdr.c
deleted file mode 100644
index d82ee212b8b..00000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_pkt_flexhdr.c
+++ /dev/null
@@ -1,10359 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml
- * for device bcm78800_a0 and variant dna_6_5_31_5_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * Copyright 2018-2024 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#include <sal/sal_types.h>
-#include <shr/shr_error.h>
-#include <bcmpkt/bcmpkt_flexhdr.h>
-#include <bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_31_5_0/bcm78800_a0_dna_6_5_31_5_0_bcmpkt_rxpmd_flex_data.h>
-
-#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
-#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
-#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
-#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
-
-static void bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
-{
-    uint32_t *reason = data + 0;
-
-    if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
-    }
-    if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
-    }
-    if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
-    }
-    if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
-    }
-    if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
-    }
-    if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
-    }
-    if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
-    }
-    if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
-    }
-    if (reason[13] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
-    }
-    if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
-    }
-    if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
-    }
-    if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
-    }
-    if (reason[13] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
-    }
-    if (reason[13] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
-    }
-    if (reason[13] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
-    }
-    if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
-    }
-    if (reason[13] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
-    }
-    if (reason[13] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
-    }
-    if (reason[13] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
-    }
-    if (reason[13] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
-    }
-    if (reason[13] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[13] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[13] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
-    }
-    if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
-    }
-    if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
-    }
-    if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
-    }
-    if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
-    }
-    if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
-    }
-    if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
-    }
-    if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
-    }
-    if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6);
-    }
-    if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
-    }
-    if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
-    }
-}
-
-static void bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
-{
-    uint32_t *reason = data + 0;
-
-    reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
-        reason[13] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
-        reason[13] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
-        reason[13] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
-        reason[13] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
-        reason[13] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
-        reason[13] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
-        reason[13] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
-        reason[13] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 15);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
-        reason[13] |= (0x1 << 16);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
-        reason[13] |= (0x1 << 17);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
-        reason[13] |= (0x1 << 18);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
-        reason[13] |= (0x1 << 19);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
-        reason[13] |= (0x1 << 20);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
-        reason[13] |= (0x1 << 21);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
-        reason[13] |= (0x1 << 22);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
-        reason[13] |= (0x1 << 23);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
-        reason[13] |= (0x1 << 24);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
-        reason[13] |= (0x1 << 25);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
-        reason[13] |= (0x1 << 26);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 27);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
-        reason[13] |= (0x1 << 28);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[13] |= (0x1 << 29);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[13] |= (0x1 << 30);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
-        reason[13] |= (0x1 << 31);
-    }
-    reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
-        reason[12] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
-        reason[12] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
-        reason[12] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
-        reason[12] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
-        reason[12] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
-        reason[12] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
-        reason[12] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
-        reason[12] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU)) {
-        reason[12] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
-        reason[12] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
-        reason[12] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) {
-        reason[12] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
-        reason[12] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
-        reason[12] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
-        reason[12] |= (0x1 << 15);
-    }
-}
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_field_data[] = {
-    {
-        .name = "ALLOW_NAT_3_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 412, 415 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-            { 412, 415 }, /* Profile 5. */
-            { 412, 415 }, /* Profile 6. */
-            { 412, 415 }, /* Profile 7. */
-            { 412, 415 }, /* Profile 8. */
-            { 412, 415 }, /* Profile 9. */
-            { 408, 411 }, /* Profile 10. */
-            { 408, 411 }, /* Profile 11. */
-            { 408, 411 }, /* Profile 12. */
-            { 412, 415 }, /* Profile 13. */
-            { 412, 415 }, /* Profile 14. */
-            { 412, 415 }, /* Profile 15. */
-            { 412, 415 }, /* Profile 16. */
-            { 412, 415 }, /* Profile 17. */
-            { 412, 415 }, /* Profile 18. */
-            { 412, 415 }, /* Profile 19. */
-            { 412, 415 }, /* Profile 20. */
-            { 408, 411 }, /* Profile 21. */
-            { 408, 411 }, /* Profile 22. */
-            { 408, 411 }, /* Profile 23. */
-            { 412, 415 }, /* Profile 24. */
-            { 412, 415 }, /* Profile 25. */
-            { 412, 415 }, /* Profile 26. */
-            { 412, 415 }, /* Profile 27. */
-            { 412, 415 }, /* Profile 28. */
-            { 412, 415 }, /* Profile 29. */
-            { 412, 415 }, /* Profile 30. */
-            { 412, 415 }, /* Profile 31. */
-            { 408, 411 }, /* Profile 32. */
-            { 408, 411 }, /* Profile 33. */
-            { 408, 411 }, /* Profile 34. */
-            { 412, 415 }, /* Profile 35. */
-            { 412, 415 }, /* Profile 36. */
-            { 412, 415 }, /* Profile 37. */
-            { 412, 415 }, /* Profile 38. */
-            { 412, 415 }, /* Profile 39. */
-            { 412, 415 }, /* Profile 40. */
-            { 412, 415 }, /* Profile 41. */
-            { 412, 415 }, /* Profile 42. */
-            { 408, 411 }, /* Profile 43. */
-            { 408, 411 }, /* Profile 44. */
-            { 408, 411 }, /* Profile 45. */
-        },
-        .profile_cnt = 46,
-    },
-    {
-        .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { -1, -1 }, /* Profile 12. */
-            { 256, 271 }, /* Profile 13. */
-            { 256, 271 }, /* Profile 14. */
-            { 256, 271 }, /* Profile 15. */
-            { 256, 271 }, /* Profile 16. */
-            { 256, 271 }, /* Profile 17. */
-            { 256, 271 }, /* Profile 18. */
-            { 256, 271 }, /* Profile 19. */
-            { 256, 271 }, /* Profile 20. */
-            { 256, 271 }, /* Profile 21. */
-            { 256, 271 }, /* Profile 22. */
-            { 256, 271 }, /* Profile 23. */
-            { -1, -1 }, /* Profile 24. */
-            { -1, -1 }, /* Profile 25. */
-            { -1, -1 }, /* Profile 26. */
-            { -1, -1 }, /* Profile 27. */
-            { -1, -1 }, /* Profile 28. */
-            { -1, -1 }, /* Profile 29. */
-            { -1, -1 }, /* Profile 30. */
-            { -1, -1 }, /* Profile 31. */
-            { -1, -1 }, /* Profile 32. */
-            { -1, -1 }, /* Profile 33. */
-            { -1, -1 }, /* Profile 34. */
-            { 272, 287 }, /* Profile 35. */
-            { 272, 287 }, /* Profile 36. */
-            { 272, 287 }, /* Profile 37. */
-            { 272, 287 }, /* Profile 38. */
-            { 272, 287 }, /* Profile 39. */
-            { 272, 287 }, /* Profile 40. */
-            { 272, 287 }, /* Profile 41. */
-            { 272, 287 }, /* Profile 42. */
-            { 272, 287 }, /* Profile 43. */
-            { 272, 287 }, /* Profile 44. */
-            { 272, 287 }, /* Profile 45. */
-        },
-        .profile_cnt = 46,
-    },
-    {
-        .name = "DNAT_CTRL_3_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { 372, 375 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { 372, 375 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { 368, 371 }, /* Profile 11. */
-            { -1, -1 }, /* Profile 12. */
-            { -1, -1 }, /* Profile 13. */
-            { 372, 375 }, /* Profile 14. */
-            { -1, -1 }, /* Profile 15. */
-            { -1, -1 }, /* Profile 16. */
-            { -1, -1 }, /* Profile 17. */
-            { 372, 375 }, /* Profile 18. */
-            { -1, -1 }, /* Profile 19. */
-            { -1, -1 }, /* Profile 20. */
-            { -1, -1 }, /* Profile 21. */
-            { 368, 371 }, /* Profile 22. */
-            { -1, -1 }, /* Profile 23. */
-            { -1, -1 }, /* Profile 24. */
-            { 372, 375 }, /* Profile 25. */
-            { -1, -1 }, /* Profile 26. */
-            { -1, -1 }, /* Profile 27. */
-            { -1, -1 }, /* Profile 28. */
-            { 372, 375 }, /* Profile 29. */
-            { -1, -1 }, /* Profile 30. */
-            { -1, -1 }, /* Profile 31. */
-            { -1, -1 }, /* Profile 32. */
-            { 368, 371 }, /* Profile 33. */
-            { -1, -1 }, /* Profile 34. */
-            { -1, -1 }, /* Profile 35. */
-            { 372, 375 }, /* Profile 36. */
-            { -1, -1 }, /* Profile 37. */
-            { -1, -1 }, /* Profile 38. */
-            { -1, -1 }, /* Profile 39. */
-            { 372, 375 }, /* Profile 40. */
-            { -1, -1 }, /* Profile 41. */
-            { -1, -1 }, /* Profile 42. */
-            { -1, -1 }, /* Profile 43. */
-            { 368, 371 }, /* Profile 44. */
-        },
-        .profile_cnt = 45,
-    },
-    {
-        .name = "DROP_CODE_15_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 48, 63 }, /* Profile 2. */
-            { 48, 63 }, /* Profile 3. */
-            { 48, 63 }, /* Profile 4. */
-            { 48, 63 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { 48, 63 }, /* Profile 10. */
-            { 48, 63 }, /* Profile 11. */
-            { 48, 63 }, /* Profile 12. */
-            { 48, 63 }, /* Profile 13. */
-            { 48, 63 }, /* Profile 14. */
-            { 48, 63 }, /* Profile 15. */
-            { 48, 63 }, /* Profile 16. */
-            { -1, -1 }, /* Profile 17. */
-            { -1, -1 }, /* Profile 18. */
-            { -1, -1 }, /* Profile 19. */
-            { -1, -1 }, /* Profile 20. */
-            { 48, 63 }, /* Profile 21. */
-            { 48, 63 }, /* Profile 22. */
-            { 48, 63 }, /* Profile 23. */
-            { 48, 63 }, /* Profile 24. */
-            { 48, 63 }, /* Profile 25. */
-            { 48, 63 }, /* Profile 26. */
-            { 48, 63 }, /* Profile 27. */
-            { -1, -1 }, /* Profile 28. */
-            { -1, -1 }, /* Profile 29. */
-            { -1, -1 }, /* Profile 30. */
-            { -1, -1 }, /* Profile 31. */
-            { 48, 63 }, /* Profile 32. */
-            { 48, 63 }, /* Profile 33. */
-            { 48, 63 }, /* Profile 34. */
-            { 48, 63 }, /* Profile 35. */
-            { 48, 63 }, /* Profile 36. */
-            { 48, 63 }, /* Profile 37. */
-            { 48, 63 }, /* Profile 38. */
-            { -1, -1 }, /* Profile 39. */
-            { -1, -1 }, /* Profile 40. */
-            { -1, -1 }, /* Profile 41. */
-            { -1, -1 }, /* Profile 42. */
-            { 48, 63 }, /* Profile 43. */
-            { 48, 63 }, /* Profile 44. */
-            { 48, 63 }, /* Profile 45. */
-        },
-        .profile_cnt = 46,
-    },
-    {
-        .name = "DVP_15_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 160, 175 }, /* Profile 2. */
-            { 160, 175 }, /* Profile 3. */
-            { 160, 175 }, /* Profile 4. */
-            { 160, 175 }, /* Profile 5. */
-            { 160, 175 }, /* Profile 6. */
-            { 160, 175 }, /* Profile 7. */
-            { 160, 175 }, /* Profile 8. */
-            { 160, 175 }, /* Profile 9. */
-            { 160, 175 }, /* Profile 10. */
-            { 160, 175 }, /* Profile 11. */
-            { 160, 175 }, /* Profile 12. */
-            { 160, 175 }, /* Profile 13. */
-            { 160, 175 }, /* Profile 14. */
-            { 160, 175 }, /* Profile 15. */
-            { 160, 175 }, /* Profile 16. */
-            { 160, 175 }, /* Profile 17. */
-            { 160, 175 }, /* Profile 18. */
-            { 160, 175 }, /* Profile 19. */
-            { 160, 175 }, /* Profile 20. */
-            { 160, 175 }, /* Profile 21. */
-            { 160, 175 }, /* Profile 22. */
-            { 160, 175 }, /* Profile 23. */
-            { 176, 191 }, /* Profile 24. */
-            { 176, 191 }, /* Profile 25. */
-            { 176, 191 }, /* Profile 26. */
-            { 176, 191 }, /* Profile 27. */
-            { 176, 191 }, /* Profile 28. */
-            { 176, 191 }, /* Profile 29. */
-            { 176, 191 }, /* Profile 30. */
-            { 176, 191 }, /* Profile 31. */
-            { 176, 191 }, /* Profile 32. */
-            { 176, 191 }, /* Profile 33. */
-            { 176, 191 }, /* Profile 34. */
-            { 176, 191 }, /* Profile 35. */
-            { 176, 191 }, /* Profile 36. */
-            { 176, 191 }, /* Profile 37. */
-            { 176, 191 }, /* Profile 38. */
-            { 176, 191 }, /* Profile 39. */
-            { 176, 191 }, /* Profile 40. */
-            { 176, 191 }, /* Profile 41. */
-            { 176, 191 }, /* Profile 42. */
-            { 176, 191 }, /* Profile 43. */
-            { 176, 191 }, /* Profile 44. */
-            { 176, 191 }, /* Profile 45. */
-        },
-        .profile_cnt = 46,
-    },
-    {
-        .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 80, 95 }, /* Profile 2. */
-            { 80, 95 }, /* Profile 3. */
-            { 80, 95 }, /* Profile 4. */
-            { 80, 95 }, /* Profile 5. */
-            { 80, 95 }, /* Profile 6. */
-            { 80, 95 }, /* Profile 7. */
-            { 80, 95 }, /* Profile 8. */
-            { 80, 95 }, /* Profile 9. */
-            { 80, 95 }, /* Profile 10. */
-            { 80, 95 }, /* Profile 11. */
-            { 80, 95 }, /* Profile 12. */
-            { 80, 95 }, /* Profile 13. */
-            { 80, 95 }, /* Profile 14. */
-            { 80, 95 }, /* Profile 15. */
-            { 80, 95 }, /* Profile 16. */
-            { 80, 95 }, /* Profile 17. */
-            { 80, 95 }, /* Profile 18. */
-            { 80, 95 }, /* Profile 19. */
-            { 80, 95 }, /* Profile 20. */
-            { 80, 95 }, /* Profile 21. */
-            { 80, 95 }, /* Profile 22. */
-            { 80, 95 }, /* Profile 23. */
-            { 80, 95 }, /* Profile 24. */
-            { 80, 95 }, /* Profile 25. */
-            { 80, 95 }, /* Profile 26. */
-            { 80, 95 }, /* Profile 27. */
-            { 80, 95 }, /* Profile 28. */
-            { 80, 95 }, /* Profile 29. */
-            { 80, 95 }, /* Profile 30. */
-            { 80, 95 }, /* Profile 31. */
-            { 80, 95 }, /* Profile 32. */
-            { 80, 95 }, /* Profile 33. */
-            { 80, 95 }, /* Profile 34. */
-            { 80, 95 }, /* Profile 35. */
-            { 80, 95 }, /* Profile 36. */
-            { 80, 95 }, /* Profile 37. */
-            { 80, 95 }, /* Profile 38. */
-            { 80, 95 }, /* Profile 39. */
-            { 80, 95 }, /* Profile 40. */
-            { 80, 95 }, /* Profile 41. */
-            { 80, 95 }, /* Profile 42. */
-            { 80, 95 }, /* Profile 43. */
-            { 80, 95 }, /* Profile 44. */
-            { 80, 95 }, /* Profile 45. */
-        },
-        .profile_cnt = 46,
-    },
-    {
-        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 256, 271 }, /* Profile 2. */
-            { 256, 271 }, /* Profile 3. */
-            { 256, 271 }, /* Profile 4. */
-            { 256, 271 }, /* Profile 5. */
-            { 256, 271 }, /* Profile 6. */
-            { 256, 271 }, /* Profile 7. */
-            { 256, 271 }, /* Profile 8. */
-            { 256, 271 }, /* Profile 9. */
-            { 256, 271 }, /* Profile 10. */
-            { 256, 271 }, /* Profile 11. */
-            { 256, 271 }, /* Profile 12. */
-            { -1, -1 }, /* Profile 13. */
-            { -1, -1 }, /* Profile 14. */
-            { -1, -1 }, /* Profile 15. */
-            { -1, -1 }, /* Profile 16. */
-            { -1, -1 }, /* Profile 17. */
-            { -1, -1 }, /* Profile 18. */
-            { -1, -1 }, /* Profile 19. */
-            { -1, -1 }, /* Profile 20. */
-            { -1, -1 }, /* Profile 21. */
-            { -1, -1 }, /* Profile 22. */
-            { -1, -1 }, /* Profile 23. */
-            { 272, 287 }, /* Profile 24. */
-            { 272, 287 }, /* Profile 25. */
-            { 272, 287 }, /* Profile 26. */
-            { 272, 287 }, /* Profile 27. */
-            { 272, 287 }, /* Profile 28. */
-            { 272, 287 }, /* Profile 29. */
-            { 272, 287 }, /* Profile 30. */
-            { 272, 287 }, /* Profile 31. */
-            { 272, 287 }, /* Profile 32. */
-            { 272, 287 }, /* Profile 33. */
-            { 272, 287 }, /* Profile 34. */
-        },
-        .profile_cnt = 35,
-    },
-    {
-        .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 380, 383 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 380, 383 }, /* Profile 4. */
-            { 380, 383 }, /* Profile 5. */
-            { 380, 383 }, /* Profile 6. */
-            { 384, 387 }, /* Profile 7. */
-            { 380, 383 }, /* Profile 8. */
-            { 380, 383 }, /* Profile 9. */
-            { 376, 379 }, /* Profile 10. */
-            { 380, 383 }, /* Profile 11. */
-            { 376, 379 }, /* Profile 12. */
-            { 380, 383 }, /* Profile 13. */
-            { 384, 387 }, /* Profile 14. */
-            { 380, 383 }, /* Profile 15. */
-            { 380, 383 }, /* Profile 16. */
-            { 380, 383 }, /* Profile 17. */
-            { 384, 387 }, /* Profile 18. */
-            { 380, 383 }, /* Profile 19. */
-            { 380, 383 }, /* Profile 20. */
-            { 376, 379 }, /* Profile 21. */
-            { 380, 383 }, /* Profile 22. */
-            { 376, 379 }, /* Profile 23. */
-            { 380, 383 }, /* Profile 24. */
-            { 384, 387 }, /* Profile 25. */
-            { 380, 383 }, /* Profile 26. */
-            { 380, 383 }, /* Profile 27. */
-            { 380, 383 }, /* Profile 28. */
-            { 384, 387 }, /* Profile 29. */
-            { 380, 383 }, /* Profile 30. */
-            { 380, 383 }, /* Profile 31. */
-            { 376, 379 }, /* Profile 32. */
-            { 380, 383 }, /* Profile 33. */
-            { 376, 379 }, /* Profile 34. */
-            { 380, 383 }, /* Profile 35. */
-            { 384, 387 }, /* Profile 36. */
-            { 380, 383 }, /* Profile 37. */
-            { 380, 383 }, /* Profile 38. */
-            { 380, 383 }, /* Profile 39. */
-            { 384, 387 }, /* Profile 40. */
-            { 380, 383 }, /* Profile 41. */
-            { 380, 383 }, /* Profile 42. */
-            { 376, 379 }, /* Profile 43. */
-            { 380, 383 }, /* Profile 44. */
-            { 376, 379 }, /* Profile 45. */
-        },
-        .profile_cnt = 46,
-    },
-    {
-        .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 96, 111 }, /* Profile 2. */
-            { 96, 111 }, /* Profile 3. */
-            { 96, 111 }, /* Profile 4. */
-            { 96, 111 }, /* Profile 5. */
-            { 96, 111 }, /* Profile 6. */
-            { 96, 111 }, /* Profile 7. */
-            { 96, 111 }, /* Profile 8. */
-            { 96, 111 }, /* Profile 9. */
-            { 96, 111 }, /* Profile 10. */
-            { 96, 111 }, /* Profile 11. */
-            { 96, 111 }, /* Profile 12. */
-            { 96, 111 }, /* Profile 13. */
-            { 96, 111 }, /* Profile 14. */
-            { 96, 111 }, /* Profile 15. */
-            { 96, 111 }, /* Profile 16. */
-            { 96, 111 }, /* Profile 17. */
-            { 96, 111 }, /* Profile 18. */
-            { 96, 111 }, /* Profile 19. */
-            { 96, 111 }, /* Profile 20. */
-            { 96, 111 }, /* Profile 21. */
-            { 96, 111 }, /* Profile 22. */
-            { 96, 111 }, /* Profile 23. */
-            { 96, 111 }, /* Profile 24. */
-            { 96, 111 }, /* Profile 25. */
-            { 96, 111 }, /* Profile 26. */
-            { 96, 111 }, /* Profile 27. */
-            { 96, 111 }, /* Profile 28. */
-            { 96, 111 }, /* Profile 29. */
-            { 96, 111 }, /* Profile 30. */
-            { 96, 111 }, /* Profile 31. */
-            { 96, 111 }, /* Profile 32. */
-            { 96, 111 }, /* Profile 33. */
-            { 96, 111 }, /* Profile 34. */
-            { 96, 111 }, /* Profile 35. */
-            { 96, 111 }, /* Profile 36. */
-            { 96, 111 }, /* Profile 37. */
-            { 96, 111 }, /* Profile 38. */
-            { 96, 111 }, /* Profile 39. */
-            { 96, 111 }, /* Profile 40. */
-            { 96, 111 }, /* Profile 41. */
-            { 96, 111 }, /* Profile 42. */
-            { 96, 111 }, /* Profile 43. */
-            { 96, 111 }, /* Profile 44. */
-            { 96, 111 }, /* Profile 45. */
-        },
-        .profile_cnt = 46,
-    },
-    {
-        .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { 48, 63 }, /* Profile 6. */
-            { 48, 63 }, /* Profile 7. */
-            { 48, 63 }, /* Profile 8. */
-            { 48, 63 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { -1, -1 }, /* Profile 12. */
-            { -1, -1 }, /* Profile 13. */
-            { -1, -1 }, /* Profile 14. */
-            { -1, -1 }, /* Profile 15. */
-            { -1, -1 }, /* Profile 16. */
-            { 48, 63 }, /* Profile 17. */
-            { 48, 63 }, /* Profile 18. */
-            { 48, 63 }, /* Profile 19. */
-            { 48, 63 }, /* Profile 20. */
-            { -1, -1 }, /* Profile 21. */
-            { -1, -1 }, /* Profile 22. */
-            { -1, -1 }, /* Profile 23. */
-            { -1, -1 }, /* Profile 24. */
-            { -1, -1 }, /* Profile 25. */
-            { -1, -1 }, /* Profile 26. */
-            { -1, -1 }, /* Profile 27. */
-            { 48, 63 }, /* Profile 28. */
-            { 48, 63 }, /* Profile 29. */
-            { 48, 63 }, /* Profile 30. */
-            { 48, 63 }, /* Profile 31. */
-            { -1, -1 }, /* Profile 32. */
-            { -1, -1 }, /* Profile 33. */
-            { -1, -1 }, /* Profile 34. */
-            { -1, -1 }, /* Profile 35. */
-            { -1, -1 }, /* Profile 36. */
-            { -1, -1 }, /* Profile 37. */
-            { -1, -1 }, /* Profile 38. */
-            { 48, 63 }, /* Profile 39. */
-            { 48, 63 }, /* Profile 40. */
-            { 48, 63 }, /* Profile 41. */
-            { 48, 63 }, /* Profile 42. */
-        },
-        .profile_cnt = 43,
-    },
-    {
-        .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 368, 371 }, /* Profile 2. */
-            { 368, 371 }, /* Profile 3. */
-            { 368, 371 }, /* Profile 4. */
-            { 368, 371 }, /* Profile 5. */
-            { 368, 371 }, /* Profile 6. */
-            { 368, 371 }, /* Profile 7. */
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-            { -1, -1 }, /* Profile 29. */
-            { 408, 411 }, /* Profile 30. */
-            { 408, 411 }, /* Profile 31. */
-            { -1, -1 }, /* Profile 32. */
-            { -1, -1 }, /* Profile 33. */
-            { 404, 407 }, /* Profile 34. */
-            { -1, -1 }, /* Profile 35. */
-            { -1, -1 }, /* Profile 36. */
-            { 408, 411 }, /* Profile 37. */
-            { 408, 411 }, /* Profile 38. */
-            { -1, -1 }, /* Profile 39. */
-            { -1, -1 }, /* Profile 40. */
-            { 408, 411 }, /* Profile 41. */
-            { 408, 411 }, /* Profile 42. */
-            { -1, -1 }, /* Profile 43. */
-            { -1, -1 }, /* Profile 44. */
-            { 404, 407 }, /* Profile 45. */
-        },
-        .profile_cnt = 46,
-    },
-    {
-        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 408, 411 }, /* Profile 2. */
-            { 408, 411 }, /* Profile 3. */
-            { 404, 407 }, /* Profile 4. */
-            { 404, 407 }, /* Profile 5. */
-            { 408, 411 }, /* Profile 6. */
-            { 408, 411 }, /* Profile 7. */
-            { 404, 407 }, /* Profile 8. */
-            { 404, 407 }, /* Profile 9. */
-            { 404, 407 }, /* Profile 10. */
-            { 404, 407 }, /* Profile 11. */
-            { 400, 403 }, /* Profile 12. */
-            { 408, 411 }, /* Profile 13. */
-            { 408, 411 }, /* Profile 14. */
-            { 404, 407 }, /* Profile 15. */
-            { 404, 407 }, /* Profile 16. */
-            { 408, 411 }, /* Profile 17. */
-            { 408, 411 }, /* Profile 18. */
-            { 404, 407 }, /* Profile 19. */
-            { 404, 407 }, /* Profile 20. */
-            { 404, 407 }, /* Profile 21. */
-            { 404, 407 }, /* Profile 22. */
-            { 400, 403 }, /* Profile 23. */
-            { 408, 411 }, /* Profile 24. */
-            { 408, 411 }, /* Profile 25. */
-            { 404, 407 }, /* Profile 26. */
-            { 404, 407 }, /* Profile 27. */
-            { 408, 411 }, /* Profile 28. */
-            { 408, 411 }, /* Profile 29. */
-            { 404, 407 }, /* Profile 30. */
-            { 404, 407 }, /* Profile 31. */
-            { 404, 407 }, /* Profile 32. */
-            { 404, 407 }, /* Profile 33. */
-            { 400, 403 }, /* Profile 34. */
-            { 408, 411 }, /* Profile 35. */
-            { 408, 411 }, /* Profile 36. */
-            { 404, 407 }, /* Profile 37. */
-            { 404, 407 }, /* Profile 38. */
-            { 408, 411 }, /* Profile 39. */
-            { 408, 411 }, /* Profile 40. */
-            { 404, 407 }, /* Profile 41. */
-            { 404, 407 }, /* Profile 42. */
-            { 404, 407 }, /* Profile 43. */
-            { 404, 407 }, /* Profile 44. */
-            { 400, 403 }, /* Profile 45. */
-        },
-        .profile_cnt = 46,
-    },
-    {
-        .name = "VFI_15_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 128, 143 }, /* Profile 2. */
-            { 128, 143 }, /* Profile 3. */
-            { 128, 143 }, /* Profile 4. */
-            { 128, 143 }, /* Profile 5. */
-            { 128, 143 }, /* Profile 6. */
-            { 128, 143 }, /* Profile 7. */
-            { 128, 143 }, /* Profile 8. */
-            { 128, 143 }, /* Profile 9. */
-            { 128, 143 }, /* Profile 10. */
-            { 128, 143 }, /* Profile 11. */
-            { 128, 143 }, /* Profile 12. */
-            { 128, 143 }, /* Profile 13. */
-            { 128, 143 }, /* Profile 14. */
-            { 128, 143 }, /* Profile 15. */
-            { 128, 143 }, /* Profile 16. */
-            { 128, 143 }, /* Profile 17. */
-            { 128, 143 }, /* Profile 18. */
-            { 128, 143 }, /* Profile 19. */
-            { 128, 143 }, /* Profile 20. */
-            { 128, 143 }, /* Profile 21. */
-            { 128, 143 }, /* Profile 22. */
-            { 128, 143 }, /* Profile 23. */
-            { 128, 143 }, /* Profile 24. */
-            { 128, 143 }, /* Profile 25. */
-            { 128, 143 }, /* Profile 26. */
-            { 128, 143 }, /* Profile 27. */
-            { 128, 143 }, /* Profile 28. */
-            { 128, 143 }, /* Profile 29. */
-            { 128, 143 }, /* Profile 30. */
-            { 128, 143 }, /* Profile 31. */
-            { 128, 143 }, /* Profile 32. */
-            { 128, 143 }, /* Profile 33. */
-            { 128, 143 }, /* Profile 34. */
-            { 128, 143 }, /* Profile 35. */
-            { 128, 143 }, /* Profile 36. */
-            { 128, 143 }, /* Profile 37. */
-            { 128, 143 }, /* Profile 38. */
-            { 128, 143 }, /* Profile 39. */
-            { 128, 143 }, /* Profile 40. */
-            { 128, 143 }, /* Profile 41. */
-            { 128, 143 }, /* Profile 42. */
-            { 128, 143 }, /* Profile 43. */
-            { 128, 143 }, /* Profile 44. */
-            { 128, 143 }, /* Profile 45. */
-        },
-        .profile_cnt = 46,
-    },
-    {
-        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
-        .fid = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 372, 375 }, /* Profile 2. */
-            { 376, 379 }, /* Profile 3. */
-            { 372, 375 }, /* Profile 4. */
-            { 372, 375 }, /* Profile 5. */
-            { 372, 375 }, /* Profile 6. */
-            { 376, 379 }, /* Profile 7. */
-            { 372, 375 }, /* Profile 8. */
-            { 372, 375 }, /* Profile 9. */
-            { 368, 371 }, /* Profile 10. */
-            { 372, 375 }, /* Profile 11. */
-            { 368, 371 }, /* Profile 12. */
-            { 372, 375 }, /* Profile 13. */
-            { 376, 379 }, /* Profile 14. */
-            { 372, 375 }, /* Profile 15. */
-            { 372, 375 }, /* Profile 16. */
-            { 372, 375 }, /* Profile 17. */
-            { 376, 379 }, /* Profile 18. */
-            { 372, 375 }, /* Profile 19. */
-            { 372, 375 }, /* Profile 20. */
-            { 368, 371 }, /* Profile 21. */
-            { 372, 375 }, /* Profile 22. */
-            { 368, 371 }, /* Profile 23. */
-            { 372, 375 }, /* Profile 24. */
-            { 376, 379 }, /* Profile 25. */
-            { 372, 375 }, /* Profile 26. */
-            { 372, 375 }, /* Profile 27. */
-            { 372, 375 }, /* Profile 28. */
-            { 376, 379 }, /* Profile 29. */
-            { 372, 375 }, /* Profile 30. */
-            { 372, 375 }, /* Profile 31. */
-            { 368, 371 }, /* Profile 32. */
-            { 372, 375 }, /* Profile 33. */
-            { 368, 371 }, /* Profile 34. */
-            { 372, 375 }, /* Profile 35. */
-            { 376, 379 }, /* Profile 36. */
-            { 372, 375 }, /* Profile 37. */
-            { 372, 375 }, /* Profile 38. */
-            { 372, 375 }, /* Profile 39. */
-            { 376, 379 }, /* Profile 40. */
-            { 372, 375 }, /* Profile 41. */
-            { 372, 375 }, /* Profile 42. */
-            { 368, 371 }, /* Profile 43. */
-            { 372, 375 }, /* Profile 44. */
-            { 368, 371 }, /* Profile 45. */
-        },
-        .profile_cnt = 46,
-    },
-};
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_field_data,
-    .profile_bmp_cnt = 2,
-    .profile_bmp[0] = 0xfffffffc,
-    .profile_bmp[1] = 0x3fff,
-
-};
-
-static shr_enum_map_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_names[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_reasons_info_t bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_names,
-    .reason_encode = bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_encode,
-    .reason_decode = bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reason_decode,
-};
-
-
-static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_arp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_get,
-    bcmpkt_arp_t_hardware_type_get,
-    bcmpkt_arp_t_operation_get,
-    bcmpkt_arp_t_prot_addr_len_get,
-    bcmpkt_arp_t_protocol_type_get,
-    bcmpkt_arp_t_sender_ha_get,
-    bcmpkt_arp_t_sender_ip_get,
-    bcmpkt_arp_t_target_ha_get,
-    bcmpkt_arp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_arp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_set,
-    bcmpkt_arp_t_hardware_type_set,
-    bcmpkt_arp_t_operation_set,
-    bcmpkt_arp_t_prot_addr_len_set,
-    bcmpkt_arp_t_protocol_type_set,
-    bcmpkt_arp_t_sender_ha_set,
-    bcmpkt_arp_t_sender_ip_set,
-    bcmpkt_arp_t_target_ha_set,
-    bcmpkt_arp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_arp_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_arp_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_arp_t_field_data,
-};
-
-
-static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_authen_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_get,
-    bcmpkt_authen_t_next_header_get,
-    bcmpkt_authen_t_payload_len_get,
-    bcmpkt_authen_t_reserved_get,
-    bcmpkt_authen_t_seq_num_get,
-    bcmpkt_authen_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_authen_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_set,
-    bcmpkt_authen_t_next_header_set,
-    bcmpkt_authen_t_payload_len_set,
-    bcmpkt_authen_t_reserved_set,
-    bcmpkt_authen_t_seq_num_set,
-    bcmpkt_authen_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_authen_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_authen_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_authen_t_field_data,
-};
-
-
-static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 18, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 18, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 17, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 17, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 5);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 5, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 21, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 21, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_bfd_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_get,
-    bcmpkt_bfd_t_bfd_length_get,
-    bcmpkt_bfd_t_cpi_get,
-    bcmpkt_bfd_t_dem_get,
-    bcmpkt_bfd_t_desmintxintv_get,
-    bcmpkt_bfd_t_detectmult_get,
-    bcmpkt_bfd_t_diag_get,
-    bcmpkt_bfd_t_fin_get,
-    bcmpkt_bfd_t_minechorxintv_get,
-    bcmpkt_bfd_t_mpt_get,
-    bcmpkt_bfd_t_mydiscrim_get,
-    bcmpkt_bfd_t_poll_get,
-    bcmpkt_bfd_t_reqminrxintv_get,
-    bcmpkt_bfd_t_sta_get,
-    bcmpkt_bfd_t_urdiscrim_get,
-    bcmpkt_bfd_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_bfd_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_set,
-    bcmpkt_bfd_t_bfd_length_set,
-    bcmpkt_bfd_t_cpi_set,
-    bcmpkt_bfd_t_dem_set,
-    bcmpkt_bfd_t_desmintxintv_set,
-    bcmpkt_bfd_t_detectmult_set,
-    bcmpkt_bfd_t_diag_set,
-    bcmpkt_bfd_t_fin_set,
-    bcmpkt_bfd_t_minechorxintv_set,
-    bcmpkt_bfd_t_mpt_set,
-    bcmpkt_bfd_t_mydiscrim_set,
-    bcmpkt_bfd_t_poll_set,
-    bcmpkt_bfd_t_reqminrxintv_set,
-    bcmpkt_bfd_t_sta_set,
-    bcmpkt_bfd_t_urdiscrim_set,
-    bcmpkt_bfd_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_bfd_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_bfd_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_bfd_t_field_data,
-};
-
-
-static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_cntag_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_get,
-    bcmpkt_cntag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_cntag_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_set,
-    bcmpkt_cntag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_cntag_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_cntag_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CNTAG_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_cntag_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_get,
-    bcmpkt_cpu_composites_0_t_dma_cont1_get,
-    bcmpkt_cpu_composites_0_t_dma_cont2_get,
-    bcmpkt_cpu_composites_0_t_dma_cont3_get,
-    bcmpkt_cpu_composites_0_t_dma_cont4_get,
-    bcmpkt_cpu_composites_0_t_dma_cont5_get,
-    bcmpkt_cpu_composites_0_t_dma_cont6_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_set,
-    bcmpkt_cpu_composites_0_t_dma_cont1_set,
-    bcmpkt_cpu_composites_0_t_dma_cont2_set,
-    bcmpkt_cpu_composites_0_t_dma_cont3_set,
-    bcmpkt_cpu_composites_0_t_dma_cont4_set,
-    bcmpkt_cpu_composites_0_t_dma_cont5_set,
-    bcmpkt_cpu_composites_0_t_dma_cont6_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_get,
-    bcmpkt_cpu_composites_1_t_dma_cont11_get,
-    bcmpkt_cpu_composites_1_t_dma_cont12_get,
-    bcmpkt_cpu_composites_1_t_dma_cont13_get,
-    bcmpkt_cpu_composites_1_t_dma_cont14_get,
-    bcmpkt_cpu_composites_1_t_dma_cont15_get,
-    bcmpkt_cpu_composites_1_t_dma_cont16_get,
-    bcmpkt_cpu_composites_1_t_dma_cont17_get,
-    bcmpkt_cpu_composites_1_t_dma_cont7_get,
-    bcmpkt_cpu_composites_1_t_dma_cont8_get,
-    bcmpkt_cpu_composites_1_t_dma_cont9_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_set,
-    bcmpkt_cpu_composites_1_t_dma_cont11_set,
-    bcmpkt_cpu_composites_1_t_dma_cont12_set,
-    bcmpkt_cpu_composites_1_t_dma_cont13_set,
-    bcmpkt_cpu_composites_1_t_dma_cont14_set,
-    bcmpkt_cpu_composites_1_t_dma_cont15_set,
-    bcmpkt_cpu_composites_1_t_dma_cont16_set,
-    bcmpkt_cpu_composites_1_t_dma_cont17_set,
-    bcmpkt_cpu_composites_1_t_dma_cont7_set,
-    bcmpkt_cpu_composites_1_t_dma_cont8_set,
-    bcmpkt_cpu_composites_1_t_dma_cont9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_dcn_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_reserved4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dcn_t_reserved4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_dcn_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FID_COUNT] = {
-    bcmpkt_dcn_t_flags_get,
-    bcmpkt_dcn_t_next_protocol_get,
-    bcmpkt_dcn_t_reserved0_get,
-    bcmpkt_dcn_t_reserved1_get,
-    bcmpkt_dcn_t_reserved2_get,
-    bcmpkt_dcn_t_reserved3_get,
-    bcmpkt_dcn_t_reserved4_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_dcn_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FID_COUNT] = {
-    bcmpkt_dcn_t_flags_set,
-    bcmpkt_dcn_t_next_protocol_set,
-    bcmpkt_dcn_t_reserved0_set,
-    bcmpkt_dcn_t_reserved1_set,
-    bcmpkt_dcn_t_reserved2_set,
-    bcmpkt_dcn_t_reserved3_set,
-    bcmpkt_dcn_t_reserved4_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_dcn_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_dcn_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DCN_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_dcn_t_field_data,
-};
-
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_dest_option_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_get,
-    bcmpkt_dest_option_t_next_header_get,
-    bcmpkt_dest_option_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_dest_option_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_set,
-    bcmpkt_dest_option_t_next_header_set,
-    bcmpkt_dest_option_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_dest_option_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_dest_option_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_dest_option_t_field_data,
-};
-
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_get,
-    bcmpkt_ep_nih_header_t_header_type_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
-    bcmpkt_ep_nih_header_t_opaque_object_a_get,
-    bcmpkt_ep_nih_header_t_opaque_object_b_get,
-    bcmpkt_ep_nih_header_t_opaque_object_c_get,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
-    bcmpkt_ep_nih_header_t_reserved_0_get,
-    bcmpkt_ep_nih_header_t_start_get,
-    bcmpkt_ep_nih_header_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_set,
-    bcmpkt_ep_nih_header_t_header_type_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
-    bcmpkt_ep_nih_header_t_opaque_object_a_set,
-    bcmpkt_ep_nih_header_t_opaque_object_b_set,
-    bcmpkt_ep_nih_header_t_opaque_object_c_set,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
-    bcmpkt_ep_nih_header_t_reserved_0_set,
-    bcmpkt_ep_nih_header_t_start_set,
-    bcmpkt_ep_nih_header_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 11, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 11, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 10, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 10, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_get,
-    bcmpkt_erspan3_fixed_hdr_t_cos_get,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
-    bcmpkt_erspan3_fixed_hdr_t_t_get,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
-    bcmpkt_erspan3_fixed_hdr_t_ver_get,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_set,
-    bcmpkt_erspan3_fixed_hdr_t_cos_set,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
-    bcmpkt_erspan3_fixed_hdr_t_t_set,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
-    bcmpkt_erspan3_fixed_hdr_t_ver_set,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
-    bcmpkt_erspan3_subhdr_5_t_port_id_get,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
-    bcmpkt_erspan3_subhdr_5_t_port_id_set,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_field_data,
-};
-
-
-static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_esp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_get,
-    bcmpkt_esp_t_pad_get,
-    bcmpkt_esp_t_pad_len_get,
-    bcmpkt_esp_t_seq_num_get,
-    bcmpkt_esp_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_esp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_set,
-    bcmpkt_esp_t_pad_set,
-    bcmpkt_esp_t_pad_len_set,
-    bcmpkt_esp_t_seq_num_set,
-    bcmpkt_esp_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_esp_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_esp_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_esp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ethertype_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ethertype_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ethertype_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ethertype_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_ethertype_t_field_data,
-};
-
-
-static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_frag_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_get,
-    bcmpkt_frag_t_id_get,
-    bcmpkt_frag_t_next_header_get,
-    bcmpkt_frag_t_reserved_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_frag_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_set,
-    bcmpkt_frag_t_id_set,
-    bcmpkt_frag_t_next_header_set,
-    bcmpkt_frag_t_reserved_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_frag_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_frag_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_frag_t_field_data,
-};
-
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
-    bcmpkt_gbp_ethernet_shim_t_ethertype_get,
-    bcmpkt_gbp_ethernet_shim_t_flags_get,
-    bcmpkt_gbp_ethernet_shim_t_reserved_get,
-    bcmpkt_gbp_ethernet_shim_t_sid_get,
-    bcmpkt_gbp_ethernet_shim_t_subtype_get,
-    bcmpkt_gbp_ethernet_shim_t_ver_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
-    bcmpkt_gbp_ethernet_shim_t_ethertype_set,
-    bcmpkt_gbp_ethernet_shim_t_flags_set,
-    bcmpkt_gbp_ethernet_shim_t_reserved_set,
-    bcmpkt_gbp_ethernet_shim_t_sid_set,
-    bcmpkt_gbp_ethernet_shim_t_subtype_set,
-    bcmpkt_gbp_ethernet_shim_t_ver_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_field_data,
-};
-
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 4, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 4, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_get,
-    bcmpkt_generic_loopback_t_destination_type_get,
-    bcmpkt_generic_loopback_t_entropy_obj_get,
-    bcmpkt_generic_loopback_t_flags_get,
-    bcmpkt_generic_loopback_t_header_type_get,
-    bcmpkt_generic_loopback_t_input_priority_get,
-    bcmpkt_generic_loopback_t_interface_ctrl_get,
-    bcmpkt_generic_loopback_t_interface_obj_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
-    bcmpkt_generic_loopback_t_qos_obj_get,
-    bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_source_system_port_get,
-    bcmpkt_generic_loopback_t_src_subport_num_get,
-    bcmpkt_generic_loopback_t_start_byte_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_set,
-    bcmpkt_generic_loopback_t_destination_type_set,
-    bcmpkt_generic_loopback_t_entropy_obj_set,
-    bcmpkt_generic_loopback_t_flags_set,
-    bcmpkt_generic_loopback_t_header_type_set,
-    bcmpkt_generic_loopback_t_input_priority_set,
-    bcmpkt_generic_loopback_t_interface_ctrl_set,
-    bcmpkt_generic_loopback_t_interface_obj_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
-    bcmpkt_generic_loopback_t_qos_obj_set,
-    bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_source_system_port_set,
-    bcmpkt_generic_loopback_t_src_subport_num_set,
-    bcmpkt_generic_loopback_t_start_byte_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_field_data,
-};
-
-
-static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gpe_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_get,
-    bcmpkt_gpe_t_next_protocol_get,
-    bcmpkt_gpe_t_reserved0_get,
-    bcmpkt_gpe_t_reserved1_get,
-    bcmpkt_gpe_t_vni_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gpe_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_set,
-    bcmpkt_gpe_t_next_protocol_set,
-    bcmpkt_gpe_t_reserved0_set,
-    bcmpkt_gpe_t_reserved1_set,
-    bcmpkt_gpe_t_vni_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gpe_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gpe_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_gpe_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_get,
-    bcmpkt_gre_chksum_t_offset_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_set,
-    bcmpkt_gre_chksum_t_offset_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gre_key_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gre_key_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gre_key_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gre_key_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_gre_key_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 9);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 9, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_gre_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_get,
-    bcmpkt_gre_t_protocol_get,
-    bcmpkt_gre_t_reserved_get,
-    bcmpkt_gre_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_gre_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_set,
-    bcmpkt_gre_t_protocol_set,
-    bcmpkt_gre_t_reserved_set,
-    bcmpkt_gre_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_gre_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_gre_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_gre_t_field_data,
-};
-
-
-static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 4, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 4, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 6, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 6, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 18, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 18, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 17, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 17, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 31, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 31, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 15);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 15, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 15, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 15, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 15);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 15, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 2, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
-    bcmpkt_hg3_base_t_cn_get,
-    bcmpkt_hg3_base_t_cng_get,
-    bcmpkt_hg3_base_t_entropy_get,
-    bcmpkt_hg3_base_t_ext_hdr_present_get,
-    bcmpkt_hg3_base_t_hg3_reserved_get,
-    bcmpkt_hg3_base_t_l3_routed_get,
-    bcmpkt_hg3_base_t_mirror_copy_get,
-    bcmpkt_hg3_base_t_reserved_etype_get,
-    bcmpkt_hg3_base_t_system_destination_get,
-    bcmpkt_hg3_base_t_system_destination_type_get,
-    bcmpkt_hg3_base_t_system_source_get,
-    bcmpkt_hg3_base_t_tc_get,
-    bcmpkt_hg3_base_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
-    bcmpkt_hg3_base_t_cn_set,
-    bcmpkt_hg3_base_t_cng_set,
-    bcmpkt_hg3_base_t_entropy_set,
-    bcmpkt_hg3_base_t_ext_hdr_present_set,
-    bcmpkt_hg3_base_t_hg3_reserved_set,
-    bcmpkt_hg3_base_t_l3_routed_set,
-    bcmpkt_hg3_base_t_mirror_copy_set,
-    bcmpkt_hg3_base_t_reserved_etype_set,
-    bcmpkt_hg3_base_t_system_destination_set,
-    bcmpkt_hg3_base_t_system_destination_type_set,
-    bcmpkt_hg3_base_t_system_source_set,
-    bcmpkt_hg3_base_t_tc_set,
-    bcmpkt_hg3_base_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_BASE_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_field_data,
-};
-
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_lsb_get,
-    bcmpkt_hg3_extension_0_t_class_id_msb_get,
-    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
-    bcmpkt_hg3_extension_0_t_flags_get,
-    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
-    bcmpkt_hg3_extension_0_t_svp_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_lsb_set,
-    bcmpkt_hg3_extension_0_t_class_id_msb_set,
-    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
-    bcmpkt_hg3_extension_0_t_flags_set,
-    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
-    bcmpkt_hg3_extension_0_t_svp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
-    bcmpkt_hop_by_hop_t_next_header_get,
-    bcmpkt_hop_by_hop_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
-    bcmpkt_hop_by_hop_t_next_header_set,
-    bcmpkt_hop_by_hop_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_field_data,
-};
-
-
-static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_icmp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_get,
-    bcmpkt_icmp_t_code_get,
-    bcmpkt_icmp_t_icmp_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_icmp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_set,
-    bcmpkt_icmp_t_code_set,
-    bcmpkt_icmp_t_icmp_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_icmp_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_icmp_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_icmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_get,
-    bcmpkt_ifa_header_t_gns_get,
-    bcmpkt_ifa_header_t_max_length_get,
-    bcmpkt_ifa_header_t_next_hdr_get,
-    bcmpkt_ifa_header_t_ver_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_set,
-    bcmpkt_ifa_header_t_gns_set,
-    bcmpkt_ifa_header_t_max_length_set,
-    bcmpkt_ifa_header_t_next_hdr_set,
-    bcmpkt_ifa_header_t_ver_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 26, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 26, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 24, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 20, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_a_t_cn_get,
-    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get,
-    bcmpkt_ifa_metadata_a_t_lns_device_id_get,
-    bcmpkt_ifa_metadata_a_t_port_speed_get,
-    bcmpkt_ifa_metadata_a_t_queue_id_get,
-    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_a_t_cn_set,
-    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set,
-    bcmpkt_ifa_metadata_a_t_lns_device_id_set,
-    bcmpkt_ifa_metadata_a_t_port_speed_set,
-    bcmpkt_ifa_metadata_a_t_queue_id_set,
-    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_b_t_egress_port_id_get,
-    bcmpkt_ifa_metadata_b_t_ingress_port_id_get,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_0_get,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_1_get,
-    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get,
-    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get,
-    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_b_t_egress_port_id_set,
-    bcmpkt_ifa_metadata_b_t_ingress_port_id_set,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_0_set,
-    bcmpkt_ifa_metadata_b_t_mmu_stat_1_set,
-    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set,
-    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set,
-    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_base_t_action_vector_get,
-    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get,
-    bcmpkt_ifa_metadata_base_t_request_vector_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_base_t_action_vector_set,
-    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set,
-    bcmpkt_ifa_metadata_base_t_request_vector_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_field_data,
-};
-
-
-static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_igmp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_get,
-    bcmpkt_igmp_t_group_address_get,
-    bcmpkt_igmp_t_igmp_type_get,
-    bcmpkt_igmp_t_max_resp_time_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_igmp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_set,
-    bcmpkt_igmp_t_group_address_set,
-    bcmpkt_igmp_t_igmp_type_set,
-    bcmpkt_igmp_t_max_resp_time_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_igmp_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_igmp_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_igmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
-    bcmpkt_ioam_e2e_t_ioam_e2e_data_get,
-    bcmpkt_ioam_e2e_t_ioam_e2e_type_get,
-    bcmpkt_ioam_e2e_t_ioam_hdr_len_get,
-    bcmpkt_ioam_e2e_t_namespace_id_get,
-    bcmpkt_ioam_e2e_t_next_protocol_get,
-    bcmpkt_ioam_e2e_t_reserved_get,
-    bcmpkt_ioam_e2e_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
-    bcmpkt_ioam_e2e_t_ioam_e2e_data_set,
-    bcmpkt_ioam_e2e_t_ioam_e2e_type_set,
-    bcmpkt_ioam_e2e_t_ioam_hdr_len_set,
-    bcmpkt_ioam_e2e_t_namespace_id_set,
-    bcmpkt_ioam_e2e_t_next_protocol_set,
-    bcmpkt_ioam_e2e_t_reserved_set,
-    bcmpkt_ioam_e2e_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IOAM_E2E_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ipfix_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_get,
-    bcmpkt_ipfix_t_length_get,
-    bcmpkt_ipfix_t_obs_domain_id_get,
-    bcmpkt_ipfix_t_sequence_num_get,
-    bcmpkt_ipfix_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ipfix_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_set,
-    bcmpkt_ipfix_t_length_set,
-    bcmpkt_ipfix_t_obs_domain_id_set,
-    bcmpkt_ipfix_t_sequence_num_set,
-    bcmpkt_ipfix_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ipfix_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ipfix_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_ipfix_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ipv4_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_get,
-    bcmpkt_ipv4_t_flags_frag_offset_get,
-    bcmpkt_ipv4_t_hdr_checksum_get,
-    bcmpkt_ipv4_t_id_get,
-    bcmpkt_ipv4_t_option_get,
-    bcmpkt_ipv4_t_protocol_get,
-    bcmpkt_ipv4_t_sa_get,
-    bcmpkt_ipv4_t_tos_get,
-    bcmpkt_ipv4_t_total_length_get,
-    bcmpkt_ipv4_t_ttl_get,
-    bcmpkt_ipv4_t_version_hdr_len_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ipv4_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_set,
-    bcmpkt_ipv4_t_flags_frag_offset_set,
-    bcmpkt_ipv4_t_hdr_checksum_set,
-    bcmpkt_ipv4_t_id_set,
-    bcmpkt_ipv4_t_option_set,
-    bcmpkt_ipv4_t_protocol_set,
-    bcmpkt_ipv4_t_sa_set,
-    bcmpkt_ipv4_t_tos_set,
-    bcmpkt_ipv4_t_total_length_set,
-    bcmpkt_ipv4_t_ttl_set,
-    bcmpkt_ipv4_t_version_hdr_len_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ipv4_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ipv4_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_ipv4_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_ipv6_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_get,
-    bcmpkt_ipv6_t_flow_label_get,
-    bcmpkt_ipv6_t_hop_limit_get,
-    bcmpkt_ipv6_t_next_header_get,
-    bcmpkt_ipv6_t_payload_length_get,
-    bcmpkt_ipv6_t_sa_get,
-    bcmpkt_ipv6_t_traffic_class_get,
-    bcmpkt_ipv6_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_ipv6_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_set,
-    bcmpkt_ipv6_t_flow_label_set,
-    bcmpkt_ipv6_t_hop_limit_set,
-    bcmpkt_ipv6_t_next_header_set,
-    bcmpkt_ipv6_t_payload_length_set,
-    bcmpkt_ipv6_t_sa_set,
-    bcmpkt_ipv6_t_traffic_class_set,
-    bcmpkt_ipv6_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_ipv6_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_ipv6_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_ipv6_t_field_data,
-};
-
-
-static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_l2_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_get,
-    bcmpkt_l2_t_macsa_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_l2_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_set,
-    bcmpkt_l2_t_macsa_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_l2_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_l2_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_l2_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_get,
-    bcmpkt_mpls_ach_t_cw_type_get,
-    bcmpkt_mpls_ach_t_reserved_get,
-    bcmpkt_mpls_ach_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_set,
-    bcmpkt_mpls_ach_t_cw_type_set,
-    bcmpkt_mpls_ach_t_reserved_set,
-    bcmpkt_mpls_ach_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_get,
-    bcmpkt_mpls_cw_t_reserved_get,
-    bcmpkt_mpls_cw_t_seq_number_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_set,
-    bcmpkt_mpls_cw_t_reserved_set,
-    bcmpkt_mpls_cw_t_seq_number_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 9, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 9, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_mpls_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_get,
-    bcmpkt_mpls_t_exp_get,
-    bcmpkt_mpls_t_label_get,
-    bcmpkt_mpls_t_ttl_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_mpls_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_set,
-    bcmpkt_mpls_t_exp_set,
-    bcmpkt_mpls_t_label_set,
-    bcmpkt_mpls_t_ttl_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_mpls_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_mpls_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_mpls_t_field_data,
-};
-
-
-static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[7], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[7], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_p_1588_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_get,
-    bcmpkt_p_1588_t_correction_get,
-    bcmpkt_p_1588_t_domain_nb_get,
-    bcmpkt_p_1588_t_flags_get,
-    bcmpkt_p_1588_t_logmsginterval_get,
-    bcmpkt_p_1588_t_msg_length_get,
-    bcmpkt_p_1588_t_msg_type_get,
-    bcmpkt_p_1588_t_reserved1_get,
-    bcmpkt_p_1588_t_reserved2_get,
-    bcmpkt_p_1588_t_reserved3_get,
-    bcmpkt_p_1588_t_seq_id_get,
-    bcmpkt_p_1588_t_srcportid_get,
-    bcmpkt_p_1588_t_transportspec_get,
-    bcmpkt_p_1588_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_p_1588_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_set,
-    bcmpkt_p_1588_t_correction_set,
-    bcmpkt_p_1588_t_domain_nb_set,
-    bcmpkt_p_1588_t_flags_set,
-    bcmpkt_p_1588_t_logmsginterval_set,
-    bcmpkt_p_1588_t_msg_length_set,
-    bcmpkt_p_1588_t_msg_type_set,
-    bcmpkt_p_1588_t_reserved1_set,
-    bcmpkt_p_1588_t_reserved2_set,
-    bcmpkt_p_1588_t_reserved3_set,
-    bcmpkt_p_1588_t_seq_id_set,
-    bcmpkt_p_1588_t_srcportid_set,
-    bcmpkt_p_1588_t_transportspec_set,
-    bcmpkt_p_1588_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_p_1588_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_p_1588_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_p_1588_t_field_data,
-};
-
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
-    bcmpkt_prog_ext_hdr_t_next_header_get,
-    bcmpkt_prog_ext_hdr_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
-    bcmpkt_prog_ext_hdr_t_next_header_set,
-    bcmpkt_prog_ext_hdr_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_get,
-    bcmpkt_psamp_0_t_length_get,
-    bcmpkt_psamp_0_t_next_hop_index_get,
-    bcmpkt_psamp_0_t_obs_time_ns_get,
-    bcmpkt_psamp_0_t_obs_time_s_get,
-    bcmpkt_psamp_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_set,
-    bcmpkt_psamp_0_t_length_set,
-    bcmpkt_psamp_0_t_next_hop_index_set,
-    bcmpkt_psamp_0_t_obs_time_ns_set,
-    bcmpkt_psamp_0_t_obs_time_s_set,
-    bcmpkt_psamp_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_get,
-    bcmpkt_psamp_1_t_egress_port_get,
-    bcmpkt_psamp_1_t_epoch_get,
-    bcmpkt_psamp_1_t_ingress_port_get,
-    bcmpkt_psamp_1_t_sampled_length_get,
-    bcmpkt_psamp_1_t_user_meta_data_get,
-    bcmpkt_psamp_1_t_variable_flag_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_set,
-    bcmpkt_psamp_1_t_egress_port_set,
-    bcmpkt_psamp_1_t_epoch_set,
-    bcmpkt_psamp_1_t_ingress_port_set,
-    bcmpkt_psamp_1_t_sampled_length_set,
-    bcmpkt_psamp_1_t_user_meta_data_set,
-    bcmpkt_psamp_1_t_variable_flag_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = {
-    bcmpkt_psamp_postcard_0_t_egress_mod_port_get,
-    bcmpkt_psamp_postcard_0_t_ingress_port_get,
-    bcmpkt_psamp_postcard_0_t_obs_time_ns_get,
-    bcmpkt_psamp_postcard_0_t_obs_time_s_get,
-    bcmpkt_psamp_postcard_0_t_psamp_length_get,
-    bcmpkt_psamp_postcard_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = {
-    bcmpkt_psamp_postcard_0_t_egress_mod_port_set,
-    bcmpkt_psamp_postcard_0_t_ingress_port_set,
-    bcmpkt_psamp_postcard_0_t_obs_time_ns_set,
-    bcmpkt_psamp_postcard_0_t_obs_time_s_set,
-    bcmpkt_psamp_postcard_0_t_psamp_length_set,
-    bcmpkt_psamp_postcard_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_residence_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_residence_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = {
-    bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get,
-    bcmpkt_psamp_postcard_1_t_drop_reason_code_get,
-    bcmpkt_psamp_postcard_1_t_mmu_stat_0_get,
-    bcmpkt_psamp_postcard_1_t_mmu_stat_1_get,
-    bcmpkt_psamp_postcard_1_t_queue_id_get,
-    bcmpkt_psamp_postcard_1_t_reserved_1_get,
-    bcmpkt_psamp_postcard_1_t_residence_time_get,
-    bcmpkt_psamp_postcard_1_t_sampled_length_get,
-    bcmpkt_psamp_postcard_1_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = {
-    bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set,
-    bcmpkt_psamp_postcard_1_t_drop_reason_code_set,
-    bcmpkt_psamp_postcard_1_t_mmu_stat_0_set,
-    bcmpkt_psamp_postcard_1_t_mmu_stat_1_set,
-    bcmpkt_psamp_postcard_1_t_queue_id_set,
-    bcmpkt_psamp_postcard_1_t_reserved_1_set,
-    bcmpkt_psamp_postcard_1_t_residence_time_set,
-    bcmpkt_psamp_postcard_1_t_sampled_length_set,
-    bcmpkt_psamp_postcard_1_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_rarp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_get,
-    bcmpkt_rarp_t_hardware_type_get,
-    bcmpkt_rarp_t_operation_get,
-    bcmpkt_rarp_t_prot_addr_len_get,
-    bcmpkt_rarp_t_protocol_type_get,
-    bcmpkt_rarp_t_sender_ha_get,
-    bcmpkt_rarp_t_sender_ip_get,
-    bcmpkt_rarp_t_target_ha_get,
-    bcmpkt_rarp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_rarp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_set,
-    bcmpkt_rarp_t_hardware_type_set,
-    bcmpkt_rarp_t_operation_set,
-    bcmpkt_rarp_t_prot_addr_len_set,
-    bcmpkt_rarp_t_protocol_type_set,
-    bcmpkt_rarp_t_sender_ha_set,
-    bcmpkt_rarp_t_sender_ip_set,
-    bcmpkt_rarp_t_target_ha_set,
-    bcmpkt_rarp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_rarp_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_rarp_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_rarp_t_field_data,
-};
-
-
-static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_routing_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_get,
-    bcmpkt_routing_t_hdr_ext_len_get,
-    bcmpkt_routing_t_next_header_get,
-    bcmpkt_routing_t_routing_type_get,
-    bcmpkt_routing_t_segments_left_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_routing_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_set,
-    bcmpkt_routing_t_hdr_ext_len_set,
-    bcmpkt_routing_t_next_header_set,
-    bcmpkt_routing_t_routing_type_set,
-    bcmpkt_routing_t_segments_left_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_routing_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_routing_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_routing_t_field_data,
-};
-
-
-static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_rspan_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_get,
-    bcmpkt_rspan_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_rspan_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_set,
-    bcmpkt_rspan_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_rspan_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_rspan_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_rspan_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_get,
-    bcmpkt_sflow_shim_0_t_sys_source_get,
-    bcmpkt_sflow_shim_0_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_set,
-    bcmpkt_sflow_shim_0_t_sys_source_set,
-    bcmpkt_sflow_shim_0_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 27, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 27, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 31, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 31, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 7);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 7, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 23, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 23, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_discarded_get,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_mcast_get,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_truncated_get,
-    bcmpkt_sflow_shim_1_t_reserved_get,
-    bcmpkt_sflow_shim_1_t_sys_opcode_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_discarded_set,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_mcast_set,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_truncated_set,
-    bcmpkt_sflow_shim_1_t_reserved_set,
-    bcmpkt_sflow_shim_1_t_sys_opcode_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_get,
-    bcmpkt_sflow_shim_2_t_user_meta_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_set,
-    bcmpkt_sflow_shim_2_t_user_meta_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_get,
-    bcmpkt_snap_llc_t_snap_llc_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_set,
-    bcmpkt_snap_llc_t_snap_llc_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_get,
-    bcmpkt_tcp_first_4bytes_t_src_port_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_set,
-    bcmpkt_tcp_first_4bytes_t_src_port_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_get,
-    bcmpkt_tcp_last_16bytes_t_checksum_get,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
-    bcmpkt_tcp_last_16bytes_t_seq_num_get,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
-    bcmpkt_tcp_last_16bytes_t_win_size_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_set,
-    bcmpkt_tcp_last_16bytes_t_checksum_set,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
-    bcmpkt_tcp_last_16bytes_t_seq_num_set,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
-    bcmpkt_tcp_last_16bytes_t_win_size_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_udp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_get,
-    bcmpkt_udp_t_dst_port_get,
-    bcmpkt_udp_t_src_port_get,
-    bcmpkt_udp_t_udp_length_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_udp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_set,
-    bcmpkt_udp_t_dst_port_set,
-    bcmpkt_udp_t_src_port_set,
-    bcmpkt_udp_t_udp_length_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_udp_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_udp_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_udp_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
-    bcmpkt_unknown_l5_t_l5_bytes_8_9_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
-    bcmpkt_unknown_l5_t_l5_bytes_8_9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_field_data,
-};
-
-
-static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_vlan_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_get,
-    bcmpkt_vlan_t_pcp_get,
-    bcmpkt_vlan_t_tpid_get,
-    bcmpkt_vlan_t_vid_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_vlan_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_set,
-    bcmpkt_vlan_t_pcp_set,
-    bcmpkt_vlan_t_tpid_set,
-    bcmpkt_vlan_t_vid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_vlan_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_vlan_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_vlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_vxlan_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_get,
-    bcmpkt_vxlan_t_reserved2_get,
-    bcmpkt_vxlan_t_vn_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_vxlan_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_set,
-    bcmpkt_vxlan_t_reserved2_set,
-    bcmpkt_vxlan_t_vn_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_vxlan_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_vxlan_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_vxlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_31_5_0_wesp_t_fget[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_get,
-    bcmpkt_wesp_t_header_len_get,
-    bcmpkt_wesp_t_next_header_get,
-    bcmpkt_wesp_t_seq_num_get,
-    bcmpkt_wesp_t_spi_get,
-    bcmpkt_wesp_t_trailer_len_get,
-    bcmpkt_wesp_t_wesp_iv_get,
-};
-
-bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_31_5_0_wesp_t_fset[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_set,
-    bcmpkt_wesp_t_header_len_set,
-    bcmpkt_wesp_t_next_header_set,
-    bcmpkt_wesp_t_seq_num_set,
-    bcmpkt_wesp_t_spi_set,
-    bcmpkt_wesp_t_trailer_len_set,
-    bcmpkt_wesp_t_wesp_iv_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_31_5_0_wesp_t_field_data[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_31_5_0_wesp_t_field_info = {
-    .num_fields = BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm78800_a0_dna_6_5_31_5_0_wesp_t_field_data,
-};
-
-static bcmpkt_flex_pmd_info_t bcm78800_a0_dna_6_5_31_5_0_flexhdr_info_list[BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_COUNT] = {
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_arp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_arp_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_arp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_authen_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_authen_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_authen_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_bfd_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_bfd_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_bfd_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_cntag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_cntag_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_cntag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_cpu_composites_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_dcn_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_dcn_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_dcn_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_dest_option_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_dest_option_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_dest_option_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ep_nih_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_erspan3_fixed_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_erspan3_subhdr_5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_esp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_esp_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_esp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_ethertype_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ethertype_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ethertype_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_frag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_frag_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_frag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gbp_ethernet_shim_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_generic_loopback_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_gpe_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gpe_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gpe_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gre_chksum_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_gre_key_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gre_key_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gre_key_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gre_rout_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gre_seq_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_gre_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_gre_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_gre_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_hg3_base_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_hg3_extension_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_hop_by_hop_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_icmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_icmp_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_icmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ifa_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_a_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_b_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ifa_metadata_base_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_igmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_igmp_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_igmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ioam_e2e_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_ipfix_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ipfix_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ipfix_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_ipv4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ipv4_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ipv4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_ipv6_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_ipv6_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_ipv6_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_l2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_l2_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_l2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mirror_erspan_sn_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mirror_transport_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mpls_ach_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mpls_bv_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mpls_cw_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_mpls_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_mpls_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_mpls_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_p_1588_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_p_1588_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_p_1588_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_prog_ext_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_mirror_on_drop_3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_psamp_postcard_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_rarp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_rarp_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_rarp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_routing_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_routing_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_routing_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_rspan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_rspan_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_rspan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_sflow_shim_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_snap_llc_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_tcp_first_4bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_tcp_last_16bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_udp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_udp_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_udp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_unknown_l3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_unknown_l4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_unknown_l5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_vlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_vlan_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_vlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_vxlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_vxlan_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_vxlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_wesp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm78800_a0_dna_6_5_31_5_0_wesp_t_fget,
-        .flex_fset = bcm78800_a0_dna_6_5_31_5_0_wesp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_field_info,
-        .reasons_info = &bcm78800_a0_dna_6_5_31_5_0_rxpmd_flex_reasons_info,
-        .flex_common_fget = bcm78800_a0_rxpmd_flex_fget,
-        .flex_common_fset = bcm78800_a0_rxpmd_flex_fset,
-    },
-};
-
-static shr_enum_map_t bcm78800_a0_dna_6_5_31_5_0_flexhdr_id_map[] = {
-    BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
-};
-
-shr_enum_map_t * bcm78800_a0_dna_6_5_31_5_0_flexhdr_map_get(void)
-{
-    return bcm78800_a0_dna_6_5_31_5_0_flexhdr_id_map;
-}
-
-bcmpkt_flex_pmd_info_t * bcm78800_a0_dna_6_5_31_5_0_flex_pmd_info_get(uint32_t hid)
-{
-    if (hid >= BCM78800_A0_DNA_6_5_31_5_0_BCMPKT_FLEXHDR_COUNT) {
-        return NULL;
-    }
-
-    return &bcm78800_a0_dna_6_5_31_5_0_flexhdr_info_list[hid];
-}
-
-int bcm78800_a0_dna_6_5_31_5_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
-    15,
-    22,
-    23,
-    66,
-};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 00000000000..2449b44c5f8
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,7334 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm78800_a0_dna_6_5_32_3_0_sf_match_id_info.yml
+ * for device bcm78800_a0 and variant dna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h>
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] =
+{
+    0x366c,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
+{
+    0x78f0,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
+{
+    0x1fffe,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
+{
+    0xff00,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] =
+{
+    0x1e4c8,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] =
+{
+    0x10,
+    0x400000,
+    0x1dd8000,
+    0x20,
+    0x0,
+    0x0,
+    0x0,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0x1,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x400000,
+    0x0,
+    0x100,
+    0x800776,
+    0x0,
+    0x0,
+    0x0,
+    0xf77c0000,
+    0xefeeff77,
+    0x7ddfddfe,
+    0x777f7,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x0,
+    0x7778,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xde000000,
+    0x1d,
+    0x0,
+    0x0,
+    0xeef0,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] =
+{
+    0x0,
+    0x0,
+    0x100000,
+    0x1000000,
+    0x0,
+    0x0,
+    0x2000,
+    0x100100,
+    0x4002002,
+    0x10010040,
+    0x400400,
+    0x10008008,
+    0x40040100,
+    0x1001000,
+    0x40040020,
+    0x100100,
+    0x4002002,
+    0x80080040,
+    0x200200,
+    0x2002000,
+    0x80040040,
+    0x200800,
+    0x4004002,
+    0x80080,
+    0x401001,
+    0x2001004,
+    0x40040020,
+    0x800800,
+    0x2002,
+    0x0,
+    0x0,
+    0x40,
+    0x400,
+    0x0,
+    0x80000000,
+    0x4000000,
+    0x80080040,
+    0x1001000,
+    0x10004004,
+    0x200100,
+    0x4004002,
+    0x40010010,
+    0x800400,
+    0x4010010,
+    0x80080040,
+    0x1001000,
+    0x8020020,
+    0x80000080,
+    0x1000800,
+    0x20020010,
+    0x80080,
+    0x2001001,
+    0x40040020,
+    0x40100100,
+    0x800800,
+    0x20010010,
+    0x80080200,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff77f77c,
+    0xddfeefee,
+    0x77f77ddf,
+    0x7,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xddf00000,
+    0xbfbbfddf,
+    0xf77f77fb,
+    0x1ddfdd,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0x7778000,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x0,
+    0x7778,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0xeef0000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x0,
+    0x2000000,
+    0x0,
+    0x0,
+    0x8000000,
+    0x0,
+    0x0,
+    0x20000008,
+    0x0,
+    0x0,
+    0x40000,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x80000000,
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x200000,
+    0x8000,
+    0x0,
+    0x0,
+    0x10,
+    0x0,
+    0x0,
+    0x10000,
+    0x0,
+    0x0,
+    0x20000,
+    0x0,
+    0x0,
+    0x10000000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] =
+{
+    0x1e,
+    0x400000,
+    0x1dd8000,
+    0x3ddcafe0,
+    0x0,
+    0x8000,
+    0xc003bb00,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0xff77f77d,
+    0xddfeefee,
+    0x77f77ddf,
+    0xfddfddff,
+    0x77f77fbb,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x7fbbfbbe,
+    0xfbbfbbe5,
+    0xeff77f77,
+    0xbfbbeefe,
+    0xf77f77fb,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0xfbbfddf7,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x1bbbfb,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfddfddf0,
+    0x77f77fbb,
+    0x1ddfddf,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77c00000,
+    0xfeeff77f,
+    0xf77ddfdd,
+    0x777,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0xf0000000,
+    0xee,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0xeef,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x3bbc000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1dd,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbe000000,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x3bbfbbe,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xefeef800,
+    0xfddfddfe,
+    0xeefbbfbb,
+    0xeef,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0xeef00,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0xeef0000,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1dd,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x1dde00,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] =
+{
+    0x0,
+    0x400000,
+    0x0,
+    0x80,
+    0x0,
+    0x8000,
+    0x0,
+    0x8004004,
+    0x140080,
+    0x400001,
+    0x20010010,
+    0x500200,
+    0x1000004,
+    0x80040040,
+    0x1001400,
+    0x8004000,
+    0x100080,
+    0x2002801,
+    0x4008000,
+    0x80080,
+    0x2801001,
+    0x8000020,
+    0x100100,
+    0x5002002,
+    0x10000040,
+    0x80080000,
+    0x1001000,
+    0x20028,
+    0x80,
+    0x0,
+    0x100,
+    0x2000000,
+    0x0,
+    0x0,
+    0x2,
+    0x100000,
+    0x2002001,
+    0x40050,
+    0x400100,
+    0x8008004,
+    0x100140,
+    0x1000400,
+    0x50020010,
+    0x400,
+    0x2002001,
+    0xa0040040,
+    0x800,
+    0x2001002,
+    0x40040020,
+    0x800a00,
+    0x4002000,
+    0x80080040,
+    0x1001400,
+    0x4000,
+    0x40020020,
+    0xa00400,
+    0x2000008,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0xaf00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x78000000,
+    0x5,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x2,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x15e000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x8800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40000000,
+    0x4,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x2,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x110000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40020,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800000,
+    0x10,
+    0x0,
+    0x0,
+    0x10000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] =
+{
+    0x18,
+    0x400000,
+    0x1dd8000,
+    0x3ddcafe0,
+    0x0,
+    0x8000,
+    0x4003bb00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x600000,
+    0x0,
+    0x100,
+    0xbf800776,
+    0xf772,
+    0x0,
+    0xec000002,
+    0x1000e,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0xff77f77d,
+    0xddfeefee,
+    0x77f77ddf,
+    0xfddfddff,
+    0x77f77fbb,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x7fbbfbbe,
+    0xfbbfbbe5,
+    0xeff77f77,
+    0xbfbbeefe,
+    0xf77f77fb,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0xfbbfddf7,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x3bbfb,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf77e0000,
+    0xefeeff77,
+    0x7ddfddfe,
+    0xddf777f7,
+    0xbfbbfddf,
+    0xf77f77fb,
+    0x77fddfdd,
+    0xfeeff77f,
+    0xf77ddfdd,
+    0xefeeff77,
+    0xfddfddfe,
+    0xeefbbfbb,
+    0xef95feef,
+    0xfddfeefe,
+    0xbbfbbfdd,
+    0xdfeefeef,
+    0xfbbfddfd,
+    0x77f77fbb,
+    0x77ddfddf,
+    0xfeefeeff,
+    0xbbfddfdd,
+    0xefeefbbf,
+    0xe,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] =
+{
+    0x0,
+    0x0,
+    0x400000,
+    0x4000000,
+    0x0,
+    0x0,
+    0x8000,
+    0x400400,
+    0x10008008,
+    0x40040100,
+    0x1001000,
+    0x40020020,
+    0x100400,
+    0x4004001,
+    0x100080,
+    0x400401,
+    0x10008008,
+    0x200100,
+    0x800802,
+    0x8008000,
+    0x100100,
+    0x802002,
+    0x10010008,
+    0x200200,
+    0x1004004,
+    0x8004010,
+    0x100080,
+    0x2002001,
+    0x8008,
+    0x0,
+    0x0,
+    0x100,
+    0x1000,
+    0x0,
+    0x0,
+    0x10000002,
+    0x200100,
+    0x4004002,
+    0x40010010,
+    0x800400,
+    0x10010008,
+    0x40040,
+    0x2001001,
+    0x10040040,
+    0x200100,
+    0x4004002,
+    0x20080080,
+    0x200,
+    0x4002002,
+    0x80080040,
+    0x200200,
+    0x8004004,
+    0x100080,
+    0x400401,
+    0x2002001,
+    0x80040040,
+    0x200800,
+    0x2,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbbfbbe0,
+    0xeff77f77,
+    0xbfbbeefe,
+    0x3b,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef800000,
+    0xfddfeefe,
+    0xbbfbbfdd,
+    0xeefeef,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xde000000,
+    0x1d,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0xe0000000,
+    0x1dd,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x3bbc00,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xbbc00000,
+    0x3,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf77f77c0,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0x77,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdf000000,
+    0xfbbfddfd,
+    0x77f77fbb,
+    0x1ddfddf,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0xeef0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0x1dde00,
+    0x0,
+    0x0,
+    0x3bbc00,
+    0x0,
+    0x0,
+    0xbbc00000,
+    0x3,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x0,
+    0x3bbc,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] =
+{
+    0x0,
+    0x0,
+    0x58000,
+    0x580e00,
+    0x0,
+    0x0,
+    0xb00,
+    0xb0058058,
+    0x1600b00,
+    0x5805816,
+    0xc0160160,
+    0x5802c02,
+    0x16016058,
+    0x580580,
+    0x1601600b,
+    0xb0058058,
+    0x1600b00,
+    0x2c02c016,
+    0x700b00b0,
+    0xb00b00,
+    0x2c016016,
+    0xb00b02c0,
+    0x1601600,
+    0x5802c02c,
+    0x60160580,
+    0xb00581,
+    0x1601600b,
+    0xb02c02c0,
+    0xb00,
+    0x0,
+    0x0,
+    0x38000016,
+    0x160,
+    0x0,
+    0x2c000000,
+    0x1600000,
+    0x2c02c016,
+    0x60580580,
+    0x5801601,
+    0xb00b0058,
+    0x81601600,
+    0x16005805,
+    0x802c0160,
+    0x1605805,
+    0x2c02c016,
+    0x580580,
+    0x2c0b00b,
+    0x2c01c02c,
+    0x805802c0,
+    0xb00b005,
+    0x5802c02c,
+    0xb00580,
+    0x1601600b,
+    0x16058058,
+    0x802c02c0,
+    0xb005805,
+    0x2c02c0b0,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] =
+{
+    0x0,
+    0x0,
+    0x50000,
+    0x500c00,
+    0x0,
+    0x0,
+    0xa00,
+    0xa0050050,
+    0x1400a00,
+    0x5005014,
+    0x80140140,
+    0x5002802,
+    0x14014050,
+    0x500500,
+    0x1401400a,
+    0xa0050050,
+    0x1400a00,
+    0x28028014,
+    0x600a00a0,
+    0xa00a00,
+    0x28014014,
+    0xa00a0280,
+    0x1401400,
+    0x50028028,
+    0x40140500,
+    0xa00501,
+    0x1401400a,
+    0xa0280280,
+    0xa00,
+    0x0,
+    0x0,
+    0x30000014,
+    0x140,
+    0x0,
+    0x28000000,
+    0x1400000,
+    0x28028014,
+    0x40500500,
+    0x5001401,
+    0xa00a0050,
+    0x1401400,
+    0x14005005,
+    0x280140,
+    0x1405005,
+    0x28028014,
+    0x500500,
+    0x280a00a,
+    0x28018028,
+    0x500280,
+    0xa00a005,
+    0x50028028,
+    0xa00500,
+    0x1401400a,
+    0x14050050,
+    0x280280,
+    0xa005005,
+    0x280280a0,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] =
+{
+    0x0,
+    0x0,
+    0xd80000,
+    0xd80a000,
+    0x0,
+    0x0,
+    0x1b000,
+    0xd80d80,
+    0x3601b01b,
+    0xd80d8360,
+    0x3603600,
+    0xd806c06c,
+    0x60360d80,
+    0xd80d803,
+    0x603601b0,
+    0xd80d83,
+    0x3601b01b,
+    0xc06c0360,
+    0x1b01b06,
+    0x1b01b005,
+    0xc0360360,
+    0x1b06c06,
+    0x3603601b,
+    0x806c06c0,
+    0x360d80d,
+    0x1b00d836,
+    0x603601b0,
+    0x6c06c03,
+    0x1b01b,
+    0x0,
+    0x0,
+    0x80000360,
+    0x3602,
+    0x0,
+    0xc0000000,
+    0x36000006,
+    0xc06c0360,
+    0xd80d806,
+    0xd8036036,
+    0x1b00d80,
+    0x3603601b,
+    0x600d80d8,
+    0x6c03603,
+    0x360d80d8,
+    0xc06c0360,
+    0xd80d806,
+    0x6c1b01b0,
+    0xc01406c0,
+    0xd806c06,
+    0xb01b00d8,
+    0x806c06c1,
+    0x1b00d80d,
+    0x603601b0,
+    0x60d80d83,
+    0x6c06c03,
+    0xb00d80d8,
+    0xc06c1b01,
+    0x6,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x100000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] =
+{
+    0x0,
+    0x0,
+    0x1000000,
+    0x10000000,
+    0x0,
+    0x0,
+    0x20000,
+    0x1001000,
+    0x40020020,
+    0x100400,
+    0x4004001,
+    0x80080,
+    0x401001,
+    0x10010004,
+    0x400200,
+    0x1001004,
+    0x40020020,
+    0x800400,
+    0x2002008,
+    0x20020000,
+    0x400400,
+    0x2008008,
+    0x40040020,
+    0x800800,
+    0x4010010,
+    0x20010040,
+    0x400200,
+    0x8008004,
+    0x20020,
+    0x0,
+    0x0,
+    0x400,
+    0x4000,
+    0x0,
+    0x0,
+    0x40000008,
+    0x800400,
+    0x10010008,
+    0x40040,
+    0x2001001,
+    0x40040020,
+    0x100100,
+    0x8004004,
+    0x40100100,
+    0x800400,
+    0x10010008,
+    0x80200200,
+    0x800,
+    0x10008008,
+    0x200100,
+    0x800802,
+    0x20010010,
+    0x400200,
+    0x1001004,
+    0x8008004,
+    0x100100,
+    0x802002,
+    0x8,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] =
+{
+    0x0,
+    0x0,
+    0x840000,
+    0x8400000,
+    0x0,
+    0x0,
+    0x10800,
+    0x80840840,
+    0x21010810,
+    0x84084210,
+    0x2102100,
+    0x84042042,
+    0x10210840,
+    0x8408402,
+    0x10210108,
+    0x80840842,
+    0x21010810,
+    0x20420210,
+    0x1081084,
+    0x10810800,
+    0x20210210,
+    0x81084204,
+    0x21021010,
+    0x40420420,
+    0x2108408,
+    0x10808421,
+    0x10210108,
+    0x84204202,
+    0x10810,
+    0x0,
+    0x0,
+    0x210,
+    0x2100,
+    0x0,
+    0x20000000,
+    0x21000004,
+    0x20420210,
+    0x8408404,
+    0x84021021,
+    0x81080840,
+    0x21021010,
+    0x10084084,
+    0x4202102,
+    0x21084084,
+    0x20420210,
+    0x8408404,
+    0x42108108,
+    0x20000420,
+    0x8404204,
+    0x8108084,
+    0x40420421,
+    0x10808408,
+    0x10210108,
+    0x10840842,
+    0x4204202,
+    0x8084084,
+    0x20421081,
+    0x4,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x0,
+    0x8000,
+    0x4003bb00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbbe0000,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x3bbfb,
+    0x0,
+    0x0,
+    0x0,
+    0x8000,
+    0x0,
+    0xec000002,
+    0x1000e,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfeefeef8,
+    0xbbfddfdd,
+    0xefeefbbf,
+    0xe,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0x3bbc000,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0x78000000,
+    0x77,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0x0,
+    0x1dde00,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0xeef,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] =
+{
+    0xcc066330,
+    0x66330198,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] =
+{
+    0x10088440,
+    0x88440221,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[3] =
+{
+    0xff800000,
+    0xffffffff,
+    0x7,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[3] =
+{
+    0x0,
+    0xffffe000,
+    0x7,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[3] =
+{
+    0xe01f0f80,
+    0xf0f807c3,
+    0x1,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[3] =
+{
+    0xfffffffe,
+    0xffffffff,
+    0x7,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[3] =
+{
+    0x3ff000,
+    0xff000ffc,
+    0x3,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[3] =
+{
+    0x88744a20,
+    0x44a21d12,
+    0x7,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[15] =
+{
+    0x10,
+    0x0,
+    0x40,
+    0x1efd80,
+    0x20,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7c00000,
+    0xeffbf7fb,
+    0xdff7eff7,
+    0xf7efdfef,
+    0x7bf7fb,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7800000,
+    0x7b,
+    0x0,
+    0x0,
+    0xde000000,
+    0x1ef,
+    0x0,
+    0x0,
+    0x78000000,
+    0x7bf,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3df,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc00,
+    0x0,
+    0x0,
+    0x0,
+    0x7bf7800,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3df,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x1000,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x8000000,
+    0x40000000,
+    0x80004000,
+    0x8000,
+    0x40010001,
+    0x4000,
+    0x10001,
+    0x20002,
+    0x40004,
+    0x10001,
+    0x40004,
+    0x100008,
+    0x40010,
+    0x4,
+    0x0,
+    0x20002,
+    0x40004,
+    0x80008,
+    0x20002,
+    0x20000,
+    0x40002,
+    0x80004,
+    0x20008,
+    0x40002,
+    0x80004,
+    0x100008,
+    0x40010,
+    0x10004,
+    0x20002,
+    0x40004,
+    0x80008,
+    0x20002,
+    0x11111110,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x0,
+    0x800,
+    0x0,
+    0x0,
+    0x10000000,
+    0x80000000,
+    0x8000,
+    0x10001,
+    0x80020002,
+    0x8000,
+    0x20002,
+    0x40004,
+    0x80008,
+    0x20002,
+    0x80008,
+    0x200010,
+    0x80020,
+    0x8,
+    0x0,
+    0x40004,
+    0x80008,
+    0x100010,
+    0x40004,
+    0x40000,
+    0x80004,
+    0x100008,
+    0x40010,
+    0x80004,
+    0x100008,
+    0x200010,
+    0x80020,
+    0x20008,
+    0x40004,
+    0x80008,
+    0x100010,
+    0x40004,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[19] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdf000000,
+    0xbfefdfef,
+    0x7fdfbfdf,
+    0xdfbf7fbf,
+    0x1efdfef,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bf780,
+    0x0,
+    0x0,
+    0x0,
+    0x1efde00,
+    0x0,
+    0x0,
+    0x0,
+    0x7bf7800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc00,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3df,
+    0x0,
+    0x0,
+    0x78000000,
+    0x7bf,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc00,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800000,
+    0x0,
+    0x0,
+    0x0,
+    0x2000000,
+    0x0,
+    0x0,
+    0x2000000,
+    0x8000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x4000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x0,
+    0x800,
+    0x0,
+    0x0,
+    0x0,
+    0x4000000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[43] =
+{
+    0x1e,
+    0x0,
+    0x40,
+    0x1efd80,
+    0xffffffe0,
+    0xbffffff,
+    0xfbf71,
+    0x0,
+    0x200000,
+    0x7ec00000,
+    0xf7f0000f,
+    0xeffbf7fb,
+    0xdff7eff7,
+    0xf7efdfef,
+    0xdf7bf7fb,
+    0xbfefdfef,
+    0x7fdfbfdf,
+    0xdfbf7fbf,
+    0x7fefdfef,
+    0xffbf7fbf,
+    0xfefdff7e,
+    0x7fbf7efd,
+    0xffffffbf,
+    0xbfffffff,
+    0x7fdfbfdf,
+    0xffbf7fbf,
+    0xbf7eff7e,
+    0x7fdfbfdf,
+    0xbfdfbe21,
+    0x7fbf7fdf,
+    0xff7effbf,
+    0xbfdfbf7e,
+    0x7fbf7fdf,
+    0xff7effbf,
+    0xfefdff7e,
+    0x7fbf7efd,
+    0xbfefdfbf,
+    0x7fdfbfdf,
+    0xffbf7fbf,
+    0xbf7eff7e,
+    0xfbdfbfdf,
+    0xffffffff,
+    0x1,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[23] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7c000000,
+    0xffbf7fbf,
+    0xfefdff7e,
+    0x7fbf7efd,
+    0x7bf,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef000000,
+    0xf7,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3df,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x78000000,
+    0x7bf,
+    0x0,
+    0x0,
+    0x0,
+    0x7bf7800,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef000,
+    0x0,
+    0x0,
+    0x0,
+    0x78000000,
+    0x7bf,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0xc000,
+    0x0,
+    0x0,
+    0x3000,
+    0x0,
+    0x0,
+    0x60000000,
+    0x0,
+    0x30003,
+    0x60006,
+    0xc000c,
+    0x30003,
+    0xc000c,
+    0x180018,
+    0x300030,
+    0xc000c,
+    0x300030,
+    0xc00060,
+    0x3000c0,
+    0x30,
+    0x0,
+    0x180018,
+    0x300030,
+    0x600060,
+    0x180018,
+    0x180000,
+    0x300018,
+    0x600030,
+    0x180060,
+    0x300018,
+    0x600030,
+    0xc00060,
+    0x3000c0,
+    0xc0030,
+    0x180018,
+    0x300030,
+    0x600060,
+    0x180018,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[24] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffffff80,
+    0x1fffff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfffff800,
+    0x1ffffff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[24] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfffffe00,
+    0x1,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffffe000,
+    0x1f,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[24] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3ffc00,
+    0x1ffe,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3ffc000,
+    0x1ffe0,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[24] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xc738e000,
+    0x1c1c71,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x738e0000,
+    0x1c1c71c,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[24] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf83f0000,
+    0x1f9f81,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x83f00000,
+    0x1f9f81f,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[28] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbe000000,
+    0x7fdfbfdf,
+    0xffbf7fbf,
+    0xbf7eff7e,
+    0x3dfbfdf,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef00,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc00,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bf7800,
+    0x0,
+    0x0,
+    0x0,
+    0x78000000,
+    0x7bf,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+    0x0,
+    0x0,
+    0x0,
+    0x7bf7800,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[41] =
+{
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x200000,
+    0x0,
+    0x0,
+    0x200000,
+    0x0,
+    0x1000000,
+    0x2000100,
+    0x5000200,
+    0x400,
+    0x4000100,
+    0x8000400,
+    0x14000800,
+    0x1000,
+    0x10000400,
+    0x20001000,
+    0x40005000,
+    0x10000000,
+    0x0,
+    0x8000000,
+    0x10000800,
+    0x28001000,
+    0x2000,
+    0x4000800,
+    0x8000800,
+    0x10001000,
+    0x20002800,
+    0x8000000,
+    0x10001000,
+    0x20002000,
+    0x40005000,
+    0x10000000,
+    0x8000000,
+    0x10000800,
+    0x28001000,
+    0x2000,
+    0x800,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc00000,
+    0x1,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x78000000,
+    0x21,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x2000000,
+    0x1,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40000000,
+    0x20,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[11] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20,
+    0x0,
+    0x10,
+    0x0,
+    0x0,
+    0x0,
+    0x100000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x8000,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x20002,
+    0x40004,
+    0x80008,
+    0x20002,
+    0x80008,
+    0x100010,
+    0x200020,
+    0x80008,
+    0x200020,
+    0x800040,
+    0x200080,
+    0x20,
+    0x0,
+    0x100010,
+    0x200020,
+    0x400040,
+    0x100010,
+    0x100000,
+    0x200010,
+    0x400020,
+    0x100040,
+    0x200010,
+    0x400020,
+    0x800040,
+    0x200080,
+    0x80020,
+    0x100010,
+    0x200020,
+    0x400040,
+    0x100010,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[11] =
+{
+    0x18,
+    0x0,
+    0x40,
+    0x1efd80,
+    0xffffffe0,
+    0xbffffff,
+    0xfbf71,
+    0x0,
+    0x200000,
+    0x7ec00000,
+    0x10000f,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7e00000,
+    0xeffbf7fb,
+    0xdff7eff7,
+    0xf7efdfef,
+    0xdf7bf7fb,
+    0xbfefdfef,
+    0x7fdfbfdf,
+    0xdfbf7fbf,
+    0x7fefdfef,
+    0xffbf7fbf,
+    0xfefdff7e,
+    0x7fbf7efd,
+    0xffffffbf,
+    0xbfffffff,
+    0x7fdfbfdf,
+    0xffbf7fbf,
+    0xbf7eff7e,
+    0x7fdfbfdf,
+    0xbfdfbe21,
+    0x7fbf7fdf,
+    0xff7effbf,
+    0xbfdfbf7e,
+    0x7fbf7fdf,
+    0xff7effbf,
+    0xfefdff7e,
+    0x7fbf7efd,
+    0xbfefdfbf,
+    0x7fdfbfdf,
+    0xffbf7fbf,
+    0xbf7eff7e,
+    0x3dfbfdf,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf8000000,
+    0x3fffffff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0x3ffffff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x3fffff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3ffff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x3fff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3ff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3e,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x19999998,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x22222220,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x20000,
+    0x0,
+    0x0,
+    0x8000,
+    0x0,
+    0x0,
+    0x0,
+    0x1,
+    0x80008,
+    0x100010,
+    0x200020,
+    0x80008,
+    0x200020,
+    0x400040,
+    0x800080,
+    0x200020,
+    0x800080,
+    0x2000100,
+    0x800200,
+    0x80,
+    0x0,
+    0x400040,
+    0x800080,
+    0x1000100,
+    0x400040,
+    0x400000,
+    0x800040,
+    0x1000080,
+    0x400100,
+    0x800040,
+    0x1000080,
+    0x2000100,
+    0x800200,
+    0x200080,
+    0x400040,
+    0x800080,
+    0x1000100,
+    0x400040,
+    0x40000000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[33] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbfdfbe00,
+    0x7fbf7fdf,
+    0xff7effbf,
+    0xbfdfbf7e,
+    0x3df,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[40] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xde000000,
+    0x1ef,
+    0x0,
+    0x0,
+    0x78000000,
+    0x7bf,
+    0x0,
+    0x0,
+    0x1efde000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef000,
+    0x0,
+    0x0,
+    0x0,
+    0x1efde000,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7fbf7c00,
+    0xff7effbf,
+    0xfefdff7e,
+    0x7fbf7efd,
+    0x7bf,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[40] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1efde00,
+    0x0,
+    0x0,
+    0x0,
+    0x7bf7800,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1efd,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef000,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1efd,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x580,
+    0x0,
+    0x3800000,
+    0x160,
+    0x0,
+    0x0,
+    0x2c00000,
+    0x16000000,
+    0x2c001600,
+    0x58002c00,
+    0x16005800,
+    0x58001600,
+    0xb0005800,
+    0x6000b000,
+    0x58016001,
+    0x60005800,
+    0xc0016001,
+    0x80058002,
+    0x60016005,
+    0x1,
+    0xb0000000,
+    0x6000b000,
+    0xc0016001,
+    0xb002c002,
+    0x7000b000,
+    0xb000b000,
+    0x60016000,
+    0xc002c001,
+    0xb000b002,
+    0x60016000,
+    0xc002c001,
+    0x80058002,
+    0x60016005,
+    0xb0005801,
+    0x6000b000,
+    0xc0016001,
+    0xb002c002,
+    0xb000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x500,
+    0x0,
+    0x3000000,
+    0x140,
+    0x0,
+    0x0,
+    0x2800000,
+    0x14000000,
+    0x28001400,
+    0x50002800,
+    0x14005000,
+    0x50001400,
+    0xa0005000,
+    0x4000a000,
+    0x50014001,
+    0x40005000,
+    0x80014001,
+    0x50002,
+    0x40014005,
+    0x1,
+    0xa0000000,
+    0x4000a000,
+    0x80014001,
+    0xa0028002,
+    0x6000a000,
+    0xa000a000,
+    0x40014000,
+    0x80028001,
+    0xa000a002,
+    0x40014000,
+    0x80028001,
+    0x50002,
+    0x40014005,
+    0xa0005001,
+    0x4000a000,
+    0x80014001,
+    0xa0028002,
+    0xa000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0xef800,
+    0x0,
+    0x8000000,
+    0x3be01,
+    0x0,
+    0x0,
+    0x7c000000,
+    0xe0000007,
+    0xc03be03b,
+    0x8077c077,
+    0xe0ef80ef,
+    0x803be03b,
+    0xef80ef,
+    0x1df01df,
+    0x83be03be,
+    0xef80ef,
+    0x3be03be,
+    0xef8077c,
+    0x3be0ef8,
+    0x3be,
+    0x0,
+    0x1df01df,
+    0x3be03be,
+    0x77c077c,
+    0x1df01df,
+    0x1df0021,
+    0x3be01df,
+    0x77c03be,
+    0x1df077c,
+    0x3be01df,
+    0x77c03be,
+    0xef8077c,
+    0x3be0ef8,
+    0xef83be,
+    0x1df01df,
+    0x3be03be,
+    0x77c077c,
+    0x1df01df,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[43] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x100000,
+    0x0,
+    0x0,
+    0x40000,
+    0x0,
+    0x0,
+    0x0,
+    0x8,
+    0x400040,
+    0x800080,
+    0x1000100,
+    0x400040,
+    0x1000100,
+    0x2000200,
+    0x4000400,
+    0x1000100,
+    0x4000400,
+    0x10000800,
+    0x4001000,
+    0x400,
+    0x0,
+    0x2000200,
+    0x4000400,
+    0x8000800,
+    0x2000200,
+    0x2000000,
+    0x4000200,
+    0x8000400,
+    0x2000800,
+    0x4000200,
+    0x8000400,
+    0x10000800,
+    0x4001000,
+    0x1000400,
+    0x2000200,
+    0x4000400,
+    0x8000800,
+    0x2000200,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40400,
+    0x0,
+    0x0,
+    0x10100,
+    0x0,
+    0x0,
+    0x2000000,
+    0x10000002,
+    0x20101010,
+    0x40202020,
+    0x10404040,
+    0x40101010,
+    0x80404040,
+    0x808080,
+    0x41010101,
+    0x404040,
+    0x1010101,
+    0x4040202,
+    0x1010404,
+    0x101,
+    0x80000000,
+    0x808080,
+    0x1010101,
+    0x82020202,
+    0x808080,
+    0x80808000,
+    0x1010080,
+    0x2020101,
+    0x80808202,
+    0x1010080,
+    0x2020101,
+    0x4040202,
+    0x1010404,
+    0x80404101,
+    0x808080,
+    0x1010101,
+    0x82020202,
+    0x808080,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x80000,
+    0x0,
+    0x0,
+    0x20000,
+    0x0,
+    0x0,
+    0x0,
+    0x4,
+    0x200020,
+    0x400040,
+    0x800080,
+    0x200020,
+    0x800080,
+    0x1000100,
+    0x2000200,
+    0x800080,
+    0x2000200,
+    0x8000400,
+    0x2000800,
+    0x200,
+    0x0,
+    0x1000100,
+    0x2000200,
+    0x4000400,
+    0x1000100,
+    0x1000000,
+    0x2000100,
+    0x4000200,
+    0x1000400,
+    0x2000100,
+    0x4000200,
+    0x8000400,
+    0x2000800,
+    0x800200,
+    0x1000100,
+    0x2000200,
+    0x4000400,
+    0x1000100,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000,
+    0x0,
+    0x200000,
+    0x7ec00000,
+    0x10000f,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbe000000,
+    0x7fdfbfdf,
+    0xffbf7fbf,
+    0xbf7eff7e,
+    0x3dfbfdf,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bf780,
+    0x0,
+    0x0,
+    0x0,
+    0x1efde00,
+    0x0,
+    0x0,
+    0x78000000,
+    0x7bf,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc00,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3df,
+    0x0,
+    0x0,
+    0x78000000,
+    0x7bf,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc00,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
+{
+    0x8,
+};
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DCN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x40000,
+        .match_mask   = 0x40000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 18,
+        .minbit       = 18,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x44000,
+        .match_mask   = 0x5c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x40020,
+        .match_mask   = 0x40020,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3818,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x2010,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x40000,
+        .match_mask   = 0x40000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 18,
+        .minbit       = 18,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x44000,
+        .match_mask   = 0x5c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x40020,
+        .match_mask   = 0x40020,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3818,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x2010,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 36,
+        .match_minbit = 29,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 36,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 45,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 56,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 56,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 51,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 54,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3818,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 37,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 37,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x7c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x10000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 15,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DCN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0xc004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 19,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 43,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 23,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x40000,
+        .match_mask   = 0x40000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 18,
+        .minbit       = 18,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 24,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 24,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 24,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x44000,
+        .match_mask   = 0x5c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 24,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x40020,
+        .match_mask   = 0x40020,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 24,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x4004,
+        .match_mask   = 0x7c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 28,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x20000,
+        .match_mask   = 0x20000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 17,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 11,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 11,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7ffff,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 18,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x1c000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 33,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x8000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x8004,
+        .match_mask   = 0x1c406,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0xc000,
+        .match_mask   = 0x1c006,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 43,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3818,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x2010,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x14000,
+        .match_mask   = 0x1c000,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 16,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_db_info = {
+    .num_entries = 225,
+    .db = bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_map[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_map_info = {
+    .num_entries = 225,
+    .map = bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm78800_a0_dna_6_5_32_3_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_pkt_flexhdr.c
new file mode 100644
index 00000000000..8604e50cac4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_pkt_flexhdr.c
@@ -0,0 +1,10503 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm78800_a0 and variant dna_6_5_32_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[13] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[13] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[13] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[13] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SRV6);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[13] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[13] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[13] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[13] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[13] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[13] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[13] |= (0x1 << 31);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "ALLOW_NAT_3_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 432, 435 }, /* Profile 2. */
+            { 432, 435 }, /* Profile 3. */
+            { 432, 435 }, /* Profile 4. */
+            { 432, 435 }, /* Profile 5. */
+            { 432, 435 }, /* Profile 6. */
+            { 432, 435 }, /* Profile 7. */
+            { 432, 435 }, /* Profile 8. */
+            { 432, 435 }, /* Profile 9. */
+            { 428, 431 }, /* Profile 10. */
+            { 428, 431 }, /* Profile 11. */
+            { 428, 431 }, /* Profile 12. */
+            { 432, 435 }, /* Profile 13. */
+            { 432, 435 }, /* Profile 14. */
+            { 432, 435 }, /* Profile 15. */
+            { 432, 435 }, /* Profile 16. */
+            { 432, 435 }, /* Profile 17. */
+            { 432, 435 }, /* Profile 18. */
+            { 432, 435 }, /* Profile 19. */
+            { 432, 435 }, /* Profile 20. */
+            { 428, 431 }, /* Profile 21. */
+            { 428, 431 }, /* Profile 22. */
+            { 428, 431 }, /* Profile 23. */
+            { 432, 435 }, /* Profile 24. */
+            { 432, 435 }, /* Profile 25. */
+            { 432, 435 }, /* Profile 26. */
+            { 432, 435 }, /* Profile 27. */
+            { 432, 435 }, /* Profile 28. */
+            { 432, 435 }, /* Profile 29. */
+            { 432, 435 }, /* Profile 30. */
+            { 432, 435 }, /* Profile 31. */
+            { 428, 431 }, /* Profile 32. */
+            { 428, 431 }, /* Profile 33. */
+            { 428, 431 }, /* Profile 34. */
+            { 432, 435 }, /* Profile 35. */
+            { 432, 435 }, /* Profile 36. */
+            { 432, 435 }, /* Profile 37. */
+            { 432, 435 }, /* Profile 38. */
+            { 432, 435 }, /* Profile 39. */
+            { 432, 435 }, /* Profile 40. */
+            { 432, 435 }, /* Profile 41. */
+            { 432, 435 }, /* Profile 42. */
+            { 428, 431 }, /* Profile 43. */
+            { 428, 431 }, /* Profile 44. */
+            { 428, 431 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { 224, 239 }, /* Profile 13. */
+            { 224, 239 }, /* Profile 14. */
+            { 208, 223 }, /* Profile 15. */
+            { 208, 223 }, /* Profile 16. */
+            { 224, 239 }, /* Profile 17. */
+            { 224, 239 }, /* Profile 18. */
+            { 208, 223 }, /* Profile 19. */
+            { 208, 223 }, /* Profile 20. */
+            { 224, 239 }, /* Profile 21. */
+            { 224, 239 }, /* Profile 22. */
+            { 208, 223 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { 240, 255 }, /* Profile 35. */
+            { 240, 255 }, /* Profile 36. */
+            { 224, 239 }, /* Profile 37. */
+            { 224, 239 }, /* Profile 38. */
+            { 240, 255 }, /* Profile 39. */
+            { 240, 255 }, /* Profile 40. */
+            { 224, 239 }, /* Profile 41. */
+            { 224, 239 }, /* Profile 42. */
+            { 240, 255 }, /* Profile 43. */
+            { 240, 255 }, /* Profile 44. */
+            { 224, 239 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "DNAT_CTRL_3_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 388, 391 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { 384, 387 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { 388, 391 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { 388, 391 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { 384, 387 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { 388, 391 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { 388, 391 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { 384, 387 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { 388, 391 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { 388, 391 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { 384, 387 }, /* Profile 44. */
+        },
+        .profile_cnt = 45,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 48, 63 }, /* Profile 10. */
+            { 48, 63 }, /* Profile 11. */
+            { 48, 63 }, /* Profile 12. */
+            { 48, 63 }, /* Profile 13. */
+            { 48, 63 }, /* Profile 14. */
+            { 48, 63 }, /* Profile 15. */
+            { 48, 63 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { 48, 63 }, /* Profile 21. */
+            { 48, 63 }, /* Profile 22. */
+            { 48, 63 }, /* Profile 23. */
+            { 48, 63 }, /* Profile 24. */
+            { 48, 63 }, /* Profile 25. */
+            { 48, 63 }, /* Profile 26. */
+            { 48, 63 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { 48, 63 }, /* Profile 32. */
+            { 48, 63 }, /* Profile 33. */
+            { 48, 63 }, /* Profile 34. */
+            { 48, 63 }, /* Profile 35. */
+            { 48, 63 }, /* Profile 36. */
+            { 48, 63 }, /* Profile 37. */
+            { 48, 63 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { 48, 63 }, /* Profile 43. */
+            { 48, 63 }, /* Profile 44. */
+            { 48, 63 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+            { 96, 111 }, /* Profile 4. */
+            { 96, 111 }, /* Profile 5. */
+            { 96, 111 }, /* Profile 6. */
+            { 96, 111 }, /* Profile 7. */
+            { 96, 111 }, /* Profile 8. */
+            { 96, 111 }, /* Profile 9. */
+            { 96, 111 }, /* Profile 10. */
+            { 96, 111 }, /* Profile 11. */
+            { 96, 111 }, /* Profile 12. */
+            { 96, 111 }, /* Profile 13. */
+            { 96, 111 }, /* Profile 14. */
+            { 96, 111 }, /* Profile 15. */
+            { 96, 111 }, /* Profile 16. */
+            { 96, 111 }, /* Profile 17. */
+            { 96, 111 }, /* Profile 18. */
+            { 96, 111 }, /* Profile 19. */
+            { 96, 111 }, /* Profile 20. */
+            { 96, 111 }, /* Profile 21. */
+            { 96, 111 }, /* Profile 22. */
+            { 96, 111 }, /* Profile 23. */
+            { 112, 127 }, /* Profile 24. */
+            { 112, 127 }, /* Profile 25. */
+            { 112, 127 }, /* Profile 26. */
+            { 112, 127 }, /* Profile 27. */
+            { 112, 127 }, /* Profile 28. */
+            { 112, 127 }, /* Profile 29. */
+            { 112, 127 }, /* Profile 30. */
+            { 112, 127 }, /* Profile 31. */
+            { 112, 127 }, /* Profile 32. */
+            { 112, 127 }, /* Profile 33. */
+            { 112, 127 }, /* Profile 34. */
+            { 112, 127 }, /* Profile 35. */
+            { 112, 127 }, /* Profile 36. */
+            { 112, 127 }, /* Profile 37. */
+            { 112, 127 }, /* Profile 38. */
+            { 112, 127 }, /* Profile 39. */
+            { 112, 127 }, /* Profile 40. */
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+            { 408, 411 }, /* Profile 13. */
+            { 408, 411 }, /* Profile 14. */
+            { 404, 407 }, /* Profile 15. */
+            { 404, 407 }, /* Profile 16. */
+            { 408, 411 }, /* Profile 17. */
+            { 408, 411 }, /* Profile 18. */
+            { 404, 407 }, /* Profile 19. */
+            { 404, 407 }, /* Profile 20. */
+            { 404, 407 }, /* Profile 21. */
+            { 404, 407 }, /* Profile 22. */
+            { 400, 403 }, /* Profile 23. */
+            { 408, 411 }, /* Profile 24. */
+            { 408, 411 }, /* Profile 25. */
+            { 404, 407 }, /* Profile 26. */
+            { 404, 407 }, /* Profile 27. */
+            { 408, 411 }, /* Profile 28. */
+            { 408, 411 }, /* Profile 29. */
+            { 404, 407 }, /* Profile 30. */
+            { 404, 407 }, /* Profile 31. */
+            { 404, 407 }, /* Profile 32. */
+            { 404, 407 }, /* Profile 33. */
+            { 400, 403 }, /* Profile 34. */
+            { 408, 411 }, /* Profile 35. */
+            { 408, 411 }, /* Profile 36. */
+            { 404, 407 }, /* Profile 37. */
+            { 404, 407 }, /* Profile 38. */
+            { 408, 411 }, /* Profile 39. */
+            { 408, 411 }, /* Profile 40. */
+            { 404, 407 }, /* Profile 41. */
+            { 404, 407 }, /* Profile 42. */
+            { 404, 407 }, /* Profile 43. */
+            { 404, 407 }, /* Profile 44. */
+            { 400, 403 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 287 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 256, 271 }, /* Profile 4. */
+            { 256, 271 }, /* Profile 5. */
+            { 272, 287 }, /* Profile 6. */
+            { 272, 287 }, /* Profile 7. */
+            { 256, 271 }, /* Profile 8. */
+            { 256, 271 }, /* Profile 9. */
+            { 272, 287 }, /* Profile 10. */
+            { 272, 287 }, /* Profile 11. */
+            { 256, 271 }, /* Profile 12. */
+            { 272, 287 }, /* Profile 13. */
+            { 272, 287 }, /* Profile 14. */
+            { 256, 271 }, /* Profile 15. */
+            { 256, 271 }, /* Profile 16. */
+            { 272, 287 }, /* Profile 17. */
+            { 272, 287 }, /* Profile 18. */
+            { 256, 271 }, /* Profile 19. */
+            { 256, 271 }, /* Profile 20. */
+            { 272, 287 }, /* Profile 21. */
+            { 272, 287 }, /* Profile 22. */
+            { 256, 271 }, /* Profile 23. */
+            { 288, 303 }, /* Profile 24. */
+            { 288, 303 }, /* Profile 25. */
+            { 272, 287 }, /* Profile 26. */
+            { 272, 287 }, /* Profile 27. */
+            { 288, 303 }, /* Profile 28. */
+            { 288, 303 }, /* Profile 29. */
+            { 272, 287 }, /* Profile 30. */
+            { 272, 287 }, /* Profile 31. */
+            { 288, 303 }, /* Profile 32. */
+            { 288, 303 }, /* Profile 33. */
+            { 272, 287 }, /* Profile 34. */
+            { 288, 303 }, /* Profile 35. */
+            { 288, 303 }, /* Profile 36. */
+            { 272, 287 }, /* Profile 37. */
+            { 272, 287 }, /* Profile 38. */
+            { 288, 303 }, /* Profile 39. */
+            { 288, 303 }, /* Profile 40. */
+            { 272, 287 }, /* Profile 41. */
+            { 272, 287 }, /* Profile 42. */
+            { 288, 303 }, /* Profile 43. */
+            { 288, 303 }, /* Profile 44. */
+            { 272, 287 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
+            { 392, 395 }, /* Profile 6. */
+            { 396, 399 }, /* Profile 7. */
+            { 392, 395 }, /* Profile 8. */
+            { 392, 395 }, /* Profile 9. */
+            { 388, 391 }, /* Profile 10. */
+            { 392, 395 }, /* Profile 11. */
+            { 388, 391 }, /* Profile 12. */
+            { 392, 395 }, /* Profile 13. */
+            { 396, 399 }, /* Profile 14. */
+            { 392, 395 }, /* Profile 15. */
+            { 392, 395 }, /* Profile 16. */
+            { 392, 395 }, /* Profile 17. */
+            { 396, 399 }, /* Profile 18. */
+            { 392, 395 }, /* Profile 19. */
+            { 392, 395 }, /* Profile 20. */
+            { 388, 391 }, /* Profile 21. */
+            { 392, 395 }, /* Profile 22. */
+            { 388, 391 }, /* Profile 23. */
+            { 392, 395 }, /* Profile 24. */
+            { 396, 399 }, /* Profile 25. */
+            { 392, 395 }, /* Profile 26. */
+            { 392, 395 }, /* Profile 27. */
+            { 392, 395 }, /* Profile 28. */
+            { 396, 399 }, /* Profile 29. */
+            { 392, 395 }, /* Profile 30. */
+            { 392, 395 }, /* Profile 31. */
+            { 388, 391 }, /* Profile 32. */
+            { 392, 395 }, /* Profile 33. */
+            { 388, 391 }, /* Profile 34. */
+            { 392, 395 }, /* Profile 35. */
+            { 396, 399 }, /* Profile 36. */
+            { 392, 395 }, /* Profile 37. */
+            { 392, 395 }, /* Profile 38. */
+            { 392, 395 }, /* Profile 39. */
+            { 396, 399 }, /* Profile 40. */
+            { 392, 395 }, /* Profile 41. */
+            { 392, 395 }, /* Profile 42. */
+            { 388, 391 }, /* Profile 43. */
+            { 392, 395 }, /* Profile 44. */
+            { 388, 391 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 175 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { 160, 175 }, /* Profile 5. */
+            { 160, 175 }, /* Profile 6. */
+            { 160, 175 }, /* Profile 7. */
+            { 160, 175 }, /* Profile 8. */
+            { 160, 175 }, /* Profile 9. */
+            { 160, 175 }, /* Profile 10. */
+            { 160, 175 }, /* Profile 11. */
+            { 160, 175 }, /* Profile 12. */
+            { 160, 175 }, /* Profile 13. */
+            { 160, 175 }, /* Profile 14. */
+            { 160, 175 }, /* Profile 15. */
+            { 160, 175 }, /* Profile 16. */
+            { 160, 175 }, /* Profile 17. */
+            { 160, 175 }, /* Profile 18. */
+            { 160, 175 }, /* Profile 19. */
+            { 160, 175 }, /* Profile 20. */
+            { 160, 175 }, /* Profile 21. */
+            { 160, 175 }, /* Profile 22. */
+            { 160, 175 }, /* Profile 23. */
+            { 176, 191 }, /* Profile 24. */
+            { 176, 191 }, /* Profile 25. */
+            { 176, 191 }, /* Profile 26. */
+            { 176, 191 }, /* Profile 27. */
+            { 176, 191 }, /* Profile 28. */
+            { 176, 191 }, /* Profile 29. */
+            { 176, 191 }, /* Profile 30. */
+            { 176, 191 }, /* Profile 31. */
+            { 176, 191 }, /* Profile 32. */
+            { 176, 191 }, /* Profile 33. */
+            { 176, 191 }, /* Profile 34. */
+            { 176, 191 }, /* Profile 35. */
+            { 176, 191 }, /* Profile 36. */
+            { 176, 191 }, /* Profile 37. */
+            { 176, 191 }, /* Profile 38. */
+            { 176, 191 }, /* Profile 39. */
+            { 176, 191 }, /* Profile 40. */
+            { 176, 191 }, /* Profile 41. */
+            { 176, 191 }, /* Profile 42. */
+            { 176, 191 }, /* Profile 43. */
+            { 176, 191 }, /* Profile 44. */
+            { 176, 191 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+            { 412, 415 }, /* Profile 6. */
+            { 412, 415 }, /* Profile 7. */
+            { 408, 411 }, /* Profile 8. */
+            { 408, 411 }, /* Profile 9. */
+            { 408, 411 }, /* Profile 10. */
+            { 408, 411 }, /* Profile 11. */
+            { 404, 407 }, /* Profile 12. */
+            { 412, 415 }, /* Profile 13. */
+            { 412, 415 }, /* Profile 14. */
+            { 408, 411 }, /* Profile 15. */
+            { 408, 411 }, /* Profile 16. */
+            { 412, 415 }, /* Profile 17. */
+            { 412, 415 }, /* Profile 18. */
+            { 408, 411 }, /* Profile 19. */
+            { 408, 411 }, /* Profile 20. */
+            { 408, 411 }, /* Profile 21. */
+            { 408, 411 }, /* Profile 22. */
+            { 404, 407 }, /* Profile 23. */
+            { 412, 415 }, /* Profile 24. */
+            { 412, 415 }, /* Profile 25. */
+            { 408, 411 }, /* Profile 26. */
+            { 408, 411 }, /* Profile 27. */
+            { 412, 415 }, /* Profile 28. */
+            { 412, 415 }, /* Profile 29. */
+            { 408, 411 }, /* Profile 30. */
+            { 408, 411 }, /* Profile 31. */
+            { 408, 411 }, /* Profile 32. */
+            { 408, 411 }, /* Profile 33. */
+            { 404, 407 }, /* Profile 34. */
+            { 412, 415 }, /* Profile 35. */
+            { 412, 415 }, /* Profile 36. */
+            { 408, 411 }, /* Profile 37. */
+            { 408, 411 }, /* Profile 38. */
+            { 412, 415 }, /* Profile 39. */
+            { 412, 415 }, /* Profile 40. */
+            { 408, 411 }, /* Profile 41. */
+            { 408, 411 }, /* Profile 42. */
+            { 408, 411 }, /* Profile 43. */
+            { 408, 411 }, /* Profile 44. */
+            { 404, 407 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { 144, 159 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 6. */
+            { 144, 159 }, /* Profile 7. */
+            { 144, 159 }, /* Profile 8. */
+            { 144, 159 }, /* Profile 9. */
+            { 144, 159 }, /* Profile 10. */
+            { 144, 159 }, /* Profile 11. */
+            { 144, 159 }, /* Profile 12. */
+            { 144, 159 }, /* Profile 13. */
+            { 144, 159 }, /* Profile 14. */
+            { 144, 159 }, /* Profile 15. */
+            { 144, 159 }, /* Profile 16. */
+            { 144, 159 }, /* Profile 17. */
+            { 144, 159 }, /* Profile 18. */
+            { 144, 159 }, /* Profile 19. */
+            { 144, 159 }, /* Profile 20. */
+            { 144, 159 }, /* Profile 21. */
+            { 144, 159 }, /* Profile 22. */
+            { 144, 159 }, /* Profile 23. */
+            { 160, 175 }, /* Profile 24. */
+            { 160, 175 }, /* Profile 25. */
+            { 160, 175 }, /* Profile 26. */
+            { 160, 175 }, /* Profile 27. */
+            { 160, 175 }, /* Profile 28. */
+            { 160, 175 }, /* Profile 29. */
+            { 160, 175 }, /* Profile 30. */
+            { 160, 175 }, /* Profile 31. */
+            { 160, 175 }, /* Profile 32. */
+            { 160, 175 }, /* Profile 33. */
+            { 160, 175 }, /* Profile 34. */
+            { 160, 175 }, /* Profile 35. */
+            { 160, 175 }, /* Profile 36. */
+            { 160, 175 }, /* Profile 37. */
+            { 160, 175 }, /* Profile 38. */
+            { 160, 175 }, /* Profile 39. */
+            { 160, 175 }, /* Profile 40. */
+            { 160, 175 }, /* Profile 41. */
+            { 160, 175 }, /* Profile 42. */
+            { 160, 175 }, /* Profile 43. */
+            { 160, 175 }, /* Profile 44. */
+            { 160, 175 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 428, 431 }, /* Profile 4. */
+            { 428, 431 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 428, 431 }, /* Profile 8. */
+            { 428, 431 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 424, 427 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { 428, 431 }, /* Profile 15. */
+            { 428, 431 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { 428, 431 }, /* Profile 19. */
+            { 428, 431 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { 424, 427 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { 428, 431 }, /* Profile 26. */
+            { 428, 431 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 428, 431 }, /* Profile 30. */
+            { 428, 431 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { 424, 427 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { 428, 431 }, /* Profile 37. */
+            { 428, 431 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { 428, 431 }, /* Profile 41. */
+            { 428, 431 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { 424, 427 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 428, 431 }, /* Profile 2. */
+            { 428, 431 }, /* Profile 3. */
+            { 424, 427 }, /* Profile 4. */
+            { 424, 427 }, /* Profile 5. */
+            { 428, 431 }, /* Profile 6. */
+            { 428, 431 }, /* Profile 7. */
+            { 424, 427 }, /* Profile 8. */
+            { 424, 427 }, /* Profile 9. */
+            { 424, 427 }, /* Profile 10. */
+            { 424, 427 }, /* Profile 11. */
+            { 420, 423 }, /* Profile 12. */
+            { 428, 431 }, /* Profile 13. */
+            { 428, 431 }, /* Profile 14. */
+            { 424, 427 }, /* Profile 15. */
+            { 424, 427 }, /* Profile 16. */
+            { 428, 431 }, /* Profile 17. */
+            { 428, 431 }, /* Profile 18. */
+            { 424, 427 }, /* Profile 19. */
+            { 424, 427 }, /* Profile 20. */
+            { 424, 427 }, /* Profile 21. */
+            { 424, 427 }, /* Profile 22. */
+            { 420, 423 }, /* Profile 23. */
+            { 428, 431 }, /* Profile 24. */
+            { 428, 431 }, /* Profile 25. */
+            { 424, 427 }, /* Profile 26. */
+            { 424, 427 }, /* Profile 27. */
+            { 428, 431 }, /* Profile 28. */
+            { 428, 431 }, /* Profile 29. */
+            { 424, 427 }, /* Profile 30. */
+            { 424, 427 }, /* Profile 31. */
+            { 424, 427 }, /* Profile 32. */
+            { 424, 427 }, /* Profile 33. */
+            { 420, 423 }, /* Profile 34. */
+            { 428, 431 }, /* Profile 35. */
+            { 428, 431 }, /* Profile 36. */
+            { 424, 427 }, /* Profile 37. */
+            { 424, 427 }, /* Profile 38. */
+            { 428, 431 }, /* Profile 39. */
+            { 428, 431 }, /* Profile 40. */
+            { 424, 427 }, /* Profile 41. */
+            { 424, 427 }, /* Profile 42. */
+            { 424, 427 }, /* Profile 43. */
+            { 424, 427 }, /* Profile 44. */
+            { 420, 423 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 95 }, /* Profile 2. */
+            { 80, 95 }, /* Profile 3. */
+            { 80, 95 }, /* Profile 4. */
+            { 80, 95 }, /* Profile 5. */
+            { 80, 95 }, /* Profile 6. */
+            { 80, 95 }, /* Profile 7. */
+            { 80, 95 }, /* Profile 8. */
+            { 80, 95 }, /* Profile 9. */
+            { 80, 95 }, /* Profile 10. */
+            { 80, 95 }, /* Profile 11. */
+            { 80, 95 }, /* Profile 12. */
+            { 80, 95 }, /* Profile 13. */
+            { 80, 95 }, /* Profile 14. */
+            { 80, 95 }, /* Profile 15. */
+            { 80, 95 }, /* Profile 16. */
+            { 80, 95 }, /* Profile 17. */
+            { 80, 95 }, /* Profile 18. */
+            { 80, 95 }, /* Profile 19. */
+            { 80, 95 }, /* Profile 20. */
+            { 80, 95 }, /* Profile 21. */
+            { 80, 95 }, /* Profile 22. */
+            { 80, 95 }, /* Profile 23. */
+            { 96, 111 }, /* Profile 24. */
+            { 96, 111 }, /* Profile 25. */
+            { 96, 111 }, /* Profile 26. */
+            { 96, 111 }, /* Profile 27. */
+            { 96, 111 }, /* Profile 28. */
+            { 96, 111 }, /* Profile 29. */
+            { 96, 111 }, /* Profile 30. */
+            { 96, 111 }, /* Profile 31. */
+            { 96, 111 }, /* Profile 32. */
+            { 96, 111 }, /* Profile 33. */
+            { 96, 111 }, /* Profile 34. */
+            { 96, 111 }, /* Profile 35. */
+            { 96, 111 }, /* Profile 36. */
+            { 96, 111 }, /* Profile 37. */
+            { 96, 111 }, /* Profile 38. */
+            { 96, 111 }, /* Profile 39. */
+            { 96, 111 }, /* Profile 40. */
+            { 96, 111 }, /* Profile 41. */
+            { 96, 111 }, /* Profile 42. */
+            { 96, 111 }, /* Profile 43. */
+            { 96, 111 }, /* Profile 44. */
+            { 96, 111 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
+        .fid = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
+            { 388, 391 }, /* Profile 6. */
+            { 392, 395 }, /* Profile 7. */
+            { 388, 391 }, /* Profile 8. */
+            { 388, 391 }, /* Profile 9. */
+            { 384, 387 }, /* Profile 10. */
+            { 388, 391 }, /* Profile 11. */
+            { 384, 387 }, /* Profile 12. */
+            { 388, 391 }, /* Profile 13. */
+            { 392, 395 }, /* Profile 14. */
+            { 388, 391 }, /* Profile 15. */
+            { 388, 391 }, /* Profile 16. */
+            { 388, 391 }, /* Profile 17. */
+            { 392, 395 }, /* Profile 18. */
+            { 388, 391 }, /* Profile 19. */
+            { 388, 391 }, /* Profile 20. */
+            { 384, 387 }, /* Profile 21. */
+            { 388, 391 }, /* Profile 22. */
+            { 384, 387 }, /* Profile 23. */
+            { 388, 391 }, /* Profile 24. */
+            { 392, 395 }, /* Profile 25. */
+            { 388, 391 }, /* Profile 26. */
+            { 388, 391 }, /* Profile 27. */
+            { 388, 391 }, /* Profile 28. */
+            { 392, 395 }, /* Profile 29. */
+            { 388, 391 }, /* Profile 30. */
+            { 388, 391 }, /* Profile 31. */
+            { 384, 387 }, /* Profile 32. */
+            { 388, 391 }, /* Profile 33. */
+            { 384, 387 }, /* Profile 34. */
+            { 388, 391 }, /* Profile 35. */
+            { 392, 395 }, /* Profile 36. */
+            { 388, 391 }, /* Profile 37. */
+            { 388, 391 }, /* Profile 38. */
+            { 388, 391 }, /* Profile 39. */
+            { 392, 395 }, /* Profile 40. */
+            { 388, 391 }, /* Profile 41. */
+            { 388, 391 }, /* Profile 42. */
+            { 384, 387 }, /* Profile 43. */
+            { 388, 391 }, /* Profile 44. */
+            { 384, 387 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+};
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_field_data,
+    .profile_bmp_cnt = 2,
+    .profile_bmp[0] = 0xfffffffc,
+    .profile_bmp[1] = 0x3fff,
+
+};
+
+static shr_enum_map_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_reason_names[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_arp_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_arp_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_arp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_arp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_authen_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_authen_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_authen_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_authen_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_bfd_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_bfd_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_bfd_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_bfd_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_cntag_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_cntag_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_cntag_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_cntag_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_cpu_composites_0_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_cpu_composites_0_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_cpu_composites_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_cpu_composites_1_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_cpu_composites_1_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_cpu_composites_1_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dcn_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_dcn_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_FID_COUNT] = {
+    bcmpkt_dcn_t_flags_get,
+    bcmpkt_dcn_t_next_protocol_get,
+    bcmpkt_dcn_t_reserved0_get,
+    bcmpkt_dcn_t_reserved1_get,
+    bcmpkt_dcn_t_reserved2_get,
+    bcmpkt_dcn_t_reserved3_get,
+    bcmpkt_dcn_t_reserved4_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_dcn_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_FID_COUNT] = {
+    bcmpkt_dcn_t_flags_set,
+    bcmpkt_dcn_t_next_protocol_set,
+    bcmpkt_dcn_t_reserved0_set,
+    bcmpkt_dcn_t_reserved1_set,
+    bcmpkt_dcn_t_reserved2_set,
+    bcmpkt_dcn_t_reserved3_set,
+    bcmpkt_dcn_t_reserved4_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_dcn_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_dcn_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DCN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_dcn_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_dest_option_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_dest_option_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_dest_option_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_dest_option_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_ep_nih_header_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_ep_nih_header_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_ep_nih_header_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_erspan3_fixed_hdr_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_erspan3_fixed_hdr_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_erspan3_subhdr_5_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_erspan3_subhdr_5_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_esp_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_esp_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_esp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_esp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_ethertype_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_ethertype_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_ethertype_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_ethertype_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_frag_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_frag_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_frag_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_frag_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_gbp_ethernet_shim_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_get,
+    bcmpkt_gbp_ethernet_shim_t_flags_get,
+    bcmpkt_gbp_ethernet_shim_t_reserved_get,
+    bcmpkt_gbp_ethernet_shim_t_sid_get,
+    bcmpkt_gbp_ethernet_shim_t_subtype_get,
+    bcmpkt_gbp_ethernet_shim_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_gbp_ethernet_shim_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_set,
+    bcmpkt_gbp_ethernet_shim_t_flags_set,
+    bcmpkt_gbp_ethernet_shim_t_reserved_set,
+    bcmpkt_gbp_ethernet_shim_t_sid_set,
+    bcmpkt_gbp_ethernet_shim_t_subtype_set,
+    bcmpkt_gbp_ethernet_shim_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_gbp_ethernet_shim_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_gbp_ethernet_shim_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_gbp_ethernet_shim_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_generic_loopback_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+    bcmpkt_generic_loopback_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_generic_loopback_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+    bcmpkt_generic_loopback_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_generic_loopback_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_generic_loopback_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_gpe_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_gpe_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_gpe_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_gpe_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_gre_chksum_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_gre_chksum_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_gre_chksum_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_gre_chksum_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_gre_key_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_gre_key_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_gre_key_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_gre_key_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_gre_rout_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_gre_rout_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_gre_rout_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_gre_rout_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_gre_seq_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_gre_seq_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_gre_seq_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_gre_seq_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_gre_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_gre_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_gre_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_gre_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 4, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 4, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 6, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 6, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 15, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 15, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 2, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_hg3_base_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_get,
+    bcmpkt_hg3_base_t_cng_get,
+    bcmpkt_hg3_base_t_entropy_get,
+    bcmpkt_hg3_base_t_ext_hdr_present_get,
+    bcmpkt_hg3_base_t_hg3_reserved_get,
+    bcmpkt_hg3_base_t_l3_routed_get,
+    bcmpkt_hg3_base_t_mirror_copy_get,
+    bcmpkt_hg3_base_t_reserved_etype_get,
+    bcmpkt_hg3_base_t_system_destination_get,
+    bcmpkt_hg3_base_t_system_destination_type_get,
+    bcmpkt_hg3_base_t_system_source_get,
+    bcmpkt_hg3_base_t_tc_get,
+    bcmpkt_hg3_base_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_hg3_base_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_set,
+    bcmpkt_hg3_base_t_cng_set,
+    bcmpkt_hg3_base_t_entropy_set,
+    bcmpkt_hg3_base_t_ext_hdr_present_set,
+    bcmpkt_hg3_base_t_hg3_reserved_set,
+    bcmpkt_hg3_base_t_l3_routed_set,
+    bcmpkt_hg3_base_t_mirror_copy_set,
+    bcmpkt_hg3_base_t_reserved_etype_set,
+    bcmpkt_hg3_base_t_system_destination_set,
+    bcmpkt_hg3_base_t_system_destination_type_set,
+    bcmpkt_hg3_base_t_system_source_set,
+    bcmpkt_hg3_base_t_tc_set,
+    bcmpkt_hg3_base_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_hg3_base_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_hg3_base_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_hg3_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_hg3_extension_0_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_get,
+    bcmpkt_hg3_extension_0_t_class_id_msb_get,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
+    bcmpkt_hg3_extension_0_t_flags_get,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
+    bcmpkt_hg3_extension_0_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_hg3_extension_0_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_set,
+    bcmpkt_hg3_extension_0_t_class_id_msb_set,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
+    bcmpkt_hg3_extension_0_t_flags_set,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
+    bcmpkt_hg3_extension_0_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_hg3_extension_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_hg3_extension_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_hg3_extension_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_hop_by_hop_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_hop_by_hop_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_hop_by_hop_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_icmp_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_icmp_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_icmp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_icmp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_ifa_header_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_ifa_header_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_ifa_header_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_ifa_header_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_a_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_a_t_cn_get,
+    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_metadata_a_t_lns_device_id_get,
+    bcmpkt_ifa_metadata_a_t_port_speed_get,
+    bcmpkt_ifa_metadata_a_t_queue_id_get,
+    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_a_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_a_t_cn_set,
+    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_metadata_a_t_lns_device_id_set,
+    bcmpkt_ifa_metadata_a_t_port_speed_set,
+    bcmpkt_ifa_metadata_a_t_queue_id_set,
+    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_a_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_a_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_b_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_b_t_egress_port_id_get,
+    bcmpkt_ifa_metadata_b_t_ingress_port_id_get,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_0_get,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_1_get,
+    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get,
+    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get,
+    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_b_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_b_t_egress_port_id_set,
+    bcmpkt_ifa_metadata_b_t_ingress_port_id_set,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_0_set,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_1_set,
+    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set,
+    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set,
+    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_b_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_b_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_base_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_base_t_action_vector_get,
+    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_base_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_base_t_action_vector_set,
+    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_base_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_base_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_igmp_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_igmp_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_igmp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_igmp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_ioam_e2e_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_get,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_get,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_get,
+    bcmpkt_ioam_e2e_t_namespace_id_get,
+    bcmpkt_ioam_e2e_t_next_protocol_get,
+    bcmpkt_ioam_e2e_t_reserved_get,
+    bcmpkt_ioam_e2e_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_ioam_e2e_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_set,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_set,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_set,
+    bcmpkt_ioam_e2e_t_namespace_id_set,
+    bcmpkt_ioam_e2e_t_next_protocol_set,
+    bcmpkt_ioam_e2e_t_reserved_set,
+    bcmpkt_ioam_e2e_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_ioam_e2e_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_ioam_e2e_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IOAM_E2E_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_ioam_e2e_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_ipfix_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_ipfix_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_ipfix_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_ipfix_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_ipv4_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_ipv4_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_ipv4_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_ipv4_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_ipv6_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_ipv6_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_ipv6_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_ipv6_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_l2_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_l2_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_l2_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_l2_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_mirror_erspan_sn_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_mirror_erspan_sn_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_mirror_erspan_sn_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_mirror_transport_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_mirror_transport_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_mirror_transport_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_mirror_transport_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_mpls_ach_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_mpls_ach_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_mpls_ach_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_mpls_ach_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_mpls_bv_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_mpls_bv_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_mpls_bv_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_mpls_bv_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_mpls_cw_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_mpls_cw_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_mpls_cw_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_mpls_cw_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_mpls_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_mpls_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_mpls_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_mpls_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_p_1588_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_p_1588_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_p_1588_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_p_1588_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_pim_t_hdr_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_4_5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_4_5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_6_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_6_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_pim_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_FID_COUNT] = {
+    bcmpkt_pim_t_hdr_bytes_0_1_get,
+    bcmpkt_pim_t_hdr_bytes_2_3_get,
+    bcmpkt_pim_t_hdr_bytes_4_5_get,
+    bcmpkt_pim_t_hdr_bytes_6_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_pim_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_FID_COUNT] = {
+    bcmpkt_pim_t_hdr_bytes_0_1_set,
+    bcmpkt_pim_t_hdr_bytes_2_3_set,
+    bcmpkt_pim_t_hdr_bytes_4_5_set,
+    bcmpkt_pim_t_hdr_bytes_6_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_pim_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_pim_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PIM_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_pim_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_prog_ext_hdr_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_prog_ext_hdr_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_prog_ext_hdr_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_psamp_0_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_psamp_0_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_psamp_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_psamp_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_psamp_1_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_psamp_1_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_psamp_1_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_psamp_1_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_0_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = {
+    bcmpkt_psamp_postcard_0_t_egress_mod_port_get,
+    bcmpkt_psamp_postcard_0_t_ingress_port_get,
+    bcmpkt_psamp_postcard_0_t_obs_time_ns_get,
+    bcmpkt_psamp_postcard_0_t_obs_time_s_get,
+    bcmpkt_psamp_postcard_0_t_psamp_length_get,
+    bcmpkt_psamp_postcard_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_0_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = {
+    bcmpkt_psamp_postcard_0_t_egress_mod_port_set,
+    bcmpkt_psamp_postcard_0_t_ingress_port_set,
+    bcmpkt_psamp_postcard_0_t_obs_time_ns_set,
+    bcmpkt_psamp_postcard_0_t_obs_time_s_set,
+    bcmpkt_psamp_postcard_0_t_psamp_length_set,
+    bcmpkt_psamp_postcard_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_residence_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_residence_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_1_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = {
+    bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get,
+    bcmpkt_psamp_postcard_1_t_drop_reason_code_get,
+    bcmpkt_psamp_postcard_1_t_mmu_stat_0_get,
+    bcmpkt_psamp_postcard_1_t_mmu_stat_1_get,
+    bcmpkt_psamp_postcard_1_t_queue_id_get,
+    bcmpkt_psamp_postcard_1_t_reserved_1_get,
+    bcmpkt_psamp_postcard_1_t_residence_time_get,
+    bcmpkt_psamp_postcard_1_t_sampled_length_get,
+    bcmpkt_psamp_postcard_1_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_1_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = {
+    bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set,
+    bcmpkt_psamp_postcard_1_t_drop_reason_code_set,
+    bcmpkt_psamp_postcard_1_t_mmu_stat_0_set,
+    bcmpkt_psamp_postcard_1_t_mmu_stat_1_set,
+    bcmpkt_psamp_postcard_1_t_queue_id_set,
+    bcmpkt_psamp_postcard_1_t_reserved_1_set,
+    bcmpkt_psamp_postcard_1_t_residence_time_set,
+    bcmpkt_psamp_postcard_1_t_sampled_length_set,
+    bcmpkt_psamp_postcard_1_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_1_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_1_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_rarp_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_rarp_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_rarp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_rarp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_routing_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_routing_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_routing_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_routing_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_rspan_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_rspan_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_rspan_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_rspan_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_sflow_shim_0_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_sflow_shim_0_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_sflow_shim_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_sflow_shim_1_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_sflow_shim_1_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_sflow_shim_1_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_sflow_shim_2_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_sflow_shim_2_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_sflow_shim_2_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_snap_llc_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_snap_llc_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_snap_llc_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_snap_llc_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_tcp_first_4bytes_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_tcp_first_4bytes_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_tcp_first_4bytes_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_tcp_last_16bytes_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_tcp_last_16bytes_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_tcp_last_16bytes_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_udp_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_udp_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_udp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_udp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_unknown_l3_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_unknown_l3_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_unknown_l3_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_unknown_l3_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_unknown_l4_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_unknown_l4_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_unknown_l4_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_unknown_l4_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_unknown_l5_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_unknown_l5_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_unknown_l5_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_unknown_l5_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_vlan_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_vlan_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_vlan_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_vlan_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_vxlan_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_vxlan_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_vxlan_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_vxlan_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_32_3_0_wesp_t_fget[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_32_3_0_wesp_t_fset[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_32_3_0_wesp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_32_3_0_wesp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_32_3_0_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm78800_a0_dna_6_5_32_3_0_flexhdr_info_list[BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_arp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_authen_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_bfd_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_cntag_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_dcn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_dcn_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_dcn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_dest_option_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_ep_nih_header_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_esp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_ethertype_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_frag_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_gbp_ethernet_shim_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_gbp_ethernet_shim_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_gbp_ethernet_shim_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_generic_loopback_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_gpe_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_gre_chksum_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_gre_key_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_gre_rout_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_gre_seq_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_gre_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_hg3_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_hg3_base_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_hg3_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_hg3_extension_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_hg3_extension_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_hg3_extension_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_hop_by_hop_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_icmp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_ifa_header_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_a_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_b_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_base_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_ifa_metadata_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_igmp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_ioam_e2e_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_ioam_e2e_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_ioam_e2e_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_ipfix_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_ipv4_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_ipv6_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_l2_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_mirror_transport_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_mpls_ach_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_mpls_bv_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_mpls_cw_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_mpls_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_p_1588_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_pim_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_pim_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_pim_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_psamp_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_psamp_1_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_1_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_psamp_postcard_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_rarp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_routing_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_rspan_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_snap_llc_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_udp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_unknown_l3_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_unknown_l4_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_unknown_l5_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_vlan_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_vxlan_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_32_3_0_wesp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_32_3_0_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm78800_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm78800_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm78800_a0_dna_6_5_32_3_0_flexhdr_id_map[] = {
+    BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm78800_a0_dna_6_5_32_3_0_flexhdr_map_get(void)
+{
+    return bcm78800_a0_dna_6_5_32_3_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm78800_a0_dna_6_5_32_3_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm78800_a0_dna_6_5_32_3_0_flexhdr_info_list[hid];
+}
+
+int bcm78800_a0_dna_6_5_32_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    15,
+    22,
+    23,
+    67,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c
index 3f0dca9ef71..38c81d13665 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c
@@ -406,7 +406,8 @@ dstport_get(void *raw_hg_hdr)
 {
     /*
      * The bit positions of dest port field is fixed on TH4/TH5.
-     * directly use HIGIG2_DST_PORT_MGIDLf_GET to get dest port.
+     * directly use HIGIG2_DST_MODID_MGIDH & HIGIG2_DST_PORT_MGIDL to
+     * get dest port.
      */
     int dstport = 0;
     const HIGIG2_t *const higig2 = (HIGIG2_t *)raw_hg_hdr;
@@ -414,7 +415,8 @@ dstport_get(void *raw_hg_hdr)
     if (HIGIG2_MCSTf_GET(*higig2)) {
         dstport = 0;
     } else {
-        dstport = HIGIG2_DST_PORT_MGIDLf_GET(*higig2);
+        dstport = (HIGIG2_DST_MODID_MGIDHf_GET(*higig2) << 8) |
+                  HIGIG2_DST_PORT_MGIDLf_GET(*higig2);
     }
     return dstport;
 }
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h
index aa4adc24d28..f91cdc6c250 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h
@@ -32,6 +32,7 @@
 
 /*! Module information */
 #define BCMGENL_MODULE_NAME     "linux_bcmgenl"
+
 /*! Use similar path to SDK6 genl psample path */
 #define BCM_PROCFS_NAME        "bcm"
 #define BCMGENL_PROCFS_NAME    "genl"
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c
index 9a845d0b2c9..9a1a03bc573 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c
@@ -213,7 +213,7 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
     ngknet_filter_t *match_filt = NULL;
     unsigned long flags;
     bcmgenl_pkt_t bcmgenl_pkt;
-    genl_pkt_t *generic_pkt;
+    genl_pkt_t *generic_pkt = NULL;
     bool strip_tag = false;
     struct sk_buff *skb_generic_pkt;
     static uint32_t last_drop, last_alloc, last_skb;
@@ -237,16 +237,17 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
     }
 
     /* check if this packet is from the same filter */
-    if  (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB) ||
-        (strncmp(match_filt->desc, BCMGENL_PACKET_NAME, NGKNET_FILTER_DESC_MAX) != 0) {
+    if (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB ||
+        strncmp(match_filt->desc, BCMGENL_PACKET_NAME, NGKNET_FILTER_DESC_MAX) != 0) {
         return (skb);
     }
     dev_no = cbd->dinfo->dev_no;
     pkt = cbd->pmd + cbd->pmd_len;
+    pkt_len = cbd->pkt_len;
 
     GENL_DBG_VERB
         ("pkt size %d, match_filt->dest_id %d\n",
-         cbd->pkt_len, match_filt->dest_id);
+         pkt_len, match_filt->dest_id);
     GENL_DBG_VERB
         ("filter user data: 0x%08x\n", *(uint32_t *)match_filt->user_data);
     GENL_DBG_VERB
@@ -254,7 +255,6 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
     g_bcmgenl_packet_stats.pkts_f_packet_cb++;
 
     /* Adjust original pkt_len to remove 4B FCS */
-    pkt_len = cbd->pkt_len;
     if (pkt_len < FCS_SZ) {
         g_bcmgenl_packet_stats.pkts_d_invalid_size++;
         goto FILTER_CB_PKT_HANDLED;
@@ -375,12 +375,14 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
 FILTER_CB_PKT_HANDLED:
     if (rv == 1) {
         g_bcmgenl_packet_stats.pkts_f_handled++;
-        /* Not sending to network protocol stack */
-        skb = NULL;
     } else {
         g_bcmgenl_packet_stats.pkts_f_pass_through++;
+        if (generic_pkt) {
+            kfree(generic_pkt);
+        }
     }
-    return skb;
+    dev_kfree_skb_any(skb);
+    return NULL;
 }
 
 static void
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c
index f7d9860a2f8..70a8a5897b5 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c
@@ -67,15 +67,7 @@ static int bcmgenl_psample_qlen = BCMGENL_PSAMPLE_QLEN_DFLT;
 MODULE_PARAM(bcmgenl_psample_qlen, int, 0);
 MODULE_PARM_DESC(bcmgenl_psample_qlen, "psample queue length (default 1024 buffers)");
 
-#ifndef BCMGENL_PSAMPLE_METADATA
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0))
-#define BCMGENL_PSAMPLE_METADATA 1
-#else
-#define BCMGENL_PSAMPLE_METADATA 0
-#endif
-#endif
-
-#if BCMGENL_PSAMPLE_METADATA
 static inline void
 bcmgenl_sample_packet(struct psample_group *group, struct sk_buff *skb,
                       u32 trunc_size, int in_ifindex, int out_ifindex,
@@ -90,7 +82,7 @@ bcmgenl_sample_packet(struct psample_group *group, struct sk_buff *skb,
 }
 #else
 #define bcmgenl_sample_packet psample_sample_packet
-#endif /* BCMGENL_PSAMPLE_METADATA */
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) */
 
 static bcmgenl_info_t g_bcmgenl_psample_info = {{0}};
 
@@ -224,18 +216,18 @@ bcmgenl_psample_meta_get(struct sk_buff *skb, bcmgenl_pkt_t *bcmgenl_pkt, psampl
                       __func__, cbd->net_dev->name, src_ifindex);
     }
 
+    /* set generic dst type for MC pkts */
+    if (dstport_type == DSTPORT_TYPE_MC) {
+        g_bcmgenl_psample_stats.pkts_f_dst_mc++;
+    }
     /*
      * Identify these packets uniquely.
      * 1) Packet forwarded over front panel port   = dst_ifindex
      * 2) Packet dropped in forwarding and sampled = 0xffff
      * 3) else CPU destination                     = 0
      */
-
-    /* set generic dst type for MC pkts */
-    if (dstport_type == DSTPORT_TYPE_MC) {
-        g_bcmgenl_psample_stats.pkts_f_dst_mc++;
-    } else if ((dstport != 0) &&
-               (psample_netif = psample_netif_lookup_by_port(dstport))) {
+    if ((dstport != 0) &&
+        (psample_netif = psample_netif_lookup_by_port(dstport))) {
         /* find dst port netif for UC pkts (no need to lookup CPU port) */
         dst_ifindex = psample_netif->dev->ifindex;
     } else if (bcmgenl_pkt->meta.sample_type != SAMPLE_TYPE_NONE) {
@@ -297,7 +289,7 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
     }
 
     /* check if this packet is sampled packet (from sample filter) */
-    if  (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB ||
+    if (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB ||
         strncmp(match_filt->desc, BCMGENL_PSAMPLE_NAME, NGKNET_FILTER_DESC_MAX) != 0) {
         return (skb);
     }
@@ -379,10 +371,6 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
         g_bcmgenl_psample_stats.pkts_f_tag_checked++;
     }
 
-    /* Account for padding in libnl used by psample */
-    if (meta.trunc_size >= pkt_len) {
-        meta.trunc_size = pkt_len;
-    }
     GENL_DBG_VERB
         ("%s: trunc_size %d, sample_rate %d "
          "src_ifindex %d, dst_ifindex %d\n",
@@ -394,7 +382,7 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
     /* drop if configured sample rate is 0 */
     if (meta.sample_rate > 0) {
         unsigned long flags;
-        psample_pkt_t *psample_pkt;
+        psample_pkt_t *psample_pkt = NULL;
         struct sk_buff *skb_psample;
 
         if (g_bcmgenl_psample_stats.pkts_c_qlen_cur >= bcmgenl_psample_qlen) {
@@ -419,25 +407,25 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
         /* psample_pkt start */
         memcpy(&psample_pkt->meta, &meta, sizeof(psample_meta_t));
         psample_pkt->group = group;
-        if ((skb_psample = dev_alloc_skb(meta.trunc_size)) == NULL) {
+        if ((skb_psample = dev_alloc_skb(pkt_len)) == NULL) {
             g_bcmgenl_psample_stats.pkts_d_no_mem++;
             last_skb = 0;
             bcmgenl_limited_gprintk
                 (last_skb, "%s: failed to alloc generic mem for pkt skb: %lu\n",
                  __func__, g_bcmgenl_psample_stats.pkts_d_no_mem);
+            kfree(psample_pkt);
             goto PSAMPLE_FILTER_CB_PKT_HANDLED;
         }
 
         /* setup skb to point to pkt */
         if (strip_tag) {
             memcpy(skb_psample->data, pkt, 12);
-            memcpy(skb_psample->data + 12, pkt + 16, meta.trunc_size - 12);
+            memcpy(skb_psample->data + 12, pkt + 16, pkt_len - 12);
             g_bcmgenl_psample_stats.pkts_f_tag_stripped++;
         } else {
-            memcpy(skb_psample->data, pkt, meta.trunc_size);
+            memcpy(skb_psample->data, pkt, pkt_len);
         }
-        skb_put(skb_psample, meta.trunc_size);
-        /* save original size for PSAMPLE_ATTR_ORIGSIZE in skb->len */
+        skb_put(skb_psample, pkt_len);
         skb_psample->len = pkt_len;
         psample_pkt->skb = skb_psample;
         if (debug & GENL_DBG_LVL_PDMP) {
@@ -462,12 +450,11 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
 PSAMPLE_FILTER_CB_PKT_HANDLED:
     if (bcmgenl_pkt.meta.sample_type != SAMPLE_TYPE_NONE) {
         g_bcmgenl_psample_stats.pkts_f_handled++;
-        /* Not sending to network protocol stack */
-        skb = NULL;
     } else {
         g_bcmgenl_psample_stats.pkts_f_pass_through++;
     }
-    return skb;
+    dev_kfree_skb_any(skb);
+    return NULL;
 }
 
 static void
@@ -927,6 +914,7 @@ bcmgenl_psample_proc_stats_show(struct seq_file *m, void *v)
     seq_printf(m, "  pkts with vlan tag checked     %10lu\n", g_bcmgenl_psample_stats.pkts_f_tag_checked);
     seq_printf(m, "  pkts with vlan tag stripped    %10lu\n", g_bcmgenl_psample_stats.pkts_f_tag_stripped);
     seq_printf(m, "  pkts with mc destination       %10lu\n", g_bcmgenl_psample_stats.pkts_f_dst_mc);
+    seq_printf(m, "  pkts with cpu destination      %10lu\n", g_bcmgenl_psample_stats.pkts_f_dst_cpu);
     seq_printf(m, "  pkts current queue length      %10lu\n", g_bcmgenl_psample_stats.pkts_c_qlen_cur);
     seq_printf(m, "  pkts high queue length         %10lu\n", g_bcmgenl_psample_stats.pkts_c_qlen_hi);
     seq_printf(m, "  pkts drop max queue length     %10lu\n", g_bcmgenl_psample_stats.pkts_d_qlen_max);
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c
index 46f25974edf..762c25f144f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c
@@ -68,7 +68,9 @@ ngbde_iio_cleanup(void)
 
     for (idx = 0; idx < num_swdev; idx++) {
         sd = ngbde_swdev_get(idx);
-        ngbde_iio_unmap(sd);
+        if (sd) {
+            ngbde_iio_unmap(sd);
+        }
     }
 }
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c
index 460a7228f68..027f9064ea3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c
@@ -155,12 +155,14 @@ ngbde_user_isr(ngbde_intr_ctrl_t *ic)
         }
         /* Synchronized write when some bits are owned by another ISR */
         sd = ngbde_swdev_get(ic->kdev);
-        if (ngbde_intr_shared_write32(sd, ic, ir->mask_reg, 0, ir->umask) < 0) {
-            printk(KERN_WARNING
-                   "%s: Failed to write shared register for device %d\n",
-                   MOD_NAME, ic->kdev);
-            /* Fall back to normal write to ensure interrupts are masked */
-            NGBDE_IOWRITE32(0, &ic->iomem[ir->mask_reg]);
+        if (sd) {
+            if (ngbde_intr_shared_write32(sd, ic, ir->mask_reg, 0, ir->umask) < 0) {
+                printk(KERN_WARNING
+                       "%s: Failed to write shared register for device %d\n",
+                       MOD_NAME, ic->kdev);
+                /* Fall back to normal write to ensure interrupts are masked */
+                NGBDE_IOWRITE32(0, &ic->iomem[ir->mask_reg]);
+            }
         }
     }
 
@@ -236,6 +238,10 @@ ngbde_intr_ack(ngbde_intr_ctrl_t *ic)
     struct ngbde_dev_s *sd = ngbde_swdev_get(ic->kdev);
     struct ngbde_intr_ack_reg_s *ar = &ic->intr_ack;
 
+    if (!sd) {
+        return 0;
+    }
+
     if (sd->use_msi && ar->ack_valid) {
         if (intr_debug >= 2) {
             printk("INTR: ACK interrupt vector %d\n", ic->irq_vect);
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c
index ed45c2c67dd..d3a557d2d63 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c
@@ -68,7 +68,9 @@ ngbde_paxb_cleanup(void)
 
     for (idx = 0; idx < num_swdev; idx++) {
         sd = ngbde_swdev_get(idx);
-        ngbde_paxb_unmap(sd);
+        if (sd) {
+            ngbde_paxb_unmap(sd);
+        }
     }
 }
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c
index a1e430da0e2..578d6ddb097 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c
@@ -71,7 +71,9 @@ ngbde_pio_cleanup(void)
 
     for (idx = 0; idx < num_swdev; idx++) {
         sd = ngbde_swdev_get(idx);
-        ngbde_pio_unmap(sd);
+        if (sd) {
+            ngbde_pio_unmap(sd);
+        }
     }
 }
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/edk/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/edk/Kbuild
old mode 100755
new mode 100644
index d70336f2ac6..76ce8846b3a
--- a/platform/broadcom/saibcm-modules/sdklt/linux/edk/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/edk/Kbuild
@@ -2,12 +2,25 @@
 #
 # Linux KNET Callback module.
 #
-# $Copyright:.$
+# Copyright 2018-2024 Broadcom. All rights reserved.
+# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+# 
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License 
+# version 2 as published by the Free Software Foundation.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# A copy of the GNU General Public License version 2 (GPLv2) can
+# be found in the LICENSES folder.
 #
 
 obj-m := linux_ngedk.o
 
-ccflags-y := $(LKM_CFLAGS) \
+ccflags-y := $(LKM_CFLAGS) $(LKM_CPPFLAGS) \
              -I$(SDK)/shr/include \
              -I$(SDK)/bcmdrd/include \
              -I$(SDK)/linux/include \
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/edk/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/edk/Makefile
old mode 100755
new mode 100644
index 2eb52d53a46..c9b19bd3dff
--- a/platform/broadcom/saibcm-modules/sdklt/linux/edk/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/edk/Makefile
@@ -1,5 +1,18 @@
 #
-# $Copyright: Broadcom Ltd.$
+# Copyright 2018-2024 Broadcom. All rights reserved.
+# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+# 
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License 
+# version 2 as published by the Free Software Foundation.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# A copy of the GNU General Public License version 2 (GPLv2) can
+# be found in the LICENSES folder.
 #
 # Linux KNET Callback module.
 #
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/edk/ngedk_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/edk/ngedk_main.c
old mode 100755
new mode 100644
index 7155da0e74d..36c832175ea
--- a/platform/broadcom/saibcm-modules/sdklt/linux/edk/ngedk_main.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/edk/ngedk_main.c
@@ -4,7 +4,20 @@
  *
  */
 /*
- * $Copyright:.$
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
  */
 
 #include <lkm/lkm.h>
@@ -61,7 +74,7 @@ typedef struct edk_dev_s {
     /*! Kernel device number (similar to user mode unit number). */
     int kdev;
 
-    /* TODO: Keep DMArelated vars in a separate sub-structure ? */
+
 
     /*! Logical address of DMA pool. */
     void *dma_vaddr;
@@ -190,7 +203,7 @@ ngedk_intr_wait(int kdev, uint32_t *uc_bmp)
         /* We got a SW Interrupt */
         for (core = 0; core < MCS_NUM_UC; core++) {
             if (test_and_clear_bit(core, &(ed->edk_intr.swi_intr_cores))) {
-               /* FIXME: Check against active_bmp? Or leave it upto EDK-Host? */
+
                *uc_bmp |= (1 << core);
             }
         }
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h
index 72415a6643e..5618811648f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h
@@ -87,7 +87,7 @@
 /*! Max network interface name length */
 #define NGKNET_NETIF_NAME_MAX       16
 /*! Max network interface meta bytes */
-#define NGKNET_NETIF_META_MAX       16
+#define NGKNET_NETIF_META_MAX       32
 /*! Max netif user data in bytes */
 #define NGKNET_NETIF_USER_DATA      64
 
@@ -135,6 +135,9 @@ typedef struct ngknet_netif_s {
     /*! Network interface bound to channel */
     uint32_t chan;
 
+    /*! Network interface port */
+    uint32_t port;
+
     /*! Network interface name */
     char name[NGKNET_NETIF_NAME_MAX];
 
@@ -149,9 +152,6 @@ typedef struct ngknet_netif_s {
 
     /*! User data gotten back through callbacks */
     uint8_t user_data[NGKNET_NETIF_USER_DATA];
-
-    /*! Network interface port */
-    uint32_t port;
 } ngknet_netif_t;
 
 /*!
@@ -381,9 +381,9 @@ typedef struct ngknet_chan_cfg_s {
     /*! Rx or Tx */
     int dir;
     /*! Rx channel */
-#define NGKNET_RX_CHAN          0
+#define NGKNET_RX_CHAN          PDMA_Q_RX
     /*! Tx channel */
-#define NGKNET_TX_CHAN          1
+#define NGKNET_TX_CHAN          PDMA_Q_TX
 
     /*! Pipe specified for Rx/Tx */
     int pipe;
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h
index 1cdba1c9312..52ec4ebac03 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h
@@ -33,7 +33,7 @@
 #define NGKNET_MODULE_MAJOR     121
 
 /*! Must be updated if backward compatibility is broken */
-#define NGKNET_IOC_VERSION      2
+#define NGKNET_IOC_VERSION      4
 
 /*! Max number of input arguments */
 #define NGKNET_IOC_IARG_MAX     2
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_ioctl.h
new file mode 100644
index 00000000000..c98abbfbef1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_ioctl.h
@@ -0,0 +1,75 @@
+/*! \file ngst_ioctl.h
+ *
+ * NGST device I/O control definitions.
+ *
+ * This file is intended for use in both kernel mode and user mode.
+ *
+ * IMPORTANT!
+ * All shared structures must be properly 64-bit aligned.
+ *
+ */
+/*
+ * Copyright 2018-2025 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ */
+
+#ifndef NGST_IOCTL_H
+#define NGST_IOCTL_H
+
+#include <linux/types.h>
+#include <linux/ioctl.h>
+
+/*! Module information */
+#define NGST_MODULE_NAME       "linux_ngst"
+#define NGST_MODULE_MAJOR      61
+
+/*! LUST IOCTL command magic. */
+#define NGST_IOC_MAGIC 'x'
+
+/*!
+ * \name IOCTL commands for the NGST kernel module.
+ * \anchor NGST_IOC_xxx
+ */
+
+/*! \{ */
+
+/*! Set/Get ST DMA memory information. */
+#define NGST_IOC_DMA_INFO  _IOWR(NGST_IOC_MAGIC, 0, struct ngst_ioc_dma_info_s)
+
+/*! \} */
+
+/*! IOCTL command return code for success. */
+#define NGST_IOC_SUCCESS       0
+
+/*! Get ST DMA information */
+struct ngst_ioc_dma_info_s {
+
+    /*! Unit */
+    __u32 unit;
+
+    /*! Virtual address */
+    __u64 vaddr;
+
+    /*! Physical address */
+    __u64 paddr;
+
+    /*! Number of DMA chunks */
+    __u32 chunk_cnt;
+
+    /*! DMA pool size */
+    __u32 size;
+};
+
+#endif /* NGST_IOCTL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_netlink.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_netlink.h
new file mode 100644
index 00000000000..e7ec416fe6d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_netlink.h
@@ -0,0 +1,44 @@
+/*! \file ngst_netlink.h
+ *
+ * NGST device Netlink message definitions.
+ *
+ * This file is intended for use in both kernel mode and user mode.
+ *
+ * IMPORTANT!
+ * All shared structures must be properly 64-bit aligned.
+ *
+ */
+/*
+ * Copyright 2018-2025 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ */
+
+#ifndef NGST_NETLINK_H
+#define NGST_NETLINK_H
+
+#include <linux/types.h>
+
+#define NGST_NETLINK_PROTOCOL 17
+
+#define NGST_NL_MSG_TYPE_ST_DATA_REQ        1
+#define NGST_NL_MSG_TYPE_ST_DATA_NOT_READY  2
+#define NGST_NL_MSG_TYPE_ST_DATA_RSP        3
+
+struct ngst_nl_msg_hdr_s {
+    __u32 unit;
+    __u32 msg_type;
+};
+
+#endif /* NGST_NETLINK_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild
index a0d6cc0e929..89610dd2b44 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild
@@ -24,7 +24,7 @@ ifneq ($(OUTPUT_DIR),)
 INCLUDES := -I$(OUTPUT_DIR)/knet/generated/include -I$(OUTPUT_DIR)/knet/generated
 endif
 
-ccflags-y := $(KNET_CPPFLAGS) $(LKM_CFLAGS) $(LKM_CPPFLAGS) \
+ccflags-y := $(KNET_CPPFLAGS) $(LKM_CFLAGS) \
              -I$(SDK)/shr/include \
              -I$(SDK)/bcmdrd/include \
              -I$(SDK)/linux/include \
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile
index 930479743f7..638efaaf50a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile
@@ -69,28 +69,28 @@ R = 2>/dev/null
 
 mklinks:
 	mkdir -p $(DSTIDIR)
-	-ln -s $(KNETDIR)/ngknet_dep.h $(DSTIDIR)/bcmcnet_dep.h $(R)
-	-ln -s $(KNETDIR)/ngknet_buff.h $(DSTIDIR)/bcmcnet_buff.h $(R)
-	-ln -s $(SRCIDIR)/bcmcnet_types.h $(DSTIDIR) $(R)
-	-ln -s $(SRCIDIR)/bcmcnet_internal.h $(DSTIDIR) $(R)
-	-ln -s $(SRCIDIR)/bcmcnet_core.h $(DSTIDIR) $(R)
-	-ln -s $(SRCIDIR)/bcmcnet_dev.h $(DSTIDIR) $(R)
-	-ln -s $(SRCIDIR)/bcmcnet_rxtx.h $(DSTIDIR) $(R)
-	-ln -s $(SRCIDIR)/bcmcnet_cmicd.h $(DSTIDIR) $(R)
-	-ln -s $(SRCIDIR)/bcmcnet_cmicx.h $(DSTIDIR) $(R)
-	-ln -s $(SRCIDIR)/bcmcnet_cmicr_acc.h $(DSTIDIR) $(R)
-	-ln -s $(SRCIDIR)/bcmcnet_cmicr.h $(DSTIDIR) $(R)
-	-ln -s $(SRCIDIR)/bcmcnet_cmicr2.h $(DSTIDIR) $(R)
-	-ln -s $(CNETDIR)/chip/*/*attach.c $(GENDIR) $(R)
-	-ln -s $(CNETDIR)/hmi/cmicd/*.c $(GENDIR) $(R)
-	-ln -s $(CNETDIR)/hmi/cmicx/*.c $(GENDIR) $(R)
-	-ln -s $(CNETDIR)/hmi/cmicr/*.c $(GENDIR) $(R)
-	-ln -s $(CNETDIR)/main/bcmcnet_core.c $(GENDIR) $(R)
-	-ln -s $(CNETDIR)/main/bcmcnet_dev.c $(GENDIR) $(R)
-	-ln -s $(CNETDIR)/main/bcmcnet_rxtx.c $(GENDIR) $(R)
-	-ln -s $(KNETDIR)/*.[ch] $(GENDIR) $(R)
-	-ln -s $(KNETDIR)/Makefile $(GENDIR) $(R)
-	-ln -s $(KNETDIR)/Kbuild $(GENDIR) $(R)
+	-ln -sr $(KNETDIR)/ngknet_dep.h $(DSTIDIR)/bcmcnet_dep.h $(R)
+	-ln -sr $(KNETDIR)/ngknet_buff.h $(DSTIDIR)/bcmcnet_buff.h $(R)
+	-ln -sr $(SRCIDIR)/bcmcnet_types.h $(DSTIDIR) $(R)
+	-ln -sr $(SRCIDIR)/bcmcnet_internal.h $(DSTIDIR) $(R)
+	-ln -sr $(SRCIDIR)/bcmcnet_core.h $(DSTIDIR) $(R)
+	-ln -sr $(SRCIDIR)/bcmcnet_dev.h $(DSTIDIR) $(R)
+	-ln -sr $(SRCIDIR)/bcmcnet_rxtx.h $(DSTIDIR) $(R)
+	-ln -sr $(SRCIDIR)/bcmcnet_cmicd.h $(DSTIDIR) $(R)
+	-ln -sr $(SRCIDIR)/bcmcnet_cmicx.h $(DSTIDIR) $(R)
+	-ln -sr $(SRCIDIR)/bcmcnet_cmicr_acc.h $(DSTIDIR) $(R)
+	-ln -sr $(SRCIDIR)/bcmcnet_cmicr.h $(DSTIDIR) $(R)
+	-ln -sr $(SRCIDIR)/bcmcnet_cmicr2.h $(DSTIDIR) $(R)
+	-ln -sr $(CNETDIR)/chip/*/*attach.c $(GENDIR) $(R)
+	-ln -sr $(CNETDIR)/hmi/cmicd/*.c $(GENDIR) $(R)
+	-ln -sr $(CNETDIR)/hmi/cmicx/*.c $(GENDIR) $(R)
+	-ln -sr $(CNETDIR)/hmi/cmicr/*.c $(GENDIR) $(R)
+	-ln -sr $(CNETDIR)/main/bcmcnet_core.c $(GENDIR) $(R)
+	-ln -sr $(CNETDIR)/main/bcmcnet_dev.c $(GENDIR) $(R)
+	-ln -sr $(CNETDIR)/main/bcmcnet_rxtx.c $(GENDIR) $(R)
+	-ln -sr $(KNETDIR)/*.[ch] $(GENDIR) $(R)
+	-ln -sr $(KNETDIR)/Makefile $(GENDIR) $(R)
+	-ln -sr $(KNETDIR)/Kbuild $(GENDIR) $(R)
 
 rmlinks:
 	-rm -rf $(GENDIR)
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c
index 78b619a28a3..1c8084d8b76 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c
@@ -55,8 +55,251 @@
 /*! Defalut Rx tick for Rx rate limit control. */
 #define NGKNET_EXTRA_RATE_LIMIT_DEFAULT_RX_TICK 10
 
+/*!
+ * SKB replicate mode when multiple filter hits, default to use skb_copy to be
+ * safe.
+ */
+#ifndef KNET_USE_SKB_CLONE
+#define KNET_USE_SKB_CLONE 0
+#endif
+#if KNET_USE_SKB_CLONE
+#define skb_replicate(_skb, _gfp) skb_clone(_skb, _gfp)
+#else
+#define skb_replicate(_skb, _gfp) skb_copy(_skb, _gfp)
+#endif
+
 static struct ngknet_rl_ctrl rl_ctrl;
 
+/*!
+ * The destination type NGKNET_FILTER_DEST_T_CB allows the user to
+ * perform advanced filtering and packet processing via a
+ * user-supplied filter callback function.
+ *
+ * The filter callback function is implemented in a separate Linux
+ * kernel module which is loaded on top of the KNET module, and the
+ * following APIs can be used to register the callback function with
+ * the KNET driver:
+ *
+ *   ngknet_filter_cb_register
+ *   (legacy API - only one callback possible per device)
+ *
+ *   ngknet_filter_cb_register_by_name
+ *   (supports multiple named callbacks per device)
+ *
+ *   ngknet_filter_cb_unregister
+ *   (unregisters a callback function)
+ *
+ * Notes:
+ *
+ * 1) The callbacks are done from interrupt context, so the user
+ *    should defer any advanced processing to a work queue.
+ *
+ * 2) The named callbacks take priority over unnamed (legacy)
+ *    callbacks if the filter priorities are the same.
+ *
+ * 3) Packet filters are processed in order of priority, and further
+ *    processing is stopped once a matching filter is encountered.  If
+ *    additional filters have the same priority as the first matching
+ *    filter, then all these filters will be processed as well,
+ *    i.e. if such a filter matches, the associated filter action will
+ *    be executed.
+ *
+ * 4) The sk_buff (skb) and ngknet_filter_t (filt) returned by the
+ *    callback function (filter_cb) determine the next steps of the
+ *    KNET driver:
+ *
+ *    A) If skb == NULL, the callback has taken ownership of the
+ *       packet and the callback function must ensure that the skb is
+ *       freed. The filt parameter is ignored by the KNET driver.
+ *
+ *    B) If skb != NULL, the packet will be redirected according to
+ *       the destination returned by the callback function (filt). If
+ *       filt is NULL or the destination is invalid, the packet is
+ *       dropped and skb will be freed.
+ *
+ * 5) When multiple filters are matched, the KNET driver will ensure
+ *    that each filter gets its own copy of the packet (skb),
+ *    i.e. from the filters' perspective, no special processing is
+ *    required.
+ */
+static inline int
+ngknet_filter_callback(struct ngknet_dev *dev, struct filt_ctrl *fc,
+                       struct sk_buff **skb, ngknet_filter_t **filt)
+{
+    struct ngknet_callback_desc *cbd = NGKNET_SKB_CB((*skb));
+    struct pkt_hdr *pkh = (struct pkt_hdr *)(*skb)->data;
+    ngknet_filter_cb_f filter_cb;
+
+    filter_cb = fc->filter_cb ? fc->filter_cb : dev->cbc->filter_cb;
+    if (!filter_cb) {
+        return SHR_E_UNAVAIL;
+    }
+
+    cbd->dinfo = &dev->dev_info;
+    cbd->pmd = (*skb)->data + PKT_HDR_SIZE;
+    cbd->pmd_len = pkh->meta_len;
+    cbd->pkt_len = pkh->data_len;
+    cbd->filt = *filt;
+    *skb = filter_cb(*skb, filt);
+    return SHR_E_NONE;
+}
+
+static inline bool
+ngknet_filter_match(struct ngknet_dev *dev, int chan_id,
+                    struct sk_buff *skb, ngknet_filter_t *filt)
+{
+    struct pkt_buf *pkb;
+    ngknet_filter_t scratch;
+    uint8_t *oob;
+    int idx, wsize;
+
+    if (!dev || !skb || !filt) {
+        return false;
+    }
+    if (filt->flags & NGKNET_FILTER_F_ANY_DATA) {
+        return true;
+    }
+    if (filt->flags & NGKNET_FILTER_F_MATCH_CHAN && filt->chan != chan_id) {
+        return false;
+    }
+
+    pkb = (struct pkt_buf *)skb->data;
+    oob = &pkb->data;
+
+    memcpy(&scratch.data.b[0],
+           &oob[filt->oob_data_offset], filt->oob_data_size);
+    memcpy(&scratch.data.b[filt->oob_data_size],
+           &pkb->data + pkb->pkh.meta_len + filt->pkt_data_offset,
+           filt->pkt_data_size);
+    wsize = NGKNET_BYTES2WORDS(filt->oob_data_size + filt->pkt_data_size);
+    for (idx = 0; idx < wsize; idx++) {
+        scratch.data.w[idx] &= filt->mask.w[idx];
+        if (scratch.data.w[idx] != filt->data.w[idx]) {
+            break;
+        }
+    }
+    if (idx == wsize) {
+        return true;
+    }
+    return false;
+}
+
+static inline int
+ngknet_filter_process(struct ngknet_dev *dev,
+                      struct sk_buff *skb, ngknet_filter_t *filt)
+{
+    struct ngknet_private *priv = NULL;
+    struct pkt_buf *pkb;
+    struct sk_buff *mirror_skb = NULL;
+    struct net_device *dest_ndev = NULL, *mirror_ndev = NULL;
+    unsigned long flags;
+    uint8_t *data = NULL;
+    uint16_t tpid;
+    int eth_offset = 0, cust_hdr_len = 0;
+
+    if (!dev) {
+        return SHR_E_INTERNAL;
+    }
+    if (!skb) {
+        /* SKB was consumed by callback */
+        return SHR_E_NONE;
+    }
+    if (!filt) {
+        return SHR_E_NO_HANDLER;
+    }
+
+    spin_lock_irqsave(&dev->lock, flags);
+
+    pkb = (struct pkt_buf *)skb->data;
+    switch (filt->dest_type) {
+    case NGKNET_FILTER_DEST_T_NETIF:
+        if (filt->dest_id == 0) {
+            dest_ndev = dev->net_dev;
+        } else {
+            dest_ndev = dev->vdev[filt->dest_id];
+        }
+        if (dest_ndev) {
+            skb->dev = dest_ndev;
+            if (filt->dest_proto) {
+                pkb->pkh.attrs |= PDMA_RX_SET_PROTO;
+                skb->protocol = filt->dest_proto;
+            }
+            priv = netdev_priv(dest_ndev);
+            priv->users++;
+        }
+        break;
+    case NGKNET_FILTER_DEST_T_VNET:
+        pkb->pkh.attrs |= PDMA_RX_TO_VNET;
+        break;
+    case NGKNET_FILTER_DEST_T_NULL:
+    default:
+        break;
+    }
+
+    spin_unlock_irqrestore(&dev->lock, flags);
+
+    if (!dest_ndev) {
+        return SHR_E_NO_HANDLER;
+    }
+
+    /* PTP Rx Pre processing */
+    if (priv->hwts_rx_filter) {
+        ngknet_ptp_rx_pre_process(dest_ndev, skb, &cust_hdr_len);
+    }
+
+    if (filt->flags & NGKNET_FILTER_F_STRIP_TAG) {
+        pkb->pkh.attrs |= PDMA_RX_STRIP_TAG;
+        eth_offset = PKT_HDR_SIZE + pkb->pkh.meta_len + cust_hdr_len;
+        data = skb->data + eth_offset;
+        tpid = data[12] << 8 | data[13];
+        if (tpid == ETH_P_8021Q || tpid == ETH_P_8021AD) {
+            pkb->pkh.data_len -= VLAN_HLEN;
+            memmove(skb->data + VLAN_HLEN, skb->data, eth_offset + 2 * ETH_ALEN);
+            skb_pull(skb, VLAN_HLEN);
+        }
+    }
+
+    if (dev->cbc->rx_cb) {
+        NGKNET_SKB_CB(skb)->filt = filt;
+    }
+
+    if (filt->mirror_type == NGKNET_FILTER_DEST_T_NETIF) {
+        spin_lock_irqsave(&dev->lock, flags);
+        if (filt->mirror_id == 0) {
+            mirror_ndev = dev->net_dev;
+        } else {
+            mirror_ndev = dev->vdev[filt->mirror_id];
+        }
+        if (mirror_ndev) {
+            mirror_skb = pskb_copy(skb, GFP_ATOMIC);
+            if (mirror_skb) {
+                mirror_skb->dev = mirror_ndev;
+                if (filt->mirror_proto) {
+                    pkb->pkh.attrs |= PDMA_RX_SET_PROTO;
+                    mirror_skb->protocol = filt->mirror_proto;
+                }
+                priv = netdev_priv(mirror_ndev);
+                priv->users++;
+
+                if (dev->cbc->rx_cb) {
+                    NGKNET_SKB_CB(mirror_skb)->filt = filt;
+                }
+            }
+        }
+        spin_unlock_irqrestore(&dev->lock, flags);
+    }
+
+    /* Receive packet */
+    priv->pkt_recv(dest_ndev, skb);
+
+    /* Receive mirrored packet */
+    if (mirror_ndev && mirror_skb) {
+        priv->pkt_recv(mirror_ndev, mirror_skb);
+    }
+
+    return SHR_E_NONE;
+}
+
 int
 ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter)
 {
@@ -115,7 +358,8 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter)
         filter->desc[0] != '\0') {
         list_for_each(list, &dev->cbc->filter_cb_list) {
             filter_cb = list_entry(list, filter_cb_t, list);
-            if (strcmp(filter->desc, filter_cb->desc) == 0) {
+            if (strncmp(filter->desc, filter_cb->desc,
+                        strlen(filter_cb->desc)) == 0) {
                 fc->filter_cb = filter_cb->cb;
                 break;
             }
@@ -263,26 +507,18 @@ ngknet_filter_get_next(struct ngknet_dev *dev, ngknet_filter_t *filter)
 }
 
 int
-ngknet_rx_pkt_filter(struct ngknet_dev *dev,
-                     struct sk_buff **oskb, struct net_device **ndev,
-                     struct sk_buff **mskb, struct net_device **mndev)
+ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb)
 {
-    struct sk_buff *skb = *oskb, *mirror_skb = NULL;
-    struct net_device *dest_ndev = NULL, *mirror_ndev = NULL;
+    struct sk_buff *fskb = NULL;
+    struct net_device *dest_ndev = NULL;
     struct ngknet_private *priv = NULL;
     struct filt_ctrl *fc = NULL;
-    struct list_head *list = NULL;
-    ngknet_filter_t scratch, *filt = NULL;
+    struct list_head *list = NULL, *next_list = NULL;
+    ngknet_filter_t *filt = NULL, *next_filt = NULL;
     struct pkt_buf *pkb = (struct pkt_buf *)skb->data;
-    uint8_t *oob = &pkb->data, *data = NULL;
-    uint16_t tpid;
     unsigned long flags;
-    int wsize;
-    int chan_id;
-    int rv, idx, match = 0;
-    int eth_offset = 0;
-    int cust_hdr_len = 0;
-    ngknet_filter_cb_f filter_cb;
+    int rv, chan_id;
+    uint32_t next_filter_match = 0, same_pri_idx;
 
     rv = bcmcnet_pdma_dev_queue_to_chan(&dev->pdma_dev, pkb->pkh.queue_id,
                                         PDMA_Q_RX, &chan_id);
@@ -297,8 +533,8 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev,
         skb->dev = dest_ndev;
         priv = netdev_priv(dest_ndev);
         priv->users++;
-        *ndev = dest_ndev;
         spin_unlock_irqrestore(&dev->lock, flags);
+        priv->pkt_recv(dest_ndev, skb);
         return SHR_E_NONE;
     }
 
@@ -307,149 +543,57 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev,
         return SHR_E_NO_HANDLER;
     }
 
+    rv = SHR_E_NO_HANDLER;
     list_for_each(list, &dev->filt_list) {
         fc = (struct filt_ctrl *)list;
         filt = &fc->filt;
-        if (filt->flags & NGKNET_FILTER_F_ANY_DATA) {
-            match = 1;
-            break;
-        }
-        if (filt->flags & NGKNET_FILTER_F_MATCH_CHAN && filt->chan != chan_id) {
-            continue;
-        }
-        memcpy(&scratch.data.b[0],
-               &oob[filt->oob_data_offset], filt->oob_data_size);
-        memcpy(&scratch.data.b[filt->oob_data_size],
-               &pkb->data + pkb->pkh.meta_len + filt->pkt_data_offset,
-               filt->pkt_data_size);
-        wsize = NGKNET_BYTES2WORDS(filt->oob_data_size + filt->pkt_data_size);
-        for (idx = 0; idx < wsize; idx++) {
-            scratch.data.w[idx] &= filt->mask.w[idx];
-            if (scratch.data.w[idx] != filt->data.w[idx]) {
-                break;
-            }
-        }
-        if (idx == wsize) {
-            match = 1;
-            break;
-        }
-    }
-
-    if (match) {
-        fc->hits++;
-        if (filt->dest_type == NGKNET_FILTER_DEST_T_CB) {
-            struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb);
-            struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data;
-            filter_cb = fc->filter_cb ? fc->filter_cb : dev->cbc->filter_cb;
-            if (!filter_cb) {
-                spin_unlock_irqrestore(&dev->lock, flags);
-                return SHR_E_UNAVAIL;
-            }
-            cbd->dinfo = &dev->dev_info;
-            cbd->pmd = skb->data + PKT_HDR_SIZE;
-            cbd->pmd_len = pkh->meta_len;
-            cbd->pkt_len = pkh->data_len;
-            cbd->filt = filt;
-            skb = filter_cb(skb, &filt);
-            if (!skb) {
-                *oskb = NULL;
-                spin_unlock_irqrestore(&dev->lock, flags);
-                return SHR_E_NONE;
-            }
-            if (skb != *oskb) {
-                *oskb = skb;
-                pkb = (struct pkt_buf *)skb->data;
-            }
-            if (!filt) {
-                spin_unlock_irqrestore(&dev->lock, flags);
-                return SHR_E_NO_HANDLER;
-            }
-        }
-        switch (filt->dest_type) {
-        case NGKNET_FILTER_DEST_T_NETIF:
-            if (filt->dest_id == 0) {
-                dest_ndev = dev->net_dev;
-            } else {
-                dest_ndev = dev->vdev[filt->dest_id];
+        if (next_filter_match || ngknet_filter_match(dev, chan_id, skb, filt)) {
+            if (next_filter_match && --next_filter_match > 0) {
+                /* Same priority, but not matching */
+                continue;
             }
-            if (dest_ndev) {
-                skb->dev = dest_ndev;
-                if (filt->dest_proto) {
-                    pkb->pkh.attrs |= PDMA_RX_SET_PROTO;
-                    skb->protocol = filt->dest_proto;
+            fc->hits++;
+            fskb = skb;
+            next_list = list->next;
+            same_pri_idx = 0;
+            /* Look for matching filters with same priority */
+            while (next_list != &dev->filt_list) {
+                next_filt = &((struct filt_ctrl *)next_list)->filt;
+                if (next_filt->priority != filt->priority) {
+                    break;
                 }
-                priv = netdev_priv(dest_ndev);
-                priv->users++;
+                same_pri_idx++;
+                if (ngknet_filter_match(dev, chan_id, skb, next_filt)) {
+                    /* Found another matching filter with same priority */
+                    fskb = skb_replicate(skb, GFP_ATOMIC);
+                    next_filter_match = same_pri_idx;
+                    break;
+                }
+                next_list = next_list->next;
             }
-            break;
-        case NGKNET_FILTER_DEST_T_VNET:
-            pkb->pkh.attrs |= PDMA_RX_TO_VNET;
-            spin_unlock_irqrestore(&dev->lock, flags);
-            return SHR_E_NONE;
-        case NGKNET_FILTER_DEST_T_NULL:
-        default:
-            spin_unlock_irqrestore(&dev->lock, flags);
-            return SHR_E_NO_HANDLER;
-        }
-    }
-
-    spin_unlock_irqrestore(&dev->lock, flags);
 
-    if (!dest_ndev) {
-        return SHR_E_NO_HANDLER;
-    } else {
-        *ndev = dest_ndev;
-    }
+            spin_unlock_irqrestore(&dev->lock, flags);
 
-    /* PTP Rx Pre processing */
-    if (priv->hwts_rx_filter) {
-        ngknet_ptp_rx_pre_process(dest_ndev, skb, &cust_hdr_len);
-    }
+            if (filt->dest_type == NGKNET_FILTER_DEST_T_CB) {
+                (void)ngknet_filter_callback(dev, fc, &fskb, &filt);
+            }
 
-    if (filt->flags & NGKNET_FILTER_F_STRIP_TAG) {
-        pkb->pkh.attrs |= PDMA_RX_STRIP_TAG;
-        eth_offset = PKT_HDR_SIZE + pkb->pkh.meta_len + cust_hdr_len;
-        data = skb->data + eth_offset;
-        tpid = data[12] << 8 | data[13];
-        if (tpid == ETH_P_8021Q || tpid == ETH_P_8021AD) {
-            pkb->pkh.data_len -= VLAN_HLEN;
-            memmove(skb->data + VLAN_HLEN, skb->data, eth_offset + 2 * ETH_ALEN);
-            skb_pull(skb, VLAN_HLEN);
-        }
-    }
+            rv = ngknet_filter_process(dev, fskb, filt);
+            if (SHR_FAILURE(rv) && fskb != skb) {
+                dev_kfree_skb_any(fskb);
+            }
 
-    if (dev->cbc->rx_cb) {
-        NGKNET_SKB_CB(skb)->filt = filt;
-    }
+            spin_lock_irqsave(&dev->lock, flags);
 
-    if (filt->mirror_type == NGKNET_FILTER_DEST_T_NETIF) {
-        spin_lock_irqsave(&dev->lock, flags);
-        if (filt->mirror_id == 0) {
-            mirror_ndev = dev->net_dev;
-        } else {
-            mirror_ndev = dev->vdev[filt->mirror_id];
-        }
-        if (mirror_ndev) {
-            mirror_skb = pskb_copy(skb, GFP_ATOMIC);
-            if (mirror_skb) {
-                mirror_skb->dev = mirror_ndev;
-                if (filt->mirror_proto) {
-                    pkb->pkh.attrs |= PDMA_RX_SET_PROTO;
-                    mirror_skb->protocol = filt->mirror_proto;
-                }
-                if (dev->cbc->rx_cb) {
-                    NGKNET_SKB_CB(mirror_skb)->filt = filt;
-                }
-                priv = netdev_priv(mirror_ndev);
-                priv->users++;
-                *mndev = mirror_ndev;
-                *mskb = mirror_skb;
+            if (!next_filter_match) {
+                break;
             }
         }
-        spin_unlock_irqrestore(&dev->lock, flags);
     }
 
-    return SHR_E_NONE;
+    spin_unlock_irqrestore(&dev->lock, flags);
+
+    return rv;
 }
 
 static void
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h
index 3cf955e47e7..fd0dccf824f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h
@@ -109,18 +109,13 @@ ngknet_filter_get_next(struct ngknet_dev *dev, ngknet_filter_t *filter);
  * \brief Filter packet.
  *
  * \param [in] dev Device structure point.
- * \param [in] oskb Rx packet SKB.
- * \param [out] ndev Network interface.
- * \param [out] mskb Mirrored Rx packet SKB.
- * \param [out] mndev Mirrored network interface.
+ * \param [in] skb Rx packet SKB.
  *
  * \retval Matched network interface.
  * \retval NULL No matched network interface.
  */
 extern int
-ngknet_rx_pkt_filter(struct ngknet_dev *dev,
-                     struct sk_buff **oskb, struct net_device **ndev,
-                     struct sk_buff **mskb, struct net_device **mndev);
+ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb);
 
 /*!
  * \brief Rx rate limit control.
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c
index bdc93f90dbd..691eb2d21dd 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c
@@ -405,7 +405,7 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
         ngknet_ptp_rx_hwts_set(ndev, skb);
     }
 
-    /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */
+         /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */
     BUILD_BUG_ON(sizeof(struct ngknet_callback_desc) > sizeof(skb->cb));
 #if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */
     /* Strip SVTAG from the packets injected by the MACSEC block */
@@ -458,6 +458,15 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
     return SHR_E_NONE;
 }
 
+/*!
+ * Get network interface status.
+ */
+static bool
+ngknet_netif_ok(struct net_device *ndev)
+{
+    return (netif_carrier_ok(ndev) && netif_running(ndev));
+}
+
 /*!
  * \brief Network interface Rx function.
  *
@@ -528,6 +537,41 @@ ngknet_netif_recv(struct net_device *ndev, struct sk_buff *skb)
     return SHR_E_NONE;
 }
 
+/*!
+ * \brief Packet Rx callback.
+ *
+ * Take over the control of SKB and send packet to network interface.
+ *
+ * \param [in] ndev Network device structure point.
+ * \param [in] skb Rx packet SKB.
+ */
+static void
+ngknet_pkt_recv(struct net_device *ndev, struct sk_buff *skb)
+{
+    struct ngknet_private *priv = netdev_priv(ndev);
+    struct ngknet_dev *dev = priv->bkn_dev;
+    unsigned long flags;
+
+    /* Send the packet to network interface */
+    if (ngknet_netif_ok(ndev)) {
+        if (SHR_FAILURE(ngknet_netif_recv(ndev, skb))) {
+            dev_kfree_skb_any(skb);
+            if (!netif_queue_stopped(ndev)) {
+                priv->stats.rx_dropped++;
+            }
+        }
+    } else {
+        dev_kfree_skb_any(skb);
+    }
+
+    spin_lock_irqsave(&dev->lock, flags);
+    priv->users--;
+    if (!priv->users && priv->wait) {
+        wake_up(&dev->wq);
+    }
+    spin_unlock_irqrestore(&dev->lock, flags);
+}
+
 /*!
  * \brief Driver Rx callback.
  *
@@ -543,10 +587,7 @@ static int
 ngknet_frame_recv(struct pdma_dev *pdev, int queue, void *buf)
 {
     struct ngknet_dev *dev = (struct ngknet_dev *)pdev->priv;
-    struct sk_buff *skb = (struct sk_buff *)buf, *mskb = NULL;
-    struct net_device *ndev = NULL, *mndev = NULL;
-    struct ngknet_private *priv = NULL;
-    unsigned long flags;
+    struct sk_buff *skb = (struct sk_buff *)buf;
     int rv;
 
     DBG_VERB(("Rx packet (%d bytes).\n", skb->len));
@@ -556,57 +597,10 @@ ngknet_frame_recv(struct pdma_dev *pdev, int queue, void *buf)
 
     DBG_NDEV(("Valid virtual network devices: %ld.\n", (long)dev->vdev[0]));
 
-    /* Go through the filters */
-    rv = ngknet_rx_pkt_filter(dev, &skb, &ndev, &mskb, &mndev);
-    if (!skb) {
-        return SHR_E_NONE;
-    }
+    /* Go through the filters and process it. */
+    rv = ngknet_rx_pkt_filter(dev, skb);
     if (SHR_FAILURE(rv)) {
-        dev_kfree_skb_any(skb);
-        return SHR_E_NONE;
-    } else if (!ndev) {
-        return SHR_E_NO_HANDLER;
-    }
-
-    /* Populate header, checksum status, VLAN, and protocol */
-    priv = netdev_priv(ndev);
-    if (netif_carrier_ok(ndev)) {
-        if (SHR_FAILURE(ngknet_netif_recv(ndev, skb))) {
-            dev_kfree_skb_any(skb);
-            if (!netif_queue_stopped(ndev)) {
-                priv->stats.rx_dropped++;
-            }
-        }
-    } else {
-        dev_kfree_skb_any(skb);
-    }
-
-    spin_lock_irqsave(&dev->lock, flags);
-    priv->users--;
-    if (!priv->users && priv->wait) {
-        wake_up(&dev->wq);
-    }
-    spin_unlock_irqrestore(&dev->lock, flags);
-
-    /* Handle mirrored packet */
-    if (mndev && mskb) {
-        priv = netdev_priv(mndev);
-        if (netif_carrier_ok(mndev)) {
-            if (SHR_FAILURE(ngknet_netif_recv(mndev, mskb))) {
-                dev_kfree_skb_any(mskb);
-                if (!netif_queue_stopped(mndev)) {
-                    priv->stats.rx_dropped++;
-                }
-            }
-        } else {
-            dev_kfree_skb_any(mskb);
-        }
-        spin_lock_irqsave(&dev->lock, flags);
-        priv->users--;
-        if (!priv->users && priv->wait) {
-            wake_up(&dev->wq);
-        }
-        spin_unlock_irqrestore(&dev->lock, flags);
+        return rv;
     }
 
     /* Measure speed */
@@ -670,7 +664,8 @@ ngknet_ptp_tx_config(struct net_device *ndev, struct sk_buff *skb)
     uint64_t *tx_ts = (uint64_t *)skb->cb;
     int rv;
 
-    if (priv->netif.type == NGKNET_NETIF_T_PORT) {
+    if (priv->netif.type == NGKNET_NETIF_T_PORT ||
+        priv->netif.type == NGKNET_NETIF_T_META) {
         rv = ngknet_ptp_tx_meta_set(ndev, skb);
         if (SHR_FAILURE(rv)) {
             return rv;
@@ -772,7 +767,8 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
             return SHR_E_NONE;
         }
         meta_len = 0;
-        if (priv->netif.type == NGKNET_NETIF_T_PORT) {
+        if (priv->netif.type == NGKNET_NETIF_T_PORT ||
+            priv->netif.type == NGKNET_NETIF_T_META) {
             meta_len = priv->netif.meta_len;
             if (!meta_len) {
                 printk("Tx abort: no metadata\n");
@@ -797,7 +793,8 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
         pkh->data_len = skb->len - PKT_HDR_SIZE - meta_len + fcs_len;
         pkh->meta_len = meta_len;
         pkh->attrs = 0;
-        if (priv->netif.type == NGKNET_NETIF_T_PORT) {
+        if (priv->netif.type == NGKNET_NETIF_T_PORT ||
+            priv->netif.type == NGKNET_NETIF_T_META) {
             /* Send to physical port using netif metadata */
             if (priv->netif.meta_off) {
                 memmove(skb->data + PKT_HDR_SIZE,
@@ -1362,7 +1359,6 @@ ngknet_enet_open(struct net_device *ndev)
     /* Prevent tx timeout */
     kal_netif_trans_update(ndev);
 
-    netif_carrier_on(ndev);
     netif_tx_wake_all_queues(ndev);
 
     return 0;
@@ -1382,7 +1378,6 @@ ngknet_enet_stop(struct net_device *ndev)
     int gi, qi;
 
     netif_tx_stop_all_queues(ndev);
-    netif_carrier_off(ndev);
 
     if (priv->netif.id <= 0) {
         /* Stop rate limit */
@@ -1590,7 +1585,8 @@ ngknet_do_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd)
             return -EFAULT;
         }
 
-        if (priv->netif.type != NGKNET_NETIF_T_PORT) {
+        if (priv->netif.type != NGKNET_NETIF_T_PORT &&
+            priv->netif.type != NGKNET_NETIF_T_META) {
             return -ENOSYS;
         }
 
@@ -1822,6 +1818,9 @@ ngknet_ndev_init(ngknet_netif_t *netif, struct net_device **nd)
     ma = netif->macaddr;
     if ((ma[0] | ma[1] | ma[2] | ma[3] | ma[4] | ma[5]) == 0) {
         ngknet_dev_mac[5]++;
+        if (ngknet_dev_mac[5] == 0) {
+            ngknet_dev_mac[4]++;
+        }
         ma = ngknet_dev_mac;
     }
     eth_hw_addr_set(ndev, ma);
@@ -2018,6 +2017,7 @@ ngknet_dev_probe(int dn, ngknet_netif_t *netif)
     priv = netdev_priv(ndev);
     priv->net_dev = ndev;
     priv->bkn_dev = dev;
+    priv->pkt_recv = ngknet_pkt_recv;
 
     netif->id = 0;
     memcpy(netif->macaddr, ndev->dev_addr, ETH_ALEN);
@@ -2071,6 +2071,11 @@ ngknet_dev_probe(int dn, ngknet_netif_t *netif)
     skb_queue_head_init(&dev->ptp_tx_queue);
     INIT_WORK(&dev->ptp_tx_work, ngknet_ptp_tx_work);
 
+    dev->link_wq = create_workqueue("ngknet");
+    if (!dev->link_wq) {
+        return SHR_E_INTERNAL;
+    }
+
     dev->flags |= NGKNET_DEV_ACTIVE;
 
     DBG_NDEV(("Broadcom NGKNET Attached\n"));
@@ -2113,6 +2118,11 @@ ngknet_dev_remove(int dn)
 
     dev->flags &= ~NGKNET_DEV_ACTIVE;
 
+    if (dev->link_wq) {
+        flush_workqueue(dev->link_wq);
+        destroy_workqueue(dev->link_wq);
+    }
+
     skb_queue_purge(&dev->ptp_tx_queue);
 
     if (pdev->mode == DEV_MODE_HNET && dev->hnet_task) {
@@ -2129,7 +2139,6 @@ ngknet_dev_remove(int dn)
     for (di = 1; di <= NUM_VDEV_MAX; di++) {
         ndev = dev->vdev[di];
         if (ndev) {
-            netif_carrier_off(ndev);
             unregister_netdev(ndev);
             free_netdev(ndev);
             dev->vdev[di] = NULL;
@@ -2175,6 +2184,22 @@ ngknet_dev_remove(int dn)
     return rv;
 }
 
+static void
+ngknet_netif_link_process(struct work_struct *work)
+{
+    struct ngknet_private *priv = container_of(work, struct ngknet_private,
+                                               link_work);
+    struct net_device *ndev = priv->net_dev;
+
+    if (netif_carrier_ok(ndev)) {
+        netif_carrier_off(ndev);
+        netif_tx_stop_all_queues(ndev);
+    } else {
+        netif_carrier_on(ndev);
+        netif_tx_wake_all_queues(ndev);
+    }
+}
+
 /*!
  * Network interface functions
  */
@@ -2265,6 +2290,7 @@ ngknet_netif_create(struct ngknet_dev *dev, ngknet_netif_t *netif)
     priv = netdev_priv(ndev);
     priv->net_dev = ndev;
     priv->bkn_dev = dev;
+    priv->pkt_recv = ngknet_pkt_recv;
 
     netif->id = id;
     memcpy(netif->macaddr, ndev->dev_addr, ETH_ALEN);
@@ -2285,6 +2311,8 @@ ngknet_netif_create(struct ngknet_dev *dev, ngknet_netif_t *netif)
         }
     }
 
+    INIT_WORK(&priv->link_work, ngknet_netif_link_process);
+
     DBG_VERB(("Created virtual network device %s (%d).\n",
               ndev->name, priv->netif.id));
 
@@ -2356,7 +2384,6 @@ ngknet_netif_destroy(struct ngknet_dev *dev, int id)
     DBG_VERB(("Removing virtual network device %s (%d).\n",
               ndev->name, priv->netif.id));
 
-    netif_carrier_off(ndev);
     unregister_netdev(ndev);
     free_netdev(ndev);
 
@@ -2464,6 +2491,7 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
     struct ngknet_ioctl ioc;
     struct ngknet_dev *dev = NULL;
     struct net_device *ndev = NULL;
+    struct ngknet_private *priv = NULL;
     struct pdma_dev *pdev = NULL;
     union {
         ngknet_dev_cfg_t dev_cfg;
@@ -2778,7 +2806,7 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
         break;
     case NGKNET_STATS_RESET:
         DBG_CMD(("NGKNET_STATS_RESET\n"));
-        bcmcnet_pdma_dev_stats_reset(pdev);
+        bcmcnet_pdma_dev_stats_reset(pdev, ioc.iarg[0]);
         break;
     case NGKNET_NETIF_CREATE:
         DBG_CMD(("NGKNET_NETIF_CREATE\n"));
@@ -2832,16 +2860,17 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
             break;
         }
         ndev = dev->vdev[netif->id];
+        priv = netdev_priv(ndev);
         if (ioc.iarg[1]) {
             if (!netif_carrier_ok(ndev)) {
-                netif_carrier_on(ndev);
-                netif_tx_wake_all_queues(ndev);
+                queue_work(dev->link_wq, &priv->link_work);
+                flush_work(&priv->link_work);
                 DBG_LINK(("%s: link up\n", netif->name));
             }
         } else {
             if (netif_carrier_ok(ndev)) {
-                netif_carrier_off(ndev);
-                netif_tx_stop_all_queues(ndev);
+                queue_work(dev->link_wq, &priv->link_work);
+                flush_work(&priv->link_work);
                 DBG_LINK(("%s: link down\n", netif->name));
             }
         }
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h
index ddff0430155..852bac334b7 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h
@@ -58,6 +58,9 @@
 #define DBG_RATE(_s)        do { if (debug & DBG_LVL_RATE) printk _s; } while (0)
 #define DBG_LINK(_s)        do { if (debug & DBG_LVL_LINK) printk _s; } while (0)
 
+/* Take over the control of SKB and send packet to network interface. */
+typedef void (*ngknet_pkt_recv_f)(struct net_device *ndev, struct sk_buff *skb);
+
 
 /* FIXME: SAI_FIXUP */
 #define SAI_FIXUP           1
@@ -133,6 +136,9 @@ struct ngknet_dev {
     /*! PTP Tx work */
     struct work_struct ptp_tx_work;
 
+    /*! NGKNET work queue for link process */
+    struct workqueue_struct *link_wq;
+
     /*! Flags */
     int flags;
     /*! NGKNET device is active */
@@ -155,6 +161,12 @@ struct ngknet_private {
     /*! Network interface */
     ngknet_netif_t netif;
 
+    /*! Packet receive callback */
+    ngknet_pkt_recv_f pkt_recv;
+
+    /*! Link work */
+    struct work_struct link_work;
+
     /*! Users of this network interface */
     int users;
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c
index 37ce61fcc3a..8527fb6a236 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c
@@ -378,27 +378,27 @@ proc_pkt_stats_show(struct seq_file *m, void *v)
         }
 
         stats = &dev->pdma_dev.stats;
-        seq_printf(m, "rx_packets:     %llu\n", (unsigned long long)stats->rx_packets);
-        seq_printf(m, "rx_bytes:       %llu\n", (unsigned long long)stats->rx_bytes);
+        seq_printf(m, "rx_packets:     %llu\n", (unsigned long long)stats->rxqs.packets);
+        seq_printf(m, "rx_bytes:       %llu\n", (unsigned long long)stats->rxqs.bytes);
         for (qi = 0; qi < dev->pdma_dev.ctrl.nb_rxq; qi++) {
-            seq_printf(m, "rx_packets[%d]:  %llu\n", qi, (unsigned long long)stats->rxq_packets[qi]);
-            seq_printf(m, "rx_bytes[%d]:    %llu\n", qi, (unsigned long long)stats->rxq_bytes[qi]);
+            seq_printf(m, "rx_packets[%d]:  %llu\n", qi, (unsigned long long)stats->rxq[qi].packets);
+            seq_printf(m, "rx_bytes[%d]:    %llu\n", qi, (unsigned long long)stats->rxq[qi].bytes);
         }
-        seq_printf(m, "rx_dropped:     %llu\n", (unsigned long long)stats->rx_dropped);
-        seq_printf(m, "rx_errors:      %llu\n", (unsigned long long)stats->rx_errors);
-        seq_printf(m, "rx_head_errors: %llu\n", (unsigned long long)stats->rx_head_errors);
-        seq_printf(m, "rx_data_errors: %llu\n", (unsigned long long)stats->rx_data_errors);
-        seq_printf(m, "rx_cell_errors: %llu\n", (unsigned long long)stats->rx_cell_errors);
-        seq_printf(m, "rx_nomems:      %llu\n", (unsigned long long)stats->rx_nomems);
-        seq_printf(m, "tx_packets:     %llu\n", (unsigned long long)stats->tx_packets);
-        seq_printf(m, "tx_bytes:       %llu\n", (unsigned long long)stats->tx_bytes);
+        seq_printf(m, "rx_dropped:     %llu\n", (unsigned long long)stats->rxqs.dropped);
+        seq_printf(m, "rx_errors:      %llu\n", (unsigned long long)stats->rxqs.errors);
+        seq_printf(m, "rx_head_errors: %llu\n", (unsigned long long)stats->rxqs.head_errors);
+        seq_printf(m, "rx_data_errors: %llu\n", (unsigned long long)stats->rxqs.data_errors);
+        seq_printf(m, "rx_cell_errors: %llu\n", (unsigned long long)stats->rxqs.cell_errors);
+        seq_printf(m, "rx_nomems:      %llu\n", (unsigned long long)stats->rxqs.nomems);
+        seq_printf(m, "tx_packets:     %llu\n", (unsigned long long)stats->txqs.packets);
+        seq_printf(m, "tx_bytes:       %llu\n", (unsigned long long)stats->txqs.bytes);
         for (qi = 0; qi < dev->pdma_dev.ctrl.nb_txq; qi++) {
-            seq_printf(m, "tx_packets[%d]:  %llu\n", qi, (unsigned long long)stats->txq_packets[qi]);
-            seq_printf(m, "tx_bytes[%d]:    %llu\n", qi, (unsigned long long)stats->txq_bytes[qi]);
+            seq_printf(m, "tx_packets[%d]:  %llu\n", qi, (unsigned long long)stats->txq[qi].packets);
+            seq_printf(m, "tx_bytes[%d]:    %llu\n", qi, (unsigned long long)stats->txq[qi].bytes);
         }
-        seq_printf(m, "tx_dropped:     %llu\n", (unsigned long long)stats->tx_dropped);
-        seq_printf(m, "tx_errors:      %llu\n", (unsigned long long)stats->tx_errors);
-        seq_printf(m, "tx_xoffs:       %llu\n", (unsigned long long)stats->tx_xoffs);
+        seq_printf(m, "tx_dropped:     %llu\n", (unsigned long long)stats->txqs.dropped);
+        seq_printf(m, "tx_errors:      %llu\n", (unsigned long long)stats->txqs.errors);
+        seq_printf(m, "tx_xoffs:       %llu\n", (unsigned long long)stats->txqs.xoffs);
         seq_printf(m, "interrupts:     %llu\n", (unsigned long long)stats->intrs);
     }
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild
index 739743f7b0f..e9b4a476232 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild
@@ -23,8 +23,7 @@ INCLUDES := -I$(OUTPUT_DIR)/knet/generated/include -I$(OUTPUT_DIR)/knet/generate
 endif
 obj-m := linux_ngknetcb.o
 
-ccflags-y := $(KNETCB_CPPFLAGS) $(LKM_CFLAGS) \
-             $(SDK_PMD_KFLAGS) \
+ccflags-y := $(SDK_PMD_KFLAGS) $(LKM_CFLAGS) $(LKM_CPPFLAGS) \
              -I$(SDK)/shr/include \
              -I$(SDK)/bcmdrd/include \
              -I$(SDK)/bcmltd/include \
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Kbuild
index 2a260731f07..b219dbfb084 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Kbuild
@@ -2,12 +2,25 @@
 #
 # Linux PTP Clock module.
 #
-# $Copyright:.$
+# Copyright 2018-2024 Broadcom. All rights reserved.
+# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+# 
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License 
+# version 2 as published by the Free Software Foundation.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# A copy of the GNU General Public License version 2 (GPLv2) can
+# be found in the LICENSES folder.
 #
 
 obj-m := linux_ngptpclock.o
 
-ccflags-y := $(LKM_CFLAGS) \
+ccflags-y := $(LKM_CFLAGS) $(LKM_CPPFLAGS) \
              -I$(SDK)/shr/include \
              -I$(SDK)/bcmdrd/include \
              -I$(SDK)/linux/include \
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Makefile
index 9757bbff804..15b7b553fe6 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Makefile
@@ -1,5 +1,18 @@
 #
-# $Copyright: Broadcom Ltd.$
+# Copyright 2018-2024 Broadcom. All rights reserved.
+# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+# 
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License 
+# version 2 as published by the Free Software Foundation.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# A copy of the GNU General Public License version 2 (GPLv2) can
+# be found in the LICENSES folder.
 #
 # Linux PTP clock module.
 #
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/ngptpclock_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/ngptpclock_main.c
index 2ed0e48fcf0..95c76731b0e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/ngptpclock_main.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/ngptpclock_main.c
@@ -6,20 +6,28 @@
 /*
  * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- *
+ * 
  * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
+ * modify it under the terms of the GNU General Public License 
  * version 2 as published by the Free Software Foundation.
- *
+ * 
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- *
+ * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
  * be found in the LICENSES folder.
  */
 
+/*
+ * This module implements a Linux PTP Clock driver for Broadcom
+ * XGS switch devices.
+ *
+ * - All the data structures and functions work on the physical port.
+ *   For array indexing purposes, we use (phy_port - 1).
+ */
+
 #include <linux/module.h>
 #include <linux/version.h>
 #include <lkm/ngptpclock_ioctl.h>
@@ -28,7 +36,8 @@ MODULE_AUTHOR("Broadcom Corporation");
 MODULE_DESCRIPTION("PTP Clock Driver for Broadcom XGS Switch");
 MODULE_LICENSE("GPL");
 
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,0)
+#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,0)) && \
+            (LINUX_VERSION_CODE < KERNEL_VERSION(6,0,0)))
 #define NGPTPCLOCK_SUPPORT
 #endif
 
@@ -130,9 +139,9 @@ static int pci_cos;
     } while (0)
 
 
-/* FIXME : SDKLT-38745
- * Check for cmic type dynamically
- */
+
+
+
 #define CMICX_DEV_TYPE              1
 
 /* CMIC MCS-0 SCHAN Messaging registers */
@@ -1489,10 +1498,10 @@ int ngptpclock_ptp_hw_tstamp_rx_time_upscale(struct sk_buff *skb, uint64_t *ts)
     DBG_RX_DUMP(("rxtime_upscale: Incoming packet: \n"));
     if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(skb->data, skb->len);
 
-    /* FIXME : SDKLT-38745
-     * Verify cos_q in meta data.
-     * Example: if (pci_cos != (meta[4] & 0x3F)) {}
-     */
+
+
+
+
 
     /* parse custom encap header in pkt for ptp rxtime */
     custom_encap_len = ngptpclock_pkt_custom_encap_ptprx_get((skb->data), ts);
@@ -1601,9 +1610,9 @@ int ngptpclock_ptp_hw_tstamp_tx_meta_set(struct sk_buff *skb)
     negCurTS32 = - (int32_t) ptpcounter;
     negCurTS64 = - (int64_t)(ptpcounter);
 
-    /* FIXME : SDKLT-38745
-     * Get packet header length. Current default length 32byte.
-     */
+
+
+
     if (CMICX_DEV_TYPE) {
         pkt_offset = ptp_hdr_offset = hdrlen + 32;
     }
@@ -2732,11 +2741,11 @@ ngptpclock_ptp_dma_init(int dcb_type, int dev_no)
     int num_pports = 256;
     int mem_size = 16384; /*sizeof(ngptpclock_info_t);*/
 
-
     ptp_priv->num_pports = num_pports;
     ptp_priv->dcb_type = dcb_type;
 
     ngptpclock_ptp_fw_data_alloc(dev_no);
+
     if (ptp_priv->shared_addr == NULL) {
         ptp_priv->shared_addr = kzalloc(16384, GFP_KERNEL);
         ptp_priv->port_stats = kzalloc((sizeof(ngptpclock_port_stats_t) * num_pports), GFP_KERNEL);
@@ -2759,7 +2768,6 @@ ngptpclock_ptp_dma_init(int dcb_type, int dev_no)
 
     }
 
-
     DBG_VERB(("%s %p:%p, dcb_type: %d\n", __FUNCTION__, ptp_priv->base_addr,
                 (void *)ptp_priv->shared_addr, dcb_type));
 
@@ -2805,9 +2813,9 @@ ngptpclock_ioctl_cmd_handler(ngknet_dev_info_t *dev_info, int cmd, char *data, i
                 memcpy(ieee1588_ipv4pkt_md, &cfg_data[36], sizeof(ieee1588_ipv4pkt_md));
                 memcpy(ieee1588_ipv6pkt_md, &cfg_data[60], sizeof(ieee1588_ipv6pkt_md));
 
-                /* FIXME : SDKLT-38745
-                 * Device dcb_type, currently set to 1.
-                 */
+
+
+
                 ngptpclock_ptp_dma_init(1, dev_info->dev_no);
 
                 fw_status = 0;
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/st/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/st/Kbuild
new file mode 100644
index 00000000000..345481dd4b7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/st/Kbuild
@@ -0,0 +1,27 @@
+# -*- Kbuild -*-
+#
+# Linux Streaming Telemetry kernel module.
+#
+# Copyright 2018-2025 Broadcom. All rights reserved.
+# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+# 
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License 
+# version 2 as published by the Free Software Foundation.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# A copy of the GNU General Public License version 2 (GPLv2) can
+# be found in the LICENSES folder.
+#
+
+obj-m := linux_ngst.o
+
+ccflags-y := $(LKM_CFLAGS) $(LKM_CPPFLAGS) \
+             -I$(SDK)/shr/include \
+             -I$(SDK)/linux/include \
+
+linux_ngst-y := ngst_main.o
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/st/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/st/Makefile
new file mode 100644
index 00000000000..181fc7117fc
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/st/Makefile
@@ -0,0 +1,32 @@
+#
+# Copyright 2018-2025 Broadcom. All rights reserved.
+# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+# 
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License 
+# version 2 as published by the Free Software Foundation.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# A copy of the GNU General Public License version 2 (GPLv2) can
+# be found in the LICENSES folder.
+#
+# Linux Streaming Telemetry kernel module.
+#
+
+include Kbuild
+
+ifeq ($(KERNELRELEASE),)
+
+MOD_NAME = linux_ngst
+
+include $(SDK)/make/lkm.mk
+
+endif
+
+.PHONY: distclean
+
+distclean::
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/st/ngst_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/st/ngst_main.c
new file mode 100644
index 00000000000..c908b53d354
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/st/ngst_main.c
@@ -0,0 +1,320 @@
+/*! \file ngst_main.c
+ *
+ * Streaming Telemetry support module entry.
+ *
+ */
+/*
+ * Copyright 2018-2025 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ */
+
+#include <lkm/lkm.h>
+#include <lkm/ngbde_kapi.h>
+#include <lkm/ngst_ioctl.h>
+#include <lkm/ngst_netlink.h>
+#include <linux/netlink.h>
+#include <linux/skbuff.h>
+#include <net/netlink.h>
+#include <net/sock.h>
+#include <net/net_namespace.h>
+
+/*! \cond */
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("Streaming Telemetry Support Module");
+MODULE_LICENSE("GPL");
+/*! \endcond */
+
+/*! Maximum number of switch devices supported. */
+#ifndef NGST_NUM_SWDEV_MAX
+#define NGST_NUM_SWDEV_MAX     NGBDE_NUM_SWDEV_MAX
+#endif
+
+/*! Switch device descriptor. */
+typedef struct st_dev_s {
+
+    /*! Logical address of DMA pool. */
+    void *dma_vaddr;
+
+    /*! Logical address of buffer pool. */
+    void *dma_buff_addr_va;
+
+    /*! Physical address of DMA pool. */
+    dma_addr_t dma_handle;
+
+    /*! Size of DMA memory (in bytes). */
+    size_t dma_size;
+
+    /*! Buffer chunk size (in bytes). */
+    uint32_t buff_chunk_size;
+
+    /*! Buffer chunk count. */
+    uint32_t buff_chunk_cnt;
+
+    /*! Buffer read pointer. */
+    uint32_t buff_rd_ptr;
+
+    /*! Buffer write pointer. */
+    uint32_t buff_wr_ptr;
+
+    /*! Linux DMA device associated with DMA pool. */
+    struct device *dma_dev;
+
+} st_dev_t;
+
+static st_dev_t stdevs[NGST_NUM_SWDEV_MAX];
+
+/*! Netlink socket. */
+static struct sock *nl_sk;
+
+/*! Send netlink message to user-space. */
+static void
+ngst_nl_msg_send(int unit, int pid, int msg_type, const char *payload)
+{
+    struct nlmsghdr *nlh;
+    struct sk_buff *skb_out;
+    int res;
+    int msg_size;
+    uint32_t payload_size;
+    st_dev_t *stdev;
+
+    struct ngst_nl_msg_hdr_s rsp = {
+        .unit = unit,
+        .msg_type = msg_type,
+    };
+
+    stdev = &stdevs[unit];
+    switch (msg_type) {
+        case NGST_NL_MSG_TYPE_ST_DATA_NOT_READY:
+            msg_size = sizeof(struct ngst_nl_msg_hdr_s);
+            skb_out = nlmsg_new(msg_size, 0);
+            if (!skb_out) {
+                printk(KERN_ERR "Failed to allocate new skb for reply\n");
+                return;
+            }
+
+            nlh = nlmsg_put(skb_out, 0, 0, NLMSG_DONE, msg_size, 0);
+            NETLINK_CB(skb_out).dst_group = 0;
+            memcpy(nlmsg_data(nlh), &rsp, msg_size);
+
+            break;
+        case NGST_NL_MSG_TYPE_ST_DATA_RSP:
+            payload_size = stdev->buff_chunk_size;
+            msg_size = sizeof(struct ngst_nl_msg_hdr_s) + payload_size;
+            skb_out = nlmsg_new(msg_size, 0);
+            if (!skb_out) {
+                printk(KERN_ERR "Failed to allocate new skb for reply\n");
+                return;
+            }
+
+            nlh = nlmsg_put(skb_out, 0, 0, NLMSG_DONE, msg_size, 0);
+            NETLINK_CB(skb_out).dst_group = 0;
+            memcpy(nlmsg_data(nlh), &rsp, sizeof(struct ngst_nl_msg_hdr_s));
+            memcpy(nlmsg_data(nlh) + sizeof(struct ngst_nl_msg_hdr_s),
+                   payload, payload_size);
+            break;
+        default:
+            return;
+    }
+
+    res = nlmsg_unicast(nl_sk, skb_out, pid);
+    if (res < 0) {
+        printk(KERN_INFO "Error while sending back to user: %d\n", res);
+    }
+
+    return;
+}
+
+
+/*! Receive netlink message from user-space. */
+static void
+ngst_nl_msg_recv(struct sk_buff *skb)
+{
+    struct nlmsghdr *nlh;
+    struct ngst_nl_msg_hdr_s *rcv_nlmsg;
+    struct ngst_nl_msg_hdr_s *st_data_req_msg;
+    void *cur_dma_vaddr = NULL;
+    int user_pid, unit;
+    st_dev_t *stdev;
+
+    nlh = (struct nlmsghdr *)skb->data;
+    user_pid = nlh->nlmsg_pid;
+    rcv_nlmsg = (struct ngst_nl_msg_hdr_s *)nlmsg_data(nlh);
+
+    unit = rcv_nlmsg->unit;
+    if (unit < 0 || unit > NGST_NUM_SWDEV_MAX) {
+        return;
+    }
+    stdev = &stdevs[rcv_nlmsg->unit];
+
+    if (rcv_nlmsg->msg_type == NGST_NL_MSG_TYPE_ST_DATA_REQ) {
+        if (!stdev->dma_vaddr) {
+            ngst_nl_msg_send(unit, user_pid,
+                             NGST_NL_MSG_TYPE_ST_DATA_NOT_READY, NULL);
+            return;
+        }
+        stdev->buff_wr_ptr = *((uint32_t *)(stdev->dma_vaddr));
+        st_data_req_msg = (struct ngst_nl_msg_hdr_s *)nlmsg_data(nlh);
+
+        stdev->buff_rd_ptr =
+            stdev->buff_rd_ptr == stdev->buff_chunk_cnt ? 0 : stdev->buff_rd_ptr;
+        if (stdev->buff_wr_ptr != stdev->buff_rd_ptr) {
+            cur_dma_vaddr = stdev->dma_buff_addr_va +
+                            (stdev->buff_rd_ptr * stdev->buff_chunk_size);
+            ngst_nl_msg_send(unit, user_pid,
+                             NGST_NL_MSG_TYPE_ST_DATA_RSP, cur_dma_vaddr);
+            stdev->buff_rd_ptr = stdev->buff_wr_ptr;
+        } else {
+            ngst_nl_msg_send(unit, user_pid,
+                             NGST_NL_MSG_TYPE_ST_DATA_NOT_READY, NULL);
+        }
+    }
+
+    return;
+}
+
+/*!
+ * Generic module functions
+ */
+
+static int
+ngst_open(struct inode *inode, struct file *filp)
+{
+    return 0;
+}
+
+static int
+ngst_release(struct inode *inode, struct file *filp)
+{
+    return 0;
+}
+
+static long
+ngst_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    struct ngst_ioc_dma_info_s ioc;
+    st_dev_t *stdev;
+
+    switch (cmd) {
+        case NGST_IOC_DMA_INFO:
+            if (copy_from_user(&ioc,
+                               (struct ngst_ioc_dma_info_s __user *)arg,
+                               sizeof(ioc)))
+                return ~EFAULT;
+
+            if (ioc.chunk_cnt == 0 || ioc.size == 0) {
+                return 0;
+            }
+            stdev = &stdevs[ioc.unit];
+            stdev->dma_dev = ngbde_kapi_dma_dev_get(ioc.unit);
+            if (!stdev->dma_dev) {
+                printk(KERN_INFO "Not Found ST dev %d\n", ioc.unit);
+                return ~EFAULT;
+            }
+
+            if (!stdev->dma_vaddr) {
+                /* Including write pointer size */
+                stdev->dma_size = ioc.size + sizeof(uint32_t);
+                stdev->dma_vaddr = dma_alloc_coherent(stdev->dma_dev,
+                                                      stdev->dma_size,
+                                                      &stdev->dma_handle,
+                                                      GFP_KERNEL);
+                if (!stdev->dma_vaddr) {
+                    printk(KERN_ERR "Error allocating DMA buffer\n");
+                    return ~ENOMEM;
+                } else {
+                    printk(KERN_INFO "DMA buffer allocated successfully\n");
+                }
+                memset((void *)stdev->dma_vaddr, 0, stdev->dma_size);
+                stdev->dma_buff_addr_va = stdev->dma_vaddr + sizeof(uint32_t);
+
+                stdev->buff_chunk_cnt = ioc.chunk_cnt;
+                stdev->buff_chunk_size = ioc.size / ioc.chunk_cnt;
+            } else {
+                if ((stdev->buff_chunk_cnt != ioc.chunk_cnt) ||
+                    (stdev->buff_chunk_size != ioc.size / ioc.chunk_cnt)) {
+                    printk(KERN_ERR "DMA buffer is already allocated.n");
+                    return ~EFAULT;
+                }
+            }
+
+            ioc.paddr = (uint64_t)stdev->dma_handle;
+            if (copy_to_user((struct ngst_ioc_dma_info_s __user *)arg,
+                             &ioc, sizeof(ioc)))
+                return ~EFAULT;
+            break;
+
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+static struct file_operations ngst_fops = {
+    .open = ngst_open,
+    .release = ngst_release,
+    .unlocked_ioctl = ngst_ioctl,
+    .compat_ioctl = ngst_ioctl,
+};
+
+static void __exit
+ngst_exit_module(void)
+{
+    int unit;
+    st_dev_t *stdev;
+
+    unregister_chrdev(NGST_MODULE_MAJOR, NGST_MODULE_NAME);
+
+    if (nl_sk) {
+        netlink_kernel_release(nl_sk);
+    }
+
+    for (unit = 0; unit < NGST_NUM_SWDEV_MAX; unit++) {
+        stdev = &stdevs[unit];
+
+        if (stdev->dma_vaddr) {
+            dma_free_coherent(stdev->dma_dev, stdev->dma_size,
+                              stdev->dma_vaddr, stdev->dma_handle);
+        }
+    }
+    printk(KERN_INFO "Broadcom NGST unloaded successfully.\n");
+}
+
+static int __init
+ngst_init_module(void)
+{
+    int rv;
+    struct netlink_kernel_cfg cfg = {
+        .input = ngst_nl_msg_recv,
+    };
+
+    rv = register_chrdev(NGST_MODULE_MAJOR, NGST_MODULE_NAME, &ngst_fops);
+    if (rv < 0) {
+        printk(KERN_WARNING "%s: can't get major %d\n",
+               NGST_MODULE_NAME, NGST_MODULE_MAJOR);
+        return rv;
+    }
+
+    nl_sk = netlink_kernel_create(&init_net, NGST_NETLINK_PROTOCOL, &cfg);
+    if (!nl_sk) {
+        printk(KERN_WARNING "%s: Unable to create netlink socket\n",
+               NGST_MODULE_NAME);
+        return -EFAULT;
+    }
+    printk(KERN_INFO "Broadcom NGST loaded successfully\n");
+    return 0;
+}
+
+module_exit(ngst_exit_module);
+module_init(ngst_init_module);
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h
index 856c8edbb1e..36bbc2b0c36 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h
@@ -285,6 +285,11 @@ extern int lkbde_intr_cb_register(int d,
 extern int lkbde_get_dev_pci_info(int d, uint32_t *bus,
                                   uint32_t *slot, uint32_t *func);
 
+/*
+ * Get the iproc version number for a device.
+ */
+extern int lkbde_iproc_version_get(int d, uint32 *iproc_ver);
+
 #ifdef INCLUDE_SRAM_DMA
 #ifdef SRAM_DMA_NEEDS_KERNEL_APIS
 extern void _update_apis_for_sram_dma();
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c
index 757eb1a5a52..b3a5ddbac3f 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c
@@ -111,6 +111,13 @@ LKM_MOD_PARAM(usemsi, "i", int, 0);
 MODULE_PARM_DESC(usemsi,
 "Use MSI/ MSIX interrupts if supported by kernel");
 
+/* Check system support msi or not */
+static int msi_check = 1;
+LKM_MOD_PARAM(msi_check, "i", int, (S_IRUGO | S_IWUSR));
+MODULE_PARM_DESC(msi_check,
+"Do not check msi supporting (default 1");
+
+
 /* Ignore all recognized devices (for debug purposes) */
 int nodevices;
 LKM_MOD_PARAM(nodevices, "i", int, 0);
@@ -1244,18 +1251,10 @@ static const struct pci_device_id _id_table[] = {
     { BROADCOM_VENDOR_ID, BCM56684_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56700_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56701_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56720_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56721_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56725_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56800_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56801_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56802_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56803_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56820_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56821_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56822_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56823_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56825_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56630_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56634_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56636_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
@@ -1268,8 +1267,6 @@ static const struct pci_device_id _id_table[] = {
     { BROADCOM_VENDOR_ID, BCM56524_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56526_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56534_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56685_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56689_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56331_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56333_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56334_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
@@ -1278,13 +1275,6 @@ static const struct pci_device_id _id_table[] = {
     { BROADCOM_VENDOR_ID, BCM56321_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56132_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56134_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56140_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56142_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56143_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56144_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56146_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56147_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56149_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56150_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56151_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56152_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
@@ -1356,8 +1346,6 @@ static const struct pci_device_id _id_table[] = {
     { BROADCOM_VENDOR_ID, BCM56243_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56245_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56246_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM55450_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM55455_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56260_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56270_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56271_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
@@ -1381,14 +1369,6 @@ static const struct pci_device_id _id_table[] = {
     { BROADCOM_VENDOR_ID, BCM56467_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56468_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56246_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56248_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56450_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56452_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56454_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56455_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56456_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56457_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM56458_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56850_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56851_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56852_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
@@ -1757,16 +1737,16 @@ static const struct pci_device_id _id_table[] = {
     { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, Q3A_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, Q3U_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, Q3U_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, Q3U_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, Q3U_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, Q3U_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, Q3N_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, Q3N_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, Q3N_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, Q3N_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, Q3N_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3U_ORIG_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3U_ORIG_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3U_ORIG_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3U_ORIG_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3U_ORIG_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3N_ORIG_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3N_ORIG_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3N_ORIG_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3N_ORIG_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3N_ORIG_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID },
 #endif
 #endif
 #endif /* BCM_DNX_SUPPORT */
@@ -2230,7 +2210,10 @@ _shbde_log_func(int level, const char *str, int param)
 {
     level = (level >= SHBDE_DBG) ? 1 : 0;
     if (debug >= level) {
-        gprintk("%s (%d)\n", str, param);
+        char *klvl = (level == 0) ? KERN_WARNING : "";
+        printk("%s%s (%d): %s 0x%08x (%d)\n",
+               klvl, LINUX_KERNEL_BDE_NAME, current->pid,
+               str, param, param);
     }
 }
 /*
@@ -2455,7 +2438,7 @@ config_pci_intr_type(struct pci_dev *dev, bde_ctrl_t *ctrl, int iproc)
     }
 #endif
 
-    if (ctrl->use_msi == PCI_USE_INT_MSI) {
+    if (msi_check && (ctrl->use_msi == PCI_USE_INT_MSI)) {
         /* check for support MSI vector */
         ret = pci_enable_msi(ctrl->pci_device);
         if (ret < 0) {
@@ -2892,11 +2875,30 @@ _pci_probe(struct pci_dev *dev, const struct pci_device_id *ent)
         /* iProc configuration parameters */
         (void)shbde_pci_iproc_version_get(shbde, dev, &icfg->iproc_ver,
                                           &icfg->cmic_ver, &icfg->cmic_rev);
+
+#ifdef BCM_Q3A_SUPPORT
+        if (((ctrl->bde_dev.device & 0xfff0) == 0x8400) && (icfg->iproc_ver == 20)) {
+            /* Workaround for conflicting between Q3u,n devices and Greyhound */
+            ctrl->bde_dev.device |= 0xA0;       /* 0x840x -> 0x84ax */
+
+            if (debug >= 2) {
+                gprintk("new dev ID = 0x%x\n", ctrl->bde_dev.device);
+            }
+        }
+#endif
         shbde_iproc_config_init(icfg, ctrl->bde_dev.device, ctrl->bde_dev.rev);
 
         if (debug >= 2) {
-            gprintk("iproc version = 0x%x dma_hi_bits  =  0x%x\n", icfg->iproc_ver, icfg->dma_hi_bits);
+            gprintk("iproc version = 0x%x dma_hi_bits = 0x%x\n",
+                    icfg->iproc_ver, icfg->dma_hi_bits);
         }
+
+        /*
+         * Do not allow iProc sub-window remapping on the fly as this may
+         * corrupt iProc access from user space.
+         */
+        icfg->no_subwin_remap = 1;
+
         icfg->use_msi = ctrl->use_msi;
 
         /* Call shared function */
@@ -3029,12 +3031,6 @@ _pci_remove(struct pci_dev* dev)
         gprintk("PCI device %04x:%04x is removed. \n",
                 dev->vendor, dev->device);
     }
-    if (ctrl->bde_dev.base_address1) {
-        iounmap((void *)ctrl->bde_dev.base_address1);
-    }
-    if (ctrl->bde_dev.base_address) {
-        iounmap((void *)ctrl->bde_dev.base_address);
-    }
 
     /* Free our interrupt handler, if we have one */
     if (ctrl->isr || ctrl->isr2) {
@@ -3059,6 +3055,13 @@ _pci_remove(struct pci_dev* dev)
     ctrl->isr_data = NULL;
     ctrl->isr2 = NULL;
     ctrl->isr2_data = NULL;
+
+    if (ctrl->bde_dev.base_address1) {
+        iounmap((void *)ctrl->bde_dev.base_address1);
+    }
+    if (ctrl->bde_dev.base_address) {
+        iounmap((void *)ctrl->bde_dev.base_address);
+    }
 }
 
 static struct pci_driver _device_driver = {
@@ -4993,6 +4996,26 @@ lkbde_irq_status_get(int d, uint32_t addr, uint32 *status)
     return 0;
 }
 
+int
+lkbde_iproc_version_get(int d, uint32 *iproc_ver)
+{
+    bde_ctrl_t *ctrl;
+    shbde_iproc_config_t icfg;
+
+    if (!VALID_DEVICE(d)) {
+        return -1;
+    }
+    ctrl = _devices + d;
+
+    if (shbde_pci_iproc_version_get(&ctrl->shbde, ctrl->pci_device, &icfg.iproc_ver,
+                                    &icfg.cmic_ver, &icfg.cmic_rev)) {
+        *iproc_ver = icfg.iproc_ver;
+        return 0;
+    }
+
+    return -1;
+}
+
 int
 lkbde_get_num_devices(int type)
 {
@@ -5142,6 +5165,7 @@ LKM_EXPORT_SYM(lkbde_is_dev_managed_by_instance);
 LKM_EXPORT_SYM(lkbde_get_inst_devs);
 LKM_EXPORT_SYM(lkbde_intr_cb_register);
 LKM_EXPORT_SYM(lkbde_get_dev_pci_info);
+LKM_EXPORT_SYM(lkbde_iproc_version_get);
 #ifdef INCLUDE_SRAM_DMA
 LKM_EXPORT_SYM(lkbde_get_sram_dma_info);
 #endif /* INCLUDE_SRAM_DMA */
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c
index 3b12b4a914d..da21588191c 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c
@@ -139,6 +139,9 @@ MODULE_LICENSE("GPL");
 #define CMICX_GEN2_PAXB_0_INTC_SET_INTR_ENABLE_REG0      (0x0292d100)
 #define CMICX_GEN2_PAXB_0_INTC_CLEAR_INTR_ENABLE_REG0    (0x0292d128)
 
+#define CMICX_GEN2_PAXB_0_SW_PROG_INTR_ENABLE      (0x292cf8c)
+#define CMICX_GEN2_PAXB_0_SW_PROG_INTR_CLR        (0x292cf98)
+
 #define CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_BASE           (CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_REG0)
 #define CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_BASE           (CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_REG0)
 #define CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_BASE       (CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_REG0)
@@ -240,6 +243,13 @@ LKM_MOD_PARAM(debug, "i", int, (S_IRUGO | S_IWUSR));
 MODULE_PARM_DESC(debug,
 "Set debug level (default 0).");
 
+#if defined(BCM_DNX3_SUPPORT) || defined(BCM_DNXF3_SUPPORT)
+/* Force mask interrupts before PCIe remove */
+static int force_mask_irq = 0;
+LKM_MOD_PARAM(force_mask_irq, "i", int, (S_IRUGO | S_IWUSR));
+MODULE_PARM_DESC(force_mask_irq, "Force mask interrupts when pcie remove (default 0)");
+#endif
+
 static ibde_t *user_bde = NULL;
 
 typedef void (*isr_f)(void *);
@@ -671,10 +681,17 @@ _cmicx_gen2_interrupt(bde_ctrl_t *ctrl)
     uint32 stat, iena, mask, fmask;
     int active_interrupts = 0;
     bde_inst_resource_t *res;
-    uint32 intrs = 0;
+    uint32 intrs = 0, dev_state = 0;
 
     intr_count++;
     d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t));
+
+    (void)lkbde_dev_state_get(d, &dev_state);
+    if (dev_state == BDE_DEV_STATE_REMOVED) {
+        /* Return directly if PCIe device was removed */
+        return;
+    }
+
     res = &_bde_inst_resource[ctrl->inst];
 
     /** Get MSI clear mode, auto clear or SW clear, must be configure same for 64 MSI/MSIx vectors */
@@ -1472,6 +1489,54 @@ _cleanup(void)
         for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) {
             if (_devices[i].enabled &&
                 BDE_DEV_MEM_MAPPED(_devices[i].dev_type)) {
+
+#if defined(BCM_DNX3_SUPPORT) || defined(BCM_DNXF3_SUPPORT)
+                /** before disconnect interrupt, mask it */
+                if (force_mask_irq) {
+                    bde_ctrl_t *ctrl;
+                    int ind;
+                    switch (user_bde->get_dev(i)->device & DNXC_DEVID_FAMILY_MASK) {
+#ifdef BCM_DNX3_SUPPORT
+                        case JERICHO3_DEVICE_ID:
+                        case J3AI_DEVICE_ID:
+                        case Q3D_DEVICE_ID:
+#ifdef BCM_Q3A_SUPPORT
+                        case Q3A_DEVICE_ID:
+                        case Q3U_DEVICE_ID:
+#endif
+#endif
+#ifdef BCM_DNXF3_SUPPORT
+                        case  RAMON2_DEVICE_ID:
+                        case  RAMON3_DEVICE_ID:
+#endif
+                            if (debug >= 3) {
+                                gprintk("force mask interrupts for device %d!\n", i);
+                            }
+                            ctrl = &_devices[i];
+                            for (ind = 0; ind < ctrl->intr_regs.intc_intr_nof_regs; ind++) {
+                                if (ctrl->intr_regs.intc_intr_clear_enable_base != 0) {
+                                    /** clear interrupt */
+                                    IPROC_WRITE(i, ctrl->intr_regs.intc_intr_clear_enable_base + (4 * ind), 0xFFFFFFFF);
+                                    IPROC_WRITE(i, ctrl->intr_regs.intc_intr_set_enable_base + (4 * ind), 0);
+                                } else if (ctrl->intr_regs.intc_intr_enable_base != 0) {
+                                    IPROC_WRITE(i, ctrl->intr_regs.intc_intr_enable_base + (4 * ind), 0);
+                                }
+                            }
+                            /* clear Software Programmable interrupt (PAXB_0_SW_PROG_INTR_CLR)*/
+                            IPROC_WRITE(i, CMICX_GEN2_PAXB_0_SW_PROG_INTR_CLR, 0xFFFFFFFF);
+                            /* disable Software Programmable interrupt (PAXB_0_SW_PROG_INTR_ENABLE)*/
+                            IPROC_WRITE(i, CMICX_GEN2_PAXB_0_SW_PROG_INTR_ENABLE, 0x0);
+                            break;
+
+                       default:
+                            if (debug >= 4) {
+                                gprintk("device %x do not support force interrupt mask!\n", user_bde->get_dev(i)->device);
+                            }
+                           break;
+                    }
+                }
+#endif /* defined(BCM_DNXF_SUPPORT) || defined(BCM_DNX_SUPPORT) */
+
                 user_bde->interrupt_disconnect(i);
             }
             lkbde_dev_instid_set(i, BDE_DEV_INST_ID_INVALID);
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h
index 33e6a46a110..1e6c4c6e209 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h
@@ -38,6 +38,8 @@ typedef void (*shbde_log_func_t)(int level, const char *str, int param);
 #define SHBDE_WARN      1
 #define SHBDE_DBG       2
 
+#define SHBDE_NUM_IPROC_SUBWIN  8
+
 /* iProc configuration (primarily used for PCI-AXI bridge) */
 typedef struct shbde_iproc_config_s {
     unsigned int dev_id;
@@ -50,6 +52,9 @@ typedef struct shbde_iproc_config_s {
     unsigned int mdio_base_addr;
     unsigned int pcie_phy_addr;
     unsigned int adjust_pcie_preemphasis;
+    unsigned int no_subwin_remap;
+    unsigned int subwin_valid;
+    unsigned int subwin_base[SHBDE_NUM_IPROC_SUBWIN];
 } shbde_iproc_config_t;
 
 /* Hardware abstraction functions */
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c
index f7c4863d3a1..ef7a8f98af2 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c
@@ -44,6 +44,10 @@
 #define BAR0_PAXB_IMAP0_0                       (0x2c00)
 #define BAR0_PAXB_IMAP0_1                       (0x2c04)
 #define BAR0_PAXB_IMAP0_2                       (0x2c08)
+#define BAR0_PAXB_IMAP0_3                       (0x2c0c)
+#define BAR0_PAXB_IMAP0_4                       (0x2c10)
+#define BAR0_PAXB_IMAP0_5                       (0x2c14)
+#define BAR0_PAXB_IMAP0_6                       (0x2c18)
 #define BAR0_PAXB_IMAP0_7                       (0x2c1c)
 
 #define BAR0_PAXB_OARR_FUNC0_MSI_PAGE           0x2d34
@@ -85,6 +89,14 @@
 #define PCI_EXP_LNKSTA2_CDL_3_5DB               0x1
 #endif
 
+#define LOG_OUT(_shbde, _lvl, _str, _prm)             \
+    if ((_shbde)->log_func) {                         \
+        (_shbde)->log_func(_lvl, _str, _prm);         \
+    }
+#define LOG_ERR(_shbde, _str, _prm)     LOG_OUT(_shbde, SHBDE_ERR, _str, _prm)
+#define LOG_WARN(_shbde, _str, _prm)    LOG_OUT(_shbde, SHBDE_WARN, _str, _prm)
+#define LOG_DBG(_shbde, _str, _prm)     LOG_OUT(_shbde, SHBDE_DBG, _str, _prm)
+
 static unsigned int
 iproc32_read(shbde_hal_t *shbde, void *addr)
 {
@@ -117,6 +129,22 @@ wait_usec(shbde_hal_t *shbde, int usec)
     }
 }
 
+static void
+subwin_cache_init(shbde_hal_t *shbde, void *iproc_regs,
+                  shbde_iproc_config_t *icfg)
+{
+    unsigned int idx;
+    void *reg;
+
+    /* Cache iProc sub-windows */
+    for (idx = 0; idx < SHBDE_NUM_IPROC_SUBWIN; idx++) {
+        reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_0 + (4 * idx));
+        icfg->subwin_base[idx] = iproc32_read(shbde, reg) & ~0xfff;
+        LOG_DBG(shbde, "subwin:", icfg->subwin_base[idx]);
+    }
+    icfg->subwin_valid = 1;
+}
+
 /*
  * Function:
  *      shbde_iproc_config_init
@@ -199,9 +227,7 @@ shbde_iproc_config_init(shbde_iproc_config_t *icfg,
         icfg->pcie_phy_addr = 0x5;
         icfg->adjust_pcie_preemphasis = 1;
         break;
-    case 0xa450: /* Katana2 */
-    case 0xb240:
-    case 0xb450:
+    case 0xb240: /* Saber */
         icfg->mdio_base_addr = 0x18032000;
         icfg->pcie_phy_addr = 0x5;
         icfg->adjust_pcie_preemphasis = 1;
@@ -243,6 +269,8 @@ shbde_iproc_paxb_init(shbde_hal_t *shbde, void *iproc_regs,
         return -1;
     }
 
+    LOG_DBG(shbde, "iProc version:", icfg->iproc_ver);
+
     /*
      * The following code attempts to auto-detect the correct
      * iProc PCI endianess configuration by reading a well-known
@@ -292,11 +320,9 @@ shbde_iproc_paxb_init(shbde_hal_t *shbde, void *iproc_regs,
         }
     }
 
-    /* Configure MSIX interrupt page, need for iproc ver 0x10 and 0x12 */
-    if ((icfg->use_msi == 2) &&
-        ((icfg->iproc_ver == 0x10)
-         || (icfg->iproc_ver == 0x12)
-         || (icfg->iproc_ver == 0x11))){
+    /* Configure MSIX interrupt page, need for iproc ver 16, 17 and 18 */
+    if (icfg->use_msi == 2 &&
+        (icfg->iproc_ver >= 16 && icfg->iproc_ver <= 18)) {
         unsigned int mask = (0x1 << PAXB_0_FUNC0_IMAP1_3_ADDR_SHIFT) - 1;
         reg = ROFFS(iproc_regs, PAXB_0_FUNC0_IMAP1_3);
         data = iproc32_read(shbde, reg);
@@ -320,6 +346,9 @@ shbde_iproc_paxb_init(shbde_hal_t *shbde, void *iproc_regs,
     }
     iproc32_write(shbde, reg, data);
 
+    /* Cache iProc sub-windows */
+    subwin_cache_init(shbde, iproc_regs, icfg);
+
     return pci_num;
 }
 
@@ -340,6 +369,7 @@ shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs,
                      unsigned int addr)
 {
     unsigned int subwin_base;
+    unsigned int idx;
     void *reg = 0;
     shbde_iproc_config_t *icfg = &shbde->icfg;
 
@@ -347,31 +377,29 @@ shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs,
         return -1;
     }
 
+    if (icfg->subwin_valid == 0) {
+        LOG_WARN(shbde, "Re-initializing PCI sub-windows",
+                 shbde->icfg.iproc_ver);
+        subwin_cache_init(shbde, iproc_regs, icfg);
+    }
+
     /* Sub-window size is 0x1000 (4K) */
     subwin_base = (addr & ~0xfff);
 
-    if (icfg->iproc_ver >= 20) {
-        if (subwin_base == 0x292c000) {
-            /* Route PAXB register through IMAP0_2 */
-            reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff));
-        } else if (subwin_base == 0x292d000) {
-            /* Route INTC register through IMAP0_6 */
-            reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff));
-        }
-    } else {
-        if((icfg->cmic_ver >= 4) &&
-           ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) {
-            /* Route the PAXB register through IMAP0_2 */
-            reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff));
-        } else if((icfg->cmic_ver >= 4) &&
-           ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) {
-            /* Route the INTC block access through IMAP0_6 */
-            reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff));
+    /* Look for matching sub-window */
+    for (idx = 0; idx < SHBDE_NUM_IPROC_SUBWIN; idx++) {
+        if (icfg->subwin_base[idx] == subwin_base) {
+            reg = ROFFS(iproc_regs, idx * 0x1000 + (addr & 0xfff));
+            break;
         }
     }
 
-    /* Not found fixed sub-window, reuse the sub-window 7 */
-    if (0 == reg) {
+    /* No matching sub-window, reuse the sub-window 7 */
+    if (reg == 0) {
+        if (icfg->no_subwin_remap) {
+            LOG_WARN(shbde, "Attempt to remap PCI sub-window for", addr);
+            return 0;
+        }
         /* Update base address for sub-window 7 */
         subwin_base |= 1; /* Valid bit */
         reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7);
@@ -404,6 +432,7 @@ shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs,
                       unsigned int addr, unsigned int data)
 {
     unsigned int subwin_base;
+    unsigned int idx;
     void *reg = 0;
     shbde_iproc_config_t *icfg = &shbde->icfg;
 
@@ -411,31 +440,29 @@ shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs,
         return;
     }
 
+    if (icfg->subwin_valid == 0) {
+        LOG_WARN(shbde, "Re-initializing PCI sub-windows",
+                 shbde->icfg.iproc_ver);
+        subwin_cache_init(shbde, iproc_regs, icfg);
+    }
+
     /* Sub-window size is 0x1000 (4K) */
     subwin_base = (addr & ~0xfff);
 
-    if (icfg->iproc_ver >= 20) {
-        if (subwin_base == 0x292c000) {
-            /* Route PAXB register through IMAP0_2 */
-            reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff));
-        } else if (subwin_base == 0x292d000) {
-             /* Route INTC register through IMAP0_6 */
-             reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff));
-        }
-    } else {
-        if((icfg->cmic_ver >= 4) &&
-           ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) {
-            /* Route the PAXB register through IMAP0_2 */
-            reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff));
-        } else if((icfg->cmic_ver >= 4) &&
-           ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) {
-            /* Route the INTC block access through IMAP0_6 */
-            reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff));
+    /* Look for matching sub-window */
+    for (idx = 0; idx < SHBDE_NUM_IPROC_SUBWIN; idx++) {
+        if (icfg->subwin_base[idx] == subwin_base) {
+            reg = ROFFS(iproc_regs, idx * 0x1000 + (addr & 0xfff));
+            break;
         }
     }
 
-    /* Not found fixed sub-window */
-    if (0 == reg) {
+    /* No matching sub-window, reuse the sub-window 7 */
+    if (reg == 0) {
+        if (icfg->no_subwin_remap) {
+            LOG_WARN(shbde, "Attempt to remap PCI sub-window for", addr);
+            return;
+        }
         /* Update base address for sub-window 7 */
         subwin_base |= 1; /* Valid bit */
         reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7);
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c
index d2f61f343ea..92554d6399b 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c
@@ -123,6 +123,7 @@ typedef struct genl_stats_s {
     unsigned long pkts_f_genl_mod;
     unsigned long pkts_f_handled;
     unsigned long pkts_f_pass_through;
+    unsigned long pkts_f_tag_checked;
     unsigned long pkts_f_tag_stripped;
     unsigned long pkts_f_dst_mc;
     unsigned long pkts_f_src_cpu;
@@ -322,8 +323,8 @@ genl_task(struct work_struct *work)
 }
 
 static int
-genl_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta,
-                  int chan, kcom_filter_t *kf)
+genl_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta,
+               int chan, kcom_filter_t *kf)
 {
     genl_meta_t meta;
     int rv = 0;
@@ -383,16 +384,17 @@ genl_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta,
         uint16_t vlan = (uint16_t) ((pkt[14] << 8) | pkt[15]);
         strip_tag =  ((vlan_proto == 0x8100) || (vlan_proto == 0x88a8) || (vlan_proto == 0x9100))
                      && (vlan == 0xFFF);
-    }
-
-    if (strip_tag) {
-        size -= 4;
+        if (strip_tag) {
+            size -= 4;
+        }
+        g_genl_stats.pkts_f_tag_checked++;
     }
 
     if ((skb = dev_alloc_skb(size)) == NULL)
     {
         g_genl_stats.pkts_d_no_mem++;
         genl_limited_gprintk(last_skb_fail, "%s: failed to alloc generic mem for pkt skb: %lu\n", __func__, g_genl_stats.pkts_d_no_mem);
+        kfree(genl_pkt);
         goto GENL_FILTER_CB_PKT_HANDLED;
     }
 
@@ -466,18 +468,18 @@ genl_proc_debug_open(struct inode * inode, struct file * file)
  */
 static ssize_t
 genl_proc_debug_write(struct file *file, const char *buf,
-                    size_t count, loff_t *loff)
+                      size_t count, loff_t *loff)
 {
     char debug_str[40];
     char *ptr;
 
-    if (count > sizeof(debug_str)) {
+    if (count >= sizeof(debug_str)) {
         count = sizeof(debug_str) - 1;
-        debug_str[count] = '\0';
     }
     if (copy_from_user(debug_str, buf, count)) {
         return -EFAULT;
     }
+    debug_str[count] = '\0';
 
     if ((ptr = strstr(debug_str, "debug=")) != NULL) {
         ptr += 6;
@@ -506,6 +508,7 @@ genl_proc_stats_show(struct seq_file *m, void *v)
     seq_printf(m, "  pkts sent to generic module    %10lu\n", g_genl_stats.pkts_f_genl_mod);
     seq_printf(m, "  pkts handled by generic cb     %10lu\n", g_genl_stats.pkts_f_handled);
     seq_printf(m, "  pkts pass through              %10lu\n", g_genl_stats.pkts_f_pass_through);
+    seq_printf(m, "  pkts with vlan tag checked     %10lu\n", g_genl_stats.pkts_f_tag_checked);
     seq_printf(m, "  pkts with vlan tag stripped    %10lu\n", g_genl_stats.pkts_f_tag_stripped);
     seq_printf(m, "  pkts with mc destination       %10lu\n", g_genl_stats.pkts_f_dst_mc);
     seq_printf(m, "  pkts with cpu source           %10lu\n", g_genl_stats.pkts_f_src_cpu);
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c
index 975a3f3796f..07fda66ffaf 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c
@@ -72,7 +72,6 @@ static int debug;
 #endif
 
 #define FCS_SZ 4
-#define PSAMPLE_NLA_PADDING 4
 
 #define PSAMPLE_RATE_DFLT 1
 #define PSAMPLE_SIZE_DFLT 128
@@ -131,7 +130,10 @@ typedef struct psample_stats_s {
     unsigned long pkts_f_psample_mod;
     unsigned long pkts_f_handled;
     unsigned long pkts_f_pass_through;
+    unsigned long pkts_f_tag_checked;
+    unsigned long pkts_f_tag_stripped;
     unsigned long pkts_f_dst_mc;
+    unsigned long pkts_f_dst_cpu;
     unsigned long pkts_c_qlen_cur;
     unsigned long pkts_c_qlen_hi;
     unsigned long pkts_d_qlen_max;
@@ -143,6 +145,7 @@ typedef struct psample_stats_s {
     unsigned long pkts_d_meta_srcport;
     unsigned long pkts_d_meta_dstport;
     unsigned long pkts_d_invalid_size;
+    unsigned long pkts_d_psample_only;
 } psample_stats_t;
 static psample_stats_t g_psample_stats;
 
@@ -264,6 +267,7 @@ psample_meta_get(int dev_no, kcom_filter_t *kf, void *pkt_meta,
     int srcport, dstport;
     int src_ifindex = 0;
     int dst_ifindex = 0;
+    int sample_type;
     int sample_rate = 1;
     int sample_size = PSAMPLE_SIZE_DFLT;
     bcmgenl_netif_t bcmgenl_netif;
@@ -289,6 +293,8 @@ psample_meta_get(int dev_no, kcom_filter_t *kf, void *pkt_meta,
         return -1;
     }
 
+    sample_type = psample_meta_sample_type_get(dev_no, pkt_meta);
+
     /* find src port netif (no need to lookup CPU port) */
     if (srcport != 0) {
         if (bcmgenl_netif_get_by_port(srcport, &bcmgenl_netif) == 0) {
@@ -301,17 +307,28 @@ psample_meta_get(int dev_no, kcom_filter_t *kf, void *pkt_meta,
         }
     }
 
-    /* set sFlow dst type for MC pkts */
     if (mcast) {
         g_psample_stats.pkts_f_dst_mc++;
-    /* find dst port netif for UC pkts (no need to lookup CPU port) */
-    } else if (dstport != 0) {
-        if (bcmgenl_netif_get_by_port(dstport, &bcmgenl_netif) == 0) {
-            dst_ifindex = bcmgenl_netif.dev->ifindex;
-        } else {
-            g_psample_stats.pkts_d_meta_dstport++;
-            PSAMPLE_CB_DBG_PRINT("%s: could not find dstport(%d)\n", __func__, dstport);
-        }
+    }
+
+    /*
+     * Identify these packets uniquely.
+     * 1) Packet forwarded over front panel port   = dst_ifindex
+     * 2) Packet dropped in forwarding and sampled = 0xffff
+     * 3) else CPU destination                     = 0
+     */
+    if (dstport != 0 &&
+        bcmgenl_netif_get_by_port(dstport, &bcmgenl_netif) == 0) {
+        dst_ifindex = bcmgenl_netif.dev->ifindex;
+    } else if (sample_type != SAMPLE_TYPE_NONE) {
+        dst_ifindex = 0xffff;
+        g_psample_stats.pkts_d_psample_only++;
+    } else if (dstport == 0) {
+        dst_ifindex = 0;
+        g_psample_stats.pkts_f_dst_cpu++;
+    } else {
+        g_psample_stats.pkts_d_meta_dstport++;
+        PSAMPLE_CB_DBG_PRINT("%s: could not find dstport(%d)\n", __func__, dstport);
     }
 
     PSAMPLE_CB_DBG_PRINT("%s: dstport %d, src_ifindex 0x%x, dst_ifindex 0x%x\n",
@@ -321,7 +338,7 @@ psample_meta_get(int dev_no, kcom_filter_t *kf, void *pkt_meta,
     sflow_meta->dst_ifindex = dst_ifindex;
     sflow_meta->trunc_size  = sample_size;
     sflow_meta->sample_rate = sample_rate;
-    sflow_meta->sample_type = psample_meta_sample_type_get(dev_no, pkt_meta);
+    sflow_meta->sample_type = sample_type;
     return 0;
 }
 
@@ -371,6 +388,7 @@ psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta,
 {
     struct psample_group *group = NULL;
     psample_meta_t meta;
+    bool strip_tag = false;
     int rv = 0;
 
     memset(&meta, 0, sizeof(meta));
@@ -403,9 +421,15 @@ psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta,
        size -= FCS_SZ;
     }
 
-    /* Account for padding in libnl used by psample */
-    if (meta.trunc_size >= size) {
-        meta.trunc_size = size - PSAMPLE_NLA_PADDING;
+    if (size >= 16) {
+        uint16_t vlan_proto = (uint16_t) ((pkt[12] << 8) | pkt[13]);
+        uint16_t vlan = (uint16_t) ((pkt[14] << 8) | pkt[15]);
+        strip_tag =  ((vlan_proto == 0x8100) || (vlan_proto == 0x88a8) || (vlan_proto == 0x9100))
+                     && (vlan == 0xFFF);
+        if (strip_tag) {
+            size -= 4;
+        }
+        g_psample_stats.pkts_f_tag_checked++;
     }
 
     PSAMPLE_CB_DBG_PRINT("%s: group 0x%x, trunc_size %d, src_ifdx 0x%x, dst_ifdx 0x%x, sample_rate %d\n",
@@ -431,16 +455,22 @@ psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta,
         memcpy(&psample_pkt->meta, &meta, sizeof(psample_meta_t));
         psample_pkt->group = group;
 
-        if ((skb = dev_alloc_skb(meta.trunc_size)) == NULL) {
+        if ((skb = dev_alloc_skb(size)) == NULL) {
             gprintk("%s: failed to alloc psample mem for pkt skb\n", __func__);
             g_psample_stats.pkts_d_no_mem++;
+            kfree(psample_pkt);
             goto PSAMPLE_FILTER_CB_PKT_HANDLED;
         }
 
         /* setup skb to point to pkt */
-        memcpy(skb->data, pkt, meta.trunc_size);
-        skb_put(skb, meta.trunc_size);
-        /* save original size for PSAMPLE_ATTR_ORIGSIZE in skb->len */
+        if (strip_tag) {
+            memcpy(skb->data, pkt, 12);
+            memcpy(skb->data + 12, pkt + 16, size - 12);
+            g_psample_stats.pkts_f_tag_stripped++;
+        } else {
+            memcpy(skb->data, pkt, size);
+        }
+        skb_put(skb, size);
         skb->len = size;
         psample_pkt->skb = skb;
 
@@ -687,18 +717,18 @@ psample_proc_debug_open(struct inode * inode, struct file * file)
  */
 static ssize_t
 psample_proc_debug_write(struct file *file, const char *buf,
-                    size_t count, loff_t *loff)
+                         size_t count, loff_t *loff)
 {
     char debug_str[40];
     char *ptr;
 
-    if (count > sizeof(debug_str)) {
+    if (count >= sizeof(debug_str)) {
         count = sizeof(debug_str) - 1;
-        debug_str[count] = '\0';
     }
     if (copy_from_user(debug_str, buf, count)) {
         return -EFAULT;
     }
+    debug_str[count] = '\0';
 
     if ((ptr = strstr(debug_str, "debug=")) != NULL) {
         ptr += 6;
@@ -727,7 +757,10 @@ psample_proc_stats_show(struct seq_file *m, void *v)
     seq_printf(m, "  pkts sent to psample module    %10lu\n", g_psample_stats.pkts_f_psample_mod);
     seq_printf(m, "  pkts handled by psample        %10lu\n", g_psample_stats.pkts_f_handled);
     seq_printf(m, "  pkts pass through              %10lu\n", g_psample_stats.pkts_f_pass_through);
+    seq_printf(m, "  pkts with vlan tag checked     %10lu\n", g_psample_stats.pkts_f_tag_checked);
+    seq_printf(m, "  pkts with vlan tag stripped    %10lu\n", g_psample_stats.pkts_f_tag_stripped);
     seq_printf(m, "  pkts with mc destination       %10lu\n", g_psample_stats.pkts_f_dst_mc);
+    seq_printf(m, "  pkts with cpu destination      %10lu\n", g_psample_stats.pkts_f_dst_cpu);
     seq_printf(m, "  pkts current queue length      %10lu\n", g_psample_stats.pkts_c_qlen_cur);
     seq_printf(m, "  pkts high queue length         %10lu\n", g_psample_stats.pkts_c_qlen_hi);
     seq_printf(m, "  pkts drop max queue length     %10lu\n", g_psample_stats.pkts_d_qlen_max);
@@ -739,6 +772,7 @@ psample_proc_stats_show(struct seq_file *m, void *v)
     seq_printf(m, "  pkts with invalid src port     %10lu\n", g_psample_stats.pkts_d_meta_srcport);
     seq_printf(m, "  pkts with invalid dst port     %10lu\n", g_psample_stats.pkts_d_meta_dstport);
     seq_printf(m, "  pkts with invalid orig pkt sz  %10lu\n", g_psample_stats.pkts_d_invalid_size);
+    seq_printf(m, "  pkts with psample only reason  %10lu\n", g_psample_stats.pkts_d_psample_only);
     return 0;
 }
 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c
index 0c889958a22..e5e9b324de4 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c
@@ -211,7 +211,6 @@ _cleanup(void)
 #ifdef BUILD_GENL_PACKET
     bcmgenl_packet_cleanup();
 #endif
-
     bcmgenl_netif_cleanup();
     bcmgenl_dev_cleanup();
 
@@ -229,9 +228,10 @@ _init(void)
     bcmgenl_netif_init();
 
     bcmgenl_psample_init(BCMGENL_PROCFS_PATH);
-#ifdef BUILD_GENL_PACKET   
+#ifdef BUILD_GENL_PACKET
     bcmgenl_packet_init(BCMGENL_PROCFS_PATH);
 #endif
+
     return 0;
 }
 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c
index e375b7d361a..591de0c8be8 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c
@@ -602,7 +602,8 @@ static inline void bkn_skb_tx_timestamp(struct sk_buff *skb)
 #define PKT_TX_HDR_SIZE         16
 
 static volatile int module_initialized;
-static volatile int module_reload;
+
+static int module_reload[LINUX_BDE_MAX_DEVICES];
 
 static ibde_t *kernel_bde = NULL;
 
@@ -704,6 +705,7 @@ typedef struct bkn_switch_info_s {
     uint32_t base_id;           /* Device (family) ID, like 0x8675 for Jericho A0, 0x */
     uint16_t dev_id;            /* Device ID */
     uint8_t rev_id;             /* Revision ID */
+    uint32_t irq_mask_reg;      /* Interrupt mask register address */
     int evt_idx;                /* Event queue index for this device*/
     int basedev_suspended;      /* Base device suspended */
     int pcie_link_status;       /* This flag is used to indicate PCIE Link status, 0 for up and 1 for down */
@@ -879,6 +881,15 @@ typedef struct bkn_switch_info_s {
 #define BKN_DNX_OIBIH_OAM_PDU_OFFSET_NOF_BITS          8
 
 
+/* PPH fwd_domain type. */
+#define BKN_DNX_PPH_FWD_DOMAIN_TYPE_VSI                0
+#define BKN_DNX_PPH_FWD_DOMAIN_TYPE_VRF                3
+
+#define BKN_DNX_PPH_FWD_DOMAIN_TYPE_GET(_fwd_domain) (((_fwd_domain) >> 16) & 0x3)
+#define BKN_DNX_PPH_FWD_DOMAIN_ID_GET(_fwd_domain)   ((_fwd_domain) & 0xffff)
+#define BKN_DNX_PPH_FWD_DOMAIN_IS_VSI(_fwd_domain)   (BKN_DNX_PPH_FWD_DOMAIN_TYPE_GET(_fwd_domain) == BKN_DNX_PPH_FWD_DOMAIN_TYPE_VSI)
+#define BKN_DNX_PPH_FWD_DOMAIN_IS_VRF(_fwd_domain)   (BKN_DNX_PPH_FWD_DOMAIN_TYPE_GET(_fwd_domain) == BKN_DNX_PPH_FWD_DOMAIN_TYPE_VRF)
+
 #define BKN_DPP_HDR_MAX_SIZE 40
 /* PTCH_2 */
 #define BKN_DPP_PTCH_2_SIZE         2
@@ -1210,6 +1221,7 @@ bkn_sleep(int clicks)
 #define CMICX_IRQ_STATr         (CMICX_CMC_BASE + 0x0000106c)
 #define CMICX_IRQ_STAT_CLRr     (CMICX_CMC_BASE + 0x00001074)
 #define CMICX_IRQ_ENABr         0x18013100
+#define INTC_INTR_ENABLE_REG4r  0x10231100
 #define IHOST_GIC_GIC400_GICD_ISENABLERN_5r 0x10781114
 #define IHOST_GIC_GIC400_GICD_ICENABLERN_5r 0x10781194
 
@@ -1884,7 +1896,6 @@ xgsx_irq_fmask_get(bkn_switch_info_t *sinfo, uint32_t *fmask)
 static inline void
 xgsx_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask)
 {
-    uint32_t irq_mask_reg = CMICX_IRQ_ENABr;
     uint32_t irq_mask, irq_fmask, disable_mask;
     uint32_t fmask = CMICX_TXRX_IRQ_MASK;
 
@@ -1908,11 +1919,10 @@ xgsx_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask)
             lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV | LKBDE_IPROC_REG,
                        IHOST_GIC_GIC400_GICD_ICENABLERN_5r, disable_mask, fmask);
         }
-        irq_mask_reg = IHOST_GIC_GIC400_GICD_ISENABLERN_5r;
     }
 
     lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV | LKBDE_IPROC_REG,
-                       irq_mask_reg, mask, fmask);
+                       sinfo->irq_mask_reg, mask, fmask);
 }
 
 static inline void
@@ -3161,6 +3171,12 @@ bkn_match_rx_pkt(bkn_switch_info_t *sinfo, uint8_t *pkt, int pktlen,
     return NULL;
 }
 
+static bool
+bkn_netif_ok(struct net_device *dev)
+{
+    return (netif_carrier_ok(dev) && netif_running(dev));
+}
+
 static bkn_priv_t *
 bkn_netif_lookup(bkn_switch_info_t *sinfo, int id)
 {
@@ -3922,8 +3938,10 @@ bkn_dnx_packet_parse_internal(
     packet_info->internal.parsing_start_offset = fld_val;
 
     pkt_offset += BKN_DNX_INTERNAL_BASE_TYPE_12;
-    DBG_DUNE(("Internal(12-%u): FWD_DOMAIN %d, LEARN_EXT %d, FHEI_SIZE %d, LIF_EXT %d \n",
+    DBG_DUNE(("Internal(12-%u): FWD_DOMAIN 0x%x(%d,%d), LEARN_EXT %d, FHEI_SIZE %d, LIF_EXT %d \n",
                 pkt_offset, packet_info->internal.forward_domain,
+                BKN_DNX_PPH_FWD_DOMAIN_TYPE_GET(packet_info->internal.forward_domain),
+                BKN_DNX_PPH_FWD_DOMAIN_ID_GET(packet_info->internal.forward_domain),
                 learn_ext_present, fhei_size, lif_ext_type));
 
     if (fhei_size)
@@ -4007,34 +4025,34 @@ bkn_dnx_packet_parse_internal(
 
         if (sinfo->cmic_type == 'r')
         {
-            /* UDH: UDH-Data-Type[0] */
+            /* UDH: UDH-Data-Type[3] */
             bkn_bitstream_get_field(
                     &buf[pkt_offset],
                     BKN_DNX_UDH_DATA_TYPE_0_MSB,
                     BKN_DNX_UDH_DATA_TYPE_0_NOF_BITS,
                     &fld_val);
-            data_type_0 = fld_val;
-            /* UDH: UDH-Data-Type[1] */
+            data_type_3 = fld_val;
+            /* UDH: UDH-Data-Type[2] */
             bkn_bitstream_get_field(
                     &buf[pkt_offset],
                     BKN_DNX_UDH_DATA_TYPE_1_MSB,
                     BKN_DNX_UDH_DATA_TYPE_1_NOF_BITS,
                     &fld_val);
-            data_type_1 = fld_val;
-            /* UDH: UDH-Data-Type[2] */
+            data_type_2 = fld_val;
+            /* UDH: UDH-Data-Type[1] */
             bkn_bitstream_get_field(
                     &buf[pkt_offset],
                     BKN_DNX_UDH_DATA_TYPE_2_MSB,
                     BKN_DNX_UDH_DATA_TYPE_2_NOF_BITS,
                     &fld_val);
-            data_type_2 = fld_val;
-            /* UDH: UDH-Data-Type[3] */
+            data_type_1 = fld_val;
+            /* UDH: UDH-Data-Type[0] */
             bkn_bitstream_get_field(
                     &buf[pkt_offset],
                     BKN_DNX_UDH_DATA_TYPE_3_MSB,
                     BKN_DNX_UDH_DATA_TYPE_3_NOF_BITS,
                     &fld_val);
-            data_type_3 = fld_val;
+            data_type_0 = fld_val;
             pkt_offset += BKN_DNX_UDH_BASE_SIZE;
 
             if (data_type_0)
@@ -4325,12 +4343,12 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                                         packet_info.internal.trap_id);
                 bkn_bitstream_set_field(sand_scratch_data, 16, 16,
                                         packet_info.internal.trap_qualifier);
-                bkn_bitstream_set_field(sand_scratch_data, 32, 16,
-                                    packet_info.ftmh.source_sys_port_aggregate);
-                bkn_bitstream_set_field(sand_scratch_data, 48, 16,
-                                        packet_info.internal.forward_domain);
+                bkn_bitstream_set_field(sand_scratch_data, 32, 17,
+                                        packet_info.ftmh.source_sys_port_aggregate);
                 bkn_bitstream_set_field(sand_scratch_data, 64, 2,
                                         packet_info.ftmh.action_type);
+                bkn_bitstream_set_field(sand_scratch_data, 66, 18,
+                                        packet_info.internal.forward_domain);
 
                 if (force_tagged) {
                     uint8_t *eth_hdr = pkt + pkt_hdr_size;
@@ -4340,6 +4358,8 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                     if (packet_is_untagged(tpid)) {
                         int raw_packet_len = pktlen - pkt_hdr_size;
                         uint32_t vid = 0;
+                        uint32_t is_vsi = BKN_DNX_PPH_FWD_DOMAIN_IS_VSI(packet_info.internal.forward_domain);
+                        uint32_t fwd_domain = BKN_DNX_PPH_FWD_DOMAIN_ID_GET(packet_info.internal.forward_domain);
 
                         if ((pktlen + 4) < rx_buffer_size) {
                             for (idx = (raw_packet_len - 1); idx >= 12; idx--) {
@@ -4348,9 +4368,8 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                             if (ft_vid) {
                                 vid = ft_vid;
                             }
-                            else if (packet_info.internal.forward_domain) {
-                                vid = packet_info.internal.forward_domain &
-                                      0xfff;
+                            else if (is_vsi && fwd_domain) {
+                                vid = fwd_domain & 0xfff;
                             }
                             else {
                                 vid = 1;
@@ -4405,7 +4424,7 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                 priv = bkn_netif_lookup(sinfo, filter->kf.dest_id);
                 if (priv) {
                     /* Check that software link is up */
-                    if (!netif_carrier_ok(priv->dev)) {
+                    if (!bkn_netif_ok(priv->dev)) {
                         sinfo->rx[chan].pkts_d_no_link++;
                         break;
                     }
@@ -4587,6 +4606,12 @@ bkn_skb_rx_netif_process(bkn_switch_info_t *sinfo, int dest_id, int chan,
 
     DBG_VERB(("Process SKB to netif %d\n", dest_id));
     priv = bkn_netif_lookup(sinfo, dest_id);
+    if (priv == NULL) {
+        DBG_VERB(("Private data is unavailable for netif %d\n", dest_id));
+        /* Handle skb on error return */
+        dev_kfree_skb_any(skb);
+        return -1;
+    }
 
     if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) {
         uint16_t vlan_proto;
@@ -4784,12 +4809,12 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                                         packet_info.internal.trap_id);
                 bkn_bitstream_set_field(sand_scratch_data, 16, 16,
                                         packet_info.internal.trap_qualifier);
-                bkn_bitstream_set_field(sand_scratch_data, 32, 16,
-                                    packet_info.ftmh.source_sys_port_aggregate);
-                bkn_bitstream_set_field(sand_scratch_data, 48, 16,
-                                        packet_info.internal.forward_domain);
+                bkn_bitstream_set_field(sand_scratch_data, 32, 17,
+                                        packet_info.ftmh.source_sys_port_aggregate);
                 bkn_bitstream_set_field(sand_scratch_data, 64, 2,
                                         packet_info.ftmh.action_type);
+                bkn_bitstream_set_field(sand_scratch_data, 66, 18,
+                                        packet_info.internal.forward_domain);
                 if (force_tagged) {
                     uint8_t *eth_hdr = pkt + pkt_hdr_size;
                     uint16_t tpid = 0;
@@ -4801,6 +4826,8 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                     if (packet_is_untagged(tpid)) {
                         int raw_packet_len = pktlen - pkt_hdr_size;
                         uint32_t vid = 0;
+                        uint32_t is_vsi = BKN_DNX_PPH_FWD_DOMAIN_IS_VSI(packet_info.internal.forward_domain);
+                        uint32_t fwd_domain = BKN_DNX_PPH_FWD_DOMAIN_ID_GET(packet_info.internal.forward_domain);
 
                         if ((pktlen + 4) < rx_buffer_size) {
                             for (idx = (raw_packet_len - 1); idx >= 12; idx--) {
@@ -4809,9 +4836,8 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                             if (ft_vid) {
                                 vid = ft_vid;
                             }
-                            else if (packet_info.internal.forward_domain) {
-                                vid = packet_info.internal.forward_domain &
-                                      0xfff;
+                            else if (is_vsi && fwd_domain) {
+                                vid = fwd_domain & 0xfff;
                             }
                             else {
                                 vid = 1;
@@ -4867,7 +4893,7 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                     int ethertype;
 
                     /* Check that software link is up */
-                    if (!netif_carrier_ok(priv->dev)) {
+                    if (!bkn_netif_ok(priv->dev)) {
                         sinfo->rx[chan].pkts_d_no_link++;
                         break;
                     }
@@ -4946,7 +4972,7 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                         if (filter->kf.mirror_type == KCOM_DEST_T_NETIF) {
                             mpriv = bkn_netif_lookup(sinfo, filter->kf.mirror_id);
                             /* Clone skb for mirror_to netinf */
-                            if (mpriv && netif_carrier_ok(mpriv->dev)) {
+                            if (mpriv && bkn_netif_ok(mpriv->dev)) {
                                 mskb = skb_clone(skb, GFP_ATOMIC);
                                 if (mskb == NULL) {
                                     sinfo->rx[chan].pkts_d_no_skb++;
@@ -4985,7 +5011,7 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                         /* Clone skb for mirror_to netinf */
                         if (filter->kf.mirror_type == KCOM_DEST_T_NETIF) {
                             mpriv = bkn_netif_lookup(sinfo, filter->kf.mirror_id);
-                            if (mpriv && netif_carrier_ok(mpriv->dev)) {
+                            if (mpriv && bkn_netif_ok(mpriv->dev)) {
                                 mskb = skb_clone(skb, GFP_ATOMIC);
                                 if (mskb == NULL) {
                                     sinfo->rx[chan].pkts_d_no_skb++;
@@ -5772,7 +5798,9 @@ xgs_do_dma(bkn_switch_info_t *sinfo, int budget)
                 budget_chans++;
             }
         }
-        budget_chans = budget / budget_chans;
+        if (budget_chans) {
+            budget_chans = budget / budget_chans;
+        }
     }
 
     for (chan = 0; chan < sinfo->rx_chans; chan++) {
@@ -5842,7 +5870,9 @@ xgsm_do_dma(bkn_switch_info_t *sinfo, int budget)
                 budget_chans++;
             }
         }
-        budget_chans = budget / budget_chans;
+        if (budget_chans) {
+            budget_chans = budget / budget_chans;
+        }
     }
 
     for (chan = 0; chan < sinfo->rx_chans; chan++) {
@@ -6136,6 +6166,8 @@ xgsx_isr(bkn_switch_info_t *sinfo)
 {
     uint32_t irq_stat = 0;
     int rx_dcbs_done;
+    uint32_t ctrl = 0;
+    int chan = 0;
 
     dev_read32(sinfo, CMICX_IRQ_STATr, &irq_stat);
     if ((irq_stat & sinfo->irq_mask) == 0) {
@@ -6144,16 +6176,12 @@ xgsx_isr(bkn_switch_info_t *sinfo)
     }
 
     /* Bypass chain_done from Abort */
-    if (device_is_dnx(sinfo)) {
-        uint32_t ctrl = 0;
-        int chan = 0;
-        for (chan = 0; chan < NUM_CMICX_DMA_CHAN; chan++) {
-            if (irq_stat & CMICX_DS_CMC_CHAIN_DONE(chan)) {
-                dev_read32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl);
-                if (ctrl & CMICX_DC_CMC_ABORT) {
-                    DBG_IRQ(("chain %d: chain done for Abort\n", chan));
-                    return;
-                }
+    for (chan = 0; chan < NUM_CMICX_DMA_CHAN; chan++) {
+        if (irq_stat & CMICX_DS_CMC_CHAIN_DONE(chan)) {
+            dev_read32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl);
+            if (ctrl & CMICX_DC_CMC_ABORT) {
+                DBG_IRQ(("chain %d: chain done for Abort\n", chan));
+                return;
             }
         }
     }
@@ -6367,7 +6395,6 @@ bkn_open(struct net_device *dev)
     }
 
     if (!sinfo->basedev_suspended) {
-        netif_carrier_on(dev);
         netif_start_queue(dev);
     }
 
@@ -6561,7 +6588,6 @@ bkn_stop(struct net_device *dev)
     unsigned long flags;
 
     netif_stop_queue(dev);
-    netif_carrier_off(dev);
 
     /* Check if base device */
     if (priv->id <= 0) {
@@ -6681,7 +6707,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
         return 0;
     }
 
-    if (!netif_carrier_ok(dev)) {
+    if (!bkn_netif_ok(dev)) {
         DBG_WARN(("Tx drop: Netif link is down.\n"));
         priv->stats.tx_dropped++;
         sinfo->tx.pkts_d_no_link++;
@@ -8059,7 +8085,9 @@ bkn_seq_dma_next_pos(bkn_seq_dma_iter_t *iter, loff_t pos)
 {
     bkn_switch_info_t *sinfo;
 
-    sinfo = bkn_sinfo_from_unit(iter->dev_no);
+    if ((sinfo = bkn_sinfo_from_unit(iter->dev_no)) == NULL) {
+        return -1;
+    }
     while (pos) {
         if (iter->rx_dma) {
             if (++iter->idx >= MAX_RX_DCBS + 1) {
@@ -9175,10 +9203,15 @@ bkn_create_inst(uint32 inst_id)
     for (i = 0; i < kernel_bde->num_devices(BDE_ALL_DEVICES); i++) {
         if (lkbde_is_dev_managed_by_instance(i, inst_id)) {
             sinfo = bkn_sinfo_from_unit(i);
-            spin_lock_irqsave(&sinfo->lock, flags);
-            sinfo->evt_idx = evt_idx;
-            spin_unlock_irqrestore(&sinfo->lock, flags);
-            DBG_INST(("%s d(%d) evt_idx %d \n",__FUNCTION__, i, evt_idx));
+            if (sinfo) {
+                spin_lock_irqsave(&sinfo->lock, flags);
+                sinfo->evt_idx = evt_idx;
+                spin_unlock_irqrestore(&sinfo->lock, flags);
+                DBG_INST(("%s d(%d) evt_idx %d \n",__FUNCTION__, i, evt_idx));
+            } else {
+                DBG_INST(("%s d(%d) evt_idx %d sinfo is NULL\n",
+                          __FUNCTION__, i, evt_idx));
+            }
         }
     }
     return 0;
@@ -9222,6 +9255,9 @@ bkn_knet_dev_inst_set(kcom_msg_reprobe_t *kmsg)
     struct list_head *list;
 
     sinfo = bkn_sinfo_from_unit(d);
+    if (sinfo == NULL) {
+        return -1;
+    }
 #ifdef BCM_INSTANCE_SUPPORT
     lkbde_dev_instid_get(d, &inst);
 #else
@@ -9260,21 +9296,21 @@ bkn_knet_dev_inst_set(kcom_msg_reprobe_t *kmsg)
 }
 
 static int
-bkn_knet_version(kcom_msg_version_t *kmsg, int len)
+bkn_knet_version(kcom_msg_version_t *kmsg, int len, int unit)
 {
     kmsg->hdr.type = KCOM_MSG_TYPE_RSP;
     kmsg->version = KCOM_VERSION;
     kmsg->netif_max = KCOM_NETIF_MAX;
     kmsg->filter_max = KCOM_FILTER_MAX;
-    kmsg->module_reload = module_reload;
+    kmsg->module_reload = module_reload[unit];
 
     /*
      * The module_reoad idicator set while module inserted.
      * Unset the indicatore when SDK has checked KNET version to idicate
      * the KNET module has been initialized by SDK.
      */
-    if (module_reload) {
-        module_reload = 0;
+    if (module_reload[unit]) {
+        module_reload[unit] = 0;
     }
     return sizeof(kcom_msg_version_t);
 }
@@ -9356,7 +9392,7 @@ static int
 bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len)
 {
     bkn_switch_info_t *sinfo;
-    uint32_t dev_type;
+    uint32_t dev_type, iproc_ver = 0;
     unsigned long flags;
 
     kmsg->hdr.type = KCOM_MSG_TYPE_RSP;
@@ -9420,6 +9456,19 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len)
         }
     }
 
+    if (DEV_IS_CMICX(sinfo)) {
+        if (dev_type & BDE_PCI_DEV_TYPE) {
+            lkbde_iproc_version_get(sinfo->dev_no, &iproc_ver);
+            if (iproc_ver == 16 || iproc_ver == 18 || iproc_ver == 19) {
+                sinfo->irq_mask_reg = INTC_INTR_ENABLE_REG4r;
+            } else {
+                sinfo->irq_mask_reg = CMICX_IRQ_ENABr;
+            }
+        } else if (dev_type & BDE_AXI_DEV_TYPE) {
+            sinfo->irq_mask_reg = IHOST_GIC_GIC400_GICD_ISENABLERN_5r;
+        }
+    }
+
     /* Ensure that we restart properly */
     bkn_dma_abort(sinfo);
     bkn_clean_dcbs(sinfo);
@@ -9777,6 +9826,8 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len)
     } else {
         DBG_NDEV(("Use Shared Netif ID %d\n", id));
     }
+    spin_unlock_irqrestore(&sinfo->lock, flags);
+
     if (priv->ref_count == 1) {
         DBG_VERB(("Assigned ID %d to Ethernet device %s\n",
                   priv->id, dev->name));
@@ -9792,7 +9843,6 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len)
                       dev->name));
         }
     }
-    spin_unlock_irqrestore(&sinfo->lock, flags);
 
     return sizeof(*kmsg);
 }
@@ -10298,7 +10348,7 @@ bkn_handle_cmd_req(kcom_msg_t *kmsg, int len)
     case KCOM_M_VERSION:
         DBG_CMD(("KCOM_M_VERSION\n"));
         /* Return procotol version */
-        len = bkn_knet_version(&kmsg->version, len);
+        len = bkn_knet_version(&kmsg->version, len, kmsg->hdr.unit);
         break;
     case KCOM_M_HW_RESET:
         DBG_CMD(("KCOM_M_HW_RESET\n"));
@@ -10449,7 +10499,7 @@ bkn_get_next_dma_event(kcom_msg_dma_info_t *kmsg)
             continue;
         }
 
-        if (sinfo->evt_idx == -1) {
+        if (sinfo && sinfo->evt_idx == -1) {
             /* Event queue is not ready yet */
             continue;
         }
@@ -10608,11 +10658,15 @@ bkn_knet_dev_reinit(int d)
     DBG_VERB(("%s dev %d dev_state %d\n",__FUNCTION__, d, dev_state));
     if (dev_state == BDE_DEV_STATE_CHANGED) {
         sinfo = bkn_sinfo_from_unit(d);
-        cfg_api_lock(sinfo, &flags);
-        sinfo->base_addr = lkbde_get_dev_virt(d);
-        sinfo->dma_dev = lkbde_get_dma_dev(d);
-        sinfo->pdev = lkbde_get_hw_dev(d);
-        cfg_api_unlock(sinfo, &flags);
+        if (sinfo) {
+            cfg_api_lock(sinfo, &flags);
+            sinfo->base_addr = lkbde_get_dev_virt(d);
+            sinfo->dma_dev = lkbde_get_dma_dev(d);
+            sinfo->pdev = lkbde_get_hw_dev(d);
+            cfg_api_unlock(sinfo, &flags);
+        } else {
+            DBG_VERB(("%s dev %d sinfo is NULL\n",__FUNCTION__, d));
+        }
 
         dev_state = 0;
         lkbde_dev_state_set(d, dev_state);
@@ -10767,7 +10821,9 @@ _init(void)
 
     module_initialized = 1;
 
-    module_reload = 1;
+    for (idx = 0; idx < LINUX_BDE_MAX_DEVICES; idx++) {
+        module_reload[idx] = 1;
+    }
 
     return 0;
 }
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c
index 5944607cb1e..6d5d27eadc7 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c
@@ -1124,6 +1124,7 @@ static int bksync_cmd_go(u32 cmd, void *data0, void *data1)
             ret = 0;
             switch (cmd) {
                 case BKSYNC_GET_TSTIME:
+                case BKSYNC_GETTIME:
 #ifndef BDE_EDK_SUPPORT
                     {
                         u64 d0 = 0ULL;
@@ -1146,10 +1147,10 @@ static int bksync_cmd_go(u32 cmd, void *data0, void *data1)
                             ret = -1;
                     }
                     break;
-#endif
-                case BKSYNC_GETTIME:
+#else
                     bksync_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1);
                     break;
+#endif
                 case BKSYNC_BROADSYNC:
                     if ((subcmd == KSYNC_BROADSYNC_BS0_STATUS_GET) ||
                         (subcmd == KSYNC_BROADSYNC_BS1_STATUS_GET)) {
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h
index dcf81c6f9bc..26c283c23ee 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h
@@ -189,29 +189,6 @@
 #define BCM_TIMESYNC_SUPPORT
 #endif
 
-#if defined(BCM_56820_A0)
-#define BCM_56820
-#define BCM_56800
-#define BCM_56304
-#define BCM_FIREBOLT_SUPPORT
-#define BCM_BRADLEY_SUPPORT
-#define BCM_SCORPION_SUPPORT
-#define BCM_TRX_SUPPORT
-#endif
-
-#if defined(BCM_56725_A0)
-#define BCM_56725
-#define BCM_56820
-#define BCM_56800
-#define BCM_56304
-#define BCM_FIREBOLT_SUPPORT
-#define BCM_BRADLEY_SUPPORT
-#define BCM_HUMV_SUPPORT
-#define BCM_SCORPION_SUPPORT
-#define BCM_CONQUEROR_SUPPORT
-#define BCM_TRX_SUPPORT
-#endif
-
 #if defined(BCM_56634_A0) || defined(BCM_56634_B0)
 #define BCM_56634
 #define BCM_56624
@@ -244,22 +221,6 @@
 #define BCM_CMICM_SUPPORT
 #endif
 
-#if defined(BCM_56685_A0) || defined(BCM_56685_B0)
-#define BCM_56685
-#define BCM_56634
-#define BCM_56624
-#define BCM_56304
-#define BCM_56800
-#define BCM_FIREBOLT_SUPPORT
-#define BCM_BRADLEY_SUPPORT
-#define BCM_TRIUMPH_SUPPORT
-#define BCM_TRIUMPH2_SUPPORT
-#define BCM_VALKYRIE2_SUPPORT
-#define BCM_TRX_SUPPORT
-#define BCM_MPLS_SUPPORT
-#define BCM_IPFIX_SUPPORT
-#endif
-
 #if defined(BCM_56334_A0) || defined(BCM_56334_B0)
 #define BCM_56334
 #define BCM_56624
@@ -276,21 +237,6 @@
 #define BCM_TIMESYNC_SUPPORT
 #endif
 
-#if defined(BCM_56142_A0)
-#define BCM_56142
-#define BCM_56334
-#define BCM_56624
-#define BCM_56304
-#define BCM_56800
-#define BCM_FIREBOLT_SUPPORT
-#define BCM_BRADLEY_SUPPORT
-#define BCM_TRIUMPH_SUPPORT
-#define BCM_TRIUMPH2_SUPPORT
-#define BCM_ENDURO_SUPPORT
-#define BCM_TRX_SUPPORT
-#define BCM_HURRICANE_SUPPORT
-#define BCM_HURRICANE1_SUPPORT
-#endif
 
 #if defined(BCM_56840_A0) || defined(BCM_56840_B0)
 #define BCM_56840
@@ -388,7 +334,6 @@
 
 #if defined(BCM_56260_A0)
 #define BCM_56260
-#define BCM_56450
 #define BCM_56440
 #define BCM_56840
 #define BCM_56634
@@ -407,7 +352,6 @@
 #define BCM_TRX_SUPPORT
 #define BCM_ENDURO_SUPPORT
 #define BCM_TRIDENT_SUPPORT
-#define BCM_KATANA2_SUPPORT
 #define BCM_KATANA_SUPPORT
 #define BCM_MPLS_SUPPORT
 #define BCM_IPROC_SUPPORT
@@ -424,7 +368,6 @@
 #if defined(BCM_56270_A0)
 #define BCM_56270
 #define BCM_56260
-#define BCM_56450
 #define BCM_56440
 #define BCM_56840
 #define BCM_56634
@@ -444,7 +387,6 @@
 #define BCM_TRX_SUPPORT
 #define BCM_ENDURO_SUPPORT
 #define BCM_TRIDENT_SUPPORT
-#define BCM_KATANA2_SUPPORT
 #define BCM_KATANA_SUPPORT
 #define BCM_MPLS_SUPPORT
 #define BCM_IPROC_SUPPORT
@@ -458,39 +400,6 @@
 #define BCM_OLP_SUPPORT
 #endif
 
-
-#if defined(BCM_56450_A0) || defined(BCM_56450_B0) || defined(BCM_56450_B1)
-#define BCM_56450
-#define BCM_56440
-#define BCM_56840
-#define BCM_56634
-#define BCM_56640
-#define BCM_56334
-#define BCM_56624
-#define BCM_56304
-#define BCM_56800
-#define BCM_FIREBOLT_SUPPORT
-#define BCM_BRADLEY_SUPPORT
-#define BCM_SCORPION_SUPPORT
-#define BCM_TRIUMPH_SUPPORT
-#define BCM_TRIUMPH2_SUPPORT
-#define BCM_TRIUMPH3_SUPPORT
-#define BCM_TRX_SUPPORT
-#define BCM_ENDURO_SUPPORT
-#define BCM_TRIDENT_SUPPORT
-#define BCM_KATANA2_SUPPORT
-#define BCM_KATANA_SUPPORT
-#define BCM_MPLS_SUPPORT
-#define BCM_IPROC_SUPPORT
-#define BCM_DDR3_SUPPORT
-#define BCM_TIMESYNC_SUPPORT
-#define BCM_EXTND_SBUS_SUPPORT
-#define BCM_CMICM_SUPPORT
-#define BCM_SBUSDMA_SUPPORT
-#define BCM_PE_SUPPORT
-#define BCM_OLP_SUPPORT
-#endif
-
 #if defined(BCM_56850_A0)
 #define BCM_56850
 #define BCM_56840
@@ -1252,6 +1161,7 @@
 #endif
 
 
+
 #if defined(BCM_88480_A0) || defined(BCM_88480_B0) /* Defined via mcmrelease: genallchips.pl... ??? */
 #define BCM_88480
 #define BCM_IPROC_SUPPORT
@@ -1377,7 +1287,6 @@
 
 #if defined(BCM_56150_A0)
 #define BCM_56150
-#define BCM_56142
 #define BCM_56334
 #define BCM_56624
 #define BCM_56304
@@ -1388,7 +1297,6 @@
 #define BCM_TRIUMPH2_SUPPORT
 #define BCM_ENDURO_SUPPORT
 #define BCM_TRX_SUPPORT
-#define BCM_HURRICANE_SUPPORT
 #define BCM_HURRICANE2_SUPPORT
 #define BCM_CMICM_SUPPORT
 #define BCM_IPROC_SUPPORT
@@ -1411,7 +1319,6 @@
 #define BCM_TRIUMPH2_SUPPORT
 #define BCM_ENDURO_SUPPORT
 #define BCM_TRX_SUPPORT
-#define BCM_HURRICANE_SUPPORT
 #define BCM_HURRICANE2_SUPPORT
 #define BCM_CMICM_SUPPORT
 #define BCM_IPROC_SUPPORT
@@ -1438,7 +1345,6 @@
 #define BCM_TRIUMPH2_SUPPORT
 #define BCM_ENDURO_SUPPORT
 #define BCM_TRX_SUPPORT
-#define BCM_HURRICANE_SUPPORT
 #define BCM_HURRICANE2_SUPPORT
 #define BCM_CMICM_SUPPORT
 #define BCM_IPROC_SUPPORT
@@ -1464,7 +1370,6 @@
 #define BCM_TRIUMPH2_SUPPORT
 #define BCM_ENDURO_SUPPORT
 #define BCM_TRX_SUPPORT
-#define BCM_HURRICANE_SUPPORT
 #define BCM_HURRICANE2_SUPPORT
 #define BCM_CMICM_SUPPORT
 #define BCM_IPROC_SUPPORT
@@ -1490,7 +1395,6 @@
 #define BCM_TRIUMPH2_SUPPORT
 #define BCM_ENDURO_SUPPORT
 #define BCM_TRX_SUPPORT
-#define BCM_HURRICANE_SUPPORT
 #define BCM_HURRICANE2_SUPPORT
 #define BCM_CMICM_SUPPORT
 #define BCM_CMICDV2_SUPPORT
@@ -1528,7 +1432,6 @@
 #define BCM_TRIUMPH2_SUPPORT
 #define BCM_ENDURO_SUPPORT
 #define BCM_TRX_SUPPORT
-#define BCM_HURRICANE_SUPPORT
 #define BCM_HURRICANE2_SUPPORT
 #define BCM_CMICX_SUPPORT
 #define BCM_FIFODMA_SUPPORT
@@ -1572,12 +1475,12 @@
     defined(BCM_56102) || defined(BCM_56304) || defined(BCM_56218) || \
     defined(BCM_56112) || defined(BCM_56314) || defined(BCM_56514) || \
     defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \
-    defined(BCM_56624) || defined(BCM_56224) || defined(BCM_56820) || \
-    defined(BCM_53314) || defined(BCM_56680) || defined(BCM_56725) || \
-    defined(BCM_56634) || defined(BCM_56524) || defined(BCM_56685) || \
-    defined(BCM_56334) || defined(BCM_56840) || defined(BCM_56142) || \
+    defined(BCM_56624) || defined(BCM_56224) || \
+    defined(BCM_53314) || defined(BCM_56680) || \
+    defined(BCM_56634) || defined(BCM_56524) || \
+    defined(BCM_56334) || defined(BCM_56840) || defined(BCM_56150) || \
     defined(BCM_56640) || defined(BCM_56440) || \
-    defined(BCM_56850) || defined(BCM_56450) || defined(BCM_56340) || \
+    defined(BCM_56850) || defined(BCM_56340) || \
     defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \
     defined(BCM_56150) || defined(BCM_53400) || defined(BCM_56960) || \
     defined(BCM_56870) || defined(BCM_56965) || defined(BCM_56970) || \
@@ -1591,7 +1494,7 @@
 #define BCM_XGS2_FABRIC_SUPPORT
 #endif
 
-#if defined(BCM_56700) || defined(BCM_56701) || defined(BCM_56725)
+#if defined(BCM_56700) || defined(BCM_56701)
 #define BCM_XGS3_FABRIC_SUPPORT
 #endif
 
@@ -1625,7 +1528,7 @@
 #endif
 
 /* Common XGS5 Port Module Support */
-#if defined(BCM_56450) || defined(BCM_56670) || defined(BCM_53650) || defined(BCM_56860) || \
+#if defined(BCM_56260) || defined(BCM_56270) || defined(BCM_56670) || defined(BCM_53650) || defined(BCM_56860) || \
     defined(BCM_56870) || defined(BCM_56970) || defined(BCM_56370) || \
     defined(BCM_56770) || defined(BCM_56980) || defined(BCM_56275) || \
     defined(BCM_56470)
@@ -1786,12 +1689,12 @@
  */
 #if defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \
     defined(BCM_56218) || defined(BCM_56624) || defined(BCM_56224) || \
-    defined(BCM_56820) || defined(BCM_56680) || defined(BCM_56725) || \
+    defined(BCM_56680) || \
     defined(BCM_53314) || defined(BCM_56634) || defined(BCM_56524) || \
-    defined(BCM_56685) || defined(BCM_56334) || \
-    defined(BCM_56840) || defined(BCM_56142) || \
+    defined(BCM_56334) || \
+    defined(BCM_56840) || defined(BCM_56150) || \
     defined(BCM_56640) || defined(BCM_56440) || defined(BCM_56850) || \
-    defined(BCM_56450) || defined(BCM_56340) || defined(BCM_56150) || \
+    defined(BCM_56340) || defined(BCM_56150) || \
     defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \
     defined(BCM_53400) || defined(BCM_56960) || \
     defined(BCM_56860) || defined(BCM_56965) || defined(BCM_56970) || \
@@ -1806,12 +1709,12 @@
  * If any supported chip has GXPORTS
  */
 #if defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \
-    defined(BCM_56624) || defined(BCM_56820) || defined(BCM_56680) || \
-    defined(BCM_56725) || defined(BCM_56634) || defined(BCM_56524) || \
-    defined(BCM_56685) || defined(BCM_56334) || \
-    defined(BCM_56840) || defined(BCM_56142) || \
+    defined(BCM_56624) || defined(BCM_56680) || \
+    defined(BCM_56634) || defined(BCM_56524) || \
+    defined(BCM_56334) || \
+    defined(BCM_56840) || defined(BCM_56150) || \
     defined(BCM_56640) || defined(BCM_56440) || defined(BCM_56850) || \
-    defined(BCM_56450) || defined(BCM_56340) || defined(BCM_56150) || \
+    defined(BCM_56340) || defined(BCM_56150) || \
     defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \
     defined(BCM_53400) || defined(BCM_56960) || defined(BCM_56965) || \
     defined(BCM_56970) || defined(BCM_53570) || defined(BCM_56980) || \
@@ -1834,7 +1737,7 @@
     defined(BCM_56102) || defined(BCM_56304) || defined(BCM_56112) || \
     defined(BCM_56314) || defined(BCM_56580) || defined(BCM_56700) || \
     defined(BCM_56800) || defined(BCM_56514) || defined(BCM_56624) || \
-    defined(BCM_56680) || defined(BCM_56820) || defined(BCM_56725) || \
+    defined(BCM_56680) || \
     defined(BCM_56334)
 #define BCM_BIGMAC_SUPPORT
 #endif
@@ -1843,7 +1746,7 @@
  * If any supported chip has XMAC ports
  */
 #if defined(BCM_56840) || defined(BCM_56640) || \
-    defined(BCM_56440) || defined(BCM_56450) || defined(BCM_56340)
+    defined(BCM_56440) || defined(BCM_56260) || defined(BCM_56270) || defined(BCM_56340)
 #define BCM_XMAC_SUPPORT
 #endif
 
@@ -1870,12 +1773,12 @@
 /*
  * If any supported chip has UniMAC ports
  */
-#if defined(BCM_56224) || defined(BCM_56624) || defined(BCM_56820) || \
-    defined(BCM_53314) || defined(BCM_56680) || defined(BCM_56725) || \
+#if defined(BCM_56224) || defined(BCM_56624) || \
+    defined(BCM_53314) || defined(BCM_56680) || \
     defined(BCM_56634) || defined(BCM_56524) || \
-    defined(BCM_56685) || defined(BCM_56334) || \
-    defined(BCM_56840) || defined(BCM_56142) || \
-    defined(BCM_56440) || defined(BCM_56450) || defined(BCM_56150) || \
+    defined(BCM_56334) || \
+    defined(BCM_56840) || defined(BCM_56150) || \
+    defined(BCM_56440) || defined(BCM_56150) || \
     defined(BCM_53400) || defined(BCM_56260) || defined(BCM_56160) || \
     defined(BCM_56270) || defined(BCM_53570) || defined(BCM_53540) || \
     defined(BCM_56070)
@@ -1935,15 +1838,14 @@
     defined(BCM_56580) || defined(BCM_56700) || \
     defined(BCM_56800) || defined(BCM_56218) || \
     defined(BCM_56514) || defined(BCM_56624) || \
-    defined(BCM_56224) || defined(BCM_56820) || \
+    defined(BCM_56224) || \
     defined(BCM_53314) || defined(BCM_56680) || \
-    defined(BCM_56725) || defined(BCM_56634) || \
+    defined(BCM_56634) || \
     defined(BCM_56524) || defined(BCM_56334) || \
-    defined(BCM_56685) || \
-    defined(BCM_56840) || defined(BCM_56142) || \
+    defined(BCM_56840) || defined(BCM_56150) || \
     defined(BCM_56640) || \
     defined(BCM_56440) || defined(BCM_56850) || \
-    defined(BCM_56450) || defined(BCM_56340) || \
+    defined(BCM_56340) || \
     defined(BCM_56150) || \
     defined(BCM_53400) || defined(BCM_56960) || \
     defined(BCM_56260) || defined(BCM_56160) || \
@@ -2064,14 +1966,10 @@ typedef enum soc_chip_types_e {
     SOC_CHIP_BCM56224_B0,
     SOC_CHIP_BCM53314_A0,
     SOC_CHIP_BCM53324_A0,
-    SOC_CHIP_BCM56725_A0,
-    SOC_CHIP_BCM56820_A0,
     SOC_CHIP_BCM56634_A0,
     SOC_CHIP_BCM56634_B0,
     SOC_CHIP_BCM56524_A0,
     SOC_CHIP_BCM56524_B0,
-    SOC_CHIP_BCM56685_A0,
-    SOC_CHIP_BCM56685_B0,
     SOC_CHIP_BCM56334_A0,
     SOC_CHIP_BCM56334_B0,
     SOC_CHIP_BCM56840_A0,
@@ -2088,7 +1986,6 @@ typedef enum soc_chip_types_e {
     SOC_CHIP_BCM56770_A0,
     SOC_CHIP_BCM56771_A0,
     SOC_CHIP_BCM56970_A0,
-    SOC_CHIP_BCM56142_A0,
     SOC_CHIP_BCM56150_A0,
     SOC_CHIP_BCM88660_A0,
     SOC_CHIP_BCM88675_A0,
@@ -2121,9 +2018,6 @@ typedef enum soc_chip_types_e {
     SOC_CHIP_BCM56340_A0, /* Helix4 */
     SOC_CHIP_BCM56440_A0,
     SOC_CHIP_BCM56440_B0,
-    SOC_CHIP_BCM56450_A0,
-    SOC_CHIP_BCM56450_B0,
-    SOC_CHIP_BCM56450_B1,
     SOC_CHIP_BCM56260_A0, /* Saber2 */
     SOC_CHIP_BCM56260_B0, /* Saber2 */
     SOC_CHIP_BCM56270_A0, /* Metrolite */
@@ -2184,6 +2078,7 @@ typedef enum soc_chip_types_e {
 #define SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL
 #endif
 #define SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL
+#define SOC_CHIP_TYPE_DNXF_MAP_INIT_ADDITIONAL
 #ifdef BCM_DNXF3_SUPPORT
 #define SOC_CHIP_DNXF_TYPE_MAP_INIT_ADDITIONAL  /* SOC_CHIP_BCM88920_A0 */ SOC_CHIP_BCM8892X,
 #else
@@ -2222,14 +2117,10 @@ typedef enum soc_chip_types_e {
     /* SOC_CHIP_BCM56224_B0, */ SOC_CHIP_BCM56224, \
     /* SOC_CHIP_BCM53314_A0, */ SOC_CHIP_BCM53314, \
     /* SOC_CHIP_BCM53324_A0, */ SOC_CHIP_BCM53314, \
-    /* SOC_CHIP_BCM56725_A0, */ SOC_CHIP_BCM56725, \
-    /* SOC_CHIP_BCM56820_A0, */ SOC_CHIP_BCM56820, \
     /* SOC_CHIP_BCM56634_A0, */ SOC_CHIP_BCM56634, \
     /* SOC_CHIP_BCM56634_B0, */ SOC_CHIP_BCM56634, \
     /* SOC_CHIP_BCM56524_A0, */ SOC_CHIP_BCM56524, \
     /* SOC_CHIP_BCM56524_B0, */ SOC_CHIP_BCM56524, \
-    /* SOC_CHIP_BCM56685_A0, */ SOC_CHIP_BCM56685, \
-    /* SOC_CHIP_BCM56685_B0, */ SOC_CHIP_BCM56685, \
     /* SOC_CHIP_BCM56334_A0, */ SOC_CHIP_BCM56334, \
     /* SOC_CHIP_BCM56334_B0, */ SOC_CHIP_BCM56334, \
     /* SOC_CHIP_BCM56840_A0, */ SOC_CHIP_BCM56840, \
@@ -2246,7 +2137,6 @@ typedef enum soc_chip_types_e {
     /* SOC_CHIP_BCM56770_A0, */ SOC_CHIP_BCM56770, \
     /* SOC_CHIP_BCM56771_A0, */ SOC_CHIP_BCM56770, \
     /* SOC_CHIP_BCM56970_A0, */ SOC_CHIP_BCM56970, \
-    /* SOC_CHIP_BCM56142_A0, */ SOC_CHIP_BCM56142, \
     /* SOC_CHIP_BCM56150_A0, */ SOC_CHIP_BCM56150, \
     /* SOC_CHIP_BCM88660_A0  */ SOC_CHIP_BCM88660, \
     /* SOC_CHIP_BCM88675_A0  */ SOC_CHIP_BCM88675, \
@@ -2263,6 +2153,7 @@ typedef enum soc_chip_types_e {
     /* SOC_CHIP_BCM8216_A0 */ SOC_CHIP_BCM8216, \
     SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL \
     SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL \
+    SOC_CHIP_TYPE_DNXF_MAP_INIT_ADDITIONAL \
     /* SOC_CHIP_BCM88480_A0 */ SOC_CHIP_BCM8848X, \
     /* SOC_CHIP_BCM88480_B0 */ SOC_CHIP_BCM8848X, \
     /* SOC_CHIP_BCM88480_B1 */ SOC_CHIP_BCM8848X, \
@@ -2274,9 +2165,6 @@ typedef enum soc_chip_types_e {
     /* SOC_CHIP_BCM56340_A0, */ SOC_CHIP_BCM56340, \
     /* SOC_CHIP_BCM56440_A0  */ SOC_CHIP_BCM56440, \
     /* SOC_CHIP_BCM56440_B0  */ SOC_CHIP_BCM56440, \
-    /* SOC_CHIP_BCM56450_A0  */ SOC_CHIP_BCM56450, \
-    /* SOC_CHIP_BCM56450_B0  */ SOC_CHIP_BCM56450, \
-    /* SOC_CHIP_BCM56450_B1  */ SOC_CHIP_BCM56450, \
     /* SOC_CHIP_BCM56260_A0  */ SOC_CHIP_BCM56260, \
     /* SOC_CHIP_BCM56260_B0  */ SOC_CHIP_BCM56260, \
     /* SOC_CHIP_BCM56270_A0  */ SOC_CHIP_BCM56270, \
@@ -2332,6 +2220,7 @@ typedef enum soc_chip_types_e {
 #define SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL
 #endif
 #define SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL
+#define SOC_CHIP_TYPE_DNXF_NAMES_INIT_ADDITIONAL
 #ifdef BCM_DNXF3_SUPPORT
 #define SOC_CHIP_DNXF_TYPE_NAMES_INIT_ADDITIONAL     "BCM88920_A0",
 #else
@@ -2370,14 +2259,10 @@ typedef enum soc_chip_types_e {
     "BCM56224_B0", \
     "BCM53314_A0", \
     "BCM53324_A0", \
-    "BCM56725_A0", \
-    "BCM56820_A0", \
     "BCM56634_A0", \
     "BCM56634_B0", \
     "BCM56524_A0", \
     "BCM56524_B0", \
-    "BCM56685_A0", \
-    "BCM56685_B0", \
     "BCM56334_A0", \
     "BCM56334_B0", \
     "BCM56840_A0", \
@@ -2394,7 +2279,6 @@ typedef enum soc_chip_types_e {
     "BCM56770_A0", \
     "BCM56771_A0", \
     "BCM56970_A0", \
-    "BCM56142_A0", \
     "BCM56150_A0", \
     "BCM88660_A0", \
     "BCM88675_A0", \
@@ -2411,6 +2295,7 @@ typedef enum soc_chip_types_e {
     "BCM8216_A0", \
     SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL \
     SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL \
+    SOC_CHIP_TYPE_DNXF_NAMES_INIT_ADDITIONAL \
     "BCM88480_A0", \
     "BCM88480_B0", \
     "BCM88480_B1", \
@@ -2422,9 +2307,6 @@ typedef enum soc_chip_types_e {
     "BCM56340_A0", \
     "BCM56440_A0", \
     "BCM56440_B0", \
-    "BCM56450_A0", \
-    "BCM56450_B0", \
-    "BCM56450_B1", \
     "BCM56260_A0", \
     "BCM56260_B0", \
     "BCM56270_A0", \
@@ -2492,11 +2374,8 @@ typedef enum soc_chip_groups_e {
     SOC_CHIP_BCM56680,
     SOC_CHIP_BCM56224,
     SOC_CHIP_BCM53314,
-    SOC_CHIP_BCM56725,
-    SOC_CHIP_BCM56820,
     SOC_CHIP_BCM56634,
     SOC_CHIP_BCM56524,
-    SOC_CHIP_BCM56685,
     SOC_CHIP_BCM56334,
     SOC_CHIP_BCM56840,
     SOC_CHIP_BCM56850,
@@ -2508,7 +2387,6 @@ typedef enum soc_chip_groups_e {
     SOC_CHIP_BCM56470,
     SOC_CHIP_BCM56770,
     SOC_CHIP_BCM56970,
-    SOC_CHIP_BCM56142,
     SOC_CHIP_BCM56150,
     SOC_CHIP_BCM88660,
     SOC_CHIP_BCM88675,
@@ -2532,7 +2410,6 @@ typedef enum soc_chip_groups_e {
     SOC_CHIP_BCM56640,
     SOC_CHIP_BCM56340,
     SOC_CHIP_BCM56440,
-    SOC_CHIP_BCM56450,
     SOC_CHIP_BCM56260,
     SOC_CHIP_BCM56270,
     SOC_CHIP_BCM56860,
@@ -2580,6 +2457,7 @@ typedef enum soc_chip_groups_e {
 #define SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL
 #endif
 #define SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL
+#define SOC_CHIP_GROUP_DNXF_NAMES_INIT_ADDITIONAL
 #ifdef BCM_DNXF3_SUPPORT
 #define SOC_CHIP_DNXF_GROUP_NAMES_INIT_ADDITIONAL      "BCM8892X",
 #else
@@ -2608,11 +2486,8 @@ typedef enum soc_chip_groups_e {
     "BCM56680", \
     "BCM56224", \
     "BCM53314", \
-    "BCM56725", \
-    "BCM56820", \
     "BCM56634", \
     "BCM56524", \
-    "BCM56685", \
     "BCM56334", \
     "BCM56840", \
     "BCM56850", \
@@ -2624,7 +2499,6 @@ typedef enum soc_chip_groups_e {
     "BCM56470", \
     "BCM56770", \
     "BCM56970", \
-    "BCM56142", \
     "BCM56150", \
     "BCM88660", \
     "BCM88675", \
@@ -2636,6 +2510,7 @@ typedef enum soc_chip_groups_e {
     "BCM8216", \
     SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL \
     SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL \
+    SOC_CHIP_GROUP_DNXF_NAMES_INIT_ADDITIONAL \
     "BCM8848X", \
     "BCM88375", \
     "BCM88470", \
@@ -2643,7 +2518,6 @@ typedef enum soc_chip_groups_e {
     "BCM56640", \
     "BCM56340", \
     "BCM56440", \
-    "BCM56450", \
     "BCM56260", \
     "BCM56270", \
     "BCM56860", \
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h
index 4497c2ed0a0..d4b48be6fbf 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h
@@ -1603,6 +1603,12 @@
 #define DNXC_A2_REV_ID          0x0003
 #define DNXC_B0_REV_ID          0x0011
 #define DNXC_B1_REV_ID          0x0012
+#define DNXC_B2_REV_ID          0x0013
+#define DNXC_C0_REV_ID          0x0021
+#define DNXC_C1_REV_ID          0x0022
+#define DNXC_C2_REV_ID          0x0023
+#define DNXC_D0_REV_ID          0x0031
+#define DNXC_D1_REV_ID          0x0032
 #define DNXC_DEVID_FAMILY_MASK  0xfff0
 #define BCM88790_DEVICE_ID      0x8790
 #define BCM88790_A0_REV_ID      DNXC_A0_REV_ID
@@ -1621,7 +1627,7 @@
 #define BCM8879C_DEVICE_ID      0x879C
 #define BCM8879D_DEVICE_ID      0x879D
 #define BCM8879E_DEVICE_ID      0x879E
-#define BCM8879F_DEVICE_ID      0x879F
+#define BCM8879F_DEVICE_ID      0x879F  
 #ifdef BCM_DNXF3_SUPPORT
 #define RAMON2_DEVICE_ID      0x8910
 #define BCM8891F_DEVICE_ID      0x891F
@@ -1920,8 +1926,10 @@
 #define Q3D_DEVICE_ID           0x8870
 #ifdef BCM_Q3A_SUPPORT
 #define Q3A_DEVICE_ID           0x8490
-#define Q3U_DEVICE_ID           0x8400
-#define Q3N_DEVICE_ID           0x8405
+#define Q3U_DEVICE_ID           0x84A0
+#define Q3N_DEVICE_ID           0x84A5
+#define Q3U_ORIG_DEVICE_ID      0x8400
+#define Q3N_ORIG_DEVICE_ID      0x8405
 #endif
 #endif
 #define Q2A_DEVICE_ID           0x8480
@@ -2081,6 +2089,8 @@
 
 #define BCM78800_DEVICE_ID 0xf800
 #define BCM78800_A0_REV_ID 0x0001
+#define BCM78808_DEVICE_ID 0xf808
+#define BCM78808_A0_REV_ID 0x0001
 
 #define BCM56880_DEVICE_ID 0xb880
 #define BCM56880_A0_REV_ID 0x0001
@@ -2156,16 +2166,17 @@
 
 #define BCM78900_DEVICE_ID 0xf900
 #define BCM78900_B0_REV_ID 0x0011
-
 #define BCM78902_DEVICE_ID 0xf902
 #define BCM78902_B0_REV_ID 0x0011
-
 #define BCM78903_DEVICE_ID 0xf903
 #define BCM78903_B0_REV_ID 0x0011
 
 #define BCM78905_DEVICE_ID 0xf905
 #define BCM78905_A0_REV_ID 0x0001
 
+#define BCM78907_DEVICE_ID 0xf907
+#define BCM78907_A0_REV_ID 0x0001
+
 #define BCM56080_DEVICE_ID 0xb080
 #define BCM56080_A0_REV_ID 0x0001
 #define BCM56080_A1_REV_ID 0x0002
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c
index a64618e7844..0cc6260e01d 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c
@@ -108,7 +108,7 @@ static void strip_vlan_tag(struct sk_buff *skb);
 static int  get_tag_status(int dcb_type, void *meta);
 static struct sk_buff *strip_tag_rx_cb(struct sk_buff *skb, int dev_no, void *meta);
 static struct sk_buff *strip_tag_tx_cb(struct sk_buff *skb, int dev_no, void *meta);
-static int  strip_tag_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta,
+int strip_tag_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta,
                                 int chan, kcom_filter_t * kf);
 static int  _pprint(struct seq_file *m);
 static int  _cleanup(void);
@@ -323,7 +323,7 @@ strip_tag_tx_cb(struct sk_buff *skb, int dev_no, void *meta)
 }
 
 /* Filter callback not used */
-static int
+int
 strip_tag_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta,
                     int chan, kcom_filter_t *kf)
 {
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile
index 8156eb0e3a8..38dde639ec6 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile
@@ -100,6 +100,7 @@ USER_BDE := $(DEST_DIR)/$(USER_BDE_LOCAL)
 
 KNET_CB_LOCAL := linux-knet-cb.$(KOBJ)
 KNET_CB := $(DEST_DIR)/$(KNET_CB_LOCAL)
+
 export BUILD_BCM_GENL=1
 export BUILD_GENL_PACKET=0
 GENL_PACKET_LOCAL := genl-packet.$(KOBJ)
@@ -182,6 +183,7 @@ all_targets +=$(LOCAL_TARGETS)
 endif
 endif
 
+
 ADD_TO_CFLAGS += -I$(SDK)/systems/linux/kernel/modules/include
 COND_KNET_LIBS = libuser.$(libext)
 endif
diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control
index 5ead58f70dd..86b85adf16f 100644
--- a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control
+++ b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control
@@ -7,20 +7,20 @@ Standards-Version: 3.9.3
 
 Package: sonic-platform-alphanetworks-snh60a0-320fv2
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: sonic-platform-alphanetworks-snh60b0-640f
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: sonic-platform-alphanetworks-snj60d0-320f
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: sonic-platform-alphanetworks-bes2348t
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista
index 589c02ff643..7fb67de3124 160000
--- a/platform/broadcom/sonic-platform-modules-arista
+++ b/platform/broadcom/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit 589c02ff64379f22febb360ab195767ae56b7873
+Subproject commit 7fb67de3124c26bab817aa6c457dd64c52afa7ec
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/control b/platform/broadcom/sonic-platform-modules-cel/debian/control
index 41e8eefd8cf..33869510831 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/control
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/control
@@ -7,23 +7,23 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-dx010
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 
 Package: platform-modules-haliburton
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-seastone2
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as led, sfp
 
 Package: platform-modules-silverstone
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as led, sfp.
 
 Package: platform-modules-ds1000
@@ -48,5 +48,5 @@ Description: kernel modules for platform devices such as led, sfp
 
 Package: platform-modules-ds2000
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/control b/platform/broadcom/sonic-platform-modules-dell/debian/control
index 4ff2f7ec27e..313c4a2d573 100644
--- a/platform/broadcom/sonic-platform-modules-dell/debian/control
+++ b/platform/broadcom/sonic-platform-modules-dell/debian/control
@@ -7,72 +7,72 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-s6000
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-z9100
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s6100
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-z9264f
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s5212f
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s5224f
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s5232f
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s5248f
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-n3248te
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-z9332f
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-z9432f
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-n3248pxe
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-e3224f
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s5296f
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-z9664f
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
index 4e106f01381..0b3ed8b66f1 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -9,7 +9,6 @@ export module_out_put_dir
 
 PLAT_SYSFS_DIR = $(PWD)/plat_sysfs
 S3IP_SYSFS_DIR = $(PWD)/s3ip_sysfs
-PINCTRL = $(PWD)/pinctrl
 
 export PLAT_SYSFS_DIR
 export S3IP_SYSFS_DIR
@@ -45,11 +44,9 @@ obj-m += ct7148.o
 obj-m += wb_ucd9081.o
 obj-m += wb_indirect_dev.o
 
-
 all :
 	$(MAKE) -C $(PLAT_SYSFS_DIR)
 	$(MAKE) -C $(S3IP_SYSFS_DIR)
-	$(MAKE) -C $(PINCTRL)
 	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
 	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
 	cp -p  $(PWD)/*.ko $(module_out_put_dir)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/Makefile
deleted file mode 100644
index 295934ca4a2..00000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/Makefile
+++ /dev/null
@@ -1,17 +0,0 @@
-PWD		= $(shell pwd)
-
-EXTRA_CFLAGS:= -I$(M)/include
-EXTRA_CFLAGS+= -Wall
-
-obj-m := wb_pinctrl_intel.o
-obj-m += wb_gpio_c3000.o
-obj-m += wb_gpio_c3000_device.o
-
-all:
-	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
-	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
-	cp -p  $(PWD)/*.ko $(module_out_put_dir)
-clean:
-	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod
-	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
-	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h
deleted file mode 100644
index 81655ead600..00000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h
+++ /dev/null
@@ -1,262 +0,0 @@
-/*
- * A header definition for pin control subsystem
- *
- * Copyright (C) 2024 Micas Networks Inc.
- *
- * Based on core.h
- * Copyright (C) 2011 ST-Ericsson SA
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/kref.h>
-#include <linux/mutex.h>
-#include <linux/radix-tree.h>
-#include <linux/pinctrl/pinconf.h>
-#include <linux/pinctrl/machine.h>
-
-struct pinctrl_gpio_range;
-
-/**
- * struct pinctrl_dev - pin control class device
- * @node: node to include this pin controller in the global pin controller list
- * @desc: the pin controller descriptor supplied when initializing this pin
- *	controller
- * @pin_desc_tree: each pin descriptor for this pin controller is stored in
- *	this radix tree
- * @pin_group_tree: optionally each pin group can be stored in this radix tree
- * @num_groups: optionally number of groups can be kept here
- * @pin_function_tree: optionally each function can be stored in this radix tree
- * @num_functions: optionally number of functions can be kept here
- * @gpio_ranges: a list of GPIO ranges that is handled by this pin controller,
- *	ranges are added to this list at runtime
- * @dev: the device entry for this pin controller
- * @owner: module providing the pin controller, used for refcounting
- * @driver_data: driver data for drivers registering to the pin controller
- *	subsystem
- * @p: result of pinctrl_get() for this device
- * @hog_default: default state for pins hogged by this device
- * @hog_sleep: sleep state for pins hogged by this device
- * @mutex: mutex taken on each pin controller specific action
- * @device_root: debugfs root for this device
- */
-struct pinctrl_dev {
-	struct list_head node;
-	struct pinctrl_desc *desc;
-	struct radix_tree_root pin_desc_tree;
-#ifdef CONFIG_GENERIC_PINCTRL_GROUPS
-	struct radix_tree_root pin_group_tree;
-	unsigned int num_groups;
-#endif
-#ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS
-	struct radix_tree_root pin_function_tree;
-	unsigned int num_functions;
-#endif
-	struct list_head gpio_ranges;
-	struct device *dev;
-	struct module *owner;
-	void *driver_data;
-	struct pinctrl *p;
-	struct pinctrl_state *hog_default;
-	struct pinctrl_state *hog_sleep;
-	struct mutex mutex;
-#ifdef CONFIG_DEBUG_FS
-	struct dentry *device_root;
-#endif
-};
-
-/**
- * struct pinctrl - per-device pin control state holder
- * @node: global list node
- * @dev: the device using this pin control handle
- * @states: a list of states for this device
- * @state: the current state
- * @dt_maps: the mapping table chunks dynamically parsed from device tree for
- *	this device, if any
- * @users: reference count
- */
-struct pinctrl {
-	struct list_head node;
-	struct device *dev;
-	struct list_head states;
-	struct pinctrl_state *state;
-	struct list_head dt_maps;
-	struct kref users;
-};
-
-/**
- * struct pinctrl_state - a pinctrl state for a device
- * @node: list node for struct pinctrl's @states field
- * @name: the name of this state
- * @settings: a list of settings for this state
- */
-struct pinctrl_state {
-	struct list_head node;
-	const char *name;
-	struct list_head settings;
-};
-
-/**
- * struct pinctrl_setting_mux - setting data for MAP_TYPE_MUX_GROUP
- * @group: the group selector to program
- * @func: the function selector to program
- */
-struct pinctrl_setting_mux {
-	unsigned group;
-	unsigned func;
-};
-
-/**
- * struct pinctrl_setting_configs - setting data for MAP_TYPE_CONFIGS_*
- * @group_or_pin: the group selector or pin ID to program
- * @configs: a pointer to an array of config parameters/values to program into
- *	hardware. Each individual pin controller defines the format and meaning
- *	of config parameters.
- * @num_configs: the number of entries in array @configs
- */
-struct pinctrl_setting_configs {
-	unsigned group_or_pin;
-	unsigned long *configs;
-	unsigned num_configs;
-};
-
-/**
- * struct pinctrl_setting - an individual mux or config setting
- * @node: list node for struct pinctrl_settings's @settings field
- * @type: the type of setting
- * @pctldev: pin control device handling to be programmed. Not used for
- *   PIN_MAP_TYPE_DUMMY_STATE.
- * @dev_name: the name of the device using this state
- * @data: Data specific to the setting type
- */
-struct pinctrl_setting {
-	struct list_head node;
-	enum pinctrl_map_type type;
-	struct pinctrl_dev *pctldev;
-	const char *dev_name;
-	union {
-		struct pinctrl_setting_mux mux;
-		struct pinctrl_setting_configs configs;
-	} data;
-};
-
-/**
- * struct pin_desc - pin descriptor for each physical pin in the arch
- * @pctldev: corresponding pin control device
- * @name: a name for the pin, e.g. the name of the pin/pad/finger on a
- *	datasheet or such
- * @dynamic_name: if the name of this pin was dynamically allocated
- * @drv_data: driver-defined per-pin data. pinctrl core does not touch this
- * @mux_usecount: If zero, the pin is not claimed, and @owner should be NULL.
- *	If non-zero, this pin is claimed by @owner. This field is an integer
- *	rather than a boolean, since pinctrl_get() might process multiple
- *	mapping table entries that refer to, and hence claim, the same group
- *	or pin, and each of these will increment the @usecount.
- * @mux_owner: The name of device that called pinctrl_get().
- * @mux_setting: The most recent selected mux setting for this pin, if any.
- * @gpio_owner: If pinctrl_gpio_request() was called for this pin, this is
- *	the name of the GPIO that "owns" this pin.
- */
-struct pin_desc {
-	struct pinctrl_dev *pctldev;
-	const char *name;
-	bool dynamic_name;
-	void *drv_data;
-	/* These fields only added when supporting pinmux drivers */
-#ifdef CONFIG_PINMUX
-	unsigned mux_usecount;
-	const char *mux_owner;
-	const struct pinctrl_setting_mux *mux_setting;
-	const char *gpio_owner;
-#endif
-};
-
-/**
- * struct pinctrl_maps - a list item containing part of the mapping table
- * @node: mapping table list node
- * @maps: array of mapping table entries
- * @num_maps: the number of entries in @maps
- */
-struct pinctrl_maps {
-	struct list_head node;
-	const struct pinctrl_map *maps;
-	unsigned num_maps;
-};
-
-#ifdef CONFIG_GENERIC_PINCTRL_GROUPS
-
-/**
- * struct group_desc - generic pin group descriptor
- * @name: name of the pin group
- * @pins: array of pins that belong to the group
- * @num_pins: number of pins in the group
- * @data: pin controller driver specific data
- */
-struct group_desc {
-	const char *name;
-	int *pins;
-	int num_pins;
-	void *data;
-};
-
-int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev);
-
-const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev,
-					   unsigned int group_selector);
-
-int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev,
-				   unsigned int group_selector,
-				   const unsigned int **pins,
-				   unsigned int *npins);
-
-struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev,
-					     unsigned int group_selector);
-
-int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name,
-			      int *gpins, int ngpins, void *data);
-
-int pinctrl_generic_remove_group(struct pinctrl_dev *pctldev,
-				 unsigned int group_selector);
-
-#endif	/* CONFIG_GENERIC_PINCTRL_GROUPS */
-
-struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *dev_name);
-struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np);
-int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name);
-const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin);
-int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
-			       const char *pin_group);
-
-static inline struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev,
-					    unsigned int pin)
-{
-	return radix_tree_lookup(&pctldev->pin_desc_tree, pin);
-}
-
-extern struct pinctrl_gpio_range *
-pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev,
-					unsigned int pin);
-
-extern int pinctrl_force_sleep(struct pinctrl_dev *pctldev);
-extern int pinctrl_force_default(struct pinctrl_dev *pctldev);
-
-extern struct mutex pinctrl_maps_mutex;
-extern struct list_head pinctrl_maps;
-
-#define for_each_maps(_maps_node_, _i_, _map_) \
-	list_for_each_entry(_maps_node_, &pinctrl_maps, node) \
-		for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \
-			_i_ < _maps_node_->num_maps; \
-			_i_++, _map_ = &_maps_node_->maps[_i_])
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c
deleted file mode 100644
index 7689ba1371b..00000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/*
- * An wb_gpio_c3000 driver for gpio c3000 function
- *
- * Copyright (C) 2024 Micas Networks Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/mod_devicetable.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/pinctrl/pinctrl.h>
-#include <linux/slab.h>
-#include <linux/device.h>
-#include <linux/pci.h>
-
-#include "wb_pinctrl_intel.h"
-
-static int g_c3000_gpio_debug = 0;
-static int g_c3000_gpio_error = 0;
-module_param(g_c3000_gpio_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_c3000_gpio_error, int, S_IRUGO | S_IWUSR);
-
-#define C3000_GPIO_VERBOSE(fmt, args...) do {                                        \
-    if (g_c3000_gpio_debug) { \
-        printk(KERN_INFO "[GPIO_PCIE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define C3000_GPIO_ERROR(fmt, args...) do {                                        \
-    if (g_c3000_gpio_error) { \
-        printk(KERN_ERR "[GPIO_PCIE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define DNV_PAD_OWN	0x020
-#define DNV_PADCFGLOCK	0x090
-#define DNV_HOSTSW_OWN	0x0C0
-#define DNV_GPI_IS	0x100
-#define DNV_GPI_IE	0x120
-
-#define DNV_GPP(n, s, e)				\
-	{						\
-		.reg_num = (n),				\
-		.base = (s),				\
-		.size = ((e) - (s) + 1),		\
-	}
-
-#define DNV_COMMUNITY(b, s, e, g, d)			\
-	{						\
-		.barno = (b),				\
-		.padown_offset = DNV_PAD_OWN,		\
-		.padcfglock_offset = DNV_PADCFGLOCK,	\
-		.hostown_offset = DNV_HOSTSW_OWN,	\
-		.is_offset = DNV_GPI_IS,		\
-		.ie_offset = DNV_GPI_IE,		\
-		.pin_base = (s),			\
-		.npins = ((e) - (s) + 1),		\
-		.gpps = (g),				\
-		.ngpps = ARRAY_SIZE(g),			\
-		.dw_base = (d),				\
-	}
-
-/* Denverton */
-static const struct pinctrl_pin_desc dnv_pins[] = {
-	/* North ALL */
-	PINCTRL_PIN(0, "GBE0_SDP0"),
-	PINCTRL_PIN(1, "GBE1_SDP0"),
-	PINCTRL_PIN(2, "GBE0_SDP1"),
-	PINCTRL_PIN(3, "GBE1_SDP1"),
-	PINCTRL_PIN(4, "GBE0_SDP2"),
-	PINCTRL_PIN(5, "GBE1_SDP2"),
-	PINCTRL_PIN(6, "GBE0_SDP3"),
-	PINCTRL_PIN(7, "GBE1_SDP3"),
-	PINCTRL_PIN(8, "GBE2_LED0"),
-	PINCTRL_PIN(9, "GBE2_LED1"),
-	PINCTRL_PIN(10, "GBE0_I2C_CLK"),
-	PINCTRL_PIN(11, "GBE0_I2C_DATA"),
-	PINCTRL_PIN(12, "GBE1_I2C_CLK"),
-	PINCTRL_PIN(13, "GBE1_I2C_DATA"),
-	PINCTRL_PIN(14, "NCSI_RXD0"),
-	PINCTRL_PIN(15, "NCSI_CLK_IN"),
-	PINCTRL_PIN(16, "NCSI_RXD1"),
-	PINCTRL_PIN(17, "NCSI_CRS_DV"),
-	PINCTRL_PIN(18, "NCSI_ARB_IN"),
-	PINCTRL_PIN(19, "NCSI_TX_EN"),
-	PINCTRL_PIN(20, "NCSI_TXD0"),
-	PINCTRL_PIN(21, "NCSI_TXD1"),
-	PINCTRL_PIN(22, "NCSI_ARB_OUT"),
-	PINCTRL_PIN(23, "GBE0_LED0"),
-	PINCTRL_PIN(24, "GBE0_LED1"),
-	PINCTRL_PIN(25, "GBE1_LED0"),
-	PINCTRL_PIN(26, "GBE1_LED1"),
-	PINCTRL_PIN(27, "GPIO0"),
-	PINCTRL_PIN(28, "PCIE_CLKREQ0_N"),
-	PINCTRL_PIN(29, "PCIE_CLKREQ1_N"),
-	PINCTRL_PIN(30, "PCIE_CLKREQ2_N"),
-	PINCTRL_PIN(31, "PCIE_CLKREQ3_N"),
-	PINCTRL_PIN(32, "PCIE_CLKREQ4_N"),
-	PINCTRL_PIN(33, "GPIO1"),
-	PINCTRL_PIN(34, "GPIO2"),
-	PINCTRL_PIN(35, "SVID_ALERT_N"),
-	PINCTRL_PIN(36, "SVID_DATA"),
-	PINCTRL_PIN(37, "SVID_CLK"),
-	PINCTRL_PIN(38, "THERMTRIP_N"),
-	PINCTRL_PIN(39, "PROCHOT_N"),
-	PINCTRL_PIN(40, "MEMHOT_N"),
-	/* South DFX */
-	PINCTRL_PIN(41, "DFX_PORT_CLK0"),
-	PINCTRL_PIN(42, "DFX_PORT_CLK1"),
-	PINCTRL_PIN(43, "DFX_PORT0"),
-	PINCTRL_PIN(44, "DFX_PORT1"),
-	PINCTRL_PIN(45, "DFX_PORT2"),
-	PINCTRL_PIN(46, "DFX_PORT3"),
-	PINCTRL_PIN(47, "DFX_PORT4"),
-	PINCTRL_PIN(48, "DFX_PORT5"),
-	PINCTRL_PIN(49, "DFX_PORT6"),
-	PINCTRL_PIN(50, "DFX_PORT7"),
-	PINCTRL_PIN(51, "DFX_PORT8"),
-	PINCTRL_PIN(52, "DFX_PORT9"),
-	PINCTRL_PIN(53, "DFX_PORT10"),
-	PINCTRL_PIN(54, "DFX_PORT11"),
-	PINCTRL_PIN(55, "DFX_PORT12"),
-	PINCTRL_PIN(56, "DFX_PORT13"),
-	PINCTRL_PIN(57, "DFX_PORT14"),
-	PINCTRL_PIN(58, "DFX_PORT15"),
-	/* South GPP0 */
-	PINCTRL_PIN(59, "GPIO12"),
-	PINCTRL_PIN(60, "SMB5_GBE_ALRT_N"),
-	PINCTRL_PIN(61, "PCIE_CLKREQ5_N"),
-	PINCTRL_PIN(62, "PCIE_CLKREQ6_N"),
-	PINCTRL_PIN(63, "PCIE_CLKREQ7_N"),
-	PINCTRL_PIN(64, "UART0_RXD"),
-	PINCTRL_PIN(65, "UART0_TXD"),
-	PINCTRL_PIN(66, "SMB5_GBE_CLK"),
-	PINCTRL_PIN(67, "SMB5_GBE_DATA"),
-	PINCTRL_PIN(68, "ERROR2_N"),
-	PINCTRL_PIN(69, "ERROR1_N"),
-	PINCTRL_PIN(70, "ERROR0_N"),
-	PINCTRL_PIN(71, "IERR_N"),
-	PINCTRL_PIN(72, "MCERR_N"),
-	PINCTRL_PIN(73, "SMB0_LEG_CLK"),
-	PINCTRL_PIN(74, "SMB0_LEG_DATA"),
-	PINCTRL_PIN(75, "SMB0_LEG_ALRT_N"),
-	PINCTRL_PIN(76, "SMB1_HOST_DATA"),
-	PINCTRL_PIN(77, "SMB1_HOST_CLK"),
-	PINCTRL_PIN(78, "SMB2_PECI_DATA"),
-	PINCTRL_PIN(79, "SMB2_PECI_CLK"),
-	PINCTRL_PIN(80, "SMB4_CSME0_DATA"),
-	PINCTRL_PIN(81, "SMB4_CSME0_CLK"),
-	PINCTRL_PIN(82, "SMB4_CSME0_ALRT_N"),
-	PINCTRL_PIN(83, "USB_OC0_N"),
-	PINCTRL_PIN(84, "FLEX_CLK_SE0"),
-	PINCTRL_PIN(85, "FLEX_CLK_SE1"),
-	PINCTRL_PIN(86, "GPIO4"),
-	PINCTRL_PIN(87, "GPIO5"),
-	PINCTRL_PIN(88, "GPIO6"),
-	PINCTRL_PIN(89, "GPIO7"),
-	PINCTRL_PIN(90, "SATA0_LED_N"),
-	PINCTRL_PIN(91, "SATA1_LED_N"),
-	PINCTRL_PIN(92, "SATA_PDETECT0"),
-	PINCTRL_PIN(93, "SATA_PDETECT1"),
-	PINCTRL_PIN(94, "SATA0_SDOUT"),
-	PINCTRL_PIN(95, "SATA1_SDOUT"),
-	PINCTRL_PIN(96, "UART1_RXD"),
-	PINCTRL_PIN(97, "UART1_TXD"),
-	PINCTRL_PIN(98, "GPIO8"),
-	PINCTRL_PIN(99, "GPIO9"),
-	PINCTRL_PIN(100, "TCK"),
-	PINCTRL_PIN(101, "TRST_N"),
-	PINCTRL_PIN(102, "TMS"),
-	PINCTRL_PIN(103, "TDI"),
-	PINCTRL_PIN(104, "TDO"),
-	PINCTRL_PIN(105, "CX_PRDY_N"),
-	PINCTRL_PIN(106, "CX_PREQ_N"),
-	PINCTRL_PIN(107, "CTBTRIGINOUT"),
-	PINCTRL_PIN(108, "CTBTRIGOUT"),
-	PINCTRL_PIN(109, "DFX_SPARE2"),
-	PINCTRL_PIN(110, "DFX_SPARE3"),
-	PINCTRL_PIN(111, "DFX_SPARE4"),
-	/* South GPP1 */
-	PINCTRL_PIN(112, "SUSPWRDNACK"),
-	PINCTRL_PIN(113, "PMU_SUSCLK"),
-	PINCTRL_PIN(114, "ADR_TRIGGER"),
-	PINCTRL_PIN(115, "PMU_SLP_S45_N"),
-	PINCTRL_PIN(116, "PMU_SLP_S3_N"),
-	PINCTRL_PIN(117, "PMU_WAKE_N"),
-	PINCTRL_PIN(118, "PMU_PWRBTN_N"),
-	PINCTRL_PIN(119, "PMU_RESETBUTTON_N"),
-	PINCTRL_PIN(120, "PMU_PLTRST_N"),
-	PINCTRL_PIN(121, "SUS_STAT_N"),
-	PINCTRL_PIN(122, "SLP_S0IX_N"),
-	PINCTRL_PIN(123, "SPI_CS0_N"),
-	PINCTRL_PIN(124, "SPI_CS1_N"),
-	PINCTRL_PIN(125, "SPI_MOSI_IO0"),
-	PINCTRL_PIN(126, "SPI_MISO_IO1"),
-	PINCTRL_PIN(127, "SPI_IO2"),
-	PINCTRL_PIN(128, "SPI_IO3"),
-	PINCTRL_PIN(129, "SPI_CLK"),
-	PINCTRL_PIN(130, "SPI_CLK_LOOPBK"),
-	PINCTRL_PIN(131, "ESPI_IO0"),
-	PINCTRL_PIN(132, "ESPI_IO1"),
-	PINCTRL_PIN(133, "ESPI_IO2"),
-	PINCTRL_PIN(134, "ESPI_IO3"),
-	PINCTRL_PIN(135, "ESPI_CS0_N"),
-	PINCTRL_PIN(136, "ESPI_CLK"),
-	PINCTRL_PIN(137, "ESPI_RST_N"),
-	PINCTRL_PIN(138, "ESPI_ALRT0_N"),
-	PINCTRL_PIN(139, "GPIO10"),
-	PINCTRL_PIN(140, "GPIO11"),
-	PINCTRL_PIN(141, "ESPI_CLK_LOOPBK"),
-	PINCTRL_PIN(142, "EMMC_CMD"),
-	PINCTRL_PIN(143, "EMMC_STROBE"),
-	PINCTRL_PIN(144, "EMMC_CLK"),
-	PINCTRL_PIN(145, "EMMC_D0"),
-	PINCTRL_PIN(146, "EMMC_D1"),
-	PINCTRL_PIN(147, "EMMC_D2"),
-	PINCTRL_PIN(148, "EMMC_D3"),
-	PINCTRL_PIN(149, "EMMC_D4"),
-	PINCTRL_PIN(150, "EMMC_D5"),
-	PINCTRL_PIN(151, "EMMC_D6"),
-	PINCTRL_PIN(152, "EMMC_D7"),
-	PINCTRL_PIN(153, "GPIO3"),
-};
-
-static const unsigned int dnv_uart0_pins[] = { 60, 61, 64, 65 };
-static const unsigned int dnv_uart0_modes[] = { 2, 3, 1, 1 };
-static const unsigned int dnv_uart1_pins[] = { 94, 95, 96, 97 };
-static const unsigned int dnv_uart2_pins[] = { 60, 61, 62, 63 };
-static const unsigned int dnv_uart2_modes[] = { 1, 2, 2, 2 };
-static const unsigned int dnv_emmc_pins[] = {
-	142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152,
-};
-
-static const struct intel_pingroup dnv_groups[] = {
-	PIN_GROUP("uart0_grp", dnv_uart0_pins, dnv_uart0_modes),
-	PIN_GROUP("uart1_grp", dnv_uart1_pins, 1),
-	PIN_GROUP("uart2_grp", dnv_uart2_pins, dnv_uart2_modes),
-	PIN_GROUP("emmc_grp", dnv_emmc_pins, 1),
-};
-
-static const char * const dnv_uart0_groups[] = { "uart0_grp" };
-static const char * const dnv_uart1_groups[] = { "uart1_grp" };
-static const char * const dnv_uart2_groups[] = { "uart2_grp" };
-static const char * const dnv_emmc_groups[] = { "emmc_grp" };
-
-static const struct intel_function dnv_functions[] = {
-	FUNCTION("uart0", dnv_uart0_groups),
-	FUNCTION("uart1", dnv_uart1_groups),
-	FUNCTION("uart2", dnv_uart2_groups),
-	FUNCTION("emmc", dnv_emmc_groups),
-};
-
-static const struct intel_padgroup dnv_north_gpps[] = {
-	DNV_GPP(0, 0, 31),	/* North ALL_0 */
-	DNV_GPP(1, 32, 40),	/* North ALL_1 */
-};
-
-static const struct intel_padgroup dnv_south_gpps[] = {
-	DNV_GPP(0, 41, 58),	/* South DFX */
-	DNV_GPP(1, 59, 90),	/* South GPP0_0 */
-	DNV_GPP(2, 91, 111),	/* South GPP0_1 */
-	DNV_GPP(3, 112, 143),	/* South GPP1_0 */
-	DNV_GPP(4, 144, 153),	/* South GPP1_1 */
-};
-
-static const struct intel_community dnv_communities[] = {
-	DNV_COMMUNITY(0, 0, 40, dnv_north_gpps, 0xc20000),
-	DNV_COMMUNITY(1, 41, 153, dnv_south_gpps, 0xc50000),
-};
-
-static const struct intel_pinctrl_soc_data dnv_soc_data = {
-	.pins = dnv_pins,
-	.npins = ARRAY_SIZE(dnv_pins),
-	.groups = dnv_groups,
-	.ngroups = ARRAY_SIZE(dnv_groups),
-	.functions = dnv_functions,
-	.nfunctions = ARRAY_SIZE(dnv_functions),
-	.communities = dnv_communities,
-	.ncommunities = ARRAY_SIZE(dnv_communities),
-};
-
-static INTEL_PINCTRL_PM_OPS(dnv_pinctrl_pm_ops);
-
-static int pci_dev_init(wb_gpio_data_t *wb_gpio_data, struct pci_dev *pci_dev)
-{
-    int err, i;
-    void __iomem *base;
-
-    C3000_GPIO_VERBOSE("Enter vendor 0x%x, device 0x%x.\n",
-        pci_dev->vendor, pci_dev->device);
-
-    C3000_GPIO_VERBOSE("start pci_enable_device!\n");
-    err = pci_enable_device(pci_dev);
-    if (err) {
-        dev_err(&pci_dev->dev, "Failed to enable pci device, ret:%d.\n", err);
-        return err;
-    }
-
-    err = pci_request_region(pci_dev, 0, "P2SB");
-    if (err) {
-        dev_err(&pci_dev->dev, "Requesting C3000 P2SB BAR0 region failed, ret: %d\n", err);
-        goto err_disable;
-    }
-
-    C3000_GPIO_VERBOSE("start pci_set_master!\n");
-    pci_set_master(pci_dev);
-
-    base = pci_iomap(pci_dev, wb_gpio_data->pci_bar, 0);
-    if (!base) {
-        dev_err(&pci_dev->dev, "pci_iomap bar: %d failed\n", wb_gpio_data->pci_bar);
-        err = -ENOMEM;
-        goto err_release;
-    }
-    wb_gpio_data->pci_mem_base = base;
-
-    for (i = 0; i < dnv_soc_data.ncommunities; i++) {
-        wb_gpio_data->res[i] = base + dnv_soc_data.communities[i].dw_base;
-    }
-    return 0;
-err_release:
-    pci_release_region(pci_dev, wb_gpio_data->pci_bar);
-err_disable:
-    pci_disable_device(pci_dev);
-    return err;
-}
-
-static void pci_dev_release(wb_gpio_data_t *wb_gpio_data)
-{
-    struct pci_dev *pci_dev;
-
-    pci_dev = wb_gpio_data->pci_dev;
-    if (wb_gpio_data->pci_mem_base) {
-        pci_iounmap(pci_dev, wb_gpio_data->pci_mem_base);
-    }
-    pci_release_region(pci_dev, wb_gpio_data->pci_bar);
-    pci_disable_device(pci_dev);
-    return;
-}
-
-static int wb_gpio_driver_probe(struct platform_device *plat_dev)
-{
-    int ret, devfn;
-    wb_gpio_data_t *wb_gpio_data;
-    wb_gpio_data_t *c3000_gpio_device;
-    struct pci_dev *pci_dev;
-
-    if (dnv_soc_data.ncommunities > GPIO_RES_MAX) {
-        dev_err(&plat_dev->dev, "GPIO ncommunities %lu is more than GPIO resource number: %d\n",
-            dnv_soc_data.ncommunities, GPIO_RES_MAX);
-        return -EINVAL;
-    }
-
-    wb_gpio_data = devm_kzalloc(&plat_dev->dev, sizeof(wb_gpio_data_t), GFP_KERNEL);
-    if (!wb_gpio_data) {
-        dev_err(&plat_dev->dev, "devm_kzalloc failed.\n");
-        ret = -ENOMEM;
-        return ret;
-    }
-
-    if (plat_dev->dev.of_node) {
-        ret = 0;
-        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_domain", &wb_gpio_data->pci_domain);
-        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_bus", &wb_gpio_data->pci_bus);
-        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_slot", &wb_gpio_data->pci_slot);
-        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_fn", &wb_gpio_data->pci_fn);
-        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_bar", &wb_gpio_data->pci_bar);
-        ret += of_property_read_u32(plat_dev->dev.of_node, "irq", &wb_gpio_data->irq);
-        if (ret != 0) {
-            dev_err(&plat_dev->dev, "Failed to get dts config, ret:%d.\n", ret);
-            return -ENXIO;
-        }
-    } else {
-        if (plat_dev->dev.platform_data == NULL) {
-            dev_err(&plat_dev->dev, "Failed to get platform data config.\n");
-            return -ENXIO;
-        }
-        c3000_gpio_device = plat_dev->dev.platform_data;
-        wb_gpio_data->pci_domain = c3000_gpio_device->pci_domain;
-        wb_gpio_data->pci_bus = c3000_gpio_device->pci_bus;
-        wb_gpio_data->pci_slot = c3000_gpio_device->pci_slot;
-        wb_gpio_data->pci_fn = c3000_gpio_device->pci_fn;
-        wb_gpio_data->pci_bar = c3000_gpio_device->pci_bar;
-        wb_gpio_data->irq = c3000_gpio_device->irq;
-    }
-
-    C3000_GPIO_VERBOSE("domain:0x%04x, bus:0x%02x, slot:0x%02x, fn:%u, bar:%u, irq: %d\n",
-        wb_gpio_data->pci_domain, wb_gpio_data->pci_bus, wb_gpio_data->pci_slot, wb_gpio_data->pci_fn,
-        wb_gpio_data->pci_bar, wb_gpio_data->irq);
-
-    devfn = PCI_DEVFN(wb_gpio_data->pci_slot, wb_gpio_data->pci_fn);
-    pci_dev = pci_get_domain_bus_and_slot(wb_gpio_data->pci_domain, wb_gpio_data->pci_bus, devfn);
-    if (pci_dev == NULL) {
-        dev_err(&plat_dev->dev, "Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
-            wb_gpio_data->pci_domain, wb_gpio_data->pci_bus, devfn);
-        return -ENXIO;
-    }
-    wb_gpio_data->pci_dev = pci_dev;
-    ret = pci_dev_init(wb_gpio_data, pci_dev);
-    if (ret != 0) {
-        dev_err(&plat_dev->dev, "Failed to get pci bar address.\n");
-        return ret;
-    }
-    C3000_GPIO_VERBOSE("pci_dev_init success, pci_mem_bae: 0x%pK, res0: 0x%pK, res1: 0x%pK\n",
-        wb_gpio_data->pci_mem_base, wb_gpio_data->res[0], wb_gpio_data->res[1]);
-
-    platform_set_drvdata(plat_dev, wb_gpio_data);
-
-    ret = wb_pinctrl_probe(plat_dev, &dnv_soc_data);
-    if (ret) {
-        dev_err(&plat_dev->dev, "C3000 gpio pinctrl probe failed, ret:%d\n", ret);
-        pci_dev_release(wb_gpio_data);
-        return ret;
-    }
-    dev_info(&plat_dev->dev, "C3000 gpio pinctrl probe success.\n");
-    return 0;
-}
-
-static int wb_gpio_driver_remove(struct platform_device *plat_dev)
-{
-    wb_gpio_data_t *wb_gpio_data;
-
-    C3000_GPIO_VERBOSE("c3000_gpio_pcie_remove.\n");
-
-    wb_gpio_data = platform_get_drvdata(plat_dev);
-    pci_dev_release(wb_gpio_data);
-    return 0;
-}
-
-static const struct of_device_id gpio_c3000_match[] = {
-	{
-		.compatible = "wb_gpio_c3000",
-	},
-	{},
-};
-MODULE_DEVICE_TABLE(of, gpio_c3000_match);
-
-static struct platform_driver wb_gpio_c3000_driver = {
-	.driver = {
-		.name		= "wb_gpio_c3000",
-		.of_match_table = gpio_c3000_match,
-	},
-	.probe = wb_gpio_driver_probe,
-	.remove = wb_gpio_driver_remove,
-};
-
-module_platform_driver(wb_gpio_c3000_driver);
-
-MODULE_DESCRIPTION("C3000 GPIO Controller driver");
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c
deleted file mode 100644
index ddfc5791b70..00000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * An wb_gpio_c3000_device driver for gpio c3000 device function
- *
- * Copyright (C) 2024 Micas Networks Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/device.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-
-#include "wb_pinctrl_intel.h"
-
-static int g_wb_c300_gpio_device_debug = 0;
-static int g_wb_c300_gpio_device_error = 0;
-
-module_param(g_wb_c300_gpio_device_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_wb_c300_gpio_device_error, int, S_IRUGO | S_IWUSR);
-
-#define WB_C3000_GPIO_DEVICE_DEBUG(fmt, args...) do {                                        \
-    if (g_wb_c300_gpio_device_debug) { \
-        printk(KERN_INFO "[WB_C3000_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define WB_C3000_GPIO_DEVICE_ERROR(fmt, args...) do {                                        \
-    if (g_wb_c300_gpio_device_error) { \
-        printk(KERN_ERR "[WB_C3000_GPIO_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-static wb_gpio_data_t c3000_gpio_device_data = {
-    .irq = 15,
-    .pci_domain = 0x0000,
-    .pci_bus = 0x00,
-    .pci_slot = 0x1f,
-    .pci_fn = 1,
-    .pci_bar = 0,
-};
-
-static void wb_c3000_gpio_device_release(struct device *dev)
-{
-    return;
-}
-
-static struct platform_device c3000_gpio_device = {
-    .name   = "wb_gpio_c3000",
-    .id = -1,
-    .dev    = {
-        .platform_data = &c3000_gpio_device_data,
-        .release = wb_c3000_gpio_device_release,
-    },
-};
-
-static int __init wb_c3000_gpio_device_init(void)
-{
-    WB_C3000_GPIO_DEVICE_DEBUG("wb_c3000_gpio_device_init enter!\n");
-    return platform_device_register(&c3000_gpio_device);
-
-}
-
-static void __exit wb_c3000_gpio_device_exit(void)
-{
-
-    WB_C3000_GPIO_DEVICE_DEBUG("wb_c3000_gpio_device_exit enter!\n");
-    platform_device_unregister(&c3000_gpio_device);
-    return;
-}
-
-module_init(wb_c3000_gpio_device_init);
-module_exit(wb_c3000_gpio_device_exit);
-MODULE_DESCRIPTION("C3000 GPIO Controller device");
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c
deleted file mode 100644
index 98d735ea6a1..00000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c
+++ /dev/null
@@ -1,1843 +0,0 @@
-/*
- * An wb_pinctrl_intel driver for pinctrl intel function
- *
- * Copyright (C) 2024 Micas Networks Inc.
- *
- * Based on pinctrl-intel.c
- * Copyright (C) 2015, Intel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/acpi.h>
-#include <linux/gpio/driver.h>
-#include <linux/interrupt.h>
-#include <linux/log2.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/property.h>
-#include <linux/time.h>
-
-#include <linux/pinctrl/pinctrl.h>
-#include <linux/pinctrl/pinmux.h>
-#include <linux/pinctrl/pinconf.h>
-#include <linux/pinctrl/pinconf-generic.h>
-
-#include "core.h"
-#include "wb_pinctrl_intel.h"
-
-/* Offset from regs */
-#define REVID				0x000
-#define REVID_SHIFT			16
-#define REVID_MASK			GENMASK(31, 16)
-
-#define PADBAR				0x00c
-
-#define PADOWN_BITS			4
-#define PADOWN_SHIFT(p)			((p) % 8 * PADOWN_BITS)
-#define PADOWN_MASK(p)			(GENMASK(3, 0) << PADOWN_SHIFT(p))
-#define PADOWN_GPP(p)			((p) / 8)
-
-/* Offset from pad_regs */
-#define PADCFG0				0x000
-#define PADCFG0_RXEVCFG_SHIFT		25
-#define PADCFG0_RXEVCFG_MASK		GENMASK(26, 25)
-#define PADCFG0_RXEVCFG_LEVEL		0
-#define PADCFG0_RXEVCFG_EDGE		1
-#define PADCFG0_RXEVCFG_DISABLED	2
-#define PADCFG0_RXEVCFG_EDGE_BOTH	3
-#define PADCFG0_PREGFRXSEL		BIT(24)
-#define PADCFG0_RXINV			BIT(23)
-#define PADCFG0_GPIROUTIOXAPIC		BIT(20)
-#define PADCFG0_GPIROUTSCI		BIT(19)
-#define PADCFG0_GPIROUTSMI		BIT(18)
-#define PADCFG0_GPIROUTNMI		BIT(17)
-#define PADCFG0_PMODE_SHIFT		10
-#define PADCFG0_PMODE_MASK		GENMASK(13, 10)
-#define PADCFG0_PMODE_GPIO		0
-#define PADCFG0_GPIORXDIS		BIT(9)
-#define PADCFG0_GPIOTXDIS		BIT(8)
-#define PADCFG0_GPIORXSTATE		BIT(1)
-#define PADCFG0_GPIOTXSTATE		BIT(0)
-
-#define PADCFG1				0x004
-#define PADCFG1_TERM_UP			BIT(13)
-#define PADCFG1_TERM_SHIFT		10
-#define PADCFG1_TERM_MASK		GENMASK(12, 10)
-#define PADCFG1_TERM_20K		BIT(2)
-#define PADCFG1_TERM_5K			BIT(1)
-#define PADCFG1_TERM_1K			BIT(0)
-#define PADCFG1_TERM_833		(BIT(1) | BIT(0))
-
-#define PADCFG2				0x008
-#define PADCFG2_DEBEN			BIT(0)
-#define PADCFG2_DEBOUNCE_SHIFT		1
-#define PADCFG2_DEBOUNCE_MASK		GENMASK(4, 1)
-
-#define DEBOUNCE_PERIOD_NSEC		31250
-
-struct intel_pad_context {
-	u32 padcfg0;
-	u32 padcfg1;
-	u32 padcfg2;
-};
-
-struct intel_community_context {
-	u32 *intmask;
-	u32 *hostown;
-};
-
-#define pin_to_padno(c, p)	((p) - (c)->pin_base)
-#define padgroup_offset(g, p)	((p) - (g)->base)
-
-static struct intel_community *intel_get_community(struct intel_pinctrl *pctrl,
-						   unsigned int pin)
-{
-	struct intel_community *community;
-	int i;
-
-	for (i = 0; i < pctrl->ncommunities; i++) {
-		community = &pctrl->communities[i];
-		if (pin >= community->pin_base &&
-		    pin < community->pin_base + community->npins)
-			return community;
-	}
-
-	dev_warn(pctrl->dev, "failed to find community for pin %u\n", pin);
-	return NULL;
-}
-
-static const struct intel_padgroup *
-intel_community_get_padgroup(const struct intel_community *community,
-			     unsigned int pin)
-{
-	int i;
-
-	for (i = 0; i < community->ngpps; i++) {
-		const struct intel_padgroup *padgrp = &community->gpps[i];
-
-		if (pin >= padgrp->base && pin < padgrp->base + padgrp->size)
-			return padgrp;
-	}
-
-	return NULL;
-}
-
-static void __iomem *intel_get_padcfg(struct intel_pinctrl *pctrl,
-				      unsigned int pin, unsigned int reg)
-{
-	const struct intel_community *community;
-	unsigned int padno;
-	size_t nregs;
-
-	community = intel_get_community(pctrl, pin);
-	if (!community)
-		return NULL;
-
-	padno = pin_to_padno(community, pin);
-	nregs = (community->features & PINCTRL_FEATURE_DEBOUNCE) ? 4 : 2;
-
-	if (reg >= nregs * 4)
-		return NULL;
-
-	return community->pad_regs + reg + padno * nregs * 4;
-}
-
-static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned int pin)
-{
-	const struct intel_community *community;
-	const struct intel_padgroup *padgrp;
-	unsigned int gpp, offset, gpp_offset;
-	void __iomem *padown;
-
-	community = intel_get_community(pctrl, pin);
-	if (!community)
-		return false;
-	if (!community->padown_offset)
-		return true;
-
-	padgrp = intel_community_get_padgroup(community, pin);
-	if (!padgrp)
-		return false;
-
-	gpp_offset = padgroup_offset(padgrp, pin);
-	gpp = PADOWN_GPP(gpp_offset);
-	offset = community->padown_offset + padgrp->padown_num * 4 + gpp * 4;
-	padown = community->regs + offset;
-
-	return !(readl(padown) & PADOWN_MASK(gpp_offset));
-}
-
-static bool intel_pad_set_acpi_mode(struct intel_pinctrl *pctrl,
-                unsigned pin, bool acpi_mode)
-{
-	const struct intel_community *community;
-	const struct intel_padgroup *padgrp;
-	unsigned int offset, gpp_offset;
-	void __iomem *hostown;
-	uint32_t value;
-
-	community = intel_get_community(pctrl, pin);
-	if (!community)
-		return true;
-	if (!community->hostown_offset)
-		return false;
-
-	padgrp = intel_community_get_padgroup(community, pin);
-	if (!padgrp)
-		return true;
-
-	gpp_offset = padgroup_offset(padgrp, pin);
-	offset = community->hostown_offset + padgrp->reg_num * 4;
-	hostown = community->regs + offset;
-
-	value = readl(hostown);
-	if (acpi_mode) {
-		/* ACPI mode */
-		value &= ~BIT(gpp_offset);
-	} else {
-		/* GPIO mode */
-		value |= BIT(gpp_offset);
-	}
-
-	writel(value, hostown);
-
-	return !(readl(hostown) & BIT(gpp_offset));
-}
-
-static bool intel_pad_acpi_mode(struct intel_pinctrl *pctrl, unsigned int pin)
-{
-	const struct intel_community *community;
-	const struct intel_padgroup *padgrp;
-	unsigned int offset, gpp_offset;
-	void __iomem *hostown;
-
-	community = intel_get_community(pctrl, pin);
-	if (!community)
-		return true;
-	if (!community->hostown_offset)
-		return false;
-
-	padgrp = intel_community_get_padgroup(community, pin);
-	if (!padgrp)
-		return true;
-
-	gpp_offset = padgroup_offset(padgrp, pin);
-	offset = community->hostown_offset + padgrp->reg_num * 4;
-	hostown = community->regs + offset;
-
-	return !(readl(hostown) & BIT(gpp_offset));
-}
-
-/**
- * enum - Locking variants of the pad configuration
- *
- * @PAD_UNLOCKED:	pad is fully controlled by the configuration registers
- * @PAD_LOCKED:		pad configuration registers, except TX state, are locked
- * @PAD_LOCKED_TX:	pad configuration TX state is locked
- * @PAD_LOCKED_FULL:	pad configuration registers are locked completely
- *
- * Locking is considered as read-only mode for corresponding registers and
- * their respective fields. That said, TX state bit is locked separately from
- * the main locking scheme.
- */
-enum {
-	PAD_UNLOCKED	= 0,
-	PAD_LOCKED	= 1,
-	PAD_LOCKED_TX	= 2,
-	PAD_LOCKED_FULL	= PAD_LOCKED | PAD_LOCKED_TX,
-};
-
-static int intel_pad_locked(struct intel_pinctrl *pctrl, unsigned int pin)
-{
-	struct intel_community *community;
-	const struct intel_padgroup *padgrp;
-	unsigned int offset, gpp_offset;
-	u32 value;
-	int ret = PAD_UNLOCKED;
-
-	community = intel_get_community(pctrl, pin);
-	if (!community)
-		return PAD_LOCKED_FULL;
-	if (!community->padcfglock_offset)
-		return PAD_UNLOCKED;
-
-	padgrp = intel_community_get_padgroup(community, pin);
-	if (!padgrp)
-		return PAD_LOCKED_FULL;
-
-	gpp_offset = padgroup_offset(padgrp, pin);
-
-	/*
-	 * If PADCFGLOCK and PADCFGLOCKTX bits are both clear for this pad,
-	 * the pad is considered unlocked. Any other case means that it is
-	 * either fully or partially locked.
-	 */
-	offset = community->padcfglock_offset + 0 + padgrp->reg_num * 8;
-	value = readl(community->regs + offset);
-	if (value & BIT(gpp_offset))
-		ret |= PAD_LOCKED;
-
-	offset = community->padcfglock_offset + 4 + padgrp->reg_num * 8;
-	value = readl(community->regs + offset);
-	if (value & BIT(gpp_offset))
-		ret |= PAD_LOCKED_TX;
-
-	return ret;
-}
-
-static bool intel_pad_is_unlocked(struct intel_pinctrl *pctrl, unsigned int pin)
-{
-	return (intel_pad_locked(pctrl, pin) & PAD_LOCKED) == PAD_UNLOCKED;
-}
-
-static bool intel_pad_usable(struct intel_pinctrl *pctrl, unsigned int pin)
-{
-	return intel_pad_owned_by_host(pctrl, pin) && intel_pad_is_unlocked(pctrl, pin);
-}
-
-static int intel_get_groups_count(struct pinctrl_dev *pctldev)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
-	return pctrl->soc->ngroups;
-}
-
-static const char *intel_get_group_name(struct pinctrl_dev *pctldev,
-				      unsigned int group)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
-	return pctrl->soc->groups[group].name;
-}
-
-static int intel_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group,
-			      const unsigned int **pins, unsigned int *npins)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
-	*pins = pctrl->soc->groups[group].pins;
-	*npins = pctrl->soc->groups[group].npins;
-	return 0;
-}
-
-static void intel_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
-			       unsigned int pin)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-	void __iomem *padcfg;
-	u32 cfg0, cfg1, mode;
-	int locked;
-	bool acpi;
-
-	if (!intel_pad_owned_by_host(pctrl, pin)) {
-		seq_puts(s, "not available");
-		return;
-	}
-
-	cfg0 = readl(intel_get_padcfg(pctrl, pin, PADCFG0));
-	cfg1 = readl(intel_get_padcfg(pctrl, pin, PADCFG1));
-
-	mode = (cfg0 & PADCFG0_PMODE_MASK) >> PADCFG0_PMODE_SHIFT;
-	if (mode == PADCFG0_PMODE_GPIO)
-		seq_puts(s, "GPIO ");
-	else
-		seq_printf(s, "mode %d ", mode);
-
-	seq_printf(s, "0x%08x 0x%08x", cfg0, cfg1);
-
-	/* Dump the additional PADCFG registers if available */
-	padcfg = intel_get_padcfg(pctrl, pin, PADCFG2);
-	if (padcfg)
-		seq_printf(s, " 0x%08x", readl(padcfg));
-
-	locked = intel_pad_locked(pctrl, pin);
-	acpi = intel_pad_acpi_mode(pctrl, pin);
-
-	if (locked || acpi) {
-		seq_puts(s, " [");
-		if (locked)
-			seq_puts(s, "LOCKED");
-		if ((locked & PAD_LOCKED_FULL) == PAD_LOCKED_TX)
-			seq_puts(s, " tx");
-		else if ((locked & PAD_LOCKED_FULL) == PAD_LOCKED_FULL)
-			seq_puts(s, " full");
-
-		if (locked && acpi)
-			seq_puts(s, ", ");
-
-		if (acpi)
-			seq_puts(s, "ACPI");
-		seq_puts(s, "]");
-	}
-}
-
-static const struct pinctrl_ops intel_pinctrl_ops = {
-	.get_groups_count = intel_get_groups_count,
-	.get_group_name = intel_get_group_name,
-	.get_group_pins = intel_get_group_pins,
-	.pin_dbg_show = intel_pin_dbg_show,
-};
-
-static int intel_get_functions_count(struct pinctrl_dev *pctldev)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
-	return pctrl->soc->nfunctions;
-}
-
-static const char *intel_get_function_name(struct pinctrl_dev *pctldev,
-					   unsigned int function)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
-	return pctrl->soc->functions[function].name;
-}
-
-static int intel_get_function_groups(struct pinctrl_dev *pctldev,
-				     unsigned int function,
-				     const char * const **groups,
-				     unsigned int * const ngroups)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-
-	*groups = pctrl->soc->functions[function].groups;
-	*ngroups = pctrl->soc->functions[function].ngroups;
-	return 0;
-}
-
-static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev,
-				unsigned int function, unsigned int group)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-	const struct intel_pingroup *grp = &pctrl->soc->groups[group];
-	unsigned long flags;
-	int i;
-
-	raw_spin_lock_irqsave(&pctrl->lock, flags);
-
-	/*
-	 * All pins in the groups needs to be accessible and writable
-	 * before we can enable the mux for this group.
-	 */
-	for (i = 0; i < grp->npins; i++) {
-		if (!intel_pad_usable(pctrl, grp->pins[i])) {
-			raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-			return -EBUSY;
-		}
-	}
-
-	/* Now enable the mux setting for each pin in the group */
-	for (i = 0; i < grp->npins; i++) {
-		void __iomem *padcfg0;
-		u32 value;
-
-		padcfg0 = intel_get_padcfg(pctrl, grp->pins[i], PADCFG0);
-		value = readl(padcfg0);
-
-		value &= ~PADCFG0_PMODE_MASK;
-
-		if (grp->modes)
-			value |= grp->modes[i] << PADCFG0_PMODE_SHIFT;
-		else
-			value |= grp->mode << PADCFG0_PMODE_SHIFT;
-
-		writel(value, padcfg0);
-	}
-
-	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-
-	return 0;
-}
-
-static void __intel_gpio_set_direction(void __iomem *padcfg0, bool input)
-{
-	u32 value;
-
-	value = readl(padcfg0);
-	if (input) {
-		value &= ~PADCFG0_GPIORXDIS;
-		value |= PADCFG0_GPIOTXDIS;
-	} else {
-		value &= ~PADCFG0_GPIOTXDIS;
-		value |= PADCFG0_GPIORXDIS;
-	}
-	writel(value, padcfg0);
-}
-
-static int intel_gpio_get_gpio_mode(void __iomem *padcfg0)
-{
-	return (readl(padcfg0) & PADCFG0_PMODE_MASK) >> PADCFG0_PMODE_SHIFT;
-}
-
-static void intel_gpio_set_gpio_mode(void __iomem *padcfg0)
-{
-	u32 value;
-
-	value = readl(padcfg0);
-
-	/* Put the pad into GPIO mode */
-	value &= ~PADCFG0_PMODE_MASK;
-	value |= PADCFG0_PMODE_GPIO;
-
-	/* Disable input and output buffers */
-	value |= PADCFG0_GPIORXDIS;
-	value |= PADCFG0_GPIOTXDIS;
-
-	/* Disable SCI/SMI/NMI generation */
-	value &= ~(PADCFG0_GPIROUTIOXAPIC | PADCFG0_GPIROUTSCI);
-	value &= ~(PADCFG0_GPIROUTSMI | PADCFG0_GPIROUTNMI);
-
-	writel(value, padcfg0);
-}
-
-static int intel_gpio_request_enable(struct pinctrl_dev *pctldev,
-				     struct pinctrl_gpio_range *range,
-				     unsigned int pin)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-	void __iomem *padcfg0;
-	unsigned long flags;
-
-	padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
-
-	raw_spin_lock_irqsave(&pctrl->lock, flags);
-
-	if (!intel_pad_owned_by_host(pctrl, pin)) {
-		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-		return -EBUSY;
-	}
-
-	if (!intel_pad_is_unlocked(pctrl, pin)) {
-		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-		return 0;
-	}
-
-	/*
-	 * If pin is already configured in GPIO mode, we assume that
-	 * firmware provides correct settings. In such case we avoid
-	 * potential glitches on the pin. Otherwise, for the pin in
-	 * alternative mode, consumer has to supply respective flags.
-	 */
-	if (intel_gpio_get_gpio_mode(padcfg0) == PADCFG0_PMODE_GPIO) {
-		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-		return 0;
-	}
-
-	intel_gpio_set_gpio_mode(padcfg0);
-
-	/* Disable TX buffer and enable RX (this will be input) */
-	__intel_gpio_set_direction(padcfg0, true);
-
-	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-
-	return 0;
-}
-
-static int intel_gpio_set_direction(struct pinctrl_dev *pctldev,
-				    struct pinctrl_gpio_range *range,
-				    unsigned int pin, bool input)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-	void __iomem *padcfg0;
-	unsigned long flags;
-
-	padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
-
-	raw_spin_lock_irqsave(&pctrl->lock, flags);
-	__intel_gpio_set_direction(padcfg0, input);
-	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-
-	return 0;
-}
-
-static const struct pinmux_ops intel_pinmux_ops = {
-	.get_functions_count = intel_get_functions_count,
-	.get_function_name = intel_get_function_name,
-	.get_function_groups = intel_get_function_groups,
-	.set_mux = intel_pinmux_set_mux,
-	.gpio_request_enable = intel_gpio_request_enable,
-	.gpio_set_direction = intel_gpio_set_direction,
-};
-
-static int intel_config_get_pull(struct intel_pinctrl *pctrl, unsigned int pin,
-				 enum pin_config_param param, u32 *arg)
-{
-	const struct intel_community *community;
-	void __iomem *padcfg1;
-	unsigned long flags;
-	u32 value, term;
-
-	community = intel_get_community(pctrl, pin);
-	padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
-
-	raw_spin_lock_irqsave(&pctrl->lock, flags);
-	value = readl(padcfg1);
-	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-
-	term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT;
-
-	switch (param) {
-	case PIN_CONFIG_BIAS_DISABLE:
-		if (term)
-			return -EINVAL;
-		break;
-
-	case PIN_CONFIG_BIAS_PULL_UP:
-		if (!term || !(value & PADCFG1_TERM_UP))
-			return -EINVAL;
-
-		switch (term) {
-		case PADCFG1_TERM_833:
-			*arg = 833;
-			break;
-		case PADCFG1_TERM_1K:
-			*arg = 1000;
-			break;
-		case PADCFG1_TERM_5K:
-			*arg = 5000;
-			break;
-		case PADCFG1_TERM_20K:
-			*arg = 20000;
-			break;
-		}
-
-		break;
-
-	case PIN_CONFIG_BIAS_PULL_DOWN:
-		if (!term || value & PADCFG1_TERM_UP)
-			return -EINVAL;
-
-		switch (term) {
-		case PADCFG1_TERM_833:
-			if (!(community->features & PINCTRL_FEATURE_1K_PD))
-				return -EINVAL;
-			*arg = 833;
-			break;
-		case PADCFG1_TERM_1K:
-			if (!(community->features & PINCTRL_FEATURE_1K_PD))
-				return -EINVAL;
-			*arg = 1000;
-			break;
-		case PADCFG1_TERM_5K:
-			*arg = 5000;
-			break;
-		case PADCFG1_TERM_20K:
-			*arg = 20000;
-			break;
-		}
-
-		break;
-
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int intel_config_get_debounce(struct intel_pinctrl *pctrl, unsigned int pin,
-				     enum pin_config_param param, u32 *arg)
-{
-	void __iomem *padcfg2;
-	unsigned long flags;
-	unsigned long v;
-	u32 value2;
-
-	padcfg2 = intel_get_padcfg(pctrl, pin, PADCFG2);
-	if (!padcfg2)
-		return -ENOTSUPP;
-
-	raw_spin_lock_irqsave(&pctrl->lock, flags);
-	value2 = readl(padcfg2);
-	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-	if (!(value2 & PADCFG2_DEBEN))
-		return -EINVAL;
-
-	v = (value2 & PADCFG2_DEBOUNCE_MASK) >> PADCFG2_DEBOUNCE_SHIFT;
-	*arg = BIT(v) * DEBOUNCE_PERIOD_NSEC / NSEC_PER_USEC;
-
-	return 0;
-}
-
-static int intel_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
-			    unsigned long *config)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-	enum pin_config_param param = pinconf_to_config_param(*config);
-	u32 arg = 0;
-	int ret;
-
-	if (!intel_pad_owned_by_host(pctrl, pin))
-		return -ENOTSUPP;
-
-	switch (param) {
-	case PIN_CONFIG_BIAS_DISABLE:
-	case PIN_CONFIG_BIAS_PULL_UP:
-	case PIN_CONFIG_BIAS_PULL_DOWN:
-		ret = intel_config_get_pull(pctrl, pin, param, &arg);
-		if (ret)
-			return ret;
-		break;
-
-	case PIN_CONFIG_INPUT_DEBOUNCE:
-		ret = intel_config_get_debounce(pctrl, pin, param, &arg);
-		if (ret)
-			return ret;
-		break;
-
-	default:
-		return -ENOTSUPP;
-	}
-
-	*config = pinconf_to_config_packed(param, arg);
-	return 0;
-}
-
-static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
-				 unsigned long config)
-{
-	unsigned int param = pinconf_to_config_param(config);
-	unsigned int arg = pinconf_to_config_argument(config);
-	const struct intel_community *community;
-	void __iomem *padcfg1;
-	unsigned long flags;
-	int ret = 0;
-	u32 value;
-
-	community = intel_get_community(pctrl, pin);
-	padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
-
-	raw_spin_lock_irqsave(&pctrl->lock, flags);
-
-	value = readl(padcfg1);
-
-	switch (param) {
-	case PIN_CONFIG_BIAS_DISABLE:
-		value &= ~(PADCFG1_TERM_MASK | PADCFG1_TERM_UP);
-		break;
-
-	case PIN_CONFIG_BIAS_PULL_UP:
-		value &= ~PADCFG1_TERM_MASK;
-
-		value |= PADCFG1_TERM_UP;
-
-		/* Set default strength value in case none is given */
-		if (arg == 1)
-			arg = 5000;
-
-		switch (arg) {
-		case 20000:
-			value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT;
-			break;
-		case 5000:
-			value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
-			break;
-		case 1000:
-			value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;
-			break;
-		case 833:
-			value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT;
-			break;
-		default:
-			ret = -EINVAL;
-		}
-
-		break;
-
-	case PIN_CONFIG_BIAS_PULL_DOWN:
-		value &= ~(PADCFG1_TERM_UP | PADCFG1_TERM_MASK);
-
-		/* Set default strength value in case none is given */
-		if (arg == 1)
-			arg = 5000;
-
-		switch (arg) {
-		case 20000:
-			value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT;
-			break;
-		case 5000:
-			value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
-			break;
-		case 1000:
-			if (!(community->features & PINCTRL_FEATURE_1K_PD)) {
-				ret = -EINVAL;
-				break;
-			}
-			value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;
-			break;
-		case 833:
-			if (!(community->features & PINCTRL_FEATURE_1K_PD)) {
-				ret = -EINVAL;
-				break;
-			}
-			value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT;
-			break;
-		default:
-			ret = -EINVAL;
-		}
-
-		break;
-	}
-
-	if (!ret)
-		writel(value, padcfg1);
-
-	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-
-	return ret;
-}
-
-static int intel_config_set_debounce(struct intel_pinctrl *pctrl,
-				     unsigned int pin, unsigned int debounce)
-{
-	void __iomem *padcfg0, *padcfg2;
-	unsigned long flags;
-	u32 value0, value2;
-
-	padcfg2 = intel_get_padcfg(pctrl, pin, PADCFG2);
-	if (!padcfg2)
-		return -ENOTSUPP;
-
-	padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
-
-	raw_spin_lock_irqsave(&pctrl->lock, flags);
-
-	value0 = readl(padcfg0);
-	value2 = readl(padcfg2);
-
-	/* Disable glitch filter and debouncer */
-	value0 &= ~PADCFG0_PREGFRXSEL;
-	value2 &= ~(PADCFG2_DEBEN | PADCFG2_DEBOUNCE_MASK);
-
-	if (debounce) {
-		unsigned long v;
-
-		v = order_base_2(debounce * NSEC_PER_USEC / DEBOUNCE_PERIOD_NSEC);
-		if (v < 3 || v > 15) {
-			raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-			return -EINVAL;
-		}
-
-		/* Enable glitch filter and debouncer */
-		value0 |= PADCFG0_PREGFRXSEL;
-		value2 |= v << PADCFG2_DEBOUNCE_SHIFT;
-		value2 |= PADCFG2_DEBEN;
-	}
-
-	writel(value0, padcfg0);
-	writel(value2, padcfg2);
-
-	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-
-	return 0;
-}
-
-static int intel_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
-			  unsigned long *configs, unsigned int nconfigs)
-{
-	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
-	int i, ret;
-
-	if (!intel_pad_usable(pctrl, pin))
-		return -ENOTSUPP;
-
-	for (i = 0; i < nconfigs; i++) {
-		switch (pinconf_to_config_param(configs[i])) {
-		case PIN_CONFIG_BIAS_DISABLE:
-		case PIN_CONFIG_BIAS_PULL_UP:
-		case PIN_CONFIG_BIAS_PULL_DOWN:
-			ret = intel_config_set_pull(pctrl, pin, configs[i]);
-			if (ret)
-				return ret;
-			break;
-
-		case PIN_CONFIG_INPUT_DEBOUNCE:
-			ret = intel_config_set_debounce(pctrl, pin,
-				pinconf_to_config_argument(configs[i]));
-			if (ret)
-				return ret;
-			break;
-
-		default:
-			return -ENOTSUPP;
-		}
-	}
-
-	return 0;
-}
-
-static const struct pinconf_ops intel_pinconf_ops = {
-	.is_generic = true,
-	.pin_config_get = intel_config_get,
-	.pin_config_set = intel_config_set,
-};
-
-static const struct pinctrl_desc intel_pinctrl_desc = {
-	.pctlops = &intel_pinctrl_ops,
-	.pmxops = &intel_pinmux_ops,
-	.confops = &intel_pinconf_ops,
-	.owner = THIS_MODULE,
-};
-
-/**
- * intel_gpio_to_pin() - Translate from GPIO offset to pin number
- * @pctrl: Pinctrl structure
- * @offset: GPIO offset from gpiolib
- * @community: Community is filled here if not %NULL
- * @padgrp: Pad group is filled here if not %NULL
- *
- * When coming through gpiolib irqchip, the GPIO offset is not
- * automatically translated to pinctrl pin number. This function can be
- * used to find out the corresponding pinctrl pin.
- */
-static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned int offset,
-			     const struct intel_community **community,
-			     const struct intel_padgroup **padgrp)
-{
-	int i;
-
-	for (i = 0; i < pctrl->ncommunities; i++) {
-		const struct intel_community *comm = &pctrl->communities[i];
-		int j;
-
-		for (j = 0; j < comm->ngpps; j++) {
-			const struct intel_padgroup *pgrp = &comm->gpps[j];
-
-			if (pgrp->gpio_base == INTEL_GPIO_BASE_NOMAP)
-				continue;
-
-			if (offset >= pgrp->gpio_base &&
-			    offset < pgrp->gpio_base + pgrp->size) {
-				int pin;
-
-				pin = pgrp->base + offset - pgrp->gpio_base;
-				if (community)
-					*community = comm;
-				if (padgrp)
-					*padgrp = pgrp;
-
-				return pin;
-			}
-		}
-	}
-
-	return -EINVAL;
-}
-
-/**
- * intel_pin_to_gpio() - Translate from pin number to GPIO offset
- * @pctrl: Pinctrl structure
- * @pin: pin number
- *
- * Translate the pin number of pinctrl to GPIO offset
- */
-static __maybe_unused int intel_pin_to_gpio(struct intel_pinctrl *pctrl, int pin)
-{
-	const struct intel_community *community;
-	const struct intel_padgroup *padgrp;
-
-	community = intel_get_community(pctrl, pin);
-	if (!community)
-		return -EINVAL;
-
-	padgrp = intel_community_get_padgroup(community, pin);
-	if (!padgrp)
-		return -EINVAL;
-
-	return pin - padgrp->base + padgrp->gpio_base;
-}
-
-static int intel_gpio_get(struct gpio_chip *chip, unsigned int offset)
-{
-	struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
-	void __iomem *reg;
-	u32 padcfg0;
-	int pin;
-
-	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
-	if (pin < 0)
-		return -EINVAL;
-
-	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
-	if (!reg)
-		return -EINVAL;
-
-	padcfg0 = readl(reg);
-	if (!(padcfg0 & PADCFG0_GPIOTXDIS))
-		return !!(padcfg0 & PADCFG0_GPIOTXSTATE);
-
-	return !!(padcfg0 & PADCFG0_GPIORXSTATE);
-}
-
-static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset,
-			   int value)
-{
-	struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
-	unsigned long flags;
-	void __iomem *reg;
-	u32 padcfg0;
-	int pin;
-
-	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
-	if (pin < 0)
-		return;
-
-	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
-	if (!reg)
-		return;
-
-	raw_spin_lock_irqsave(&pctrl->lock, flags);
-	padcfg0 = readl(reg);
-	if (value)
-		padcfg0 |= PADCFG0_GPIOTXSTATE;
-	else
-		padcfg0 &= ~PADCFG0_GPIOTXSTATE;
-	writel(padcfg0, reg);
-	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-}
-
-static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
-{
-	struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
-	unsigned long flags;
-	void __iomem *reg;
-	u32 padcfg0;
-	int pin;
-
-	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
-	if (pin < 0)
-		return -EINVAL;
-
-	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
-	if (!reg)
-		return -EINVAL;
-
-	raw_spin_lock_irqsave(&pctrl->lock, flags);
-	padcfg0 = readl(reg);
-	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-	if (padcfg0 & PADCFG0_PMODE_MASK)
-		return -EINVAL;
-
-	if (padcfg0 & PADCFG0_GPIOTXDIS)
-		return GPIO_LINE_DIRECTION_IN;
-
-	return GPIO_LINE_DIRECTION_OUT;
-}
-
-static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
-{
-	return pinctrl_gpio_direction_input(chip->base + offset);
-}
-
-static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned int offset,
-				       int value)
-{
-	intel_gpio_set(chip, offset, value);
-	return pinctrl_gpio_direction_output(chip->base + offset);
-}
-
-static const struct gpio_chip intel_gpio_chip = {
-	.owner = THIS_MODULE,
-	.request = gpiochip_generic_request,
-	.free = gpiochip_generic_free,
-	.get_direction = intel_gpio_get_direction,
-	.direction_input = intel_gpio_direction_input,
-	.direction_output = intel_gpio_direction_output,
-	.get = intel_gpio_get,
-	.set = intel_gpio_set,
-	.set_config = gpiochip_generic_config,
-};
-
-static void intel_gpio_irq_ack(struct irq_data *d)
-{
-	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
-	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
-	const struct intel_community *community;
-	const struct intel_padgroup *padgrp;
-	int pin;
-
-	pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), &community, &padgrp);
-	if (pin >= 0) {
-		unsigned int gpp, gpp_offset, is_offset;
-
-		gpp = padgrp->reg_num;
-		gpp_offset = padgroup_offset(padgrp, pin);
-		is_offset = community->is_offset + gpp * 4;
-
-		raw_spin_lock(&pctrl->lock);
-		writel(BIT(gpp_offset), community->regs + is_offset);
-		raw_spin_unlock(&pctrl->lock);
-	}
-}
-
-static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask)
-{
-	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
-	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
-	const struct intel_community *community;
-	const struct intel_padgroup *padgrp;
-	int pin;
-
-	pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), &community, &padgrp);
-	if (pin >= 0) {
-		unsigned int gpp, gpp_offset;
-		unsigned long flags;
-		void __iomem *reg, *is;
-		u32 value;
-
-		gpp = padgrp->reg_num;
-		gpp_offset = padgroup_offset(padgrp, pin);
-
-		reg = community->regs + community->ie_offset + gpp * 4;
-		is = community->regs + community->is_offset + gpp * 4;
-
-		raw_spin_lock_irqsave(&pctrl->lock, flags);
-
-		/* Clear interrupt status first to avoid unexpected interrupt */
-		writel(BIT(gpp_offset), is);
-
-		value = readl(reg);
-		if (mask)
-			value &= ~BIT(gpp_offset);
-		else
-			value |= BIT(gpp_offset);
-		writel(value, reg);
-		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-	}
-}
-
-static void intel_gpio_irq_mask(struct irq_data *d)
-{
-	intel_gpio_irq_mask_unmask(d, true);
-}
-
-static void intel_gpio_irq_unmask(struct irq_data *d)
-{
-	intel_gpio_irq_mask_unmask(d, false);
-}
-
-static int intel_gpio_irq_type(struct irq_data *d, unsigned int type)
-{
-	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
-	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
-	unsigned int pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
-	unsigned long flags;
-	void __iomem *reg;
-	u32 value;
-
-	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
-	if (!reg)
-		return -EINVAL;
-
-	/* set not ACPI mode */
-	intel_pad_set_acpi_mode(pctrl, pin, false);
-
-	/*
-	 * If the pin is in ACPI mode it is still usable as a GPIO but it
-	 * cannot be used as IRQ because GPI_IS status bit will not be
-	 * updated by the host controller hardware.
-	 */
-	if (intel_pad_acpi_mode(pctrl, pin)) {
-		dev_warn(pctrl->dev, "pin %u cannot be used as IRQ\n", pin);
-		return -EPERM;
-	}
-
-	raw_spin_lock_irqsave(&pctrl->lock, flags);
-
-	intel_gpio_set_gpio_mode(reg);
-
-	/* Disable TX buffer and enable RX (this will be input) */
-	__intel_gpio_set_direction(reg, true);
-
-	value = readl(reg);
-
-	value &= ~(PADCFG0_RXEVCFG_MASK | PADCFG0_RXINV);
-
-	if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
-		value |= PADCFG0_RXEVCFG_EDGE_BOTH << PADCFG0_RXEVCFG_SHIFT;
-	} else if (type & IRQ_TYPE_EDGE_FALLING) {
-		value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT;
-		value |= PADCFG0_RXINV;
-	} else if (type & IRQ_TYPE_EDGE_RISING) {
-		value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT;
-	} else if (type & IRQ_TYPE_LEVEL_MASK) {
-		if (type & IRQ_TYPE_LEVEL_LOW)
-			value |= PADCFG0_RXINV;
-	} else {
-		value |= PADCFG0_RXEVCFG_DISABLED << PADCFG0_RXEVCFG_SHIFT;
-	}
-
-	writel(value, reg);
-
-	if (type & IRQ_TYPE_EDGE_BOTH)
-		irq_set_handler_locked(d, handle_edge_irq);
-	else if (type & IRQ_TYPE_LEVEL_MASK)
-		irq_set_handler_locked(d, handle_level_irq);
-
-	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-
-	return 0;
-}
-
-static int intel_gpio_irq_wake(struct irq_data *d, unsigned int on)
-{
-	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
-	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
-	unsigned int pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
-
-	if (on)
-		enable_irq_wake(pctrl->irq);
-	else
-		disable_irq_wake(pctrl->irq);
-
-	dev_dbg(pctrl->dev, "%sable wake for pin %u\n", on ? "en" : "dis", pin);
-	return 0;
-}
-
-static int intel_gpio_community_irq_handler(struct intel_pinctrl *pctrl,
-					    const struct intel_community *community)
-{
-	struct gpio_chip *gc = &pctrl->chip;
-	unsigned int gpp;
-	int ret = 0;
-
-	for (gpp = 0; gpp < community->ngpps; gpp++) {
-		const struct intel_padgroup *padgrp = &community->gpps[gpp];
-		unsigned long pending, enabled, gpp_offset;
-		unsigned long flags;
-
-		raw_spin_lock_irqsave(&pctrl->lock, flags);
-
-		pending = readl(community->regs + community->is_offset +
-				padgrp->reg_num * 4);
-		enabled = readl(community->regs + community->ie_offset +
-				padgrp->reg_num * 4);
-
-		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
-
-		/* Only interrupts that are enabled */
-		pending &= enabled;
-
-		for_each_set_bit(gpp_offset, &pending, padgrp->size) {
-			unsigned int irq;
-
-			irq = irq_find_mapping(gc->irq.domain,
-					       padgrp->gpio_base + gpp_offset);
-			generic_handle_irq(irq);
-		}
-
-		ret += pending ? 1 : 0;
-	}
-
-	return ret;
-}
-
-static irqreturn_t intel_gpio_irq(int irq, void *data)
-{
-	const struct intel_community *community;
-	struct intel_pinctrl *pctrl = data;
-	unsigned int i;
-	int ret = 0;
-
-	/* Need to check all communities for pending interrupts */
-	for (i = 0; i < pctrl->ncommunities; i++) {
-		community = &pctrl->communities[i];
-		ret += intel_gpio_community_irq_handler(pctrl, community);
-	}
-
-	return IRQ_RETVAL(ret);
-}
-
-static int intel_gpio_add_community_ranges(struct intel_pinctrl *pctrl,
-				const struct intel_community *community)
-{
-	int ret = 0, i;
-
-	for (i = 0; i < community->ngpps; i++) {
-		const struct intel_padgroup *gpp = &community->gpps[i];
-
-		if (gpp->gpio_base == INTEL_GPIO_BASE_NOMAP)
-			continue;
-
-		ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev),
-					     gpp->gpio_base, gpp->base,
-					     gpp->size);
-		if (ret)
-			return ret;
-	}
-
-	return ret;
-}
-
-static int intel_gpio_add_pin_ranges(struct gpio_chip *gc)
-{
-	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
-	int ret, i;
-
-	for (i = 0; i < pctrl->ncommunities; i++) {
-		struct intel_community *community = &pctrl->communities[i];
-
-		ret = intel_gpio_add_community_ranges(pctrl, community);
-		if (ret) {
-			dev_err(pctrl->dev, "failed to add GPIO pin range\n");
-			return ret;
-		}
-	}
-
-	return 0;
-}
-
-static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
-{
-	const struct intel_community *community;
-	unsigned int ngpio = 0;
-	int i, j;
-
-	for (i = 0; i < pctrl->ncommunities; i++) {
-		community = &pctrl->communities[i];
-		for (j = 0; j < community->ngpps; j++) {
-			const struct intel_padgroup *gpp = &community->gpps[j];
-
-			if (gpp->gpio_base == INTEL_GPIO_BASE_NOMAP)
-				continue;
-
-			if (gpp->gpio_base + gpp->size > ngpio)
-				ngpio = gpp->gpio_base + gpp->size;
-		}
-	}
-
-	return ngpio;
-}
-
-static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
-{
-	int ret;
-	struct gpio_irq_chip *girq;
-
-	pctrl->chip = intel_gpio_chip;
-
-	/* Setup GPIO chip */
-	pctrl->chip.ngpio = intel_gpio_ngpio(pctrl);
-	pctrl->chip.label = dev_name(pctrl->dev);
-	pctrl->chip.parent = pctrl->dev;
-	pctrl->chip.base = 0;
-	pctrl->chip.add_pin_ranges = intel_gpio_add_pin_ranges;
-	pctrl->irq = irq;
-
-	/* Setup IRQ chip */
-	pctrl->irqchip.name = dev_name(pctrl->dev);
-	pctrl->irqchip.irq_ack = intel_gpio_irq_ack;
-	pctrl->irqchip.irq_mask = intel_gpio_irq_mask;
-	pctrl->irqchip.irq_unmask = intel_gpio_irq_unmask;
-	pctrl->irqchip.irq_set_type = intel_gpio_irq_type;
-	pctrl->irqchip.irq_set_wake = intel_gpio_irq_wake;
-	pctrl->irqchip.flags = IRQCHIP_MASK_ON_SUSPEND;
-
-	/*
-	 * On some platforms several GPIO controllers share the same interrupt
-	 * line.
-	 */
-	ret = devm_request_irq(pctrl->dev, irq, intel_gpio_irq,
-			       IRQF_SHARED | IRQF_NO_THREAD,
-			       dev_name(pctrl->dev), pctrl);
-	if (ret) {
-		dev_err(pctrl->dev, "failed to request interrupt\n");
-		return ret;
-	}
-
-	girq = &pctrl->chip.irq;
-	girq->chip = &pctrl->irqchip;
-	/* This will let us handle the IRQ in the driver */
-	girq->parent_handler = NULL;
-	girq->num_parents = 0;
-	girq->default_type = IRQ_TYPE_NONE;
-	girq->handler = handle_bad_irq;
-
-	ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
-	if (ret) {
-		dev_err(pctrl->dev, "failed to register gpiochip\n");
-		return ret;
-	}
-
-	return 0;
-}
-
-static int intel_pinctrl_add_padgroups(struct intel_pinctrl *pctrl,
-				       struct intel_community *community)
-{
-	struct intel_padgroup *gpps;
-	unsigned int npins = community->npins;
-	unsigned int padown_num = 0;
-	size_t ngpps, i;
-
-	if (community->gpps)
-		ngpps = community->ngpps;
-	else
-		ngpps = DIV_ROUND_UP(community->npins, community->gpp_size);
-
-	gpps = devm_kcalloc(pctrl->dev, ngpps, sizeof(*gpps), GFP_KERNEL);
-	if (!gpps)
-		return -ENOMEM;
-
-	for (i = 0; i < ngpps; i++) {
-		if (community->gpps) {
-			gpps[i] = community->gpps[i];
-		} else {
-			unsigned int gpp_size = community->gpp_size;
-
-			gpps[i].reg_num = i;
-			gpps[i].base = community->pin_base + i * gpp_size;
-			gpps[i].size = min(gpp_size, npins);
-			npins -= gpps[i].size;
-		}
-
-		if (gpps[i].size > 32)
-			return -EINVAL;
-
-		/* Special treatment for GPIO base */
-		switch (gpps[i].gpio_base) {
-			case INTEL_GPIO_BASE_MATCH:
-				gpps[i].gpio_base = gpps[i].base;
-				break;
-			case INTEL_GPIO_BASE_ZERO:
-				gpps[i].gpio_base = 0;
-				break;
-			case INTEL_GPIO_BASE_NOMAP:
-			default:
-				break;
-		}
-
-		gpps[i].padown_num = padown_num;
-
-		/*
-		 * In older hardware the number of padown registers per
-		 * group is fixed regardless of the group size.
-		 */
-		if (community->gpp_num_padown_regs)
-			padown_num += community->gpp_num_padown_regs;
-		else
-			padown_num += DIV_ROUND_UP(gpps[i].size * 4, 32);
-	}
-
-	community->ngpps = ngpps;
-	community->gpps = gpps;
-
-	return 0;
-}
-
-static int intel_pinctrl_pm_init(struct intel_pinctrl *pctrl)
-{
-#ifdef CONFIG_PM_SLEEP
-	const struct intel_pinctrl_soc_data *soc = pctrl->soc;
-	struct intel_community_context *communities;
-	struct intel_pad_context *pads;
-	int i;
-
-	pads = devm_kcalloc(pctrl->dev, soc->npins, sizeof(*pads), GFP_KERNEL);
-	if (!pads)
-		return -ENOMEM;
-
-	communities = devm_kcalloc(pctrl->dev, pctrl->ncommunities,
-				   sizeof(*communities), GFP_KERNEL);
-	if (!communities)
-		return -ENOMEM;
-
-	for (i = 0; i < pctrl->ncommunities; i++) {
-		struct intel_community *community = &pctrl->communities[i];
-		u32 *intmask, *hostown;
-
-		intmask = devm_kcalloc(pctrl->dev, community->ngpps,
-				       sizeof(*intmask), GFP_KERNEL);
-		if (!intmask)
-			return -ENOMEM;
-
-		communities[i].intmask = intmask;
-
-		hostown = devm_kcalloc(pctrl->dev, community->ngpps,
-				       sizeof(*hostown), GFP_KERNEL);
-		if (!hostown)
-			return -ENOMEM;
-
-		communities[i].hostown = hostown;
-	}
-
-	pctrl->context.pads = pads;
-	pctrl->context.communities = communities;
-#endif
-
-	return 0;
-}
-
-int wb_pinctrl_probe(struct platform_device *pdev,
-			       const struct intel_pinctrl_soc_data *soc_data)
-{
-	struct intel_pinctrl *pctrl;
-	struct intel_community *community;
-    wb_gpio_data_t *wb_gpio_data;
-	void __iomem *regs;
-	int i, ret;
-	u32 padbar, rev;
-
-	if (!soc_data) {
-		dev_err(&pdev->dev, "soc_data is null\n");
-		return -EINVAL;
-	}
-
-    wb_gpio_data = platform_get_drvdata(pdev);
-	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
-	if (!pctrl) {
-        dev_err(&pdev->dev, "pctrl kzalloc failed\n");
-        return -ENOMEM;
-    }
-
-	/* check resource */
-	if (soc_data->ncommunities > GPIO_RES_MAX) {
-		dev_err(&pdev->dev, "GPIO ncommunities %lu is more than GPIO resource number: %d\n",
-            soc_data->ncommunities, GPIO_RES_MAX);
-		return -EINVAL;
-	}
-
-	pctrl->dev = &pdev->dev;
-	pctrl->soc = soc_data;
-	pctrl->irq = wb_gpio_data->irq;
-	raw_spin_lock_init(&pctrl->lock);
-
-	/*
-	 * Make a copy of the communities which we can use to hold pointers
-	 * to the registers.
-	 */
-	pctrl->ncommunities = pctrl->soc->ncommunities;
-	pctrl->communities = devm_kcalloc(&pdev->dev, pctrl->ncommunities,
-				  sizeof(*pctrl->communities), GFP_KERNEL);
-	if (!pctrl->communities) {
-        dev_err(&pdev->dev, "devm_kcalloc communities failed. ret:%d\n", ret);
-        return -ENOMEM;
-    }
-
-	for (i = 0; i < pctrl->ncommunities; i++) {
-		community = &pctrl->communities[i];
-		*community = pctrl->soc->communities[i];
-
-		regs = wb_gpio_data->res[i];
-
-		/*
-		 * Determine community features based on the revision if
-		 * not specified already.
-		 */
-		if (!community->features) {
-			rev = (readl(regs + REVID) & REVID_MASK) >> REVID_SHIFT;
-			if (rev >= 0x94) {
-				community->features |= PINCTRL_FEATURE_DEBOUNCE;
-				community->features |= PINCTRL_FEATURE_1K_PD;
-			}
-		}
-
-		/* Read offset of the pad configuration registers */
-		padbar = readl(regs + PADBAR);
-
-		community->regs = regs;
-		community->pad_regs = regs + padbar;
-
-		ret = intel_pinctrl_add_padgroups(pctrl, community);
-		if (ret) {
- 			dev_err(&pdev->dev, "intel_pinctrl_add_padgroups failed. ret:%d\n", ret);
-			return ret;
-        }
-	}
-
-	ret = intel_pinctrl_pm_init(pctrl);
-	if (ret) {
-        dev_err(&pdev->dev, "intel_pinctrl_pm_init failed. ret:%d\n", ret);
-        return ret;
-    }
-
-	pctrl->pctldesc = intel_pinctrl_desc;
-	pctrl->pctldesc.name = dev_name(&pdev->dev);
-	pctrl->pctldesc.pins = pctrl->soc->pins;
-	pctrl->pctldesc.npins = pctrl->soc->npins;
-
-	pctrl->pctldev = devm_pinctrl_register(&pdev->dev, &pctrl->pctldesc,
-					       pctrl);
-	if (IS_ERR(pctrl->pctldev)) {
-		dev_err(&pdev->dev, "failed to register pinctrl driver\n");
-		return PTR_ERR(pctrl->pctldev);
-	}
-
-    ret = intel_gpio_probe(pctrl, pctrl->irq);
-    if (ret) {
-        dev_err(&pdev->dev, "intel_gpio_probe failed. ret:%d\n", ret);
-        return ret;
-    }
-    return 0;
-}
-EXPORT_SYMBOL_GPL(wb_pinctrl_probe);
-
-#if 0
-int intel_pinctrl_probe_by_hid(struct platform_device *pdev)
-{
-	const struct intel_pinctrl_soc_data *data;
-
-	data = device_get_match_data(&pdev->dev);
-	if (!data)
-		return -ENODATA;
-
-	return intel_pinctrl_probe(pdev, data);
-}
-EXPORT_SYMBOL_GPL(intel_pinctrl_probe_by_hid);
-
-int intel_pinctrl_probe_by_uid(struct platform_device *pdev)
-{
-	const struct intel_pinctrl_soc_data *data;
-
-	data = intel_pinctrl_get_soc_data(pdev);
-	if (IS_ERR(data))
-		return PTR_ERR(data);
-
-	return intel_pinctrl_probe(pdev, data);
-}
-EXPORT_SYMBOL_GPL(intel_pinctrl_probe_by_uid);
-
-const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_device *pdev)
-{
-	const struct intel_pinctrl_soc_data *data = NULL;
-	const struct intel_pinctrl_soc_data **table;
-	struct acpi_device *adev;
-	unsigned int i;
-
-	adev = ACPI_COMPANION(&pdev->dev);
-	if (adev) {
-		const void *match = device_get_match_data(&pdev->dev);
-
-		table = (const struct intel_pinctrl_soc_data **)match;
-		for (i = 0; table[i]; i++) {
-			if (!strcmp(adev->pnp.unique_id, table[i]->uid)) {
-				data = table[i];
-				break;
-			}
-		}
-	} else {
-		const struct platform_device_id *id;
-
-		id = platform_get_device_id(pdev);
-		if (!id)
-			return ERR_PTR(-ENODEV);
-
-		table = (const struct intel_pinctrl_soc_data **)id->driver_data;
-		data = table[pdev->id];
-	}
-
-	return data ?: ERR_PTR(-ENODATA);
-}
-EXPORT_SYMBOL_GPL(intel_pinctrl_get_soc_data);
-#endif
-
-#ifdef CONFIG_PM_SLEEP
-static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int pin)
-{
-	const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin);
-
-	if (!pd || !intel_pad_usable(pctrl, pin))
-		return false;
-
-	/*
-	 * Only restore the pin if it is actually in use by the kernel (or
-	 * by userspace). It is possible that some pins are used by the
-	 * BIOS during resume and those are not always locked down so leave
-	 * them alone.
-	 */
-	if (pd->mux_owner || pd->gpio_owner ||
-	    gpiochip_line_is_irq(&pctrl->chip, intel_pin_to_gpio(pctrl, pin)))
-		return true;
-
-	return false;
-}
-
-int wb_intel_pinctrl_suspend_noirq(struct device *dev)
-{
-	struct intel_pinctrl *pctrl = dev_get_drvdata(dev);
-	struct intel_community_context *communities;
-	struct intel_pad_context *pads;
-	int i;
-
-	pads = pctrl->context.pads;
-	for (i = 0; i < pctrl->soc->npins; i++) {
-		const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];
-		void __iomem *padcfg;
-		u32 val;
-
-		if (!intel_pinctrl_should_save(pctrl, desc->number))
-			continue;
-
-		val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG0));
-		pads[i].padcfg0 = val & ~PADCFG0_GPIORXSTATE;
-		val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG1));
-		pads[i].padcfg1 = val;
-
-		padcfg = intel_get_padcfg(pctrl, desc->number, PADCFG2);
-		if (padcfg)
-			pads[i].padcfg2 = readl(padcfg);
-	}
-
-	communities = pctrl->context.communities;
-	for (i = 0; i < pctrl->ncommunities; i++) {
-		struct intel_community *community = &pctrl->communities[i];
-		void __iomem *base;
-		unsigned int gpp;
-
-		base = community->regs + community->ie_offset;
-		for (gpp = 0; gpp < community->ngpps; gpp++)
-			communities[i].intmask[gpp] = readl(base + gpp * 4);
-
-		base = community->regs + community->hostown_offset;
-		for (gpp = 0; gpp < community->ngpps; gpp++)
-			communities[i].hostown[gpp] = readl(base + gpp * 4);
-	}
-
-	return 0;
-}
-EXPORT_SYMBOL_GPL(wb_intel_pinctrl_suspend_noirq);
-
-static void intel_gpio_irq_init(struct intel_pinctrl *pctrl)
-{
-	size_t i;
-
-	for (i = 0; i < pctrl->ncommunities; i++) {
-		const struct intel_community *community;
-		void __iomem *base;
-		unsigned int gpp;
-
-		community = &pctrl->communities[i];
-		base = community->regs;
-
-		for (gpp = 0; gpp < community->ngpps; gpp++) {
-			/* Mask and clear all interrupts */
-			writel(0, base + community->ie_offset + gpp * 4);
-			writel(0xffff, base + community->is_offset + gpp * 4);
-		}
-	}
-}
-
-static bool intel_gpio_update_reg(void __iomem *reg, u32 mask, u32 value)
-{
-	u32 curr, updated;
-
-	curr = readl(reg);
-
-	updated = (curr & ~mask) | (value & mask);
-	if (curr == updated)
-		return false;
-
-	writel(updated, reg);
-	return true;
-}
-
-static void intel_restore_hostown(struct intel_pinctrl *pctrl, unsigned int c,
-				  void __iomem *base, unsigned int gpp, u32 saved)
-{
-	const struct intel_community *community = &pctrl->communities[c];
-	const struct intel_padgroup *padgrp = &community->gpps[gpp];
-	struct device *dev = pctrl->dev;
-	const char *dummy;
-	u32 requested = 0;
-	unsigned int i;
-
-	if (padgrp->gpio_base == INTEL_GPIO_BASE_NOMAP)
-		return;
-
-	for_each_requested_gpio_in_range(&pctrl->chip, i, padgrp->gpio_base, padgrp->size, dummy)
-		requested |= BIT(i);
-
-	if (!intel_gpio_update_reg(base + gpp * 4, requested, saved))
-		return;
-
-	dev_dbg(dev, "restored hostown %u/%u %#08x\n", c, gpp, readl(base + gpp * 4));
-}
-
-static void intel_restore_intmask(struct intel_pinctrl *pctrl, unsigned int c,
-				  void __iomem *base, unsigned int gpp, u32 saved)
-{
-	struct device *dev = pctrl->dev;
-
-	if (!intel_gpio_update_reg(base + gpp * 4, ~0U, saved))
-		return;
-
-	dev_dbg(dev, "restored mask %u/%u %#08x\n", c, gpp, readl(base + gpp * 4));
-}
-
-static void intel_restore_padcfg(struct intel_pinctrl *pctrl, unsigned int pin,
-				 unsigned int reg, u32 saved)
-{
-	u32 mask = (reg == PADCFG0) ? PADCFG0_GPIORXSTATE : 0;
-	unsigned int n = reg / sizeof(u32);
-	struct device *dev = pctrl->dev;
-	void __iomem *padcfg;
-
-	padcfg = intel_get_padcfg(pctrl, pin, reg);
-	if (!padcfg)
-		return;
-
-	if (!intel_gpio_update_reg(padcfg, ~mask, saved))
-		return;
-
-	dev_dbg(dev, "restored pin %u padcfg%u %#08x\n", pin, n, readl(padcfg));
-}
-
-int wb_intel_pinctrl_resume_noirq(struct device *dev)
-{
-	struct intel_pinctrl *pctrl = dev_get_drvdata(dev);
-	const struct intel_community_context *communities;
-	const struct intel_pad_context *pads;
-	int i;
-
-	/* Mask all interrupts */
-	intel_gpio_irq_init(pctrl);
-
-	pads = pctrl->context.pads;
-	for (i = 0; i < pctrl->soc->npins; i++) {
-		const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];
-
-		if (!intel_pinctrl_should_save(pctrl, desc->number))
-			continue;
-
-		intel_restore_padcfg(pctrl, desc->number, PADCFG0, pads[i].padcfg0);
-		intel_restore_padcfg(pctrl, desc->number, PADCFG1, pads[i].padcfg1);
-		intel_restore_padcfg(pctrl, desc->number, PADCFG2, pads[i].padcfg2);
-	}
-
-	communities = pctrl->context.communities;
-	for (i = 0; i < pctrl->ncommunities; i++) {
-		struct intel_community *community = &pctrl->communities[i];
-		void __iomem *base;
-		unsigned int gpp;
-
-		base = community->regs + community->ie_offset;
-		for (gpp = 0; gpp < community->ngpps; gpp++)
-			intel_restore_intmask(pctrl, i, base, gpp, communities[i].intmask[gpp]);
-
-		base = community->regs + community->hostown_offset;
-		for (gpp = 0; gpp < community->ngpps; gpp++)
-			intel_restore_hostown(pctrl, i, base, gpp, communities[i].hostown[gpp]);
-	}
-
-	return 0;
-}
-EXPORT_SYMBOL_GPL(wb_intel_pinctrl_resume_noirq);
-#endif
-
-MODULE_AUTHOR("Mathias Nyman <mathias.nyman@linux.intel.com>");
-MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
-MODULE_DESCRIPTION("Intel pinctrl/GPIO core driver");
-MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h
deleted file mode 100644
index 111edabacfc..00000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h
+++ /dev/null
@@ -1,289 +0,0 @@
-/*
- * A header definition for pinctrl_intel driver
- *
- * Copyright (C) 2024 Micas Networks Inc.
- *
- * Based on pinctrl-intel.h
- * Copyright (C) 2015, Intel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef PINCTRL_INTEL_H
-#define PINCTRL_INTEL_H
-
-#include <linux/bits.h>
-#include <linux/compiler_types.h>
-#include <linux/gpio/driver.h>
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/pm.h>
-#include <linux/pinctrl/pinctrl.h>
-#include <linux/spinlock_types.h>
-
-struct platform_device;
-struct device;
-
-#define GPIO_RES_MAX    (2)
-
-typedef struct wb_gpio_data_s {
-    int irq;
-    void __iomem *res[GPIO_RES_MAX];
-    unsigned int pci_domain;
-    unsigned int pci_bus;
-    unsigned int pci_slot;
-    unsigned int pci_fn;
-    unsigned int pci_bar;
-    struct pci_dev *pci_dev;
-    void __iomem *pci_mem_base;
-} wb_gpio_data_t;
-
-/**
- * struct intel_pingroup - Description about group of pins
- * @name: Name of the groups
- * @pins: All pins in this group
- * @npins: Number of pins in this groups
- * @mode: Native mode in which the group is muxed out @pins. Used if @modes
- *        is %NULL.
- * @modes: If not %NULL this will hold mode for each pin in @pins
- */
-struct intel_pingroup {
-	const char *name;
-	const unsigned int *pins;
-	size_t npins;
-	unsigned short mode;
-	const unsigned int *modes;
-};
-
-/**
- * struct intel_function - Description about a function
- * @name: Name of the function
- * @groups: An array of groups for this function
- * @ngroups: Number of groups in @groups
- */
-struct intel_function {
-	const char *name;
-	const char * const *groups;
-	size_t ngroups;
-};
-
-/**
- * struct intel_padgroup - Hardware pad group information
- * @reg_num: GPI_IS register number
- * @base: Starting pin of this group
- * @size: Size of this group (maximum is 32).
- * @gpio_base: Starting GPIO base of this group
- * @padown_num: PAD_OWN register number (assigned by the core driver)
- *
- * If pad groups of a community are not the same size, use this structure
- * to specify them.
- */
-struct intel_padgroup {
-	unsigned int reg_num;
-	unsigned int base;
-	unsigned int size;
-	int gpio_base;
-	unsigned int padown_num;
-};
-
-/**
- * enum - Special treatment for GPIO base in pad group
- *
- * @INTEL_GPIO_BASE_ZERO:	force GPIO base to be 0
- * @INTEL_GPIO_BASE_NOMAP:	no GPIO mapping should be created
- * @INTEL_GPIO_BASE_MATCH:	matches with starting pin number
- */
-enum {
-	INTEL_GPIO_BASE_ZERO	= -2,
-	INTEL_GPIO_BASE_NOMAP	= -1,
-	INTEL_GPIO_BASE_MATCH	= 0,
-};
-
-/**
- * struct intel_community - Intel pin community description
- * @barno: MMIO BAR number where registers for this community reside
- * @padown_offset: Register offset of PAD_OWN register from @regs. If %0
- *                 then there is no support for owner.
- * @padcfglock_offset: Register offset of PADCFGLOCK from @regs. If %0 then
- *                     locking is not supported.
- * @hostown_offset: Register offset of HOSTSW_OWN from @regs. If %0 then it
- *                  is assumed that the host owns the pin (rather than
- *                  ACPI).
- * @is_offset: Register offset of GPI_IS from @regs.
- * @ie_offset: Register offset of GPI_IE from @regs.
- * @features: Additional features supported by the hardware
- * @pin_base: Starting pin of pins in this community
- * @npins: Number of pins in this community
- * @gpp_size: Maximum number of pads in each group, such as PADCFGLOCK,
- *            HOSTSW_OWN, GPI_IS, GPI_IE. Used when @gpps is %NULL.
- * @gpp_num_padown_regs: Number of pad registers each pad group consumes at
- *			 minimum. Use %0 if the number of registers can be
- *			 determined by the size of the group.
- * @gpps: Pad groups if the controller has variable size pad groups
- * @ngpps: Number of pad groups in this community
- * @pad_map: Optional non-linear mapping of the pads
- * @nirqs: Optional total number of IRQs this community can generate
- * @acpi_space_id: Optional address space ID for ACPI OpRegion handler
- * @regs: Community specific common registers (reserved for core driver)
- * @pad_regs: Community specific pad registers (reserved for core driver)
- *
- * In some of Intel GPIO host controllers this driver supports each pad group
- * is of equal size (except the last one). In that case the driver can just
- * fill in @gpp_size field and let the core driver to handle the rest. If
- * the controller has pad groups of variable size the client driver can
- * pass custom @gpps and @ngpps instead.
- */
-struct intel_community {
-	unsigned int barno;
-	unsigned int padown_offset;
-	unsigned int padcfglock_offset;
-	unsigned int hostown_offset;
-	unsigned int is_offset;
-	unsigned int ie_offset;
-	unsigned int features;
-	unsigned int pin_base;
-	size_t npins;
-	unsigned int gpp_size;
-	unsigned int gpp_num_padown_regs;
-	const struct intel_padgroup *gpps;
-	size_t ngpps;
-	const unsigned int *pad_map;
-	unsigned short nirqs;
-	unsigned short acpi_space_id;
-
-	/* Reserved for the core driver */
-	void __iomem *regs;
-	void __iomem *pad_regs;
-    u32 dw_base;
-};
-
-/* Additional features supported by the hardware */
-#define PINCTRL_FEATURE_DEBOUNCE	BIT(0)
-#define PINCTRL_FEATURE_1K_PD		BIT(1)
-
-/**
- * PIN_GROUP - Declare a pin group
- * @n: Name of the group
- * @p: An array of pins this group consists
- * @m: Mode which the pins are put when this group is active. Can be either
- *     a single integer or an array of integers in which case mode is per
- *     pin.
- */
-#define PIN_GROUP(n, p, m)					\
-	{							\
-		.name = (n),					\
-		.pins = (p),					\
-		.npins = ARRAY_SIZE((p)),			\
-		.mode = __builtin_choose_expr(			\
-			__builtin_constant_p((m)), (m), 0),	\
-		.modes = __builtin_choose_expr(			\
-			__builtin_constant_p((m)), NULL, (m)),	\
-	}
-
-#define FUNCTION(n, g)				\
-	{					\
-		.name = (n),			\
-		.groups = (g),			\
-		.ngroups = ARRAY_SIZE((g)),	\
-	}
-
-/**
- * struct intel_pinctrl_soc_data - Intel pin controller per-SoC configuration
- * @uid: ACPI _UID for the probe driver use if needed
- * @pins: Array if pins this pinctrl controls
- * @npins: Number of pins in the array
- * @groups: Array of pin groups
- * @ngroups: Number of groups in the array
- * @functions: Array of functions
- * @nfunctions: Number of functions in the array
- * @communities: Array of communities this pinctrl handles
- * @ncommunities: Number of communities in the array
- *
- * The @communities is used as a template by the core driver. It will make
- * copy of all communities and fill in rest of the information.
- */
-struct intel_pinctrl_soc_data {
-	const char *uid;
-	const struct pinctrl_pin_desc *pins;
-	size_t npins;
-	const struct intel_pingroup *groups;
-	size_t ngroups;
-	const struct intel_function *functions;
-	size_t nfunctions;
-	const struct intel_community *communities;
-	size_t ncommunities;
-};
-
-struct intel_pad_context;
-struct intel_community_context;
-
-/**
- * struct intel_pinctrl_context - context to be saved during suspend-resume
- * @pads: Opaque context per pad (driver dependent)
- * @communities: Opaque context per community (driver dependent)
- */
-struct intel_pinctrl_context {
-	struct intel_pad_context *pads;
-	struct intel_community_context *communities;
-};
-
-/**
- * struct intel_pinctrl - Intel pinctrl private structure
- * @dev: Pointer to the device structure
- * @lock: Lock to serialize register access
- * @pctldesc: Pin controller description
- * @pctldev: Pointer to the pin controller device
- * @chip: GPIO chip in this pin controller
- * @irqchip: IRQ chip in this pin controller
- * @soc: SoC/PCH specific pin configuration data
- * @communities: All communities in this pin controller
- * @ncommunities: Number of communities in this pin controller
- * @context: Configuration saved over system sleep
- * @irq: pinctrl/GPIO chip irq number
- */
-struct intel_pinctrl {
-	struct device *dev;
-	raw_spinlock_t lock;
-	struct pinctrl_desc pctldesc;
-	struct pinctrl_dev *pctldev;
-	struct gpio_chip chip;
-	struct irq_chip irqchip;
-	const struct intel_pinctrl_soc_data *soc;
-	struct intel_community *communities;
-	size_t ncommunities;
-	struct intel_pinctrl_context context;
-	int irq;
-};
-
-int wb_pinctrl_probe(struct platform_device *pdev, const struct intel_pinctrl_soc_data *soc_data);
-
-#if 0
-const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_device *pdev);
-int intel_pinctrl_probe_by_hid(struct platform_device *pdev);
-int intel_pinctrl_probe_by_uid(struct platform_device *pdev);
-#endif
-
-#ifdef CONFIG_PM_SLEEP
-int wb_intel_pinctrl_suspend_noirq(struct device *dev);
-int wb_intel_pinctrl_resume_noirq(struct device *dev);
-#endif
-
-#define INTEL_PINCTRL_PM_OPS(_name)					\
-const struct dev_pm_ops _name = {					\
-	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(wb_intel_pinctrl_suspend_noirq,	\
-				      wb_intel_pinctrl_resume_noirq)	\
-}
-
-#endif /* PINCTRL_INTEL_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
index 4d789d6d460..847a9215387 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
@@ -81,6 +81,7 @@ class Sfp(SfpOptoeBase):
     def __init__(self, index):
         SfpOptoeBase.__init__(self)
         self.sfp_type = None
+        self.presence = False
         sfp_config = baseutil.get_config().get("sfps", None)
         self.log_level_config = sfp_config.get("log_level", LOG_WARNING_LEVEL)
         # Init instance of SfpCust
@@ -103,11 +104,33 @@ def get_eeprom_path(self):
     def read_eeprom(self, offset, num_bytes):
         return self._sfp_api.read_eeprom(offset, num_bytes)
 
+    def set_power_class(self):
+        try:
+            if self.sfp_type is None:
+                self.refresh_xcvr_api()
+            if self.sfp_type != "QSFP":
+                return
+            identify_code = self.read_eeprom(0, 1)
+            if identify_code[0] != 0x11:
+                return
+            ext_identify_code = self.read_eeprom(129, 1)
+            if (ext_identify_code[0] & 0x3) == 0x0:
+                return
+            power_class_ctrl = self.read_eeprom(93, 1)
+            power_class_ctrl = power_class_ctrl[0] | 0x4
+            self._sfp_api.write_eeprom(93, 1, bytearray([power_class_ctrl]))
+        except Exception as e:
+            print(traceback.format_exc())
+
     def write_eeprom(self, offset, num_bytes, write_buffer):
         return self._sfp_api.write_eeprom(offset, num_bytes, write_buffer)
 
     def get_presence(self):
-        return self._sfp_api.get_presence()
+        presence = self._sfp_api.get_presence()
+        if (presence == True) and (self.presence != True):
+            self.set_power_class()
+        self.presence = presence
+        return presence
 
     def get_transceiver_info(self):
         api_get = self._sfp_api.get_transceiver_info(SfpOptoeBase, self)
@@ -304,6 +327,9 @@ def _init_config(self, index):
     def _get_eeprom_path(self):
         return self.eeprom_path or None
 
+    def get_eeprom_path(self):
+        return self._get_eeprom_path()
+
     @abstractmethod
     def _pre_get_transceiver_info(self):
         pass
@@ -908,4 +934,4 @@ def _file_rw_unlock(self):
             return True
         except Exception as e:
             self._sfplog(LOG_ERROR_LEVEL, "file unlock err, msg:%s" % (str(e)))
-            return False
\ No newline at end of file
+            return False
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_config.py
index 5ff4e1013fc..28c9a5f212e 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_config.py
@@ -376,19 +376,16 @@
 
 
 DRIVERLISTS = [
-    {"name": "wb_pinctrl_intel", "delay": 30},
-    {"name": "wb_gpio_c3000", "delay": 0},
-    {"name": "wb_gpio_c3000_device", "delay": 0},
     {"name": "i2c_ismt", "delay": 0},
     {"name": "i2c_i801", "delay": 0},
     {"name": "i2c_dev", "delay": 0},
     {"name": "i2c_algo_bit", "delay": 0},
     {"name": "i2c_gpio", "delay": 0},
     {"name": "i2c_mux", "delay": 0},
-    {"name": "wb_i2c_gpio_device gpio_sda=31 gpio_scl=32 gpio_chip_name=wb_gpio_c3000", "delay": 0},
+    {"name": "wb_i2c_gpio_device gpio_sda=31 gpio_scl=32 gpio_chip_name=INTC3000:00", "delay": 0},
     {"name": "mdio_bitbang", "delay": 0},
     {"name": "mdio_gpio", "delay": 0},
-    {"name": "wb_mdio_gpio_device gpio_mdc=33 gpio_mdio=34 gpio_chip_name=wb_gpio_c3000", "delay": 0},
+    {"name": "wb_mdio_gpio_device gpio_mdc=33 gpio_mdio=34 gpio_chip_name=INTC3000:00", "delay": 0},
     {"name": "platform_common dfd_my_type=0x40b2", "delay": 0},
     {"name": "wb_pcie_dev", "delay": 0},
     {"name": "wb_lpc_drv", "delay": 0},
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_device.py
index 6adf2ef004b..c23d8020524 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_device.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_device.py
@@ -247,7 +247,7 @@ class threshold:
         {
             "name": "BOARD_TEMP",
             "temp_id": "TEMP1",
-            "api_name": "Board",
+            "api_name": "BOARD_TEMP",
             "Temperature": {
                 "value": {"loc": "/sys/bus/i2c/devices/40-004e/hwmon/hwmon*/temp1_input", "way": "sysfs"},
                 "Min": -10000,
@@ -261,7 +261,7 @@ class threshold:
         {
             "name": "CPU_TEMP",
             "temp_id": "TEMP2",
-            "api_name": "CPU",
+            "api_name": "CPU_TEMP",
             "Temperature": {
                 "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
                 "Min": 2000,
@@ -275,7 +275,7 @@ class threshold:
         {
             "name": "INLET_TEMP",
             "temp_id": "TEMP3",
-            "api_name": "Inlet",
+            "api_name": "INLET_TEMP",
             "Temperature": {
                 "value": {"loc": "/sys/bus/i2c/devices/40-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"},
                 "Min": -10000,
@@ -289,7 +289,7 @@ class threshold:
         {
             "name": "OUTLET_TEMP",
             "temp_id": "TEMP4",
-            "api_name": "Outlet",
+            "api_name": "OUTLET_TEMP",
             "Temperature": {
                 "value": {"loc": "/sys/bus/i2c/devices/36-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
                 "Min": -10000,
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/config/x86_64_micas_m2_w6520_48c8qc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/config/x86_64_micas_m2_w6520_48c8qc_r0_config.py
index 45419f40e06..d94dcf5d995 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/config/x86_64_micas_m2_w6520_48c8qc_r0_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/config/x86_64_micas_m2_w6520_48c8qc_r0_config.py
@@ -11,7 +11,7 @@
     "reboot_cause": 1,
     "pmon_syslog": 1,
     "sff_temp_polling": 1,
-    "generate_airflow": 0,
+    "generate_airflow": 1,
 }
 
 DEV_MONITOR_PARAM = {
@@ -386,7 +386,7 @@
         "parent": "cpld4",
         "i2c": {
             "bus": "2",
-            "loc": "0x2d",
+            "loc": "0x1d",
             "offset": 0,
             "size": 4
         },
@@ -1018,7 +1018,7 @@
             "record": [
                 {"record_type": "file", "mode": "cover", "log": "Watchdog, ",
                     "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
-                {"record_type": "file", "mode": "add", "log": "Watchdog, ",
+                {"record_type": "file", "mode": "add", "log": "Watchdog, ", 
                     "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024}
             ],
             "finish_operation": [
@@ -1077,3 +1077,53 @@
         {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"},
     ],
 }
+
+AIR_FLOW_CONF = {
+    "psu_fan_airflow": {
+        "intake": ['DPS-1300AB-6 S', 'GW-CRPS1300D'],
+        "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+    },
+
+    "fanairflow": {
+        "intake": ['M1HFAN II-F'],
+        "exhaust": ['M1HFAN IV-R']
+    },
+
+    "fans": [
+        {
+            "name": "FAN1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/i2c-75/75-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/i2c-74/74-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/i2c-73/73-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/i2c-72/72-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/i2c-71/71-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/i2c-70/70-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+    ],
+
+    "psus": [
+        {
+            "name": "PSU1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/81-0050/eeprom",
+            "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+        },
+        {
+            "name": "PSU2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/82-0050/eeprom",
+            "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+        }
+    ]
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_device.py
index d244516cacd..fc83da93a46 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_device.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_device.py
@@ -2,16 +2,17 @@
 
 psu_fan_airflow = {
     "intake": ['DPS-1300AB-6 S', 'GW-CRPS1300D'],
-    "exhaust": []
+    "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C']
 }
 
 fanairflow = {
     "intake": ['M1HFAN II-F'],
-    "exhaust": [],
+    "exhaust": ['M1HFAN IV-R'],
 }
 
 psu_display_name = {
     "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 S'],
+    "PA1300I-R": ['CRPS1300D3R', 'DPS-1300AB-11 C']
 }
 
 psutypedecode = {
@@ -247,7 +248,7 @@ class threshold:
         {
             "name": "BOARD_TEMP",
             "temp_id": "TEMP1",
-            "api_name": "Board",
+            "api_name": "BOARD_TEMP",
             "Temperature": {
                 "value": {"loc": "/sys/bus/i2c/devices/80-004e/hwmon/hwmon*/temp1_input", "way": "sysfs"},
                 "Min": -10000,
@@ -261,7 +262,7 @@ class threshold:
         {
             "name": "CPU_TEMP",
             "temp_id": "TEMP2",
-            "api_name": "CPU",
+            "api_name": "CPU_TEMP",
             "Temperature": {
                 "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
                 "Min": 2000,
@@ -275,7 +276,7 @@ class threshold:
         {
             "name": "INLET_TEMP",
             "temp_id": "TEMP3",
-            "api_name": "Inlet",
+            "api_name": "INLET_TEMP",
             "Temperature": {
                 "value": {"loc": "/sys/bus/i2c/devices/80-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"},
                 "Min": -10000,
@@ -289,7 +290,7 @@ class threshold:
         {
             "name": "OUTLET_TEMP",
             "temp_id": "TEMP4",
-            "api_name": "Outlet",
+            "api_name": "OUTLET_TEMP",
             "Temperature": {
                 "value": {"loc": "/sys/bus/i2c/devices/76-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
                 "Min": -10000,
@@ -361,8 +362,9 @@ class threshold:
             "led_type": "SYS_LED",
             "led": {"bus": 2, "addr": 0x2d, "offset": 0x47, "way": "i2c"},
             "led_attrs": {
-                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
-                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
             },
         },
         {
@@ -370,8 +372,9 @@ class threshold:
             "led_type": "PSU_LED",
             "led": {"bus": 2, "addr": 0x2d, "offset": 0x4a, "way": "i2c"},
             "led_attrs": {
-                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
-                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
             },
         },
         {
@@ -379,8 +382,9 @@ class threshold:
             "led_type": "FAN_LED",
             "led": {"bus": 2, "addr": 0x2d, "offset": 0x49, "way": "i2c"},
             "led_attrs": {
-                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
-                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
             },
         },
     ],
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_exhaust_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_exhaust_device.py
new file mode 100644
index 00000000000..a2547deb75f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_exhaust_device.py
@@ -0,0 +1,1251 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+    "intake": ['DPS-1300AB-6 S', 'GW-CRPS1300D'],
+    "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+}
+
+fanairflow = {
+    "intake": ['M1HFAN II-F'],
+    "exhaust": ['M1HFAN IV-R'],
+}
+
+psu_display_name = {
+    "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 S'],
+    "PA1300I-R": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+class threshold:
+    PSU_TEMP_MIN = -10 * 1000
+    PSU_TEMP_MAX = 60 * 1000
+
+    PSU_FAN_SPEED_MIN = 3000
+    PSU_FAN_SPEED_MAX = 30000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 1300 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 1444 * 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 2 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 107 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0.2 * 1000
+    PSU_INPUT_CURRENT_MAX = 7 * 1000
+
+    FRONT_FAN_SPEED_MAX = 32500
+    REAR_FAN_SPEED_MAX = 30500
+    FAN_SPEED_MIN = 2800
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"},
+            "airflow": "exhaust"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/81-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 81, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 81, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 81, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 81, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 81, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 81, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/82-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 82, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 82, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 82, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 82, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 82, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 82, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP1",
+            "api_name": "BOARD_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/80-004e/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 70000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "api_name": "CPU_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 104000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "api_name": "INLET_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/76-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 40000,
+                "Max": 50000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "api_name": "OUTLET_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/80-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 70000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/84-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 105000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -15000,
+                "Low": 0,
+                "High": 80000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "invalid": -10000,
+            "error": -9999,
+        }
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"bus": 2, "addr": 0x2d, "offset": 0x47, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"bus": 2, "addr": 0x2d, "offset": 0x4a, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"bus": 2, "addr": 0x2d, "offset": 0x49, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-75/75-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x41, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-74/74-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x40, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-73/73-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x3f, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-72/72-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN5",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-71/71-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN6",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-70/70-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan6/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan6/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "CONNECT_BOARD_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_CPLDA",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_CPLDB",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_CPLDC",
+            "cpld_id": "CPLD8",
+            "VersionFile": {"loc": "/dev/cpld7", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+        },
+        {
+            "name": "FAN_CPLD",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "FPGA",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 1,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        },
+    ],
+    "dcdc": [
+        {
+            "name": "VDD5V_CLK_MCU",
+            "dcdc_id": "DCDC1",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 4250,
+            "Low": 4500,
+            "High": 5500,
+            "Max": 5750,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD3.3_CLK",
+            "dcdc_id": "DCDC2",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Low": 2970,
+            "High": 3630,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD1.0V",
+            "dcdc_id": "DCDC3",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 850,
+            "Low": 900,
+            "High": 1100,
+            "Max": 1150,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD1.8V",
+            "dcdc_id": "DCDC4",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1530,
+            "Low": 1620,
+            "High": 1980,
+            "Max": 2070,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD3.3V_A",
+            "dcdc_id": "DCDC5",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in5_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Low": 2970,
+            "High": 3630,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD1.2V",
+            "dcdc_id": "DCDC6",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in6_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Low": 1080,
+            "High": 1320,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD_CORE",
+            "dcdc_id": "DCDC7",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in7_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 600,
+            "Low": 650,
+            "High": 990,
+            "Max": 1100,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "ANALOG0.75V",
+            "dcdc_id": "DCDC8",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in8_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 615,
+            "Low": 640,
+            "High": 907,
+            "Max": 1000,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD1.2V",
+            "dcdc_id": "DCDC9",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in9_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Low": 1080,
+            "High": 1320,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDDO1.8V",
+            "dcdc_id": "DCDC10",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in10_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1530,
+            "Low": 1620,
+            "High": 1980,
+            "Max": 2070,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_ANA1.2V",
+            "dcdc_id": "DCDC11",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in11_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Low": 1080,
+            "High": 1320,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_ANA1.8V",
+            "dcdc_id": "DCDC12",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in12_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1530,
+            "Low": 1620,
+            "High": 1980,
+            "Max": 2070,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "QSFP56_VDD3.3V_A",
+            "dcdc_id": "DCDC13",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in13_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Low": 2970,
+            "High": 3630,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "QSFP56_VDD3.3V_B",
+            "dcdc_id": "DCDC14",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in14_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Low": 2970,
+            "High": 3630,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "QSFPDD_VDD3.3V_A",
+            "dcdc_id": "DCDC15",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in15_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Low": 2970,
+            "High": 3630,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "QSFPDD_VDD3.3V_B",
+            "dcdc_id": "DCDC16",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/85-005b/hwmon/*/in16_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Low": 2970,
+            "High": 3630,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD5.0V",
+            "dcdc_id": "DCDC17",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/64-005b/hwmon/*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 4250,
+            "Low": 4500,
+            "High": 5500,
+            "Max": 5750,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "SW_VDD1.2V",
+            "dcdc_id": "DCDC18",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/64-005b/hwmon/*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Low": 1080,
+            "High": 1320,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD2.5V",
+            "dcdc_id": "DCDC19",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/64-005b/hwmon/*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2125,
+            "Low": 2250,
+            "High": 2750,
+            "Max": 2875,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD3.3V_B",
+            "dcdc_id": "DCDC20",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/64-005b/hwmon/*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Low": 2970,
+            "High": 3630,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD12V",
+            "dcdc_id": "DCDC21",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/64-005b/hwmon/*/in6_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 10200,
+            "Low": 10800,
+            "High": 13200,
+            "Max": 13800,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD3.3_STBY",
+            "dcdc_id": "DCDC22",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/64-005b/hwmon/*/in7_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Low": 2970,
+            "High": 3630,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "SSD_VDD3.3V",
+            "dcdc_id": "DCDC23",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/64-005b/hwmon/*/in8_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Low": 2970,
+            "High": 3630,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VCCIN_V",
+            "dcdc_id": "DCDC24",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/65-0067/hwmon/*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1368,
+            "Low": 1444,
+            "High": 2142,
+            "Max": 2244,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P1V05_V",
+            "dcdc_id": "DCDC25",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/65-0067/hwmon/*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 882,
+            "Low": 931,
+            "High": 1176,
+            "Max": 1232,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VCCD_V",
+            "dcdc_id": "DCDC26",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/65-006c/hwmon/*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 990,
+            "Low": 1045,
+            "High": 1386,
+            "Max": 1452,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VCCSCSUS_V",
+            "dcdc_id": "DCDC27",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/65-006c/hwmon/*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 855,
+            "Low": 903,
+            "High": 1208,
+            "Max": 1265,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P5V_AUX_V",
+            "dcdc_id": "DCDC28",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/65-0043/hwmon/*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 3852,
+            "Low": 4066,
+            "High": 6059,
+            "Max": 6347,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P3V3_STBY_V",
+            "dcdc_id": "DCDC29",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/65-0043/hwmon/*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2682,
+            "Low": 2831,
+            "High": 3822,
+            "Max": 4004,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P1V7_VCCSCFUSESUS_V",
+            "dcdc_id": "DCDC30",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/65-0043/hwmon/*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1377,
+            "Low": 1454,
+            "High": 1964,
+            "Max": 2057,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x88, "len": 1, "way": "devfile_ascii"},
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 0,
+        "port_num": 56,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                4: {
+                    "offset": {
+                        0x30: "41-48",
+                        0x31: "49-56"
+                    },
+                },
+                5: {
+                    "offset": {
+                        0x30: "1-8",
+                        0x31: "9-13,15,22,24",
+                        0x32: "31,32,35"
+                    },
+                },
+                7: {
+                    "offset": {
+                        0x30: "14,16-21,23",
+                        0x31: "25-30,33,34",
+                        0x32: "36-40"
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": list(range(6, 63)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(6, 63)),
+        "reset_cpld": {
+            "dev_id": {
+                4: {
+                    "offset": {
+                        0x21: "41-48",
+                        0x22: "49-56"
+                    },
+                },
+                5: {
+                    "offset": {
+                        0x20: "1-4,6-9",
+                        0x21: "10-12,14,35,36",
+                    },
+                },
+                7: {
+                    "offset": {
+                        0x21: "5,13,15-20",
+                        0x22: "21-28",
+                        0x23: "29-34,37,38",
+                        0x24: "39,40"
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_exhaust_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_exhaust_monitor.py
new file mode 100644
index 00000000000..225894067b1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_exhaust_monitor.py
@@ -0,0 +1,209 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x66,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 38,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 1,
+            "pwm_min": 0x66,
+            "pwm_max": 0xff,
+            "a": 0.389,
+            "b": -15.657,
+            "c": 260,
+            "tin_min": 25,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x66,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 80,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x66,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 90,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x66,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "BOARD_TEMP": {
+            "name": "BOARD_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x66,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x66,
+            "pwm_max": 0xff,
+            "Kp": 0.1,
+            "Ki": 0.4,
+            "Kd": 0,
+            "target": 62,
+            "value": [None, None, None],
+        },
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 40, "critical": 50, "fix": -3},
+        "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 70, "critical": 75},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 100, "critical": 102},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_monitor": 1,
+        "fan_status_interval": 0.5,
+        "max_pwm": 0xff,
+        "min_pwm": 0x66,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x66,
+        "temp_error_pid_pwm": 0x66,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 2,  # fan rotor error 2 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+        "psu_absent_fullspeed_num": 0xFF,
+        "fan_absent_fullspeed_num": 1,
+        "rotor_error_fullspeed_num": 1,
+        "psu_fan_control": 1,
+        "fan_plug_in_default_countdown": 0,  # no use
+        "fan_plug_in_pwm": 0x80,  # fan plug in pwd
+        "deal_fan_error": 1,
+        "deal_fan_error_conf": {
+            "countdown": 2,
+            "FAN1": [
+                {"name": "FAN1", "pwm": 0xff},
+                {"name": "FAN2", "pwm": 0x80},
+                {"name": "FAN3", "pwm": 0x80},
+                {"name": "FAN4", "pwm": 0x80},
+                {"name": "FAN5", "pwm": 0x80},
+                {"name": "FAN6", "pwm": 0x80},
+            ],
+            "FAN2": [
+                {"name": "FAN1", "pwm": 0x80},
+                {"name": "FAN2", "pwm": 0xff},
+                {"name": "FAN3", "pwm": 0x80},
+                {"name": "FAN4", "pwm": 0x80},
+                {"name": "FAN5", "pwm": 0x80},
+                {"name": "FAN6", "pwm": 0x80},
+            ],
+            "FAN3": [
+                {"name": "FAN1", "pwm": 0x80},
+                {"name": "FAN2", "pwm": 0x80},
+                {"name": "FAN3", "pwm": 0xff},
+                {"name": "FAN4", "pwm": 0x80},
+                {"name": "FAN5", "pwm": 0x80},
+                {"name": "FAN6", "pwm": 0x80},
+            ],
+            "FAN4": [
+                {"name": "FAN1", "pwm": 0x80},
+                {"name": "FAN2", "pwm": 0x80},
+                {"name": "FAN3", "pwm": 0x80},
+                {"name": "FAN4", "pwm": 0xff},
+                {"name": "FAN5", "pwm": 0x80},
+                {"name": "FAN6", "pwm": 0x80},
+            ],
+            "FAN5": [
+                {"name": "FAN1", "pwm": 0x80},
+                {"name": "FAN2", "pwm": 0x80},
+                {"name": "FAN3", "pwm": 0x80},
+                {"name": "FAN4", "pwm": 0x80},
+                {"name": "FAN5", "pwm": 0xff},
+                {"name": "FAN6", "pwm": 0x80},
+            ],
+            "FAN6": [
+                {"name": "FAN1", "pwm": 0x80},
+                {"name": "FAN2", "pwm": 0x80},
+                {"name": "FAN3", "pwm": 0x80},
+                {"name": "FAN4", "pwm": 0x80},
+                {"name": "FAN5", "pwm": 0x80},
+                {"name": "FAN6", "pwm": 0xff},
+            ],
+        },
+    },
+
+    "ledcontrol_para": {
+        "interval": 5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "FRONT_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "FRONT_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "FRONT_FAN_LED"},
+        ],
+        "psu_air_flow_monitor": 1,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_amber_num": 1,
+        "fan_air_flow_amber_num": 1,
+    },
+
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_monitor.py
index 0315a8174fe..a136f8f3b04 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_monitor.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/hal-config/x86_64_micas_m2_w6520_48c8qc_r0_monitor.py
@@ -97,6 +97,8 @@
 
     "fancontrol_para": {
         "interval": 5,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_monitor": 1,
         "fan_status_interval": 0.5,
         "max_pwm": 0xff,
         "min_pwm": 0x80,
@@ -194,10 +196,10 @@
         "board_fan_led": [
             {"led_name": "FRONT_FAN_LED"},
         ],
-        "psu_air_flow_monitor": 0,
-        "fan_air_flow_monitor": 0,
-        "psu_air_flow_amber_num": 0,
-        "fan_air_flow_amber_num": 0,
+        "psu_air_flow_monitor": 1,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_amber_num": 1,
+        "fan_air_flow_amber_num": 1,
     },
 
     "otp_reboot_judge_file": {
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py
index 6eee7b5df12..344c396e4e0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py
@@ -556,22 +556,22 @@
             "funcname": "get_bcm5387_version",
             "params" : {
                 "before": [
-                    {"gettype": "cmd", "cmd": "echo 99 > /sys/class/gpio/export"},
-                    {"gettype": "cmd", "cmd": "echo out > /sys/class/gpio/gpio99/direction"},
-                    {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio99/value"},
+                    {"gettype": "cmd", "cmd": "echo 457 > /sys/class/gpio/export"},
+                    {"gettype": "cmd", "cmd": "echo out > /sys/class/gpio/gpio457/direction"},
+                    {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio457/value"},
                     # select update 5387
                     {"gettype": "io", "io_addr": 0x991, "value": 0x6},
                     {"gettype": "io", "io_addr": 0x990, "value": 0x1},
                     {"gettype": "io", "io_addr": 0x9a6, "value": 0x2},
                     {"gettype": "io", "io_addr": 0x9d4, "value": 0x0},
                     {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"},
-                    {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000"},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=INTC3000:00"},
                     {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46 spi_bus_num=0"},
                 ],
                 "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'",
                 "after": [
-                    {"gettype": "cmd", "cmd": "echo 1 > /sys/class/gpio/gpio99/value"},
-                    {"gettype": "cmd", "cmd": "echo 99 > /sys/class/gpio/unexport"},
+                    {"gettype": "cmd", "cmd": "echo 1 > /sys/class/gpio/gpio457/value"},
+                    {"gettype": "cmd", "cmd": "echo 457 > /sys/class/gpio/unexport"},
                 ],
                 "finally": [
                     {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"},
@@ -707,18 +707,16 @@
 
 
 DRIVERLISTS = [
-    {"name": "wb_gpio_c3000", "delay": 30},
-    {"name": "wb_gpio_c3000_device", "delay": 0},
     {"name": "i2c_ismt", "delay": 0},
     {"name": "i2c_i801", "delay": 0},
     {"name": "i2c_dev", "delay": 0},
     {"name": "i2c_algo_bit", "delay": 0},
     {"name": "i2c_gpio", "delay": 0},
     {"name": "i2c_mux", "delay": 0},
-    {"name": "wb_i2c_gpio_device gpio_sda=31 gpio_scl=32 gpio_chip_name=wb_gpio_c3000", "delay": 0},
+    {"name": "wb_i2c_gpio_device gpio_sda=31 gpio_scl=32 gpio_chip_name=INTC3000:00", "delay": 0},
     {"name": "mdio_bitbang", "delay": 0},
     {"name": "mdio_gpio", "delay": 0},
-    {"name": "wb_mdio_gpio_device gpio_mdc=33 gpio_mdio=34 gpio_chip_name=wb_gpio_c3000", "delay": 0},
+    {"name": "wb_mdio_gpio_device gpio_mdc=33 gpio_mdio=34 gpio_chip_name=INTC3000:00", "delay": 0},
     {"name": "platform_common dfd_my_type=0x40c1", "delay":0},
     {"name": "wb_fpga_pcie", "delay": 0},
     {"name": "wb_pcie_dev", "delay": 0},
@@ -1272,10 +1270,10 @@
                 "is_support_warm_upg": 1,
                 "init_cmd": [
                     {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
-                    {"cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000", "gettype": "cmd"},
-                    {"cmd": "echo 99 > /sys/class/gpio/export", "gettype": "cmd"},
-                    {"cmd": "echo out > /sys/class/gpio/gpio99/direction", "gettype": "cmd", "delay": 0.1},
-                    {"cmd": "echo 0 > /sys/class/gpio/gpio99/value", "gettype": "cmd", "delay": 0.1},
+                    {"cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=INTC3000:00", "gettype": "cmd"},
+                    {"cmd": "echo 457 > /sys/class/gpio/export", "gettype": "cmd"},
+                    {"cmd": "echo out > /sys/class/gpio/gpio457/direction", "gettype": "cmd", "delay": 0.1},
+                    {"cmd": "echo 0 > /sys/class/gpio/gpio457/value", "gettype": "cmd", "delay": 0.1},
                     {"io_addr": 0x991, "value": 0xfa, "gettype": "io"},
                     {"io_addr": 0x990, "value": 0xfd, "gettype": "io"},
                     {"io_addr": 0x9a6, "value": 0xfe, "gettype": "io"},
@@ -1288,8 +1286,8 @@
                     {"io_addr": 0x9a6, "value": 0xff, "gettype": "io"},
                     {"io_addr": 0x990, "value": 0xfc, "gettype": "io"},
                     {"io_addr": 0x991, "value": 0xf8, "gettype": "io"},
-                    {"cmd": "echo 1 > /sys/class/gpio/gpio99/value", "gettype": "cmd"},
-                    {"cmd": "echo 99 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+                    {"cmd": "echo 1 > /sys/class/gpio/gpio457/value", "gettype": "cmd"},
+                    {"cmd": "echo 457 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
                     {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
                     {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
                 ],
@@ -1323,7 +1321,7 @@
                 "is_support_warm_upg": 0,
                 "init_cmd": [
                     {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
-                    {"cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=INTC3000:00", "gettype": "cmd"},
                     {"cmd": "modprobe wb_spi_93xx46 spi_bus_num=0", "gettype": "cmd", "delay": 0.1},
                 ],
                 "finish_cmd": [
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py
index 36d6cbd0f10..975f38ac162 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py
@@ -422,7 +422,7 @@ class threshold:
         {
             "name": "BOARD_TEMP",
             "temp_id": "TEMP1",
-            "api_name": "Board",
+            "api_name": "BOARD_TEMP",
             "Temperature": {
                 "value": {"loc": "/sys/bus/i2c/devices/118-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"},
                 "Min": -10000,
@@ -436,7 +436,7 @@ class threshold:
         {
             "name": "CPU_TEMP",
             "temp_id": "TEMP2",
-            "api_name": "CPU",
+            "api_name": "CPU_TEMP",
             "Temperature": {
                 "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
                 "Min": -15000,
@@ -450,7 +450,7 @@ class threshold:
         {
             "name": "INLET_TEMP",
             "temp_id": "TEMP3",
-            "api_name": "Inlet",
+            "api_name": "INLET_TEMP",
             "Temperature": {
                 "value": [
                     {"loc": "/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_input", "way": "sysfs"},
@@ -466,7 +466,7 @@ class threshold:
         {
             "name": "OUTLET_TEMP",
             "temp_id": "TEMP4",
-            "api_name": "Outlet",
+            "api_name": "OUTLET_TEMP",
             "Temperature": {
                 "value": [
                     {"loc": "/sys/bus/i2c/devices/93-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py
index 49cdda39433..4666fae6ef8 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py
@@ -81,7 +81,7 @@ def __init__(self, default_gap=3):
             "temp2": "OUTLET_2_TEMP",
             "temp3": "OUTLET_1_TEMP",
             "temp4": "ASIC_TEMP",
-            "temp5": "CPU",
+            "temp5": "CPU_TEMP",
             "temp6": "PSU1_TEMP",
             "temp7": "PSU2_TEMP",
             "temp8": "PSU3_TEMP",
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py
index 81a53b11f6f..68961a53f0d 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py
@@ -450,6 +450,7 @@ class threshold:
                 "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
                 "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
             },
+            "PowerMax": 192,
             "Rotor": {
                 "Rotor1_config": {
                     "name": "Rotor1",
@@ -493,6 +494,7 @@ class threshold:
                 "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
                 "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
             },
+            "PowerMax": 192,
             "Rotor": {
                 "Rotor1_config": {
                     "name": "Rotor1",
@@ -536,6 +538,7 @@ class threshold:
                 "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
                 "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
             },
+            "PowerMax": 192,
             "Rotor": {
                 "Rotor1_config": {
                     "name": "Rotor1",
@@ -579,6 +582,7 @@ class threshold:
                 "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
                 "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
             },
+            "PowerMax": 192,
             "Rotor": {
                 "Rotor1_config": {
                     "name": "Rotor1",
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg
index 7bdfdcd9369..daa42e53908 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg
@@ -518,7 +518,7 @@ hwmon_temp.fpath_0x000d_0x00=/sys/bus/i2c/devices/77-004c/hwmon/
 hwmon_temp.addr_0x000d_0x00=0
 hwmon_temp.len_0x000d_0x00=8
 hwmon_temp.bit_offset_0x000d_0x00=
-hwmon_temp.str_cons_0x000d_0x00=temp1_input
+hwmon_temp.str_cons_0x000d_0x00=temp2_input
 
 hwmon_temp.mode_0x000d_0x01=str_constant
 hwmon_temp.str_cons_0x000d_0x01=MAC_Tboard_TEMP_05
@@ -543,7 +543,7 @@ hwmon_temp.fpath_0x000e_0x00=/sys/bus/i2c/devices/78-004c/hwmon/
 hwmon_temp.addr_0x000e_0x00=0
 hwmon_temp.len_0x000e_0x00=8
 hwmon_temp.bit_offset_0x000e_0x00=
-hwmon_temp.str_cons_0x000e_0x00=temp1_input
+hwmon_temp.str_cons_0x000e_0x00=temp2_input
 
 hwmon_temp.mode_0x000e_0x01=str_constant
 hwmon_temp.str_cons_0x000e_0x01=MAC_Tboard_TEMP_06
diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia
index 071535f343c..05abbf60681 160000
--- a/platform/broadcom/sonic-platform-modules-nokia
+++ b/platform/broadcom/sonic-platform-modules-nokia
@@ -1 +1 @@
-Subproject commit 071535f343c5b3c0d34c3797a8878a0d76aa625a
+Subproject commit 05abbf606818fc599286a4adb12affe79288580e
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog b/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog
index f6a51fb4723..9ccb787c7ba 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog
@@ -1,3 +1,13 @@
+sonic-ufispace-platform-modules (1.0.0) unstable; urgency=lows
+  * Add support for S9321-64EO
+
+ -- Ufispace <nonodark.huang@ufispace.com>  Fri, 14 Feb 2025 16:02:23 +0800
+
+sonic-ufispace-platform-modules (1.0.0) unstable; urgency=lows
+  * Add support for S9321-64E
+
+ -- Ufispace <nonodark.huang@ufispace.com>  Fri, 14 Feb 2025 16:01:23 +0800
+
 sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low
 
   * Add support for S9301-32D
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/control b/platform/broadcom/sonic-platform-modules-ufispace/debian/control
index 2c39dd2f485..bd2de335f9d 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/debian/control
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/control
@@ -17,6 +17,14 @@ Package: sonic-platform-ufispace-s9301-32db
 Architecture: amd64
 Description: This package contains s9301-32db platform driver utility for SONiC project.
 
+Package: sonic-platform-ufispace-s9321-64e
+Architecture: amd64
+Description: This package contains s9321-64e platform driver utility for SONiC project.
+
+Package: sonic-platform-ufispace-s9321-64eo
+Architecture: amd64
+Description: This package contains s9321-64eo platform driver utility for SONiC project.
+
 Package: sonic-platform-ufispace-s9110-32x
 Architecture: amd64
 Description: This package contains s9110-32x platform driver utility for SONiC project.
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/rules b/platform/broadcom/sonic-platform-modules-ufispace/debian/rules
index 092bbb5bbc8..1577236adbc 100755
--- a/platform/broadcom/sonic-platform-modules-ufispace/debian/rules
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/rules
@@ -22,6 +22,8 @@ MOD_SRC_DIR:= $(shell pwd)
 MODULE_DIRS := s9300-32d
 MODULE_DIRS += s9301-32d
 MODULE_DIRS += s9301-32db
+MODULE_DIRS += s9321-64e
+MODULE_DIRS += s9321-64eo
 MODULE_DIRS += s9110-32x
 MODULE_DIRS += s8901-54xc
 MODULE_DIRS += s7801-54xs
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64e.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64e.install
new file mode 100644
index 00000000000..13dd1a7dc5c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64e.install
@@ -0,0 +1 @@
+s9321-64e/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9321_64e-r0/pddf
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64e.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64e.postinst
new file mode 100644
index 00000000000..01666039ca2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64e.postinst
@@ -0,0 +1,3 @@
+depmod -a
+systemctl enable pddf-platform-init.service
+systemctl start pddf-platform-init.service
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64e.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64e.prerm
new file mode 100644
index 00000000000..4b887ab38a2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64e.prerm
@@ -0,0 +1,2 @@
+systemctl stop pddf-platform-init.service
+systemctl disable pddf-platform-init.service
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64eo.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64eo.install
new file mode 100644
index 00000000000..ba89b0a7fe5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64eo.install
@@ -0,0 +1 @@
+s9321-64eo/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9321_64eo-r0/pddf
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64eo.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64eo.postinst
new file mode 100644
index 00000000000..01666039ca2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64eo.postinst
@@ -0,0 +1,3 @@
+depmod -a
+systemctl enable pddf-platform-init.service
+systemctl start pddf-platform-init.service
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64eo.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64eo.prerm
new file mode 100644
index 00000000000..4b887ab38a2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9321-64eo.prerm
@@ -0,0 +1,2 @@
+systemctl stop pddf-platform-init.service
+systemctl disable pddf-platform-init.service
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c
index 5858d989af5..06bc0704d7c 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c
@@ -30,53 +30,53 @@
 #include <linux/hwmon-sysfs.h>
 #include <linux/gpio.h>
 
-#define BSP_LOG_R(fmt, args...) \
-    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
-#define BSP_LOG_W(fmt, args...) \
-    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
-
-#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
+#define BSP_LOG_R(fmt, args...)                            \
+    _bsp_log(LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+             __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...)                             \
+    _bsp_log(LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+             __FILE__, __func__, __LINE__, ##args)
+
+#define BSP_PR(level, fmt, args...) _bsp_log(LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
 #define DRIVER_NAME "x86_64_ufispace_s6301_56st_lpc"
 
 /* LPC registers */
 
-#define REG_BASE_CPU                      0x600
-#define REG_BASE_MB                       0x700
-#define REG_BASE_EC                       0xe000
-
-//MB CPLD
-#define REG_MB_BRD_ID_0                   (REG_BASE_MB + 0x00)
-#define REG_MB_BRD_ID_1                   (REG_BASE_MB + 0x01)
-#define REG_MB_CPLD_VERSION               (REG_BASE_MB + 0x02)
-#define REG_MB_CPLD_BUILD                 (REG_BASE_MB + 0x04)
-#define REG_MB_EXTEND_ID                  (REG_BASE_MB + 0x06)
-#define REG_MB_MUX_RESET                  (REG_BASE_MB + 0x43)
-#define REG_MB_FAN_STATUS                 (REG_BASE_MB + 0x55)
-#define REG_MB_PSU_STATUS                 (REG_BASE_MB + 0x59)
-#define REG_MB_PORT_LED_CLR               (REG_BASE_MB + 0x80)
-#define REG_MB_SYS_LED_CTRL_1             (REG_BASE_MB + 0x81)
-#define REG_MB_SYS_LED_STATUS_1           (REG_BASE_MB + 0x82)
-#define REG_MB_SYS_LED_STATUS_2           (REG_BASE_MB + 0x83)
-#define REG_MB_SYS_LED_STATUS_3           (REG_BASE_MB + 0x84)
-#define REG_MB_POWER_EN                   (REG_BASE_MB + 0x95)
-//EC
-#define REG_EC_SEL                        (REG_BASE_EC + 0x394)
-#define REG_EC_PSU_RST                    (REG_BASE_EC + 0x392)
-
-#define MASK_ALL                          (0xFF)
-
-#define MDELAY_LPC                        (5)
-#define MDELAY_RESET_INTERVAL             (100)
-#define MDELAY_RESET_FINISH               (500)
-
-#define MULTIBIT_SET(addr, mask, value) (((addr)&((0xff)^(mask)))|((value)&(mask)))
-
+#define REG_BASE_CPU 0x600
+#define REG_BASE_MB 0x700
+#define REG_BASE_EC 0xe000
+
+// MB CPLD
+#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00)
+#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01)
+#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02)
+#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04)
+#define REG_MB_EXTEND_ID (REG_BASE_MB + 0x06)
+#define REG_MB_MUX_RESET (REG_BASE_MB + 0x43)
+#define REG_MB_FAN_STATUS (REG_BASE_MB + 0x55)
+#define REG_MB_PSU_STATUS (REG_BASE_MB + 0x59)
+#define REG_MB_PORT_LED_CLR (REG_BASE_MB + 0x80)
+#define REG_MB_SYS_LED_CTRL_1 (REG_BASE_MB + 0x81)
+#define REG_MB_SYS_LED_STATUS_1 (REG_BASE_MB + 0x82)
+#define REG_MB_SYS_LED_STATUS_2 (REG_BASE_MB + 0x83)
+#define REG_MB_SYS_LED_STATUS_3 (REG_BASE_MB + 0x84)
+#define REG_MB_POWER_EN (REG_BASE_MB + 0x95)
+// EC
+#define REG_EC_SEL (REG_BASE_EC + 0x394)
+#define REG_EC_PSU_RST (REG_BASE_EC + 0x392)
+
+#define MASK_ALL (0xFF)
+
+#define MDELAY_LPC (5)
+#define MDELAY_RESET_INTERVAL (100)
+#define MDELAY_RESET_FINISH (500)
+
+#define MULTIBIT_SET(addr, mask, value) (((addr) & ((0xff) ^ (mask))) | ((value) & (mask)))
 
 /* LPC sysfs attributes index  */
-enum lpc_sysfs_attributes {
-    //MB CPLD
+enum lpc_sysfs_attributes
+{
+    // MB CPLD
     ATT_MB_BRD_ID_0,
     ATT_MB_BRD_ID_1,
     ATT_MB_CPLD_1_VERSION,
@@ -100,9 +100,10 @@ enum lpc_sysfs_attributes {
     ATT_MB_LED_PWR0,
     ATT_MB_LED_PWR1,
     ATT_MB_POWER_EN,
-    //EC
+    ATT_MB_PORT_BASE_NUM,
+    // EC
     ATT_EC_PSU_RESET,
-    //BSP
+    // BSP
     ATT_BSP_VERSION,
     ATT_BSP_DEBUG,
     ATT_BSP_PR_INFO,
@@ -113,14 +114,16 @@ enum lpc_sysfs_attributes {
     ATT_MAX
 };
 
-enum bases {
+enum bases
+{
     BASE_DEC,
     BASE_HEX,
     BASE_NONE
 
 };
 
-enum bsp_log_types {
+enum bsp_log_types
+{
     LOG_NONE,
     LOG_RW,
     LOG_READ,
@@ -128,35 +131,47 @@ enum bsp_log_types {
     LOG_SYS
 };
 
-enum bsp_log_ctrl {
+enum bsp_log_ctrl
+{
     LOG_DISABLE,
     LOG_ENABLE
 };
 
-struct lpc_data_s {
-    struct mutex    access_lock;
+enum sku_subtype_e
+{
+    SKU_POE = 0,
+    SKU_NPOE_0BASE,
+    SKU_NPOE_1BASE
+};
+
+struct lpc_data_s
+{
+    struct mutex access_lock;
 };
 
 struct lpc_data_s *lpc_data;
 char bsp_version[16];
 char bsp_debug[32];
-char bsp_reg[8]="0x0";
-u8 enable_log_read=LOG_DISABLE;
-u8 enable_log_write=LOG_DISABLE;
-u8 enable_log_sys=LOG_ENABLE;
+char bsp_reg[8] = "0x0";
+u8 enable_log_read = LOG_DISABLE;
+u8 enable_log_write = LOG_DISABLE;
+u8 enable_log_sys = LOG_ENABLE;
 
 /* mask len and shift */
 static void _get_len_shift(u8 mask, u8 *len, u8 *shift)
 {
     int i;
-    bool found=false;
-    *len=0;
-    *shift=0;
-
-    for(i=0; i<8; ++i) {
-        if(mask & 1) {
+    bool found = false;
+    *len = 0;
+    *shift = 0;
+
+    for (i = 0; i < 8; ++i)
+    {
+        if (mask & 1)
+        {
             *len = *len + 1;
-            if(!found) {
+            if (!found)
+            {
                 *shift = i;
                 found = true;
             }
@@ -168,7 +183,7 @@ static void _get_len_shift(u8 mask, u8 *len, u8 *shift)
 /* reg mask and shift */
 static u8 _mask_shift(u8 val, u8 mask)
 {
-    u8 shift=0;
+    u8 shift = 0;
     u8 len;
 
     _get_len_shift(mask, &len, &shift);
@@ -178,7 +193,7 @@ static u8 _mask_shift(u8 val, u8 mask)
 
 static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
 {
-    if(bit_val == 0)
+    if (bit_val == 0)
         reg_val = reg_val & ~(1 << bit);
     else
         reg_val = reg_val | (1 << bit);
@@ -187,9 +202,10 @@ static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
 
 static int _bsp_log(u8 log_type, char *fmt, ...)
 {
-    if((log_type==LOG_READ  && enable_log_read) ||
-        (log_type==LOG_WRITE && enable_log_write) ||
-        (log_type==LOG_SYS && enable_log_sys) ) {
+    if ((log_type == LOG_READ && enable_log_read) ||
+        (log_type == LOG_WRITE && enable_log_write) ||
+        (log_type == LOG_SYS && enable_log_sys))
+    {
         va_list args;
         int r;
 
@@ -198,32 +214,35 @@ static int _bsp_log(u8 log_type, char *fmt, ...)
         va_end(args);
 
         return r;
-    } else {
+    }
+    else
+    {
         return 0;
     }
 }
 
 static int _config_bsp_log(u8 log_type)
 {
-    switch(log_type) {
-        case LOG_NONE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_RW:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        case LOG_READ:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_WRITE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        default:
-            return -EINVAL;
+    switch (log_type)
+    {
+    case LOG_NONE:
+        enable_log_read = LOG_DISABLE;
+        enable_log_write = LOG_DISABLE;
+        break;
+    case LOG_RW:
+        enable_log_read = LOG_ENABLE;
+        enable_log_write = LOG_ENABLE;
+        break;
+    case LOG_READ:
+        enable_log_read = LOG_ENABLE;
+        enable_log_write = LOG_DISABLE;
+        break;
+    case LOG_WRITE:
+        enable_log_read = LOG_DISABLE;
+        enable_log_write = LOG_ENABLE;
+        break;
+    default:
+        return -EINVAL;
     }
     return 0;
 }
@@ -231,7 +250,7 @@ static int _config_bsp_log(u8 log_type)
 /* get lpc register value */
 static u8 _read_lpc_reg(u16 reg, u8 mask)
 {
-    u8 reg_val=0x0, reg_mk_shf_val=0x0;
+    u8 reg_val = 0x0, reg_mk_shf_val = 0x0;
 
     mutex_lock(&lpc_data->access_lock);
     reg_val = inb(reg);
@@ -248,13 +267,16 @@ static u8 _read_lpc_reg(u16 reg, u8 mask)
 static ssize_t read_lpc_reg(u16 reg, u8 mask, u8 base, char *buf)
 {
     u8 reg_val;
-    int len=0;
+    int len = 0;
 
     reg_val = _read_lpc_reg(reg, mask);
-    if(base == BASE_HEX) {
-        len=sprintf(buf, "0x%02x\n", reg_val);
-    } else {
-        len=sprintf(buf,"%d\n", reg_val);
+    if (base == BASE_HEX)
+    {
+        len = sprintf(buf, "0x%02x\n", reg_val);
+    }
+    else
+    {
+        len = sprintf(buf, "%d\n", reg_val);
     }
 
     return len;
@@ -265,19 +287,22 @@ static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
 {
     u8 reg_val, reg_val_now, shift, mask_len;
 
-    if(kstrtou8(buf, 0, &reg_val) < 0)
+    if (kstrtou8(buf, 0, &reg_val) < 0)
         return -EINVAL;
 
     _get_len_shift(mask, &mask_len, &shift);
 
     // set signal bit
-    if(mask_len == 1) {
+    if (mask_len == 1)
+    {
         reg_val_now = _read_lpc_reg(reg, MASK_ALL);
         reg_val = _bit_operation(reg_val_now, shift, reg_val);
-    // set multi bit
-    } else if (mask_len > 1) {
+        // set multi bit
+    }
+    else if (mask_len > 1)
+    {
         reg_val_now = _read_lpc_reg(reg, MASK_ALL);
-        reg_val = MULTIBIT_SET(reg_val_now, mask, reg_val<<shift);
+        reg_val = MULTIBIT_SET(reg_val_now, mask, reg_val << shift);
     }
 
     mutex_lock(&lpc_data->access_lock);
@@ -295,10 +320,10 @@ static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
 /* get bsp value */
 static ssize_t read_bsp(char *buf, char *str)
 {
-    ssize_t len=0;
+    ssize_t len = 0;
 
     mutex_lock(&lpc_data->access_lock);
-    len=sprintf(buf, "%s", str);
+    len = sprintf(buf, "%s", str);
     mutex_unlock(&lpc_data->access_lock);
 
     BSP_LOG_R("reg_val=%s", str);
@@ -320,9 +345,9 @@ static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t coun
 
 /* get mb cpld version in human readable format */
 static ssize_t read_mb_cpld_1_version_h(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                        struct device_attribute *da, char *buf)
 {
-    ssize_t len=0;
+    ssize_t len = 0;
     u16 reg = REG_MB_CPLD_VERSION;
     u8 mask = MASK_ALL;
     u8 mask_major = 0b11000000;
@@ -344,23 +369,25 @@ static ssize_t read_mb_cpld_1_version_h(struct device *dev,
     build = reg_val;
     BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
 
-    len=sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
+    len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
     return len;
 }
 
 /* set mb_mux_reset register value */
 static ssize_t write_mb_mux_reset(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                  struct device_attribute *da, const char *buf, size_t count)
 {
     u8 val = 0;
     u8 reg_val = 0;
     static int mux_reset_flag = 0;
 
-    if(kstrtou8(buf, 0, &val) < 0)
+    if (kstrtou8(buf, 0, &val) < 0)
         return -EINVAL;
 
-    if(mux_reset_flag == 0) {
-        if(val == 0) {
+    if (mux_reset_flag == 0)
+    {
+        if (val == 0)
+        {
             mutex_lock(&lpc_data->access_lock);
             mux_reset_flag = 1;
             printk(KERN_INFO "i2c mux reset is triggered...\n");
@@ -371,10 +398,14 @@ static ssize_t write_mb_mux_reset(struct device *dev,
             mdelay(500);
             mux_reset_flag = 0;
             mutex_unlock(&lpc_data->access_lock);
-        } else {
+        }
+        else
+        {
             return -EINVAL;
         }
-    } else {
+    }
+    else
+    {
         printk(KERN_INFO "i2c mux is resetting... (ignore)\n");
         mutex_lock(&lpc_data->access_lock);
         mutex_unlock(&lpc_data->access_lock);
@@ -385,214 +416,222 @@ static ssize_t write_mb_mux_reset(struct device *dev,
 
 /* get lpc register value */
 static ssize_t read_lpc_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                 struct device_attribute *da, char *buf)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     u16 reg = 0;
     u8 mask = MASK_ALL;
     u8 base = BASE_DEC;
 
-    switch (attr->index) {
-        //MB CPLD
-        case ATT_MB_BRD_ID_0:
-            reg = REG_MB_BRD_ID_0;
-            break;
-        case ATT_MB_BRD_ID_1:
-            reg = REG_MB_BRD_ID_1;
-            break;
-        case ATT_MB_CPLD_1_VERSION:
-            reg = REG_MB_CPLD_VERSION;
-            break;
-        case ATT_MB_BRD_SKU_ID:
-            reg = REG_MB_BRD_ID_0;
-            mask = 0xFF;
-            break;
-        case ATT_MB_BRD_HW_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x3;
-            break;
-        case ATT_MB_BRD_ID_TYPE:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x80;
-            break;
-        case ATT_MB_BRD_BUILD_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x18;
-            break;
-        case ATT_MB_BRD_DEPH_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x4;
-            break;
-        case ATT_MB_BRD_EXT_ID:
-            reg = REG_MB_EXTEND_ID;
-            mask = 0x07;
-            break;
-        case ATT_MB_MUX_RESET:
-            reg = REG_MB_MUX_RESET;
-            mask = 0x07;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_FAN_STATUS:
-            reg = REG_MB_FAN_STATUS;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_PSU_STATUS:
-            reg = REG_MB_PSU_STATUS;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_PORT_LED_CLR:
-            reg = REG_MB_PORT_LED_CLR;
-            mask = 0x1;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_LED_SYS:
-            reg = REG_MB_SYS_LED_CTRL_1;
-            mask = 0xF0;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_LED_ID:
-            reg = REG_MB_SYS_LED_CTRL_1;
-            mask = 0xF;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_LED_POE:
-            reg = REG_MB_SYS_LED_STATUS_1;
-            mask = 0xF0;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_LED_SPD:
-            reg = REG_MB_SYS_LED_STATUS_1;
-            mask = 0xF;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_LED_FAN:
-            reg = REG_MB_SYS_LED_STATUS_2;
-            mask = 0xF0;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_LED_LNK:
-            reg = REG_MB_SYS_LED_STATUS_2;
-            mask = 0xF;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_LED_PWR1:
-            reg = REG_MB_SYS_LED_STATUS_3;
-            mask = 0xF0;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_LED_PWR0:
-            reg = REG_MB_SYS_LED_STATUS_3;
-            mask = 0xF;
-            base = BASE_HEX;
-            break;
-        case ATT_MB_POWER_EN:
-            reg = REG_MB_POWER_EN;
-            base = BASE_HEX;
-            break;
-        //BSP
-        case ATT_BSP_REG_VALUE:
-            if (kstrtou16(bsp_reg, 0, &reg) < 0)
-                return -EINVAL;
-
-            mask = MASK_ALL;
-            break;
-        default:
+    switch (attr->index)
+    {
+    // MB CPLD
+    case ATT_MB_BRD_ID_0:
+        reg = REG_MB_BRD_ID_0;
+        break;
+    case ATT_MB_BRD_ID_1:
+        reg = REG_MB_BRD_ID_1;
+        break;
+    case ATT_MB_CPLD_1_VERSION:
+        reg = REG_MB_CPLD_VERSION;
+        break;
+    case ATT_MB_BRD_SKU_ID:
+        reg = REG_MB_BRD_ID_0;
+        mask = 0xFF;
+        break;
+    case ATT_MB_BRD_HW_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x3;
+        break;
+    case ATT_MB_BRD_ID_TYPE:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x80;
+        break;
+    case ATT_MB_BRD_BUILD_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x18;
+        break;
+    case ATT_MB_BRD_DEPH_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x4;
+        break;
+    case ATT_MB_BRD_EXT_ID:
+        reg = REG_MB_EXTEND_ID;
+        mask = 0x07;
+        break;
+    case ATT_MB_MUX_RESET:
+        reg = REG_MB_MUX_RESET;
+        mask = 0x07;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_FAN_STATUS:
+        reg = REG_MB_FAN_STATUS;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_PSU_STATUS:
+        reg = REG_MB_PSU_STATUS;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_PORT_LED_CLR:
+        reg = REG_MB_PORT_LED_CLR;
+        mask = 0x1;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_LED_SYS:
+        reg = REG_MB_SYS_LED_CTRL_1;
+        mask = 0xF0;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_LED_ID:
+        reg = REG_MB_SYS_LED_CTRL_1;
+        mask = 0xF;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_LED_POE:
+        reg = REG_MB_SYS_LED_STATUS_1;
+        mask = 0xF0;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_LED_SPD:
+        reg = REG_MB_SYS_LED_STATUS_1;
+        mask = 0xF;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_LED_FAN:
+        reg = REG_MB_SYS_LED_STATUS_2;
+        mask = 0xF0;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_LED_LNK:
+        reg = REG_MB_SYS_LED_STATUS_2;
+        mask = 0xF;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_LED_PWR1:
+        reg = REG_MB_SYS_LED_STATUS_3;
+        mask = 0xF0;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_LED_PWR0:
+        reg = REG_MB_SYS_LED_STATUS_3;
+        mask = 0xF;
+        base = BASE_HEX;
+        break;
+    case ATT_MB_POWER_EN:
+        reg = REG_MB_POWER_EN;
+        base = BASE_HEX;
+        break;
+    // BSP
+    case ATT_BSP_REG_VALUE:
+        if (kstrtou16(bsp_reg, 0, &reg) < 0)
             return -EINVAL;
+
+        mask = MASK_ALL;
+        break;
+    default:
+        return -EINVAL;
     }
     return read_lpc_reg(reg, mask, base, buf);
 }
 
 /* set lpc register value */
 static ssize_t write_lpc_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                  struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     u16 reg = 0;
     u8 mask = MASK_ALL;
 
-    switch (attr->index) {
-        case ATT_MB_PORT_LED_CLR:
-            reg = REG_MB_PORT_LED_CLR;
-            mask = 0x1;
-            break;
-        case ATT_MB_LED_SYS:
-            reg = REG_MB_SYS_LED_CTRL_1;
-            mask = 0xF0;
-            break;
-        case ATT_MB_LED_ID:
-            reg = REG_MB_SYS_LED_CTRL_1;
-            mask = 0xF;
-            break;
-        case ATT_MB_POWER_EN:
-            reg = REG_MB_POWER_EN;
-            break;
-        default:
-            return -EINVAL;
+    switch (attr->index)
+    {
+    case ATT_MB_PORT_LED_CLR:
+        reg = REG_MB_PORT_LED_CLR;
+        mask = 0x1;
+        break;
+    case ATT_MB_LED_SYS:
+        reg = REG_MB_SYS_LED_CTRL_1;
+        mask = 0xF0;
+        break;
+    case ATT_MB_LED_ID:
+        reg = REG_MB_SYS_LED_CTRL_1;
+        mask = 0xF;
+        break;
+    case ATT_MB_POWER_EN:
+        reg = REG_MB_POWER_EN;
+        break;
+    default:
+        return -EINVAL;
     }
     return write_lpc_reg(reg, mask, buf, count);
 }
 
 /* get bsp parameter value */
 static ssize_t read_bsp_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                 struct device_attribute *da, char *buf)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
-
-    switch (attr->index) {
-        case ATT_BSP_VERSION:
-            str = bsp_version;
-            str_len = sizeof(bsp_version);
-            break;
-        case ATT_BSP_DEBUG:
-            str = bsp_debug;
-            str_len = sizeof(bsp_debug);
-            break;
-        case ATT_BSP_REG:
-            str = bsp_reg;
-            str_len = sizeof(bsp_reg);
-            break;
-        default:
-            return -EINVAL;
+    int str_len = 0;
+    char *str = NULL;
+
+    switch (attr->index)
+    {
+    case ATT_BSP_VERSION:
+        str = bsp_version;
+        str_len = sizeof(bsp_version);
+        break;
+    case ATT_BSP_DEBUG:
+        str = bsp_debug;
+        str_len = sizeof(bsp_debug);
+        break;
+    case ATT_BSP_REG:
+        str = bsp_reg;
+        str_len = sizeof(bsp_reg);
+        break;
+    default:
+        return -EINVAL;
     }
     return read_bsp(buf, str);
 }
 
 /* set bsp parameter value */
 static ssize_t write_bsp_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                  struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
+    int str_len = 0;
+    char *str = NULL;
     u16 reg = 0;
     u8 bsp_debug_u8 = 0;
 
-    switch (attr->index) {
-        case ATT_BSP_VERSION:
-            str = bsp_version;
-            str_len = sizeof(bsp_version);
-            break;
-        case ATT_BSP_DEBUG:
-            str = bsp_debug;
-            str_len = sizeof(bsp_debug);
-            break;
-        case ATT_BSP_REG:
-            if(kstrtou16(buf, 0, &reg) < 0)
-                return -EINVAL;
-
-            str = bsp_reg;
-            str_len = sizeof(bsp_reg);
-            break;
-        default:
+    switch (attr->index)
+    {
+    case ATT_BSP_VERSION:
+        str = bsp_version;
+        str_len = sizeof(bsp_version);
+        break;
+    case ATT_BSP_DEBUG:
+        str = bsp_debug;
+        str_len = sizeof(bsp_debug);
+        break;
+    case ATT_BSP_REG:
+        if (kstrtou16(buf, 0, &reg) < 0)
             return -EINVAL;
+
+        str = bsp_reg;
+        str_len = sizeof(bsp_reg);
+        break;
+    default:
+        return -EINVAL;
     }
 
-    if(attr->index == ATT_BSP_DEBUG) {
-        if(kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+    if (attr->index == ATT_BSP_DEBUG)
+    {
+        if (kstrtou8(buf, 0, &bsp_debug_u8) < 0)
+        {
             return -EINVAL;
-        } else if (_config_bsp_log(bsp_debug_u8) < 0) {
+        }
+        else if (_config_bsp_log(bsp_debug_u8) < 0)
+        {
             return -EINVAL;
         }
     }
@@ -601,23 +640,24 @@ static ssize_t write_bsp_callback(struct device *dev,
 }
 
 static ssize_t write_bsp_pr_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                     struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     int str_len = strlen(buf);
 
-    if(str_len <= 0)
+    if (str_len <= 0)
         return str_len;
 
-    switch (attr->index) {
-        case ATT_BSP_PR_INFO:
-            BSP_PR(KERN_INFO, "%s", buf);
-            break;
-        case ATT_BSP_PR_ERR:
-            BSP_PR(KERN_ERR, "%s", buf);
-            break;
-        default:
-            return -EINVAL;
+    switch (attr->index)
+    {
+    case ATT_BSP_PR_INFO:
+        BSP_PR(KERN_INFO, "%s", buf);
+        break;
+    case ATT_BSP_PR_ERR:
+        BSP_PR(KERN_ERR, "%s", buf);
+        break;
+    default:
+        return -EINVAL;
     }
 
     return str_len;
@@ -625,20 +665,21 @@ static ssize_t write_bsp_pr_callback(struct device *dev,
 
 /* get gpio max value */
 static ssize_t read_gpio_max_callback(struct device *dev,
-                    struct device_attribute *da,
-                    char *buf)
+                                      struct device_attribute *da,
+                                      char *buf)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
 
-    if (attr->index == ATT_BSP_GPIO_MAX) {
-        return sprintf(buf, "%d\n", ARCH_NR_GPIOS-1);
+    if (attr->index == ATT_BSP_GPIO_MAX)
+    {
+        return sprintf(buf, "%d\n", ARCH_NR_GPIOS - 1);
     }
     return -1;
 }
 
 /* set psu_reset register value */
 static ssize_t write_ec_psu_reset(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                  struct device_attribute *da, const char *buf, size_t count)
 {
     u8 val = 0;
     u8 reg_val = 0;
@@ -647,8 +688,10 @@ static ssize_t write_ec_psu_reset(struct device *dev,
     if (kstrtou8(buf, 0, &val) < 0)
         return -EINVAL;
 
-    if (psu_reset_flag == 0) {
-        if (val == 0) {
+    if (psu_reset_flag == 0)
+    {
+        if (val == 0)
+        {
             mutex_lock(&lpc_data->access_lock);
             psu_reset_flag = 1;
             reg_val = 0x1;
@@ -659,10 +702,14 @@ static ssize_t write_ec_psu_reset(struct device *dev,
             BSP_LOG_W("reg=0x%04x, reg_val=0x%02x", REG_EC_PSU_RST, reg_val);
             psu_reset_flag = 0;
             mutex_unlock(&lpc_data->access_lock);
-        } else {
+        }
+        else
+        {
             return -EINVAL;
         }
-    } else {
+    }
+    else
+    {
         printk(KERN_INFO "PSU is resetting... (ignore)\n");
         mutex_lock(&lpc_data->access_lock);
         mutex_unlock(&lpc_data->access_lock);
@@ -671,41 +718,62 @@ static ssize_t write_ec_psu_reset(struct device *dev,
     return count;
 }
 
-//SENSOR_DEVICE_ATTR - MB
-static SENSOR_DEVICE_ATTR(board_id_0,        S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
-static SENSOR_DEVICE_ATTR(board_id_1,        S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
-static SENSOR_DEVICE_ATTR(mb_cpld_1_version,   S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
-static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H);
-static SENSOR_DEVICE_ATTR(board_sku_id,      S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
-static SENSOR_DEVICE_ATTR(board_hw_id,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
-static SENSOR_DEVICE_ATTR(board_id_type,     S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
-static SENSOR_DEVICE_ATTR(board_build_id,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
-static SENSOR_DEVICE_ATTR(board_deph_id,     S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
-static SENSOR_DEVICE_ATTR(board_ext_id,      S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_EXT_ID);
-static SENSOR_DEVICE_ATTR(mux_reset,         S_IRUGO | S_IWUSR, read_lpc_callback, write_mb_mux_reset, ATT_MB_MUX_RESET);
-static SENSOR_DEVICE_ATTR(fan_status,        S_IRUGO, read_lpc_callback, NULL, ATT_MB_FAN_STATUS);
-static SENSOR_DEVICE_ATTR(psu_status,        S_IRUGO, read_lpc_callback, NULL, ATT_MB_PSU_STATUS);
-static SENSOR_DEVICE_ATTR(port_led_clear,    S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_PORT_LED_CLR);
-static SENSOR_DEVICE_ATTR(led_sys,           S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_LED_SYS);
-static SENSOR_DEVICE_ATTR(led_id,            S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_LED_ID);
-static SENSOR_DEVICE_ATTR(led_poe,           S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_POE);
-static SENSOR_DEVICE_ATTR(led_spd,           S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_SPD);
-static SENSOR_DEVICE_ATTR(led_fan,           S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_FAN);
-static SENSOR_DEVICE_ATTR(led_lnk,           S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_LNK);
-static SENSOR_DEVICE_ATTR(led_pwr1,          S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR1);
-static SENSOR_DEVICE_ATTR(led_pwr0,          S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR0);
-static SENSOR_DEVICE_ATTR(power_en,          S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_POWER_EN);
-//SENSOR_DEVICE_ATTR - EC
-static SENSOR_DEVICE_ATTR(psu_reset,         S_IRUGO | S_IWUSR, NULL, write_ec_psu_reset, ATT_EC_PSU_RESET);
-//SENSOR_DEVICE_ATTR - BSP
-static SENSOR_DEVICE_ATTR(bsp_version , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback,       ATT_BSP_VERSION);
-static SENSOR_DEVICE_ATTR(bsp_debug   , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback,       ATT_BSP_DEBUG);
-static SENSOR_DEVICE_ATTR(bsp_pr_info , S_IWUSR          , NULL             , write_bsp_pr_callback,    ATT_BSP_PR_INFO);
-static SENSOR_DEVICE_ATTR(bsp_pr_err  , S_IWUSR          , NULL             , write_bsp_pr_callback,    ATT_BSP_PR_ERR);
-static SENSOR_DEVICE_ATTR(bsp_reg     , S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback,       ATT_BSP_REG);
-static SENSOR_DEVICE_ATTR(bsp_reg_value, S_IRUGO         , read_lpc_callback, NULL,                     ATT_BSP_REG_VALUE);
-static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO          , read_gpio_max_callback, NULL,                ATT_BSP_GPIO_MAX);
+/* get port base num */
+static ssize_t read_port_base_num(struct device *dev,
+                                  struct device_attribute *da,
+                                  char *buf)
+{
+    u16 reg = REG_MB_EXTEND_ID, ext_id = 0, base_num = 0;
+    u8 mask = 0x07;
 
+    ext_id = _read_lpc_reg(reg, mask);
+    if (ext_id == SKU_NPOE_1BASE)
+    {
+        base_num = 1;
+    }
+    else
+    {
+        base_num = 0;
+    }
+
+    return sprintf(buf, "%d\n", base_num);
+}
+
+// SENSOR_DEVICE_ATTR - MB
+static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
+static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H);
+static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
+static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
+static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
+static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
+static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
+static SENSOR_DEVICE_ATTR(board_ext_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_EXT_ID);
+static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_lpc_callback, write_mb_mux_reset, ATT_MB_MUX_RESET);
+static SENSOR_DEVICE_ATTR(fan_status, S_IRUGO, read_lpc_callback, NULL, ATT_MB_FAN_STATUS);
+static SENSOR_DEVICE_ATTR(psu_status, S_IRUGO, read_lpc_callback, NULL, ATT_MB_PSU_STATUS);
+static SENSOR_DEVICE_ATTR(port_led_clear, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_PORT_LED_CLR);
+static SENSOR_DEVICE_ATTR(led_sys, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_LED_SYS);
+static SENSOR_DEVICE_ATTR(led_id, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_LED_ID);
+static SENSOR_DEVICE_ATTR(led_poe, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_POE);
+static SENSOR_DEVICE_ATTR(led_spd, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_SPD);
+static SENSOR_DEVICE_ATTR(led_fan, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_FAN);
+static SENSOR_DEVICE_ATTR(led_lnk, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_LNK);
+static SENSOR_DEVICE_ATTR(led_pwr1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR1);
+static SENSOR_DEVICE_ATTR(led_pwr0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR0);
+static SENSOR_DEVICE_ATTR(power_en, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_POWER_EN);
+static SENSOR_DEVICE_ATTR(port_base_num, S_IRUGO, read_port_base_num, NULL, ATT_MB_PORT_BASE_NUM);
+// SENSOR_DEVICE_ATTR - EC
+static SENSOR_DEVICE_ATTR(psu_reset, S_IRUGO | S_IWUSR, NULL, write_ec_psu_reset, ATT_EC_PSU_RESET);
+// SENSOR_DEVICE_ATTR - BSP
+static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
+static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
+static SENSOR_DEVICE_ATTR(bsp_pr_info, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO);
+static SENSOR_DEVICE_ATTR(bsp_pr_err, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR);
+static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
+static SENSOR_DEVICE_ATTR(bsp_reg_value, S_IRUGO, read_lpc_callback, NULL, ATT_BSP_REG_VALUE);
+static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO, read_gpio_max_callback, NULL, ATT_BSP_GPIO_MAX);
 
 static struct attribute *mb_cpld_attrs[] = {
     &sensor_dev_attr_board_id_0.dev_attr.attr,
@@ -731,6 +799,7 @@ static struct attribute *mb_cpld_attrs[] = {
     &sensor_dev_attr_led_pwr0.dev_attr.attr,
     &sensor_dev_attr_led_pwr1.dev_attr.attr,
     &sensor_dev_attr_power_en.dev_attr.attr,
+    &sensor_dev_attr_port_base_num.dev_attr.attr,
     NULL,
 };
 
@@ -765,18 +834,17 @@ static struct attribute_group bsp_attr_grp = {
     .attrs = bsp_attrs,
 };
 
-static void lpc_dev_release( struct device * dev)
+static void lpc_dev_release(struct device *dev)
 {
     return;
 }
 
 static struct platform_device lpc_dev = {
-    .name           = DRIVER_NAME,
-    .id             = -1,
+    .name = DRIVER_NAME,
+    .id = -1,
     .dev = {
-                    .release = lpc_dev_release,
-    }
-};
+        .release = lpc_dev_release,
+    }};
 
 static int lpc_drv_probe(struct platform_device *pdev)
 {
@@ -785,32 +853,37 @@ static int lpc_drv_probe(struct platform_device *pdev)
     struct attribute_group *grp;
 
     lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s),
-                    GFP_KERNEL);
-    if(!lpc_data)
+                            GFP_KERNEL);
+    if (!lpc_data)
         return -ENOMEM;
 
     mutex_init(&lpc_data->access_lock);
 
-    for (i=0; i<grp_num; ++i) {
-        switch (i) {
-            case 0:
-                grp = &mb_cpld_attr_grp;
-                break;
-            case 1:
-                grp = &ec_attr_grp;
-                break;
-            case 2:
-                grp = &bsp_attr_grp;
-                break;
-            default:
-                break;
+    for (i = 0; i < grp_num; ++i)
+    {
+        switch (i)
+        {
+        case 0:
+            grp = &mb_cpld_attr_grp;
+            break;
+        case 1:
+            grp = &ec_attr_grp;
+            break;
+        case 2:
+            grp = &bsp_attr_grp;
+            break;
+        default:
+            break;
         }
 
         err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
-        if(err[i]) {
+        if (err[i])
+        {
             printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
             goto exit;
-        } else {
+        }
+        else
+        {
             continue;
         }
     }
@@ -818,27 +891,32 @@ static int lpc_drv_probe(struct platform_device *pdev)
     return 0;
 
 exit:
-    for (i=0; i<grp_num; ++i) {
-        switch (i) {
-            case 0:
-                grp = &mb_cpld_attr_grp;
-                break;
-            case 1:
-                grp = &ec_attr_grp;
-                break;
-            case 2:
-                grp = &bsp_attr_grp;
-                break;
-            default:
-                break;
+    for (i = 0; i < grp_num; ++i)
+    {
+        switch (i)
+        {
+        case 0:
+            grp = &mb_cpld_attr_grp;
+            break;
+        case 1:
+            grp = &ec_attr_grp;
+            break;
+        case 2:
+            grp = &bsp_attr_grp;
+            break;
+        default:
+            break;
         }
 
         sysfs_remove_group(&pdev->dev.kobj, grp);
-        if(!err[i]) {
-            //remove previous successful cases
+        if (!err[i])
+        {
+            // remove previous successful cases
             continue;
-        } else {
-            //remove first failed case, then return
+        }
+        else
+        {
+            // remove first failed case, then return
             return err[i];
         }
     }
@@ -855,10 +933,10 @@ static int lpc_drv_remove(struct platform_device *pdev)
 }
 
 static struct platform_driver lpc_drv = {
-    .probe  = lpc_drv_probe,
+    .probe = lpc_drv_probe,
     .remove = __exit_p(lpc_drv_remove),
     .driver = {
-    .name   = DRIVER_NAME,
+        .name = DRIVER_NAME,
     },
 };
 
@@ -867,17 +945,19 @@ int lpc_init(void)
     int err = 0;
 
     err = platform_driver_register(&lpc_drv);
-    if(err) {
+    if (err)
+    {
         printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
-                __func__, __LINE__, err);
+               __func__, __LINE__, err);
 
         return err;
     }
 
     err = platform_device_register(&lpc_dev);
-    if(err) {
+    if (err)
+    {
         printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
-                __func__, __LINE__, err);
+               __func__, __LINE__, err);
         platform_driver_unregister(&lpc_drv);
         return err;
     }
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c
index d227f631748..8ab4fe4ee31 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c
@@ -26,15 +26,16 @@
 #include <linux/io.h>
 #include <linux/platform_device.h>
 #include <linux/hwmon-sysfs.h>
+#include <linux/gpio.h>
 
-#define BSP_LOG_R(fmt, args...) \
-    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
-#define BSP_LOG_W(fmt, args...) \
-    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_R(fmt, args...)                            \
+    _bsp_log(LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+             __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...)                             \
+    _bsp_log(LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+             __FILE__, __func__, __LINE__, ##args)
 
-#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
+#define BSP_PR(level, fmt, args...) _bsp_log(LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
 
 #define DRIVER_NAME "x86_64_ufispace_s9300_32d_lpc"
 #define CPU_BDE 0
@@ -43,53 +44,54 @@
 
 /* LPC registers */
 
-#define REG_BASE_CPU                      0x600
+#define REG_BASE_CPU 0x600
 
 #if CPU_TYPE == CPU_SKY
-#define REG_BASE_MB                       0xE00
-#define REG_BASE_I2C_ALERT                0x700
+#define REG_BASE_MB 0xE00
+#define REG_BASE_I2C_ALERT 0x700
 #else
-#define REG_BASE_MB                       0x700
-#define REG_BASE_I2C_ALERT                0xF000
+#define REG_BASE_MB 0x700
+#define REG_BASE_I2C_ALERT 0xF000
 #endif
 
-//CPU CPLD
-#define REG_CPU_CPLD_VERSION              (REG_BASE_CPU + 0x00)
-#define REG_CPU_STATUS_0                  (REG_BASE_CPU + 0x01)
-#define REG_CPU_STATUS_1                  (REG_BASE_CPU + 0x02)
-#define REG_CPU_CTRL_0                    (REG_BASE_CPU + 0x03)
-#define REG_CPU_CTRL_1                    (REG_BASE_CPU + 0x04)
-#define REG_CPU_CPLD_BUILD                (REG_BASE_CPU + 0xE0)
-
-//MB CPLD
-//TBD, need to change after CPLD spec release
-#define REG_MB_BRD_ID_0                   (REG_BASE_MB + 0x00)
-#define REG_MB_BRD_ID_1                   (REG_BASE_MB + 0x01)
-#define REG_MB_CPLD_VERSION               (REG_BASE_MB + 0x02)
-#define REG_MB_CPLD_BUILD                 (REG_BASE_MB + 0x04)
-#define REG_MB_MUX_RESET                  (REG_BASE_MB + 0x46)
-#define REG_MB_MUX_CTRL                   (REG_BASE_MB + 0x5c)
-
-//I2C Alert
+// CPU CPLD
+#define REG_CPU_CPLD_VERSION (REG_BASE_CPU + 0x00)
+#define REG_CPU_STATUS_0 (REG_BASE_CPU + 0x01)
+#define REG_CPU_STATUS_1 (REG_BASE_CPU + 0x02)
+#define REG_CPU_CTRL_0 (REG_BASE_CPU + 0x03)
+#define REG_CPU_CTRL_1 (REG_BASE_CPU + 0x04)
+#define REG_CPU_CPLD_BUILD (REG_BASE_CPU + 0xE0)
+
+// MB CPLD
+// TBD, need to change after CPLD spec release
+#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00)
+#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01)
+#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02)
+#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04)
+#define REG_MB_MUX_RESET (REG_BASE_MB + 0x46)
+#define REG_MB_MUX_CTRL (REG_BASE_MB + 0x5c)
+
+// I2C Alert
 #if CPU_TYPE == CPU_SKY
-#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x80)
+#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x80)
 #else
-#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x00)
-#define REG_ALERT_DISABLE                 (REG_BASE_I2C_ALERT + 0x11)
+#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x00)
+#define REG_ALERT_DISABLE (REG_BASE_I2C_ALERT + 0x11)
 #endif
 
-#define MASK_ALL                          (0xFF)
-#define LPC_MDELAY                        (5)
+#define MASK_ALL (0xFF)
+#define LPC_MDELAY (5)
 
 /* LPC sysfs attributes index  */
-enum lpc_sysfs_attributes {
-    //CPU CPLD
+enum lpc_sysfs_attributes
+{
+    // CPU CPLD
     ATT_CPU_CPLD_VERSION,
     ATT_CPU_CPLD_VERSION_H,
     ATT_CPU_BIOS_BOOT_ROM,
     ATT_CPU_BIOS_BOOT_CFG,
     ATT_CPU_CPLD_BUILD,
-    //MB CPLD
+    // MB CPLD
     ATT_MB_BRD_ID_0,
     ATT_MB_BRD_ID_1,
     ATT_MB_CPLD_1_VERSION,
@@ -102,21 +104,23 @@ enum lpc_sysfs_attributes {
     ATT_MB_BRD_ID_TYPE,
     ATT_MB_BRD_BUILD_ID,
     ATT_MB_BRD_DEPH_ID,
-    //I2C Alert
+    // I2C Alert
     ATT_ALERT_STATUS,
 #if CPU_TYPE == CPU_BDE
     ATT_ALERT_DISABLE,
 #endif
-    //BSP
+    // BSP
     ATT_BSP_VERSION,
     ATT_BSP_DEBUG,
     ATT_BSP_PR_INFO,
     ATT_BSP_PR_ERR,
     ATT_BSP_REG,
+    ATT_BSP_GPIO_MAX,
     ATT_MAX
 };
 
-enum bsp_log_types {
+enum bsp_log_types
+{
     LOG_NONE,
     LOG_RW,
     LOG_READ,
@@ -124,29 +128,32 @@ enum bsp_log_types {
     LOG_SYS
 };
 
-enum bsp_log_ctrl {
+enum bsp_log_ctrl
+{
     LOG_DISABLE,
     LOG_ENABLE
 };
 
-struct lpc_data_s {
-    struct mutex    access_lock;
+struct lpc_data_s
+{
+    struct mutex access_lock;
 };
 
 struct lpc_data_s *lpc_data;
-char bsp_version[16]="";
-char bsp_debug[2]="0";
-char bsp_reg[8]="0x0";
-u8 enable_log_read=LOG_DISABLE;
-u8 enable_log_write=LOG_DISABLE;
-u8 enable_log_sys=LOG_ENABLE;
+char bsp_version[16] = "";
+char bsp_debug[2] = "0";
+char bsp_reg[8] = "0x0";
+u8 enable_log_read = LOG_DISABLE;
+u8 enable_log_write = LOG_DISABLE;
+u8 enable_log_sys = LOG_ENABLE;
 
 /* reg shift */
 static u8 _shift(u8 mask)
 {
-    int i=0, mask_one=1;
+    int i = 0, mask_one = 1;
 
-    for(i=0; i<8; ++i) {
+    for (i = 0; i < 8; ++i)
+    {
         if ((mask & mask_one) == 1)
             return i;
         else
@@ -159,7 +166,7 @@ static u8 _shift(u8 mask)
 /* reg mask and shift */
 static u8 _mask_shift(u8 val, u8 mask)
 {
-    int shift=0;
+    int shift = 0;
 
     shift = _shift(mask);
 
@@ -177,9 +184,10 @@ static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
 
 static int _bsp_log(u8 log_type, char *fmt, ...)
 {
-    if ((log_type==LOG_READ  && enable_log_read) ||
-        (log_type==LOG_WRITE && enable_log_write) ||
-        (log_type==LOG_SYS && enable_log_sys) ) {
+    if ((log_type == LOG_READ && enable_log_read) ||
+        (log_type == LOG_WRITE && enable_log_write) ||
+        (log_type == LOG_SYS && enable_log_sys))
+    {
         va_list args;
         int r;
 
@@ -188,32 +196,35 @@ static int _bsp_log(u8 log_type, char *fmt, ...)
         va_end(args);
 
         return r;
-    } else {
+    }
+    else
+    {
         return 0;
     }
 }
 
 static int _config_bsp_log(u8 log_type)
 {
-    switch(log_type) {
-        case LOG_NONE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_RW:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        case LOG_READ:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_WRITE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        default:
-            return -EINVAL;
+    switch (log_type)
+    {
+    case LOG_NONE:
+        enable_log_read = LOG_DISABLE;
+        enable_log_write = LOG_DISABLE;
+        break;
+    case LOG_RW:
+        enable_log_read = LOG_ENABLE;
+        enable_log_write = LOG_ENABLE;
+        break;
+    case LOG_READ:
+        enable_log_read = LOG_ENABLE;
+        enable_log_write = LOG_DISABLE;
+        break;
+    case LOG_WRITE:
+        enable_log_read = LOG_DISABLE;
+        enable_log_write = LOG_ENABLE;
+        break;
+    default:
+        return -EINVAL;
     }
     return 0;
 }
@@ -224,7 +235,7 @@ static u8 _read_lpc_reg(u16 reg, u8 mask)
     u8 reg_val;
 
     mutex_lock(&lpc_data->access_lock);
-    reg_val=_mask_shift(inb(reg), mask);
+    reg_val = _mask_shift(inb(reg), mask);
     mutex_unlock(&lpc_data->access_lock);
 
     BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
@@ -236,10 +247,10 @@ static u8 _read_lpc_reg(u16 reg, u8 mask)
 static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf)
 {
     u8 reg_val;
-    int len=0;
+    int len = 0;
 
     reg_val = _read_lpc_reg(reg, mask);
-    len=sprintf(buf,"0x%x\n", reg_val);
+    len = sprintf(buf, "0x%x\n", reg_val);
 
     return len;
 }
@@ -252,8 +263,9 @@ static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
     if (kstrtou8(buf, 0, &reg_val) < 0)
         return -EINVAL;
 
-    //apply SINGLE BIT operation if mask is specified, multiple bits are not supported
-    if (mask != MASK_ALL) {
+    // apply SINGLE BIT operation if mask is specified, multiple bits are not supported
+    if (mask != MASK_ALL)
+    {
         reg_val_now = _read_lpc_reg(reg, 0x0);
         shift = _shift(mask);
         reg_val = _bit_operation(reg_val_now, shift, reg_val);
@@ -274,10 +286,10 @@ static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
 /* get bsp value */
 static ssize_t read_bsp(char *buf, char *str)
 {
-    ssize_t len=0;
+    ssize_t len = 0;
 
     mutex_lock(&lpc_data->access_lock);
-    len=sprintf(buf, "%s", str);
+    len = sprintf(buf, "%s", str);
     mutex_unlock(&lpc_data->access_lock);
 
     BSP_LOG_R("reg_val=%s", str);
@@ -299,9 +311,9 @@ static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t coun
 
 /* get cpu cpld version in human readable format */
 static ssize_t read_cpu_cpld_version_h(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                       struct device_attribute *da, char *buf)
 {
-    ssize_t len=0;
+    ssize_t len = 0;
     u16 reg = REG_CPU_CPLD_VERSION;
     u8 mask = MASK_ALL;
     u8 mask_major = 0b11000000;
@@ -325,9 +337,9 @@ static ssize_t read_cpu_cpld_version_h(struct device *dev,
 
 /* get mb cpld version in human readable format */
 static ssize_t read_mb_cpld_1_version_h(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                        struct device_attribute *da, char *buf)
 {
-    ssize_t len=0;
+    ssize_t len = 0;
     u16 reg = REG_MB_CPLD_VERSION;
     u8 mask = MASK_ALL;
     u8 mask_major = 0b11000000;
@@ -351,7 +363,7 @@ static ssize_t read_mb_cpld_1_version_h(struct device *dev,
 
 /* get mux_reset register value */
 static ssize_t read_mux_reset_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                       struct device_attribute *da, char *buf)
 {
     int len = 0;
     u16 reg = REG_MB_MUX_RESET;
@@ -359,9 +371,9 @@ static ssize_t read_mux_reset_callback(struct device *dev,
     u8 reg_val;
 
     mutex_lock(&lpc_data->access_lock);
-    reg_val=_mask_shift(inb(reg), mask);
+    reg_val = _mask_shift(inb(reg), mask);
     BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
-    len=sprintf(buf, "%d\n", reg_val);
+    len = sprintf(buf, "%d\n", reg_val);
     mutex_unlock(&lpc_data->access_lock);
 
     return len;
@@ -369,7 +381,7 @@ static ssize_t read_mux_reset_callback(struct device *dev,
 
 /* set mux_reset register value */
 static ssize_t write_mux_reset_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                        struct device_attribute *da, const char *buf, size_t count)
 {
     u8 val = 0;
     u16 reg = REG_MB_MUX_RESET;
@@ -380,8 +392,10 @@ static ssize_t write_mux_reset_callback(struct device *dev,
     if (kstrtou8(buf, 0, &val) < 0)
         return -EINVAL;
 
-    if (mux_reset_flag == 0) {
-        if (val == 0) {
+    if (mux_reset_flag == 0)
+    {
+        if (val == 0)
+        {
             mutex_lock(&lpc_data->access_lock);
             mux_reset_flag = 1;
             BSP_LOG_W("i2c mux reset is triggered...");
@@ -397,10 +411,14 @@ static ssize_t write_mux_reset_callback(struct device *dev,
             mdelay(500);
             mux_reset_flag = 0;
             mutex_unlock(&lpc_data->access_lock);
-        } else {
+        }
+        else
+        {
             return -EINVAL;
         }
-    } else {
+    }
+    else
+    {
         BSP_LOG_W("i2c mux is resetting... (ignore)");
         mutex_lock(&lpc_data->access_lock);
         mutex_unlock(&lpc_data->access_lock);
@@ -411,165 +429,173 @@ static ssize_t write_mux_reset_callback(struct device *dev,
 
 /* get lpc register value */
 static ssize_t read_lpc_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                 struct device_attribute *da, char *buf)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     u16 reg = 0;
     u8 mask = MASK_ALL;
 
-    switch (attr->index) {
-        //CPU CPLD
-        case ATT_CPU_CPLD_VERSION:
-            reg = REG_CPU_CPLD_VERSION;
-            break;
-        case ATT_CPU_BIOS_BOOT_ROM:
-            reg = REG_CPU_STATUS_1;
-            mask = 0x80;
-            break;
-        case ATT_CPU_BIOS_BOOT_CFG:
-            reg = REG_CPU_CTRL_1;
-            mask = 0x80;
-            break;
-        case ATT_CPU_CPLD_BUILD:
-            reg = REG_CPU_CPLD_BUILD;
-            break;
-        //MB CPLD
-        case ATT_MB_BRD_ID_0:
-            reg = REG_MB_BRD_ID_0;
-            break;
-        case ATT_MB_BRD_ID_1:
-            reg = REG_MB_BRD_ID_1;
-            break;
-        case ATT_MB_CPLD_1_VERSION:
-            reg = REG_MB_CPLD_VERSION;
-            break;
-        case ATT_MB_CPLD_1_BUILD:
-            reg = REG_MB_CPLD_BUILD;
-            break;
-        case ATT_MB_BRD_SKU_ID:
-            reg = REG_MB_BRD_ID_0;
-            mask = 0xFF;
-            break;
-        case ATT_MB_BRD_HW_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x03;
-            break;
-        case ATT_MB_BRD_ID_TYPE:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x80;
-            break;
-        case ATT_MB_BRD_BUILD_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x38;
-            break;
-        case ATT_MB_BRD_DEPH_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x04;
-            break;
-        case ATT_MB_MUX_CTRL:
-            reg = REG_MB_MUX_CTRL;
-            break;
-        //I2C Alert
-        case ATT_ALERT_STATUS:
-            reg = REG_ALERT_STATUS;
-            mask = 0x20;
-            break;
+    switch (attr->index)
+    {
+    // CPU CPLD
+    case ATT_CPU_CPLD_VERSION:
+        reg = REG_CPU_CPLD_VERSION;
+        break;
+    case ATT_CPU_BIOS_BOOT_ROM:
+        reg = REG_CPU_STATUS_1;
+        mask = 0x80;
+        break;
+    case ATT_CPU_BIOS_BOOT_CFG:
+        reg = REG_CPU_CTRL_1;
+        mask = 0x80;
+        break;
+    case ATT_CPU_CPLD_BUILD:
+        reg = REG_CPU_CPLD_BUILD;
+        break;
+    // MB CPLD
+    case ATT_MB_BRD_ID_0:
+        reg = REG_MB_BRD_ID_0;
+        break;
+    case ATT_MB_BRD_ID_1:
+        reg = REG_MB_BRD_ID_1;
+        break;
+    case ATT_MB_CPLD_1_VERSION:
+        reg = REG_MB_CPLD_VERSION;
+        break;
+    case ATT_MB_CPLD_1_BUILD:
+        reg = REG_MB_CPLD_BUILD;
+        break;
+    case ATT_MB_BRD_SKU_ID:
+        reg = REG_MB_BRD_ID_0;
+        mask = 0xFF;
+        break;
+    case ATT_MB_BRD_HW_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x03;
+        break;
+    case ATT_MB_BRD_ID_TYPE:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x80;
+        break;
+    case ATT_MB_BRD_BUILD_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x38;
+        break;
+    case ATT_MB_BRD_DEPH_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x04;
+        break;
+    case ATT_MB_MUX_CTRL:
+        reg = REG_MB_MUX_CTRL;
+        break;
+    // I2C Alert
+    case ATT_ALERT_STATUS:
+        reg = REG_ALERT_STATUS;
+        mask = 0x20;
+        break;
 #if CPU_TYPE == CPU_BDE
-        case ATT_ALERT_DISABLE:
-            reg = REG_ALERT_DISABLE;
-            mask = 0x04;
-            break;
+    case ATT_ALERT_DISABLE:
+        reg = REG_ALERT_DISABLE;
+        mask = 0x04;
+        break;
 #endif
-        //BSP
-        case ATT_BSP_REG:
-            if (kstrtou16(bsp_reg, 0, &reg) < 0)
-                return -EINVAL;
-            break;
-        default:
+    // BSP
+    case ATT_BSP_REG:
+        if (kstrtou16(bsp_reg, 0, &reg) < 0)
             return -EINVAL;
+        break;
+    default:
+        return -EINVAL;
     }
     return read_lpc_reg(reg, mask, buf);
 }
 
 /* set lpc register value */
 static ssize_t write_lpc_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                  struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     u16 reg = 0;
     u8 mask = MASK_ALL;
 
-    switch (attr->index) {
-        case ATT_MB_MUX_CTRL:
-            reg = REG_MB_MUX_CTRL;
-            break;
-        default:
-            return -EINVAL;
+    switch (attr->index)
+    {
+    case ATT_MB_MUX_CTRL:
+        reg = REG_MB_MUX_CTRL;
+        break;
+    default:
+        return -EINVAL;
     }
     return write_lpc_reg(reg, mask, buf, count);
 }
 
 /* get bsp parameter value */
 static ssize_t read_bsp_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                 struct device_attribute *da, char *buf)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
-
-    switch (attr->index) {
-        case ATT_BSP_VERSION:
-            str = bsp_version;
-            str_len = sizeof(bsp_version);
-            break;
-        case ATT_BSP_DEBUG:
-            str = bsp_debug;
-            str_len = sizeof(bsp_debug);
-            break;
-        case ATT_BSP_REG:
-            str = bsp_reg;
-            str_len = sizeof(bsp_reg);
-            break;
-        default:
-            return -EINVAL;
+    int str_len = 0;
+    char *str = NULL;
+
+    switch (attr->index)
+    {
+    case ATT_BSP_VERSION:
+        str = bsp_version;
+        str_len = sizeof(bsp_version);
+        break;
+    case ATT_BSP_DEBUG:
+        str = bsp_debug;
+        str_len = sizeof(bsp_debug);
+        break;
+    case ATT_BSP_REG:
+        str = bsp_reg;
+        str_len = sizeof(bsp_reg);
+        break;
+    default:
+        return -EINVAL;
     }
     return read_bsp(buf, str);
 }
 
 /* set bsp parameter value */
 static ssize_t write_bsp_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                  struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
+    int str_len = 0;
+    char *str = NULL;
     u16 reg = 0;
     u8 bsp_debug_u8 = 0;
 
-    switch (attr->index) {
-        case ATT_BSP_VERSION:
-            str = bsp_version;
-            str_len = sizeof(bsp_version);
-            break;
-        case ATT_BSP_DEBUG:
-            str = bsp_debug;
-            str_len = sizeof(bsp_debug);
-            break;
-        case ATT_BSP_REG:
-            if (kstrtou16(buf, 0, &reg) < 0)
-                return -EINVAL;
-
-            str = bsp_reg;
-            str_len = sizeof(bsp_reg);
-            break;
-        default:
+    switch (attr->index)
+    {
+    case ATT_BSP_VERSION:
+        str = bsp_version;
+        str_len = sizeof(bsp_version);
+        break;
+    case ATT_BSP_DEBUG:
+        str = bsp_debug;
+        str_len = sizeof(bsp_debug);
+        break;
+    case ATT_BSP_REG:
+        if (kstrtou16(buf, 0, &reg) < 0)
             return -EINVAL;
+
+        str = bsp_reg;
+        str_len = sizeof(bsp_reg);
+        break;
+    default:
+        return -EINVAL;
     }
 
-    if (attr->index == ATT_BSP_DEBUG) {
-        if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+    if (attr->index == ATT_BSP_DEBUG)
+    {
+        if (kstrtou8(buf, 0, &bsp_debug_u8) < 0)
+        {
             return -EINVAL;
-        } else if (_config_bsp_log(bsp_debug_u8) < 0) {
+        }
+        else if (_config_bsp_log(bsp_debug_u8) < 0)
+        {
             return -EINVAL;
         }
     }
@@ -578,58 +604,74 @@ static ssize_t write_bsp_callback(struct device *dev,
 }
 
 static ssize_t write_bsp_pr_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                     struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     int str_len = strlen(buf);
 
-    if(str_len <= 0)
+    if (str_len <= 0)
         return str_len;
 
-    switch (attr->index) {
-        case ATT_BSP_PR_INFO:
-            BSP_PR(KERN_INFO, "%s", buf);
-            break;
-        case ATT_BSP_PR_ERR:
-            BSP_PR(KERN_ERR, "%s", buf);
-            break;
-        default:
-            return -EINVAL;
+    switch (attr->index)
+    {
+    case ATT_BSP_PR_INFO:
+        BSP_PR(KERN_INFO, "%s", buf);
+        break;
+    case ATT_BSP_PR_ERR:
+        BSP_PR(KERN_ERR, "%s", buf);
+        break;
+    default:
+        return -EINVAL;
     }
 
     return str_len;
 }
 
-//SENSOR_DEVICE_ATTR - CPU
+/* get gpio max value */
+static ssize_t read_gpio_max(struct device *dev,
+                             struct device_attribute *da,
+                             char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    if (attr->index == ATT_BSP_GPIO_MAX)
+    {
+        return sprintf(buf, "%d\n", ARCH_NR_GPIOS - 1);
+    }
+    return -1;
+}
+
+// SENSOR_DEVICE_ATTR - CPU
 static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION);
 static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H);
-static SENSOR_DEVICE_ATTR(boot_rom,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM);
-static SENSOR_DEVICE_ATTR(boot_cfg,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG);
-static SENSOR_DEVICE_ATTR(cpu_cpld_build,   S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD);
-//SENSOR_DEVICE_ATTR - MB
-static SENSOR_DEVICE_ATTR(board_id_0,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
-static SENSOR_DEVICE_ATTR(board_id_1,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
-static SENSOR_DEVICE_ATTR(mb_cpld_1_version,   S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
+static SENSOR_DEVICE_ATTR(boot_rom, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM);
+static SENSOR_DEVICE_ATTR(boot_cfg, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG);
+static SENSOR_DEVICE_ATTR(cpu_cpld_build, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD);
+// SENSOR_DEVICE_ATTR - MB
+static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
+static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
 static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H);
-static SENSOR_DEVICE_ATTR(mb_cpld_1_build,  S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD);
-static SENSOR_DEVICE_ATTR(mux_ctrl,         S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL);
-static SENSOR_DEVICE_ATTR(mux_reset,        S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET);
-static SENSOR_DEVICE_ATTR(board_sku_id,     S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
-static SENSOR_DEVICE_ATTR(board_hw_id,      S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
-static SENSOR_DEVICE_ATTR(board_id_type,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
-static SENSOR_DEVICE_ATTR(board_build_id,   S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
-static SENSOR_DEVICE_ATTR(board_deph_id,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
-//SENSOR_DEVICE_ATTR - I2C Alert
-static SENSOR_DEVICE_ATTR(alert_status,     S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_build, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD);
+static SENSOR_DEVICE_ATTR(mux_ctrl, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL);
+static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET);
+static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
+static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
+static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
+static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
+static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
+// SENSOR_DEVICE_ATTR - I2C Alert
+static SENSOR_DEVICE_ATTR(alert_status, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS);
 #if CPU_TYPE == CPU_BDE
-static SENSOR_DEVICE_ATTR(alert_disable,    S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE);
+static SENSOR_DEVICE_ATTR(alert_disable, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE);
 #endif
-//SENSOR_DEVICE_ATTR - BSP
-static SENSOR_DEVICE_ATTR(bsp_version,      S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
-static SENSOR_DEVICE_ATTR(bsp_debug,        S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
-static SENSOR_DEVICE_ATTR(bsp_pr_info,      S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO);
-static SENSOR_DEVICE_ATTR(bsp_pr_err,       S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR);
-static SENSOR_DEVICE_ATTR(bsp_reg,          S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
+// SENSOR_DEVICE_ATTR - BSP
+static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
+static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
+static SENSOR_DEVICE_ATTR(bsp_pr_info, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO);
+static SENSOR_DEVICE_ATTR(bsp_pr_err, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR);
+static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
+static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO, read_gpio_max, NULL, ATT_BSP_GPIO_MAX);
 
 static struct attribute *cpu_cpld_attrs[] = {
     &sensor_dev_attr_cpu_cpld_version.dev_attr.attr,
@@ -674,6 +716,7 @@ static struct attribute *bsp_attrs[] = {
     &sensor_dev_attr_bsp_pr_info.dev_attr.attr,
     &sensor_dev_attr_bsp_pr_err.dev_attr.attr,
     &sensor_dev_attr_bsp_reg.dev_attr.attr,
+    &sensor_dev_attr_bsp_gpio_max.dev_attr.attr,
     NULL,
 };
 
@@ -702,18 +745,17 @@ static struct attribute_group bsp_attr_grp = {
     .attrs = bsp_attrs,
 };
 
-static void lpc_dev_release( struct device * dev)
+static void lpc_dev_release(struct device *dev)
 {
     return;
 }
 
 static struct platform_device lpc_dev = {
-    .name           = DRIVER_NAME,
-    .id             = -1,
+    .name = DRIVER_NAME,
+    .id = -1,
     .dev = {
-                    .release = lpc_dev_release,
-    }
-};
+        .release = lpc_dev_release,
+    }};
 
 static int lpc_drv_probe(struct platform_device *pdev)
 {
@@ -728,32 +770,37 @@ static int lpc_drv_probe(struct platform_device *pdev)
 
     mutex_init(&lpc_data->access_lock);
 
-    for (i=0; i<grp_num; ++i) {
-        switch (i) {
-            case 0:
-                grp = &cpu_cpld_attr_grp;
-                break;
-            case 1:
-                grp = &mb_cpld_attr_grp;
-                break;
-            case 2:
-                grp = &bios_attr_grp;
-                break;
-            case 3:
-                grp = &i2c_alert_attr_grp;
-                break;
-            case 4:
-                grp = &bsp_attr_grp;
-                break;
-            default:
-                break;
+    for (i = 0; i < grp_num; ++i)
+    {
+        switch (i)
+        {
+        case 0:
+            grp = &cpu_cpld_attr_grp;
+            break;
+        case 1:
+            grp = &mb_cpld_attr_grp;
+            break;
+        case 2:
+            grp = &bios_attr_grp;
+            break;
+        case 3:
+            grp = &i2c_alert_attr_grp;
+            break;
+        case 4:
+            grp = &bsp_attr_grp;
+            break;
+        default:
+            break;
         }
 
         err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
-        if (err[i]) {
+        if (err[i])
+        {
             printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
             goto exit;
-        } else {
+        }
+        else
+        {
             continue;
         }
     }
@@ -761,33 +808,38 @@ static int lpc_drv_probe(struct platform_device *pdev)
     return 0;
 
 exit:
-    for (i=0; i<grp_num; ++i) {
-        switch (i) {
-            case 0:
-                grp = &cpu_cpld_attr_grp;
-                break;
-            case 1:
-                grp = &mb_cpld_attr_grp;
-                break;
-            case 2:
-                grp = &bios_attr_grp;
-                break;
-            case 3:
-                grp = &i2c_alert_attr_grp;
-                break;
-            case 4:
-                grp = &bsp_attr_grp;
-                break;
-            default:
-                break;
+    for (i = 0; i < grp_num; ++i)
+    {
+        switch (i)
+        {
+        case 0:
+            grp = &cpu_cpld_attr_grp;
+            break;
+        case 1:
+            grp = &mb_cpld_attr_grp;
+            break;
+        case 2:
+            grp = &bios_attr_grp;
+            break;
+        case 3:
+            grp = &i2c_alert_attr_grp;
+            break;
+        case 4:
+            grp = &bsp_attr_grp;
+            break;
+        default:
+            break;
         }
 
         sysfs_remove_group(&pdev->dev.kobj, grp);
-        if (!err[i]) {
-            //remove previous successful cases
+        if (!err[i])
+        {
+            // remove previous successful cases
             continue;
-        } else {
-            //remove first failed case, then return
+        }
+        else
+        {
+            // remove first failed case, then return
             return err[i];
         }
     }
@@ -806,10 +858,10 @@ static int lpc_drv_remove(struct platform_device *pdev)
 }
 
 static struct platform_driver lpc_drv = {
-    .probe  = lpc_drv_probe,
+    .probe = lpc_drv_probe,
     .remove = __exit_p(lpc_drv_remove),
     .driver = {
-    .name   = DRIVER_NAME,
+        .name = DRIVER_NAME,
     },
 };
 
@@ -818,17 +870,19 @@ int lpc_init(void)
     int err = 0;
 
     err = platform_driver_register(&lpc_drv);
-    if (err) {
+    if (err)
+    {
         printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
-                __func__, __LINE__, err);
+               __func__, __LINE__, err);
 
         return err;
     }
 
     err = platform_device_register(&lpc_dev);
-    if (err) {
+    if (err)
+    {
         printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
-                __func__, __LINE__, err);
+               __func__, __LINE__, err);
         platform_driver_unregister(&lpc_drv);
         return err;
     }
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c
index 23245ebc96e..35baf3cd984 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c
@@ -26,15 +26,16 @@
 #include <linux/io.h>
 #include <linux/platform_device.h>
 #include <linux/hwmon-sysfs.h>
+#include <linux/gpio.h>
 
-#define BSP_LOG_R(fmt, args...) \
-    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
-#define BSP_LOG_W(fmt, args...) \
-    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_R(fmt, args...)                            \
+    _bsp_log(LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+             __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...)                             \
+    _bsp_log(LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+             __FILE__, __func__, __LINE__, ##args)
 
-#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
+#define BSP_PR(level, fmt, args...) _bsp_log(LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
 
 #define DRIVER_NAME "x86_64_ufispace_s9301_32d_lpc"
 #define CPU_BDE 0
@@ -43,53 +44,54 @@
 
 /* LPC registers */
 
-#define REG_BASE_CPU                      0x600
+#define REG_BASE_CPU 0x600
 
 #if CPU_TYPE == CPU_SKY
-#define REG_BASE_MB                       0xE00
-#define REG_BASE_I2C_ALERT                0x700
+#define REG_BASE_MB 0xE00
+#define REG_BASE_I2C_ALERT 0x700
 #else
-#define REG_BASE_MB                       0x700
-#define REG_BASE_I2C_ALERT                0xF000
+#define REG_BASE_MB 0x700
+#define REG_BASE_I2C_ALERT 0xF000
 #endif
 
-//CPU CPLD
-#define REG_CPU_CPLD_VERSION              (REG_BASE_CPU + 0x00)
-#define REG_CPU_STATUS_0                  (REG_BASE_CPU + 0x01)
-#define REG_CPU_STATUS_1                  (REG_BASE_CPU + 0x02)
-#define REG_CPU_CTRL_0                    (REG_BASE_CPU + 0x03)
-#define REG_CPU_CTRL_1                    (REG_BASE_CPU + 0x04)
-#define REG_CPU_CPLD_BUILD                (REG_BASE_CPU + 0xE0)
-
-//MB CPLD
-//TBD, need to change after CPLD spec release
-#define REG_MB_BRD_ID_0                   (REG_BASE_MB + 0x00)
-#define REG_MB_BRD_ID_1                   (REG_BASE_MB + 0x01)
-#define REG_MB_CPLD_VERSION               (REG_BASE_MB + 0x02)
-#define REG_MB_CPLD_BUILD                 (REG_BASE_MB + 0x04)
-#define REG_MB_MUX_RESET                  (REG_BASE_MB + 0x46)
-#define REG_MB_MUX_CTRL                   (REG_BASE_MB + 0x5c)
-
-//I2C Alert
+// CPU CPLD
+#define REG_CPU_CPLD_VERSION (REG_BASE_CPU + 0x00)
+#define REG_CPU_STATUS_0 (REG_BASE_CPU + 0x01)
+#define REG_CPU_STATUS_1 (REG_BASE_CPU + 0x02)
+#define REG_CPU_CTRL_0 (REG_BASE_CPU + 0x03)
+#define REG_CPU_CTRL_1 (REG_BASE_CPU + 0x04)
+#define REG_CPU_CPLD_BUILD (REG_BASE_CPU + 0xE0)
+
+// MB CPLD
+// TBD, need to change after CPLD spec release
+#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00)
+#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01)
+#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02)
+#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04)
+#define REG_MB_MUX_RESET (REG_BASE_MB + 0x46)
+#define REG_MB_MUX_CTRL (REG_BASE_MB + 0x5c)
+
+// I2C Alert
 #if CPU_TYPE == CPU_SKY
-#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x80)
+#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x80)
 #else
-#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x00)
-#define REG_ALERT_DISABLE                 (REG_BASE_I2C_ALERT + 0x11)
+#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x00)
+#define REG_ALERT_DISABLE (REG_BASE_I2C_ALERT + 0x11)
 #endif
 
-#define MASK_ALL                          (0xFF)
-#define LPC_MDELAY                        (5)
+#define MASK_ALL (0xFF)
+#define LPC_MDELAY (5)
 
 /* LPC sysfs attributes index  */
-enum lpc_sysfs_attributes {
-    //CPU CPLD
+enum lpc_sysfs_attributes
+{
+    // CPU CPLD
     ATT_CPU_CPLD_VERSION,
     ATT_CPU_CPLD_VERSION_H,
     ATT_CPU_BIOS_BOOT_ROM,
     ATT_CPU_BIOS_BOOT_CFG,
     ATT_CPU_CPLD_BUILD,
-    //MB CPLD
+    // MB CPLD
     ATT_MB_BRD_ID_0,
     ATT_MB_BRD_ID_1,
     ATT_MB_CPLD_1_VERSION,
@@ -102,21 +104,23 @@ enum lpc_sysfs_attributes {
     ATT_MB_BRD_ID_TYPE,
     ATT_MB_BRD_BUILD_ID,
     ATT_MB_BRD_DEPH_ID,
-    //I2C Alert
+    // I2C Alert
     ATT_ALERT_STATUS,
 #if CPU_TYPE == CPU_BDE
     ATT_ALERT_DISABLE,
 #endif
-    //BSP
+    // BSP
     ATT_BSP_VERSION,
     ATT_BSP_DEBUG,
     ATT_BSP_PR_INFO,
     ATT_BSP_PR_ERR,
     ATT_BSP_REG,
+    ATT_BSP_GPIO_MAX,
     ATT_MAX
 };
 
-enum bsp_log_types {
+enum bsp_log_types
+{
     LOG_NONE,
     LOG_RW,
     LOG_READ,
@@ -124,29 +128,32 @@ enum bsp_log_types {
     LOG_SYS
 };
 
-enum bsp_log_ctrl {
+enum bsp_log_ctrl
+{
     LOG_DISABLE,
     LOG_ENABLE
 };
 
-struct lpc_data_s {
-    struct mutex    access_lock;
+struct lpc_data_s
+{
+    struct mutex access_lock;
 };
 
 struct lpc_data_s *lpc_data;
-char bsp_version[16]="";
-char bsp_debug[2]="0";
-char bsp_reg[8]="0x0";
-u8 enable_log_read=LOG_DISABLE;
-u8 enable_log_write=LOG_DISABLE;
-u8 enable_log_sys=LOG_ENABLE;
+char bsp_version[16] = "";
+char bsp_debug[2] = "0";
+char bsp_reg[8] = "0x0";
+u8 enable_log_read = LOG_DISABLE;
+u8 enable_log_write = LOG_DISABLE;
+u8 enable_log_sys = LOG_ENABLE;
 
 /* reg shift */
 static u8 _shift(u8 mask)
 {
-    int i=0, mask_one=1;
+    int i = 0, mask_one = 1;
 
-    for(i=0; i<8; ++i) {
+    for (i = 0; i < 8; ++i)
+    {
         if ((mask & mask_one) == 1)
             return i;
         else
@@ -159,7 +166,7 @@ static u8 _shift(u8 mask)
 /* reg mask and shift */
 static u8 _mask_shift(u8 val, u8 mask)
 {
-    int shift=0;
+    int shift = 0;
 
     shift = _shift(mask);
 
@@ -177,9 +184,10 @@ static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
 
 static int _bsp_log(u8 log_type, char *fmt, ...)
 {
-    if ((log_type==LOG_READ  && enable_log_read) ||
-        (log_type==LOG_WRITE && enable_log_write) ||
-        (log_type==LOG_SYS && enable_log_sys) ) {
+    if ((log_type == LOG_READ && enable_log_read) ||
+        (log_type == LOG_WRITE && enable_log_write) ||
+        (log_type == LOG_SYS && enable_log_sys))
+    {
         va_list args;
         int r;
 
@@ -188,32 +196,35 @@ static int _bsp_log(u8 log_type, char *fmt, ...)
         va_end(args);
 
         return r;
-    } else {
+    }
+    else
+    {
         return 0;
     }
 }
 
 static int _config_bsp_log(u8 log_type)
 {
-    switch(log_type) {
-        case LOG_NONE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_RW:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        case LOG_READ:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_WRITE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        default:
-            return -EINVAL;
+    switch (log_type)
+    {
+    case LOG_NONE:
+        enable_log_read = LOG_DISABLE;
+        enable_log_write = LOG_DISABLE;
+        break;
+    case LOG_RW:
+        enable_log_read = LOG_ENABLE;
+        enable_log_write = LOG_ENABLE;
+        break;
+    case LOG_READ:
+        enable_log_read = LOG_ENABLE;
+        enable_log_write = LOG_DISABLE;
+        break;
+    case LOG_WRITE:
+        enable_log_read = LOG_DISABLE;
+        enable_log_write = LOG_ENABLE;
+        break;
+    default:
+        return -EINVAL;
     }
     return 0;
 }
@@ -224,7 +235,7 @@ static u8 _read_lpc_reg(u16 reg, u8 mask)
     u8 reg_val;
 
     mutex_lock(&lpc_data->access_lock);
-    reg_val=_mask_shift(inb(reg), mask);
+    reg_val = _mask_shift(inb(reg), mask);
     mutex_unlock(&lpc_data->access_lock);
 
     BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
@@ -236,10 +247,10 @@ static u8 _read_lpc_reg(u16 reg, u8 mask)
 static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf)
 {
     u8 reg_val;
-    int len=0;
+    int len = 0;
 
     reg_val = _read_lpc_reg(reg, mask);
-    len=sprintf(buf,"0x%x\n", reg_val);
+    len = sprintf(buf, "0x%x\n", reg_val);
 
     return len;
 }
@@ -252,8 +263,9 @@ static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
     if (kstrtou8(buf, 0, &reg_val) < 0)
         return -EINVAL;
 
-    //apply SINGLE BIT operation if mask is specified, multiple bits are not supported
-    if (mask != MASK_ALL) {
+    // apply SINGLE BIT operation if mask is specified, multiple bits are not supported
+    if (mask != MASK_ALL)
+    {
         reg_val_now = _read_lpc_reg(reg, 0x0);
         shift = _shift(mask);
         reg_val = _bit_operation(reg_val_now, shift, reg_val);
@@ -274,10 +286,10 @@ static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
 /* get bsp value */
 static ssize_t read_bsp(char *buf, char *str)
 {
-    ssize_t len=0;
+    ssize_t len = 0;
 
     mutex_lock(&lpc_data->access_lock);
-    len=sprintf(buf, "%s", str);
+    len = sprintf(buf, "%s", str);
     mutex_unlock(&lpc_data->access_lock);
 
     BSP_LOG_R("reg_val=%s", str);
@@ -299,9 +311,9 @@ static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t coun
 
 /* get cpu cpld version in human readable format */
 static ssize_t read_cpu_cpld_version_h(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                       struct device_attribute *da, char *buf)
 {
-    ssize_t len=0;
+    ssize_t len = 0;
     u16 reg = REG_CPU_CPLD_VERSION;
     u8 mask = MASK_ALL;
     u8 mask_major = 0b11000000;
@@ -325,9 +337,9 @@ static ssize_t read_cpu_cpld_version_h(struct device *dev,
 
 /* get mb cpld version in human readable format */
 static ssize_t read_mb_cpld_1_version_h(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                        struct device_attribute *da, char *buf)
 {
-    ssize_t len=0;
+    ssize_t len = 0;
     u16 reg = REG_MB_CPLD_VERSION;
     u8 mask = MASK_ALL;
     u8 mask_major = 0b11000000;
@@ -351,7 +363,7 @@ static ssize_t read_mb_cpld_1_version_h(struct device *dev,
 
 /* get mux_reset register value */
 static ssize_t read_mux_reset_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                       struct device_attribute *da, char *buf)
 {
     int len = 0;
     u16 reg = REG_MB_MUX_RESET;
@@ -359,9 +371,9 @@ static ssize_t read_mux_reset_callback(struct device *dev,
     u8 reg_val;
 
     mutex_lock(&lpc_data->access_lock);
-    reg_val=_mask_shift(inb(reg), mask);
+    reg_val = _mask_shift(inb(reg), mask);
     BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
-    len=sprintf(buf, "%d\n", reg_val);
+    len = sprintf(buf, "%d\n", reg_val);
     mutex_unlock(&lpc_data->access_lock);
 
     return len;
@@ -369,7 +381,7 @@ static ssize_t read_mux_reset_callback(struct device *dev,
 
 /* set mux_reset register value */
 static ssize_t write_mux_reset_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                        struct device_attribute *da, const char *buf, size_t count)
 {
     u8 val = 0;
     u16 reg = REG_MB_MUX_RESET;
@@ -380,8 +392,10 @@ static ssize_t write_mux_reset_callback(struct device *dev,
     if (kstrtou8(buf, 0, &val) < 0)
         return -EINVAL;
 
-    if (mux_reset_flag == 0) {
-        if (val == 0) {
+    if (mux_reset_flag == 0)
+    {
+        if (val == 0)
+        {
             mutex_lock(&lpc_data->access_lock);
             mux_reset_flag = 1;
             BSP_LOG_W("i2c mux reset is triggered...");
@@ -397,10 +411,14 @@ static ssize_t write_mux_reset_callback(struct device *dev,
             mdelay(500);
             mux_reset_flag = 0;
             mutex_unlock(&lpc_data->access_lock);
-        } else {
+        }
+        else
+        {
             return -EINVAL;
         }
-    } else {
+    }
+    else
+    {
         BSP_LOG_W("i2c mux is resetting... (ignore)");
         mutex_lock(&lpc_data->access_lock);
         mutex_unlock(&lpc_data->access_lock);
@@ -411,165 +429,173 @@ static ssize_t write_mux_reset_callback(struct device *dev,
 
 /* get lpc register value */
 static ssize_t read_lpc_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                 struct device_attribute *da, char *buf)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     u16 reg = 0;
     u8 mask = MASK_ALL;
 
-    switch (attr->index) {
-        //CPU CPLD
-        case ATT_CPU_CPLD_VERSION:
-            reg = REG_CPU_CPLD_VERSION;
-            break;
-        case ATT_CPU_BIOS_BOOT_ROM:
-            reg = REG_CPU_STATUS_1;
-            mask = 0x80;
-            break;
-        case ATT_CPU_BIOS_BOOT_CFG:
-            reg = REG_CPU_CTRL_1;
-            mask = 0x80;
-            break;
-        case ATT_CPU_CPLD_BUILD:
-            reg = REG_CPU_CPLD_BUILD;
-            break;
-        //MB CPLD
-        case ATT_MB_BRD_ID_0:
-            reg = REG_MB_BRD_ID_0;
-            break;
-        case ATT_MB_BRD_ID_1:
-            reg = REG_MB_BRD_ID_1;
-            break;
-        case ATT_MB_CPLD_1_VERSION:
-            reg = REG_MB_CPLD_VERSION;
-            break;
-        case ATT_MB_CPLD_1_BUILD:
-            reg = REG_MB_CPLD_BUILD;
-            break;
-        case ATT_MB_BRD_SKU_ID:
-            reg = REG_MB_BRD_ID_0;
-            mask = 0xFF;
-            break;
-        case ATT_MB_BRD_HW_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x03;
-            break;
-        case ATT_MB_BRD_ID_TYPE:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x80;
-            break;
-        case ATT_MB_BRD_BUILD_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x38;
-            break;
-        case ATT_MB_BRD_DEPH_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x04;
-            break;
-        case ATT_MB_MUX_CTRL:
-            reg = REG_MB_MUX_CTRL;
-            break;
-        //I2C Alert
-        case ATT_ALERT_STATUS:
-            reg = REG_ALERT_STATUS;
-            mask = 0x20;
-            break;
+    switch (attr->index)
+    {
+    // CPU CPLD
+    case ATT_CPU_CPLD_VERSION:
+        reg = REG_CPU_CPLD_VERSION;
+        break;
+    case ATT_CPU_BIOS_BOOT_ROM:
+        reg = REG_CPU_STATUS_1;
+        mask = 0x80;
+        break;
+    case ATT_CPU_BIOS_BOOT_CFG:
+        reg = REG_CPU_CTRL_1;
+        mask = 0x80;
+        break;
+    case ATT_CPU_CPLD_BUILD:
+        reg = REG_CPU_CPLD_BUILD;
+        break;
+    // MB CPLD
+    case ATT_MB_BRD_ID_0:
+        reg = REG_MB_BRD_ID_0;
+        break;
+    case ATT_MB_BRD_ID_1:
+        reg = REG_MB_BRD_ID_1;
+        break;
+    case ATT_MB_CPLD_1_VERSION:
+        reg = REG_MB_CPLD_VERSION;
+        break;
+    case ATT_MB_CPLD_1_BUILD:
+        reg = REG_MB_CPLD_BUILD;
+        break;
+    case ATT_MB_BRD_SKU_ID:
+        reg = REG_MB_BRD_ID_0;
+        mask = 0xFF;
+        break;
+    case ATT_MB_BRD_HW_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x03;
+        break;
+    case ATT_MB_BRD_ID_TYPE:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x80;
+        break;
+    case ATT_MB_BRD_BUILD_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x38;
+        break;
+    case ATT_MB_BRD_DEPH_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x04;
+        break;
+    case ATT_MB_MUX_CTRL:
+        reg = REG_MB_MUX_CTRL;
+        break;
+    // I2C Alert
+    case ATT_ALERT_STATUS:
+        reg = REG_ALERT_STATUS;
+        mask = 0x20;
+        break;
 #if CPU_TYPE == CPU_BDE
-        case ATT_ALERT_DISABLE:
-            reg = REG_ALERT_DISABLE;
-            mask = 0x04;
-            break;
+    case ATT_ALERT_DISABLE:
+        reg = REG_ALERT_DISABLE;
+        mask = 0x04;
+        break;
 #endif
-        //BSP
-        case ATT_BSP_REG:
-            if (kstrtou16(bsp_reg, 0, &reg) < 0)
-                return -EINVAL;
-            break;
-        default:
+    // BSP
+    case ATT_BSP_REG:
+        if (kstrtou16(bsp_reg, 0, &reg) < 0)
             return -EINVAL;
+        break;
+    default:
+        return -EINVAL;
     }
     return read_lpc_reg(reg, mask, buf);
 }
 
 /* set lpc register value */
 static ssize_t write_lpc_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                  struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     u16 reg = 0;
     u8 mask = MASK_ALL;
 
-    switch (attr->index) {
-        case ATT_MB_MUX_CTRL:
-            reg = REG_MB_MUX_CTRL;
-            break;
-        default:
-            return -EINVAL;
+    switch (attr->index)
+    {
+    case ATT_MB_MUX_CTRL:
+        reg = REG_MB_MUX_CTRL;
+        break;
+    default:
+        return -EINVAL;
     }
     return write_lpc_reg(reg, mask, buf, count);
 }
 
 /* get bsp parameter value */
 static ssize_t read_bsp_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                 struct device_attribute *da, char *buf)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
-
-    switch (attr->index) {
-        case ATT_BSP_VERSION:
-            str = bsp_version;
-            str_len = sizeof(bsp_version);
-            break;
-        case ATT_BSP_DEBUG:
-            str = bsp_debug;
-            str_len = sizeof(bsp_debug);
-            break;
-        case ATT_BSP_REG:
-            str = bsp_reg;
-            str_len = sizeof(bsp_reg);
-            break;
-        default:
-            return -EINVAL;
+    int str_len = 0;
+    char *str = NULL;
+
+    switch (attr->index)
+    {
+    case ATT_BSP_VERSION:
+        str = bsp_version;
+        str_len = sizeof(bsp_version);
+        break;
+    case ATT_BSP_DEBUG:
+        str = bsp_debug;
+        str_len = sizeof(bsp_debug);
+        break;
+    case ATT_BSP_REG:
+        str = bsp_reg;
+        str_len = sizeof(bsp_reg);
+        break;
+    default:
+        return -EINVAL;
     }
     return read_bsp(buf, str);
 }
 
 /* set bsp parameter value */
 static ssize_t write_bsp_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                  struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
+    int str_len = 0;
+    char *str = NULL;
     u16 reg = 0;
     u8 bsp_debug_u8 = 0;
 
-    switch (attr->index) {
-        case ATT_BSP_VERSION:
-            str = bsp_version;
-            str_len = sizeof(bsp_version);
-            break;
-        case ATT_BSP_DEBUG:
-            str = bsp_debug;
-            str_len = sizeof(bsp_debug);
-            break;
-        case ATT_BSP_REG:
-            if (kstrtou16(buf, 0, &reg) < 0)
-                return -EINVAL;
-
-            str = bsp_reg;
-            str_len = sizeof(bsp_reg);
-            break;
-        default:
+    switch (attr->index)
+    {
+    case ATT_BSP_VERSION:
+        str = bsp_version;
+        str_len = sizeof(bsp_version);
+        break;
+    case ATT_BSP_DEBUG:
+        str = bsp_debug;
+        str_len = sizeof(bsp_debug);
+        break;
+    case ATT_BSP_REG:
+        if (kstrtou16(buf, 0, &reg) < 0)
             return -EINVAL;
+
+        str = bsp_reg;
+        str_len = sizeof(bsp_reg);
+        break;
+    default:
+        return -EINVAL;
     }
 
-    if (attr->index == ATT_BSP_DEBUG) {
-        if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+    if (attr->index == ATT_BSP_DEBUG)
+    {
+        if (kstrtou8(buf, 0, &bsp_debug_u8) < 0)
+        {
             return -EINVAL;
-        } else if (_config_bsp_log(bsp_debug_u8) < 0) {
+        }
+        else if (_config_bsp_log(bsp_debug_u8) < 0)
+        {
             return -EINVAL;
         }
     }
@@ -578,58 +604,74 @@ static ssize_t write_bsp_callback(struct device *dev,
 }
 
 static ssize_t write_bsp_pr_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                     struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     int str_len = strlen(buf);
 
-    if(str_len <= 0)
+    if (str_len <= 0)
         return str_len;
 
-    switch (attr->index) {
-        case ATT_BSP_PR_INFO:
-            BSP_PR(KERN_INFO, "%s", buf);
-            break;
-        case ATT_BSP_PR_ERR:
-            BSP_PR(KERN_ERR, "%s", buf);
-            break;
-        default:
-            return -EINVAL;
+    switch (attr->index)
+    {
+    case ATT_BSP_PR_INFO:
+        BSP_PR(KERN_INFO, "%s", buf);
+        break;
+    case ATT_BSP_PR_ERR:
+        BSP_PR(KERN_ERR, "%s", buf);
+        break;
+    default:
+        return -EINVAL;
     }
 
     return str_len;
 }
 
-//SENSOR_DEVICE_ATTR - CPU
+/* get gpio max value */
+static ssize_t read_gpio_max(struct device *dev,
+                             struct device_attribute *da,
+                             char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    if (attr->index == ATT_BSP_GPIO_MAX)
+    {
+        return sprintf(buf, "%d\n", ARCH_NR_GPIOS - 1);
+    }
+    return -1;
+}
+
+// SENSOR_DEVICE_ATTR - CPU
 static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION);
 static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H);
-static SENSOR_DEVICE_ATTR(boot_rom,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM);
-static SENSOR_DEVICE_ATTR(boot_cfg,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG);
-static SENSOR_DEVICE_ATTR(cpu_cpld_build,   S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD);
-//SENSOR_DEVICE_ATTR - MB
-static SENSOR_DEVICE_ATTR(board_id_0,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
-static SENSOR_DEVICE_ATTR(board_id_1,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
+static SENSOR_DEVICE_ATTR(boot_rom, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM);
+static SENSOR_DEVICE_ATTR(boot_cfg, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG);
+static SENSOR_DEVICE_ATTR(cpu_cpld_build, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD);
+// SENSOR_DEVICE_ATTR - MB
+static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
+static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
 static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
 static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H);
-static SENSOR_DEVICE_ATTR(mb_cpld_1_build,  S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD);
-static SENSOR_DEVICE_ATTR(mux_ctrl,         S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL);
-static SENSOR_DEVICE_ATTR(mux_reset,        S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET);
-static SENSOR_DEVICE_ATTR(board_sku_id,     S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
-static SENSOR_DEVICE_ATTR(board_hw_id,      S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
-static SENSOR_DEVICE_ATTR(board_id_type,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
-static SENSOR_DEVICE_ATTR(board_build_id,   S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
-static SENSOR_DEVICE_ATTR(board_deph_id,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
-//SENSOR_DEVICE_ATTR - I2C Alert
-static SENSOR_DEVICE_ATTR(alert_status,     S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_build, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD);
+static SENSOR_DEVICE_ATTR(mux_ctrl, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL);
+static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET);
+static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
+static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
+static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
+static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
+static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
+// SENSOR_DEVICE_ATTR - I2C Alert
+static SENSOR_DEVICE_ATTR(alert_status, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS);
 #if CPU_TYPE == CPU_BDE
-static SENSOR_DEVICE_ATTR(alert_disable,    S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE);
+static SENSOR_DEVICE_ATTR(alert_disable, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE);
 #endif
-//SENSOR_DEVICE_ATTR - BSP
-static SENSOR_DEVICE_ATTR(bsp_version,      S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
-static SENSOR_DEVICE_ATTR(bsp_debug,        S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
-static SENSOR_DEVICE_ATTR(bsp_pr_info,      S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO);
-static SENSOR_DEVICE_ATTR(bsp_pr_err,       S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR);
-static SENSOR_DEVICE_ATTR(bsp_reg,          S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
+// SENSOR_DEVICE_ATTR - BSP
+static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
+static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
+static SENSOR_DEVICE_ATTR(bsp_pr_info, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO);
+static SENSOR_DEVICE_ATTR(bsp_pr_err, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR);
+static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
+static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO, read_gpio_max, NULL, ATT_BSP_GPIO_MAX);
 
 static struct attribute *cpu_cpld_attrs[] = {
     &sensor_dev_attr_cpu_cpld_version.dev_attr.attr,
@@ -674,6 +716,7 @@ static struct attribute *bsp_attrs[] = {
     &sensor_dev_attr_bsp_pr_info.dev_attr.attr,
     &sensor_dev_attr_bsp_pr_err.dev_attr.attr,
     &sensor_dev_attr_bsp_reg.dev_attr.attr,
+    &sensor_dev_attr_bsp_gpio_max.dev_attr.attr,
     NULL,
 };
 
@@ -702,18 +745,17 @@ static struct attribute_group bsp_attr_grp = {
     .attrs = bsp_attrs,
 };
 
-static void lpc_dev_release( struct device * dev)
+static void lpc_dev_release(struct device *dev)
 {
     return;
 }
 
 static struct platform_device lpc_dev = {
-    .name           = DRIVER_NAME,
-    .id             = -1,
+    .name = DRIVER_NAME,
+    .id = -1,
     .dev = {
-                    .release = lpc_dev_release,
-    }
-};
+        .release = lpc_dev_release,
+    }};
 
 static int lpc_drv_probe(struct platform_device *pdev)
 {
@@ -728,32 +770,37 @@ static int lpc_drv_probe(struct platform_device *pdev)
 
     mutex_init(&lpc_data->access_lock);
 
-    for (i=0; i<grp_num; ++i) {
-        switch (i) {
-            case 0:
-                grp = &cpu_cpld_attr_grp;
-                break;
-            case 1:
-                grp = &mb_cpld_attr_grp;
-                break;
-            case 2:
-                grp = &bios_attr_grp;
-                break;
-            case 3:
-                grp = &i2c_alert_attr_grp;
-                break;
-            case 4:
-                grp = &bsp_attr_grp;
-                break;
-            default:
-                break;
+    for (i = 0; i < grp_num; ++i)
+    {
+        switch (i)
+        {
+        case 0:
+            grp = &cpu_cpld_attr_grp;
+            break;
+        case 1:
+            grp = &mb_cpld_attr_grp;
+            break;
+        case 2:
+            grp = &bios_attr_grp;
+            break;
+        case 3:
+            grp = &i2c_alert_attr_grp;
+            break;
+        case 4:
+            grp = &bsp_attr_grp;
+            break;
+        default:
+            break;
         }
 
         err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
-        if (err[i]) {
+        if (err[i])
+        {
             printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
             goto exit;
-        } else {
+        }
+        else
+        {
             continue;
         }
     }
@@ -761,33 +808,38 @@ static int lpc_drv_probe(struct platform_device *pdev)
     return 0;
 
 exit:
-    for (i=0; i<grp_num; ++i) {
-        switch (i) {
-            case 0:
-                grp = &cpu_cpld_attr_grp;
-                break;
-            case 1:
-                grp = &mb_cpld_attr_grp;
-                break;
-            case 2:
-                grp = &bios_attr_grp;
-                break;
-            case 3:
-                grp = &i2c_alert_attr_grp;
-                break;
-            case 4:
-                grp = &bsp_attr_grp;
-                break;
-            default:
-                break;
+    for (i = 0; i < grp_num; ++i)
+    {
+        switch (i)
+        {
+        case 0:
+            grp = &cpu_cpld_attr_grp;
+            break;
+        case 1:
+            grp = &mb_cpld_attr_grp;
+            break;
+        case 2:
+            grp = &bios_attr_grp;
+            break;
+        case 3:
+            grp = &i2c_alert_attr_grp;
+            break;
+        case 4:
+            grp = &bsp_attr_grp;
+            break;
+        default:
+            break;
         }
 
         sysfs_remove_group(&pdev->dev.kobj, grp);
-        if (!err[i]) {
-            //remove previous successful cases
+        if (!err[i])
+        {
+            // remove previous successful cases
             continue;
-        } else {
-            //remove first failed case, then return
+        }
+        else
+        {
+            // remove first failed case, then return
             return err[i];
         }
     }
@@ -806,10 +858,10 @@ static int lpc_drv_remove(struct platform_device *pdev)
 }
 
 static struct platform_driver lpc_drv = {
-    .probe  = lpc_drv_probe,
+    .probe = lpc_drv_probe,
     .remove = __exit_p(lpc_drv_remove),
     .driver = {
-    .name   = DRIVER_NAME,
+        .name = DRIVER_NAME,
     },
 };
 
@@ -818,17 +870,19 @@ int lpc_init(void)
     int err = 0;
 
     err = platform_driver_register(&lpc_drv);
-    if (err) {
+    if (err)
+    {
         printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
-                __func__, __LINE__, err);
+               __func__, __LINE__, err);
 
         return err;
     }
 
     err = platform_device_register(&lpc_dev);
-    if (err) {
+    if (err)
+    {
         printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
-                __func__, __LINE__, err);
+               __func__, __LINE__, err);
         platform_driver_unregister(&lpc_drv);
         return err;
     }
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c
index 01801b6c81b..ea7259d8dee 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c
@@ -26,15 +26,16 @@
 #include <linux/io.h>
 #include <linux/platform_device.h>
 #include <linux/hwmon-sysfs.h>
+#include <linux/gpio.h>
 
-#define BSP_LOG_R(fmt, args...) \
-    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
-#define BSP_LOG_W(fmt, args...) \
-    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_R(fmt, args...)                            \
+    _bsp_log(LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+             __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...)                             \
+    _bsp_log(LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+             __FILE__, __func__, __LINE__, ##args)
 
-#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
+#define BSP_PR(level, fmt, args...) _bsp_log(LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
 
 #define DRIVER_NAME "x86_64_ufispace_s9301_32db_lpc"
 #define CPU_BDE 0
@@ -43,53 +44,54 @@
 
 /* LPC registers */
 
-#define REG_BASE_CPU                      0x600
+#define REG_BASE_CPU 0x600
 
 #if CPU_TYPE == CPU_SKY
-#define REG_BASE_MB                       0xE00
-#define REG_BASE_I2C_ALERT                0x700
+#define REG_BASE_MB 0xE00
+#define REG_BASE_I2C_ALERT 0x700
 #else
-#define REG_BASE_MB                       0x700
-#define REG_BASE_I2C_ALERT                0xF000
+#define REG_BASE_MB 0x700
+#define REG_BASE_I2C_ALERT 0xF000
 #endif
 
-//CPU CPLD
-#define REG_CPU_CPLD_VERSION              (REG_BASE_CPU + 0x00)
-#define REG_CPU_STATUS_0                  (REG_BASE_CPU + 0x01)
-#define REG_CPU_STATUS_1                  (REG_BASE_CPU + 0x02)
-#define REG_CPU_CTRL_0                    (REG_BASE_CPU + 0x03)
-#define REG_CPU_CTRL_1                    (REG_BASE_CPU + 0x04)
-#define REG_CPU_CPLD_BUILD                (REG_BASE_CPU + 0xE0)
-
-//MB CPLD
-//TBD, need to change after CPLD spec release
-#define REG_MB_BRD_ID_0                   (REG_BASE_MB + 0x00)
-#define REG_MB_BRD_ID_1                   (REG_BASE_MB + 0x01)
-#define REG_MB_CPLD_VERSION               (REG_BASE_MB + 0x02)
-#define REG_MB_CPLD_BUILD                 (REG_BASE_MB + 0x04)
-#define REG_MB_MUX_RESET                  (REG_BASE_MB + 0x46)
-#define REG_MB_MUX_CTRL                   (REG_BASE_MB + 0x5c)
-
-//I2C Alert
+// CPU CPLD
+#define REG_CPU_CPLD_VERSION (REG_BASE_CPU + 0x00)
+#define REG_CPU_STATUS_0 (REG_BASE_CPU + 0x01)
+#define REG_CPU_STATUS_1 (REG_BASE_CPU + 0x02)
+#define REG_CPU_CTRL_0 (REG_BASE_CPU + 0x03)
+#define REG_CPU_CTRL_1 (REG_BASE_CPU + 0x04)
+#define REG_CPU_CPLD_BUILD (REG_BASE_CPU + 0xE0)
+
+// MB CPLD
+// TBD, need to change after CPLD spec release
+#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00)
+#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01)
+#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02)
+#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04)
+#define REG_MB_MUX_RESET (REG_BASE_MB + 0x46)
+#define REG_MB_MUX_CTRL (REG_BASE_MB + 0x5c)
+
+// I2C Alert
 #if CPU_TYPE == CPU_SKY
-#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x80)
+#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x80)
 #else
-#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x00)
-#define REG_ALERT_DISABLE                 (REG_BASE_I2C_ALERT + 0x11)
+#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x00)
+#define REG_ALERT_DISABLE (REG_BASE_I2C_ALERT + 0x11)
 #endif
 
-#define MASK_ALL                          (0xFF)
-#define LPC_MDELAY                        (5)
+#define MASK_ALL (0xFF)
+#define LPC_MDELAY (5)
 
 /* LPC sysfs attributes index  */
-enum lpc_sysfs_attributes {
-    //CPU CPLD
+enum lpc_sysfs_attributes
+{
+    // CPU CPLD
     ATT_CPU_CPLD_VERSION,
     ATT_CPU_CPLD_VERSION_H,
     ATT_CPU_BIOS_BOOT_ROM,
     ATT_CPU_BIOS_BOOT_CFG,
     ATT_CPU_CPLD_BUILD,
-    //MB CPLD
+    // MB CPLD
     ATT_MB_BRD_ID_0,
     ATT_MB_BRD_ID_1,
     ATT_MB_CPLD_1_VERSION,
@@ -102,21 +104,23 @@ enum lpc_sysfs_attributes {
     ATT_MB_BRD_ID_TYPE,
     ATT_MB_BRD_BUILD_ID,
     ATT_MB_BRD_DEPH_ID,
-    //I2C Alert
+    // I2C Alert
     ATT_ALERT_STATUS,
 #if CPU_TYPE == CPU_BDE
     ATT_ALERT_DISABLE,
 #endif
-    //BSP
+    // BSP
     ATT_BSP_VERSION,
     ATT_BSP_DEBUG,
     ATT_BSP_PR_INFO,
     ATT_BSP_PR_ERR,
     ATT_BSP_REG,
+    ATT_BSP_GPIO_MAX,
     ATT_MAX
 };
 
-enum bsp_log_types {
+enum bsp_log_types
+{
     LOG_NONE,
     LOG_RW,
     LOG_READ,
@@ -124,30 +128,33 @@ enum bsp_log_types {
     LOG_SYS
 };
 
-enum bsp_log_ctrl {
+enum bsp_log_ctrl
+{
     LOG_DISABLE,
     LOG_ENABLE
 };
 
-struct lpc_data_s {
-    struct mutex    access_lock;
+struct lpc_data_s
+{
+    struct mutex access_lock;
 };
 
 struct lpc_data_s *lpc_data;
-char bsp_version[16]="";
-char bsp_debug[2]="0";
-char bsp_reg[8]="0x0";
-u8 enable_log_read=LOG_DISABLE;
-u8 enable_log_write=LOG_DISABLE;
-u8 enable_log_sys=LOG_ENABLE;
+char bsp_version[16] = "";
+char bsp_debug[2] = "0";
+char bsp_reg[8] = "0x0";
+u8 enable_log_read = LOG_DISABLE;
+u8 enable_log_write = LOG_DISABLE;
+u8 enable_log_sys = LOG_ENABLE;
 
 /* reg shift */
 static u8 _shift(u8 mask)
 {
-    int i=0, mask_one=1;
+    int i = 0, mask_one = 1;
 
-    for(i=0; i<8; ++i) {
-        if((mask & mask_one) == 1)
+    for (i = 0; i < 8; ++i)
+    {
+        if ((mask & mask_one) == 1)
             return i;
         else
             mask >>= 1;
@@ -159,7 +166,7 @@ static u8 _shift(u8 mask)
 /* reg mask and shift */
 static u8 _mask_shift(u8 val, u8 mask)
 {
-    int shift=0;
+    int shift = 0;
 
     shift = _shift(mask);
 
@@ -168,7 +175,7 @@ static u8 _mask_shift(u8 val, u8 mask)
 
 static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
 {
-    if(bit_val == 0)
+    if (bit_val == 0)
         reg_val = reg_val & ~(1 << bit);
     else
         reg_val = reg_val | (1 << bit);
@@ -177,9 +184,10 @@ static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
 
 static int _bsp_log(u8 log_type, char *fmt, ...)
 {
-    if((log_type==LOG_READ  && enable_log_read) ||
-        (log_type==LOG_WRITE && enable_log_write) ||
-        (log_type==LOG_SYS && enable_log_sys) ) {
+    if ((log_type == LOG_READ && enable_log_read) ||
+        (log_type == LOG_WRITE && enable_log_write) ||
+        (log_type == LOG_SYS && enable_log_sys))
+    {
         va_list args;
         int r;
 
@@ -188,32 +196,35 @@ static int _bsp_log(u8 log_type, char *fmt, ...)
         va_end(args);
 
         return r;
-    } else {
+    }
+    else
+    {
         return 0;
     }
 }
 
 static int _config_bsp_log(u8 log_type)
 {
-    switch(log_type) {
-        case LOG_NONE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_RW:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        case LOG_READ:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_WRITE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        default:
-            return -EINVAL;
+    switch (log_type)
+    {
+    case LOG_NONE:
+        enable_log_read = LOG_DISABLE;
+        enable_log_write = LOG_DISABLE;
+        break;
+    case LOG_RW:
+        enable_log_read = LOG_ENABLE;
+        enable_log_write = LOG_ENABLE;
+        break;
+    case LOG_READ:
+        enable_log_read = LOG_ENABLE;
+        enable_log_write = LOG_DISABLE;
+        break;
+    case LOG_WRITE:
+        enable_log_read = LOG_DISABLE;
+        enable_log_write = LOG_ENABLE;
+        break;
+    default:
+        return -EINVAL;
     }
     return 0;
 }
@@ -224,7 +235,7 @@ static u8 _read_lpc_reg(u16 reg, u8 mask)
     u8 reg_val;
 
     mutex_lock(&lpc_data->access_lock);
-    reg_val=_mask_shift(inb(reg), mask);
+    reg_val = _mask_shift(inb(reg), mask);
     mutex_unlock(&lpc_data->access_lock);
 
     BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
@@ -236,10 +247,10 @@ static u8 _read_lpc_reg(u16 reg, u8 mask)
 static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf)
 {
     u8 reg_val;
-    int len=0;
+    int len = 0;
 
     reg_val = _read_lpc_reg(reg, mask);
-    len=sprintf(buf,"0x%x\n", reg_val);
+    len = sprintf(buf, "0x%x\n", reg_val);
 
     return len;
 }
@@ -249,11 +260,12 @@ static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
 {
     u8 reg_val, reg_val_now, shift;
 
-    if(kstrtou8(buf, 0, &reg_val) < 0)
+    if (kstrtou8(buf, 0, &reg_val) < 0)
         return -EINVAL;
 
-    //apply SINGLE BIT operation if mask is specified, multiple bits are not supported
-    if(mask != MASK_ALL) {
+    // apply SINGLE BIT operation if mask is specified, multiple bits are not supported
+    if (mask != MASK_ALL)
+    {
         reg_val_now = _read_lpc_reg(reg, 0x0);
         shift = _shift(mask);
         reg_val = _bit_operation(reg_val_now, shift, reg_val);
@@ -274,10 +286,10 @@ static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
 /* get bsp value */
 static ssize_t read_bsp(char *buf, char *str)
 {
-    ssize_t len=0;
+    ssize_t len = 0;
 
     mutex_lock(&lpc_data->access_lock);
-    len=sprintf(buf, "%s", str);
+    len = sprintf(buf, "%s", str);
     mutex_unlock(&lpc_data->access_lock);
 
     BSP_LOG_R("reg_val=%s", str);
@@ -299,9 +311,9 @@ static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t coun
 
 /* get cpu cpld version in human readable format */
 static ssize_t read_cpu_cpld_version_h(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                       struct device_attribute *da, char *buf)
 {
-    ssize_t len=0;
+    ssize_t len = 0;
     u16 reg = REG_CPU_CPLD_VERSION;
     u8 mask = MASK_ALL;
     u8 mask_major = 0b11000000;
@@ -325,9 +337,9 @@ static ssize_t read_cpu_cpld_version_h(struct device *dev,
 
 /* get mb cpld version in human readable format */
 static ssize_t read_mb_cpld_1_version_h(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                        struct device_attribute *da, char *buf)
 {
-    ssize_t len=0;
+    ssize_t len = 0;
     u16 reg = REG_MB_CPLD_VERSION;
     u8 mask = MASK_ALL;
     u8 mask_major = 0b11000000;
@@ -351,7 +363,7 @@ static ssize_t read_mb_cpld_1_version_h(struct device *dev,
 
 /* get mux_reset register value */
 static ssize_t read_mux_reset_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                       struct device_attribute *da, char *buf)
 {
     int len = 0;
     u16 reg = REG_MB_MUX_RESET;
@@ -359,9 +371,9 @@ static ssize_t read_mux_reset_callback(struct device *dev,
     u8 reg_val;
 
     mutex_lock(&lpc_data->access_lock);
-    reg_val=_mask_shift(inb(reg), mask);
+    reg_val = _mask_shift(inb(reg), mask);
     BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
-    len=sprintf(buf, "%d\n", reg_val);
+    len = sprintf(buf, "%d\n", reg_val);
     mutex_unlock(&lpc_data->access_lock);
 
     return len;
@@ -369,7 +381,7 @@ static ssize_t read_mux_reset_callback(struct device *dev,
 
 /* set mux_reset register value */
 static ssize_t write_mux_reset_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                        struct device_attribute *da, const char *buf, size_t count)
 {
     u8 val = 0;
     u16 reg = REG_MB_MUX_RESET;
@@ -377,11 +389,13 @@ static ssize_t write_mux_reset_callback(struct device *dev,
     u8 mask = 0b00011111;
     static int mux_reset_flag = 0;
 
-    if(kstrtou8(buf, 0, &val) < 0)
+    if (kstrtou8(buf, 0, &val) < 0)
         return -EINVAL;
 
-    if(mux_reset_flag == 0) {
-        if(val == 0) {
+    if (mux_reset_flag == 0)
+    {
+        if (val == 0)
+        {
             mutex_lock(&lpc_data->access_lock);
             mux_reset_flag = 1;
             BSP_LOG_W("i2c mux reset is triggered...");
@@ -397,10 +411,14 @@ static ssize_t write_mux_reset_callback(struct device *dev,
             mdelay(500);
             mux_reset_flag = 0;
             mutex_unlock(&lpc_data->access_lock);
-        } else {
+        }
+        else
+        {
             return -EINVAL;
         }
-    } else {
+    }
+    else
+    {
         BSP_LOG_W("i2c mux is resetting... (ignore)");
         mutex_lock(&lpc_data->access_lock);
         mutex_unlock(&lpc_data->access_lock);
@@ -411,165 +429,173 @@ static ssize_t write_mux_reset_callback(struct device *dev,
 
 /* get lpc register value */
 static ssize_t read_lpc_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                 struct device_attribute *da, char *buf)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     u16 reg = 0;
     u8 mask = MASK_ALL;
 
-    switch(attr->index) {
-        //CPU CPLD
-        case ATT_CPU_CPLD_VERSION:
-            reg = REG_CPU_CPLD_VERSION;
-            break;
-        case ATT_CPU_BIOS_BOOT_ROM:
-            reg = REG_CPU_STATUS_1;
-            mask = 0x80;
-            break;
-        case ATT_CPU_BIOS_BOOT_CFG:
-            reg = REG_CPU_CTRL_1;
-            mask = 0x80;
-            break;
-        case ATT_CPU_CPLD_BUILD:
-            reg = REG_CPU_CPLD_BUILD;
-            break;
-        //MB CPLD
-        case ATT_MB_BRD_ID_0:
-            reg = REG_MB_BRD_ID_0;
-            break;
-        case ATT_MB_BRD_ID_1:
-            reg = REG_MB_BRD_ID_1;
-            break;
-        case ATT_MB_CPLD_1_VERSION:
-            reg = REG_MB_CPLD_VERSION;
-            break;
-        case ATT_MB_CPLD_1_BUILD:
-            reg = REG_MB_CPLD_BUILD;
-            break;
-        case ATT_MB_BRD_SKU_ID:
-            reg = REG_MB_BRD_ID_0;
-            mask = 0xFF;
-            break;
-        case ATT_MB_BRD_HW_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x03;
-            break;
-        case ATT_MB_BRD_ID_TYPE:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x80;
-            break;
-        case ATT_MB_BRD_BUILD_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x38;
-            break;
-        case ATT_MB_BRD_DEPH_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x04;
-            break;
-        case ATT_MB_MUX_CTRL:
-            reg = REG_MB_MUX_CTRL;
-            break;
-        //I2C Alert
-        case ATT_ALERT_STATUS:
-            reg = REG_ALERT_STATUS;
-            mask = 0x20;
-            break;
+    switch (attr->index)
+    {
+    // CPU CPLD
+    case ATT_CPU_CPLD_VERSION:
+        reg = REG_CPU_CPLD_VERSION;
+        break;
+    case ATT_CPU_BIOS_BOOT_ROM:
+        reg = REG_CPU_STATUS_1;
+        mask = 0x80;
+        break;
+    case ATT_CPU_BIOS_BOOT_CFG:
+        reg = REG_CPU_CTRL_1;
+        mask = 0x80;
+        break;
+    case ATT_CPU_CPLD_BUILD:
+        reg = REG_CPU_CPLD_BUILD;
+        break;
+    // MB CPLD
+    case ATT_MB_BRD_ID_0:
+        reg = REG_MB_BRD_ID_0;
+        break;
+    case ATT_MB_BRD_ID_1:
+        reg = REG_MB_BRD_ID_1;
+        break;
+    case ATT_MB_CPLD_1_VERSION:
+        reg = REG_MB_CPLD_VERSION;
+        break;
+    case ATT_MB_CPLD_1_BUILD:
+        reg = REG_MB_CPLD_BUILD;
+        break;
+    case ATT_MB_BRD_SKU_ID:
+        reg = REG_MB_BRD_ID_0;
+        mask = 0xFF;
+        break;
+    case ATT_MB_BRD_HW_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x03;
+        break;
+    case ATT_MB_BRD_ID_TYPE:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x80;
+        break;
+    case ATT_MB_BRD_BUILD_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x38;
+        break;
+    case ATT_MB_BRD_DEPH_ID:
+        reg = REG_MB_BRD_ID_1;
+        mask = 0x04;
+        break;
+    case ATT_MB_MUX_CTRL:
+        reg = REG_MB_MUX_CTRL;
+        break;
+    // I2C Alert
+    case ATT_ALERT_STATUS:
+        reg = REG_ALERT_STATUS;
+        mask = 0x20;
+        break;
 #if CPU_TYPE == CPU_BDE
-        case ATT_ALERT_DISABLE:
-            reg = REG_ALERT_DISABLE;
-            mask = 0x04;
-            break;
+    case ATT_ALERT_DISABLE:
+        reg = REG_ALERT_DISABLE;
+        mask = 0x04;
+        break;
 #endif
-        //BSP
-        case ATT_BSP_REG:
-            if(kstrtou16(bsp_reg, 0, &reg) < 0)
-                return -EINVAL;
-            break;
-        default:
+    // BSP
+    case ATT_BSP_REG:
+        if (kstrtou16(bsp_reg, 0, &reg) < 0)
             return -EINVAL;
+        break;
+    default:
+        return -EINVAL;
     }
     return read_lpc_reg(reg, mask, buf);
 }
 
 /* set lpc register value */
 static ssize_t write_lpc_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                  struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     u16 reg = 0;
     u8 mask = MASK_ALL;
 
-    switch(attr->index) {
-        case ATT_MB_MUX_CTRL:
-            reg = REG_MB_MUX_CTRL;
-            break;
-        default:
-            return -EINVAL;
+    switch (attr->index)
+    {
+    case ATT_MB_MUX_CTRL:
+        reg = REG_MB_MUX_CTRL;
+        break;
+    default:
+        return -EINVAL;
     }
     return write_lpc_reg(reg, mask, buf, count);
 }
 
 /* get bsp parameter value */
 static ssize_t read_bsp_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
+                                 struct device_attribute *da, char *buf)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
-
-    switch(attr->index) {
-        case ATT_BSP_VERSION:
-            str = bsp_version;
-            str_len = sizeof(bsp_version);
-            break;
-        case ATT_BSP_DEBUG:
-            str = bsp_debug;
-            str_len = sizeof(bsp_debug);
-            break;
-        case ATT_BSP_REG:
-            str = bsp_reg;
-            str_len = sizeof(bsp_reg);
-            break;
-        default:
-            return -EINVAL;
+    int str_len = 0;
+    char *str = NULL;
+
+    switch (attr->index)
+    {
+    case ATT_BSP_VERSION:
+        str = bsp_version;
+        str_len = sizeof(bsp_version);
+        break;
+    case ATT_BSP_DEBUG:
+        str = bsp_debug;
+        str_len = sizeof(bsp_debug);
+        break;
+    case ATT_BSP_REG:
+        str = bsp_reg;
+        str_len = sizeof(bsp_reg);
+        break;
+    default:
+        return -EINVAL;
     }
     return read_bsp(buf, str);
 }
 
 /* set bsp parameter value */
 static ssize_t write_bsp_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                  struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
+    int str_len = 0;
+    char *str = NULL;
     u16 reg = 0;
     u8 bsp_debug_u8 = 0;
 
-    switch(attr->index) {
-        case ATT_BSP_VERSION:
-            str = bsp_version;
-            str_len = sizeof(bsp_version);
-            break;
-        case ATT_BSP_DEBUG:
-            str = bsp_debug;
-            str_len = sizeof(bsp_debug);
-            break;
-        case ATT_BSP_REG:
-            if(kstrtou16(buf, 0, &reg) < 0)
-                return -EINVAL;
-
-            str = bsp_reg;
-            str_len = sizeof(bsp_reg);
-            break;
-        default:
+    switch (attr->index)
+    {
+    case ATT_BSP_VERSION:
+        str = bsp_version;
+        str_len = sizeof(bsp_version);
+        break;
+    case ATT_BSP_DEBUG:
+        str = bsp_debug;
+        str_len = sizeof(bsp_debug);
+        break;
+    case ATT_BSP_REG:
+        if (kstrtou16(buf, 0, &reg) < 0)
             return -EINVAL;
+
+        str = bsp_reg;
+        str_len = sizeof(bsp_reg);
+        break;
+    default:
+        return -EINVAL;
     }
 
-    if(attr->index == ATT_BSP_DEBUG) {
-        if(kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+    if (attr->index == ATT_BSP_DEBUG)
+    {
+        if (kstrtou8(buf, 0, &bsp_debug_u8) < 0)
+        {
             return -EINVAL;
-        } else if(_config_bsp_log(bsp_debug_u8) < 0) {
+        }
+        else if (_config_bsp_log(bsp_debug_u8) < 0)
+        {
             return -EINVAL;
         }
     }
@@ -578,58 +604,74 @@ static ssize_t write_bsp_callback(struct device *dev,
 }
 
 static ssize_t write_bsp_pr_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
+                                     struct device_attribute *da, const char *buf, size_t count)
 {
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     int str_len = strlen(buf);
 
-    if(str_len <= 0)
+    if (str_len <= 0)
         return str_len;
 
-    switch (attr->index) {
-        case ATT_BSP_PR_INFO:
-            BSP_PR(KERN_INFO, "%s", buf);
-            break;
-        case ATT_BSP_PR_ERR:
-            BSP_PR(KERN_ERR, "%s", buf);
-            break;
-        default:
-            return -EINVAL;
+    switch (attr->index)
+    {
+    case ATT_BSP_PR_INFO:
+        BSP_PR(KERN_INFO, "%s", buf);
+        break;
+    case ATT_BSP_PR_ERR:
+        BSP_PR(KERN_ERR, "%s", buf);
+        break;
+    default:
+        return -EINVAL;
     }
 
     return str_len;
 }
 
-//SENSOR_DEVICE_ATTR - CPU
+/* get gpio max value */
+static ssize_t read_gpio_max(struct device *dev,
+                             struct device_attribute *da,
+                             char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    if (attr->index == ATT_BSP_GPIO_MAX)
+    {
+        return sprintf(buf, "%d\n", ARCH_NR_GPIOS - 1);
+    }
+    return -1;
+}
+
+// SENSOR_DEVICE_ATTR - CPU
 static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION);
 static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H);
-static SENSOR_DEVICE_ATTR(boot_rom,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM);
-static SENSOR_DEVICE_ATTR(boot_cfg,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG);
-static SENSOR_DEVICE_ATTR(cpu_cpld_build,   S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD);
-//SENSOR_DEVICE_ATTR - MB
-static SENSOR_DEVICE_ATTR(board_id_0,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
-static SENSOR_DEVICE_ATTR(board_id_1,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
+static SENSOR_DEVICE_ATTR(boot_rom, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM);
+static SENSOR_DEVICE_ATTR(boot_cfg, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG);
+static SENSOR_DEVICE_ATTR(cpu_cpld_build, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD);
+// SENSOR_DEVICE_ATTR - MB
+static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
+static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
 static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
 static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H);
-static SENSOR_DEVICE_ATTR(mb_cpld_1_build,  S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD);
-static SENSOR_DEVICE_ATTR(mux_ctrl,         S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL);
-static SENSOR_DEVICE_ATTR(mux_reset,        S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET);
-static SENSOR_DEVICE_ATTR(board_sku_id,     S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
-static SENSOR_DEVICE_ATTR(board_hw_id,      S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
-static SENSOR_DEVICE_ATTR(board_id_type,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
-static SENSOR_DEVICE_ATTR(board_build_id,   S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
-static SENSOR_DEVICE_ATTR(board_deph_id,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
-//SENSOR_DEVICE_ATTR - I2C Alert
-static SENSOR_DEVICE_ATTR(alert_status,     S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_build, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD);
+static SENSOR_DEVICE_ATTR(mux_ctrl, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL);
+static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET);
+static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
+static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
+static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
+static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
+static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
+// SENSOR_DEVICE_ATTR - I2C Alert
+static SENSOR_DEVICE_ATTR(alert_status, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS);
 #if CPU_TYPE == CPU_BDE
-static SENSOR_DEVICE_ATTR(alert_disable,    S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE);
+static SENSOR_DEVICE_ATTR(alert_disable, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE);
 #endif
-//SENSOR_DEVICE_ATTR - BSP
-static SENSOR_DEVICE_ATTR(bsp_version,      S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
-static SENSOR_DEVICE_ATTR(bsp_debug,        S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
-static SENSOR_DEVICE_ATTR(bsp_pr_info,      S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO);
-static SENSOR_DEVICE_ATTR(bsp_pr_err,       S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR);
-static SENSOR_DEVICE_ATTR(bsp_reg,          S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
+// SENSOR_DEVICE_ATTR - BSP
+static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
+static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
+static SENSOR_DEVICE_ATTR(bsp_pr_info, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO);
+static SENSOR_DEVICE_ATTR(bsp_pr_err, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR);
+static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
+static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO, read_gpio_max, NULL, ATT_BSP_GPIO_MAX);
 
 static struct attribute *cpu_cpld_attrs[] = {
     &sensor_dev_attr_cpu_cpld_version.dev_attr.attr,
@@ -674,6 +716,7 @@ static struct attribute *bsp_attrs[] = {
     &sensor_dev_attr_bsp_pr_info.dev_attr.attr,
     &sensor_dev_attr_bsp_pr_err.dev_attr.attr,
     &sensor_dev_attr_bsp_reg.dev_attr.attr,
+    &sensor_dev_attr_bsp_gpio_max.dev_attr.attr,
     NULL,
 };
 
@@ -702,18 +745,17 @@ static struct attribute_group bsp_attr_grp = {
     .attrs = bsp_attrs,
 };
 
-static void lpc_dev_release( struct device * dev)
+static void lpc_dev_release(struct device *dev)
 {
     return;
 }
 
 static struct platform_device lpc_dev = {
-    .name           = DRIVER_NAME,
-    .id             = -1,
+    .name = DRIVER_NAME,
+    .id = -1,
     .dev = {
-                    .release = lpc_dev_release,
-    }
-};
+        .release = lpc_dev_release,
+    }};
 
 static int lpc_drv_probe(struct platform_device *pdev)
 {
@@ -723,37 +765,42 @@ static int lpc_drv_probe(struct platform_device *pdev)
 
     lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s),
                             GFP_KERNEL);
-    if(!lpc_data)
+    if (!lpc_data)
         return -ENOMEM;
 
     mutex_init(&lpc_data->access_lock);
 
-    for (i=0; i<grp_num; ++i) {
-        switch(i) {
-            case 0:
-                grp = &cpu_cpld_attr_grp;
-                break;
-            case 1:
-                grp = &mb_cpld_attr_grp;
-                break;
-            case 2:
-                grp = &bios_attr_grp;
-                break;
-            case 3:
-                grp = &i2c_alert_attr_grp;
-                break;
-            case 4:
-                grp = &bsp_attr_grp;
-                break;
-            default:
-                break;
+    for (i = 0; i < grp_num; ++i)
+    {
+        switch (i)
+        {
+        case 0:
+            grp = &cpu_cpld_attr_grp;
+            break;
+        case 1:
+            grp = &mb_cpld_attr_grp;
+            break;
+        case 2:
+            grp = &bios_attr_grp;
+            break;
+        case 3:
+            grp = &i2c_alert_attr_grp;
+            break;
+        case 4:
+            grp = &bsp_attr_grp;
+            break;
+        default:
+            break;
         }
 
         err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
-        if(err[i]) {
+        if (err[i])
+        {
             printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
             goto exit;
-        } else {
+        }
+        else
+        {
             continue;
         }
     }
@@ -761,33 +808,38 @@ static int lpc_drv_probe(struct platform_device *pdev)
     return 0;
 
 exit:
-    for (i=0; i<grp_num; ++i) {
-        switch(i) {
-            case 0:
-                grp = &cpu_cpld_attr_grp;
-                break;
-            case 1:
-                grp = &mb_cpld_attr_grp;
-                break;
-            case 2:
-                grp = &bios_attr_grp;
-                break;
-            case 3:
-                grp = &i2c_alert_attr_grp;
-                break;
-            case 4:
-                grp = &bsp_attr_grp;
-                break;
-            default:
-                break;
+    for (i = 0; i < grp_num; ++i)
+    {
+        switch (i)
+        {
+        case 0:
+            grp = &cpu_cpld_attr_grp;
+            break;
+        case 1:
+            grp = &mb_cpld_attr_grp;
+            break;
+        case 2:
+            grp = &bios_attr_grp;
+            break;
+        case 3:
+            grp = &i2c_alert_attr_grp;
+            break;
+        case 4:
+            grp = &bsp_attr_grp;
+            break;
+        default:
+            break;
         }
 
         sysfs_remove_group(&pdev->dev.kobj, grp);
-        if(!err[i]) {
-            //remove previous successful cases
+        if (!err[i])
+        {
+            // remove previous successful cases
             continue;
-        } else {
-            //remove first failed case, then return
+        }
+        else
+        {
+            // remove first failed case, then return
             return err[i];
         }
     }
@@ -806,10 +858,10 @@ static int lpc_drv_remove(struct platform_device *pdev)
 }
 
 static struct platform_driver lpc_drv = {
-    .probe  = lpc_drv_probe,
+    .probe = lpc_drv_probe,
     .remove = __exit_p(lpc_drv_remove),
     .driver = {
-    .name   = DRIVER_NAME,
+        .name = DRIVER_NAME,
     },
 };
 
@@ -818,17 +870,19 @@ int lpc_init(void)
     int err = 0;
 
     err = platform_driver_register(&lpc_drv);
-    if(err) {
+    if (err)
+    {
         printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
-                __func__, __LINE__, err);
+               __func__, __LINE__, err);
 
         return err;
     }
 
     err = platform_device_register(&lpc_dev);
-    if(err) {
+    if (err)
+    {
         printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
-                __func__, __LINE__, err);
+               __func__, __LINE__, err);
         platform_driver_unregister(&lpc_drv);
         return err;
     }
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/Makefile
new file mode 100644
index 00000000000..dbc37edc86c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/Makefile
@@ -0,0 +1,8 @@
+
+x86-64-ufispace-s9321-64e-cpld-objs := x86-64-ufispace-s9321-64e-cpld-main.o x86-64-ufispace-s9321-64e-cpld-mux.o
+MODULE_NAME  = x86-64-ufispace-s9321-64e-cpld.o x86-64-ufispace-s9321-64e-sys-eeprom.o x86-64-ufispace-s9321-64e-lpc.o pddf_custom_sysstatus_module.o pddf_custom_cpldmux_driver.o
+obj-m       := $(MODULE_NAME)
+
+CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include
+CFLAGS_pddf_custom_cpldmux_driver.o := -I$(M)/../../../../pddf/i2c/modules/include
+KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/pddf_custom_cpldmux_driver.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/pddf_custom_cpldmux_driver.c
new file mode 100644
index 00000000000..6ec4b192371
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/pddf_custom_cpldmux_driver.c
@@ -0,0 +1,87 @@
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/dmi.h>
+#include "pddf_cpldmux_defs.h"
+
+extern PDDF_CPLDMUX_OPS pddf_cpldmux_ops;
+
+/* NOTE: Never use i2c_smbus_write_byte_data() or i2c_smbus_xfer() since these operations
+ * locks the parent bus which might lead to mutex deadlock.
+ */
+static int cpldmux_byte_write(struct i2c_client *client, u8 regaddr, u8 val)
+{
+    union i2c_smbus_data data;
+
+    data.byte = val;
+    return client->adapter->algo->smbus_xfer(client->adapter, client->addr,
+                                             client->flags,
+                                             I2C_SMBUS_WRITE,
+                                             regaddr, I2C_SMBUS_BYTE_DATA, &data);
+}
+
+int pddf_cpldmux_select(struct i2c_mux_core *muxc, uint32_t chan)
+{
+    PDDF_CPLDMUX_PRIV_DATA  *private = i2c_mux_priv(muxc);
+    PDDF_CPLDMUX_PDATA *pdata = NULL;
+    PDDF_CPLDMUX_CHAN_DATA *sdata = NULL;
+    int ret = 0;
+
+    /* Select the chan_data based upon the chan */
+    pdata = &private->data;
+    if (chan>=pdata->num_chan)
+    {
+        printk(KERN_ERR "%s: wrong channel number %d, supported channels %d\n",__FUNCTION__, chan, pdata->num_chan);
+        return 0;
+    }
+
+    if ( (pdata->chan_cache!=1) || (private->last_chan!=chan) )
+    {
+        sdata = &pdata->chan_data[chan];
+        // pddf_dbg(CPLDMUX, KERN_INFO "%s: Writing 0x%x at 0x%x offset of cpld 0x%x to enable chan %d\n", __FUNCTION__, sdata->cpld_sel, sdata->cpld_offset, sdata->cpld_devaddr, chan);
+        ret =  cpldmux_byte_write(pdata->cpld, sdata->cpld_offset,  (uint8_t)(sdata->cpld_sel & 0xff));
+        private->last_chan = chan;
+    }
+
+    return ret;
+}
+
+int pddf_cpldmux_deselect(struct i2c_mux_core *muxc, uint32_t chan)
+{
+    PDDF_CPLDMUX_PRIV_DATA  *private = i2c_mux_priv(muxc);
+    PDDF_CPLDMUX_PDATA *pdata = NULL;
+    PDDF_CPLDMUX_CHAN_DATA *sdata = NULL;
+    int ret = 0;
+
+    /* Select the chan_data based upon the chan */
+    pdata = &private->data;
+    if (chan>=pdata->num_chan)
+    {
+        printk(KERN_ERR "%s: wrong channel number %d, supported channels %d\n",__FUNCTION__, chan, pdata->num_chan);
+        return 0;
+    }
+    sdata = &pdata->chan_data[chan];
+
+    // pddf_dbg(CPLDMUX, KERN_INFO "%s: Writing 0x%x at 0x%x offset of cpld 0x%x to disable chan %d", __FUNCTION__, sdata->cpld_desel, sdata->cpld_offset, sdata->cpld_devaddr, chan);
+    ret = cpldmux_byte_write(pdata->cpld, sdata->cpld_offset,  (uint8_t)(sdata->cpld_desel));
+    return ret;
+}
+
+static int __init pddf_custom_cpldmux_init(void)
+{
+    pddf_cpldmux_ops.select = pddf_cpldmux_select;
+    pddf_cpldmux_ops.deselect = pddf_cpldmux_deselect;
+    return 0;
+}
+
+static void __exit pddf_custom_cpldmux_exit(void)
+{
+    return;
+}
+
+MODULE_AUTHOR("Nonodark Huang");
+MODULE_DESCRIPTION("custom board_i2c_cpldmux driver");
+MODULE_LICENSE("GPL");
+
+module_init(pddf_custom_cpldmux_init);
+module_exit(pddf_custom_cpldmux_exit);
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/pddf_custom_sysstatus_module.c
new file mode 100644
index 00000000000..de08fd3147a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/pddf_custom_sysstatus_module.c
@@ -0,0 +1,327 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * A pddf kernel module for system status registers
+ */
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/dmi.h>
+#include <linux/kobject.h>
+#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h"
+#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h"
+
+#define _memset(s, c, n) memset(s, c, n)
+
+SYSSTATUS_DATA sysstatus_data = {0};
+
+extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+
+static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf);
+ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+
+
+PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32,
+             (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL);
+PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t),  (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL);
+PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL);
+PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL);
+PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL);
+PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL);
+
+
+
+static struct attribute *sysstatus_addr_attributes[] = {
+    &attr_attr_name.dev_attr.attr,
+    &attr_attr_devaddr.dev_attr.attr,
+    &attr_attr_offset.dev_attr.attr,
+    &attr_attr_mask.dev_attr.attr,
+    &attr_attr_len.dev_attr.attr,
+    &attr_attr_ops.dev_attr.attr,
+    NULL
+};
+
+PDDF_DATA_ATTR(board_sku_id   , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(board_hw_id    , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(board_deph_id  , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(board_build_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld1_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld1_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld1_build    , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_build    , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_build    , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(fpga_major_ver , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(fpga_minor_ver , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(fpga_build     , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(psu_status     , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(system_led_sys_fan , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(system_led_psu , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(system_led_sync, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_i2c_ctrl , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_i2c_ctrl , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld_mac_rov   , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld1_evt_ctrl , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_evt_ctrl , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_evt_ctrl , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(fpga_evt_ctrl  , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld_port_led_clr , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+
+
+
+
+static struct attribute *sysstatus_data_attributes[] = {
+    &attr_board_sku_id.dev_attr.attr,
+    &attr_board_hw_id.dev_attr.attr,
+    &attr_board_deph_id.dev_attr.attr,
+    &attr_board_build_id.dev_attr.attr,
+    &attr_cpld1_major_ver.dev_attr.attr,
+    &attr_cpld1_minor_ver.dev_attr.attr,
+    &attr_cpld1_build.dev_attr.attr,
+    &attr_cpld2_major_ver.dev_attr.attr,
+    &attr_cpld2_minor_ver.dev_attr.attr,
+    &attr_cpld2_build.dev_attr.attr,
+    &attr_cpld3_major_ver.dev_attr.attr,
+    &attr_cpld3_minor_ver.dev_attr.attr,
+    &attr_cpld3_build.dev_attr.attr,
+    &attr_fpga_major_ver.dev_attr.attr,
+    &attr_fpga_minor_ver.dev_attr.attr,
+    &attr_fpga_build.dev_attr.attr,
+    &attr_psu_status.dev_attr.attr,
+    &attr_system_led_sys_fan.dev_attr.attr,
+    &attr_system_led_psu.dev_attr.attr,
+    &attr_system_led_sync.dev_attr.attr,
+    &attr_cpld2_i2c_ctrl.dev_attr.attr,
+    &attr_cpld3_i2c_ctrl.dev_attr.attr,
+    &attr_cpld_mac_rov.dev_attr.attr,
+    &attr_cpld1_evt_ctrl.dev_attr.attr,
+    &attr_cpld2_evt_ctrl.dev_attr.attr,
+    &attr_cpld3_evt_ctrl.dev_attr.attr,
+    &attr_fpga_evt_ctrl.dev_attr.attr,
+    &attr_cpld_port_led_clr.dev_attr.attr,
+    NULL
+};
+
+
+static const struct attribute_group pddf_sysstatus_addr_group = {
+    .attrs = sysstatus_addr_attributes,
+};
+
+
+static const struct attribute_group pddf_sysstatus_data_group = {
+    .attrs = sysstatus_data_attributes,
+};
+
+
+static struct kobject *sysstatus_addr_kobj;
+static struct kobject *sysstatus_data_kobj;
+
+/* reg shift */
+static u8 _shift(u8 mask)
+{
+    int i=0, mask_one=1;
+
+    for(i=0; i<8; ++i) {
+        if ((mask & mask_one) == 1)
+            return i;
+        else
+            mask >>= 1;
+    }
+
+    return -1;
+}
+
+/* reg mask and shift */
+static u8 _mask_shift(u8 val, u8 mask)
+{
+    int shift=0;
+
+    shift = _shift(mask);
+    return (val & mask) >> shift;
+}
+
+ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf)
+{
+
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    SYSSTATUS_DATA *data = &sysstatus_data;
+    struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL;
+    int i, status ;
+
+
+    for (i=0;i<MAX_ATTRS;i++)
+    {
+        if (strcmp(data->sysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 )
+        {
+            sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i];
+
+        }
+    }
+
+    if (sysstatus_addr_attrs==NULL )
+    {
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
+        status = 0;
+        return sprintf(buf, "0x%x\n", status);
+    }
+    else
+    {
+        status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset);
+    }
+
+    return sprintf(buf, "0x%x\n", _mask_shift(status, sysstatus_addr_attrs->mask));
+
+}
+
+ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    SYSSTATUS_DATA *data = &sysstatus_data;
+    struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL;
+    int i, status ;
+    u8 reg_val;
+
+    for (i=0;i<MAX_ATTRS;i++)
+    {
+        if (strcmp(data->sysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 )
+        {
+            sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i];
+        }
+    }
+
+    if (sysstatus_addr_attrs==NULL)
+    {
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
+        return -EINVAL;
+    }
+    else
+    {
+        if (kstrtou8(buf, 0, &reg_val) < 0)
+            return -EINVAL;
+
+        status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val);
+
+        if (status!=0)
+        {
+            printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status);
+            return status;
+        }
+    }
+
+    return count;
+}
+
+
+
+static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    PDDF_ATTR *ptr = (PDDF_ATTR *)da;
+    SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr);
+
+    pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr;
+    pdata->len++;
+    pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname);
+
+#ifdef __STDC_LIB_EXT1__
+    memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
+#else
+    _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
+#endif
+
+    return count;
+}
+
+
+
+
+int __init sysstatus_data_init(void)
+{
+    struct kobject *device_kobj;
+    int ret = 0;
+
+
+    pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n");
+
+    device_kobj = get_device_i2c_kobj();
+    if(!device_kobj)
+        return -ENOMEM;
+
+    sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj);
+    if(!sysstatus_addr_kobj)
+        return -ENOMEM;
+
+    sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj);
+    if(!sysstatus_data_kobj)
+        return -ENOMEM;
+
+
+    ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+    if (ret)
+    {
+        kobject_put(sysstatus_addr_kobj);
+        return ret;
+    }
+
+    ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group);
+    if (ret)
+    {
+        sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+        kobject_put(sysstatus_data_kobj);
+        kobject_put(sysstatus_addr_kobj);
+        return ret;
+    }
+
+
+    return ret;
+}
+
+void __exit sysstatus_data_exit(void)
+{
+    pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS  MODULE.. exit\n");
+    sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group);
+    sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+    kobject_put(sysstatus_data_kobj);
+    kobject_put(sysstatus_addr_kobj);
+    pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__);
+    return;
+}
+
+module_init(sysstatus_data_init);
+module_exit(sysstatus_data_exit);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("SYSSTATUS platform data");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-cpld-main.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-cpld-main.c
new file mode 100644
index 00000000000..a3968ba1cc6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-cpld-main.c
@@ -0,0 +1,1771 @@
+/*
+ * A i2c cpld driver for the ufispace_s9321_64e
+ *
+ * Copyright (C) 2017-2019 UfiSpace Technology Corporation.
+ * Nonodark Huang <nonodark.huang@ufispace.com>
+ *
+ * Based on ad7414.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/dmi.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+
+
+#include "x86-64-ufispace-s9321-64e-cpld-main.h"
+
+bool mux_en = false;
+module_param(mux_en, bool, S_IWUSR|S_IRUSR);
+
+#if !defined(SENSOR_DEVICE_ATTR_RO)
+#define SENSOR_DEVICE_ATTR_RO(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0444, _func##_show, NULL, _index)
+#endif
+
+#if !defined(SENSOR_DEVICE_ATTR_RW)
+#define SENSOR_DEVICE_ATTR_RW(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0644, _func##_show, _func##_store, _index)
+
+#endif
+
+#if !defined(SENSOR_DEVICE_ATTR_WO)
+#define SENSOR_DEVICE_ATTR_WO(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0200, NULL, _func##_store, _index)
+#endif
+
+#ifdef DEBUG
+#define DEBUG_PRINT(fmt, args...) \
+    printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#else
+#define DEBUG_PRINT(fmt, args...)
+#endif
+
+#define BSP_LOG_R(fmt, args...) \
+    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...) \
+    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+
+#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \
+{ \
+    mutex_lock(lock); \
+    ret = i2c_smbus_read_byte_data(i2c_client, reg); \
+    mutex_unlock(lock); \
+    BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \
+}
+
+#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \
+{ \
+    mutex_lock(lock); \
+    ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \
+    mutex_unlock(lock); \
+    BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \
+}
+
+#define _DEVICE_ATTR(_name)     \
+    &sensor_dev_attr_##_name.dev_attr.attr
+
+/* CPLD sysfs attributes index  */
+enum cpld_sysfs_attributes {
+    // CPLD Common
+    CPLD_MINOR_VER,
+    CPLD_MAJOR_VER,
+    CPLD_ID,
+    CPLD_BUILD_VER,
+    CPLD_VERSION_H,
+    CPLD_EVT_CTRL,
+
+    // CPLD 1
+    CPLD_BOARD_ID_0,
+    CPLD_BOARD_ID_1,
+    CPLD_MAC_INTR,
+    CPLD_PHY_INTR,
+    CPLD_CPLDX_INTR,
+    CPLD_MAC_THERMAL_INTR,
+    CPLD_MISC_INTR,
+    CPLD_CPU_INTR,
+    CPLD_MAC_MASK,
+    CPLD_PHY_MASK,
+    CPLD_CPLDX_MASK,
+    CPLD_MAC_THERMAL_MASK,
+    CPLD_MISC_MASK,
+    CPLD_CPU_MASK,
+    CPLD_MAC_EVT,
+    CPLD_PHY_EVT,
+    CPLD_CPLDX_EVT,
+    CPLD_MAC_THERMAL_EVT,
+    CPLD_MISC_EVT,
+    CPLD_MAC_RESET,
+    CPLD_BMC_RESET,
+    CPLD_USB_RESET,
+    CPLD_MISC_RESET,
+    CPLD_BRD_PRESENT,
+    CPLD_PSU_STATUS,
+    CPLD_SYSTEM_PWR,
+    CPLD_MAC_SYNCE,
+    CPLD_MAC_ROV,
+    CPLD_MUX_CTRL,
+    CPLD_SYSTEM_LED_SYS,
+    CPLD_SYSTEM_LED_FAN,
+    CPLD_SYSTEM_LED_PSU_0,
+    CPLD_SYSTEM_LED_PSU_1,
+    CPLD_SYSTEM_LED_SYNC,
+    CPLD_MGMT_PORT_0_LED_STATUS,
+    CPLD_MGMT_PORT_0_LED_SPEED,
+    CPLD_MGMT_PORT_1_LED_STATUS,
+    CPLD_MGMT_PORT_1_LED_SPEED,
+    CPLD_PORT_LED_CLR,
+    CPLD_MISC_PWR,
+    DBG_CPLD_MAC_INTR,
+    DBG_CPLD_CPLDX_INTR,
+    DBG_CPLD_MAC_THERMAL_INTR,
+    DBG_CPLD_MISC_INTR,
+
+    //CPLD 2 and CPLD 3
+    CPLD_QSFPDD_PORT_0_7_16_23_INTR,
+    CPLD_QSFPDD_PORT_8_15_24_31_INTR,
+    CPLD_QSFPDD_PORT_32_39_48_55_INTR,
+    CPLD_QSFPDD_PORT_40_47_56_63_INTR,
+    CPLD_QSFPDD_PORT_0_7_16_23_PRES,
+    CPLD_QSFPDD_PORT_8_15_24_31_PRES,
+    CPLD_QSFPDD_PORT_32_39_48_55_PRES,
+    CPLD_QSFPDD_PORT_40_47_56_63_PRES,
+    CPLD_QSFPDD_PORT_0_15_16_31_FUSE,
+    CPLD_QSFPDD_PORT_32_47_48_63_FUSE,
+    CPLD_QSFPDD_PORT_0_7_16_23_STUCK,
+    CPLD_QSFPDD_PORT_8_15_24_31_STUCK,
+    CPLD_QSFPDD_PORT_32_39_48_55_STUCK,
+    CPLD_QSFPDD_PORT_40_47_56_63_STUCK,
+    CPLD_QSFPDD_PORT_0_7_16_23_INTR_MASK,
+    CPLD_QSFPDD_PORT_8_15_24_31_INTR_MASK,
+    CPLD_QSFPDD_PORT_32_39_48_55_INTR_MASK,
+    CPLD_QSFPDD_PORT_40_47_56_63_INTR_MASK,
+    CPLD_QSFPDD_PORT_0_7_16_23_PRES_MASK,
+    CPLD_QSFPDD_PORT_8_15_24_31_PRES_MASK,
+    CPLD_QSFPDD_PORT_32_39_48_55_PRES_MASK,
+    CPLD_QSFPDD_PORT_40_47_56_63_PRES_MASK,
+    CPLD_QSFPDD_PORT_0_15_16_31_FUSE_MASK,
+    CPLD_QSFPDD_PORT_32_47_48_63_FUSE_MASK,
+    CPLD_QSFPDD_PORT_0_7_16_23_STUCK_MASK,
+    CPLD_QSFPDD_PORT_8_15_24_31_STUCK_MASK,
+    CPLD_QSFPDD_PORT_32_39_48_55_STUCK_MASK,
+    CPLD_QSFPDD_PORT_40_47_56_63_STUCK_MASK,
+    CPLD_QSFPDD_PORT_0_7_16_23_INTR_EVENT,
+    CPLD_QSFPDD_PORT_8_15_24_31_INTR_EVENT,
+    CPLD_QSFPDD_PORT_32_39_48_55_INTR_EVENT,
+    CPLD_QSFPDD_PORT_40_47_56_63_INTR_EVENT,
+    CPLD_QSFPDD_PORT_0_7_16_23_PRES_EVENT,
+    CPLD_QSFPDD_PORT_8_15_24_31_PRES_EVENT,
+    CPLD_QSFPDD_PORT_32_39_48_55_PRES_EVENT,
+    CPLD_QSFPDD_PORT_40_47_56_63_PRES_EVENT,
+    CPLD_QSFPDD_PORT_0_15_16_31_FUSE_EVENT,
+    CPLD_QSFPDD_PORT_32_47_48_63_FUSE_EVENT,
+    CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT,
+    CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT,
+    CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT,
+    CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT,
+    CPLD_QSFPDD_PORT_0_7_16_23_RST,
+    CPLD_QSFPDD_PORT_8_15_24_31_RST,
+    CPLD_QSFPDD_PORT_32_39_48_55_RST,
+    CPLD_QSFPDD_PORT_40_47_56_63_RST,
+    CPLD_QSFPDD_PORT_0_7_16_23_LPMODE,
+    CPLD_QSFPDD_PORT_8_15_24_31_LPMODE,
+    CPLD_QSFPDD_PORT_32_39_48_55_LPMODE,
+    CPLD_QSFPDD_PORT_40_47_56_63_LPMODE,
+    CPLD_I2C_CONTROL,
+    CPLD_I2C_RELAY,
+    CPLD_DBG_QSFPDD_PORT_0_7_16_23_INTR,
+    CPLD_DBG_QSFPDD_PORT_8_15_24_31_INTR,
+    CPLD_DBG_QSFPDD_PORT_32_39_48_55_INTR,
+    CPLD_DBG_QSFPDD_PORT_40_47_56_63_INTR,
+    CPLD_DBG_QSFPDD_PORT_0_7_16_23_PRES,
+    CPLD_DBG_QSFPDD_PORT_8_15_24_31_PRES,
+    CPLD_DBG_QSFPDD_PORT_32_39_48_55_PRES,
+    CPLD_DBG_QSFPDD_PORT_40_47_56_63_PRES,
+    CPLD_DBG_QSFPDD_PORT_0_15_16_31_FUSE,
+    CPLD_DBG_QSFPDD_PORT_32_47_48_63_FUSE,
+
+    //FPGA
+    FPGA_MINOR_VER,
+    FPGA_MAJOR_VER,
+    FPGA_BUILD,
+    FPGA_VERSION_H,
+    FPGA_CHIP,
+    FPGA_MGMT_PORT_0_1_TX_RATE_SEL,
+    FPGA_MGMT_PORT_0_1_RX_RATE_SEL,
+    FPGA_MGMT_PORT_0_1_TX_DIS,
+    FPGA_MGMT_PORT_0_1_TX_FAULT,
+    FPGA_MGMT_PORT_0_1_RX_LOS,
+    FPGA_MGMT_PORT_0_1_PRES,
+    FPGA_MGMT_PORT_0_1_STUCK,
+    FPGA_MGMT_PORT_0_1_TX_FAULT_MASK,
+    FPGA_MGMT_PORT_0_1_RX_LOS_MASK,
+    FPGA_MGMT_PORT_0_1_PRES_MASK,
+    FPGA_MGMT_PORT_0_1_STUCK_MASK,
+    FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT,
+    FPGA_MGMT_PORT_0_1_RX_LOS_EVENT,
+    FPGA_MGMT_PORT_0_1_PRES_EVENT,
+    FPGA_MGMT_PORT_0_1_STUCK_EVENT,
+    FPGA_EVT_CTRL,
+    FPGA_LAN_PORT_RELAY,
+
+    //MUX
+    IDLE_STATE,
+
+    //BSP DEBUG
+    BSP_DEBUG
+};
+
+enum data_type {
+    DATA_HEX,
+    DATA_DEC,
+    DATA_UNK,
+};
+
+typedef struct  {
+    u16 reg;
+    u8 mask;
+    u8 data_type;
+} attr_reg_map_t;
+
+static attr_reg_map_t attr_reg[]= {
+
+    // CPLD Common
+    [CPLD_MINOR_VER]                            = {CPLD_VERSION_REG                              , MASK_0011_1111, DATA_DEC},
+    [CPLD_MAJOR_VER]                            = {CPLD_VERSION_REG                              , MASK_1100_0000, DATA_DEC},
+    [CPLD_ID]                                   = {CPLD_ID_REG                                   , MASK_ALL      , DATA_DEC},
+    [CPLD_BUILD_VER]                            = {CPLD_BUILD_REG                                , MASK_ALL      , DATA_DEC},
+    [CPLD_VERSION_H]                            = {NONE_REG                                      , MASK_NONE     , DATA_UNK},
+    [CPLD_EVT_CTRL]                             = {CPLD_EVT_CTRL_REG                             , MASK_ALL      , DATA_HEX},
+
+    // CPLD 1
+    [CPLD_BOARD_ID_0]                           = {CPLD_BOARD_ID_0_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_BOARD_ID_1]                           = {CPLD_BOARD_ID_1_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_INTR]                             = {CPLD_MAC_INTR_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_PHY_INTR]                             = {CPLD_PHY_INTR_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_CPLDX_INTR]                           = {CPLD_CPLDX_INTR_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_THERMAL_INTR]                     = {CPLD_THERMAL_INTR_REG                         , MASK_ALL      , DATA_HEX},
+    [CPLD_MISC_INTR]                            = {CPLD_MISC_INTR_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_CPU_INTR]                             = {CPLD_CPU_INTR_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_MASK]                             = {CPLD_MAC_MASK_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_PHY_MASK]                             = {CPLD_PHY_MASK_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_CPLDX_MASK]                           = {CPLD_CPLDX_MASK_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_THERMAL_MASK]                     = {CPLD_THERMAL_MASK_REG                         , MASK_ALL      , DATA_HEX},
+    [CPLD_MISC_MASK]                            = {CPLD_MISC_MASK_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_CPU_MASK]                             = {CPLD_CPU_MASK_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_EVT]                              = {CPLD_MAC_EVT_REG                              , MASK_ALL      , DATA_HEX},
+    [CPLD_PHY_EVT]                              = {CPLD_PHY_EVT_REG                              , MASK_ALL      , DATA_HEX},
+    [CPLD_CPLDX_EVT]                            = {CPLD_CPLDX_EVT_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_THERMAL_EVT]                      = {CPLD_THERMAL_EVT_REG                          , MASK_ALL      , DATA_HEX},
+    [CPLD_MISC_EVT]                             = {CPLD_MISC_EVT_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_RESET]                            = {CPLD_MAC_RESET_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_BMC_RESET]                            = {CPLD_BMC_RESET_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_USB_RESET]                            = {CPLD_USB_RESET_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_MISC_RESET]                           = {CPLD_MISC_RESET_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_BRD_PRESENT]                          = {CPLD_BRD_PRESENT_REG                          , MASK_ALL      , DATA_HEX},
+    [CPLD_PSU_STATUS]                           = {CPLD_PSU_STATUS_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_SYSTEM_PWR]                           = {CPLD_SYSTEM_PWR_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_SYNCE]                            = {CPLD_MAC_SYNCE_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_ROV]                              = {CPLD_MAC_ROV_REG                              , MASK_ALL      , DATA_HEX},
+    [CPLD_MUX_CTRL]                             = {CPLD_MUX_CTRL_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_SYSTEM_LED_SYS]                       = {CPLD_SYSTEM_LED_SYS_FAN_REG                   , MASK_0000_1111, DATA_HEX},
+    [CPLD_SYSTEM_LED_FAN]                       = {CPLD_SYSTEM_LED_SYS_FAN_REG                   , MASK_1111_0000, DATA_HEX},
+    [CPLD_SYSTEM_LED_PSU_0]                     = {CPLD_SYSTEM_LED_PSU_REG                       , MASK_0000_1111, DATA_HEX},
+    [CPLD_SYSTEM_LED_PSU_1]                     = {CPLD_SYSTEM_LED_PSU_REG                       , MASK_1111_0000, DATA_HEX},
+    [CPLD_SYSTEM_LED_SYNC]                      = {CPLD_SYSTEM_LED_SYNC_REG                      , MASK_0000_1111, DATA_HEX},
+    [CPLD_MGMT_PORT_0_LED_STATUS]               = {CPLD_SFP_PORT_0_1_LED_REG                     , MASK_0000_1101, DATA_DEC},
+    [CPLD_MGMT_PORT_0_LED_SPEED]                = {CPLD_SFP_PORT_0_1_LED_REG                     , MASK_0000_0010, DATA_DEC},
+    [CPLD_MGMT_PORT_1_LED_STATUS]               = {CPLD_SFP_PORT_0_1_LED_REG                     , MASK_1101_0000, DATA_DEC},
+    [CPLD_MGMT_PORT_1_LED_SPEED]                = {CPLD_SFP_PORT_0_1_LED_REG                     , MASK_0010_0000, DATA_DEC},
+    [CPLD_PORT_LED_CLR]                         = {CPLD_PORT_LED_CLR_REG                         , MASK_0000_0001, DATA_DEC},
+    [CPLD_MISC_PWR]                             = {CPLD_MISC_PWR_REG                             , MASK_ALL      , DATA_HEX},
+    [DBG_CPLD_MAC_INTR]                         = {DBG_CPLD_MAC_INTR_REG                         , MASK_ALL      , DATA_HEX},
+    [DBG_CPLD_CPLDX_INTR]                       = {DBG_CPLD_CPLDX_INTR_REG                       , MASK_ALL      , DATA_HEX},
+    [DBG_CPLD_MAC_THERMAL_INTR]                 = {DBG_CPLD_THERMAL_INTR_REG                     , MASK_ALL      , DATA_HEX},
+    [DBG_CPLD_MISC_INTR]                        = {DBG_CPLD_MISC_INTR_REG                        , MASK_ALL      , DATA_HEX},
+
+    // CPLD 2
+    [CPLD_QSFPDD_PORT_0_7_16_23_INTR]           = {CPLD_QSFPDD_PORT_0_7_16_23_INTR_REG           , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_8_15_24_31_INTR]          = {CPLD_QSFPDD_PORT_8_15_24_31_INTR_REG          , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_39_48_55_INTR]         = {CPLD_QSFPDD_PORT_32_39_48_55_INTR_REG         , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_40_47_56_63_INTR]         = {CPLD_QSFPDD_PORT_40_47_56_63_INTR_REG         , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_7_16_23_PRES]           = {CPLD_QSFPDD_PORT_0_7_16_23_PRES_REG           , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_8_15_24_31_PRES]          = {CPLD_QSFPDD_PORT_8_15_24_31_PRES_REG          , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_39_48_55_PRES]         = {CPLD_QSFPDD_PORT_32_39_48_55_PRES_REG         , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_40_47_56_63_PRES]         = {CPLD_QSFPDD_PORT_40_47_56_63_PRES_REG         , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_15_16_31_FUSE]          = {CPLD_QSFPDD_PORT_0_15_16_31_FUSE_REG          , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_47_48_63_FUSE]         = {CPLD_QSFPDD_PORT_32_47_48_63_FUSE_REG         , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_7_16_23_STUCK]          = {CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG          , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_8_15_24_31_STUCK]         = {CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG         , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_39_48_55_STUCK]        = {CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG        , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_40_47_56_63_STUCK]        = {CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG        , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_7_16_23_INTR_MASK]      = {CPLD_QSFPDD_PORT_0_7_16_23_INTR_MASK_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_8_15_24_31_INTR_MASK]     = {CPLD_QSFPDD_PORT_8_15_24_31_INTR_MASK_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_39_48_55_INTR_MASK]    = {CPLD_QSFPDD_PORT_32_39_48_55_INTR_MASK_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_40_47_56_63_INTR_MASK]    = {CPLD_QSFPDD_PORT_40_47_56_63_INTR_MASK_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_7_16_23_PRES_MASK]      = {CPLD_QSFPDD_PORT_0_7_16_23_PRES_MASK_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_8_15_24_31_PRES_MASK]     = {CPLD_QSFPDD_PORT_8_15_24_31_PRES_MASK_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_39_48_55_PRES_MASK]    = {CPLD_QSFPDD_PORT_32_39_48_55_PRES_MASK_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_40_47_56_63_PRES_MASK]    = {CPLD_QSFPDD_PORT_40_47_56_63_PRES_MASK_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_15_16_31_FUSE_MASK]     = {CPLD_QSFPDD_PORT_0_15_16_31_FUSE_MASK_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_47_48_63_FUSE_MASK]    = {CPLD_QSFPDD_PORT_32_47_48_63_FUSE_MASK_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_7_16_23_STUCK_MASK]     = {CPLD_QSFPDD_PORT_0_7_16_23_STUCK_MASK_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_8_15_24_31_STUCK_MASK]    = {CPLD_QSFPDD_PORT_8_15_24_31_STUCK_MASK_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_39_48_55_STUCK_MASK]   = {CPLD_QSFPDD_PORT_32_39_48_55_STUCK_MASK_REG   , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_40_47_56_63_STUCK_MASK]   = {CPLD_QSFPDD_PORT_40_47_56_63_STUCK_MASK_REG   , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_7_16_23_INTR_EVENT]     = {CPLD_QSFPDD_PORT_0_7_16_23_INTR_EVENT_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_8_15_24_31_INTR_EVENT]    = {CPLD_QSFPDD_PORT_8_15_24_31_INTR_EVENT_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_39_48_55_INTR_EVENT]   = {CPLD_QSFPDD_PORT_32_39_48_55_INTR_EVENT_REG   , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_40_47_56_63_INTR_EVENT]   = {CPLD_QSFPDD_PORT_40_47_56_63_INTR_EVENT_REG   , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_7_16_23_PRES_EVENT]     = {CPLD_QSFPDD_PORT_0_7_16_23_PRES_EVENT_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_8_15_24_31_PRES_EVENT]    = {CPLD_QSFPDD_PORT_8_15_24_31_PRES_EVENT_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_39_48_55_PRES_EVENT]   = {CPLD_QSFPDD_PORT_32_39_48_55_PRES_EVENT_REG   , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_40_47_56_63_PRES_EVENT]   = {CPLD_QSFPDD_PORT_40_47_56_63_PRES_EVENT_REG   , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_15_16_31_FUSE_EVENT]    = {CPLD_QSFPDD_PORT_0_15_16_31_FUSE_EVENT_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_47_48_63_FUSE_EVENT]   = {CPLD_QSFPDD_PORT_32_47_48_63_FUSE_EVENT_REG   , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT]    = {CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT]   = {CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG   , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT]  = {CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG  , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT]  = {CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG  , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_7_16_23_RST]            = {CPLD_QSFPDD_PORT_0_7_16_23_RST_REG            , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_8_15_24_31_RST]           = {CPLD_QSFPDD_PORT_8_15_24_31_RST_REG           , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_39_48_55_RST]          = {CPLD_QSFPDD_PORT_32_39_48_55_RST_REG          , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_40_47_56_63_RST]          = {CPLD_QSFPDD_PORT_40_47_56_63_RST_REG          , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_0_7_16_23_LPMODE]         = {CPLD_QSFPDD_PORT_0_7_16_23_LPMODE_REG         , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_8_15_24_31_LPMODE]        = {CPLD_QSFPDD_PORT_8_15_24_31_LPMODE_REG        , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_32_39_48_55_LPMODE]       = {CPLD_QSFPDD_PORT_32_39_48_55_LPMODE_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_QSFPDD_PORT_40_47_56_63_LPMODE]       = {CPLD_QSFPDD_PORT_40_47_56_63_LPMODE_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_I2C_CONTROL]                          = {CPLD_I2C_CONTROL_REG                          , MASK_ALL      , DATA_HEX},
+    [CPLD_I2C_RELAY]                            = {CPLD_I2C_RELAY_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_QSFPDD_PORT_0_7_16_23_INTR]       = {CPLD_DBG_QSFPDD_PORT_0_7_16_23_INTR_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_QSFPDD_PORT_8_15_24_31_INTR]      = {CPLD_DBG_QSFPDD_PORT_8_15_24_31_INTR_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_QSFPDD_PORT_32_39_48_55_INTR]     = {CPLD_DBG_QSFPDD_PORT_32_39_48_55_INTR_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_QSFPDD_PORT_40_47_56_63_INTR]     = {CPLD_DBG_QSFPDD_PORT_40_47_56_63_INTR_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_QSFPDD_PORT_0_7_16_23_PRES]       = {CPLD_DBG_QSFPDD_PORT_0_7_16_23_PRES_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_QSFPDD_PORT_8_15_24_31_PRES]      = {CPLD_DBG_QSFPDD_PORT_8_15_24_31_PRES_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_QSFPDD_PORT_32_39_48_55_PRES]     = {CPLD_DBG_QSFPDD_PORT_32_39_48_55_PRES_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_QSFPDD_PORT_40_47_56_63_PRES]     = {CPLD_DBG_QSFPDD_PORT_40_47_56_63_PRES_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_QSFPDD_PORT_0_15_16_31_FUSE]      = {CPLD_DBG_QSFPDD_PORT_0_15_16_31_FUSE_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_QSFPDD_PORT_32_47_48_63_FUSE]     = {CPLD_DBG_QSFPDD_PORT_32_47_48_63_FUSE_REG     , MASK_ALL      , DATA_HEX},
+
+    // FPGA
+    [FPGA_MINOR_VER]                            = {FPGA_VERSION_REG                              , MASK_0011_1111, DATA_DEC},
+    [FPGA_MAJOR_VER]                            = {FPGA_VERSION_REG                              , MASK_1100_0000, DATA_DEC},
+    [FPGA_BUILD]                                = {FPGA_BUILD_REG                                , MASK_ALL      , DATA_DEC},
+    [FPGA_VERSION_H]                            = {NONE_REG                                      , MASK_NONE     , DATA_UNK},
+    [FPGA_CHIP]                                 = {FPGA_CHIP_REG                                 , MASK_ALL      , DATA_DEC},
+    [FPGA_MGMT_PORT_0_1_TX_RATE_SEL]            = {FPGA_MGMT_PORT_0_1_TX_RATE_SEL_REG            , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_RX_RATE_SEL]            = {FPGA_MGMT_PORT_0_1_RX_RATE_SEL_REG            , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_TX_DIS]                 = {FPGA_MGMT_PORT_0_1_TX_DIS_REG                 , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_TX_FAULT]               = {FPGA_MGMT_PORT_0_1_TX_FAULT_REG               , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_RX_LOS]                 = {FPGA_MGMT_PORT_0_1_RX_LOS_REG                 , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_PRES]                   = {FPGA_MGMT_PORT_0_1_PRES_REG                   , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_STUCK]                  = {FPGA_MGMT_PORT_0_1_STUCK_REG                  , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_TX_FAULT_MASK]          = {FPGA_MGMT_PORT_0_1_TX_FAULT_MASK_REG          , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_RX_LOS_MASK]            = {FPGA_MGMT_PORT_0_1_RX_LOS_MASK_REG            , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_PRES_MASK]              = {FPGA_MGMT_PORT_0_1_PRES_MASK_REG              , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_STUCK_MASK]             = {FPGA_MGMT_PORT_0_1_STUCK_MASK_REG             , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT]         = {FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT_REG         , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_RX_LOS_EVENT]           = {FPGA_MGMT_PORT_0_1_RX_LOS_EVENT_REG           , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_PRES_EVENT]             = {FPGA_MGMT_PORT_0_1_PRES_EVENT_REG             , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_STUCK_EVENT]            = {FPGA_MGMT_PORT_0_1_STUCK_EVENT_REG            , MASK_ALL      , DATA_HEX},
+    [FPGA_EVT_CTRL]                             = {FPGA_EVT_CTRL_REG                             , MASK_ALL      , DATA_HEX},
+    [FPGA_LAN_PORT_RELAY]                       = {FPGA_LAN_PORT_RELAY_REG                       , MASK_ALL      , DATA_HEX},
+
+    // MUX
+    [IDLE_STATE]                                = {NONE_REG                                      , MASK_NONE     , DATA_UNK},
+
+    //BSP DEBUG
+    [BSP_DEBUG]                                 = {NONE_REG                                      , MASK_NONE     , DATA_UNK},
+};
+
+enum bsp_log_types {
+    LOG_NONE,
+    LOG_RW,
+    LOG_READ,
+    LOG_WRITE
+};
+
+enum bsp_log_ctrl {
+    LOG_DISABLE,
+    LOG_ENABLE
+};
+
+/* CPLD sysfs attributes hook functions  */
+static ssize_t cpld_show(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t cpld_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t cpld_reg_read(struct device *dev, u8 *reg_val, u8 reg, u8 mask);
+static ssize_t cpld_reg_write(struct device *dev, u8 reg_val, size_t count, u8 reg, u8 mask);
+static ssize_t bsp_read(char *buf, char *str);
+static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count);
+static ssize_t bsp_callback_show(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t bsp_callback_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t version_h_show(struct device *dev, struct device_attribute *da, char *buf);
+static ssize_t led_show(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t led_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+
+static LIST_HEAD(cpld_client_list);  /* client list for cpld */
+static struct mutex list_lock;  /* mutex for client list */
+
+struct cpld_client_node {
+    struct i2c_client *client;
+    struct list_head   list;
+};
+
+/* CPLD device id and data */
+static const struct i2c_device_id cpld_id[] = {
+    { "s9321_64e_cpld1",  cpld1 },
+    { "s9321_64e_cpld2",  cpld2 },
+    { "s9321_64e_cpld3",  cpld3 },
+    { "s9321_64e_fpga",   fpga },
+    {}
+};
+
+char bsp_debug[2]="0";
+u8 enable_log_read=LOG_DISABLE;
+u8 enable_log_write=LOG_DISABLE;
+
+/* Addresses scanned for cpld */
+static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, 0x37, I2C_CLIENT_END };
+
+/* define all support register access of cpld in attribute */
+
+// CPLD Common
+static SENSOR_DEVICE_ATTR_RO(cpld_minor_ver                , cpld, CPLD_MINOR_VER);
+static SENSOR_DEVICE_ATTR_RO(cpld_major_ver                , cpld, CPLD_MAJOR_VER);
+static SENSOR_DEVICE_ATTR_RO(cpld_id                       , cpld, CPLD_ID);
+static SENSOR_DEVICE_ATTR_RO(cpld_build_ver                , cpld, CPLD_BUILD_VER);
+static SENSOR_DEVICE_ATTR_RO(cpld_version_h                , version_h, CPLD_VERSION_H);
+static SENSOR_DEVICE_ATTR_RW(cpld_evt_ctrl                 , cpld, CPLD_EVT_CTRL);
+
+// CPLD 1
+static SENSOR_DEVICE_ATTR_RO(cpld_board_id_0               , cpld, CPLD_BOARD_ID_0);
+static SENSOR_DEVICE_ATTR_RO(cpld_board_id_1               , cpld, CPLD_BOARD_ID_1);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_intr                 , cpld, CPLD_MAC_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_phy_intr                 , cpld, CPLD_PHY_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_cpldx_intr               , cpld, CPLD_CPLDX_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_thermal_intr         , cpld, CPLD_MAC_THERMAL_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_misc_intr                , cpld, CPLD_MISC_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_cpu_intr                 , cpld, CPLD_CPU_INTR);
+static SENSOR_DEVICE_ATTR_RW(cpld_mac_mask                 , cpld, CPLD_MAC_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_phy_mask                 , cpld, CPLD_PHY_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_cpldx_mask               , cpld, CPLD_CPLDX_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_mac_thermal_mask         , cpld, CPLD_MAC_THERMAL_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_misc_mask                , cpld, CPLD_MISC_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_cpu_mask                 , cpld, CPLD_CPU_MASK);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_evt                  , cpld, CPLD_MAC_EVT);
+static SENSOR_DEVICE_ATTR_RO(cpld_phy_evt                  , cpld, CPLD_PHY_EVT);
+static SENSOR_DEVICE_ATTR_RO(cpld_cpldx_evt                , cpld, CPLD_CPLDX_EVT);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_thermal_evt          , cpld, CPLD_MAC_THERMAL_EVT);
+static SENSOR_DEVICE_ATTR_RO(cpld_misc_evt                 , cpld, CPLD_MISC_EVT);
+static SENSOR_DEVICE_ATTR_RW(cpld_mac_reset                , cpld, CPLD_MAC_RESET);
+static SENSOR_DEVICE_ATTR_RW(cpld_bmc_reset                , cpld, CPLD_BMC_RESET);
+static SENSOR_DEVICE_ATTR_RW(cpld_usb_reset                , cpld, CPLD_USB_RESET);
+static SENSOR_DEVICE_ATTR_RW(cpld_misc_reset               , cpld, CPLD_MISC_RESET);
+static SENSOR_DEVICE_ATTR_RO(cpld_brd_present              , cpld, CPLD_BRD_PRESENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_psu_status               , cpld, CPLD_PSU_STATUS);
+static SENSOR_DEVICE_ATTR_RO(cpld_system_pwr               , cpld, CPLD_SYSTEM_PWR);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_synce                , cpld, CPLD_MAC_SYNCE);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_rov                  , cpld, CPLD_MAC_ROV);
+static SENSOR_DEVICE_ATTR_RW(cpld_mux_ctrl                 , cpld, CPLD_MUX_CTRL);
+static SENSOR_DEVICE_ATTR_RW(cpld_system_led_sys           , cpld, CPLD_SYSTEM_LED_SYS);
+static SENSOR_DEVICE_ATTR_RW(cpld_system_led_fan           , cpld, CPLD_SYSTEM_LED_FAN);
+static SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_0         , cpld, CPLD_SYSTEM_LED_PSU_0);
+static SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_1         , cpld, CPLD_SYSTEM_LED_PSU_1);
+static SENSOR_DEVICE_ATTR_RW(cpld_system_led_sync          , cpld, CPLD_SYSTEM_LED_SYNC);
+static SENSOR_DEVICE_ATTR_RW(cpld_mgmt_port_0_led_status   , led , CPLD_MGMT_PORT_0_LED_STATUS);
+static SENSOR_DEVICE_ATTR_RW(cpld_mgmt_port_0_led_speed    , cpld, CPLD_MGMT_PORT_0_LED_SPEED);
+static SENSOR_DEVICE_ATTR_RW(cpld_mgmt_port_1_led_status   , led , CPLD_MGMT_PORT_1_LED_STATUS);
+static SENSOR_DEVICE_ATTR_RW(cpld_mgmt_port_1_led_speed    , cpld, CPLD_MGMT_PORT_1_LED_SPEED);
+static SENSOR_DEVICE_ATTR_RW(cpld_port_led_clr             , cpld, CPLD_PORT_LED_CLR);
+static SENSOR_DEVICE_ATTR_RO(cpld_misc_pwr                 , cpld, CPLD_MISC_PWR);
+static SENSOR_DEVICE_ATTR_RO(dbg_cpld_mac_intr             , cpld, DBG_CPLD_MAC_INTR);
+static SENSOR_DEVICE_ATTR_RO(dbg_cpld_cpldx_intr           , cpld, DBG_CPLD_CPLDX_INTR);
+static SENSOR_DEVICE_ATTR_RO(dbg_cpld_mac_thermal_intr     , cpld, DBG_CPLD_MAC_THERMAL_INTR);
+static SENSOR_DEVICE_ATTR_RO(dbg_cpld_misc_intr            , cpld, DBG_CPLD_MISC_INTR);
+
+//CPLD 2 and CPLD 3
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_intr_port_0       , cpld, CPLD_QSFPDD_PORT_0_7_16_23_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_intr_port_1       , cpld, CPLD_QSFPDD_PORT_8_15_24_31_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_intr_port_2       , cpld, CPLD_QSFPDD_PORT_32_39_48_55_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_intr_port_3       , cpld, CPLD_QSFPDD_PORT_40_47_56_63_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_intr_present_0    , cpld, CPLD_QSFPDD_PORT_0_7_16_23_PRES);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_intr_present_1    , cpld, CPLD_QSFPDD_PORT_8_15_24_31_PRES);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_intr_present_2    , cpld, CPLD_QSFPDD_PORT_32_39_48_55_PRES);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_intr_present_3    , cpld, CPLD_QSFPDD_PORT_40_47_56_63_PRES);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_intr_fuse_0       , cpld, CPLD_QSFPDD_PORT_0_15_16_31_FUSE);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_intr_fuse_1       , cpld, CPLD_QSFPDD_PORT_32_47_48_63_FUSE);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_stuck_0           , cpld, CPLD_QSFPDD_PORT_0_7_16_23_STUCK);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_stuck_1           , cpld, CPLD_QSFPDD_PORT_8_15_24_31_STUCK);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_stuck_2           , cpld, CPLD_QSFPDD_PORT_32_39_48_55_STUCK);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_stuck_3           , cpld, CPLD_QSFPDD_PORT_40_47_56_63_STUCK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_port_0       , cpld, CPLD_QSFPDD_PORT_0_7_16_23_INTR_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_port_1       , cpld, CPLD_QSFPDD_PORT_8_15_24_31_INTR_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_port_2       , cpld, CPLD_QSFPDD_PORT_32_39_48_55_INTR_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_port_3       , cpld, CPLD_QSFPDD_PORT_40_47_56_63_INTR_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_present_0    , cpld, CPLD_QSFPDD_PORT_0_7_16_23_PRES_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_present_1    , cpld, CPLD_QSFPDD_PORT_8_15_24_31_PRES_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_present_2    , cpld, CPLD_QSFPDD_PORT_32_39_48_55_PRES_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_present_3    , cpld, CPLD_QSFPDD_PORT_40_47_56_63_PRES_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_fuse_0       , cpld, CPLD_QSFPDD_PORT_0_15_16_31_FUSE_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_fuse_1       , cpld, CPLD_QSFPDD_PORT_32_47_48_63_FUSE_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_stuck_0      , cpld, CPLD_QSFPDD_PORT_0_7_16_23_STUCK_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_stuck_1      , cpld, CPLD_QSFPDD_PORT_8_15_24_31_STUCK_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_stuck_2      , cpld, CPLD_QSFPDD_PORT_32_39_48_55_STUCK_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_mask_stuck_3      , cpld, CPLD_QSFPDD_PORT_40_47_56_63_STUCK_MASK);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_port_0        , cpld, CPLD_QSFPDD_PORT_0_7_16_23_INTR_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_port_1        , cpld, CPLD_QSFPDD_PORT_8_15_24_31_INTR_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_port_2        , cpld, CPLD_QSFPDD_PORT_32_39_48_55_INTR_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_port_3        , cpld, CPLD_QSFPDD_PORT_40_47_56_63_INTR_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_present_0     , cpld, CPLD_QSFPDD_PORT_0_7_16_23_PRES_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_present_1     , cpld, CPLD_QSFPDD_PORT_8_15_24_31_PRES_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_present_2     , cpld, CPLD_QSFPDD_PORT_32_39_48_55_PRES_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_present_3     , cpld, CPLD_QSFPDD_PORT_40_47_56_63_PRES_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_fuse_0        , cpld, CPLD_QSFPDD_PORT_0_15_16_31_FUSE_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_fuse_1        , cpld, CPLD_QSFPDD_PORT_32_47_48_63_FUSE_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_stuck_0       , cpld, CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_stuck_1       , cpld, CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_stuck_2       , cpld, CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_qsfpdd_evt_stuck_3       , cpld, CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_reset_0           , cpld, CPLD_QSFPDD_PORT_0_7_16_23_RST);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_reset_1           , cpld, CPLD_QSFPDD_PORT_8_15_24_31_RST);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_reset_2           , cpld, CPLD_QSFPDD_PORT_32_39_48_55_RST);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_reset_3           , cpld, CPLD_QSFPDD_PORT_40_47_56_63_RST);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_lpmode_0          , cpld, CPLD_QSFPDD_PORT_0_7_16_23_LPMODE);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_lpmode_1          , cpld, CPLD_QSFPDD_PORT_8_15_24_31_LPMODE);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_lpmode_2          , cpld, CPLD_QSFPDD_PORT_32_39_48_55_LPMODE);
+static SENSOR_DEVICE_ATTR_RW(cpld_qsfpdd_lpmode_3          , cpld, CPLD_QSFPDD_PORT_40_47_56_63_LPMODE);
+static SENSOR_DEVICE_ATTR_RW(cpld_i2c_ctrl                 , cpld, CPLD_I2C_CONTROL);
+static SENSOR_DEVICE_ATTR_RW(cpld_i2c_relay                , cpld, CPLD_I2C_RELAY);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfpdd_intr_port_0   , cpld, CPLD_DBG_QSFPDD_PORT_0_7_16_23_INTR);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfpdd_intr_port_1   , cpld, CPLD_DBG_QSFPDD_PORT_8_15_24_31_INTR);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfpdd_intr_port_2   , cpld, CPLD_DBG_QSFPDD_PORT_32_39_48_55_INTR);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfpdd_intr_port_3   , cpld, CPLD_DBG_QSFPDD_PORT_40_47_56_63_INTR);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfpdd_intr_present_0, cpld, CPLD_DBG_QSFPDD_PORT_0_7_16_23_PRES);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfpdd_intr_present_1, cpld, CPLD_DBG_QSFPDD_PORT_8_15_24_31_PRES);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfpdd_intr_present_2, cpld, CPLD_DBG_QSFPDD_PORT_32_39_48_55_PRES);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfpdd_intr_present_3, cpld, CPLD_DBG_QSFPDD_PORT_40_47_56_63_PRES);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfpdd_intr_fuse_0   , cpld, CPLD_DBG_QSFPDD_PORT_0_15_16_31_FUSE);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfpdd_intr_fuse_1   , cpld, CPLD_DBG_QSFPDD_PORT_32_47_48_63_FUSE);
+
+// FPGA
+static SENSOR_DEVICE_ATTR_RO(fpga_minor_ver                , cpld, FPGA_MINOR_VER);
+static SENSOR_DEVICE_ATTR_RO(fpga_major_ver                , cpld, FPGA_MAJOR_VER);
+static SENSOR_DEVICE_ATTR_RO(fpga_build_ver                , cpld, FPGA_BUILD);
+static SENSOR_DEVICE_ATTR_RO(fpga_version_h                , version_h, FPGA_VERSION_H);
+static SENSOR_DEVICE_ATTR_RO(fpga_id                       , cpld, FPGA_CHIP);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_tx_rate_cap        , cpld, FPGA_MGMT_PORT_0_1_TX_RATE_SEL);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_rx_rate_cap        , cpld, FPGA_MGMT_PORT_0_1_RX_RATE_SEL);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_tx_dis             , cpld, FPGA_MGMT_PORT_0_1_TX_DIS);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_tx_fault           , cpld, FPGA_MGMT_PORT_0_1_TX_FAULT);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_rx_los             , cpld, FPGA_MGMT_PORT_0_1_RX_LOS);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_intr_present       , cpld, FPGA_MGMT_PORT_0_1_PRES);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_stuck              , cpld, FPGA_MGMT_PORT_0_1_STUCK);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_mask_tx_fault      , cpld, FPGA_MGMT_PORT_0_1_TX_FAULT_MASK);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_mask_rx_los        , cpld, FPGA_MGMT_PORT_0_1_RX_LOS_MASK);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_mask_present       , cpld, FPGA_MGMT_PORT_0_1_PRES_MASK);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_mask_stuck         , cpld, FPGA_MGMT_PORT_0_1_STUCK_MASK);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_evt_tx_fault       , cpld, FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_evt_rx_los         , cpld, FPGA_MGMT_PORT_0_1_RX_LOS_EVENT);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_evt_present        , cpld, FPGA_MGMT_PORT_0_1_PRES_EVENT);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_evt_stuck          , cpld, FPGA_MGMT_PORT_0_1_STUCK_EVENT);
+static SENSOR_DEVICE_ATTR_RW(fpga_evt_ctrl                 , cpld, FPGA_EVT_CTRL);
+static SENSOR_DEVICE_ATTR_RO(fpga_lan_port_relay           , cpld, FPGA_LAN_PORT_RELAY);
+
+//BSP DEBUG
+static SENSOR_DEVICE_ATTR_RW(bsp_debug, bsp_callback, BSP_DEBUG);
+
+//MUX
+static SENSOR_DEVICE_ATTR_RW(idle_state, idle_state, IDLE_STATE);
+
+/* define support attributes of cpldx */
+
+/* cpld 1 */
+static struct attribute *cpld1_attributes[] = {
+     // CPLD Common
+    _DEVICE_ATTR(cpld_minor_ver),
+    _DEVICE_ATTR(cpld_major_ver),
+    _DEVICE_ATTR(cpld_id),
+    _DEVICE_ATTR(cpld_build_ver),
+    _DEVICE_ATTR(cpld_version_h),
+    _DEVICE_ATTR(cpld_evt_ctrl),
+
+    // CPLD 1
+    _DEVICE_ATTR(cpld_board_id_0),
+    _DEVICE_ATTR(cpld_board_id_1),
+    _DEVICE_ATTR(cpld_mac_intr),
+    _DEVICE_ATTR(cpld_phy_intr),
+    _DEVICE_ATTR(cpld_cpldx_intr),
+    _DEVICE_ATTR(cpld_mac_thermal_intr),
+    _DEVICE_ATTR(cpld_misc_intr),
+    _DEVICE_ATTR(cpld_cpu_intr),
+    _DEVICE_ATTR(cpld_mac_mask),
+    _DEVICE_ATTR(cpld_phy_mask),
+    _DEVICE_ATTR(cpld_cpldx_mask),
+    _DEVICE_ATTR(cpld_mac_thermal_mask),
+    _DEVICE_ATTR(cpld_misc_mask),
+    _DEVICE_ATTR(cpld_cpu_mask),
+    _DEVICE_ATTR(cpld_mac_evt),
+    _DEVICE_ATTR(cpld_phy_evt),
+    _DEVICE_ATTR(cpld_cpldx_evt),
+    _DEVICE_ATTR(cpld_mac_thermal_evt),
+    _DEVICE_ATTR(cpld_misc_evt),
+    _DEVICE_ATTR(cpld_mac_reset),
+    _DEVICE_ATTR(cpld_bmc_reset),
+    _DEVICE_ATTR(cpld_usb_reset),
+    _DEVICE_ATTR(cpld_misc_reset),
+    _DEVICE_ATTR(cpld_brd_present),
+    _DEVICE_ATTR(cpld_psu_status),
+    _DEVICE_ATTR(cpld_system_pwr),
+    _DEVICE_ATTR(cpld_mac_synce),
+    _DEVICE_ATTR(cpld_mac_rov),
+    _DEVICE_ATTR(cpld_mux_ctrl),
+    _DEVICE_ATTR(cpld_system_led_sys),
+    _DEVICE_ATTR(cpld_system_led_fan),
+    _DEVICE_ATTR(cpld_system_led_psu_0),
+    _DEVICE_ATTR(cpld_system_led_psu_1),
+    _DEVICE_ATTR(cpld_system_led_sync),
+    _DEVICE_ATTR(cpld_mgmt_port_0_led_status),
+    _DEVICE_ATTR(cpld_mgmt_port_0_led_speed),
+    _DEVICE_ATTR(cpld_mgmt_port_1_led_status),
+    _DEVICE_ATTR(cpld_mgmt_port_1_led_speed),
+    _DEVICE_ATTR(cpld_port_led_clr),
+    _DEVICE_ATTR(cpld_misc_pwr),
+    _DEVICE_ATTR(dbg_cpld_mac_intr),
+    _DEVICE_ATTR(dbg_cpld_cpldx_intr),
+    _DEVICE_ATTR(dbg_cpld_mac_thermal_intr),
+    _DEVICE_ATTR(dbg_cpld_misc_intr),
+    _DEVICE_ATTR(bsp_debug),
+    NULL
+};
+
+/* cpld 2 */
+static struct attribute *cpld2_attributes[] = {
+     // CPLD Common
+    _DEVICE_ATTR(cpld_minor_ver),
+    _DEVICE_ATTR(cpld_major_ver),
+    _DEVICE_ATTR(cpld_id),
+    _DEVICE_ATTR(cpld_build_ver),
+    _DEVICE_ATTR(cpld_version_h),
+    _DEVICE_ATTR(cpld_evt_ctrl),
+
+    // CPLD 2
+    _DEVICE_ATTR(cpld_qsfpdd_intr_port_0),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_port_1),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_port_2),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_port_3),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_present_0),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_present_1),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_present_2),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_present_3),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_fuse_0),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_fuse_1),
+    _DEVICE_ATTR(cpld_qsfpdd_stuck_0),
+    _DEVICE_ATTR(cpld_qsfpdd_stuck_1),
+    _DEVICE_ATTR(cpld_qsfpdd_stuck_2),
+    _DEVICE_ATTR(cpld_qsfpdd_stuck_3),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_port_0),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_port_1),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_port_2),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_port_3),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_present_0),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_present_1),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_present_2),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_present_3),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_fuse_0),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_fuse_1),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_stuck_0),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_stuck_1),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_stuck_2),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_stuck_3),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_port_0),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_port_1),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_port_2),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_port_3),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_present_0),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_present_1),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_present_2),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_present_3),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_fuse_0),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_fuse_1),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_stuck_0),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_stuck_1),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_stuck_2),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_stuck_3),
+    _DEVICE_ATTR(cpld_qsfpdd_reset_0),
+    _DEVICE_ATTR(cpld_qsfpdd_reset_1),
+    _DEVICE_ATTR(cpld_qsfpdd_reset_2),
+    _DEVICE_ATTR(cpld_qsfpdd_reset_3),
+    _DEVICE_ATTR(cpld_qsfpdd_lpmode_0),
+    _DEVICE_ATTR(cpld_qsfpdd_lpmode_1),
+    _DEVICE_ATTR(cpld_qsfpdd_lpmode_2),
+    _DEVICE_ATTR(cpld_qsfpdd_lpmode_3),
+    _DEVICE_ATTR(cpld_i2c_ctrl),
+    _DEVICE_ATTR(cpld_i2c_relay),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_port_0),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_port_1),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_port_2),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_port_3),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_present_0),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_present_1),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_present_2),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_present_3),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_fuse_0),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_fuse_1),
+    NULL
+};
+
+/* cpld 3 */
+static struct attribute *cpld3_attributes[] = {
+     // CPLD Common
+    _DEVICE_ATTR(cpld_minor_ver),
+    _DEVICE_ATTR(cpld_major_ver),
+    _DEVICE_ATTR(cpld_id),
+    _DEVICE_ATTR(cpld_build_ver),
+    _DEVICE_ATTR(cpld_version_h),
+    _DEVICE_ATTR(cpld_evt_ctrl),
+
+    // CPLD 3
+    _DEVICE_ATTR(cpld_qsfpdd_intr_port_0),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_port_1),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_port_2),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_port_3),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_present_0),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_present_1),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_present_2),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_present_3),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_fuse_0),
+    _DEVICE_ATTR(cpld_qsfpdd_intr_fuse_1),
+    _DEVICE_ATTR(cpld_qsfpdd_stuck_0),
+    _DEVICE_ATTR(cpld_qsfpdd_stuck_1),
+    _DEVICE_ATTR(cpld_qsfpdd_stuck_2),
+    _DEVICE_ATTR(cpld_qsfpdd_stuck_3),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_port_0),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_port_1),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_port_2),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_port_3),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_present_0),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_present_1),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_present_2),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_present_3),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_fuse_0),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_fuse_1),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_stuck_0),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_stuck_1),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_stuck_2),
+    _DEVICE_ATTR(cpld_qsfpdd_mask_stuck_3),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_port_0),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_port_1),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_port_2),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_port_3),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_present_0),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_present_1),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_present_2),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_present_3),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_fuse_0),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_fuse_1),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_stuck_0),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_stuck_1),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_stuck_2),
+    _DEVICE_ATTR(cpld_qsfpdd_evt_stuck_3),
+    _DEVICE_ATTR(cpld_qsfpdd_reset_0),
+    _DEVICE_ATTR(cpld_qsfpdd_reset_1),
+    _DEVICE_ATTR(cpld_qsfpdd_reset_2),
+    _DEVICE_ATTR(cpld_qsfpdd_reset_3),
+    _DEVICE_ATTR(cpld_qsfpdd_lpmode_0),
+    _DEVICE_ATTR(cpld_qsfpdd_lpmode_1),
+    _DEVICE_ATTR(cpld_qsfpdd_lpmode_2),
+    _DEVICE_ATTR(cpld_qsfpdd_lpmode_3),
+    _DEVICE_ATTR(cpld_i2c_ctrl),
+    _DEVICE_ATTR(cpld_i2c_relay),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_port_0),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_port_1),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_port_2),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_port_3),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_present_0),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_present_1),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_present_2),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_present_3),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_fuse_0),
+    _DEVICE_ATTR(dbg_cpld_qsfpdd_intr_fuse_1),
+    NULL
+};
+
+/* fpga */
+static struct attribute *fpga_attributes[] = {
+    // FPGA
+    _DEVICE_ATTR(fpga_minor_ver),
+    _DEVICE_ATTR(fpga_major_ver),
+    _DEVICE_ATTR(fpga_build_ver),
+    _DEVICE_ATTR(fpga_version_h),
+    _DEVICE_ATTR(fpga_id),
+    _DEVICE_ATTR(fpga_sfp28_tx_rate_cap),
+    _DEVICE_ATTR(fpga_sfp28_rx_rate_cap),
+    _DEVICE_ATTR(fpga_sfp28_tx_dis),
+    _DEVICE_ATTR(fpga_sfp28_tx_fault),
+    _DEVICE_ATTR(fpga_sfp28_rx_los),
+    _DEVICE_ATTR(fpga_sfp28_intr_present),
+    _DEVICE_ATTR(fpga_sfp28_stuck),
+    _DEVICE_ATTR(fpga_sfp28_mask_tx_fault),
+    _DEVICE_ATTR(fpga_sfp28_mask_rx_los),
+    _DEVICE_ATTR(fpga_sfp28_mask_present),
+    _DEVICE_ATTR(fpga_sfp28_mask_stuck),
+    _DEVICE_ATTR(fpga_sfp28_evt_present),
+    _DEVICE_ATTR(fpga_sfp28_evt_tx_fault),
+    _DEVICE_ATTR(fpga_sfp28_evt_rx_los),
+    _DEVICE_ATTR(fpga_sfp28_evt_stuck),
+    _DEVICE_ATTR(fpga_evt_ctrl),
+    _DEVICE_ATTR(fpga_lan_port_relay),
+    NULL
+};
+
+/* cpld 1 attributes group */
+static const struct attribute_group cpld1_group = {
+    .attrs = cpld1_attributes,
+};
+
+/* cpld 2 attributes group */
+static const struct attribute_group cpld2_group = {
+    .attrs = cpld2_attributes,
+};
+
+/* cpld 3 attributes group */
+static const struct attribute_group cpld3_group = {
+    .attrs = cpld3_attributes,
+};
+
+/* fpga attributes group */
+static const struct attribute_group fpga_group = {
+    .attrs = fpga_attributes,
+};
+
+/* reg shift */
+static u8 _shift(u8 mask)
+{
+    int i=0, mask_one=1;
+
+    for(i=0; i<8; ++i) {
+        if ((mask & mask_one) == 1)
+            return i;
+        else
+            mask >>= 1;
+    }
+
+    return -1;
+}
+
+/* reg mask and shift */
+u8 _mask_shift(u8 val, u8 mask)
+{
+    int shift=0;
+
+    shift = _shift(mask);
+
+    return (val & mask) >> shift;
+}
+
+static ssize_t _parse_data(char *buf, unsigned int data, u8 data_type)
+{
+    if(buf == NULL) {
+        return -1;
+    }
+
+    if(data_type == DATA_HEX) {
+        return sprintf(buf, "0x%02x", data);
+    } else if(data_type == DATA_DEC) {
+        return sprintf(buf, "%u", data);
+    } else {
+        return -1;
+    }
+    return 0;
+}
+
+static int _bsp_log(u8 log_type, char *fmt, ...)
+{
+    if ((log_type==LOG_READ  && enable_log_read) ||
+        (log_type==LOG_WRITE && enable_log_write)) {
+        va_list args;
+        int r;
+
+        va_start(args, fmt);
+        r = vprintk(fmt, args);
+        va_end(args);
+
+        return r;
+    } else {
+        return 0;
+    }
+}
+
+static int _config_bsp_log(u8 log_type)
+{
+    switch(log_type) {
+        case LOG_NONE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_RW:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        case LOG_READ:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_WRITE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+static int _store_value_check(int index, u8 reg_val, char **range) {
+    int ret = 0;
+    if(range == NULL) {
+        return -2;
+    }
+
+    switch (index) {
+        case CPLD_MGMT_PORT_0_LED_SPEED:
+        case CPLD_MGMT_PORT_1_LED_SPEED:
+            if(reg_val != 0 && reg_val != 1) {
+                ret = -1;
+            }
+            *range = "0 or 1";
+            break;
+        default:
+            break;
+    }
+
+    return ret;
+}
+
+/* get bsp value */
+static ssize_t bsp_read(char *buf, char *str)
+{
+    ssize_t len=0;
+
+    len=sprintf(buf, "%s", str);
+    BSP_LOG_R("reg_val=%s", str);
+
+    return len;
+}
+
+/* set bsp value */
+static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count)
+{
+    snprintf(str, str_len, "%s", buf);
+    BSP_LOG_W("reg_val=%s", str);
+
+    return count;
+}
+
+/* get bsp parameter value */
+static ssize_t bsp_callback_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+
+    switch (attr->index) {
+        case BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        default:
+            return -EINVAL;
+    }
+    return bsp_read(buf, str);
+}
+
+/* set bsp parameter value */
+static ssize_t bsp_callback_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+    ssize_t ret = 0;
+    u8 bsp_debug_u8 = 0;
+
+    switch (attr->index) {
+        case BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            ret = bsp_write(buf, str, str_len, count);
+
+            if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+                return -EINVAL;
+            } else if (_config_bsp_log(bsp_debug_u8) < 0) {
+                return -EINVAL;
+            }
+            return ret;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+/* get cpld register value */
+static ssize_t cpld_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = 0;
+    u8 mask = MASK_NONE;
+    u8 data_type=DATA_UNK;
+    u8 reg_val = 0;
+    int ret = 0;
+
+    switch (attr->index) {
+        // CPLD Common
+        case CPLD_MINOR_VER:
+        case CPLD_MAJOR_VER:
+        case CPLD_ID:
+        case CPLD_BUILD_VER:
+        case CPLD_EVT_CTRL:
+
+        //CPLD 1
+        case CPLD_BOARD_ID_0:
+        case CPLD_BOARD_ID_1:
+        case CPLD_MAC_INTR:
+        case CPLD_PHY_INTR:
+        case CPLD_CPLDX_INTR:
+        case CPLD_MAC_THERMAL_INTR:
+        case CPLD_MISC_INTR:
+        case CPLD_CPU_INTR:
+        case CPLD_MAC_MASK:
+        case CPLD_PHY_MASK:
+        case CPLD_CPLDX_MASK:
+        case CPLD_MAC_THERMAL_MASK:
+        case CPLD_MISC_MASK:
+        case CPLD_CPU_MASK:
+        case CPLD_MAC_EVT:
+        case CPLD_PHY_EVT:
+        case CPLD_CPLDX_EVT:
+        case CPLD_MAC_THERMAL_EVT:
+        case CPLD_MISC_EVT:
+        case CPLD_MAC_RESET:
+        case CPLD_BMC_RESET:
+        case CPLD_USB_RESET:
+        case CPLD_MISC_RESET:
+        case CPLD_BRD_PRESENT:
+        case CPLD_PSU_STATUS:
+        case CPLD_SYSTEM_PWR:
+        case CPLD_MAC_SYNCE:
+        case CPLD_MAC_ROV:
+        case CPLD_MUX_CTRL:
+        case CPLD_SYSTEM_LED_SYS:
+        case CPLD_SYSTEM_LED_FAN:
+        case CPLD_SYSTEM_LED_PSU_0:
+        case CPLD_SYSTEM_LED_PSU_1:
+        case CPLD_SYSTEM_LED_SYNC:
+        case CPLD_MGMT_PORT_0_LED_SPEED:
+        case CPLD_MGMT_PORT_1_LED_SPEED:
+        case CPLD_PORT_LED_CLR:
+        case CPLD_MISC_PWR:
+        case DBG_CPLD_MAC_INTR:
+        case DBG_CPLD_CPLDX_INTR:
+        case DBG_CPLD_MAC_THERMAL_INTR:
+        case DBG_CPLD_MISC_INTR:
+
+        //CPLD 2
+        case CPLD_QSFPDD_PORT_0_7_16_23_INTR:
+        case CPLD_QSFPDD_PORT_8_15_24_31_INTR:
+        case CPLD_QSFPDD_PORT_32_39_48_55_INTR:
+        case CPLD_QSFPDD_PORT_40_47_56_63_INTR:
+        case CPLD_QSFPDD_PORT_0_7_16_23_PRES:
+        case CPLD_QSFPDD_PORT_8_15_24_31_PRES:
+        case CPLD_QSFPDD_PORT_32_39_48_55_PRES:
+        case CPLD_QSFPDD_PORT_40_47_56_63_PRES:
+        case CPLD_QSFPDD_PORT_0_15_16_31_FUSE:
+        case CPLD_QSFPDD_PORT_32_47_48_63_FUSE:
+        case CPLD_QSFPDD_PORT_0_7_16_23_STUCK:
+        case CPLD_QSFPDD_PORT_8_15_24_31_STUCK:
+        case CPLD_QSFPDD_PORT_32_39_48_55_STUCK:
+        case CPLD_QSFPDD_PORT_40_47_56_63_STUCK:
+        case CPLD_QSFPDD_PORT_0_7_16_23_INTR_MASK:
+        case CPLD_QSFPDD_PORT_8_15_24_31_INTR_MASK:
+        case CPLD_QSFPDD_PORT_32_39_48_55_INTR_MASK:
+        case CPLD_QSFPDD_PORT_40_47_56_63_INTR_MASK:
+        case CPLD_QSFPDD_PORT_0_7_16_23_PRES_MASK:
+        case CPLD_QSFPDD_PORT_8_15_24_31_PRES_MASK:
+        case CPLD_QSFPDD_PORT_32_39_48_55_PRES_MASK:
+        case CPLD_QSFPDD_PORT_40_47_56_63_PRES_MASK:
+        case CPLD_QSFPDD_PORT_0_15_16_31_FUSE_MASK:
+        case CPLD_QSFPDD_PORT_32_47_48_63_FUSE_MASK:
+        case CPLD_QSFPDD_PORT_0_7_16_23_STUCK_MASK:
+        case CPLD_QSFPDD_PORT_8_15_24_31_STUCK_MASK:
+        case CPLD_QSFPDD_PORT_32_39_48_55_STUCK_MASK:
+        case CPLD_QSFPDD_PORT_40_47_56_63_STUCK_MASK:
+        case CPLD_QSFPDD_PORT_0_7_16_23_INTR_EVENT:
+        case CPLD_QSFPDD_PORT_8_15_24_31_INTR_EVENT:
+        case CPLD_QSFPDD_PORT_32_39_48_55_INTR_EVENT:
+        case CPLD_QSFPDD_PORT_40_47_56_63_INTR_EVENT:
+        case CPLD_QSFPDD_PORT_0_7_16_23_PRES_EVENT:
+        case CPLD_QSFPDD_PORT_8_15_24_31_PRES_EVENT:
+        case CPLD_QSFPDD_PORT_32_39_48_55_PRES_EVENT:
+        case CPLD_QSFPDD_PORT_40_47_56_63_PRES_EVENT:
+        case CPLD_QSFPDD_PORT_0_15_16_31_FUSE_EVENT:
+        case CPLD_QSFPDD_PORT_32_47_48_63_FUSE_EVENT:
+        case CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT:
+        case CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT:
+        case CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT:
+        case CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT:
+        case CPLD_QSFPDD_PORT_0_7_16_23_RST:
+        case CPLD_QSFPDD_PORT_8_15_24_31_RST:
+        case CPLD_QSFPDD_PORT_32_39_48_55_RST:
+        case CPLD_QSFPDD_PORT_40_47_56_63_RST:
+        case CPLD_QSFPDD_PORT_0_7_16_23_LPMODE:
+        case CPLD_QSFPDD_PORT_8_15_24_31_LPMODE:
+        case CPLD_QSFPDD_PORT_32_39_48_55_LPMODE:
+        case CPLD_QSFPDD_PORT_40_47_56_63_LPMODE:
+        case CPLD_I2C_CONTROL:
+        case CPLD_I2C_RELAY:
+        case CPLD_DBG_QSFPDD_PORT_0_7_16_23_INTR:
+        case CPLD_DBG_QSFPDD_PORT_8_15_24_31_INTR:
+        case CPLD_DBG_QSFPDD_PORT_32_39_48_55_INTR:
+        case CPLD_DBG_QSFPDD_PORT_40_47_56_63_INTR:
+        case CPLD_DBG_QSFPDD_PORT_0_7_16_23_PRES:
+        case CPLD_DBG_QSFPDD_PORT_8_15_24_31_PRES:
+        case CPLD_DBG_QSFPDD_PORT_32_39_48_55_PRES:
+        case CPLD_DBG_QSFPDD_PORT_40_47_56_63_PRES:
+        case CPLD_DBG_QSFPDD_PORT_0_15_16_31_FUSE:
+        case CPLD_DBG_QSFPDD_PORT_32_47_48_63_FUSE:
+
+        //FPGA
+        case FPGA_MINOR_VER:
+        case FPGA_MAJOR_VER:
+        case FPGA_BUILD:
+        case FPGA_CHIP:
+        case FPGA_MGMT_PORT_0_1_TX_RATE_SEL:
+        case FPGA_MGMT_PORT_0_1_RX_RATE_SEL:
+        case FPGA_MGMT_PORT_0_1_TX_DIS:
+        case FPGA_MGMT_PORT_0_1_TX_FAULT:
+        case FPGA_MGMT_PORT_0_1_RX_LOS:
+        case FPGA_MGMT_PORT_0_1_PRES:
+        case FPGA_MGMT_PORT_0_1_STUCK:
+        case FPGA_MGMT_PORT_0_1_TX_FAULT_MASK:
+        case FPGA_MGMT_PORT_0_1_RX_LOS_MASK:
+        case FPGA_MGMT_PORT_0_1_PRES_MASK:
+        case FPGA_MGMT_PORT_0_1_STUCK_MASK:
+        case FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT:
+        case FPGA_MGMT_PORT_0_1_RX_LOS_EVENT:
+        case FPGA_MGMT_PORT_0_1_PRES_EVENT:
+        case FPGA_MGMT_PORT_0_1_STUCK_EVENT:
+        case FPGA_EVT_CTRL:
+        case FPGA_LAN_PORT_RELAY:
+
+            reg = attr_reg[attr->index].reg;
+            mask= attr_reg[attr->index].mask;
+            data_type = attr_reg[attr->index].data_type;
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    ret = cpld_reg_read(dev, &reg_val, reg, mask);
+    if( ret < 0) {
+        return ret;
+    }
+    return _parse_data(buf, reg_val, data_type);
+}
+
+/* set cpld register value */
+static ssize_t cpld_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg_val = 0;
+    u8 reg = 0;
+    u8 mask = MASK_NONE;
+    char *range = NULL;
+    int ret = 0;
+
+    if (kstrtou8(buf, 0, &reg_val) < 0)
+        return -EINVAL;
+
+    ret = _store_value_check(attr->index, reg_val, &range);
+    if (ret < 0) {
+        if(ret == -2) {
+            return -EINVAL;
+        } else {
+            pr_err("Input is out of range(%s)\n", range);
+            return -EINVAL;
+        }
+    }
+
+    switch (attr->index) {
+        // CPLD Common
+        case CPLD_EVT_CTRL:
+
+        //CPLD 1
+        case CPLD_MAC_MASK:
+        case CPLD_PHY_MASK:
+        case CPLD_CPLDX_MASK:
+        case CPLD_MAC_THERMAL_MASK:
+        case CPLD_MISC_MASK:
+        case CPLD_CPU_MASK:
+        case CPLD_MAC_RESET:
+        case CPLD_BMC_RESET:
+        case CPLD_USB_RESET:
+        case CPLD_MISC_RESET:
+        case CPLD_MUX_CTRL:
+        case CPLD_SYSTEM_LED_SYS:
+        case CPLD_SYSTEM_LED_FAN:
+        case CPLD_SYSTEM_LED_PSU_0:
+        case CPLD_SYSTEM_LED_PSU_1:
+        case CPLD_SYSTEM_LED_SYNC:
+        case CPLD_MGMT_PORT_0_LED_SPEED:
+        case CPLD_MGMT_PORT_1_LED_SPEED:
+        case CPLD_PORT_LED_CLR:
+
+        //CPLD 2
+        case CPLD_QSFPDD_PORT_0_7_16_23_INTR_MASK:
+        case CPLD_QSFPDD_PORT_8_15_24_31_INTR_MASK:
+        case CPLD_QSFPDD_PORT_32_39_48_55_INTR_MASK:
+        case CPLD_QSFPDD_PORT_40_47_56_63_INTR_MASK:
+        case CPLD_QSFPDD_PORT_0_7_16_23_PRES_MASK:
+        case CPLD_QSFPDD_PORT_8_15_24_31_PRES_MASK:
+        case CPLD_QSFPDD_PORT_32_39_48_55_PRES_MASK:
+        case CPLD_QSFPDD_PORT_40_47_56_63_PRES_MASK:
+        case CPLD_QSFPDD_PORT_0_15_16_31_FUSE_MASK:
+        case CPLD_QSFPDD_PORT_32_47_48_63_FUSE_MASK:
+        case CPLD_QSFPDD_PORT_0_7_16_23_STUCK_MASK:
+        case CPLD_QSFPDD_PORT_8_15_24_31_STUCK_MASK:
+        case CPLD_QSFPDD_PORT_32_39_48_55_STUCK_MASK:
+        case CPLD_QSFPDD_PORT_40_47_56_63_STUCK_MASK:
+        case CPLD_QSFPDD_PORT_0_7_16_23_RST:
+        case CPLD_QSFPDD_PORT_8_15_24_31_RST:
+        case CPLD_QSFPDD_PORT_32_39_48_55_RST:
+        case CPLD_QSFPDD_PORT_40_47_56_63_RST:
+        case CPLD_QSFPDD_PORT_0_7_16_23_LPMODE:
+        case CPLD_QSFPDD_PORT_8_15_24_31_LPMODE:
+        case CPLD_QSFPDD_PORT_32_39_48_55_LPMODE:
+        case CPLD_QSFPDD_PORT_40_47_56_63_LPMODE:
+        case CPLD_I2C_CONTROL:
+        case CPLD_I2C_RELAY:
+        case CPLD_DBG_QSFPDD_PORT_0_7_16_23_INTR:
+        case CPLD_DBG_QSFPDD_PORT_8_15_24_31_INTR:
+        case CPLD_DBG_QSFPDD_PORT_32_39_48_55_INTR:
+        case CPLD_DBG_QSFPDD_PORT_40_47_56_63_INTR:
+        case CPLD_DBG_QSFPDD_PORT_0_7_16_23_PRES:
+        case CPLD_DBG_QSFPDD_PORT_8_15_24_31_PRES:
+        case CPLD_DBG_QSFPDD_PORT_32_39_48_55_PRES:
+        case CPLD_DBG_QSFPDD_PORT_40_47_56_63_PRES:
+        case CPLD_DBG_QSFPDD_PORT_0_15_16_31_FUSE:
+        case CPLD_DBG_QSFPDD_PORT_32_47_48_63_FUSE:
+
+        //FPGA
+        case FPGA_MGMT_PORT_0_1_TX_RATE_SEL:
+        case FPGA_MGMT_PORT_0_1_RX_RATE_SEL:
+        case FPGA_MGMT_PORT_0_1_TX_DIS:
+        case FPGA_MGMT_PORT_0_1_TX_FAULT_MASK:
+        case FPGA_MGMT_PORT_0_1_RX_LOS_MASK:
+        case FPGA_MGMT_PORT_0_1_PRES_MASK:
+        case FPGA_MGMT_PORT_0_1_STUCK_MASK:
+        case FPGA_EVT_CTRL:
+
+            reg = attr_reg[attr->index].reg;
+            mask= attr_reg[attr->index].mask;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return cpld_reg_write(dev, reg_val, count, reg, mask);
+}
+
+/* get cpld register value */
+int _cpld_reg_read(struct device *dev, u8 reg, u8 mask)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int reg_val;
+
+    I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg);
+
+    if (unlikely(reg_val < 0)) {
+        return reg_val;
+    } else {
+        reg_val=_mask_shift(reg_val, mask);
+        return reg_val;
+    }
+}
+
+/* get cpld register value */
+static ssize_t cpld_reg_read(struct device *dev,
+                    u8 *reg_val,
+                    u8 reg,
+                    u8 mask)
+{
+    int ret = 0;
+
+    if(reg_val == NULL) {
+        return -EINVAL;
+    }
+
+    ret = _cpld_reg_read(dev, reg, mask);
+    if (unlikely(ret < 0)) {
+        dev_err(dev, "cpld_reg_read() error, reg_val=%d\n", ret);
+        return ret;
+    }
+
+    *reg_val = (u8)ret;
+    return 0;
+}
+
+int _cpld_reg_write(struct device *dev,
+                    u8 reg,
+                    u8 reg_val)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int ret = 0;
+
+    I2C_WRITE_BYTE_DATA(ret, &data->access_lock,
+               client, reg, reg_val);
+
+    return ret;
+}
+
+/* set cpld register value */
+static ssize_t cpld_reg_write(struct device *dev,
+                    u8 reg_val,
+                    size_t count,
+                    u8 reg,
+                    u8 mask)
+{
+    u8 reg_val_now, shift;
+    int ret = 0;
+
+    //apply continuous bits operation if mask is specified, discontinuous bits are not supported
+    if (mask != MASK_ALL) {
+        reg_val_now = _cpld_reg_read(dev, reg, MASK_ALL);
+        if (unlikely(reg_val_now < 0)) {
+            dev_err(dev, "cpld_reg_write() error, reg_val_now=%d\n", reg_val_now);
+            return reg_val_now;
+        } else {
+            //clear bits in reg_val_now by the mask
+            reg_val_now &= ~mask;
+            //get bit shift by the mask
+            shift = _shift(mask);
+            //calculate new reg_val
+            reg_val = reg_val_now | (reg_val << shift);
+        }
+    }
+
+    ret = _cpld_reg_write(dev, reg, reg_val);
+
+    if (unlikely(ret < 0)) {
+        dev_err(dev, "cpld_reg_write() error, return=%d\n", ret);
+        return ret;
+    }
+
+    return count;
+}
+
+/* get cpld and fpga version register value */
+static ssize_t version_h_show(struct device *dev,
+                    struct device_attribute *da,
+                    char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int major =-1;
+    int minor =-1;
+    int build =-1;
+    int major_val = -1;
+    int minor_val = -1;
+    int build_val = -1;
+
+    switch(attr->index) {
+        case CPLD_VERSION_H:
+            major = CPLD_MAJOR_VER;
+            minor = CPLD_MINOR_VER;
+            build = CPLD_BUILD_VER;
+            break;
+        case FPGA_VERSION_H:
+            major = FPGA_MAJOR_VER;
+            minor = FPGA_MINOR_VER;
+            build = FPGA_BUILD;
+            break;
+        default:
+            major=-1;
+            minor=-1;
+            build=-1;
+            break;
+    }
+
+    if (major >= 0 && minor >= 0 && build >= 0) {
+        major_val = _cpld_reg_read(dev, attr_reg[major].reg, attr_reg[major].mask);
+        minor_val = _cpld_reg_read(dev, attr_reg[minor].reg, attr_reg[minor].mask);
+        build_val = _cpld_reg_read(dev, attr_reg[build].reg, attr_reg[build].mask);
+
+        if(major_val < 0 || minor_val < 0 || build_val < 0)
+            return -EIO ;
+
+        return sprintf(buf, "%d.%02d.%03d", major_val, minor_val, build_val);
+    }
+    return -EINVAL;
+}
+
+static int _get_led_node(int index, led_node_t *node)
+{
+    color_obj_t mgmt_port_set[COLOR_VAL_MAX] = {
+        [0] = {.status = LED_COLOR_DARK           , .val = 0b00000000},
+        [1] = {.status = LED_COLOR_DARK           , .val = 0b00000001},
+        [2] = {.status = LED_COLOR_DARK           , .val = 0b00000100},
+        [3] = {.status = LED_COLOR_DARK           , .val = 0b00000101},
+        [4] = {.status = LED_COLOR_GREEN          , .val = 0b00001001},
+        [5] = {.status = LED_COLOR_GREEN_BLINK    , .val = 0b00001101},
+        [6] = {.status = LED_COLOR_YELLOW         , .val = 0b00001000},
+        [7] = {.status = LED_COLOR_YELLOW_BLINK   , .val = 0b00001100},
+        [8] = {.val = -1}
+    };
+
+    switch (index){
+        case CPLD_MGMT_PORT_0_LED_STATUS:
+        case CPLD_MGMT_PORT_1_LED_STATUS:
+            node->type=TYPE_LED_2_SETS;
+            node->reg = attr_reg[index].reg;
+            node->mask= attr_reg[index].mask;
+            node->color_mask = MASK_0000_1101;
+            node->data_type = attr_reg[index].data_type;
+            memcpy(node->color_obj, mgmt_port_set, sizeof(mgmt_port_set));
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+static ssize_t led_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    led_node_t node = {0};
+    int status = LED_COLOR_DARK;
+    int led_val = 0;
+    int found = 0;
+    int i = 0;
+
+    if(_get_led_node(attr->index,&node) != 0) {
+        return -EINVAL;		
+    }
+
+    led_val=_cpld_reg_read(dev, node.reg, node.mask);
+
+    if(led_val < 0) {
+        return led_val;
+    }
+
+    for(i= 0; i<COLOR_VAL_MAX; i++) {
+        if(node.color_obj[i].val == -1)
+            break;
+
+        if((led_val & node.color_mask) == node.color_obj[i].val) {
+            status = node.color_obj[i].status;
+            found=1;
+            break;
+        }
+    }
+
+    if(found == 0) {
+        pr_err("Led value not in definition!!\n");
+        return -EINVAL;
+    }
+
+    return _parse_data(buf, status, node.data_type);
+}
+
+static ssize_t led_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    led_node_t node = {0};
+    int status = LED_COLOR_DARK;
+    short int val;
+    int found = 0;
+    int i = 0;
+
+    if(_get_led_node(attr->index,&node) != 0) {
+        return -EINVAL;		
+    }
+
+    if (kstrtoint(buf, 0, &status) < 0)
+        return -EINVAL;
+
+    for(i= 0; i<COLOR_VAL_MAX; i++) {
+        if(node.color_obj[i].val == -1)
+            break;
+
+        if(status == node.color_obj[i].status) {
+            found=1;
+            val = node.color_obj[i].val;
+            break;
+        }
+    }
+
+    if(found == 0) {
+        pr_err("Led value not in definition!!\n");
+        return -EINVAL;
+    }
+
+    return cpld_reg_write(dev, (u8)val, count, node.reg, node.mask);
+}
+
+/* add valid cpld client to list */
+static void cpld_add_client(struct i2c_client *client)
+{
+    struct cpld_client_node *node = NULL;
+
+    node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL);
+    if (!node) {
+        dev_info(&client->dev,
+            "Can't allocate cpld_client_node for index %d\n",
+            client->addr);
+        return;
+    }
+
+    node->client = client;
+
+    mutex_lock(&list_lock);
+    list_add(&node->list, &cpld_client_list);
+    mutex_unlock(&list_lock);
+}
+
+/* remove exist cpld client in list */
+static void cpld_remove_client(struct i2c_client *client)
+{
+    struct list_head    *list_node = NULL;
+    struct cpld_client_node *cpld_node = NULL;
+    int found = 0;
+
+    mutex_lock(&list_lock);
+    list_for_each(list_node, &cpld_client_list) {
+        cpld_node = list_entry(list_node,
+                struct cpld_client_node, list);
+
+        if (cpld_node->client == client) {
+            found = 1;
+            break;
+        }
+    }
+
+    if (found) {
+        list_del(list_node);
+        kfree(cpld_node);
+    }
+    mutex_unlock(&list_lock);
+}
+
+/* cpld drvier probe */
+static int cpld_probe(struct i2c_client *client,
+                    const struct i2c_device_id *dev_id)
+{
+    int status;
+    struct i2c_adapter *adap = client->adapter;
+    struct device *dev = &client->dev;
+    struct cpld_data *data = NULL;
+    struct i2c_mux_core *muxc;
+
+    muxc = i2c_mux_alloc(adap, dev, CPLD_MAX_NCHANS, sizeof(*data), 0,
+                mux_select_chan, mux_deselect_mux);
+
+    data = i2c_mux_priv(muxc);
+    if (!data)
+        return -ENOMEM;
+
+    /* init cpld data for client */
+    i2c_set_clientdata(client, muxc);
+
+    data->client = client;
+    mutex_init(&data->access_lock);
+
+    if (!i2c_check_functionality(client->adapter,
+                I2C_FUNC_SMBUS_BYTE_DATA)) {
+        dev_info(&client->dev,
+            "i2c_check_functionality failed (0x%x)\n",
+            client->addr);
+        status = -EIO;
+        goto exit;
+    }
+
+    data->index = dev_id->driver_data;
+
+    /* register sysfs hooks for different cpld group */
+    dev_info(&client->dev, "probe cpld with index %d\n", data->index);
+
+    if(mux_en) {
+        status = mux_init(dev);
+        if (status < 0) {
+            dev_warn(dev, "Mux init failed\n");
+            goto exit;
+        }
+    }
+
+    switch (data->index) {
+    case cpld1:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &cpld1_group);
+        break;
+    case cpld2:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &cpld2_group);
+        break;
+    case cpld3:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &cpld3_group);
+        break;
+    case fpga:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &fpga_group);
+        break;
+    default:
+        status = -EINVAL;
+    }
+
+    if(mux_en) {
+        if(data->chip->nchans > 0){
+            status = sysfs_add_file_to_group(&client->dev.kobj,
+                        &sensor_dev_attr_idle_state.dev_attr.attr, NULL);
+        }
+    }
+
+    if (status)
+        goto exit;
+
+    dev_info(&client->dev, "chip found\n");
+
+    /* add probe chip to client list */
+    cpld_add_client(client);
+
+    return 0;
+exit:
+    switch (data->index) {
+    case cpld1:
+        sysfs_remove_group(&client->dev.kobj, &cpld1_group);
+        break;
+    case cpld2:
+        sysfs_remove_group(&client->dev.kobj, &cpld2_group);
+        break;
+    case cpld3:
+        sysfs_remove_group(&client->dev.kobj, &cpld3_group);
+        break;
+    case fpga:
+        sysfs_remove_group(&client->dev.kobj, &fpga_group);
+        break;
+    default:
+        break;
+    }
+
+    return status;
+}
+
+/* cpld drvier remove */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+cpld_remove(struct i2c_client *client)
+{
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct device *dev = &client->dev;
+    struct cpld_data *data = i2c_mux_priv(muxc);
+
+    if(mux_en) {
+        if(data->chip->nchans > 0){
+            sysfs_remove_file_from_group(&client->dev.kobj,
+                &sensor_dev_attr_idle_state.dev_attr.attr, NULL);
+        }
+    }
+
+    switch (data->index) {
+    case cpld1:
+        sysfs_remove_group(&client->dev.kobj, &cpld1_group);
+        break;
+    case cpld2:
+        sysfs_remove_group(&client->dev.kobj, &cpld2_group);
+        break;
+    case cpld3:
+        sysfs_remove_group(&client->dev.kobj, &cpld3_group);
+        break;
+    case fpga:
+        sysfs_remove_group(&client->dev.kobj, &fpga_group);
+        break;
+    default:
+        break;
+    }
+
+    if(mux_en) {
+        mux_cleanup(dev);
+    }
+
+    cpld_remove_client(client);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+    return 0;
+#endif
+}
+
+MODULE_DEVICE_TABLE(i2c, cpld_id);
+
+static struct i2c_driver cpld_driver = {
+    .class      = I2C_CLASS_HWMON,
+    .driver = {
+        .name = "x86_64_ufispace_s9321_64e_cpld",
+    },
+    .probe = cpld_probe,
+    .remove = cpld_remove,
+    .id_table = cpld_id,
+    .address_list = cpld_i2c_addr,
+};
+
+static int __init cpld_init(void)
+{
+    mutex_init(&list_lock);
+    return i2c_add_driver(&cpld_driver);
+}
+
+static void __exit cpld_exit(void)
+{
+    i2c_del_driver(&cpld_driver);
+}
+
+MODULE_AUTHOR("Nonodark Huang<nonodark.huang@ufispace.com>");
+MODULE_DESCRIPTION("x86_64_ufispace_s9321_64e_cpld driver");
+MODULE_VERSION("0.0.1");
+MODULE_LICENSE("GPL");
+
+module_init(cpld_init);
+module_exit(cpld_exit);
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-cpld-main.h b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-cpld-main.h
new file mode 100644
index 00000000000..c8547ee5d88
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-cpld-main.h
@@ -0,0 +1,323 @@
+/* header file for i2c cpld driver of ufispace_s9321_64e
+ *
+ * Copyright (C) 2017 UfiSpace Technology Corporation.
+ * Wade He <wade.ce.he@ufispace.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef UFISPACE_S9321_64E_CPLD_MAIN_H
+#define UFISPACE_S9321_64E_CPLD_MAIN_H
+
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <dt-bindings/mux/mux.h>
+#include <linux/i2c-mux.h>
+#include <linux/version.h>
+
+/* CPLD device index value */
+enum cpld_id {
+    cpld1,
+    cpld2,
+    cpld3,
+    fpga,
+};
+
+/* 
+ *  Normally, the CPLD register range is 0x00-0xff.
+ *  Therefore, we define the invalid address 0x100 as NONE_REG
+ */
+
+#define NONE_REG                                        0x100
+
+/* CPLD Common */
+#define CPLD_VERSION_REG                                0x02
+#define CPLD_ID_REG                                     0x03
+#define CPLD_BUILD_REG                                  0x04
+#define CPLD_EVT_CTRL_REG                               0x3F
+
+/* CPLD 1 registers */
+#define CPLD_BOARD_ID_0_REG                             0x00
+#define CPLD_BOARD_ID_1_REG                             0x01
+// Interrupt status
+#define CPLD_MAC_INTR_REG                               0x10
+#define CPLD_PHY_INTR_REG                               0x13
+#define CPLD_CPLDX_INTR_REG                             0x14
+#define CPLD_THERMAL_INTR_REG                           0x17
+#define CPLD_MISC_INTR_REG                              0x1B
+#define CPLD_CPU_INTR_REG                               0x1C
+// Interrupt mask
+#define CPLD_MAC_MASK_REG                               0x20
+#define CPLD_PHY_MASK_REG                               0x23
+#define CPLD_CPLDX_MASK_REG                             0x24
+#define CPLD_THERMAL_MASK_REG                           0x27
+#define CPLD_MISC_MASK_REG                              0x2B
+#define CPLD_CPU_MASK_REG                               0x2C
+// Interrupt event
+#define CPLD_MAC_EVT_REG                                0x30
+#define CPLD_PHY_EVT_REG                                0x33
+#define CPLD_CPLDX_EVT_REG                              0x34
+#define CPLD_THERMAL_EVT_REG                            0x37
+#define CPLD_MISC_EVT_REG                               0x3B
+// Reset ctrl
+#define CPLD_MAC_RESET_REG                              0x40
+#define CPLD_BMC_RESET_REG                              0x43
+#define CPLD_USB_RESET_REG                              0x44
+#define CPLD_MISC_RESET_REG                             0x48
+// Sys status
+#define CPLD_BRD_PRESENT_REG                            0x50
+#define CPLD_PSU_STATUS_REG                             0x51
+#define CPLD_SYSTEM_PWR_REG                             0x52
+#define CPLD_MAC_SYNCE_REG                              0x53
+#define CPLD_MAC_ROV_REG                                0x54
+// Mux ctrl
+#define CPLD_MUX_CTRL_REG                               0x5C
+// Led ctrl
+#define CPLD_SYSTEM_LED_SYS_FAN_REG                     0x80
+#define CPLD_SYSTEM_LED_PSU_REG                         0x81
+#define CPLD_SYSTEM_LED_SYNC_REG                        0x82
+#define CPLD_SFP_PORT_0_1_LED_REG                       0x83
+#define CPLD_PORT_LED_CLR_REG                           0x85
+// Power Good Status
+#define CPLD_MISC_PWR_REG                               0x92
+// Interrupt debug
+#define DBG_CPLD_MAC_INTR_REG                           0xE0
+#define DBG_CPLD_CPLDX_INTR_REG                         0xE4
+#define DBG_CPLD_THERMAL_INTR_REG                       0xE7
+#define DBG_CPLD_MISC_INTR_REG                          0xEB
+
+/* CPLD 2 and CPLD 3*/
+// Interrupt status
+#define CPLD_QSFPDD_PORT_0_7_16_23_INTR_REG             0x10
+#define CPLD_QSFPDD_PORT_8_15_24_31_INTR_REG            0x11
+#define CPLD_QSFPDD_PORT_32_39_48_55_INTR_REG           0x12
+#define CPLD_QSFPDD_PORT_40_47_56_63_INTR_REG           0x13
+#define CPLD_QSFPDD_PORT_0_7_16_23_PRES_REG             0x14
+#define CPLD_QSFPDD_PORT_8_15_24_31_PRES_REG            0x15
+#define CPLD_QSFPDD_PORT_32_39_48_55_PRES_REG           0x16
+#define CPLD_QSFPDD_PORT_40_47_56_63_PRES_REG           0x17
+#define CPLD_QSFPDD_PORT_0_15_16_31_FUSE_REG            0x18
+#define CPLD_QSFPDD_PORT_32_47_48_63_FUSE_REG           0x19
+#define CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG            0x1A
+#define CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG           0x1B
+#define CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG          0x1C
+#define CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG          0x1D
+// Interrupt mask
+#define CPLD_QSFPDD_PORT_0_7_16_23_INTR_MASK_REG        0x20
+#define CPLD_QSFPDD_PORT_8_15_24_31_INTR_MASK_REG       0x21
+#define CPLD_QSFPDD_PORT_32_39_48_55_INTR_MASK_REG      0x22
+#define CPLD_QSFPDD_PORT_40_47_56_63_INTR_MASK_REG      0x23
+#define CPLD_QSFPDD_PORT_0_7_16_23_PRES_MASK_REG        0x24
+#define CPLD_QSFPDD_PORT_8_15_24_31_PRES_MASK_REG       0x25
+#define CPLD_QSFPDD_PORT_32_39_48_55_PRES_MASK_REG      0x26
+#define CPLD_QSFPDD_PORT_40_47_56_63_PRES_MASK_REG      0x27
+#define CPLD_QSFPDD_PORT_0_15_16_31_FUSE_MASK_REG       0x28
+#define CPLD_QSFPDD_PORT_32_47_48_63_FUSE_MASK_REG      0x29
+#define CPLD_QSFPDD_PORT_0_7_16_23_STUCK_MASK_REG       0x2A
+#define CPLD_QSFPDD_PORT_8_15_24_31_STUCK_MASK_REG      0x2B
+#define CPLD_QSFPDD_PORT_32_39_48_55_STUCK_MASK_REG     0x2C
+#define CPLD_QSFPDD_PORT_40_47_56_63_STUCK_MASK_REG     0x2D
+// Interrupt event
+#define CPLD_QSFPDD_PORT_0_7_16_23_INTR_EVENT_REG       0x30
+#define CPLD_QSFPDD_PORT_8_15_24_31_INTR_EVENT_REG      0x31
+#define CPLD_QSFPDD_PORT_32_39_48_55_INTR_EVENT_REG     0x32
+#define CPLD_QSFPDD_PORT_40_47_56_63_INTR_EVENT_REG     0x33
+#define CPLD_QSFPDD_PORT_0_7_16_23_PRES_EVENT_REG       0x34
+#define CPLD_QSFPDD_PORT_8_15_24_31_PRES_EVENT_REG      0x35
+#define CPLD_QSFPDD_PORT_32_39_48_55_PRES_EVENT_REG     0x36
+#define CPLD_QSFPDD_PORT_40_47_56_63_PRES_EVENT_REG     0x37
+#define CPLD_QSFPDD_PORT_0_15_16_31_FUSE_EVENT_REG      0x38
+#define CPLD_QSFPDD_PORT_32_47_48_63_FUSE_EVENT_REG     0x39
+#define CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG      0x3A
+#define CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG     0x3B
+#define CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG    0x3C
+#define CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG    0x3D
+// Port ctrl
+#define CPLD_QSFPDD_PORT_0_7_16_23_RST_REG              0x40
+#define CPLD_QSFPDD_PORT_8_15_24_31_RST_REG             0x41
+#define CPLD_QSFPDD_PORT_32_39_48_55_RST_REG            0x42
+#define CPLD_QSFPDD_PORT_40_47_56_63_RST_REG            0x43
+#define CPLD_QSFPDD_PORT_0_7_16_23_LPMODE_REG           0x44
+#define CPLD_QSFPDD_PORT_8_15_24_31_LPMODE_REG          0x45
+#define CPLD_QSFPDD_PORT_32_39_48_55_LPMODE_REG         0x46
+#define CPLD_QSFPDD_PORT_40_47_56_63_LPMODE_REG         0x47
+
+#define CPLD_I2C_CONTROL_REG                            0xA0
+#define CPLD_I2C_RELAY_REG                              0xA5
+// Interrupt debug
+#define CPLD_DBG_QSFPDD_PORT_0_7_16_23_INTR_REG         0xE0
+#define CPLD_DBG_QSFPDD_PORT_8_15_24_31_INTR_REG        0xE1
+#define CPLD_DBG_QSFPDD_PORT_32_39_48_55_INTR_REG       0xE2
+#define CPLD_DBG_QSFPDD_PORT_40_47_56_63_INTR_REG       0xE3
+#define CPLD_DBG_QSFPDD_PORT_0_7_16_23_PRES_REG         0xE4
+#define CPLD_DBG_QSFPDD_PORT_8_15_24_31_PRES_REG        0xE5
+#define CPLD_DBG_QSFPDD_PORT_32_39_48_55_PRES_REG       0xE6
+#define CPLD_DBG_QSFPDD_PORT_40_47_56_63_PRES_REG       0xE7
+#define CPLD_DBG_QSFPDD_PORT_0_15_16_31_FUSE_REG        0xE8
+#define CPLD_DBG_QSFPDD_PORT_32_47_48_63_FUSE_REG       0xE9
+
+//FPGA
+#define FPGA_VERSION_REG                                0x02
+#define FPGA_BUILD_REG                                  0x04
+#define FPGA_CHIP_REG                                   0x05
+#define FPGA_MGMT_PORT_0_1_TX_RATE_SEL_REG              0x0A
+#define FPGA_MGMT_PORT_0_1_RX_RATE_SEL_REG              0x0B
+#define FPGA_MGMT_PORT_0_1_TX_DIS_REG                   0x0C
+#define FPGA_MGMT_PORT_0_1_TX_FAULT_REG                 0x10
+#define FPGA_MGMT_PORT_0_1_RX_LOS_REG                   0x11
+#define FPGA_MGMT_PORT_0_1_PRES_REG                     0x12
+#define FPGA_MGMT_PORT_0_1_STUCK_REG                    0x13
+#define FPGA_MGMT_PORT_0_1_TX_FAULT_MASK_REG            0x20
+#define FPGA_MGMT_PORT_0_1_RX_LOS_MASK_REG              0x21
+#define FPGA_MGMT_PORT_0_1_PRES_MASK_REG                0x22
+#define FPGA_MGMT_PORT_0_1_STUCK_MASK_REG               0x23
+#define FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT_REG           0x30
+#define FPGA_MGMT_PORT_0_1_RX_LOS_EVENT_REG             0x31
+#define FPGA_MGMT_PORT_0_1_PRES_EVENT_REG               0x32
+#define FPGA_MGMT_PORT_0_1_STUCK_EVENT_REG              0x33
+#define FPGA_EVT_CTRL_REG                               0x3F
+#define FPGA_LAN_PORT_RELAY_REG                         0x40
+
+//MASK
+#define MASK_ALL                           (0xFF)
+#define MASK_NONE                          (0x00)
+#define MASK_0000_0001                     (0x01)
+#define MASK_0000_0010                     (0x02)
+#define MASK_0000_0011                     (0x03)
+#define MASK_0000_0100                     (0x04)
+#define MASK_0000_0111                     (0x07)
+#define MASK_0000_1000                     (0x08)
+#define MASK_0000_1101                     (0x0D)
+#define MASK_0000_1111                     (0x0F)
+#define MASK_0001_0000                     (0x10)
+#define MASK_0001_1000                     (0x18)
+#define MASK_0010_0000                     (0x20)
+#define MASK_0011_1000                     (0x38)
+#define MASK_0011_1111                     (0x3F)
+#define MASK_0100_0000                     (0x40)
+#define MASK_1000_0000                     (0x80)
+#define MASK_1100_0000                     (0xC0)
+#define MASK_1101_0000                     (0xD0)
+#define MASK_1111_0000                     (0xF0)
+
+
+// MUX
+#define CPLD_MAX_NCHANS 32
+#define CPLD_MUX_TIMEOUT                   1400
+#define CPLD_MUX_RETRY_WAIT                200
+#define CPLD_MUX_CHN_OFF                   (0x0)
+#define FPGA_MUX_CHN_OFF                   (0x0)
+#define CPLD_I2C_ENABLE_BRIDGE             MASK_1000_0000
+#define CPLD_I2C_ENABLE_CHN_SEL            MASK_1000_0000
+#define FPGA_LAN_PORT_RELAY_ENABLE         MASK_1000_0000
+
+/* common manipulation */
+#define INVALID(i, min, max)    ((i < min) || (i > max) ? 1u : 0u)
+
+struct cpld_data {
+    int index;                  /* CPLD index */
+    struct mutex access_lock;   /* mutex for cpld access */
+    u8 access_reg;              /* register to access */
+
+    const struct chip_desc *chip;
+    u32 last_chan;       /* last register value */
+    /* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
+    s32 idle_state;
+
+    struct i2c_client *client;
+    raw_spinlock_t lock;
+};
+
+struct chip_desc {
+    u8 nchans;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0)
+    struct i2c_device_identity id;
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0) */
+};
+
+/*
+ *  Generally, the color bit for CPLD is 4 bits, and there are 16 color sets available.
+ *  The color bit for GPIO is 2 bits (representing two GPIO pins), and there are 4 color sets.
+ *  Therefore, we use the 16 color sets available for our application.
+ */
+#define COLOR_VAL_MAX           16
+
+typedef enum {
+    LED_COLOR_DARK,
+    LED_COLOR_GREEN,
+    LED_COLOR_YELLOW,
+    LED_COLOR_RED,
+    LED_COLOR_BLUE,
+    LED_COLOR_GREEN_BLINK,
+    LED_COLOR_YELLOW_BLINK,
+    LED_COLOR_RED_BLINK,
+    LED_COLOR_BLUE_BLINK,
+    LED_COLOR_CYAN=100,
+    LED_COLOR_MAGENTA,
+    LED_COLOR_WHITE,
+    LED_COLOR_CYAN_BLINK,
+    LED_COLOR_MAGENTA_BLINK,
+    LED_COLOR_WHITE_BLINK,
+} s3ip_led_status_e;
+
+typedef enum {
+    TYPE_LED_UNNKOW = 0,
+    // Blue
+    TYPE_LED_1_SETS,
+
+    // Green, Yellow
+    TYPE_LED_2_SETS,
+
+    // Red, Green, Blue, Yellow, Cyan, Magenta, white
+    TYPE_LED_7_SETS,
+    TYPE_LED_SETS_MAX,
+} led_type_e;
+
+typedef enum {
+    PORT_NONE_BLOCK = 0,
+    PORT_BLOCK      = 1,
+} port_block_status_e;
+
+typedef struct
+{
+    short int val;
+    int status;
+} color_obj_t;
+
+typedef struct  {
+    int type;
+    u8 reg;
+    u8 mask;
+    u8 color_mask;
+    u8 data_type;
+    color_obj_t color_obj[COLOR_VAL_MAX];
+} led_node_t;
+
+
+u8 _mask_shift(u8 val, u8 mask);
+int _cpld_reg_write(struct device *dev, u8 reg, u8 reg_val);
+int _cpld_reg_read(struct device *dev, u8 reg, u8 mask);
+int mux_select_chan(struct i2c_mux_core *muxc, u32 chan);
+int mux_deselect_mux(struct i2c_mux_core *muxc, u32 chan);
+ssize_t idle_state_show(struct device *dev,
+            struct device_attribute *attr,
+            char *buf);
+
+ssize_t idle_state_store(struct device *dev,
+            struct device_attribute *attr,
+            const char *buf, size_t count);
+int mux_init(struct device *dev);
+void mux_cleanup(struct device *dev);
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-cpld-mux.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-cpld-mux.c
new file mode 100644
index 00000000000..46674e3a57e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-cpld-mux.c
@@ -0,0 +1,636 @@
+/*
+ * A i2c cpld driver for the ufispace_s9321_64e
+ *
+ * Copyright (C) 2017-2019 UfiSpace Technology Corporation.
+ * Nonodark Huang <nonodark.huang@ufispace.com>
+ *
+ * Based on i2c-mux-pca954x.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/delay.h>
+
+#include "x86-64-ufispace-s9321-64e-cpld-main.h"
+
+#define NELEMS(x)  (sizeof(x) / sizeof((x)[0]))
+
+/* Provide specs for the cpld mux types we know about */
+const struct chip_desc chips[] = {
+    [cpld1] = {
+        .nchans = 0,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0)
+        .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0) */
+    },
+    [cpld2] = {
+        .nchans = 32,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0)
+        .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0) */
+    },
+    [cpld3] = {
+        .nchans = 32,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0)
+        .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0) */
+    },
+    [fpga] = {
+        .nchans = 2,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0)
+        .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0) */
+    },
+};
+
+
+typedef u8 chan_map[CPLD_MAX_NCHANS];
+static const chan_map chans_map[] = {
+    [cpld1] = {0},
+    [cpld2] = {
+        // port 0     port 1        port 2        port 3
+        (0b00000001), (0b00000010), (0b00000011), (0b00000100),
+        // port 4     port 5        port 6        port 7
+        (0b00000101), (0b00000110), (0b00000111), (0b00001000),
+        // port 8     port 9        port 10       port 11
+        (0b00001001), (0b00001010), (0b00001011), (0b00001100),
+        // port 12    port 13       port 14       port 15
+        (0b00001101), (0b00001110), (0b00001111), (0b00010000),
+        // port 32    port 33       port 34       port 35
+        (0b00010001), (0b00010010), (0b00010011), (0b00010100),
+        // port 36    port 37       port 38       port 39
+        (0b00010101), (0b00010110), (0b00010111), (0b00011000),
+        // port 40    port 41       port 42       port 43
+        (0b00011001), (0b00011010), (0b00011011), (0b00011100),
+        // port 44    port 45       port 46       port 47
+        (0b00011101), (0b00011110), (0b00011111), (0b00100000),
+    },
+    [cpld3] = {
+        // port 16    port 17       port 18       port 19
+        (0b00000001), (0b00000010), (0b00000011), (0b00000100),
+        // port 20    port 21       port 22       port 23
+        (0b00000101), (0b00000110), (0b00000111), (0b00001000),
+        // port 24    port 25       port 26       port 27
+        (0b00001001), (0b00001010), (0b00001011), (0b00001100),
+        // port 28    port 29       port 30       port 31
+        (0b00001101), (0b00001110), (0b00001111), (0b00010000),
+        // port 48    port 49       port 50       port 51
+        (0b00010001), (0b00010010), (0b00010011), (0b00010100),
+        // port 52    port 53       port 54       port 55
+        (0b00010101), (0b00010110), (0b00010111), (0b00011000),
+        // port 56    port 57       port 58       port 59
+        (0b00011001), (0b00011010), (0b00011011), (0b00011100),
+        // port 60    port 61       port 62       port 63
+        (0b00011101), (0b00011110), (0b00011111), (0b00100000),
+    },
+    [fpga] = {
+        // port 64   port 65
+        (0b0000001), (0b00000010),
+    },
+};
+
+typedef u32 port_map[CPLD_MAX_NCHANS];
+static const port_map ports_map[] = {
+    [cpld1] = {-1},
+    [cpld2] = {
+        0 , 1 , 2 , 3,
+        4 , 5 , 6 , 7,
+        8 , 9 , 10, 11,
+        12, 13, 14, 15,
+        32, 33, 34, 35,
+        36, 37, 38, 39,
+        40, 41, 42, 43,
+        44, 45, 46, 47,
+    },
+    [cpld3] = {
+        16, 17, 18, 19,
+        20, 21, 22, 23,
+        24, 25, 26, 27,
+        28, 29, 30, 31,
+        48, 49, 50, 51,
+        52, 53, 54, 55,
+        56, 57, 58, 59,
+        60, 61, 62, 63,
+    },
+    [fpga] = {
+        64, 65,
+    },
+};
+
+typedef struct  {
+    u16 reg;
+    u16 evt_reg;
+    u8 mask;
+    u8 block_status;
+} port_block_map_t;
+
+static port_block_map_t ports_block_map[] = {
+    [0]=  {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [1]=  {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [2]=  {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [3]=  {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [4]=  {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [5]=  {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [6]=  {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [7]=  {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [8]=  {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [9]=  {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [10]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [11]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [12]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [13]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [14]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [15]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [16]= {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [17]= {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [18]= {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [19]= {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [20]= {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [21]= {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [22]= {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [23]= {.reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_QSFPDD_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [24]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [25]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [26]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [27]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [28]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [29]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [30]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [31]= {.reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_QSFPDD_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [32]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [33]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [34]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [35]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [36]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [37]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [38]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [39]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [40]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [41]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [42]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [43]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [44]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [45]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [46]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [47]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [48]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [49]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [50]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [51]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [52]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [53]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [54]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [55]= {.reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [56]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [57]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [58]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [59]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [60]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [61]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [62]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [63]= {.reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_QSFPDD_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [64]= {.reg=FPGA_MGMT_PORT_0_1_STUCK_REG          , .evt_reg=FPGA_MGMT_PORT_0_1_STUCK_EVENT_REG          , .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [65]= {.reg=FPGA_MGMT_PORT_0_1_STUCK_REG          , .evt_reg=FPGA_MGMT_PORT_0_1_STUCK_EVENT_REG          , .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+
+};
+
+int port_chan_get_from_reg(u8 val, int index, int *chan, int *port)
+{
+    u32 i = 0;
+    u32 cmp = 0;
+
+    if(index == fpga) {
+        cmp = val & ~(FPGA_LAN_PORT_RELAY_ENABLE);
+    } else {
+        cmp = val & ~(CPLD_I2C_ENABLE_CHN_SEL);
+    }
+
+    if(cmp != 0) {
+        for(i = 0;i < NELEMS(chans_map[index]);i++) {
+            if(chans_map[index][i] == cmp) {
+                *chan = i;
+                *port = ports_map[index][i];
+                return 0;
+            }
+        }
+    }
+
+    *chan = -1;
+    *port = -1;
+
+    return EINVAL;
+}
+
+int mux_reg_get(struct i2c_adapter *adap, struct i2c_client *client)
+{
+    int ret;
+	union i2c_smbus_data i2c_data;
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int i2c_relay_reg = CPLD_I2C_RELAY_REG;
+    unsigned long stop_time;
+    u32 try_times = 0;
+
+    if(data->index == fpga) {
+        i2c_relay_reg = FPGA_LAN_PORT_RELAY_REG;
+    } else {
+        i2c_relay_reg = CPLD_I2C_RELAY_REG;
+    }
+
+	/* Start a round of trying to claim the bus */
+	stop_time = jiffies + msecs_to_jiffies(CPLD_MUX_TIMEOUT);
+    do {
+        try_times += 1;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0)
+
+        ret = __i2c_smbus_xfer(adap, client->addr, client->flags,
+                    I2C_SMBUS_READ, i2c_relay_reg,
+                    I2C_SMBUS_BYTE_DATA, &i2c_data);
+#else
+        ret = adap->algo->smbus_xfer(adap, client->addr, client->flags,
+                            I2C_SMBUS_READ, i2c_relay_reg,
+                            I2C_SMBUS_BYTE_DATA, &i2c_data);
+
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0) */
+        if(ret != 0) {
+            mdelay(CPLD_MUX_RETRY_WAIT);
+        } else {
+            break;
+        }
+    } while (time_before(jiffies, stop_time));
+
+    if(ret != 0) {
+        pr_info("Fail to get cpld mux. dev_index(%d) reg(0x%x) retry(%d)\n",
+             data->index, i2c_relay_reg, try_times -1);
+    }
+
+	return (ret < 0) ? ret : i2c_data.byte;
+}
+
+static int _port_block_status_get(struct i2c_adapter *adap, struct i2c_client *client, int port, int is_evt)
+{
+    int ret;
+	union i2c_smbus_data i2c_data;
+    int reg = 0;
+    u8 mask = MASK_ALL;
+    unsigned long stop_time;
+    u32 try_times = 0;
+
+    if(port >= 0 && port <= NELEMS(ports_block_map)) {
+        if(is_evt == 1) {
+            reg = ports_block_map[port].evt_reg;
+        } else {
+            reg = ports_block_map[port].reg;
+        }
+        mask = ports_block_map[port].mask;
+    } else {
+        return 0;
+    }
+
+	/* Start a round of trying to claim the bus */
+	stop_time = jiffies + msecs_to_jiffies(CPLD_MUX_TIMEOUT);
+    do {
+        try_times += 1;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0)
+
+        ret = __i2c_smbus_xfer(adap, client->addr, client->flags,
+                    I2C_SMBUS_READ, reg,
+                    I2C_SMBUS_BYTE_DATA, &i2c_data);
+#else
+        ret = adap->algo->smbus_xfer(adap, client->addr, client->flags,
+                            I2C_SMBUS_READ, reg,
+                            I2C_SMBUS_BYTE_DATA, &i2c_data);
+
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0) */
+        if(ret != 0) {
+            mdelay(CPLD_MUX_RETRY_WAIT);
+        } else {
+            break;
+        }
+    } while (time_before(jiffies, stop_time));
+
+    if(ret < 0) {
+        /*
+         *  When the return value is negative, it means the I2C bus is abnormal and we can't
+         *  retrieve the stuck status. We treat this as no block.
+         */
+        return PORT_NONE_BLOCK;
+    } else if(_mask_shift(i2c_data.byte, mask) == 0) {
+        return PORT_BLOCK;
+    } else {
+        return PORT_NONE_BLOCK;
+    }
+}
+
+static int mux_reg_write(struct i2c_adapter *adap, struct i2c_client *client, u8 val, u32 *try_times)
+{
+    int ret = 0;
+    union i2c_smbus_data i2c_data;
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int i2c_relay_reg = CPLD_I2C_RELAY_REG;
+    unsigned long stop_time;
+    u32 tries = 0;
+
+    i2c_data.byte = val;
+    if(data->index == fpga) {
+        i2c_relay_reg = FPGA_LAN_PORT_RELAY_REG;
+    } else {
+        i2c_relay_reg = CPLD_I2C_RELAY_REG;
+    }
+
+	/* Start a round of trying to claim the bus */
+	stop_time = jiffies + msecs_to_jiffies(CPLD_MUX_TIMEOUT);
+    do {
+
+        /*
+        *  Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
+        *  for this as they will try to lock adapter a second time
+        */
+
+        tries += 1;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0)
+        ret = __i2c_smbus_xfer(adap, client->addr, client->flags,
+                    I2C_SMBUS_WRITE, i2c_relay_reg,
+                    I2C_SMBUS_BYTE_DATA, &i2c_data);
+#else
+        ret = adap->algo->smbus_xfer(adap, client->addr, client->flags,
+                            I2C_SMBUS_WRITE, i2c_relay_reg,
+                            I2C_SMBUS_BYTE_DATA, &i2c_data);
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0) */
+
+        if(ret != 0) {
+            mdelay(CPLD_MUX_RETRY_WAIT);
+        } else {
+            break;
+        }
+    } while (time_before(jiffies, stop_time));
+
+    * try_times = tries;
+    return ret;
+}
+
+int mux_select_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    struct device *dev = &client->dev;
+
+    u8 set_val;
+    int ret = 0;
+    int chan_val = 0;
+
+    switch (data->index)
+    {
+        case cpld1:
+        case cpld2:
+        case cpld3:
+            set_val = CPLD_I2C_ENABLE_CHN_SEL;
+            break;
+        case fpga:
+            set_val = FPGA_LAN_PORT_RELAY_ENABLE;
+            break;
+        default:
+            dev_err(dev, "Invalid device index\n");
+            ret=EINVAL;
+            goto exit;
+    }
+
+    if(chan >= data->chip->nchans) {
+        dev_err(dev, "Invalid channel (%d)>=(%d)\n",chan, data->chip->nchans);
+            ret=EINVAL;
+            goto exit;
+    }
+
+    chan_val = chans_map[data->index][chan];
+    set_val |= chan_val;
+
+    /* Only select the channel if its different from the last channel */
+    if (data->last_chan != set_val) {
+        u32 try_times = 0;
+        int port = ports_map[data->index][chan];
+        ret = mux_reg_write(muxc->parent, client, set_val, &try_times);
+        if(ret != 0) {
+            pr_info("Fail to set cpld mux. port(%d) chan(%d) reg_val(0x%x) retry(%d)\n",
+                port, chan, set_val, try_times -1);
+        } else {
+            if(try_times -1 > 0){
+                pr_info("Success to set cpld mux. port(%d) chan(%d) reg_val(0x%x) retry(%d)\n",
+                    port, chan, set_val, try_times -1);
+            }
+
+            if(_port_block_status_get(muxc->parent, client, port, 0) == PORT_BLOCK) {
+                if(ports_block_map[port].block_status != PORT_BLOCK) {
+                    ports_block_map[port].block_status = PORT_BLOCK;
+                    pr_warn("port(%d) is blocked by CPLD/FPGA\n", port);
+                }
+            } else {
+                if(ports_block_map[port].block_status != PORT_NONE_BLOCK) {
+                    ports_block_map[port].block_status = PORT_NONE_BLOCK;
+                    pr_warn("port(%d) is recovered by the CPLD/FPGA\n", port);
+                }
+            }
+        }
+        data->last_chan = set_val;
+    }
+
+exit:
+    return ret;
+}
+
+int mux_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    s32 idle_state;
+    u32 ret = 0;
+
+    idle_state = READ_ONCE(data->idle_state);
+    if (idle_state >= 0) {
+        /* Set the mux back to a predetermined channel */
+        ret = mux_select_chan(muxc, idle_state);
+    } else if (idle_state == MUX_IDLE_DISCONNECT) {
+        u32 try_times = 0;
+        int port = ports_map[data->index][chan];
+
+        /* Deselect active channel */
+        if(data->index == fpga) {
+            data->last_chan = FPGA_MUX_CHN_OFF;
+        } else {
+            data->last_chan = CPLD_MUX_CHN_OFF;
+        }
+        ret = mux_reg_write(muxc->parent, client, data->last_chan, &try_times);
+        if(ret != 0) {
+            pr_info("Fail to close cpld mux. port(%d) chan(%d) retry(%d)\n",
+                port, chan, try_times -1);
+
+        } else {
+            if(try_times -1 > 0){
+                pr_info("Success to close cpld mux. port(%d) chan(%d) retry(%d)\n",
+                    port, chan, try_times -1);
+            }
+        }
+    }
+
+    return ret;
+}
+
+ssize_t idle_state_show(struct device *dev,
+                    struct device_attribute *attr,
+                    char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int rv = 0;
+
+    rv = sprintf(buf, "%d\n", READ_ONCE(data->idle_state));
+    return rv;
+}
+
+ssize_t idle_state_store(struct device *dev,
+                struct device_attribute *attr,
+                const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int val;
+    int ret;
+
+    ret = kstrtoint(buf, 0, &val);
+    if (ret < 0)
+        return ret;
+
+    if (val != MUX_IDLE_AS_IS && val != MUX_IDLE_DISCONNECT &&
+        (val < 0 || val >= data->chip->nchans))
+        return -EINVAL;
+
+    i2c_lock_bus(muxc->parent, I2C_LOCK_SEGMENT);
+
+    WRITE_ONCE(data->idle_state, val);
+
+    /*
+     * Set the mux into a state consistent with the new
+     * idle_state.
+     */
+    if (data->last_chan || val != MUX_IDLE_DISCONNECT)
+        ret = mux_deselect_mux(muxc, 0);
+
+    i2c_unlock_bus(muxc->parent, I2C_LOCK_SEGMENT);
+
+    return ret < 0 ? ret : count;
+}
+
+int mux_init(struct device *dev)
+{
+    int ret = 0;
+    u8 reg_val = 0;
+    int num = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int i2c_relay_reg = CPLD_I2C_RELAY_REG;
+    u32 chan_off = CPLD_MUX_CHN_OFF;
+
+    data->chip = &chips[data->index];
+
+    data->idle_state = MUX_IDLE_DISCONNECT;
+    if (device_property_read_u32(dev, "idle-state", &data->idle_state)) {
+        if (device_property_read_bool(dev, "i2c-mux-idle-disconnect"))
+            data->idle_state = MUX_IDLE_DISCONNECT;
+    }
+
+    /*
+    * Write the mux register at addr to verify
+    * that the mux is in fact present. This also
+    * initializes the mux to a channel
+    * or disconnected state.
+    */
+
+    if(data->chip->nchans > 0){
+        if(data->index == fpga) {
+            i2c_relay_reg = FPGA_LAN_PORT_RELAY_REG;
+            // close multiplexer channel
+            chan_off = FPGA_MUX_CHN_OFF;
+        } else {
+            i2c_relay_reg = CPLD_I2C_RELAY_REG;
+            // close multiplexer channel
+            chan_off = CPLD_MUX_CHN_OFF;
+            // enable mux functionality for the legacy I2C interface instead of using FPGA.
+            ret = _cpld_reg_read(dev, CPLD_I2C_CONTROL_REG, MASK_ALL);
+            if (ret < 0) {
+                dev_err(dev, "Fail to enable mux functionality\n");
+                goto exit;
+            }
+            reg_val = (u8)ret;
+            reg_val |= (CPLD_I2C_ENABLE_BRIDGE);
+            ret = _cpld_reg_write(dev, CPLD_I2C_CONTROL_REG, reg_val);
+            if (ret < 0) {
+                dev_err(dev, "Fail to enable mux functionality\n");
+                goto exit;
+            }
+        }
+
+        if (data->idle_state >= 0) {
+            /* Set the mux back to a predetermined channel */
+            ret = mux_select_chan(muxc, data->idle_state);
+        } else {
+            u32 try_times = 0;
+            data->last_chan = chan_off;
+            ret = mux_reg_write(muxc->parent, client, data->last_chan, &try_times);
+        }
+
+        if (ret < 0) {
+            goto exit;
+        }
+    }
+
+    /* Now create an adapter for each channel */
+    for (num = 0; num < data->chip->nchans; num++) {
+        ret = i2c_mux_add_adapter(muxc, 0, num, 0);
+        if (ret)
+            goto exit;
+    }
+
+    return 0;
+
+exit:
+    mux_cleanup(dev);
+    return ret;
+}
+
+void mux_cleanup(struct device *dev)
+{
+    u8 reg_val = 0;
+    int ret = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+
+    if(data->index == fpga) {
+        _cpld_reg_write(dev, FPGA_LAN_PORT_RELAY_REG, FPGA_MUX_CHN_OFF);
+
+    } else {
+        _cpld_reg_write(dev, CPLD_I2C_RELAY_REG, CPLD_MUX_CHN_OFF);
+
+        ret = _cpld_reg_read(dev, CPLD_I2C_CONTROL_REG, MASK_ALL);
+        reg_val = (ret >= 0) ?(u8)ret:0;
+        reg_val &= ~(CPLD_I2C_ENABLE_BRIDGE);
+        _cpld_reg_write(dev, CPLD_I2C_CONTROL_REG, reg_val);
+    }
+    i2c_mux_del_adapters(muxc);
+}
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-lpc.c
new file mode 100644
index 00000000000..0390724cdae
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-lpc.c
@@ -0,0 +1,934 @@
+/*
+ * A lpc driver for the ufispace_s9321_64e
+ *
+ * Copyright (C) 2017-2019 UfiSpace Technology Corporation.
+ * Wade He <wade.ce.he@ufispace.com>
+ * Nonodark Huang <nonodark.huang@ufispace.com>
+ *
+ * Based on ad7414.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/gpio.h>
+
+#if !defined(SENSOR_DEVICE_ATTR_RO)
+#define SENSOR_DEVICE_ATTR_RO(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0444, _func##_show, NULL, _index)
+#endif
+
+#if !defined(SENSOR_DEVICE_ATTR_RW)
+#define SENSOR_DEVICE_ATTR_RW(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0644, _func##_show, _func##_store, _index)
+
+#endif
+
+#if !defined(SENSOR_DEVICE_ATTR_WO)
+#define SENSOR_DEVICE_ATTR_WO(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0200, NULL, _func##_store, _index)
+#endif
+
+#define BSP_LOG_R(fmt, args...) \
+    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...) \
+    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+
+#define _DEVICE_ATTR(_name)     \
+    &sensor_dev_attr_##_name.dev_attr.attr
+
+#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
+
+#define DRIVER_NAME "x86_64_ufispace_s9321_64e_lpc"
+
+/* LPC registers */
+#define REG_BASE_MB                       0xE00
+#define REG_BASE_CPU                      0x600
+#define REG_BASE_I2C_ALERT                0x700
+
+/* 
+ *  Normally, the LPC register range is 0x00-0xff.
+ *  Therefore, we define the invalid address 0x100 as REG_NONE
+ */
+#define REG_NONE                          0x100
+
+//MB CPLD
+#define REG_MB_BRD_ID_0                   (REG_BASE_MB + 0x00)
+#define REG_MB_BRD_ID_1                   (REG_BASE_MB + 0x01)
+#define REG_MB_CPLD_VERSION               (REG_BASE_MB + 0x02)
+#define REG_MB_CPLD_BUILD                 (REG_BASE_MB + 0x04)
+#define REG_MB_MUX_RESET                  (REG_BASE_MB + 0x46)
+#define REG_MB_MUX_CTRL                   (REG_BASE_MB + 0x5C)
+
+//CPU CPLD
+#define REG_CPU_CPLD_VERSION              (REG_BASE_CPU + 0x00)
+#define REG_CPU_STATUS_0                  (REG_BASE_CPU + 0x01)
+#define REG_CPU_STATUS_1                  (REG_BASE_CPU + 0x02)
+#define REG_CPU_CTRL_0                    (REG_BASE_CPU + 0x03)
+#define REG_CPU_CTRL_1                    (REG_BASE_CPU + 0x04)
+#define REG_CPU_CPLD_BUILD                (REG_BASE_CPU + 0xE0)
+
+//I2C Alert
+#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x80)
+
+#define MASK_ALL             (0xFF)
+#define MASK_NONE            (0x00)
+#define MASK_0000_0011       (0x03)
+#define MASK_0000_0100       (0x04)
+#define MASK_0000_0111       (0x07)
+#define MASK_0001_1000       (0x18)
+#define MASK_0010_0000       (0x20)
+#define MASK_0011_0111       (0x37)
+#define MASK_0011_1000       (0x38)
+#define MASK_0011_1111       (0x3F)
+#define MASK_0100_0000       (0x40)
+#define MASK_1000_0000       (0x80)
+#define MASK_1100_0000       (0xC0)
+
+#define LPC_MDELAY                        (5)
+#define MDELAY_RESET_INTERVAL             (100)
+#define MDELAY_RESET_FINISH               (500)
+
+/* LPC sysfs attributes index  */
+enum lpc_sysfs_attributes {
+    //MB CPLD
+    ATT_MB_BRD_ID_0,
+    ATT_MB_BRD_SKU_ID,
+    ATT_MB_BRD_ID_1,
+    ATT_MB_BRD_HW_ID,
+    ATT_MB_BRD_DEPH_ID,
+    ATT_MB_BRD_BUILD_ID,
+    ATT_MB_BRD_ID_TYPE,
+    ATT_MB_CPLD_1_MINOR_VER,
+    ATT_MB_CPLD_1_MAJOR_VER,
+    ATT_MB_CPLD_1_BUILD_VER,
+    ATT_MB_CPLD_1_VERSION_H,
+    ATT_MB_MUX_RESET_ALL,
+    ATT_MB_MUX_CTRL,
+
+    //CPU CPLD
+    ATT_CPU_CPLD_VERSION,
+    ATT_CPU_CPLD_MINOR_VER,
+    ATT_CPU_CPLD_MAJOR_VER,
+    ATT_CPU_CPLD_BUILD_VER,
+    ATT_CPU_CPLD_VERSION_H,
+    ATT_CPU_BIOS_BOOT_ROM,
+    ATT_CPU_BIOS_BOOT_CFG,
+
+    //I2C Alert
+    ATT_ALERT_STATUS,
+
+    //BSP
+    ATT_BSP_VERSION,
+    ATT_BSP_DEBUG,
+    ATT_BSP_PR_INFO,
+    ATT_BSP_PR_ERR,
+    ATT_BSP_GPIO_MAX,
+    ATT_BSP_FPGA_PCI_ENABLE,
+
+    ATT_MAX
+};
+
+enum data_type {
+    DATA_HEX,
+    DATA_DEC,
+    DATA_S_DEC,
+    DATA_UNK,
+};
+
+typedef struct  {
+    u16 reg;
+    u8 mask;
+    u8 data_type;
+} attr_reg_map_t;
+
+enum bsp_log_types {
+    LOG_NONE,
+    LOG_RW,
+    LOG_READ,
+    LOG_WRITE,
+    LOG_SYS
+};
+
+enum bsp_log_ctrl {
+    LOG_DISABLE,
+    LOG_ENABLE
+};
+
+struct lpc_data_s {
+    struct mutex    access_lock;
+};
+
+attr_reg_map_t attr_reg[]= {
+
+    //MB CPLD
+    [ATT_MB_BRD_ID_0]          = {REG_MB_BRD_ID_0     , MASK_ALL      , DATA_HEX},
+    [ATT_MB_BRD_SKU_ID]        = {REG_MB_BRD_ID_0     , MASK_ALL      , DATA_DEC},
+    [ATT_MB_BRD_ID_1]          = {REG_MB_BRD_ID_1     , MASK_ALL      , DATA_HEX},
+    [ATT_MB_BRD_HW_ID]         = {REG_MB_BRD_ID_1     , MASK_0000_0011, DATA_DEC},
+    [ATT_MB_BRD_DEPH_ID]       = {REG_MB_BRD_ID_1     , MASK_0000_0100, DATA_DEC},
+    [ATT_MB_BRD_BUILD_ID]      = {REG_MB_BRD_ID_1     , MASK_0011_1000, DATA_DEC},
+    [ATT_MB_BRD_ID_TYPE]       = {REG_MB_BRD_ID_1     , MASK_1000_0000, DATA_DEC},
+    [ATT_MB_CPLD_1_MINOR_VER]  = {REG_MB_CPLD_VERSION , MASK_0011_1111, DATA_DEC},
+    [ATT_MB_CPLD_1_MAJOR_VER]  = {REG_MB_CPLD_VERSION , MASK_1100_0000, DATA_DEC},
+    [ATT_MB_CPLD_1_BUILD_VER]  = {REG_MB_CPLD_BUILD   , MASK_ALL      , DATA_DEC},
+    [ATT_MB_CPLD_1_VERSION_H]  = {REG_NONE            , MASK_NONE     , DATA_UNK},
+    [ATT_MB_MUX_RESET_ALL]     = {REG_MB_MUX_RESET    , MASK_ALL      , DATA_DEC},
+    [ATT_MB_MUX_CTRL]          = {REG_MB_MUX_CTRL     , MASK_ALL      , DATA_HEX},
+
+    //CPU CPLD
+    [ATT_CPU_CPLD_VERSION]    = {REG_CPU_CPLD_VERSION , MASK_ALL      , DATA_HEX},
+    [ATT_CPU_CPLD_MINOR_VER]  = {REG_CPU_CPLD_VERSION , MASK_0011_1111, DATA_DEC},
+    [ATT_CPU_CPLD_MAJOR_VER]  = {REG_CPU_CPLD_VERSION , MASK_1100_0000, DATA_DEC},
+    [ATT_CPU_CPLD_BUILD_VER]  = {REG_CPU_CPLD_BUILD   , MASK_ALL      , DATA_DEC},
+    [ATT_CPU_CPLD_VERSION_H]  = {REG_NONE             , MASK_NONE     , DATA_UNK},
+    [ATT_CPU_BIOS_BOOT_ROM]   = {REG_CPU_STATUS_1     , MASK_1000_0000, DATA_DEC},
+    [ATT_CPU_BIOS_BOOT_CFG]   = {REG_CPU_CTRL_1       , MASK_1000_0000, DATA_DEC},
+
+    //I2C Alert
+    [ATT_ALERT_STATUS]        = {REG_ALERT_STATUS     , MASK_0010_0000, DATA_DEC},
+
+    //BSP
+    [ATT_BSP_VERSION]         = {REG_NONE             , MASK_NONE     , DATA_UNK},
+    [ATT_BSP_DEBUG]           = {REG_NONE             , MASK_NONE     , DATA_UNK},
+    [ATT_BSP_PR_INFO]         = {REG_NONE             , MASK_NONE     , DATA_UNK},
+    [ATT_BSP_PR_ERR]          = {REG_NONE             , MASK_NONE     , DATA_UNK},
+    [ATT_BSP_GPIO_MAX]        = {REG_NONE             , MASK_NONE     , DATA_DEC},
+    [ATT_BSP_FPGA_PCI_ENABLE] = {REG_NONE             , MASK_NONE     , DATA_DEC},
+};
+
+struct lpc_data_s *lpc_data;
+char bsp_version[16]="";
+char bsp_debug[2]="0";
+char bsp_fpga_pci_enable[3] = "-1";
+u8 enable_log_read  = LOG_DISABLE;
+u8 enable_log_write = LOG_DISABLE;
+u8 enable_log_sys   = LOG_ENABLE;
+
+/* reg shift */
+static u8 _shift(u8 mask)
+{
+    int i=0, mask_one=1;
+
+    for(i=0; i<8; ++i) {
+        if ((mask & mask_one) == 1)
+            return i;
+        else
+            mask >>= 1;
+    }
+
+    return -1;
+}
+
+/* reg mask and shift */
+static u8 _mask_shift(u8 val, u8 mask)
+{
+    int shift=0;
+
+    shift = _shift(mask);
+
+    return (val & mask) >> shift;
+}
+
+static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
+{
+    if (bit_val == 0)
+        reg_val = reg_val & ~(1 << bit);
+    else
+        reg_val = reg_val | (1 << bit);
+    return reg_val;
+}
+
+static u8 _parse_data(char *buf, unsigned int data, u8 data_type)
+{
+    if(buf == NULL) {
+        return -1;
+    }
+
+    if(data_type == DATA_HEX) {
+        return sprintf(buf, "0x%02x", data);
+    } else if(data_type == DATA_DEC) {
+        return sprintf(buf, "%u", data);
+    } else {
+        return -1;
+    }
+    return 0;
+}
+
+static int _bsp_log(u8 log_type, char *fmt, ...)
+{
+    if ((log_type==LOG_READ  && enable_log_read) ||
+        (log_type==LOG_WRITE && enable_log_write) ||
+        (log_type==LOG_SYS && enable_log_sys) ) {
+        va_list args;
+        int r;
+
+        va_start(args, fmt);
+        r = vprintk(fmt, args);
+        va_end(args);
+
+        return r;
+    } else {
+        return 0;
+    }
+}
+
+static int _bsp_log_config(u8 log_type)
+{
+    switch(log_type) {
+        case LOG_NONE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_RW:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        case LOG_READ:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_WRITE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+static void _outb(u8 data, u16 port)
+{
+    outb(data, port);
+    mdelay(LPC_MDELAY);
+}
+
+/* get lpc register value */
+static u8 _lpc_reg_read(u16 reg, u8 mask)
+{
+    u8 reg_val=0x0, reg_mk_shf_val = 0x0;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val = inb(reg);
+    mutex_unlock(&lpc_data->access_lock);
+
+    reg_mk_shf_val = _mask_shift(reg_val, mask);
+
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x, mask=0x%02x, reg_mk_shf_val=0x%02x", reg, reg_val, mask, reg_mk_shf_val);
+
+    return reg_mk_shf_val;
+}
+
+/* get lpc register value */
+static ssize_t lpc_reg_read(u16 reg, u8 mask, char *buf, u8 data_type)
+{
+    u8 reg_val;
+    int len=0;
+
+    reg_val = _lpc_reg_read(reg, mask);
+
+    // may need to change to hex value ?
+    len=_parse_data(buf, reg_val, data_type);
+
+    return len;
+}
+
+/* set lpc register value */
+static ssize_t lpc_reg_write(u16 reg, u8 mask, const char *buf, size_t count, u8 data_type)
+{
+    u8 reg_val, reg_val_now, shift;
+
+    if (kstrtou8(buf, 0, &reg_val) < 0) {
+        if(data_type == DATA_S_DEC) {
+            if (kstrtos8(buf, 0, &reg_val) < 0) {
+                return -EINVAL;
+            }
+        } else {
+            return -EINVAL;
+        }
+    }
+
+    //apply continuous bits operation if mask is specified, discontinuous bits are not supported
+    if (mask != MASK_ALL) {
+        reg_val_now = _lpc_reg_read(reg, MASK_ALL);
+        //clear bits in reg_val_now by the mask
+        reg_val_now &= ~mask;
+        //get bit shift by the mask
+        shift = _shift(mask);
+        //calculate new reg_val
+        reg_val = _bit_operation(reg_val_now, shift, reg_val);
+    }
+
+    mutex_lock(&lpc_data->access_lock);
+
+    _outb(reg_val, reg);
+
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_W("reg=0x%03x, reg_val=0x%02x, mask=0x%02x", reg, reg_val, mask);
+
+    return count;
+}
+
+/* get bsp value */
+static ssize_t bsp_read(char *buf, char *str)
+{
+    ssize_t len=0;
+
+    mutex_lock(&lpc_data->access_lock);
+    len=sprintf(buf, "%s", str);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg_val=%s", str);
+
+    return len;
+}
+
+/* set bsp value */
+static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count)
+{
+    mutex_lock(&lpc_data->access_lock);
+    snprintf(str, str_len, "%s", buf);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_W("reg_val=%s", str);
+
+    return count;
+}
+
+/* get gpio max value */
+static ssize_t gpio_max_show(struct device *dev,
+                    struct device_attribute *da,
+                    char *buf)
+{
+    u8 data_type=DATA_UNK;
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    if (attr->index == ATT_BSP_GPIO_MAX) {
+        data_type = attr_reg[attr->index].data_type;
+        return _parse_data(buf, ARCH_NR_GPIOS-1, data_type);
+    }
+    return -1;
+}
+
+/* get mb cpld version in human readable format */
+static ssize_t cpld_version_h_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    unsigned int attr_major = 0;
+    unsigned int attr_minor = 0;
+    unsigned int attr_build = 0;
+
+    switch (attr->index) {
+        case ATT_MB_CPLD_1_VERSION_H:
+            attr_major = ATT_MB_CPLD_1_MAJOR_VER;
+            attr_minor = ATT_MB_CPLD_1_MINOR_VER;
+            attr_build = ATT_MB_CPLD_1_BUILD_VER;
+            break;
+        case ATT_CPU_CPLD_VERSION_H:
+            attr_major = ATT_CPU_CPLD_MAJOR_VER;
+            attr_minor = ATT_CPU_CPLD_MINOR_VER;
+            attr_build = ATT_CPU_CPLD_BUILD_VER;
+            break;
+        default:
+            return -1;
+    }
+
+    return sprintf(buf, "%d.%02d.%03d", _lpc_reg_read(attr_reg[attr_major].reg, attr_reg[attr_major].mask),
+                                        _lpc_reg_read(attr_reg[attr_minor].reg, attr_reg[attr_minor].mask),
+                                        _lpc_reg_read(attr_reg[attr_build].reg, attr_reg[attr_build].mask));
+
+}
+
+/* get lpc register value */
+static ssize_t lpc_callback_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_NONE;
+    u8 data_type=DATA_UNK;
+
+    switch (attr->index) {
+        //MB CPLD
+        case ATT_MB_BRD_ID_0:
+        case ATT_MB_BRD_SKU_ID:
+        case ATT_MB_BRD_ID_1:
+        case ATT_MB_BRD_HW_ID:
+        case ATT_MB_BRD_DEPH_ID:
+        case ATT_MB_BRD_BUILD_ID:
+        case ATT_MB_BRD_ID_TYPE:
+        case ATT_MB_CPLD_1_MINOR_VER:
+        case ATT_MB_CPLD_1_MAJOR_VER:
+        case ATT_MB_CPLD_1_BUILD_VER:
+        case ATT_MB_MUX_CTRL:
+
+        //CPU CPLD
+        case ATT_CPU_CPLD_VERSION:
+        case ATT_CPU_CPLD_MINOR_VER:
+        case ATT_CPU_CPLD_MAJOR_VER:
+        case ATT_CPU_CPLD_BUILD_VER:
+        case ATT_CPU_BIOS_BOOT_ROM:
+        case ATT_CPU_BIOS_BOOT_CFG:
+
+        //I2C Alert
+        case ATT_ALERT_STATUS:
+
+        //BSP
+        case ATT_BSP_GPIO_MAX:
+            reg = attr_reg[attr->index].reg;
+            mask= attr_reg[attr->index].mask;
+            data_type = attr_reg[attr->index].data_type;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return lpc_reg_read(reg, mask, buf, data_type);
+}
+
+/* set lpc register value */
+static ssize_t lpc_callback_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_NONE;
+    u8 data_type=DATA_UNK;
+
+    switch (attr->index) {
+        // MB CPLD
+        case ATT_MB_MUX_CTRL:
+            reg = attr_reg[attr->index].reg;
+            mask= attr_reg[attr->index].mask;
+            data_type = attr_reg[attr->index].data_type;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return lpc_reg_write(reg, mask, buf, count, data_type);
+
+}
+
+/* get bsp parameter value */
+static ssize_t bsp_callback_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    char *str=NULL;
+
+    switch (attr->index) {
+        case ATT_BSP_VERSION:
+            str = bsp_version;
+            break;
+        case ATT_BSP_DEBUG:
+            str = bsp_debug;
+            break;
+        case ATT_BSP_FPGA_PCI_ENABLE:
+            str = bsp_fpga_pci_enable;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return bsp_read(buf, str);
+}
+
+/* set bsp parameter value */
+static ssize_t bsp_callback_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+    u16 reg = 0;
+    u8 bsp_debug_u8 = 0;
+
+    switch (attr->index) {
+        case ATT_BSP_VERSION:
+            str = bsp_version;
+            str_len = sizeof(bsp_version);
+            break;
+        case ATT_BSP_DEBUG:
+            if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+                return -EINVAL;
+            } else if (_bsp_log_config(bsp_debug_u8) < 0) {
+                return -EINVAL;
+            }
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        case ATT_BSP_FPGA_PCI_ENABLE:
+            if (kstrtou16(buf, 0, &reg) < 0) {
+                return -EINVAL;
+            } else {
+                if (reg != 1 && reg != 0)
+                    return -EINVAL;
+            }
+
+            // Only one chance for configuration.
+            if(strncmp(bsp_fpga_pci_enable, "-1", sizeof(bsp_fpga_pci_enable)) == 0) {
+                str = bsp_fpga_pci_enable;
+                str_len = sizeof(bsp_fpga_pci_enable);
+            } else {
+                return -EINVAL;
+            }
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    return bsp_write(buf, str, str_len, count);
+}
+
+static ssize_t bsp_pr_callback_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len = strlen(buf);
+
+    if(str_len <= 0)
+        return str_len;
+
+    switch (attr->index) {
+        case ATT_BSP_PR_INFO:
+            BSP_PR(KERN_INFO, "%s", buf);
+            break;
+        case ATT_BSP_PR_ERR:
+            BSP_PR(KERN_ERR, "%s", buf);
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    return str_len;
+}
+
+/* set mux_reset register value */
+static ssize_t mux_reset_all_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_NONE;
+    u8 val = 0;
+    u8 reg_val = 0;
+    static int mux_reset_flag = 0;
+
+    switch (attr->index) {
+        case ATT_MB_MUX_RESET_ALL:
+            reg = attr_reg[attr->index].reg;;
+            mask = attr_reg[attr->index].mask;;
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    if (kstrtou8(buf, 0, &val) < 0)
+        return -EINVAL;
+
+    if (mux_reset_flag == 0) {
+        if (val == 0) {
+            mutex_lock(&lpc_data->access_lock);
+            mux_reset_flag = 1;
+            BSP_LOG_W("i2c mux reset is triggered...");
+
+            //reset mux
+            reg_val = inb(reg);
+            outb((reg_val & (u8)(~mask)), reg);
+            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & (u8)(~mask));
+
+            mdelay(MDELAY_RESET_INTERVAL);
+
+            //unset mux
+            outb((reg_val | mask), reg);
+            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask);
+
+            mdelay(MDELAY_RESET_FINISH);
+            mux_reset_flag = 0;
+            mutex_unlock(&lpc_data->access_lock);
+        } else {
+            return -EINVAL;
+        }
+    } else {
+        BSP_LOG_W("i2c mux is resetting... (ignore)");
+        mutex_lock(&lpc_data->access_lock);
+        mutex_unlock(&lpc_data->access_lock);
+    }
+    return count;
+}
+
+//SENSOR_DEVICE_ATTR - MB
+static SENSOR_DEVICE_ATTR_RO(board_id_0          , lpc_callback       , ATT_MB_BRD_ID_0);
+static SENSOR_DEVICE_ATTR_RO(board_sku_id        , lpc_callback       , ATT_MB_BRD_SKU_ID);
+static SENSOR_DEVICE_ATTR_RO(board_id_1          , lpc_callback       , ATT_MB_BRD_ID_1);
+static SENSOR_DEVICE_ATTR_RO(board_hw_id         , lpc_callback       , ATT_MB_BRD_HW_ID);
+static SENSOR_DEVICE_ATTR_RO(board_deph_id       , lpc_callback       , ATT_MB_BRD_DEPH_ID);
+static SENSOR_DEVICE_ATTR_RO(board_build_id      , lpc_callback       , ATT_MB_BRD_BUILD_ID);
+static SENSOR_DEVICE_ATTR_RO(board_id_type       , lpc_callback       , ATT_MB_BRD_ID_TYPE);
+static SENSOR_DEVICE_ATTR_RO(mb_cpld_1_minor_ver , lpc_callback       , ATT_MB_CPLD_1_MINOR_VER);
+static SENSOR_DEVICE_ATTR_RO(mb_cpld_1_major_ver , lpc_callback       , ATT_MB_CPLD_1_MAJOR_VER);
+static SENSOR_DEVICE_ATTR_RO(mb_cpld_1_build_ver , lpc_callback       , ATT_MB_CPLD_1_BUILD_VER);
+static SENSOR_DEVICE_ATTR_RO(mb_cpld_1_version_h , cpld_version_h     , ATT_MB_CPLD_1_VERSION_H);
+static SENSOR_DEVICE_ATTR_WO(mux_reset_all       , mux_reset_all      , ATT_MB_MUX_RESET_ALL);
+static SENSOR_DEVICE_ATTR_RW(mux_ctrl            , lpc_callback       , ATT_MB_MUX_CTRL);
+
+//SENSOR_DEVICE_ATTR - CPU
+static SENSOR_DEVICE_ATTR_RO(cpu_cpld_version    , lpc_callback       , ATT_CPU_CPLD_VERSION);
+static SENSOR_DEVICE_ATTR_RO(cpu_cpld_minor_ver  , lpc_callback       , ATT_CPU_CPLD_MINOR_VER);
+static SENSOR_DEVICE_ATTR_RO(cpu_cpld_major_ver  , lpc_callback       , ATT_CPU_CPLD_MAJOR_VER);
+static SENSOR_DEVICE_ATTR_RO(cpu_cpld_build_ver  , lpc_callback       , ATT_CPU_CPLD_BUILD_VER);
+static SENSOR_DEVICE_ATTR_RO(cpu_cpld_version_h  , cpld_version_h     , ATT_CPU_CPLD_VERSION_H);
+static SENSOR_DEVICE_ATTR_RO(boot_rom            , lpc_callback       , ATT_CPU_BIOS_BOOT_ROM);
+static SENSOR_DEVICE_ATTR_RO(boot_cfg            , lpc_callback       , ATT_CPU_BIOS_BOOT_CFG);
+
+//SENSOR_DEVICE_ATTR - I2C Alert
+static SENSOR_DEVICE_ATTR_RO(alert_status        , lpc_callback       , ATT_ALERT_STATUS);
+
+//SENSOR_DEVICE_ATTR - BSP
+static SENSOR_DEVICE_ATTR_RW(bsp_version         , bsp_callback       , ATT_BSP_VERSION);
+static SENSOR_DEVICE_ATTR_RW(bsp_debug           , bsp_callback       , ATT_BSP_DEBUG);
+static SENSOR_DEVICE_ATTR_WO(bsp_pr_info         , bsp_pr_callback    , ATT_BSP_PR_INFO);
+static SENSOR_DEVICE_ATTR_WO(bsp_pr_err          , bsp_pr_callback    , ATT_BSP_PR_ERR);
+static SENSOR_DEVICE_ATTR_RO(bsp_gpio_max        , gpio_max           , ATT_BSP_GPIO_MAX);
+static SENSOR_DEVICE_ATTR_RW(bsp_fpga_pci_enable , bsp_callback       , ATT_BSP_FPGA_PCI_ENABLE);
+
+static struct attribute *mb_cpld_attrs[] = {
+    _DEVICE_ATTR(board_id_0),
+    _DEVICE_ATTR(board_sku_id),
+    _DEVICE_ATTR(board_id_1),
+    _DEVICE_ATTR(board_hw_id),
+    _DEVICE_ATTR(board_deph_id),
+    _DEVICE_ATTR(board_build_id),
+    _DEVICE_ATTR(board_id_type),
+    _DEVICE_ATTR(mb_cpld_1_minor_ver),
+    _DEVICE_ATTR(mb_cpld_1_major_ver),
+    _DEVICE_ATTR(mb_cpld_1_build_ver),
+    _DEVICE_ATTR(mb_cpld_1_version_h),
+    _DEVICE_ATTR(mux_reset_all),
+    _DEVICE_ATTR(mux_ctrl),
+    NULL,
+};
+
+static struct attribute *cpu_cpld_attrs[] = {
+    _DEVICE_ATTR(cpu_cpld_version),
+    _DEVICE_ATTR(cpu_cpld_minor_ver),
+    _DEVICE_ATTR(cpu_cpld_major_ver),
+    _DEVICE_ATTR(cpu_cpld_build_ver),
+    _DEVICE_ATTR(cpu_cpld_version_h),
+    NULL,
+};
+
+static struct attribute *bios_attrs[] = {
+    _DEVICE_ATTR(boot_rom),
+    _DEVICE_ATTR(boot_cfg),
+    NULL,
+};
+
+static struct attribute *i2c_alert_attrs[] = {
+    _DEVICE_ATTR(alert_status),
+    NULL,
+};
+
+static struct attribute *bsp_attrs[] = {
+    _DEVICE_ATTR(bsp_version),
+    _DEVICE_ATTR(bsp_debug),
+    _DEVICE_ATTR(bsp_pr_info),
+    _DEVICE_ATTR(bsp_pr_err),
+    _DEVICE_ATTR(bsp_gpio_max),
+    _DEVICE_ATTR(bsp_fpga_pci_enable),
+    NULL,
+};
+
+static struct attribute_group mb_cpld_attr_grp = {
+    .name = "mb_cpld",
+    .attrs = mb_cpld_attrs,
+};
+
+static struct attribute_group cpu_cpld_attr_grp = {
+    .name = "cpu_cpld",
+    .attrs = cpu_cpld_attrs,
+};
+
+static struct attribute_group bios_attr_grp = {
+    .name = "bios",
+    .attrs = bios_attrs,
+};
+
+static struct attribute_group i2c_alert_attr_grp = {
+    .name = "i2c_alert",
+    .attrs = i2c_alert_attrs,
+};
+
+static struct attribute_group bsp_attr_grp = {
+    .name = "bsp",
+    .attrs = bsp_attrs,
+};
+
+static void lpc_dev_release( struct device * dev)
+{
+    return;
+}
+
+static struct platform_device lpc_dev = {
+    .name           = DRIVER_NAME,
+    .id             = -1,
+    .dev = {
+        .release = lpc_dev_release,
+    }
+};
+
+static int lpc_drv_probe(struct platform_device *pdev)
+{
+    int i = 0, grp_num = 5;
+    int err[5] = {0};
+    struct attribute_group *grp;
+
+    lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s),
+                    GFP_KERNEL);
+    if (!lpc_data)
+        return -ENOMEM;
+
+    mutex_init(&lpc_data->access_lock);
+
+    for (i=0; i<grp_num; ++i) {
+        switch (i) {
+            case 0:
+                grp = &mb_cpld_attr_grp;
+                break;
+            case 1:
+                grp = &cpu_cpld_attr_grp;
+                break;
+            case 2:
+                grp = &bios_attr_grp;
+                break;
+            case 3:
+                grp = &i2c_alert_attr_grp;
+                break;
+            case 4:
+                grp = &bsp_attr_grp;
+                break;
+            default:
+                break;
+        }
+
+        err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
+        if (err[i]) {
+            printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
+            goto exit;
+        } else {
+            continue;
+        }
+    }
+
+    return 0;
+
+exit:
+    for (i=0; i<grp_num; ++i) {
+        switch (i) {
+            case 0:
+                grp = &mb_cpld_attr_grp;
+                break;
+            case 1:
+                grp = &cpu_cpld_attr_grp;
+                break;
+            case 2:
+                grp = &bios_attr_grp;
+                break;
+            case 3:
+                grp = &i2c_alert_attr_grp;
+                break;
+            case 4:
+                grp = &bsp_attr_grp;
+                break;
+            default:
+                break;
+        }
+
+        sysfs_remove_group(&pdev->dev.kobj, grp);
+        if (!err[i]) {
+            //remove previous successful cases
+            continue;
+        } else {
+            //remove first failed case, then return
+            return err[i];
+        }
+    }
+    return 0;
+}
+
+static int lpc_drv_remove(struct platform_device *pdev)
+{
+    sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp);
+
+    return 0;
+}
+
+static struct platform_driver lpc_drv = {
+    .probe  = lpc_drv_probe,
+    .remove = __exit_p(lpc_drv_remove),
+    .driver = {
+    .name   = DRIVER_NAME,
+    },
+};
+
+int lpc_init(void)
+{
+    int err = 0;
+
+    err = platform_driver_register(&lpc_drv);
+    if (err) {
+    	printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
+                __func__, __LINE__, err);
+
+    	return err;
+    }
+
+    err = platform_device_register(&lpc_dev);
+    if (err) {
+    	printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
+                __func__, __LINE__, err);
+    	platform_driver_unregister(&lpc_drv);
+    	return err;
+    }
+
+    return err;
+}
+
+void lpc_exit(void)
+{
+    platform_driver_unregister(&lpc_drv);
+    platform_device_unregister(&lpc_dev);
+}
+
+MODULE_AUTHOR("Wade He <wade.ce.he@ufispace.com>");
+MODULE_AUTHOR("Nonodark Huang <nonodark.huang@ufispace.com>");
+MODULE_DESCRIPTION("x86_64_ufispace_s9321_64e_lpc driver");
+MODULE_VERSION("0.0.2");
+MODULE_LICENSE("GPL");
+
+module_init(lpc_init);
+module_exit(lpc_exit);
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-sys-eeprom.c
new file mode 100644
index 00000000000..c0b3ac20f0f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/modules/x86-64-ufispace-s9321-64e-sys-eeprom.c
@@ -0,0 +1,282 @@
+/*
+ * Copyright (C) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
+ *                           Philip Edelbrock <phil@netroedge.com>
+ * Copyright (C) 2003 Greg Kroah-Hartman <greg@kroah.com>
+ * Copyright (C) 2003 IBM Corp.
+ * Copyright (C) 2004 Jean Delvare <jdelvare@suse.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* enable dev_dbg print out */
+//#define DEBUG
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+#include <linux/version.h>
+
+#define _memset(s, c, n) memset(s, c, n)
+
+/* Addresses to scan */
+static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
+                    0x55, 0x56, 0x57,*/ I2C_CLIENT_END };
+
+/* Size of EEPROM in bytes */
+#define EEPROM_SIZE     512
+
+#define SLICE_BITS      (6)
+#define SLICE_SIZE      (1 << SLICE_BITS)
+#define SLICE_NUM       (EEPROM_SIZE/SLICE_SIZE)
+
+/* Each client has this additional data */
+struct eeprom_data {
+    struct mutex update_lock;
+    u8 valid;           /* bitfield, bit!=0 if slice is valid */
+    unsigned long last_updated[SLICE_NUM];  /* In jiffies, 8 slices */
+    u8 data[EEPROM_SIZE];       /* Register values */
+};
+
+
+static void sys_eeprom_update_client(struct i2c_client *client, u8 slice)
+{
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    int i, j;
+    int ret;
+    int addr;
+
+    mutex_lock(&data->update_lock);
+
+    if (!(data->valid & (1 << slice)) ||
+        time_after(jiffies, data->last_updated[slice] + 300 * HZ)) {
+        dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice);
+
+        addr = slice << SLICE_BITS;
+
+        ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF));
+        /* select the eeprom address */
+        if (ret < 0) {
+            dev_err(&client->dev, "address set failed\n");
+            goto exit;
+        }
+
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) {
+            goto exit;
+        }
+
+        for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) {
+            for (j = i; j < (i+SLICE_SIZE); j++) {
+                int res;
+
+                res = i2c_smbus_read_byte(client);
+                if (res < 0) {
+                    goto exit;
+                }
+
+                data->data[j] = res & 0xFF;
+            }
+        }
+
+        data->last_updated[slice] = jiffies;
+        data->valid |= (1 << slice);
+    }
+exit:
+    mutex_unlock(&data->update_lock);
+}
+
+static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj,
+               struct bin_attribute *bin_attr,
+               char *buf, loff_t off, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    u8 slice;
+
+    if (off > EEPROM_SIZE) {
+        return 0;
+    }
+    if (off + count > EEPROM_SIZE) {
+        count = EEPROM_SIZE - off;
+    }
+    if (count == 0) {
+        return 0;
+    }
+
+    /* Only refresh slices which contain requested bytes */
+    for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) {
+        sys_eeprom_update_client(client, slice);
+    }
+
+    memcpy(buf, &data->data[off], count);
+
+    return count;
+}
+
+static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj,
+                       struct bin_attribute *bin_attr,
+                       char *buf, loff_t off, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    int ret;
+    int i;
+    u8 cmd;
+    u16 value16;
+
+    dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count);
+
+    if (off > EEPROM_SIZE) {
+        return 0;
+    }
+    if (off + count > EEPROM_SIZE) {
+        count = EEPROM_SIZE - off;
+    }
+    if (count == 0) {
+        return 0;
+    }
+
+    mutex_lock(&data->update_lock);
+
+    for(i=0; i < count; i++) {
+        /* write command */
+        cmd = (off >> 8) & 0xff;
+        value16 = off & 0xff;
+        value16 |= buf[i] << 8;
+        ret = i2c_smbus_write_word_data(client, cmd, value16);
+
+        if (ret < 0) {
+            dev_err(&client->dev, "write address failed at %d \n", (int)off);
+            goto exit;
+        }
+
+        off++;
+
+        /* need to wait for write complete */
+        udelay(10000);
+    }
+exit:
+    mutex_unlock(&data->update_lock);
+    /* force to update client when reading */
+    for(i=0; i < SLICE_NUM; i++) {
+        data->last_updated[i] = 0;
+    }
+
+    return count;
+}
+
+static struct bin_attribute sys_eeprom_attr = {
+    .attr = {
+        .name = "eeprom",
+        .mode = S_IRUGO | S_IWUSR,
+    },
+    .size = EEPROM_SIZE,
+    .read = sys_eeprom_read,
+    .write = sys_eeprom_write,
+};
+
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info)
+{
+    struct i2c_adapter *adapter = client->adapter;
+
+    /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all
+       addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline
+       attaching to addresses >= 0x56 on DDC buses */
+    if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) {
+        return -ENODEV;
+    }
+
+    if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE)
+     && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
+        return -ENODEV;
+    }
+
+    strlcpy(info->type, "eeprom", I2C_NAME_SIZE);
+
+    return 0;
+}
+
+static int sys_eeprom_probe(struct i2c_client *client,
+            const struct i2c_device_id *id)
+{
+    struct eeprom_data *data;
+    int err;
+
+    if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) {
+        err = -ENOMEM;
+        goto exit;
+    }
+
+#ifdef __STDC_LIB_EXT1__
+    memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
+#else
+    _memset(data->data, 0xff, EEPROM_SIZE);
+#endif
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->update_lock);
+
+    /* create the sysfs eeprom file */
+    err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr);
+    if (err) {
+        goto exit_kfree;
+    }
+
+    return 0;
+
+exit_kfree:
+    kfree(data);
+exit:
+    return err;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+sys_eeprom_remove(struct i2c_client *client)
+{
+    sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
+    kfree(i2c_get_clientdata(client));
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+    return 0;
+#endif
+}
+
+static const struct i2c_device_id sys_eeprom_id[] = {
+    { "sys_eeprom", 0 },
+    { }
+};
+
+static struct i2c_driver sys_eeprom_driver = {
+    .driver = {
+        .name   = "sys_eeprom",
+    },
+    .probe      = sys_eeprom_probe,
+    .remove     = sys_eeprom_remove,
+    .id_table   = sys_eeprom_id,
+
+    .class      = I2C_CLASS_DDC | I2C_CLASS_SPD,
+    .detect     = sys_eeprom_detect,
+    .address_list   = normal_i2c,
+};
+
+module_i2c_driver(sys_eeprom_driver);
+
+MODULE_AUTHOR("Nonodark Huang <nonodark.huang@ufispace.com>");
+MODULE_DESCRIPTION("UfiSpace System EEPROM driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/service/pddf-platform-init.service
new file mode 120000
index 00000000000..0fd9f25b6c5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/service/pddf-platform-init.service
@@ -0,0 +1 @@
+../../../../pddf/i2c/service/pddf-platform-init.service
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/__init__.py
new file mode 100644
index 00000000000..593867d31c9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/__init__.py
@@ -0,0 +1,4 @@
+# All the derived classes for PDDF
+__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"]
+from . import platform
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/chassis.py
new file mode 100644
index 00000000000..c5dca5cf72d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/chassis.py
@@ -0,0 +1,202 @@
+#!/usr/bin/env python
+
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Chassis API
+#
+#############################################################################
+
+try:
+    import time
+    from sonic_platform_pddf_base.pddf_chassis import PddfChassis
+    # from sonic_py_common import device_info
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_COMPONENT = 7
+
+class Chassis(PddfChassis):
+    """
+    PDDF Platform-specific Chassis class
+    """
+
+    port_dict = {}
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
+        self._initialize_components()
+
+    def _initialize_components(self):
+        from sonic_platform.component import Component
+        for index in range(NUM_COMPONENT):
+            component = Component(index)
+            self._component_list.append(component)
+            
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_name(self):
+        """
+        Retrieves the name of the chassis
+        Returns:
+            string: The name of the chassis
+        """
+        # return device_info.get_hwsku()
+        return self._eeprom.platform_name_str()
+
+    def initizalize_system_led(self):
+        return True
+
+    def get_status_led(self):
+        return self.get_system_led("SYS_LED")
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+        Returns:
+            (bool, dict):
+                - bool: True if call successful, False if not;
+                - dict: A nested dictionary where key is a device type,
+                        value is a dictionary with key:value pairs in the format of
+                        {'device_id':'device_event'}, where device_id is the device ID
+                        for this device and device_event.
+                        The known devices's device_id and device_event was defined as table below.
+                         -----------------------------------------------------------------
+                         device   |     device_id       |  device_event  |  annotate
+                         -----------------------------------------------------------------
+                         'fan'          '<fan number>'     '0'              Fan removed
+                                                           '1'              Fan inserted
+                         'sfp'          '<sfp number>'     '0'              Sfp removed
+                                                           '1'              Sfp inserted
+                                                           '2'              I2C bus stuck
+                                                           '3'              Bad eeprom
+                                                           '4'              Unsupported cable
+                                                           '5'              High Temperature
+                                                           '6'              Bad cable
+                         'voltage'      '<monitor point>'  '0'              Vout normal
+                                                           '1'              Vout abnormal
+                         --------------------------------------------------------------------
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'},
+                       'voltage':{'U20':'0', 'U21':'1'}}
+                  Indicates that:
+                     fan 0 has been removed, fan 2 has been inserted.
+                     sfp 11 has been removed, sfp 12 has been inserted.
+                     monitored voltage U20 became normal, voltage U21 became abnormal.
+                  Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+                        XCVRD shall stop to read eeprom before SFP recovered from error status.
+        """
+
+        change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}}
+
+        start_time = time.time()
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000)  # Convert to secs
+        else:
+            print("get_change_event:Invalid timeout value", timeout)
+            return False, change_event_dict
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print(
+                "get_change_event:" "time wrap / invalid timeout value",
+                timeout,
+            )
+            return False, change_event_dict  # Time wrap or possibly incorrect timeout
+        try:
+            while timeout >= 0:
+                # check for sfp
+                sfp_change_dict = self.get_transceiver_change_event()
+                # check for fan
+                # fan_change_dict = self.get_fan_change_event()
+                # check for voltage
+                # voltage_change_dict = self.get_voltage_change_event()
+
+                if sfp_change_dict:
+                    change_event_dict["sfp"] = sfp_change_dict
+                    # change_event_dict["fan"] = fan_change_dict
+                    # change_event_dict["voltage"] = voltage_change_dict
+                    return True, change_event_dict
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1)  # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, change_event_dict
+        except Exception as e:
+            print(e)
+        print("get_change_event: Should not reach here.")
+        return False, change_event_dict
+
+    def get_transceiver_change_event(self):
+        current_port_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for index in range(0, self.platform_inventory['num_ports']):
+            if self._sfp_list[index].get_presence():
+                current_port_dict[index] = self.plugin_data["XCVR"]["status"]["inserted"]
+            else:
+                current_port_dict[index] = self.plugin_data["XCVR"]["status"]["removed"]
+
+        if len(self.port_dict) == 0:       # first time
+            self.port_dict = current_port_dict
+            return {}
+
+        if current_port_dict == self.port_dict:
+            return {}
+
+        # Update reg value
+        for index, status in current_port_dict.items():
+            if self.port_dict[index] != status:
+                ret_dict[index] = status
+                #ret_dict[str(index)] = status
+        self.port_dict = current_port_dict
+        for index, status in ret_dict.items():
+            if int(status) == 1:
+                pass
+                #self._sfp_list[int(index)].check_sfp_optoe_type()
+        return ret_dict
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+
+        reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file']
+
+        try:
+            with open(reboot_cause_path, 'r', errors='replace') as fd:
+                data = fd.read()
+                sw_reboot_cause = data.strip()
+        except IOError:
+            sw_reboot_cause = "Unknown"
+
+        return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this
+            chassis.
+        """
+
+        return self.get_serial()
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/component.py
new file mode 100644
index 00000000000..1a0d3581d54
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/component.py
@@ -0,0 +1,164 @@
+#############################################################################
+#
+# Component contains an implementation of SONiC Platform Base API and
+# provides the components firmware management function
+#
+#############################################################################
+
+try:
+    import subprocess
+    from sonic_platform_base.component_base import ComponentBase
+    from sonic_platform_pddf_base import pddfapi
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+IOPORT_PATH="/dev/port"
+CPU_CPLD_MAJOR_MINOR_REG = {
+    "reg": 0x600,
+    "major": {"mask": 0b11000000, "pos": 6},
+    "minor": {"mask": 0b00111111, "pos": 0}
+}
+CPU_CPLD_BUILD_REG = {
+    "reg": 0x6E0,
+    "build": {"mask": 0b11111111, "pos": 0}
+}
+
+CPLD_SYSFS = {
+    "CPLD1": {"major": "cpld1_major_ver", "minor": "cpld1_minor_ver", "build": "cpld1_build"},
+    "CPLD2": {"major": "cpld2_major_ver", "minor": "cpld2_minor_ver", "build": "cpld2_build"},
+    "CPLD3": {"major": "cpld3_major_ver", "minor": "cpld3_minor_ver", "build": "cpld3_build"},
+    "FPGA": {"major": "fpga_major_ver", "minor": "fpga_minor_ver", "build": "fpga_build"},
+}
+
+BMC_CMDS = {
+    "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'",
+}
+
+BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
+COMPONENT_LIST= [
+   ("CPU_CPLD", "CPU CPLD"),
+   ("CPLD1", "CPLD 1"),
+   ("CPLD2", "CPLD 2"),
+   ("CPLD3", "CPLD 3"),
+   ("FPGA", "FPGA"),
+   ("BIOS", "Basic Input/Output System"),
+   ("BMC", "BMC"),
+]
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index=0):
+        self.pddf_obj = pddfapi.PddfApi()
+        self.index = component_index
+        self.name = self.get_name()
+
+    def _get_bios_version(self):
+        # Retrieves the BIOS firmware version
+        try:
+            with open(BIOS_VERSION_PATH, 'r') as fd:
+                bios_version = fd.read()
+                return bios_version.strip()
+        except Exception as e:
+            return None
+
+    def _get_cpld_version(self):
+        # Retrieves the CPLD firmware version
+        cpld_version = dict()
+        for cpld_name, elem in CPLD_SYSFS.items():
+            device = "SYSSTATUS"
+            major = self.pddf_obj.get_attr_name_output(device, elem["major"])
+            minor = self.pddf_obj.get_attr_name_output(device, elem["minor"])
+            build = self.pddf_obj.get_attr_name_output(device, elem["build"])
+            if major and minor and build:
+                major = int(major['status'].rstrip(),0)
+                minor = int(minor['status'].rstrip(),0)
+                build = int(build['status'].rstrip(),0)
+                cpld_version[cpld_name] = "{}.{:02d}.{:03d}".format(major, minor, build)
+            else:
+                cpld_version[cpld_name] = "N/A"
+        return cpld_version
+
+    def _get_cpu_cpld_version(self):
+        # Retrieves the CPU CPLD firmware version
+        try:
+            with open(IOPORT_PATH, "rb") as f:
+                f.seek(CPU_CPLD_MAJOR_MINOR_REG.get("reg"), 0)
+                reg = int.from_bytes(f.read(1), signed=False)
+                mask = CPU_CPLD_MAJOR_MINOR_REG["major"]["mask"]
+                pos = CPU_CPLD_MAJOR_MINOR_REG["major"]["pos"]
+                major = (reg & mask) >> pos
+
+                mask = CPU_CPLD_MAJOR_MINOR_REG["minor"]["mask"]
+                pos = CPU_CPLD_MAJOR_MINOR_REG["minor"]["pos"]
+                minor = (reg & mask) >> pos
+                f.seek(CPU_CPLD_BUILD_REG.get("reg"),0)
+
+                reg = int.from_bytes(f.read(1), signed=False)
+                mask = CPU_CPLD_BUILD_REG["build"]["mask"]
+                pos = CPU_CPLD_BUILD_REG["build"]["pos"]
+                build = (reg & mask) >> pos
+
+                ver = "{}.{:02d}.{:03d}".format(major, minor, build)
+        except:
+            ver = "N/A"
+        
+        return ver
+
+    def _get_bmc_version(self):
+        # Retrieves the BMC firmware version
+        status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"])
+        if not status:
+            return value
+        else:
+            return None
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return COMPONENT_LIST[self.index][0]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        return COMPONENT_LIST[self.index][1]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        fw_version = None
+
+        if self.name == "BIOS":
+            fw_version = self._get_bios_version()
+        elif "CPU_CPLD" in self.name:
+            fw_version = self._get_cpu_cpld_version()
+        elif "CPLD" in self.name:
+            cpld_version = self._get_cpld_version()
+            fw_version = cpld_version.get(self.name)
+        elif "FPGA" in self.name:
+            cpld_version = self._get_cpld_version()
+            fw_version = cpld_version.get(self.name)
+        elif self.name == "BMC":
+            fw_version = self._get_bmc_version()
+        return fw_version
+
+    def install_firmware(self, image_path):
+        """
+        Install firmware to module
+        Args:
+            image_path: A string, path to firmware image
+        Returns:
+            A boolean, True if install successfully, False if not
+        """
+        raise NotImplementedError
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/eeprom.py
new file mode 100644
index 00000000000..90ab1c779a4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/eeprom.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Eeprom(PddfEeprom):
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def platform_name_str(self):
+        (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME)
+        if not is_valid:
+            return "N/A"
+
+        return results[2].decode('ascii')
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/fan.py
new file mode 100644
index 00000000000..ffa8a03b0da
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/fan.py
@@ -0,0 +1,168 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan import PddfFan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Fan(PddfFan):
+    """PDDF Platform-Specific Fan class"""
+
+    def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0):
+        # idx is 0-based
+        PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake'
+
+    def get_mfr_id(self):
+        """
+        Retrieves the manufacturer id of the device
+
+        Returns:
+            string: Manufacturer Id of device
+        """
+        if self.is_psu_fan:
+            device = "PSU{}".format(self.fans_psu_index)
+            output = self.pddf_obj.get_attr_name_output(device, "psu_mfr_id")
+        else:
+            raise NotImplementedError
+
+        if not output:
+            return None
+
+        mfr = output['status']
+
+        # strip_non_ascii
+        stripped = (c for c in mfr if 0 < ord(c) < 127)
+        mfr = ''.join(stripped)
+
+        return mfr.rstrip('\n')
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+
+        Returns:
+            string: Model/part number of device
+        """
+        if self.is_psu_fan:
+            device = "PSU{}".format(self.fans_psu_index)
+            output = self.pddf_obj.get_attr_name_output(device, "psu_model_name")
+        else:
+            raise NotImplementedError
+
+        if not output:
+            return None
+
+        model = output['status']
+
+        # strip_non_ascii
+        stripped = (c for c in model if 0 < ord(c) < 127)
+        model = ''.join(stripped)
+
+        return model.rstrip('\n')
+
+    def get_max_speed(self):
+        """
+        Retrieves the model name
+
+        Returns:
+            An string, the model name
+        """
+        if self.is_psu_fan:
+            mfr = self.get_mfr_id()
+            model = self.get_model()
+
+            max_speed = int(self.plugin_data['PSU']['valmap']['PSU_AC_FAN_MAX_SPEED'])
+            if mfr and model :
+                for dev in self.plugin_data['PSU']['psu_support_list']:
+                    if dev['Manufacturer'] == mfr and dev['Name'] == model:
+                        max_speed = int(self.plugin_data['PSU']['valmap'][dev['MaxSpd']])
+                        break
+        else:
+            if self.fan_index == 1:
+                max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED'])
+            else:
+                max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED'])
+
+        return max_speed
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the device
+        Returns:
+            bool: True if device is present, False if not
+        """
+        if self.is_psu_fan:
+            attr_name = "psu_present"
+            device = "PSU{}".format(self.fans_psu_index)
+        else:
+            idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index
+            attr_name = "fan" + str(idx) + "_present"
+            device = "FAN-CTRL"
+
+        output = self.pddf_obj.get_attr_name_output(device, attr_name)
+        if not output:
+            return False
+
+        mode = output['mode']
+        presence = output['status'].rstrip()
+        vmap = self.plugin_data['FAN']['present'][mode]['valmap']
+
+        if presence in vmap:
+            status = vmap[presence]
+        else:
+            status = False
+
+        return status
+
+    def get_direction(self):
+        """
+        Retrieves the direction of fan
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+        """
+        dir = "EXHAUST"
+        if self.is_psu_fan:
+            mfr = self.get_mfr_id()
+            model = self.get_model()
+
+            if mfr and model :
+                for dev in self.plugin_data['PSU']['psu_support_list']:
+                    if dev['Manufacturer'] == mfr and dev['Name'] == model:
+                        dir = dev['Dir']
+                        break
+        else:
+            dir = "EXHAUST"
+
+        return dir
+
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        speed_percentage = 0
+
+        max_speed = self.get_max_speed()
+        rpm_speed = self.get_speed_rpm()
+
+        speed_percentage = round((rpm_speed*100)/max_speed)
+
+        return min(speed_percentage, 100)
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        return self.get_speed()
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/fan_drawer.py
new file mode 100644
index 00000000000..3b9bb607f63
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/fan_drawer.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(PddfFanDrawer):
+    """PDDF Platform-Specific Fan-Drawer class"""
+
+    def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
+        # idx is 0-based 
+        PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/platform.py
new file mode 100644
index 00000000000..406b1179ae1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/platform.py
@@ -0,0 +1,25 @@
+#!/usr/bin/env python
+
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+
+try:
+    from sonic_platform_pddf_base.pddf_platform import PddfPlatform
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Platform(PddfPlatform):
+    """
+    PDDF Platform-Specific Platform Class
+    """
+
+    def __init__(self):
+        PddfPlatform.__init__(self)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/psu.py
new file mode 100644
index 00000000000..bf8344d8dcb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/psu.py
@@ -0,0 +1,67 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_psu import PddfPsu
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Psu(PddfPsu):
+    """PDDF Platform-Specific PSU class"""
+    
+    PLATFORM_PSU_CAPACITY = 3000
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
+        
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+
+        Returns:
+            A float number, the power in watts,
+            e.g. 302.6
+        """
+
+        # power is returned in micro watts
+        return round(float(self.get_voltage()*self.get_current()), 2)
+
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return float(self.PLATFORM_PSU_CAPACITY)
+
+    def get_capacity(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return self.get_maximum_supplied_power()
+
+    def get_type(self):
+        """
+        Gets the type of the PSU
+
+        Returns:
+            A string, the type of PSU (AC/DC)
+        """
+        mfr = self.get_mfr_id()
+        model = self.get_model()
+        ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE']
+
+        if mfr and model :
+            for dev in self.plugin_data['PSU']['psu_support_list']:
+                if dev['Manufacturer'] == mfr and dev['Name'] == model:
+                    ptype = dev['Type']
+                    break
+
+
+        return ptype
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/sfp.py
new file mode 100644
index 00000000000..c7919482f69
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/sfp.py
@@ -0,0 +1,31 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_platform_pddf_base.pddf_sfp import PddfSfp
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Sfp(PddfSfp):
+    """
+    PDDF Platform-Specific Sfp class
+    """
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+        self.index = index
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_error_description(self):
+        """
+        Retrives the error descriptions of the SFP module
+        Returns:
+            String that represents the current error descriptions of vendor specific errors
+            In case there are multiple errors, they should be joined by '|',
+            like: "Bad EEPROM|Unsupported cable"
+        """
+        if not self.get_presence():
+            return self.SFP_STATUS_UNPLUGGED
+
+        return self.SFP_STATUS_OK
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/thermal.py
new file mode 100644
index 00000000000..77d6ec7ae88
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform/thermal.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_thermal import PddfThermal
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+
+class Thermal(PddfThermal):
+    """PDDF Platform-Specific Thermal class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
+        PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform_setup.py
new file mode 100644
index 00000000000..5caa2b81dcb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/sonic_platform_setup.py
@@ -0,0 +1,27 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation on ufispace platform',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='linuxnetdev@microsoft.com',
+    url='https://github.com/Azure/sonic-buildimage',
+    maintainer='Nonodark Huang',
+    maintainer_email='nonodark.huang@ufispace.com',
+    packages=['sonic_platform'],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/utils/pddf_post_device_create.sh
new file mode 100755
index 00000000000..f967f9414a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/utils/pddf_post_device_create.sh
@@ -0,0 +1,150 @@
+#!/bin/bash
+platform_firmware_versions() {
+    FIRMWARE_VERSION_FILE=/var/log/firmware_versions
+    rm -rf ${FIRMWARE_VERSION_FILE}
+
+    major_minor=$(xxd -s 0x600 -p -l 1 /dev/port)
+    major=$(((16#$major_minor & 2#11000000) >> 6))
+    minor=$((16#$major_minor & 2#00111111))
+    build=$((16#$(xxd -s 0x6E0 -p -l 1 /dev/port)))
+    cpu_cpld_ver=$(printf '%d.%02d.%03d' $major $minor $build)
+    echo "CPU CPLD: ${cpu_cpld_ver}" >> $FIRMWARE_VERSION_FILE
+
+    cpld1_ver=$(printf '%d.%02d.%03d' \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_major_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_minor_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_build))
+    echo "CPLD1: ${cpld1_ver}" >> $FIRMWARE_VERSION_FILE
+
+    cpld2_ver=$(printf '%d.%02d.%03d' \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_major_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_minor_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_build))
+    echo "CPLD2: ${cpld2_ver}" >> $FIRMWARE_VERSION_FILE
+
+    cpld3_ver=$(printf '%d.%02d.%03d' \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_major_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_minor_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_build))
+    echo "CPLD3: ${cpld3_ver}" >> $FIRMWARE_VERSION_FILE
+
+    fpga_ver=$(printf '%d.%02d.%03d' \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/fpga_major_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/fpga_minor_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/fpga_build))
+    echo "FPGA: ${fpga_ver}" >> $FIRMWARE_VERSION_FILE
+
+    bios_ver=$(cat /sys/class/dmi/id/bios_version)
+    echo "BIOS: ${bios_ver}" >> $FIRMWARE_VERSION_FILE
+    
+    VERARR=(`ipmitool raw 0x6 0x1 | cut -d ' ' -f 4,5,16,15,14`)
+    echo "BMC: ${VERARR[0]}.${VERARR[1]}.${VERARR[4]}.${VERARR[3]}${VERARR[2]}" >> ${FIRMWARE_VERSION_FILE}
+}
+
+function enable_i2c_realy {
+    local items=(
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_i2c_ctrl"
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_i2c_ctrl"
+    )
+    local i=""
+
+    echo "Set i2c control enable"
+    for i in "${items[@]}"
+    do
+        reg=$(cat ${i})
+        set_reg=$(( $reg | 2#10000000 ))
+        echo $set_reg > ${i}
+    done
+}
+
+function enable_event_control {
+    local items=(
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_evt_ctrl"
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_evt_ctrl"
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_evt_ctrl"
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/fpga_evt_ctrl"
+    )
+
+    local i=""
+
+    echo "Set event control enable"
+    for i in "${items[@]}"
+    do
+        reg=$(cat ${i})
+        set_reg=$(( $reg | 2#00000001 ))
+        echo $set_reg > ${i}
+    done
+}
+
+function set_led_default_val {
+    pddf_ledutil setstatusled LOC_LED off > /dev/null
+    pddf_ledutil setstatusled SYNC_LED off > /dev/null
+}
+
+function diable_bmc_watchdog {
+    echo "Disable BMC watchdog"
+    timeout 3 ipmitool mc watchdog off
+}
+
+function set_mac_rov {
+    echo "Set MAC rov"
+
+    local bus_id="1"
+    local rov_i2c_bus="13"
+    local rov_i2c_addr=("0x64")
+    local rov_config_reg="0x21"
+    local rov_sysfs="/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld_mac_rov"
+    local mac_rov_done="/tmp/mac_rov_done"
+
+    local avs_array=(
+        0x84 0x86 0x88 0x8A 0x8C 0x8E
+        0x90 0x92 0x94 0x96 0x98
+    )
+
+    local vdd_val=(
+        '0.7875V'  '0.775V' '0.7625V' '0.75V' '0.7375V' '0.725V'
+        '0.7125V'  '0.7V'   '0.6875V' '0.675V''0.6625V'
+    )
+
+    local vout_cmd=(
+        '0x064F' '0x063B' '0x0622' '0x060E' '0x05F5' '0x05DC'
+        '0x05C3' '0x05AA' '0x0591' '0x0578' '0x055F'
+    )
+    # Set MAC ROV Status
+    if [ -f "$rov_sysfs" ]  ;then
+        rov_reg=$(eval "cat $rov_sysfs")
+        avs=$(( $rov_reg ))
+
+        if [ -c "/dev/i2c-${rov_i2c_bus}" ]; then
+            for (( i=0; i<${#rov_i2c_addr[@]}; i++ ))
+            do
+                for (( j=0; j<${#avs_array[@]}; j++ ))
+                do
+                    if [ $avs -eq $((${avs_array[j]})) ];then
+                        bus=${rov_i2c_bus}
+                        addr=${rov_i2c_addr[i]}
+                        reg=${rov_config_reg}
+                        val=${vout_cmd[j]}
+                        echo "Set MAC($i) rov bus($bus) addr($addr) reg($reg) avs($(printf "0x%X" $avs)) val($val)"
+                        if [ ! -f "$mac_rov_done" ]; then
+                            $(i2cset -y $bus $addr $reg $val w)
+                            $(touch "$mac_rov_done")
+                        else
+                            echo "  * MAC ROV has been set, skipping it."
+                        fi
+                        break;
+                    fi
+                done
+            done
+        fi
+    fi
+}
+
+
+diable_bmc_watchdog
+enable_i2c_realy
+set_mac_rov
+enable_event_control
+set_led_default_val
+platform_firmware_versions
+echo "PDDF device post-create completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/utils/pddf_post_driver_install.sh
new file mode 100755
index 00000000000..ed2559977e4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/utils/pddf_post_driver_install.sh
@@ -0,0 +1,2 @@
+#!/bin/bash
+echo "PDDF driver post-install completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/utils/pddf_switch_svc.py
new file mode 100755
index 00000000000..ba1ba0325f8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64e/utils/pddf_switch_svc.py
@@ -0,0 +1,86 @@
+#!/usr/bin/env python
+# Script to stop and start the respective platforms default services.
+# This will be used while switching the pddf->non-pddf mode and vice versa
+import commands
+
+def check_pddf_support():
+    return True
+
+def stop_platform_svc():
+
+    '''
+    status, output = commands.getstatusoutput("systemctl stop s9321-64e-platform-monitor-fan.service")
+    if status:
+        print "Stop s9321-64e-platform-fan.service failed %d"%status
+        return False
+
+    status, output = commands.getstatusoutput("systemctl stop s9321-64e-platform-monitor-psu.service")
+    if status:
+        print "Stop s9321-64e-platform-psu.service failed %d"%status
+        return False
+
+    status, output = commands.getstatusoutput("systemctl stop s9321-64e-platform-monitor.service")
+    if status:
+        print "Stop s9321-64e-platform-init.service failed %d"%status
+        return False
+    status, output = commands.getstatusoutput("systemctl disable s9321-64e-platform-monitor.service")
+    if status:
+        print "Disable s9321-64e-platform-monitor.service failed %d"%status
+        return False
+    '''
+
+    status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit")
+    if status:
+        print "platform_utility.py deinit command failed %d"%status
+        return False
+
+    # HACK , stop the pddf-platform-init service if it is active
+    status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
+    if status:
+        print "Stop pddf-platform-init.service along with other platform serives failed %d"%status
+        return False
+
+    return True
+
+def start_platform_svc():
+
+    status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init")
+    if status:
+        print "platform_utility.py init command failed %d"%status
+        return False
+
+    '''
+    status, output = commands.getstatusoutput("systemctl enable s9321-64e-platform-monitor.service")
+    if status:
+        print "Enable s9321-64e-platform-monitor.service failed %d"%status
+        return False
+    status, output = commands.getstatusoutput("systemctl start s9321-64e-platform-monitor-fan.service")
+    if status:
+        print "Start s9321-64e-platform-monitor-fan.service failed %d"%status
+        return False
+
+    status, output = commands.getstatusoutput("systemctl start s9321-64e-platform-monitor-psu.service")
+    if status:
+        print "Start s9321-64e-platform-monitor-psu.service failed %d"%status
+        return False
+    '''
+    return True
+
+def start_platform_pddf():
+
+    status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service")
+    if status:
+        print "Start pddf-platform-init.service failed %d"%status
+        return False
+
+    return True
+
+def stop_platform_pddf():
+
+    status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
+    if status:
+        print "Stop pddf-platform-init.service failed %d"%status
+        return False
+
+    return True
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/Makefile
new file mode 100644
index 00000000000..2ccf00a5604
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/Makefile
@@ -0,0 +1,8 @@
+
+x86-64-ufispace-s9321-64eo-cpld-objs := x86-64-ufispace-s9321-64eo-cpld-main.o x86-64-ufispace-s9321-64eo-cpld-mux.o
+MODULE_NAME  = x86-64-ufispace-s9321-64eo-cpld.o x86-64-ufispace-s9321-64eo-sys-eeprom.o x86-64-ufispace-s9321-64eo-lpc.o pddf_custom_sysstatus_module.o pddf_custom_cpldmux_driver.o
+obj-m       := $(MODULE_NAME)
+
+CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include
+CFLAGS_pddf_custom_cpldmux_driver.o := -I$(M)/../../../../pddf/i2c/modules/include
+KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/pddf_custom_cpldmux_driver.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/pddf_custom_cpldmux_driver.c
new file mode 100644
index 00000000000..6ec4b192371
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/pddf_custom_cpldmux_driver.c
@@ -0,0 +1,87 @@
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/dmi.h>
+#include "pddf_cpldmux_defs.h"
+
+extern PDDF_CPLDMUX_OPS pddf_cpldmux_ops;
+
+/* NOTE: Never use i2c_smbus_write_byte_data() or i2c_smbus_xfer() since these operations
+ * locks the parent bus which might lead to mutex deadlock.
+ */
+static int cpldmux_byte_write(struct i2c_client *client, u8 regaddr, u8 val)
+{
+    union i2c_smbus_data data;
+
+    data.byte = val;
+    return client->adapter->algo->smbus_xfer(client->adapter, client->addr,
+                                             client->flags,
+                                             I2C_SMBUS_WRITE,
+                                             regaddr, I2C_SMBUS_BYTE_DATA, &data);
+}
+
+int pddf_cpldmux_select(struct i2c_mux_core *muxc, uint32_t chan)
+{
+    PDDF_CPLDMUX_PRIV_DATA  *private = i2c_mux_priv(muxc);
+    PDDF_CPLDMUX_PDATA *pdata = NULL;
+    PDDF_CPLDMUX_CHAN_DATA *sdata = NULL;
+    int ret = 0;
+
+    /* Select the chan_data based upon the chan */
+    pdata = &private->data;
+    if (chan>=pdata->num_chan)
+    {
+        printk(KERN_ERR "%s: wrong channel number %d, supported channels %d\n",__FUNCTION__, chan, pdata->num_chan);
+        return 0;
+    }
+
+    if ( (pdata->chan_cache!=1) || (private->last_chan!=chan) )
+    {
+        sdata = &pdata->chan_data[chan];
+        // pddf_dbg(CPLDMUX, KERN_INFO "%s: Writing 0x%x at 0x%x offset of cpld 0x%x to enable chan %d\n", __FUNCTION__, sdata->cpld_sel, sdata->cpld_offset, sdata->cpld_devaddr, chan);
+        ret =  cpldmux_byte_write(pdata->cpld, sdata->cpld_offset,  (uint8_t)(sdata->cpld_sel & 0xff));
+        private->last_chan = chan;
+    }
+
+    return ret;
+}
+
+int pddf_cpldmux_deselect(struct i2c_mux_core *muxc, uint32_t chan)
+{
+    PDDF_CPLDMUX_PRIV_DATA  *private = i2c_mux_priv(muxc);
+    PDDF_CPLDMUX_PDATA *pdata = NULL;
+    PDDF_CPLDMUX_CHAN_DATA *sdata = NULL;
+    int ret = 0;
+
+    /* Select the chan_data based upon the chan */
+    pdata = &private->data;
+    if (chan>=pdata->num_chan)
+    {
+        printk(KERN_ERR "%s: wrong channel number %d, supported channels %d\n",__FUNCTION__, chan, pdata->num_chan);
+        return 0;
+    }
+    sdata = &pdata->chan_data[chan];
+
+    // pddf_dbg(CPLDMUX, KERN_INFO "%s: Writing 0x%x at 0x%x offset of cpld 0x%x to disable chan %d", __FUNCTION__, sdata->cpld_desel, sdata->cpld_offset, sdata->cpld_devaddr, chan);
+    ret = cpldmux_byte_write(pdata->cpld, sdata->cpld_offset,  (uint8_t)(sdata->cpld_desel));
+    return ret;
+}
+
+static int __init pddf_custom_cpldmux_init(void)
+{
+    pddf_cpldmux_ops.select = pddf_cpldmux_select;
+    pddf_cpldmux_ops.deselect = pddf_cpldmux_deselect;
+    return 0;
+}
+
+static void __exit pddf_custom_cpldmux_exit(void)
+{
+    return;
+}
+
+MODULE_AUTHOR("Nonodark Huang");
+MODULE_DESCRIPTION("custom board_i2c_cpldmux driver");
+MODULE_LICENSE("GPL");
+
+module_init(pddf_custom_cpldmux_init);
+module_exit(pddf_custom_cpldmux_exit);
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/pddf_custom_sysstatus_module.c
new file mode 100644
index 00000000000..12c381953fc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/pddf_custom_sysstatus_module.c
@@ -0,0 +1,327 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * A pddf kernel module for system status registers
+ */
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/dmi.h>
+#include <linux/kobject.h>
+#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h"
+#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h"
+
+#define _memset(s, c, n) memset(s, c, n)
+
+SYSSTATUS_DATA sysstatus_data = {0};
+
+extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+
+static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf);
+ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+
+
+PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32,
+             (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL);
+PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t),  (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL);
+PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL);
+PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL);
+PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL);
+PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL);
+
+
+
+static struct attribute *sysstatus_addr_attributes[] = {
+    &attr_attr_name.dev_attr.attr,
+    &attr_attr_devaddr.dev_attr.attr,
+    &attr_attr_offset.dev_attr.attr,
+    &attr_attr_mask.dev_attr.attr,
+    &attr_attr_len.dev_attr.attr,
+    &attr_attr_ops.dev_attr.attr,
+    NULL
+};
+
+PDDF_DATA_ATTR(board_sku_id   , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(board_hw_id    , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(board_deph_id  , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(board_build_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld1_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld1_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld1_build    , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_build    , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_build    , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(fpga_major_ver , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(fpga_minor_ver , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(fpga_build     , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(psu_status     , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(system_led_sys_fan , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(system_led_psu , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(system_led_sync_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_i2c_ctrl , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_i2c_ctrl , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld_mac_rov   , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld1_evt_ctrl , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_evt_ctrl , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_evt_ctrl , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(fpga_evt_ctrl  , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld_port_led_clr , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+
+
+
+
+static struct attribute *sysstatus_data_attributes[] = {
+    &attr_board_sku_id.dev_attr.attr,
+    &attr_board_hw_id.dev_attr.attr,
+    &attr_board_deph_id.dev_attr.attr,
+    &attr_board_build_id.dev_attr.attr,
+    &attr_cpld1_major_ver.dev_attr.attr,
+    &attr_cpld1_minor_ver.dev_attr.attr,
+    &attr_cpld1_build.dev_attr.attr,
+    &attr_cpld2_major_ver.dev_attr.attr,
+    &attr_cpld2_minor_ver.dev_attr.attr,
+    &attr_cpld2_build.dev_attr.attr,
+    &attr_cpld3_major_ver.dev_attr.attr,
+    &attr_cpld3_minor_ver.dev_attr.attr,
+    &attr_cpld3_build.dev_attr.attr,
+    &attr_fpga_major_ver.dev_attr.attr,
+    &attr_fpga_minor_ver.dev_attr.attr,
+    &attr_fpga_build.dev_attr.attr,
+    &attr_psu_status.dev_attr.attr,
+    &attr_system_led_sys_fan.dev_attr.attr,
+    &attr_system_led_psu.dev_attr.attr,
+    &attr_system_led_sync_id.dev_attr.attr,
+    &attr_cpld2_i2c_ctrl.dev_attr.attr,
+    &attr_cpld3_i2c_ctrl.dev_attr.attr,
+    &attr_cpld_mac_rov.dev_attr.attr,
+    &attr_cpld1_evt_ctrl.dev_attr.attr,
+    &attr_cpld2_evt_ctrl.dev_attr.attr,
+    &attr_cpld3_evt_ctrl.dev_attr.attr,
+    &attr_fpga_evt_ctrl.dev_attr.attr,
+    &attr_cpld_port_led_clr.dev_attr.attr,
+    NULL
+};
+
+
+static const struct attribute_group pddf_sysstatus_addr_group = {
+    .attrs = sysstatus_addr_attributes,
+};
+
+
+static const struct attribute_group pddf_sysstatus_data_group = {
+    .attrs = sysstatus_data_attributes,
+};
+
+
+static struct kobject *sysstatus_addr_kobj;
+static struct kobject *sysstatus_data_kobj;
+
+/* reg shift */
+static u8 _shift(u8 mask)
+{
+    int i=0, mask_one=1;
+
+    for(i=0; i<8; ++i) {
+        if ((mask & mask_one) == 1)
+            return i;
+        else
+            mask >>= 1;
+    }
+
+    return -1;
+}
+
+/* reg mask and shift */
+static u8 _mask_shift(u8 val, u8 mask)
+{
+    int shift=0;
+
+    shift = _shift(mask);
+    return (val & mask) >> shift;
+}
+
+ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf)
+{
+
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    SYSSTATUS_DATA *data = &sysstatus_data;
+    struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL;
+    int i, status ;
+
+
+    for (i=0;i<MAX_ATTRS;i++)
+    {
+        if (strcmp(data->sysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 )
+        {
+            sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i];
+
+        }
+    }
+
+    if (sysstatus_addr_attrs==NULL )
+    {
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
+        status = 0;
+        return sprintf(buf, "0x%x\n", status);
+    }
+    else
+    {
+        status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset);
+    }
+
+    return sprintf(buf, "0x%x\n", _mask_shift(status, sysstatus_addr_attrs->mask));
+
+}
+
+ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    SYSSTATUS_DATA *data = &sysstatus_data;
+    struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL;
+    int i, status ;
+    u8 reg_val;
+
+    for (i=0;i<MAX_ATTRS;i++)
+    {
+        if (strcmp(data->sysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 )
+        {
+            sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i];
+        }
+    }
+
+    if (sysstatus_addr_attrs==NULL)
+    {
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
+        return -EINVAL;
+    }
+    else
+    {
+        if (kstrtou8(buf, 0, &reg_val) < 0)
+            return -EINVAL;
+
+        status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val);
+
+        if (status!=0)
+        {
+            printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status);
+            return status;
+        }
+    }
+
+    return count;
+}
+
+
+
+static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    PDDF_ATTR *ptr = (PDDF_ATTR *)da;
+    SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr);
+
+    pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr;
+    pdata->len++;
+    pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname);
+
+#ifdef __STDC_LIB_EXT1__
+    memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
+#else
+    _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
+#endif
+
+    return count;
+}
+
+
+
+
+int __init sysstatus_data_init(void)
+{
+    struct kobject *device_kobj;
+    int ret = 0;
+
+
+    pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n");
+
+    device_kobj = get_device_i2c_kobj();
+    if(!device_kobj)
+        return -ENOMEM;
+
+    sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj);
+    if(!sysstatus_addr_kobj)
+        return -ENOMEM;
+
+    sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj);
+    if(!sysstatus_data_kobj)
+        return -ENOMEM;
+
+
+    ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+    if (ret)
+    {
+        kobject_put(sysstatus_addr_kobj);
+        return ret;
+    }
+
+    ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group);
+    if (ret)
+    {
+        sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+        kobject_put(sysstatus_data_kobj);
+        kobject_put(sysstatus_addr_kobj);
+        return ret;
+    }
+
+
+    return ret;
+}
+
+void __exit sysstatus_data_exit(void)
+{
+    pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS  MODULE.. exit\n");
+    sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group);
+    sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+    kobject_put(sysstatus_data_kobj);
+    kobject_put(sysstatus_addr_kobj);
+    pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__);
+    return;
+}
+
+module_init(sysstatus_data_init);
+module_exit(sysstatus_data_exit);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("SYSSTATUS platform data");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-cpld-main.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-cpld-main.c
new file mode 100644
index 00000000000..dd80876b7b4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-cpld-main.c
@@ -0,0 +1,1777 @@
+/*
+ * A i2c cpld driver for the ufispace_s9321_64eo
+ *
+ * Copyright (C) 2017-2019 UfiSpace Technology Corporation.
+ * Nonodark Huang <nonodark.huang@ufispace.com>
+ *
+ * Based on ad7414.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/dmi.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+
+
+#include "x86-64-ufispace-s9321-64eo-cpld-main.h"
+
+bool mux_en = false;
+module_param(mux_en, bool, S_IWUSR|S_IRUSR);
+
+#if !defined(SENSOR_DEVICE_ATTR_RO)
+#define SENSOR_DEVICE_ATTR_RO(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0444, _func##_show, NULL, _index)
+#endif
+
+#if !defined(SENSOR_DEVICE_ATTR_RW)
+#define SENSOR_DEVICE_ATTR_RW(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0644, _func##_show, _func##_store, _index)
+
+#endif
+
+#if !defined(SENSOR_DEVICE_ATTR_WO)
+#define SENSOR_DEVICE_ATTR_WO(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0200, NULL, _func##_store, _index)
+#endif
+
+#ifdef DEBUG
+#define DEBUG_PRINT(fmt, args...) \
+    printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#else
+#define DEBUG_PRINT(fmt, args...)
+#endif
+
+#define BSP_LOG_R(fmt, args...) \
+    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...) \
+    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+
+#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \
+{ \
+    mutex_lock(lock); \
+    ret = i2c_smbus_read_byte_data(i2c_client, reg); \
+    mutex_unlock(lock); \
+    BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \
+}
+
+#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \
+{ \
+    mutex_lock(lock); \
+    ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \
+    mutex_unlock(lock); \
+    BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \
+}
+
+#define _DEVICE_ATTR(_name)     \
+    &sensor_dev_attr_##_name.dev_attr.attr
+
+/* CPLD sysfs attributes index  */
+enum cpld_sysfs_attributes {
+    // CPLD Common
+    CPLD_MINOR_VER,
+    CPLD_MAJOR_VER,
+    CPLD_ID,
+    CPLD_BUILD_VER,
+    CPLD_VERSION_H,
+    CPLD_EVT_CTRL,
+
+    // CPLD 1
+    CPLD_BOARD_ID_0,
+    CPLD_BOARD_ID_1,
+    CPLD_MAC_INTR,
+    CPLD_PHY_INTR,
+    CPLD_CPLDX_INTR,
+    CPLD_MAC_THERMAL_INTR,
+    CPLD_MISC_INTR,
+    CPLD_CPU_INTR,
+    CPLD_MAC_MASK,
+    CPLD_PHY_MASK,
+    CPLD_CPLDX_MASK,
+    CPLD_MAC_THERMAL_MASK,
+    CPLD_MISC_MASK,
+    CPLD_CPU_MASK,
+    CPLD_MAC_EVT,
+    CPLD_PHY_EVT,
+    CPLD_CPLDX_EVT,
+    CPLD_MAC_THERMAL_EVT,
+    CPLD_MISC_EVT,
+    CPLD_MAC_RESET,
+    CPLD_BMC_RESET,
+    CPLD_USB_RESET,
+    CPLD_MISC_RESET,
+    CPLD_BRD_PRESENT,
+    CPLD_PSU_STATUS,
+    CPLD_SYSTEM_PWR,
+    CPLD_MAC_SYNCE,
+    CPLD_MAC_ROV,
+    CPLD_MUX_CTRL,
+    CPLD_SYSTEM_LED_SYS,
+    CPLD_SYSTEM_LED_FAN,
+    CPLD_SYSTEM_LED_PSU_0,
+    CPLD_SYSTEM_LED_PSU_1,
+    CPLD_SYSTEM_LED_SYNC,
+    CPLD_SYSTEM_LED_ID,
+    CPLD_MGMT_PORT_0_LED_STATUS,
+    CPLD_MGMT_PORT_0_LED_SPEED,
+    CPLD_MGMT_PORT_1_LED_STATUS,
+    CPLD_MGMT_PORT_1_LED_SPEED,
+    CPLD_PORT_LED_CLR,
+    CPLD_MISC_PWR,
+    DBG_CPLD_MAC_INTR,
+    DBG_CPLD_CPLDX_INTR,
+    DBG_CPLD_MAC_THERMAL_INTR,
+    DBG_CPLD_MISC_INTR,
+
+    //CPLD 2 and CPLD 3
+    CPLD_OSFP_PORT_0_7_16_23_INTR,
+    CPLD_OSFP_PORT_8_15_24_31_INTR,
+    CPLD_OSFP_PORT_32_39_48_55_INTR,
+    CPLD_OSFP_PORT_40_47_56_63_INTR,
+    CPLD_OSFP_PORT_0_7_16_23_PRES,
+    CPLD_OSFP_PORT_8_15_24_31_PRES,
+    CPLD_OSFP_PORT_32_39_48_55_PRES,
+    CPLD_OSFP_PORT_40_47_56_63_PRES,
+    CPLD_OSFP_PORT_0_15_16_31_FUSE,
+    CPLD_OSFP_PORT_32_47_48_63_FUSE,
+    CPLD_OSFP_PORT_0_7_16_23_STUCK,
+    CPLD_OSFP_PORT_8_15_24_31_STUCK,
+    CPLD_OSFP_PORT_32_39_48_55_STUCK,
+    CPLD_OSFP_PORT_40_47_56_63_STUCK,
+    CPLD_OSFP_PORT_0_7_16_23_INTR_MASK,
+    CPLD_OSFP_PORT_8_15_24_31_INTR_MASK,
+    CPLD_OSFP_PORT_32_39_48_55_INTR_MASK,
+    CPLD_OSFP_PORT_40_47_56_63_INTR_MASK,
+    CPLD_OSFP_PORT_0_7_16_23_PRES_MASK,
+    CPLD_OSFP_PORT_8_15_24_31_PRES_MASK,
+    CPLD_OSFP_PORT_32_39_48_55_PRES_MASK,
+    CPLD_OSFP_PORT_40_47_56_63_PRES_MASK,
+    CPLD_OSFP_PORT_0_15_16_31_FUSE_MASK,
+    CPLD_OSFP_PORT_32_47_48_63_FUSE_MASK,
+    CPLD_OSFP_PORT_0_7_16_23_STUCK_MASK,
+    CPLD_OSFP_PORT_8_15_24_31_STUCK_MASK,
+    CPLD_OSFP_PORT_32_39_48_55_STUCK_MASK,
+    CPLD_OSFP_PORT_40_47_56_63_STUCK_MASK,
+    CPLD_OSFP_PORT_0_7_16_23_INTR_EVENT,
+    CPLD_OSFP_PORT_8_15_24_31_INTR_EVENT,
+    CPLD_OSFP_PORT_32_39_48_55_INTR_EVENT,
+    CPLD_OSFP_PORT_40_47_56_63_INTR_EVENT,
+    CPLD_OSFP_PORT_0_7_16_23_PRES_EVENT,
+    CPLD_OSFP_PORT_8_15_24_31_PRES_EVENT,
+    CPLD_OSFP_PORT_32_39_48_55_PRES_EVENT,
+    CPLD_OSFP_PORT_40_47_56_63_PRES_EVENT,
+    CPLD_OSFP_PORT_0_15_16_31_FUSE_EVENT,
+    CPLD_OSFP_PORT_32_47_48_63_FUSE_EVENT,
+    CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT,
+    CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT,
+    CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT,
+    CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT,
+    CPLD_OSFP_PORT_0_7_16_23_RST,
+    CPLD_OSFP_PORT_8_15_24_31_RST,
+    CPLD_OSFP_PORT_32_39_48_55_RST,
+    CPLD_OSFP_PORT_40_47_56_63_RST,
+    CPLD_OSFP_PORT_0_7_16_23_LPMODE,
+    CPLD_OSFP_PORT_8_15_24_31_LPMODE,
+    CPLD_OSFP_PORT_32_39_48_55_LPMODE,
+    CPLD_OSFP_PORT_40_47_56_63_LPMODE,
+    CPLD_I2C_CONTROL,
+    CPLD_I2C_RELAY,
+    CPLD_DBG_OSFP_PORT_0_7_16_23_INTR,
+    CPLD_DBG_OSFP_PORT_8_15_24_31_INTR,
+    CPLD_DBG_OSFP_PORT_32_39_48_55_INTR,
+    CPLD_DBG_OSFP_PORT_40_47_56_63_INTR,
+    CPLD_DBG_OSFP_PORT_0_7_16_23_PRES,
+    CPLD_DBG_OSFP_PORT_8_15_24_31_PRES,
+    CPLD_DBG_OSFP_PORT_32_39_48_55_PRES,
+    CPLD_DBG_OSFP_PORT_40_47_56_63_PRES,
+    CPLD_DBG_OSFP_PORT_0_15_16_31_FUSE,
+    CPLD_DBG_OSFP_PORT_32_47_48_63_FUSE,
+
+    //FPGA
+    FPGA_MINOR_VER,
+    FPGA_MAJOR_VER,
+    FPGA_BUILD,
+    FPGA_VERSION_H,
+    FPGA_CHIP,
+    FPGA_MGMT_PORT_0_1_TX_RATE_SEL,
+    FPGA_MGMT_PORT_0_1_RX_RATE_SEL,
+    FPGA_MGMT_PORT_0_1_TX_DIS,
+    FPGA_MGMT_PORT_0_1_TX_FAULT,
+    FPGA_MGMT_PORT_0_1_RX_LOS,
+    FPGA_MGMT_PORT_0_1_PRES,
+    FPGA_MGMT_PORT_0_1_STUCK,
+    FPGA_MGMT_PORT_0_1_TX_FAULT_MASK,
+    FPGA_MGMT_PORT_0_1_RX_LOS_MASK,
+    FPGA_MGMT_PORT_0_1_PRES_MASK,
+    FPGA_MGMT_PORT_0_1_STUCK_MASK,
+    FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT,
+    FPGA_MGMT_PORT_0_1_RX_LOS_EVENT,
+    FPGA_MGMT_PORT_0_1_PRES_EVENT,
+    FPGA_MGMT_PORT_0_1_STUCK_EVENT,
+    FPGA_EVT_CTRL,
+    FPGA_LAN_PORT_RELAY,
+
+    //MUX
+    IDLE_STATE,
+
+    //BSP DEBUG
+    BSP_DEBUG
+};
+
+enum data_type {
+    DATA_HEX,
+    DATA_DEC,
+    DATA_UNK,
+};
+
+typedef struct  {
+    u16 reg;
+    u8 mask;
+    u8 data_type;
+} attr_reg_map_t;
+
+static attr_reg_map_t attr_reg[]= {
+
+    // CPLD Common
+    [CPLD_MINOR_VER]                            = {CPLD_VERSION_REG                              , MASK_0011_1111, DATA_DEC},
+    [CPLD_MAJOR_VER]                            = {CPLD_VERSION_REG                              , MASK_1100_0000, DATA_DEC},
+    [CPLD_ID]                                   = {CPLD_ID_REG                                   , MASK_ALL      , DATA_DEC},
+    [CPLD_BUILD_VER]                            = {CPLD_BUILD_REG                                , MASK_ALL      , DATA_DEC},
+    [CPLD_VERSION_H]                            = {NONE_REG                                      , MASK_NONE     , DATA_UNK},
+    [CPLD_EVT_CTRL]                             = {CPLD_EVT_CTRL_REG                             , MASK_ALL      , DATA_HEX},
+
+    // CPLD 1
+    [CPLD_BOARD_ID_0]                           = {CPLD_BOARD_ID_0_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_BOARD_ID_1]                           = {CPLD_BOARD_ID_1_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_INTR]                             = {CPLD_MAC_INTR_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_PHY_INTR]                             = {CPLD_PHY_INTR_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_CPLDX_INTR]                           = {CPLD_CPLDX_INTR_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_THERMAL_INTR]                     = {CPLD_THERMAL_INTR_REG                         , MASK_ALL      , DATA_HEX},
+    [CPLD_MISC_INTR]                            = {CPLD_MISC_INTR_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_CPU_INTR]                             = {CPLD_CPU_INTR_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_MASK]                             = {CPLD_MAC_MASK_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_PHY_MASK]                             = {CPLD_PHY_MASK_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_CPLDX_MASK]                           = {CPLD_CPLDX_MASK_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_THERMAL_MASK]                     = {CPLD_THERMAL_MASK_REG                         , MASK_ALL      , DATA_HEX},
+    [CPLD_MISC_MASK]                            = {CPLD_MISC_MASK_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_CPU_MASK]                             = {CPLD_CPU_MASK_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_EVT]                              = {CPLD_MAC_EVT_REG                              , MASK_ALL      , DATA_HEX},
+    [CPLD_PHY_EVT]                              = {CPLD_PHY_EVT_REG                              , MASK_ALL      , DATA_HEX},
+    [CPLD_CPLDX_EVT]                            = {CPLD_CPLDX_EVT_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_THERMAL_EVT]                      = {CPLD_THERMAL_EVT_REG                          , MASK_ALL      , DATA_HEX},
+    [CPLD_MISC_EVT]                             = {CPLD_MISC_EVT_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_RESET]                            = {CPLD_MAC_RESET_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_BMC_RESET]                            = {CPLD_BMC_RESET_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_USB_RESET]                            = {CPLD_USB_RESET_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_MISC_RESET]                           = {CPLD_MISC_RESET_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_BRD_PRESENT]                          = {CPLD_BRD_PRESENT_REG                          , MASK_ALL      , DATA_HEX},
+    [CPLD_PSU_STATUS]                           = {CPLD_PSU_STATUS_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_SYSTEM_PWR]                           = {CPLD_SYSTEM_PWR_REG                           , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_SYNCE]                            = {CPLD_MAC_SYNCE_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_MAC_ROV]                              = {CPLD_MAC_ROV_REG                              , MASK_ALL      , DATA_HEX},
+    [CPLD_MUX_CTRL]                             = {CPLD_MUX_CTRL_REG                             , MASK_ALL      , DATA_HEX},
+    [CPLD_SYSTEM_LED_SYS]                       = {CPLD_SYSTEM_LED_SYS_FAN_REG                   , MASK_0000_1111, DATA_HEX},
+    [CPLD_SYSTEM_LED_FAN]                       = {CPLD_SYSTEM_LED_SYS_FAN_REG                   , MASK_1111_0000, DATA_HEX},
+    [CPLD_SYSTEM_LED_PSU_0]                     = {CPLD_SYSTEM_LED_PSU_REG                       , MASK_0000_1111, DATA_HEX},
+    [CPLD_SYSTEM_LED_PSU_1]                     = {CPLD_SYSTEM_LED_PSU_REG                       , MASK_1111_0000, DATA_HEX},
+    [CPLD_SYSTEM_LED_SYNC]                      = {CPLD_SYSTEM_LED_SYNC_ID_REG                   , MASK_0000_1111, DATA_HEX},
+    [CPLD_SYSTEM_LED_ID]                        = {CPLD_SYSTEM_LED_SYNC_ID_REG                   , MASK_1110_0000, DATA_HEX},
+    [CPLD_MGMT_PORT_0_LED_STATUS]               = {CPLD_SFP_PORT_0_1_LED_REG                     , MASK_0000_1101, DATA_DEC},
+    [CPLD_MGMT_PORT_0_LED_SPEED]                = {CPLD_SFP_PORT_0_1_LED_REG                     , MASK_0000_0010, DATA_DEC},
+    [CPLD_MGMT_PORT_1_LED_STATUS]               = {CPLD_SFP_PORT_0_1_LED_REG                     , MASK_1101_0000, DATA_DEC},
+    [CPLD_MGMT_PORT_1_LED_SPEED]                = {CPLD_SFP_PORT_0_1_LED_REG                     , MASK_0010_0000, DATA_DEC},
+    [CPLD_PORT_LED_CLR]                         = {CPLD_PORT_LED_CLR_REG                         , MASK_0000_0001, DATA_DEC},
+    [CPLD_MISC_PWR]                             = {CPLD_MISC_PWR_REG                             , MASK_ALL      , DATA_HEX},
+    [DBG_CPLD_MAC_INTR]                         = {DBG_CPLD_MAC_INTR_REG                         , MASK_ALL      , DATA_HEX},
+    [DBG_CPLD_CPLDX_INTR]                       = {DBG_CPLD_CPLDX_INTR_REG                       , MASK_ALL      , DATA_HEX},
+    [DBG_CPLD_MAC_THERMAL_INTR]                 = {DBG_CPLD_THERMAL_INTR_REG                     , MASK_ALL      , DATA_HEX},
+    [DBG_CPLD_MISC_INTR]                        = {DBG_CPLD_MISC_INTR_REG                        , MASK_ALL      , DATA_HEX},
+
+    // CPLD 2
+    [CPLD_OSFP_PORT_0_7_16_23_INTR]             = {CPLD_OSFP_PORT_0_7_16_23_INTR_REG             , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_8_15_24_31_INTR]            = {CPLD_OSFP_PORT_8_15_24_31_INTR_REG            , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_39_48_55_INTR]           = {CPLD_OSFP_PORT_32_39_48_55_INTR_REG           , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_40_47_56_63_INTR]           = {CPLD_OSFP_PORT_40_47_56_63_INTR_REG           , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_7_16_23_PRES]             = {CPLD_OSFP_PORT_0_7_16_23_PRES_REG             , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_8_15_24_31_PRES]            = {CPLD_OSFP_PORT_8_15_24_31_PRES_REG            , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_39_48_55_PRES]           = {CPLD_OSFP_PORT_32_39_48_55_PRES_REG           , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_40_47_56_63_PRES]           = {CPLD_OSFP_PORT_40_47_56_63_PRES_REG           , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_15_16_31_FUSE]            = {CPLD_OSFP_PORT_0_15_16_31_FUSE_REG            , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_47_48_63_FUSE]           = {CPLD_OSFP_PORT_32_47_48_63_FUSE_REG           , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_7_16_23_STUCK]            = {CPLD_OSFP_PORT_0_7_16_23_STUCK_REG            , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_8_15_24_31_STUCK]           = {CPLD_OSFP_PORT_8_15_24_31_STUCK_REG           , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_39_48_55_STUCK]          = {CPLD_OSFP_PORT_32_39_48_55_STUCK_REG          , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_40_47_56_63_STUCK]          = {CPLD_OSFP_PORT_40_47_56_63_STUCK_REG          , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_7_16_23_INTR_MASK]        = {CPLD_OSFP_PORT_0_7_16_23_INTR_MASK_REG        , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_8_15_24_31_INTR_MASK]       = {CPLD_OSFP_PORT_8_15_24_31_INTR_MASK_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_39_48_55_INTR_MASK]      = {CPLD_OSFP_PORT_32_39_48_55_INTR_MASK_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_40_47_56_63_INTR_MASK]      = {CPLD_OSFP_PORT_40_47_56_63_INTR_MASK_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_7_16_23_PRES_MASK]        = {CPLD_OSFP_PORT_0_7_16_23_PRES_MASK_REG        , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_8_15_24_31_PRES_MASK]       = {CPLD_OSFP_PORT_8_15_24_31_PRES_MASK_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_39_48_55_PRES_MASK]      = {CPLD_OSFP_PORT_32_39_48_55_PRES_MASK_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_40_47_56_63_PRES_MASK]      = {CPLD_OSFP_PORT_40_47_56_63_PRES_MASK_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_15_16_31_FUSE_MASK]       = {CPLD_OSFP_PORT_0_15_16_31_FUSE_MASK_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_47_48_63_FUSE_MASK]      = {CPLD_OSFP_PORT_32_47_48_63_FUSE_MASK_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_7_16_23_STUCK_MASK]       = {CPLD_OSFP_PORT_0_7_16_23_STUCK_MASK_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_8_15_24_31_STUCK_MASK]      = {CPLD_OSFP_PORT_8_15_24_31_STUCK_MASK_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_39_48_55_STUCK_MASK]     = {CPLD_OSFP_PORT_32_39_48_55_STUCK_MASK_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_40_47_56_63_STUCK_MASK]     = {CPLD_OSFP_PORT_40_47_56_63_STUCK_MASK_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_7_16_23_INTR_EVENT]       = {CPLD_OSFP_PORT_0_7_16_23_INTR_EVENT_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_8_15_24_31_INTR_EVENT]      = {CPLD_OSFP_PORT_8_15_24_31_INTR_EVENT_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_39_48_55_INTR_EVENT]     = {CPLD_OSFP_PORT_32_39_48_55_INTR_EVENT_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_40_47_56_63_INTR_EVENT]     = {CPLD_OSFP_PORT_40_47_56_63_INTR_EVENT_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_7_16_23_PRES_EVENT]       = {CPLD_OSFP_PORT_0_7_16_23_PRES_EVENT_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_8_15_24_31_PRES_EVENT]      = {CPLD_OSFP_PORT_8_15_24_31_PRES_EVENT_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_39_48_55_PRES_EVENT]     = {CPLD_OSFP_PORT_32_39_48_55_PRES_EVENT_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_40_47_56_63_PRES_EVENT]     = {CPLD_OSFP_PORT_40_47_56_63_PRES_EVENT_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_15_16_31_FUSE_EVENT]      = {CPLD_OSFP_PORT_0_15_16_31_FUSE_EVENT_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_47_48_63_FUSE_EVENT]     = {CPLD_OSFP_PORT_32_47_48_63_FUSE_EVENT_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT]      = {CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG      , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT]     = {CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG     , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT]    = {CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT]    = {CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG    , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_7_16_23_RST]              = {CPLD_OSFP_PORT_0_7_16_23_RST_REG              , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_8_15_24_31_RST]             = {CPLD_OSFP_PORT_8_15_24_31_RST_REG             , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_39_48_55_RST]            = {CPLD_OSFP_PORT_32_39_48_55_RST_REG            , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_40_47_56_63_RST]            = {CPLD_OSFP_PORT_40_47_56_63_RST_REG            , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_0_7_16_23_LPMODE]           = {CPLD_OSFP_PORT_0_7_16_23_LPMODE_REG           , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_8_15_24_31_LPMODE]          = {CPLD_OSFP_PORT_8_15_24_31_LPMODE_REG          , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_32_39_48_55_LPMODE]         = {CPLD_OSFP_PORT_32_39_48_55_LPMODE_REG         , MASK_ALL      , DATA_HEX},
+    [CPLD_OSFP_PORT_40_47_56_63_LPMODE]         = {CPLD_OSFP_PORT_40_47_56_63_LPMODE_REG         , MASK_ALL      , DATA_HEX},
+    [CPLD_I2C_CONTROL]                          = {CPLD_I2C_CONTROL_REG                          , MASK_ALL      , DATA_HEX},
+    [CPLD_I2C_RELAY]                            = {CPLD_I2C_RELAY_REG                            , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_OSFP_PORT_0_7_16_23_INTR]         = {CPLD_DBG_OSFP_PORT_0_7_16_23_INTR_REG         , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_OSFP_PORT_8_15_24_31_INTR]        = {CPLD_DBG_OSFP_PORT_8_15_24_31_INTR_REG        , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_OSFP_PORT_32_39_48_55_INTR]       = {CPLD_DBG_OSFP_PORT_32_39_48_55_INTR_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_OSFP_PORT_40_47_56_63_INTR]       = {CPLD_DBG_OSFP_PORT_40_47_56_63_INTR_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_OSFP_PORT_0_7_16_23_PRES]         = {CPLD_DBG_OSFP_PORT_0_7_16_23_PRES_REG         , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_OSFP_PORT_8_15_24_31_PRES]        = {CPLD_DBG_OSFP_PORT_8_15_24_31_PRES_REG        , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_OSFP_PORT_32_39_48_55_PRES]       = {CPLD_DBG_OSFP_PORT_32_39_48_55_PRES_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_OSFP_PORT_40_47_56_63_PRES]       = {CPLD_DBG_OSFP_PORT_40_47_56_63_PRES_REG       , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_OSFP_PORT_0_15_16_31_FUSE]        = {CPLD_DBG_OSFP_PORT_0_15_16_31_FUSE_REG        , MASK_ALL      , DATA_HEX},
+    [CPLD_DBG_OSFP_PORT_32_47_48_63_FUSE]       = {CPLD_DBG_OSFP_PORT_32_47_48_63_FUSE_REG       , MASK_ALL      , DATA_HEX},
+
+    // FPGA
+    [FPGA_MINOR_VER]                            = {FPGA_VERSION_REG                              , MASK_0011_1111, DATA_DEC},
+    [FPGA_MAJOR_VER]                            = {FPGA_VERSION_REG                              , MASK_1100_0000, DATA_DEC},
+    [FPGA_BUILD]                                = {FPGA_BUILD_REG                                , MASK_ALL      , DATA_DEC},
+    [FPGA_VERSION_H]                            = {NONE_REG                                      , MASK_NONE     , DATA_UNK},
+    [FPGA_CHIP]                                 = {FPGA_CHIP_REG                                 , MASK_ALL      , DATA_DEC},
+    [FPGA_MGMT_PORT_0_1_TX_RATE_SEL]            = {FPGA_MGMT_PORT_0_1_TX_RATE_SEL_REG            , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_RX_RATE_SEL]            = {FPGA_MGMT_PORT_0_1_RX_RATE_SEL_REG            , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_TX_DIS]                 = {FPGA_MGMT_PORT_0_1_TX_DIS_REG                 , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_TX_FAULT]               = {FPGA_MGMT_PORT_0_1_TX_FAULT_REG               , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_RX_LOS]                 = {FPGA_MGMT_PORT_0_1_RX_LOS_REG                 , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_PRES]                   = {FPGA_MGMT_PORT_0_1_PRES_REG                   , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_STUCK]                  = {FPGA_MGMT_PORT_0_1_STUCK_REG                  , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_TX_FAULT_MASK]          = {FPGA_MGMT_PORT_0_1_TX_FAULT_MASK_REG          , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_RX_LOS_MASK]            = {FPGA_MGMT_PORT_0_1_RX_LOS_MASK_REG            , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_PRES_MASK]              = {FPGA_MGMT_PORT_0_1_PRES_MASK_REG              , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_STUCK_MASK]             = {FPGA_MGMT_PORT_0_1_STUCK_MASK_REG             , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT]         = {FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT_REG         , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_RX_LOS_EVENT]           = {FPGA_MGMT_PORT_0_1_RX_LOS_EVENT_REG           , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_PRES_EVENT]             = {FPGA_MGMT_PORT_0_1_PRES_EVENT_REG             , MASK_ALL      , DATA_HEX},
+    [FPGA_MGMT_PORT_0_1_STUCK_EVENT]            = {FPGA_MGMT_PORT_0_1_STUCK_EVENT_REG            , MASK_ALL      , DATA_HEX},
+    [FPGA_EVT_CTRL]                             = {FPGA_EVT_CTRL_REG                             , MASK_ALL      , DATA_HEX},
+    [FPGA_LAN_PORT_RELAY]                       = {FPGA_LAN_PORT_RELAY_REG                       , MASK_ALL      , DATA_HEX},
+
+    // MUX
+    [IDLE_STATE]                                = {NONE_REG                                      , MASK_NONE     , DATA_UNK},
+
+    //BSP DEBUG
+    [BSP_DEBUG]                                 = {NONE_REG                                      , MASK_NONE     , DATA_UNK},
+};
+
+enum bsp_log_types {
+    LOG_NONE,
+    LOG_RW,
+    LOG_READ,
+    LOG_WRITE
+};
+
+enum bsp_log_ctrl {
+    LOG_DISABLE,
+    LOG_ENABLE
+};
+
+/* CPLD sysfs attributes hook functions  */
+static ssize_t cpld_show(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t cpld_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t cpld_reg_read(struct device *dev, u8 *reg_val, u8 reg, u8 mask);
+static ssize_t cpld_reg_write(struct device *dev, u8 reg_val, size_t count, u8 reg, u8 mask);
+static ssize_t bsp_read(char *buf, char *str);
+static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count);
+static ssize_t bsp_callback_show(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t bsp_callback_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t version_h_show(struct device *dev, struct device_attribute *da, char *buf);
+static ssize_t led_show(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t led_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+
+static LIST_HEAD(cpld_client_list);  /* client list for cpld */
+static struct mutex list_lock;  /* mutex for client list */
+
+struct cpld_client_node {
+    struct i2c_client *client;
+    struct list_head   list;
+};
+
+/* CPLD device id and data */
+static const struct i2c_device_id cpld_id[] = {
+    { "s9321_64eo_cpld1",  cpld1 },
+    { "s9321_64eo_cpld2",  cpld2 },
+    { "s9321_64eo_cpld3",  cpld3 },
+    { "s9321_64eo_fpga",   fpga },
+    {}
+};
+
+char bsp_debug[2]="0";
+u8 enable_log_read=LOG_DISABLE;
+u8 enable_log_write=LOG_DISABLE;
+
+/* Addresses scanned for cpld */
+static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, 0x37, I2C_CLIENT_END };
+
+/* define all support register access of cpld in attribute */
+
+// CPLD Common
+static SENSOR_DEVICE_ATTR_RO(cpld_minor_ver                , cpld, CPLD_MINOR_VER);
+static SENSOR_DEVICE_ATTR_RO(cpld_major_ver                , cpld, CPLD_MAJOR_VER);
+static SENSOR_DEVICE_ATTR_RO(cpld_id                       , cpld, CPLD_ID);
+static SENSOR_DEVICE_ATTR_RO(cpld_build_ver                , cpld, CPLD_BUILD_VER);
+static SENSOR_DEVICE_ATTR_RO(cpld_version_h                , version_h, CPLD_VERSION_H);
+static SENSOR_DEVICE_ATTR_RW(cpld_evt_ctrl                 , cpld, CPLD_EVT_CTRL);
+
+// CPLD 1
+static SENSOR_DEVICE_ATTR_RO(cpld_board_id_0               , cpld, CPLD_BOARD_ID_0);
+static SENSOR_DEVICE_ATTR_RO(cpld_board_id_1               , cpld, CPLD_BOARD_ID_1);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_intr                 , cpld, CPLD_MAC_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_phy_intr                 , cpld, CPLD_PHY_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_cpldx_intr               , cpld, CPLD_CPLDX_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_thermal_intr         , cpld, CPLD_MAC_THERMAL_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_misc_intr                , cpld, CPLD_MISC_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_cpu_intr                 , cpld, CPLD_CPU_INTR);
+static SENSOR_DEVICE_ATTR_RW(cpld_mac_mask                 , cpld, CPLD_MAC_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_phy_mask                 , cpld, CPLD_PHY_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_cpldx_mask               , cpld, CPLD_CPLDX_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_mac_thermal_mask         , cpld, CPLD_MAC_THERMAL_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_misc_mask                , cpld, CPLD_MISC_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_cpu_mask                 , cpld, CPLD_CPU_MASK);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_evt                  , cpld, CPLD_MAC_EVT);
+static SENSOR_DEVICE_ATTR_RO(cpld_phy_evt                  , cpld, CPLD_PHY_EVT);
+static SENSOR_DEVICE_ATTR_RO(cpld_cpldx_evt                , cpld, CPLD_CPLDX_EVT);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_thermal_evt          , cpld, CPLD_MAC_THERMAL_EVT);
+static SENSOR_DEVICE_ATTR_RO(cpld_misc_evt                 , cpld, CPLD_MISC_EVT);
+static SENSOR_DEVICE_ATTR_RW(cpld_mac_reset                , cpld, CPLD_MAC_RESET);
+static SENSOR_DEVICE_ATTR_RW(cpld_bmc_reset                , cpld, CPLD_BMC_RESET);
+static SENSOR_DEVICE_ATTR_RW(cpld_usb_reset                , cpld, CPLD_USB_RESET);
+static SENSOR_DEVICE_ATTR_RW(cpld_misc_reset               , cpld, CPLD_MISC_RESET);
+static SENSOR_DEVICE_ATTR_RO(cpld_brd_present              , cpld, CPLD_BRD_PRESENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_psu_status               , cpld, CPLD_PSU_STATUS);
+static SENSOR_DEVICE_ATTR_RO(cpld_system_pwr               , cpld, CPLD_SYSTEM_PWR);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_synce                , cpld, CPLD_MAC_SYNCE);
+static SENSOR_DEVICE_ATTR_RO(cpld_mac_rov                  , cpld, CPLD_MAC_ROV);
+static SENSOR_DEVICE_ATTR_RW(cpld_mux_ctrl                 , cpld, CPLD_MUX_CTRL);
+static SENSOR_DEVICE_ATTR_RW(cpld_system_led_sys           , cpld, CPLD_SYSTEM_LED_SYS);
+static SENSOR_DEVICE_ATTR_RW(cpld_system_led_fan           , cpld, CPLD_SYSTEM_LED_FAN);
+static SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_0         , cpld, CPLD_SYSTEM_LED_PSU_0);
+static SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_1         , cpld, CPLD_SYSTEM_LED_PSU_1);
+static SENSOR_DEVICE_ATTR_RW(cpld_system_led_sync          , cpld, CPLD_SYSTEM_LED_SYNC);
+static SENSOR_DEVICE_ATTR_RW(cpld_system_led_id            , cpld, CPLD_SYSTEM_LED_ID);
+static SENSOR_DEVICE_ATTR_RW(cpld_mgmt_port_0_led_status   , led , CPLD_MGMT_PORT_0_LED_STATUS);
+static SENSOR_DEVICE_ATTR_RW(cpld_mgmt_port_0_led_speed    , cpld, CPLD_MGMT_PORT_0_LED_SPEED);
+static SENSOR_DEVICE_ATTR_RW(cpld_mgmt_port_1_led_status   , led , CPLD_MGMT_PORT_1_LED_STATUS);
+static SENSOR_DEVICE_ATTR_RW(cpld_mgmt_port_1_led_speed    , cpld, CPLD_MGMT_PORT_1_LED_SPEED);
+static SENSOR_DEVICE_ATTR_RW(cpld_port_led_clr             , cpld, CPLD_PORT_LED_CLR);
+static SENSOR_DEVICE_ATTR_RO(cpld_misc_pwr                 , cpld, CPLD_MISC_PWR);
+static SENSOR_DEVICE_ATTR_RO(dbg_cpld_mac_intr             , cpld, DBG_CPLD_MAC_INTR);
+static SENSOR_DEVICE_ATTR_RO(dbg_cpld_cpldx_intr           , cpld, DBG_CPLD_CPLDX_INTR);
+static SENSOR_DEVICE_ATTR_RO(dbg_cpld_mac_thermal_intr     , cpld, DBG_CPLD_MAC_THERMAL_INTR);
+static SENSOR_DEVICE_ATTR_RO(dbg_cpld_misc_intr            , cpld, DBG_CPLD_MISC_INTR);
+
+//CPLD 2 and CPLD 3
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_intr_port_0         , cpld, CPLD_OSFP_PORT_0_7_16_23_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_intr_port_1         , cpld, CPLD_OSFP_PORT_8_15_24_31_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_intr_port_2         , cpld, CPLD_OSFP_PORT_32_39_48_55_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_intr_port_3         , cpld, CPLD_OSFP_PORT_40_47_56_63_INTR);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_intr_present_0      , cpld, CPLD_OSFP_PORT_0_7_16_23_PRES);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_intr_present_1      , cpld, CPLD_OSFP_PORT_8_15_24_31_PRES);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_intr_present_2      , cpld, CPLD_OSFP_PORT_32_39_48_55_PRES);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_intr_present_3      , cpld, CPLD_OSFP_PORT_40_47_56_63_PRES);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_intr_fuse_0         , cpld, CPLD_OSFP_PORT_0_15_16_31_FUSE);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_intr_fuse_1         , cpld, CPLD_OSFP_PORT_32_47_48_63_FUSE);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_stuck_0             , cpld, CPLD_OSFP_PORT_0_7_16_23_STUCK);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_stuck_1             , cpld, CPLD_OSFP_PORT_8_15_24_31_STUCK);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_stuck_2             , cpld, CPLD_OSFP_PORT_32_39_48_55_STUCK);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_stuck_3             , cpld, CPLD_OSFP_PORT_40_47_56_63_STUCK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_port_0         , cpld, CPLD_OSFP_PORT_0_7_16_23_INTR_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_port_1         , cpld, CPLD_OSFP_PORT_8_15_24_31_INTR_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_port_2         , cpld, CPLD_OSFP_PORT_32_39_48_55_INTR_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_port_3         , cpld, CPLD_OSFP_PORT_40_47_56_63_INTR_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_present_0      , cpld, CPLD_OSFP_PORT_0_7_16_23_PRES_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_present_1      , cpld, CPLD_OSFP_PORT_8_15_24_31_PRES_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_present_2      , cpld, CPLD_OSFP_PORT_32_39_48_55_PRES_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_present_3      , cpld, CPLD_OSFP_PORT_40_47_56_63_PRES_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_fuse_0         , cpld, CPLD_OSFP_PORT_0_15_16_31_FUSE_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_fuse_1         , cpld, CPLD_OSFP_PORT_32_47_48_63_FUSE_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_stuck_0        , cpld, CPLD_OSFP_PORT_0_7_16_23_STUCK_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_stuck_1        , cpld, CPLD_OSFP_PORT_8_15_24_31_STUCK_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_stuck_2        , cpld, CPLD_OSFP_PORT_32_39_48_55_STUCK_MASK);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_mask_stuck_3        , cpld, CPLD_OSFP_PORT_40_47_56_63_STUCK_MASK);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_port_0          , cpld, CPLD_OSFP_PORT_0_7_16_23_INTR_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_port_1          , cpld, CPLD_OSFP_PORT_8_15_24_31_INTR_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_port_2          , cpld, CPLD_OSFP_PORT_32_39_48_55_INTR_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_port_3          , cpld, CPLD_OSFP_PORT_40_47_56_63_INTR_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_present_0       , cpld, CPLD_OSFP_PORT_0_7_16_23_PRES_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_present_1       , cpld, CPLD_OSFP_PORT_8_15_24_31_PRES_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_present_2       , cpld, CPLD_OSFP_PORT_32_39_48_55_PRES_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_present_3       , cpld, CPLD_OSFP_PORT_40_47_56_63_PRES_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_fuse_0          , cpld, CPLD_OSFP_PORT_0_15_16_31_FUSE_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_fuse_1          , cpld, CPLD_OSFP_PORT_32_47_48_63_FUSE_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_stuck_0         , cpld, CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_stuck_1         , cpld, CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_stuck_2         , cpld, CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT);
+static SENSOR_DEVICE_ATTR_RO(cpld_osfp_evt_stuck_3         , cpld, CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_reset_0             , cpld, CPLD_OSFP_PORT_0_7_16_23_RST);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_reset_1             , cpld, CPLD_OSFP_PORT_8_15_24_31_RST);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_reset_2             , cpld, CPLD_OSFP_PORT_32_39_48_55_RST);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_reset_3             , cpld, CPLD_OSFP_PORT_40_47_56_63_RST);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_lpmode_0            , cpld, CPLD_OSFP_PORT_0_7_16_23_LPMODE);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_lpmode_1            , cpld, CPLD_OSFP_PORT_8_15_24_31_LPMODE);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_lpmode_2            , cpld, CPLD_OSFP_PORT_32_39_48_55_LPMODE);
+static SENSOR_DEVICE_ATTR_RW(cpld_osfp_lpmode_3            , cpld, CPLD_OSFP_PORT_40_47_56_63_LPMODE);
+static SENSOR_DEVICE_ATTR_RW(cpld_i2c_ctrl                 , cpld, CPLD_I2C_CONTROL);
+static SENSOR_DEVICE_ATTR_RW(cpld_i2c_relay                , cpld, CPLD_I2C_RELAY);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_osfp_intr_port_0     , cpld, CPLD_DBG_OSFP_PORT_0_7_16_23_INTR);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_osfp_intr_port_1     , cpld, CPLD_DBG_OSFP_PORT_8_15_24_31_INTR);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_osfp_intr_port_2     , cpld, CPLD_DBG_OSFP_PORT_32_39_48_55_INTR);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_osfp_intr_port_3     , cpld, CPLD_DBG_OSFP_PORT_40_47_56_63_INTR);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_osfp_intr_present_0  , cpld, CPLD_DBG_OSFP_PORT_0_7_16_23_PRES);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_osfp_intr_present_1  , cpld, CPLD_DBG_OSFP_PORT_8_15_24_31_PRES);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_osfp_intr_present_2  , cpld, CPLD_DBG_OSFP_PORT_32_39_48_55_PRES);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_osfp_intr_present_3  , cpld, CPLD_DBG_OSFP_PORT_40_47_56_63_PRES);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_osfp_intr_fuse_0     , cpld, CPLD_DBG_OSFP_PORT_0_15_16_31_FUSE);
+static SENSOR_DEVICE_ATTR_RW(dbg_cpld_osfp_intr_fuse_1     , cpld, CPLD_DBG_OSFP_PORT_32_47_48_63_FUSE);
+
+// FPGA
+static SENSOR_DEVICE_ATTR_RO(fpga_minor_ver                , cpld, FPGA_MINOR_VER);
+static SENSOR_DEVICE_ATTR_RO(fpga_major_ver                , cpld, FPGA_MAJOR_VER);
+static SENSOR_DEVICE_ATTR_RO(fpga_build_ver                , cpld, FPGA_BUILD);
+static SENSOR_DEVICE_ATTR_RO(fpga_version_h                , version_h, FPGA_VERSION_H);
+static SENSOR_DEVICE_ATTR_RO(fpga_id                       , cpld, FPGA_CHIP);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_tx_rate_cap        , cpld, FPGA_MGMT_PORT_0_1_TX_RATE_SEL);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_rx_rate_cap        , cpld, FPGA_MGMT_PORT_0_1_RX_RATE_SEL);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_tx_dis             , cpld, FPGA_MGMT_PORT_0_1_TX_DIS);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_tx_fault           , cpld, FPGA_MGMT_PORT_0_1_TX_FAULT);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_rx_los             , cpld, FPGA_MGMT_PORT_0_1_RX_LOS);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_intr_present       , cpld, FPGA_MGMT_PORT_0_1_PRES);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_stuck              , cpld, FPGA_MGMT_PORT_0_1_STUCK);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_mask_tx_fault      , cpld, FPGA_MGMT_PORT_0_1_TX_FAULT_MASK);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_mask_rx_los        , cpld, FPGA_MGMT_PORT_0_1_RX_LOS_MASK);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_mask_present       , cpld, FPGA_MGMT_PORT_0_1_PRES_MASK);
+static SENSOR_DEVICE_ATTR_RW(fpga_sfp28_mask_stuck         , cpld, FPGA_MGMT_PORT_0_1_STUCK_MASK);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_evt_tx_fault       , cpld, FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_evt_rx_los         , cpld, FPGA_MGMT_PORT_0_1_RX_LOS_EVENT);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_evt_present        , cpld, FPGA_MGMT_PORT_0_1_PRES_EVENT);
+static SENSOR_DEVICE_ATTR_RO(fpga_sfp28_evt_stuck          , cpld, FPGA_MGMT_PORT_0_1_STUCK_EVENT);
+static SENSOR_DEVICE_ATTR_RW(fpga_evt_ctrl                 , cpld, FPGA_EVT_CTRL);
+static SENSOR_DEVICE_ATTR_RO(fpga_lan_port_relay           , cpld, FPGA_LAN_PORT_RELAY);
+
+//BSP DEBUG
+static SENSOR_DEVICE_ATTR_RW(bsp_debug, bsp_callback, BSP_DEBUG);
+
+//MUX
+static SENSOR_DEVICE_ATTR_RW(idle_state, idle_state, IDLE_STATE);
+
+/* define support attributes of cpldx */
+
+/* cpld 1 */
+static struct attribute *cpld1_attributes[] = {
+     // CPLD Common
+    _DEVICE_ATTR(cpld_minor_ver),
+    _DEVICE_ATTR(cpld_major_ver),
+    _DEVICE_ATTR(cpld_id),
+    _DEVICE_ATTR(cpld_build_ver),
+    _DEVICE_ATTR(cpld_version_h),
+    _DEVICE_ATTR(cpld_evt_ctrl),
+
+    // CPLD 1
+    _DEVICE_ATTR(cpld_board_id_0),
+    _DEVICE_ATTR(cpld_board_id_1),
+    _DEVICE_ATTR(cpld_mac_intr),
+    _DEVICE_ATTR(cpld_phy_intr),
+    _DEVICE_ATTR(cpld_cpldx_intr),
+    _DEVICE_ATTR(cpld_mac_thermal_intr),
+    _DEVICE_ATTR(cpld_misc_intr),
+    _DEVICE_ATTR(cpld_cpu_intr),
+    _DEVICE_ATTR(cpld_mac_mask),
+    _DEVICE_ATTR(cpld_phy_mask),
+    _DEVICE_ATTR(cpld_cpldx_mask),
+    _DEVICE_ATTR(cpld_mac_thermal_mask),
+    _DEVICE_ATTR(cpld_misc_mask),
+    _DEVICE_ATTR(cpld_cpu_mask),
+    _DEVICE_ATTR(cpld_mac_evt),
+    _DEVICE_ATTR(cpld_phy_evt),
+    _DEVICE_ATTR(cpld_cpldx_evt),
+    _DEVICE_ATTR(cpld_mac_thermal_evt),
+    _DEVICE_ATTR(cpld_misc_evt),
+    _DEVICE_ATTR(cpld_mac_reset),
+    _DEVICE_ATTR(cpld_bmc_reset),
+    _DEVICE_ATTR(cpld_usb_reset),
+    _DEVICE_ATTR(cpld_misc_reset),
+    _DEVICE_ATTR(cpld_brd_present),
+    _DEVICE_ATTR(cpld_psu_status),
+    _DEVICE_ATTR(cpld_system_pwr),
+    _DEVICE_ATTR(cpld_mac_synce),
+    _DEVICE_ATTR(cpld_mac_rov),
+    _DEVICE_ATTR(cpld_mux_ctrl),
+    _DEVICE_ATTR(cpld_system_led_sys),
+    _DEVICE_ATTR(cpld_system_led_fan),
+    _DEVICE_ATTR(cpld_system_led_psu_0),
+    _DEVICE_ATTR(cpld_system_led_psu_1),
+    _DEVICE_ATTR(cpld_system_led_sync),
+    _DEVICE_ATTR(cpld_system_led_id),
+    _DEVICE_ATTR(cpld_mgmt_port_0_led_status),
+    _DEVICE_ATTR(cpld_mgmt_port_0_led_speed),
+    _DEVICE_ATTR(cpld_mgmt_port_1_led_status),
+    _DEVICE_ATTR(cpld_mgmt_port_1_led_speed),
+    _DEVICE_ATTR(cpld_port_led_clr),
+    _DEVICE_ATTR(cpld_misc_pwr),
+    _DEVICE_ATTR(dbg_cpld_mac_intr),
+    _DEVICE_ATTR(dbg_cpld_cpldx_intr),
+    _DEVICE_ATTR(dbg_cpld_mac_thermal_intr),
+    _DEVICE_ATTR(dbg_cpld_misc_intr),
+    _DEVICE_ATTR(bsp_debug),
+    NULL
+};
+
+/* cpld 2 */
+static struct attribute *cpld2_attributes[] = {
+     // CPLD Common
+    _DEVICE_ATTR(cpld_minor_ver),
+    _DEVICE_ATTR(cpld_major_ver),
+    _DEVICE_ATTR(cpld_id),
+    _DEVICE_ATTR(cpld_build_ver),
+    _DEVICE_ATTR(cpld_version_h),
+    _DEVICE_ATTR(cpld_evt_ctrl),
+
+    // CPLD 2
+    _DEVICE_ATTR(cpld_osfp_intr_port_0),
+    _DEVICE_ATTR(cpld_osfp_intr_port_1),
+    _DEVICE_ATTR(cpld_osfp_intr_port_2),
+    _DEVICE_ATTR(cpld_osfp_intr_port_3),
+    _DEVICE_ATTR(cpld_osfp_intr_present_0),
+    _DEVICE_ATTR(cpld_osfp_intr_present_1),
+    _DEVICE_ATTR(cpld_osfp_intr_present_2),
+    _DEVICE_ATTR(cpld_osfp_intr_present_3),
+    _DEVICE_ATTR(cpld_osfp_intr_fuse_0),
+    _DEVICE_ATTR(cpld_osfp_intr_fuse_1),
+    _DEVICE_ATTR(cpld_osfp_stuck_0),
+    _DEVICE_ATTR(cpld_osfp_stuck_1),
+    _DEVICE_ATTR(cpld_osfp_stuck_2),
+    _DEVICE_ATTR(cpld_osfp_stuck_3),
+    _DEVICE_ATTR(cpld_osfp_mask_port_0),
+    _DEVICE_ATTR(cpld_osfp_mask_port_1),
+    _DEVICE_ATTR(cpld_osfp_mask_port_2),
+    _DEVICE_ATTR(cpld_osfp_mask_port_3),
+    _DEVICE_ATTR(cpld_osfp_mask_present_0),
+    _DEVICE_ATTR(cpld_osfp_mask_present_1),
+    _DEVICE_ATTR(cpld_osfp_mask_present_2),
+    _DEVICE_ATTR(cpld_osfp_mask_present_3),
+    _DEVICE_ATTR(cpld_osfp_mask_fuse_0),
+    _DEVICE_ATTR(cpld_osfp_mask_fuse_1),
+    _DEVICE_ATTR(cpld_osfp_mask_stuck_0),
+    _DEVICE_ATTR(cpld_osfp_mask_stuck_1),
+    _DEVICE_ATTR(cpld_osfp_mask_stuck_2),
+    _DEVICE_ATTR(cpld_osfp_mask_stuck_3),
+    _DEVICE_ATTR(cpld_osfp_evt_port_0),
+    _DEVICE_ATTR(cpld_osfp_evt_port_1),
+    _DEVICE_ATTR(cpld_osfp_evt_port_2),
+    _DEVICE_ATTR(cpld_osfp_evt_port_3),
+    _DEVICE_ATTR(cpld_osfp_evt_present_0),
+    _DEVICE_ATTR(cpld_osfp_evt_present_1),
+    _DEVICE_ATTR(cpld_osfp_evt_present_2),
+    _DEVICE_ATTR(cpld_osfp_evt_present_3),
+    _DEVICE_ATTR(cpld_osfp_evt_fuse_0),
+    _DEVICE_ATTR(cpld_osfp_evt_fuse_1),
+    _DEVICE_ATTR(cpld_osfp_evt_stuck_0),
+    _DEVICE_ATTR(cpld_osfp_evt_stuck_1),
+    _DEVICE_ATTR(cpld_osfp_evt_stuck_2),
+    _DEVICE_ATTR(cpld_osfp_evt_stuck_3),
+    _DEVICE_ATTR(cpld_osfp_reset_0),
+    _DEVICE_ATTR(cpld_osfp_reset_1),
+    _DEVICE_ATTR(cpld_osfp_reset_2),
+    _DEVICE_ATTR(cpld_osfp_reset_3),
+    _DEVICE_ATTR(cpld_osfp_lpmode_0),
+    _DEVICE_ATTR(cpld_osfp_lpmode_1),
+    _DEVICE_ATTR(cpld_osfp_lpmode_2),
+    _DEVICE_ATTR(cpld_osfp_lpmode_3),
+    _DEVICE_ATTR(cpld_i2c_ctrl),
+    _DEVICE_ATTR(cpld_i2c_relay),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_port_0),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_port_1),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_port_2),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_port_3),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_present_0),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_present_1),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_present_2),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_present_3),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_fuse_0),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_fuse_1),
+    NULL
+};
+
+/* cpld 3 */
+static struct attribute *cpld3_attributes[] = {
+     // CPLD Common
+    _DEVICE_ATTR(cpld_minor_ver),
+    _DEVICE_ATTR(cpld_major_ver),
+    _DEVICE_ATTR(cpld_id),
+    _DEVICE_ATTR(cpld_build_ver),
+    _DEVICE_ATTR(cpld_version_h),
+    _DEVICE_ATTR(cpld_evt_ctrl),
+
+    // CPLD 3
+    _DEVICE_ATTR(cpld_osfp_intr_port_0),
+    _DEVICE_ATTR(cpld_osfp_intr_port_1),
+    _DEVICE_ATTR(cpld_osfp_intr_port_2),
+    _DEVICE_ATTR(cpld_osfp_intr_port_3),
+    _DEVICE_ATTR(cpld_osfp_intr_present_0),
+    _DEVICE_ATTR(cpld_osfp_intr_present_1),
+    _DEVICE_ATTR(cpld_osfp_intr_present_2),
+    _DEVICE_ATTR(cpld_osfp_intr_present_3),
+    _DEVICE_ATTR(cpld_osfp_intr_fuse_0),
+    _DEVICE_ATTR(cpld_osfp_intr_fuse_1),
+    _DEVICE_ATTR(cpld_osfp_stuck_0),
+    _DEVICE_ATTR(cpld_osfp_stuck_1),
+    _DEVICE_ATTR(cpld_osfp_stuck_2),
+    _DEVICE_ATTR(cpld_osfp_stuck_3),
+    _DEVICE_ATTR(cpld_osfp_mask_port_0),
+    _DEVICE_ATTR(cpld_osfp_mask_port_1),
+    _DEVICE_ATTR(cpld_osfp_mask_port_2),
+    _DEVICE_ATTR(cpld_osfp_mask_port_3),
+    _DEVICE_ATTR(cpld_osfp_mask_present_0),
+    _DEVICE_ATTR(cpld_osfp_mask_present_1),
+    _DEVICE_ATTR(cpld_osfp_mask_present_2),
+    _DEVICE_ATTR(cpld_osfp_mask_present_3),
+    _DEVICE_ATTR(cpld_osfp_mask_fuse_0),
+    _DEVICE_ATTR(cpld_osfp_mask_fuse_1),
+    _DEVICE_ATTR(cpld_osfp_mask_stuck_0),
+    _DEVICE_ATTR(cpld_osfp_mask_stuck_1),
+    _DEVICE_ATTR(cpld_osfp_mask_stuck_2),
+    _DEVICE_ATTR(cpld_osfp_mask_stuck_3),
+    _DEVICE_ATTR(cpld_osfp_evt_port_0),
+    _DEVICE_ATTR(cpld_osfp_evt_port_1),
+    _DEVICE_ATTR(cpld_osfp_evt_port_2),
+    _DEVICE_ATTR(cpld_osfp_evt_port_3),
+    _DEVICE_ATTR(cpld_osfp_evt_present_0),
+    _DEVICE_ATTR(cpld_osfp_evt_present_1),
+    _DEVICE_ATTR(cpld_osfp_evt_present_2),
+    _DEVICE_ATTR(cpld_osfp_evt_present_3),
+    _DEVICE_ATTR(cpld_osfp_evt_fuse_0),
+    _DEVICE_ATTR(cpld_osfp_evt_fuse_1),
+    _DEVICE_ATTR(cpld_osfp_evt_stuck_0),
+    _DEVICE_ATTR(cpld_osfp_evt_stuck_1),
+    _DEVICE_ATTR(cpld_osfp_evt_stuck_2),
+    _DEVICE_ATTR(cpld_osfp_evt_stuck_3),
+    _DEVICE_ATTR(cpld_osfp_reset_0),
+    _DEVICE_ATTR(cpld_osfp_reset_1),
+    _DEVICE_ATTR(cpld_osfp_reset_2),
+    _DEVICE_ATTR(cpld_osfp_reset_3),
+    _DEVICE_ATTR(cpld_osfp_lpmode_0),
+    _DEVICE_ATTR(cpld_osfp_lpmode_1),
+    _DEVICE_ATTR(cpld_osfp_lpmode_2),
+    _DEVICE_ATTR(cpld_osfp_lpmode_3),
+    _DEVICE_ATTR(cpld_i2c_ctrl),
+    _DEVICE_ATTR(cpld_i2c_relay),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_port_0),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_port_1),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_port_2),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_port_3),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_present_0),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_present_1),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_present_2),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_present_3),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_fuse_0),
+    _DEVICE_ATTR(dbg_cpld_osfp_intr_fuse_1),
+    NULL
+};
+
+/* fpga */
+static struct attribute *fpga_attributes[] = {
+    // FPGA
+    _DEVICE_ATTR(fpga_minor_ver),
+    _DEVICE_ATTR(fpga_major_ver),
+    _DEVICE_ATTR(fpga_build_ver),
+    _DEVICE_ATTR(fpga_version_h),
+    _DEVICE_ATTR(fpga_id),
+    _DEVICE_ATTR(fpga_sfp28_tx_rate_cap),
+    _DEVICE_ATTR(fpga_sfp28_rx_rate_cap),
+    _DEVICE_ATTR(fpga_sfp28_tx_dis),
+    _DEVICE_ATTR(fpga_sfp28_tx_fault),
+    _DEVICE_ATTR(fpga_sfp28_rx_los),
+    _DEVICE_ATTR(fpga_sfp28_intr_present),
+    _DEVICE_ATTR(fpga_sfp28_stuck),
+    _DEVICE_ATTR(fpga_sfp28_mask_tx_fault),
+    _DEVICE_ATTR(fpga_sfp28_mask_rx_los),
+    _DEVICE_ATTR(fpga_sfp28_mask_present),
+    _DEVICE_ATTR(fpga_sfp28_mask_stuck),
+    _DEVICE_ATTR(fpga_sfp28_evt_present),
+    _DEVICE_ATTR(fpga_sfp28_evt_tx_fault),
+    _DEVICE_ATTR(fpga_sfp28_evt_rx_los),
+    _DEVICE_ATTR(fpga_sfp28_evt_stuck),
+    _DEVICE_ATTR(fpga_evt_ctrl),
+    _DEVICE_ATTR(fpga_lan_port_relay),
+    NULL
+};
+
+/* cpld 1 attributes group */
+static const struct attribute_group cpld1_group = {
+    .attrs = cpld1_attributes,
+};
+
+/* cpld 2 attributes group */
+static const struct attribute_group cpld2_group = {
+    .attrs = cpld2_attributes,
+};
+
+/* cpld 3 attributes group */
+static const struct attribute_group cpld3_group = {
+    .attrs = cpld3_attributes,
+};
+
+/* fpga attributes group */
+static const struct attribute_group fpga_group = {
+    .attrs = fpga_attributes,
+};
+
+/* reg shift */
+static u8 _shift(u8 mask)
+{
+    int i=0, mask_one=1;
+
+    for(i=0; i<8; ++i) {
+        if ((mask & mask_one) == 1)
+            return i;
+        else
+            mask >>= 1;
+    }
+
+    return -1;
+}
+
+/* reg mask and shift */
+u8 _mask_shift(u8 val, u8 mask)
+{
+    int shift=0;
+
+    shift = _shift(mask);
+
+    return (val & mask) >> shift;
+}
+
+static ssize_t _parse_data(char *buf, unsigned int data, u8 data_type)
+{
+    if(buf == NULL) {
+        return -1;
+    }
+
+    if(data_type == DATA_HEX) {
+        return sprintf(buf, "0x%02x", data);
+    } else if(data_type == DATA_DEC) {
+        return sprintf(buf, "%u", data);
+    } else {
+        return -1;
+    }
+    return 0;
+}
+
+static int _bsp_log(u8 log_type, char *fmt, ...)
+{
+    if ((log_type==LOG_READ  && enable_log_read) ||
+        (log_type==LOG_WRITE && enable_log_write)) {
+        va_list args;
+        int r;
+
+        va_start(args, fmt);
+        r = vprintk(fmt, args);
+        va_end(args);
+
+        return r;
+    } else {
+        return 0;
+    }
+}
+
+static int _config_bsp_log(u8 log_type)
+{
+    switch(log_type) {
+        case LOG_NONE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_RW:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        case LOG_READ:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_WRITE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+static int _store_value_check(int index, u8 reg_val, char **range) {
+    int ret = 0;
+    if(range == NULL) {
+        return -2;
+    }
+
+    switch (index) {
+        case CPLD_MGMT_PORT_0_LED_SPEED:
+        case CPLD_MGMT_PORT_1_LED_SPEED:
+            if(reg_val != 0 && reg_val != 1) {
+                ret = -1;
+            }
+            *range = "0 or 1";
+            break;
+        default:
+            break;
+    }
+
+    return ret;
+}
+
+/* get bsp value */
+static ssize_t bsp_read(char *buf, char *str)
+{
+    ssize_t len=0;
+
+    len=sprintf(buf, "%s", str);
+    BSP_LOG_R("reg_val=%s", str);
+
+    return len;
+}
+
+/* set bsp value */
+static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count)
+{
+    snprintf(str, str_len, "%s", buf);
+    BSP_LOG_W("reg_val=%s", str);
+
+    return count;
+}
+
+/* get bsp parameter value */
+static ssize_t bsp_callback_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+
+    switch (attr->index) {
+        case BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        default:
+            return -EINVAL;
+    }
+    return bsp_read(buf, str);
+}
+
+/* set bsp parameter value */
+static ssize_t bsp_callback_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+    ssize_t ret = 0;
+    u8 bsp_debug_u8 = 0;
+
+    switch (attr->index) {
+        case BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            ret = bsp_write(buf, str, str_len, count);
+
+            if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+                return -EINVAL;
+            } else if (_config_bsp_log(bsp_debug_u8) < 0) {
+                return -EINVAL;
+            }
+            return ret;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+/* get cpld register value */
+static ssize_t cpld_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = 0;
+    u8 mask = MASK_NONE;
+    u8 data_type=DATA_UNK;
+    u8 reg_val = 0;
+    int ret = 0;
+
+    switch (attr->index) {
+        // CPLD Common
+        case CPLD_MINOR_VER:
+        case CPLD_MAJOR_VER:
+        case CPLD_ID:
+        case CPLD_BUILD_VER:
+        case CPLD_EVT_CTRL:
+
+        //CPLD 1
+        case CPLD_BOARD_ID_0:
+        case CPLD_BOARD_ID_1:
+        case CPLD_MAC_INTR:
+        case CPLD_PHY_INTR:
+        case CPLD_CPLDX_INTR:
+        case CPLD_MAC_THERMAL_INTR:
+        case CPLD_MISC_INTR:
+        case CPLD_CPU_INTR:
+        case CPLD_MAC_MASK:
+        case CPLD_PHY_MASK:
+        case CPLD_CPLDX_MASK:
+        case CPLD_MAC_THERMAL_MASK:
+        case CPLD_MISC_MASK:
+        case CPLD_CPU_MASK:
+        case CPLD_MAC_EVT:
+        case CPLD_PHY_EVT:
+        case CPLD_CPLDX_EVT:
+        case CPLD_MAC_THERMAL_EVT:
+        case CPLD_MISC_EVT:
+        case CPLD_MAC_RESET:
+        case CPLD_BMC_RESET:
+        case CPLD_USB_RESET:
+        case CPLD_MISC_RESET:
+        case CPLD_BRD_PRESENT:
+        case CPLD_PSU_STATUS:
+        case CPLD_SYSTEM_PWR:
+        case CPLD_MAC_SYNCE:
+        case CPLD_MAC_ROV:
+        case CPLD_MUX_CTRL:
+        case CPLD_SYSTEM_LED_SYS:
+        case CPLD_SYSTEM_LED_FAN:
+        case CPLD_SYSTEM_LED_PSU_0:
+        case CPLD_SYSTEM_LED_PSU_1:
+        case CPLD_SYSTEM_LED_SYNC:
+        case CPLD_SYSTEM_LED_ID:
+        case CPLD_MGMT_PORT_0_LED_SPEED:
+        case CPLD_MGMT_PORT_1_LED_SPEED:
+        case CPLD_PORT_LED_CLR:
+        case CPLD_MISC_PWR:
+        case DBG_CPLD_MAC_INTR:
+        case DBG_CPLD_CPLDX_INTR:
+        case DBG_CPLD_MAC_THERMAL_INTR:
+        case DBG_CPLD_MISC_INTR:
+
+        //CPLD 2
+        case CPLD_OSFP_PORT_0_7_16_23_INTR:
+        case CPLD_OSFP_PORT_8_15_24_31_INTR:
+        case CPLD_OSFP_PORT_32_39_48_55_INTR:
+        case CPLD_OSFP_PORT_40_47_56_63_INTR:
+        case CPLD_OSFP_PORT_0_7_16_23_PRES:
+        case CPLD_OSFP_PORT_8_15_24_31_PRES:
+        case CPLD_OSFP_PORT_32_39_48_55_PRES:
+        case CPLD_OSFP_PORT_40_47_56_63_PRES:
+        case CPLD_OSFP_PORT_0_15_16_31_FUSE:
+        case CPLD_OSFP_PORT_32_47_48_63_FUSE:
+        case CPLD_OSFP_PORT_0_7_16_23_STUCK:
+        case CPLD_OSFP_PORT_8_15_24_31_STUCK:
+        case CPLD_OSFP_PORT_32_39_48_55_STUCK:
+        case CPLD_OSFP_PORT_40_47_56_63_STUCK:
+        case CPLD_OSFP_PORT_0_7_16_23_INTR_MASK:
+        case CPLD_OSFP_PORT_8_15_24_31_INTR_MASK:
+        case CPLD_OSFP_PORT_32_39_48_55_INTR_MASK:
+        case CPLD_OSFP_PORT_40_47_56_63_INTR_MASK:
+        case CPLD_OSFP_PORT_0_7_16_23_PRES_MASK:
+        case CPLD_OSFP_PORT_8_15_24_31_PRES_MASK:
+        case CPLD_OSFP_PORT_32_39_48_55_PRES_MASK:
+        case CPLD_OSFP_PORT_40_47_56_63_PRES_MASK:
+        case CPLD_OSFP_PORT_0_15_16_31_FUSE_MASK:
+        case CPLD_OSFP_PORT_32_47_48_63_FUSE_MASK:
+        case CPLD_OSFP_PORT_0_7_16_23_STUCK_MASK:
+        case CPLD_OSFP_PORT_8_15_24_31_STUCK_MASK:
+        case CPLD_OSFP_PORT_32_39_48_55_STUCK_MASK:
+        case CPLD_OSFP_PORT_40_47_56_63_STUCK_MASK:
+        case CPLD_OSFP_PORT_0_7_16_23_INTR_EVENT:
+        case CPLD_OSFP_PORT_8_15_24_31_INTR_EVENT:
+        case CPLD_OSFP_PORT_32_39_48_55_INTR_EVENT:
+        case CPLD_OSFP_PORT_40_47_56_63_INTR_EVENT:
+        case CPLD_OSFP_PORT_0_7_16_23_PRES_EVENT:
+        case CPLD_OSFP_PORT_8_15_24_31_PRES_EVENT:
+        case CPLD_OSFP_PORT_32_39_48_55_PRES_EVENT:
+        case CPLD_OSFP_PORT_40_47_56_63_PRES_EVENT:
+        case CPLD_OSFP_PORT_0_15_16_31_FUSE_EVENT:
+        case CPLD_OSFP_PORT_32_47_48_63_FUSE_EVENT:
+        case CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT:
+        case CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT:
+        case CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT:
+        case CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT:
+        case CPLD_OSFP_PORT_0_7_16_23_RST:
+        case CPLD_OSFP_PORT_8_15_24_31_RST:
+        case CPLD_OSFP_PORT_32_39_48_55_RST:
+        case CPLD_OSFP_PORT_40_47_56_63_RST:
+        case CPLD_OSFP_PORT_0_7_16_23_LPMODE:
+        case CPLD_OSFP_PORT_8_15_24_31_LPMODE:
+        case CPLD_OSFP_PORT_32_39_48_55_LPMODE:
+        case CPLD_OSFP_PORT_40_47_56_63_LPMODE:
+        case CPLD_I2C_CONTROL:
+        case CPLD_I2C_RELAY:
+        case CPLD_DBG_OSFP_PORT_0_7_16_23_INTR:
+        case CPLD_DBG_OSFP_PORT_8_15_24_31_INTR:
+        case CPLD_DBG_OSFP_PORT_32_39_48_55_INTR:
+        case CPLD_DBG_OSFP_PORT_40_47_56_63_INTR:
+        case CPLD_DBG_OSFP_PORT_0_7_16_23_PRES:
+        case CPLD_DBG_OSFP_PORT_8_15_24_31_PRES:
+        case CPLD_DBG_OSFP_PORT_32_39_48_55_PRES:
+        case CPLD_DBG_OSFP_PORT_40_47_56_63_PRES:
+        case CPLD_DBG_OSFP_PORT_0_15_16_31_FUSE:
+        case CPLD_DBG_OSFP_PORT_32_47_48_63_FUSE:
+
+        //FPGA
+        case FPGA_MINOR_VER:
+        case FPGA_MAJOR_VER:
+        case FPGA_BUILD:
+        case FPGA_CHIP:
+        case FPGA_MGMT_PORT_0_1_TX_RATE_SEL:
+        case FPGA_MGMT_PORT_0_1_RX_RATE_SEL:
+        case FPGA_MGMT_PORT_0_1_TX_DIS:
+        case FPGA_MGMT_PORT_0_1_TX_FAULT:
+        case FPGA_MGMT_PORT_0_1_RX_LOS:
+        case FPGA_MGMT_PORT_0_1_PRES:
+        case FPGA_MGMT_PORT_0_1_STUCK:
+        case FPGA_MGMT_PORT_0_1_TX_FAULT_MASK:
+        case FPGA_MGMT_PORT_0_1_RX_LOS_MASK:
+        case FPGA_MGMT_PORT_0_1_PRES_MASK:
+        case FPGA_MGMT_PORT_0_1_STUCK_MASK:
+        case FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT:
+        case FPGA_MGMT_PORT_0_1_RX_LOS_EVENT:
+        case FPGA_MGMT_PORT_0_1_PRES_EVENT:
+        case FPGA_MGMT_PORT_0_1_STUCK_EVENT:
+        case FPGA_EVT_CTRL:
+        case FPGA_LAN_PORT_RELAY:
+
+            reg = attr_reg[attr->index].reg;
+            mask= attr_reg[attr->index].mask;
+            data_type = attr_reg[attr->index].data_type;
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    ret = cpld_reg_read(dev, &reg_val, reg, mask);
+    if( ret < 0) {
+        return ret;
+    }
+    return _parse_data(buf, reg_val, data_type);
+}
+
+/* set cpld register value */
+static ssize_t cpld_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg_val = 0;
+    u8 reg = 0;
+    u8 mask = MASK_NONE;
+    char *range = NULL;
+    int ret = 0;
+
+    if (kstrtou8(buf, 0, &reg_val) < 0)
+        return -EINVAL;
+
+    ret = _store_value_check(attr->index, reg_val, &range);
+    if (ret < 0) {
+        if(ret == -2) {
+            return -EINVAL;
+        } else {
+            pr_err("Input is out of range(%s)\n", range);
+            return -EINVAL;
+        }
+    }
+
+    switch (attr->index) {
+        // CPLD Common
+        case CPLD_EVT_CTRL:
+
+        //CPLD 1
+        case CPLD_MAC_MASK:
+        case CPLD_PHY_MASK:
+        case CPLD_CPLDX_MASK:
+        case CPLD_MAC_THERMAL_MASK:
+        case CPLD_MISC_MASK:
+        case CPLD_CPU_MASK:
+        case CPLD_MAC_RESET:
+        case CPLD_BMC_RESET:
+        case CPLD_USB_RESET:
+        case CPLD_MISC_RESET:
+        case CPLD_MUX_CTRL:
+        case CPLD_SYSTEM_LED_SYS:
+        case CPLD_SYSTEM_LED_FAN:
+        case CPLD_SYSTEM_LED_PSU_0:
+        case CPLD_SYSTEM_LED_PSU_1:
+        case CPLD_SYSTEM_LED_SYNC:
+        case CPLD_SYSTEM_LED_ID:
+        case CPLD_MGMT_PORT_0_LED_SPEED:
+        case CPLD_MGMT_PORT_1_LED_SPEED:
+        case CPLD_PORT_LED_CLR:
+
+        //CPLD 2
+        case CPLD_OSFP_PORT_0_7_16_23_INTR_MASK:
+        case CPLD_OSFP_PORT_8_15_24_31_INTR_MASK:
+        case CPLD_OSFP_PORT_32_39_48_55_INTR_MASK:
+        case CPLD_OSFP_PORT_40_47_56_63_INTR_MASK:
+        case CPLD_OSFP_PORT_0_7_16_23_PRES_MASK:
+        case CPLD_OSFP_PORT_8_15_24_31_PRES_MASK:
+        case CPLD_OSFP_PORT_32_39_48_55_PRES_MASK:
+        case CPLD_OSFP_PORT_40_47_56_63_PRES_MASK:
+        case CPLD_OSFP_PORT_0_15_16_31_FUSE_MASK:
+        case CPLD_OSFP_PORT_32_47_48_63_FUSE_MASK:
+        case CPLD_OSFP_PORT_0_7_16_23_STUCK_MASK:
+        case CPLD_OSFP_PORT_8_15_24_31_STUCK_MASK:
+        case CPLD_OSFP_PORT_32_39_48_55_STUCK_MASK:
+        case CPLD_OSFP_PORT_40_47_56_63_STUCK_MASK:
+        case CPLD_OSFP_PORT_0_7_16_23_RST:
+        case CPLD_OSFP_PORT_8_15_24_31_RST:
+        case CPLD_OSFP_PORT_32_39_48_55_RST:
+        case CPLD_OSFP_PORT_40_47_56_63_RST:
+        case CPLD_OSFP_PORT_0_7_16_23_LPMODE:
+        case CPLD_OSFP_PORT_8_15_24_31_LPMODE:
+        case CPLD_OSFP_PORT_32_39_48_55_LPMODE:
+        case CPLD_OSFP_PORT_40_47_56_63_LPMODE:
+        case CPLD_I2C_CONTROL:
+        case CPLD_I2C_RELAY:
+        case CPLD_DBG_OSFP_PORT_0_7_16_23_INTR:
+        case CPLD_DBG_OSFP_PORT_8_15_24_31_INTR:
+        case CPLD_DBG_OSFP_PORT_32_39_48_55_INTR:
+        case CPLD_DBG_OSFP_PORT_40_47_56_63_INTR:
+        case CPLD_DBG_OSFP_PORT_0_7_16_23_PRES:
+        case CPLD_DBG_OSFP_PORT_8_15_24_31_PRES:
+        case CPLD_DBG_OSFP_PORT_32_39_48_55_PRES:
+        case CPLD_DBG_OSFP_PORT_40_47_56_63_PRES:
+        case CPLD_DBG_OSFP_PORT_0_15_16_31_FUSE:
+        case CPLD_DBG_OSFP_PORT_32_47_48_63_FUSE:
+
+        //FPGA
+        case FPGA_MGMT_PORT_0_1_TX_RATE_SEL:
+        case FPGA_MGMT_PORT_0_1_RX_RATE_SEL:
+        case FPGA_MGMT_PORT_0_1_TX_DIS:
+        case FPGA_MGMT_PORT_0_1_TX_FAULT_MASK:
+        case FPGA_MGMT_PORT_0_1_RX_LOS_MASK:
+        case FPGA_MGMT_PORT_0_1_PRES_MASK:
+        case FPGA_MGMT_PORT_0_1_STUCK_MASK:
+        case FPGA_EVT_CTRL:
+
+            reg = attr_reg[attr->index].reg;
+            mask= attr_reg[attr->index].mask;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return cpld_reg_write(dev, reg_val, count, reg, mask);
+}
+
+/* get cpld register value */
+int _cpld_reg_read(struct device *dev, u8 reg, u8 mask)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int reg_val;
+
+    I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg);
+
+    if (unlikely(reg_val < 0)) {
+        return reg_val;
+    } else {
+        reg_val=_mask_shift(reg_val, mask);
+        return reg_val;
+    }
+}
+
+/* get cpld register value */
+static ssize_t cpld_reg_read(struct device *dev,
+                    u8 *reg_val,
+                    u8 reg,
+                    u8 mask)
+{
+    int ret = 0;
+
+    if(reg_val == NULL) {
+        return -EINVAL;
+    }
+
+    ret = _cpld_reg_read(dev, reg, mask);
+    if (unlikely(ret < 0)) {
+        dev_err(dev, "cpld_reg_read() error, reg_val=%d\n", ret);
+        return ret;
+    }
+
+    *reg_val = (u8)ret;
+    return 0;
+}
+
+int _cpld_reg_write(struct device *dev,
+                    u8 reg,
+                    u8 reg_val)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int ret = 0;
+
+    I2C_WRITE_BYTE_DATA(ret, &data->access_lock,
+               client, reg, reg_val);
+
+    return ret;
+}
+
+/* set cpld register value */
+static ssize_t cpld_reg_write(struct device *dev,
+                    u8 reg_val,
+                    size_t count,
+                    u8 reg,
+                    u8 mask)
+{
+    u8 reg_val_now, shift;
+    int ret = 0;
+
+    //apply continuous bits operation if mask is specified, discontinuous bits are not supported
+    if (mask != MASK_ALL) {
+        reg_val_now = _cpld_reg_read(dev, reg, MASK_ALL);
+        if (unlikely(reg_val_now < 0)) {
+            dev_err(dev, "cpld_reg_write() error, reg_val_now=%d\n", reg_val_now);
+            return reg_val_now;
+        } else {
+            //clear bits in reg_val_now by the mask
+            reg_val_now &= ~mask;
+            //get bit shift by the mask
+            shift = _shift(mask);
+            //calculate new reg_val
+            reg_val = reg_val_now | (reg_val << shift);
+        }
+    }
+
+    ret = _cpld_reg_write(dev, reg, reg_val);
+
+    if (unlikely(ret < 0)) {
+        dev_err(dev, "cpld_reg_write() error, return=%d\n", ret);
+        return ret;
+    }
+
+    return count;
+}
+
+/* get cpld and fpga version register value */
+static ssize_t version_h_show(struct device *dev,
+                    struct device_attribute *da,
+                    char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int major =-1;
+    int minor =-1;
+    int build =-1;
+    int major_val = -1;
+    int minor_val = -1;
+    int build_val = -1;
+
+    switch(attr->index) {
+        case CPLD_VERSION_H:
+            major = CPLD_MAJOR_VER;
+            minor = CPLD_MINOR_VER;
+            build = CPLD_BUILD_VER;
+            break;
+        case FPGA_VERSION_H:
+            major = FPGA_MAJOR_VER;
+            minor = FPGA_MINOR_VER;
+            build = FPGA_BUILD;
+            break;
+        default:
+            major=-1;
+            minor=-1;
+            build=-1;
+            break;
+    }
+
+    if (major >= 0 && minor >= 0 && build >= 0) {
+        major_val = _cpld_reg_read(dev, attr_reg[major].reg, attr_reg[major].mask);
+        minor_val = _cpld_reg_read(dev, attr_reg[minor].reg, attr_reg[minor].mask);
+        build_val = _cpld_reg_read(dev, attr_reg[build].reg, attr_reg[build].mask);
+
+        if(major_val < 0 || minor_val < 0 || build_val < 0)
+            return -EIO ;
+
+        return sprintf(buf, "%d.%02d.%03d", major_val, minor_val, build_val);
+    }
+    return -EINVAL;
+}
+
+static int _get_led_node(int index, led_node_t *node)
+{
+    color_obj_t mgmt_port_set[COLOR_VAL_MAX] = {
+        [0] = {.status = LED_COLOR_DARK           , .val = 0b00000000},
+        [1] = {.status = LED_COLOR_DARK           , .val = 0b00000001},
+        [2] = {.status = LED_COLOR_DARK           , .val = 0b00000100},
+        [3] = {.status = LED_COLOR_DARK           , .val = 0b00000101},
+        [4] = {.status = LED_COLOR_GREEN          , .val = 0b00001001},
+        [5] = {.status = LED_COLOR_GREEN_BLINK    , .val = 0b00001101},
+        [6] = {.status = LED_COLOR_YELLOW         , .val = 0b00001000},
+        [7] = {.status = LED_COLOR_YELLOW_BLINK   , .val = 0b00001100},
+        [8] = {.val = -1}
+    };
+
+    switch (index){
+        case CPLD_MGMT_PORT_0_LED_STATUS:
+        case CPLD_MGMT_PORT_1_LED_STATUS:
+            node->type=TYPE_LED_2_SETS;
+            node->reg = attr_reg[index].reg;
+            node->mask= attr_reg[index].mask;
+            node->color_mask = MASK_0000_1101;
+            node->data_type = attr_reg[index].data_type;
+            memcpy(node->color_obj, mgmt_port_set, sizeof(mgmt_port_set));
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+static ssize_t led_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    led_node_t node = {0};
+    int status = LED_COLOR_DARK;
+    int led_val = 0;
+    int found = 0;
+    int i = 0;
+
+    if(_get_led_node(attr->index,&node) != 0) {
+        return -EINVAL;		
+    }
+
+    led_val=_cpld_reg_read(dev, node.reg, node.mask);
+
+    if(led_val < 0) {
+        return led_val;
+    }
+
+    for(i= 0; i<COLOR_VAL_MAX; i++) {
+        if(node.color_obj[i].val == -1)
+            break;
+
+        if((led_val & node.color_mask) == node.color_obj[i].val) {
+            status = node.color_obj[i].status;
+            found=1;
+            break;
+        }
+    }
+
+    if(found == 0) {
+        pr_err("Led value not in definition!!\n");
+        return -EINVAL;
+    }
+
+    return _parse_data(buf, status, node.data_type);
+}
+
+static ssize_t led_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    led_node_t node = {0};
+    int status = LED_COLOR_DARK;
+    short int val;
+    int found = 0;
+    int i = 0;
+
+    if(_get_led_node(attr->index,&node) != 0) {
+        return -EINVAL;		
+    }
+
+    if (kstrtoint(buf, 0, &status) < 0)
+        return -EINVAL;
+
+    for(i= 0; i<COLOR_VAL_MAX; i++) {
+        if(node.color_obj[i].val == -1)
+            break;
+
+        if(status == node.color_obj[i].status) {
+            found=1;
+            val = node.color_obj[i].val;
+            break;
+        }
+    }
+
+    if(found == 0) {
+        pr_err("Led value not in definition!!\n");
+        return -EINVAL;
+    }
+
+    return cpld_reg_write(dev, (u8)val, count, node.reg, node.mask);
+}
+
+/* add valid cpld client to list */
+static void cpld_add_client(struct i2c_client *client)
+{
+    struct cpld_client_node *node = NULL;
+
+    node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL);
+    if (!node) {
+        dev_info(&client->dev,
+            "Can't allocate cpld_client_node for index %d\n",
+            client->addr);
+        return;
+    }
+
+    node->client = client;
+
+    mutex_lock(&list_lock);
+    list_add(&node->list, &cpld_client_list);
+    mutex_unlock(&list_lock);
+}
+
+/* remove exist cpld client in list */
+static void cpld_remove_client(struct i2c_client *client)
+{
+    struct list_head    *list_node = NULL;
+    struct cpld_client_node *cpld_node = NULL;
+    int found = 0;
+
+    mutex_lock(&list_lock);
+    list_for_each(list_node, &cpld_client_list) {
+        cpld_node = list_entry(list_node,
+                struct cpld_client_node, list);
+
+        if (cpld_node->client == client) {
+            found = 1;
+            break;
+        }
+    }
+
+    if (found) {
+        list_del(list_node);
+        kfree(cpld_node);
+    }
+    mutex_unlock(&list_lock);
+}
+
+/* cpld drvier probe */
+static int cpld_probe(struct i2c_client *client,
+                    const struct i2c_device_id *dev_id)
+{
+    int status;
+    struct i2c_adapter *adap = client->adapter;
+    struct device *dev = &client->dev;
+    struct cpld_data *data = NULL;
+    struct i2c_mux_core *muxc;
+
+    muxc = i2c_mux_alloc(adap, dev, CPLD_MAX_NCHANS, sizeof(*data), 0,
+                mux_select_chan, mux_deselect_mux);
+
+    data = i2c_mux_priv(muxc);
+    if (!data)
+        return -ENOMEM;
+
+    /* init cpld data for client */
+    i2c_set_clientdata(client, muxc);
+
+    data->client = client;
+    mutex_init(&data->access_lock);
+
+    if (!i2c_check_functionality(client->adapter,
+                I2C_FUNC_SMBUS_BYTE_DATA)) {
+        dev_info(&client->dev,
+            "i2c_check_functionality failed (0x%x)\n",
+            client->addr);
+        status = -EIO;
+        goto exit;
+    }
+
+    data->index = dev_id->driver_data;
+
+    /* register sysfs hooks for different cpld group */
+    dev_info(&client->dev, "probe cpld with index %d\n", data->index);
+
+    if(mux_en) {
+        status = mux_init(dev);
+        if (status < 0) {
+            dev_warn(dev, "Mux init failed\n");
+            goto exit;
+        }
+    }
+
+    switch (data->index) {
+    case cpld1:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &cpld1_group);
+        break;
+    case cpld2:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &cpld2_group);
+        break;
+    case cpld3:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &cpld3_group);
+        break;
+    case fpga:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &fpga_group);
+        break;
+    default:
+        status = -EINVAL;
+    }
+
+    if(mux_en) {
+        if(data->chip->nchans > 0){
+            status = sysfs_add_file_to_group(&client->dev.kobj,
+                        &sensor_dev_attr_idle_state.dev_attr.attr, NULL);
+        }
+    }
+
+    if (status)
+        goto exit;
+
+    dev_info(&client->dev, "chip found\n");
+
+    /* add probe chip to client list */
+    cpld_add_client(client);
+
+    return 0;
+exit:
+    switch (data->index) {
+    case cpld1:
+        sysfs_remove_group(&client->dev.kobj, &cpld1_group);
+        break;
+    case cpld2:
+        sysfs_remove_group(&client->dev.kobj, &cpld2_group);
+        break;
+    case cpld3:
+        sysfs_remove_group(&client->dev.kobj, &cpld3_group);
+        break;
+    case fpga:
+        sysfs_remove_group(&client->dev.kobj, &fpga_group);
+        break;
+    default:
+        break;
+    }
+
+    return status;
+}
+
+/* cpld drvier remove */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+cpld_remove(struct i2c_client *client)
+{
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct device *dev = &client->dev;
+    struct cpld_data *data = i2c_mux_priv(muxc);
+
+    if(mux_en) {
+        if(data->chip->nchans > 0){
+            sysfs_remove_file_from_group(&client->dev.kobj,
+                &sensor_dev_attr_idle_state.dev_attr.attr, NULL);
+        }
+    }
+
+    switch (data->index) {
+    case cpld1:
+        sysfs_remove_group(&client->dev.kobj, &cpld1_group);
+        break;
+    case cpld2:
+        sysfs_remove_group(&client->dev.kobj, &cpld2_group);
+        break;
+    case cpld3:
+        sysfs_remove_group(&client->dev.kobj, &cpld3_group);
+        break;
+    case fpga:
+        sysfs_remove_group(&client->dev.kobj, &fpga_group);
+        break;
+    default:
+        break;
+    }
+
+    if(mux_en) {
+        mux_cleanup(dev);
+    }
+
+    cpld_remove_client(client);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+    return 0;
+#endif
+}
+
+MODULE_DEVICE_TABLE(i2c, cpld_id);
+
+static struct i2c_driver cpld_driver = {
+    .class      = I2C_CLASS_HWMON,
+    .driver = {
+        .name = "x86_64_ufispace_s9321_64eo_cpld",
+    },
+    .probe = cpld_probe,
+    .remove = cpld_remove,
+    .id_table = cpld_id,
+    .address_list = cpld_i2c_addr,
+};
+
+static int __init cpld_init(void)
+{
+    mutex_init(&list_lock);
+    return i2c_add_driver(&cpld_driver);
+}
+
+static void __exit cpld_exit(void)
+{
+    i2c_del_driver(&cpld_driver);
+}
+
+MODULE_AUTHOR("Nonodark Huang<nonodark.huang@ufispace.com>");
+MODULE_DESCRIPTION("x86_64_ufispace_s9321_64eo_cpld driver");
+MODULE_VERSION("0.0.1");
+MODULE_LICENSE("GPL");
+
+module_init(cpld_init);
+module_exit(cpld_exit);
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-cpld-main.h b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-cpld-main.h
new file mode 100644
index 00000000000..c275bc8bb4f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-cpld-main.h
@@ -0,0 +1,324 @@
+/* header file for i2c cpld driver of ufispace_s9321_64eo
+ *
+ * Copyright (C) 2017 UfiSpace Technology Corporation.
+ * Wade He <wade.ce.he@ufispace.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef UFISPACE_S9321_64EO_CPLD_MAIN_H
+#define UFISPACE_S9321_64EO_CPLD_MAIN_H
+
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <dt-bindings/mux/mux.h>
+#include <linux/i2c-mux.h>
+#include <linux/version.h>
+
+/* CPLD device index value */
+enum cpld_id {
+    cpld1,
+    cpld2,
+    cpld3,
+    fpga,
+};
+
+/* 
+ *  Normally, the CPLD register range is 0x00-0xff.
+ *  Therefore, we define the invalid address 0x100 as NONE_REG
+ */
+
+#define NONE_REG                                        0x100
+
+/* CPLD Common */
+#define CPLD_VERSION_REG                                0x02
+#define CPLD_ID_REG                                     0x03
+#define CPLD_BUILD_REG                                  0x04
+#define CPLD_EVT_CTRL_REG                               0x3F
+
+/* CPLD 1 registers */
+#define CPLD_BOARD_ID_0_REG                             0x00
+#define CPLD_BOARD_ID_1_REG                             0x01
+// Interrupt status
+#define CPLD_MAC_INTR_REG                               0x10
+#define CPLD_PHY_INTR_REG                               0x13
+#define CPLD_CPLDX_INTR_REG                             0x14
+#define CPLD_THERMAL_INTR_REG                           0x17
+#define CPLD_MISC_INTR_REG                              0x1B
+#define CPLD_CPU_INTR_REG                               0x1C
+// Interrupt mask
+#define CPLD_MAC_MASK_REG                               0x20
+#define CPLD_PHY_MASK_REG                               0x23
+#define CPLD_CPLDX_MASK_REG                             0x24
+#define CPLD_THERMAL_MASK_REG                           0x27
+#define CPLD_MISC_MASK_REG                              0x2B
+#define CPLD_CPU_MASK_REG                               0x2C
+// Interrupt event
+#define CPLD_MAC_EVT_REG                                0x30
+#define CPLD_PHY_EVT_REG                                0x33
+#define CPLD_CPLDX_EVT_REG                              0x34
+#define CPLD_THERMAL_EVT_REG                            0x37
+#define CPLD_MISC_EVT_REG                               0x3B
+// Reset ctrl
+#define CPLD_MAC_RESET_REG                              0x40
+#define CPLD_BMC_RESET_REG                              0x43
+#define CPLD_USB_RESET_REG                              0x44
+#define CPLD_MISC_RESET_REG                             0x48
+// Sys status
+#define CPLD_BRD_PRESENT_REG                            0x50
+#define CPLD_PSU_STATUS_REG                             0x51
+#define CPLD_SYSTEM_PWR_REG                             0x52
+#define CPLD_MAC_SYNCE_REG                              0x53
+#define CPLD_MAC_ROV_REG                                0x54
+// Mux ctrl
+#define CPLD_MUX_CTRL_REG                               0x5C
+// Led ctrl
+#define CPLD_SYSTEM_LED_SYS_FAN_REG                     0x80
+#define CPLD_SYSTEM_LED_PSU_REG                         0x81
+#define CPLD_SYSTEM_LED_SYNC_ID_REG                     0x82
+#define CPLD_SFP_PORT_0_1_LED_REG                       0x83
+#define CPLD_PORT_LED_CLR_REG                           0x85
+// Power Good Status
+#define CPLD_MISC_PWR_REG                               0x92
+// Interrupt debug
+#define DBG_CPLD_MAC_INTR_REG                           0xE0
+#define DBG_CPLD_CPLDX_INTR_REG                         0xE4
+#define DBG_CPLD_THERMAL_INTR_REG                       0xE7
+#define DBG_CPLD_MISC_INTR_REG                          0xEB
+
+/* CPLD 2 and CPLD 3*/
+// Interrupt status
+#define CPLD_OSFP_PORT_0_7_16_23_INTR_REG             0x10
+#define CPLD_OSFP_PORT_8_15_24_31_INTR_REG            0x11
+#define CPLD_OSFP_PORT_32_39_48_55_INTR_REG           0x12
+#define CPLD_OSFP_PORT_40_47_56_63_INTR_REG           0x13
+#define CPLD_OSFP_PORT_0_7_16_23_PRES_REG             0x14
+#define CPLD_OSFP_PORT_8_15_24_31_PRES_REG            0x15
+#define CPLD_OSFP_PORT_32_39_48_55_PRES_REG           0x16
+#define CPLD_OSFP_PORT_40_47_56_63_PRES_REG           0x17
+#define CPLD_OSFP_PORT_0_15_16_31_FUSE_REG            0x18
+#define CPLD_OSFP_PORT_32_47_48_63_FUSE_REG           0x19
+#define CPLD_OSFP_PORT_0_7_16_23_STUCK_REG            0x1A
+#define CPLD_OSFP_PORT_8_15_24_31_STUCK_REG           0x1B
+#define CPLD_OSFP_PORT_32_39_48_55_STUCK_REG          0x1C
+#define CPLD_OSFP_PORT_40_47_56_63_STUCK_REG          0x1D
+// Interrupt mask
+#define CPLD_OSFP_PORT_0_7_16_23_INTR_MASK_REG        0x20
+#define CPLD_OSFP_PORT_8_15_24_31_INTR_MASK_REG       0x21
+#define CPLD_OSFP_PORT_32_39_48_55_INTR_MASK_REG      0x22
+#define CPLD_OSFP_PORT_40_47_56_63_INTR_MASK_REG      0x23
+#define CPLD_OSFP_PORT_0_7_16_23_PRES_MASK_REG        0x24
+#define CPLD_OSFP_PORT_8_15_24_31_PRES_MASK_REG       0x25
+#define CPLD_OSFP_PORT_32_39_48_55_PRES_MASK_REG      0x26
+#define CPLD_OSFP_PORT_40_47_56_63_PRES_MASK_REG      0x27
+#define CPLD_OSFP_PORT_0_15_16_31_FUSE_MASK_REG       0x28
+#define CPLD_OSFP_PORT_32_47_48_63_FUSE_MASK_REG      0x29
+#define CPLD_OSFP_PORT_0_7_16_23_STUCK_MASK_REG       0x2A
+#define CPLD_OSFP_PORT_8_15_24_31_STUCK_MASK_REG      0x2B
+#define CPLD_OSFP_PORT_32_39_48_55_STUCK_MASK_REG     0x2C
+#define CPLD_OSFP_PORT_40_47_56_63_STUCK_MASK_REG     0x2D
+// Interrupt event
+#define CPLD_OSFP_PORT_0_7_16_23_INTR_EVENT_REG       0x30
+#define CPLD_OSFP_PORT_8_15_24_31_INTR_EVENT_REG      0x31
+#define CPLD_OSFP_PORT_32_39_48_55_INTR_EVENT_REG     0x32
+#define CPLD_OSFP_PORT_40_47_56_63_INTR_EVENT_REG     0x33
+#define CPLD_OSFP_PORT_0_7_16_23_PRES_EVENT_REG       0x34
+#define CPLD_OSFP_PORT_8_15_24_31_PRES_EVENT_REG      0x35
+#define CPLD_OSFP_PORT_32_39_48_55_PRES_EVENT_REG     0x36
+#define CPLD_OSFP_PORT_40_47_56_63_PRES_EVENT_REG     0x37
+#define CPLD_OSFP_PORT_0_15_16_31_FUSE_EVENT_REG      0x38
+#define CPLD_OSFP_PORT_32_47_48_63_FUSE_EVENT_REG     0x39
+#define CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG      0x3A
+#define CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG     0x3B
+#define CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG    0x3C
+#define CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG    0x3D
+// Port ctrl
+#define CPLD_OSFP_PORT_0_7_16_23_RST_REG              0x40
+#define CPLD_OSFP_PORT_8_15_24_31_RST_REG             0x41
+#define CPLD_OSFP_PORT_32_39_48_55_RST_REG            0x42
+#define CPLD_OSFP_PORT_40_47_56_63_RST_REG            0x43
+#define CPLD_OSFP_PORT_0_7_16_23_LPMODE_REG           0x44
+#define CPLD_OSFP_PORT_8_15_24_31_LPMODE_REG          0x45
+#define CPLD_OSFP_PORT_32_39_48_55_LPMODE_REG         0x46
+#define CPLD_OSFP_PORT_40_47_56_63_LPMODE_REG         0x47
+
+#define CPLD_I2C_CONTROL_REG                            0xA0
+#define CPLD_I2C_RELAY_REG                              0xA5
+// Interrupt debug
+#define CPLD_DBG_OSFP_PORT_0_7_16_23_INTR_REG         0xE0
+#define CPLD_DBG_OSFP_PORT_8_15_24_31_INTR_REG        0xE1
+#define CPLD_DBG_OSFP_PORT_32_39_48_55_INTR_REG       0xE2
+#define CPLD_DBG_OSFP_PORT_40_47_56_63_INTR_REG       0xE3
+#define CPLD_DBG_OSFP_PORT_0_7_16_23_PRES_REG         0xE4
+#define CPLD_DBG_OSFP_PORT_8_15_24_31_PRES_REG        0xE5
+#define CPLD_DBG_OSFP_PORT_32_39_48_55_PRES_REG       0xE6
+#define CPLD_DBG_OSFP_PORT_40_47_56_63_PRES_REG       0xE7
+#define CPLD_DBG_OSFP_PORT_0_15_16_31_FUSE_REG        0xE8
+#define CPLD_DBG_OSFP_PORT_32_47_48_63_FUSE_REG       0xE9
+
+//FPGA
+#define FPGA_VERSION_REG                                0x02
+#define FPGA_BUILD_REG                                  0x04
+#define FPGA_CHIP_REG                                   0x05
+#define FPGA_MGMT_PORT_0_1_TX_RATE_SEL_REG              0x0A
+#define FPGA_MGMT_PORT_0_1_RX_RATE_SEL_REG              0x0B
+#define FPGA_MGMT_PORT_0_1_TX_DIS_REG                   0x0C
+#define FPGA_MGMT_PORT_0_1_TX_FAULT_REG                 0x10
+#define FPGA_MGMT_PORT_0_1_RX_LOS_REG                   0x11
+#define FPGA_MGMT_PORT_0_1_PRES_REG                     0x12
+#define FPGA_MGMT_PORT_0_1_STUCK_REG                    0x13
+#define FPGA_MGMT_PORT_0_1_TX_FAULT_MASK_REG            0x20
+#define FPGA_MGMT_PORT_0_1_RX_LOS_MASK_REG              0x21
+#define FPGA_MGMT_PORT_0_1_PRES_MASK_REG                0x22
+#define FPGA_MGMT_PORT_0_1_STUCK_MASK_REG               0x23
+#define FPGA_MGMT_PORT_0_1_TX_FAULT_EVENT_REG           0x30
+#define FPGA_MGMT_PORT_0_1_RX_LOS_EVENT_REG             0x31
+#define FPGA_MGMT_PORT_0_1_PRES_EVENT_REG               0x32
+#define FPGA_MGMT_PORT_0_1_STUCK_EVENT_REG              0x33
+#define FPGA_EVT_CTRL_REG                               0x3F
+#define FPGA_LAN_PORT_RELAY_REG                         0x40
+
+//MASK
+#define MASK_ALL                           (0xFF)
+#define MASK_NONE                          (0x00)
+#define MASK_0000_0001                     (0x01)
+#define MASK_0000_0010                     (0x02)
+#define MASK_0000_0011                     (0x03)
+#define MASK_0000_0100                     (0x04)
+#define MASK_0000_0111                     (0x07)
+#define MASK_0000_1000                     (0x08)
+#define MASK_0000_1101                     (0x0D)
+#define MASK_0000_1111                     (0x0F)
+#define MASK_0001_0000                     (0x10)
+#define MASK_0001_1000                     (0x18)
+#define MASK_0010_0000                     (0x20)
+#define MASK_0011_1000                     (0x38)
+#define MASK_0011_1111                     (0x3F)
+#define MASK_0100_0000                     (0x40)
+#define MASK_1000_0000                     (0x80)
+#define MASK_1100_0000                     (0xC0)
+#define MASK_1101_0000                     (0xD0)
+#define MASK_1110_0000                     (0xE0)
+#define MASK_1111_0000                     (0xF0)
+
+
+// MUX
+#define CPLD_MAX_NCHANS 32
+#define CPLD_MUX_TIMEOUT                   1400
+#define CPLD_MUX_RETRY_WAIT                200
+#define CPLD_MUX_CHN_OFF                   (0x0)
+#define FPGA_MUX_CHN_OFF                   (0x0)
+#define CPLD_I2C_ENABLE_BRIDGE             MASK_1000_0000
+#define CPLD_I2C_ENABLE_CHN_SEL            MASK_1000_0000
+#define FPGA_LAN_PORT_RELAY_ENABLE         MASK_1000_0000
+
+/* common manipulation */
+#define INVALID(i, min, max)    ((i < min) || (i > max) ? 1u : 0u)
+
+struct cpld_data {
+    int index;                  /* CPLD index */
+    struct mutex access_lock;   /* mutex for cpld access */
+    u8 access_reg;              /* register to access */
+
+    const struct chip_desc *chip;
+    u32 last_chan;       /* last register value */
+    /* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
+    s32 idle_state;
+
+    struct i2c_client *client;
+    raw_spinlock_t lock;
+};
+
+struct chip_desc {
+    u8 nchans;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0)
+    struct i2c_device_identity id;
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0) */
+};
+
+/*
+ *  Generally, the color bit for CPLD is 4 bits, and there are 16 color sets available.
+ *  The color bit for GPIO is 2 bits (representing two GPIO pins), and there are 4 color sets.
+ *  Therefore, we use the 16 color sets available for our application.
+ */
+#define COLOR_VAL_MAX           16
+
+typedef enum {
+    LED_COLOR_DARK,
+    LED_COLOR_GREEN,
+    LED_COLOR_YELLOW,
+    LED_COLOR_RED,
+    LED_COLOR_BLUE,
+    LED_COLOR_GREEN_BLINK,
+    LED_COLOR_YELLOW_BLINK,
+    LED_COLOR_RED_BLINK,
+    LED_COLOR_BLUE_BLINK,
+    LED_COLOR_CYAN=100,
+    LED_COLOR_MAGENTA,
+    LED_COLOR_WHITE,
+    LED_COLOR_CYAN_BLINK,
+    LED_COLOR_MAGENTA_BLINK,
+    LED_COLOR_WHITE_BLINK,
+} s3ip_led_status_e;
+
+typedef enum {
+    TYPE_LED_UNNKOW = 0,
+    // Blue
+    TYPE_LED_1_SETS,
+
+    // Green, Yellow
+    TYPE_LED_2_SETS,
+
+    // Red, Green, Blue, Yellow, Cyan, Magenta, white
+    TYPE_LED_7_SETS,
+    TYPE_LED_SETS_MAX,
+} led_type_e;
+
+typedef enum {
+    PORT_NONE_BLOCK = 0,
+    PORT_BLOCK      = 1,
+} port_block_status_e;
+
+typedef struct
+{
+    short int val;
+    int status;
+} color_obj_t;
+
+typedef struct  {
+    int type;
+    u8 reg;
+    u8 mask;
+    u8 color_mask;
+    u8 data_type;
+    color_obj_t color_obj[COLOR_VAL_MAX];
+} led_node_t;
+
+
+u8 _mask_shift(u8 val, u8 mask);
+int _cpld_reg_write(struct device *dev, u8 reg, u8 reg_val);
+int _cpld_reg_read(struct device *dev, u8 reg, u8 mask);
+int mux_select_chan(struct i2c_mux_core *muxc, u32 chan);
+int mux_deselect_mux(struct i2c_mux_core *muxc, u32 chan);
+ssize_t idle_state_show(struct device *dev,
+            struct device_attribute *attr,
+            char *buf);
+
+ssize_t idle_state_store(struct device *dev,
+            struct device_attribute *attr,
+            const char *buf, size_t count);
+int mux_init(struct device *dev);
+void mux_cleanup(struct device *dev);
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-cpld-mux.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-cpld-mux.c
new file mode 100644
index 00000000000..1ab7bef78a0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-cpld-mux.c
@@ -0,0 +1,636 @@
+/*
+ * A i2c cpld driver for the ufispace_s9321_64eo
+ *
+ * Copyright (C) 2017-2019 UfiSpace Technology Corporation.
+ * Nonodark Huang <nonodark.huang@ufispace.com>
+ *
+ * Based on i2c-mux-pca954x.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/delay.h>
+
+#include "x86-64-ufispace-s9321-64eo-cpld-main.h"
+
+#define NELEMS(x)  (sizeof(x) / sizeof((x)[0]))
+
+/* Provide specs for the cpld mux types we know about */
+const struct chip_desc chips[] = {
+    [cpld1] = {
+        .nchans = 0,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0)
+        .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0) */
+    },
+    [cpld2] = {
+        .nchans = 32,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0)
+        .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0) */
+    },
+    [cpld3] = {
+        .nchans = 32,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0)
+        .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0) */
+    },
+    [fpga] = {
+        .nchans = 2,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0)
+        .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,17,0) */
+    },
+};
+
+
+typedef u8 chan_map[CPLD_MAX_NCHANS];
+static const chan_map chans_map[] = {
+    [cpld1] = {0},
+    [cpld2] = {
+        // port 0     port 1        port 2        port 3
+        (0b00000001), (0b00000010), (0b00000011), (0b00000100),
+        // port 4     port 5        port 6        port 7
+        (0b00000101), (0b00000110), (0b00000111), (0b00001000),
+        // port 8     port 9        port 10       port 11
+        (0b00001001), (0b00001010), (0b00001011), (0b00001100),
+        // port 12    port 13       port 14       port 15
+        (0b00001101), (0b00001110), (0b00001111), (0b00010000),
+        // port 32    port 33       port 34       port 35
+        (0b00010001), (0b00010010), (0b00010011), (0b00010100),
+        // port 36    port 37       port 38       port 39
+        (0b00010101), (0b00010110), (0b00010111), (0b00011000),
+        // port 40    port 41       port 42       port 43
+        (0b00011001), (0b00011010), (0b00011011), (0b00011100),
+        // port 44    port 45       port 46       port 47
+        (0b00011101), (0b00011110), (0b00011111), (0b00100000),
+    },
+    [cpld3] = {
+        // port 16    port 17       port 18       port 19
+        (0b00000001), (0b00000010), (0b00000011), (0b00000100),
+        // port 20    port 21       port 22       port 23
+        (0b00000101), (0b00000110), (0b00000111), (0b00001000),
+        // port 24    port 25       port 26       port 27
+        (0b00001001), (0b00001010), (0b00001011), (0b00001100),
+        // port 28    port 29       port 30       port 31
+        (0b00001101), (0b00001110), (0b00001111), (0b00010000),
+        // port 48    port 49       port 50       port 51
+        (0b00010001), (0b00010010), (0b00010011), (0b00010100),
+        // port 52    port 53       port 54       port 55
+        (0b00010101), (0b00010110), (0b00010111), (0b00011000),
+        // port 56    port 57       port 58       port 59
+        (0b00011001), (0b00011010), (0b00011011), (0b00011100),
+        // port 60    port 61       port 62       port 63
+        (0b00011101), (0b00011110), (0b00011111), (0b00100000),
+    },
+    [fpga] = {
+        // port 64   port 65
+        (0b0000001), (0b00000010),
+    },
+};
+
+typedef u32 port_map[CPLD_MAX_NCHANS];
+static const port_map ports_map[] = {
+    [cpld1] = {-1},
+    [cpld2] = {
+        0 , 1 , 2 , 3,
+        4 , 5 , 6 , 7,
+        8 , 9 , 10, 11,
+        12, 13, 14, 15,
+        32, 33, 34, 35,
+        36, 37, 38, 39,
+        40, 41, 42, 43,
+        44, 45, 46, 47,
+    },
+    [cpld3] = {
+        16, 17, 18, 19,
+        20, 21, 22, 23,
+        24, 25, 26, 27,
+        28, 29, 30, 31,
+        48, 49, 50, 51,
+        52, 53, 54, 55,
+        56, 57, 58, 59,
+        60, 61, 62, 63,
+    },
+    [fpga] = {
+        64, 65,
+    },
+};
+
+typedef struct  {
+    u16 reg;
+    u16 evt_reg;
+    u8 mask;
+    u8 block_status;
+} port_block_map_t;
+
+static port_block_map_t ports_block_map[] = {
+    [0]=  {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [1]=  {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [2]=  {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [3]=  {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [4]=  {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [5]=  {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [6]=  {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [7]=  {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [8]=  {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [9]=  {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [10]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [11]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [12]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [13]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [14]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [15]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [16]= {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [17]= {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [18]= {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [19]= {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [20]= {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [21]= {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [22]= {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [23]= {.reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_REG  , .evt_reg=CPLD_OSFP_PORT_0_7_16_23_STUCK_EVENT_REG  , .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [24]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [25]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [26]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [27]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [28]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [29]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [30]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [31]= {.reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_REG , .evt_reg=CPLD_OSFP_PORT_8_15_24_31_STUCK_EVENT_REG , .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [32]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [33]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [34]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [35]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [36]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [37]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [38]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [39]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [40]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [41]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [42]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [43]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [44]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [45]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [46]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [47]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [48]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [49]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [50]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [51]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [52]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [53]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [54]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [55]= {.reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_32_39_48_55_STUCK_EVENT_REG, .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [56]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [57]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+    [58]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_0100, PORT_NONE_BLOCK},
+    [59]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0000_1000, PORT_NONE_BLOCK},
+    [60]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0001_0000, PORT_NONE_BLOCK},
+    [61]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0010_0000, PORT_NONE_BLOCK},
+    [62]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_0100_0000, PORT_NONE_BLOCK},
+    [63]= {.reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_REG, .evt_reg=CPLD_OSFP_PORT_40_47_56_63_STUCK_EVENT_REG, .mask=MASK_1000_0000, PORT_NONE_BLOCK},
+    [64]= {.reg=FPGA_MGMT_PORT_0_1_STUCK_REG        , .evt_reg=FPGA_MGMT_PORT_0_1_STUCK_EVENT_REG        , .mask=MASK_0000_0001, PORT_NONE_BLOCK},
+    [65]= {.reg=FPGA_MGMT_PORT_0_1_STUCK_REG        , .evt_reg=FPGA_MGMT_PORT_0_1_STUCK_EVENT_REG        , .mask=MASK_0000_0010, PORT_NONE_BLOCK},
+
+};
+
+int port_chan_get_from_reg(u8 val, int index, int *chan, int *port)
+{
+    u32 i = 0;
+    u32 cmp = 0;
+
+    if(index == fpga) {
+        cmp = val & ~(FPGA_LAN_PORT_RELAY_ENABLE);
+    } else {
+        cmp = val & ~(CPLD_I2C_ENABLE_CHN_SEL);
+    }
+
+    if(cmp != 0) {
+        for(i = 0;i < NELEMS(chans_map[index]);i++) {
+            if(chans_map[index][i] == cmp) {
+                *chan = i;
+                *port = ports_map[index][i];
+                return 0;
+            }
+        }
+    }
+
+    *chan = -1;
+    *port = -1;
+
+    return EINVAL;
+}
+
+int mux_reg_get(struct i2c_adapter *adap, struct i2c_client *client)
+{
+    int ret;
+	union i2c_smbus_data i2c_data;
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int i2c_relay_reg = CPLD_I2C_RELAY_REG;
+    unsigned long stop_time;
+    u32 try_times = 0;
+
+    if(data->index == fpga) {
+        i2c_relay_reg = FPGA_LAN_PORT_RELAY_REG;
+    } else {
+        i2c_relay_reg = CPLD_I2C_RELAY_REG;
+    }
+
+	/* Start a round of trying to claim the bus */
+	stop_time = jiffies + msecs_to_jiffies(CPLD_MUX_TIMEOUT);
+    do {
+        try_times += 1;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0)
+
+        ret = __i2c_smbus_xfer(adap, client->addr, client->flags,
+                    I2C_SMBUS_READ, i2c_relay_reg,
+                    I2C_SMBUS_BYTE_DATA, &i2c_data);
+#else
+        ret = adap->algo->smbus_xfer(adap, client->addr, client->flags,
+                            I2C_SMBUS_READ, i2c_relay_reg,
+                            I2C_SMBUS_BYTE_DATA, &i2c_data);
+
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0) */
+        if(ret != 0) {
+            mdelay(CPLD_MUX_RETRY_WAIT);
+        } else {
+            break;
+        }
+    } while (time_before(jiffies, stop_time));
+
+    if(ret != 0) {
+        pr_info("Fail to get cpld mux. dev_index(%d) reg(0x%x) retry(%d)\n",
+             data->index, i2c_relay_reg, try_times -1);
+    }
+
+	return (ret < 0) ? ret : i2c_data.byte;
+}
+
+static int _port_block_status_get(struct i2c_adapter *adap, struct i2c_client *client, int port, int is_evt)
+{
+    int ret;
+	union i2c_smbus_data i2c_data;
+    int reg = 0;
+    u8 mask = MASK_ALL;
+    unsigned long stop_time;
+    u32 try_times = 0;
+
+    if(port >= 0 && port <= NELEMS(ports_block_map)) {
+        if(is_evt == 1) {
+            reg = ports_block_map[port].evt_reg;
+        } else {
+            reg = ports_block_map[port].reg;
+        }
+        mask = ports_block_map[port].mask;
+    } else {
+        return 0;
+    }
+
+	/* Start a round of trying to claim the bus */
+	stop_time = jiffies + msecs_to_jiffies(CPLD_MUX_TIMEOUT);
+    do {
+        try_times += 1;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0)
+
+        ret = __i2c_smbus_xfer(adap, client->addr, client->flags,
+                    I2C_SMBUS_READ, reg,
+                    I2C_SMBUS_BYTE_DATA, &i2c_data);
+#else
+        ret = adap->algo->smbus_xfer(adap, client->addr, client->flags,
+                            I2C_SMBUS_READ, reg,
+                            I2C_SMBUS_BYTE_DATA, &i2c_data);
+
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0) */
+        if(ret != 0) {
+            mdelay(CPLD_MUX_RETRY_WAIT);
+        } else {
+            break;
+        }
+    } while (time_before(jiffies, stop_time));
+
+    if(ret < 0) {
+        /*
+         *  When the return value is negative, it means the I2C bus is abnormal and we can't
+         *  retrieve the stuck status. We treat this as no block.
+         */
+        return PORT_NONE_BLOCK;
+    } else if(_mask_shift(i2c_data.byte, mask) == 0) {
+        return PORT_BLOCK;
+    } else {
+        return PORT_NONE_BLOCK;
+    }
+}
+
+static int mux_reg_write(struct i2c_adapter *adap, struct i2c_client *client, u8 val, u32 *try_times)
+{
+    int ret = 0;
+    union i2c_smbus_data i2c_data;
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int i2c_relay_reg = CPLD_I2C_RELAY_REG;
+    unsigned long stop_time;
+    u32 tries = 0;
+
+    i2c_data.byte = val;
+    if(data->index == fpga) {
+        i2c_relay_reg = FPGA_LAN_PORT_RELAY_REG;
+    } else {
+        i2c_relay_reg = CPLD_I2C_RELAY_REG;
+    }
+
+	/* Start a round of trying to claim the bus */
+	stop_time = jiffies + msecs_to_jiffies(CPLD_MUX_TIMEOUT);
+    do {
+
+        /*
+        *  Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
+        *  for this as they will try to lock adapter a second time
+        */
+
+        tries += 1;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0)
+        ret = __i2c_smbus_xfer(adap, client->addr, client->flags,
+                    I2C_SMBUS_WRITE, i2c_relay_reg,
+                    I2C_SMBUS_BYTE_DATA, &i2c_data);
+#else
+        ret = adap->algo->smbus_xfer(adap, client->addr, client->flags,
+                            I2C_SMBUS_WRITE, i2c_relay_reg,
+                            I2C_SMBUS_BYTE_DATA, &i2c_data);
+#endif /* #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0) */
+
+        if(ret != 0) {
+            mdelay(CPLD_MUX_RETRY_WAIT);
+        } else {
+            break;
+        }
+    } while (time_before(jiffies, stop_time));
+
+    * try_times = tries;
+    return ret;
+}
+
+int mux_select_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    struct device *dev = &client->dev;
+
+    u8 set_val;
+    int ret = 0;
+    int chan_val = 0;
+
+    switch (data->index)
+    {
+        case cpld1:
+        case cpld2:
+        case cpld3:
+            set_val = CPLD_I2C_ENABLE_CHN_SEL;
+            break;
+        case fpga:
+            set_val = FPGA_LAN_PORT_RELAY_ENABLE;
+            break;
+        default:
+            dev_err(dev, "Invalid device index\n");
+            ret=EINVAL;
+            goto exit;
+    }
+
+    if(chan >= data->chip->nchans) {
+        dev_err(dev, "Invalid channel (%d)>=(%d)\n",chan, data->chip->nchans);
+            ret=EINVAL;
+            goto exit;
+    }
+
+    chan_val = chans_map[data->index][chan];
+    set_val |= chan_val;
+
+    /* Only select the channel if its different from the last channel */
+    if (data->last_chan != set_val) {
+        u32 try_times = 0;
+        int port = ports_map[data->index][chan];
+        ret = mux_reg_write(muxc->parent, client, set_val, &try_times);
+        if(ret != 0) {
+            pr_info("Fail to set cpld mux. port(%d) chan(%d) reg_val(0x%x) retry(%d)\n",
+                port, chan, set_val, try_times -1);
+        } else {
+            if(try_times -1 > 0){
+                pr_info("Success to set cpld mux. port(%d) chan(%d) reg_val(0x%x) retry(%d)\n",
+                    port, chan, set_val, try_times -1);
+            }
+
+            if(_port_block_status_get(muxc->parent, client, port, 0) == PORT_BLOCK) {
+                if(ports_block_map[port].block_status != PORT_BLOCK) {
+                    ports_block_map[port].block_status = PORT_BLOCK;
+                    pr_warn("port(%d) is blocked by CPLD/FPGA\n", port);
+                }
+            } else {
+                if(ports_block_map[port].block_status != PORT_NONE_BLOCK) {
+                    ports_block_map[port].block_status = PORT_NONE_BLOCK;
+                    pr_warn("port(%d) is recovered by the CPLD/FPGA\n", port);
+                }
+            }
+        }
+        data->last_chan = set_val;
+    }
+
+exit:
+    return ret;
+}
+
+int mux_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    s32 idle_state;
+    u32 ret = 0;
+
+    idle_state = READ_ONCE(data->idle_state);
+    if (idle_state >= 0) {
+        /* Set the mux back to a predetermined channel */
+        ret = mux_select_chan(muxc, idle_state);
+    } else if (idle_state == MUX_IDLE_DISCONNECT) {
+        u32 try_times = 0;
+        int port = ports_map[data->index][chan];
+
+        /* Deselect active channel */
+        if(data->index == fpga) {
+            data->last_chan = FPGA_MUX_CHN_OFF;
+        } else {
+            data->last_chan = CPLD_MUX_CHN_OFF;
+        }
+        ret = mux_reg_write(muxc->parent, client, data->last_chan, &try_times);
+        if(ret != 0) {
+            pr_info("Fail to close cpld mux. port(%d) chan(%d) retry(%d)\n",
+                port, chan, try_times -1);
+
+        } else {
+            if(try_times -1 > 0){
+                pr_info("Success to close cpld mux. port(%d) chan(%d) retry(%d)\n",
+                    port, chan, try_times -1);
+            }
+        }
+    }
+
+    return ret;
+}
+
+ssize_t idle_state_show(struct device *dev,
+                    struct device_attribute *attr,
+                    char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int rv = 0;
+
+    rv = sprintf(buf, "%d\n", READ_ONCE(data->idle_state));
+    return rv;
+}
+
+ssize_t idle_state_store(struct device *dev,
+                struct device_attribute *attr,
+                const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int val;
+    int ret;
+
+    ret = kstrtoint(buf, 0, &val);
+    if (ret < 0)
+        return ret;
+
+    if (val != MUX_IDLE_AS_IS && val != MUX_IDLE_DISCONNECT &&
+        (val < 0 || val >= data->chip->nchans))
+        return -EINVAL;
+
+    i2c_lock_bus(muxc->parent, I2C_LOCK_SEGMENT);
+
+    WRITE_ONCE(data->idle_state, val);
+
+    /*
+     * Set the mux into a state consistent with the new
+     * idle_state.
+     */
+    if (data->last_chan || val != MUX_IDLE_DISCONNECT)
+        ret = mux_deselect_mux(muxc, 0);
+
+    i2c_unlock_bus(muxc->parent, I2C_LOCK_SEGMENT);
+
+    return ret < 0 ? ret : count;
+}
+
+int mux_init(struct device *dev)
+{
+    int ret = 0;
+    u8 reg_val = 0;
+    int num = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+    int i2c_relay_reg = CPLD_I2C_RELAY_REG;
+    u32 chan_off = CPLD_MUX_CHN_OFF;
+
+    data->chip = &chips[data->index];
+
+    data->idle_state = MUX_IDLE_DISCONNECT;
+    if (device_property_read_u32(dev, "idle-state", &data->idle_state)) {
+        if (device_property_read_bool(dev, "i2c-mux-idle-disconnect"))
+            data->idle_state = MUX_IDLE_DISCONNECT;
+    }
+
+    /*
+    * Write the mux register at addr to verify
+    * that the mux is in fact present. This also
+    * initializes the mux to a channel
+    * or disconnected state.
+    */
+
+    if(data->chip->nchans > 0){
+        if(data->index == fpga) {
+            i2c_relay_reg = FPGA_LAN_PORT_RELAY_REG;
+            // close multiplexer channel
+            chan_off = FPGA_MUX_CHN_OFF;
+        } else {
+            i2c_relay_reg = CPLD_I2C_RELAY_REG;
+            // close multiplexer channel
+            chan_off = CPLD_MUX_CHN_OFF;
+            // enable mux functionality for the legacy I2C interface instead of using FPGA.
+            ret = _cpld_reg_read(dev, CPLD_I2C_CONTROL_REG, MASK_ALL);
+            if (ret < 0) {
+                dev_err(dev, "Fail to enable mux functionality\n");
+                goto exit;
+            }
+            reg_val = (u8)ret;
+            reg_val |= (CPLD_I2C_ENABLE_BRIDGE);
+            ret = _cpld_reg_write(dev, CPLD_I2C_CONTROL_REG, reg_val);
+            if (ret < 0) {
+                dev_err(dev, "Fail to enable mux functionality\n");
+                goto exit;
+            }
+        }
+
+        if (data->idle_state >= 0) {
+            /* Set the mux back to a predetermined channel */
+            ret = mux_select_chan(muxc, data->idle_state);
+        } else {
+            u32 try_times = 0;
+            data->last_chan = chan_off;
+            ret = mux_reg_write(muxc->parent, client, data->last_chan, &try_times);
+        }
+
+        if (ret < 0) {
+            goto exit;
+        }
+    }
+
+    /* Now create an adapter for each channel */
+    for (num = 0; num < data->chip->nchans; num++) {
+        ret = i2c_mux_add_adapter(muxc, 0, num, 0);
+        if (ret)
+            goto exit;
+    }
+
+    return 0;
+
+exit:
+    mux_cleanup(dev);
+    return ret;
+}
+
+void mux_cleanup(struct device *dev)
+{
+    u8 reg_val = 0;
+    int ret = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct cpld_data *data = i2c_mux_priv(muxc);
+
+    if(data->index == fpga) {
+        _cpld_reg_write(dev, FPGA_LAN_PORT_RELAY_REG, FPGA_MUX_CHN_OFF);
+
+    } else {
+        _cpld_reg_write(dev, CPLD_I2C_RELAY_REG, CPLD_MUX_CHN_OFF);
+
+        ret = _cpld_reg_read(dev, CPLD_I2C_CONTROL_REG, MASK_ALL);
+        reg_val = (ret >= 0) ?(u8)ret:0;
+        reg_val &= ~(CPLD_I2C_ENABLE_BRIDGE);
+        _cpld_reg_write(dev, CPLD_I2C_CONTROL_REG, reg_val);
+    }
+    i2c_mux_del_adapters(muxc);
+}
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-lpc.c
new file mode 100644
index 00000000000..6c1ea7877dd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-lpc.c
@@ -0,0 +1,934 @@
+/*
+ * A lpc driver for the ufispace_s9321_64eo
+ *
+ * Copyright (C) 2017-2019 UfiSpace Technology Corporation.
+ * Wade He <wade.ce.he@ufispace.com>
+ * Nonodark Huang <nonodark.huang@ufispace.com>
+ *
+ * Based on ad7414.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/gpio.h>
+
+#if !defined(SENSOR_DEVICE_ATTR_RO)
+#define SENSOR_DEVICE_ATTR_RO(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0444, _func##_show, NULL, _index)
+#endif
+
+#if !defined(SENSOR_DEVICE_ATTR_RW)
+#define SENSOR_DEVICE_ATTR_RW(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0644, _func##_show, _func##_store, _index)
+
+#endif
+
+#if !defined(SENSOR_DEVICE_ATTR_WO)
+#define SENSOR_DEVICE_ATTR_WO(_name, _func, _index)		\
+	SENSOR_DEVICE_ATTR(_name, 0200, NULL, _func##_store, _index)
+#endif
+
+#define BSP_LOG_R(fmt, args...) \
+    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...) \
+    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+
+#define _DEVICE_ATTR(_name)     \
+    &sensor_dev_attr_##_name.dev_attr.attr
+
+#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
+
+#define DRIVER_NAME "x86_64_ufispace_s9321_64eo_lpc"
+
+/* LPC registers */
+#define REG_BASE_MB                       0xE00
+#define REG_BASE_CPU                      0x600
+#define REG_BASE_I2C_ALERT                0x700
+
+/* 
+ *  Normally, the LPC register range is 0x00-0xff.
+ *  Therefore, we define the invalid address 0x100 as REG_NONE
+ */
+#define REG_NONE                          0x100
+
+//MB CPLD
+#define REG_MB_BRD_ID_0                   (REG_BASE_MB + 0x00)
+#define REG_MB_BRD_ID_1                   (REG_BASE_MB + 0x01)
+#define REG_MB_CPLD_VERSION               (REG_BASE_MB + 0x02)
+#define REG_MB_CPLD_BUILD                 (REG_BASE_MB + 0x04)
+#define REG_MB_MUX_RESET                  (REG_BASE_MB + 0x46)
+#define REG_MB_MUX_CTRL                   (REG_BASE_MB + 0x5C)
+
+//CPU CPLD
+#define REG_CPU_CPLD_VERSION              (REG_BASE_CPU + 0x00)
+#define REG_CPU_STATUS_0                  (REG_BASE_CPU + 0x01)
+#define REG_CPU_STATUS_1                  (REG_BASE_CPU + 0x02)
+#define REG_CPU_CTRL_0                    (REG_BASE_CPU + 0x03)
+#define REG_CPU_CTRL_1                    (REG_BASE_CPU + 0x04)
+#define REG_CPU_CPLD_BUILD                (REG_BASE_CPU + 0xE0)
+
+//I2C Alert
+#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x80)
+
+#define MASK_ALL             (0xFF)
+#define MASK_NONE            (0x00)
+#define MASK_0000_0011       (0x03)
+#define MASK_0000_0100       (0x04)
+#define MASK_0000_0111       (0x07)
+#define MASK_0001_1000       (0x18)
+#define MASK_0010_0000       (0x20)
+#define MASK_0011_0111       (0x37)
+#define MASK_0011_1000       (0x38)
+#define MASK_0011_1111       (0x3F)
+#define MASK_0100_0000       (0x40)
+#define MASK_1000_0000       (0x80)
+#define MASK_1100_0000       (0xC0)
+
+#define LPC_MDELAY                        (5)
+#define MDELAY_RESET_INTERVAL             (100)
+#define MDELAY_RESET_FINISH               (500)
+
+/* LPC sysfs attributes index  */
+enum lpc_sysfs_attributes {
+    //MB CPLD
+    ATT_MB_BRD_ID_0,
+    ATT_MB_BRD_SKU_ID,
+    ATT_MB_BRD_ID_1,
+    ATT_MB_BRD_HW_ID,
+    ATT_MB_BRD_DEPH_ID,
+    ATT_MB_BRD_BUILD_ID,
+    ATT_MB_BRD_ID_TYPE,
+    ATT_MB_CPLD_1_MINOR_VER,
+    ATT_MB_CPLD_1_MAJOR_VER,
+    ATT_MB_CPLD_1_BUILD_VER,
+    ATT_MB_CPLD_1_VERSION_H,
+    ATT_MB_MUX_RESET_ALL,
+    ATT_MB_MUX_CTRL,
+
+    //CPU CPLD
+    ATT_CPU_CPLD_VERSION,
+    ATT_CPU_CPLD_MINOR_VER,
+    ATT_CPU_CPLD_MAJOR_VER,
+    ATT_CPU_CPLD_BUILD_VER,
+    ATT_CPU_CPLD_VERSION_H,
+    ATT_CPU_BIOS_BOOT_ROM,
+    ATT_CPU_BIOS_BOOT_CFG,
+
+    //I2C Alert
+    ATT_ALERT_STATUS,
+
+    //BSP
+    ATT_BSP_VERSION,
+    ATT_BSP_DEBUG,
+    ATT_BSP_PR_INFO,
+    ATT_BSP_PR_ERR,
+    ATT_BSP_GPIO_MAX,
+    ATT_BSP_FPGA_PCI_ENABLE,
+
+    ATT_MAX
+};
+
+enum data_type {
+    DATA_HEX,
+    DATA_DEC,
+    DATA_S_DEC,
+    DATA_UNK,
+};
+
+typedef struct  {
+    u16 reg;
+    u8 mask;
+    u8 data_type;
+} attr_reg_map_t;
+
+enum bsp_log_types {
+    LOG_NONE,
+    LOG_RW,
+    LOG_READ,
+    LOG_WRITE,
+    LOG_SYS
+};
+
+enum bsp_log_ctrl {
+    LOG_DISABLE,
+    LOG_ENABLE
+};
+
+struct lpc_data_s {
+    struct mutex    access_lock;
+};
+
+attr_reg_map_t attr_reg[]= {
+
+    //MB CPLD
+    [ATT_MB_BRD_ID_0]          = {REG_MB_BRD_ID_0     , MASK_ALL      , DATA_HEX},
+    [ATT_MB_BRD_SKU_ID]        = {REG_MB_BRD_ID_0     , MASK_ALL      , DATA_DEC},
+    [ATT_MB_BRD_ID_1]          = {REG_MB_BRD_ID_1     , MASK_ALL      , DATA_HEX},
+    [ATT_MB_BRD_HW_ID]         = {REG_MB_BRD_ID_1     , MASK_0000_0011, DATA_DEC},
+    [ATT_MB_BRD_DEPH_ID]       = {REG_MB_BRD_ID_1     , MASK_0000_0100, DATA_DEC},
+    [ATT_MB_BRD_BUILD_ID]      = {REG_MB_BRD_ID_1     , MASK_0011_1000, DATA_DEC},
+    [ATT_MB_BRD_ID_TYPE]       = {REG_MB_BRD_ID_1     , MASK_1000_0000, DATA_DEC},
+    [ATT_MB_CPLD_1_MINOR_VER]  = {REG_MB_CPLD_VERSION , MASK_0011_1111, DATA_DEC},
+    [ATT_MB_CPLD_1_MAJOR_VER]  = {REG_MB_CPLD_VERSION , MASK_1100_0000, DATA_DEC},
+    [ATT_MB_CPLD_1_BUILD_VER]  = {REG_MB_CPLD_BUILD   , MASK_ALL      , DATA_DEC},
+    [ATT_MB_CPLD_1_VERSION_H]  = {REG_NONE            , MASK_NONE     , DATA_UNK},
+    [ATT_MB_MUX_RESET_ALL]     = {REG_MB_MUX_RESET    , MASK_ALL      , DATA_DEC},
+    [ATT_MB_MUX_CTRL]          = {REG_MB_MUX_CTRL     , MASK_ALL      , DATA_HEX},
+
+    //CPU CPLD
+    [ATT_CPU_CPLD_VERSION]    = {REG_CPU_CPLD_VERSION , MASK_ALL      , DATA_HEX},
+    [ATT_CPU_CPLD_MINOR_VER]  = {REG_CPU_CPLD_VERSION , MASK_0011_1111, DATA_DEC},
+    [ATT_CPU_CPLD_MAJOR_VER]  = {REG_CPU_CPLD_VERSION , MASK_1100_0000, DATA_DEC},
+    [ATT_CPU_CPLD_BUILD_VER]  = {REG_CPU_CPLD_BUILD   , MASK_ALL      , DATA_DEC},
+    [ATT_CPU_CPLD_VERSION_H]  = {REG_NONE             , MASK_NONE     , DATA_UNK},
+    [ATT_CPU_BIOS_BOOT_ROM]   = {REG_CPU_STATUS_1     , MASK_1000_0000, DATA_DEC},
+    [ATT_CPU_BIOS_BOOT_CFG]   = {REG_CPU_CTRL_1       , MASK_1000_0000, DATA_DEC},
+
+    //I2C Alert
+    [ATT_ALERT_STATUS]        = {REG_ALERT_STATUS     , MASK_0010_0000, DATA_DEC},
+
+    //BSP
+    [ATT_BSP_VERSION]         = {REG_NONE             , MASK_NONE     , DATA_UNK},
+    [ATT_BSP_DEBUG]           = {REG_NONE             , MASK_NONE     , DATA_UNK},
+    [ATT_BSP_PR_INFO]         = {REG_NONE             , MASK_NONE     , DATA_UNK},
+    [ATT_BSP_PR_ERR]          = {REG_NONE             , MASK_NONE     , DATA_UNK},
+    [ATT_BSP_GPIO_MAX]        = {REG_NONE             , MASK_NONE     , DATA_DEC},
+    [ATT_BSP_FPGA_PCI_ENABLE] = {REG_NONE             , MASK_NONE     , DATA_DEC},
+};
+
+struct lpc_data_s *lpc_data;
+char bsp_version[16]="";
+char bsp_debug[2]="0";
+char bsp_fpga_pci_enable[3] = "-1";
+u8 enable_log_read  = LOG_DISABLE;
+u8 enable_log_write = LOG_DISABLE;
+u8 enable_log_sys   = LOG_ENABLE;
+
+/* reg shift */
+static u8 _shift(u8 mask)
+{
+    int i=0, mask_one=1;
+
+    for(i=0; i<8; ++i) {
+        if ((mask & mask_one) == 1)
+            return i;
+        else
+            mask >>= 1;
+    }
+
+    return -1;
+}
+
+/* reg mask and shift */
+static u8 _mask_shift(u8 val, u8 mask)
+{
+    int shift=0;
+
+    shift = _shift(mask);
+
+    return (val & mask) >> shift;
+}
+
+static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
+{
+    if (bit_val == 0)
+        reg_val = reg_val & ~(1 << bit);
+    else
+        reg_val = reg_val | (1 << bit);
+    return reg_val;
+}
+
+static u8 _parse_data(char *buf, unsigned int data, u8 data_type)
+{
+    if(buf == NULL) {
+        return -1;
+    }
+
+    if(data_type == DATA_HEX) {
+        return sprintf(buf, "0x%02x", data);
+    } else if(data_type == DATA_DEC) {
+        return sprintf(buf, "%u", data);
+    } else {
+        return -1;
+    }
+    return 0;
+}
+
+static int _bsp_log(u8 log_type, char *fmt, ...)
+{
+    if ((log_type==LOG_READ  && enable_log_read) ||
+        (log_type==LOG_WRITE && enable_log_write) ||
+        (log_type==LOG_SYS && enable_log_sys) ) {
+        va_list args;
+        int r;
+
+        va_start(args, fmt);
+        r = vprintk(fmt, args);
+        va_end(args);
+
+        return r;
+    } else {
+        return 0;
+    }
+}
+
+static int _bsp_log_config(u8 log_type)
+{
+    switch(log_type) {
+        case LOG_NONE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_RW:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        case LOG_READ:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_WRITE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+static void _outb(u8 data, u16 port)
+{
+    outb(data, port);
+    mdelay(LPC_MDELAY);
+}
+
+/* get lpc register value */
+static u8 _lpc_reg_read(u16 reg, u8 mask)
+{
+    u8 reg_val=0x0, reg_mk_shf_val = 0x0;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val = inb(reg);
+    mutex_unlock(&lpc_data->access_lock);
+
+    reg_mk_shf_val = _mask_shift(reg_val, mask);
+
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x, mask=0x%02x, reg_mk_shf_val=0x%02x", reg, reg_val, mask, reg_mk_shf_val);
+
+    return reg_mk_shf_val;
+}
+
+/* get lpc register value */
+static ssize_t lpc_reg_read(u16 reg, u8 mask, char *buf, u8 data_type)
+{
+    u8 reg_val;
+    int len=0;
+
+    reg_val = _lpc_reg_read(reg, mask);
+
+    // may need to change to hex value ?
+    len=_parse_data(buf, reg_val, data_type);
+
+    return len;
+}
+
+/* set lpc register value */
+static ssize_t lpc_reg_write(u16 reg, u8 mask, const char *buf, size_t count, u8 data_type)
+{
+    u8 reg_val, reg_val_now, shift;
+
+    if (kstrtou8(buf, 0, &reg_val) < 0) {
+        if(data_type == DATA_S_DEC) {
+            if (kstrtos8(buf, 0, &reg_val) < 0) {
+                return -EINVAL;
+            }
+        } else {
+            return -EINVAL;
+        }
+    }
+
+    //apply continuous bits operation if mask is specified, discontinuous bits are not supported
+    if (mask != MASK_ALL) {
+        reg_val_now = _lpc_reg_read(reg, MASK_ALL);
+        //clear bits in reg_val_now by the mask
+        reg_val_now &= ~mask;
+        //get bit shift by the mask
+        shift = _shift(mask);
+        //calculate new reg_val
+        reg_val = _bit_operation(reg_val_now, shift, reg_val);
+    }
+
+    mutex_lock(&lpc_data->access_lock);
+
+    _outb(reg_val, reg);
+
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_W("reg=0x%03x, reg_val=0x%02x, mask=0x%02x", reg, reg_val, mask);
+
+    return count;
+}
+
+/* get bsp value */
+static ssize_t bsp_read(char *buf, char *str)
+{
+    ssize_t len=0;
+
+    mutex_lock(&lpc_data->access_lock);
+    len=sprintf(buf, "%s", str);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg_val=%s", str);
+
+    return len;
+}
+
+/* set bsp value */
+static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count)
+{
+    mutex_lock(&lpc_data->access_lock);
+    snprintf(str, str_len, "%s", buf);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_W("reg_val=%s", str);
+
+    return count;
+}
+
+/* get gpio max value */
+static ssize_t gpio_max_show(struct device *dev,
+                    struct device_attribute *da,
+                    char *buf)
+{
+    u8 data_type=DATA_UNK;
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    if (attr->index == ATT_BSP_GPIO_MAX) {
+        data_type = attr_reg[attr->index].data_type;
+        return _parse_data(buf, ARCH_NR_GPIOS-1, data_type);
+    }
+    return -1;
+}
+
+/* get mb cpld version in human readable format */
+static ssize_t cpld_version_h_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    unsigned int attr_major = 0;
+    unsigned int attr_minor = 0;
+    unsigned int attr_build = 0;
+
+    switch (attr->index) {
+        case ATT_MB_CPLD_1_VERSION_H:
+            attr_major = ATT_MB_CPLD_1_MAJOR_VER;
+            attr_minor = ATT_MB_CPLD_1_MINOR_VER;
+            attr_build = ATT_MB_CPLD_1_BUILD_VER;
+            break;
+        case ATT_CPU_CPLD_VERSION_H:
+            attr_major = ATT_CPU_CPLD_MAJOR_VER;
+            attr_minor = ATT_CPU_CPLD_MINOR_VER;
+            attr_build = ATT_CPU_CPLD_BUILD_VER;
+            break;
+        default:
+            return -1;
+    }
+
+    return sprintf(buf, "%d.%02d.%03d", _lpc_reg_read(attr_reg[attr_major].reg, attr_reg[attr_major].mask),
+                                        _lpc_reg_read(attr_reg[attr_minor].reg, attr_reg[attr_minor].mask),
+                                        _lpc_reg_read(attr_reg[attr_build].reg, attr_reg[attr_build].mask));
+
+}
+
+/* get lpc register value */
+static ssize_t lpc_callback_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_NONE;
+    u8 data_type=DATA_UNK;
+
+    switch (attr->index) {
+        //MB CPLD
+        case ATT_MB_BRD_ID_0:
+        case ATT_MB_BRD_SKU_ID:
+        case ATT_MB_BRD_ID_1:
+        case ATT_MB_BRD_HW_ID:
+        case ATT_MB_BRD_DEPH_ID:
+        case ATT_MB_BRD_BUILD_ID:
+        case ATT_MB_BRD_ID_TYPE:
+        case ATT_MB_CPLD_1_MINOR_VER:
+        case ATT_MB_CPLD_1_MAJOR_VER:
+        case ATT_MB_CPLD_1_BUILD_VER:
+        case ATT_MB_MUX_CTRL:
+
+        //CPU CPLD
+        case ATT_CPU_CPLD_VERSION:
+        case ATT_CPU_CPLD_MINOR_VER:
+        case ATT_CPU_CPLD_MAJOR_VER:
+        case ATT_CPU_CPLD_BUILD_VER:
+        case ATT_CPU_BIOS_BOOT_ROM:
+        case ATT_CPU_BIOS_BOOT_CFG:
+
+        //I2C Alert
+        case ATT_ALERT_STATUS:
+
+        //BSP
+        case ATT_BSP_GPIO_MAX:
+            reg = attr_reg[attr->index].reg;
+            mask= attr_reg[attr->index].mask;
+            data_type = attr_reg[attr->index].data_type;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return lpc_reg_read(reg, mask, buf, data_type);
+}
+
+/* set lpc register value */
+static ssize_t lpc_callback_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_NONE;
+    u8 data_type=DATA_UNK;
+
+    switch (attr->index) {
+        // MB CPLD
+        case ATT_MB_MUX_CTRL:
+            reg = attr_reg[attr->index].reg;
+            mask= attr_reg[attr->index].mask;
+            data_type = attr_reg[attr->index].data_type;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return lpc_reg_write(reg, mask, buf, count, data_type);
+
+}
+
+/* get bsp parameter value */
+static ssize_t bsp_callback_show(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    char *str=NULL;
+
+    switch (attr->index) {
+        case ATT_BSP_VERSION:
+            str = bsp_version;
+            break;
+        case ATT_BSP_DEBUG:
+            str = bsp_debug;
+            break;
+        case ATT_BSP_FPGA_PCI_ENABLE:
+            str = bsp_fpga_pci_enable;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return bsp_read(buf, str);
+}
+
+/* set bsp parameter value */
+static ssize_t bsp_callback_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+    u16 reg = 0;
+    u8 bsp_debug_u8 = 0;
+
+    switch (attr->index) {
+        case ATT_BSP_VERSION:
+            str = bsp_version;
+            str_len = sizeof(bsp_version);
+            break;
+        case ATT_BSP_DEBUG:
+            if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+                return -EINVAL;
+            } else if (_bsp_log_config(bsp_debug_u8) < 0) {
+                return -EINVAL;
+            }
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        case ATT_BSP_FPGA_PCI_ENABLE:
+            if (kstrtou16(buf, 0, &reg) < 0) {
+                return -EINVAL;
+            } else {
+                if (reg != 1 && reg != 0)
+                    return -EINVAL;
+            }
+
+            // Only one chance for configuration.
+            if(strncmp(bsp_fpga_pci_enable, "-1", sizeof(bsp_fpga_pci_enable)) == 0) {
+                str = bsp_fpga_pci_enable;
+                str_len = sizeof(bsp_fpga_pci_enable);
+            } else {
+                return -EINVAL;
+            }
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    return bsp_write(buf, str, str_len, count);
+}
+
+static ssize_t bsp_pr_callback_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len = strlen(buf);
+
+    if(str_len <= 0)
+        return str_len;
+
+    switch (attr->index) {
+        case ATT_BSP_PR_INFO:
+            BSP_PR(KERN_INFO, "%s", buf);
+            break;
+        case ATT_BSP_PR_ERR:
+            BSP_PR(KERN_ERR, "%s", buf);
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    return str_len;
+}
+
+/* set mux_reset register value */
+static ssize_t mux_reset_all_store(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_NONE;
+    u8 val = 0;
+    u8 reg_val = 0;
+    static int mux_reset_flag = 0;
+
+    switch (attr->index) {
+        case ATT_MB_MUX_RESET_ALL:
+            reg = attr_reg[attr->index].reg;;
+            mask = attr_reg[attr->index].mask;;
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    if (kstrtou8(buf, 0, &val) < 0)
+        return -EINVAL;
+
+    if (mux_reset_flag == 0) {
+        if (val == 0) {
+            mutex_lock(&lpc_data->access_lock);
+            mux_reset_flag = 1;
+            BSP_LOG_W("i2c mux reset is triggered...");
+
+            //reset mux
+            reg_val = inb(reg);
+            outb((reg_val & (u8)(~mask)), reg);
+            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & (u8)(~mask));
+
+            mdelay(MDELAY_RESET_INTERVAL);
+
+            //unset mux
+            outb((reg_val | mask), reg);
+            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask);
+
+            mdelay(MDELAY_RESET_FINISH);
+            mux_reset_flag = 0;
+            mutex_unlock(&lpc_data->access_lock);
+        } else {
+            return -EINVAL;
+        }
+    } else {
+        BSP_LOG_W("i2c mux is resetting... (ignore)");
+        mutex_lock(&lpc_data->access_lock);
+        mutex_unlock(&lpc_data->access_lock);
+    }
+    return count;
+}
+
+//SENSOR_DEVICE_ATTR - MB
+static SENSOR_DEVICE_ATTR_RO(board_id_0          , lpc_callback       , ATT_MB_BRD_ID_0);
+static SENSOR_DEVICE_ATTR_RO(board_sku_id        , lpc_callback       , ATT_MB_BRD_SKU_ID);
+static SENSOR_DEVICE_ATTR_RO(board_id_1          , lpc_callback       , ATT_MB_BRD_ID_1);
+static SENSOR_DEVICE_ATTR_RO(board_hw_id         , lpc_callback       , ATT_MB_BRD_HW_ID);
+static SENSOR_DEVICE_ATTR_RO(board_deph_id       , lpc_callback       , ATT_MB_BRD_DEPH_ID);
+static SENSOR_DEVICE_ATTR_RO(board_build_id      , lpc_callback       , ATT_MB_BRD_BUILD_ID);
+static SENSOR_DEVICE_ATTR_RO(board_id_type       , lpc_callback       , ATT_MB_BRD_ID_TYPE);
+static SENSOR_DEVICE_ATTR_RO(mb_cpld_1_minor_ver , lpc_callback       , ATT_MB_CPLD_1_MINOR_VER);
+static SENSOR_DEVICE_ATTR_RO(mb_cpld_1_major_ver , lpc_callback       , ATT_MB_CPLD_1_MAJOR_VER);
+static SENSOR_DEVICE_ATTR_RO(mb_cpld_1_build_ver , lpc_callback       , ATT_MB_CPLD_1_BUILD_VER);
+static SENSOR_DEVICE_ATTR_RO(mb_cpld_1_version_h , cpld_version_h     , ATT_MB_CPLD_1_VERSION_H);
+static SENSOR_DEVICE_ATTR_WO(mux_reset_all       , mux_reset_all      , ATT_MB_MUX_RESET_ALL);
+static SENSOR_DEVICE_ATTR_RW(mux_ctrl            , lpc_callback       , ATT_MB_MUX_CTRL);
+
+//SENSOR_DEVICE_ATTR - CPU
+static SENSOR_DEVICE_ATTR_RO(cpu_cpld_version    , lpc_callback       , ATT_CPU_CPLD_VERSION);
+static SENSOR_DEVICE_ATTR_RO(cpu_cpld_minor_ver  , lpc_callback       , ATT_CPU_CPLD_MINOR_VER);
+static SENSOR_DEVICE_ATTR_RO(cpu_cpld_major_ver  , lpc_callback       , ATT_CPU_CPLD_MAJOR_VER);
+static SENSOR_DEVICE_ATTR_RO(cpu_cpld_build_ver  , lpc_callback       , ATT_CPU_CPLD_BUILD_VER);
+static SENSOR_DEVICE_ATTR_RO(cpu_cpld_version_h  , cpld_version_h     , ATT_CPU_CPLD_VERSION_H);
+static SENSOR_DEVICE_ATTR_RO(boot_rom            , lpc_callback       , ATT_CPU_BIOS_BOOT_ROM);
+static SENSOR_DEVICE_ATTR_RO(boot_cfg            , lpc_callback       , ATT_CPU_BIOS_BOOT_CFG);
+
+//SENSOR_DEVICE_ATTR - I2C Alert
+static SENSOR_DEVICE_ATTR_RO(alert_status        , lpc_callback       , ATT_ALERT_STATUS);
+
+//SENSOR_DEVICE_ATTR - BSP
+static SENSOR_DEVICE_ATTR_RW(bsp_version         , bsp_callback       , ATT_BSP_VERSION);
+static SENSOR_DEVICE_ATTR_RW(bsp_debug           , bsp_callback       , ATT_BSP_DEBUG);
+static SENSOR_DEVICE_ATTR_WO(bsp_pr_info         , bsp_pr_callback    , ATT_BSP_PR_INFO);
+static SENSOR_DEVICE_ATTR_WO(bsp_pr_err          , bsp_pr_callback    , ATT_BSP_PR_ERR);
+static SENSOR_DEVICE_ATTR_RO(bsp_gpio_max        , gpio_max           , ATT_BSP_GPIO_MAX);
+static SENSOR_DEVICE_ATTR_RW(bsp_fpga_pci_enable , bsp_callback       , ATT_BSP_FPGA_PCI_ENABLE);
+
+static struct attribute *mb_cpld_attrs[] = {
+    _DEVICE_ATTR(board_id_0),
+    _DEVICE_ATTR(board_sku_id),
+    _DEVICE_ATTR(board_id_1),
+    _DEVICE_ATTR(board_hw_id),
+    _DEVICE_ATTR(board_deph_id),
+    _DEVICE_ATTR(board_build_id),
+    _DEVICE_ATTR(board_id_type),
+    _DEVICE_ATTR(mb_cpld_1_minor_ver),
+    _DEVICE_ATTR(mb_cpld_1_major_ver),
+    _DEVICE_ATTR(mb_cpld_1_build_ver),
+    _DEVICE_ATTR(mb_cpld_1_version_h),
+    _DEVICE_ATTR(mux_reset_all),
+    _DEVICE_ATTR(mux_ctrl),
+    NULL,
+};
+
+static struct attribute *cpu_cpld_attrs[] = {
+    _DEVICE_ATTR(cpu_cpld_version),
+    _DEVICE_ATTR(cpu_cpld_minor_ver),
+    _DEVICE_ATTR(cpu_cpld_major_ver),
+    _DEVICE_ATTR(cpu_cpld_build_ver),
+    _DEVICE_ATTR(cpu_cpld_version_h),
+    NULL,
+};
+
+static struct attribute *bios_attrs[] = {
+    _DEVICE_ATTR(boot_rom),
+    _DEVICE_ATTR(boot_cfg),
+    NULL,
+};
+
+static struct attribute *i2c_alert_attrs[] = {
+    _DEVICE_ATTR(alert_status),
+    NULL,
+};
+
+static struct attribute *bsp_attrs[] = {
+    _DEVICE_ATTR(bsp_version),
+    _DEVICE_ATTR(bsp_debug),
+    _DEVICE_ATTR(bsp_pr_info),
+    _DEVICE_ATTR(bsp_pr_err),
+    _DEVICE_ATTR(bsp_gpio_max),
+    _DEVICE_ATTR(bsp_fpga_pci_enable),
+    NULL,
+};
+
+static struct attribute_group mb_cpld_attr_grp = {
+    .name = "mb_cpld",
+    .attrs = mb_cpld_attrs,
+};
+
+static struct attribute_group cpu_cpld_attr_grp = {
+    .name = "cpu_cpld",
+    .attrs = cpu_cpld_attrs,
+};
+
+static struct attribute_group bios_attr_grp = {
+    .name = "bios",
+    .attrs = bios_attrs,
+};
+
+static struct attribute_group i2c_alert_attr_grp = {
+    .name = "i2c_alert",
+    .attrs = i2c_alert_attrs,
+};
+
+static struct attribute_group bsp_attr_grp = {
+    .name = "bsp",
+    .attrs = bsp_attrs,
+};
+
+static void lpc_dev_release( struct device * dev)
+{
+    return;
+}
+
+static struct platform_device lpc_dev = {
+    .name           = DRIVER_NAME,
+    .id             = -1,
+    .dev = {
+        .release = lpc_dev_release,
+    }
+};
+
+static int lpc_drv_probe(struct platform_device *pdev)
+{
+    int i = 0, grp_num = 5;
+    int err[5] = {0};
+    struct attribute_group *grp;
+
+    lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s),
+                    GFP_KERNEL);
+    if (!lpc_data)
+        return -ENOMEM;
+
+    mutex_init(&lpc_data->access_lock);
+
+    for (i=0; i<grp_num; ++i) {
+        switch (i) {
+            case 0:
+                grp = &mb_cpld_attr_grp;
+                break;
+            case 1:
+                grp = &cpu_cpld_attr_grp;
+                break;
+            case 2:
+                grp = &bios_attr_grp;
+                break;
+            case 3:
+                grp = &i2c_alert_attr_grp;
+                break;
+            case 4:
+                grp = &bsp_attr_grp;
+                break;
+            default:
+                break;
+        }
+
+        err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
+        if (err[i]) {
+            printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
+            goto exit;
+        } else {
+            continue;
+        }
+    }
+
+    return 0;
+
+exit:
+    for (i=0; i<grp_num; ++i) {
+        switch (i) {
+            case 0:
+                grp = &mb_cpld_attr_grp;
+                break;
+            case 1:
+                grp = &cpu_cpld_attr_grp;
+                break;
+            case 2:
+                grp = &bios_attr_grp;
+                break;
+            case 3:
+                grp = &i2c_alert_attr_grp;
+                break;
+            case 4:
+                grp = &bsp_attr_grp;
+                break;
+            default:
+                break;
+        }
+
+        sysfs_remove_group(&pdev->dev.kobj, grp);
+        if (!err[i]) {
+            //remove previous successful cases
+            continue;
+        } else {
+            //remove first failed case, then return
+            return err[i];
+        }
+    }
+    return 0;
+}
+
+static int lpc_drv_remove(struct platform_device *pdev)
+{
+    sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp);
+
+    return 0;
+}
+
+static struct platform_driver lpc_drv = {
+    .probe  = lpc_drv_probe,
+    .remove = __exit_p(lpc_drv_remove),
+    .driver = {
+    .name   = DRIVER_NAME,
+    },
+};
+
+int lpc_init(void)
+{
+    int err = 0;
+
+    err = platform_driver_register(&lpc_drv);
+    if (err) {
+    	printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
+                __func__, __LINE__, err);
+
+    	return err;
+    }
+
+    err = platform_device_register(&lpc_dev);
+    if (err) {
+    	printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
+                __func__, __LINE__, err);
+    	platform_driver_unregister(&lpc_drv);
+    	return err;
+    }
+
+    return err;
+}
+
+void lpc_exit(void)
+{
+    platform_driver_unregister(&lpc_drv);
+    platform_device_unregister(&lpc_dev);
+}
+
+MODULE_AUTHOR("Wade He <wade.ce.he@ufispace.com>");
+MODULE_AUTHOR("Nonodark Huang <nonodark.huang@ufispace.com>");
+MODULE_DESCRIPTION("x86_64_ufispace_s9321_64eo_lpc driver");
+MODULE_VERSION("0.0.2");
+MODULE_LICENSE("GPL");
+
+module_init(lpc_init);
+module_exit(lpc_exit);
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-sys-eeprom.c
new file mode 100644
index 00000000000..c0b3ac20f0f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/modules/x86-64-ufispace-s9321-64eo-sys-eeprom.c
@@ -0,0 +1,282 @@
+/*
+ * Copyright (C) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
+ *                           Philip Edelbrock <phil@netroedge.com>
+ * Copyright (C) 2003 Greg Kroah-Hartman <greg@kroah.com>
+ * Copyright (C) 2003 IBM Corp.
+ * Copyright (C) 2004 Jean Delvare <jdelvare@suse.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* enable dev_dbg print out */
+//#define DEBUG
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+#include <linux/version.h>
+
+#define _memset(s, c, n) memset(s, c, n)
+
+/* Addresses to scan */
+static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
+                    0x55, 0x56, 0x57,*/ I2C_CLIENT_END };
+
+/* Size of EEPROM in bytes */
+#define EEPROM_SIZE     512
+
+#define SLICE_BITS      (6)
+#define SLICE_SIZE      (1 << SLICE_BITS)
+#define SLICE_NUM       (EEPROM_SIZE/SLICE_SIZE)
+
+/* Each client has this additional data */
+struct eeprom_data {
+    struct mutex update_lock;
+    u8 valid;           /* bitfield, bit!=0 if slice is valid */
+    unsigned long last_updated[SLICE_NUM];  /* In jiffies, 8 slices */
+    u8 data[EEPROM_SIZE];       /* Register values */
+};
+
+
+static void sys_eeprom_update_client(struct i2c_client *client, u8 slice)
+{
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    int i, j;
+    int ret;
+    int addr;
+
+    mutex_lock(&data->update_lock);
+
+    if (!(data->valid & (1 << slice)) ||
+        time_after(jiffies, data->last_updated[slice] + 300 * HZ)) {
+        dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice);
+
+        addr = slice << SLICE_BITS;
+
+        ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF));
+        /* select the eeprom address */
+        if (ret < 0) {
+            dev_err(&client->dev, "address set failed\n");
+            goto exit;
+        }
+
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) {
+            goto exit;
+        }
+
+        for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) {
+            for (j = i; j < (i+SLICE_SIZE); j++) {
+                int res;
+
+                res = i2c_smbus_read_byte(client);
+                if (res < 0) {
+                    goto exit;
+                }
+
+                data->data[j] = res & 0xFF;
+            }
+        }
+
+        data->last_updated[slice] = jiffies;
+        data->valid |= (1 << slice);
+    }
+exit:
+    mutex_unlock(&data->update_lock);
+}
+
+static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj,
+               struct bin_attribute *bin_attr,
+               char *buf, loff_t off, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    u8 slice;
+
+    if (off > EEPROM_SIZE) {
+        return 0;
+    }
+    if (off + count > EEPROM_SIZE) {
+        count = EEPROM_SIZE - off;
+    }
+    if (count == 0) {
+        return 0;
+    }
+
+    /* Only refresh slices which contain requested bytes */
+    for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) {
+        sys_eeprom_update_client(client, slice);
+    }
+
+    memcpy(buf, &data->data[off], count);
+
+    return count;
+}
+
+static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj,
+                       struct bin_attribute *bin_attr,
+                       char *buf, loff_t off, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    int ret;
+    int i;
+    u8 cmd;
+    u16 value16;
+
+    dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count);
+
+    if (off > EEPROM_SIZE) {
+        return 0;
+    }
+    if (off + count > EEPROM_SIZE) {
+        count = EEPROM_SIZE - off;
+    }
+    if (count == 0) {
+        return 0;
+    }
+
+    mutex_lock(&data->update_lock);
+
+    for(i=0; i < count; i++) {
+        /* write command */
+        cmd = (off >> 8) & 0xff;
+        value16 = off & 0xff;
+        value16 |= buf[i] << 8;
+        ret = i2c_smbus_write_word_data(client, cmd, value16);
+
+        if (ret < 0) {
+            dev_err(&client->dev, "write address failed at %d \n", (int)off);
+            goto exit;
+        }
+
+        off++;
+
+        /* need to wait for write complete */
+        udelay(10000);
+    }
+exit:
+    mutex_unlock(&data->update_lock);
+    /* force to update client when reading */
+    for(i=0; i < SLICE_NUM; i++) {
+        data->last_updated[i] = 0;
+    }
+
+    return count;
+}
+
+static struct bin_attribute sys_eeprom_attr = {
+    .attr = {
+        .name = "eeprom",
+        .mode = S_IRUGO | S_IWUSR,
+    },
+    .size = EEPROM_SIZE,
+    .read = sys_eeprom_read,
+    .write = sys_eeprom_write,
+};
+
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info)
+{
+    struct i2c_adapter *adapter = client->adapter;
+
+    /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all
+       addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline
+       attaching to addresses >= 0x56 on DDC buses */
+    if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) {
+        return -ENODEV;
+    }
+
+    if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE)
+     && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
+        return -ENODEV;
+    }
+
+    strlcpy(info->type, "eeprom", I2C_NAME_SIZE);
+
+    return 0;
+}
+
+static int sys_eeprom_probe(struct i2c_client *client,
+            const struct i2c_device_id *id)
+{
+    struct eeprom_data *data;
+    int err;
+
+    if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) {
+        err = -ENOMEM;
+        goto exit;
+    }
+
+#ifdef __STDC_LIB_EXT1__
+    memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
+#else
+    _memset(data->data, 0xff, EEPROM_SIZE);
+#endif
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->update_lock);
+
+    /* create the sysfs eeprom file */
+    err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr);
+    if (err) {
+        goto exit_kfree;
+    }
+
+    return 0;
+
+exit_kfree:
+    kfree(data);
+exit:
+    return err;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+sys_eeprom_remove(struct i2c_client *client)
+{
+    sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
+    kfree(i2c_get_clientdata(client));
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+    return 0;
+#endif
+}
+
+static const struct i2c_device_id sys_eeprom_id[] = {
+    { "sys_eeprom", 0 },
+    { }
+};
+
+static struct i2c_driver sys_eeprom_driver = {
+    .driver = {
+        .name   = "sys_eeprom",
+    },
+    .probe      = sys_eeprom_probe,
+    .remove     = sys_eeprom_remove,
+    .id_table   = sys_eeprom_id,
+
+    .class      = I2C_CLASS_DDC | I2C_CLASS_SPD,
+    .detect     = sys_eeprom_detect,
+    .address_list   = normal_i2c,
+};
+
+module_i2c_driver(sys_eeprom_driver);
+
+MODULE_AUTHOR("Nonodark Huang <nonodark.huang@ufispace.com>");
+MODULE_DESCRIPTION("UfiSpace System EEPROM driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/service/pddf-platform-init.service
new file mode 120000
index 00000000000..0fd9f25b6c5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/service/pddf-platform-init.service
@@ -0,0 +1 @@
+../../../../pddf/i2c/service/pddf-platform-init.service
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/__init__.py
new file mode 100644
index 00000000000..593867d31c9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/__init__.py
@@ -0,0 +1,4 @@
+# All the derived classes for PDDF
+__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"]
+from . import platform
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/chassis.py
new file mode 100644
index 00000000000..c5dca5cf72d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/chassis.py
@@ -0,0 +1,202 @@
+#!/usr/bin/env python
+
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Chassis API
+#
+#############################################################################
+
+try:
+    import time
+    from sonic_platform_pddf_base.pddf_chassis import PddfChassis
+    # from sonic_py_common import device_info
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_COMPONENT = 7
+
+class Chassis(PddfChassis):
+    """
+    PDDF Platform-specific Chassis class
+    """
+
+    port_dict = {}
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
+        self._initialize_components()
+
+    def _initialize_components(self):
+        from sonic_platform.component import Component
+        for index in range(NUM_COMPONENT):
+            component = Component(index)
+            self._component_list.append(component)
+            
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_name(self):
+        """
+        Retrieves the name of the chassis
+        Returns:
+            string: The name of the chassis
+        """
+        # return device_info.get_hwsku()
+        return self._eeprom.platform_name_str()
+
+    def initizalize_system_led(self):
+        return True
+
+    def get_status_led(self):
+        return self.get_system_led("SYS_LED")
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+        Returns:
+            (bool, dict):
+                - bool: True if call successful, False if not;
+                - dict: A nested dictionary where key is a device type,
+                        value is a dictionary with key:value pairs in the format of
+                        {'device_id':'device_event'}, where device_id is the device ID
+                        for this device and device_event.
+                        The known devices's device_id and device_event was defined as table below.
+                         -----------------------------------------------------------------
+                         device   |     device_id       |  device_event  |  annotate
+                         -----------------------------------------------------------------
+                         'fan'          '<fan number>'     '0'              Fan removed
+                                                           '1'              Fan inserted
+                         'sfp'          '<sfp number>'     '0'              Sfp removed
+                                                           '1'              Sfp inserted
+                                                           '2'              I2C bus stuck
+                                                           '3'              Bad eeprom
+                                                           '4'              Unsupported cable
+                                                           '5'              High Temperature
+                                                           '6'              Bad cable
+                         'voltage'      '<monitor point>'  '0'              Vout normal
+                                                           '1'              Vout abnormal
+                         --------------------------------------------------------------------
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'},
+                       'voltage':{'U20':'0', 'U21':'1'}}
+                  Indicates that:
+                     fan 0 has been removed, fan 2 has been inserted.
+                     sfp 11 has been removed, sfp 12 has been inserted.
+                     monitored voltage U20 became normal, voltage U21 became abnormal.
+                  Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+                        XCVRD shall stop to read eeprom before SFP recovered from error status.
+        """
+
+        change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}}
+
+        start_time = time.time()
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000)  # Convert to secs
+        else:
+            print("get_change_event:Invalid timeout value", timeout)
+            return False, change_event_dict
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print(
+                "get_change_event:" "time wrap / invalid timeout value",
+                timeout,
+            )
+            return False, change_event_dict  # Time wrap or possibly incorrect timeout
+        try:
+            while timeout >= 0:
+                # check for sfp
+                sfp_change_dict = self.get_transceiver_change_event()
+                # check for fan
+                # fan_change_dict = self.get_fan_change_event()
+                # check for voltage
+                # voltage_change_dict = self.get_voltage_change_event()
+
+                if sfp_change_dict:
+                    change_event_dict["sfp"] = sfp_change_dict
+                    # change_event_dict["fan"] = fan_change_dict
+                    # change_event_dict["voltage"] = voltage_change_dict
+                    return True, change_event_dict
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1)  # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, change_event_dict
+        except Exception as e:
+            print(e)
+        print("get_change_event: Should not reach here.")
+        return False, change_event_dict
+
+    def get_transceiver_change_event(self):
+        current_port_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for index in range(0, self.platform_inventory['num_ports']):
+            if self._sfp_list[index].get_presence():
+                current_port_dict[index] = self.plugin_data["XCVR"]["status"]["inserted"]
+            else:
+                current_port_dict[index] = self.plugin_data["XCVR"]["status"]["removed"]
+
+        if len(self.port_dict) == 0:       # first time
+            self.port_dict = current_port_dict
+            return {}
+
+        if current_port_dict == self.port_dict:
+            return {}
+
+        # Update reg value
+        for index, status in current_port_dict.items():
+            if self.port_dict[index] != status:
+                ret_dict[index] = status
+                #ret_dict[str(index)] = status
+        self.port_dict = current_port_dict
+        for index, status in ret_dict.items():
+            if int(status) == 1:
+                pass
+                #self._sfp_list[int(index)].check_sfp_optoe_type()
+        return ret_dict
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+
+        reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file']
+
+        try:
+            with open(reboot_cause_path, 'r', errors='replace') as fd:
+                data = fd.read()
+                sw_reboot_cause = data.strip()
+        except IOError:
+            sw_reboot_cause = "Unknown"
+
+        return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this
+            chassis.
+        """
+
+        return self.get_serial()
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/component.py
new file mode 100644
index 00000000000..1a0d3581d54
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/component.py
@@ -0,0 +1,164 @@
+#############################################################################
+#
+# Component contains an implementation of SONiC Platform Base API and
+# provides the components firmware management function
+#
+#############################################################################
+
+try:
+    import subprocess
+    from sonic_platform_base.component_base import ComponentBase
+    from sonic_platform_pddf_base import pddfapi
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+IOPORT_PATH="/dev/port"
+CPU_CPLD_MAJOR_MINOR_REG = {
+    "reg": 0x600,
+    "major": {"mask": 0b11000000, "pos": 6},
+    "minor": {"mask": 0b00111111, "pos": 0}
+}
+CPU_CPLD_BUILD_REG = {
+    "reg": 0x6E0,
+    "build": {"mask": 0b11111111, "pos": 0}
+}
+
+CPLD_SYSFS = {
+    "CPLD1": {"major": "cpld1_major_ver", "minor": "cpld1_minor_ver", "build": "cpld1_build"},
+    "CPLD2": {"major": "cpld2_major_ver", "minor": "cpld2_minor_ver", "build": "cpld2_build"},
+    "CPLD3": {"major": "cpld3_major_ver", "minor": "cpld3_minor_ver", "build": "cpld3_build"},
+    "FPGA": {"major": "fpga_major_ver", "minor": "fpga_minor_ver", "build": "fpga_build"},
+}
+
+BMC_CMDS = {
+    "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'",
+}
+
+BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
+COMPONENT_LIST= [
+   ("CPU_CPLD", "CPU CPLD"),
+   ("CPLD1", "CPLD 1"),
+   ("CPLD2", "CPLD 2"),
+   ("CPLD3", "CPLD 3"),
+   ("FPGA", "FPGA"),
+   ("BIOS", "Basic Input/Output System"),
+   ("BMC", "BMC"),
+]
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index=0):
+        self.pddf_obj = pddfapi.PddfApi()
+        self.index = component_index
+        self.name = self.get_name()
+
+    def _get_bios_version(self):
+        # Retrieves the BIOS firmware version
+        try:
+            with open(BIOS_VERSION_PATH, 'r') as fd:
+                bios_version = fd.read()
+                return bios_version.strip()
+        except Exception as e:
+            return None
+
+    def _get_cpld_version(self):
+        # Retrieves the CPLD firmware version
+        cpld_version = dict()
+        for cpld_name, elem in CPLD_SYSFS.items():
+            device = "SYSSTATUS"
+            major = self.pddf_obj.get_attr_name_output(device, elem["major"])
+            minor = self.pddf_obj.get_attr_name_output(device, elem["minor"])
+            build = self.pddf_obj.get_attr_name_output(device, elem["build"])
+            if major and minor and build:
+                major = int(major['status'].rstrip(),0)
+                minor = int(minor['status'].rstrip(),0)
+                build = int(build['status'].rstrip(),0)
+                cpld_version[cpld_name] = "{}.{:02d}.{:03d}".format(major, minor, build)
+            else:
+                cpld_version[cpld_name] = "N/A"
+        return cpld_version
+
+    def _get_cpu_cpld_version(self):
+        # Retrieves the CPU CPLD firmware version
+        try:
+            with open(IOPORT_PATH, "rb") as f:
+                f.seek(CPU_CPLD_MAJOR_MINOR_REG.get("reg"), 0)
+                reg = int.from_bytes(f.read(1), signed=False)
+                mask = CPU_CPLD_MAJOR_MINOR_REG["major"]["mask"]
+                pos = CPU_CPLD_MAJOR_MINOR_REG["major"]["pos"]
+                major = (reg & mask) >> pos
+
+                mask = CPU_CPLD_MAJOR_MINOR_REG["minor"]["mask"]
+                pos = CPU_CPLD_MAJOR_MINOR_REG["minor"]["pos"]
+                minor = (reg & mask) >> pos
+                f.seek(CPU_CPLD_BUILD_REG.get("reg"),0)
+
+                reg = int.from_bytes(f.read(1), signed=False)
+                mask = CPU_CPLD_BUILD_REG["build"]["mask"]
+                pos = CPU_CPLD_BUILD_REG["build"]["pos"]
+                build = (reg & mask) >> pos
+
+                ver = "{}.{:02d}.{:03d}".format(major, minor, build)
+        except:
+            ver = "N/A"
+        
+        return ver
+
+    def _get_bmc_version(self):
+        # Retrieves the BMC firmware version
+        status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"])
+        if not status:
+            return value
+        else:
+            return None
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return COMPONENT_LIST[self.index][0]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        return COMPONENT_LIST[self.index][1]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        fw_version = None
+
+        if self.name == "BIOS":
+            fw_version = self._get_bios_version()
+        elif "CPU_CPLD" in self.name:
+            fw_version = self._get_cpu_cpld_version()
+        elif "CPLD" in self.name:
+            cpld_version = self._get_cpld_version()
+            fw_version = cpld_version.get(self.name)
+        elif "FPGA" in self.name:
+            cpld_version = self._get_cpld_version()
+            fw_version = cpld_version.get(self.name)
+        elif self.name == "BMC":
+            fw_version = self._get_bmc_version()
+        return fw_version
+
+    def install_firmware(self, image_path):
+        """
+        Install firmware to module
+        Args:
+            image_path: A string, path to firmware image
+        Returns:
+            A boolean, True if install successfully, False if not
+        """
+        raise NotImplementedError
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/eeprom.py
new file mode 100644
index 00000000000..90ab1c779a4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/eeprom.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Eeprom(PddfEeprom):
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def platform_name_str(self):
+        (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME)
+        if not is_valid:
+            return "N/A"
+
+        return results[2].decode('ascii')
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/fan.py
new file mode 100644
index 00000000000..ffa8a03b0da
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/fan.py
@@ -0,0 +1,168 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan import PddfFan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Fan(PddfFan):
+    """PDDF Platform-Specific Fan class"""
+
+    def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0):
+        # idx is 0-based
+        PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake'
+
+    def get_mfr_id(self):
+        """
+        Retrieves the manufacturer id of the device
+
+        Returns:
+            string: Manufacturer Id of device
+        """
+        if self.is_psu_fan:
+            device = "PSU{}".format(self.fans_psu_index)
+            output = self.pddf_obj.get_attr_name_output(device, "psu_mfr_id")
+        else:
+            raise NotImplementedError
+
+        if not output:
+            return None
+
+        mfr = output['status']
+
+        # strip_non_ascii
+        stripped = (c for c in mfr if 0 < ord(c) < 127)
+        mfr = ''.join(stripped)
+
+        return mfr.rstrip('\n')
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+
+        Returns:
+            string: Model/part number of device
+        """
+        if self.is_psu_fan:
+            device = "PSU{}".format(self.fans_psu_index)
+            output = self.pddf_obj.get_attr_name_output(device, "psu_model_name")
+        else:
+            raise NotImplementedError
+
+        if not output:
+            return None
+
+        model = output['status']
+
+        # strip_non_ascii
+        stripped = (c for c in model if 0 < ord(c) < 127)
+        model = ''.join(stripped)
+
+        return model.rstrip('\n')
+
+    def get_max_speed(self):
+        """
+        Retrieves the model name
+
+        Returns:
+            An string, the model name
+        """
+        if self.is_psu_fan:
+            mfr = self.get_mfr_id()
+            model = self.get_model()
+
+            max_speed = int(self.plugin_data['PSU']['valmap']['PSU_AC_FAN_MAX_SPEED'])
+            if mfr and model :
+                for dev in self.plugin_data['PSU']['psu_support_list']:
+                    if dev['Manufacturer'] == mfr and dev['Name'] == model:
+                        max_speed = int(self.plugin_data['PSU']['valmap'][dev['MaxSpd']])
+                        break
+        else:
+            if self.fan_index == 1:
+                max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED'])
+            else:
+                max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED'])
+
+        return max_speed
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the device
+        Returns:
+            bool: True if device is present, False if not
+        """
+        if self.is_psu_fan:
+            attr_name = "psu_present"
+            device = "PSU{}".format(self.fans_psu_index)
+        else:
+            idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index
+            attr_name = "fan" + str(idx) + "_present"
+            device = "FAN-CTRL"
+
+        output = self.pddf_obj.get_attr_name_output(device, attr_name)
+        if not output:
+            return False
+
+        mode = output['mode']
+        presence = output['status'].rstrip()
+        vmap = self.plugin_data['FAN']['present'][mode]['valmap']
+
+        if presence in vmap:
+            status = vmap[presence]
+        else:
+            status = False
+
+        return status
+
+    def get_direction(self):
+        """
+        Retrieves the direction of fan
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+        """
+        dir = "EXHAUST"
+        if self.is_psu_fan:
+            mfr = self.get_mfr_id()
+            model = self.get_model()
+
+            if mfr and model :
+                for dev in self.plugin_data['PSU']['psu_support_list']:
+                    if dev['Manufacturer'] == mfr and dev['Name'] == model:
+                        dir = dev['Dir']
+                        break
+        else:
+            dir = "EXHAUST"
+
+        return dir
+
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        speed_percentage = 0
+
+        max_speed = self.get_max_speed()
+        rpm_speed = self.get_speed_rpm()
+
+        speed_percentage = round((rpm_speed*100)/max_speed)
+
+        return min(speed_percentage, 100)
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        return self.get_speed()
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/fan_drawer.py
new file mode 100644
index 00000000000..3b9bb607f63
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/fan_drawer.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(PddfFanDrawer):
+    """PDDF Platform-Specific Fan-Drawer class"""
+
+    def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
+        # idx is 0-based 
+        PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/platform.py
new file mode 100644
index 00000000000..406b1179ae1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/platform.py
@@ -0,0 +1,25 @@
+#!/usr/bin/env python
+
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+
+try:
+    from sonic_platform_pddf_base.pddf_platform import PddfPlatform
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Platform(PddfPlatform):
+    """
+    PDDF Platform-Specific Platform Class
+    """
+
+    def __init__(self):
+        PddfPlatform.__init__(self)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/psu.py
new file mode 100644
index 00000000000..bf8344d8dcb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/psu.py
@@ -0,0 +1,67 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_psu import PddfPsu
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Psu(PddfPsu):
+    """PDDF Platform-Specific PSU class"""
+    
+    PLATFORM_PSU_CAPACITY = 3000
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
+        
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+
+        Returns:
+            A float number, the power in watts,
+            e.g. 302.6
+        """
+
+        # power is returned in micro watts
+        return round(float(self.get_voltage()*self.get_current()), 2)
+
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return float(self.PLATFORM_PSU_CAPACITY)
+
+    def get_capacity(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return self.get_maximum_supplied_power()
+
+    def get_type(self):
+        """
+        Gets the type of the PSU
+
+        Returns:
+            A string, the type of PSU (AC/DC)
+        """
+        mfr = self.get_mfr_id()
+        model = self.get_model()
+        ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE']
+
+        if mfr and model :
+            for dev in self.plugin_data['PSU']['psu_support_list']:
+                if dev['Manufacturer'] == mfr and dev['Name'] == model:
+                    ptype = dev['Type']
+                    break
+
+
+        return ptype
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/sfp.py
new file mode 100644
index 00000000000..c7919482f69
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/sfp.py
@@ -0,0 +1,31 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_platform_pddf_base.pddf_sfp import PddfSfp
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Sfp(PddfSfp):
+    """
+    PDDF Platform-Specific Sfp class
+    """
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+        self.index = index
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_error_description(self):
+        """
+        Retrives the error descriptions of the SFP module
+        Returns:
+            String that represents the current error descriptions of vendor specific errors
+            In case there are multiple errors, they should be joined by '|',
+            like: "Bad EEPROM|Unsupported cable"
+        """
+        if not self.get_presence():
+            return self.SFP_STATUS_UNPLUGGED
+
+        return self.SFP_STATUS_OK
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/thermal.py
new file mode 100644
index 00000000000..77d6ec7ae88
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform/thermal.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_thermal import PddfThermal
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+
+class Thermal(PddfThermal):
+    """PDDF Platform-Specific Thermal class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
+        PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform_setup.py
new file mode 100644
index 00000000000..5caa2b81dcb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/sonic_platform_setup.py
@@ -0,0 +1,27 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation on ufispace platform',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='linuxnetdev@microsoft.com',
+    url='https://github.com/Azure/sonic-buildimage',
+    maintainer='Nonodark Huang',
+    maintainer_email='nonodark.huang@ufispace.com',
+    packages=['sonic_platform'],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/utils/pddf_post_device_create.sh
new file mode 100755
index 00000000000..f967f9414a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/utils/pddf_post_device_create.sh
@@ -0,0 +1,150 @@
+#!/bin/bash
+platform_firmware_versions() {
+    FIRMWARE_VERSION_FILE=/var/log/firmware_versions
+    rm -rf ${FIRMWARE_VERSION_FILE}
+
+    major_minor=$(xxd -s 0x600 -p -l 1 /dev/port)
+    major=$(((16#$major_minor & 2#11000000) >> 6))
+    minor=$((16#$major_minor & 2#00111111))
+    build=$((16#$(xxd -s 0x6E0 -p -l 1 /dev/port)))
+    cpu_cpld_ver=$(printf '%d.%02d.%03d' $major $minor $build)
+    echo "CPU CPLD: ${cpu_cpld_ver}" >> $FIRMWARE_VERSION_FILE
+
+    cpld1_ver=$(printf '%d.%02d.%03d' \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_major_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_minor_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_build))
+    echo "CPLD1: ${cpld1_ver}" >> $FIRMWARE_VERSION_FILE
+
+    cpld2_ver=$(printf '%d.%02d.%03d' \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_major_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_minor_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_build))
+    echo "CPLD2: ${cpld2_ver}" >> $FIRMWARE_VERSION_FILE
+
+    cpld3_ver=$(printf '%d.%02d.%03d' \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_major_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_minor_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_build))
+    echo "CPLD3: ${cpld3_ver}" >> $FIRMWARE_VERSION_FILE
+
+    fpga_ver=$(printf '%d.%02d.%03d' \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/fpga_major_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/fpga_minor_ver) \
+                $(cat /sys/kernel/pddf/devices/sysstatus/sysstatus_data/fpga_build))
+    echo "FPGA: ${fpga_ver}" >> $FIRMWARE_VERSION_FILE
+
+    bios_ver=$(cat /sys/class/dmi/id/bios_version)
+    echo "BIOS: ${bios_ver}" >> $FIRMWARE_VERSION_FILE
+    
+    VERARR=(`ipmitool raw 0x6 0x1 | cut -d ' ' -f 4,5,16,15,14`)
+    echo "BMC: ${VERARR[0]}.${VERARR[1]}.${VERARR[4]}.${VERARR[3]}${VERARR[2]}" >> ${FIRMWARE_VERSION_FILE}
+}
+
+function enable_i2c_realy {
+    local items=(
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_i2c_ctrl"
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_i2c_ctrl"
+    )
+    local i=""
+
+    echo "Set i2c control enable"
+    for i in "${items[@]}"
+    do
+        reg=$(cat ${i})
+        set_reg=$(( $reg | 2#10000000 ))
+        echo $set_reg > ${i}
+    done
+}
+
+function enable_event_control {
+    local items=(
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_evt_ctrl"
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_evt_ctrl"
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_evt_ctrl"
+        "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/fpga_evt_ctrl"
+    )
+
+    local i=""
+
+    echo "Set event control enable"
+    for i in "${items[@]}"
+    do
+        reg=$(cat ${i})
+        set_reg=$(( $reg | 2#00000001 ))
+        echo $set_reg > ${i}
+    done
+}
+
+function set_led_default_val {
+    pddf_ledutil setstatusled LOC_LED off > /dev/null
+    pddf_ledutil setstatusled SYNC_LED off > /dev/null
+}
+
+function diable_bmc_watchdog {
+    echo "Disable BMC watchdog"
+    timeout 3 ipmitool mc watchdog off
+}
+
+function set_mac_rov {
+    echo "Set MAC rov"
+
+    local bus_id="1"
+    local rov_i2c_bus="13"
+    local rov_i2c_addr=("0x64")
+    local rov_config_reg="0x21"
+    local rov_sysfs="/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld_mac_rov"
+    local mac_rov_done="/tmp/mac_rov_done"
+
+    local avs_array=(
+        0x84 0x86 0x88 0x8A 0x8C 0x8E
+        0x90 0x92 0x94 0x96 0x98
+    )
+
+    local vdd_val=(
+        '0.7875V'  '0.775V' '0.7625V' '0.75V' '0.7375V' '0.725V'
+        '0.7125V'  '0.7V'   '0.6875V' '0.675V''0.6625V'
+    )
+
+    local vout_cmd=(
+        '0x064F' '0x063B' '0x0622' '0x060E' '0x05F5' '0x05DC'
+        '0x05C3' '0x05AA' '0x0591' '0x0578' '0x055F'
+    )
+    # Set MAC ROV Status
+    if [ -f "$rov_sysfs" ]  ;then
+        rov_reg=$(eval "cat $rov_sysfs")
+        avs=$(( $rov_reg ))
+
+        if [ -c "/dev/i2c-${rov_i2c_bus}" ]; then
+            for (( i=0; i<${#rov_i2c_addr[@]}; i++ ))
+            do
+                for (( j=0; j<${#avs_array[@]}; j++ ))
+                do
+                    if [ $avs -eq $((${avs_array[j]})) ];then
+                        bus=${rov_i2c_bus}
+                        addr=${rov_i2c_addr[i]}
+                        reg=${rov_config_reg}
+                        val=${vout_cmd[j]}
+                        echo "Set MAC($i) rov bus($bus) addr($addr) reg($reg) avs($(printf "0x%X" $avs)) val($val)"
+                        if [ ! -f "$mac_rov_done" ]; then
+                            $(i2cset -y $bus $addr $reg $val w)
+                            $(touch "$mac_rov_done")
+                        else
+                            echo "  * MAC ROV has been set, skipping it."
+                        fi
+                        break;
+                    fi
+                done
+            done
+        fi
+    fi
+}
+
+
+diable_bmc_watchdog
+enable_i2c_realy
+set_mac_rov
+enable_event_control
+set_led_default_val
+platform_firmware_versions
+echo "PDDF device post-create completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/utils/pddf_post_driver_install.sh
new file mode 100755
index 00000000000..ed2559977e4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/utils/pddf_post_driver_install.sh
@@ -0,0 +1,2 @@
+#!/bin/bash
+echo "PDDF driver post-install completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/utils/pddf_switch_svc.py
new file mode 100755
index 00000000000..45a991a210f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9321-64eo/utils/pddf_switch_svc.py
@@ -0,0 +1,86 @@
+#!/usr/bin/env python
+# Script to stop and start the respective platforms default services.
+# This will be used while switching the pddf->non-pddf mode and vice versa
+import commands
+
+def check_pddf_support():
+    return True
+
+def stop_platform_svc():
+
+    '''
+    status, output = commands.getstatusoutput("systemctl stop s9321-64eo-platform-monitor-fan.service")
+    if status:
+        print "Stop s9321-64eo-platform-fan.service failed %d"%status
+        return False
+
+    status, output = commands.getstatusoutput("systemctl stop s9321-64eo-platform-monitor-psu.service")
+    if status:
+        print "Stop s9321-64eo-platform-psu.service failed %d"%status
+        return False
+
+    status, output = commands.getstatusoutput("systemctl stop s9321-64eo-platform-monitor.service")
+    if status:
+        print "Stop s9321-64eo-platform-init.service failed %d"%status
+        return False
+    status, output = commands.getstatusoutput("systemctl disable s9321-64eo-platform-monitor.service")
+    if status:
+        print "Disable s9321-64eo-platform-monitor.service failed %d"%status
+        return False
+    '''
+
+    status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit")
+    if status:
+        print "platform_utility.py deinit command failed %d"%status
+        return False
+
+    # HACK , stop the pddf-platform-init service if it is active
+    status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
+    if status:
+        print "Stop pddf-platform-init.service along with other platform serives failed %d"%status
+        return False
+
+    return True
+
+def start_platform_svc():
+
+    status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init")
+    if status:
+        print "platform_utility.py init command failed %d"%status
+        return False
+
+    '''
+    status, output = commands.getstatusoutput("systemctl enable s9321-64eo-platform-monitor.service")
+    if status:
+        print "Enable s9321-64eo-platform-monitor.service failed %d"%status
+        return False
+    status, output = commands.getstatusoutput("systemctl start s9321-64eo-platform-monitor-fan.service")
+    if status:
+        print "Start s9321-64eo-platform-monitor-fan.service failed %d"%status
+        return False
+
+    status, output = commands.getstatusoutput("systemctl start s9321-64eo-platform-monitor-psu.service")
+    if status:
+        print "Start s9321-64eo-platform-monitor-psu.service failed %d"%status
+        return False
+    '''
+    return True
+
+def start_platform_pddf():
+
+    status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service")
+    if status:
+        print "Start pddf-platform-init.service failed %d"%status
+        return False
+
+    return True
+
+def stop_platform_pddf():
+
+    status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
+    if status:
+        print "Stop pddf-platform-init.service failed %d"%status
+        return False
+
+    return True
+
diff --git a/platform/broadcom/sswsyncd.dep b/platform/broadcom/sswsyncd.dep
new file mode 100644
index 00000000000..c8cf70e90b8
--- /dev/null
+++ b/platform/broadcom/sswsyncd.dep
@@ -0,0 +1,8 @@
+#DPKG FRK
+DPATH       := $(PLATFORM_PATH)/sswsyncd
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/broadcom/sswsyncd.mk
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(SSWSYNCD)_CACHE_MODE  := GIT_CONTENT_SHA
+$(SSWSYNCD)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(SSWSYNCD)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/broadcom/sswsyncd.mk b/platform/broadcom/sswsyncd.mk
new file mode 100644
index 00000000000..935399b2861
--- /dev/null
+++ b/platform/broadcom/sswsyncd.mk
@@ -0,0 +1,4 @@
+SSWSYNCD = sswsyncd_1.0.0_$(CONFIGURED_ARCH).deb
+$(SSWSYNCD)_SRC_PATH = $(PLATFORM_PATH)/sswsyncd
+
+SONIC_DPKG_DEBS += $(SSWSYNCD)
diff --git a/platform/broadcom/sswsyncd/Makefile b/platform/broadcom/sswsyncd/Makefile
new file mode 100644
index 00000000000..b455bfd7a3c
--- /dev/null
+++ b/platform/broadcom/sswsyncd/Makefile
@@ -0,0 +1,36 @@
+CC = g++
+CFLAGS_COMMON = -ansi -fPIC -std=c++11 -Wall -Wcast-align -Wcast-qual \
+    -Wconversion -Wdisabled-optimization -Werror -Wextra -Wfloat-equal \
+    -Wformat=2 -Wformat-nonliteral -Wformat-security -Wformat-y2k \
+    -Wimport -Winit-self -Winline -Winvalid-pch -Wlong-long \
+    -Wmissing-field-initializers -Wmissing-format-attribute \
+    -Wmissing-include-dirs -Wmissing-noreturn -Wno-aggregate-return \
+    -Wno-padded -Wno-switch-enum -Wno-unused-parameter -Wpacked \
+    -Wpointer-arith -Wredundant-decls -Wshadow -Wstack-protector \
+    -Wstrict-aliasing=3 -Wswitch -Wswitch-default -Wunreachable-code \
+    -Wunused -Wvariadic-macros -Wwrite-strings -Wno-switch-default \
+    -Wconversion -Wlong-long
+
+CFLAGS += -g -std=c++11
+LIBS += -lpthread -lutil
+
+DSSERVE = dsserve
+BCMCMD = bcmcmd
+
+.PHONY: all clean install
+
+all: $(DSSERVE) $(BCMCMD)
+
+$(DSSERVE): dsserve.cpp dsserve.h
+	$(CC) -o $@ $< $(CFLAGS) $(CPPFLAGS) $(LDFLAGS) $(LIBS)
+
+$(BCMCMD): bcmcmd.cpp dsserve.h
+	$(CC) -o $@ $< $(CFLAGS) $(CFLAGS_COMMON) $(CPPFLAGS) $(LDFLAGS) $(LIBS)
+
+install:
+	install -d $(DESTDIR)/usr/bin
+	install -D $(DSSERVE) $(DESTDIR)/usr/bin/$(DSSERVE)
+	install -D $(BCMCMD) $(DESTDIR)/usr/bin/$(BCMCMD)
+
+clean:
+	rm -f $(DSSERVE) $(BCMCMD)
diff --git a/platform/broadcom/sswsyncd/bcmcmd.cpp b/platform/broadcom/sswsyncd/bcmcmd.cpp
new file mode 100644
index 00000000000..301d8c4557d
--- /dev/null
+++ b/platform/broadcom/sswsyncd/bcmcmd.cpp
@@ -0,0 +1,275 @@
+#include <unistd.h>
+#include <limits.h>
+#include <poll.h>
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <sys/un.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string>
+#include <vector>
+#include <stdexcept>
+#include <system_error>
+#include "dsserve.h"
+using namespace std;
+
+class timeout_error : public std::runtime_error
+{
+public:
+    explicit timeout_error(const string& what_arg) : std::runtime_error(what_arg) { }
+    explicit timeout_error(const char* what_arg) : std::runtime_error(what_arg) { }
+};
+
+class socketio_error : public std::runtime_error
+{
+public:
+    explicit socketio_error(const string& what_arg) : std::runtime_error(what_arg) { }
+    explicit socketio_error(const char* what_arg) : std::runtime_error(what_arg) { }
+};
+
+// Default timeout for connecting to brcm sdk unix domain socket
+// User may change it by command line argument
+const int DEFAULT_TIMEOUT_SEC = 30;
+
+const int MILLISECONDS_IN_SEC = 1000;
+
+typedef vector<string>::iterator vsi;
+
+ssize_t write(int fd, const string& s) {
+    return write(fd, s.c_str(), s.size());
+}
+
+/*  returns true iff str ends with suffix  */
+bool str_ends_with(const char * str, const char * suffix) {
+    if( str == NULL || suffix == NULL ) return 0;
+
+    size_t str_len = strlen(str);
+    size_t suffix_len = strlen(suffix);
+    if(suffix_len > str_len) return 0;
+
+    return 0 == strncmp(str + str_len - suffix_len, suffix, suffix_len);
+}
+
+/* return the index of matched prompt, otherwise -1 */
+/* output parameter: bytes_read - the total bytes read till the prompt (inclusive) */
+int read_to_prompts(int sock, vsi prompt_begin, vsi prompt_end, bool enable_out, int ms_timeout, size_t& bytes_read) {
+    const size_t BUF_SIZE = 1024;
+    static char buf[BUF_SIZE];
+    static size_t leftover = 0;
+    bytes_read = 0;
+
+    struct pollfd fd;
+    fd.fd = sock;
+    fd.events = POLLIN;
+
+    for (;;) {
+        // Discard complete lines left in the buffer, and keep the last partial line
+        // The line delimiters could be \n, or \r\n
+        // Note: if buffer ends with \r, it may follow by \n later
+        char *p;
+        for (p = buf + leftover - 1; p >= buf; p--)
+        {
+            if (*p == '\n') break;
+        }
+        if (p < buf)
+        {
+            if (leftover >= BUF_SIZE - 1)
+            {
+                // There is large amount of char in the buffer without line separators,
+                // which is unexpected. Just flush the left over chars.
+                leftover = 0;
+            }
+        }
+        else
+        {
+            char *partial = p + 1;
+            leftover = buf + leftover - partial;
+            memmove(buf, partial, leftover);
+        }
+
+        // Poll the sock to detect timeout or other errors
+        int res = poll(&fd, 1, ms_timeout);
+        switch (res) {
+        case -1:
+            throw socketio_error("polling socket error");
+        case 0:
+            throw timeout_error("polling socket timeout");
+        default:
+            // will get your data later
+            break;
+        }
+
+        // Read a batch from the socket
+        ssize_t rval = read(sock, buf + leftover, (BUF_SIZE - 1 - leftover));
+
+        if (rval < 0) throw socketio_error("reading stream message");
+        if (rval == 0) throw socketio_error("ending connection");
+        bytes_read += (size_t)rval;
+        buf[leftover + rval] = '\0'; // Terminate read string with NUL char
+        if (enable_out) {
+            printf("%s", buf + leftover);
+            fflush(stdout);
+        }
+        leftover += rval;
+
+        int index = 0;
+        for (auto i = prompt_begin; i != prompt_end; i++, index++) {
+            if (str_ends_with(buf, i->c_str()))
+                return index;
+        }
+    }
+}
+
+int main(int argc, char *argv[]) {
+    int sock;
+    struct sockaddr_un server;
+
+    auto usage = [=]() {
+        printf("USAGE: %s [-f <sun_path>] -v <cmd>\n", argv[0]);
+        printf("  -v                         verbose mode\n");
+        printf("  -f                         domain socket filename, default %s\n", DEFAULT_SUN_PATH);
+        printf("  -t                         timeout in seconds, default %d\n", DEFAULT_TIMEOUT_SEC);
+        printf("RETURN VALUE:\n"
+               "    0                        success\n");
+        printf("  %3d                        socket io error\n", EIO);
+        printf("  %3d                        invalid argument\n", EINVAL);
+        printf("  %3d                        timeout\n", ETIME);
+        printf("\n");
+        return EINVAL;
+    };
+
+    // Parse command line
+    const char *sun_path = DEFAULT_SUN_PATH;
+    const char *cmd = NULL;
+    bool verbose = false;
+    int timeout_sec = DEFAULT_TIMEOUT_SEC;
+    if (argc < 2) {
+        return usage();
+    }
+    for (argc--, argv++; argc > 0 && *argv; argc--, argv++) {
+        if (!strcmp(*argv, "--help") || !strcmp(*argv, "-h")) {
+            return usage();
+        }
+        else if (!strcmp(*argv, "-v")) {
+            verbose = true;
+        }
+        else if (!strcmp(*argv, "-t")) {
+            argc--, argv++;
+            if (argc > 1 && *argv && isdigit(argv[0][0])) {
+                timeout_sec = atoi(*argv);
+            }
+            else {
+                fprintf(stderr, "[ERROR] bad timeout\n");
+                return usage();
+            }
+        }
+        else if (!strcmp(*argv, "-f")) {
+            argc--, argv++;
+            if (argc > 1 && *argv) {
+                sun_path = *argv;
+            }
+            else {
+                fprintf(stderr, "[ERROR] bad domain socket filename\n");
+                return usage();
+            }
+            if (verbose) printf("[INFO] domain socket filename: %s\n", sun_path);
+        }
+        else {
+            cmd = *argv;
+            if (verbose) printf("[INFO] cmd: %s\n", cmd);
+        }
+    }
+    if (cmd == NULL || *cmd == '\0' || *sun_path == '\0' || timeout_sec < 0) {
+        return usage();
+    }
+    int timeout_ms;
+    if (timeout_sec >= INT_MAX / MILLISECONDS_IN_SEC) {
+        timeout_ms = INT_MAX;
+    }
+    else {
+        timeout_ms = timeout_sec * MILLISECONDS_IN_SEC;
+    }
+
+    sock = socket(AF_UNIX, SOCK_STREAM, 0);
+    if (sock < 0) {
+        perror("opening stream socket");
+        exit(1);
+    }
+    server.sun_family = AF_UNIX;
+    strcpy(server.sun_path, sun_path);
+
+    if (connect(sock, (struct sockaddr *) &server, sizeof(struct sockaddr_un)) < 0) {
+        close(sock);
+        perror("connecting stream socket");
+        exit(1);
+    }
+
+    ssize_t written;
+    written = write(sock, "\n");
+    if (written <= 0) {
+        perror("writing on stream socket");
+        exit(1);
+    }
+
+    // Interactive with shell
+    // Wait for the first shell prompt
+    vector<string> prompt = { "Hit enter to get drivshell prompt..\r\n", "drivshell>" };
+
+    try
+    {
+        int index;
+        size_t bytesread;
+        index = read_to_prompts(sock, prompt.begin(), prompt.end(), false, timeout_ms, bytesread);
+        if (index < 0) {
+            perror("failed to wait the prompt");
+            exit(index);
+        }
+
+        if (index == 0) {
+            // Write enter char to socket
+            written = write(sock, "\n");
+            if (written <= 0) {
+                perror("failed to write enter");
+                exit(1);
+            }
+
+            // Wait next prompt
+            index = read_to_prompts(sock, prompt.begin() + 1, prompt.begin() + 2, true, timeout_ms, bytesread);
+            if (index < 0) {
+                perror("failed to wait the prompt");
+                exit(index);
+            }
+        }
+
+        // Write the command to the socket
+        written = write(sock, cmd + string("\n"));
+        if (written <= 0) {
+            perror("failed to write command");
+            exit(1);
+        }
+
+        // Wait for the prompt after the command output, may ignore empty prompt lines
+        do {
+            index = read_to_prompts(sock, prompt.begin() + 1, prompt.begin() + 2, true, timeout_ms, bytesread);
+        } while (bytesread == prompt[1].size() && index >= 0);
+
+        if (index < 0) {
+            perror("failed to wait the prompt");
+            exit(index);
+        }
+
+        printf("\n"); // Print enter after the final prompt
+        close(sock);
+        return 0;
+    }
+    catch(timeout_error& ex)
+    {
+        perror(ex.what());
+        exit(ETIME);
+    }
+    catch(socketio_error& ex)
+    {
+        perror(ex.what());
+        exit(EIO);
+    }
+}
diff --git a/platform/broadcom/sswsyncd/debian/changelog b/platform/broadcom/sswsyncd/debian/changelog
new file mode 100644
index 00000000000..190c2ee2bd1
--- /dev/null
+++ b/platform/broadcom/sswsyncd/debian/changelog
@@ -0,0 +1,5 @@
+sswsyncd (1.0.0) stable; urgency=medium
+
+  * Initial release of sswsyncd package
+
+ -- SONiC Team <sonic-dev@lists.sonicfoundation.dev>  Wed, 01 May 2024 00:00:00 +0000
diff --git a/platform/broadcom/sswsyncd/debian/compat b/platform/broadcom/sswsyncd/debian/compat
new file mode 100644
index 00000000000..48082f72f08
--- /dev/null
+++ b/platform/broadcom/sswsyncd/debian/compat
@@ -0,0 +1 @@
+12
diff --git a/platform/broadcom/sswsyncd/debian/control b/platform/broadcom/sswsyncd/debian/control
new file mode 100644
index 00000000000..6bf78876dc2
--- /dev/null
+++ b/platform/broadcom/sswsyncd/debian/control
@@ -0,0 +1,14 @@
+Source: sswsyncd
+Section: net
+Priority: optional
+Maintainer: SONiC Team <sonic-dev@lists.sonicfoundation.dev>
+Build-Depends: debhelper (>= 12)
+Standards-Version: 4.5.1
+Homepage: https://github.com/sonic-net/sonic-buildimage
+
+Package: sswsyncd
+Architecture: any
+Depends: ${shlibs:Depends}, ${misc:Depends}
+Description: Broadcom Switch State service utilities
+ This package contains dsserve and bcmcmd utilities for
+ Broadcom switch state services in SONiC.
diff --git a/platform/broadcom/sswsyncd/debian/rules b/platform/broadcom/sswsyncd/debian/rules
new file mode 100755
index 00000000000..2d33f6ac899
--- /dev/null
+++ b/platform/broadcom/sswsyncd/debian/rules
@@ -0,0 +1,4 @@
+#!/usr/bin/make -f
+
+%:
+	dh $@
diff --git a/platform/broadcom/sswsyncd/dsserve.cpp b/platform/broadcom/sswsyncd/dsserve.cpp
new file mode 100644
index 00000000000..2326788b33d
--- /dev/null
+++ b/platform/broadcom/sswsyncd/dsserve.cpp
@@ -0,0 +1,288 @@
+/*
+ *   dsserve -d <domain_socket_filename> bcm.user
+ *
+ * Now connect to bcm.user, e.g. like this:
+ *
+ *   dsclient <domain_socket_filename> <cmd>
+ *
+ */
+
+ #include <stdlib.h>
+ #include <stdio.h>
+ #include <stdarg.h>
+ #include <string.h>
+ #include <errno.h>
+
+ #include <sys/types.h>
+ #include <sys/socket.h>
+ #include <sys/un.h>
+ #include <syslog.h>
+ #include <sys/time.h>
+ #include <sys/wait.h>
+
+ #include <errno.h>
+ #include <unistd.h>
+ #include <signal.h>
+ #include <pthread.h>
+ #include <pty.h>
+ #include <arpa/inet.h>
+ #include "dsserve.h"
+
+ static inline void syslog_printf(int priority, const char *format, ...)
+ {
+     va_list args1, args2;
+     va_start(args1, format);
+     va_copy(args2, args1); // va_list cannot be used twice, copy it
+     vsyslog(priority, format, args1);
+
+     auto f = (priority & LOG_PRIMASK) <= LOG_WARNING ? stderr : stdout;
+     fprintf(f, "[%d] ", priority);
+     vfprintf(f, format, args2);
+     va_end(args2);
+     va_end(args1);
+ }
+ // Quickly replace all syslog() with syslog_printf()
+ #define syslog syslog_printf
+
+ /* Network server */
+ static volatile int _dsfd = -1;
+ static int _server_socket;
+
+ static int
+ _setup_domain_socket(const char *sun_path)
+ {
+     struct sockaddr_un addr;
+     int sockfd;
+
+     if ((sockfd = socket(AF_UNIX, SOCK_STREAM, 0)) < 0) {
+         syslog(LOG_ERR, "server: can't open stream socket: %s", strerror(errno));
+         exit(EXIT_FAILURE);
+     }
+
+     /* Set up server address */
+     memset((void *) &addr, 0x0, sizeof(addr));
+     addr.sun_family = AF_UNIX;
+     // Copy 1 char less to make sure the destination is ended with \0
+     strncpy(addr.sun_path, sun_path, sizeof(addr.sun_path) - 1);
+
+     /* Remove the domain socket file first */
+     unlink(sun_path);
+     /* Bind our domain socket */
+     if (bind(sockfd, (struct sockaddr *) &addr, sizeof(addr)) < 0) {
+         syslog(LOG_ERR, "server: can't bind domain socket: %s", strerror(errno));
+         exit(EXIT_FAILURE);
+     }
+
+     /* Only process one connection at a time */
+     listen(sockfd, 1);
+
+     return sockfd;
+ }
+
+ static void *
+ _ds2tty(void *arg)
+ {
+     int fd = *((int *)arg);
+     const size_t DATA_SIZE = 1024;
+     unsigned char data[DATA_SIZE];
+     ssize_t rc;
+     struct sockaddr_in addr;
+     socklen_t len;
+
+     while (1) {
+         if (_dsfd < 0)
+         {
+             len = sizeof(addr);
+             if ((_dsfd = accept(_server_socket, (struct sockaddr *) &addr, &len)) < 0) {
+                 syslog(LOG_ERR, "server: can't accept socket: %s", strerror(errno));
+                 exit(EXIT_FAILURE);
+             }
+         }
+
+         rc = read(_dsfd, data, DATA_SIZE);
+         if (rc <= 0) {
+             if (rc < 0) {
+                 /* Broken pipe -- client quit */
+                 syslog(LOG_ERR, "_ds2tty broken pipe");
+             }
+             else {
+                 /* Ending connection */
+             }
+             close(_dsfd);
+             _dsfd = -1;
+         } else {
+             write(fd, data, rc);
+             fsync(fd);
+         }
+     }
+
+     return NULL;
+ }
+
+ static void *
+ _tty2ds(void *arg)
+ {
+     int fd = *((int *)arg);
+     const size_t DATA_SIZE = 1024;
+     unsigned char data[DATA_SIZE];
+     ssize_t rc;
+
+     while (1) {
+         rc = read(fd, data, DATA_SIZE);
+         if (rc <= 0) {
+             /* Broken pipe -- app quit */
+             syslog(LOG_ERR, "_tty2ds broken pipe");
+             close(fd);
+             exit(0);
+         }
+         if (_dsfd >= 0) {
+             ssize_t written = write(_dsfd, data, rc);
+             // Handle the client exit problem
+             if (written < 0) {
+                 close(_dsfd);
+                 _dsfd = -1;
+             }
+             fsync(_dsfd);
+         }
+         else
+         {
+             /* print orphaned message to the stdout */
+             printf("%.*s", (int)rc, data);
+             fflush(stdout);
+         }
+     }
+     return NULL;
+ }
+
+ static int
+ _start_app(char **args, int s)
+ {
+     pid_t pid;
+
+     if ((pid = fork()) < 0) {
+         syslog(LOG_ERR, "fork %s", strerror(errno));
+         return -1;
+     }
+     if (pid > 0) {
+         return pid;
+     }
+     dup2(s, 0);
+     dup2(s, 1);
+     dup2(s, 2);
+     int rc = execv(*args, args);
+
+     syslog(LOG_ERR, "execv program exit, rc=%d, errno=%d: %s\n", rc, errno, strerror(errno));
+     exit(0);
+ }
+
+ int
+ main(int argc, char *argv[])
+ {
+     int pid;
+     int do_fork = 0;
+     int rc;
+     int ttyfd, appfd;
+     pthread_t id;
+
+     auto usage = [=]() {
+         const char* prog = argv[0];
+         printf("Usage: %s [-d] [-f <sun_path>] <program> [args]\n", prog);
+         printf("    -d     Daemon mode\n");
+         printf("    -f     Specify the path of unix socket\n");
+         printf("Default sun_path: %s\n", DEFAULT_SUN_PATH);
+         printf("\n");
+         printf("Exit status:\n");
+         printf("    0      Both %s and program exit normally in non daemon mode, or %s exits normally in daemon mode\n", prog, prog);
+         printf("    1      %s exits with error\n", prog);
+         printf("    2      Program exits with non-zero exit status\n");
+         printf("    3      Program terminates without an exit status, eg. receiving a signal\n");
+         printf("    255    Usage error\n");
+         return 255;
+     };
+
+     const char *sun_path = DEFAULT_SUN_PATH;
+     for (argc--, argv++; argc > 0 && *argv; argc--, argv++) {
+         if (!strcmp(*argv, "--help") || !strcmp(*argv, "-h")) {
+             usage();
+             return 0;
+         }
+         else if (!strcmp(*argv, "-d")) {
+             syslog(LOG_INFO, "daemon mode\n");
+             do_fork = 1;
+         }
+         else if (!strcmp(*argv, "-f")) {
+             argc--, argv++;
+             if (argc > 1 && *argv) {
+                 sun_path = *argv;
+             }
+             else {
+                 fprintf(stderr, "[ERROR] bad domain socket filename\n");
+                 return usage();
+             }
+             syslog(LOG_INFO, "domain socket filename: %s\n", sun_path);
+         }
+         else break;
+     }
+
+     if (do_fork) {
+         /* Daemonize */
+         if (daemon(1, 1) < 0) {
+             syslog(LOG_ERR, "daemon(): %s", strerror(errno));
+             exit(EXIT_FAILURE);
+         }
+     }
+
+     /* Broken pipes are not a problem */
+     signal(SIGPIPE, SIG_IGN);
+
+     /* Get a pseudo tty */
+     if (openpty(&ttyfd, &appfd, NULL, NULL, NULL) < 0) {
+         syslog(LOG_ERR, "open pty: %s", strerror(errno));
+         exit(EXIT_FAILURE);
+     }
+
+     /* Start the application up with sv[1] as its stdio */
+     const char *process_name = argv[0];
+     if (process_name == NULL)
+     {
+         fprintf(stderr, "[ERROR] no program name\n");
+         return usage();
+     }
+     pid = _start_app(argv, appfd);
+
+     /* Setup server */
+     _server_socket = _setup_domain_socket(sun_path);
+
+     /* Start proxy for input */
+     if ((rc = pthread_create(&id, NULL, _ds2tty, (void *)&ttyfd)) < 0) {
+         syslog(LOG_ERR, "pthread_create: %s", strerror(rc));
+         exit(EXIT_FAILURE);
+     }
+
+     /* Start proxy for output */
+     if ((rc = pthread_create(&id, NULL, _tty2ds, (void *)&ttyfd)) < 0) {
+         syslog(LOG_ERR, "pthread_create: %s", strerror(rc));
+         exit(EXIT_FAILURE);
+     }
+
+     /* Wait for our child to exit */
+     int status;
+     waitpid(pid, &status, 0);
+     syslog(LOG_NOTICE, "child %s exited status: %d", process_name, status);
+
+     if (WIFEXITED(status))
+     {
+         if (WEXITSTATUS(status))
+         {
+             return 2;
+         }
+         else
+         {
+             return 0;
+         }
+     }
+     else
+     {
+         return 3;
+     }
+ }
diff --git a/platform/broadcom/sswsyncd/dsserve.h b/platform/broadcom/sswsyncd/dsserve.h
new file mode 100644
index 00000000000..13eaa0af4b5
--- /dev/null
+++ b/platform/broadcom/sswsyncd/dsserve.h
@@ -0,0 +1 @@
+static const char *const DEFAULT_SUN_PATH = "/var/run/sswsyncd/sswsyncd.socket";
diff --git a/platform/centec-arm64/sonic-platform-modules-e530/debian/control b/platform/centec-arm64/sonic-platform-modules-e530/debian/control
index 0c5f0da490d..f3a8635a428 100644
--- a/platform/centec-arm64/sonic-platform-modules-e530/debian/control
+++ b/platform/centec-arm64/sonic-platform-modules-e530/debian/control
@@ -7,20 +7,20 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-e530-48t4x-p
 Architecture: arm64
-Depends: linux-image-6.1.0-22-2-arm64-unsigned
+Depends: linux-image-6.1.0-29-2-arm64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-e530-24x2c
 Architecture: arm64
-Depends: linux-image-6.1.0-22-2-arm64-unsigned
+Depends: linux-image-6.1.0-29-2-arm64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-e530-48s4x
 Architecture: arm64
-Depends: linux-image-6.1.0-22-2-arm64-unsigned
+Depends: linux-image-6.1.0-29-2-arm64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-e530-24x2q
 Architecture: arm64
-Depends: linux-image-6.1.0-22-2-arm64-unsigned
+Depends: linux-image-6.1.0-29-2-arm64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/centec-arm64/sonic-platform-modules-fs/debian/control b/platform/centec-arm64/sonic-platform-modules-fs/debian/control
index c691b0b582a..e31f389a3c5 100755
--- a/platform/centec-arm64/sonic-platform-modules-fs/debian/control
+++ b/platform/centec-arm64/sonic-platform-modules-fs/debian/control
@@ -7,5 +7,5 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-s5800-48t4s
 Architecture: arm64
-Depends: linux-image-6.1.0-22-2-arm64-unsigned
+Depends: linux-image-6.1.0-29-2-arm64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/centec-arm64/sonic_fit.its b/platform/centec-arm64/sonic_fit.its
index 53b8dba4ece..30bfa284014 100644
--- a/platform/centec-arm64/sonic_fit.its
+++ b/platform/centec-arm64/sonic_fit.its
@@ -12,7 +12,7 @@
 	images {
 		kernel_ctc {
 			description = "ARM64 Kernel";			
-			data = /incbin/("./vmlinuz-6.1.0-22-2-arm64");
+			data = /incbin/("./vmlinuz-6.1.0-29-2-arm64");
 			type = "kernel";			
 			arch = "arm64";			
 			os = "linux";			
@@ -25,7 +25,7 @@
 		};
 		initramfs {
 			description = "initramfs";
-			data = /incbin/("./initrd.img-6.1.0-22-2-arm64");
+			data = /incbin/("./initrd.img-6.1.0-29-2-arm64");
 			type = "ramdisk";
 			arch = "arm64";
 			os = "linux";
diff --git a/platform/centec-arm64/tsingma-bsp/debian/control b/platform/centec-arm64/tsingma-bsp/debian/control
index c439be832d4..b0a0ce68b9b 100644
--- a/platform/centec-arm64/tsingma-bsp/debian/control
+++ b/platform/centec-arm64/tsingma-bsp/debian/control
@@ -7,5 +7,5 @@ Standards-Version: 3.9.3
 
 Package: tsingma-bsp
 Architecture: arm64
-Depends: linux-image-6.1.0-22-2-arm64-unsigned
+Depends: linux-image-6.1.0-29-2-arm64-unsigned
 Description: kernel modules for tsingma bsp
diff --git a/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install b/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install
index b27752503d1..eb7fb7f9dba 100644
--- a/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install
+++ b/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install
@@ -1,17 +1,17 @@
-src/ctc5236-mc/ctc5236-mc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/pwm-ctc/pwm-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/ctc5236_switch/ctc5236_switch.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/pinctrl-ctc/pinctrl-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/ctc_wdt/ctc_wdt.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/ctcmac/ctcmac.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/ctcmac/ctc5236_mdio.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/ctc-phy/mars.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/i2c-ctc/i2c-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/gpio-ctc/gpio-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/ehci-ctc/ehci-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/rtc-sd2405/rtc-sd2405.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/sdhci-ctc5236/sdhci-ctc5236.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
-src/spi-ctc-qspi/spi-ctc-qspi.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/ctc5236-mc/ctc5236-mc.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/pwm-ctc/pwm-ctc.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/ctc5236_switch/ctc5236_switch.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/pinctrl-ctc/pinctrl-ctc.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/ctc_wdt/ctc_wdt.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/ctcmac/ctcmac.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/ctcmac/ctc5236_mdio.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/ctc-phy/mars.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/i2c-ctc/i2c-ctc.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/gpio-ctc/gpio-ctc.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/ehci-ctc/ehci-ctc.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/rtc-sd2405/rtc-sd2405.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/sdhci-ctc5236/sdhci-ctc5236.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
+src/spi-ctc-qspi/spi-ctc-qspi.ko /lib/modules/6.1.0-29-2-arm64/kernel/extra
 src/ctc-dts/e530-ctc5236.dtb /boot/
 src/m2-w6010-48gt4x/m2-w6010-48gt4x-r0.dtb /boot/
 src/config/fw_env.config /etc/
diff --git a/platform/centec/sonic-platform-modules-e582/debian/control b/platform/centec/sonic-platform-modules-e582/debian/control
index 529aac43d42..4d0155b3410 100644
--- a/platform/centec/sonic-platform-modules-e582/debian/control
+++ b/platform/centec/sonic-platform-modules-e582/debian/control
@@ -7,11 +7,11 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-e582-48x2q4z
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-e582-48x6q
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
diff --git a/platform/centec/sonic-platform-modules-embedway/debian/control b/platform/centec/sonic-platform-modules-embedway/debian/control
index c01f8f2c6d2..bf4b1e5f0ee 100644
--- a/platform/centec/sonic-platform-modules-embedway/debian/control
+++ b/platform/centec/sonic-platform-modules-embedway/debian/control
@@ -7,6 +7,6 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-embedway-es6220
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
diff --git a/platform/centec/sonic-platform-modules-v682/debian/control b/platform/centec/sonic-platform-modules-v682/debian/control
index b775827ab75..972fd99f483 100644
--- a/platform/centec/sonic-platform-modules-v682/debian/control
+++ b/platform/centec/sonic-platform-modules-v682/debian/control
@@ -7,15 +7,15 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-v682-48y8c-d
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-v682-48y8c
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-v682-48x8c
 Architecture: amd64
-Depends: linux-image-6.1.0-22-2-amd64-unsigned
+Depends: linux-image-6.1.0-29-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/checkout/cisco-8000-smartswitch.ini b/platform/checkout/cisco-8000-smartswitch.ini
index d169b242d32..5232722f67e 100644
--- a/platform/checkout/cisco-8000-smartswitch.ini
+++ b/platform/checkout/cisco-8000-smartswitch.ini
@@ -1,4 +1,4 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=0.master.ss.0.3
+ref=202505.1.0.7
 
diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index 3965e969f49..9e9eb74324e 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.15
+ref=202505.1.0.7
diff --git a/platform/checkout/pensando.ini b/platform/checkout/pensando.ini
new file mode 100644
index 00000000000..8faffbfc22b
--- /dev/null
+++ b/platform/checkout/pensando.ini
@@ -0,0 +1,4 @@
+[module]
+repo=git@github.com:pensando/pensando-sonic-artifacts.git
+ref=1.87.0-SS-15-release
+path=platform/pensando/pensando-sonic-artifacts
diff --git a/platform/checkout/template.j2 b/platform/checkout/template.j2
index 17b8f00c890..46f4a8c3be8 100644
--- a/platform/checkout/template.j2
+++ b/platform/checkout/template.j2
@@ -1,4 +1,8 @@
+{% if module.path is defined %}
+{% set path = module.path %}
+{% else %}
 {% set path = env('PLATFORM_PATH') %}
+{% endif %}
 if [ ! -d {{ path }} ]; then git clone {{ module.repo }} {{ path }}; fi;
 if [ -d {{ path }}/.git ]; then cd {{ path }} &&
 
diff --git a/platform/components/docker-gbsyncd-broncos.mk b/platform/components/docker-gbsyncd-broncos.mk
index 100e29e5cee..7d6fcc1c21d 100644
--- a/platform/components/docker-gbsyncd-broncos.mk
+++ b/platform/components/docker-gbsyncd-broncos.mk
@@ -1,6 +1,6 @@
-LIBSAI_BRONCOS_VERSION = 3.11
-LIBSAI_BRONCOS_BRANCH_NAME = REL_3.11
-LIBSAI_BRONCOS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/bcmpai/$(LIBSAI_BRONCOS_BRANCH_NAME)/$(LIBSAI_BRONCOS_VERSION)"
+LIBSAI_BRONCOS_VERSION = 3.12
+LIBSAI_BRONCOS_BRANCH_NAME = REL_3.12
+LIBSAI_BRONCOS_URL_PREFIX = "https://packages.trafficmanager.net/public/sai/bcmpai/$(LIBSAI_BRONCOS_BRANCH_NAME)/$(LIBSAI_BRONCOS_VERSION)"
 LIBSAI_BRONCOS = libsaibroncos_$(LIBSAI_BRONCOS_VERSION)_amd64.deb
 $(LIBSAI_BRONCOS)_URL = "$(LIBSAI_BRONCOS_URL_PREFIX)/$(LIBSAI_BRONCOS)"
 
@@ -12,18 +12,18 @@ DOCKER_GBSYNCD_BRONCOS_DBG = $(DOCKER_GBSYNCD_BRONCOS_STEM)-$(DBG_IMAGE_MARK).gz
 
 $(DOCKER_GBSYNCD_BRONCOS)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) $(DSSERVE)
 
-$(DOCKER_GBSYNCD_BRONCOS)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_GBSYNCD_BRONCOS)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
-$(DOCKER_GBSYNCD_BRONCOS)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_GBSYNCD_BRONCOS)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 
-$(DOCKER_GBSYNCD_BRONCOS)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_GBSYNCD_BRONCOS)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
 SONIC_DOCKER_IMAGES += $(DOCKER_GBSYNCD_BRONCOS)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_GBSYNCD_BRONCOS)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_GBSYNCD_BRONCOS)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GBSYNCD_BRONCOS)
 
 SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_BRONCOS_DBG)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_GBSYNCD_BRONCOS_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GBSYNCD_BRONCOS_DBG)
 SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_BRONCOS_DBG)
 
 $(DOCKER_GBSYNCD_BRONCOS)_CONTAINER_NAME = gbsyncd
diff --git a/platform/components/docker-gbsyncd-broncos/Dockerfile.j2 b/platform/components/docker-gbsyncd-broncos/Dockerfile.j2
index 3bb3f402098..0b150a122bb 100644
--- a/platform/components/docker-gbsyncd-broncos/Dockerfile.j2
+++ b/platform/components/docker-gbsyncd-broncos/Dockerfile.j2
@@ -1,4 +1,4 @@
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/platform/components/docker-gbsyncd-credo.mk b/platform/components/docker-gbsyncd-credo.mk
index c8b14c93fb1..37212c202d2 100644
--- a/platform/components/docker-gbsyncd-credo.mk
+++ b/platform/components/docker-gbsyncd-credo.mk
@@ -1,14 +1,14 @@
 DOCKER_GBSYNCD_PLATFORM_CODE = credo
 
 LIBSAI_CREDO = libsaicredo_0.9.9_amd64.deb
-$(LIBSAI_CREDO)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO)"
+$(LIBSAI_CREDO)_URL = "https://packages.trafficmanager.net/public/credosai/$(LIBSAI_CREDO)"
 LIBSAI_CREDO_OWL = libsaicredo-owl_0.9.9_amd64.deb
-$(LIBSAI_CREDO_OWL)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO_OWL)"
+$(LIBSAI_CREDO_OWL)_URL = "https://packages.trafficmanager.net/public/credosai/$(LIBSAI_CREDO_OWL)"
 LIBSAI_CREDO_BLACKHAWK = libsaicredo-blackhawk_0.9.9_amd64.deb
-$(LIBSAI_CREDO_BLACKHAWK)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO_BLACKHAWK)"
+$(LIBSAI_CREDO_BLACKHAWK)_URL = "https://packages.trafficmanager.net/public/credosai/$(LIBSAI_CREDO_BLACKHAWK)"
 
 ifneq ($($(LIBSAI_CREDO)_URL),)
-include $(PLATFORM_PATH)/../template/docker-gbsyncd-base.mk
+include $(PLATFORM_PATH)/../template/docker-gbsyncd-bookworm.mk
 $(DOCKER_GBSYNCD_BASE)_VERSION = 1.0.0
 $(DOCKER_GBSYNCD_BASE)_PACKAGE_NAME = gbsyncd
 $(DOCKER_GBSYNCD_BASE)_PATH = $(PLATFORM_PATH)/../components/docker-gbsyncd-$(DOCKER_GBSYNCD_PLATFORM_CODE)
diff --git a/platform/components/docker-gbsyncd-credo/Dockerfile.j2 b/platform/components/docker-gbsyncd-credo/Dockerfile.j2
index 24fef740dc3..3b8c52b7ee5 100644
--- a/platform/components/docker-gbsyncd-credo/Dockerfile.j2
+++ b/platform/components/docker-gbsyncd-credo/Dockerfile.j2
@@ -1,4 +1,4 @@
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/platform/components/docker-gbsyncd-milleniob.dep b/platform/components/docker-gbsyncd-milleniob.dep
new file mode 100644
index 00000000000..7935a854eb9
--- /dev/null
+++ b/platform/components/docker-gbsyncd-milleniob.dep
@@ -0,0 +1,12 @@
+DPATH       := $($(DOCKER_GBSYNCD_MILLENIOB)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST)
+DEP_FILES   += platform/components/docker-gbsyncd-milleniob.mk
+DEP_FILES   += platform/components/docker-gbsyncd-milleniob.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_GBSYNCD_MILLENIOB)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_GBSYNCD_MILLENIOB)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_GBSYNCD_MILLENIOB)_DEP_FILES   := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_GBSYNCD_MILLENIOB),$(DOCKER_GBSYNCD_MILLENIOB_DBG)))
diff --git a/platform/components/docker-gbsyncd-milleniob.mk b/platform/components/docker-gbsyncd-milleniob.mk
new file mode 100644
index 00000000000..45c3fa921be
--- /dev/null
+++ b/platform/components/docker-gbsyncd-milleniob.mk
@@ -0,0 +1,40 @@
+LIBSAI_MILLENIOB_VERSION = 3.14.0
+LIBSAI_MILLENIOB = libsaimilleniob_$(LIBSAI_MILLENIOB_VERSION)_amd64.deb
+
+# Fill the PAI URL here
+$(LIBSAI_MILLENIOB)_URL =
+
+ifneq ($($(LIBSAI_MILLENIOB)_URL),)
+SONIC_ONLINE_DEBS += $(LIBSAI_MILLENIOB)
+
+DOCKER_GBSYNCD_MILLENIOB_STEM = docker-gbsyncd-milleniob
+DOCKER_GBSYNCD_MILLENIOB = $(DOCKER_GBSYNCD_MILLENIOB_STEM).gz
+DOCKER_GBSYNCD_MILLENIOB_DBG = $(DOCKER_GBSYNCD_MILLENIOB_STEM)-$(DBG_IMAGE_MARK).gz
+
+$(DOCKER_GBSYNCD_MILLENIOB)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
+
+$(DOCKER_GBSYNCD_MILLENIOB)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+
+$(DOCKER_GBSYNCD_MILLENIOB)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
+
+$(DOCKER_GBSYNCD_MILLENIOB)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
+
+SONIC_DOCKER_IMAGES += $(DOCKER_GBSYNCD_MILLENIOB)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_GBSYNCD_MILLENIOB)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GBSYNCD_MILLENIOB)
+
+SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_MILLENIOB_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GBSYNCD_MILLENIOB_DBG)
+SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_MILLENIOB_DBG)
+
+$(DOCKER_GBSYNCD_MILLENIOB)_CONTAINER_NAME = gbsyncd
+$(DOCKER_GBSYNCD_MILLENIOB)_RUN_OPT += --privileged -t
+$(DOCKER_GBSYNCD_MILLENIOB)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
+$(DOCKER_GBSYNCD_MILLENIOB)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_GBSYNCD_MILLENIOB)_RUN_OPT += -v /host/warmboot:/var/warmboot
+
+$(DOCKER_GBSYNCD_MILLENIOB)_VERSION = 1.0.0
+$(DOCKER_GBSYNCD_MILLENIOB)_PACKAGE_NAME = gbsyncd-milleniob
+$(DOCKER_GBSYNCD_MILLENIOB)_PATH = $(PLATFORM_PATH)/../components/docker-gbsyncd-milleniob
+$(DOCKER_GBSYNCD_MILLENIOB)_DEPENDS += $(SYNCD) $(LIBSAI_MILLENIOB)
+endif
diff --git a/platform/components/docker-gbsyncd-milleniob/Dockerfile.j2 b/platform/components/docker-gbsyncd-milleniob/Dockerfile.j2
new file mode 100644
index 00000000000..faab86ae4c8
--- /dev/null
+++ b/platform/components/docker-gbsyncd-milleniob/Dockerfile.j2
@@ -0,0 +1,42 @@
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update
+
+RUN apt-get install -f -y iproute2 libcap2-bin libprotobuf-dev
+
+COPY \
+{% for deb in docker_gbsyncd_milleniob_debs.split(' ') -%}
+{% if 'libsaibcm' not in deb -%}
+debs/{{ deb }}{{' '}}
+{%- endif %}
+{%- endfor -%}
+debs/
+
+RUN dpkg -i \
+{% for deb in docker_gbsyncd_milleniob_debs.split(' ') -%}
+{% if 'libsaibcm' not in deb -%}
+debs/{{ deb }}{{' '}}
+{%- endif %}
+{%- endfor %}
+
+COPY ["docker-init.sh", "/usr/bin/"]
+COPY ["start.sh", "/usr/bin/"]
+COPY ["bcmsh", "/usr/bin/"]
+
+COPY ["critical_processes.j2", "/usr/share/sonic/templates"]
+COPY ["supervisord.conf.j2", "/usr/share/sonic/templates"]
+
+COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
+COPY ["files/dsserve", "/usr/bin/"]
+RUN chmod +x /usr/bin/dsserve
+
+## Clean up
+RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
+RUN rm -rf /debs
+
+ENTRYPOINT ["/usr/bin/docker-init.sh"]
diff --git a/platform/components/docker-gbsyncd-milleniob/bcmsh b/platform/components/docker-gbsyncd-milleniob/bcmsh
new file mode 100755
index 00000000000..bad7a105195
--- /dev/null
+++ b/platform/components/docker-gbsyncd-milleniob/bcmsh
@@ -0,0 +1,40 @@
+#!/bin/bash
+usage="$(basename "$0") [-h] [-q] [-t timeout] -- interactive shell for bcm service
+
+where:
+    -h  show this help text
+    -t  inactivity timeout in seconds (default 300 seconds, 0 for no timeout)
+    -q  quite, no banner (default: verbose)"
+
+banner="Press Enter to show prompt.
+Press Ctrl+C to exit.
+NOTICE: Only one bcmsh or bcmcmd can connect to the shell at same time.
+"
+
+# Default verbose
+quiet=false
+timeout=300
+
+while getopts 'hqt:' option; do
+  case "$option" in
+    h) echo "$usage"
+       exit
+       ;;
+    q) quiet=true
+       ;;
+    t) timeout=$OPTARG
+       ;;
+   \?) printf "illegal option: -%s\n" "$OPTARG" >&2
+       echo "$usage" >&2
+       exit 1
+       ;;
+  esac
+done
+shift $((OPTIND - 1))
+
+if [ "$quiet" = false ]; then
+    echo "$banner"
+fi
+
+/usr/bin/socat -T$timeout readline UNIX-CONNECT:/var/run/sswsyncd/sswgbsyncd.socket
+
diff --git a/platform/components/docker-gbsyncd-milleniob/critical_processes.j2 b/platform/components/docker-gbsyncd-milleniob/critical_processes.j2
new file mode 100644
index 00000000000..d1163a9c304
--- /dev/null
+++ b/platform/components/docker-gbsyncd-milleniob/critical_processes.j2
@@ -0,0 +1,2 @@
+program:dsserve
+program:syncd
diff --git a/platform/components/docker-gbsyncd-milleniob/docker-init.sh b/platform/components/docker-gbsyncd-milleniob/docker-init.sh
new file mode 100755
index 00000000000..93a1b931dfa
--- /dev/null
+++ b/platform/components/docker-gbsyncd-milleniob/docker-init.sh
@@ -0,0 +1,16 @@
+#! /bin/sh
+
+GB_CONFIG=/usr/share/sonic/hwsku/gearbox_config.json
+
+if [ ! -f $GB_CONFIG ]; then
+   exit 0
+fi
+
+CFGGEN_ARG="-j $GB_CONFIG"
+
+mkdir -p /etc/supervisor/conf.d/
+
+sonic-cfggen $CFGGEN_ARG -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf
+sonic-cfggen $CFGGEN_ARG -t /usr/share/sonic/templates/critical_processes.j2 > /etc/supervisor/critical_processes
+
+exec /usr/local/bin/supervisord
diff --git a/platform/components/docker-gbsyncd-milleniob/start.sh b/platform/components/docker-gbsyncd-milleniob/start.sh
new file mode 100755
index 00000000000..ac7de02dcdc
--- /dev/null
+++ b/platform/components/docker-gbsyncd-milleniob/start.sh
@@ -0,0 +1,14 @@
+#!/usr/bin/env bash
+
+HWSKU_DIR=/usr/share/sonic/hwsku
+
+mkdir -p /etc/sai.d/
+
+# Create/Copy the psai.profile to /etc/sai.d/psai.profile
+if [ -f $HWSKU_DIR/psai.profile.j2 ]; then
+    sonic-cfggen -d -t $HWSKU_DIR/psai.profile.j2 > /etc/sai.d/psai.profile
+else
+    if [ -f $HWSKU_DIR/psai.profile ]; then
+        cp $HWSKU_DIR/psai.profile /etc/sai.d/psai.profile
+    fi
+fi
diff --git a/platform/components/docker-gbsyncd-milleniob/supervisord.conf.j2 b/platform/components/docker-gbsyncd-milleniob/supervisord.conf.j2
new file mode 100644
index 00000000000..ec83eaf1a92
--- /dev/null
+++ b/platform/components/docker-gbsyncd-milleniob/supervisord.conf.j2
@@ -0,0 +1,43 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=unexpected
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+
+[program:start]
+command=/usr/bin/start.sh
+priority=2
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
+
+[program:syncd]
+environment=MILLENIO_DEVICE_PATH=/usr/lib,MILLENIOB_DEVICE_PATH=/usr/lib
+command=/usr/bin/dsserve -f /var/run/sswsyncd/sswgbsyncd.socket /usr/bin/syncd --diag -s -p /etc/sai.d/psai.profile -x /usr/share/sonic/hwsku/context_config.json -g 1
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=start:exited
diff --git a/platform/marvell-prestera/docker-saiserver-mrvl-prestera.dep b/platform/marvell-prestera/docker-saiserver-mrvl-prestera.dep
new file mode 100644
index 00000000000..5a01493bd23
--- /dev/null
+++ b/platform/marvell-prestera/docker-saiserver-mrvl-prestera.dep
@@ -0,0 +1,8 @@
+DPATH       := $($(DOCKER_SAISERVER_MRVL)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-saiserver-mrvl-prestera.mk $(PLATFORM_PATH)/docker-saiserver-mrvl-prestera.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_SAISERVER_MRVL)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_SAISERVER_MRVL)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SAISERVER_MRVL)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-prestera/docker-saiserver-mrvl-prestera.mk b/platform/marvell-prestera/docker-saiserver-mrvl-prestera.mk
new file mode 100644
index 00000000000..88eb3594054
--- /dev/null
+++ b/platform/marvell-prestera/docker-saiserver-mrvl-prestera.mk
@@ -0,0 +1,15 @@
+# docker image for mrvl saiserver
+
+DOCKER_SAISERVER_MRVL = docker-saiserver$(SAITHRIFT_VER)-mrvl-prestera.gz
+$(DOCKER_SAISERVER_MRVL)_PATH = $(PLATFORM_PATH)/docker-saiserver-mrvl-prestera
+$(DOCKER_SAISERVER_MRVL)_DEPENDS += $(SAISERVER)
+$(DOCKER_SAISERVER_MRVL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MRVL)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SAISERVER_MRVL)
+
+$(DOCKER_SAISERVER_MRVL)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER)
+$(DOCKER_SAISERVER_MRVL)_RUN_OPT += --privileged -t
+$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
+$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd
+$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/marvell-prestera/docker-saiserver-mrvl-prestera/Dockerfile.j2 b/platform/marvell-prestera/docker-saiserver-mrvl-prestera/Dockerfile.j2
new file mode 100644
index 00000000000..21b0bcce801
--- /dev/null
+++ b/platform/marvell-prestera/docker-saiserver-mrvl-prestera/Dockerfile.j2
@@ -0,0 +1,35 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update              \
+ && apt-get -y install          \
+      libboost-atomic1.74.0     \
+      libqt5core5a              \
+      libqt5network5            \
+      gdb                       \
+      libthrift-0.17.0
+
+COPY \
+{% for deb in docker_saiserver_mrvl_prestera_debs.split(' ') -%}
+debs/{{ deb }}{{' '}}
+{%- endfor -%}
+debs/
+
+RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
+{% for deb in docker_saiserver_mrvl_prestera_debs.split(' ') -%}
+dpkg_apt debs/{{ deb }}{{'; '}}
+{%- endfor %}
+
+COPY ["start.sh", "/usr/bin/"]
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+
+## Clean up
+RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
+RUN rm -rf /debs
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell/docker-saiserver-mrvl/start.sh b/platform/marvell-prestera/docker-saiserver-mrvl-prestera/start.sh
similarity index 100%
rename from platform/marvell/docker-saiserver-mrvl/start.sh
rename to platform/marvell-prestera/docker-saiserver-mrvl-prestera/start.sh
diff --git a/platform/marvell/docker-saiserver-mrvl/supervisord.conf b/platform/marvell-prestera/docker-saiserver-mrvl-prestera/supervisord.conf
similarity index 100%
rename from platform/marvell/docker-saiserver-mrvl/supervisord.conf
rename to platform/marvell-prestera/docker-saiserver-mrvl-prestera/supervisord.conf
diff --git a/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc.dep b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc.dep
new file mode 100644
index 00000000000..cb6ed4eebc3
--- /dev/null
+++ b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc.dep
@@ -0,0 +1,8 @@
+DPATH       := $($(DOCKER_SYNCD_MRVL_RPC)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-syncd-mrvl-prestera-rpc.mk $(PLATFORM_PATH)/docker-syncd-mrvl-prestera-rpc.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_SYNCD_MRVL_RPC)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_SYNCD_MRVL_RPC)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SYNCD_MRVL_RPC)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc.mk b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc.mk
new file mode 100644
index 00000000000..b8bf565d1cb
--- /dev/null
+++ b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc.mk
@@ -0,0 +1,29 @@
+# docker image for mrvl syncd with rpc
+
+DOCKER_SYNCD_MRVL_RPC = docker-syncd-mrvl-prestera-rpc.gz
+$(DOCKER_SYNCD_MRVL_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mrvl-prestera-rpc
+$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC)
+$(DOCKER_SYNCD_MRVL_RPC)_PYTHON_WHEELS += $(PTF_PY3)
+$(DOCKER_SYNCD_MRVL_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
+ifeq ($(INSTALL_DEBUG_TOOLS), y)
+$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
+                                    $(LIBSWSSCOMMON_DBG) \
+                                    $(LIBSAIMETADATA_DBG) \
+                                    $(LIBSAIREDIS_DBG)
+endif
+$(DOCKER_SYNCD_MRVL_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE)
+SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC)
+ifeq ($(ENABLE_SYNCD_RPC),y)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC)
+endif
+
+$(DOCKER_SYNCD_MRVL_RPC)_CONTAINER_NAME = syncd
+$(DOCKER_SYNCD_MRVL_RPC)_VERSION = 1.0.0+rpc
+$(DOCKER_SYNCD_MRVL_RPC)_PACKAGE_NAME = syncd
+$(DOCKER_SYNCD_MRVL_RPC)_MACHINE = marvell-prestera
+$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += --privileged -t
+$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
+$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot
+
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_MRVL_RPC)
diff --git a/platform/marvell/docker-syncd-mrvl-rpc/99-syncd.conf b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc/99-syncd.conf
similarity index 100%
rename from platform/marvell/docker-syncd-mrvl-rpc/99-syncd.conf
rename to platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc/99-syncd.conf
diff --git a/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc/Dockerfile.j2 b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc/Dockerfile.j2
new file mode 100644
index 00000000000..4e18df32a37
--- /dev/null
+++ b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc/Dockerfile.j2
@@ -0,0 +1,59 @@
+FROM docker-syncd-mrvl-prestera-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+{% from "dockers/dockerfile-macros.j2" import install_python_wheels, copy_files %}
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+COPY \
+{% for deb in docker_syncd_mrvl_prestera_rpc_debs.split(' ') -%}
+debs/{{ deb }}{{' '}}
+{%- endfor -%}
+debs/
+
+RUN apt-get purge -y syncd
+
+## Pre-install the fundamental packages ##
+RUN apt-get update \
+ && apt-get -y install  \
+    net-tools           \
+    python3-pip		\
+    python3-setuptools	\
+    build-essential     \
+    libssl-dev          \
+    libffi-dev          \
+    python3-dev          \
+    wget                \
+    libqt5core5a        \
+    libqt5network5      \
+    libboost-atomic1.74.0 \
+    libthrift-0.17.0      \
+    libnanomsg5           \
+    libnanomsg-dev
+
+RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
+{% for deb in docker_syncd_mrvl_prestera_rpc_debs.split(' ') -%}
+dpkg_apt debs/{{ deb }}{{'; '}}
+{%- endfor %}
+
+RUN pip3 install cffi    \
+ && pip3 install nnpy    \
+ && mkdir -p /opt       \
+ && cd /opt             \
+ && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py
+
+COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
+
+{% if docker_syncd_mrvl_prestera_rpc_whls.strip() -%}
+# Copy locally-built Python wheel dependencies
+{{ copy_files("python-wheels/", docker_syncd_mrvl_prestera_rpc_whls.split(' '), "/python-wheels/") }}
+
+# Install locally-built Python wheel dependencies
+{{ install_python_wheels(docker_syncd_mrvl_prestera_rpc_whls.split(' ')) }}
+{% endif %}
+
+## Clean up
+RUN apt-get purge -y libyaml-dev python3-dev libffi-dev libssl-dev wget build-essential
+RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
+RUN rm -rf /root/deps
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell/docker-syncd-mrvl-rpc/ptf_nn_agent.conf b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc/ptf_nn_agent.conf
similarity index 100%
rename from platform/marvell/docker-syncd-mrvl-rpc/ptf_nn_agent.conf
rename to platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc/ptf_nn_agent.conf
diff --git a/platform/marvell-prestera/docker-syncd-mrvl-prestera.dep b/platform/marvell-prestera/docker-syncd-mrvl-prestera.dep
new file mode 100644
index 00000000000..9bb5f572a9c
--- /dev/null
+++ b/platform/marvell-prestera/docker-syncd-mrvl-prestera.dep
@@ -0,0 +1,10 @@
+DPATH       := $($(DOCKER_SYNCD_BASE)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-syncd-mrvl-prestera.mk $(PLATFORM_PATH)/docker-syncd-mrvl-prestera.dep $(PLATFORM_PATH)/sai.mk
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_SYNCD_BASE)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_SYNCD_BASE)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SYNCD_BASE)_DEP_FILES   := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_SYNCD_BASE),$(DOCKER_SYNCD_BASE_DBG)))
diff --git a/platform/marvell-prestera/docker-syncd-mrvl-prestera.mk b/platform/marvell-prestera/docker-syncd-mrvl-prestera.mk
new file mode 100644
index 00000000000..177f9a10e52
--- /dev/null
+++ b/platform/marvell-prestera/docker-syncd-mrvl-prestera.mk
@@ -0,0 +1,18 @@
+# docker image for mrvl syncd
+
+DOCKER_SYNCD_PLATFORM_CODE = mrvl-prestera
+include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
+
+$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD)
+$(DOCKER_SYNCD_BASE)_DEPENDS += $(MRVL_SAI)
+
+$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
+                                $(LIBSWSSCOMMON_DBG) \
+                                $(LIBSAIMETADATA_DBG) \
+                                $(LIBSAIREDIS_DBG)
+
+$(DOCKER_SYNCD_BASE)_VERSION = 1.0.0
+$(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd
+$(DOCKER_SYNCD_BASE)_MACHINE = marvell-prestera
+
+$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/marvell-prestera/docker-syncd-mrvl-prestera/Dockerfile.j2 b/platform/marvell-prestera/docker-syncd-mrvl-prestera/Dockerfile.j2
new file mode 100755
index 00000000000..a67a19a00b5
--- /dev/null
+++ b/platform/marvell-prestera/docker-syncd-mrvl-prestera/Dockerfile.j2
@@ -0,0 +1,37 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update
+
+COPY \
+{% for deb in docker_syncd_mrvl_prestera_debs.split(' ') -%}
+debs/{{ deb }}{{' '}}
+{%- endfor -%}
+debs/
+
+RUN apt-get update \
+ && apt-get -y install  \
+    net-tools           \
+    iputils-ping
+
+RUN apt-get -y install libpcap-dev libxml2-dev python3-dev swig
+
+RUN dpkg -i \
+{% for deb in docker_syncd_mrvl_prestera_debs.split(' ') -%}
+debs/{{ deb }}{{' '}}
+{%- endfor %}
+
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+COPY ["files/supervisor-proc-exit-listener", "/usr/bin/"]
+COPY ["critical_processes", "/etc/supervisor/"]
+
+## Clean up
+RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
+RUN rm -rf /debs
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell/docker-syncd-mrvl/critical_processes b/platform/marvell-prestera/docker-syncd-mrvl-prestera/critical_processes
similarity index 100%
rename from platform/marvell/docker-syncd-mrvl/critical_processes
rename to platform/marvell-prestera/docker-syncd-mrvl-prestera/critical_processes
diff --git a/platform/marvell/docker-syncd-mrvl/supervisord.conf b/platform/marvell-prestera/docker-syncd-mrvl-prestera/supervisord.conf
similarity index 100%
rename from platform/marvell/docker-syncd-mrvl/supervisord.conf
rename to platform/marvell-prestera/docker-syncd-mrvl-prestera/supervisord.conf
diff --git a/platform/marvell/docker-syncd-mrvl/syncd.sh b/platform/marvell-prestera/docker-syncd-mrvl-prestera/syncd.sh
similarity index 100%
rename from platform/marvell/docker-syncd-mrvl/syncd.sh
rename to platform/marvell-prestera/docker-syncd-mrvl-prestera/syncd.sh
diff --git a/platform/marvell/libsaithrift-dev.dep b/platform/marvell-prestera/libsaithrift-dev.dep
similarity index 100%
rename from platform/marvell/libsaithrift-dev.dep
rename to platform/marvell-prestera/libsaithrift-dev.dep
diff --git a/platform/marvell/libsaithrift-dev.mk b/platform/marvell-prestera/libsaithrift-dev.mk
similarity index 100%
rename from platform/marvell/libsaithrift-dev.mk
rename to platform/marvell-prestera/libsaithrift-dev.mk
diff --git a/platform/marvell/mrvl-prestera b/platform/marvell-prestera/mrvl-prestera
similarity index 100%
rename from platform/marvell/mrvl-prestera
rename to platform/marvell-prestera/mrvl-prestera
diff --git a/platform/marvell/mrvl-prestera.dep b/platform/marvell-prestera/mrvl-prestera.dep
similarity index 100%
rename from platform/marvell/mrvl-prestera.dep
rename to platform/marvell-prestera/mrvl-prestera.dep
diff --git a/platform/marvell/mrvl-prestera.mk b/platform/marvell-prestera/mrvl-prestera.mk
similarity index 100%
rename from platform/marvell/mrvl-prestera.mk
rename to platform/marvell-prestera/mrvl-prestera.mk
diff --git a/platform/marvell/one-image.dep b/platform/marvell-prestera/one-image.dep
similarity index 100%
rename from platform/marvell/one-image.dep
rename to platform/marvell-prestera/one-image.dep
diff --git a/platform/marvell/one-image.mk b/platform/marvell-prestera/one-image.mk
similarity index 86%
rename from platform/marvell/one-image.mk
rename to platform/marvell-prestera/one-image.mk
index be282e921ab..6adca07fbcd 100644
--- a/platform/marvell/one-image.mk
+++ b/platform/marvell-prestera/one-image.mk
@@ -1,11 +1,11 @@
-# sonic marvell one image installer
+# sonic marvell-prestera one image installer
 
 ifeq ($(CONFIGURED_ARCH),$(filter $(CONFIGURED_ARCH),arm64 armhf))
-SONIC_ONE_IMAGE = sonic-marvell-$(CONFIGURED_ARCH).bin
+SONIC_ONE_IMAGE = sonic-marvell-prestera-$(CONFIGURED_ARCH).bin
 else
-SONIC_ONE_IMAGE = sonic-marvell.bin
+SONIC_ONE_IMAGE = sonic-marvell-prestera.bin
 endif
-$(SONIC_ONE_IMAGE)_MACHINE = marvell
+$(SONIC_ONE_IMAGE)_MACHINE = marvell-prestera
 $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie
 $(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR)
 ifeq ($(CONFIGURED_ARCH),arm64)
diff --git a/platform/marvell/onie-image-arm64.conf b/platform/marvell-prestera/onie-image-arm64.conf
similarity index 98%
rename from platform/marvell/onie-image-arm64.conf
rename to platform/marvell-prestera/onie-image-arm64.conf
index 69d93d72298..7b252d69f77 100644
--- a/platform/marvell/onie-image-arm64.conf
+++ b/platform/marvell-prestera/onie-image-arm64.conf
@@ -28,7 +28,7 @@ FILESYSTEM_DOCKERFS=dockerfs.tar.gz
 DOCKERFS_DIR=docker
 
 ## docker ramfs disk space
-DOCKER_RAMFS_SIZE=2500M
+DOCKER_RAMFS_SIZE=3500M
 
 ## Output file name for onie installer
 OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.bin
diff --git a/platform/marvell/platform-marvell.dep b/platform/marvell-prestera/platform-marvell.dep
similarity index 100%
rename from platform/marvell/platform-marvell.dep
rename to platform/marvell-prestera/platform-marvell.dep
diff --git a/platform/marvell/platform-marvell.mk b/platform/marvell-prestera/platform-marvell.mk
similarity index 100%
rename from platform/marvell/platform-marvell.mk
rename to platform/marvell-prestera/platform-marvell.mk
diff --git a/platform/marvell/platform-nokia.dep b/platform/marvell-prestera/platform-nokia.dep
similarity index 100%
rename from platform/marvell/platform-nokia.dep
rename to platform/marvell-prestera/platform-nokia.dep
diff --git a/platform/marvell/platform-nokia.mk b/platform/marvell-prestera/platform-nokia.mk
similarity index 100%
rename from platform/marvell/platform-nokia.mk
rename to platform/marvell-prestera/platform-nokia.mk
diff --git a/platform/marvell/platform_arm64.conf b/platform/marvell-prestera/platform_arm64.conf
similarity index 99%
rename from platform/marvell/platform_arm64.conf
rename to platform/marvell-prestera/platform_arm64.conf
index 617ab6ab9db..0f177774145 100644
--- a/platform/marvell/platform_arm64.conf
+++ b/platform/marvell-prestera/platform_arm64.conf
@@ -9,7 +9,7 @@ VAR_LOG=512
 UBOOT_FW_DEFAULT=1
 
 kernel_addr=0x1100000
-kernel_version=6.1.0-22-2-arm64
+kernel_version=6.1.0-29-2-arm64
 kernel_fname="/boot/vmlinuz-$kernel_version"
 initrd_fname="/boot/initrd.img-$kernel_version"
 fit_fname="/boot/sonic_arm64.fit"
diff --git a/platform/marvell/platform_armhf.conf b/platform/marvell-prestera/platform_armhf.conf
similarity index 99%
rename from platform/marvell/platform_armhf.conf
rename to platform/marvell-prestera/platform_armhf.conf
index dd7c972b938..23bd534c1b5 100644
--- a/platform/marvell/platform_armhf.conf
+++ b/platform/marvell-prestera/platform_armhf.conf
@@ -10,8 +10,8 @@ fdt_addr=0x2800000
 fdt_high=0x28fffff
 initrd_addr=0x2900000
 
-kernel_fname="/boot/vmlinuz-6.1.0-22-2-armmp"
-initrd_fname="/boot/initrd.img-6.1.0-22-2-armmp"
+kernel_fname="/boot/vmlinuz-6.1.0-29-2-armmp"
+initrd_fname="/boot/initrd.img-6.1.0-29-2-armmp"
 fdt_fname="/boot/armada-385-ET6448M_4G_Nand.dtb"
 
 if [ "$install_env" = "onie" ]; then
diff --git a/platform/marvell-prestera/rules.dep b/platform/marvell-prestera/rules.dep
new file mode 100644
index 00000000000..c31677b4ad9
--- /dev/null
+++ b/platform/marvell-prestera/rules.dep
@@ -0,0 +1,11 @@
+include $(PLATFORM_PATH)/docker-saiserver-mrvl-prestera.dep
+include $(PLATFORM_PATH)/docker-syncd-mrvl-prestera-rpc.dep
+include $(PLATFORM_PATH)/docker-syncd-mrvl-prestera.dep
+include $(PLATFORM_PATH)/libsaithrift-dev.dep
+include $(PLATFORM_PATH)/one-image.dep
+include $(PLATFORM_PATH)/platform-marvell.dep
+ifeq ($(CONFIGURED_ARCH),$(filter $(CONFIGURED_ARCH),arm64 armhf))
+include $(PLATFORM_PATH)/mrvl-prestera.dep
+include $(PLATFORM_PATH)/platform-nokia.dep
+endif
+include $(PLATFORM_PATH)/sai.dep
diff --git a/platform/marvell-prestera/rules.mk b/platform/marvell-prestera/rules.mk
new file mode 100644
index 00000000000..74792e9889b
--- /dev/null
+++ b/platform/marvell-prestera/rules.mk
@@ -0,0 +1,27 @@
+include $(PLATFORM_PATH)/sai.mk
+include $(PLATFORM_PATH)/docker-syncd-mrvl-prestera.mk
+include $(PLATFORM_PATH)/docker-syncd-mrvl-prestera-rpc.mk
+include $(PLATFORM_PATH)/docker-saiserver-mrvl-prestera.mk
+include $(PLATFORM_PATH)/libsaithrift-dev.mk
+include $(PLATFORM_PATH)/one-image.mk
+include $(PLATFORM_PATH)/platform-marvell.mk
+ifeq ($(CONFIGURED_ARCH),$(filter $(CONFIGURED_ARCH),arm64 armhf))
+include $(PLATFORM_PATH)/mrvl-prestera.mk
+include $(PLATFORM_PATH)/platform-nokia.mk
+endif
+
+SONIC_ALL += $(SONIC_ONE_IMAGE) \
+             $(DOCKER_FPM) 	\
+             $(DOCKER_SYNCD_MRVL_RPC)
+
+# Inject mrvl-prestera sai into syncd
+$(SYNCD)_DEPENDS += $(MRVL_SAI)
+$(SYNCD)_UNINSTALLS += $(MRVL_SAI)
+
+ifeq ($(ENABLE_SYNCD_RPC),y)
+$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS))
+$(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
+endif
+
+# Runtime dependency on mrvl-prestera sai is set only for syncd
+$(SYNCD)_RDEPENDS += $(MRVL_SAI)
diff --git a/platform/marvell/sai.dep b/platform/marvell-prestera/sai.dep
similarity index 100%
rename from platform/marvell/sai.dep
rename to platform/marvell-prestera/sai.dep
diff --git a/platform/marvell/sai.mk b/platform/marvell-prestera/sai.mk
similarity index 82%
rename from platform/marvell/sai.mk
rename to platform/marvell-prestera/sai.mk
index 2191d415e28..b32bc910c6d 100644
--- a/platform/marvell/sai.mk
+++ b/platform/marvell-prestera/sai.mk
@@ -1,12 +1,12 @@
 # Marvell SAI
 
-BRANCH = master
+BRANCH = 202505
 ifeq ($(CONFIGURED_ARCH),arm64)
-MRVL_SAI_VERSION = 1.15.1-1
+MRVL_SAI_VERSION = 1.16.1-2
 else ifeq ($(CONFIGURED_ARCH),armhf)
-MRVL_SAI_VERSION = 1.15.1-1
+MRVL_SAI_VERSION = 1.16.1-2
 else
-MRVL_SAI_VERSION = 1.15.1-1
+MRVL_SAI_VERSION = 1.16.1-2
 endif
 
 MRVL_SAI_URL_PREFIX = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/$(CONFIGURED_ARCH)/sai-plugin/$(BRANCH)/
diff --git a/platform/marvell/sonic-platform-marvell b/platform/marvell-prestera/sonic-platform-marvell
similarity index 100%
rename from platform/marvell/sonic-platform-marvell
rename to platform/marvell-prestera/sonic-platform-marvell
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/modules/Makefile b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/modules/Makefile
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/7215-a1/modules/Makefile
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/modules/Makefile
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/modules/cn9130_cpu_thermal_sensor.c b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/modules/cn9130_cpu_thermal_sensor.c
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/7215-a1/modules/cn9130_cpu_thermal_sensor.c
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/modules/cn9130_cpu_thermal_sensor.c
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/modules/nokia_7215_ixs_a1_cpld.c b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/modules/nokia_7215_ixs_a1_cpld.c
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/7215-a1/modules/nokia_7215_ixs_a1_cpld.c
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/modules/nokia_7215_ixs_a1_cpld.c
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/scripts/cpu_wdt.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/scripts/cpu_wdt.py
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/7215-a1/scripts/cpu_wdt.py
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/scripts/cpu_wdt.py
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
similarity index 91%
rename from platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
index 68613cb8676..52eaf7f877e 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
+++ b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
@@ -2,11 +2,17 @@
 
 # Platform init script
 
+# Check if init is already done previously
+lsmod |grep nokia_7215_ixs_a1_cpld > /dev/null
+if [ "$?" = "0" ]; then
+    exit 0
+fi
+
 # Load required kernel-mode drivers
 load_kernel_drivers() {
     echo "Loading Kernel Drivers"
-    sudo insmod /lib/modules/6.1.0-22-2-arm64/kernel/extra/nokia_7215_ixs_a1_cpld.ko
-    sudo insmod /lib/modules/6.1.0-22-2-arm64/kernel/extra/cn9130_cpu_thermal_sensor.ko
+    sudo insmod /lib/modules/6.1.0-29-2-arm64/kernel/extra/nokia_7215_ixs_a1_cpld.ko
+    sudo insmod /lib/modules/6.1.0-29-2-arm64/kernel/extra/cn9130_cpu_thermal_sensor.ko
 }
 
 fw_uboot_env_cfg()
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/service/cpu_wdt.service b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/service/cpu_wdt.service
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/7215-a1/service/cpu_wdt.service
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/service/cpu_wdt.service
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/service/nokia-7215init.service b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/service/nokia-7215init.service
similarity index 93%
rename from platform/marvell/sonic-platform-nokia/7215-a1/service/nokia-7215init.service
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/service/nokia-7215init.service
index 61e0545e73b..b7e83ac4c26 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/service/nokia-7215init.service
+++ b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/service/nokia-7215init.service
@@ -4,6 +4,7 @@ After=sysinit.target
 Before=pmon.service
 
 [Service]
+Type=oneshot
 ExecStart=/usr/local/bin/nokia-7215-init.sh
 StandardOutput=tty
 
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/setup.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/setup.py
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/7215-a1/setup.py
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/setup.py
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/__init__.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/__init__.py
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/__init__.py
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/__init__.py
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py
diff --git a/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/component.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/component.py
new file mode 100644
index 00000000000..aa681dbd036
--- /dev/null
+++ b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/component.py
@@ -0,0 +1,219 @@
+########################################################################
+# NOKIA IXS7215
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in
+# the platform
+#
+########################################################################
+
+try:
+    import sys
+    import os
+    import time
+    import subprocess
+    import ntpath
+    from sonic_platform_base.component_base import ComponentBase
+    from sonic_py_common.general import getstatusoutput_noshell, getstatusoutput_noshell_pipe
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+if sys.version_info[0] < 3:
+    import commands as cmd
+else:
+    import subprocess as cmd
+
+
+CPLD_DIR = "/sys/bus/i2c/devices/0-0041/"
+
+class Component(ComponentBase):
+    """Nokia platform-specific Component class"""
+
+    CHASSIS_COMPONENTS = [
+        ["System-CPLD", "Used for managing SFPs, LEDs, PSUs and FANs "],
+        ["U-Boot", "Performs initialization during booting"],
+    ]
+    CPLD_UPDATE_COMMAND = ['./cpldupd_A1', '']
+
+    def __init__(self, component_index):
+        self.index = component_index
+        self.name = self.CHASSIS_COMPONENTS[self.index][0]
+        self.description = self.CHASSIS_COMPONENTS[self.index][1]
+
+    def _get_command_result(self, cmdline):
+        try:
+            proc = subprocess.Popen(cmdline.split(), stdout=subprocess.PIPE,
+                                    stderr=subprocess.STDOUT)
+            stdout = proc.communicate()[0]
+            proc.wait()
+            result = stdout.rstrip('\n')
+        except OSError:
+            result = None
+
+        return result
+    
+    def _read_sysfs_file(self, sysfs_file):
+        # On successful read, returns the value read from given
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'r') as fd:
+                rv = fd.read()
+        except Exception as e:
+            rv = 'ERR'
+
+        rv = rv.rstrip('\r\n')
+        rv = rv.lstrip(" ")
+        return rv
+
+    def _write_sysfs_file(self, sysfs_file, value):
+        # On successful write, the value read will be written on
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'w') as fd:
+                rv = fd.write(str(value))
+        except Exception as e:
+            rv = 'ERR'
+
+        # Ensure that the write operation has succeeded
+        if (int(self._read_sysfs_file(sysfs_file)) != value ):
+            time.sleep(3)
+            if (int(self._read_sysfs_file(sysfs_file)) != value ):
+                rv = 'ERR'
+
+        return rv
+
+    def _get_cpld_version(self, cpld_number):
+
+        cpld_version = self._read_sysfs_file(CPLD_DIR+"cpldversion")
+
+        return str(int(cpld_version, 16))
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+
+        Returns:
+            A string containing the name of the component
+        """
+        return self.name
+
+    def get_model(self):
+        """
+        Retrieves the part number of the component
+        Returns:
+            string: Part number of component
+        """
+        return 'NA'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the component
+        Returns:
+            string: Serial number of component
+        """
+        return 'NA'
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the component
+        Returns:
+            bool: True if  present, False if not
+        """
+        return True
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the component
+        Returns:
+            bool: True if component is operating properly, False if not
+        """
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device.
+        Returns:
+            integer: The 1-based relative physical position in parent
+            device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether component is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+
+        Returns:
+            A string containing the description of the component
+        """
+        return self.description
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of the component
+
+        Returns:
+            A string containing the firmware version of the component
+        """
+        if self.index == 0:
+            return self._get_cpld_version(self.index)
+
+        if self.index == 1:
+            cmdstatus, uboot_version = cmd.getstatusoutput('fw_printenv current_uboot_version |cut -d= -f 2')
+            return uboot_version or "V1.1"
+
+    def install_firmware(self, image_path):
+        """
+        Installs firmware to the component
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A boolean, True if install was successful, False if not
+        """
+        image_name = ntpath.basename(image_path)
+        print(" ixs-7215-A1 - install cpld {}".format(image_name))
+
+        # check whether the image file exists
+        if not os.path.isfile(image_path):
+            print("ERROR: the cpld image {} doesn't exist ".format(image_path))
+            return False
+
+        # check whether the cpld exe exists
+        if not os.path.isfile('/tmp/cpldupd_A1'):
+            print("ERROR: the cpld exe {} doesn't exist ".format('/tmp/cpldupd_A1'))
+            return False
+
+        self.CPLD_UPDATE_COMMAND[1] = image_name
+
+        success_flag = False
+ 
+        try:   
+            subprocess.check_call(self.CPLD_UPDATE_COMMAND, stderr=subprocess.STDOUT)
+
+            success_flag = True
+        except subprocess.CalledProcessError as e:
+            print("ERROR: Failed to upgrade CPLD: rc={}".format(e.returncode))
+
+        if success_flag:
+            print("INFO: Refresh or power cycle is required to finish CPLD installation")
+
+        return success_flag
+
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/eeprom.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/eeprom.py
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/eeprom.py
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/eeprom.py
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/fan.py
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/fan.py
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan_drawer.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/fan_drawer.py
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan_drawer.py
rename to platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/fan_drawer.py
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/platform.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/platform.py
similarity index 100%
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/psu.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/psu.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/sfp.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/sfp.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/sfp_event.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/sfp_event.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/README b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/test/README
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-chassis.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/test/test-chassis.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-component.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/test/test-component.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-eeprom.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/test/test-eeprom.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-fan.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/test/test-fan.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-psu.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/test/test-psu.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-sfp.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/test/test-sfp.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-thermal.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/test/test-thermal.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/thermal.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_actions.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/thermal_actions.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_conditions.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/thermal_conditions.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_infos.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/thermal_infos.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_manager.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/thermal_manager.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/watchdog.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/sonic_platform/watchdog.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/utils/sonic_ssd.py b/platform/marvell-prestera/sonic-platform-nokia/7215-a1/utils/sonic_ssd.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215/scripts/nokia-7215_plt_setup.sh b/platform/marvell-prestera/sonic-platform-nokia/7215/scripts/nokia-7215_plt_setup.sh
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/README b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/test/README
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-component.py b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/test/test-component.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-eeprom.py b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/test/test-eeprom.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-fan.py b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/test/test-fan.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-psu.py b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/test/test-psu.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-thermal.py b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/test/test-thermal.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-watchdog.py b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/test/test-watchdog.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal.py b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/thermal.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal_conditions.py b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/thermal_conditions.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal_manager.py b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/thermal_manager.py
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diff --git a/platform/marvell/sonic-platform-nokia/7215/sonic_platform/watchdog.py b/platform/marvell-prestera/sonic-platform-nokia/7215/sonic_platform/watchdog.py
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rename from platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.install
rename to platform/marvell-prestera/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.install
diff --git a/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.postinst b/platform/marvell-prestera/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.postinst
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.postinst
rename to platform/marvell-prestera/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.postinst
diff --git a/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install b/platform/marvell-prestera/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
rename to platform/marvell-prestera/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
diff --git a/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst b/platform/marvell-prestera/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
similarity index 100%
rename from platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
rename to platform/marvell-prestera/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
diff --git a/platform/marvell/sonic_fit.its b/platform/marvell-prestera/sonic_fit.its
similarity index 88%
rename from platform/marvell/sonic_fit.its
rename to platform/marvell-prestera/sonic_fit.its
index f3ff5ac7cec..7931faf9eaa 100644
--- a/platform/marvell/sonic_fit.its
+++ b/platform/marvell-prestera/sonic_fit.its
@@ -7,7 +7,7 @@
     images {
         kernel_ac5x {
             description = "Linux Kernel for AC5x";
-            data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64");
+            data = /incbin/("/boot/vmlinuz-6.1.0-29-2-arm64");
             type = "kernel";
             arch = "arm64";
             os = "linux";
@@ -20,7 +20,7 @@
         };
         fdt_ac5x {
             description = "Flattened Device Tree blob for AC5x";
-            data = /incbin/("/usr/lib/linux-image-6.1.0-22-2-arm64/marvell/ac5-98dx35xx-rd.dtb");
+            data = /incbin/("/usr/lib/linux-image-6.1.0-29-2-arm64/marvell/ac5-98dx35xx-rd.dtb");
             type = "flat_dt";
             arch = "arm64";
             compression = "none";
@@ -31,7 +31,7 @@
         };
         fdt_7215_a1 {
             description = "Flattened Device Tree blob for 7215_IXS_A1";
-            data = /incbin/("/usr/lib/linux-image-6.1.0-22-2-arm64/marvell/7215-ixs-a1.dtb");
+            data = /incbin/("/usr/lib/linux-image-6.1.0-29-2-arm64/marvell/7215-ixs-a1.dtb");
             type = "flat_dt";
             arch = "arm64";
             compression = "none";
@@ -42,7 +42,7 @@
         };
         ramdisk_ac5x {
             description = "ramdisk for AC5x";
-            data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64");
+            data = /incbin/("/boot/initrd.img-6.1.0-29-2-arm64");
             type = "ramdisk";
             arch = "arm64";
             os = "linux";
@@ -55,7 +55,7 @@
         };
         kernel_1 {
             description = "Linux Kernel";
-            data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64");
+            data = /incbin/("/boot/vmlinuz-6.1.0-29-2-arm64");
             type = "kernel";
             arch = "arm64";
             os = "linux";
@@ -68,7 +68,7 @@
         };
         ramdisk_1 {
             description = "ramdisk";
-            data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64");
+            data = /incbin/("/boot/initrd.img-6.1.0-29-2-arm64");
             type = "ramdisk";
             arch = "arm64";
             os = "linux";
@@ -81,7 +81,7 @@
         };
         kernel_2 {
             description = "Linux Kernel";
-            data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64");
+            data = /incbin/("/boot/vmlinuz-6.1.0-29-2-arm64");
             type = "kernel";
             arch = "arm64";
             os = "linux";
@@ -94,7 +94,7 @@
         };
         ramdisk_2 {
             description = "ramdisk";
-            data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64");
+            data = /incbin/("/boot/initrd.img-6.1.0-29-2-arm64");
             type = "ramdisk";
             arch = "arm64";
             os = "linux";
diff --git a/platform/marvell-teralynx/mrvl-teralynx b/platform/marvell-teralynx/mrvl-teralynx
new file mode 160000
index 00000000000..3c265da0428
--- /dev/null
+++ b/platform/marvell-teralynx/mrvl-teralynx
@@ -0,0 +1 @@
+Subproject commit 3c265da04286347f687d88df17bc6373204a6c77
diff --git a/platform/marvell-teralynx/mrvl-teralynx.dep b/platform/marvell-teralynx/mrvl-teralynx.dep
new file mode 100644
index 00000000000..7e19ecc6331
--- /dev/null
+++ b/platform/marvell-teralynx/mrvl-teralynx.dep
@@ -0,0 +1,9 @@
+MPATH       := $($(MRVL_TERALYNX_DEB)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/mrvl-teralynx.mk $(PLATFORM_PATH)/mrvl-teralynx.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+SMDEP_FILES := $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files))
+
+$(MRVL_TERALYNX_DEB)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MRVL_TERALYNX_DEB)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(MRVL_TERALYNX_DEB)_DEP_FILES   := $(DEP_FILES)
+$(MRVL_TERALYNX_DEB)_SMDEP_FILES := $(SMDEP_FILES)
diff --git a/platform/marvell-teralynx/mrvl-teralynx.mk b/platform/marvell-teralynx/mrvl-teralynx.mk
new file mode 100644
index 00000000000..a1deae97415
--- /dev/null
+++ b/platform/marvell-teralynx/mrvl-teralynx.mk
@@ -0,0 +1,9 @@
+# Marvell Teralynx platform package
+export MRVL_TERALYNX_VER = 1.0
+export MRVL_TERALYNX = mrvlteralynx_$(MRVL_TERALYNX_VER)_$(PLATFORM_ARCH)
+export MRVL_TERALYNX_DEB = $(MRVL_TERALYNX).deb
+
+$(MRVL_TERALYNX_DEB)_SRC_PATH = $(PLATFORM_PATH)/mrvl-teralynx
+$(MRVL_TERALYNX_DEB)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+SONIC_DPKG_DEBS += $(MRVL_TERALYNX_DEB)
diff --git a/platform/marvell-teralynx/one-image.mk b/platform/marvell-teralynx/one-image.mk
index f62c9aecec3..5ff70a85f67 100755
--- a/platform/marvell-teralynx/one-image.mk
+++ b/platform/marvell-teralynx/one-image.mk
@@ -11,5 +11,6 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(SMCI_SSE_T7132S_PLATFORM_MODULE)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(WISTRON_PLATFORM_MODULE)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(TL10_DBMVTX9180_PLATFORM)
 $(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_TERALYNX_DRV)
+$(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_TERALYNX_DEB)
 $(SONIC_ONE_IMAGE)_DOCKERS  += $(SONIC_INSTALL_DOCKER_IMAGES)
 SONIC_INSTALLERS += $(SONIC_ONE_IMAGE)
diff --git a/platform/marvell-teralynx/rules.mk b/platform/marvell-teralynx/rules.mk
index 3ba96af2f66..5fab4684d11 100755
--- a/platform/marvell-teralynx/rules.mk
+++ b/platform/marvell-teralynx/rules.mk
@@ -9,6 +9,7 @@ include $(PLATFORM_PATH)/one-image.mk
 include $(PLATFORM_PATH)/docker-saiserver-mrvl-teralynx.mk
 include $(PLATFORM_PATH)/libsaithrift-dev.mk
 include $(PLATFORM_PATH)/python-saithrift.mk
+include $(PLATFORM_PATH)/mrvl-teralynx.mk
 
 SONIC_ALL += $(SONIC_MRVL_TERALYNX_ONE_IMAGE) \
              $(DOCKER_FPM) \
diff --git a/platform/marvell/docker-saiserver-mrvl.dep b/platform/marvell/docker-saiserver-mrvl.dep
deleted file mode 100644
index 3ded7bc916e..00000000000
--- a/platform/marvell/docker-saiserver-mrvl.dep
+++ /dev/null
@@ -1,8 +0,0 @@
-DPATH       := $($(DOCKER_SAISERVER_MRVL)_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-saiserver-mrvl.mk $(PLATFORM_PATH)/docker-saiserver-mrvl.dep
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(DPATH))
-
-$(DOCKER_SAISERVER_MRVL)_CACHE_MODE  := GIT_CONTENT_SHA
-$(DOCKER_SAISERVER_MRVL)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(DOCKER_SAISERVER_MRVL)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell/docker-saiserver-mrvl.mk b/platform/marvell/docker-saiserver-mrvl.mk
deleted file mode 100644
index c6bd3e2ca1e..00000000000
--- a/platform/marvell/docker-saiserver-mrvl.mk
+++ /dev/null
@@ -1,15 +0,0 @@
-# docker image for mrvl saiserver
-
-DOCKER_SAISERVER_MRVL = docker-saiserver$(SAITHRIFT_VER)-mrvl.gz
-$(DOCKER_SAISERVER_MRVL)_PATH = $(PLATFORM_PATH)/docker-saiserver-mrvl
-$(DOCKER_SAISERVER_MRVL)_DEPENDS += $(SAISERVER)
-$(DOCKER_SAISERVER_MRVL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
-SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MRVL)
-SONIC_BOOKWORM_DOCKERS += $(DOCKER_SAISERVER_MRVL)
-
-$(DOCKER_SAISERVER_MRVL)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER)
-$(DOCKER_SAISERVER_MRVL)_RUN_OPT += --privileged -t
-$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
-$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd
-$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
-$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/marvell/docker-saiserver-mrvl/Dockerfile.j2 b/platform/marvell/docker-saiserver-mrvl/Dockerfile.j2
deleted file mode 100644
index 1760fb872b9..00000000000
--- a/platform/marvell/docker-saiserver-mrvl/Dockerfile.j2
+++ /dev/null
@@ -1,35 +0,0 @@
-{% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
-FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
-
-ARG docker_container_name
-
-## Make apt-get non-interactive
-ENV DEBIAN_FRONTEND=noninteractive
-
-RUN apt-get update              \
- && apt-get -y install          \
-      libboost-atomic1.74.0     \
-      libqt5core5a              \
-      libqt5network5            \
-      gdb                       \
-      libthrift-0.17.0
-
-COPY \
-{% for deb in docker_saiserver_mrvl_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
-
-RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
-{% for deb in docker_saiserver_mrvl_debs.split(' ') -%}
-dpkg_apt debs/{{ deb }}{{'; '}}
-{%- endfor %}
-
-COPY ["start.sh", "/usr/bin/"]
-COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
-
-## Clean up
-RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
-RUN rm -rf /debs
-
-ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell/docker-syncd-mrvl-rpc.dep b/platform/marvell/docker-syncd-mrvl-rpc.dep
deleted file mode 100644
index 3ab0dec8eb5..00000000000
--- a/platform/marvell/docker-syncd-mrvl-rpc.dep
+++ /dev/null
@@ -1,8 +0,0 @@
-DPATH       := $($(DOCKER_SYNCD_MRVL_RPC)_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.mk $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.dep
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(DPATH))
-
-$(DOCKER_SYNCD_MRVL_RPC)_CACHE_MODE  := GIT_CONTENT_SHA
-$(DOCKER_SYNCD_MRVL_RPC)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(DOCKER_SYNCD_MRVL_RPC)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell/docker-syncd-mrvl-rpc.mk b/platform/marvell/docker-syncd-mrvl-rpc.mk
deleted file mode 100644
index bf4bb103635..00000000000
--- a/platform/marvell/docker-syncd-mrvl-rpc.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-# docker image for mrvl syncd with rpc
-
-DOCKER_SYNCD_MRVL_RPC = docker-syncd-mrvl-rpc.gz
-$(DOCKER_SYNCD_MRVL_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mrvl-rpc
-$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC)
-$(DOCKER_SYNCD_MRVL_RPC)_PYTHON_WHEELS += $(PTF_PY3)
-$(DOCKER_SYNCD_MRVL_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
-ifeq ($(INSTALL_DEBUG_TOOLS), y)
-$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
-                                    $(LIBSWSSCOMMON_DBG) \
-                                    $(LIBSAIMETADATA_DBG) \
-                                    $(LIBSAIREDIS_DBG)
-endif
-$(DOCKER_SYNCD_MRVL_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE)
-SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC)
-ifeq ($(ENABLE_SYNCD_RPC),y)
-SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC)
-endif
-
-$(DOCKER_SYNCD_MRVL_RPC)_CONTAINER_NAME = syncd
-$(DOCKER_SYNCD_MRVL_RPC)_VERSION = 1.0.0+rpc
-$(DOCKER_SYNCD_MRVL_RPC)_PACKAGE_NAME = syncd
-$(DOCKER_SYNCD_MRVL_RPC)_MACHINE = marvell
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += --privileged -t
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot
-
-SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_MRVL_RPC)
diff --git a/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2 b/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2
deleted file mode 100644
index 02d962d19ce..00000000000
--- a/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2
+++ /dev/null
@@ -1,59 +0,0 @@
-FROM docker-syncd-mrvl-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
-{% from "dockers/dockerfile-macros.j2" import install_python_wheels, copy_files %}
-
-## Make apt-get non-interactive
-ENV DEBIAN_FRONTEND=noninteractive
-
-COPY \
-{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
-
-RUN apt-get purge -y syncd
-
-## Pre-install the fundamental packages
-RUN apt-get update \
- && apt-get -y install  \
-    net-tools           \
-    python3-pip		\
-    python3-setuptools	\
-    build-essential     \
-    libssl-dev          \
-    libffi-dev          \
-    python3-dev          \
-    wget                \
-    libqt5core5a        \
-    libqt5network5      \
-    libboost-atomic1.74.0 \
-    libthrift-0.17.0      \
-    libnanomsg5           \
-    libnanomsg-dev
-
-RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
-{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%}
-dpkg_apt debs/{{ deb }}{{'; '}}
-{%- endfor %}
-
-RUN pip3 install cffi    \
- && pip3 install nnpy    \
- && mkdir -p /opt       \
- && cd /opt             \
- && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py
-
-COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
-
-{% if docker_syncd_mrvl_rpc_whls.strip() -%}
-# Copy locally-built Python wheel dependencies
-{{ copy_files("python-wheels/", docker_syncd_mrvl_rpc_whls.split(' '), "/python-wheels/") }}
-
-# Install locally-built Python wheel dependencies
-{{ install_python_wheels(docker_syncd_mrvl_rpc_whls.split(' ')) }}
-{% endif %}
-
-## Clean up
-RUN apt-get purge -y libyaml-dev python3-dev libffi-dev libssl-dev wget build-essential
-RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
-RUN rm -rf /root/deps
-
-ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell/docker-syncd-mrvl.dep b/platform/marvell/docker-syncd-mrvl.dep
deleted file mode 100644
index d3f213a2da8..00000000000
--- a/platform/marvell/docker-syncd-mrvl.dep
+++ /dev/null
@@ -1,10 +0,0 @@
-DPATH       := $($(DOCKER_SYNCD_BASE)_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-syncd-mrvl.mk $(PLATFORM_PATH)/docker-syncd-mrvl.dep $(PLATFORM_PATH)/sai.mk
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(DPATH))
-
-$(DOCKER_SYNCD_BASE)_CACHE_MODE  := GIT_CONTENT_SHA
-$(DOCKER_SYNCD_BASE)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(DOCKER_SYNCD_BASE)_DEP_FILES   := $(DEP_FILES)
-
-$(eval $(call add_dbg_docker,$(DOCKER_SYNCD_BASE),$(DOCKER_SYNCD_BASE_DBG)))
diff --git a/platform/marvell/docker-syncd-mrvl.mk b/platform/marvell/docker-syncd-mrvl.mk
deleted file mode 100644
index d4c990cfe42..00000000000
--- a/platform/marvell/docker-syncd-mrvl.mk
+++ /dev/null
@@ -1,18 +0,0 @@
-# docker image for mrvl syncd
-
-DOCKER_SYNCD_PLATFORM_CODE = mrvl
-include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
-
-$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD)
-$(DOCKER_SYNCD_BASE)_DEPENDS += $(MRVL_SAI)
-
-$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
-                                $(LIBSWSSCOMMON_DBG) \
-                                $(LIBSAIMETADATA_DBG) \
-                                $(LIBSAIREDIS_DBG)
-
-$(DOCKER_SYNCD_BASE)_VERSION = 1.0.0
-$(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd
-$(DOCKER_SYNCD_BASE)_MACHINE = marvell
-
-$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/marvell/docker-syncd-mrvl/Dockerfile.j2 b/platform/marvell/docker-syncd-mrvl/Dockerfile.j2
deleted file mode 100755
index a721a86428f..00000000000
--- a/platform/marvell/docker-syncd-mrvl/Dockerfile.j2
+++ /dev/null
@@ -1,37 +0,0 @@
-{% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
-FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
-
-ARG docker_container_name
-
-## Make apt-get non-interactive
-ENV DEBIAN_FRONTEND=noninteractive
-
-RUN apt-get update
-
-COPY \
-{% for deb in docker_syncd_mrvl_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
-
-RUN apt-get update \
- && apt-get -y install  \
-    net-tools           \
-    iputils-ping
-
-RUN apt-get -y install libpcap-dev libxml2-dev python3-dev swig
-
-RUN dpkg -i \
-{% for deb in docker_syncd_mrvl_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor %}
-
-COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
-COPY ["files/supervisor-proc-exit-listener", "/usr/bin/"]
-COPY ["critical_processes", "/etc/supervisor/"]
-
-## Clean up
-RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
-RUN rm -rf /debs
-
-ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell/rules.dep b/platform/marvell/rules.dep
deleted file mode 100644
index a5bdbf59d16..00000000000
--- a/platform/marvell/rules.dep
+++ /dev/null
@@ -1,11 +0,0 @@
-include $(PLATFORM_PATH)/docker-saiserver-mrvl.dep
-include $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.dep
-include $(PLATFORM_PATH)/docker-syncd-mrvl.dep
-include $(PLATFORM_PATH)/libsaithrift-dev.dep
-include $(PLATFORM_PATH)/one-image.dep
-include $(PLATFORM_PATH)/platform-marvell.dep
-ifeq ($(CONFIGURED_ARCH),$(filter $(CONFIGURED_ARCH),arm64 armhf))
-include $(PLATFORM_PATH)/mrvl-prestera.dep
-include $(PLATFORM_PATH)/platform-nokia.dep
-endif
-include $(PLATFORM_PATH)/sai.dep
diff --git a/platform/marvell/rules.mk b/platform/marvell/rules.mk
deleted file mode 100644
index 825d8d331a1..00000000000
--- a/platform/marvell/rules.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-include $(PLATFORM_PATH)/sai.mk
-include $(PLATFORM_PATH)/docker-syncd-mrvl.mk
-include $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.mk
-include $(PLATFORM_PATH)/docker-saiserver-mrvl.mk
-include $(PLATFORM_PATH)/libsaithrift-dev.mk
-include $(PLATFORM_PATH)/one-image.mk
-include $(PLATFORM_PATH)/platform-marvell.mk
-ifeq ($(CONFIGURED_ARCH),$(filter $(CONFIGURED_ARCH),arm64 armhf))
-include $(PLATFORM_PATH)/mrvl-prestera.mk
-include $(PLATFORM_PATH)/platform-nokia.mk
-endif
-
-SONIC_ALL += $(SONIC_ONE_IMAGE) \
-             $(DOCKER_FPM) 	\
-             $(DOCKER_SYNCD_MRVL_RPC)
-
-# Inject mrvl sai into syncd
-$(SYNCD)_DEPENDS += $(MRVL_SAI)
-$(SYNCD)_UNINSTALLS += $(MRVL_SAI)
-
-ifeq ($(ENABLE_SYNCD_RPC),y)
-$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS))
-$(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
-endif
-
-# Runtime dependency on mrvl sai is set only for syncd
-$(SYNCD)_RDEPENDS += $(MRVL_SAI)
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/component.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/component.py
deleted file mode 100644
index f4d01291193..00000000000
--- a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/component.py
+++ /dev/null
@@ -1,219 +0,0 @@
-########################################################################
-# NOKIA IXS7215
-#
-# Module contains an implementation of SONiC Platform Base API and
-# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in
-# the platform
-#
-########################################################################
-
-try:
-    import sys
-    import os
-    import time
-    import subprocess
-    import ntpath
-    from sonic_platform_base.component_base import ComponentBase
-    from sonic_py_common.general import getstatusoutput_noshell, getstatusoutput_noshell_pipe
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-
-if sys.version_info[0] < 3:
-    import commands as cmd
-else:
-    import subprocess as cmd
-
-
-CPLD_DIR = "/sys/bus/i2c/devices/0-0041/"
-
-class Component(ComponentBase):
-    """Nokia platform-specific Component class"""
-
-    CHASSIS_COMPONENTS = [
-        ["System-CPLD", "Used for managing SFPs, LEDs, PSUs and FANs "],
-        ["U-Boot", "Performs initialization during booting"],
-    ]
-    CPLD_UPDATE_COMMAND = ['./cpldupd_A1', '']
-
-    def __init__(self, component_index):
-        self.index = component_index
-        self.name = self.CHASSIS_COMPONENTS[self.index][0]
-        self.description = self.CHASSIS_COMPONENTS[self.index][1]
-
-    def _get_command_result(self, cmdline):
-        try:
-            proc = subprocess.Popen(cmdline.split(), stdout=subprocess.PIPE,
-                                    stderr=subprocess.STDOUT)
-            stdout = proc.communicate()[0]
-            proc.wait()
-            result = stdout.rstrip('\n')
-        except OSError:
-            result = None
-
-        return result
-    
-    def _read_sysfs_file(self, sysfs_file):
-        # On successful read, returns the value read from given
-        # reg_name and on failure returns 'ERR'
-        rv = 'ERR'
-
-        if (not os.path.isfile(sysfs_file)):
-            return rv
-        try:
-            with open(sysfs_file, 'r') as fd:
-                rv = fd.read()
-        except Exception as e:
-            rv = 'ERR'
-
-        rv = rv.rstrip('\r\n')
-        rv = rv.lstrip(" ")
-        return rv
-
-    def _write_sysfs_file(self, sysfs_file, value):
-        # On successful write, the value read will be written on
-        # reg_name and on failure returns 'ERR'
-        rv = 'ERR'
-
-        if (not os.path.isfile(sysfs_file)):
-            return rv
-        try:
-            with open(sysfs_file, 'w') as fd:
-                rv = fd.write(str(value))
-        except Exception as e:
-            rv = 'ERR'
-
-        # Ensure that the write operation has succeeded
-        if (int(self._read_sysfs_file(sysfs_file)) != value ):
-            time.sleep(3)
-            if (int(self._read_sysfs_file(sysfs_file)) != value ):
-                rv = 'ERR'
-
-        return rv
-
-    def _get_cpld_version(self, cpld_number):
-
-        cpld_version = self._read_sysfs_file(CPLD_DIR+"cpldversion")
-
-        return str(int(cpld_version, 16))
-
-    def get_name(self):
-        """
-        Retrieves the name of the component
-
-        Returns:
-            A string containing the name of the component
-        """
-        return self.name
-
-    def get_model(self):
-        """
-        Retrieves the part number of the component
-        Returns:
-            string: Part number of component
-        """
-        return 'NA'
-
-    def get_serial(self):
-        """
-        Retrieves the serial number of the component
-        Returns:
-            string: Serial number of component
-        """
-        return 'NA'
-
-    def get_presence(self):
-        """
-        Retrieves the presence of the component
-        Returns:
-            bool: True if  present, False if not
-        """
-        return True
-
-    def get_status(self):
-        """
-        Retrieves the operational status of the component
-        Returns:
-            bool: True if component is operating properly, False if not
-        """
-        return True
-
-    def get_position_in_parent(self):
-        """
-        Retrieves 1-based relative physical position in parent device.
-        Returns:
-            integer: The 1-based relative physical position in parent
-            device or -1 if cannot determine the position
-        """
-        return -1
-
-    def is_replaceable(self):
-        """
-        Indicate whether component is replaceable.
-        Returns:
-            bool: True if it is replaceable.
-        """
-        return False
-
-    def get_description(self):
-        """
-        Retrieves the description of the component
-
-        Returns:
-            A string containing the description of the component
-        """
-        return self.description
-
-    def get_firmware_version(self):
-        """
-        Retrieves the firmware version of the component
-
-        Returns:
-            A string containing the firmware version of the component
-        """
-        if self.index == 0:
-            return self._get_cpld_version(self.index)
-
-        if self.index == 1:
-            cmdstatus, uboot_version = cmd.getstatusoutput('grep --null-data ^U-Boot /dev/mtd0ro | cut -d" " -f4')
-            return uboot_version
-
-    def install_firmware(self, image_path):
-        """
-        Installs firmware to the component
-
-        Args:
-            image_path: A string, path to firmware image
-
-        Returns:
-            A boolean, True if install was successful, False if not
-        """
-        image_name = ntpath.basename(image_path)
-        print(" ixs-7215-A1 - install cpld {}".format(image_name))
-
-        # check whether the image file exists
-        if not os.path.isfile(image_path):
-            print("ERROR: the cpld image {} doesn't exist ".format(image_path))
-            return False
-
-        # check whether the cpld exe exists
-        if not os.path.isfile('/tmp/cpldupd_A1'):
-            print("ERROR: the cpld exe {} doesn't exist ".format('/tmp/cpldupd_A1'))
-            return False
-
-        self.CPLD_UPDATE_COMMAND[1] = image_name
-
-        success_flag = False
- 
-        try:   
-            subprocess.check_call(self.CPLD_UPDATE_COMMAND, stderr=subprocess.STDOUT)
-
-            success_flag = True
-        except subprocess.CalledProcessError as e:
-            print("ERROR: Failed to upgrade CPLD: rc={}".format(e.returncode))
-
-        if success_flag:
-            print("INFO: Refresh or power cycle is required to finish CPLD installation")
-
-        return success_flag
-
diff --git a/platform/mellanox/asic_detect/asic_detect.sh b/platform/mellanox/asic_detect/asic_detect.sh
new file mode 100644
index 00000000000..9f2748664b3
--- /dev/null
+++ b/platform/mellanox/asic_detect/asic_detect.sh
@@ -0,0 +1,57 @@
+#!/usr/bin/env bash
+#
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+SUCCESS_CODE=0
+RC=-1
+
+if [[ -f "/usr/bin/asic_detect/asic_type" ]]; then
+    cat /usr/bin/asic_detect/asic_type
+    exit $SUCCESS_CODE
+fi
+
+# make sure that DEVICE_DICT keys are the same as values in DEVICE_ORDER
+declare -A DEVICE_DICT=(
+    ["cb84"]="spc1"
+    ["cf6c"]="spc2"
+    ["cf70"]="spc3"
+    ["cf80"]="spc4"
+    ["cf82"]="spc5"
+    ["a2dc"]="bf3"
+)
+TYPE_UNKNOWN="unknown"
+VENDOR_ID="15b3"
+DEVICE_TYPE=$TYPE_UNKNOWN
+
+# bf3 should be the last device in the list
+DEVICE_ORDER=("cb84" "cf6c" "cf70" "cf80" "cf82" "a2dc")
+
+lspci_output=$(lspci -n 2>/dev/null)
+if [[ -n "$lspci_output" ]]; then
+    for key in "${DEVICE_ORDER[@]}"; do
+        if echo "$lspci_output" | grep "$VENDOR_ID:$key" &>/dev/null; then
+            DEVICE_TYPE="${DEVICE_DICT[$key]}"
+            RC=$SUCCESS_CODE
+            break
+        fi
+    done
+    if [[ -n "$DEVICE_TYPE" ]]; then
+        echo "$DEVICE_TYPE" | tee >( [[ "$DEVICE_TYPE" != "$TYPE_UNKNOWN" ]] && cat > /usr/bin/asic_detect/asic_type )
+    fi
+    exit $RC
+fi
diff --git a/platform/mellanox/docker-syncd-mlnx-rpc.dep b/platform/mellanox/docker-syncd-mlnx-rpc.dep
index c79c94d2c03..01301b3c6ee 100644
--- a/platform/mellanox/docker-syncd-mlnx-rpc.dep
+++ b/platform/mellanox/docker-syncd-mlnx-rpc.dep
@@ -6,5 +6,5 @@ DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
 DEP_FILES += $(shell git ls-files -- $(DPATH))
 
 $(DOCKER_SYNCD_MLNX_RPC)_CACHE_MODE := GIT_CONTENT_SHA
-$(DOCKER_SYNCD_MLNX_RPC)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SYNCD_MLNX_RPC)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(MLNX_SDK_VERSION) $(MLNX_SAI_VERSION)
 $(DOCKER_SYNCD_MLNX_RPC)_DEP_FILES := $(DEP_FILES)
diff --git a/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2
index a7387948776..0c98ede1273 100644
--- a/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2
+++ b/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2
@@ -1,5 +1,6 @@
 ##
-## Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES.
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2016-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
@@ -44,7 +45,8 @@ RUN apt-get update        \
     libnanomsg-dev        \
     libthrift-0.17.0      \
     thrift-compiler       \
-    python3-thrift
+    python3-thrift        \
+    pciutils
 
 RUN pip3 install --upgrade pip
 
diff --git a/platform/mellanox/docker-syncd-mlnx.dep b/platform/mellanox/docker-syncd-mlnx.dep
index 8f2ab723dd5..20b1ca143cd 100644
--- a/platform/mellanox/docker-syncd-mlnx.dep
+++ b/platform/mellanox/docker-syncd-mlnx.dep
@@ -6,7 +6,7 @@ DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
 DEP_FILES += $(shell git ls-files -- $(DPATH))
 
 $(DOCKER_SYNCD_BASE)_CACHE_MODE := GIT_CONTENT_SHA
-$(DOCKER_SYNCD_BASE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(ENABLE_ASAN)
+$(DOCKER_SYNCD_BASE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(ENABLE_ASAN) $(MLNX_SDK_VERSION) $(MLNX_SAI_VERSION)
 $(DOCKER_SYNCD_BASE)_DEP_FILES := $(DEP_FILES)
 
 $(eval $(call add_dbg_docker,$(DOCKER_SYNCD_BASE),$(DOCKER_SYNCD_BASE_DBG)))
diff --git a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
index 7b418ab8582..6574381271a 100755
--- a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
+++ b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
@@ -1,6 +1,6 @@
 ##
 ## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-## Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## Copyright (c) 2016-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
@@ -35,7 +35,8 @@ RUN apt-get update && \
         python3-pip \
         python3-dev \
         python3-jsonschema \
-        python-is-python3
+        python-is-python3 \
+        pciutils
 
 RUN pip3 install --upgrade pip
 RUN apt-get purge -y python-pip
@@ -71,7 +72,7 @@ COPY ["critical_processes", "/etc/supervisor/"]
 COPY ["platform_syncd_dump.sh", "/usr/bin/"]
 
 RUN mkdir -p /etc/mlnx/
-COPY ["sai-common.profile", "/etc/mlnx/"]
+COPY sai-*.profile /etc/mlnx/
 
 RUN mkdir -p /etc/supervisor/conf.d/
 RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf
diff --git a/platform/mellanox/docker-syncd-mlnx/sai-common.profile b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
index 682bd885578..9c18d5bbc34 100644
--- a/platform/mellanox/docker-syncd-mlnx/sai-common.profile
+++ b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
@@ -5,4 +5,4 @@ SAI_KEY_SDK_SNIFFER_MODE=cyclic
 SAI_KEY_SDK_SNIFFER_LOG_NUM=10
 SAI_KEY_SDK_SNIFFER_LOG_MAX_SIZE=314572800
 SAI_KEY_SDK_SNIFFER_WRITE_INTERVAL=1000
-SAI_WCMP_NORMALIZATION_MAX_TOTAL_WEIGHT=256
+SAI_WCMP_NORMALIZATION_MAX_TOTAL_WEIGHT=512
diff --git a/platform/mellanox/docker-syncd-mlnx/sai-spc1.profile b/platform/mellanox/docker-syncd-mlnx/sai-spc1.profile
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/platform/mellanox/docker-syncd-mlnx/sai-spc2.profile b/platform/mellanox/docker-syncd-mlnx/sai-spc2.profile
new file mode 100644
index 00000000000..37560da3af2
--- /dev/null
+++ b/platform/mellanox/docker-syncd-mlnx/sai-spc2.profile
@@ -0,0 +1 @@
+SAI_MIRROR_SESSION_HW_ID_RESERVATION=7
diff --git a/platform/mellanox/docker-syncd-mlnx/sai-spc3.profile b/platform/mellanox/docker-syncd-mlnx/sai-spc3.profile
new file mode 100644
index 00000000000..37560da3af2
--- /dev/null
+++ b/platform/mellanox/docker-syncd-mlnx/sai-spc3.profile
@@ -0,0 +1 @@
+SAI_MIRROR_SESSION_HW_ID_RESERVATION=7
diff --git a/platform/mellanox/docker-syncd-mlnx/sai-spc4.profile b/platform/mellanox/docker-syncd-mlnx/sai-spc4.profile
new file mode 100644
index 00000000000..37560da3af2
--- /dev/null
+++ b/platform/mellanox/docker-syncd-mlnx/sai-spc4.profile
@@ -0,0 +1 @@
+SAI_MIRROR_SESSION_HW_ID_RESERVATION=7
diff --git a/platform/mellanox/docker-syncd-mlnx/sai-spc5.profile b/platform/mellanox/docker-syncd-mlnx/sai-spc5.profile
new file mode 100644
index 00000000000..3afdf264714
--- /dev/null
+++ b/platform/mellanox/docker-syncd-mlnx/sai-spc5.profile
@@ -0,0 +1,2 @@
+SAI_MIRROR_SESSION_HW_ID_RESERVATION=7
+SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/platform/mellanox/fw.dep b/platform/mellanox/fw.dep
index f57bad8eb9b..596cd6d1fd0 100644
--- a/platform/mellanox/fw.dep
+++ b/platform/mellanox/fw.dep
@@ -18,3 +18,7 @@ $(MLNX_SPC3_FW_FILE)_DEP_FILES := $(DEP_FILES)
 $(MLNX_SPC4_FW_FILE)_CACHE_MODE := GIT_CONTENT_SHA
 $(MLNX_SPC4_FW_FILE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
 $(MLNX_SPC4_FW_FILE)_DEP_FILES := $(DEP_FILES)
+
+$(MLNX_SPC5_FW_FILE)_CACHE_MODE := GIT_CONTENT_SHA
+$(MLNX_SPC5_FW_FILE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
+$(MLNX_SPC5_FW_FILE)_DEP_FILES := $(DEP_FILES)
diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 86b91aa7319..8111760c01d 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2016-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -21,38 +21,43 @@ MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH)
 # Place an URL here to FW if you want to download FW instead
 MLNX_FW_BASE_URL =
 
-SIMX_VERSION = 25.1-1070
+SIMX_VERSION = 25.7-1093
 
 FW_FROM_URL = y
 
-MLNX_FW_ASSETS_RELEASE_TAG = fw-2014.2202
+MLNX_FW_ASSETS_RELEASE_TAG = fw-2016.1036
 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG)
 
 ifeq ($(MLNX_FW_BASE_URL), )
 MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL)
 endif
 
-MLNX_SPC_FW_VERSION = 13.2014.2202
+MLNX_SPC_FW_VERSION = 13.2016.1036
 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa
 $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE)
 
-MLNX_SPC2_FW_VERSION = 29.2014.2202
+MLNX_SPC2_FW_VERSION = 29.2016.1036
 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa
 $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE)
 
-MLNX_SPC3_FW_VERSION = 30.2014.2202
+MLNX_SPC3_FW_VERSION = 30.2016.1036
 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa
 $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE)
 
-MLNX_SPC4_FW_VERSION = 34.2014.2202
+MLNX_SPC4_FW_VERSION = 34.2016.1036
 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa
 $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE)
 
-MLNX_FW_FILES = $(MLNX_SPC_FW_FILE) $(MLNX_SPC2_FW_FILE) $(MLNX_SPC3_FW_FILE) $(MLNX_SPC4_FW_FILE)
+MLNX_SPC5_FW_VERSION = 37.2016.1036
+MLNX_SPC5_FW_FILE = fw-SPC5-rel-$(subst .,_,$(MLNX_SPC5_FW_VERSION))-EVB.mfa
+$(MLNX_SPC5_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
+$(MLNX_SPC5_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC5_FW_FILE)
+
+MLNX_FW_FILES = $(MLNX_SPC_FW_FILE) $(MLNX_SPC2_FW_FILE) $(MLNX_SPC3_FW_FILE) $(MLNX_SPC4_FW_FILE) $(MLNX_SPC5_FW_FILE)
 
 ifeq ($(FW_FROM_URL),n)
 SONIC_COPY_FILES += $(MLNX_FW_FILES)
@@ -62,9 +67,10 @@ endif
 
 MLNX_FILES += $(MLNX_FW_FILES)
 
-export MLNX_SPC_FW_VERSION MLNX_SPC2_FW_VERSION MLNX_SPC3_FW_VERSION MLNX_SPC4_FW_VERSION
+export MLNX_SPC_FW_VERSION MLNX_SPC2_FW_VERSION MLNX_SPC3_FW_VERSION MLNX_SPC4_FW_VERSION MLNX_SPC5_FW_VERSION
 export SIMX_VERSION
 export MLNX_SPC_FW_FILE
 export MLNX_SPC2_FW_FILE
 export MLNX_SPC3_FW_FILE
 export MLNX_SPC4_FW_FILE
+export MLNX_SPC5_FW_FILE
diff --git a/platform/mellanox/get_component_versions/get_component_versions.j2 b/platform/mellanox/get_component_versions/get_component_versions.j2
new file mode 100644
index 00000000000..5717ca755a1
--- /dev/null
+++ b/platform/mellanox/get_component_versions/get_component_versions.j2
@@ -0,0 +1,184 @@
+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    SPDX-License-Identifier: Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+#!/usr/bin/env python3
+
+import os
+import subprocess
+import re
+
+try:
+    from fwutil.lib import PlatformDataProvider
+except Exception:
+    PlatformDataProvider = None
+
+from sonic_py_common.general import check_output_pipe
+from sonic_platform.device_data import DeviceDataManager
+from tabulate import tabulate
+
+COMPONENT_VERSIONS_FILE = "/etc/mlnx/component-versions"
+HEADERS = ["COMPONENT", "COMPILATION", "ACTUAL"]
+
+{% if sonic_asic_platform == "mellanox" %}
+
+COMMANDS_FOR_ACTUAL = {
+    "MFT": [["dpkg", "-l"], ["grep", "mft "], "mft *([0-9.-]*)"],
+    "HW_MANAGEMENT": [["dpkg", "-l"], ["grep", "hw"], ".*1\\.mlnx\\.([0-9.]*)"],
+    "SDK": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep sdk'], ".*1\\.mlnx\\.([0-9.]*)"],
+    "SAI": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep mlnx-sai'], ".*1\\.mlnx\\.([A-Za-z0-9.]*)"],
+    "FW": [["mlxfwmanager", "--query"], "FW * [0-9]{2}\\.([0-9.]*)"],
+    "KERNEL": [["uname", "-r"], "([0-9][0-9.-]*)-.*"]
+}
+
+UNAVAILABLE_COMPILED_VERSIONS = {
+    "SDK": "N/A",
+    "FW": "N/A",
+    "SAI": "N/A",
+    "HW_MANAGEMENT": "N/A",
+    "MFT": "N/A",
+    "KERNEL": "N/A",
+    "SIMX": "N/A"
+}
+
+{% elif sonic_asic_platform == "nvidia-bluefield" %}
+
+COMMANDS_FOR_ACTUAL = {
+    "MFT": [["dpkg", "-l"], ["grep", "mft "], "mft *([0-9.-]*)"],
+    "SDK": [["docker", "exec", "syncd", "bash", "-c", 'dpkg -l | grep sdn'], "sdn-appliance *([0-9.-]*mlnx1)"],
+    "SAI": [["docker", "exec", "syncd", "bash", "-c", 'dpkg -l | grep mlnx-sai'], ".*1\\.mlnx\\.([A-Za-z0-9.]*)"],
+    "FW": [["mlxfwmanager", "--query"], "FW * [0-9]{2}\\.([0-9.]*)"],
+    "KERNEL": [["uname", "-r"], "([0-9][0-9.-]*)-.*"],
+    "BFSOC": [["dpkg", "-l"], ["grep", "mlxbf-bootimages"], "mlxbf-bootimages *([0-9.-]*)"]
+}
+
+UNAVAILABLE_COMPILED_VERSIONS = {
+    "SDK": "N/A",
+    "FW": "N/A",
+    "SAI": "N/A",
+    "MFT": "N/A",
+    "KERNEL": "N/A",
+    "BFSOC": "N/A",
+    "SIMX": "N/A"
+}
+
+{% endif %}
+
+UNAVAILABLE_PLATFORM_VERSIONS = {
+    "ONIE": "N/A",
+    "SSD": "N/A",
+    "BIOS": "N/A",
+    "CPLD": "N/A"
+}
+
+
+
+def parse_compiled_components_file():
+    compiled_versions = UNAVAILABLE_COMPILED_VERSIONS
+
+    if not os.path.exists(COMPONENT_VERSIONS_FILE):
+        return UNAVAILABLE_COMPILED_VERSIONS
+
+    with open(COMPONENT_VERSIONS_FILE, 'r') as component_versions:
+        for line in component_versions.readlines():
+            try:
+                comp, version = line.split()
+                compiled_versions[comp] = version
+            except ValueError:
+                continue 
+
+    return compiled_versions
+
+
+def get_platform_component_versions():
+    ccm = None
+    
+    if PlatformDataProvider:
+        pdp = PlatformDataProvider()
+        ccm = pdp.chassis_component_map
+
+    if not ccm:
+        return UNAVAILABLE_PLATFORM_VERSIONS
+
+    versions_map = None
+
+    # The first layer of the map only has one item
+    for key, value in ccm.items():
+        versions_map = value
+        break
+
+    if not versions_map or len(versions_map) == 0:
+        return UNAVAILABLE_PLATFORM_VERSIONS
+
+    platform_versions = {}
+    for component_name, component in versions_map.items():
+        platform_versions[component_name] = component.get_firmware_version()
+
+    return platform_versions
+
+
+def get_current_version(comp):
+    version = ""
+    try:
+        # If there's only one command
+        if len(COMMANDS_FOR_ACTUAL[comp]) == 2:
+            version = subprocess.run(COMMANDS_FOR_ACTUAL[comp][0], shell=False, stdout=subprocess.PIPE, text=True)
+            version = str(version.stdout)
+        #If there are two commands and we need a pipe
+        elif len(COMMANDS_FOR_ACTUAL[comp]) == 3:
+            version = check_output_pipe(COMMANDS_FOR_ACTUAL[comp][0], COMMANDS_FOR_ACTUAL[comp][1])
+        parsed_version = re.search(COMMANDS_FOR_ACTUAL[comp][-1], version)
+        return parsed_version.group(1) if parsed_version else "N/A"
+    except Exception:
+        return "N/A"
+
+
+def format_output_table(table):
+    return tabulate(table, HEADERS)
+
+
+def main():
+
+    if os.getuid() != 0:
+        print("Error: Root privileges are required")
+        return
+
+    compiled_versions = parse_compiled_components_file()
+    simx_compiled_ver = compiled_versions.pop("SIMX")
+
+    # Add compiled versions to table
+    output_table = []
+    for comp in compiled_versions.keys():
+        actual = get_current_version(comp)
+        output_table.append([comp, compiled_versions[comp], actual])
+
+    # Handle if SIMX
+    if hasattr(DeviceDataManager, "is_simx_platform") and DeviceDataManager.is_simx_platform():
+        simx_actual_ver = DeviceDataManager.get_simx_version()
+        output_table.append(["SIMX", simx_compiled_ver, simx_actual_ver])
+        platform_versions = UNAVAILABLE_PLATFORM_VERSIONS
+    else:
+        platform_versions = get_platform_component_versions()
+
+    # Add actual versions to table
+    for comp in platform_versions.keys():
+        output_table.append([comp, "-", platform_versions[comp]])
+
+    print(format_output_table(output_table))
+
+
+if __name__ == "__main__":
+    main()
diff --git a/platform/mellanox/get_component_versions/get_component_versions.py b/platform/mellanox/get_component_versions/get_component_versions.py
deleted file mode 100644
index ba75bd8a215..00000000000
--- a/platform/mellanox/get_component_versions/get_component_versions.py
+++ /dev/null
@@ -1,155 +0,0 @@
-#!/usr/bin/env python3
-#
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-
-import os
-import subprocess
-import re
-
-try:
-    from fwutil.lib import PlatformDataProvider
-except Exception:
-    PlatformDataProvider = None
-
-from sonic_py_common.general import check_output_pipe
-from sonic_platform.device_data import DeviceDataManager
-from tabulate import tabulate
-
-COMPONENT_VERSIONS_FILE = "/etc/mlnx/component-versions"
-HEADERS = ["COMPONENT", "COMPILATION", "ACTUAL"]
-COMMANDS_FOR_ACTUAL = {
-    "MFT": [["dpkg", "-l"], ["grep", "mft "], "mft *([0-9.-]*)"],
-    "HW_MANAGEMENT": [["dpkg", "-l"], ["grep", "hw"], ".*1\\.mlnx\\.([0-9.]*)"],
-    "SDK": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep sdk'], ".*1\\.mlnx\\.([0-9.]*)"],
-    "SAI": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep mlnx-sai'], ".*1\\.mlnx\\.([A-Za-z0-9.]*)"],
-    "FW": [["mlxfwmanager", "--query"], "FW * [0-9]{2}\\.([0-9.]*)"],
-    "KERNEL": [["uname", "-r"], "([0-9][0-9.-]*)-.*"]
-}
-
-UNAVAILABLE_PLATFORM_VERSIONS = {
-    "ONIE": "N/A",
-    "SSD": "N/A",
-    "BIOS": "N/A",
-    "CPLD": "N/A"
-}
-
-UNAVAILABLE_COMPILED_VERSIONS = {
-    "SDK": "N/A",
-    "FW": "N/A",
-    "SAI": "N/A",
-    "HW_MANAGEMENT": "N/A",
-    "MFT": "N/A",
-    "KERNEL": "N/A"
-}
-
-
-def parse_compiled_components_file():
-    compiled_versions = UNAVAILABLE_COMPILED_VERSIONS
-
-    if not os.path.exists(COMPONENT_VERSIONS_FILE):
-        return UNAVAILABLE_COMPILED_VERSIONS
-
-    with open(COMPONENT_VERSIONS_FILE, 'r') as component_versions:
-        for line in component_versions.readlines():
-            try:
-                comp, version = line.split()
-                compiled_versions[comp] = version
-            except ValueError:
-                continue 
-
-    return compiled_versions
-
-
-def get_platform_component_versions():
-    ccm = None
-    
-    if PlatformDataProvider:
-        pdp = PlatformDataProvider()
-        ccm = pdp.chassis_component_map
-
-    if not ccm:
-        return UNAVAILABLE_PLATFORM_VERSIONS
-
-    versions_map = None
-
-    # The first layer of the map only has one item
-    for key, value in ccm.items():
-        versions_map = value
-        break
-
-    if not versions_map or len(versions_map) == 0:
-        return UNAVAILABLE_PLATFORM_VERSIONS
-
-    platform_versions = {}
-    for component_name, component in versions_map.items():
-        platform_versions[component_name] = component.get_firmware_version()
-
-    return platform_versions
-
-
-def get_current_version(comp):
-    version = ""
-    try:
-        # If there's only one command
-        if len(COMMANDS_FOR_ACTUAL[comp]) == 2:
-            version = subprocess.run(COMMANDS_FOR_ACTUAL[comp][0], shell=False, stdout=subprocess.PIPE, text=True)
-            version = str(version.stdout)
-        #If there are two commands and we need a pipe
-        elif len(COMMANDS_FOR_ACTUAL[comp]) == 3:
-            version = check_output_pipe(COMMANDS_FOR_ACTUAL[comp][0], COMMANDS_FOR_ACTUAL[comp][1])
-        parsed_version = re.search(COMMANDS_FOR_ACTUAL[comp][-1], version)
-        return parsed_version.group(1) if parsed_version else "N/A"
-    except Exception:
-        return "N/A"
-
-
-def format_output_table(table):
-    return tabulate(table, HEADERS)
-
-
-def main():
-
-    if os.getuid() != 0:
-        print("Error: Root privileges are required")
-        return
-
-    compiled_versions = parse_compiled_components_file()
-    simx_compiled_ver = compiled_versions.pop("SIMX")
-
-    # Add compiled versions to table
-    output_table = []
-    for comp in compiled_versions.keys():
-        actual = get_current_version(comp)
-        output_table.append([comp, compiled_versions[comp], actual])
-
-    # Handle if SIMX
-    if DeviceDataManager.is_simx_platform():
-        simx_actual_ver = DeviceDataManager.get_simx_version()
-        output_table.append(["SIMX", simx_compiled_ver, simx_actual_ver])
-        platform_versions = UNAVAILABLE_PLATFORM_VERSIONS
-    else:
-        platform_versions = get_platform_component_versions()
-
-    # Add actual versions to table
-    for comp in platform_versions.keys():
-        output_table.append([comp, "-", platform_versions[comp]])
-
-    print(format_output_table(output_table))
-
-
-if __name__ == "__main__":
-    main()
diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk
index df1d3914e00..04674776f72 100644
--- a/platform/mellanox/hw-management.mk
+++ b/platform/mellanox/hw-management.mk
@@ -17,7 +17,7 @@
 #
 # Mellanox HW Management
 
-MLNX_HW_MANAGEMENT_VERSION = 7.0040.2104
+MLNX_HW_MANAGEMENT_VERSION = 7.0040.4028
 
 export MLNX_HW_MANAGEMENT_VERSION
 
diff --git a/platform/mellanox/hw-management/0003-Make-system-health-service-starts-after-hw-managemen.patch b/platform/mellanox/hw-management/0002-Make-system-health-service-starts-after-hw-managemen.patch
similarity index 100%
rename from platform/mellanox/hw-management/0003-Make-system-health-service-starts-after-hw-managemen.patch
rename to platform/mellanox/hw-management/0002-Make-system-health-service-starts-after-hw-managemen.patch
diff --git a/platform/mellanox/hw-management/0002-Remove-unused-non-upstream-kernel-modules-from-load.patch b/platform/mellanox/hw-management/0002-Remove-unused-non-upstream-kernel-modules-from-load.patch
deleted file mode 100644
index 5ba2fa2f0aa..00000000000
--- a/platform/mellanox/hw-management/0002-Remove-unused-non-upstream-kernel-modules-from-load.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From f239df6348e9602bdde2f0c068e3c93c6a22b434 Mon Sep 17 00:00:00 2001
-From: Alexander Allen <arallen@nvidia.com>
-Date: Thu, 17 Feb 2022 04:19:50 +0000
-Subject: [PATCH 2/3] Remove unused non-upstream kernel modules from load
-
----
- usr/etc/modules-load.d/05-hw-management-modules.conf | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/usr/etc/modules-load.d/05-hw-management-modules.conf b/usr/etc/modules-load.d/05-hw-management-modules.conf
-index ca9d1043..c0980bcd 100644
---- a/usr/etc/modules-load.d/05-hw-management-modules.conf
-+++ b/usr/etc/modules-load.d/05-hw-management-modules.conf
-@@ -15,8 +15,6 @@ xdpe12284
- mp2975
- mp2888
- i2c-mux-pca954x
--emc2305
--ti-ads1015
- powr1220
- gpio-pca953x
- pmbus
--- 
-2.30.2
-
diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt
index 7051b52c03b..fa38f8d82a6 160000
--- a/platform/mellanox/hw-management/hw-mgmt
+++ b/platform/mellanox/hw-management/hw-mgmt
@@ -1 +1 @@
-Subproject commit 7051b52c03b884876345a663b46a1b9b11f4e45c
+Subproject commit fa38f8d82a621e9ce8172ff077b70b4867aac767
diff --git a/platform/mellanox/mft.mk b/platform/mellanox/mft.mk
index 72f6e522f2f..f697cde2532 100644
--- a/platform/mellanox/mft.mk
+++ b/platform/mellanox/mft.mk
@@ -17,8 +17,8 @@
 #
 # Mellanox SAI
 
-MFT_VERSION = 4.30.2
-MFT_REVISION = 23
+MFT_VERSION = 4.32.0
+MFT_REVISION = 120
 
 MLNX_MFT_INTERNAL_SOURCE_BASE_URL =
 
diff --git a/platform/mellanox/mlnx-fw-upgrade.j2 b/platform/mellanox/mlnx-fw-upgrade.j2
index 6a771ebd3cd..851c52d1da5 100755
--- a/platform/mellanox/mlnx-fw-upgrade.j2
+++ b/platform/mellanox/mlnx-fw-upgrade.j2
@@ -50,6 +50,7 @@ declare -r SPC1_ASIC="spc1"
 declare -r SPC2_ASIC="spc2"
 declare -r SPC3_ASIC="spc3"
 declare -r SPC4_ASIC="spc4"
+declare -r SPC5_ASIC="spc5"
 declare -r BF3_NIC="bf3"
 declare -r UNKN_ASIC="unknown"
 declare -r UNKN_MST="unknown"
@@ -59,6 +60,7 @@ declare -rA FW_FILE_MAP=( \
     [$SPC2_ASIC]="fw-SPC2.mfa" \
     [$SPC3_ASIC]="fw-SPC3.mfa" \
     [$SPC4_ASIC]="fw-SPC4.mfa" \
+    [$SPC5_ASIC]="fw-SPC5.mfa" \
     [$BF3_NIC]="fw-BF3.mfa" \
 )
 
@@ -67,6 +69,7 @@ IMAGE_UPGRADE="${NO_PARAM}"
 SYSLOG_LOGGER="${NO_PARAM}"
 VERBOSE_LEVEL="${VERBOSE_MIN}"
 MFT_DIAGNOSIS_FLAGS=""
+RESET_CONFIG="${NO_PARAM}"
 
 function PrintHelp() {
     echo
@@ -78,11 +81,17 @@ function PrintHelp() {
     echo "  -v, --verbose  Verbose mode (enabled when -u|--upgrade)"
     echo "  -d, --dry-run  Compare the FW versions without installation. Return code "0" means the FW is up-to-date, return code "10" means an upgrade is required, otherwise an error is detected."
     echo "  -c, --clear-semaphore   Clear hw resources before updating firmware"
+{% if sonic_asic_platform == "nvidia-bluefield" %}
+    echo "  -r, --reset    Reset firmware configuration (NVIDIA BlueField platform only)"
+{% endif %}
     echo "  -h, --help     Print help"
     echo
     echo "Examples:"
     echo "  ./${SCRIPT_NAME} --verbose"
     echo "  ./${SCRIPT_NAME} --upgrade"
+{% if sonic_asic_platform == "nvidia-bluefield" %}
+    echo "  ./${SCRIPT_NAME} --reset"
+{% endif %}
     echo "  ./${SCRIPT_NAME} --help"
     echo
 }
@@ -107,6 +116,11 @@ function ParseArguments() {
             -c|--clear-semaphore)
                 CLEAR_SEMAPHORE="${YES_PARAM}"
             ;;
+{% if sonic_asic_platform == "nvidia-bluefield" %}
+            -r|--reset)
+                RESET_CONFIG="${YES_PARAM}"
+            ;;
+{% endif %}
             -h|--help)
                 PrintHelp
                 exit "${EXIT_SUCCESS}"
@@ -192,10 +206,10 @@ function UnlockStateChange() {
 }
 
 function GetMstDeviceType() {
-    local -r asic_type=$(GetAsicType)
+    local -r asic_type=$(/usr/bin/asic_detect/asic_detect.sh)
 
     case $asic_type in
-    ${SPC1_ASIC}|${SPC2_ASIC}|${SPC3_ASIC}|${SPC4_ASIC})
+    ${SPC1_ASIC}|${SPC2_ASIC}|${SPC3_ASIC}|${SPC4_ASIC}|${SPC5_ASIC})
         echo "Spectrum"
         return ${EXIT_SUCCESS}
         ;;
@@ -237,48 +251,6 @@ function WaitForDevice() {
     LogInfo "${DEVICE_TYPE} ASIC successfully detected at ${SPC_MST_DEV}"
 }
 
-function GetAsicType() {
-    local -r VENDOR_ID="15b3"
-
-    local -r SPC1_PRODUCT_ID="cb84"
-    local -r SPC2_PRODUCT_ID="cf6c"
-    local -r SPC3_PRODUCT_ID="cf70"
-    local -r SPC4_PRODUCT_ID="cf80"
-    local -r BF3_PRODUCT_ID="a2dc"
-
-    local -i QUERY_RETRY_COUNT="0"
-    local -i QUERY_RETRY_COUNT_MAX="10"
-    local pcitree=$(lspci -n 2>/dev/null)
-    ERROR_CODE="$?"
-
-    while [[ ("${QUERY_RETRY_COUNT}" -lt "QUERY_RETRY_COUNT_MAX") && ("${ERROR_CODE}" != "${EXIT_SUCCESS}") ]]; do
-        sleep 1s
-        ((QUERY_RETRY_COUNT++))
-        pcitree=$(lspci -n 2>/dev/null)
-        ERROR_CODE="$?"
-    done
-
-    if echo $pcitree | grep "${VENDOR_ID}:${SPC1_PRODUCT_ID}" &>/dev/null; then
-        echo "${SPC1_ASIC}"
-        exit "${EXIT_SUCCESS}"
-    elif echo $pcitree | grep "${VENDOR_ID}:${SPC2_PRODUCT_ID}" &>/dev/null; then
-        echo "${SPC2_ASIC}"
-        exit "${EXIT_SUCCESS}"
-    elif echo $pcitree | grep "${VENDOR_ID}:${SPC3_PRODUCT_ID}" &>/dev/null; then
-        echo "${SPC3_ASIC}"
-        exit "${EXIT_SUCCESS}"
-    elif echo $pcitree | grep "${VENDOR_ID}:${SPC4_PRODUCT_ID}" &>/dev/null; then
-        echo "${SPC4_ASIC}"
-        exit "${EXIT_SUCCESS}"
-    elif echo $pcitree | grep "${VENDOR_ID}:${BF3_PRODUCT_ID}" &>/dev/null; then
-        echo "${BF3_NIC}"
-        exit "${EXIT_SUCCESS}"
-    fi
-
-    echo "${UNKN_ASIC}"
-    exit "${EXIT_FAILURE}"
-}
-
 function GetSPCMstDevice() {
     local _DEVICE_TYPE=$(GetMstDeviceType)
     local _MST_DEVICE=$(${QUERY_XML} | xmlstarlet sel -t -m "//Device[contains(@type,'${_DEVICE_TYPE}')]" -v @pciName | head -n 1)
@@ -378,29 +350,8 @@ function RunFwUpdateCmd() {
     # Reactivate FW prior to burning...
     eval "flint -d ${_MST_DEVICE} ir" 2>&1 >/dev/null
 
-    local COMMAND="${MFT_DIAGNOSIS_FLAGS} flint $@ burn"
-
-    output=$(eval "${COMMAND}")
-
-    ERROR_CODE="$?"
-
-    if [[ "${ERROR_CODE}" != "${EXIT_SUCCESS}" ]]; then
-        echo "${output}"
-        failure_msg="${output#*Fail : }"
-        ExitFailure "FW Update command: ${COMMAND} failed with error: ${failure_msg}"
-    fi
-
-    local COMMAND="mlxconfig -d ${_MST_DEVICE} -y s INTERNAL_CPU_MODEL=1 LAG_RESOURCE_ALLOCATION=1 NUM_OF_PF=0 CQE_COMPRESSION=1 NUM_OF_VFS=0 HAIRPIN_DATA_BUFFER_LOCK=1 MEMIC_SIZE_LIMIT=0 PCI_WR_ORDERING=1"
-
-    output=$(eval "${COMMAND}")
-
-    ERROR_CODE="$?"
-
-    if [[ "${ERROR_CODE}" != "${EXIT_SUCCESS}" ]]; then
-        echo "${output}"
-        failure_msg="${output#*Fail : }"
-        ExitFailure "FW Update command: ${COMMAND} failed with error: ${failure_msg}"
-    fi
+    RunCmd "${MFT_DIAGNOSIS_FLAGS} flint $@ burn"
+    RunCmd "mlxconfig -d ${_MST_DEVICE} -y r"
 }
 
 function GetAvailableFwVersion() {
@@ -421,7 +372,7 @@ function GetAvailableFwVersion() {
 function UpgradeFW() {
     local -r _FW_BIN_PATH="$1"
 
-    local -r _ASIC_TYPE="$(GetAsicType)"
+    local -r _ASIC_TYPE="$(/usr/bin/asic_detect/asic_detect.sh)"
     if [[ "${_ASIC_TYPE}" = "${UNKN_ASIC}" ]]; then
         ExitFailure "failed to detect ASIC type"
     fi
@@ -523,6 +474,18 @@ function ClearSemaphore() {
     fi
 }
 
+function ResetFirmwareConfig() {
+    local -r _MST_DEVICE="$(GetSPCMstDevice)"
+
+    if [[ "${_MST_DEVICE}" = "${UNKN_MST}" ]]; then
+        ExitFailure "Could not find MST device for firmware reset"
+    fi
+
+    LogInfo "Resetting firmware configuration for device ${_MST_DEVICE}"
+    RunCmd "mlxconfig -d ${_MST_DEVICE} -y r"
+    LogInfo "Firmware configuration reset completed successfully"
+}
+
 trap Cleanup EXIT
 
 ParseArguments "$@"
@@ -535,6 +498,11 @@ WaitForDevice
 
 ClearSemaphore
 
+if [[ "${RESET_CONFIG}" = "${YES_PARAM}" ]]; then
+    ResetFirmwareConfig
+    ExitSuccess "firmware configuration reset completed"
+fi
+
 if [ "${IMAGE_UPGRADE}" != "${YES_PARAM}" ]; then
     UpgradeFW
 else
diff --git a/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py
index 7abcd24771c..1404fd7ba66 100644
--- a/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py
+++ b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -181,9 +182,10 @@ def dpuctl_get_status(ctx, all_dpus=False, dpu_names=None):
                 dpu_status_list = [dpu_name,
                                    dpu_obj.dpu_ready_indication,
                                    dpu_obj.dpu_shtdn_ready_indication,
-                                   dpu_obj.boot_prog_indication]
+                                   dpu_obj.boot_prog_indication,
+                                   dpu_obj.dpu_force_pwr_indication]
                 status_list.append(dpu_status_list)
-        header = ['DPU', 'dpu ready', 'dpu shutdown ready', 'boot progress']
+        header = ['DPU', 'dpu ready', 'dpu shutdown ready', 'boot progress', 'Force Power Required']
         click.echo(tabulate(status_list, header))
     except Exception as error:
         print(f"An error occurred: {type(error).__name__} - {error}")
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index d53e60c9f81..a758d08e3d2 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -32,6 +32,7 @@ class DpuInterfaceEnum(Enum):
     MIDPLANE_INT = "midplane_interface"
     RSHIM_INT = "rshim_info"
     PCIE_INT = "bus_info"
+    RSHIM_PCIE_INT = "rshim_bus_info"
 
 
 dpu_interface_values = [item.value for item in DpuInterfaceEnum]
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py
index 44302077e9c..3b6e0a3cfaf 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py
@@ -43,7 +43,6 @@
 
 WAIT_FOR_SHTDN = 120
 WAIT_FOR_DPU_READY = 180
-WAIT_FOR_PCI_DEV = 60
 
 
 class OperationType(Enum):
@@ -103,18 +102,20 @@ def __init__(self, dpu_name):
         self.boot_prog_state = None
         self.shtdn_state = None
         self.dpu_ready_state = None
+        self.dpu_force_pwr_state = None
         self.setup_logger()
-        self.pci_dev_path = None
-        self.rshim_interface = None
-        # Use systemd dbus to execute start and stop rshim service
-        os.environ['DBUS_SESSION_BUS_ADDRESS'] = 'unix:path=/run/dbus/system_bus_socket'
+        self.pci_dev_path = []
         self.verbosity = False
 
     def setup_logger(self, use_print=False):
+        def print_with_time(msg):
+            timestamp = time.strftime("%Y-%m-%d %H:%M:%S")
+            print(f"[{timestamp}] {msg}")
+
         if use_print:
-            self.logger_info = print
-            self.logger_error = print
-            self.logger_debug = print
+            self.logger_info = print_with_time
+            self.logger_error = print_with_time 
+            self.logger_debug = print_with_time
             return
         self.logger_debug = logger.log_debug
         self.logger_info = logger.log_info
@@ -141,45 +142,11 @@ def run_cmd_output(self, cmd, raise_exception=True):
 
     def dpu_pre_shutdown(self):
         """Method to execute shutdown activities for the DPU"""
-        rshim_op = self.dpu_rshim_service_control("stop")
-        pci_rem_op = self.dpu_pci_remove()
-        return rshim_op and pci_rem_op
+        return self.dpu_pci_remove()
 
     def dpu_post_startup(self):
         """Method to execute all post startup activities for the DPU"""
-        pci_scan_op = self.dpu_pci_scan()
-        rshim_op = None
-        if self.wait_for_pci():
-            rshim_op = self.dpu_rshim_service_control("start")
-        if rshim_op and pci_scan_op:
-            return True
-        return False
-
-    def get_rshim_interface(self):
-        """Parse the rshim interface from platform.json, raise Runtime error if the device id is not available"""
-        if not self.rshim_interface:
-                interface_name = DeviceDataManager.get_dpu_interface(self.dpu_name, DpuInterfaceEnum.RSHIM_INT.value)
-                if not interface_name:
-                    raise RuntimeError(f"Unable to Parse rshim information for {self.dpu_name} from Platform.json")
-                # rshim1 -> rshim@1
-                self.rshim_interface = interface_name[:5] + "@" + interface_name[5:]
-        return self.rshim_interface
-
-    def dpu_rshim_service_control(self, op):
-        """Start/Stop the RSHIM service for the current DPU"""
-        try:
-            rshim_cmd = ["dbus-send", "--dest=org.freedesktop.systemd1", "--type=method_call",
-                         "--print-reply", "--reply-timeout=2000",
-                         "/org/freedesktop/systemd1",
-                         f"org.freedesktop.systemd1.Manager.{op.capitalize()}Unit",
-                         f"string:{self.get_rshim_interface()}.service",
-                         "string:replace"]
-            self.run_cmd_output(rshim_cmd)
-            # If command fails execution exception is raised , return true if control is still in try block
-            return True
-        except Exception as e:
-            self.log_error(f"Failed to {op} rshim!: {e}")
-        return False
+        return self.dpu_pci_scan()
 
     @contextmanager
     def get_open_fd(self, path, flag):
@@ -190,35 +157,25 @@ def get_open_fd(self, path, flag):
             os.close(fd)
 
     def get_pci_dev_path(self):
-        """Parse the PCIE device ID from platform.json, raise Runtime error if the device id is not available"""
-        if not self.pci_dev_path:
-            pci_dev_id = DeviceDataManager.get_dpu_interface(self.dpu_name, DpuInterfaceEnum.PCIE_INT.value)
-            if not pci_dev_id:
-                raise RuntimeError(f"Unable to obtain pci device id for {self.dpu_name} from platform.json")
-            self.pci_dev_path = os.path.join(PCI_DEV_BASE, pci_dev_id, "remove")
-        return self.pci_dev_path
+        """Parse the PCIE devices ID from platform.json, raise Runtime error if the device id is not available"""
+        if self.pci_dev_path:
+            return self.pci_dev_path
+        
+        pci_dev_id = DeviceDataManager.get_dpu_interface(self.dpu_name, DpuInterfaceEnum.PCIE_INT.value)
+        rshim_pci_dev_id = DeviceDataManager.get_dpu_interface(self.dpu_name, DpuInterfaceEnum.RSHIM_PCIE_INT.value)
+        if not pci_dev_id or not rshim_pci_dev_id:
+            raise RuntimeError(f"Unable to obtain PCI device IDs for {self.dpu_name} from platform.json")
+
+        self.pci_dev_path = [os.path.join(PCI_DEV_BASE, pci_dev_id),
+                                os.path.join(PCI_DEV_BASE, rshim_pci_dev_id)]
 
-    def wait_for_pci(self):
-        """Wait for the PCI device folder in the PCI Path, required before starting rshim"""
-        try:
-            with self.get_open_fd(PCI_DEV_BASE, os.O_RDONLY) as dir_fd:
-                if os.path.exists(os.path.dirname(self.get_pci_dev_path())):
-                    return True
-                poll_obj = poll()
-                poll_obj.register(dir_fd, POLLIN)
-                start = time.monotonic()
-                while (time.monotonic() - start) < WAIT_FOR_PCI_DEV:
-                    events = poll_obj.poll(WAIT_FOR_PCI_DEV * 1000)
-                    if events:
-                        if os.path.exists(os.path.dirname(self.get_pci_dev_path())):
-                            return True
-                return os.path.exists(os.path.dirname(self.get_pci_dev_path()))
-        except Exception as e:
-            self.log_error(f"Unable to wait for PCI device:{e}")
+        return self.pci_dev_path
 
     def write_file(self, file_name, content_towrite):
         """Write given value to file only if file exists"""
         try:
+            if self.verbosity:
+                self.log_debug(f'Writing {content_towrite} to file {file_name}')
             utils.write_file(file_name, content_towrite, raise_exception=True)
         except Exception as e:
             self.log_error(f'Failed to write {content_towrite} to file {file_name}')
@@ -297,10 +254,13 @@ def _power_on(self):
     def dpu_pci_remove(self):
         """Per DPU PCI remove API"""
         try:
-            self.write_file(self.get_pci_dev_path(), OperationType.SET.value)
+            for pci_dev_path in self.get_pci_dev_path():
+                remove_path = os.path.join(pci_dev_path, "remove")
+                if os.path.exists(remove_path):
+                    self.write_file(remove_path, OperationType.SET.value)
             return True
-        except Exception:
-            self.log_info(f"Failed PCI Removal!")
+        except Exception as e:
+            self.log_error(f"Failed PCI Removal with error {e}")
         return False
 
     def dpu_pci_scan(self):
@@ -309,11 +269,11 @@ def dpu_pci_scan(self):
             pci_scan_path = "/sys/bus/pci/rescan"
             self.write_file(pci_scan_path, OperationType.SET.value)
             return True
-        except Exception:
-            self.log_info(f"Failed to rescan")
+        except Exception as e:
+            self.log_error(f"Failed to rescan with error {e}")
         return False
 
-    def dpu_power_on(self, forced=False):
+    def dpu_power_on(self, forced=False, skip_pre_post=False):
         """Per DPU Power on API"""
         with self.boot_prog_context():
             self.log_info(f"Power on with force = {forced}")
@@ -322,24 +282,26 @@ def dpu_power_on(self, forced=False):
                 return_value = True
             elif forced:
                 return_value = self._power_on_force()
+            elif self.read_force_power_path() == int(OperationType.CLR.value):
+                self.log_info(f"Power on with Force=True since power off force sysfs is cleared")
+                return_value = self._power_on_force()
             else:
                 return_value = self._power_on()
-            self.dpu_post_startup()
+            if not skip_pre_post:
+                self.dpu_post_startup()
             return return_value
 
-    def dpu_power_off(self, forced=False):
+    def dpu_power_off(self, forced=False, skip_pre_post=False):
         """Per DPU Power off API"""
         with self.boot_prog_context():
-            self.dpu_pre_shutdown()
+            if not skip_pre_post:
+                self.dpu_pre_shutdown()
             self.log_info(f"Power off with force = {forced}")
             if self.read_boot_prog() == BootProgEnum.RST.value:
                 self.log_info(f"Skipping DPU power off as DPU is already powered off")
                 return True
             elif forced:
                 return self._power_off_force()
-            elif self.read_boot_prog() != BootProgEnum.OS_RUN.value:
-                self.log_info(f"Power off with force = True since since OS is not in running state on DPU")
-                return self._power_off_force()
             return self._power_off()
 
     def _reboot(self, no_wait):
@@ -373,9 +335,6 @@ def dpu_reboot(self, forced=False, no_wait=False, skip_pre_post=False):
             self.log_info(f"Reboot with force = {forced}")
             if forced:
                 return_value = self._reboot_force(no_wait)
-            elif self.read_boot_prog() != BootProgEnum.OS_RUN.value:
-                self.log_info(f"Reboot with force = True since OS is not in running state on DPU")
-                return_value = self._reboot_force(no_wait)
             else:
                 return_value = self._reboot(no_wait)
             # No Post startup as well for no_wait call
@@ -417,12 +376,22 @@ def dpu_shtdn_ready_update(self):
             self.log_error(f"Could not update dpu_shtdn_ready for DPU")
             raise e
 
+    def dpu_force_pwr_update(self):
+        """Monitor and read changes to dpu_shtdn_ready sysfs file and map it to corresponding indication"""
+        try:
+            self.dpu_force_pwr_state = self.read_force_power_path()
+            self.dpu_force_pwr_indication = f"{False if self.dpu_force_pwr_state == 1 else True if self.dpu_force_pwr_state == 0 else str(self.dpu_force_pwr_state)+' - N/A'}"
+        except Exception as e:
+            self.log_error(f"Could not update dpu_force_pwr_state for DPU")
+            raise e
+
     def dpu_status_update(self):
         """Update status for all the three relevant sysfs files for DPU monitoring"""
         try:
             self.dpu_boot_prog_update()
             self.dpu_ready_update()
             self.dpu_shtdn_ready_update()
+            self.dpu_force_pwr_update()
         except Exception as e:
             self.log_error(f"Could not obtain status of DPU")
             raise e
@@ -430,6 +399,9 @@ def dpu_status_update(self):
     def read_boot_prog(self):
         return utils.read_int_from_file(self.boot_prog_path, raise_exception=True)
 
+    def read_force_power_path(self):
+        return utils.read_int_from_file(self.pwr_f_path, raise_exception=True)
+
     def update_boot_prog_once(self, poll_var):
         """Read boot_progress and update the value once """
         poll_var.poll()
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/module.py b/platform/mellanox/mlnx-platform-api/sonic_platform/module.py
index 271e7e61806..d631b33fdcd 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/module.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/module.py
@@ -1,6 +1,6 @@
 #
 # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -265,11 +265,6 @@ def __init__(self, dpu_id):
         self.fault_state = False
         self.dpu_vpd_parser = DpuVpdParser('/var/run/hw-management/eeprom/vpd_data', self.dpuctl_obj._name.upper())
         self.CONFIG_DB_NAME = "CONFIG_DB"
-        self.DHCP_SERVER_HASH = f"DHCP_SERVER_IPV4_PORT|bridge-midplane|{self._name.lower()}"
-        self.DHCP_IP_ADDRESS_KEY = "ips@"
-        self.config_db = ConfigDBConnector(use_unix_socket_path=False)
-        self.config_db.connect()
-        self.midplane_ip = None
         self.midplane_interface = None
         self.bus_info = None
         self.reboot_base_path = f"/var/run/hw-management/{self.dpuctl_obj._name}/system/"
@@ -282,6 +277,8 @@ def __init__(self, dpu_id):
                 (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, 'Reset from Main board'),
             f'{self.reboot_base_path}reset_dpu_thermal':
                 (ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER, 'Thermal shutdown of the DPU'),
+            f'{self.reboot_base_path}reset_pwr_off':
+                (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, 'Reset due to Power off'),
         }
         self.chassis_state_db = SonicV2Connector(host="127.0.0.1")
         self.chassis_state_db.connect(self.chassis_state_db.CHASSIS_STATE_DB)
@@ -361,11 +358,11 @@ def set_admin_state(self, up):
             bool: True if the request has been issued successfully, False if not
         """
         if up:
-            if self.dpuctl_obj.dpu_power_on():
+            if self.dpuctl_obj.dpu_power_on(skip_pre_post=True):
                 return True
             logger.log_error(f"Failed to set the admin state for {self._name}")
             return False
-        return self.dpuctl_obj.dpu_power_off()
+        return self.dpuctl_obj.dpu_power_off(skip_pre_post=True)
 
     def get_type(self):
         """
@@ -450,9 +447,7 @@ def get_midplane_ip(self):
         Returns:
             A string, the IP-address of the module reachable over the midplane
         """
-        if not self.midplane_ip:
-            self.midplane_ip = self.config_db.get(self.CONFIG_DB_NAME, self.DHCP_SERVER_HASH, self.DHCP_IP_ADDRESS_KEY)
-        return self.midplane_ip
+        return f"169.254.200.{int(self.dpu_id) + 1}"
 
     def is_midplane_reachable(self):
         """
@@ -488,14 +483,13 @@ def get_pci_bus_info(self):
         Retrieves the bus information.
 
         Returns:
-            Returns the PCI bus information in BDF format like "[DDDD:]BB:SS:F"
+            Returns the PCI bus information in list of BDF format
         """
-        if not self.bus_info:
-            # Cache the data to prevent multiple platform.json parsing
-            self.bus_info = DeviceDataManager.get_dpu_interface(self.get_name().lower(), DpuInterfaceEnum.PCIE_INT.value)
-            # If we are unable to parse platform.json for midplane interface raise RunTimeError
-            if not self.bus_info:
-                raise RuntimeError(f"Unable to obtain bus info from platform.json for {self.get_name()}")
+        if self.bus_info:
+            return self.bus_info
+        bus_paths = self.dpuctl_obj.get_pci_dev_path()
+        # Convert full paths to BDF format
+        self.bus_info = [path.split('/')[-1] for path in bus_paths]
         return self.bus_info
 
     def pci_detach(self):
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/pcie.py b/platform/mellanox/mlnx-platform-api/sonic_platform/pcie.py
index f814583dcca..b8f62b3a2ee 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/pcie.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/pcie.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -14,6 +15,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
+
 ########################################################################
 #
 # Module contains a platform specific implementation of SONiC Platform
@@ -22,6 +24,8 @@
 ########################################################################
 import os
 import re
+from sonic_py_common import logger
+from sonic_platform.device_data import DeviceDataManager, DpuInterfaceEnum
 
 try:
     from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
@@ -30,23 +34,70 @@
 
 SYSFS_PCI_DEVICE_PATH = '/sys/bus/pci/devices/'
 
+# Constants from module_base.py
+PCIE_DETACH_INFO_TABLE = "PCIE_DETACH_INFO"
+PCIE_OPERATION_DETACHING = "detaching"
+
 
 class Pcie(PcieUtil):
     # check the current PCIe device with config file and return the result
     # use bus from _device_id_to_bus_map instead of from yaml file
     def get_pcie_check(self):
         self.load_config_file()
+        return_confInfo = []
         for item_conf in self.confInfo:
             id_conf = item_conf["id"]
             dev_conf = item_conf["dev"]
             fn_conf = item_conf["fn"]
+            bus_conf = item_conf["bus"]
+            pcie_device_id = f"0000:{bus_conf}:{dev_conf}.{fn_conf}"
+            if pcie_device_id in self.dpu_pcie_devices:
+                # Special handling for Bluefield Devices
+                # Ideally even with BIOS updates, the PCI ID for bluefield devices should not change.
+                try:
+                    # Connect to STATE_DB to check for detached devices
+                    if not os.environ.get('UNITTEST'):
+                        import swsscommon
+                        self.state_db = swsscommon.swsscommon.DBConnector("STATE_DB", 0)
+                    key_dict = f"{PCIE_DETACH_INFO_TABLE}|0000:{bus_conf}:{dev_conf}.{fn_conf}"
+                    detach_info_dict = dict(self.state_db.hgetall(key_dict))
+                    if detach_info_dict and detach_info_dict.get("dpu_state") == PCIE_OPERATION_DETACHING:
+                        # Do not add this device to confInfo list
+                        continue
+                    elif self.check_pcie_sysfs(bus=int(bus_conf, base=16), device=int(dev_conf, base=16), func=int(fn_conf, base=16)):
+                        # Add device to confInfo list if not present in state_db
+                        item_conf["result"] = "Passed"
+                    else:
+                        item_conf["result"] = "Failed"
+                    return_confInfo.append(item_conf)
+                    continue
+                except Exception as e:
+                    self.logger.log_error(f"Error: {e}")
+                    pass
             bus_conf = self._device_id_to_bus_map.get(str(id_conf))
             if bus_conf and self.check_pcie_sysfs(bus=int(bus_conf, base=16), device=int(dev_conf, base=16),
                                                   func=int(fn_conf, base=16)):
                 item_conf["result"] = "Passed"
             else:
                 item_conf["result"] = "Failed"
-        return self.confInfo
+            return_confInfo.append(item_conf)
+        return return_confInfo
+
+    def get_dpu_pcie_devices(self):
+        dpu_count = DeviceDataManager.get_dpu_count()
+        if dpu_count == 0:
+            return []
+        dpu_pcie_devices = []
+        for dpu_id in range(dpu_count):
+            dpu_name = f"dpu{dpu_id}"
+            pci_dev_id = DeviceDataManager.get_dpu_interface(dpu_name, DpuInterfaceEnum.PCIE_INT.value)
+            rshim_pci_dev_id = DeviceDataManager.get_dpu_interface(dpu_name, DpuInterfaceEnum.RSHIM_PCIE_INT.value)
+            if not pci_dev_id or not rshim_pci_dev_id:
+                continue
+            dpu_pcie_devices.append(pci_dev_id)
+            dpu_pcie_devices.append(rshim_pci_dev_id)
+        return dpu_pcie_devices
+
 
     # Create
     def _create_device_id_to_bus_map(self):
@@ -81,3 +132,6 @@ def _create_device_id_to_bus_map(self):
     def __init__(self, platform_path):
         PcieUtil.__init__(self, platform_path)
         self._create_device_id_to_bus_map()
+        self.dpu_pcie_devices = self.get_dpu_pcie_devices()
+        self.state_db = None
+        self.logger = logger.Logger()
\ No newline at end of file
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index 6fe67bbc21b..307eae7164a 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -179,8 +179,6 @@
 # SFP stderr
 SFP_EEPROM_NOT_AVAILABLE = 'Input/output error'
 
-SFP_DEFAULT_TEMP_WARNNING_THRESHOLD = 70.0
-SFP_DEFAULT_TEMP_CRITICAL_THRESHOLD = 80.0
 SFP_TEMPERATURE_SCALE = 8.0
 
 # Module host management definitions begin
@@ -188,6 +186,7 @@
 SFP_FW_CONTROL = 0
 
 CMIS_MAX_POWER_OFFSET = 201
+CMIS_MEDIA_INTERFACE_TECH_OFFSET = 212
 
 SFF_POWER_CLASS_MASK = 0xE3
 SFF_POWER_CLASS_MAPPING = {
@@ -419,6 +418,9 @@ def __init__(self, sfp_index, sfp_type=None, slot_id=0, linecard_port_count=0, l
         else:
             self.state = STATE_FCP_DOWN
         self.processing_insert_event = False
+        self.sn = None
+        self.temp_high_threshold = None
+        self.temp_critical_threshold = None
 
     def __str__(self):
         return f'SFP {self.sdk_index}'
@@ -839,6 +841,60 @@ def get_tx_fault(self):
         except Exception as e:
             print(e)
         return [False] * api.NUM_CHANNELS if api else None
+    
+    def reinit_if_sn_changed(self):
+        """Reinitialize the SFP if the module ID has changed
+        """
+        sn = self.get_serial()
+        if sn != self.sn:
+            self.reinit()
+            self.sn = self.get_serial()
+            self.temp_high_threshold = None
+            self.temp_critical_threshold = None
+            return True
+        return False
+            
+    def get_temperature_info(self):
+        """Get SFP temperature info in a fast way. This function is faster than calling following functions one by one: get_temperature, get_temperature_warning_threshold, get_temperature_critical_threshold.
+
+        Returns:
+            tuple: (temperature, warning_threshold, critical_threshold)
+        """
+        try:
+            sw_control = self.is_sw_control()
+            if not sw_control:
+                return sw_control, None, None, None
+
+            sn_changed = self.reinit_if_sn_changed()
+            # software control, read from EEPROM
+            temperature = super().get_temperature()
+            if temperature is None:
+                # Failed to read temperature, no need read threshold
+                return sw_control, None, None, None
+            elif temperature == 0.0:
+                # Temperature is not supported, no need read threshold
+                return sw_control, 0.0, 0.0, 0.0
+            else:
+                if not sn_changed and self.temp_high_threshold is not None and self.temp_critical_threshold is not None:
+                    return sw_control, temperature, self.temp_high_threshold, self.temp_critical_threshold
+                else:
+                    # Read threshold from EEPROM
+                    api = self.get_xcvr_api()
+                    thresh_support = api.get_transceiver_thresholds_support()
+                    if thresh_support is None:
+                        # Failed to read threshold support field, no need read threshold
+                        return sw_control, temperature, None, None
+                    if thresh_support:
+                        # Read threshold from EEPROM
+                        self.temp_high_threshold = api.xcvr_eeprom.read(consts.TEMP_HIGH_WARNING_FIELD)
+                        self.temp_critical_threshold = api.xcvr_eeprom.read(consts.TEMP_HIGH_ALARM_FIELD)
+                        return sw_control, temperature, self.temp_high_threshold, self.temp_critical_threshold
+                    else:
+                        # No threshold support, use default threshold
+                        return sw_control, temperature, 0.0, 0.0
+        except:
+            # module under initialization, return as temperature not supported
+            return False, None, None, None
 
     def get_temperature(self):
         """Get SFP temperature
@@ -860,9 +916,8 @@ def get_temperature(self):
         except:
             return 0.0
 
-        self.reinit()
-        temperature = super().get_temperature()
-        return temperature if temperature is not None else None
+        self.reinit_if_sn_changed()
+        return super().get_temperature()
 
     def get_temperature_warning_threshold(self):
         """Get temperature warning threshold
@@ -877,14 +932,8 @@ def get_temperature_warning_threshold(self):
         except:
             return 0.0
         
-        support, thresh = self._get_temperature_threshold()
-        if support is None or thresh is None:
-            # Failed to read from EEPROM
-            return None
-        if support is False:
-            # Do not support
-            return 0.0
-        return thresh.get(consts.TEMP_HIGH_WARNING_FIELD, SFP_DEFAULT_TEMP_WARNNING_THRESHOLD)
+        self.temp_high_threshold = self._get_temperature_threshold(consts.TEMP_HIGH_WARNING_FIELD)
+        return self.temp_high_threshold
 
     def get_temperature_critical_threshold(self):
         """Get temperature critical threshold
@@ -899,33 +948,32 @@ def get_temperature_critical_threshold(self):
         except:
             return 0.0
 
-        support, thresh = self._get_temperature_threshold()
-        if support is None or thresh is None:
-            # Failed to read from EEPROM
-            return None
-        if support is False:
-            # Do not support
-            return 0.0
-        return thresh.get(consts.TEMP_HIGH_ALARM_FIELD, SFP_DEFAULT_TEMP_CRITICAL_THRESHOLD)
+        self.temp_critical_threshold = self._get_temperature_threshold(consts.TEMP_HIGH_ALARM_FIELD)
+        return self.temp_critical_threshold
 
-    def _get_temperature_threshold(self):
+    def _get_temperature_threshold(self, thresh_field):
         """Get temperature thresholds data from EEPROM
+        
+        Args:
+            thresh_field (str): threshold field name
 
         Returns:
-            tuple: (support, thresh_dict)
-        """
-        self.reinit()
+            float: temperature threshold
+        """
+        sn_changed = self.reinit_if_sn_changed()
+        if not sn_changed:
+            if thresh_field == consts.TEMP_HIGH_WARNING_FIELD and self.temp_high_threshold is not None:
+                return self.temp_high_threshold
+            elif thresh_field == consts.TEMP_HIGH_ALARM_FIELD and self.temp_critical_threshold is not None:
+                return self.temp_critical_threshold
         api = self.get_xcvr_api()
         if not api:
-            return None, None
+            return None
 
         thresh_support = api.get_transceiver_thresholds_support()
-        if thresh_support:
-            if isinstance(api, sff8636.Sff8636Api) or isinstance(api, sff8436.Sff8436Api):
-                return thresh_support, api.xcvr_eeprom.read(consts.TEMP_THRESHOLDS_FIELD)
-            return thresh_support, api.xcvr_eeprom.read(consts.THRESHOLDS_FIELD)
-        else:
-            return thresh_support, {}
+        if thresh_support is None:
+            return None
+        return api.xcvr_eeprom.read(thresh_field) if thresh_support else 0.0
 
     def get_xcvr_api(self):
         """
@@ -1051,6 +1099,16 @@ def is_sff_api(self, xcvr_api):
         """
         return isinstance(xcvr_api, sff8636.Sff8636Api) or isinstance(xcvr_api, sff8436.Sff8436Api)
 
+    def check_media_interface_technology(self, xcvr_api):
+        """Check media interface technology
+        0x0F in offset 212, means the module is 'Copper cable, linear active equalizers'.
+        Nvidia doesn't support it to be SW control, so we set it to FW control
+        Args:
+            xcvr_api (object): xcvr api object
+        """
+        media_interface = self.read_eeprom(CMIS_MEDIA_INTERFACE_TECH_OFFSET, 1)
+        return media_interface[0] != 0x0F if media_interface else False
+
     def is_supported_for_software_control(self, xcvr_api):
         """Check if the api object supports software control
 
@@ -1061,9 +1119,12 @@ def is_supported_for_software_control(self, xcvr_api):
             bool: True if the api object supports software control
         """
         if xcvr_api.is_flat_memory():
-            return self.is_cmis_api(xcvr_api) or self.is_sff_api(xcvr_api)
-        else:
-            return self.is_cmis_api(xcvr_api)
+            if self.is_cmis_api(xcvr_api):
+                # For Copper active modules, Nvidia doesn't support SW control
+                return self.check_media_interface_technology(xcvr_api)
+            return self.is_sff_api(xcvr_api)
+
+        return self.is_cmis_api(xcvr_api)
 
     def check_power_capability(self):
         """Check module max power with cage power limit
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
index 813c5e8eefb..436840a04eb 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
@@ -39,7 +39,7 @@ def initialize(cls):
         if not dpus_present and host_mgmt_mode:
             # Non smart switch behaviour has highest priority
             from .chassis import Chassis
-            cls.thermal_updater_task = thermal_updater.ThermalUpdater(sfp_list=Chassis.chassis_instance.get_all_sfps())
+            cls.thermal_updater_task = thermal_updater.ThermalUpdater(sfp_list=Chassis.chassis_instance.get_all_sfps(), update_asic=False)
         elif dpus_present:
             from .chassis import Chassis
             dpus = Chassis.chassis_instance.get_all_modules()
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
index e07e4cb2564..48ad612590e 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
@@ -49,10 +49,11 @@
 
 
 class ThermalUpdater:
-    def __init__(self, sfp_list):
+    def __init__(self, sfp_list, update_asic=True):
         self._sfp_list = sfp_list
         self._sfp_status = {}
         self._timer = utils.Timer()
+        self._update_asic = update_asic
 
     def load_tc_config(self):
         asic_poll_interval = 1
@@ -75,8 +76,9 @@ def load_tc_config(self):
                     if sfp_poll_interval_config:
                         sfp_poll_interval = int(sfp_poll_interval_config) / 2
 
-        logger.log_notice(f'ASIC polling interval: {asic_poll_interval}')
-        self._timer.schedule(asic_poll_interval, self.update_asic)
+        if self._update_asic:
+            logger.log_notice(f'ASIC polling interval: {asic_poll_interval}')
+            self._timer.schedule(asic_poll_interval, self.update_asic)
         logger.log_notice(f'Module polling interval: {sfp_poll_interval}')
         self._timer.schedule(sfp_poll_interval, self.update_module)
 
@@ -120,18 +122,13 @@ def update_single_module(self, sfp):
             presence = sfp.get_presence()
             pre_presence = self._sfp_status.get(sfp.sdk_index)
             if presence:
-                temperature = sfp.get_temperature()
-                if temperature == 0:
-                    warning_thresh = 0
-                    critical_thresh = 0
-                    fault = 0
-                else:
-                    warning_thresh = sfp.get_temperature_warning_threshold()
-                    critical_thresh = sfp.get_temperature_critical_threshold()
-                    fault = ERROR_READ_THERMAL_DATA if (temperature is None or warning_thresh is None or critical_thresh is None) else 0
-                    temperature = 0 if temperature is None else temperature * SFP_TEMPERATURE_SCALE
-                    warning_thresh = 0 if warning_thresh is None else warning_thresh * SFP_TEMPERATURE_SCALE
-                    critical_thresh = 0 if critical_thresh is None else critical_thresh * SFP_TEMPERATURE_SCALE
+                sw_control, temperature, warning_thresh, critical_thresh = sfp.get_temperature_info()
+                if not sw_control:
+                    return
+                fault = ERROR_READ_THERMAL_DATA if (temperature is None or warning_thresh is None or critical_thresh is None) else 0
+                temperature = 0 if temperature is None else temperature * SFP_TEMPERATURE_SCALE
+                warning_thresh = 0 if warning_thresh is None else warning_thresh * SFP_TEMPERATURE_SCALE
+                critical_thresh = 0 if critical_thresh is None else critical_thresh * SFP_TEMPERATURE_SCALE
 
                 hw_management_independent_mode_update.thermal_data_set_module(
                     0, # ASIC index always 0 for now
diff --git a/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py
index ad71d26c917..92f91759213 100644
--- a/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py
+++ b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -113,31 +114,31 @@
                      },
 }
 
-status_output = ["""DPU    dpu ready    dpu shutdown ready    boot progress
------  -----------  --------------------  -----------------
-dpu0   True         False                 5 - OS is running
-dpu1   True         False                 5 - OS is running
-dpu2   True         False                 5 - OS is running
-dpu3   True         False                 5 - OS is running
+status_output = ["""DPU    dpu ready    dpu shutdown ready    boot progress      Force Power Required
+-----  -----------  --------------------  -----------------  ----------------------
+dpu0   True         False                 5 - OS is running  False
+dpu1   True         False                 5 - OS is running  False
+dpu2   True         False                 5 - OS is running  False
+dpu3   True         False                 5 - OS is running  False
 """,
-                 """DPU    dpu ready    dpu shutdown ready    boot progress
------  -----------  --------------------  -----------------
-dpu1   True         False                 5 - OS is running
+                 """DPU    dpu ready    dpu shutdown ready    boot progress      Force Power Required
+-----  -----------  --------------------  -----------------  ----------------------
+dpu1   True         False                 5 - OS is running  False
 """,
-                 """DPU    dpu ready    dpu shutdown ready    boot progress
------  -----------  --------------------  -----------------
-dpu0   True         False                 5 - OS is running
+                 """DPU    dpu ready    dpu shutdown ready    boot progress      Force Power Required
+-----  -----------  --------------------  -----------------  ----------------------
+dpu0   True         False                 5 - OS is running  False
 """,
                  """An error occurred: AssertionError - Invalid Arguments provided!dpu5 does not exist!
 """,
                  """An error occurred: AssertionError - Invalid Arguments provided!dpu10 does not exist!
 """,
-                 """DPU    dpu ready    dpu shutdown ready    boot progress
------  -----------  --------------------  ------------------
-dpu0   False        True                  0 - Reset/Boot-ROM
-dpu1   False        True                  0 - Reset/Boot-ROM
-dpu2   False        True                  0 - Reset/Boot-ROM
-dpu3   False        True                  0 - Reset/Boot-ROM
+                 """DPU    dpu ready    dpu shutdown ready    boot progress       Force Power Required
+-----  -----------  --------------------  ------------------  ----------------------
+dpu0   False        True                  0 - Reset/Boot-ROM  False
+dpu1   False        True                  0 - Reset/Boot-ROM  False
+dpu2   False        True                  0 - Reset/Boot-ROM  False
+dpu3   False        True                  0 - Reset/Boot-ROM  False
 """,
-                 ["dpu1", "True", "False"],
+                 ["dpu1", "True", "False", "False"],
                  ]
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
index f34cb4e471e..76c370d0dd0 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
@@ -120,7 +120,8 @@ def test_dpu_interface_data(self, mock_load_json):
                     "Ethernet224": "Ethernet0"
                 },
                 "rshim_info": "rshim0",
-                "bus_info": "0000:08:00.0"
+                "bus_info": "0000:08:00.0",
+                "rshim_bus_info": "0000:08:00.1"
             },
             "dpu1": {
                 "midplane_interface": "dpu1",
@@ -128,7 +129,8 @@ def test_dpu_interface_data(self, mock_load_json):
                     "Ethernet232": "Ethernet0"
                 },
                 "rshim_info": "rshim1",
-                "bus_info": "0000:07:00.0"
+                "bus_info": "0000:07:00.0",
+                "rshim_bus_info": "0000:07:00.1"
             },
             "dpu2": {
                 "midplane_interface": "dpu2",
@@ -136,7 +138,8 @@ def test_dpu_interface_data(self, mock_load_json):
                     "Ethernet240": "Ethernet0"
                 },
                 "rshim_info": "rshim2",
-                "bus_info": "0000:01:00.0"
+                "bus_info": "0000:01:00.0",
+                "rshim_bus_info": "0000:01:00.1"
             },
             "dpu3": {
                 "midplane_interface": "dpu3",
@@ -144,7 +147,8 @@ def test_dpu_interface_data(self, mock_load_json):
                     "Ethernet248": "Ethernet0"
                 },
                 "rshim_info": "rshim3",
-                "bus_info": "0000:02:00.0"
+                "bus_info": "0000:02:00.0",
+                "rshim_bus_info": "0000:02:00.1"
             }
         }
         mock_load_json.return_value = mock_value
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py b/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py
index 7f6d2be7892..eaf3d641941 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -106,8 +107,9 @@ def test_dpuctl_reset(self):
 
     def test_dpuctl_status(self):
         """Tests for dpuctl click Implementation for Status API"""
-        mock_file_list = ['shtdn_ready', '_ready', 'boot_progress']
-        mock_return_value = [0, 1, 5]
+        mock_file_list = ['shtdn_ready', '_ready', 'boot_progress', 'pwr_force']
+        mock_return_value = [0, 1, 5, 1]
+        assert len(mock_file_list) == len(mock_return_value)
 
         def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_func=None):
             for index, value in enumerate(mock_file_list):
@@ -119,6 +121,7 @@ def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_fun
             cmd = dpuctl_get_status
             runner = CliRunner()
             result = runner.invoke(cmd, catch_exceptions=False, obj=obj)
+            print(result.output)
             assert result.output == status_output[0]
             result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj)
             assert result.output == status_output[1]
@@ -128,10 +131,10 @@ def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_fun
             assert result.output == status_output[3]
             result = runner.invoke(cmd, ['dpu10'], catch_exceptions=False, obj=obj)
             assert result.output == status_output[4]
-            mock_return_value = [1, 0, 0]
+            mock_return_value = [1, 0, 0, 1]
             result = runner.invoke(cmd, catch_exceptions=False, obj=obj)
             assert result.output == status_output[5]
-            header = ["DPU", "dpu ready", "dpu shutdown ready", "boot progress"]
+            header = ["DPU", "dpu ready", "dpu shutdown ready", "boot progress", "Force Power Required"]
             boot_prog_map = {
                 0: "Reset/Boot-ROM",
                 1: "BL2 (from ATF image on eMMC partition)",
@@ -148,14 +151,14 @@ def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_fun
                 15: "Software is inactive"
             }
             for key in boot_prog_map.keys():
-                mock_return_value = [0, 1, key]
+                mock_return_value = [0, 1, key, 1]
                 result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj)
                 expected_value = f"{key} - {boot_prog_map.get(key)}"
-                expected_data = [[status_output[6][0], status_output[6][1], status_output[6][2], expected_value]]
+                expected_data = [[status_output[6][0], status_output[6][1], status_output[6][2], expected_value, status_output[6][3]]]
                 expected_res = tabulate(expected_data, header)
                 assert result.output == expected_res + "\n"
-            mock_return_value = [5, 5, 25]
-            expected_data = [["dpu1", "5 - N/A", "5 - N/A", "25 - N/A"]]
+            mock_return_value = [5, 5, 25, 6]
+            expected_data = [["dpu1", "5 - N/A", "5 - N/A", "25 - N/A", "6 - N/A"]]
             result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj)
             expected_res = tabulate(expected_data, header)
             assert result.output == expected_res + "\n"
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py
index 4acfce00c07..1c42861901e 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py
@@ -16,586 +16,369 @@
 # limitations under the License.
 #
 
-"""dpuctlplat Tests Implementation"""
+"""Tests for dpuctlplat Platform API Wrapper"""
 import os
 import sys
+import time
 import pytest
-import sonic_platform
-from sonic_platform.dpuctlplat import DpuCtlPlat, BootProgEnum, PCI_DEV_BASE
-
+import subprocess
 from unittest.mock import MagicMock, patch, Mock, call
 
+from sonic_platform.dpuctlplat import (
+    DpuCtlPlat, BootProgEnum, PCI_DEV_BASE, OperationType,
+    WAIT_FOR_SHTDN, WAIT_FOR_DPU_READY
+)
+
 test_path = os.path.dirname(os.path.abspath(__file__))
 modules_path = os.path.dirname(test_path)
 sys.path.insert(0, modules_path)
 scripts_path = os.path.join(modules_path, "scripts")
 
+# Test data
+TEST_DPU_LIST = ['dpu0', 'dpu1', 'dpu2', 'dpu3']
+TEST_PCI_PATH = os.path.join(PCI_DEV_BASE, "0000:08:00.0")
+TEST_RSHIM_PCI_PATH = os.path.join(PCI_DEV_BASE, "0000:08:00.1")
+TEST_PCI_REMOVE_PATH = os.path.join(TEST_PCI_PATH, "remove")
+TEST_RSHIM_PCI_REMOVE_PATH = os.path.join(TEST_RSHIM_PCI_PATH, "remove")
+
+@pytest.fixture
+def dpuctl_obj():
+    """Fixture to create a DpuCtlPlat object for testing"""
+    obj = DpuCtlPlat('dpu0')
+    obj.setup_logger(True)
+    obj.pci_dev_path = [TEST_PCI_PATH, TEST_RSHIM_PCI_PATH]
+    return obj
+
+class TestDpuCtlPlatInit:
+    """Tests for DpuCtlPlat initialization"""
 
-def create_dpu_list():
-    """Create dpu object list for Function calls"""
-    existing_dpu_list = ['dpu0', 'dpu1', 'dpu2', 'dpu3']
-    dpuctl_list = []
-    for dpu_name in existing_dpu_list:
-        dpuctl_obj = DpuCtlPlat(dpu_name)
+    def test_init(self, dpuctl_obj):
+        """Test initialization of DpuCtlPlat object"""
+        assert dpuctl_obj.dpu_name == 'dpu0'
+        assert dpuctl_obj.dpu_id == 0
+        assert dpuctl_obj._name == 'dpu1'  # hwmgmt name is dpu index + 1
+        assert dpuctl_obj.verbosity is False
+        assert isinstance(dpuctl_obj.boot_prog_map, dict)
+        assert len(dpuctl_obj.boot_prog_map) > 0
+        assert len(dpuctl_obj.pci_dev_path) == 2  # Both PCI and RSHIM paths
+
+    def test_setup_logger(self, dpuctl_obj):
+        """Test logger setup"""
+        # Test with print mode
         dpuctl_obj.setup_logger(True)
-        dpuctl_list.append(dpuctl_obj)
-    context = {
-        "dpuctl_list": dpuctl_list,
-    }
-    return context
+        # Test that the logger functions add timestamps
+        with patch('time.strftime') as mock_time:
+            mock_time.return_value = "2024-01-01 12:00:00"
+            with patch('builtins.print') as mock_print:
+                dpuctl_obj.logger_info("test message")
+                mock_print.assert_called_once_with("[2024-01-01 12:00:00] test message")
+
+        # Test with syslogger mode
+        dpuctl_obj.setup_logger(False)
+        assert dpuctl_obj.logger_info != print
+        assert dpuctl_obj.logger_error != print
+        assert dpuctl_obj.logger_debug != print
+
+    def test_get_pci_dev_path(self, dpuctl_obj):
+        """Test PCI device path retrieval"""
+        # Test with both PCI and RSHIM paths
+        with patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_get:
+            mock_get.side_effect = ["0000:08:00.0", "0000:08:00.1"]
+            paths = dpuctl_obj.get_pci_dev_path()
+            assert len(paths) == 2
+            assert paths[0].endswith("0000:08:00.0")
+            assert paths[1].endswith("0000:08:00.1")
 
+        # Test with missing PCI path
+        with patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_get:
+            mock_get.side_effect = [None, "0000:08:00.1"]
+            dpuctl_obj.pci_dev_path = []
+            with pytest.raises(RuntimeError) as exc:
+                dpuctl_obj.get_pci_dev_path()
+            assert "Unable to obtain PCI device IDs" in str(exc.value)
 
-obj = create_dpu_list()
+        # Test with missing RSHIM path
+        with patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_get:
+            mock_get.side_effect = ["0000:08:00.0", None]
+            with pytest.raises(RuntimeError) as exc:
+                dpuctl_obj.get_pci_dev_path()
+            assert "Unable to obtain PCI device IDs" in str(exc.value)
 
-rshim_interface = "rshim@0"
-pci_dev_path = os.path.join(PCI_DEV_BASE, "0000:08:00.0", 'remove')
+class TestDpuCtlPlatPCI:
+    """Tests for PCI-related functionality"""
 
+    def test_pci_operations(self, dpuctl_obj):
+        """Test PCI remove and scan operations"""
+        written_data = []
+        def mock_write_file(file_name, content_towrite):
+            written_data.append({"file": file_name, "data": content_towrite})
+            return True
 
-class TestDpuClass:
-    """Tests for dpuctl Platform API Wrapper"""
-    @classmethod
-    def setup_class(cls):
-        """Setup function for all tests for dpuctl implementation"""
-        os.environ["PATH"] += os.pathsep + scripts_path
-        os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "2"
-        dpuctl_obj = obj["dpuctl_list"][0]
-        dpuctl_obj.rshim_interface = rshim_interface
-        dpuctl_obj.pci_dev_path = pci_dev_path
+        # Test PCI remove - should remove both devices
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch('os.path.exists', return_value=True):
+            assert dpuctl_obj.dpu_pci_remove()
+            assert len(written_data) == 2
+            assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH
+            assert written_data[0]["data"] == "1"
+            assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH
+            assert written_data[1]["data"] == "1"
+
+        # Test PCI scan - should scan devices
+        written_data.clear()
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file):
+            assert dpuctl_obj.dpu_pci_scan()
+            assert written_data[0]["file"].endswith("rescan")
+            assert written_data[0]["data"] == "1"
+
+class TestDpuCtlPlatPower:
+    """Tests for power management functionality"""
 
     @patch('os.path.exists', MagicMock(return_value=True))
-    @patch('multiprocessing.Process.start', MagicMock(return_value=True))
-    @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False))
     @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch')
     @patch('sonic_platform.inotify_helper.InotifyHelper.__init__')
-    @patch('subprocess.check_output', MagicMock(return_value=True))
-    def test_power_off(self, mock_inotify, mock_add_watch):
-        """Tests for Per DPU Power Off function"""
-        dpuctl_obj = obj["dpuctl_list"][0]
-        mock_inotify.return_value = None
-        mock_add_watch.return_value = True
+    def test_power_off(self, mock_inotify_init, mock_wait_watch, dpuctl_obj):
+        """Test power off functionality"""
+        mock_inotify_init.return_value = None
+        mock_wait_watch.return_value = True
         written_data = []
 
         def mock_write_file(file_name, content_towrite):
-            written_data.append({"file": file_name,
-                                 "data": content_towrite})
+            written_data.append({"file": file_name, "data": content_towrite})
             return True
+
+        # Test force power off
         with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
-             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)):
+             patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value):
             assert dpuctl_obj.dpu_power_off(True)
-            print(f"{written_data}")
-            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
-            assert "1" == written_data[0]["data"]
-            assert "0" == written_data[1]["data"]
-            assert written_data[1]["file"].endswith(
-                f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[2]["data"]
-            assert written_data[2]["file"].endswith(
-                f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-            written_data = []
-            assert dpuctl_obj.dpu_power_off(False)
-            assert mock_inotify.call_args.args[0].endswith(
-                f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready")
-            assert written_data[0]["file"].endswith(
-                f"{pci_dev_path}")
-            assert "1" == written_data[0]["data"]
-            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[1]["data"]
-            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr")
-            assert "0" == written_data[2]["data"]
-            written_data = []
-            mock_add_watch.return_value = None
-            assert dpuctl_obj.dpu_power_off(False)
-            assert mock_inotify.call_args.args[0].endswith(
-                f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready")
-            assert written_data[0]["file"].endswith(
-                f"{pci_dev_path}")
-            assert "1" == written_data[0]["data"]
-            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[1]["data"]
-            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[2]["data"]
-            assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-            assert "0" == written_data[3]["data"]
-        # Test whether value of boot_progress skips power off
-        with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \
-             patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
-             patch.object(dpuctl_obj, '_power_off_force') as mock_power_off_force, \
-             patch.object(dpuctl_obj, '_power_off') as mock_power_off, \
-             patch.object(dpuctl_obj, 'log_info') as mock_obj:
-            mock_boot_prog.return_value = BootProgEnum.RST.value
-            mock_add_watch.return_value = True
-            assert dpuctl_obj.dpu_power_off(False)
-            assert mock_obj.call_args_list[1].args[0] == "Skipping DPU power off as DPU is already powered off"
-        # Test whether value of boot_progress changes power off to force_power_off
-        with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \
-             patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
-             patch.object(dpuctl_obj, '_power_off_force') as mock_power_off_force, \
-             patch.object(dpuctl_obj, '_power_off') as mock_power_off, \
-             patch.object(dpuctl_obj, 'log_info') as mock_obj:
-            mock_boot_prog.return_value = BootProgEnum.OS_CRASH_PROG.value
-            mock_add_watch.return_value = True
+            assert len(written_data) == 4  # Both PCI and RSHIM removals + rst + pwr_force
+            assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH
+            assert written_data[0]["data"] == "1"
+            assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH
+            assert written_data[1]["data"] == "1"
+            assert written_data[2]["data"] == "0"  # rst
+            assert written_data[3]["data"] == "0"  # pwr_force
+
+        # Test normal power off
+        written_data.clear()
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value):
             assert dpuctl_obj.dpu_power_off(False)
-            assert mock_obj.call_args_list[1].args[0] == "Power off with force = True since since OS is not in running state on DPU"
-            mock_power_off_force.assert_called_once()
-            mock_power_off.assert_not_called()
-            mock_boot_prog.return_value = BootProgEnum.OS_RUN.value
-            mock_power_off_force.reset_mock()
-            mock_power_off.reset_mock()
+            assert len(written_data) == 4  # Both PCI and RSHIM removals + rst + pwr
+            assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH
+            assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH
+            assert written_data[2]["file"].endswith("_rst")
+            assert written_data[3]["file"].endswith("_pwr")
+
+        # Test power off when already off
+        with patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.RST.value), \
+             patch.object(dpuctl_obj, 'log_info') as mock_log:
             assert dpuctl_obj.dpu_power_off(False)
-            mock_power_off_force.assert_not_called()
-            mock_power_off.assert_called_once()
+            assert "Skipping DPU power off as DPU is already powered off" in mock_log.call_args_list[-1].args[0]
+
+        # Test power off with skip_pre_post=True
+        written_data.clear()
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value):
+            assert dpuctl_obj.dpu_power_off(False, skip_pre_post=True)
+            assert len(written_data) == 2  # Only rst and pwr operations
+            assert not any("remove" in data["file"] for data in written_data)
+            assert written_data[0]["file"].endswith("_rst")
+            assert written_data[1]["file"].endswith("_pwr")
 
     @patch('os.path.exists', MagicMock(return_value=True))
-    @patch('multiprocessing.Process.start', MagicMock(return_value=True))
-    @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False))
     @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch')
     @patch('sonic_platform.inotify_helper.InotifyHelper.__init__')
-    @patch('subprocess.check_output', MagicMock(return_value=True))
-    def test_power_on(self, mock_inotify, mock_add_watch):
-        """Tests for Per DPU Power On function"""
-        dpuctl_obj = obj["dpuctl_list"][0]
-        mock_inotify.return_value = None
-        mock_add_watch.return_value = True
+    def test_power_on(self, mock_inotify_init, mock_wait_watch, dpuctl_obj):
+        """Test power on functionality"""
+        mock_inotify_init.return_value = None
+        mock_wait_watch.return_value = True
         written_data = []
 
         def mock_write_file(file_name, content_towrite):
-            written_data.append({"file": file_name,
-                                 "data": content_towrite})
+            written_data.append({"file": file_name, "data": content_towrite})
             return True
+
+        # Test force power on
         with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
-             patch.object(dpuctl_obj, 'wait_for_pci', wraps=MagicMock(return_value=None)), \
-             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)), \
-             patch.object(dpuctl_obj, 'read_boot_prog', wraps=MagicMock(return_value=BootProgEnum.RST.value)):
+             patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.RST.value), \
+             patch.object(dpuctl_obj, 'read_force_power_path', return_value=1):
             assert dpuctl_obj.dpu_power_on(True)
-            assert mock_inotify.call_args.args[0].endswith(
-                f"{dpuctl_obj.get_hwmgmt_name()}_ready")
-            assert written_data[0]["file"].endswith(
-                f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-            assert "1" == written_data[0]["data"]
-            assert written_data[1]["file"].endswith(
-                f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "1" == written_data[1]["data"]
-            written_data = []
+            assert len(written_data) == 3  # pwr_force + rst + rescan
+            assert written_data[0]["file"].endswith("_pwr_force")
+            assert written_data[0]["data"] == "1"
+            assert written_data[1]["file"].endswith("_rst")
+            assert written_data[1]["data"] == "1"
+            assert written_data[2]["file"].endswith("rescan")
+            assert written_data[2]["data"] == "1"
+
+        # Test normal power on
+        written_data.clear()
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.RST.value), \
+             patch.object(dpuctl_obj, 'read_force_power_path', return_value=1):
             assert dpuctl_obj.dpu_power_on(False)
-            assert written_data[0]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr")
-            assert "1" == written_data[0]["data"]
-            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "1" == written_data[1]["data"]
-            assert written_data[2]["file"].endswith(f"rescan")
-            assert "1" == written_data[2]["data"]
-            written_data = []
-            mock_add_watch.return_value = None
-            assert not dpuctl_obj.dpu_power_on(False)
-            assert len(written_data) == 19
-            assert written_data[0]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr")
-            assert "1" == written_data[0]["data"]
-            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "1" == written_data[1]["data"]
-            for i in range(4):
-                assert written_data[2 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-                assert "0" == written_data[2 + 4 * i]["data"]
-                assert written_data[3 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-                assert "0" == written_data[3 + 4 * i]["data"]
-                assert written_data[4 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-                assert "1" == written_data[4 + 4 * i]["data"]
-                assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-                assert "1" == written_data[5 + 4 * i]["data"]
-            assert written_data[18]["file"].endswith(f"rescan")
-            assert "1" == written_data[18]["data"]
+            assert len(written_data) == 3  # pwr + rst + rescan
+            assert written_data[0]["file"].endswith("_pwr")
+            assert written_data[1]["file"].endswith("_rst")
+            assert written_data[2]["file"].endswith("rescan")
+
+        # Test power on with skip_pre_post=True
+        written_data.clear()
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.RST.value), \
+             patch.object(dpuctl_obj, 'read_force_power_path', return_value=1):
+            assert dpuctl_obj.dpu_power_on(False, skip_pre_post=True)
+            assert len(written_data) == 2  # Only pwr and rst operations
+            assert not any("rescan" in data["file"] for data in written_data)
+            assert written_data[0]["file"].endswith("_pwr")
+            assert written_data[1]["file"].endswith("_rst")
+
+class TestDpuCtlPlatReboot:
+    """Tests for reboot functionality"""
 
     @patch('os.path.exists', MagicMock(return_value=True))
-    @patch('multiprocessing.Process.start', MagicMock(return_value=None))
-    @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False))
     @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch')
     @patch('sonic_platform.inotify_helper.InotifyHelper.__init__')
-    def test_dpu_reset(self, mock_inotify, mock_add_watch):
-        """Tests for Per DPU Reset function"""
-        dpuctl_obj = obj["dpuctl_list"][0]
-        mock_inotify.return_value = None
-        mock_add_watch.return_value = True
+    def test_reboot(self, mock_inotify_init, mock_wait_watch, dpuctl_obj):
+        """Test reboot functionality"""
+        mock_inotify_init.return_value = None
+        mock_wait_watch.return_value = True
         written_data = []
 
         def mock_write_file(file_name, content_towrite):
-            written_data.append({"file": file_name,
-                                 "data": content_towrite})
+            written_data.append({"file": file_name, "data": content_towrite})
             return True
+
+        # Test normal reboot
         with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
-             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \
-             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)):
-            dpuctl_obj.write_file = mock_write_file
+             patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value):
             assert dpuctl_obj.dpu_reboot(False)
-            assert len(written_data) == 4
-            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
-            assert "1" == written_data[0]["data"]
-            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[1]["data"]
-            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "1" == written_data[2]["data"]
-            assert written_data[3]["file"].endswith(f"rescan")
-            assert "1" == written_data[3]["data"]
-            assert mock_inotify.call_args.args[0].endswith(
-                f"{dpuctl_obj.get_hwmgmt_name()}_ready")
-            mock_add_watch.return_value = None
-            written_data = []
-            assert not dpuctl_obj.dpu_reboot()
-            assert len(written_data) == 22
-            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
-            assert "1" == written_data[0]["data"]
-            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[1]["data"]
-            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[2]["data"]
-            assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-            assert "0" == written_data[3]["data"]
-            assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "1" == written_data[4]["data"]
-            for i in range(4):
-                assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-                assert "0" == written_data[5 + 4 * i]["data"]
-                assert written_data[6 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-                assert "0" == written_data[6 + 4 * i]["data"]
-                assert written_data[7 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-                assert "1" == written_data[7 + 4 * i]["data"]
-                assert written_data[8 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-                assert "1" == written_data[8 + 4 * i]["data"]
-            assert written_data[21]["file"].endswith(f"rescan")
-            assert "1" == written_data[21]["data"]
-        # Force Reboot
-        mock_inotify.reset_mock()
-        mock_add_watch.return_value = True
-        mock_inotify.return_value = None
-        written_data = []
+            assert len(written_data) == 5  # Both PCI removals + rst + rst + rescan
+            assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH
+            assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH
+            assert written_data[2]["file"].endswith("_rst")
+            assert written_data[3]["file"].endswith("_rst")
+            assert written_data[4]["file"].endswith("rescan")
+
+        # Test force reboot
+        written_data.clear()
         with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
-             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \
-             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)):
-            dpuctl_obj.write_file = mock_write_file
+             patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value):
             assert dpuctl_obj.dpu_reboot(True)
-            mock_add_watch.return_value = None
-            assert len(written_data) == 6
-            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
-            assert "1" == written_data[0]["data"]
-            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[1]["data"]
-            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-            assert "0" == written_data[2]["data"]
-            assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-            assert "1" == written_data[3]["data"]
-            assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "1" == written_data[4]["data"]
-            assert written_data[5]["file"].endswith(f"rescan")
-            assert "1" == written_data[5]["data"]
-            assert mock_inotify.call_args.args[0].endswith(
-                f"{dpuctl_obj.get_hwmgmt_name()}_ready")
-            mock_add_watch.return_value = None
-            written_data = []
-            assert not dpuctl_obj.dpu_reboot(True)
-            assert len(written_data) == 18
-            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
-            assert "1" == written_data[0]["data"]
-            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[1]["data"]
-            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-            assert "0" == written_data[2]["data"]
-            assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-            assert "1" == written_data[3]["data"]
-            assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "1" == written_data[4]["data"]
-            for i in range(3):
-                assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-                assert "0" == written_data[5 + 4 * i]["data"]
-                assert written_data[6 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-                assert "0" == written_data[6 + 4 * i]["data"]
-                assert written_data[7 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-                assert "1" == written_data[7 + 4 * i]["data"]
-                assert written_data[8 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-                assert "1" == written_data[8 + 4 * i]["data"]
-            assert written_data[17]["file"].endswith(f"rescan")
-            assert "1" == written_data[17]["data"]
-        # Test whether value of boot_progress changes power off to force_power_off
-        with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \
-             patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
-             patch.object(dpuctl_obj, '_reboot') as mock_reset, \
-             patch.object(dpuctl_obj, '_reboot_force') as mock_reset_force, \
-             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)), \
-             patch.object(dpuctl_obj, 'log_info') as mock_obj:
-            mock_boot_prog.return_value = BootProgEnum.RST.value
-            mock_add_watch.return_value = True
-            assert dpuctl_obj.dpu_reboot(False)
-            assert mock_obj.call_args_list[1].args[0] == "Reboot with force = True since OS is not in running state on DPU"
-            mock_reset_force.assert_called_once()
-            mock_reset.assert_not_called()
-            mock_boot_prog.return_value = 5
-            mock_reset_force.reset_mock()
-            mock_reset.reset_mock()
-            assert dpuctl_obj.dpu_reboot(False)
-            mock_reset_force.assert_not_called()
-            mock_reset.assert_called_once()
-        written_data = []
-        mock_inotify.reset_mock()
-        mock_add_watch.reset_mock()
-        mock_inotify.return_value = None
-        mock_add_watch.return_value = True
-        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
-             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \
-             patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim:
-            assert dpuctl_obj.dpu_reboot(forced=False, no_wait=True)
-            # Rshim service is only stopped and not started
-            mock_rshim.assert_called_once()
-            mock_rshim.call_args.args[0] == "stop"
-            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
-            assert "1" == written_data[0]["data"]
-            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[1]["data"]
-            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "1" == written_data[2]["data"]
-            mock_inotify.called_once()
-            mock_add_watch.called_once()
-        written_data = []
-        mock_inotify.reset_mock()
-        mock_add_watch.reset_mock()
-        mock_inotify.return_value = None
-        mock_add_watch.return_value = True
+            assert len(written_data) == 7  # Both PCI removals + rst + pwr_force + pwr_force + rst + rescan
+            assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH
+            assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH
+            assert written_data[2]["file"].endswith("_rst")
+            assert written_data[3]["file"].endswith("_pwr_force")
+            assert written_data[4]["file"].endswith("_pwr_force")
+            assert written_data[5]["file"].endswith("_rst")
+            assert written_data[6]["file"].endswith("rescan")
+
+        # Test no-wait reboot
+        written_data.clear()
         with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
-             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_START.value)), \
-             patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim:
-            assert dpuctl_obj.dpu_reboot(forced=False, no_wait=True)
-            mock_rshim.assert_called_once()
-            mock_rshim.call_args.args[0] == "stop"
-            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
-            assert "1" == written_data[0]["data"]
-            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[1]["data"]
-            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-            assert "0" == written_data[2]["data"]
-            assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
-            assert "1" == written_data[3]["data"]
-            assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "1" == written_data[4]["data"]
-            mock_inotify.called_once()
-            mock_add_watch.called_once()
-        # Skip pre startup and post shutdown
-        written_data = []
+             patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value):
+            assert dpuctl_obj.dpu_reboot(no_wait=True)
+            assert len(written_data) == 4  # Both PCI removals + rst + rst
+            assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH
+            assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH
+            assert written_data[2]["file"].endswith("_rst")
+            assert written_data[3]["file"].endswith("_rst")
+
+        # Test reboot with skip_pre_post=True
+        written_data.clear()
         with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
-             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_START.value)), \
-             patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim:
+             patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value):
             assert dpuctl_obj.dpu_reboot(skip_pre_post=True)
-            mock_rshim.assert_not_called()
-            # We skip writing PCI data
-            assert written_data[0]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
-            assert "0" == written_data[0]["data"]
-            assert not written_data[-1]["file"].endswith("rescan")
-
-    def test_prog_update(self):
-        dpuctl_obj = obj["dpuctl_list"][0]
+            assert len(written_data) == 2  # Only rst operations
+            assert all("_rst" in data["file"] for data in written_data)
+            assert not any("remove" in data["file"] for data in written_data)
+            assert not any("rescan" in data["file"] for data in written_data)
+
+class TestDpuCtlPlatUtils:
+    """Tests for utility functions"""
+
+    def test_run_cmd_output(self, dpuctl_obj):
+        """Test command execution and error handling"""
+        # Test successful command
+        with patch('subprocess.check_output') as mock_cmd:
+            mock_cmd.return_value = b"success\n"
+            assert dpuctl_obj.run_cmd_output(["test"]) == "success"
+
+        # Test failed command with exception
+        with patch('subprocess.check_output') as mock_cmd:
+            mock_cmd.side_effect = subprocess.CalledProcessError(1, "test")
+            with pytest.raises(subprocess.CalledProcessError):
+                dpuctl_obj.run_cmd_output(["test"])
+
+        # Test failed command without exception
+        with patch('subprocess.check_output') as mock_cmd:
+            mock_cmd.side_effect = subprocess.CalledProcessError(1, "test")
+            assert dpuctl_obj.run_cmd_output(["test"], raise_exception=False) is None
+
+    def test_write_file(self, dpuctl_obj):
+        """Test file writing functionality"""
+        with patch('sonic_platform.utils.write_file') as mock_write:
+            mock_write.return_value = True
+            assert dpuctl_obj.write_file("test_file", "test_content")
+            mock_write.assert_called_once_with("test_file", "test_content", raise_exception=True)
+
+            mock_write.side_effect = Exception("Write error")
+            with pytest.raises(Exception) as exc:
+                dpuctl_obj.write_file("test_file", "test_content")
+            assert "Write error" in str(exc.value)
+
+    def test_get_hwmgmt_name(self, dpuctl_obj):
+        """Test hardware management name generation"""
+        assert dpuctl_obj.get_hwmgmt_name() == "dpu1"  # dpu0 -> dpu1
+        dpuctl_obj.dpu_name = "dpu1"
+        dpuctl_obj.dpu_id = 1
+        assert dpuctl_obj.get_hwmgmt_name() == "dpu2"  # dpu1 -> dpu2
+
+class TestDpuCtlPlatStatus:
+    """Tests for status monitoring functionality"""
+
+    def test_boot_progress(self, dpuctl_obj):
+        """Test boot progress monitoring"""
         dpuctl_obj.boot_prog_path = os.path.join(test_path, 'mock_dpu_boot_prog')
 
-        class Dummy:
+        class DummyPoller:
             def poll(self):
                 return True
-        dummy_obj = Dummy()
-        mock_file_path = "mock_dpu_boot_prog"
-        mock_val = 0
-        boot_prog_map = dpuctl_obj.boot_prog_map
-
-        def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_func=None):
-            if file_path.endswith(mock_file_path):
-                return mock_val
-            else:
-                return 0
-        with patch("sonic_platform.utils.read_int_from_file", wraps=mock_read_int_from_file), \
-             patch.object(dpuctl_obj, 'wait_for_pci', wraps=MagicMock(return_value=None)), \
-             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)):
-            for key_val in boot_prog_map.keys():
-                mock_val = key_val
-                dpuctl_obj.update_boot_prog_once(dummy_obj)
-                assert dpuctl_obj.boot_prog_state == key_val
-                assert dpuctl_obj.boot_prog_indication == f"{key_val} - {boot_prog_map.get(key_val)}"
-            mock_val = 25
-            dpuctl_obj.update_boot_prog_once(dummy_obj)
-            assert dpuctl_obj.boot_prog_state == 25
-            assert dpuctl_obj.boot_prog_indication == "25 - N/A"
-            mock_val = 36
-            dpuctl_obj.update_boot_prog_once(dummy_obj)
-            assert dpuctl_obj.boot_prog_state == 36
-            assert dpuctl_obj.boot_prog_indication == "36 - N/A"
-            mock_file_path = "dpu1_ready"
-            mock_val = 1
-            dpuctl_obj.dpu_status_update()
-            assert dpuctl_obj.boot_prog_state == 0
-            assert dpuctl_obj.boot_prog_indication == f"0 - {boot_prog_map.get(0)}"
+
+        with patch("sonic_platform.utils.read_int_from_file") as mock_read:
+            # Test known boot progress states
+            for state in BootProgEnum:
+                mock_read.return_value = state.value
+                dpuctl_obj.update_boot_prog_once(DummyPoller())
+                assert dpuctl_obj.boot_prog_state == state.value
+                assert dpuctl_obj.boot_prog_indication == f"{state.value} - {dpuctl_obj.boot_prog_map[state.value]}"
+
+            # Test unknown boot progress state
+            mock_read.return_value = 99
+            dpuctl_obj.update_boot_prog_once(DummyPoller())
+            assert dpuctl_obj.boot_prog_state == 99
+            assert dpuctl_obj.boot_prog_indication == "99 - N/A"
+
+    def test_status_updates(self, dpuctl_obj):
+        """Test DPU status updates"""
+        with patch("sonic_platform.utils.read_int_from_file") as mock_read:
+            # Test ready state
+            mock_read.return_value = 1
+            dpuctl_obj.dpu_ready_update()
             assert dpuctl_obj.dpu_ready_state == 1
-            assert dpuctl_obj.dpu_ready_indication == f"True"
-            assert dpuctl_obj.dpu_shtdn_ready_state == 0
-            assert dpuctl_obj.dpu_shtdn_ready_indication == f"False"
-            mock_file_path = "dpu1_shtdn_ready"
-            dpuctl_obj.dpu_status_update()
-            assert dpuctl_obj.boot_prog_state == 0
-            assert dpuctl_obj.boot_prog_indication == f"0 - {boot_prog_map.get(0)}"
-            assert dpuctl_obj.dpu_ready_state == 0
-            assert dpuctl_obj.dpu_ready_indication == "False"
+            assert dpuctl_obj.dpu_ready_indication == "True"
+
+            # Test shutdown ready state
+            mock_read.return_value = 1
+            dpuctl_obj.dpu_shtdn_ready_update()
             assert dpuctl_obj.dpu_shtdn_ready_state == 1
             assert dpuctl_obj.dpu_shtdn_ready_indication == "True"
-            mock_file_path = "dpu1_shtdn_ready"
-            mock_val = 25
-            dpuctl_obj.dpu_status_update()
+
+            # Test invalid states
+            mock_read.return_value = 25
+            dpuctl_obj.dpu_ready_update()
+            assert dpuctl_obj.dpu_ready_indication == "25 - N/A"
+            dpuctl_obj.dpu_shtdn_ready_update()
             assert dpuctl_obj.dpu_shtdn_ready_indication == "25 - N/A"
-            mock_file_path = "dpu1_ready"
-            mock_val = 50
-            dpuctl_obj.dpu_status_update()
-            assert dpuctl_obj.dpu_ready_indication == "50 - N/A"
-
-    @patch('os.path.exists')
-    @patch('os.open', MagicMock(return_value=-1))
-    @patch('os.close', MagicMock(return_value=None))
-    @patch('sonic_platform.dpuctlplat.poll')
-    def test_pci_func(self, m1, mock_exists):
-        dpuctl_obj = obj["dpuctl_list"][0]
-        mock_exists.return_value = False
-        mock_obj = Mock()
-        mock_obj.register.return_value = None
-        mock_obj.poll.return_value = None
-        m1.return_value = mock_obj
-        timeout_val = 45
-
-        def mock_time_diff():
-            mock_time_diff.counter += 1
-            return mock_time_diff.counter * timeout_val
-        mock_time_diff.counter = 0
-        with patch("time.monotonic", wraps=mock_time_diff):
-            # PCI Device is not recognized
-            assert not dpuctl_obj.wait_for_pci()
-            pci_parent_path = os.path.dirname(pci_dev_path)
-            assert pci_parent_path == mock_exists.call_args.args[0]
-            mock_obj.register.assert_called_once()
-            mock_obj.poll.assert_called_once()
-            # PCI device is recognized immediately
-            mock_obj.reset_mock()
-            mock_exists.reset_mock()
-            mock_exists.return_value = True
-            assert dpuctl_obj.wait_for_pci()
-            assert pci_parent_path == mock_exists.call_args.args[0]
-            mock_obj.register.assert_not_called()
-            mock_obj.poll.assert_not_called()
-            # PCI device is added later (Detected in Loop)
-            timeout_val = 20
-            mock_exists.reset_mock()
-            mock_obj.reset_mock()
-            mock_exists.side_effect = [False, True]
-            mock_obj.poll.return_value = True
-            assert dpuctl_obj.wait_for_pci()
-            mock_obj.register.assert_called_once()
-            mock_obj.poll.assert_called_once()
-            # PCI device is added later (Detected at the end)
-            timeout_val = 80
-            mock_exists.reset_mock()
-            mock_obj.reset_mock()
-            mock_exists.side_effect = [False, True]
-            assert dpuctl_obj.wait_for_pci()
-            mock_obj.register.assert_called_once()
-            mock_obj.poll.assert_not_called()
-        with patch.object(dpuctl_obj, 'pci_dev_path', None), \
-             patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_int,\
-             patch.object(dpuctl_obj, 'log_error') as mock_obj:
-            mock_int.return_value = None
-            dpuctl_obj.wait_for_pci()
-            mock_obj.assert_called_once_with("Unable to wait for PCI device:Unable to obtain pci device id for dpu0 from platform.json")
-            new_pci_dev_id = "0000:05:00.0"
-            mock_int.return_value = new_pci_dev_id
-            dpuctl_obj.wait_for_pci()
-            assert dpuctl_obj.pci_dev_path.endswith(f"{new_pci_dev_id}/remove")
-            # pci dev_path is cached
-            mock_int.reset_mock()
-            mock_int.return_value = "None"
-            dpuctl_obj.wait_for_pci()
-            mock_int.assert_not_called()
-            assert dpuctl_obj.pci_dev_path.endswith(f"{new_pci_dev_id}/remove")
-
-    def test_rshim_service(self):
-        dpuctl_obj = obj["dpuctl_list"][0]
-        with patch.object(dpuctl_obj, 'run_cmd_output') as mock_method:
-            dpuctl_obj.dpu_rshim_service_control('start')
-            mock_method.assert_called_once()
-            cmd_string = ' '.join(mock_method.call_args.args[0])
-            service_name = rshim_interface
-            operation = "Start"
-            assert (operation in cmd_string) and (service_name in cmd_string)
-            mock_method.reset_mock()
-            operation = "Stop"
-            dpuctl_obj.dpu_rshim_service_control('stop')
-            cmd_string = ' '.join(mock_method.call_args.args[0])
-            assert (operation in cmd_string) and (service_name in cmd_string)
-            mock_method.assert_called_once()
-            with pytest.raises(TypeError):
-                dpuctl_obj.dpu_rshim_service_control()
-            with patch.object(dpuctl_obj, 'rshim_interface', None), \
-                 patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_int,\
-                 patch.object(dpuctl_obj, 'log_error') as mock_obj:
-                mock_int.return_value = None
-                dpuctl_obj.dpu_rshim_service_control('start')
-                mock_obj.assert_called_once_with("Failed to start rshim!: Unable to Parse rshim information for dpu0 from Platform.json")
-                mock_int.return_value = "rshim1"
-                dpuctl_obj.dpu_rshim_service_control('start')
-                assert dpuctl_obj.rshim_interface == "rshim@1"
-                mock_int.reset_mock()
-                mock_int.return_value = "rshim20"
-                dpuctl_obj.dpu_rshim_service_control('start')
-                # Rshim name is cached
-                mock_int.assert_not_called()
-                assert dpuctl_obj.rshim_interface == "rshim@1"
-
-    def test_pre_and_post(self):
-        dpuctl_obj = obj["dpuctl_list"][0]
-        with patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim, patch.object(dpuctl_obj, 'write_file') as mock_write:
-            manager_mock = Mock()
-            manager_mock.attach_mock(mock_rshim, 'rshim')
-            manager_mock.attach_mock(mock_write, 'write')
-            mock_rshim.return_value = True
-            mock_write.return_value = True
-            assert dpuctl_obj.dpu_pre_shutdown()
-            mock_rshim.assert_called_once()
-            mock_write.assert_called_once()
-            # Confirm the order of calls and the parameters
-            manager_mock.mock_calls[0] == call.rshim('stop')
-            manager_mock.mock_calls[1] == call.rshim(dpuctl_obj.pci_dev_path, '1')
-            mock_rshim.return_value = False
-            assert not dpuctl_obj.dpu_pre_shutdown()
-            mock_rshim.return_value = True
-            # Test post startup
-            mock_rshim.reset_mock()
-            mock_write.reset_mock()
-            manager_mock.reset_mock()
-            with patch.object(dpuctl_obj, 'wait_for_pci') as mock_pci:
-                manager_mock.attach_mock(mock_rshim, 'rshim')
-                manager_mock.attach_mock(mock_write, 'write')
-                manager_mock.attach_mock(mock_pci, 'pci')
-                dpuctl_obj.dpu_post_startup()
-                mock_rshim.assert_called_once()
-                mock_write.assert_called_once()
-                mock_pci.assert_called_once()
-                # Confirm the order of calls and the parameters
-                manager_mock.mock_calls[0] == call.rshim('/sys/bus/pci/rescan', '1')
-                manager_mock.mock_calls[1] == call.pci()
-                manager_mock.mock_calls[2] == call.rshim('start')
-                mock_rshim.return_value = False
-                assert not dpuctl_obj.dpu_post_startup()
-        with patch.object(dpuctl_obj, 'write_file', side_effect=Exception("Mock")), \
-             patch.object(dpuctl_obj, 'run_cmd_output', MagicMock(return_value=True)):
-            assert not dpuctl_obj.dpu_pre_shutdown()
-        with patch.object(dpuctl_obj, 'run_cmd_output', side_effect=Exception("Mock")), \
-             patch.object(dpuctl_obj, 'dpu_pci_remove', MagicMock(return_value=True)):
-            assert not dpuctl_obj.dpu_pre_shutdown()
-        with patch.object(dpuctl_obj, 'write_file', side_effect=Exception("Mock")), \
-             patch.object(dpuctl_obj, 'wait_for_pci', MagicMock(return_value=True)), \
-             patch.object(dpuctl_obj, 'run_cmd_output', MagicMock(return_value=True)):
-            assert not dpuctl_obj.dpu_post_startup()
-        with patch.object(dpuctl_obj, 'run_cmd_output', side_effect=Exception("Mock")), \
-             patch.object(dpuctl_obj, 'wait_for_pci', MagicMock(return_value=True)), \
-             patch.object(dpuctl_obj, 'dpu_pci_scan', MagicMock(return_value=True)):
-            assert not dpuctl_obj.dpu_post_startup()
-
-    @classmethod
-    def teardown_class(cls):
-        """Teardown function for all tests for dpuctl implementation"""
-        os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "0"
-        os.environ["PATH"] = os.pathsep.join(
-            os.environ["PATH"].split(os.pathsep)[:-1])
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_module.py b/platform/mellanox/mlnx-platform-api/tests/test_module.py
index f80eb602053..9a8f920e759 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_module.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_module.py
@@ -1,6 +1,6 @@
 #
 # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -265,41 +265,14 @@ def test_dpu_module(self, mock_call, mock_get):
             mock_method.assert_called_once_with("Failed to set the admin state for DPU3")
         m.dpuctl_obj.dpu_power_off = mock.MagicMock(return_value=True)
         assert m.set_admin_state(False)
-        midplane_ips = {
-            "dpu0": "169.254.200.1",
-            "dpu1": "169.254.200.2",
-            "dpu2": "169.254.200.3",
-            "dpu3": "169.254.200.4"
-        }
-        def get_midplane_ip(DB_NAME, _hash, key):
-            dpu_name = _hash.split("|")[-1]
-            return midplane_ips.get(dpu_name)
-        mock_get.side_effect = get_midplane_ip
-        assert m.get_midplane_ip() == "169.254.200.4"
-        assert m.midplane_ip == "169.254.200.4"
-        mock_get.assert_called_with('CONFIG_DB', 'DHCP_SERVER_IPV4_PORT|bridge-midplane|dpu3', 'ips@')
         m1 = DpuModule(2)
-        assert m1.get_midplane_ip() == "169.254.200.3"
-        assert m1.midplane_ip == "169.254.200.3"
-        mock_get.assert_called_with('CONFIG_DB', 'DHCP_SERVER_IPV4_PORT|bridge-midplane|dpu2', 'ips@')
-        mock_get.reset_mock()
-        mock_get.return_value = None
-        mock_get.side_effect = None
-        # We check for the IP only once in CONFIG_DB after initialization
         assert m.get_midplane_ip() == "169.254.200.4"
-        mock_get.assert_not_called()
-        m.midplane_ip = None
-        m1.midplane_ip = None
-        assert not m.get_midplane_ip()
-        assert not m1.get_midplane_ip()
-        mock_get.side_effect = get_midplane_ip
+        assert m1.get_midplane_ip() == "169.254.200.3"
         with patch.object(m, '_is_midplane_up', ) as mock_midplane_m, \
              patch.object(m1, '_is_midplane_up',) as mock_midplane_m1:
             mock_midplane_m.return_value = True
             mock_midplane_m1.return_value = True
-            m.midplane_ip = None
-            midplane_ips["dpu3"] = "169.254.200.244"
-            command = ['ping', '-c', '1', '-W', '1', "169.254.200.244"]
+            command = ['ping', '-c', '1', '-W', '1', "169.254.200.4"]
             mock_call.return_value = 0
             assert m.is_midplane_reachable()
             mock_call.assert_called_with(command, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL)
@@ -343,12 +316,13 @@ def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_fun
                 return 1
             else:
                 return 0
-        file_name_list = ['reset_aux_pwr_or_reload', 'reset_comex_pwr_fail', 'reset_from_main_board', 'reset_dpu_thermal', 'None']
+        file_name_list = ['reset_aux_pwr_or_reload', 'reset_comex_pwr_fail', 'reset_from_main_board', 'reset_dpu_thermal', 'reset_pwr_off', 'None']
         reboot_cause_list = [
             (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'power auxiliary outage or reload'),
             (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'Power failed to comex module'),
             (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, 'Reset from Main board'),
             (ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER, 'Thermal shutdown of the DPU'),
+            (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, 'Reset due to Power off'),
             (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, ''),
         ]
         with patch("sonic_platform.utils.read_int_from_file", wraps=mock_read_int_from_file):
@@ -369,9 +343,24 @@ def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_fun
             assert m1._is_midplane_up()
             assert m2._is_midplane_up()
             assert m3._is_midplane_up()
-            assert m1.get_pci_bus_info() == pl_data["dpu0"]['bus_info']
-            assert m2.get_pci_bus_info() == pl_data["dpu1"]['bus_info']
-            assert m3.get_pci_bus_info() == pl_data["dpu2"]['bus_info']
+            
+            # Test get_pci_bus_info function
+            with patch.object(m1.dpuctl_obj, "get_pci_dev_path") as mock_get_pci_dev_path:
+                mock_get_pci_dev_path.return_value = ["0000:08:00.0", "0000:09:00.0"]
+                # First call should get the bus info from dpuctl_obj
+                assert m1.get_pci_bus_info() == ["0000:08:00.0", "0000:09:00.0"]
+                mock_get_pci_dev_path.assert_called_once()
+                # Second call should use cached value
+                assert m1.get_pci_bus_info() == ["0000:08:00.0", "0000:09:00.0"]
+                # Should not call get_pci_dev_path again
+                mock_get_pci_dev_path.assert_called_once()
+
+                # Test with a different module
+                with patch.object(m2.dpuctl_obj, "get_pci_dev_path") as mock_get_pci_dev_path2:
+                    mock_get_pci_dev_path2.return_value = ["0000:09:00.0", "0000:0A:00.0"]
+                    assert m2.get_pci_bus_info() == ["0000:09:00.0", "0000:0A:00.0"]
+                    mock_get_pci_dev_path2.assert_called_once()
+
             with pytest.raises(RuntimeError):
                 m4._is_midplane_up()
                 m4.get_pci_bus_info()
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_pcie.py b/platform/mellanox/mlnx-platform-api/tests/test_pcie.py
index 781fd74fe9f..050166705cd 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_pcie.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_pcie.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2023-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -30,15 +31,25 @@
 
 
 class TestPcie:
+    def setup_method(self):
+        os.environ['UNITTEST'] = '1'
+
+    def teardown_method(self):
+        if 'UNITTEST' in os.environ:
+            del os.environ['UNITTEST']
+
     @mock.patch('sonic_platform.pcie.Pcie._create_device_id_to_bus_map', mock.MagicMock())
     @mock.patch('sonic_platform.pcie.Pcie.load_config_file', mock.MagicMock())
+    @mock.patch('sonic_platform.pcie.Pcie.get_dpu_pcie_devices', mock.MagicMock(return_value=[]))
     def test_get_pcie_check(self):
         p = Pcie('')
         p._device_id_to_bus_map = {}
         p.confInfo = [
             {
                 'id': '1f0b',
+                'name': 'Some other device',
                 'dev': '00',
+                'bus': '00',
                 'fn': '00'
             }
         ]
@@ -54,8 +65,116 @@ def test_get_pcie_check(self):
         info = p.get_pcie_check()
         assert info[0]['result'] == 'Passed'
 
+    @mock.patch('sonic_platform.pcie.Pcie.load_config_file', mock.MagicMock())
+    @mock.patch('sonic_platform.pcie.Pcie.get_dpu_pcie_devices', mock.MagicMock(return_value=['0000:02:00.0']))
+    def test_get_pcie_check_bluefield_detaching(self):
+        p = Pcie('')
+        p.confInfo = [
+            {
+                'id': 'c2d5',  # BULEFIELD_SOC_ID
+                'bus': '02',
+                'dev': '00',
+                'fn': '0'
+            }
+        ]
+        # Mock the DB response
+        mock_db_instance = mock.MagicMock()
+        mock_db_instance.hgetall.return_value = {'dpu_state': 'detaching'}
+        p.state_db = mock_db_instance
+        info = p.get_pcie_check()
+        assert len(info) == 0
+        # Verify the correct key was used
+        expected_key = f"PCIE_DETACH_INFO|0000:02:00.0"
+        mock_db_instance.hgetall.assert_called_with(expected_key)
+
+    @mock.patch('sonic_platform.pcie.Pcie.load_config_file', mock.MagicMock())
+    @mock.patch('sonic_platform.pcie.Pcie.get_dpu_pcie_devices', mock.MagicMock(return_value=['0000:03:00.0']))
+    def test_get_pcie_check_bluefield_not_detaching(self):
+        p = Pcie('')
+        p.confInfo = [
+            {
+                'id': 'a2dc',  # BLUEFIELD_CONNECTX_ID
+                'bus': '03',
+                'dev': '00',
+                'fn': '0'
+            }
+        ]
+        mock_db_instance = mock.MagicMock()
+        mock_db_instance.hgetall.return_value = {'dpu_state': 'attached'}
+        p.state_db = mock_db_instance
+
+        # Test when check_pcie_sysfs returns False
+        p.check_pcie_sysfs = mock.MagicMock(return_value=False)
+        info = p.get_pcie_check()
+        assert len(info) == 1
+        assert info[0]['result'] == 'Failed'
+
+        # Test when check_pcie_sysfs returns True
+        p.check_pcie_sysfs = mock.MagicMock(return_value=True)
+        info = p.get_pcie_check()
+        assert len(info) == 1
+        assert info[0]['result'] == 'Passed'
+
+    @mock.patch('sonic_platform.pcie.Pcie.load_config_file', mock.MagicMock())
+    @mock.patch('sonic_platform.pcie.Pcie.get_dpu_pcie_devices', mock.MagicMock(return_value=[]))
+    def test_get_pcie_check_bluefield_db_error(self):
+        p = Pcie('')
+        p.confInfo = [
+            {
+                'id': 'c2d5',  # BULEFIELD_SOC_ID
+                'bus': '02',
+                'dev': '00',
+                'fn': '0'
+            }
+        ]
+        # Mock the DB to raise an exception
+        mock_db_instance = mock.MagicMock()
+        mock_db_instance.hgetall.side_effect = Exception("DB Error")
+        p.state_db = mock_db_instance
+        info = p.get_pcie_check()
+        assert info[0]['result'] == 'Failed'
+
+    @mock.patch('sonic_platform.pcie.Pcie.load_config_file', mock.MagicMock())
+    @mock.patch('sonic_platform.pcie.Pcie.get_dpu_pcie_devices', mock.MagicMock(return_value=[]))
+    def test_get_pcie_check_non_dpu_device(self):
+        p = Pcie('')
+        p.dpu_pcie_devices = []
+        p.confInfo = [
+            {
+                'id': '1f0b',
+                'bus': '01',
+                'dev': '00',
+                'fn': '00'
+            }
+        ]
+        p._device_id_to_bus_map = {'1f0b': '01'}
+        p.check_pcie_sysfs = mock.MagicMock(return_value=True)
+        info = p.get_pcie_check()
+        assert len(info) == 1
+        assert info[0]['result'] == 'Passed'
+
+    @mock.patch('sonic_platform.pcie.Pcie.load_config_file', mock.MagicMock())
+    @mock.patch('sonic_platform.pcie.Pcie.get_dpu_pcie_devices', mock.MagicMock(return_value=[]))
+    def test_get_pcie_check_device_not_in_map(self):
+        p = Pcie('')
+        p.dpu_pcie_devices = []
+        p.confInfo = [
+            {
+                'id': '1f0b',
+                'name': 'Some other device',
+                'dev': '00',
+                'bus': '01',
+                'fn': '00'
+            }
+        ]
+        p._device_id_to_bus_map = {}
+        info = p.get_pcie_check()
+        assert len(info) == 1
+        assert info[0]['result'] == 'Failed'
+
     @mock.patch('sonic_platform.pcie.os.listdir')
     @mock.patch('sonic_platform.pcie.Pcie.load_config_file', mock.MagicMock())
+    @mock.patch('sonic_platform.pcie.Pcie.get_dpu_pcie_devices', mock.MagicMock(return_value=[]))
     def test_create_device_id_to_bus_map(self, mock_dir):
         p = Pcie('')
         assert not p._device_id_to_bus_map
@@ -65,3 +184,37 @@ def test_create_device_id_to_bus_map(self, mock_dir):
         with mock.patch('sonic_platform.pcie.open', mock_os_open):
             p._create_device_id_to_bus_map()
             assert p._device_id_to_bus_map == {'23':'01'}
+
+    @mock.patch('sonic_platform.pcie.Pcie.load_config_file', mock.MagicMock())
+    @mock.patch('sonic_platform.pcie.DeviceDataManager.get_dpu_count')
+    @mock.patch('sonic_platform.pcie.DeviceDataManager.get_dpu_interface')
+    def test_get_dpu_pcie_devices_no_dpu(self, mock_get_interface, mock_get_count):
+        mock_get_count.return_value = 0
+        p = Pcie('')
+        result = p.get_dpu_pcie_devices()
+        assert result == []
+        mock_get_interface.assert_not_called()
+
+    @mock.patch('sonic_platform.pcie.Pcie.load_config_file', mock.MagicMock())
+    @mock.patch('sonic_platform.pcie.DeviceDataManager.get_dpu_count')
+    @mock.patch('sonic_platform.pcie.DeviceDataManager.get_dpu_interface')
+    def test_get_dpu_pcie_devices_with_dpu(self, mock_get_interface, mock_get_count):
+        p = Pcie('')
+        mock_get_count.return_value = 1
+        mock_get_interface.return_value = '0000:01:00.0'
+        mock_get_interface.reset_mock()
+        result = p.get_dpu_pcie_devices()
+        assert result == ['0000:01:00.0', '0000:01:00.0'] # 1 DPU, 2 interfaces
+        assert mock_get_interface.call_count == 2
+
+    @mock.patch('sonic_platform.pcie.Pcie.load_config_file', mock.MagicMock())
+    @mock.patch('sonic_platform.pcie.DeviceDataManager.get_dpu_count')
+    @mock.patch('sonic_platform.pcie.DeviceDataManager.get_dpu_interface')
+    def test_get_dpu_pcie_devices_missing_interface(self, mock_get_interface, mock_get_count):
+        p = Pcie('')
+        mock_get_count.return_value = 1
+        mock_get_interface.reset_mock()
+        mock_get_interface.side_effect = ['0000:01:00.0', None]  # Second interface is None
+        result = p.get_dpu_pcie_devices()
+        assert result == []
+        assert mock_get_interface.call_count == 2
\ No newline at end of file
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index 147f14a1f10..a3efb395bce 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -1,6 +1,6 @@
 #
 # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Copyright (c) 2019-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -339,6 +339,7 @@ def test_get_temperature(self, mock_read, mock_exists):
 
     def test_get_temperature_threshold(self):
         sfp = SFP(0)
+        sfp.reinit_if_sn_changed = mock.MagicMock(return_value=True)
         sfp.is_sw_control = mock.MagicMock(return_value=True)
 
         mock_api = mock.MagicMock()
@@ -354,10 +355,18 @@ def test_get_temperature_threshold(self):
         from sonic_platform_base.sonic_xcvr.fields import consts
         mock_api.get_transceiver_thresholds_support.return_value = True
         mock_api.xcvr_eeprom = mock.MagicMock()
-        mock_api.xcvr_eeprom.read = mock.MagicMock(return_value={
-            consts.TEMP_HIGH_ALARM_FIELD: 85.0,
-            consts.TEMP_HIGH_WARNING_FIELD: 75.0
-        })
+        
+        def mock_read(field):
+            if field == consts.TEMP_HIGH_ALARM_FIELD:
+                return 85.0
+            elif field == consts.TEMP_HIGH_WARNING_FIELD:
+                return 75.0
+    
+        mock_api.xcvr_eeprom.read = mock.MagicMock(side_effect=mock_read)
+        assert sfp.get_temperature_warning_threshold() == 75.0
+        assert sfp.get_temperature_critical_threshold() == 85.0
+        
+        sfp.reinit_if_sn_changed.return_value = False
         assert sfp.get_temperature_warning_threshold() == 75.0
         assert sfp.get_temperature_critical_threshold() == 85.0
 
@@ -537,3 +546,39 @@ def test_set_lpmode(self, mock_read_int, mock_write):
 
         assert sfp.set_lpmode(True)
         mock_write.assert_called_with('/sys/module/sx_core/asic0/module0/power_mode_policy', '3')
+
+    @mock.patch('sonic_platform.sfp.SfpOptoeBase.get_temperature')
+    @mock.patch('sonic_platform.utils.read_int_from_file')
+    def test_get_temperature_info(self, mock_read_int, mock_super_get_temperature):
+        sfp = SFP(0)
+        sfp.reinit_if_sn_changed = mock.MagicMock(return_value=True)
+        sfp.is_sw_control = mock.MagicMock(return_value=False)
+        mock_api = mock.MagicMock()
+        mock_api.get_transceiver_thresholds_support = mock.MagicMock(return_value=True)
+        mock_api.xcvr_eeprom = mock.MagicMock()
+        from sonic_platform_base.sonic_xcvr.fields import consts
+
+        def mock_read(field):
+            if field == consts.TEMP_HIGH_ALARM_FIELD:
+                return 85.0
+            elif field == consts.TEMP_HIGH_WARNING_FIELD:
+                return 75.0
+
+        mock_api.xcvr_eeprom.read = mock.MagicMock(side_effect=mock_read)
+        sfp.get_xcvr_api = mock.MagicMock(return_value=mock_api)
+        assert sfp.get_temperature_info() == (False, None, None, None)
+
+        sfp.is_sw_control.return_value = True
+        mock_super_get_temperature.return_value = 58.0
+        assert sfp.get_temperature_info() == (True, 58.0, 75.0, 85.0)
+        
+        mock_api.get_transceiver_thresholds_support.return_value = None
+        assert sfp.get_temperature_info() == (True, 58.0, None, None)
+        
+        mock_api.get_transceiver_thresholds_support.return_value = False
+        assert sfp.get_temperature_info() == (True, 58.0, 0.0, 0.0)
+        
+        sfp.reinit_if_sn_changed.return_value = False
+        assert sfp.get_temperature_info() == (True, 58.0, 75.0, 85.0)
+        sfp.is_sw_control.side_effect = Exception('')
+        assert sfp.get_temperature_info() == (False, None, None, None)
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py
index 2f39b1cd1a8..fef7e081fd4 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py
@@ -40,7 +40,7 @@ def test_updater_init(self, mock_dpus_data, mock_management_mode, mock_chassis_i
             # Host mgmt mode, no DPUs are used for init
             mgr = ThermalManager()
             mgr.initialize()
-            mock_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2'])
+            mock_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2'], update_asic=False)
             mgr.deinitialize()
             mgr.thermal_updater_task.stop.assert_called_once()
             # Not initialized if no DPUs and not in host mgmt mode
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py
index 1d6f523782a..2b77f5db1ec 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py
@@ -95,14 +95,12 @@ def test_update_module(self):
         mock_sfp = mock.MagicMock()
         mock_sfp.sdk_index = 10
         mock_sfp.get_presence = mock.MagicMock(return_value=True)
-        mock_sfp.get_temperature = mock.MagicMock(return_value=55.0)
-        mock_sfp.get_temperature_warning_threshold = mock.MagicMock(return_value=70.0)
-        mock_sfp.get_temperature_critical_threshold = mock.MagicMock(return_value=80.0)
+        mock_sfp.get_temperature_info = mock.MagicMock(return_value=(True, 55.0, 70.0, 80.0))
         updater = ThermalUpdater([mock_sfp])
         updater.update_module()
         hw_management_independent_mode_update.thermal_data_set_module.assert_called_once_with(0, 11, 55000, 80000, 70000, 0)
 
-        mock_sfp.get_temperature = mock.MagicMock(return_value=0.0)
+        mock_sfp.get_temperature_info = mock.MagicMock(return_value=(True, 0.0, 0.0, 0.0))
         hw_management_independent_mode_update.reset_mock()
         updater.update_module()
         hw_management_independent_mode_update.thermal_data_set_module.assert_called_once_with(0, 11, 0, 0, 0, 0)
diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk
index bf5795c175d..5e1bcbbdddb 100644
--- a/platform/mellanox/mlnx-sai.mk
+++ b/platform/mellanox/mlnx-sai.mk
@@ -1,6 +1,6 @@
 # Mellanox SAI
 
-MLNX_SAI_VERSION = SAIBuild2411.2405.30.1
+MLNX_SAI_VERSION = SAIBuild2505.33.0.0
 MLNX_SAI_ASSETS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins
 MLNX_SAI_ASSETS_RELEASE_TAG = sai-$(MLNX_SAI_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH)
 MLNX_SAI_ASSETS_URL = $(MLNX_SAI_ASSETS_GITHUB_URL)/releases/download/$(MLNX_SAI_ASSETS_RELEASE_TAG)
diff --git a/platform/mellanox/modules b/platform/mellanox/modules
new file mode 100644
index 00000000000..bc98f03345a
--- /dev/null
+++ b/platform/mellanox/modules
@@ -0,0 +1 @@
+sha512
diff --git a/platform/mellanox/non-upstream-patches/external-changes.patch b/platform/mellanox/non-upstream-patches/external-changes.patch
index d722e157f1c..4e2083896c7 100644
--- a/platform/mellanox/non-upstream-patches/external-changes.patch
+++ b/platform/mellanox/non-upstream-patches/external-changes.patch
@@ -1,7 +1,38 @@
 
 --- a/patch/kconfig-inclusions
 +++ b/patch/kconfig-inclusions
-@@ -126,6 +126,10 @@
+@@ -24,10 +24,10 @@
+ CONFIG_GPIO_SYSFS=y
+ CONFIG_GPIO_SCH=m
+ # For Dell Z9100
+-CONFIG_I2C_MUX_PCA954x=m
++CONFIG_I2C_MUX_PCA954x=y
+ # For Ingrasys S9100
+ CONFIG_I2C_GPIO=m
+-CONFIG_GPIO_PCA953X=m
++CONFIG_GPIO_PCA953X=y
+ # For Inventec d7032
+ CONFIG_GPIO_ICH=m
+ # For mitac ly1200
+@@ -48,7 +48,7 @@
+ CONFIG_SERIAL_8250_DW=y
+ CONFIG_HW_RANDOM_AMD=m
+ CONFIG_I2C_CHARDEV=m
+-CONFIG_I2C_MUX=m
++CONFIG_I2C_MUX=y
+ CONFIG_I2C_SMBUS=m
+ CONFIG_I2C_I801=m
+ CONFIG_I2C_DESIGNWARE_PCI=m
+@@ -80,7 +80,7 @@
+ CONFIG_NET_DEVLINK=y
+ CONFIG_I2C_MUX_REG=m
+ CONFIG_I2C_MUX_MLXCPLD=m
+-CONFIG_REGMAP_I2C=m
++CONFIG_REGMAP_I2C=y
+ CONFIG_IIO_SYSFS_TRIGGER=m
+ CONFIG_NVME_HWMON=y
+ CONFIG_MLXSW_CORE_HWMON=y
+@@ -129,6 +129,10 @@
  CONFIG_EDAC_AMD64=m
  CONFIG_AMD_XGBE_DCB=y
  CONFIG_SENSORS_ISL68137=m
diff --git a/platform/mellanox/rshim.mk b/platform/mellanox/rshim.mk
index f621624b6fd..845263e663d 100644
--- a/platform/mellanox/rshim.mk
+++ b/platform/mellanox/rshim.mk
@@ -15,7 +15,7 @@
 # limitations under the License.
 #
 
-MLNX_RSHIM_DRIVER_VERSION = 2.0.40
+MLNX_RSHIM_DRIVER_VERSION = 2.3.8
 MLNX_RSHIM_ASSETS_GITHUB_URL = https://github.com/Mellanox/sonic-bluefield-packages
 MLNX_RSHIM_ASSETS_RELEASE_TAG = rshim-$(MLNX_RSHIM_DRIVER_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH)
 MLNX_RSHIM_ASSETS_URL = $(MLNX_RSHIM_ASSETS_GITHUB_URL)/releases/download/$(MLNX_RSHIM_ASSETS_RELEASE_TAG)
diff --git a/platform/mellanox/rshim/Makefile b/platform/mellanox/rshim/Makefile
index 4a8099e61a3..fb80246cf1c 100644
--- a/platform/mellanox/rshim/Makefile
+++ b/platform/mellanox/rshim/Makefile
@@ -19,7 +19,7 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -ex
 
-SRPMS_URL = $(MLNX_BSD_RSHIM_SRC_BASE_URL)/build/install/distro/SRPMS/
+SRPMS_URL = $(MLNX_BSD_RSHIM_SRC_BASE_URL)/install/distro/SRPMS/
 RSHIM_URL = $(shell lynx --listonly --nonumbers -dump $(SRPMS_URL) | grep rshim)
 
 $(addprefix $(DEST)/, $(MLNX_RSHIM)): $(DEST)/% :
@@ -31,7 +31,6 @@ $(addprefix $(DEST)/, $(MLNX_RSHIM)): $(DEST)/% :
 	tar xf rshim-${MLNX_RSHIM_DRIVER_VERSION}.tar.gz -C rshim_src --strip-components=1
 
 	pushd rshim_src
-	patch -p1 < ../rename_tmfifo_to_dpu.patch
 
 	# disable default systemd service
 	sed -i 's/	dh_auto_configure/	dh_auto_configure -- --with-systemdsystemunitdir=no/' debian/rules
diff --git a/platform/mellanox/rshim/files/rshim-manager.service b/platform/mellanox/rshim/files/rshim-manager.service
deleted file mode 100644
index 4998bd3ff22..00000000000
--- a/platform/mellanox/rshim/files/rshim-manager.service
+++ /dev/null
@@ -1,11 +0,0 @@
-[Unit]
-Description=Starts rshim driver for all DPUs
-After=network.target
-Wants=rshim@0.service rshim@1.service rshim@2.service rshim@3.service
-
-[Service]
-Type=oneshot
-ExecStart=/bin/true
-
-[Install]
-WantedBy=multi-user.target
diff --git a/platform/mellanox/rshim/files/rshim.sh b/platform/mellanox/rshim/files/rshim.sh
deleted file mode 100644
index caa049ffaef..00000000000
--- a/platform/mellanox/rshim/files/rshim.sh
+++ /dev/null
@@ -1,39 +0,0 @@
-#!/usr/bin/env bash
-#
-# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
-# Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-
-if [ $# -eq 0 ]; then
-    echo "Usage: $0 <index>"
-    exit 1
-fi
-
-rshim_name="rshim$1"
-pcie=$(dpumap.sh rshim2pcie $rshim_name)
-
-if [ $? -ne 0 ]; then
-    echo "Error: Invalid rshim index $1"
-    exit 1
-fi
-
-
-if ! lspci -D | grep $pcie > /dev/null; then
-    echo "PCIE device $pcie is not available"
-    exit 1
-fi
-
-/usr/sbin/rshim -i $1 -d pcie-$pcie
diff --git a/platform/mellanox/rshim/files/rshim@.service b/platform/mellanox/rshim/files/rshim@.service
deleted file mode 100644
index a3e26418d7e..00000000000
--- a/platform/mellanox/rshim/files/rshim@.service
+++ /dev/null
@@ -1,13 +0,0 @@
-[Unit]
-Description=rshim driver for DPU %I
-Documentation=man:rshim(8)
-After=network.target
-
-[Service]
-Restart=always
-Type=forking
-ExecStart=/usr/bin/rshim.sh %i
-KillMode=control-group
-
-[Install]
-WantedBy=multi-user.target
diff --git a/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch b/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch
deleted file mode 100644
index f01880d0c1f..00000000000
--- a/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch
+++ /dev/null
@@ -1,13 +0,0 @@
-diff --git a/src/rshim_net.c b/src/rshim_net.c
-index a9e8663..7214df2 100644
---- a/src/rshim_net.c
-+++ b/src/rshim_net.c
-@@ -263,7 +263,7 @@ int rshim_net_init(rshim_backend_t *bd)
-   char ifname[IFNAMSIZ];
-   int rc, fd[2];
- 
--  snprintf(ifname, sizeof(ifname), "tmfifo_net%d", bd->index);
-+  snprintf(ifname, sizeof(ifname), "dpu%d", bd->index);
-   bd->net_fd = rshim_if_open(ifname, bd->index);
- 
-   if (bd->net_fd < 0)
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index 222ccc8b97f..a709b2bda02 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2016-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,7 +14,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
-MLNX_SDK_VERSION = 4.7.2202
+MLNX_SDK_VERSION = 4.8.1036
 MLNX_SDK_ISSU_VERSION = 101
 
 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers
diff --git a/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.service b/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.service
new file mode 100644
index 00000000000..b251f13eae4
--- /dev/null
+++ b/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=Manage the DPU udev rules
+After=systemd-udevd.service
+Requires=systemd-udevd.service
+
+[Service]
+Type=oneshot
+RemainAfterExit=yes
+ExecStart=/usr/bin/dpu-udev-manager.sh start
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.sh b/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.sh
new file mode 100755
index 00000000000..91c06d89d31
--- /dev/null
+++ b/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.sh
@@ -0,0 +1,40 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+declare -r udev_file="/etc/udev/rules.d/92-midplane-intf.rules"
+declare -r platform=$(grep 'onie_platform=' /host/machine.conf | cut -d '=' -f 2)
+declare -r platform_json="/usr/share/sonic/device/$platform/platform.json"
+
+declare -r query='.DPUS | to_entries[] | "\(.key) \(.value.bus_info)"'
+
+do_start() {
+    jq -r "$query" $platform_json | while read -r dpu bus_info; do
+        echo SUBSYSTEM==\"net\", ACTION==\"add\", KERNELS==\"$bus_info\", NAME=\"$dpu\"
+    done > $udev_file
+}
+
+case "$1" in
+    start)
+        do_start
+        ;;
+    *)
+        echo "Error: Invalid argument."
+        echo "Usage: $0 {start}"
+        exit 1
+        ;;
+esac
diff --git a/platform/mellanox/smartswitch/dpuctl/dpu.conf b/platform/mellanox/smartswitch/dpuctl/dpu.conf
deleted file mode 100644
index b0dcbfee98e..00000000000
--- a/platform/mellanox/smartswitch/dpuctl/dpu.conf
+++ /dev/null
@@ -1 +0,0 @@
-DARK_MODE=true
diff --git a/platform/mellanox/smartswitch/dpuctl/dpuctl.service b/platform/mellanox/smartswitch/dpuctl/dpuctl.service
deleted file mode 100644
index e914d3e7abe..00000000000
--- a/platform/mellanox/smartswitch/dpuctl/dpuctl.service
+++ /dev/null
@@ -1,12 +0,0 @@
-[Unit]
-Description=Controle DPUs state
-Requires=hw-management.service
-After=hw-management.service
-
-[Service]
-Type=oneshot
-RemainAfterExit=yes
-ExecStart=/usr/bin/dpuctl.sh start
-
-[Install]
-WantedBy=multi-user.target
diff --git a/platform/mellanox/smartswitch/dpuctl/dpuctl.sh b/platform/mellanox/smartswitch/dpuctl/dpuctl.sh
deleted file mode 100644
index c5393aa1f6d..00000000000
--- a/platform/mellanox/smartswitch/dpuctl/dpuctl.sh
+++ /dev/null
@@ -1,60 +0,0 @@
-#!/usr/bin/env bash
-#
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-
-# By default the dark mode is enabled
-DARK_MODE=true
-
-bf3_pci_id="15b3:c2d5"
-dpu2pcie[0]="08:00.0"
-dpu2pcie[1]="07:00.0"
-dpu2pcie[2]="01:00.0"
-dpu2pcie[3]="02:00.0"
-
-if [[ -f /etc/mlnx/dpu.conf ]]; then
-    . /etc/mlnx/dpu.conf
-fi
-
-do_start() {
-    if [[ $DARK_MODE == "true" ]]; then
-        # By default all the DPUs are on. Power off the DPUs when is dark mode is required.
-
-        for dpu_id in ${!dpu2pcie[@]}; do
-            pci_id=$(lspci -n | grep "${dpu2pcie[$dpu_id]}" | awk '{print $3}')
-            if [[ $pci_id == $bf3_pci_id ]]; then
-                dpuctl dpu-power-off dpu${dpu_id} &
-            fi
-        done
-
-        # Wait for all dpuctl processes to finish
-        wait
-    else
-        # Start RSHIM per each DPU to create interfaces
-        systemctl start rshim-manager.service
-    fi
-}
-
-case "$1" in
-    start)
-        do_start
-        ;;
-    *)
-        echo "Error: Invalid argument."
-        echo "Usage: $0 {start}"
-        exit 1
-        ;;
-esac
diff --git a/platform/mellanox/smartswitch/dpumap.sh b/platform/mellanox/smartswitch/dpumap.sh
deleted file mode 100755
index 34ed184190d..00000000000
--- a/platform/mellanox/smartswitch/dpumap.sh
+++ /dev/null
@@ -1,79 +0,0 @@
-#!/bin/bash
-#
-# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
-# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
-# Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-
-# read SONiC immutable variables
-[ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment
-PLATFORM=${PLATFORM:-`sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' platform`}
-PLATFORM_JSON=/usr/share/sonic/device/$PLATFORM/platform.json
-
-usage(){
-    echo "Usage: $0 {dpu2pcie|dpu2rshim|rshim2dpu|pcie2dpu|rshim2pcie|pcie2rshim} name"
-}
-
-validate_platform(){
-    if [[ ! -f $PLATFORM_JSON ]]; then
-        echo "platform.json file not found. Exiting script"
-        exit 1
-    fi
-}
-
-
-validate_platform
-case $1 in
-    "dpu2rshim")
-	jq_query='.DPUS[$dpu].rshim_info'
-	var="dpu"
-	;;
-    "dpu2pcie")
-	jq_query='.DPUS[$dpu].bus_info'
-	var="dpu"
-	;;
-    "pcie2dpu")
-	jq_query='.DPUS | to_entries[] | select(.value.bus_info == $bus) | .key'
-	var="bus"
-	;;
-    "pcie2rshim")
-	jq_query='.DPUS | to_entries[] | select(.value.bus_info == $bus) | .value.rshim_info'
-	var="bus"
-	;;
-    "rshim2dpu")
-	jq_query='.DPUS | to_entries[] | select(.value.rshim_info == $rshim) | .key'
-	var="rshim"
-	;;
-    "rshim2pcie")
-	jq_query='.DPUS | to_entries[] | select(.value.rshim_info == $rshim) | .value.bus_info'
-	var="rshim"
-	;;
-    *)
-        echo "Invalid usage of script!"
-        usage
-        exit 1
-esac
-
-IFS=',' read -r -a identifier_array <<< "$2"
-for identifier in "${identifier_array[@]}"; do
-	op=$(jq -r --arg "$var" "$identifier" "$jq_query" "$PLATFORM_JSON")
-	if [[ "$op" != "null" ]]; then
-		echo "$op"
-	else
-		echo "Invald entry! $identifier"
-		exit 1
-	fi
-done
-
diff --git a/platform/mellanox/sonic-bfb-installer.sh b/platform/mellanox/sonic-bfb-installer.sh
index 39c5bfe4a04..8f25f11acd3 100755
--- a/platform/mellanox/sonic-bfb-installer.sh
+++ b/platform/mellanox/sonic-bfb-installer.sh
@@ -16,65 +16,306 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
+
+
+# Lock file to prevent multiple instances
+LOCK_FILE="/var/lock/sonic-bfb-installer.lock"
+LOCK_FD=200
+
+# Function to log messages with priority
+log() {
+    local priority=$1
+    local message=$2
+
+    # Always log to syslog
+    logger -p "$priority" -t "$(basename "$0")" "$message"
+
+    echo "$message"
+}
+
+# Helper functions for different log levels
+log_error() {
+    log "error" "$1"
+}
+
+log_warning() {
+    log "warning" "$1" 
+}
+
+log_info() {
+    log "info" "$1"
+}
+
+log_debug() {
+    log "debug" "$1"
+}
+
+# Function to acquire lock
+acquire_lock() {
+    eval "exec $LOCK_FD>'$LOCK_FILE'"
+    if ! flock -n $LOCK_FD; then
+        log_error "Another instance of $(basename "$0") is already running"
+        exit 1
+    fi
+    echo $$ > "$LOCK_FILE"
+}
+
+# Function to release lock
+release_lock() {
+    flock -u $LOCK_FD
+    eval "exec $LOCK_FD>&-"
+    rm -f "$LOCK_FILE"
+}
+
+# Acquire lock at script start
+acquire_lock
+trap 'release_lock' EXIT
+
+[ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment
+PLATFORM=${PLATFORM:-`sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' platform`}
+PLATFORM_JSON=/usr/share/sonic/device/$PLATFORM/platform.json
+
 declare -A rshim2dpu
+declare -r bfsoc_dev_id="15b3:c2d5"
+declare -r cx7_dev_id="15b3:a2dc"
+
+# Local functions to replace dpumap.sh
+rshim2dpu_map() {
+    local rshim=$1
+    # Extract DPU name from platform.json for the given rshim
+    local dpu=$(jq -r --arg rshim "$rshim" '.DPUS | to_entries[] | select(.value.rshim_info == $rshim) | .key' "$PLATFORM_JSON")
+    if [ -z "$dpu" ]; then
+        return 1
+    fi
+    echo "$dpu"
+    return 0
+}
+
+dpu2rshim_map() {
+    local dpu=$1
+    # Extract rshim bus info from platform.json for the given DPU
+    local rshim=$(jq -r --arg dpu "$dpu" '.DPUS[$dpu].rshim_info // empty' "$PLATFORM_JSON")
+    if [ -z "$rshim" ]; then
+        return 1
+    fi
+    echo "$rshim"
+    return 0
+}
+
+list_dpus_map() {
+    # Extract DPU names from platform.json
+    local dpus=$(jq -r '.DPUS | keys[]' "$PLATFORM_JSON")
+    if [ -z "$dpus" ]; then
+        return 1
+    fi
+    echo "$dpus"
+    return 0
+}
 
-command_name="sonic-bfb-installer.sh"
 usage(){
-    echo "Syntax: $command_name -b|--bfb <BFB_Image_Path> --rshim|-r <rshim1,..rshimN> --verbose|-v --config|-c <Options> --help|h"
+    echo "Syntax: $(basename "$0") -b|--bfb <BFB_Image_Path> --rshim|-r <rshim1,..rshimN> --dpu|-d <dpu1,..dpuN> --verbose|-v --config|-c <Options> --help|-h"
     echo "Arguments:"
-    echo "-b			Provide custom path for bfb image"
-    echo "-r			Install only on DPUs connected to rshim interfaces provided, mention all if installation is requried on all connected DPUs"
-    echo "-v			Verbose installation result output"
-    echo "-c			Config file"
-    echo "-h		        Help"
+    echo "-b|--bfb		Provide custom path for bfb image"
+    echo "-r|--rshim		Install only on DPUs connected to rshim interfaces provided, mention all if installation is required on all connected DPUs"
+    echo "-d|--dpu		Install on specified DPUs, mention all if installation is required on all connected DPUs"
+    echo "-v|--verbose		Verbose installation result output"
+    echo "-c|--config		Config file"
+    echo "-h|--help		Help"
 }
 WORK_DIR=`mktemp -d -p "$DIR"`
 
-bfb_install_call(){
-    #Example:sudo bfb-install -b <full path to image> -r rshim<id>
-    local appendix=$4
+validate_platform(){
+    if [[ ! -f $PLATFORM_JSON ]]; then
+        log_error "platform.json file not found. Exiting script"
+        exit 1
+    fi
+}
+
+# Function to detect PCI device for a DPU and device ID
+detect_pcie() {
+    local dpu=$1
+    local device_id=$2
+    local bus_info rshim_bus_info
+
+    # Get bus_info and rshim_bus_info for this DPU from platform.json
+    bus_info=$(jq -r --arg dpu "$dpu" '.DPUS[$dpu].bus_info // empty' "$PLATFORM_JSON")
+    rshim_bus_info=$(jq -r --arg dpu "$dpu" '.DPUS[$dpu].rshim_bus_info // empty' "$PLATFORM_JSON")
+
+    # Check if bus_info exists and device matches device ID
+    if [ -n "$bus_info" ] && lspci -D -n | grep "${bus_info}" | grep -q "${device_id}"; then
+        echo "$bus_info"
+        return 0
+    fi
+
+    # Check if rshim_bus_info exists and device matches device ID
+    if [ -n "$rshim_bus_info" ] && lspci -D -n | grep "${rshim_bus_info}" | grep -q "${device_id}"; then
+        echo "$rshim_bus_info"
+        return 0
+    fi
+
+    return 1
+}
+
+# Function to detect the BlueField SoC PCI device for a DPU
+detect_bfsoc_pcie() {
+    local dpu=$1
+    detect_pcie "$dpu" "${bfsoc_dev_id}"
+}
+
+detect_cx_pcie() {
+    local dpu=$1
+    detect_pcie "$dpu" "${cx7_dev_id}"
+}
+
+wait_for_rshim_boot() {
     local -r rshim=$1
-    local dpu=$2
-    local bfb=$3
-    local result_file=$(mktemp "${WORK_DIR}/result_file.XXXXX")
-    if [ -z "$appendix" ]; then
-        local cmd="timeout 600s bfb-install -b $bfb -r $1"
-    else
-        local cmd="timeout 600s bfb-install -b $bfb -r $1 -c $appendix"
+    local timeout=10
+    
+    while [ ! -e "/dev/${rshim}/boot" ] && [ $timeout -gt 0 ]; do
+        sleep 1
+        ((timeout--))
+    done
+
+    if [ ! -e "/dev/${rshim}/boot" ]; then
+        log_error "$rshim: Error: Boot file did not appear after 10 seconds"
+        return 1
     fi
-    echo "Installing bfb image on DPU connected to $rshim using $cmd"
-    local indicator="$rshim:"
-    trap 'kill_ch_procs' SIGINT SIGTERM SIGHUP
-    eval "$cmd"  > >(while IFS= read -r line; do echo "$indicator $line"; done >> "$result_file") 2>&1 &
-    cmd_pid=$!
-    local total_time=600
+    return 0
+}
+
+remove_cx_pci_device() {
+    local -r rshim=$1
+    local -r dpu=$2
+    
+    # Get bus_id and rshim_bus_id for this DPU
+    local bus_id=$(detect_cx_pcie $dpu)
+
+    # Check if bus_id device exists
+    if [ -n "$bus_id" ]; then
+        if lspci -D | grep -q "$bus_id"; then
+            log_info "$rshim: Removing PCI device $bus_id"
+            echo 1 > /sys/bus/pci/devices/$bus_id/remove
+        fi
+    fi
+}
+
+monitor_installation() {
+    local -r rid=$1
+    local -r pid=$2
+    local -r total_time=$3
     local elapsed=0
-    # Interval is selected at random so all the processes can print to same line
+    
+    # Random interval between 3-10 seconds for progress updates
     local interval=$(($RANDOM%(10-3+1)+3))
-    while kill -0 $cmd_pid 2>/dev/null; do
+    
+    while kill -0 $pid 2>/dev/null; do
         sleep $interval
         elapsed=$((elapsed + interval))
-        echo -ne "\r$indicator Installing... $elapsed/$total_time seconds elapsed"
+        # Use printf with \r for proper line handling
+        printf "\r%s: Installing... %d/%d seconds elapsed" "$rid" "$elapsed" "$total_time"
         if [ $elapsed -ge $total_time ]; then
             break
         fi
     done
+    # Add newline after progress
+    printf "\n"
+}
+
+# Function to start rshim daemon
+start_rshim_daemon() {
+    local -r rid=$1
+    local -r pci_bus=$2
+    
+    if ! start-stop-daemon --start --quiet --background \
+        --make-pidfile --pidfile "/var/run/rshim_${rid}.pid" \
+        --exec /usr/sbin/rshim -- -f -i "$rid" -d "pcie-$pci_bus"; then
+        log_error "Failed to start rshim for rshim$rid"
+        return 1
+    fi
+    return 0
+}
+
+# Function to stop rshim daemon
+stop_rshim_daemon() {
+    local -r rid=$1
+    local -r pid_file="/var/run/rshim_${rid}.pid"
+    
+    # Only try to stop if pidfile exists
+    if [ -f "$pid_file" ]; then
+        start-stop-daemon --stop --quiet --pidfile "$pid_file" --remove-pidfile --retry TERM/15/KILL/5 2>/dev/null
+    fi
+    
+    return 0
+}
+
+bfb_install_call() {
+    local -r rshim=$1
+    local -r dpu=$2 
+    local -r bfb=$3
+    local -r appendix=$4
+    local -r rid=${rshim#rshim}
+    local -r result_file=$(mktemp "${WORK_DIR}/result_file.XXXXX")
+    local -r timeout_secs=1200
+    
+    # Get PCI bus info for the DPU
+    local pci_bus=$(detect_bfsoc_pcie "$dpu")
+    if [ -z "$pci_bus" ]; then
+        log_error "Error: Could not find PCI bus for DPU $dpu"
+        exit 1
+    fi
+
+    # Start rshim application
+    if ! start_rshim_daemon "$rid" "$pci_bus"; then
+        exit 1
+    fi
+    
+    # Ensure rshim is stopped on exit
+    trap "stop_rshim_daemon $rid" EXIT
+
+    # Wait for boot file and remove PCI device
+    if ! wait_for_rshim_boot "$rshim"; then
+        stop_rshim_daemon "$rid"
+        exit 1
+    fi
+    remove_cx_pci_device "$rshim" "$dpu"
+
+    # Construct bfb-install command
+    local cmd="timeout ${timeout_secs}s bfb-install -b $bfb -r $rshim"
+    if [ -n "$appendix" ]; then
+        cmd="$cmd -c $appendix"
+    fi
+    log_info "Installing bfb image on DPU connected to $rshim using $cmd"
+
+    # Run installation with progress monitoring
+    trap 'kill_ch_procs' SIGINT SIGTERM SIGHUP
+    eval "$cmd" > >(while IFS= read -r line; do printf "%s: %s\n" "$rid" "$line"; done >> "$result_file") 2>&1 &
+    local cmd_pid=$!
+
+    monitor_installation "$rid" $cmd_pid $timeout_secs
+
+    # Check installation result
     wait $cmd_pid
     local exit_status=$?
-    if [ $exit_status  -ne 0 ]; then
-        echo "$rshim: Error: Installation failed on connected DPU!"
+    if [ $exit_status -ne 0 ]; then
+        log_error "$rid: Error: Installation failed on connected DPU!"
     else
-        echo "$rshim: Installation Successful"
+        log_info "$rid: Installation Successful"
     fi
-    if [ $exit_status -ne 0 ] ||[ $verbose = true ]; then
+
+    # Show detailed output if verbose or error
+    if [ $exit_status -ne 0 ] || [ $verbose = true ]; then
         cat "$result_file"
     fi
-    echo "$rshim: Resetting DPU $dpu"
-    cmd="dpuctl dpu-reset --force $dpu"
+
+    # Stop rshim application and reset DPU
+    stop_rshim_daemon "$rid"
+    log_info "$rid: Resetting DPU $dpu"
+
+    local reset_cmd="dpuctl dpu-reset --force $dpu"
     if [[ $verbose == true ]]; then
-        cmd="$cmd -v"
+        reset_cmd="$reset_cmd -v"
     fi
-    eval $cmd
+    eval $reset_cmd
 }
 
 file_cleanup(){
@@ -84,16 +325,16 @@ file_cleanup(){
 is_url() {
     local link=$1
     if [[ $link =~ https?:// ]]; then 
-        echo "Detected URL. Downloading file"
+        log_debug "Detected URL. Downloading file"
         filename="${WORK_DIR}/sonic-nvidia-bluefield.bfb"
         curl -L -o "$filename" "$link"
         res=$?
         if test "$res" != "0"; then
-            echo "the curl command failed with: $res"
+            log_error "the curl command failed with: $res"
             exit 1
         fi
         bfb="$filename"
-        echo "bfb path changed to $bfb"
+        log_debug "bfb path changed to $bfb"
     fi
 }
 
@@ -108,7 +349,7 @@ validate_rshim(){
             fi
         done
         if [[ $found -eq 0 ]]; then
-            echo "$item1 is not detected! Please provide proper rshim interface list!"
+            log_debug "$item1 is not detected! Please provide proper rshim interface list!"
             exit 1
         fi
     done
@@ -118,9 +359,9 @@ get_mapping(){
     local provided_list=("$@")
 
     for item1 in "${provided_list[@]}"; do
-        var=$(dpumap.sh rshim2dpu $item1)
+        var=$(rshim2dpu_map "$item1")
         if [ $? -ne 0 ]; then
-            echo "$item1 does not have a valid dpu mapping!"
+            log_debug "$item1 does not have a valid dpu mapping!"
             exit 1
         fi
         rshim2dpu["$item1"]="$var"
@@ -130,132 +371,184 @@ get_mapping(){
 validate_dpus(){
     local provided_list=("$@")
     for item1 in "${provided_list[@]}"; do
-        var=$(dpumap.sh dpu2rshim $item1)
+        var=$(dpu2rshim_map "$item1")
         if [ $? -ne 0 ]; then
-            echo "$item1 does not have a valid rshim mapping!"
+            log_debug "$item1 does not have a valid rshim mapping!"
             exit 1
         fi
         rshim2dpu["$var"]="$item1"
         dev_names+=("$var")
     done
 }
+
 check_for_root(){
     if [ "$EUID" -ne 0 ]
-        then echo "Please run the script in sudo mode"
+        then log_debug "Please run the script in sudo mode" 
         exit
     fi
 }
 
-main(){
+detect_rshims_from_pci(){
+    # Get list of supported DPUs from platform.json
+    local dpu_list=$(list_dpus_map)
+    if [ $? -ne 0 ] || [ -z "$dpu_list" ]; then
+        log_debug "No supported DPUs found"
+        return 1
+    fi
+
+    # For each DPU, check if its PCI exists and get corresponding rshim
+    local detected_rshims=()
+    while read -r dpu; do
+        local pci=$(detect_bfsoc_pcie "$dpu")
+        if [ $? -eq 0 ] && [ -n "$pci" ]; then
+            detected_rshims+=($(dpu2rshim_map "$dpu"))
+        fi
+    done <<< "$dpu_list"
+
+    if [ ${#detected_rshims[@]} -eq 0 ]; then
+        log_debug "No rshim devices detected"
+        return 1
+    fi
+
+    # Return unique sorted list of detected rshim devices
+    printf '%s\n' "${detected_rshims[@]}" | sort -u
+    return 0
+}
+
+main() {
     check_for_root
-    local config=
-    while [ "$1" != "--" ]  && [ -n "$1" ]; do
-        case $1 in
-            --help|-h)
-                usage;
-                exit 0
-            ;;
-            --bfb|-b)
-                shift;
-                bfb=$1
-            ;;
-            --rshim|-r)
-                shift;
-                rshim_dev=$1
-            ;;
-            --dpu|-d)
-                shift;
-                dpus=$1
-	    ;;
-            --config|-c)
-                shift;
-                config=$1
-            ;;
-            --verbose|-v)
-                verbose=true
-            ;;
-        esac
-        shift
-    done
+    validate_platform
+
+    # Parse command line arguments
+    local config= bfb= rshim_dev= dpus= verbose=false
+    parse_arguments "$@"
+
+    # Validate BFB image
     if [ -z "$bfb" ]; then
-        echo "Error : bfb image is not provided."
+        log_debug "Error: bfb image is not provided."
         usage
         exit 1
-    else
-        is_url $bfb
     fi
+    is_url "$bfb"
+
     trap "file_cleanup" EXIT
-    dev_names_det+=($(
-        ls -d /dev/rshim? | awk -F'/' '{print $NF}'
-    ))
+
+    # Detect available rshim interfaces
+    local dev_names_det=($(detect_rshims_from_pci))
     if [ "${#dev_names_det[@]}" -eq 0 ]; then
-        echo "No rshim interfaces detected! Make sure to run the $command_name script from the host device/ switch!"
+        log_debug "No rshim interfaces detected! Make sure to run the $command_name script from the host device/switch!"
         exit 1
     fi
+
+    # Handle rshim/dpu selection
+    local dev_names=()
     if [ -z "$rshim_dev" ]; then
         if [ -z "$dpus" ]; then
-        	echo "No rshim interfaces provided!"
-        	usage
-        	exit 1
-       fi
-       if [ "$dpus" = "all" ]; then
-            rshim_dev="$dpus" 
-       else
+            log_debug "No rshim interfaces provided!"
+            usage
+            exit 1
+        fi
+        if [ "$dpus" = "all" ]; then
+            rshim_dev="all"
+        else
             IFS=',' read -ra dpu_names <<< "$dpus"
-            validate_dpus ${dpu_names[@]}
-       fi
+            validate_dpus "${dpu_names[@]}"
+        fi
     fi
 
-
     if [ "$rshim_dev" = "all" ]; then
-            dev_names=("${dev_names_det[@]}")
-            echo "${#dev_names_det[@]} rshim interfaces detected:"
-            echo "${dev_names_det[@]}"
-        else
-            if [ ${#dev_names[@]} -eq 0 ]; then
-                # If the list is not empty, the list is obtained from the DPUs
-                IFS=',' read -ra dev_names <<< "$rshim_dev"
-            fi
-            validate_rshim ${dev_names[@]}
+        dev_names=("${dev_names_det[@]}")
+        log_info "${#dev_names_det[@]} rshim interfaces detected: ${dev_names_det[*]}"
+    else
+        if [ ${#dev_names[@]} -eq 0 ]; then
+            IFS=',' read -ra dev_names <<< "$rshim_dev"
+        fi
+        validate_rshim "${dev_names[@]}"
     fi
+
     if [ ${#rshim2dpu[@]} -eq 0 ]; then
-        get_mapping ${dev_names[@]}
+        get_mapping "${dev_names[@]}"
     fi
-    # Sort list of rshim interfaces so that config is applied in a known order
-    sorted_devs=($(for i in "${dev_names[@]}"; do echo $i; done | sort))
-    if [ ! -z ${config} ]; then
-        echo "Using ${config} file/s"
+
+    # Sort devices and handle config files
+    local sorted_devs=($(printf '%s\n' "${dev_names[@]}" | sort))
+    local arr=()
+    
+    if [ -n "$config" ]; then
+        log_info "Using ${config} file/s"
         if [[ "$config" == *","* ]]; then
             IFS=',' read -r -a arr <<< "$config"
         else
-            arr=()
-            for ((i=0; i<${#dev_names[@]}; i++)); do
+            arr=("$config")
+            for ((i=1; i<${#dev_names[@]}; i++)); do
                 arr+=("$config")
             done
         fi
-        if [ ${#arr[@]} -ne ${#sorted_devs[@]} ]; then
-            echo "Length of config file list does not match the devices selected: ${sorted_devs[@]} and ${arr[@]}"
-            exit 1
-        fi
-        for i in "${!arr[@]}"
-        do
-            if [ ! -f ${arr[$i]} ]; then
-                echo "Config provided ${arr[$i]} is not a file! Please check"
-                exit 1
-            fi
-        done
+
+        validate_config_files "${sorted_devs[@]}" "${arr[@]}"
     fi
+
+    # Install BFB on each device
     trap 'kill_ch_procs' SIGINT SIGTERM SIGHUP
-    for i in "${!sorted_devs[@]}"
-    do
-        :
+    
+    for i in "${!sorted_devs[@]}"; do
         rshim_name=${sorted_devs[$i]}
         dpu_name=${rshim2dpu[$rshim_name]}
-        bfb_install_call ${rshim_name} ${dpu_name} $bfb ${arr[$i]} &
+        bfb_install_call "$rshim_name" "$dpu_name" "$bfb" "${arr[$i]}" &
     done
     wait
 }
 
+# Helper function to parse command line arguments
+parse_arguments() {
+    while [ "$1" != "--" ] && [ -n "$1" ]; do
+        case $1 in
+            --help|-h)
+                usage
+                exit 0
+                ;;
+            --bfb|-b)
+                shift
+                bfb=$1
+                ;;
+            --rshim|-r)
+                shift
+                rshim_dev=$1
+                ;;
+            --dpu|-d)
+                shift
+                dpus=$1
+                ;;
+            --config|-c)
+                shift
+                config=$1
+                ;;
+            --verbose|-v)
+                verbose=true
+                ;;
+        esac
+        shift
+    done
+}
+
+# Helper function to validate config files
+validate_config_files() {
+    local -a sorted_devs=("${@:1:${#sorted_devs[@]}}")
+    local -a arr=("${@:$((${#sorted_devs[@]}+1))}")
+
+    if [ ${#arr[@]} -ne ${#sorted_devs[@]} ]; then
+        log_debug "Length of config file list does not match the devices selected: ${sorted_devs[*]} and ${arr[*]}"
+        exit 1
+    fi
+
+    for config_file in "${arr[@]}"; do
+        if [ ! -f "$config_file" ]; then
+            log_debug "Config provided $config_file is not a file! Please check the config file path"
+            exit 1
+        fi
+    done
+}
+
 kill_all_descendant_procs() {
     local pid="$1"
     local self_kill="${2:-false}"
@@ -269,12 +562,11 @@ kill_all_descendant_procs() {
     fi
 }
 
-
 kill_ch_procs(){
-    echo ""
-    echo "Installation Interrupted.. killing All child procs"
+    log_debug "Installation Interrupted.. killing All child procs"
     kill_all_descendant_procs $$
 }
+
 appendix=
 verbose=false
 main "$@"
diff --git a/platform/nephos/rules.mk b/platform/nephos/rules.mk
index 2691de76ada..c4394fe13d5 100644
--- a/platform/nephos/rules.mk
+++ b/platform/nephos/rules.mk
@@ -15,7 +15,7 @@ WARM_VERIFIER = warm-verifier
 $(WARM_VERIFIER)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/warm-verifier"
 
 DSSERVE = dsserve
-$(DSSERVE)_URL = "https://sonicstorage.blob.core.windows.net/public/20190307/dsserve"
+$(DSSERVE)_URL = "https://packages.trafficmanager.net/public/20190307/dsserve"
 
 SONIC_ONLINE_FILES += $(NPX_DIAG) $(WARM_VERIFIER) $(DSSERVE)
 
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/Makefile b/platform/nvidia-bluefield/bluefield-platform-modules/Makefile
index 7c31ad1716d..7c0463705d9 100644
--- a/platform/nvidia-bluefield/bluefield-platform-modules/Makefile
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -18,6 +18,7 @@
 .ONESHELL:
 SHELL = /bin/bash
 .SHELLFLAGS += -e
+DKMS_ROOT = /var/lib/dkms/
 
 $(addprefix $(DEST)/, $(BF_PLATFORM_MODULE)): $(DEST)/% :
 
@@ -29,10 +30,14 @@ $(addprefix $(DEST)/, $(BF_PLATFORM_MODULE)): $(DEST)/% :
 	mkdir -p drivers/
 	mkdir -p cfg/
 
+	# Note: Drivers are installed in DKMS_ROOT when the corresponding DKMS package is installed, no need to build again
 	$(foreach kernel_module, $(BF_PLATFORM_DRIVERS), \
-		cp $(PROJECT_ROOT)/$(FILES_PATH)/$(kernel_module) drivers/
+		cp $(DKMS_ROOT)/$(kernel_module)/kernel-$(KVERSION)-$(CONFIGURED_ARCH)/module/$(kernel_module).ko drivers/
 	)
 
+	# Driver name for mlx-bootctl is different from the name in the recipe, so add a explicit rule
+	cp $(DKMS_ROOT)/mlx-bootctl/kernel-$(KVERSION)-$(CONFIGURED_ARCH)/module/mlxbf-bootctl.ko drivers/
+
 	export driver_targets="$(BF_PLATFORM_DRIVERS)"
 	export kversion="$(KVERSION)"
 	j2 templates/bluefield-platform-modules.postinst.j2 > debian/bluefield-platform-modules.postinst
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
index c82ce3023d4..928e068027f 100755
--- a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
@@ -16,11 +16,10 @@
 # limitations under the License.
 #
 
-pci_iface=eth0-midplane
+midplane_iface=eth0-midplane
 
 start()
 {
-    modprobe mlx5_core
     /usr/bin/mst start
 
     /usr/bin/mlnx-fw-upgrade.sh --dry-run -v
@@ -31,27 +30,49 @@ start()
 
 stop()
 {
-    /usr/bin/mst stop
-    rmmod mlx5_ib mlx5_core
+    /usr/bin/ip addr flush dev Ethernet0
+    return 0
 }
 
-configure_pci_iface()
+configure_midplane_iface()
 {
+    # Get the MAC address of the mgmt interface
     mgmt_mac=$(cat /sys/devices/platform/MLNXBF17:00/net/*/address)
 
-    # Set PCI interface MAC address to the MAC address of the mgmt interface
-    ip link set dev $pci_iface address $mgmt_mac
+    # Create systemd-networkd configuration directory if it doesn't exist
+    mkdir -p /etc/systemd/network
+
+    # Create bridge configuration file if it doesn't exist
+    if [ ! -f /etc/systemd/network/${midplane_iface}.netdev ]; then
+        cat > /etc/systemd/network/${midplane_iface}.netdev << EOF
+[NetDev]
+Name=${midplane_iface}
+Kind=bridge
+MACAddress=$mgmt_mac
+EOF
+    fi
+
+    # Create pf0 configuration file if it doesn't exist
+    if [ ! -f /etc/systemd/network/pf0.network ]; then
+        cat > /etc/systemd/network/pf0.network << EOF
+[Match]
+Name=pf0
+
+[Network]
+Bridge=${midplane_iface}
+EOF
+    fi
 }
 
 case "$1" in
     start|stop)
         $1
         ;;
-    configure-pci-iface)
-        configure_pci_iface
+    configure-midplane-iface)
+        configure_midplane_iface
         ;;
     *)
-        echo "Usage: $0 {start|stop|configure-pci-iface}"
+        echo "Usage: $0 {start|stop|configure-midplane-iface}"
         exit 1
         ;;
 esac
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/debian/bluefield-platform-modules.install b/platform/nvidia-bluefield/bluefield-platform-modules/debian/bluefield-platform-modules.install
index 04aca12dc01..2565c85867d 100644
--- a/platform/nvidia-bluefield/bluefield-platform-modules/debian/bluefield-platform-modules.install
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/debian/bluefield-platform-modules.install
@@ -1,5 +1,4 @@
 cfg/bluefield-modules.conf etc/modules-load.d/
 udev/* etc/udev/rules.d/
-modprobe.d/* etc/modprobe.d/
 bin/* usr/bin/
-systemd/* /lib/systemd/system/
+systemd/system/* lib/systemd/system/
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/debian/changelog b/platform/nvidia-bluefield/bluefield-platform-modules/debian/changelog
index 2fbfbadd6ef..d9e032daeb4 100644
--- a/platform/nvidia-bluefield/bluefield-platform-modules/debian/changelog
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/debian/changelog
@@ -1,5 +1,5 @@
-bluefield-platform-modules (1.0) unstable; urgency=low
+bluefield-platform-modules (2.0) unstable; urgency=low
 
-  * Initial Release
+  * Update the drivers to use DKMS
 
- -- Oleksandr Ivantsiv <oivantsiv@nvidia.com>  Fri, 23 Feb 2024 15:57:40 -0800
+ -- Vivek Reddy Karri <vkarri@nvidia.com>  Mon, 10 Jun 2025 12:01:40 -0800
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/debian/control b/platform/nvidia-bluefield/bluefield-platform-modules/debian/control
index 74f0b130410..f3fb81f6f7d 100644
--- a/platform/nvidia-bluefield/bluefield-platform-modules/debian/control
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/debian/control
@@ -6,6 +6,6 @@ Build-Depends: debhelper (>= 8.0.0)
 Standards-Version: 3.9.3
 
 Package: bluefield-platform-modules
-Version: 1.0
+Version: 2.0
 Architecture: arm64
 Description: Kernel modules, udev rules, and system configuration files for the Nvidia Bluefield platform.
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/modprobe.d/mlx5_core.conf b/platform/nvidia-bluefield/bluefield-platform-modules/modprobe.d/mlx5_core.conf
deleted file mode 100644
index 0839ec46733..00000000000
--- a/platform/nvidia-bluefield/bluefield-platform-modules/modprobe.d/mlx5_core.conf
+++ /dev/null
@@ -1 +0,0 @@
-blacklist mlx5_core
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service b/platform/nvidia-bluefield/bluefield-platform-modules/systemd/system/dpu.service
similarity index 100%
rename from platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service
rename to platform/nvidia-bluefield/bluefield-platform-modules/systemd/system/dpu.service
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/systemd/system/eswitch-switchdev.service b/platform/nvidia-bluefield/bluefield-platform-modules/systemd/system/eswitch-switchdev.service
new file mode 100644
index 00000000000..315d293e275
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/systemd/system/eswitch-switchdev.service
@@ -0,0 +1,11 @@
+[Unit]
+Description=Set eswitch mode to switchdev for mlx5_core
+After=systemd-modules-load.service
+
+[Service]
+Type=oneshot
+ExecStart=/usr/sbin/devlink dev eswitch set pci/0000:03:00.0 mode switchdev
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/systemd/system/pf-manager.service b/platform/nvidia-bluefield/bluefield-platform-modules/systemd/system/pf-manager.service
new file mode 100644
index 00000000000..99a6d0732a4
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/systemd/system/pf-manager.service
@@ -0,0 +1,11 @@
+[Unit]
+Description=Configure midplane interface
+Before=systemd-networkd.service
+
+[Service]
+Type=oneshot
+ExecStart=/usr/bin/bfnet.sh configure-midplane-iface
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/udev/82-net-setup-link.rules b/platform/nvidia-bluefield/bluefield-platform-modules/udev/82-net-setup-link.rules
index 0a99b404476..228e7240b83 100644
--- a/platform/nvidia-bluefield/bluefield-platform-modules/udev/82-net-setup-link.rules
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/udev/82-net-setup-link.rules
@@ -1,2 +1,2 @@
 SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/pci0000:00/0000:00:00.0/0000:01:00.0/0000:02:00.0/0000:03:00.0/net/e*", ATTR{phys_port_name}=="p0", NAME="Ethernet0"
-SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/pci0000:00/0000:00:00.0/0000:01:00.0/0000:02:00.0/0000:03:00.1/net/e*", ATTR{phys_port_name}=="p1", NAME="Ethernet4"
+SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/pci0000:00/0000:00:00.0/0000:01:00.0/0000:02:00.0/0000:03:00.0/net/e*", ATTR{phys_port_name}=="c1pf0", NAME="pf0"
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules b/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules
index af1c3f8e542..50ee654a92c 100644
--- a/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules
@@ -1 +1 @@
-SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/platform/MLNXBF01:00/virtio1/net/eth*", NAME="eth0-midplane", RUN+="/usr/bin/bfnet.sh configure-pci-iface"
+SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/platform/MLNXBF01:00/virtio1/net/eth*", NAME="tmfifo0"
diff --git a/platform/nvidia-bluefield/component-versions/Makefile b/platform/nvidia-bluefield/component-versions/Makefile
new file mode 100644
index 00000000000..2451e7c3234
--- /dev/null
+++ b/platform/nvidia-bluefield/component-versions/Makefile
@@ -0,0 +1,27 @@
+#
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -e
+
+MAIN_TARGET = component-versions
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	bash -e create_component_versions.sh 
+	mv temp_versions_file $(DEST)/$(MAIN_TARGET)
\ No newline at end of file
diff --git a/platform/nvidia-bluefield/component-versions/create_component_versions.sh b/platform/nvidia-bluefield/component-versions/create_component_versions.sh
new file mode 100644
index 00000000000..b2e7ed77c9e
--- /dev/null
+++ b/platform/nvidia-bluefield/component-versions/create_component_versions.sh
@@ -0,0 +1,24 @@
+#
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+echo "SDK $SDK_VERSION" > temp_versions_file
+echo "FW $BF3_FW_VERSION" >> temp_versions_file
+echo "SAI $DPU_SAI_VERSION" >> temp_versions_file
+echo "BFSOC $BFSOC_VERSION-$BFSOC_REVISION" >> temp_versions_file
+echo "MFT $MFT_VERSION-$MFT_REVISION" >> temp_versions_file
+echo "KERNEL $KVERSION_SHORT" >> temp_versions_file
\ No newline at end of file
diff --git a/platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2 b/platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2
index e11ea978c2c..885810182ec 100644
--- a/platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2
+++ b/platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2
@@ -1,5 +1,5 @@
 ##
-## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
@@ -36,7 +36,12 @@ RUN apt-get update && \
         python3-dev \
         python3-setuptools \
         binutils-dev \
-        ethtool
+        ethtool \
+        python3-clang \
+        clang \
+        pciutils
+
+RUN pip3 install ctypeslib2 clang==14
 
 {% if docker_syncd_bluefield_debs.strip() -%}
 # Copy locally-built Debian package dependencies
@@ -56,4 +61,7 @@ COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["critical_processes", "/etc/supervisor/"]
 
+RUN mkdir -p /etc/mlnx/
+COPY sai-*.profile /etc/mlnx/
+
 ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/nvidia-bluefield/docker-syncd-bluefield/sai-bf3.profile b/platform/nvidia-bluefield/docker-syncd-bluefield/sai-bf3.profile
new file mode 100644
index 00000000000..e69de29bb2d
diff --git a/platform/nvidia-bluefield/gpio-mlxbf3/Makefile b/platform/nvidia-bluefield/gpio-mlxbf3/Makefile
index 1a8f580ca1e..8a8666e0d42 100644
--- a/platform/nvidia-bluefield/gpio-mlxbf3/Makefile
+++ b/platform/nvidia-bluefield/gpio-mlxbf3/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,21 +19,20 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -ex
 
-MLXBF3_GPIO = gpio-mlxbf3-${MLXBF3_GPIO_DRIVER_VERSION}
-MODULE_DIR := $(shell pwd)/tmp/${MLXBF3_GPIO}
+MLXBF_GIGE = ${MLXBF3_GPIO_DRIVER}-1.0
 GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
 
-$(addprefix $(DEST)/, $(MLXBF3_GPIO_DRIVER)): $(DEST)/% :
+$(addprefix $(DEST)/, $(MLXBF3_GPIO_DRIVER_DKMS)): $(DEST)/% :
 	rm -rf ./tmp/
 	mkdir ./tmp/
 	pushd ./tmp/
 
-	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${MLXBF3_GPIO}
+	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${MLXBF_GIGE}
 
-	pushd ${MLXBF3_GPIO}
+	pushd ${MLXBF_GIGE}
 
 	# Build the package
-	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+	KVER=$(KVERSION) WITH_DKMS=1 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
 
-	mv ${MLXBF3_GPIO_DRIVER} $(DEST)/
+	mv ../${MLXBF3_GPIO_DRIVER_DKMS} $(DEST)/
 	popd
diff --git a/platform/nvidia-bluefield/installer/create_sonic_image b/platform/nvidia-bluefield/installer/create_sonic_image
index 7369da514c6..d9e4c053382 100755
--- a/platform/nvidia-bluefield/installer/create_sonic_image
+++ b/platform/nvidia-bluefield/installer/create_sonic_image
@@ -42,7 +42,7 @@ GRUB_CFG="" # Common Grub Config
 BF2_BOOT_ARGS="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x01000000 earlycon=pl011,0x01800000"
 BF2_GRUB_CFG="$BF2_BOOT_ARGS isolcpus=1-7 nohz_full=1-7 rcu_nocbs=1-7"
 BF3_BOOT_ARGS="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x13010000"
-BF3_GRUB_CFG="$BF3_BOOT_ARGS isolcpus=1-13 nohz_full=1-13 rcu_nocbs=1-13"
+BF3_GRUB_CFG="$BF3_BOOT_ARGS isolcpus=1-10 nohz_full=1-10 rcu_nocbs=1-10"
 
 usage() {
 cat << EOF
@@ -184,7 +184,7 @@ cat > scripts/initrd-install << EOF
 #!/bin/bash
 
 depmod -a $KERNEL_VERSION > /dev/null 2>&1
-insmod /mlx-bootctl.ko
+insmod /mlxbf-bootctl.ko
 insmod /sdhci-of-dwcmshc.ko
 insmod /sbsa_gwdt.ko
 /usr/sbin/watchdog
@@ -368,7 +368,7 @@ main() {
     VMLINUZ=$CDIR/$FILESYSTEM_ROOT/boot/vmlinuz-$KERNEL_VERSION
     MODULES_DIR=$CDIR/$FILESYSTEM_ROOT/lib/modules/$KERNEL_VERSION
     WATCHDOG=$MODULES_DIR/kernel/drivers/watchdog/sbsa_gwdt.ko
-    BOOTCTL_DRIVER=$CHROOT_DIR/usr/lib/modules/$KERNEL_VERSION/extra/mlx-bootctl.ko
+    BOOTCTL_DRIVER=$CHROOT_DIR/usr/lib/modules/$KERNEL_VERSION/extra/mlxbf-bootctl.ko
     TMFIFO_DRIVER=$CHROOT_DIR/usr/lib/modules/$KERNEL_VERSION/extra/mlxbf-tmfifo.ko
     SDHCI_OF_DWCMSHC_DRIVER=$CHROOT_DIR/usr/lib/modules/$KERNEL_VERSION/extra/sdhci-of-dwcmshc.ko
 
diff --git a/platform/nvidia-bluefield/installer/install.sh.j2 b/platform/nvidia-bluefield/installer/install.sh.j2
index 7f36a73a6f4..394b0f00799 100755
--- a/platform/nvidia-bluefield/installer/install.sh.j2
+++ b/platform/nvidia-bluefield/installer/install.sh.j2
@@ -41,16 +41,6 @@ declare -r device_emmc=/dev/mmcblk0
 pn=$(dmidecode -t 4 | grep "Part Number" | awk '{split($NF,a,"-"); print tolower(a[1])}')
 declare -r platform=arm64-nvda_bf-$pn
 
-# The reboot of the DPU from the installer is required only for standalon platform.
-# In Smart Switch the reboot is triggered by the host when the DPU notifies it that the installation is finished.
-if [[ $(echo $platform | grep 9009d3b600) != "" ]]; then
-	declare -r reboot_is_needed=true
-	declare -r fw_upgrade_is_needed=false
-else
-	declare -r reboot_is_needed=false
-	declare -r fw_upgrade_is_needed=true
-fi
-
 declare -r capsule=/lib/firmware/mellanox/boot/capsule/boot_update2.cap
 
 run_bash_session()
@@ -108,6 +98,10 @@ if [ -e /etc/bf.cfg ]; then
 	. /etc/bf.cfg
 fi
 
+# Flags that can be overwritten by the bf.cfg
+declare -r SKIP_FIRMWARE_UPGRADE="${SKIP_FIRMWARE_UPGRADE:-false}"
+declare -r FORCE_FW_CONFIG_RESET="${FORCE_FW_CONFIG_RESET:-false}"
+
 ex() {
     echo "Executing command: $@" > /dev/ttyAMA0
 
@@ -228,7 +222,7 @@ chmod a+r /mnt/machine.conf
 
 sync
 
-if [[ $fw_upgrade_is_needed == "true" ]]; then
+if [[ $SKIP_FIRMWARE_UPGRADE != "true" ]]; then
 	sonic_fs_path="/mnt/$image_dir/fs.squashfs"
 	sonic_fs_mountpoint="/tmp/$image_dir-fs"
 
@@ -252,6 +246,8 @@ if [[ $fw_upgrade_is_needed == "true" ]]; then
 
 	ex mst start
 
+        cp -R $sonic_fs_mountpoint/usr/bin/asic_detect/ /usr/bin/
+
 	if function_exists bfb_pre_fw_install; then
 		log "Running bfb_pre_fw_install from bf.cfg"
 		bfb_pre_fw_install
@@ -262,6 +258,10 @@ if [[ $fw_upgrade_is_needed == "true" ]]; then
 		log "ERROR: FW update failed"
 	fi
 
+	if [[ $FORCE_FW_CONFIG_RESET == "true" ]]; then
+		ex $sonic_fs_mountpoint/usr/bin/mlnx-fw-upgrade.sh -v -r
+	fi
+
 	ex umount $sonic_fs_mountpoint
 fi
 
@@ -442,12 +442,7 @@ fi
 
 rshim_log "Installation finished"
 
-if [[ $reboot_is_needed == "true" ]]; then
-	rshim_log "Rebooting..."
-	reboot -f
-else
-	rshim_log "Waiting for reset from the host..."
-	while true; do
-		sleep 1
-	done
-fi
+rshim_log "Waiting for reset from the host..."
+while true; do
+	sleep 1
+done
diff --git a/platform/nvidia-bluefield/mlx-bootctl/Makefile b/platform/nvidia-bluefield/mlx-bootctl/Makefile
index 915d5cb3b33..1dc8b61fc84 100644
--- a/platform/nvidia-bluefield/mlx-bootctl/Makefile
+++ b/platform/nvidia-bluefield/mlx-bootctl/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,10 +19,10 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -ex
 
-MLX_BOOTCTL = mlx-bootctl-$(MLX_BOOTCTL_DRIVER_VERSION)
+MLX_BOOTCTL = $(MLX_BOOTCTL_DRIVER)-1.7
 GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
 
-$(addprefix $(DEST)/, $(MLX_BOOTCTL_DRIVER)): $(DEST)/% :
+$(addprefix $(DEST)/, $(MLX_BOOTCTL_DRIVER_DKMS)): $(DEST)/% :
 	rm -rf ./tmp/
 	mkdir ./tmp/
 	pushd ./tmp/
@@ -32,8 +32,8 @@ $(addprefix $(DEST)/, $(MLX_BOOTCTL_DRIVER)): $(DEST)/% :
 	pushd ${MLX_BOOTCTL}  
 
 	# Build the package
-	KVER=$(KVERSION) WITH_DKMS=0 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	KVER=$(KVERSION) WITH_DKMS=1 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
 	
-	mv mlxbf-bootctl.ko $(DEST)/mlx-bootctl.ko
+	mv ../$(MLX_BOOTCTL_DRIVER_DKMS) $(DEST)
 
 	popd
diff --git a/platform/nvidia-bluefield/mlxbf-gige/Makefile b/platform/nvidia-bluefield/mlxbf-gige/Makefile
index d9bddb1139f..f9757642d9c 100644
--- a/platform/nvidia-bluefield/mlxbf-gige/Makefile
+++ b/platform/nvidia-bluefield/mlxbf-gige/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,11 +19,10 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -ex
 
-MLXBF_GIGE = mlxbf-gige-${MLXBF_GIGE_DRIVER_VERSION}
-MODULE_DIR := $(shell pwd)/tmp/${MLXBF_GIGE}
+MLXBF_GIGE = ${MLXBF_GIGE_DRIVER}-1.1
 GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
 
-$(addprefix $(DEST)/, $(MLXBF_GIGE_DRIVER)): $(DEST)/% :
+$(addprefix $(DEST)/, $(MLXBF_GIGE_DRIVER_DKMS)): $(DEST)/% :
 	rm -rf ./tmp/
 	mkdir ./tmp/
 	pushd ./tmp/
@@ -33,7 +32,7 @@ $(addprefix $(DEST)/, $(MLXBF_GIGE_DRIVER)): $(DEST)/% :
 	pushd ${MLXBF_GIGE}
 
 	# Build the package
-	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+	KVER=$(KVERSION) WITH_DKMS=1 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
 
-	mv ${MLXBF_GIGE_DRIVER} $(DEST)/
+	mv ../${MLXBF_GIGE_DRIVER_DKMS} $(DEST)/
 	popd
diff --git a/platform/nvidia-bluefield/mlxbf-pka/Makefile b/platform/nvidia-bluefield/mlxbf-pka/Makefile
index 28a44c990dc..52e7db3723b 100644
--- a/platform/nvidia-bluefield/mlxbf-pka/Makefile
+++ b/platform/nvidia-bluefield/mlxbf-pka/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,21 +19,21 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -ex
 
-MLXBF_PKA = mlxbf-pka-${MLXBF_PKA_DRIVER_VERSION}
-MODULE_DIR := $(shell pwd)/tmp/${MLXBF_PKA}
+MLXBF_PKA = $(MLXBF_PKA_DRIVER)-1.0
 GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
 
-$(addprefix $(DEST)/, $(MLXBF_PKA_DRIVER)): $(DEST)/% :
+$(addprefix $(DEST)/, $(MLXBF_PKA_DRIVER_DKMS)): $(DEST)/% :
 	rm -rf ./tmp/
 	mkdir ./tmp/
 	pushd ./tmp/
 
 	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${MLXBF_PKA}
 
-	pushd ${MLXBF_PKA}
+	pushd ${MLXBF_PKA}  
 
 	# Build the package
-	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+	KVER=$(KVERSION) WITH_DKMS=1 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	
+	mv ../$(MLXBF_PKA_DRIVER_DKMS) $(DEST)
 
-	mv ${MLXBF_PKA_DRIVER} $(DEST)/
 	popd
diff --git a/platform/nvidia-bluefield/mlxbf-ptm/Makefile b/platform/nvidia-bluefield/mlxbf-ptm/Makefile
index d7c77951003..cb95dc6412f 100644
--- a/platform/nvidia-bluefield/mlxbf-ptm/Makefile
+++ b/platform/nvidia-bluefield/mlxbf-ptm/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,11 +19,10 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -ex
 
-MLXBF_PTM = mlxbf-ptm-${MLXBF_PTM_DRIVER_VERSION}
-MODULE_DIR := $(shell pwd)/tmp/${MLXBF_PTM}
+MLXBF_PTM = $(MLXBF_PTM_DRIVER)-1.1
 GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
 
-$(addprefix $(DEST)/, $(MLXBF_PTM_DRIVER)): $(DEST)/% :
+$(addprefix $(DEST)/, $(MLXBF_PTM_DRIVER_DKMS)): $(DEST)/% :
 	rm -rf ./tmp/
 	mkdir ./tmp/
 	pushd ./tmp/
@@ -33,7 +32,8 @@ $(addprefix $(DEST)/, $(MLXBF_PTM_DRIVER)): $(DEST)/% :
 	pushd ${MLXBF_PTM}
 
 	# Build the package
-	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+	KVER=$(KVERSION) WITH_DKMS=1 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	
+	mv ../$(MLXBF_PTM_DRIVER_DKMS) $(DEST)
 
-	mv ${MLXBF_PTM_DRIVER} $(DEST)/
 	popd
diff --git a/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile b/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile
index 04fab4b518e..4037a2045f1 100644
--- a/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile
+++ b/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,11 +19,10 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -ex
 
-MLXBF3_PINCTRL = pinctrl-mlxbf3-${MLXBF3_PINCTRL_DRIVER_VERSION}
-MODULE_DIR := $(shell pwd)/tmp/${MLXBF3_PINCTRL}
+MLXBF3_PINCTRL = ${MLXBF3_PINCTRL_DRIVER}-1.0
 GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
 
-$(addprefix $(DEST)/, $(MLXBF3_PINCTRL_DRIVER)): $(DEST)/% :
+$(addprefix $(DEST)/, $(MLXBF3_PINCTRL_DRIVER_DKMS)): $(DEST)/% :
 	rm -rf ./tmp/
 	mkdir ./tmp/
 	pushd ./tmp/
@@ -33,7 +32,7 @@ $(addprefix $(DEST)/, $(MLXBF3_PINCTRL_DRIVER)): $(DEST)/% :
 	pushd ${MLXBF3_PINCTRL}
 
 	# Build the package
-	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+	KVER=$(KVERSION) WITH_DKMS=1 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
 
-	mv ${MLXBF3_PINCTRL_DRIVER} $(DEST)/
+	mv ../${MLXBF3_PINCTRL_DRIVER_DKMS} $(DEST)/
 	popd
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/utils.py b/platform/nvidia-bluefield/platform-api/sonic_platform/utils.py
index d6bf6809f6d..4db2e997fa1 100644
--- a/platform/nvidia-bluefield/platform-api/sonic_platform/utils.py
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/utils.py
@@ -1,5 +1,6 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,6 +15,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
+import ctypes
 import functools
 import subprocess
 from sonic_py_common.logger import Logger
@@ -71,3 +73,67 @@ def _impl(*args, **kwargs):
                 return return_value
         return _impl
     return wrapper
+
+
+def read_from_file(file_path, target_type, default='', raise_exception=False, log_func=logger.log_error):
+    """
+    Read content from file and convert to target type
+    :param file_path: File path
+    :param target_type: target type
+    :param default: Default return value if any exception occur
+    :param raise_exception: Raise exception to caller if True else just return default value
+    :param log_func: function to log the error
+    :return: String content of the file
+    """
+    try:
+        with open(file_path, 'r') as f:
+            value = f.read()
+            if value is None:
+                # None return value is not allowed in any case, so we log error here for further debug.
+                logger.log_error('Failed to read from {}, value is None, errno is {}'.format(file_path, ctypes.get_errno()))
+                # Raise ValueError for the except statement to handle this as a normal exception
+                raise ValueError('File content of {} is None'.format(file_path))
+            else:
+                value = target_type(value.strip())
+    except (ValueError, IOError) as e:
+        if log_func:
+            log_func('Failed to read from file {} - {}'.format(file_path, repr(e)))
+        if not raise_exception:
+            value = default
+        else:
+            raise e
+
+    return value
+
+
+def read_float_from_file(file_path, default=0.0, raise_exception=False, log_func=logger.log_error):
+    """
+    Read content from file and cast it to integer
+    :param file_path: File path
+    :param default: Default return value if any exception occur
+    :param raise_exception: Raise exception to caller if True else just return default value
+    :param log_func: function to log the error
+    :return: Integer value of the file content
+    """
+    return read_from_file(file_path=file_path, target_type=float, default=default, raise_exception=raise_exception, log_func=log_func)
+
+
+def write_file(file_path, content, raise_exception=False, log_func=logger.log_error):
+    """
+    Write the given value to a file
+    :param file_path: File path
+    :param content: Value to write to the file
+    :param raise_exception: Raise exception to caller if True
+    :return: True if write success else False
+    """
+    try:
+        with open(file_path, 'w') as f:
+            f.write(str(content))
+    except (ValueError, IOError) as e:
+        if log_func:
+            log_func('Failed to write {} to file {} - {}'.format(content, file_path, repr(e)))
+        if not raise_exception:
+            return False
+        else:
+            raise e
+    return True
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/watchdog.py b/platform/nvidia-bluefield/platform-api/sonic_platform/watchdog.py
index ca8b9574571..71f71d08cc4 100644
--- a/platform/nvidia-bluefield/platform-api/sonic_platform/watchdog.py
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/watchdog.py
@@ -1,5 +1,6 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -15,17 +16,49 @@
 # limitations under the License.
 #
 
-
 try:
     from sonic_platform_base.watchdog_base import WatchdogBase
-    from sonic_py_common.logger import Logger
+    from sonic_py_common.syslogger import SysLogger
+    import subprocess
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
+logger = SysLogger(log_identifier='Watchdog')
+
+WD_COMMON_ERROR = -1
+
 
 class Watchdog(WatchdogBase):
     """Placeholder for watchdog implementation"""
 
+    def __init__(self):
+        self.MLXBF_DRIVER = "mlxbf-bootctl"
+
+    def exec_cmd(self, cmd, raise_exception=True):
+        """Execute commands related to watchdog api"""
+        try:
+            return subprocess.check_output(cmd).decode().strip()
+        except Exception as err:
+            if raise_exception:
+                raise err
+            else:
+                logger.log_info(f"Failed to run cmd {' '.join(cmd)}")
+
+    def get_conf_time_and_mode(self):
+        """Obtain the mode in which the watchdog is configured and the time
+        Returns - A Tuple (Arm status, configured timeout)"""
+        status_cmd = {self.MLXBF_DRIVER}
+        ret_status = "disabled"
+        ret_time = 0
+        try:
+            stat_output_list = self.exec_cmd(status_cmd).split('\n')
+            bootctl_stat_dict = {item.split(': ')[0]: item.split(': ')[1] for item in stat_output_list}
+            ret_status = bootctl_stat_dict.get('boot watchdog mode', 'disabled')
+            ret_time = int(bootctl_stat_dict.get('boot watchdog interval', 0))
+        except Exception as err:
+            logger.log_error(f"Could not obtain status usind mlxbf-bootctl :{err}")
+        return ret_status, ret_time
+
     def arm(self, seconds):
         """
         Arm the hardware watchdog with a timeout of <seconds> seconds.
@@ -39,7 +72,22 @@ def arm(self, seconds):
             An integer specifying the *actual* number of seconds the watchdog
             was armed with. On failure returns -1.
         """
-        return -1
+        arm_time = WD_COMMON_ERROR
+        if seconds < 45 or seconds > 4095:
+            logger.log_error(f"Arm time provided {seconds} is outside the valid range 45-4095")
+            return arm_time
+        arm_command = [self.MLXBF_DRIVER, "--watchdog-boot-mode", "standard",
+                       "--watchdog-boot-interval", str(seconds)]
+        try:
+            if self.is_armed_for_time(seconds):
+                # Already armed for the time specified
+                return seconds
+            self.exec_cmd(arm_command)
+            arm_time = seconds
+        except Exception as err:
+            # On an error return code check_output raises exception, return Fault
+            logger.log_error(f"Could not arm watchdog :{err}")
+        return arm_time
 
     def disarm(self):
         """
@@ -48,7 +96,29 @@ def disarm(self):
         Returns:
             A boolean, True if watchdog is disarmed successfully, False if not
         """
-        return False
+        disarm_command = [self.MLXBF_DRIVER, "--watchdog-boot-mode", "disabled"]
+        try:
+            self.exec_cmd(disarm_command)
+        except Exception as err:
+            logger.log_error(f"Could not disarm watchdog :{err}")
+            # On an error return code check_output raises exception, return Fault
+            return False
+        return True
+
+    def is_armed_for_time(self, time_check=None):
+        """
+        Retrieves the armed state of the hardware watchdog
+        And it also checks if the time configured
+        If the time_check parameter is not provided, we check
+        if watchdog is just armed or not
+        Returns:
+            A boolean, True if watchdog is armed, False if not
+        """
+        conf_mode, conf_time = self.get_conf_time_and_mode()
+        armed = conf_mode == 'standard'
+        if not time_check:
+            return armed
+        return armed and (time_check == conf_time)
 
     def is_armed(self):
         """
@@ -57,7 +127,7 @@ def is_armed(self):
         Returns:
             A boolean, True if watchdog is armed, False if not
         """
-        return False
+        return self.is_armed_for_time()
 
     def get_remaining_time(self):
         """
@@ -68,4 +138,7 @@ def get_remaining_time(self):
             An integer specifying the number of seconds remaining on thei
             watchdog timer. If the watchdog is not armed, returns -1.
         """
-        return -1
+        timeleft = WD_COMMON_ERROR
+        if self.is_armed():
+            _, timeleft = self.get_conf_time_and_mode()
+        return timeleft
diff --git a/platform/nvidia-bluefield/platform-api/tests/test_utils.py b/platform/nvidia-bluefield/platform-api/tests/test_utils.py
new file mode 100644
index 00000000000..4ec71e34e97
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/tests/test_utils.py
@@ -0,0 +1,48 @@
+#
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+import os
+import pytest
+import sys
+from sonic_platform import utils
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+
+class TestUtils:
+    def test_read_file(self):
+        ret = utils.read_float_from_file('not exist', 3.14)
+        assert ret == 3.14
+
+        with pytest.raises(IOError):
+            ret = utils.read_float_from_file('not exist', 2.25, raise_exception=True)
+            assert ret == 2.25
+        file_path = '/tmp/test.txt'
+        utils.write_file(file_path, '3.09')
+        assert utils.read_float_from_file(file_path) == 3.09
+        utils.write_file(file_path, '3.00')
+        assert utils.read_float_from_file(file_path) == 3
+
+    def test_write_file(self):
+        file_path = '/tmp/test.txt'
+        utils.write_file(file_path, '3.14')
+        assert utils.read_float_from_file(file_path) == 3.14
+
+        with pytest.raises(IOError):
+            utils.write_file('/not/exist/file', '123', raise_exception=True)
diff --git a/platform/nvidia-bluefield/platform-api/tests/test_watchdog.py b/platform/nvidia-bluefield/platform-api/tests/test_watchdog.py
new file mode 100644
index 00000000000..2a86f648eb4
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/tests/test_watchdog.py
@@ -0,0 +1,141 @@
+#
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import pytest
+import sys
+import subprocess
+from unittest import mock
+from sonic_platform.watchdog import Watchdog, WD_COMMON_ERROR
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+
+disarm_string = 'primary: /dev/mmcblk0boot0\n'\
+        'backup: /dev/mmcblk0boot1\n'\
+        'boot-bus-width: x8\n'\
+        'reset to x1 after reboot: FALSE\n'\
+        'boot watchdog interval: 0\n'\
+        'boot watchdog mode: disabled\n'\
+        'watchdog-swap: disabled\n'\
+        'lifecycle state: Secured (development)\n'\
+        'secure boot key free slots: 3'
+
+
+arm_string = 'primary: /dev/mmcblk0boot0\n'\
+        'backup: /dev/mmcblk0boot1\n'\
+        'boot-bus-width: x8\n'\
+        'reset to x1 after reboot: FALSE\n'\
+        'boot watchdog interval: 180\n'\
+        'boot watchdog mode: standard\n'\
+        'watchdog-swap: disabled\n'\
+        'lifecycle state: Secured (development)\n'\
+        'secure boot key free slots: 3'
+
+
+class TestWatchdog:
+    @mock.patch('sonic_platform.watchdog.Watchdog.is_armed_for_time')
+    @mock.patch('sonic_platform.watchdog.Watchdog.exec_cmd')
+    def test_arm(self, mock_exec_cmd, mock_is_armed_for_time):
+        # Valid Arm time
+        test_wd = Watchdog()
+        assert test_wd.arm(0) == WD_COMMON_ERROR
+        assert test_wd.arm(-1) == WD_COMMON_ERROR
+        assert test_wd.arm(4096) == WD_COMMON_ERROR
+        # If watchdog is already armed we do not re-arm it
+        mock_exec_cmd.return_value = 'standard'
+        mock_is_armed_for_time.return_value = True
+        assert test_wd.arm(180) == 180
+        mock_exec_cmd.assert_not_called()
+        mock_is_armed_for_time.return_value = False
+        assert test_wd.arm(180) == 180
+        mock_exec_cmd.assert_called_once_with(['mlxbf-bootctl',
+                                               '--watchdog-boot-mode',
+                                               'standard',
+                                               '--watchdog-boot-interval',
+                                               '180'])
+
+    @mock.patch('sonic_platform.watchdog.Watchdog.exec_cmd')
+    def test_disarm(self, mock_exec_cmd):
+        # Valid Arm time
+        test_wd = Watchdog()
+        assert test_wd.disarm()
+        mock_exec_cmd.side_effect = subprocess.CalledProcessError(returncode=1, cmd='mlxbf-bootctl')
+        assert not test_wd.disarm()
+
+    @mock.patch('sonic_platform.watchdog.Watchdog.is_armed_for_time')
+    @mock.patch('sonic_platform.watchdog.Watchdog.exec_cmd')
+    @mock.patch('sonic_platform.watchdog.Watchdog.get_conf_time_and_mode')
+    @mock.patch('sonic_platform.watchdog.Watchdog.is_armed')
+    def test_get_remaining_time_watchdog(self, mock_is_armed, mock_get_time, mock_exec_cmd, mock_is_armed_for_time):
+        watchdog = Watchdog()
+        mock_is_armed.return_value = False
+        assert watchdog.get_remaining_time() == WD_COMMON_ERROR
+        mock_exec_cmd.return_value = True
+        mock_is_armed_for_time.return_value = False
+        watchdog.arm(180)
+        mock_is_armed.return_value = True
+        mock_get_time.return_value = 'standard', 100
+        first_value = watchdog.get_remaining_time()
+        assert first_value > 0
+        second_value = watchdog.get_remaining_time()
+        assert second_value <= first_value
+
+    @mock.patch('sonic_platform.watchdog.Watchdog.exec_cmd')
+    def test_is_armed(self, mock_exec_cmd):
+        watchdog = Watchdog()
+        mock_exec_cmd.return_value = disarm_string
+        assert not watchdog.is_armed()
+        assert not watchdog.is_armed_for_time(100)
+        assert not watchdog.is_armed_for_time(50)
+        assert not watchdog.is_armed_for_time(180)
+        mock_exec_cmd.return_value = arm_string
+        assert watchdog.is_armed()
+        assert not watchdog.is_armed_for_time(100)
+        assert not watchdog.is_armed_for_time(50)
+        assert watchdog.is_armed_for_time(180)
+        change_time_str = arm_string.replace('180', '200')
+        mock_exec_cmd.return_value = change_time_str
+        assert watchdog.is_armed_for_time(200)
+
+    @mock.patch('sonic_platform.watchdog.Watchdog.exec_cmd')
+    def test_conf_time(self, mock_exec_cmd):
+        watchdog = Watchdog()
+        mock_exec_cmd.return_value = disarm_string
+        arm_str, arm_time = watchdog.get_conf_time_and_mode()
+        assert arm_str == "disabled"
+        assert arm_time == 0
+        mock_exec_cmd.return_value = arm_string
+        arm_str, arm_time = watchdog.get_conf_time_and_mode()
+        assert arm_str == "standard"
+        assert arm_time == 180
+        mock_exec_cmd.side_effect = subprocess.CalledProcessError(returncode=1, cmd='mlxbf-bootctl')
+        arm_str, arm_time = watchdog.get_conf_time_and_mode()
+        assert arm_str == "disabled"
+        assert arm_time == 0
+
+    def test_exec_cmd(self):
+        watchdog = Watchdog()
+        assert watchdog.exec_cmd(['echo', 'abc']) == "abc"
+        assert watchdog.exec_cmd(['echo', 't1']) == "t1"
+        with pytest.raises(subprocess.CalledProcessError):
+            watchdog.exec_cmd(['ls', 'non-existent-dir'])
+            watchdog.exec_cmd(['cat', 'non-existent-file.txt'])
+            watchdog.exec_cmd(['non-existent-cmd'])
diff --git a/platform/nvidia-bluefield/pwr-mlxbf/Makefile b/platform/nvidia-bluefield/pwr-mlxbf/Makefile
index 856dc410d41..0f2478fb20f 100644
--- a/platform/nvidia-bluefield/pwr-mlxbf/Makefile
+++ b/platform/nvidia-bluefield/pwr-mlxbf/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,21 +19,21 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -ex
 
-PWR_MLXBF = pwr-mlxbf-$(PWR_MLXBF_DRIVER_VERSION)
-MODULE_DIR := $(shell pwd)/tmp/${PWR_MLXBF}
+PWR_MLXBF = $(PWR_MLXBF_DRIVER)-1.0
 GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
 
-$(addprefix $(DEST)/, $(PWR_MLXBF_DRIVER)): $(DEST)/% :
+$(addprefix $(DEST)/, $(PWR_MLXBF_DRIVER_DKMS)): $(DEST)/% :
 	rm -rf ./tmp/
 	mkdir ./tmp/
 	pushd ./tmp/
 
 	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${PWR_MLXBF}
 
-	pushd $(PWR_MLXBF)
+	pushd ${PWR_MLXBF}  
 
 	# Build the package
-	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+	KVER=$(KVERSION) WITH_DKMS=1 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	
+	mv ../$(PWR_MLXBF_DRIVER_DKMS) $(DEST)
 
-	mv $(PWR_MLXBF_DRIVER) $(DEST)/
 	popd
diff --git a/platform/nvidia-bluefield/recipes/bluefield-soc.dep b/platform/nvidia-bluefield/recipes/bluefield-soc.dep
index d30ba91dc8b..742bae4033d 100644
--- a/platform/nvidia-bluefield/recipes/bluefield-soc.dep
+++ b/platform/nvidia-bluefield/recipes/bluefield-soc.dep
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -21,45 +21,45 @@ BSD_COMMON_FILES_LIST = $(SONIC_COMMON_BASE_FILES_LIST) \
 	$(PLATFORM_PATH)/recipes/bluefield-soc.mk \
 	$(PLATFORM_PATH)/recipes/bluefield-soc.dep
 
-SPATH       := $($(TMFIFO_DRIVER)_SRC_PATH)
+SPATH       := $($(TMFIFO_DRIVER_DKMS)_SRC_PATH)
 DEP_FILES   := $(BSD_COMMON_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(SPATH))
 
-$(TMFIFO_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
-$(TMFIFO_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
-$(TMFIFO_DRIVER)_DEP_FILES   := $(DEP_FILES)
+$(TMFIFO_DRIVER_DKMS)_CACHE_MODE  := GIT_CONTENT_SHA
+$(TMFIFO_DRIVER_DKMS)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(TMFIFO_DRIVER_DKMS)_DEP_FILES   := $(DEP_FILES)
 
-SPATH       := $($(MLXBF_GIGE_DRIVER)_SRC_PATH)
+SPATH       := $($(MLXBF_GIGE_DRIVER_DKMS)_SRC_PATH)
 DEP_FILES   := $(BSD_COMMON_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(SPATH))
 
-$(MLXBF_GIGE_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
-$(MLXBF_GIGE_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
-$(MLXBF_GIGE_DRIVER)_DEP_FILES   := $(DEP_FILES)
+$(MLXBF_GIGE_DRIVER_DKMS)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLXBF_GIGE_DRIVER_DKMS)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLXBF_GIGE_DRIVER_DKMS)_DEP_FILES   := $(DEP_FILES)
 
-SPATH       := $($(MLXBF3_GPIO_DRIVER)_SRC_PATH)
+SPATH       := $($(MLXBF3_GPIO_DRIVER_DKMS)_SRC_PATH)
 DEP_FILES   := $(BSD_COMMON_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(SPATH))
 
-$(MLXBF3_GPIO_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
-$(MLXBF3_GPIO_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
-$(MLXBF3_GPIO_DRIVER)_DEP_FILES   := $(DEP_FILES)
+$(MLXBF3_GPIO_DRIVER_DKMS)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLXBF3_GPIO_DRIVER_DKMS)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLXBF3_GPIO_DRIVER_DKMS)_DEP_FILES   := $(DEP_FILES)
 
-SPATH       := $($(MLXBF3_PINCTRL_DRIVER)_SRC_PATH)
+SPATH       := $($(MLXBF3_PINCTRL_DRIVER_DKMS)_SRC_PATH)
 DEP_FILES   := $(BSD_COMMON_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(SPATH))
 
-$(MLXBF3_PINCTRL_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
-$(MLXBF3_PINCTRL_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
-$(MLXBF3_PINCTRL_DRIVER)_DEP_FILES   := $(DEP_FILES)
+$(MLXBF3_PINCTRL_DRIVER_DKMS)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLXBF3_PINCTRL_DRIVER_DKMS)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLXBF3_PINCTRL_DRIVER_DKMS)_DEP_FILES   := $(DEP_FILES)
 
-SPATH       := $($(MLX_BOOTCTL_DRIVER)_SRC_PATH)
+SPATH       := $($(MLX_BOOTCTL_DRIVER_DKMS)_SRC_PATH)
 DEP_FILES   := $(BSD_COMMON_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(SPATH))
 
-$(MLX_BOOTCTL_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
-$(MLX_BOOTCTL_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
-$(MLX_BOOTCTL_DRIVER)_DEP_FILES   := $(DEP_FILES)
+$(MLX_BOOTCTL_DRIVER_DKMS)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLX_BOOTCTL_DRIVER_DKMS)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLX_BOOTCTL_DRIVER_DKMS)_DEP_FILES   := $(DEP_FILES)
 
 SPATH       := $($(MLXBF_BOOTCTL_DEB)_SRC_PATH)
 DEP_FILES   := $(BSD_COMMON_FILES_LIST)
@@ -69,29 +69,29 @@ $(MLXBF_BOOTCTL_DEB)_CACHE_MODE  := GIT_CONTENT_SHA
 $(MLXBF_BOOTCTL_DEB)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
 $(MLXBF_BOOTCTL_DEB)_DEP_FILES   := $(DEP_FILES)
 
-SPATH       := $($(MLXBF_PKA_DRIVER)_SRC_PATH)
+SPATH       := $($(MLXBF_PKA_DRIVER_DKMS)_SRC_PATH)
 DEP_FILES   := $(BSD_COMMON_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(SPATH))
 
-$(MLXBF_PKA_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
-$(MLXBF_PKA_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
-$(MLXBF_PKA_DRIVER)_DEP_FILES   := $(DEP_FILES)
+$(MLXBF_PKA_DRIVER_DKMS)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLXBF_PKA_DRIVER_DKMS)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLXBF_PKA_DRIVER_DKMS)_DEP_FILES   := $(DEP_FILES)
 
-SPATH       := $($(PWR_MLXBF_DRIVER)_SRC_PATH)
+SPATH       := $($(PWR_MLXBF_DRIVER_DKMS)_SRC_PATH)
 DEP_FILES   := $(BSD_COMMON_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(SPATH))
 
-$(PWR_MLXBF_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
-$(PWR_MLXBF_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
-$(PWR_MLXBF_DRIVER)_DEP_FILES   := $(DEP_FILES)
+$(PWR_MLXBF_DRIVER_DKMS)_CACHE_MODE  := GIT_CONTENT_SHA
+$(PWR_MLXBF_DRIVER_DKMS)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(PWR_MLXBF_DRIVER_DKMS)_DEP_FILES   := $(DEP_FILES)
 
-SPATH       := $($(MLXBF_PTM_DRIVER)_SRC_PATH)
+SPATH       := $($(MLXBF_PTM_DRIVER_DKMS)_SRC_PATH)
 DEP_FILES   := $(BSD_COMMON_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(SPATH))
 
-$(MLXBF_PTM_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
-$(MLXBF_PTM_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
-$(MLXBF_PTM_DRIVER)_DEP_FILES   := $(DEP_FILES)
+$(MLXBF_PTM_DRIVER_DKMS)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLXBF_PTM_DRIVER_DKMS)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLXBF_PTM_DRIVER_DKMS)_DEP_FILES   := $(DEP_FILES)
 
 DEP_FILES := $(BSD_COMMON_FILES_LIST)
 
diff --git a/platform/nvidia-bluefield/recipes/bluefield-soc.mk b/platform/nvidia-bluefield/recipes/bluefield-soc.mk
index a601d3af696..48d03bba853 100644
--- a/platform/nvidia-bluefield/recipes/bluefield-soc.mk
+++ b/platform/nvidia-bluefield/recipes/bluefield-soc.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -16,8 +16,8 @@
 #
 
 # Bluefied Software Distribution Version
-BFSOC_VERSION = 4.9.0
-BFSOC_REVISION = 13347
+BFSOC_VERSION = 4.11.0
+BFSOC_REVISION = 13611
 BFB_IMG_TYPE = prod
 BFSOC_BUILD_DATE =
 
@@ -47,61 +47,81 @@ define make_url_bfsoc
 endef
 
 BF_PLATFORM_DRIVERS =
+BFSOC_DKMS_DEBS =
 BFSOC_MAKE_DEBS =
 BFSOC_MAKE_DEBS_DERIVED =
 BFSOC_ONLINE_DEBS =
 
-MLXBF3_PINCTRL_DRIVER_VERSION = 1.0
-MLXBF3_PINCTRL_DRIVER = pinctrl-mlxbf3.ko
-$(MLXBF3_PINCTRL_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/pinctrl-mlxbf3
-$(MLXBF3_PINCTRL_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
-
+MLXBF3_PINCTRL_DRIVER = pinctrl-mlxbf3
+MLXBF3_PINCTRL_DRIVER_DKMS = $(MLXBF3_PINCTRL_DRIVER)-dkms_1.0-0_all.deb
+$(MLXBF3_PINCTRL_DRIVER_DKMS)_SRC_PATH = $(PLATFORM_PATH)/pinctrl-mlxbf3
+$(MLXBF3_PINCTRL_DRIVER_DKMS)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+BFSOC_DKMS_DEBS += $(MLXBF3_PINCTRL_DRIVER_DKMS)
 BF_PLATFORM_DRIVERS += $(MLXBF3_PINCTRL_DRIVER)
-export MLXBF3_PINCTRL_DRIVER_VERSION MLXBF3_PINCTRL_DRIVER
-
-TMFIFO_DRIVER_VERSION = 1.7
-TMFIFO_DRIVER = mlxbf-tmfifo.ko
-$(TMFIFO_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/tmfifo
-$(TMFIFO_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+export MLXBF3_PINCTRL_DRIVER MLXBF3_PINCTRL_DRIVER_DKMS
 
+TMFIFO_DRIVER = mlxbf-tmfifo
+TMFIFO_DRIVER_DKMS = $(TMFIFO_DRIVER)-dkms_1.0-0_all.deb
+$(TMFIFO_DRIVER_DKMS)_SRC_PATH = $(PLATFORM_PATH)/tmfifo
+$(TMFIFO_DRIVER_DKMS)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+BFSOC_DKMS_DEBS += $(TMFIFO_DRIVER_DKMS)
 BF_PLATFORM_DRIVERS += $(TMFIFO_DRIVER)
-export TMFIFO_DRIVER_VERSION TMFIFO_DRIVER
-
-MLXBF_GIGE_DRIVER_VERSION = 1.1
-MLXBF_GIGE_DRIVER = mlxbf-gige.ko
-$(MLXBF_GIGE_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/mlxbf-gige
-$(MLXBF_GIGE_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+export TMFIFO_DRIVER TMFIFO_DRIVER_DKMS
 
+MLXBF_GIGE_DRIVER = mlxbf-gige
+MLXBF_GIGE_DRIVER_DKMS = $(MLXBF_GIGE_DRIVER)-dkms_1.0-0_all.deb
+$(MLXBF_GIGE_DRIVER_DKMS)_SRC_PATH = $(PLATFORM_PATH)/mlxbf-gige
+$(MLXBF_GIGE_DRIVER_DKMS)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+BFSOC_DKMS_DEBS += $(MLXBF_GIGE_DRIVER_DKMS)
 BF_PLATFORM_DRIVERS += $(MLXBF_GIGE_DRIVER)
-export MLXBF_GIGE_DRIVER_VERSION MLXBF_GIGE_DRIVER
-
-MLXBF3_GPIO_DRIVER_VERSION = 1.0
-MLXBF3_GPIO_DRIVER = gpio-mlxbf3.ko
-$(MLXBF3_GPIO_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/gpio-mlxbf3
-$(MLXBF3_GPIO_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+export MLXBF_GIGE_DRIVER MLXBF_GIGE_DRIVER_DKMS
 
+MLXBF3_GPIO_DRIVER = gpio-mlxbf3
+MLXBF3_GPIO_DRIVER_DKMS = $(MLXBF3_GPIO_DRIVER)-dkms_1.0-0_all.deb
+$(MLXBF3_GPIO_DRIVER_DKMS)_SRC_PATH = $(PLATFORM_PATH)/gpio-mlxbf3
+$(MLXBF3_GPIO_DRIVER_DKMS)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+BFSOC_DKMS_DEBS += $(MLXBF3_GPIO_DRIVER_DKMS)
 BF_PLATFORM_DRIVERS += $(MLXBF3_GPIO_DRIVER)
-export MLXBF3_GPIO_DRIVER_VERSION MLXBF3_GPIO_DRIVER
-
-ifeq ($(BFSOC_VERSION), 4.2.0)
-MLX_BOOTCTL_DRIVER_VERSION = 1.6
-else
-MLX_BOOTCTL_DRIVER_VERSION = 1.7
-endif
-MLX_BOOTCTL_DRIVER = mlx-bootctl.ko
-$(MLX_BOOTCTL_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/mlx-bootctl
-$(MLX_BOOTCTL_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+export MLXBF3_GPIO_DRIVER MLXBF3_GPIO_DRIVER_DKMS
+
+MLX_BOOTCTL_DRIVER = mlx-bootctl
+MLX_BOOTCTL_DRIVER_DKMS = $(MLX_BOOTCTL_DRIVER)-dkms_1.3-0_all.deb
+$(MLX_BOOTCTL_DRIVER_DKMS)_SRC_PATH = $(PLATFORM_PATH)/mlx-bootctl
+$(MLX_BOOTCTL_DRIVER_DKMS)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+BFSOC_DKMS_DEBS += $(MLX_BOOTCTL_DRIVER_DKMS)
+export MLX_BOOTCTL_DRIVER MLX_BOOTCTL_DRIVER_DKMS
+
+SDHCI_OF_DWCMSHC_DRIVER = sdhci-of-dwcmshc
+SDHCI_OF_DWCMSHC_DRIVER_DKMS = $(SDHCI_OF_DWCMSHC_DRIVER)-dkms_1.0-0_all.deb
+$(SDHCI_OF_DWCMSHC_DRIVER_DKMS)_SRC_PATH = $(PLATFORM_PATH)/sdhci-of-dwcmshc
+$(SDHCI_OF_DWCMSHC_DRIVER_DKMS)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+BFSOC_DKMS_DEBS += $(SDHCI_OF_DWCMSHC_DRIVER_DKMS)
+BF_PLATFORM_DRIVERS += $(SDHCI_OF_DWCMSHC_DRIVER)
+export SDHCI_OF_DWCMSHC_DRIVER SDHCI_OF_DWCMSHC_DRIVER_DKMS
 
-BF_PLATFORM_DRIVERS += $(MLX_BOOTCTL_DRIVER)
-export MLX_BOOTCTL_DRIVER_VERSION MLX_BOOTCTL_DRIVER
+MLXBF_PKA_DRIVER = mlxbf-pka
+MLXBF_PKA_DRIVER_DKMS = $(MLXBF_PKA_DRIVER)-dkms_2.0-1_all.deb
+$(MLXBF_PKA_DRIVER_DKMS)_SRC_PATH = $(PLATFORM_PATH)/mlxbf-pka
+$(MLXBF_PKA_DRIVER_DKMS)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+BFSOC_DKMS_DEBS += $(MLXBF_PKA_DRIVER_DKMS)
+BF_PLATFORM_DRIVERS += $(MLXBF_PKA_DRIVER)
+export MLXBF_PKA_DRIVER MLXBF_PKA_DRIVER_DKMS
 
-SDHCI_OF_DWCMSHC_DRIVER_VERSION = 1.0
-SDHCI_OF_DWCMSHC_DRIVER = sdhci-of-dwcmshc.ko
-$(SDHCI_OF_DWCMSHC_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/sdhci-of-dwcmshc
-$(SDHCI_OF_DWCMSHC_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+PWR_MLXBF_DRIVER = pwr-mlxbf
+PWR_MLXBF_DRIVER_DKMS = $(PWR_MLXBF_DRIVER)-dkms_1.0-0_all.deb
+$(PWR_MLXBF_DRIVER_DKMS)_SRC_PATH = $(PLATFORM_PATH)/pwr-mlxbf
+$(PWR_MLXBF_DRIVER_DKMS)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+BFSOC_DKMS_DEBS += $(PWR_MLXBF_DRIVER_DKMS)
+BF_PLATFORM_DRIVERS += $(PWR_MLXBF_DRIVER)
+export PWR_MLXBF_DRIVER PWR_MLXBF_DRIVER_DKMS
 
-BF_PLATFORM_DRIVERS += $(SDHCI_OF_DWCMSHC_DRIVER)
-export SDHCI_OF_DWCMSHC_DRIVER_VERSION SDHCI_OF_DWCMSHC_DRIVER
+MLXBF_PTM_DRIVER = mlxbf-ptm
+MLXBF_PTM_DRIVER_DKMS = $(MLXBF_PTM_DRIVER)-dkms_1.0-0_all.deb
+$(MLXBF_PTM_DRIVER_DKMS)_SRC_PATH = $(PLATFORM_PATH)/mlxbf-ptm
+$(MLXBF_PTM_DRIVER_DKMS)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+BFSOC_DKMS_DEBS += $(MLXBF_PTM_DRIVER_DKMS)
+BF_PLATFORM_DRIVERS += $(MLXBF_PTM_DRIVER)
+export MLXBF_PTM_DRIVER MLXBF_PTM_DRIVER_DKMS
 
 MLXBF_BOOTCTL_DEB_VERSION = 2.1
 MLXBF_BOOTCTL_DEB = mlxbf-bootctl_${MLXBF_BOOTCTL_DEB_VERSION}_${CONFIGURED_ARCH}.deb
@@ -110,30 +130,6 @@ $(MLXBF_BOOTCTL_DEB)_SRC_PATH = $(PLATFORM_PATH)/mlxbf-bootctl
 BFSOC_MAKE_DEBS += $(MLXBF_BOOTCTL_DEB)
 export MLXBF_BOOTCTL_DEB_VERSION MLXBF_BOOTCTL_DEB
 
-MLXBF_PKA_DRIVER_VERSION = 1.0
-MLXBF_PKA_DRIVER = mlxbf-pka.ko
-$(MLXBF_PKA_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/mlxbf-pka
-$(MLXBF_PKA_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
-
-BF_PLATFORM_DRIVERS += $(MLXBF_PKA_DRIVER)
-export MLXBF_PKA_DRIVER_VERSION MLXBF_PKA_DRIVER
-
-PWR_MLXBF_DRIVER_VERSION = 1.0
-PWR_MLXBF_DRIVER = pwr-mlxbf.ko
-$(PWR_MLXBF_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/pwr-mlxbf
-$(PWR_MLXBF_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
-
-BF_PLATFORM_DRIVERS += $(PWR_MLXBF_DRIVER)
-export PWR_MLXBF_DRIVER_VERSION PWR_MLXBF_DRIVER
-
-MLXBF_PTM_DRIVER_VERSION = 1.1
-MLXBF_PTM_DRIVER = mlxbf-ptm.ko
-$(MLXBF_PTM_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/mlxbf-ptm
-$(MLXBF_PTM_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
-
-BF_PLATFORM_DRIVERS += $(MLXBF_PTM_DRIVER)
-export MLXBF_PTM_DRIVER_VERSION MLXBF_PTM_DRIVER
-
 ifeq ($(BFB_IMG_TYPE), qp)
 BOOTIMAGES_BASE_URL = $(QP_BOOTIMAGES_BASE_URL)
 BOOTIMAGES = mlxbf-bootimages_$(BFSOC_VERSION)-$(BFSOC_REVISION)_arm64.deb
@@ -158,19 +154,19 @@ $(MLNX_BLUEFIELD_BUILD_SCRIPTS)_RDEPENDS += $(MLXBF_BOOTCTL_DEB) $(BOOTIMAGES)
 BFSOC_MAKE_DEBS += $(MLNX_BLUEFIELD_BUILD_SCRIPTS)
 export MLNX_BLUEFIELD_BUILD_SCRIPTS
 
-BF_PLATFORM_MODULE_VERSION = 1.0
+BF_PLATFORM_MODULE_VERSION = 2.0
 BF_PLATFORM_MODULE = bluefield-platform-modules_$(BF_PLATFORM_MODULE_VERSION)_arm64.deb
 $(BF_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/bluefield-platform-modules
-
-$(BF_PLATFORM_MODULE)_FILES = $(BF_PLATFORM_DRIVERS)
-
+$(BF_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(BFSOC_DKMS_DEBS)
 export BF_PLATFORM_MODULE_VERSION BF_PLATFORM_MODULE BF_PLATFORM_DRIVERS
 
 ifeq ($(BFSOC_FROM_INTERNAL), y)
-SONIC_MAKE_FILES += $(BF_PLATFORM_DRIVERS)
-SONIC_MAKE_DEBS += $(BFSOC_MAKE_DEBS) $(BF_PLATFORM_MODULE)
+SONIC_MAKE_DEBS += $(BFSOC_MAKE_DEBS) $(BFSOC_DKMS_DEBS)
 SONIC_ONLINE_DEBS += $(BFSOC_ONLINE_DEBS)
 else
-$(eval $(foreach file, $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS) $(BF_PLATFORM_MODULE), $(call make_url_bfsoc,$(file))))
-SONIC_ONLINE_DEBS += $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS) $(BF_PLATFORM_MODULE)
+$(eval $(foreach file, $(BFSOC_MAKE_DEBS) $(BFSOC_DKMS_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS), $(call make_url_bfsoc,$(file))))
+SONIC_ONLINE_DEBS += $(BFSOC_MAKE_DEBS) $(BFSOC_DKMS_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS)
 endif
+
+# Always build the platform modules, don't save the deb file to artifactory
+SONIC_MAKE_DEBS += $(BF_PLATFORM_MODULE)
diff --git a/platform/nvidia-bluefield/recipes/component-versions.mk b/platform/nvidia-bluefield/recipes/component-versions.mk
new file mode 100644
index 00000000000..ad03e122ab8
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/component-versions.mk
@@ -0,0 +1,23 @@
+#
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+COMPONENT_VERSIONS_FILE = component-versions
+$(COMPONENT_VERSIONS_FILE)_SRC_PATH = $(PLATFORM_PATH)/component-versions
+SONIC_MAKE_FILES += $(COMPONENT_VERSIONS_FILE)
+
+export COMPONENT_VERSIONS_FILE
\ No newline at end of file
diff --git a/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.dep b/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.dep
index 5cb508354f7..06fd35c5e22 100644
--- a/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.dep
+++ b/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.dep
@@ -5,7 +5,7 @@ DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
 DEP_FILES += $(shell git ls-files -- $(DPATH))
 
 $(DOCKER_SYNCD_BASE)_CACHE_MODE := GIT_CONTENT_SHA
-$(DOCKER_SYNCD_BASE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SYNCD_BASE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(SDK_VERSION) $(DPU_SAI_VERSION)
 $(DOCKER_SYNCD_BASE)_DEP_FILES := $(DEP_FILES)
 
 $(eval $(call add_dbg_docker,$(DOCKER_SYNCD_BASE),$(DOCKER_SYNCD_BASE_DBG)))
diff --git a/platform/nvidia-bluefield/recipes/dpu-sai.mk b/platform/nvidia-bluefield/recipes/dpu-sai.mk
index ec45c74b45d..e7a13b96927 100644
--- a/platform/nvidia-bluefield/recipes/dpu-sai.mk
+++ b/platform/nvidia-bluefield/recipes/dpu-sai.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -15,7 +15,7 @@
 # limitations under the License.
 #
 
-DPU_SAI_VERSION = SAIBuild0.0.39.0
+DPU_SAI_VERSION = SAIBuild0.0.44.0
 
 # Place here URL where SAI sources exist
 DPU_SAI_SOURCE_BASE_URL=
diff --git a/platform/nvidia-bluefield/recipes/fw.mk b/platform/nvidia-bluefield/recipes/fw.mk
index 8c0a59ec419..8610729c3fc 100644
--- a/platform/nvidia-bluefield/recipes/fw.mk
+++ b/platform/nvidia-bluefield/recipes/fw.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,7 +19,7 @@ DPU_NIC_FW_BASE_URL =
 DPU_NIC_FW_VERSION =
 BF3_FW_BASE_URL =
 
-BF3_FW_VERSION = 43.1014
+BF3_FW_VERSION = 45.1020
 
 BF3_FW_FILE = fw-BlueField-3-rel-32_$(subst .,_,$(BF3_FW_VERSION)).mfa
 
@@ -37,6 +37,7 @@ endif
 
 BF_FW_FILES = $(BF3_FW_FILE)
 
+export BF3_FW_VERSION
 export BF3_FW_FILE
 export BF_FW_FILES
 
diff --git a/platform/nvidia-bluefield/recipes/installer-image.mk b/platform/nvidia-bluefield/recipes/installer-image.mk
index d438c01cbb3..c0c58f2c6b3 100644
--- a/platform/nvidia-bluefield/recipes/installer-image.mk
+++ b/platform/nvidia-bluefield/recipes/installer-image.mk
@@ -1,5 +1,6 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -56,7 +57,7 @@ SONIC_PACKAGES_LOCAL := $(filter-out $(DISABLED_PACKAGES_LOCAL), $(SONIC_PACKAGE
 $(foreach feature, $(DISABLED_FEATURE_FLAGS), $(eval override $(feature)=n ))
 
 $(SONIC_BF_IMAGE_BASE)_DOCKERS = $(filter-out $(DISABLED_DOCKERS), $(SONIC_INSTALL_DOCKER_IMAGES))
-$(SONIC_BF_IMAGE_BASE)_FILES = $(BF_FW_FILES)
+$(SONIC_BF_IMAGE_BASE)_FILES = $(BF_FW_FILES) $(COMPONENT_VERSIONS_FILE)
 
 # The traditional *.bin image. Works for sonic-sonic upgrade.
 SONIC_BF_IMAGE_BIN = $(SONIC_BF_IMAGE_BASE).bin
diff --git a/platform/nvidia-bluefield/recipes/mft.mk b/platform/nvidia-bluefield/recipes/mft.mk
index f4b3722a1ea..94215f0a53a 100644
--- a/platform/nvidia-bluefield/recipes/mft.mk
+++ b/platform/nvidia-bluefield/recipes/mft.mk
@@ -14,8 +14,8 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-MFT_VERSION = 4.28.0
-MFT_REVISION = 96
+MFT_VERSION = 4.32.0
+MFT_REVISION = 120
 
 MFT_INTERNAL_SOURCE_BASE_URL =
 
diff --git a/platform/nvidia-bluefield/recipes/sdk.dep b/platform/nvidia-bluefield/recipes/sdk.dep
index 8c276b05e1f..d5c63ede73b 100644
--- a/platform/nvidia-bluefield/recipes/sdk.dep
+++ b/platform/nvidia-bluefield/recipes/sdk.dep
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -15,7 +15,7 @@
 # limitations under the License.
 #
 
-SDK_COMMON_FLAGS_LIST = $(SONIC_COMMON_FLAGS_LIST) $(SDK_VERSION)
+SDK_COMMON_FLAGS_LIST = $(SONIC_COMMON_FLAGS_LIST) $(SDK_VERSION) $(SDK_FROM_SRC)
 SDK_COMMON_FILES_LIST = $(SONIC_COMMON_BASE_FILES_LIST) \
 	$(SONIC_COMMON_FILES_LIST) \
 	$(PLATFORM_PATH)/recipes/sdk.mk \
@@ -29,7 +29,7 @@ DEP_FILES := $(SDK_COMMON_FILES_LIST)
 DEP_FILES += $(shell git ls-files -- $(SPATH))
 
 $(OFED_KERNEL)_CACHE_MODE := GIT_CONTENT_SHA
-$(OFED_KERNEL)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(OFED_KERNEL)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST) $(KVERSION)
 $(OFED_KERNEL)_DEP_FILES := $(DEP_FILES)
 
 $(MLNX_TOOLS)_CACHE_MODE := GIT_CONTENT_SHA
@@ -40,6 +40,10 @@ $(OFED_KERNEL_UTILS)_CACHE_MODE := GIT_CONTENT_SHA
 $(OFED_KERNEL_UTILS)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
 $(OFED_KERNEL_UTILS)_DEP_FILES := $(DEP_FILES)
 
+$(OFED_KERNEL_DKMS)_CACHE_MODE := GIT_CONTENT_SHA
+$(OFED_KERNEL_DKMS)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(OFED_KERNEL_DKMS)_DEP_FILES := $(DEP_FILES)
+
 # mlnx-iproute2
 
 SPATH := $($(MLNX_IPROUTE2)_SRC_PATH)
@@ -158,6 +162,16 @@ $(DOCA_FLOW_DEV)_CACHE_MODE := GIT_CONTENT_SHA
 $(DOCA_FLOW_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
 $(DOCA_FLOW_DEV)_DEP_FILES := $(DEP_FILES)
 
+# hw-streering
+
+$(LIB_NV_HWS)_CACHE_MODE := GIT_CONTENT_SHA
+$(LIB_NV_HWS)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(LIB_NV_HWS)_DEP_FILES := $(DEP_FILES)
+
+$(LIB_NV_HWS_DEV)_CACHE_MODE := GIT_CONTENT_SHA
+$(LIB_NV_HWS_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(LIB_NV_HWS_DEV)_DEP_FILES := $(DEP_FILES)
+
 # SDN appliance
 
 SPATH := $($(SDN_APPL)_SRC_PATH)
diff --git a/platform/nvidia-bluefield/recipes/sdk.mk b/platform/nvidia-bluefield/recipes/sdk.mk
index 2e3c23e5d15..32f64ae0a6e 100644
--- a/platform/nvidia-bluefield/recipes/sdk.mk
+++ b/platform/nvidia-bluefield/recipes/sdk.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,7 +19,7 @@ SDK_BASE_PATH = $(PLATFORM_PATH)/sdk-src/sonic-bluefield-packages/bin
 
 # Place here URL where SDK sources exist
 SDK_SOURCE_BASE_URL =
-SDK_VERSION = 25.1-RC5
+SDK_VERSION = 25.7-RC3
 
 SDK_COLLECTX_URL = https://linux.mellanox.com/public/repo/doca/1.5.2/debian12/aarch64/
 
@@ -78,21 +78,19 @@ $(OFED_KERNEL_DKMS)_DEPENDS = $(OFED_KERNEL_UTILS)
 
 OFED_KERNEL = mlnx-ofed-kernel-modules-$(KVERSION)_$(OFED_KERNEL_VER_SHORT)_$(BUILD_ARCH).deb
 $(OFED_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/ofed
-$(OFED_KERNEL)_DEPENDS = $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+$(OFED_KERNEL)_DEPENDS = $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(OFED_KERNEL_DKMS)
 
 ifeq ($(SDK_FROM_SRC), y)
-$(OFED_KERNEL)_DEPENDS += $(OFED_KERNEL_DKMS)
-
 $(eval $(call add_derived_package,$(MLNX_TOOLS),$(OFED_KERNEL_UTILS)))
 $(eval $(call add_derived_package,$(MLNX_TOOLS),$(OFED_KERNEL_DKMS)))
 else
-SDK_ONLINE_TARGETS += $(OFED_KERNEL_UTILS)
+SDK_ONLINE_TARGETS += $(OFED_KERNEL_UTILS) $(OFED_KERNEL_DKMS)
 endif
 
 export OFED_VER_SHORT OFED_VER_FULL OFED_KERNEL OFED_KERNEL_UTILS OFED_KERNEL_VER_FULL MLNX_TOOLS OFED_KERNEL_DKMS
 
-SDK_DEBS += $(OFED_KERNEL) $(MLNX_TOOLS) $(OFED_KERNEL_UTILS)
-SDK_SRC_TARGETS += $(OFED_KERNEL) $(MLNX_TOOLS)
+SDK_DEBS += $(MLNX_TOOLS) $(OFED_KERNEL_UTILS)
+SDK_SRC_TARGETS += $(MLNX_TOOLS)
 
 # MLNX iproute2
 MLNX_IPROUTE2_VER = $(call get_sdk_package_version_full,"mlnx-iproute2")
@@ -118,12 +116,13 @@ $(RDMA_CORE)_RDEPENDS = $(LIBNL3)
 $(RDMA_CORE)_DEPENDS = $(LIBNL3_DEV) $(LIBNL_ROUTE3_DEV)
 
 IB_VERBS_PROV = ibverbs-providers_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
-$(IB_VERBS_PROV)_DEPENDS = $(LIBNL3_DEV) $(LIBNL_ROUTE3_DEV)
+$(IB_VERBS_PROV)_DEPENDS = $(IB_VERBS) $(LIBNL3_DEV) $(LIBNL_ROUTE3_DEV)
 
 IB_VERBS = libibverbs1_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
 $(IB_VERBS)_DEPENDS = $(LIBNL3_DEV) $(LIBNL_ROUTE3_DEV)
+$(IB_VERBS)_RDEPENDS = $(LIBNL3_DEV) $(LIBNL_ROUTE3_DEV)
 IB_VERBS_DEV = libibverbs-dev_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
-$(IB_VERBS_DEV)_DEPENDS = $(IB_VERBS) $(IB_VERBS_PROV)
+$(IB_VERBS_DEV)_DEPENDS = $(LIBNL3_DEV) $(LIBNL_ROUTE3_DEV) $(IB_VERBS) $(IB_VERBS_PROV)
 
 IB_UMAD = libibumad3_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
 IB_UMAD_DEV = libibumad-dev_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
@@ -132,14 +131,6 @@ RDMACM = librdmacm1_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
 RDMACM_DEV = librdmacm-dev_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
 $(RDMACM_DEV)_DEPENDS = $(RDMACM) $(IB_VERBS_DEV)
 
-$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_VERBS_PROV)))
-$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_VERBS)))
-$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_VERBS_DEV)))
-$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_UMAD)))
-$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_UMAD_DEV)))
-$(eval $(call add_derived_package,$(RDMA_CORE),$(RDMACM)))
-$(eval $(call add_derived_package,$(RDMA_CORE),$(RDMACM_DEV)))
-
 export RDMA_CORE
 export IB_VERBS IB_VERBS_DEV
 export IB_VERBS_PROV
@@ -157,19 +148,30 @@ RDMA_CORE_DERIVED_DEBS = \
 
 export RDMA_CORE_DERIVED_DEBS
 
-SDK_DEBS += $(RDMA_CORE) $(RDMA_CORE_DERIVED_DEBS)
 SDK_SRC_TARGETS += $(RDMA_CORE)
 
+ifeq ($(SDK_FROM_SRC), y)
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_VERBS)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_VERBS_PROV)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_VERBS_DEV)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_UMAD)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_UMAD_DEV)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(RDMACM)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(RDMACM_DEV)))
+else
+SDK_ONLINE_TARGETS += $(RDMA_CORE_DERIVED_DEBS)
+endif
+
 # DPDK and derived packages
 
 DPDK_VER = $(call get_sdk_package_version_full,"dpdk")
 
 DPDK = mlnx-dpdk_${DPDK_VER}_${CONFIGURED_ARCH}.deb
 $(DPDK)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/dpdk
-$(DPDK)_RDEPENDS = $(IB_VERBS_PROV) $(IB_VERBS) $(IB_VERBS_DEV)
+$(DPDK)_RDEPENDS = $(IB_VERBS) $(IB_VERBS_PROV) $(IB_VERBS_DEV)
 
 DPDK_DEV = mlnx-dpdk-dev_${DPDK_VER}_${CONFIGURED_ARCH}.deb
-$(DPDK)_DEPENDS = $(RDMA_CORE) $(IB_VERBS_PROV) $(IB_VERBS) $(IB_VERBS_DEV)
+$(DPDK)_DEPENDS = $(RDMA_CORE) $(IB_VERBS) $(IB_VERBS_PROV) $(IB_VERBS_DEV)
 $(DPDK_DEV)_RDEPENDS = $(DPDK)
 
 $(eval $(call add_derived_package,$(DPDK),$(DPDK_DEV)))
@@ -219,8 +221,8 @@ DOCA_DEB_VERSION = $(DOCA_VERSION)-1
 
 DOCA_COMMON = doca-sdk-common_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
 $(DOCA_COMMON)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/doca
-$(DOCA_COMMON)_RDEPENDS = $(DPDK) $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(LIBGRPC_DEV)
-$(DOCA_COMMON)_DEPENDS = $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(DPDK_DEV) $(LIBGRPC_DEV)
+$(DOCA_COMMON)_RDEPENDS = $(DPDK) $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(LIBGRPC_DEV) $(LIB_NV_HWS)
+$(DOCA_COMMON)_DEPENDS = $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(DPDK_DEV) $(LIBGRPC_DEV) $(LIB_NV_HWS_DEV)
 DOCA_COMMON_DEV = libdoca-sdk-common-dev_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
 $(DOCA_COMMON_DEV)_DEPENDS = $(DOCA_COMMON)
 
@@ -232,7 +234,7 @@ export DOCA_COMMON DOCA_COMMON_DEV
 DOCA_ARGP = doca-sdk-argp_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
 $(DOCA_ARGP)_DEPENDS += $(DOCA_COMMON)
 DOCA_ARGP_DEV = libdoca-sdk-argp-dev_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
-$(DOCA_ARGP_DEV)_DEPENDS = $(DOCA_ARGP)
+$(DOCA_ARGP_DEV)_DEPENDS = $(DOCA_ARGP) $(DOCA_COMMON_DEV)
 
 DOCA_DEBS += $(DOCA_ARGP)
 DOCA_DEV_DEBS += $(DOCA_ARGP_DEV)
@@ -241,16 +243,16 @@ DOCA_DEV_DEBS += $(DOCA_ARGP_DEV)
 DOCA_DPDK_BRIDGE = doca-sdk-dpdk-bridge_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
 $(DOCA_DPDK_BRIDGE)_DEPENDS += $(DOCA_COMMON)
 DOCA_DPDK_BRIDGE_DEV = libdoca-sdk-dpdk-bridge-dev_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
-$(DOCA_DPDK_BRIDGE_DEV)_DEPENDS = $(DOCA_DPDK_BRIDGE)
+$(DOCA_DPDK_BRIDGE_DEV)_DEPENDS = $(DOCA_DPDK_BRIDGE) $(DOCA_COMMON_DEV)
 
 DOCA_DEBS += $(DOCA_DPDK_BRIDGE)
 DOCA_DEV_DEBS += $(DOCA_DPDK_BRIDGE_DEV)
 export DOCA_DPDK_BRIDGE DOCA_DPDK_BRIDGE_DEV
 
 DOCA_FLOW = doca-sdk-flow_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
-$(DOCA_FLOW)_DEPENDS += $(DOCA_COMMON)
+$(DOCA_FLOW)_DEPENDS += $(DOCA_COMMON) $(DOCA_DPDK_BRIDGE)
 DOCA_FLOW_DEV = libdoca-sdk-flow-dev_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
-$(DOCA_FLOW_DEV)_DEPENDS = $(DOCA_FLOW)
+$(DOCA_FLOW_DEV)_DEPENDS = $(DOCA_FLOW) $(DOCA_DPDK_BRIDGE_DEV)
 
 DOCA_DEBS += $(DOCA_FLOW)
 DOCA_DEV_DEBS += $(DOCA_FLOW_DEV)
@@ -272,6 +274,27 @@ else
 SONIC_ONLINE_DEBS += $(DOCA_DEBS) $(DOCA_DEV_DEBS)
 endif
 
+# hw-steering packages, needed for doca-flow runtime
+NV_HWS_VERSION = $(call get_sdk_package_version_full,"nv_hws")
+
+LIB_NV_HWS = libnvhws1_${NV_HWS_VERSION}_${CONFIGURED_ARCH}.deb
+$(LIB_NV_HWS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/nv_hws
+$(LIB_NV_HWS)_DEPENDS = $(IB_VERBS_DEV)
+
+LIB_NV_HWS_DEV = libnvhws-dev_${NV_HWS_VERSION}_${CONFIGURED_ARCH}.deb
+$(LIB_NV_HWS_DEV)_DEPENDS = $(LIB_NV_HWS)
+
+ifeq ($(SDK_FROM_SRC), y)
+$(eval $(call add_derived_package,$(LIB_NV_HWS),$(LIB_NV_HWS_DEV)))
+else
+SONIC_ONLINE_DEBS += $(LIB_NV_HWS) $(LIB_NV_HWS_DEV)
+endif
+
+SDK_SRC_TARGETS += $(LIB_NV_HWS)
+SDK_DEBS += $(LIB_NV_HWS) $(LIB_NV_HWS_DEV)
+
+export LIB_NV_HWS LIB_NV_HWS_DEV
+
 # SDN Appliance
 
 SDN_APPL_VER=$(call get_sdk_package_version_full,"nasa")
@@ -296,7 +319,10 @@ $(eval $(foreach deb,$(SDK_SRC_TARGETS) $(SDK_ONLINE_TARGETS) $(SDK_DEBS),$(call
 SONIC_ONLINE_DEBS += $(SDK_SRC_TARGETS) $(SDK_ONLINE_TARGETS)
 endif
 
-SDK_PACKAGES = $(OFED_KERNEL) $(OFED_KERNEL_UTILS) $(MLNX_IPROUTE2) $(SDK_ONLINE_TARGETS) $(SDK_SRC_TARGETS)
+# Always build the platform modules, don't save the deb file to artifactory
+SONIC_MAKE_DEBS += $(OFED_KERNEL)
+
+SDK_PACKAGES = $(OFED_KERNEL_UTILS) $(MLNX_IPROUTE2) $(SDK_ONLINE_TARGETS) $(SDK_SRC_TARGETS)
 
 sdk-packages: $(addprefix $(DEBS_PATH)/, $(SDK_PACKAGES))
 
diff --git a/platform/nvidia-bluefield/rules.mk b/platform/nvidia-bluefield/rules.mk
index e4cedfa28fa..3ccd6b1eb7a 100644
--- a/platform/nvidia-bluefield/rules.mk
+++ b/platform/nvidia-bluefield/rules.mk
@@ -1,5 +1,6 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -27,6 +28,7 @@ include $(PLATFORM_PATH)/$(RECIPE_DIR)/sdk.mk
 include $(PLATFORM_PATH)/$(RECIPE_DIR)/platform-api.mk
 include $(PLATFORM_PATH)/$(RECIPE_DIR)/docker-syncd-bluefield.mk
 include $(PLATFORM_PATH)/$(RECIPE_DIR)/installer-image.mk
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/component-versions.mk
 
 # Inject DPU sai into syncd
 $(SYNCD)_DEPENDS += $(DPU_SAI)
@@ -37,3 +39,4 @@ $(SYNCD)_RDEPENDS += $(DPU_SAI)
 
 # Inject mft into platform monitor
 $(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(MFT)
+$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(MLXBF_BOOTCTL_DEB)
diff --git a/platform/nvidia-bluefield/sdhci-of-dwcmshc/Makefile b/platform/nvidia-bluefield/sdhci-of-dwcmshc/Makefile
index f5fe67ffd64..f620db9ec70 100644
--- a/platform/nvidia-bluefield/sdhci-of-dwcmshc/Makefile
+++ b/platform/nvidia-bluefield/sdhci-of-dwcmshc/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,26 +19,21 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -ex
 
-SDHCI_OF_DWCMSHC = sdhci-of-dwcmshc-${SDHCI_OF_DWCMSHC_DRIVER_VERSION}
-
-MAIN_TARGET = $(SDHCI_OF_DWCMSHC_DRIVER)
-DERIVED_TARGETS =
+SDHCI_OF_DWCMSHC = $(SDHCI_OF_DWCMSHC_DRIVER)-1.0
 GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
 
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+$(addprefix $(DEST)/, $(SDHCI_OF_DWCMSHC_DRIVER_DKMS)): $(DEST)/% :
 	rm -rf ./tmp/
 	mkdir ./tmp/
 	pushd ./tmp/
 
 	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${SDHCI_OF_DWCMSHC}
-	
-	pushd ${SDHCI_OF_DWCMSHC}
-	find . -type f -exec touch {} +
 
-	# Build the Debs
-	KVER=$(KVERSION) WITH_DKMS=0 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	pushd ${SDHCI_OF_DWCMSHC}  
 
-	mv $(DERIVED_TARGETS) $* $(DEST)/
-	popd
+	# Build the package
+	KVER=$(KVERSION) WITH_DKMS=1 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	
+	mv ../$(SDHCI_OF_DWCMSHC_DRIVER_DKMS) $(DEST)
 
-$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
+	popd
diff --git a/platform/nvidia-bluefield/sdk-src/doca/0001-Add-WA-to-a-bug-in-doca-build-script-which-matches-o.patch b/platform/nvidia-bluefield/sdk-src/doca/0001-Add-WA-to-a-bug-in-doca-build-script-which-matches-o.patch
new file mode 100644
index 00000000000..8b0725a48ba
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/doca/0001-Add-WA-to-a-bug-in-doca-build-script-which-matches-o.patch
@@ -0,0 +1,30 @@
+From 8801a2b3e74e3383db4a7f630a0a7b439d34a7a1 Mon Sep 17 00:00:00 2001
+From: vkarri <vkarri@nvidia.com>
+Date: Fri, 30 May 2025 01:54:09 +0000
+Subject: [PATCH] Add WA to a bug in doca build script which matches on
+ prefixes
+
+doca-sdk-flow-dpa-provider depends on FlexIO but doca-sdk-flow does not. 
+build script because of the prefix match assumes doca-sdk-flow depends on FlexIO.
+Remove doca-sdk-flow-dpa-provider from FLEXIO_PACKAGES array until this is fixed in DOCA
+
+Signed-off-by: vkarri <vkarri@contoso.com>
+---
+ devtools/scripts/doca_build_packages.sh | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/devtools/scripts/doca_build_packages.sh b/devtools/scripts/doca_build_packages.sh
+index 44271ed..0f3c075 100755
+--- a/devtools/scripts/doca_build_packages.sh
++++ b/devtools/scripts/doca_build_packages.sh
+@@ -152,7 +152,6 @@ FLEXIO_PACKAGES=(
+     'doca-spcx-cc'
+     'doca-sdk-pcc-ztr-rttcc-algo'
+     'doca-sdk-sta'
+-    'doca-sdk-flow-dpa-provider'
+ )
+ 
+ CUDA_PACKAGES=(
+-- 
+2.39.5
+
diff --git a/platform/nvidia-bluefield/sdk-src/doca/0001-Allow-compilation-with-warnings.patch b/platform/nvidia-bluefield/sdk-src/doca/0001-Allow-compilation-with-warnings.patch
deleted file mode 100644
index 59893a07a01..00000000000
--- a/platform/nvidia-bluefield/sdk-src/doca/0001-Allow-compilation-with-warnings.patch
+++ /dev/null
@@ -1,13 +0,0 @@
-diff --git a/meson.build b/meson.build
-index 06e71ab..c674944 100644
---- a/meson.build
-+++ b/meson.build
-@@ -16,7 +16,7 @@ project('DOCA', 'C', 'CPP',
- 	version: run_command(find_program('cat', 'more'), files('VERSION'), check: true).stdout().strip(),
- 	default_options: [
- 		'buildtype=debug',
--		'werror=true',
-+		'werror=false',
- 		'warning_level=2',
- 		'b_staticpic=true',
- 		'prefix=/opt/mellanox/doca',
diff --git a/platform/nvidia-bluefield/sdk-src/doca/0001-Remove-meson-from-connectx-dependencies.patch b/platform/nvidia-bluefield/sdk-src/doca/0001-Remove-meson-from-connectx-dependencies.patch
deleted file mode 100644
index 4823ce1aed1..00000000000
--- a/platform/nvidia-bluefield/sdk-src/doca/0001-Remove-meson-from-connectx-dependencies.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-diff --git a/configs/profiles/connectx/debian/control b/configs/profiles/connectx/debian/control
-index 62f9403..fea0155 100644
---- a/configs/profiles/connectx/debian/control
-+++ b/configs/profiles/connectx/debian/control
-@@ -4,7 +4,6 @@ Maintainer: <networking-support@nvidia.com>
- Build-Depends: debhelper (>= 10~),
- 	       gcc,
- 	       g++,
--	       meson,
- 	       pkg-config,
- 	       libibverbs-dev,
- 	       mlnx-dpdk-dev,
-@@ -55,7 +54,6 @@ Architecture: amd64 arm64 armhf i386 ppc64el
- Depends: ${misc:Depends},
- 	 libdoca-cx-libs-dev,
- 	 gcc,
--	 meson,
- 	 pkg-config,
- 	 mlnx-dpdk-dev,
- 	 libjson-c-dev,
-@@ -71,7 +69,6 @@ Architecture: amd64 arm64 armhf i386 ppc64el
- Depends: ${misc:Depends},
- 	 libdoca-cx-libs-dev,
- 	 gcc,
--	 meson,
- 	 pkg-config,
- 	 mlnx-dpdk-dev,
- 	 libjson-c-dev
diff --git a/platform/nvidia-bluefield/sdk-src/doca/Makefile b/platform/nvidia-bluefield/sdk-src/doca/Makefile
index e1aebe3dbed..ee476aaa193 100644
--- a/platform/nvidia-bluefield/sdk-src/doca/Makefile
+++ b/platform/nvidia-bluefield/sdk-src/doca/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -36,6 +36,8 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	pushd doca/
 	find . -type f -exec touch {} +
 
+	patch -p1 < ../0001-Add-WA-to-a-bug-in-doca-build-script-which-matches-o.patch
+
 	source /etc/profile.d/mlnx-dpdk-aarch64-linux-gnu.sh
 	source ./devtools/public/set_env_variables.sh  --deb
 
diff --git a/platform/nvidia-bluefield/sdk-src/nv_hws/.gitignore b/platform/nvidia-bluefield/sdk-src/nv_hws/.gitignore
new file mode 100644
index 00000000000..6dbdff4573b
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/nv_hws/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdk-src/nv_hws/Makefile b/platform/nvidia-bluefield/sdk-src/nv_hws/Makefile
new file mode 100644
index 00000000000..f4abb81fc14
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/nv_hws/Makefile
@@ -0,0 +1,42 @@
+#
+# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+
+MAIN_TARGET = $(LIB_NV_HWS)
+DERIVED_TARGETS = $(LIB_NV_HWS_DEV)
+NV_HWS_PATH := $(shell pwd)/nv_hws
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+
+	# get sources
+	rm -rf nv_hws/ nv_hws.zip
+
+	# get sources
+	wget $(SDK_SOURCE_URL)/nv_hws.zip
+	unzip nv_hws.zip
+
+	pushd nv_hws/
+	PATH=/usr/bin/:$(PATH) dpkg-buildpackage -d -us -uc -b -j1 --admindir $(SONIC_DPKG_ADMINDIR)
+	popd
+
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/nvidia-bluefield/sdk-src/rdma/Makefile b/platform/nvidia-bluefield/sdk-src/rdma/Makefile
index 006c930b27d..08140b5edc7 100644
--- a/platform/nvidia-bluefield/sdk-src/rdma/Makefile
+++ b/platform/nvidia-bluefield/sdk-src/rdma/Makefile
@@ -37,7 +37,9 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	pushd rdma-core-*/
 	find . -type f -exec touch {} +
 
-	patch -p1 < ../../../disable-ibverb-dependencies.patch
+	# Comment out the Breaks dependency on ibverbs-providers to avoid circular dependency issues
+	# during package installation, since ibverbs-providers and libibverbs1 depend on each other
+	sed -i 's/^Breaks: ibverbs-providers/#Breaks: ibverbs-providers/' ./debian/control
 
 	find . -type f -exec touch {} +
 
diff --git a/platform/nvidia-bluefield/sdk-src/rdma/disable-ibverb-dependencies.patch b/platform/nvidia-bluefield/sdk-src/rdma/disable-ibverb-dependencies.patch
deleted file mode 100644
index b551b9e48df..00000000000
--- a/platform/nvidia-bluefield/sdk-src/rdma/disable-ibverb-dependencies.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-diff --git a/debian/control b/debian/control
-index 0ef86f4..3e8dfb1 100644
---- a/debian/control
-+++ b/debian/control
-@@ -65,7 +65,7 @@ Description: InfiniBand Communication Manager Assistant (ACM)
- Package: ibverbs-providers
- Architecture: linux-any
- Multi-Arch: same
--Depends: ${misc:Depends}, ${shlibs:Depends}
-+#Depends: ${misc:Depends}, ${shlibs:Depends}
- Provides: libefa1, libipathverbs1, libmana1, libmlx5-1, libmthca1
- Replaces: libipathverbs1,
-           libmlx5-1,
-@@ -138,7 +138,7 @@ Section: libs
- Pre-Depends: ${misc:Pre-Depends}
- Depends: adduser, ${misc:Depends}, ${shlibs:Depends}
- Recommends: ibverbs-providers
--Breaks: ibverbs-providers (<< 34~)
-+#Breaks: ibverbs-providers (<< 34~)
- Description: Library for direct userspace use of RDMA (InfiniBand/iWARP)
-  libibverbs is a library that allows userspace processes to use RDMA
-  "verbs" as described in the InfiniBand Architecture Specification and
diff --git a/platform/nvidia-bluefield/tmfifo/Makefile b/platform/nvidia-bluefield/tmfifo/Makefile
index 0aaea9c33c4..f5a466354d3 100644
--- a/platform/nvidia-bluefield/tmfifo/Makefile
+++ b/platform/nvidia-bluefield/tmfifo/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,11 +19,10 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -ex
 
-TMFIFO = tmfifo-${TMFIFO_DRIVER_VERSION}
-MODULE_DIR := $(shell pwd)/tmp/${TMFIFO}
+TMFIFO = tmfifo-1.7
 GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
 
-$(addprefix $(DEST)/, $(TMFIFO_DRIVER)): $(DEST)/% :
+$(addprefix $(DEST)/, $(TMFIFO_DRIVER_DKMS)): $(DEST)/% :
 	rm -rf ./tmp/
 	mkdir ./tmp/
 	pushd ./tmp/
@@ -32,8 +31,8 @@ $(addprefix $(DEST)/, $(TMFIFO_DRIVER)): $(DEST)/% :
 
 	pushd ${TMFIFO}
 
-	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
-	
-	mv ${TMFIFO_DRIVER} $(DEST)/
-	popd
+	# Build the package
+	KVER=$(KVERSION) WITH_DKMS=1 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
 
+	mv ../${TMFIFO_DRIVER_DKMS} $(DEST)/
+	popd
diff --git a/platform/pensando/docker-dpu-base.dep b/platform/pensando/docker-dpu-base.dep
index fbc438fd3b3..37ca3ebfd34 100644
--- a/platform/pensando/docker-dpu-base.dep
+++ b/platform/pensando/docker-dpu-base.dep
@@ -1,4 +1,4 @@
-DEP_FILES := rules/docker-dpu-base.dep rules/docker-dpu-base.mk
+DEP_FILES := rules/docker-dpu-base.dep rules/docker-dpu-base.mk platform/checkout/template.j2 platform/checkout/pensando.ini
 
 $(DOCKER_DPU_BASE)_CACHE_MODE  := none
 $(DOCKER_DPU_BASE)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/pensando/docker-dpu-base.mk b/platform/pensando/docker-dpu-base.mk
index 129cba00e25..a17f71ea3ad 100644
--- a/platform/pensando/docker-dpu-base.mk
+++ b/platform/pensando/docker-dpu-base.mk
@@ -4,7 +4,7 @@ DOCKER_DPU_BASE_STEM = docker-dpu-base
 
 DOCKER_DPU_BASE = $(DOCKER_DPU_BASE_STEM).gz
 
-$(DOCKER_DPU_BASE)_URL = https://github.com/pensando/dsc-artifacts/blob/main/docker-dpu-base.gz?raw=true
+$(DOCKER_DPU_BASE)_PATH = $(PLATFORM_PATH)/pensando-sonic-artifacts
 
-DOWNLOADED_DOCKER_IMAGES += $(DOCKER_DPU_BASE)
+COPY_DOCKER_IMAGES += $(DOCKER_DPU_BASE)
 
diff --git a/platform/pensando/dsc-drivers/debian/control b/platform/pensando/dsc-drivers/debian/control
index 07d8ed353b3..80c00a7a6e1 100644
--- a/platform/pensando/dsc-drivers/debian/control
+++ b/platform/pensando/dsc-drivers/debian/control
@@ -10,5 +10,5 @@ Standards-Version: 3.9.3
 Package: ionic-modules
 Architecture: arm64
 Section: main
-Depends: linux-image-6.1.0-22-2-arm64-unsigned
+Depends: linux-image-6.1.0-29-2-arm64-unsigned
 Description: kernel modules for pensando elba
diff --git a/platform/pensando/dsc-drivers/debian/ionic-modules.install b/platform/pensando/dsc-drivers/debian/ionic-modules.install
index c6ed0cd5289..3683f7c2af8 100644
--- a/platform/pensando/dsc-drivers/debian/ionic-modules.install
+++ b/platform/pensando/dsc-drivers/debian/ionic-modules.install
@@ -1,6 +1,6 @@
-src/drivers/linux/build/mdev.ko lib/modules/6.1.0-22-2-arm64/extra
-src/drivers/linux/build/mnet_uio_pdrv_genirq.ko lib/modules/6.1.0-22-2-arm64/extra
-src/drivers/linux/build/ionic_mnic.ko lib/modules/6.1.0-22-2-arm64/extra
-src/drivers/linux/pciesvc/6.1.0-22-2-arm64/pciesvc.ko lib/modules/6.1.0-22-2-arm64/extra
-src/drivers/linux/pciesvc/6.1.0-22-2-arm64/pciesvc_upg.ko lib/modules/6.1.0-22-2-arm64/extra
+src/drivers/linux/build/mdev.ko lib/modules/6.1.0-29-2-arm64/extra
+src/drivers/linux/build/mnet_uio_pdrv_genirq.ko lib/modules/6.1.0-29-2-arm64/extra
+src/drivers/linux/build/ionic_mnic.ko lib/modules/6.1.0-29-2-arm64/extra
+src/drivers/linux/pciesvc/6.1.0-29-2-arm64/pciesvc.ko lib/modules/6.1.0-29-2-arm64/extra
+src/drivers/linux/pciesvc/6.1.0-29-2-arm64/pciesvc_upg.ko lib/modules/6.1.0-29-2-arm64/extra
 systemd/ionic-modules.service lib/systemd/system
diff --git a/platform/pensando/dsc-drivers/debian/rules b/platform/pensando/dsc-drivers/debian/rules
index 71ec4157e17..1fff71dbd78 100755
--- a/platform/pensando/dsc-drivers/debian/rules
+++ b/platform/pensando/dsc-drivers/debian/rules
@@ -26,11 +26,11 @@ clean:
 	dh_testroot
 	dh_clean
 	ARCH=aarch64 KSRC=/lib/modules/$(KVERSION)/build KMOD_OUT_DIR=$(CURDIR)/src/drivers/linux/build KMOD_SRC_DIR=$(CURDIR)/src/drivers/linux make -C $(CURDIR)/src/drivers/linux clean
-	ARCH=aarch64 KSRC=/lib/modules/$(KVERSION)/build KMOD_OUT_DIR=$(CURDIR)/src/drivers/linux/build KMOD_SRC_DIR=$(CURDIR)/src/drivers/linux/pciesvc make -C $(CURDIR)/src/drivers/linux/pciesvc clean
+	ARCH=aarch64 KMOD_OUT_DIR=$(CURDIR)/src/drivers/linux/build KMOD_SRC_DIR=$(CURDIR)/src/drivers/linux/pciesvc make -C $(CURDIR)/src/drivers/linux/pciesvc clean
 
 build:
 	ARCH=aarch64 KSRC=/lib/modules/$(KVERSION)/build KMOD_OUT_DIR=$(CURDIR)/src/drivers/linux/build KMOD_SRC_DIR=$(CURDIR)/src/drivers/linux/ make -C $(CURDIR)/src/drivers/linux
-	ARCH=aarch64 KSRC=/lib/modules/$(KVERSION)/build KMOD_OUT_DIR=$(CURDIR)/src/drivers/linux/build KMOD_SRC_DIR=$(CURDIR)/src/drivers/linux/pciesvc make -C $(CURDIR)/src/drivers/linux/pciesvc
+	ARCH=aarch64 KMOD_OUT_DIR=$(CURDIR)/src/drivers/linux/build KMOD_SRC_DIR=$(CURDIR)/src/drivers/linux/pciesvc make -C $(CURDIR)/src/drivers/linux/pciesvc
 
 binary: binary-arch binary-indep
 	# Nothing to do
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile
index af637cb2f41..d2e3d2cda7b 100644
--- a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile
@@ -16,14 +16,13 @@ kpci += $(pciesvc-obj)
 INCLUDES = -I/sonic/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc \
 	   -I/sonic/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include \
 	   -I/sonic/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src \
-	   -I/sonic/src/sonic-linux-kernel/linux-6.1.94/include/linux
+	   -I/usr/src/linux-headers-$(shell echo $(KVERSION) | sed 's/-arm64//')-common/include/linux
 	   #-I/usr/include \
-	   #-I$(PWD) \
-	   #-I/sonic/src/sonic-linux-kernel/linux-6.1.94/debian/build/build_arm64_none_arm64
+	   #-I$(PWD)
 $(MODNAME)-y := $(kpci) kpci_get_entry.o kpcimgr_module.o kpcinterface.o \
 	     kpci_entry.o kpci_kexec.o kpci_test.o pciesvc_end.o
 
-KDIR := /sonic/src/sonic-linux-kernel/linux-6.1.94/debian/build/build_arm64_none_arm64
+KDIR := /lib/modules/$(KVERSION)/build
 PWD := $(shell pwd)
 UTS := X$(shell grep UTS_RELEASE $(KDIR)/include/generated/utsrelease.h)
 REL := $(shell echo $(UTS) | awk '{ print $$3 }' | sed -e 's/"//g')
@@ -46,7 +45,7 @@ cc-option = $(shell set -e;		\
 	fi)
 
 KCFLAGS = -fno-jump-tables -fno-stack-protector -fno-function-sections -fno-dse -ffreestanding -fno-builtin
-KCFLAGS += -fno-data-sections -isystem /usr/lib/gcc/aarch64-linux-gnu/12/include
+KCFLAGS += -fno-data-sections
 KCFLAGS += $(call cc-option,-fno-store-merging,)
 KCFLAGS += $(INCLUDES) -DASIC_ELBA -DPCIESVC_SYSTEM_EXTERN
 KOPT = KCFLAGS="$(KCFLAGS)"
diff --git a/platform/pensando/platform.conf b/platform/pensando/platform.conf
index 8b4be02c384..7e76bb8face 100644
--- a/platform/pensando/platform.conf
+++ b/platform/pensando/platform.conf
@@ -25,6 +25,9 @@ ROOT_PARTUUID=C7F48DD2-C265-404B-959D-C64D21D49168
 ROOT_PARTSIZE=24G
 EMMC_MIN_SIZE=32G
 
+# Sonic kernel version
+KVER=6.1.0-29-2-arm64
+
 exec 0< /dev/tty 1> /dev/tty 2> /dev/tty
 
 PKG=""
@@ -190,8 +193,8 @@ cat <<EOF >> $bl_conf_path/$BL_CONF
 default main
 
 label main
-	kernel /$image_dir/boot/vmlinuz-6.1.0-22-2-arm64
-	initrd /$image_dir/boot/initrd.img-6.1.0-22-2-arm64
+	kernel /$image_dir/boot/vmlinuz-$KVER
+	initrd /$image_dir/boot/initrd.img-$KVER
 	devicetree /$image_dir/boot/elba-asic-psci.dtb
 	append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs isolcpus=1,2,3,5,6,7,9,10,11,13,14,15 nohz_full=1,2,3,5,6,7,9,10,11,13,14,15 rcu_nocbs=1,2,3,5,6,7,9,10,11,13,14,15 rcu_nocb_poll irqaffinity=0
 }
@@ -206,8 +209,8 @@ cat <<EOF >> $bl_conf_path/$BL_CONF
 default main
 
 label main
-	kernel /$image_dir/boot/vmlinuz-6.1.0-22-2-arm64
-	initrd /$image_dir/boot/initrd.img-6.1.0-22-2-arm64
+	kernel /$image_dir/boot/vmlinuz-$KVER
+	initrd /$image_dir/boot/initrd.img-$KVER
 	devicetree /$image_dir/boot/elba-asic-psci-mtfuji.dtb
 	append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs isolcpus=1,2,3,5,6,7,9,10,11,13,14,15 nohz_full=1,2,3,5,6,7,9,10,11,13,14,15 rcu_nocbs=1,2,3,5,6,7,9,10,11,13,14,15 rcu_nocb_poll irqaffinity=0
 }
@@ -222,8 +225,8 @@ cat <<EOF >> $bl_conf_path/$BL_CONF
 default main
 
 label main
-	kernel /$image_dir/boot/vmlinuz-6.1.0-22-2-arm64
-	initrd /$image_dir/boot/initrd.img-6.1.0-22-2-arm64
+	kernel /$image_dir/boot/vmlinuz-$KVER
+	initrd /$image_dir/boot/initrd.img-$KVER
 	devicetree /$image_dir/boot/elba-asic-psci-lipari.dtb
 	append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs isolcpus=1,2,3,5,6,7,9,10,11,13,14,15 nohz_full=1,2,3,5,6,7,9,10,11,13,14,15 rcu_nocbs=1,2,3,5,6,7,9,10,11,13,14,15 rcu_nocb_poll irqaffinity=0
 }
diff --git a/platform/pensando/sdk.mk b/platform/pensando/sdk.mk
index 072ac893b76..c527076354b 100644
--- a/platform/pensando/sdk.mk
+++ b/platform/pensando/sdk.mk
@@ -1,10 +1,10 @@
 # Pensando SAI
 PENSANDO_SAI = libsai_1.10.1-0_arm64.deb
 PENSANDO_SAI_DEV = libsai-dev_1.10.1-0_arm64.deb
-$(PENSANDO_SAI)_URL = https://github.com/pensando/dsc-artifacts/blob/main/libsai_1.10.1-0_arm64.deb?raw=true
-$(PENSANDO_SAI_DEV)_URL = https://github.com/pensando/dsc-artifacts/blob/main/libsai-dev_1.10.1-0_arm64.deb?raw=true
+$(PENSANDO_SAI)_PATH = $(PLATFORM_PATH)/pensando-sonic-artifacts
+$(PENSANDO_SAI_DEV)_PATH = $(PLATFORM_PATH)/pensando-sonic-artifacts
 
 $(eval $(call add_conflict_package,$(PENSANDO_SAI_DEV),$(LIBSAIVS_DEV)))
 
-SONIC_ONLINE_DEBS += $(PENSANDO_SAI)
-SONIC_ONLINE_DEBS += $(PENSANDO_SAI_DEV)
+SONIC_COPY_DEBS += $(PENSANDO_SAI)
+SONIC_COPY_DEBS += $(PENSANDO_SAI_DEV)
diff --git a/platform/pensando/sonic-platform-modules-dpu/dpu/service/dpu_provisioning.service b/platform/pensando/sonic-platform-modules-dpu/dpu/service/dpu_provisioning.service
deleted file mode 100644
index 66633a7ba0c..00000000000
--- a/platform/pensando/sonic-platform-modules-dpu/dpu/service/dpu_provisioning.service
+++ /dev/null
@@ -1,16 +0,0 @@
-[Unit]
-Description=dpu config db provisioning
-Requires=docker.service
-After=docker.service
-After=dpu.service
-Requires=dpu.service
-Before=database.service
-
-[Service]
-User=root
-ExecStart=/usr/local/bin/dpu_provisioning.sh
-StandardOutput=syslog
-StandardError=syslog
-
-[Install]
-WantedBy=multi-user.target
diff --git a/platform/pensando/sonic-platform-modules-dpu/dpu/utils/dpu_pensando_util.py b/platform/pensando/sonic-platform-modules-dpu/dpu/utils/dpu_pensando_util.py
index b2e222a8dfd..12660508394 100644
--- a/platform/pensando/sonic-platform-modules-dpu/dpu/utils/dpu_pensando_util.py
+++ b/platform/pensando/sonic-platform-modules-dpu/dpu/utils/dpu_pensando_util.py
@@ -35,21 +35,81 @@ def run_cmd(cmd):
     return output
 
 def fetch_dpu_files():
+    api_helper_platform = apiHelper.get_platform()
+    platform = api_helper_platform if api_helper_platform != None else "arm64-elba-asic-r0"
     docker_id = apiHelper.get_dpu_docker_imageID()
-    cmd = "sudo docker cp {}:/tmp/fru.json /home/admin".format(docker_id)
-    run_cmd(cmd)
-    cmd = "sudo docker cp {}:/nic/bin/cpldapp /home/admin".format(docker_id)
-    run_cmd(cmd)
-    cmd = "sudo docker cp {}:/nic/lib/libpal.so /home/admin".format(docker_id)
-    run_cmd(cmd)
-    cmd = "sudo docker cp {}:/nic/lib/liblogger.so /home/admin".format(docker_id)
+    cmd = "sudo docker cp {}:/tmp/fru.json /usr/share/sonic/device/{}/fru.json".format(docker_id, platform)
     run_cmd(cmd)
-    cmd = "sudo docker cp {}:/nic/etc/VERSION.json /home/admin".format(docker_id)
+    cmd = "sudo docker cp {}:/nic/etc/VERSION.json /usr/share/sonic/device/{}/VERSION.json".format(docker_id, platform)
     run_cmd(cmd)
     cmd = "sudo docker cp {}:/usr/bin/mmc /usr/local/bin".format(docker_id)
     run_cmd(cmd)
+    try:
+        slot_id = apiHelper.run_docker_cmd("cpldapp -r 0xA").strip()
+        file = "/usr/share/sonic/device/{}/dpu_slot_id".format(apiHelper.get_platform())
+        with open(file, "w") as f:
+            f.write(slot_id)
+    except Exception as e:
+        log_err("failed to setup slot_id at platform dir due to {}".format(e))
+
+    try:
+        board_id = apiHelper.run_docker_cmd("cpldapp -r 0x80").strip()
+        file = "/usr/share/sonic/device/{}/dpu_board_id".format(apiHelper.get_platform())
+        with open(file, "w") as f:
+            f.write(board_id)
+    except Exception as e:
+        log_err("failed to setup board_id at platform dir due to {}".format(e))
+
+
+def setup_platform_components_json(slot_id):
+    try:
+        api_helper_platform = apiHelper.get_platform()
+        platform = api_helper_platform if api_helper_platform != None else "arm64-elba-asic-r0"
+        filename = "/usr/share/sonic/device/{}/platform_components.json".format(platform)
+        with open(filename, "r") as f:
+            data = json.load(f)
+
+        def replace_keys(obj):
+            if isinstance(obj, dict):
+                return {key.replace("-0", f"-{slot_id}"): replace_keys(value) for key, value in obj.items()}
+            elif isinstance(obj, list):
+                return [replace_keys(item) for item in obj]
+            return obj
+
+        updated_data = replace_keys(data)
+
+        with open(filename, "w") as f:
+            json.dump(updated_data, f, indent=4)
+        log_info("successfully updated platform_components.json")
+    except Exception as e:
+        log_err("failed to setup platform_components.json due to {}".format(e))
+
+def config_setup():
+    try:
+        from sonic_platform.chassis import Chassis
+        slot_id = Chassis().get_my_slot()
+    except Exception as e:
+        log_err("failed to get slot id due to {}".format(e))
+
+    try:
+        cmd = f'sonic-cfggen -a "{{\\"INTERFACE\\": {{\\"Ethernet0\\": {{}},\\"Ethernet0|18.{slot_id}.202.1/31\\": {{}}}}}}" --write-to-db'
+        run_cmd(cmd)
+    except Exception as e:
+        log_err("failed to set Ethernet0 ip due to {}".format(e))
+
+    setup_platform_components_json(slot_id)
+
+    try:
+        run_cmd("mkdir -p /host/images")
+        run_cmd("mkdir -p /data")
+        run_cmd("chmod +x /boot/install_file")
+    except Exception as e:
+        log_err("failed to setup fwutil due to {}".format(e))
+
 
 def set_onie_version():
+    api_helper_platform = apiHelper.get_platform()
+    platform = api_helper_platform if api_helper_platform != None else "arm64-elba-asic-r0"
     version = ''
     try:
         cmd = 'cat /host/machine.conf | grep -i onie_version'
@@ -66,7 +126,7 @@ def set_onie_version():
             version = "Not Available"
             pass
     try:
-        fru_file = "/home/admin/fru.json"
+        fru_file = "/usr/share/sonic/device/{}/fru.json".format(platform)
         data = json.load(open(fru_file))
         data["onie_version"] = version
         with open(fru_file, "w") as json_file:
@@ -74,28 +134,6 @@ def set_onie_version():
     except:
         pass
 
-def cp_to_shared_mem():
-    api_helper_platform = apiHelper.get_platform()
-    platform = api_helper_platform if api_helper_platform != None else "arm64-elba-asic-r0"
-    cmd = "sudo cp /home/admin/fru.json /usr/share/sonic/device/{}/fru.json".format(platform)
-    run_cmd(cmd)
-    cmd = "sudo cp /home/admin/cpldapp /usr/share/sonic/device/{}/cpldapp".format(platform)
-    run_cmd(cmd)
-    cmd = "sudo cp /home/admin/libpal.so /usr/share/sonic/device/{}/libpal.so".format(platform)
-    run_cmd(cmd)
-    cmd = "sudo cp /home/admin/liblogger.so /usr/share/sonic/device/{}/liblogger.so".format(platform)
-    run_cmd(cmd)
-    cmd = "sudo cp /home/admin/VERSION.json /usr/share/sonic/device/{}/VERSION.json".format(platform)
-    run_cmd(cmd)
-
-def set_cpldapp():
-    cmd = "sudo cp /home/admin/cpldapp /usr/local/bin"
-    run_cmd(cmd)
-    cmd = "sudo cp /home/admin/libpal.so /lib/libpal.so"
-    run_cmd(cmd)
-    cmd = "sudo cp /home/admin/liblogger.so /lib/liblogger.so"
-    run_cmd(cmd)
-
 def set_ubootenv_config():
     cmd = "cat /proc/mtd | grep -e 'ubootenv' | awk '{print $1}' | tr -dc '0-9'"
     mtd_ubootenv = run_cmd(cmd)
@@ -111,7 +149,7 @@ def configure_iptable_rules():
         pass
 
 def pcie_tx_setup():
-    dpu_slot_id = int(run_cmd("cpldapp -r 0xA").strip(), 16)
+    dpu_slot_id = int(apiHelper.run_docker_cmd("cpldapp -r 0xA").strip(), 16)
     if dpu_slot_id == 6 or dpu_slot_id == 7:
         run_cmd("docker exec polaris /nic/tools/run-aacs-server.sh -p 9001 export SERDES_DUT_IP=localhost:9001")
         run_cmd("docker exec -e SERDES_ADDR=1:1-1:3f -e SERDES_DUT_IP=localhost:9001 -e SERDES_SBUS_RINGS=4 polaris aapl serdes -addr 1:39 -pre 0 -post 0 -atten 10")
@@ -131,13 +169,12 @@ def main():
         set_ubootenv_config()
     except:
         pass
-    time.sleep(10)
+    time.sleep(5)
     configure_iptable_rules()
     fetch_dpu_files()
+    config_setup()
     time.sleep(5)
     set_onie_version()
-    cp_to_shared_mem()
-    set_cpldapp()
     pcie_tx_setup()
 
 if __name__ == "__main__":
diff --git a/platform/pensando/sonic-platform-modules-dpu/dpu/utils/dpu_provisioning.sh b/platform/pensando/sonic-platform-modules-dpu/dpu/utils/dpu_provisioning.sh
deleted file mode 100755
index bb77fd15093..00000000000
--- a/platform/pensando/sonic-platform-modules-dpu/dpu/utils/dpu_provisioning.sh
+++ /dev/null
@@ -1,75 +0,0 @@
-#!/bin/bash
-
-device="/usr/share/sonic/device"
-platform=$(grep 'onie_platform=' /host/machine.conf | cut -d '=' -f 2)
-pipeline=`cat /usr/share/sonic/device/$platform/default_pipeline`
-docker_name=$pipeline
-if [ "$pipeline" == "rudra" ]; then
-    docker_name="dpu"
-fi
-hex_val=$(docker exec -i $docker_name cpldapp -r 0xA | tr -d '\r')
-val=$((hex_val))
-
-echo "dpu provisioning for dpu $val"
-
-if [ -f /boot/first_boot ]; then
-    if [ "$platform" == "arm64-elba-asic-flash128-r0" ]; then
-        echo "python3 -m pip install $device/$platform/sonic_platform-1.0-py3-none-any.whl"
-        python3 -m pip install $device/$platform/sonic_platform-1.0-py3-none-any.whl
-        echo "cp /usr/share/sonic/device/$platform/config_db.json /etc/sonic/config_db.json"
-        cp /usr/share/sonic/device/$platform/config_db.json /etc/sonic/config_db.json
-
-        jq_command=$(cat <<EOF
-        jq --arg val "$val" '
-        .INTERFACE |= with_entries(
-            if .key | test("Ethernet0\\\\|18\\\\.\\\\d+\\\\.202\\\\.1/31") then
-                .key = (.key | gsub("18\\\\.\\\\d+\\\\.202\\\\.1"; "18.\($val).202.1"))
-            else
-                .
-            end
-        )' /etc/sonic/config_db.json > /etc/sonic/config_db.json.tmp && mv /etc/sonic/config_db.json.tmp /etc/sonic/config_db.json
-EOF
-        )
-
-        echo "$jq_command"
-        eval "$jq_command"
-
-        # Update platform_components.json dynamically
-        platform_components="/usr/share/sonic/device/$platform/platform_components.json"
-        if [ -f "$platform_components" ]; then
-            jq --arg val "$val" '
-            .chassis |= with_entries(
-                .value.component |= with_entries(
-                    if .key | test("^DPU.*-0$") then
-                        .key = (.key | gsub("-0$"; "-\($val)"))
-                    else
-                        .
-                    end
-                )
-            )' "$platform_components" > "${platform_components}.tmp" && mv "${platform_components}.tmp" "$platform_components"
-            echo "Updated platform_components.json with value: $val"
-        else
-            echo "platform_components.json not found, skipping update."
-        fi
-    else
-        echo "cp /usr/share/sonic/device/$platform/config_db_$pipeline.json /etc/sonic/config_db.json"
-        cp /usr/share/sonic/device/$platform/config_db_$pipeline.json /etc/sonic/config_db.json
-    fi
-
-    echo "cp /etc/sonic/config_db.json /etc/sonic/init_cfg.json"
-    cp /etc/sonic/config_db.json /etc/sonic/init_cfg.json
-    echo "File copied successfully."
-    rm /boot/first_boot
-else
-    echo "/boot/first_boot not found. No action taken."
-fi
-
-mkdir -p /host/images
-chmod +x /boot/install_file
-
-sleep 5
-INTERFACE="eth0-midplane"
-if ip link show "$INTERFACE" &> /dev/null; then
-    echo "dhclient $INTERFACE"
-    dhclient $INTERFACE
-fi
diff --git a/platform/pensando/sonic-platform-modules-dpu/dpu/utils/fetch_dpu_status b/platform/pensando/sonic-platform-modules-dpu/dpu/utils/fetch_dpu_status
index c915ee0011e..0dc99800b9e 100755
--- a/platform/pensando/sonic-platform-modules-dpu/dpu/utils/fetch_dpu_status
+++ b/platform/pensando/sonic-platform-modules-dpu/dpu/utils/fetch_dpu_status
@@ -291,13 +291,11 @@ class DPUHealthUpdater():
             ]
             fvs_data.extend(fvs_control_plane_data)
 
-            self.delete_dpu_health_table_entries()
             for name, value in fvs_data:
                 self.db.hset(self.table, name, value)
 
         except Exception as e:
             log_err(f'Failed to refresh platform health status due to {e}, deleting db table')
-            self.delete_dpu_health_table_entries()
 
     def run(self):
         self.platform_health_stats = self._fetch_monitor_list()
diff --git a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/chassis.py b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/chassis.py
index 54760061030..c6f092baf8d 100644
--- a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/chassis.py
+++ b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/chassis.py
@@ -22,7 +22,7 @@
     raise ImportError(str(e) + "- required module not found")
 
 NUM_THERMAL = 2
-NUM_VOLTAGE_SENSORS = 3
+NUM_VOLTAGE_SENSORS = 6
 NUM_CURRENT_SENSORS = 3
 HOST_REBOOT_CAUSE_PATH = "/host/reboot-cause/"
 REBOOT_CAUSE_FILE = "reboot-cause.txt"
@@ -30,6 +30,7 @@
 REBOOT_CAUSE_SOFTWARE = "Software causes"
 REBOOT_CAUSE_EXTERNAL = "External causes"
 RESET_CAUSE_PATH = "/sys/firmware/pensando/rstcause/this_cause"
+DOCKER_HWSKU_PATH = '/usr/share/sonic/platform'
 
 #cpld masks for system led
 SYSTEM_LED_GREEN   = 0x7
@@ -72,9 +73,6 @@ def __init__(self):
         self._api_helper = APIHelper()
         ChassisBase.__init__(self)
 
-        if not self._api_helper.is_host():
-            self._api_helper.setup_cpldapp()
-
         log_info("System chassis is ready")
 
     ##############################################
@@ -88,7 +86,7 @@ def initizalize_system_led(self):
     def get_status_led(self):
         cmd = "cpldapp -r {}".format(str(SYSTEM_LED_REG))
         try:
-            output = self._api_helper.runCMD(cmd)
+            output = self._api_helper.run_docker_cmd(cmd)
             reg_val = int(output, 16)
             if (reg_val & SYSTEM_LED_GREEN):
                 return self.STATUS_LED_COLOR_GREEN
@@ -141,7 +139,7 @@ def __initialize_thermals(self):
         from sonic_platform.thermal import Thermal
         global NUM_THERMAL
         board_id = self._api_helper.get_board_id()
-        if board_id == 130:
+        if board_id == self._api_helper.mtfuji_board_id:
             NUM_THERMAL = 5
         if Thermal._thermals_available():
             for index in range(0, NUM_THERMAL):
@@ -361,8 +359,16 @@ def get_system_eeprom_info(self):
     def get_my_slot(self):
         cmd = "cpldapp -r 0xA"
         try:
-            slot_id = self._api_helper.runCMD(cmd)
-            return int(slot_id,16)
+            if self._api_helper.is_host():
+                slot_id = self._api_helper.run_docker_cmd(cmd)
+                return int(slot_id,16)
+            else:
+                slot_id_file = DOCKER_HWSKU_PATH + "/dpu_slot_id"
+                slot_id_hex = open(slot_id_file, "r").read()
+                if slot_id_hex:
+                    slot_id = int(slot_id_hex, 16)
+                    return slot_id
+            return -1
         except:
             return -1
 
diff --git a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/component.py b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/component.py
index e89b1850f10..179aaebbbcf 100644
--- a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/component.py
+++ b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/component.py
@@ -9,16 +9,12 @@
 ################################################################################
 
 try:
-    import threading
     import sys,os.path
-    import logging
-    import time
     import json
-    import yaml
     import re
-    import subprocess
     from pathlib import Path
     from .helper import APIHelper
+    from sonic_py_common import syslogger
     from sonic_platform_base.component_base import ComponentBase
 
 except ImportError as e:
@@ -31,6 +27,11 @@
 MMC_DEV_PATH = "/dev/mmcblk0"
 NOT_AVAILABLE = 'None'
 IMAGES_PATH = "/host/images"
+SYSLOG_IDENTIFIER = 'dpu-db-utild'
+logger_instance = syslogger.SysLogger(SYSLOG_IDENTIFIER)
+
+def log_err(msg, also_print_to_console=False):
+    logger_instance.log_error(msg, also_print_to_console)
 
 def parse_re(pattern, buffer, index = 0, alt_val = "N/A"):
         res_list = re.findall(pattern, buffer)
@@ -78,8 +79,8 @@ def fetch_version_info(apiHelper):
             except:
                 fwupdate_version_list.append(NOT_AVAILABLE)
             try:
-                major_id = apiHelper.runCMD("cpldapp -r 0x0").replace('0x','')
-                minor_id = apiHelper.runCMD("cpldapp -r 0x1e").replace('0x','')
+                major_id = apiHelper.run_docker_cmd("cpldapp -r 0x0").replace('0x','')
+                minor_id = apiHelper.run_docker_cmd("cpldapp -r 0x1e").replace('0x','')
                 cpld_version = "{}.{}".format(major_id,minor_id)
                 fwupdate_version_list.append(cpld_version)
             except:
diff --git a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/eeprom.py b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/eeprom.py
index a18d83768ba..895a1885355 100644
--- a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/eeprom.py
+++ b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/eeprom.py
@@ -46,10 +46,8 @@ def __init__(self, is_psu=False, psu_index=0, is_fantray=False, fantray_index=0)
     def _setup_files(self):
         if self._api_helper.is_host():
             docker_image_id = self._api_helper.get_dpu_docker_imageID()
-            cmd = "docker cp {}:/tmp/fru.json /home/admin".format(docker_image_id)
+            cmd = "sudo docker cp {}:/tmp/fru.json /usr/share/sonic/device/{}/fru.json".format(docker_image_id, self.fru_path)
             self._api_helper.runCMD(cmd)
-            time.sleep(0.5)
-            self._api_helper.runCMD("cp /home/admin/fru.json {}".format(self.fru_path))
 
     def _load_system_eeprom(self):
         """
diff --git a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/helper.py b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/helper.py
index e7c28a35c0e..104b68bd934 100644
--- a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/helper.py
+++ b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/helper.py
@@ -20,9 +20,12 @@
 QSFP_STAT_CTRL_CPLD_ADDR = "0x2"
 DPU_DOCKER_IMAGE_NAME_FILE="/host/dpu-docker-info/image"
 DPU_DOCKER_CONTAINER_NAME_FILE = "/host/dpu-docker-info/name"
+DOCKER_HWSKU_PATH = '/usr/share/sonic/platform'
 
 class APIHelper():
 
+    mtfuji_board_id = 130
+
     def __init__(self):
         pass
 
@@ -118,10 +121,18 @@ def runCMD(self,cmd):
 
     def get_board_id(self):
         try:
-            board_id_hex = self.runCMD("cpldapp -r 0x80")
-            if board_id_hex:
-                board_id = int(board_id_hex, 16)
-                return board_id
+            if self.is_host():
+                board_id_hex = self.run_docker_cmd("cpldapp -r 0x80")
+                if board_id_hex:
+                    board_id = int(board_id_hex, 16)
+                    return board_id
+            else:
+                board_id_file = DOCKER_HWSKU_PATH + "/dpu_board_id"
+                board_id_hex = open(board_id_file, "r").read()
+                if board_id_hex:
+                    board_id = int(board_id_hex, 16)
+                    return board_id
+            return 0
         except Exception as e:
             print(f"Failed to get board id due to {e}")
             return 0
@@ -135,11 +146,3 @@ def readline_txt_file(self, path):
             pass
         return ''
 
-    def setup_cpldapp(self):
-        cmd = "cp /usr/share/sonic/platform/cpldapp /usr/local/bin"
-        self.runCMD(cmd)
-        cmd = "cp /usr/share/sonic/platform/libpal.so /lib/libpal.so"
-        self.runCMD(cmd)
-        cmd = "cp /usr/share/sonic/platform/liblogger.so /lib/liblogger.so"
-        self.runCMD(cmd)
-
diff --git a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/sensor.py b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/sensor.py
index 3a58e3fa3cd..19b165da1a9 100644
--- a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/sensor.py
+++ b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/sensor.py
@@ -16,18 +16,22 @@
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
-# [ Sensor-Name, sysfs]
+NOT_AVAILABLE = "N/A"
+# [ Sensor-Name, sysfs, low_threshold, high_threshold, critical_low, critical_high]
 VOLTAGE_SENSOR_MAPPING = [
-    ["Voltage sensor 1", "/sys/class/hwmon/hwmon0/in2_input"],
-    ["Voltage sensor 2", "/sys/class/hwmon/hwmon1/in2_input"],
-    ["Voltage sensor 3", "/sys/class/hwmon/hwmon2/in2_input"]
+    ["VP0P85_VDD_DDR_DPU0", "/sys/bus/i2c/devices/0-0044/hwmon/hwmon2/in2_input", "0.816", "0.884", "0.7905", "0.9095"],
+    ["VP1P2_DDR_VDDQ_DPU0", "/sys/bus/i2c/devices/0-0044/hwmon/hwmon2/in3_input", "1.152", "1.248", "1.116", "1.284"],
+    ["VP0P75_VDD_CORE_DPU0 1", "/sys/bus/i2c/devices/0-0055/hwmon/hwmon1/in2_input", "0.72", "0.78", "0.6975", "0.8025"],
+    ["VP0P75_VDD_CORE_DPU0 2", "/sys/bus/i2c/devices/0-0055/hwmon/hwmon1/in3_input", "0.72", "0.78", "0.6975", "0.8025"],
+    ["VP0P75_VDD_CORE_DPU0 3", "/sys/bus/i2c/devices/0-0066/hwmon/hwmon0/in2_input", "0.72", "0.78", "0.6975", "0.8025"],
+    ["VP0P85_VDD_ARM_DPU0", "/sys/bus/i2c/devices/0-0066/hwmon/hwmon0/in3_input", "0.816", "0.884", "0.7905", "0.9095"]
 ]
 
-# [ Sensor-Name, sysfs]
+# [ Sensor-Name, sysfs, low_threshold, high_threshold, critical_low, critical_high]
 CURRENT_SENSOR_MAPPING = [
-    ["Current sensor 1", "/sys/class/hwmon/hwmon0/curr1_input"],
-    ["Current sensor 2", "/sys/class/hwmon/hwmon1/curr1_input"],
-    ["Current sensor 3", "/sys/class/hwmon/hwmon2/curr1_input"]
+    ["Current sensor 1", "/sys/class/hwmon/hwmon0/curr1_input", "0", "15100", NOT_AVAILABLE, "30000"],
+    ["Current sensor 2", "/sys/class/hwmon/hwmon1/curr1_input", "0", "13800", NOT_AVAILABLE, "30000"],
+    ["Current sensor 3", "/sys/class/hwmon/hwmon2/curr1_input", "0", "79100", NOT_AVAILABLE, "30000"]
 ]
 
 class VoltageSensor(SensorBase):
@@ -36,7 +40,7 @@ class VoltageSensor(SensorBase):
     """
     @classmethod
     def _validate_voltage_sensors(cls):
-        for [sensor_name, sensor_hwmon] in VOLTAGE_SENSOR_MAPPING:
+        for sensor_name, sensor_hwmon, *_ in VOLTAGE_SENSOR_MAPPING:
             if not os.path.exists(sensor_hwmon):
                 return False
         return True
@@ -69,13 +73,61 @@ def get_value(self):
             return None
         return voltage
 
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold of sensor
+
+        Returns:
+            High threshold 
+        """
+        value = VOLTAGE_SENSOR_MAPPING[self.index][3]
+        if value == NOT_AVAILABLE:
+            return NOT_AVAILABLE
+        return float(value)
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold 
+
+        Returns:
+            Low threshold 
+        """
+        value = VOLTAGE_SENSOR_MAPPING[self.index][2]
+        if value == NOT_AVAILABLE:
+            return NOT_AVAILABLE
+        return float(value)
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold value of sensor
+
+        Returns:
+            The high critical threshold value of sensor 
+        """
+        value = VOLTAGE_SENSOR_MAPPING[self.index][5]
+        if value == NOT_AVAILABLE:
+            return NOT_AVAILABLE
+        return float(value)
+
+    def get_low_critical_threshold(self):
+        """
+        Retrieves the low critical threshold value of sensor
+
+        Returns:
+            The low critical threshold value of sensor 
+        """
+        value = VOLTAGE_SENSOR_MAPPING[self.index][4]
+        if value == NOT_AVAILABLE:
+            return NOT_AVAILABLE
+        return float(value)
+
 class CurrentSensor(SensorBase):
     """
     Abstract base class for interfacing with a current sensor module
     """
     @classmethod
     def _validate_current_sensors(cls):
-        for [sensor_name, sensor_hwmon] in CURRENT_SENSOR_MAPPING:
+        for sensor_name, sensor_hwmon, *_ in CURRENT_SENSOR_MAPPING:
             if not os.path.exists(sensor_hwmon):
                 return False
         return True
@@ -107,3 +159,51 @@ def get_value(self):
         except Exception:
             return None
         return current
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold of sensor
+
+        Returns:
+            High threshold 
+        """
+        value = CURRENT_SENSOR_MAPPING[self.index][3]
+        if value == NOT_AVAILABLE:
+            return NOT_AVAILABLE
+        return float(value)
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold 
+
+        Returns:
+            Low threshold 
+        """
+        value = CURRENT_SENSOR_MAPPING[self.index][2]
+        if value == NOT_AVAILABLE:
+            return NOT_AVAILABLE
+        return float(value)
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold value of sensor
+
+        Returns:
+            The high critical threshold value of sensor 
+        """
+        value = CURRENT_SENSOR_MAPPING[self.index][5]
+        if value == NOT_AVAILABLE:
+            return NOT_AVAILABLE
+        return float(value)
+
+    def get_low_critical_threshold(self):
+        """
+        Retrieves the low critical threshold value of sensor
+
+        Returns:
+            The low critical threshold value of sensor 
+        """
+        value = CURRENT_SENSOR_MAPPING[self.index][4]
+        if value == NOT_AVAILABLE:
+            return NOT_AVAILABLE
+        return float(value)
diff --git a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/thermal.py b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/thermal.py
index 77cb4f7e8a2..f4d262be18e 100644
--- a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/thermal.py
+++ b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/thermal.py
@@ -12,7 +12,6 @@
 try:
     from sonic_platform_base.thermal_base import ThermalBase
     import os
-    import syslog
     from .helper import APIHelper
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
@@ -28,12 +27,13 @@ class Thermal(ThermalBase):
         'Die Temperature'
     ]
 
+    # [ Sensor-Name, sysfs, low_threshold, high_threshold, critical_low, critical_high]
     SENSOR_MAPPING_MTFUJI = [
-        ["Die temperature", "/sys/class/hwmon/hwmon0/temp2_input"],
-        ["Board temperature", "/sys/class/hwmon/hwmon0/temp1_input"],
-        ["Thermal sensor 1", "/sys/class/hwmon/hwmon0/temp1_input"],
-        ["Thermal sensor 2", "/sys/class/hwmon/hwmon1/temp1_input"],
-        ["Thermal sensor 3", "/sys/class/hwmon/hwmon2/temp1_input"]
+        ["Die temperature", "/sys/class/hwmon/hwmon0/temp2_input", 1, 110, -10, 130],
+        ["Board temperature", "/sys/class/hwmon/hwmon0/temp1_input", 1, 110, -10, 130],
+        ["Thermal sensor 1", "/sys/class/hwmon/hwmon0/temp1_input", 1, 110, -10, 130],
+        ["Thermal sensor 2", "/sys/class/hwmon/hwmon1/temp1_input", 1, 110, -10, 130],
+        ["Thermal sensor 3", "/sys/class/hwmon/hwmon2/temp1_input", 1, 110, -10, 130]
     ]
 
     @classmethod
@@ -43,7 +43,7 @@ def _thermals_available(cls):
         apiHelper = APIHelper()
         g_board_id = apiHelper.get_board_id()
         temp_hwmon = '/sys/bus/i2c/devices/i2c-0/0-004c/hwmon'
-        if g_board_id == 130:
+        if g_board_id == self._api_helper.mtfuji_board_id:
             temp_hwmon = '/sys/class/hwmon/hwmon0/temp1_input'
         if os.path.exists(temp_hwmon):
             return True
@@ -52,9 +52,10 @@ def _thermals_available(cls):
     def __init__(self, thermal_index, sfp = None):
         global g_board_id
         ThermalBase.__init__(self)
+        self._api_helper = APIHelper()
         self.index = thermal_index + 1
         self.board_id = g_board_id
-        if self.board_id != 130:
+        if self.board_id != self._api_helper.mtfuji_board_id:
             temp_hwmon = '/sys/bus/i2c/devices/i2c-0/0-004c/hwmon'
             self.temp_dir = None
             if os.path.exists(temp_hwmon):
@@ -66,7 +67,7 @@ def get_name(self):
         Returns:
             string: The name of the thermal
         """
-        if self.board_id == 130:
+        if self.board_id == self._api_helper.mtfuji_board_id:
             return self.SENSOR_MAPPING_MTFUJI[self.index - 1][0]
         return self.SENSOR_MAPPING[self.index - 1]
 
@@ -114,7 +115,7 @@ def get_temperature(self):
         if(self.get_presence()):
             try :
                 temp_file = None
-                if self.board_id == 130:
+                if self.board_id == self._api_helper.mtfuji_board_id:
                     temp_file = self.SENSOR_MAPPING_MTFUJI[self.index - 1][1]
                 else:
                     temp_file = self.temp_dir +'/temp{0}_input'.format(str(self.index))
@@ -123,6 +124,30 @@ def get_temperature(self):
                 pass
         return float(temperature)
 
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of thermal
+
+        Returns:
+            A float number, the high threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if self.board_id == self._api_helper.mtfuji_board_id:
+            return float(self.SENSOR_MAPPING_MTFUJI[self.index - 1][3])
+        raise NotImplementedError
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold temperature of thermal
+
+        Returns:
+            A float number, the low threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if self.board_id == self._api_helper.mtfuji_board_id:
+            return float(self.SENSOR_MAPPING_MTFUJI[self.index - 1][2])
+        raise NotImplementedError
+
     def get_high_critical_threshold(self):
         """
         Retrieves the high critical threshold temperature of thermal
@@ -132,25 +157,26 @@ def get_high_critical_threshold(self):
             up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
         temperature = 0.0
-        if(self.get_presence()):
+        if self.board_id != self._api_helper.mtfuji_board_id:
             try :
                 temp_file = self.temp_dir +'/temp{0}_crit'.format(str(self.index))
                 temperature = float(open(temp_file).read()) / 1000.0
             except Exception:
                 pass
+        else:
+            return float(self.SENSOR_MAPPING_MTFUJI[self.index - 1][5])
         return float(temperature)
 
-    def set_high_critical_threshold(self, temperature):
+    def get_low_critical_threshold(self):
         """
-        Sets the critical high threshold temperature of thermal
-
-        Args :
-            temperature: A float number up to nearest thousandth of one degree Celsius,
-            e.g. 30.125
+        Retrieves the low critical threshold temperature of thermal
 
         Returns:
-            A boolean, True if threshold is set successfully, False if not
+            A float number, the low critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
-        return True
+        if self.board_id == self._api_helper.mtfuji_board_id:
+            return float(self.SENSOR_MAPPING_MTFUJI[self.index - 1][4])
+        raise NotImplementedError
 
 
diff --git a/platform/vpp b/platform/vpp
index 654a0a26ab8..36a991508e9 160000
--- a/platform/vpp
+++ b/platform/vpp
@@ -1 +1 @@
-Subproject commit 654a0a26ab83728d3e323ac347793ea27bad6539
+Subproject commit 36a991508e93d7a21a4d3d8029abde8e75e1b5bb
diff --git a/platform/vs/docker-dash-engine/Dockerfile.cleanup b/platform/vs/docker-dash-engine/Dockerfile.cleanup
deleted file mode 100644
index 514bd95ae30..00000000000
--- a/platform/vs/docker-dash-engine/Dockerfile.cleanup
+++ /dev/null
@@ -1,11 +0,0 @@
-# Base docker build
-FROM docker-dash-engine-sonic:latest
-
-# Copy the cache data to host
-From scratch as output
-COPY --from=docker-dash-engine-sonic:latest /cache.tgz cache.tgz
-
-# Clean up the cache data
-FROM docker-dash-engine-sonic:latest as final
-RUN rm /cache.tgz
-
diff --git a/platform/vs/docker-sonic-vs.mk b/platform/vs/docker-sonic-vs.mk
index 3e66e94546a..8371030f8ac 100644
--- a/platform/vs/docker-sonic-vs.mk
+++ b/platform/vs/docker-sonic-vs.mk
@@ -11,7 +11,8 @@ $(DOCKER_SONIC_VS)_DEPENDS += $(SYNCD_VS) \
                               $(LIBYANG_CPP) \
                               $(LIBYANG_PY3) \
                               $(SONIC_UTILITIES_DATA) \
-                              $(SONIC_HOST_SERVICES_DATA)
+                              $(SONIC_HOST_SERVICES_DATA) \
+                              $(SYSMGR)
 
 $(DOCKER_SONIC_VS)_PYTHON_WHEELS += $(SONIC_PY_COMMON_PY3) \
                                     $(SONIC_PLATFORM_COMMON_PY3) \
@@ -24,7 +25,8 @@ ifeq ($(INSTALL_DEBUG_TOOLS), y)
 $(DOCKER_SONIC_VS)_DEPENDS += $(LIBSWSSCOMMON_DBG) \
                               $(LIBSAIREDIS_DBG) \
                               $(LIBSAIVS_DBG) \
-                              $(SYNCD_VS_DBG)
+                              $(SYNCD_VS_DBG) \
+                              $(SYSMGR_DBG)
 endif
 
 ifeq ($(SONIC_ROUTING_STACK), frr)
diff --git a/platform/vs/docker-sonic-vs/database_config.json b/platform/vs/docker-sonic-vs/database_config.json
index 04cb3d3aaae..4d535465967 100644
--- a/platform/vs/docker-sonic-vs/database_config.json
+++ b/platform/vs/docker-sonic-vs/database_config.json
@@ -77,6 +77,16 @@
             "id" : 14,
             "separator": ":",
             "instance" : "redis"
+        },
+        "DPU_APPL_DB" : {
+            "id" : 15,
+            "separator": ":",
+            "instance" : "redis"
+        },
+        "DPU_APPL_STATE_DB" : {
+            "id" : 16,
+            "separator": "|",
+            "instance" : "redis"
         }
     },
     "VERSION" : "1.0"
diff --git a/platform/vs/docker-sonic-vs/frr/zebra.conf b/platform/vs/docker-sonic-vs/frr/zebra.conf
index 695d339cdeb..9e3bd42315d 100644
--- a/platform/vs/docker-sonic-vs/frr/zebra.conf
+++ b/platform/vs/docker-sonic-vs/frr/zebra.conf
@@ -1,5 +1,4 @@
+no zebra nexthop kernel enable
 no fpm use-next-hop-groups
-
 fpm address 127.0.0.1
 zebra nexthop-group keep 1
-
diff --git a/platform/vs/docker-sonic-vs/orchagent.sh b/platform/vs/docker-sonic-vs/orchagent.sh
index 49dc3ad31ab..44667c0d127 100755
--- a/platform/vs/docker-sonic-vs/orchagent.sh
+++ b/platform/vs/docker-sonic-vs/orchagent.sh
@@ -40,9 +40,13 @@ ORCHAGENT_ARGS="-d /var/log/swss "
 # Set orchagent pop batch size to 8192
 ORCHAGENT_ARGS+="-b 8192 "
 
-# Set synchronous mode if it is enabled in CONFIG_DB
+# Set zmq mode by default for DPU vs
+# Otherwise, set synchronous mode if it is enabled in CONFIG_DB
 SYNC_MODE=$(echo $SWSS_VARS | jq -r '.synchronous_mode')
-if [ "$SYNC_MODE" == "enable" ]; then
+SWITCH_TYPE=$(echo $SWSS_VARS | jq -r '.switch_type')
+if [ "$SWITCH_TYPE" == "dpu" ]; then
+    ORCHAGENT_ARGS+="-z zmq_sync "
+elif [ "$SYNC_MODE" == "enable" ]; then
     ORCHAGENT_ARGS+="-s "
 fi
 
diff --git a/platform/vs/docker-sonic-vs/start.sh b/platform/vs/docker-sonic-vs/start.sh
index f7dbde8dcff..89a4b89d493 100755
--- a/platform/vs/docker-sonic-vs/start.sh
+++ b/platform/vs/docker-sonic-vs/start.sh
@@ -180,6 +180,8 @@ supervisorctl start tunnelmgrd
 
 supervisorctl start fabricmgrd
 
+supervisorctl start rebootbackend
+
 # Start arp_update when VLAN exists
 VLAN=`sonic-cfggen -d -v 'VLAN.keys() | join(" ") if VLAN'`
 if [ "$VLAN" != "" ]; then
diff --git a/platform/vs/gbsyncd-vs.mk b/platform/vs/gbsyncd-vs.mk
deleted file mode 100644
index 2013132d628..00000000000
--- a/platform/vs/gbsyncd-vs.mk
+++ /dev/null
@@ -1,14 +0,0 @@
-# docker image for vs gbsyncd
-
-DOCKER_GBSYNCD_PLATFORM_CODE = vs
-include $(PLATFORM_PATH)/../template/docker-gbsyncd-base.mk
-
-$(DOCKER_GBSYNCD_BASE)_DEPENDS += $(SYNCD_VS)
-
-$(DOCKER_GBSYNCD_BASE)_DBG_DEPENDS += $(SYNCD_VS_DBG) \
-                                $(LIBSWSSCOMMON_DBG) \
-                                $(LIBSAIMETADATA_DBG) \
-                                $(LIBSAIREDIS_DBG) \
-                                $(LIBSAIVS_DBG)
-
-$(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/vs/onie.mk b/platform/vs/onie.mk
index 9d4f843b0e0..badd7b35194 100644
--- a/platform/vs/onie.mk
+++ b/platform/vs/onie.mk
@@ -1,10 +1,10 @@
 ONIE_RECOVERY_IMAGE = onie-recovery-x86_64-kvm_x86_64-r0.iso
-$(ONIE_RECOVERY_IMAGE)_URL = "https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso"
+$(ONIE_RECOVERY_IMAGE)_URL = "https://packages.trafficmanager.net/public/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso"
 
 ONIE_RECOVERY_KVM_4ASIC_IMAGE = onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso
-$(ONIE_RECOVERY_KVM_4ASIC_IMAGE)_URL = "https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso"
+$(ONIE_RECOVERY_KVM_4ASIC_IMAGE)_URL = "https://packages.trafficmanager.net/public/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso"
 
 ONIE_RECOVERY_KVM_6ASIC_IMAGE = onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso
-$(ONIE_RECOVERY_KVM_6ASIC_IMAGE)_URL = "https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso"
+$(ONIE_RECOVERY_KVM_6ASIC_IMAGE)_URL = "https://packages.trafficmanager.net/public/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso"
 
 SONIC_ONLINE_FILES += $(ONIE_RECOVERY_IMAGE) $(ONIE_RECOVERY_KVM_4ASIC_IMAGE) $(ONIE_RECOVERY_KVM_6ASIC_IMAGE)
diff --git a/platform/vs/syncd-vs.mk b/platform/vs/syncd-vs.mk
index 748e2a7df20..6c27960b5be 100644
--- a/platform/vs/syncd-vs.mk
+++ b/platform/vs/syncd-vs.mk
@@ -3,14 +3,18 @@ $(LIBSAIREDIS)_DEB_BUILD_PROFILES += syncd vs
 SYNCD_VS = syncd-vs_1.0.0_$(CONFIGURED_ARCH).deb
 $(SYNCD_VS)_RDEPENDS += $(LIBSAIREDIS) $(LIBSAIMETADATA) $(LIBSAIVS)
 
+ifeq ($(INCLUDE_VS_DASH_SAI),y)
 ifeq ($(BLDENV),bookworm)
+# dash-sai only support sonic-vs.img.gz. it don't support docker-sonic-vs.gz
+ifeq ($(findstring docker-sonic-vs, $(SONIC_BUILD_TARGET)), )
   $(LIBSAIREDIS)_DEB_BUILD_PROFILES += dashsai
   $(LIBSAIREDIS)_DEPENDS += $(DASH_SAI)
   $(SYNCD_VS)_RDEPENDS += $(DASH_SAI)
+endif
 else
   $(warning DASH_SAI cannot support this build environment $(BLDENV))
 endif
-
+endif
 
 $(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_VS)))
 
diff --git a/rules/bash.mk b/rules/bash.mk
index 48c089c49e0..2eb8747994f 100644
--- a/rules/bash.mk
+++ b/rules/bash.mk
@@ -13,3 +13,9 @@ export BASH_VERSION_MAJOR BASH_VERSION_FULL
 BASH = bash_$(BASH_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(BASH)_SRC_PATH = $(SRC_PATH)/bash
 SONIC_MAKE_DEBS += $(BASH)
+
+BASH_DBG = bash-dbgsym_$(BASH_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(BASH_DBG)_RDEPENDS += $(BASH)
+$(eval $(call add_derived_package,$(BASH),$(BASH_DBG)))
+
+export BASH_DBG
diff --git a/rules/config b/rules/config
index 9ff97eb94d2..67894e69fed 100644
--- a/rules/config
+++ b/rules/config
@@ -166,6 +166,9 @@ endif
 # INCLUDE_P4RT - build docker-p4rt for P4RT support
 INCLUDE_P4RT = n
 
+# INCLUDE_VS_DASH_SAI - build dash-sai for VS
+INCLUDE_VS_DASH_SAI ?= y
+
 # ENABLE_AUTO_TECH_SUPPORT - Enable the configuration for event-driven techsupport & coredump mgmt feature
 ENABLE_AUTO_TECH_SUPPORT = y
 
@@ -188,6 +191,8 @@ INCLUDE_TEAMD ?= y
 # INCLUDE_ROUTER_ADVERTISER - build docker-router-advertiser for router advertisements support
 INCLUDE_ROUTER_ADVERTISER ?= y
 
+# INCLUDE_TEAMD - build docker-ha for DASH HA support
+INCLUDE_DASH_HA ?= y
 # INCLUDE_KUBERNETES - if set to y kubernetes packages are installed to be able to
 # run as worker node in kubernetes cluster.
 INCLUDE_KUBERNETES ?= n
@@ -250,7 +255,7 @@ SECURE_UPGRADE_MODE = "no_sign"
 SECURE_UPGRADE_PROD_SIGNING_TOOL ?=
 SECURE_UPGRADE_PROD_TOOL_ARGS ?=
 # PACKAGE_URL_PREFIX - the package url prefix
-PACKAGE_URL_PREFIX ?= https://packages.trafficmanager.net/public/packages
+PACKAGE_URL_PREFIX ?= https://packages.trafficmanager.net/packages
 
 # TRUSTED_GPG_URLS - the trusted gpgs, separated by comma
 TRUSTED_GPG_URLS = https://packages.trafficmanager.net/debian/public_key.gpg,https://packages.microsoft.com/keys/microsoft.asc
@@ -330,7 +335,7 @@ BUILD_REDUCE_IMAGE_SIZE = n
 
 # SONIC_PTF_ENV_PY_VER - SONiC PTF test Python version. Set to 'mixed' to build the 
 # image with both Python 2 and 3. Set to 'py3' to build a Python 3 only image
-SONIC_PTF_ENV_PY_VER = mixed
+SONIC_PTF_ENV_PY_VER = py3
 
 # Add timeout on some process which may hangs
 BUILD_PROCESS_TIMEOUT ?= 0
diff --git a/rules/dash-ha.dep b/rules/dash-ha.dep
new file mode 100644
index 00000000000..f6af59a23af
--- /dev/null
+++ b/rules/dash-ha.dep
@@ -0,0 +1,10 @@
+SPATH       := $($(DASH_HA)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/dash-ha.mk rules/dash-ha.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files))
+
+$(DASH_HA)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DASH_HA)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DASH_HA)_DEP_FILES   := $(DEP_FILES)
+$(DASH_HA)_SMDEP_FILES := $(SMDEP_FILES)
+$(DASH_HA)_SMDEP_PATHS := $(SPATH)
diff --git a/rules/dash-ha.mk b/rules/dash-ha.mk
new file mode 100644
index 00000000000..37274d3d26f
--- /dev/null
+++ b/rules/dash-ha.mk
@@ -0,0 +1,14 @@
+DASH_HA_VERSION = 1.0.0
+DASH_HA_NAME = dash-ha
+
+DASH_HA = $(DASH_HA_NAME)_$(DASH_HA_VERSION)_$(CONFIGURED_ARCH).deb
+$(DASH_HA)_SRC_PATH = $(SRC_PATH)/sonic-dash-ha
+$(DASH_HA)_VERSION = $(DASH_HA_VERSION)
+$(DASH_HA)_NAME = $(DASH_HA_NAME)
+$(DASH_HA)_DEPENDS = $(LIBSWSSCOMMON_DEV)
+$(DASH_HA)_RDEPENDS = $(LIBSWSSCOMMON)
+
+SONIC_DPKG_DEBS += $(DASH_HA)
+
+DASH_HA_DBG = $(DASH_HA_NAME)-dbgsym_$(DASH_HA_VERSION)_$(CONFIGURED_ARCH).deb
+$(eval $(call add_derived_package,$(DASH_HA),$(DASH_HA_DBG)))
diff --git a/rules/dash-sai.mk b/rules/dash-sai.mk
index 54f3771eeee..f226cfdea7c 100644
--- a/rules/dash-sai.mk
+++ b/rules/dash-sai.mk
@@ -1,7 +1,7 @@
 # DASH SAI repo: https://github.com/sonic-net/DASH
 
 DASH_SAI_VERSION = 1.0.0
-DASH_SAI_COMMIT = f5b4b70ec5a0b43b4f63a9375a56a7e20a54ed0e
+DASH_SAI_COMMIT = 57e599c9d8e1f538ea01fad28781d8a0c2706ba5
 
 export DASH_SAI_VERSION
 export DASH_SAI_COMMIT
diff --git a/rules/docker-auditd-watchdog.dep b/rules/docker-auditd-watchdog.dep
new file mode 100644
index 00000000000..506e2154b21
--- /dev/null
+++ b/rules/docker-auditd-watchdog.dep
@@ -0,0 +1,10 @@
+DPATH       := $($(DOCKER_AUDITD_WATCHDOG)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/docker-auditd-watchdog.mk rules/docker-auditd-watchdog.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_AUDITD_WATCHDOG)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_AUDITD_WATCHDOG)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_AUDITD_WATCHDOG)_DEP_FILES   := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_AUDITD_WATCHDOG),$(DOCKER_AUDITD_WATCHDOG_DBG)))
diff --git a/rules/docker-auditd-watchdog.mk b/rules/docker-auditd-watchdog.mk
new file mode 100644
index 00000000000..c5162838c6c
--- /dev/null
+++ b/rules/docker-auditd-watchdog.mk
@@ -0,0 +1,29 @@
+# docker image for auditd watchdog
+
+DOCKER_AUDITD_WATCHDOG_STEM = docker-auditd-watchdog
+DOCKER_AUDITD_WATCHDOG = $(DOCKER_AUDITD_WATCHDOG_STEM).gz
+DOCKER_AUDITD_WATCHDOG_DBG = $(DOCKER_AUDITD_WATCHDOG_STEM)-$(DBG_IMAGE_MARK).gz
+
+$(DOCKER_AUDITD_WATCHDOG)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+
+$(DOCKER_AUDITD_WATCHDOG)_PATH = $(DOCKERS_PATH)/$(DOCKER_AUDITD_WATCHDOG_STEM)
+
+$(DOCKER_AUDITD_WATCHDOG)_VERSION = 1.0.0
+$(DOCKER_AUDITD_WATCHDOG)_PACKAGE_NAME = auditd_watchdog
+
+SONIC_DOCKER_IMAGES += $(DOCKER_AUDITD_WATCHDOG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_AUDITD_WATCHDOG)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_AUDITD_WATCHDOG)
+
+SONIC_DOCKER_DBG_IMAGES += $(DOCKER_AUDITD_WATCHDOG_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_AUDITD_WATCHDOG_DBG)
+SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_AUDITD_WATCHDOG_DBG)
+
+$(DOCKER_AUDITD_WATCHDOG)_CONTAINER_NAME = auditd_watchdog
+$(DOCKER_AUDITD_WATCHDOG)_RUN_OPT += -t --privileged --pid=host
+$(DOCKER_AUDITD_WATCHDOG)_RUN_OPT += -v /lib/systemd/system:/lib/systemd/system:rw
+$(DOCKER_AUDITD_WATCHDOG)_RUN_OPT += -v /etc/audit:/etc/audit:rw
+$(DOCKER_AUDITD_WATCHDOG)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_AUDITD_WATCHDOG)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro
+
+$(DOCKER_AUDITD_WATCHDOG)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
diff --git a/rules/docker-auditd.dep b/rules/docker-auditd.dep
new file mode 100644
index 00000000000..9aa4b2b3854
--- /dev/null
+++ b/rules/docker-auditd.dep
@@ -0,0 +1,10 @@
+DPATH       := $($(DOCKER_AUDITD)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/docker-auditd.mk rules/docker-auditd.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_AUDITD)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_AUDITD)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_AUDITD)_DEP_FILES   := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_AUDITD),$(DOCKER_AUDITD_DBG)))
diff --git a/rules/docker-auditd.mk b/rules/docker-auditd.mk
new file mode 100644
index 00000000000..1dd4be5561d
--- /dev/null
+++ b/rules/docker-auditd.mk
@@ -0,0 +1,29 @@
+# docker image for auditd
+
+DOCKER_AUDITD_STEM = docker-auditd
+DOCKER_AUDITD = $(DOCKER_AUDITD_STEM).gz
+DOCKER_AUDITD_DBG = $(DOCKER_AUDITD_STEM)-$(DBG_IMAGE_MARK).gz
+
+$(DOCKER_AUDITD)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+
+$(DOCKER_AUDITD)_PATH = $(DOCKERS_PATH)/$(DOCKER_AUDITD_STEM)
+
+$(DOCKER_AUDITD)_VERSION = 1.0.0
+$(DOCKER_AUDITD)_PACKAGE_NAME = auditd
+
+SONIC_DOCKER_IMAGES += $(DOCKER_AUDITD)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_AUDITD)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_AUDITD)
+
+SONIC_DOCKER_DBG_IMAGES += $(DOCKER_AUDITD_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_AUDITD_DBG)
+SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_AUDITD_DBG)
+
+$(DOCKER_AUDITD)_CONTAINER_NAME = auditd
+$(DOCKER_AUDITD)_RUN_OPT += -t --privileged --pid=host
+$(DOCKER_AUDITD)_RUN_OPT += -v /lib/systemd/system:/lib/systemd/system:rw
+$(DOCKER_AUDITD)_RUN_OPT += -v /etc/audit:/etc/audit:rw
+$(DOCKER_AUDITD)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_AUDITD)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro
+
+$(DOCKER_AUDITD)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
diff --git a/rules/docker-bmp-watchdog.dep b/rules/docker-bmp-watchdog.dep
new file mode 100644
index 00000000000..9ddd8a40812
--- /dev/null
+++ b/rules/docker-bmp-watchdog.dep
@@ -0,0 +1,10 @@
+DPATH       := $($(DOCKER_BMP_WATCHDOG)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/docker-bmp-watchdog.mk rules/docker-bmp-watchdog.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_BMP_WATCHDOG)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_BMP_WATCHDOG)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_BMP_WATCHDOG)_DEP_FILES   := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_BMP_WATCHDOG),$(DOCKER_BMP_WATCHDOG_DBG)))
diff --git a/rules/docker-bmp-watchdog.mk b/rules/docker-bmp-watchdog.mk
new file mode 100644
index 00000000000..e0769d95748
--- /dev/null
+++ b/rules/docker-bmp-watchdog.mk
@@ -0,0 +1,28 @@
+# docker image for bmp watchdog
+
+DOCKER_BMP_WATCHDOG_STEM = docker-bmp-watchdog
+DOCKER_BMP_WATCHDOG = $(DOCKER_BMP_WATCHDOG_STEM).gz
+DOCKER_BMP_WATCHDOG_DBG = $(DOCKER_BMP_WATCHDOG_STEM)-$(DBG_IMAGE_MARK).gz
+
+$(DOCKER_BMP_WATCHDOG)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+
+$(DOCKER_BMP_WATCHDOG)_PATH = $(DOCKERS_PATH)/$(DOCKER_BMP_WATCHDOG_STEM)
+
+$(DOCKER_BMP_WATCHDOG)_VERSION = 1.0.0
+$(DOCKER_BMP_WATCHDOG)_PACKAGE_NAME = bmp_watchdog
+
+SONIC_DOCKER_IMAGES += $(DOCKER_BMP_WATCHDOG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_BMP_WATCHDOG)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_BMP_WATCHDOG)
+
+SONIC_DOCKER_DBG_IMAGES += $(DOCKER_BMP_WATCHDOG_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_BMP_WATCHDOG_DBG)
+SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_BMP_WATCHDOG_DBG)
+
+$(DOCKER_BMP_WATCHDOG)_CONTAINER_NAME = bmp_watchdog
+$(DOCKER_BMP_WATCHDOG)_RUN_OPT += -t --privileged --pid=host
+$(DOCKER_BMP_WATCHDOG)_RUN_OPT += -v /lib/systemd/system:/lib/systemd/system:rw
+$(DOCKER_BMP_WATCHDOG)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_BMP_WATCHDOG)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro
+
+$(DOCKER_BMP_WATCHDOG)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
diff --git a/rules/docker-config-engine-bookworm.mk b/rules/docker-config-engine-bookworm.mk
index 35145d89061..88e4c0df902 100644
--- a/rules/docker-config-engine-bookworm.mk
+++ b/rules/docker-config-engine-bookworm.mk
@@ -23,7 +23,13 @@ $(DOCKER_CONFIG_ENGINE_BOOKWORM)_FILES += $($(SONIC_CTRMGRD)_HEALTH_PROBE)
 $(DOCKER_CONFIG_ENGINE_BOOKWORM)_FILES += $($(SONIC_CTRMGRD)_STARTUP_SCRIPT)
 
 $(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS = $($(DOCKER_BASE_BOOKWORM)_DBG_DEPENDS) \
-                                             $(LIBSWSSCOMMON_DBG)
+                                             $(LIBSWSSCOMMON_DBG) \
+                                             $(LIBYANG_DBG) \
+                                             $(LIBYANG_CPP_DBG) \
+                                             $(LIBYANG_PY3_DBG) \
+                                             $(PYTHON3_SWSSCOMMON_DBG) \
+                                             $(SONIC_DB_CLI_DBG) \
+                                             $(SONIC_EVENTD_DBG)
 $(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES = $($(DOCKER_BASE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
 SONIC_DOCKER_IMAGES += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
diff --git a/rules/docker-config-engine-bullseye.mk b/rules/docker-config-engine-bullseye.mk
index aa91a56279c..2c028551776 100644
--- a/rules/docker-config-engine-bullseye.mk
+++ b/rules/docker-config-engine-bullseye.mk
@@ -23,7 +23,13 @@ $(DOCKER_CONFIG_ENGINE_BULLSEYE)_FILES += $($(SONIC_CTRMGRD)_HEALTH_PROBE)
 $(DOCKER_CONFIG_ENGINE_BULLSEYE)_FILES += $($(SONIC_CTRMGRD)_STARTUP_SCRIPT)
 
 $(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS = $($(DOCKER_BASE_BULLSEYE)_DBG_DEPENDS) \
-                                             $(LIBSWSSCOMMON_DBG)
+                                             $(LIBSWSSCOMMON_DBG) \
+                                             $(LIBYANG_DBG) \
+                                             $(LIBYANG_CPP_DBG) \
+                                             $(LIBYANG_PY3_DBG) \
+                                             $(PYTHON3_SWSSCOMMON_DBG) \
+                                             $(SONIC_DB_CLI_DBG) \
+                                             $(SONIC_EVENTD_DBG)
 $(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES = $($(DOCKER_BASE_BULLSEYE)_DBG_IMAGE_PACKAGES)
 
 SONIC_DOCKER_IMAGES += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
diff --git a/rules/docker-dash-ha.dep b/rules/docker-dash-ha.dep
new file mode 100644
index 00000000000..8c1cc0c00f8
--- /dev/null
+++ b/rules/docker-dash-ha.dep
@@ -0,0 +1,10 @@
+DPATH       := $($(DOCKER_DASH_HA)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/docker-dash-ha.mk rules/docker-dash-ha.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_DASH_HA)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_DASH_HA)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_DASH_HA)_DEP_FILES   := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_DASH_HA),$(DOCKER_DASH_HA_DBG)))
diff --git a/rules/docker-dash-ha.mk b/rules/docker-dash-ha.mk
new file mode 100644
index 00000000000..da2791bff8c
--- /dev/null
+++ b/rules/docker-dash-ha.mk
@@ -0,0 +1,40 @@
+# docker image for smart-switch/DASH high availability services
+
+DOCKER_DASH_HA_STEM = docker-dash-ha
+DOCKER_DASH_HA = $(DOCKER_DASH_HA_STEM).gz
+DOCKER_DASH_HA_DBG = $(DOCKER_DASH_HA_STEM)-$(DBG_IMAGE_MARK).gz
+
+$(DOCKER_DASH_HA)_PATH = $(DOCKERS_PATH)/$(DOCKER_DASH_HA_STEM)
+
+$(DOCKER_DASH_HA)_DEPENDS += $(DASH_HA)
+$(DOCKER_DASH_HA)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS)
+$(DOCKER_DASH_HA)_DBG_DEPENDS += $(DASH_HA_DBG)
+
+$(DOCKER_DASH_HA)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES)
+
+$(DOCKER_DASH_HA)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM)
+
+$(DOCKER_DASH_HA)_VERSION = 1.0.0
+$(DOCKER_DASH_HA)_PACKAGE_NAME = dash-ha
+$(DOCKER_DASH_HA)_WARM_SHUTDOWN_BEFORE = syncd
+$(DOCKER_DASH_HA)_WARM_SHUTDOWN_AFTER = swss
+$(DOCKER_DASH_HA)_FAST_SHUTDOWN_BEFORE = syncd
+$(DOCKER_DASH_HA)_FAST_SHUTDOWN_AFTER = swss
+
+SONIC_DOCKER_IMAGES += $(DOCKER_DASH_HA)
+ifeq ($(INCLUDE_DASH_HA), y)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_DASH_HA)
+endif
+
+SONIC_DOCKER_DBG_IMAGES += $(DOCKER_DASH_HA_DBG)
+ifeq ($(INCLUDE_DASH_HA), y)
+SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_DASH_HA_DBG)
+endif
+
+$(DOCKER_DASH_HA)_CONTAINER_NAME = dash-ha
+$(DOCKER_DASH_HA)_RUN_OPT += -t
+$(DOCKER_DASH_HA)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_DASH_HA)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro
+
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_DASH_HA)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_DASH_HA_DBG)
diff --git a/rules/docker-dhcp-relay.mk b/rules/docker-dhcp-relay.mk
index 0ea0fe3db06..4b68117e386 100644
--- a/rules/docker-dhcp-relay.mk
+++ b/rules/docker-dhcp-relay.mk
@@ -25,7 +25,6 @@ $(DOCKER_DHCP_RELAY)_PACKAGE_DEPENDS = database^1.0.0
 
 $(DOCKER_DHCP_RELAY)_SERVICE_REQUIRES = config-setup
 $(DOCKER_DHCP_RELAY)_SERVICE_AFTER = swss syncd teamd
-$(DOCKER_DHCP_RELAY)_SERVICE_BEFORE = ntp-config
 $(DOCKER_DHCP_RELAY)_SERVICE_DEPENDENT_OF = swss
 
 SONIC_DOCKER_IMAGES += $(DOCKER_DHCP_RELAY)
@@ -54,6 +53,6 @@ $(DOCKER_DHCP_RELAY)_CONTAINER_TMPFS += /var/tmp/
 
 $(DOCKER_DHCP_RELAY)_CLI_CONFIG_PLUGIN = /cli/config/plugins/dhcp_relay.py
 $(DOCKER_DHCP_RELAY)_CLI_SHOW_PLUGIN = /cli/show/plugins/show_dhcp_relay.py
-$(DOCKER_DHCP_RELAY)_CLI_CLEAR_PLUGIN = /cli/clear/plugins/clear_dhcp6relay_counter.py
+$(DOCKER_DHCP_RELAY)_CLI_CLEAR_PLUGIN = /cli/clear/plugins/clear_dhcp_relay.py
 
 $(DOCKER_DHCP_RELAY)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
diff --git a/rules/docker-fpm-frr.mk b/rules/docker-fpm-frr.mk
index c914dbff1da..45438bd6b82 100644
--- a/rules/docker-fpm-frr.mk
+++ b/rules/docker-fpm-frr.mk
@@ -40,6 +40,7 @@ $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TSA:/usr/bin/TSA
 $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TSB:/usr/bin/TSB
 $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TSC:/usr/bin/TSC
 $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TS:/usr/bin/TS
+$(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += platform_utils:/usr/bin/platform_utils
 $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += idf_isolation:/usr/bin/idf_isolation
 $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += prefix_list:/usr/bin/prefix_list
 
diff --git a/rules/docker-gnmi-watchdog.dep b/rules/docker-gnmi-watchdog.dep
new file mode 100644
index 00000000000..550fe6fc371
--- /dev/null
+++ b/rules/docker-gnmi-watchdog.dep
@@ -0,0 +1,10 @@
+DPATH       := $($(DOCKER_GNMI_WATCHDOG)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/docker-gnmi-watchdog.mk rules/docker-gnmi-watchdog.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_GNMI_WATCHDOG)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_GNMI_WATCHDOG)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_GNMI_WATCHDOG)_DEP_FILES   := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_GNMI_WATCHDOG),$(DOCKER_GNMI_WATCHDOG_DBG)))
diff --git a/rules/docker-gnmi-watchdog.mk b/rules/docker-gnmi-watchdog.mk
new file mode 100644
index 00000000000..e210cf5436e
--- /dev/null
+++ b/rules/docker-gnmi-watchdog.mk
@@ -0,0 +1,32 @@
+# docker image for gnmi watchdog
+
+DOCKER_GNMI_WATCHDOG_STEM = docker-gnmi-watchdog
+DOCKER_GNMI_WATCHDOG = $(DOCKER_GNMI_WATCHDOG_STEM).gz
+DOCKER_GNMI_WATCHDOG_DBG = $(DOCKER_GNMI_WATCHDOG_STEM)-$(DBG_IMAGE_MARK).gz
+
+$(DOCKER_GNMI_WATCHDOG)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+
+$(DOCKER_GNMI_WATCHDOG)_PATH = $(DOCKERS_PATH)/$(DOCKER_GNMI_WATCHDOG_STEM)
+
+$(DOCKER_GNMI_WATCHDOG)_VERSION = 1.0.0
+$(DOCKER_GNMI_WATCHDOG)_PACKAGE_NAME = gnmi_watchdog
+
+SONIC_DOCKER_IMAGES += $(DOCKER_GNMI_WATCHDOG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_GNMI_WATCHDOG)
+ifeq ($(INCLUDE_SYSTEM_GNMI), y)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GNMI_WATCHDOG)
+endif
+
+SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GNMI_WATCHDOG_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GNMI_WATCHDOG_DBG)
+ifeq ($(INCLUDE_SYSTEM_GNMI), y)
+SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GNMI_WATCHDOG_DBG)
+endif
+
+$(DOCKER_GNMI_WATCHDOG)_CONTAINER_NAME = gnmi_watchdog
+$(DOCKER_GNMI_WATCHDOG)_RUN_OPT += -t --pid=host
+$(DOCKER_GNMI_WATCHDOG)_RUN_OPT += -v /lib/systemd/system:/lib/systemd/system:rw
+$(DOCKER_GNMI_WATCHDOG)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_GNMI_WATCHDOG)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro
+
+$(DOCKER_GNMI_WATCHDOG)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
diff --git a/rules/docker-platform-monitor.mk b/rules/docker-platform-monitor.mk
index 0b79fd936a0..0c25795ca4a 100644
--- a/rules/docker-platform-monitor.mk
+++ b/rules/docker-platform-monitor.mk
@@ -6,7 +6,7 @@ DOCKER_PLATFORM_MONITOR_DBG = $(DOCKER_PLATFORM_MONITOR_STEM)-$(DBG_IMAGE_MARK).
 
 $(DOCKER_PLATFORM_MONITOR)_PATH = $(DOCKERS_PATH)/$(DOCKER_PLATFORM_MONITOR_STEM)
 
-$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(LIBSENSORS) $(LM_SENSORS) $(FANCONTROL) $(SENSORD) $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON) $(IPMITOOL)
+$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(LIBSENSORS) $(LM_SENSORS) $(FANCONTROL) $(SENSORD) $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON)
 
 
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_PLATFORM_COMMON_PY3)
@@ -31,7 +31,6 @@ endif
 $(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS += $(LIBSWSSCOMMON_DBG) $(LIBSENSORS_DBG)
 $(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS += $(LM_SENSORS_DBG) $(SENSORD_DBG)
-$(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS += $(IPMITOOL_DBG)
 
 $(DOCKER_PLATFORM_MONITOR)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
diff --git a/rules/docker-sonic-mgmt.mk b/rules/docker-sonic-mgmt.mk
index a19b7159840..901e07af421 100644
--- a/rules/docker-sonic-mgmt.mk
+++ b/rules/docker-sonic-mgmt.mk
@@ -2,5 +2,6 @@
 DOCKER_SONIC_MGMT = docker-sonic-mgmt.gz
 $(DOCKER_SONIC_MGMT)_PATH = $(DOCKERS_PATH)/docker-sonic-mgmt
 $(DOCKER_SONIC_MGMT)_DEPENDS += $(SONIC_DEVICE_DATA) $(PTF) $(LIB_SONIC_DASH_API)
+$(DOCKER_SONIC_MGMT)_FILES += $(GITHUB_GET)
 SONIC_DOCKER_IMAGES += $(DOCKER_SONIC_MGMT)
 SONIC_BULLSEYE_DOCKERS += $(DOCKER_SONIC_MGMT)
diff --git a/rules/docker-sysmgr.dep b/rules/docker-sysmgr.dep
new file mode 100644
index 00000000000..f511d3c6e40
--- /dev/null
+++ b/rules/docker-sysmgr.dep
@@ -0,0 +1,10 @@
+DPATH       := $($(DOCKER_SYSMGR)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/docker-sysmgr.mk rules/docker-sysmgr.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_SYSMGR)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_SYSMGR)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SYSMGR)_DEP_FILES   := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_SYSMGR),$(DOCKER_SYSMGR_DBG)))
diff --git a/rules/docker-sysmgr.mk b/rules/docker-sysmgr.mk
new file mode 100644
index 00000000000..ea8efb5ae73
--- /dev/null
+++ b/rules/docker-sysmgr.mk
@@ -0,0 +1,35 @@
+# docker image for sysmgr
+
+DOCKER_SYSMGR_STEM = docker-sysmgr
+DOCKER_SYSMGR = $(DOCKER_SYSMGR_STEM).gz
+DOCKER_SYSMGR_DBG = $(DOCKER_SYSMGR_STEM)-$(DBG_IMAGE_MARK).gz
+
+$(DOCKER_SYSMGR)_PATH = $(DOCKERS_PATH)/$(DOCKER_SYSMGR_STEM)
+
+$(DOCKER_SYSMGR)_DEPENDS += $(SYSMGR)
+$(DOCKER_SYSMGR)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
+$(DOCKER_SYSMGR)_DBG_DEPENDS += $(SYSMGR_DBG) $(LIBSWSSCOMMON_DBG)
+$(DOCKER_SYSMGR)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
+
+$(DOCKER_SYSMGR)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+$(DOCKER_SYSMGR)_LOAD_DOCKERS += $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_LOAD_DOCKERS)
+
+$(DOCKER_SYSMGR)_VERSION = 1.0.0
+$(DOCKER_SYSMGR)_PACKAGE_NAME = sysmgr
+
+SONIC_DOCKER_IMAGES += $(DOCKER_SYSMGR)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYSMGR)
+
+SONIC_DOCKER_DBG_IMAGES += $(DOCKER_SYSMGR_DBG)
+SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_SYSMGR_DBG)
+
+$(DOCKER_SYSMGR)_CONTAINER_NAME = sysmgr
+$(DOCKER_SYSMGR)_RUN_OPT += -v /var/run/dbus:/var/run/dbus:rw  
+$(DOCKER_SYSMGR)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro  
+$(DOCKER_SYSMGR)_GIT_REPOSITORIES += "sonic-swss"
+$(DOCKER_SYSMGR)_GIT_REPOSITORIES += "sonic-swss-common"
+
+$(DOCKER_SYSMGR)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
+
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYSMGR)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_SYSMGR_DBG)
diff --git a/rules/eventd.mk b/rules/eventd.mk
index 02a6e372982..69f2753f334 100644
--- a/rules/eventd.mk
+++ b/rules/eventd.mk
@@ -11,8 +11,15 @@ SONIC_DPKG_DEBS += $(SONIC_EVENTD)
 
 SONIC_EVENTD_DBG = sonic-$(SONIC_EVENTD_PKG_NAME)-dbgsym_$(SONIC_EVENTD_VERSION)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(SONIC_EVENTD),$(SONIC_EVENTD_DBG)))
+
 SONIC_RSYSLOG_PLUGIN = sonic-rsyslog-plugin_$(SONIC_EVENTD_VERSION)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(SONIC_EVENTD),$(SONIC_RSYSLOG_PLUGIN)))
+
+SONIC_RSYSLOG_PLUGIN_DBG = sonic-rsyslog-plugin-dbgsym_$(SONIC_EVENTD_VERSION)_$(CONFIGURED_ARCH).deb
+$(SONIC_RSYSLOG_PLUGIN_DBG)_DEPENDS += $(SONIC_RSYSLOG_PLUGIN)
+$(SONIC_RSYSLOG_PLUGIN_DBG)_RDEPENDS += $(SONIC_RSYSLOG_PLUGIN)
+$(eval $(call add_derived_package,$(SONIC_EVENTD),$(SONIC_RSYSLOG_PLUGIN_DBG)))
+
 # The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list}
 # are archived into debug one image to facilitate debugging.
 #
diff --git a/rules/flashrom.mk b/rules/flashrom.mk
index 7ca74c4606a..ec6a3e2b03e 100644
--- a/rules/flashrom.mk
+++ b/rules/flashrom.mk
@@ -7,7 +7,10 @@ export FLASHROM_VERSION_FULL
 
 FLASHROM = flashrom_$(FLASHROM_VERSION_FULL)_amd64.deb
 $(FLASHROM)_SRC_PATH = $(SRC_PATH)/flashrom
-
 SONIC_MAKE_DEBS += $(FLASHROM)
 
-export FLASHROM
+FLASHROM_DBG = flashrom-dbgsym_$(FLASHROM_VERSION_FULL)_amd64.deb
+$(FLASHROM_DBG)_RDEPENDS += $(FLASHROM)
+$(eval $(call add_derived_package,$(FLASHROM),$(FLASHROM_DBG)))
+
+export FLASHROM FLASHROM_DBG
diff --git a/rules/frr.mk b/rules/frr.mk
index ff3c3ea4ab1..fca8cd22568 100644
--- a/rules/frr.mk
+++ b/rules/frr.mk
@@ -1,9 +1,9 @@
 # FRRouting (frr) package
 
-FRR_VERSION = 10.0.1
+FRR_VERSION = 10.3
 FRR_SUBVERSION = 0
-FRR_BRANCH = frr-10.0.1
-FRR_TAG = frr-10.0.1
+FRR_BRANCH = frr-10.3
+FRR_TAG = frr-10.3
 export FRR_VERSION FRR_SUBVERSION FRR_BRANCH FRR_TAG
 
 
diff --git a/rules/iptables.mk b/rules/iptables.mk
index c721d0919fe..4dc12ec3ec1 100644
--- a/rules/iptables.mk
+++ b/rules/iptables.mk
@@ -8,18 +8,38 @@ IPTABLES = iptables_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(IPTABLES)_SRC_PATH = $(SRC_PATH)/iptables
 SONIC_MAKE_DEBS += $(IPTABLES)
 
+IPTABLES_DBG = iptables-dbgsym_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(IPTABLES_DBG)_DEPENDS += $(IPTABLES)
+$(IPTABLES_DBG)_RDEPENDS += $(IPTABLES)
+$(eval $(call add_derived_package,$(IPTABLES),$(IPTABLES_DBG)))
+
 IPTABLESIP4TC = libip4tc2_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(IPTABLES),$(IPTABLESIP4TC)))
 
+LIBIP4TC_DBG = libip4tc2-dbgsym_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(LIBIP4TC_DBG)_DEPENDS += $(IPTABLESIP4TC)
+$(LIBIP4TC_DBG)_RDEPENDS += $(IPTABLESIP4TC)
+$(eval $(call add_derived_package,$(IPTABLES),$(LIBIP4TC_DBG)))
+
 IPTABLESIP6TC = libip6tc2_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(IPTABLES),$(IPTABLESIP6TC)))
 
+LIBIP6TC_DBG = libip6tc2-dbgsym_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(LIBIP6TC_DBG)_DEPENDS += $(IPTABLESIP6TC)
+$(LIBIP6TC_DBG)_RDEPENDS += $(IPTABLESIP6TC)
+$(eval $(call add_derived_package,$(IPTABLES),$(LIBIP6TC_DBG)))
+
 IPTABLESIPTC = libiptc0_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(IPTABLES),$(IPTABLESIPTC)))
 
 IPXTABLES12 = libxtables12_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(IPTABLES),$(IPXTABLES12)))
 
+LIBXTABLES_DBG = libxtables12-dbgsym_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(LIBXTABLES_DBG)_DEPENDS += $(IPXTABLES12)
+$(LIBXTABLES_DBG)_RDEPENDS += $(IPXTABLES12)
+$(eval $(call add_derived_package,$(IPTABLES),$(LIBXTABLES_DBG)))
+
 # Export these variables so they can be used in a sub-make
 export IPTABLES_VERSION
 export IPTABLES_VERSION_FULL
diff --git a/rules/libnl3.mk b/rules/libnl3.mk
index a40392e7784..af84823f873 100644
--- a/rules/libnl3.mk
+++ b/rules/libnl3.mk
@@ -12,6 +12,11 @@ LIBNL3 = libnl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL3)_SRC_PATH = $(SRC_PATH)/libnl3
 SONIC_MAKE_DEBS += $(LIBNL3)
 
+LIBNL3_DBG = libnl-3-200-dbgsym_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
+$(LIBNL3_DBG)_DEPENDS += $(LIBNL3)
+$(LIBNL3_DBG)_RDEPENDS += $(LIBNL3)
+$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL3_DBG)))
+
 LIBNL3_DEV = libnl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL3_DEV)_DEPENDS += $(LIBNL3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL3_DEV)))
@@ -20,6 +25,11 @@ LIBNL_GENL3 = libnl-genl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_GENL3)_RDEPENDS += $(LIBNL3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_GENL3)))
 
+LIBNL_GENL3_DBG = libnl-genl-3-200-dbgsym_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
+$(LIBNL_GENL3_DBG)_DEPENDS += $(LIBNL_GENL3)
+$(LIBNL_GENL3_DBG)_RDEPENDS += $(LIBNL_GENL3)
+$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_GENL3_DBG)))
+
 LIBNL_GENL3_DEV = libnl-genl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_GENL3_DEV)_DEPENDS += $(LIBNL_GENL3) $(LIBNL3_DEV)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_GENL3_DEV)))
@@ -28,6 +38,11 @@ LIBNL_ROUTE3 = libnl-route-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_ROUTE3)_RDEPENDS += $(LIBNL3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_ROUTE3)))
 
+LIBNL_ROUTE3_DBG = libnl-route-3-200-dbgsym_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
+$(LIBNL_ROUTE3_DBG)_DEPENDS += $(LIBNL_ROUTE3)
+$(LIBNL_ROUTE3_DBG)_RDEPENDS += $(LIBNL_ROUTE3)
+$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_ROUTE3_DBG)))
+
 LIBNL_ROUTE3_DEV = libnl-route-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_ROUTE3_DEV)_DEPENDS += $(LIBNL_ROUTE3) $(LIBNL3_DEV)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_ROUTE3_DEV)))
@@ -37,6 +52,11 @@ $(LIBNL_NF3)_DEPENDS += $(LIBNL_ROUTE3_DEV)
 $(LIBNL_NF3)_RDEPENDS += $(LIBNL_ROUTE3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_NF3)))
 
+LIBNL_NF3_DBG = libnl-nf-3-200-dbgsym_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
+$(LIBNL_NF3_DBG)_DEPENDS += $(LIBNL_NF3)
+$(LIBNL_NF3_DBG)_RDEPENDS += $(LIBNL_NF3)
+$(eval $(call add_derived_package,$(LIBNL_NF3),$(LIBNL_NF3_DBG)))
+
 LIBNL_NF3_DEV = libnl-nf-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_NF3_DEV)_DEPENDS += $(LIBNL_NF3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_NF3_DEV)))
@@ -46,6 +66,11 @@ $(LIBNL_CLI)_DEPENDS += $(LIBNL_GENL3_DEV) $(LIBNL_NF3_DEV) $(LIBNL_ROUTE3_DEV)
 $(LIBNL_CLI)_RDEPENDS += $(LIBNL_GENL3) $(LIBNL_NF3) $(LIBNL_ROUTE3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_CLI)))
 
+LIBNL_CLI_DBG = libnl-cli-3-200-dbgsym_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
+$(LIBNL_CLI_DBG)_DEPENDS += $(LIBNL_CLI)
+$(LIBNL_CLI_DBG)_RDEPENDS += $(LIBNL_CLI)
+$(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_CLI_DBG)))
+
 LIBNL_CLI_DEV = libnl-cli-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_CLI_DEV)_DEPENDS += $(LIBNL_CLI) $(LIBNL_GENL3_DEV) $(LIBNL_NF3_DEV) $(LIBNL_ROUTE3_DEV)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_CLI_DEV)))
diff --git a/rules/libyang.mk b/rules/libyang.mk
index a8e6734459e..22a62aa2de7 100644
--- a/rules/libyang.mk
+++ b/rules/libyang.mk
@@ -25,11 +25,21 @@ LIBYANG_CPP = libyang-cpp_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb
 $(LIBYANG_CPP)_DEPENDS += $(LIBYANG)
 $(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_CPP)))
 
+LIBYANG_CPP_DBG = libyang-cpp-dbgsym_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb
+$(LIBYANG_CPP_DBG)_DEPENDS += $(LIBYANG_CPP)
+$(LIBYANG_CPP_DBG)_RDEPENDS += $(LIBYANG_CPP)
+$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_CPP_DBG)))
+
 LIBYANG_PY3 = python3-yang_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb
 $(LIBYANG_PY3)_DEPENDS += $(LIBYANG) $(LIBYANG_CPP)
 $(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_PY3)))
 
+LIBYANG_PY3_DBG = python3-yang-dbgsym_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb
+$(LIBYANG_PY3_DBG)_DEPENDS += $(LIBYANG_PY3)
+$(LIBYANG_PY3_DBG)_RDEPENDS += $(LIBYANG_PY3)
+$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_PY3_DBG)))
+
 $(eval $(call add_conflict_package,$(LIBYANG),$(LIBYANG1),$(LIBYANG2)))
 $(eval $(call add_conflict_package,$(LIBYANG_DEV),$(LIBYANG1_DEV),$(LIBYANG2_DEV)))
 
-export LIBYANG LIBYANG_DBGSYM LIBYANG_DEV LIBYANG_CPP LIBYANG_PY3
+export LIBYANG LIBYANG_DBGSYM LIBYANG_DEV LIBYANG_CPP LIBYANG_CPP_DBG LIBYANG_PY3 LIBYANG_PY3_DBG
diff --git a/rules/linux-kernel.mk b/rules/linux-kernel.mk
index 24657808683..8cb0bab79e7 100644
--- a/rules/linux-kernel.mk
+++ b/rules/linux-kernel.mk
@@ -1,8 +1,8 @@
 # linux kernel package
 
-KVERSION_SHORT = 6.1.0-22-2
+KVERSION_SHORT = 6.1.0-29-2
 KVERSION = $(KVERSION_SHORT)-$(CONFIGURED_ARCH)
-KERNEL_VERSION = 6.1.94
+KERNEL_VERSION = 6.1.123
 KERNEL_SUBVERSION = 1
 ifeq ($(CONFIGURED_ARCH), armhf)
 # Override kernel version for ARMHF as it uses arm MP (multi-platform) for short version
diff --git a/rules/ntp.dep b/rules/ntp.dep
deleted file mode 100644
index c261482f932..00000000000
--- a/rules/ntp.dep
+++ /dev/null
@@ -1,10 +0,0 @@
-
-SPATH       := $($(NTP)_SRC_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/ntp.mk rules/ntp.dep   
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(SPATH))
-
-$(NTP)_CACHE_MODE  := GIT_CONTENT_SHA 
-$(NTP)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(NTP)_DEP_FILES   := $(DEP_FILES)
-
diff --git a/rules/ntp.mk b/rules/ntp.mk
deleted file mode 100644
index 52e7db51613..00000000000
--- a/rules/ntp.mk
+++ /dev/null
@@ -1,11 +0,0 @@
-# ntp package
-
-NTP_VERSION = 4.2.8p15+dfsg
-export NTP_VERSION
-
-NTP = ntp_$(NTP_VERSION)-1+deb10u2_$(CONFIGURED_ARCH).deb
-$(NTP)_SRC_PATH = $(SRC_PATH)/ntp
-SONIC_MAKE_DEBS += $(NTP)
-SONIC_STRETCH_DEBS += $(NTP)
-
-export NTP
diff --git a/rules/radius.mk b/rules/radius.mk
index eaa80a00155..95094e8a194 100644
--- a/rules/radius.mk
+++ b/rules/radius.mk
@@ -8,6 +8,11 @@ LIBPAM_RADIUS = libpam-radius-auth_$(PAM_RADIUS_VERSION)_$(CONFIGURED_ARCH).deb
 $(LIBPAM_RADIUS)_SRC_PATH = $(SRC_PATH)/radius/pam
 SONIC_MAKE_DEBS += $(LIBPAM_RADIUS)
 
+LIBPAM_RADIUS_DBG = libpam-radius-auth-dbgsym_$(PAM_RADIUS_VERSION)_$(CONFIGURED_ARCH).deb
+$(LIBPAM_RADIUS_DBG)_DEPENDS += $(LIBPAM_RADIUS)
+$(LIBPAM_RADIUS_DBG)_RDEPENDS += $(LIBPAM_RADIUS)
+$(eval $(call add_derived_package,$(LIBPAM_RADIUS),$(LIBPAM_RADIUS_DBG)))
+
 SONIC_STRETCH_DEBS += $(LIBPAM_RADIUS)
 
 # libnss-radius packages
@@ -20,5 +25,9 @@ LIBNSS_RADIUS = libnss-radius_$(NSS_RADIUS_VERSION)_$(CONFIGURED_ARCH).deb
 $(LIBNSS_RADIUS)_SRC_PATH = $(SRC_PATH)/radius/nss
 SONIC_MAKE_DEBS += $(LIBNSS_RADIUS)
 
-SONIC_STRETCH_DEBS += $(LIBNSS_RADIUS)
+LIBNSS_RADIUS_DBG = libnss-radius-dbgsym_$(NSS_RADIUS_VERSION)_$(CONFIGURED_ARCH).deb
+$(LIBNSS_RADIUS_DBG)_DEPENDS += $(LIBNSS_RADIUS)
+$(LIBNSS_RADIUS_DBG)_RDEPENDS += $(LIBNSS_RADIUS)
+$(eval $(call add_derived_package,$(LIBNSS_RADIUS),$(LIBNSS_RADIUS_DBG)))
 
+SONIC_STRETCH_DEBS += $(LIBNSS_RADIUS)
diff --git a/rules/rasdaemon.mk b/rules/rasdaemon.mk
index 82486d6a151..b8361696f8b 100644
--- a/rules/rasdaemon.mk
+++ b/rules/rasdaemon.mk
@@ -6,3 +6,8 @@ export RASDAEMON_VERSION
 RASDAEMON = rasdaemon_$(RASDAEMON_VERSION)_$(CONFIGURED_ARCH).deb
 $(RASDAEMON)_SRC_PATH = $(SRC_PATH)/rasdaemon
 SONIC_MAKE_DEBS += $(RASDAEMON)
+
+RASDAEMON_DBG = rasdaemon-dbgsym_$(RASDAEMON_VERSION)_$(CONFIGURED_ARCH).deb
+$(RASDAEMON_DBG)_DEPENDS += $(RASDAEMON)
+$(RASDAEMON_DBG)_RDEPENDS += $(RASDAEMON)
+$(eval $(call add_derived_package,$(RASDAEMON),$(RASDAEMON_DBG)))
diff --git a/rules/scripts.mk b/rules/scripts.mk
index 12919d520b0..c3296b5bcc9 100644
--- a/rules/scripts.mk
+++ b/rules/scripts.mk
@@ -35,6 +35,9 @@ $(COPP_CONFIG_TEMPLATE)_PATH = files/image_config/copp
 RSYSLOG_PLUGIN_CONF_J2 = rsyslog_plugin.conf.j2
 $(RSYSLOG_PLUGIN_CONF_J2)_PATH = files/build_templates
 
+GITHUB_GET = github_get.py
+$(GITHUB_GET)_PATH = scripts
+
 SONIC_COPY_FILES += $(CONFIGDB_LOAD_SCRIPT) \
                     $(ARP_UPDATE_SCRIPT) \
                     $(ARP_UPDATE_VARS_TEMPLATE) \
@@ -46,4 +49,5 @@ SONIC_COPY_FILES += $(CONFIGDB_LOAD_SCRIPT) \
                     $(UPDATE_CHASSISDB_CONFIG_SCRIPT) \
                     $(SWSS_VARS_TEMPLATE) \
                     $(RSYSLOG_PLUGIN_CONF_J2) \
+                    $(GITHUB_GET) \
                     $(COPP_CONFIG_TEMPLATE)
diff --git a/rules/sflow.mk b/rules/sflow.mk
index 949b82289a8..df11e79fa09 100644
--- a/rules/sflow.mk
+++ b/rules/sflow.mk
@@ -37,9 +37,14 @@ export PSAMPLE_VERSION PSAMPLE_SUBVERSION
 
 PSAMPLE = psample_$(PSAMPLE_VERSION)-$(PSAMPLE_SUBVERSION)_$(CONFIGURED_ARCH).deb
 $(PSAMPLE)_SRC_PATH = $(SRC_PATH)/sflow/psample
-
 SONIC_MAKE_DEBS += $(PSAMPLE)
-export PSAMPLE
+
+PSAMPLE_DBG = psample-dbgsym_$(PSAMPLE_VERSION)-$(PSAMPLE_SUBVERSION)_$(CONFIGURED_ARCH).deb
+$(PSAMPLE_DBG)_DEPENDS += $(PSAMPLE)
+$(PSAMPLE_DBG)_RDEPENDS += $(PSAMPLE)
+$(eval $(call add_derived_package,$(PSAMPLE),$(PSAMPLE_DBG)))
+
+export PSAMPLE PSAMPLE_DBG
 
 # The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list}
 # are archived into debug one image to facilitate debugging.
diff --git a/rules/snmpd.mk b/rules/snmpd.mk
index c70f30a4cad..a8e5958ce9a 100644
--- a/rules/snmpd.mk
+++ b/rules/snmpd.mk
@@ -24,6 +24,11 @@ $(SNMPTRAPD)_DEPENDS += $(LIBSNMP) $(SNMPD)
 $(SNMPTRAPD)_RDEPENDS += $(LIBSNMP) $(SNMPD)
 $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(SNMPTRAPD)))
 
+SNMPTRAPD_DBG = snmptrapd-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(SNMPTRAPD_DBG)_DEPENDS += $(SNMPTRAPD)
+$(SNMPTRAPD_DBG)_RDEPENDS += $(SNMPTRAPD)
+$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(SNMPTRAPD_DBG)))
+
 SNMP = snmp_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(SNMP)_DEPENDS += $(LIBSNMP)
 $(SNMP)_RDEPENDS += $(LIBSNMP)
@@ -70,6 +75,11 @@ $(LIBSNMP_PERL)_DEPENDS += $(LIBSNMP)
 $(LIBSNMP_PERL)_RDEPENDS += $(LIBSNMP)
 $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(LIBSNMP_PERL)))
 
+LIBSNMP_PERL_DBG = libsnmp-perl-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(LIBSNMP_PERL_DBG)_DEPENDS += $(LIBSNMP_PERL)
+$(LIBSNMP_PERL_DBG)_RDEPENDS += $(LIBSNMP_PERL)
+$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(LIBSNMP_PERL_DBG)))
+
 TKMIB = tkmib_$(SNMPD_VERSION_FULL)_all.deb
 $(TKMIB)_DEPENDS += $(LIBSNMP_PERL)
 $(TKMIB)_RDEPENDS += $(LIBSNMP_PERL)
diff --git a/rules/socat.mk b/rules/socat.mk
index 439e39af942..3eb00860e01 100644
--- a/rules/socat.mk
+++ b/rules/socat.mk
@@ -7,3 +7,8 @@ export SOCAT_VERSION
 SOCAT = socat_$(SOCAT_VERSION)_$(CONFIGURED_ARCH).deb
 $(SOCAT)_SRC_PATH = $(SRC_PATH)/socat
 SONIC_MAKE_DEBS += $(SOCAT)
+
+SOCAT_DBG = socat-dbgsym_$(SOCAT_VERSION)_$(CONFIGURED_ARCH).deb
+$(SOCAT_DBG)_DEPENDS += $(SOCAT)
+$(SOCAT_DBG)_RDEPENDS += $(SOCAT)
+$(eval $(call add_derived_package,$(SOCAT),$(SOCAT_DBG)))
diff --git a/rules/sonic-bmp.mk b/rules/sonic-bmp.mk
index 1d9f6b1a00c..8db7b6f3fca 100644
--- a/rules/sonic-bmp.mk
+++ b/rules/sonic-bmp.mk
@@ -3,4 +3,9 @@ SONIC_BMPD = sonic-bmp_0.1_$(CONFIGURED_ARCH).deb
 $(SONIC_BMPD)_SRC_PATH = $(SRC_PATH)/sonic-bmp
 $(SONIC_BMPD)_DEPENDS  =  $(LIBSWSSCOMMON_DEV) $(LIBSWSSCOMMON)
 $(SONIC_BMPD)_RDEPENDS = $(LIBSWSSCOMMON)
-SONIC_DPKG_DEBS += $(SONIC_BMPD)
\ No newline at end of file
+SONIC_DPKG_DEBS += $(SONIC_BMPD)
+
+SONIC_BMPD_DBG = sonic-bmp-dbgsym_0.1_$(CONFIGURED_ARCH).deb
+$(SONIC_BMPD_DBG)_DEPENDS += $(SONIC_BMPD)
+$(SONIC_BMPD_DBG)_RDEPENDS += $(SONIC_BMPD)
+$(eval $(call add_derived_package,$(SONIC_BMPD),$(SONIC_BMPD_DBG)))
diff --git a/rules/sonic-config.dep b/rules/sonic-config.dep
index 2b8b98fcd42..52a9284560f 100644
--- a/rules/sonic-config.dep
+++ b/rules/sonic-config.dep
@@ -4,7 +4,7 @@ SPATH       := $($(SONIC_CONFIG_ENGINE_PY3)_SRC_PATH)
 DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/sonic-config.mk rules/sonic-config.dep   
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(SPATH))
-DEP_FILES   += files/image_config/interfaces/interfaces.j2 dockers/docker-orchagent/ports.json.j2 dockers/docker-dhcp-relay/wait_for_intf.sh.j2 dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 dockers/docker-lldp/lldpd.conf.j2 dockers/docker-orchagent/ipinip.json.j2 $(shell find device -type f | sort) files/build_templates/qos_config.j2 dockers/docker-orchagent/switch.json.j2 dockers/docker-orchagent/vxlan.json.j2 files/image_config/constants/constants.yml
+DEP_FILES   += files/image_config/interfaces/interfaces.j2 dockers/docker-orchagent/ports.json.j2 dockers/docker-dhcp-relay/wait_for_intf.sh.j2 dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 dockers/docker-lldp/lldpd.conf.j2 dockers/docker-orchagent/ipinip.json.j2 $(shell find device -type f | sort) files/build_templates/qos_config.j2 dockers/docker-orchagent/switch.json.j2 dockers/docker-orchagent/vxlan.json.j2 files/image_config/constants/constants.yml dockers/docker-orchagent/orch_zmq_tables.conf.j2
 
 ifeq ($(ENABLE_PY2_MODULES), y)
     $(SONIC_CONFIG_ENGINE_PY2)_CACHE_MODE  := GIT_CONTENT_SHA 
diff --git a/rules/sonic-fips.mk b/rules/sonic-fips.mk
index c1f2c016ee6..c28857ccf96 100644
--- a/rules/sonic-fips.mk
+++ b/rules/sonic-fips.mk
@@ -3,7 +3,7 @@
 ifeq ($(BLDENV), bookworm)
 FIPS_VERSION = 1.5.2
 FIPS_OPENSSL_VERSION = 3.0.11-1~deb12u2+fips
-FIPS_OPENSSH_VERSION = 9.2p1-2+deb12u3+fips
+FIPS_OPENSSH_VERSION = 9.2p1-2+deb12u5+fips
 FIPS_PYTHON_MAIN_VERSION = 3.11
 FIPS_PYTHON_VERSION = 3.11.2-6+fips
 FIPS_GOLANG_MAIN_VERSION = 1.19
@@ -22,7 +22,7 @@ FIPS_GOLANG_VERSION = 1.15.15-1~deb11u4+fips
 FIPS_KRB5_VERSION = 1.18.3-6+deb11u5+fips
 endif
 
-FIPS_URL_PREFIX = https://sonicstorage.blob.core.windows.net/public/fips/$(BLDENV)/$(FIPS_VERSION)/$(CONFIGURED_ARCH)
+FIPS_URL_PREFIX = https://packages.trafficmanager.net/public/fips/$(BLDENV)/$(FIPS_VERSION)/$(CONFIGURED_ARCH)
 
 SYMCRYPT_OPENSSL_NAME = symcrypt-openssl
 SYMCRYPT_OPENSSL = $(SYMCRYPT_OPENSSL_NAME)_$(FIPS_VERSION)_$(CONFIGURED_ARCH).deb
diff --git a/rules/sonic-nettools.mk b/rules/sonic-nettools.mk
index 44351ec6be2..cd650698d9b 100644
--- a/rules/sonic-nettools.mk
+++ b/rules/sonic-nettools.mk
@@ -5,3 +5,8 @@ export SONIC_NETTOOLS_VERSION
 SONIC_NETTOOLS = sonic-nettools_$(SONIC_NETTOOLS_VERSION)_$(CONFIGURED_ARCH).deb
 $(SONIC_NETTOOLS)_SRC_PATH = $(SRC_PATH)/sonic-nettools
 SONIC_DPKG_DEBS += $(SONIC_NETTOOLS)
+
+SONIC_NETTOOLS_DBG = sonic-nettools-dbgsym_0.0.1-0_$(CONFIGURED_ARCH).deb
+$(SONIC_NETTOOLS_DBG)_DEPENDS += $(SONIC_NETTOOLS)
+$(SONIC_NETTOOLS_DBG)_RDEPENDS += $(SONIC_NETTOOLS)
+$(eval $(call add_derived_package,$(SONIC_NETTOOLS),$(SONIC_NETTOOLS_DBG)))
diff --git a/rules/sonic-utilities-data.dep b/rules/sonic-utilities-data.dep
index b11d0a55440..abcddfaf02c 100644
--- a/rules/sonic-utilities-data.dep
+++ b/rules/sonic-utilities-data.dep
@@ -1,9 +1,10 @@
 SPATH       := $($(SONIC_UTILITIES_DATA)_SRC_PATH)
 DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/sonic-utilities-data.mk rules/sonic-utilities-data.dep   
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(SPATH))
+SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files))
 
 $(SONIC_UTILITIES_DATA)_CACHE_MODE  := GIT_CONTENT_SHA
 $(SONIC_UTILITIES_DATA)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
 $(SONIC_UTILITIES_DATA)_DEP_FILES   := $(DEP_FILES)
-
+$(SONIC_UTILITIES_DATA)_SMDEP_FILES := $(SMDEP_FILES)
+$(SONIC_UTILITIES_DATA)_SMDEP_PATHS := $(SPATH)
diff --git a/rules/swss-common.mk b/rules/swss-common.mk
index 5d657d5e500..9dd181be6ae 100644
--- a/rules/swss-common.mk
+++ b/rules/swss-common.mk
@@ -9,9 +9,10 @@ $(LIBSWSSCOMMON)_VERSION = $(LIBSWSSCOMMON_VERSION)
 $(LIBSWSSCOMMON)_NAME = $(LIBSWSSCOMMON_NAME)
 $(LIBSWSSCOMMON)_DEPENDS += $(LIBNL3_DEV) $(LIBNL_GENL3_DEV) \
                             $(LIBNL_ROUTE3_DEV) $(LIBNL_NF3_DEV) \
-                            $(LIBNL_CLI_DEV) $(LIBYANG_DEV) $(LIBYANG) 
+                            $(LIBNL_CLI_DEV) $(LIBYANG_DEV) $(LIBYANG) $(LIBYANG_CPP) $(LIBYANG_PY3) 
 $(LIBSWSSCOMMON)_RDEPENDS += $(LIBNL3) $(LIBNL_GENL3) \
                              $(LIBNL_ROUTE3) $(LIBNL_NF3) $(LIBNL_CLI) $(LIBYANG) 
+$(LIBSWSSCOMMON)_WHEEL_DEPENDS += $(SONIC_YANG_MGMT_PY3) $(SONIC_YANG_MODELS_PY3) 
 SONIC_DPKG_DEBS += $(LIBSWSSCOMMON)
 
 LIBSWSSCOMMON_DEV = $(LIBSWSSCOMMON_NAME)-dev_$(LIBSWSSCOMMON_VERSION)_$(CONFIGURED_ARCH).deb
@@ -27,6 +28,11 @@ endif
 PYTHON3_SWSSCOMMON = python3-swsscommon_$(LIBSWSSCOMMON_VERSION)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(LIBSWSSCOMMON),$(PYTHON3_SWSSCOMMON)))
 
+PYTHON3_SWSSCOMMON_DBG = python3-swsscommon-dbgsym_$(LIBSWSSCOMMON_VERSION)_$(CONFIGURED_ARCH).deb
+$(PYTHON3_SWSSCOMMON_DBG)_DEPENDS += $(PYTHON3_SWSSCOMMON)
+$(PYTHON3_SWSSCOMMON_DBG)_RDEPENDS += $(PYTHON3_SWSSCOMMON)
+$(eval $(call add_derived_package,$(LIBSWSSCOMMON),$(PYTHON3_SWSSCOMMON_DBG)))
+
 LIBSWSSCOMMON_DBG = $(LIBSWSSCOMMON_NAME)-dbgsym_$(LIBSWSSCOMMON_VERSION)_$(CONFIGURED_ARCH).deb
 $(LIBSWSSCOMMON_DBG)_DEPENDS += $(LIBSWSSCOMMON)
 $(LIBSWSSCOMMON_DBG)_RDEPENDS += $(LIBSWSSCOMMON)
@@ -35,6 +41,11 @@ $(eval $(call add_derived_package,$(LIBSWSSCOMMON),$(LIBSWSSCOMMON_DBG)))
 SONIC_DB_CLI = sonic-db-cli_$(LIBSWSSCOMMON_VERSION)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(LIBSWSSCOMMON),$(SONIC_DB_CLI)))
 
+SONIC_DB_CLI_DBG = sonic-db-cli-dbgsym_$(LIBSWSSCOMMON_VERSION)_$(CONFIGURED_ARCH).deb
+$(SONIC_DB_CLI_DBG)_DEPENDS += $(SONIC_DB_CLI)
+$(SONIC_DB_CLI_DBG)_RDEPENDS += $(SONIC_DB_CLI)
+$(eval $(call add_derived_package,$(LIBSWSSCOMMON),$(SONIC_DB_CLI_DBG)))
+
 # The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list}
 # are archived into debug one image to facilitate debugging.
 #
diff --git a/rules/sysmgr.dep b/rules/sysmgr.dep
new file mode 100644
index 00000000000..e6756daec01
--- /dev/null
+++ b/rules/sysmgr.dep
@@ -0,0 +1,13 @@
+
+SPATH       := $($(SYSMGR)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/sysmgr.mk rules/sysmgr.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+SMDEP_PATHS := $(SPATH) $(SPATH)/gnoi
+$(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, \
+                                $(shell cd $(path)  && git ls-files | grep -v " ")))))
+
+$(SYSMGR)_CACHE_MODE  := GIT_CONTENT_SHA
+$(SYSMGR)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST) $(ENABLE_ASAN)
+$(SYSMGR)_DEP_FILES   := $(DEP_FILES)
+$(SYSMGR)_SMDEP_FILES := $(foreach path, $(SMDEP_PATHS), $($(path)))
+$(SYSMGR)_SMDEP_PATHS := $(SPATH) 
diff --git a/rules/sysmgr.mk b/rules/sysmgr.mk
new file mode 100644
index 00000000000..a690fe731fe
--- /dev/null
+++ b/rules/sysmgr.mk
@@ -0,0 +1,19 @@
+# sysmgr package
+
+SYSMGR = sysmgr_1.0.0_$(CONFIGURED_ARCH).deb
+$(SYSMGR)_SRC_PATH = $(SRC_PATH)/sonic-sysmgr
+$(SYSMGR)_DEPENDS += $(LIBSWSSCOMMON_DEV) \
+ 			$(PROTOBUF) $(PROTOBUF_LITE) $(PROTOBUF_DEV) $(PROTOBUF_COMPILER)
+
+$(SYSMGR)_RDEPENDS += $(LIBSWSSCOMMON) $(PROTOBUF)
+SONIC_DPKG_DEBS += $(SYSMGR)
+
+SYSMGR_DBG = sysmgr-dbg_1.0.0_$(CONFIGURED_ARCH).deb
+$(SYSMGR_DBG)_DEPENDS += $(SYSMGR)
+$(SYSMGR_DBG)_RDEPENDS += $(SYSMGR)
+$(eval $(call add_derived_package,$(SYSMGR),$(SYSMGR_DBG)))
+
+# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list}
+# are archived into debug one image to facilitate debugging.
+#
+DBG_SRC_ARCHIVE += sonic-sysmgr
diff --git a/rules/systemd-sonic-generator.mk b/rules/systemd-sonic-generator.mk
index 80d9b65f5e0..f80c1d48b2b 100644
--- a/rules/systemd-sonic-generator.mk
+++ b/rules/systemd-sonic-generator.mk
@@ -1,3 +1,8 @@
 SYSTEMD_SONIC_GENERATOR = systemd-sonic-generator_1.0.0_$(CONFIGURED_ARCH).deb
 $(SYSTEMD_SONIC_GENERATOR)_SRC_PATH = $(SRC_PATH)/systemd-sonic-generator
 SONIC_DPKG_DEBS += $(SYSTEMD_SONIC_GENERATOR)
+
+SYSTEMD_SONIC_GENERATOR_DBG = systemd-sonic-generator-dbgsym_1.0.0_$(CONFIGURED_ARCH).deb
+$(SYSTEMD_SONIC_GENERATOR_DBG)_DEPENDS += $(SYSTEMD_SONIC_GENERATOR)
+$(SYSTEMD_SONIC_GENERATOR_DBG)_RDEPENDS += $(SYSTEMD_SONIC_GENERATOR)
+$(eval $(call add_derived_package,$(SYSTEMD_SONIC_GENERATOR),$(SYSTEMD_SONIC_GENERATOR_DBG)))
diff --git a/rules/tacacs.mk b/rules/tacacs.mk
index 06c2c497a5e..35be48f2964 100644
--- a/rules/tacacs.mk
+++ b/rules/tacacs.mk
@@ -8,10 +8,20 @@ LIBTAC2 = libtac2_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
 $(LIBTAC2)_SRC_PATH = $(SRC_PATH)/tacacs/pam
 SONIC_MAKE_DEBS += $(LIBTAC2)
 
+LIBTAC2_DBG = libtac2-dbgsym_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
+$(LIBTAC2_DBG)_DEPENDS += $(LIBTAC2)
+$(LIBTAC2_DBG)_RDEPENDS += $(LIBTAC2)
+$(eval $(call add_derived_package,$(LIBTAC2),$(LIBTAC2_DBG)))
+
 LIBPAM_TACPLUS = libpam-tacplus_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
 $(LIBPAM_TACPLUS)_RDEPENDS += $(LIBTAC2)
 $(eval $(call add_extra_package,$(LIBTAC2),$(LIBPAM_TACPLUS)))
 
+LIBPAM_TACPLUS_DBG = libpam-tacplus-dbgsym_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
+$(LIBPAM_TACPLUS_DBG)_DEPENDS += $(LIBPAM_TACPLUS)
+$(LIBPAM_TACPLUS_DBG)_RDEPENDS += $(LIBPAM_TACPLUS)
+$(eval $(call add_derived_package,$(LIBTAC2),$(LIBPAM_TACPLUS_DBG)))
+
 LIBTAC_DEV = libtac-dev_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
 $(LIBTAC_DEV)_DEPENDS += $(LIBTAC2)
 $(eval $(call add_derived_package,$(LIBTAC2),$(LIBTAC_DEV)))
@@ -27,6 +37,11 @@ $(LIBNSS_TACPLUS)_RDEPENDS += $(LIBTAC2)
 $(LIBNSS_TACPLUS)_SRC_PATH = $(SRC_PATH)/tacacs/nss
 SONIC_MAKE_DEBS += $(LIBNSS_TACPLUS)
 
+LIBNSS_TACPLUS_DBG = libnss-tacplus-dbgsym_$(NSS_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
+$(LIBNSS_TACPLUS_DBG)_DEPENDS += $(LIBNSS_TACPLUS)
+$(LIBNSS_TACPLUS_DBG)_RDEPENDS += $(LIBNSS_TACPLUS)
+$(eval $(call add_derived_package,$(LIBNSS_TACPLUS),$(LIBNSS_TACPLUS_DBG)))
+
 # audisp-tacplus packages
 AUDISP_TACPLUS_VERSION = 1.0.2
 
@@ -38,6 +53,11 @@ $(AUDISP_TACPLUS)_RDEPENDS += $(LIBTAC2)
 $(AUDISP_TACPLUS)_SRC_PATH = $(SRC_PATH)/tacacs/audisp
 SONIC_MAKE_DEBS += $(AUDISP_TACPLUS)
 
+AUDISP_TACPLUS_DBG = audisp-tacplus-dbgsym_$(AUDISP_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
+$(AUDISP_TACPLUS_DBG)_DEPENDS += $(AUDISP_TACPLUS)
+$(AUDISP_TACPLUS_DBG)_RDEPENDS += $(AUDISP_TACPLUS)
+$(eval $(call add_derived_package,$(AUDISP_TACPLUS),$(AUDISP_TACPLUS_DBG)))
+
 # bash-tacplus packages
 BASH_TACPLUS_VERSION = 1.0.0
 
@@ -49,6 +69,11 @@ $(BASH_TACPLUS)_RDEPENDS += $(LIBTAC2)
 $(BASH_TACPLUS)_SRC_PATH = $(SRC_PATH)/tacacs/bash_tacplus
 SONIC_DPKG_DEBS += $(BASH_TACPLUS)
 
+BASH_TACPLUS_DBG = bash-tacplus-dbgsym_$(BASH_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
+$(BASH_TACPLUS_DBG)_DEPENDS += $(BASH_TACPLUS)
+$(BASH_TACPLUS_DBG)_RDEPENDS += $(BASH_TACPLUS)
+$(eval $(call add_derived_package,$(BASH_TACPLUS),$(BASH_TACPLUS_DBG)))
+
 # The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list}
 # are archived into debug one image to facilitate debugging.
 #
diff --git a/rules/telemetry.mk b/rules/telemetry.mk
index 4739871e470..8e506ed8ff7 100644
--- a/rules/telemetry.mk
+++ b/rules/telemetry.mk
@@ -6,3 +6,8 @@ $(SONIC_TELEMETRY)_DEPENDS  = $(SONIC_MGMT_COMMON) $(SONIC_MGMT_COMMON_CODEGEN)
     $(LIBSWSSCOMMON_DEV) $(LIBSWSSCOMMON) 
 $(SONIC_TELEMETRY)_RDEPENDS = $(LIBSWSSCOMMON)
 SONIC_DPKG_DEBS += $(SONIC_TELEMETRY)
+
+SONIC_TELEMETRY_DBG = sonic-gnmi-dbgsym_0.1_$(CONFIGURED_ARCH).deb
+$(SONIC_TELEMETRY_DBG)_DEPENDS += $(SONIC_TELEMETRY)
+$(SONIC_TELEMETRY_DBG)_RDEPENDS += $(SONIC_TELEMETRY)
+$(eval $(call add_derived_package,$(SONIC_TELEMETRY),$(SONIC_TELEMETRY_DBG)))
diff --git a/scripts/build_kvm_image.sh b/scripts/build_kvm_image.sh
index 66fc4e42770..02df44b5635 100755
--- a/scripts/build_kvm_image.sh
+++ b/scripts/build_kvm_image.sh
@@ -4,7 +4,7 @@
 #
 #  SPDX-License-Identifier:     GPL-2.0
 
-MEM=8192
+MEM=10240
 DISK=$1
 ONIE_RECOVERY_ISO=$2
 INSTALLER=$3
diff --git a/scripts/build_mirror_config.sh b/scripts/build_mirror_config.sh
index e7b9182fe95..8b06866f9cf 100755
--- a/scripts/build_mirror_config.sh
+++ b/scripts/build_mirror_config.sh
@@ -25,7 +25,7 @@ if [ "$ARCHITECTURE" == "armhf" ]; then
     DEFAULT_MIRROR_SECURITY_URLS=http://deb.debian.org/debian-security/
 fi
 
-if [ "$DISTRIBUTION" == "buster" ]; then
+if [ "$DISTRIBUTION" == "buster" ] || [ "$DISTRIBUTION" == "bullseye" ]; then
     DEFAULT_MIRROR_URLS=http://archive.debian.org/debian/
 fi
 
@@ -41,6 +41,10 @@ if [ "$MIRROR_SNAPSHOT" == y ]; then
     DEFAULT_MIRROR_URLS=http://deb.debian.org/debian/,http://packages.trafficmanager.net/snapshot/debian/$DEBIAN_TIMESTAMP/
     DEFAULT_MIRROR_SECURITY_URLS=http://deb.debian.org/debian-security/,http://packages.trafficmanager.net/snapshot/debian-security/$DEBIAN_SECURITY_TIMESTAMP/
 
+	if [ "$DISTRIBUTION" == "buster" ] || [ "$DISTRIBUTION" == "bullseye" ]; then
+		DEFAULT_MIRROR_URLS=http://archive.debian.org/debian/,http://packages.trafficmanager.net/snapshot/debian/$DEBIAN_TIMESTAMP/
+	fi
+
     mkdir -p target/versions/default
     if [ ! -f target/versions/default/versions-mirror ]; then
         echo "debian==$DEBIAN_TIMESTAMP" > target/versions/default/versions-mirror
diff --git a/scripts/github_get.py b/scripts/github_get.py
new file mode 100755
index 00000000000..dd685e295b3
--- /dev/null
+++ b/scripts/github_get.py
@@ -0,0 +1,72 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+import os
+import sys
+import re
+import json
+import requests
+
+def get(url, file_name=None, dir_name=None):
+    '''
+    Get the files in the given URL
+    :param url: The URL is a github API URL that returns a JSON object
+    :param file_name: if specified, url will be github download_url
+    :return: None
+    :raises: Exception if the download fails
+    '''
+    try:
+        response = requests.get(url)
+        response.raise_for_status()
+    except requests.exceptions.RequestException as e:
+        raise Exception(f"Request failed: {e}")
+
+    if file_name:
+        with open(file_name, 'wb') as file:
+            file.write(response.content)
+        return
+
+    def get_file(file):
+        if file['download_url']:
+            get(file['download_url'], file_name=file['name'])
+        else:
+            if file['type'] == 'dir':
+                get(file['url'], dir_name=file['name'])
+            else:
+                get(file['git_url'].replace('/git/trees/', '/contents?ref='))
+
+    try:
+        data = response.json()
+    except json.JSONDecodeError as e:
+        raise Exception(f"JSON decode error: {e}")
+
+    if isinstance(data, list):
+        if not dir_name:
+            pattern = r"https://api\.github\.com/repos/[^/]+/([^/]+)/contents(.*)"
+            repo_name, path = re.search(pattern, url).groups()
+            path = path.split('/')[-1].split('?')[0]
+            dir_name = path if path else repo_name
+
+        cur = os.getcwd()
+        os.mkdir(dir_name)
+        os.chdir(dir_name)
+        for item in data:
+            get_file(item)
+        os.chdir(cur)
+    else:
+        get_file(data)
+
+def help():
+    print(f"Usage: {sys.argv[0]} <github REST API url>")
+    print("        url format: https://api.github.com/repos/{owner}/{repo}/contents/{directory}?ref={branch}")
+    print(f"       url example: https://api.github.com/repos/sonic-net/DASH/contents/dash-pipeline/utils?ref=main")
+    sys.exit(1)
+
+if __name__ == '__main__':
+    if len(sys.argv) < 2 or sys.argv[1] == '-h':
+        help()
+
+    try:
+        get(sys.argv[1])
+    except Exception as e:
+        print(e)
+        sys.exit(1)
diff --git a/slave.mk b/slave.mk
index 8f3864c42c9..591c59e56a7 100644
--- a/slave.mk
+++ b/slave.mk
@@ -453,11 +453,13 @@ $(info "INCLUDE_NAT"                     : "$(INCLUDE_NAT)")
 $(info "INCLUDE_DHCP_RELAY"              : "$(INCLUDE_DHCP_RELAY)")
 $(info "INCLUDE_DHCP_SERVER"             : "$(INCLUDE_DHCP_SERVER)")
 $(info "INCLUDE_P4RT"                    : "$(INCLUDE_P4RT)")
+$(info "INCLUDE_VS_DASH_SAI"             : "$(INCLUDE_VS_DASH_SAI)")
 $(info "INCLUDE_KUBERNETES"              : "$(INCLUDE_KUBERNETES)")
 $(info "INCLUDE_KUBERNETES_MASTER"       : "$(INCLUDE_KUBERNETES_MASTER)")
 $(info "INCLUDE_MACSEC"                  : "$(INCLUDE_MACSEC)")
 $(info "INCLUDE_MUX"                     : "$(INCLUDE_MUX)")
 $(info "INCLUDE_TEAMD"                   : "$(INCLUDE_TEAMD)")
+$(info "INCLUDE_DASH_HA"                 : "$(INCLUDE_DASH_HA)")
 $(info "INCLUDE_ROUTER_ADVERTISER"       : "$(INCLUDE_ROUTER_ADVERTISER)")
 $(info "INCLUDE_BOOTCHART                : "$(INCLUDE_BOOTCHART)")
 $(info "ENABLE_BOOTCHART                 : "$(ENABLE_BOOTCHART)")
@@ -784,7 +786,7 @@ SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_MAKE_DEBS))
 #     $(SOME_NEW_DEB)_SRC_PATH = $(SRC_PATH)/project_name
 #     $(SOME_NEW_DEB)_DEPENDS = $(SOME_OTHER_DEB1) $(SOME_OTHER_DEB2) ...
 #     SONIC_DPKG_DEBS += $(SOME_NEW_DEB)
-$(addprefix $(DEBS_PATH)/, $(SONIC_DPKG_DEBS)) : $(DEBS_PATH)/% : .platform $$(addsuffix -install,$$(addprefix $(DEBS_PATH)/,$$($$*_DEPENDS))) \
+$(addprefix $(DEBS_PATH)/, $(SONIC_DPKG_DEBS)) : $(DEBS_PATH)/% : .platform $$(addsuffix -install,$$(addprefix $(PYTHON_WHEELS_PATH)/,$$($$*_WHEEL_DEPENDS))) $$(addsuffix -install,$$(addprefix $(DEBS_PATH)/,$$($$*_DEPENDS))) \
 			$$(addprefix $(DEBS_PATH)/,$$($$*_AFTER)) \
 			$$(addprefix $(FILES_PATH)/,$$($$*_AFTER_FILES)) \
 			$(call dpkg_depend,$(DEBS_PATH)/%.dep )
@@ -1122,6 +1124,16 @@ $(addprefix $(TARGET_PATH)/,$(DOWNLOADED_DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz :
 
 	$(FOOTER)
 
+# Targets for copy docker images
+$(addprefix $(TARGET_PATH)/,$(COPY_DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform \
+		$$(%.gz_DEP_FILES)
+	$(HEADER)
+
+	rm -rf $@ $@.log
+	cp "$($*.gz_PATH)/$*.gz" target/$(COPY_DOCKER_IMAGES) $(LOG)
+
+	$(FOOTER)
+
 # Targets for building docker images
 $(addprefix $(TARGET_PATH)/, $(DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform docker-start \
 		$$(addprefix $$($$*.gz_DEBS_PATH)/,$$($$*.gz_DEPENDS)) \
@@ -1285,6 +1297,7 @@ SONIC_TARGET_LIST += $(addprefix $(TARGET_PATH)/, $(DOCKER_DBG_IMAGES))
 DOCKER_LOAD_TARGETS = $(addsuffix -load,$(addprefix $(TARGET_PATH)/, \
 		      $(SONIC_SIMPLE_DOCKER_IMAGES) \
 		      $(DOWNLOADED_DOCKER_IMAGES) \
+		      $(COPY_DOCKER_IMAGES) \
 		      $(DOCKER_IMAGES) \
 		      $(DOCKER_DBG_IMAGES)))
 
@@ -1452,6 +1465,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \
 	export include_dhcp_server="$(INCLUDE_DHCP_SERVER)"
 	export include_mgmt_framework="$(INCLUDE_MGMT_FRAMEWORK)"
 	export include_iccpd="$(INCLUDE_ICCPD)"
+	export include_dash_ha="$(INCLUDE_DASH_HA)"
 	export include_stpd="$(INCLUDE_STP)"
 	export pddf_support="$(PDDF_SUPPORT)"
 	export include_pde="$(INCLUDE_PDE)"
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 9bbce154192..d7aa7c5de3f 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -430,6 +430,8 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
 # For audisp-tacplus
         libauparse-dev \
         auditd \
+# For sysmgr container build
+        libdbus-c++-dev \
 # For protobuf
         protobuf-compiler \
         libprotobuf-dev \
@@ -528,8 +530,8 @@ RUN eatmydata apt-get install -y kernel-wedge
 # For gobgp and telemetry build
 RUN eatmydata apt-get install -y golang
 {%- if INCLUDE_FIPS == "y" %}
-RUN wget -O golang-go.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-go_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \
- && wget -O golang-src.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-src_{{ FIPS_GOLANG_VERSION }}_all.deb' \
+RUN wget -O golang-go.deb 'https://packages.trafficmanager.net/public/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-go_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \
+ && wget -O golang-src.deb 'https://packages.trafficmanager.net/public/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-src_{{ FIPS_GOLANG_VERSION }}_all.deb' \
  && eatmydata dpkg -i golang-go.deb golang-src.deb \
  && ln -sf /usr/lib/go-1.19 /usr/local/go \
  && rm golang-go.deb golang-src.deb
@@ -555,7 +557,8 @@ RUN patch -p1 -i /disable-non-manylinux.patch /usr/local/lib/python3.11/dist-pac
 RUN pip3 install fastentrypoints mock
 
 # For DASH BMv2
-RUN pip3 install jsonpath_ng pyyaml-include
+RUN pip3 install jsonpath_ng
+RUN pip3 install pyyaml-include
 
 # For building sonic_ycabled
 # Note: Match version in bookworm
@@ -573,6 +576,9 @@ RUN pip3 install \
          ctypesgen==1.0.2 \
          crc16
 
+# For nvidia-bluefield sdk
+RUN pip3 install ctypeslib2 clang==14
+
 # For sonic config engine testing
 # Install pyangbind here, outside sonic-config-engine dependencies, as pyangbind causes enum34 to be installed.
 # enum34 causes Python 're' package to not work properly as it redefines an incompatible enum.py module
@@ -759,7 +765,7 @@ RUN curl -fsSL -o /usr/local/bin/bazel ${bazelisk_url} && chmod 755 /usr/local/b
 
 # Install Rust
 ARG RUST_ROOT=/usr/.cargo
-RUN RUSTUP_HOME=$RUST_ROOT CARGO_HOME=$RUST_ROOT bash -c 'curl --proto "=https" -sSf https://sh.rustup.rs | sh -s -- --default-toolchain 1.79.0 -y'
+RUN RUSTUP_HOME=$RUST_ROOT CARGO_HOME=$RUST_ROOT bash -c 'curl --proto "=https" -sSf https://sh.rustup.rs | sh -s -- --default-toolchain 1.86.0 -y'
 {% if CROSS_BUILD_ENVIRON == "y" and CONFIGURED_ARCH == "armhf" %}
 RUN mkdir -p /.cargo && $RUST_ROOT/bin/rustup target add armv7-unknown-linux-gnueabihf && echo "[target.armv7-unknown-linux-gnueabihf]\nlinker = \"arm-linux-gnueabihf-gcc\"" >> /.cargo/config.toml
 {% endif -%}
diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2
index d9517ca7d5e..1c99597359d 100644
--- a/sonic-slave-bullseye/Dockerfile.j2
+++ b/sonic-slave-bullseye/Dockerfile.j2
@@ -523,8 +523,8 @@ RUN eatmydata apt-get install -y kernel-wedge
 # For gobgp and telemetry build
 RUN eatmydata apt-get install -y golang-1.15 && ln -s /usr/lib/go-1.15 /usr/local/go
 {%- if INCLUDE_FIPS == "y" %}
-RUN wget -O golang-go.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bullseye/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.15-go_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \
- && wget -O golang-src.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bullseye/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.15-src_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \
+RUN wget -O golang-go.deb 'https://packages.trafficmanager.net/public/fips/bullseye/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.15-go_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \
+ && wget -O golang-src.deb 'https://packages.trafficmanager.net/public/fips/bullseye/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.15-src_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \
  && eatmydata dpkg -i golang-go.deb golang-src.deb \
  && ln -sf /usr/lib/go-1.15 /usr/local/go \
  && rm golang-go.deb golang-src.deb
@@ -590,8 +590,7 @@ RUN pip3 uninstall -y enum34
 RUN pip3 install j2cli==0.3.10
 
 # For sonic-mgmt-framework
-# The option --no-build-isolation can be removed when upgrading PyYAML to 6.0.1
-RUN pip3 install "PyYAML==5.4.1" --no-build-isolation
+
 {%- if CROSS_BUILD_ENVIRON != "y" %}
 RUN pip3 install "lxml==4.9.1"
 {%- endif %}
diff --git a/sonic-slave-buster/Dockerfile.j2 b/sonic-slave-buster/Dockerfile.j2
index b65a1a08957..2aa36d1b9c4 100644
--- a/sonic-slave-buster/Dockerfile.j2
+++ b/sonic-slave-buster/Dockerfile.j2
@@ -551,9 +551,6 @@ RUN pip3 install MarkupSafe==2.0.1
 RUN pip3 install Jinja2==3.0.3
 
 # For sonic-mgmt-framework
-# The option --no-build-isolation can be removed when upgrading PyYAML to 6.0.1
-RUN pip2 install "PyYAML==5.4.1" --no-build-isolation
-RUN pip3 install "PyYAML==5.4.1" --no-build-isolation
 
 {%- if CROSS_BUILD_ENVIRON != "y" %}
 RUN pip2 install "lxml==4.9.1"
diff --git a/sonic-slave-stretch/Dockerfile.j2 b/sonic-slave-stretch/Dockerfile.j2
index 280c8404aba..c716cb998e0 100644
--- a/sonic-slave-stretch/Dockerfile.j2
+++ b/sonic-slave-stretch/Dockerfile.j2
@@ -374,16 +374,16 @@ RUN apt-get install -y libarchive13 librhash0
 RUN apt-get -t stretch-backports install -y libuv1
 # Install cmake/cmake-data 3.13.2-1_bpo9+1
 # latest cmake 3.16.3 break the build libyang 1.0.73
-RUN wget -O cmake-data_3.13.2-1_bpo9+1_all.deb "https://sonicstorage.blob.core.windows.net/public/cmake/cmake-data_3.13.2-1_bpo9%2B1_all.deb"
+RUN wget -O cmake-data_3.13.2-1_bpo9+1_all.deb "https://packages.trafficmanager.net/public/cmake/cmake-data_3.13.2-1_bpo9%2B1_all.deb"
 RUN dpkg -i cmake-data_3.13.2-1_bpo9+1_all.deb || apt-get install -f
 {% if CONFIGURED_ARCH == "armhf" %}
-RUN wget -O cmake_3.13.2-1_bpo9+1_armhf.deb "https://sonicstorage.blob.core.windows.net/public/cmake/cmake_3.13.2-1_bpo9%2B1_armhf.deb"
+RUN wget -O cmake_3.13.2-1_bpo9+1_armhf.deb "https://packages.trafficmanager.net/public/cmake/cmake_3.13.2-1_bpo9%2B1_armhf.deb"
 RUN dpkg -i cmake_3.13.2-1_bpo9+1_armhf.deb || apt-get install -f
 {% elif CONFIGURED_ARCH == "arm64" %}
-RUN wget -O cmake_3.13.2-1_bpo9+1_arm64.deb "https://sonicstorage.blob.core.windows.net/public/cmake/cmake_3.13.2-1_bpo9%2B1_arm64.deb"
+RUN wget -O cmake_3.13.2-1_bpo9+1_arm64.deb "https://packages.trafficmanager.net/public/cmake/cmake_3.13.2-1_bpo9%2B1_arm64.deb"
 RUN dpkg -i cmake_3.13.2-1_bpo9+1_arm64.deb || apt-get install -f
 {% else %}
-RUN wget -O cmake_3.13.2-1_bpo9+1_amd64.deb "https://sonicstorage.blob.core.windows.net/public/cmake/cmake_3.13.2-1_bpo9%2B1_amd64.deb"
+RUN wget -O cmake_3.13.2-1_bpo9+1_amd64.deb "https://packages.trafficmanager.net/public/cmake/cmake_3.13.2-1_bpo9%2B1_amd64.deb"
 RUN dpkg -i cmake_3.13.2-1_bpo9+1_amd64.deb || apt-get install -f
 {% endif %}
 RUN cd /usr/src/gtest && cmake . && make -C /usr/src/gtest
diff --git a/src/bash/Makefile b/src/bash/Makefile
index a72cbc17035..e10d4e07a2e 100644
--- a/src/bash/Makefile
+++ b/src/bash/Makefile
@@ -3,6 +3,7 @@ SHELL = /bin/bash
 .SHELLFLAGS += -e
 
 MAIN_TARGET = bash_$(BASH_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = $(BASH_DBG)
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	# Quilt store applied patches info in .pc folder, if this folder not clean, quilt can't apply patches correctly.
@@ -36,4 +37,6 @@ else
 endif
 	popd
 
-	mv $* $(DEST)/
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/src/dhcpmon b/src/dhcpmon
index f6dfbe923ae..6aa29ed038c 160000
--- a/src/dhcpmon
+++ b/src/dhcpmon
@@ -1 +1 @@
-Subproject commit f6dfbe923ae2085b05cb1dac7db7a5e4e505bf61
+Subproject commit 6aa29ed038cb0f8173d9ac6bf40ae966f4163911
diff --git a/src/dhcprelay b/src/dhcprelay
index b242307e819..3ac08b55028 160000
--- a/src/dhcprelay
+++ b/src/dhcprelay
@@ -1 +1 @@
-Subproject commit b242307e819d257acc0410a81f839f9cd518bce4
+Subproject commit 3ac08b5502828535a8ed9656cdd77be0f2fdfe7a
diff --git a/src/flashrom/Makefile b/src/flashrom/Makefile
index 70365d648f4..fdb9f504fe0 100644
--- a/src/flashrom/Makefile
+++ b/src/flashrom/Makefile
@@ -4,6 +4,7 @@ SHELL = /bin/bash
 
 
 MAIN_TARGET = $(FLASHROM)
+DERIVED_TARGETS = $(FLASHROM_DBG)
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	rm -rf ./flashrom-$(FLASHROM_VERSION_FULL)
@@ -22,4 +23,6 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
 	popd
 
-	mv $* $(DEST)/
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/src/iptables/Makefile b/src/iptables/Makefile
index 3efa01dfd54..898eefe9b37 100644
--- a/src/iptables/Makefile
+++ b/src/iptables/Makefile
@@ -3,10 +3,14 @@ SHELL = /bin/bash
 .SHELLFLAGS += -e
 
 MAIN_TARGET = $(IPTABLES)
-DERIVED_TARGETS = libip4tc2_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+DERIVED_TARGETS = iptables-dbgsym_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  libip4tc2_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  libip4tc2-dbgsym_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  libip6tc2_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  libip6tc2-dbgsym_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  libiptc0_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
-		  libxtables12_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+		  libxtables12_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  libxtables12-dbgsym_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 
 IPTABLES_URL = http://deb.debian.org/debian/pool/main/i/iptables
 
diff --git a/src/ixgbe/Makefile b/src/ixgbe/Makefile
index 7514a08fae7..436a4b85c74 100644
--- a/src/ixgbe/Makefile
+++ b/src/ixgbe/Makefile
@@ -6,7 +6,7 @@ MAIN_TARGET = ixgbe.ko
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	rm -rf ./ixgbe-$(IXGBE_DRIVER_VERSION)
-	wget -O ixgbe-$(IXGBE_DRIVER_VERSION).tar.gz "https://sonicstorage.blob.core.windows.net/public/ixgbe-5.2.4.tar.gz"
+	wget -O ixgbe-$(IXGBE_DRIVER_VERSION).tar.gz "https://packages.trafficmanager.net/public/ixgbe-5.2.4.tar.gz"
 	tar xzf ixgbe-$(IXGBE_DRIVER_VERSION).tar.gz
 
 	# Patch
diff --git a/src/kdump-tools/patch/0004-disable-kdump-load-check.patch b/src/kdump-tools/patch/0004-disable-kdump-load-check.patch
new file mode 100644
index 00000000000..24128d930b1
--- /dev/null
+++ b/src/kdump-tools/patch/0004-disable-kdump-load-check.patch
@@ -0,0 +1,16 @@
+diff --git a/debian/kdump-config.in b/debian/kdump-config.in
+index ded079f..dcf2991 100755
+--- a/debian/kdump-config.in
++++ b/debian/kdump-config.in
+@@ -487,11 +487,6 @@ kdump_create_symlinks()
+ {
+ 	kernel_version=$1
+ 
+-	if [ -e $sys_kexec_crash ] && [ "$(cat $sys_kexec_crash)" -eq 1 ] ; then
+-		log_failure_msg "Cannot change symbolic links when kdump is loaded"
+-		exit 1
+-	fi
+-
+ 	if [ -e "/boot/vmlinux-${kernel_version}" ] || [ -e "/boot/vmlinuz-${kernel_version}" ]; then
+ 		create_symlink vmlinuz "$kernel_version"
+ 
diff --git a/src/kdump-tools/patch/series b/src/kdump-tools/patch/series
index 0af2c976020..369545368bc 100644
--- a/src/kdump-tools/patch/series
+++ b/src/kdump-tools/patch/series
@@ -1,2 +1,3 @@
 0002-core-file-prefixed-by-kdump.patch
 0003-Revert-the-MODULES-dep-optimization.patch
+0004-disable-kdump-load-check.patch
diff --git a/src/libnl3/Makefile b/src/libnl3/Makefile
index 34a40d5d237..4aca8350d3a 100644
--- a/src/libnl3/Makefile
+++ b/src/libnl3/Makefile
@@ -3,14 +3,19 @@ SHELL = /bin/bash
 .SHELLFLAGS += -e
 
 MAIN_TARGET = libnl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = libnl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+DERIVED_TARGETS = libnl-3-200-dbgsym_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
 		  libnl-genl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-genl-3-200-dbgsym_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
 		  libnl-genl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
 		  libnl-route-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-route-3-200-dbgsym_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
 		  libnl-route-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb  \
 		  libnl-nf-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-nf-3-200-dbgsym_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
 		  libnl-nf-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
 		  libnl-cli-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-cli-3-200-dbgsym_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
 		  libnl-cli-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
diff --git a/src/libnl3/patch/series b/src/libnl3/patch/series
index 92317908c4f..93799c6d16e 100644
--- a/src/libnl3/patch/series
+++ b/src/libnl3/patch/series
@@ -2,3 +2,4 @@
 switch-to-debhelper.patch
 keep-symbol-versions-in-libraries.patch
 update-changelog.patch
+skip-tests-when-having-no-private-netns.patch
diff --git a/src/libnl3/patch/skip-tests-when-having-no-private-netns.patch b/src/libnl3/patch/skip-tests-when-having-no-private-netns.patch
new file mode 100644
index 00000000000..671a03486b1
--- /dev/null
+++ b/src/libnl3/patch/skip-tests-when-having-no-private-netns.patch
@@ -0,0 +1,163 @@
+From b3822aa3b605b2dc5f01f9aee8ee224fc23e23a0 Mon Sep 17 00:00:00 2001
+From: Thomas Haller <thaller@redhat.com>
+Date: Sun, 12 Jan 2025 10:54:59 +0100
+Subject: [PATCH] test: skip tests when having no private netns
+
+In github CI we seem now unable to create the netns. This worked
+previously, now it no longer does.
+
+Handle that by skipping the tests that require a netns.
+---
+ tests/cksuite-all-netns.c | 13 +++++++++-
+ tests/nl-test-util.c      | 50 +++++++++++++++++++++++++++++++++++++--
+ tests/nl-test-util.h      |  3 +++
+ 3 files changed, 63 insertions(+), 3 deletions(-)
+
+diff --git a/tests/cksuite-all-netns.c b/tests/cksuite-all-netns.c
+index 1948c3e8..04e0f6df 100644
+--- a/tests/cksuite-all-netns.c
++++ b/tests/cksuite-all-netns.c
+@@ -73,6 +73,9 @@ START_TEST(cache_and_clone)
+ 	int i;
+ 	int r;
+ 
++	if (_nltst_skip_no_netns())
++		return;
++
+ 	for (i = 0; i < _NL_N_ELEMENTS(links); i++) {
+ 		if (links[i].add)
+ 			_nltst_add_link(NULL, links[i].ifname, links[i].kind,
+@@ -132,11 +135,16 @@ START_TEST(test_create_iface)
+ 	_nl_auto_rtnl_link struct rtnl_link *link2 = NULL;
+ 	_nl_auto_rtnl_link struct rtnl_link *peer = NULL;
+ 	_nltst_auto_delete_link const char *IFNAME_DUMMY = NULL;
+-	_nltst_auto_delete_link const char *IFNAME = "ifname";
++	_nltst_auto_delete_link const char *IFNAME = NULL;
+ 	int ifindex_dummy;
+ 	uint32_t u32;
+ 	int r;
+ 
++	if (_nltst_skip_no_netns())
++		return;
++
++	IFNAME = "ifname";
++
+ 	switch (TEST_IDX) {
+ 	case 0:
+ 		link = _nltst_assert(rtnl_link_bridge_alloc());
+diff --git a/tests/nl-test-util.c b/tests/nl-test-util.c
+index dc8dc5ad..d1a8f3f1 100644
+--- a/tests/nl-test-util.c
++++ b/tests/nl-test-util.c
+@@ -84,6 +84,7 @@ uint32_t _nltst_rand_u32(void)
+ 
+ struct nltst_netns {
+ 	int canary;
++	bool is_unshared;
+ };
+ 
+ /*****************************************************************************/
+@@ -114,6 +115,23 @@ void nltst_netns_fixture_teardown(void)
+ 	_nl_clear_pointer(&_netns_fixture_global.nsdata, nltst_netns_leave);
+ }
+ 
++bool nltst_netns_fixture_is_unshared(void)
++{
++	_assert_nltst_netns(_netns_fixture_global.nsdata);
++	return _netns_fixture_global.nsdata->is_unshared;
++}
++
++/*****************************************************************************/
++
++bool _nltst_skip_no_netns(void)
++{
++	if (nltst_netns_fixture_is_unshared())
++		return false;
++
++	printf("skip test due to having no private netns\n");
++	return true;
++}
++
+ /*****************************************************************************/
+ 
+ static void unshare_user(void)
+@@ -125,6 +143,10 @@ static void unshare_user(void)
+ 
+ 	/* Become a root in new user NS. */
+ 	r = unshare(CLONE_NEWUSER);
++	if (r != 0 && errno == EPERM) {
++		/* No permissions? Ignore. Will be handled later. */
++		return;
++	}
+ 	_nltst_assert_errno(r == 0);
+ 
+ 	/* Since Linux 3.19 we have to disable setgroups() in order to map users.
+@@ -149,14 +171,28 @@ static void unshare_user(void)
+ 	}
+ 	r = fprintf(f, "0 %d 1", uid);
+ 	_nltst_assert_errno(r > 0);
+-	_nltst_fclose(f);
++	r = fclose(f);
++	if (r != 0 && errno == EPERM) {
++		/* Oddly, it seems close() can fail at this point. Ignore it,
++		 * but we probably will be unable to unshare (which we handle
++		 * later).
++		 */
++	} else
++		_nltst_assert_errno(r == 0);
+ 
+ 	/* Map current GID to root in NS to be created. */
+ 	f = fopen("/proc/self/gid_map", "we");
+ 	_nltst_assert_errno(f);
+ 	r = fprintf(f, "0 %d 1", gid);
+ 	_nltst_assert_errno(r > 0);
+-	_nltst_fclose(f);
++	r = fclose(f);
++	if (r != 0 && errno == EPERM) {
++		/* Oddly, it seems close() can fail at this point. Ignore it, but
++		 * we probably will be unable to unshare (which we handle
++		 * later).
++		 */
++	} else
++		_nltst_assert_errno(r == 0);
+ }
+ 
+ struct nltst_netns *nltst_netns_enter(void)
+@@ -172,6 +208,15 @@ struct nltst_netns *nltst_netns_enter(void)
+ 	unshare_user();
+ 
+ 	r = unshare(CLONE_NEWNET | CLONE_NEWNS);
++	if (r != 0 && errno == EPERM) {
++		/* The system is probably sandboxed somehow and we are unable
++		 * to create a private netns. That seems questionable, because
++		 * a point of a private netns is to sandbox an application.
++		 * Not having permissions to sandbox sounds bad.
++		 *
++		 * Anyway. We accept this and will later skip some tests. */
++		return nsdata;
++	}
+ 	_nltst_assert_errno(r == 0);
+ 
+ 	/* We need a read-only /sys so that the platform knows there's no udev. */
+@@ -179,6 +224,7 @@ struct nltst_netns *nltst_netns_enter(void)
+ 	r = mount("sys", "/sys", "sysfs", MS_RDONLY, NULL);
+ 	_nltst_assert_errno(r == 0);
+ 
++	nsdata->is_unshared = true;
+ 	return nsdata;
+ }
+ 
+diff --git a/tests/nl-test-util.h b/tests/nl-test-util.h
+index 981228b4..d840a4ab 100644
+--- a/tests/nl-test-util.h
++++ b/tests/nl-test-util.h
+@@ -429,6 +429,9 @@ char **_nltst_strtokv(const char *str);
+ 
+ void nltst_netns_fixture_setup(void);
+ void nltst_netns_fixture_teardown(void);
++bool nltst_netns_fixture_is_unshared(void);
++
++bool _nltst_skip_no_netns(void);
+ 
+ struct nltst_netns;
+ 
diff --git a/src/libyang/Makefile b/src/libyang/Makefile
index da09a8424ae..e7d90ffeeb4 100644
--- a/src/libyang/Makefile
+++ b/src/libyang/Makefile
@@ -3,7 +3,12 @@ SHELL = /bin/bash
 .SHELLFLAGS += -e
 
 MAIN_TARGET = $(LIBYANG)
-DERIVED_TARGETS = $(LIBYANG_DEV) $(LIBYANG_DBGSYM) $(LIBYANG_PY3) $(LIBYANG_CPP)
+DERIVED_TARGETS = $(LIBYANG_DEV) \
+		  $(LIBYANG_DBGSYM) \
+		  $(LIBYANG_PY3) \
+		  $(LIBYANG_PY3_DBG) \
+		  $(LIBYANG_CPP) \
+		  $(LIBYANG_CPP_DBG)
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
         # Obtaining the libyang
diff --git a/src/libyang/patch/libyang-leaf-must.patch b/src/libyang/patch/libyang-leaf-must.patch
new file mode 100644
index 00000000000..7e1c01c49e4
--- /dev/null
+++ b/src/libyang/patch/libyang-leaf-must.patch
@@ -0,0 +1,29 @@
+diff --git a/swig/cpp/src/Tree_Schema.cpp b/swig/cpp/src/Tree_Schema.cpp
+index 3587320..8da206a 100644
+--- a/swig/cpp/src/Tree_Schema.cpp
++++ b/swig/cpp/src/Tree_Schema.cpp
+@@ -344,6 +344,7 @@ S_Schema_Node Schema_Node_Choice::dflt() {
+ Schema_Node_Leaf::~Schema_Node_Leaf() {};
+ S_Set Schema_Node_Leaf::backlinks() LY_NEW_CASTED(lys_node_leaf, node, backlinks, Set);
+ S_When Schema_Node_Leaf::when() LY_NEW_CASTED(lys_node_leaf, node, when, When);
++std::vector<S_Restr> Schema_Node_Leaf::must() LY_NEW_LIST_CASTED(lys_node_leaf, node, must, must_size, Restr);
+ S_Type Schema_Node_Leaf::type() {return std::make_shared<Type>(&((struct lys_node_leaf *)node)->type, deleter);}
+ S_Schema_Node_List Schema_Node_Leaf::is_key() {
+     uint8_t pos;
+diff --git a/swig/cpp/src/Tree_Schema.hpp b/swig/cpp/src/Tree_Schema.hpp
+index d506891..f8ecc50 100644
+--- a/swig/cpp/src/Tree_Schema.hpp
++++ b/swig/cpp/src/Tree_Schema.hpp
+@@ -683,8 +683,12 @@ public:
+     ~Schema_Node_Leaf();
+     /** get backlinks variable from [lys_node_leaf](@ref lys_node_leaf)*/
+     S_Set backlinks();
++    /** get must_size variable from [lys_node_leaf](@ref lys_node_leaf)*/
++    uint8_t must_size() {return ((struct lys_node_leaf *)node)->must_size;};
+     /** get when variable from [lys_node_leaf](@ref lys_node_leaf)*/
+     S_When when();
++    /** get must variable from [lys_node_leaf](@ref lys_node_leaf)*/
++    std::vector<S_Restr> must();
+     /** get type variable from [lys_node_leaf](@ref lys_node_leaf)*/
+     S_Type type();
+     /** get units variable from [lys_node_leaf](@ref lys_node_leaf)*/
diff --git a/src/libyang/patch/series b/src/libyang/patch/series
index 9796e28649c..07a11507ec8 100644
--- a/src/libyang/patch/series
+++ b/src/libyang/patch/series
@@ -3,3 +3,4 @@ libyang_mgmt_framework.patch
 swig.patch
 large_file_support_arm32.patch
 debian-packaging-files.patch
+libyang-leaf-must.patch
diff --git a/src/libyang1/Makefile b/src/libyang1/Makefile
index a87f03bf638..af7a731377d 100644
--- a/src/libyang1/Makefile
+++ b/src/libyang1/Makefile
@@ -2,7 +2,7 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -e
 
-LIBYANG_URL = https://sonicstorage.blob.core.windows.net/debian/pool/main/liby/libyang
+LIBYANG_URL = https://packages.trafficmanager.net/public/debian/pool/main/liby/libyang
 
 DSC_FILE = libyang_$(LIBYANG1_FULLVERSION).dsc
 ORIG_FILE = libyang_$(LIBYANG1_VERSION).orig.tar.gz
diff --git a/src/libyang2/Makefile b/src/libyang2/Makefile
index 16d80587573..a7a60b0accb 100644
--- a/src/libyang2/Makefile
+++ b/src/libyang2/Makefile
@@ -2,7 +2,7 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -e
 
-LIBYANG_URL = https://sonicstorage.blob.core.windows.net/debian/pool/main/liby/libyang
+LIBYANG_URL = https://packages.trafficmanager.net/public/debian/pool/main/liby/libyang
 
 DSC_FILE = libyang2_$(LIBYANG2_FULLVERSION).dsc
 ORIG_FILE = libyang2_$(LIBYANG2_VERSION).orig.tar.xz
diff --git a/src/linkmgrd b/src/linkmgrd
index 927ee8a2c05..afa62a634d5 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit 927ee8a2c05674c0aa3700059a2ac5526769ca37
+Subproject commit afa62a634d5a581e53fb2e2df757e91266f555da
diff --git a/src/lldpd/Makefile b/src/lldpd/Makefile
index 2b3087cc0ed..24c8e26bdfd 100644
--- a/src/lldpd/Makefile
+++ b/src/lldpd/Makefile
@@ -5,7 +5,7 @@ SHELL = /bin/bash
 MAIN_TARGET = $(LLDPD)
 DERIVED_TARGETS = $(LIBLLDPCTL) $(LLDPD_DBG)
 
-LLDP_URL = https://sonicstorage.blob.core.windows.net/debian/pool/main/l/lldpd
+LLDP_URL = https://packages.trafficmanager.net/public/debian/pool/main/l/lldpd
 
 DSC_FILE = lldpd_$(LLDPD_VERSION_FULL).dsc
 ORIG_FILE = lldpd_$(LLDPD_VERSION).orig.tar.gz
diff --git a/src/ntp/.gitignore b/src/ntp/.gitignore
deleted file mode 100644
index 1b46fe753f4..00000000000
--- a/src/ntp/.gitignore
+++ /dev/null
@@ -1,5 +0,0 @@
-*+dfsg
-*.buildinfo
-*.changes
-*.xz
-*.deb
diff --git a/src/ntp/Makefile b/src/ntp/Makefile
deleted file mode 100644
index f449d2125bc..00000000000
--- a/src/ntp/Makefile
+++ /dev/null
@@ -1,61 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-.SHELLFLAGS += -e
-
-MAIN_TARGET = $(NTP)
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# Remove any stale files
-	rm -rf ./ntp-$(NTP_VERSION) ./ntp_$(NTP_VERSION).orig.tar.xz ./ntp_$(NTP_VERSION)-4.debian.tar.xz
-
-	# Get ntp release, debian files
-	wget http://deb.debian.org/debian/pool/main/n/ntp/ntp_$(NTP_VERSION).orig.tar.xz
-	wget http://deb.debian.org/debian/pool/main/n/ntp/ntp_$(NTP_VERSION)-1.debian.tar.xz
-
-	# UnTar ntp release
-	xzcat ntp_$(NTP_VERSION).orig.tar.xz | tar -xvf -
-
-	pushd ./ntp-4.2.8p15
-
-	# UnTar debian files
-	xzcat ../ntp_$(NTP_VERSION)-1.debian.tar.xz | tar -xvf -
-
-	# Add the additional patch
-	cp ../patch/bug1970-UNLINK_EXPR_SLIST_empty_list.patch debian/patches/
-	cp ../patch/update_ENOBUFS_log_level.patch debian/patches/
-	cat ../patch/series  >> debian/patches/series
-
-	# Update the changelog
-	cat ../patch/changelog debian/changelog > debian/changelog.new
-	rm debian/changelog ;  mv debian/changelog.new debian/changelog
-
-	# The debian mirror build likely took place on a system without
-	# libevent installed, thus adding the below for SONiC
-	sed -i 's/--with-locfile=legacy/--with-locfile=legacy --enable-local-libevent/' debian/rules
-
-	# Fix the apparmor profile to avoid the following message
-	# "Failed name lookup - disconnected path"
-	# and go into learning mode.
-	sed -i 's/\/usr\/sbin\/ntpd {/\/usr\/sbin\/ntpd flags=(attach_disconnected complain) {/' debian/apparmor-profile
-
-ifeq ($(CROSS_BUILD_ENVIRON), y)
-	sed -i 's/dh_auto_configure \--/dh_auto_configure -- --with-yielding-select=yes /g' debian/rules
-	echo ". $(CONFIG_SITE)" > fix.ntp.cross-config.$(CONFIGURED_ARCH)
-	echo "unset with_openssl_libdir" >> fix.ntp.cross-config.$(CONFIGURED_ARCH)
-	echo "unset with_openssl_incdir" >> fix.ntp.cross-config.$(CONFIGURED_ARCH)
-	rm -f cross-config.cache
-	ln -s /etc/dpkg-cross/cross-config.cache cross-config.cache
-endif
-
-	# Build source and Debian packages with the symbols
-ifeq ($(CROSS_BUILD_ENVIRON), y)
-	CONFIG_SITE=`pwd`/fix.ntp.cross-config.$(CONFIGURED_ARCH) dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
-else
-	dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
-endif
-
-	popd
-
-	# Move the newly-built .deb packages to the destination directory
-	mv $* $(DEST)/
-
diff --git a/src/ntp/patch/bug1970-UNLINK_EXPR_SLIST_empty_list.patch b/src/ntp/patch/bug1970-UNLINK_EXPR_SLIST_empty_list.patch
deleted file mode 100644
index 701dc010394..00000000000
--- a/src/ntp/patch/bug1970-UNLINK_EXPR_SLIST_empty_list.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-Bug 1970 UNLINK_EXPR_SLIST() causes crash if list is empty
-
-From: Arun Barboza <arun.barboza@broadcom.com>
-
-
----
- include/ntp_lists.h |    6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/include/ntp_lists.h b/include/ntp_lists.h
-index d741974..f90bf23 100644
---- a/include/ntp_lists.h
-+++ b/include/ntp_lists.h
-@@ -184,7 +184,11 @@ do {								\
- do {								\
- 	entrytype **ppentry;					\
- 								\
--	ppentry = &(listhead);					\
-+	if (!listhead) {					\
-+		(punlinked) = NULL;				\
-+		break;						\
-+	}							\
-+	else ppentry = &(listhead);				\
- 								\
- 	while (!(expr))						\
- 		if (*ppentry != NULL &&				\
diff --git a/src/ntp/patch/changelog b/src/ntp/patch/changelog
deleted file mode 100644
index ce5fb609627..00000000000
--- a/src/ntp/patch/changelog
+++ /dev/null
@@ -1,12 +0,0 @@
-ntp (1:4.2.8p15+dfsg-1+deb10u2) bullseye; urgency=medium
-
-  * Adjust the ENOBUFS syslog level on the Netlink routing to LOG_WARNING.
-
- -- Arun Barboza <arun.barboza@broadcom.com>  Mon, 09 Sep 2019 10:15:35 -0700
-
-ntp (1:4.2.8p15+dfsg-1+deb10u1) bullseye; urgency=medium
-
-  * Apply Bug1970 fix for UNLINK_EXPR_SLIST_empty_list from dev branch.
-
- -- Arun Barboza <arun.barboza@broadcom.com>  Tue, 25 Jun 2019 14:35:24 -0700
-
diff --git a/src/ntp/patch/series b/src/ntp/patch/series
deleted file mode 100644
index 9ce40f13e21..00000000000
--- a/src/ntp/patch/series
+++ /dev/null
@@ -1,3 +0,0 @@
-# This series applies on GIT commit d09f041a49c61971f59fc29f505446c63aea51b1
-bug1970-UNLINK_EXPR_SLIST_empty_list.patch
-update_ENOBUFS_log_level.patch
diff --git a/src/ntp/patch/update_ENOBUFS_log_level.patch b/src/ntp/patch/update_ENOBUFS_log_level.patch
deleted file mode 100644
index 618fc323b10..00000000000
--- a/src/ntp/patch/update_ENOBUFS_log_level.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-Adjust the ENOBUFS syslog level on the Netlink routing to LOG_WARNING.
-
-From: Arun Barboza <arun.barboza@broadcom.com>
-
-
----
- ntpd/ntp_io.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-Index: b/ntpd/ntp_io.c
-===================================================================
---- a/ntpd/ntp_io.c
-+++ b/ntpd/ntp_io.c
-@@ -4709,7 +4709,7 @@ process_routing_msgs(struct asyncio_read
- 
- 	if (cnt < 0) {
- 		if (errno == ENOBUFS) {
--			msyslog(LOG_ERR,
-+			msyslog(LOG_WARNING,
- 				"routing socket reports: %m");
- 		} else {
- 			msyslog(LOG_ERR,
diff --git a/src/openssh/patch/0003-Export-remote-info-for-authorization.patch b/src/openssh/patch/0003-Export-remote-info-for-authorization.patch
index 661659ac66d..47cada94083 100755
--- a/src/openssh/patch/0003-Export-remote-info-for-authorization.patch
+++ b/src/openssh/patch/0003-Export-remote-info-for-authorization.patch
@@ -1,40 +1,42 @@
-From 51b3d58afef6796fe0568deb4c3765e24cc828c9 Mon Sep 17 00:00:00 2001
-From: liuh-80 <liuh@microsoft.com>
-Date: Fri, 30 Sep 2022 16:57:03 +0800
+From 191df972f207774f8703ebf7fffea1129c11ca68 Mon Sep 17 00:00:00 2001
+From: ab952469 <asha.behera@broadcom.com>
+Date: Thu, 13 Mar 2025 14:46:03 +0530
 Subject: [PATCH] Export remote info for authorization. authorization.
 
 ---
- auth.c    | 11 +++++++++++
+ auth.c    | 14 ++++++++++++++
  auth.h    |  3 +++
  session.c |  3 +++
  sshd.c    |  5 +++++
- 4 files changed, 22 insertions(+)
+ 4 files changed, 25 insertions(+)
 
 diff --git a/auth.c b/auth.c
-index c3693ba3f..96d551922 100644
+index 6653b9e..d9ceac4 100644
 --- a/auth.c
 +++ b/auth.c
-@@ -764,3 +764,14 @@ auth_authorise_keyopts(struct ssh *ssh, struct passwd *pw,
+@@ -764,3 +764,17 @@ auth_restrict_session(struct ssh *ssh)
  		fatal_f("failed to restrict session");
  	sshauthopt_free(restricted);
  }
 +
 +/* Export remote IP address and port for authorization. */
-+void
++	void
 +export_remote_info(struct ssh *ssh)
 +{
-+	const char *remote_ip = ssh_remote_ipaddr(ssh);
-+	const int remote_port = ssh_remote_port(ssh);
-+	const char remote_addr_port[32 + INET6_ADDRSTRLEN];
-+	snprintf(remote_addr_port, sizeof(remote_addr_port), "%s %d", remote_ip, remote_port);
-+	setenv("SSH_CLIENT_IPADDR_PORT", remote_addr_port, 1);
++	if (ssh != NULL)
++	{
++		const char *remote_ip = ssh_remote_ipaddr(ssh);
++		const int remote_port = ssh_remote_port(ssh);
++		const char remote_addr_port[32 + INET6_ADDRSTRLEN];
++		snprintf(remote_addr_port, sizeof(remote_addr_port), "%s %d", remote_ip, remote_port);
++		setenv("SSH_CLIENT_IPADDR_PORT", remote_addr_port, 1);
++	}
 +}
-\ No newline at end of file
 diff --git a/auth.h b/auth.h
-index 3cfce0eaf..3a34742b1 100644
+index d16dc66..8b87656 100644
 --- a/auth.h
 +++ b/auth.h
-@@ -229,6 +229,9 @@ struct passwd *fakepw(void);
+@@ -241,6 +241,9 @@ FILE	*auth_openprincipals(const char *, struct passwd *, int);
  
  int	 sys_auth_passwd(struct ssh *, const char *);
  
@@ -45,7 +47,7 @@ index 3cfce0eaf..3a34742b1 100644
  krb5_error_code ssh_krb5_cc_gen(krb5_context, krb5_ccache *);
  #endif
 diff --git a/session.c b/session.c
-index a638ceef1..c615cb3d0 100644
+index 768d3b3..40f3c41 100644
 --- a/session.c
 +++ b/session.c
 @@ -619,6 +619,9 @@ do_exec_pty(struct ssh *ssh, Session *s, const char *command)
@@ -59,10 +61,10 @@ index a638ceef1..c615cb3d0 100644
  #ifndef HAVE_OSF_SIA
  		do_login(ssh, s, command);
 diff --git a/sshd.c b/sshd.c
-index 3ef0c1452..2f67a0304 100644
+index dd8fd94..8f184a3 100644
 --- a/sshd.c
 +++ b/sshd.c
-@@ -1737,6 +1737,8 @@ main(int ac, char **av)
+@@ -1735,6 +1735,8 @@ main(int ac, char **av)
  			test_flag = 2;
  			break;
  		case 'C':
@@ -71,7 +73,7 @@ index 3ef0c1452..2f67a0304 100644
  			connection_info = get_connection_info(ssh, 0, 0);
  			if (parse_server_match_testspec(connection_info,
  			    optarg) == -1)
-@@ -2252,6 +2254,9 @@ main(int ac, char **av)
+@@ -2263,6 +2265,9 @@ main(int ac, char **av)
  	 */
  	remote_ip = ssh_remote_ipaddr(ssh);
  
@@ -82,5 +84,5 @@ index 3ef0c1452..2f67a0304 100644
  	audit_connection_from(remote_ip, remote_port);
  #endif
 -- 
-2.35.1.windows.2
+2.7.4
 
diff --git a/src/ptf-py3.patch/0005-Fix-a-multithreading-issue-in-writing-pcap-files-204.patch b/src/ptf-py3.patch/0005-Fix-a-multithreading-issue-in-writing-pcap-files-204.patch
new file mode 100644
index 00000000000..743d01d000f
--- /dev/null
+++ b/src/ptf-py3.patch/0005-Fix-a-multithreading-issue-in-writing-pcap-files-204.patch
@@ -0,0 +1,50 @@
+From e8b545f3f281fc509c7bdd6c8a4f55bc829149e7 Mon Sep 17 00:00:00 2001
+From: Saikrishna Arcot <saiarcot895@gmail.com>
+Date: Wed, 24 Jan 2024 08:24:17 -0800
+Subject: [PATCH] Fix a multithreading issue in writing pcap files (#204)
+
+When there are separate threads that are sending and receiving packets,
+both threads may try to write the packet data to the pcap file. This
+causes the packet to get interleaved, thus basically making it corrupted
+and unable to be read by tcpdump, wireshark, etc.
+
+This is happening due to a missing lock on `self.cvar`. Fix it by
+wrapping the write call in the `send` method and the initial assignment
+in `start_pcap` method with a lock on `self.cvar`.
+
+Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
+---
+ src/ptf/dataplane.py | 10 ++++++----
+ 1 file changed, 6 insertions(+), 4 deletions(-)
+
+diff --git a/src/ptf/dataplane.py b/src/ptf/dataplane.py
+index fd250fe..cbdaaa5 100644
+--- a/src/ptf/dataplane.py
++++ b/src/ptf/dataplane.py
+@@ -727,8 +727,9 @@ class DataPlane(Thread):
+             self.logger.warn(
+                 "The %s kernel may not send packets smaller than 15 bytes", sys.platform
+             )
+-        if self.pcap_writer:
+-            self.pcap_writer.write(packet, time.time(), device_number, port_number)
++        with self.cvar:
++            if self.pcap_writer:
++                self.pcap_writer.write(packet, time.time(), device_number, port_number)
+         bytes = self.ports[(device_number, port_number)].send(packet)
+         self.tx_counters[(device_number, port_number)] += 1
+         if bytes != len(packet):
+@@ -1020,8 +1021,9 @@ class DataPlane(Thread):
+             self.packet_queues[port_id] = []
+ 
+     def start_pcap(self, filename):
+-        assert self.pcap_writer == None
+-        self.pcap_writer = PcapWriter(filename)
++        with self.cvar:
++            assert self.pcap_writer == None
++            self.pcap_writer = PcapWriter(filename)
+ 
+     def stop_pcap(self):
+         if self.pcap_writer:
+-- 
+2.43.0
+
diff --git a/src/ptf-py3.patch/series b/src/ptf-py3.patch/series
index 21924596f8d..20aadfff995 100644
--- a/src/ptf-py3.patch/series
+++ b/src/ptf-py3.patch/series
@@ -2,3 +2,4 @@
 0002-Fill-byte-formatted-client-mac-address-in-DHCP-Disco.patch
 0003-Avoid-local-version-scheme-by-setuptools-scm.patch
 0004-Consider-only-expected-packets-for-timeout.patch
+0005-Fix-a-multithreading-issue-in-writing-pcap-files-204.patch
diff --git a/src/radius/nss/Makefile b/src/radius/nss/Makefile
index 96389ed3cc2..8eb584a9781 100644
--- a/src/radius/nss/Makefile
+++ b/src/radius/nss/Makefile
@@ -3,6 +3,7 @@ SHELL = /bin/bash
 .SHELLFLAGS += -e
 
 MAIN_TARGET = libnss-radius_$(NSS_RADIUS_VERSION)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = libnss-radius-dbgsym_$(NSS_RADIUS_VERSION)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	pushd ./libnss-radius
diff --git a/src/radius/pam/Makefile b/src/radius/pam/Makefile
index 685516b5f82..b289c9f4ea8 100644
--- a/src/radius/pam/Makefile
+++ b/src/radius/pam/Makefile
@@ -3,6 +3,7 @@ SHELL = /bin/bash
 .SHELLFLAGS += -e
 
 MAIN_TARGET = libpam-radius-auth_$(PAM_RADIUS_VERSION)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = libpam-radius-auth-dbgsym_$(PAM_RADIUS_VERSION)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	# Build freeradius-server v1.1.x
diff --git a/src/radius/pam/debian/patches/0004-fix-blastradius.patch b/src/radius/pam/debian/patches/0004-fix-blastradius.patch
new file mode 100644
index 00000000000..98404c2bde2
--- /dev/null
+++ b/src/radius/pam/debian/patches/0004-fix-blastradius.patch
@@ -0,0 +1,389 @@
+diff --git a/USAGE b/USAGE
+index e769dbf..82d0d08 100644
+--- a/USAGE
++++ b/USAGE
+@@ -105,5 +105,8 @@ prompt_attribute - Enable honoring of Prompt attribute sent from server for
+                    input. Without this option all user input during 
+                    challenge-response will be echoed. See RFC2869 Section 5.10
+ 
++require_message_authenticator - Discard Access-Accept, Access-Challenge, and
++		Access-Reject packets which do not contain Message-Authenticator.
++
+ ---------------------------------------------------------------------------
+ 
+diff --git a/src/md5.c b/src/md5.c
+index bb4546e..30cad65 100644
+--- a/src/md5.c
++++ b/src/md5.c
+@@ -173,6 +173,79 @@ void MD5Final(unsigned char digest[16], struct MD5Context *ctx)
+ 	memset(ctx, 0, sizeof(*ctx));	/* In case it's sensitive */
+ }
+ 
++/** Calculate HMAC using internal MD5 implementation
++ *
++ * @param digest Caller digest to be filled in.
++ * @param text Pointer to data stream.
++ * @param text_len length of data stream.
++ * @param key Pointer to authentication key.
++ * @param key_len Length of authentication key.
++ *
++ */
++void hmac_md5(uint8_t digest[16], uint8_t const *text, size_t text_len,
++		 uint8_t const *key, size_t key_len)
++{
++	MD5_CTX context;
++	uint8_t k_ipad[65];    /* inner padding - key XORd with ipad */
++	uint8_t k_opad[65];    /* outer padding - key XORd with opad */
++	uint8_t tk[16];
++	int i;
++
++	/* if key is longer than 64 bytes reset it to key=MD5(key) */
++	if (key_len > 64) {
++		MD5_CTX tctx;
++
++		MD5Init(&tctx);
++		MD5Update(&tctx, key, key_len);
++		MD5Final(tk, &tctx);
++
++		key = tk;
++		key_len = 16;
++	}
++
++	/*
++	 * the HMAC_MD5 transform looks like:
++	 *
++	 * MD5(K XOR opad, MD5(K XOR ipad, text))
++	 *
++	 * where K is an n byte key
++	 * ipad is the byte 0x36 repeated 64 times
++
++	 * opad is the byte 0x5c repeated 64 times
++	 * and text is the data being protected
++	 */
++
++	/* start out by storing key in pads */
++	memset( k_ipad, 0, sizeof(k_ipad));
++	memset( k_opad, 0, sizeof(k_opad));
++	memcpy( k_ipad, key, key_len);
++	memcpy( k_opad, key, key_len);
++
++	/* XOR key with ipad and opad values */
++	for (i = 0; i < 64; i++) {
++		k_ipad[i] ^= 0x36;
++		k_opad[i] ^= 0x5c;
++	}
++	/*
++	 * perform inner MD5
++	 */
++	MD5Init(&context);		   /* init context for 1st
++					      * pass */
++	MD5Update(&context, k_ipad, 64);      /* start with inner pad */
++	MD5Update(&context, text, text_len); /* then text of datagram */
++	MD5Final(digest, &context);	  /* finish up 1st pass */
++	/*
++	 * perform outer MD5
++	 */
++	MD5Init(&context);		   /* init context for 2nd
++					      * pass */
++	MD5Update(&context, k_opad, 64);     /* start with outer pad */
++	MD5Update(&context, digest, 16);     /* then results of 1st
++					      * hash */
++	MD5Final(digest, &context);	  /* finish up 2nd pass */
++}
++
++
+ #ifndef ASM_MD5
+ 
+ /* The four core functions - F1 is optimized somewhat */
+diff --git a/src/md5.h b/src/md5.h
+index ce0e350..39bbb9b 100644
+--- a/src/md5.h
++++ b/src/md5.h
+@@ -39,6 +39,7 @@
+ #define MD5Transform  pra_MD5Transform
+ 
+ #include <inttypes.h>
++#include <stdint.h>
+ 
+ struct MD5Context {
+ 	uint32_t buf[4];
+@@ -51,6 +52,9 @@ void MD5Update(struct MD5Context *, unsigned const char *, unsigned);
+ void MD5Final(unsigned char digest[16], struct MD5Context *);
+ void MD5Transform(uint32_t buf[4], uint32_t const in[16]);
+ 
++void hmac_md5(uint8_t digest[16], uint8_t const *text, size_t text_len,
++	      uint8_t const *key, size_t key_len);
++
+ /*
+  * This is needed to make RSAREF happy on some MS-DOS compilers.
+  */
+diff --git a/src/pam_radius_auth.c b/src/pam_radius_auth.c
+index ae375f6..117ebdc 100644
+--- a/src/pam_radius_auth.c
++++ b/src/pam_radius_auth.c
+@@ -185,8 +185,8 @@ static int _pam_parse(int argc, CONST char **argv, radius_conf_t *conf)
+ 				if (!(conf->client_ip))
+ 					_pam_log(LOG_WARNING, "Invalid address. ignoring '%s'", *argv);
+ 			}
+-
+-
++		} else if (!strcmp(*argv, "require_message_authenticator")) {
++			conf->require_message_authenticator = TRUE;
+ 		} else if (!strncmp(*argv, "statistics=", 11)) {
+ 			/* Verify filename doesn't contain '/'.
+ 			 */
+@@ -366,11 +366,8 @@ static void get_random_vector(unsigned char *vector)
+ 	}
+ }
+ 
+-/*
+- * RFC 2139 says to do generate the accounting request vector this way.
+- * However, the Livingston 1.16 server doesn't check it.	The Cistron
+- * server (http://home.cistron.nl/~miquels/radius/) does, and this code
+- * seems to work with it.	It also works with Funk's Steel-Belted RADIUS.
++/**
++ *	Follow RFC 2866 for Accounting-Request vector.
+  */
+ static void get_accounting_vector(AUTH_HDR *request, radius_server_t *server)
+ {
+@@ -389,11 +386,44 @@ static void get_accounting_vector(AUTH_HDR *request, radius_server_t *server)
+ /*
+  * Verify the response from the server
+  */
+-static int verify_packet(char *secret, AUTH_HDR *response, AUTH_HDR *request)
++static int verify_packet(radius_server_t *server, AUTH_HDR *response, AUTH_HDR *request, radius_conf_t *conf)
+ {
+ 	MD5_CTX my_md5;
+-	unsigned char	calculated[AUTH_VECTOR_LEN];
+-	unsigned char	reply[AUTH_VECTOR_LEN];
++	uint8_t calculated[AUTH_VECTOR_LEN];
++	uint8_t reply[AUTH_VECTOR_LEN];
++	uint8_t *message_authenticator = NULL;
++	CONST uint8_t *attr, *end;
++	size_t secret_len = strlen(server->secret);
++
++	attr = response->data;
++	end = (uint8_t *) response + ntohs(response->length);
++
++	/*
++	 *	Check that the packet is well-formed, and find the Message-Authenticator.
++	 */
++	while (attr < end) {
++		size_t remaining = end - attr;
++
++		if (remaining < 2) return FALSE;
++
++		if (attr[1] < 2) return FALSE;
++
++		if (attr[1] > remaining) return FALSE;
++
++		if (attr[0] == PW_MESSAGE_AUTHENTICATOR) {
++			if (attr[1] != 18) return FALSE;
++
++			if (message_authenticator) return FALSE;
++
++			message_authenticator = (uint8_t *) response + (attr - (uint8_t *) response) + 2;
++		}
++
++		attr += attr[1];
++	}
++
++	if ((request->code == PW_AUTHENTICATION_REQUEST) && conf->require_message_authenticator && !message_authenticator) {
++		return FALSE;
++	}
+ 
+ 	/*
+ 	 * We could dispense with the memcpy, and do MD5's of the packet
+@@ -404,27 +434,30 @@ static int verify_packet(char *secret, AUTH_HDR *response, AUTH_HDR *request)
+ 
+ 	/* MD5(response packet header + vector + response packet data + secret) */
+ 	MD5Init(&my_md5);
+-	MD5Update(&my_md5, (unsigned char *) response, ntohs(response->length));
++	MD5Update(&my_md5, (uint8_t *) response, ntohs(response->length));
++	MD5Update(&my_md5, (CONST uint8_t *) server->secret, secret_len);
++	MD5Final(calculated, &my_md5);			/* set the final vector */
++
++	/* Did he use the same random vector + shared secret? */
++	if (memcmp(calculated, reply, AUTH_VECTOR_LEN) != 0) return FALSE;
++
++	if (!message_authenticator) return TRUE;
+ 
+ 	/*
+-	 * This next bit is necessary because of a bug in the original Livingston
+-	 * RADIUS server.	The authentication vector is *supposed* to be MD5'd
+-	 * with the old password (as the secret) for password changes.
+-	 * However, the old password isn't used.	The "authentication" vector
+-	 * for the server reply packet is simply the MD5 of the reply packet.
+-	 * Odd, the code is 99% there, but the old password is never copied
+-	 * to the secret!
++	 *	RFC2869 Section 5.14.
++	 *
++	 *	Message-Authenticator is calculated with the Request
++	 *	Authenticator (copied into the packet above), and with
++	 *	the Message-Authenticator attribute contents set to
++	 *	zero.
+ 	 */
+-	if (*secret) {
+-		MD5Update(&my_md5, (unsigned char *) secret, strlen(secret));
+-	}
++	memcpy(reply, message_authenticator, AUTH_VECTOR_LEN);
++	memset(message_authenticator, 0, AUTH_VECTOR_LEN);
+ 
+-	MD5Final(calculated, &my_md5);			/* set the final vector */
++	hmac_md5(calculated, (uint8_t *) response, ntohs(response->length), (const uint8_t *) server->secret, secret_len);
++
++	if (memcmp(calculated, reply, AUTH_VECTOR_LEN) != 0) return FALSE;
+ 
+-	/* Did he use the same random vector + shared secret? */
+-	if (memcmp(calculated, reply, AUTH_VECTOR_LEN) != 0) {
+-		return FALSE;
+-	}
+ 	return TRUE;
+ }
+ 
+@@ -940,10 +973,25 @@ static void build_radius_packet(AUTH_HDR *request, CONST char *user, CONST char
+ 	hostname[0] = '\0';
+ 	gethostname(hostname, sizeof(hostname) - 1);
+ 
+-	request->length = htons(AUTH_HDR_LEN);
++	/*
++	 *	For Access-Request, create a random authentication
++	 *	vector, and always add a Message-Authenticator
++	 *	attribute.
++	 */
++	if (request->code == PW_AUTHENTICATION_REQUEST) {
++              uint8_t *attr = (uint8_t *) request + AUTH_HDR_LEN;
+ 
+-	if (password) {		/* make a random authentication req vector */
+-		get_random_vector(request->vector);
++	      get_random_vector(request->vector);
++
++              attr[0] = PW_MESSAGE_AUTHENTICATOR;
++              attr[1] = 18;
++              memset(attr + 2, 0, AUTH_VECTOR_LEN);
++	      conf->message_authenticator = attr + 2;
++
++              request->length = htons(AUTH_HDR_LEN + 18);
++	} else {
++		request->length = htons(AUTH_HDR_LEN);
++		conf->message_authenticator = NULL;
+ 	}
+ 
+ 	add_attribute(request, PW_USER_NAME, (unsigned char *) user, strlen(user));
+@@ -1089,7 +1137,12 @@ static int talk_radius(radius_conf_t *conf, AUTH_HDR *request, AUTH_HDR *respons
+ 		}
+ 
+ 
+-		if (!password) { 		/* make an RFC 2139 p6 request authenticator */
++		if (request->code == PW_AUTHENTICATION_REQUEST) {
++			hmac_md5(conf->message_authenticator, (uint8_t *) request, ntohs(request->length),
++				 (const uint8_t *) server->secret, strlen(server->secret));
++
++		} else {
++			/* make an RFC 2139 p6 request authenticator */
+ 			get_accounting_vector(request, server);
+ 		}
+ 
+@@ -1240,7 +1293,7 @@ static int talk_radius(radius_conf_t *conf, AUTH_HDR *request, AUTH_HDR *respons
+ 						}
+ 					}
+ 
+-					if (!verify_packet(p, response, request)) {
++					if (!verify_packet(server, response, request, conf)) {
+ 						_pam_log(LOG_ERR, "packet from RADIUS server %s failed verification: "
+ 							 "The shared secret is probably incorrect.", server->hostname);
+ 						ok = FALSE;
+diff --git a/src/pam_radius_auth.h b/src/pam_radius_auth.h
+index 42d48da..46a1bf5 100644
+--- a/src/pam_radius_auth.h
++++ b/src/pam_radius_auth.h
+@@ -7,6 +7,7 @@
+ #include <errno.h>
+ #include <sys/time.h>
+ #include <sys/types.h>
++#include <stdint.h>
+ #include <sys/stat.h>
+ #include <sys/resource.h>
+ #include <sys/param.h>
+@@ -176,6 +177,8 @@ typedef struct radius_conf_t {
+ #define MAXFILENAME 128
+ 	CONST char *trace;        /* Packet Trace File */
+ 	CONST char *statistics;   /* Statistics File   */
++	int require_message_authenticator;
++	uint8_t *message_authenticator;
+ } radius_conf_t;
+ 
+ #endif /* PAM_RADIUS_H */
+diff --git a/src/radius.h b/src/radius.h
+index 287d4d8..0fd2731 100644
+--- a/src/radius.h
++++ b/src/radius.h
+@@ -120,6 +120,9 @@ typedef struct pw_auth_hdr {
+ #define PW_PORT_LIMIT                   62      /* integer */
+ #define PW_LOGIN_LAT_PORT               63      /* string */
+ #define PW_PROMPT                       76      /* integer */
++
++#define PW_MESSAGE_AUTHENTICATOR	80	/* octets */
++
+ #define PW_MANAGEMENT_PRIVILEGE_LEVEL   136     /* integer */
+ 
+ #define	PW_NAS_IPV6_ADDRESS	       	95	/* octets */
+@@ -176,58 +179,4 @@ typedef struct pw_auth_hdr {
+ #define PW_STATUS_STOP			2
+ #define PW_STATUS_ALIVE			3
+ 
+-/* Default Database File Names */
+-
+-#define RADIUS_DIR		"/etc/raddb"
+-#define RADACCT_DIR		"/usr/adm/radacct"
+-
+-#define RADIUS_DICTIONARY	"dictionary"
+-#define RADIUS_CLIENTS		"clients"
+-#define RADIUS_USERS		"users"
+-#define RADIUS_HOLD		"holdusers"
+-#define RADIUS_LOG		"logfile"
+-
+-/* Server data structures */
+-
+-typedef struct dict_attr {
+-	char			name[32];
+-	int			value;
+-	int			type;
+-	struct dict_attr	*next;
+-} DICT_ATTR;
+-
+-typedef struct dict_value {
+-	char			attrname[32];
+-	char			name[32];
+-	int			value;
+-	struct dict_value	*next;
+-} DICT_VALUE;
+-
+-typedef struct value_pair {
+-	char			name[32];
+-	int			attribute;
+-	int			type;
+-	uint32_t		lvalue;
+-	char			strvalue[AUTH_STRING_LEN];
+-	struct value_pair	*next;
+-} VALUE_PAIR;
+-
+-typedef struct auth_req {
+-	uint32_t		ipaddr;
+-	uint16_t		udp_port;
+-	uint8_t			id;
+-	uint8_t			code;
+-	uint8_t			vector[16];
+-	uint8_t			secret[16];
+-	VALUE_PAIR		*request;
+-	int			child_pid;	/* Process ID of child */
+-	uint32_t		timestamp;
+-	struct auth_req		*next;		/* Next active request */
+-} AUTH_REQ;
+-
+-#define SECONDS_PER_DAY		86400
+-#define MAX_REQUEST_TIME	30
+-#define CLEANUP_DELAY		5
+-#define MAX_REQUESTS		100
+-
+ #endif /* RADIUS_H */
diff --git a/src/radius/pam/debian/patches/series b/src/radius/pam/debian/patches/series
index 4de1e7c8f2f..51ae7f0c50c 100644
--- a/src/radius/pam/debian/patches/series
+++ b/src/radius/pam/debian/patches/series
@@ -1,3 +1,4 @@
 0001-chap-support.patch
 0002-peap-mschapv2-support.patch
 0003-nas-ip-address-config.patch
+0004-fix-blastradius.patch 
diff --git a/src/rasdaemon/Makefile b/src/rasdaemon/Makefile
index 15e6bbebe80..c7ba4e0987a 100644
--- a/src/rasdaemon/Makefile
+++ b/src/rasdaemon/Makefile
@@ -3,6 +3,7 @@ SHELL = /bin/bash
 .SHELLFLAGS += -e
 
 MAIN_TARGET = rasdaemon_$(RASDAEMON_VERSION)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = rasdaemon-dbgsym_$(RASDAEMON_VERSION)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	rm -rf rasdaemon/
@@ -20,4 +21,6 @@ else
 endif
 	popd
 
-	mv $* $(DEST)/
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/src/sflow/psample/Makefile b/src/sflow/psample/Makefile
index 12981d8ebff..6d372ea01ad 100644
--- a/src/sflow/psample/Makefile
+++ b/src/sflow/psample/Makefile
@@ -3,6 +3,7 @@ SHELL = /bin/bash
 .SHELLFLAGS += -e
 
 MAIN_TARGET = $(PSAMPLE)
+DERIVED_TARGETS = $(PSAMPLE_DBG)
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 
@@ -20,5 +21,6 @@ else
 endif
 	popd
 
-	mv $* $(DEST)/
+	mv $(DERIVED_TARGETS) $* $(DEST)/
 
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/src/snmpd/Makefile b/src/snmpd/Makefile
index 7b290bac868..4945e654599 100644
--- a/src/snmpd/Makefile
+++ b/src/snmpd/Makefile
@@ -5,6 +5,7 @@ SHELL = /bin/bash
 MAIN_TARGET = libsnmp-base_$(SNMPD_VERSION_FULL)_all.deb
 ifneq (,$(findstring 5.9,$(SNMPD_VERSION)))
 DERIVED_TARGETS = snmptrapd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  snmptrapd-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  snmp_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  snmpd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  snmp-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
@@ -13,11 +14,13 @@ DERIVED_TARGETS = snmptrapd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  libsnmp40-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  libsnmp-dev_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  libsnmp-perl_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  libsnmp-perl-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  tkmib_$(SNMPD_VERSION_FULL)_all.deb
 
 SNMPD_MAKE_JOBS_NUM = $(SONIC_CONFIG_MAKE_JOBS)
 else
 DERIVED_TARGETS = snmptrapd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  snmptrapd-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  snmp_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  snmpd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  snmp-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
@@ -26,8 +29,8 @@ DERIVED_TARGETS = snmptrapd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  libsnmp30-dbg_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  libsnmp-dev_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  libsnmp-perl_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  libsnmp-perl-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  tkmib_$(SNMPD_VERSION_FULL)_all.deb
-
 SNMPD_MAKE_JOBS_NUM = 1
 endif
 
@@ -35,7 +38,7 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	rm -rf net-snmp-$(SNMPD_VERSION)
 
 	# download debian net-snmp
-	dget -u https://sonicstorage.blob.core.windows.net/debian/pool/main/n/net-snmp/net-snmp_$(SNMPD_VERSION_FULL).dsc
+	dget -u https://packages.trafficmanager.net/public/debian/pool/main/n/net-snmp/net-snmp_$(SNMPD_VERSION_FULL).dsc
 
 	pushd net-snmp-$(SNMPD_VERSION)
 	git init
diff --git a/src/socat/Makefile b/src/socat/Makefile
index db1fd3d0259..2dabc8993e5 100644
--- a/src/socat/Makefile
+++ b/src/socat/Makefile
@@ -3,15 +3,16 @@ SHELL = /bin/bash
 .SHELLFLAGS += -e
 
 MAIN_TARGET = socat_$(SOCAT_VERSION)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = socat-dbgsym_$(SOCAT_VERSION)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	# Remove any stale files
 	rm -rf ./socat-1.7.4.1
 
 	# Get source package
-	wget -NO socat_$(SOCAT_VERSION).dsc "https://sonicstorage.blob.core.windows.net/public/debian/socat_1.7.4.1-3.dsc"
-	wget -NO socat_$(SOCAT_VERSION).debian.tar.xz "https://sonicstorage.blob.core.windows.net/public/debian/socat_1.7.4.1-3.debian.tar.xz"
-	wget -NO socat_1.7.4.1.orig.tar.gz "https://sonicstorage.blob.core.windows.net/public/debian/socat_1.7.4.1.orig.tar.gz"
+	wget -NO socat_$(SOCAT_VERSION).dsc "https://packages.trafficmanager.net/public/debian/socat_1.7.4.1-3.dsc"
+	wget -NO socat_$(SOCAT_VERSION).debian.tar.xz "https://packages.trafficmanager.net/public/debian/socat_1.7.4.1-3.debian.tar.xz"
+	wget -NO socat_1.7.4.1.orig.tar.gz "https://packages.trafficmanager.net/public/debian/socat_1.7.4.1.orig.tar.gz"
 
 	dpkg-source -x socat_$(SOCAT_VERSION).dsc
 
diff --git a/src/sonic-bgpcfgd/bgpcfgd/directory.py b/src/sonic-bgpcfgd/bgpcfgd/directory.py
index 82875996f3a..f12ccbd79f0 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/directory.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/directory.py
@@ -72,10 +72,14 @@ def put(self, db, table, key, value):
         slot = self.get_slot_name(db, table)
         self.data[slot][key] = value
         if slot in self.notify:
+            handlers_to_run = []
+
             for path in self.notify[slot].keys():
                 if self.path_exist(db, table, path):
-                    for handler in self.notify[slot][path]:
-                        handler()
+                    handlers_to_run += self.notify[slot][path]
+
+            for handler in handlers_to_run:
+                handler()
 
     def get(self, db, table, key):
         """
diff --git a/src/sonic-bgpcfgd/bgpcfgd/main.py b/src/sonic-bgpcfgd/bgpcfgd/main.py
index a39080bcfdc..44219d1f4d7 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/main.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/main.py
@@ -5,6 +5,7 @@
 import threading
 import traceback
 
+from swsscommon.swsscommon import ConfigDBConnector
 from swsscommon import swsscommon
 from sonic_py_common import device_info
 
@@ -25,6 +26,7 @@
 from .managers_bfd import BfdMgr
 from .managers_srv6 import SRv6Mgr
 from .managers_prefix_list import PrefixListMgr
+from .managers_as_path import AsPathMgr
 from .static_rt_timer import StaticRouteTimer
 from .runner import Runner, signal_handler
 from .template import TemplateFabric
@@ -81,23 +83,34 @@ def do_work():
         # SRv6 Manager
         SRv6Mgr(common_objs, "CONFIG_DB", "SRV6_MY_SIDS"),
         SRv6Mgr(common_objs, "CONFIG_DB", "SRV6_MY_LOCATORS"),
-        # Prefix List Manager
-        PrefixListMgr(common_objs, "CONFIG_DB", "PREFIX_LIST")
     ]
 
     if device_info.is_chassis():
         managers.append(ChassisAppDbMgr(common_objs, "CHASSIS_APP_DB", "BGP_DEVICE_GLOBAL"))
 
-    switch_type = device_info.get_localhost_info("switch_type")
-    if switch_type and switch_type == "dpu":
-        log_notice("switch type is dpu, starting bfd manager")
+    config_db = ConfigDBConnector()
+    config_db.connect()
+    sys_defaults = config_db.get_table('SYSTEM_DEFAULTS')
+    if 'software_bfd' in sys_defaults and 'status' in sys_defaults['software_bfd'] and sys_defaults['software_bfd']['status'] == 'enabled':
+        log_notice("software_bfd feature is enabled, starting bfd manager")
         managers.append(BfdMgr(common_objs, "STATE_DB", swsscommon.STATE_BFD_SOFTWARE_SESSION_TABLE_NAME))
 
+    device_metadata = config_db.get_table("DEVICE_METADATA")
+    # Enable Prefix List Manager and AsPath Manager for UpperSpineRouter/UpstreamLC
+    is_upstream_lc = ("localhost" in device_metadata and "type" in device_metadata["localhost"] and "subtype" in device_metadata["localhost"] and
+                      device_metadata["localhost"]["type"] == "SpineRouter" and device_metadata["localhost"]["subtype"] == "UpstreamLC")
+    is_upper_spine_router = ("localhost" in device_metadata and "type" in device_metadata["localhost"] and
+                             device_metadata["localhost"]["type"] == "UpperSpineRouter")
+    if is_upstream_lc or is_upper_spine_router:
+        # Prefix List Manager
+        managers.append(PrefixListMgr(common_objs, "CONFIG_DB", "PREFIX_LIST"))
+        managers.append(AsPathMgr(common_objs, "CONFIG_DB", "DEVICE_METADATA"))
+        log_notice("Prefix List Manager and AsPath Manager are enabled for UpperSpineRouter/UpstreamLC")
+
     runner = Runner(common_objs['cfg_mgr'])
     for mgr in managers:
         runner.add_manager(mgr)
     runner.run()
-    thr.join()
 
 
 def main():
diff --git a/src/sonic-bgpcfgd/bgpcfgd/manager.py b/src/sonic-bgpcfgd/bgpcfgd/manager.py
index 6966a20f4b3..c1c7a3a1310 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/manager.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/manager.py
@@ -5,7 +5,7 @@
 
 class Manager(object):
     """ This class represents a SONiC DB table """
-    def __init__(self, common_objs, deps, database, table_name):
+    def __init__(self, common_objs, deps, database, table_name, wait_for_all_deps=True):
         """
         Initialize class
         :param common_objs: common object dictionary
@@ -19,6 +19,7 @@ def __init__(self, common_objs, deps, database, table_name):
         self.deps = deps
         self.db_name = database
         self.table_name = table_name
+        self.wait_for_all_deps = wait_for_all_deps  # control whether the manager should wait for all dependencies to be set before processing any 'SET' command
         self.set_queue = []
         self.directory.subscribe(deps, self.on_deps_change)  # subscribe this class method on directory changes
 
@@ -38,7 +39,7 @@ def handler(self, key, op, data):
         :param data: associated data of the event. Empty for 'DEL' operation.
         """
         if op == swsscommon.SET_COMMAND:
-            if self.directory.available_deps(self.deps):  # all required dependencies are set in the Directory?
+            if (not self.wait_for_all_deps) or self.directory.available_deps(self.deps):  # all required dependencies are set in the Directory?
                 res = self.set_handler(key, data)
                 if not res:  # set handler returned False, which means it is not ready to process is. Save it for later.
                     log_debug("'SET' handler returned NOT_READY for the Manager: %s" % self.__class__)
@@ -53,7 +54,7 @@ def handler(self, key, op, data):
 
     def on_deps_change(self):
         """ This method is being executed on every dependency change """
-        if not self.directory.available_deps(self.deps):
+        if self.wait_for_all_deps and not self.directory.available_deps(self.deps):
             return
         new_queue = []
         for key, data in self.set_queue:
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_as_path.py b/src/sonic-bgpcfgd/bgpcfgd/managers_as_path.py
new file mode 100644
index 00000000000..4d7dcb91f60
--- /dev/null
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_as_path.py
@@ -0,0 +1,66 @@
+import re
+
+from .manager import Manager
+from .log import log_debug, log_warn, log_info
+from swsscommon import swsscommon
+
+T2_GROUP_ASNS = "T2_GROUP_ASNS"
+
+
+class AsPathMgr(Manager):
+    """This class responds to initialize as-path"""
+
+    def __init__(self, common_objs, db, table):
+        """
+        Initialize the object
+        :param common_objs: common object dictionary
+        :param db: name of the db
+        :param table: name of the table in the db
+        """
+        self.directory = common_objs['directory']
+        self.cfg_mgr = common_objs['cfg_mgr']
+        self.constants = common_objs['constants']
+        super(AsPathMgr, self).__init__(
+            common_objs,
+            [],
+            db,
+            table,
+        )
+
+    def set_handler(self, key, data):
+        if key != "localhost":
+            return True
+        asns = None
+        for key_inside, value in data.items():
+            if key_inside == "t2_group_asns":
+                asns = value
+                break
+        new_asns = set()
+        if asns is not None:
+            for asn in asns.split(","):
+                new_asns.add(asn)
+        old_asns = {}
+        regex = re.compile(r"bgp as-path access-list T2_GROUP_ASNS seq \d+ permit _(\d+)_")
+        # Read current FRR configuration and get as-path already configured
+        self.cfg_mgr.update()
+        for line in self.cfg_mgr.get_text():
+            match = regex.match(line)
+            if match:
+                old_asns[match.group(1)] = line
+        # Delete as-path no longer needed
+        for deleted_asn in (set(old_asns.keys()) - new_asns):
+            self.cfg_mgr.push("no {}".format(old_asns[deleted_asn]))
+            log_info("AsPathMgr: Deleted as-path: {}".format(deleted_asn))
+        # Add new as-path
+        for added_asn in (new_asns - set(old_asns.keys())):
+            self.cfg_mgr.push("bgp as-path access-list {} permit _{}_".format(T2_GROUP_ASNS, added_asn))
+            log_info("AsPathMgr: Added as-path: {}".format(added_asn))
+        return True
+
+    def del_handler(self, key):
+        if key != "localhost":
+            return True
+        # It would be trigger when we delete all `localhost` entry in DEVICE_METADATA, then clear t2 group asns
+        log_info("AsPathMgr: Clear asns group {}".format(T2_GROUP_ASNS))
+        self.cfg_mgr.push("no bgp as-path access-list {}".format(T2_GROUP_ASNS))
+        return True
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
index 38f7420ddf2..b9d3f514a85 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
@@ -3,6 +3,7 @@
 
 import jinja2
 import netaddr
+import os
 
 from .log import log_warn, log_err, log_info, log_debug, log_crit
 from .manager import Manager
@@ -103,8 +104,15 @@ def __init__(self, common_objs, db_name, table_name, peer_type, check_neig_meta)
             "delete":      self.fabric.from_string('no neighbor {{ neighbor_addr }}'),
             "shutdown":    self.fabric.from_string('neighbor {{ neighbor_addr }} shutdown'),
             "no shutdown": self.fabric.from_string('no neighbor {{ neighbor_addr }} shutdown'),
+            "no listen range": self.fabric.from_string('no bgp listen range {{ ip_range }} peer-group {{peer_group}}'),
         }
 
+        if (os.path.exists(self.fabric.env.loader.searchpath[0] + "/" + base_template + "update.conf.j2")):
+            self.templates["update"] = self.fabric.from_file(base_template + "update.conf.j2")
+        if os.path.exists(self.fabric.env.loader.searchpath[0] + "/" + base_template + "delete.conf.j2"):
+            self.templates["delete"] = self.fabric.from_file(base_template + "delete.conf.j2")
+            log_info("Using delete template found at %s" % (base_template + "delete.conf.j2"))
+
         deps = [
             ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/bgp_asn"),
             ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/type"),
@@ -187,19 +195,12 @@ def add_peer(self, vrf, nbr, data):
         if "local_addr" not in data:
             log_warn("Peer %s. Missing attribute 'local_addr'" % nbr)
         else:
-            # The bgp session that belongs to a vnet cannot be advertised as the default BGP session.
-            # So we need to check whether this bgp session belongs to a vnet.
             data["local_addr"] = str(netaddr.IPNetwork(str(data["local_addr"])).ip)
             interface = self.get_local_interface(data["local_addr"])
             if not interface:
                 print_data = nbr, data["local_addr"]
                 log_debug("Peer '%s' with local address '%s' wait for the corresponding interface to be set" % print_data)
                 return False
-            vnet = self.get_vnet(interface)
-            if vnet:
-                # Ignore the bgp session that is in a vnet
-                log_info("Ignore the BGP peer '%s' as the interface '%s' is in vnet '%s'" % (nbr, interface, vnet))
-                return True
 
         kwargs = {
             'CONFIG_DB__DEVICE_METADATA': self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME),
@@ -234,10 +235,47 @@ def add_peer(self, vrf, nbr, data):
             self.apply_op(cmd, vrf)
             key = (vrf, nbr)
             self.peers.add(key)
+            self.update_state_db(vrf, nbr, data, "SET")
             log_info("Peer '(%s|%s)' has been scheduled to be added with attributes '%s'" % print_data)
 
+        self.directory.put(self.db_name, self.table_name, vrf + '|' + nbr, data)
         return True
 
+    def update_state_db(self, vrf, nbr, data, op):
+        """
+        Update the database with the new data
+        :param vrf: vrf name. Name is equal "default" for the global vrf
+        :param nbr: neighbor ip address (name for dynamic peer type)
+        :param data: associated data (will be empty for deletion case)
+        :param op: operation type. It can be "SET" or "DEL"
+        :return: True if this adding was successful, False otherwise
+        """
+        if (vrf == "default"):
+            key = nbr
+        else:
+            key = vrf + "|" + nbr
+        # Update the peer in the STATE_DB table
+        try:
+            state_db = swsscommon.DBConnector("STATE_DB", 0)
+            state_peer_table = swsscommon.Table(state_db, swsscommon.STATE_BGP_PEER_CONFIGURED_TABLE_NAME)
+            if (op == "SET"):
+                state_peer_table.set(key, list(sorted(data.items())))
+                log_info("Peer '(%s)' has been added to BGP_PEER_CONFIGURED_TABLE with attributes '%s'" % (key, data))
+            elif (op == "DEL"):
+                (status, fvs) = state_peer_table.get(key)
+                if status == True:
+                    state_peer_table.delete(key)
+                    log_info("Peer '(%s)' has been deleted from BGP_PEER_CONFIGURED_TABLE" % (key))
+                else:
+                    log_warn("Peer '(%s)' not found in BGP_PEER_CONFIGURED_TABLE" % (key))
+            else:
+                log_err("Update state DB called for Peer '(%s)' with unkown operation '%s'" % (key, op))
+                return False
+            return True
+        except Exception as e:
+            log_err("Update of state db failed for peer '(%s)' with error: %s" % (key, str(e)))
+            return False
+
     def update_peer(self, vrf, nbr, data):
         """
         Update a peer. This is used when the peer is already in the FRR
@@ -249,9 +287,12 @@ def update_peer(self, vrf, nbr, data):
         """
         if "admin_status" in data:
             self.change_admin_status(vrf, nbr, data)
+        elif "update" in self.templates and "ip_range" in data and self.peer_type == 'dynamic':
+            self.change_ip_range(vrf, nbr, data)
         else:
             log_err("Peer '(%s|%s)': Can't update the peer. Only 'admin_status' attribute is supported" % (vrf, nbr))
 
+        self.directory.put(self.db_name, self.table_name, vrf + '|' + nbr, data)
         return True
 
     def change_admin_status(self, vrf, nbr, data):
@@ -263,14 +304,14 @@ def change_admin_status(self, vrf, nbr, data):
         :return: True if this adding was successful, False otherwise
         """
         if data['admin_status'] == 'up':
-            self.apply_admin_status(vrf, nbr, "no shutdown", "up")
+            self.apply_admin_status(vrf, nbr, "no shutdown", "up", data)
         elif data['admin_status'] == 'down':
-            self.apply_admin_status(vrf, nbr, "shutdown", "down")
+            self.apply_admin_status(vrf, nbr, "shutdown", "down", data)
         else:
             print_data = vrf, nbr, data['admin_status']
             log_err("Peer '%s|%s': Can't update the peer. It has wrong attribute value attr['admin_status'] = '%s'" % print_data)
 
-    def apply_admin_status(self, vrf, nbr, template_name, admin_state):
+    def apply_admin_status(self, vrf, nbr, template_name, admin_state, data):
         """
         Render admin state template and apply the command to the FRR
         :param vrf: vrf name. Name is equal "default" for the global vrf
@@ -282,10 +323,99 @@ def apply_admin_status(self, vrf, nbr, template_name, admin_state):
         print_data = vrf, nbr, admin_state
         ret_code = self.apply_op(self.templates[template_name].render(neighbor_addr=nbr), vrf)
         if ret_code:
+            self.update_state_db(vrf, nbr, data, "SET")
             log_info("Peer '%s|%s' admin state is set to '%s'" % print_data)
         else:
             log_err("Can't set peer '%s|%s' admin state to '%s'." % print_data)
 
+    def change_ip_range(self, vrf, nbr, data):
+        """
+        Change ip range of a peer
+        :param vrf: vrf name. Name is equal "default" for the global vrf
+        :param nbr: neighbor ip address (name for dynamic peer type)
+        :param data: associated data
+        :return: True if this adding was successful, False otherwise
+        """
+        if data['ip_range']:
+            log_info("Peer '(%s|%s)' ip range is going to be updated with range: %s" % (vrf, nbr, data['ip_range']))
+            new_ip_range = data["ip_range"].split(",")
+            ip_ranges_to_add = new_ip_range
+            ip_ranges_to_del = []
+            existing_ipv4_range, existing_ipv6_range = self.get_existing_ip_ranges(vrf, nbr)
+            if existing_ipv4_range:
+                for ipv4_range in existing_ipv4_range:
+                    if ipv4_range not in new_ip_range:
+                        ip_ranges_to_del.append(ipv4_range)
+                    else:
+                        ip_ranges_to_add.remove(ipv4_range)
+            if existing_ipv6_range:
+                for ipv6_range in existing_ipv6_range:
+                    if ipv6_range not in new_ip_range:
+                        ip_ranges_to_del.append(ipv6_range)
+                    else:
+                        ip_ranges_to_add.remove(ipv6_range)
+            if ip_ranges_to_del or ip_ranges_to_add:
+                log_info("Peer '(%s|%s)' ip range is going to be updated. Ranges to delete: %s Ranges to add: %s" % (vrf, nbr, ip_ranges_to_del, ip_ranges_to_add))
+                self.apply_range_changes(vrf, nbr, ip_ranges_to_add, ip_ranges_to_del, data)
+
+    def get_existing_ip_ranges(self, vrf, nbr):
+        """
+        Get existing ip range of a peer
+        :param vrf: vrf name. Name is equal "default" for the global vrf
+        :param nbr: neighbor ip address (name for dynamic peer type)
+        :return: existing ipv4 and ipv6 ranges of a peer if they exist.
+        """
+        ipv4_ranges = []
+        ipv6_ranges = []
+        if vrf == 'default':
+            command = ["vtysh", "-c", "show bgp peer-group %s json" % (nbr)]
+        else:
+            command = ["vtysh", "-c", "show bgp vrf %s peer-group %s json" % (vrf, nbr)]
+        try:
+            ret_code, out, err = run_command(command)
+            if ret_code == 0:
+                js_bgp = json.loads(out)
+                if nbr in js_bgp and 'dynamicRanges' in js_bgp[nbr] and 'IPv4' in js_bgp[nbr]['dynamicRanges'] and 'ranges' in js_bgp[nbr]['dynamicRanges']['IPv4']:
+                    ipv4_ranges = js_bgp[nbr]['dynamicRanges']['IPv4']['ranges']
+                    log_info("Peer '(%s|%s)' already has ipV4 range: %s" % (vrf, nbr, ipv4_ranges))
+                if nbr in js_bgp and 'dynamicRanges' in js_bgp[nbr] and 'IPv6' in js_bgp[nbr]['dynamicRanges'] and 'ranges' in js_bgp[nbr]['dynamicRanges']['IPv6']:
+                    ipv6_ranges = js_bgp[nbr]['dynamicRanges']['IPv6']['ranges']
+                    log_info("Peer '(%s|%s)' already has ipV6 range: %s" % (vrf, nbr, ipv6_ranges))
+                return ipv4_ranges, ipv6_ranges
+            else:
+                log_err("Can't read ip range of peer '%s|%s': %s" % (vrf, nbr, str(err)))
+                return ipv4_ranges, ipv6_ranges
+        except Exception as e:
+            log_err("Error in parsing ip range: %s" % str(e))
+            return ipv4_ranges, ipv6_ranges
+
+    def apply_range_changes(self, vrf, nbr, new_ip_range, ip_ranges_to_del, data):
+        """
+        Apply changes of ip range of a peer
+        :param vrf: vrf name. Name is equal "default" for the global vrf
+        :param nbr: neighbor ip address (name for dynamic peer type)
+        :param new_ip_range: new ip range
+        :param ip_ranges_to_del: ip ranges to delete
+        """
+        print_data = vrf, nbr, data
+        kwargs = {
+            'CONFIG_DB__DEVICE_METADATA': self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME),
+            'vrf': vrf,
+            'bgp_session': data,
+            'delete_ranges': ip_ranges_to_del,
+            'add_ranges': new_ip_range
+        }
+        try:
+            cmd = self.templates["update"].render(**kwargs)
+        except jinja2.TemplateError as e:
+            msg = "Peer '(%s|%s)'. Error in rendering the template for 'SET' command '%s'" % print_data
+            log_err("%s: %s" % (msg, str(e)))
+            return True
+        if cmd is not None:
+            self.apply_op(cmd, vrf)
+            self.update_state_db(vrf, nbr, data, "SET")
+            log_info("Peer '(%s|%s)' ip range has been scheduled to be updated with range '%s'" % (vrf, nbr, data['ip_range']))
+
     def del_handler(self, key):
         """
         'DEL' handler for the BGP PEER tables
@@ -296,13 +426,43 @@ def del_handler(self, key):
         if peer_key not in self.peers:
             log_warn("Peer '(%s|%s)' has not been found" % (vrf, nbr))
             return
-        cmd = self.templates["delete"].render(neighbor_addr=nbr)
+        # Starting with FRR 10.1, if a peer group is attached to a "listen range",
+        # the range must be removed before the peer group can be deleted.
+        # To comply with this requirement, we first run the command "no bgp listen range ..." to
+        # remove the "listen range" associated with the peer group, and only then proceed
+        # with deleting the peer group.
+        if self.peer_type == 'dynamic' or self.peer_type == 'sentinels':
+            ip_ranges = self.directory.get(self.db_name, self.table_name, vrf + '|' + nbr).get("ip_range")
+            if ip_ranges is not None:
+                ip_ranges = ip_ranges.split(',')
+                for ip_range in ip_ranges:
+                    log_debug("Deleting listen range for peer-group {}, ip_range {}".format(ip_range, nbr))
+                    cmd = self.templates["no listen range"].render(ip_range=ip_range, peer_group=nbr)
+                    ret_code = self.apply_op(cmd, vrf)
+                    if ret_code:
+                        log_info("Listen range '%s' for peer '(%s|%s)' has been disabled" % (ip_range, vrf, nbr))
+                    else:
+                        log_err("Listen range '%s' for peer '(%s|%s)' hasn't been disabled" % (ip_range, vrf, nbr))
+        
+        kwargs = {
+            'CONFIG_DB__DEVICE_METADATA': self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME),
+            'neighbor_addr': nbr,
+            'vrf': vrf
+        }
+
+        try:
+            cmd = self.templates["delete"].render(**kwargs)
+        except jinja2.TemplateError as e:
+            log_err("Peer '(%s|%s)'. Error in rendering the template for 'DEL' command '%s'" % (vrf, nbr, str(e)))
+
         ret_code = self.apply_op(cmd, vrf)
         if ret_code:
+            self.update_state_db(vrf, nbr, {}, "DEL")
             log_info("Peer '(%s|%s)' has been removed" % (vrf, nbr))
             self.peers.remove(peer_key)
         else:
             log_err("Peer '(%s|%s)' hasn't been removed" % (vrf, nbr))
+        self.directory.remove(self.db_name, self.table_name, vrf + '|' + nbr)
 
     def apply_op(self, cmd, vrf):
         """
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_prefix_list.py b/src/sonic-bgpcfgd/bgpcfgd/managers_prefix_list.py
index 965dea9ff24..1686cfc4164 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_prefix_list.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_prefix_list.py
@@ -46,8 +46,8 @@ def generate_prefix_list_config(self, data, add):
         if data["prefix_list_name"] != "ANCHOR_PREFIX":
             log_warn("PrefixListMgr:: Prefix list %s is not supported" % data["prefix_list_name"])
             return False
-        if localhost_type != "SpineRouter" or subtype != "UpstreamLC":
-            log_warn("PrefixListMgr:: Prefix list %s is only supported on UpstreamLC of SpineRouter" % data["prefix_list_name"])
+        if localhost_type not in ["UpperSpineRouter", "SpineRouter"] or (localhost_type == "SpineRouter" and subtype != "UpstreamLC"):
+            log_warn("PrefixListMgr:: Prefix list %s is only supported on Upstream SpineRouter" % data["prefix_list_name"])
             return False
 
         # Add the anchor prefix to the radian configuration
@@ -75,6 +75,7 @@ def set_handler(self, key, data):
                 return True
             data["prefix_list_name"] = prefix_list_name
             data["prefix"] = str(prefix.cidr)
+            data["prefixlen"] = prefix.prefixlen
             data["ipv"] = self.get_ip_type(prefix)
             # Generate the prefix list configuration
             if self.generate_prefix_list_config(data, add=True):
@@ -96,6 +97,7 @@ def del_handler(self, key):
             data = {}
             data["prefix_list_name"] = prefix_list_name
             data["prefix"] = str(prefix.cidr)
+            data["prefixlen"] = prefix.prefixlen
             data["ipv"] = self.get_ip_type(prefix)
             # remove the prefix list configuration
             if self.generate_prefix_list_config(data, add=False):
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_srv6.py b/src/sonic-bgpcfgd/bgpcfgd/managers_srv6.py
index e031ff65f24..e37bd965ceb 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_srv6.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_srv6.py
@@ -1,6 +1,6 @@
 from .log import log_err, log_debug, log_warn
 from .manager import Manager
-from ipaddress import IPv6Address
+from ipaddress import IPv6Network
 from swsscommon import swsscommon
 
 supported_SRv6_behaviors = {
@@ -25,6 +25,7 @@ def __init__(self, common_objs, db, table):
             set(),
             db,
             table,
+            wait_for_all_deps=False
         )
 
     def set_handler(self, key, data):
@@ -60,13 +61,18 @@ def sids_set_handler(self, key, data):
 
         if not self.directory.path_exist(self.db_name, "SRV6_MY_LOCATORS", locator_name):
             log_warn("Found a SRv6 SID config entry with a locator that does not exist yet: {} | {}".format(key, data))
-            self.deps.add((self.db_name, "SRV6_MY_LOCATORS", locator_name))
-            self.directory.subscribe([(self.db_name, "SRV6_MY_LOCATORS", locator_name)], self.on_deps_change)
+            if (self.db_name, "SRV6_MY_LOCATORS", locator_name) not in self.deps:
+                # add the dependency to the deps set
+                # this will trigger a subscription to the locator table
+                self.deps.add((self.db_name, "SRV6_MY_LOCATORS", locator_name))
+                self.directory.subscribe([(self.db_name, "SRV6_MY_LOCATORS", locator_name)], self.on_deps_change)
             return False
 
         locator = self.directory.get(self.db_name, "SRV6_MY_LOCATORS", locator_name)
-        if locator.block_len + locator.node_len > prefix_len:
-            log_err("Found a SRv6 SID config entry with an invalid prefix length {} | {}".format(key, data))
+        locator_prefix = IPv6Network(locator.prefix)
+        sid_prefix = IPv6Network(ip_prefix)
+        if not locator_prefix.supernet_of(sid_prefix):
+            log_err("Found a SRv6 SID config entry that does not match the locator prefix: {} | {}; locator {}".format(key, data, locator))
             return False
 
         if 'action' not in data:
diff --git a/src/sonic-bgpcfgd/staticroutebfd/main.py b/src/sonic-bgpcfgd/staticroutebfd/main.py
index 58005b97e66..197d3d241e3 100644
--- a/src/sonic-bgpcfgd/staticroutebfd/main.py
+++ b/src/sonic-bgpcfgd/staticroutebfd/main.py
@@ -397,7 +397,7 @@ def static_route_set_handler(self, key, data):
         bfd_enabled = self.isFieldTrue(bfd_field)
 
         #when bfd changed from "false" to "true", before bfd session created and state becomes up,
-        #the installed static route need to be kept in the system system, so put this route in "hold" state until at least one 
+        #the installed static route need to be kept in the system system, so put this route in "hold" state until at least one
         #bfd session becomes UP.
         data_copy = data.copy()
         data['bfd_nh_hold'] = "false"
@@ -411,29 +411,31 @@ def static_route_set_handler(self, key, data):
         # preprocess empty nexthop-vrf list before save to LOCAL_CONFIG_TABLE, bfd session need this information
         nh_list     = arg_list(data['nexthop']) if 'nexthop' in data else None
         nh_vrf_list = arg_list(data['nexthop-vrf']) if 'nexthop-vrf' in data else None
-        if nh_vrf_list is None:
+        if nh_vrf_list is None and nh_list is not None:
             nh_vrf_list = [vrf] * len(nh_list) if len(nh_list) > 0 else None
             data['nexthop-vrf'] = ','.join(nh_vrf_list) if nh_vrf_list else ''
-        else: # preprocess empty nexthop-vrf member
+        elif nh_vrf_list is not None: # preprocess empty nexthop-vrf member
             for index in range(len(nh_vrf_list)):
                 if len(nh_vrf_list[index]) == 0:
                     nh_vrf_list[index] = vrf
             data['nexthop-vrf'] = ','.join(nh_vrf_list)
 
-        if not bfd_enabled: 
-            #skip if bfd is not enabled, but store it to local_db to detect bfd field dynamic change
-            data['bfd'] = "false"
-            self.set_local_db(LOCAL_CONFIG_TABLE, route_cfg_key, data)
-            return True
-
         bkh_list    = arg_list(data['blackhole']) if 'blackhole' in data else None
         intf_list   = arg_list(data['ifname']) if 'ifname' in data else None
         dist_list   = arg_list(data['distance']) if 'distance' in data else None
+        if bkh_list is not None and 'true' in bkh_list:
+            log_info("Blackholing static route encountered, skipping it")
+            return True
         if intf_list is None or nh_list is None or nh_vrf_list is None or \
                 len(intf_list) != len(nh_list) or len(intf_list) != len(nh_vrf_list):
-            log_err("Static route bfd set Failed, nexthop, interface and vrf lists do not match.")
+            log_warn("Static route bfd set Failed, nexthop, interface and vrf lists do not match or some of them is empty.")
             return True
 
+        if not bfd_enabled:
+            #skip if bfd is not enabled, but store it to local_db to detect bfd field dynamic change
+            data['bfd'] = "false"
+            self.set_local_db(LOCAL_CONFIG_TABLE, route_cfg_key, data)
+            return True
 
         if cur_data and cur_bfd_enabled:
             # route with the prefix already exist, remove the deleted nexthops
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_UpperSpineRouter.json b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_UpperSpineRouter.json
new file mode 100644
index 00000000000..9b4d5645638
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_UpperSpineRouter.json
@@ -0,0 +1,7 @@
+{
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "type": "UpperSpineRouter"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_downstream_lc.json b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_downstream_lc.json
new file mode 100644
index 00000000000..8a224394a9f
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_downstream_lc.json
@@ -0,0 +1,8 @@
+{
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "type": "SpineRouter",
+            "subtype": "DownstreamLC"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_spine_no_subtype.json b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_spine_no_subtype.json
new file mode 100644
index 00000000000..5c40842ccae
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_spine_no_subtype.json
@@ -0,0 +1,7 @@
+{
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "type": "SpineRouter"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_upstream_lc.json b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_upstream_lc.json
new file mode 100644
index 00000000000..4dd2f5aeae6
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/param_upstream_lc.json
@@ -0,0 +1,8 @@
+{
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "type": "SpineRouter",
+            "subtype": "UpstreamLC"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_UpperSpineRouter.conf b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_UpperSpineRouter.conf
new file mode 100644
index 00000000000..4f8686563a5
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_UpperSpineRouter.conf
@@ -0,0 +1,20 @@
+!
+! template: bgpd/templates/general/peer-group.conf.j2
+!
+  neighbor PEER_V4 peer-group
+  neighbor PEER_V6 peer-group
+  address-family ipv4
+    neighbor PEER_V4 soft-reconfiguration inbound
+    neighbor PEER_V4 route-map FROM_BGP_PEER_V4 in
+    neighbor PEER_V4 route-map TO_BGP_PEER_V4 out
+    table-map SELECTIVE_ROUTE_DOWNLOAD_V4
+  exit-address-family
+  address-family ipv6
+    neighbor PEER_V6 soft-reconfiguration inbound
+    neighbor PEER_V6 route-map FROM_BGP_PEER_V6 in
+    neighbor PEER_V6 route-map TO_BGP_PEER_V6 out
+    table-map SELECTIVE_ROUTE_DOWNLOAD_V6
+  exit-address-family
+!
+! end of template: bgpd/templates/general/peer-group.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_downstream_lc.conf b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_downstream_lc.conf
new file mode 100644
index 00000000000..3bef9fe4fdc
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_downstream_lc.conf
@@ -0,0 +1,18 @@
+!
+! template: bgpd/templates/general/peer-group.conf.j2
+!
+  neighbor PEER_V4 peer-group
+  neighbor PEER_V6 peer-group
+  address-family ipv4
+    neighbor PEER_V4 soft-reconfiguration inbound
+    neighbor PEER_V4 route-map FROM_BGP_PEER_V4 in
+    neighbor PEER_V4 route-map TO_BGP_PEER_V4 out
+  exit-address-family
+  address-family ipv6
+    neighbor PEER_V6 soft-reconfiguration inbound
+    neighbor PEER_V6 route-map FROM_BGP_PEER_V6 in
+    neighbor PEER_V6 route-map TO_BGP_PEER_V6 out
+  exit-address-family
+!
+! end of template: bgpd/templates/general/peer-group.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_spine_no_subtype.conf b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_spine_no_subtype.conf
new file mode 100644
index 00000000000..3bef9fe4fdc
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_spine_no_subtype.conf
@@ -0,0 +1,18 @@
+!
+! template: bgpd/templates/general/peer-group.conf.j2
+!
+  neighbor PEER_V4 peer-group
+  neighbor PEER_V6 peer-group
+  address-family ipv4
+    neighbor PEER_V4 soft-reconfiguration inbound
+    neighbor PEER_V4 route-map FROM_BGP_PEER_V4 in
+    neighbor PEER_V4 route-map TO_BGP_PEER_V4 out
+  exit-address-family
+  address-family ipv6
+    neighbor PEER_V6 soft-reconfiguration inbound
+    neighbor PEER_V6 route-map FROM_BGP_PEER_V6 in
+    neighbor PEER_V6 route-map TO_BGP_PEER_V6 out
+  exit-address-family
+!
+! end of template: bgpd/templates/general/peer-group.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_upstream_lc.conf b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_upstream_lc.conf
new file mode 100644
index 00000000000..4f8686563a5
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_upstream_lc.conf
@@ -0,0 +1,20 @@
+!
+! template: bgpd/templates/general/peer-group.conf.j2
+!
+  neighbor PEER_V4 peer-group
+  neighbor PEER_V6 peer-group
+  address-family ipv4
+    neighbor PEER_V4 soft-reconfiguration inbound
+    neighbor PEER_V4 route-map FROM_BGP_PEER_V4 in
+    neighbor PEER_V4 route-map TO_BGP_PEER_V4 out
+    table-map SELECTIVE_ROUTE_DOWNLOAD_V4
+  exit-address-family
+  address-family ipv6
+    neighbor PEER_V6 soft-reconfiguration inbound
+    neighbor PEER_V6 route-map FROM_BGP_PEER_V6 in
+    neighbor PEER_V6 route-map TO_BGP_PEER_V6 out
+    table-map SELECTIVE_ROUTE_DOWNLOAD_V6
+  exit-address-family
+!
+! end of template: bgpd/templates/general/peer-group.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_UpperSpineRouter.json b/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_UpperSpineRouter.json
new file mode 100644
index 00000000000..297acbd2ed8
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_UpperSpineRouter.json
@@ -0,0 +1,24 @@
+{
+    "loopback0_ipv4": "10.10.10.10/32",
+    "constants": {
+        "bgp": {
+            "allow_list": {
+                "enabled": true,
+                "drop_community": "12345:12345"
+            },
+            "route_eligible_for_fallback_to_default_tag": "203",
+            "route_do_not_send_appdb_tag" : "202",
+            "internal_fallback_community": "1111:2222",
+            "local_anchor_route_community": "12345:555",
+            "anchor_route_community": "12345:666",
+            "anchor_contributing_route_community": "12345:777"
+        }
+    },
+    "allow_list_default_action": "permit",
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "type": "UpperSpineRouter",
+            "switch_type": "voq"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_UpperSpineRouter.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_UpperSpineRouter.conf
new file mode 100644
index 00000000000..dcc123a82a0
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_UpperSpineRouter.conf
@@ -0,0 +1,94 @@
+!
+! template: bgpd/templates/general/policies.conf.j2
+!
+!
+ip prefix-list DEFAULT_IPV4 permit 0.0.0.0/0
+ipv6 prefix-list DEFAULT_IPV6 permit ::/0
+!
+!
+!
+! please don't remove. 65535 entries are default rules
+! which works when allow_list is enabled, but new configuration
+! is not applied
+!
+!
+route-map ALLOW_LIST_DEPLOYMENT_ID_0_V4 permit 65535
+  set community 12345:12345 additive
+!
+route-map ALLOW_LIST_DEPLOYMENT_ID_0_V6 permit 65535
+  set community 12345:12345 additive
+!
+bgp community-list standard allow_list_default_community permit no-export
+bgp community-list standard allow_list_default_community permit 12345:12345
+!
+route-map FROM_BGP_PEER_V4 permit 10
+  call ALLOW_LIST_DEPLOYMENT_ID_0_V4
+  on-match next
+!
+route-map FROM_BGP_PEER_V4 permit 11
+  match community allow_list_default_community
+!
+route-map FROM_BGP_PEER_V6 permit 10
+  call ALLOW_LIST_DEPLOYMENT_ID_0_V6
+  on-match next
+!
+route-map FROM_BGP_PEER_V6 permit 11
+  match community allow_list_default_community
+!
+!
+!
+!
+route-map FROM_BGP_PEER_V4 permit 100
+!
+route-map TO_BGP_PEER_V4 permit 100
+  call CHECK_IDF_ISOLATION
+!
+!
+route-map FROM_BGP_PEER_V6 permit 1
+ on-match next
+ set ipv6 next-hop prefer-global
+!
+route-map FROM_BGP_PEER_V6 permit 100
+!
+route-map TO_BGP_PEER_V6 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map CHECK_IDF_ISOLATION permit 10
+!
+!
+!
+bgp community-list standard ANCHOR_ROUTE_COMMUNITY permit 12345:666
+bgp community-list standard LOCAL_ANCHOR_ROUTE_COMMUNITY permit 12345:555
+bgp community-list standard ANCHOR_CONTRIBUTING_ROUTE_COMMUNITY permit 12345:777
+!
+route-map SELECTIVE_ROUTE_DOWNLOAD_V4 deny 10
+  match community LOCAL_ANCHOR_ROUTE_COMMUNITY
+!
+route-map SELECTIVE_ROUTE_DOWNLOAD_V4 permit 1000
+!
+route-map SELECTIVE_ROUTE_DOWNLOAD_V6 deny 10
+  match community LOCAL_ANCHOR_ROUTE_COMMUNITY
+!
+route-map SELECTIVE_ROUTE_DOWNLOAD_V6 permit 1000
+!
+route-map TAG_ANCHOR_COMMUNITY permit 10
+  set community 12345:555 12345:666 additive
+!
+route-map TO_BGP_PEER_V6 permit 50
+  match ipv6 address prefix-list ANCHOR_CONTRIBUTING_ROUTES
+  set community 12345:777 additive
+  on-match next
+!
+route-map TO_BGP_PEER_V6 permit 60
+  set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete
+!
+route-map TO_BGP_PEER_V4 permit 50
+  match ip address prefix-list ANCHOR_CONTRIBUTING_ROUTES
+  set community 12345:777 additive
+  on-match next
+!
+route-map TO_BGP_PEER_V4 permit 60
+  set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete
+!
+! end of template: bgpd/templates/general/policies.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf
index 842b75ed47e..49c7516ee01 100644
--- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf
@@ -90,20 +90,20 @@ route-map SELECTIVE_ROUTE_DOWNLOAD_V6 permit 1000
 route-map TAG_ANCHOR_COMMUNITY permit 10
   set community 12345:555 12345:666 additive
 !
-route-map TO_BGP_PEER_V6 permit 30
+route-map TO_BGP_PEER_V6 permit 50
   match ipv6 address prefix-list ANCHOR_CONTRIBUTING_ROUTES
   set community 12345:777 additive
   on-match next
 !
-route-map TO_BGP_PEER_V6 permit 40
+route-map TO_BGP_PEER_V6 permit 60
   set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete
 !
-route-map TO_BGP_PEER_V4 permit 30
-  match ipv6 address prefix-list ANCHOR_CONTRIBUTING_ROUTES
+route-map TO_BGP_PEER_V4 permit 50
+  match ip address prefix-list ANCHOR_CONTRIBUTING_ROUTES
   set community 12345:777 additive
   on-match next
 !
-route-map TO_BGP_PEER_V4 permit 40
+route-map TO_BGP_PEER_V4 permit 60
   set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete
 !
 ! end of template: bgpd/templates/general/policies.conf.j2
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf
index 1697cb0fd8e..75026d4ba73 100644
--- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf
@@ -90,20 +90,20 @@ route-map SELECTIVE_ROUTE_DOWNLOAD_V6 permit 1000
 route-map TAG_ANCHOR_COMMUNITY permit 10
   set community 12345:555 12345:666 additive
 !
-route-map TO_BGP_PEER_V6 permit 30
+route-map TO_BGP_PEER_V6 permit 50
   match ipv6 address prefix-list ANCHOR_CONTRIBUTING_ROUTES
   set community 12345:777 additive
   on-match next
 !
-route-map TO_BGP_PEER_V6 permit 40
+route-map TO_BGP_PEER_V6 permit 60
   set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete
 !
-route-map TO_BGP_PEER_V4 permit 30
-  match ipv6 address prefix-list ANCHOR_CONTRIBUTING_ROUTES
+route-map TO_BGP_PEER_V4 permit 50
+  match ip address prefix-list ANCHOR_CONTRIBUTING_ROUTES
   set community 12345:777 additive
   on-match next
 !
-route-map TO_BGP_PEER_V4 permit 40
+route-map TO_BGP_PEER_V4 permit 60
   set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete
 !
 ! end of template: bgpd/templates/general/policies.conf.j2
diff --git a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_chasiss_packet.json b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_chasiss_packet.json
index c0031457c05..214eb8cc1fe 100644
--- a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_chasiss_packet.json
+++ b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_chasiss_packet.json
@@ -10,9 +10,10 @@
     "constants": {
         "bgp": {
             "internal_community": "12345:556",
-	    "internal_community_match_tag": "101",
-	    "route_eligible_for_fallback_to_default_tag": "203",
-	    "internal_fallback_community": "1111:2222"
+	        "internal_community_match_tag": "101",
+	        "route_eligible_for_fallback_to_default_tag": "203",
+	        "internal_fallback_community": "1111:2222",
+            "local_anchor_route_community": "12345:555"
         }
     },
     "loopback0_ipv4": "10.10.10.10/32"
diff --git a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf
index d67849a86fe..e3a2e4160b0 100644
--- a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf
+++ b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf
@@ -3,6 +3,7 @@
 !
 bgp community-list standard DEVICE_INTERNAL_COMMUNITY permit 12345:556
 bgp community-list standard DEVICE_INTERNAL_FALLBACK_COMMUNITY permit 1111:2222
+bgp community-list standard LOCAL_ANCHOR_ROUTE_COMMUNITY permit 12345:555
 bgp community-list standard NO_EXPORT permit no-export
 !
 route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
@@ -41,10 +42,16 @@ route-map TO_BGP_INTERNAL_PEER_V4 permit 1
   match ip address prefix-list PL_LoopbackV4
   set community 12345:556
 !
+route-map TO_BGP_INTERNAL_PEER_V4 deny 15
+  match community LOCAL_ANCHOR_ROUTE_COMMUNITY
+!
 route-map TO_BGP_INTERNAL_PEER_V6 permit 2
   match ipv6 address prefix-list PL_LoopbackV6
   set community 12345:556
 !
+route-map TO_BGP_INTERNAL_PEER_V6 deny 15
+  match community LOCAL_ANCHOR_ROUTE_COMMUNITY
+!
 route-map FROM_BGP_INTERNAL_PEER_V4 permit 100
 !
 route-map FROM_BGP_INTERNAL_PEER_V6 permit 100
diff --git a/src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/param_chassis.json b/src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/param_chassis.json
index 5c40842ccae..3b9663b6acb 100644
--- a/src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/param_chassis.json
+++ b/src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/param_chassis.json
@@ -1,7 +1,8 @@
 {
     "CONFIG_DB__DEVICE_METADATA": {
         "localhost": {
-            "type": "SpineRouter"
+            "type": "SpineRouter",
+            "switch_type": "voq"
         }
     }
 }
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/add_radian.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/add_radian.conf
index 56158fe170a..f7a44fd102a 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/add_radian.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/add_radian.conf
@@ -1,4 +1,4 @@
-ipv6 prefix-list ANCHOR_CONTRIBUTING_ROUTES permit ffff::/64 ge 48
+ipv6 prefix-list ANCHOR_CONTRIBUTING_ROUTES permit ffff::/64 ge 65
 router bgp 1234
 address-family ipv6 unicast
  aggregate-address ffff::/64 route-map TAG_ANCHOR_COMMUNITY
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/add_radian.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/add_radian.json
index d8e992aa8ae..1fbcf8ed50a 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/add_radian.json
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/add_radian.json
@@ -2,6 +2,7 @@
     "data": {
         "ipv": "ipv6",
         "prefix": "ffff::/64",
+        "prefixlen": 64,
         "bgp_asn": 1234
     }
 }
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/del_radian.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/del_radian.conf
index 16597681518..bf6a5aa7225 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/del_radian.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/del_radian.conf
@@ -1,6 +1,6 @@
-no ipv6 prefix-list ANCHOR_CONTRIBUTING_ROUTES permit ffff::/64 ge 48 
+no ipv6 prefix-list ANCHOR_CONTRIBUTING_ROUTES permit ffff::/64 ge 65
 router bgp 1234
  address-family ipv6 unicast
 no aggregate-address ffff::/64 route-map TAG_ANCHOR_COMMUNITY
  exit
-exit
\ No newline at end of file
+exit
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/del_radian.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/del_radian.json
index d8e992aa8ae..1fbcf8ed50a 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/del_radian.json
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/radian/del_radian.json
@@ -2,6 +2,7 @@
     "data": {
         "ipv": "ipv6",
         "prefix": "ffff::/64",
+        "prefixlen": 64,
         "bgp_asn": 1234
     }
 }
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
index c22fa8c7f93..23ef6d096b1 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-bgpcfgd/tests/test_as_path.py b/src/sonic-bgpcfgd/tests/test_as_path.py
new file mode 100644
index 00000000000..19168140a0c
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/test_as_path.py
@@ -0,0 +1,91 @@
+from unittest.mock import MagicMock, patch, call
+
+import os
+from bgpcfgd.directory import Directory
+from bgpcfgd.template import TemplateFabric
+from . import swsscommon_test
+from swsscommon import swsscommon
+
+from bgpcfgd.managers_as_path import AsPathMgr
+
+TEMPLATE_PATH = os.path.abspath('../../dockers/docker-fpm-frr/frr')
+
+
+def constructor():
+    cfg_mgr = MagicMock()
+    common_objs = {
+        'directory': Directory(),
+        'cfg_mgr':   cfg_mgr,
+        'tf':        TemplateFabric(TEMPLATE_PATH),
+        'constants': {},
+    }
+
+    m = AsPathMgr(common_objs, "CONFIG_DB", "DEVICE_METADATA")
+    m.directory.put("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost", {"bgp_asn": "65100", "type": "SpineRouter", "subtype": "UpstreamLC"})
+
+    return m
+
+
+def set_handler_test(manager, key, value):
+    res = manager.set_handler(key, value)
+    assert res, "Returns always True"
+
+
+def del_handler_test(manager, key):
+    res = manager.del_handler(key)
+    assert res, "Returns always True"
+
+
+# test if T2_GROUP_ASNS has been cleared
+def test_metadata_without_asns():
+    m = constructor()
+    set_handler_test(m, "localhost", {"bgp_asn": "65100", "type": "SpineRouter",
+                                      "subtype": "UpstreamLC"})
+    assert m.cfg_mgr.push.call_count == 0, "push func is called, which is unexpected"
+
+
+# test if T2_GROUP_ASNS has been added
+def test_metadata_with_asns():
+    m = constructor()
+    set_handler_test(m, "localhost",
+                     {"bgp_asn": "65100", "type": "SpineRouter",
+                      "subtype": "UpstreamLC", "t2_group_asns": "64120,64121"})
+    m.cfg_mgr.push.assert_has_calls([
+        call("bgp as-path access-list T2_GROUP_ASNS permit _64120_"),
+        call("bgp as-path access-list T2_GROUP_ASNS permit _64121_")
+    ], any_order=True)
+
+
+# test if T2_GROUP_ASNS has been updated
+def test_metadata_with_asns_update():
+    m = constructor()
+    m.cfg_mgr.get_text = MagicMock(return_value=["bgp as-path access-list T2_GROUP_ASNS seq 5 permit _64128_"])
+    set_handler_test(m, "localhost",
+                     {"bgp_asn": "65100", "type": "SpineRouter",
+                      "subtype": "UpstreamLC", "t2_group_asns": "64120,64121"})
+    m.cfg_mgr.push.assert_has_calls([
+        call("no bgp as-path access-list T2_GROUP_ASNS seq 5 permit _64128_"),
+        call("bgp as-path access-list T2_GROUP_ASNS permit _64120_"),
+        call("bgp as-path access-list T2_GROUP_ASNS permit _64121_")
+    ], any_order=True)
+    
+    actual_calls = m.cfg_mgr.push.mock_calls
+    assert (actual_calls[0] == call("no bgp as-path access-list T2_GROUP_ASNS seq 5 permit _64128_"),
+            "Didn't find call to clear previous ASN")
+
+
+# test if T2_GROUP_ASNS has been cleared
+def test_del_handler():
+    m = constructor()
+    set_handler_test(m, "localhost",
+                     {"bgp_asn": "65100", "type": "SpineRouter",
+                      "subtype": "UpstreamLC", "t2_group_asns": "64120,64121"})
+    del_handler_test(m, "localhost")
+    m.cfg_mgr.push.assert_has_calls([
+        call("bgp as-path access-list T2_GROUP_ASNS permit _64120_"),
+        call("bgp as-path access-list T2_GROUP_ASNS permit _64121_"),
+        call("no bgp as-path access-list T2_GROUP_ASNS")
+    ], any_order=True)
+    actual_calls = m.cfg_mgr.push.mock_calls
+    assert (actual_calls[-1] == call("no bgp as-path access-list T2_GROUP_ASNS"),
+            "Didn't find call to delete access-list")
diff --git a/src/sonic-bgpcfgd/tests/test_bgp.py b/src/sonic-bgpcfgd/tests/test_bgp.py
index b9240cccb8e..e66c5621c4b 100644
--- a/src/sonic-bgpcfgd/tests/test_bgp.py
+++ b/src/sonic-bgpcfgd/tests/test_bgp.py
@@ -33,7 +33,9 @@ def constructor(constants_path, bgp_router_id="", peer_type="general", with_lo0_
 
     return_value_map = {
         "['vtysh', '-H', '/dev/null', '-c', 'show bgp vrfs json']": (0, "{\"vrfs\": {\"default\": {}}}", ""),
-        "['vtysh', '-c', 'show bgp vrf default neighbors json']": (0, "{\"10.10.10.1\": {}, \"20.20.20.1\": {}, \"fc00:10::1\": {}}", "")
+        "['vtysh', '-c', 'show bgp vrf default neighbors json']": (0, "{\"10.10.10.1\": {}, \"20.20.20.1\": {}, \"fc00:10::1\": {}, \"DynNbr1\": {}, \"DynNbr2\": {}}", ""),
+        "['vtysh', '-c', 'show bgp peer-group DynNbr1 json']": (0, "{\"DynNbr1\":{\"dynamicRanges\":{\"IPv4\":{\"count\":1,\"ranges\":[\"10.255.0.0/24\"]}}}}", ""),
+        "['vtysh', '-c', 'show bgp peer-group DynNbr2 json']": (0, "{\"DynNbr2\":{\"dynamicRanges\":{\"IPv4\":{\"count\":1,\"ranges\":[\"192.168.0.0/24\",\"192.168.1.0/24\"]}}}}", "")
     }
 
     bgpcfgd.managers_bgp.run_command = lambda cmd: return_value_map[str(cmd)]
@@ -54,6 +56,7 @@ def constructor(constants_path, bgp_router_id="", peer_type="general", with_lo0_
     m.directory.put("LOCAL", "local_addresses", "fc00:20::20", {"interface": "Ethernet8|fc00:20::20/96"})
     m.directory.put("LOCAL", "interfaces", "Ethernet4|30.30.30.30/24", {"anything": "anything"})
     m.directory.put("LOCAL", "interfaces", "Ethernet8|fc00:20::20/96", {"anything": "anything"})
+    m.directory.put("CONFIG_DB", swsscommon.CFG_BGP_NEIGHBOR_TABLE_NAME, "default|10.10.10.1", {"ip_range": None})
 
     if m.check_neig_meta:
         m.directory.put("CONFIG_DB", swsscommon.CFG_DEVICE_NEIGHBOR_METADATA_TABLE_NAME, "TOR", {})
@@ -152,6 +155,74 @@ def test_add_peer_ipv6():
         res = m.set_handler("fc00:20::1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': 'fc00:20::20', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
         assert res, "Expect True return value"
 
+def test_add_peer_in_vnet():
+    for constant in load_constant_files():
+        m = constructor(constant)
+        res = m.set_handler("Vnet-10|30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
+        assert res, "Expect True return value"
+
+def test_add_peer_ipv6_in_vnet():
+    for constant in load_constant_files():
+        m = constructor(constant)
+        res = m.set_handler("Vnet-10|fc00:20::1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': 'fc00:20::20', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
+
+@patch('bgpcfgd.managers_bgp.log_info')
+def test_add_dynamic_peer(mocked_log_info):
+    for constant in load_constant_files():
+        m = constructor(constant, peer_type="dynamic")
+        m.check_neig_meta = False
+        res = m.set_handler("BGPSLBPassive", {"peer_asn": "65200", "ip_range": "10.250.0.0/27", "name": "BGPSLBPassive", "src_address": "10.250.0.1"})
+        mocked_log_info.assert_called_with("Peer '(default|BGPSLBPassive)' has been scheduled to be added with attributes '{'peer_asn': '65200', 'ip_range': '10.250.0.0/27', 'name': 'BGPSLBPassive', 'src_address': '10.250.0.1'}'")
+        assert res, "Expect True return value"
+
+@patch('bgpcfgd.managers_bgp.log_info')
+def test_add_dynamic_peer_ipv6(mocked_log_info):
+    for constant in load_constant_files():
+        m = constructor(constant, peer_type="dynamic")
+        m.check_neig_meta = False
+        res = m.set_handler("BGPSLBPassive", {"peer_asn": "65200", "ip_range": "fc00:20::/64", "name": "BGPSLBPassive", "src_address": "fc00:20::1"})
+        mocked_log_info.assert_called_with("Peer '(default|BGPSLBPassive)' has been scheduled to be added with attributes '{'peer_asn': '65200', 'ip_range': 'fc00:20::/64', 'name': 'BGPSLBPassive', 'src_address': 'fc00:20::1'}'")
+        assert res, "Expect True return value"
+
+@patch('bgpcfgd.managers_bgp.log_info')
+@patch('bgpcfgd.managers_bgp.swsscommon.Table')
+@patch('bgpcfgd.managers_bgp.swsscommon.DBConnector')
+def modify_dynamic_peer_common(mock_db_conn, mock_table, mocked_log_info, peer, data, update_log, final_log):
+    for constant in load_constant_files():
+        m = constructor(constant, peer_type="dynamic")
+        m.cfg_mgr.push = MagicMock(return_value = None)
+        m.check_neig_meta = False
+        swsscommon.STATE_BGP_PEER_CONFIGURED_TABLE_NAME = "BGP_PEER_CONFIGURED_TABLE"
+        mock_state_db_table = MagicMock()
+        mock_table.return_value = mock_state_db_table
+        res = m.set_handler(peer, data)
+        assert res, "Expect True return value"
+        if "update" in m.templates:
+            mock_state_db_table.set.assert_called_once_with(peer, list(sorted(data.items())))
+            mocked_log_info.assert_any_call(update_log)
+            mocked_log_info.assert_called_with(final_log)
+
+def test_add_dynamic_peer_range():
+    data = {"peer_asn": "65200", "ip_range": "10.255.0.0/24,10.255.1.0/24", "name": "DynNbr1"}
+    peer = "DynNbr1"
+    update_log = "Peer '(default|DynNbr1)' ip range is going to be updated. Ranges to delete: [] Ranges to add: ['10.255.1.0/24']"
+    final_log = "Peer '(default|DynNbr1)' ip range has been scheduled to be updated with range '10.255.0.0/24,10.255.1.0/24'"
+    modify_dynamic_peer_common(peer=peer, data=data, update_log=update_log, final_log=final_log)
+
+def test_modify_dynamic_peer_range():
+    data = {"peer_asn": "65200", "ip_range": "10.255.0.0/26", "name": "DynNbr1"}
+    peer = "DynNbr1"
+    update_log = "Peer '(default|DynNbr1)' ip range is going to be updated. Ranges to delete: ['10.255.0.0/24'] Ranges to add: ['10.255.0.0/26']"
+    final_log = "Peer '(default|DynNbr1)' ip range has been scheduled to be updated with range '10.255.0.0/26'"
+    modify_dynamic_peer_common(peer=peer, data=data, update_log=update_log, final_log=final_log)
+
+def test_delete_dynamic_peer_range():
+    data = {"peer_asn": "65200", "ip_range": "192.168.0.0/24", "name": "DynNbr2"}
+    peer = "DynNbr2"
+    update_log = "Peer '(default|DynNbr2)' ip range is going to be updated. Ranges to delete: ['192.168.1.0/24'] Ranges to add: []"
+    final_log = "Peer '(default|DynNbr2)' ip range has been scheduled to be updated with range '192.168.0.0/24'"
+    modify_dynamic_peer_common(peer=peer, data=data, update_log=update_log, final_log=final_log)
+
 @patch('bgpcfgd.managers_bgp.log_warn')
 def test_add_peer_no_local_addr(mocked_log_warn):
     for constant in load_constant_files():
@@ -174,6 +245,16 @@ def test_del_handler(mocked_log_info):
         m = constructor(constant)
         m.del_handler("10.10.10.1")
         mocked_log_info.assert_called_with("Peer '(default|10.10.10.1)' has been removed")
+    
+@patch('bgpcfgd.managers_bgp.log_info')
+def test_del_handler_dynamic_template_exists(mocked_log_info):
+    for constant in load_constant_files():
+        m = constructor(constant, peer_type="dynamic")
+        base_template = "bgpd/templates/" + m.constants["bgp"]["peers"]["dynamic"]["template_dir"] + "/delete.conf.j2"
+        if os.path.exists(TEMPLATE_PATH + "/" + base_template):
+            mocked_log_info.assert_called_with("Using delete template found at %s" % base_template)
+        m.del_handler("10.10.10.1")
+        mocked_log_info.assert_called_with("Peer '(default|10.10.10.1)' has been removed")
 
 @patch('bgpcfgd.managers_bgp.log_warn')
 def test_del_handler_nonexist_peer(mocked_log_warn):
@@ -181,3 +262,14 @@ def test_del_handler_nonexist_peer(mocked_log_warn):
         m = constructor(constant)
         m.del_handler("40.40.40.1")
         mocked_log_warn.assert_called_with("Peer '(default|40.40.40.1)' has not been found")
+
+@patch('bgpcfgd.managers_bgp.log_info')
+@patch('bgpcfgd.managers_bgp.log_warn')
+def test_del_handler_dynamic_nonexist_peer_template_exists(mocked_log_warn, mocked_log_info):
+    for constant in load_constant_files():
+        m = constructor(constant, peer_type="dynamic")
+        base_template = "bgpd/templates/" + m.constants["bgp"]["peers"]["dynamic"]["template_dir"] + "/delete.conf.j2"
+        if os.path.exists(TEMPLATE_PATH + "/" + base_template):
+            mocked_log_info.assert_called_with("Using delete template found at %s" % base_template)
+        m.del_handler("40.40.40.1")
+        mocked_log_warn.assert_called_with("Peer '(default|40.40.40.1)' has not been found")
diff --git a/src/sonic-bgpcfgd/tests/test_srv6.py b/src/sonic-bgpcfgd/tests/test_srv6.py
index 24249c6960a..4e18ad2de86 100644
--- a/src/sonic-bgpcfgd/tests/test_srv6.py
+++ b/src/sonic-bgpcfgd/tests/test_srv6.py
@@ -165,21 +165,62 @@ def test_invalid_add():
 
     assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc2|fcbb:bbbb:21:f1::\\64")
 
+def test_add_unmatched_sid():
+    loc_mgr, sid_mgr = constructor()
+    assert loc_mgr.set_handler("loc1", {'prefix': 'fcbb:bbbb:20::'})
+
+    # test the addition of a SID with a non-matching locator
+    op_test(sid_mgr, 'SET', ("loc1|FCBB:BBBB:21::/48", {
+        'action': 'uN'
+    }), expected_ret=False, expected_cmds=[])
+
+    assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc1|fcbb:bbbb:21::\\48")
+
 def test_out_of_order_add():
     loc_mgr, sid_mgr = constructor()
     loc_mgr.cfg_mgr.push_list = MagicMock()
     sid_mgr.cfg_mgr.push_list = MagicMock()
 
-    # add the sid first
+    # add two sids first
+    sid_mgr.handler(op='SET', key="loc1|FCBB:BBBB:20::/48", data={'action': 'uN'})
+    sid_mgr.handler(op='SET', key="loc2|FCBB:BBBB:21::/48", data={'action': 'uN'})
+
+    # verify that the sid is not added
+    assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc1|fcbb:bbbb:20::\\48")
+    assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc2|fcbb:bbbb:21::\\48")
+
+    # add the locator loc2
+    loc_mgr.handler(op='SET', key="loc2", data={'prefix': 'fcbb:bbbb:21::'})
+
+    # verify that the sid of loc2 is programmed and the sid of loc1 is not prrogrammed
+    # after locator config was added
+    assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc1|fcbb:bbbb:20::\\48")
+    assert sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc2|fcbb:bbbb:21::\\48")
+
+def test_out_of_order_add_wait_for_all_deps():
+    loc_mgr, sid_mgr = constructor()
+    sid_mgr.wait_for_all_deps = True
+    loc_mgr.cfg_mgr.push_list = MagicMock()
+    sid_mgr.cfg_mgr.push_list = MagicMock()
+
+    # add two sids first
+    sid_mgr.handler(op='SET', key="loc1|FCBB:BBBB:20::/48", data={'action': 'uN'})
     sid_mgr.handler(op='SET', key="loc2|FCBB:BBBB:21::/48", data={'action': 'uN'})
 
     # verify that the sid is not added
+    assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc1|fcbb:bbbb:20::\\48")
     assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc2|fcbb:bbbb:21::\\48")
 
-    # add the locator
+    # add the locator loc2
     loc_mgr.handler(op='SET', key="loc2", data={'prefix': 'fcbb:bbbb:21::'})
 
-    time.sleep(3)
+    # verify that neither of the sids are programmed because the manager is waiting for all dependencies
+    assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc1|fcbb:bbbb:20::\\48")
+    assert not sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc2|fcbb:bbbb:21::\\48")
+
+    # add the locator loc1
+    loc_mgr.handler(op='SET', key="loc1", data={'prefix': 'fcbb:bbbb:20::'})
 
-    # verify that the sid is added after locator config was there
-    assert sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc2|fcbb:bbbb:21::\\48")
\ No newline at end of file
+    # verify that both of the sids are programmed because all dependencies are satisfied
+    assert sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc1|fcbb:bbbb:20::\\48")
+    assert sid_mgr.directory.path_exist(sid_mgr.db_name, sid_mgr.table_name, "loc2|fcbb:bbbb:21::\\48")
diff --git a/src/sonic-bgpcfgd/tests/test_static_rt_bfd.py b/src/sonic-bgpcfgd/tests/test_static_rt_bfd.py
index 5198e50eae5..4ea4707f80e 100644
--- a/src/sonic-bgpcfgd/tests/test_static_rt_bfd.py
+++ b/src/sonic-bgpcfgd/tests/test_static_rt_bfd.py
@@ -114,7 +114,7 @@ def intf_setup(dut):
         ),
         {},
         {}
-    )    
+    )
 
 def test_set_del_ipv6():
     dut = constructor()
@@ -127,7 +127,7 @@ def test_set_del_ipv6():
             "ifname": "if1, if2, if3",
             "nexthop": "2603:10E2:400:1::2,2603:10E2:400:2::2,2603:10e2:400:3::2"
         }),
-        { 
+        {
             "set_default:default:2603:10e2:400:1::2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '2603:10E2:400:1::1'},
             "set_default:default:2603:10e2:400:2::2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '2603:10E2:400:2::1'},
             "set_default:default:2603:10e2:400:3::2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '2603:10E2:400:3::1'}
@@ -200,7 +200,7 @@ def test_set_del():
             "nexthop": "192.168.1.2 , 192.168.2.2, 192.168.3.2",
             "ifname": "if1, if2, if3",
         }),
-        { 
+        {
             "set_default:default:192.168.1.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.1.1'},
             "set_default:default:192.168.2.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.2.1'},
             "set_default:default:192.168.3.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.3.1'}
@@ -241,7 +241,7 @@ def test_set_del():
             "nexthop": "192.168.1.2 , 192.168.2.2",
             "ifname": "if1, if2",
         }),
-        { 
+        {
             "del_default:default:192.168.3.2" : {}
         },
         {'set_default:2.2.2.0/24': {'nexthop': '192.168.2.2,192.168.1.2 ', 'ifname': 'if2,if1', 'nexthop-vrf': 'default,default', 'expiry': 'false'}}
@@ -255,7 +255,7 @@ def test_set_del():
             "nexthop": "192.168.1.2 , 192.168.2.2",
             "ifname": "if1, if2",
         }),
-        { 
+        {
             "del_default:default:192.168.1.2" : {},
             "del_default:default:192.168.2.2" : {}
         },
@@ -293,7 +293,7 @@ def test_set_del_vrf():
             "ifname": "if1, if2, if3",
             "nexthop-vrf": "testvrf1, , default",
         }),
-        { 
+        {
             "set_testvrf1:default:192.168.1.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.1.1'},
             "set_vrfred:default:192.168.2.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.2.1'},
             "set_default:default:192.168.3.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.3.1'}
@@ -334,7 +334,7 @@ def test_set_del_vrf():
             "ifname": "if1, if2",
             "nexthop-vrf": "testvrf1,",
         }),
-        { 
+        {
             "del_default:default:192.168.3.2" : {}
         },
         {'set_vrfred:2.2.2.0/24': {'nexthop': '192.168.2.2,192.168.1.2 ', 'ifname': 'if2,if1', 'nexthop-vrf': 'vrfred, testvrf1', 'expiry': 'false'}}
@@ -343,7 +343,7 @@ def test_set_del_vrf():
     set_del_test(dut, "srt",
         "DEL",
         ("vrfred|2.2.2.0/24", { }),
-        { 
+        {
             "del_testvrf1:default:192.168.1.2" : {},
             "del_vrfred:default:192.168.2.2" : {}
         },
@@ -361,7 +361,7 @@ def test_bfd_del():
             "nexthop": "192.168.1.2 , 192.168.2.2, 192.168.3.2",
             "ifname": "if1, if2, if3",
         }),
-        { 
+        {
             "set_default:default:192.168.1.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.1.1'},
             "set_default:default:192.168.2.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.2.1'},
             "set_default:default:192.168.3.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.3.1'}
@@ -414,7 +414,7 @@ def test_set_2routes():
             "nexthop": "192.168.1.2 , 192.168.2.2, 192.168.3.2",
             "ifname": "if1, if2, if3",
         }),
-        { 
+        {
             "set_default:default:192.168.1.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.1.1'},
             "set_default:default:192.168.2.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.2.1'},
             "set_default:default:192.168.3.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.3.1'}
@@ -491,7 +491,7 @@ def test_set_bfd_change_hold():
             "nexthop": "192.168.1.2 , 192.168.2.2, 192.168.3.2",
             "ifname": "if1, if2, if3",
         }),
-        { 
+        {
             "set_default:default:192.168.1.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.1.1'},
             "set_default:default:192.168.2.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.2.1'},
             "set_default:default:192.168.3.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.3.1'}
@@ -531,7 +531,7 @@ def test_set_bfd_change_hold():
             "nexthop": "192.168.1.2 , 192.168.2.2, 192.168.3.2",
             "ifname": "if1, if2, if3",
         }),
-        { 
+        {
             "del_default:default:192.168.1.2" : {},
             "del_default:default:192.168.2.2" : {},
             "del_default:default:192.168.3.2" : {}
@@ -550,7 +550,7 @@ def test_set_bfd_change_hold():
             "nexthop": "192.168.1.2 , 192.168.2.2, 192.168.3.2",
             "ifname": "if1, if2, if3",
         }),
-        { 
+        {
             "set_default:default:192.168.1.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.1.1'},
             "set_default:default:192.168.2.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.2.1'},
             "set_default:default:192.168.3.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.3.1'}
@@ -596,7 +596,7 @@ def test_set_bfd_change_no_hold():
             "nexthop": "192.168.1.2 , 192.168.2.2, 192.168.3.2",
             "ifname": "if1, if2, if3",
         }),
-        { 
+        {
             "set_default:default:192.168.1.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.1.1'},
             "set_default:default:192.168.2.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.2.1'},
             "set_default:default:192.168.3.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.3.1'}
@@ -645,7 +645,7 @@ def test_set_bfd_change_no_hold():
             "nexthop": "192.168.1.2 , 192.168.2.2, 192.168.3.2",
             "ifname": "if1, if2, if3",
         }),
-        { 
+        {
             "del_default:default:192.168.1.2" : {},
             "del_default:default:192.168.3.2" : {}
         },
@@ -654,7 +654,7 @@ def test_set_bfd_change_no_hold():
         }
     )
 
-    #test #10 change 'bfd': false to true, because the bfd session "default:default:192.168.2.2" is up, so add that nexthop right after "bfd" change to "true" 
+    #test #10 change 'bfd': false to true, because the bfd session "default:default:192.168.2.2" is up, so add that nexthop right after "bfd" change to "true"
     set_del_test(dut, "srt",
         "SET",
         ("2.2.2.0/24", {
@@ -662,7 +662,7 @@ def test_set_bfd_change_no_hold():
             "nexthop": "192.168.1.2 , 192.168.2.2, 192.168.3.2",
             "ifname": "if1, if2, if3",
         }),
-        { 
+        {
             "set_default:default:192.168.1.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.1.1'},
             "set_default:default:192.168.3.2" : {'multihop': 'false', 'rx_interval': '50', 'tx_interval': '50', 'multiplier': '3', 'local_addr': '192.168.3.1'}
         },
@@ -695,4 +695,58 @@ def test_set_bfd_change_no_hold():
     )
 
 
+def test_set_del_blackhole_route():
+    dut = constructor()
+    intf_setup(dut)
+
+    test_set_del_blackhole_route.logs = []
+
+    with patch('staticroutebfd.main.log_info', new=lambda msg: test_set_del_blackhole_route.logs.append(msg)):
+        set_del_test(dut, "srt",
+            "SET",
+            ("2.2.2.0/24", {
+                "blackhole": "true",
+            }),
+            {},
+            {}
+        )
+
+        set_del_test(dut, "srt",
+            "DEL",
+            ("2.2.2.0/24", {
+                "blackhole": "true",
+            }),
+            {},
+            {}
+        )
+
+    assert "Blackholing static route encountered, skipping it" in test_set_del_blackhole_route.logs
+
+
+def test_set_del_ifname_only_route():
+    dut = constructor()
+    intf_setup(dut)
 
+    test_set_del_ifname_only_route.logs = []
+
+    with patch('staticroutebfd.main.log_warn', new=lambda msg: test_set_del_ifname_only_route.logs.append(msg)):
+        set_del_test(dut, "srt",
+            "SET",
+            ("2.2.2.0/24", {
+                "ifname": "if1,if2",
+            }),
+            {},
+            {}
+        )
+
+        set_del_test(dut, "srt",
+            "DEL",
+            ("2.2.2.0/24", {
+                "ifname": "if1,if2",
+            }),
+            {},
+            {}
+        )
+
+    assert "Static route bfd set Failed, nexthop, interface and vrf lists do not match or some of them is empty."\
+        in test_set_del_ifname_only_route.logs
diff --git a/src/sonic-bmp b/src/sonic-bmp
index 1971625cb2f..d880861b370 160000
--- a/src/sonic-bmp
+++ b/src/sonic-bmp
@@ -1 +1 @@
-Subproject commit 1971625cb2fa5a754af72f2d42e5731a173c2378
+Subproject commit d880861b370e7bf8ff8eacdc9b153ee6ff48fdbe
diff --git a/src/sonic-build-hooks/scripts/buildinfo_base.sh b/src/sonic-build-hooks/scripts/buildinfo_base.sh
index 9adcb1d3b50..fbc5ebb324b 100755
--- a/src/sonic-build-hooks/scripts/buildinfo_base.sh
+++ b/src/sonic-build-hooks/scripts/buildinfo_base.sh
@@ -256,7 +256,7 @@ download_packages()
         if [ $result -eq 0 ]; then
             break
         fi
-        log_err "Try $i: $REAL_COMMAND failed to get: ${parameters[@]}. Retry.."
+        log_err "Try $i: $REAL_COMMAND failed to get: ${parameters[*]}. Retry.."
     done
 
     # Return if there is any error
diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py
index 29bf298540a..b68bdb6923c 100644
--- a/src/sonic-config-engine/config_samples.py
+++ b/src/sonic-config-engine/config_samples.py
@@ -142,15 +142,24 @@ def generate_t1_smartswitch_switch_sample_config(data, ss_config):
 
         data['DHCP_SERVER_IPV4_PORT'] = dhcp_server_ports
 
+    data['NTP'] = {
+        "global": {
+            "server_role": "enabled"
+        }
+    }
+
     return data
 
 def generate_t1_smartswitch_dpu_sample_config(data, ss_config):
     data['DEVICE_METADATA']['localhost']['hostname'] = 'sonic'
     data['DEVICE_METADATA']['localhost']['switch_type'] = 'dpu'
-    data['DEVICE_METADATA']['localhost']['type'] = 'SonicDpu'
+    data['DEVICE_METADATA']['localhost']['type'] = 'SmartSwitchDPU'
     data['DEVICE_METADATA']['localhost']['subtype'] = 'SmartSwitch'
     data['DEVICE_METADATA']['localhost']['bgp_asn'] = '65100'
 
+    if "SYSTEM_DEFAULTS" not in data:
+        data["SYSTEM_DEFAULTS"] = {}
+
     for port in natsorted(data['PORT']):
         data['PORT'][port]['admin_status'] = 'up'
         data['PORT'][port]['mtu'] = '9100'
@@ -167,6 +176,34 @@ def generate_t1_smartswitch_dpu_sample_config(data, ss_config):
     crmconfig = data.setdefault('CRM', {}).setdefault('Config', {})
     crmconfig.update(dash_crm_thresholds)
 
+    if "pensando" in data['DEVICE_METADATA']['localhost']['hwsku'].lower():
+        data['SYSTEM_DEFAULTS'] = {
+            "polaris": {
+                "status": "enabled"
+            }
+        }
+
+    data["SYSTEM_DEFAULTS"]["software_bfd"] = {
+        "status": "enabled"
+    }
+
+    data['NTP_SERVER'] = {
+        "169.254.200.254": {
+            "iburst": "on"
+        }
+    }
+
+    data['NTP'] = {
+        "global": {
+            "admin_state": "enabled",
+            "authentication": "disabled",
+            "dhcp": "enabled",
+            "server_role": "disabled",
+            "src_intf": "eth0",
+            "vrf": "default"
+        }
+    }
+
     return data
 
 def generate_t1_smartswitch_sample_config(data):
diff --git a/src/sonic-config-engine/portconfig.py b/src/sonic-config-engine/portconfig.py
index 3d2bc55d023..52764f55efc 100644
--- a/src/sonic-config-engine/portconfig.py
+++ b/src/sonic-config-engine/portconfig.py
@@ -37,7 +37,7 @@
 BRKOUT_MODE = "default_brkout_mode"
 CUR_BRKOUT_MODE = "brkout_mode"
 INTF_KEY = "interfaces"
-OPTIONAL_HWSKU_ATTRIBUTES = ["fec", "autoneg", "role"]
+OPTIONAL_HWSKU_ATTRIBUTES = ["fec", "autoneg", "role", "subport"]
 
 BRKOUT_PATTERN = r'(\d{1,6})x(\d{1,6}G?)(\[(\d{1,6}G?,?)*\])?(\((\d{1,6})\))?'
 BRKOUT_PATTERN_GROUPS = 6
@@ -170,9 +170,10 @@ def get_fabric_port_config(hwsku=None, platform=None, fabric_port_config_file=No
 
 def get_port_config(hwsku=None, platform=None, port_config_file=None, hwsku_config_file=None, asic_name=None):
     config_db = db_connect_configdb(asic_name)
+    
+    config_db_hwsku = device_info.get_localhost_info('hwsku', config_db=config_db)
     # If available, Read from CONFIG DB first
-    if config_db is not None and port_config_file is None:
-
+    if config_db is not None and port_config_file is None and (hwsku is None or config_db_hwsku == hwsku):
         port_data = config_db.get_table("PORT")
         if bool(port_data):
             ports = ast.literal_eval(json.dumps(port_data))
@@ -374,12 +375,22 @@ def get_config(self):
 
                 lanes = self._lanes[lane_id:lane_id + lanes_per_port]
 
+                alias = self._breakout_capabilities[alias_id]
+                # If alias follows new SONiC port naming convention (e.g. et[sX]pY[abcd]),
+                # we can derive subport directly based on the breakout mode. Otherwise,
+                # fallback to the old method.
+                if m := re.match(r"et(s\d+)?p\d+([a-l])?", alias):
+                    breakout = m.groups()[-1]
+                    subport = "0" if not breakout else str(ord(breakout) - ord('a') + 1)
+                else:
+                    subport = "0" if total_num_ports == 1 else str(alias_id + 1)
+
                 ports[interface_name] = {
-                    'alias': self._breakout_capabilities[alias_id],
+                    'alias': alias,
                     'lanes': ','.join(lanes),
                     'speed': str(entry.default_speed),
                     'index': self._indexes[lane_id],
-                    'subport': "0" if total_num_ports == 1 else str(alias_id + 1)
+                    'subport': subport
                 }
 
                 lane_id += lanes_per_port
diff --git a/src/sonic-config-engine/setup.cfg b/src/sonic-config-engine/setup.cfg
new file mode 100644
index 00000000000..b7e478982cc
--- /dev/null
+++ b/src/sonic-config-engine/setup.cfg
@@ -0,0 +1,2 @@
+[aliases]
+test=pytest
diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen
index f892929c5ef..ab749acefd9 100755
--- a/src/sonic-config-engine/sonic-cfggen
+++ b/src/sonic-config-engine/sonic-cfggen
@@ -472,6 +472,8 @@ def main():
     if args.template_dir:
         paths.append(os.path.abspath(args.template_dir))
 
+    paths.append(os.path.abspath(os.path.join(os.path.dirname(__file__), '../../files/build_templates')))
+
     if args.template:
         for template_file, _ in args.template:
             paths.append(os.path.dirname(os.path.abspath(template_file)))
diff --git a/src/sonic-config-engine/tests/chrony.conf.j2 b/src/sonic-config-engine/tests/chrony.conf.j2
new file mode 120000
index 00000000000..9a0a8270102
--- /dev/null
+++ b/src/sonic-config-engine/tests/chrony.conf.j2
@@ -0,0 +1 @@
+../../../files/image_config/chrony/chrony.conf.j2
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/chrony.keys.j2 b/src/sonic-config-engine/tests/chrony.keys.j2
new file mode 120000
index 00000000000..1b9b69cc38c
--- /dev/null
+++ b/src/sonic-config-engine/tests/chrony.keys.j2
@@ -0,0 +1 @@
+../../../files/image_config/chrony/chrony.keys.j2
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/data/ntp/ntp_smartswitch_dpu_interfaces.json b/src/sonic-config-engine/tests/data/ntp/ntp_smartswitch_dpu_interfaces.json
new file mode 100644
index 00000000000..27953825ba2
--- /dev/null
+++ b/src/sonic-config-engine/tests/data/ntp/ntp_smartswitch_dpu_interfaces.json
@@ -0,0 +1,41 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "type": "SmartSwitchDPU",
+            "subtype": "SmartSwitch"
+        }
+    },
+
+    "NTP_SERVER": {
+        "169.254.200.254": {
+            "iburst": "on"
+        }
+    },
+    "NTP": {
+        "global": {
+            "admin_state": "enabled",
+            "authentication": "disabled",
+            "dhcp": "enabled",
+            "server_role": "disabled",
+            "src_intf": "eth0",
+            "vrf": "default"
+        }
+    },
+    "NTP_KEY": {
+        "1": {
+            "type": "md5",
+            "trusted": "no",
+            "value": "blabla"
+        },
+        "42": {
+            "type": "sha1",
+            "trusted": "yes",
+            "value": "the_answer"
+        }
+    },
+    "INTERFACE": {
+        "Ethernet0": {},
+        "Ethernet0|10.0.0.0/31": {},
+        "Ethernet0|192.168.0.122/24": {}
+    }
+}
diff --git a/src/sonic-config-engine/tests/data/ntp/ntp_smartswitch_interfaces.json b/src/sonic-config-engine/tests/data/ntp/ntp_smartswitch_interfaces.json
new file mode 100644
index 00000000000..a41d8f6542a
--- /dev/null
+++ b/src/sonic-config-engine/tests/data/ntp/ntp_smartswitch_interfaces.json
@@ -0,0 +1,60 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "type": "LeafRouter",
+            "subtype": "SmartSwitch"
+        }
+    },
+    "NTP": {
+        "global": {
+            "src_intf": "eth0",
+            "vrf": "default",
+            "authentication": "enabled",
+            "dhcp": "disabled",
+            "server_role": "enabled",
+            "admin_state": "enabled"
+        }
+    },
+    "NTP_SERVER": {
+        "my_ntp_server": {
+            "association_type": "server",
+            "iburst": "off",
+            "admin_state": "disabled",
+            "version": 3,
+            "resolve_as": "10.20.30.40"
+        },
+        "server2": {
+            "association_type": "server",
+            "iburst": "off",
+            "admin_state": "enabled",
+            "version": 3,
+            "resolve_as": "10.20.30.50",
+            "key": 42,
+            "trusted": "no"
+        },
+        "pool.ntp.org": {
+            "association_type": "pool",
+            "iburst": "on",
+            "admin_state": "enabled",
+            "version": 3,
+            "resolve_as": "pool.ntp.org"
+        }
+    },
+    "NTP_KEY": {
+        "1": {
+            "type": "md5",
+            "trusted": "no",
+            "value": "blabla"
+        },
+        "42": {
+            "type": "sha1",
+            "trusted": "yes",
+            "value": "the_answer"
+        }
+    },
+    "INTERFACE": {
+        "Ethernet0": {},
+        "Ethernet0|10.0.0.0/31": {},
+        "Ethernet0|192.168.0.122/24": {}
+    }
+}
diff --git a/src/sonic-config-engine/tests/mock_tables/asic0/config_db.json b/src/sonic-config-engine/tests/mock_tables/asic0/config_db.json
index ab29ea517ad..72eb40adaf8 100644
--- a/src/sonic-config-engine/tests/mock_tables/asic0/config_db.json
+++ b/src/sonic-config-engine/tests/mock_tables/asic0/config_db.json
@@ -94,5 +94,8 @@
         "role": "Int",
         "speed": "40000",
         "asic_port_name": "Eth7-ASIC0"
+    },
+    "DEVICE_METADATA|localhost": {
+        "hwsku" : "multi-npu-asic"
     }
 }
diff --git a/src/sonic-config-engine/tests/multi_npu_data/py2/ipinip.json b/src/sonic-config-engine/tests/multi_npu_data/py2/ipinip.json
index 94196a0a487..9ea24f21a88 100644
--- a/src/sonic-config-engine/tests/multi_npu_data/py2/ipinip.json
+++ b/src/sonic-config-engine/tests/multi_npu_data/py2/ipinip.json
@@ -2,7 +2,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
@@ -41,7 +41,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
diff --git a/src/sonic-config-engine/tests/multi_npu_data/py3/ipinip.json b/src/sonic-config-engine/tests/multi_npu_data/py3/ipinip.json
index 94196a0a487..9ea24f21a88 100644
--- a/src/sonic-config-engine/tests/multi_npu_data/py3/ipinip.json
+++ b/src/sonic-config-engine/tests/multi_npu_data/py3/ipinip.json
@@ -2,7 +2,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
@@ -41,7 +41,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
diff --git a/src/sonic-config-engine/tests/ntp.conf.j2 b/src/sonic-config-engine/tests/ntp.conf.j2
deleted file mode 120000
index bc52df834e2..00000000000
--- a/src/sonic-config-engine/tests/ntp.conf.j2
+++ /dev/null
@@ -1 +0,0 @@
-../../../files/image_config/ntp/ntp.conf.j2
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/ntp.keys.j2 b/src/sonic-config-engine/tests/ntp.keys.j2
deleted file mode 120000
index a95603db8be..00000000000
--- a/src/sonic-config-engine/tests/ntp.keys.j2
+++ /dev/null
@@ -1 +0,0 @@
-../../../files/image_config/ntp/ntp.keys.j2
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf
index 827b287e57f..5e94642bdf8 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf
@@ -60,7 +60,7 @@ router bgp 65100
   bmp stats interval 1000
   bmp monitor ipv4 unicast pre-policy
   bmp monitor ipv6 unicast pre-policy
-  bmp connect 127.0.0.1 port 5000 min-retry 1000 max-retry 2000
+  bmp connect 127.0.0.1 port 5000 min-retry 10000 max-retry 15000
 !
 !
   bgp router-id 10.1.0.32
diff --git a/src/sonic-config-engine/tests/sample_output/py2/chrony.conf b/src/sonic-config-engine/tests/sample_output/py2/chrony.conf
new file mode 120000
index 00000000000..bea8857385f
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/chrony.conf
@@ -0,0 +1 @@
+../py3/chrony.conf
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/sample_output/py2/chrony.keys b/src/sonic-config-engine/tests/sample_output/py2/chrony.keys
new file mode 120000
index 00000000000..3292bd003b1
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/chrony.keys
@@ -0,0 +1 @@
+../py3/chrony.keys
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/sample_output/py2/chrony_smartswitch.conf b/src/sonic-config-engine/tests/sample_output/py2/chrony_smartswitch.conf
new file mode 120000
index 00000000000..44de6cfe08a
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/chrony_smartswitch.conf
@@ -0,0 +1 @@
+../py3/chrony_smartswitch.conf
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-no-ip-helper.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-no-ip-helper.supervisord.conf
index 3e77a6db982..8c3fb3e6cf7 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-no-ip-helper.supervisord.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-no-ip-helper.supervisord.conf
@@ -84,7 +84,7 @@ stdout_syslog=true
 stderr_logfile=NONE
 stderr_syslog=true
 dependent_startup=true
-dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running 
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running
 
 [program:dhcprelayd]
 command=/usr/local/bin/dhcprelayd
diff --git a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf
index 83911f477d7..41ba9b02224 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf
@@ -96,7 +96,7 @@ stdout_syslog=true
 stderr_logfile=NONE
 stderr_syslog=true
 dependent_startup=true
-dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running 
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running
 
 [program:dhcpmon-Vlan2000]
 command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu Vlan1000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 -im eth0
@@ -108,7 +108,7 @@ stdout_syslog=true
 stderr_logfile=NONE
 stderr_syslog=true
 dependent_startup=true
-dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running 
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running
 
 [program:dhcprelayd]
 command=/usr/local/bin/dhcprelayd
diff --git a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay.supervisord.conf
index f88edb3e6c9..da2e48f4af0 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay.supervisord.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay.supervisord.conf
@@ -47,7 +47,7 @@ dependent_startup_wait_for=rsyslogd:running
 programs=dhcprelayd,dhcp6relay
 
 [program:isc-dhcpv4-relay-Vlan1000]
-command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan1000 -iu Vlan2000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 192.0.0.1 192.0.0.2
+command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan1000 -iu Vlan2000 -iu Vlan3000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 192.0.0.1 192.0.0.2
 priority=3
 autostart=false
 autorestart=false
@@ -59,7 +59,7 @@ dependent_startup=true
 dependent_startup_wait_for=start:exited
 
 [program:isc-dhcpv4-relay-Vlan2000]
-command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan2000 -iu Vlan1000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 192.0.0.3 192.0.0.4
+command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan2000 -iu Vlan1000 -iu Vlan3000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 192.0.0.3 192.0.0.4
 priority=3
 autostart=false
 autorestart=false
@@ -87,7 +87,7 @@ dependent_startup_wait_for=start:exited
 programs=dhcpmon-Vlan1000,dhcpmon-Vlan2000
 
 [program:dhcpmon-Vlan1000]
-command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 -im eth0
+command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu Vlan3000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 -im eth0
 priority=4
 autostart=false
 autorestart=false
@@ -96,10 +96,10 @@ stdout_syslog=true
 stderr_logfile=NONE
 stderr_syslog=true
 dependent_startup=true
-dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running 
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running
 
 [program:dhcpmon-Vlan2000]
-command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 -im eth0
+command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu Vlan3000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 -im eth0
 priority=4
 autostart=false
 autorestart=false
@@ -108,7 +108,7 @@ stdout_syslog=true
 stderr_logfile=NONE
 stderr_syslog=true
 dependent_startup=true
-dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running 
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running
 
 [program:dhcprelayd]
 command=/usr/local/bin/dhcprelayd
diff --git a/src/sonic-config-engine/tests/sample_output/py2/ipinip.json b/src/sonic-config-engine/tests/sample_output/py2/ipinip.json
index 755e954cfb5..952979986e8 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/ipinip.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/ipinip.json
@@ -2,7 +2,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
@@ -65,7 +65,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
diff --git a/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
index abcfa56eaea..33b6b986e42 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
@@ -2,7 +2,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_SUBNET" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
@@ -25,7 +25,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
@@ -88,7 +88,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_SUBNET_V6" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
@@ -97,7 +97,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
diff --git a/src/sonic-config-engine/tests/sample_output/py2/ntp.conf b/src/sonic-config-engine/tests/sample_output/py2/ntp.conf
deleted file mode 120000
index 5ebe399367a..00000000000
--- a/src/sonic-config-engine/tests/sample_output/py2/ntp.conf
+++ /dev/null
@@ -1 +0,0 @@
-../py3/ntp.conf
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/sample_output/py2/ntp.keys b/src/sonic-config-engine/tests/sample_output/py2/ntp.keys
deleted file mode 120000
index 5f1ab315e5a..00000000000
--- a/src/sonic-config-engine/tests/sample_output/py2/ntp.keys
+++ /dev/null
@@ -1 +0,0 @@
-../py3/ntp.keys
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
index 0761e4b2049..042f3ed16e3 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
index ad04eacbc8c..5eea029e8f8 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf
index 129a98e3c23..01a101daa54 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf
index a6cf1c42b07..e7898516bd5 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf
index 827b287e57f..5e94642bdf8 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf
@@ -60,7 +60,7 @@ router bgp 65100
   bmp stats interval 1000
   bmp monitor ipv4 unicast pre-policy
   bmp monitor ipv6 unicast pre-policy
-  bmp connect 127.0.0.1 port 5000 min-retry 1000 max-retry 2000
+  bmp connect 127.0.0.1 port 5000 min-retry 10000 max-retry 15000
 !
 !
   bgp router-id 10.1.0.32
diff --git a/src/sonic-config-engine/tests/sample_output/py3/chrony.conf b/src/sonic-config-engine/tests/sample_output/py3/chrony.conf
new file mode 100644
index 00000000000..3441a7033b9
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/chrony.conf
@@ -0,0 +1,69 @@
+###############################################################################
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by chrony-config.sh
+###############################################################################
+
+# Welcome to the chrony configuration file. See chrony.conf(5) for more
+# information about usable directives.
+
+# Include configuration files found in /etc/chrony/conf.d.
+confdir /etc/chrony/conf.d
+
+server 10.20.30.50 key 42 iburst version 3
+
+pool pool.ntp.org iburst version 3
+
+
+
+
+# Use time sources from DHCP.
+sourcedir /run/chrony-dhcp
+
+# Use NTP sources found in /etc/chrony/sources.d.
+sourcedir /etc/chrony/sources.d
+
+# This directive specify the location of the file containing ID/key pairs for
+# NTP authentication.
+keyfile /etc/chrony/chrony.keys
+
+# This directive specify the file into which chronyd will store the rate
+# information.
+driftfile /var/lib/chrony/chrony.drift
+
+# Save NTS keys and cookies.
+ntsdumpdir /var/lib/chrony
+
+# Uncomment the following line to turn logging on.
+#log tracking measurements statistics
+
+# Log files location.
+logdir /var/log/chrony
+
+# Stop bad estimates upsetting machine clock.
+maxupdateskew 100.0
+
+# This directive enables kernel synchronisation (every 11 minutes) of the
+# real-time clock. Note that it can’t be used along with the 'rtcfile' directive.
+#rtcsync
+
+# Instead of having the kernel manage the real-time clock, have chrony do this
+# instead. The reason for this is that if the system time and the real-time clock
+# are signficantly different from the actual time, then the system time must be
+# slewed, while the real-time clock can be stepped to the actual time. That way,
+# when the device next reboots (whether it be cold, warm, or fast), it will come
+# up with the actual time from the real-time clock.
+rtcfile /var/lib/chrony/rtc
+hwclockfile /etc/adjtime
+rtconutc
+rtcautotrim 15
+
+# Step the system clock instead of slewing it if the adjustment is larger than
+# one second, but only in the first three clock updates.
+#
+# Disabled because we don't want chrony to do any clock steps; it should only slew
+#makestep 1 3
+
+# Get TAI-UTC offset and leap seconds from the system tz database.
+# This directive must be commented out when using time sources serving
+# leap-smeared time.
+leapsectz right/UTC
diff --git a/src/sonic-config-engine/tests/sample_output/py3/chrony.keys b/src/sonic-config-engine/tests/sample_output/py3/chrony.keys
new file mode 100644
index 00000000000..3a9bb0cd7f7
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/chrony.keys
@@ -0,0 +1,8 @@
+###############################################################################
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by chrony-config.sh
+###############################################################################
+
+1 MD5 blabla 
+42 SHA1 the_answer 
+
diff --git a/src/sonic-config-engine/tests/sample_output/py3/chrony_smartswitch.conf b/src/sonic-config-engine/tests/sample_output/py3/chrony_smartswitch.conf
new file mode 100644
index 00000000000..fa425f8df7b
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/chrony_smartswitch.conf
@@ -0,0 +1,71 @@
+###############################################################################
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by chrony-config.sh
+###############################################################################
+
+# Welcome to the chrony configuration file. See chrony.conf(5) for more
+# information about usable directives.
+
+# Include configuration files found in /etc/chrony/conf.d.
+confdir /etc/chrony/conf.d
+
+server 10.20.30.50 key 42 iburst version 3
+
+pool pool.ntp.org iburst version 3
+
+allow
+binddevice bridge-midplane
+
+
+
+# Use time sources from DHCP.
+sourcedir /run/chrony-dhcp
+
+# Use NTP sources found in /etc/chrony/sources.d.
+sourcedir /etc/chrony/sources.d
+
+# This directive specify the location of the file containing ID/key pairs for
+# NTP authentication.
+keyfile /etc/chrony/chrony.keys
+
+# This directive specify the file into which chronyd will store the rate
+# information.
+driftfile /var/lib/chrony/chrony.drift
+
+# Save NTS keys and cookies.
+ntsdumpdir /var/lib/chrony
+
+# Uncomment the following line to turn logging on.
+#log tracking measurements statistics
+
+# Log files location.
+logdir /var/log/chrony
+
+# Stop bad estimates upsetting machine clock.
+maxupdateskew 100.0
+
+# This directive enables kernel synchronisation (every 11 minutes) of the
+# real-time clock. Note that it can’t be used along with the 'rtcfile' directive.
+#rtcsync
+
+# Instead of having the kernel manage the real-time clock, have chrony do this
+# instead. The reason for this is that if the system time and the real-time clock
+# are signficantly different from the actual time, then the system time must be
+# slewed, while the real-time clock can be stepped to the actual time. That way,
+# when the device next reboots (whether it be cold, warm, or fast), it will come
+# up with the actual time from the real-time clock.
+rtcfile /var/lib/chrony/rtc
+hwclockfile /etc/adjtime
+rtconutc
+rtcautotrim 15
+
+# Step the system clock instead of slewing it if the adjustment is larger than
+# one second, but only in the first three clock updates.
+#
+# Disabled because we don't want chrony to do any clock steps; it should only slew
+#makestep 1 3
+
+# Get TAI-UTC offset and leap seconds from the system tz database.
+# This directive must be commented out when using time sources serving
+# leap-smeared time.
+leapsectz right/UTC
diff --git a/src/sonic-config-engine/tests/sample_output/py3/chrony_smartswitch_dpu.conf b/src/sonic-config-engine/tests/sample_output/py3/chrony_smartswitch_dpu.conf
new file mode 100644
index 00000000000..01497461683
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/chrony_smartswitch_dpu.conf
@@ -0,0 +1,64 @@
+###############################################################################
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by chrony-config.sh
+###############################################################################
+
+# Welcome to the chrony configuration file. See chrony.conf(5) for more
+# information about usable directives.
+
+# Include configuration files found in /etc/chrony/conf.d.
+confdir /etc/chrony/conf.d
+
+server 169.254.200.254 iburst
+
+
+
+
+# Use time sources from DHCP.
+sourcedir /run/chrony-dhcp
+
+# Use NTP sources found in /etc/chrony/sources.d.
+sourcedir /etc/chrony/sources.d
+
+
+# This directive specify the file into which chronyd will store the rate
+# information.
+driftfile /var/lib/chrony/chrony.drift
+
+# Save NTS keys and cookies.
+ntsdumpdir /var/lib/chrony
+
+# Uncomment the following line to turn logging on.
+#log tracking measurements statistics
+
+# Log files location.
+logdir /var/log/chrony
+
+# Stop bad estimates upsetting machine clock.
+maxupdateskew 100.0
+
+# This directive enables kernel synchronisation (every 11 minutes) of the
+# real-time clock. Note that it can’t be used along with the 'rtcfile' directive.
+#rtcsync
+
+# Instead of having the kernel manage the real-time clock, have chrony do this
+# instead. The reason for this is that if the system time and the real-time clock
+# are signficantly different from the actual time, then the system time must be
+# slewed, while the real-time clock can be stepped to the actual time. That way,
+# when the device next reboots (whether it be cold, warm, or fast), it will come
+# up with the actual time from the real-time clock.
+rtcfile /var/lib/chrony/rtc
+hwclockfile /etc/adjtime
+rtconutc
+rtcautotrim 15
+
+# Step the system clock instead of slewing it if the adjustment is larger than
+# one second, but only in the first three clock updates.
+#
+# Disabled because we don't want chrony to do any clock steps; it should only slew
+#makestep 1 3
+
+# Get TAI-UTC offset and leap seconds from the system tz database.
+# This directive must be commented out when using time sources serving
+# leap-smeared time.
+leapsectz right/UTC
diff --git a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-no-ip-helper.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-no-ip-helper.supervisord.conf
index 5455e6fef31..1a8a300c1cc 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-no-ip-helper.supervisord.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-no-ip-helper.supervisord.conf
@@ -84,7 +84,7 @@ stdout_syslog=true
 stderr_logfile=NONE
 stderr_syslog=true
 dependent_startup=true
-dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running 
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running
 
 [program:dhcprelayd]
 command=/usr/local/bin/dhcprelayd
diff --git a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf
index 60c173b35e4..895f2cf020c 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf
@@ -96,7 +96,7 @@ stdout_syslog=true
 stderr_logfile=NONE
 stderr_syslog=true
 dependent_startup=true
-dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running 
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running
 
 [program:dhcpmon-Vlan2000]
 command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu Vlan1000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -im eth0
@@ -108,7 +108,7 @@ stdout_syslog=true
 stderr_logfile=NONE
 stderr_syslog=true
 dependent_startup=true
-dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running 
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running
 
 [program:dhcprelayd]
 command=/usr/local/bin/dhcprelayd
diff --git a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay.supervisord.conf
index 3a1c79da998..1b5cbabc9de 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay.supervisord.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay.supervisord.conf
@@ -47,7 +47,7 @@ dependent_startup_wait_for=rsyslogd:running
 programs=dhcprelayd,dhcp6relay
 
 [program:isc-dhcpv4-relay-Vlan1000]
-command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan1000 -iu Vlan2000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 192.0.0.1 192.0.0.2
+command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan1000 -iu Vlan2000 -iu Vlan3000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 192.0.0.1 192.0.0.2
 priority=3
 autostart=false
 autorestart=false
@@ -59,7 +59,7 @@ dependent_startup=true
 dependent_startup_wait_for=start:exited
 
 [program:isc-dhcpv4-relay-Vlan2000]
-command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan2000 -iu Vlan1000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 192.0.0.3 192.0.0.4
+command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan2000 -iu Vlan1000 -iu Vlan3000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 192.0.0.3 192.0.0.4
 priority=3
 autostart=false
 autorestart=false
@@ -87,7 +87,7 @@ dependent_startup_wait_for=start:exited
 programs=dhcpmon-Vlan1000,dhcpmon-Vlan2000
 
 [program:dhcpmon-Vlan1000]
-command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -im eth0
+command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu Vlan3000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -im eth0
 priority=4
 autostart=false
 autorestart=false
@@ -96,10 +96,10 @@ stdout_syslog=true
 stderr_logfile=NONE
 stderr_syslog=true
 dependent_startup=true
-dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running 
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running
 
 [program:dhcpmon-Vlan2000]
-command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -im eth0
+command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu Vlan3000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -im eth0
 priority=4
 autostart=false
 autorestart=false
@@ -108,7 +108,7 @@ stdout_syslog=true
 stderr_logfile=NONE
 stderr_syslog=true
 dependent_startup=true
-dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running 
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running
 
 [program:dhcprelayd]
 command=/usr/local/bin/dhcprelayd
diff --git a/src/sonic-config-engine/tests/sample_output/py3/ipinip.json b/src/sonic-config-engine/tests/sample_output/py3/ipinip.json
index 755e954cfb5..952979986e8 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/ipinip.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/ipinip.json
@@ -2,7 +2,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
@@ -65,7 +65,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
diff --git a/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json
index abcfa56eaea..33b6b986e42 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json
@@ -2,7 +2,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_SUBNET" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
@@ -25,7 +25,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
@@ -88,7 +88,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_SUBNET_V6" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
@@ -97,7 +97,7 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dscp_mode":"uniform",
+            "dscp_mode":"pipe",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
diff --git a/src/sonic-config-engine/tests/sample_output/py3/ntp.conf b/src/sonic-config-engine/tests/sample_output/py3/ntp.conf
deleted file mode 100644
index 412d06cfd4a..00000000000
--- a/src/sonic-config-engine/tests/sample_output/py3/ntp.conf
+++ /dev/null
@@ -1,41 +0,0 @@
-###############################################################################
-# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
-# Controlled by ntp-config.service
-###############################################################################
-
-# /etc/ntp.conf, configuration for ntpd; see ntp.conf(5) for help
-
-# To avoid ntpd from panic and exit if the drift between new time and
-# current system time is large.
-tinker panic 0
-
-driftfile /var/lib/ntpsec/ntp.drift
-leapfile /usr/share/zoneinfo/leap-seconds.list
-
-server 10.20.30.50 key 42 iburst version 3
-restrict 10.20.30.50 kod limited nomodify noquery
-
-pool pool.ntp.org iburst version 3
-restrict pool.ntp.org kod limited nomodify noquery
-
-
-keys /etc/ntpsec/ntp.keys
-trustedkey 42
-
-interface ignore wildcard
-
-
-
-interface listen eth0
-interface listen 127.0.0.1
-
-
-# Access control configuration
-# By default, exchange time with everybody, but don't allow configuration.
-# NTPsec doesn't establish peer associations, and so nopeer has no effect, and
-# has been removed from here
-restrict default kod nomodify noquery limited
-
-# Local users may interrogate the ntp server more closely.
-restrict 127.0.0.1
-restrict ::1
diff --git a/src/sonic-config-engine/tests/sample_output/py3/ntp.keys b/src/sonic-config-engine/tests/sample_output/py3/ntp.keys
deleted file mode 100644
index 4a1a37b693e..00000000000
--- a/src/sonic-config-engine/tests/sample_output/py3/ntp.keys
+++ /dev/null
@@ -1,8 +0,0 @@
-###############################################################################
-# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
-# Controlled by ntp-config.service
-###############################################################################
-
-1 md5 blabla 
-42 sha1 the_answer 
-
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json
index d3abbd4da38..87ee198f324 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json
@@ -114,6 +114,9 @@
         }
     },
     "PORT_QOS_MAP": {
+        "global": {
+            "dscp_to_tc_map"  : "AZURE"
+        },
         "Ethernet0": {
             "dscp_to_tc_map"  : "AZURE",
             "tc_to_queue_map" : "AZURE",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json
index c09f14c4bc9..ec9fef2772d 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json
@@ -180,6 +180,9 @@
         }
     },
     "PORT_QOS_MAP": {
+        "global": {
+            "dscp_to_tc_map"  : "AZURE"
+        },
         "Ethernet0": {
             "dscp_to_tc_map"  : "AZURE_UPLINK",
             "tc_to_queue_map" : "AZURE",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json
index 14cdb37ab99..50ac607b4e0 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json
@@ -287,6 +287,9 @@
         }
     },
     "PORT_QOS_MAP": {
+        "global": {
+            "dscp_to_tc_map"  : "AZURE"
+        },
 
         "Ethernet2": {
 
diff --git a/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf b/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf
index e62c29781bc..deb03a737d8 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf
@@ -43,12 +43,28 @@ $UDPServerRun 514
 $template SONiCFileFormat,"%timegenerated:::date-year% %timegenerated%.%timegenerated:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
 $ActionFileDefaultTemplate SONiCFileFormat
 $template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$template SONiCForwardFormatWithOsVersion,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME%   %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+
 $ActionForwardDefaultTemplate SONiCForwardFormat
 
+
 template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall time=\"%timereported\
 :::date-year%-%timereported:::date-month%-%timereported:::date-day% %timereported:::date-hour%:%timereported:::date-minute%:%timereported\
 :::date-second%\" fw=\"kvm-host\" pri=%syslogpriority% msg=\"%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\"\n")
 
+#
+# Remote syslog logging
+#
+
+# The omfwd plug-in provides the core functionality of traditional message
+# forwarding via UDP and plain TCP. It is a built-in module that does not need
+# to be loaded.
+
+
+
+*.*
+action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat")
+
 #
 # Set the default permissions for all log files.
 #
@@ -76,15 +92,3 @@ $RepeatedMsgReduction on
 ###############
 #### RULES ####
 ###############
-
-#
-# Remote syslog logging
-#
-
-# The omfwd plug-in provides the core functionality of traditional message
-# forwarding via UDP and plain TCP. It is a built-in module that does not need
-# to be loaded.
-
-*.*
-action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat")
-
diff --git a/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf b/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf
index 0c845227aa1..1bdfd0c3220 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf
@@ -45,12 +45,28 @@ $UDPServerRun 514
 $template SONiCFileFormat,"%timegenerated:::date-year% %timegenerated%.%timegenerated:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
 $ActionFileDefaultTemplate SONiCFileFormat
 $template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$template SONiCForwardFormatWithOsVersion,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME%   %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+
 $ActionForwardDefaultTemplate SONiCForwardFormat
 
+
 template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall time=\"%timereported\
 :::date-year%-%timereported:::date-month%-%timereported:::date-day% %timereported:::date-hour%:%timereported:::date-minute%:%timereported\
 :::date-second%\" fw=\"kvm-host\" pri=%syslogpriority% msg=\"%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\"\n")
 
+#
+# Remote syslog logging
+#
+
+# The omfwd plug-in provides the core functionality of traditional message
+# forwarding via UDP and plain TCP. It is a built-in module that does not need
+# to be loaded.
+
+
+
+*.*
+action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat")
+
 #
 # Set the default permissions for all log files.
 #
@@ -78,15 +94,3 @@ $RepeatedMsgReduction on
 ###############
 #### RULES ####
 ###############
-
-#
-# Remote syslog logging
-#
-
-# The omfwd plug-in provides the core functionality of traditional message
-# forwarding via UDP and plain TCP. It is a built-in module that does not need
-# to be loaded.
-
-*.*
-action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat")
-
diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
index a238f3362ad..38e73e3ef29 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
index 55576c57349..d59b436e152 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf
index dadb8972345..866d20a86ee 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf
index 3bdb18fbc56..9885089b08a 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
index 3bd84f20aa8..caf218b4d4a 100644
--- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
+++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
@@ -4,11 +4,16 @@
             "hwsku": "SS-DPU-1x400Gb",
             "hostname": "sonic",
             "switch_type": "dpu",
-            "type": "SonicDpu",
+            "type": "SmartSwitchDPU",
             "subtype": "SmartSwitch",
             "bgp_asn": "65100"
         }
     },
+    "SYSTEM_DEFAULTS": {
+        "software_bfd": {
+            "status": "enabled"
+        }
+    },
     "PORT": {
         "Ethernet0": {
             "lanes": "0,1,2,3,4,5,6,7",
@@ -72,5 +77,20 @@
             "dash_ipv6_acl_rule_low_threshold": "70",
             "dash_ipv6_acl_rule_high_threshold": "85"
         }
+    },
+    "NTP": {
+        "global": {
+            "admin_state": "enabled",
+            "authentication": "disabled",
+            "dhcp": "enabled",
+            "server_role": "disabled",
+            "src_intf": "eth0",
+            "vrf": "default"
+        }
+    },
+    "NTP_SERVER": {
+        "169.254.200.254": {
+            "iburst": "on"
+        }
     }
 }
diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
index 87036e755b9..fcc8e315d2c 100644
--- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
+++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
@@ -675,5 +675,10 @@
 			"mtu": "9100",
 			"speed": "100000"
 		}
+	},
+	"NTP": {
+		"global": {
+			"server_role": "enabled"
+		}
 	}
 }
diff --git a/src/sonic-config-engine/tests/t0-sample-graph-common-dhcp-relay.xml b/src/sonic-config-engine/tests/t0-sample-graph-common-dhcp-relay.xml
new file mode 100644
index 00000000000..31d78738233
--- /dev/null
+++ b/src/sonic-config-engine/tests/t0-sample-graph-common-dhcp-relay.xml
@@ -0,0 +1,957 @@
+<DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution" xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
+  <CpgDec>
+    <IsisRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <PeeringSessions>
+       <BGPSession>
+         <StartRouter>switch-t0</StartRouter>
+         <StartPeer>10.1.0.32</StartPeer>
+         <EndRouter>BGPMonitor</EndRouter>
+         <EndPeer>10.20.30.40</EndPeer>
+         <Multihop>30</Multihop>
+         <HoldTime>10</HoldTime>
+         <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.56</StartPeer>
+        <EndRouter>ARISTA01T1</EndRouter>
+        <EndPeer>10.0.0.57</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::71</StartPeer>
+        <EndRouter>ARISTA01T1</EndRouter>
+        <EndPeer>FC00::72</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.58</StartPeer>
+        <EndRouter>ARISTA02T1</EndRouter>
+        <EndPeer>10.0.0.59</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::75</StartPeer>
+        <EndRouter>ARISTA02T1</EndRouter>
+        <EndPeer>FC00::76</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.60</StartPeer>
+        <EndRouter>ARISTA03T1</EndRouter>
+        <EndPeer>10.0.0.61</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::79</StartPeer>
+        <EndRouter>ARISTA03T1</EndRouter>
+        <EndPeer>FC00::7A</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.62</StartPeer>
+        <EndRouter>ARISTA04T1</EndRouter>
+        <EndPeer>10.0.0.63</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::7D</StartPeer>
+        <EndRouter>ARISTA04T1</EndRouter>
+        <EndPeer>FC00::7E</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+    </PeeringSessions>
+    <Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:BGPRouterDeclaration>
+          <a:ASN>1</a:ASN>
+          <a:BgpGroups/>
+          <a:Hostname>BGPMonitor</a:Hostname>
+          <a:Peers>
+              <BGPPeer>
+                  <ElementType>BGPPeer</ElementType>
+                  <Address>10.1.0.32</Address>
+                  <RouteMapIn i:nil="true"/>
+                  <RouteMapOut i:nil="true"/>
+                  <Vrf i:nil="true"/>
+              </BGPPeer>
+          </a:Peers>
+          <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65100</a:ASN>
+        <a:Hostname>switch-t0</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <Address>10.0.0.57</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.59</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.61</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.63</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA01T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA02T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA03T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA04T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+    </Routers>
+  </CpgDec>
+  <DpgDec>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:LoopbackIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.1.0.32/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.1.0.32/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>HostIP1</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>FC00:1::32/128</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>FC00:1::32/128</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>LoopbackIP1</Name>
+          <AttachTo>Loopback1</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.10.0.99/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.10.0.99/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>LoopbackIP2</Name>
+          <AttachTo>Loopback2</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.21.0.64/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.21.0.64/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>LoopbackIP3</Name>
+          <AttachTo>Loopback3</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.21.64.2/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.21.64.2/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+       </LoopbackIPInterfaces>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:ManagementIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>eth0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.0.0.100/24</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.0.0.100/24</a:PrefixStr>
+        </a:ManagementIPInterface>
+        <a:ManagementIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>eth0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>2603:10e2:0:2902::8/64</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>2603:10e2:0:2902::8/64</a:PrefixStr>
+        </a:ManagementIPInterface>
+      </ManagementIPInterfaces>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>switch-t0</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <Name>PortChannel01</Name>
+          <AttachTo>fortyGigE0/112</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel02</Name>
+          <AttachTo>fortyGigE0/116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel03</Name>
+          <AttachTo>fortyGigE0/120</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel04</Name>
+          <AttachTo>fortyGigE0/124</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <VlanInterfaces>
+        <VlanInterface>
+          <Name>Vlan1000</Name>
+          <AttachTo>fortyGigE0/4;fortyGigE0/8;fortyGigE0/12;fortyGigE0/16;fortyGigE0/20;fortyGigE0/24;fortyGigE0/28;fortyGigE0/32;fortyGigE0/36;fortyGigE0/40;fortyGigE0/44;fortyGigE0/48;fortyGigE0/52;fortyGigE0/56;fortyGigE0/60;fortyGigE0/64;fortyGigE0/68;fortyGigE0/72;fortyGigE0/76;fortyGigE0/80;fortyGigE0/84;fortyGigE0/88;fortyGigE0/92;fortyGigE0/96</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type i:nil="true"/>
+          <DhcpRelays>192.0.0.1;192.0.0.2</DhcpRelays>
+          <Dhcpv6Relays>fc02:2000::1;fc02:2000::2</Dhcpv6Relays>
+          <VlanID>1000</VlanID>
+          <Tag>1000</Tag>
+          <Subnets>192.168.0.0/27</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+        <VlanInterface>
+          <Name>Vlan2000</Name>
+          <AttachTo>PortChannel01;PortChannel02;PortChannel03</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type i:nil="true"/>
+          <DhcpRelays>192.0.0.3;192.0.0.4</DhcpRelays>
+          <Dhcpv6Relays>fc02:2000::3;fc02:2000::4</Dhcpv6Relays>
+          <VlanID>2000</VlanID>
+          <Tag>2000</Tag>
+          <Subnets>192.168.200.0/27</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+        <VlanInterface>
+          <Name>Vlan3000</Name>
+          <AttachTo>PortChannel05;PortChannel06;PortChannel07</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type i:nil="true"/>
+          <Dhcpv6Relays>fc02:2000::3;fc02:2000::4</Dhcpv6Relays>
+          <VlanID>3000</VlanID>
+          <Tag>3000</Tag>
+          <Subnets>192.168.230.0/27</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+        <VlanInterface>
+          <Name>Vlan99</Name>
+          <AttachTo>fortyGigE0/100</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UserDefinedL2Vlan</Type>
+          <DhcpRelays>192.0.0.1;192.0.0.2</DhcpRelays>
+          <VlanID>99</VlanID>
+          <Tag>99</Tag>
+          <Subnets/>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+        <VlanInterface>
+          <Name>Vlan98</Name>
+          <AttachTo>fortyGigE0/100;PortChannel01;PortChannel03</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UserDefinedL2Vlan</Type>
+          <DhcpRelays>192.0.0.1;192.0.0.2</DhcpRelays>
+          <VlanID>98</VlanID>
+          <Tag>98</Tag>
+          <Subnets/>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel01</AttachTo>
+          <Prefix>10.0.0.56/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel01</AttachTo>
+          <Prefix>FC00::71/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel02</AttachTo>
+          <Prefix>10.0.0.58/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel02</AttachTo>
+          <Prefix>FC00::75/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel03</AttachTo>
+          <Prefix>10.0.0.60/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel03</AttachTo>
+          <Prefix>FC00::79/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel04</AttachTo>
+          <Prefix>10.0.0.62/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel04</AttachTo>
+          <Prefix>FC00::7D/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>Vlan1000</AttachTo>
+          <Prefix>192.168.0.1/27</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>Vlan2000</AttachTo>
+          <Prefix>192.168.200.1/27</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>Vlan3000</AttachTo>
+          <Prefix>192.168.230.1/27</Prefix>
+        </IPInterface>
+      </IPInterfaces>
+      <DataAcls/>
+      <AclInterfaces>
+        <AclInterface>
+          <AttachTo>ERSPAN</AttachTo>
+          <InAcl>everflow</InAcl>
+          <Type>Everflow</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>ERSPANv6</AttachTo>
+          <InAcl>everflowV6</InAcl>
+          <Type>Everflow</Type>
+        </AclInterface>
+	<AclInterface>
+          <AttachTo>EGRESS_ERSPAN</AttachTo>
+	  <OutAcl>everflow_egress</OutAcl>
+	  <Type>Everflow</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>PortChannel01;PortChannel02;PortChannel03;PortChannel04</AttachTo>
+          <InAcl>DataAclIngress</InAcl>
+          <Type>DataPlane</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>PortChannel01;PortChannel02;Vlan98</AttachTo>
+          <OutAcl>DataAclEgress</OutAcl>
+          <Type>DataPlane</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SNMP</AttachTo>
+          <InAcl>SNMP_ACL</InAcl>
+          <Type>SNMP</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>NTP</AttachTo>
+          <InAcl>NTP_ACL</InAcl>
+          <Type>NTP</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SSH</AttachTo>
+          <InAcl>SSH_ACL</InAcl>
+          <Type>SSH</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SSH</AttachTo>
+          <InAcl>ROUTER-PROTECT</InAcl>
+          <Type>SSH</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SNMP</AttachTo>
+          <InAcl>ROUTER-PROTECT</InAcl>
+          <Type>SNMP</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>NTP</AttachTo>
+          <InAcl>NTP_ACL</InAcl>
+        </AclInterface>
+      </AclInterfaces>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+  </DpgDec>
+  <PngDec>
+    <DeviceInterfaceLinks>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA01T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/112</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA02T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/116</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA03T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/120</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA04T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/124</StartPort>
+        <Bandwidth>100000</Bandwidth>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <EndDevice>switch-t0</EndDevice>
+        <EndPort>fortyGigE0/4</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA05T1</StartDevice>
+        <StartPort>Ethernet1/33</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>Servers0</EndDevice>
+        <EndPort>eth0</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/4</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>Servers100</EndDevice>
+        <EndPort>eth0</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/100</StartPort>
+      </DeviceLinkBase>
+    </DeviceInterfaceLinks>
+    <Devices>
+      <Device i:type="ToRRouter">
+        <Hostname>switch-t0</Hostname>
+        <HwSku>Force10-S6000</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA01T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA02T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA03T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA04T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+    </Devices>
+  </PngDec>
+  <DeviceInfos>
+    <DeviceInfo>
+      <EthernetInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet0</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet8</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet12</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet16</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet20</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet24</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet28</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet32</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet36</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet40</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet44</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet48</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet52</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet56</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet60</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet64</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet68</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet72</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet76</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet80</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet84</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet88</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet92</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet96</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet100</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet104</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet108</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet112</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet116</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet120</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+      </EthernetInterfaces>
+      <HwSku>Force10-S6000</HwSku>
+      <ManagementInterfaces/>
+    </DeviceInfo>
+  </DeviceInfos>
+  <MetadataDeclaration>
+    <Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:DeviceMetadata>
+        <a:Name>switch-t0</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ErspanDestinationIpv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>2.2.2.2</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+    </Devices>
+    <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </MetadataDeclaration>
+  <LinkMetadataDeclaration>
+    <Link xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:LinkMetadata>
+        <a:Name i:nil="true"/>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>AutoNegotiation</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>FECDisabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA05T1:Ethernet1/33;switch-t0:fortyGigE0/4</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name i:nil="true"/>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>AutoNegotiation</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>FECDisabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA06T1:Ethernet1/34;switch-t0:fortyGigE0/8</a:Key>
+      </a:LinkMetadata>
+    </Link>
+  </LinkMetadataDeclaration>
+<MetadataDeclaration>
+ <Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+  <a:DeviceMetadata>
+   <a:Name>switch-t0</a:Name>
+   <a:Properties>
+    <a:DeviceProperty>
+     <a:Name>DeploymentId</a:Name>
+     <a:Reference i:nil="true"/>
+     <a:Value>1</a:Value>
+    </a:DeviceProperty>
+  </a:Properties>
+  </a:DeviceMetadata>
+ </Devices>
+ <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+</MetadataDeclaration>
+  <Hostname>switch-t0</Hostname>
+  <HwSku>Force10-S6000</HwSku>
+</DeviceMiniGraph>
diff --git a/src/sonic-config-engine/tests/test_frr.py b/src/sonic-config-engine/tests/test_frr.py
index 5a7ca109b30..c8453c91a28 100644
--- a/src/sonic-config-engine/tests/test_frr.py
+++ b/src/sonic-config-engine/tests/test_frr.py
@@ -80,5 +80,5 @@ def test_zebra_frr_dualtor(self):
         self.assertTrue(*self.run_case('zebra/zebra.conf.j2', 'zebra_frr_dualtor.conf', extra_data=extra_data))
 
     def test_bgpd_frr_bmp(self):
-        extra_data = {"FEATURE": {"bmp": {"state": "enabled"}}}
+        extra_data = {"FEATURE": {"frr_bmp": {"state": "enabled"}}}
         self.assertTrue(*self.run_case('bgpd/bgpd.conf.j2', 'bgpd_frr_bmp.conf', extra_data=extra_data))
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index 30fc9f0e30b..111950c2a65 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -23,6 +23,7 @@ def setUp(self):
         self.t0_minigraph = os.path.join(self.test_dir, 't0-sample-graph.xml')
         self.t0_minigraph_syslog = os.path.join(self.test_dir, 't0-sample-graph-syslog.xml')
         self.t0_minigraph_secondary_subnets = os.path.join(self.test_dir, 't0-sample-graph-secondary-subnets.xml')
+        self.t0_minigraph_common_dhcp_relay = os.path.join(self.test_dir, 't0-sample-graph-common-dhcp-relay.xml')
         self.t0_mvrf_minigraph = os.path.join(self.test_dir, 't0-sample-graph-mvrf.xml')
         self.t0_minigraph_nomgmt = os.path.join(self.test_dir, 't0-sample-graph-nomgmt.xml')
         self.t0_minigraph_two_mgmt = os.path.join(self.test_dir, 't0-sample-graph-two-mgmt.xml')
@@ -172,7 +173,7 @@ def test_dhcp_relay(self):
         self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'wait_for_intf.sh'), self.output_file))
 
         template_path = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-dhcp-relay', 'docker-dhcp-relay.supervisord.conf.j2')
-        argument = ['-m', self.t0_minigraph, '-p', self.t0_port_config, '-t', template_path]
+        argument = ['-m', self.t0_minigraph_common_dhcp_relay, '-p', self.t0_port_config, '-t', template_path]
         self.run_script(argument, output_file=self.output_file)
         self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'docker-dhcp-relay.supervisord.conf'), self.output_file))
 
@@ -183,7 +184,7 @@ def test_dhcp_relay(self):
         self.run_script(argument, output_file=self.output_file)
         self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR,
                                                'docker-dhcp-relay-no-ip-helper.supervisord.conf'), self.output_file))
-        
+
         # Test generation of docker-dhcp-relay.supervisord.conf when a vlan has secondary subnets specified
         template_path = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-dhcp-relay',
                                      'docker-dhcp-relay.supervisord.conf.j2')
@@ -806,18 +807,36 @@ def test_ndppd_conf(self):
         assert utils.cmp(expected, self.output_file), self.run_diff(expected, self.output_file)
 
     def test_ntp_conf(self):
-        conf_template = os.path.join(self.test_dir, "ntp.conf.j2")
+        conf_template = os.path.join(self.test_dir, "chrony.conf.j2")
         config_db_ntp_json = os.path.join(self.test_dir, "data", "ntp", "ntp_interfaces.json")
-        expected = os.path.join(self.test_dir, "sample_output", utils.PYvX_DIR, "ntp.conf")
+        expected = os.path.join(self.test_dir, "sample_output", utils.PYvX_DIR, "chrony.conf")
+
+        argument = ['-j', config_db_ntp_json, '-t', conf_template]
+        self.run_script(argument, output_file=self.output_file)
+        assert utils.cmp(expected, self.output_file), self.run_diff(expected, self.output_file)
+
+    def test_ntp_smartswitch_conf(self):
+        conf_template = os.path.join(self.test_dir, "chrony.conf.j2")
+        config_db_ntp_json = os.path.join(self.test_dir, "data", "ntp", "ntp_smartswitch_interfaces.json")
+        expected = os.path.join(self.test_dir, "sample_output", utils.PYvX_DIR, "chrony_smartswitch.conf")
+
+        argument = ['-j', config_db_ntp_json, '-t', conf_template]
+        self.run_script(argument, output_file=self.output_file)
+        assert utils.cmp(expected, self.output_file), self.run_diff(expected, self.output_file)
+
+    def test_ntp_smartswitch_dpu_conf(self):
+        conf_template = os.path.join(self.test_dir, "chrony.conf.j2")
+        config_db_ntp_json = os.path.join(self.test_dir, "data", "ntp", "ntp_smartswitch_dpu_interfaces.json")
+        expected = os.path.join(self.test_dir, "sample_output", utils.PYvX_DIR, "chrony_smartswitch_dpu.conf")
 
         argument = ['-j', config_db_ntp_json, '-t', conf_template]
         self.run_script(argument, output_file=self.output_file)
         assert utils.cmp(expected, self.output_file), self.run_diff(expected, self.output_file)
 
     def test_ntp_keys(self):
-        conf_template = os.path.join(self.test_dir, "ntp.keys.j2")
+        conf_template = os.path.join(self.test_dir, "chrony.keys.j2")
         config_db_ntp_json = os.path.join(self.test_dir, "data", "ntp", "ntp_interfaces.json")
-        expected = os.path.join(self.test_dir, "sample_output", utils.PYvX_DIR, "ntp.keys")
+        expected = os.path.join(self.test_dir, "sample_output", utils.PYvX_DIR, "chrony.keys")
 
         argument = ['-j', config_db_ntp_json, '-t', conf_template]
         self.run_script(argument, output_file=self.output_file)
diff --git a/src/sonic-dash-api b/src/sonic-dash-api
index 0b33087d82c..817c0f42ac7 160000
--- a/src/sonic-dash-api
+++ b/src/sonic-dash-api
@@ -1 +1 @@
-Subproject commit 0b33087d82c2d297aadd75b2862fbd11a2fce386
+Subproject commit 817c0f42ac7d0b8b86f1cd578402c62e740d1960
diff --git a/src/sonic-dash-ha b/src/sonic-dash-ha
new file mode 160000
index 00000000000..91068cc0506
--- /dev/null
+++ b/src/sonic-dash-ha
@@ -0,0 +1 @@
+Subproject commit 91068cc05061a78181983666957f61cf205dcc35
diff --git a/src/sonic-device-data/Makefile b/src/sonic-device-data/Makefile
index 1c638325c97..daccac2a145 100644
--- a/src/sonic-device-data/Makefile
+++ b/src/sonic-device-data/Makefile
@@ -21,6 +21,12 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	mkdir ./device
 	cp -r -L ../../../device/*/* ./device/
 
+	if [ "$(CONFIGURED_PLATFORM)" = "mellanox" ]; then \
+		for sai_profile in `find device/ -name sai.profile | grep simx`; do \
+			echo SAI_KEY_IS_SIMX=1 >> $$sai_profile; \
+		done; \
+	fi;
+
 	# Create hwsku for virtual switch
 	for d in `find -L ../../../device -maxdepth 3 -mindepth 3 -type d | grep -vE "(plugins|led-code|sonic_platform)"`; do \
 		# check if hwsku dir exists, if yes, then continue
diff --git a/src/sonic-device-data/tests/media_checker b/src/sonic-device-data/tests/media_checker
index 9826914c504..73ac91f87da 100755
--- a/src/sonic-device-data/tests/media_checker
+++ b/src/sonic-device-data/tests/media_checker
@@ -11,7 +11,7 @@ si_param_list = ["preemphasis", "idriver", "ipredriver", \
                  "main", "pre1", "pre2", "pre3", \
                  "post1", "post2", "post3", "attn", \
                  "ob_m2lp", "ob_alev_out", "obplev", "obnlev", \
-                 "regn_bfm1p", "regn_bfm1n"]
+                 "regn_bfm1p", "regn_bfm1n", "unreliable_los", "interface_type"]
 lane_speed_key_prefix = 'speed:'
 lane_prefix = "lane"
 comma_separator = ","
@@ -71,9 +71,10 @@ def check_media_dict(vendor_dict):
                     return False
 
                 lane_dict = settings_dict[si_param]
-                for lanes in lane_dict:
-                    if not check_lane_and_value(lanes, lane_dict[lanes]):
-                        return False
+                if isinstance(lane_dict, dict):
+                    for lanes in lane_dict:
+                        if not check_lane_and_value(lanes, lane_dict[lanes]):
+                            return False
     return True
 
 def check_valid_port(port_name):
diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list
index e5dc1cd3da9..1b8d92d97ea 100644
--- a/src/sonic-device-data/tests/permitted_list
+++ b/src/sonic-device-data/tests/permitted_list
@@ -355,3 +355,4 @@ sai_mmu_tc_to_pg_config
 sai_hostif_netif_iff_up_set
 appl_param_active_links_thr_high
 appl_param_active_links_thr_low
+custom_feature_start_tx_threshold
diff --git a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
index 8f9ab2f3221..4a26e643d4c 100755
--- a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
+++ b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
@@ -75,7 +75,7 @@ def extract_cmd_daemons(cmd_str):
 class BgpdClientMgr(threading.Thread):
     VTYSH_MARK = 'vtysh '
     PROXY_SERVER_ADDR = '/etc/frr/bgpd_client_sock'
-    ALL_DAEMONS = ['bgpd', 'zebra', 'staticd', 'bfdd', 'ospfd', 'pimd']
+    ALL_DAEMONS = ['bgpd', 'zebra', 'staticd', 'bfdd', 'ospfd', 'pimd', 'mgmtd']
     TABLE_DAEMON = {
             'DEVICE_METADATA': ['bgpd'],
             'BGP_GLOBALS': ['bgpd'],
@@ -118,7 +118,10 @@ class BgpdClientMgr(threading.Thread):
             'PIM_INTERFACE': ['pimd'],
             'IGMP_INTERFACE': ['pimd'],
             'IGMP_INTERFACE_QUERY': ['pimd'],
-            'SRV6_LOCATOR': ['zebra']
+            'SRV6_MY_LOCATORS': ['zebra'],
+            'SRV6_MY_SOURCE': ['zebra'],
+            'SRV6_MY_SIDS': ['mgmtd']
+
     }
     VTYSH_CMD_DAEMON = [(r'show (ip|ipv6) route($|\s+\S+)', ['zebra']),
                         (r'show ip mroute($|\s+\S+)', ['pimd']),
@@ -402,46 +405,6 @@ def get_command_cmn(daemon, cmd_str, op, st_idx, vals, bool_values):
         cmd_args.append(CommandArgument(daemon, cmd_enable, vals[idx]))
     return [cmd_str.format(*cmd_args, no = CommandArgument(daemon, cmd_enable))]
 
-def hdl_srv6_locator(daemon, cmd_str, op, st_idx, vals, bool_values):
-    chk_val = None
-    if op == CachedDataWithOp.OP_DELETE:
-        if bool_values is not None and len(bool_values) >= 3:
-            # set to default if given
-            cmd_enable = bool_values[2]
-        else:
-            cmd_enable = False
-    else:
-        cmd_enable = True
-        if bool_values is not None:
-            if len(vals) <= st_idx:
-                return None
-            chk_val = vals[st_idx]
-            if type(chk_val) is dict:
-                cmd_enable = False
-                for _, v in chk_val.items():
-                    if not v[1]:
-                        continue
-                    if v[0] == bool_values[0]:
-                        cmd_enable = True
-                        break
-            else:
-                if chk_val == bool_values[0]:
-                    cmd_enable = True
-                elif chk_val == bool_values[1]:
-                    cmd_enable = False
-                else:
-                    return None
-        else:
-            cmd_enable = True
-    cmd_list = []
-    for num in range(len(vals[0])):
-        cmd_args = []
-        for idx in range(len(vals)):
-            if bool_values is not None and idx == st_idx:
-                continue
-            cmd_args.append(CommandArgument(daemon, cmd_enable, vals[idx][num]))
-        cmd_list.append(cmd_str.format(*cmd_args, no = CommandArgument(daemon, cmd_enable)))
-    return cmd_list
 
 def hdl_set_extcomm(daemon, cmd_str, op, st_idx, args, is_inline):
     if is_inline:
@@ -1483,6 +1446,56 @@ def hdl_static_route(daemon, cmd_str, op, st_idx, args, data):
     daemon.upd_nh_set = ip_nh_set
     return cmd_list
 
+def hdl_admin_status(daemon, cmd_str, op, st_idx, args, data):
+    if len(args) < 1:
+        return None
+
+    cmd_list = []
+    status = args[st_idx]
+
+    # Convert up/down to true/false if needed
+    if status == 'up':
+        status = 'true'
+    elif status == 'down':
+        status = 'false'
+    elif status not in ['true', 'false']:
+        return None
+
+    # For delete operation, treat as 'false'
+    if op == CachedDataWithOp.OP_DELETE:
+        status = 'false'
+
+    # Apply the command with appropriate no prefix
+    cmd_list.append(cmd_str.format(
+        CommandArgument(daemon, True, args[0]),
+        no=CommandArgument(daemon, (status == 'true'))))
+
+    return cmd_list
+
+def hdl_admin_status_shutdown_msg(daemon, cmd_str, op, st_idx, args, data):
+    if len(args) < 2:
+        return None
+
+    cmd_list = []
+    status = args[st_idx]
+    shutdown_msg = args[st_idx + 1] if op != CachedDataWithOp.OP_DELETE else ""
+
+    # Convert up/down to true/false if needed
+    if status == 'up':
+        status = 'true'
+    elif status == 'down':
+        status = 'false'
+    elif status not in ['true', 'false']:
+        return None
+
+    # Apply the command with appropriate no prefix
+    cmd_list.append(cmd_str.format(
+        CommandArgument(daemon, True, args[0]),
+        CommandArgument(daemon, True, shutdown_msg),
+        no=CommandArgument(daemon, (status == 'false'))).rstrip())
+
+    return cmd_list
+
 class ExtConfigDBConnector(ConfigDBConnector):
     def __init__(self, ns_attrs = None):
         super(ExtConfigDBConnector, self).__init__()
@@ -1760,7 +1773,7 @@ class BGPConfigDaemon:
     DEFAULT_VRF = 'default'
 
     global_key_map = [('router_id',                                     '{no:no-prefix}bgp router-id {}'),
-                      ('srv6_locator',                                  '{no:no-prefix}srv6-locator {}'),
+                      ('sid_vpn_per_vrf_export_explicit',               '{no:no-prefix}sid vpn per-vrf export explicit', ['true', 'false']),
                       (['load_balance_mp_relax', '+as_path_mp_as_set'], '{no:no-prefix}bgp bestpath as-path multipath-relax {:mp-as-set}', ['true', 'false']),
                       ('always_compare_med',                            '{no:no-prefix}bgp always-compare-med', ['true', 'false']),
                       ('external_compare_router_id',                    '{no:no-prefix}bgp bestpath compare-routerid', ['true', 'false']),
@@ -1844,7 +1857,7 @@ class BGPConfigDaemon:
     cmn_key_map = [('asn&peer_type',                        '{no:no-prefix}neighbor {} remote-as {}'),
                    (['local_asn', '+local_as_no_prepend',
                      '+local_as_replace_as'],               '{no:no-prefix}neighbor {} local-as {} {:no-prepend} {:replace-as}'),
-                   (['admin_status', '+shutdown_message'],  '{no:no-prefix}neighbor {} shutdown {:shutdown-msg}', ['false', 'true']),
+                   (['admin_status', '+shutdown_message'],  '{no:no-prefix}neighbor {} shutdown {:shutdown-msg}', hdl_admin_status_shutdown_msg),
                    ('local_addr',                           '{no:no-prefix}neighbor {} update-source {}'),
                    ('name',                                 '{no:no-prefix}neighbor {} description {}'),
                    (['ebgp_multihop', '+ebgp_multihop_ttl'],'{no:no-prefix}neighbor {} ebgp-multihop {}', ['true', 'false']),
@@ -1871,9 +1884,9 @@ class BGPConfigDaemon:
     nbr_key_map = [('peer_group_name',  '{no:no-prefix}neighbor {} peer-group {}')]
 
     nbr_af_key_map = [(['allow_as_in', '+allow_as_count&allow_as_origin'],  '{no:no-prefix}neighbor {} allowas-in {:allow-as-in}', ['true', 'false']),
-                      ('admin_status|ipv4',                                 '{no:no-prefix}neighbor {} activate', ['true', 'false', False]),
-                      ('admin_status|ipv6',                                 '{no:no-prefix}neighbor {} activate', ['true', 'false', False]),
-                      ('admin_status|l2vpn',                                '{no:no-prefix}neighbor {} activate', ['true', 'false', False]),
+                      ('admin_status|ipv4',                                 '{no:no-prefix}neighbor {} activate', hdl_admin_status),
+                      ('admin_status|ipv6',                                 '{no:no-prefix}neighbor {} activate', hdl_admin_status),
+                      ('admin_status|l2vpn',                                '{no:no-prefix}neighbor {} activate', hdl_admin_status),
                       (['send_default_route', '+default_rmap'],             '{no:no-prefix}neighbor {} default-originate {:default-rmap}', ['true', 'false']),
                       ('default_rmap',                                      '{no:no-prefix}neighbor {} default-originate route-map {}'),
                       (['max_prefix_limit', '++max_prefix_warning_threshold',
@@ -2079,7 +2092,6 @@ class BGPConfigDaemon:
                              ('icmo_ttl', 'ttl {}', handle_ip_sla_common),
                              ('icmp_tos', 'tos {}', handle_ip_sla_common),
                            ]
-    srv6_locator_key_map = [(['opcode_prefix', 'opcode_act', 'opcode_data'], '{no:no-prefix}opcode {} {} {}', hdl_srv6_locator)]
 
 
     tbl_to_key_map = {'BGP_GLOBALS':                    global_key_map,
@@ -2110,7 +2122,6 @@ class BGPConfigDaemon:
                       'PIM_INTERFACE':                  pim_interface_key_map,
                       'IGMP_INTERFACE':                 igmp_mcast_grp_key_map,
                       'IGMP_INTERFACE_QUERY':           igmp_interface_config_key_map,
-                      'SRV6_LOCATOR':                   srv6_locator_key_map,
     }
 
     vrf_tables = {'BGP_GLOBALS', 'BGP_GLOBALS_AF',
@@ -2308,7 +2319,9 @@ def __init__(self):
             ('PIM_INTERFACE', self.bgp_table_handler_common),
             ('IGMP_INTERFACE', self.bgp_table_handler_common),
             ('IGMP_INTERFACE_QUERY', self.bgp_table_handler_common),
-            ('SRV6_LOCATOR', self.bgp_table_handler_common),
+            ('SRV6_MY_LOCATORS', self.bgp_table_handler_common),
+            ('SRV6_MY_SOURCE', self.bgp_table_handler_common),
+            ('SRV6_MY_SIDS', self.bgp_table_handler_common),
         ]
         self.bgp_message = queue.Queue(0)
         self.table_data_cache = self.config_db.get_table_data([tbl for tbl, _ in self.table_handler_list])
@@ -2689,6 +2702,14 @@ def __update_bgp(self, data_list):
                         syslog.syslog(syslog.LOG_ERR, 'local ASN for VRF %s was not configured' % vrf)
                         continue
                     cmd_prefix = ['configure terminal', 'router bgp {} vrf {}'.format(local_asn, vrf)]
+                    if 'srv6_locator' in data:
+                        cmd =  "vtysh -c 'configure terminal' "
+                        cmd += " -c 'router bgp {} vrf {}' ".format(local_asn, vrf)
+                        cmd += " -c 'segment-routing srv6' "
+                        cmd += " -c 'locator {}' ".format(data['srv6_locator'].data)
+                        if not self.__run_command(table, cmd):
+                            syslog.syslog(syslog.LOG_ERR, 'failed running SRV6 POLICY config command')
+                            continue
                     if not key_map.run_command(self, table, data, cmd_prefix):
                         syslog.syslog(syslog.LOG_ERR, 'failed running BGP global config command')
                         continue
@@ -2696,17 +2717,45 @@ def __update_bgp(self, data_list):
                         self.bgp_confed_peers[vrf] = copy.copy(self.upd_confed_peers)
                 else:
                     self.__delete_vrf_asn(vrf, table, data)
-            elif table == 'SRV6_LOCATOR':
-                key = prefix
-                prefix = data['prefix']
-                cmd_prefix = ['configure terminal', 'segment-routing', 'srv6', 'locators', 
-                              'locator {}'.format(key), 
-                              'prefix {} block-len {} node-len {} func-bits {}'.format(prefix.data, data['block_len'].data, data['node_len'].data, data['func_len'].data)]
-                
-                if not key_map.run_command(self, table, data, cmd_prefix):
-                    syslog.syslog(syslog.LOG_ERR, 'failed running SRV6 LOCATOR config command')
+            elif table == 'SRV6_MY_LOCATORS':
+                if key is None:
+                    syslog.syslog(syslog.LOG_ERR, 'invalid key for SRV6_MY_LOCATORS table')
                     continue
-            
+                if not del_table:
+                    key = prefix
+                    prefix = data['prefix']
+                    cmd =  "vtysh -c 'configure terminal' -c 'segment-routing' -c 'srv6' -c 'locators' "
+                    cmd += " -c 'locator {}' ".format(key)
+                    cmd += " -c 'prefix {} block-len {} node-len {} func-bits {}' ".format(prefix.data, data['block_len'].data, data['node_len'].data, data['func_len'].data)
+                    if not self.__run_command(table, cmd):
+                        syslog.syslog(syslog.LOG_ERR, 'failed running SRV6 POLICY config command')
+                        continue
+            elif table == 'SRV6_MY_SOURCE':
+                source = data['source-address']
+                cmd =  "vtysh -c 'configure terminal' -c 'segment-routing' -c 'srv6' -c 'encapsulation' "
+                cmd += " -c 'source-address {}' ".format(source.data)
+                if not self.__run_command(table, cmd):
+                    syslog.syslog(syslog.LOG_ERR, 'failed running SRV6 encap config command {}'.format(cmd))
+                    continue
+            elif table == 'SRV6_MY_SIDS':
+                if key is None:
+                    syslog.syslog(syslog.LOG_ERR, 'invalid key for SRV6_MY_SIDS table')
+                    continue
+                if not del_table:
+                    cmd = "vtysh -c 'configure terminal' -c 'segment-routing' -c 'srv6' "
+                    cmd +="-c 'static-sids' "
+                    uDTAction = ["uDT46", "uDT4", "uDT6"]
+                    if data['action'].data in uDTAction:
+                        cmd +="-c 'sid {} locator {} behavior {} vrf {}' ".format(key, prefix, data['action'].data, data['decap_vrf'].data)
+                    elif data['action'].data == 'uN':
+                        cmd +="-c 'sid {} locator {} behavior {} ' ".format(key, prefix, data['action'].data)
+                    else:
+                        syslog.syslog(syslog.LOG_ERR, 'failed running SRV6 POLICY config command, not support action %s'.format(data['action'].data))
+                        continue
+                    if not self.__run_command(table, cmd):
+                        syslog.syslog(syslog.LOG_ERR, 'failed running SRV6 SRV6_MY_SIDS config command')
+                        continue
+
             elif table == 'BGP_GLOBALS_AF':
                 af, ip_type = key.lower().split('_')
                 #this is to temporarily make table cache key accessible to key_map handler function
diff --git a/src/sonic-frr-mgmt-framework/templates/bgpd/bgpd.conf.db.nbr_af.j2 b/src/sonic-frr-mgmt-framework/templates/bgpd/bgpd.conf.db.nbr_af.j2
index 8afb64e991c..62bd9ae40bc 100644
--- a/src/sonic-frr-mgmt-framework/templates/bgpd/bgpd.conf.db.nbr_af.j2
+++ b/src/sonic-frr-mgmt-framework/templates/bgpd/bgpd.conf.db.nbr_af.j2
@@ -2,7 +2,7 @@
 {# this is called with the "vrf" and "address-family matched    #}
 {# ------------------------------------------------------------ #}
 {% if 'admin_status' in n_af_val %}
-{% if n_af_val['admin_status'] == 'true' %}
+{% if n_af_val['admin_status'] in ['true', 'up'] %}
   neighbor {{nbr_name}} activate
 {% else %}
   no neighbor {{nbr_name}} activate
diff --git a/src/sonic-frr-mgmt-framework/templates/bgpd/bgpd.conf.db.nbr_or_peer.j2 b/src/sonic-frr-mgmt-framework/templates/bgpd/bgpd.conf.db.nbr_or_peer.j2
index 8fc5e061ad5..a31f561c7d5 100644
--- a/src/sonic-frr-mgmt-framework/templates/bgpd/bgpd.conf.db.nbr_or_peer.j2
+++ b/src/sonic-frr-mgmt-framework/templates/bgpd/bgpd.conf.db.nbr_or_peer.j2
@@ -30,7 +30,7 @@
 {% if 'name' in nbr_or_peer %}
  neighbor {{name_or_ip}} description {{nbr_or_peer['name']}}
 {% endif %}
-{% if 'admin_status' in nbr_or_peer and nbr_or_peer['admin_status'] == 'false' %}
+{% if 'admin_status' in nbr_or_peer and nbr_or_peer['admin_status'] in ['false', 'down'] %}
 {% if 'shutdown_message' in nbr_or_peer %}
  neighbor {{name_or_ip}} shutdown message {{nbr_or_peer['shutdown_message']}}
 {% else %}
diff --git a/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2 b/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2
index 391e5d581ce..481fd903a3b 100644
--- a/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2
+++ b/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2
@@ -10,9 +10,18 @@
 !
 agentx
 !
-！Add fpm address for zebra
+{% if ( ('localhost' in DEVICE_METADATA) and ('nexthop_group' in  DEVICE_METADATA['localhost']) and
+        (DEVICE_METADATA['localhost']['nexthop_group'] == 'enabled') ) %}
+! enable next hop group support
+fpm use-next-hop-groups
+{% else %}
+! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
+no fpm use-next-hop-groups
+{% endif %}
+!
+! Add fpm address for zebra
 fpm address 127.0.0.1
-！
+!
 {% include "zebra/zebra.interfaces.conf.j2" %}
 !
 {% if MGMT_VRF_CONFIG %}
diff --git a/src/sonic-frr-mgmt-framework/tests/test_config.py b/src/sonic-frr-mgmt-framework/tests/test_config.py
index 6339adcf38c..e973f771292 100644
--- a/src/sonic-frr-mgmt-framework/tests/test_config.py
+++ b/src/sonic-frr-mgmt-framework/tests/test_config.py
@@ -99,7 +99,7 @@ def hdl_confed_peers_cmd(is_del, cmd_list, chk_data):
 conf_bgp_cmd = lambda vrf, asn: [conf_cmd, 'router bgp %d vrf %s' % (asn, vrf)]
 conf_no_bgp_cmd = lambda vrf, asn: [conf_cmd, 'no router bgp %d%s' % (asn, '' if vrf == 'default' else ' vrf %s' % vrf)]
 conf_bgp_dft_cmd = lambda vrf, asn: conf_bgp_cmd(vrf, asn) + ['no bgp default ipv4-unicast']
-conf_bgp_af_cmd = lambda vrf, asn, af: conf_bgp_cmd(vrf, asn) + ['address-family %s unicast' % af]
+conf_bgp_af_cmd = lambda vrf, asn, af: conf_bgp_cmd(vrf, asn) + ['address-family %s %s' % (af, 'evpn' if af == 'l2vpn' else 'unicast')]
 
 bgp_globals_data = [
         CmdMapTestInfo('BGP_GLOBALS', 'default', {'local_asn': 100},
@@ -151,9 +151,76 @@ def hdl_confed_peers_cmd(is_del, cmd_list, chk_data):
                        conf_bgp_af_cmd('Vrf_red', 200, 'ipv6') + ['{}import vrf route-map test_map']),
 ]
 
+# Add admin status test cases for BGP_NEIGHBOR_AF and BGP_PEER_GROUP_AF
+address_families = ['ipv4', 'ipv6', 'l2vpn']
+admin_states = [
+    ('true', '{}neighbor {} activate'),
+    ('false', '{}no neighbor {} activate'),
+    ('up', '{}neighbor {} activate'),
+    ('down', '{}no neighbor {} activate')
+]
+
+def create_af_test_data(table_name):
+    # Start with BGP globals setup
+    test_data = [
+        CmdMapTestInfo('BGP_GLOBALS', 'default',
+                      {'local_asn': '100'},
+                      conf_bgp_dft_cmd('default', 100),
+                      ignore_tail=None)
+    ]
+    for af in address_families:
+        af_key = f"{af}_{'evpn' if af == 'l2vpn' else 'unicast'}"
+        if af == 'ipv4':
+            entries = [('PG_IPV4_1', 'default')] if table_name == 'BGP_PEER_GROUP_AF' else \
+                      [('10.0.0.1', 'default')]
+        elif af == 'ipv6':
+            entries = [('PG_IPV6_1', 'default')] if table_name == 'BGP_PEER_GROUP_AF' else \
+                      [('2001:db8::1', 'default')]
+        else:  # l2vpn case
+            entries = [('PG_EVPN_1', 'default')] if table_name == 'BGP_PEER_GROUP_AF' else \
+                      [('10.0.0.1', 'default')]
+
+        for entry, vrf in entries:
+            for status, cmd_template in admin_states:
+                test_data.append(
+                    CmdMapTestInfo(
+                        table_name,
+                        f'{vrf}|{entry}|{af_key}',
+                        {'admin_status': status},
+                        conf_bgp_af_cmd(vrf, 100, af) + [cmd_template.format('', entry)]
+                    )
+                )
+    return test_data
+
+# Create test data for both neighbor and peer group AF
+neighbor_af_data = create_af_test_data('BGP_NEIGHBOR_AF')
+peer_group_af_data = create_af_test_data('BGP_PEER_GROUP_AF')
+
+# Create test data for neighbor shutdown
+neighbor_shutdown_data = [
+    # Set up BGP globals first
+    CmdMapTestInfo('BGP_GLOBALS', 'default',
+                  {'local_asn': '100'},
+                  conf_bgp_dft_cmd('default', 100),
+                  ignore_tail=None),
+    # Then add neighbor shutdown configuration
+    CmdMapTestInfo('BGP_NEIGHBOR', 'default|10.1.1.1',
+                  {'admin_status': 'down', 'shutdown_message': 'maintenance'},
+                  conf_bgp_cmd('default', 100) + ['{}neighbor 10.1.1.1 shutdown message maintenance']),
+    CmdMapTestInfo('BGP_NEIGHBOR', 'default|10.1.1.2',
+                  {'admin_status': 'false', 'shutdown_message': 'planned outage'},
+                  conf_bgp_cmd('default', 100) + ['{}neighbor 10.1.1.2 shutdown message planned outage']),
+    CmdMapTestInfo('BGP_NEIGHBOR', 'default|10.1.1.4',
+                  {'admin_status': 'up'},
+                  conf_bgp_cmd('default', 100) + ['{}no neighbor 10.1.1.4 shutdown']),
+    CmdMapTestInfo('BGP_NEIGHBOR', 'default|10.1.1.5',
+                  {'admin_status': 'true'},
+                  conf_bgp_cmd('default', 100) + ['{}no neighbor 10.1.1.5 shutdown'])
+]
+
 @patch.dict('sys.modules', **mockmapping)
 @patch('frrcfgd.frrcfgd.g_run_command')
-def data_set_del_test(test_data, run_cmd):
+def data_set_del_test(test_data, run_cmd, skip_del=False):
     from frrcfgd.frrcfgd import BGPConfigDaemon
     daemon = BGPConfigDaemon()
     data_buf = {}
@@ -165,6 +232,10 @@ def data_set_del_test(test_data, run_cmd):
         CmdMapTestInfo.add_test_data(test)
         hdlr[0](test.table_name, test.key, CmdMapTestInfo.get_test_data(test))
         test.check_running_cmd(run_cmd, False)
+
+    if skip_del:
+        return
+
     # delete data in reverse direction
     for test in reversed(test_data):
         if test.no_del:
@@ -178,3 +249,18 @@ def data_set_del_test(test_data, run_cmd):
 
 def test_bgp_globals():
     data_set_del_test(bgp_globals_data)
+
+def test_bgp_neighbor_af():
+    # The neighbor AF test cases explicitly verify delete behavior, so skip the delete
+    # verification data_set_del_test (else it would try the del of 'no ' commands as well and fail)
+    data_set_del_test(neighbor_af_data, skip_del=True)
+
+def test_bgp_peer_group_af():
+    # The peer group AF test cases explicitly verify delete behavior, so skip the delete
+    # verification data_set_del_test (else it would try the del of 'no ' commands as well and fail)
+    data_set_del_test(peer_group_af_data, skip_del=True)
+
+def test_bgp_neighbor_shutdown():
+    # The neighbor shutdown msg test cases explicitly verify delete behavior, so skip the delete
+    # verification data_set_del_test (else it would try the del of 'no ' commands as well and fail)
+    data_set_del_test(neighbor_shutdown_data, skip_del=True)
diff --git a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
index a177dce773d..5dfa7634be0 100644
--- a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
+++ b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
@@ -75,10 +75,16 @@
 #define FPM_HEADER_SIZE 4
 
 /* Default SRv6 SID format values */
-DEFAULT_SRV6_LOCALSID_FORMAT_BLOCK_LEN = 32;
-DEFAULT_SRV6_LOCALSID_FORMAT_NODE_LEN = 16;
-DEFAULT_SRV6_LOCALSID_FORMAT_FUNCTION_LEN = 16;
-DEFAULT_SRV6_LOCALSID_FORMAT_ARGUMENT_LEN = 0;
+#define DEFAULT_SRV6_LOCALSID_FORMAT_BLOCK_LEN 32
+#define DEFAULT_SRV6_LOCALSID_FORMAT_NODE_LEN 16
+#define DEFAULT_SRV6_LOCALSID_FORMAT_FUNCTION_LEN 16
+#define DEFAULT_SRV6_LOCALSID_FORMAT_ARGUMENT_LEN 0
+
+/*
+ * Time in seconds that if the other end is not responding
+ * something terrible has gone wrong.  Let's fix that.
+ */
+#define DPLANE_FPM_NL_WEDGIE_TIME 15
 
 /**
  * Custom Netlink TLVs
@@ -162,6 +168,8 @@ enum custom_rtattr_srv6_localsid_action {
 
 static const char *prov_name = "dplane_fpm_sonic";
 
+static atomic_bool fpm_cleaning_up;
+
 struct fpm_nl_ctx {
 	/* data plane connection. */
 	int socket;
@@ -192,6 +200,7 @@ struct fpm_nl_ctx {
 	struct event *t_event;
 	struct event *t_nhg;
 	struct event *t_dequeue;
+	struct event *t_wedged;
 
 	/* zebra events. */
 	struct event *t_lspreset;
@@ -531,6 +540,16 @@ static void fpm_connect(struct event *t);
 
 static void fpm_reconnect(struct fpm_nl_ctx *fnc)
 {
+	bool cleaning_p = false;
+
+	/* This is being called in the FPM pthread: ensure we don't deadlock
+	 * with similar code that may be run in the main pthread.
+	 */
+	if (!atomic_compare_exchange_strong_explicit(
+		    &fpm_cleaning_up, &cleaning_p, true, memory_order_seq_cst,
+		    memory_order_seq_cst))
+		return;
+
 	/* Cancel all zebra threads first. */
 	event_cancel_async(zrouter.master, &fnc->t_lspreset, NULL);
 	event_cancel_async(zrouter.master, &fnc->t_lspwalk, NULL);
@@ -558,6 +577,12 @@ static void fpm_reconnect(struct fpm_nl_ctx *fnc)
 	EVENT_OFF(fnc->t_read);
 	EVENT_OFF(fnc->t_write);
 
+	/* Reset the barrier value */
+	cleaning_p = true;
+	atomic_compare_exchange_strong_explicit(
+		&fpm_cleaning_up, &cleaning_p, false, memory_order_seq_cst,
+		memory_order_seq_cst);
+
 	/* FPM is disabled, don't attempt to connect. */
 	if (fnc->disabled)
 		return;
@@ -576,6 +601,7 @@ static void fpm_read(struct event *t)
 	struct zebra_dplane_ctx *ctx;
 	size_t available_bytes;
 	size_t hdr_available_bytes;
+	int ival;
 
 	/* Let's ignore the input at the moment. */
 	rv = stream_read_try(fnc->ibuf, fnc->socket,
@@ -667,14 +693,6 @@ static void fpm_read(struct event *t)
 		hdr_available_bytes = fpm.msg_len - FPM_MSG_HDR_LEN;
 		available_bytes -= hdr_available_bytes;
 
-		/* Sanity check: must be at least header size. */
-		if (hdr->nlmsg_len < sizeof(*hdr)) {
-			zlog_warn(
-				"%s: [seq=%u] invalid message length %u (< %zu)",
-				__func__, hdr->nlmsg_seq, hdr->nlmsg_len,
-				sizeof(*hdr));
-			continue;
-		}
 		if (hdr->nlmsg_len > fpm.msg_len) {
 			zlog_warn(
 				"%s: Received a inner header length of %u that is greater than the fpm total length of %u",
@@ -704,17 +722,36 @@ static void fpm_read(struct event *t)
 
 		switch (hdr->nlmsg_type) {
 		case RTM_NEWROUTE:
+			/* Sanity check: need at least route msg header size. */
+			if (hdr->nlmsg_len < sizeof(struct rtmsg)) {
+				zlog_warn("%s: [seq=%u] invalid message length %u (< %zu)",
+					  __func__, hdr->nlmsg_seq,
+					  hdr->nlmsg_len, sizeof(struct rtmsg));
+				break;
+			}
+
+			/* Parse the route data into a dplane ctx, then
+ 			 * enqueue it to zebra for processing.
+ 			 */
 			ctx = dplane_ctx_alloc();
 			dplane_ctx_route_init(ctx, DPLANE_OP_ROUTE_NOTIFY, NULL,
  					      NULL);
-			if (netlink_route_change_read_unicast_internal(
-				    hdr, 0, false, ctx) != 1) {
-				dplane_ctx_fini(&ctx);
-				stream_pulldown(fnc->ibuf);
+
+			if (netlink_route_notify_read_ctx(hdr, 0, ctx) >= 0) {
+				/* In the FPM encoding, the vrfid is present */
+				ival = dplane_ctx_get_table(ctx);
+				dplane_ctx_set_vrf(ctx, ival);
+				dplane_ctx_set_table(ctx,
+								ZEBRA_ROUTE_TABLE_UNKNOWN);
+	
+					dplane_provider_enqueue_to_zebra(ctx);
+			} else {
 				/*
 				 * Let's continue to read other messages
 				 * Even if we ignore this one.
 				 */
+				dplane_ctx_fini(&ctx);
+ 				stream_pulldown(fnc->ibuf);
 			}
 			break;
 		default:
@@ -2130,6 +2167,7 @@ static ssize_t netlink_sidlist_msg_encode(int cmd,
 	return NLMSG_ALIGN(req->n.nlmsg_len);
 }
 
+#define DPLANE_FPM_NL_BUF_SIZE 65536
 /**
  * Encode data plane operation context into netlink and enqueue it in the FPM
  * output buffer.
@@ -2140,7 +2178,7 @@ static ssize_t netlink_sidlist_msg_encode(int cmd,
  */
 static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
 {
-	uint8_t nl_buf[NL_PKT_BUF_SIZE];
+	uint8_t nl_buf[DPLANE_FPM_NL_BUF_SIZE];
 	size_t nl_buf_len;
 	ssize_t rv;
 	uint64_t obytes, obytes_peak;
@@ -2169,8 +2207,6 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
 
 	nl_buf_len = 0;
 
-	frr_mutex_lock_autounlock(&fnc->obuf_mutex);
-
 	switch (op) {
 	case DPLANE_OP_ROUTE_UPDATE:
 	case DPLANE_OP_ROUTE_DELETE:
@@ -2388,6 +2424,8 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
 	/* We must know if someday a message goes beyond 65KiB. */
 	assert((nl_buf_len + FPM_HEADER_SIZE) <= UINT16_MAX);
 
+	frr_mutex_lock_autounlock(&fnc->obuf_mutex);
+
 	/* Check if we have enough buffer space. */
 	if (STREAM_WRITEABLE(fnc->obuf) < (nl_buf_len + FPM_HEADER_SIZE)) {
 		atomic_fetch_add_explicit(&fnc->counters.buffer_full, 1,
@@ -2771,6 +2809,18 @@ static void fpm_rmac_reset(struct event *t)
 			 &fnc->t_rmacwalk);
 }
 
+static void fpm_process_wedged(struct event *t)
+{
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
+
+	zlog_warn("%s: Connection unable to write to peer for over %u seconds, resetting",
+		  __func__, DPLANE_FPM_NL_WEDGIE_TIME);
+
+	atomic_fetch_add_explicit(&fnc->counters.connection_errors, 1,
+				  memory_order_relaxed);
+	FPM_RECONNECT(fnc);
+}
+
 static void fpm_process_queue(struct event *t)
 {
 	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
@@ -2779,8 +2829,14 @@ static void fpm_process_queue(struct event *t)
 	uint64_t processed_contexts = 0;
 
 	while (true) {
+		size_t writeable_amount;
+
+		frr_with_mutex (&fnc->obuf_mutex) {
+			writeable_amount = STREAM_WRITEABLE(fnc->obuf);
+		}
+
 		/* No space available yet. */
-		if (STREAM_WRITEABLE(fnc->obuf) < NL_PKT_BUF_SIZE) {
+		if (writeable_amount < DPLANE_FPM_NL_BUF_SIZE) {
 			no_bufs = true;
 			break;
 		}
@@ -2813,9 +2869,17 @@ static void fpm_process_queue(struct event *t)
 				  processed_contexts, memory_order_relaxed);
 
 	/* Re-schedule if we ran out of buffer space */
-	if (no_bufs)
-		event_add_timer(fnc->fthread->master, fpm_process_queue,
-				 fnc, 0, &fnc->t_dequeue);
+	if (no_bufs) {
+		if (processed_contexts)
+			event_add_event(fnc->fthread->master, fpm_process_queue, fnc, 0,
+					&fnc->t_dequeue);
+		else
+			event_add_timer_msec(fnc->fthread->master, fpm_process_queue, fnc, 10,
+					     &fnc->t_dequeue);
+		event_add_timer(fnc->fthread->master, fpm_process_wedged, fnc,
+				DPLANE_FPM_NL_WEDGIE_TIME, &fnc->t_wedged);
+	} else
+		EVENT_OFF(fnc->t_wedged);
 
 	/*
 	 * Let the dataplane thread know if there are items in the
@@ -2823,7 +2887,7 @@ static void fpm_process_queue(struct event *t)
 	 * until the dataplane thread gets scheduled for new,
 	 * unrelated work.
 	 */
-	if (dplane_provider_out_ctx_queue_len(fnc->prov) > 0)
+	if (processed_contexts)
 		dplane_provider_work_ready();
 }
 
@@ -2899,8 +2963,8 @@ static int fpm_nl_start(struct zebra_dplane_provider *prov)
 	fnc = dplane_provider_get_data(prov);
 	fnc->fthread = frr_pthread_new(NULL, prov_name, prov_name);
 	assert(frr_pthread_run(fnc->fthread, NULL) == 0);
-	fnc->ibuf = stream_new(NL_PKT_BUF_SIZE);
-	fnc->obuf = stream_new(NL_PKT_BUF_SIZE * 128);
+	fnc->ibuf = stream_new(DPLANE_FPM_NL_BUF_SIZE);
+	fnc->obuf = stream_new(DPLANE_FPM_NL_BUF_SIZE * 128);
 	pthread_mutex_init(&fnc->obuf_mutex, NULL);
 	fnc->socket = -1;
 	fnc->disabled = true;
@@ -2916,6 +2980,16 @@ static int fpm_nl_start(struct zebra_dplane_provider *prov)
 
 static int fpm_nl_finish_early(struct fpm_nl_ctx *fnc)
 {
+	bool cleaning_p = false;
+
+	/* This is being called in the main pthread: ensure we don't deadlock
+	 * with similar code that may be run in the FPM pthread.
+	 */
+	if (!atomic_compare_exchange_strong_explicit(
+		    &fpm_cleaning_up, &cleaning_p, true, memory_order_seq_cst,
+		    memory_order_seq_cst))
+		return 0;
+
 	/* Disable all events and close socket. */
 	EVENT_OFF(fnc->t_lspreset);
 	EVENT_OFF(fnc->t_lspwalk);
@@ -2936,6 +3010,12 @@ static int fpm_nl_finish_early(struct fpm_nl_ctx *fnc)
 		fnc->socket = -1;
 	}
 
+	/* Reset the barrier value */
+	cleaning_p = true;
+	atomic_compare_exchange_strong_explicit(
+		&fpm_cleaning_up, &cleaning_p, false, memory_order_seq_cst,
+		memory_order_seq_cst);
+
 	return 0;
 }
 
@@ -3027,8 +3107,8 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
 				      peak_queue, memory_order_relaxed);
 
 	if (cur_queue > 0)
-		event_add_timer(fnc->fthread->master, fpm_process_queue,
-				 fnc, 0, &fnc->t_dequeue);
+		event_add_event(fnc->fthread->master, fpm_process_queue, fnc, 0,
+				&fnc->t_dequeue);
 
 	/* Ensure dataplane thread is rescheduled if we hit the work limit */
 	if (counter >= limit)
diff --git a/src/sonic-frr/frr b/src/sonic-frr/frr
index 3fbd709d888..85cf1ed576d 160000
--- a/src/sonic-frr/frr
+++ b/src/sonic-frr/frr
@@ -1 +1 @@
-Subproject commit 3fbd709d888ab94db178e44a5b9d67c3653e0b17
+Subproject commit 85cf1ed576deed121751e16a64970f8a652a9e1e
diff --git a/src/sonic-frr/patch/0001-Reduce-severity-of-Vty-connected-from-message.patch b/src/sonic-frr/patch/0001-Reduce-severity-of-Vty-connected-from-message.patch
index 3aafe4c93d0..4417f4cf241 100644
--- a/src/sonic-frr/patch/0001-Reduce-severity-of-Vty-connected-from-message.patch
+++ b/src/sonic-frr/patch/0001-Reduce-severity-of-Vty-connected-from-message.patch
@@ -7,10 +7,10 @@ Subject: [PATCH] From 15274a197e4d3b7ac0f11ca63a5274f1168739f5 Mon Sep 17
 
 
 diff --git a/lib/vty.c b/lib/vty.c
-index ab98ac14e..c32fc13ba 100644
+index 1d04e75bf..ecbbd73db 100644
 --- a/lib/vty.c
 +++ b/lib/vty.c
-@@ -1843,7 +1843,7 @@ static void vty_accept(struct thread *thread)
+@@ -1968,7 +1968,7 @@ static void vty_accept(struct event *thread)
  		zlog_info("can't set sockopt to vty_sock : %s",
  			  safe_strerror(errno));
  
diff --git a/src/sonic-frr/patch/0002-Allow-BGP-attr-NEXT_HOP-to-be-0.0.0.0-due-to-allevia.patch b/src/sonic-frr/patch/0002-Allow-BGP-attr-NEXT_HOP-to-be-0.0.0.0-due-to-allevia.patch
index f80a3d5d5e4..d4a34b46f78 100644
--- a/src/sonic-frr/patch/0002-Allow-BGP-attr-NEXT_HOP-to-be-0.0.0.0-due-to-allevia.patch
+++ b/src/sonic-frr/patch/0002-Allow-BGP-attr-NEXT_HOP-to-be-0.0.0.0-due-to-allevia.patch
@@ -7,19 +7,19 @@ Subject: [PATCH] From afff474c79e0c177e090d1b45d68c9f816a52e3e Mon Sep 17
 
 
 diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index f4dff0d80..f00c54c40 100644
+index 39172cc08..9d96a3e43 100644
 --- a/bgpd/bgp_route.c
 +++ b/bgpd/bgp_route.c
-@@ -3835,8 +3835,7 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi,
+@@ -4719,8 +4719,7 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi,
+ 	 * E.g.: IPv6 prefix can be with nexthop: 0.0.0.0, and mp_nexthop: fc00::1.
+ 	 */
+ 	if (CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_NEXT_HOP)))
+-		nh_invalid = (attr->nexthop.s_addr == INADDR_ANY ||
+-			      !ipv4_unicast_valid(&attr->nexthop) ||
++		nh_invalid = (!ipv4_unicast_valid(&attr->nexthop) ||
+ 			      bgp_nexthop_self(bgp, afi, type, stype, attr, dest));
  
- 	/* If NEXT_HOP is present, validate it. */
- 	if (attr->flag & ATTR_FLAG_BIT(BGP_ATTR_NEXT_HOP)) {
--		if (attr->nexthop.s_addr == INADDR_ANY ||
--		    !ipv4_unicast_valid(&attr->nexthop) ||
-+		if (!ipv4_unicast_valid(&attr->nexthop) ||
- 		    bgp_nexthop_self(bgp, afi, type, stype, attr, dest))
- 			return true;
- 	}
+ 	/* If MP_NEXTHOP is present, validate it. */
 -- 
 2.17.1
 
diff --git a/src/sonic-frr/patch/0003-nexthops-compare-vrf-only-if-ip-type.patch b/src/sonic-frr/patch/0003-nexthops-compare-vrf-only-if-ip-type.patch
index 1d5b89a30f7..c0f88cb6959 100644
--- a/src/sonic-frr/patch/0003-nexthops-compare-vrf-only-if-ip-type.patch
+++ b/src/sonic-frr/patch/0003-nexthops-compare-vrf-only-if-ip-type.patch
@@ -6,10 +6,10 @@ Subject: [PATCH] From 786087468520db44c55e3566f77438b41f52763f Mon Sep 17
 
 
 diff --git a/lib/nexthop.c b/lib/nexthop.c
-index 248acd270..7ebc4fefb 100644
+index c377b9cb0..6fe45b2c5 100644
 --- a/lib/nexthop.c
 +++ b/lib/nexthop.c
-@@ -140,12 +140,6 @@ static int _nexthop_cmp_no_labels(const struct nexthop *next1,
+@@ -143,12 +143,6 @@ static int _nexthop_cmp_no_labels(const struct nexthop *next1,
  {
  	int ret = 0;
  
@@ -22,7 +22,7 @@ index 248acd270..7ebc4fefb 100644
  	if (next1->type < next2->type)
  		return -1;
  
-@@ -161,6 +155,12 @@ static int _nexthop_cmp_no_labels(const struct nexthop *next1,
+@@ -166,6 +160,12 @@ static int _nexthop_cmp_no_labels(const struct nexthop *next1,
  	switch (next1->type) {
  	case NEXTHOP_TYPE_IPV4:
  	case NEXTHOP_TYPE_IPV6:
@@ -36,10 +36,10 @@ index 248acd270..7ebc4fefb 100644
  		if (ret != 0)
  			return ret;
 diff --git a/lib/zclient.c b/lib/zclient.c
-index 07c7e5aea..0082b2148 100644
+index 5deea8f0c..28e9da721 100644
 --- a/lib/zclient.c
 +++ b/lib/zclient.c
-@@ -869,12 +869,6 @@ static int zapi_nexthop_cmp_no_labels(const struct zapi_nexthop *next1,
+@@ -976,12 +976,6 @@ static int zapi_nexthop_cmp_no_labels(const struct zapi_nexthop *next1,
  {
  	int ret = 0;
  
@@ -52,7 +52,7 @@ index 07c7e5aea..0082b2148 100644
  	if (next1->type < next2->type)
  		return -1;
  
-@@ -890,6 +884,12 @@ static int zapi_nexthop_cmp_no_labels(const struct zapi_nexthop *next1,
+@@ -997,6 +991,12 @@ static int zapi_nexthop_cmp_no_labels(const struct zapi_nexthop *next1,
  	switch (next1->type) {
  	case NEXTHOP_TYPE_IPV4:
  	case NEXTHOP_TYPE_IPV6:
diff --git a/src/sonic-frr/patch/0004-frr-remove-frr-log-outchannel-to-var-log-frr.log.patch b/src/sonic-frr/patch/0004-frr-remove-frr-log-outchannel-to-var-log-frr.log.patch
index 6936e36100a..1c6e56dddd4 100644
--- a/src/sonic-frr/patch/0004-frr-remove-frr-log-outchannel-to-var-log-frr.log.patch
+++ b/src/sonic-frr/patch/0004-frr-remove-frr-log-outchannel-to-var-log-frr.log.patch
@@ -9,10 +9,10 @@ Subject: [PATCH] From 0417036a3aece862c95111d4646ca7508a028165 Mon Sep 17
 
 
 diff --git a/tools/etc/rsyslog.d/45-frr.conf b/tools/etc/rsyslog.d/45-frr.conf
-index 75b20d76b..9cdd55762 100644
+index ef37d66d8..2e8e1e12d 100644
 --- a/tools/etc/rsyslog.d/45-frr.conf
 +++ b/tools/etc/rsyslog.d/45-frr.conf
-@@ -2,29 +2,6 @@
+@@ -2,30 +2,6 @@
  # to /var/log/frr/frr.log, then drops the message so it does
  # not also go to /var/log/syslog, so the messages are not duplicated
  
@@ -25,6 +25,7 @@ index 75b20d76b..9cdd55762 100644
 -    $programname == 'isisd' or
 -    $programname == 'fabricd' or
 -    $programname == 'ldpd' or
+-    $programname == 'mgmtd' or
 -    $programname == 'nhrpd' or
 -    $programname == 'ospf6d' or
 -    $programname == 'ospfd' or
diff --git a/src/sonic-frr/patch/0005-Add-support-of-bgp-l3vni-evpn.patch b/src/sonic-frr/patch/0005-Add-support-of-bgp-l3vni-evpn.patch
index c2c04f0ff3d..bcc35ed2d66 100644
--- a/src/sonic-frr/patch/0005-Add-support-of-bgp-l3vni-evpn.patch
+++ b/src/sonic-frr/patch/0005-Add-support-of-bgp-l3vni-evpn.patch
@@ -11,10 +11,10 @@ Signed-off-by: Kishore Kunal <kishore.kunal@broadcom.com>
 Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
 
 diff --git a/lib/nexthop.c b/lib/nexthop.c
-index c03d37487a..52679388fd 100644
+index 6fe45b2c5..527248a74 100644
 --- a/lib/nexthop.c
 +++ b/lib/nexthop.c
-@@ -814,6 +814,7 @@ void nexthop_copy_no_recurse(struct nexthop *copy,
+@@ -851,6 +851,7 @@ void nexthop_copy_no_recurse(struct nexthop *copy,
  	memcpy(&copy->rmap_src, &nexthop->rmap_src, sizeof(nexthop->rmap_src));
  	memcpy(&copy->rmac, &nexthop->rmac, sizeof(nexthop->rmac));
  	copy->rparent = rparent;
@@ -23,10 +23,10 @@ index c03d37487a..52679388fd 100644
  		nexthop_add_labels(copy, nexthop->nh_label_type,
  				   nexthop->nh_label->num_labels,
 diff --git a/lib/nexthop.h b/lib/nexthop.h
-index f35cc5e4e2..f6fb6ec2b7 100644
+index cea7c77e3..65056cd55 100644
 --- a/lib/nexthop.h
 +++ b/lib/nexthop.h
-@@ -66,6 +66,11 @@ enum nh_encap_type {
+@@ -52,6 +52,11 @@ enum nh_encap_type {
  /* Backup index value is limited */
  #define NEXTHOP_BACKUP_IDX_MAX 255
  
@@ -38,7 +38,7 @@ index f35cc5e4e2..f6fb6ec2b7 100644
  /* Nexthop structure. */
  struct nexthop {
  	struct nexthop *next;
-@@ -137,7 +142,7 @@ struct nexthop {
+@@ -147,7 +152,7 @@ struct nexthop {
  	/* Encapsulation information. */
  	enum nh_encap_type nh_encap_type;
  	union {
@@ -48,26 +48,25 @@ index f35cc5e4e2..f6fb6ec2b7 100644
  
  	/* EVPN router's MAC.
 diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index 79d79d74be..325199eff9 100644
+index d696b1985..f12b324e0 100644
 --- a/zebra/rt_netlink.c
 +++ b/zebra/rt_netlink.c
-@@ -1969,6 +1969,7 @@ static int netlink_route_nexthop_encap(struct nlmsghdr *n, size_t nlen,
- 				       struct nexthop *nh)
+@@ -2131,6 +2131,7 @@ static int netlink_route_nexthop_encap(bool fpm, struct nlmsghdr *n,
+ 				       size_t nlen, const struct nexthop *nh)
  {
  	struct rtattr *nest;
 +	struct vxlan_nh_encap* encap_data;
  
- 	switch (nh->nh_encap_type) {
- 	case NET_VXLAN:
-@@ -1979,9 +1980,21 @@ static int netlink_route_nexthop_encap(struct nlmsghdr *n, size_t nlen,
+ 	if (!fpm)
+ 		return true;
+@@ -2144,8 +2145,20 @@ static int netlink_route_nexthop_encap(bool fpm, struct nlmsghdr *n,
  		if (!nest)
  			return false;
  
+-		if (!nl_attr_put32(n, nlen, 0 /* VXLAN_VNI */, nh->nh_encap.vni))
 +		encap_data = &nh->nh_encap.encap_data;
 +
- 		if (!nl_attr_put32(n, nlen, 0 /* VXLAN_VNI */,
--				   nh->nh_encap.vni))
-+				   encap_data->vni))
++		if (!nl_attr_put32(n, nlen, 0 /* VXLAN_VNI */, encap_data->vni))
 +			return false;
 +
 +		if (ZEBRA_DEBUG_KERNEL)
@@ -83,10 +82,10 @@ index 79d79d74be..325199eff9 100644
  		break;
  	}
 diff --git a/zebra/zapi_msg.c b/zebra/zapi_msg.c
-index 68bb9783f8..c478f83795 100644
+index e9d554ba3..239b9472b 100644
 --- a/zebra/zapi_msg.c
 +++ b/zebra/zapi_msg.c
-@@ -1606,6 +1606,8 @@ static struct nexthop *nexthop_from_zapi(const struct zapi_nexthop *api_nh,
+@@ -1662,6 +1662,8 @@ static struct nexthop *nexthop_from_zapi(const struct zapi_nexthop *api_nh,
  		 * the nexthop and associated MAC need to be installed.
  		 */
  		if (CHECK_FLAG(api_nh->flags, ZAPI_NEXTHOP_FLAG_EVPN)) {
@@ -95,7 +94,7 @@ index 68bb9783f8..c478f83795 100644
  			SET_FLAG(nexthop->flags, NEXTHOP_FLAG_EVPN);
  			nexthop->rmac = api_nh->rmac;
  		}
-@@ -1635,6 +1637,8 @@ static struct nexthop *nexthop_from_zapi(const struct zapi_nexthop *api_nh,
+@@ -1691,6 +1693,8 @@ static struct nexthop *nexthop_from_zapi(const struct zapi_nexthop *api_nh,
  		 * the nexthop and associated MAC need to be installed.
  		 */
  		if (CHECK_FLAG(api_nh->flags, ZAPI_NEXTHOP_FLAG_EVPN)) {
@@ -105,10 +104,10 @@ index 68bb9783f8..c478f83795 100644
  			nexthop->rmac = api_nh->rmac;
  		}
 diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index 639f3cd918..6f8d37e701 100644
+index 9c252cc63..92b571c68 100644
 --- a/zebra/zebra_dplane.c
 +++ b/zebra/zebra_dplane.c
-@@ -2934,7 +2934,7 @@ int dplane_ctx_route_init(struct zebra_dplane_ctx *ctx, enum dplane_op_e op,
+@@ -3568,7 +3568,7 @@ int dplane_ctx_route_init(struct zebra_dplane_ctx *ctx, enum dplane_op_e op,
  		zl3vni = zl3vni_from_vrf(nexthop->vrf_id);
  		if (zl3vni && is_l3vni_oper_up(zl3vni)) {
  			nexthop->nh_encap_type = NET_VXLAN;
diff --git a/src/sonic-frr/patch/0006-Link-local-scope-was-not-set-while-binding-socket-for-bgp-ipv6-link-local-neighbors.patch b/src/sonic-frr/patch/0006-Link-local-scope-was-not-set-while-binding-socket-for-bgp-ipv6-link-local-neighbors.patch
index 575e636593b..8aa6c664a18 100644
--- a/src/sonic-frr/patch/0006-Link-local-scope-was-not-set-while-binding-socket-for-bgp-ipv6-link-local-neighbors.patch
+++ b/src/sonic-frr/patch/0006-Link-local-scope-was-not-set-while-binding-socket-for-bgp-ipv6-link-local-neighbors.patch
@@ -8,10 +8,10 @@ Subject: [PATCH] From 92ab2d74fca06f86c00d886ac249f7f2d89e93fe Mon Sep 17
 
 
 diff --git a/bgpd/bgp_network.c b/bgpd/bgp_network.c
-index 76bb9949d..5acdde08d 100644
+index 3df4aa286..8b0901fa6 100644
 --- a/bgpd/bgp_network.c
 +++ b/bgpd/bgp_network.c
-@@ -678,6 +678,11 @@ int bgp_update_address(struct interface *ifp, const union sockunion *dst,
+@@ -742,6 +742,11 @@ int bgp_update_address(struct interface *ifp, const union sockunion *dst,
  		return 1;
  
  	prefix2sockunion(sel, addr);
diff --git a/src/sonic-frr/patch/0007-ignore-route-from-default-table.patch b/src/sonic-frr/patch/0007-ignore-route-from-default-table.patch
index 52167d76528..4a47ec88a5b 100644
--- a/src/sonic-frr/patch/0007-ignore-route-from-default-table.patch
+++ b/src/sonic-frr/patch/0007-ignore-route-from-default-table.patch
@@ -7,10 +7,10 @@ Subject: [PATCH] From ca66350aecf7db3354019480d11754fabae3a97c Mon Sep 17
 Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
 
 diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
-index 0a9fecc9d..b18a96353 100644
+index b8dbabb60..3332638cc 100644
 --- a/zebra/dplane_fpm_nl.c
 +++ b/zebra/dplane_fpm_nl.c
-@@ -814,6 +814,15 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
+@@ -944,6 +944,15 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
  		|| op == DPLANE_OP_NH_UPDATE))
  		return 0;
  
diff --git a/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch b/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch
index bf5dce51c9a..4115f376fcf 100644
--- a/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch
+++ b/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch
@@ -5,14 +5,18 @@ Subject: [PATCH] From 349e3f758860be0077b69919c39764d3486ec44a Mon Sep 17
  00:00:00 2001 Subject: [PATCH] use vrf id instead of table id
 
 Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
+---
+ zebra/rt_netlink.c |   72 +++++++++++++++++++++++++++++++++++++++++++---------
+ 1 file changed, 59 insertions(+), 13 deletions(-)
+
 diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index b8d097e58..b81a9db6d 100644
+index f12b324e0..9b0599899 100644
 --- a/zebra/rt_netlink.c
 +++ b/zebra/rt_netlink.c
 @@ -385,6 +385,31 @@ static inline int proto2zebra(int proto, int family, bool is_nexthop)
  	return proto;
  }
-
+ 
 +static uint32_t table_lookup_by_vrf(vrf_id_t vrf_id, ns_id_t ns_id)
 +{
 +	struct vrf *vrf;
@@ -41,42 +45,8 @@ index b8d097e58..b81a9db6d 100644
  /**
   * @parse_encap_mpls() - Parses encapsulated mpls attributes
   * @tb:         Pointer to rtattr to look for nested items in.
-@@ -817,14 +842,26 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h,
- 	if (rtm->rtm_family == AF_MPLS)
- 		return 0;
-
--	/* Table corresponding to route. */
--	if (tb[RTA_TABLE])
--		table = *(int *)RTA_DATA(tb[RTA_TABLE]);
--	else
--		table = rtm->rtm_table;
-+	if (!ctx) {
-+		/* Table corresponding to route. */
-+		if (tb[RTA_TABLE])
-+			table = *(int *)RTA_DATA(tb[RTA_TABLE]);
-+		else
-+			table = rtm->rtm_table;
-+
-+		/* Map to VRF */
-+		vrf_id = zebra_vrf_lookup_by_table(table, ns_id);
-+	} else {
-+		/* With FPM, rtm_table contains vrf id, see netlink_route_multipath_msg_encode */
-+		if (tb[RTA_TABLE])
-+			vrf_id = *(int *)RTA_DATA(tb[RTA_TABLE]);
-+		else
-+			vrf_id = rtm->rtm_table;
-+
-+		/* Map to table */
-+		table = table_lookup_by_vrf(vrf_id, ns_id);
-+	}
-
--	/* Map to VRF */
--	vrf_id = zebra_vrf_lookup_by_table(table, ns_id);
- 	if (vrf_id == VRF_DEFAULT) {
- 		if (!is_zebra_valid_kernel_table(table)
- 		    && !is_zebra_main_routing_table(table))
-@@ -2283,13 +2320,25 @@ ssize_t netlink_route_multipath_msg_encode(int cmd, struct zebra_dplane_ctx *ctx
-
+@@ -2530,12 +2564,24 @@ ssize_t netlink_route_multipath_msg_encode(int cmd, struct zebra_dplane_ctx *ctx
+ 
  	/* Table corresponding to this route. */
  	table_id = dplane_ctx_get_table(ctx);
 -	if (table_id < 256)
@@ -85,7 +55,6 @@ index b8d097e58..b81a9db6d 100644
 -		req->r.rtm_table = RT_TABLE_UNSPEC;
 -		if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, table_id))
 -			return 0;
--	}
 +	if (!fpm) {
 +		if (table_id < 256)
 +			req->r.rtm_table = table_id;
@@ -104,7 +73,7 @@ index b8d097e58..b81a9db6d 100644
 +			if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, vrf))
 +				return 0;
 +		}
-+	}
+ 	}
 
  	if (IS_ZEBRA_DEBUG_KERNEL)
  		zlog_debug(
diff --git a/src/sonic-frr/patch/0009-bgpd-Change-log-level-for-graceful-restart-events.patch b/src/sonic-frr/patch/0009-bgpd-Change-log-level-for-graceful-restart-events.patch
new file mode 100644
index 00000000000..d3a4d29c0d8
--- /dev/null
+++ b/src/sonic-frr/patch/0009-bgpd-Change-log-level-for-graceful-restart-events.patch
@@ -0,0 +1,107 @@
+From a05f213343ee7ee5dbfcfd1984c40db5c262db3c Mon Sep 17 00:00:00 2001
+
+From: stormliang <stormliang@microsoft.com>
+
+Subject: [PATCH] From c423bce4db804c1d07d65ce3d06a9e62c4eceb2b Mon Sep 17
+ 00:00:00 2001 Subject: [PATCH] change log level for graceful restart events
+---
+ bgpd/bgp_fsm.c |   33 ++++++++++++++-------------------
+ bgpd/bgpd.c    |    6 ++----
+ 2 files changed, 16 insertions(+), 23 deletions(-)
+
+diff --git a/bgpd/bgp_fsm.c b/bgpd/bgp_fsm.c
+index c7a4c6928..9808660ff 100644
+--- a/bgpd/bgp_fsm.c
++++ b/bgpd/bgp_fsm.c
+@@ -753,9 +753,9 @@ static void bgp_graceful_restart_timer_expire(struct event *thread)
+ 	afi_t afi;
+ 	safi_t safi;
+ 
+-	if (bgp_debug_neighbor_events(peer)) {
+-		zlog_debug("%pBP graceful restart timer expired", peer);
+-		zlog_debug("%pBP graceful restart stalepath timer stopped",
++	if (peer) {
++		zlog_info("%pBP graceful restart timer expired", peer);
++		zlog_info("%pBP graceful restart stalepath timer stopped",
+ 			   peer);
+ 	}
+ 
+@@ -815,8 +815,8 @@ static void bgp_graceful_stale_timer_expire(struct event *thread)
+ 	afi_t afi;
+ 	safi_t safi;
+ 
+-	if (bgp_debug_neighbor_events(peer))
+-		zlog_debug("%pBP graceful restart stalepath timer expired",
++	if (peer)
++		zlog_info("%pBP graceful restart stalepath timer expired",
+ 			   peer);
+ 
+ 	/* NSF delete stale route */
+@@ -1398,20 +1398,17 @@ enum bgp_fsm_state_progress bgp_stop(struct peer_connection *connection)
+ 		/* graceful restart */
+ 		if (connection->t_gr_stale) {
+ 			EVENT_OFF(connection->t_gr_stale);
+-			if (bgp_debug_neighbor_events(peer))
+-				zlog_debug(
++				zlog_info(
+ 					"%pBP graceful restart stalepath timer stopped",
+ 					peer);
+ 		}
+ 		if (CHECK_FLAG(peer->sflags, PEER_STATUS_NSF_WAIT)) {
+-			if (bgp_debug_neighbor_events(peer)) {
+-				zlog_debug(
+-					"%pBP graceful restart timer started for %d sec",
+-					peer, peer->v_gr_restart);
+-				zlog_debug(
+-					"%pBP graceful restart stalepath timer started for %d sec",
+-					peer, peer->bgp->stalepath_time);
+-			}
++			zlog_info(
++				"%pBP graceful restart timer started for %d sec",
++				peer, peer->v_gr_restart);
++			zlog_info(
++				"%pBP graceful restart stalepath timer started for %d sec",
++				peer, peer->bgp->stalepath_time);
+ 			BGP_TIMER_ON(connection->t_gr_restart,
+ 				     bgp_graceful_restart_timer_expire,
+ 				     peer->v_gr_restart);
+@@ -2258,8 +2255,7 @@ bgp_establish(struct peer_connection *connection)
+ 		UNSET_FLAG(peer->sflags, PEER_STATUS_NSF_MODE);
+ 		if (connection->t_gr_stale) {
+ 			EVENT_OFF(connection->t_gr_stale);
+-			if (bgp_debug_neighbor_events(peer))
+-				zlog_debug(
++			zlog_info(
+ 					"%pBP graceful restart stalepath timer stopped",
+ 					peer);
+ 		}
+@@ -2267,8 +2263,7 @@ bgp_establish(struct peer_connection *connection)
+ 
+ 	if (connection->t_gr_restart) {
+ 		EVENT_OFF(connection->t_gr_restart);
+-		if (bgp_debug_neighbor_events(peer))
+-			zlog_debug("%pBP graceful restart timer stopped", peer);
++		zlog_info("%pBP graceful restart timer stopped", peer);
+ 	}
+ 
+ 	/* Reset uptime, turn on keepalives, send current table. */
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index 342c3c6be..6e86bbc07 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -2641,13 +2641,11 @@ void peer_nsf_stop(struct peer *peer)
+ 
+ 	if (peer->connection->t_gr_restart) {
+ 		EVENT_OFF(peer->connection->t_gr_restart);
+-		if (bgp_debug_neighbor_events(peer))
+-			zlog_debug("%pBP graceful restart timer stopped", peer);
++		zlog_info("%pBP graceful restart timer stopped", peer);
+ 	}
+ 	if (peer->connection->t_gr_stale) {
+ 		EVENT_OFF(peer->connection->t_gr_stale);
+-		if (bgp_debug_neighbor_events(peer))
+-			zlog_debug(
++		zlog_info(
+ 				"%pBP graceful restart stalepath timer stopped",
+ 				peer);
+ 	}
diff --git a/src/sonic-frr/patch/0010-Disable-ipv6-src-address-test-in-pceplib.patch b/src/sonic-frr/patch/0010-Disable-ipv6-src-address-test-in-pceplib.patch
new file mode 100644
index 00000000000..adfb06cea5c
--- /dev/null
+++ b/src/sonic-frr/patch/0010-Disable-ipv6-src-address-test-in-pceplib.patch
@@ -0,0 +1,25 @@
+From 54ac159d360a8fc9e8fcb19d984e8230e16f6fc0 Mon Sep 17 00:00:00 2001
+From: Syed Hasan Raza Naqvi <syed.naqvi@broadcom.com>
+Date: Wed, 4 May 2022 05:11:01 +0000
+Subject: [PATCH] From dfe0158344ea581370dd2dba8e4db189cf369147 Mon Sep 17
+ 00:00:00 2001 Subject: [PATCH] Disable ipv6 src address test in pcep. Docker
+ lo interface  doesn't have ipv6 enabled. Socket bind returns cannot assign
+ requested  address.
+
+
+diff --git a/pceplib/test/pcep_socket_comm_test.c b/pceplib/test/pcep_socket_comm_test.c
+index c0b73c3db..4a70e49fb 100644
+--- a/pceplib/test/pcep_socket_comm_test.c
++++ b/pceplib/test/pcep_socket_comm_test.c
+@@ -80,7 +80,7 @@ void pcep_socket_comm_test_setup()
+ 	inet_pton(AF_INET, "127.0.0.1", &(test_host_ip));
+ 	inet_pton(AF_INET, "127.0.0.1", &(test_src_ip));
+ 	inet_pton(AF_INET6, "::1", &(test_host_ipv6));
+-	inet_pton(AF_INET6, "::1", &(test_src_ipv6));
++	inet_pton(AF_INET6, "::", &(test_src_ipv6));
+ }
+ 
+ void pcep_socket_comm_test_teardown()
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0010-bgpd-Change-log-level-for-graceful-restart-events.patch b/src/sonic-frr/patch/0010-bgpd-Change-log-level-for-graceful-restart-events.patch
deleted file mode 100644
index be4bbb6a860..00000000000
--- a/src/sonic-frr/patch/0010-bgpd-Change-log-level-for-graceful-restart-events.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From a05f213343ee7ee5dbfcfd1984c40db5c262db3c Mon Sep 17 00:00:00 2001
-From: stormliang <stormliang@microsoft.com>
-Date: Mon, 19 Jun 2023 13:57:01 +0000
-Subject: [PATCH] From c423bce4db804c1d07d65ce3d06a9e62c4eceb2b Mon Sep 17
- 00:00:00 2001 Subject: [PATCH] change log level for graceful restart events
-diff --git a/bgpd/bgp_fsm.c b/bgpd/bgp_fsm.c
-index 504343994..f58ab7c02 100644
---- a/bgpd/bgp_fsm.c
-+++ b/bgpd/bgp_fsm.c
-@@ -739,9 +739,9 @@ static void bgp_graceful_restart_timer_expire(struct event *thread)
- 	afi_t afi;
- 	safi_t safi;
-
--	if (bgp_debug_neighbor_events(peer)) {
--		zlog_debug("%pBP graceful restart timer expired", peer);
--		zlog_debug("%pBP graceful restart stalepath timer stopped",
-+	if (peer) {
-+		zlog_info("%pBP graceful restart timer expired", peer);
-+		zlog_info("%pBP graceful restart stalepath timer stopped",
- 			   peer);
- 	}
-
-@@ -801,8 +801,8 @@ static void bgp_graceful_stale_timer_expire(struct event *thread)
- 	afi_t afi;
- 	safi_t safi;
-
--	if (bgp_debug_neighbor_events(peer))
--		zlog_debug("%pBP graceful restart stalepath timer expired",
-+	if (peer)
-+		zlog_info("%pBP graceful restart stalepath timer expired",
- 			   peer);
-
- 	/* NSF delete stale route */
-@@ -1380,20 +1380,17 @@ enum bgp_fsm_state_progress bgp_stop(struct peer_connection *connection)
- 		/* graceful restart */
- 		if (connection->t_gr_stale) {
- 			EVENT_OFF(connection->t_gr_stale);
--			if (bgp_debug_neighbor_events(peer))
--				zlog_debug(
-+				zlog_info(
- 					"%pBP graceful restart stalepath timer stopped",
- 					peer);
- 		}
- 		if (CHECK_FLAG(peer->sflags, PEER_STATUS_NSF_WAIT)) {
--			if (bgp_debug_neighbor_events(peer)) {
--				zlog_debug(
--					"%pBP graceful restart timer started for %d sec",
--					peer, peer->v_gr_restart);
--				zlog_debug(
--					"%pBP graceful restart stalepath timer started for %d sec",
--					peer, peer->bgp->stalepath_time);
--			}
-+			zlog_info(
-+				"%pBP graceful restart timer started for %d sec",
-+				peer, peer->v_gr_restart);
-+			zlog_info(
-+				"%pBP graceful restart stalepath timer started for %d sec",
-+				peer, peer->bgp->stalepath_time);
- 			BGP_TIMER_ON(connection->t_gr_restart,
- 				     bgp_graceful_restart_timer_expire,
- 				     peer->v_gr_restart);
-@@ -2216,8 +2213,7 @@ bgp_establish(struct peer_connection *connection)
- 		UNSET_FLAG(peer->sflags, PEER_STATUS_NSF_MODE);
- 		if (connection->t_gr_stale) {
- 			EVENT_OFF(connection->t_gr_stale);
--			if (bgp_debug_neighbor_events(peer))
--				zlog_debug(
-+			zlog_info(
- 					"%pBP graceful restart stalepath timer stopped",
- 					peer);
- 		}
-@@ -2225,8 +2221,7 @@ bgp_establish(struct peer_connection *connection)
-
- 	if (connection->t_gr_restart) {
- 		EVENT_OFF(connection->t_gr_restart);
--		if (bgp_debug_neighbor_events(peer))
--			zlog_debug("%pBP graceful restart timer stopped", peer);
-+		zlog_info("%pBP graceful restart timer stopped", peer);
- 	}
-
- 	/* Reset uptime, turn on keepalives, send current table. */
-diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index d6d874be2..337879a2d 100644
---- a/bgpd/bgpd.c
-+++ b/bgpd/bgpd.c
-@@ -2629,13 +2629,11 @@ void peer_nsf_stop(struct peer *peer)
-
- 	if (peer->connection->t_gr_restart) {
- 		EVENT_OFF(peer->connection->t_gr_restart);
--		if (bgp_debug_neighbor_events(peer))
--			zlog_debug("%pBP graceful restart timer stopped", peer);
-+		zlog_info("%pBP graceful restart timer stopped", peer);
- 	}
- 	if (peer->connection->t_gr_stale) {
- 		EVENT_OFF(peer->connection->t_gr_stale);
--		if (bgp_debug_neighbor_events(peer))
--			zlog_debug(
-+		zlog_info(
- 				"%pBP graceful restart stalepath timer stopped",
- 				peer);
- 	}
diff --git a/src/sonic-frr/patch/0011-cross-compile-changes.patch b/src/sonic-frr/patch/0011-cross-compile-changes.patch
new file mode 100644
index 00000000000..82e9e3b2844
--- /dev/null
+++ b/src/sonic-frr/patch/0011-cross-compile-changes.patch
@@ -0,0 +1,79 @@
+From 611505531a96375000184fdf191d91bd021bd35f Mon Sep 17 00:00:00 2001
+From: Saikrishna Arcot <sarcot@microsoft.com>
+Date: Wed, 6 Jul 2022 11:28:16 -0700
+Subject: [PATCH] From ece218405fe4c086017f2a4f2b2b4c86b9790db0 Mon Sep 17
+ 00:00:00 2001 Subject: [PATCH] Make changes to support crosscompilation in
+ SONiC
+
+Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
+
+diff --git a/debian/frr-doc.info b/debian/frr-doc.info
+deleted file mode 100644
+index 1976365e3..000000000
+--- a/debian/frr-doc.info
++++ /dev/null
+@@ -1 +0,0 @@
+-build/doc/user/_build/texinfo/frr.info
+diff --git a/debian/frr.manpages b/debian/frr.manpages
+deleted file mode 100644
+index 5a1b74cfc..000000000
+--- a/debian/frr.manpages
++++ /dev/null
+@@ -1,16 +0,0 @@
+-build/doc/manpages/_build/man/frr-bgpd.8
+-build/doc/manpages/_build/man/frr-eigrpd.8
+-build/doc/manpages/_build/man/frr-fabricd.8
+-build/doc/manpages/_build/man/frr-isisd.8
+-build/doc/manpages/_build/man/frr-ldpd.8
+-build/doc/manpages/_build/man/frr-nhrpd.8
+-build/doc/manpages/_build/man/frr-ospf6d.8
+-build/doc/manpages/_build/man/frr-ospfd.8
+-build/doc/manpages/_build/man/frr-pimd.8
+-build/doc/manpages/_build/man/frr-ripd.8
+-build/doc/manpages/_build/man/frr-ripngd.8
+-build/doc/manpages/_build/man/frr-watchfrr.8
+-build/doc/manpages/_build/man/frr-zebra.8
+-build/doc/manpages/_build/man/frr.1
+-build/doc/manpages/_build/man/mtracebis.8
+-build/doc/manpages/_build/man/vtysh.1
+diff --git a/debian/rules b/debian/rules
+index 74573c9a0..e0b626fbf 100755
+--- a/debian/rules
++++ b/debian/rules
+@@ -39,10 +39,17 @@ else
+   CONF_GRPC=--enable-grpc
+ endif
+ 
++DEB_BUILD_ARCH ?= $(shell dpkg-architecture -qDEB_BUILD_ARCH)
++DEB_HOST_ARCH ?= $(shell dpkg-architecture -qDEB_HOST_ARCH)
++
++ifneq ($(DEB_BUILD_ARCH),$(DEB_HOST_ARCH))
++export PYTHON=/python_virtualenv/env3/bin/python3
++else
+ export PYTHON=python3
++endif
+ 
+ %:
+-	dh $@ -Bbuild --with=sphinxdoc
++	dh $@ -Bbuild --with=sphinxdoc --builddirectory=build
+ 
+ override_dh_auto_configure:
+ 	$(shell dpkg-buildflags --export=sh); \
+@@ -80,10 +87,10 @@ override_dh_auto_configure:
+ override_dh_auto_install:
+ 	dh_auto_install
+ 
+-	sed -e '1c #!/usr/bin/python3' -i debian/tmp/usr/lib/frr/frr-reload.py
+-	sed -e '1c #!/usr/bin/python3' -i debian/tmp/usr/lib/frr/generate_support_bundle.py
+-	sed -e '1c #!/usr/bin/python3' -i debian/tmp/usr/lib/frr/frr_babeltrace.py
+-	sed -e '1c #!/usr/bin/python3' -i debian/tmp/usr/lib/frr/ospfclient.py
++	sed -e '1c #!$(shell which $PYTHON)' -i debian/tmp/usr/lib/frr/frr-reload.py
++	sed -e '1c #!$(shell which $PYTHON)' -i debian/tmp/usr/lib/frr/generate_support_bundle.py
++	sed -e '1c #!$(shell which $PYTHON)' -i debian/tmp/usr/lib/frr/frr_babeltrace.py
++	sed -e '1c #!$(shell which $PYTHON)' -i debian/tmp/usr/lib/frr/ospfclient.py
+ 
+ # let dh_systemd_* and dh_installinit do their thing automatically
+ 	cp build/tools/frr.service debian/frr.service
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0012-build-dplane-fpm-sonic-module.patch b/src/sonic-frr/patch/0012-build-dplane-fpm-sonic-module.patch
new file mode 100644
index 00000000000..f733f37b67c
--- /dev/null
+++ b/src/sonic-frr/patch/0012-build-dplane-fpm-sonic-module.patch
@@ -0,0 +1,45 @@
+From 9e789e450003b9d2c7347c9f9b0d29d9b84d525f Mon Sep 17 00:00:00 2001
+From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
+Date: Tue, 1 Oct 2024 02:28:17 -0700
+Subject: [PATCH] Build dplane_fpm_sonic module
+
+From: Carmine Scarpitta <cscarpit@cisco.com>
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ debian/frr.install | 1 +
+ zebra/subdir.am    | 6 ++++++
+ 3 files changed, 8 insertions(+)
+
+diff --git a/debian/frr.install b/debian/frr.install
+index d4b904b6e..375f0dadd 100644
+--- a/debian/frr.install
++++ b/debian/frr.install
+@@ -11,6 +11,7 @@ usr/lib/*/frr/libfrrospfapiclient.*
+ usr/lib/*/frr/libmgmt_be_nb.*
+ usr/lib/*/frr/modules/bgpd_bmp.so
+ usr/lib/*/frr/modules/dplane_fpm_nl.so
++usr/lib/*/frr/modules/dplane_fpm_sonic.so
+ usr/lib/*/frr/modules/zebra_cumulus_mlag.so
+ usr/lib/*/frr/modules/zebra_fpm.so
+ usr/lib/*/frr/modules/pathd_pcep.so
+diff --git a/zebra/subdir.am b/zebra/subdir.am
+index f76744736..c222984ae 100644
+--- a/zebra/subdir.am
++++ b/zebra/subdir.am
+@@ -252,6 +252,12 @@ zebra_dplane_fpm_nl_la_LDFLAGS = $(MODULE_LDFLAGS)
+ zebra_dplane_fpm_nl_la_LIBADD  =
+ endif
+ 
++module_LTLIBRARIES += zebra/dplane_fpm_sonic.la
++
++zebra_dplane_fpm_sonic_la_SOURCES = zebra/dplane_fpm_sonic.c
++zebra_dplane_fpm_sonic_la_LDFLAGS = $(MODULE_LDFLAGS)
++zebra_dplane_fpm_sonic_la_LIBADD  =
++
+ if NETLINK_DEBUG
+ zebra_zebra_SOURCES += \
+ 	zebra/debug_nl.c \
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0013-zebra-do-not-send-local-routes-to-fpm.patch b/src/sonic-frr/patch/0013-zebra-do-not-send-local-routes-to-fpm.patch
new file mode 100644
index 00000000000..be42d906a0d
--- /dev/null
+++ b/src/sonic-frr/patch/0013-zebra-do-not-send-local-routes-to-fpm.patch
@@ -0,0 +1,80 @@
+From 94d88c9e9155756fce152141e0d0d86e64a6981d Mon Sep 17 00:00:00 2001
+From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
+Date: Mon, 25 Nov 2024 01:32:36 -0800
+Subject: [PATCH]  https://github.com/FRRouting/frr/pull/12600, we are now
+ installing a new host  route for every connected route (along with the subnet
+ route). However, the  orchagent already installs a host route for a connected
+ interface address.  Hence, not sending the connected host route to the FPM.
+
+---
+ zebra/connected.c |  4 ++--
+ zebra/zebra_rib.c | 16 ++++++++++++++--
+ 2 files changed, 16 insertions(+), 4 deletions(-)
+
+diff --git a/zebra/connected.c b/zebra/connected.c
+index ce4f6919d..b144030e1 100644
+--- a/zebra/connected.c
++++ b/zebra/connected.c
+@@ -229,7 +229,7 @@ void connected_up(struct interface *ifp, struct connected *ifc)
+ 	uint32_t flags = 0;
+ 	uint32_t count = 0;
+ 	struct connected *c;
+-	bool install_local = true;
++	bool install_local = false;
+ 
+ 	zvrf = ifp->vrf->info;
+ 	if (!zvrf) {
+@@ -435,7 +435,7 @@ void connected_down(struct interface *ifp, struct connected *ifc)
+ 	struct zebra_vrf *zvrf;
+ 	uint32_t count = 0;
+ 	struct connected *c;
+-	bool remove_local = true;
++	bool remove_local = false;
+ 
+ 	zvrf = ifp->vrf->info;
+ 	if (!zvrf) {
+diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
+index 2881192eb..2eff452ea 100644
+--- a/zebra/zebra_rib.c
++++ b/zebra/zebra_rib.c
+@@ -600,6 +600,12 @@ void rib_install_kernel(struct route_node *rn, struct route_entry *re,
+ 	/* Update fib selection */
+ 	dest->selected_fib = re;
+ 
++	/* Do not install local routes to FIB */
++	if (re->type == ZEBRA_ROUTE_LOCAL) {
++		zlog_debug("Not installing local route re %p (%s)",
++		 re, zebra_route_string(re->type));
++		return;
++	}
+ 	/*
+ 	 * Make sure we update the FPM any time we send new information to
+ 	 * the kernel.
+@@ -652,6 +658,12 @@ void rib_uninstall_kernel(struct route_node *rn, struct route_entry *re)
+ {
+ 	struct zebra_vrf *zvrf = zebra_vrf_lookup_by_id(re->vrf_id);
+ 
++	/* Do not uninstall local routes to FIB */
++	if (re->type == ZEBRA_ROUTE_LOCAL) {
++		zlog_debug("Not uninstalling local route re %p (%s)",
++		 re, zebra_route_string(re->type));
++		return;
++	}
+ 	/*
+ 	 * Make sure we update the FPM any time we send new information to
+ 	 * the dataplane.
+@@ -1150,9 +1162,9 @@ static struct route_entry *rib_choose_best(struct route_entry *current,
+ 	 * or loopback interface.  If not, pick the last connected
+ 	 * route of the set of lowest metric connected routes.
+ 	 */
+-	possible = rib_choose_best_type(ZEBRA_ROUTE_LOCAL, current, alternate);
++	/*possible = rib_choose_best_type(ZEBRA_ROUTE_LOCAL, current, alternate);
+ 	if (possible)
+-		return possible;
++		return possible; */
+ 
+ 	possible = rib_choose_best_type(ZEBRA_ROUTE_CONNECT, current, alternate);
+ 	if (possible)
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0014-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch b/src/sonic-frr/patch/0014-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch
new file mode 100644
index 00000000000..936915b1327
--- /dev/null
+++ b/src/sonic-frr/patch/0014-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch
@@ -0,0 +1,85 @@
+From 274386fbefc83dc4f2f3184637db3c973f8200b6 Mon Sep 17 00:00:00 2001
+From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
+Date: Wed, 13 Nov 2024 23:12:22 -0800
+Subject: [PATCH] Adding changes to write ip nht resolve-via-default
+ configuration for VRF in zebra
+
+---
+ zebra/zebra_vrf.c | 34 +++++++++++++++++++++++++++++++++++
+ zebra/zebra_vrf.h |  1 +
+ zebra/zebra_vty.c |  2 ++
+ 3 files changed, 37 insertions(+)
+
+diff --git a/zebra/zebra_vrf.c b/zebra/zebra_vrf.c
+index 7bfe07b4c..1b55da453 100644
+--- a/zebra/zebra_vrf.c
++++ b/zebra/zebra_vrf.c
+@@ -570,6 +570,40 @@ int zebra_vrf_netns_handler_create(struct vty *vty, struct vrf *vrf,
+ 	return CMD_SUCCESS;
+ }
+ 
++void zebra_vrf_config_write(struct vty *vty)
++{
++	struct vrf *vrf;
++	struct zebra_vrf *zvrf;
++
++	RB_FOREACH (vrf, vrf_name_head, &vrfs_by_name) {
++		zvrf = vrf->info;
++
++		if (!zvrf)
++			continue;
++
++		if (zvrf_id(zvrf) == VRF_DEFAULT) {
++			if (zvrf->zebra_rnh_ip_default_route)
++				vty_out(vty, "ip nht resolve-via-default\n");
++
++			if (zvrf->zebra_rnh_ipv6_default_route)
++				vty_out(vty, "ipv6 nht resolve-via-default\n");
++		} else {
++			vty_frame(vty, "vrf %s\n", zvrf_name(zvrf));
++			if (zvrf->zebra_rnh_ip_default_route)
++				vty_out(vty, " ip nht resolve-via-default\n");
++
++			if (zvrf->zebra_rnh_ipv6_default_route)
++				vty_out(vty, " ipv6 nht resolve-via-default\n");
++		}
++		if (zvrf_id(zvrf) != VRF_DEFAULT)
++			vty_endframe(vty, "exit-vrf\n!\n");
++		else
++			vty_out(vty, "!\n");
++	}
++	return 0;
++
++}
++
+ /* Zebra VRF initialization. */
+ void zebra_vrf_init(void)
+ {
+diff --git a/zebra/zebra_vrf.h b/zebra/zebra_vrf.h
+index 334bb9368..b2b997bfc 100644
+--- a/zebra/zebra_vrf.h
++++ b/zebra/zebra_vrf.h
+@@ -250,6 +250,7 @@ extern vrf_id_t zebra_vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id);
+ extern struct zebra_vrf *zebra_vrf_alloc(struct vrf *vrf);
+ extern struct route_table *zebra_vrf_table(afi_t, safi_t, vrf_id_t);
+ int zebra_vrf_lookup_tableid(vrf_id_t vrf_id, ns_id_t ns_id);
++extern void zebra_vrf_config_write(struct vty *vty);
+ 
+ /*
+  * API to associate a VRF with a NETNS.
+diff --git a/zebra/zebra_vty.c b/zebra/zebra_vty.c
+index a1731712d..90ef45705 100644
+--- a/zebra/zebra_vty.c
++++ b/zebra/zebra_vty.c
+@@ -3683,6 +3683,8 @@ static int config_write_protocol(struct vty *vty)
+ 
+ 	zebra_pbr_config_write(vty);
+ 
++	zebra_vrf_config_write(vty);
++
+ 	if (!zebra_vxlan_get_accept_bgp_seq())
+ 		vty_out(vty, "no evpn accept-bgp-seq\n");
+ 
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0015-When-the-file-is-config-replayed-we-cannot-handle-th.patch b/src/sonic-frr/patch/0015-When-the-file-is-config-replayed-we-cannot-handle-th.patch
new file mode 100644
index 00000000000..a01b16b21ec
--- /dev/null
+++ b/src/sonic-frr/patch/0015-When-the-file-is-config-replayed-we-cannot-handle-th.patch
@@ -0,0 +1,71 @@
+From 83714071c68c588c66972fc0fe0f5f2a57a7dd55 Mon Sep 17 00:00:00 2001
+From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
+Date: Thu, 21 Nov 2024 20:57:11 -0800
+Subject: [PATCH] When the file is config replayed, we cannot handle the errors
+  in command execution. We would let all commands in the file to complete, 
+ irrespective of some of them failing. Also, certain protocols like RIP, RIPng
+ are not supported in SONIC. So, it is expected that their configuration files
+ will not be present.
+
+---
+ lib/vty.c               | 16 +++++++++++++---
+ mgmtd/mgmt_be_adapter.c |  2 +-
+ 2 files changed, 14 insertions(+), 4 deletions(-)
+
+diff --git a/lib/vty.c b/lib/vty.c
+index ecbbd73db..eadab8821 100644
+--- a/lib/vty.c
++++ b/lib/vty.c
+@@ -2704,7 +2704,9 @@ void vty_read_file_finish(struct vty *vty, struct nb_config *config)
+ 		nl = strchr(ve->error_buf, '\n');
+ 		if (nl)
+ 			*nl = '\0';
+-		flog_err(EC_LIB_VTY, "%s on config line %u: %s", message,
++		/* When the file is config replayed, we cannot handle the errors in command execution.
++			We would let all commands in the file to complete, irrespective of some of them failing. */
++		flog_warn(EC_LIB_VTY, "%s on config line %u: %s", message,
+ 			 ve->line_num, ve->error_buf);
+ 	}
+ 
+@@ -2823,7 +2825,11 @@ FILE *vty_open_config(const char *config_file, char *config_default_dir)
+ 				flog_warn(EC_LIB_BACKUP_CONFIG,
+ 					  "using backup configuration file!");
+ 			else {
+-				flog_err(
++				/* There are few protocols e.g. RIP, RIPng, which are ununsed in SONIC.
++				   So, there will not be any config file for them.
++				   Flagging error, will be considered a breakage by loganalyzer, whereas
++				   it is valid for these protocol config file to be not present. */
++				flog_warn(
+ 					EC_LIB_VTY,
+ 					"%s: can't open configuration file [%s]",
+ 					__func__, config_file);
+@@ -2872,7 +2878,11 @@ FILE *vty_open_config(const char *config_file, char *config_default_dir)
+ 					  "using backup configuration file!");
+ 				fullpath = config_default_dir;
+ 			} else {
+-				flog_err(EC_LIB_VTY,
++				/* There are few protocols e.g. RIP, RIPng, which are ununsed in SONIC.
++				   So, there will not be any config file for them.
++				   Flagging error, will be considered a breakage by loganalyzer, whereas
++				   it is valid for these protocol config file to be not present. */
++				flog_warn(EC_LIB_VTY,
+ 					 "can't open configuration file [%s]",
+ 					 config_default_dir);
+ 				goto tmp_free_and_out;
+diff --git a/mgmtd/mgmt_be_adapter.c b/mgmtd/mgmt_be_adapter.c
+index 8f7049037..aaaa1e43d 100644
+--- a/mgmtd/mgmt_be_adapter.c
++++ b/mgmtd/mgmt_be_adapter.c
+@@ -840,7 +840,7 @@ static void mgmt_be_adapter_conn_init(struct event *thread)
+ 	 * transaction in progress.
+ 	 */
+ 	if (mgmt_txn_notify_be_adapter_conn(adapter, true) != 0) {
+-		zlog_err("XXX txn in progress, retry init");
++		zlog_warn("XXX txn in progress, retry init");
+ 		mgmt_be_adapter_sched_init_event(adapter);
+ 		return;
+ 	}
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0016-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch b/src/sonic-frr/patch/0016-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch
new file mode 100644
index 00000000000..0ef71cf87ec
--- /dev/null
+++ b/src/sonic-frr/patch/0016-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch
@@ -0,0 +1,23 @@
+From 501f267ec4c7359fc518ba31c5d63045c935045c Mon Sep 17 00:00:00 2001
+From: dgsudharsan <sudharsand@nvidia.com>
+Date: Wed, 4 Dec 2024 20:39:46 +0000
+Subject: [PATCH] Set multipath to 514 and disable bgp-vnc for optimization
+
+
+diff --git a/debian/rules b/debian/rules
+index e0b626fbf..41b6c9f57 100755
+--- a/debian/rules
++++ b/debian/rules
+@@ -73,8 +73,7 @@ override_dh_auto_configure:
+ 		--disable-protobuf \
+ 		--disable-zeromq \
+ 		--enable-ospfapi \
+-		--enable-bgp-vnc \
+-		--enable-multipath=256 \
++		--enable-multipath=514 \
+ 		--enable-pcre2posix \
+ 		\
+ 		--enable-user=frr \
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0017-Patch-to-send-tag-value-associated-with-route-via-ne.patch b/src/sonic-frr/patch/0017-Patch-to-send-tag-value-associated-with-route-via-ne.patch
new file mode 100644
index 00000000000..5660b4e0525
--- /dev/null
+++ b/src/sonic-frr/patch/0017-Patch-to-send-tag-value-associated-with-route-via-ne.patch
@@ -0,0 +1,49 @@
+From c0418c02dabe901f5dc39c85ce2e80bd361d7c78 Mon Sep 17 00:00:00 2001
+From: Abhishek Dosi <abdosi@microsoft.com>
+Date: Wed, 11 Dec 2024 11:19:05 +0000
+Subject: [PATCH] Patch to send tag value associated with route via netlink in 
+ RTA_PRIORITY field.
+
+Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
+---
+ zebra/rt_netlink.c | 22 ++++++++++++++++++++--
+ 1 file changed, 20 insertions(+), 2 deletions(-)
+
+diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
+index 9b0599899..b94ced7e5 100644
+--- a/zebra/rt_netlink.c
++++ b/zebra/rt_netlink.c
+@@ -2551,10 +2551,28 @@ ssize_t netlink_route_multipath_msg_encode(int cmd, struct zebra_dplane_ctx *ctx
+ 	 * path(s)
+ 	 * by the routing protocol and for communicating with protocol peers.
+ 	 */
+-	if (!nl_attr_put32(&req->n, datalen, RTA_PRIORITY,
+-			   ROUTE_INSTALLATION_METRIC))
++	if (fpm)
++	{
++            /* Patch to send tag value as route attribute using RTA_PRIORITY
++	     * which can be used as metadata/attribute to take application specific
++	     * action. As seen in above comment this field is not use anyways and can be
++	     * use by fpmsyncd */
++            if (!nl_attr_put32(&req->n, datalen, RTA_PRIORITY,
++		               cmd == RTM_DELROUTE ? dplane_ctx_get_old_tag(ctx) :
++				                     dplane_ctx_get_tag(ctx)))
++	    {
+ 		return 0;
+ 
++	    }
++	}
++	else
++	{
++	    if (!nl_attr_put32(&req->n, datalen, RTA_PRIORITY,
++			       ROUTE_INSTALLATION_METRIC))
++	    {
++                return 0;
++	    }
++	}
+ #if defined(SUPPORT_REALMS)
+ 	if (cmd == RTM_DELROUTE)
+ 		tag = dplane_ctx_get_old_tag(ctx);
+-- 
+2.25.1
+
diff --git a/src/sonic-frr/patch/0018-SRv6-vpn-route-and-sidlist-install.patch b/src/sonic-frr/patch/0018-SRv6-vpn-route-and-sidlist-install.patch
new file mode 100644
index 00000000000..fefbc69e5cb
--- /dev/null
+++ b/src/sonic-frr/patch/0018-SRv6-vpn-route-and-sidlist-install.patch
@@ -0,0 +1,133 @@
+From 831614adffb6e968aa264b48ae90562a6757ef45 Mon Sep 17 00:00:00 2001
+From: "guozhongfeng.gzf" <guozhongfeng.gzf@alibaba-inc.com>
+Date: Fri, 20 Dec 2024 14:47:16 +0800
+Subject: [PATCH] SRv6-vpn-route-and-sidlist-instal
+
+Signed-off-by: guozhongfeng.gzf <guozhongfeng.gzf@alibaba-inc.com>
+---
+ lib/srv6.h           |  2 ++
+ zebra/zebra_dplane.c | 16 ++++++++++++++++
+ zebra/zebra_dplane.h | 13 +++++++++++++
+ zebra/zebra_srv6.h   | 14 ++++++++++++++
+ 4 files changed, 45 insertions(+)
+
+diff --git a/lib/srv6.h b/lib/srv6.h
+index 011705504..c5c772943 100644
+--- a/lib/srv6.h
++++ b/lib/srv6.h
+@@ -231,6 +231,8 @@ struct nexthop_srv6 {
+ 
+ 	/* SRv6 Headend-behaviour */
+ 	struct seg6_seg_stack *seg6_segs;
++
++	struct in6_addr seg6_src;
+ };
+ 
+ /* SID format type */
+diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
+index 92b571c68..8a3f99ffa 100644
+--- a/zebra/zebra_dplane.c
++++ b/zebra/zebra_dplane.c
+@@ -26,6 +26,7 @@
+ #include "zebra/zebra_pbr.h"
+ #include "zebra/zebra_neigh.h"
+ #include "zebra/zebra_tc.h"
++#include "zebra/zebra_srv6.h"
+ #include "printfrr.h"
+ 
+ /* Memory types */
+@@ -82,6 +83,7 @@ const uint32_t DPLANE_DEFAULT_NEW_WORK = 100;
+ struct dplane_nexthop_info {
+ 	uint32_t id;
+ 	uint32_t old_id;
++	uint32_t pic_nhe_id;
+ 	afi_t afi;
+ 	vrf_id_t vrf_id;
+ 	int type;
+@@ -427,6 +429,7 @@ struct zebra_dplane_ctx {
+ 	/* Support info for different kinds of updates */
+ 	union {
+ 		struct dplane_route_info rinfo;
++		struct zebra_srv6_sidlist sidlist;
+ 		struct zebra_lsp lsp;
+ 		struct dplane_pw_info pw;
+ 		struct dplane_br_port_info br_port;
+@@ -2305,6 +2308,19 @@ int dplane_ctx_get_ns_sock(const struct zebra_dplane_ctx *ctx)
+ #endif
+ }
+ 
++const struct zebra_srv6_sidlist *dplane_ctx_get_sidlist(const struct zebra_dplane_ctx *ctx)
++{
++	DPLANE_CTX_VALID(ctx);
++
++	return &(ctx->u.sidlist);
++}
++
++uint32_t dplane_ctx_get_pic_nhe_id(const struct zebra_dplane_ctx *ctx)
++{
++	DPLANE_CTX_VALID(ctx);
++	return ctx->u.rinfo.nhe.pic_nhe_id;
++}
++
+ /* Accessors for nexthop information */
+ uint32_t dplane_ctx_get_nhe_id(const struct zebra_dplane_ctx *ctx)
+ {
+diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h
+index cabc70c23..4862f94e6 100644
+--- a/zebra/zebra_dplane.h
++++ b/zebra/zebra_dplane.h
+@@ -125,6 +125,16 @@ enum dplane_op_e {
+ 	DPLANE_OP_NH_UPDATE,
+ 	DPLANE_OP_NH_DELETE,
+ 
++	/* Pic Context update*/
++	DPLANE_OP_PIC_CONTEXT_INSTALL,
++	DPLANE_OP_PIC_CONTEXT_UPDATE,
++	DPLANE_OP_PIC_CONTEXT_DELETE,
++
++	/* sid list update */
++	DPLANE_OP_SID_LIST_INSTALL,
++	DPLANE_OP_SID_LIST_UPDATE,
++	DPLANE_OP_SID_LIST_DELETE,
++
+ 	/* LSP update */
+ 	DPLANE_OP_LSP_INSTALL,
+ 	DPLANE_OP_LSP_UPDATE,
+@@ -594,6 +604,9 @@ const struct nexthop_group *dplane_ctx_get_ng(
+ const struct nexthop_group *dplane_ctx_get_old_ng(
+ 	const struct zebra_dplane_ctx *ctx);
+ 
++const struct zebra_srv6_sidlist *dplane_ctx_get_sidlist(const struct zebra_dplane_ctx *ctx);
++uint32_t dplane_ctx_get_pic_nhe_id(const struct zebra_dplane_ctx *ctx);
++
+ /* Optional extra info about interfaces in nexthops - a plugin must enable
+  * this extra info.
+  */
+diff --git a/zebra/zebra_srv6.h b/zebra/zebra_srv6.h
+index 1599fd7ad..05122144d 100644
+--- a/zebra/zebra_srv6.h
++++ b/zebra/zebra_srv6.h
+@@ -209,6 +209,20 @@ struct zebra_srv6 {
+ 	struct list *sid_blocks;
+ };
+ 
++#define SRV6_SEGMENTLIST_NAME_MAX_LENGTH 64
++#define SRV6_SID_INDEX_MAX_NUM 8
++
++struct zebra_srv6_segment_entry {
++	uint32_t index_;
++	struct ipaddr srv6_sid_value_;
++};
++
++struct zebra_srv6_sidlist {
++	char sidlist_name_[SRV6_SEGMENTLIST_NAME_MAX_LENGTH];
++	uint32_t segment_count_;
++	struct zebra_srv6_segment_entry segments_[SRV6_SID_INDEX_MAX_NUM];
++};
++
+ /* declare hooks for the basic API, so that it can be specialized or served
+  * externally. Also declare a hook when those functions have been registered,
+  * so that any external module wanting to replace those can react
+-- 
+2.45.2.windows.1
+
diff --git a/src/sonic-frr/patch/0019-Revert-bgpd-upon-if-event-evaluate-bnc-with-matching.patch b/src/sonic-frr/patch/0019-Revert-bgpd-upon-if-event-evaluate-bnc-with-matching.patch
new file mode 100644
index 00000000000..32e10747297
--- /dev/null
+++ b/src/sonic-frr/patch/0019-Revert-bgpd-upon-if-event-evaluate-bnc-with-matching.patch
@@ -0,0 +1,78 @@
+From 086c32eb5bf2ebfb4805f76219c1a3bc5dd9213e Mon Sep 17 00:00:00 2001
+From: dgsudharsan <sudharsand@nvidia.com>
+Date: Wed, 19 Feb 2025 17:24:39 +0000
+Subject: [PATCH] Revert "bgpd: upon if event, evaluate bnc with matching
+ nexthop"
+
+This reverts commit 58592be57783a3b24e7351af2a5afc61299768df.
+
+diff --git a/bgpd/bgp_nht.c b/bgpd/bgp_nht.c
+index 2ef7ec97e..8482188d7 100644
+--- a/bgpd/bgp_nht.c
++++ b/bgpd/bgp_nht.c
+@@ -763,10 +763,6 @@ static void bgp_nht_ifp_table_handle(struct bgp *bgp,
+ 				     struct interface *ifp, bool up)
+ {
+ 	struct bgp_nexthop_cache *bnc;
+-	struct nexthop *nhop;
+-	uint16_t other_nh_count;
+-	bool nhop_ll_found = false;
+-	bool nhop_found = false;
+ 
+ 	if (ifp->ifindex == IFINDEX_INTERNAL) {
+ 		zlog_warn("%s: The interface %s ignored", __func__, ifp->name);
+@@ -774,42 +770,9 @@ static void bgp_nht_ifp_table_handle(struct bgp *bgp,
+ 	}
+ 
+ 	frr_each (bgp_nexthop_cache, table, bnc) {
+-		other_nh_count = 0;
+-		nhop_ll_found = bnc->ifindex_ipv6_ll == ifp->ifindex;
+-		for (nhop = bnc->nexthop; nhop; nhop = nhop->next) {
+-			if (nhop->ifindex == bnc->ifindex_ipv6_ll)
+-				continue;
+-
+-			if (nhop->ifindex != ifp->ifindex) {
+-				other_nh_count++;
+-				continue;
+-			}
+-			if (nhop->vrf_id != ifp->vrf->vrf_id) {
+-				other_nh_count++;
+-				continue;
+-			}
+-			nhop_found = true;
+-		}
+-
+-		if (!nhop_found && !nhop_ll_found)
+-			/* The event interface does not match the nexthop cache
+-			 * entry */
+-			continue;
+-
+-		if (!up && other_nh_count > 0)
+-			/* Down event ignored in case of multiple next-hop
+-			 * interfaces. The other might interfaces might be still
+-			 * up. The cases where all interfaces are down or a bnc
+-			 * is invalid are processed by a separate zebra rnh
+-			 * messages.
+-			 */
++		if (bnc->ifindex_ipv6_ll != ifp->ifindex)
+ 			continue;
+ 
+-		if (!nhop_ll_found) {
+-			evaluate_paths(bnc);
+-			continue;
+-		}
+-
+ 		bnc->last_update = monotime(NULL);
+ 		bnc->change_flags = 0;
+ 
+@@ -822,7 +785,6 @@ static void bgp_nht_ifp_table_handle(struct bgp *bgp,
+ 		if (up) {
+ 			SET_FLAG(bnc->flags, BGP_NEXTHOP_VALID);
+ 			SET_FLAG(bnc->change_flags, BGP_NEXTHOP_CHANGED);
+-			/* change nexthop number only for ll */
+ 			bnc->nexthop_num = 1;
+ 		} else {
+ 			UNSET_FLAG(bnc->flags, BGP_NEXTHOP_PEER_NOTIFIED);
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0020-staticd-add-cli-to-support-steering-of-ipv4-traffic-over-srv6-sid-list.patch b/src/sonic-frr/patch/0020-staticd-add-cli-to-support-steering-of-ipv4-traffic-over-srv6-sid-list.patch
new file mode 100644
index 00000000000..ec569e3c5e1
--- /dev/null
+++ b/src/sonic-frr/patch/0020-staticd-add-cli-to-support-steering-of-ipv4-traffic-over-srv6-sid-list.patch
@@ -0,0 +1,319 @@
+From 6f52056f70524a26e7ff72c06ca9be826763d603 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Tue, 24 Dec 2024 08:56:28 +0100
+Subject: [PATCH 1/6] staticd: Extend `ip_route_address_interface` to support
+ SRv6 traffic steering
+
+staticd already has a CLI to steer IPv6 traffic over a given SRv6 SID
+list:
+
+```
+ipv6 route 2001:db8:1:1::/64 sr0 segments fcbb:bbbb:1:2:3:fe00::
+```
+
+This PR extends the existing CLI `ip route` to support steering of IPv4
+traffic over an SRv6 SID list.
+
+```
+ip route 10.0.0.0/24 sr0 segments fcbb:bbbb:1:2:3:fe00::
+```
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ doc/user/static.rst                                |   14 +++
+ staticd/static_vty.c                               |   24 +++++-
+ tests/topotests/srv6_static_route_ipv4/__init__.py |    0 
+ .../expected_srv6_route.json                       |   28 +++++++
+ tests/topotests/srv6_static_route_ipv4/r1/frr.conf |    7 ++
+ tests/topotests/srv6_static_route_ipv4/r1/setup.sh |    2 
+ .../srv6_static_route_ipv4/test_srv6_route.py      |   82 ++++++++++++++++++++
+ 7 files changed, 153 insertions(+), 4 deletions(-)
+ create mode 100644 tests/topotests/srv6_static_route_ipv4/__init__.py
+ create mode 100644 tests/topotests/srv6_static_route_ipv4/expected_srv6_route.json
+ create mode 100644 tests/topotests/srv6_static_route_ipv4/r1/frr.conf
+ create mode 100644 tests/topotests/srv6_static_route_ipv4/r1/setup.sh
+ create mode 100755 tests/topotests/srv6_static_route_ipv4/test_srv6_route.py
+
+diff --git a/doc/user/static.rst b/doc/user/static.rst
+index 5bf5004a6..0ce6e2107 100644
+--- a/doc/user/static.rst
++++ b/doc/user/static.rst
+@@ -177,6 +177,20 @@ multiple segments instructions.
+   [..]
+   S>* 2005::/64 [1/0] is directly connected, ens3, seg6 2001:db8:aaaa::7,2002::4,2002::3,2002::2, weight 1, 00:00:06
+ 
++STATIC also supports steering of IPv4 traffic over an SRv6 SID list, as shown in the example below.
++
++.. code-block:: frr
++
++  ip route A.B.C.D <A.B.C.D|nexthop> segments U:U::U:U/Y:Y::Y:Y/Z:Z::Z:Z
++
++::
++
++  router(config)# ip route 10.0.0.0/24 sr0 segments fcbb:bbbb:1:2:3:fe00::
++
++  router# show ip route
++  [..]
++  S>* 10.0.0.0/24 [1/0] is directly connected, sr0, seg6 fcbb:bbbb:1:2:3:fe00::, weight 1, 00:00:06
++
+ SRv6 Static SIDs Commands
+ =========================
+ 
+diff --git a/staticd/static_vty.c b/staticd/static_vty.c
+index a6b4415e2..994028062 100644
+--- a/staticd/static_vty.c
++++ b/staticd/static_vty.c
+@@ -564,6 +564,7 @@ DEFPY_YANG(ip_route_address_interface,
+ 	  |onlink$onlink                               \
+ 	  |color (1-4294967295)                        \
+ 	  |bfd$bfd [{multi-hop$bfd_multi_hop|source A.B.C.D$bfd_source|profile BFDPROF$bfd_profile}] \
++	  |segments WORD \
+           }]",
+       NO_STR IP_STR
+       "Establish static routes\n"
+@@ -589,7 +590,9 @@ DEFPY_YANG(ip_route_address_interface,
+       BFD_INTEGRATION_SOURCE_STR
+       BFD_INTEGRATION_SOURCEV4_STR
+       BFD_PROFILE_STR
+-      BFD_PROFILE_NAME_STR)
++      BFD_PROFILE_NAME_STR
++      "Steer this route over an SRv6 SID list\n"
++      "SRv6 SID list\n")
+ {
+ 	struct static_route_args args = {
+ 		.delete = !!no,
+@@ -611,6 +614,7 @@ DEFPY_YANG(ip_route_address_interface,
+ 		.bfd_multi_hop = !!bfd_multi_hop,
+ 		.bfd_source = bfd_source_str,
+ 		.bfd_profile = bfd_profile,
++		.segs = segments,
+ 	};
+ 
+ 	return static_route_nb_run(vty, &args);
+@@ -631,6 +635,7 @@ DEFPY_YANG(ip_route_address_interface_vrf,
+ 	  |onlink$onlink                               \
+ 	  |color (1-4294967295)                        \
+ 	  |bfd$bfd [{multi-hop$bfd_multi_hop|source A.B.C.D$bfd_source|profile BFDPROF$bfd_profile}] \
++	  |segments WORD \
+ 	  }]",
+       NO_STR IP_STR
+       "Establish static routes\n"
+@@ -655,7 +660,9 @@ DEFPY_YANG(ip_route_address_interface_vrf,
+       BFD_INTEGRATION_SOURCE_STR
+       BFD_INTEGRATION_SOURCEV4_STR
+       BFD_PROFILE_STR
+-      BFD_PROFILE_NAME_STR)
++      BFD_PROFILE_NAME_STR
++      "Steer this route over an SRv6 SID list\n"
++      "SRv6 SID list\n")
+ {
+ 	struct static_route_args args = {
+ 		.delete = !!no,
+@@ -677,6 +684,7 @@ DEFPY_YANG(ip_route_address_interface_vrf,
+ 		.bfd_multi_hop = !!bfd_multi_hop,
+ 		.bfd_source = bfd_source_str,
+ 		.bfd_profile = bfd_profile,
++		.segs = segments,
+ 	};
+ 
+ 	return static_route_nb_run(vty, &args);
+@@ -696,6 +704,7 @@ DEFPY_YANG(ip_route,
+ 	  |nexthop-vrf NAME                            \
+ 	  |color (1-4294967295)                        \
+ 	  |bfd$bfd [{multi-hop$bfd_multi_hop|source A.B.C.D$bfd_source|profile BFDPROF$bfd_profile}] \
++	  |segments WORD \
+           }]",
+       NO_STR IP_STR
+       "Establish static routes\n"
+@@ -720,7 +729,9 @@ DEFPY_YANG(ip_route,
+       BFD_INTEGRATION_SOURCE_STR
+       BFD_INTEGRATION_SOURCEV4_STR
+       BFD_PROFILE_STR
+-      BFD_PROFILE_NAME_STR)
++      BFD_PROFILE_NAME_STR
++      "Steer this route over an SRv6 SID list\n"
++      "SRv6 SID list\n")
+ {
+ 	struct static_route_args args = {
+ 		.delete = !!no,
+@@ -741,6 +752,7 @@ DEFPY_YANG(ip_route,
+ 		.bfd_multi_hop = !!bfd_multi_hop,
+ 		.bfd_source = bfd_source_str,
+ 		.bfd_profile = bfd_profile,
++		.segs = segments,
+ 	};
+ 
+ 	return static_route_nb_run(vty, &args);
+@@ -759,6 +771,7 @@ DEFPY_YANG(ip_route_vrf,
+ 	  |nexthop-vrf NAME                            \
+ 	  |color (1-4294967295)                        \
+ 	  |bfd$bfd [{multi-hop$bfd_multi_hop|source A.B.C.D$bfd_source|profile BFDPROF$bfd_profile}] \
++	  |segments WORD \
+           }]",
+       NO_STR IP_STR
+       "Establish static routes\n"
+@@ -782,7 +795,9 @@ DEFPY_YANG(ip_route_vrf,
+       BFD_INTEGRATION_SOURCE_STR
+       BFD_INTEGRATION_SOURCEV4_STR
+       BFD_PROFILE_STR
+-      BFD_PROFILE_NAME_STR)
++      BFD_PROFILE_NAME_STR
++      "Steer this route over an SRv6 SID list\n"
++      "SRv6 SID list\n")
+ {
+ 	struct static_route_args args = {
+ 		.delete = !!no,
+@@ -803,6 +818,7 @@ DEFPY_YANG(ip_route_vrf,
+ 		.bfd_multi_hop = !!bfd_multi_hop,
+ 		.bfd_source = bfd_source_str,
+ 		.bfd_profile = bfd_profile,
++		.segs = segments,
+ 	};
+ 
+ 	return static_route_nb_run(vty, &args);
+diff --git a/tests/topotests/srv6_static_route_ipv4/__init__.py b/tests/topotests/srv6_static_route_ipv4/__init__.py
+new file mode 100644
+index 000000000..e69de29bb
+diff --git a/tests/topotests/srv6_static_route_ipv4/expected_srv6_route.json b/tests/topotests/srv6_static_route_ipv4/expected_srv6_route.json
+new file mode 100644
+index 000000000..57f4c4488
+--- /dev/null
++++ b/tests/topotests/srv6_static_route_ipv4/expected_srv6_route.json
+@@ -0,0 +1,28 @@
++{
++	"192.0.2.0/24": [
++		{
++			"prefix": "192.0.2.0/24",
++			"prefixLen": 24,
++			"protocol": "static",
++			"selected": true,
++			"destSelected": true,
++			"distance": 1,
++			"metric": 0,
++			"installed": true,
++			"nexthops": [
++				{
++					"directlyConnected": true,
++					"active": true,
++					"weight": 1,
++					"seg6local": {
++						"action": "unspec"
++					},
++					"seg6": [
++						"fcbb:bbbb:1:2:3:4:5:6",
++						"fcbb:bbbb:7:8:fe00::"
++					]
++				}
++			]
++		}
++	]
++}
+diff --git a/tests/topotests/srv6_static_route_ipv4/r1/frr.conf b/tests/topotests/srv6_static_route_ipv4/r1/frr.conf
+new file mode 100644
+index 000000000..8ff23ec1b
+--- /dev/null
++++ b/tests/topotests/srv6_static_route_ipv4/r1/frr.conf
+@@ -0,0 +1,7 @@
++hostname r1
++!
++log stdout notifications
++log commands
++!
++ipv6 route fcbb:bbbb:1::/48 sr0
++ip route 192.0.2.0/24 sr0 segments fcbb:bbbb:1:2:3:4:5:6/fcbb:bbbb:7:8:fe00::
+diff --git a/tests/topotests/srv6_static_route_ipv4/r1/setup.sh b/tests/topotests/srv6_static_route_ipv4/r1/setup.sh
+new file mode 100644
+index 000000000..4b6cce89f
+--- /dev/null
++++ b/tests/topotests/srv6_static_route_ipv4/r1/setup.sh
+@@ -0,0 +1,2 @@
++ip link add sr0 type dummy
++ip link set sr0 up
+diff --git a/tests/topotests/srv6_static_route_ipv4/test_srv6_route.py b/tests/topotests/srv6_static_route_ipv4/test_srv6_route.py
+new file mode 100755
+index 000000000..b49a9cec8
+--- /dev/null
++++ b/tests/topotests/srv6_static_route_ipv4/test_srv6_route.py
+@@ -0,0 +1,82 @@
++#!/usr/bin/env python
++# SPDX-License-Identifier: ISC
++
++#
++# test_srv6_static_route_ipv4.py
++#
++# Copyright 2025
++# Carmine Scarpitta <cscarpit.@cisco.com>
++#
++
++"""
++test_srv6_static_route_ipv4.py:
++Test for SRv6 static route on zebra
++"""
++
++import os
++import sys
++import json
++import pytest
++import functools
++
++CWD = os.path.dirname(os.path.realpath(__file__))
++sys.path.append(os.path.join(CWD, "../"))
++
++# pylint: disable=C0413
++from lib import topotest
++from lib.topogen import Topogen, TopoRouter, get_topogen
++from lib.topolog import logger
++
++pytestmark = [pytest.mark.staticd]
++
++
++def open_json_file(filename):
++    try:
++        with open(filename, "r") as f:
++            return json.load(f)
++    except IOError:
++        assert False, "Could not read file {}".format(filename)
++
++
++def setup_module(mod):
++    tgen = Topogen({None: "r1"}, mod.__name__)
++    tgen.start_topology()
++    for rname, router in tgen.routers().items():
++        router.run("/bin/bash {}/{}/setup.sh".format(CWD, rname))
++        router.load_frr_config("frr.conf")
++    tgen.start_router()
++
++
++def teardown_module():
++    tgen = get_topogen()
++    tgen.stop_topology()
++
++
++def test_srv6_static_route():
++    tgen = get_topogen()
++    if tgen.routers_have_failure():
++        pytest.skip(tgen.errors)
++    router = tgen.gears["r1"]
++
++    def _check_srv6_static_route(router, expected_route_file):
++        logger.info("checking zebra srv6 static route with multiple segs status")
++        output = json.loads(router.vtysh_cmd("show ip route static json"))
++        expected = open_json_file("{}/{}".format(CWD, expected_route_file))
++        return topotest.json_cmp(output, expected)
++
++    def check_srv6_static_route(router, expected_file):
++        func = functools.partial(_check_srv6_static_route, router, expected_file)
++        _, result = topotest.run_and_expect(func, None, count=15, wait=1)
++        assert result is None, "Failed"
++
++    # FOR DEVELOPER:
++    # If you want to stop some specific line and start interactive shell,
++    # please use tgen.mininet_cli() to start it.
++
++    logger.info("Test for srv6 route configuration")
++    check_srv6_static_route(router, "expected_srv6_route.json")
++
++
++if __name__ == "__main__":
++    args = ["-s"] + sys.argv[1:]
++    sys.exit(pytest.main(args))
diff --git a/src/sonic-frr/patch/0021-Disable-ipv6-src-address-test-in-pceplib.patch b/src/sonic-frr/patch/0021-Disable-ipv6-src-address-test-in-pceplib.patch
deleted file mode 100644
index 3bf2fa42eae..00000000000
--- a/src/sonic-frr/patch/0021-Disable-ipv6-src-address-test-in-pceplib.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 54ac159d360a8fc9e8fcb19d984e8230e16f6fc0 Mon Sep 17 00:00:00 2001
-From: Syed Hasan Raza Naqvi <syed.naqvi@broadcom.com>
-Date: Wed, 4 May 2022 05:11:01 +0000
-Subject: [PATCH] From dfe0158344ea581370dd2dba8e4db189cf369147 Mon Sep 17
- 00:00:00 2001 Subject: [PATCH] Disable ipv6 src address test in pcep. Docker
- lo interface  doesn't have ipv6 enabled. Socket bind returns cannot assign
- requested  address.
-
-
-diff --git a/pceplib/test/pcep_socket_comm_test.c b/pceplib/test/pcep_socket_comm_test.c
-index 116531f12..8b71a5090 100644
---- a/pceplib/test/pcep_socket_comm_test.c
-+++ b/pceplib/test/pcep_socket_comm_test.c
-@@ -92,7 +92,7 @@ void pcep_socket_comm_test_setup()
- 	inet_pton(AF_INET, "127.0.0.1", &(test_host_ip));
- 	inet_pton(AF_INET, "127.0.0.1", &(test_src_ip));
- 	inet_pton(AF_INET6, "::1", &(test_host_ipv6));
--	inet_pton(AF_INET6, "::1", &(test_src_ipv6));
-+	inet_pton(AF_INET6, "::", &(test_src_ipv6));
- }
- 
- void pcep_socket_comm_test_teardown()
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0021-lib-Return-duplicate-prefix-list-entry-test.patch b/src/sonic-frr/patch/0021-lib-Return-duplicate-prefix-list-entry-test.patch
new file mode 100644
index 00000000000..59e3b6e4cac
--- /dev/null
+++ b/src/sonic-frr/patch/0021-lib-Return-duplicate-prefix-list-entry-test.patch
@@ -0,0 +1,61 @@
+From 8384d41144496019725c1e250abd0ceea854341f Mon Sep 17 00:00:00 2001
+From: Donatas Abraitis <donatas@opensourcerouting.org>
+Date: Tue, 25 Mar 2025 13:54:24 +0200
+Subject: [PATCH] lib: Return duplicate prefix-list entry test If we do e.g.:
+
+ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32
+ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32
+ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32
+
+We end up, having duplicate records with a different sequence number only.
+Also ported the same changes for ipv6 also.
+---
+ lib/filter_cli.c | 25 ++++++++++++++++---------
+ 1 file changed, 16 insertions(+), 9 deletions(-)
+
+diff --git a/lib/filter_cli.c b/lib/filter_cli.c
+index c40c2a75f..2012fa987 100644
+--- a/lib/filter_cli.c
++++ b/lib/filter_cli.c
+@@ -1206,10 +1206,14 @@ DEFPY_YANG(
+ 	snprintf(xpath, sizeof(xpath),
+ 		 "/frr-filter:lib/prefix-list[type='ipv4'][name='%s']", name);
+ 	if (seq_str == NULL) {
+-		/* Use XPath to find the next sequence number. */
+-		sseq = acl_get_seq(vty, xpath, false);
+-		if (sseq < 0)
+-			return CMD_WARNING_CONFIG_FAILED;
++		if (plist_is_dup(vty->candidate_config->dnode, &pda))
++			sseq = pda.pda_seq;
++		else {
++			/* Use XPath to find the next sequence number. */
++			sseq = acl_get_seq(vty, xpath, false);
++			if (sseq < 0)
++				return CMD_WARNING_CONFIG_FAILED;
++		}
+ 
+ 		snprintfrr(xpath_entry, sizeof(xpath_entry),
+ 			   "%s/entry[sequence='%" PRId64 "']", xpath, sseq);
+@@ -1396,11 +1400,14 @@ DEFPY_YANG(
+ 	snprintf(xpath, sizeof(xpath),
+ 		 "/frr-filter:lib/prefix-list[type='ipv6'][name='%s']", name);
+ 	if (seq_str == NULL) {
+-		/* Use XPath to find the next sequence number. */
+-		sseq = acl_get_seq(vty, xpath, false);
+-		if (sseq < 0)
+-			return CMD_WARNING_CONFIG_FAILED;
+-
++		if (plist_is_dup(vty->candidate_config->dnode, &pda))
++			sseq = pda.pda_seq;
++		else {
++			/* Use XPath to find the next sequence number. */
++			sseq = acl_get_seq(vty, xpath, false);
++			if (sseq < 0)
++				return CMD_WARNING_CONFIG_FAILED;
++		}
+ 		snprintfrr(xpath_entry, sizeof(xpath_entry),
+ 			   "%s/entry[sequence='%" PRId64 "']", xpath, sseq);
+ 	} else
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0022-This-error-happens-when-we-try-to-write-to-a-socket.patch b/src/sonic-frr/patch/0022-This-error-happens-when-we-try-to-write-to-a-socket.patch
new file mode 100644
index 00000000000..a2bc93907f1
--- /dev/null
+++ b/src/sonic-frr/patch/0022-This-error-happens-when-we-try-to-write-to-a-socket.patch
@@ -0,0 +1,36 @@
+From b6588aa5aba1531277e78bb2824334acc52493eb Mon Sep 17 00:00:00 2001
+From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
+Date: Wed, 5 Mar 2025 00:55:58 -0800
+Subject: [PATCH] [MGMTD] This error happens when we try to write to a socket or pipe
+ which is already closed by peer.  For e.g., the other side may have been
+ killed during warmboot or using pkill. Hence, changing the log level to INFO
+
+---
+ lib/mgmt_msg.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/lib/mgmt_msg.c b/lib/mgmt_msg.c
+index aff9af7e8..0a0f17ffe 100644
+--- a/lib/mgmt_msg.c
++++ b/lib/mgmt_msg.c
+@@ -28,6 +28,8 @@
+ #define MGMT_MSG_ERR(ms, fmt, ...)                                             \
+ 	zlog_err("%s: %s: " fmt, (ms)->idtag, __func__, ##__VA_ARGS__)
+ 
++#define MGMT_MSG_INFO(ms, fmt, ...)                                             \
++	zlog_info("%s: %s: " fmt, (ms)->idtag, __func__, ##__VA_ARGS__)
+ DEFINE_MTYPE(LIB, MSG_CONN, "msg connection state");
+ 
+ /**
+@@ -70,7 +72,7 @@ enum mgmt_msg_rsched mgmt_msg_read(struct mgmt_msg_state *ms, int fd,
+ 		}
+ 		if (n <= 0) {
+ 			if (n == 0)
+-				MGMT_MSG_ERR(ms, "got EOF/disconnect");
++				MGMT_MSG_INFO(ms, "got EOF/disconnect");
+ 			else
+ 				MGMT_MSG_ERR(ms,
+ 					     "got error while reading: '%s'",
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0022-cross-compile-changes.patch b/src/sonic-frr/patch/0022-cross-compile-changes.patch
deleted file mode 100644
index 2e618f059fc..00000000000
--- a/src/sonic-frr/patch/0022-cross-compile-changes.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 611505531a96375000184fdf191d91bd021bd35f Mon Sep 17 00:00:00 2001
-From: Saikrishna Arcot <sarcot@microsoft.com>
-Date: Wed, 6 Jul 2022 11:28:16 -0700
-Subject: [PATCH] From ece218405fe4c086017f2a4f2b2b4c86b9790db0 Mon Sep 17
- 00:00:00 2001 Subject: [PATCH] Make changes to support crosscompilation in
- SONiC
-
-Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
-
-diff --git a/debian/frr-doc.info b/debian/frr-doc.info
-deleted file mode 100644
-index 1976365e3..000000000
---- a/debian/frr-doc.info
-+++ /dev/null
-@@ -1 +0,0 @@
--build/doc/user/_build/texinfo/frr.info
-diff --git a/debian/frr.manpages b/debian/frr.manpages
-deleted file mode 100644
-index 5a1b74cfc..000000000
---- a/debian/frr.manpages
-+++ /dev/null
-@@ -1,16 +0,0 @@
--build/doc/manpages/_build/man/frr-bgpd.8
--build/doc/manpages/_build/man/frr-eigrpd.8
--build/doc/manpages/_build/man/frr-fabricd.8
--build/doc/manpages/_build/man/frr-isisd.8
--build/doc/manpages/_build/man/frr-ldpd.8
--build/doc/manpages/_build/man/frr-nhrpd.8
--build/doc/manpages/_build/man/frr-ospf6d.8
--build/doc/manpages/_build/man/frr-ospfd.8
--build/doc/manpages/_build/man/frr-pimd.8
--build/doc/manpages/_build/man/frr-ripd.8
--build/doc/manpages/_build/man/frr-ripngd.8
--build/doc/manpages/_build/man/frr-watchfrr.8
--build/doc/manpages/_build/man/frr-zebra.8
--build/doc/manpages/_build/man/frr.1
--build/doc/manpages/_build/man/mtracebis.8
--build/doc/manpages/_build/man/vtysh.1
-diff --git a/debian/rules b/debian/rules
-index 43e5d7e61..aa13106fe 100755
---- a/debian/rules
-+++ b/debian/rules
-@@ -33,10 +33,17 @@ else
-   CONF_PIM6=--disable-pim6d
- endif
- 
-+DEB_BUILD_ARCH ?= $(shell dpkg-architecture -qDEB_BUILD_ARCH)
-+DEB_HOST_ARCH ?= $(shell dpkg-architecture -qDEB_HOST_ARCH)
-+
-+ifneq ($(DEB_BUILD_ARCH),$(DEB_HOST_ARCH))
-+export PYTHON=/python_virtualenv/env3/bin/python3
-+else
- export PYTHON=python3
-+endif
- 
- %:
--	dh $@ -Bbuild --with=sphinxdoc
-+	dh $@ -Bbuild --with=sphinxdoc --builddirectory=build
- 
- override_dh_auto_configure:
- 	$(shell dpkg-buildflags --export=sh); \
-@@ -74,10 +81,10 @@ override_dh_auto_configure:
- override_dh_auto_install:
- 	dh_auto_install
- 
--	sed -e '1c #!/usr/bin/python3' -i debian/tmp/usr/lib/frr/frr-reload.py
--	sed -e '1c #!/usr/bin/python3' -i debian/tmp/usr/lib/frr/generate_support_bundle.py
--	sed -e '1c #!/usr/bin/python3' -i debian/tmp/usr/lib/frr/frr_babeltrace.py
--	sed -e '1c #!/usr/bin/python3' -i debian/tmp/usr/lib/frr/ospfclient.py
-+	sed -e '1c #!$(shell which $PYTHON)' -i debian/tmp/usr/lib/frr/frr-reload.py
-+	sed -e '1c #!$(shell which $PYTHON)' -i debian/tmp/usr/lib/frr/generate_support_bundle.py
-+	sed -e '1c #!$(shell which $PYTHON)' -i debian/tmp/usr/lib/frr/frr_babeltrace.py
-+	sed -e '1c #!$(shell which $PYTHON)' -i debian/tmp/usr/lib/frr/ospfclient.py
- 
- # let dh_systemd_* and dh_installinit do their thing automatically
- 	cp build/tools/frr.service debian/frr.service
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0023-isisd-lib-add-some-codepoints-usually-shared-with-other-vendors.patch b/src/sonic-frr/patch/0023-isisd-lib-add-some-codepoints-usually-shared-with-other-vendors.patch
new file mode 100644
index 00000000000..bd167a9e966
--- /dev/null
+++ b/src/sonic-frr/patch/0023-isisd-lib-add-some-codepoints-usually-shared-with-other-vendors.patch
@@ -0,0 +1,305 @@
+From 53263b4b620095c0c52b13883f49521ae54dfe6f Mon Sep 17 00:00:00 2001
+From: Philippe Guibert <philippe.guibert@6wind.com>
+Date: Thu, 30 Jan 2025 09:14:00 +0100
+Subject: [PATCH] isisd, lib: add some codepoints usually shared with other
+ vendors
+
+Some codepoints can not be read by interoperating with CISCO.
+This is because PSP/USP flavor are used by default, and the display of
+the isis output has to be adapted.
+
+Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
+---
+ isisd/isis_zebra.c     | 32 ++++++++++++++++++++++++++++++++
+ lib/srv6.h             | 26 +++++++++++++++++++++++++-
+ staticd/static_vty.c   | 24 ++++++++++++++++++++++++
+ staticd/static_zebra.c | 41 +++++++++++++++++++++++++++++++++++++++++
+ 4 files changed, 122 insertions(+), 1 deletion(-)
+
+diff --git a/isisd/isis_zebra.c b/isisd/isis_zebra.c
+index caf7d3ddfbfc..eb5a567886ef 100644
+--- a/isisd/isis_zebra.c
++++ b/isisd/isis_zebra.c
+@@ -998,6 +998,14 @@ void isis_zebra_srv6_sid_install(struct isis_area *area,
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT4_USID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT46_USID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	default:
+ 		zlog_err(
+ 			"ISIS-SRv6 (%s): unsupported SRv6 endpoint behavior %u",
+@@ -1055,6 +1063,14 @@ void isis_zebra_srv6_sid_uninstall(struct isis_area *area,
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT4_USID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT46_USID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	default:
+ 		zlog_err(
+ 			"ISIS-SRv6 (%s): unsupported SRv6 endpoint behavior %u",
+@@ -1120,6 +1136,14 @@ void isis_zebra_srv6_adj_sid_install(struct srv6_adjacency *sra)
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT4_USID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT46_USID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	default:
+ 		zlog_err(
+ 			"ISIS-SRv6 (%s): unsupported SRv6 endpoint behavior %u",
+@@ -1166,6 +1190,14 @@ void isis_zebra_srv6_adj_sid_uninstall(struct srv6_adjacency *sra)
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT4_USID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT46_USID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	default:
+ 		zlog_err(
+ 			"ISIS-SRv6 (%s): unsupported SRv6 endpoint behavior %u",
+diff --git a/lib/srv6.h b/lib/srv6.h
+index 011705504e74..3200aee70a8b 100644
+--- a/lib/srv6.h
++++ b/lib/srv6.h
+@@ -176,12 +176,20 @@ struct srv6_locator_chunk {
+ enum srv6_endpoint_behavior_codepoint {
+ 	SRV6_ENDPOINT_BEHAVIOR_RESERVED         = 0x0000,
+ 	SRV6_ENDPOINT_BEHAVIOR_END              = 0x0001,
++	SRV6_ENDPOINT_BEHAVIOR_END_PSP          = 0x0002,
+ 	SRV6_ENDPOINT_BEHAVIOR_END_X            = 0x0005,
++	SRV6_ENDPOINT_BEHAVIOR_END_X_PSP        = 0x0006,
+ 	SRV6_ENDPOINT_BEHAVIOR_END_DT6          = 0x0012,
+ 	SRV6_ENDPOINT_BEHAVIOR_END_DT4          = 0x0013,
+ 	SRV6_ENDPOINT_BEHAVIOR_END_DT46         = 0x0014,
++	SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD      = 0x001D,
++	SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD    = 0x0021,
+ 	SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID    = 0x002B,
+-	SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID  = 0x002C,
++	SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID  = 0x0034,
++	SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP   = 0x002C,
++	SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD   = 0x0030,
++	SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP = 0x0035,
++	SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD = 0x0039,
+ 	SRV6_ENDPOINT_BEHAVIOR_END_DT6_USID     = 0x003E,
+ 	SRV6_ENDPOINT_BEHAVIOR_END_DT4_USID     = 0x003F,
+ 	SRV6_ENDPOINT_BEHAVIOR_END_DT46_USID    = 0x0040,
+@@ -199,8 +207,16 @@ srv6_endpoint_behavior_codepoint2str(enum srv6_endpoint_behavior_codepoint behav
+ 		return "Reserved";
+ 	case SRV6_ENDPOINT_BEHAVIOR_END:
+ 		return "End";
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP:
++		return "End PSP";
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
++		return "End PSP/USD";
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X:
+ 		return "End.X";
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
++		return "End.X PSP";
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
++		return "End.X PSP/USD";
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT6:
+ 		return "End.DT6";
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT4:
+@@ -209,8 +225,16 @@ srv6_endpoint_behavior_codepoint2str(enum srv6_endpoint_behavior_codepoint behav
+ 		return "End.DT46";
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID:
+ 		return "uN";
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP:
++		return "uN PSP";
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
++		return "uN PSP/USD";
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
+ 		return "uA";
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
++		return "uA PSP";
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
++		return "uA PSP/USD";
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT6_USID:
+ 		return "uDT6";
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT4_USID:
+diff --git a/staticd/static_vty.c b/staticd/static_vty.c
+index 895846a1c73c..5c19d238835a 100644
+--- a/staticd/static_vty.c
++++ b/staticd/static_vty.c
+@@ -1696,9 +1696,21 @@ static void srv6_sid_cli_show(struct vty *vty, const struct lyd_node *sid, bool
+ 	case SRV6_ENDPOINT_BEHAVIOR_END:
+ 		vty_out(vty, " behavior End");
+ 		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP:
++		vty_out(vty, " behavior End PSP");
++		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
++		vty_out(vty, " behavior End PSP/USD");
++		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X:
+ 		vty_out(vty, " behavior End.X");
+ 		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
++		vty_out(vty, " behavior End.X PSP");
++		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
++		vty_out(vty, " behavior End.X PSP/USD");
++		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT6:
+ 		vty_out(vty, " behavior End.DT6");
+ 		break;
+@@ -1711,9 +1723,21 @@ static void srv6_sid_cli_show(struct vty *vty, const struct lyd_node *sid, bool
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID:
+ 		vty_out(vty, " behavior uN");
+ 		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP:
++		vty_out(vty, " behavior uN PSP");
++		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
++		vty_out(vty, " behavior uN PSP/USD");
++		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
+ 		vty_out(vty, " behavior uA");
+ 		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
++		vty_out(vty, " behavior uA PSP");
++		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
++		vty_out(vty, " behavior uA PSP/USD");
++		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT6_USID:
+ 		vty_out(vty, " behavior uDT6");
+ 		break;
+diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
+index 9a794d4d02cc..552dd3ee1f74 100644
+--- a/staticd/static_zebra.c
++++ b/staticd/static_zebra.c
+@@ -631,9 +631,20 @@ void static_zebra_srv6_sid_install(struct static_srv6_sid *sid)
+ 	}
+ 
+ 	switch (sid->behavior) {
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP:
++		action = ZEBRA_SEG6_LOCAL_ACTION_END;
++		SET_SRV6_FLV_OP(ctx.flv.flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_PSP);
++		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END:
+ 		action = ZEBRA_SEG6_LOCAL_ACTION_END;
+ 		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP:
++		action = ZEBRA_SEG6_LOCAL_ACTION_END;
++		SET_SRV6_FLV_OP(ctx.flv.flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_NEXT_CSID);
++		SET_SRV6_FLV_OP(ctx.flv.flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_PSP);
++		ctx.flv.lcblock_len = sid->locator->block_bits_length;
++		ctx.flv.lcnode_func_len = sid->locator->node_bits_length;
++		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID:
+ 		action = ZEBRA_SEG6_LOCAL_ACTION_END;
+ 		SET_SRV6_FLV_OP(ctx.flv.flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_NEXT_CSID);
+@@ -691,8 +702,14 @@ void static_zebra_srv6_sid_install(struct static_srv6_sid *sid)
+ 			return;
+ 		}
+ 		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
+ 	case SRV6_ENDPOINT_BEHAVIOR_RESERVED:
+ 		zlog_warn("unsupported behavior: %u", sid->behavior);
+@@ -764,7 +781,9 @@ void static_zebra_srv6_sid_uninstall(struct static_srv6_sid *sid)
+ 
+ 	switch (sid->behavior) {
+ 	case SRV6_ENDPOINT_BEHAVIOR_END:
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP:
+ 		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT6:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT6_USID:
+@@ -811,8 +830,14 @@ void static_zebra_srv6_sid_uninstall(struct static_srv6_sid *sid)
+ 			return;
+ 		}
+ 		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
+ 	case SRV6_ENDPOINT_BEHAVIOR_RESERVED:
+ 		zlog_warn("unsupported behavior: %u", sid->behavior);
+@@ -872,7 +897,9 @@ extern void static_zebra_request_srv6_sid(struct static_srv6_sid *sid)
+ 	/* convert `srv6_endpoint_behavior_codepoint` to `seg6local_action_t` */
+ 	switch (sid->behavior) {
+ 	case SRV6_ENDPOINT_BEHAVIOR_END:
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP:
+ 		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END;
+ 		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT6:
+@@ -914,8 +941,14 @@ extern void static_zebra_request_srv6_sid(struct static_srv6_sid *sid)
+ 		}
+ 
+ 		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
+ 	case SRV6_ENDPOINT_BEHAVIOR_RESERVED:
+ 		zlog_warn("unsupported behavior: %u", sid->behavior);
+@@ -940,7 +973,9 @@ extern void static_zebra_release_srv6_sid(struct static_srv6_sid *sid)
+ 	/* convert `srv6_endpoint_behavior_codepoint` to `seg6local_action_t` */
+ 	switch (sid->behavior) {
+ 	case SRV6_ENDPOINT_BEHAVIOR_END:
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP:
+ 		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END;
+ 		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT6:
+@@ -982,8 +1017,14 @@ extern void static_zebra_release_srv6_sid(struct static_srv6_sid *sid)
+ 		}
+ 
+ 		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
++	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
+ 	case SRV6_ENDPOINT_BEHAVIOR_RESERVED:
+ 		zlog_warn("unsupported behavior: %u", sid->behavior);
\ No newline at end of file
diff --git a/src/sonic-frr/patch/0024-staticd-Add-support-for-SRv6-uA-behavior.patch b/src/sonic-frr/patch/0024-staticd-Add-support-for-SRv6-uA-behavior.patch
new file mode 100644
index 00000000000..d64ce077862
--- /dev/null
+++ b/src/sonic-frr/patch/0024-staticd-Add-support-for-SRv6-uA-behavior.patch
@@ -0,0 +1,1043 @@
+From feff426771999343008afe05efe680aa7cf63985 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Mon, 24 Jun 2024 20:28:50 +0200
+Subject: [PATCH 01/13] lib: Add ifindex to SRv6 SID context
+
+The uA behavior is associated with an interface and the IP address of
+the nexthop. However, the current SID context data structure only
+includes the IP address. It lacks the interface.
+
+This commit extends the SID context data structure by adding the
+ifindex. This extension allows daemons to allocate uA SIDs with
+the required interface and IP address.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ lib/srv6.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/lib/srv6.h b/lib/srv6.h
+index 3200aee70a8b..467f02a3c9e9 100644
+--- a/lib/srv6.h
++++ b/lib/srv6.h
+@@ -321,6 +321,7 @@ struct srv6_sid_ctx {
+ 	struct in_addr nh4;
+ 	struct in6_addr nh6;
+ 	vrf_id_t vrf_id;
++	ifindex_t ifindex;
+ };
+ 
+ static inline const char *seg6_mode2str(enum seg6_mode_t mode)
+
+From 99742410bf0a57e933ea3a7ecaca4004b08e5f30 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Thu, 13 Feb 2025 10:51:28 +0100
+Subject: [PATCH 02/13] yang: Extend staticd YANG model to support the SRv6 uA
+ behavior
+
+The SRv6 uA behavior is associated with a L3 adjacency.
+
+This commit extends the staticd YANG model by adding two leafs
+`interface` and `next-hop` under the `static-sids` container. This
+extension allows us to associate an interface and a nexthop when
+configuring an SRv6 uA SID.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ yang/frr-staticd.yang | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/yang/frr-staticd.yang b/yang/frr-staticd.yang
+index 8d0e58c0a5c3..3bf3a5e81764 100644
+--- a/yang/frr-staticd.yang
++++ b/yang/frr-staticd.yang
+@@ -12,6 +12,10 @@ module frr-staticd {
+     prefix frr-nexthop;
+   }
+ 
++  import frr-interface {
++    prefix frr-interface;
++  }
++
+   import ietf-inet-types {
+     prefix inet;
+   }
+@@ -240,6 +244,24 @@ module frr-staticd {
+                 description
+                   "The VRF name.";
+               }
++              list paths {
++                key "path-index";
++                leaf path-index {
++                  type uint8;
++                  description
++                    "Path index";
++                }
++                leaf interface {
++                  type frr-interface:interface-ref;
++                  description
++                    "Interface name.";
++                }
++                leaf next-hop {
++                  type inet:ip-address;
++                  description
++                    "Nexthop IP address.";
++                }
++              }
+             }
+           }
+         }
+
+From 7438a94eeb3d054cc9e375c4a5dd73708dcee37f Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Thu, 13 Feb 2025 10:59:13 +0100
+Subject: [PATCH 03/13] staticd: Add nb callbacks to configure an interface for
+ SRv6 uA behavior
+
+An SRv6 uA SID is associated with the interface and (optionally) the
+IPv6 address of the nexthop.
+
+This commit adds the modify and destroy nortbound callbacks required to
+set the interface.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_nb.c        | 14 ++++++++++
+ staticd/static_nb.h        | 12 +++++++++
+ staticd/static_nb_config.c | 55 ++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 81 insertions(+)
+
+diff --git a/staticd/static_nb.c b/staticd/static_nb.c
+index ef363bfe7e62..bec151e6635c 100644
+--- a/staticd/static_nb.c
++++ b/staticd/static_nb.c
+@@ -156,6 +156,20 @@ const struct frr_yang_module_info frr_staticd_info = {
+ 				.destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_destroy,
+ 			}
+ 		},
++		{
++			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/static-sids/sid/paths",
++			.cbs = {
++				.create = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_create,
++				.destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_destroy,
++			}
++		},
++		{
++			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/static-sids/sid/paths/interface",
++			.cbs = {
++				.modify = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_interface_modify,
++				.destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_interface_destroy,
++			}
++		},
+ 		{
+ 			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/static-sids/sid/locator-name",
+ 			.cbs = {
+diff --git a/staticd/static_nb.h b/staticd/static_nb.h
+index aa11f340212b..878a78772b7a 100644
+--- a/staticd/static_nb.h
++++ b/staticd/static_nb.h
+@@ -96,6 +96,14 @@ int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routi
+ 	struct nb_cb_modify_args *args);
+ int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_destroy(
+ 	struct nb_cb_destroy_args *args);
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_create(
++	struct nb_cb_create_args *args);
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_destroy(
++	struct nb_cb_destroy_args *args);
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_interface_modify(
++	struct nb_cb_modify_args *args);
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_interface_destroy(
++	struct nb_cb_destroy_args *args);
+ int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_modify(
+ 	struct nb_cb_modify_args *args);
+ int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_destroy(
+@@ -183,6 +191,10 @@ int routing_control_plane_protocols_name_validate(
+ 
+ #define FRR_STATIC_SRV6_SID_LOCATOR_NAME_XPATH "/locator-name"
+ 
++#define FRR_STATIC_SRV6_SID_INTERFACE_XPATH "/paths[path-index=%u]/interface"
++
++#define FRR_STATIC_SRV6_SID_NEXTHOP_XPATH "/next-hop"
++
+ #ifdef __cplusplus
+ }
+ #endif
+diff --git a/staticd/static_nb_config.c b/staticd/static_nb_config.c
+index e2ab1f2ffefe..fb3e2d0f837d 100644
+--- a/staticd/static_nb_config.c
++++ b/staticd/static_nb_config.c
+@@ -1229,6 +1229,61 @@ int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routi
+ 	return NB_OK;
+ }
+ 
++/*
++ * XPath:
++ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/static-sids/sid/paths
++ */
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_create(
++	struct nb_cb_create_args *args)
++{
++	/* Actual setting is done in apply_finish */
++	return NB_OK;
++}
++
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_destroy(
++	struct nb_cb_destroy_args *args)
++{
++	return NB_OK;
++}
++
++/*
++ * XPath:
++ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/static-sids/sid/paths/interface
++ */
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_interface_modify(
++	struct nb_cb_modify_args *args)
++{
++	struct static_srv6_sid *sid;
++	const char *ifname;
++
++	if (args->event != NB_EV_APPLY)
++		return NB_OK;
++
++	sid = nb_running_get_entry(args->dnode, NULL, true);
++
++	/* Release and uninstall existing SID, if any, before requesting the new one */
++	if (CHECK_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_VALID)) {
++		static_zebra_release_srv6_sid(sid);
++		UNSET_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_VALID);
++	}
++
++	if (CHECK_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_SENT_TO_ZEBRA)) {
++		static_zebra_srv6_sid_uninstall(sid);
++		UNSET_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_SENT_TO_ZEBRA);
++	}
++
++	ifname = yang_dnode_get_string(args->dnode, "../interface");
++	snprintf(sid->attributes.ifname, sizeof(sid->attributes.ifname), "%s", ifname);
++
++	return NB_OK;
++}
++
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_interface_destroy(
++	struct nb_cb_destroy_args *args)
++{
++	return NB_OK;
++}
++
+ /*
+  * XPath:
+  * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/static-sids/sid/vrf-name
+
+From 646c4f95d9aa978558757df58d013e78f0c50363 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Thu, 13 Feb 2025 10:59:40 +0100
+Subject: [PATCH 04/13] staticd: Add nb callbacks to configure a nexthop for
+ SRv6 uA behavior
+
+An SRv6 uA SID is associated with the interface and (optionally) the
+IPv6 address of the nexthop.
+
+This commit adds the modify and destroy nortbound callbacks required to
+set the nexthop.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_nb.c        |  7 +++++
+ staticd/static_nb.h        |  6 ++++-
+ staticd/static_nb_config.c | 52 ++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 64 insertions(+), 1 deletion(-)
+
+diff --git a/staticd/static_nb.c b/staticd/static_nb.c
+index bec151e6635c..60dc3dc788c7 100644
+--- a/staticd/static_nb.c
++++ b/staticd/static_nb.c
+@@ -170,6 +170,13 @@ const struct frr_yang_module_info frr_staticd_info = {
+ 				.destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_interface_destroy,
+ 			}
+ 		},
++		{
++			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/static-sids/sid/paths/next-hop",
++			.cbs = {
++				.modify = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_next_hop_modify,
++				.destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_next_hop_destroy,
++			}
++		},
+ 		{
+ 			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/static-sids/sid/locator-name",
+ 			.cbs = {
+diff --git a/staticd/static_nb.h b/staticd/static_nb.h
+index 878a78772b7a..282c9dcf11c5 100644
+--- a/staticd/static_nb.h
++++ b/staticd/static_nb.h
+@@ -104,6 +104,10 @@ int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routi
+ 	struct nb_cb_modify_args *args);
+ int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_interface_destroy(
+ 	struct nb_cb_destroy_args *args);
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_next_hop_modify(
++	struct nb_cb_modify_args *args);
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_next_hop_destroy(
++	struct nb_cb_destroy_args *args);
+ int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_modify(
+ 	struct nb_cb_modify_args *args);
+ int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_destroy(
+@@ -193,7 +197,7 @@ int routing_control_plane_protocols_name_validate(
+ 
+ #define FRR_STATIC_SRV6_SID_INTERFACE_XPATH "/paths[path-index=%u]/interface"
+ 
+-#define FRR_STATIC_SRV6_SID_NEXTHOP_XPATH "/next-hop"
++#define FRR_STATIC_SRV6_SID_NEXTHOP_XPATH "/paths[path-index=%u]/next-hop"
+ 
+ #ifdef __cplusplus
+ }
+diff --git a/staticd/static_nb_config.c b/staticd/static_nb_config.c
+index fb3e2d0f837d..71df15fa6123 100644
+--- a/staticd/static_nb_config.c
++++ b/staticd/static_nb_config.c
+@@ -1284,6 +1284,58 @@ int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routi
+ 	return NB_OK;
+ }
+ 
++/*
++ * XPath:
++ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/static-sids/sid/paths/next-hop
++ */
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_next_hop_modify(
++	struct nb_cb_modify_args *args)
++{
++	struct static_srv6_sid *sid;
++	struct ipaddr nexthop;
++
++	switch (args->event) {
++	case NB_EV_VALIDATE:
++		zlog_info("validating nexthop %pI6", &nexthop.ipaddr_v6);
++		yang_dnode_get_ip(&nexthop, args->dnode, "../next-hop");
++		if (!IS_IPADDR_V6(&nexthop)) {
++			snprintf(args->errmsg, args->errmsg_len,
++				 "%% Nexthop must be an IPv6 address");
++			return NB_ERR_VALIDATION;
++		}
++		break;
++	case NB_EV_ABORT:
++	case NB_EV_PREPARE:
++		break;
++	case NB_EV_APPLY:
++		sid = nb_running_get_entry(args->dnode, NULL, true);
++
++		/* Release and uninstall existing SID, if any, before requesting the new one */
++		if (CHECK_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_VALID)) {
++			static_zebra_release_srv6_sid(sid);
++			UNSET_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_VALID);
++		}
++
++		if (CHECK_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_SENT_TO_ZEBRA)) {
++			static_zebra_srv6_sid_uninstall(sid);
++			UNSET_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_SENT_TO_ZEBRA);
++		}
++
++		yang_dnode_get_ip(&nexthop, args->dnode, "../next-hop");
++		sid->attributes.nh6 = nexthop.ipaddr_v6;
++
++		break;
++	}
++
++	return NB_OK;
++}
++
++int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_paths_next_hop_destroy(
++	struct nb_cb_destroy_args *args)
++{
++	return NB_OK;
++}
++
+ /*
+  * XPath:
+  * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/static-sids/sid/vrf-name
+
+From ec5ff367b120e67c9e7bd87ffa8baa2334e75628 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Thu, 13 Feb 2025 11:01:11 +0100
+Subject: [PATCH 05/13] staticd: Extend `static_zebra_request_srv6_sid` to
+ request SRv6 uA SIDs
+
+In order to configure an SRv6 uA SID in staticd, staticd should request
+SRv6 SID Manager to allocate a SID bound to the uA behavior.
+Currently, `static_zebra_request_srv6_sid` does not support requesting
+SIDs bound to the uA behavior.
+
+This commit extends the `static_zebra_request_srv6_sid` function to
+enable staticd to request SIDs bound to the uA behavior.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_zebra.c | 16 ++++++++++++++-
+ zebra/zebra_srv6.c     | 46 ++++++++++++++++++++++++++++++++++++++++++
+ 2 files changed, 61 insertions(+), 1 deletion(-)
+
+diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
+index 552dd3ee1f74..d3ff5ee45f70 100644
+--- a/staticd/static_zebra.c
++++ b/staticd/static_zebra.c
+@@ -890,6 +890,7 @@ extern void static_zebra_request_srv6_sid(struct static_srv6_sid *sid)
+ 	struct srv6_sid_ctx ctx = {};
+ 	int ret = 0;
+ 	struct vrf *vrf;
++	struct interface *ifp;
+ 
+ 	if (!sid)
+ 		return;
+@@ -940,13 +941,23 @@ extern void static_zebra_request_srv6_sid(struct static_srv6_sid *sid)
+ 			ctx.vrf_id = vrf->vrf_id;
+ 		}
+ 
++		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
++		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_X;
++		ctx.nh6 = sid->attributes.nh6;
++		ifp = if_lookup_by_name(sid->attributes.ifname, VRF_DEFAULT);
++		if (!ifp) {
++			zlog_warn("Failed to request SRv6 SID %pFX: interface %s does not exist",
++				  &sid->addr, sid->attributes.ifname);
++			return;
++		}
++		ctx.ifindex = ifp->ifindex;
+ 		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
+-	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
+@@ -1240,6 +1251,9 @@ static int static_zebra_srv6_sid_notify(ZAPI_CALLBACK_ARGS)
+ 			return 0;
+ 		}
+ 
++		if (!IPV6_ADDR_SAME(&ctx.nh6, &in6addr_any))
++			sid->attributes.nh6 = ctx.nh6;
++
+ 		SET_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_VALID);
+ 
+ 		/*
+diff --git a/zebra/zebra_srv6.c b/zebra/zebra_srv6.c
+index 6d228c5e24f3..51efcceb75a0 100644
+--- a/zebra/zebra_srv6.c
++++ b/zebra/zebra_srv6.c
+@@ -18,6 +18,7 @@
+ #include "zebra/zebra_srv6.h"
+ #include "zebra/zebra_errors.h"
+ #include "zebra/ge_netlink.h"
++#include "zebra/interface.h"
+ 
+ #include <stdio.h>
+ #include <string.h>
+@@ -1745,6 +1746,13 @@ int get_srv6_sid(struct zebra_srv6_sid **sid, struct srv6_sid_ctx *ctx,
+ 	int ret = -1;
+ 	struct srv6_locator *locator;
+ 	char buf[256];
++	struct nhg_connected *rb_node_dep = NULL;
++	struct listnode *node;
++	struct nexthop *nexthop;
++	struct nbr_connected *nc;
++	bool found = false;
++	struct interface *ifp;
++	struct zebra_if *zebra_if;
+ 
+ 	enum srv6_sid_alloc_mode alloc_mode =
+ 		(sid_value) ? SRV6_SID_ALLOC_MODE_EXPLICIT
+@@ -1755,6 +1763,44 @@ int get_srv6_sid(struct zebra_srv6_sid **sid, struct srv6_sid_ctx *ctx,
+ 			   __func__, srv6_sid_ctx2str(buf, sizeof(buf), ctx),
+ 			   sid_value, srv6_sid_alloc_mode2str(alloc_mode));
+ 
++	if (ctx->ifindex != 0 && IPV6_ADDR_SAME(&ctx->nh6, &in6addr_any)) {
++		ifp = if_lookup_by_index(ctx->ifindex, VRF_DEFAULT);
++		if (!ifp) {
++			zlog_err("%s: interface %u does not exist", __func__, ctx->ifindex);
++			return -1;
++		}
++
++		for (ALL_LIST_ELEMENTS_RO(ifp->nbr_connected, node, nc))
++			if (nc->address && nc->address->family == AF_INET6 &&
++			    IN6_IS_ADDR_LINKLOCAL(&nc->address->u.prefix6)) {
++				ctx->nh6 = nc->address->u.prefix6;
++				found = true;
++				break;
++			}
++
++		if (!found) {
++			zebra_if = ifp->info;
++
++			frr_each (nhg_connected_tree, &zebra_if->nhg_dependents, rb_node_dep) {
++				for (ALL_NEXTHOPS(rb_node_dep->nhe->nhg, nexthop)) {
++					/* skip non link-local addresses */
++					if (!IPV6_ADDR_SAME(&nexthop->gate.ipv6, &in6addr_any)) {
++						ctx->nh6 = nexthop->gate.ipv6;
++						found = true;
++						break;
++					}
++				}
++				if (found)
++					break;
++			}
++			if (!found) {
++				zlog_err("%s: cannot get SID, interface (ifindex %u) not found",
++					 __func__, ctx->ifindex);
++				return -1;
++			}
++		}
++	}
++
+ 	if (alloc_mode == SRV6_SID_ALLOC_MODE_EXPLICIT) {
+ 		/*
+ 		 * Explicit SID allocation: allocate a specific SID value
+
+From cc84e522810542105d9b358b3cbefe4fdf694c5c Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Thu, 13 Feb 2025 11:02:23 +0100
+Subject: [PATCH 06/13] staticd: Extend `static_zebra_release_srv6_sid` to
+ release SRv6 uA SIDs
+
+When removing an SRv6 uA SID, staticd should ask SRv6 SID Manager to
+release the SID.
+Currently, `static_zebra_release_srv6_sid` does not allow to release uA
+SIDs.
+
+This commit extends `static_zebra_release_srv6_sid` to allow staticd to
+release SRv6 uA SIDs.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_zebra.c | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
+index d3ff5ee45f70..ec425a4afcd4 100644
+--- a/staticd/static_zebra.c
++++ b/staticd/static_zebra.c
+@@ -977,6 +977,7 @@ extern void static_zebra_release_srv6_sid(struct static_srv6_sid *sid)
+ 	struct srv6_sid_ctx ctx = {};
+ 	struct vrf *vrf;
+ 	int ret = 0;
++	struct interface *ifp;
+ 
+ 	if (!sid || !CHECK_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_VALID))
+ 		return;
+@@ -1027,13 +1028,23 @@ extern void static_zebra_release_srv6_sid(struct static_srv6_sid *sid)
+ 			ctx.vrf_id = vrf->vrf_id;
+ 		}
+ 
++		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
++		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_X;
++		ctx.nh6 = sid->attributes.nh6;
++		ifp = if_lookup_by_name(sid->attributes.ifname, VRF_DEFAULT);
++		if (!ifp) {
++			zlog_warn("Failed to request SRv6 SID %pFX: interface %s does not exist",
++				  &sid->addr, sid->attributes.ifname);
++			return;
++		}
++		ctx.ifindex = ifp->ifindex;
+ 		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
+-	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
+
+From ae6fb9196a92820bfcf1bfcacfd3c272d778cf70 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Thu, 13 Feb 2025 11:02:59 +0100
+Subject: [PATCH 07/13] staticd: Extend `static_zebra_srv6_sid_install` to
+ install SRv6 uA SIDs
+
+This commit extends the `static_zebra_srv6_sid_install` function to
+allow staticd to install SRv6 uA SIDs into the zebra RIB.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_zebra.c | 14 +++++++++++++-
+ 1 file changed, 13 insertions(+), 1 deletion(-)
+
+diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
+index ec425a4afcd4..83d123e6555c 100644
+--- a/staticd/static_zebra.c
++++ b/staticd/static_zebra.c
+@@ -702,12 +702,24 @@ void static_zebra_srv6_sid_install(struct static_srv6_sid *sid)
+ 			return;
+ 		}
+ 		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
++		action = ZEBRA_SEG6_LOCAL_ACTION_END_X;
++		ctx.nh6 = sid->attributes.nh6;
++		ifp = if_lookup_by_name(sid->attributes.ifname, VRF_DEFAULT);
++		if (!ifp) {
++			zlog_warn("Failed to install SID %pFX: failed to get interface %s",
++				  &sid->addr, sid->attributes.ifname);
++			return;
++		}
++		SET_SRV6_FLV_OP(ctx.flv.flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_NEXT_CSID);
++		ctx.flv.lcblock_len = sid->locator->block_bits_length;
++		ctx.flv.lcnode_func_len = sid->locator->node_bits_length;
++		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
+-	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
+
+From 95abf9d678806ff7bd9eeee8da6302ddb55f1773 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Thu, 13 Feb 2025 11:03:18 +0100
+Subject: [PATCH 08/13] staticd: Extend `static_zebra_srv6_sid_uninstall` to
+ uninstall SRv6 uA SIDs
+
+This commit extends the `static_zebra_srv6_sid_uninstall` function to
+allow staticd to remove SRv6 uA SIDs from the zebra RIB.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_zebra.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
+index 83d123e6555c..9a5e0efc4dc2 100644
+--- a/staticd/static_zebra.c
++++ b/staticd/static_zebra.c
+@@ -842,12 +842,20 @@ void static_zebra_srv6_sid_uninstall(struct static_srv6_sid *sid)
+ 			return;
+ 		}
+ 		break;
++	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
++		ctx.nh6 = sid->attributes.nh6;
++		ifp = if_lookup_by_name(sid->attributes.ifname, VRF_DEFAULT);
++		if (!ifp) {
++			zlog_warn("Failed to install SID %pFX: failed to get interface %s",
++				  &sid->addr, sid->attributes.ifname);
++			return;
++		}
++		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_PSP_USD:
+-	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP:
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID_PSP_USD:
+ 	case SRV6_ENDPOINT_BEHAVIOR_OPAQUE:
+
+From 70c039baa8b722f7bbee12c38d95181dac2696c6 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Thu, 13 Feb 2025 11:04:03 +0100
+Subject: [PATCH 09/13] staticd: Extend CLI to configure an SRv6 uA SID
+
+This commit extends the STATIC CLI to support the configuration of uA
+SIDs.
+
+```
+router(config)# sid fcbb:bbbb:1:fe00::/64 locator MAIN behavior uA interface sr0 nexthop 2001::2
+```
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_vty.c | 28 +++++++++++++++++++++++++++-
+ 1 file changed, 27 insertions(+), 1 deletion(-)
+
+diff --git a/staticd/static_vty.c b/staticd/static_vty.c
+index 5c19d238835a..ad4ef87319ca 100644
+--- a/staticd/static_vty.c
++++ b/staticd/static_vty.c
+@@ -1199,13 +1199,18 @@ DEFUN_NOSH (static_srv6_sids, static_srv6_sids_cmd,
+ }
+ 
+ DEFPY_YANG(srv6_sid, srv6_sid_cmd,
+-      "sid X:X::X:X/M locator NAME$locator_name behavior <uN | uDT6 vrf VIEWVRFNAME | uDT4 vrf VIEWVRFNAME | uDT46 vrf VIEWVRFNAME>",
++      "sid X:X::X:X/M locator NAME$locator_name behavior <uN | uA interface INTERFACE$interface [nexthop X:X::X:X$nh6] | uDT6 vrf VIEWVRFNAME | uDT4 vrf VIEWVRFNAME | uDT46 vrf VIEWVRFNAME>",
+ 	  "Configure SRv6 SID\n"
+       "Specify SRv6 SID\n"
+ 	  "Locator name\n"
+       "Specify Locator name\n"
+       "Specify SRv6 SID behavior\n"
+       "Apply the code to a uN SID\n"
++      "Behavior uA\n"
++      "Configure the interface\n"
++      "Interface name\n"
++      "Configure the nexthop\n"
++      "IPv6 address of the nexthop\n"
+       "Apply the code to an uDT6 SID\n"
+       "Configure VRF name\n"
+       "Specify VRF name\n"
+@@ -1223,7 +1228,10 @@ DEFPY_YANG(srv6_sid, srv6_sid_cmd,
+ 	char xpath_sid[XPATH_MAXLEN];
+ 	char xpath_behavior[XPATH_MAXLEN];
+ 	char xpath_vrf_name[XPATH_MAXLEN];
++	char xpath_ifname[XPATH_MAXLEN];
++	char xpath_nexthop[XPATH_MAXLEN];
+ 	char xpath_locator_name[XPATH_MAXLEN];
++	char ab_xpath[XPATH_MAXLEN];
+ 
+ 	if (argv_find(argv, argc, "uN", &idx)) {
+ 		behavior = SRV6_ENDPOINT_BEHAVIOR_END_NEXT_CSID;
+@@ -1236,6 +1244,8 @@ DEFPY_YANG(srv6_sid, srv6_sid_cmd,
+ 	} else if (argv_find(argv, argc, "uDT46", &idx)) {
+ 		behavior = SRV6_ENDPOINT_BEHAVIOR_END_DT46_USID;
+ 		vrf_name = argv[idx + 2]->arg;
++	} else if (argv_find(argv, argc, "uA", &idx)) {
++		behavior = SRV6_ENDPOINT_BEHAVIOR_END_X_NEXT_CSID;
+ 	}
+ 
+ 	snprintf(xpath_srv6, sizeof(xpath_srv6), FRR_STATIC_SRV6_INFO_KEY_XPATH,
+@@ -1259,6 +1269,22 @@ DEFPY_YANG(srv6_sid, srv6_sid_cmd,
+ 		nb_cli_enqueue_change(vty, xpath_vrf_name, NB_OP_MODIFY, vrf_name);
+ 	}
+ 
++	if (interface) {
++		snprintf(ab_xpath, sizeof(ab_xpath), FRR_STATIC_SRV6_SID_INTERFACE_XPATH, 0);
++		strlcpy(xpath_ifname, xpath_sid, sizeof(xpath_ifname));
++		strlcat(xpath_ifname, ab_xpath, sizeof(xpath_ifname));
++
++		nb_cli_enqueue_change(vty, xpath_ifname, NB_OP_MODIFY, interface);
++	}
++
++	if (nh6_str) {
++		snprintf(ab_xpath, sizeof(ab_xpath), FRR_STATIC_SRV6_SID_NEXTHOP_XPATH, 0);
++		strlcpy(xpath_nexthop, xpath_sid, sizeof(xpath_nexthop));
++		strlcat(xpath_nexthop, ab_xpath, sizeof(xpath_nexthop));
++
++		nb_cli_enqueue_change(vty, xpath_nexthop, NB_OP_MODIFY, nh6_str);
++	}
++
+ 	strlcpy(xpath_locator_name, xpath_sid, sizeof(xpath_locator_name));
+ 	strlcat(xpath_locator_name, FRR_STATIC_SRV6_SID_LOCATOR_NAME_XPATH,
+ 		sizeof(xpath_locator_name));
+
+From f2fcdaad3a18c096c5356ff745ab39c70d67adc5 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Thu, 13 Feb 2025 11:04:14 +0100
+Subject: [PATCH 10/13] staticd: Extend CLI to unconfigure an SRv6 uA SID
+
+This commit extends the STATIC CLI to support the deletion of uA SIDs.
+
+```
+router(config)# no sid fcbb:bbbb:1:fe00::/64 locator MAIN behavior uA interface sr0 nexthop 2001::2
+```
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_vty.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/staticd/static_vty.c b/staticd/static_vty.c
+index ad4ef87319ca..39776a414301 100644
+--- a/staticd/static_vty.c
++++ b/staticd/static_vty.c
+@@ -1295,7 +1295,7 @@ DEFPY_YANG(srv6_sid, srv6_sid_cmd,
+ }
+ 
+ DEFPY_YANG(no_srv6_sid, no_srv6_sid_cmd,
+-      "no sid X:X::X:X/M [locator NAME$locator_name] [behavior <uN | uDT6 vrf VIEWVRFNAME | uDT4 vrf VIEWVRFNAME | uDT46 vrf VIEWVRFNAME>]",
++      "no sid X:X::X:X/M [locator NAME$locator_name] [behavior <uN | uA interface INTERFACE$interface [nexthop X:X::X:X$nh6] | uDT6 vrf VIEWVRFNAME | uDT4 vrf VIEWVRFNAME | uDT46 vrf VIEWVRFNAME>]",
+       NO_STR
+ 	  "Configure SRv6 SID\n"
+       "Specify SRv6 SID\n"
+@@ -1303,6 +1303,11 @@ DEFPY_YANG(no_srv6_sid, no_srv6_sid_cmd,
+       "Specify Locator name\n"
+       "Specify SRv6 SID behavior\n"
+       "Apply the code to a uN SID\n"
++      "Behavior uA\n"
++      "Configure the interface\n"
++      "Interface name\n"
++      "Configure the nexthop\n"
++      "IPv6 address of the nexthop\n"
+       "Apply the code to an uDT6 SID\n"
+       "Configure VRF name\n"
+       "Specify VRF name\n"
+
+From 062fd00ad6ca94f1088a75ef2c425d2263baa9cd Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Fri, 14 Feb 2025 17:22:00 +0100
+Subject: [PATCH 11/13] staticd: Extend SRv6 SIDs show CLI to display uA SIDs
+
+This commit extends the SRv6 SIDs show CLI to display the configured
+SRv6 uA SIDs.
+
+```
+segment-routing
+ srv6
+  static-sids
+   sid fcbb:bbbb:1:fe40::/64 locator MAIN behavior uA interface sr0 nexthop 2001::2
+  !
+ !
+!
+```
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_vty.c | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/staticd/static_vty.c b/staticd/static_vty.c
+index 39776a414301..6e9087363d1f 100644
+--- a/staticd/static_vty.c
++++ b/staticd/static_vty.c
+@@ -1716,6 +1716,7 @@ static void srv6_sid_cli_show(struct vty *vty, const struct lyd_node *sid, bool
+ {
+ 	enum srv6_endpoint_behavior_codepoint srv6_behavior;
+ 	struct prefix_ipv6 sid_value;
++	struct ipaddr nexthop;
+ 
+ 	yang_dnode_get_ipv6p(&sid_value, sid, "sid");
+ 
+@@ -1787,6 +1788,16 @@ static void srv6_sid_cli_show(struct vty *vty, const struct lyd_node *sid, bool
+ 	if (yang_dnode_exists(sid, "vrf-name"))
+ 		vty_out(vty, " vrf %s", yang_dnode_get_string(sid, "vrf-name"));
+ 
++	if (yang_dnode_exists(sid, "paths[path-index=0]/interface")) {
++		vty_out(vty, " interface %s",
++			yang_dnode_get_string(sid, "paths[path-index=0]/interface"));
++
++		if (yang_dnode_exists(sid, "paths[path-index=0]/next-hop")) {
++			yang_dnode_get_ip(&nexthop, sid, "paths[path-index=0]/next-hop");
++			vty_out(vty, " nexthop %pI6", &nexthop.ipaddr_v6);
++		}
++	}
++
+ 	vty_out(vty, "\n");
+ }
+ 
+
+From 43c13777b2bc7790853ae0ff61acd31246b2cf48 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Thu, 13 Feb 2025 12:15:12 +0100
+Subject: [PATCH 12/13] tests: Add test case to verify the programming of SRv6
+ uA SIDs
+
+This commit adds a test case to ensure staticd correctly programs SRv6
+uA SIDs in the RIB.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ .../static_srv6_sids/expected_srv6_sids.json  | 35 +++++++++++++++++++
+ .../expected_srv6_sids_sid_delete_1.json      | 35 +++++++++++++++++++
+ .../expected_srv6_sids_sid_delete_2.json      | 35 +++++++++++++++++++
+ tests/topotests/static_srv6_sids/r1/frr.conf  |  1 +
+ 4 files changed, 106 insertions(+)
+
+diff --git a/tests/topotests/static_srv6_sids/expected_srv6_sids.json b/tests/topotests/static_srv6_sids/expected_srv6_sids.json
+index de788784457b..1796c870a689 100644
+--- a/tests/topotests/static_srv6_sids/expected_srv6_sids.json
++++ b/tests/topotests/static_srv6_sids/expected_srv6_sids.json
+@@ -162,5 +162,40 @@
+ 				}
+ 			]
+ 		}
++	],
++	"fcbb:bbbb:1:fe40::/64": [
++		{
++			"prefix": "fcbb:bbbb:1:fe40::/64",
++			"prefixLen": 64,
++			"protocol": "static",
++			"vrfId": 0,
++			"vrfName": "default",
++			"selected": true,
++			"destSelected": true,
++			"distance": 1,
++			"metric": 0,
++			"installed": true,
++			"table": 254,
++			"internalStatus": 16,
++			"internalFlags": 9,
++			"internalNextHopNum": 1,
++			"internalNextHopActiveNum": 1,
++			"nexthops": [
++				{
++					"flags": 3,
++					"fib": true,
++					"directlyConnected": true,
++					"interfaceName": "sr0",
++					"active": true,
++					"weight": 1,
++					"seg6local": {
++						"action": "End.X"
++					},
++					"seg6localContext": {
++						"nh6": "2001::2"
++					}
++				}
++			]
++		}
+ 	]
+ }
+\ No newline at end of file
+diff --git a/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_1.json b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_1.json
+index dd0850fb3c89..bd1f4bf87a74 100644
+--- a/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_1.json
++++ b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_1.json
+@@ -121,5 +121,40 @@
+ 				}
+ 			]
+ 		}
++	],
++	"fcbb:bbbb:1:fe40::/64": [
++		{
++			"prefix": "fcbb:bbbb:1:fe40::/64",
++			"prefixLen": 64,
++			"protocol": "static",
++			"vrfId": 0,
++			"vrfName": "default",
++			"selected": true,
++			"destSelected": true,
++			"distance": 1,
++			"metric": 0,
++			"installed": true,
++			"table": 254,
++			"internalStatus": 16,
++			"internalFlags": 9,
++			"internalNextHopNum": 1,
++			"internalNextHopActiveNum": 1,
++			"nexthops": [
++				{
++					"flags": 3,
++					"fib": true,
++					"directlyConnected": true,
++					"interfaceName": "sr0",
++					"active": true,
++					"weight": 1,
++					"seg6local": {
++						"action": "End.X"
++					},
++					"seg6localContext": {
++						"nh6": "2001::2"
++					}
++				}
++			]
++		}
+ 	]
+ }
+\ No newline at end of file
+diff --git a/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_2.json b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_2.json
+index 4051c01425e6..2bd40cdb5c2c 100644
+--- a/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_2.json
++++ b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_2.json
+@@ -80,5 +80,40 @@
+ 				}
+ 			]
+ 		}
++	],
++	"fcbb:bbbb:1:fe40::/64": [
++		{
++			"prefix": "fcbb:bbbb:1:fe40::/64",
++			"prefixLen": 64,
++			"protocol": "static",
++			"vrfId": 0,
++			"vrfName": "default",
++			"selected": true,
++			"destSelected": true,
++			"distance": 1,
++			"metric": 0,
++			"installed": true,
++			"table": 254,
++			"internalStatus": 16,
++			"internalFlags": 9,
++			"internalNextHopNum": 1,
++			"internalNextHopActiveNum": 1,
++			"nexthops": [
++				{
++					"flags": 3,
++					"fib": true,
++					"directlyConnected": true,
++					"interfaceName": "sr0",
++					"active": true,
++					"weight": 1,
++					"seg6local": {
++						"action": "End.X"
++					},
++					"seg6localContext": {
++						"nh6": "2001::2"
++					}
++				}
++			]
++		}
+ 	]
+ }
+\ No newline at end of file
+diff --git a/tests/topotests/static_srv6_sids/r1/frr.conf b/tests/topotests/static_srv6_sids/r1/frr.conf
+index b4904d9ac286..ce8fb8816519 100644
+--- a/tests/topotests/static_srv6_sids/r1/frr.conf
++++ b/tests/topotests/static_srv6_sids/r1/frr.conf
+@@ -12,6 +12,7 @@ segment-routing
+    sid fcbb:bbbb:1:fe10::/64 locator MAIN behavior uDT4 vrf Vrf10
+    sid fcbb:bbbb:1:fe20::/64 locator MAIN behavior uDT6 vrf Vrf20
+    sid fcbb:bbbb:1:fe30::/64 locator MAIN behavior uDT46 vrf Vrf30
++   sid fcbb:bbbb:1:fe40::/64 locator MAIN behavior uA interface sr0 nexthop 2001::2
+   !
+  !
+ !
+\ No newline at end of file
+
+From 35b40cc996e9c5359e7ea724ed907986e5a05694 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Thu, 13 Feb 2025 11:04:38 +0100
+Subject: [PATCH 13/13] doc: Add SRv6 uA SID configuration to staticd
+ documentation
+
+This commit adds detailed explanation on configuring SRv6 uA SIDs.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ doc/user/static.rst | 11 +++++++----
+ 1 file changed, 7 insertions(+), 4 deletions(-)
+
+diff --git a/doc/user/static.rst b/doc/user/static.rst
+index 0ce6e2107e7c..c1d11cf0b0e8 100644
+--- a/doc/user/static.rst
++++ b/doc/user/static.rst
+@@ -207,17 +207,18 @@ SRv6 Static SIDs Commands
+    Move from srv6 node to static-sids node. In this static-sids node, user can
+    configure static SRv6 SIDs.
+ 
+-.. clicmd:: sid X:X::X:X/M locator NAME behavior <uN|uDT4|uDT6|uDT46> [vrf VRF]
++.. clicmd:: sid X:X::X:X/M locator NAME behavior <uN|uA|uDT4|uDT6|uDT46> [vrf VRF] [interface IFNAME [nexthop X:X::X:X]]
+ 
+    Specify the locator sid manually. Configuring a local sid in a purely static mode
+    by specifying the sid value would generate a unique SID.
+    This feature will support the configuration of static SRv6 decapsulation on the system.
+ 
+-   It supports four parameter options, corresponding to the following functions:
+-   uN, uDT4, uDT6, uDT46
++   It supports the following behaviors: uN, uA, uDT4, uDT6, uDT46.
+ 
+    When configuring the local sid, if the action is set to 'uN', no vrf should be set.
+-   While for any other action, it is necessary to specify a specific vrf.
++   For uDT4, uDT6 and uDT46, it is necessary to specify a specific vrf.
++   The uA behavior requires the outgoing interface and optionally the IPv6 address of the Layer 3 adjacency
++   to which the packet should be forwarded.
+ 
+ ::
+ 
+@@ -228,6 +229,7 @@ SRv6 Static SIDs Commands
+    router(config-srv6-sids)# sid fcbb:bbbb:1:fe01::/64 locator LOC1 behavior uDT6 vrf Vrf1
+    router(config-srv6-sids)# sid fcbb:bbbb:1:fe02::/64 locator LOC1 behavior uDT4 vrf Vrf1
+    router(config-srv6-sids)# sid fcbb:bbbb:1:fe03::/64 locator LOC1 behavior uDT46 vrf Vrf2
++   router(config-srv6-sids)# sid fcbb:bbbb:1:fe04::/64 locator LOC1 behavior uA interface eth0 nexthop 2001::2
+ 
+    router(config-srv6-locator)# show run
+    ...
+@@ -237,5 +239,6 @@ SRv6 Static SIDs Commands
+       sid    fcbb:bbbb:1:fe01::/64 locator LOC1 behavior uDT6 vrf Vrf1
+       sid    fcbb:bbbb:1:fe02::/64 locator LOC1 behavior uDT4 vrf Vrf1
+       sid    fcbb:bbbb:1:fe03::/64 locator LOC1 behavior uDT46 vrf Vrf2
++      sid    fcbb:bbbb:1:fe04::/64 locator LOC1 behavior uA interface eth0 nexthop 2001::2
+        !
+    ...
+\ No newline at end of file
\ No newline at end of file
diff --git a/src/sonic-frr/patch/0025-Fpm-problems.patch b/src/sonic-frr/patch/0025-Fpm-problems.patch
new file mode 100644
index 00000000000..1f4558f843f
--- /dev/null
+++ b/src/sonic-frr/patch/0025-Fpm-problems.patch
@@ -0,0 +1,367 @@
+From b2fc167978189238e045d719e11202ab303d2f59 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 30 Jan 2025 08:57:57 -0500
+Subject: [PATCH 1/6] zebra: Fix pass back of data from dplane through fpm pipe
+
+A recent code change 29122bc9b8d5317f6f486f9fe61a92a854948cc5
+changed the passing of data up the fpm from passing the
+tableid and vrf to the sonic expected tableid contains
+the vrfid.  This violates the assumptions in the code
+that the netlink message passes up the tableid as the
+tableid.  Additionally this code change did not modify
+the rib_find_rn_from_ctx to actually properly decode
+what could be passed up.  Let's just fix this and let
+Sonic carry the patch as appropriate for themselves
+since they are not the only users of dplane_fpm_nl.c
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/dplane_fpm_nl.c | 19 ++++++++-----
+ zebra/zebra_rib.c     | 62 ++++++++++++++++++++++++++-----------------
+ 2 files changed, 50 insertions(+), 31 deletions(-)
+
+diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
+index b8dbabb60dd8..a65bae95c421 100644
+--- a/zebra/dplane_fpm_nl.c
++++ b/zebra/dplane_fpm_nl.c
+@@ -587,7 +587,6 @@ static void fpm_read(struct event *t)
+ 	struct zebra_dplane_ctx *ctx;
+ 	size_t available_bytes;
+ 	size_t hdr_available_bytes;
+-	int ival;
+ 
+ 	/* Let's ignore the input at the moment. */
+ 	rv = stream_read_try(fnc->ibuf, fnc->socket,
+@@ -724,12 +723,18 @@ static void fpm_read(struct event *t)
+ 					      NULL);
+ 
+ 			if (netlink_route_notify_read_ctx(hdr, 0, ctx) >= 0) {
+-				/* In the FPM encoding, the vrfid is present */
+-				ival = dplane_ctx_get_table(ctx);
+-				dplane_ctx_set_vrf(ctx, ival);
+-				dplane_ctx_set_table(ctx,
+-						     ZEBRA_ROUTE_TABLE_UNKNOWN);
+-
++				/*
++				 * Receiving back a netlink message from
++				 * the fpm.  Currently the netlink messages
++				 * do not have a way to specify the vrf
++				 * so it must be unknown.  I'm looking
++				 * at you sonic.  If you are reading this
++				 * and wondering why it's not working
++				 * you must extend your patch to translate
++				 * the tableid to the vrfid and set the
++				 * tableid to 0 in order for this to work.
++				 */
++				dplane_ctx_set_vrf(ctx, VRF_UNKNOWN);
+ 				dplane_provider_enqueue_to_zebra(ctx);
+ 			} else {
+ 				/*
+diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
+index 2881192eb77e..a1c8cd305956 100644
+--- a/zebra/zebra_rib.c
++++ b/zebra/zebra_rib.c
+@@ -1891,20 +1891,18 @@ struct route_node *rib_find_rn_from_ctx(const struct zebra_dplane_ctx *ctx)
+ 	struct route_table *table = NULL;
+ 	struct route_node *rn = NULL;
+ 	const struct prefix *dest_pfx, *src_pfx;
++	uint32_t tableid = dplane_ctx_get_table(ctx);
++	vrf_id_t vrf_id = dplane_ctx_get_vrf(ctx);
+ 
+ 	/* Locate rn and re(s) from ctx */
++	table = zebra_vrf_lookup_table_with_table_id(dplane_ctx_get_afi(ctx),
++						     dplane_ctx_get_safi(ctx), vrf_id, tableid);
+ 
+-	table = zebra_vrf_lookup_table_with_table_id(
+-		dplane_ctx_get_afi(ctx), dplane_ctx_get_safi(ctx),
+-		dplane_ctx_get_vrf(ctx), dplane_ctx_get_table(ctx));
+ 	if (table == NULL) {
+ 		if (IS_ZEBRA_DEBUG_DPLANE) {
+-			zlog_debug(
+-				"Failed to find route for ctx: no table for afi %d, safi %d, vrf %s(%u)",
+-				dplane_ctx_get_afi(ctx),
+-				dplane_ctx_get_safi(ctx),
+-				vrf_id_to_name(dplane_ctx_get_vrf(ctx)),
+-				dplane_ctx_get_vrf(ctx));
++			zlog_debug("Failed to find route for ctx: no table for afi %d, safi %d, vrf %s(%u) table %u",
++				   dplane_ctx_get_afi(ctx), dplane_ctx_get_safi(ctx),
++				   vrf_id_to_name(vrf_id), vrf_id, tableid);
+ 		}
+ 		goto done;
+ 	}
+@@ -2214,26 +2212,13 @@ static void rib_process_dplane_notify(struct zebra_dplane_ctx *ctx)
+ {
+ 	struct route_node *rn = NULL;
+ 	struct route_entry *re = NULL;
+-	struct vrf *vrf;
++	struct vrf *vrf = vrf_lookup_by_id(dplane_ctx_get_vrf(ctx));
+ 	struct nexthop *nexthop;
+ 	rib_dest_t *dest;
+ 	bool fib_changed = false;
+ 	bool debug_p = IS_ZEBRA_DEBUG_DPLANE | IS_ZEBRA_DEBUG_RIB;
+ 	int start_count, end_count;
+-	vrf_id_t vrf_id;
+-	int tableid;
+-
+-	/* Locate vrf and route table - we must have one or the other */
+-	tableid = dplane_ctx_get_table(ctx);
+-	vrf_id = dplane_ctx_get_vrf(ctx);
+-	if (vrf_id == VRF_UNKNOWN)
+-		vrf_id = zebra_vrf_lookup_by_table(tableid,
+-						   dplane_ctx_get_ns_id(ctx));
+-	else if (tableid == ZEBRA_ROUTE_TABLE_UNKNOWN)
+-		tableid = zebra_vrf_lookup_tableid(vrf_id,
+-						   dplane_ctx_get_ns_id(ctx));
+-
+-	vrf = vrf_lookup_by_id(vrf_id);
++	uint32_t tableid = dplane_ctx_get_table(ctx);
+ 
+ 	/* Locate rn and re(s) from ctx */
+ 	rn = rib_find_rn_from_ctx(ctx);
+@@ -4862,6 +4847,33 @@ void rib_close_table(struct route_table *table)
+ 	}
+ }
+ 
++/*
++ * The context sent up from the dplane may be a context
++ * that has been generated by the zebra master pthread
++ * or it may be a context generated from a event in
++ * either the kernel dplane code or the fpm dplane
++ * code.  In which case the tableid and vrfid may
++ * not be fully known and we have to figure it out
++ * when the context hits the master pthread.
++ * since this is the *starter* spot for that let
++ * us do a bit of work on each one to see if any
++ * massaging is needed
++ */
++static inline void zebra_rib_translate_ctx_from_dplane(struct zebra_dplane_ctx *ctx)
++{
++	uint32_t tableid = dplane_ctx_get_table(ctx);
++	vrf_id_t vrfid = dplane_ctx_get_vrf(ctx);
++	uint32_t nsid = dplane_ctx_get_ns_id(ctx);
++	enum dplane_op_e op = dplane_ctx_get_op(ctx);
++
++	if (vrfid == VRF_UNKNOWN)
++		dplane_ctx_set_vrf(ctx, zebra_vrf_lookup_by_table(tableid, nsid));
++	else if ((op == DPLANE_OP_ROUTE_INSTALL || op == DPLANE_OP_ROUTE_UPDATE ||
++		  op == DPLANE_OP_ROUTE_DELETE) &&
++		 tableid == ZEBRA_ROUTE_TABLE_UNKNOWN)
++		dplane_ctx_set_table(ctx, zebra_vrf_lookup_tableid(vrfid, nsid));
++}
++
+ /*
+  * Handle results from the dataplane system. Dequeue update context
+  * structs, dispatch to appropriate internal handlers.
+@@ -4921,6 +4933,8 @@ static void rib_process_dplane_results(struct event *thread)
+ 		}
+ 
+ 		while (ctx) {
++			zebra_rib_translate_ctx_from_dplane(ctx);
++
+ #ifdef HAVE_SCRIPTING
+ 			if (ret == 0)
+ 				frrscript_call(fs,
+
+From e71d29983aadea858ffa7c1fb6812c164c1e05f7 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 30 Jan 2025 09:02:44 -0500
+Subject: [PATCH 2/6] zebra: fpm_listener allow continued operation
+
+In fpm_listener, when a error is detected it would
+stop listening and not recover.  Modify the code
+to close the socket and allow the connection to
+recover.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/fpm_listener.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/zebra/fpm_listener.c b/zebra/fpm_listener.c
+index 7d84c706d408..9181257db3cf 100644
+--- a/zebra/fpm_listener.c
++++ b/zebra/fpm_listener.c
+@@ -756,8 +756,10 @@ static void fpm_serve(void)
+ 	while (1) {
+ 
+ 		hdr = read_fpm_msg(buf, sizeof(buf));
+-		if (!hdr)
++		if (!hdr) {
++			close(glob->sock);
+ 			return;
++		}
+ 
+ 		process_fpm_msg(hdr);
+ 	}
+
+From 22c7151c2322b165f87ad3b06e93a1c48ae72c6c Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 30 Jan 2025 09:53:09 -0500
+Subject: [PATCH 3/6] tests: Show that asic offload works in the fpm testing
+
+The fpm_testing_topo1 didn't turn on the fpm_listener
+sending the routes back to zebra to set the asic offload.
+
+Modify the test to tell the fpm_listener to set the offloaded
+flag and reflect the route back to the dplane_fpm_nl.c code.
+Also modify zebra to expect a response to the underlying fpm listener.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ tests/topotests/fpm_testing_topo1/r1/routes_summ.json      | 6 +++---
+ .../fpm_testing_topo1/r1/routes_summ_removed.json          | 4 ++--
+ tests/topotests/fpm_testing_topo1/test_fpm_topo1.py        | 7 ++++---
+ 3 files changed, 9 insertions(+), 8 deletions(-)
+
+diff --git a/tests/topotests/fpm_testing_topo1/r1/routes_summ.json b/tests/topotests/fpm_testing_topo1/r1/routes_summ.json
+index e9157bc664e1..12fe32cab354 100644
+--- a/tests/topotests/fpm_testing_topo1/r1/routes_summ.json
++++ b/tests/topotests/fpm_testing_topo1/r1/routes_summ.json
+@@ -3,21 +3,21 @@
+     {
+       "fib":1,
+       "rib":1,
+-      "fibOffLoaded":0,
++      "fibOffLoaded":1,
+       "fibTrapped":0,
+       "type":"connected"
+     },
+     {
+       "fib":1,
+       "rib":1,
+-      "fibOffLoaded":0,
++      "fibOffLoaded":1,
+       "fibTrapped":0,
+       "type":"local"
+     },
+     {
+       "fib":10000,
+       "rib":10000,
+-      "fibOffLoaded":0,
++      "fibOffLoaded":10000,
+       "fibTrapped":0,
+       "type":"sharp"
+     }
+diff --git a/tests/topotests/fpm_testing_topo1/r1/routes_summ_removed.json b/tests/topotests/fpm_testing_topo1/r1/routes_summ_removed.json
+index 8585b2bb6b7c..15d3f7107777 100644
+--- a/tests/topotests/fpm_testing_topo1/r1/routes_summ_removed.json
++++ b/tests/topotests/fpm_testing_topo1/r1/routes_summ_removed.json
+@@ -3,14 +3,14 @@
+     {
+       "fib":1,
+       "rib":1,
+-      "fibOffLoaded":0,
++      "fibOffLoaded":1,
+       "fibTrapped":0,
+       "type":"connected"
+     },
+     {
+       "fib":1,
+       "rib":1,
+-      "fibOffLoaded":0,
++      "fibOffLoaded":1,
+       "fibTrapped":0,
+       "type":"local"
+     }
+diff --git a/tests/topotests/fpm_testing_topo1/test_fpm_topo1.py b/tests/topotests/fpm_testing_topo1/test_fpm_topo1.py
+index 66cefcc2a06f..b3c375549a50 100644
+--- a/tests/topotests/fpm_testing_topo1/test_fpm_topo1.py
++++ b/tests/topotests/fpm_testing_topo1/test_fpm_topo1.py
+@@ -57,7 +57,7 @@ def setup_module(module):
+         router.load_config(
+             TopoRouter.RD_ZEBRA,
+             os.path.join(CWD, "{}/zebra.conf".format(rname)),
+-            "-M dplane_fpm_nl",
++            "-M dplane_fpm_nl --asic-offload=notify_on_offload",
+         )
+         router.load_config(
+             TopoRouter.RD_SHARP, os.path.join(CWD, "{}/sharpd.conf".format(rname))
+@@ -65,6 +65,7 @@ def setup_module(module):
+         router.load_config(
+             TopoRouter.RD_FPM_LISTENER,
+             os.path.join(CWD, "{}/fpm_stub.conf".format(rname)),
++            "-r",
+         )
+ 
+     tgen.start_router()
+@@ -111,7 +112,7 @@ def test_fpm_install_routes():
+         topotest.router_json_cmp, router, "show ip route summ json", expected
+     )
+ 
+-    success, result = topotest.run_and_expect(test_func, None, 60, 1)
++    success, result = topotest.run_and_expect(test_func, None, 120, 1)
+     assert success, "Unable to successfully install 10000 routes: {}".format(result)
+ 
+     # Let's remove 10000 routes
+@@ -124,7 +125,7 @@ def test_fpm_install_routes():
+         topotest.router_json_cmp, router, "show ip route summ json", expected
+     )
+ 
+-    success, result = topotest.run_and_expect(test_func, None, 60, 1)
++    success, result = topotest.run_and_expect(test_func, None, 120, 1)
+     assert success, "Unable to remove 10000 routes: {}".format(result)
+ 
+ 
+
+From c58da10d2a700164e329352c5c22a924af3fa45c Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Fri, 31 Jan 2025 12:12:17 -0500
+Subject: [PATCH 4/6] zebra: Limit mutex for obuf to when we access obuf
+
+The mutex that wraps access to the output buffer
+is being held for the entire time the data is
+being generated to send down the pipe.  Since
+the generation has absolutely nothing to do
+with the obuf, let's limit the mutex holding some.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/dplane_fpm_nl.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
+index a65bae95c421..9f26852d1f5b 100644
+--- a/zebra/dplane_fpm_nl.c
++++ b/zebra/dplane_fpm_nl.c
+@@ -951,8 +951,6 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
+ 
+ 	nl_buf_len = 0;
+ 
+-	frr_mutex_lock_autounlock(&fnc->obuf_mutex);
+-
+ 	/*
+ 	 * If route replace is enabled then directly encode the install which
+ 	 * is going to use `NLM_F_REPLACE` (instead of delete/add operations).
+@@ -1105,6 +1103,8 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
+ 	/* We must know if someday a message goes beyond 65KiB. */
+ 	assert((nl_buf_len + FPM_HEADER_SIZE) <= UINT16_MAX);
+ 
++	frr_mutex_lock_autounlock(&fnc->obuf_mutex);
++
+ 	/* Check if we have enough buffer space. */
+ 	if (STREAM_WRITEABLE(fnc->obuf) < (nl_buf_len + FPM_HEADER_SIZE)) {
+ 		atomic_fetch_add_explicit(&fnc->counters.buffer_full, 1,
+
+From 07a803a7b30ad3386e491c4efe9eef7f70029d53 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Fri, 31 Jan 2025 12:14:36 -0500
+Subject: [PATCH 5/6] zebra: Stop buffering output from fpm_listener
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/fpm_listener.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/zebra/fpm_listener.c b/zebra/fpm_listener.c
+index 9181257db3cf..ed0842a3b1ba 100644
+--- a/zebra/fpm_listener.c
++++ b/zebra/fpm_listener.c
+@@ -771,6 +771,8 @@ int main(int argc, char **argv)
+ 	int r;
+ 	bool fork_daemon = false;
+ 
++	setbuf(stdout, NULL);
++
+ 	memset(glob, 0, sizeof(*glob));
+ 
+ 	while ((r = getopt(argc, argv, "rdv")) != -1) {
diff --git a/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch b/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch
deleted file mode 100644
index 99ce9c3e8ca..00000000000
--- a/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 92323cf4b506c40376be74e955836da30980ae54 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 13 Mar 2024 10:26:58 -0400
-Subject: [PATCH 1/3] bgpd: Ensure that the correct aspath is free'd
-
-Currently in subgroup_default_originate the attr.aspath
-is set in bgp_attr_default_set, which hashs the aspath
-and creates a refcount for it.  If this is a withdraw
-the subgroup_announce_check and bgp_adj_out_set_subgroup
-is called which will intern the attribute.  This will
-cause the the attr.aspath to be set to a new value
-finally at the bottom of the function it intentionally
-uninterns the aspath which is not the one that was
-created for this function.  This reduces the other
-aspath's refcount by 1 and if a clear bgp * is issued
-fast enough the aspath for that will be removed
-and the system will crash.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index fc776a4fd..a0113c04e 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -3012,7 +3012,7 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp,
- 				   PEER_STATUS_ORF_WAIT_REFRESH))
- 		return;
-
--	memset(&attr, 0, sizeof(attr));
-+	memset(pattr, 0, sizeof(*pattr));
- 	/* It's initialized in bgp_announce_check() */
-
- 	/* Announcement to the subgroup. If the route is filtered withdraw it.
diff --git a/src/sonic-frr/patch/0026-Translate-tableid-for-dplane-route-notify.patch b/src/sonic-frr/patch/0026-Translate-tableid-for-dplane-route-notify.patch
new file mode 100644
index 00000000000..200ea01486d
--- /dev/null
+++ b/src/sonic-frr/patch/0026-Translate-tableid-for-dplane-route-notify.patch
@@ -0,0 +1,26 @@
+From 59d9d28b95ac5fae9089339758676764c58c9a70 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Mon, 14 Apr 2025 18:49:51 -0500
+Subject: [PATCH] zebra: Translate tableid for dplane route notify
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ zebra/zebra_rib.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
+index af9e6b717..699156c4c 100644
+--- a/zebra/zebra_rib.c
++++ b/zebra/zebra_rib.c
+@@ -4881,7 +4881,7 @@ static inline void zebra_rib_translate_ctx_from_dplane(struct zebra_dplane_ctx *
+ 	if (vrfid == VRF_UNKNOWN)
+ 		dplane_ctx_set_vrf(ctx, zebra_vrf_lookup_by_table(tableid, nsid));
+ 	else if ((op == DPLANE_OP_ROUTE_INSTALL || op == DPLANE_OP_ROUTE_UPDATE ||
+-		  op == DPLANE_OP_ROUTE_DELETE) &&
++		  op == DPLANE_OP_ROUTE_DELETE || op == DPLANE_OP_ROUTE_NOTIFY) &&
+ 		 tableid == ZEBRA_ROUTE_TABLE_UNKNOWN)
+ 		dplane_ctx_set_table(ctx, zebra_vrf_lookup_tableid(vrfid, nsid));
+ }
+-- 
+2.34.1
+
diff --git a/src/sonic-frr/patch/0027-Dont-skip-kernel-routes-uninstall.patch b/src/sonic-frr/patch/0027-Dont-skip-kernel-routes-uninstall.patch
new file mode 100644
index 00000000000..4c6a12ae80c
--- /dev/null
+++ b/src/sonic-frr/patch/0027-Dont-skip-kernel-routes-uninstall.patch
@@ -0,0 +1,13 @@
+diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
+index 699156c4c..1a19bd62c 100644
+--- a/zebra/zebra_rib.c
++++ b/zebra/zebra_rib.c
+@@ -1433,7 +1433,7 @@ static void rib_process(struct route_node *rn)
+ 		rib_process_update_fib(zvrf, rn, old_fib, new_fib);
+ 	else if (new_fib)
+ 		rib_process_add_fib(zvrf, rn, new_fib);
+-	else if (old_fib && !RIB_SYSTEM_ROUTE(old_fib))
++	else if (old_fib)
+ 		rib_process_del_fib(zvrf, rn, old_fib);
+ 
+ 	/* Remove all RE entries queued for removal */
diff --git a/src/sonic-frr/patch/0028-zebra-ensure-proper-return-for-failure-for-Sid-allocation.patch b/src/sonic-frr/patch/0028-zebra-ensure-proper-return-for-failure-for-Sid-allocation.patch
new file mode 100644
index 00000000000..5f2106037b7
--- /dev/null
+++ b/src/sonic-frr/patch/0028-zebra-ensure-proper-return-for-failure-for-Sid-allocation.patch
@@ -0,0 +1,51 @@
+From 5a63cf4c0d1e7b84f59003877599c6575ba08a25 Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Mon, 10 Mar 2025 15:26:38 -0700
+Subject: [PATCH] zebra: ensure proper return for failure for Sid allocation
+
+The functions alloc_srv6_sid_func_explicit/dynamic expect to return bool
+but we have places where we return a -1 or NULL which the caller is
+assuming as a True/Valid and ending up allocating Sid
+
+Without Fix:
+2025/03/10 21:44:04.295350 ZEBRA: [XWV20-TGK70] alloc_srv6_sid_func_explicit: trying to allocate explicit SID function 65088 from block fcbb:bbbb::/32
+2025/03/10 21:44:04.295351 ZEBRA: [MM61M-TQZNP] alloc_srv6_sid_func_explicit: elib s 10000 e 20000 wlib s 1000 ewlib s 30000 e 1000 SID_FUNC 65088
+2025/03/10 21:44:04.295352 ZEBRA: [QGHMB-SWNFW] alloc_srv6_sid_func_explicit: function 65088 is outside ELIB [10000/20000] and EWLIB alloc ranges [30000/1000]
+2025/03/10 21:44:04.295367 ZEBRA: [H0GZA-NNSWJ] get_srv6_sid_explicit: allocated explicit SRv6 SID fcbb:bbbb:1:fe40:: for context End.X nh6 2001::2
+2025/03/10 21:44:04.295368 ZEBRA: [XBBYD-T1Q7P] srv6_manager_get_sid_internal: got new SRv6 SID for ctx End.X nh6 2001::2: sid_value=fcbb:bbbb:1:fe40:: (func=65088) (proto=4, instance=0, sessionId=0), notifying all clients
+
+With Fix:
+2025/03/10 22:04:25.052235 ZEBRA: [MM61M-TQZNP] alloc_srv6_sid_func_explicit: elib s 30000 e 31000 wlib s 31000 ewlib s 30000 e 31000 SID_FUNC 65056
+2025/03/10 22:04:25.052236 ZEBRA: [YHMRC-EMYNX] alloc_srv6_sid_func_explicit: function 65056 is outside ELIB [30000/31000] and EWLIB alloc ranges [30000/31000]
+2025/03/10 22:04:25.052254 ZEBRA: [XSG8X-Q2XJX] get_srv6_sid_explicit: invalid SM request arguments: failed to allocate SID function 65056 from block fcbb:bbbb::/32
+2025/03/10 22:04:25.052257 ZEBRA: [YC52T-427SJ] srv6_manager_get_sid_internal: not got SRv6 SID for ctx End.DT6 vrf_id 4, sid_value=fcbb:bbbb:1:fe20::, locator_name=MAIN
+root@rajasekarr:/tmp/topotests/static_srv6_sids.test_static_srv6_sids/r1#
+
+Ticket :#
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+---
+ zebra/zebra_srv6.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/zebra/zebra_srv6.c b/zebra/zebra_srv6.c
+index 51efcceb75a0..f9b5dd880857 100644
+--- a/zebra/zebra_srv6.c
++++ b/zebra/zebra_srv6.c
+@@ -1236,7 +1236,7 @@ static bool alloc_srv6_sid_func_explicit(struct zebra_srv6_sid_block *block,
+ 				zlog_warn("%s: function %u is outside ELIB [%u/%u] and EWLIB alloc ranges [%u/%u]",
+ 					  __func__, sid_func, elib_start,
+ 					  elib_end, ewlib_start, ewlib_end);
+-				return -1;
++				return false;
+ 			}
+ 		} else if (format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) {
+ 			uint32_t explicit_start =
+@@ -1395,7 +1395,7 @@ static bool alloc_srv6_sid_func_dynamic(struct zebra_srv6_sid_block *block,
+ 			    dynamic_end) {
+ 				zlog_warn("%s: SRv6: Warning, SRv6 SID Dynamic alloc space is depleted",
+ 					  __func__);
+-				return NULL;
++				return false;
+ 			}
+ 
+ 			/*
diff --git a/src/sonic-frr/patch/0028-zebra-fix-parse-attr-problems-for-encap.patch b/src/sonic-frr/patch/0028-zebra-fix-parse-attr-problems-for-encap.patch
deleted file mode 100644
index 358cee25b9d..00000000000
--- a/src/sonic-frr/patch/0028-zebra-fix-parse-attr-problems-for-encap.patch
+++ /dev/null
@@ -1,290 +0,0 @@
-From bef0dda1527782830b034dce9fbdc35a5b3aa88e Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 8 May 2024 12:46:08 -0400
-Subject: [PATCH 1/3] zebra: Move netlink_route_nexthop_encap
-
-Move this static function earlier so we can avoid
-a predecleartion.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- zebra/rt_netlink.c | 82 +++++++++++++++++++++++-----------------------
- 1 file changed, 41 insertions(+), 41 deletions(-)
-
-diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index fc9e8c457c..42b4d7c199 100644
---- a/zebra/rt_netlink.c
-+++ b/zebra/rt_netlink.c
-@@ -1732,6 +1732,47 @@ static inline bool _netlink_set_tag(struct nlmsghdr *n, unsigned int maxlen,
- 	return true;
- }
- 
-+/*
-+ * The function returns true if the attribute could be added
-+ * to the message, otherwise false is returned.
-+ */
-+static int netlink_route_nexthop_encap(struct nlmsghdr *n, size_t nlen,
-+				       struct nexthop *nh)
-+{
-+	struct rtattr *nest;
-+	struct vxlan_nh_encap* encap_data;
-+
-+	switch (nh->nh_encap_type) {
-+	case NET_VXLAN:
-+		if (!nl_attr_put16(n, nlen, RTA_ENCAP_TYPE, nh->nh_encap_type))
-+			return false;
-+
-+		nest = nl_attr_nest(n, nlen, RTA_ENCAP);
-+		if (!nest)
-+			return false;
-+
-+		encap_data = &nh->nh_encap.encap_data;
-+
-+		if (!nl_attr_put32(n, nlen, 0 /* VXLAN_VNI */,
-+				   encap_data->vni))
-+			return false;
-+
-+		if (ZEBRA_DEBUG_KERNEL)
-+			zlog_debug(
-+				"%s: VNI:%d RMAC:%pEA", __func__, encap_data->vni,
-+				&encap_data->rmac);
-+
-+		if (!nl_attr_put(n, nlen, 1 /* VXLAN_RMAC */,
-+					&encap_data->rmac, sizeof(encap_data->rmac)))
-+			return false;
-+
-+		nl_attr_nest_end(n, nest);
-+		break;
-+	}
-+
-+	return true;
-+}
-+
- /* This function takes a nexthop as argument and
-  * appends to the given netlink msg. If the nexthop
-  * defines a preferred source, the src parameter
-@@ -1972,47 +2013,6 @@ static bool nexthop_set_src(const struct nexthop *nexthop, int family,
- 	return false;
- }
- 
--/*
-- * The function returns true if the attribute could be added
-- * to the message, otherwise false is returned.
-- */
--static int netlink_route_nexthop_encap(struct nlmsghdr *n, size_t nlen,
--				       struct nexthop *nh)
--{
--	struct rtattr *nest;
--	struct vxlan_nh_encap* encap_data;
--
--	switch (nh->nh_encap_type) {
--	case NET_VXLAN:
--		if (!nl_attr_put16(n, nlen, RTA_ENCAP_TYPE, nh->nh_encap_type))
--			return false;
--
--		nest = nl_attr_nest(n, nlen, RTA_ENCAP);
--		if (!nest)
--			return false;
--
--		encap_data = &nh->nh_encap.encap_data;
--
--		if (!nl_attr_put32(n, nlen, 0 /* VXLAN_VNI */,
--				   encap_data->vni))
--			return false;
--
--		if (ZEBRA_DEBUG_KERNEL)
--			zlog_debug(
--				"%s: VNI:%d RMAC:%pEA", __func__, encap_data->vni,
--				&encap_data->rmac);
--
--		if (!nl_attr_put(n, nlen, 1 /* VXLAN_RMAC */,
--					&encap_data->rmac, sizeof(encap_data->rmac)))
--			return false;
--
--		nl_attr_nest_end(n, nest);
--		break;
--	}
--
--	return true;
--}
--
- /*
-  * Routing table change via netlink interface, using a dataplane context object
-  *
--- 
-2.17.1
-
-
-From 35e1282543bda57563a68046489e0fdb1a0416d1 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 8 May 2024 12:48:12 -0400
-Subject: [PATCH 2/3] zebra: Move fpm check to inside of
- netlink_route_nexthop_encap
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- zebra/rt_netlink.c | 26 +++++++++++++-------------
- 1 file changed, 13 insertions(+), 13 deletions(-)
-
-diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index 42b4d7c199..e52916fa07 100644
---- a/zebra/rt_netlink.c
-+++ b/zebra/rt_netlink.c
-@@ -1736,12 +1736,15 @@ static inline bool _netlink_set_tag(struct nlmsghdr *n, unsigned int maxlen,
-  * The function returns true if the attribute could be added
-  * to the message, otherwise false is returned.
-  */
--static int netlink_route_nexthop_encap(struct nlmsghdr *n, size_t nlen,
--				       struct nexthop *nh)
-+static int netlink_route_nexthop_encap(bool fpm, struct nlmsghdr *n,
-+				       size_t nlen, struct nexthop *nh)
- {
- 	struct rtattr *nest;
- 	struct vxlan_nh_encap* encap_data;
- 
-+	if (!fpm)
-+		return true;
-+
- 	switch (nh->nh_encap_type) {
- 	case NET_VXLAN:
- 		if (!nl_attr_put16(n, nlen, RTA_ENCAP_TYPE, nh->nh_encap_type))
-@@ -2276,12 +2279,10 @@ ssize_t netlink_route_multipath_msg_encode(int cmd,
- 				 * Add encapsulation information when
- 				 * installing via FPM.
- 				 */
--				if (fpm) {
--					if (!netlink_route_nexthop_encap(&req->n,
--									 datalen,
--									 nexthop))
--						return 0;
--				}
-+				if (!netlink_route_nexthop_encap(fpm, &req->n,
-+								 datalen,
-+								 nexthop))
-+					return 0;
- 
- 				nexthop_num++;
- 				break;
-@@ -2336,11 +2337,10 @@ ssize_t netlink_route_multipath_msg_encode(int cmd,
- 				 * Add encapsulation information when installing via
- 				 * FPM.
- 				 */
--				if (fpm) {
--					if (!netlink_route_nexthop_encap(
--						    &req->n, datalen, nexthop))
--						return 0;
--				}
-+				if (!netlink_route_nexthop_encap(fpm, &req->n,
-+								 datalen,
-+								 nexthop))
-+					return 0;
- 
- 				if (!setsrc && src1) {
- 					if (p->family == AF_INET)
--- 
-2.17.1
-
-
-From 9f3314723a0569c1d2b5aec5088af87c1d06d40e Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 8 May 2024 12:52:12 -0400
-Subject: [PATCH 3/3] zebra: Ensure multipath encodes vxlan right for fpm usage
-
-The fpm code path for the dplane_fpm_nl module was improperly
-encoding the multipath nexthop data for vxlan type routes.
-Move this into the embedded nexthop encoding where it belongs.
-
-This change makes it so that the usage of `-M dplane_fpm_nl`
-is now producing the same netlink messages that `-M fpm`
-produces when using vxlan based nexthops.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- zebra/rt_netlink.c | 43 ++++++++++++++++++++++++-------------------
- 1 file changed, 24 insertions(+), 19 deletions(-)
-
-diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index e52916fa07..3f51894be3 100644
---- a/zebra/rt_netlink.c
-+++ b/zebra/rt_netlink.c
-@@ -1737,7 +1737,7 @@ static inline bool _netlink_set_tag(struct nlmsghdr *n, unsigned int maxlen,
-  * to the message, otherwise false is returned.
-  */
- static int netlink_route_nexthop_encap(bool fpm, struct nlmsghdr *n,
--				       size_t nlen, struct nexthop *nh)
-+				       size_t nlen, const struct nexthop *nh)
- {
- 	struct rtattr *nest;
- 	struct vxlan_nh_encap* encap_data;
-@@ -1794,10 +1794,13 @@ static int netlink_route_nexthop_encap(bool fpm, struct nlmsghdr *n,
-  * The function returns true if the nexthop could be added
-  * to the message, otherwise false is returned.
-  */
--static bool _netlink_route_build_multipath(
--	const struct prefix *p, const char *routedesc, int bytelen,
--	const struct nexthop *nexthop, struct nlmsghdr *nlmsg, size_t req_size,
--	struct rtmsg *rtmsg, const union g_addr **src, route_tag_t tag)
-+static bool _netlink_route_build_multipath(const struct prefix *p,
-+					   const char *routedesc, int bytelen,
-+					   const struct nexthop *nexthop,
-+					   struct nlmsghdr *nlmsg,
-+					   size_t req_size, struct rtmsg *rtmsg,
-+					   const union g_addr **src,
-+					   route_tag_t tag, bool fpm)
- {
- 	char label_buf[256];
- 	struct vrf *vrf;
-@@ -1906,6 +1909,13 @@ static bool _netlink_route_build_multipath(
- 	if (!_netlink_set_tag(nlmsg, req_size, tag))
- 		return false;
- 
-+	/*
-+	 * Add encapsulation information when installing via
-+	 * FPM.
-+	 */
-+	if (!netlink_route_nexthop_encap(fpm, nlmsg, req_size, nexthop))
-+		return false;
-+
- 	nl_attr_rtnh_end(nlmsg, rtnh);
- 	return true;
- }
-@@ -1940,7 +1950,7 @@ _netlink_mpls_build_multipath(const struct prefix *p, const char *routedesc,
- 	bytelen = (family == AF_INET ? 4 : 16);
- 	return _netlink_route_build_multipath(p, routedesc, bytelen,
- 					      nhlfe->nexthop, nlmsg, req_size,
--					      rtmsg, src, 0);
-+					      rtmsg, src, 0, false);
- }
- 
- static void _netlink_mpls_debug(int cmd, uint32_t label, const char *routedesc)
-@@ -2327,19 +2337,14 @@ ssize_t netlink_route_multipath_msg_encode(int cmd,
- 						    : "multipath";
- 				nexthop_num++;
- 
--				if (!_netlink_route_build_multipath(
--					    p, routedesc, bytelen, nexthop,
--					    &req->n, datalen, &req->r, &src1,
--					    tag))
--					return 0;
--
--				/*
--				 * Add encapsulation information when installing via
--				 * FPM.
--				 */
--				if (!netlink_route_nexthop_encap(fpm, &req->n,
--								 datalen,
--								 nexthop))
-+				if (!_netlink_route_build_multipath(p, routedesc,
-+								    bytelen,
-+								    nexthop,
-+								    &req->n,
-+								    datalen,
-+								    &req->r,
-+								    &src1, tag,
-+								    fpm))
- 					return 0;
- 
- 				if (!setsrc && src1) {
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0029-staticd-Fix-a-crash-that-occurs-when-modifying-an-SRv6-SID.patch b/src/sonic-frr/patch/0029-staticd-Fix-a-crash-that-occurs-when-modifying-an-SRv6-SID.patch
new file mode 100644
index 00000000000..8b0c7a7d3bd
--- /dev/null
+++ b/src/sonic-frr/patch/0029-staticd-Fix-a-crash-that-occurs-when-modifying-an-SRv6-SID.patch
@@ -0,0 +1,387 @@
+From 753f37f98697ac04ac75fdf020f2a4faa3a74394 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Sun, 23 Mar 2025 16:56:52 +0100
+Subject: [PATCH 1/2] staticd: Fix crash that occurs when modifying an SRv6 SID
+
+When the user modifies an SRv6 SID and then removes all SIDs, staticd
+crashes:
+
+```
+2025/03/23 08:37:22.691860 STATIC: lib/memory.c:74: mt_count_free(): assertion (mt->n_alloc) failed
+STATIC: Received signal 6 at 1742715442 (si_addr 0x8200007cf0); aborting...
+STATIC: zlog_signal+0x390                  fcc704a844b8     ffffd7450390 /usr/lib/frr/libfrr.so.0 (mapped at 0xfcc704800000)
+STATIC: core_handler+0x1f8                 fcc704b79990     ffffd7450590 /usr/lib/frr/libfrr.so.0 (mapped at 0xfcc704800000)
+STATIC:     ---- signal ----
+STATIC: ?                                  fcc705c008f8     ffffd74507a0 linux-vdso.so.1 (mapped at 0xfcc705c00000)
+STATIC: pthread_key_delete+0x1a0           fcc70458f1f0     ffffd7451a00 /lib/aarch64-linux-gnu/libc.so.6 (mapped at 0xfcc704510000)
+STATIC: raise+0x1c                         fcc70454a67c     ffffd7451ad0 /lib/aarch64-linux-gnu/libc.so.6 (mapped at 0xfcc704510000)
+STATIC: abort+0xe4                         fcc704537130     ffffd7451af0 /lib/aarch64-linux-gnu/libc.so.6 (mapped at 0xfcc704510000)
+STATIC: _zlog_assert_failed+0x3c4          fcc704c407c8     ffffd7451c40 /usr/lib/frr/libfrr.so.0 (mapped at 0xfcc704800000)
+STATIC: mt_count_free+0x12c                fcc704a93c74     ffffd7451dc0 /usr/lib/frr/libfrr.so.0 (mapped at 0xfcc704800000)
+STATIC: qfree+0x28                         fcc704a93fa0     ffffd7451e70 /usr/lib/frr/libfrr.so.0 (mapped at 0xfcc704800000)
+STATIC: static_srv6_sid_free+0x1c          adc1df8fa544     ffffd7451e90 /usr/lib/frr/staticd (mapped at 0xadc1df8a0000)
+STATIC: delete_static_srv6_sid+0x14        adc1df8faafc     ffffd7451eb0 /usr/lib/frr/staticd (mapped at 0xadc1df8a0000)
+STATIC: list_delete_all_node+0x104         fcc704a60eec     ffffd7451ed0 /usr/lib/frr/libfrr.so.0 (mapped at 0xfcc704800000)
+STATIC: list_delete+0x8c                   fcc704a61054     ffffd7451f00 /usr/lib/frr/libfrr.so.0 (mapped at 0xfcc704800000)
+STATIC: static_srv6_cleanup+0x20           adc1df8fabdc     ffffd7451f20 /usr/lib/frr/staticd (mapped at 0xadc1df8a0000)
+STATIC: sigint+0x40                        adc1df8be544     ffffd7451f30 /usr/lib/frr/staticd (mapped at 0xadc1df8a0000)
+STATIC: frr_sigevent_process+0x148         fcc704b79460     ffffd7451f40 /usr/lib/frr/libfrr.so.0 (mapped at 0xfcc704800000)
+STATIC: event_fetch+0x1c4                  fcc704bc0834     ffffd7451f60 /usr/lib/frr/libfrr.so.0 (mapped at 0xfcc704800000)
+STATIC: frr_run+0x650                      fcc704a5d230     ffffd7452080 /usr/lib/frr/libfrr.so.0 (mapped at 0xfcc704800000)
+STATIC: main+0x1d0                         adc1df8be75c     ffffd7452270 /usr/lib/frr/staticd (mapped at 0xadc1df8a0000)
+STATIC: __libc_init_first+0x7c             fcc7045373fc     ffffd74522b0 /lib/aarch64-linux-gnu/libc.so.6 (mapped at 0xfcc704510000)
+STATIC: __libc_start_main+0x98             fcc7045374cc     ffffd74523c0 /lib/aarch64-linux-gnu/libc.so.6 (mapped at 0xfcc704510000)
+STATIC: _start+0x30                        adc1df8be0f0     ffffd7452420 /usr/lib/frr/staticd (mapped at 0xadc1df8a0000)
+```
+
+Tracking this down, the crash occurs because every time we modify a
+SID, staticd executes some callbacks to modify the SID and finally it
+calls `apply_finish`, which re-adds the SID to the list `srv6_sids`.
+
+This leads to having the same SID multiple times in the `srv6_sids`
+list. When we delete all SIDs, staticd attempts to deallocate the same
+SID multiple times, which leads to the crash.
+
+This commit fixes the issue by moving the code that adds the SID to the
+list from the `apply_finish` callback to the `create` callback.
+This ensures that the SID is inserted into the list only once, when it
+is created. For all subsequent modifications, the SID is modified but
+not added to the list.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_nb_config.c | 3 +--
+ zebra/zebra_srv6.c         | 2 +-
+ 2 files changed, 2 insertions(+), 3 deletions(-)
+
+diff --git a/staticd/static_nb_config.c b/staticd/static_nb_config.c
+index 71df15fa6..d4e81edb5 100644
+--- a/staticd/static_nb_config.c
++++ b/staticd/static_nb_config.c
+@@ -1112,6 +1112,7 @@ int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routi
+ 	yang_dnode_get_ipv6p(&sid_value, args->dnode, "sid");
+ 	sid = static_srv6_sid_alloc(&sid_value);
+ 	nb_running_set_entry(args->dnode, sid);
++	listnode_add(srv6_sids, sid);
+ 
+ 	return NB_OK;
+ }
+@@ -1145,13 +1146,11 @@ void routing_control_plane_protocols_control_plane_protocol_staticd_segment_rout
+ 		       "%s: Locator %s not found, trying to get locator information from zebra",
+ 		       __func__, sid->locator_name);
+ 		static_zebra_srv6_manager_get_locator(sid->locator_name);
+-		listnode_add(srv6_sids, sid);
+ 		return;
+ 	}
+ 
+ 	sid->locator = locator;
+ 
+-	listnode_add(srv6_sids, sid);
+ 	static_zebra_request_srv6_sid(sid);
+ }
+ 
+diff --git a/zebra/zebra_srv6.c b/zebra/zebra_srv6.c
+index f9b5dd880..36dc5c881 100644
+--- a/zebra/zebra_srv6.c
++++ b/zebra/zebra_srv6.c
+@@ -1525,7 +1525,7 @@ static int get_srv6_sid_explicit(struct zebra_srv6_sid **sid,
+ 			 * It is not allowed to allocate an explicit SID for a given context if the context
+ 			 * is already associated with an explicit SID
+ 			 */
+-			if (s->sid->alloc_mode == SRV6_SID_ALLOC_MODE_EXPLICIT) {
++			if (s->ctx.behavior != ZEBRA_SEG6_LOCAL_ACTION_END && s->sid->alloc_mode == SRV6_SID_ALLOC_MODE_EXPLICIT) {
+ 				zlog_err("%s: cannot alloc SID %pI6 for ctx %s: ctx already associated with SID %pI6",
+ 					 __func__, sid_value,
+ 					 srv6_sid_ctx2str(buf, sizeof(buf),
+-- 
+2.34.1
+
+
+From 29f88bab9bcd8ec0e4ae204dbb633ebfa26fea47 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Sun, 23 Mar 2025 16:57:15 +0100
+Subject: [PATCH 2/2] tests: Add test case to verify SRv6 SID modify
+
+This commit adds a test case that modifies a SID and verifies that the
+RIB is as expected.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ .../expected_srv6_sids_sid_modify.json        | 201 ++++++++++++++++++
+ tests/topotests/static_srv6_sids/r1/setup.sh  |   3 +
+ .../static_srv6_sids/test_static_srv6_sids.py |  38 ++++
+ 3 files changed, 242 insertions(+)
+ create mode 100644 tests/topotests/static_srv6_sids/expected_srv6_sids_sid_modify.json
+
+diff --git a/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_modify.json b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_modify.json
+new file mode 100644
+index 000000000..070b7ade2
+--- /dev/null
++++ b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_modify.json
+@@ -0,0 +1,201 @@
++{
++	"fcbb:bbbb:1::/48": [
++		{
++			"prefix": "fcbb:bbbb:1::/48",
++			"prefixLen": 48,
++			"protocol": "static",
++			"vrfId": 0,
++			"vrfName": "default",
++			"selected": true,
++			"destSelected": true,
++			"distance": 1,
++			"metric": 0,
++			"installed": true,
++			"table": 254,
++			"internalStatus": 16,
++			"internalFlags": 9,
++			"internalNextHopNum": 1,
++			"internalNextHopActiveNum": 1,
++			"nexthops": [
++				{
++					"flags": 3,
++					"fib": true,
++					"directlyConnected": true,
++					"interfaceName": "sr0",
++					"active": true,
++					"weight": 1,
++					"seg6local": {
++						"action": "End",
++						"sidStructure": {
++							"blockLen": 32,
++							"nodeLen": 16,
++							"funcLen": 0,
++							"argLen": 0
++						}
++					},
++					"seg6localContext": {
++
++					}
++				}
++			]
++		}
++	],
++	"fcbb:bbbb:1:fe10::/64": [
++		{
++			"prefix": "fcbb:bbbb:1:fe10::/64",
++			"prefixLen": 64,
++			"protocol": "static",
++			"vrfId": 0,
++			"vrfName": "default",
++			"selected": true,
++			"destSelected": true,
++			"distance": 1,
++			"metric": 0,
++			"installed": true,
++			"table": 254,
++			"internalStatus": 16,
++			"internalFlags": 9,
++			"internalNextHopNum": 1,
++			"internalNextHopActiveNum": 1,
++			"nexthops": [
++				{
++					"flags": 3,
++					"fib": true,
++					"directlyConnected": true,
++					"interfaceName": "Vrf10",
++					"active": true,
++					"weight": 1,
++					"seg6local": {
++						"action": "End.DT4",
++						"sidStructure": {
++							"blockLen": 32,
++							"nodeLen": 16,
++							"funcLen": 16,
++							"argLen": 0
++						}
++					},
++					"seg6localContext": {
++						"table": 10
++					}
++				}
++			]
++		}
++	],
++	"fcbb:bbbb:1:fe20::/64": [
++		{
++			"prefix": "fcbb:bbbb:1:fe20::/64",
++			"prefixLen": 64,
++			"protocol": "static",
++			"vrfId": 0,
++			"vrfName": "default",
++			"selected": true,
++			"destSelected": true,
++			"distance": 1,
++			"metric": 0,
++			"installed": true,
++			"table": 254,
++			"internalStatus": 16,
++			"internalFlags": 9,
++			"internalNextHopNum": 1,
++			"internalNextHopActiveNum": 1,
++			"nexthops": [
++				{
++					"flags": 3,
++					"fib": true,
++					"directlyConnected": true,
++					"interfaceName": "Vrf40",
++					"active": true,
++					"weight": 1,
++					"seg6local": {
++						"action": "End.DT46",
++						"sidStructure": {
++							"blockLen": 32,
++							"nodeLen": 16,
++							"funcLen": 16,
++							"argLen": 0
++						}
++					},
++					"seg6localContext": {
++						"table": 40
++					}
++				}
++			]
++		}
++	],
++	"fcbb:bbbb:1:fe30::/64": [
++		{
++			"prefix": "fcbb:bbbb:1:fe30::/64",
++			"prefixLen": 64,
++			"protocol": "static",
++			"vrfId": 0,
++			"vrfName": "default",
++			"selected": true,
++			"destSelected": true,
++			"distance": 1,
++			"metric": 0,
++			"installed": true,
++			"table": 254,
++			"internalStatus": 16,
++			"internalFlags": 9,
++			"internalNextHopNum": 1,
++			"internalNextHopActiveNum": 1,
++			"nexthops": [
++				{
++					"flags": 3,
++					"fib": true,
++					"directlyConnected": true,
++					"interfaceName": "Vrf30",
++					"active": true,
++					"weight": 1,
++					"seg6local": {
++						"action": "End.DT46",
++						"sidStructure": {
++							"blockLen": 32,
++							"nodeLen": 16,
++							"funcLen": 16,
++							"argLen": 0
++						}
++					},
++					"seg6localContext": {
++						"table": 30
++					}
++				}
++			]
++		}
++	],
++	"fcbb:bbbb:1:fe40::/64": [
++		{
++			"prefix": "fcbb:bbbb:1:fe40::/64",
++			"prefixLen": 64,
++			"protocol": "static",
++			"vrfId": 0,
++			"vrfName": "default",
++			"selected": true,
++			"destSelected": true,
++			"distance": 1,
++			"metric": 0,
++			"installed": true,
++			"table": 254,
++			"internalStatus": 16,
++			"internalFlags": 9,
++			"internalNextHopNum": 1,
++			"internalNextHopActiveNum": 1,
++			"nexthops": [
++				{
++					"flags": 3,
++					"fib": true,
++					"directlyConnected": true,
++					"interfaceName": "sr0",
++					"active": true,
++					"weight": 1,
++					"seg6local": {
++						"action": "End.X"
++					},
++					"seg6localContext": {
++						"nh6": "2001::2"
++					}
++				}
++			]
++		}
++	]
++}
+\ No newline at end of file
+diff --git a/tests/topotests/static_srv6_sids/r1/setup.sh b/tests/topotests/static_srv6_sids/r1/setup.sh
+index 040be7391..99cbdee28 100644
+--- a/tests/topotests/static_srv6_sids/r1/setup.sh
++++ b/tests/topotests/static_srv6_sids/r1/setup.sh
+@@ -10,4 +10,7 @@ ip link set Vrf20 up
+ ip link add Vrf30 type vrf table 30
+ ip link set Vrf30 up
+ 
++ip link add Vrf40 type vrf table 40
++ip link set Vrf40 up
++
+ sysctl -w net.vrf.strict_mode=1
+diff --git a/tests/topotests/static_srv6_sids/test_static_srv6_sids.py b/tests/topotests/static_srv6_sids/test_static_srv6_sids.py
+index 565b38f62..1ea94c8c0 100755
+--- a/tests/topotests/static_srv6_sids/test_static_srv6_sids.py
++++ b/tests/topotests/static_srv6_sids/test_static_srv6_sids.py
+@@ -172,6 +172,44 @@ def test_srv6_static_sids_sid_readd():
+     check_srv6_static_sids(router, "expected_srv6_sids.json")
+ 
+ 
++def test_srv6_static_sids_sid_modify():
++    """
++    Modify the static SIDs and verify the routing table
++    """
++    tgen = get_topogen()
++    if tgen.routers_have_failure():
++        pytest.skip(tgen.errors)
++    router = tgen.gears["r1"]
++
++    def _check_srv6_static_sids(router, expected_route_file):
++        logger.info("checking zebra srv6 static sids")
++        output = json.loads(router.vtysh_cmd("show ipv6 route static json"))
++        expected = open_json_file("{}/{}".format(CWD, expected_route_file))
++        return topotest.json_cmp(output, expected)
++
++    def check_srv6_static_sids(router, expected_file):
++        func = functools.partial(_check_srv6_static_sids, router, expected_file)
++        _, result = topotest.run_and_expect(func, None, count=15, wait=1)
++        assert result is None, "Failed"
++
++    router.vtysh_cmd(
++        """
++        configure terminal
++         segment-routing
++          srv6
++           static-sids
++            sid fcbb:bbbb:1:fe20::/64 locator MAIN behavior uDT46 vrf Vrf40
++        """
++    )
++
++    # FOR DEVELOPER:
++    # If you want to stop some specific line and start interactive shell,
++    # please use tgen.mininet_cli() to start it.
++
++    logger.info("Test for srv6 sids configuration")
++    check_srv6_static_sids(router, "expected_srv6_sids_sid_modify.json")
++
++
+ def test_srv6_static_sids_sid_delete_all():
+     """
+     Remove all static SIDs and verify they get removed
+-- 
+2.34.1
+
diff --git a/src/sonic-frr/patch/0030-staticd-Avoid-requesting-SRv6-sid-from-zebra-when-loc-and-sid-block-dont-match.patch b/src/sonic-frr/patch/0030-staticd-Avoid-requesting-SRv6-sid-from-zebra-when-loc-and-sid-block-dont-match.patch
new file mode 100644
index 00000000000..5a9ac433faa
--- /dev/null
+++ b/src/sonic-frr/patch/0030-staticd-Avoid-requesting-SRv6-sid-from-zebra-when-loc-and-sid-block-dont-match.patch
@@ -0,0 +1,141 @@
+From dbd9fed0b30dd1d3475686f71f87d326eeafd26c Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Fri, 4 Apr 2025 13:27:03 -0700
+Subject: [PATCH] staticd: Avoid requesting SRv6 sid from zebra when loc and
+ sid block dont match
+
+Currently, when the locator block and sid block differs, staticd would
+still go ahead and request zebra to allocate the SID which it does if
+there is atleast one match (from any locators).
+
+Only when staticd tries to install the route, it sees that the locator
+block and sid block are different and avoids installing the route.
+
+Fix:
+Check if the locator block and sid block match before even requesting
+Zebra to allocate one.
+
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+---
+ staticd/static_zebra.c                        | 45 +++++++++++--------
+ .../static_srv6_sids/test_static_srv6_sids.py | 30 +++++++++++++
+ 2 files changed, 56 insertions(+), 19 deletions(-)
+
+diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
+index 3ed525f386fd..e3b646a39290 100644
+--- a/staticd/static_zebra.c
++++ b/staticd/static_zebra.c
+@@ -625,8 +625,6 @@ void static_zebra_srv6_sid_install(struct static_srv6_sid *sid)
+ 	struct seg6local_context ctx = {};
+ 	struct interface *ifp = NULL;
+ 	struct vrf *vrf;
+-	struct prefix_ipv6 sid_block = {};
+-	struct prefix_ipv6 locator_block = {};
+ 	struct prefix_ipv6 sid_locator = {};
+ 
+ 	if (!sid)
+@@ -738,22 +736,7 @@ void static_zebra_srv6_sid_install(struct static_srv6_sid *sid)
+ 		break;
+ 	}
+ 
+-	sid_block = sid->addr;
+-	sid_block.prefixlen = sid->locator->block_bits_length;
+-	apply_mask(&sid_block);
+-
+-	locator_block = sid->locator->prefix;
+-	locator_block.prefixlen = sid->locator->block_bits_length;
+-	apply_mask(&locator_block);
+-
+-	if (prefix_same(&sid_block, &locator_block))
+-		ctx.block_len = sid->locator->block_bits_length;
+-	else {
+-		zlog_warn("SID block %pFX does not match locator block %pFX", &sid_block,
+-			  &locator_block);
+-		return;
+-	}
+-
++	ctx.block_len = sid->locator->block_bits_length;
+ 	sid_locator = sid->addr;
+ 	sid_locator.prefixlen = sid->locator->block_bits_length + sid->locator->node_bits_length;
+ 	apply_mask(&sid_locator);
+@@ -915,6 +898,30 @@ void static_zebra_srv6_sid_uninstall(struct static_srv6_sid *sid)
+ 	UNSET_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_SENT_TO_ZEBRA);
+ }
+ 
++/* Validate if the sid block and locator block are the same */
++static bool static_zebra_sid_locator_block_check(struct static_srv6_sid *sid)
++{
++	struct prefix_ipv6 sid_block = {};
++	struct prefix_ipv6 locator_block = {};
++
++	sid_block = sid->addr;
++	sid_block.prefixlen = sid->locator->block_bits_length;
++	apply_mask(&sid_block);
++
++	locator_block = sid->locator->prefix;
++	locator_block.prefixlen = sid->locator->block_bits_length;
++	apply_mask(&locator_block);
++
++	if (!prefix_same(&sid_block, &locator_block)) {
++		zlog_warn("SID block %pFX does not match locator block %pFX", &sid_block,
++			  &locator_block);
++
++		return false;
++	}
++
++	return true;
++}
++
+ extern void static_zebra_request_srv6_sid(struct static_srv6_sid *sid)
+ {
+ 	struct srv6_sid_ctx ctx = {};
+@@ -922,7 +929,7 @@ extern void static_zebra_request_srv6_sid(struct static_srv6_sid *sid)
+ 	struct vrf *vrf;
+ 	struct interface *ifp;
+ 
+-	if (!sid)
++	if (!sid || !static_zebra_sid_locator_block_check(sid))
+ 		return;
+ 
+ 	/* convert `srv6_endpoint_behavior_codepoint` to `seg6local_action_t` */
+diff --git a/tests/topotests/static_srv6_sids/test_static_srv6_sids.py b/tests/topotests/static_srv6_sids/test_static_srv6_sids.py
+index 1ea94c8c070c..abf49df046b4 100755
+--- a/tests/topotests/static_srv6_sids/test_static_srv6_sids.py
++++ b/tests/topotests/static_srv6_sids/test_static_srv6_sids.py
+@@ -210,6 +210,36 @@ def check_srv6_static_sids(router, expected_file):
+     check_srv6_static_sids(router, "expected_srv6_sids_sid_modify.json")
+ 
+ 
++def test_srv6_static_sids_wrong_sid_block():
++    """
++    The purpose of this test is to verify how FRR behaves when the user
++    provides an invalid configuration.
++    Add a new static Sid with a mismatch in locator and sid block
++    to make sure no Sid is allocated by zebra (TBD: Strict verify once show cmd
++    commit is merged (#16836))
++    """
++    router = get_topogen().gears["r1"]
++    router.vtysh_cmd(
++        """
++        configure terminal
++         segment-routing
++          srv6
++           locators
++            locator MAIN1
++             prefix fcbb:1234:1::/48 block-len 32 node-len 16 func-bits 16
++          srv6
++           static-sids
++            sid fcbb:bbbb:1:fe50::/64 locator MAIN1 behavior uA interface sr0 nexthop 2001::3
++        """
++    )
++
++    output = json.loads(router.vtysh_cmd("show ipv6 route static json"))
++    if "fcbb:bbbb:1:fe50::/64" in output:
++        assert (
++            False
++        ), "Failed. Expected no entry for fcbb:bbbb:1:fe50::/64 since loc and node block dont match"
++
++
+ def test_srv6_static_sids_sid_delete_all():
+     """
+     Remove all static SIDs and verify they get removed
diff --git a/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch b/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch
deleted file mode 100644
index f6de465595a..00000000000
--- a/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch
+++ /dev/null
@@ -1,173 +0,0 @@
-From 7c711ff437985b23a4dd919a98b22b8ea14ef553 Mon Sep 17 00:00:00 2001
-From: Rajasekar Raja <rajasekarr@nvidia.com>
-Date: Mon, 12 Feb 2024 10:44:18 -0800
-Subject: [PATCH 02/11] zebra: backpressure - Zebra push back on Buffer/Stream
- creation
-
-Currently, the way zebra works is it creates pthread per client (BGP is
-of interest in this case) and this thread loops itself in zserv_read()
-to check for any incoming data. If there is one, then it reads,
-validates and adds it in the ibuf_fifo signalling the main thread to
-process the message. The main thread when it gets a change, processes
-the message, and invokes the function pointer registered in the header
-command. (Ex: zserv_handlers).
-
-Finally, if all of this was successful, this task reschedules itself and
-loops in zserv_read() again
-
-However, if there are already items on ibuf FIFO, that means zebra is
-slow in processing. And with the current mechanism if Zebra main is
-busy, the ibuf FIFO keeps growing holding up the memory.
-
-Show memory zebra:(Example: 15k streams hoarding ~160 MB of data)
---- qmem libfrr ---
-Stream             :       44 variable   3432352    15042 161243800
-
-Fix:
-Client IO Thread: (zserv_read)
- - Stop doing the read events when we know there are X number of items
-   on the FIFO already.(X - zebra zapi-packets <1-10000> (Default-1000)
-
- - Determine the number of items on the zserv->ibuf_fifo. Subtract this
-   from the work items and only pull the number of items off that would
-   take us to X items on the ibuf_fifo again.
-
- - If the number of items in the ibuf_fifo has reached to the maximum
-      * Either initially when zserv_read() is called (or)
-      * when processing the remainders of the incoming buffer
-   the client IO thread is woken by the the zebra main.
-
-Main thread: (zserv_process_message)
-If the client ibuf always schedules a wakeup to the client IO to read
-more items from the socked buffer. This way we ensure
- - Client IO thread always tries to read the socket buffer and add more
-   items to the ibuf_fifo (until max limit)
- - hidden config change (zebra zapi-packets <>) is taken into account
-
-Ticket: #3390099
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/zebra/zserv.c b/zebra/zserv.c
-index 6a64176d9..488712397 100644
---- a/zebra/zserv.c
-+++ b/zebra/zserv.c
-@@ -306,6 +306,14 @@ zwrite_fail:
-  * this task reschedules itself.
-  *
-  * Any failure in any of these actions is handled by terminating the client.
-+ *
-+ * The client's input buffer ibuf_fifo can have a maximum items as configured
-+ * in the packets_to_process. This way we are not filling up the FIFO more
-+ * than the maximum when the zebra main is busy. If the fifo has space, we
-+ * reschedule ourselves to read more.
-+ *
-+ * The main thread processes the items in ibuf_fifo and always signals the
-+ * client IO thread.
-  */
- static void zserv_read(struct event *thread)
- {
-@@ -313,16 +321,26 @@ static void zserv_read(struct event *thread)
- 	int sock;
- 	size_t already;
- 	struct stream_fifo *cache;
--	uint32_t p2p_orig;
--
--	uint32_t p2p;
-+	uint32_t p2p;	    /* Temp p2p used to process */
-+	uint32_t p2p_orig;  /* Configured p2p (Default-1000) */
-+	int p2p_avail;	    /* How much space is available for p2p */
- 	struct zmsghdr hdr;
-+	size_t client_ibuf_fifo_cnt = stream_fifo_count_safe(client->ibuf_fifo);
-
- 	p2p_orig = atomic_load_explicit(&zrouter.packets_to_process,
- 					memory_order_relaxed);
-+	p2p_avail = p2p_orig - client_ibuf_fifo_cnt;
-+
-+    /*
-+     * Do nothing if ibuf_fifo count has reached its max limit. Otherwise
-+     * proceed and reschedule ourselves if there is space in the ibuf_fifo.
-+     */
-+	if (p2p_avail <= 0)
-+		return;
-+
-+	p2p = p2p_avail;
- 	cache = stream_fifo_new();
--	p2p = p2p_orig;
--	sock = EVENT_FD(thread);
-+	sock = EVENT_FD(thread);
-
- 	while (p2p) {
- 		ssize_t nb;
-@@ -421,7 +439,7 @@ static void zserv_read(struct event *thread)
- 		p2p--;
- 	}
-
--	if (p2p < p2p_orig) {
-+	if (p2p < (uint32_t)p2p_avail) {
- 		uint64_t time_now = monotime(NULL);
-
- 		/* update session statistics */
-@@ -435,19 +453,23 @@ static void zserv_read(struct event *thread)
- 			while (cache->head)
- 				stream_fifo_push(client->ibuf_fifo,
- 						 stream_fifo_pop(cache));
-+			/* Need to update count as main thread could have processed few */
-+			client_ibuf_fifo_cnt =
-+				stream_fifo_count_safe(client->ibuf_fifo);
- 		}
-
- 		/* Schedule job to process those packets */
- 		zserv_event(client, ZSERV_PROCESS_MESSAGES);
--
- 	}
-
- 	if (IS_ZEBRA_DEBUG_PACKET)
--		zlog_debug("Read %d packets from client: %s", p2p_orig - p2p,
--			   zebra_route_string(client->proto));
-+		zlog_debug("Read %d packets from client: %s. Current ibuf fifo count: %zu. Conf P2p %d",
-+			   p2p_avail - p2p, zebra_route_string(client->proto),
-+			   client_ibuf_fifo_cnt, p2p_orig);
-
--	/* Reschedule ourselves */
--	zserv_client_event(client, ZSERV_CLIENT_READ);
-+	/* Reschedule ourselves since we have space in ibuf_fifo */
-+	if (client_ibuf_fifo_cnt < p2p_orig)
-+		zserv_client_event(client, ZSERV_CLIENT_READ);
-
- 	stream_fifo_free(cache);
-
-@@ -483,14 +505,20 @@ static void zserv_client_event(struct zserv *client,
-  * as the task argument.
-  *
-  * Each message is popped off the client's input queue and the action associated
-- * with the message is executed. This proceeds until there are no more messages,
-- * an error occurs, or the processing limit is reached.
-+ * with the message is executed. This proceeds until an error occurs, or the
-+ * processing limit is reached.
-  *
-  * The client's I/O thread can push at most zrouter.packets_to_process messages
-  * onto the input buffer before notifying us there are packets to read. As long
-  * as we always process zrouter.packets_to_process messages here, then we can
-  * rely on the read thread to handle queuing this task enough times to process
-  * everything on the input queue.
-+ *
-+ * If the client ibuf always schedules a wakeup to the client IO to read more
-+ * items from the socked buffer. This way we ensure
-+ *  - Client IO thread always tries to read the socket buffer and add more
-+ *    items to the ibuf_fifo (until max limit)
-+ *  - the hidden config change (zebra zapi-packets <>) is taken into account.
-  */
- static void zserv_process_messages(struct event *thread)
- {
-@@ -524,6 +552,9 @@ static void zserv_process_messages(struct event *thread)
- 	/* Reschedule ourselves if necessary */
- 	if (need_resched)
- 		zserv_event(client, ZSERV_PROCESS_MESSAGES);
-+
-+	/* Ensure to include the read socket in the select/poll/etc.. */
-+	zserv_client_event(client, ZSERV_CLIENT_READ);
- }
-
- int zserv_send_message(struct zserv *client, struct stream *msg)
diff --git a/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch b/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch
deleted file mode 100644
index 142ca6d0eff..00000000000
--- a/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch
+++ /dev/null
@@ -1,143 +0,0 @@
-From 7796ce2bb6eb1650ae1bec41ab2f270807b33c62 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 25 Jan 2024 12:53:24 -0500
-Subject: [PATCH 03/11] bgpd: backpressure - Add a typesafe list for Zebra
- Announcement
-
-Modify the bgp master to hold a type safe list for bgp_dests that need
-to be passed to zebra.
-
-Future commits will use this.
-
-Ticket: #3390099
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/bgpd/bgp_main.c b/bgpd/bgp_main.c
-index 851c4880c..44d5ee68c 100644
---- a/bgpd/bgp_main.c
-+++ b/bgpd/bgp_main.c
-@@ -207,6 +207,8 @@ static __attribute__((__noreturn__)) void bgp_exit(int status)
- 	bgp_evpn_mh_finish();
- 	bgp_nhg_finish();
- 
-+	zebra_announce_fini(&bm->zebra_announce_head);
-+
- 	/* reverse bgp_dump_init */
- 	bgp_dump_finish();
- 
-diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h
-index 5b4c3be21..67431ea4f 100644
---- a/bgpd/bgp_table.h
-+++ b/bgpd/bgp_table.h
-@@ -75,6 +75,9 @@ struct bgp_dest {
- 	struct bgp_dest *pdest;
- 
- 	STAILQ_ENTRY(bgp_dest) pq;
-+	struct bgp_path_info *za_bgp_pi;
-+
-+	struct zebra_announce_item zai;
- 
- 	uint64_t version;
- 
-@@ -91,12 +94,16 @@ struct bgp_dest {
- #define BGP_NODE_LABEL_REQUESTED        (1 << 7)
- #define BGP_NODE_SOFT_RECONFIG (1 << 8)
- #define BGP_NODE_PROCESS_CLEAR (1 << 9)
-+#define BGP_NODE_SCHEDULE_FOR_INSTALL (1 << 10)
-+#define BGP_NODE_SCHEDULE_FOR_DELETE (1 << 11)
- 
- 	struct bgp_addpath_node_data tx_addpath;
- 
- 	enum bgp_path_selection_reason reason;
- };
- 
-+DECLARE_LIST(zebra_announce, struct bgp_dest, zai);
-+
- extern void bgp_delete_listnode(struct bgp_dest *dest);
- /*
-  * bgp_table_iter_t
-diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index 337879a2d..88d4201a9 100644
---- a/bgpd/bgpd.c
-+++ b/bgpd/bgpd.c
-@@ -3867,10 +3867,20 @@ int bgp_delete(struct bgp *bgp)
- 	afi_t afi;
- 	safi_t safi;
- 	int i;
-+	struct bgp_dest *dest = NULL;
- 	struct graceful_restart_info *gr_info;
- 
- 	assert(bgp);
- 
-+	while (zebra_announce_count(&bm->zebra_announce_head)) {
-+		dest = zebra_announce_pop(&bm->zebra_announce_head);
-+		if (dest->za_bgp_pi->peer->bgp == bgp) {
-+			bgp_path_info_unlock(dest->za_bgp_pi);
-+			bgp_dest_unlock_node(dest);
-+		} else
-+			zebra_announce_add_tail(&bm->zebra_announce_head, dest);
-+	}
-+
- 	bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL);
- 
- 	/* make sure we withdraw any exported routes */
-@@ -8296,6 +8306,8 @@ void bgp_master_init(struct event_loop *master, const int buffer_size,
- 	memset(&bgp_master, 0, sizeof(bgp_master));
- 
- 	bm = &bgp_master;
-+
-+	zebra_announce_init(&bm->zebra_announce_head);
- 	bm->bgp = list_new();
- 	bm->listen_sockets = list_new();
- 	bm->port = BGP_PORT_DEFAULT;
-@@ -8314,6 +8326,7 @@ void bgp_master_init(struct event_loop *master, const int buffer_size,
- 	bm->outq_limit = BM_DEFAULT_Q_LIMIT;
- 	bm->t_bgp_sync_label_manager = NULL;
- 	bm->t_bgp_start_label_manager = NULL;
-+	bm->t_bgp_zebra_route = NULL;
- 
- 	bgp_mac_init();
- 	/* init the rd id space.
-@@ -8564,6 +8577,7 @@ void bgp_terminate(void)
- 	EVENT_OFF(bm->t_rmap_update);
- 	EVENT_OFF(bm->t_bgp_sync_label_manager);
- 	EVENT_OFF(bm->t_bgp_start_label_manager);
-+	EVENT_OFF(bm->t_bgp_zebra_route);
- 
- 	bgp_mac_finish();
- }
-diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
-index 0f6909532..a6b398a44 100644
---- a/bgpd/bgpd.h
-+++ b/bgpd/bgpd.h
-@@ -18,6 +18,8 @@
- #include "iana_afi.h"
- #include "asn.h"
- 
-+PREDECL_LIST(zebra_announce);
-+
- /* For union sockunion.  */
- #include "queue.h"
- #include "sockunion.h"
-@@ -170,11 +172,16 @@ struct bgp_master {
- 	uint32_t inq_limit;
- 	uint32_t outq_limit;
- 
-+	struct event *t_bgp_zebra_route;
-+
- 	struct event *t_bgp_sync_label_manager;
- 	struct event *t_bgp_start_label_manager;
- 
- 	bool v6_with_v4_nexthops;
- 
-+	/* To preserve ordering of installations into zebra across all Vrfs */
-+	struct zebra_announce_head zebra_announce_head;
-+
- 	QOBJ_FIELDS;
- };
- DECLARE_QOBJ_TYPE(bgp_master);
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0031-isisd-fix-srv6-sid-memory-leak.patch b/src/sonic-frr/patch/0031-isisd-fix-srv6-sid-memory-leak.patch
new file mode 100644
index 00000000000..b69335212eb
--- /dev/null
+++ b/src/sonic-frr/patch/0031-isisd-fix-srv6-sid-memory-leak.patch
@@ -0,0 +1,38 @@
+From 25c813ac382ba79270f40b85e168cdbcad499e2d Mon Sep 17 00:00:00 2001
+From: Louis Scalbert <louis.scalbert@6wind.com>
+Date: Wed, 16 Apr 2025 11:23:54 +0200
+Subject: [PATCH] isisd: fix srv6_sid memory leak
+
+Seen with isis_srv6_topo1 topotest.
+
+> ==178793==ERROR: LeakSanitizer: detected memory leaks
+>
+> Direct leak of 56 byte(s) in 1 object(s) allocated from:
+>     #0 0x7f3f63cb4a57 in __interceptor_calloc ../../../../src/libsanitizer/asan/asan_malloc_linux.cpp:154
+>     #1 0x7f3f6366f8dd in qcalloc lib/memory.c:105
+>     #2 0x561b810c62b7 in isis_srv6_sid_alloc isisd/isis_srv6.c:243
+>     #3 0x561b8111f944 in isis_zebra_srv6_sid_notify isisd/isis_zebra.c:1534
+>     #4 0x7f3f637df9d7 in zclient_read lib/zclient.c:4845
+>     #5 0x7f3f637779b2 in event_call lib/event.c:2011
+>     #6 0x7f3f63642ff1 in frr_run lib/libfrr.c:1216
+>     #7 0x561b81018bf2 in main isisd/isis_main.c:360
+>     #8 0x7f3f63029d8f in __libc_start_call_main ../sysdeps/nptl/libc_start_call_main.h:58
+
+Fixes: 0af0f4616d ("isisd: Receive SRv6 SIDs notifications from zebra")
+Signed-off-by: Louis Scalbert <louis.scalbert@6wind.com>
+---
+ isisd/isis_zebra.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/isisd/isis_zebra.c b/isisd/isis_zebra.c
+index 9d483c9368ac..15af9636ca92 100644
+--- a/isisd/isis_zebra.c
++++ b/isisd/isis_zebra.c
+@@ -1549,6 +1549,7 @@ static int isis_zebra_srv6_sid_notify(ZAPI_CALLBACK_ARGS)
+ 					isis_zebra_srv6_sid_uninstall(area, sid);
+ 					listnode_delete(area->srv6db.srv6_sids,
+ 							sid);
++					isis_srv6_sid_free(sid);
+ 				}
+ 
+ 				/* Allocate new SRv6 End SID */
diff --git a/src/sonic-frr/patch/0032-show-ipv6-route-json-displays-seg6local-flavors.patch b/src/sonic-frr/patch/0032-show-ipv6-route-json-displays-seg6local-flavors.patch
new file mode 100644
index 00000000000..d52edf2957a
--- /dev/null
+++ b/src/sonic-frr/patch/0032-show-ipv6-route-json-displays-seg6local-flavors.patch
@@ -0,0 +1,3234 @@
+From a95fd3e76fc1e056c53752963017a7fd75ed99b2 Mon Sep 17 00:00:00 2001
+From: Philippe Guibert <philippe.guibert@6wind.com>
+Date: Wed, 2 Apr 2025 13:20:18 +0200
+Subject: [PATCH 1/8] lib: add support for flavors in seg6 routes
+
+Until now, the 'show ipv6 route' was not showing up the flavors.
+
+> ip/ip -6 route add 2007::1 encap seg6local action End flavors psp dev dum1
+
+Before:
+> rt1# show ipv6 route
+> [..]
+> K>* 2007::1/128 [0/1024] is directly connected, dum1, seg6local End -, weight 1, 00:00:04
+
+After:
+> rt1# show ipv6 route
+> [..]
+> K>* 2007::1/128 [0/1024] is directly connected, dum1, seg6local End (PSP), weight 1, 00:00:04
+
+Note that the next-csid linux flavor will be handled separately.
+
+Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
+---
+ lib/srv6.c | 42 ++++++++++++++++++++++++++++++++++++------
+ lib/srv6.h |  3 +++
+ 2 files changed, 39 insertions(+), 6 deletions(-)
+
+diff --git a/lib/srv6.c b/lib/srv6.c
+index 4d820e2fcc15..e8a0d505df9a 100644
+--- a/lib/srv6.c
++++ b/lib/srv6.c
+@@ -116,35 +116,65 @@ void seg6local_context2json(const struct seg6local_context *ctx,
+ 	}
+ }
+ 
++static char *seg6local_flavors2str(char *str, size_t size,
++				   const struct seg6local_flavors_info *flv_info)
++{
++	size_t len = 0;
++	bool first = true;
++
++	if (!CHECK_SRV6_FLV_OP(flv_info->flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_PSP |
++							  ZEBRA_SEG6_LOCAL_FLV_OP_USP |
++							  ZEBRA_SEG6_LOCAL_FLV_OP_USD))
++		return str;
++
++	len += snprintf(str + len, size - len, " (");
++	if (CHECK_SRV6_FLV_OP(flv_info->flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_PSP)) {
++		len += snprintf(str + len, size - len, "%sPSP", first ? "" : "/");
++		first = false;
++	}
++	if (CHECK_SRV6_FLV_OP(flv_info->flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_USP)) {
++		len += snprintf(str + len, size - len, "%sUSP", first ? "" : "/");
++		first = false;
++	}
++	if (CHECK_SRV6_FLV_OP(flv_info->flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_USD))
++		len += snprintf(str + len, size - len, "%sUSD", first ? "" : "/");
++
++	snprintf(str + len, size - len, ")");
++
++	return str;
++}
+ const char *seg6local_context2str(char *str, size_t size,
+ 				  const struct seg6local_context *ctx,
+ 				  uint32_t action)
+ {
+-	switch (action) {
++	char flavor[SRV6_FLAVORS_STRLEN], *p_flavor;
+ 
++	flavor[0] = '\0';
++	p_flavor = seg6local_flavors2str(flavor, sizeof(flavor), &ctx->flv);
++	switch (action) {
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END:
+-		snprintf(str, size, "-");
++		snprintf(str, size, "%s", p_flavor);
+ 		return str;
+ 
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_X:
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DX6:
+-		snprintfrr(str, size, "nh6 %pI6", &ctx->nh6);
++		snprintfrr(str, size, "nh6 %pI6%s", &ctx->nh6, p_flavor);
+ 		return str;
+ 
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DX4:
+-		snprintfrr(str, size, "nh4 %pI4", &ctx->nh4);
++		snprintfrr(str, size, "nh4 %pI4%s", &ctx->nh4, p_flavor);
+ 		return str;
+ 
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_T:
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DT6:
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DT4:
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DT46:
+-		snprintf(str, size, "table %u", ctx->table);
++		snprintf(str, size, "table %u%s", ctx->table, p_flavor);
+ 		return str;
+ 
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_B6:
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_B6_ENCAP:
+-		snprintfrr(str, size, "nh6 %pI6", &ctx->nh6);
++		snprintfrr(str, size, "nh6 %pI6%s", &ctx->nh6, p_flavor);
+ 		return str;
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DX2:
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_BM:
+diff --git a/lib/srv6.h b/lib/srv6.h
+index bd80253b55a3..708792fb288d 100644
+--- a/lib/srv6.h
++++ b/lib/srv6.h
+@@ -88,6 +88,9 @@ struct seg6_segs {
+ 	struct in6_addr segs[256];
+ };
+ 
++/* flavors psp, usd, usp, next-csid */
++#define SRV6_FLAVORS_STRLEN 50
++
+ struct seg6local_flavors_info {
+ 	/* Flavor operations */
+ 	uint32_t flv_ops;
+
+From 25056f31b6d9de4dc48676cfa28a931c051f1373 Mon Sep 17 00:00:00 2001
+From: Philippe Guibert <philippe.guibert@6wind.com>
+Date: Wed, 2 Apr 2025 15:14:50 +0200
+Subject: [PATCH 2/8] zebra: precise debug information about NHA_ENCAP
+ attribute
+
+Tell in the NHA_ENCAP attribute that it may also contain SRv6 SIDs.
+
+Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
+---
+ zebra/debug_nl.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/zebra/debug_nl.c b/zebra/debug_nl.c
+index 037d0b6237d2..8b0372b03cea 100644
+--- a/zebra/debug_nl.c
++++ b/zebra/debug_nl.c
+@@ -1409,8 +1409,8 @@ static void nlnh_dump(struct nhmsg *nhm, size_t msglen)
+ 		}
+ 		break;
+ 	case NHA_ENCAP:
+-		/* TODO: handle MPLS labels. */
+-		zlog_debug("      unparsed MPLS labels");
++		/* TODO: handle MPLS labels or SRv6 SIDs. */
++		zlog_debug("      unparsed MPLS labels or SRv6 SIDs");
+ 		break;
+ 	case NHA_GROUPS:
+ 		/* TODO: handle this message. */
+
+From a078e2e52e98da9362fc7fa267a7e8933139f8f8 Mon Sep 17 00:00:00 2001
+From: Philippe Guibert <philippe.guibert@6wind.com>
+Date: Fri, 11 Apr 2025 21:41:54 +0200
+Subject: [PATCH 3/8] lib: add flavors display in json attributes
+
+Add flavors display in json nexthop attributes.
+
+> # ip -6 route add 2007::1 encap seg6local action End flavors psp dev dum1
+> # vtysh -c "show ipv6 route json"
+> [..]
+> ,"2007::1/128":[{"prefix":"2007::1/128","prefixLen":128,"protocol":"kernel","vrfId":0,
+> "vrfName":"default","selected":true,"destSelected":true,"distance":0,"metric":1024,
+> "installed":true,"table":254,"internalStatus":16,"internalFlags":8,"internalNextHopNum":1,
+> "internalNextHopActiveNum":1,"nexthopGroupId":28,"installedNexthopGroupId":28,"uptime":"00:04:20",
+> "nexthops":[{"flags":3,"fib":true,"directlyConnected":true,"interfaceIndex":19,"interfaceName":"dum1",
+> "active":true,"weight":1,"seg6local":{"action":"End","sidStructure":{"blockLen":0,"nodeLen":0,"funcLen":0,"argLen":0}},
+> "seg6localContext":{"flavors":["psp"]}}]}]
+> [..]
+
+Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
+---
+ lib/srv6.c | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/lib/srv6.c b/lib/srv6.c
+index e8a0d505df9a..4e973e3642be 100644
+--- a/lib/srv6.c
++++ b/lib/srv6.c
+@@ -71,6 +71,21 @@ int snprintf_seg6_segs(char *str,
+ 	return strlen(str);
+ }
+ 
++static void seg6local_flavors2json(json_object *json, const struct seg6local_flavors_info *flv_info)
++{
++	json_object *json_flavors;
++
++	json_flavors = json_object_new_array();
++	json_object_object_add(json, "flavors", json_flavors);
++
++	if (CHECK_SRV6_FLV_OP(flv_info->flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_PSP))
++		json_array_string_add(json_flavors, "psp");
++	if (CHECK_SRV6_FLV_OP(flv_info->flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_USP))
++		json_array_string_add(json_flavors, "usp");
++	if (CHECK_SRV6_FLV_OP(flv_info->flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_USD))
++		json_array_string_add(json_flavors, "usd");
++}
++
+ void srv6_sid_structure2json(const struct seg6local_context *ctx, json_object *json)
+ {
+ 	json_object_int_add(json, "blockLen", ctx->block_len);
+@@ -82,6 +97,7 @@ void srv6_sid_structure2json(const struct seg6local_context *ctx, json_object *j
+ void seg6local_context2json(const struct seg6local_context *ctx,
+ 			    uint32_t action, json_object *json)
+ {
++	seg6local_flavors2json(json, &ctx->flv);
+ 	switch (action) {
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END:
+ 		return;
+
+From 4f263d2208c2c378e618b2d0a7d88d15d66e1784 Mon Sep 17 00:00:00 2001
+From: Philippe Guibert <philippe.guibert@6wind.com>
+Date: Thu, 24 Apr 2025 15:55:45 +0200
+Subject: [PATCH 4/8] lib: add support for next-csid instruction display in
+ nexthops
+
+The next-csid term is only used by IETF; instead, the industry is using
+the uSID terminology defined in the linked document. Instead of
+displaying the next-csid instruction with the other flavors, replace the
+non microsid behavior with the associated microsid behavior. Example:
+- End becomes uN
+- End.X becomes uA
+- End.DT4 becomes uT4
+- ...
+
+> # ip -6 route add 2008::1 encap seg6local action End flavors next-csid,psp dev dum1
+> # show ipv6 route
+> [..]
+> K>* 2008::1/128 [0/1024] is directly connected, dum1, seg6local uN (PSP), weight 1, 00:00:05
+> [..]
+> # show ipv6 route json
+> [..]
+> ,"2008::1/128":[{"prefix":"2008::1/128","prefixLen":128,"protocol":"kernel","vrfId":0,
+> "vrfName":"default","selected":true,"destSelected":true,"distance":0,"metric":1024,"installed":true,
+> "table":254,"internalStatus":16,"internalFlags":8,"internalNextHopNum":1,"internalNextHopActiveNum":1,
+> "nexthopGroupId":30,"installedNexthopGroupId":30,"uptime":"00:01:12","nexthops":[{"flags":3,"fib":true,
+> "directlyConnected":true,"interfaceIndex":19,"interfaceName":"dum1","active":true,"weight":1,
+> "seg6local":{"action":"uN","sidStructure":{"blockLen":0,"nodeLen":0,"funcLen":0,"argLen":0}},
+> "seg6localContext":{"flavors":["psp"]}}]}]
+> [..]
+
+Link: https://datatracker.ietf.org/doc/html/draft-filsfils-spring-net-pgm-extension-srv6-usid
+
+Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
+---
+ lib/nexthop.c | 13 ++++++++-----
+ lib/srv6.c    | 31 ++++++++++++++++++-------------
+ lib/srv6.h    | 12 ++++++++++++
+ 3 files changed, 38 insertions(+), 18 deletions(-)
+
+diff --git a/lib/nexthop.c b/lib/nexthop.c
+index c377b9cb0067..cc8327f2aa8d 100644
+--- a/lib/nexthop.c
++++ b/lib/nexthop.c
+@@ -1316,9 +1316,10 @@ void nexthop_json_helper(json_object *json_nexthop,
+ 	if (nexthop->nh_srv6) {
+ 		json_seg6local = json_object_new_object();
+ 		json_object_string_add(json_seg6local, "action",
+-				       seg6local_action2str(
+-					       nexthop->nh_srv6
+-						       ->seg6local_action));
++				       seg6local_action2str_with_next_csid(
++					       nexthop->nh_srv6->seg6local_action,
++					       seg6local_has_next_csid(
++						       &nexthop->nh_srv6->seg6local_ctx)));
+ 		json_seg6local_context = json_object_new_object();
+ 		json_object_object_add(json_nexthop, "seg6local",
+ 				       json_seg6local);
+@@ -1471,8 +1472,10 @@ void nexthop_vty_helper(struct vty *vty, const struct nexthop *nexthop,
+ 		if (nexthop->nh_srv6->seg6local_action !=
+ 		    ZEBRA_SEG6_LOCAL_ACTION_UNSPEC)
+ 			vty_out(vty, ", seg6local %s %s",
+-				seg6local_action2str(
+-					nexthop->nh_srv6->seg6local_action),
++				seg6local_action2str_with_next_csid(nexthop->nh_srv6->seg6local_action,
++								    seg6local_has_next_csid(
++									    &nexthop->nh_srv6
++										     ->seg6local_ctx)),
+ 				buf);
+ 		if (nexthop->nh_srv6->seg6_segs &&
+ 		    IPV6_ADDR_CMP(&nexthop->nh_srv6->seg6_segs->seg[0],
+diff --git a/lib/srv6.c b/lib/srv6.c
+index 4e973e3642be..40e4e58ac4c7 100644
+--- a/lib/srv6.c
++++ b/lib/srv6.c
+@@ -16,31 +16,31 @@ DEFINE_MTYPE_STATIC(LIB, SRV6_LOCATOR_CHUNK, "SRV6 locator chunk");
+ DEFINE_MTYPE_STATIC(LIB, SRV6_SID_FORMAT, "SRv6 SID format");
+ DEFINE_MTYPE_STATIC(LIB, SRV6_SID_CTX, "SRv6 SID context");
+ 
+-const char *seg6local_action2str(uint32_t action)
++const char *seg6local_action2str_with_next_csid(uint32_t action, bool has_next_csid)
+ {
+ 	switch (action) {
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END:
+-		return "End";
++		return has_next_csid ? "uN" : "End";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_X:
+-		return "End.X";
++		return has_next_csid ? "uA" : "End.X";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_T:
+-		return "End.T";
++		return has_next_csid ? "uDT" : "End.T";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DX2:
+-		return "End.DX2";
++		return has_next_csid ? "uDX2" : "End.DX2";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DX6:
+-		return "End.DX6";
++		return has_next_csid ? "uDX6" : "End.DX6";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DX4:
+-		return "End.DX4";
++		return has_next_csid ? "uDX4" : "End.DX4";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DT6:
+-		return "End.DT6";
++		return has_next_csid ? "uDT6" : "End.DT6";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DT4:
+-		return "End.DT4";
++		return has_next_csid ? "uDT4" : "End.DT4";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_B6:
+-		return "End.B6";
++		return has_next_csid ? "uB6" : "End.B6";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_B6_ENCAP:
+-		return "End.B6.Encap";
++		return has_next_csid ? "uB6.Encap" : "End.B6.Encap";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_BM:
+-		return "End.BM";
++		return has_next_csid ? "uBM" : "End.BM";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_S:
+ 		return "End.S";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_AS:
+@@ -48,7 +48,7 @@ const char *seg6local_action2str(uint32_t action)
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_AM:
+ 		return "End.AM";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_END_DT46:
+-		return "End.DT46";
++		return has_next_csid ? "uDT46" : "End.DT46";
+ 	case ZEBRA_SEG6_LOCAL_ACTION_UNSPEC:
+ 		return "unspec";
+ 	default:
+@@ -56,6 +56,11 @@ const char *seg6local_action2str(uint32_t action)
+ 	}
+ }
+ 
++const char *seg6local_action2str(uint32_t action)
++{
++	return seg6local_action2str_with_next_csid(action, false);
++}
++
+ int snprintf_seg6_segs(char *str,
+ 		size_t size, const struct seg6_segs *segs)
+ {
+diff --git a/lib/srv6.h b/lib/srv6.h
+index 708792fb288d..fd972e72163d 100644
+--- a/lib/srv6.h
++++ b/lib/srv6.h
+@@ -203,6 +203,16 @@ enum srv6_endpoint_behavior_codepoint {
+ 	SRV6_ENDPOINT_BEHAVIOR_OPAQUE           = 0xFFFF,
+ };
+ 
++/*
++ * Return true if next-csid behavior is used, false otherwise
++ */
++static inline bool seg6local_has_next_csid(const struct seg6local_context *ctx)
++{
++	const struct seg6local_flavors_info *flv_info = &ctx->flv;
++
++	return CHECK_SRV6_FLV_OP(flv_info->flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_NEXT_CSID);
++}
++
+ /*
+  * Convert SRv6 endpoint behavior codepoints to human-friendly string.
+  */
+@@ -395,6 +405,8 @@ static inline void *sid_copy(struct in6_addr *dst,
+ 	return memcpy(dst, src, sizeof(struct in6_addr));
+ }
+ 
++const char *seg6local_action2str_with_next_csid(uint32_t action, bool has_next_csid);
++
+ const char *
+ seg6local_action2str(uint32_t action);
+ 
+
+From f3b54050e7f33a35171ddc596eeaff81e63bf1ab Mon Sep 17 00:00:00 2001
+From: Philippe Guibert <philippe.guibert@6wind.com>
+Date: Fri, 25 Apr 2025 15:36:49 +0200
+Subject: [PATCH 5/8] topotests: adapt isis_srv6_topo1 to uN notation
+
+The 'show ipv6 route' command now displays the seg6local action in uN
+notation when sids are micro SIDs. Propagate the changes in the test
+for End and End.X operations.
+
+Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
+---
+ .../isis_srv6_topo1/rt1/step1/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt1/step3/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt1/step5/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt1/step7/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt1/step9/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt2/step1/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt2/step2/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt2/step3/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt2/step4/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt2/step5/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt2/step6/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt2/step7/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt2/step8/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt2/step9/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt3/step1/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt3/step2/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt3/step3/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt3/step4/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt3/step5/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt3/step6/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt3/step7/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt3/step8/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt3/step9/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt4/step1/show_ipv6_route.ref    | 12 ++++++------
+ .../isis_srv6_topo1/rt4/step2/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt4/step3/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt4/step4/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt4/step5/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt4/step6/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt4/step7/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt4/step8/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt4/step9/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt5/step1/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt5/step2/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt5/step3/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt5/step4/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt5/step5/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt5/step6/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt5/step7/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt5/step8/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt5/step9/show_ipv6_route.ref    | 10 +++++-----
+ .../isis_srv6_topo1/rt6/step1/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt6/step2/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt6/step3/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt6/step4/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt6/step5/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt6/step6/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt6/step7/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt6/step8/show_ipv6_route.ref    |  6 +++---
+ .../isis_srv6_topo1/rt6/step9/show_ipv6_route.ref    |  6 +++---
+ 50 files changed, 223 insertions(+), 223 deletions(-)
+
+diff --git a/tests/topotests/isis_srv6_topo1/rt1/step1/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt1/step1/show_ipv6_route.ref
+index 2d30fc4d17e2..a1da9d8ae40d 100644
+--- a/tests/topotests/isis_srv6_topo1/rt1/step1/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt1/step1/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -239,7 +239,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -261,7 +261,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt1/step3/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt1/step3/show_ipv6_route.ref
+index 2d30fc4d17e2..a1da9d8ae40d 100644
+--- a/tests/topotests/isis_srv6_topo1/rt1/step3/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt1/step3/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -239,7 +239,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -261,7 +261,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt1/step5/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt1/step5/show_ipv6_route.ref
+index 2d30fc4d17e2..a1da9d8ae40d 100644
+--- a/tests/topotests/isis_srv6_topo1/rt1/step5/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt1/step5/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -239,7 +239,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -261,7 +261,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt1/step7/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt1/step7/show_ipv6_route.ref
+index 2d30fc4d17e2..a1da9d8ae40d 100644
+--- a/tests/topotests/isis_srv6_topo1/rt1/step7/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt1/step7/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -239,7 +239,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -261,7 +261,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt1/step9/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt1/step9/show_ipv6_route.ref
+index 2d30fc4d17e2..a1da9d8ae40d 100644
+--- a/tests/topotests/isis_srv6_topo1/rt1/step9/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt1/step9/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -239,7 +239,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -261,7 +261,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt2/step1/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt2/step1/show_ipv6_route.ref
+index 150fa92241df..5780b73ab2b1 100644
+--- a/tests/topotests/isis_srv6_topo1/rt2/step1/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt2/step1/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt2/step2/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt2/step2/show_ipv6_route.ref
+index f9c2d098cc60..b6188ea6bee5 100644
+--- a/tests/topotests/isis_srv6_topo1/rt2/step2/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt2/step2/show_ipv6_route.ref
+@@ -234,7 +234,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -255,7 +255,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -276,7 +276,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -297,7 +297,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -318,7 +318,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt2/step3/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt2/step3/show_ipv6_route.ref
+index 150fa92241df..5780b73ab2b1 100644
+--- a/tests/topotests/isis_srv6_topo1/rt2/step3/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt2/step3/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt2/step4/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt2/step4/show_ipv6_route.ref
+index f9c2d098cc60..b6188ea6bee5 100644
+--- a/tests/topotests/isis_srv6_topo1/rt2/step4/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt2/step4/show_ipv6_route.ref
+@@ -234,7 +234,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -255,7 +255,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -276,7 +276,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -297,7 +297,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -318,7 +318,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt2/step5/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt2/step5/show_ipv6_route.ref
+index 150fa92241df..5780b73ab2b1 100644
+--- a/tests/topotests/isis_srv6_topo1/rt2/step5/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt2/step5/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt2/step6/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt2/step6/show_ipv6_route.ref
+index f9c2d098cc60..b6188ea6bee5 100644
+--- a/tests/topotests/isis_srv6_topo1/rt2/step6/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt2/step6/show_ipv6_route.ref
+@@ -234,7 +234,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -255,7 +255,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -276,7 +276,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -297,7 +297,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -318,7 +318,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt2/step7/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt2/step7/show_ipv6_route.ref
+index 150fa92241df..5780b73ab2b1 100644
+--- a/tests/topotests/isis_srv6_topo1/rt2/step7/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt2/step7/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt2/step8/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt2/step8/show_ipv6_route.ref
+index f9c2d098cc60..b6188ea6bee5 100644
+--- a/tests/topotests/isis_srv6_topo1/rt2/step8/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt2/step8/show_ipv6_route.ref
+@@ -234,7 +234,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -255,7 +255,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -276,7 +276,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -297,7 +297,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -318,7 +318,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt2/step9/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt2/step9/show_ipv6_route.ref
+index 150fa92241df..5780b73ab2b1 100644
+--- a/tests/topotests/isis_srv6_topo1/rt2/step9/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt2/step9/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt3/step1/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt3/step1/show_ipv6_route.ref
+index fc0e5161c221..04912da1be0f 100644
+--- a/tests/topotests/isis_srv6_topo1/rt3/step1/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt3/step1/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt3/step2/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt3/step2/show_ipv6_route.ref
+index a24d95e78ed7..142aeed0d21a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt3/step2/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt3/step2/show_ipv6_route.ref
+@@ -234,7 +234,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -255,7 +255,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -276,7 +276,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -297,7 +297,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -318,7 +318,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt3/step3/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt3/step3/show_ipv6_route.ref
+index fc0e5161c221..04912da1be0f 100644
+--- a/tests/topotests/isis_srv6_topo1/rt3/step3/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt3/step3/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt3/step4/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt3/step4/show_ipv6_route.ref
+index a24d95e78ed7..142aeed0d21a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt3/step4/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt3/step4/show_ipv6_route.ref
+@@ -234,7 +234,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -255,7 +255,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -276,7 +276,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -297,7 +297,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -318,7 +318,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt3/step5/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt3/step5/show_ipv6_route.ref
+index fc0e5161c221..04912da1be0f 100644
+--- a/tests/topotests/isis_srv6_topo1/rt3/step5/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt3/step5/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt3/step6/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt3/step6/show_ipv6_route.ref
+index a24d95e78ed7..142aeed0d21a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt3/step6/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt3/step6/show_ipv6_route.ref
+@@ -234,7 +234,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -255,7 +255,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -276,7 +276,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -297,7 +297,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -318,7 +318,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt3/step7/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt3/step7/show_ipv6_route.ref
+index fc0e5161c221..04912da1be0f 100644
+--- a/tests/topotests/isis_srv6_topo1/rt3/step7/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt3/step7/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt3/step8/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt3/step8/show_ipv6_route.ref
+index a24d95e78ed7..142aeed0d21a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt3/step8/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt3/step8/show_ipv6_route.ref
+@@ -234,7 +234,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -255,7 +255,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -276,7 +276,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -297,7 +297,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -318,7 +318,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt3/step9/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt3/step9/show_ipv6_route.ref
+index fc0e5161c221..04912da1be0f 100644
+--- a/tests/topotests/isis_srv6_topo1/rt3/step9/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt3/step9/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt4/step1/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt4/step1/show_ipv6_route.ref
+index 2878c24cc85d..a717b1fece1f 100644
+--- a/tests/topotests/isis_srv6_topo1/rt4/step1/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt4/step1/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,10 +337,10 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+     }
+   ]
+-}
+\ No newline at end of file
++}
+diff --git a/tests/topotests/isis_srv6_topo1/rt4/step2/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt4/step2/show_ipv6_route.ref
+index bea54ba6b282..1199d3db249a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt4/step2/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt4/step2/show_ipv6_route.ref
+@@ -228,7 +228,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -249,7 +249,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -270,7 +270,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -291,7 +291,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -312,7 +312,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt4/step3/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt4/step3/show_ipv6_route.ref
+index 2878c24cc85d..da2fffb0b253 100644
+--- a/tests/topotests/isis_srv6_topo1/rt4/step3/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt4/step3/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt4/step4/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt4/step4/show_ipv6_route.ref
+index bea54ba6b282..1199d3db249a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt4/step4/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt4/step4/show_ipv6_route.ref
+@@ -228,7 +228,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -249,7 +249,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -270,7 +270,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -291,7 +291,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -312,7 +312,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt4/step5/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt4/step5/show_ipv6_route.ref
+index 2878c24cc85d..da2fffb0b253 100644
+--- a/tests/topotests/isis_srv6_topo1/rt4/step5/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt4/step5/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt4/step6/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt4/step6/show_ipv6_route.ref
+index bea54ba6b282..1199d3db249a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt4/step6/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt4/step6/show_ipv6_route.ref
+@@ -228,7 +228,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -249,7 +249,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -270,7 +270,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -291,7 +291,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -312,7 +312,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt4/step7/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt4/step7/show_ipv6_route.ref
+index 2878c24cc85d..da2fffb0b253 100644
+--- a/tests/topotests/isis_srv6_topo1/rt4/step7/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt4/step7/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt4/step8/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt4/step8/show_ipv6_route.ref
+index bea54ba6b282..1199d3db249a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt4/step8/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt4/step8/show_ipv6_route.ref
+@@ -228,7 +228,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -249,7 +249,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -270,7 +270,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -291,7 +291,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -312,7 +312,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt4/step9/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt4/step9/show_ipv6_route.ref
+index 2878c24cc85d..da2fffb0b253 100644
+--- a/tests/topotests/isis_srv6_topo1/rt4/step9/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt4/step9/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt5/step1/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt5/step1/show_ipv6_route.ref
+index d6ad4c2aad24..ddfb175da8a1 100644
+--- a/tests/topotests/isis_srv6_topo1/rt5/step1/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt5/step1/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt5/step2/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt5/step2/show_ipv6_route.ref
+index c24527017709..7788d73c433a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt5/step2/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt5/step2/show_ipv6_route.ref
+@@ -228,7 +228,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -249,7 +249,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -270,7 +270,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -291,7 +291,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -312,7 +312,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt5/step3/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt5/step3/show_ipv6_route.ref
+index d6ad4c2aad24..ddfb175da8a1 100644
+--- a/tests/topotests/isis_srv6_topo1/rt5/step3/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt5/step3/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt5/step4/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt5/step4/show_ipv6_route.ref
+index c24527017709..7788d73c433a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt5/step4/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt5/step4/show_ipv6_route.ref
+@@ -228,7 +228,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -249,7 +249,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -270,7 +270,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -291,7 +291,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -312,7 +312,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt5/step5/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt5/step5/show_ipv6_route.ref
+index d6ad4c2aad24..ddfb175da8a1 100644
+--- a/tests/topotests/isis_srv6_topo1/rt5/step5/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt5/step5/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt5/step6/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt5/step6/show_ipv6_route.ref
+index c24527017709..7788d73c433a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt5/step6/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt5/step6/show_ipv6_route.ref
+@@ -228,7 +228,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -249,7 +249,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -270,7 +270,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -291,7 +291,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -312,7 +312,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt5/step7/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt5/step7/show_ipv6_route.ref
+index d6ad4c2aad24..ddfb175da8a1 100644
+--- a/tests/topotests/isis_srv6_topo1/rt5/step7/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt5/step7/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt5/step8/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt5/step8/show_ipv6_route.ref
+index c24527017709..7788d73c433a 100644
+--- a/tests/topotests/isis_srv6_topo1/rt5/step8/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt5/step8/show_ipv6_route.ref
+@@ -228,7 +228,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -249,7 +249,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -270,7 +270,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -291,7 +291,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -312,7 +312,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt5/step9/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt5/step9/show_ipv6_route.ref
+index d6ad4c2aad24..ddfb175da8a1 100644
+--- a/tests/topotests/isis_srv6_topo1/rt5/step9/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt5/step9/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt6/step1/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt6/step1/show_ipv6_route.ref
+index 407e2d0f4cfe..41add1c0388b 100644
+--- a/tests/topotests/isis_srv6_topo1/rt6/step1/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt6/step1/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -238,7 +238,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -259,7 +259,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt6/step2/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt6/step2/show_ipv6_route.ref
+index 6c64bd7d1eec..dce69c0773ae 100644
+--- a/tests/topotests/isis_srv6_topo1/rt6/step2/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt6/step2/show_ipv6_route.ref
+@@ -192,7 +192,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -213,7 +213,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -234,7 +234,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt6/step3/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt6/step3/show_ipv6_route.ref
+index 407e2d0f4cfe..41add1c0388b 100644
+--- a/tests/topotests/isis_srv6_topo1/rt6/step3/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt6/step3/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -238,7 +238,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -259,7 +259,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt6/step4/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt6/step4/show_ipv6_route.ref
+index 6c64bd7d1eec..dce69c0773ae 100644
+--- a/tests/topotests/isis_srv6_topo1/rt6/step4/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt6/step4/show_ipv6_route.ref
+@@ -192,7 +192,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -213,7 +213,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -234,7 +234,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt6/step5/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt6/step5/show_ipv6_route.ref
+index 407e2d0f4cfe..41add1c0388b 100644
+--- a/tests/topotests/isis_srv6_topo1/rt6/step5/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt6/step5/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -238,7 +238,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -259,7 +259,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt6/step6/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt6/step6/show_ipv6_route.ref
+index 6c64bd7d1eec..dce69c0773ae 100644
+--- a/tests/topotests/isis_srv6_topo1/rt6/step6/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt6/step6/show_ipv6_route.ref
+@@ -192,7 +192,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -213,7 +213,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -234,7 +234,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt6/step7/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt6/step7/show_ipv6_route.ref
+index 407e2d0f4cfe..41add1c0388b 100644
+--- a/tests/topotests/isis_srv6_topo1/rt6/step7/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt6/step7/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -238,7 +238,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -259,7 +259,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt6/step8/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt6/step8/show_ipv6_route.ref
+index 6c64bd7d1eec..dce69c0773ae 100644
+--- a/tests/topotests/isis_srv6_topo1/rt6/step8/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt6/step8/show_ipv6_route.ref
+@@ -192,7 +192,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -213,7 +213,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -234,7 +234,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/isis_srv6_topo1/rt6/step9/show_ipv6_route.ref b/tests/topotests/isis_srv6_topo1/rt6/step9/show_ipv6_route.ref
+index 407e2d0f4cfe..41add1c0388b 100644
+--- a/tests/topotests/isis_srv6_topo1/rt6/step9/show_ipv6_route.ref
++++ b/tests/topotests/isis_srv6_topo1/rt6/step9/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -238,7 +238,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -259,7 +259,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+
+From abf2e50245d70adbc775f9a1df0990d6f7284ae5 Mon Sep 17 00:00:00 2001
+From: Philippe Guibert <philippe.guibert@6wind.com>
+Date: Fri, 25 Apr 2025 15:42:26 +0200
+Subject: [PATCH 6/8] topotests: adapt srv6_sid_manager to uN notation
+
+The 'show ipv6 route' command now displays the seg6local action in uN
+notation when sids are micro SIDs. Propagate the changes in the test
+for End, End.X, and End.DT4 operations.
+
+Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
+---
+ .../topotests/srv6_sid_manager/rt1/show_ipv6_route.ref | 10 +++++-----
+ .../topotests/srv6_sid_manager/rt2/show_ipv6_route.ref | 10 +++++-----
+ .../topotests/srv6_sid_manager/rt3/show_ipv6_route.ref | 10 +++++-----
+ .../topotests/srv6_sid_manager/rt4/show_ipv6_route.ref | 10 +++++-----
+ .../topotests/srv6_sid_manager/rt5/show_ipv6_route.ref | 10 +++++-----
+ .../topotests/srv6_sid_manager/rt6/show_ipv6_route.ref | 10 +++++-----
+ 6 files changed, 30 insertions(+), 30 deletions(-)
+
+diff --git a/tests/topotests/srv6_sid_manager/rt1/show_ipv6_route.ref b/tests/topotests/srv6_sid_manager/rt1/show_ipv6_route.ref
+index cdbec3f2c11f..0e9248705a25 100644
+--- a/tests/topotests/srv6_sid_manager/rt1/show_ipv6_route.ref
++++ b/tests/topotests/srv6_sid_manager/rt1/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -239,7 +239,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -261,7 +261,7 @@
+           "interfaceName":"eth-sw1",
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -283,7 +283,7 @@
+           "interfaceName":"vrf10",
+           "active":true,
+           "seg6local":{
+-            "action":"End.DT6"
++            "action":"uDT6"
+           }
+         }
+       ]
+@@ -305,7 +305,7 @@
+           "interfaceName":"vrf20",
+           "active":true,
+           "seg6local":{
+-            "action":"End.DT6"
++            "action":"uDT6"
+           }
+         }
+       ]
+diff --git a/tests/topotests/srv6_sid_manager/rt2/show_ipv6_route.ref b/tests/topotests/srv6_sid_manager/rt2/show_ipv6_route.ref
+index fc0f1d3bccd2..29d8c014e707 100644
+--- a/tests/topotests/srv6_sid_manager/rt2/show_ipv6_route.ref
++++ b/tests/topotests/srv6_sid_manager/rt2/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/srv6_sid_manager/rt3/show_ipv6_route.ref b/tests/topotests/srv6_sid_manager/rt3/show_ipv6_route.ref
+index c590fcfdbc4a..81ee9c180c02 100644
+--- a/tests/topotests/srv6_sid_manager/rt3/show_ipv6_route.ref
++++ b/tests/topotests/srv6_sid_manager/rt3/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/srv6_sid_manager/rt4/show_ipv6_route.ref b/tests/topotests/srv6_sid_manager/rt4/show_ipv6_route.ref
+index 7b575f1888fb..e37deb545aa6 100644
+--- a/tests/topotests/srv6_sid_manager/rt4/show_ipv6_route.ref
++++ b/tests/topotests/srv6_sid_manager/rt4/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/srv6_sid_manager/rt5/show_ipv6_route.ref b/tests/topotests/srv6_sid_manager/rt5/show_ipv6_route.ref
+index a7b3262f8631..4730652131e9 100644
+--- a/tests/topotests/srv6_sid_manager/rt5/show_ipv6_route.ref
++++ b/tests/topotests/srv6_sid_manager/rt5/show_ipv6_route.ref
+@@ -253,7 +253,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -274,7 +274,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -295,7 +295,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -316,7 +316,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -337,7 +337,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+diff --git a/tests/topotests/srv6_sid_manager/rt6/show_ipv6_route.ref b/tests/topotests/srv6_sid_manager/rt6/show_ipv6_route.ref
+index d06354b8729a..3a8321ea07e6 100644
+--- a/tests/topotests/srv6_sid_manager/rt6/show_ipv6_route.ref
++++ b/tests/topotests/srv6_sid_manager/rt6/show_ipv6_route.ref
+@@ -217,7 +217,7 @@
+           "interfaceName":"sr0",
+           "active":true,
+           "seg6local":{
+-            "action":"End"
++            "action":"uN"
+           }
+         }
+       ]
+@@ -238,7 +238,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -259,7 +259,7 @@
+           "directlyConnected":true,
+           "active":true,
+           "seg6local":{
+-            "action":"End.X"
++            "action":"uA"
+           }
+         }
+       ]
+@@ -281,7 +281,7 @@
+           "interfaceName":"vrf10",
+           "active":true,
+           "seg6local":{
+-            "action":"End.DT6"
++            "action":"uDT6"
+           }
+         }
+       ]
+@@ -303,7 +303,7 @@
+           "interfaceName":"vrf20",
+           "active":true,
+           "seg6local":{
+-            "action":"End.DT6"
++            "action":"uDT6"
+           }
+         }
+       ]
+
+From 7413c3df20af1b86bae27de5fb589406943c17df Mon Sep 17 00:00:00 2001
+From: Philippe Guibert <philippe.guibert@6wind.com>
+Date: Fri, 25 Apr 2025 16:08:07 +0200
+Subject: [PATCH 7/8] staticd: fix missing next-csid flavor for uDTx operations
+
+The uDT4/uDT6/uDT46 behaviors have not set the next-csid flavor when
+passing the seg6local route instruction to zebra.
+
+Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
+---
+ staticd/static_zebra.c | 48 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 48 insertions(+)
+
+diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
+index cc09b428365f..a889907f8b8a 100644
+--- a/staticd/static_zebra.c
++++ b/staticd/static_zebra.c
+@@ -660,7 +660,23 @@ void static_zebra_srv6_sid_install(struct static_srv6_sid *sid)
+ 		ctx.flv.lcnode_func_len = sid->locator->node_bits_length;
+ 		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT6:
++		action = ZEBRA_SEG6_LOCAL_ACTION_END_DT6;
++		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
++		if (!vrf_is_enabled(vrf)) {
++			zlog_warn("Failed to install SID %pFX: VRF %s is inactive", &sid->addr,
++				  sid->attributes.vrf_name);
++			return;
++		}
++		ctx.table = vrf->data.l.table_id;
++		ifp = if_get_vrf_loopback(vrf->vrf_id);
++		if (!ifp) {
++			zlog_warn("Failed to install SID %pFX: failed to get loopback for vrf %s",
++				  &sid->addr, sid->attributes.vrf_name);
++			return;
++		}
++		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT6_USID:
++		SET_SRV6_FLV_OP(ctx.flv.flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_NEXT_CSID);
+ 		action = ZEBRA_SEG6_LOCAL_ACTION_END_DT6;
+ 		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
+ 		if (!vrf_is_enabled(vrf)) {
+@@ -677,7 +693,23 @@ void static_zebra_srv6_sid_install(struct static_srv6_sid *sid)
+ 		}
+ 		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT4:
++		action = ZEBRA_SEG6_LOCAL_ACTION_END_DT4;
++		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
++		if (!vrf_is_enabled(vrf)) {
++			zlog_warn("Failed to install SID %pFX: VRF %s is inactive", &sid->addr,
++				  sid->attributes.vrf_name);
++			return;
++		}
++		ctx.table = vrf->data.l.table_id;
++		ifp = if_get_vrf_loopback(vrf->vrf_id);
++		if (!ifp) {
++			zlog_warn("Failed to install SID %pFX: failed to get loopback for vrf %s",
++				  &sid->addr, sid->attributes.vrf_name);
++			return;
++		}
++		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT4_USID:
++		SET_SRV6_FLV_OP(ctx.flv.flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_NEXT_CSID);
+ 		action = ZEBRA_SEG6_LOCAL_ACTION_END_DT4;
+ 		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
+ 		if (!vrf_is_enabled(vrf)) {
+@@ -694,7 +726,23 @@ void static_zebra_srv6_sid_install(struct static_srv6_sid *sid)
+ 		}
+ 		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT46:
++		action = ZEBRA_SEG6_LOCAL_ACTION_END_DT46;
++		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
++		if (!vrf_is_enabled(vrf)) {
++			zlog_warn("Failed to install SID %pFX: VRF %s is inactive", &sid->addr,
++				  sid->attributes.vrf_name);
++			return;
++		}
++		ctx.table = vrf->data.l.table_id;
++		ifp = if_get_vrf_loopback(vrf->vrf_id);
++		if (!ifp) {
++			zlog_warn("Failed to install SID %pFX: failed to get loopback for vrf %s",
++				  &sid->addr, sid->attributes.vrf_name);
++			return;
++		}
++		break;
+ 	case SRV6_ENDPOINT_BEHAVIOR_END_DT46_USID:
++		SET_SRV6_FLV_OP(ctx.flv.flv_ops, ZEBRA_SEG6_LOCAL_FLV_OP_NEXT_CSID);
+ 		action = ZEBRA_SEG6_LOCAL_ACTION_END_DT46;
+ 		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
+ 		if (!vrf_is_enabled(vrf)) {
+
+From 9d4ad7fcdc392a492708af8913b8fb228111cf5a Mon Sep 17 00:00:00 2001
+From: Philippe Guibert <philippe.guibert@6wind.com>
+Date: Fri, 25 Apr 2025 16:11:41 +0200
+Subject: [PATCH 8/8] topotests: adapt static_srv6_sids to uN notation
+
+The 'show ipv6 route' command now displays the seg6local action in uN
+notation when sids are micro SIDs. Propagate the changes in the test
+for End, End.X, and End.DT[4/6/46] operations.
+
+Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
+---
+ .../topotests/static_srv6_sids/expected_srv6_sids.json | 10 +++++-----
+ .../expected_srv6_sids_sid_delete_1.json               |  8 ++++----
+ .../expected_srv6_sids_sid_delete_2.json               |  6 +++---
+ .../expected_srv6_sids_sid_modify.json                 | 10 +++++-----
+ 4 files changed, 17 insertions(+), 17 deletions(-)
+
+diff --git a/tests/topotests/static_srv6_sids/expected_srv6_sids.json b/tests/topotests/static_srv6_sids/expected_srv6_sids.json
+index 1796c870a689..1cdf3cd1d69a 100644
+--- a/tests/topotests/static_srv6_sids/expected_srv6_sids.json
++++ b/tests/topotests/static_srv6_sids/expected_srv6_sids.json
+@@ -25,7 +25,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End",
++						"action": "uN",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -66,7 +66,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.DT4",
++						"action": "uDT4",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -107,7 +107,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.DT6",
++						"action": "uDT6",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -148,7 +148,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.DT46",
++						"action": "uDT46",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -189,7 +189,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.X"
++						"action": "uA"
+ 					},
+ 					"seg6localContext": {
+ 						"nh6": "2001::2"
+diff --git a/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_1.json b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_1.json
+index bd1f4bf87a74..573d8284da6e 100644
+--- a/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_1.json
++++ b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_1.json
+@@ -25,7 +25,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.DT4",
++						"action": "uDT4",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -66,7 +66,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.DT6",
++						"action": "uDT6",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -107,7 +107,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.DT46",
++						"action": "uDT46",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -148,7 +148,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.X"
++						"action": "uA"
+ 					},
+ 					"seg6localContext": {
+ 						"nh6": "2001::2"
+diff --git a/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_2.json b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_2.json
+index 2bd40cdb5c2c..02748ccd35e0 100644
+--- a/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_2.json
++++ b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_delete_2.json
+@@ -25,7 +25,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.DT4",
++						"action": "uDT4",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -66,7 +66,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.DT46",
++						"action": "uDT46",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -107,7 +107,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.X"
++						"action": "uA"
+ 					},
+ 					"seg6localContext": {
+ 						"nh6": "2001::2"
+diff --git a/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_modify.json b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_modify.json
+index 070b7ade20a2..ec5efb5297f6 100644
+--- a/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_modify.json
++++ b/tests/topotests/static_srv6_sids/expected_srv6_sids_sid_modify.json
+@@ -25,7 +25,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End",
++						"action": "uN",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -66,7 +66,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.DT4",
++						"action": "uDT4",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -107,7 +107,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.DT46",
++						"action": "uDT46",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -148,7 +148,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.DT46",
++						"action": "uDT46",
+ 						"sidStructure": {
+ 							"blockLen": 32,
+ 							"nodeLen": 16,
+@@ -189,7 +189,7 @@
+ 					"active": true,
+ 					"weight": 1,
+ 					"seg6local": {
+-						"action": "End.X"
++						"action": "uA"
+ 					},
+ 					"seg6localContext": {
+ 						"nh6": "2001::2"
diff --git a/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch b/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch
deleted file mode 100644
index 126d3d05d66..00000000000
--- a/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch
+++ /dev/null
@@ -1,227 +0,0 @@
-From 679ad9ee5f3c15570d697506183d37aa29f6ebf2 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 25 Jan 2024 13:07:37 -0500
-Subject: [PATCH 05/11] bgpd: backpressure - cleanup bgp_zebra_XX func args
-
-Since installing/withdrawing routes into zebra is going to be changed
-around to be dest based in a list,
- - Retrieve the afi/safi to use based upon the dest's afi/safi
-   instead of passing it in.
- - Prefix is known by the dest. Remove this arg as well
-
-Ticket: #3390099
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index a0113c04e..99fb021b1 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -3419,8 +3419,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 					|| new_select->sub_type
- 						   == BGP_ROUTE_IMPORTED))
- 
--					bgp_zebra_announce(dest, p, old_select,
--							   bgp, afi, safi);
-+					bgp_zebra_announce(dest, old_select,
-+							   bgp);
- 			}
- 		}
- 
-@@ -3529,10 +3529,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 			 */
- 			if (old_select &&
- 			    is_route_parent_evpn(old_select))
--				bgp_zebra_withdraw(p, old_select, bgp, afi,
--						   safi);
-+				bgp_zebra_withdraw(dest, old_select, bgp);
- 
--			bgp_zebra_announce(dest, p, new_select, bgp, afi, safi);
-+			bgp_zebra_announce(dest, new_select, bgp);
- 		} else {
- 			/* Withdraw the route from the kernel. */
- 			if (old_select && old_select->type == ZEBRA_ROUTE_BGP
-@@ -3540,8 +3539,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 				|| old_select->sub_type == BGP_ROUTE_AGGREGATE
- 				|| old_select->sub_type == BGP_ROUTE_IMPORTED))
- 
--				bgp_zebra_withdraw(p, old_select, bgp, afi,
--						   safi);
-+				bgp_zebra_withdraw(dest, old_select, bgp);
- 		}
- 	}
- 
-@@ -4446,7 +4444,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
- 	if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) {
- 		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
- 			/* remove from RIB previous entry */
--			bgp_zebra_withdraw(p, pi, bgp, afi, safi);
-+			bgp_zebra_withdraw(dest, pi, bgp);
- 	}
- 
- 	if (peer->sort == BGP_PEER_EBGP) {
-@@ -6072,8 +6070,7 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
- 				|| pi->sub_type == BGP_ROUTE_IMPORTED)) {
- 
- 				if (bgp_fibupd_safi(safi))
--					bgp_zebra_withdraw(p, pi, bgp, afi,
--							   safi);
-+					bgp_zebra_withdraw(dest, pi, bgp);
- 			}
- 
- 			dest = bgp_path_info_reap(dest, pi);
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index fe29662e2..9b4b46b40 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -1507,9 +1507,8 @@ static void bgp_debug_zebra_nh(struct zapi_route *api)
- 	}
- }
- 
--void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
--			struct bgp_path_info *info, struct bgp *bgp, afi_t afi,
--			safi_t safi)
-+void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
-+			struct bgp *bgp)
- {
- 	struct bgp_path_info *bpi_ultimate;
- 	struct zapi_route api = { 0 };
-@@ -1522,6 +1521,8 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
- 	bool is_add;
- 	uint32_t nhg_id = 0;
- 	uint32_t recursion_flag = 0;
-+	struct bgp_table *table = bgp_dest_table(dest);
-+	const struct prefix *p = bgp_dest_get_prefix(dest);
- 
- 	/*
- 	 * BGP is installing this route and bgp has been configured
-@@ -1540,16 +1541,16 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
- 	if (bgp->main_zebra_update_hold)
- 		return;
- 
--	if (safi == SAFI_FLOWSPEC) {
--		bgp_pbr_update_entry(bgp, bgp_dest_get_prefix(dest), info, afi,
--				     safi, true);
-+	if (table->safi == SAFI_FLOWSPEC) {
-+		bgp_pbr_update_entry(bgp, p, info, table->afi, table->safi,
-+							true);
- 		return;
- 	}
- 
- 	/* Make Zebra API structure. */
- 	api.vrf_id = bgp->vrf_id;
- 	api.type = ZEBRA_ROUTE_BGP;
--	api.safi = safi;
-+	api.safi = table->safi;
- 	api.prefix = *p;
- 	SET_FLAG(api.message, ZAPI_MESSAGE_NEXTHOP);
- 
-@@ -1586,7 +1587,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
- 	metric = info->attr->med;
- 
- 	bgp_zebra_announce_parse_nexthop(info, p, bgp, &api, &valid_nh_count,
--					 afi, safi, &nhg_id, &metric, &tag,
-+					 table->afi, table->safi, &nhg_id, &metric, &tag,
- 					 &allow_recursion);
- 
- 	is_add = (valid_nh_count || nhg_id) ? true : false;
-@@ -1640,7 +1641,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
- 		api.tag = tag;
- 	}
- 
--	distance = bgp_distance_apply(p, info, afi, safi, bgp);
-+	distance = bgp_distance_apply(p, info, table->afi, table->safi, bgp);
- 	if (distance) {
- 		SET_FLAG(api.message, ZAPI_MESSAGE_DISTANCE);
- 		api.distance = distance;
-@@ -1689,9 +1690,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
- 			     && (pi->sub_type == BGP_ROUTE_NORMAL
- 				 || pi->sub_type == BGP_ROUTE_IMPORTED)))
- 
--				bgp_zebra_announce(dest,
--						   bgp_dest_get_prefix(dest),
--						   pi, bgp, afi, safi);
-+				bgp_zebra_announce(dest, pi, bgp);
- }
- 
- /* Announce routes of any bgp subtype of a table to zebra */
-@@ -1713,17 +1712,16 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
- 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next)
- 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) &&
- 			    pi->type == ZEBRA_ROUTE_BGP)
--				bgp_zebra_announce(dest,
--						   bgp_dest_get_prefix(dest),
--						   pi, bgp, afi, safi);
-+				bgp_zebra_announce(dest, pi, bgp);
- }
- 
--void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info,
--			struct bgp *bgp, afi_t afi, safi_t safi)
-+void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info,
-+			struct bgp *bgp)
- {
- 	struct zapi_route api;
- 	struct peer *peer;
--
-+	struct bgp_table *table = bgp_dest_table(dest);
-+	const struct prefix *p = bgp_dest_get_prefix(dest);
- 	/*
- 	 * If we are withdrawing the route, we don't need to have this
- 	 * flag set.  So unset it.
-@@ -1736,16 +1734,16 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info,
- 	if (!bgp_install_info_to_zebra(bgp))
- 		return;
- 
--	if (safi == SAFI_FLOWSPEC) {
-+	if (table->safi == SAFI_FLOWSPEC) {
- 		peer = info->peer;
--		bgp_pbr_update_entry(peer->bgp, p, info, afi, safi, false);
-+		bgp_pbr_update_entry(peer->bgp, p, info, table->afi, table->safi, false);
- 		return;
- 	}
- 
- 	memset(&api, 0, sizeof(api));
- 	api.vrf_id = bgp->vrf_id;
- 	api.type = ZEBRA_ROUTE_BGP;
--	api.safi = safi;
-+	api.safi = table->safi;
- 	api.prefix = *p;
- 
- 	if (info->attr->rmap_table_id) {
-@@ -1778,8 +1776,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
- 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
- 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)
- 			    && (pi->type == ZEBRA_ROUTE_BGP))
--				bgp_zebra_withdraw(bgp_dest_get_prefix(dest),
--						   pi, bgp, afi, safi);
-+				bgp_zebra_withdraw(dest, pi, bgp);
- 		}
- 	}
- }
-diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
-index 396c8335f..0facef5cc 100644
---- a/bgpd/bgp_zebra.h
-+++ b/bgpd/bgp_zebra.h
-@@ -28,13 +28,12 @@ extern void bgp_zebra_destroy(void);
- extern int bgp_zebra_get_table_range(struct zclient *zc, uint32_t chunk_size,
- 				     uint32_t *start, uint32_t *end);
- extern int bgp_if_update_all(void);
--extern void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
--			       struct bgp_path_info *path, struct bgp *bgp,
--			       afi_t afi, safi_t safi);
-+extern void bgp_zebra_announce(struct bgp_dest *dest,
-+			       struct bgp_path_info *path, struct bgp *bgp);
-+
- extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi);
--extern void bgp_zebra_withdraw(const struct prefix *p,
--			       struct bgp_path_info *path, struct bgp *bgp,
--			       afi_t afi, safi_t safi);
-+extern void bgp_zebra_withdraw(struct bgp_dest *dest,
-+			       struct bgp_path_info *path, struct bgp *bgp);
- 
- /* Announce routes of any bgp subtype of a table to zebra */
- extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
--- 
-2.39.4
-
diff --git a/src/sonic-frr/patch/0033-staticd-Install-known-nexthops-upon-connection-with-zebra.patch b/src/sonic-frr/patch/0033-staticd-Install-known-nexthops-upon-connection-with-zebra.patch
new file mode 100644
index 00000000000..0e6a859ccc3
--- /dev/null
+++ b/src/sonic-frr/patch/0033-staticd-Install-known-nexthops-upon-connection-with-zebra.patch
@@ -0,0 +1,101 @@
+From 918a1f85c2edac05aaa9ec4e10b1013f435c6311 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Wed, 12 Mar 2025 08:30:43 -0400
+Subject: [PATCH] staticd: Install known nexthops upon connection with zebra
+
+CI tests are showing cases where staticd is connecting to
+zebra after config is read in and the nexthops are never
+being registered w/ zebra:
+
+2025/03/11 15:39:44 STATIC: [T83RR-8SM5G] staticd 10.4-dev starting: vty@2616
+2025/03/11 15:39:45 STATIC: [GH3PB-C7X4Y] Static Route to 13.13.13.13/32 not installed currently because dependent config not fully available
+2025/03/11 15:39:45 STATIC: [RHJK1-M5FAR] static_zebra_nht_register: Failure to send nexthop 1.1.1.2/32 for 11.11.11.11/32 to zebra
+2025/03/11 15:39:45 STATIC: [M7Q4P-46WDR] vty[14]@> enable
+
+Zebra shows connection time as:
+
+2025/03/11 15:39:45.933343 ZEBRA: [V98V0-MTWPF] client 5 says hello and bids fair to announce only static routes vrf=0
+
+As a result staticd never installs the route because it has no nexthop
+tracking to say that the route could be installed.
+
+Modify staticd on startup to go through it's nexthops and dump them to
+zebra to allow the staticd state machine to get to work.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ staticd/static_routes.c | 30 ++++++++++++++++++++++++++++++
+ staticd/static_routes.h |  1 +
+ staticd/static_zebra.c  |  6 ++++++
+ 3 files changed, 37 insertions(+)
+
+diff --git a/staticd/static_routes.c b/staticd/static_routes.c
+index 82eabd8d564a..d549df70fef3 100644
+--- a/staticd/static_routes.c
++++ b/staticd/static_routes.c
+@@ -368,6 +368,36 @@ static void static_ifindex_update_nh(struct interface *ifp, bool up,
+ 	static_install_path(pn);
+ }
+ 
++void static_install_nexthops_on_startup(void)
++{
++	struct route_table *stable;
++	struct route_node *rn;
++	struct static_nexthop *nh;
++	struct static_path *pn;
++	struct static_vrf *svrf;
++	struct static_route_info *si;
++	afi_t afi;
++	safi_t safi;
++
++	RB_FOREACH (svrf, svrf_name_head, &svrfs) {
++		FOREACH_AFI_SAFI (afi, safi) {
++			stable = static_vrf_static_table(afi, safi, svrf);
++			if (!stable)
++				continue;
++			for (rn = route_top(stable); rn; rn = srcdest_route_next(rn)) {
++				si = static_route_info_from_rnode(rn);
++				if (!si)
++					continue;
++				frr_each (static_path_list, &si->path_list, pn) {
++					frr_each (static_nexthop_list, &pn->nexthop_list, nh) {
++						static_zebra_nht_register(nh, true);
++					}
++				}
++			}
++		}
++	}
++}
++
+ static void static_ifindex_update_af(struct interface *ifp, bool up, afi_t afi,
+ 				     safi_t safi)
+ {
+diff --git a/staticd/static_routes.h b/staticd/static_routes.h
+index 2e2e4986c348..7f4936e0b9ed 100644
+--- a/staticd/static_routes.h
++++ b/staticd/static_routes.h
+@@ -264,6 +264,7 @@ extern void static_bfd_initialize(struct zclient *zc, struct event_loop *tm);
+ 
+ extern void static_bfd_show(struct vty *vty, bool isjson);
+ 
++extern void static_install_nexthops_on_startup(void);
+ #ifdef __cplusplus
+ }
+ #endif
+diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
+index a6521cccc6ab..3ed525f386fd 100644
+--- a/staticd/static_zebra.c
++++ b/staticd/static_zebra.c
+@@ -181,6 +181,12 @@ static void zebra_connected(struct zclient *zclient)
+ 	vrf = vrf_lookup_by_id(VRF_DEFAULT);
+ 	assert(vrf);
+ 	static_fixup_vrf_ids(vrf);
++
++	/*
++	 * It's possible that staticd connected after config was read
++	 * in.
++	 */
++	static_install_nexthops_on_startup();
+ }
+ 
+ /* API to check whether the configured nexthop address is
diff --git a/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch b/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch
deleted file mode 100644
index ff1dc62228d..00000000000
--- a/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch
+++ /dev/null
@@ -1,425 +0,0 @@
-From 6d5604a9315801e9380c11357d663ad6537ed8ab Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Fri, 26 Jan 2024 14:48:53 -0500
-Subject: [PATCH 06/11] bgpd : backpressure - Handle BGP-Zebra Install evt
- Creation
-
-BGP is now keeping a list of dests with the dest having a pointer
-to the bgp_path_info that it will be working on.
-
-1) When bgp receives a prefix, process it, add the bgp_dest of the
-prefix into the new Fifo list if not present, update the flags (Ex:
-earlier if the prefix was advertised and now it is a withdrawn),
-increment the ref_count and DO NOT advertise the install/withdraw
-to zebra yet.
-
-2) Schedule an event to wake up to invoke the new function which will
-walk the list one by one and installs/withdraws the routes into zebra.
-  a) if BUFFER_EMPTY, process the next item on the list
-  b) if BUFFER_PENDING, bail out and the callback in
-  zclient_flush_data() will invoke the same function when BUFFER_EMPTY
-
-Changes
- - rename old bgp_zebra_announce to bgp_zebra_announce_actual
- - rename old bgp_zebra_withdrw to bgp_zebra_withdraw_actual
- - Handle new fifo list cleanup in bgp_exit()
- - New funcs: bgp_handle_route_announcements_to_zebra() and
-   bgp_zebra_route_install()
- - Define a callback function to invoke
-   bgp_handle_route_announcements_to_zebra() when BUFFER_EMPTY in
-   zclient_flush_data()
-
-The current change deals with bgp installing routes via
-bgp_process_main_one()
-
-Ticket: #3390099
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
----
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index 99fb021b1..e45d4b1ff 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -3419,8 +3419,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 					|| new_select->sub_type
- 						   == BGP_ROUTE_IMPORTED))
- 
--					bgp_zebra_announce(dest, old_select,
--							   bgp);
-+					bgp_zebra_route_install(dest, old_select,
-+							   bgp, true);
- 			}
- 		}
- 
-@@ -3529,9 +3529,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 			 */
- 			if (old_select &&
- 			    is_route_parent_evpn(old_select))
--				bgp_zebra_withdraw(dest, old_select, bgp);
-+				bgp_zebra_route_install(dest, old_select, bgp, false);
- 
--			bgp_zebra_announce(dest, new_select, bgp);
-+			bgp_zebra_route_install(dest, new_select, bgp, true);
- 		} else {
- 			/* Withdraw the route from the kernel. */
- 			if (old_select && old_select->type == ZEBRA_ROUTE_BGP
-@@ -3539,7 +3539,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 				|| old_select->sub_type == BGP_ROUTE_AGGREGATE
- 				|| old_select->sub_type == BGP_ROUTE_IMPORTED))
- 
--				bgp_zebra_withdraw(dest, old_select, bgp);
-+				bgp_zebra_route_install(dest, old_select, bgp, false);
- 		}
- 	}
- 
-@@ -4444,7 +4444,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
- 	if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) {
- 		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
- 			/* remove from RIB previous entry */
--			bgp_zebra_withdraw(dest, pi, bgp);
-+			bgp_zebra_route_install(dest, pi, bgp, false);
- 	}
- 
- 	if (peer->sort == BGP_PEER_EBGP) {
-@@ -6070,7 +6070,7 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
- 				|| pi->sub_type == BGP_ROUTE_IMPORTED)) {
- 
- 				if (bgp_fibupd_safi(safi))
--					bgp_zebra_withdraw(dest, pi, bgp);
-+					bgp_zebra_withdraw_actual(dest, pi, bgp);
- 			}
- 
- 			dest = bgp_path_info_reap(dest, pi);
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index 9b4b46b40..31d981191 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -1507,8 +1507,9 @@ static void bgp_debug_zebra_nh(struct zapi_route *api)
- 	}
- }
- 
--void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
--			struct bgp *bgp)
-+static enum zclient_send_status
-+bgp_zebra_announce_actual(struct bgp_dest *dest, struct bgp_path_info *info,
-+			  struct bgp *bgp)
- {
- 	struct bgp_path_info *bpi_ultimate;
- 	struct zapi_route api = { 0 };
-@@ -1524,27 +1525,10 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
- 	struct bgp_table *table = bgp_dest_table(dest);
- 	const struct prefix *p = bgp_dest_get_prefix(dest);
- 
--	/*
--	 * BGP is installing this route and bgp has been configured
--	 * to suppress announcements until the route has been installed
--	 * let's set the fact that we expect this route to be installed
--	 */
--	if (BGP_SUPPRESS_FIB_ENABLED(bgp))
--		SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
--
--	/* Don't try to install if we're not connected to Zebra or Zebra doesn't
--	 * know of this instance.
--	 */
--	if (!bgp_install_info_to_zebra(bgp))
--		return;
--
--	if (bgp->main_zebra_update_hold)
--		return;
--
- 	if (table->safi == SAFI_FLOWSPEC) {
- 		bgp_pbr_update_entry(bgp, p, info, table->afi, table->safi,
- 							true);
--		return;
-+		return ZCLIENT_SEND_SUCCESS;
- 	}
- 
- 	/* Make Zebra API structure. */
-@@ -1661,7 +1645,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
- 		zlog_debug("%s: %pFX: announcing to zebra (recursion %sset)",
- 			   __func__, p, (recursion_flag ? "" : "NOT "));
- 	}
--	zclient_route_send(is_add ? ZEBRA_ROUTE_ADD : ZEBRA_ROUTE_DELETE,
-+	return zclient_route_send(is_add ? ZEBRA_ROUTE_ADD : ZEBRA_ROUTE_DELETE,
- 			   zclient, &api);
- }
- 
-@@ -1690,7 +1674,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
- 			     && (pi->sub_type == BGP_ROUTE_NORMAL
- 				 || pi->sub_type == BGP_ROUTE_IMPORTED)))
- 
--				bgp_zebra_announce(dest, pi, bgp);
-+				bgp_zebra_route_install(dest, pi, bgp, true);
- }
- 
- /* Announce routes of any bgp subtype of a table to zebra */
-@@ -1712,32 +1696,23 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
- 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next)
- 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) &&
- 			    pi->type == ZEBRA_ROUTE_BGP)
--				bgp_zebra_announce(dest, pi, bgp);
-+				bgp_zebra_route_install(dest, pi, bgp, true);
- }
- 
--void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info,
--			struct bgp *bgp)
-+
-+enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest,
-+						   struct bgp_path_info *info,
-+						   struct bgp *bgp)
- {
- 	struct zapi_route api;
- 	struct peer *peer;
- 	struct bgp_table *table = bgp_dest_table(dest);
- 	const struct prefix *p = bgp_dest_get_prefix(dest);
--	/*
--	 * If we are withdrawing the route, we don't need to have this
--	 * flag set.  So unset it.
--	 */
--	UNSET_FLAG(info->net->flags, BGP_NODE_FIB_INSTALL_PENDING);
--
--	/* Don't try to install if we're not connected to Zebra or Zebra doesn't
--	 * know of this instance.
--	 */
--	if (!bgp_install_info_to_zebra(bgp))
--		return;
- 
- 	if (table->safi == SAFI_FLOWSPEC) {
- 		peer = info->peer;
- 		bgp_pbr_update_entry(peer->bgp, p, info, table->afi, table->safi, false);
--		return;
-+		return ZCLIENT_SEND_SUCCESS;
- 	}
- 
- 	memset(&api, 0, sizeof(api));
-@@ -1755,7 +1730,172 @@ void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info,
- 		zlog_debug("Tx route delete VRF %u %pFX", bgp->vrf_id,
- 			   &api.prefix);
- 
--	zclient_route_send(ZEBRA_ROUTE_DELETE, zclient, &api);
-+	return zclient_route_send(ZEBRA_ROUTE_DELETE, zclient, &api);
-+}
-+
-+/*
-+ * Walk the new Fifo list one by one and invoke bgp_zebra_announce/withdraw
-+ * to install/withdraw the routes to zebra.
-+ *
-+ * If status = ZCLIENT_SEND_SUCCESS (Buffer empt)y i.e. Zebra is free to
-+ * receive more incoming data, then pick the next item on the list and
-+ * continue processing.
-+ *
-+ * If status = ZCLIENT_SEND_BUFFERED (Buffer pending) i.e. Zebra is busy,
-+ * break and bail out of the function because once at some point when zebra
-+ * is free, a callback is triggered which inturn call this same function and
-+ * continue processing items on list.
-+ */
-+#define ZEBRA_ANNOUNCEMENTS_LIMIT 1000
-+static void bgp_handle_route_announcements_to_zebra(struct thread *e)
-+{
-+	uint32_t count = 0;
-+	struct bgp_dest *dest = NULL;
-+	struct bgp_table *table = NULL;
-+	enum zclient_send_status status = ZCLIENT_SEND_SUCCESS;
-+	bool install;
-+
-+	while (count < ZEBRA_ANNOUNCEMENTS_LIMIT) {
-+		dest = zebra_announce_pop(&bm->zebra_announce_head);
-+
-+		if (!dest)
-+			break;
-+
-+		table = bgp_dest_table(dest);
-+		install =
-+			CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
-+
-+		if (BGP_DEBUG(zebra, ZEBRA))
-+			zlog_debug(
-+				"BGP %s route %pBD(%s) with dest %p and flags 0x%x to zebra",
-+				install ? "announcing" : "withdrawing", dest,
-+				table->bgp->name_pretty, dest, dest->flags);
-+
-+		if (install) {
-+			status = bgp_zebra_announce_actual(
-+				dest, dest->za_bgp_pi, table->bgp);
-+			UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
-+		} else {
-+			status = bgp_zebra_withdraw_actual(
-+				dest, dest->za_bgp_pi, table->bgp);
-+			UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
-+		}
-+
-+		bgp_path_info_unlock(dest->za_bgp_pi);
-+		dest->za_bgp_pi = NULL;
-+		bgp_dest_unlock_node(dest);
-+
-+		if (status == ZCLIENT_SEND_BUFFERED)
-+			break;
-+
-+		count++;
-+	}
-+
-+	if (status != ZCLIENT_SEND_BUFFERED &&
-+	    zebra_announce_count(&bm->zebra_announce_head))
-+		event_add_event(bm->master,
-+				 bgp_handle_route_announcements_to_zebra, NULL,
-+				 0, &bm->t_bgp_zebra_route);
-+}
-+
-+/*
-+ * Callback function invoked when zclient_flush_data() receives a BUFFER_EMPTY
-+ * i.e. zebra is free to receive more incoming data.
-+ */
-+static void bgp_zebra_buffer_write_ready(void)
-+{
-+	bgp_handle_route_announcements_to_zebra(NULL);
-+}
-+
-+/*
-+ * BGP is now keeping a list of dests with the dest having a pointer
-+ * to the bgp_path_info that it will be working on.
-+ * Here is the sequence of events that should happen:
-+ *
-+ *  Current State      New State       Action
-+ *  -------------      ---------       ------
-+ *      ----           Install         Place dest on list, save pi, mark
-+ *                                     as going to be installed
-+ *      ----           Withdrawal      Place dest on list, save pi, mark
-+ *                                     as going to be deleted
-+ *
-+ *    Install          Install         Leave dest on list, release old pi,
-+ *                                     save new pi, mark as going to be
-+ *                                     Installed
-+ *    Install          Withdrawal      Leave dest on list, release old pi,
-+ *                                     save new pi, mark as going to be
-+ *                                     withdrawan, remove install flag
-+ *
-+ *    Withdrawal       Install         Special case, send withdrawal immediately
-+ *                                     Leave dest on list, release old pi,
-+ *                                     save new pi, mark as going to be
-+ *                                     installed.  <see note about evpn
-+ *                                     in bgp_route.c in bgp_process_main_one>
-+ *    Withdrawal       Withdrawal      Leave dest on list, release old pi,
-+ *                                     save new pi, mark as going to be
-+ *                                     withdrawn.
-+ */
-+void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
-+			     struct bgp *bgp, bool install)
-+{
-+	/*
-+	 * BGP is installing this route and bgp has been configured
-+	 * to suppress announcements until the route has been installed
-+	 * let's set the fact that we expect this route to be installed
-+	 */
-+	if (install) {
-+		if (BGP_SUPPRESS_FIB_ENABLED(bgp))
-+			SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
-+
-+		if (bgp->main_zebra_update_hold)
-+			return;
-+	} else {
-+		UNSET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
-+	}
-+
-+	/*
-+	 * Don't try to install if we're not connected to Zebra or Zebra doesn't
-+	 * know of this instance.
-+	 */
-+	if (!bgp_install_info_to_zebra(bgp))
-+		return;
-+
-+	if (!CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL) &&
-+	    !CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) {
-+		zebra_announce_add_tail(&bm->zebra_announce_head, dest);
-+		/*
-+		 * If neither flag is set and za_bgp_pi is not set then it is a
-+		 * bug
-+		 */
-+		assert(!dest->za_bgp_pi);
-+		bgp_path_info_lock(info);
-+		bgp_dest_lock_node(dest);
-+		dest->za_bgp_pi = info;
-+	} else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL)) {
-+		assert(dest->za_bgp_pi);
-+		bgp_path_info_unlock(dest->za_bgp_pi);
-+		bgp_path_info_lock(info);
-+		dest->za_bgp_pi = info;
-+	} else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) {
-+		assert(dest->za_bgp_pi);
-+		if (install)
-+			bgp_zebra_withdraw_actual(dest, dest->za_bgp_pi, bgp);
-+
-+		bgp_path_info_unlock(dest->za_bgp_pi);
-+		bgp_path_info_lock(info);
-+		dest->za_bgp_pi = info;
-+	}
-+
-+	if (install) {
-+		UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
-+		SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
-+	} else {
-+		UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
-+		SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
-+	}
-+
-+	event_add_event(bm->master, bgp_handle_route_announcements_to_zebra,
-+			 NULL, 0, &bm->t_bgp_zebra_route);
- }
- 
- /* Withdraw all entries in a BGP instances RIB table from Zebra */
-@@ -1776,7 +1916,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
- 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
- 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)
- 			    && (pi->type == ZEBRA_ROUTE_BGP))
--				bgp_zebra_withdraw(dest, pi, bgp);
-+				bgp_zebra_route_install(dest, pi, bgp, false);
- 		}
- 	}
- }
-@@ -3449,6 +3589,7 @@ void bgp_zebra_init(struct event_loop *master, unsigned short instance)
- 	zclient = zclient_new(master, &zclient_options_default, bgp_handlers,
- 			      array_size(bgp_handlers));
- 	zclient_init(zclient, ZEBRA_ROUTE_BGP, 0, &bgpd_privs);
-+	zclient->zebra_buffer_write_ready = bgp_zebra_buffer_write_ready;
- 	zclient->zebra_connected = bgp_zebra_connected;
- 	zclient->zebra_capabilities = bgp_zebra_capabilities;
- 	zclient->nexthop_update = bgp_nexthop_update;
-diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
-index 0facef5cc..6bfa74f4c 100644
---- a/bgpd/bgp_zebra.h
-+++ b/bgpd/bgp_zebra.h
-@@ -28,12 +28,14 @@ extern void bgp_zebra_destroy(void);
- extern int bgp_zebra_get_table_range(struct zclient *zc, uint32_t chunk_size,
- 				     uint32_t *start, uint32_t *end);
- extern int bgp_if_update_all(void);
--extern void bgp_zebra_announce(struct bgp_dest *dest,
--			       struct bgp_path_info *path, struct bgp *bgp);
-+extern void bgp_zebra_route_install(struct bgp_dest *dest,
-+				    struct bgp_path_info *path, struct bgp *bgp,
-+				    bool install);
- 
- extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi);
--extern void bgp_zebra_withdraw(struct bgp_dest *dest,
--			       struct bgp_path_info *path, struct bgp *bgp);
-+extern enum zclient_send_status
-+bgp_zebra_withdraw_actual(struct bgp_dest *dest, struct bgp_path_info *info,
-+			  struct bgp *bgp);
- 
- /* Announce routes of any bgp subtype of a table to zebra */
- extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
-diff --git a/lib/zclient.c b/lib/zclient.c
-index 6b35b569d..64515c754 100644
---- a/lib/zclient.c
-+++ b/lib/zclient.c
-@@ -282,6 +282,7 @@ static void zclient_flush_data(struct event *thread)
- 				zclient->sock, &zclient->t_write);
- 		break;
- 	case BUFFER_EMPTY:
-+		/* Currently only Sharpd and Bgpd has callbacks defined */
- 		if (zclient->zebra_buffer_write_ready)
- 			(*zclient->zebra_buffer_write_ready)();
- 		break;
--- 
-2.39.4
-
diff --git a/src/sonic-frr/patch/0034-staticd-Fix-an-issue-where-SRv6-SIDs-may-not-be-allocated-on-heavily-loaded-systems.patch b/src/sonic-frr/patch/0034-staticd-Fix-an-issue-where-SRv6-SIDs-may-not-be-allocated-on-heavily-loaded-systems.patch
new file mode 100644
index 00000000000..ac5c8c346b8
--- /dev/null
+++ b/src/sonic-frr/patch/0034-staticd-Fix-an-issue-where-SRv6-SIDs-may-not-be-allocated-on-heavily-loaded-systems.patch
@@ -0,0 +1,153 @@
+From 9c011b5b958059a5fa84fd725dbf2f2ba4a74c49 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Tue, 4 Mar 2025 23:02:03 +0100
+Subject: [PATCH 1/3] staticd: Allocate SRv6 SIDs after connecting with SID
+ Manager
+
+On a heavily loaded system, it may take some time to establish a
+connection between staticd and SRv6 SID Manager.
+As a result, staticd might try to allocate SIDs in SID Manager before the
+connection is fully established, leading to a failure.
+
+This issue is reflected in the log with the following error message:
+
+```
+2025/03/04 15:24:01 STATIC: [HR66R-TWQYD][EC 100663302] srv6_manager_get_locator: invalid zclient socket
+```
+
+In this scenario, SIDs are still kept in the staticd configuration,
+but not allocated and not installed in the RIB.
+
+This commit fixes the issue by forcing staticd to retry to allocate
+the SIDs once the connection with SID Manager is successfully
+established.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_srv6.c  | 9 +++++++++
+ staticd/static_srv6.h  | 2 ++
+ staticd/static_zebra.c | 2 ++
+ 3 files changed, 13 insertions(+)
+
+diff --git a/staticd/static_srv6.c b/staticd/static_srv6.c
+index 032bb9de9f4c..2533a37175da 100644
+--- a/staticd/static_srv6.c
++++ b/staticd/static_srv6.c
+@@ -153,6 +153,15 @@ void delete_static_srv6_sid(void *val)
+ 	static_srv6_sid_free((struct static_srv6_sid *)val);
+ }
+ 
++void static_zebra_request_srv6_sids()
++{
++	struct static_srv6_sid *sid;
++	struct listnode *node;
++
++	for (ALL_LIST_ELEMENTS_RO(srv6_sids, node, sid))
++		static_zebra_request_srv6_sid(sid);
++}
++
+ /*
+  * Initialize SRv6 data structures.
+  */
+diff --git a/staticd/static_srv6.h b/staticd/static_srv6.h
+index 48986092ae4d..2cf5f010ce95 100644
+--- a/staticd/static_srv6.h
++++ b/staticd/static_srv6.h
+@@ -101,6 +101,8 @@ struct static_srv6_locator *static_srv6_locator_lookup(const char *name);
+ void delete_static_srv6_sid(void *val);
+ void delete_static_srv6_locator(void *val);
+ 
++void static_zebra_request_srv6_sids(void);
++
+ #ifdef __cplusplus
+ }
+ #endif
+diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
+index cc09b428365f..cc046a0e196a 100644
+--- a/staticd/static_zebra.c
++++ b/staticd/static_zebra.c
+@@ -187,6 +187,8 @@ static void zebra_connected(struct zclient *zclient)
+ 	 * in.
+ 	 */
+ 	static_install_nexthops_on_startup();
++
++	static_zebra_request_srv6_sids();
+ }
+ 
+ /* API to check whether the configured nexthop address is
+
+From 2985bce0a60a94e74d26be59b3f65f278eab8153 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Wed, 5 Mar 2025 13:17:08 +0100
+Subject: [PATCH 2/3] staticd: Fix crash when allocating SIDs without parent
+ locator
+
+In same cases, it may happen staticd attempts to allocate a SID when it
+does not know about the parent locator yet.
+In this case, the locator pointer stored inside the SID data structure
+is NULL. When `static_zebra_request_srv6_sid` attempts to dereference
+the locator pointer, we get a NULL pointer dereference crash.
+
+This commit adds a check to prevent the crash from happening.
+
+If the locator pointer is NULL, it means that staticd is not aware
+about the parent locator yet. Then, staticd should call
+`static_zebra_srv6_manager_get_locator()` to get the locator from SRv6
+Manager. Once staticd receives the requested locator, the existing
+callback `static_zebra_process_srv6_locator_internal()` will take care
+of retrying to allocate the SID.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_zebra.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
+index cc046a0e196a..a4c9c7da09e0 100644
+--- a/staticd/static_zebra.c
++++ b/staticd/static_zebra.c
+@@ -942,6 +942,11 @@ extern void static_zebra_request_srv6_sid(struct static_srv6_sid *sid)
+ 	if (!sid || !static_zebra_sid_locator_block_check(sid))
+ 		return;
+ 
++	if (!sid->locator) {
++		static_zebra_srv6_manager_get_locator(sid->locator_name);
++		return;
++	}
++
+ 	/* convert `srv6_endpoint_behavior_codepoint` to `seg6local_action_t` */
+ 	switch (sid->behavior) {
+ 	case SRV6_ENDPOINT_BEHAVIOR_END:
+
+From 1cd578ff856d8e2ef917c5611470ff8eaff205b7 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Wed, 23 Apr 2025 06:57:57 +0000
+Subject: [PATCH 3/3] staticd: Fix error reported by checkpatch
+
+This commit fixes the following error:
+
+```
+20-Apr-2025 08:10:54	Report for static_srv6.c | 2 issues
+20-Apr-2025 08:10:54	===============================================
+20-Apr-2025 08:10:54	< ERROR: Bad function definition - void static_zebra_request_srv6_sids() should probably be void static_zebra_request_srv6_sids(void)
+20-Apr-2025 08:10:54	< #156: FILE: /tmp/f1-3023993/static_srv6.c:156:
+```
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ staticd/static_srv6.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/staticd/static_srv6.c b/staticd/static_srv6.c
+index 2533a37175da..d4d31436c1f8 100644
+--- a/staticd/static_srv6.c
++++ b/staticd/static_srv6.c
+@@ -153,7 +153,7 @@ void delete_static_srv6_sid(void *val)
+ 	static_srv6_sid_free((struct static_srv6_sid *)val);
+ }
+ 
+-void static_zebra_request_srv6_sids()
++void static_zebra_request_srv6_sids(void)
+ {
+ 	struct static_srv6_sid *sid;
+ 	struct listnode *node;
diff --git a/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch b/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch
deleted file mode 100644
index 1ef5f9c849d..00000000000
--- a/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch
+++ /dev/null
@@ -1,2133 +0,0 @@
-From 84f7778808b7fee771f26c3cae46292ef85f06c0 Mon Sep 17 00:00:00 2001
-From: Rajasekar Raja <rajasekarr@nvidia.com>
-Date: Thu, 15 Feb 2024 11:23:51 -0800
-Subject: [PATCH 07/11] bgpd : backpressure - Handle BGP-Zebra(EPVN) Install
- evt Creation
-
-Current changes deals with EVPN routes installation to zebra.
-
-In evpn_route_select_install() we invoke evpn_zebra_install/uninstall
-which sends zclient_send_message().
-
-This is a continuation of code changes (similar to
-ccfe452763d16c432fa81fd20e805bec819b345e) but to handle evpn part
-of the code.
-
-Ticket: #3390099
-
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index a846484f0..79e16d8f9 100644
---- a/bgpd/bgp_evpn.c
-+++ b/bgpd/bgp_evpn.c
-@@ -55,27 +55,25 @@ DEFINE_MTYPE_STATIC(BGPD, VRF_ROUTE_TARGET, "L3 Route Target");
- /*
-  * Static function declarations
-  */
--static void bgp_evpn_remote_ip_hash_init(struct bgpevpn *evpn);
--static void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *evpn);
--static void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn,
-+void bgp_evpn_remote_ip_hash_init(struct bgpevpn *evpn);
-+void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *evpn);
-+void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn,
- 					struct bgp_path_info *pi);
--static void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn,
-+void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn,
- 					struct bgp_path_info *pi);
--static void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn,
--					    void (*func)(struct hash_bucket *,
--							 void *),
--					    void *arg);
--static void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn);
--static void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp,
-+void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn,
-+					    void (*func)(struct hash_bucket *,void *), void *arg);
-+void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn);
-+void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp,
- 					      struct bgpevpn *vpn);
--static unsigned int vni_svi_hash_key_make(const void *p);
--static bool vni_svi_hash_cmp(const void *p1, const void *p2);
--static void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn,
-+unsigned int  vni_svi_hash_key_make(const void *p);
-+bool vni_svi_hash_cmp(const void *p1, const void *p2);
-+void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn,
- 						struct ipaddr *addr,
- 						bool resolve);
--static void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket,
-+void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket,
- 						 void *args);
--static void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket,
-+void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket,
- 						   void *args);
- static struct in_addr zero_vtep_ip;
-
-@@ -86,7 +84,7 @@ static struct in_addr zero_vtep_ip;
- /*
-  * Make vni hash key.
-  */
--static unsigned int vni_hash_key_make(const void *p)
-+unsigned int  vni_hash_key_make(const void *p)
- {
- 	const struct bgpevpn *vpn = p;
- 	return (jhash_1word(vpn->vni, 0));
-@@ -95,7 +93,7 @@ static unsigned int vni_hash_key_make(const void *p)
- /*
-  * Comparison function for vni hash
-  */
--static bool vni_hash_cmp(const void *p1, const void *p2)
-+bool vni_hash_cmp(const void *p1, const void *p2)
- {
- 	const struct bgpevpn *vpn1 = p1;
- 	const struct bgpevpn *vpn2 = p2;
-@@ -114,7 +112,7 @@ int vni_list_cmp(void *p1, void *p2)
- /*
-  * Make vrf import route target hash key.
-  */
--static unsigned int vrf_import_rt_hash_key_make(const void *p)
-+unsigned int  vrf_import_rt_hash_key_make(const void *p)
- {
- 	const struct vrf_irt_node *irt = p;
- 	const char *pnt = irt->rt.val;
-@@ -125,7 +123,7 @@ static unsigned int vrf_import_rt_hash_key_make(const void *p)
- /*
-  * Comparison function for vrf import rt hash
-  */
--static bool vrf_import_rt_hash_cmp(const void *p1, const void *p2)
-+bool vrf_import_rt_hash_cmp(const void *p1, const void *p2)
- {
- 	const struct vrf_irt_node *irt1 = p1;
- 	const struct vrf_irt_node *irt2 = p2;
-@@ -136,7 +134,7 @@ static bool vrf_import_rt_hash_cmp(const void *p1, const void *p2)
- /*
-  * Create a new vrf import_rt in evpn instance
-  */
--static struct vrf_irt_node *vrf_import_rt_new(struct ecommunity_val *rt)
-+struct vrf_irt_node *vrf_import_rt_new(struct ecommunity_val *rt)
- {
- 	struct bgp *bgp_evpn = NULL;
- 	struct vrf_irt_node *irt;
-@@ -163,7 +161,7 @@ static struct vrf_irt_node *vrf_import_rt_new(struct ecommunity_val *rt)
- /*
-  * Free the vrf import rt node
-  */
--static void vrf_import_rt_free(struct vrf_irt_node *irt)
-+void vrf_import_rt_free(struct vrf_irt_node *irt)
- {
- 	struct bgp *bgp_evpn = NULL;
-
-@@ -179,7 +177,7 @@ static void vrf_import_rt_free(struct vrf_irt_node *irt)
- 	XFREE(MTYPE_BGP_EVPN_VRF_IMPORT_RT, irt);
- }
-
--static void hash_vrf_import_rt_free(struct vrf_irt_node *irt)
-+void hash_vrf_import_rt_free(struct vrf_irt_node *irt)
- {
- 	XFREE(MTYPE_BGP_EVPN_VRF_IMPORT_RT, irt);
- }
-@@ -188,7 +186,7 @@ static void hash_vrf_import_rt_free(struct vrf_irt_node *irt)
-  * Function to lookup Import RT node - used to map a RT to set of
-  * VNIs importing routes with that RT.
-  */
--static struct vrf_irt_node *lookup_vrf_import_rt(struct ecommunity_val *rt)
-+struct vrf_irt_node *lookup_vrf_import_rt(struct ecommunity_val *rt)
- {
- 	struct bgp *bgp_evpn = NULL;
- 	struct vrf_irt_node *irt;
-@@ -211,7 +209,7 @@ static struct vrf_irt_node *lookup_vrf_import_rt(struct ecommunity_val *rt)
- /*
-  * Is specified VRF present on the RT's list of "importing" VRFs?
-  */
--static int is_vrf_present_in_irt_vrfs(struct list *vrfs, struct bgp *bgp_vrf)
-+int is_vrf_present_in_irt_vrfs(struct list *vrfs, struct bgp *bgp_vrf)
- {
- 	struct listnode *node = NULL, *nnode = NULL;
- 	struct bgp *tmp_bgp_vrf = NULL;
-@@ -226,7 +224,7 @@ static int is_vrf_present_in_irt_vrfs(struct list *vrfs, struct bgp *bgp_vrf)
- /*
-  * Make import route target hash key.
-  */
--static unsigned int import_rt_hash_key_make(const void *p)
-+unsigned int  import_rt_hash_key_make(const void *p)
- {
- 	const struct irt_node *irt = p;
- 	const char *pnt = irt->rt.val;
-@@ -237,7 +235,7 @@ static unsigned int import_rt_hash_key_make(const void *p)
- /*
-  * Comparison function for import rt hash
-  */
--static bool import_rt_hash_cmp(const void *p1, const void *p2)
-+bool import_rt_hash_cmp(const void *p1, const void *p2)
- {
- 	const struct irt_node *irt1 = p1;
- 	const struct irt_node *irt2 = p2;
-@@ -248,7 +246,7 @@ static bool import_rt_hash_cmp(const void *p1, const void *p2)
- /*
-  * Create a new import_rt
-  */
--static struct irt_node *import_rt_new(struct bgp *bgp,
-+struct irt_node *import_rt_new(struct bgp *bgp,
- 				      struct ecommunity_val *rt)
- {
- 	struct irt_node *irt;
-@@ -267,14 +265,14 @@ static struct irt_node *import_rt_new(struct bgp *bgp,
- /*
-  * Free the import rt node
-  */
--static void import_rt_free(struct bgp *bgp, struct irt_node *irt)
-+void import_rt_free(struct bgp *bgp, struct irt_node *irt)
- {
- 	hash_release(bgp->import_rt_hash, irt);
- 	list_delete(&irt->vnis);
- 	XFREE(MTYPE_BGP_EVPN_IMPORT_RT, irt);
- }
-
--static void hash_import_rt_free(struct irt_node *irt)
-+void hash_import_rt_free(struct irt_node *irt)
- {
- 	XFREE(MTYPE_BGP_EVPN_IMPORT_RT, irt);
- }
-@@ -283,7 +281,7 @@ static void hash_import_rt_free(struct irt_node *irt)
-  * Function to lookup Import RT node - used to map a RT to set of
-  * VNIs importing routes with that RT.
-  */
--static struct irt_node *lookup_import_rt(struct bgp *bgp,
-+struct irt_node *lookup_import_rt(struct bgp *bgp,
- 					 struct ecommunity_val *rt)
- {
- 	struct irt_node *irt;
-@@ -298,7 +296,7 @@ static struct irt_node *lookup_import_rt(struct bgp *bgp,
- /*
-  * Is specified VNI present on the RT's list of "importing" VNIs?
-  */
--static int is_vni_present_in_irt_vnis(struct list *vnis, struct bgpevpn *vpn)
-+int is_vni_present_in_irt_vnis(struct list *vnis, struct bgpevpn *vpn)
- {
- 	struct listnode *node, *nnode;
- 	struct bgpevpn *tmp_vpn;
-@@ -384,7 +382,7 @@ int bgp_evpn_route_target_cmp(struct ecommunity *ecom1,
- /*
-  * Compare L3 Route Targets.
-  */
--static int evpn_vrf_route_target_cmp(struct vrf_route_target *rt1,
-+int evpn_vrf_route_target_cmp(struct vrf_route_target *rt1,
- 				     struct vrf_route_target *rt2)
- {
- 	return bgp_evpn_route_target_cmp(rt1->ecom, rt2->ecom);
-@@ -399,7 +397,7 @@ void bgp_evpn_xxport_delete_ecomm(void *val)
- /*
-  * Delete l3 Route Target.
-  */
--static void evpn_vrf_rt_del(void *val)
-+void evpn_vrf_rt_del(void *val)
- {
- 	struct vrf_route_target *l3rt = val;
-
-@@ -411,7 +409,7 @@ static void evpn_vrf_rt_del(void *val)
- /*
-  * Allocate a new l3 Route Target.
-  */
--static struct vrf_route_target *evpn_vrf_rt_new(struct ecommunity *ecom)
-+struct vrf_route_target *evpn_vrf_rt_new(struct ecommunity *ecom)
- {
- 	struct vrf_route_target *l3rt;
-
-@@ -446,7 +444,7 @@ static inline void mask_ecom_global_admin(struct ecommunity_val *dst,
-  * Converts the RT to Ecommunity Value and adjusts masking based
-  * on flags set for RT.
-  */
--static void vrf_rt2ecom_val(struct ecommunity_val *to_eval,
-+void vrf_rt2ecom_val(struct ecommunity_val *to_eval,
- 			    const struct vrf_route_target *l3rt, int iter)
- {
- 	const struct ecommunity_val *eval;
-@@ -470,7 +468,7 @@ static void vrf_rt2ecom_val(struct ecommunity_val *to_eval,
-  * Map one RT to specified VRF.
-  * bgp_vrf = BGP vrf instance
-  */
--static void map_vrf_to_rt(struct bgp *bgp_vrf, struct vrf_route_target *l3rt)
-+void map_vrf_to_rt(struct bgp *bgp_vrf, struct vrf_route_target *l3rt)
- {
- 	uint32_t i = 0;
-
-@@ -499,7 +497,7 @@ static void map_vrf_to_rt(struct bgp *bgp_vrf, struct vrf_route_target *l3rt)
-  * VRFs for this RT, then the RT hash is deleted.
-  * bgp_vrf: BGP VRF specific instance
-  */
--static void unmap_vrf_from_rt(struct bgp *bgp_vrf,
-+void unmap_vrf_from_rt(struct bgp *bgp_vrf,
- 			      struct vrf_route_target *l3rt)
- {
- 	uint32_t i;
-@@ -527,7 +525,7 @@ static void unmap_vrf_from_rt(struct bgp *bgp_vrf,
- /*
-  * Map one RT to specified VNI.
-  */
--static void map_vni_to_rt(struct bgp *bgp, struct bgpevpn *vpn,
-+void map_vni_to_rt(struct bgp *bgp, struct bgpevpn *vpn,
- 			  struct ecommunity_val *eval)
- {
- 	struct irt_node *irt;
-@@ -558,7 +556,7 @@ static void map_vni_to_rt(struct bgp *bgp, struct bgpevpn *vpn,
-  * Unmap specified VNI from specified RT. If there are no other
-  * VNIs for this RT, then the RT hash is deleted.
-  */
--static void unmap_vni_from_rt(struct bgp *bgp, struct bgpevpn *vpn,
-+void unmap_vni_from_rt(struct bgp *bgp, struct bgpevpn *vpn,
- 			      struct irt_node *irt)
- {
- 	/* Delete VNI from hash list for this RT. */
-@@ -568,7 +566,7 @@ static void unmap_vni_from_rt(struct bgp *bgp, struct bgpevpn *vpn,
- 	}
- }
-
--static void bgp_evpn_get_rmac_nexthop(struct bgpevpn *vpn,
-+void bgp_evpn_get_rmac_nexthop(struct bgpevpn *vpn,
- 				      const struct prefix_evpn *p,
- 				      struct attr *attr, uint8_t flags)
- {
-@@ -609,7 +607,7 @@ static void bgp_evpn_get_rmac_nexthop(struct bgpevpn *vpn,
-  * VNIs but the same across routers (in the same AS) for a particular
-  * VNI.
-  */
--static void form_auto_rt(struct bgp *bgp, vni_t vni, struct list *rtl,
-+void form_auto_rt(struct bgp *bgp, vni_t vni, struct list *rtl,
- 			 bool is_l3)
- {
- 	struct ecommunity_val eval;
-@@ -657,7 +655,7 @@ static void form_auto_rt(struct bgp *bgp, vni_t vni, struct list *rtl,
-  * Derive RD and RT for a VNI automatically. Invoked at the time of
-  * creation of a VNI.
-  */
--static void derive_rd_rt_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
-+void derive_rd_rt_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	bgp_evpn_derive_auto_rd(bgp, vpn);
- 	bgp_evpn_derive_auto_rt_import(bgp, vpn);
-@@ -667,7 +665,7 @@ static void derive_rd_rt_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
- /*
-  * Convert nexthop (remote VTEP IP) into an IPv6 address.
-  */
--static void evpn_convert_nexthop_to_ipv6(struct attr *attr)
-+void evpn_convert_nexthop_to_ipv6(struct attr *attr)
- {
- 	if (BGP_ATTR_NEXTHOP_AFI_IP6(attr))
- 		return;
-@@ -892,7 +890,7 @@ struct bgp_dest *bgp_evpn_vni_node_lookup(const struct bgpevpn *vpn,
- /*
-  * Add (update) or delete MACIP from zebra.
-  */
--static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
-+enum zclient_send_status bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
- 				       const struct prefix_evpn *p,
- 				       const struct ethaddr *mac,
- 				       struct in_addr remote_vtep_ip, int add,
-@@ -903,9 +901,12 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
- 	static struct in_addr zero_remote_vtep_ip;
- 	bool esi_valid;
-
--	/* Check socket. */
--	if (!zclient || zclient->sock < 0)
--		return 0;
-+	if (!zclient || zclient->sock < 0) {
-+		if (BGP_DEBUG(zebra, ZEBRA))
-+			zlog_debug("%s: No zclient or zclient->sock exists",
-+				   __func__);
-+		return ZCLIENT_SEND_SUCCESS;
-+	}
-
- 	/* Don't try to register if Zebra doesn't know of this instance. */
- 	if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) {
-@@ -913,7 +914,7 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
- 			zlog_debug(
- 				"%s: No zebra instance to talk to, not installing remote macip",
- 				__func__);
--		return 0;
-+		return ZCLIENT_SEND_SUCCESS;
- 	}
-
- 	if (!esi)
-@@ -988,15 +989,18 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
- /*
-  * Add (update) or delete remote VTEP from zebra.
-  */
--static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
-+enum zclient_send_status bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
- 				      const struct prefix_evpn *p,
- 				      int flood_control, int add)
- {
- 	struct stream *s;
-
--	/* Check socket. */
--	if (!zclient || zclient->sock < 0)
--		return 0;
-+	if (!zclient || zclient->sock < 0) {
-+		if (BGP_DEBUG(zebra, ZEBRA))
-+			zlog_debug("%s: No zclient or zclient->sock exists",
-+				   __func__);
-+		return ZCLIENT_SEND_SUCCESS;
-+	}
-
- 	/* Don't try to register if Zebra doesn't know of this instance. */
- 	if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) {
-@@ -1004,7 +1008,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
- 			zlog_debug(
- 				"%s: No zebra instance to talk to, not installing remote vtep",
- 				__func__);
--		return 0;
-+		return ZCLIENT_SEND_SUCCESS;
- 	}
-
- 	s = zclient->obuf;
-@@ -1021,7 +1025,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
- 			EC_BGP_VTEP_INVALID,
- 			"Bad remote IP when trying to %s remote VTEP for VNI %u",
- 			add ? "ADD" : "DEL", (vpn ? vpn->vni : 0));
--		return -1;
-+		return ZCLIENT_SEND_FAILURE;
- 	}
- 	stream_putl(s, flood_control);
-
-@@ -1043,7 +1047,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
- /*
-  * Build extended communities for EVPN prefix route.
-  */
--static void build_evpn_type5_route_extcomm(struct bgp *bgp_vrf,
-+void build_evpn_type5_route_extcomm(struct bgp *bgp_vrf,
- 					   struct attr *attr)
- {
- 	struct ecommunity ecom_encap;
-@@ -1100,7 +1104,7 @@ static void build_evpn_type5_route_extcomm(struct bgp *bgp_vrf,
-  * added, if present, based on passed settings - only for non-link-local
-  * type-2 routes.
-  */
--static void build_evpn_route_extcomm(struct bgpevpn *vpn, struct attr *attr,
-+void build_evpn_route_extcomm(struct bgpevpn *vpn, struct attr *attr,
- 				     int add_l3_ecomm,
- 				     struct ecommunity *macvrf_soo)
- {
-@@ -1209,7 +1213,7 @@ static void build_evpn_route_extcomm(struct bgpevpn *vpn, struct attr *attr,
- /*
-  * Add MAC mobility extended community to attribute.
-  */
--static void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr)
-+void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr)
- {
- 	struct ecommunity ecom_tmp;
- 	struct ecommunity_val eval;
-@@ -1263,14 +1267,14 @@ static void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr)
- }
-
- /* Install EVPN route into zebra. */
--static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn,
-+enum zclient_send_status  evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn,
- 			      const struct prefix_evpn *p,
- 			      struct bgp_path_info *pi)
- {
--	int ret;
- 	uint8_t flags;
- 	int flood_control = VXLAN_FLOOD_DISABLED;
- 	uint32_t seq;
-+	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
-
- 	if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) {
- 		flags = 0;
-@@ -1355,11 +1359,11 @@ static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn,
- }
-
- /* Uninstall EVPN route from zebra. */
--static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
-+enum zclient_send_status evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
- 				const struct prefix_evpn *p,
- 				struct bgp_path_info *pi, bool is_sync)
- {
--	int ret;
-+	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
-
- 	if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE)
- 		ret = bgp_zebra_send_remote_macip(
-@@ -1384,7 +1388,7 @@ static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
-  * by a "remote" best route. The prior route has to be deleted and withdrawn
-  * from peers.
-  */
--static void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn,
-+void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn,
- 					struct bgp_dest *dest,
- 					struct bgp_path_info *old_local,
- 					struct bgp_path_info *new_select)
-@@ -1465,12 +1469,17 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
- 	    && !CHECK_FLAG(dest->flags, BGP_NODE_USER_CLEAR)
- 	    && !CHECK_FLAG(old_select->flags, BGP_PATH_ATTR_CHANGED)
- 	    && !bgp_addpath_is_addpath_used(&bgp->tx_addpath, afi, safi)) {
--		if (bgp_zebra_has_route_changed(old_select))
--			ret = evpn_zebra_install(
--				bgp, vpn,
--				(const struct prefix_evpn *)bgp_dest_get_prefix(
--					dest),
--				old_select);
-+		if (bgp_zebra_has_route_changed(old_select)) {
-+			if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS))
-+				evpn_zebra_install(
-+					bgp, vpn,
-+					(const struct prefix_evpn *)
-+						bgp_dest_get_prefix(dest),
-+					old_select);
-+			else
-+				bgp_zebra_route_install(dest, old_select, bgp,
-+							true, vpn, false);
-+		}
- 		UNSET_FLAG(old_select->flags, BGP_PATH_MULTIPATH_CHG);
- 		UNSET_FLAG(old_select->flags, BGP_PATH_LINK_BW_CHG);
- 		bgp_zebra_clear_route_change_flags(dest);
-@@ -1502,10 +1511,14 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
- 	if (new_select && new_select->type == ZEBRA_ROUTE_BGP
- 	    && (new_select->sub_type == BGP_ROUTE_IMPORTED ||
- 			bgp_evpn_attr_is_sync(new_select->attr))) {
--		ret = evpn_zebra_install(
--			bgp, vpn,
--			(struct prefix_evpn *)bgp_dest_get_prefix(dest),
--			new_select);
-+		if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS))
-+			evpn_zebra_install(bgp, vpn,
-+					   (const struct prefix_evpn *)
-+						   bgp_dest_get_prefix(dest),
-+					   new_select);
-+		else
-+			bgp_zebra_route_install(dest, new_select, bgp, true,
-+						vpn, false);
-
- 		/* If an old best existed and it was a "local" route, the only
- 		 * reason
-@@ -1522,13 +1535,20 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
- 			evpn_delete_old_local_route(bgp, vpn, dest,
- 					old_select, new_select);
- 	} else {
--		if (old_select && old_select->type == ZEBRA_ROUTE_BGP
--		    && old_select->sub_type == BGP_ROUTE_IMPORTED)
--			ret = evpn_zebra_uninstall(
--				bgp, vpn,
--				(const struct prefix_evpn *)bgp_dest_get_prefix(
--					dest),
--				old_select, false);
-+		if (old_select && old_select->type == ZEBRA_ROUTE_BGP &&
-+		    old_select->sub_type == BGP_ROUTE_IMPORTED) {
-+			if (CHECK_FLAG(bgp->flags,
-+				       BGP_FLAG_DELETE_IN_PROGRESS) ||
-+			    CHECK_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN))
-+				evpn_zebra_uninstall(
-+					bgp, vpn,
-+					(const struct prefix_evpn *)
-+						bgp_dest_get_prefix(dest),
-+					old_select, false);
-+			else
-+				bgp_zebra_route_install(dest, old_select, bgp,
-+							false, vpn, false);
-+		}
- 	}
-
- 	/* Clear any route change flags. */
-@@ -1541,7 +1561,7 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
- 	return ret;
- }
-
--static struct bgp_path_info *bgp_evpn_route_get_local_path(
-+struct bgp_path_info *bgp_evpn_route_get_local_path(
- 		struct bgp *bgp, struct bgp_dest *dest)
- {
- 	struct bgp_path_info *tmp_pi;
-@@ -1558,7 +1578,7 @@ static struct bgp_path_info *bgp_evpn_route_get_local_path(
- 	return local_pi;
- }
-
--static int update_evpn_type5_route_entry(struct bgp *bgp_evpn,
-+int update_evpn_type5_route_entry(struct bgp *bgp_evpn,
- 					 struct bgp *bgp_vrf, afi_t afi,
- 					 safi_t safi, struct bgp_dest *dest,
- 					 struct attr *attr, int *route_changed)
-@@ -1627,7 +1647,7 @@ static int update_evpn_type5_route_entry(struct bgp *bgp_evpn,
- }
-
- /* update evpn type-5 route entry */
--static int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp,
-+int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp,
- 				   struct attr *src_attr, afi_t src_afi,
- 				   safi_t src_safi)
- {
-@@ -1732,7 +1752,7 @@ static int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp,
- 	return 0;
- }
-
--static void bgp_evpn_get_sync_info(struct bgp *bgp, esi_t *esi,
-+void bgp_evpn_get_sync_info(struct bgp *bgp, esi_t *esi,
- 				   struct bgp_dest *dest, uint32_t loc_seq,
- 				   uint32_t *max_sync_seq, bool *active_on_peer,
- 				   bool *peer_router, bool *proxy_from_peer,
-@@ -1809,7 +1829,7 @@ static void bgp_evpn_get_sync_info(struct bgp *bgp, esi_t *esi,
-  * Note: The local path can only exist as a best path in the
-  * VPN route table. It will take precedence over all sync paths.
-  */
--static void update_evpn_route_entry_sync_info(struct bgp *bgp,
-+void update_evpn_route_entry_sync_info(struct bgp *bgp,
- 					      struct bgp_dest *dest,
- 					      struct attr *attr,
- 					      uint32_t loc_seq, bool setup_sync,
-@@ -1879,7 +1899,7 @@ static void update_evpn_route_entry_sync_info(struct bgp *bgp,
-  * Create or update EVPN route entry. This could be in the VNI route tables
-  * or the global route table.
-  */
--static int update_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
-+int update_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
- 				   afi_t afi, safi_t safi,
- 				   struct bgp_dest *dest, struct attr *attr,
- 				   const struct ethaddr *mac,
-@@ -2044,7 +2064,7 @@ static int update_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
- 	return route_change;
- }
-
--static void evpn_zebra_reinstall_best_route(struct bgp *bgp,
-+void evpn_zebra_reinstall_best_route(struct bgp *bgp,
- 					    struct bgpevpn *vpn,
- 					    struct bgp_dest *dest)
- {
-@@ -2062,9 +2082,19 @@ static void evpn_zebra_reinstall_best_route(struct bgp *bgp,
- 	if (curr_select && curr_select->type == ZEBRA_ROUTE_BGP
- 			&& (curr_select->sub_type == BGP_ROUTE_IMPORTED ||
- 				bgp_evpn_attr_is_sync(curr_select->attr)))
--		evpn_zebra_install(bgp, vpn,
--		   (const struct prefix_evpn *)bgp_dest_get_prefix(dest),
--		   curr_select);
-+		if (curr_select && curr_select->type == ZEBRA_ROUTE_BGP &&
-+		    (curr_select->sub_type == BGP_ROUTE_IMPORTED ||
-+		     bgp_evpn_attr_is_sync(curr_select->attr))) {
-+			if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS))
-+				evpn_zebra_install(
-+					bgp, vpn,
-+					(const struct prefix_evpn *)
-+						bgp_dest_get_prefix(dest),
-+					curr_select);
-+			else
-+				bgp_zebra_route_install(dest, curr_select, bgp,
-+							true, vpn, false);
-+		}
- }
-
- /*
-@@ -2081,7 +2111,7 @@ static void evpn_zebra_reinstall_best_route(struct bgp *bgp,
-  * additional handling to prevent bgp from injecting and holding on to a
-  * non-best local path.
-  */
--static struct bgp_dest *
-+struct bgp_dest *
- evpn_cleanup_local_non_best_route(struct bgp *bgp, struct bgpevpn *vpn,
- 				  struct bgp_dest *dest,
- 				  struct bgp_path_info *local_pi)
-@@ -2099,7 +2129,7 @@ evpn_cleanup_local_non_best_route(struct bgp *bgp, struct bgpevpn *vpn,
- 	return bgp_path_info_reap(dest, local_pi);
- }
-
--static inline bool bgp_evpn_route_add_l3_ecomm_ok(struct bgpevpn *vpn,
-+inline bool bgp_evpn_route_add_l3_ecomm_ok(struct bgpevpn *vpn,
- 						  const struct prefix_evpn *p,
- 						  esi_t *esi)
- {
-@@ -2116,7 +2146,7 @@ static inline bool bgp_evpn_route_add_l3_ecomm_ok(struct bgpevpn *vpn,
-  * Create or update EVPN route (of type based on prefix) for specified VNI
-  * and schedule for processing.
-  */
--static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
-+int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
- 			     struct prefix_evpn *p, uint8_t flags,
- 			     uint32_t seq, esi_t *esi)
- {
-@@ -2245,8 +2275,16 @@ static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
- 			 * has been removed.
- 			 */
- 			new_is_sync = bgp_evpn_attr_is_sync(pi->attr);
--			if (!new_is_sync && old_is_sync)
--				evpn_zebra_uninstall(bgp, vpn, p, pi, true);
-+			if (!new_is_sync && old_is_sync) {
-+				if (CHECK_FLAG(bgp->flags,
-+					       BGP_FLAG_DELETE_IN_PROGRESS))
-+					evpn_zebra_uninstall(bgp, vpn, p, pi,
-+							     true);
-+				else
-+					bgp_zebra_route_install(dest, pi, bgp,
-+								false, vpn,
-+								true);
-+			}
- 		}
- 	}
- 	bgp_path_info_unlock(pi);
-@@ -2308,7 +2346,7 @@ void delete_evpn_route_entry(struct bgp *bgp, afi_t afi, safi_t safi,
- }
-
- /* Delete EVPN type5 route */
--static int delete_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp)
-+int delete_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp)
- {
- 	afi_t afi = AFI_L2VPN;
- 	safi_t safi = SAFI_EVPN;
-@@ -2339,7 +2377,7 @@ static int delete_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp)
-  * Delete EVPN route (of type based on prefix) for specified VNI and
-  * schedule for processing.
-  */
--static int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
-+int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
- 			     struct prefix_evpn *p)
- {
- 	struct bgp_dest *dest, *global_dest;
-@@ -2408,6 +2446,7 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
- 	int route_change;
- 	bool old_is_sync = false;
- 	struct ecommunity *macvrf_soo = NULL;
-+	struct prefix_evpn p;
-
- 	if (CHECK_FLAG(local_pi->flags, BGP_PATH_REMOVED))
- 		return;
-@@ -2512,8 +2551,16 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
- 			 * has been removed.
- 			 */
- 			new_is_sync = bgp_evpn_attr_is_sync(pi->attr);
--			if (!new_is_sync && old_is_sync)
--				evpn_zebra_uninstall(bgp, vpn, &evp, pi, true);
-+			if (!new_is_sync && old_is_sync) {
-+				if (CHECK_FLAG(bgp->flags,
-+					       BGP_FLAG_DELETE_IN_PROGRESS))
-+					evpn_zebra_uninstall(bgp, vpn, &p, pi,
-+							     true);
-+				else
-+					bgp_zebra_route_install(dest, pi, bgp,
-+								false, vpn,
-+								true);
-+			}
- 		}
- 	}
-
-@@ -2541,7 +2588,7 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
- 	aspath_unintern(&attr.aspath);
- }
-
--static void update_type2_route(struct bgp *bgp, struct bgpevpn *vpn,
-+void update_type2_route(struct bgp *bgp, struct bgpevpn *vpn,
- 			       struct bgp_dest *dest)
- {
- 	struct bgp_path_info *tmp_pi;
-@@ -2571,7 +2618,7 @@ static void update_type2_route(struct bgp *bgp, struct bgpevpn *vpn,
-  * Update all type-2 (MACIP) local routes for this VNI - these should also
-  * be scheduled for advertise to peers.
-  */
--static void update_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
-+void update_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	struct bgp_dest *dest;
-
-@@ -2592,7 +2639,7 @@ static void update_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
-  * Delete all type-2 (MACIP) local routes for this VNI - only from the
-  * global routing table. These are also scheduled for withdraw from peers.
-  */
--static void delete_global_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
-+void delete_global_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	afi_t afi;
- 	safi_t safi;
-@@ -2626,7 +2673,7 @@ static void delete_global_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
- 	}
- }
-
--static struct bgp_dest *delete_vni_type2_route(struct bgp *bgp,
-+struct bgp_dest *delete_vni_type2_route(struct bgp *bgp,
- 					       struct bgp_dest *dest)
- {
- 	struct bgp_path_info *pi;
-@@ -2648,7 +2695,7 @@ static struct bgp_dest *delete_vni_type2_route(struct bgp *bgp,
- 	return dest;
- }
-
--static void delete_vni_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
-+void delete_vni_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	struct bgp_dest *dest;
-
-@@ -2672,7 +2719,7 @@ static void delete_vni_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
-  * Delete all type-2 (MACIP) local routes for this VNI - from the global
-  * table as well as the per-VNI route table.
-  */
--static void delete_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
-+void delete_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	/* First, walk the global route table for this VNI's type-2 local
- 	 * routes.
-@@ -2685,7 +2732,7 @@ static void delete_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
- /*
-  * Delete all routes in the per-VNI route table.
-  */
--static void delete_all_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
-+void delete_all_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	struct bgp_dest *dest;
- 	struct bgp_path_info *pi, *nextpi;
-@@ -2716,7 +2763,7 @@ static void delete_all_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
- }
-
- /* BUM traffic flood mode per-l2-vni */
--static int bgp_evpn_vni_flood_mode_get(struct bgp *bgp,
-+int bgp_evpn_vni_flood_mode_get(struct bgp *bgp,
- 					struct bgpevpn *vpn)
- {
- 	/* if flooding has been globally disabled per-vni mode is
-@@ -2766,7 +2813,7 @@ int update_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
- /* Update Type-2/3 Routes for L2VNI.
-  * Called by hash_iterate()
-  */
--static void update_routes_for_vni_hash(struct hash_bucket *bucket,
-+void update_routes_for_vni_hash(struct hash_bucket *bucket,
- 				       struct bgp *bgp)
- {
- 	struct bgpevpn *vpn;
-@@ -2784,7 +2831,7 @@ static void update_routes_for_vni_hash(struct hash_bucket *bucket,
-  * the per-VNI table. Invoked upon the VNI being deleted or EVPN
-  * (advertise-all-vni) being disabled.
-  */
--static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
-+int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	int ret;
- 	struct prefix_evpn p;
-@@ -2795,7 +2842,22 @@ static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
- 	delete_all_type2_routes(bgp, vpn);
-
- 	build_evpn_type3_prefix(&p, vpn->originator_ip);
-+
-+	/*
-+	 * To handle the following scenario:
-+	 *  - Say, the new zebra announce fifo list has few vni Evpn prefixes
-+	 * yet to be sent to zebra.
-+	 *  - At this point if we have triggers like "no advertise-all-vni" or
-+	 *    "networking restart", where a vni is going down.
-+	 *
-+	 * Perform the below
-+	 *    1) send withdraw routes to zebra immediately in case it is
-+	 * installed. 2) before we blow up the vni table, we need to walk the
-+	 * list and pop all the dest whose za_vpn points to this vni.
-+	 */
-+	SET_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN);
- 	ret = delete_evpn_route(bgp, vpn, &p);
-+	UNSET_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN);
- 	if (ret)
- 		return ret;
-
-@@ -2809,7 +2871,7 @@ static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
-  * remove the type-3 route if any. A new type-3 route will be generated
-  * post tunnel_ip update if the new flood mode is head-end-replication.
-  */
--static int bgp_evpn_mcast_grp_change(struct bgp *bgp, struct bgpevpn *vpn,
-+int bgp_evpn_mcast_grp_change(struct bgp *bgp, struct bgpevpn *vpn,
- 		struct in_addr mcast_grp)
- {
- 	struct prefix_evpn p;
-@@ -2833,7 +2895,7 @@ static int bgp_evpn_mcast_grp_change(struct bgp *bgp, struct bgpevpn *vpn,
-  * Note: Route re-advertisement happens elsewhere after other processing
-  * other changes.
-  */
--static void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn,
-+void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn,
- 				    struct bgpevpn *vpn,
- 				    struct in_addr originator_ip)
- {
-@@ -2882,7 +2944,7 @@ static void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn,
- 	return;
- }
-
--static struct bgp_path_info *
-+struct bgp_path_info *
- bgp_create_evpn_bgp_path_info(struct bgp_path_info *parent_pi,
- 			      struct bgp_dest *dest, struct attr *attr)
- {
-@@ -2918,7 +2980,7 @@ bgp_create_evpn_bgp_path_info(struct bgp_path_info *parent_pi,
- /*
-  * Install route entry into the VRF routing table and invoke route selection.
-  */
--static int install_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
-+int install_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
- 					   const struct prefix_evpn *evp,
- 					   struct bgp_path_info *parent_pi)
- {
-@@ -3102,7 +3164,7 @@ static int install_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
- /*
-  * Common handling for vni route tables install/selection.
-  */
--static int install_evpn_route_entry_in_vni_common(
-+int install_evpn_route_entry_in_vni_common(
- 	struct bgp *bgp, struct bgpevpn *vpn, const struct prefix_evpn *p,
- 	struct bgp_dest *dest, struct bgp_path_info *parent_pi)
- {
-@@ -3202,7 +3264,7 @@ static int install_evpn_route_entry_in_vni_common(
- /*
-  * Common handling for vni route tables uninstall/selection.
-  */
--static int uninstall_evpn_route_entry_in_vni_common(
-+int uninstall_evpn_route_entry_in_vni_common(
- 	struct bgp *bgp, struct bgpevpn *vpn, const struct prefix_evpn *p,
- 	struct bgp_dest *dest, struct bgp_path_info *parent_pi)
- {
-@@ -3243,7 +3305,7 @@ static int uninstall_evpn_route_entry_in_vni_common(
- /*
-  * Install route entry into VNI IP table and invoke route selection.
-  */
--static int install_evpn_route_entry_in_vni_ip(struct bgp *bgp,
-+int install_evpn_route_entry_in_vni_ip(struct bgp *bgp,
- 					      struct bgpevpn *vpn,
- 					      const struct prefix_evpn *p,
- 					      struct bgp_path_info *parent_pi)
-@@ -3270,7 +3332,7 @@ static int install_evpn_route_entry_in_vni_ip(struct bgp *bgp,
- /*
-  * Install route entry into VNI MAC table and invoke route selection.
-  */
--static int install_evpn_route_entry_in_vni_mac(struct bgp *bgp,
-+int install_evpn_route_entry_in_vni_mac(struct bgp *bgp,
- 					       struct bgpevpn *vpn,
- 					       const struct prefix_evpn *p,
- 					       struct bgp_path_info *parent_pi)
-@@ -3296,7 +3358,7 @@ static int install_evpn_route_entry_in_vni_mac(struct bgp *bgp,
- /*
-  * Uninstall route entry from VNI IP table and invoke route selection.
-  */
--static int uninstall_evpn_route_entry_in_vni_ip(struct bgp *bgp,
-+int uninstall_evpn_route_entry_in_vni_ip(struct bgp *bgp,
- 						struct bgpevpn *vpn,
- 						const struct prefix_evpn *p,
- 						struct bgp_path_info *parent_pi)
-@@ -3325,7 +3387,7 @@ static int uninstall_evpn_route_entry_in_vni_ip(struct bgp *bgp,
- /*
-  * Uninstall route entry from VNI IP table and invoke route selection.
-  */
--static int
-+int
- uninstall_evpn_route_entry_in_vni_mac(struct bgp *bgp, struct bgpevpn *vpn,
- 				      const struct prefix_evpn *p,
- 				      struct bgp_path_info *parent_pi)
-@@ -3353,7 +3415,7 @@ uninstall_evpn_route_entry_in_vni_mac(struct bgp *bgp, struct bgpevpn *vpn,
-  * Uninstall route entry from the VRF routing table and send message
-  * to zebra, if appropriate.
-  */
--static int uninstall_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
-+int uninstall_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
- 					     const struct prefix_evpn *evp,
- 					     struct bgp_path_info *parent_pi)
- {
-@@ -3445,7 +3507,7 @@ static int uninstall_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
- /*
-  * Install route entry into the VNI routing tables.
-  */
--static int install_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
-+int install_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
- 				    const struct prefix_evpn *p,
- 				    struct bgp_path_info *parent_pi)
- {
-@@ -3484,7 +3546,7 @@ static int install_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
- /*
-  * Uninstall route entry from the VNI routing tables.
-  */
--static int uninstall_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
-+int uninstall_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
- 				      const struct prefix_evpn *p,
- 				      struct bgp_path_info *parent_pi)
- {
-@@ -3524,7 +3586,7 @@ static int uninstall_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
-  * Given a route entry and a VRF, see if this route entry should be
-  * imported into the VRF i.e., RTs match + Site-of-Origin check passes.
-  */
--static int is_route_matching_for_vrf(struct bgp *bgp_vrf,
-+int is_route_matching_for_vrf(struct bgp *bgp_vrf,
- 				     struct bgp_path_info *pi)
- {
- 	struct attr *attr = pi->attr;
-@@ -3591,7 +3653,7 @@ static int is_route_matching_for_vrf(struct bgp *bgp_vrf,
-  * Given a route entry and a VNI, see if this route entry should be
-  * imported into the VNI i.e., RTs match.
-  */
--static int is_route_matching_for_vni(struct bgp *bgp, struct bgpevpn *vpn,
-+int is_route_matching_for_vni(struct bgp *bgp, struct bgpevpn *vpn,
- 				     struct bgp_path_info *pi)
- {
- 	struct attr *attr = pi->attr;
-@@ -3654,7 +3716,7 @@ static int is_route_matching_for_vni(struct bgp *bgp, struct bgpevpn *vpn,
- 	return 0;
- }
-
--static bool bgp_evpn_route_matches_macvrf_soo(struct bgp_path_info *pi,
-+bool bgp_evpn_route_matches_macvrf_soo(struct bgp_path_info *pi,
- 					      const struct prefix_evpn *evp)
- {
- 	struct bgp *bgp_evpn = bgp_get_evpn();
-@@ -3693,7 +3755,7 @@ static bool bgp_evpn_route_matches_macvrf_soo(struct bgp_path_info *pi,
-  * macthes with bgp instance router mac. It avoid installing
-  * route into bgp vrf table and remote rmac in bridge table.
-  */
--static int bgp_evpn_route_rmac_self_check(struct bgp *bgp_vrf,
-+int bgp_evpn_route_rmac_self_check(struct bgp *bgp_vrf,
- 					  const struct prefix_evpn *evp,
- 					  struct bgp_path_info *pi)
- {
-@@ -3722,7 +3784,7 @@ static int bgp_evpn_route_rmac_self_check(struct bgp *bgp_vrf,
- }
-
- /* don't import hosts that are locally attached */
--static inline bool
-+inline bool
- bgp_evpn_skip_vrf_import_of_local_es(struct bgp *bgp_vrf,
- 				     const struct prefix_evpn *evp,
- 				     struct bgp_path_info *pi, int install)
-@@ -3799,7 +3861,7 @@ int bgp_evpn_route_entry_install_if_vrf_match(struct bgp *bgp_vrf,
-  * Install or uninstall mac-ip routes are appropriate for this
-  * particular VRF.
-  */
--static int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install)
-+int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install)
- {
- 	afi_t afi;
- 	safi_t safi;
-@@ -3862,7 +3924,7 @@ static int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install)
-  * Install or uninstall routes of specified type that are appropriate for this
-  * particular VNI.
-  */
--static int install_uninstall_routes_for_vni(struct bgp *bgp,
-+int install_uninstall_routes_for_vni(struct bgp *bgp,
- 					    struct bgpevpn *vpn,
- 					    bgp_evpn_route_type rtype,
- 					    int install)
-@@ -3948,7 +4010,7 @@ static int install_uninstall_routes_for_vni(struct bgp *bgp,
- /* Install any existing remote routes applicable for this VRF into VRF RIB. This
-  * is invoked upon l3vni-add or l3vni import rt change
-  */
--static int install_routes_for_vrf(struct bgp *bgp_vrf)
-+int install_routes_for_vrf(struct bgp *bgp_vrf)
- {
- 	install_uninstall_routes_for_vrf(bgp_vrf, 1);
- 	return 0;
-@@ -3959,7 +4021,7 @@ static int install_routes_for_vrf(struct bgp *bgp_vrf)
-  * routing table. This is invoked when a VNI becomes "live" or its Import
-  * RT is changed.
-  */
--static int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
-+int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	int ret;
-
-@@ -3981,7 +4043,7 @@ static int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
- }
-
- /* uninstall routes from l3vni vrf. */
--static int uninstall_routes_for_vrf(struct bgp *bgp_vrf)
-+int uninstall_routes_for_vrf(struct bgp *bgp_vrf)
- {
- 	install_uninstall_routes_for_vrf(bgp_vrf, 0);
- 	return 0;
-@@ -3991,7 +4053,7 @@ static int uninstall_routes_for_vrf(struct bgp *bgp_vrf)
-  * Uninstall any existing remote routes for this VNI. One scenario in which
-  * this is invoked is upon an import RT change.
-  */
--static int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
-+int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	int ret;
-
-@@ -4017,7 +4079,7 @@ static int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
- /*
-  * Install or uninstall route in matching VRFs (list).
-  */
--static int install_uninstall_route_in_vrfs(struct bgp *bgp_def, afi_t afi,
-+int install_uninstall_route_in_vrfs(struct bgp *bgp_def, afi_t afi,
- 					   safi_t safi, struct prefix_evpn *evp,
- 					   struct bgp_path_info *pi,
- 					   struct list *vrfs, int install)
-@@ -4066,7 +4128,7 @@ static int install_uninstall_route_in_vrfs(struct bgp *bgp_def, afi_t afi,
- /*
-  * Install or uninstall route in matching VNIs (list).
-  */
--static int install_uninstall_route_in_vnis(struct bgp *bgp, afi_t afi,
-+int install_uninstall_route_in_vnis(struct bgp *bgp, afi_t afi,
- 					   safi_t safi, struct prefix_evpn *evp,
- 					   struct bgp_path_info *pi,
- 					   struct list *vnis, int install)
-@@ -4103,7 +4165,7 @@ static int install_uninstall_route_in_vnis(struct bgp *bgp, afi_t afi,
- /*
-  * Install or uninstall route for appropriate VNIs/ESIs.
-  */
--static int bgp_evpn_install_uninstall_table(struct bgp *bgp, afi_t afi,
-+int bgp_evpn_install_uninstall_table(struct bgp *bgp, afi_t afi,
- 					    safi_t safi, const struct prefix *p,
- 					    struct bgp_path_info *pi,
- 					    int import, bool in_vni_rt,
-@@ -4246,7 +4308,7 @@ static int bgp_evpn_install_uninstall_table(struct bgp *bgp, afi_t afi,
- /*
-  * Install or uninstall route for appropriate VNIs/ESIs.
-  */
--static int install_uninstall_evpn_route(struct bgp *bgp, afi_t afi, safi_t safi,
-+int install_uninstall_evpn_route(struct bgp *bgp, afi_t afi, safi_t safi,
- 					const struct prefix *p,
- 					struct bgp_path_info *pi, int import)
- {
-@@ -4270,7 +4332,7 @@ void bgp_evpn_import_type2_route(struct bgp_path_info *pi, int import)
-  * delete and withdraw all ipv4 and ipv6 routes in the vrf table as type-5
-  * routes
-  */
--static void delete_withdraw_vrf_routes(struct bgp *bgp_vrf)
-+void delete_withdraw_vrf_routes(struct bgp *bgp_vrf)
- {
- 	/* Delete ipv4 default route and withdraw from peers */
- 	if (evpn_default_originate_set(bgp_vrf, AFI_IP, SAFI_UNICAST))
-@@ -4329,7 +4391,7 @@ void update_advertise_vrf_routes(struct bgp *bgp_vrf)
-  * done in the global route table using the routes which already exist in the
-  * VRF routing table
-  */
--static void update_router_id_vrf(struct bgp *bgp_vrf)
-+void update_router_id_vrf(struct bgp *bgp_vrf)
- {
- 	/* skip if the RD is configured */
- 	if (is_vrf_rd_configured(bgp_vrf))
-@@ -4347,7 +4409,7 @@ static void update_router_id_vrf(struct bgp *bgp_vrf)
-  * This is invoked upon VRF RD change. The processing is done only from global
-  * table.
-  */
--static void withdraw_router_id_vrf(struct bgp *bgp_vrf)
-+void withdraw_router_id_vrf(struct bgp *bgp_vrf)
- {
- 	/* skip if the RD is configured */
- 	if (is_vrf_rd_configured(bgp_vrf))
-@@ -4357,7 +4419,7 @@ static void withdraw_router_id_vrf(struct bgp *bgp_vrf)
- 	delete_withdraw_vrf_routes(bgp_vrf);
- }
-
--static void update_advertise_vni_route(struct bgp *bgp, struct bgpevpn *vpn,
-+void update_advertise_vni_route(struct bgp *bgp, struct bgpevpn *vpn,
- 				       struct bgp_dest *dest)
- {
- 	struct bgp_dest *global_dest;
-@@ -4440,7 +4502,7 @@ static void update_advertise_vni_route(struct bgp *bgp, struct bgpevpn *vpn,
-  * change. Note that the processing is done only on the global route table
-  * using routes that already exist in the per-VNI table.
-  */
--static void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
-+void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	struct prefix_evpn p;
- 	struct bgp_dest *dest, *global_dest;
-@@ -4501,7 +4563,7 @@ static void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
-  * Delete (and withdraw) local routes for a VNI - only from the global
-  * table. Invoked upon router-id change.
-  */
--static int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
-+int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	struct prefix_evpn p;
- 	struct bgp_dest *global_dest;
-@@ -4541,7 +4603,7 @@ static int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
-  * router-id. The routes in the per-VNI table are used to create routes in
-  * the global table and schedule them.
-  */
--static void update_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
-+void update_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
- {
- 	struct bgpevpn *vpn = (struct bgpevpn *)bucket->data;
-
-@@ -4559,7 +4621,7 @@ static void update_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
-  * the router-id and is done only on the global route table, the routes
-  * are needed in the per-VNI table to re-advertise with new router id.
-  */
--static void withdraw_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
-+void withdraw_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
- {
- 	struct bgpevpn *vpn = (struct bgpevpn *)bucket->data;
-
-@@ -4574,7 +4636,7 @@ static void withdraw_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
-  * Create RT-3 for a VNI and schedule for processing and advertisement.
-  * This is invoked upon flooding mode changing to head-end replication.
-  */
--static void create_advertise_type3(struct hash_bucket *bucket, void *data)
-+void create_advertise_type3(struct hash_bucket *bucket, void *data)
- {
- 	struct bgpevpn *vpn = bucket->data;
- 	struct bgp *bgp = data;
-@@ -4595,7 +4657,7 @@ static void create_advertise_type3(struct hash_bucket *bucket, void *data)
-  * Delete RT-3 for a VNI and schedule for processing and withdrawal.
-  * This is invoked upon flooding mode changing to drop BUM packets.
-  */
--static void delete_withdraw_type3(struct hash_bucket *bucket, void *data)
-+void delete_withdraw_type3(struct hash_bucket *bucket, void *data)
- {
- 	struct bgpevpn *vpn = bucket->data;
- 	struct bgp *bgp = data;
-@@ -4611,7 +4673,7 @@ static void delete_withdraw_type3(struct hash_bucket *bucket, void *data)
- /*
-  * Process received EVPN type-2 route (advertise or withdraw).
-  */
--static int process_type2_route(struct peer *peer, afi_t afi, safi_t safi,
-+int process_type2_route(struct peer *peer, afi_t afi, safi_t safi,
- 			       struct attr *attr, uint8_t *pfx, int psize,
- 			       uint32_t addpath_id)
- {
-@@ -4740,7 +4802,7 @@ done:
- /*
-  * Process received EVPN type-3 route (advertise or withdraw).
-  */
--static int process_type3_route(struct peer *peer, afi_t afi, safi_t safi,
-+int process_type3_route(struct peer *peer, afi_t afi, safi_t safi,
- 			       struct attr *attr, uint8_t *pfx, int psize,
- 			       uint32_t addpath_id)
- {
-@@ -4821,7 +4883,7 @@ static int process_type3_route(struct peer *peer, afi_t afi, safi_t safi,
- /*
-  * Process received EVPN type-5 route (advertise or withdraw).
-  */
--static int process_type5_route(struct peer *peer, afi_t afi, safi_t safi,
-+int process_type5_route(struct peer *peer, afi_t afi, safi_t safi,
- 			       struct attr *attr, uint8_t *pfx, int psize,
- 			       uint32_t addpath_id)
- {
-@@ -4963,7 +5025,7 @@ static int process_type5_route(struct peer *peer, afi_t afi, safi_t safi,
- 	return 0;
- }
-
--static void evpn_mpattr_encode_type5(struct stream *s, const struct prefix *p,
-+void evpn_mpattr_encode_type5(struct stream *s, const struct prefix *p,
- 				     const struct prefix_rd *prd,
- 				     mpls_label_t *label, uint32_t num_labels,
- 				     struct attr *attr)
-@@ -5022,7 +5084,7 @@ static void evpn_mpattr_encode_type5(struct stream *s, const struct prefix *p,
- /*
-  * Cleanup specific VNI upon EVPN (advertise-all-vni) being disabled.
-  */
--static void cleanup_vni_on_disable(struct hash_bucket *bucket, struct bgp *bgp)
-+void cleanup_vni_on_disable(struct hash_bucket *bucket, struct bgp *bgp)
- {
- 	struct bgpevpn *vpn = (struct bgpevpn *)bucket->data;
-
-@@ -5038,7 +5100,7 @@ static void cleanup_vni_on_disable(struct hash_bucket *bucket, struct bgp *bgp)
- /*
-  * Free a VNI entry; iterator function called during cleanup.
-  */
--static void free_vni_entry(struct hash_bucket *bucket, struct bgp *bgp)
-+void free_vni_entry(struct hash_bucket *bucket, struct bgp *bgp)
- {
- 	struct bgpevpn *vpn = (struct bgpevpn *)bucket->data;
-
-@@ -5049,7 +5111,7 @@ static void free_vni_entry(struct hash_bucket *bucket, struct bgp *bgp)
- /*
-  * Derive AUTO import RT for BGP VRF - L3VNI
-  */
--static void evpn_auto_rt_import_add_for_vrf(struct bgp *bgp_vrf)
-+void evpn_auto_rt_import_add_for_vrf(struct bgp *bgp_vrf)
- {
- 	struct bgp *bgp_evpn = NULL;
-
-@@ -5067,7 +5129,7 @@ static void evpn_auto_rt_import_add_for_vrf(struct bgp *bgp_vrf)
- /*
-  * Delete AUTO import RT from BGP VRF - L3VNI
-  */
--static void evpn_auto_rt_import_delete_for_vrf(struct bgp *bgp_vrf)
-+void evpn_auto_rt_import_delete_for_vrf(struct bgp *bgp_vrf)
- {
- 	evpn_rt_delete_auto(bgp_vrf, bgp_vrf->l3vni, bgp_vrf->vrf_import_rtl,
- 			    true);
-@@ -5076,7 +5138,7 @@ static void evpn_auto_rt_import_delete_for_vrf(struct bgp *bgp_vrf)
- /*
-  * Derive AUTO export RT for BGP VRF - L3VNI
-  */
--static void evpn_auto_rt_export_add_for_vrf(struct bgp *bgp_vrf)
-+void evpn_auto_rt_export_add_for_vrf(struct bgp *bgp_vrf)
- {
- 	form_auto_rt(bgp_vrf, bgp_vrf->l3vni, bgp_vrf->vrf_export_rtl, true);
- }
-@@ -5084,13 +5146,13 @@ static void evpn_auto_rt_export_add_for_vrf(struct bgp *bgp_vrf)
- /*
-  * Delete AUTO export RT from BGP VRF - L3VNI
-  */
--static void evpn_auto_rt_export_delete_for_vrf(struct bgp *bgp_vrf)
-+void evpn_auto_rt_export_delete_for_vrf(struct bgp *bgp_vrf)
- {
- 	evpn_rt_delete_auto(bgp_vrf, bgp_vrf->l3vni, bgp_vrf->vrf_export_rtl,
- 			    true);
- }
-
--static void bgp_evpn_handle_export_rt_change_for_vrf(struct bgp *bgp_vrf)
-+void bgp_evpn_handle_export_rt_change_for_vrf(struct bgp *bgp_vrf)
- {
- 	struct bgp *bgp_evpn = NULL;
- 	struct listnode *node = NULL;
-@@ -5111,7 +5173,7 @@ static void bgp_evpn_handle_export_rt_change_for_vrf(struct bgp *bgp_vrf)
- /*
-  * Handle autort change for a given VNI.
-  */
--static void update_autort_vni(struct hash_bucket *bucket, struct bgp *bgp)
-+void update_autort_vni(struct hash_bucket *bucket, struct bgp *bgp)
- {
- 	struct bgpevpn *vpn = bucket->data;
-
-@@ -5135,7 +5197,7 @@ static void update_autort_vni(struct hash_bucket *bucket, struct bgp *bgp)
- /*
-  * Handle autort change for L3VNI.
-  */
--static void update_autort_l3vni(struct bgp *bgp)
-+void update_autort_l3vni(struct bgp *bgp)
- {
- 	if ((CHECK_FLAG(bgp->vrf_flags, BGP_VRF_IMPORT_RT_CFGD))
- 	    && (CHECK_FLAG(bgp->vrf_flags, BGP_VRF_EXPORT_RT_CFGD)))
-@@ -5330,7 +5392,7 @@ void bgp_evpn_advertise_type5_routes(struct bgp *bgp_vrf, afi_t afi,
- 	}
- }
-
--static void rt_list_remove_node(struct list *rt_list,
-+void rt_list_remove_node(struct list *rt_list,
- 				struct ecommunity *ecomdel, bool is_l3)
- {
- 	struct listnode *node = NULL, *nnode = NULL, *node_to_del = NULL;
-@@ -5379,7 +5441,7 @@ void evpn_rt_delete_auto(struct bgp *bgp, vni_t vni, struct list *rtl,
- 	ecommunity_free(&ecom_auto);
- }
-
--static void evpn_vrf_rt_routes_map(struct bgp *bgp_vrf)
-+void evpn_vrf_rt_routes_map(struct bgp *bgp_vrf)
- {
- 	/* map VRFs to its RTs and install routes matching this new RT */
- 	if (is_l3vni_live(bgp_vrf)) {
-@@ -5388,7 +5450,7 @@ static void evpn_vrf_rt_routes_map(struct bgp *bgp_vrf)
- 	}
- }
-
--static void evpn_vrf_rt_routes_unmap(struct bgp *bgp_vrf)
-+void evpn_vrf_rt_routes_unmap(struct bgp *bgp_vrf)
- {
- 	/* uninstall routes from vrf */
- 	if (is_l3vni_live(bgp_vrf))
-@@ -5398,7 +5460,7 @@ static void evpn_vrf_rt_routes_unmap(struct bgp *bgp_vrf)
- 	bgp_evpn_unmap_vrf_from_its_rts(bgp_vrf);
- }
-
--static bool rt_list_has_cfgd_rt(struct list *rt_list)
-+bool rt_list_has_cfgd_rt(struct list *rt_list)
- {
- 	struct listnode *node = NULL, *nnode = NULL;
- 	struct vrf_route_target *l3rt = NULL;
-@@ -5411,7 +5473,7 @@ static bool rt_list_has_cfgd_rt(struct list *rt_list)
- 	return false;
- }
-
--static void unconfigure_import_rt_for_vrf_fini(struct bgp *bgp_vrf)
-+void unconfigure_import_rt_for_vrf_fini(struct bgp *bgp_vrf)
- {
- 	if (!bgp_vrf->vrf_import_rtl)
- 		return; /* this should never fail */
-@@ -5424,7 +5486,7 @@ static void unconfigure_import_rt_for_vrf_fini(struct bgp *bgp_vrf)
- 		evpn_auto_rt_import_add_for_vrf(bgp_vrf);
- }
-
--static void unconfigure_export_rt_for_vrf_fini(struct bgp *bgp_vrf)
-+void unconfigure_export_rt_for_vrf_fini(struct bgp *bgp_vrf)
- {
-
- 	if (!bgp_vrf->vrf_export_rtl)
-@@ -6262,6 +6324,16 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni,
-  */
- void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
- {
-+	struct bgp_dest *dest = NULL;
-+
-+	while (zebra_announce_count(&bm->zebra_announce_head)) {
-+		dest = zebra_announce_pop(&bm->zebra_announce_head);
-+		if (dest->za_vpn == vpn) {
-+			bgp_path_info_unlock(dest->za_bgp_pi);
-+			bgp_dest_unlock_node(dest);
-+		} else
-+			zebra_announce_add_tail(&bm->zebra_announce_head, dest);
-+	}
- 	bgp_evpn_remote_ip_hash_destroy(vpn);
- 	bgp_evpn_vni_es_cleanup(vpn);
- 	bgpevpn_unlink_from_l3vni(vpn);
-@@ -6279,7 +6351,7 @@ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
- 	XFREE(MTYPE_BGP_EVPN, vpn);
- }
-
--static void hash_evpn_free(struct bgpevpn *vpn)
-+void hash_evpn_free(struct bgpevpn *vpn)
- {
- 	XFREE(MTYPE_BGP_EVPN, vpn);
- }
-@@ -6646,7 +6718,7 @@ int bgp_evpn_local_macip_add(struct bgp *bgp, vni_t vni, struct ethaddr *mac,
- 	return 0;
- }
-
--static void link_l2vni_hash_to_l3vni(struct hash_bucket *bucket,
-+void link_l2vni_hash_to_l3vni(struct hash_bucket *bucket,
- 				     struct bgp *bgp_vrf)
- {
- 	struct bgpevpn *vpn = (struct bgpevpn *)bucket->data;
-@@ -7265,7 +7337,7 @@ bool bgp_evpn_is_prefix_nht_supported(const struct prefix *pfx)
- 	return false;
- }
-
--static void *bgp_evpn_remote_ip_hash_alloc(void *p)
-+void *bgp_evpn_remote_ip_hash_alloc(void *p)
- {
- 	const struct evpn_remote_ip *key = (const struct evpn_remote_ip *)p;
- 	struct evpn_remote_ip *ip;
-@@ -7277,7 +7349,7 @@ static void *bgp_evpn_remote_ip_hash_alloc(void *p)
- 	return ip;
- }
-
--static unsigned int bgp_evpn_remote_ip_hash_key_make(const void *p)
-+unsigned int  bgp_evpn_remote_ip_hash_key_make(const void *p)
- {
- 	const struct evpn_remote_ip *ip = p;
- 	const struct ipaddr *addr = &ip->addr;
-@@ -7289,7 +7361,7 @@ static unsigned int bgp_evpn_remote_ip_hash_key_make(const void *p)
- 		      array_size(addr->ipaddr_v6.s6_addr32), 0);
- }
-
--static bool bgp_evpn_remote_ip_hash_cmp(const void *p1, const void *p2)
-+bool bgp_evpn_remote_ip_hash_cmp(const void *p1, const void *p2)
- {
- 	const struct evpn_remote_ip *ip1 = p1;
- 	const struct evpn_remote_ip *ip2 = p2;
-@@ -7297,7 +7369,7 @@ static bool bgp_evpn_remote_ip_hash_cmp(const void *p1, const void *p2)
- 	return !ipaddr_cmp(&ip1->addr, &ip2->addr);
- }
-
--static void bgp_evpn_remote_ip_hash_init(struct bgpevpn *vpn)
-+void bgp_evpn_remote_ip_hash_init(struct bgpevpn *vpn)
- {
- 	if (!evpn_resolve_overlay_index())
- 		return;
-@@ -7307,7 +7379,7 @@ static void bgp_evpn_remote_ip_hash_init(struct bgpevpn *vpn)
- 					  "BGP EVPN remote IP hash");
- }
-
--static void bgp_evpn_remote_ip_hash_free(struct hash_bucket *bucket, void *args)
-+void bgp_evpn_remote_ip_hash_free(struct hash_bucket *bucket, void *args)
- {
- 	struct evpn_remote_ip *ip = (struct evpn_remote_ip *)bucket->data;
- 	struct bgpevpn *vpn = (struct bgpevpn *)args;
-@@ -7320,7 +7392,7 @@ static void bgp_evpn_remote_ip_hash_free(struct hash_bucket *bucket, void *args)
- 	XFREE(MTYPE_EVPN_REMOTE_IP, ip);
- }
-
--static void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *vpn)
-+void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *vpn)
- {
- 	if (!evpn_resolve_overlay_index() || vpn->remote_ip_hash == NULL)
- 		return;
-@@ -7334,7 +7406,7 @@ static void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *vpn)
- }
-
- /* Add a remote MAC/IP route to hash table */
--static void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn,
-+void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn,
- 					struct bgp_path_info *pi)
- {
- 	struct evpn_remote_ip tmp;
-@@ -7371,7 +7443,7 @@ static void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn,
- }
-
- /* Delete a remote MAC/IP route from hash table */
--static void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn,
-+void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn,
- 					struct bgp_path_info *pi)
- {
- 	struct evpn_remote_ip tmp;
-@@ -7403,7 +7475,7 @@ static void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn,
- 	}
- }
-
--static void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn,
-+void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn,
- 					    void (*func)(struct hash_bucket *,
- 							 void *),
- 					    void *arg)
-@@ -7414,7 +7486,7 @@ static void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn,
- 	hash_iterate(vpn->remote_ip_hash, func, arg);
- }
-
--static void show_remote_ip_entry(struct hash_bucket *bucket, void *args)
-+void show_remote_ip_entry(struct hash_bucket *bucket, void *args)
- {
- 	char buf[INET6_ADDRSTRLEN];
- 	struct listnode *node = NULL;
-@@ -7442,7 +7514,7 @@ void bgp_evpn_show_remote_ip_hash(struct hash_bucket *bucket, void *args)
- 	vty_out(vty, "\n");
- }
-
--static void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket,
-+void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket,
- 						 void *args)
- {
- 	struct evpn_remote_ip *ip = (struct evpn_remote_ip *)bucket->data;
-@@ -7451,7 +7523,7 @@ static void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket,
- 	bgp_evpn_remote_ip_process_nexthops(vpn, &ip->addr, true);
- }
-
--static void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket,
-+void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket,
- 						   void *args)
- {
- 	struct evpn_remote_ip *ip = (struct evpn_remote_ip *)bucket->data;
-@@ -7460,14 +7532,14 @@ static void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket,
- 	bgp_evpn_remote_ip_process_nexthops(vpn, &ip->addr, false);
- }
-
--static unsigned int vni_svi_hash_key_make(const void *p)
-+unsigned int  vni_svi_hash_key_make(const void *p)
- {
- 	const struct bgpevpn *vpn = p;
-
- 	return jhash_1word(vpn->svi_ifindex, 0);
- }
-
--static bool vni_svi_hash_cmp(const void *p1, const void *p2)
-+bool vni_svi_hash_cmp(const void *p1, const void *p2)
- {
- 	const struct bgpevpn *vpn1 = p1;
- 	const struct bgpevpn *vpn2 = p2;
-@@ -7475,7 +7547,7 @@ static bool vni_svi_hash_cmp(const void *p1, const void *p2)
- 	return (vpn1->svi_ifindex == vpn2->svi_ifindex);
- }
-
--static struct bgpevpn *bgp_evpn_vni_svi_hash_lookup(struct bgp *bgp,
-+struct bgpevpn *bgp_evpn_vni_svi_hash_lookup(struct bgp *bgp,
- 						    ifindex_t svi)
- {
- 	struct bgpevpn *vpn;
-@@ -7487,7 +7559,7 @@ static struct bgpevpn *bgp_evpn_vni_svi_hash_lookup(struct bgp *bgp,
- 	return vpn;
- }
-
--static void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn)
-+void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	if (vpn->svi_ifindex == 0)
- 		return;
-@@ -7495,7 +7567,7 @@ static void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn)
- 	(void)hash_get(bgp->vni_svi_hash, vpn, hash_alloc_intern);
- }
-
--static void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp,
-+void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp,
- 					      struct bgpevpn *vpn)
- {
- 	if (vpn->svi_ifindex == 0)
-@@ -7572,7 +7644,7 @@ bool bgp_evpn_is_gateway_ip_resolved(struct bgp_nexthop_cache *bnc)
- }
-
- /* Resolve/Unresolve nexthops when a MAC/IP route is added/deleted */
--static void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn,
-+void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn,
- 						struct ipaddr *addr,
- 						bool resolve)
- {
-@@ -7695,7 +7767,7 @@ vni_t bgp_evpn_path_info_get_l3vni(const struct bgp_path_info *pi)
- /*
-  * Returns true if the l3vni of any of this path doesn't match vrf's l3vni.
-  */
--static bool bgp_evpn_path_is_dvni(const struct bgp *bgp_vrf,
-+bool bgp_evpn_path_is_dvni(const struct bgp *bgp_vrf,
- 				  const struct bgp_path_info *pi)
- {
- 	vni_t vni = 0;
-@@ -7781,4 +7853,5 @@ void bgp_aggr_supp_withdraw_from_evpn(struct bgp *bgp, afi_t afi, safi_t safi)
- 			}
- 		}
- 	}
--}
-+	return;
-+}
-\ No newline at end of file
-diff --git a/bgpd/bgp_evpn.h b/bgpd/bgp_evpn.h
-index c641a64f6..db05293a4 100644
---- a/bgpd/bgp_evpn.h
-+++ b/bgpd/bgp_evpn.h
-@@ -176,6 +176,14 @@ bgp_evpn_handle_resolve_overlay_index_set(struct hash_bucket *bucket,
- extern void
- bgp_evpn_handle_resolve_overlay_index_unset(struct hash_bucket *bucket,
- 					    void *arg);
-+extern enum zclient_send_status evpn_zebra_install(struct bgp *bgp,
-+					   struct bgpevpn *vpn,
-+					   const struct prefix_evpn *p,
-+					   struct bgp_path_info *pi);
-+extern enum zclient_send_status
-+evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
-+		     const struct prefix_evpn *p, struct bgp_path_info *pi,
-+		     bool is_sync);
- extern mpls_label_t *bgp_evpn_path_info_labels_get_l3vni(mpls_label_t *labels,
- 							 uint32_t num_labels);
- extern vni_t bgp_evpn_path_info_get_l3vni(const struct bgp_path_info *pi);
-diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c
-index d88c52d1f..f36d109b6 100644
---- a/bgpd/bgp_evpn_mh.c
-+++ b/bgpd/bgp_evpn_mh.c
-@@ -49,8 +49,8 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
- 						     struct bgp_evpn_es *es,
- 						     struct in_addr vtep_ip,
- 						     bool esr, uint8_t df_alg,
--						     uint16_t df_pref);
--static void bgp_evpn_es_vtep_del(struct bgp *bgp,
-+						     uint16_t df_pref, int *zret);
-+static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp,
- 		struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr);
- static void bgp_evpn_es_cons_checks_pend_add(struct bgp_evpn_es *es);
- static void bgp_evpn_es_cons_checks_pend_del(struct bgp_evpn_es *es);
-@@ -94,6 +94,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
- 					    struct bgp_dest *dest)
- {
- 	int ret = 0;
-+	int zret = 0;
- 	afi_t afi = AFI_L2VPN;
- 	safi_t safi = SAFI_EVPN;
- 	struct bgp_path_info *old_select; /* old best */
-@@ -120,7 +121,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
- 			bgp_evpn_es_vtep_add(bgp, es, old_select->attr->nexthop,
- 					     true /*esr*/,
- 					     old_select->attr->df_alg,
--					     old_select->attr->df_pref);
-+					     old_select->attr->df_pref, &zret);
- 		}
- 		UNSET_FLAG(old_select->flags, BGP_PATH_MULTIPATH_CHG);
- 		bgp_zebra_clear_route_change_flags(dest);
-@@ -149,7 +150,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
- 			&& new_select->sub_type == BGP_ROUTE_IMPORTED) {
- 		bgp_evpn_es_vtep_add(bgp, es, new_select->attr->nexthop,
- 				     true /*esr */, new_select->attr->df_alg,
--				     new_select->attr->df_pref);
-+				     new_select->attr->df_pref, &zret);
- 	} else {
- 		if (old_select && old_select->type == ZEBRA_ROUTE_BGP
- 				&& old_select->sub_type == BGP_ROUTE_IMPORTED)
-@@ -1371,23 +1372,26 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_find(struct bgp_evpn_es *es,
- }
-
- /* Send the remote ES to zebra for NHG programming */
--static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp,
-+static enum zclient_send_status bgp_zebra_send_remote_es_vtep(struct bgp *bgp,
- 		struct bgp_evpn_es_vtep *es_vtep, bool add)
- {
- 	struct bgp_evpn_es *es = es_vtep->es;
- 	struct stream *s;
- 	uint32_t flags = 0;
-
--	/* Check socket. */
--	if (!zclient || zclient->sock < 0)
--		return 0;
-+	if (!zclient || zclient->sock < 0) {
-+		if (BGP_DEBUG(zebra, ZEBRA))
-+			zlog_debug("%s: No zclient or zclient->sock exists",
-+				   __func__);
-+		return ZCLIENT_SEND_SUCCESS;
-+	}
-
- 	/* Don't try to register if Zebra doesn't know of this instance. */
- 	if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) {
- 		if (BGP_DEBUG(zebra, ZEBRA))
- 			zlog_debug("No zebra instance, not installing remote es %s",
- 					es->esi_str);
--		return 0;
-+		return ZCLIENT_SEND_SUCCESS;
- 	}
-
- 	if (es_vtep->flags & BGP_EVPNES_VTEP_ESR)
-@@ -1418,12 +1422,13 @@ static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp,
- 	return zclient_send_message(zclient);
- }
-
--static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
-+static enum zclient_send_status bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
- 					    struct bgp_evpn_es_vtep *es_vtep,
- 					    bool param_change)
- {
- 	bool old_active;
- 	bool new_active;
-+	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
-
- 	old_active = CHECK_FLAG(es_vtep->flags, BGP_EVPNES_VTEP_ACTIVE);
- 	/* currently we need an active EVI reference to use the VTEP as
-@@ -1445,7 +1450,7 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
- 				   es_vtep->df_alg, es_vtep->df_pref);
-
- 		/* send remote ES to zebra */
--		bgp_zebra_send_remote_es_vtep(bgp, es_vtep, new_active);
-+		ret = bgp_zebra_send_remote_es_vtep(bgp, es_vtep, new_active);
-
- 		/* The NHG is updated first for efficient failover handling.
- 		 * Note the NHG can be de-activated while there are bgp
-@@ -1457,13 +1462,14 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
- 		/* queue up the es for background consistency checks */
- 		bgp_evpn_es_cons_checks_pend_add(es_vtep->es);
- 	}
-+	return ret;
- }
-
- static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
- 						     struct bgp_evpn_es *es,
- 						     struct in_addr vtep_ip,
- 						     bool esr, uint8_t df_alg,
--						     uint16_t df_pref)
-+						     uint16_t df_pref, int *zret)
- {
- 	struct bgp_evpn_es_vtep *es_vtep;
- 	bool param_change = false;
-@@ -1490,15 +1496,16 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
- 		++es_vtep->evi_cnt;
- 	}
-
--	bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
-+	*zret = bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
-
- 	return es_vtep;
- }
-
--static void bgp_evpn_es_vtep_do_del(struct bgp *bgp,
-+static enum zclient_send_status bgp_evpn_es_vtep_do_del(struct bgp *bgp,
- 		struct bgp_evpn_es_vtep *es_vtep, bool esr)
- {
- 	bool param_change = false;
-+	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
-
- 	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
- 		zlog_debug("es %s vtep %pI4 del %s", es_vtep->es->esi_str,
-@@ -1515,18 +1522,21 @@ static void bgp_evpn_es_vtep_do_del(struct bgp *bgp,
- 			--es_vtep->evi_cnt;
- 	}
-
--	bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
-+	ret = bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
- 	bgp_evpn_es_vtep_free(es_vtep);
-+	return ret;
- }
-
--static void bgp_evpn_es_vtep_del(struct bgp *bgp,
-+static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp,
- 		struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr)
- {
- 	struct bgp_evpn_es_vtep *es_vtep;
-+	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
-
- 	es_vtep = bgp_evpn_es_vtep_find(es, vtep_ip);
- 	if (es_vtep)
--		bgp_evpn_es_vtep_do_del(bgp, es_vtep, esr);
-+		ret = bgp_evpn_es_vtep_do_del(bgp, es_vtep, esr);
-+	return ret;
- }
-
- /********************** ES MAC-IP paths *************************************
-@@ -3399,12 +3409,13 @@ static struct bgp_evpn_es_evi_vtep *bgp_evpn_es_evi_vtep_find(
- /* A VTEP can be added as "active" attach to an ES if EAD-per-ES and
-  * EAD-per-EVI routes are rxed from it.
-  */
--static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
-+static enum zclient_send_status bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
- 		struct bgp_evpn_es_evi_vtep *evi_vtep)
- {
- 	bool old_active;
- 	bool new_active;
- 	uint32_t ead_activity_flags;
-+	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
-
- 	old_active = CHECK_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_ACTIVE);
-
-@@ -3425,7 +3436,7 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
- 	new_active = CHECK_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_ACTIVE);
-
- 	if (old_active == new_active)
--		return;
-+		return ret;
-
- 	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
- 		zlog_debug("es %s evi %u vtep %pI4 %s",
-@@ -3437,19 +3448,20 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
- 	if (new_active)
- 		evi_vtep->es_vtep = bgp_evpn_es_vtep_add(
- 			bgp, evi_vtep->es_evi->es, evi_vtep->vtep_ip,
--			false /*esr*/, 0, 0);
-+			false /*esr*/, 0, 0, &ret);
- 	else {
- 		if (evi_vtep->es_vtep) {
--			bgp_evpn_es_vtep_do_del(bgp, evi_vtep->es_vtep,
-+			ret = bgp_evpn_es_vtep_do_del(bgp, evi_vtep->es_vtep,
- 					false /*esr*/);
- 			evi_vtep->es_vtep = NULL;
- 		}
- 	}
- 	/* queue up the parent es for background consistency checks */
- 	bgp_evpn_es_cons_checks_pend_add(evi_vtep->es_evi->es);
-+	return ret;
- }
-
--static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp,
-+static enum zclient_send_status bgp_evpn_es_evi_vtep_add(struct bgp *bgp,
- 		struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip,
- 		bool ead_es)
- {
-@@ -3475,18 +3487,19 @@ static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp,
- 	else
- 		SET_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_EAD_PER_EVI);
-
--	bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
-+	return bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
- }
-
--static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp,
-+static enum zclient_send_status bgp_evpn_es_evi_vtep_del(struct bgp *bgp,
- 		struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip,
- 		bool ead_es)
- {
- 	struct bgp_evpn_es_evi_vtep *evi_vtep;
-+	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
-
- 	evi_vtep = bgp_evpn_es_evi_vtep_find(es_evi, vtep_ip);
- 	if (!evi_vtep)
--		return;
-+		return ret;
-
- 	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
- 		zlog_debug("del es %s evi %u vtep %pI4 %s",
-@@ -3503,8 +3516,9 @@ static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp,
- 	else
- 		UNSET_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_EAD_PER_EVI);
-
--	bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
-+	ret = bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
- 	bgp_evpn_es_evi_vtep_free(evi_vtep);
-+	return ret;
- }
-
- /* compare ES-IDs for the ES-EVI RB tree maintained per-VNI */
-@@ -3780,7 +3794,7 @@ int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni)
- /* Add remote ES-EVI entry. This is actually the remote VTEP add and the
-  * ES-EVI is implicity created on first VTEP's reference.
-  */
--int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
-+enum zclient_send_status bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
- 		const struct prefix_evpn *p)
- {
- 	char buf[ESI_STR_LEN];
-@@ -3788,10 +3802,11 @@ int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
- 	struct bgp_evpn_es_evi *es_evi;
- 	bool ead_es;
- 	const esi_t *esi = &p->prefix.ead_addr.esi;
-+	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
-
- 	if (!vpn)
- 		/* local EAD-ES need not be sent back to zebra */
--		return 0;
-+		return ret;
-
- 	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
- 		zlog_debug("add remote %s es %s evi %u vtep %pI4",
-@@ -3808,27 +3823,28 @@ int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
- 		es_evi = bgp_evpn_es_evi_new(es, vpn);
-
- 	ead_es = !!p->prefix.ead_addr.eth_tag;
--	bgp_evpn_es_evi_vtep_add(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4,
-+	ret = bgp_evpn_es_evi_vtep_add(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4,
- 			ead_es);
-
- 	bgp_evpn_es_evi_remote_info_re_eval(es_evi);
--	return 0;
-+	return ret;
- }
-
- /* A remote VTEP has withdrawn. The es-evi-vtep will be deleted and the
-  * parent es-evi freed up implicitly in last VTEP's deref.
-  */
--int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
-+enum zclient_send_status bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
- 		const struct prefix_evpn *p)
- {
- 	char buf[ESI_STR_LEN];
- 	struct bgp_evpn_es *es;
- 	struct bgp_evpn_es_evi *es_evi;
- 	bool ead_es;
-+	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
-
- 	if (!vpn)
- 		/* local EAD-ES need not be sent back to zebra */
--		return 0;
-+		return ret;
-
- 	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
- 		zlog_debug(
-@@ -3847,7 +3863,7 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
- 				esi_to_str(&p->prefix.ead_addr.esi, buf,
- 					   sizeof(buf)),
- 				vpn->vni, &p->prefix.ead_addr.ip.ipaddr_v4);
--		return 0;
-+		return ret;
- 	}
- 	es_evi = bgp_evpn_es_evi_find(es, vpn);
- 	if (!es_evi) {
-@@ -3860,14 +3876,14 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
- 					   sizeof(buf)),
- 				vpn->vni,
- 				&p->prefix.ead_addr.ip.ipaddr_v4);
--		return 0;
-+		return ret;
- 	}
-
- 	ead_es = !!p->prefix.ead_addr.eth_tag;
--	bgp_evpn_es_evi_vtep_del(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4,
-+	ret = bgp_evpn_es_evi_vtep_del(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4,
- 			ead_es);
- 	bgp_evpn_es_evi_remote_info_re_eval(es_evi);
--	return 0;
-+	return ret;
- }
-
- /* If a VNI is being deleted we need to force del all remote VTEPs */
-diff --git a/bgpd/bgp_evpn_mh.h b/bgpd/bgp_evpn_mh.h
-index cebabb9fd..5d393c37a 100644
---- a/bgpd/bgp_evpn_mh.h
-+++ b/bgpd/bgp_evpn_mh.h
-@@ -418,10 +418,12 @@ extern int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi,
- extern int bgp_evpn_local_es_del(struct bgp *bgp, esi_t *esi);
- extern int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni);
- extern int bgp_evpn_local_es_evi_del(struct bgp *bgp, esi_t *esi, vni_t vni);
--extern int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
--		const struct prefix_evpn *p);
--extern int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
--		const struct prefix_evpn *p);
-+extern enum zclient_send_status
-+bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
-+			   const struct prefix_evpn *p);
-+extern enum zclient_send_status
-+bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
-+			   const struct prefix_evpn *p);
- extern void bgp_evpn_mh_init(void);
- extern void bgp_evpn_mh_finish(void);
- void bgp_evpn_vni_es_init(struct bgpevpn *vpn);
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index e45d4b1ff..3dff073a3 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -3420,7 +3420,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 						   == BGP_ROUTE_IMPORTED))
-
- 					bgp_zebra_route_install(dest, old_select,
--							   bgp, true);
-+							   bgp, true, NULL, false);
- 			}
- 		}
-
-@@ -3529,9 +3529,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 			 */
- 			if (old_select &&
- 			    is_route_parent_evpn(old_select))
--				bgp_zebra_route_install(dest, old_select, bgp, false);
-+				bgp_zebra_route_install(dest, old_select, bgp, false, NULL, false);
-
--			bgp_zebra_route_install(dest, new_select, bgp, true);
-+			bgp_zebra_route_install(dest, new_select, bgp, true, NULL, false);
- 		} else {
- 			/* Withdraw the route from the kernel. */
- 			if (old_select && old_select->type == ZEBRA_ROUTE_BGP
-@@ -3539,7 +3539,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 				|| old_select->sub_type == BGP_ROUTE_AGGREGATE
- 				|| old_select->sub_type == BGP_ROUTE_IMPORTED))
-
--				bgp_zebra_route_install(dest, old_select, bgp, false);
-+				bgp_zebra_route_install(dest, old_select, bgp, false, NULL, false);
- 		}
- 	}
-
-@@ -4444,7 +4444,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
- 	if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) {
- 		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
- 			/* remove from RIB previous entry */
--			bgp_zebra_route_install(dest, pi, bgp, false);
-+			bgp_zebra_route_install(dest, pi, bgp, false, NULL, false);
- 	}
-
- 	if (peer->sort == BGP_PEER_EBGP) {
-diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h
-index 67431ea4f..1550d00ad 100644
---- a/bgpd/bgp_table.h
-+++ b/bgpd/bgp_table.h
-@@ -75,10 +75,10 @@ struct bgp_dest {
- 	struct bgp_dest *pdest;
-
- 	STAILQ_ENTRY(bgp_dest) pq;
--	struct bgp_path_info *za_bgp_pi;
--
- 	struct zebra_announce_item zai;
--
-+	struct bgp_path_info *za_bgp_pi;
-+	struct bgpevpn *za_vpn;
-+	bool za_is_sync;
- 	uint64_t version;
-
- 	mpls_label_t local_label;
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index 064f23350..cab758fca 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -1674,7 +1674,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
- 			     && (pi->sub_type == BGP_ROUTE_NORMAL
- 				 || pi->sub_type == BGP_ROUTE_IMPORTED)))
-
--				bgp_zebra_route_install(dest, pi, bgp, true);
-+				bgp_zebra_route_install(dest, pi, bgp, true, NULL, false);
- }
-
- /* Announce routes of any bgp subtype of a table to zebra */
-@@ -1696,7 +1696,7 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
- 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next)
- 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) &&
- 			    pi->type == ZEBRA_ROUTE_BGP)
--				bgp_zebra_route_install(dest, pi, bgp, true);
-+				bgp_zebra_route_install(dest, pi, bgp, true, NULL, false);
- }
-
-
-@@ -1749,6 +1749,7 @@ enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest,
- #define ZEBRA_ANNOUNCEMENTS_LIMIT 1000
- static void bgp_handle_route_announcements_to_zebra(struct thread *e)
- {
-+	bool is_evpn = false;
- 	uint32_t count = 0;
- 	struct bgp_dest *dest = NULL;
- 	struct bgp_table *table = NULL;
-@@ -1764,6 +1765,9 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
- 		table = bgp_dest_table(dest);
- 		install =
- 			CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
-+		if (table && table->afi == AFI_L2VPN &&
-+		    table->safi == SAFI_EVPN)
-+			is_evpn = true;
-
- 		if (BGP_DEBUG(zebra, ZEBRA))
- 			zlog_debug(
-@@ -1772,17 +1776,32 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
- 				table->bgp->name_pretty, dest, dest->flags);
-
- 		if (install) {
--			status = bgp_zebra_announce_actual(
--				dest, dest->za_bgp_pi, table->bgp);
-+			if (is_evpn)
-+				status = evpn_zebra_install(
-+					table->bgp, dest->za_vpn,
-+					(const struct prefix_evpn *)
-+						bgp_dest_get_prefix(dest),
-+					dest->za_bgp_pi);
-+			else
-+				status = bgp_zebra_announce_actual(
-+					dest, dest->za_bgp_pi, table->bgp);
- 			UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
- 		} else {
--			status = bgp_zebra_withdraw_actual(
--				dest, dest->za_bgp_pi, table->bgp);
-+			if (is_evpn)
-+				status = evpn_zebra_uninstall(
-+					table->bgp, dest->za_vpn,
-+					(const struct prefix_evpn *)
-+						bgp_dest_get_prefix(dest),
-+					dest->za_bgp_pi, false);
-+			else
-+				status = bgp_zebra_withdraw_actual(
-+					dest, dest->za_bgp_pi, table->bgp);
- 			UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
- 		}
-
- 		bgp_path_info_unlock(dest->za_bgp_pi);
- 		dest->za_bgp_pi = NULL;
-+		dest->za_vpn = NULL;
- 		bgp_dest_unlock_node(dest);
-
- 		if (status == ZCLIENT_SEND_BUFFERED)
-@@ -1836,8 +1855,14 @@ static void bgp_zebra_buffer_write_ready(void)
-  *                                     withdrawn.
-  */
- void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
--			     struct bgp *bgp, bool install)
-+			     struct bgp *bgp, bool install, struct bgpevpn *vpn, bool is_sync)
- {
-+	bool is_evpn = false;
-+	struct bgp_table *table = NULL;
-+
-+	table = bgp_dest_table(dest);
-+	if (table && table->afi == AFI_L2VPN && table->safi == SAFI_EVPN)
-+		is_evpn = true;
- 	/*
- 	 * BGP is installing this route and bgp has been configured
- 	 * to suppress announcements until the route has been installed
-@@ -1847,7 +1872,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
- 		if (BGP_SUPPRESS_FIB_ENABLED(bgp))
- 			SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
-
--		if (bgp->main_zebra_update_hold)
-+		if (bgp->main_zebra_update_hold && !is_evpn)
- 			return;
- 	} else {
- 		UNSET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
-@@ -1857,7 +1882,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
- 	 * Don't try to install if we're not connected to Zebra or Zebra doesn't
- 	 * know of this instance.
- 	 */
--	if (!bgp_install_info_to_zebra(bgp))
-+	if (!bgp_install_info_to_zebra(bgp) && !is_evpn)
- 		return;
-
- 	if (!CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL) &&
-@@ -1878,7 +1903,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
- 		dest->za_bgp_pi = info;
- 	} else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) {
- 		assert(dest->za_bgp_pi);
--		if (install)
-+		if (install & !is_evpn)
- 			bgp_zebra_withdraw_actual(dest, dest->za_bgp_pi, bgp);
-
- 		bgp_path_info_unlock(dest->za_bgp_pi);
-@@ -1886,6 +1911,11 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
- 		dest->za_bgp_pi = info;
- 	}
-
-+	if (is_evpn) {
-+		dest->za_vpn = vpn;
-+		dest->za_is_sync = is_sync;
-+	}
-+
- 	if (install) {
- 		UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
- 		SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
-@@ -1916,7 +1946,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
- 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
- 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)
- 			    && (pi->type == ZEBRA_ROUTE_BGP))
--				bgp_zebra_route_install(dest, pi, bgp, false);
-+				bgp_zebra_route_install(dest, pi, bgp, false, NULL, false);
- 		}
- 	}
- }
-diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
-index 83197c28e..92971b51f 100644
---- a/bgpd/bgp_zebra.h
-+++ b/bgpd/bgp_zebra.h
-@@ -30,7 +30,7 @@ extern int bgp_zebra_get_table_range(struct zclient *zc, uint32_t chunk_size,
- extern int bgp_if_update_all(void);
- extern void bgp_zebra_route_install(struct bgp_dest *dest,
- 				    struct bgp_path_info *path, struct bgp *bgp,
--				    bool install);
-+				    bool install, struct bgpevpn *vpn, bool is_sync);
-
- extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi);
- extern enum zclient_send_status
-diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
-index a088a2e11..214a2f9b0 100644
---- a/bgpd/bgpd.h
-+++ b/bgpd/bgpd.h
-@@ -529,6 +529,7 @@ struct bgp {
- #define BGP_FLAG_LU_IPV6_EXPLICIT_NULL (1ULL << 34)
- #define BGP_FLAG_SOFT_VERSION_CAPABILITY (1ULL << 35)
- #define BGP_FLAG_ENFORCE_FIRST_AS (1ULL << 36)
-+#define BGP_FLAG_VNI_DOWN (1ULL << 38)
-
- 	/* BGP default address-families.
- 	 * New peers inherit enabled afi/safis from bgp instance.
---
-2.39.4
-
diff --git a/src/sonic-frr/patch/0035-lib-Add-support-for-stream-buffer-to-expand.patch b/src/sonic-frr/patch/0035-lib-Add-support-for-stream-buffer-to-expand.patch
new file mode 100644
index 00000000000..fb7521eead3
--- /dev/null
+++ b/src/sonic-frr/patch/0035-lib-Add-support-for-stream-buffer-to-expand.patch
@@ -0,0 +1,333 @@
+From 4259835e9c6133deda41bdd5ac434dded1ad5f3d Mon Sep 17 00:00:00 2001
+From: Soumya Roy <souroy@nvidia.com>
+Date: Fri, 14 Mar 2025 21:44:39 +0000
+Subject: [PATCH 35/56] lib: Add support for stream buffer to expand
+
+Issue:
+ Currently, during encode time, if required memory is
+ more than available space in stream buffer, stream buffer
+ can't be expanded. This fix introduces new apis to support
+ stream buffer expansion.
+
+ Testing:
+ Tested with zebra nexthop encoding with 512 nexthops, which triggers
+ this new code changes, it works fine. Without fix, for same trigger
+ it asserts.
+
+ Signed-off-by: Soumya Roy <souroy@nvidia.com>
+---
+ lib/stream.c | 142 ++++++++++++++++++++++++++++++++++++++++++---------
+ lib/stream.h |   4 +-
+ 2 files changed, 120 insertions(+), 26 deletions(-)
+
+diff --git a/lib/stream.c b/lib/stream.c
+index bb90f3b944..6ac51859d3 100644
+--- a/lib/stream.c
++++ b/lib/stream.c
+@@ -16,6 +16,11 @@
+ #include "frr_pthread.h"
+ #include "lib_errors.h"
+ 
++#define MIN_STREAM_EXPANSION_SZ 512
++
++/* Extra size  needed for a stream in bytes, given new write size */
++#define STREAM_EXPAND_SIZE(S, WSZ) ((WSZ)-STREAM_WRITEABLE(S))
++
+ DEFINE_MTYPE_STATIC(LIB, STREAM, "Stream");
+ DEFINE_MTYPE_STATIC(LIB, STREAM_FIFO, "Stream FIFO");
+ 
+@@ -92,11 +97,20 @@ struct stream *stream_new(size_t size)
+ 
+ 	assert(size > 0);
+ 
+-	s = XMALLOC(MTYPE_STREAM, sizeof(struct stream) + size);
++	s = XMALLOC(MTYPE_STREAM, sizeof(struct stream));
++	s->data = XMALLOC(MTYPE_STREAM, size);
+ 
+ 	s->getp = s->endp = 0;
+ 	s->next = NULL;
+ 	s->size = size;
++	s->allow_expansion = false;
++	return s;
++}
++
++struct stream *stream_new_expandable(size_t size)
++{
++	struct stream *s = stream_new(size);
++	s->allow_expansion = true;
+ 	return s;
+ }
+ 
+@@ -106,6 +120,7 @@ void stream_free(struct stream *s)
+ 	if (!s)
+ 		return;
+ 
++	XFREE(MTYPE_STREAM, s->data);
+ 	XFREE(MTYPE_STREAM, s);
+ }
+ 
+@@ -115,7 +130,7 @@ struct stream *stream_copy(struct stream *dest, const struct stream *src)
+ 
+ 	assert(dest != NULL);
+ 	assert(STREAM_SIZE(dest) >= src->endp);
+-
++	dest->allow_expansion = src->allow_expansion;
+ 	dest->endp = src->endp;
+ 	dest->getp = src->getp;
+ 
+@@ -131,7 +146,7 @@ struct stream *stream_dup(const struct stream *s)
+ 	STREAM_VERIFY_SANE(s);
+ 
+ 	snew = stream_new(s->endp);
+-
++	snew->allow_expansion = s->allow_expansion;
+ 	return (stream_copy(snew, s));
+ }
+ 
+@@ -143,9 +158,16 @@ struct stream *stream_dupcat(const struct stream *s1, const struct stream *s2,
+ 	STREAM_VERIFY_SANE(s1);
+ 	STREAM_VERIFY_SANE(s2);
+ 
++	if (offset > s1->endp) {
++		fprintf(stderr, "Error: Invalid offset %zu, exceeds s1->endp %zu\n", offset,
++			s1->endp);
++		return NULL;
++	}
++
+ 	if ((new = stream_new(s1->endp + s2->endp)) == NULL)
+ 		return NULL;
+ 
++	new->allow_expansion = s1->allow_expansion || s2->allow_expansion;
+ 	memcpy(new->data, s1->data, offset);
+ 	memcpy(new->data + offset, s2->data, s2->endp);
+ 	memcpy(new->data + offset + s2->endp, s1->data + offset,
+@@ -160,7 +182,7 @@ size_t stream_resize_inplace(struct stream **sptr, size_t newsize)
+ 
+ 	STREAM_VERIFY_SANE(orig);
+ 
+-	orig = XREALLOC(MTYPE_STREAM, orig, sizeof(struct stream) + newsize);
++	orig->data = XREALLOC(MTYPE_STREAM, orig->data, newsize);
+ 
+ 	orig->size = newsize;
+ 
+@@ -175,6 +197,29 @@ size_t stream_resize_inplace(struct stream **sptr, size_t newsize)
+ 	return orig->size;
+ }
+ 
++/* Helper function to expand stream if needed and allowed */
++static void stream_expand(struct stream *s, size_t expand_size)
++{
++	size_t new_size;
++	size_t actual_expand_size = expand_size;
++
++	/* Growth strategy:
++	 * For small expansions (<= min expansion bytes): grow by min size
++	 * otherwise grow by needed size
++	 */
++	if (actual_expand_size <= MIN_STREAM_EXPANSION_SZ) {
++		actual_expand_size = MIN_STREAM_EXPANSION_SZ;
++	}
++
++	/* Calculate new total size */
++	new_size = s->size + actual_expand_size;
++	/* Reallocate the data buffer */
++	s->data = XREALLOC(MTYPE_STREAM, s->data, new_size);
++
++	/* Update the stream's data size */
++	s->size = new_size;
++}
++
+ size_t stream_get_getp(const struct stream *s)
+ {
+ 	STREAM_VERIFY_SANE(s);
+@@ -691,8 +736,12 @@ void stream_put(struct stream *s, const void *src, size_t size)
+ 	STREAM_VERIFY_SANE(s);
+ 
+ 	if (STREAM_WRITEABLE(s) < size) {
+-		STREAM_BOUND_WARN(s, "put");
+-		return;
++		if (s->allow_expansion) {
++			stream_expand(s, STREAM_EXPAND_SIZE(s, size));
++		} else {
++			STREAM_BOUND_WARN(s, "put");
++			return;
++		}
+ 	}
+ 
+ 	if (src)
+@@ -709,8 +758,12 @@ int stream_putc(struct stream *s, uint8_t c)
+ 	STREAM_VERIFY_SANE(s);
+ 
+ 	if (STREAM_WRITEABLE(s) < sizeof(uint8_t)) {
+-		STREAM_BOUND_WARN(s, "put");
+-		return 0;
++		if (s->allow_expansion) {
++			stream_expand(s, STREAM_EXPAND_SIZE(s, sizeof(uint8_t)));
++		} else {
++			STREAM_BOUND_WARN(s, "put");
++			return 0;
++		}
+ 	}
+ 
+ 	s->data[s->endp++] = c;
+@@ -723,8 +776,12 @@ int stream_putw(struct stream *s, uint16_t w)
+ 	STREAM_VERIFY_SANE(s);
+ 
+ 	if (STREAM_WRITEABLE(s) < sizeof(uint16_t)) {
+-		STREAM_BOUND_WARN(s, "put");
+-		return 0;
++		if (s->allow_expansion) {
++			stream_expand(s, STREAM_EXPAND_SIZE(s, sizeof(uint16_t)));
++		} else {
++			STREAM_BOUND_WARN(s, "put");
++			return 0;
++		}
+ 	}
+ 
+ 	s->data[s->endp++] = (uint8_t)(w >> 8);
+@@ -739,8 +796,12 @@ int stream_put3(struct stream *s, uint32_t l)
+ 	STREAM_VERIFY_SANE(s);
+ 
+ 	if (STREAM_WRITEABLE(s) < 3) {
+-		STREAM_BOUND_WARN(s, "put");
+-		return 0;
++		if (s->allow_expansion) {
++			stream_expand(s, STREAM_EXPAND_SIZE(s, 3));
++		} else {
++			STREAM_BOUND_WARN(s, "put");
++			return 0;
++		}
+ 	}
+ 
+ 	s->data[s->endp++] = (uint8_t)(l >> 16);
+@@ -756,8 +817,12 @@ int stream_putl(struct stream *s, uint32_t l)
+ 	STREAM_VERIFY_SANE(s);
+ 
+ 	if (STREAM_WRITEABLE(s) < sizeof(uint32_t)) {
+-		STREAM_BOUND_WARN(s, "put");
+-		return 0;
++		if (s->allow_expansion) {
++			stream_expand(s, STREAM_EXPAND_SIZE(s, sizeof(uint32_t)));
++		} else {
++			STREAM_BOUND_WARN(s, "put");
++			return 0;
++		}
+ 	}
+ 
+ 	s->data[s->endp++] = (uint8_t)(l >> 24);
+@@ -774,8 +839,12 @@ int stream_putq(struct stream *s, uint64_t q)
+ 	STREAM_VERIFY_SANE(s);
+ 
+ 	if (STREAM_WRITEABLE(s) < sizeof(uint64_t)) {
+-		STREAM_BOUND_WARN(s, "put quad");
+-		return 0;
++		if (s->allow_expansion) {
++			stream_expand(s, STREAM_EXPAND_SIZE(s, sizeof(uint64_t)));
++		} else {
++			STREAM_BOUND_WARN(s, "put");
++			return 0;
++		}
+ 	}
+ 
+ 	s->data[s->endp++] = (uint8_t)(q >> 56);
+@@ -896,7 +965,13 @@ int stream_put_ipv4(struct stream *s, uint32_t l)
+ 	STREAM_VERIFY_SANE(s);
+ 
+ 	if (STREAM_WRITEABLE(s) < sizeof(uint32_t)) {
+-		STREAM_BOUND_WARN(s, "put");
++		if (s->allow_expansion) {
++			stream_expand(s, STREAM_EXPAND_SIZE(s, sizeof(uint32_t)));
++		} else {
++			STREAM_BOUND_WARN(s, "put");
++			return 0;
++		}
++
+ 		return 0;
+ 	}
+ 	memcpy(s->data + s->endp, &l, sizeof(uint32_t));
+@@ -911,8 +986,12 @@ int stream_put_in_addr(struct stream *s, const struct in_addr *addr)
+ 	STREAM_VERIFY_SANE(s);
+ 
+ 	if (STREAM_WRITEABLE(s) < sizeof(uint32_t)) {
+-		STREAM_BOUND_WARN(s, "put");
+-		return 0;
++		if (s->allow_expansion) {
++			stream_expand(s, STREAM_EXPAND_SIZE(s, sizeof(uint32_t)));
++		} else {
++			STREAM_BOUND_WARN(s, "put");
++			return 0;
++		}
+ 	}
+ 
+ 	memcpy(s->data + s->endp, addr, sizeof(uint32_t));
+@@ -989,8 +1068,13 @@ int stream_put_prefix_addpath(struct stream *s, const struct prefix *p,
+ 		psize_with_addpath = psize;
+ 
+ 	if (STREAM_WRITEABLE(s) < (psize_with_addpath + sizeof(uint8_t))) {
+-		STREAM_BOUND_WARN(s, "put");
+-		return 0;
++		if (s->allow_expansion) {
++			stream_expand(s,
++				      STREAM_EXPAND_SIZE(s, psize_with_addpath + sizeof(uint8_t)));
++		} else {
++			STREAM_BOUND_WARN(s, "put");
++			return 0;
++		}
+ 	}
+ 
+ 	if (addpath_capable) {
+@@ -1027,8 +1111,12 @@ int stream_put_labeled_prefix(struct stream *s, const struct prefix *p,
+ 	psize_with_addpath = psize + (addpath_capable ? 4 : 0);
+ 
+ 	if (STREAM_WRITEABLE(s) < (psize_with_addpath + 3)) {
+-		STREAM_BOUND_WARN(s, "put");
+-		return 0;
++		if (s->allow_expansion) {
++			stream_expand(s, STREAM_EXPAND_SIZE(s, psize_with_addpath + 3));
++		} else {
++			STREAM_BOUND_WARN(s, "put");
++			return 0;
++		}
+ 	}
+ 
+ 	if (addpath_capable) {
+@@ -1167,8 +1255,12 @@ size_t stream_write(struct stream *s, const void *ptr, size_t size)
+ 	STREAM_VERIFY_SANE(s);
+ 
+ 	if (STREAM_WRITEABLE(s) < size) {
+-		STREAM_BOUND_WARN(s, "put");
+-		return 0;
++		if (s->allow_expansion) {
++			stream_expand(s, STREAM_EXPAND_SIZE(s, size));
++		} else {
++			STREAM_BOUND_WARN(s, "put");
++			return 0;
++		}
+ 	}
+ 
+ 	memcpy(s->data + s->endp, ptr, size);
+diff --git a/lib/stream.h b/lib/stream.h
+index e48cedc613..437ba5aa74 100644
+--- a/lib/stream.h
++++ b/lib/stream.h
+@@ -95,7 +95,8 @@ struct stream {
+ 	size_t getp;	       /* next get position */
+ 	size_t endp;	       /* last valid data position */
+ 	size_t size;	       /* size of data segment */
+-	unsigned char data[];  /* data pointer */
++	bool allow_expansion;  /* whether stream can be expanded */
++	unsigned char *data;   /* data pointer */
+ };
+ 
+ /* First in first out queue structure. */
+@@ -132,6 +133,7 @@ struct stream_fifo {
+  * q: quad (four words)
+  */
+ extern struct stream *stream_new(size_t);
++extern struct stream *stream_new_expandable(size_t);
+ extern void stream_free(struct stream *);
+ /* Copy 'src' into 'dest', returns 'dest' */
+ extern struct stream *stream_copy(struct stream *dest,
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch b/src/sonic-frr/patch/0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch
deleted file mode 100644
index a3b1fa5fe0d..00000000000
--- a/src/sonic-frr/patch/0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From b6caf88bd3bce9673d49435453991c49712287aa Mon Sep 17 00:00:00 2001
-From: Rajasekar Raja <rajasekarr@nvidia.com>
-Date: Thu, 11 Apr 2024 22:27:37 -0700
-Subject: [PATCH 08/11] zebra: backpressure - Fix Null ptr access (Coverity
- Issue)
-
-Fix dereferencing NULL ptr making coverity happy.
-
-Ticket :#3390099
-
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index b81acaf8ec..524551b1e0 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -1809,8 +1809,7 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
- 		table = bgp_dest_table(dest);
- 		install =
- 			CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
--		if (table && table->afi == AFI_L2VPN &&
--		    table->safi == SAFI_EVPN)
-+		if (table->afi == AFI_L2VPN && table->safi == SAFI_EVPN)
- 			is_evpn = true;
- 
- 		if (BGP_DEBUG(zebra, ZEBRA))
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0036-zebra-zebra-crash-for-zapi-stream.patch b/src/sonic-frr/patch/0036-zebra-zebra-crash-for-zapi-stream.patch
new file mode 100644
index 00000000000..d8fbf0c671f
--- /dev/null
+++ b/src/sonic-frr/patch/0036-zebra-zebra-crash-for-zapi-stream.patch
@@ -0,0 +1,63 @@
+From 29d8cd97b40f3a142824bb593009ff97f5019b3d Mon Sep 17 00:00:00 2001
+From: Soumya Roy <souroy@nvidia.com>
+Date: Fri, 14 Mar 2025 21:56:48 +0000
+Subject: [PATCH 36/56] zebra: zebra crash for zapi stream
+
+Issue:
+If static route is created with a BGP route as nexthop, which
+recursively resolves over 512 ECMP v6 nexthops, zapi nexthop encode
+fails, as there is not enough memory allocated for stream. This causes
+assert/core dump in zebra. Right now we allocate fixed memory
+of ZEBRA_MAX_PACKET_SIZ size.
+
+Fix:
+1)Dynamically calculate required memory size for the stream
+2)try to optimize memory usage
+
+Testing:
+No crash happens anymore with the fix
+zebra: zebra crash for zapi stream
+
+Issue:
+If static route is created with a BGP route as nexthop, which
+recursively resolves over 512 ECMP v6 nexthops, zapi nexthop encode
+fails, as there is not enough memory allocated for stream. This causes
+assert/core dump in zebra. Right now we allocate fixed memory
+of ZEBRA_MAX_PACKET_SIZ size.
+
+Fix:
+1)Dynamically calculate required memory size for the stream
+2)try to optimize memory usage
+
+Testing:
+No crash happens anymore with the fix
+r1#
+r1# sharp install routes 2100:cafe:: nexthop 2001:db8::1 1000
+r1#
+
+r2# conf
+r2(config)# ipv6 route 2503:feca::100/128 2100:cafe::1
+r2(config)# exit
+r2#
+
+Signed-off-by: Soumya Roy <souroy@nvidia.com>
+---
+ zebra/zebra_rnh.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/zebra/zebra_rnh.c b/zebra/zebra_rnh.c
+index 640e6551a7..6b6be59c47 100644
+--- a/zebra/zebra_rnh.c
++++ b/zebra/zebra_rnh.c
+@@ -1150,7 +1150,7 @@ int zebra_send_rnh_update(struct rnh *rnh, struct zserv *client,
+ 	re = rnh->state;
+ 
+ 	/* Get output stream. */
+-	s = stream_new(ZEBRA_MAX_PACKET_SIZ);
++	s = stream_new_expandable(ZEBRA_MAX_PACKET_SIZ);
+ 
+ 	zclient_create_header(s, ZEBRA_NEXTHOP_UPDATE, vrf_id);
+ 
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch b/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch
deleted file mode 100644
index fa1a742b1a8..00000000000
--- a/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch
+++ /dev/null
@@ -1,113 +0,0 @@
-From 7166c2222cb82885510c3e8c7906c1d7de950f9b Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 11 Apr 2024 13:28:30 -0400
-Subject: [PATCH 09/11] bgpd: Increase install/uninstall speed of evpn vpn
- vni's
-
-BGP receives notification from zebra about an vpn that
-needs to be installed into the evpn tables.  Unfortunately
-this function was walking the entirety of evpn tables
-3 times.  Modify the code to walk the tree 1 time and
-to just look for the needed route types as you go.
-
-This reduces, in a scaled environment, processing
-time of the zclient_read function from 130 seconds
-to 95 seconds.  For a up / down / up interface
-scenario.
-
-Signed-off-by: Rajasekar Raja <rajasekarr@vndia.com>
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index 79e16d8f9..00a45a819 100644
---- a/bgpd/bgp_evpn.c
-+++ b/bgpd/bgp_evpn.c
-@@ -3926,7 +3926,6 @@ int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install)
-  */
- int install_uninstall_routes_for_vni(struct bgp *bgp,
- 					    struct bgpevpn *vpn,
--					    bgp_evpn_route_type rtype,
- 					    int install)
- {
- 	afi_t afi;
-@@ -3958,7 +3957,9 @@ int install_uninstall_routes_for_vni(struct bgp *bgp,
- 				(const struct prefix_evpn *)bgp_dest_get_prefix(
- 					dest);
- 
--			if (evp->prefix.route_type != rtype)
-+			if (evp->prefix.route_type != BGP_EVPN_IMET_ROUTE &&
-+			    evp->prefix.route_type != BGP_EVPN_AD_ROUTE &&
-+			    evp->prefix.route_type != BGP_EVPN_MAC_IP_ROUTE)
- 				continue;
- 
- 			for (pi = bgp_dest_get_bgp_path_info(dest); pi;
-@@ -3991,7 +3992,8 @@ int install_uninstall_routes_for_vni(struct bgp *bgp,
- 						bgp->vrf_id,
- 						install ? "install"
- 							: "uninstall",
--						rtype == BGP_EVPN_MAC_IP_ROUTE
-+							evp->prefix.route_type ==
-+									BGP_EVPN_MAC_IP_ROUTE
- 							? "MACIP"
- 							: "IMET",
- 						vpn->vni);
-@@ -4023,23 +4025,11 @@ int install_routes_for_vrf(struct bgp *bgp_vrf)
-  */
- int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
- {
--	int ret;
--
--	/* Install type-3 routes followed by type-2 routes - the ones applicable
-+	/*
-+	 * Install type-3 routes followed by type-2 routes - the ones applicable
- 	 * for this VNI.
- 	 */
--	ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_IMET_ROUTE,
--					       1);
--	if (ret)
--		return ret;
--
--	ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_AD_ROUTE,
--					       1);
--	if (ret)
--		return ret;
--
--	return install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_MAC_IP_ROUTE,
--						1);
-+	return install_uninstall_routes_for_vni(bgp, vpn, 1);
- }
- 
- /* uninstall routes from l3vni vrf. */
-@@ -4055,25 +4045,11 @@ int uninstall_routes_for_vrf(struct bgp *bgp_vrf)
-  */
- int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
- {
--	int ret;
--
--	/* Uninstall type-2 routes followed by type-3 routes - the ones
--	 * applicable
--	 * for this VNI.
-+	/*
-+	 * Uninstall type-2 routes followed by type-3 routes - the ones
-+	 * applicable for this VNI.
- 	 */
--	ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_MAC_IP_ROUTE,
--					       0);
--	if (ret)
--		return ret;
--
--	ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_AD_ROUTE,
--					       0);
--	if (ret)
--		return ret;
--
--
--	return install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_IMET_ROUTE,
--						0);
-+	return install_uninstall_routes_for_vni(bgp, vpn, 0);
- }
- 
- /*
--- 
-2.39.4
-
diff --git a/src/sonic-frr/patch/0037-bgpd-Replace-per-peer-connection-error-with-per-bgp.patch b/src/sonic-frr/patch/0037-bgpd-Replace-per-peer-connection-error-with-per-bgp.patch
new file mode 100644
index 00000000000..99134e7dfbc
--- /dev/null
+++ b/src/sonic-frr/patch/0037-bgpd-Replace-per-peer-connection-error-with-per-bgp.patch
@@ -0,0 +1,373 @@
+From 70280ae120823bb005ad19771cf8811f51bf2e70 Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Thu, 26 Sep 2024 11:09:35 -0400
+Subject: [PATCH 37/56] bgpd: Replace per-peer connection error with per-bgp
+
+Replace the per-peer connection error with a per-bgp event and
+a list. The io pthread enqueues peers per-bgp-instance, and the
+error-handing code can process multiple peers if there have been
+multiple failures.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ bgpd/bgp_io.c     |  4 +--
+ bgpd/bgp_packet.c | 69 +++++++++++++++++++++++++------------
+ bgpd/bgpd.c       | 88 +++++++++++++++++++++++++++++++++++++++++++++++
+ bgpd/bgpd.h       | 56 +++++++++++++++++++++++++++++-
+ 4 files changed, 191 insertions(+), 26 deletions(-)
+
+diff --git a/bgpd/bgp_io.c b/bgpd/bgp_io.c
+index 5d0f14cc5c..472a5aae59 100644
+--- a/bgpd/bgp_io.c
++++ b/bgpd/bgp_io.c
+@@ -100,7 +100,6 @@ void bgp_reads_off(struct peer_connection *connection)
+ 
+ 	event_cancel_async(fpt->master, &connection->t_read, NULL);
+ 	EVENT_OFF(connection->t_process_packet);
+-	EVENT_OFF(connection->t_process_packet_error);
+ 
+ 	UNSET_FLAG(connection->thread_flags, PEER_THREAD_READS_ON);
+ }
+@@ -252,8 +251,7 @@ static void bgp_process_reads(struct event *thread)
+ 		/* Handle the error in the main pthread, include the
+ 		 * specific state change from 'bgp_read'.
+ 		 */
+-		event_add_event(bm->master, bgp_packet_process_error, connection,
+-				code, &connection->t_process_packet_error);
++		bgp_enqueue_conn_err_peer(peer->bgp, connection->peer, code);
+ 		goto done;
+ 	}
+ 
+diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c
+index 9ebb2b21be..f77c0e5cf8 100644
+--- a/bgpd/bgp_packet.c
++++ b/bgpd/bgp_packet.c
+@@ -4130,35 +4130,60 @@ void bgp_send_delayed_eor(struct bgp *bgp)
+ }
+ 
+ /*
+- * Task callback to handle socket error encountered in the io pthread. We avoid
+- * having the io pthread try to enqueue fsm events or mess with the peer
+- * struct.
++ * Task callback in the main pthread to handle socket error
++ * encountered in the io pthread. We avoid having the io pthread try
++ * to enqueue fsm events or mess with the peer struct.
+  */
++
++/* Max number of peers to process without rescheduling */
++#define BGP_CONN_ERROR_DEQUEUE_MAX 10
++
+ void bgp_packet_process_error(struct event *thread)
+ {
+ 	struct peer_connection *connection;
+ 	struct peer *peer;
+-	int code;
++	struct bgp *bgp;
++	int counter = 0;
++	bool more_p = false;
+ 
+-	connection = EVENT_ARG(thread);
+-	peer = connection->peer;
+-	code = EVENT_VAL(thread);
++	bgp = EVENT_ARG(thread);
+ 
+-	if (bgp_debug_neighbor_events(peer))
+-		zlog_debug("%s [Event] BGP error %d on fd %d", peer->host, code,
+-			   connection->fd);
+-
+-	/* Closed connection or error on the socket */
+-	if (peer_established(connection)) {
+-		if ((CHECK_FLAG(peer->flags, PEER_FLAG_GRACEFUL_RESTART)
+-		     || CHECK_FLAG(peer->flags,
+-				   PEER_FLAG_GRACEFUL_RESTART_HELPER))
+-		    && CHECK_FLAG(peer->sflags, PEER_STATUS_NSF_MODE)) {
+-			peer->last_reset = PEER_DOWN_NSF_CLOSE_SESSION;
+-			SET_FLAG(peer->sflags, PEER_STATUS_NSF_WAIT);
+-		} else
+-			peer->last_reset = PEER_DOWN_CLOSE_SESSION;
++	/* Dequeue peers from the error list */
++	while ((peer = bgp_dequeue_conn_err_peer(bgp, &more_p)) != NULL) {
++		connection = peer->connection;
++
++		if (bgp_debug_neighbor_events(peer))
++			zlog_debug("%s [Event] BGP error %d on fd %d",
++				   peer->host, peer->connection_errcode,
++				   connection->fd);
++
++		/* Closed connection or error on the socket */
++		if (peer_established(connection)) {
++			if ((CHECK_FLAG(peer->flags, PEER_FLAG_GRACEFUL_RESTART)
++			     || CHECK_FLAG(peer->flags,
++					   PEER_FLAG_GRACEFUL_RESTART_HELPER))
++			    && CHECK_FLAG(peer->sflags, PEER_STATUS_NSF_MODE)) {
++				peer->last_reset = PEER_DOWN_NSF_CLOSE_SESSION;
++				SET_FLAG(peer->sflags, PEER_STATUS_NSF_WAIT);
++			} else
++				peer->last_reset = PEER_DOWN_CLOSE_SESSION;
++		}
++
++		/* No need for keepalives, if enabled */
++		bgp_keepalives_off(connection);
++
++		bgp_event_update(connection, peer->connection_errcode);
++
++		counter++;
++		if (counter >= BGP_CONN_ERROR_DEQUEUE_MAX)
++			break;
+ 	}
+ 
+-	bgp_event_update(connection, code);
++	/* Reschedule event if necessary */
++	if (more_p)
++		bgp_conn_err_reschedule(bgp);
++
++	if (bgp_debug_neighbor_events(NULL))
++		zlog_debug("%s: dequeued and processed %d peers", __func__,
++			   counter);
+ }
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index 6e86bbc070..6bb4e14122 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -88,6 +88,9 @@ DEFINE_HOOK(bgp_inst_delete, (struct bgp *bgp), (bgp));
+ DEFINE_HOOK(bgp_instance_state, (struct bgp *bgp), (bgp));
+ DEFINE_HOOK(bgp_routerid_update, (struct bgp *bgp, bool withdraw), (bgp, withdraw));
+ 
++/* Peers with connection error/failure, per bgp instance */
++DECLARE_LIST(bgp_peer_conn_errlist, struct peer, conn_err_link);
++
+ /* BGP process wide configuration.  */
+ static struct bgp_master bgp_master;
+ 
+@@ -2675,6 +2678,9 @@ int peer_delete(struct peer *peer)
+ 
+ 	assert(peer->connection->status != Deleted);
+ 
++	if (bgp_debug_neighbor_events(peer))
++		zlog_debug("%s: peer %pBP", __func__, peer);
++
+ 	bgp = peer->bgp;
+ 	accept_peer = CHECK_FLAG(peer->sflags, PEER_STATUS_ACCEPT_PEER);
+ 
+@@ -2690,6 +2696,13 @@ int peer_delete(struct peer *peer)
+ 			   PEER_THREAD_READS_ON));
+ 	assert(!CHECK_FLAG(peer->thread_flags, PEER_THREAD_KEEPALIVES_ON));
+ 
++	/* Ensure the peer is removed from the connection error list */
++	frr_with_mutex (&bgp->peer_errs_mtx) {
++		if (bgp_peer_conn_errlist_anywhere(peer))
++			bgp_peer_conn_errlist_del(&bgp->peer_conn_errlist,
++						  peer);
++	}
++
+ 	if (CHECK_FLAG(peer->sflags, PEER_STATUS_NSF_WAIT))
+ 		peer_nsf_stop(peer);
+ 
+@@ -3610,6 +3623,10 @@ peer_init:
+ 	memset(&bgp->ebgprequirespolicywarning, 0,
+ 	       sizeof(bgp->ebgprequirespolicywarning));
+ 
++	/* Init peer connection error info */
++	pthread_mutex_init(&bgp->peer_errs_mtx, NULL);
++	bgp_peer_conn_errlist_init(&bgp->peer_conn_errlist);
++
+ 	return bgp;
+ }
+ 
+@@ -4166,6 +4183,18 @@ int bgp_delete(struct bgp *bgp)
+ 			if (i != ZEBRA_ROUTE_BGP)
+ 				bgp_redistribute_unset(bgp, afi, i, 0);
+ 
++	/* Clear list of peers with connection errors - each
++	 * peer will need to check again, in case the io pthread is racing
++	 * with us, but this batch cleanup should make the per-peer check
++	 * cheaper.
++	 */
++	frr_with_mutex (&bgp->peer_errs_mtx) {
++		do {
++			peer = bgp_peer_conn_errlist_pop(
++				&bgp->peer_conn_errlist);
++		} while (peer != NULL);
++	}
++
+ 	/* Free peers and peer-groups. */
+ 	for (ALL_LIST_ELEMENTS(bgp->group, node, next, group))
+ 		peer_group_delete(group);
+@@ -4182,6 +4211,9 @@ int bgp_delete(struct bgp *bgp)
+ 
+ 	update_bgp_group_free(bgp);
+ 
++	/* Cancel peer connection errors event */
++	EVENT_OFF(bgp->t_conn_errors);
++
+ /* TODO - Other memory may need to be freed - e.g., NHT */
+ 
+ #ifdef ENABLE_BGP_VNC
+@@ -4357,6 +4389,9 @@ void bgp_free(struct bgp *bgp)
+ 	bgp_srv6_cleanup(bgp);
+ 	bgp_confederation_id_unset(bgp);
+ 
++	bgp_peer_conn_errlist_init(&bgp->peer_conn_errlist);
++	pthread_mutex_destroy(&bgp->peer_errs_mtx);
++
+ 	for (int i = 0; i < bgp->confed_peers_cnt; i++)
+ 		XFREE(MTYPE_BGP_NAME, bgp->confed_peers[i].as_pretty);
+ 
+@@ -8946,6 +8981,59 @@ void bgp_gr_apply_running_config(void)
+ 	}
+ }
+ 
++/*
++ * Enqueue a peer with a connection error to be handled in the main pthread
++ */
++int bgp_enqueue_conn_err_peer(struct bgp *bgp, struct peer *peer, int errcode)
++{
++	frr_with_mutex (&bgp->peer_errs_mtx) {
++		peer->connection_errcode = errcode;
++
++		/* Careful not to double-enqueue */
++		if (!bgp_peer_conn_errlist_anywhere(peer)) {
++			bgp_peer_conn_errlist_add_tail(&bgp->peer_conn_errlist,
++						       peer);
++		}
++	}
++	/* Ensure an event is scheduled */
++	event_add_event(bm->master, bgp_packet_process_error, bgp, 0,
++			&bgp->t_conn_errors);
++	return 0;
++}
++
++/*
++ * Dequeue a peer that encountered a connection error; signal whether there
++ * are more queued peers.
++ */
++struct peer *bgp_dequeue_conn_err_peer(struct bgp *bgp, bool *more_p)
++{
++	struct peer *peer = NULL;
++	bool more = false;
++
++	frr_with_mutex (&bgp->peer_errs_mtx) {
++		peer = bgp_peer_conn_errlist_pop(&bgp->peer_conn_errlist);
++
++		if (bgp_peer_conn_errlist_const_first(
++			    &bgp->peer_conn_errlist) != NULL)
++			more = true;
++	}
++
++	if (more_p)
++		*more_p = more;
++
++	return peer;
++}
++
++/*
++ * Reschedule the connection error event - probably after processing
++ * some of the peers on the list.
++ */
++void bgp_conn_err_reschedule(struct bgp *bgp)
++{
++	event_add_event(bm->master, bgp_packet_process_error, bgp, 0,
++			&bgp->t_conn_errors);
++}
++
+ printfrr_ext_autoreg_p("BP", printfrr_bp);
+ static ssize_t printfrr_bp(struct fbuf *buf, struct printfrr_eargs *ea,
+ 			   const void *ptr)
+diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
+index ee904391c1..16c9fc54f4 100644
+--- a/bgpd/bgpd.h
++++ b/bgpd/bgpd.h
+@@ -385,6 +385,33 @@ struct as_confed {
+ struct bgp_mplsvpn_nh_label_bind_cache;
+ PREDECL_RBTREE_UNIQ(bgp_mplsvpn_nh_label_bind_cache);
+ 
++/* List of peers that have connection errors in the io pthread */
++PREDECL_LIST(bgp_peer_conn_errlist);
++
++/* List of info about peers that are being cleared from BGP RIBs in a batch */
++PREDECL_LIST(bgp_clearing_info);
++
++/* Hash of peers in clearing info object */
++PREDECL_HASH(bgp_clearing_hash);
++
++/* Info about a batch of peers that need to be cleared from the RIB.
++ * If many peers need to be cleared, we process them in batches, taking
++ * one walk through the RIB for each batch.
++ */
++struct bgp_clearing_info {
++	/* Hash of peers */
++	struct bgp_clearing_hash_head peers;
++
++	/* Event to schedule/reschedule processing */
++	struct thread *t_sched;
++
++	/* RIB dest for rescheduling */
++	struct bgp_dest *last_dest;
++
++	/* Linkage for list of batches per-bgp */
++	struct bgp_clearing_info_item link;
++};
++
+ /* BGP instance structure.  */
+ struct bgp {
+ 	/* AS number of this BGP instance.  */
+@@ -869,6 +896,21 @@ struct bgp {
+ 	uint16_t tcp_keepalive_intvl;
+ 	uint16_t tcp_keepalive_probes;
+ 
++	/* List of peers that have connection errors in the IO pthread */
++	struct bgp_peer_conn_errlist_head peer_conn_errlist;
++
++	/* Mutex that guards the connection-errors list */
++	pthread_mutex_t peer_errs_mtx;
++
++	/* Event indicating that there have been connection errors; this
++	 * is typically signalled in the IO pthread; it's handled in the
++	 * main pthread.
++	 */
++	struct event *t_conn_errors;
++
++	/* List of batches of peers being cleared from BGP RIBs */
++	struct bgp_clearing_info_head clearing_list;
++
+ 	struct timeval ebgprequirespolicywarning;
+ #define FIFTEENMINUTE2USEC (int64_t)15 * 60 * 1000000
+ 
+@@ -1251,7 +1293,6 @@ struct peer_connection {
+ 
+ 	struct event *t_routeadv;
+ 	struct event *t_process_packet;
+-	struct event *t_process_packet_error;
+ 
+ 	struct event *t_stop_with_notify;
+ 
+@@ -1940,6 +1981,15 @@ struct peer {
+ 	/* Add-Path Paths-Limit */
+ 	struct addpath_paths_limit addpath_paths_limit[AFI_MAX][SAFI_MAX];
+ 
++	/* Linkage for list of peers with connection errors from IO pthread */
++	struct bgp_peer_conn_errlist_item conn_err_link;
++
++	/* Connection error code */
++	uint16_t connection_errcode;
++
++	/* Linkage for hash of clearing peers being cleared in a batch */
++	struct bgp_clearing_hash_item clear_hash_link;
++
+ 	QOBJ_FIELDS;
+ };
+ DECLARE_QOBJ_TYPE(peer);
+@@ -2579,6 +2629,10 @@ void bgp_gr_apply_running_config(void);
+ int bgp_global_gr_init(struct bgp *bgp);
+ int bgp_peer_gr_init(struct peer *peer);
+ 
++/* APIs for the per-bgp peer connection error list */
++int bgp_enqueue_conn_err_peer(struct bgp *bgp, struct peer *peer, int errcode);
++struct peer *bgp_dequeue_conn_err_peer(struct bgp *bgp, bool *more_p);
++void bgp_conn_err_reschedule(struct bgp *bgp);
+ 
+ #define BGP_GR_ROUTER_DETECT_AND_SEND_CAPABILITY_TO_ZEBRA(_bgp, _peer_list)    \
+ 	do {                                                                   \
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0038-bgpd-remove-apis-from-bgp_route.h.patch b/src/sonic-frr/patch/0038-bgpd-remove-apis-from-bgp_route.h.patch
new file mode 100644
index 00000000000..8820d022519
--- /dev/null
+++ b/src/sonic-frr/patch/0038-bgpd-remove-apis-from-bgp_route.h.patch
@@ -0,0 +1,29 @@
+From 91d6be335ba232993552f91f4f68bfb71a960737 Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Tue, 1 Oct 2024 09:23:26 -0400
+Subject: [PATCH 38/56] bgpd: remove apis from bgp_route.h
+
+Remove a couple of apis that don't exist.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ bgpd/bgp_route.h | 3 ---
+ 1 file changed, 3 deletions(-)
+
+diff --git a/bgpd/bgp_route.h b/bgpd/bgp_route.h
+index c4cbbee0c7..5b39f198a8 100644
+--- a/bgpd/bgp_route.h
++++ b/bgpd/bgp_route.h
+@@ -933,9 +933,6 @@ extern bool subgroup_announce_check(struct bgp_dest *dest,
+ 				    const struct prefix *p, struct attr *attr,
+ 				    struct attr *post_attr);
+ 
+-extern void bgp_peer_clear_node_queue_drain_immediate(struct peer *peer);
+-extern void bgp_process_queues_drain_immediate(void);
+-
+ /* for encap/vpn */
+ extern struct bgp_dest *bgp_safi_node_lookup(struct bgp_table *table,
+ 					     safi_t safi,
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0038-zebra-Actually-display-I-O-buffer-sizes.patch b/src/sonic-frr/patch/0038-zebra-Actually-display-I-O-buffer-sizes.patch
deleted file mode 100644
index 904cb169b84..00000000000
--- a/src/sonic-frr/patch/0038-zebra-Actually-display-I-O-buffer-sizes.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 72781109e5dadafe55f10d72ae2b3505bf0ccb93 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 8 Apr 2024 16:24:05 -0400
-Subject: [PATCH 10/11] zebra: Actually display I/O buffer sizes
-
-An operator found a situation where zebra was
-backing up in a significant way towards BGP
-with EVPN changes taking up some serious amounts
-of memory.  The key lines that would have clued
-us in on it were behind a dev build.  Let's change
-this.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/lib/stream.h b/lib/stream.h
-index a3c148c9c9..7acbbd2dc7 100644
---- a/lib/stream.h
-+++ b/lib/stream.h
-@@ -120,9 +120,7 @@ struct stream_fifo {
- 
- 	/* number of streams in this fifo */
- 	atomic_size_t count;
--#if defined DEV_BUILD
- 	atomic_size_t max_count;
--#endif
- 
- 	struct stream *head;
- 	struct stream *tail;
-diff --git a/zebra/zserv.c b/zebra/zserv.c
-index de6e404fc4..daccfa59d5 100644
---- a/zebra/zserv.c
-+++ b/zebra/zserv.c
-@@ -1130,12 +1130,10 @@ static void zebra_show_client_detail(struct vty *vty, struct zserv *client)
- 	vty_out(vty, "ES-EVI      %-12u%-12u%-12u\n",
- 		client->local_es_evi_add_cnt, 0, client->local_es_evi_del_cnt);
- 	vty_out(vty, "Errors: %u\n", client->error_cnt);
--
--#if defined DEV_BUILD
- 	vty_out(vty, "Input Fifo: %zu:%zu Output Fifo: %zu:%zu\n",
- 		client->ibuf_fifo->count, client->ibuf_fifo->max_count,
- 		client->obuf_fifo->count, client->obuf_fifo->max_count);
--#endif
-+
- 	vty_out(vty, "\n");
- }
- 
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0039-bgpd-batch-peer-connection-error-clearing.patch b/src/sonic-frr/patch/0039-bgpd-batch-peer-connection-error-clearing.patch
new file mode 100644
index 00000000000..53246b9ec0f
--- /dev/null
+++ b/src/sonic-frr/patch/0039-bgpd-batch-peer-connection-error-clearing.patch
@@ -0,0 +1,897 @@
+From 6337d048b3de0b69d81f49a69b4a5100bb7d2be9 Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Tue, 1 Oct 2024 16:30:44 -0400
+Subject: [PATCH 39/56] bgpd: batch peer connection error clearing
+
+When peer connections encounter errors, attempt to batch some
+of the clearing processing that occurs. Add a new batch object,
+add multiple peers to it, if possible. Do one rib walk for the
+batch, rather than one walk per peer. Use a handler callback
+per batch to check and remove peers' path-infos, rather than
+a work-queue and callback per peer. The original clearing code
+remains; it's used for single peers.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ bgpd/bgp_fsm.c    |   3 +-
+ bgpd/bgp_memory.h |   2 +
+ bgpd/bgp_packet.c |  59 ---------
+ bgpd/bgp_packet.h |   2 -
+ bgpd/bgp_route.c  | 235 +++++++++++++++++++++++++++++++++
+ bgpd/bgp_route.h  |   3 +
+ bgpd/bgpd.c       | 328 +++++++++++++++++++++++++++++++++++++++++++++-
+ bgpd/bgpd.h       |  55 +++++++-
+ 8 files changed, 613 insertions(+), 74 deletions(-)
+
+diff --git a/bgpd/bgp_fsm.c b/bgpd/bgp_fsm.c
+index 9808660ff1..d1f74ac375 100644
+--- a/bgpd/bgp_fsm.c
++++ b/bgpd/bgp_fsm.c
+@@ -1281,7 +1281,8 @@ void bgp_fsm_change_status(struct peer_connection *connection,
+ 		 * Clearing
+ 		 * (or Deleted).
+ 		 */
+-		if (!work_queue_is_scheduled(peer->clear_node_queue) &&
++		if (!CHECK_FLAG(peer->flags, PEER_FLAG_CLEARING_BATCH) &&
++		    !work_queue_is_scheduled(peer->clear_node_queue) &&
+ 		    status != Deleted)
+ 			BGP_EVENT_ADD(connection, Clearing_Completed);
+ 	}
+diff --git a/bgpd/bgp_memory.h b/bgpd/bgp_memory.h
+index 1f76945da3..517e34feba 100644
+--- a/bgpd/bgp_memory.h
++++ b/bgpd/bgp_memory.h
+@@ -136,4 +136,6 @@ DECLARE_MTYPE(BGP_SOFT_VERSION);
+ 
+ DECLARE_MTYPE(BGP_EVPN_OVERLAY);
+ 
++DECLARE_MTYPE(CLEARING_BATCH);
++
+ #endif /* _QUAGGA_BGP_MEMORY_H */
+diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c
+index f77c0e5cf8..572d651bfd 100644
+--- a/bgpd/bgp_packet.c
++++ b/bgpd/bgp_packet.c
+@@ -4128,62 +4128,3 @@ void bgp_send_delayed_eor(struct bgp *bgp)
+ 	for (ALL_LIST_ELEMENTS(bgp->peer, node, nnode, peer))
+ 		bgp_write_proceed_actions(peer);
+ }
+-
+-/*
+- * Task callback in the main pthread to handle socket error
+- * encountered in the io pthread. We avoid having the io pthread try
+- * to enqueue fsm events or mess with the peer struct.
+- */
+-
+-/* Max number of peers to process without rescheduling */
+-#define BGP_CONN_ERROR_DEQUEUE_MAX 10
+-
+-void bgp_packet_process_error(struct event *thread)
+-{
+-	struct peer_connection *connection;
+-	struct peer *peer;
+-	struct bgp *bgp;
+-	int counter = 0;
+-	bool more_p = false;
+-
+-	bgp = EVENT_ARG(thread);
+-
+-	/* Dequeue peers from the error list */
+-	while ((peer = bgp_dequeue_conn_err_peer(bgp, &more_p)) != NULL) {
+-		connection = peer->connection;
+-
+-		if (bgp_debug_neighbor_events(peer))
+-			zlog_debug("%s [Event] BGP error %d on fd %d",
+-				   peer->host, peer->connection_errcode,
+-				   connection->fd);
+-
+-		/* Closed connection or error on the socket */
+-		if (peer_established(connection)) {
+-			if ((CHECK_FLAG(peer->flags, PEER_FLAG_GRACEFUL_RESTART)
+-			     || CHECK_FLAG(peer->flags,
+-					   PEER_FLAG_GRACEFUL_RESTART_HELPER))
+-			    && CHECK_FLAG(peer->sflags, PEER_STATUS_NSF_MODE)) {
+-				peer->last_reset = PEER_DOWN_NSF_CLOSE_SESSION;
+-				SET_FLAG(peer->sflags, PEER_STATUS_NSF_WAIT);
+-			} else
+-				peer->last_reset = PEER_DOWN_CLOSE_SESSION;
+-		}
+-
+-		/* No need for keepalives, if enabled */
+-		bgp_keepalives_off(connection);
+-
+-		bgp_event_update(connection, peer->connection_errcode);
+-
+-		counter++;
+-		if (counter >= BGP_CONN_ERROR_DEQUEUE_MAX)
+-			break;
+-	}
+-
+-	/* Reschedule event if necessary */
+-	if (more_p)
+-		bgp_conn_err_reschedule(bgp);
+-
+-	if (bgp_debug_neighbor_events(NULL))
+-		zlog_debug("%s: dequeued and processed %d peers", __func__,
+-			   counter);
+-}
+diff --git a/bgpd/bgp_packet.h b/bgpd/bgp_packet.h
+index 866b8f617d..c56c8e4931 100644
+--- a/bgpd/bgp_packet.h
++++ b/bgpd/bgp_packet.h
+@@ -81,8 +81,6 @@ extern void bgp_process_packet(struct event *event);
+ 
+ extern void bgp_send_delayed_eor(struct bgp *bgp);
+ 
+-/* Task callback to handle socket error encountered in the io pthread */
+-void bgp_packet_process_error(struct event *thread);
+ extern struct bgp_notify
+ bgp_notify_decapsulate_hard_reset(struct bgp_notify *notify);
+ extern bool bgp_has_graceful_restart_notification(struct peer *peer);
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index 9d96a3e433..b662c10b0a 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -80,6 +80,8 @@
+ 
+ DEFINE_MTYPE_STATIC(BGPD, BGP_EOIU_MARKER_INFO, "BGP EOIU Marker info");
+ DEFINE_MTYPE_STATIC(BGPD, BGP_METAQ, "BGP MetaQ");
++/* Memory for batched clearing of peers from the RIB */
++DEFINE_MTYPE(BGPD, CLEARING_BATCH, "Clearing batch");
+ 
+ DEFINE_HOOK(bgp_snmp_update_stats,
+ 	    (struct bgp_dest *rn, struct bgp_path_info *pi, bool added),
+@@ -6423,11 +6425,244 @@ void bgp_clear_route(struct peer *peer, afi_t afi, safi_t safi)
+ 		peer_unlock(peer);
+ }
+ 
++/*
++ * Callback scheduled to process prefixes/dests for batch clearing; the
++ * dests were found via a rib walk.
++ * The one-peer version of this uses a per-peer workqueue to manage
++ * rescheduling, but we're just using a fixed limit here.
++ */
++
++/* Limit the number of dests we'll process per callback */
++#define BGP_CLEARING_BATCH_MAX_DESTS 100
++
++static void bgp_clear_batch_dests_task(struct event *event)
++{
++	struct bgp_clearing_info *cinfo = EVENT_ARG(event);
++	struct bgp_dest *dest;
++	struct bgp_path_info *pi, *next;
++	struct bgp_table *table;
++	struct bgp *bgp;
++	afi_t afi;
++	safi_t safi;
++	int counter = 0;
++
++	bgp = cinfo->bgp;
++
++next_dest:
++
++	dest = bgp_clearing_batch_next_dest(cinfo);
++	if (dest == NULL)
++		goto done;
++
++	table = bgp_dest_table(dest);
++	afi = table->afi;
++	safi = table->safi;
++
++	/* Have to check every path: it is possible that we have multiple paths
++	 * for a prefix from a peer if that peer is using AddPath.
++	 * Note that the clearing action may change the pi list; we try to do
++	 * a "safe" iteration.
++	 */
++	for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = next) {
++		next = pi ? pi->next : NULL;
++
++		if (!bgp_clearing_batch_check_peer(cinfo, pi->peer))
++			continue;
++
++		/* graceful restart STALE flag set. */
++		if (((CHECK_FLAG(pi->peer->sflags, PEER_STATUS_NSF_WAIT)
++		      && pi->peer->nsf[afi][safi])
++		     || CHECK_FLAG(pi->peer->af_sflags[afi][safi],
++				   PEER_STATUS_ENHANCED_REFRESH))
++		    && !CHECK_FLAG(pi->flags, BGP_PATH_STALE)
++		    && !CHECK_FLAG(pi->flags, BGP_PATH_UNUSEABLE))
++			bgp_path_info_set_flag(dest, pi, BGP_PATH_STALE);
++		else {
++			/* If this is an EVPN route, process for
++			 * un-import. */
++			if (safi == SAFI_EVPN)
++				bgp_evpn_unimport_route(
++					bgp, afi, safi,
++					bgp_dest_get_prefix(dest), pi);
++			/* Handle withdraw for VRF route-leaking and L3VPN */
++			if (SAFI_UNICAST == safi
++			    && (bgp->inst_type == BGP_INSTANCE_TYPE_VRF ||
++				bgp->inst_type == BGP_INSTANCE_TYPE_DEFAULT)) {
++				vpn_leak_from_vrf_withdraw(bgp_get_default(),
++							   bgp, pi);
++			}
++			if (SAFI_MPLS_VPN == safi &&
++			    bgp->inst_type == BGP_INSTANCE_TYPE_DEFAULT) {
++				vpn_leak_to_vrf_withdraw(pi);
++			}
++
++			bgp_rib_remove(dest, pi, pi->peer, afi, safi);
++		}
++	}
++
++	/* Unref this dest and table */
++	bgp_dest_unlock_node(dest);
++	bgp_table_unlock(table);
++
++	counter++;
++	if (counter < BGP_CLEARING_BATCH_MAX_DESTS)
++		goto next_dest;
++
++done:
++
++	/* If there are still dests to process, reschedule. */
++	if (bgp_clearing_batch_dests_present(cinfo)) {
++		if (bgp_debug_neighbor_events(NULL))
++			zlog_debug("%s: Batch %p: Rescheduled after processing %d dests",
++				   __func__, cinfo, counter);
++
++		event_add_event(bm->master, bgp_clear_batch_dests_task, cinfo,
++				0, &cinfo->t_sched);
++	} else {
++		if (bgp_debug_neighbor_events(NULL))
++			zlog_debug("%s: Batch %p: Done after processing %d dests",
++				   __func__, cinfo, counter);
++		bgp_clearing_batch_completed(cinfo);
++	}
++
++	return;
++}
++
++/*
++ * Walk a single table for batch peer clearing processing
++ */
++static void clear_batch_table_helper(struct bgp_clearing_info *cinfo,
++				     struct bgp_table *table)
++{
++	struct bgp_dest *dest;
++	bool force = (cinfo->bgp->process_queue == NULL);
++	uint32_t examined = 0, queued = 0;
++
++	for (dest = bgp_table_top(table); dest; dest = bgp_route_next(dest)) {
++		struct bgp_path_info *pi, *next;
++		struct bgp_adj_in *ain;
++		struct bgp_adj_in *ain_next;
++
++		examined++;
++
++		ain = dest->adj_in;
++		while (ain) {
++			ain_next = ain->next;
++
++			if (bgp_clearing_batch_check_peer(cinfo, ain->peer))
++				bgp_adj_in_remove(&dest, ain);
++
++			ain = ain_next;
++
++			assert(dest != NULL);
++		}
++
++		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = next) {
++			next = pi->next;
++			if (!bgp_clearing_batch_check_peer(cinfo, pi->peer))
++				continue;
++
++			queued++;
++
++			if (force) {
++				bgp_path_info_reap(dest, pi);
++			} else {
++				/* Unlocked after processing */
++				bgp_table_lock(bgp_dest_table(dest));
++				bgp_dest_lock_node(dest);
++
++				bgp_clearing_batch_add_dest(cinfo, dest);
++				break;
++			}
++		}
++	}
++
++	if (examined > 0) {
++		if (bgp_debug_neighbor_events(NULL))
++			zlog_debug("%s: %s/%s: examined %u, queued %u",
++				   __func__, afi2str(table->afi),
++				   safi2str(table->safi), examined, queued);
++	}
++}
++
++/*
++ * RIB-walking helper for batch clearing work: walk all tables, identify
++ * dests that are affected by the peers in the batch, enqueue the dests for
++ * async processing.
++ */
++static void clear_batch_rib_helper(struct bgp_clearing_info *cinfo)
++{
++	afi_t afi;
++	safi_t safi;
++	struct bgp_dest *dest;
++	struct bgp_table *table;
++
++	FOREACH_AFI_SAFI (afi, safi) {
++		/* Identify table to be examined */
++		if (safi != SAFI_MPLS_VPN && safi != SAFI_ENCAP &&
++		    safi != SAFI_EVPN) {
++			table = cinfo->bgp->rib[afi][safi];
++			if (!table)
++				continue;
++
++			clear_batch_table_helper(cinfo, table);
++		} else {
++			for (dest = bgp_table_top(cinfo->bgp->rib[afi][safi]);
++			     dest; dest = bgp_route_next(dest)) {
++				table = bgp_dest_get_bgp_table_info(dest);
++				if (!table)
++					continue;
++
++				/* TODO -- record the tables we've seen
++				 * and don't repeat any?
++				 */
++
++				clear_batch_table_helper(cinfo, table);
++			}
++		}
++	}
++}
++
++/*
++ * Identify prefixes that need to be cleared for a batch of peers in 'cinfo'.
++ * The actual clearing processing will be done async...
++ */
++void bgp_clear_route_batch(struct bgp_clearing_info *cinfo)
++{
++	if (bgp_debug_neighbor_events(NULL))
++		zlog_debug("%s: BGP %s, batch %p", __func__,
++			   cinfo->bgp->name_pretty, cinfo);
++
++	/* Walk the rib, checking the peers in the batch */
++	clear_batch_rib_helper(cinfo);
++
++	/* If we found some prefixes, schedule a task to begin work. */
++	if (bgp_clearing_batch_dests_present(cinfo))
++		event_add_event(bm->master, bgp_clear_batch_dests_task, cinfo,
++				0, &cinfo->t_sched);
++
++	/* NB -- it's the caller's job to clean up, release refs, etc. if
++	 * we didn't find any dests
++	 */
++}
++
+ void bgp_clear_route_all(struct peer *peer)
+ {
+ 	afi_t afi;
+ 	safi_t safi;
+ 
++	/* We may be able to batch multiple peers' clearing work: check
++	 * and see.
++	 */
++	if (bgp_clearing_batch_add_peer(peer->bgp, peer)) {
++		if (bgp_debug_neighbor_events(peer))
++			zlog_debug("%s: peer %pBP batched", __func__, peer);
++		return;
++	}
++
++	if (bgp_debug_neighbor_events(peer))
++		zlog_debug("%s: peer %pBP", __func__, peer);
++
+ 	FOREACH_AFI_SAFI (afi, safi)
+ 		bgp_clear_route(peer, afi, safi);
+ 
+diff --git a/bgpd/bgp_route.h b/bgpd/bgp_route.h
+index 5b39f198a8..391890d733 100644
+--- a/bgpd/bgp_route.h
++++ b/bgpd/bgp_route.h
+@@ -778,6 +778,9 @@ extern void bgp_soft_reconfig_table_task_cancel(const struct bgp *bgp,
+ extern bool bgp_soft_reconfig_in(struct peer *peer, afi_t afi, safi_t safi);
+ extern void bgp_clear_route(struct peer *, afi_t, safi_t);
+ extern void bgp_clear_route_all(struct peer *);
++/* Clear routes for a batch of peers */
++void bgp_clear_route_batch(struct bgp_clearing_info *cinfo);
++
+ extern void bgp_clear_adj_in(struct peer *, afi_t, safi_t);
+ extern void bgp_clear_stale_route(struct peer *, afi_t, safi_t);
+ extern void bgp_set_stale_route(struct peer *peer, afi_t afi, safi_t safi);
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index 6bb4e14122..4dadf47d6e 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -89,7 +89,20 @@ DEFINE_HOOK(bgp_instance_state, (struct bgp *bgp), (bgp));
+ DEFINE_HOOK(bgp_routerid_update, (struct bgp *bgp, bool withdraw), (bgp, withdraw));
+ 
+ /* Peers with connection error/failure, per bgp instance */
+-DECLARE_LIST(bgp_peer_conn_errlist, struct peer, conn_err_link);
++DECLARE_DLIST(bgp_peer_conn_errlist, struct peer, conn_err_link);
++
++/* List of info about peers that are being cleared from BGP RIBs in a batch */
++DECLARE_DLIST(bgp_clearing_info, struct bgp_clearing_info, link);
++
++/* List of dests that need to be processed in a clearing batch */
++DECLARE_LIST(bgp_clearing_destlist, struct bgp_clearing_dest, link);
++
++/* Hash of peers in clearing info object */
++static int peer_clearing_hash_cmp(const struct peer *p1, const struct peer *p2);
++static uint32_t peer_clearing_hashfn(const struct peer *p1);
++
++DECLARE_HASH(bgp_clearing_hash, struct peer, clear_hash_link,
++	     peer_clearing_hash_cmp, peer_clearing_hashfn);
+ 
+ /* BGP process wide configuration.  */
+ static struct bgp_master bgp_master;
+@@ -3626,6 +3639,7 @@ peer_init:
+ 	/* Init peer connection error info */
+ 	pthread_mutex_init(&bgp->peer_errs_mtx, NULL);
+ 	bgp_peer_conn_errlist_init(&bgp->peer_conn_errlist);
++	bgp_clearing_info_init(&bgp->clearing_list);
+ 
+ 	return bgp;
+ }
+@@ -4009,11 +4023,12 @@ int bgp_delete(struct bgp *bgp)
+ 	struct bgp *bgp_to_proc = NULL;
+ 	struct bgp *bgp_to_proc_next = NULL;
+ 	struct bgp *bgp_default = bgp_get_default();
++	struct bgp_clearing_info *cinfo;
+ 
+ 	assert(bgp);
+ 
+ 	/*
+-	 * Iterate the pending dest list and remove all the dest pertaininig to
++	 * Iterate the pending dest list and remove all the dest pertaining to
+ 	 * the bgp under delete.
+ 	 */
+ 	b_ann_cnt = zebra_announce_count(&bm->zebra_announce_head);
+@@ -4059,6 +4074,10 @@ int bgp_delete(struct bgp *bgp)
+ 			   a_l3_cnt);
+ 	}
+ 
++	/* Cleanup for peer connection batching */
++	while ((cinfo = bgp_clearing_info_first(&bgp->clearing_list)) != NULL)
++		bgp_clearing_batch_completed(cinfo);
++
+ 	bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL);
+ 
+ 	/* make sure we withdraw any exported routes */
+@@ -4214,6 +4233,10 @@ int bgp_delete(struct bgp *bgp)
+ 	/* Cancel peer connection errors event */
+ 	EVENT_OFF(bgp->t_conn_errors);
+ 
++	/* Cleanup for peer connection batching */
++	while ((cinfo = bgp_clearing_info_pop(&bgp->clearing_list)) != NULL)
++		bgp_clearing_batch_completed(cinfo);
++
+ /* TODO - Other memory may need to be freed - e.g., NHT */
+ 
+ #ifdef ENABLE_BGP_VNC
+@@ -8981,8 +9004,303 @@ void bgp_gr_apply_running_config(void)
+ 	}
+ }
+ 
++/* Hash of peers in clearing info object */
++static int peer_clearing_hash_cmp(const struct peer *p1, const struct peer *p2)
++{
++	if (p1 == p2)
++		return 0;
++	else if (p1 < p2)
++		return -1;
++	else
++		return 1;
++}
++
++static uint32_t peer_clearing_hashfn(const struct peer *p1)
++{
++	return (uint32_t)((intptr_t)p1 & 0xffffffffULL);
++}
++
++/*
++ * Free a clearing batch: this really just does the memory cleanup; the
++ * clearing code is expected to manage the peer, dest, table, etc refcounts
++ */
++static void bgp_clearing_batch_free(struct bgp *bgp,
++				    struct bgp_clearing_info **pinfo)
++{
++	struct bgp_clearing_info *cinfo = *pinfo;
++	struct bgp_clearing_dest *destinfo;
++
++	if (bgp_clearing_info_anywhere(cinfo))
++		bgp_clearing_info_del(&bgp->clearing_list, cinfo);
++
++	while ((destinfo = bgp_clearing_destlist_pop(&cinfo->destlist)) != NULL)
++		XFREE(MTYPE_CLEARING_BATCH, destinfo);
++
++	bgp_clearing_hash_fini(&cinfo->peers);
++
++	XFREE(MTYPE_CLEARING_BATCH, *pinfo);
++}
++
++/*
++ * Done with a peer that was part of a clearing batch
++ */
++static void bgp_clearing_peer_done(struct peer *peer)
++{
++	UNSET_FLAG(peer->flags, PEER_FLAG_CLEARING_BATCH);
++
++	/* Tickle FSM to start moving again */
++	BGP_EVENT_ADD(peer->connection, Clearing_Completed);
++
++	peer_unlock(peer); /* bgp_clear_route */
++}
++
++/*
++ * Initialize a new batch struct for clearing peer(s) from the RIB
++ */
++static void bgp_clearing_batch_begin(struct bgp *bgp)
++{
++	struct bgp_clearing_info *cinfo;
++
++	cinfo = XCALLOC(MTYPE_CLEARING_BATCH, sizeof(struct bgp_clearing_info));
++
++	cinfo->bgp = bgp;
++
++	/* Init hash of peers and list of dests */
++	bgp_clearing_hash_init(&cinfo->peers);
++	bgp_clearing_destlist_init(&cinfo->destlist);
++
++	/* Batch is open for more peers */
++	SET_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_OPEN);
++
++	bgp_clearing_info_add_head(&bgp->clearing_list, cinfo);
++}
++
++/*
++ * Close a batch of clearing peers, and begin working on the RIB
++ */
++static void bgp_clearing_batch_end(struct bgp *bgp)
++{
++	struct bgp_clearing_info *cinfo;
++
++	cinfo = bgp_clearing_info_first(&bgp->clearing_list);
++
++	assert(cinfo != NULL);
++	assert(CHECK_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_OPEN));
++
++	/* Batch is closed */
++	UNSET_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_OPEN);
++
++	/* If we have no peers to examine, just discard the batch info */
++	if (bgp_clearing_hash_count(&cinfo->peers) == 0) {
++		bgp_clearing_batch_free(bgp, &cinfo);
++		return;
++	}
++
++	/* Do a RIB walk for the current batch. If it finds dests/prefixes
++	 * to work on, this will schedule a task to process
++	 * the dests/prefixes in the batch.
++	 */
++	bgp_clear_route_batch(cinfo);
++
++	/* If we found no prefixes/dests, just discard the batch,
++	 * remembering that we're holding a ref for each peer.
++	 */
++	if (bgp_clearing_destlist_count(&cinfo->destlist) == 0) {
++		bgp_clearing_batch_completed(cinfo);
++	}
++}
++
++/* Check whether a dest's peer is relevant to a clearing batch */
++bool bgp_clearing_batch_check_peer(struct bgp_clearing_info *cinfo,
++				   const struct peer *peer)
++{
++	struct peer *p;
++
++	p = bgp_clearing_hash_find(&cinfo->peers, peer);
++	return (p != NULL);
++}
++
++/*
++ * Check whether a clearing batch has any dests to process
++ */
++bool bgp_clearing_batch_dests_present(struct bgp_clearing_info *cinfo)
++{
++	return (bgp_clearing_destlist_count(&cinfo->destlist) > 0);
++}
++
++/*
++ * Done with a peer clearing batch; deal with refcounts, free memory
++ */
++void bgp_clearing_batch_completed(struct bgp_clearing_info *cinfo)
++{
++	struct peer *peer;
++	struct bgp_dest *dest;
++	struct bgp_clearing_dest *destinfo;
++	struct bgp_table *table;
++
++	/* Ensure event is not scheduled */
++	event_cancel_event(bm->master, &cinfo->t_sched);
++
++	/* Remove all peers and un-ref */
++	while ((peer = bgp_clearing_hash_pop(&cinfo->peers)) != NULL)
++		bgp_clearing_peer_done(peer);
++
++	/* Remove any dests/prefixes and unlock */
++	destinfo = bgp_clearing_destlist_pop(&cinfo->destlist);
++	while (destinfo) {
++		dest = destinfo->dest;
++		XFREE(MTYPE_CLEARING_BATCH, destinfo);
++
++		table = bgp_dest_table(dest);
++		bgp_dest_unlock_node(dest);
++		bgp_table_unlock(table);
++
++		destinfo = bgp_clearing_destlist_pop(&cinfo->destlist);
++	}
++
++	/* Free memory */
++	bgp_clearing_batch_free(cinfo->bgp, &cinfo);
++}
++
++/*
++ * Add a prefix/dest to a clearing batch
++ */
++void bgp_clearing_batch_add_dest(struct bgp_clearing_info *cinfo,
++				 struct bgp_dest *dest)
++{
++	struct bgp_clearing_dest *destinfo;
++
++	destinfo = XCALLOC(MTYPE_CLEARING_BATCH,
++			   sizeof(struct bgp_clearing_dest));
++
++	destinfo->dest = dest;
++	bgp_clearing_destlist_add_tail(&cinfo->destlist, destinfo);
++}
++
++/*
++ * Return the next dest for batch clear processing
++ */
++struct bgp_dest *bgp_clearing_batch_next_dest(struct bgp_clearing_info *cinfo)
++{
++	struct bgp_clearing_dest *destinfo;
++	struct bgp_dest *dest = NULL;
++
++	destinfo = bgp_clearing_destlist_pop(&cinfo->destlist);
++	if (destinfo) {
++		dest = destinfo->dest;
++		XFREE(MTYPE_CLEARING_BATCH, destinfo);
++	}
++
++	return dest;
++}
++
++/* If a clearing batch is available for 'peer', add it and return 'true',
++ * else return 'false'.
++ */
++bool bgp_clearing_batch_add_peer(struct bgp *bgp, struct peer *peer)
++{
++	struct bgp_clearing_info *cinfo;
++
++	cinfo = bgp_clearing_info_first(&bgp->clearing_list);
++
++	if (cinfo && CHECK_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_OPEN)) {
++		if (!CHECK_FLAG(peer->flags, PEER_FLAG_CLEARING_BATCH)) {
++			/* Add a peer ref */
++			peer_lock(peer);
++
++			bgp_clearing_hash_add(&cinfo->peers, peer);
++			SET_FLAG(peer->flags, PEER_FLAG_CLEARING_BATCH);
++		}
++		return true;
++	}
++
++	return false;
++}
++
++/*
++ * Task callback in the main pthread to handle socket errors
++ * encountered in the io pthread. We avoid having the io pthread try
++ * to enqueue fsm events or mess with the peer struct.
++ */
++
++/* TODO -- should this be configurable? */
++/* Max number of peers to process without rescheduling */
++#define BGP_CONN_ERROR_DEQUEUE_MAX 10
++
++static void bgp_process_conn_error(struct event *event)
++{
++	struct bgp *bgp;
++	struct peer *peer;
++	struct peer_connection *connection;
++	int counter = 0;
++	size_t list_count = 0;
++	bool more_p = false;
++
++	bgp = EVENT_ARG(event);
++
++	frr_with_mutex (&bgp->peer_errs_mtx) {
++		peer = bgp_peer_conn_errlist_pop(&bgp->peer_conn_errlist);
++
++		list_count =
++			bgp_peer_conn_errlist_count(&bgp->peer_conn_errlist);
++	}
++
++	/* If we have multiple peers with errors, try to batch some
++	 * clearing work.
++	 */
++	if (list_count > 0)
++		bgp_clearing_batch_begin(bgp);
++
++	/* Dequeue peers from the error list */
++	while (peer != NULL) {
++		connection = peer->connection;
++
++		if (bgp_debug_neighbor_events(peer))
++			zlog_debug("%s [Event] BGP error %d on fd %d",
++				   peer->host, peer->connection_errcode,
++				   connection->fd);
++
++		/* Closed connection or error on the socket */
++		if (peer_established(connection)) {
++			if ((CHECK_FLAG(peer->flags, PEER_FLAG_GRACEFUL_RESTART)
++			     || CHECK_FLAG(peer->flags,
++					   PEER_FLAG_GRACEFUL_RESTART_HELPER))
++			    && CHECK_FLAG(peer->sflags, PEER_STATUS_NSF_MODE)) {
++				peer->last_reset = PEER_DOWN_NSF_CLOSE_SESSION;
++				SET_FLAG(peer->sflags, PEER_STATUS_NSF_WAIT);
++			} else
++				peer->last_reset = PEER_DOWN_CLOSE_SESSION;
++		}
++
++		/* No need for keepalives, if enabled */
++		bgp_keepalives_off(peer->connection);
++
++		/* Drive into state-machine changes */
++		bgp_event_update(connection, peer->connection_errcode);
++
++		counter++;
++		if (counter >= BGP_CONN_ERROR_DEQUEUE_MAX)
++			break;
++
++		peer = bgp_dequeue_conn_err_peer(bgp, &more_p);
++	}
++
++	/* Reschedule event if necessary */
++	if (more_p)
++		bgp_conn_err_reschedule(bgp);
++
++	/* Done with a clearing batch */
++	if (list_count > 0)
++		bgp_clearing_batch_end(bgp);
++
++	if (bgp_debug_neighbor_events(NULL))
++		zlog_debug("%s: dequeued and processed %d peers", __func__,
++			   counter);
++}
++
+ /*
+- * Enqueue a peer with a connection error to be handled in the main pthread
++ * Enqueue a peer with a connection error to be handled in the main pthread;
++ * this is called from the io pthread.
+  */
+ int bgp_enqueue_conn_err_peer(struct bgp *bgp, struct peer *peer, int errcode)
+ {
+@@ -8996,7 +9314,7 @@ int bgp_enqueue_conn_err_peer(struct bgp *bgp, struct peer *peer, int errcode)
+ 		}
+ 	}
+ 	/* Ensure an event is scheduled */
+-	event_add_event(bm->master, bgp_packet_process_error, bgp, 0,
++	event_add_event(bm->master, bgp_process_conn_error, bgp, 0,
+ 			&bgp->t_conn_errors);
+ 	return 0;
+ }
+@@ -9030,7 +9348,7 @@ struct peer *bgp_dequeue_conn_err_peer(struct bgp *bgp, bool *more_p)
+  */
+ void bgp_conn_err_reschedule(struct bgp *bgp)
+ {
+-	event_add_event(bm->master, bgp_packet_process_error, bgp, 0,
++	event_add_event(bm->master, bgp_process_conn_error, bgp, 0,
+ 			&bgp->t_conn_errors);
+ }
+ 
+diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
+index 16c9fc54f4..6c619db40d 100644
+--- a/bgpd/bgpd.h
++++ b/bgpd/bgpd.h
+@@ -386,32 +386,54 @@ struct bgp_mplsvpn_nh_label_bind_cache;
+ PREDECL_RBTREE_UNIQ(bgp_mplsvpn_nh_label_bind_cache);
+ 
+ /* List of peers that have connection errors in the io pthread */
+-PREDECL_LIST(bgp_peer_conn_errlist);
++PREDECL_DLIST(bgp_peer_conn_errlist);
+ 
+ /* List of info about peers that are being cleared from BGP RIBs in a batch */
+-PREDECL_LIST(bgp_clearing_info);
++PREDECL_DLIST(bgp_clearing_info);
+ 
+ /* Hash of peers in clearing info object */
+ PREDECL_HASH(bgp_clearing_hash);
+ 
++/* List of dests that need to be processed in a clearing batch */
++PREDECL_LIST(bgp_clearing_destlist);
++
++struct bgp_clearing_dest {
++	struct bgp_dest *dest;
++	struct bgp_clearing_destlist_item link;
++};
++
+ /* Info about a batch of peers that need to be cleared from the RIB.
+  * If many peers need to be cleared, we process them in batches, taking
+- * one walk through the RIB for each batch.
++ * one walk through the RIB for each batch. This is only used for "all"
++ * afi/safis, typically when processing peer connection errors.
+  */
+ struct bgp_clearing_info {
++	/* Owning bgp instance */
++	struct bgp *bgp;
++
+ 	/* Hash of peers */
+ 	struct bgp_clearing_hash_head peers;
+ 
++	/* Flags */
++	uint32_t flags;
++
++	/* List of dests - wrapped by a small wrapper struct */
++	struct bgp_clearing_destlist_head destlist;
++
+ 	/* Event to schedule/reschedule processing */
+-	struct thread *t_sched;
++	struct event *t_sched;
++
++	/* TODO -- id, serial number, for debugging/logging? */
+ 
+-	/* RIB dest for rescheduling */
+-	struct bgp_dest *last_dest;
++	/* TODO -- info for rescheduling the RIB walk? future? */
+ 
+-	/* Linkage for list of batches per-bgp */
++	/* Linkage for list of batches per bgp */
+ 	struct bgp_clearing_info_item link;
+ };
+ 
++/* Batch is open, new peers can be added */
++#define BGP_CLEARING_INFO_FLAG_OPEN  (1 << 0)
++
+ /* BGP instance structure.  */
+ struct bgp {
+ 	/* AS number of this BGP instance.  */
+@@ -1584,6 +1606,8 @@ struct peer {
+ #define PEER_FLAG_AS_LOOP_DETECTION (1ULL << 38) /* as path loop detection */
+ #define PEER_FLAG_EXTENDED_LINK_BANDWIDTH (1ULL << 39)
+ #define PEER_FLAG_DUAL_AS		  (1ULL << 40)
++/* Peer is part of a batch clearing its routes */
++#define PEER_FLAG_CLEARING_BATCH (1ULL << 42)
+ 
+ 	/*
+ 	 *GR-Disabled mode means unset PEER_FLAG_GRACEFUL_RESTART
+@@ -2951,6 +2975,23 @@ extern void srv6_function_free(struct bgp_srv6_function *func);
+ 
+ extern void bgp_session_reset_safe(struct peer *peer, struct listnode **nnode);
+ 
++/* If a clearing batch is available for 'peer', add it and return 'true',
++ * else return 'false'.
++ */
++bool bgp_clearing_batch_add_peer(struct bgp *bgp, struct peer *peer);
++/* Add a prefix/dest to a clearing batch */
++void bgp_clearing_batch_add_dest(struct bgp_clearing_info *cinfo,
++				 struct bgp_dest *dest);
++/* Check whether a dest's peer is relevant to a clearing batch */
++bool bgp_clearing_batch_check_peer(struct bgp_clearing_info *cinfo,
++				   const struct peer *peer);
++/* Check whether a clearing batch has any dests to process */
++bool bgp_clearing_batch_dests_present(struct bgp_clearing_info *cinfo);
++/* Returns the next dest for batch clear processing */
++struct bgp_dest *bgp_clearing_batch_next_dest(struct bgp_clearing_info *cinfo);
++/* Done with a peer clearing batch; deal with refcounts, free memory */
++void bgp_clearing_batch_completed(struct bgp_clearing_info *cinfo);
++
+ #ifdef _FRR_ATTRIBUTE_PRINTFRR
+ /* clang-format off */
+ #pragma FRR printfrr_ext "%pBP" (struct peer *)
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch b/src/sonic-frr/patch/0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch
deleted file mode 100644
index 9088bfebbda..00000000000
--- a/src/sonic-frr/patch/0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 981bfca72414bfa7a97b6526e4736ea4f6834620 Mon Sep 17 00:00:00 2001
-From: Rajasekar Raja <rajasekarr@nvidia.com>
-Date: Mon, 22 Apr 2024 13:50:47 -0400
-Subject: [PATCH] From a88498262d8d88fb3846d1a5c1a373751fe6f381 Mon Sep 17
- 00:00:00 2001 Subject: [PATCH 11/11] zebra: Actually display I/O buffer sizes
- (part-2)
-
-An extension of commit-8d8f12ba8e5cd11c189b8475b05539fa8415ccb9
-
-Removing ifdef DEV_BUILD in stream_fifo_push as well to make the 'sh
-zebra client' display the current I/O fifo along with max fifo items.
-
-TICKET :#3390099
-
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/lib/stream.c b/lib/stream.c
-index 2de3abdf45..3aef70794e 100644
---- a/lib/stream.c
-+++ b/lib/stream.c
-@@ -1256,9 +1256,7 @@ void stream_fifo_init(struct stream_fifo *fifo)
- /* Add new stream to fifo. */
- void stream_fifo_push(struct stream_fifo *fifo, struct stream *s)
- {
--#if defined DEV_BUILD
- 	size_t max, curmax;
--#endif
- 
- 	if (fifo->tail)
- 		fifo->tail->next = s;
-@@ -1267,15 +1265,11 @@ void stream_fifo_push(struct stream_fifo *fifo, struct stream *s)
- 
- 	fifo->tail = s;
- 	fifo->tail->next = NULL;
--#if !defined DEV_BUILD
--	atomic_fetch_add_explicit(&fifo->count, 1, memory_order_release);
--#else
- 	max = atomic_fetch_add_explicit(&fifo->count, 1, memory_order_release);
- 	curmax = atomic_load_explicit(&fifo->max_count, memory_order_relaxed);
- 	if (max > curmax)
- 		atomic_store_explicit(&fifo->max_count, max,
- 				      memory_order_relaxed);
--#endif
- }
- 
- void stream_fifo_push_safe(struct stream_fifo *fifo, struct stream *s)
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch b/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch
deleted file mode 100644
index 9c4be324fb6..00000000000
--- a/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From f3ec35b461a06f1278383d2347dfbc611b6a91a6 Mon Sep 17 00:00:00 2001
-From: Rajasekar Raja <rajasekarr@nvidia.com>
-Date: Fri, 17 May 2024 12:36:31 -0700
-Subject: [PATCH] bgpd: backpressure - Fix to withdraw evpn type-5 routes
- immediately
-
-As part of backpressure changes, there is a bug where immediate withdraw
-is to be sent for evpn imported type-5 prefix to clear the nh neigh and
-RMAC entry.
-
-Fixing this by sending withdraw immediately to keep it inline with the
-code today
-
-Ticket: #3905571
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index 3dff073a3..26089e326 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -3529,7 +3529,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 			 */
- 			if (old_select &&
- 			    is_route_parent_evpn(old_select))
--				bgp_zebra_route_install(dest, old_select, bgp, false, NULL, false);
-+				bgp_zebra_withdraw_actual(dest, old_select, bgp);
-
- 			bgp_zebra_route_install(dest, new_select, bgp, true, NULL, false);
- 		} else {
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index f0fe0ec5c..c0733dfe3 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -1844,11 +1844,10 @@ static void bgp_zebra_buffer_write_ready(void)
-  *                                     save new pi, mark as going to be
-  *                                     withdrawan, remove install flag
-  *
-- *    Withdrawal       Install         Special case, send withdrawal immediately
-- *                                     Leave dest on list, release old pi,
-+ *
-+ *    Withdrawal       Install         Leave dest on list, release old pi,
-  *                                     save new pi, mark as going to be
-- *                                     installed.  <see note about evpn
-- *                                     in bgp_route.c in bgp_process_main_one>
-+ *									   installed
-  *    Withdrawal       Withdrawal      Leave dest on list, release old pi,
-  *                                     save new pi, mark as going to be
-  *                                     withdrawn.
-@@ -1902,9 +1901,6 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
- 		dest->za_bgp_pi = info;
- 	} else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) {
- 		assert(dest->za_bgp_pi);
--		if (install & !is_evpn)
--			bgp_zebra_withdraw_actual(dest, dest->za_bgp_pi, bgp);
--
- 		bgp_path_info_unlock(dest->za_bgp_pi);
- 		bgp_path_info_lock(info);
- 		dest->za_bgp_pi = info;
---
-2.39.4
-
diff --git a/src/sonic-frr/patch/0040-zebra-move-peer-conn-error-list-to-connection-struct.patch b/src/sonic-frr/patch/0040-zebra-move-peer-conn-error-list-to-connection-struct.patch
new file mode 100644
index 00000000000..8a4138c560c
--- /dev/null
+++ b/src/sonic-frr/patch/0040-zebra-move-peer-conn-error-list-to-connection-struct.patch
@@ -0,0 +1,215 @@
+From 2e66e90b500d5f08c532b1a5ec7528b16d1e5e74 Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Thu, 7 Nov 2024 10:55:19 -0500
+Subject: [PATCH 40/56] zebra: move peer conn error list to connection struct
+
+Move the peer connection error list to the peer_connection
+struct; that seems to line up better with the way that struct
+works.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ bgpd/bgp_io.c |  2 +-
+ bgpd/bgpd.c   | 44 +++++++++++++++++++++++---------------------
+ bgpd/bgpd.h   | 17 +++++++++--------
+ 3 files changed, 33 insertions(+), 30 deletions(-)
+
+diff --git a/bgpd/bgp_io.c b/bgpd/bgp_io.c
+index 472a5aae59..729a8fe299 100644
+--- a/bgpd/bgp_io.c
++++ b/bgpd/bgp_io.c
+@@ -251,7 +251,7 @@ static void bgp_process_reads(struct event *thread)
+ 		/* Handle the error in the main pthread, include the
+ 		 * specific state change from 'bgp_read'.
+ 		 */
+-		bgp_enqueue_conn_err_peer(peer->bgp, connection->peer, code);
++		bgp_enqueue_conn_err(peer->bgp, connection, code);
+ 		goto done;
+ 	}
+ 
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index 4dadf47d6e..f8073d69e3 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -89,7 +89,7 @@ DEFINE_HOOK(bgp_instance_state, (struct bgp *bgp), (bgp));
+ DEFINE_HOOK(bgp_routerid_update, (struct bgp *bgp, bool withdraw), (bgp, withdraw));
+ 
+ /* Peers with connection error/failure, per bgp instance */
+-DECLARE_DLIST(bgp_peer_conn_errlist, struct peer, conn_err_link);
++DECLARE_DLIST(bgp_peer_conn_errlist, struct peer_connection, conn_err_link);
+ 
+ /* List of info about peers that are being cleared from BGP RIBs in a batch */
+ DECLARE_DLIST(bgp_clearing_info, struct bgp_clearing_info, link);
+@@ -2711,9 +2711,9 @@ int peer_delete(struct peer *peer)
+ 
+ 	/* Ensure the peer is removed from the connection error list */
+ 	frr_with_mutex (&bgp->peer_errs_mtx) {
+-		if (bgp_peer_conn_errlist_anywhere(peer))
++		if (bgp_peer_conn_errlist_anywhere(peer->connection))
+ 			bgp_peer_conn_errlist_del(&bgp->peer_conn_errlist,
+-						  peer);
++						  peer->connection);
+ 	}
+ 
+ 	if (CHECK_FLAG(peer->sflags, PEER_STATUS_NSF_WAIT))
+@@ -4024,6 +4024,7 @@ int bgp_delete(struct bgp *bgp)
+ 	struct bgp *bgp_to_proc_next = NULL;
+ 	struct bgp *bgp_default = bgp_get_default();
+ 	struct bgp_clearing_info *cinfo;
++	struct peer_connection *connection;
+ 
+ 	assert(bgp);
+ 
+@@ -4209,9 +4210,9 @@ int bgp_delete(struct bgp *bgp)
+ 	 */
+ 	frr_with_mutex (&bgp->peer_errs_mtx) {
+ 		do {
+-			peer = bgp_peer_conn_errlist_pop(
++			connection = bgp_peer_conn_errlist_pop(
+ 				&bgp->peer_conn_errlist);
+-		} while (peer != NULL);
++		} while (connection != NULL);
+ 	}
+ 
+ 	/* Free peers and peer-groups. */
+@@ -9239,7 +9240,7 @@ static void bgp_process_conn_error(struct event *event)
+ 	bgp = EVENT_ARG(event);
+ 
+ 	frr_with_mutex (&bgp->peer_errs_mtx) {
+-		peer = bgp_peer_conn_errlist_pop(&bgp->peer_conn_errlist);
++		connection = bgp_peer_conn_errlist_pop(&bgp->peer_conn_errlist);
+ 
+ 		list_count =
+ 			bgp_peer_conn_errlist_count(&bgp->peer_conn_errlist);
+@@ -9252,12 +9253,12 @@ static void bgp_process_conn_error(struct event *event)
+ 		bgp_clearing_batch_begin(bgp);
+ 
+ 	/* Dequeue peers from the error list */
+-	while (peer != NULL) {
+-		connection = peer->connection;
++	while (connection != NULL) {
++		peer = connection->peer;
+ 
+ 		if (bgp_debug_neighbor_events(peer))
+ 			zlog_debug("%s [Event] BGP error %d on fd %d",
+-				   peer->host, peer->connection_errcode,
++				   peer->host, connection->connection_errcode,
+ 				   connection->fd);
+ 
+ 		/* Closed connection or error on the socket */
+@@ -9276,13 +9277,13 @@ static void bgp_process_conn_error(struct event *event)
+ 		bgp_keepalives_off(peer->connection);
+ 
+ 		/* Drive into state-machine changes */
+-		bgp_event_update(connection, peer->connection_errcode);
++		bgp_event_update(connection, connection->connection_errcode);
+ 
+ 		counter++;
+ 		if (counter >= BGP_CONN_ERROR_DEQUEUE_MAX)
+ 			break;
+ 
+-		peer = bgp_dequeue_conn_err_peer(bgp, &more_p);
++		connection = bgp_dequeue_conn_err(bgp, &more_p);
+ 	}
+ 
+ 	/* Reschedule event if necessary */
+@@ -9299,18 +9300,19 @@ static void bgp_process_conn_error(struct event *event)
+ }
+ 
+ /*
+- * Enqueue a peer with a connection error to be handled in the main pthread;
++ * Enqueue a connection with an error to be handled in the main pthread;
+  * this is called from the io pthread.
+  */
+-int bgp_enqueue_conn_err_peer(struct bgp *bgp, struct peer *peer, int errcode)
++int bgp_enqueue_conn_err(struct bgp *bgp, struct peer_connection *connection,
++			 int errcode)
+ {
+ 	frr_with_mutex (&bgp->peer_errs_mtx) {
+-		peer->connection_errcode = errcode;
++		connection->connection_errcode = errcode;
+ 
+ 		/* Careful not to double-enqueue */
+-		if (!bgp_peer_conn_errlist_anywhere(peer)) {
++		if (!bgp_peer_conn_errlist_anywhere(connection)) {
+ 			bgp_peer_conn_errlist_add_tail(&bgp->peer_conn_errlist,
+-						       peer);
++						       connection);
+ 		}
+ 	}
+ 	/* Ensure an event is scheduled */
+@@ -9320,16 +9322,16 @@ int bgp_enqueue_conn_err_peer(struct bgp *bgp, struct peer *peer, int errcode)
+ }
+ 
+ /*
+- * Dequeue a peer that encountered a connection error; signal whether there
++ * Dequeue a connection that encountered a connection error; signal whether there
+  * are more queued peers.
+  */
+-struct peer *bgp_dequeue_conn_err_peer(struct bgp *bgp, bool *more_p)
++struct peer_connection *bgp_dequeue_conn_err(struct bgp *bgp, bool *more_p)
+ {
+-	struct peer *peer = NULL;
++	struct peer_connection *connection = NULL;
+ 	bool more = false;
+ 
+ 	frr_with_mutex (&bgp->peer_errs_mtx) {
+-		peer = bgp_peer_conn_errlist_pop(&bgp->peer_conn_errlist);
++		connection = bgp_peer_conn_errlist_pop(&bgp->peer_conn_errlist);
+ 
+ 		if (bgp_peer_conn_errlist_const_first(
+ 			    &bgp->peer_conn_errlist) != NULL)
+@@ -9339,7 +9341,7 @@ struct peer *bgp_dequeue_conn_err_peer(struct bgp *bgp, bool *more_p)
+ 	if (more_p)
+ 		*more_p = more;
+ 
+-	return peer;
++	return connection;
+ }
+ 
+ /*
+diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
+index 6c619db40d..dbe5473e15 100644
+--- a/bgpd/bgpd.h
++++ b/bgpd/bgpd.h
+@@ -1318,6 +1318,12 @@ struct peer_connection {
+ 
+ 	struct event *t_stop_with_notify;
+ 
++	/* Linkage for list connections with errors, from IO pthread */
++	struct bgp_peer_conn_errlist_item conn_err_link;
++
++	/* Connection error code */
++	uint16_t connection_errcode;
++
+ 	union sockunion su;
+ #define BGP_CONNECTION_SU_UNSPEC(connection)                                   \
+ 	(connection->su.sa.sa_family == AF_UNSPEC)
+@@ -2005,12 +2011,6 @@ struct peer {
+ 	/* Add-Path Paths-Limit */
+ 	struct addpath_paths_limit addpath_paths_limit[AFI_MAX][SAFI_MAX];
+ 
+-	/* Linkage for list of peers with connection errors from IO pthread */
+-	struct bgp_peer_conn_errlist_item conn_err_link;
+-
+-	/* Connection error code */
+-	uint16_t connection_errcode;
+-
+ 	/* Linkage for hash of clearing peers being cleared in a batch */
+ 	struct bgp_clearing_hash_item clear_hash_link;
+ 
+@@ -2654,8 +2654,9 @@ int bgp_global_gr_init(struct bgp *bgp);
+ int bgp_peer_gr_init(struct peer *peer);
+ 
+ /* APIs for the per-bgp peer connection error list */
+-int bgp_enqueue_conn_err_peer(struct bgp *bgp, struct peer *peer, int errcode);
+-struct peer *bgp_dequeue_conn_err_peer(struct bgp *bgp, bool *more_p);
++int bgp_enqueue_conn_err(struct bgp *bgp, struct peer_connection *connection,
++			 int errcode);
++struct peer_connection *bgp_dequeue_conn_err(struct bgp *bgp, bool *more_p);
+ void bgp_conn_err_reschedule(struct bgp *bgp);
+ 
+ #define BGP_GR_ROUTER_DETECT_AND_SEND_CAPABILITY_TO_ZEBRA(_bgp, _peer_list)    \
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0041-bgpd-Allow-batch-clear-to-do-partial-work-and-contin.patch b/src/sonic-frr/patch/0041-bgpd-Allow-batch-clear-to-do-partial-work-and-contin.patch
new file mode 100644
index 00000000000..d5a26f13231
--- /dev/null
+++ b/src/sonic-frr/patch/0041-bgpd-Allow-batch-clear-to-do-partial-work-and-contin.patch
@@ -0,0 +1,682 @@
+From 8950b623df1b14ab5c52204aecb12745fcb72fab Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Wed, 12 Mar 2025 09:55:53 -0400
+Subject: [PATCH 41/56] bgpd: Allow batch clear to do partial work and continue
+ later
+
+Modify the batch clear code to be able to stop after processing
+some of the work and to pick back up again.  This will allow
+the very expensive nature of the batch clearing to be spread out
+and allow bgp to continue to be responsive.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ bgpd/bgp_route.c | 385 +++++++++++++++++++++++++++++++----------------
+ bgpd/bgpd.c      |  28 ++--
+ bgpd/bgpd.h      |  45 +++++-
+ 3 files changed, 310 insertions(+), 148 deletions(-)
+
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index b662c10b0a..89e75f4ba0 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -119,6 +119,8 @@ static const struct message bgp_pmsi_tnltype_str[] = {
+ #define VRFID_NONE_STR "-"
+ #define SOFT_RECONFIG_TASK_MAX_PREFIX 25000
+ 
++static int clear_batch_rib_helper(struct bgp_clearing_info *cinfo);
++
+ static inline char *bgp_route_dump_path_info_flags(struct bgp_path_info *pi,
+ 						   char *buf, size_t len)
+ {
+@@ -6426,124 +6428,165 @@ void bgp_clear_route(struct peer *peer, afi_t afi, safi_t safi)
+ }
+ 
+ /*
+- * Callback scheduled to process prefixes/dests for batch clearing; the
+- * dests were found via a rib walk.
+- * The one-peer version of this uses a per-peer workqueue to manage
+- * rescheduling, but we're just using a fixed limit here.
++ * Clear one path-info during clearing processing
+  */
+-
+-/* Limit the number of dests we'll process per callback */
+-#define BGP_CLEARING_BATCH_MAX_DESTS 100
+-
+-static void bgp_clear_batch_dests_task(struct event *event)
++static void clearing_clear_one_pi(struct bgp_table *table, struct bgp_dest *dest,
++				  struct bgp_path_info *pi)
+ {
+-	struct bgp_clearing_info *cinfo = EVENT_ARG(event);
+-	struct bgp_dest *dest;
+-	struct bgp_path_info *pi, *next;
+-	struct bgp_table *table;
+-	struct bgp *bgp;
+ 	afi_t afi;
+ 	safi_t safi;
+-	int counter = 0;
+-
+-	bgp = cinfo->bgp;
+-
+-next_dest:
+-
+-	dest = bgp_clearing_batch_next_dest(cinfo);
+-	if (dest == NULL)
+-		goto done;
++	struct bgp *bgp;
+ 
+-	table = bgp_dest_table(dest);
++	bgp = table->bgp;
+ 	afi = table->afi;
+ 	safi = table->safi;
+ 
+-	/* Have to check every path: it is possible that we have multiple paths
+-	 * for a prefix from a peer if that peer is using AddPath.
+-	 * Note that the clearing action may change the pi list; we try to do
+-	 * a "safe" iteration.
+-	 */
+-	for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = next) {
+-		next = pi ? pi->next : NULL;
++	/* graceful restart STALE flag set. */
++	if (((CHECK_FLAG(pi->peer->sflags, PEER_STATUS_NSF_WAIT)
++	      && pi->peer->nsf[afi][safi])
++	     || CHECK_FLAG(pi->peer->af_sflags[afi][safi],
++			   PEER_STATUS_ENHANCED_REFRESH))
++	    && !CHECK_FLAG(pi->flags, BGP_PATH_STALE)
++	    && !CHECK_FLAG(pi->flags, BGP_PATH_UNUSEABLE)) {
+ 
+-		if (!bgp_clearing_batch_check_peer(cinfo, pi->peer))
+-			continue;
++		bgp_path_info_set_flag(dest, pi, BGP_PATH_STALE);
++	} else {
++		/* If this is an EVPN route, process for
++		 * un-import. */
++		if (safi == SAFI_EVPN)
++			bgp_evpn_unimport_route(
++				bgp, afi, safi,
++				bgp_dest_get_prefix(dest), pi);
++		/* Handle withdraw for VRF route-leaking and L3VPN */
++		if (SAFI_UNICAST == safi
++		    && (bgp->inst_type == BGP_INSTANCE_TYPE_VRF ||
++			bgp->inst_type == BGP_INSTANCE_TYPE_DEFAULT)) {
++			vpn_leak_from_vrf_withdraw(bgp_get_default(),
++						   bgp, pi);
++		}
++		if (SAFI_MPLS_VPN == safi &&
++		    bgp->inst_type == BGP_INSTANCE_TYPE_DEFAULT) {
++			vpn_leak_to_vrf_withdraw(pi);
++		}
+ 
+-		/* graceful restart STALE flag set. */
+-		if (((CHECK_FLAG(pi->peer->sflags, PEER_STATUS_NSF_WAIT)
+-		      && pi->peer->nsf[afi][safi])
+-		     || CHECK_FLAG(pi->peer->af_sflags[afi][safi],
+-				   PEER_STATUS_ENHANCED_REFRESH))
+-		    && !CHECK_FLAG(pi->flags, BGP_PATH_STALE)
+-		    && !CHECK_FLAG(pi->flags, BGP_PATH_UNUSEABLE))
+-			bgp_path_info_set_flag(dest, pi, BGP_PATH_STALE);
+-		else {
+-			/* If this is an EVPN route, process for
+-			 * un-import. */
+-			if (safi == SAFI_EVPN)
+-				bgp_evpn_unimport_route(
+-					bgp, afi, safi,
+-					bgp_dest_get_prefix(dest), pi);
+-			/* Handle withdraw for VRF route-leaking and L3VPN */
+-			if (SAFI_UNICAST == safi
+-			    && (bgp->inst_type == BGP_INSTANCE_TYPE_VRF ||
+-				bgp->inst_type == BGP_INSTANCE_TYPE_DEFAULT)) {
+-				vpn_leak_from_vrf_withdraw(bgp_get_default(),
+-							   bgp, pi);
+-			}
+-			if (SAFI_MPLS_VPN == safi &&
+-			    bgp->inst_type == BGP_INSTANCE_TYPE_DEFAULT) {
+-				vpn_leak_to_vrf_withdraw(pi);
+-			}
++		bgp_rib_remove(dest, pi, pi->peer, afi, safi);
++	}
++}
+ 
+-			bgp_rib_remove(dest, pi, pi->peer, afi, safi);
+-		}
++/*
++ * Helper to capture interrupt/resume context info for clearing processing. We
++ * may be iterating at two levels, so we may need to capture two levels of context
++ * or keying data.
++ */
++static void set_clearing_resume_info(struct bgp_clearing_info *cinfo,
++				     const struct bgp_table *table,
++				     const struct bgp_dest *dest, bool inner_p)
++{
++	if (bgp_debug_neighbor_events(NULL))
++		zlog_debug("%s: %sinfo for %s/%s %pFX", __func__,
++			   inner_p ? "inner " : "", afi2str(table->afi),
++			   safi2str(table->safi), &dest->rn->p);
++
++	SET_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_RESUME);
++
++	if (inner_p) {
++		cinfo->inner_afi = table->afi;
++		cinfo->inner_safi = table->safi;
++		cinfo->inner_pfx = dest->rn->p;
++		SET_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_INNER);
++	} else {
++		cinfo->last_afi = table->afi;
++		cinfo->last_safi = table->safi;
++		cinfo->last_pfx = dest->rn->p;
+ 	}
++}
+ 
+-	/* Unref this dest and table */
+-	bgp_dest_unlock_node(dest);
+-	bgp_table_unlock(table);
++/*
++ * Helper to establish position in a table, possibly using "resume" info stored
++ * during an iteration
++ */
++static struct bgp_dest *clearing_dest_helper(struct bgp_table *table,
++					     struct bgp_clearing_info *cinfo,
++					     bool inner_p)
++{
++	struct bgp_dest *dest;
++	const struct prefix *pfx;
+ 
+-	counter++;
+-	if (counter < BGP_CLEARING_BATCH_MAX_DESTS)
+-		goto next_dest;
++	/* Iterate at start of table, or resume using inner or outer prefix */
++	dest = bgp_table_top(table);
+ 
+-done:
++	if (CHECK_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_RESUME)) {
++		pfx = NULL;
++		if (inner_p) {
++			if (CHECK_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_INNER))
++				pfx = &(cinfo->inner_pfx);
++		} else {
++			pfx = &(cinfo->last_pfx);
++		}
+ 
+-	/* If there are still dests to process, reschedule. */
+-	if (bgp_clearing_batch_dests_present(cinfo)) {
+-		if (bgp_debug_neighbor_events(NULL))
+-			zlog_debug("%s: Batch %p: Rescheduled after processing %d dests",
+-				   __func__, cinfo, counter);
++		if (pfx) {
++			dest = bgp_node_match(table, pfx);
++			if (dest) {
++				/* if 'dest' matches or precedes the 'last' prefix
++				 * visited, then advance.
++				 */
++				while (dest && (prefix_cmp(&(dest->rn->p), pfx) <= 0))
++					dest = bgp_route_next(dest);
++			}
++		}
++	}
+ 
+-		event_add_event(bm->master, bgp_clear_batch_dests_task, cinfo,
+-				0, &cinfo->t_sched);
+-	} else {
+-		if (bgp_debug_neighbor_events(NULL))
+-			zlog_debug("%s: Batch %p: Done after processing %d dests",
+-				   __func__, cinfo, counter);
++	return dest;
++}
++
++/*
++ * Callback to begin or resume the rib-walk for peer clearing, with info carried in
++ * a clearing context.
++ */
++static void clear_dests_callback(struct event *event)
++{
++	int ret;
++	struct bgp_clearing_info *cinfo = EVENT_ARG(event);
++
++	/* Begin, or continue, work */
++	ret = clear_batch_rib_helper(cinfo);
++	if (ret == 0) {
++		/* All done, clean up context */
+ 		bgp_clearing_batch_completed(cinfo);
++	} else {
++		/* Need to resume the work, with 'cinfo' */
++		event_add_event(bm->master, clear_dests_callback, cinfo, 0,
++				&cinfo->t_sched);
+ 	}
+-
+-	return;
+ }
+ 
+ /*
+- * Walk a single table for batch peer clearing processing
++ * Walk a single table for batch peer clearing processing. Limit the number of dests
++ * examined, and return when reaching the limit. Capture "last" info about the
++ * last dest we process so we can resume later.
+  */
+-static void clear_batch_table_helper(struct bgp_clearing_info *cinfo,
+-				     struct bgp_table *table)
++static int walk_batch_table_helper(struct bgp_clearing_info *cinfo,
++				   struct bgp_table *table, bool inner_p)
+ {
++	int ret = 0;
+ 	struct bgp_dest *dest;
+ 	bool force = (cinfo->bgp->process_queue == NULL);
+-	uint32_t examined = 0, queued = 0;
++	uint32_t examined = 0, processed = 0;
+ 
+-	for (dest = bgp_table_top(table); dest; dest = bgp_route_next(dest)) {
++	/* Locate starting dest, possibly using "resume" info */
++	dest = clearing_dest_helper(table, cinfo, inner_p);
++	if (dest == NULL) {
++		/* Nothing more to do for this table? */
++		return 0;
++	}
++
++	for ( ; dest; dest = bgp_route_next(dest)) {
+ 		struct bgp_path_info *pi, *next;
+ 		struct bgp_adj_in *ain;
+ 		struct bgp_adj_in *ain_next;
+ 
+ 		examined++;
++		cinfo->curr_counter++;
+ 
+ 		ain = dest->adj_in;
+ 		while (ain) {
+@@ -6562,27 +6605,40 @@ static void clear_batch_table_helper(struct bgp_clearing_info *cinfo,
+ 			if (!bgp_clearing_batch_check_peer(cinfo, pi->peer))
+ 				continue;
+ 
+-			queued++;
++			processed++;
+ 
+ 			if (force) {
+ 				bgp_path_info_reap(dest, pi);
+ 			} else {
+-				/* Unlocked after processing */
+-				bgp_table_lock(bgp_dest_table(dest));
+-				bgp_dest_lock_node(dest);
+-
+-				bgp_clearing_batch_add_dest(cinfo, dest);
+-				break;
++				/* Do clearing for this pi */
++				clearing_clear_one_pi(table, dest, pi);
+ 			}
+ 		}
++
++		if (cinfo->curr_counter >= bm->peer_clearing_batch_max_dests) {
++			/* Capture info about last dest seen and break */
++			if (bgp_debug_neighbor_events(NULL))
++				zlog_debug("%s: %s/%s: pfx %pFX reached limit %u",
++					   __func__, afi2str(table->afi),
++					   safi2str(table->safi), &dest->rn->p,
++					   cinfo->curr_counter);
++
++			/* Reset the counter */
++			cinfo->curr_counter = 0;
++			set_clearing_resume_info(cinfo, table, dest, inner_p);
++			ret = -1;
++			break;
++		}
+ 	}
+ 
+ 	if (examined > 0) {
+ 		if (bgp_debug_neighbor_events(NULL))
+-			zlog_debug("%s: %s/%s: examined %u, queued %u",
++			zlog_debug("%s: %s/%s: examined %u dests, processed %u paths",
+ 				   __func__, afi2str(table->afi),
+-				   safi2str(table->safi), examined, queued);
++				   safi2str(table->safi), examined, processed);
+ 	}
++
++	return ret;
+ }
+ 
+ /*
+@@ -6590,37 +6646,96 @@ static void clear_batch_table_helper(struct bgp_clearing_info *cinfo,
+  * dests that are affected by the peers in the batch, enqueue the dests for
+  * async processing.
+  */
+-static void clear_batch_rib_helper(struct bgp_clearing_info *cinfo)
++static int clear_batch_rib_helper(struct bgp_clearing_info *cinfo)
+ {
++	int ret = 0;
+ 	afi_t afi;
+ 	safi_t safi;
+ 	struct bgp_dest *dest;
+-	struct bgp_table *table;
++	struct bgp_table *table, *outer_table;
+ 
+-	FOREACH_AFI_SAFI (afi, safi) {
+-		/* Identify table to be examined */
+-		if (safi != SAFI_MPLS_VPN && safi != SAFI_ENCAP &&
+-		    safi != SAFI_EVPN) {
+-			table = cinfo->bgp->rib[afi][safi];
+-			if (!table)
++	/* Maybe resume afi/safi iteration */
++	if (CHECK_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_RESUME)) {
++		afi = cinfo->last_afi;
++		safi = cinfo->last_safi;
++	} else {
++		afi = AFI_IP;
++		safi = SAFI_UNICAST;
++	}
++
++	/* Iterate through afi/safi combos */
++	for (; afi < AFI_MAX; afi++) {
++		for (; safi < SAFI_MAX; safi++) {
++			/* Identify table to be examined: special handling
++			 * for some SAFIs
++			 */
++			if (bgp_debug_neighbor_events(NULL))
++				zlog_debug("%s: examining AFI/SAFI %s/%s", __func__, afi2str(afi),
++					   safi2str(safi));
++
++			/* Record the tables we've seen and don't repeat */
++			if (cinfo->table_map[afi][safi] > 0)
+ 				continue;
+ 
+-			clear_batch_table_helper(cinfo, table);
+-		} else {
+-			for (dest = bgp_table_top(cinfo->bgp->rib[afi][safi]);
+-			     dest; dest = bgp_route_next(dest)) {
+-				table = bgp_dest_get_bgp_table_info(dest);
+-				if (!table)
++			if (safi != SAFI_MPLS_VPN && safi != SAFI_ENCAP && safi != SAFI_EVPN) {
++				table = cinfo->bgp->rib[afi][safi];
++				if (!table) {
++					/* Invalid table: don't use 'resume' info */
++					UNSET_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_RESUME);
+ 					continue;
++				}
+ 
+-				/* TODO -- record the tables we've seen
+-				 * and don't repeat any?
+-				 */
++				ret = walk_batch_table_helper(cinfo, table, false /*inner*/);
++				if (ret != 0)
++					break;
++
++				cinfo->table_map[afi][safi] = 1;
++
++			} else {
++				/* Process "inner" table for these SAFIs */
++				outer_table = cinfo->bgp->rib[afi][safi];
++
++				/* Begin or resume iteration in "outer" table */
++				dest = clearing_dest_helper(outer_table, cinfo, false);
+ 
+-				clear_batch_table_helper(cinfo, table);
++				for (; dest; dest = bgp_route_next(dest)) {
++					table = bgp_dest_get_bgp_table_info(dest);
++					if (!table) {
++						/* If we resumed to an inner afi/safi, but
++						 * it's no longer valid, reset resume info.
++						 */
++						UNSET_FLAG(cinfo->flags,
++							   BGP_CLEARING_INFO_FLAG_RESUME);
++						continue;
++					}
++
++					/* This will resume the "inner" walk if necessary */
++					ret = walk_batch_table_helper(cinfo, table, true /*inner*/);
++					if (ret != 0) {
++						/* The "inner" resume info will be set; 
++						 * capture the resume info we need
++						 * from the outer afi/safi and dest
++						 */
++						set_clearing_resume_info(cinfo, outer_table, dest,
++									 false);
++						break;
++					}
++				}
++
++				if (ret != 0)
++					break;
++
++				cinfo->table_map[afi][safi] = 1;
+ 			}
++
++			/* We've finished with a table: ensure we don't try to use stale
++			 * resume info.
++			 */
++			UNSET_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_RESUME);
+ 		}
++		safi = SAFI_UNICAST;
+ 	}
++	return ret;
+ }
+ 
+ /*
+@@ -6629,21 +6744,30 @@ static void clear_batch_rib_helper(struct bgp_clearing_info *cinfo)
+  */
+ void bgp_clear_route_batch(struct bgp_clearing_info *cinfo)
+ {
+-	if (bgp_debug_neighbor_events(NULL))
+-		zlog_debug("%s: BGP %s, batch %p", __func__,
+-			   cinfo->bgp->name_pretty, cinfo);
+-
+-	/* Walk the rib, checking the peers in the batch */
+-	clear_batch_rib_helper(cinfo);
++	int ret;
+ 
+-	/* If we found some prefixes, schedule a task to begin work. */
+-	if (bgp_clearing_batch_dests_present(cinfo))
+-		event_add_event(bm->master, bgp_clear_batch_dests_task, cinfo,
+-				0, &cinfo->t_sched);
++	if (bgp_debug_neighbor_events(NULL))
++		zlog_debug("%s: BGP %s, batch %u", __func__,
++			   cinfo->bgp->name_pretty, cinfo->id);
+ 
+-	/* NB -- it's the caller's job to clean up, release refs, etc. if
+-	 * we didn't find any dests
++	/* Walk the rib, checking the peers in the batch. If the rib walk needs
++	 * to continue, a task will be scheduled
+ 	 */
++	ret = clear_batch_rib_helper(cinfo);
++	if (ret == 0) {
++		/* All done - clean up. */
++		bgp_clearing_batch_completed(cinfo);
++	} else {
++		/* Handle pause/resume for the walk: we've captured key info
++		 * in cinfo so we can resume later.
++		 */
++		if (bgp_debug_neighbor_events(NULL))
++			zlog_debug("%s: reschedule cinfo at %s/%s, %pFX", __func__,
++				   afi2str(cinfo->last_afi),
++				   safi2str(cinfo->last_safi), &(cinfo->last_pfx));
++		event_add_event(bm->master, clear_dests_callback, cinfo, 0,
++				&cinfo->t_sched);
++	}
+ }
+ 
+ void bgp_clear_route_all(struct peer *peer)
+@@ -6651,17 +6775,14 @@ void bgp_clear_route_all(struct peer *peer)
+ 	afi_t afi;
+ 	safi_t safi;
+ 
++	if (bgp_debug_neighbor_events(peer))
++		zlog_debug("%s: peer %pBP", __func__, peer);
++
+ 	/* We may be able to batch multiple peers' clearing work: check
+ 	 * and see.
+ 	 */
+-	if (bgp_clearing_batch_add_peer(peer->bgp, peer)) {
+-		if (bgp_debug_neighbor_events(peer))
+-			zlog_debug("%s: peer %pBP batched", __func__, peer);
++	if (bgp_clearing_batch_add_peer(peer->bgp, peer))
+ 		return;
+-	}
+-
+-	if (bgp_debug_neighbor_events(peer))
+-		zlog_debug("%s: peer %pBP", __func__, peer);
+ 
+ 	FOREACH_AFI_SAFI (afi, safi)
+ 		bgp_clear_route(peer, afi, safi);
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index f8073d69e3..71feca5bd6 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -8667,6 +8667,11 @@ void bgp_master_init(struct event_loop *master, const int buffer_size,
+ 	bm->t_bgp_zebra_l2_vni = NULL;
+ 	bm->t_bgp_zebra_l3_vni = NULL;
+ 
++	bm->peer_clearing_batch_id = 1;
++	/* TODO -- make these configurable */
++	bm->peer_conn_errs_dequeue_limit = BGP_CONN_ERROR_DEQUEUE_MAX;
++	bm->peer_clearing_batch_max_dests = BGP_CLEARING_BATCH_MAX_DESTS;
++
+ 	bgp_mac_init();
+ 	/* init the rd id space.
+ 	   assign 0th index in the bitfield,
+@@ -9065,6 +9070,7 @@ static void bgp_clearing_batch_begin(struct bgp *bgp)
+ 	cinfo = XCALLOC(MTYPE_CLEARING_BATCH, sizeof(struct bgp_clearing_info));
+ 
+ 	cinfo->bgp = bgp;
++	cinfo->id = bm->peer_clearing_batch_id++;
+ 
+ 	/* Init hash of peers and list of dests */
+ 	bgp_clearing_hash_init(&cinfo->peers);
+@@ -9100,15 +9106,10 @@ static void bgp_clearing_batch_end(struct bgp *bgp)
+ 	/* Do a RIB walk for the current batch. If it finds dests/prefixes
+ 	 * to work on, this will schedule a task to process
+ 	 * the dests/prefixes in the batch.
++	 * NB this will free the batch if it finishes, or if there was no work
++	 * to do.
+ 	 */
+ 	bgp_clear_route_batch(cinfo);
+-
+-	/* If we found no prefixes/dests, just discard the batch,
+-	 * remembering that we're holding a ref for each peer.
+-	 */
+-	if (bgp_clearing_destlist_count(&cinfo->destlist) == 0) {
+-		bgp_clearing_batch_completed(cinfo);
+-	}
+ }
+ 
+ /* Check whether a dest's peer is relevant to a clearing batch */
+@@ -9211,6 +9212,10 @@ bool bgp_clearing_batch_add_peer(struct bgp *bgp, struct peer *peer)
+ 
+ 			bgp_clearing_hash_add(&cinfo->peers, peer);
+ 			SET_FLAG(peer->flags, PEER_FLAG_CLEARING_BATCH);
++
++			if (bgp_debug_neighbor_events(peer))
++				zlog_debug("%s: peer %pBP batched in %#x", __func__,
++					   peer, cinfo->id);
+ 		}
+ 		return true;
+ 	}
+@@ -9223,17 +9228,12 @@ bool bgp_clearing_batch_add_peer(struct bgp *bgp, struct peer *peer)
+  * encountered in the io pthread. We avoid having the io pthread try
+  * to enqueue fsm events or mess with the peer struct.
+  */
+-
+-/* TODO -- should this be configurable? */
+-/* Max number of peers to process without rescheduling */
+-#define BGP_CONN_ERROR_DEQUEUE_MAX 10
+-
+ static void bgp_process_conn_error(struct event *event)
+ {
+ 	struct bgp *bgp;
+ 	struct peer *peer;
+ 	struct peer_connection *connection;
+-	int counter = 0;
++	uint32_t counter = 0;
+ 	size_t list_count = 0;
+ 	bool more_p = false;
+ 
+@@ -9280,7 +9280,7 @@ static void bgp_process_conn_error(struct event *event)
+ 		bgp_event_update(connection, connection->connection_errcode);
+ 
+ 		counter++;
+-		if (counter >= BGP_CONN_ERROR_DEQUEUE_MAX)
++		if (counter >= bm->peer_conn_errs_dequeue_limit)
+ 			break;
+ 
+ 		connection = bgp_dequeue_conn_err(bgp, &more_p);
+diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
+index dbe5473e15..4008579985 100644
+--- a/bgpd/bgpd.h
++++ b/bgpd/bgpd.h
+@@ -48,6 +48,11 @@ DECLARE_HOOK(bgp_hook_config_write_vrf, (struct vty *vty, struct vrf *vrf),
+ /* Default interval for IPv6 RAs when triggered by BGP unnumbered neighbor. */
+ #define BGP_UNNUM_DEFAULT_RA_INTERVAL 10
+ 
++/* Max number of peers to process without rescheduling */
++#define BGP_CONN_ERROR_DEQUEUE_MAX 10
++/* Limit the number of clearing dests we'll process per callback */
++#define BGP_CLEARING_BATCH_MAX_DESTS 100
++
+ struct update_subgroup;
+ struct bpacket;
+ struct bgp_pbr_config;
+@@ -214,6 +219,16 @@ struct bgp_master {
+ 	/* To preserve ordering of processing of BGP-VRFs for L3 VNIs */
+ 	struct zebra_l3_vni_head zebra_l3_vni_head;
+ 
++	/* ID value for peer clearing batches */
++	uint32_t peer_clearing_batch_id;
++
++	/* Limits for batched peer clearing code:
++	 * Max number of errored peers to process without rescheduling
++	 */
++	uint32_t peer_conn_errs_dequeue_limit;
++	/* Limit the number of clearing dests we'll process per callback */
++	uint32_t peer_clearing_batch_max_dests;
++
+ 	QOBJ_FIELDS;
+ };
+ DECLARE_QOBJ_TYPE(bgp_master);
+@@ -414,6 +429,9 @@ struct bgp_clearing_info {
+ 	/* Hash of peers */
+ 	struct bgp_clearing_hash_head peers;
+ 
++	/* Batch ID, for debugging/logging */
++	uint32_t id;
++
+ 	/* Flags */
+ 	uint32_t flags;
+ 
+@@ -423,9 +441,28 @@ struct bgp_clearing_info {
+ 	/* Event to schedule/reschedule processing */
+ 	struct event *t_sched;
+ 
+-	/* TODO -- id, serial number, for debugging/logging? */
++	/* Info for rescheduling the RIB walk */
++	afi_t last_afi;
++	safi_t last_safi;
++	struct prefix last_pfx;
+ 
+-	/* TODO -- info for rescheduling the RIB walk? future? */
++	/* For some afi/safi (vpn/evpn e.g.), bgp may do an inner walk
++	 * for a related table; the 'last' info represents the outer walk,
++	 * and this info represents the inner walk.
++	 */
++	afi_t inner_afi;
++	safi_t inner_safi;
++	struct prefix inner_pfx;
++
++	/* Map of afi/safi so we don't re-walk any tables */
++	uint8_t table_map[AFI_MAX][SAFI_MAX];
++
++	/* Counters: current iteration, overall total, and processed count. */
++	uint32_t curr_counter;
++	uint32_t total_counter;
++	uint32_t total_processed;
++
++	/* TODO -- id, serial number, for debugging/logging? */
+ 
+ 	/* Linkage for list of batches per bgp */
+ 	struct bgp_clearing_info_item link;
+@@ -433,6 +470,10 @@ struct bgp_clearing_info {
+ 
+ /* Batch is open, new peers can be added */
+ #define BGP_CLEARING_INFO_FLAG_OPEN  (1 << 0)
++/* Batch is resuming iteration after yielding */
++#define BGP_CLEARING_INFO_FLAG_RESUME (1 << 1)
++/* Batch has 'inner' resume info set */
++#define BGP_CLEARING_INFO_FLAG_INNER (1 << 2)
+ 
+ /* BGP instance structure.  */
+ struct bgp {
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch b/src/sonic-frr/patch/0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch
deleted file mode 100644
index 860d928d324..00000000000
--- a/src/sonic-frr/patch/0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 4775b2b2bf39caa4bc5aed10ef44c6dcf9c7fc80 Mon Sep 17 00:00:00 2001
-From: Rajasekar Raja <rajasekarr@nvidia.com>
-Date: Fri, 17 May 2024 15:43:59 -0700
-Subject: [PATCH] bgpd: backpressure - Fix to avoid CPU hog
-
-In case when bgp_evpn_free or bgp_delete is called and the announce_list
-has few items where vpn/bgp does not match, we add the item back to the
-list. Because of this the list count is always > 0 thereby hogging CPU or
-infinite loop.
-
-Ticket: #3905624
-
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index eb5aa9f077..2243ffdc77 100644
---- a/bgpd/bgp_evpn.c
-+++ b/bgpd/bgp_evpn.c
-@@ -6074,9 +6074,11 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni,
- void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	struct bgp_dest *dest = NULL;
-+	uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head);
- 
--	while (zebra_announce_count(&bm->zebra_announce_head)) {
-+	while (ann_count) {
- 		dest = zebra_announce_pop(&bm->zebra_announce_head);
-+		ann_count--;
- 		if (dest->za_vpn == vpn) {
- 			bgp_path_info_unlock(dest->za_bgp_pi);
- 			bgp_dest_unlock_node(dest);
-diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index da133d71c1..492566f8c8 100644
---- a/bgpd/bgpd.c
-+++ b/bgpd/bgpd.c
-@@ -3690,11 +3690,13 @@ int bgp_delete(struct bgp *bgp)
- 	int i;
- 	struct bgp_dest *dest = NULL;
- 	struct graceful_restart_info *gr_info;
-+	uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head);
- 
- 	assert(bgp);
- 
--	while (zebra_announce_count(&bm->zebra_announce_head)) {
-+	while (ann_count) {
- 		dest = zebra_announce_pop(&bm->zebra_announce_head);
-+		ann_count--;
- 		if (dest->za_bgp_pi->peer->bgp == bgp) {
- 			bgp_path_info_unlock(dest->za_bgp_pi);
- 			bgp_dest_unlock_node(dest);
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch b/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch
deleted file mode 100644
index b5dac2ba589..00000000000
--- a/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch
+++ /dev/null
@@ -1,156 +0,0 @@
-From 529cdfa09065c6c77aff4a96a52f0d3bcb385b6f Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 13 Jun 2024 15:30:00 -0400
-Subject: [PATCH 1/5] zebra: Use built in data structure counter
-
-Instead of keeping a counter that is independent
-of the queue's data structure.  Just use the queue's
-built-in counter.  Ensure that it's pthread safe by
-keeping it wrapped inside the mutex for adding/deleting
-to the queue.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
-index b2fee4ff7..f45003cd2 100644
---- a/zebra/dplane_fpm_nl.c
-+++ b/zebra/dplane_fpm_nl.c
-@@ -133,8 +133,6 @@ struct fpm_nl_ctx {
-
- 		/* Amount of data plane context processed. */
- 		_Atomic uint32_t dplane_contexts;
--		/* Amount of data plane contexts enqueued. */
--		_Atomic uint32_t ctxqueue_len;
- 		/* Peak amount of data plane contexts enqueued. */
- 		_Atomic uint32_t ctxqueue_len_peak;
-
-@@ -328,6 +326,12 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd,
-       FPM_STR
-       "FPM statistic counters\n")
- {
-+	uint32_t curr_queue_len;
-+
-+	frr_with_mutex (&gfnc->ctxqueue_mutex) {
-+		curr_queue_len = dplane_ctx_queue_count(&gfnc->ctxqueue);
-+	}
-+
- 	vty_out(vty, "%30s\n%30s\n", "FPM counters", "============");
-
- #define SHOW_COUNTER(label, counter) \
-@@ -341,8 +345,7 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd,
- 	SHOW_COUNTER("Connection errors", gfnc->counters.connection_errors);
- 	SHOW_COUNTER("Data plane items processed",
- 		     gfnc->counters.dplane_contexts);
--	SHOW_COUNTER("Data plane items enqueued",
--		     gfnc->counters.ctxqueue_len);
-+	SHOW_COUNTER("Data plane items enqueued", curr_queue_len);
- 	SHOW_COUNTER("Data plane items queue peak",
- 		     gfnc->counters.ctxqueue_len_peak);
- 	SHOW_COUNTER("Buffer full hits", gfnc->counters.buffer_full);
-@@ -361,6 +364,12 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd,
-       "FPM statistic counters\n"
-       JSON_STR)
- {
-+	uint32_t curr_queue_len;
-+
-+	frr_with_mutex (&gfnc->ctxqueue_mutex) {
-+		curr_queue_len = dplane_ctx_queue_count(&gfnc->ctxqueue);
-+	}
-+
- 	struct json_object *jo;
-
- 	jo = json_object_new_object();
-@@ -374,8 +383,7 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd,
- 			    gfnc->counters.connection_errors);
- 	json_object_int_add(jo, "data-plane-contexts",
- 			    gfnc->counters.dplane_contexts);
--	json_object_int_add(jo, "data-plane-contexts-queue",
--			    gfnc->counters.ctxqueue_len);
-+	json_object_int_add(jo, "data-plane-contexts-queue", curr_queue_len);
- 	json_object_int_add(jo, "data-plane-contexts-queue-peak",
- 			    gfnc->counters.ctxqueue_len_peak);
- 	json_object_int_add(jo, "buffer-full-hits", gfnc->counters.buffer_full);
-@@ -1427,8 +1435,6 @@ static void fpm_process_queue(struct event *t)
-
- 		/* Account the processed entries. */
- 		processed_contexts++;
--		atomic_fetch_sub_explicit(&fnc->counters.ctxqueue_len, 1,
--					  memory_order_relaxed);
-
- 		dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS);
- 		dplane_provider_enqueue_out_ctx(fnc->prov, ctx);
-@@ -1602,7 +1608,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
- 	struct zebra_dplane_ctx *ctx;
- 	struct fpm_nl_ctx *fnc;
- 	int counter, limit;
--	uint64_t cur_queue, peak_queue = 0, stored_peak_queue;
-+	uint64_t cur_queue = 0, peak_queue = 0, stored_peak_queue;
-
- 	fnc = dplane_provider_get_data(prov);
- 	limit = dplane_provider_get_work_limit(prov);
-@@ -1616,20 +1622,12 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
- 		 * anyway.
- 		 */
- 		if (fnc->socket != -1 && fnc->connecting == false) {
--			/*
--			 * Update the number of queued contexts *before*
--			 * enqueueing, to ensure counter consistency.
--			 */
--			atomic_fetch_add_explicit(&fnc->counters.ctxqueue_len,
--						  1, memory_order_relaxed);
--
- 			frr_with_mutex (&fnc->ctxqueue_mutex) {
- 				dplane_ctx_enqueue_tail(&fnc->ctxqueue, ctx);
-+				cur_queue =
-+					dplane_ctx_queue_count(&fnc->ctxqueue);
- 			}
-
--			cur_queue = atomic_load_explicit(
--				&fnc->counters.ctxqueue_len,
--				memory_order_relaxed);
- 			if (peak_queue < cur_queue)
- 				peak_queue = cur_queue;
- 			continue;
-@@ -1646,9 +1644,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
- 		atomic_store_explicit(&fnc->counters.ctxqueue_len_peak,
- 				      peak_queue, memory_order_relaxed);
-
--	if (atomic_load_explicit(&fnc->counters.ctxqueue_len,
--				 memory_order_relaxed)
--	    > 0)
-+	if (cur_queue > 0)
- 		event_add_event(fnc->fthread->master, fpm_process_queue, fnc, 0,
- 				&fnc->t_dequeue);
-
-diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index 70ce555b1..a53bf8b25 100644
---- a/zebra/zebra_dplane.c
-+++ b/zebra/zebra_dplane.c
-@@ -956,6 +956,11 @@ struct zebra_dplane_ctx *dplane_ctx_dequeue(struct dplane_ctx_list_head *q)
- 	return ctx;
- }
-
-+uint32_t dplane_ctx_queue_count(struct dplane_ctx_list_head *q)
-+{
-+	return dplane_ctx_list_count(q);
-+}
-+
- /*
-  * Accessors for information from the context object
-  */
-diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h
-index 2f7d21850..51c1bff5d 100644
---- a/zebra/zebra_dplane.h
-+++ b/zebra/zebra_dplane.h
-@@ -316,6 +316,8 @@ struct zebra_dplane_ctx *dplane_ctx_get_head(struct dplane_ctx_list_head *q);
- /* Init a list of contexts */
- void dplane_ctx_q_init(struct dplane_ctx_list_head *q);
-
-+uint32_t dplane_ctx_queue_count(struct dplane_ctx_list_head *q);
-+
- /*
-  * Accessors for information from the context object
-  */
---
-2.39.4
-
diff --git a/src/sonic-frr/patch/0042-zebra-V6-RA-not-sent-anymore-after-interface-up-down.patch b/src/sonic-frr/patch/0042-zebra-V6-RA-not-sent-anymore-after-interface-up-down.patch
new file mode 100644
index 00000000000..47ec937d1af
--- /dev/null
+++ b/src/sonic-frr/patch/0042-zebra-V6-RA-not-sent-anymore-after-interface-up-down.patch
@@ -0,0 +1,156 @@
+From 623bfe6d7e50fe57f57b0188fb0830d4790538a0 Mon Sep 17 00:00:00 2001
+From: Soumya Roy <souroy@nvidia.com>
+Date: Fri, 21 Mar 2025 20:06:59 +0000
+Subject: [PATCH 42/56] zebra: V6 RA not sent anymore after interface
+ up-down-up
+
+Issue:
+Once interface is shutdown, the interface is removed from
+wheel timer. Now when the interface is up again, current code
+won't add the interface to wheel timer again, so it won't send RA
+anymore for that interface
+
+Fix:
+Moved wheel_add for interface inside rtadv_start_interface_events
+This is more common function which gets triggered for both
+RA enable and interface up event
+
+Also on any kind of interface activation event, we try to send
+RA as soon as possible. This is to satisfy requirement where
+quick RA is needed, especially for some convergence, dependent on
+RA.
+
+Testing:
+Did ineterface up to down to up
+Added debug log for RA, checked it is getting advertised preodically
+after when up at up state
+
+show bgp summary for 512 bgp peers for bgp bgp unnumbered works fine.
+
+Signed-off-by: Soumya Roy <souroy@nvidia.com>
+---
+ zebra/interface.c |  3 ++-
+ zebra/rtadv.c     | 24 +++++++++++++++++-------
+ zebra/rtadv.h     |  4 ++--
+ 3 files changed, 21 insertions(+), 10 deletions(-)
+
+diff --git a/zebra/interface.c b/zebra/interface.c
+index e49e8eac5e..e64e8271f7 100644
+--- a/zebra/interface.c
++++ b/zebra/interface.c
+@@ -987,6 +987,7 @@ void if_down(struct interface *ifp)
+ 	zif->down_count++;
+ 	frr_timestamp(2, zif->down_last, sizeof(zif->down_last));
+ 
++	rtadv_stop_ra(ifp, true);
+ 	if_down_nhg_dependents(ifp);
+ 
+ 	/* Handle interface down for specific types for EVPN. Non-VxLAN
+@@ -3704,7 +3705,7 @@ int if_shutdown(struct interface *ifp)
+ 
+ 	if (ifp->ifindex != IFINDEX_INTERNAL) {
+ 		/* send RA lifetime of 0 before stopping. rfc4861/6.2.5 */
+-		rtadv_stop_ra(ifp);
++		rtadv_stop_ra(ifp, false);
+ 		if (if_unset_flags(ifp, IFF_UP) < 0) {
+ 			zlog_debug("Can't shutdown interface %s", ifp->name);
+ 			return -1;
+diff --git a/zebra/rtadv.c b/zebra/rtadv.c
+index 014021dba6..ab796fa44d 100644
+--- a/zebra/rtadv.c
++++ b/zebra/rtadv.c
+@@ -1333,8 +1333,11 @@ static void rtadv_start_interface_events(struct zebra_vrf *zvrf,
+ 	}
+ 
+ 	adv_if = adv_if_add(zvrf, zif->ifp->name);
+-	if (adv_if != NULL)
++	if (adv_if != NULL) {
++		rtadv_send_packet(zvrf->rtadv.sock, zif->ifp, RA_ENABLE);
++		wheel_add_item(zrouter.ra_wheel, zif->ifp);
+ 		return; /* Already added */
++	}
+ 
+ 	if (if_join_all_router(zvrf->rtadv.sock, zif->ifp)) {
+ 		/*Failed to join on 1st attempt, wait random amount of time between 1 ms 
+@@ -1346,6 +1349,9 @@ static void rtadv_start_interface_events(struct zebra_vrf *zvrf,
+ 
+ 	if (adv_if_list_count(&zvrf->rtadv.adv_if) == 1)
+ 		rtadv_event(zvrf, RTADV_START, 0);
++
++	rtadv_send_packet(zvrf->rtadv.sock, zif->ifp, RA_ENABLE);
++	wheel_add_item(zrouter.ra_wheel, zif->ifp);
+ }
+ 
+ void ipv6_nd_suppress_ra_set(struct interface *ifp,
+@@ -1394,7 +1400,6 @@ void ipv6_nd_suppress_ra_set(struct interface *ifp,
+ 					RTADV_NUM_FAST_REXMITS;
+ 			}
+ 
+-			wheel_add_item(zrouter.ra_wheel, ifp);
+ 			rtadv_start_interface_events(zvrf, zif);
+ 		}
+ 	}
+@@ -1514,20 +1519,25 @@ stream_failure:
+  * ceasing to advertise and want to let our neighbors know.
+  * RFC 4861 secion 6.2.5
+  */
+-void rtadv_stop_ra(struct interface *ifp)
++void rtadv_stop_ra(struct interface *ifp, bool if_down_event)
+ {
+ 	struct zebra_if *zif;
+ 	struct zebra_vrf *zvrf;
+ 
+-	zif = ifp->info;
+-	zvrf = rtadv_interface_get_zvrf(ifp);
+-
+ 	/*Try to delete from ra wheels */
+ 	wheel_remove_item(zrouter.ra_wheel, ifp);
+ 
++	zif = ifp->info;
++	zvrf = rtadv_interface_get_zvrf(ifp);
++
+ 	/*Turn off event for ICMPv6 join*/
+ 	EVENT_OFF(zif->icmpv6_join_timer);
+ 
++	if (if_down_event) {
++		/* Nothing to do more, return */
++		return;
++	}
++
+ 	if (zif->rtadv.AdvSendAdvertisements)
+ 		rtadv_send_packet(zvrf->rtadv.sock, ifp, RA_SUPPRESS);
+ }
+@@ -1555,7 +1565,7 @@ void rtadv_stop_ra_all(void)
+ 				       rprefix)
+ 				rtadv_prefix_reset(zif, rprefix, rprefix);
+ 
+-			rtadv_stop_ra(ifp);
++			rtadv_stop_ra(ifp, false);
+ 		}
+ }
+ 
+diff --git a/zebra/rtadv.h b/zebra/rtadv.h
+index 73d737ce41..5b92d570d2 100644
+--- a/zebra/rtadv.h
++++ b/zebra/rtadv.h
+@@ -376,7 +376,7 @@ enum ipv6_nd_suppress_ra_status {
+ 
+ extern void rtadv_vrf_init(struct zebra_vrf *zvrf);
+ extern void rtadv_vrf_terminate(struct zebra_vrf *zvrf);
+-extern void rtadv_stop_ra(struct interface *ifp);
++extern void rtadv_stop_ra(struct interface *ifp, bool if_down_event);
+ extern void rtadv_stop_ra_all(void);
+ extern void rtadv_cmd_init(void);
+ extern void rtadv_if_init(struct zebra_if *zif);
+@@ -446,7 +446,7 @@ static inline void rtadv_delete_prefix(struct zebra_if *zif,
+ 				       const struct prefix *p)
+ {
+ }
+-static inline void rtadv_stop_ra(struct interface *ifp)
++static inline void rtadv_stop_ra(struct interface *ifp, bool if_down_event)
+ {
+ }
+ static inline void rtadv_stop_ra_all(void)
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0043-bgpd-Paths-received-from-shutdown-peer-not-deleted.patch b/src/sonic-frr/patch/0043-bgpd-Paths-received-from-shutdown-peer-not-deleted.patch
new file mode 100644
index 00000000000..1fb0e22feef
--- /dev/null
+++ b/src/sonic-frr/patch/0043-bgpd-Paths-received-from-shutdown-peer-not-deleted.patch
@@ -0,0 +1,88 @@
+From 14545d84ccb1a1d0b50ec6a7d354a81cb9b1bf01 Mon Sep 17 00:00:00 2001
+From: Soumya Roy <souroy@nvidia.com>
+Date: Mon, 7 Apr 2025 05:36:09 +0000
+Subject: [PATCH 43/56] bgpd: Paths, received from shutdown peer, not deleted
+
+Issue:
+In a scaled setup, (where number of nets > BGP_CLEARING_BATCH_MAX_DESTS
+for walk_batch_table_helper), when peer is shutdown, it is seen some
+of the paths are not deleted, which are received from that peer.
+
+Fix:
+This is due to, in clear_batch_rib_helper, once walk_batch_table_helper
+returns after BGP_CLEARING_BATCH_MAX_DESTS is reached, we just break
+from inner loop for the afi/safi for loops. So during walk for next
+afi/safi that 'ret' state is overwritten with new state. Also the
+resume context is overwritten. This causes to lose the start point
+for next walk, some nets are skipped forever. So they are not marked
+for deletion anymore. To fix this, we immediately return from current
+run. This will have resume state to be stored correctly, and next walk
+will start from there.
+
+Testing:
+32 ecmp paths were received from the shutdown peer
+Before fix:
+show bgp ipv6 2052:52:1:167::/64
+BGP routing table entry for 2052:52:1:167::/64, version 495
+Paths: (246 available, best #127, table default)
+  Not advertised to any peer
+
+<snip>
+  4200165500 4200165002
+    2021:21:51:101::2(spine-5) from spine-5(2021:21:51:101::2) (6.0.0.17)
+    (fe80::202:ff:fe00:55) (prefer-global)
+      Origin incomplete, valid, external, multipath
+      Last update: Fri Apr  4 17:25:05 2025
+  4200165500 4200165002
+    2021:21:11:116::2(spine-1) from spine-1(2021:21:11:116::2) (0.0.0.0)
+    (fe80::202:ff:fe00:3d) (prefer-global)<<<<path not deleted
+      Origin incomplete, valid, external
+      Last update: Fri Apr  4 17:25:05 2025
+  4200165500 4200165002
+    2021:21:11:115::2(spine-1) from spine-1(2021:21:11:115::2) (0.0.0.0)
+    (fe80::202:ff:fe00:3d) (prefer-global)<<<<path not deleted
+      Origin incomplete, valid, external
+      Last update: Fri Apr  4 17:25:05 2025
+<snip>
+
+ 32 paths are supposed to be withdrawn:
+root@leaf-1:mgmt:# vtysh -c "show bgp ipv6 2052:52:1:167::/64" | grep "prefer-global" | wc -l
+256
+root@leaf-1:mgmt# vtysh -c "show bgp ipv6 2052:52:1:167::/64" | grep "prefer-global" | wc -l
+246<<should be 224, but showing 246, which is wrong
+After fix:
+ 32 paths are supposed to be withdrawn:
+root@leaf-1:mgmt:# vtysh -c "show bgp ipv6 2052:52:1:167::/64" | grep "prefer-global" | wc -l
+256
+root@leaf-1:mgmt:# vtysh -c "show bgp ipv6 2052:52:1:167::/64" | grep "prefer-global" | wc -l
+224<<<shows correctly
+
+Signed-off-by: Soumya Roy <souroy@nvidia.com>
+---
+ bgpd/bgp_route.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index 89e75f4ba0..859ac26c1c 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -6733,6 +6733,16 @@ static int clear_batch_rib_helper(struct bgp_clearing_info *cinfo)
+ 			 */
+ 			UNSET_FLAG(cinfo->flags, BGP_CLEARING_INFO_FLAG_RESUME);
+ 		}
++
++		/* Return immediately, otherwise the 'ret' state will be overwritten
++		 * by next afi/safi. Also resume state stored for current afi/safi
++		 * in walk_batch_table_helper, will be overwritten. This may cause to
++		 * skip the nets to be walked again, so they won't be marked for deletion
++		 * from BGP table
++		 */
++		if (ret != 0)
++			return ret;
++
+ 		safi = SAFI_UNICAST;
+ 	}
+ 	return ret;
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0043-zebra-Use-the-ctx-queue-counters.patch b/src/sonic-frr/patch/0043-zebra-Use-the-ctx-queue-counters.patch
deleted file mode 100644
index e57684aee9a..00000000000
--- a/src/sonic-frr/patch/0043-zebra-Use-the-ctx-queue-counters.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 59e2b19d2d08349ef0197b0adcb13d0bd7de2b79 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 17 Jun 2024 11:05:28 -0400
-Subject: [PATCH 2/5] zebra: Use the ctx queue counters
-
-The ctx queue data structures already have a counter
-associated with them.  Let's just use them instead.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index c252a370b8..c52e032660 100644
---- a/zebra/zebra_dplane.c
-+++ b/zebra/zebra_dplane.c
-@@ -492,10 +492,8 @@ struct zebra_dplane_provider {
- 	int (*dp_fini)(struct zebra_dplane_provider *prov, bool early_p);
- 
- 	_Atomic uint32_t dp_in_counter;
--	_Atomic uint32_t dp_in_queued;
- 	_Atomic uint32_t dp_in_max;
- 	_Atomic uint32_t dp_out_counter;
--	_Atomic uint32_t dp_out_queued;
- 	_Atomic uint32_t dp_out_max;
- 	_Atomic uint32_t dp_error_counter;
- 
-@@ -6008,17 +6006,19 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed)
- 
- 	/* Show counters, useful info from each registered provider */
- 	while (prov) {
-+		dplane_provider_lock(prov);
-+		in_q = dplane_ctx_queue_count(&prov->dp_ctx_in_list);
-+		out_q = dplane_ctx_queue_count(&prov->dp_ctx_out_list);
-+		dplane_provider_unlock(prov);
- 
- 		in = atomic_load_explicit(&prov->dp_in_counter,
- 					  memory_order_relaxed);
--		in_q = atomic_load_explicit(&prov->dp_in_queued,
--					    memory_order_relaxed);
-+
- 		in_max = atomic_load_explicit(&prov->dp_in_max,
- 					      memory_order_relaxed);
- 		out = atomic_load_explicit(&prov->dp_out_counter,
- 					   memory_order_relaxed);
--		out_q = atomic_load_explicit(&prov->dp_out_queued,
--					     memory_order_relaxed);
-+
- 		out_max = atomic_load_explicit(&prov->dp_out_max,
- 					       memory_order_relaxed);
- 
-@@ -6169,10 +6169,6 @@ struct zebra_dplane_ctx *dplane_provider_dequeue_in_ctx(
- 	dplane_provider_lock(prov);
- 
- 	ctx = dplane_ctx_list_pop(&(prov->dp_ctx_in_list));
--	if (ctx) {
--		atomic_fetch_sub_explicit(&prov->dp_in_queued, 1,
--					  memory_order_relaxed);
--	}
- 
- 	dplane_provider_unlock(prov);
- 
-@@ -6200,10 +6196,6 @@ int dplane_provider_dequeue_in_list(struct zebra_dplane_provider *prov,
- 			break;
- 	}
- 
--	if (ret > 0)
--		atomic_fetch_sub_explicit(&prov->dp_in_queued, ret,
--					  memory_order_relaxed);
--
- 	dplane_provider_unlock(prov);
- 
- 	return ret;
-@@ -6228,10 +6220,7 @@ void dplane_provider_enqueue_out_ctx(struct zebra_dplane_provider *prov,
- 	dplane_ctx_list_add_tail(&(prov->dp_ctx_out_list), ctx);
- 
- 	/* Maintain out-queue counters */
--	atomic_fetch_add_explicit(&(prov->dp_out_queued), 1,
--				  memory_order_relaxed);
--	curr = atomic_load_explicit(&prov->dp_out_queued,
--				    memory_order_relaxed);
-+	curr = dplane_ctx_queue_count(&prov->dp_ctx_out_list);
- 	high = atomic_load_explicit(&prov->dp_out_max,
- 				    memory_order_relaxed);
- 	if (curr > high)
-@@ -6253,9 +6242,6 @@ dplane_provider_dequeue_out_ctx(struct zebra_dplane_provider *prov)
- 	if (!ctx)
- 		return NULL;
- 
--	atomic_fetch_sub_explicit(&(prov->dp_out_queued), 1,
--				  memory_order_relaxed);
--
- 	return ctx;
- }
- 
-@@ -7260,10 +7246,7 @@ static void dplane_thread_loop(struct thread *event)
- 
- 		atomic_fetch_add_explicit(&prov->dp_in_counter, counter,
- 					  memory_order_relaxed);
--		atomic_fetch_add_explicit(&prov->dp_in_queued, counter,
--					  memory_order_relaxed);
--		curr = atomic_load_explicit(&prov->dp_in_queued,
--					    memory_order_relaxed);
-+		curr = dplane_ctx_queue_count(&prov->dp_ctx_in_list);
- 		high = atomic_load_explicit(&prov->dp_in_max,
- 					    memory_order_relaxed);
- 		if (curr > high)
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0044-bgpd-Modify-bgp-to-handle-packet-events-in-a-FIFO.patch b/src/sonic-frr/patch/0044-bgpd-Modify-bgp-to-handle-packet-events-in-a-FIFO.patch
new file mode 100644
index 00000000000..4a29783a4ef
--- /dev/null
+++ b/src/sonic-frr/patch/0044-bgpd-Modify-bgp-to-handle-packet-events-in-a-FIFO.patch
@@ -0,0 +1,387 @@
+From 4d239502ef664c850f8fab5d7e80bed4e2d6f33c Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Fri, 21 Mar 2025 07:48:50 -0400
+Subject: [PATCH 44/56] bgpd: Modify bgp to handle packet events in a FIFO
+
+Current behavor of BGP is to have a event per connection.  Given
+that on startup of BGP with a high number of neighbors you end
+up with 2 * # of peers events that are being processed.  Additionally
+once BGP has selected the connection this still only comes down
+to 512 events.  This number of events is swamping the event system
+and in addition delaying any other work from being done in BGP at
+all because the the 512 events are always going to take precedence
+over everything else.  The other main events are the handling
+of the metaQ(1 event), update group events( 1 per update group )
+and the zebra batching event.  These are being swamped.
+
+Modify the BGP code to have a FIFO of connections.  As new data
+comes in to read, place the connection on the end of the FIFO.
+Have the bgp_process_packet handle up to 100 packets spread
+across the individual peers where each peer/connection is limited
+to the original quanta.  During testing I noticed that withdrawal
+events at very very large scale are taking up to 40 seconds to process
+so I added a check for yielding to further limit the number of packets
+being processed.
+
+This change also allow for BGP to be interactive again on scale
+setups on initial convergence.  Prior to this change any vtysh
+command entered would be delayed by 10's of seconds in my setup
+while BGP was doing other work.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ bgpd/bgp_fsm.c    |  15 ++++--
+ bgpd/bgp_io.c     |  16 ++++--
+ bgpd/bgp_io.h     |   1 +
+ bgpd/bgp_main.c   |   8 +++
+ bgpd/bgp_packet.c | 127 ++++++++++++++++++++++++++++++++++++++--------
+ bgpd/bgpd.c       |   4 ++
+ bgpd/bgpd.h       |  16 +++++-
+ 7 files changed, 158 insertions(+), 29 deletions(-)
+
+diff --git a/bgpd/bgp_fsm.c b/bgpd/bgp_fsm.c
+index d1f74ac375..d332aca097 100644
+--- a/bgpd/bgp_fsm.c
++++ b/bgpd/bgp_fsm.c
+@@ -184,7 +184,11 @@ static struct peer *peer_xfer_conn(struct peer *from_peer)
+ 	EVENT_OFF(keeper->t_delayopen);
+ 	EVENT_OFF(keeper->t_connect_check_r);
+ 	EVENT_OFF(keeper->t_connect_check_w);
+-	EVENT_OFF(keeper->t_process_packet);
++
++	frr_with_mutex (&bm->peer_connection_mtx) {
++		if (peer_connection_fifo_member(&bm->connection_fifo, keeper))
++			peer_connection_fifo_del(&bm->connection_fifo, keeper);
++	}
+ 
+ 	/*
+ 	 * At this point in time, it is possible that there are packets pending
+@@ -305,8 +309,13 @@ static struct peer *peer_xfer_conn(struct peer *from_peer)
+ 
+ 	bgp_reads_on(keeper);
+ 	bgp_writes_on(keeper);
+-	event_add_event(bm->master, bgp_process_packet, keeper, 0,
+-			&keeper->t_process_packet);
++
++	frr_with_mutex (&bm->peer_connection_mtx) {
++		if (!peer_connection_fifo_member(&bm->connection_fifo, keeper)) {
++			peer_connection_fifo_add_tail(&bm->connection_fifo, keeper);
++		}
++	}
++	event_add_event(bm->master, bgp_process_packet, NULL, 0, &bm->e_process_packet);
+ 
+ 	return (peer);
+ }
+diff --git a/bgpd/bgp_io.c b/bgpd/bgp_io.c
+index 729a8fe299..dac915a73d 100644
+--- a/bgpd/bgp_io.c
++++ b/bgpd/bgp_io.c
+@@ -99,7 +99,11 @@ void bgp_reads_off(struct peer_connection *connection)
+ 	assert(fpt->running);
+ 
+ 	event_cancel_async(fpt->master, &connection->t_read, NULL);
+-	EVENT_OFF(connection->t_process_packet);
++
++	frr_with_mutex (&bm->peer_connection_mtx) {
++		if (peer_connection_fifo_member(&bm->connection_fifo, connection))
++			peer_connection_fifo_del(&bm->connection_fifo, connection);
++	}
+ 
+ 	UNSET_FLAG(connection->thread_flags, PEER_THREAD_READS_ON);
+ }
+@@ -292,9 +296,13 @@ done:
+ 
+ 	event_add_read(fpt->master, bgp_process_reads, connection,
+ 		       connection->fd, &connection->t_read);
+-	if (added_pkt)
+-		event_add_event(bm->master, bgp_process_packet, connection, 0,
+-				&connection->t_process_packet);
++	if (added_pkt) {
++		frr_with_mutex (&bm->peer_connection_mtx) {
++			if (!peer_connection_fifo_member(&bm->connection_fifo, connection))
++				peer_connection_fifo_add_tail(&bm->connection_fifo, connection);
++		}
++		event_add_event(bm->master, bgp_process_packet, NULL, 0, &bm->e_process_packet);
++	}
+ }
+ 
+ /*
+diff --git a/bgpd/bgp_io.h b/bgpd/bgp_io.h
+index 8d481129e5..278980fde6 100644
+--- a/bgpd/bgp_io.h
++++ b/bgpd/bgp_io.h
+@@ -10,6 +10,7 @@
+ 
+ #define BGP_WRITE_PACKET_MAX 64U
+ #define BGP_READ_PACKET_MAX  10U
++#define BGP_PACKET_PROCESS_LIMIT 100
+ 
+ #include "bgpd/bgpd.h"
+ #include "frr_pthread.h"
+diff --git a/bgpd/bgp_main.c b/bgpd/bgp_main.c
+index 9dbef791b0..1dbac2b864 100644
+--- a/bgpd/bgp_main.c
++++ b/bgpd/bgp_main.c
+@@ -161,6 +161,14 @@ __attribute__((__noreturn__)) void sigint(void)
+ 
+ 	bgp_exit(0);
+ 
++	/*
++	 * This is being done after bgp_exit because items may be removed
++	 * from the connection_fifo
++	 */
++	peer_connection_fifo_fini(&bm->connection_fifo);
++	EVENT_OFF(bm->e_process_packet);
++	pthread_mutex_destroy(&bm->peer_connection_mtx);
++
+ 	exit(0);
+ }
+ 
+diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c
+index 572d651bfd..8da807be47 100644
+--- a/bgpd/bgp_packet.c
++++ b/bgpd/bgp_packet.c
+@@ -3951,6 +3951,18 @@ int bgp_capability_receive(struct peer_connection *connection,
+  * would not, making event flow difficult to understand. Please think twice
+  * before hacking this.
+  *
++ * packet_processing is now a FIFO of connections that need to be handled
++ * This loop has a maximum run of 100(BGP_PACKET_PROCESS_LIMIT) packets,
++ * but each individual connection can only handle the quanta value as
++ * specified in bgp_vty.c.  If the connection still has work to do, place it
++ * back on the back of the queue for more work.  Do note that event_should_yield
++ * is also being called to figure out if processing should stop and work
++ * picked up after other items can run.  This was added *After* withdrawals
++ * started being processed at scale and this function was taking cpu for 40+ seconds
++ * On my machine we are getting 2-3 packets before a yield should happen in the
++ * update case.  Withdrawal is 1 packet being processed(note this is a very very
++ * fast computer) before other items should be run.
++ *
+  * Thread type: EVENT_EVENT
+  * @param thread
+  * @return 0
+@@ -3963,30 +3975,54 @@ void bgp_process_packet(struct event *thread)
+ 	uint32_t rpkt_quanta_old; // how many packets to read
+ 	int fsm_update_result;    // return code of bgp_event_update()
+ 	int mprc;		  // message processing return code
++	uint32_t processed = 0, curr_connection_processed = 0;
++	bool more_work = false;
++	size_t count;
++	uint32_t total_packets_to_process, total_processed = 0;
++
++	frr_with_mutex (&bm->peer_connection_mtx)
++		connection = peer_connection_fifo_pop(&bm->connection_fifo);
++
++	if (!connection)
++		goto done;
+ 
+-	connection = EVENT_ARG(thread);
++	total_packets_to_process = BGP_PACKET_PROCESS_LIMIT;
+ 	peer = connection->peer;
+ 	rpkt_quanta_old = atomic_load_explicit(&peer->bgp->rpkt_quanta,
+ 					       memory_order_relaxed);
++
+ 	fsm_update_result = 0;
+ 
+-	/* Guard against scheduled events that occur after peer deletion. */
+-	if (connection->status == Deleted || connection->status == Clearing)
+-		return;
++	while ((processed < total_packets_to_process) && connection) {
++		total_processed++;
++		/* Guard against scheduled events that occur after peer deletion. */
++		if (connection->status == Deleted || connection->status == Clearing) {
++			frr_with_mutex (&bm->peer_connection_mtx)
++				connection = peer_connection_fifo_pop(&bm->connection_fifo);
+ 
+-	unsigned int processed = 0;
++			if (connection)
++				peer = connection->peer;
++
++			continue;
++		}
+ 
+-	while (processed < rpkt_quanta_old) {
+ 		uint8_t type = 0;
+ 		bgp_size_t size;
+ 		char notify_data_length[2];
+ 
+-		frr_with_mutex (&connection->io_mtx) {
++		frr_with_mutex (&connection->io_mtx)
+ 			peer->curr = stream_fifo_pop(connection->ibuf);
+-		}
+ 
+-		if (peer->curr == NULL) // no packets to process, hmm...
+-			return;
++		if (peer->curr == NULL) {
++			frr_with_mutex (&bm->peer_connection_mtx)
++				connection = peer_connection_fifo_pop(&bm->connection_fifo);
++
++
++			if (connection)
++				peer = connection->peer;
++
++			continue;
++		}
+ 
+ 		/* skip the marker and copy the packet length */
+ 		stream_forward_getp(peer->curr, BGP_MARKER_SIZE);
+@@ -4090,32 +4126,81 @@ void bgp_process_packet(struct event *thread)
+ 		stream_free(peer->curr);
+ 		peer->curr = NULL;
+ 		processed++;
++		curr_connection_processed++;
+ 
+ 		/* Update FSM */
+ 		if (mprc != BGP_PACKET_NOOP)
+ 			fsm_update_result = bgp_event_update(connection, mprc);
+-		else
+-			continue;
+ 
+ 		/*
+ 		 * If peer was deleted, do not process any more packets. This
+ 		 * is usually due to executing BGP_Stop or a stub deletion.
+ 		 */
+-		if (fsm_update_result == FSM_PEER_TRANSFERRED
+-		    || fsm_update_result == FSM_PEER_STOPPED)
+-			break;
++		if (fsm_update_result == FSM_PEER_TRANSFERRED ||
++		    fsm_update_result == FSM_PEER_STOPPED) {
++			frr_with_mutex (&bm->peer_connection_mtx)
++				connection = peer_connection_fifo_pop(&bm->connection_fifo);
++
++			if (connection)
++				peer = connection->peer;
++
++			continue;
++		}
++
++		bool yield = event_should_yield(thread);
++		if (curr_connection_processed >= rpkt_quanta_old || yield) {
++			curr_connection_processed = 0;
++			frr_with_mutex (&bm->peer_connection_mtx) {
++				if (!peer_connection_fifo_member(&bm->connection_fifo, connection))
++					peer_connection_fifo_add_tail(&bm->connection_fifo,
++								      connection);
++				if (!yield)
++					connection = peer_connection_fifo_pop(&bm->connection_fifo);
++				else
++					connection = NULL;
++			}
++			if (connection)
++				peer = connection->peer;
++
++			continue;
++		}
++
++		frr_with_mutex (&connection->io_mtx) {
++			if (connection->ibuf->count > 0)
++				more_work = true;
++			else
++				more_work = false;
++		}
++
++		if (!more_work) {
++			frr_with_mutex (&bm->peer_connection_mtx)
++				connection = peer_connection_fifo_pop(&bm->connection_fifo);
++
++			if (connection)
++				peer = connection->peer;
++		}
+ 	}
+ 
+-	if (fsm_update_result != FSM_PEER_TRANSFERRED
+-	    && fsm_update_result != FSM_PEER_STOPPED) {
++	if (connection) {
+ 		frr_with_mutex (&connection->io_mtx) {
+-			// more work to do, come back later
+ 			if (connection->ibuf->count > 0)
+-				event_add_event(bm->master, bgp_process_packet,
+-						connection, 0,
+-						&connection->t_process_packet);
++				more_work = true;
++			else
++				more_work = false;
++		}
++		frr_with_mutex (&bm->peer_connection_mtx) {
++			if (more_work &&
++			    !peer_connection_fifo_member(&bm->connection_fifo, connection))
++				peer_connection_fifo_add_tail(&bm->connection_fifo, connection);
+ 		}
+ 	}
++
++done:
++	frr_with_mutex (&bm->peer_connection_mtx)
++		count = peer_connection_fifo_count(&bm->connection_fifo);
++
++	if (count)
++		event_add_event(bm->master, bgp_process_packet, NULL, 0, &bm->e_process_packet);
+ }
+ 
+ /* Send EOR when routes are processed by selection deferral timer */
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index 71feca5bd6..01414094e1 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -8638,6 +8638,10 @@ void bgp_master_init(struct event_loop *master, const int buffer_size,
+ 
+ 	bm = &bgp_master;
+ 
++	/* Initialize the peer connection FIFO list */
++	peer_connection_fifo_init(&bm->connection_fifo);
++	pthread_mutex_init(&bm->peer_connection_mtx, NULL);
++
+ 	zebra_announce_init(&bm->zebra_announce_head);
+ 	zebra_l2_vni_init(&bm->zebra_l2_vni_head);
+ 	zebra_l3_vni_init(&bm->zebra_l3_vni_head);
+diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
+index 4008579985..9340584e79 100644
+--- a/bgpd/bgpd.h
++++ b/bgpd/bgpd.h
+@@ -107,6 +107,9 @@ enum bgp_af_index {
+ extern struct frr_pthread *bgp_pth_io;
+ extern struct frr_pthread *bgp_pth_ka;
+ 
++/* FIFO list for peer connections */
++PREDECL_LIST(peer_connection_fifo);
++
+ /* BGP master for system wide configurations and variables.  */
+ struct bgp_master {
+ 	/* BGP instance list.  */
+@@ -121,6 +124,11 @@ struct bgp_master {
+ 	/* BGP port number.  */
+ 	uint16_t port;
+ 
++	/* FIFO list head for peer connections */
++	struct peer_connection_fifo_head connection_fifo;
++	struct event *e_process_packet;
++	pthread_mutex_t peer_connection_mtx;
++
+ 	/* Listener addresses */
+ 	struct list *addresses;
+ 
+@@ -1355,7 +1363,6 @@ struct peer_connection {
+ 	struct event *t_pmax_restart;
+ 
+ 	struct event *t_routeadv;
+-	struct event *t_process_packet;
+ 
+ 	struct event *t_stop_with_notify;
+ 
+@@ -1371,7 +1378,14 @@ struct peer_connection {
+ 
+ 	union sockunion *su_local;  /* Sockunion of local address. */
+ 	union sockunion *su_remote; /* Sockunion of remote address. */
++
++	/* For FIFO list */
++	struct peer_connection_fifo_item fifo_item;
+ };
++
++/* Declare the FIFO list implementation */
++DECLARE_LIST(peer_connection_fifo, struct peer_connection, fifo_item);
++
+ extern struct peer_connection *bgp_peer_connection_new(struct peer *peer);
+ extern void bgp_peer_connection_free(struct peer_connection **connection);
+ extern void bgp_peer_connection_buffers_free(struct peer_connection *connection);
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch b/src/sonic-frr/patch/0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch
deleted file mode 100644
index 67b76d03424..00000000000
--- a/src/sonic-frr/patch/0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch
+++ /dev/null
@@ -1,199 +0,0 @@
-From 4671ddf4920553b663fda129f7c4366839347645 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 12 Jun 2024 14:14:48 -0400
-Subject: [PATCH 3/5] zebra: Modify dplane loop to allow backpressure to filter
- up
-
-Currently when the dplane_thread_loop is run, it moves contexts
-from the dg_update_list and puts the contexts on the input queue
-of the first provider.  This provider is given a chance to run
-and then the items on the output queue are pulled off and placed
-on the input queue of the next provider.  Rinse/Repeat down through
-the entire list of providers.  Now imagine that we have a list
-of multiple providers and the last provider is getting backed up.
-Contexts will end up sticking in the input Queue of the `slow`
-provider.  This can grow without bounds.  This is a real problem
-when you have a situation where an interface is flapping and an
-upper level protocol is sending a continous stream of route
-updates to reflect the change in ecmp.  You can end up with
-a very very large backlog of contexts.  This is bad because
-zebra can easily grow to a very very large memory size and on
-restricted systems you can run out of memory.  Fortunately
-for us, the MetaQ already participates with this process
-by not doing more route processing until the dg_update_list
-goes below the working limit of dg_updates_per_cycle.  Thus
-if FRR modifies the behavior of this loop to not move more
-contexts onto the input queue if either the input queue
-or output queue of the next provider has reached this limit.
-FRR will naturaly start auto handling backpressure for the dplane
-context system and memory will not go out of control.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index c52e032660..f0e1ff6f27 100644
---- a/zebra/zebra_dplane.c
-+++ b/zebra/zebra_dplane.c
-@@ -7155,10 +7155,10 @@ static void dplane_thread_loop(struct thread *event)
- {
- 	struct dplane_ctx_list_head work_list;
- 	struct dplane_ctx_list_head error_list;
--	struct zebra_dplane_provider *prov;
-+	struct zebra_dplane_provider *prov, *next_prov;
- 	struct zebra_dplane_ctx *ctx;
- 	int limit, counter, error_counter;
--	uint64_t curr, high;
-+	uint64_t curr, out_curr, high;
- 	bool reschedule = false;
- 
- 	/* Capture work limit per cycle */
-@@ -7182,18 +7182,48 @@ static void dplane_thread_loop(struct thread *event)
- 	/* Locate initial registered provider */
- 	prov = dplane_prov_list_first(&zdplane_info.dg_providers);
- 
--	/* Move new work from incoming list to temp list */
--	for (counter = 0; counter < limit; counter++) {
--		ctx = dplane_ctx_list_pop(&zdplane_info.dg_update_list);
--		if (ctx) {
--			ctx->zd_provider = prov->dp_id;
-+	curr = dplane_ctx_queue_count(&prov->dp_ctx_in_list);
-+	out_curr = dplane_ctx_queue_count(&prov->dp_ctx_out_list);
- 
--			dplane_ctx_list_add_tail(&work_list, ctx);
--		} else {
--			break;
-+	if (curr >= (uint64_t)limit) {
-+		if (IS_ZEBRA_DEBUG_DPLANE_DETAIL)
-+			zlog_debug("%s: Current first provider(%s) Input queue is %" PRIu64
-+				   ", holding off work",
-+				   __func__, prov->dp_name, curr);
-+		counter = 0;
-+	} else if (out_curr >= (uint64_t)limit) {
-+		if (IS_ZEBRA_DEBUG_DPLANE_DETAIL)
-+			zlog_debug("%s: Current first provider(%s) Output queue is %" PRIu64
-+				   ", holding off work",
-+				   __func__, prov->dp_name, out_curr);
-+		counter = 0;
-+	} else {
-+		int tlimit;
-+		/*
-+		 * Let's limit the work to how what can be put on the
-+		 * in or out queue without going over
-+		 */
-+		tlimit = limit - MAX(curr, out_curr);
-+		/* Move new work from incoming list to temp list */
-+		for (counter = 0; counter < tlimit; counter++) {
-+			ctx = dplane_ctx_list_pop(&zdplane_info.dg_update_list);
-+			if (ctx) {
-+				ctx->zd_provider = prov->dp_id;
-+
-+				dplane_ctx_list_add_tail(&work_list, ctx);
-+			} else {
-+				break;
-+			}
- 		}
- 	}
- 
-+	/*
-+	 * If there is anything still on the two input queues reschedule
-+	 */
-+	if (dplane_ctx_queue_count(&prov->dp_ctx_in_list) > 0 ||
-+	    dplane_ctx_queue_count(&zdplane_info.dg_update_list) > 0)
-+		reschedule = true;
-+
- 	DPLANE_UNLOCK();
- 
- 	atomic_fetch_sub_explicit(&zdplane_info.dg_routes_queued, counter,
-@@ -7212,8 +7242,9 @@ static void dplane_thread_loop(struct thread *event)
- 		 * items.
- 		 */
- 		if (IS_ZEBRA_DEBUG_DPLANE_DETAIL)
--			zlog_debug("dplane enqueues %d new work to provider '%s'",
--				   counter, dplane_provider_get_name(prov));
-+			zlog_debug("dplane enqueues %d new work to provider '%s' curr is %" PRIu64,
-+				   counter, dplane_provider_get_name(prov),
-+				   curr);
- 
- 		/* Capture current provider id in each context; check for
- 		 * error status.
-@@ -7271,18 +7302,61 @@ static void dplane_thread_loop(struct thread *event)
- 		if (!zdplane_info.dg_run)
- 			break;
- 
-+		/* Locate next provider */
-+		next_prov = dplane_prov_list_next(&zdplane_info.dg_providers,
-+						  prov);
-+		if (next_prov) {
-+			curr = dplane_ctx_queue_count(
-+				&next_prov->dp_ctx_in_list);
-+			out_curr = dplane_ctx_queue_count(
-+				&next_prov->dp_ctx_out_list);
-+		} else
-+			out_curr = curr = 0;
-+
- 		/* Dequeue completed work from the provider */
- 		dplane_provider_lock(prov);
- 
--		while (counter < limit) {
--			ctx = dplane_provider_dequeue_out_ctx(prov);
--			if (ctx) {
--				dplane_ctx_list_add_tail(&work_list, ctx);
--				counter++;
--			} else
--				break;
-+		if (curr >= (uint64_t)limit) {
-+			if (IS_ZEBRA_DEBUG_DPLANE_DETAIL)
-+				zlog_debug("%s: Next Provider(%s) Input queue is %" PRIu64
-+					   ", holding off work",
-+					   __func__, next_prov->dp_name, curr);
-+			counter = 0;
-+		} else if (out_curr >= (uint64_t)limit) {
-+			if (IS_ZEBRA_DEBUG_DPLANE_DETAIL)
-+				zlog_debug("%s: Next Provider(%s) Output queue is %" PRIu64
-+					   ", holding off work",
-+					   __func__, next_prov->dp_name,
-+					   out_curr);
-+			counter = 0;
-+		} else {
-+			int tlimit;
-+
-+			/*
-+			 * Let's limit the work to how what can be put on the
-+			 * in or out queue without going over
-+			 */
-+			tlimit = limit - MAX(curr, out_curr);
-+			while (counter < tlimit) {
-+				ctx = dplane_provider_dequeue_out_ctx(prov);
-+				if (ctx) {
-+					dplane_ctx_list_add_tail(&work_list,
-+								 ctx);
-+					counter++;
-+				} else
-+					break;
-+			}
- 		}
- 
-+		/*
-+		 * Let's check if there are still any items on the
-+		 * input or output queus of the current provider
-+		 * if so then we know we need to reschedule.
-+		 */
-+		if (dplane_ctx_queue_count(&prov->dp_ctx_in_list) > 0 ||
-+		    dplane_ctx_queue_count(&prov->dp_ctx_out_list) > 0)
-+			reschedule = true;
-+
- 		dplane_provider_unlock(prov);
- 
- 		if (counter >= limit)
-@@ -7293,7 +7367,7 @@ static void dplane_thread_loop(struct thread *event)
- 				   counter, dplane_provider_get_name(prov));
- 
- 		/* Locate next provider */
--		prov = dplane_prov_list_next(&zdplane_info.dg_providers, prov);
-+		prov = next_prov;
- 	}
- 
- 	/*
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch b/src/sonic-frr/patch/0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch
deleted file mode 100644
index 7f25a773a10..00000000000
--- a/src/sonic-frr/patch/0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 50f606c158f6c89abd0d3f531905005d3a48a5b6 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 12 Jun 2024 15:16:08 -0400
-Subject: [PATCH 4/5] zebra: Limit queue depth in dplane_fpm_nl
-
-The dplane providers have a concept of input queues
-and output queues.  These queues are chained together
-during normal operation.  The code in zebra also has
-a feedback mechanism where the MetaQ will not run when
-the first input queue is backed up.  Having the dplane_fpm_nl
-code grab all contexts when it is backed up prevents
-this system from behaving appropriately.
-
-Modify the code to not add to the dplane_fpm_nl's internal
-queue when it is already full.  This will allow the backpressure
-to work appropriately in zebra proper.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
-index bc9815bb10..4fd42f64a2 100644
---- a/zebra/dplane_fpm_nl.c
-+++ b/zebra/dplane_fpm_nl.c
-@@ -1560,6 +1560,25 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
- 
- 	fnc = dplane_provider_get_data(prov);
- 	limit = dplane_provider_get_work_limit(prov);
-+
-+	frr_with_mutex (&fnc->ctxqueue_mutex) {
-+		cur_queue = dplane_ctx_queue_count(&fnc->ctxqueue);
-+	}
-+
-+	if (cur_queue >= (uint64_t)limit) {
-+		if (IS_ZEBRA_DEBUG_FPM)
-+			zlog_debug("%s: Already at a limit(%" PRIu64
-+				   ") of internal work, hold off",
-+				   __func__, cur_queue);
-+		limit = 0;
-+	} else {
-+		if (IS_ZEBRA_DEBUG_FPM)
-+			zlog_debug("%s: current queue is %" PRIu64
-+				   ", limiting to lesser amount of %" PRIu64,
-+				   __func__, cur_queue, limit - cur_queue);
-+		limit -= cur_queue;
-+	}
-+
- 	for (counter = 0; counter < limit; counter++) {
- 		ctx = dplane_provider_dequeue_in_ctx(prov);
- 		if (ctx == NULL)
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0045-zebra-Limit-reading-packets-when-MetaQ-is-full.patch b/src/sonic-frr/patch/0045-zebra-Limit-reading-packets-when-MetaQ-is-full.patch
new file mode 100644
index 00000000000..25122a6c53c
--- /dev/null
+++ b/src/sonic-frr/patch/0045-zebra-Limit-reading-packets-when-MetaQ-is-full.patch
@@ -0,0 +1,127 @@
+From 9160bbcbee1d55c962a0111e9ed64fcec307c33e Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Mon, 24 Mar 2025 14:11:35 -0400
+Subject: [PATCH 45/56] zebra: Limit reading packets when MetaQ is full
+
+Currently Zebra is just reading packets off the zapi
+wire and stacking them up for processing in zebra
+in the future.  When there is significant churn
+in the network the size of zebra can grow without
+bounds due to the MetaQ sizing constraints.  This
+ends up showing by the number of nexthops in the
+system.  Reducing the number of packets serviced
+to limit the metaQ size to the packets to process
+allieviates this problem.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/rib.h       |  2 ++
+ zebra/zebra_rib.c | 26 +++++++++++++++-----------
+ zebra/zserv.c     |  6 ++++++
+ 3 files changed, 23 insertions(+), 11 deletions(-)
+
+diff --git a/zebra/rib.h b/zebra/rib.h
+index 8484fe1291..7eaeb50c7e 100644
+--- a/zebra/rib.h
++++ b/zebra/rib.h
+@@ -462,6 +462,8 @@ extern void meta_queue_free(struct meta_queue *mq, struct zebra_vrf *zvrf);
+ extern int zebra_rib_labeled_unicast(struct route_entry *re);
+ extern struct route_table *rib_table_ipv6;
+ 
++extern uint32_t zebra_rib_meta_queue_size(void);
++
+ extern void rib_unlink(struct route_node *rn, struct route_entry *re);
+ extern int rib_gc_dest(struct route_node *rn);
+ extern struct route_table *rib_tables_iter_next(rib_tables_iter_t *iter);
+diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
+index 1a19bd62c2..700c2482c2 100644
+--- a/zebra/zebra_rib.c
++++ b/zebra/zebra_rib.c
+@@ -3310,8 +3310,8 @@ static int rib_meta_queue_add(struct meta_queue *mq, void *data)
+ 	mq->size++;
+ 
+ 	if (IS_ZEBRA_DEBUG_RIB_DETAILED)
+-		rnode_debug(rn, re->vrf_id, "queued rn %p into sub-queue %s",
+-			    (void *)rn, subqueue2str(qindex));
++		rnode_debug(rn, re->vrf_id, "queued rn %p into sub-queue %s mq size %u", (void *)rn,
++			    subqueue2str(qindex), zrouter.mq->size);
+ 
+ 	return 0;
+ }
+@@ -3343,8 +3343,8 @@ static int rib_meta_queue_nhg_ctx_add(struct meta_queue *mq, void *data)
+ 	mq->size++;
+ 
+ 	if (IS_ZEBRA_DEBUG_RIB_DETAILED)
+-		zlog_debug("NHG Context id=%u queued into sub-queue %s",
+-			   ctx->id, subqueue2str(qindex));
++		zlog_debug("NHG Context id=%u queued into sub-queue %s mq size %u", ctx->id,
++			   subqueue2str(qindex), zrouter.mq->size);
+ 
+ 	return 0;
+ }
+@@ -3371,8 +3371,8 @@ static int rib_meta_queue_nhg_process(struct meta_queue *mq, void *data,
+ 	mq->size++;
+ 
+ 	if (IS_ZEBRA_DEBUG_RIB_DETAILED)
+-		zlog_debug("NHG id=%u queued into sub-queue %s", nhe->id,
+-			   subqueue2str(qindex));
++		zlog_debug("NHG id=%u queued into sub-queue %s mq size %u", nhe->id,
++			   subqueue2str(qindex), zrouter.mq->size);
+ 
+ 	return 0;
+ }
+@@ -3418,6 +3418,11 @@ static int mq_add_handler(void *data,
+ 	return mq_add_func(zrouter.mq, data);
+ }
+ 
++uint32_t zebra_rib_meta_queue_size(void)
++{
++	return zrouter.mq->size;
++}
++
+ void mpls_ftn_uninstall(struct zebra_vrf *zvrf, enum lsp_types_t type,
+ 			struct prefix *prefix, uint8_t route_type,
+ 			uint8_t route_instance)
+@@ -4234,7 +4239,7 @@ static int rib_meta_queue_gr_run_add(struct meta_queue *mq, void *data)
+ 	mq->size++;
+ 
+ 	if (IS_ZEBRA_DEBUG_RIB_DETAILED)
+-		zlog_debug("Graceful Run adding");
++		zlog_debug("Graceful Run adding mq size %u", zrouter.mq->size);
+ 
+ 	return 0;
+ }
+@@ -4249,10 +4254,9 @@ static int rib_meta_queue_early_route_add(struct meta_queue *mq, void *data)
+ 	if (IS_ZEBRA_DEBUG_RIB_DETAILED) {
+ 		struct vrf *vrf = vrf_lookup_by_id(ere->re->vrf_id);
+ 
+-		zlog_debug("Route %pFX(%s) (%s) queued for processing into sub-queue %s",
+-			   &ere->p, VRF_LOGNAME(vrf),
+-			   ere->deletion ? "delete" : "add",
+-			   subqueue2str(META_QUEUE_EARLY_ROUTE));
++		zlog_debug("Route %pFX(%s) (%s) queued for processing into sub-queue %s mq size %u",
++			   &ere->p, VRF_LOGNAME(vrf), ere->deletion ? "delete" : "add",
++			   subqueue2str(META_QUEUE_EARLY_ROUTE), zrouter.mq->size);
+ 	}
+ 
+ 	return 0;
+diff --git a/zebra/zserv.c b/zebra/zserv.c
+index 6965c285cd..7b88d3ba26 100644
+--- a/zebra/zserv.c
++++ b/zebra/zserv.c
+@@ -531,6 +531,12 @@ static void zserv_process_messages(struct event *thread)
+ 	struct stream_fifo *cache = stream_fifo_new();
+ 	uint32_t p2p = zrouter.packets_to_process;
+ 	bool need_resched = false;
++	uint32_t meta_queue_size = zebra_rib_meta_queue_size();
++
++	if (meta_queue_size < p2p)
++		p2p = p2p - meta_queue_size;
++	else
++		p2p = 0;
+ 
+ 	frr_with_mutex (&client->ibuf_mtx) {
+ 		uint32_t i;
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0046-bgpd-Delay-processing-MetaQ-in-some-events.patch b/src/sonic-frr/patch/0046-bgpd-Delay-processing-MetaQ-in-some-events.patch
new file mode 100644
index 00000000000..728234c87e0
--- /dev/null
+++ b/src/sonic-frr/patch/0046-bgpd-Delay-processing-MetaQ-in-some-events.patch
@@ -0,0 +1,210 @@
+From 5837d98c4a8e1e105ff5d1ddac74f69c4f44f6c9 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Tue, 25 Mar 2025 10:43:14 -0400
+Subject: [PATCH 46/56] bgpd: Delay processing MetaQ in some events
+
+If the number of peers that are being handled on
+the peer connection fifo is greater than 10, that
+means we have some network event going on.  Let's
+allow the packet processing to continue instead
+of running the metaQ.  This has advantages because
+everything else in BGP is only run after the metaQ
+is run.  This includes best path processing,
+installation of the route into zebra as well as
+telling our peers about this change.  Why does
+this matter?  It matters because if we are receiving
+the same route multiple times we limit best path processing
+to much fewer times and consequently we also limit
+the number of times we send the route update out and
+we install the route much fewer times as well.
+
+Prior to this patch, with 512 peers and 5k routes.
+CPU time for bgpd was 3:10, zebra was 3:28.  After
+the patch CPU time for bgpd was 0:55 and zebra was
+0:25.
+
+Here are the prior `show event cpu`:
+Event statistics for bgpd:
+
+Showing statistics for pthread default
+--------------------------------------
+                               CPU (user+system): Real (wall-clock):
+Active   Runtime(ms)   Invoked Avg uSec Max uSecs Avg uSec Max uSecs  CPU_Warn Wall_Warn Starv_Warn   Type  Event
+    0         20.749     33144        0       395        1       396         0         0          0    T    (bgp_generate_updgrp_packets)
+    0       9936.199      1818     5465     43588     5466     43589         0         0          0     E   bgp_handle_route_announcements_to_zebra
+    0          0.220        84        2        20        3        20         0         0          0    T    update_subgroup_merge_check_thread_cb
+    0          0.058         2       29        43       29        43         0         0          0     E   zclient_connect
+    0      17297.733       466    37119     67428    37124     67429         0         0          0   W     zclient_flush_data
+    1          0.134         7       19        40       20        42         0         0          0  R      vtysh_accept
+    0        151.396      1067      141      1181      142      1189         0         0          0  R      vtysh_read
+    0          0.297      1030        0        14        0        14         0         0          0    T    (bgp_routeadv_timer)
+    0          0.001         1        1         1        2         2         0         0          0    T    bgp_sync_label_manager
+    2          9.374       544       17       261       17       262         0         0          0  R      bgp_accept
+    0          0.001         1        1         1        2         2         0         0          0    T    bgp_startup_timer_expire
+    0          0.012         1       12        12       13        13         0         0          0     E   frr_config_read_in
+    0          0.308         1      308       308      309       309         0         0          0    T    subgroup_coalesce_timer
+    0          4.027       105       38        77       39        78         0         0          0    T    (bgp_start_timer)
+    0     112206.442      1818    61719     84726    61727     84736         0         0          0    TE   work_queue_run
+    0          0.345         1      345       345      346       346         0         0          0    T    bgp_config_finish
+    0          0.710       620        1         6        1         9         0         0          0   W     bgp_connect_check
+    2         39.420      8283        4       110        5       111         0         0          0  R      zclient_read
+    0          0.052         1       52        52      578       578         0         0          0    T    bgp_start_label_manager
+    0          0.452        87        5        90        5        90         0         0          0    T    bgp_announce_route_timer_expired
+    0        185.837      3088       60       537       92     21705         0         0          0     E   bgp_event
+    0      48719.671      4346    11210     78292    11215     78317         0         0          0     E   bgp_process_packet
+
+Showing statistics for pthread BGP I/O thread
+---------------------------------------------
+                               CPU (user+system): Real (wall-clock):
+Active   Runtime(ms)   Invoked Avg uSec Max uSecs Avg uSec Max uSecs  CPU_Warn Wall_Warn Starv_Warn   Type  Event
+    0        321.915     28597       11        86       11       265         0         0          0   W     bgp_process_writes
+  515        115.586     26954        4       121        4       128         0         0          0  R      bgp_process_reads
+
+Event statistics for zebra:
+
+Showing statistics for pthread default
+--------------------------------------
+                               CPU (user+system): Real (wall-clock):
+Active   Runtime(ms)   Invoked Avg uSec Max uSecs Avg uSec Max uSecs  CPU_Warn Wall_Warn Starv_Warn   Type  Event
+    0          0.109         2       54        62       55        63         0         0          0    T    timer_walk_start
+    1          0.550        11       50       100       50       100         0         0          0  R      vtysh_accept
+    0     112848.163      4441    25410    405489    25413    410127         0         0          0     E   zserv_process_messages
+    0          0.007         1        7         7        7         7         0         0          0     E   frr_config_read_in
+    0          0.005         1        5         5        5         5         0         0          0    T    rib_sweep_route
+    1        573.589      4789      119      1567      120      1568         0         0          0    T    wheel_timer_thread
+  347         30.848        97      318      1367      318      1366         0         0          0    T    zebra_nhg_timer
+    0          0.005         1        5         5        6         6         0         0          0    T    zebra_evpn_mh_startup_delay_exp_cb
+    0          5.404       521       10        38       10        70         0         0          0    T    timer_walk_continue
+    1          1.669         9      185       219      186       219         0         0          0  R      zserv_accept
+    1          0.174        18        9        53       10        53         0         0          0  R      msg_conn_read
+    0          3.028       520        5        47        6        47         0         0          0    T    if_zebra_speed_update
+    0          0.324       274        1         5        1         6         0         0          0   W     msg_conn_write
+    1         24.661      2124       11       359       12       359         0         0          0  R      kernel_read
+    0      73683.333      2964    24859    143223    24861    143239         0         0          0    TE   work_queue_run
+    1         46.649      6789        6       424        7       424         0         0          0  R      rtadv_read
+    0         52.661        85      619      2087      620      2088         0         0          0  R      vtysh_read
+    0         42.660        18     2370     21694     2373     21695         0         0          0     E   msg_conn_proc_msgs
+    0          0.034         1       34        34       35        35         0         0          0     E   msg_client_connect_timer
+    0       2786.938      2300     1211     29456     1219     29555         0         0          0     E   rib_process_dplane_results
+
+Showing statistics for pthread Zebra dplane thread
+--------------------------------------------------
+                               CPU (user+system): Real (wall-clock):
+Active   Runtime(ms)   Invoked Avg uSec Max uSecs Avg uSec Max uSecs  CPU_Warn Wall_Warn Starv_Warn   Type  Event
+    0       4875.670    200371       24       770       24       776         0         0          0     E   dplane_thread_loop
+    0          0.059         1       59        59       76        76         0         0          0     E   dplane_incoming_request
+    1          9.640       722       13      4510       15      5343         0         0          0  R      dplane_incoming_read
+
+Here are the post `show event cpu` results:
+
+Event statistics for bgpd:
+
+Showing statistics for pthread default
+--------------------------------------
+                               CPU (user+system): Real (wall-clock):
+Active   Runtime(ms)   Invoked Avg uSec Max uSecs Avg uSec Max uSecs  CPU_Warn Wall_Warn Starv_Warn   Type  Event
+    0      21297.497      3565     5974     57912     5981     57913         0         0          0     E   bgp_process_packet
+    0        149.742      1068      140      1109      140      1110         0         0          0  R      vtysh_read
+    0          0.013         1       13        13       14        14         0         0          0     E   frr_config_read_in
+    0          0.459        86        5       104        5       105         0         0          0    T    bgp_announce_route_timer_expired
+    0          0.139        81        1        20        2        21         0         0          0    T    update_subgroup_merge_check_thread_cb
+    0        405.889    291687        1       179        1       450         0         0          0    T    (bgp_generate_updgrp_packets)
+    0          0.682       618        1         6        1         9         0         0          0   W     bgp_connect_check
+    0          3.888       103       37        81       38        82         0         0          0    T    (bgp_start_timer)
+    0          0.074         1       74        74      458       458         0         0          0    T    bgp_start_label_manager
+    0          0.000         1        0         0        1         1         0         0          0    T    bgp_sync_label_manager
+    0          0.121         3       40        54      100       141         0         0          0     E   bgp_process_conn_error
+    0          0.060         2       30        49       30        50         0         0          0     E   zclient_connect
+    0          0.354         1      354       354      355       355         0         0          0    T    bgp_config_finish
+    0          0.283         1      283       283      284       284         0         0          0    T    subgroup_coalesce_timer
+    0      29365.962      1805    16269     99445    16273     99454         0         0          0    TE   work_queue_run
+    0        185.532      3097       59       497       94     26107         0         0          0     E   bgp_event
+    1          0.290         8       36       151       37       158         0         0          0  R      vtysh_accept
+    2          9.462       548       17       320       17       322         0         0          0  R      bgp_accept
+    2         40.219      8283        4       128        5       128         0         0          0  R      zclient_read
+    0          0.322      1031        0         4        0         5         0         0          0    T    (bgp_routeadv_timer)
+    0        356.812       637      560      3007      560      3007         0         0          0     E   bgp_handle_route_announcements_to_zebra
+
+Showing statistics for pthread BGP I/O thread
+---------------------------------------------
+                               CPU (user+system): Real (wall-clock):
+Active   Runtime(ms)   Invoked Avg uSec Max uSecs Avg uSec Max uSecs  CPU_Warn Wall_Warn Starv_Warn   Type  Event
+  515         62.965     14335        4       103        5       181         0         0          0  R      bgp_process_reads
+    0       1986.041    219813        9       213        9       315         0         0          0   W     bgp_process_writes
+
+Event statistics for zebra:
+
+Showing statistics for pthread default
+--------------------------------------
+                               CPU (user+system): Real (wall-clock):
+Active   Runtime(ms)   Invoked Avg uSec Max uSecs Avg uSec Max uSecs  CPU_Warn Wall_Warn Starv_Warn   Type  Event
+    0          0.006         1        6         6        7         7         0         0          0     E   frr_config_read_in
+    0       3673.365      2044     1797    259281     1800    261342         0         0          0     E   zserv_process_messages
+    1        651.846      8041       81      1090       82      1233         0         0          0    T    wheel_timer_thread
+    0         38.184        18     2121     21345     2122     21346         0         0          0     E   msg_conn_proc_msgs
+    1          0.651        12       54       112       55       112         0         0          0  R      vtysh_accept
+    0          0.102         2       51        55       51        56         0         0          0    T    timer_walk_start
+    0        202.721      1577      128     29172      141     29226         0         0          0     E   rib_process_dplane_results
+    1         41.650      6645        6       140        6       140         0         0          0  R      rtadv_read
+    1         22.518      1969       11       106       12       154         0         0          0  R      kernel_read
+    0          4.265        48       88      1465       89      1466         0         0          0  R      vtysh_read
+    0       6099.851       650     9384     28313     9390     28314         0         0          0    TE   work_queue_run
+    0          5.104       521        9        30       10        31         0         0          0    T    timer_walk_continue
+    0          3.078       520        5        53        6        55         0         0          0    T    if_zebra_speed_update
+    0          0.005         1        5         5        5         5         0         0          0    T    rib_sweep_route
+    0          0.034         1       34        34       35        35         0         0          0     E   msg_client_connect_timer
+    1          1.641         9      182       214      183       215         0         0          0  R      zserv_accept
+    0          0.358       274        1         6        2         6         0         0          0   W     msg_conn_write
+    1          0.159        18        8        54        9        54         0         0          0  R      msg_conn_read
+
+Showing statistics for pthread Zebra dplane thread
+--------------------------------------------------
+                               CPU (user+system): Real (wall-clock):
+Active   Runtime(ms)   Invoked Avg uSec Max uSecs Avg uSec Max uSecs  CPU_Warn Wall_Warn Starv_Warn   Type  Event
+    0        301.404      7280       41      1878       41      1878         0         0          0     E   dplane_thread_loop
+    0          0.048         1       48        48       49        49         0         0          0     E   dplane_incoming_request
+    1          9.558       727       13      4659       14      5420         0         0          0  R      dplane_incoming_read
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ bgpd/bgp_route.c | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index 859ac26c1c..4c3cd42f30 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -4150,12 +4150,30 @@ static wq_item_status meta_queue_process(struct work_queue *dummy, void *data)
+ {
+ 	struct meta_queue *mq = data;
+ 	uint32_t i;
++	uint32_t peers_on_fifo;
++	static uint32_t total_runs = 0;
++
++	total_runs++;
++
++	frr_with_mutex (&bm->peer_connection_mtx)
++		peers_on_fifo = peer_connection_fifo_count(&bm->connection_fifo);
++
++	/*
++	 * If the number of peers on the fifo is greater than 10
++	 * let's yield this run of the MetaQ  to allow the packet processing to make
++	 * progress against the incoming packets.  But we should also
++	 * attempt to allow this to run occassionally.  Let's run
++	 * something every 10 attempts to process the work queue.
++	 */
++	if (peers_on_fifo > 10 && total_runs % 10 != 0)
++		return WQ_QUEUE_BLOCKED;
+ 
+ 	for (i = 0; i < MQ_SIZE; i++)
+ 		if (process_subq(mq->subq[i], i)) {
+ 			mq->size--;
+ 			break;
+ 		}
++
+ 	return mq->size ? WQ_REQUEUE : WQ_SUCCESS;
+ }
+ 
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch b/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch
deleted file mode 100644
index 847a63797fd..00000000000
--- a/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From d695dfb88418834f0054255dd4385b293efb5a17 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 17 Jun 2024 10:42:41 -0400
-Subject: [PATCH 5/5] zebra: Modify show `zebra dplane providers` to give more
- data
-
-The show zebra dplane provider command was ommitting
-the input and output queues to the dplane itself.
-It would be nice to have this insight as well.
-
-New output:
-r1# show zebra dplane providers
-dataplane Incoming Queue from Zebra: 100
-Zebra dataplane providers:
-  Kernel (1): in: 6, q: 0, q_max: 3, out: 6, q: 14, q_max: 3
-  dplane_fpm_nl (2): in: 6, q: 10, q_max: 3, out: 6, q: 0, q_max: 3
-dataplane Outgoing Queue to Zebra: 43
-r1#
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/rib.h b/zebra/rib.h
-index a721f4bac..15f877b66 100644
---- a/zebra/rib.h
-+++ b/zebra/rib.h
-@@ -628,6 +628,7 @@ extern int rib_add_gr_run(afi_t afi, vrf_id_t vrf_id, uint8_t proto,
- 			  uint8_t instance);
-
- extern void zebra_vty_init(void);
-+extern uint32_t zebra_rib_dplane_results_count(void);
-
- extern pid_t pid;
-
-diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index e077c28d1..efa795331 100644
---- a/zebra/zebra_dplane.c
-+++ b/zebra/zebra_dplane.c
-@@ -6089,12 +6089,14 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed)
- 	struct zebra_dplane_provider *prov;
- 	uint64_t in, in_q, in_max, out, out_q, out_max;
-
--	vty_out(vty, "Zebra dataplane providers:\n");
--
- 	DPLANE_LOCK();
- 	prov = dplane_prov_list_first(&zdplane_info.dg_providers);
-+	in = dplane_ctx_queue_count(&zdplane_info.dg_update_list);
- 	DPLANE_UNLOCK();
-
-+	vty_out(vty, "dataplane Incoming Queue from Zebra: %" PRIu64 "\n", in);
-+	vty_out(vty, "Zebra dataplane providers:\n");
-+
- 	/* Show counters, useful info from each registered provider */
- 	while (prov) {
- 		dplane_provider_lock(prov);
-@@ -6113,13 +6115,19 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed)
- 		out_max = atomic_load_explicit(&prov->dp_out_max,
- 					       memory_order_relaxed);
-
--		vty_out(vty, "%s (%u): in: %"PRIu64", q: %"PRIu64", q_max: %"PRIu64", out: %"PRIu64", q: %"PRIu64", q_max: %"PRIu64"\n",
--			prov->dp_name, prov->dp_id, in, in_q, in_max,
--			out, out_q, out_max);
-+		vty_out(vty,
-+			"  %s (%u): in: %" PRIu64 ", q: %" PRIu64
-+			", q_max: %" PRIu64 ", out: %" PRIu64 ", q: %" PRIu64
-+			", q_max: %" PRIu64 "\n",
-+			prov->dp_name, prov->dp_id, in, in_q, in_max, out,
-+			out_q, out_max);
-
- 		prov = dplane_prov_list_next(&zdplane_info.dg_providers, prov);
- 	}
-
-+	out = zebra_rib_dplane_results_count();
-+	vty_out(vty, "dataplane Outgoing Queue to Zebra: %" PRIu64 "\n", out);
-+
- 	return CMD_SUCCESS;
- }
-
-diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
-index 5b95d8668..430878daf 100644
---- a/zebra/zebra_rib.c
-+++ b/zebra/zebra_rib.c
-@@ -5001,6 +5001,17 @@ static int rib_dplane_results(struct dplane_ctx_list_head *ctxlist)
- 	return 0;
- }
-
-+uint32_t zebra_rib_dplane_results_count(void)
-+{
-+	uint32_t count;
-+
-+	frr_with_mutex (&dplane_mutex) {
-+		count = dplane_ctx_queue_count(&rib_dplane_q);
-+	}
-+
-+	return count;
-+}
-+
- /*
-  * Ensure there are no empty slots in the route_info array.
-  * Every route type in zebra should be present there.
---
-2.39.4
-
diff --git a/src/sonic-frr/patch/0047-bgpd-Fix-holdtime-not-working-properly-when-busy.patch b/src/sonic-frr/patch/0047-bgpd-Fix-holdtime-not-working-properly-when-busy.patch
new file mode 100644
index 00000000000..d5f5d90cefc
--- /dev/null
+++ b/src/sonic-frr/patch/0047-bgpd-Fix-holdtime-not-working-properly-when-busy.patch
@@ -0,0 +1,41 @@
+From be0e3baf3e720a40d20b853d0fefd0e9c2f98ef2 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Mon, 24 Mar 2025 14:28:38 -0400
+Subject: [PATCH 47/56] bgpd: Fix holdtime not working properly when busy
+
+Commit:  cc9f21da2218d95567eff1501482ce58e6600f54
+
+Modified the bgp_fsm code to dissallow the extension
+of the hold time when the system is under extremely
+heavy load.  This was a attempt to remove the return
+code but it was too aggressive and messed up this bit
+of code.
+
+Put the behavior back that was introduced in:
+d0874d195d0127009a7d9c06920c52c95319eff9
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ bgpd/bgp_fsm.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/bgpd/bgp_fsm.c b/bgpd/bgp_fsm.c
+index d332aca097..6bcbd30386 100644
+--- a/bgpd/bgp_fsm.c
++++ b/bgpd/bgp_fsm.c
+@@ -537,9 +537,11 @@ static void bgp_holdtime_timer(struct event *thread)
+ 	frr_with_mutex (&connection->io_mtx) {
+ 		inq_count = atomic_load_explicit(&connection->ibuf->count, memory_order_relaxed);
+ 	}
+-	if (inq_count)
++	if (inq_count) {
+ 		BGP_TIMER_ON(connection->t_holdtime, bgp_holdtime_timer,
+ 			     peer->v_holdtime);
++		return;
++	}
+ 
+ 	EVENT_VAL(thread) = Hold_Timer_expired;
+ 	bgp_event(thread); /* bgp_event unlocks peer */
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch b/src/sonic-frr/patch/0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch
deleted file mode 100644
index c8e3de24ef3..00000000000
--- a/src/sonic-frr/patch/0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From bed7636621589c139ed8d83842df3ce438b8493f Mon Sep 17 00:00:00 2001
-From: Chirag Shah <chirag@nvidia.com>
-Date: Mon, 17 Jun 2024 13:58:03 -0700
-Subject: [PATCH] bgpd: backpressure - fix evpn route sync to zebra
-
-In scaled EVPN + ipv4/ipv6 uni route sync to zebra,
-some of the ipv4/ipv6 routes skipped reinstallation
-due to incorrect local variable's stale value.
-
-Once the local variable value reset in each loop
-iteration all skipped routes synced to zebra properly.
-
-Ticket: #3948828
-
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-Signed-off-by: Chirag Shah <chirag@nvidia.com>
-
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index 5d5525156b..278e228d66 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -1801,6 +1801,8 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
- 	bool install;
- 
- 	while (count < ZEBRA_ANNOUNCEMENTS_LIMIT) {
-+		is_evpn = false;
-+
- 		dest = zebra_announce_pop(&bm->zebra_announce_head);
- 
- 		if (!dest)
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch b/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch
deleted file mode 100644
index e98f867fa9a..00000000000
--- a/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 05d2c5b3ba6f83cd42a4dd5f9e40959fc438b0a6 Mon Sep 17 00:00:00 2001
-From: Rajasekar Raja <rajasekarr@nvidia.com>
-Date: Wed, 10 Jul 2024 16:46:29 -0700
-Subject: [PATCH 1/2] bgpd: backpressure - fix to properly remove dest for bgp
- under deletion
-
-In case of imported routes (L3vni/vrf leaks), when a bgp instance is
-being deleted, the peer->bgp comparision with the incoming bgp to remove
-the dest from the pending fifo is wrong. This can lead to the fifo
-having stale entries resulting in crash.
-
-Two changes are done here.
- - Instead of pop/push items in list if the struct bgp doesnt match,
-   simply iterate the list and remove the expected ones.
-
- - Corrected the way bgp is fetched from dest rather than relying on
-   path_info->peer so that it works for all kinds of routes.
-
-Ticket :#3980988
-
-Signed-off-by: Chirag Shah <chirag @nvidia.com>
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index 5e62854ed..c517a67f5 100644
---- a/bgpd/bgp_evpn.c
-+++ b/bgpd/bgp_evpn.c
-@@ -6301,16 +6301,16 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni,
- void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
- {
- 	struct bgp_dest *dest = NULL;
--	uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head);
-+	struct bgp_dest *dest_next = NULL;
-
--	while (ann_count) {
--		dest = zebra_announce_pop(&bm->zebra_announce_head);
--		ann_count--;
-+	for (dest = zebra_announce_first(&bm->zebra_announce_head); dest;
-+	     dest = dest_next) {
-+		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
- 		if (dest->za_vpn == vpn) {
- 			bgp_path_info_unlock(dest->za_bgp_pi);
- 			bgp_dest_unlock_node(dest);
--		} else
--			zebra_announce_add_tail(&bm->zebra_announce_head, dest);
-+			zebra_announce_del(&bm->zebra_announce_head, dest);
-+		}
- 	}
- 	bgp_evpn_remote_ip_hash_destroy(vpn);
- 	bgp_evpn_vni_es_cleanup(vpn);
-diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index 4348a60c5..24577768f 100644
---- a/bgpd/bgpd.c
-+++ b/bgpd/bgpd.c
-@@ -3868,19 +3868,25 @@ int bgp_delete(struct bgp *bgp)
- 	safi_t safi;
- 	int i;
- 	struct bgp_dest *dest = NULL;
-+	struct bgp_dest *dest_next = NULL;
-+	struct bgp_table *dest_table = NULL;
- 	struct graceful_restart_info *gr_info;
--	uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head);
-
- 	assert(bgp);
-
--	while (ann_count) {
--		dest = zebra_announce_pop(&bm->zebra_announce_head);
--		ann_count--;
--		if (dest->za_bgp_pi->peer->bgp == bgp) {
-+	/*
-+	 * Iterate the pending dest list and remove all the dest pertaininig to
-+	 * the bgp under delete.
-+	 */
-+	for (dest = zebra_announce_first(&bm->zebra_announce_head); dest;
-+	     dest = dest_next) {
-+		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
-+		dest_table = bgp_dest_table(dest);
-+		if (dest_table->bgp == bgp) {
- 			bgp_path_info_unlock(dest->za_bgp_pi);
- 			bgp_dest_unlock_node(dest);
--		} else
--			zebra_announce_add_tail(&bm->zebra_announce_head, dest);
-+			zebra_announce_del(&bm->zebra_announce_head, dest);
-+		}
- 	}
-
- 	bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL);
---
-2.39.4
-
diff --git a/src/sonic-frr/patch/0048-bgpd-ensure-that-bgp_generate_updgrp_packets-shares-.patch b/src/sonic-frr/patch/0048-bgpd-ensure-that-bgp_generate_updgrp_packets-shares-.patch
new file mode 100644
index 00000000000..2716a265989
--- /dev/null
+++ b/src/sonic-frr/patch/0048-bgpd-ensure-that-bgp_generate_updgrp_packets-shares-.patch
@@ -0,0 +1,35 @@
+From fc6bc588f2f86e09a9c0684753b51f43d02fb703 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Fri, 18 Apr 2025 13:50:33 -0400
+Subject: [PATCH 48/56] bgpd: ensure that bgp_generate_updgrp_packets shares
+ nicely
+
+The bgp_generate_updgrp_packet function will attempt to write
+up to `write quanta 64` packets at one time.  This is extremely
+expensive at scale and is causing CPU_HOGS as well as STARVATION
+messages.  Check to see if we should yield the CPU to allow
+something else in BGP to continue working.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ bgpd/bgp_packet.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c
+index 8da807be47..32df883422 100644
+--- a/bgpd/bgp_packet.c
++++ b/bgpd/bgp_packet.c
+@@ -601,8 +601,8 @@ void bgp_generate_updgrp_packets(struct event *thread)
+ 			bgp_packet_add(connection, peer, s);
+ 			bpacket_queue_advance_peer(paf);
+ 		}
+-	} while (s && (++generated < wpq) &&
+-		 (connection->obuf->count <= bm->outq_limit));
++	} while (s && (++generated < wpq) && (connection->obuf->count <= bm->outq_limit) &&
++		 !event_should_yield(thread));
+ 
+ 	if (generated)
+ 		bgp_writes_on(connection);
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0049-bgpd-backpressure-Improve-debuggability.patch b/src/sonic-frr/patch/0049-bgpd-backpressure-Improve-debuggability.patch
deleted file mode 100644
index e74a2a7c311..00000000000
--- a/src/sonic-frr/patch/0049-bgpd-backpressure-Improve-debuggability.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 0dd44dc0d99b69e6c1853f46dbae4a30fc4b9aed Mon Sep 17 00:00:00 2001
-From: Rajasekar Raja <rajasekarr@nvidia.com>
-Date: Wed, 10 Jul 2024 20:17:14 -0700
-Subject: [PATCH 2/2] bgpd: backpressure - Improve debuggability
-
-Improve debuggability in backpressure code.
-
-Ticket :#3980988
-
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index e16a58b443..2e1c5e555b 100644
---- a/bgpd/bgpd.c
-+++ b/bgpd/bgpd.c
-@@ -3692,6 +3692,7 @@ int bgp_delete(struct bgp *bgp)
- 	struct bgp_dest *dest_next = NULL;
- 	struct bgp_table *dest_table = NULL;
- 	struct graceful_restart_info *gr_info;
-+	uint32_t cnt_before, cnt_after;
- 
- 	assert(bgp);
- 
-@@ -3699,6 +3700,7 @@ int bgp_delete(struct bgp *bgp)
- 	 * Iterate the pending dest list and remove all the dest pertaininig to
- 	 * the bgp under delete.
- 	 */
-+	cnt_before = zebra_announce_count(&bm->zebra_announce_head);
- 	for (dest = zebra_announce_first(&bm->zebra_announce_head); dest;
- 	     dest = dest_next) {
- 		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
-@@ -3710,6 +3712,11 @@ int bgp_delete(struct bgp *bgp)
- 		}
- 	}
- 
-+	cnt_after = zebra_announce_count(&bm->zebra_announce_head);
-+	if (BGP_DEBUG(zebra, ZEBRA))
-+		zlog_debug("Zebra Announce Fifo cleanup count before %u and after %u during BGP %s deletion",
-+			   cnt_before, cnt_after, bgp->name_pretty);
-+
- 	bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL);
- 
- 	/* make sure we withdraw any exported routes */
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0049-zebra-show-command-to-display-metaq-info.patch b/src/sonic-frr/patch/0049-zebra-show-command-to-display-metaq-info.patch
new file mode 100644
index 00000000000..40b9d4f8f05
--- /dev/null
+++ b/src/sonic-frr/patch/0049-zebra-show-command-to-display-metaq-info.patch
@@ -0,0 +1,340 @@
+From 2b0a061e7125f22f68201def857f961616e5fcdc Mon Sep 17 00:00:00 2001
+From: Krishnasamy <krishnasamyr@nvidia.com>
+Date: Tue, 25 Mar 2025 14:55:16 +0000
+Subject: [PATCH 49/56] zebra: show command to display metaq info
+
+Display below info from metaq and sub queues
+1. Current queue size
+2. Max/Highwater size
+3. Total number of events received fo so far
+
+r1# sh zebra metaq
+MetaQ Summary
+Current Size    : 0
+Max Size        : 9
+Total           : 20
+ |------------------------------------------------------------------|
+ | SubQ                             | Current  | Max Size  | Total  |
+ |----------------------------------+----------+-----------+--------|
+ | NHG Objects                      | 0        | 0         | 0      |
+ |----------------------------------+----------+-----------+--------|
+ | EVPN/VxLan Objects               | 0        | 0         | 0      |
+ |----------------------------------+----------+-----------+--------|
+ | Early Route Processing           | 0        | 8         | 11     |
+ |----------------------------------+----------+-----------+--------|
+ | Early Label Handling             | 0        | 0         | 0      |
+ |----------------------------------+----------+-----------+--------|
+ | Connected Routes                 | 0        | 6         | 9      |
+ |----------------------------------+----------+-----------+--------|
+ | Kernel Routes                    | 0        | 0         | 0      |
+ |----------------------------------+----------+-----------+--------|
+ | Static Routes                    | 0        | 0         | 0      |
+ |----------------------------------+----------+-----------+--------|
+ | RIP/OSPF/ISIS/EIGRP/NHRP Routes  | 0        | 0         | 0      |
+ |----------------------------------+----------+-----------+--------|
+ | BGP Routes                       | 0        | 0         | 0      |
+ |----------------------------------+----------+-----------+--------|
+ | Other Routes                     | 0        | 0         | 0      |
+ |----------------------------------+----------+-----------+--------|
+ | Graceful Restart                 | 0        | 0         | 0      |
+ |------------------------------------------------------------------|
+
+Signed-off-by: Krishnasamy <krishnasamyr@nvidia.com>
+---
+ zebra/rib.h       |   7 +++
+ zebra/zebra_rib.c | 134 ++++++++++++++++++++++++++++++++++++++++++++++
+ zebra/zebra_vty.c |  15 ++++++
+ 3 files changed, 156 insertions(+)
+
+diff --git a/zebra/rib.h b/zebra/rib.h
+index 7eaeb50c7e..4e3ea8546c 100644
+--- a/zebra/rib.h
++++ b/zebra/rib.h
+@@ -192,6 +192,12 @@ struct route_entry {
+ struct meta_queue {
+ 	struct list *subq[MQ_SIZE];
+ 	uint32_t size; /* sum of lengths of all subqueues */
++	_Atomic uint32_t max_subq[MQ_SIZE];    /* Max size of individual sub queue */
++	_Atomic uint32_t max_metaq;	       /* Max size of the MetaQ */
++	_Atomic uint32_t total_subq[MQ_SIZE];  /* Total subq events */
++	_Atomic uint32_t total_metaq;	       /* Total MetaQ events */
++	_Atomic uint32_t re_subq[MQ_SIZE];     /* current RE count sub queue */
++	_Atomic uint32_t max_re_subq[MQ_SIZE]; /* Max RE in sub queue */
+ };
+ 
+ /*
+@@ -474,6 +480,7 @@ extern void zebra_rib_evaluate_rn_nexthops(struct route_node *rn, uint32_t seq,
+ 					   bool rt_delete);
+ 
+ extern void rib_update_handle_vrf_all(enum rib_update_event event, int rtype);
++int zebra_show_metaq_counter(struct vty *vty, bool uj);
+ 
+ /*
+  * rib_find_rn_from_ctx
+diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
+index 700c2482c2..4047a1a7db 100644
+--- a/zebra/zebra_rib.c
++++ b/zebra/zebra_rib.c
+@@ -30,6 +30,7 @@
+ #include "printfrr.h"
+ #include "frrscript.h"
+ #include "frrdistance.h"
++#include "lib/termtable.h"
+ 
+ #include "zebra/zebra_router.h"
+ #include "zebra/connected.h"
+@@ -273,6 +274,63 @@ static const char *subqueue2str(enum meta_queue_indexes index)
+ 	return "Unknown";
+ }
+ 
++/* Handler for 'show zebra metaq' */
++int zebra_show_metaq_counter(struct vty *vty, bool uj)
++{
++	struct meta_queue *mq = zrouter.mq;
++	struct ttable *tt = NULL;
++	char *table = NULL;
++	json_object *json = NULL;
++	json_object *json_table = NULL;
++
++	if (!mq)
++		return CMD_WARNING;
++
++	/* Create a table for subqueue details */
++	tt = ttable_new(&ttable_styles[TTSTYLE_ASCII]);
++	ttable_add_row(tt, "SubQ|Current|Max Size|Total");
++
++	/* Add rows for each subqueue */
++	for (uint8_t i = 0; i < MQ_SIZE; i++) {
++		ttable_add_row(tt, "%s|%u|%u|%u", subqueue2str(i), mq->subq[i]->count,
++			       mq->max_subq[i], mq->total_subq[i]);
++	}
++
++	/* For a better formatting between the content and separator */
++	tt->style.cell.rpad = 2;
++	tt->style.cell.lpad = 1;
++	ttable_restyle(tt);
++
++	if (uj) {
++		json = json_object_new_object();
++		/* Add MetaQ summary to the JSON object */
++		json_object_int_add(json, "currentSize", mq->size);
++		json_object_int_add(json, "maxSize", mq->max_metaq);
++		json_object_int_add(json, "total", mq->total_metaq);
++
++		/* Convert the table to JSON and add it to the main JSON object */
++		/* n = name/string, u = unsigned int */
++		json_table = ttable_json(tt, "sddd");
++		json_object_object_add(json, "subqueues", json_table);
++		vty_json(vty, json);
++	} else {
++		vty_out(vty, "MetaQ Summary\n");
++		vty_out(vty, "Current Size\t: %u\n", mq->size);
++		vty_out(vty, "Max Size\t: %u\n", mq->max_metaq);
++		vty_out(vty, "Total\t\t: %u\n", mq->total_metaq);
++
++		/* Dump the table */
++		table = ttable_dump(tt, "\n");
++		vty_out(vty, "%s\n", table);
++		XFREE(MTYPE_TMP_TTABLE, table);
++	}
++
++	/* Clean up the table */
++	ttable_del(tt);
++
++	return CMD_SUCCESS;
++}
++
+ printfrr_ext_autoreg_p("ZN", printfrr_zebra_node);
+ static ssize_t printfrr_zebra_node(struct fbuf *buf, struct printfrr_eargs *ea,
+ 				   const void *ptr)
+@@ -3265,6 +3323,7 @@ static int rib_meta_queue_add(struct meta_queue *mq, void *data)
+ 	struct route_node *rn = NULL;
+ 	struct route_entry *re = NULL, *curr_re = NULL;
+ 	uint8_t qindex = MQ_SIZE, curr_qindex = MQ_SIZE;
++	uint64_t curr, high;
+ 
+ 	rn = (struct route_node *)data;
+ 
+@@ -3308,6 +3367,15 @@ static int rib_meta_queue_add(struct meta_queue *mq, void *data)
+ 	listnode_add(mq->subq[qindex], rn);
+ 	route_lock_node(rn);
+ 	mq->size++;
++	atomic_fetch_add_explicit(&mq->total_metaq, 1, memory_order_relaxed);
++	atomic_fetch_add_explicit(&mq->total_subq[qindex], 1, memory_order_relaxed);
++	curr = listcount(mq->subq[qindex]);
++	high = atomic_load_explicit(&mq->max_subq[qindex], memory_order_relaxed);
++	if (curr > high)
++		atomic_store_explicit(&mq->max_subq[qindex], curr, memory_order_relaxed);
++	high = atomic_load_explicit(&mq->max_metaq, memory_order_relaxed);
++	if (mq->size > high)
++		atomic_store_explicit(&mq->max_metaq, mq->size, memory_order_relaxed);
+ 
+ 	if (IS_ZEBRA_DEBUG_RIB_DETAILED)
+ 		rnode_debug(rn, re->vrf_id, "queued rn %p into sub-queue %s mq size %u", (void *)rn,
+@@ -3318,8 +3386,21 @@ static int rib_meta_queue_add(struct meta_queue *mq, void *data)
+ 
+ static int early_label_meta_queue_add(struct meta_queue *mq, void *data)
+ {
++	uint64_t curr, high;
++
+ 	listnode_add(mq->subq[META_QUEUE_EARLY_LABEL], data);
+ 	mq->size++;
++	atomic_fetch_add_explicit(&mq->total_metaq, 1, memory_order_relaxed);
++	atomic_fetch_add_explicit(&mq->total_subq[META_QUEUE_EARLY_LABEL], 1, memory_order_relaxed);
++	curr = listcount(mq->subq[META_QUEUE_EARLY_LABEL]);
++	high = atomic_load_explicit(&mq->max_subq[META_QUEUE_EARLY_LABEL], memory_order_relaxed);
++	if (curr > high)
++		atomic_store_explicit(&mq->max_subq[META_QUEUE_EARLY_LABEL], curr,
++				      memory_order_relaxed);
++	high = atomic_load_explicit(&mq->max_metaq, memory_order_relaxed);
++	if (mq->size > high)
++		atomic_store_explicit(&mq->max_metaq, mq->size, memory_order_relaxed);
++
+ 	return 0;
+ }
+ 
+@@ -3328,6 +3409,7 @@ static int rib_meta_queue_nhg_ctx_add(struct meta_queue *mq, void *data)
+ 	struct nhg_ctx *ctx = NULL;
+ 	uint8_t qindex = META_QUEUE_NHG;
+ 	struct wq_nhg_wrapper *w;
++	uint64_t curr, high;
+ 
+ 	ctx = (struct nhg_ctx *)data;
+ 
+@@ -3341,6 +3423,15 @@ static int rib_meta_queue_nhg_ctx_add(struct meta_queue *mq, void *data)
+ 
+ 	listnode_add(mq->subq[qindex], w);
+ 	mq->size++;
++	atomic_fetch_add_explicit(&mq->total_metaq, 1, memory_order_relaxed);
++	atomic_fetch_add_explicit(&mq->total_subq[qindex], 1, memory_order_relaxed);
++	curr = listcount(mq->subq[qindex]);
++	high = atomic_load_explicit(&mq->max_subq[qindex], memory_order_relaxed);
++	if (curr > high)
++		atomic_store_explicit(&mq->max_subq[qindex], curr, memory_order_relaxed);
++	high = atomic_load_explicit(&mq->max_metaq, memory_order_relaxed);
++	if (mq->size > high)
++		atomic_store_explicit(&mq->max_metaq, mq->size, memory_order_relaxed);
+ 
+ 	if (IS_ZEBRA_DEBUG_RIB_DETAILED)
+ 		zlog_debug("NHG Context id=%u queued into sub-queue %s mq size %u", ctx->id,
+@@ -3355,6 +3446,7 @@ static int rib_meta_queue_nhg_process(struct meta_queue *mq, void *data,
+ 	struct nhg_hash_entry *nhe = NULL;
+ 	uint8_t qindex = META_QUEUE_NHG;
+ 	struct wq_nhg_wrapper *w;
++	uint64_t curr, high;
+ 
+ 	nhe = (struct nhg_hash_entry *)data;
+ 
+@@ -3369,6 +3461,15 @@ static int rib_meta_queue_nhg_process(struct meta_queue *mq, void *data,
+ 
+ 	listnode_add(mq->subq[qindex], w);
+ 	mq->size++;
++	atomic_fetch_add_explicit(&mq->total_metaq, 1, memory_order_relaxed);
++	atomic_fetch_add_explicit(&mq->total_subq[qindex], 1, memory_order_relaxed);
++	curr = listcount(mq->subq[qindex]);
++	high = atomic_load_explicit(&mq->max_subq[qindex], memory_order_relaxed);
++	if (curr > high)
++		atomic_store_explicit(&mq->max_subq[qindex], curr, memory_order_relaxed);
++	high = atomic_load_explicit(&mq->max_metaq, memory_order_relaxed);
++	if (mq->size > high)
++		atomic_store_explicit(&mq->max_metaq, mq->size, memory_order_relaxed);
+ 
+ 	if (IS_ZEBRA_DEBUG_RIB_DETAILED)
+ 		zlog_debug("NHG id=%u queued into sub-queue %s mq size %u", nhe->id,
+@@ -3389,8 +3490,19 @@ static int rib_meta_queue_nhg_del(struct meta_queue *mq, void *data)
+ 
+ static int rib_meta_queue_evpn_add(struct meta_queue *mq, void *data)
+ {
++	uint64_t curr, high;
++
+ 	listnode_add(mq->subq[META_QUEUE_EVPN], data);
+ 	mq->size++;
++	atomic_fetch_add_explicit(&mq->total_metaq, 1, memory_order_relaxed);
++	atomic_fetch_add_explicit(&mq->total_subq[META_QUEUE_EVPN], 1, memory_order_relaxed);
++	curr = listcount(mq->subq[META_QUEUE_EVPN]);
++	high = atomic_load_explicit(&mq->max_subq[META_QUEUE_EVPN], memory_order_relaxed);
++	if (curr > high)
++		atomic_store_explicit(&mq->max_subq[META_QUEUE_EVPN], curr, memory_order_relaxed);
++	high = atomic_load_explicit(&mq->max_metaq, memory_order_relaxed);
++	if (mq->size > high)
++		atomic_store_explicit(&mq->max_metaq, mq->size, memory_order_relaxed);
+ 
+ 	return 0;
+ }
+@@ -4235,8 +4347,19 @@ void _route_entry_dump(const char *func, union prefixconstptr pp,
+ 
+ static int rib_meta_queue_gr_run_add(struct meta_queue *mq, void *data)
+ {
++	uint64_t curr, high;
++
+ 	listnode_add(mq->subq[META_QUEUE_GR_RUN], data);
+ 	mq->size++;
++	atomic_fetch_add_explicit(&mq->total_metaq, 1, memory_order_relaxed);
++	atomic_fetch_add_explicit(&mq->total_subq[META_QUEUE_GR_RUN], 1, memory_order_relaxed);
++	curr = listcount(mq->subq[META_QUEUE_GR_RUN]);
++	high = atomic_load_explicit(&mq->max_subq[META_QUEUE_GR_RUN], memory_order_relaxed);
++	if (curr > high)
++		atomic_store_explicit(&mq->max_subq[META_QUEUE_GR_RUN], curr, memory_order_relaxed);
++	high = atomic_load_explicit(&mq->max_metaq, memory_order_relaxed);
++	if (mq->size > high)
++		atomic_store_explicit(&mq->max_metaq, mq->size, memory_order_relaxed);
+ 
+ 	if (IS_ZEBRA_DEBUG_RIB_DETAILED)
+ 		zlog_debug("Graceful Run adding mq size %u", zrouter.mq->size);
+@@ -4247,9 +4370,20 @@ static int rib_meta_queue_gr_run_add(struct meta_queue *mq, void *data)
+ static int rib_meta_queue_early_route_add(struct meta_queue *mq, void *data)
+ {
+ 	struct zebra_early_route *ere = data;
++	uint64_t curr, high;
+ 
+ 	listnode_add(mq->subq[META_QUEUE_EARLY_ROUTE], data);
+ 	mq->size++;
++	atomic_fetch_add_explicit(&mq->total_metaq, 1, memory_order_relaxed);
++	atomic_fetch_add_explicit(&mq->total_subq[META_QUEUE_EARLY_ROUTE], 1, memory_order_relaxed);
++	curr = listcount(mq->subq[META_QUEUE_EARLY_ROUTE]);
++	high = atomic_load_explicit(&mq->max_subq[META_QUEUE_EARLY_ROUTE], memory_order_relaxed);
++	if (curr > high)
++		atomic_store_explicit(&mq->max_subq[META_QUEUE_EARLY_ROUTE], curr,
++				      memory_order_relaxed);
++	high = atomic_load_explicit(&mq->max_metaq, memory_order_relaxed);
++	if (mq->size > high)
++		atomic_store_explicit(&mq->max_metaq, mq->size, memory_order_relaxed);
+ 
+ 	if (IS_ZEBRA_DEBUG_RIB_DETAILED) {
+ 		struct vrf *vrf = vrf_lookup_by_id(ere->re->vrf_id);
+diff --git a/zebra/zebra_vty.c b/zebra/zebra_vty.c
+index 90ef45705c..fa2d6e18c4 100644
+--- a/zebra/zebra_vty.c
++++ b/zebra/zebra_vty.c
+@@ -4051,6 +4051,20 @@ DEFUN (zebra_show_routing_tables_summary,
+ 	return CMD_SUCCESS;
+ }
+ 
++/* Display Zebra MetaQ counters */
++DEFUN (show_zebra_metaq_counters,
++       show_zebra_metaq_counters_cmd,
++       "show zebra metaq [json]",
++       SHOW_STR
++       ZEBRA_STR
++       "Zebra MetaQ counters\n"
++       JSON_STR)
++{
++	bool uj = use_json(argc, argv);
++
++	return zebra_show_metaq_counter(vty, uj);
++}
++
+ /* IPForwarding configuration write function. */
+ static int config_write_forwarding(struct vty *vty)
+ {
+@@ -4340,6 +4354,7 @@ void zebra_vty_init(void)
+ 	install_element(VIEW_NODE, &show_dataplane_providers_cmd);
+ 	install_element(CONFIG_NODE, &zebra_dplane_queue_limit_cmd);
+ 	install_element(CONFIG_NODE, &no_zebra_dplane_queue_limit_cmd);
++	install_element(VIEW_NODE, &show_zebra_metaq_counters_cmd);
+ 
+ #ifdef HAVE_NETLINK
+ 	install_element(CONFIG_NODE, &zebra_kernel_netlink_batch_tx_buf_cmd);
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0050-bgpd-add-total-path-count-for-bgp-net-in-json-output.patch b/src/sonic-frr/patch/0050-bgpd-add-total-path-count-for-bgp-net-in-json-output.patch
new file mode 100644
index 00000000000..8a85251d14b
--- /dev/null
+++ b/src/sonic-frr/patch/0050-bgpd-add-total-path-count-for-bgp-net-in-json-output.patch
@@ -0,0 +1,35 @@
+From 3b913e52450789d34155b17db3a6acca84cdbd86 Mon Sep 17 00:00:00 2001
+From: Soumya Roy <souroy@nvidia.com>
+Date: Thu, 1 May 2025 06:12:40 +0000
+Subject: [PATCH 50/56] bgpd: add total path count for bgp net in json output
+
+Currently only vty output shows total path count for a
+BGP net. This fix add that information in josn output too.
+
+Signed-off-by: Soumya Roy <souroy@nvidia.com>
+---
+ bgpd/bgp_route.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index 4c3cd42f30..fffab7d682 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -13112,6 +13112,14 @@ void route_vty_out_detail_header(struct vty *vty, struct bgp *bgp,
+ 			}
+ 			vty_out(vty, "\n");
+ 		}
++
++		if (json) {
++			if (incremental_print) {
++				vty_out(vty, "\"pathCount\": %d", count);
++				vty_out(vty, ",");
++			} else
++				json_object_int_add(json, "pathCount", count);
++		}
+ 	}
+ }
+ 
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch b/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch
deleted file mode 100644
index f4f1b6b3b42..00000000000
--- a/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From df1d28fcc12d4f5541c9335115887d31e6197b80 Mon Sep 17 00:00:00 2001
-From: Rajasekar Raja <rajasekarr@nvidia.com>
-Date: Mon, 22 Jul 2024 10:13:19 -0700
-Subject: [PATCH] bgpd: backpressure - Avoid use after free
-
-Coverity complains there is a use after free (1598495 and 1598496)
-At this point, most likely dest->refcount cannot go 1 and free up
-the dest, but there might be some code path where this can happen.
-
-Fixing this with a simple order change (no harm fix).
-
-Ticket :#4001204
-
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index c517a67f5..63e2e1c05 100644
---- a/bgpd/bgp_evpn.c
-+++ b/bgpd/bgp_evpn.c
-@@ -6307,9 +6307,9 @@ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
- 	     dest = dest_next) {
- 		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
- 		if (dest->za_vpn == vpn) {
-+			zebra_announce_del(&bm->zebra_announce_head, dest);
- 			bgp_path_info_unlock(dest->za_bgp_pi);
- 			bgp_dest_unlock_node(dest);
--			zebra_announce_del(&bm->zebra_announce_head, dest);
- 		}
- 	}
- 	bgp_evpn_remote_ip_hash_destroy(vpn);
-diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index 8132d0515..8ebfde10c 100644
---- a/bgpd/bgpd.c
-+++ b/bgpd/bgpd.c
-@@ -3885,9 +3885,9 @@ int bgp_delete(struct bgp *bgp)
- 		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
- 		dest_table = bgp_dest_table(dest);
- 		if (dest_table->bgp == bgp) {
-+			zebra_announce_del(&bm->zebra_announce_head, dest);
- 			bgp_path_info_unlock(dest->za_bgp_pi);
- 			bgp_dest_unlock_node(dest);
--			zebra_announce_del(&bm->zebra_announce_head, dest);
- 		}
- 	}
-
---
-2.39.4
-
diff --git a/src/sonic-frr/patch/0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch b/src/sonic-frr/patch/0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch
deleted file mode 100644
index 53d12a6a83d..00000000000
--- a/src/sonic-frr/patch/0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From cc56963da0e8f0ca606bc9b932e9180ad059f8c5 Mon Sep 17 00:00:00 2001
-From: Rajasekar Raja <rajasekarr@nvidia.com>
-Date: Tue, 16 Jul 2024 23:34:15 -0700
-Subject: [PATCH 1/2] bgpd: backpressure - fix ret value
- evpn_route_select_install
-
-The return value of evpn_route_select_install is ignored in all cases
-except during vni route table install/uninstall and based on the
-returned value, an error is logged. Fixing this.
-
-Ticket :#3992392
-
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index bb3cd62950..34128e7c19 100644
---- a/bgpd/bgp_evpn.c
-+++ b/bgpd/bgp_evpn.c
-@@ -1433,11 +1433,12 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
- 	    && !bgp_addpath_is_addpath_used(&bgp->tx_addpath, afi, safi)) {
- 		if (bgp_zebra_has_route_changed(old_select)) {
- 			if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS))
--				evpn_zebra_install(
--					bgp, vpn,
--					(const struct prefix_evpn *)
--						bgp_dest_get_prefix(dest),
--					old_select);
-+				ret = evpn_zebra_install(bgp, vpn,
-+							 (const struct prefix_evpn
-+								  *)
-+								 bgp_dest_get_prefix(
-+									 dest),
-+							 old_select);
- 			else
- 				bgp_zebra_route_install(dest, old_select, bgp,
- 							true, vpn, false);
-@@ -1475,10 +1476,11 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
- 	    && (new_select->sub_type == BGP_ROUTE_IMPORTED ||
- 			bgp_evpn_attr_is_sync(new_select->attr))) {
- 		if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS))
--			evpn_zebra_install(bgp, vpn,
--					   (const struct prefix_evpn *)
--						   bgp_dest_get_prefix(dest),
--					   new_select);
-+			ret = evpn_zebra_install(bgp, vpn,
-+						 (const struct prefix_evpn *)
-+							 bgp_dest_get_prefix(
-+								 dest),
-+						 new_select);
- 		else
- 			bgp_zebra_route_install(dest, new_select, bgp, true,
- 						vpn, false);
-@@ -1503,11 +1505,12 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
- 			if (CHECK_FLAG(bgp->flags,
- 				       BGP_FLAG_DELETE_IN_PROGRESS) ||
- 			    CHECK_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN))
--				evpn_zebra_uninstall(
--					bgp, vpn,
--					(const struct prefix_evpn *)
--						bgp_dest_get_prefix(dest),
--					old_select, false);
-+				ret = evpn_zebra_uninstall(bgp, vpn,
-+							   (const struct prefix_evpn
-+								    *)
-+								   bgp_dest_get_prefix(
-+									   dest),
-+							   old_select, false);
- 			else
- 				bgp_zebra_route_install(dest, old_select, bgp,
- 							false, vpn, false);
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0051-lib-Add-nexthop_same_no_ifindex-comparison-function.patch b/src/sonic-frr/patch/0051-lib-Add-nexthop_same_no_ifindex-comparison-function.patch
new file mode 100644
index 00000000000..5f007badeaf
--- /dev/null
+++ b/src/sonic-frr/patch/0051-lib-Add-nexthop_same_no_ifindex-comparison-function.patch
@@ -0,0 +1,115 @@
+From 608004da7c62d7b03f7304bff556b99c7e4b77b0 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 1 May 2025 12:21:30 -0400
+Subject: [PATCH 51/56] lib: Add nexthop_same_no_ifindex comparison function
+
+Add a nexthop_same_no_ifindex comparison function to
+allow nexthops to be compared without looking at the
+outgoing ifindex.  This is because sometimes it is
+not possible to resolve a nh to a ifindex when
+zebra receives it and we need the ability to compare
+them then.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ lib/nexthop.c | 28 ++++++++++++++++++++++------
+ lib/nexthop.h |  1 +
+ 2 files changed, 23 insertions(+), 6 deletions(-)
+
+diff --git a/lib/nexthop.c b/lib/nexthop.c
+index f47192542b..39ab2e7306 100644
+--- a/lib/nexthop.c
++++ b/lib/nexthop.c
+@@ -139,7 +139,7 @@ static int _nexthop_source_cmp(const struct nexthop *nh1,
+ }
+ 
+ static int _nexthop_cmp_no_labels(const struct nexthop *next1,
+-				  const struct nexthop *next2, bool use_weight)
++				  const struct nexthop *next2, bool use_weight, bool use_ifindex)
+ {
+ 	int ret = 0;
+ 
+@@ -175,6 +175,8 @@ static int _nexthop_cmp_no_labels(const struct nexthop *next1,
+ 		ret = _nexthop_gateway_cmp(next1, next2);
+ 		if (ret != 0)
+ 			return ret;
++		if (!use_ifindex)
++			break;
+ 		fallthrough;
+ 	case NEXTHOP_TYPE_IFINDEX:
+ 		if (next1->ifindex < next2->ifindex)
+@@ -230,11 +232,11 @@ done:
+ }
+ 
+ static int nexthop_cmp_internal(const struct nexthop *next1,
+-				const struct nexthop *next2, bool use_weight)
++				const struct nexthop *next2, bool use_weight, bool use_ifindex)
+ {
+ 	int ret = 0;
+ 
+-	ret = _nexthop_cmp_no_labels(next1, next2, use_weight);
++	ret = _nexthop_cmp_no_labels(next1, next2, use_weight, use_ifindex);
+ 	if (ret != 0)
+ 		return ret;
+ 
+@@ -249,13 +251,13 @@ static int nexthop_cmp_internal(const struct nexthop *next1,
+ 
+ int nexthop_cmp(const struct nexthop *next1, const struct nexthop *next2)
+ {
+-	return nexthop_cmp_internal(next1, next2, true);
++	return nexthop_cmp_internal(next1, next2, true, true);
+ }
+ 
+ int nexthop_cmp_no_weight(const struct nexthop *next1,
+ 			  const struct nexthop *next2)
+ {
+-	return nexthop_cmp_internal(next1, next2, false);
++	return nexthop_cmp_internal(next1, next2, false, true);
+ }
+ 
+ /*
+@@ -426,6 +428,20 @@ void nexthops_free(struct nexthop *nexthop)
+ 	}
+ }
+ 
++bool nexthop_same_no_ifindex(const struct nexthop *nh1, const struct nexthop *nh2)
++{
++	if (nh1 && !nh2)
++		return false;
++
++	if (!nh1 && nh2)
++		return false;
++
++	if (nh1 == nh2)
++		return true;
++
++	return nexthop_cmp_internal(nh1, nh2, true, false);
++}
++
+ bool nexthop_same(const struct nexthop *nh1, const struct nexthop *nh2)
+ {
+ 	if (nh1 && !nh2)
+@@ -455,7 +471,7 @@ bool nexthop_same_no_labels(const struct nexthop *nh1,
+ 	if (nh1 == nh2)
+ 		return true;
+ 
+-	if (_nexthop_cmp_no_labels(nh1, nh2, true) != 0)
++	if (_nexthop_cmp_no_labels(nh1, nh2, true, true) != 0)
+ 		return false;
+ 
+ 	return true;
+diff --git a/lib/nexthop.h b/lib/nexthop.h
+index 65056cd553..ac93b91a5b 100644
+--- a/lib/nexthop.h
++++ b/lib/nexthop.h
+@@ -243,6 +243,7 @@ struct nexthop *nexthop_from_blackhole(enum blackhole_type bh_type,
+ uint32_t nexthop_hash(const struct nexthop *nexthop);
+ 
+ extern bool nexthop_same(const struct nexthop *nh1, const struct nexthop *nh2);
++extern bool nexthop_same_no_ifindex(const struct nexthop *nh1, const struct nexthop *nh2);
+ extern bool nexthop_same_no_labels(const struct nexthop *nh1,
+ 				   const struct nexthop *nh2);
+ extern int nexthop_cmp(const struct nexthop *nh1, const struct nexthop *nh2);
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch b/src/sonic-frr/patch/0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch
deleted file mode 100644
index 62ba8a3b739..00000000000
--- a/src/sonic-frr/patch/0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From dd591de04b0e25c74a9936c854bb6dbe7839bd39 Mon Sep 17 00:00:00 2001
-From: Rajasekar Raja <rajasekarr@nvidia.com>
-Date: Thu, 18 Jul 2024 22:23:23 -0700
-Subject: [PATCH 2/2] bgpd: backpressure - log error for evpn when route
- install to zebra fails.
-
-log error for evpn in case route install to zebra fails.
-
-Ticket :#3992392
-
-Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
-
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index 278e228d66..038d328a60 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -1799,6 +1799,7 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
- 	struct bgp_table *table = NULL;
- 	enum zclient_send_status status = ZCLIENT_SEND_SUCCESS;
- 	bool install;
-+	const struct prefix_evpn *evp = NULL;
- 
- 	while (count < ZEBRA_ANNOUNCEMENTS_LIMIT) {
- 		is_evpn = false;
-@@ -1809,10 +1810,12 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
- 			break;
- 
- 		table = bgp_dest_table(dest);
--		install =
--			CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
--		if (table->afi == AFI_L2VPN && table->safi == SAFI_EVPN)
-+		install = CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
-+		if (table->afi == AFI_L2VPN && table->safi == SAFI_EVPN) {
- 			is_evpn = true;
-+			evp = (const struct prefix_evpn *)bgp_dest_get_prefix(
-+				dest);
-+		}
- 
- 		if (BGP_DEBUG(zebra, ZEBRA))
- 			zlog_debug(
-@@ -1845,6 +1848,17 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
- 			UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
- 		}
- 
-+		if (is_evpn && status == ZCLIENT_SEND_FAILURE)
-+			flog_err(EC_BGP_EVPN_FAIL,
-+				 "%s (%u): Failed to %s EVPN %pFX %s route in VNI %u",
-+				 vrf_id_to_name(table->bgp->vrf_id),
-+				 table->bgp->vrf_id,
-+				 install ? "install" : "uninstall", evp,
-+				 evp->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE
-+					 ? "MACIP"
-+					 : "IMET",
-+				 dest->za_vpn->vni);
-+
- 		bgp_path_info_unlock(dest->za_bgp_pi);
- 		dest->za_bgp_pi = NULL;
- 		dest->za_vpn = NULL;
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0052-zebra-show-nexthop-count-in-nexthop-group-command.patch b/src/sonic-frr/patch/0052-zebra-show-nexthop-count-in-nexthop-group-command.patch
new file mode 100644
index 00000000000..0ae5aabf7c7
--- /dev/null
+++ b/src/sonic-frr/patch/0052-zebra-show-nexthop-count-in-nexthop-group-command.patch
@@ -0,0 +1,79 @@
+From 1524a471e87e7fd3bf9c285cd616102e5346492a Mon Sep 17 00:00:00 2001
+From: Krishnasamy <krishnasamyr@nvidia.com>
+Date: Tue, 6 May 2025 06:49:52 +0000
+Subject: [PATCH 52/56] zebra: show nexthop count in nexthop-group command
+
+Show the nexthops count in an NHG
+
+Signed-off-by: Krishnasamy <krishnasamyr@nvidia.com>
+---
+ lib/nexthop_group.c | 2 +-
+ lib/nexthop_group.h | 1 +
+ zebra/zebra_vty.c   | 5 +++++
+ 3 files changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/lib/nexthop_group.c b/lib/nexthop_group.c
+index cb1ebb5d09..fb023f375e 100644
+--- a/lib/nexthop_group.c
++++ b/lib/nexthop_group.c
+@@ -81,7 +81,7 @@ uint16_t nexthop_group_nexthop_num(const struct nexthop_group *nhg)
+ 	return num;
+ }
+ 
+-static uint16_t nexthop_group_nexthop_num_no_recurse(const struct nexthop_group *nhg)
++uint16_t nexthop_group_nexthop_num_no_recurse(const struct nexthop_group *nhg)
+ {
+ 	struct nexthop *nhop;
+ 	uint16_t num = 0;
+diff --git a/lib/nexthop_group.h b/lib/nexthop_group.h
+index 9103299418..3891ff88a3 100644
+--- a/lib/nexthop_group.h
++++ b/lib/nexthop_group.h
+@@ -153,6 +153,7 @@ extern uint16_t nexthop_group_nexthop_num(const struct nexthop_group *nhg);
+ extern uint16_t nexthop_group_active_nexthop_num(const struct nexthop_group *nhg);
+ 
+ extern bool nexthop_group_has_label(const struct nexthop_group *nhg);
++extern uint16_t nexthop_group_nexthop_num_no_recurse(const struct nexthop_group *nhg);
+ 
+ #ifdef __cplusplus
+ }
+diff --git a/zebra/zebra_vty.c b/zebra/zebra_vty.c
+index fa2d6e18c4..60ee77583a 100644
+--- a/zebra/zebra_vty.c
++++ b/zebra/zebra_vty.c
+@@ -1071,6 +1071,7 @@ static void show_nexthop_group_out(struct vty *vty, struct nhg_hash_entry *nhe,
+ 	json_object *json = NULL;
+ 	json_object *json_backup_nexthop_array = NULL;
+ 	json_object *json_backup_nexthops = NULL;
++	uint16_t nexthop_count = 0;
+ 
+ 
+ 	uptime2str(nhe->uptime, up_str, sizeof(up_str));
+@@ -1078,6 +1079,8 @@ static void show_nexthop_group_out(struct vty *vty, struct nhg_hash_entry *nhe,
+ 	if (json_nhe_hdr)
+ 		json = json_object_new_object();
+ 
++	nexthop_count = nexthop_group_nexthop_num_no_recurse(&nhe->nhg);
++
+ 	if (json) {
+ 		json_object_string_add(json, "type",
+ 				       zebra_route_string(nhe->type));
+@@ -1092,6 +1095,7 @@ static void show_nexthop_group_out(struct vty *vty, struct nhg_hash_entry *nhe,
+ 		json_object_string_add(json, "vrf",
+ 				       vrf_id_to_name(nhe->vrf_id));
+ 		json_object_string_add(json, "afi", afi2str(nhe->afi));
++		json_object_int_add(json, "nexthopCount", nexthop_count);
+ 
+ 	} else {
+ 		vty_out(vty, "ID: %u (%s)\n", nhe->id,
+@@ -1107,6 +1111,7 @@ static void show_nexthop_group_out(struct vty *vty, struct nhg_hash_entry *nhe,
+ 		vty_out(vty, "     Uptime: %s\n", up_str);
+ 		vty_out(vty, "     VRF: %s(%s)\n", vrf_id_to_name(nhe->vrf_id),
+ 			afi2str(nhe->afi));
++		vty_out(vty, "     Nexthop Count: %u\n", nexthop_count);
+ 	}
+ 
+ 	if (CHECK_FLAG(nhe->flags, NEXTHOP_GROUP_VALID)) {
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0053-zebra-Allow-nhg-s-to-be-reused-when-multiple-interfa.patch b/src/sonic-frr/patch/0053-zebra-Allow-nhg-s-to-be-reused-when-multiple-interfa.patch
new file mode 100644
index 00000000000..f8ec6a36cf6
--- /dev/null
+++ b/src/sonic-frr/patch/0053-zebra-Allow-nhg-s-to-be-reused-when-multiple-interfa.patch
@@ -0,0 +1,90 @@
+From 5b106e3b2b569e66cb85d079fb3f779db7ad7b9a Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 24 Apr 2025 14:45:14 -0400
+Subject: [PATCH 53/56] zebra: Allow nhg's to be reused when multiple
+ interfaces are going amuck
+
+Currently if there are multiple interfaces going down it is possible
+to have a ships in the night situation with trying to reuse a nhg.
+
+Imagine that you have a route w/ 4 way ecmp
+  nexthop A interface a
+  nexthop B interface b
+  nexthop C interface c
+  nexthop D interface d
+
+Suppose interface a goes down, zebra receives this data
+marks singleton nexthop A down and then recurses up the
+tree to the 4 way ecmp and sets nexthop A as inactive.
+Zebra then will notify the upper level protocol.
+
+The upper level protocol will refigure the route and send
+it down with 3 way ecmp.  At the same time if interface
+b goes down and zebra handles that interface down event
+before the new route installation, then when
+zebra_nhg_rib_compare_old_nhe is called it will not
+match the old and new ones up as that the old will be:
+
+  nexthop A  <inactive>
+  nexthop B  <inactive>
+  nexthop C
+  nexthop D
+
+New will be:
+
+   nexthop B  <inactive>
+   nexthop C
+   nexthop D
+
+Currently zebra_nhg_nexthop_compare on the old skips all
+the inactive but it never skips the nexthops at are inactive
+on the new.
+
+Modify the code to allow the new nhop to be skipped if it
+is the same nexthop being looked at as the old and it
+is not active as well.  This allows zebra to choose
+the same nhg in the above case to continue working.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/zebra_nhg.c | 20 +++++++++++++++++---
+ 1 file changed, 17 insertions(+), 3 deletions(-)
+
+diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c
+index f5141c8f23..0db8e18a0b 100644
+--- a/zebra/zebra_nhg.c
++++ b/zebra/zebra_nhg.c
+@@ -2945,13 +2945,27 @@ static bool zebra_nhg_nexthop_compare(const struct nexthop *nhop,
+ 
+ 	while (nhop && old_nhop) {
+ 		if (IS_ZEBRA_DEBUG_NHG_DETAIL)
+-			zlog_debug("%s: %pRN Comparing %pNHvv(%u) to old: %pNHvv(%u)",
+-				   __func__, rn, nhop, nhop->flags, old_nhop,
+-				   old_nhop->flags);
++			zlog_debug("%s: %pRN Comparing %pNHvv(%u) ACTIVE: %d to old: %pNHvv(%u) ACTIVE: %d nexthop same: %d",
++				   __func__, rn, nhop, nhop->flags,
++				   CHECK_FLAG(nhop->flags, NEXTHOP_FLAG_ACTIVE), old_nhop,
++				   old_nhop->flags, CHECK_FLAG(old_nhop->flags, NEXTHOP_FLAG_ACTIVE),
++				   nexthop_same_no_ifindex(nhop, old_nhop));
+ 		if (!CHECK_FLAG(old_nhop->flags, NEXTHOP_FLAG_ACTIVE)) {
+ 			if (IS_ZEBRA_DEBUG_NHG_DETAIL)
+ 				zlog_debug("%s: %pRN Old is not active going to the next one",
+ 					   __func__, rn);
++
++			/*
++			 * If the new nexthop is not active and the old nexthop is also not active,
++			 * then we know that we can skip both the old and new nexthops.
++			 */
++			if (!CHECK_FLAG(nhop->flags, NEXTHOP_FLAG_ACTIVE) &&
++			    nexthop_same_no_ifindex(nhop, old_nhop)) {
++				if (IS_ZEBRA_DEBUG_NHG_DETAIL)
++					zlog_debug("%s: %pRN new is not active going to the next one",
++						   __func__, rn);
++				nhop = nhop->next;
++			}
+ 			old_nhop = old_nhop->next;
+ 			continue;
+ 		}
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0054-build-dplane-fpm-sonic-module.patch b/src/sonic-frr/patch/0054-build-dplane-fpm-sonic-module.patch
deleted file mode 100644
index 03af6cad314..00000000000
--- a/src/sonic-frr/patch/0054-build-dplane-fpm-sonic-module.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 9e789e450003b9d2c7347c9f9b0d29d9b84d525f Mon Sep 17 00:00:00 2001
-From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
-Date: Tue, 1 Oct 2024 02:28:17 -0700
-Subject: [PATCH] Build dplane_fpm_sonic module
-
-From: Carmine Scarpitta <cscarpit@cisco.com>
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- debian/frr.install | 1 +
- redhat/frr.spec.in | 1 +
- zebra/subdir.am    | 6 ++++++
- 3 files changed, 8 insertions(+)
-
-diff --git a/debian/frr.install b/debian/frr.install
-index d4b904b6e..375f0dadd 100644
---- a/debian/frr.install
-+++ b/debian/frr.install
-@@ -11,6 +11,7 @@ usr/lib/*/frr/libfrrospfapiclient.*
- usr/lib/*/frr/libmgmt_be_nb.*
- usr/lib/*/frr/modules/bgpd_bmp.so
- usr/lib/*/frr/modules/dplane_fpm_nl.so
-+usr/lib/*/frr/modules/dplane_fpm_sonic.so
- usr/lib/*/frr/modules/zebra_cumulus_mlag.so
- usr/lib/*/frr/modules/zebra_fpm.so
- usr/lib/*/frr/modules/pathd_pcep.so
-diff --git a/redhat/frr.spec.in b/redhat/frr.spec.in
-index 13d5b8689..ffbe872c4 100644
---- a/redhat/frr.spec.in
-+++ b/redhat/frr.spec.in
-@@ -723,6 +723,7 @@ fi
- %endif
- %{_libdir}/frr/modules/zebra_cumulus_mlag.so
- %{_libdir}/frr/modules/dplane_fpm_nl.so
-+%{_libdir}/frr/modules/dplane_fpm_sonic.so
- %{_libdir}/frr/modules/bgpd_bmp.so
- %{_libdir}/libfrr_pb.so*
- %{_libdir}/libfrrfpm_pb.so*
-diff --git a/zebra/subdir.am b/zebra/subdir.am
-index d9c8d9045..ecc7195ae 100644
---- a/zebra/subdir.am
-+++ b/zebra/subdir.am
-@@ -245,6 +245,12 @@ zebra_dplane_fpm_nl_la_LDFLAGS = $(MODULE_LDFLAGS)
- zebra_dplane_fpm_nl_la_LIBADD  =
- endif
- 
-+module_LTLIBRARIES += zebra/dplane_fpm_sonic.la
-+
-+zebra_dplane_fpm_sonic_la_SOURCES = zebra/dplane_fpm_sonic.c
-+zebra_dplane_fpm_sonic_la_LDFLAGS = $(MODULE_LDFLAGS)
-+zebra_dplane_fpm_sonic_la_LIBADD  =
-+
- if NETLINK_DEBUG
- zebra_zebra_SOURCES += \
- 	zebra/debug_nl.c \
--- 
-2.39.4
-
diff --git a/src/sonic-frr/patch/0054-zebra-Prevent-active-setting-if-interface-is-not-ope.patch b/src/sonic-frr/patch/0054-zebra-Prevent-active-setting-if-interface-is-not-ope.patch
new file mode 100644
index 00000000000..bcab586d08a
--- /dev/null
+++ b/src/sonic-frr/patch/0054-zebra-Prevent-active-setting-if-interface-is-not-ope.patch
@@ -0,0 +1,76 @@
+From 053f23f62f84d85bcc79820c9f3cae71a3f74675 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 1 May 2025 10:09:47 -0400
+Subject: [PATCH 54/56] zebra: Prevent active setting if interface is not
+ operative
+
+Currently Installing nhg's has two paths for installation:
+a) A route comes in with a new nhg that will be selected.
+Zebra will check that the nexthops are good and signal
+that the route is ready for installation.  This in turn
+causes the nexthop to be installed first before the route
+installation.  This nexthop group installation then looks
+at each singleton and attempts to install those as well.
+This is a way to get routes installed quickly into the system
+if needed.
+
+b) A interface has an event that causes a nexthop group
+to change.  This will cause singletons to be handled appropriately
+and then once those are handled and installed the handler
+for the nexthop install success will walk the nexthop groups
+that use that nexthop and reinstalls them as well.
+
+Unfortunately both A and B are currently funneled through
+the same function.
+
+Now for the problem that is being seen:
+
+If you have a NHG A that uses NHG B/C/D nexthops.  Imagine
+that the B and C interfaces are down.  The NHG A will have
+B( inactive/!installed), C(inactive/!installed), D(active/installed)
+
+Now if interface B comes up, this will cause nexthop B to be
+reinstalled.  After B comes back up we will call a nexthop
+group reinstallation for A.  Since it is using the same
+functionality to reinstall, it looks at all it's singletons
+and sees that C is not installed and it was marking C as active,
+even though the interface is down) and attempting to reinstall it.
+
+Unfortunately if interface C happens to be up in the kernel, but
+not yet in zebra, you end up with nh C being installed and we
+mark the nh C as valid and installed.  Then when interface
+C actually comes up, it sees that the nhg C is up and does
+nothing.  Leaving the nhg's in a broken state.
+
+Modify the active setting to not set a singleton NH as
+active if the interface is not operational.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/zebra_nhg.c | 10 ++++++++--
+ 1 file changed, 8 insertions(+), 2 deletions(-)
+
+diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c
+index 0db8e18a0b..7e18cfa990 100644
+--- a/zebra/zebra_nhg.c
++++ b/zebra/zebra_nhg.c
+@@ -2780,8 +2780,14 @@ static bool zebra_nhg_set_valid_if_active(struct nhg_hash_entry *nhe)
+ 	}
+ 
+ 	/* should be fully resolved singleton at this point */
+-	if (CHECK_FLAG(nhe->nhg.nexthop->flags, NEXTHOP_FLAG_ACTIVE))
+-		valid = true;
++	if (CHECK_FLAG(nhe->nhg.nexthop->flags, NEXTHOP_FLAG_ACTIVE)) {
++		struct interface *ifp = if_lookup_by_index(nhe->nhg.nexthop->ifindex, nhe->vrf_id);
++
++		if (!ifp || !if_is_operative(ifp))
++			valid = false;
++		else
++			valid = true;
++	}
+ 
+ done:
+ 	if (valid)
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch b/src/sonic-frr/patch/0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
deleted file mode 100644
index ce4ee66ab31..00000000000
--- a/src/sonic-frr/patch/0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From 8b9b9549e6d2785d4237ddb510d285aba022bb68 Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Sun, 15 Sep 2024 17:23:34 +0200
-Subject: [PATCH 1/5] lib: Include SID structure in seg6local nexthop
-
-Include SID structure information in seg6local nexthop data structure.
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
-
-diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
-index 58e3097e1..ef8ca39e8 100644
---- a/bgpd/bgp_mplsvpn.c
-+++ b/bgpd/bgp_mplsvpn.c
-@@ -381,6 +381,19 @@ void vpn_leak_zebra_vrf_sid_update_per_af(struct bgp *bgp, afi_t afi)
- 	if (!vrf)
- 		return;
- 
-+	if (bgp->vpn_policy[afi].tovpn_sid_locator) {
-+		ctx.block_len =
-+			bgp->vpn_policy[afi].tovpn_sid_locator->block_bits_length;
-+		ctx.node_len =
-+			bgp->vpn_policy[afi].tovpn_sid_locator->node_bits_length;
-+		ctx.function_len =
-+			bgp->vpn_policy[afi]
-+				.tovpn_sid_locator->function_bits_length;
-+		ctx.argument_len =
-+			bgp->vpn_policy[afi]
-+				.tovpn_sid_locator->argument_bits_length;
-+	}
-+
- 	ctx.table = vrf->data.l.table_id;
- 	act = afi == AFI_IP ? ZEBRA_SEG6_LOCAL_ACTION_END_DT4
- 		: ZEBRA_SEG6_LOCAL_ACTION_END_DT6;
-@@ -432,6 +445,13 @@ void vpn_leak_zebra_vrf_sid_update_per_vrf(struct bgp *bgp)
- 	if (!vrf)
- 		return;
- 
-+	if (bgp->tovpn_sid_locator) {
-+		ctx.block_len = bgp->tovpn_sid_locator->block_bits_length;
-+		ctx.node_len = bgp->tovpn_sid_locator->node_bits_length;
-+		ctx.function_len = bgp->tovpn_sid_locator->function_bits_length;
-+		ctx.argument_len = bgp->tovpn_sid_locator->argument_bits_length;
-+	}
-+
- 	ctx.table = vrf->data.l.table_id;
- 	act = ZEBRA_SEG6_LOCAL_ACTION_END_DT46;
- 	zclient_send_localsid(zclient, tovpn_sid, bgp->vrf_id, act, &ctx);
-@@ -470,6 +490,7 @@ void vpn_leak_zebra_vrf_sid_update(struct bgp *bgp, afi_t afi)
- void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
- {
- 	int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL);
-+	struct seg6local_context seg6localctx = {};
- 
- 	if (bgp->vrf_id == VRF_UNKNOWN) {
- 		if (debug)
-@@ -482,9 +503,23 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
- 		zlog_debug("%s: deleting sid for vrf %s afi (id=%d)", __func__,
- 			   bgp->name_pretty, bgp->vrf_id);
- 
-+	if (bgp->vpn_policy[afi].tovpn_sid_locator) {
-+		seg6localctx.block_len =
-+			bgp->vpn_policy[afi].tovpn_sid_locator->block_bits_length;
-+		seg6localctx.node_len =
-+			bgp->vpn_policy[afi].tovpn_sid_locator->node_bits_length;
-+		seg6localctx.function_len =
-+			bgp->vpn_policy[afi]
-+				.tovpn_sid_locator->function_bits_length;
-+		seg6localctx.argument_len =
-+			bgp->vpn_policy[afi]
-+				.tovpn_sid_locator->argument_bits_length;
-+	}
-+
- 	zclient_send_localsid(zclient,
--		bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent,
--		bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC, NULL);
-+	      bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent,
-+	      bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC,
-+	      &seg6localctx);
- 	XFREE(MTYPE_BGP_SRV6_SID,
- 	      bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent);
- 	bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent = NULL;
-@@ -497,6 +532,7 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
- void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp)
- {
- 	int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL);
-+	struct seg6local_context seg6localctx = {};
- 
- 	if (bgp->vrf_id == VRF_UNKNOWN) {
- 		if (debug)
-@@ -510,9 +546,19 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp)
- 		zlog_debug("%s: deleting sid for vrf %s (id=%d)", __func__,
- 			   bgp->name_pretty, bgp->vrf_id);
- 
-+	if (bgp->tovpn_sid_locator) {
-+		seg6localctx.block_len =
-+			bgp->tovpn_sid_locator->block_bits_length;
-+		seg6localctx.node_len = bgp->tovpn_sid_locator->node_bits_length;
-+		seg6localctx.function_len =
-+			bgp->tovpn_sid_locator->function_bits_length;
-+		seg6localctx.argument_len =
-+			bgp->tovpn_sid_locator->argument_bits_length;
-+	}
-+
- 	zclient_send_localsid(zclient, bgp->tovpn_zebra_vrf_sid_last_sent,
- 			      bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC,
--			      NULL);
-+			      &seg6localctx);
- 	XFREE(MTYPE_BGP_SRV6_SID, bgp->tovpn_zebra_vrf_sid_last_sent);
- 	bgp->tovpn_zebra_vrf_sid_last_sent = NULL;
- }
-diff --git a/lib/srv6.h b/lib/srv6.h
-index 433c5c14f..53f5119aa 100644
---- a/lib/srv6.h
-+++ b/lib/srv6.h
-@@ -103,6 +103,10 @@ struct seg6local_context {
- 	struct in_addr nh4;
- 	struct in6_addr nh6;
- 	uint32_t table;
-+	uint8_t block_len;
-+	uint8_t node_len;
-+	uint8_t function_len;
-+	uint8_t argument_len;
- 	struct seg6local_flavors_info flv;
- };
- 
diff --git a/src/sonic-frr/patch/0055-zebra-Add-nexthop-group-id-to-route-dump.patch b/src/sonic-frr/patch/0055-zebra-Add-nexthop-group-id-to-route-dump.patch
new file mode 100644
index 00000000000..c76b294566c
--- /dev/null
+++ b/src/sonic-frr/patch/0055-zebra-Add-nexthop-group-id-to-route-dump.patch
@@ -0,0 +1,29 @@
+From 67c2de14e34085d652dfa495615abe2e3bb93b70 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Wed, 7 May 2025 11:34:16 -0400
+Subject: [PATCH 55/56] zebra: Add nexthop group id to route dump
+
+The `show ip zebra route dump" command is not
+displaying the nexthop group id number.  Add that
+in.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/zebra_vty.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/zebra/zebra_vty.c b/zebra/zebra_vty.c
+index 60ee77583a..e1e586ed04 100644
+--- a/zebra/zebra_vty.c
++++ b/zebra/zebra_vty.c
+@@ -2169,6 +2169,7 @@ static void show_ip_route_dump_vty(struct vty *vty, struct route_table *table, a
+ 					 tm.tm_hour);
+ 
+ 			vty_out(vty, "   status: %u\n", re->status);
++			vty_out(vty, "   nexthop_group_id: %u\n", re->nhe->id);
+ 			vty_out(vty, "   nexthop_num: %u\n",
+ 				nexthop_group_nexthop_num(&(re->nhe->nhg)));
+ 			vty_out(vty, "   nexthop_active_num: %u\n",
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0056-zebra-Display-interface-name-not-ifindex-in-nh-dump.patch b/src/sonic-frr/patch/0056-zebra-Display-interface-name-not-ifindex-in-nh-dump.patch
new file mode 100644
index 00000000000..0295a539944
--- /dev/null
+++ b/src/sonic-frr/patch/0056-zebra-Display-interface-name-not-ifindex-in-nh-dump.patch
@@ -0,0 +1,47 @@
+From e24f92ef6a5f368dd120d970829115b3890a4f85 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Wed, 7 May 2025 11:42:02 -0400
+Subject: [PATCH 56/56] zebra: Display interface name not ifindex in nh dump
+
+When dumping nexthop data, display the interface name
+as well.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/zebra_rib.c | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
+index 4047a1a7db..36b8d069e4 100644
+--- a/zebra/zebra_rib.c
++++ b/zebra/zebra_rib.c
+@@ -4219,12 +4219,13 @@ void route_entry_dump_nh(const struct route_entry *re, const char *straddr,
+ 	struct interface *ifp;
+ 	struct vrf *vrf = vrf_lookup_by_id(nexthop->vrf_id);
+ 
++	ifp = if_lookup_by_index(nexthop->ifindex, nexthop->vrf_id);
++
+ 	switch (nexthop->type) {
+ 	case NEXTHOP_TYPE_BLACKHOLE:
+ 		snprintf(nhname, sizeof(nhname), "Blackhole");
+ 		break;
+ 	case NEXTHOP_TYPE_IFINDEX:
+-		ifp = if_lookup_by_index(nexthop->ifindex, nexthop->vrf_id);
+ 		snprintf(nhname, sizeof(nhname), "%s",
+ 			 ifp ? ifp->name : "Unknown");
+ 		break;
+@@ -4262,9 +4263,9 @@ void route_entry_dump_nh(const struct route_entry *re, const char *straddr,
+ 	if (nexthop->weight)
+ 		snprintf(wgt_str, sizeof(wgt_str), "wgt %d,", nexthop->weight);
+ 
+-	zlog_debug("%s(%s): %s %s[%u] %svrf %s(%u) %s%s with flags %s%s%s%s%s%s%s%s%s",
++	zlog_debug("%s(%s): %s %s[%s:%d] %svrf %s(%u) %s%s with flags %s%s%s%s%s%s%s%s%s",
+ 		   straddr, VRF_LOGNAME(re_vrf),
+-		   (nexthop->rparent ? "  NH" : "NH"), nhname, nexthop->ifindex,
++		   (nexthop->rparent ? "  NH" : "NH"), nhname, ifp ? ifp->name : "Unknown", nexthop->ifindex,
+ 		   label_str, vrf ? vrf->name : "Unknown", nexthop->vrf_id,
+ 		   wgt_str, backup_str,
+ 		   (CHECK_FLAG(nexthop->flags, NEXTHOP_FLAG_ACTIVE) ? "ACTIVE "
+-- 
+2.39.5
+
diff --git a/src/sonic-frr/patch/0056-zebra-do-not-send-local-routes-to-fpm.patch b/src/sonic-frr/patch/0056-zebra-do-not-send-local-routes-to-fpm.patch
deleted file mode 100644
index 85f98f58ea4..00000000000
--- a/src/sonic-frr/patch/0056-zebra-do-not-send-local-routes-to-fpm.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 94d88c9e9155756fce152141e0d0d86e64a6981d Mon Sep 17 00:00:00 2001
-From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
-Date: Mon, 25 Nov 2024 01:32:36 -0800
-Subject: [PATCH]  https://github.com/FRRouting/frr/pull/12600, we are now
- installing a new host  route for every connected route (along with the subnet
- route). However, the  orchagent already installs a host route for a connected
- interface address.  Hence, not sending the connected host route to the FPM.
-
----
- zebra/connected.c |  4 ++--
- zebra/zebra_rib.c | 16 ++++++++++++++--
- 2 files changed, 16 insertions(+), 4 deletions(-)
-
-diff --git a/zebra/connected.c b/zebra/connected.c
-index 404f892f6..2c698bed1 100644
---- a/zebra/connected.c
-+++ b/zebra/connected.c
-@@ -191,7 +191,7 @@ void connected_up(struct interface *ifp, struct connected *ifc)
- 	uint32_t flags = 0;
- 	uint32_t count = 0;
- 	struct connected *c;
--	bool install_local = true;
-+	bool install_local = false;
- 
- 	zvrf = ifp->vrf->info;
- 	if (!zvrf) {
-@@ -394,7 +394,7 @@ void connected_down(struct interface *ifp, struct connected *ifc)
- 	struct zebra_vrf *zvrf;
- 	uint32_t count = 0;
- 	struct connected *c;
--	bool remove_local = true;
-+	bool remove_local = false;
- 
- 	zvrf = ifp->vrf->info;
- 	if (!zvrf) {
-diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
-index 5b95d8668..b0921f657 100644
---- a/zebra/zebra_rib.c
-+++ b/zebra/zebra_rib.c
-@@ -701,6 +701,12 @@ void rib_install_kernel(struct route_node *rn, struct route_entry *re,
- 	/* Update fib selection */
- 	dest->selected_fib = re;
- 
-+	/* Do not install local routes to FIB */
-+	if (re->type == ZEBRA_ROUTE_LOCAL) {
-+		zlog_debug("Not installing local route re %p (%s)",
-+		 re, zebra_route_string(re->type));
-+		return;
-+	}
- 	/*
- 	 * Make sure we update the FPM any time we send new information to
- 	 * the kernel.
-@@ -762,6 +768,12 @@ void rib_uninstall_kernel(struct route_node *rn, struct route_entry *re)
- 		return;
- 	}
- 
-+	/* Do not uninstall local routes to FIB */
-+	if (re->type == ZEBRA_ROUTE_LOCAL) {
-+		zlog_debug("Not uninstalling local route re %p (%s)",
-+		 re, zebra_route_string(re->type));
-+		return;
-+	}
- 	/*
- 	 * Make sure we update the FPM any time we send new information to
- 	 * the dataplane.
-@@ -1196,9 +1208,9 @@ static struct route_entry *rib_choose_best(struct route_entry *current,
- 	 * or loopback interface.  If not, pick the last connected
- 	 * route of the set of lowest metric connected routes.
- 	 */
--	possible = rib_choose_best_type(ZEBRA_ROUTE_LOCAL, current, alternate);
-+	/*possible = rib_choose_best_type(ZEBRA_ROUTE_LOCAL, current, alternate);
- 	if (possible)
--		return possible;
-+		return possible; */
- 
- 	possible = rib_choose_best_type(ZEBRA_ROUTE_CONNECT, current, alternate);
- 	if (possible)
--- 
-2.39.4
-
diff --git a/src/sonic-frr/patch/0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch b/src/sonic-frr/patch/0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch
deleted file mode 100644
index 1e832b803e7..00000000000
--- a/src/sonic-frr/patch/0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 274386fbefc83dc4f2f3184637db3c973f8200b6 Mon Sep 17 00:00:00 2001
-From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
-Date: Wed, 13 Nov 2024 23:12:22 -0800
-Subject: [PATCH] Adding changes to write ip nht resolve-via-default
- configuration for VRF in zebra
-
----
- zebra/zebra_vrf.c | 34 +++++++++++++++++++++++++++++++++++
- zebra/zebra_vrf.h |  1 +
- zebra/zebra_vty.c |  2 ++
- 3 files changed, 37 insertions(+)
-
-diff --git a/zebra/zebra_vrf.c b/zebra/zebra_vrf.c
-index e464e47b1..ae8624a5e 100644
---- a/zebra/zebra_vrf.c
-+++ b/zebra/zebra_vrf.c
-@@ -541,6 +541,40 @@ int zebra_vrf_netns_handler_create(struct vty *vty, struct vrf *vrf,
- 	return CMD_SUCCESS;
- }
- 
-+void zebra_vrf_config_write(struct vty *vty)
-+{
-+	struct vrf *vrf;
-+	struct zebra_vrf *zvrf;
-+
-+	RB_FOREACH (vrf, vrf_name_head, &vrfs_by_name) {
-+		zvrf = vrf->info;
-+
-+		if (!zvrf)
-+			continue;
-+
-+		if (zvrf_id(zvrf) == VRF_DEFAULT) {
-+			if (zvrf->zebra_rnh_ip_default_route)
-+				vty_out(vty, "ip nht resolve-via-default\n");
-+
-+			if (zvrf->zebra_rnh_ipv6_default_route)
-+				vty_out(vty, "ipv6 nht resolve-via-default\n");
-+		} else {
-+			vty_frame(vty, "vrf %s\n", zvrf_name(zvrf));
-+			if (zvrf->zebra_rnh_ip_default_route)
-+				vty_out(vty, " ip nht resolve-via-default\n");
-+
-+			if (zvrf->zebra_rnh_ipv6_default_route)
-+				vty_out(vty, " ipv6 nht resolve-via-default\n");
-+		}
-+		if (zvrf_id(zvrf) != VRF_DEFAULT)
-+			vty_endframe(vty, "exit-vrf\n!\n");
-+		else
-+			vty_out(vty, "!\n");
-+	}
-+	return 0;
-+
-+}
-+
- /* Zebra VRF initialization. */
- void zebra_vrf_init(void)
- {
-diff --git a/zebra/zebra_vrf.h b/zebra/zebra_vrf.h
-index 5cbfab1dd..36f42a3db 100644
---- a/zebra/zebra_vrf.h
-+++ b/zebra/zebra_vrf.h
-@@ -246,6 +246,7 @@ extern struct zebra_vrf *zebra_vrf_lookup_by_name(const char *);
- extern vrf_id_t zebra_vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id);
- extern struct zebra_vrf *zebra_vrf_alloc(struct vrf *vrf);
- extern struct route_table *zebra_vrf_table(afi_t, safi_t, vrf_id_t);
-+extern void zebra_vrf_config_write(struct vty *vty);
- 
- /*
-  * API to associate a VRF with a NETNS.
-diff --git a/zebra/zebra_vty.c b/zebra/zebra_vty.c
-index 9a68d5ae9..ce772b818 100644
---- a/zebra/zebra_vty.c
-+++ b/zebra/zebra_vty.c
-@@ -3809,6 +3809,8 @@ static int config_write_protocol(struct vty *vty)
- 
- 	zebra_pbr_config_write(vty);
- 
-+	zebra_vrf_config_write(vty);
-+
- 	if (!zebra_vxlan_get_accept_bgp_seq())
- 		vty_out(vty, "no evpn accept-bgp-seq\n");
- 
--- 
-2.39.4
-
diff --git a/src/sonic-frr/patch/0057-mgmtd-remove-bogus-hedge-code-which-corrupted-active.patch b/src/sonic-frr/patch/0057-mgmtd-remove-bogus-hedge-code-which-corrupted-active.patch
new file mode 100644
index 00000000000..7eddaf20591
--- /dev/null
+++ b/src/sonic-frr/patch/0057-mgmtd-remove-bogus-hedge-code-which-corrupted-active.patch
@@ -0,0 +1,56 @@
+From b12b4c28b4c4a76cbc906b703ee5a694a082ab74 Mon Sep 17 00:00:00 2001
+From: Christian Hopps <chopps@labn.net>
+Date: Tue, 8 Apr 2025 05:15:53 +0000
+Subject: [PATCH] mgmtd: remove bogus "hedge" code which corrupted active
+ candidate DS
+
+Say you have 2 mgmtd frontend sessions (2 vtysh's) the first one is long
+running and is actively changing the global candidate datastore (DS),
+the second one starts and exits, this code would then copy running
+back over the candidate, blowing away any changes made by the first
+session.
+
+(the long running session could technically be any user)
+
+Instead we need to trust the various cleanup code that already exits.
+For example in the commit_cfg_reply on success candidate is copied to
+running, and on failure *for implicit commit* running is copied back to
+candidate clearing the change. This leaves the non-implicit
+configuration changes in this case we actually want candidate to keep
+it's changes in transactional cases, in the other case of pending commit
+during a file read the code restores candidate (if needed) on exit from
+"config terminal", with this call stack:
+
+ vty_config_node_exit()
+   nb_cli_pending_commit_check()
+     nb_cli_classic_commit()
+       nb_candidate_commit_prepare() [fail] -> copy running -> candidate
+       nb_candidate_commit_apply() -> copy candidate -> running
+
+fixes #18541
+
+Signed-off-by: Christian Hopps <chopps@labn.net>
+---
+ mgmtd/mgmt_fe_adapter.c | 6 ------
+ 1 file changed, 6 deletions(-)
+
+diff --git a/mgmtd/mgmt_fe_adapter.c b/mgmtd/mgmt_fe_adapter.c
+index 8d59198803..d077e08679 100644
+--- a/mgmtd/mgmt_fe_adapter.c
++++ b/mgmtd/mgmt_fe_adapter.c
+@@ -216,12 +216,6 @@ static void mgmt_fe_session_unlock_ds(Mgmtd__DatastoreId ds_id,
+ static void
+ mgmt_fe_session_cfg_txn_cleanup(struct mgmt_fe_session_ctx *session)
+ {
+-	/*
+-	 * Ensure any uncommitted changes in Candidate DS
+-	 * is discarded.
+-	 */
+-	mgmt_ds_copy_dss(mm->running_ds, mm->candidate_ds, false);
+-
+ 	/*
+ 	 * Destroy the actual transaction created earlier.
+ 	 */
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch b/src/sonic-frr/patch/0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch
deleted file mode 100644
index a952c0a609b..00000000000
--- a/src/sonic-frr/patch/0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 83714071c68c588c66972fc0fe0f5f2a57a7dd55 Mon Sep 17 00:00:00 2001
-From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
-Date: Thu, 21 Nov 2024 20:57:11 -0800
-Subject: [PATCH] When the file is config replayed, we cannot handle the errors
-  in command execution. We would let all commands in the file to complete, 
- irrespective of some of them failing. Also, certain protocols like RIP, RIPng
- are not supported in SONIC. So, it is expected that their configuration files
- will not be present.
-
----
- lib/vty.c               | 16 +++++++++++++---
- mgmtd/mgmt_be_adapter.c |  2 +-
- 2 files changed, 14 insertions(+), 4 deletions(-)
-
-diff --git a/lib/vty.c b/lib/vty.c
-index 1c9cff478..017e0c7c4 100644
---- a/lib/vty.c
-+++ b/lib/vty.c
-@@ -2654,7 +2654,9 @@ void vty_read_file_finish(struct vty *vty, struct nb_config *config)
- 		nl = strchr(ve->error_buf, '\n');
- 		if (nl)
- 			*nl = '\0';
--		flog_err(EC_LIB_VTY, "%s on config line %u: %s", message,
-+		/* When the file is config replayed, we cannot handle the errors in command execution.
-+			We would let all commands in the file to complete, irrespective of some of them failing. */
-+		flog_warn(EC_LIB_VTY, "%s on config line %u: %s", message,
- 			 ve->line_num, ve->error_buf);
- 	}
- 
-@@ -2773,7 +2775,11 @@ FILE *vty_open_config(const char *config_file, char *config_default_dir)
- 				flog_warn(EC_LIB_BACKUP_CONFIG,
- 					  "using backup configuration file!");
- 			else {
--				flog_err(
-+				/* There are few protocols e.g. RIP, RIPng, which are ununsed in SONIC.
-+				   So, there will not be any config file for them.
-+				   Flagging error, will be considered a breakage by loganalyzer, whereas
-+				   it is valid for these protocol config file to be not present. */
-+				flog_warn(
- 					EC_LIB_VTY,
- 					"%s: can't open configuration file [%s]",
- 					__func__, config_file);
-@@ -2822,7 +2828,11 @@ FILE *vty_open_config(const char *config_file, char *config_default_dir)
- 					  "using backup configuration file!");
- 				fullpath = config_default_dir;
- 			} else {
--				flog_err(EC_LIB_VTY,
-+				/* There are few protocols e.g. RIP, RIPng, which are ununsed in SONIC.
-+				   So, there will not be any config file for them.
-+				   Flagging error, will be considered a breakage by loganalyzer, whereas
-+				   it is valid for these protocol config file to be not present. */
-+				flog_warn(EC_LIB_VTY,
- 					 "can't open configuration file [%s]",
- 					 config_default_dir);
- 				goto tmp_free_and_out;
-diff --git a/mgmtd/mgmt_be_adapter.c b/mgmtd/mgmt_be_adapter.c
-index b311bf469..58f866115 100644
---- a/mgmtd/mgmt_be_adapter.c
-+++ b/mgmtd/mgmt_be_adapter.c
-@@ -732,7 +732,7 @@ static void mgmt_be_adapter_conn_init(struct event *thread)
- 	 * transaction in progress.
- 	 */
- 	if (mgmt_txn_notify_be_adapter_conn(adapter, true) != 0) {
--		zlog_err("XXX txn in progress, retry init");
-+		zlog_warn("XXX txn in progress, retry init");
- 		mgmt_be_adapter_sched_init_event(adapter);
- 		return;
- 	}
--- 
-2.39.4
-
diff --git a/src/sonic-frr/patch/0058-mgmtd-normalize-argument-order-to-copy-dst-src.patch b/src/sonic-frr/patch/0058-mgmtd-normalize-argument-order-to-copy-dst-src.patch
new file mode 100644
index 00000000000..b39480bccee
--- /dev/null
+++ b/src/sonic-frr/patch/0058-mgmtd-normalize-argument-order-to-copy-dst-src.patch
@@ -0,0 +1,164 @@
+From 59d2368b0f055f28aeda8f6080d686acfa35c20b Mon Sep 17 00:00:00 2001
+From: Christian Hopps <chopps@labn.net>
+Date: Tue, 8 Apr 2025 05:55:03 +0000
+Subject: [PATCH] mgmtd: normalize argument order to copy(dst, src)
+
+Having just completed a code audit during RCA, the fact that we have 2
+different argument orders for the related datastore copying functions
+was unnecessary and super confusing.
+
+Fix this code-maintenance/comprehension mistake and move the newer mgmtd
+copy routines to use the same arg order as the pre-existing underlying
+northbound copy functions (i.e., use `copy(dst, src)`)
+
+Signed-off-by: Christian Hopps <chopps@labn.net>
+---
+ mgmtd/mgmt_ds.c  | 19 ++++++++-----------
+ mgmtd/mgmt_ds.h  | 12 +++++-------
+ mgmtd/mgmt_txn.c | 26 ++++++++++----------------
+ 3 files changed, 23 insertions(+), 34 deletions(-)
+
+diff --git a/mgmtd/mgmt_ds.c b/mgmtd/mgmt_ds.c
+index dabae4afd1..e83980f97b 100644
+--- a/mgmtd/mgmt_ds.c
++++ b/mgmtd/mgmt_ds.c
+@@ -74,8 +74,7 @@ static int mgmt_ds_dump_in_memory(struct mgmt_ds_ctx *ds_ctx,
+ 	return 0;
+ }
+ 
+-static int mgmt_ds_replace_dst_with_src_ds(struct mgmt_ds_ctx *src,
+-					   struct mgmt_ds_ctx *dst)
++static int ds_copy(struct mgmt_ds_ctx *dst, struct mgmt_ds_ctx *src)
+ {
+ 	if (!src || !dst)
+ 		return -1;
+@@ -95,8 +94,7 @@ static int mgmt_ds_replace_dst_with_src_ds(struct mgmt_ds_ctx *src,
+ 	return 0;
+ }
+ 
+-static int mgmt_ds_merge_src_with_dst_ds(struct mgmt_ds_ctx *src,
+-					 struct mgmt_ds_ctx *dst)
++static int ds_merge(struct mgmt_ds_ctx *dst, struct mgmt_ds_ctx *src)
+ {
+ 	int ret;
+ 
+@@ -251,14 +249,13 @@ void mgmt_ds_unlock(struct mgmt_ds_ctx *ds_ctx)
+ 	ds_ctx->locked = 0;
+ }
+ 
+-int mgmt_ds_copy_dss(struct mgmt_ds_ctx *src_ds_ctx,
+-		     struct mgmt_ds_ctx *dst_ds_ctx, bool updt_cmt_rec)
++int mgmt_ds_copy_dss(struct mgmt_ds_ctx *dst, struct mgmt_ds_ctx *src, bool updt_cmt_rec)
+ {
+-	if (mgmt_ds_replace_dst_with_src_ds(src_ds_ctx, dst_ds_ctx) != 0)
++	if (ds_copy(dst, src) != 0)
+ 		return -1;
+ 
+-	if (updt_cmt_rec && dst_ds_ctx->ds_id == MGMTD_DS_RUNNING)
+-		mgmt_history_new_record(dst_ds_ctx);
++	if (updt_cmt_rec && dst->ds_id == MGMTD_DS_RUNNING)
++		mgmt_history_new_record(dst);
+ 
+ 	return 0;
+ }
+@@ -416,9 +413,9 @@ int mgmt_ds_load_config_from_file(struct mgmt_ds_ctx *dst,
+ 	parsed.ds_id = dst->ds_id;
+ 
+ 	if (merge)
+-		mgmt_ds_merge_src_with_dst_ds(&parsed, dst);
++		ds_merge(dst, &parsed);
+ 	else
+-		mgmt_ds_replace_dst_with_src_ds(&parsed, dst);
++		ds_copy(dst, &parsed);
+ 
+ 	nb_config_free(parsed.root.cfg_root);
+ 
+diff --git a/mgmtd/mgmt_ds.h b/mgmtd/mgmt_ds.h
+index b8e77e330a..f7e1d7c5ee 100644
+--- a/mgmtd/mgmt_ds.h
++++ b/mgmtd/mgmt_ds.h
+@@ -196,21 +196,19 @@ extern void mgmt_ds_unlock(struct mgmt_ds_ctx *ds_ctx);
+ /*
+  * Copy from source to destination datastore.
+  *
+- * src_ds
+- *    Source datastore handle (ds to be copied from).
+- *
+- * dst_ds
++ * dst
+  *    Destination datastore handle (ds to be copied to).
+  *
++ * src
++ *    Source datastore handle (ds to be copied from).
++ *
+  * update_cmd_rec
+  *    TRUE if need to update commit record, FALSE otherwise.
+  *
+  * Returns:
+  *    0 on success, -1 on failure.
+  */
+-extern int mgmt_ds_copy_dss(struct mgmt_ds_ctx *src_ds_ctx,
+-			    struct mgmt_ds_ctx *dst_ds_ctx,
+-			    bool update_cmt_rec);
++extern int mgmt_ds_copy_dss(struct mgmt_ds_ctx *dst, struct mgmt_ds_ctx *src, bool update_cmt_rec);
+ 
+ /*
+  * Fetch northbound configuration for a given datastore context.
+diff --git a/mgmtd/mgmt_txn.c b/mgmtd/mgmt_txn.c
+index 483dfab8e8..2b4734e971 100644
+--- a/mgmtd/mgmt_txn.c
++++ b/mgmtd/mgmt_txn.c
+@@ -764,17 +764,15 @@ static int mgmt_txn_send_commit_cfg_reply(struct mgmt_txn_ctx *txn,
+ 			 !txn->commit_cfg_req->req.commit_cfg.rollback);
+ 
+ 		/*
+-		 * Successful commit: Merge Src DS into Dst DS if and only if
++		 * Successful commit: Copy Src DS to Dst DS if and only if
+ 		 * this was not a validate-only or abort request.
+ 		 */
+ 		if ((txn->session_id &&
+ 		     !txn->commit_cfg_req->req.commit_cfg.validate_only &&
+ 		     !txn->commit_cfg_req->req.commit_cfg.abort) ||
+ 		    txn->commit_cfg_req->req.commit_cfg.rollback) {
+-			mgmt_ds_copy_dss(txn->commit_cfg_req->req.commit_cfg
+-						 .src_ds_ctx,
+-					 txn->commit_cfg_req->req.commit_cfg
+-						 .dst_ds_ctx,
++			mgmt_ds_copy_dss(txn->commit_cfg_req->req.commit_cfg.dst_ds_ctx,
++					 txn->commit_cfg_req->req.commit_cfg.src_ds_ctx,
+ 					 create_cmt_info_rec);
+ 		}
+ 
+@@ -783,22 +781,18 @@ static int mgmt_txn_send_commit_cfg_reply(struct mgmt_txn_ctx *txn,
+ 		 * request.
+ 		 */
+ 		if (txn->session_id && txn->commit_cfg_req->req.commit_cfg.abort)
+-			mgmt_ds_copy_dss(txn->commit_cfg_req->req.commit_cfg
+-						 .dst_ds_ctx,
+-					 txn->commit_cfg_req->req.commit_cfg
+-						 .src_ds_ctx,
+-					 false);
++			mgmt_ds_copy_dss(txn->commit_cfg_req->req.commit_cfg.src_ds_ctx,
++					 txn->commit_cfg_req->req.commit_cfg.dst_ds_ctx, false);
+ 	} else {
+ 		/*
+ 		 * The commit has failied. For implicit commit requests restore
+-		 * back the contents of the candidate DS.
++		 * back the contents of the candidate DS. For non-implicit
++		 * commit we want to allow the user to re-commit on the changes
++		 * (whether further modified or not).
+ 		 */
+ 		if (txn->commit_cfg_req->req.commit_cfg.implicit)
+-			mgmt_ds_copy_dss(txn->commit_cfg_req->req.commit_cfg
+-						 .dst_ds_ctx,
+-					 txn->commit_cfg_req->req.commit_cfg
+-						 .src_ds_ctx,
+-					 false);
++			mgmt_ds_copy_dss(txn->commit_cfg_req->req.commit_cfg.src_ds_ctx,
++					 txn->commit_cfg_req->req.commit_cfg.dst_ds_ctx, false);
+ 	}
+ 
+ 	if (txn->commit_cfg_req->req.commit_cfg.rollback) {
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch b/src/sonic-frr/patch/0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch
deleted file mode 100644
index 9d3962f5518..00000000000
--- a/src/sonic-frr/patch/0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 8f6adef67c93d04a9eefa1404db0c8de9877fb38 Mon Sep 17 00:00:00 2001
-From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
-Date: Tue, 26 Nov 2024 00:40:46 -0800
-Subject: [PATCH] Pull request: https://github.com/FRRouting/frr/pull/17487
- bgpd: Do not reset peers on suppress-fib toggling If the desired state is the
- same - do nothing instead of resetting once again.
-
-Fixes: bdb5ae8 (bgpd: Make suppress-fib-pending clear peering)
-
-Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
----
- bgpd/bgpd.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index d6d874be2..0b2bf821e 100644
---- a/bgpd/bgpd.c
-+++ b/bgpd/bgpd.c
-@@ -461,6 +461,10 @@ void bgp_suppress_fib_pending_set(struct bgp *bgp, bool set)
- 	if (bgp->inst_type == BGP_INSTANCE_TYPE_VIEW)
- 		return;
- 
-+	/* Do nothing if already in a desired state */
-+	if (set == !!CHECK_FLAG(bgp->flags, BGP_FLAG_SUPPRESS_FIB_PENDING))
-+		return;
-+
- 	if (set) {
- 		SET_FLAG(bgp->flags, BGP_FLAG_SUPPRESS_FIB_PENDING);
- 		/* Send msg to zebra for the first instance of bgp enabled
--- 
-2.39.4
-
diff --git a/src/sonic-frr/patch/0059-zebra-Ensure-that-the-dplane-can-send-the-full-packe.patch b/src/sonic-frr/patch/0059-zebra-Ensure-that-the-dplane-can-send-the-full-packe.patch
new file mode 100644
index 00000000000..92c838dfd98
--- /dev/null
+++ b/src/sonic-frr/patch/0059-zebra-Ensure-that-the-dplane-can-send-the-full-packe.patch
@@ -0,0 +1,57 @@
+From 7adb2b37705ecfeefaa31c5d72b4ae89a38eda2d Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Fri, 30 May 2025 18:51:09 -0400
+Subject: [PATCH 1/3] zebra: Ensure that the dplane can send the full packet
+
+Currently the buffer size used for encoding of routes is
+8192 bytes.  This is not a great choice for when you are using
+512 way ECMP with v6 nexthops.  You quickly run out of space.
+Let's just make the size big enough to just work for the forseeable
+future.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+
+diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
+index 96cfaab839..e164001bb6 100644
+--- a/zebra/dplane_fpm_nl.c
++++ b/zebra/dplane_fpm_nl.c
+@@ -924,6 +924,7 @@ static void fpm_connect(struct event *t)
+ 				&fnc->t_lspreset);
+ }
+ 
++#define DPLANE_FPM_NL_BUF_SIZE 65536
+ /**
+  * Encode data plane operation context into netlink and enqueue it in the FPM
+  * output buffer.
+@@ -934,7 +935,7 @@ static void fpm_connect(struct event *t)
+  */
+ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
+ {
+-	uint8_t nl_buf[NL_PKT_BUF_SIZE];
++	uint8_t nl_buf[DPLANE_FPM_NL_BUF_SIZE];
+ 	size_t nl_buf_len;
+ 	ssize_t rv;
+ 	uint64_t obytes, obytes_peak;
+@@ -1523,7 +1524,7 @@ static void fpm_process_queue(struct event *t)
+ 		}
+ 
+ 		/* No space available yet. */
+-		if (writeable_amount < NL_PKT_BUF_SIZE) {
++		if (writeable_amount < DPLANE_FPM_NL_BUF_SIZE) {
+ 			no_bufs = true;
+ 			break;
+ 		}
+@@ -1650,8 +1651,8 @@ static int fpm_nl_start(struct zebra_dplane_provider *prov)
+ 	fnc = dplane_provider_get_data(prov);
+ 	fnc->fthread = frr_pthread_new(NULL, prov_name, prov_name);
+ 	assert(frr_pthread_run(fnc->fthread, NULL) == 0);
+-	fnc->ibuf = stream_new(NL_PKT_BUF_SIZE);
+-	fnc->obuf = stream_new(NL_PKT_BUF_SIZE * 128);
++	fnc->ibuf = stream_new(DPLANE_FPM_NL_BUF_SIZE);
++	fnc->obuf = stream_new(DPLANE_FPM_NL_BUF_SIZE * 128);
+ 	pthread_mutex_init(&fnc->obuf_mutex, NULL);
+ 	fnc->socket = -1;
+ 	fnc->disabled = true;
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch b/src/sonic-frr/patch/0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch
deleted file mode 100644
index c1088df457b..00000000000
--- a/src/sonic-frr/patch/0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 4e3f27fec6a3b4c0b853ad30f73bf0d34003e23f Mon Sep 17 00:00:00 2001
-From: sk408845 <sk408845@contoso.com>
-Date: Tue, 26 Nov 2024 07:33:58 +0000
-Subject: [PATCH] Port https://github.com/FRRouting/frr/pull/17435/ bgpd:
- Validate both nexthop information (NEXTHOP and NLRI) If we receive an IPv6
- prefix e.g.: 2001:db8:100::/64 with nextop: 0.0.0.0, and mp_nexthop: fc00::2,
- we should not treat this with an invalid nexthop because of 0.0.0.0. We MUST
- check for MP_REACH attribute also and decide later if we have at least one a
- valid nexthop.
-
-Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
----
- bgpd/bgp_route.c | 50 ++++++++++++++++++++++--------------------------
- 1 file changed, 23 insertions(+), 27 deletions(-)
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index 26089e326..e05507c52 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -4032,7 +4032,7 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi,
- 				uint8_t type, uint8_t stype, struct attr *attr,
- 				struct bgp_dest *dest)
- {
--	bool ret = false;
-+	bool nh_invalid = false;
- 	bool is_bgp_static_route =
- 		(type == ZEBRA_ROUTE_BGP && stype == BGP_ROUTE_STATIC) ? true
- 								       : false;
-@@ -4054,12 +4054,16 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi,
- 	    (safi != SAFI_UNICAST && safi != SAFI_MULTICAST && safi != SAFI_EVPN))
- 		return false;
- 
--	/* If NEXT_HOP is present, validate it. */
--	if (attr->flag & ATTR_FLAG_BIT(BGP_ATTR_NEXT_HOP)) {
--		if (!ipv4_unicast_valid(&attr->nexthop) ||
--		    bgp_nexthop_self(bgp, afi, type, stype, attr, dest))
--			return true;
--	}
-+	/* If NEXT_HOP is present, validate it:
-+	 * The route can have both nexthop + mp_nexthop encoded as multiple NLRIs,
-+	 * and we MUST check if at least one of them is valid.
-+	 * E.g.: IPv6 prefix can be with nexthop: 0.0.0.0, and mp_nexthop: fc00::1.
-+	 */
-+	if (CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_NEXT_HOP)))
-+		nh_invalid = (attr->nexthop.s_addr == INADDR_ANY ||
-+			      !ipv4_unicast_valid(&attr->nexthop) ||
-+			      bgp_nexthop_self(bgp, afi, type, stype, attr, dest));
-+
- 
- 	/* If MP_NEXTHOP is present, validate it. */
- 	/* Note: For IPv6 nexthops, we only validate the global (1st) nexthop;
-@@ -4074,39 +4078,31 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi,
- 		switch (attr->mp_nexthop_len) {
- 		case BGP_ATTR_NHLEN_IPV4:
- 		case BGP_ATTR_NHLEN_VPNV4:
--			ret = (attr->mp_nexthop_global_in.s_addr ==
--				       INADDR_ANY ||
--			       !ipv4_unicast_valid(
--				       &attr->mp_nexthop_global_in) ||
--			       bgp_nexthop_self(bgp, afi, type, stype, attr,
--						dest));
-+			nh_invalid = (attr->mp_nexthop_global_in.s_addr == INADDR_ANY ||
-+				      !ipv4_unicast_valid(&attr->mp_nexthop_global_in) ||
-+				      bgp_nexthop_self(bgp, afi, type, stype, attr, dest));
- 			break;
- 
- 		case BGP_ATTR_NHLEN_IPV6_GLOBAL:
- 		case BGP_ATTR_NHLEN_VPNV6_GLOBAL:
--			ret = (IN6_IS_ADDR_UNSPECIFIED(
--					&attr->mp_nexthop_global)
--			       || IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global)
--			       || IN6_IS_ADDR_MULTICAST(
--				       &attr->mp_nexthop_global)
--			       || bgp_nexthop_self(bgp, afi, type, stype, attr,
--						   dest));
-+			nh_invalid = (IN6_IS_ADDR_UNSPECIFIED(&attr->mp_nexthop_global) ||
-+				      IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global) ||
-+				      IN6_IS_ADDR_MULTICAST(&attr->mp_nexthop_global) ||
-+				      bgp_nexthop_self(bgp, afi, type, stype, attr, dest));
- 			break;
- 		case BGP_ATTR_NHLEN_IPV6_GLOBAL_AND_LL:
--			ret = (IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global)
--			       || IN6_IS_ADDR_MULTICAST(
--				       &attr->mp_nexthop_global)
--			       || bgp_nexthop_self(bgp, afi, type, stype, attr,
--						   dest));
-+			nh_invalid = (IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global) ||
-+				      IN6_IS_ADDR_MULTICAST(&attr->mp_nexthop_global) ||
-+				      bgp_nexthop_self(bgp, afi, type, stype, attr, dest));
- 			break;
- 
- 		default:
--			ret = true;
-+			nh_invalid = true;
- 			break;
- 		}
- 	}
- 
--	return ret;
-+	return nh_invalid;
- }
- 
- static void bgp_attr_add_no_export_community(struct attr *attr)
--- 
-2.20.1
-
diff --git a/src/sonic-frr/patch/0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch b/src/sonic-frr/patch/0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch
deleted file mode 100644
index 63bbf717025..00000000000
--- a/src/sonic-frr/patch/0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 501f267ec4c7359fc518ba31c5d63045c935045c Mon Sep 17 00:00:00 2001
-From: dgsudharsan <sudharsand@nvidia.com>
-Date: Wed, 4 Dec 2024 20:39:46 +0000
-Subject: [PATCH] Set multipath to 514 and disable bgp-vnc for optimization
-
-
-diff --git a/debian/rules b/debian/rules
-index 5a8199afb7..3d762e6df1 100755
---- a/debian/rules
-+++ b/debian/rules
-@@ -66,8 +66,7 @@ override_dh_auto_configure:
- 		--disable-protobuf \
- 		--disable-zeromq \
- 		--enable-ospfapi \
--		--enable-bgp-vnc \
--		--enable-multipath=256 \
-+		--enable-multipath=514 \
- 		\
- 		--enable-user=frr \
- 		--enable-group=frr \
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0061-dont-print-warning-if-not-a-daemon.patch b/src/sonic-frr/patch/0061-dont-print-warning-if-not-a-daemon.patch
deleted file mode 100644
index a14127f1ea1..00000000000
--- a/src/sonic-frr/patch/0061-dont-print-warning-if-not-a-daemon.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 1514c6a935e370d0ff4d05e23881398ad7ed1aab Mon Sep 17 00:00:00 2001
-commit cecf5716d5c8e74aa5afaeec836db624d6f68879 
-Author: Donald Sharp <sharpd@nvidia.com> 
-Date:   Thu Aug 8 14:58:04 2024 -0400
-
-commit cecf5716d5c8e74aa5afaeec836db624d6f68879
-Author: Donald Sharp <sharpd@nvidia.com>
-Date:   Thu Aug 8 14:58:04 2024 -0400
-
-    lib: Don't print warning if not a daemon
-
-    vtysh will print out the  upon
-    every run of the program if the ulimit is set stupidly
-    large.  Prevent this from being displayed for vtysh.
-
-    Fixes: #16516
-    Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- lib/event.c  | 5 +++--
- lib/libfrr.c | 8 ++++++++
- lib/libfrr.h | 2 +-
- 3 files changed, 12 insertions(+), 3 deletions(-)
-
-diff --git a/lib/event.c b/lib/event.c
-index fc46a11c0..be2637142 100644
---- a/lib/event.c
-+++ b/lib/event.c
-@@ -571,8 +571,9 @@ struct event_loop *event_master_create(const char *name)
- 	}
- 
- 	if (rv->fd_limit > STUPIDLY_LARGE_FD_SIZE) {
--		zlog_warn("FD Limit set: %u is stupidly large.  Is this what you intended?  Consider using --limit-fds also limiting size to %u",
--			  rv->fd_limit, STUPIDLY_LARGE_FD_SIZE);
-+		if (frr_is_daemon())
-+			zlog_warn("FD Limit set: %u is stupidly large.  Is this what you intended?  Consider using --limit-fds also limiting size to %u",
-+				  rv->fd_limit, STUPIDLY_LARGE_FD_SIZE);
- 
- 		rv->fd_limit = STUPIDLY_LARGE_FD_SIZE;
- 	}
-diff --git a/lib/libfrr.c b/lib/libfrr.c
-index 2861ebe0b..5dd44c05f 100644
---- a/lib/libfrr.c
-+++ b/lib/libfrr.c
-@@ -1445,3 +1445,11 @@ void _libfrr_version(void)
- 	write(1, banner, sizeof(banner) - 1);
- 	_exit(0);
- }
-+
-+bool frr_is_daemon(void)
-+{
-+	if (di)
-+		return true;
-+
-+	return false;
-+}
-\ No newline at end of file
-diff --git a/lib/libfrr.h b/lib/libfrr.h
-index ee436d9f8..d9025fe7e 100644
---- a/lib/libfrr.h
-+++ b/lib/libfrr.h
-@@ -188,7 +188,7 @@ extern const char *frr_get_progname(void);
- extern enum frr_cli_mode frr_get_cli_mode(void);
- extern uint32_t frr_get_fd_limit(void);
- extern bool frr_is_startup_fd(int fd);
--
-+extern bool frr_is_daemon(void);
- /* call order of these hooks is as ordered here */
- DECLARE_HOOK(frr_early_init, (struct event_loop * tm), (tm));
- DECLARE_HOOK(frr_late_init, (struct event_loop * tm), (tm));
--- 
-2.20.1
-
diff --git a/src/sonic-frr/patch/0062-zebra-lib-use-internal-rbtree-per-ns.patch b/src/sonic-frr/patch/0062-zebra-lib-use-internal-rbtree-per-ns.patch
deleted file mode 100644
index 4fb56f6094f..00000000000
--- a/src/sonic-frr/patch/0062-zebra-lib-use-internal-rbtree-per-ns.patch
+++ /dev/null
@@ -1,1826 +0,0 @@
-From a4eb079b5d87dbc6720ac9788ad3bec5a25aa519 Mon Sep 17 00:00:00 2001
-From: Mark Stapp <mjs@cisco.com>
-Date: Tue, 15 Oct 2024 11:31:22 -0400
-Subject: [PATCH 1/9] zebra: make a zif MTYPE internal/static
-
-Make an MTYPE used in zifs internal/static
-
-Signed-off-by: Mark Stapp <mjs@cisco.com>
----
- zebra/interface.c | 2 +-
- zebra/interface.h | 3 ---
- 2 files changed, 1 insertion(+), 4 deletions(-)
-
-diff --git a/zebra/interface.c b/zebra/interface.c
-index 5ce222cc04..bbdc62c1c2 100644
---- a/zebra/interface.c
-+++ b/zebra/interface.c
-@@ -44,7 +44,7 @@ DEFINE_MTYPE_STATIC(ZEBRA, ZINFO, "Zebra Interface Information");
- DEFINE_HOOK(zebra_if_extra_info, (struct vty * vty, struct interface *ifp),
- 	    (vty, ifp));
- 
--DEFINE_MTYPE(ZEBRA, ZIF_DESC, "Intf desc");
-+DEFINE_MTYPE_STATIC(ZEBRA, ZIF_DESC, "Intf desc");
- 
- static void if_down_del_nbr_connected(struct interface *ifp);
- 
-diff --git a/zebra/interface.h b/zebra/interface.h
-index 7d633f32d2..4cbec83cce 100644
---- a/zebra/interface.h
-+++ b/zebra/interface.h
-@@ -94,9 +94,6 @@ enum zebra_if_flags {
- #define ZEBRA_IF_IS_PROTODOWN_ONLY_EXTERNAL(zif)                               \
- 	((zif)->protodown_rc == ZEBRA_PROTODOWN_EXTERNAL)
- 
--/* Mem type for zif desc */
--DECLARE_MTYPE(ZIF_DESC);
--
- /* `zebra' daemon local interface structure. */
- struct zebra_if {
- 	/* back pointer to the interface */
--- 
-2.43.2
-
-
-From ccc18a117a74b3d7caec9db926b0d52e9180ef13 Mon Sep 17 00:00:00 2001
-From: Mark Stapp <mjs@cisco.com>
-Date: Tue, 22 Oct 2024 15:20:54 -0700
-Subject: [PATCH 2/9] zebra: add new per-NS tree of interfaces
-
-Add new per-NS interface typerb tree, using external linkage, to
-replace the use of the if_table table.
-Add apis to iterate the per-NS collection - which is not public.
-
-Signed-off-by: Mark Stapp <mjs@cisco.com>
----
- zebra/zebra_ns.c | 188 +++++++++++++++++++++++++++++++++++++++++++++++
- zebra/zebra_ns.h |  34 +++++++++
- 2 files changed, 222 insertions(+)
-
-diff --git a/zebra/zebra_ns.c b/zebra/zebra_ns.c
-index 803d8f0034..c6b279a9d7 100644
---- a/zebra/zebra_ns.c
-+++ b/zebra/zebra_ns.c
-@@ -28,9 +28,185 @@
- extern struct zebra_privs_t zserv_privs;
- 
- DEFINE_MTYPE_STATIC(ZEBRA, ZEBRA_NS, "Zebra Name Space");
-+DEFINE_MTYPE_STATIC(ZEBRA, ZNS_IFP, "Zebra NS Ifp");
-+
-+static int ifp_tree_cmp(const struct ifp_tree_link *a, const struct ifp_tree_link *b);
-+
-+DECLARE_RBTREE_UNIQ(ifp_tree, struct ifp_tree_link, link, ifp_tree_cmp);
- 
- static struct zebra_ns *dzns;
- 
-+static int ifp_tree_cmp(const struct ifp_tree_link *a, const struct ifp_tree_link *b)
-+{
-+	return (a->ifindex - b->ifindex);
-+}
-+
-+/*
-+ * Link an ifp into its parent NS
-+ */
-+void zebra_ns_link_ifp(struct zebra_ns *zns, struct interface *ifp)
-+{
-+	struct zebra_if *zif;
-+	struct ifp_tree_link *link, tlink = {};
-+
-+	zif = ifp->info;
-+	assert(zif != NULL);
-+
-+	if (zif->ns_tree_link) {
-+		assert(zif->ns_tree_link->zns == zns);
-+		assert(zif->ns_tree_link->ifp == ifp);
-+		return;
-+	}
-+
-+	/* Lookup first - already linked? */
-+	tlink.ifindex = ifp->ifindex;
-+	link = ifp_tree_find(&zns->ifp_tree, &tlink);
-+	if (link) {
-+		assert(link->ifp == ifp);
-+		return;
-+	}
-+
-+	/* Allocate new linkage struct and add */
-+	link = XCALLOC(MTYPE_ZNS_IFP, sizeof(struct ifp_tree_link));
-+	link->ifp = ifp;
-+	link->ifindex = ifp->ifindex;
-+	link->zns = zns;
-+
-+	ifp_tree_add(&zns->ifp_tree, link);
-+
-+	zif->ns_tree_link = link;
-+}
-+
-+/*
-+ * Unlink an ifp from its parent NS (probably because the ifp is being deleted)
-+ */
-+void zebra_ns_unlink_ifp(struct interface *ifp)
-+{
-+	struct zebra_if *zif;
-+	struct ifp_tree_link *link;
-+	struct zebra_ns *zns;
-+
-+	zif = ifp->info;
-+	if (zif && zif->ns_tree_link) {
-+		link = zif->ns_tree_link;
-+		zns = link->zns;
-+
-+		ifp_tree_del(&zns->ifp_tree, link);
-+
-+		zif->ns_tree_link = NULL;
-+
-+		XFREE(MTYPE_ZNS_IFP, link);
-+	}
-+}
-+
-+/*
-+ * ifp lookup apis
-+ */
-+struct interface *zebra_ns_lookup_ifp(struct zebra_ns *zns, uint32_t ifindex)
-+{
-+	struct interface *ifp = NULL;
-+	struct ifp_tree_link *link, tlink = {};
-+
-+	/* Init temp struct for lookup */
-+	tlink.ifindex = ifindex;
-+
-+	link = ifp_tree_find(&zns->ifp_tree, &tlink);
-+	if (link)
-+		ifp = link->ifp;
-+
-+	return ifp;
-+}
-+
-+static int lookup_ifp_name_cb(struct interface *ifp, void *arg);
-+
-+struct ifp_name_ctx {
-+	const char *ifname;
-+	struct interface *ifp;
-+};
-+
-+struct interface *zebra_ns_lookup_ifp_name(struct zebra_ns *zns, const char *ifname)
-+{
-+	struct ifp_name_ctx ctx = {};
-+
-+	/* Hand context struct into walker function for use in its callback */
-+	ctx.ifname = ifname;
-+	zebra_ns_ifp_walk(zns, lookup_ifp_name_cb, &ctx);
-+
-+	return ctx.ifp;
-+}
-+
-+static int lookup_ifp_name_cb(struct interface *ifp, void *arg)
-+{
-+	struct ifp_name_ctx *pctx = arg;
-+
-+	if (strcmp(ifp->name, pctx->ifname) == 0) {
-+		pctx->ifp = ifp;
-+		return NS_WALK_STOP;
-+	}
-+
-+	return NS_WALK_CONTINUE;
-+}
-+
-+/* Iterate collection of ifps, calling application's callback. Callback uses
-+ * return semantics from lib/ns.h: return NS_WALK_STOP to stop the iteration.
-+ * Caller's 'arg' is included in each callback.
-+ */
-+int zebra_ns_ifp_walk(struct zebra_ns *zns,
-+		      int (*func)(struct interface *ifp, void *arg), void *arg)
-+{
-+	struct ifp_tree_link *link;
-+	int ret = NS_WALK_CONTINUE;
-+
-+	frr_each (ifp_tree, &zns->ifp_tree, link) {
-+		ret = (func)(link->ifp, arg);
-+		if (ret == NS_WALK_STOP)
-+			break;
-+	}
-+
-+	if (ret == NS_WALK_STOP)
-+		return NS_WALK_STOP;
-+	else
-+		return NS_WALK_CONTINUE;
-+}
-+
-+/*
-+ * Walk all NSes, and all ifps for each NS.
-+ */
-+struct ns_ifp_walk_ctx {
-+	int (*func)(struct interface *ifp, void *arg);
-+	void *arg;
-+	int ret;
-+};
-+
-+static int ns_ifp_walker(struct ns *ns, void *in_param, void **unused);
-+
-+void zebra_ns_ifp_walk_all(int (*func)(struct interface *ifp, void *arg), void *arg)
-+{
-+	struct ns_ifp_walk_ctx ctx = {};
-+
-+	ctx.func = func;
-+	ctx.arg = arg;
-+
-+	ns_walk_func(ns_ifp_walker, &ctx, NULL);
-+}
-+
-+static int ns_ifp_walker(struct ns *ns, void *in_param, void **unused)
-+{
-+	struct zebra_ns *zns;
-+	struct ns_ifp_walk_ctx *ctx = in_param;
-+	int ret = NS_WALK_CONTINUE;
-+
-+	zns = ns->info;
-+	if (zns == NULL)
-+		goto done;
-+
-+	ret = zebra_ns_ifp_walk(zns, ctx->func, ctx->arg);
-+
-+done:
-+
-+	return ret;
-+}
-+
- static int zebra_ns_disable_internal(struct zebra_ns *zns, bool complete);
- 
- struct zebra_ns *zebra_ns_lookup(ns_id_t ns_id)
-@@ -59,6 +235,7 @@ static int zebra_ns_new(struct ns *ns)
- 
- 	/* Do any needed per-NS data structure allocation. */
- 	zns->if_table = route_table_init();
-+	ifp_tree_init(&zns->ifp_tree);
- 
- 	return 0;
- }
-@@ -66,11 +243,22 @@ static int zebra_ns_new(struct ns *ns)
- static int zebra_ns_delete(struct ns *ns)
- {
- 	struct zebra_ns *zns = (struct zebra_ns *)ns->info;
-+	struct zebra_if *zif;
-+	struct ifp_tree_link *link;
- 
- 	if (IS_ZEBRA_DEBUG_EVENT)
- 		zlog_info("ZNS %s with id %u (deleted)", ns->name, ns->ns_id);
- 	if (!zns)
- 		return 0;
-+
-+	/* Clean up ifp tree */
-+	while ((link = ifp_tree_pop(&zns->ifp_tree)) != NULL) {
-+		zif = link->ifp->info;
-+
-+		zif->ns_tree_link = NULL;
-+		XFREE(MTYPE_ZNS_IFP, link);
-+	}
-+
- 	XFREE(MTYPE_ZEBRA_NS, ns->info);
- 	return 0;
- }
-diff --git a/zebra/zebra_ns.h b/zebra/zebra_ns.h
-index 8d988c3f82..1ddecc8252 100644
---- a/zebra/zebra_ns.h
-+++ b/zebra/zebra_ns.h
-@@ -32,6 +32,20 @@ struct nlsock {
- };
- #endif
- 
-+/* Tree of interfaces: external linkage struct, and rbtree */
-+PREDECL_RBTREE_UNIQ(ifp_tree);
-+
-+struct ifp_tree_link {
-+	struct ifp_tree_item link;
-+
-+	ifindex_t ifindex;
-+
-+	struct interface *ifp;
-+
-+	/* Backpointer */
-+	struct zebra_ns *zns;
-+};
-+
- struct zebra_ns {
- 	/* net-ns name.  */
- 	char name[VRF_NAMSIZ];
-@@ -55,12 +69,32 @@ struct zebra_ns {
- 
- 	struct route_table *if_table;
- 
-+	/* Tree of interfaces in this ns */
-+	struct ifp_tree_head ifp_tree;
-+
- 	/* Back pointer */
- 	struct ns *ns;
- };
- 
- struct zebra_ns *zebra_ns_lookup(ns_id_t ns_id);
- 
-+/* Manage collection of ifps per-NS */
-+void zebra_ns_link_ifp(struct zebra_ns *zns, struct interface *ifp);
-+void zebra_ns_unlink_ifp(struct interface *ifp);
-+struct interface *zebra_ns_lookup_ifp(struct zebra_ns *zns, uint32_t ifindex);
-+struct interface *zebra_ns_lookup_ifp_name(struct zebra_ns *zns, const char *ifname);
-+
-+/* Iterate collection of ifps, calling application's callback. Callback uses
-+ * return semantics from lib/ns.h: return NS_WALK_STOP to stop the iteration.
-+ * Caller's 'arg' is included in each callback.
-+ * The iterator returns STOP or CONTINUE also.
-+ */
-+int zebra_ns_ifp_walk(struct zebra_ns *zns,
-+		      int (*func)(struct interface *ifp, void *arg), void *arg);
-+
-+/* Walk all NSes, and all ifps for each NS. */
-+void zebra_ns_ifp_walk_all(int (*func)(struct interface *ifp, void *arg), void *arg);
-+
- int zebra_ns_init(void);
- int zebra_ns_enable(ns_id_t ns_id, void **info);
- int zebra_ns_disabled(struct ns *ns);
--- 
-2.43.2
-
-
-From 24957f224f8a9918e451d152917feb5cf5ce0d2f Mon Sep 17 00:00:00 2001
-From: Mark Stapp <mjs@cisco.com>
-Date: Tue, 22 Oct 2024 15:23:17 -0700
-Subject: [PATCH 3/9] zebra: use new per-NS interface iteration
-
-Replace use of the old if_table with the new per-NS ifp
-iteration apis.
-
-Signed-off-by: Mark Stapp <mjs@cisco.com>
----
- zebra/if_netlink.c | 61 +++++++++++++++++++++++++++++++---------------
- 1 file changed, 41 insertions(+), 20 deletions(-)
-
-diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c
-index 5f096e3039..f7567f06d0 100644
---- a/zebra/if_netlink.c
-+++ b/zebra/if_netlink.c
-@@ -1775,6 +1775,15 @@ static int netlink_request_tunneldump(struct zebra_ns *zns, int family,
- 	return netlink_request(&zns->netlink_cmd, &req);
- }
- 
-+/* Prototype for tunneldump walker */
-+static int tunneldump_walk_cb(struct interface *ifp, void *arg);
-+
-+struct tunneldump_ctx {
-+	struct zebra_ns *zns;
-+	struct zebra_dplane_info *dp_info;
-+	int ret;
-+};
-+
- /*
-  * Currently we only ask for vxlan l3svd vni information.
-  * In the future this can be expanded.
-@@ -1782,35 +1791,47 @@ static int netlink_request_tunneldump(struct zebra_ns *zns, int family,
- int netlink_tunneldump_read(struct zebra_ns *zns)
- {
- 	int ret = 0;
-+	struct tunneldump_ctx ctx = {};
- 	struct zebra_dplane_info dp_info;
--	struct route_node *rn;
--	struct interface *tmp_if = NULL;
--	struct zebra_if *zif;
--	struct nlsock *netlink_cmd = &zns->netlink_cmd;
- 
- 	zebra_dplane_info_from_zns(&dp_info, zns, true /*is_cmd*/);
- 
--	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
--		tmp_if = (struct interface *)rn->info;
--		if (!tmp_if)
--			continue;
--		zif = tmp_if->info;
--		if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
--			continue;
-+	/* Set up context and call iterator */
-+	ctx.zns = zns;
-+	ctx.dp_info = &dp_info;
- 
--		ret = netlink_request_tunneldump(zns, PF_BRIDGE,
--						 tmp_if->ifindex);
--		if (ret < 0)
--			return ret;
-+	zebra_ns_ifp_walk(zns, tunneldump_walk_cb, &ctx);
-+	ret = ctx.ret;
- 
--		ret = netlink_parse_info(netlink_link_change, netlink_cmd,
--					 &dp_info, 0, true);
-+	return ret;
-+}
- 
--		if (ret < 0)
--			return ret;
-+static int tunneldump_walk_cb(struct interface *ifp, void *arg)
-+{
-+	int ret;
-+	struct tunneldump_ctx *ctx = arg;
-+	struct zebra_if *zif;
-+
-+	zif = ifp->info;
-+	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
-+		goto done;
-+
-+	ret = netlink_request_tunneldump(ctx->zns, PF_BRIDGE, ifp->ifindex);
-+	if (ret < 0) {
-+		ctx->ret = ret;
-+		return NS_WALK_STOP;
- 	}
- 
--	return 0;
-+	ret = netlink_parse_info(netlink_link_change, &(ctx->zns->netlink_cmd),
-+				 ctx->dp_info, 0, true);
-+
-+	if (ret < 0) {
-+		ctx->ret = ret;
-+		return NS_WALK_STOP;
-+	}
-+
-+done:
-+	return NS_WALK_CONTINUE;
- }
- 
- static const char *port_state2str(uint8_t state)
--- 
-2.43.2
-
-
-From 8504e1119d084deef326a72f930873e6f7d921a6 Mon Sep 17 00:00:00 2001
-From: Mark Stapp <mjs@cisco.com>
-Date: Tue, 22 Oct 2024 15:56:11 -0700
-Subject: [PATCH 4/9] isisd: add include file
-
-Add an include to an isis header so it's self-contained.
-
-Signed-off-by: Mark Stapp <mjs@cisco.com>
----
- isisd/isis_route.h | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/isisd/isis_route.h b/isisd/isis_route.h
-index 4d49a5ae9c..d9572336af 100644
---- a/isisd/isis_route.h
-+++ b/isisd/isis_route.h
-@@ -12,6 +12,7 @@
- #ifndef _ZEBRA_ISIS_ROUTE_H
- #define _ZEBRA_ISIS_ROUTE_H
- 
-+#include "lib/table.h"
- #include "lib/nexthop.h"
- 
- struct isis_nexthop {
--- 
-2.43.2
-
-
-From eb75106d9a0e5bc689f914e5ff9ebd3528fd3b7a Mon Sep 17 00:00:00 2001
-From: Mark Stapp <mjs@cisco.com>
-Date: Tue, 22 Oct 2024 15:57:53 -0700
-Subject: [PATCH 5/9] zebra: removing use of per-NS if_table
-
-Remove use of the per-NS if_table from zebra/interface
-module. Use new add, lookup, and iteration apis.
-
-Signed-off-by: Mark Stapp <mjs@cisco.com>
----
- zebra/interface.c | 144 +++++++++++++++-------------------------------
- zebra/interface.h |   5 +-
- 2 files changed, 49 insertions(+), 100 deletions(-)
-
-diff --git a/zebra/interface.c b/zebra/interface.c
-index bbdc62c1c2..7ec80cb259 100644
---- a/zebra/interface.c
-+++ b/zebra/interface.c
-@@ -233,62 +233,14 @@ static int if_zebra_delete_hook(struct interface *ifp)
- 	return 0;
- }
- 
--/* Build the table key */
--static void if_build_key(uint32_t ifindex, struct prefix *p)
--{
--	p->family = AF_INET;
--	p->prefixlen = IPV4_MAX_BITLEN;
--	p->u.prefix4.s_addr = ifindex;
--}
--
--/* Link an interface in a per NS interface tree */
--struct interface *if_link_per_ns(struct zebra_ns *ns, struct interface *ifp)
--{
--	struct prefix p;
--	struct route_node *rn;
--
--	if (ifp->ifindex == IFINDEX_INTERNAL)
--		return NULL;
--
--	if_build_key(ifp->ifindex, &p);
--	rn = route_node_get(ns->if_table, &p);
--	if (rn->info) {
--		ifp = (struct interface *)rn->info;
--		route_unlock_node(rn); /* get */
--		return ifp;
--	}
--
--	rn->info = ifp;
--	ifp->node = rn;
--
--	return ifp;
--}
--
--/* Delete a VRF. This is called in vrf_terminate(). */
--void if_unlink_per_ns(struct interface *ifp)
--{
--	if (!ifp->node)
--		return;
--
--	ifp->node->info = NULL;
--	route_unlock_node(ifp->node);
--	ifp->node = NULL;
--}
--
- /* Look up an interface by identifier within a NS */
- struct interface *if_lookup_by_index_per_ns(struct zebra_ns *ns,
- 					    uint32_t ifindex)
- {
--	struct prefix p;
--	struct route_node *rn;
- 	struct interface *ifp = NULL;
- 
--	if_build_key(ifindex, &p);
--	rn = route_node_lookup(ns->if_table, &p);
--	if (rn) {
--		ifp = (struct interface *)rn->info;
--		route_unlock_node(rn); /* lookup */
--	}
-+	ifp = zebra_ns_lookup_ifp(ns, ifindex);
-+
- 	return ifp;
- }
- 
-@@ -296,18 +248,11 @@ struct interface *if_lookup_by_index_per_ns(struct zebra_ns *ns,
- struct interface *if_lookup_by_name_per_ns(struct zebra_ns *ns,
- 					   const char *ifname)
- {
--	struct route_node *rn;
- 	struct interface *ifp;
- 
--	for (rn = route_top(ns->if_table); rn; rn = route_next(rn)) {
--		ifp = (struct interface *)rn->info;
--		if (ifp && strcmp(ifp->name, ifname) == 0) {
--			route_unlock_node(rn);
--			return (ifp);
--		}
--	}
-+	ifp = zebra_ns_lookup_ifp_name(ns, ifname);
- 
--	return NULL;
-+	return ifp;
- }
- 
- struct interface *if_lookup_by_index_per_nsid(ns_id_t ns_id, uint32_t ifindex)
-@@ -579,7 +524,8 @@ void if_add_update(struct interface *ifp)
- 		zns = zvrf->zns;
- 	else
- 		zns = zebra_ns_lookup(NS_DEFAULT);
--	if_link_per_ns(zns, ifp);
-+
-+	zebra_ns_link_ifp(zns, ifp);
- 	if_data = ifp->info;
- 	assert(if_data);
- 
-@@ -784,7 +730,7 @@ void if_delete_update(struct interface **pifp)
- 	/* Send out notification on interface delete. */
- 	zebra_interface_delete_update(ifp);
- 
--	if_unlink_per_ns(ifp);
-+	zebra_ns_unlink_ifp(ifp);
- 
- 	/* Update ifindex after distributing the delete message.  This is in
- 	   case any client needs to have the old value of ifindex available
-@@ -1121,50 +1067,52 @@ void zebra_if_update_link(struct interface *ifp, ifindex_t link_ifindex,
- }
- 
- /*
-- * during initial link dump kernel does not order lower devices before
-- * upper devices so we need to fixup link dependencies at the end of dump
-+ * Callback for per-ns link fixup iteration
-  */
--void zebra_if_update_all_links(struct zebra_ns *zns)
-+static int zif_link_fixup_cb(struct interface *ifp, void *arg)
- {
--	struct route_node *rn;
--	struct interface *ifp;
- 	struct zebra_if *zif;
- 
--	if (IS_ZEBRA_DEBUG_KERNEL)
--		zlog_info("fixup link dependencies");
-+	zif = ifp->info;
-+	/* update bond-member to bond linkages */
-+	if ((IS_ZEBRA_IF_BOND_SLAVE(ifp)) &&
-+	    (zif->bondslave_info.bond_ifindex != IFINDEX_INTERNAL) &&
-+	    !zif->bondslave_info.bond_if) {
-+		if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL)
-+			zlog_debug("bond mbr %s map to bond %d", zif->ifp->name,
-+				   zif->bondslave_info.bond_ifindex);
-+		zebra_l2_map_slave_to_bond(zif, ifp->vrf->vrf_id);
-+	}
- 
--	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
--		ifp = (struct interface *)rn->info;
--		if (!ifp)
--			continue;
--		zif = ifp->info;
--		/* update bond-member to bond linkages */
--		if ((IS_ZEBRA_IF_BOND_SLAVE(ifp))
--		    && (zif->bondslave_info.bond_ifindex != IFINDEX_INTERNAL)
--		    && !zif->bondslave_info.bond_if) {
--			if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL)
--				zlog_debug("bond mbr %s map to bond %d",
--					   zif->ifp->name,
--					   zif->bondslave_info.bond_ifindex);
--			zebra_l2_map_slave_to_bond(zif, ifp->vrf->vrf_id);
--		}
-+	/* update SVI linkages */
-+	if ((zif->link_ifindex != IFINDEX_INTERNAL) && !zif->link) {
-+		zif->link = if_lookup_by_index_per_nsid(zif->link_nsid,
-+							zif->link_ifindex);
-+		if (IS_ZEBRA_DEBUG_KERNEL)
-+			zlog_debug("interface %s/%d's lower fixup to %s/%d",
-+				   ifp->name, ifp->ifindex,
-+				   zif->link ? zif->link->name : "unk",
-+				   zif->link_ifindex);
-+	}
- 
--		/* update SVI linkages */
--		if ((zif->link_ifindex != IFINDEX_INTERNAL) && !zif->link) {
--			zif->link = if_lookup_by_index_per_nsid(
--				zif->link_nsid, zif->link_ifindex);
--			if (IS_ZEBRA_DEBUG_KERNEL)
--				zlog_debug("interface %s/%d's lower fixup to %s/%d",
--						ifp->name, ifp->ifindex,
--						zif->link?zif->link->name:"unk",
--						zif->link_ifindex);
--		}
-+	/* Update VLAN<=>SVI map */
-+	if (IS_ZEBRA_IF_VLAN(ifp))
-+		zebra_evpn_acc_bd_svi_set(zif, NULL,
-+					  !!if_is_operative(ifp));
- 
--		/* Update VLAN<=>SVI map */
--		if (IS_ZEBRA_IF_VLAN(ifp))
--			zebra_evpn_acc_bd_svi_set(zif, NULL,
--						  !!if_is_operative(ifp));
--	}
-+	return NS_WALK_CONTINUE;
-+}
-+
-+/*
-+ * during initial link dump kernel does not order lower devices before
-+ * upper devices so we need to fixup link dependencies at the end of dump
-+ */
-+void zebra_if_update_all_links(struct zebra_ns *zns)
-+{
-+	if (IS_ZEBRA_DEBUG_KERNEL)
-+		zlog_debug("fixup link dependencies");
-+
-+	zebra_ns_ifp_walk(zns, zif_link_fixup_cb, NULL);
- }
- 
- static bool if_ignore_set_protodown(const struct interface *ifp, bool new_down,
-diff --git a/zebra/interface.h b/zebra/interface.h
-index 4cbec83cce..4f768e0217 100644
---- a/zebra/interface.h
-+++ b/zebra/interface.h
-@@ -212,6 +212,9 @@ struct zebra_if {
- 	char neigh_mac[6];
- 	struct in6_addr v6_2_v4_ll_addr6;
- 
-+	/* Linkage for per-vrf/per-NS ifp container */
-+	struct ifp_tree_link *ns_tree_link;
-+
- 	/* The description of the interface */
- 	char *desc;
- };
-@@ -259,12 +262,10 @@ extern void zebra_if_init(void);
- extern struct interface *if_lookup_by_index_per_ns(struct zebra_ns *, uint32_t);
- extern struct interface *if_lookup_by_name_per_ns(struct zebra_ns *,
- 						  const char *);
--extern struct interface *if_link_per_ns(struct zebra_ns *, struct interface *);
- extern struct interface *if_lookup_by_index_per_nsid(ns_id_t nsid,
- 						     uint32_t ifindex);
- extern const char *ifindex2ifname_per_ns(struct zebra_ns *, unsigned int);
- 
--extern void if_unlink_per_ns(struct interface *);
- extern void if_nbr_mac_to_ipv4ll_neigh_update(struct interface *fip,
- 					      char mac[6],
- 					      struct in6_addr *address,
--- 
-2.43.2
-
-
-From 3f951796fcd65edba9fa41e5f094f0e79e9583b9 Mon Sep 17 00:00:00 2001
-From: Mark Stapp <mjs@cisco.com>
-Date: Wed, 23 Oct 2024 12:34:36 -0700
-Subject: [PATCH 6/9] zebra: use new per-NS iteration in zebra_evpn
-
-Use the new per-NS interface iteration apis in the evpn
-module.
-
-Signed-off-by: Mark Stapp <mjs@cisco.com>
----
- zebra/zebra_evpn.c | 245 +++++++++++++++++++--------------------------
- zebra/zebra_evpn.h |   2 +
- 2 files changed, 103 insertions(+), 144 deletions(-)
-
-diff --git a/zebra/zebra_evpn.c b/zebra/zebra_evpn.c
-index 147f5b93fa..1122b5a2c0 100644
---- a/zebra/zebra_evpn.c
-+++ b/zebra/zebra_evpn.c
-@@ -644,70 +644,47 @@ void zebra_evpn_svi_macip_del_for_evpn_hash(struct hash_bucket *bucket,
- 	return;
- }
- 
--static int zebra_evpn_map_vlan_ns(struct ns *ns,
--				  void *_in_param,
--				  void **_p_zevpn)
-+/* Callback for per-NS ifp walk */
-+static int zebra_evpn_map_vlan_ns(struct interface *tmp_if, void *_in_param)
- {
--	int found = 0;
--	struct zebra_ns *zns = ns->info;
--	struct route_node *rn;
-+	bool found = false;
- 	struct interface *br_if;
--	struct zebra_evpn **p_zevpn = (struct zebra_evpn **)_p_zevpn;
- 	struct zebra_evpn *zevpn;
--	struct interface *tmp_if = NULL;
- 	struct zebra_if *zif;
--	struct zebra_from_svi_param *in_param =
--		(struct zebra_from_svi_param *)_in_param;
--	vlanid_t vid;
-+	struct zebra_from_svi_param *in_param = _in_param;
- 	vni_t vni_id = 0;
--	uint8_t bridge_vlan_aware;
- 
--	assert(p_zevpn && in_param);
-+	assert(in_param);
- 
- 	br_if = in_param->br_if;
- 	assert(br_if);
- 	zif = in_param->zif;
- 	assert(zif);
--	vid = in_param->vid;
--	bridge_vlan_aware = in_param->bridge_vlan_aware;
- 
--	if (bridge_vlan_aware) {
--		vni_id = zebra_l2_bridge_if_vni_find(zif, vid);
--		if (vni_id)
--			found = 1;
--	} else {
--		/*
--		 * See if this interface (or interface plus VLAN Id) maps to a
--		 * VxLAN
--		 */
--		/* TODO: Optimize with a hash. */
--		for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
--			tmp_if = (struct interface *)rn->info;
--			if (!tmp_if)
--				continue;
--			zif = tmp_if->info;
--			if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
--				continue;
--			if (!if_is_operative(tmp_if))
--				continue;
--
--			if (zif->brslave_info.br_if != br_if)
--				continue;
--
--			vni_id =
--				zebra_vxlan_if_access_vlan_vni_find(zif, br_if);
--			if (vni_id) {
--				found = 1;
--				break;
--			}
--		}
--	}
-+	/*
-+	 * See if this interface (or interface plus VLAN Id) maps to a
-+	 * VxLAN
-+	 */
-+	/* TODO: Optimize with a hash. */
-+	zif = tmp_if->info;
-+	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
-+		goto done;
-+	if (!if_is_operative(tmp_if))
-+		goto done;
-+
-+	if (zif->brslave_info.br_if != br_if)
-+		goto done;
-+
-+	vni_id = zebra_vxlan_if_access_vlan_vni_find(zif, br_if);
-+	if (vni_id)
-+		found = true;
- 
-+done:
- 	if (!found)
- 		return NS_WALK_CONTINUE;
- 
- 	zevpn = zebra_evpn_lookup(vni_id);
--	*p_zevpn = zevpn;
-+	in_param->zevpn = zevpn;
- 	return NS_WALK_STOP;
- }
- 
-@@ -719,44 +696,39 @@ struct zebra_evpn *zebra_evpn_map_vlan(struct interface *ifp,
- 				       struct interface *br_if, vlanid_t vid)
- {
- 	struct zebra_if *zif;
--	struct zebra_evpn **p_zevpn;
--	struct zebra_evpn *zevpn = NULL;
--	struct zebra_from_svi_param in_param;
-+	struct zebra_from_svi_param in_param = {};
-+	vni_t vni_id = 0;
- 
- 	/* Determine if bridge is VLAN-aware or not */
- 	zif = br_if->info;
- 	assert(zif);
--	in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif);
-+
-+	/* Special case for vlan */
-+	if (IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif)) {
-+		vni_id = zebra_l2_bridge_if_vni_find(zif, vid);
-+		if (vni_id)
-+			return zebra_evpn_lookup(vni_id);
-+	}
-+
- 	in_param.vid = vid;
- 	in_param.br_if = br_if;
- 	in_param.zif = zif;
--	p_zevpn = &zevpn;
- 
--	ns_walk_func(zebra_evpn_map_vlan_ns,
--		     (void *)&in_param,
--		     (void **)p_zevpn);
--	return zevpn;
-+	zebra_ns_ifp_walk_all(zebra_evpn_map_vlan_ns, &in_param);
-+
-+	return in_param.zevpn;
- }
- 
--static int zebra_evpn_from_svi_ns(struct ns *ns,
--				  void *_in_param,
--				  void **_p_zevpn)
-+/* Callback for from_svi ifp walker */
-+static int zebra_evpn_from_svi_ns(struct interface *tmp_if, void *_in_param)
- {
--	struct zebra_ns *zns = ns->info;
--	struct route_node *rn;
- 	struct interface *br_if;
--	struct zebra_evpn **p_zevpn = (struct zebra_evpn **)_p_zevpn;
- 	struct zebra_evpn *zevpn;
--	struct interface *tmp_if = NULL;
- 	struct zebra_if *zif;
- 	struct zebra_if *br_zif;
--	struct zebra_l2_bridge_vlan *bvlan;
--	struct zebra_from_svi_param *in_param =
--		(struct zebra_from_svi_param *)_in_param;
--	int found = 0;
-+	struct zebra_from_svi_param *in_param = _in_param;
-+	bool found = false;
- 	vni_t vni_id = 0;
--	vlanid_t vid = 0;
--	uint8_t bridge_vlan_aware;
- 
- 	if (!in_param)
- 		return NS_WALK_STOP;
-@@ -764,47 +736,30 @@ static int zebra_evpn_from_svi_ns(struct ns *ns,
- 	br_if = in_param->br_if;
- 	zif = in_param->zif;
- 	assert(zif);
--	bridge_vlan_aware = in_param->bridge_vlan_aware;
--	vid = in_param->vid;
- 	br_zif = br_if->info;
- 	assert(br_zif);
- 
--	if (bridge_vlan_aware) {
--		bvlan = zebra_l2_bridge_if_vlan_find(br_zif, vid);
--		if (bvlan && bvlan->access_bd && bvlan->access_bd->vni) {
--			found = 1;
--			vni_id = bvlan->access_bd->vni;
--		}
--	} else {
--		/* TODO: Optimize with a hash. */
--		for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
--			tmp_if = (struct interface *)rn->info;
--			if (!tmp_if)
--				continue;
--			zif = tmp_if->info;
--			if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
--				continue;
--			if (!if_is_operative(tmp_if))
--				continue;
--
--			if (zif->brslave_info.br_if != br_if)
--				continue;
--
--			vni_id =
--				zebra_vxlan_if_access_vlan_vni_find(zif, br_if);
--			if (vni_id) {
--				found = 1;
--				break;
--			}
--		}
--	}
-+	if (!tmp_if)
-+		goto done;
-+	zif = tmp_if->info;
-+	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
-+		goto done;
-+	if (!if_is_operative(tmp_if))
-+		goto done;
-+
-+	if (zif->brslave_info.br_if != br_if)
-+		goto done;
-+
-+	vni_id = zebra_vxlan_if_access_vlan_vni_find(zif, br_if);
-+	if (vni_id)
-+		found = true;
- 
-+done:
- 	if (!found)
- 		return NS_WALK_CONTINUE;
- 
- 	zevpn = zebra_evpn_lookup(vni_id);
--	if (p_zevpn)
--		*p_zevpn = zevpn;
-+	in_param->zevpn = zevpn;
- 	return NS_WALK_STOP;
- }
- 
-@@ -815,17 +770,21 @@ static int zebra_evpn_from_svi_ns(struct ns *ns,
- struct zebra_evpn *zebra_evpn_from_svi(struct interface *ifp,
- 				       struct interface *br_if)
- {
--	struct zebra_evpn *zevpn = NULL;
--	struct zebra_evpn **p_zevpn;
- 	struct zebra_if *zif;
--	struct zebra_from_svi_param in_param;
-+	struct zebra_l2_bridge_vlan *bvlan;
-+	struct zebra_from_svi_param in_param = {};
-+	vni_t vni_id = 0;
-+	struct zebra_evpn *zevpn;
-+	struct zebra_l2info_vlan *vl;
- 
- 	if (!br_if)
- 		return NULL;
- 
- 	/* Make sure the linked interface is a bridge. */
--	if (!IS_ZEBRA_IF_BRIDGE(br_if))
-+	if (!IS_ZEBRA_IF_BRIDGE(br_if)) {
-+		zlog_debug("%s: br_if NOT a bridge", __func__);
- 		return NULL;
-+	}
- 
- 	/* Determine if bridge is VLAN-aware or not */
- 	zif = br_if->info;
-@@ -833,58 +792,60 @@ struct zebra_evpn *zebra_evpn_from_svi(struct interface *ifp,
- 	in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif);
- 	in_param.vid = 0;
- 
-+	/* Don't need to search in this case */
- 	if (in_param.bridge_vlan_aware) {
--		struct zebra_l2info_vlan *vl;
--
- 		if (!IS_ZEBRA_IF_VLAN(ifp))
- 			return NULL;
- 
-+		zevpn = NULL;
-+
- 		zif = ifp->info;
- 		assert(zif);
- 		vl = &zif->l2info.vl;
- 		in_param.vid = vl->vid;
-+
-+		bvlan = zebra_l2_bridge_if_vlan_find(br_if->info, vl->vid);
-+		if (bvlan && bvlan->access_bd && bvlan->access_bd->vni) {
-+			vni_id = bvlan->access_bd->vni;
-+			zevpn = zebra_evpn_lookup(vni_id);
-+		}
-+
-+		return zevpn;
- 	}
- 
-+	/* See if this interface (or interface plus VLAN Id) maps to a VxLAN:
-+	 * search all NSes
-+	 */
- 	in_param.br_if = br_if;
- 	in_param.zif = zif;
--	p_zevpn = &zevpn;
--	/* See if this interface (or interface plus VLAN Id) maps to a VxLAN */
--	ns_walk_func(zebra_evpn_from_svi_ns, (void *)&in_param,
--		     (void **)p_zevpn);
--	return zevpn;
-+	zebra_ns_ifp_walk_all(zebra_evpn_from_svi_ns, &in_param);
-+
-+	return in_param.zevpn;
- }
- 
--static int zvni_map_to_macvlan_ns(struct ns *ns,
--				  void *_in_param,
--				  void **_p_ifp)
-+static int zvni_map_to_macvlan_ns(struct interface *tmp_if, void *_in_param)
- {
--	struct zebra_ns *zns = ns->info;
--	struct zebra_from_svi_param *in_param =
--		(struct zebra_from_svi_param *)_in_param;
--	struct interface **p_ifp = (struct interface **)_p_ifp;
--	struct route_node *rn;
--	struct interface *tmp_if = NULL;
-+	struct zebra_from_svi_param *in_param = _in_param;
- 	struct zebra_if *zif;
- 
--	assert(in_param && p_ifp);
-+	assert(in_param);
- 
- 	/* Identify corresponding VLAN interface. */
--	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
--		tmp_if = (struct interface *)rn->info;
--		/* Check oper status of the SVI. */
--		if (!tmp_if || !if_is_operative(tmp_if))
--			continue;
--		zif = tmp_if->info;
- 
--		if (!zif || zif->zif_type != ZEBRA_IF_MACVLAN)
--			continue;
-+	/* Check oper status of the SVI. */
-+	if (!tmp_if || !if_is_operative(tmp_if))
-+		goto done;
- 
--		if (zif->link == in_param->svi_if) {
--			*p_ifp = tmp_if;
--			return NS_WALK_STOP;
--		}
-+	zif = tmp_if->info;
-+	if (!zif || zif->zif_type != ZEBRA_IF_MACVLAN)
-+		goto done;
-+
-+	if (zif->link == in_param->svi_if) {
-+		in_param->ret_ifp = tmp_if;
-+		return NS_WALK_STOP;
- 	}
- 
-+done:
- 	return NS_WALK_CONTINUE;
- }
- 
-@@ -893,17 +854,16 @@ static int zvni_map_to_macvlan_ns(struct ns *ns,
- struct interface *zebra_evpn_map_to_macvlan(struct interface *br_if,
- 					    struct interface *svi_if)
- {
--	struct interface *tmp_if = NULL;
- 	struct zebra_if *zif;
--	struct interface **p_ifp;
--	struct zebra_from_svi_param in_param;
-+	struct zebra_from_svi_param in_param = {};
- 
- 	/* Defensive check, caller expected to invoke only with valid bridge. */
- 	if (!br_if)
- 		return NULL;
- 
- 	if (!svi_if) {
--		zlog_debug("svi_if is not passed.");
-+		if (IS_ZEBRA_DEBUG_VXLAN)
-+			zlog_debug("%s: svi_if is not passed.", __func__);
- 		return NULL;
- 	}
- 
-@@ -915,13 +875,10 @@ struct interface *zebra_evpn_map_to_macvlan(struct interface *br_if,
- 	in_param.br_if = br_if;
- 	in_param.zif = NULL;
- 	in_param.svi_if = svi_if;
--	p_ifp = &tmp_if;
- 
- 	/* Identify corresponding VLAN interface. */
--	ns_walk_func(zvni_map_to_macvlan_ns,
--		     (void *)&in_param,
--		     (void **)p_ifp);
--	return tmp_if;
-+	zebra_ns_ifp_walk_all(zvni_map_to_macvlan_ns, &in_param);
-+	return in_param.ret_ifp;
- }
- 
- /*
-diff --git a/zebra/zebra_evpn.h b/zebra/zebra_evpn.h
-index c946425dd5..85bdf54272 100644
---- a/zebra/zebra_evpn.h
-+++ b/zebra/zebra_evpn.h
-@@ -116,7 +116,9 @@ struct zebra_evpn {
- struct zebra_from_svi_param {
- 	struct interface *br_if;
- 	struct interface *svi_if;
-+	struct interface *ret_ifp;
- 	struct zebra_if *zif;
-+	struct zebra_evpn *zevpn;
- 	uint8_t bridge_vlan_aware;
- 	vlanid_t vid;
- };
--- 
-2.43.2
-
-
-From 8a9d5ecbbcdf04894de461662e83df8c5dcb7ab4 Mon Sep 17 00:00:00 2001
-From: Mark Stapp <mjs@cisco.com>
-Date: Thu, 24 Oct 2024 14:49:28 -0700
-Subject: [PATCH 7/9] lib,zebra: remove table node from ifp struct
-
-Finish removing the table route_node from the ifp struct.
-
-Signed-off-by: Mark Stapp <mjs@cisco.com>
----
- lib/if.c          | 6 ------
- lib/if.h          | 2 --
- zebra/interface.c | 3 ++-
- 3 files changed, 2 insertions(+), 9 deletions(-)
-
-diff --git a/lib/if.c b/lib/if.c
-index a8ceac7243..bde35a3460 100644
---- a/lib/if.c
-+++ b/lib/if.c
-@@ -1003,12 +1003,6 @@ void if_terminate(struct vrf *vrf)
- 
- 	while (!RB_EMPTY(if_name_head, &vrf->ifaces_by_name)) {
- 		ifp = RB_ROOT(if_name_head, &vrf->ifaces_by_name);
--
--		if (ifp->node) {
--			ifp->node->info = NULL;
--			route_unlock_node(ifp->node);
--			ifp->node = NULL;
--		}
- 		if_delete(&ifp);
- 	}
- }
-diff --git a/lib/if.h b/lib/if.h
-index 0dc56bd210..c2ec73378d 100644
---- a/lib/if.h
-+++ b/lib/if.h
-@@ -295,8 +295,6 @@ struct interface {
- 	struct if_data stats;
- #endif /* HAVE_NET_RT_IFLIST */
- 
--	struct route_node *node;
--
- 	struct vrf *vrf;
- 
- 	/*
-diff --git a/zebra/interface.c b/zebra/interface.c
-index 7ec80cb259..237ad2340d 100644
---- a/zebra/interface.c
-+++ b/zebra/interface.c
-@@ -223,6 +223,8 @@ static int if_zebra_delete_hook(struct interface *ifp)
- 		if_nhg_dependents_release(ifp);
- 		zebra_if_nhg_dependents_free(zebra_if);
- 
-+		zebra_ns_unlink_ifp(ifp);
-+
- 		XFREE(MTYPE_ZIF_DESC, zebra_if->desc);
- 
- 		EVENT_OFF(zebra_if->speed_update);
-@@ -738,7 +740,6 @@ void if_delete_update(struct interface **pifp)
- 	   for setting ifindex to IFINDEX_INTERNAL after processing the
- 	   interface deletion message. */
- 	if_set_index(ifp, IFINDEX_INTERNAL);
--	ifp->node = NULL;
- 
- 	UNSET_FLAG(ifp->status, ZEBRA_INTERFACE_VRF_LOOPBACK);
- 
--- 
-2.43.2
-
-
-From bf41170c63771c5bda25476ccbab56383d9c74a6 Mon Sep 17 00:00:00 2001
-From: Mark Stapp <mjs@cisco.com>
-Date: Thu, 24 Oct 2024 14:50:12 -0700
-Subject: [PATCH 8/9] zebra: use new per-NS ifp iterators in vxlan code
-
-Replace use of the old if_table with the new per-NS ifp
-iterator apis in the zebra vxlan code.
-
-Signed-off-by: Mark Stapp <mjs@cisco.com>
----
- zebra/zebra_evpn.h  |   1 +
- zebra/zebra_vxlan.c | 368 ++++++++++++++++++++------------------------
- 2 files changed, 172 insertions(+), 197 deletions(-)
-
-diff --git a/zebra/zebra_evpn.h b/zebra/zebra_evpn.h
-index 85bdf54272..0ffebdd277 100644
---- a/zebra/zebra_evpn.h
-+++ b/zebra/zebra_evpn.h
-@@ -119,6 +119,7 @@ struct zebra_from_svi_param {
- 	struct interface *ret_ifp;
- 	struct zebra_if *zif;
- 	struct zebra_evpn *zevpn;
-+	struct zebra_l3vni *zl3vni;
- 	uint8_t bridge_vlan_aware;
- 	vlanid_t vid;
- };
-diff --git a/zebra/zebra_vxlan.c b/zebra/zebra_vxlan.c
-index 0b75ec261e..28646a7a6a 100644
---- a/zebra/zebra_vxlan.c
-+++ b/zebra/zebra_vxlan.c
-@@ -862,39 +862,30 @@ static void zl3vni_print_hash_detail(struct hash_bucket *bucket, void *data)
- 		vty_out(vty, "\n");
- }
- 
--static int zvni_map_to_svi_ns(struct ns *ns,
--			      void *_in_param,
--			      void **_p_ifp)
-+static int zvni_map_to_svi_ns(struct interface *tmp_if, void *_in_param)
- {
--	struct zebra_ns *zns = ns->info;
--	struct route_node *rn;
--	struct zebra_from_svi_param *in_param =
--		(struct zebra_from_svi_param *)_in_param;
-+	struct zebra_from_svi_param *in_param = _in_param;
- 	struct zebra_l2info_vlan *vl;
--	struct interface *tmp_if = NULL;
--	struct interface **p_ifp = (struct interface **)_p_ifp;
- 	struct zebra_if *zif;
- 
--	assert(in_param && p_ifp);
-+	assert(in_param);
- 
- 	/* TODO: Optimize with a hash. */
--	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
--		tmp_if = (struct interface *)rn->info;
--		/* Check oper status of the SVI. */
--		if (!tmp_if || !if_is_operative(tmp_if))
--			continue;
--		zif = tmp_if->info;
--		if (!zif || zif->zif_type != ZEBRA_IF_VLAN
--		    || zif->link != in_param->br_if)
--			continue;
--		vl = (struct zebra_l2info_vlan *)&zif->l2info.vl;
--
--		if (vl->vid == in_param->vid) {
--			*p_ifp = tmp_if;
--			route_unlock_node(rn);
--			return NS_WALK_STOP;
--		}
-+
-+	/* Check oper status of the SVI. */
-+	if (!tmp_if || !if_is_operative(tmp_if))
-+		goto done;
-+	zif = tmp_if->info;
-+	if (!zif || zif->zif_type != ZEBRA_IF_VLAN || zif->link != in_param->br_if)
-+		goto done;
-+	vl = (struct zebra_l2info_vlan *)&zif->l2info.vl;
-+
-+	if (vl->vid == in_param->vid) {
-+		in_param->ret_ifp = tmp_if;
-+		return NS_WALK_STOP;
- 	}
-+
-+done:
- 	return NS_WALK_CONTINUE;
- }
- 
-@@ -907,10 +898,9 @@ static int zvni_map_to_svi_ns(struct ns *ns,
-  */
- struct interface *zvni_map_to_svi(vlanid_t vid, struct interface *br_if)
- {
--	struct interface *tmp_if = NULL;
- 	struct zebra_if *zif;
--	struct zebra_from_svi_param in_param;
--	struct interface **p_ifp;
-+	struct zebra_from_svi_param in_param = {};
-+
- 	/* Defensive check, caller expected to invoke only with valid bridge. */
- 	if (!br_if)
- 		return NULL;
-@@ -925,12 +915,11 @@ struct interface *zvni_map_to_svi(vlanid_t vid, struct interface *br_if)
- 
- 	in_param.vid = vid;
- 	in_param.br_if = br_if;
--	in_param.zif = NULL;
--	p_ifp = &tmp_if;
-+
- 	/* Identify corresponding VLAN interface. */
--	ns_walk_func(zvni_map_to_svi_ns, (void *)&in_param,
--		     (void **)p_ifp);
--	return tmp_if;
-+	zebra_ns_ifp_walk_all(zvni_map_to_svi_ns, &in_param);
-+
-+	return in_param.ret_ifp;
- }
- 
- int zebra_evpn_vxlan_del(struct zebra_evpn *zevpn)
-@@ -1010,9 +999,9 @@ static int zevpn_build_vni_hash_table(struct zebra_if *zif,
- 		 */
- 		zevpn = zebra_evpn_lookup(vni);
- 		if (zevpn) {
--			zlog_debug(
--				"EVPN hash already present for IF %s(%u) L2-VNI %u",
--				ifp->name, ifp->ifindex, vni);
-+			if (IS_ZEBRA_DEBUG_VXLAN)
-+				zlog_debug("EVPN hash already present for IF %s(%u) L2-VNI %u",
-+					   ifp->name, ifp->ifindex, vni);
- 
- 			/*
- 			 * Inform BGP if intf is up and mapped to
-@@ -1075,48 +1064,32 @@ static int zevpn_build_vni_hash_table(struct zebra_if *zif,
- 	return 0;
- }
- 
--static int zevpn_build_hash_table_zns(struct ns *ns,
--				     void *param_in __attribute__((unused)),
--				     void **param_out __attribute__((unused)))
-+static int zevpn_build_hash_table_zns(struct interface *ifp, void *arg)
- {
--	struct zebra_ns *zns = ns->info;
--	struct route_node *rn;
--	struct interface *ifp;
--	struct zebra_vrf *zvrf;
--
--	zvrf = zebra_vrf_get_evpn();
-+	struct zebra_vrf *zvrf = arg;
-+	struct zebra_if *zif;
-+	struct zebra_l2info_vxlan *vxl;
- 
--	/* Walk VxLAN interfaces and create EVPN hash. */
--	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
--		struct zebra_if *zif;
--		struct zebra_l2info_vxlan *vxl;
-+	zif = ifp->info;
-+	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
-+		goto done;
- 
--		ifp = (struct interface *)rn->info;
--		if (!ifp)
--			continue;
--		zif = ifp->info;
--		if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
--			continue;
-+	vxl = &zif->l2info.vxl;
-+	/* link of VXLAN interface should be in zebra_evpn_vrf */
-+	if (zvrf->zns->ns_id != vxl->link_nsid) {
-+		if (IS_ZEBRA_DEBUG_VXLAN)
-+			zlog_debug("Intf %s(%u) link not in same namespace as BGP EVPN core instance",
-+				   ifp->name, ifp->ifindex);
-+		goto done;
-+	}
- 
--		vxl = &zif->l2info.vxl;
--		/* link of VXLAN interface should be in zebra_evpn_vrf */
--		if (zvrf->zns->ns_id != vxl->link_nsid) {
--			if (IS_ZEBRA_DEBUG_VXLAN)
--				zlog_debug(
--					"Intf %s(%u) link not in same "
--					"namespace than BGP EVPN core instance ",
--					ifp->name, ifp->ifindex);
--			continue;
--		}
-+	if (IS_ZEBRA_DEBUG_VXLAN)
-+		zlog_debug("Building vni table for %s-if %s",
-+			   IS_ZEBRA_VXLAN_IF_VNI(zif) ? "vni" : "svd", ifp->name);
- 
--		if (IS_ZEBRA_DEBUG_VXLAN)
--			zlog_debug("Building vni table for %s-if %s",
--				   IS_ZEBRA_VXLAN_IF_VNI(zif) ? "vni" : "svd",
--				   ifp->name);
-+	zebra_vxlan_if_vni_iterate(zif, zevpn_build_vni_hash_table, NULL);
- 
--		zebra_vxlan_if_vni_iterate(zif, zevpn_build_vni_hash_table,
--					   NULL);
--	}
-+done:
- 	return NS_WALK_CONTINUE;
- }
- 
-@@ -1127,7 +1100,13 @@ static int zevpn_build_hash_table_zns(struct ns *ns,
- 
- static void zevpn_build_hash_table(void)
- {
--	ns_walk_func(zevpn_build_hash_table_zns, NULL, NULL);
-+	struct zebra_vrf *zvrf;
-+
-+	zvrf = zebra_vrf_get_evpn();
-+	if (zvrf == NULL)
-+		return;
-+
-+	zebra_ns_ifp_walk_all(zevpn_build_hash_table_zns, zvrf);
- }
- 
- /*
-@@ -1966,70 +1945,63 @@ static int zl3vni_del(struct zebra_l3vni *zl3vni)
- 	return 0;
- }
- 
--static int zl3vni_map_to_vxlan_if_ns(struct ns *ns,
--				     void *_zl3vni,
--				     void **_pifp)
--{
--	struct zebra_ns *zns = ns->info;
--	struct zebra_l3vni *zl3vni = (struct zebra_l3vni *)_zl3vni;
--	struct route_node *rn = NULL;
--	struct interface *ifp = NULL;
-+/* Context arg for zl3vni map iteration */
-+struct zl3vni_map_arg {
- 	struct zebra_vrf *zvrf;
-+	struct zebra_l3vni *zl3vni;
-+	struct interface *ret_ifp;
-+};
- 
--	zvrf = zebra_vrf_get_evpn();
--
--	assert(_pifp);
--
--	/* loop through all vxlan-interface */
--	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
-+static int zl3vni_map_to_vxlan_if_ns(struct interface *ifp, void *arg)
-+{
-+	struct zl3vni_map_arg *ctx = arg;
-+	struct zebra_l3vni *zl3vni = ctx->zl3vni;
-+	struct zebra_vrf *zvrf = ctx->zvrf;
-+	struct zebra_if *zif = NULL;
-+	struct zebra_l2info_vxlan *vxl;
-+	struct zebra_vxlan_vni *vni = NULL;
- 
--		struct zebra_if *zif = NULL;
--		struct zebra_l2info_vxlan *vxl;
--		struct zebra_vxlan_vni *vni = NULL;
-+	/* look for vxlan-interface */
- 
--		ifp = (struct interface *)rn->info;
--		if (!ifp)
--			continue;
--
--		zif = ifp->info;
--		if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
--			continue;
-+	zif = ifp->info;
-+	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
-+		goto done;
- 
--		vxl = &zif->l2info.vxl;
--		vni = zebra_vxlan_if_vni_find(zif, zl3vni->vni);
--		if (!vni || vni->vni != zl3vni->vni)
--			continue;
-+	vxl = &zif->l2info.vxl;
-+	vni = zebra_vxlan_if_vni_find(zif, zl3vni->vni);
-+	if (!vni || vni->vni != zl3vni->vni)
-+		goto done;
- 
--		/* link of VXLAN interface should be in zebra_evpn_vrf */
--		if (zvrf->zns->ns_id != vxl->link_nsid) {
--			if (IS_ZEBRA_DEBUG_VXLAN)
--				zlog_debug(
--					"Intf %s(%u) VNI %u, link not in same "
--					"namespace than BGP EVPN core instance ",
--					ifp->name, ifp->ifindex, vni->vni);
--			continue;
--		}
-+	/* link of VXLAN interface should be in zebra_evpn_vrf */
-+	if (zvrf->zns->ns_id != vxl->link_nsid) {
-+		if (IS_ZEBRA_DEBUG_VXLAN)
-+			zlog_debug("Intf %s(%u) VNI %u, link not in same namespace as BGP EVPN core instance",
-+				   ifp->name, ifp->ifindex, vni->vni);
-+		goto done;
-+	}
- 
-+	zl3vni->local_vtep_ip = zif->l2info.vxl.vtep_ip;
-+	ctx->ret_ifp = ifp;
- 
--		zl3vni->local_vtep_ip = zif->l2info.vxl.vtep_ip;
--		*_pifp = (void *)ifp;
--		route_unlock_node(rn);
--		return NS_WALK_STOP;
--	}
-+	return NS_WALK_STOP;
- 
-+done:
- 	return NS_WALK_CONTINUE;
- }
- 
- struct interface *zl3vni_map_to_vxlan_if(struct zebra_l3vni *zl3vni)
- {
--	struct interface **p_ifp;
--	struct interface *ifp = NULL;
-+	struct zl3vni_map_arg arg = {};
- 
--	p_ifp = &ifp;
-+	arg.zl3vni = zl3vni;
-+	arg.zvrf = zebra_vrf_get_evpn();
- 
--	ns_walk_func(zl3vni_map_to_vxlan_if_ns,
--		     (void *)zl3vni, (void **)p_ifp);
--	return ifp;
-+	if (arg.zvrf == NULL)
-+		return NULL;
-+
-+	zebra_ns_ifp_walk_all(zl3vni_map_to_vxlan_if_ns, &arg);
-+
-+	return arg.ret_ifp;
- }
- 
- struct interface *zl3vni_map_to_svi_if(struct zebra_l3vni *zl3vni)
-@@ -2084,57 +2056,35 @@ struct zebra_l3vni *zl3vni_from_vrf(vrf_id_t vrf_id)
- 	return zl3vni_lookup(zvrf->l3vni);
- }
- 
--static int zl3vni_from_svi_ns(struct ns *ns, void *_in_param, void **_p_zl3vni)
-+/* loop through all vxlan-interface */
-+static int zl3vni_from_svi_ns(struct interface *tmp_if, void *_in_param)
- {
- 	int found = 0;
- 	vni_t vni_id = 0;
--	struct zebra_ns *zns = ns->info;
--	struct zebra_l3vni **p_zl3vni = (struct zebra_l3vni **)_p_zl3vni;
--	struct zebra_from_svi_param *in_param =
--		(struct zebra_from_svi_param *)_in_param;
--	struct route_node *rn = NULL;
--	struct interface *tmp_if = NULL;
-+	struct zebra_from_svi_param *in_param = _in_param;
- 	struct zebra_if *zif = NULL;
--	struct zebra_if *br_zif = NULL;
- 
--	assert(in_param && p_zl3vni);
-+	assert(in_param);
- 
--	br_zif = in_param->br_if->info;
--	assert(br_zif);
-+	zif = tmp_if->info;
-+	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
-+		goto done;
-+	if (!if_is_operative(tmp_if))
-+		goto done;
- 
--	if (in_param->bridge_vlan_aware) {
--		vni_id = zebra_l2_bridge_if_vni_find(br_zif, in_param->vid);
--		if (vni_id)
--			found = 1;
--	} else {
--		/* loop through all vxlan-interface */
--		for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
--			tmp_if = (struct interface *)rn->info;
--			if (!tmp_if)
--				continue;
--			zif = tmp_if->info;
--			if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
--				continue;
--			if (!if_is_operative(tmp_if))
--				continue;
--
--			if (zif->brslave_info.br_if != in_param->br_if)
--				continue;
--
--			vni_id = zebra_vxlan_if_access_vlan_vni_find(
--				zif, in_param->br_if);
--			if (vni_id) {
--				found = 1;
--				route_unlock_node(rn);
--				break;
--			}
--		}
-+	if (zif->brslave_info.br_if != in_param->br_if)
-+		goto done;
-+
-+	vni_id = zebra_vxlan_if_access_vlan_vni_find(zif, in_param->br_if);
-+	if (vni_id) {
-+		in_param->zl3vni = zl3vni_lookup(vni_id);
-+		found = 1;
- 	}
- 
-+done:
- 	if (!found)
- 		return NS_WALK_CONTINUE;
- 
--	*p_zl3vni = zl3vni_lookup(vni_id);
- 	return NS_WALK_STOP;
- }
- 
-@@ -2145,10 +2095,11 @@ static int zl3vni_from_svi_ns(struct ns *ns, void *_in_param, void **_p_zl3vni)
- static struct zebra_l3vni *zl3vni_from_svi(struct interface *ifp,
- 					   struct interface *br_if)
- {
--	struct zebra_l3vni *zl3vni = NULL;
- 	struct zebra_if *zif = NULL;
-+	vni_t vni_id = 0;
-+	struct zebra_if *br_zif = NULL;
- 	struct zebra_from_svi_param in_param = {};
--	struct zebra_l3vni **p_zl3vni;
-+	struct zebra_l2info_vlan *vl;
- 
- 	if (!br_if)
- 		return NULL;
-@@ -2156,15 +2107,15 @@ static struct zebra_l3vni *zl3vni_from_svi(struct interface *ifp,
- 	/* Make sure the linked interface is a bridge. */
- 	if (!IS_ZEBRA_IF_BRIDGE(br_if))
- 		return NULL;
-+
- 	in_param.br_if = br_if;
- 
- 	/* Determine if bridge is VLAN-aware or not */
--	zif = br_if->info;
--	assert(zif);
--	in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif);
--	if (in_param.bridge_vlan_aware) {
--		struct zebra_l2info_vlan *vl;
-+	br_zif = br_if->info;
-+	assert(br_zif);
- 
-+	in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(br_zif);
-+	if (in_param.bridge_vlan_aware) {
- 		if (!IS_ZEBRA_IF_VLAN(ifp))
- 			return NULL;
- 
-@@ -2172,15 +2123,18 @@ static struct zebra_l3vni *zl3vni_from_svi(struct interface *ifp,
- 		assert(zif);
- 		vl = &zif->l2info.vl;
- 		in_param.vid = vl->vid;
-+
-+		vni_id = zebra_l2_bridge_if_vni_find(br_zif, in_param.vid);
-+		if (vni_id)
-+			return zl3vni_lookup(vni_id);
- 	}
- 
- 	/* See if this interface (or interface plus VLAN Id) maps to a VxLAN */
- 	/* TODO: Optimize with a hash. */
- 
--	p_zl3vni = &zl3vni;
-+	zebra_ns_ifp_walk_all(zl3vni_from_svi_ns, &in_param);
- 
--	ns_walk_func(zl3vni_from_svi_ns, (void *)&in_param, (void **)p_zl3vni);
--	return zl3vni;
-+	return in_param.zl3vni;
- }
- 
- vni_t vni_id_from_svi(struct interface *ifp, struct interface *br_if)
-@@ -2334,6 +2288,36 @@ static void zevpn_add_to_l3vni_list(struct hash_bucket *bucket, void *ctxt)
- 		listnode_add_sort(zl3vni->l2vnis, zevpn);
- }
- 
-+/* Helper for vni transition iterator */
-+
-+struct vni_trans_ctx {
-+	vni_t vni;
-+	struct zebra_vxlan_vni *vnip;
-+	struct interface *ret_ifp;
-+};
-+
-+static int vni_trans_cb(struct interface *ifp, void *arg)
-+{
-+	struct vni_trans_ctx *ctx = arg;
-+	struct zebra_if *zif;
-+	struct zebra_vxlan_vni *vnip;
-+
-+	/* Find VxLAN interface for this VNI. */
-+	zif = ifp->info;
-+	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
-+		goto done;
-+
-+	vnip = zebra_vxlan_if_vni_find(zif, ctx->vni);
-+	if (vnip) {
-+		ctx->ret_ifp = ifp;
-+		ctx->vnip = vnip;
-+		return NS_WALK_STOP;
-+	}
-+
-+done:
-+	return NS_WALK_CONTINUE;
-+}
-+
- /*
-  * Handle transition of vni from l2 to l3 and vice versa.
-  * This function handles only the L2VNI add/delete part of
-@@ -2384,39 +2368,25 @@ static int zebra_vxlan_handle_vni_transition(struct zebra_vrf *zvrf, vni_t vni,
- 			return -1;
- 		}
- 	} else {
--		struct zebra_ns *zns;
--		struct route_node *rn;
--		struct interface *ifp;
--		struct zebra_if *zif;
- 		struct zebra_vxlan_vni *vnip;
- 		struct zebra_l2info_vxlan *vxl;
- 		struct interface *vlan_if;
--		bool found = false;
-+		struct zebra_if *zif;
-+		struct zebra_ns *zns;
-+		struct vni_trans_ctx ctx = {};
- 
- 		if (IS_ZEBRA_DEBUG_VXLAN)
- 			zlog_debug("Adding L2-VNI %u - transition from L3-VNI",
- 				   vni);
- 
--		/* Find VxLAN interface for this VNI. */
- 		zns = zebra_ns_lookup(NS_DEFAULT);
--		for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
--			ifp = (struct interface *)rn->info;
--			if (!ifp)
--				continue;
--			zif = ifp->info;
--			if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
--				continue;
--
--			vxl = &zif->l2info.vxl;
--			vnip = zebra_vxlan_if_vni_find(zif, vni);
--			if (vnip) {
--				found = true;
--				route_unlock_node(rn);
--				break;
--			}
--		}
- 
--		if (!found) {
-+		ctx.vni = vni;
-+
-+		/* Find VxLAN interface for this VNI. */
-+		zebra_ns_ifp_walk(zns, vni_trans_cb, &ctx);
-+
-+		if (ctx.ret_ifp == NULL) {
- 			if (IS_ZEBRA_DEBUG_VXLAN)
- 				zlog_err(
- 					"Adding L2-VNI - Failed to find VxLAN interface for VNI %u",
-@@ -2429,6 +2399,10 @@ static int zebra_vxlan_handle_vni_transition(struct zebra_vrf *zvrf, vni_t vni,
- 		if (zevpn)
- 			return 0;
- 
-+		zif = ctx.ret_ifp->info;
-+		vnip = ctx.vnip;
-+		vxl = &zif->l2info.vxl;
-+
- 		zevpn = zebra_evpn_add(vni);
- 
- 		/* Find bridge interface for the VNI */
-@@ -2441,13 +2415,13 @@ static int zebra_vxlan_handle_vni_transition(struct zebra_vrf *zvrf, vni_t vni,
- 				listnode_add_sort_nodup(zl3vni->l2vnis, zevpn);
- 		}
- 
--		zevpn->vxlan_if = ifp;
-+		zevpn->vxlan_if = ctx.ret_ifp;
- 		zevpn->local_vtep_ip = vxl->vtep_ip;
- 
- 		/* Inform BGP if the VNI is up and mapped to a bridge. */
--		if (if_is_operative(ifp) && zif->brslave_info.br_if) {
-+		if (if_is_operative(ctx.ret_ifp) && zif->brslave_info.br_if) {
- 			zebra_evpn_send_add_to_client(zevpn);
--			zebra_evpn_read_mac_neigh(zevpn, ifp);
-+			zebra_evpn_read_mac_neigh(zevpn, ctx.ret_ifp);
- 		}
- 	}
- 
--- 
-2.43.2
-
-
-From 328f2f83feed43f0871669f47aa4206e9cd7a065 Mon Sep 17 00:00:00 2001
-From: Mark Stapp <mjs@cisco.com>
-Date: Thu, 24 Oct 2024 14:52:21 -0700
-Subject: [PATCH 9/9] zebra: remove if_table from the zebra NS
-
-Finish removing the if_table from the zebra NS struct.
-
-Signed-off-by: Mark Stapp <mjs@cisco.com>
----
- zebra/zebra_ns.c | 5 -----
- zebra/zebra_ns.h | 2 --
- 2 files changed, 7 deletions(-)
-
-diff --git a/zebra/zebra_ns.c b/zebra/zebra_ns.c
-index c6b279a9d7..578dee7b7e 100644
---- a/zebra/zebra_ns.c
-+++ b/zebra/zebra_ns.c
-@@ -234,7 +234,6 @@ static int zebra_ns_new(struct ns *ns)
- 	zns->ns_id = ns->ns_id;
- 
- 	/* Do any needed per-NS data structure allocation. */
--	zns->if_table = route_table_init();
- 	ifp_tree_init(&zns->ifp_tree);
- 
- 	return 0;
-@@ -334,10 +333,6 @@ int zebra_ns_enable(ns_id_t ns_id, void **info)
-  */
- static int zebra_ns_disable_internal(struct zebra_ns *zns, bool complete)
- {
--	if (zns->if_table)
--		route_table_finish(zns->if_table);
--	zns->if_table = NULL;
--
- 	zebra_dplane_ns_enable(zns, false /*Disable*/);
- 
- 	kernel_terminate(zns, complete);
-diff --git a/zebra/zebra_ns.h b/zebra/zebra_ns.h
-index 1ddecc8252..96b78d4745 100644
---- a/zebra/zebra_ns.h
-+++ b/zebra/zebra_ns.h
-@@ -67,8 +67,6 @@ struct zebra_ns {
- 	struct nlsock ge_netlink_cmd; /* command channel for generic netlink */
- #endif
- 
--	struct route_table *if_table;
--
- 	/* Tree of interfaces in this ns */
- 	struct ifp_tree_head ifp_tree;
- 
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0063-Patch-to-send-tag-value-associated-with-route-via-ne.patch b/src/sonic-frr/patch/0063-Patch-to-send-tag-value-associated-with-route-via-ne.patch
deleted file mode 100644
index 606f1ff3f38..00000000000
--- a/src/sonic-frr/patch/0063-Patch-to-send-tag-value-associated-with-route-via-ne.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From c0418c02dabe901f5dc39c85ce2e80bd361d7c78 Mon Sep 17 00:00:00 2001
-From: Abhishek Dosi <abdosi@microsoft.com>
-Date: Wed, 11 Dec 2024 11:19:05 +0000
-Subject: [PATCH] Patch to send tag value associated with route via netlink in 
- RTA_PRIORITY field.
-
-Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
----
- zebra/rt_netlink.c | 22 ++++++++++++++++++++--
- 1 file changed, 20 insertions(+), 2 deletions(-)
-
-diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index 976c245c3..1f73f5759 100644
---- a/zebra/rt_netlink.c
-+++ b/zebra/rt_netlink.c
-@@ -2348,10 +2348,28 @@ ssize_t netlink_route_multipath_msg_encode(int cmd, struct zebra_dplane_ctx *ctx
- 	 * path(s)
- 	 * by the routing protocol and for communicating with protocol peers.
- 	 */
--	if (!nl_attr_put32(&req->n, datalen, RTA_PRIORITY,
--			   ROUTE_INSTALLATION_METRIC))
-+	if (fpm)
-+	{
-+            /* Patch to send tag value as route attribute using RTA_PRIORITY
-+	     * which can be used as metadata/attribute to take application specific
-+	     * action. As seen in above comment this field is not use anyways and can be
-+	     * use by fpmsyncd */
-+            if (!nl_attr_put32(&req->n, datalen, RTA_PRIORITY,
-+		               cmd == RTM_DELROUTE ? dplane_ctx_get_old_tag(ctx) :
-+				                     dplane_ctx_get_tag(ctx)))
-+	    {
- 		return 0;
- 
-+	    }
-+	}
-+	else
-+	{
-+	    if (!nl_attr_put32(&req->n, datalen, RTA_PRIORITY,
-+			       ROUTE_INSTALLATION_METRIC))
-+	    {
-+                return 0;
-+	    }
-+	}
- #if defined(SUPPORT_REALMS)
- 	if (cmd == RTM_DELROUTE)
- 		tag = dplane_ctx_get_old_tag(ctx);
--- 
-2.25.1
-
diff --git a/src/sonic-frr/patch/0064-SRv6-BGP-SID-reachability.patch b/src/sonic-frr/patch/0064-SRv6-BGP-SID-reachability.patch
deleted file mode 100644
index 65a15f4b65f..00000000000
--- a/src/sonic-frr/patch/0064-SRv6-BGP-SID-reachability.patch
+++ /dev/null
@@ -1,845 +0,0 @@
-From f49fc7682f3e1f0e82181d03a1b4f9af3d955abb Mon Sep 17 00:00:00 2001
-
-From: Dmytro Shytyi <dmytro.shytyi@6wind.com>
-
-Subject: [PATCH 1/4] doc: bgp ipv4 l3vpn sid reachability
-
-BGP IPv4 L3VPN with SRv6 SID reachability example
-provided in the documentation
-
-Signed-off-by: Dmytro Shytyi <dmytro.shytyi@6wind.com>
----
- bgpd/bgp_nht.c                                     |   52 ++++--
- doc/user/bgp.rst                                   |   25 +++
- .../bgp_srv6_sid_reachability/c11/bgpd.conf        |    0 
- .../bgp_srv6_sid_reachability/c11/staticd.conf     |    4 
- .../bgp_srv6_sid_reachability/c11/zebra.conf       |    6 +
- .../bgp_srv6_sid_reachability/c12/bgpd.conf        |    0 
- .../bgp_srv6_sid_reachability/c12/staticd.conf     |    4 
- .../bgp_srv6_sid_reachability/c12/zebra.conf       |    6 +
- .../bgp_srv6_sid_reachability/c21/bgpd.conf        |    0 
- .../bgp_srv6_sid_reachability/c21/staticd.conf     |    4 
- .../bgp_srv6_sid_reachability/c21/zebra.conf       |    6 +
- .../bgp_srv6_sid_reachability/c22/bgpd.conf        |    0 
- .../bgp_srv6_sid_reachability/c22/staticd.conf     |    5 +
- .../bgp_srv6_sid_reachability/c22/zebra.conf       |    9 +
- .../bgp_srv6_sid_reachability/c31/bgpd.conf        |    0 
- .../bgp_srv6_sid_reachability/c31/staticd.conf     |    4 
- .../bgp_srv6_sid_reachability/c31/zebra.conf       |    6 +
- .../bgp_srv6_sid_reachability/c32/bgpd.conf        |    0 
- .../bgp_srv6_sid_reachability/c32/staticd.conf     |    4 
- .../bgp_srv6_sid_reachability/c32/zebra.conf       |    6 +
- .../bgp_srv6_sid_reachability/r1/bgpd.conf         |   61 +++++++
- .../bgp_srv6_sid_reachability/r1/staticd.conf      |    4 
- .../bgp_srv6_sid_reachability/r1/zebra.conf        |   32 ++++
- .../bgp_srv6_sid_reachability/r2/bgpd.conf         |   50 ++++++
- .../bgp_srv6_sid_reachability/r2/staticd.conf      |    4 
- .../bgp_srv6_sid_reachability/r2/zebra.conf        |   29 +++
- .../bgp_srv6_sid_reachability/r3/bgpd.conf         |   50 ++++++
- .../bgp_srv6_sid_reachability/r3/staticd.conf      |    6 +
- .../bgp_srv6_sid_reachability/r3/zebra.conf        |   29 +++
- .../test_bgp_srv6_sid_reachability.py              |  169 ++++++++++++++++++++
- 30 files changed, 557 insertions(+), 18 deletions(-)
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c11/bgpd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c11/staticd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c11/zebra.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c12/bgpd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c12/staticd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c12/zebra.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c21/bgpd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c21/staticd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c21/zebra.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c22/bgpd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c22/staticd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c22/zebra.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c31/bgpd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c31/staticd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c31/zebra.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c32/bgpd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c32/staticd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/c32/zebra.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r1/bgpd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r1/staticd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r1/zebra.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r2/bgpd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r2/staticd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r2/zebra.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r3/bgpd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r3/staticd.conf
- create mode 100644 tests/topotests/bgp_srv6_sid_reachability/r3/zebra.conf
- create mode 100755 tests/topotests/bgp_srv6_sid_reachability/test_bgp_srv6_sid_reachability.py
-
-diff --git a/bgpd/bgp_nht.c b/bgpd/bgp_nht.c
-index e2c103bb5..6f77d6201 100644
---- a/bgpd/bgp_nht.c
-+++ b/bgpd/bgp_nht.c
-@@ -116,24 +116,36 @@ static int bgp_isvalid_nexthop_for_mplsovergre(struct bgp_nexthop_cache *bnc,
- static int bgp_isvalid_nexthop_for_mpls(struct bgp_nexthop_cache *bnc,
- 					struct bgp_path_info *path)
- {
-+	return (bnc && (bnc->nexthop_num > 0 &&
-+			(CHECK_FLAG(path->flags, BGP_PATH_ACCEPT_OWN) ||
-+			 CHECK_FLAG(bnc->flags, BGP_NEXTHOP_LABELED_VALID) ||
-+			 bgp_isvalid_nexthop_for_ebgp(bnc, path) ||
-+			 bgp_isvalid_nexthop_for_mplsovergre(bnc, path))));
-+}
-+
-+static bool bgp_isvalid_nexthop_for_l3vpn(struct bgp_nexthop_cache *bnc,
-+					  struct bgp_path_info *path)
-+{
-+	if (bgp_zebra_num_connects() == 0)
-+		return 1;
-+
-+	if (path->attr->srv6_l3vpn || path->attr->srv6_vpn) {
-+		/* In the case of SRv6-VPN, we need to track the reachability to the
-+		 * SID (in other words, IPv6 address). We check that the SID is
-+		 * available in the BGP update; then if it is available, we check
-+		 * for the nexthop reachability.
-+		 */
-+		if (bnc && (bnc->nexthop_num > 0 && bgp_isvalid_nexthop(bnc)))
-+			return 1;
-+		return 0;
-+	}
- 	/*
--	 * - In the case of MPLS-VPN, the label is learned from LDP or other
-+	 * In the case of MPLS-VPN, the label is learned from LDP or other
- 	 * protocols, and nexthop tracking is enabled for the label.
- 	 * The value is recorded as BGP_NEXTHOP_LABELED_VALID.
--	 * - In the case of SRv6-VPN, we need to track the reachability to the
--	 * SID (in other words, IPv6 address). As in MPLS, we need to record
--	 * the value as BGP_NEXTHOP_SID_VALID. However, this function is
--	 * currently not implemented, and this function assumes that all
--	 * Transit routes for SRv6-VPN are valid.
- 	 * - Otherwise check for mpls-gre acceptance
- 	 */
--	return (bgp_zebra_num_connects() == 0 ||
--		(bnc && (bnc->nexthop_num > 0 &&
--			 (CHECK_FLAG(path->flags, BGP_PATH_ACCEPT_OWN) ||
--			  CHECK_FLAG(bnc->flags, BGP_NEXTHOP_LABELED_VALID) ||
--			  bnc->bgp->srv6_enabled ||
--			  bgp_isvalid_nexthop_for_ebgp(bnc, path) ||
--			  bgp_isvalid_nexthop_for_mplsovergre(bnc, path)))));
-+	return bgp_isvalid_nexthop_for_mpls(bnc, path);
- }
- 
- static void bgp_unlink_nexthop_check(struct bgp_nexthop_cache *bnc)
-@@ -496,7 +508,7 @@ int bgp_find_or_add_nexthop(struct bgp *bgp_route, struct bgp *bgp_nexthop,
- 	else if (safi == SAFI_UNICAST && pi &&
- 		 pi->sub_type == BGP_ROUTE_IMPORTED && pi->extra &&
- 		 pi->extra->num_labels && !bnc->is_evpn_gwip_nexthop)
--		return bgp_isvalid_nexthop_for_mpls(bnc, pi);
-+		return bgp_isvalid_nexthop_for_l3vpn(bnc, pi);
- 	else if (safi == SAFI_MPLS_VPN && pi &&
- 		 pi->sub_type != BGP_ROUTE_IMPORTED)
- 		/* avoid not redistributing mpls vpn routes */
-@@ -1045,8 +1057,11 @@ static int make_prefix(int afi, struct bgp_path_info *pi, struct prefix *p)
- 		break;
- 	case AFI_IP6:
- 		p->family = AF_INET6;
--
--		if (is_bgp_static) {
-+		if (pi->attr && pi->attr->srv6_l3vpn) {
-+			IPV6_ADDR_COPY(&(p->u.prefix6),
-+				       &(pi->attr->srv6_l3vpn->sid));
-+			p->prefixlen = IPV6_MAX_BITLEN;
-+		} else if (is_bgp_static) {
- 			p->u.prefix6 = p_orig->u.prefix6;
- 			p->prefixlen = p_orig->prefixlen;
- 		} else {
-@@ -1294,8 +1309,9 @@ void evaluate_paths(struct bgp_nexthop_cache *bnc)
- 		    && (path->attr->evpn_overlay.type
- 			!= OVERLAY_INDEX_GATEWAY_IP)) {
- 			bnc_is_valid_nexthop =
--				bgp_isvalid_nexthop_for_mpls(bnc, path) ? true
--									: false;
-+				bgp_isvalid_nexthop_for_l3vpn(bnc, path)
-+					? true
-+					: false;
- 		} else if (safi == SAFI_MPLS_VPN &&
- 			   path->sub_type != BGP_ROUTE_IMPORTED) {
- 			/* avoid not redistributing mpls vpn routes */
-diff --git a/doc/user/bgp.rst b/doc/user/bgp.rst
-index 99d2a8c35..1b7039b23 100644
---- a/doc/user/bgp.rst
-+++ b/doc/user/bgp.rst
-@@ -3201,6 +3201,31 @@ L3VPN SRv6
-    Specify the SRv6 locator to be used for SRv6 L3VPN. The Locator name must
-    be set in zebra, but user can set it in any order.
- 
-+L3VPN SRv6 SID reachability
-+---------------------------
-+
-+In the context of IPv4 L3VPN over SRv6 specific usecase, 2001:db8:12::2
-+is the peer IPv6 address of r2, and 2001:db8:2:2:: is the SRv6 SID
-+advertised by router r2 for prefix P. On r1, the SID reachability is
-+checked in order to install the prefix P. The below output indicates
-+that the 2001:db8:2:2:: prefix is valid.
-+
-+
-+.. code-block:: frr
-+
-+   r1# show bgp nexthop detail 
-+   Current BGP nexthop cache:
-+    2001:db8:2:2:: valid [IGP metric 0], #paths 4
-+     gate 2001:db8:12::2, if eth0
-+     Last update: Tue Nov 14 10:36:28 2023
-+     Paths:
-+       1/1 192.168.2.0/24 VRF vrf10 flags 0x4018
-+       1/3 192.168.2.0/24 RD 65002:10 VRF default flags 0x418
-+    2001:db8:12::2 valid [IGP metric 0], #paths 0, peer 2001:db8:12::2
-+     if eth0
-+     Last update: Tue Nov 14 10:36:26 2023
-+     Paths:
-+
- General configuration
- ^^^^^^^^^^^^^^^^^^^^^
- 
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c11/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c11/bgpd.conf
-new file mode 100644
-index 000000000..e69de29bb
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c11/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c11/staticd.conf
-new file mode 100644
-index 000000000..bcf5a0499
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c11/staticd.conf
-@@ -0,0 +1,4 @@
-+!
-+ip route 0.0.0.0/0 192.168.1.254
-+ipv6 route ::/0 2001:1::ffff
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c11/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c11/zebra.conf
-new file mode 100644
-index 000000000..0615cf9a9
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c11/zebra.conf
-@@ -0,0 +1,6 @@
-+hostname c11
-+!
-+interface eth0
-+ ip address 192.168.1.1/24
-+ ipv6 address 2001:1::1/64
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c12/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c12/bgpd.conf
-new file mode 100644
-index 000000000..e69de29bb
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c12/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c12/staticd.conf
-new file mode 100644
-index 000000000..bcf5a0499
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c12/staticd.conf
-@@ -0,0 +1,4 @@
-+!
-+ip route 0.0.0.0/0 192.168.1.254
-+ipv6 route ::/0 2001:1::ffff
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c12/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c12/zebra.conf
-new file mode 100644
-index 000000000..18985aa38
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c12/zebra.conf
-@@ -0,0 +1,6 @@
-+hostname c12
-+!
-+interface eth0
-+ ip address 192.168.1.1/24
-+ ipv6 address 2001:1::1/64
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c21/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c21/bgpd.conf
-new file mode 100644
-index 000000000..e69de29bb
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c21/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c21/staticd.conf
-new file mode 100644
-index 000000000..608e60060
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c21/staticd.conf
-@@ -0,0 +1,4 @@
-+!
-+ip route 0.0.0.0/0 192.168.2.254
-+ipv6 route ::/0 2001:2::ffff
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c21/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c21/zebra.conf
-new file mode 100644
-index 000000000..b8b70ac96
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c21/zebra.conf
-@@ -0,0 +1,6 @@
-+hostname c21
-+!
-+interface eth0
-+ ip address 192.168.2.1/24
-+ ipv6 address 2001:2::1/64
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c22/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c22/bgpd.conf
-new file mode 100644
-index 000000000..e69de29bb
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c22/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c22/staticd.conf
-new file mode 100644
-index 000000000..277aae998
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c22/staticd.conf
-@@ -0,0 +1,5 @@
-+
-+!
-+ip route 0.0.0.0/0 192.168.2.254
-+ipv6 route ::/0 2001:2::ffff
-+!
-\ No newline at end of file
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c22/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c22/zebra.conf
-new file mode 100644
-index 000000000..cc764cc35
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c22/zebra.conf
-@@ -0,0 +1,9 @@
-+hostname c22
-+!
-+interface eth0
-+ ip address 192.168.2.1/24
-+ ipv6 address 2001:2::1/64
-+!
-+ip route 0.0.0.0/0 192.168.2.254
-+ipv6 route ::/0 2001:2::ffff
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c31/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c31/bgpd.conf
-new file mode 100644
-index 000000000..e69de29bb
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c31/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c31/staticd.conf
-new file mode 100644
-index 000000000..0c88575ab
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c31/staticd.conf
-@@ -0,0 +1,4 @@
-+!
-+ip route 0.0.0.0/0 192.168.3.254
-+ipv6 route ::/0 2001:3::ffff
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c31/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c31/zebra.conf
-new file mode 100644
-index 000000000..3f75641ea
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c31/zebra.conf
-@@ -0,0 +1,6 @@
-+hostname c31
-+!
-+interface eth0
-+ ip address 192.168.3.1/24
-+ ipv6 address 2001:3::1/64
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c32/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/c32/bgpd.conf
-new file mode 100644
-index 000000000..e69de29bb
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c32/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/c32/staticd.conf
-new file mode 100644
-index 000000000..0c88575ab
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c32/staticd.conf
-@@ -0,0 +1,4 @@
-+!
-+ip route 0.0.0.0/0 192.168.3.254
-+ipv6 route ::/0 2001:3::ffff
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/c32/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/c32/zebra.conf
-new file mode 100644
-index 000000000..c06a7d19f
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/c32/zebra.conf
-@@ -0,0 +1,6 @@
-+hostname c32
-+!
-+interface eth0
-+ ip address 192.168.3.1/24
-+ ipv6 address 2001:3::1/64
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/r1/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/r1/bgpd.conf
-new file mode 100644
-index 000000000..573dbe095
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/r1/bgpd.conf
-@@ -0,0 +1,61 @@
-+frr defaults traditional
-+!
-+hostname r1
-+password zebra
-+!
-+log commands
-+!
-+router bgp 65001
-+ bgp router-id 192.0.2.1
-+ no bgp ebgp-requires-policy
-+ no bgp default ipv4-unicast
-+ neighbor 2001:db8:12::2 remote-as 65002
-+ neighbor 2001:db8:12::2 timers 3 10
-+ neighbor 2001:db8:12::2 timers connect 1
-+ neighbor 2001:db8:12::2 capability extended-nexthop
-+ neighbor 2001:db8:13::3 remote-as 65001
-+ neighbor 2001:db8:13::3 timers 3 10
-+ neighbor 2001:db8:13::3 timers connect 1
-+ neighbor 2001:db8:13::3 capability extended-nexthop
-+ !
-+ segment-routing srv6
-+  locator default
-+ !
-+ address-family ipv4 vpn
-+  neighbor 2001:db8:12::2 activate
-+  neighbor 2001:db8:13::3 activate
-+ exit-address-family
-+ !
-+!
-+router bgp 65001 vrf vrf10
-+ bgp router-id 192.0.2.1
-+ !
-+ address-family ipv4 unicast
-+  redistribute connected
-+  sid vpn export 1
-+  rd vpn export 65001:10
-+  rt vpn both 0:10
-+  import vpn
-+  export vpn
-+ exit-address-family
-+ !
-+!
-+router bgp 65001 vrf vrf20
-+ bgp router-id 192.0.2.1
-+ !
-+ address-family ipv4 unicast
-+  redistribute connected
-+  sid vpn export 2
-+  rd vpn export 65001:20
-+  rt vpn both 0:20
-+  import vpn
-+  export vpn
-+ exit-address-family
-+ !
-+!
-+interface eth0
-+ mpls bgp forwarding
-+!
-+interface eth1
-+ mpls bgp forwarding
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/r1/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/r1/staticd.conf
-new file mode 100644
-index 000000000..49b64fd7a
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/r1/staticd.conf
-@@ -0,0 +1,4 @@
-+!
-+ipv6 route 2001:db8:2:2::/64 2001:db8:12::2
-+ipv6 route 2001:db8:3:3::/64 2001:db8:13::3
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/r1/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/r1/zebra.conf
-new file mode 100644
-index 000000000..79dbf9559
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/r1/zebra.conf
-@@ -0,0 +1,32 @@
-+log file zebra.log
-+!
-+hostname r1
-+!
-+interface lo
-+ ipv6 address 2001:db8:1:1::1/128
-+!
-+interface eth0
-+ ipv6 address 2001:db8:12::1/64
-+!
-+interface eth1
-+ ipv6 address 2001:db8:13::1/64
-+!
-+interface eth2 vrf vrf10
-+ ip address 192.168.1.254/24
-+!
-+interface eth3 vrf vrf20
-+ ip address 192.168.1.254/24
-+!
-+segment-routing
-+ srv6
-+  locators
-+   locator default
-+    prefix 2001:db8:1:1::/64
-+  !
-+ !
-+!
-+ip forwarding
-+ipv6 forwarding
-+!
-+line vty
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/r2/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/r2/bgpd.conf
-new file mode 100644
-index 000000000..723d6fca2
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/r2/bgpd.conf
-@@ -0,0 +1,50 @@
-+frr defaults traditional
-+!
-+hostname r2
-+password zebra
-+!
-+log commands
-+!
-+router bgp 65002
-+ bgp router-id 192.0.2.2
-+ no bgp ebgp-requires-policy
-+ no bgp default ipv4-unicast
-+ neighbor 2001:db8:12::1 remote-as 65001
-+ neighbor 2001:db8:12::1 timers 3 10
-+ neighbor 2001:db8:12::1 timers connect 1
-+ neighbor 2001:db8:12::1 capability extended-nexthop
-+ !
-+ segment-routing srv6
-+  locator default
-+ !
-+ address-family ipv4 vpn
-+  neighbor 2001:db8:12::1 activate
-+ exit-address-family
-+ !
-+!
-+router bgp 65002 vrf vrf10
-+ bgp router-id 192.0.2.2
-+ !
-+ address-family ipv4 unicast
-+  redistribute connected
-+  sid vpn export 1
-+  rd vpn export 65002:10
-+  rt vpn both 0:10
-+  import vpn
-+  export vpn
-+ exit-address-family
-+ !
-+!
-+router bgp 65002 vrf vrf20
-+ bgp router-id 192.0.2.2
-+ !
-+ address-family ipv4 unicast
-+  redistribute connected
-+  sid vpn export 2
-+  rd vpn export 65002:20
-+  rt vpn both 0:20
-+  import vpn
-+  export vpn
-+ exit-address-family
-+ !
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/r2/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/r2/staticd.conf
-new file mode 100644
-index 000000000..8d80c1ead
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/r2/staticd.conf
-@@ -0,0 +1,4 @@
-+!
-+ipv6 route 2001:db8:1:1::/64 2001:db8:12::1
-+ipv6 route 2001:db8:3:3::/64 2001:db8:12::1
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/r2/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/r2/zebra.conf
-new file mode 100644
-index 000000000..09a65b989
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/r2/zebra.conf
-@@ -0,0 +1,29 @@
-+log file zebra.log
-+!
-+hostname r2
-+!
-+interface lo
-+ ipv6 address 2001:db8:2:2::1/128
-+!
-+interface eth0
-+ ipv6 address 2001:db8:12::2/64
-+!
-+interface eth1 vrf vrf10
-+ ip address 192.168.2.254/24
-+!
-+interface eth2 vrf vrf20
-+ ip address 192.168.2.254/24
-+!
-+segment-routing
-+ srv6
-+  locators
-+   locator default
-+    prefix 2001:db8:2:2::/64
-+  !
-+ !
-+!
-+ip forwarding
-+ipv6 forwarding
-+!
-+line vty
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/r3/bgpd.conf b/tests/topotests/bgp_srv6_sid_reachability/r3/bgpd.conf
-new file mode 100644
-index 000000000..c412cb6d2
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/r3/bgpd.conf
-@@ -0,0 +1,50 @@
-+frr defaults traditional
-+!
-+hostname r2
-+password zebra
-+!
-+log commands
-+!
-+router bgp 65001
-+ bgp router-id 192.0.2.3
-+ no bgp ebgp-requires-policy
-+ no bgp default ipv4-unicast
-+ neighbor 2001:db8:13::1 remote-as 65001
-+ neighbor 2001:db8:13::1 timers 3 10
-+ neighbor 2001:db8:13::1 timers connect 1
-+ neighbor 2001:db8:13::1 capability extended-nexthop
-+ !
-+ segment-routing srv6
-+  locator default
-+ !
-+ address-family ipv4 vpn
-+  neighbor 2001:db8:13::1 activate
-+ exit-address-family
-+ !
-+!
-+router bgp 65001 vrf vrf10
-+ bgp router-id 192.0.2.3
-+ !
-+ address-family ipv4 unicast
-+  redistribute connected
-+  sid vpn export 1
-+  rd vpn export 65001:10
-+  rt vpn both 0:10
-+  import vpn
-+  export vpn
-+ exit-address-family
-+ !
-+!
-+router bgp 65001 vrf vrf20
-+ bgp router-id 192.0.2.2
-+ !
-+ address-family ipv4 unicast
-+  redistribute connected
-+  sid vpn export 2
-+  rd vpn export 65001:20
-+  rt vpn both 0:20
-+  import vpn
-+  export vpn
-+ exit-address-family
-+ !
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/r3/staticd.conf b/tests/topotests/bgp_srv6_sid_reachability/r3/staticd.conf
-new file mode 100644
-index 000000000..9d672d51b
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/r3/staticd.conf
-@@ -0,0 +1,6 @@
-+!
-+ipv6 route 2001:db8:12::/64 2001:db8:13::1
-+!
-+ipv6 route 2001:db8:1:1::/64 2001:db8:13::1
-+ipv6 route 2001:db8:2:2::/64 2001:db8:13::1
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/r3/zebra.conf b/tests/topotests/bgp_srv6_sid_reachability/r3/zebra.conf
-new file mode 100644
-index 000000000..a20cb76a7
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/r3/zebra.conf
-@@ -0,0 +1,29 @@
-+log file zebra.log
-+!
-+hostname r2
-+!
-+interface lo
-+ ipv6 address 2001:db8:3:3::1/128
-+!
-+interface eth0
-+ ipv6 address 2001:db8:13::3/64
-+!
-+interface eth1 vrf vrf10
-+ ip address 192.168.3.254/24
-+!
-+interface eth2 vrf vrf20
-+ ip address 192.168.3.254/24
-+!
-+segment-routing
-+ srv6
-+  locators
-+   locator default
-+    prefix 2001:db8:3:3::/64
-+  !
-+ !
-+!
-+ip forwarding
-+ipv6 forwarding
-+!
-+line vty
-+!
-diff --git a/tests/topotests/bgp_srv6_sid_reachability/test_bgp_srv6_sid_reachability.py b/tests/topotests/bgp_srv6_sid_reachability/test_bgp_srv6_sid_reachability.py
-new file mode 100755
-index 000000000..92315bce0
---- /dev/null
-+++ b/tests/topotests/bgp_srv6_sid_reachability/test_bgp_srv6_sid_reachability.py
-@@ -0,0 +1,169 @@
-+#!/usr/bin/env python
-+# SPDX-License-Identifier: ISC
-+
-+#
-+# Part of NetDEF Topology Tests
-+#
-+# Copyright (c) 2023 by 6WIND
-+#
-+
-+import os
-+import re
-+import sys
-+import json
-+import functools
-+import pytest
-+
-+CWD = os.path.dirname(os.path.realpath(__file__))
-+sys.path.append(os.path.join(CWD, "../"))
-+
-+# pylint: disable=C0413
-+# Import topogen and topotest helpers
-+from lib import topotest
-+from lib.topogen import Topogen, TopoRouter, get_topogen
-+from lib.topolog import logger
-+from lib.common_config import required_linux_kernel_version
-+from lib.checkping import check_ping
-+
-+pytestmark = [pytest.mark.bgpd, pytest.mark.staticd]
-+
-+
-+def build_topo(tgen):
-+    tgen.add_router("r1")
-+    tgen.add_router("r2")
-+    tgen.add_router("r3")
-+
-+    tgen.add_router("c11")
-+    tgen.add_router("c12")
-+    tgen.add_router("c21")
-+    tgen.add_router("c22")
-+    tgen.add_router("c31")
-+    tgen.add_router("c32")
-+
-+    tgen.add_link(tgen.gears["r1"], tgen.gears["r2"], "eth0", "eth0")
-+    tgen.add_link(tgen.gears["r1"], tgen.gears["r3"], "eth1", "eth0")
-+    tgen.add_link(tgen.gears["r1"], tgen.gears["c11"], "eth2", "eth0")
-+    tgen.add_link(tgen.gears["r1"], tgen.gears["c12"], "eth3", "eth0")
-+    tgen.add_link(tgen.gears["r2"], tgen.gears["c21"], "eth1", "eth0")
-+    tgen.add_link(tgen.gears["r2"], tgen.gears["c22"], "eth2", "eth0")
-+    tgen.add_link(tgen.gears["r3"], tgen.gears["c31"], "eth1", "eth0")
-+    tgen.add_link(tgen.gears["r3"], tgen.gears["c32"], "eth2", "eth0")
-+
-+
-+def setup_module(mod):
-+    result = required_linux_kernel_version("5.15")
-+    if result is not True:
-+        pytest.skip("Kernel requirements are not met")
-+
-+    tgen = Topogen(build_topo, mod.__name__)
-+    tgen.start_topology()
-+
-+    for rname, router in tgen.routers().items():
-+        router.load_config(
-+            TopoRouter.RD_ZEBRA, os.path.join(CWD, "{}/zebra.conf".format(rname))
-+        )
-+        router.load_config(
-+            TopoRouter.RD_STATIC, os.path.join(CWD, "{}/staticd.conf".format(rname))
-+        )
-+        router.load_config(
-+            TopoRouter.RD_BGP, os.path.join(CWD, "{}/bgpd.conf".format(rname))
-+        )
-+
-+    tgen.gears["r1"].run("sysctl net.vrf.strict_mode=1")
-+    tgen.gears["r1"].run("ip link add vrf10 type vrf table 10")
-+    tgen.gears["r1"].run("ip link set vrf10 up")
-+    tgen.gears["r1"].run("ip link add vrf20 type vrf table 20")
-+    tgen.gears["r1"].run("ip link set vrf20 up")
-+    tgen.gears["r1"].run("ip link set eth2 master vrf10")
-+    tgen.gears["r1"].run("ip link set eth3 master vrf20")
-+
-+    tgen.gears["r2"].run("sysctl net.vrf.strict_mode=1")
-+    tgen.gears["r2"].run("ip link add vrf10 type vrf table 10")
-+    tgen.gears["r2"].run("ip link set vrf10 up")
-+    tgen.gears["r2"].run("ip link add vrf20 type vrf table 20")
-+    tgen.gears["r2"].run("ip link set vrf20 up")
-+    tgen.gears["r2"].run("ip link set eth1 master vrf10")
-+    tgen.gears["r2"].run("ip link set eth2 master vrf20")
-+
-+    tgen.gears["r3"].run("sysctl net.vrf.strict_mode=1")
-+    tgen.gears["r3"].run("ip link add vrf10 type vrf table 10")
-+    tgen.gears["r3"].run("ip link set vrf10 up")
-+    tgen.gears["r3"].run("ip link add vrf20 type vrf table 20")
-+    tgen.gears["r3"].run("ip link set vrf20 up")
-+    tgen.gears["r3"].run("ip link set eth1 master vrf10")
-+    tgen.gears["r3"].run("ip link set eth2 master vrf20")
-+
-+    tgen.start_router()
-+
-+
-+def teardown_module(mod):
-+    tgen = get_topogen()
-+    tgen.stop_topology()
-+
-+
-+def test_ping():
-+    tgen = get_topogen()
-+
-+    check_ping("c11", "192.168.2.1", True, 10, 1)
-+    check_ping("c11", "192.168.3.1", True, 10, 1)
-+    check_ping("c12", "192.168.2.1", True, 10, 1)
-+    check_ping("c12", "192.168.3.1", True, 10, 1)
-+    check_ping("c21", "192.168.3.1", True, 10, 1)
-+    check_ping("c22", "192.168.3.1", True, 10, 1)
-+
-+
-+def test_sid_unreachable_nht():
-+    get_topogen().gears["r1"].vtysh_cmd(
-+        """
-+        configure terminal
-+         no ipv6 route 2001:db8:2:2::/64 2001:db8:12::2
-+        """
-+    )
-+    check_ping("c11", "192.168.2.1", False, 10, 1)
-+
-+
-+def test_sid_reachable_again_nht():
-+    get_topogen().gears["r1"].vtysh_cmd(
-+        """
-+        configure terminal
-+         ipv6 route 2001:db8:2:2::/64 2001:db8:12::2
-+        """
-+    )
-+    check_ping("c11", "192.168.2.1", True, 10, 1)
-+
-+
-+def test_sid_unreachable_bgp_update():
-+    get_topogen().gears["r2"].vtysh_cmd(
-+        """
-+        configure terminal
-+        router bgp 65002
-+         no segment-routing srv6
-+        exit
-+        router bgp 65002 vrf vrf10
-+         address-family ipv4 unicast
-+          no sid vpn export 1
-+        """
-+    )
-+    check_ping("c11", "192.168.2.1", False, 10, 1)
-+
-+
-+def test_sid_reachable_again_bgp_update():
-+    get_topogen().gears["r2"].vtysh_cmd(
-+        """
-+        configure terminal
-+        router bgp 65002
-+         segment-routing srv6
-+          locator default
-+          exit
-+        exit
-+        router bgp 65002 vrf vrf10
-+         address-family ipv4 unicast
-+          sid vpn export 1
-+        """
-+    )
-+    check_ping("c11", "192.168.2.1", True, 10, 1)
-+
-+
-+if __name__ == "__main__":
-+    args = ["-s"] + sys.argv[1:]
-+    sys.exit(pytest.main(args))
diff --git a/src/sonic-frr/patch/0065-zebra-display-srv6-encapsulation-source-address-when-configured.patch b/src/sonic-frr/patch/0065-zebra-display-srv6-encapsulation-source-address-when-configured.patch
deleted file mode 100644
index 431d9e07ad9..00000000000
--- a/src/sonic-frr/patch/0065-zebra-display-srv6-encapsulation-source-address-when-configured.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 890b67d7a9eb6ee9cbb6b5623934ad4d0b781232 Mon Sep 17 00:00:00 2001
-
-From: Philippe Guibert <philippe.guibert@6wind.com>
-
-Subject: [PATCH] zebra: display srv6 encapsulation source-address when
- configured
-
-The 'show running-config' does not display the ipv6 source address
-when a locator is not configured. Fix this by systematically displaying
-the ipv6 source address.
-
-Fixes: 6a0956169b31 ("zebra: Add encap source address to SRv6 config write function")
-
-Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
----
- zebra/zebra_srv6_vty.c |   12 +++++++++++-
- 1 file changed, 11 insertions(+), 1 deletion(-)
-
-diff --git a/zebra/zebra_srv6_vty.c b/zebra/zebra_srv6_vty.c
-index c5b850599..d5cd30e64 100644
---- a/zebra/zebra_srv6_vty.c
-+++ b/zebra/zebra_srv6_vty.c
-@@ -475,16 +475,24 @@ static int zebra_sr_config(struct vty *vty)
- 	struct listnode *node;
- 	struct srv6_locator *locator;
- 	char str[256];
-+	bool display_source_srv6 = false;
-+
-+	if (srv6 && !IPV6_ADDR_SAME(&srv6->encap_src_addr, &in6addr_any))
-+		display_source_srv6 = true;
- 
- 	vty_out(vty, "!\n");
--	if (zebra_srv6_is_enable()) {
-+	if (display_source_srv6 || zebra_srv6_is_enable()) {
- 		vty_out(vty, "segment-routing\n");
- 		vty_out(vty, " srv6\n");
-+	}
-+	if (display_source_srv6) {
- 		if (!IPV6_ADDR_SAME(&srv6->encap_src_addr, &in6addr_any)) {
- 			vty_out(vty, "  encapsulation\n");
- 			vty_out(vty, "   source-address %pI6\n",
- 				&srv6->encap_src_addr);
- 		}
-+	}
-+	if (zebra_srv6_is_enable()) {
- 		vty_out(vty, "  locators\n");
- 		for (ALL_LIST_ELEMENTS_RO(srv6->locators, node, locator)) {
- 			inet_ntop(AF_INET6, &locator->prefix.prefix,
-@@ -514,6 +522,8 @@ static int zebra_sr_config(struct vty *vty)
- 		vty_out(vty, "  !\n");
- 		vty_out(vty, " exit\n");
- 		vty_out(vty, " !\n");
-+	}
-+	if (display_source_srv6 || zebra_srv6_is_enable()) {
- 		vty_out(vty, "exit\n");
- 		vty_out(vty, "!\n");
- 	}
diff --git a/src/sonic-frr/patch/0066-lib-fix-srv6-locator-flags-propagated-to-isis.patch b/src/sonic-frr/patch/0066-lib-fix-srv6-locator-flags-propagated-to-isis.patch
deleted file mode 100644
index b872ff9cbf8..00000000000
--- a/src/sonic-frr/patch/0066-lib-fix-srv6-locator-flags-propagated-to-isis.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 03d2ad01a4fd4aa6df4b1ec64249fb391405a61f Mon Sep 17 00:00:00 2001
-
-From: Philippe Guibert <philippe.guibert@6wind.com>
-
-Subject: [PATCH] lib: fix srv6 locator flags propagated to isis
-
-When usid is not used, the isis_srv6_topo1 test does not work.
-The SID prefix allocated by isis is different when the usid
-flags is set or not. When the flags is not transmitted to isis,
-the SID allocated is supposed to be a 128 bit mask length SID,
-which is not what the isis_srv6_topo1 test is supposed to obtain.
-
-Fix this by exchanging the flags locator value in the zclient api.
-
-Fixes: 9b7491e1fc04 ("lib: Add support for flags to the SRv6 locator")
-
-Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
----
- lib/zclient.c |    2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/lib/zclient.c b/lib/zclient.c
-index 64515c754..269c3e9ba 100644
---- a/lib/zclient.c
-+++ b/lib/zclient.c
-@@ -1125,6 +1125,7 @@ int zapi_srv6_locator_encode(struct stream *s, const struct srv6_locator *l)
- 	stream_put(s, l->name, strlen(l->name));
- 	stream_putw(s, l->prefix.prefixlen);
- 	stream_put(s, &l->prefix.prefix, sizeof(l->prefix.prefix));
-+	stream_putc(s, l->flags);
- 	return 0;
- }
- 
-@@ -1140,6 +1141,7 @@ int zapi_srv6_locator_decode(struct stream *s, struct srv6_locator *l)
- 	STREAM_GETW(s, l->prefix.prefixlen);
- 	STREAM_GET(&l->prefix.prefix, s, sizeof(l->prefix.prefix));
- 	l->prefix.family = AF_INET6;
-+	STREAM_GETC(s, l->flags);
- 	return 0;
- 
- stream_failure:
diff --git a/src/sonic-frr/patch/0067-Add-support-for-SRv6-SID-Manager.patch b/src/sonic-frr/patch/0067-Add-support-for-SRv6-SID-Manager.patch
deleted file mode 100644
index 06373a63264..00000000000
--- a/src/sonic-frr/patch/0067-Add-support-for-SRv6-SID-Manager.patch
+++ /dev/null
@@ -1,4461 +0,0 @@
-From 021386a34eb49893ce6b7df16c2fe1096a8fedf6 Mon Sep 17 00:00:00 2001
-
-From: Carmine Scarpitta <cscarpit@cisco.com>
-
-Subject: [PATCH 01/25] lib: Add support for SRv6 SID formats
-
-Add functionalities to manage SRv6 SID formats (allocate / free).
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- doc/user/zebra.rst     |   84 ++
- lib/command.h          |    3 
- lib/log.c              |    6 
- lib/srv6.c             |  187 ++++
- lib/srv6.h             |  134 +++
- lib/zclient.c          |  194 ++++
- lib/zclient.h          |   51 +
- vtysh/vtysh.c          |   82 ++
- zebra/zapi_msg.c       |  162 ++++
- zebra/zapi_msg.h       |    8 
- zebra/zebra_errors.c   |   12 
- zebra/zebra_errors.h   |    2 
- zebra/zebra_srv6.c     | 2094 +++++++++++++++++++++++++++++++++++++++++++++++-
- zebra/zebra_srv6.h     |  247 ++++++
- zebra/zebra_srv6_vty.c |  593 +++++++++++++-
- 15 files changed, 3768 insertions(+), 91 deletions(-)
-
-diff --git a/doc/user/zebra.rst b/doc/user/zebra.rst
-index 30b020425..172a8332f 100644
---- a/doc/user/zebra.rst
-+++ b/doc/user/zebra.rst
-@@ -1021,6 +1021,35 @@ and this section also helps that case.
-       !
-    ...
- 
-+.. clicmd:: format NAME
-+
-+   Specify the SID allocation schema for the SIDs allocated from this locator. Currently,
-+   FRR supports supports the following allocation schemas:
-+
-+   - `usid-f3216`
-+   - `uncompressed`
-+
-+::
-+
-+   router# configure terminal
-+   router(config)# segment-routinig
-+   router(config-sr)# srv6
-+   router(config-srv6)# locators
-+   router(config-srv6-locators)# locator loc1
-+   router(config-srv6-locator)# prefix fc00:0:1::/48
-+   router(config-srv6-locator)# format usid-f3216
-+
-+   router(config-srv6-locator)# show run
-+   ...
-+   segment-routing
-+    srv6
-+     locators
-+      locator loc1
-+       prefix fc00:0:1::/48
-+       format usid-f3216
-+      !
-+   ...
-+
- .. clicmd:: encapsulation
- 
-    Configure parameters for SRv6 encapsulation.
-@@ -1029,6 +1058,61 @@ and this section also helps that case.
- 
-    Configure the source address of the outer encapsulating IPv6 header.
- 
-+.. clicmd:: formats
-+
-+   Configure SRv6 SID formats.
-+
-+.. clicmd:: format NAME
-+
-+   Configure SRv6 SID format.
-+
-+.. clicmd:: compressed usid
-+
-+   Enable SRv6 uSID compression and configure SRv6 uSID compression parameters.
-+
-+.. clicmd:: local-id-block start START
-+
-+   Configure the start value for the Local ID Block (LIB).
-+
-+.. clicmd:: local-id-block explicit start START end END
-+
-+   Configure the start/end values for the Explicit LIB (ELIB).
-+
-+.. clicmd:: wide-local-id-block start START end END
-+
-+   Configure the start/end values for the Wide LIB (W-LIB).
-+
-+.. clicmd:: wide-local-id-block explicit start START
-+
-+   Configure the start value for the Explicit Wide LIB (EW-LIB).
-+
-+::
-+
-+   router# configure terminal
-+   router(config)# segment-routinig
-+   router(config-sr)# srv6
-+   router(config-srv6)# formats
-+   router(config-srv6-formats)# format usid-f3216
-+   router(config-srv6-format)# compressed usid
-+   router(config-srv6-format-usid)# local-id-block start 0xD000
-+   router(config-srv6-format-usid)# local-id-block explicit start 0xF000 end 0xFDFF
-+   router(config-srv6-format-usid)# wide-local-id-block start 0xFFF4 end 0xFFF5
-+   router(config-srv6-format-usid)# wide-local-id-block explicit start 0xFFF4
-+
-+   router(config-srv6-locator)# show run
-+   ...
-+   segment-routing
-+    srv6
-+     formats
-+      format usid-f3216
-+       compressed usid
-+        local-id-block start 0xD000
-+        local-id-block explicit start 0xF000 end 0xFDFF
-+        wide-local-id-block start 0xFFF4 end 0xFFF5
-+        wide-local-id-block explicit start 0xFFF4
-+      !
-+   ...
-+
- .. _multicast-rib-commands:
- 
- Multicast RIB Commands
-diff --git a/lib/command.h b/lib/command.h
-index 04c66adb2..12c893b1b 100644
---- a/lib/command.h
-+++ b/lib/command.h
-@@ -161,6 +161,9 @@ enum node_type {
- 	SRV6_LOCS_NODE,		 /* SRv6 locators node */
- 	SRV6_LOC_NODE,		 /* SRv6 locator node */
- 	SRV6_ENCAP_NODE,		 /* SRv6 encapsulation node */
-+	SRV6_SID_FORMATS_NODE,		 /* SRv6 SID formats config node */
-+	SRV6_SID_FORMAT_USID_F3216_NODE,		 /* SRv6 uSID f3216 format config node */
-+	SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE,		 /* SRv6 uncompressed f4024 format config node */
- 	VTY_NODE,		 /* Vty node. */
- 	FPM_NODE,		 /* Dataplane FPM node. */
- 	LINK_PARAMS_NODE,	/* Link-parameters node */
-diff --git a/lib/log.c b/lib/log.c
-index 969ca7925..880180ae5 100644
---- a/lib/log.c
-+++ b/lib/log.c
-@@ -436,6 +436,9 @@ static const struct zebra_desc_table command_types[] = {
- 	DESC_ENTRY(ZEBRA_SRV6_LOCATOR_DELETE),
- 	DESC_ENTRY(ZEBRA_SRV6_MANAGER_GET_LOCATOR_CHUNK),
- 	DESC_ENTRY(ZEBRA_SRV6_MANAGER_RELEASE_LOCATOR_CHUNK),
-+	DESC_ENTRY(ZEBRA_SRV6_MANAGER_GET_LOCATOR),
-+	DESC_ENTRY(ZEBRA_SRV6_MANAGER_GET_SRV6_SID),
-+	DESC_ENTRY(ZEBRA_SRV6_MANAGER_RELEASE_SRV6_SID),
- 	DESC_ENTRY(ZEBRA_ERROR),
- 	DESC_ENTRY(ZEBRA_CLIENT_CAPABILITIES),
- 	DESC_ENTRY(ZEBRA_OPAQUE_MESSAGE),
-@@ -461,7 +464,8 @@ static const struct zebra_desc_table command_types[] = {
- 	DESC_ENTRY(ZEBRA_TC_CLASS_DELETE),
- 	DESC_ENTRY(ZEBRA_TC_FILTER_ADD),
- 	DESC_ENTRY(ZEBRA_TC_FILTER_DELETE),
--	DESC_ENTRY(ZEBRA_OPAQUE_NOTIFY)
-+	DESC_ENTRY(ZEBRA_OPAQUE_NOTIFY),
-+	DESC_ENTRY(ZEBRA_SRV6_SID_NOTIFY)
- };
- #undef DESC_ENTRY
- 
-diff --git a/lib/srv6.c b/lib/srv6.c
-index dceb6ab48..4cb062256 100644
---- a/lib/srv6.c
-+++ b/lib/srv6.c
-@@ -10,8 +10,11 @@
- #include "log.h"
- 
- DEFINE_QOBJ_TYPE(srv6_locator);
-+DEFINE_QOBJ_TYPE(srv6_sid_format);
- DEFINE_MTYPE_STATIC(LIB, SRV6_LOCATOR, "SRV6 locator");
- DEFINE_MTYPE_STATIC(LIB, SRV6_LOCATOR_CHUNK, "SRV6 locator chunk");
-+DEFINE_MTYPE_STATIC(LIB, SRV6_SID_FORMAT, "SRv6 SID format");
-+DEFINE_MTYPE_STATIC(LIB, SRV6_SID_CTX, "SRv6 SID context");
- 
- const char *seg6local_action2str(uint32_t action)
- {
-@@ -137,6 +140,21 @@ struct srv6_locator_chunk *srv6_locator_chunk_alloc(void)
- 	return chunk;
- }
- 
-+void srv6_locator_copy(struct srv6_locator *copy,
-+		       const struct srv6_locator *locator)
-+{
-+	strlcpy(copy->name, locator->name, sizeof(locator->name));
-+	copy->prefix = locator->prefix;
-+	copy->block_bits_length = locator->block_bits_length;
-+	copy->node_bits_length = locator->node_bits_length;
-+	copy->function_bits_length = locator->function_bits_length;
-+	copy->argument_bits_length = locator->argument_bits_length;
-+	copy->algonum = locator->algonum;
-+	copy->current = locator->current;
-+	copy->status_up = locator->status_up;
-+	copy->flags = locator->flags;
-+}
-+
- void srv6_locator_free(struct srv6_locator *locator)
- {
- 	if (locator) {
-@@ -152,6 +170,59 @@ void srv6_locator_chunk_free(struct srv6_locator_chunk **chunk)
- 	XFREE(MTYPE_SRV6_LOCATOR_CHUNK, *chunk);
- }
- 
-+struct srv6_sid_format *srv6_sid_format_alloc(const char *name)
-+{
-+	struct srv6_sid_format *format = NULL;
-+
-+	format = XCALLOC(MTYPE_SRV6_SID_FORMAT, sizeof(struct srv6_sid_format));
-+	strlcpy(format->name, name, sizeof(format->name));
-+
-+	QOBJ_REG(format, srv6_sid_format);
-+	return format;
-+}
-+
-+void srv6_sid_format_free(struct srv6_sid_format *format)
-+{
-+	if (!format)
-+		return;
-+
-+	QOBJ_UNREG(format);
-+	XFREE(MTYPE_SRV6_SID_FORMAT, format);
-+}
-+
-+/**
-+ * Free an SRv6 SID format.
-+ *
-+ * @param val SRv6 SID format to be freed
-+ */
-+void delete_srv6_sid_format(void *val)
-+{
-+	srv6_sid_format_free((struct srv6_sid_format *)val);
-+}
-+
-+struct srv6_sid_ctx *srv6_sid_ctx_alloc(enum seg6local_action_t behavior,
-+					struct in_addr *nh4,
-+					struct in6_addr *nh6, vrf_id_t vrf_id)
-+{
-+	struct srv6_sid_ctx *ctx = NULL;
-+
-+	ctx = XCALLOC(MTYPE_SRV6_SID_CTX, sizeof(struct srv6_sid_ctx));
-+	ctx->behavior = behavior;
-+	if (nh4)
-+		ctx->nh4 = *nh4;
-+	if (nh6)
-+		ctx->nh6 = *nh6;
-+	if (vrf_id)
-+		ctx->vrf_id = vrf_id;
-+
-+	return ctx;
-+}
-+
-+void srv6_sid_ctx_free(struct srv6_sid_ctx *ctx)
-+{
-+	XFREE(MTYPE_SRV6_SID_CTX, ctx);
-+}
-+
- json_object *srv6_locator_chunk_json(const struct srv6_locator_chunk *chunk)
- {
- 	json_object *jo_root = NULL;
-@@ -221,23 +292,47 @@ json_object *srv6_locator_json(const struct srv6_locator *loc)
- 	/* set prefix */
- 	json_object_string_addf(jo_root, "prefix", "%pFX", &loc->prefix);
- 
--	/* set block_bits_length */
--	json_object_int_add(jo_root, "blockBitsLength", loc->block_bits_length);
--
--	/* set node_bits_length */
--	json_object_int_add(jo_root, "nodeBitsLength", loc->node_bits_length);
--
--	/* set function_bits_length */
--	json_object_int_add(jo_root, "functionBitsLength",
--			    loc->function_bits_length);
--
--	/* set argument_bits_length */
--	json_object_int_add(jo_root, "argumentBitsLength",
--			    loc->argument_bits_length);
--
--	/* set true if the locator is a Micro-segment (uSID) locator */
--	if (CHECK_FLAG(loc->flags, SRV6_LOCATOR_USID))
--		json_object_string_add(jo_root, "behavior", "usid");
-+	if (loc->sid_format) {
-+		/* set block_bits_length */
-+		json_object_int_add(jo_root, "blockBitsLength",
-+				    loc->sid_format->block_len);
-+
-+		/* set node_bits_length */
-+		json_object_int_add(jo_root, "nodeBitsLength",
-+				    loc->sid_format->node_len);
-+
-+		/* set function_bits_length */
-+		json_object_int_add(jo_root, "functionBitsLength",
-+				    loc->sid_format->function_len);
-+
-+		/* set argument_bits_length */
-+		json_object_int_add(jo_root, "argumentBitsLength",
-+				    loc->sid_format->argument_len);
-+
-+		/* set true if the locator is a Micro-segment (uSID) locator */
-+		if (loc->sid_format->type == SRV6_SID_FORMAT_TYPE_USID)
-+			json_object_string_add(jo_root, "behavior", "usid");
-+	} else {
-+		/* set block_bits_length */
-+		json_object_int_add(jo_root, "blockBitsLength",
-+				    loc->block_bits_length);
-+
-+		/* set node_bits_length */
-+		json_object_int_add(jo_root, "nodeBitsLength",
-+				    loc->node_bits_length);
-+
-+		/* set function_bits_length */
-+		json_object_int_add(jo_root, "functionBitsLength",
-+				    loc->function_bits_length);
-+
-+		/* set argument_bits_length */
-+		json_object_int_add(jo_root, "argumentBitsLength",
-+				    loc->argument_bits_length);
-+
-+		/* set true if the locator is a Micro-segment (uSID) locator */
-+		if (CHECK_FLAG(loc->flags, SRV6_LOCATOR_USID))
-+			json_object_string_add(jo_root, "behavior", "usid");
-+	}
- 
- 	/* set status_up */
- 	json_object_boolean_add(jo_root, "statusUp",
-@@ -270,23 +365,47 @@ json_object *srv6_locator_detailed_json(const struct srv6_locator *loc)
- 	/* set prefix */
- 	json_object_string_addf(jo_root, "prefix", "%pFX", &loc->prefix);
- 
--	/* set block_bits_length */
--	json_object_int_add(jo_root, "blockBitsLength", loc->block_bits_length);
--
--	/* set node_bits_length */
--	json_object_int_add(jo_root, "nodeBitsLength", loc->node_bits_length);
--
--	/* set function_bits_length */
--	json_object_int_add(jo_root, "functionBitsLength",
--			    loc->function_bits_length);
--
--	/* set argument_bits_length */
--	json_object_int_add(jo_root, "argumentBitsLength",
--			    loc->argument_bits_length);
--
--	/* set true if the locator is a Micro-segment (uSID) locator */
--	if (CHECK_FLAG(loc->flags, SRV6_LOCATOR_USID))
--		json_object_string_add(jo_root, "behavior", "usid");
-+	if (loc->sid_format) {
-+		/* set block_bits_length */
-+		json_object_int_add(jo_root, "blockBitsLength",
-+				    loc->sid_format->block_len);
-+
-+		/* set node_bits_length */
-+		json_object_int_add(jo_root, "nodeBitsLength",
-+				    loc->sid_format->node_len);
-+
-+		/* set function_bits_length */
-+		json_object_int_add(jo_root, "functionBitsLength",
-+				    loc->sid_format->function_len);
-+
-+		/* set argument_bits_length */
-+		json_object_int_add(jo_root, "argumentBitsLength",
-+				    loc->sid_format->argument_len);
-+
-+		/* set true if the locator is a Micro-segment (uSID) locator */
-+		if (loc->sid_format->type == SRV6_SID_FORMAT_TYPE_USID)
-+			json_object_string_add(jo_root, "behavior", "usid");
-+	} else {
-+		/* set block_bits_length */
-+		json_object_int_add(jo_root, "blockBitsLength",
-+				    loc->block_bits_length);
-+
-+		/* set node_bits_length */
-+		json_object_int_add(jo_root, "nodeBitsLength",
-+				    loc->node_bits_length);
-+
-+		/* set function_bits_length */
-+		json_object_int_add(jo_root, "functionBitsLength",
-+				    loc->function_bits_length);
-+
-+		/* set argument_bits_length */
-+		json_object_int_add(jo_root, "argumentBitsLength",
-+				    loc->argument_bits_length);
-+
-+		/* set true if the locator is a Micro-segment (uSID) locator */
-+		if (CHECK_FLAG(loc->flags, SRV6_LOCATOR_USID))
-+			json_object_string_add(jo_root, "behavior", "usid");
-+	}
- 
- 	/* set algonum */
- 	json_object_int_add(jo_root, "algoNum", loc->algonum);
-diff --git a/lib/srv6.h b/lib/srv6.h
-index 53f5119aa..225bdf3ad 100644
---- a/lib/srv6.h
-+++ b/lib/srv6.h
-@@ -20,6 +20,8 @@
- #define SRH_BASE_HEADER_LENGTH 8
- #define SRH_SEGMENT_LENGTH     16
- 
-+#define SRV6_SID_FORMAT_NAME_SIZE 512
-+
- #ifdef __cplusplus
- extern "C" {
- #endif
-@@ -131,6 +133,12 @@ struct srv6_locator {
- 	uint8_t flags;
- #define SRV6_LOCATOR_USID (1 << 0) /* The SRv6 Locator is a uSID Locator */
- 
-+	/* Pointer to the SID format. */
-+	struct srv6_sid_format *sid_format;
-+
-+	/* Pointer to the parent SID block of the locator. */
-+	void *sid_block;
-+
- 	QOBJ_FIELDS;
- };
- DECLARE_QOBJ_TYPE(srv6_locator);
-@@ -187,6 +195,72 @@ struct nexthop_srv6 {
- 	struct seg6_seg_stack *seg6_segs;
- };
- 
-+/* SID format type */
-+enum srv6_sid_format_type {
-+	SRV6_SID_FORMAT_TYPE_UNSPEC = 0,
-+	/* SRv6 SID uncompressed format */
-+	SRV6_SID_FORMAT_TYPE_UNCOMPRESSED = 1,
-+	/* SRv6 SID compressed uSID format */
-+	SRV6_SID_FORMAT_TYPE_USID = 2,
-+};
-+
-+/* SRv6 SID format */
-+struct srv6_sid_format {
-+	/* Name of the format */
-+	char name[SRV6_SID_FORMAT_NAME_SIZE];
-+
-+	/* Format type: uncompressed vs compressed */
-+	enum srv6_sid_format_type type;
-+
-+	/*
-+	 * Lengths of block/node/function/argument parts of the SIDs allocated
-+	 * using this format
-+	 */
-+	uint8_t block_len;
-+	uint8_t node_len;
-+	uint8_t function_len;
-+	uint8_t argument_len;
-+
-+	union {
-+		/* Configuration settings for compressed uSID format type */
-+		struct {
-+			/* Start of the Local ID Block (LIB) range */
-+			uint32_t lib_start;
-+
-+			/* Start/End of the Explicit LIB range */
-+			uint32_t elib_start;
-+			uint32_t elib_end;
-+
-+			/* Start/End of the Wide LIB range */
-+			uint32_t wlib_start;
-+			uint32_t wlib_end;
-+
-+			/* Start/End of the Explicit Wide LIB range */
-+			uint32_t ewlib_start;
-+		} usid;
-+
-+		/* Configuration settings for uncompressed format type */
-+		struct {
-+			/* Start of the Explicit range */
-+			uint32_t explicit_start;
-+		} uncompressed;
-+	} config;
-+
-+	QOBJ_FIELDS;
-+};
-+DECLARE_QOBJ_TYPE(srv6_sid_format);
-+
-+/* Context for an SRv6 SID */
-+struct srv6_sid_ctx {
-+	/* Behavior associated with the SID */
-+	enum seg6local_action_t behavior;
-+
-+	/* Behavior-specific attributes */
-+	struct in_addr nh4;
-+	struct in6_addr nh6;
-+	vrf_id_t vrf_id;
-+};
-+
- static inline const char *seg6_mode2str(enum seg6_mode_t mode)
- {
- 	switch (mode) {
-@@ -250,6 +324,54 @@ const char *seg6local_context2str(char *str, size_t size,
- 				  const struct seg6local_context *ctx,
- 				  uint32_t action);
- 
-+static inline const char *srv6_sid_ctx2str(char *str, size_t size,
-+					   const struct srv6_sid_ctx *ctx)
-+{
-+	int len = 0;
-+
-+	len += snprintf(str + len, size - len, "%s",
-+			seg6local_action2str(ctx->behavior));
-+
-+	switch (ctx->behavior) {
-+	case ZEBRA_SEG6_LOCAL_ACTION_UNSPEC:
-+		break;
-+
-+	case ZEBRA_SEG6_LOCAL_ACTION_END:
-+		len += snprintf(str + len, size - len, " USP");
-+		break;
-+
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_X:
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_DX6:
-+		len += snprintfrr(str + len, size - len, " nh6 %pI6", &ctx->nh6);
-+		break;
-+
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_DX4:
-+		len += snprintfrr(str + len, size - len, " nh4 %pI4", &ctx->nh4);
-+		break;
-+
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_T:
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_DT6:
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_DT4:
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_DT46:
-+		len += snprintf(str + len, size - len, " vrf_id %u",
-+				ctx->vrf_id);
-+		break;
-+
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_DX2:
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_B6:
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_B6_ENCAP:
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_BM:
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_S:
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_AS:
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_AM:
-+	case ZEBRA_SEG6_LOCAL_ACTION_END_BPF:
-+	default:
-+		len += snprintf(str + len, size - len, " unknown(%s)", __func__);
-+	}
-+
-+	return str;
-+}
-+
- int snprintf_seg6_segs(char *str,
- 		size_t size, const struct seg6_segs *segs);
- 
-@@ -258,12 +380,24 @@ extern struct srv6_locator_chunk *srv6_locator_chunk_alloc(void);
- extern void srv6_locator_free(struct srv6_locator *locator);
- extern void srv6_locator_chunk_list_free(void *data);
- extern void srv6_locator_chunk_free(struct srv6_locator_chunk **chunk);
-+extern void srv6_locator_copy(struct srv6_locator *copy,
-+			      const struct srv6_locator *locator);
- json_object *srv6_locator_chunk_json(const struct srv6_locator_chunk *chunk);
- json_object *srv6_locator_json(const struct srv6_locator *loc);
- json_object *srv6_locator_detailed_json(const struct srv6_locator *loc);
- json_object *
- srv6_locator_chunk_detailed_json(const struct srv6_locator_chunk *chunk);
- 
-+extern struct srv6_sid_format *srv6_sid_format_alloc(const char *name);
-+extern void srv6_sid_format_free(struct srv6_sid_format *format);
-+extern void delete_srv6_sid_format(void *format);
-+
-+extern struct srv6_sid_ctx *srv6_sid_ctx_alloc(enum seg6local_action_t behavior,
-+					       struct in_addr *nh4,
-+					       struct in6_addr *nh6,
-+					       vrf_id_t vrf_id);
-+extern void srv6_sid_ctx_free(struct srv6_sid_ctx *ctx);
-+
- #ifdef __cplusplus
- }
- #endif
-diff --git a/lib/zclient.c b/lib/zclient.c
-index 269c3e9ba..462a4362a 100644
---- a/lib/zclient.c
-+++ b/lib/zclient.c
-@@ -1125,6 +1125,10 @@ int zapi_srv6_locator_encode(struct stream *s, const struct srv6_locator *l)
- 	stream_put(s, l->name, strlen(l->name));
- 	stream_putw(s, l->prefix.prefixlen);
- 	stream_put(s, &l->prefix.prefix, sizeof(l->prefix.prefix));
-+	stream_putc(s, l->block_bits_length);
-+	stream_putc(s, l->node_bits_length);
-+	stream_putc(s, l->function_bits_length);
-+	stream_putc(s, l->argument_bits_length);
- 	stream_putc(s, l->flags);
- 	return 0;
- }
-@@ -1141,6 +1145,10 @@ int zapi_srv6_locator_decode(struct stream *s, struct srv6_locator *l)
- 	STREAM_GETW(s, l->prefix.prefixlen);
- 	STREAM_GET(&l->prefix.prefix, s, sizeof(l->prefix.prefix));
- 	l->prefix.family = AF_INET6;
-+	STREAM_GETC(s, l->block_bits_length);
-+	STREAM_GETC(s, l->node_bits_length);
-+	STREAM_GETC(s, l->function_bits_length);
-+	STREAM_GETC(s, l->argument_bits_length);
- 	STREAM_GETC(s, l->flags);
- 	return 0;
- 
-@@ -2125,6 +2133,46 @@ stream_failure:
- 	return false;
- }
- 
-+bool zapi_srv6_sid_notify_decode(struct stream *s, struct srv6_sid_ctx *ctx,
-+				 struct in6_addr *sid_value, uint32_t *func,
-+				 uint32_t *wide_func,
-+				 enum zapi_srv6_sid_notify *note,
-+				 char **p_locator_name)
-+{
-+	uint32_t f, wf;
-+	uint16_t len;
-+	static char locator_name[SRV6_LOCNAME_SIZE] = {};
-+
-+	STREAM_GET(note, s, sizeof(*note));
-+	STREAM_GET(ctx, s, sizeof(struct srv6_sid_ctx));
-+	STREAM_GET(sid_value, s, sizeof(struct in6_addr));
-+	STREAM_GETL(s, f);
-+	STREAM_GETL(s, wf);
-+
-+	if (func)
-+		*func = f;
-+	if (wide_func)
-+		*wide_func = wf;
-+
-+	STREAM_GETW(s, len);
-+	if (len > SRV6_LOCNAME_SIZE) {
-+		*p_locator_name = NULL;
-+		return false;
-+	}
-+	if (p_locator_name) {
-+		if (len == 0)
-+			*p_locator_name = NULL;
-+		else {
-+			STREAM_GET(locator_name, s, len);
-+			*p_locator_name = locator_name;
-+		}
-+	}
-+	return true;
-+
-+stream_failure:
-+	return false;
-+}
-+
- struct nexthop *nexthop_from_zapi_nexthop(const struct zapi_nexthop *znh)
- {
- 	struct nexthop *n = nexthop_new();
-@@ -3267,10 +3315,154 @@ int srv6_manager_release_locator_chunk(struct zclient *zclient,
- 	return zclient_send_message(zclient);
- }
- 
-+/**
-+ * Function to request a SRv6 locator in an asynchronous way
-+ *
-+ * @param zclient The zclient used to connect to SRv6 Manager (zebra)
-+ * @param locator_name Name of SRv6 locator
-+ * @return 0 on success, -1 otherwise
-+ */
-+int srv6_manager_get_locator(struct zclient *zclient, const char *locator_name)
-+{
-+	struct stream *s;
-+	size_t len;
-+
-+	if (!locator_name)
-+		return -1;
-+
-+	if (zclient->sock < 0) {
-+		flog_err(EC_LIB_ZAPI_SOCKET, "%s: invalid zclient socket",
-+			 __func__);
-+		return -1;
-+	}
-+
-+	if (zclient_debug)
-+		zlog_debug("Getting SRv6 Locator %s", locator_name);
-+
-+	len = strlen(locator_name);
-+
-+	/* Send request */
-+	s = zclient->obuf;
-+	stream_reset(s);
-+	zclient_create_header(s, ZEBRA_SRV6_MANAGER_GET_LOCATOR, VRF_DEFAULT);
-+
-+	/* Locator name */
-+	stream_putw(s, len);
-+	stream_put(s, locator_name, len);
-+
-+	/* Put length at the first point of the stream. */
-+	stream_putw_at(s, 0, stream_get_endp(s));
-+
-+	return zclient_send_message(zclient);
-+}
-+
-+/**
-+ * Function to request an SRv6 SID in an asynchronous way
-+ *
-+ * @param zclient The zclient used to connect to SRv6 manager (zebra)
-+ * @param ctx Context associated with the SRv6 SID
-+ * @param sid_value SRv6 SID value for explicit SID allocation
-+ * @param locator_name Name of the parent locator for dynamic SID allocation
-+ * @param sid_func SID function assigned by the SRv6 Manager
-+ * @result 0 on success, -1 otherwise
-+ */
-+int srv6_manager_get_sid(struct zclient *zclient, const struct srv6_sid_ctx *ctx,
-+			 struct in6_addr *sid_value, const char *locator_name,
-+			 uint32_t *sid_func)
-+{
-+	struct stream *s;
-+	uint8_t flags = 0;
-+	size_t len;
-+	char buf[256];
-+
-+	if (zclient->sock < 0) {
-+		flog_err(EC_LIB_ZAPI_SOCKET, "%s: invalid zclient socket",
-+			 __func__);
-+		return ZCLIENT_SEND_FAILURE;
-+	}
-+
-+	if (zclient_debug)
-+		zlog_debug("Getting SRv6 SID: %s",
-+			   srv6_sid_ctx2str(buf, sizeof(buf), ctx));
-+
-+	/* send request */
-+	s = zclient->obuf;
-+	stream_reset(s);
-+
-+	zclient_create_header(s, ZEBRA_SRV6_MANAGER_GET_SRV6_SID, VRF_DEFAULT);
-+
-+	/* Context associated with the SRv6 SID */
-+	stream_put(s, ctx, sizeof(struct srv6_sid_ctx));
-+
-+	/* Flags */
-+	if (!sid_zero_ipv6(sid_value))
-+		SET_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_SID_VALUE);
-+	if (locator_name)
-+		SET_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_LOCATOR);
-+	stream_putc(s, flags);
-+
-+	/* SRv6 SID value */
-+	if (CHECK_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_SID_VALUE))
-+		stream_put(s, sid_value, sizeof(struct in6_addr));
-+
-+	/* SRv6 locator */
-+	if (CHECK_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_LOCATOR)) {
-+		len = strlen(locator_name);
-+		stream_putw(s, len);
-+		stream_put(s, locator_name, len);
-+	}
-+
-+	/* Put length at the first point of the stream. */
-+	stream_putw_at(s, 0, stream_get_endp(s));
-+
-+	/* Send the request to SRv6 Manager */
-+	return zclient_send_message(zclient);
-+}
-+
-+/**
-+ * Function to release an SRv6 SID
-+ *
-+ * @param zclient Zclient used to connect to SRv6 manager (zebra)
-+ * @param ctx Context associated with the SRv6 SID to be removed
-+ * @result 0 on success, -1 otherwise
-+ */
-+int srv6_manager_release_sid(struct zclient *zclient,
-+			     const struct srv6_sid_ctx *ctx)
-+{
-+	struct stream *s;
-+	char buf[256];
-+
-+	if (zclient->sock < 0) {
-+		flog_err(EC_LIB_ZAPI_SOCKET, "%s: invalid zclient socket",
-+			 __func__);
-+		return -1;
-+	}
-+
-+	if (zclient_debug)
-+		zlog_debug("Releasing SRv6 SID: %s",
-+			   srv6_sid_ctx2str(buf, sizeof(buf), ctx));
-+
-+	/* send request */
-+	s = zclient->obuf;
-+	stream_reset(s);
-+
-+	zclient_create_header(s, ZEBRA_SRV6_MANAGER_RELEASE_SRV6_SID,
-+			      VRF_DEFAULT);
-+
-+	/* Context associated with the SRv6 SID */
-+	stream_put(s, ctx, sizeof(struct srv6_sid_ctx));
-+
-+	/* Put length at the first point of the stream. */
-+	stream_putw_at(s, 0, stream_get_endp(s));
-+
-+	/* Send the SID release message */
-+	return zclient_send_message(zclient);
-+}
-+
- /*
-  * Asynchronous label chunk request
-  *
-- * @param zclient Zclient used to connect to label manager (zebra)
-+ * @param zclient The zclient used to connect to label manager (zebra)
-  * @param keep Avoid garbage collection
-  * @param chunk_size Amount of labels requested
-  * @param base Base for the label chunk. if MPLS_LABEL_BASE_ANY we do not care
-diff --git a/lib/zclient.h b/lib/zclient.h
-index 1bf91064e..d2dba15a6 100644
---- a/lib/zclient.h
-+++ b/lib/zclient.h
-@@ -209,6 +209,9 @@ typedef enum {
- 	ZEBRA_SRV6_LOCATOR_DELETE,
- 	ZEBRA_SRV6_MANAGER_GET_LOCATOR_CHUNK,
- 	ZEBRA_SRV6_MANAGER_RELEASE_LOCATOR_CHUNK,
-+	ZEBRA_SRV6_MANAGER_GET_LOCATOR,
-+	ZEBRA_SRV6_MANAGER_GET_SRV6_SID,
-+	ZEBRA_SRV6_MANAGER_RELEASE_SRV6_SID,
- 	ZEBRA_ERROR,
- 	ZEBRA_CLIENT_CAPABILITIES,
- 	ZEBRA_OPAQUE_MESSAGE,
-@@ -235,6 +238,7 @@ typedef enum {
- 	ZEBRA_TC_FILTER_ADD,
- 	ZEBRA_TC_FILTER_DELETE,
- 	ZEBRA_OPAQUE_NOTIFY,
-+	ZEBRA_SRV6_SID_NOTIFY,
- } zebra_message_types_t;
- /* Zebra message types. Please update the corresponding
-  * command_types array with any changes!
-@@ -761,6 +765,13 @@ enum zapi_iptable_notify_owner {
- 	ZAPI_IPTABLE_FAIL_REMOVE,
- };
- 
-+enum zapi_srv6_sid_notify {
-+	ZAPI_SRV6_SID_FAIL_ALLOC = 0,
-+	ZAPI_SRV6_SID_ALLOCATED,
-+	ZAPI_SRV6_SID_RELEASED,
-+	ZAPI_SRV6_SID_FAIL_RELEASE,
-+};
-+
- enum zclient_send_status {
- 	ZCLIENT_SEND_FAILURE = -1,
- 	ZCLIENT_SEND_SUCCESS = 0,
-@@ -813,6 +824,28 @@ zapi_rule_notify_owner2str(enum zapi_rule_notify_owner note)
- 	return ret;
- }
- 
-+static inline const char *zapi_srv6_sid_notify2str(enum zapi_srv6_sid_notify note)
-+{
-+	const char *ret = "UNKNOWN";
-+
-+	switch (note) {
-+	case ZAPI_SRV6_SID_FAIL_ALLOC:
-+		ret = "ZAPI_SRV6_SID_FAIL_ALLOC";
-+		break;
-+	case ZAPI_SRV6_SID_ALLOCATED:
-+		ret = "ZAPI_SRV6_SID_ALLOCATED";
-+		break;
-+	case ZAPI_SRV6_SID_FAIL_RELEASE:
-+		ret = "ZAPI_SRV6_SID_FAIL_RELEASE";
-+		break;
-+	case ZAPI_SRV6_SID_RELEASED:
-+		ret = "ZAPI_SRV6_SID_RELEASED";
-+		break;
-+	}
-+
-+	return ret;
-+}
-+
- /* Zebra MAC types */
- #define ZEBRA_MACIP_TYPE_STICKY                0x01 /* Sticky MAC*/
- #define ZEBRA_MACIP_TYPE_GW                    0x02 /* gateway (SVI) mac*/
-@@ -1070,10 +1103,23 @@ extern int tm_get_table_chunk(struct zclient *zclient, uint32_t chunk_size,
- 			      uint32_t *start, uint32_t *end);
- extern int tm_release_table_chunk(struct zclient *zclient, uint32_t start,
- 				  uint32_t end);
-+
-+/* Zebra SRv6 Manager flags */
-+#define ZAPI_SRV6_MANAGER_SID_FLAG_HAS_SID_VALUE 0x01
-+#define ZAPI_SRV6_MANAGER_SID_FLAG_HAS_LOCATOR	 0x02
-+
- extern int srv6_manager_get_locator_chunk(struct zclient *zclient,
- 					  const char *locator_name);
- extern int srv6_manager_release_locator_chunk(struct zclient *zclient,
- 					      const char *locator_name);
-+extern int srv6_manager_get_locator(struct zclient *zclient,
-+				    const char *locator_name);
-+extern int srv6_manager_get_sid(struct zclient *zclient,
-+				const struct srv6_sid_ctx *ctx,
-+				struct in6_addr *sid_value,
-+				const char *locator_name, uint32_t *sid_func);
-+extern int srv6_manager_release_sid(struct zclient *zclient,
-+				    const struct srv6_sid_ctx *ctx);
- 
- extern enum zclient_send_status zebra_send_sr_policy(struct zclient *zclient,
- 						     int cmd,
-@@ -1128,6 +1174,11 @@ bool zapi_rule_notify_decode(struct stream *s, uint32_t *seqno,
- bool zapi_ipset_notify_decode(struct stream *s,
- 			      uint32_t *unique,
- 			     enum zapi_ipset_notify_owner *note);
-+bool zapi_srv6_sid_notify_decode(struct stream *s, struct srv6_sid_ctx *ctx,
-+				 struct in6_addr *sid_value, uint32_t *func,
-+				 uint32_t *wide_func,
-+				 enum zapi_srv6_sid_notify *note,
-+				 char **locator_name);
- 
- /* Nexthop-group message apis */
- extern enum zclient_send_status
-diff --git a/vtysh/vtysh.c b/vtysh/vtysh.c
-index 12d22b1fc..a6dcd7647 100644
---- a/vtysh/vtysh.c
-+++ b/vtysh/vtysh.c
-@@ -1345,6 +1345,27 @@ static struct cmd_node srv6_encap_node = {
- 	.prompt = "%s(config-srv6-encap)# "
- };
- 
-+static struct cmd_node srv6_sid_formats_node = {
-+	.name = "srv6-formats",
-+	.node = SRV6_SID_FORMATS_NODE,
-+	.parent_node = SRV6_NODE,
-+	.prompt = "%s(config-srv6-formats)# ",
-+};
-+
-+static struct cmd_node srv6_sid_format_usid_f3216_node = {
-+	.name = "srv6-format-usid-f3216",
-+	.node = SRV6_SID_FORMAT_USID_F3216_NODE,
-+	.parent_node = SRV6_SID_FORMATS_NODE,
-+	.prompt = "%s(config-srv6-format)# "
-+};
-+
-+static struct cmd_node srv6_sid_format_uncompressed_f4024_node = {
-+	.name = "srv6-format-uncompressed-f4024",
-+	.node = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE,
-+	.parent_node = SRV6_SID_FORMATS_NODE,
-+	.prompt = "%s(config-srv6-format)# "
-+};
-+
- #ifdef HAVE_PBRD
- static struct cmd_node pbr_map_node = {
- 	.name = "pbr-map",
-@@ -1716,6 +1737,31 @@ DEFUNSH(VTYSH_ZEBRA, srv6_encap, srv6_encap_cmd,
- 	return CMD_SUCCESS;
- }
- 
-+DEFUNSH(VTYSH_ZEBRA, srv6_sid_formats, srv6_sid_formats_cmd, "formats",
-+	"Segment Routing SRv6 SID formats\n")
-+{
-+	vty->node = SRV6_SID_FORMATS_NODE;
-+	return CMD_SUCCESS;
-+}
-+
-+DEFUNSH(VTYSH_ZEBRA, srv6_sid_format_f3216_usid, srv6_sid_format_f3216_usid_cmd,
-+	"format usid-f3216",
-+	"Configure SRv6 SID format\n"
-+	"Configure the uSID f3216 format\n")
-+{
-+	vty->node = SRV6_SID_FORMAT_USID_F3216_NODE;
-+	return CMD_SUCCESS;
-+}
-+
-+DEFUNSH(VTYSH_ZEBRA, srv6_sid_format_f4024_uncompressed, srv6_sid_format_f4024_uncompressed_cmd,
-+	"format uncompressed-f4024",
-+	"Configure SRv6 SID format\n"
-+	"Configure the uncompressed f4024 format\n")
-+{
-+	vty->node = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE;
-+	return CMD_SUCCESS;
-+}
-+
- #ifdef HAVE_BGPD
- DEFUNSH(VTYSH_BGPD, router_bgp, router_bgp_cmd,
- 	"router bgp [ASNUM [<view|vrf> VIEWVRFNAME] [as-notation <dot|dot+|plain>]]",
-@@ -2516,6 +2562,23 @@ DEFUNSH(VTYSH_ZEBRA, exit_srv6_encap, exit_srv6_encap_cmd, "exit",
- 	return CMD_SUCCESS;
- }
- 
-+DEFUNSH(VTYSH_ZEBRA, exit_srv6_sid_formats, exit_srv6_sid_formats_cmd, "exit",
-+	"Exit from SRv6 SID formats configuration mode\n")
-+{
-+	if (vty->node == SRV6_SID_FORMATS_NODE)
-+		vty->node = SRV6_NODE;
-+	return CMD_SUCCESS;
-+}
-+
-+DEFUNSH(VTYSH_ZEBRA, exit_srv6_sid_format, exit_srv6_sid_format_cmd,
-+	"exit", "Exit from SRv6 SID format configuration mode\n")
-+{
-+	if (vty->node == SRV6_SID_FORMAT_USID_F3216_NODE ||
-+	    vty->node == SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE)
-+		vty->node = SRV6_SID_FORMATS_NODE;
-+	return CMD_SUCCESS;
-+}
-+
- #ifdef HAVE_RIPD
- DEFUNSH(VTYSH_MGMTD, vtysh_exit_ripd, vtysh_exit_ripd_cmd, "exit",
- 	"Exit current mode and down to previous mode\n")
-@@ -5117,6 +5180,7 @@ void vtysh_init_vty(void)
- 	install_node(&srv6_node);
- 	install_element(SEGMENT_ROUTING_NODE, &srv6_cmd);
- 	install_element(SRV6_NODE, &srv6_locators_cmd);
-+	install_element(SRV6_NODE, &srv6_sid_formats_cmd);
- 	install_element(SRV6_NODE, &exit_srv6_config_cmd);
- 	install_element(SRV6_NODE, &vtysh_end_all_cmd);
- 	install_element(SRV6_NODE, &srv6_encap_cmd);
-@@ -5134,6 +5198,24 @@ void vtysh_init_vty(void)
- 	install_element(SRV6_ENCAP_NODE, &exit_srv6_encap_cmd);
- 	install_element(SRV6_ENCAP_NODE, &vtysh_end_all_cmd);
- 
-+	install_node(&srv6_sid_formats_node);
-+	install_element(SRV6_SID_FORMATS_NODE, &srv6_sid_format_f3216_usid_cmd);
-+	install_element(SRV6_SID_FORMATS_NODE,
-+			&srv6_sid_format_f4024_uncompressed_cmd);
-+	install_element(SRV6_SID_FORMATS_NODE, &exit_srv6_sid_formats_cmd);
-+	install_element(SRV6_SID_FORMATS_NODE, &vtysh_end_all_cmd);
-+
-+	install_node(&srv6_sid_format_usid_f3216_node);
-+	install_element(SRV6_SID_FORMAT_USID_F3216_NODE,
-+			&exit_srv6_sid_format_cmd);
-+	install_element(SRV6_SID_FORMAT_USID_F3216_NODE, &vtysh_end_all_cmd);
-+
-+	install_node(&srv6_sid_format_uncompressed_f4024_node);
-+	install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE,
-+			&exit_srv6_sid_format_cmd);
-+	install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE,
-+			&vtysh_end_all_cmd);
-+
- 	install_element(ENABLE_NODE, &vtysh_show_running_config_cmd);
- 	install_element(ENABLE_NODE, &vtysh_copy_running_config_cmd);
- 	install_element(ENABLE_NODE, &vtysh_copy_to_running_cmd);
-diff --git a/zebra/zapi_msg.c b/zebra/zapi_msg.c
-index 9ae8333d6..305faaa09 100644
---- a/zebra/zapi_msg.c
-+++ b/zebra/zapi_msg.c
-@@ -999,6 +999,48 @@ void zsend_neighbor_notify(int cmd, struct interface *ifp,
- 	}
- }
- 
-+void zsend_srv6_sid_notify(struct zserv *client, const struct srv6_sid_ctx *ctx,
-+			   struct in6_addr *sid_value, uint32_t func,
-+			   uint32_t wide_func, const char *locator_name,
-+			   enum zapi_srv6_sid_notify note)
-+
-+{
-+	struct stream *s;
-+	uint16_t cmd = ZEBRA_SRV6_SID_NOTIFY;
-+	char buf[256];
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: notifying %s ctx %s sid %pI6 note %s (proto=%u, instance=%u, sessionId=%u)",
-+			   __func__, zserv_command_string(cmd),
-+			   srv6_sid_ctx2str(buf, sizeof(buf), ctx), sid_value,
-+			   zapi_srv6_sid_notify2str(note), client->proto,
-+			   client->instance, client->session_id);
-+
-+	s = stream_new(ZEBRA_MAX_PACKET_SIZ);
-+
-+	zclient_create_header(s, cmd, VRF_DEFAULT);
-+	/* Notification type (e.g. ZAPI_SRV6_SID_ALLOCATED, ZAPI_SRV6_SID_FAIL_ALLOC, ...) */
-+	stream_put(s, &note, sizeof(note));
-+	/* Context associated with the SRv6 SID */
-+	stream_put(s, ctx, sizeof(struct srv6_sid_ctx));
-+	/* SRv6 SID value (i.e. IPv6 address) */
-+	stream_put(s, sid_value, sizeof(struct in6_addr));
-+	/* SRv6 SID function */
-+	stream_putl(s, func);
-+	/* SRv6 wide SID function */
-+	stream_putl(s, wide_func);
-+	/* SRv6 locator name optional */
-+	if (locator_name) {
-+		stream_putw(s, strlen(locator_name));
-+		stream_put(s, locator_name, strlen(locator_name));
-+	} else
-+		stream_putw(s, 0);
-+
-+	stream_putw_at(s, 0, stream_get_endp(s));
-+
-+	zserv_send_message(client, s);
-+}
-+
- 
- /* Router-id is updated. Send ZEBRA_ROUTER_ID_UPDATE to client. */
- int zsend_router_id_update(struct zserv *client, afi_t afi, struct prefix *p,
-@@ -1136,9 +1178,25 @@ static int zsend_table_manager_connect_response(struct zserv *client,
- int zsend_zebra_srv6_locator_add(struct zserv *client, struct srv6_locator *loc)
- {
- 	struct stream *s = stream_new(ZEBRA_MAX_PACKET_SIZ);
-+	struct srv6_locator locator = {};
-+	struct srv6_sid_format *format = loc->sid_format;
-+
-+	/*
-+	 * Copy the locator and fill locator block/node/func/arg length from the format
-+	 * before sending the locator to the zclient
-+	 */
-+	srv6_locator_copy(&locator, loc);
-+	if (format) {
-+		locator.block_bits_length = format->block_len;
-+		locator.node_bits_length = format->node_len;
-+		locator.function_bits_length = format->function_len;
-+		locator.argument_bits_length = format->argument_len;
-+		if (format->type == SRV6_SID_FORMAT_TYPE_USID)
-+			SET_FLAG(locator.flags, SRV6_LOCATOR_USID);
-+	}
- 
- 	zclient_create_header(s, ZEBRA_SRV6_LOCATOR_ADD, VRF_DEFAULT);
--	zapi_srv6_locator_encode(s, loc);
-+	zapi_srv6_locator_encode(s, &locator);
- 	stream_putw_at(s, 0, stream_get_endp(s));
- 
- 	return zserv_send_message(client, s);
-@@ -2995,6 +3053,96 @@ stream_failure:
- 	return;
- }
- 
-+/**
-+ * Handle SRv6 SID request received from a client daemon protocol.
-+ *
-+ * @param client The client zapi session
-+ * @param msg The request message
-+ */
-+static void zread_srv6_manager_get_srv6_sid(struct zserv *client,
-+					    struct stream *msg)
-+{
-+	struct stream *s;
-+	struct srv6_sid_ctx ctx = {};
-+	struct in6_addr sid_value = {};
-+	struct in6_addr *sid_value_ptr = NULL;
-+	char locator[SRV6_LOCNAME_SIZE] = { 0 };
-+	uint16_t len;
-+	struct zebra_srv6_sid *sid = NULL;
-+	uint8_t flags;
-+
-+	/* Get input stream */
-+	s = msg;
-+
-+	/* Get data */
-+	STREAM_GET(&ctx, s, sizeof(struct srv6_sid_ctx));
-+	STREAM_GETC(s, flags);
-+	if (CHECK_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_SID_VALUE)) {
-+		STREAM_GET(&sid_value, s, sizeof(struct in6_addr));
-+		sid_value_ptr = &sid_value;
-+	}
-+	if (CHECK_FLAG(flags, ZAPI_SRV6_MANAGER_SID_FLAG_HAS_LOCATOR)) {
-+		STREAM_GETW(s, len);
-+		STREAM_GET(locator, s, len);
-+	}
-+
-+	/* Call hook to get a SID using wrapper */
-+	srv6_manager_get_sid_call(&sid, client, &ctx, sid_value_ptr, locator);
-+
-+stream_failure:
-+	return;
-+}
-+
-+/**
-+ * Handle SRv6 SID release request received from a client daemon protocol.
-+ *
-+ * @param client The client zapi session
-+ * @param msg The request message
-+ */
-+static void zread_srv6_manager_release_srv6_sid(struct zserv *client,
-+						struct stream *msg)
-+{
-+	struct stream *s;
-+	struct srv6_sid_ctx ctx = {};
-+
-+	/* Get input stream */
-+	s = msg;
-+
-+	/* Get data */
-+	STREAM_GET(&ctx, s, sizeof(struct srv6_sid_ctx));
-+
-+	/* Call hook to release a SID using wrapper */
-+	srv6_manager_release_sid_call(client, &ctx);
-+
-+stream_failure:
-+	return;
-+}
-+
-+/**
-+ * Handle SRv6 locator get request received from a client daemon protocol.
-+ *
-+ * @param client The client zapi session
-+ * @param msg The request message
-+ */
-+static void zread_srv6_manager_get_locator(struct zserv *client,
-+					   struct stream *msg)
-+{
-+	struct stream *s = msg;
-+	uint16_t len;
-+	char locator_name[SRV6_LOCNAME_SIZE] = { 0 };
-+	struct srv6_locator *locator = NULL;
-+
-+	/* Get data */
-+	STREAM_GETW(s, len);
-+	STREAM_GET(locator_name, s, len);
-+
-+	/* Call hook to get the locator info using wrapper */
-+	srv6_manager_get_locator_call(&locator, client, locator_name);
-+
-+stream_failure:
-+	return;
-+}
-+
- static void zread_srv6_manager_request(ZAPI_HANDLER_ARGS)
- {
- 	switch (hdr->command) {
-@@ -3006,6 +3154,15 @@ static void zread_srv6_manager_request(ZAPI_HANDLER_ARGS)
- 		zread_srv6_manager_release_locator_chunk(client, msg,
- 							 zvrf_id(zvrf));
- 		break;
-+	case ZEBRA_SRV6_MANAGER_GET_SRV6_SID:
-+		zread_srv6_manager_get_srv6_sid(client, msg);
-+		break;
-+	case ZEBRA_SRV6_MANAGER_RELEASE_SRV6_SID:
-+		zread_srv6_manager_release_srv6_sid(client, msg);
-+		break;
-+	case ZEBRA_SRV6_MANAGER_GET_LOCATOR:
-+		zread_srv6_manager_get_locator(client, msg);
-+		break;
- 	default:
- 		zlog_err("%s: unknown SRv6 Manager command", __func__);
- 		break;
-@@ -3954,6 +4111,9 @@ void (*const zserv_handlers[])(ZAPI_HANDLER_ARGS) = {
- 	[ZEBRA_MLAG_FORWARD_MSG] = zebra_mlag_forward_client_msg,
- 	[ZEBRA_SRV6_MANAGER_GET_LOCATOR_CHUNK] = zread_srv6_manager_request,
- 	[ZEBRA_SRV6_MANAGER_RELEASE_LOCATOR_CHUNK] = zread_srv6_manager_request,
-+	[ZEBRA_SRV6_MANAGER_GET_SRV6_SID] = zread_srv6_manager_request,
-+	[ZEBRA_SRV6_MANAGER_RELEASE_SRV6_SID] = zread_srv6_manager_request,
-+	[ZEBRA_SRV6_MANAGER_GET_LOCATOR] = zread_srv6_manager_request,
- 	[ZEBRA_CLIENT_CAPABILITIES] = zread_client_capabilities,
- 	[ZEBRA_NEIGH_DISCOVER] = zread_neigh_discover,
- 	[ZEBRA_NHG_ADD] = zread_nhg_add,
-diff --git a/zebra/zapi_msg.h b/zebra/zapi_msg.h
-index 43f734d26..9e3ea6fb6 100644
---- a/zebra/zapi_msg.h
-+++ b/zebra/zapi_msg.h
-@@ -94,6 +94,11 @@ extern int zsend_sr_policy_notify_status(uint32_t color,
- extern void zsend_neighbor_notify(int cmd, struct interface *ifp,
- 				  struct ipaddr *ipaddr, int ndm_state,
- 				  union sockunion *link_layer_ipv4, int ip_len);
-+extern void zsend_srv6_sid_notify(struct zserv *client,
-+				  const struct srv6_sid_ctx *ctx,
-+				  struct in6_addr *sid_value, uint32_t func,
-+				  uint32_t wide_func, const char *locator_name,
-+				  enum zapi_srv6_sid_notify note);
- 
- extern int zsend_client_close_notify(struct zserv *client,
- 				     struct zserv *closed_client);
-@@ -110,6 +115,9 @@ extern int zsend_zebra_srv6_locator_delete(struct zserv *client,
- extern int zsend_srv6_manager_get_locator_chunk_response(struct zserv *client,
- 		vrf_id_t vrf_id, struct srv6_locator *loc);
- 
-+extern int zsend_srv6_manager_get_locator_response(struct zserv *client,
-+						   struct srv6_locator *locator);
-+
- #ifdef __cplusplus
- }
- #endif
-diff --git a/zebra/zebra_errors.c b/zebra/zebra_errors.c
-index 09b369e23..dcfa37d26 100644
---- a/zebra/zebra_errors.c
-+++ b/zebra/zebra_errors.c
-@@ -787,6 +787,18 @@ static struct log_ref ferr_zebra_err[] = {
- 		.suggestion =
- 			"Wait for Zebra to reattempt update.",
- 	},
-+	{
-+		.code = EC_ZEBRA_SM_CANNOT_ASSIGN_SID,
-+		.title = "SRv6 manager unable to assign SID",
-+		.description = "Zebra's SRv6 manager was unable to assign a SID to client.",
-+		.suggestion = "Ensure that Zebra has a sufficient SID range available.",
-+	},
-+	{
-+		.code = EC_ZEBRA_SM_DAEMON_MISMATCH,
-+		.title = "Daemon mismatch when releasing SRV6 SIDs",
-+		.description = "Zebra noticed a mismatch between a SRv6 SID and a protocol daemon number or instance when releasing unused SRv6 SIDs.",
-+		.suggestion = "Ignore this error.",
-+	},
- 	{
- 		.code = END_FERR,
- 	}
-diff --git a/zebra/zebra_errors.h b/zebra/zebra_errors.h
-index 3ac654bda..84632e1ad 100644
---- a/zebra/zebra_errors.h
-+++ b/zebra/zebra_errors.h
-@@ -124,6 +124,8 @@ enum zebra_log_refs {
- 	EC_ZEBRA_GRE_SET_UPDATE,
- 	EC_ZEBRA_SRV6M_UNRELEASED_LOCATOR_CHUNK,
- 	EC_ZEBRA_INTF_UPDATE_FAILURE,
-+	EC_ZEBRA_SM_CANNOT_ASSIGN_SID,
-+	EC_ZEBRA_SM_DAEMON_MISMATCH,
- };
- 
- void zebra_error_init(void);
-diff --git a/zebra/zebra_srv6.c b/zebra/zebra_srv6.c
-index bb872ef91..0ca77a497 100644
---- a/zebra/zebra_srv6.c
-+++ b/zebra/zebra_srv6.c
-@@ -33,6 +33,16 @@
- 
- DEFINE_MGROUP(SRV6_MGR, "SRv6 Manager");
- DEFINE_MTYPE_STATIC(SRV6_MGR, SRV6M_CHUNK, "SRv6 Manager Chunk");
-+DEFINE_MTYPE_STATIC(SRV6_MGR, ZEBRA_SRV6_SID_BLOCK, "SRv6 SID block");
-+DEFINE_MTYPE_STATIC(SRV6_MGR, ZEBRA_SRV6_SID_FUNC, "SRv6 SID function");
-+DEFINE_MTYPE_STATIC(SRV6_MGR, ZEBRA_SRV6_USID_WLIB,
-+		    "SRv6 uSID Wide LIB information");
-+DEFINE_MTYPE_STATIC(SRV6_MGR, ZEBRA_SRV6_SID, "SRv6 SID");
-+DEFINE_MTYPE_STATIC(SRV6_MGR, ZEBRA_SRV6_SID_CTX, "SRv6 SID context");
-+
-+/* Prototypes */
-+static int release_srv6_sid_func_dynamic(struct zebra_srv6_sid_block *block,
-+					 uint32_t sid_func);
- 
- /* define hooks for the basic API, so that it can be specialized or served
-  * externally
-@@ -55,6 +65,18 @@ DEFINE_HOOK(srv6_manager_release_chunk,
- 	     vrf_id_t vrf_id),
- 	    (client, locator_name, vrf_id));
- 
-+DEFINE_HOOK(srv6_manager_get_sid,
-+	    (struct zebra_srv6_sid **sid, struct zserv *client,
-+	     struct srv6_sid_ctx *ctx, struct in6_addr *sid_value,
-+	     const char *locator_name),
-+	    (sid, client, ctx, sid_value, locator_name));
-+DEFINE_HOOK(srv6_manager_release_sid,
-+	    (struct zserv *client, struct srv6_sid_ctx *ctx), (client, ctx));
-+DEFINE_HOOK(srv6_manager_get_locator,
-+	    (struct srv6_locator **locator, struct zserv *client,
-+	     const char *locator_name),
-+	    (locator, client, locator_name));
-+
- /* define wrappers to be called in zapi_msg.c (as hooks must be called in
-  * source file where they were defined)
-  */
-@@ -85,11 +107,502 @@ int srv6_manager_client_disconnect_cb(struct zserv *client)
- 	return 0;
- }
- 
-+
-+void srv6_manager_get_sid_call(struct zebra_srv6_sid **sid,
-+			       struct zserv *client, struct srv6_sid_ctx *ctx,
-+			       struct in6_addr *sid_value,
-+			       const char *locator_name)
-+{
-+	hook_call(srv6_manager_get_sid, sid, client, ctx, sid_value,
-+		  locator_name);
-+}
-+
-+void srv6_manager_release_sid_call(struct zserv *client,
-+				   struct srv6_sid_ctx *ctx)
-+{
-+	hook_call(srv6_manager_release_sid, client, ctx);
-+}
-+
-+void srv6_manager_get_locator_call(struct srv6_locator **locator,
-+				   struct zserv *client,
-+				   const char *locator_name)
-+{
-+	hook_call(srv6_manager_get_locator, locator, client, locator_name);
-+}
-+
- static int zebra_srv6_cleanup(struct zserv *client)
- {
-+	/* Client has disconnected, let's release all the SIDs allocated by it. */
-+	release_daemon_srv6_sids(client);
- 	return 0;
- }
- 
-+/* --- Zebra SRv6 SID context management functions -------------------------- */
-+
-+struct zebra_srv6_sid_ctx *zebra_srv6_sid_ctx_alloc(void)
-+{
-+	struct zebra_srv6_sid_ctx *ctx = NULL;
-+
-+	ctx = XCALLOC(MTYPE_ZEBRA_SRV6_SID_CTX,
-+		      sizeof(struct zebra_srv6_sid_ctx));
-+
-+	return ctx;
-+}
-+
-+void zebra_srv6_sid_ctx_free(struct zebra_srv6_sid_ctx *ctx)
-+{
-+	XFREE(MTYPE_ZEBRA_SRV6_SID_CTX, ctx);
-+}
-+
-+/**
-+ * Free an SRv6 SID context.
-+ *
-+ * @param val SRv6 SID context to be freed
-+ */
-+void delete_zebra_srv6_sid_ctx(void *val)
-+{
-+	zebra_srv6_sid_ctx_free((struct zebra_srv6_sid_ctx *)val);
-+}
-+
-+/* --- Zebra SRv6 SID format management functions --------------------------- */
-+
-+void srv6_sid_format_register(struct srv6_sid_format *format)
-+{
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+
-+	/* Ensure that the format is registered only once */
-+	assert(!srv6_sid_format_lookup(format->name));
-+
-+	listnode_add(srv6->sid_formats, format);
-+}
-+
-+void srv6_sid_format_unregister(struct srv6_sid_format *format)
-+{
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+
-+	listnode_delete(srv6->sid_formats, format);
-+}
-+
-+struct srv6_sid_format *srv6_sid_format_lookup(const char *name)
-+{
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+	struct srv6_sid_format *format;
-+	struct listnode *node;
-+
-+	for (ALL_LIST_ELEMENTS_RO(srv6->sid_formats, node, format))
-+		if (!strncmp(name, format->name, sizeof(format->name)))
-+			return format;
-+
-+	return NULL;
-+}
-+
-+/*
-+ * Called to change the SID format of a locator.
-+ *
-+ * After switching the locator to a different format, the SIDs allocated
-+ * from the locator may no longer be valid; we need to notify the
-+ * interested zclient that the locator has changed, so that the
-+ * zclients can withdraw/uninstall the old SIDs, allocate/advertise/program
-+ * the new SIDs.
-+ */
-+void zebra_srv6_locator_format_set(struct srv6_locator *locator,
-+				   struct srv6_sid_format *format)
-+{
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+	struct zebra_srv6_sid_block *block_old, *block_new;
-+	struct prefix_ipv6 block_pfx_new;
-+	struct listnode *node, *nnode;
-+	struct zebra_srv6_sid_ctx *ctx;
-+
-+	if (!locator)
-+		return;
-+
-+	locator->sid_format = format;
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: Locator %s format has changed, old=%s new=%s",
-+			   __func__, locator->name,
-+			   locator->sid_format ? ((struct srv6_sid_format *)
-+							  locator->sid_format)
-+							 ->name
-+					       : NULL,
-+			   format ? format->name : NULL);
-+
-+	/* Notify zclients that the locator is no longer valid */
-+	zebra_notify_srv6_locator_delete(locator);
-+
-+	for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, ctx)) {
-+		if (!ctx->sid || ctx->sid->locator != locator)
-+			continue;
-+
-+		if (ctx->sid)
-+			zebra_srv6_sid_free(ctx->sid);
-+
-+		listnode_delete(srv6->sids, ctx);
-+		zebra_srv6_sid_ctx_free(ctx);
-+	}
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: Locator %s format has changed, send SRV6_LOCATOR_DEL notification to zclients",
-+			   __func__, locator->name);
-+
-+	/* Release the current parent block */
-+	block_old = locator->sid_block;
-+	if (block_old) {
-+		block_old->refcnt--;
-+		if (block_old->refcnt == 0) {
-+			listnode_delete(srv6->sid_blocks, block_old);
-+			zebra_srv6_sid_block_free(block_old);
-+		}
-+	}
-+	locator->sid_block = NULL;
-+
-+	block_pfx_new = locator->prefix;
-+	if (format)
-+		block_pfx_new.prefixlen = format->block_len;
-+	else
-+		block_pfx_new.prefixlen = locator->block_bits_length;
-+	apply_mask(&block_pfx_new);
-+
-+	/* Allocate the new parent block */
-+	block_new = zebra_srv6_sid_block_lookup(&block_pfx_new);
-+	if (!block_new) {
-+		block_new = zebra_srv6_sid_block_alloc(format, &block_pfx_new);
-+		listnode_add(srv6->sid_blocks, block_new);
-+	}
-+
-+	block_new->refcnt++;
-+	locator->sid_block = block_new;
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: Locator %s format has changed, send SRV6_LOCATOR_ADD notification to zclients",
-+			   __func__, locator->name);
-+
-+	/* Notify zclients about the updated locator */
-+	zebra_srv6_locator_add(locator);
-+}
-+
-+/*
-+ * Called when a SID format is modified by the user.
-+ *
-+ * After modifying a SID format, the SIDs that are using that format may no
-+ * longer be valid.
-+ * This function walks through the list of locators that are using the SID format
-+ * and notifies the zclients that the locator has changed, so that the zclients
-+ * can withdraw/uninstall the old SIDs, allocate/program/advertise the new SIDs.
-+ */
-+void zebra_srv6_sid_format_changed_cb(struct srv6_sid_format *format)
-+{
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+	struct srv6_locator *locator;
-+	struct listnode *node, *nnode;
-+	struct zebra_srv6_sid_ctx *ctx;
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: SID format %s has changed. Notifying zclients.",
-+			   __func__, format->name);
-+
-+	for (ALL_LIST_ELEMENTS_RO(srv6->locators, node, locator)) {
-+		if (locator->sid_format == format) {
-+			if (IS_ZEBRA_DEBUG_PACKET)
-+				zlog_debug("%s: Locator %s has changed because its format (%s) has been modified. Notifying zclients.",
-+					   __func__, locator->name,
-+					   format->name);
-+
-+			/* Notify zclients that the locator is no longer valid */
-+			zebra_notify_srv6_locator_delete(locator);
-+
-+			for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, ctx)) {
-+				if (!ctx->sid || ctx->sid->locator != locator)
-+					continue;
-+
-+				if (ctx->sid)
-+					zebra_srv6_sid_free(ctx->sid);
-+
-+				listnode_delete(srv6->sids, ctx);
-+				zebra_srv6_sid_ctx_free(ctx);
-+			}
-+
-+			/* Notify zclients about the updated locator */
-+			zebra_notify_srv6_locator_add(locator);
-+		}
-+	}
-+}
-+
-+/*
-+ * Helper function to create the SRv6 compressed format `usid-f3216`.
-+ */
-+static struct srv6_sid_format *create_srv6_sid_format_usid_f3216(void)
-+{
-+	struct srv6_sid_format *format = NULL;
-+
-+	format = srv6_sid_format_alloc(SRV6_SID_FORMAT_USID_F3216_NAME);
-+
-+	format->type = SRV6_SID_FORMAT_TYPE_USID;
-+
-+	/* Define block/node/function length */
-+	format->block_len = SRV6_SID_FORMAT_USID_F3216_BLOCK_LEN;
-+	format->node_len = SRV6_SID_FORMAT_USID_F3216_NODE_LEN;
-+	format->function_len = SRV6_SID_FORMAT_USID_F3216_FUNCTION_LEN;
-+	format->argument_len = SRV6_SID_FORMAT_USID_F3216_ARGUMENT_LEN;
-+
-+	/* Define the ranges from which the SID function can be allocated */
-+	format->config.usid.lib_start = SRV6_SID_FORMAT_USID_F3216_LIB_START;
-+	format->config.usid.elib_start = SRV6_SID_FORMAT_USID_F3216_ELIB_START;
-+	format->config.usid.elib_end = SRV6_SID_FORMAT_USID_F3216_ELIB_END;
-+	format->config.usid.wlib_start = SRV6_SID_FORMAT_USID_F3216_WLIB_START;
-+	format->config.usid.wlib_end = SRV6_SID_FORMAT_USID_F3216_WLIB_END;
-+	format->config.usid.ewlib_start = SRV6_SID_FORMAT_USID_F3216_EWLIB_START;
-+
-+	return format;
-+}
-+
-+/*
-+ * Helper function to create the SRv6 uncompressed format.
-+ */
-+static struct srv6_sid_format *create_srv6_sid_format_uncompressed(void)
-+{
-+	struct srv6_sid_format *format = NULL;
-+
-+	format = srv6_sid_format_alloc(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME);
-+
-+	format->type = SRV6_SID_FORMAT_TYPE_UNCOMPRESSED;
-+
-+	/* Define block/node/function length */
-+	format->block_len = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_BLOCK_LEN;
-+	format->node_len = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE_LEN;
-+	format->function_len = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_FUNCTION_LEN;
-+	format->argument_len = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_ARGUMENT_LEN;
-+
-+	/* Define the ranges from which the SID function can be allocated */
-+	format->config.uncompressed.explicit_start =
-+		SRV6_SID_FORMAT_UNCOMPRESSED_F4024_EXPLICIT_RANGE_START;
-+
-+	return format;
-+}
-+
-+/* --- Zebra SRv6 SID function management functions ---------------------------- */
-+
-+uint32_t *zebra_srv6_sid_func_alloc(uint32_t func)
-+{
-+	uint32_t *sid_func_ptr;
-+
-+	sid_func_ptr = XCALLOC(MTYPE_ZEBRA_SRV6_SID_FUNC, sizeof(uint32_t));
-+	*sid_func_ptr = func;
-+
-+	return sid_func_ptr;
-+}
-+
-+void zebra_srv6_sid_func_free(uint32_t *func)
-+{
-+	XFREE(MTYPE_ZEBRA_SRV6_SID_FUNC, func);
-+}
-+
-+/**
-+ * Free an SRv6 SID function.
-+ *
-+ * @param val SRv6 SID function to be freed
-+ */
-+void delete_zebra_srv6_sid_func(void *val)
-+{
-+	zebra_srv6_sid_func_free((uint32_t *)val);
-+}
-+
-+/* --- Zebra SRv6 SID block management functions ---------------------------- */
-+
-+static struct zebra_srv6_sid_block *zebra_srv6_sid_block_alloc_internal(void)
-+{
-+	struct zebra_srv6_sid_block *block = NULL;
-+
-+	block = XCALLOC(MTYPE_ZEBRA_SRV6_SID_BLOCK,
-+			sizeof(struct zebra_srv6_sid_block));
-+
-+	return block;
-+}
-+
-+struct zebra_srv6_sid_block *
-+zebra_srv6_sid_block_alloc(struct srv6_sid_format *format,
-+			   struct prefix_ipv6 *prefix)
-+{
-+	struct zebra_srv6_sid_block *block;
-+
-+	block = zebra_srv6_sid_block_alloc_internal();
-+	block->sid_format = format;
-+	block->prefix = *prefix;
-+
-+	if (format) {
-+		if (format->type == SRV6_SID_FORMAT_TYPE_USID) {
-+			uint32_t wlib_start, wlib_end, func;
-+
-+			/* Init uSID LIB */
-+			block->u.usid.lib.func_allocated = list_new();
-+			block->u.usid.lib.func_allocated->del =
-+				delete_zebra_srv6_sid_func;
-+			block->u.usid.lib.func_released = list_new();
-+			block->u.usid.lib.func_released->del =
-+				delete_zebra_srv6_sid_func;
-+			block->u.usid.lib.first_available_func =
-+				format->config.usid.lib_start;
-+
-+			/* Init uSID Wide LIB */
-+			wlib_start = block->sid_format->config.usid.wlib_start;
-+			wlib_end = block->sid_format->config.usid.wlib_end;
-+			block->u.usid.wide_lib =
-+				XCALLOC(MTYPE_ZEBRA_SRV6_USID_WLIB,
-+					(wlib_end - wlib_start + 1) *
-+						sizeof(struct wide_lib));
-+			for (func = 0; func < wlib_end - wlib_start + 1;
-+			     func++) {
-+				block->u.usid.wide_lib[func].func_allocated =
-+					list_new();
-+				block->u.usid.wide_lib[func].func_allocated->del =
-+					delete_zebra_srv6_sid_func;
-+				block->u.usid.wide_lib[func].func_released =
-+					list_new();
-+				block->u.usid.wide_lib[func].func_released->del =
-+					delete_zebra_srv6_sid_func;
-+				block->u.usid.wide_lib[func].func = func;
-+			}
-+		} else if (format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) {
-+			block->u.uncompressed.func_allocated = list_new();
-+			block->u.uncompressed.func_allocated->del =
-+				delete_zebra_srv6_sid_func;
-+			block->u.uncompressed.func_released = list_new();
-+			block->u.uncompressed.func_released->del =
-+				delete_zebra_srv6_sid_func;
-+			block->u.uncompressed.first_available_func =
-+				SRV6_SID_FORMAT_UNCOMPRESSED_F4024_FUNC_UNRESERVED_MIN;
-+		} else {
-+			/* We should never arrive here */
-+			assert(0);
-+		}
-+	} else {
-+		block->u.uncompressed.func_allocated = list_new();
-+		block->u.uncompressed.func_allocated->del =
-+			delete_zebra_srv6_sid_func;
-+		block->u.uncompressed.func_released = list_new();
-+		block->u.uncompressed.func_released->del =
-+			delete_zebra_srv6_sid_func;
-+		block->u.uncompressed.first_available_func = 1;
-+	}
-+
-+	return block;
-+}
-+
-+void zebra_srv6_sid_block_free(struct zebra_srv6_sid_block *block)
-+{
-+	if (block->sid_format) {
-+		if (block->sid_format->type == SRV6_SID_FORMAT_TYPE_USID) {
-+			uint32_t wlib_start, wlib_end, func;
-+
-+			/* Free uSID LIB */
-+			list_delete(&block->u.usid.lib.func_allocated);
-+			list_delete(&block->u.usid.lib.func_released);
-+
-+			/* Free uSID Wide LIB */
-+			wlib_start = block->sid_format->config.usid.wlib_start;
-+			wlib_end = block->sid_format->config.usid.wlib_end;
-+			for (func = 0; func < wlib_end - wlib_start + 1;
-+			     func++) {
-+				list_delete(&block->u.usid.wide_lib[func]
-+						     .func_allocated);
-+				list_delete(&block->u.usid.wide_lib[func]
-+						     .func_released);
-+			}
-+			XFREE(MTYPE_ZEBRA_SRV6_USID_WLIB,
-+			      block->u.usid.wide_lib);
-+		} else if (block->sid_format->type ==
-+			   SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) {
-+			list_delete(&block->u.uncompressed.func_allocated);
-+			list_delete(&block->u.uncompressed.func_released);
-+		} else {
-+			/* We should never arrive here */
-+			assert(0);
-+		}
-+	} else {
-+		list_delete(&block->u.uncompressed.func_allocated);
-+		list_delete(&block->u.uncompressed.func_released);
-+	}
-+
-+	XFREE(MTYPE_ZEBRA_SRV6_SID_BLOCK, block);
-+}
-+
-+/**
-+ * Free an SRv6 SID block.
-+ *
-+ * @param val SRv6 SID block to be freed
-+ */
-+void delete_zebra_srv6_sid_block(void *val)
-+{
-+	zebra_srv6_sid_block_free((struct zebra_srv6_sid_block *)val);
-+}
-+
-+struct zebra_srv6_sid_block *
-+zebra_srv6_sid_block_lookup(struct prefix_ipv6 *prefix)
-+{
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+	struct zebra_srv6_sid_block *block;
-+	struct listnode *node;
-+
-+	for (ALL_LIST_ELEMENTS_RO(srv6->sid_blocks, node, block))
-+		if (prefix_match(prefix, &block->prefix))
-+			return block;
-+
-+	return NULL;
-+}
-+
-+/* --- Zebra SRv6 SID management functions ---------------------------------- */
-+
-+/**
-+ * Alloc and fill an SRv6 SID.
-+ *
-+ * @param ctx Context associated with the SID to be created
-+ * @param sid_value IPv6 address associated with the SID to be created
-+ * @param locator Parent locator of the SID to be created
-+ * @param sid_block Block from which the SID value has been allocated
-+ * @param sid_func Function part of the SID to be created
-+ * @param alloc_mode Allocation mode of the Function (dynamic vs explicit)
-+ * @return The requested SID
-+ */
-+struct zebra_srv6_sid *
-+zebra_srv6_sid_alloc(struct zebra_srv6_sid_ctx *ctx, struct in6_addr *sid_value,
-+		     struct srv6_locator *locator,
-+		     struct zebra_srv6_sid_block *sid_block, uint32_t sid_func,
-+		     enum srv6_sid_alloc_mode alloc_mode)
-+{
-+	struct zebra_srv6_sid *sid;
-+
-+	if (!ctx || !sid_value)
-+		return NULL;
-+
-+	sid = XCALLOC(MTYPE_ZEBRA_SRV6_SID, sizeof(struct zebra_srv6_sid));
-+	sid->ctx = ctx;
-+	sid->value = *sid_value;
-+	sid->locator = locator;
-+	sid->block = sid_block;
-+	sid->func = sid_func;
-+	sid->alloc_mode = alloc_mode;
-+	sid->client_list = list_new();
-+
-+	return sid;
-+}
-+
-+void zebra_srv6_sid_free(struct zebra_srv6_sid *sid)
-+{
-+	list_delete(&sid->client_list);
-+	XFREE(MTYPE_ZEBRA_SRV6_SID, sid);
-+}
-+
-+/**
-+ * Free an SRv6 SID.
-+ *
-+ * @param val SRv6 SID to be freed
-+ */
-+void delete_zebra_srv6_sid(void *val)
-+{
-+	zebra_srv6_sid_free((struct zebra_srv6_sid *)val);
-+}
-+
- void zebra_srv6_locator_add(struct srv6_locator *locator)
- {
- 	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-@@ -121,7 +634,6 @@ void zebra_srv6_locator_add(struct srv6_locator *locator)
- void zebra_srv6_locator_delete(struct srv6_locator *locator)
- {
- 	struct listnode *n;
--	struct srv6_locator_chunk *c;
- 	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
- 	struct zserv *client;
- 
-@@ -136,18 +648,8 @@ void zebra_srv6_locator_delete(struct srv6_locator *locator)
- 	 * by ZEBRA_SRV6_LOCATOR_DELETE, and this notification is sent to the
- 	 * owner of each chunk.
- 	 */
--	for (ALL_LIST_ELEMENTS_RO((struct list *)locator->chunks, n, c)) {
--		if (c->proto == ZEBRA_ROUTE_SYSTEM)
--			continue;
--		client = zserv_find_client(c->proto, c->instance);
--		if (!client) {
--			zlog_warn(
--				"%s: Not found zclient(proto=%u, instance=%u).",
--				__func__, c->proto, c->instance);
--			continue;
--		}
-+	for (ALL_LIST_ELEMENTS_RO(zrouter.client_list, n, client))
- 		zsend_zebra_srv6_locator_delete(client, locator);
--	}
- 
- 	listnode_delete(srv6->locators, locator);
- 	srv6_locator_free(locator);
-@@ -190,7 +692,6 @@ void zebra_notify_srv6_locator_add(struct srv6_locator *locator)
- void zebra_notify_srv6_locator_delete(struct srv6_locator *locator)
- {
- 	struct listnode *n;
--	struct srv6_locator_chunk *c;
- 	struct zserv *client;
- 
- 	/*
-@@ -204,17 +705,8 @@ void zebra_notify_srv6_locator_delete(struct srv6_locator *locator)
- 	 * by ZEBRA_SRV6_LOCATOR_DELETE, and this notification is sent to the
- 	 * owner of each chunk.
- 	 */
--	for (ALL_LIST_ELEMENTS_RO((struct list *)locator->chunks, n, c)) {
--		if (c->proto == ZEBRA_ROUTE_SYSTEM)
--			continue;
--		client = zserv_find_client(c->proto, c->instance);
--		if (!client) {
--			zlog_warn("Not found zclient(proto=%u, instance=%u).",
--				  c->proto, c->instance);
--			continue;
--		}
-+	for (ALL_LIST_ELEMENTS_RO(zrouter.client_list, n, client))
- 		zsend_zebra_srv6_locator_delete(client, locator);
--	}
- }
- 
- struct zebra_srv6 srv6;
-@@ -222,10 +714,32 @@ struct zebra_srv6 srv6;
- struct zebra_srv6 *zebra_srv6_get_default(void)
- {
- 	static bool first_execution = true;
-+	struct srv6_sid_format *format_usidf3216;
-+	struct srv6_sid_format *format_uncompressed;
- 
- 	if (first_execution) {
- 		first_execution = false;
- 		srv6.locators = list_new();
-+
-+		/* Initialize list of SID formats */
-+		srv6.sid_formats = list_new();
-+		srv6.sid_formats->del = delete_srv6_sid_format;
-+
-+		/* Create SID format `usid-f3216` */
-+		format_usidf3216 = create_srv6_sid_format_usid_f3216();
-+		srv6_sid_format_register(format_usidf3216);
-+
-+		/* Create SID format `uncompressed` */
-+		format_uncompressed = create_srv6_sid_format_uncompressed();
-+		srv6_sid_format_register(format_uncompressed);
-+
-+		/* Init list to store SRv6 SIDs */
-+		srv6.sids = list_new();
-+		srv6.sids->del = delete_zebra_srv6_sid_ctx;
-+
-+		/* Init list to store SRv6 SID blocks */
-+		srv6.sid_blocks = list_new();
-+		srv6.sid_blocks->del = delete_zebra_srv6_sid_block;
- 	}
- 	return &srv6;
- }
-@@ -427,30 +941,1534 @@ void zebra_srv6_encap_src_addr_unset(void)
- 	memset(&srv6->encap_src_addr, 0, sizeof(struct in6_addr));
- }
- 
--void zebra_srv6_terminate(void)
-+/* --- SRv6 SID Allocation/Release functions -------------------------------- */
-+
-+/**
-+ * Return the SRv6 SID obtained composing the locator and function.
-+ *
-+ * @param sid_value SRv6 SID address returned
-+ * @param locator Parent locator of the SRv6 SID
-+ * @param sid_func Function part of the SID
-+ * @return True if success, False otherwise
-+ */
-+static bool zebra_srv6_sid_compose(struct in6_addr *sid_value,
-+				   struct srv6_locator *locator,
-+				   uint32_t sid_func)
- {
--	struct srv6_locator *locator;
-+	uint8_t offset, func_len;
-+	struct srv6_sid_format *format = locator->sid_format;
- 
--	if (!srv6.locators)
--		return;
-+	if (!sid_value || !locator)
-+		return false;
-+
-+	if (format) {
-+		offset = format->block_len + format->node_len;
-+		func_len = format->function_len;
-+	} else {
-+		offset = locator->block_bits_length + locator->node_bits_length;
-+		func_len = locator->function_bits_length;
-+	}
- 
--	while (listcount(srv6.locators)) {
--		locator = listnode_head(srv6.locators);
-+	*sid_value = locator->prefix.prefix;
-+	for (uint8_t idx = 0; idx < func_len; idx++) {
-+		uint8_t tidx = offset + idx;
- 
--		listnode_delete(srv6.locators, locator);
--		srv6_locator_free(locator);
-+		sid_value->s6_addr[tidx / 8] &= ~(0x1 << (7 - tidx % 8));
-+		if (sid_func >> (func_len - 1 - idx) & 0x1)
-+			sid_value->s6_addr[tidx / 8] |= 0x1 << (7 - tidx % 8);
- 	}
- 
--	list_delete(&srv6.locators);
-+	return true;
- }
- 
--void zebra_srv6_init(void)
-+/**
-+ * Return the parent locator and function of an SRv6 SID.
-+ *
-+ * @param sid_value SRv6 SID address to be decomposed
-+ * @param sid_block Parent block of the SRv6 SID
-+ * @param locator Parent locator of the SRv6 SID
-+ * @param sid_func Function part of the SID
-+ * @param sid_wide_func Wide function of the SID
-+ * @return True if success, False otherwise
-+ */
-+static bool zebra_srv6_sid_decompose(struct in6_addr *sid_value,
-+				     struct zebra_srv6_sid_block **sid_block,
-+				     struct srv6_locator **locator,
-+				     uint32_t *sid_func, uint32_t *sid_wide_func)
- {
--	hook_register(zserv_client_close, zebra_srv6_cleanup);
--	hook_register(srv6_manager_get_chunk,
--		      zebra_srv6_manager_get_locator_chunk);
--	hook_register(srv6_manager_release_chunk,
--		      zebra_srv6_manager_release_locator_chunk);
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+	struct srv6_locator *l;
-+	struct zebra_srv6_sid_block *b;
-+	struct srv6_sid_format *format;
-+	struct listnode *node;
-+	struct prefix_ipv6 tmp_prefix;
-+	uint8_t offset, func_len;
-+
-+	if (!sid_value || !sid_func)
-+		return false;
-+
-+	*sid_func = 0;
-+	*sid_wide_func = 0;
-+
-+	/*
-+	 * Build a temporary prefix_ipv6 object representing the SRv6 SID.
-+	 * This temporary prefix object is used below by the prefix_match
-+	 * function to check if the SID belongs to a specific locator.
-+	 */
-+	tmp_prefix.family = AF_INET6;
-+	tmp_prefix.prefixlen = IPV6_MAX_BITLEN;
-+	tmp_prefix.prefix = *sid_value;
-+
-+	/*
-+	 * Lookup the parent locator of the SID and return the locator and
-+	 * the function of the SID.
-+	 */
-+	for (ALL_LIST_ELEMENTS_RO(srv6->locators, node, l)) {
-+		/*
-+		 * Check if the locator prefix includes the temporary prefix
-+		 * representing the SID.
-+		 */
-+		if (prefix_match((struct prefix *)&l->prefix,
-+				 (struct prefix *)&tmp_prefix)) {
-+			format = l->sid_format;
-+
-+			if (format) {
-+				offset = format->block_len + format->node_len;
-+				func_len = format->function_len;
-+			} else {
-+				offset = l->block_bits_length +
-+					 l->node_bits_length;
-+				func_len = l->function_bits_length;
-+			}
-+
-+			for (uint8_t idx = 0; idx < func_len; idx++) {
-+				uint8_t tidx = offset + idx;
-+				*sid_func |= (sid_value->s6_addr[tidx / 8] &
-+					      (0x1 << (7 - tidx % 8)))
-+					     << (((func_len - 1 - idx) / 8) * 8);
-+			}
-+
-+			/*
-+			 * If function comes from the Wide LIB range, we also
-+			 * need to get the Wide function.
-+			 */
-+			if (format && format->type == SRV6_SID_FORMAT_TYPE_USID) {
-+				if (*sid_func >= format->config.usid.wlib_start &&
-+				    *sid_func <= format->config.usid.wlib_end) {
-+					format = l->sid_format;
-+
-+					offset = format->block_len +
-+						 format->node_len +
-+						 format->function_len;
-+
-+					for (uint8_t idx = 0; idx < 16; idx++) {
-+						uint8_t tidx = offset + idx;
-+						*sid_wide_func |=
-+							(sid_value->s6_addr[tidx /
-+									    8] &
-+							 (0x1 << (7 - tidx % 8)))
-+							<< (((16 - 1 - idx) / 8) *
-+							    8);
-+					}
-+				}
-+			}
-+
-+			*locator = l;
-+			*sid_block = l->sid_block;
-+
-+			return true;
-+		}
-+	}
-+
-+	/*
-+	 * If we arrive here, the SID does not belong to any locator.
-+	 * Then, let's try to find the parent block from which the SID
-+	 * has been allocated.
-+	 */
-+
-+	/*
-+	 * Lookup the parent block of the SID and return the block and
-+	 * the function of the SID.
-+	 */
-+	for (ALL_LIST_ELEMENTS_RO(srv6->sid_blocks, node, b)) {
-+		/*
-+		 * Check if the block prefix includes the temporary prefix
-+		 * representing the SID
-+		 */
-+		if (prefix_match((struct prefix *)&b->prefix,
-+				 (struct prefix *)&tmp_prefix)) {
-+			format = b->sid_format;
-+
-+			if (!format)
-+				continue;
-+
-+			offset = format->block_len + format->node_len;
-+			func_len = format->function_len;
-+
-+			for (uint8_t idx = 0; idx < func_len; idx++) {
-+				uint8_t tidx = offset + idx;
-+				*sid_func |= (sid_value->s6_addr[tidx / 8] &
-+					      (0x1 << (7 - tidx % 8)))
-+					     << ((func_len - 1 - idx) / 8);
-+			}
-+
-+			/*
-+			 * If function comes from the Wide LIB range, we also
-+			 * need to get the Wide function.
-+			 */
-+			if (*sid_func >= format->config.usid.wlib_start &&
-+			    *sid_func <= format->config.usid.wlib_end) {
-+				format = b->sid_format;
-+
-+				offset = format->block_len + format->node_len +
-+					 format->function_len;
-+
-+				for (uint8_t idx = 0; idx < 16; idx++) {
-+					uint8_t tidx = offset + idx;
-+					*sid_wide_func |=
-+						(sid_value->s6_addr[tidx / 8] &
-+						 (0x1 << (7 - tidx % 8)))
-+						<< (((16 - 1 - idx) / 8) * 8);
-+				}
-+			}
-+
-+			*sid_block = b;
-+
-+			return true;
-+		}
-+	}
-+
-+	return false;
-+}
-+
-+/**
-+ * Allocate an explicit SID function (i.e. specific SID function value) from a given SID block.
-+ *
-+ * @param block SRv6 SID block from which the SID function has to be allocated
-+ * @param sid_func SID function to be allocated
-+ * @param sid_wide_func SID wide function to be allocated
-+ *
-+ * @return true on success, false otherwise
-+ */
-+static bool alloc_srv6_sid_func_explicit(struct zebra_srv6_sid_block *block,
-+					 uint32_t sid_func,
-+					 uint32_t sid_wide_func)
-+{
-+	struct srv6_sid_format *format;
-+	struct listnode *node;
-+	uint32_t *sid_func_ptr = NULL;
-+
-+	if (!block)
-+		return false;
-+
-+	format = block->sid_format;
-+
-+	if (ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: trying to allocate explicit SID function %u from block %pFX",
-+			   __func__, sid_func, &block->prefix);
-+
-+	/*
-+	 * Allocate SID function from the corresponding range depending on the SID format type
-+	 */
-+	if (format) {
-+		if (format->type == SRV6_SID_FORMAT_TYPE_USID) {
-+			uint32_t elib_start = format->config.usid.elib_start;
-+			uint32_t elib_end = format->config.usid.elib_end;
-+			uint32_t wlib_end = format->config.usid.wlib_end;
-+			uint32_t ewlib_start = format->config.usid.ewlib_start;
-+			uint32_t ewlib_end = wlib_end;
-+			uint32_t *sid_wide_func_ptr = NULL;
-+
-+			/* Figure out the range from which the SID function has been allocated and release it */
-+			if ((sid_func >= elib_start) && (sid_func <= elib_end)) {
-+				/* The SID function has to be allocated from the ELIB range */
-+
-+				/* Ensure that the requested SID function has not already been taken */
-+				for (ALL_LIST_ELEMENTS_RO(block->u.usid.lib
-+								  .func_allocated,
-+							  node, sid_func_ptr))
-+					if (*sid_func_ptr == sid_func)
-+						break;
-+
-+				if (sid_func_ptr) {
-+					zlog_err("%s: invalid SM request arguments: SID function %u already taken",
-+						 __func__, sid_func);
-+					return false;
-+				}
-+
-+				/*
-+				 * Mark the SID function as "taken" by adding it to the "func_allocated" list and
-+				 * increase the counter of function allocated
-+				 */
-+				sid_func_ptr =
-+					zebra_srv6_sid_func_alloc(sid_func);
-+				listnode_add(block->u.usid.lib.func_allocated,
-+					     sid_func_ptr);
-+				block->u.usid.lib.num_func_allocated++;
-+			} else if ((sid_func >= ewlib_start) &&
-+				   (sid_func <= ewlib_end)) {
-+				/* The SID function has to be allocated from the EWLIB range */
-+
-+				/* Ensure that the requested SID function has not already been taken */
-+				for (ALL_LIST_ELEMENTS_RO(block->u.usid
-+								  .wide_lib[sid_func]
-+								  .func_allocated,
-+							  node,
-+							  sid_wide_func_ptr))
-+					if (*sid_wide_func_ptr == sid_wide_func)
-+						break;
-+
-+				if (sid_wide_func_ptr) {
-+					zlog_err("%s: invalid SM request arguments: SID function %u already taken",
-+						 __func__, sid_func);
-+					return false;
-+				}
-+
-+				/*
-+				 * Mark the SID function as "taken" by adding it to the "func_allocated" list and
-+				 * increase the counter of function allocated
-+				 */
-+				sid_wide_func_ptr = zebra_srv6_sid_func_alloc(
-+					sid_wide_func);
-+				listnode_add(block->u.usid.wide_lib[sid_func]
-+						     .func_allocated,
-+					     sid_wide_func_ptr);
-+				block->u.usid.wide_lib[sid_func]
-+					.num_func_allocated++;
-+			} else {
-+				zlog_warn("%s: function %u is outside ELIB [%u/%u] and EWLIB alloc ranges [%u/%u]",
-+					  __func__, sid_func, elib_start,
-+					  elib_end, ewlib_start, ewlib_end);
-+				return -1;
-+			}
-+		} else if (format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) {
-+			uint32_t explicit_start =
-+				format->config.uncompressed.explicit_start;
-+			uint32_t explicit_end =
-+				(uint32_t)((1 << format->function_len) - 1);
-+
-+			/* Ensure that the SID function comes from the Explicit range */
-+			if (!(sid_func >= explicit_start &&
-+			      sid_func <= explicit_end)) {
-+				zlog_err("%s: invalid SM request arguments: SID function %u out of explicit range (%u - %u)",
-+					 __func__, sid_func, explicit_start,
-+					 explicit_end);
-+				return false;
-+			}
-+
-+			/* Ensure that the SID function has not already been taken */
-+
-+			for (ALL_LIST_ELEMENTS_RO(block->u.uncompressed
-+							  .func_allocated,
-+						  node, sid_func_ptr))
-+				if (*sid_func_ptr == sid_func)
-+					break;
-+
-+			/* SID function already taken */
-+			if (sid_func_ptr) {
-+				zlog_err("%s: invalid SM request arguments: SID function %u already taken",
-+					 __func__, sid_func);
-+				return false;
-+			}
-+
-+			/*
-+			 * Mark the SID function as "taken" by adding it to the "func_allocated" list and
-+			 * increase the counter of function allocated
-+			 */
-+			sid_func_ptr = zebra_srv6_sid_func_alloc(sid_func);
-+			listnode_add(block->u.uncompressed.func_allocated,
-+				     sid_func_ptr);
-+			block->u.uncompressed.num_func_allocated++;
-+		} else {
-+			/* We should never arrive here */
-+			zlog_err("%s: unknown SID format type: %u", __func__,
-+				 format->type);
-+			assert(0);
-+		}
-+	} else {
-+		/* Ensure that the SID function has not already been taken */
-+
-+		for (ALL_LIST_ELEMENTS_RO(block->u.uncompressed.func_allocated,
-+					  node, sid_func_ptr))
-+			if (*sid_func_ptr == sid_func)
-+				break;
-+
-+		/* SID function already taken */
-+		if (sid_func_ptr) {
-+			zlog_err("%s: invalid SM request arguments: SID function %u already taken",
-+				 __func__, sid_func);
-+			return false;
-+		}
-+
-+		/*
-+		 * Mark the SID function as "taken" by adding it to the "func_allocated" list and
-+		 * increase the counter of function allocated
-+		 */
-+		sid_func_ptr = zebra_srv6_sid_func_alloc(sid_func);
-+		listnode_add(block->u.uncompressed.func_allocated, sid_func_ptr);
-+		block->u.uncompressed.num_func_allocated++;
-+	}
-+
-+	if (ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: allocated explicit SID function %u from block %pFX",
-+			   __func__, sid_func, &block->prefix);
-+
-+	return true;
-+}
-+
-+/**
-+ * Allocate a dynamic SID function (i.e. any available SID function value) from a given SID block.
-+ *
-+ * @param block SRv6 SID block from which the SID function has to be allocated
-+ * @param sid_func SID function allocated
-+ *
-+ * @return true on success, false otherwise
-+ */
-+static bool alloc_srv6_sid_func_dynamic(struct zebra_srv6_sid_block *block,
-+					uint32_t *sid_func)
-+{
-+	struct srv6_sid_format *format;
-+	uint32_t *sid_func_ptr = NULL;
-+
-+	if (!block || !sid_func)
-+		return false;
-+
-+	format = block->sid_format;
-+
-+	if (ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: trying to allocate dynamic SID function from block %pFX",
-+			   __func__, &block->prefix);
-+
-+	/*
-+	 * Allocate SID function from the corresponding range depending on the SID format type
-+	 */
-+	if (format) {
-+		if (format->type == SRV6_SID_FORMAT_TYPE_USID) {
-+			/* Format is uSID and behavior => allocate SID function from LIB range */
-+
-+			/* The Dynamic LIB range ends where the Explicit LIB range begins */
-+			uint32_t dlib_end = format->config.usid.elib_start - 1;
-+
-+			/* Check if we ran out of available SID functions */
-+			if (block->u.usid.lib.first_available_func > dlib_end) {
-+				zlog_warn("%s: SRv6: Warning, SRv6 Dynamic LIB is depleted",
-+					  __func__);
-+				return false;
-+			}
-+
-+			/*
-+			 * First, let's check if there are any SID functions that were previously
-+			 * allocated and then released.
-+			 */
-+			if (listcount(block->u.usid.lib.func_released) != 0) {
-+				/*
-+				 * There are SID functions previously allocated and then released,
-+				 * let's pick the first one and reuse it now.
-+				 */
-+				sid_func_ptr = listnode_head(
-+					block->u.usid.lib.func_released);
-+				*sid_func = *sid_func_ptr;
-+				listnode_delete(block->u.usid.lib.func_released,
-+						sid_func_ptr);
-+				zebra_srv6_sid_func_free(sid_func_ptr);
-+			} else {
-+				/*
-+				 * There are no SID functions previously allocated and then released,
-+				 * let's allocate a new function from the pool of available functions.
-+				 */
-+				*sid_func =
-+					block->u.usid.lib.first_available_func;
-+				block->u.usid.lib.first_available_func++;
-+			}
-+
-+			/* Increase the counter of SID functions allocated */
-+			block->u.usid.lib.num_func_allocated++;
-+
-+			if (block->u.usid.lib.first_available_func > dlib_end)
-+				zlog_warn("%s: SRv6: Warning, SRv6 Dynamic LIB is depleted and next SID request will fail",
-+					  __func__);
-+		} else if (format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) {
-+			/* Format is uncompressed => allocate SID function from Dynamic range */
-+
-+			uint32_t dynamic_end =
-+				format->config.uncompressed.explicit_start - 1;
-+
-+			/* Check if we ran out of available SID functions */
-+			if (block->u.uncompressed.first_available_func >
-+			    dynamic_end) {
-+				zlog_warn("%s: SRv6: Warning, SRv6 SID Dynamic alloc space is depleted",
-+					  __func__);
-+				return NULL;
-+			}
-+
-+			/*
-+			 * First, let's check if there are any SID functions that were previously
-+			 * allocated and then released.
-+			 */
-+			if (listcount(block->u.uncompressed.func_released) != 0) {
-+				/*
-+				 * There are SID functions previously allocated and then released,
-+				 * let's pick the first one and reuse it now.
-+				 */
-+				sid_func_ptr = listnode_head(
-+					block->u.uncompressed.func_released);
-+				*sid_func = *sid_func_ptr;
-+				listnode_delete(block->u.uncompressed
-+							.func_released,
-+						sid_func_ptr);
-+				zebra_srv6_sid_func_free(sid_func_ptr);
-+			} else {
-+				/*
-+				 * There are no SID functions previously allocated and then released,
-+				 * let's allocate a new function from the pool of available functions.
-+				 */
-+				*sid_func = block->u.uncompressed
-+						    .first_available_func;
-+				block->u.uncompressed.first_available_func++;
-+			}
-+
-+			/* Increase the counter of SID functions allocated */
-+			block->u.uncompressed.num_func_allocated++;
-+
-+			if (block->u.uncompressed.first_available_func >
-+			    dynamic_end)
-+				zlog_warn("%s: SRv6: Warning, SRv6 SID Dynamic alloc space is depleted and next SID request will fail",
-+					  __func__);
-+		} else {
-+			/* We should never arrive here */
-+			zlog_err("%s: unknown SID format type: %u", __func__,
-+				 format->type);
-+			assert(0);
-+		}
-+	} else {
-+		/*
-+		 * First, let's check if there are any SID functions that were previously
-+		 * allocated and then released.
-+		 */
-+		if (listcount(block->u.uncompressed.func_released) != 0) {
-+			/*
-+			 * There are SID functions previously allocated and then released,
-+			 * let's pick the first one and reuse it now.
-+			 */
-+			sid_func_ptr = listnode_head(
-+				block->u.uncompressed.func_released);
-+			*sid_func = *sid_func_ptr;
-+			listnode_delete(block->u.uncompressed.func_released,
-+					sid_func_ptr);
-+			zebra_srv6_sid_func_free(sid_func_ptr);
-+		} else {
-+			/*
-+			 * There are no SID functions previously allocated and then released,
-+			 * let's allocate a new function from the pool of available functions.
-+			 */
-+			*sid_func = block->u.uncompressed.first_available_func;
-+			block->u.uncompressed.first_available_func++;
-+		}
-+
-+		/* Increase the counter of SID functions allocated */
-+		block->u.uncompressed.num_func_allocated++;
-+	}
-+
-+	if (ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: allocated dynamic SID function %u from block %pFX",
-+			   __func__, *sid_func, &block->prefix);
-+
-+	return true;
-+}
-+
-+/**
-+ * Get an explicit SID (i.e., a specific SID value) for a given context.
-+ *
-+ * If a SID already exists associated with the context, it returns the existing SID.
-+ * Otherwise, it allocates a new SID.
-+ *
-+ * @param sid SID returned
-+ * @param ctx Context for which the SID has been requested
-+ * @param sid_value specific SRv6 SID value (i.e. IPv6 address) to be
-+ * allocated explicitly
-+ *
-+ * @return 0 if the function returned an existing SID and SID value has not changed,
-+ * 1 if a new SID has been allocated or the existing SID value has changed, -1 if an error occurred
-+ */
-+static int get_srv6_sid_explicit(struct zebra_srv6_sid **sid,
-+				 struct srv6_sid_ctx *ctx,
-+				 struct in6_addr *sid_value)
-+{
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+	struct zebra_srv6_sid_ctx *s = NULL;
-+	struct zebra_srv6_sid_ctx *zctx = NULL;
-+	struct listnode *node;
-+	uint32_t sid_func = 0, sid_func_wide = 0;
-+	struct srv6_locator *locator = NULL;
-+	struct zebra_srv6_sid_block *block = NULL;
-+	char buf[256];
-+
-+	if (!ctx || !sid_value)
-+		return -1;
-+
-+	/* Check if we already have a SID associated with the provided context */
-+	for (ALL_LIST_ELEMENTS_RO(srv6->sids, node, s)) {
-+		if (memcmp(&s->ctx, ctx, sizeof(struct srv6_sid_ctx)) == 0) {
-+			/*
-+			 * If the context is already associated with a SID that has the same SID value, then
-+			 * return the existing SID
-+			 */
-+			if (sid_same(&s->sid->value, sid_value)) {
-+				if (IS_ZEBRA_DEBUG_PACKET)
-+					zlog_debug("%s: returning existing SRv6 SID %pI6 ctx %s",
-+						   __func__, &s->sid->value,
-+						   srv6_sid_ctx2str(buf,
-+								    sizeof(buf),
-+								    ctx));
-+				*sid = s->sid;
-+				return 0;
-+			}
-+
-+			/*
-+			 * It is not allowed to allocate an explicit SID for a given context if the context
-+			 * is already associated with an explicit SID
-+			 */
-+			if (s->sid->alloc_mode == SRV6_SID_ALLOC_MODE_EXPLICIT) {
-+				zlog_err("%s: cannot alloc SID %pI6 for ctx %s: ctx already associated with SID %pI6",
-+					 __func__, sid_value,
-+					 srv6_sid_ctx2str(buf, sizeof(buf),
-+							  &s->ctx),
-+					 &s->sid->value);
-+				return -1;
-+			}
-+
-+			zctx = s;
-+			break;
-+		}
-+	}
-+
-+	/* Get parent locator and function of the provided SID */
-+	if (!zebra_srv6_sid_decompose(sid_value, &block, &locator, &sid_func,
-+				      &sid_func_wide)) {
-+		zlog_err("%s: invalid SM request arguments: parent block/locator not found for SID %pI6",
-+			 __func__, sid_value);
-+		return -1;
-+	}
-+
-+	if (ctx->behavior == ZEBRA_SEG6_LOCAL_ACTION_END) {
-+		zlog_err("%s: invalid SM request arguments: explicit SID allocation not allowed for End/uN behavior",
-+			 __func__);
-+		return -1;
-+	}
-+
-+	/* Allocate an explicit SID function for the SID */
-+	if (!alloc_srv6_sid_func_explicit(block, sid_func, sid_func_wide)) {
-+		zlog_err("%s: invalid SM request arguments: failed to allocate SID function %u from block %pFX",
-+			 __func__, sid_func, &block->prefix);
-+		return -1;
-+	}
-+
-+	if (!zctx) {
-+		/* If we don't have a zebra SID context for this context, allocate a new one */
-+		zctx = zebra_srv6_sid_ctx_alloc();
-+		zctx->ctx = *ctx;
-+	} else {
-+		/*
-+		 * If we already have a SID associated with this context, we need to
-+		 * deallocate the current SID function before allocating the new one
-+		 */
-+		if (zctx->sid) {
-+			if (IS_ZEBRA_DEBUG_PACKET)
-+				zlog_debug("%s: ctx %s already associated with a dynamic SID %pI6, releasing dynamic SID",
-+					   __func__,
-+					   srv6_sid_ctx2str(buf, sizeof(buf),
-+							    ctx),
-+					   &zctx->sid->value);
-+
-+			release_srv6_sid_func_dynamic(block, zctx->sid->func);
-+			zebra_srv6_sid_free(zctx->sid);
-+			zctx->sid = NULL;
-+		}
-+	}
-+
-+	/* Allocate the SID to store SID information */
-+	*sid = zebra_srv6_sid_alloc(zctx, sid_value, locator, block, sid_func,
-+				    SRV6_SID_ALLOC_MODE_EXPLICIT);
-+	if (!(*sid)) {
-+		flog_err(EC_ZEBRA_SM_CANNOT_ASSIGN_SID,
-+			 "%s: failed to create SRv6 SID %s (%pI6)", __func__,
-+			 srv6_sid_ctx2str(buf, sizeof(buf), ctx), sid_value);
-+		return -1;
-+	}
-+	(*sid)->ctx = zctx;
-+	zctx->sid = *sid;
-+	listnode_add(srv6->sids, zctx);
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: allocated explicit SRv6 SID %pI6 for context %s",
-+			   __func__, &(*sid)->value,
-+			   srv6_sid_ctx2str(buf, sizeof(buf), ctx));
-+
-+	return 1;
-+}
-+
-+/**
-+ * Get a dynamic SID (i.e., any available SID value) for a given context.
-+ *
-+ * If a SID already exists associated with the context, it returns the existing SID.
-+ * Otherwise, it allocates a new SID.
-+ *
-+ * @param sid SID returned
-+ * @param ctx Context for which the SID has been requested
-+ * @param locator SRv6 locator from which the SID has to be allocated
-+ *
-+ * @return 0 if the function returned an existing SID and SID value has not changed,
-+ * 1 if a new SID has been allocated or the existing SID value has changed, -1 if an error occurred
-+ */
-+static int get_srv6_sid_dynamic(struct zebra_srv6_sid **sid,
-+				struct srv6_sid_ctx *ctx,
-+				struct srv6_locator *locator)
-+{
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+	struct zebra_srv6_sid_block *block;
-+	struct srv6_sid_format *format;
-+	struct zebra_srv6_sid_ctx *s = NULL;
-+	struct zebra_srv6_sid_ctx *zctx;
-+	struct listnode *node;
-+	struct in6_addr sid_value;
-+	uint32_t sid_func = 0;
-+	char buf[256];
-+
-+	if (!ctx || !locator)
-+		return -1;
-+
-+	block = locator->sid_block;
-+	format = locator->sid_format;
-+
-+	/*
-+	 * If we already have a SID for the provided context, we return the existing
-+	 * SID instead of allocating a new one.
-+	 */
-+	for (ALL_LIST_ELEMENTS_RO(srv6->sids, node, s)) {
-+		if (locator && s->sid && s->sid->locator) {
-+			if (strncmp(s->sid->locator->name, locator->name,
-+				    SRV6_LOCNAME_SIZE)) {
-+				continue;
-+			}
-+		}
-+		if (memcmp(&s->ctx, ctx, sizeof(struct srv6_sid_ctx)) == 0) {
-+			if (IS_ZEBRA_DEBUG_PACKET)
-+				zlog_debug("%s: returning existing SID %s %pI6",
-+					   __func__,
-+					   srv6_sid_ctx2str(buf, sizeof(buf),
-+							    ctx),
-+					   &s->sid->value);
-+			*sid = s->sid;
-+			return 0;
-+		}
-+	}
-+
-+	if (format && format->type == SRV6_SID_FORMAT_TYPE_USID &&
-+	    ctx->behavior == ZEBRA_SEG6_LOCAL_ACTION_END) {
-+		/* uN SID is allocated from the GIB range */
-+		sid_value = locator->prefix.prefix;
-+	} else if (!format && ctx->behavior == ZEBRA_SEG6_LOCAL_ACTION_END) {
-+		/* uN SID is allocated from the GIB range */
-+		sid_value = locator->prefix.prefix;
-+	} else {
-+		/* Allocate a dynamic SID function for the SID */
-+		if (!alloc_srv6_sid_func_dynamic(block, &sid_func)) {
-+			zlog_err("%s: invalid SM request arguments: failed to allocate SID function %u from block %pFX",
-+				 __func__, sid_func, &block->prefix);
-+			return -1;
-+		}
-+
-+		/* Compose the SID as the locator followed by the SID function */
-+		zebra_srv6_sid_compose(&sid_value, locator, sid_func);
-+	}
-+
-+	/* Allocate a zebra SID context to store SID context information */
-+	zctx = zebra_srv6_sid_ctx_alloc();
-+	zctx->ctx = *ctx;
-+
-+	/* Allocate the SID to store SID information */
-+	*sid = zebra_srv6_sid_alloc(zctx, &sid_value, locator, block, sid_func,
-+				    SRV6_SID_ALLOC_MODE_DYNAMIC);
-+	if (!(*sid)) {
-+		flog_err(EC_ZEBRA_SM_CANNOT_ASSIGN_SID,
-+			 "%s: failed to create SRv6 SID ctx %s (%pI6)", __func__,
-+			 srv6_sid_ctx2str(buf, sizeof(buf), ctx), &sid_value);
-+		return -1;
-+	}
-+	(*sid)->ctx = zctx;
-+	zctx->sid = *sid;
-+	listnode_add(srv6->sids, zctx);
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: allocated new dynamic SRv6 SID %pI6 for context %s",
-+			   __func__, &(*sid)->value,
-+			   srv6_sid_ctx2str(buf, sizeof(buf), ctx));
-+
-+	return 1;
-+}
-+
-+/**
-+ * Get an SRv6 SID for a given context.
-+ *
-+ * If a SID already exists associated with the context, it returns the existing SID.
-+ * Otherwise, it allocates a new SID.
-+ *
-+ * If the sid_value parameter is non-NULL, it allocates the requested SID value
-+ * if it is available (explicit SID allocation).
-+ * If the sid_value parameter is NULL, it allocates any available SID value
-+ * (dynamic SID allocation).
-+ *
-+ * @param sid SID returned
-+ * @param ctx Context for which the SID has been requested
-+ * @param sid_value SRv6 SID value to be allocated (for explicit SID allocation)
-+ * @param locator_name Parent SRv6 locator from which the SID has to be allocated (for dynamic SID allocation)
-+ *
-+ * @return 0 if the function returned an existing SID and SID value has not changed,
-+ * 1 if a new SID has been allocated or the existing SID value has changed, -1 if an error occurred
-+ */
-+int get_srv6_sid(struct zebra_srv6_sid **sid, struct srv6_sid_ctx *ctx,
-+		 struct in6_addr *sid_value, const char *locator_name)
-+{
-+	int ret = -1;
-+	struct srv6_locator *locator;
-+	char buf[256];
-+
-+	enum srv6_sid_alloc_mode alloc_mode =
-+		(sid_value) ? SRV6_SID_ALLOC_MODE_EXPLICIT
-+			    : SRV6_SID_ALLOC_MODE_DYNAMIC;
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: received SRv6 SID alloc request: SID ctx %s (%pI6), mode=%s",
-+			   __func__, srv6_sid_ctx2str(buf, sizeof(buf), ctx),
-+			   sid_value, srv6_sid_alloc_mode2str(alloc_mode));
-+
-+	switch (alloc_mode) {
-+	case SRV6_SID_ALLOC_MODE_EXPLICIT:
-+		/*
-+		 * Explicit SID allocation: allocate a specific SID value
-+		 */
-+
-+		if (!sid_value) {
-+			zlog_err("%s: invalid SM request arguments: missing SRv6 SID value, necessary for explicit allocation",
-+				 __func__);
-+			return -1;
-+		}
-+
-+		ret = get_srv6_sid_explicit(sid, ctx, sid_value);
-+
-+		break;
-+	case SRV6_SID_ALLOC_MODE_DYNAMIC:
-+		/*
-+		 * Dynamic SID allocation: allocate any available SID value
-+		 */
-+
-+		if (!locator_name) {
-+			zlog_err("%s: invalid SM request arguments: missing SRv6 locator, necessary for dynamic allocation",
-+				 __func__);
-+			return -1;
-+		}
-+
-+		locator = zebra_srv6_locator_lookup(locator_name);
-+		if (!locator) {
-+			zlog_err("%s: invalid SM request arguments: SRv6 locator '%s' does not exist",
-+				 __func__, locator_name);
-+			return -1;
-+		}
-+
-+		ret = get_srv6_sid_dynamic(sid, ctx, locator);
-+
-+		break;
-+	case SRV6_SID_ALLOC_MODE_MAX:
-+	case SRV6_SID_ALLOC_MODE_UNSPEC:
-+	default:
-+		flog_err(EC_ZEBRA_SM_CANNOT_ASSIGN_SID,
-+			 "%s: SRv6 Manager: Unrecognized alloc mode %u",
-+			 __func__, alloc_mode);
-+		/* We should never arrive here */
-+		assert(0);
-+	}
-+
-+	return ret;
-+}
-+
-+/**
-+ * Release an explicit SRv6 SID function.
-+ *
-+ * @param block Parent SRv6 SID block of the SID function that has to be released
-+ * @param sid_func SID function to be released
-+ * @return 0 on success, -1 otherwise
-+ */
-+static bool release_srv6_sid_func_explicit(struct zebra_srv6_sid_block *block,
-+					   uint32_t sid_func,
-+					   uint32_t sid_wide_func)
-+{
-+	struct srv6_sid_format *format;
-+	struct listnode *node;
-+	uint32_t *sid_func_ptr = NULL;
-+
-+	if (!block)
-+		return -1;
-+
-+	format = block->sid_format;
-+
-+	if (ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: trying to release explicit SRv6 SID function %u from block %pFX",
-+			   __func__, sid_func, &block->prefix);
-+
-+	/*
-+	 * Release SID function from the corresponding range depending on the SID format type
-+	 */
-+	if (format) {
-+		if (format->type == SRV6_SID_FORMAT_TYPE_USID) {
-+			uint32_t elib_start = format->config.usid.elib_start;
-+			uint32_t elib_end = format->config.usid.elib_end;
-+			uint32_t ewlib_start = format->config.usid.ewlib_start;
-+			uint32_t ewlib_end = format->config.usid.wlib_end;
-+			uint32_t *sid_wide_func_ptr = NULL;
-+
-+			/* Figure out the range from which the SID function has been allocated and release it */
-+			if ((sid_func >= elib_start) && (sid_func <= elib_end)) {
-+				/* The SID function comes from the ELIB range */
-+
-+				/* Lookup SID function in the functions allocated list of ELIB range */
-+				for (ALL_LIST_ELEMENTS_RO(block->u.usid.lib
-+								  .func_allocated,
-+							  node, sid_func_ptr))
-+					if (*sid_func_ptr == sid_func)
-+						break;
-+
-+				/* Ensure that the SID function is allocated */
-+				if (!sid_func_ptr) {
-+					zlog_warn("%s: failed to release SID function %u, function is not allocated",
-+						  __func__, sid_func);
-+					return -1;
-+				}
-+
-+				/* Release the SID function from the ELIB range */
-+				listnode_delete(block->u.usid.lib.func_allocated,
-+						sid_func_ptr);
-+				zebra_srv6_sid_func_free(sid_func_ptr);
-+			} else if ((sid_func >= ewlib_start) &&
-+				   (sid_func <= ewlib_end)) {
-+				/* The SID function comes from the EWLIB range */
-+
-+				/* Lookup SID function in the functions allocated list of EWLIB range */
-+				for (ALL_LIST_ELEMENTS_RO(block->u.usid
-+								  .wide_lib[sid_func]
-+								  .func_allocated,
-+							  node, sid_func_ptr))
-+					if (*sid_wide_func_ptr == sid_wide_func)
-+						break;
-+
-+				/* Ensure that the SID function is allocated */
-+				if (!sid_wide_func_ptr) {
-+					zlog_warn("%s: failed to release wide SID function %u, function is not allocated",
-+						  __func__, sid_wide_func);
-+					return -1;
-+				}
-+
-+				/* Release the SID function from the EWLIB range */
-+				listnode_delete(block->u.usid.wide_lib[sid_func]
-+							.func_allocated,
-+						sid_wide_func_ptr);
-+				zebra_srv6_sid_func_free(sid_wide_func_ptr);
-+			} else {
-+				zlog_warn("%s: function %u is outside ELIB [%u/%u] and EWLIB alloc ranges [%u/%u]",
-+					  __func__, sid_func, elib_start,
-+					  elib_end, ewlib_start, ewlib_end);
-+				return -1;
-+			}
-+		} else if (format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) {
-+			uint32_t explicit_start =
-+				format->config.uncompressed.explicit_start;
-+			uint32_t explicit_end =
-+				(uint32_t)((1 << format->function_len) - 1);
-+
-+			/* Ensure that the SID function comes from the Explicit range */
-+			if (!(sid_func >= explicit_start &&
-+			      sid_func <= explicit_end)) {
-+				zlog_warn("%s: function %u is outside explicit alloc range [%u/%u]",
-+					  __func__, sid_func, explicit_start,
-+					  explicit_end);
-+				return -1;
-+			}
-+
-+			/* Lookup SID function in the functions allocated list of Explicit range */
-+			for (ALL_LIST_ELEMENTS_RO(block->u.uncompressed
-+							  .func_allocated,
-+						  node, sid_func_ptr))
-+				if (*sid_func_ptr == sid_func)
-+					break;
-+
-+			/* Ensure that the SID function is allocated */
-+			if (!sid_func_ptr) {
-+				zlog_warn("%s: failed to release SID function %u, function is not allocated",
-+					  __func__, sid_func);
-+				return -1;
-+			}
-+
-+			/* Release the SID function from the Explicit range */
-+			listnode_delete(block->u.uncompressed.func_allocated,
-+					sid_func_ptr);
-+			zebra_srv6_sid_func_free(sid_func_ptr);
-+		} else {
-+			/* We should never arrive here */
-+			assert(0);
-+		}
-+	} else {
-+		/* Lookup SID function in the functions allocated list of Explicit range */
-+		for (ALL_LIST_ELEMENTS_RO(block->u.uncompressed.func_allocated,
-+					  node, sid_func_ptr))
-+			if (*sid_func_ptr == sid_func)
-+				break;
-+
-+		/* Ensure that the SID function is allocated */
-+		if (!sid_func_ptr) {
-+			zlog_warn("%s: failed to release SID function %u, function is not allocated",
-+				  __func__, sid_func);
-+			return -1;
-+		}
-+
-+		/* Release the SID function from the Explicit range */
-+		listnode_delete(block->u.uncompressed.func_allocated,
-+				sid_func_ptr);
-+		zebra_srv6_sid_func_free(sid_func_ptr);
-+	}
-+
-+	if (ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: released explicit SRv6 SID function %u from block %pFX",
-+			   __func__, sid_func, &block->prefix);
-+
-+	return 0;
-+}
-+
-+/**
-+ *  Release a dynamic SRv6 SID function.
-+ *
-+ * @param block Parent SRv6 SID block of the SID function that has to be released
-+ * @param sid_func SID function to be released
-+ * @return 0 on success, -1 otherwise
-+ */
-+static int release_srv6_sid_func_dynamic(struct zebra_srv6_sid_block *block,
-+					 uint32_t sid_func)
-+{
-+	struct srv6_sid_format *format;
-+	struct listnode *node, *nnode;
-+	uint32_t *sid_func_ptr = NULL;
-+
-+	if (!block)
-+		return -1;
-+
-+	format = block->sid_format;
-+
-+	if (ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: trying to release dynamic SRv6 SID function %u from block %pFX",
-+			   __func__, sid_func, &block->prefix);
-+
-+	/*
-+	 * Release SID function from the corresponding range depending on the SID format type
-+	 */
-+	if (format && format->type == SRV6_SID_FORMAT_TYPE_USID) {
-+		uint32_t dlib_start = format->config.usid.lib_start;
-+		/* The Dynamic LIB range ends where the Explicit LIB range begins */
-+		uint32_t dlib_end = format->config.usid.elib_start - 1;
-+
-+		/* Ensure that the SID function to be released comes from the Dynamic LIB (DLIB) range */
-+		if (!(sid_func >= dlib_start && sid_func <= dlib_end)) {
-+			zlog_warn("%s: function %u is outside Dynamic LIB range [%u/%u]",
-+				  __func__, sid_func, dlib_start, dlib_end);
-+			return -1;
-+		}
-+
-+		if (sid_func == block->u.usid.lib.first_available_func - 1) {
-+			/*
-+			 * The SID function to be released precedes the `first_available_func`.
-+			 * Reset first_available_func to the first available position.
-+			 */
-+
-+			block->u.usid.lib.first_available_func -= 1;
-+
-+			bool found;
-+
-+			do {
-+				found = false;
-+				for (ALL_LIST_ELEMENTS(block->u.usid.lib
-+							       .func_released,
-+						       node, nnode,
-+						       sid_func_ptr))
-+					if (*sid_func_ptr ==
-+					    block->u.usid.lib.first_available_func -
-+						    1) {
-+						listnode_delete(block->u.usid
-+									.lib
-+									.func_released,
-+								sid_func_ptr);
-+						zebra_srv6_sid_func_free(
-+							sid_func_ptr);
-+						block->u.usid.lib
-+							.first_available_func -=
-+							1;
-+						found = true;
-+						break;
-+					}
-+			} while (found);
-+		} else {
-+			/*
-+			 * The SID function to be released does not precede the `first_available_func`.
-+			 * Add the released function to the func_released array to indicate
-+			 * that it is available again for allocation.
-+			 */
-+			sid_func_ptr = zebra_srv6_sid_func_alloc(sid_func);
-+			listnode_add_head(block->u.usid.lib.func_released,
-+					  sid_func_ptr);
-+		}
-+	} else if (format && format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) {
-+		uint32_t dynamic_start =
-+			SRV6_SID_FORMAT_UNCOMPRESSED_F4024_FUNC_UNRESERVED_MIN;
-+		/* The Dynamic range ends where the Explicit range begins */
-+		uint32_t dynamic_end =
-+			format->config.uncompressed.explicit_start - 1;
-+
-+		/* Ensure that the SID function to be released comes from the Dynamic range */
-+		if (!(sid_func >= dynamic_start && sid_func <= dynamic_end)) {
-+			zlog_warn("%s: function %u is outside dynamic range [%u/%u]",
-+				  __func__, sid_func, dynamic_start,
-+				  dynamic_end);
-+			return -1;
-+		}
-+
-+		if (sid_func == block->u.uncompressed.first_available_func - 1) {
-+			/*
-+			 * The released SID function precedes the `first_available_func`.
-+			 * Reset first_available_func to the first available position.
-+			 */
-+
-+			block->u.uncompressed.first_available_func -= 1;
-+
-+			bool found;
-+
-+			do {
-+				found = false;
-+				for (ALL_LIST_ELEMENTS(block->u.uncompressed
-+							       .func_released,
-+						       node, nnode,
-+						       sid_func_ptr))
-+					if (*sid_func_ptr ==
-+					    block->u.uncompressed
-+							    .first_available_func -
-+						    1) {
-+						listnode_delete(block->u.uncompressed
-+									.func_released,
-+								sid_func_ptr);
-+						zebra_srv6_sid_func_free(
-+							sid_func_ptr);
-+						block->u.uncompressed
-+							.first_available_func -=
-+							1;
-+						found = true;
-+						break;
-+					}
-+			} while (found);
-+		} else {
-+			/*
-+			 * The released SID function does not precede the `first_available_func`.
-+			 * Add the released function to the func_released array to indicate
-+			 * that it is available again for allocation.
-+			 */
-+			sid_func_ptr = zebra_srv6_sid_func_alloc(sid_func);
-+			listnode_add_head(block->u.uncompressed.func_released,
-+					  sid_func_ptr);
-+		}
-+	} else if (!format) {
-+		if (sid_func == block->u.uncompressed.first_available_func - 1) {
-+			/*
-+			 * The released SID function precedes the `first_available_func`.
-+			 * Reset first_available_func to the first available position.
-+			 */
-+
-+			block->u.uncompressed.first_available_func -= 1;
-+
-+			bool found;
-+
-+			do {
-+				found = false;
-+				for (ALL_LIST_ELEMENTS(block->u.uncompressed
-+							       .func_released,
-+						       node, nnode,
-+						       sid_func_ptr))
-+					if (*sid_func_ptr ==
-+					    block->u.uncompressed
-+							    .first_available_func -
-+						    1) {
-+						listnode_delete(block->u.uncompressed
-+									.func_released,
-+								sid_func_ptr);
-+						zebra_srv6_sid_func_free(
-+							sid_func_ptr);
-+						block->u.uncompressed
-+							.first_available_func -=
-+							1;
-+						found = true;
-+						break;
-+					}
-+			} while (found);
-+		} else {
-+			/*
-+			 * The released SID function does not precede the `first_available_func`.
-+			 * Add the released function to the func_released array to indicate
-+			 * that it is available again for allocation.
-+			 */
-+			sid_func_ptr = zebra_srv6_sid_func_alloc(sid_func);
-+			listnode_add_head(block->u.uncompressed.func_released,
-+					  sid_func_ptr);
-+		}
-+	}
-+
-+	if (ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: released dynamic SRv6 SID function %u from block %pFX",
-+			   __func__, sid_func, &block->prefix);
-+
-+	return 0;
-+}
-+
-+/**
-+ * Core function, release the SRv6 SID associated with a given context.
-+ *
-+ * @param client The client for which the SID has to be released
-+ * @param ctx Context associated with the SRv6 SID to be released
-+ * @return 0 on success, -1 otherwise
-+ */
-+int release_srv6_sid(struct zserv *client, struct zebra_srv6_sid_ctx *zctx)
-+{
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+	char buf[256];
-+
-+	if (!zctx || !zctx->sid)
-+		return -1;
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: releasing SRv6 SID %pI6 associated with ctx %s (proto=%u, instance=%u)",
-+			   __func__, &zctx->sid->value,
-+			   srv6_sid_ctx2str(buf, sizeof(buf), &zctx->ctx),
-+			   client->proto, client->instance);
-+
-+	/* Ensures the SID is in use by the client */
-+	if (!listnode_lookup(zctx->sid->client_list, client)) {
-+		flog_err(EC_ZEBRA_SM_DAEMON_MISMATCH, "%s: Daemon mismatch!!",
-+			 __func__);
-+		return -1;
-+	}
-+
-+	/* Remove the client from the list of clients using the SID */
-+	listnode_delete(zctx->sid->client_list, client);
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: released SRv6 SID %pI6 associated with ctx %s (proto=%u, instance=%u)",
-+			   __func__, &zctx->sid->value,
-+			   srv6_sid_ctx2str(buf, sizeof(buf), &zctx->ctx),
-+			   client->proto, client->instance);
-+
-+	/*
-+	 * If the SID is not used by any other client, then deallocate it
-+	 * and remove it from the SRv6 database.
-+	 */
-+	if (listcount(zctx->sid->client_list) == 0) {
-+		if (IS_ZEBRA_DEBUG_PACKET)
-+			zlog_debug("%s: SRv6 SID %pI6 associated with ctx %s is no longer in use, removing it from SRv6 database",
-+				   __func__, &zctx->sid->value,
-+				   srv6_sid_ctx2str(buf, sizeof(buf),
-+						    &zctx->ctx));
-+
-+		if (!(zctx->sid->block->sid_format &&
-+		      zctx->sid->block->sid_format->type ==
-+			      SRV6_SID_FORMAT_TYPE_USID &&
-+		      zctx->ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END) &&
-+		    !(!zctx->sid->block->sid_format &&
-+		      zctx->ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END)) {
-+			if (zctx->sid->alloc_mode ==
-+			    SRV6_SID_ALLOC_MODE_EXPLICIT)
-+				/* Release SRv6 SID function */
-+				release_srv6_sid_func_explicit(zctx->sid->block,
-+							       zctx->sid->func,
-+							       zctx->sid->wide_func);
-+			else if (zctx->sid->alloc_mode ==
-+				 SRV6_SID_ALLOC_MODE_DYNAMIC)
-+				/* Release SRv6 SID function */
-+				release_srv6_sid_func_dynamic(zctx->sid->block,
-+							      zctx->sid->func);
-+			else
-+				/* We should never arrive here */
-+				assert(0);
-+		}
-+
-+		/* Free the SID */
-+		zebra_srv6_sid_free(zctx->sid);
-+		zctx->sid = NULL;
-+
-+		/* Remove the SID context from the list and free memory */
-+		listnode_delete(srv6->sids, zctx);
-+		zebra_srv6_sid_ctx_free(zctx);
-+	}
-+
-+	return 0;
-+}
-+
-+/**
-+ * Handle a get SRv6 Locator request received from a client.
-+ *
-+ * It looks up the requested locator and send it to the client.
-+ *
-+ * @param locator SRv6 locator returned by this function
-+ * @param client The client that sent the Get SRv6 Locator request
-+ * @param locator_name Name of the locator to look up
-+ *
-+ * @return 0 on success
-+ */
-+static int srv6_manager_get_srv6_locator_internal(struct srv6_locator **locator,
-+						  struct zserv *client,
-+						  const char *locator_name)
-+{
-+	*locator = zebra_srv6_locator_lookup(locator_name);
-+	if (!*locator)
-+		return -1;
-+
-+	return zsend_zebra_srv6_locator_add(client, *locator);
-+}
-+
-+/**
-+ * Handle a get SID request received from a client.
-+ *
-+ * It gets a SID for a given context. If there is no SID associated with the context yet,
-+ * we allocate one and return it to the client. Otherwise, we return the existing SID.
-+ *
-+ * - When the `sid_value` parameter is non-NULL, SRv6 Manager assigns the requested SID value
-+ *   if it is available (explicit SID allocation).
-+ * - When the `sid_value` parameter is NULL, SRv6 Manager assigns any available SID value
-+ *   (dynamic SID allocation).
-+ *
-+ * Finally, notify the client whether the SID allocation was successful or failed.
-+ *
-+ * @param sid SID returned by this function
-+ * @param client The client that requested the SID
-+ * @param ctx Context for which the SID was requested
-+ * @param sid_value SID value (i.e., IPv6 address) that has to be assigned to the SID
-+ *                  (for explicit SID allocation)
-+ * @param locator_name Locator from which the SID has to be allocated (for dynamic SID allocation)
-+ *
-+ * @return 0 on success, -1 otherwise
-+ */
-+static int srv6_manager_get_sid_internal(struct zebra_srv6_sid **sid,
-+					 struct zserv *client,
-+					 struct srv6_sid_ctx *ctx,
-+					 struct in6_addr *sid_value,
-+					 const char *locator_name)
-+{
-+	int ret = -1;
-+	struct listnode *node;
-+	struct zserv *c;
-+	char buf[256];
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: getting SRv6 SID for ctx %s, sid_value=%pI6, locator_name=%s",
-+			   __func__, srv6_sid_ctx2str(buf, sizeof(buf), ctx),
-+			   sid_value ? sid_value : &in6addr_any, locator_name);
-+
-+	ret = get_srv6_sid(sid, ctx, sid_value, locator_name);
-+	if (ret < 0) {
-+		zlog_warn("%s: not got SRv6 SID for ctx %s, sid_value=%pI6, locator_name=%s",
-+			  __func__, srv6_sid_ctx2str(buf, sizeof(buf), ctx),
-+			  sid_value ? sid_value : &in6addr_any, locator_name);
-+
-+		/* Notify client about SID alloc failure */
-+		zsend_srv6_sid_notify(client, ctx, sid_value, 0, 0, NULL,
-+				      ZAPI_SRV6_SID_FAIL_ALLOC);
-+	} else if (ret == 0) {
-+		if (IS_ZEBRA_DEBUG_PACKET)
-+			zlog_debug("%s: got existing SRv6 SID for ctx %s: sid_value=%pI6 (func=%u) (proto=%u, instance=%u, sessionId=%u), notify client",
-+				   __func__,
-+				   srv6_sid_ctx2str(buf, sizeof(buf), ctx),
-+				   &(*sid)->value, (*sid)->func, client->proto,
-+				   client->instance, client->session_id);
-+		if (!listnode_lookup((*sid)->client_list, client))
-+			listnode_add((*sid)->client_list, client);
-+
-+		zsend_srv6_sid_notify(client, ctx, &(*sid)->value, (*sid)->func,
-+				      (*sid)->wide_func,
-+				      (*sid)->locator ? (*sid)->locator->name
-+						      : NULL,
-+				      ZAPI_SRV6_SID_ALLOCATED);
-+	} else {
-+		if (IS_ZEBRA_DEBUG_PACKET)
-+			zlog_debug("%s: got new SRv6 SID for ctx %s: sid_value=%pI6 (func=%u) (proto=%u, instance=%u, sessionId=%u), notifying all clients",
-+				   __func__,
-+				   srv6_sid_ctx2str(buf, sizeof(buf), ctx),
-+				   &(*sid)->value, (*sid)->func, client->proto,
-+				   client->instance, client->session_id);
-+		if (!listnode_lookup((*sid)->client_list, client))
-+			listnode_add((*sid)->client_list, client);
-+
-+		for (ALL_LIST_ELEMENTS_RO((*sid)->client_list, node, c))
-+			zsend_srv6_sid_notify(c, ctx, &(*sid)->value,
-+					      (*sid)->func, (*sid)->wide_func,
-+					      (*sid)->locator
-+						      ? (*sid)->locator->name
-+						      : NULL,
-+					      ZAPI_SRV6_SID_ALLOCATED);
-+	}
-+
-+	return ret;
-+}
-+
-+/**
-+ * Release SRv6 SIDs from a client.
-+ *
-+ * Called on client disconnection or reconnection.
-+ *
-+ * @param client The client to release SIDs from
-+ * @return Number of SIDs released
-+ */
-+int release_daemon_srv6_sids(struct zserv *client)
-+{
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+	struct listnode *node, *nnode;
-+	struct zebra_srv6_sid_ctx *ctx;
-+	int count = 0;
-+	int ret;
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: releasing SRv6 SIDs for client proto %s, instance %d, session %u",
-+			   __func__, zebra_route_string(client->proto),
-+			   client->instance, client->session_id);
-+
-+	/* Iterate over the SIDs and release SIDs used by the client daemon */
-+	for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, ctx)) {
-+		if (!listnode_lookup(ctx->sid->client_list, client))
-+			continue;
-+
-+		ret = release_srv6_sid(client, ctx);
-+		if (ret == 0)
-+			count++;
-+	}
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: released %d SRv6 SIDs", __func__, count);
-+
-+	return count;
-+}
-+
-+/**
-+ * Release SRv6 SIDs from a client.
-+ *
-+ * @param client The client zapi session
-+ * @param ctx Context associated with the SRv6 SID
-+ * @return 0 on success, -1 on failure
-+ */
-+static int srv6_manager_release_sid_internal(struct zserv *client,
-+					     struct srv6_sid_ctx *ctx)
-+{
-+	int ret = -1;
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+	struct zebra_srv6_sid_ctx *zctx;
-+	struct listnode *node, *nnode;
-+	char buf[256];
-+	const char *locator_name = NULL;
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: releasing SRv6 SID associated with ctx %s",
-+			   __func__, srv6_sid_ctx2str(buf, sizeof(buf), ctx));
-+
-+	/* Lookup Zebra SID context and release it */
-+	for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, zctx))
-+		if (memcmp(&zctx->ctx, ctx, sizeof(struct srv6_sid_ctx)) == 0) {
-+			if (zctx->sid && zctx->sid->locator)
-+				locator_name =
-+					(const char *)zctx->sid->locator->name;
-+			ret = release_srv6_sid(client, zctx);
-+			break;
-+		}
-+
-+	if (IS_ZEBRA_DEBUG_PACKET)
-+		zlog_debug("%s: no SID associated with ctx %s", __func__,
-+			   srv6_sid_ctx2str(buf, sizeof(buf), ctx));
-+
-+	if (ret == 0)
-+		zsend_srv6_sid_notify(client, ctx, NULL, 0, 0, locator_name,
-+				      ZAPI_SRV6_SID_RELEASED);
-+	else
-+		zsend_srv6_sid_notify(client, ctx, NULL, 0, 0, locator_name,
-+				      ZAPI_SRV6_SID_FAIL_RELEASE);
-+
-+	return ret;
-+}
-+
-+void zebra_srv6_terminate(void)
-+{
-+	struct srv6_locator *locator;
-+	struct srv6_sid_format *format;
-+	struct zebra_srv6_sid_block *block;
-+	struct zebra_srv6_sid_ctx *sid_ctx;
-+
-+	if (srv6.locators) {
-+		while (listcount(srv6.locators)) {
-+			locator = listnode_head(srv6.locators);
-+
-+			listnode_delete(srv6.locators, locator);
-+			srv6_locator_free(locator);
-+		}
-+
-+		list_delete(&srv6.locators);
-+	}
-+
-+	/* Free SRv6 SIDs */
-+	if (srv6.sids) {
-+		while (listcount(srv6.sids)) {
-+			sid_ctx = listnode_head(srv6.sids);
-+
-+			listnode_delete(srv6.sids, sid_ctx);
-+			zebra_srv6_sid_ctx_free(sid_ctx);
-+		}
-+
-+		list_delete(&srv6.sids);
-+	}
-+
-+	/* Free SRv6 SID blocks */
-+	if (srv6.sid_blocks) {
-+		while (listcount(srv6.sid_blocks)) {
-+			block = listnode_head(srv6.sid_blocks);
-+
-+			listnode_delete(srv6.sid_blocks, block);
-+			zebra_srv6_sid_block_free(block);
-+		}
-+
-+		list_delete(&srv6.sid_blocks);
-+	}
-+
-+	/* Free SRv6 SID formats */
-+	if (srv6.sid_formats) {
-+		while (listcount(srv6.sid_formats)) {
-+			format = listnode_head(srv6.sid_formats);
-+
-+			srv6_sid_format_unregister(format);
-+			srv6_sid_format_free(format);
-+		}
-+
-+		list_delete(&srv6.sid_formats);
-+	}
-+}
-+
-+void zebra_srv6_init(void)
-+{
-+	hook_register(zserv_client_close, zebra_srv6_cleanup);
-+	hook_register(srv6_manager_get_chunk,
-+		      zebra_srv6_manager_get_locator_chunk);
-+	hook_register(srv6_manager_release_chunk,
-+		      zebra_srv6_manager_release_locator_chunk);
-+
-+	hook_register(srv6_manager_get_sid, srv6_manager_get_sid_internal);
-+	hook_register(srv6_manager_release_sid,
-+		      srv6_manager_release_sid_internal);
-+	hook_register(srv6_manager_get_locator,
-+		      srv6_manager_get_srv6_locator_internal);
- }
- 
- bool zebra_srv6_is_enable(void)
-diff --git a/zebra/zebra_srv6.h b/zebra/zebra_srv6.h
-index 21936c332..1599fd7ad 100644
---- a/zebra/zebra_srv6.h
-+++ b/zebra/zebra_srv6.h
-@@ -16,12 +16,197 @@
- #include <pthread.h>
- #include <plist.h>
- 
-+/* Default config for SRv6 SID `usid-f3216` format */
-+#define SRV6_SID_FORMAT_USID_F3216_NAME		"usid-f3216"
-+#define SRV6_SID_FORMAT_USID_F3216_BLOCK_LEN	32
-+#define SRV6_SID_FORMAT_USID_F3216_NODE_LEN	16
-+#define SRV6_SID_FORMAT_USID_F3216_FUNCTION_LEN 16
-+#define SRV6_SID_FORMAT_USID_F3216_ARGUMENT_LEN 0
-+#define SRV6_SID_FORMAT_USID_F3216_LIB_START	0xE000
-+#define SRV6_SID_FORMAT_USID_F3216_ELIB_START	0xFE00
-+#define SRV6_SID_FORMAT_USID_F3216_ELIB_END	0xFEFF
-+#define SRV6_SID_FORMAT_USID_F3216_WLIB_START	0xFFF0
-+#define SRV6_SID_FORMAT_USID_F3216_WLIB_END	0xFFF7
-+#define SRV6_SID_FORMAT_USID_F3216_EWLIB_START	0xFFF7
-+
-+/* Default config for SRv6 SID `uncompressed` format */
-+#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME			"uncompressed-f4024"
-+#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_BLOCK_LEN		40
-+#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE_LEN		24
-+#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_FUNCTION_LEN		16
-+#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_ARGUMENT_LEN		0
-+#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_EXPLICIT_RANGE_START 0xFF00
-+#define SRV6_SID_FORMAT_UNCOMPRESSED_F4024_FUNC_UNRESERVED_MIN	0x40
-+
-+/* uSID Wide LIB */
-+struct wide_lib {
-+	uint32_t func;
-+	uint32_t num_func_allocated;
-+	uint32_t first_available_func;
-+	struct list *func_allocated;
-+	struct list *func_released;
-+};
-+
-+/*
-+ * SRv6 SID block.
-+ *
-+ * A SID block is an IPv6 prefix from which SRv6 SIDs are allocated.
-+ * Example:
-+ *   SID block = fc00:0::/32
-+ *   SID 1 = fc00:0:1:e000::
-+ *   SID 2 = fc00:0:1:fe00::
-+ *   ...
-+ */
-+struct zebra_srv6_sid_block {
-+	/*  Prefix of this block, e.g. fc00:0::/32 */
-+	struct prefix_ipv6 prefix;
-+
-+	/* Reference counter */
-+	unsigned long refcnt;
-+
-+	/*
-+	 * Pointer to the SID format that defines the structure of the SIDs
-+	 * allocated from this block
-+	 */
-+	struct srv6_sid_format *sid_format;
-+
-+	/*
-+	 * Run-time information/state of this SID block.
-+	 *
-+	 * This includes stuff like how many SID functions have been allocated
-+	 * from this block, which functions are still available to be allocated
-+	 * and so on...
-+	 */
-+	union {
-+		/* Information/state for compressed uSID format */
-+		struct {
-+			/* uSID Local ID Block (LIB) */
-+			struct {
-+				uint32_t num_func_allocated;
-+				uint32_t first_available_func;
-+				struct list *func_allocated;
-+				struct list *func_released;
-+			} lib;
-+
-+			/* uSID Wide LIB */
-+			struct wide_lib *wide_lib;
-+		} usid;
-+
-+		/* Information/state for uncompressed SID format */
-+		struct {
-+			uint32_t num_func_allocated;
-+			uint32_t first_available_func;
-+			struct list *func_allocated;
-+			struct list *func_released;
-+		} uncompressed;
-+	} u;
-+};
-+
-+/**
-+ * The function part of an SRv6 SID can be allocated in one
-+ * of the following ways:
-+ *  - dynamic: allocate any available function
-+ *  - explicit: allocate a specific function
-+ */
-+enum srv6_sid_alloc_mode {
-+	SRV6_SID_ALLOC_MODE_UNSPEC = 0,
-+	/* Dynamic SID allocation */
-+	SRV6_SID_ALLOC_MODE_DYNAMIC = 1,
-+	/* Explicit SID allocation */
-+	SRV6_SID_ALLOC_MODE_EXPLICIT = 2,
-+	SRV6_SID_ALLOC_MODE_MAX = 3,
-+};
-+
-+/**
-+ * Convert SID allocation mode to string.
-+ *
-+ * @param alloc_mode SID allocation mode
-+ * @return String representing the allocation mode
-+ */
-+static inline const char *
-+srv6_sid_alloc_mode2str(enum srv6_sid_alloc_mode alloc_mode)
-+{
-+	switch (alloc_mode) {
-+	case SRV6_SID_ALLOC_MODE_EXPLICIT:
-+		return "explicit";
-+	case SRV6_SID_ALLOC_MODE_DYNAMIC:
-+		return "dynamic";
-+	case SRV6_SID_ALLOC_MODE_UNSPEC:
-+		return "unspec";
-+	case SRV6_SID_ALLOC_MODE_MAX:
-+	default:
-+		return "unknown";
-+	}
-+}
-+
-+/* SRv6 SID instance. */
-+struct zebra_srv6_sid {
-+	/*
-+	 * SID context associated with the SID.
-+	 * Defines behavior and attributes of the SID.
-+	 */
-+	struct zebra_srv6_sid_ctx *ctx;
-+
-+	/* SID value (e.g. fc00:0:1:e000::) */
-+	struct in6_addr value;
-+
-+	/* Pointer to the SRv6 locator from which the SID has been allocated */
-+	struct srv6_locator *locator;
-+
-+	/* Pointer to the SRv6 block from which the SID has been allocated */
-+	struct zebra_srv6_sid_block *block;
-+
-+	/*
-+	 * Function part of the SID
-+	 * Example:
-+	 *   SID = fc00:0:1:e000:: => func = e000
-+	 */
-+	uint32_t func;
-+
-+	/* SID wide function. */
-+	uint32_t wide_func;
-+
-+	/* SID allocation mode: dynamic or explicit */
-+	enum srv6_sid_alloc_mode alloc_mode;
-+
-+	/* List of clients that are using the SID */
-+	struct list *client_list;
-+};
-+
-+/*
-+ * Zebra SRv6 SID context.
-+ * A context defines a behavior and (optionally) some behavior-specific
-+ * attributes. Client daemons (bgp, isis, ...) ask SRv6 Manager to allocate
-+ * a SID for a particular context. SRv6 Manager is responsible for allocating
-+ * a SID from a given SID block and associating with the context.
-+ *
-+ * Example:
-+ *    bgp asks to associate a SID to the context {behavior=End.DT46 vrf=Vrf10}.
-+ *    SRv6 Manager allocate SID fc00:0:1:e000:: for that context.
-+ */
-+struct zebra_srv6_sid_ctx {
-+	/* SRv6 SID context information. */
-+	struct srv6_sid_ctx ctx;
-+
-+	/* SID associated with the context. */
-+	struct zebra_srv6_sid *sid;
-+};
-+
- /* SRv6 instance structure. */
- struct zebra_srv6 {
- 	struct list *locators;
- 
- 	/* Source address for SRv6 encapsulation */
- 	struct in6_addr encap_src_addr;
-+
-+	/* SRv6 SID formats */
-+	struct list *sid_formats;
-+
-+	/* SRv6 SIDs */
-+	struct list *sids;
-+
-+	/* SRv6 SID blocks */
-+	struct list *sid_blocks;
- };
- 
- /* declare hooks for the basic API, so that it can be specialized or served
-@@ -46,6 +231,17 @@ DECLARE_HOOK(srv6_manager_release_chunk,
- 	      vrf_id_t vrf_id),
- 	     (client, locator_name, vrf_id));
- 
-+DECLARE_HOOK(srv6_manager_get_sid,
-+	     (struct zebra_srv6_sid **sid, struct zserv *client,
-+	      struct srv6_sid_ctx *ctx, struct in6_addr *sid_value,
-+	      const char *locator_name),
-+	     (sid, client, ctx, sid_value, locator_name));
-+DECLARE_HOOK(srv6_manager_release_sid,
-+	     (struct zserv *client, struct srv6_sid_ctx *ctx), (client, ctx));
-+DECLARE_HOOK(srv6_manager_get_locator,
-+	     (struct srv6_locator **locator, struct zserv *client,
-+	      const char *locator_name),
-+	     (locator, client, locator_name));
- 
- extern void zebra_srv6_locator_add(struct srv6_locator *locator);
- extern void zebra_srv6_locator_delete(struct srv6_locator *locator);
-@@ -74,4 +270,55 @@ extern int release_daemon_srv6_locator_chunks(struct zserv *client);
- extern void zebra_srv6_encap_src_addr_set(struct in6_addr *src_addr);
- extern void zebra_srv6_encap_src_addr_unset(void);
- 
-+void srv6_sid_format_register(struct srv6_sid_format *format);
-+void srv6_sid_format_unregister(struct srv6_sid_format *format);
-+struct srv6_sid_format *srv6_sid_format_lookup(const char *name);
-+void zebra_srv6_locator_format_set(struct srv6_locator *locator,
-+				   struct srv6_sid_format *format);
-+void zebra_srv6_sid_format_changed_cb(struct srv6_sid_format *format);
-+
-+uint32_t *zebra_srv6_sid_func_alloc(uint32_t func);
-+void zebra_srv6_sid_func_free(uint32_t *func);
-+void delete_zebra_srv6_sid_func(void *val);
-+
-+extern struct zebra_srv6_sid_block *
-+zebra_srv6_sid_block_alloc(struct srv6_sid_format *format,
-+			   struct prefix_ipv6 *prefix);
-+extern void zebra_srv6_sid_block_free(struct zebra_srv6_sid_block *block);
-+extern void delete_zebra_srv6_sid_block(void *val);
-+extern struct zebra_srv6_sid_block *
-+zebra_srv6_sid_block_lookup(struct prefix_ipv6 *prefix);
-+
-+extern struct zebra_srv6_sid *
-+zebra_srv6_sid_alloc(struct zebra_srv6_sid_ctx *ctx, struct in6_addr *sid_value,
-+		     struct srv6_locator *locator,
-+		     struct zebra_srv6_sid_block *sid_block, uint32_t sid_func,
-+		     enum srv6_sid_alloc_mode alloc_mode);
-+extern void zebra_srv6_sid_free(struct zebra_srv6_sid *sid);
-+extern void delete_zebra_srv6_sid(void *val);
-+
-+extern void srv6_manager_get_sid_call(struct zebra_srv6_sid **sid,
-+				      struct zserv *client,
-+				      struct srv6_sid_ctx *ctx,
-+				      struct in6_addr *sid_value,
-+				      const char *locator_name);
-+extern void srv6_manager_release_sid_call(struct zserv *client,
-+					  struct srv6_sid_ctx *ctx);
-+
-+extern void srv6_manager_get_locator_call(struct srv6_locator **locator,
-+					  struct zserv *client,
-+					  const char *locator_name);
-+
-+extern int get_srv6_sid(struct zebra_srv6_sid **sid, struct srv6_sid_ctx *ctx,
-+			struct in6_addr *sid_value, const char *locator_name);
-+extern int release_srv6_sid(struct zserv *client,
-+			    struct zebra_srv6_sid_ctx *zctx);
-+extern int release_daemon_srv6_sids(struct zserv *client);
-+extern int srv6_manager_get_sid_response(struct zebra_srv6_sid *sid,
-+					 struct zserv *client);
-+
-+extern struct zebra_srv6_sid_ctx *zebra_srv6_sid_ctx_alloc(void);
-+extern void zebra_srv6_sid_ctx_free(struct zebra_srv6_sid_ctx *ctx);
-+extern void delete_zebra_srv6_sid_ctx(void *val);
-+
- #endif /* _ZEBRA_SRV6_H */
-diff --git a/zebra/zebra_srv6_vty.c b/zebra/zebra_srv6_vty.c
-index d5cd30e64..c664a9c69 100644
---- a/zebra/zebra_srv6_vty.c
-+++ b/zebra/zebra_srv6_vty.c
-@@ -68,6 +68,27 @@ static struct cmd_node srv6_encap_node = {
- 	.prompt = "%s(config-srv6-encap)# "
- };
- 
-+static struct cmd_node srv6_sid_formats_node = {
-+	.name = "srv6-formats",
-+	.node = SRV6_SID_FORMATS_NODE,
-+	.parent_node = SRV6_NODE,
-+	.prompt = "%s(config-srv6-formats)# ",
-+};
-+
-+static struct cmd_node srv6_sid_format_usid_f3216_node = {
-+	.name = "srv6-format-usid-f3216",
-+	.node = SRV6_SID_FORMAT_USID_F3216_NODE,
-+	.parent_node = SRV6_SID_FORMATS_NODE,
-+	.prompt = "%s(config-srv6-format)# "
-+};
-+
-+static struct cmd_node srv6_sid_format_uncompressed_f4024_node = {
-+	.name = "srv6-format-uncompressed-f4024",
-+	.node = SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE,
-+	.parent_node = SRV6_SID_FORMATS_NODE,
-+	.prompt = "%s(config-srv6-format)# "
-+};
-+
- DEFPY (show_srv6_manager,
-        show_srv6_manager_cmd,
-        "show segment-routing srv6 manager [json]",
-@@ -198,15 +219,32 @@ DEFUN (show_srv6_locator_detail,
- 		prefix2str(&locator->prefix, str, sizeof(str));
- 		vty_out(vty, "Name: %s\n", locator->name);
- 		vty_out(vty, "Prefix: %s\n", str);
--		vty_out(vty, "Block-Bit-Len: %u\n", locator->block_bits_length);
--		vty_out(vty, "Node-Bit-Len: %u\n", locator->node_bits_length);
--		vty_out(vty, "Function-Bit-Len: %u\n",
--			locator->function_bits_length);
--		vty_out(vty, "Argument-Bit-Len: %u\n",
--			locator->argument_bits_length);
-+		if (locator->sid_format) {
-+			vty_out(vty, "Block-Bit-Len: %u\n",
-+				locator->sid_format->block_len);
-+			vty_out(vty, "Node-Bit-Len: %u\n",
-+				locator->sid_format->node_len);
-+			vty_out(vty, "Function-Bit-Len: %u\n",
-+				locator->sid_format->function_len);
-+			vty_out(vty, "Argument-Bit-Len: %u\n",
-+				locator->sid_format->argument_len);
-+
-+			if (locator->sid_format->type ==
-+			    SRV6_SID_FORMAT_TYPE_USID)
-+				vty_out(vty, "Behavior: uSID\n");
-+		} else {
-+			vty_out(vty, "Block-Bit-Len: %u\n",
-+				locator->block_bits_length);
-+			vty_out(vty, "Node-Bit-Len: %u\n",
-+				locator->node_bits_length);
-+			vty_out(vty, "Function-Bit-Len: %u\n",
-+				locator->function_bits_length);
-+			vty_out(vty, "Argument-Bit-Len: %u\n",
-+				locator->argument_bits_length);
- 
--		if (CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID))
--			vty_out(vty, "Behavior: uSID\n");
-+			if (CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID))
-+				vty_out(vty, "Behavior: uSID\n");
-+		}
- 
- 		vty_out(vty, "Chunks:\n");
- 		for (ALL_LIST_ELEMENTS_RO((struct list *)locator->chunks, node,
-@@ -248,9 +286,30 @@ DEFUN (no_srv6,
- 	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
- 	struct srv6_locator *locator;
- 	struct listnode *node, *nnode;
-+	struct zebra_srv6_sid_block *block;
-+	struct zebra_srv6_sid_ctx *ctx;
-+
-+	for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, ctx)) {
-+		if (ctx->sid)
-+			zebra_srv6_sid_free(ctx->sid);
-+
-+		listnode_delete(srv6->sids, ctx);
-+		zebra_srv6_sid_ctx_free(ctx);
-+	}
-+
-+	for (ALL_LIST_ELEMENTS(srv6->locators, node, nnode, locator)) {
-+		block = locator->sid_block;
-+		if (block) {
-+			block->refcnt--;
-+			if (block->refcnt == 0) {
-+				listnode_delete(srv6->sid_blocks, block);
-+				zebra_srv6_sid_block_free(block);
-+			}
-+			locator->sid_block = NULL;
-+		}
- 
--	for (ALL_LIST_ELEMENTS(srv6->locators, node, nnode, locator))
- 		zebra_srv6_locator_delete(locator);
-+	}
- 	return CMD_SUCCESS;
- }
- 
-@@ -297,12 +356,37 @@ DEFUN (no_srv6_locator,
-        "Segment Routing SRv6 locator\n"
-        "Specify locator-name\n")
- {
-+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
-+	struct zebra_srv6_sid_block *block;
-+	struct listnode *node, *nnode;
-+	struct zebra_srv6_sid_ctx *ctx;
- 	struct srv6_locator *locator = zebra_srv6_locator_lookup(argv[2]->arg);
- 	if (!locator) {
- 		vty_out(vty, "%% Can't find SRv6 locator\n");
- 		return CMD_WARNING_CONFIG_FAILED;
- 	}
- 
-+	for (ALL_LIST_ELEMENTS(srv6->sids, node, nnode, ctx)) {
-+		if (!ctx->sid || ctx->sid->locator != locator)
-+			continue;
-+
-+		if (ctx->sid)
-+			zebra_srv6_sid_free(ctx->sid);
-+
-+		listnode_delete(srv6->sids, ctx);
-+		zebra_srv6_sid_ctx_free(ctx);
-+	}
-+
-+	block = locator->sid_block;
-+	if (block) {
-+		block->refcnt--;
-+		if (block->refcnt == 0) {
-+			listnode_delete(srv6->sid_blocks, block);
-+			zebra_srv6_sid_block_free(block);
-+		}
-+		locator->sid_block = NULL;
-+	}
-+
- 	zebra_srv6_locator_delete(locator);
- 	return CMD_SUCCESS;
- }
-@@ -323,14 +407,37 @@ DEFPY (locator_prefix,
- 	VTY_DECLVAR_CONTEXT(srv6_locator, locator);
- 	struct srv6_locator_chunk *chunk = NULL;
- 	struct listnode *node = NULL;
-+	uint8_t expected_prefixlen;
-+	struct srv6_sid_format *format;
- 
- 	locator->prefix = *prefix;
- 	func_bit_len = func_bit_len ?: ZEBRA_SRV6_FUNCTION_LENGTH;
- 
-+	expected_prefixlen = prefix->prefixlen;
-+	format = locator->sid_format;
-+	if (format) {
-+		if (strmatch(format->name, SRV6_SID_FORMAT_USID_F3216_NAME))
-+			expected_prefixlen =
-+				SRV6_SID_FORMAT_USID_F3216_BLOCK_LEN +
-+				SRV6_SID_FORMAT_USID_F3216_NODE_LEN;
-+		else if (strmatch(format->name,
-+				  SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME))
-+			expected_prefixlen =
-+				SRV6_SID_FORMAT_UNCOMPRESSED_F4024_BLOCK_LEN +
-+				SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE_LEN;
-+	}
-+
-+	if (prefix->prefixlen != expected_prefixlen) {
-+		vty_out(vty,
-+			"%% Locator prefix length '%u' inconsistent with configured format '%s'. Please either use a prefix length that is consistent with the format or change the format.\n",
-+			prefix->prefixlen, format->name);
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
- 	/* Resolve optional arguments */
- 	if (block_bit_len == 0 && node_bit_len == 0) {
--		block_bit_len =
--			prefix->prefixlen - ZEBRA_SRV6_LOCATOR_NODE_LENGTH;
-+		block_bit_len = prefix->prefixlen -
-+				ZEBRA_SRV6_LOCATOR_NODE_LENGTH;
- 		node_bit_len = ZEBRA_SRV6_LOCATOR_NODE_LENGTH;
- 	} else if (block_bit_len == 0) {
- 		block_bit_len = prefix->prefixlen - node_bit_len;
-@@ -401,7 +508,8 @@ DEFPY (locator_prefix,
- 		}
- 	}
- 
--	zebra_srv6_locator_add(locator);
-+	zebra_srv6_locator_format_set(locator, locator->sid_format);
-+
- 	return CMD_SUCCESS;
- }
- 
-@@ -422,8 +530,9 @@ DEFPY (locator_behavior,
- 		/* SRv6 locator uSID flag already set, nothing to do */
- 		return CMD_SUCCESS;
- 
--	/* Remove old locator from zclients */
--	zebra_notify_srv6_locator_delete(locator);
-+	if (!locator->sid_format)
-+		/* Remove old locator from zclients */
-+		zebra_notify_srv6_locator_delete(locator);
- 
- 	/* Set/Unset the SRV6_LOCATOR_USID */
- 	if (no)
-@@ -431,8 +540,75 @@ DEFPY (locator_behavior,
- 	else
- 		SET_FLAG(locator->flags, SRV6_LOCATOR_USID);
- 
--	/* Notify the new locator to zclients */
--	zebra_notify_srv6_locator_add(locator);
-+	if (!locator->sid_format)
-+		/* Notify the new locator to zclients */
-+		zebra_srv6_locator_add(locator);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY(locator_sid_format,
-+      locator_sid_format_cmd,
-+      "format <usid-f3216|uncompressed-f4024>$format",
-+      "Configure SRv6 SID format\n"
-+      "Specify usid-f3216 format\n"
-+      "Specify uncompressed-f4024 format\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_locator, locator);
-+	struct srv6_sid_format *sid_format = NULL;
-+	uint8_t expected_prefixlen;
-+
-+	expected_prefixlen = locator->prefix.prefixlen;
-+	if (strmatch(format, SRV6_SID_FORMAT_USID_F3216_NAME))
-+		expected_prefixlen = SRV6_SID_FORMAT_USID_F3216_BLOCK_LEN +
-+				     SRV6_SID_FORMAT_USID_F3216_NODE_LEN;
-+	else if (strmatch(format, SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME))
-+		expected_prefixlen =
-+			SRV6_SID_FORMAT_UNCOMPRESSED_F4024_BLOCK_LEN +
-+			SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE_LEN;
-+
-+	if (IPV6_ADDR_SAME(&locator->prefix, &in6addr_any)) {
-+		vty_out(vty,
-+			"%% Unexpected configuration sequence: the prefix of the locator is required before configuring the format. Please configure the prefix first and then configure the format.\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	if (locator->prefix.prefixlen != expected_prefixlen) {
-+		vty_out(vty,
-+			"%% Locator prefix length '%u' inconsistent with configured format '%s'. Please either use a prefix length that is consistent with the format or change the format.\n",
-+			locator->prefix.prefixlen, format);
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	sid_format = srv6_sid_format_lookup(format);
-+	if (!sid_format) {
-+		vty_out(vty, "%% Cannot find SRv6 SID format '%s'\n", format);
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	if (sid_format == locator->sid_format)
-+		/* Format has not changed, nothing to do */
-+		return CMD_SUCCESS;
-+
-+	zebra_srv6_locator_format_set(locator, sid_format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY (no_locator_sid_format,
-+       no_locator_sid_format_cmd,
-+       "no format [WORD]",
-+       NO_STR
-+       "Configure SRv6 SID format\n"
-+       "Specify SRv6 SID format\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_locator, locator);
-+
-+	if (!locator->sid_format)
-+		/* SID format already unset, nothing to do */
-+		return CMD_SUCCESS;
-+
-+	zebra_srv6_locator_format_set(locator, NULL);
- 
- 	return CMD_SUCCESS;
- }
-@@ -469,11 +645,312 @@ DEFPY (no_srv6_src_addr,
- 	return CMD_SUCCESS;
- }
- 
-+DEFUN_NOSH(srv6_sid_formats,
-+           srv6_sid_formats_cmd,
-+           "formats",
-+           "Segment Routing SRv6 SID formats\n")
-+{
-+	vty->node = SRV6_SID_FORMATS_NODE;
-+	return CMD_SUCCESS;
-+}
-+
-+DEFUN_NOSH (srv6_sid_format_f3216_usid,
-+            srv6_sid_format_f3216_usid_cmd,
-+            "format usid-f3216",
-+            "Configure SRv6 SID format\n"
-+            "Configure the uSID f3216 format\n")
-+{
-+	struct srv6_sid_format *format;
-+
-+	format = srv6_sid_format_lookup(SRV6_SID_FORMAT_USID_F3216_NAME);
-+	assert(format);
-+
-+	VTY_PUSH_CONTEXT(SRV6_SID_FORMAT_USID_F3216_NODE, format);
-+	return CMD_SUCCESS;
-+}
-+
-+DEFUN(no_srv6_sid_format_f3216_usid,
-+      no_srv6_sid_format_f3216_usid_cmd,
-+      "no format usid-f3216",
-+      NO_STR
-+      "Configure SRv6 SID format\n"
-+      "Configure the uSID f3216 format\n")
-+{
-+	struct srv6_sid_format *format;
-+
-+	format = srv6_sid_format_lookup(SRV6_SID_FORMAT_USID_F3216_NAME);
-+	assert(format);
-+
-+	format->config.usid.lib_start = SRV6_SID_FORMAT_USID_F3216_LIB_START;
-+	format->config.usid.elib_start = SRV6_SID_FORMAT_USID_F3216_ELIB_START;
-+	format->config.usid.elib_end = SRV6_SID_FORMAT_USID_F3216_ELIB_END;
-+	format->config.usid.wlib_start = SRV6_SID_FORMAT_USID_F3216_WLIB_START;
-+	format->config.usid.wlib_end = SRV6_SID_FORMAT_USID_F3216_WLIB_END;
-+	format->config.usid.ewlib_start = SRV6_SID_FORMAT_USID_F3216_EWLIB_START;
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFUN_NOSH (srv6_sid_format_f4024_uncompressed,
-+            srv6_sid_format_uncompressed_cmd,
-+            "format uncompressed-f4024",
-+            "Configure SRv6 SID format\n"
-+            "Configure the uncompressed f4024 format\n")
-+{
-+	struct srv6_sid_format *format;
-+
-+	format = srv6_sid_format_lookup(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME);
-+	assert(format);
-+
-+	VTY_PUSH_CONTEXT(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE, format);
-+	return CMD_SUCCESS;
-+}
-+
-+DEFUN(no_srv6_sid_format_f4024_uncompressed,
-+      no_srv6_sid_format_f4024_uncompressed_cmd,
-+      "no format uncompressed-f4024",
-+      NO_STR
-+      "Configure SRv6 SID format\n"
-+      "Configure the uncompressed f4024 format\n")
-+{
-+	struct srv6_sid_format *format;
-+
-+	format = srv6_sid_format_lookup(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME);
-+	assert(format);
-+
-+	format->config.uncompressed.explicit_start =
-+		SRV6_SID_FORMAT_UNCOMPRESSED_F4024_EXPLICIT_RANGE_START;
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY(srv6_sid_format_usid_lib,
-+      srv6_sid_format_usid_lib_cmd,
-+      "local-id-block start (0-4294967295)$start",
-+      "Configure LIB\n"
-+      "Configure the start value for the LIB\n"
-+      "Specify the start value for the LIB\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_sid_format, format);
-+
-+	format->config.usid.lib_start = start;
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY(no_srv6_sid_format_usid_lib,
-+      no_srv6_sid_format_usid_lib_cmd,
-+      "no local-id-block [start (0-4294967295)]",
-+      NO_STR
-+      "Configure LIB\n"
-+      "Configure the start value for the LIB\n"
-+      "Specify the start value for the LIB\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_sid_format, format);
-+
-+	if (strmatch(format->name, SRV6_SID_FORMAT_USID_F3216_NAME))
-+		format->config.usid.lib_start =
-+			SRV6_SID_FORMAT_USID_F3216_LIB_START;
-+	else
-+		assert(0);
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY(srv6_sid_format_usid_lib_explicit,
-+      srv6_sid_format_usid_lib_explicit_cmd,
-+      "local-id-block explicit start (0-4294967295)$start end (0-4294967295)$end",
-+      "Configure LIB\n"
-+      "Configure the Explicit LIB\n"
-+      "Configure the start value for the Explicit LIB\n"
-+      "Specify the start value for the Explicit LIB\n"
-+      "Configure the end value for the Explicit LIB\n"
-+      "Specify the end value for the Explicit LIB\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_sid_format, format);
-+
-+	format->config.usid.elib_start = start;
-+	format->config.usid.elib_end = end;
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY(no_srv6_sid_format_usid_lib_explicit,
-+      no_srv6_sid_format_usid_lib_explicit_cmd,
-+      "no local-id-block explicit [start (0-4294967295) end (0-4294967295)]",
-+      NO_STR
-+      "Configure LIB\n"
-+      "Configure the Explicit LIB\n"
-+      "Configure the start value for the Explicit LIB\n"
-+      "Specify the start value for the Explicit LIB\n"
-+      "Configure the end value for the Explicit LIB\n"
-+      "Specify the end value for the Explicit LIB\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_sid_format, format);
-+
-+	if (strmatch(format->name, SRV6_SID_FORMAT_USID_F3216_NAME)) {
-+		format->config.usid.elib_start =
-+			SRV6_SID_FORMAT_USID_F3216_ELIB_START;
-+		format->config.usid.elib_end =
-+			SRV6_SID_FORMAT_USID_F3216_ELIB_END;
-+	} else {
-+		assert(0);
-+	}
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY(srv6_sid_format_usid_wlib,
-+      srv6_sid_format_usid_wlib_cmd,
-+      "wide-local-id-block start (0-4294967295)$start end (0-4294967295)$end",
-+      "Configure Wide LIB\n"
-+      "Configure the start value for the Wide LIB\n"
-+      "Specify the start value for the Wide LIB\n"
-+      "Configure the end value for the Wide LIB\n"
-+      "Specify the end value for the Wide LIB\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_sid_format, format);
-+
-+	format->config.usid.wlib_start = start;
-+	format->config.usid.wlib_end = end;
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY(no_srv6_sid_format_usid_wlib,
-+      no_srv6_sid_format_usid_wlib_cmd,
-+      "no wide-local-id-block [start (0-4294967295) end (0-4294967295)]",
-+      NO_STR
-+      "Configure Wide LIB\n"
-+      "Configure the start value for the Wide LIB\n"
-+      "Specify the start value for the Wide LIB\n"
-+      "Configure the end value for the Wide LIB\n"
-+      "Specify the end value for the Wide LIB\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_sid_format, format);
-+
-+	if (strmatch(format->name, SRV6_SID_FORMAT_USID_F3216_NAME)) {
-+		format->config.usid.wlib_start =
-+			SRV6_SID_FORMAT_USID_F3216_WLIB_START;
-+		format->config.usid.wlib_end =
-+			SRV6_SID_FORMAT_USID_F3216_WLIB_END;
-+	} else {
-+		assert(0);
-+	}
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY(srv6_sid_format_usid_wide_lib_explicit,
-+      srv6_sid_format_usid_wide_lib_explicit_cmd,
-+      "wide-local-id-block explicit start (0-4294967295)$start",
-+      "Configure Wide LIB\n"
-+      "Configure Explicit Wide LIB\n"
-+      "Configure the start value for the Explicit Wide LIB\n"
-+      "Specify the start value for the Explicit Wide LIB\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_sid_format, format);
-+
-+	format->config.usid.ewlib_start = start;
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY(no_srv6_sid_format_usid_wide_lib_explicit,
-+      no_srv6_sid_format_usid_wide_lib_explicit_cmd,
-+      "no wide-local-id-block explicit [start (0-4294967295)]",
-+	  NO_STR
-+      "Configure Wide LIB\n"
-+      "Configure Explicit Wide LIB\n"
-+      "Configure the start value for the Explicit Wide LIB\n"
-+      "Specify the start value for the Explicit Wide LIB\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_sid_format, format);
-+
-+	if (strmatch(format->name, SRV6_SID_FORMAT_USID_F3216_NAME))
-+		format->config.usid.ewlib_start =
-+			SRV6_SID_FORMAT_USID_F3216_EWLIB_START;
-+	else
-+		assert(0);
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY(srv6_sid_format_explicit,
-+      srv6_sid_format_explicit_cmd,
-+      "explicit start (0-4294967295)$start",
-+      "Configure Explicit range\n"
-+      "Configure the start value for the Explicit range\n"
-+      "Specify the start value for the Explicit range\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_sid_format, format);
-+
-+	format->config.uncompressed.explicit_start = start;
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY(no_srv6_sid_format_explicit,
-+      no_srv6_sid_format_explicit_cmd,
-+      "no explicit [start (0-4294967295)$start]",
-+	  NO_STR
-+      "Configure Explicit range\n"
-+      "Configure the start value for the Explicit range\n"
-+      "Specify the start value for the Explicit range\n")
-+{
-+	VTY_DECLVAR_CONTEXT(srv6_sid_format, format);
-+
-+	if (strmatch(format->name, SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NAME))
-+		format->config.usid.ewlib_start =
-+			SRV6_SID_FORMAT_UNCOMPRESSED_F4024_EXPLICIT_RANGE_START;
-+	else
-+		assert(0);
-+
-+	/* Notify zclients that the format has changed */
-+	zebra_srv6_sid_format_changed_cb(format);
-+
-+	return CMD_SUCCESS;
-+}
-+
- static int zebra_sr_config(struct vty *vty)
- {
- 	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
- 	struct listnode *node;
- 	struct srv6_locator *locator;
-+	struct srv6_sid_format *format;
- 	char str[256];
- 	bool display_source_srv6 = false;
- 
-@@ -515,6 +992,54 @@ static int zebra_sr_config(struct vty *vty)
- 			vty_out(vty, "\n");
- 			if (CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID))
- 				vty_out(vty, "    behavior usid\n");
-+			if (locator->sid_format) {
-+				format = locator->sid_format;
-+				vty_out(vty, "    format %s\n", format->name);
-+			}
-+			vty_out(vty, "   exit\n");
-+			vty_out(vty, "   !\n");
-+		}
-+		vty_out(vty, "  exit\n");
-+		vty_out(vty, "  !\n");
-+		vty_out(vty, "  formats\n");
-+		for (ALL_LIST_ELEMENTS_RO(srv6->sid_formats, node, format)) {
-+			if (format->type == SRV6_SID_FORMAT_TYPE_UNCOMPRESSED) {
-+				vty_out(vty, "   format %s\n", format->name);
-+				if (format->config.uncompressed.explicit_start !=
-+				    SRV6_SID_FORMAT_UNCOMPRESSED_F4024_EXPLICIT_RANGE_START)
-+					vty_out(vty, "    explicit start %u\n",
-+						format->config.uncompressed
-+							.explicit_start);
-+			}
-+			if (format->type == SRV6_SID_FORMAT_TYPE_USID) {
-+				vty_out(vty, "   format %s\n", format->name);
-+				if (format->config.usid.lib_start !=
-+				    SRV6_SID_FORMAT_USID_F3216_LIB_START)
-+					vty_out(vty,
-+						"    local-id-block start %u\n",
-+						format->config.usid.lib_start);
-+				if (format->config.usid.elib_start !=
-+					    SRV6_SID_FORMAT_USID_F3216_ELIB_START ||
-+				    format->config.usid.elib_end !=
-+					    SRV6_SID_FORMAT_USID_F3216_ELIB_END)
-+					vty_out(vty,
-+						"    local-id-block explicit start %u end %u\n",
-+						format->config.usid.elib_start,
-+						format->config.usid.elib_end);
-+				if (format->config.usid.wlib_start !=
-+					    SRV6_SID_FORMAT_USID_F3216_WLIB_START ||
-+				    format->config.usid.wlib_end !=
-+					    SRV6_SID_FORMAT_USID_F3216_WLIB_END)
-+					vty_out(vty,
-+						"    wide-local-id-block start %u end %u\n",
-+						format->config.usid.wlib_start,
-+						format->config.usid.wlib_end);
-+				if (format->config.usid.ewlib_start !=
-+				    SRV6_SID_FORMAT_USID_F3216_EWLIB_START)
-+					vty_out(vty,
-+						"    wide-local-id-block explicit start %u\n",
-+						format->config.usid.ewlib_start);
-+			}
- 			vty_out(vty, "   exit\n");
- 			vty_out(vty, "   !\n");
- 		}
-@@ -538,11 +1063,17 @@ void zebra_srv6_vty_init(void)
- 	install_node(&srv6_locs_node);
- 	install_node(&srv6_loc_node);
- 	install_node(&srv6_encap_node);
-+	install_node(&srv6_sid_formats_node);
-+	install_node(&srv6_sid_format_usid_f3216_node);
-+	install_node(&srv6_sid_format_uncompressed_f4024_node);
- 	install_default(SEGMENT_ROUTING_NODE);
- 	install_default(SRV6_NODE);
- 	install_default(SRV6_LOCS_NODE);
- 	install_default(SRV6_LOC_NODE);
- 	install_default(SRV6_ENCAP_NODE);
-+	install_default(SRV6_SID_FORMATS_NODE);
-+	install_default(SRV6_SID_FORMAT_USID_F3216_NODE);
-+	install_default(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE);
- 
- 	/* Command for change node */
- 	install_element(CONFIG_NODE, &segment_routing_cmd);
-@@ -550,14 +1081,44 @@ void zebra_srv6_vty_init(void)
- 	install_element(SEGMENT_ROUTING_NODE, &no_srv6_cmd);
- 	install_element(SRV6_NODE, &srv6_locators_cmd);
- 	install_element(SRV6_NODE, &srv6_encap_cmd);
-+	install_element(SRV6_NODE, &srv6_sid_formats_cmd);
- 	install_element(SRV6_LOCS_NODE, &srv6_locator_cmd);
- 	install_element(SRV6_LOCS_NODE, &no_srv6_locator_cmd);
-+	install_element(SRV6_SID_FORMATS_NODE, &srv6_sid_format_f3216_usid_cmd);
-+	install_element(SRV6_SID_FORMATS_NODE,
-+			&srv6_sid_format_uncompressed_cmd);
-+	install_element(SRV6_SID_FORMATS_NODE,
-+			&no_srv6_sid_format_f3216_usid_cmd);
-+	install_element(SRV6_SID_FORMATS_NODE,
-+			&no_srv6_sid_format_f4024_uncompressed_cmd);
- 
- 	/* Command for configuration */
- 	install_element(SRV6_LOC_NODE, &locator_prefix_cmd);
- 	install_element(SRV6_LOC_NODE, &locator_behavior_cmd);
-+	install_element(SRV6_LOC_NODE, &locator_sid_format_cmd);
-+	install_element(SRV6_LOC_NODE, &no_locator_sid_format_cmd);
- 	install_element(SRV6_ENCAP_NODE, &srv6_src_addr_cmd);
- 	install_element(SRV6_ENCAP_NODE, &no_srv6_src_addr_cmd);
-+	install_element(SRV6_SID_FORMAT_USID_F3216_NODE,
-+			&srv6_sid_format_usid_lib_cmd);
-+	install_element(SRV6_SID_FORMAT_USID_F3216_NODE,
-+			&no_srv6_sid_format_usid_lib_cmd);
-+	install_element(SRV6_SID_FORMAT_USID_F3216_NODE,
-+			&srv6_sid_format_usid_lib_explicit_cmd);
-+	install_element(SRV6_SID_FORMAT_USID_F3216_NODE,
-+			&no_srv6_sid_format_usid_lib_explicit_cmd);
-+	install_element(SRV6_SID_FORMAT_USID_F3216_NODE,
-+			&srv6_sid_format_usid_wlib_cmd);
-+	install_element(SRV6_SID_FORMAT_USID_F3216_NODE,
-+			&no_srv6_sid_format_usid_wlib_cmd);
-+	install_element(SRV6_SID_FORMAT_USID_F3216_NODE,
-+			&srv6_sid_format_usid_wide_lib_explicit_cmd);
-+	install_element(SRV6_SID_FORMAT_USID_F3216_NODE,
-+			&no_srv6_sid_format_usid_wide_lib_explicit_cmd);
-+	install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE,
-+			&srv6_sid_format_explicit_cmd);
-+	install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE,
-+			&no_srv6_sid_format_explicit_cmd);
- 
- 	/* Command for operation */
- 	install_element(VIEW_NODE, &show_srv6_locator_cmd);
diff --git a/src/sonic-frr/patch/0068-bgpd-Extend-BGP-to-communicate-with-the-SRv6-SID-Manager-to-allocate-release-SRv6-SIDs.patch b/src/sonic-frr/patch/0068-bgpd-Extend-BGP-to-communicate-with-the-SRv6-SID-Manager-to-allocate-release-SRv6-SIDs.patch
deleted file mode 100644
index df60dfa9404..00000000000
--- a/src/sonic-frr/patch/0068-bgpd-Extend-BGP-to-communicate-with-the-SRv6-SID-Manager-to-allocate-release-SRv6-SIDs.patch
+++ /dev/null
@@ -1,1126 +0,0 @@
-From c50b4b9afc2a23369f1fd26e5c8bd47a412fa04f Mon Sep 17 00:00:00 2001
-
-From: Carmine Scarpitta <cscarpit@cisco.com>
-
-Subject: [PATCH 01/10] bgpd: Add API to get SRv6 locator info
-
-Add an API to request information from the SRv6 SID Manager (zebra)
-regarding a specific SRv6 locator.
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- bgpd/bgp_mplsvpn.c |  293 +++++++++++++++++++++------------------
- bgpd/bgp_mplsvpn.h |    2 
- bgpd/bgp_vty.c     |   38 +++--
- bgpd/bgp_zebra.c   |  394 ++++++++++++++++++++++++++++++++++++++++++++++++++--
- bgpd/bgp_zebra.h   |    7 +
- bgpd/bgpd.c        |   17 ++
- bgpd/bgpd.h        |    5 -
- 7 files changed, 588 insertions(+), 168 deletions(-)
-
-diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
-index ef8ca39e8..29644b19f 100644
---- a/bgpd/bgp_mplsvpn.c
-+++ b/bgpd/bgp_mplsvpn.c
-@@ -491,6 +491,7 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
- {
- 	int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL);
- 	struct seg6local_context seg6localctx = {};
-+	struct srv6_sid_ctx ctx = {};
- 
- 	if (bgp->vrf_id == VRF_UNKNOWN) {
- 		if (debug)
-@@ -523,6 +524,11 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
- 	XFREE(MTYPE_BGP_SRV6_SID,
- 	      bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent);
- 	bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent = NULL;
-+
-+	ctx.vrf_id = bgp->vrf_id;
-+	ctx.behavior = afi == AFI_IP ? ZEBRA_SEG6_LOCAL_ACTION_END_DT4
-+				     : ZEBRA_SEG6_LOCAL_ACTION_END_DT6;
-+	bgp_zebra_release_srv6_sid(&ctx);
- }
- 
- /*
-@@ -533,6 +539,7 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp)
- {
- 	int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL);
- 	struct seg6local_context seg6localctx = {};
-+	struct srv6_sid_ctx ctx = {};
- 
- 	if (bgp->vrf_id == VRF_UNKNOWN) {
- 		if (debug)
-@@ -561,6 +568,10 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp)
- 			      &seg6localctx);
- 	XFREE(MTYPE_BGP_SRV6_SID, bgp->tovpn_zebra_vrf_sid_last_sent);
- 	bgp->tovpn_zebra_vrf_sid_last_sent = NULL;
-+
-+	ctx.vrf_id = bgp->vrf_id;
-+	ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT46;
-+	bgp_zebra_release_srv6_sid(&ctx);
- }
- 
- /*
-@@ -637,8 +648,8 @@ int vpn_leak_label_callback(
- 	return 0;
- }
- 
--static void sid_register(struct bgp *bgp, const struct in6_addr *sid,
--			 const char *locator_name)
-+void sid_register(struct bgp *bgp, const struct in6_addr *sid,
-+		  const char *locator_name)
- {
- 	struct bgp_srv6_function *func;
- 	func = XCALLOC(MTYPE_BGP_SRV6_FUNCTION,
-@@ -677,108 +688,97 @@ static bool sid_exist(struct bgp *bgp, const struct in6_addr *sid)
- 	return false;
- }
- 
--/*
-- * This function generates a new SID based on bgp->srv6_locator_chunks and
-- * index. The locator and generated SID are stored in arguments sid_locator
-- * and sid, respectively.
-+/**
-+ * Return the SRv6 SID value obtained by composing the LOCATOR and FUNCTION.
-  *
-- * if index != 0: try to allocate as index-mode
-- * else: try to allocate as auto-mode
-+ * @param sid_value SRv6 SID value returned
-+ * @param locator Parent locator of the SRv6 SID
-+ * @param sid_func Function part of the SID
-+ * @return True if success, False otherwise
-  */
--static uint32_t alloc_new_sid(struct bgp *bgp, uint32_t index,
--			      struct srv6_locator_chunk *sid_locator_chunk,
--			      struct in6_addr *sid)
-+static bool srv6_sid_compose(struct in6_addr *sid_value,
-+			     struct srv6_locator *locator, uint32_t sid_func)
- {
- 	int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL);
--	struct listnode *node;
--	struct srv6_locator_chunk *chunk;
--	bool alloced = false;
- 	int label = 0;
- 	uint8_t offset = 0;
- 	uint8_t func_len = 0, shift_len = 0;
--	uint32_t index_max = 0;
-+	uint32_t sid_func_max = 0;
- 
--	if (!bgp || !sid_locator_chunk || !sid)
-+	if (!locator || !sid_value)
- 		return false;
- 
--	for (ALL_LIST_ELEMENTS_RO(bgp->srv6_locator_chunks, node, chunk)) {
--		if (chunk->function_bits_length >
--		    BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH) {
--			if (debug)
--				zlog_debug(
--					"%s: invalid SRv6 Locator chunk (%pFX): Function Length must be less or equal to %d",
--					__func__, &chunk->prefix,
--					BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH);
--			continue;
--		}
-+	if (locator->function_bits_length >
-+	    BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH) {
-+		if (debug)
-+			zlog_debug("%s: invalid SRv6 Locator (%pFX): Function Length must be less or equal to %d",
-+				   __func__, &locator->prefix,
-+				   BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH);
-+		return false;
-+	}
- 
--		index_max = (1 << chunk->function_bits_length) - 1;
-+	/* Max value that can be encoded in the Function part of the SID */
-+	sid_func_max = (1 << locator->function_bits_length) - 1;
- 
--		if (index > index_max) {
--			if (debug)
--				zlog_debug(
--					"%s: skipped SRv6 Locator chunk (%pFX): Function Length is too short to support specified index (%u)",
--					__func__, &chunk->prefix, index);
--			continue;
--		}
-+	if (sid_func > sid_func_max) {
-+		if (debug)
-+			zlog_debug("%s: invalid SRv6 Locator (%pFX): Function Length is too short to support specified function (%u)",
-+				   __func__, &locator->prefix, sid_func);
-+		return false;
-+	}
- 
--		*sid = chunk->prefix.prefix;
--		*sid_locator_chunk = *chunk;
--		offset = chunk->block_bits_length + chunk->node_bits_length;
--		func_len = chunk->function_bits_length;
--		shift_len = BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH - func_len;
-+	/**
-+	 * Let's build the SID value.
-+	 * sid_value = LOC:FUNC::
-+	 */
- 
--		if (index != 0) {
--			label = index << shift_len;
--			if (label < MPLS_LABEL_UNRESERVED_MIN) {
--				if (debug)
--					zlog_debug(
--						"%s: skipped to allocate SRv6 SID (%pFX): Label (%u) is too small to use",
--						__func__, &chunk->prefix,
--						label);
--				continue;
--			}
-+	/* First, we put the locator (LOC) in the most significant bits of sid_value */
-+	*sid_value = locator->prefix.prefix;
- 
--			transpose_sid(sid, label, offset, func_len);
--			if (sid_exist(bgp, sid))
--				continue;
--			alloced = true;
--			break;
--		}
-+	/*
-+	 * Then, we compute the offset at which we have to place the function (FUNC).
-+	 * FUNC will be placed immediately after LOC, i.e. at block_bits_length + node_bits_length
-+	 */
-+	offset = locator->block_bits_length + locator->node_bits_length;
- 
--		for (uint32_t i = 1; i < index_max; i++) {
--			label = i << shift_len;
--			if (label < MPLS_LABEL_UNRESERVED_MIN) {
--				if (debug)
--					zlog_debug(
--						"%s: skipped to allocate SRv6 SID (%pFX): Label (%u) is too small to use",
--						__func__, &chunk->prefix,
--						label);
--				continue;
--			}
--			transpose_sid(sid, label, offset, func_len);
--			if (sid_exist(bgp, sid))
--				continue;
--			alloced = true;
--			break;
--		}
-+	/*
-+	 * The FUNC part of the SID is advertised in the label field of SRv6 Service TLV.
-+	 * (see SID Transposition Scheme, RFC 9252 section #4).
-+	 * Therefore, we need to encode the FUNC in the most significant bits of the
-+	 * 20-bit label.
-+	 */
-+	func_len = locator->function_bits_length;
-+	shift_len = BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH - func_len;
-+
-+	label = sid_func << shift_len;
-+	if (label < MPLS_LABEL_UNRESERVED_MIN) {
-+		if (debug)
-+			zlog_debug("%s: skipped to allocate SRv6 SID (%pFX): Label (%u) is too small to use",
-+				   __func__, &locator->prefix, label);
-+		return false;
- 	}
- 
--	if (!alloced)
--		return 0;
-+	if (sid_exist(bgp_get_default(), sid_value)) {
-+		zlog_warn("%s: skipped to allocate SRv6 SID (%pFX): SID %pI6 already in use",
-+			  __func__, &locator->prefix, sid_value);
-+		return false;
-+	}
- 
--	sid_register(bgp, sid, bgp->srv6_locator_name);
--	return label;
-+	/* Finally, we put the FUNC in sid_value at the computed offset */
-+	transpose_sid(sid_value, label, offset, func_len);
-+
-+	return true;
- }
- 
- void ensure_vrf_tovpn_sid_per_af(struct bgp *bgp_vpn, struct bgp *bgp_vrf,
- 				 afi_t afi)
- {
- 	int debug = BGP_DEBUG(vpn, VPN_LEAK_FROM_VRF);
--	struct srv6_locator_chunk *tovpn_sid_locator;
--	struct in6_addr *tovpn_sid;
--	uint32_t tovpn_sid_index = 0, tovpn_sid_transpose_label;
-+	struct in6_addr tovpn_sid = {};
-+	uint32_t tovpn_sid_index = 0;
- 	bool tovpn_sid_auto = false;
-+	struct srv6_sid_ctx ctx = {};
-+	uint32_t sid_func;
- 
- 	if (debug)
- 		zlog_debug("%s: try to allocate new SID for vrf %s: afi %s",
-@@ -790,10 +790,17 @@ void ensure_vrf_tovpn_sid_per_af(struct bgp *bgp_vpn, struct bgp *bgp_vrf,
- 
- 	/*
- 	 * skip when bgp vpn instance ins't allocated
--	 * or srv6 locator chunk isn't allocated
-+	 * or srv6 locator isn't allocated
- 	 */
--	if (!bgp_vpn || !bgp_vpn->srv6_locator_chunks)
-+	if (!bgp_vpn || !bgp_vpn->srv6_locator)
-+		return;
-+
-+	if (bgp_vrf->vrf_id == VRF_UNKNOWN) {
-+		if (debug)
-+			zlog_debug("%s: vrf %s: vrf_id not set, can't set zebra vrf SRv6 SID",
-+				   __func__, bgp_vrf->name_pretty);
- 		return;
-+	}
- 
- 	tovpn_sid_index = bgp_vrf->vpn_policy[afi].tovpn_sid_index;
- 	tovpn_sid_auto = CHECK_FLAG(bgp_vrf->vpn_policy[afi].flags,
-@@ -810,40 +817,34 @@ void ensure_vrf_tovpn_sid_per_af(struct bgp *bgp_vpn, struct bgp *bgp_vrf,
- 		return;
- 	}
- 
--	tovpn_sid_locator = srv6_locator_chunk_alloc();
--	tovpn_sid = XCALLOC(MTYPE_BGP_SRV6_SID, sizeof(struct in6_addr));
--
--	tovpn_sid_transpose_label = alloc_new_sid(bgp_vpn, tovpn_sid_index,
--						  tovpn_sid_locator, tovpn_sid);
-+	if (!tovpn_sid_auto) {
-+		if (!srv6_sid_compose(&tovpn_sid, bgp_vpn->srv6_locator,
-+				      tovpn_sid_index)) {
-+			zlog_err("%s: failed to compose sid for vrf %s: afi %s",
-+				 __func__, bgp_vrf->name_pretty, afi2str(afi));
-+			return;
-+		}
-+	}
- 
--	if (tovpn_sid_transpose_label == 0) {
--		if (debug)
--			zlog_debug(
--				"%s: not allocated new sid for vrf %s: afi %s",
--				__func__, bgp_vrf->name_pretty, afi2str(afi));
--		srv6_locator_chunk_free(&tovpn_sid_locator);
--		XFREE(MTYPE_BGP_SRV6_SID, tovpn_sid);
-+	ctx.vrf_id = bgp_vrf->vrf_id;
-+	ctx.behavior = afi == AFI_IP ? ZEBRA_SEG6_LOCAL_ACTION_END_DT4
-+				     : ZEBRA_SEG6_LOCAL_ACTION_END_DT6;
-+	if (!bgp_zebra_request_srv6_sid(&ctx, &tovpn_sid,
-+					bgp_vpn->srv6_locator_name, &sid_func)) {
-+		zlog_err("%s: failed to request sid for vrf %s: afi %s",
-+			 __func__, bgp_vrf->name_pretty, afi2str(afi));
- 		return;
- 	}
--
--	if (debug)
--		zlog_debug("%s: new sid %pI6 allocated for vrf %s: afi %s",
--			   __func__, tovpn_sid, bgp_vrf->name_pretty,
--			   afi2str(afi));
--
--	bgp_vrf->vpn_policy[afi].tovpn_sid = tovpn_sid;
--	bgp_vrf->vpn_policy[afi].tovpn_sid_locator = tovpn_sid_locator;
--	bgp_vrf->vpn_policy[afi].tovpn_sid_transpose_label =
--		tovpn_sid_transpose_label;
- }
- 
- void ensure_vrf_tovpn_sid_per_vrf(struct bgp *bgp_vpn, struct bgp *bgp_vrf)
- {
- 	int debug = BGP_DEBUG(vpn, VPN_LEAK_FROM_VRF);
--	struct srv6_locator_chunk *tovpn_sid_locator;
--	struct in6_addr *tovpn_sid;
--	uint32_t tovpn_sid_index = 0, tovpn_sid_transpose_label;
-+	struct in6_addr tovpn_sid = {};
-+	uint32_t tovpn_sid_index = 0;
- 	bool tovpn_sid_auto = false;
-+	struct srv6_sid_ctx ctx = {};
-+	uint32_t sid_func;
- 
- 	if (debug)
- 		zlog_debug("%s: try to allocate new SID for vrf %s", __func__,
-@@ -855,11 +856,18 @@ void ensure_vrf_tovpn_sid_per_vrf(struct bgp *bgp_vpn, struct bgp *bgp_vrf)
- 
- 	/*
- 	 * skip when bgp vpn instance ins't allocated
--	 * or srv6 locator chunk isn't allocated
-+	 * or srv6 locator isn't allocated
- 	 */
--	if (!bgp_vpn || !bgp_vpn->srv6_locator_chunks)
-+	if (!bgp_vpn || !bgp_vpn->srv6_locator)
- 		return;
- 
-+	if (bgp_vrf->vrf_id == VRF_UNKNOWN) {
-+		if (debug)
-+			zlog_debug("%s: vrf %s: vrf_id not set, can't set zebra vrf SRv6 SID",
-+				   __func__, bgp_vrf->name_pretty);
-+		return;
-+	}
-+
- 	tovpn_sid_index = bgp_vrf->tovpn_sid_index;
- 	tovpn_sid_auto = CHECK_FLAG(bgp_vrf->vrf_flags, BGP_VRF_TOVPN_SID_AUTO);
- 
-@@ -874,28 +882,23 @@ void ensure_vrf_tovpn_sid_per_vrf(struct bgp *bgp_vpn, struct bgp *bgp_vrf)
- 		return;
- 	}
- 
--	tovpn_sid_locator = srv6_locator_chunk_alloc();
--	tovpn_sid = XCALLOC(MTYPE_BGP_SRV6_SID, sizeof(struct in6_addr));
--
--	tovpn_sid_transpose_label = alloc_new_sid(bgp_vpn, tovpn_sid_index,
--						  tovpn_sid_locator, tovpn_sid);
-+	if (!tovpn_sid_auto) {
-+		if (!srv6_sid_compose(&tovpn_sid, bgp_vpn->srv6_locator,
-+				      bgp_vrf->tovpn_sid_index)) {
-+			zlog_err("%s: failed to compose new sid for vrf %s",
-+				 __func__, bgp_vrf->name_pretty);
-+			return;
-+		}
-+	}
- 
--	if (tovpn_sid_transpose_label == 0) {
--		if (debug)
--			zlog_debug("%s: not allocated new sid for vrf %s",
--				   __func__, bgp_vrf->name_pretty);
--		srv6_locator_chunk_free(&tovpn_sid_locator);
--		XFREE(MTYPE_BGP_SRV6_SID, tovpn_sid);
-+	ctx.vrf_id = bgp_vrf->vrf_id;
-+	ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT46;
-+	if (!bgp_zebra_request_srv6_sid(&ctx, &tovpn_sid,
-+					bgp_vpn->srv6_locator_name, &sid_func)) {
-+		zlog_err("%s: failed to request new sid for vrf %s", __func__,
-+			 bgp_vrf->name_pretty);
- 		return;
- 	}
--
--	if (debug)
--		zlog_debug("%s: new sid %pI6 allocated for vrf %s", __func__,
--			   tovpn_sid, bgp_vrf->name_pretty);
--
--	bgp_vrf->tovpn_sid = tovpn_sid;
--	bgp_vrf->tovpn_sid_locator = tovpn_sid_locator;
--	bgp_vrf->tovpn_sid_transpose_label = tovpn_sid_transpose_label;
- }
- 
- void ensure_vrf_tovpn_sid(struct bgp *bgp_vpn, struct bgp *bgp_vrf, afi_t afi)
-@@ -918,6 +921,7 @@ void delete_vrf_tovpn_sid_per_af(struct bgp *bgp_vpn, struct bgp *bgp_vrf,
- 	int debug = BGP_DEBUG(vpn, VPN_LEAK_FROM_VRF);
- 	uint32_t tovpn_sid_index = 0;
- 	bool tovpn_sid_auto = false;
-+	struct srv6_sid_ctx ctx = {};
- 
- 	if (debug)
- 		zlog_debug("%s: try to remove SID for vrf %s: afi %s", __func__,
-@@ -931,9 +935,22 @@ void delete_vrf_tovpn_sid_per_af(struct bgp *bgp_vpn, struct bgp *bgp_vrf,
- 	if (tovpn_sid_index != 0 || tovpn_sid_auto)
- 		return;
- 
--	srv6_locator_chunk_free(&bgp_vrf->vpn_policy[afi].tovpn_sid_locator);
-+	if (bgp_vrf->vrf_id == VRF_UNKNOWN) {
-+		if (debug)
-+			zlog_debug("%s: vrf %s: vrf_id not set, can't set zebra vrf label",
-+				   __func__, bgp_vrf->name_pretty);
-+		return;
-+	}
-+
-+	srv6_locator_free(bgp_vrf->vpn_policy[afi].tovpn_sid_locator);
-+	bgp_vrf->vpn_policy[afi].tovpn_sid_locator = NULL;
- 
- 	if (bgp_vrf->vpn_policy[afi].tovpn_sid) {
-+		ctx.vrf_id = bgp_vrf->vrf_id;
-+		ctx.behavior = afi == AFI_IP ? ZEBRA_SEG6_LOCAL_ACTION_END_DT4
-+					     : ZEBRA_SEG6_LOCAL_ACTION_END_DT6;
-+		bgp_zebra_release_srv6_sid(&ctx);
-+
- 		sid_unregister(bgp_vpn, bgp_vrf->vpn_policy[afi].tovpn_sid);
- 		XFREE(MTYPE_BGP_SRV6_SID, bgp_vrf->vpn_policy[afi].tovpn_sid);
- 	}
-@@ -945,6 +962,7 @@ void delete_vrf_tovpn_sid_per_vrf(struct bgp *bgp_vpn, struct bgp *bgp_vrf)
- 	int debug = BGP_DEBUG(vpn, VPN_LEAK_FROM_VRF);
- 	uint32_t tovpn_sid_index = 0;
- 	bool tovpn_sid_auto = false;
-+	struct srv6_sid_ctx ctx = {};
- 
- 	if (debug)
- 		zlog_debug("%s: try to remove SID for vrf %s", __func__,
-@@ -958,9 +976,21 @@ void delete_vrf_tovpn_sid_per_vrf(struct bgp *bgp_vpn, struct bgp *bgp_vrf)
- 	if (tovpn_sid_index != 0 || tovpn_sid_auto)
- 		return;
- 
--	srv6_locator_chunk_free(&bgp_vrf->tovpn_sid_locator);
-+	if (bgp_vrf->vrf_id == VRF_UNKNOWN) {
-+		if (debug)
-+			zlog_debug("%s: vrf %s: vrf_id not set, can't set zebra vrf label",
-+				   __func__, bgp_vrf->name_pretty);
-+		return;
-+	}
-+
-+	srv6_locator_free(bgp_vrf->tovpn_sid_locator);
-+	bgp_vrf->tovpn_sid_locator = NULL;
- 
- 	if (bgp_vrf->tovpn_sid) {
-+		ctx.vrf_id = bgp_vrf->vrf_id;
-+		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT46;
-+		bgp_zebra_release_srv6_sid(&ctx);
-+
- 		sid_unregister(bgp_vpn, bgp_vrf->tovpn_sid);
- 		XFREE(MTYPE_BGP_SRV6_SID, bgp_vrf->tovpn_sid);
- 	}
-@@ -1829,8 +1859,9 @@ void vpn_leak_from_vrf_update(struct bgp *to_bgp,	     /* to */
- 
- 	/* Set SID for SRv6 VPN */
- 	if (from_bgp->vpn_policy[afi].tovpn_sid_locator) {
--		struct srv6_locator_chunk *locator =
-+		struct srv6_locator *locator =
- 			from_bgp->vpn_policy[afi].tovpn_sid_locator;
-+
- 		encode_label(
- 			from_bgp->vpn_policy[afi].tovpn_sid_transpose_label,
- 			&label);
-@@ -1871,8 +1902,8 @@ void vpn_leak_from_vrf_update(struct bgp *to_bgp,	     /* to */
- 				.tovpn_sid_locator->prefix.prefix,
- 		       sizeof(struct in6_addr));
- 	} else if (from_bgp->tovpn_sid_locator) {
--		struct srv6_locator_chunk *locator =
--			from_bgp->tovpn_sid_locator;
-+		struct srv6_locator *locator = from_bgp->tovpn_sid_locator;
-+
- 		encode_label(from_bgp->tovpn_sid_transpose_label, &label);
- 		static_attr.srv6_l3vpn =
- 			XCALLOC(MTYPE_BGP_SRV6_L3VPN,
-diff --git a/bgpd/bgp_mplsvpn.h b/bgpd/bgp_mplsvpn.h
-index cd2589996..0593a736d 100644
---- a/bgpd/bgp_mplsvpn.h
-+++ b/bgpd/bgp_mplsvpn.h
-@@ -429,6 +429,8 @@ struct bgp_mplsvpn_nh_label_bind_cache *bgp_mplsvpn_nh_label_bind_find(
- 	struct bgp_mplsvpn_nh_label_bind_cache_head *tree, struct prefix *p,
- 	mpls_label_t orig_label);
- void bgp_mplsvpn_nexthop_init(void);
-+extern void sid_register(struct bgp *bgp, const struct in6_addr *sid,
-+			 const char *locator_name);
- extern void sid_unregister(struct bgp *bgp, const struct in6_addr *sid);
- 
- #endif /* _QUAGGA_BGP_MPLSVPN_H */
-diff --git a/bgpd/bgp_vty.c b/bgpd/bgp_vty.c
-index 9530a66fc..4b30f087c 100644
---- a/bgpd/bgp_vty.c
-+++ b/bgpd/bgp_vty.c
-@@ -298,18 +298,11 @@ static const char *get_afi_safi_json_str(afi_t afi, safi_t safi)
- /* unset srv6 locator */
- static int bgp_srv6_locator_unset(struct bgp *bgp)
- {
--	int ret;
- 	struct listnode *node, *nnode;
- 	struct srv6_locator_chunk *chunk;
- 	struct bgp_srv6_function *func;
- 	struct bgp *bgp_vrf;
- 
--	/* release chunk notification via ZAPI */
--	ret = bgp_zebra_srv6_manager_release_locator_chunk(
--			bgp->srv6_locator_name);
--	if (ret < 0)
--		return -1;
--
- 	/* refresh chunks */
- 	for (ALL_LIST_ELEMENTS(bgp->srv6_locator_chunks, node, nnode, chunk)) {
- 		listnode_delete(bgp->srv6_locator_chunks, chunk);
-@@ -348,20 +341,28 @@ static int bgp_srv6_locator_unset(struct bgp *bgp)
- 			continue;
- 
- 		/* refresh vpnv4 tovpn_sid_locator */
--		srv6_locator_chunk_free(
--			&bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator);
-+		srv6_locator_free(bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator);
-+		bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator = NULL;
- 
- 		/* refresh vpnv6 tovpn_sid_locator */
--		srv6_locator_chunk_free(
--			&bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator);
-+		srv6_locator_free(
-+			bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator);
-+		bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator = NULL;
- 
- 		/* refresh per-vrf tovpn_sid_locator */
--		srv6_locator_chunk_free(&bgp_vrf->tovpn_sid_locator);
-+		srv6_locator_free(bgp_vrf->tovpn_sid_locator);
-+		bgp_vrf->tovpn_sid_locator = NULL;
- 	}
- 
- 	/* clear locator name */
- 	memset(bgp->srv6_locator_name, 0, sizeof(bgp->srv6_locator_name));
- 
-+	/* clear SRv6 locator */
-+	if (bgp->srv6_locator) {
-+		srv6_locator_free(bgp->srv6_locator);
-+		bgp->srv6_locator = NULL;
-+	}
-+
- 	return 0;
- }
- 
-@@ -10515,7 +10516,7 @@ DEFPY (bgp_srv6_locator,
- 	snprintf(bgp->srv6_locator_name,
- 		 sizeof(bgp->srv6_locator_name), "%s", name);
- 
--	ret = bgp_zebra_srv6_manager_get_locator_chunk(name);
-+	ret = bgp_zebra_srv6_manager_get_locator(name);
- 	if (ret < 0)
- 		return CMD_WARNING_CONFIG_FAILED;
- 
-@@ -10566,6 +10567,17 @@ DEFPY (show_bgp_srv6,
- 		return CMD_SUCCESS;
- 
- 	vty_out(vty, "locator_name: %s\n", bgp->srv6_locator_name);
-+	if (bgp->srv6_locator) {
-+		vty_out(vty, "  prefix: %pFX\n", &bgp->srv6_locator->prefix);
-+		vty_out(vty, "  block-length: %d\n",
-+			bgp->srv6_locator->block_bits_length);
-+		vty_out(vty, "  node-length: %d\n",
-+			bgp->srv6_locator->node_bits_length);
-+		vty_out(vty, "  func-length: %d\n",
-+			bgp->srv6_locator->function_bits_length);
-+		vty_out(vty, "  arg-length: %d\n",
-+			bgp->srv6_locator->argument_bits_length);
-+	}
- 	vty_out(vty, "locator_chunks:\n");
- 	for (ALL_LIST_ELEMENTS_RO(bgp->srv6_locator_chunks, node, chunk)) {
- 		vty_out(vty, "- %pFX\n", &chunk->prefix);
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index d553d3d27..03c0be0bf 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -3359,11 +3359,278 @@ static int bgp_zebra_process_srv6_locator_chunk(ZAPI_CALLBACK_ARGS)
- 	return 0;
- }
- 
-+/**
-+ * Internal function to process an SRv6 locator
-+ *
-+ * @param locator The locator to be processed
-+ */
-+static int bgp_zebra_process_srv6_locator_internal(struct srv6_locator *locator)
-+{
-+	struct bgp *bgp = bgp_get_default();
-+
-+	if (!bgp || !bgp->srv6_enabled || !locator)
-+		return -1;
-+
-+	/*
-+	 * Check if the main BGP instance is configured to use the received
-+	 * locator
-+	 */
-+	if (strcmp(bgp->srv6_locator_name, locator->name) != 0) {
-+		zlog_err("%s: SRv6 Locator name unmatch %s:%s", __func__,
-+			 bgp->srv6_locator_name, locator->name);
-+		return 0;
-+	}
-+
-+	zlog_info("%s: Received SRv6 locator %s %pFX, loc-block-len=%u, loc-node-len=%u func-len=%u, arg-len=%u",
-+		  __func__, locator->name, &locator->prefix,
-+		  locator->block_bits_length, locator->node_bits_length,
-+		  locator->function_bits_length, locator->argument_bits_length);
-+
-+	/* Store the locator in the main BGP instance */
-+	bgp->srv6_locator = srv6_locator_alloc(locator->name);
-+	srv6_locator_copy(bgp->srv6_locator, locator);
-+
-+	/*
-+	 * Process VPN-to-VRF and VRF-to-VPN leaks to advertise new locator
-+	 * and SIDs.
-+	 */
-+	vpn_leak_postchange_all();
-+
-+	return 0;
-+}
-+
-+static int bgp_zebra_srv6_sid_notify(ZAPI_CALLBACK_ARGS)
-+{
-+	struct bgp *bgp = bgp_get_default();
-+	struct srv6_locator *locator;
-+	struct srv6_sid_ctx ctx;
-+	struct in6_addr sid_addr;
-+	enum zapi_srv6_sid_notify note;
-+	struct bgp *bgp_vrf;
-+	struct vrf *vrf;
-+	struct listnode *node, *nnode;
-+	char buf[256];
-+	struct in6_addr *tovpn_sid;
-+	struct prefix_ipv6 tmp_prefix;
-+	uint32_t sid_func;
-+	bool found = false;
-+
-+	if (!bgp || !bgp->srv6_enabled)
-+		return -1;
-+
-+	if (!bgp->srv6_locator) {
-+		if (BGP_DEBUG(zebra, ZEBRA))
-+			zlog_debug("%s: ignoring SRv6 SID notify: locator not set",
-+				   __func__);
-+		return -1;
-+	}
-+
-+	/* Decode the received notification message */
-+	if (!zapi_srv6_sid_notify_decode(zclient->ibuf, &ctx, &sid_addr,
-+					 &sid_func, NULL, &note, NULL)) {
-+		zlog_err("%s : error in msg decode", __func__);
-+		return -1;
-+	}
-+
-+	if (BGP_DEBUG(zebra, ZEBRA))
-+		zlog_debug("%s: received SRv6 SID notify: ctx %s sid_value %pI6 %s",
-+			   __func__, srv6_sid_ctx2str(buf, sizeof(buf), &ctx),
-+			   &sid_addr, zapi_srv6_sid_notify2str(note));
-+
-+	/* Get the BGP instance for which the SID has been requested, if any */
-+	for (ALL_LIST_ELEMENTS(bm->bgp, node, nnode, bgp_vrf)) {
-+		vrf = vrf_lookup_by_id(bgp_vrf->vrf_id);
-+		if (!vrf)
-+			continue;
-+
-+		if (vrf->vrf_id == ctx.vrf_id) {
-+			found = true;
-+			break;
-+		}
-+	}
-+
-+	if (!found) {
-+		if (BGP_DEBUG(zebra, ZEBRA))
-+			zlog_debug("%s: ignoring SRv6 SID notify: No VRF suitable for received SID ctx %s sid_value %pI6",
-+				   __func__,
-+				   srv6_sid_ctx2str(buf, sizeof(buf), &ctx),
-+				   &sid_addr);
-+		return -1;
-+	}
-+
-+	/* Handle notification */
-+	switch (note) {
-+	case ZAPI_SRV6_SID_ALLOCATED:
-+		if (BGP_DEBUG(zebra, ZEBRA))
-+			zlog_debug("SRv6 SID %pI6 %s : ALLOCATED", &sid_addr,
-+				   srv6_sid_ctx2str(buf, sizeof(buf), &ctx));
-+
-+		/* Verify that the received SID belongs to the configured locator */
-+		tmp_prefix.family = AF_INET6;
-+		tmp_prefix.prefixlen = IPV6_MAX_BITLEN;
-+		tmp_prefix.prefix = sid_addr;
-+
-+		if (!prefix_match((struct prefix *)&bgp->srv6_locator->prefix,
-+				  (struct prefix *)&tmp_prefix))
-+			return -1;
-+
-+		/* Get label */
-+		uint8_t func_len = bgp->srv6_locator->function_bits_length;
-+		uint8_t shift_len = BGP_PREFIX_SID_SRV6_MAX_FUNCTION_LENGTH -
-+				    func_len;
-+
-+		int label = sid_func << shift_len;
-+
-+		/* Un-export VPN to VRF routes */
-+		vpn_leak_prechange(BGP_VPN_POLICY_DIR_TOVPN, AFI_IP, bgp,
-+				   bgp_vrf);
-+		vpn_leak_prechange(BGP_VPN_POLICY_DIR_TOVPN, AFI_IP6, bgp,
-+				   bgp_vrf);
-+
-+		locator = srv6_locator_alloc(bgp->srv6_locator_name);
-+		srv6_locator_copy(locator, bgp->srv6_locator);
-+
-+		/* Store SID, locator, and label */
-+		tovpn_sid = XCALLOC(MTYPE_BGP_SRV6_SID, sizeof(struct in6_addr));
-+		*tovpn_sid = sid_addr;
-+		if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT6) {
-+			XFREE(MTYPE_BGP_SRV6_SID,
-+			      bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid);
-+			srv6_locator_free(
-+				bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator);
-+			sid_unregister(bgp,
-+				       bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid);
-+
-+			bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid = tovpn_sid;
-+			bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator = locator;
-+			bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_transpose_label =
-+				label;
-+		} else if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT4) {
-+			XFREE(MTYPE_BGP_SRV6_SID,
-+			      bgp_vrf->vpn_policy[AFI_IP].tovpn_sid);
-+			srv6_locator_free(
-+				bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator);
-+			sid_unregister(bgp,
-+				       bgp_vrf->vpn_policy[AFI_IP].tovpn_sid);
-+
-+			bgp_vrf->vpn_policy[AFI_IP].tovpn_sid = tovpn_sid;
-+			bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator = locator;
-+			bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_transpose_label =
-+				label;
-+		} else if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT46) {
-+			XFREE(MTYPE_BGP_SRV6_SID, bgp_vrf->tovpn_sid);
-+			srv6_locator_free(bgp_vrf->tovpn_sid_locator);
-+			sid_unregister(bgp, bgp_vrf->tovpn_sid);
-+
-+			bgp_vrf->tovpn_sid = tovpn_sid;
-+			bgp_vrf->tovpn_sid_locator = locator;
-+			bgp_vrf->tovpn_sid_transpose_label = label;
-+		} else {
-+			srv6_locator_free(locator);
-+			if (BGP_DEBUG(zebra, ZEBRA))
-+				zlog_debug("Unsupported behavior. Not assigned SRv6 SID: %s %pI6",
-+					   srv6_sid_ctx2str(buf, sizeof(buf),
-+							    &ctx),
-+					   &sid_addr);
-+			return -1;
-+		}
-+
-+		/* Register the new SID */
-+		sid_register(bgp, tovpn_sid, bgp->srv6_locator_name);
-+
-+		/* Export VPN to VRF routes */
-+		vpn_leak_postchange_all();
-+
-+		break;
-+	case ZAPI_SRV6_SID_RELEASED:
-+		if (BGP_DEBUG(zebra, ZEBRA))
-+			zlog_debug("SRv6 SID %pI6 %s: RELEASED", &sid_addr,
-+				   srv6_sid_ctx2str(buf, sizeof(buf), &ctx));
-+
-+		/* Un-export VPN to VRF routes */
-+		vpn_leak_prechange(BGP_VPN_POLICY_DIR_TOVPN, AFI_IP, bgp,
-+				   bgp_vrf);
-+		vpn_leak_prechange(BGP_VPN_POLICY_DIR_TOVPN, AFI_IP6, bgp,
-+				   bgp_vrf);
-+
-+		/* Remove SID, locator, and label */
-+		if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT6) {
-+			XFREE(MTYPE_BGP_SRV6_SID,
-+			      bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid);
-+			if (bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator) {
-+				srv6_locator_free(bgp->vpn_policy[AFI_IP6]
-+							  .tovpn_sid_locator);
-+				bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator =
-+					NULL;
-+			}
-+			bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_transpose_label =
-+				0;
-+
-+			/* Unregister the SID */
-+			sid_unregister(bgp,
-+				       bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid);
-+		} else if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT4) {
-+			XFREE(MTYPE_BGP_SRV6_SID,
-+			      bgp_vrf->vpn_policy[AFI_IP].tovpn_sid);
-+			if (bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator) {
-+				srv6_locator_free(bgp->vpn_policy[AFI_IP]
-+							  .tovpn_sid_locator);
-+				bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator =
-+					NULL;
-+			}
-+			bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_transpose_label =
-+				0;
-+
-+			/* Unregister the SID */
-+			sid_unregister(bgp,
-+				       bgp_vrf->vpn_policy[AFI_IP].tovpn_sid);
-+		} else if (ctx.behavior == ZEBRA_SEG6_LOCAL_ACTION_END_DT46) {
-+			XFREE(MTYPE_BGP_SRV6_SID, bgp_vrf->tovpn_sid);
-+			if (bgp_vrf->tovpn_sid_locator) {
-+				srv6_locator_free(bgp_vrf->tovpn_sid_locator);
-+				bgp_vrf->tovpn_sid_locator = NULL;
-+			}
-+			bgp_vrf->tovpn_sid_transpose_label = 0;
-+
-+			/* Unregister the SID */
-+			sid_unregister(bgp, bgp_vrf->tovpn_sid);
-+		} else {
-+			if (BGP_DEBUG(zebra, ZEBRA))
-+				zlog_debug("Unsupported behavior. Not assigned SRv6 SID: %s %pI6",
-+					   srv6_sid_ctx2str(buf, sizeof(buf),
-+							    &ctx),
-+					   &sid_addr);
-+			return -1;
-+		}
-+
-+		/* Export VPN to VRF routes*/
-+		vpn_leak_postchange_all();
-+		break;
-+	case ZAPI_SRV6_SID_FAIL_ALLOC:
-+		if (BGP_DEBUG(zebra, ZEBRA))
-+			zlog_debug("SRv6 SID %pI6 %s: Failed to allocate",
-+				   &sid_addr,
-+				   srv6_sid_ctx2str(buf, sizeof(buf), &ctx));
-+
-+		/* Error will be logged by zebra module */
-+		break;
-+	case ZAPI_SRV6_SID_FAIL_RELEASE:
-+		if (BGP_DEBUG(zebra, ZEBRA))
-+			zlog_debug("%s: SRv6 SID %pI6 %s failure to release",
-+				   __func__, &sid_addr,
-+				   srv6_sid_ctx2str(buf, sizeof(buf), &ctx));
-+
-+		/* Error will be logged by zebra module */
-+		break;
-+	}
-+
-+	return 0;
-+}
-+
- static int bgp_zebra_process_srv6_locator_add(ZAPI_CALLBACK_ARGS)
- {
- 	struct srv6_locator loc = {};
- 	struct bgp *bgp = bgp_get_default();
--	const char *loc_name = bgp->srv6_locator_name;
- 
- 	if (!bgp || !bgp->srv6_enabled)
- 		return 0;
-@@ -3371,10 +3638,7 @@ static int bgp_zebra_process_srv6_locator_add(ZAPI_CALLBACK_ARGS)
- 	if (zapi_srv6_locator_decode(zclient->ibuf, &loc) < 0)
- 		return -1;
- 
--	if (bgp_zebra_srv6_manager_get_locator_chunk(loc_name) < 0)
--		return -1;
--
--	return 0;
-+	return bgp_zebra_process_srv6_locator_internal(&loc);
- }
- 
- static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS)
-@@ -3382,7 +3646,8 @@ static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS)
- 	struct srv6_locator loc = {};
- 	struct bgp *bgp = bgp_get_default();
- 	struct listnode *node, *nnode;
--	struct srv6_locator_chunk *chunk, *tovpn_sid_locator;
-+	struct srv6_locator_chunk *chunk;
-+	struct srv6_locator *tovpn_sid_locator;
- 	struct bgp_srv6_function *func;
- 	struct bgp *bgp_vrf;
- 	struct in6_addr *tovpn_sid;
-@@ -3394,6 +3659,12 @@ static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS)
- 	if (zapi_srv6_locator_decode(zclient->ibuf, &loc) < 0)
- 		return -1;
- 
-+	// clear SRv6 locator
-+	if (bgp->srv6_locator) {
-+		srv6_locator_free(bgp->srv6_locator);
-+		bgp->srv6_locator = NULL;
-+	}
-+
- 	// refresh chunks
- 	for (ALL_LIST_ELEMENTS(bgp->srv6_locator_chunks, node, nnode, chunk))
- 		if (prefix_match((struct prefix *)&loc.prefix,
-@@ -3470,10 +3741,12 @@ static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS)
- 			tmp_prefi.prefixlen = IPV6_MAX_BITLEN;
- 			tmp_prefi.prefix = tovpn_sid_locator->prefix.prefix;
- 			if (prefix_match((struct prefix *)&loc.prefix,
--					 (struct prefix *)&tmp_prefi))
--				srv6_locator_chunk_free(
--					&bgp_vrf->vpn_policy[AFI_IP]
--						 .tovpn_sid_locator);
-+					 (struct prefix *)&tmp_prefi)) {
-+				srv6_locator_free(bgp_vrf->vpn_policy[AFI_IP]
-+							  .tovpn_sid_locator);
-+				bgp_vrf->vpn_policy[AFI_IP].tovpn_sid_locator =
-+					NULL;
-+			}
- 		}
- 
- 		/* refresh vpnv6 tovpn_sid_locator */
-@@ -3484,10 +3757,12 @@ static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS)
- 			tmp_prefi.prefixlen = IPV6_MAX_BITLEN;
- 			tmp_prefi.prefix = tovpn_sid_locator->prefix.prefix;
- 			if (prefix_match((struct prefix *)&loc.prefix,
--					 (struct prefix *)&tmp_prefi))
--				srv6_locator_chunk_free(
--					&bgp_vrf->vpn_policy[AFI_IP6]
--						 .tovpn_sid_locator);
-+					 (struct prefix *)&tmp_prefi)) {
-+				srv6_locator_free(bgp_vrf->vpn_policy[AFI_IP6]
-+							  .tovpn_sid_locator);
-+				bgp_vrf->vpn_policy[AFI_IP6].tovpn_sid_locator =
-+					NULL;
-+			}
- 		}
- 
- 		/* refresh per-vrf tovpn_sid_locator */
-@@ -3497,9 +3772,10 @@ static int bgp_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS)
- 			tmp_prefi.prefixlen = IPV6_MAX_BITLEN;
- 			tmp_prefi.prefix = tovpn_sid_locator->prefix.prefix;
- 			if (prefix_match((struct prefix *)&loc.prefix,
--					 (struct prefix *)&tmp_prefi))
--				srv6_locator_chunk_free(
--					&bgp_vrf->tovpn_sid_locator);
-+					 (struct prefix *)&tmp_prefi)) {
-+				srv6_locator_free(bgp_vrf->tovpn_sid_locator);
-+				bgp_vrf->tovpn_sid_locator = NULL;
-+			}
- 		}
- 	}
- 
-@@ -3536,6 +3812,7 @@ static zclient_handler *const bgp_handlers[] = {
- 	[ZEBRA_SRV6_LOCATOR_DELETE] = bgp_zebra_process_srv6_locator_delete,
- 	[ZEBRA_SRV6_MANAGER_GET_LOCATOR_CHUNK] =
- 		bgp_zebra_process_srv6_locator_chunk,
-+	[ZEBRA_SRV6_SID_NOTIFY] = bgp_zebra_srv6_sid_notify,
- };
- 
- static int bgp_if_new_hook(struct interface *ifp)
-@@ -4068,6 +4345,89 @@ int bgp_zebra_srv6_manager_release_locator_chunk(const char *name)
- 	return srv6_manager_release_locator_chunk(zclient, name);
- }
- 
-+/**
-+ * Ask the SRv6 Manager (zebra) about a specific locator
-+ *
-+ * @param name Locator name
-+ * @return 0 on success, -1 otherwise
-+ */
-+int bgp_zebra_srv6_manager_get_locator(const char *name)
-+{
-+	if (!name)
-+		return -1;
-+
-+	/*
-+	 * Send the Get Locator request to the SRv6 Manager and return the
-+	 * result
-+	 */
-+	return srv6_manager_get_locator(zclient, name);
-+}
-+
-+/**
-+ * Ask the SRv6 Manager (zebra) to allocate a SID.
-+ *
-+ * Optionally, it is possible to provide an IPv6 address (sid_value parameter).
-+ *
-+ * When sid_value is provided, the SRv6 Manager allocates the requested SID
-+ * address, if the request can be satisfied (explicit allocation).
-+ *
-+ * When sid_value is not provided, the SRv6 Manager allocates any available SID
-+ * from the provided locator (dynamic allocation).
-+ *
-+ * @param ctx Context to be associated with the request SID
-+ * @param sid_value IPv6 address to be associated with the requested SID (optional)
-+ * @param locator_name Name of the locator from which the SID must be allocated
-+ * @param sid_func SID Function allocated by the SRv6 Manager.
-+ */
-+bool bgp_zebra_request_srv6_sid(const struct srv6_sid_ctx *ctx,
-+				struct in6_addr *sid_value,
-+				const char *locator_name, uint32_t *sid_func)
-+{
-+	int ret;
-+
-+	if (!ctx || !locator_name)
-+		return false;
-+
-+	/*
-+	 * Send the Get SRv6 SID request to the SRv6 Manager and check the
-+	 * result
-+	 */
-+	ret = srv6_manager_get_sid(zclient, ctx, sid_value, locator_name,
-+				   sid_func);
-+	if (ret < 0) {
-+		zlog_warn("%s: error getting SRv6 SID!", __func__);
-+		return false;
-+	}
-+
-+	return true;
-+}
-+
-+/**
-+ * Ask the SRv6 Manager (zebra) to release a previously allocated SID.
-+ *
-+ * This function is used to tell the SRv6 Manager that BGP no longer intends
-+ * to use the SID.
-+ *
-+ * @param ctx Context to be associated with the SID to be released
-+ */
-+void bgp_zebra_release_srv6_sid(const struct srv6_sid_ctx *ctx)
-+{
-+	int ret;
-+
-+	if (!ctx)
-+		return;
-+
-+	/*
-+	 * Send the Release SRv6 SID request to the SRv6 Manager and check the
-+	 * result
-+	 */
-+	ret = srv6_manager_release_sid(zclient, ctx);
-+	if (ret < 0) {
-+		zlog_warn("%s: error releasing SRv6 SID!", __func__);
-+		return;
-+	}
-+}
-+
- void bgp_zebra_send_nexthop_label(int cmd, mpls_label_t label,
- 				  ifindex_t ifindex, vrf_id_t vrf_id,
- 				  enum lsp_types_t ltype, struct prefix *p,
-diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
-index d0b3351ad..1471770dc 100644
---- a/bgpd/bgp_zebra.h
-+++ b/bgpd/bgp_zebra.h
-@@ -120,6 +120,13 @@ extern int bgp_zebra_update(struct bgp *bgp, afi_t afi, safi_t safi,
- extern int bgp_zebra_stale_timer_update(struct bgp *bgp);
- extern int bgp_zebra_srv6_manager_get_locator_chunk(const char *name);
- extern int bgp_zebra_srv6_manager_release_locator_chunk(const char *name);
-+extern int bgp_zebra_srv6_manager_get_locator(const char *name);
-+extern bool bgp_zebra_request_srv6_sid(const struct srv6_sid_ctx *ctx,
-+				       struct in6_addr *sid_value,
-+				       const char *locator_name,
-+				       uint32_t *sid_func);
-+extern void bgp_zebra_release_srv6_sid(const struct srv6_sid_ctx *ctx);
-+
- extern void bgp_zebra_send_nexthop_label(int cmd, mpls_label_t label,
- 					 ifindex_t index, vrf_id_t vrfid,
- 					 enum lsp_types_t ltype,
-diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index cf52053c4..06a0e0367 100644
---- a/bgpd/bgpd.c
-+++ b/bgpd/bgpd.c
-@@ -1478,9 +1478,11 @@ static void bgp_srv6_init(struct bgp *bgp)
- static void bgp_srv6_cleanup(struct bgp *bgp)
- {
- 	for (afi_t afi = AFI_IP; afi < AFI_MAX; afi++) {
--		if (bgp->vpn_policy[afi].tovpn_sid_locator != NULL)
--			srv6_locator_chunk_free(
--				&bgp->vpn_policy[afi].tovpn_sid_locator);
-+		if (bgp->vpn_policy[afi].tovpn_sid_locator != NULL) {
-+			srv6_locator_free(
-+				bgp->vpn_policy[afi].tovpn_sid_locator);
-+			bgp->vpn_policy[afi].tovpn_sid_locator = NULL;
-+		}
- 		if (bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent != NULL)
- 			XFREE(MTYPE_BGP_SRV6_SID,
- 			      bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent);
-@@ -1491,8 +1493,10 @@ static void bgp_srv6_cleanup(struct bgp *bgp)
- 		}
- 	}
- 
--	if (bgp->tovpn_sid_locator != NULL)
--		srv6_locator_chunk_free(&bgp->tovpn_sid_locator);
-+	if (bgp->tovpn_sid_locator != NULL) {
-+		srv6_locator_free(bgp->tovpn_sid_locator);
-+		bgp->tovpn_sid_locator = NULL;
-+	}
- 	if (bgp->tovpn_zebra_vrf_sid_last_sent != NULL)
- 		XFREE(MTYPE_BGP_SRV6_SID, bgp->tovpn_zebra_vrf_sid_last_sent);
- 	if (bgp->tovpn_sid != NULL) {
-@@ -1504,6 +1508,9 @@ static void bgp_srv6_cleanup(struct bgp *bgp)
- 		list_delete(&bgp->srv6_locator_chunks);
- 	if (bgp->srv6_functions)
- 		list_delete(&bgp->srv6_functions);
-+
-+	srv6_locator_free(bgp->srv6_locator);
-+	bgp->srv6_locator = NULL;
- }
- 
- /* Allocate new peer object, implicitely locked.  */
-diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
-index 057e26a83..b1feb8bde 100644
---- a/bgpd/bgpd.h
-+++ b/bgpd/bgpd.h
-@@ -249,7 +249,7 @@ struct vpn_policy {
- 	 */
- 	uint32_t tovpn_sid_index; /* unset => set to 0 */
- 	struct in6_addr *tovpn_sid;
--	struct srv6_locator_chunk *tovpn_sid_locator;
-+	struct srv6_locator *tovpn_sid_locator;
- 	uint32_t tovpn_sid_transpose_label;
- 	struct in6_addr *tovpn_zebra_vrf_sid_last_sent;
- };
-@@ -813,11 +813,12 @@ struct bgp {
- 	/* BGP VPN SRv6 backend */
- 	bool srv6_enabled;
- 	char srv6_locator_name[SRV6_LOCNAME_SIZE];
-+	struct srv6_locator *srv6_locator;
- 	struct list *srv6_locator_chunks;
- 	struct list *srv6_functions;
- 	uint32_t tovpn_sid_index; /* unset => set to 0 */
- 	struct in6_addr *tovpn_sid;
--	struct srv6_locator_chunk *tovpn_sid_locator;
-+	struct srv6_locator *tovpn_sid_locator;
- 	uint32_t tovpn_sid_transpose_label;
- 	struct in6_addr *tovpn_zebra_vrf_sid_last_sent;
- 
diff --git a/src/sonic-frr/patch/0069-lib-nexthop-code-should-use-uint16_t-for-nexthop-cou.patch b/src/sonic-frr/patch/0069-lib-nexthop-code-should-use-uint16_t-for-nexthop-cou.patch
deleted file mode 100644
index 5b6588ce312..00000000000
--- a/src/sonic-frr/patch/0069-lib-nexthop-code-should-use-uint16_t-for-nexthop-cou.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 1102e4f6ee58d0d41596880fe3a7c82840ee679e Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Tue, 1 Oct 2024 14:31:08 -0400
-Subject: [PATCH] lib: nexthop code should use uint16_t for nexthop counting
-
-It's possible to specify via the cli and configure how many
-nexthops that are allowed on the system.  If you happen to
-have > 255 then things are about to get interesting otherwise.
-
-Let's allow up to 65k nexthops (ha!)
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/lib/nexthop_group.c b/lib/nexthop_group.c
-index 3f408e0a71..cb1ebb5d09 100644
---- a/lib/nexthop_group.c
-+++ b/lib/nexthop_group.c
-@@ -70,10 +70,10 @@ static struct nexthop *nexthop_group_tail(const struct nexthop_group *nhg)
- 	return nexthop;
- }
- 
--uint8_t nexthop_group_nexthop_num(const struct nexthop_group *nhg)
-+uint16_t nexthop_group_nexthop_num(const struct nexthop_group *nhg)
- {
- 	struct nexthop *nhop;
--	uint8_t num = 0;
-+	uint16_t num = 0;
- 
- 	for (ALL_NEXTHOPS_PTR(nhg, nhop))
- 		num++;
-@@ -81,11 +81,10 @@ uint8_t nexthop_group_nexthop_num(const struct nexthop_group *nhg)
- 	return num;
- }
- 
--static uint8_t
--nexthop_group_nexthop_num_no_recurse(const struct nexthop_group *nhg)
-+static uint16_t nexthop_group_nexthop_num_no_recurse(const struct nexthop_group *nhg)
- {
- 	struct nexthop *nhop;
--	uint8_t num = 0;
-+	uint16_t num = 0;
- 
- 	for (nhop = nhg->nexthop; nhop; nhop = nhop->next)
- 		num++;
-@@ -93,10 +92,10 @@ nexthop_group_nexthop_num_no_recurse(const struct nexthop_group *nhg)
- 	return num;
- }
- 
--uint8_t nexthop_group_active_nexthop_num(const struct nexthop_group *nhg)
-+uint16_t nexthop_group_active_nexthop_num(const struct nexthop_group *nhg)
- {
- 	struct nexthop *nhop;
--	uint8_t num = 0;
-+	uint16_t num = 0;
- 
- 	for (ALL_NEXTHOPS_PTR(nhg, nhop)) {
- 		if (CHECK_FLAG(nhop->flags, NEXTHOP_FLAG_ACTIVE))
-@@ -184,11 +183,9 @@ static struct nexthop *nhg_nh_find(const struct nexthop_group *nhg,
- 	return NULL;
- }
- 
--static bool
--nexthop_group_equal_common(const struct nexthop_group *nhg1,
--			   const struct nexthop_group *nhg2,
--			   uint8_t (*nexthop_group_nexthop_num_func)(
--				   const struct nexthop_group *nhg))
-+static bool nexthop_group_equal_common(
-+	const struct nexthop_group *nhg1, const struct nexthop_group *nhg2,
-+	uint16_t (*nexthop_group_nexthop_num_func)(const struct nexthop_group *nhg))
- {
- 	if (nhg1 && !nhg2)
- 		return false;
-diff --git a/lib/nexthop_group.h b/lib/nexthop_group.h
-index 822a35439c..9103299418 100644
---- a/lib/nexthop_group.h
-+++ b/lib/nexthop_group.h
-@@ -149,9 +149,8 @@ extern void nexthop_group_json_nexthop(json_object *j,
- 				       const struct nexthop *nh);
- 
- /* Return the number of nexthops in this nhg */
--extern uint8_t nexthop_group_nexthop_num(const struct nexthop_group *nhg);
--extern uint8_t
--nexthop_group_active_nexthop_num(const struct nexthop_group *nhg);
-+extern uint16_t nexthop_group_nexthop_num(const struct nexthop_group *nhg);
-+extern uint16_t nexthop_group_active_nexthop_num(const struct nexthop_group *nhg);
- 
- extern bool nexthop_group_has_label(const struct nexthop_group *nhg);
- 
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0070-Allow-16-bit-size-for-nexthops.patch b/src/sonic-frr/patch/0070-Allow-16-bit-size-for-nexthops.patch
deleted file mode 100644
index 3ffb095db07..00000000000
--- a/src/sonic-frr/patch/0070-Allow-16-bit-size-for-nexthops.patch
+++ /dev/null
@@ -1,362 +0,0 @@
-From ab639c4563abc5754d6a185ea3a8f29778fc3fae Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 7 Oct 2024 12:40:46 -0400
-Subject: [PATCH] *: Allow 16 bit size for nexthops
-
-Currently FRR is limiting the nexthop count to a uint8_t not a
-uint16_t.  This leads to issues when the nexthop count is 256
-which results in the count to overflow to 0 causing problems
-in the code.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/bgpd/bgp_addpath.c b/bgpd/bgp_addpath.c
-index f391c13847..aada6e555f 100644
---- a/bgpd/bgp_addpath.c
-+++ b/bgpd/bgp_addpath.c
-@@ -361,8 +361,7 @@ void bgp_addpath_type_changed(struct bgp *bgp)
- 	}
- }
- 
--int bgp_addpath_capability_action(enum bgp_addpath_strat addpath_type,
--				  uint8_t paths)
-+int bgp_addpath_capability_action(enum bgp_addpath_strat addpath_type, uint16_t paths)
- {
- 	int action = CAPABILITY_ACTION_UNSET;
- 
-@@ -392,8 +391,7 @@ int bgp_addpath_capability_action(enum bgp_addpath_strat addpath_type,
-  * change take effect.
-  */
- void bgp_addpath_set_peer_type(struct peer *peer, afi_t afi, safi_t safi,
--			       enum bgp_addpath_strat addpath_type,
--			       uint8_t paths)
-+			       enum bgp_addpath_strat addpath_type, uint16_t paths)
- {
- 	struct bgp *bgp = peer->bgp;
- 	enum bgp_addpath_strat old_type;
-diff --git a/bgpd/bgp_addpath.h b/bgpd/bgp_addpath.h
-index d562000e30..0954a7ced1 100644
---- a/bgpd/bgp_addpath.h
-+++ b/bgpd/bgp_addpath.h
-@@ -56,13 +56,11 @@ bool bgp_addpath_tx_path(enum bgp_addpath_strat strat,
-  * Change the type of addpath used for a peer.
-  */
- void bgp_addpath_set_peer_type(struct peer *peer, afi_t afi, safi_t safi,
--			       enum bgp_addpath_strat addpath_type,
--			       uint8_t paths);
-+			       enum bgp_addpath_strat addpath_type, uint16_t paths);
- 
- void bgp_addpath_update_ids(struct bgp *bgp, struct bgp_dest *dest, afi_t afi,
- 			    safi_t safi);
- 
- void bgp_addpath_type_changed(struct bgp *bgp);
--extern int bgp_addpath_capability_action(enum bgp_addpath_strat addpath_type,
--					 uint8_t paths);
-+extern int bgp_addpath_capability_action(enum bgp_addpath_strat addpath_type, uint16_t paths);
- #endif
-diff --git a/bgpd/bgp_nexthop.h b/bgpd/bgp_nexthop.h
-index 830883872e..410b3f7db9 100644
---- a/bgpd/bgp_nexthop.h
-+++ b/bgpd/bgp_nexthop.h
-@@ -38,7 +38,7 @@ struct bgp_nexthop_cache {
- 	uint32_t metric;
- 
- 	/* Nexthop number and nexthop linked list.*/
--	uint8_t nexthop_num;
-+	uint16_t nexthop_num;
- 
- 	/* This flag is set to TRUE for a bnc that is gateway IP overlay index
- 	 * nexthop.
-diff --git a/bgpd/bgp_nht.c b/bgpd/bgp_nht.c
-index e2c103bb52..1614779ea6 100644
---- a/bgpd/bgp_nht.c
-+++ b/bgpd/bgp_nht.c
-@@ -740,7 +740,7 @@ static void bgp_nht_ifp_table_handle(struct bgp *bgp,
- {
- 	struct bgp_nexthop_cache *bnc;
- 	struct nexthop *nhop;
--	uint8_t other_nh_count;
-+	uint16_t other_nh_count;
- 	bool nhop_ll_found = false;
- 	bool nhop_found = false;
- 
-diff --git a/pimd/pim_nht.c b/pimd/pim_nht.c
-index 32cdf4bf82..b4f9aa7ca4 100644
---- a/pimd/pim_nht.c
-+++ b/pimd/pim_nht.c
-@@ -543,7 +543,7 @@ static int pim_ecmp_nexthop_search(struct pim_instance *pim,
- 	ifindex_t first_ifindex;
- 	struct interface *ifp = NULL;
- 	uint32_t hash_val = 0, mod_val = 0;
--	uint8_t nh_iter = 0, found = 0;
-+	uint16_t nh_iter = 0, found = 0;
- 	uint32_t i, num_nbrs = 0;
- 	struct pim_interface *pim_ifp;
- 
-@@ -914,7 +914,7 @@ int pim_ecmp_nexthop_lookup(struct pim_instance *pim,
- 	struct interface *ifps[router->multipath], *ifp;
- 	int first_ifindex;
- 	int found = 0;
--	uint8_t i = 0;
-+	uint16_t i = 0;
- 	uint32_t hash_val = 0, mod_val = 0;
- 	uint32_t num_nbrs = 0;
- 	struct pim_interface *pim_ifp;
-diff --git a/pimd/pim_nht.h b/pimd/pim_nht.h
-index a1feb76e3b..27014e6898 100644
---- a/pimd/pim_nht.h
-+++ b/pimd/pim_nht.h
-@@ -23,7 +23,7 @@ struct pim_nexthop_cache {
- 	uint32_t metric;
- 	uint32_t distance;
- 	/* Nexthop number and nexthop linked list. */
--	uint8_t nexthop_num;
-+	uint16_t nexthop_num;
- 	struct nexthop *nexthop;
- 	int64_t last_update;
- 	uint16_t flags;
-diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index 988e67c963..4dd5f80836 100644
---- a/zebra/rt_netlink.c
-+++ b/zebra/rt_netlink.c
-@@ -616,12 +616,9 @@ parse_nexthop_unicast(ns_id_t ns_id, struct rtmsg *rtm, struct rtattr **tb,
- 	return nh;
- }
- 
--static uint8_t parse_multipath_nexthops_unicast(ns_id_t ns_id,
--						struct nexthop_group *ng,
--						struct rtmsg *rtm,
--						struct rtnexthop *rtnh,
--						struct rtattr **tb,
--						void *prefsrc, vrf_id_t vrf_id)
-+static uint16_t parse_multipath_nexthops_unicast(ns_id_t ns_id, struct nexthop_group *ng,
-+						 struct rtmsg *rtm, struct rtnexthop *rtnh,
-+						 struct rtattr **tb, void *prefsrc, vrf_id_t vrf_id)
- {
- 	void *gate = NULL;
- 	struct interface *ifp = NULL;
-@@ -746,7 +743,7 @@ static uint8_t parse_multipath_nexthops_unicast(ns_id_t ns_id,
- 		rtnh = RTNH_NEXT(rtnh);
- 	}
- 
--	uint8_t nhop_num = nexthop_group_nexthop_num(ng);
-+	uint16_t nhop_num = nexthop_group_nexthop_num(ng);
- 
- 	return nhop_num;
- }
-@@ -1039,7 +1036,7 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h,
- 				(struct rtnexthop *)RTA_DATA(tb[RTA_MULTIPATH]);
- 
- 			if (!nhe_id) {
--				uint8_t nhop_num;
-+				uint16_t nhop_num;
- 
- 				/* Use temporary list of nexthops; parse
- 				 * message payload's nexthops.
-@@ -2672,11 +2669,9 @@ int kernel_get_ipmr_sg_stats(struct zebra_vrf *zvrf, void *in)
- /* Char length to debug ID with */
- #define ID_LENGTH 10
- 
--static bool _netlink_nexthop_build_group(struct nlmsghdr *n, size_t req_size,
--					 uint32_t id,
--					 const struct nh_grp *z_grp,
--					 const uint8_t count, bool resilient,
--					 const struct nhg_resilience *nhgr)
-+static bool _netlink_nexthop_build_group(struct nlmsghdr *n, size_t req_size, uint32_t id,
-+					 const struct nh_grp *z_grp, const uint16_t count,
-+					 bool resilient, const struct nhg_resilience *nhgr)
- {
- 	struct nexthop_grp grp[count];
- 	/* Need space for max group size, "/", and null term */
-@@ -3301,7 +3296,7 @@ static int netlink_nexthop_process_group(struct rtattr **tb,
- 					 struct nh_grp *z_grp, int z_grp_size,
- 					 struct nhg_resilience *nhgr)
- {
--	uint8_t count = 0;
-+	uint16_t count = 0;
- 	/* linux/nexthop.h group struct */
- 	struct nexthop_grp *n_grp = NULL;
- 
-@@ -3374,7 +3369,7 @@ int netlink_nexthop_change(struct nlmsghdr *h, ns_id_t ns_id, int startup)
- 	struct nexthop nh = {};
- 	struct nh_grp grp[MULTIPATH_NUM] = {};
- 	/* Count of nexthops in group array */
--	uint8_t grp_count = 0;
-+	uint16_t grp_count = 0;
- 	struct rtattr *tb[NHA_MAX + 1] = {};
- 
- 	frrtrace(3, frr_zebra, netlink_nexthop_change, h, ns_id, startup);
-diff --git a/zebra/zapi_msg.c b/zebra/zapi_msg.c
-index 9ae8333d6b..4ee3e18e5b 100644
---- a/zebra/zapi_msg.c
-+++ b/zebra/zapi_msg.c
-@@ -517,7 +517,7 @@ int zsend_redistribute_route(int cmd, struct zserv *client,
- 	struct zapi_nexthop *api_nh;
- 	struct nexthop *nexthop;
- 	const struct prefix *p, *src_p;
--	uint8_t count = 0;
-+	uint16_t count = 0;
- 	afi_t afi;
- 	size_t stream_size =
- 		MAX(ZEBRA_MAX_PACKET_SIZ, sizeof(struct zapi_route));
-diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index efa795331d..5214b428b3 100644
---- a/zebra/zebra_dplane.c
-+++ b/zebra/zebra_dplane.c
-@@ -79,7 +79,7 @@ struct dplane_nexthop_info {
- 
- 	struct nexthop_group ng;
- 	struct nh_grp nh_grp[MULTIPATH_NUM];
--	uint8_t nh_grp_count;
-+	uint16_t nh_grp_count;
- };
- 
- /*
-@@ -2303,7 +2303,7 @@ dplane_ctx_get_nhe_nh_grp(const struct zebra_dplane_ctx *ctx)
- 	return ctx->u.rinfo.nhe.nh_grp;
- }
- 
--uint8_t dplane_ctx_get_nhe_nh_grp_count(const struct zebra_dplane_ctx *ctx)
-+uint16_t dplane_ctx_get_nhe_nh_grp_count(const struct zebra_dplane_ctx *ctx)
- {
- 	DPLANE_CTX_VALID(ctx);
- 	return ctx->u.rinfo.nhe.nh_grp_count;
-diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h
-index 51c1bff5d2..63130b751f 100644
---- a/zebra/zebra_dplane.h
-+++ b/zebra/zebra_dplane.h
-@@ -590,7 +590,7 @@ const struct nexthop_group *
- dplane_ctx_get_nhe_ng(const struct zebra_dplane_ctx *ctx);
- const struct nh_grp *
- dplane_ctx_get_nhe_nh_grp(const struct zebra_dplane_ctx *ctx);
--uint8_t dplane_ctx_get_nhe_nh_grp_count(const struct zebra_dplane_ctx *ctx);
-+uint16_t dplane_ctx_get_nhe_nh_grp_count(const struct zebra_dplane_ctx *ctx);
- 
- /* Accessors for LSP information */
- 
-diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c
-index ed949da917..0c882ee1d9 100644
---- a/zebra/zebra_nhg.c
-+++ b/zebra/zebra_nhg.c
-@@ -601,9 +601,8 @@ bool zebra_nhg_hash_id_equal(const void *arg1, const void *arg2)
- 	return nhe1->id == nhe2->id;
- }
- 
--static int zebra_nhg_process_grp(struct nexthop_group *nhg,
--				 struct nhg_connected_tree_head *depends,
--				 struct nh_grp *grp, uint8_t count,
-+static int zebra_nhg_process_grp(struct nexthop_group *nhg, struct nhg_connected_tree_head *depends,
-+				 struct nh_grp *grp, uint16_t count,
- 				 struct nhg_resilience *resilience)
- {
- 	nhg_connected_tree_init(depends);
-@@ -958,7 +957,7 @@ static struct nexthop *nhg_ctx_get_nh(struct nhg_ctx *ctx)
- 	return &ctx->u.nh;
- }
- 
--static uint8_t nhg_ctx_get_count(const struct nhg_ctx *ctx)
-+static uint16_t nhg_ctx_get_count(const struct nhg_ctx *ctx)
- {
- 	return ctx->count;
- }
-@@ -1004,9 +1003,8 @@ done:
- 	XFREE(MTYPE_NHG_CTX, *ctx);
- }
- 
--static struct nhg_ctx *nhg_ctx_init(uint32_t id, struct nexthop *nh,
--				    struct nh_grp *grp, vrf_id_t vrf_id,
--				    afi_t afi, int type, uint8_t count,
-+static struct nhg_ctx *nhg_ctx_init(uint32_t id, struct nexthop *nh, struct nh_grp *grp,
-+				    vrf_id_t vrf_id, afi_t afi, int type, uint16_t count,
- 				    struct nhg_resilience *resilience)
- {
- 	struct nhg_ctx *ctx = NULL;
-@@ -1155,7 +1153,7 @@ static int nhg_ctx_process_new(struct nhg_ctx *ctx)
- 	struct nhg_hash_entry *nhe = NULL;
- 
- 	uint32_t id = nhg_ctx_get_id(ctx);
--	uint8_t count = nhg_ctx_get_count(ctx);
-+	uint16_t count = nhg_ctx_get_count(ctx);
- 	vrf_id_t vrf_id = nhg_ctx_get_vrf_id(ctx);
- 	int type = nhg_ctx_get_type(ctx);
- 	afi_t afi = nhg_ctx_get_afi(ctx);
-@@ -1307,9 +1305,9 @@ int nhg_ctx_process(struct nhg_ctx *ctx)
- }
- 
- /* Kernel-side, you either get a single new nexthop or a array of ID's */
--int zebra_nhg_kernel_find(uint32_t id, struct nexthop *nh, struct nh_grp *grp,
--			  uint8_t count, vrf_id_t vrf_id, afi_t afi, int type,
--			  int startup, struct nhg_resilience *nhgr)
-+int zebra_nhg_kernel_find(uint32_t id, struct nexthop *nh, struct nh_grp *grp, uint16_t count,
-+			  vrf_id_t vrf_id, afi_t afi, int type, int startup,
-+			  struct nhg_resilience *nhgr)
- {
- 	struct nhg_ctx *ctx = NULL;
- 
-@@ -2973,14 +2971,14 @@ backups_done:
-  * I'm pretty sure we only allow ONE level of group within group currently.
-  * But making this recursive just in case that ever changes.
-  */
--static uint8_t zebra_nhg_nhe2grp_internal(struct nh_grp *grp,
--					  uint8_t curr_index,
-+static uint16_t zebra_nhg_nhe2grp_internal(struct nh_grp *grp,
-+					  uint16_t curr_index,
- 					  struct nhg_hash_entry *nhe,
- 					  int max_num)
- {
- 	struct nhg_connected *rb_node_dep = NULL;
- 	struct nhg_hash_entry *depend = NULL;
--	uint8_t i = curr_index;
-+	uint16_t i = curr_index;
- 
- 	frr_each(nhg_connected_tree, &nhe->nhg_depends, rb_node_dep) {
- 		bool duplicate = false;
-@@ -3069,8 +3067,7 @@ done:
- }
- 
- /* Convert a nhe into a group array */
--uint8_t zebra_nhg_nhe2grp(struct nh_grp *grp, struct nhg_hash_entry *nhe,
--			  int max_num)
-+uint16_t zebra_nhg_nhe2grp(struct nh_grp *grp, struct nhg_hash_entry *nhe, int max_num)
- {
- 	/* Call into the recursive function */
- 	return zebra_nhg_nhe2grp_internal(grp, 0, nhe, max_num);
-diff --git a/zebra/zebra_nhg.h b/zebra/zebra_nhg.h
-index 4eddecb73d..1f55a4bd96 100644
---- a/zebra/zebra_nhg.h
-+++ b/zebra/zebra_nhg.h
-@@ -204,7 +204,7 @@ struct nhg_ctx {
- 	int type;
- 
- 	/* If its a group array, how many? */
--	uint8_t count;
-+	uint16_t count;
- 
- 	/* Its either a single nexthop or an array of ID's */
- 	union {
-@@ -290,10 +290,8 @@ extern int nhg_ctx_process(struct nhg_ctx *ctx);
- void nhg_ctx_free(struct nhg_ctx **ctx);
- 
- /* Find via kernel nh creation */
--extern int zebra_nhg_kernel_find(uint32_t id, struct nexthop *nh,
--				 struct nh_grp *grp, uint8_t count,
--				 vrf_id_t vrf_id, afi_t afi, int type,
--				 int startup,
-+extern int zebra_nhg_kernel_find(uint32_t id, struct nexthop *nh, struct nh_grp *grp,
-+				 uint16_t count, vrf_id_t vrf_id, afi_t afi, int type, int startup,
- 				 struct nhg_resilience *resilience);
- /* Del via kernel */
- extern int zebra_nhg_kernel_del(uint32_t id, vrf_id_t vrf_id);
-@@ -352,8 +350,7 @@ extern void zebra_nhg_increment_ref(struct nhg_hash_entry *nhe);
- extern void zebra_nhg_check_valid(struct nhg_hash_entry *nhe);
- 
- /* Convert nhe depends to a grp context that can be passed around safely */
--extern uint8_t zebra_nhg_nhe2grp(struct nh_grp *grp, struct nhg_hash_entry *nhe,
--				 int size);
-+extern uint16_t zebra_nhg_nhe2grp(struct nh_grp *grp, struct nhg_hash_entry *nhe, int size);
- 
- /* Dataplane install/uninstall */
- extern void zebra_nhg_install_kernel(struct nhg_hash_entry *nhe);
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0071-zebra-Only-notify-dplane-work-pthread-when-needed.patch b/src/sonic-frr/patch/0071-zebra-Only-notify-dplane-work-pthread-when-needed.patch
deleted file mode 100644
index 7373dee5eee..00000000000
--- a/src/sonic-frr/patch/0071-zebra-Only-notify-dplane-work-pthread-when-needed.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From ccfaabcd8a9d519c22d43dbcf8f31be2f378a4bd Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 10 Oct 2024 16:00:08 -0400
-Subject: [PATCH 1/3] zebra: Only notify dplane work pthread when needed
-
-The fpm_nl_process function was getting the count
-of the total number of ctx's processed.  This leads
-to after having processed 1 context to always signal
-the dataplane that there is work to do.  Change the
-code to only notify the dplane worker when a context
-was actually added to the outgoing context queue.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- zebra/dplane_fpm_nl.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
-index e9942b7dbd..3e5236b077 100644
---- a/zebra/dplane_fpm_nl.c
-+++ b/zebra/dplane_fpm_nl.c
-@@ -1459,7 +1459,7 @@ static void fpm_process_queue(struct event *t)
- 	 * until the dataplane thread gets scheduled for new,
- 	 * unrelated work.
- 	 */
--	if (dplane_provider_out_ctx_queue_len(fnc->prov) > 0)
-+	if (processed_contexts)
- 		dplane_provider_work_ready();
- }
- 
--- 
-2.43.2
-
-
-From 527923b651aa6eb6d07136fd0988c6054af65d00 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 10 Oct 2024 20:08:32 -0400
-Subject: [PATCH 2/3] zebra: Slow down fpm_process_queue
-
-When the fpm_process_queue has run out of space
-but has written to the fpm output buffer, schedule
-it to wake up immediately, as that the write will go out
-pretty much immediately, since it was scheduled first.
-If the fpm_process_queue has not written to the output
-buffer then delay the processing by 10 milliseconds to
-allow a possibly backed up write processing to have a
-chance to complete it's work.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- zebra/dplane_fpm_nl.c | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
-index 3e5236b077..66079d2dfc 100644
---- a/zebra/dplane_fpm_nl.c
-+++ b/zebra/dplane_fpm_nl.c
-@@ -1446,8 +1446,12 @@ static void fpm_process_queue(struct event *t)
- 
- 	/* Re-schedule if we ran out of buffer space */
- 	if (no_bufs) {
--		event_add_event(fnc->fthread->master, fpm_process_queue, fnc, 0,
--				&fnc->t_dequeue);
-+		if (processed_contexts)
-+			event_add_event(fnc->fthread->master, fpm_process_queue, fnc, 0,
-+					&fnc->t_dequeue);
-+		else
-+			event_add_timer_msec(fnc->fthread->master, fpm_process_queue, fnc, 10,
-+					     &fnc->t_dequeue);
- 		event_add_timer(fnc->fthread->master, fpm_process_wedged, fnc,
- 				DPLANE_FPM_NL_WEDGIE_TIME, &fnc->t_wedged);
- 	} else
--- 
-2.43.2
-
-
-From 46cf5903312a1a4c9833f7654779a0e3d903dad3 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Fri, 11 Oct 2024 09:33:35 -0400
-Subject: [PATCH 3/3] fpm: Allow max fpm message size to float based on ecmp
-
-Currently the max message size is 4k.  With a 256 way
-ecmp FRR is seeing message sizes that are in the
-6k size.  There is desire to allow this to increase as
-well to 512.  Since the multipath size directly effects
-how big the message may be when sending the routes ecmp
-let's give a bit of headroom for this value when compiling
-FRR at greater sizes.  Additionally since we know not everyone
-is using such large ecmp, allow them to build as appropriate
-for their use cases.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- fpm/fpm.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/fpm/fpm.h b/fpm/fpm.h
-index 70c0df5715..9003c643b0 100644
---- a/fpm/fpm.h
-+++ b/fpm/fpm.h
-@@ -65,7 +65,7 @@
- /*
-  * Largest message that can be sent to or received from the FPM.
-  */
--#define FPM_MAX_MSG_LEN 4096
-+#define FPM_MAX_MSG_LEN MAX(MULTIPATH_NUM * 32, 4096)
- 
- #ifdef __SUNPRO_C
- #pragma pack(1)
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0072-Fix-up-improper-handling-of-nexthops-for-nexthop-tra.patch b/src/sonic-frr/patch/0072-Fix-up-improper-handling-of-nexthops-for-nexthop-tra.patch
deleted file mode 100644
index 1bac1eaf5a1..00000000000
--- a/src/sonic-frr/patch/0072-Fix-up-improper-handling-of-nexthops-for-nexthop-tra.patch
+++ /dev/null
@@ -1,149 +0,0 @@
-From 9b0f6cee3bbb8b0a42faf72015ac7e7705f8bfbd Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Fri, 11 Oct 2024 14:01:10 -0400
-Subject: [PATCH] *: Fix up improper handling of nexthops for nexthop tracking
-
-Currently FRR needs to send a uint16_t value for the number
-of nexthops as well it needs the ability to properly decode
-all of this.  Find and handle all the places that this happens.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/lib/zclient.c b/lib/zclient.c
-index 64515c7544..a89a02997a 100644
---- a/lib/zclient.c
-+++ b/lib/zclient.c
-@@ -2322,7 +2322,7 @@ static bool zapi_nexthop_update_decode(struct stream *s, struct prefix *match,
- 	STREAM_GETW(s, nhr->instance);
- 	STREAM_GETC(s, nhr->distance);
- 	STREAM_GETL(s, nhr->metric);
--	STREAM_GETC(s, nhr->nexthop_num);
-+	STREAM_GETW(s, nhr->nexthop_num);
- 
- 	for (i = 0; i < nhr->nexthop_num; i++) {
- 		if (zapi_nexthop_decode(s, &(nhr->nexthops[i]), 0, 0) != 0)
-diff --git a/pimd/pim_zlookup.c b/pimd/pim_zlookup.c
-index c19119fa47..5d344f1f66 100644
---- a/pimd/pim_zlookup.c
-+++ b/pimd/pim_zlookup.c
-@@ -193,7 +193,7 @@ static int zclient_read_nexthop(struct pim_instance *pim,
- 
- 	distance = stream_getc(s);
- 	metric = stream_getl(s);
--	nexthop_num = stream_getc(s);
-+	nexthop_num = stream_getw(s);
- 
- 	if (nexthop_num < 1 || nexthop_num > router->multipath) {
- 		if (PIM_DEBUG_PIM_NHT_DETAIL)
-diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
-index c4efc14a9d..f1b793524c 100644
---- a/staticd/static_zebra.c
-+++ b/staticd/static_zebra.c
-@@ -43,7 +43,7 @@ struct static_nht_data {
- 	vrf_id_t nh_vrf_id;
- 
- 	uint32_t refcount;
--	uint8_t nh_num;
-+	uint16_t nh_num;
- 	bool registered;
- };
- 
-diff --git a/zebra/zapi_msg.c b/zebra/zapi_msg.c
-index 4ee3e18e5b..7e3b571844 100644
---- a/zebra/zapi_msg.c
-+++ b/zebra/zapi_msg.c
-@@ -647,7 +647,7 @@ static int zsend_nexthop_lookup_mrib(struct zserv *client, struct ipaddr *addr,
- {
- 	struct stream *s;
- 	unsigned long nump;
--	uint8_t num;
-+	uint16_t num;
- 	struct nexthop *nexthop;
- 
- 	/* Get output stream. */
-@@ -667,7 +667,7 @@ static int zsend_nexthop_lookup_mrib(struct zserv *client, struct ipaddr *addr,
- 		/* remember position for nexthop_num */
- 		nump = stream_get_endp(s);
- 		/* reserve room for nexthop_num */
--		stream_putc(s, 0);
-+		stream_putw(s, 0);
- 		nhg = rib_get_fib_nhg(re);
- 		for (ALL_NEXTHOPS_PTR(nhg, nexthop)) {
- 			if (rnh_nexthop_valid(re, nexthop))
-@@ -675,11 +675,11 @@ static int zsend_nexthop_lookup_mrib(struct zserv *client, struct ipaddr *addr,
- 		}
- 
- 		/* store nexthop_num */
--		stream_putc_at(s, nump, num);
-+		stream_putw_at(s, nump, num);
- 	} else {
- 		stream_putc(s, 0); /* distance */
- 		stream_putl(s, 0); /* metric */
--		stream_putc(s, 0); /* nexthop_num */
-+		stream_putw(s, 0); /* nexthop_num */
- 	}
- 
- 	stream_putw_at(s, 0, stream_get_endp(s));
-diff --git a/zebra/zebra_rnh.c b/zebra/zebra_rnh.c
-index b387e9949b..3c64ee9ddf 100644
---- a/zebra/zebra_rnh.c
-+++ b/zebra/zebra_rnh.c
-@@ -1141,7 +1141,7 @@ int zebra_send_rnh_update(struct rnh *rnh, struct zserv *client,
- 	struct stream *s = NULL;
- 	struct route_entry *re;
- 	unsigned long nump;
--	uint8_t num;
-+	uint16_t num;
- 	struct nexthop *nh;
- 	struct route_node *rn;
- 	int ret;
-@@ -1212,7 +1212,7 @@ int zebra_send_rnh_update(struct rnh *rnh, struct zserv *client,
- 		stream_putl(s, re->metric);
- 		num = 0;
- 		nump = stream_get_endp(s);
--		stream_putc(s, 0);
-+		stream_putw(s, 0);
- 
- 		nhg = rib_get_fib_nhg(re);
- 		for (ALL_NEXTHOPS_PTR(nhg, nh))
-@@ -1240,13 +1240,13 @@ int zebra_send_rnh_update(struct rnh *rnh, struct zserv *client,
- 				}
- 		}
- 
--		stream_putc_at(s, nump, num);
-+		stream_putw_at(s, nump, num);
- 	} else {
- 		stream_putc(s, 0); // type
- 		stream_putw(s, 0); // instance
- 		stream_putc(s, 0); // distance
- 		stream_putl(s, 0); // metric
--		stream_putc(s, 0); // nexthops
-+		stream_putw(s, 0); // nexthops
- 	}
- 	stream_putw_at(s, 0, stream_get_endp(s));
- 
-diff --git a/zebra/zebra_srte.c b/zebra/zebra_srte.c
-index c0b83382c4..bb8d4b3b40 100644
---- a/zebra/zebra_srte.c
-+++ b/zebra/zebra_srte.c
-@@ -145,7 +145,7 @@ static int zebra_sr_policy_notify_update_client(struct zebra_sr_policy *policy,
- 			stream_putc(s, nhlfe->distance);
- 			stream_putl(s, 0); /* metric - not available */
- 			nump = stream_get_endp(s);
--			stream_putc(s, 0);
-+			stream_putw(s, 0);
- 		}
- 
- 		zapi_nexthop_from_nexthop(&znh, nhlfe->nexthop);
-@@ -155,7 +155,7 @@ static int zebra_sr_policy_notify_update_client(struct zebra_sr_policy *policy,
- 
- 		num++;
- 	}
--	stream_putc_at(s, nump, num);
-+	stream_putw_at(s, nump, num);
- 	stream_putw_at(s, 0, stream_get_endp(s));
- 
- 	client->nh_last_upd_time = monotime(NULL);
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0073-remove-in6addr-cmp.patch b/src/sonic-frr/patch/0073-remove-in6addr-cmp.patch
deleted file mode 100644
index 94c54fdfcce..00000000000
--- a/src/sonic-frr/patch/0073-remove-in6addr-cmp.patch
+++ /dev/null
@@ -1,150 +0,0 @@
-From 716d115e843151b30c3ab27e90182efcff44ecac Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 30 Oct 2024 10:15:42 -0400
-Subject: [PATCH 1/3] lib: Replace usage of in6addr_cmp with memcmp
-
-memcmp will return and act exactly the same as in6addr_cmp
-but it does it significantly faster than how in6addr_cmp
-does it.  Let this be a lesson for implementing something
-that is a duplicate of what is provided by the c library.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- lib/sockunion.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/lib/sockunion.c b/lib/sockunion.c
-index c37ab1d6dd..1b08a06e93 100644
---- a/lib/sockunion.c
-+++ b/lib/sockunion.c
-@@ -621,7 +621,8 @@ int sockunion_cmp(const union sockunion *su1, const union sockunion *su2)
- 			return -1;
- 	}
- 	if (su1->sa.sa_family == AF_INET6)
--		return in6addr_cmp(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr);
-+		return IN6_ADDR_CMP(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr);
-+
- 	return 0;
- }
- 
--- 
-2.43.2
-
-
-From bdce78eb3e909e788efa6a28151464b0d65b768a Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 30 Oct 2024 10:41:08 -0400
-Subject: [PATCH 2/3] lib, tests: Remove in6addr_cmp function from the system
-
-This function should just be memcmp.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- lib/sockunion.c         | 17 -----------------
- lib/sockunion.h         |  1 -
- tests/lib/test_frrlua.c |  2 +-
- 3 files changed, 1 insertion(+), 19 deletions(-)
-
-diff --git a/lib/sockunion.c b/lib/sockunion.c
-index 1b08a06e93..4a7c190953 100644
---- a/lib/sockunion.c
-+++ b/lib/sockunion.c
-@@ -588,23 +588,6 @@ static void __attribute__((unused)) sockunion_print(const union sockunion *su)
- 	}
- }
- 
--int in6addr_cmp(const struct in6_addr *addr1, const struct in6_addr *addr2)
--{
--	unsigned int i;
--	const uint8_t *p1, *p2;
--
--	p1 = (const uint8_t *)addr1;
--	p2 = (const uint8_t *)addr2;
--
--	for (i = 0; i < sizeof(struct in6_addr); i++) {
--		if (p1[i] > p2[i])
--			return 1;
--		else if (p1[i] < p2[i])
--			return -1;
--	}
--	return 0;
--}
--
- int sockunion_cmp(const union sockunion *su1, const union sockunion *su2)
- {
- 	if (su1->sa.sa_family > su2->sa.sa_family)
-diff --git a/lib/sockunion.h b/lib/sockunion.h
-index 146651225c..5152e70a23 100644
---- a/lib/sockunion.h
-+++ b/lib/sockunion.h
-@@ -93,7 +93,6 @@ enum connect_result { connect_error, connect_success, connect_in_progress };
- /* Prototypes. */
- extern int str2sockunion(const char *, union sockunion *);
- extern const char *sockunion2str(const union sockunion *, char *, size_t);
--int in6addr_cmp(const struct in6_addr *addr1, const struct in6_addr *addr2);
- extern int sockunion_cmp(const union sockunion *, const union sockunion *);
- extern int sockunion_same(const union sockunion *, const union sockunion *);
- extern unsigned int sockunion_hash(const union sockunion *);
-diff --git a/tests/lib/test_frrlua.c b/tests/lib/test_frrlua.c
-index 2760a273bd..b9cdfd088f 100644
---- a/tests/lib/test_frrlua.c
-+++ b/tests/lib/test_frrlua.c
-@@ -88,7 +88,7 @@ static void test_encode_decode(void)
- 
- 	lua_pushin6addr(L, &in6addr_a);
- 	lua_decode_in6addr(L, -1, &in6addr_a);
--	assert(in6addr_cmp(&in6addr_a, &in6addr_b) == 0);
-+	assert(memcmp(&in6addr_a, &in6addr_b, sizeof(struct in6_addr)) == 0);
- 	assert(lua_gettop(L) == 0);
- 
- 	union sockunion su_a, su_b;
--- 
-2.43.2
-
-
-From bf0d3bafd4b29b6f0a9bafc349b7d90dc4310a92 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 31 Oct 2024 10:06:26 -0400
-Subject: [PATCH 3/3] lib: In sockunion.c convert v6 memcmp's to IPV6_ADDR_CMP
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- lib/sockunion.c | 8 +++-----
- 1 file changed, 3 insertions(+), 5 deletions(-)
-
-diff --git a/lib/sockunion.c b/lib/sockunion.c
-index 4a7c190953..7acb5004db 100644
---- a/lib/sockunion.c
-+++ b/lib/sockunion.c
-@@ -403,8 +403,7 @@ int sockunion_same(const union sockunion *su1, const union sockunion *su2)
- 			     sizeof(struct in_addr));
- 		break;
- 	case AF_INET6:
--		ret = memcmp(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr,
--			     sizeof(struct in6_addr));
-+		ret = IPV6_ADDR_CMP(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr);
- 		if ((ret == 0) && IN6_IS_ADDR_LINKLOCAL(&su1->sin6.sin6_addr)) {
- 			/* compare interface indices */
- 			if (su1->sin6.sin6_scope_id && su2->sin6.sin6_scope_id)
-@@ -604,7 +603,7 @@ int sockunion_cmp(const union sockunion *su1, const union sockunion *su2)
- 			return -1;
- 	}
- 	if (su1->sa.sa_family == AF_INET6)
--		return IN6_ADDR_CMP(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr);
-+		return IPV6_ADDR_CMP(&su1->sin6.sin6_addr, &su2->sin6.sin6_addr);
- 
- 	return 0;
- }
-@@ -711,8 +710,7 @@ int sockunion_is_null(const union sockunion *su)
- 	case AF_INET:
- 		return (su->sin.sin_addr.s_addr == 0);
- 	case AF_INET6:
--		return !memcmp(su->sin6.sin6_addr.s6_addr, null_s6_addr,
--			       sizeof(null_s6_addr));
-+		return !IPV6_ADDR_CMP(su->sin6.sin6_addr.s6_addr, null_s6_addr);
- 	default:
- 		return 0;
- 	}
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0074-bgp-best-port-reordering.patch b/src/sonic-frr/patch/0074-bgp-best-port-reordering.patch
deleted file mode 100644
index 9dd3f6c6c91..00000000000
--- a/src/sonic-frr/patch/0074-bgp-best-port-reordering.patch
+++ /dev/null
@@ -1,2199 +0,0 @@
-From b6345ad2f34f78470f8839a21eba6e234f011cfa Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 11 Mar 2024 15:26:14 -0400
-Subject: [PATCH 01/11] tests: Explicitly call out bgp timers for bgp_evpn_mh
- test
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- tests/topotests/bgp_evpn_mh/leaf1/evpn.conf  | 1 +
- tests/topotests/bgp_evpn_mh/leaf2/evpn.conf  | 1 +
- tests/topotests/bgp_evpn_mh/spine1/evpn.conf | 1 +
- tests/topotests/bgp_evpn_mh/spine2/evpn.conf | 1 +
- tests/topotests/bgp_evpn_mh/torm11/evpn.conf | 1 +
- tests/topotests/bgp_evpn_mh/torm12/evpn.conf | 1 +
- tests/topotests/bgp_evpn_mh/torm21/evpn.conf | 1 +
- tests/topotests/bgp_evpn_mh/torm22/evpn.conf | 1 +
- 8 files changed, 8 insertions(+)
-
-diff --git a/tests/topotests/bgp_evpn_mh/leaf1/evpn.conf b/tests/topotests/bgp_evpn_mh/leaf1/evpn.conf
-index 33b6d08aba..d246517898 100644
---- a/tests/topotests/bgp_evpn_mh/leaf1/evpn.conf
-+++ b/tests/topotests/bgp_evpn_mh/leaf1/evpn.conf
-@@ -1,6 +1,7 @@
- frr defaults datacenter
- !
- router bgp 65101
-+  timers bgp 3 10
-   bgp router-id 192.168.100.13
-   no bgp ebgp-requires-policy
-   neighbor 192.168.50.1 remote-as external
-diff --git a/tests/topotests/bgp_evpn_mh/leaf2/evpn.conf b/tests/topotests/bgp_evpn_mh/leaf2/evpn.conf
-index 428998b0fe..6855a436d4 100644
---- a/tests/topotests/bgp_evpn_mh/leaf2/evpn.conf
-+++ b/tests/topotests/bgp_evpn_mh/leaf2/evpn.conf
-@@ -1,6 +1,7 @@
- frr defaults datacenter
- !
- router bgp 65101
-+  timers bgp 3 10
-   bgp router-id 192.168.100.14
-   no bgp ebgp-requires-policy
-   neighbor 192.168.61.1 remote-as external
-diff --git a/tests/topotests/bgp_evpn_mh/spine1/evpn.conf b/tests/topotests/bgp_evpn_mh/spine1/evpn.conf
-index b9fce46ea4..7d6fef699d 100644
---- a/tests/topotests/bgp_evpn_mh/spine1/evpn.conf
-+++ b/tests/topotests/bgp_evpn_mh/spine1/evpn.conf
-@@ -1,6 +1,7 @@
- frr defaults datacenter
- !
- router bgp 65001
-+  timers bgp 3 10
-   bgp router-id 192.168.100.13
-   no bgp ebgp-requires-policy
-   neighbor 192.168.50.2 remote-as external
-diff --git a/tests/topotests/bgp_evpn_mh/spine2/evpn.conf b/tests/topotests/bgp_evpn_mh/spine2/evpn.conf
-index 1430e10b68..c651ada686 100644
---- a/tests/topotests/bgp_evpn_mh/spine2/evpn.conf
-+++ b/tests/topotests/bgp_evpn_mh/spine2/evpn.conf
-@@ -1,6 +1,7 @@
- frr defaults datacenter
- !
- router bgp 65001
-+  timers bgp 3 10
-   bgp router-id 192.168.100.14
-   no bgp ebgp-requires-policy
-   neighbor 192.168.60.2 remote-as external
-diff --git a/tests/topotests/bgp_evpn_mh/torm11/evpn.conf b/tests/topotests/bgp_evpn_mh/torm11/evpn.conf
-index 2c1c695a18..62b7ec5855 100644
---- a/tests/topotests/bgp_evpn_mh/torm11/evpn.conf
-+++ b/tests/topotests/bgp_evpn_mh/torm11/evpn.conf
-@@ -7,6 +7,7 @@ frr defaults datacenter
- !
- !
- router bgp 65002
-+  timers bgp 3 10
-   bgp router-id 192.168.100.15
-   no bgp ebgp-requires-policy
-   neighbor 192.168.1.1 remote-as external
-diff --git a/tests/topotests/bgp_evpn_mh/torm12/evpn.conf b/tests/topotests/bgp_evpn_mh/torm12/evpn.conf
-index 8b0ce1d98f..3ceb974c47 100644
---- a/tests/topotests/bgp_evpn_mh/torm12/evpn.conf
-+++ b/tests/topotests/bgp_evpn_mh/torm12/evpn.conf
-@@ -7,6 +7,7 @@ frr defaults datacenter
- !
- !
- router bgp 65003
-+  timers bgp 3 10
-   bgp router-id 192.168.100.16
-   no bgp ebgp-requires-policy
-   neighbor 192.168.2.1 remote-as external
-diff --git a/tests/topotests/bgp_evpn_mh/torm21/evpn.conf b/tests/topotests/bgp_evpn_mh/torm21/evpn.conf
-index 5247dc1ebd..ecaf85ddb7 100644
---- a/tests/topotests/bgp_evpn_mh/torm21/evpn.conf
-+++ b/tests/topotests/bgp_evpn_mh/torm21/evpn.conf
-@@ -7,6 +7,7 @@ frr defaults datacenter
- !
- !
- router bgp 65004
-+  timers bgp 3 10
-   bgp router-id 192.168.100.17
-   no bgp ebgp-requires-policy
-   neighbor 192.168.3.1 remote-as external
-diff --git a/tests/topotests/bgp_evpn_mh/torm22/evpn.conf b/tests/topotests/bgp_evpn_mh/torm22/evpn.conf
-index ec56360176..c7e152498c 100644
---- a/tests/topotests/bgp_evpn_mh/torm22/evpn.conf
-+++ b/tests/topotests/bgp_evpn_mh/torm22/evpn.conf
-@@ -6,6 +6,7 @@ frr defaults datacenter
- ! debug bgp zebra
- !
- router bgp 65005
-+  timers bgp 3 10
-   bgp router-id 192.168.100.18
-   no bgp ebgp-requires-policy
-   neighbor 192.168.4.1 remote-as external
--- 
-2.43.2
-
-
-From da25ab9fa54cad2db494becf0645da8fdad5b414 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 11 Mar 2024 14:40:49 -0400
-Subject: [PATCH 02/11] tests: teste_ospf_rte_calc.py uses bgp add pytest mark
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- tests/topotests/ospf_basic_functionality/test_ospf_rte_calc.py | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/tests/topotests/ospf_basic_functionality/test_ospf_rte_calc.py b/tests/topotests/ospf_basic_functionality/test_ospf_rte_calc.py
-index f0950a2db3..45c1325917 100644
---- a/tests/topotests/ospf_basic_functionality/test_ospf_rte_calc.py
-+++ b/tests/topotests/ospf_basic_functionality/test_ospf_rte_calc.py
-@@ -49,7 +49,7 @@ from lib.ospf import (
-     verify_ospf_interface,
- )
- 
--pytestmark = [pytest.mark.ospfd, pytest.mark.staticd]
-+pytestmark = [pytest.mark.bgpd, pytest.mark.ospfd, pytest.mark.staticd]
- 
- 
- # Global variables
--- 
-2.43.2
-
-
-From fc76785fe670153941b1f320fabc2ca9c1511e33 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 11 Mar 2024 11:22:49 -0400
-Subject: [PATCH 03/11] bgpd: Modify update_evpn_type5_route_entry to include
- path_info pointer
-
-Modify update_evpn_type5_route_entry to return a pointer to the
-struct bgp_path_info modified in this function.  This code
-merely follows the standards used in other bgp_evpn.c code
-where the update function returns the pointer to the path
-info.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_evpn.c | 9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
-diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index 405e9a84bb..c7f8024f79 100644
---- a/bgpd/bgp_evpn.c
-+++ b/bgpd/bgp_evpn.c
-@@ -1584,7 +1584,8 @@ struct bgp_path_info *bgp_evpn_route_get_local_path(
- int update_evpn_type5_route_entry(struct bgp *bgp_evpn,
- 					 struct bgp *bgp_vrf, afi_t afi,
- 					 safi_t safi, struct bgp_dest *dest,
--					 struct attr *attr, int *route_changed)
-+					 struct attr *attr, int *route_changed,
-+					 struct bgp_path_info **entry)
- {
- 	struct attr *attr_new = NULL;
- 	struct bgp_path_info *pi = NULL;
-@@ -1622,8 +1623,8 @@ int update_evpn_type5_route_entry(struct bgp *bgp_evpn,
- 
- 		/* add the route entry to route node*/
- 		bgp_path_info_add(dest, pi);
-+		*entry = pi;
- 	} else {
--
- 		tmp_pi = local_pi;
- 		if (!attrhash_cmp(tmp_pi->attr, attr)) {
- 
-@@ -1645,6 +1646,7 @@ int update_evpn_type5_route_entry(struct bgp *bgp_evpn,
- 			tmp_pi->attr = attr_new;
- 			tmp_pi->uptime = monotime(NULL);
- 		}
-+		*entry = local_pi;
- 	}
- 	return 0;
- }
-@@ -1660,6 +1662,7 @@ int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp,
- 	struct bgp_dest *dest = NULL;
- 	struct bgp *bgp_evpn = NULL;
- 	int route_changed = 0;
-+	struct bgp_path_info *pi = NULL;
- 
- 	bgp_evpn = bgp_get_evpn();
- 	if (!bgp_evpn)
-@@ -1741,7 +1744,7 @@ int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp,
- 
- 	/* create or update the route entry within the route node */
- 	update_evpn_type5_route_entry(bgp_evpn, bgp_vrf, afi, safi, dest, &attr,
--				      &route_changed);
-+				      &route_changed, &pi);
- 
- 	/* schedule for processing and unlock node */
- 	if (route_changed) {
--- 
-2.43.2
-
-
-From 6032fb1a37b1d195e67f0e594d762ce048df092e Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 6 Mar 2024 15:03:31 -0500
-Subject: [PATCH 04/11] bgpd: Fix indentation problem in
- bgp_recalculate_afi_safi_bestpaths
-
-This is seriously indented.  Let's make it a bit better.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgpd.c | 24 +++++++++++++-----------
- 1 file changed, 13 insertions(+), 11 deletions(-)
-
-diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index cf52053c4e..b1711848e6 100644
---- a/bgpd/bgpd.c
-+++ b/bgpd/bgpd.c
-@@ -1878,17 +1878,19 @@ void bgp_recalculate_afi_safi_bestpaths(struct bgp *bgp, afi_t afi, safi_t safi)
- 	for (dest = bgp_table_top(bgp->rib[afi][safi]); dest;
- 	     dest = bgp_route_next(dest)) {
- 		table = bgp_dest_get_bgp_table_info(dest);
--		if (table != NULL) {
--			/* Special handling for 2-level routing
--			 * tables. */
--			if (safi == SAFI_MPLS_VPN || safi == SAFI_ENCAP
--			    || safi == SAFI_EVPN) {
--				for (ndest = bgp_table_top(table); ndest;
--				     ndest = bgp_route_next(ndest))
--					bgp_process(bgp, ndest, afi, safi);
--			} else
--				bgp_process(bgp, dest, afi, safi);
--		}
-+
-+		if (!table)
-+			continue;
-+
-+		/* Special handling for 2-level routing
-+		 * tables. */
-+		if (safi == SAFI_MPLS_VPN || safi == SAFI_ENCAP
-+		    || safi == SAFI_EVPN) {
-+			for (ndest = bgp_table_top(table); ndest;
-+			     ndest = bgp_route_next(ndest))
-+				bgp_process(bgp, ndest, afi, safi);
-+		} else
-+			bgp_process(bgp, dest, afi, safi);
- 	}
- }
- 
--- 
-2.43.2
-
-
-From a4a790e18469c46fe55e8bf861da4bc37108e2b7 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Fri, 1 Mar 2024 09:49:30 -0500
-Subject: [PATCH 05/11] bgpd: Add a path_info_flags dumper for bgp
-
-Add a debug function to allow developers to dump flags
-associated with a bgp_path_info in a human readable format.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_route.c | 51 +++++++++++++++++++++++++++++++++++++++++++++---
- 1 file changed, 48 insertions(+), 3 deletions(-)
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index e05507c520..c778002dc8 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -114,6 +114,45 @@ static const struct message bgp_pmsi_tnltype_str[] = {
- #define VRFID_NONE_STR "-"
- #define SOFT_RECONFIG_TASK_MAX_PREFIX 25000
- 
-+static inline char *bgp_route_dump_path_info_flags(struct bgp_path_info *pi,
-+						   char *buf, size_t len)
-+{
-+	uint32_t flags = pi->flags;
-+
-+	if (flags == 0) {
-+		snprintfrr(buf, len, "None ");
-+		return buf;
-+	}
-+
-+	snprintfrr(buf, len, "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
-+		   CHECK_FLAG(flags, BGP_PATH_IGP_CHANGED) ? "IGP Changed " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_DAMPED) ? "Damped" : "",
-+		   CHECK_FLAG(flags, BGP_PATH_HISTORY) ? "History " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_SELECTED) ? "Selected " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_VALID) ? "Valid " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_ATTR_CHANGED) ? "Attr Changed "
-+							    : "",
-+		   CHECK_FLAG(flags, BGP_PATH_DMED_CHECK) ? "Dmed Check " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_DMED_SELECTED) ? "Dmed Selected "
-+							     : "",
-+		   CHECK_FLAG(flags, BGP_PATH_STALE) ? "Stale " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_REMOVED) ? "Removed " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_COUNTED) ? "Counted " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_MULTIPATH) ? "Mpath " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_MULTIPATH_CHG) ? "Mpath Chg " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_RIB_ATTR_CHG) ? "Rib Chg " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_ANNC_NH_SELF) ? "NH Self " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_LINK_BW_CHG) ? "LinkBW Chg " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_ACCEPT_OWN) ? "Accept Own " : "",
-+		   CHECK_FLAG(flags, BGP_PATH_MPLSVPN_LABEL_NH) ? "MPLS Label "
-+								: "",
-+		   CHECK_FLAG(flags, BGP_PATH_MPLSVPN_NH_LABEL_BIND)
-+			   ? "MPLS Label Bind "
-+			   : "");
-+
-+	return buf;
-+}
-+
- DEFINE_HOOK(bgp_process,
- 	    (struct bgp * bgp, afi_t afi, safi_t safi, struct bgp_dest *bn,
- 	     struct peer *peer, bool withdraw),
-@@ -683,12 +722,18 @@ int bgp_path_info_cmp(struct bgp *bgp, struct bgp_path_info *new,
- 	}
- 
- 	if (debug) {
-+		char buf1[256], buf2[256];
-+
- 		bpi_ultimate = bgp_get_imported_bpi_ultimate(exist);
- 		bgp_path_info_path_with_addpath_rx_str(bpi_ultimate, exist_buf,
- 						       sizeof(exist_buf));
--		zlog_debug("%s(%s): Comparing %s flags 0x%x with %s flags 0x%x",
--			   pfx_buf, bgp->name_pretty, new_buf, new->flags,
--			   exist_buf, exist->flags);
-+		zlog_debug("%s(%s): Comparing %s flags %s with %s flags %s",
-+			   pfx_buf, bgp->name_pretty, new_buf,
-+			   bgp_route_dump_path_info_flags(new, buf1,
-+							  sizeof(buf1)),
-+			   exist_buf,
-+			   bgp_route_dump_path_info_flags(exist, buf2,
-+							  sizeof(buf2)));
- 	}
- 
- 	newattr = new->attr;
--- 
-2.43.2
-
-
-From eeea1554360868aa5efec3ad9cd9e5d7a13621aa Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Fri, 1 Mar 2024 10:01:35 -0500
-Subject: [PATCH 06/11] bgpd: Add BGP_PATH_UNSORTED for future commits
-
-Add a new flag BGP_PATH_UNSORTED to keep track
-of sorted -vs- unsorted path_info's.  Add some
-ability to the system to understand when that
-flag is set.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_route.c                              | 36 ++++++++++++-------
- bgpd/bgp_route.h                              |  3 +-
- .../r1/show_bgp_ipv4-post4.1.ref              |  2 +-
- .../r1/show_bgp_ipv4-post5.0.ref              |  2 +-
- .../r1/show_bgp_ipv4-post6.1.ref              |  2 +-
- .../all_protocol_startup/r1/show_bgp_ipv4.ref |  2 +-
- .../r1/show_bgp_ipv6-post4.1.ref              |  2 +-
- .../all_protocol_startup/r1/show_bgp_ipv6.ref |  2 +-
- .../r1/show_bgp_ipv6_post6.1.ref              |  2 +-
- 9 files changed, 32 insertions(+), 21 deletions(-)
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index c778002dc8..a9bbcaf37e 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -124,7 +124,7 @@ static inline char *bgp_route_dump_path_info_flags(struct bgp_path_info *pi,
- 		return buf;
- 	}
- 
--	snprintfrr(buf, len, "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
-+	snprintfrr(buf, len, "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
- 		   CHECK_FLAG(flags, BGP_PATH_IGP_CHANGED) ? "IGP Changed " : "",
- 		   CHECK_FLAG(flags, BGP_PATH_DAMPED) ? "Damped" : "",
- 		   CHECK_FLAG(flags, BGP_PATH_HISTORY) ? "History " : "",
-@@ -148,7 +148,8 @@ static inline char *bgp_route_dump_path_info_flags(struct bgp_path_info *pi,
- 								: "",
- 		   CHECK_FLAG(flags, BGP_PATH_MPLSVPN_NH_LABEL_BIND)
- 			   ? "MPLS Label Bind "
--			   : "");
-+			   : "",
-+		   CHECK_FLAG(flags, BGP_PATH_UNSORTED) ? "Unsorted " : "");
- 
- 	return buf;
- }
-@@ -9021,6 +9022,9 @@ static void route_vty_short_status_out(struct vty *vty,
- 		if (path->extra && bgp_path_suppressed(path))
- 			json_object_boolean_true_add(json_path, "suppressed");
- 
-+		if (CHECK_FLAG(path->flags, BGP_PATH_UNSORTED))
-+			json_object_boolean_true_add(json_path, "unsorted");
-+
- 		if (CHECK_FLAG(path->flags, BGP_PATH_VALID)
- 		    && !CHECK_FLAG(path->flags, BGP_PATH_HISTORY))
- 			json_object_boolean_true_add(json_path, "valid");
-@@ -9083,6 +9087,8 @@ static void route_vty_short_status_out(struct vty *vty,
- 	/* Selected */
- 	if (CHECK_FLAG(path->flags, BGP_PATH_HISTORY))
- 		vty_out(vty, "h");
-+	else if (CHECK_FLAG(path->flags, BGP_PATH_UNSORTED))
-+		vty_out(vty, "u");
- 	else if (CHECK_FLAG(path->flags, BGP_PATH_DAMPED))
- 		vty_out(vty, "d");
- 	else if (CHECK_FLAG(path->flags, BGP_PATH_SELECTED))
-@@ -13723,21 +13729,23 @@ enum bgp_pcounts {
- 	PCOUNT_COUNTED,
- 	PCOUNT_BPATH_SELECTED,
- 	PCOUNT_PFCNT, /* the figure we display to users */
-+	PCOUNT_UNSORTED,
- 	PCOUNT_MAX,
- };
- 
- static const char *const pcount_strs[] = {
--		[PCOUNT_ADJ_IN] = "Adj-in",
--		[PCOUNT_DAMPED] = "Damped",
--		[PCOUNT_REMOVED] = "Removed",
--		[PCOUNT_HISTORY] = "History",
--		[PCOUNT_STALE] = "Stale",
--		[PCOUNT_VALID] = "Valid",
--		[PCOUNT_ALL] = "All RIB",
--		[PCOUNT_COUNTED] = "PfxCt counted",
--		[PCOUNT_BPATH_SELECTED] = "PfxCt Best Selected",
--		[PCOUNT_PFCNT] = "Useable",
--		[PCOUNT_MAX] = NULL,
-+	[PCOUNT_ADJ_IN] = "Adj-in",
-+	[PCOUNT_DAMPED] = "Damped",
-+	[PCOUNT_REMOVED] = "Removed",
-+	[PCOUNT_HISTORY] = "History",
-+	[PCOUNT_STALE] = "Stale",
-+	[PCOUNT_VALID] = "Valid",
-+	[PCOUNT_ALL] = "All RIB",
-+	[PCOUNT_COUNTED] = "PfxCt counted",
-+	[PCOUNT_BPATH_SELECTED] = "PfxCt Best Selected",
-+	[PCOUNT_PFCNT] = "Useable",
-+	[PCOUNT_UNSORTED] = "Unsorted",
-+	[PCOUNT_MAX] = NULL,
- };
- 
- struct peer_pcounts {
-@@ -13778,6 +13786,8 @@ static void bgp_peer_count_proc(struct bgp_dest *rn, struct peer_pcounts *pc)
- 			pc->count[PCOUNT_PFCNT]++;
- 		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
- 			pc->count[PCOUNT_BPATH_SELECTED]++;
-+		if (CHECK_FLAG(pi->flags, BGP_PATH_UNSORTED))
-+			pc->count[PCOUNT_UNSORTED]++;
- 
- 		if (CHECK_FLAG(pi->flags, BGP_PATH_COUNTED)) {
- 			pc->count[PCOUNT_COUNTED]++;
-diff --git a/bgpd/bgp_route.h b/bgpd/bgp_route.h
-index 2929c75df7..5781eb70f2 100644
---- a/bgpd/bgp_route.h
-+++ b/bgpd/bgp_route.h
-@@ -59,7 +59,7 @@ enum bgp_show_adj_route_type {
- 
- #define BGP_SHOW_SCODE_HEADER                                                  \
- 	"Status codes:  s suppressed, d damped, "                              \
--	"h history, * valid, > best, = multipath,\n"                           \
-+	"h history, u unsorted, * valid, > best, = multipath,\n"               \
- 	"               i internal, r RIB-failure, S Stale, R Removed\n"
- #define BGP_SHOW_OCODE_HEADER                                                  \
- 	"Origin codes:  i - IGP, e - EGP, ? - incomplete\n"
-@@ -327,6 +327,7 @@ struct bgp_path_info {
- #define BGP_PATH_ACCEPT_OWN (1 << 16)
- #define BGP_PATH_MPLSVPN_LABEL_NH (1 << 17)
- #define BGP_PATH_MPLSVPN_NH_LABEL_BIND (1 << 18)
-+#define BGP_PATH_UNSORTED (1 << 19)
- 
- 	/* BGP route type.  This can be static, RIP, OSPF, BGP etc.  */
- 	uint8_t type;
-diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post4.1.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post4.1.ref
-index b2e8de5ce1..fca6cbed82 100644
---- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post4.1.ref
-+++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post4.1.ref
-@@ -1,5 +1,5 @@
- BGP table version is 1, local router ID is 192.168.0.1, vrf id 0
--Status codes:  s suppressed, d damped, h history, * valid, > best, = multipath,
-+Status codes:  s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath,
-                i internal, r RIB-failure, S Stale, R Removed
- Nexthop codes: @NNN nexthop's vrf id, < announce-nh-self
- Origin codes:  i - IGP, e - EGP, ? - incomplete
-diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post5.0.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post5.0.ref
-index 7bee704182..bb10828815 100644
---- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post5.0.ref
-+++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post5.0.ref
-@@ -1,5 +1,5 @@
- BGP table version is 1, local router ID is 192.168.0.1, vrf id 0
--Status codes:  s suppressed, d damped, h history, * valid, > best, = multipath,
-+Status codes:  s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath,
-                i internal, r RIB-failure, S Stale, R Removed
- Nexthop codes: @NNN nexthop's vrf id, < announce-nh-self
- Origin codes:  i - IGP, e - EGP, ? - incomplete
-diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post6.1.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post6.1.ref
-index 31071e760d..04ad86fbb0 100644
---- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post6.1.ref
-+++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4-post6.1.ref
-@@ -1,6 +1,6 @@
- BGP table version is 1, local router ID is 192.168.0.1, vrf id 0
- Default local pref 100, local AS 100
--Status codes:  s suppressed, d damped, h history, * valid, > best, = multipath,
-+Status codes:  s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath,
-                i internal, r RIB-failure, S Stale, R Removed
- Nexthop codes: @NNN nexthop's vrf id, < announce-nh-self
- Origin codes:  i - IGP, e - EGP, ? - incomplete
-diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4.ref
-index 53c4793bf4..ca95a1671b 100644
---- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4.ref
-+++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv4.ref
-@@ -1,5 +1,5 @@
- BGP table version is 1, local router ID is 192.168.0.1
--Status codes: s suppressed, d damped, h history, * valid, > best, = multipath,
-+Status codes: s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath,
-               i internal, r RIB-failure, S Stale, R Removed
- Origin codes: i - IGP, e - EGP, ? - incomplete
- 
-diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6-post4.1.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6-post4.1.ref
-index fe3f0720d8..f1b09264b2 100644
---- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6-post4.1.ref
-+++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6-post4.1.ref
-@@ -1,5 +1,5 @@
- BGP table version is 1, local router ID is 192.168.0.1, vrf id 0
--Status codes:  s suppressed, d damped, h history, * valid, > best, = multipath,
-+Status codes:  s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath,
-                i internal, r RIB-failure, S Stale, R Removed
- Nexthop codes: @NNN nexthop's vrf id, < announce-nh-self
- Origin codes:  i - IGP, e - EGP, ? - incomplete
-diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6.ref
-index 363b4f5349..278fc2dad2 100644
---- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6.ref
-+++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6.ref
-@@ -1,5 +1,5 @@
- BGP table version is 1, local router ID is 192.168.0.1
--Status codes: s suppressed, d damped, h history, * valid, > best, = multipath,
-+Status codes: s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath,
-               i internal, r RIB-failure, S Stale, R Removed
- Origin codes: i - IGP, e - EGP, ? - incomplete
- 
-diff --git a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6_post6.1.ref b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6_post6.1.ref
-index 8c3229b45d..88f3eac178 100644
---- a/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6_post6.1.ref
-+++ b/tests/topotests/all_protocol_startup/r1/show_bgp_ipv6_post6.1.ref
-@@ -1,6 +1,6 @@
- BGP table version is 1, local router ID is 192.168.0.1, vrf id 0
- Default local pref 100, local AS 100
--Status codes:  s suppressed, d damped, h history, * valid, > best, = multipath,
-+Status codes:  s suppressed, d damped, h history, u unsorted, * valid, > best, = multipath,
-                i internal, r RIB-failure, S Stale, R Removed
- Nexthop codes: @NNN nexthop's vrf id, < announce-nh-self
- Origin codes:  i - IGP, e - EGP, ? - incomplete
--- 
-2.43.2
-
-
-From 2913f3227edd1b85927f763a4f5ca2bb6dcf9899 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 18 Mar 2024 09:33:21 -0400
-Subject: [PATCH 07/11] bgpd: Call bgp_process when bgp_path_info_delete is
- called
-
-bgp_damp.c has an instance of bgp_path_info_delete is called.
-Thus setting up the path info for deletion, but since it never
-calls bgp_process, it can never be deleted.  This means that in
-a dampening situation, after a withdrawal the path_info would
-stick around.  Schedule the path for deletion.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_damp.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/bgpd/bgp_damp.c b/bgpd/bgp_damp.c
-index 80425ebe7a..7893884fa6 100644
---- a/bgpd/bgp_damp.c
-+++ b/bgpd/bgp_damp.c
-@@ -306,8 +306,10 @@ void bgp_damp_info_free(struct bgp_damp_info *bdi, int withdraw, afi_t afi,
- 	bgp_path_info_unset_flag(bdi->dest, path,
- 				 BGP_PATH_HISTORY | BGP_PATH_DAMPED);
- 
--	if (bdi->lastrecord == BGP_RECORD_WITHDRAW && withdraw)
-+	if (bdi->lastrecord == BGP_RECORD_WITHDRAW && withdraw) {
- 		bgp_path_info_delete(bdi->dest, path);
-+		bgp_process(path->peer->bgp, bdi->dest, afi, safi);
-+	}
- 
- 	XFREE(MTYPE_BGP_DAMP_INFO, bdi);
- }
--- 
-2.43.2
-
-
-From 70e1a639ac199ed5fb6df2e0a88e565472c4e65a Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 4 Mar 2024 10:41:13 -0500
-Subject: [PATCH 08/11] bgpd: Add pi to bgp_process
-
-This will allow a consistency of approach to adding/removing
-pi's to from the workqueue for processing as well as properly
-handling the dest->info pi list more appropriately.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_damp.c    |  4 +--
- bgpd/bgp_evpn.c    | 24 +++++++--------
- bgpd/bgp_evpn_mh.c |  8 ++---
- bgpd/bgp_label.c   |  2 +-
- bgpd/bgp_mplsvpn.c | 14 ++++-----
- bgpd/bgp_nht.c     |  2 +-
- bgpd/bgp_route.c   | 77 ++++++++++++++++++++--------------------------
- bgpd/bgp_route.h   |  3 +-
- bgpd/bgp_vty.c     |  9 ++++--
- bgpd/bgp_zebra.c   |  2 +-
- bgpd/bgpd.c        | 16 +++++++---
- bgpd/rfapi/rfapi.c |  6 ++--
- 12 files changed, 85 insertions(+), 82 deletions(-)
-
-diff --git a/bgpd/bgp_damp.c b/bgpd/bgp_damp.c
-index 7893884fa6..6b6387b1b5 100644
---- a/bgpd/bgp_damp.c
-+++ b/bgpd/bgp_damp.c
-@@ -150,7 +150,7 @@ static void bgp_reuse_timer(struct event *t)
- 				bgp_aggregate_increment(
- 					bgp, bgp_dest_get_prefix(bdi->dest),
- 					bdi->path, bdi->afi, bdi->safi);
--				bgp_process(bgp, bdi->dest, bdi->afi,
-+				bgp_process(bgp, bdi->dest, bdi->path, bdi->afi,
- 					    bdi->safi);
- 			}
- 
-@@ -308,7 +308,7 @@ void bgp_damp_info_free(struct bgp_damp_info *bdi, int withdraw, afi_t afi,
- 
- 	if (bdi->lastrecord == BGP_RECORD_WITHDRAW && withdraw) {
- 		bgp_path_info_delete(bdi->dest, path);
--		bgp_process(path->peer->bgp, bdi->dest, afi, safi);
-+		bgp_process(path->peer->bgp, bdi->dest, path, afi, safi);
- 	}
- 
- 	XFREE(MTYPE_BGP_DAMP_INFO, bdi);
-diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index c7f8024f79..72dfd000f6 100644
---- a/bgpd/bgp_evpn.c
-+++ b/bgpd/bgp_evpn.c
-@@ -1428,7 +1428,7 @@ void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn,
- 		 * this table.
- 		 */
- 		if (pi)
--			bgp_process(bgp, global_dest, afi, safi);
-+			bgp_process(bgp, global_dest, pi, afi, safi);
- 		bgp_dest_unlock_node(global_dest);
- 	}
- 
-@@ -1748,7 +1748,7 @@ int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp,
- 
- 	/* schedule for processing and unlock node */
- 	if (route_changed) {
--		bgp_process(bgp_evpn, dest, afi, safi);
-+		bgp_process(bgp_evpn, dest, pi, afi, safi);
- 		bgp_dest_unlock_node(dest);
- 	}
- 
-@@ -2314,7 +2314,7 @@ int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
- 			false /* setup_sync */, NULL /* old_is_sync */);
- 
- 		/* Schedule for processing and unlock node. */
--		bgp_process(bgp, dest, afi, safi);
-+		bgp_process(bgp, dest, global_pi, afi, safi);
- 		bgp_dest_unlock_node(dest);
- 	}
- 
-@@ -2374,7 +2374,7 @@ int delete_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp)
- 
- 	delete_evpn_route_entry(bgp_evpn, afi, safi, dest, &pi);
- 	if (pi)
--		bgp_process(bgp_evpn, dest, afi, safi);
-+		bgp_process(bgp_evpn, dest, pi, afi, safi);
- 	bgp_dest_unlock_node(dest);
- 	return 0;
- }
-@@ -2414,7 +2414,7 @@ int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
- 		 * this table.
- 		 */
- 		if (pi)
--			bgp_process(bgp, global_dest, afi, safi);
-+			bgp_process(bgp, global_dest, pi, afi, safi);
- 		bgp_dest_unlock_node(global_dest);
- 	}
- 
-@@ -2586,7 +2586,7 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
- 			NULL /* old_is_sync */);
- 
- 		/* Schedule for processing and unlock node. */
--		bgp_process(bgp, global_dest, afi, safi);
-+		bgp_process(bgp, global_dest, global_pi, afi, safi);
- 		bgp_dest_unlock_node(global_dest);
- 	}
- 
-@@ -2671,7 +2671,7 @@ void delete_global_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
- 
- 			delete_evpn_route_entry(bgp, afi, safi, dest, &pi);
- 			if (pi)
--				bgp_process(bgp, dest, afi, safi);
-+				bgp_process(bgp, dest, pi, afi, safi);
- 		}
- 
- 		/* Unlock RD node. */
-@@ -3140,7 +3140,7 @@ int install_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
- 				safi);
- 
- 	/* Perform route selection and update zebra, if required. */
--	bgp_process(bgp_vrf, dest, afi, safi);
-+	bgp_process(bgp_vrf, dest, pi, afi, safi);
- 
- 	/* Process for route leaking. */
- 	vpn_leak_from_vrf_update(bgp_get_default(), bgp_vrf, pi);
-@@ -3502,7 +3502,7 @@ int uninstall_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
- 	bgp_evpn_path_nh_del(bgp_vrf, pi);
- 
- 	/* Perform route selection and update zebra, if required. */
--	bgp_process(bgp_vrf, dest, afi, safi);
-+	bgp_process(bgp_vrf, dest, pi, afi, safi);
- 
- 	/* Unlock route node. */
- 	bgp_dest_unlock_node(dest);
-@@ -4475,7 +4475,7 @@ void update_advertise_vni_route(struct bgp *bgp, struct bgpevpn *vpn,
- 	}
- 
- 	/* Schedule for processing and unlock node. */
--	bgp_process(bgp, global_dest, afi, safi);
-+	bgp_process(bgp, global_dest, global_pi, afi, safi);
- 	bgp_dest_unlock_node(global_dest);
- }
- 
-@@ -4525,7 +4525,7 @@ void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
- 			false /* setup_sync */, NULL /* old_is_sync */);
- 
- 		/* Schedule for processing and unlock node. */
--		bgp_process(bgp, global_dest, afi, safi);
-+		bgp_process(bgp, global_dest, pi, afi, safi);
- 		bgp_dest_unlock_node(global_dest);
- 	}
- 
-@@ -4570,7 +4570,7 @@ int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
- 		 * this table.
- 		 */
- 		if (pi)
--			bgp_process(bgp, global_dest, afi, safi);
-+			bgp_process(bgp, global_dest, pi, afi, safi);
- 		bgp_dest_unlock_node(global_dest);
- 	}
- 
-diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c
-index f36d109b65..f5df47fbfb 100644
---- a/bgpd/bgp_evpn_mh.c
-+++ b/bgpd/bgp_evpn_mh.c
-@@ -512,7 +512,7 @@ static int bgp_evpn_mh_route_delete(struct bgp *bgp, struct bgp_evpn_es *es,
- 		 * this table.
- 		 */
- 		if (pi)
--			bgp_process(bgp, global_dest, afi, safi);
-+			bgp_process(bgp, global_dest, pi, afi, safi);
- 		bgp_dest_unlock_node(global_dest);
- 	}
- 
-@@ -563,7 +563,7 @@ int delete_global_ead_evi_routes(struct bgp *bgp, struct bgpevpn *vpn)
- 
- 			delete_evpn_route_entry(bgp, afi, safi, bd, &pi);
- 			if (pi)
--				bgp_process(bgp, bd, afi, safi);
-+				bgp_process(bgp, bd, pi, afi, safi);
- 		}
- 	}
- 
-@@ -687,7 +687,7 @@ static int bgp_evpn_type4_route_update(struct bgp *bgp,
- 					 attr_new, &global_pi, &route_changed);
- 
- 		/* Schedule for processing and unlock node. */
--		bgp_process(bgp, dest, afi, safi);
-+		bgp_process(bgp, dest, global_pi, afi, safi);
- 		bgp_dest_unlock_node(dest);
- 	}
- 
-@@ -1026,7 +1026,7 @@ static int bgp_evpn_type1_route_update(struct bgp *bgp, struct bgp_evpn_es *es,
- 					 attr_new, &global_pi, &route_changed);
- 
- 		/* Schedule for processing and unlock node. */
--		bgp_process(bgp, dest, afi, safi);
-+		bgp_process(bgp, dest, global_pi, afi, safi);
- 		bgp_dest_unlock_node(dest);
- 	}
- 
-diff --git a/bgpd/bgp_label.c b/bgpd/bgp_label.c
-index 7327ab5182..68104967b2 100644
---- a/bgpd/bgp_label.c
-+++ b/bgpd/bgp_label.c
-@@ -74,7 +74,7 @@ int bgp_parse_fec_update(void)
- 		bgp_set_valid_label(&dest->local_label);
- 	}
- 	SET_FLAG(dest->flags, BGP_NODE_LABEL_CHANGED);
--	bgp_process(bgp, dest, afi, safi);
-+	bgp_process(bgp, dest, NULL, afi, safi);
- 	bgp_dest_unlock_node(dest);
- 	return 1;
- }
-diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
-index ef8ca39e82..a48ef875c4 100644
---- a/bgpd/bgp_mplsvpn.c
-+++ b/bgpd/bgp_mplsvpn.c
-@@ -1254,7 +1254,7 @@ leak_update(struct bgp *to_bgp, struct bgp_dest *bn,
- 
- 		/* Process change. */
- 		bgp_aggregate_increment(to_bgp, p, bpi, afi, safi);
--		bgp_process(to_bgp, bn, afi, safi);
-+		bgp_process(to_bgp, bn, bpi, afi, safi);
- 
- 		if (debug)
- 			zlog_debug("%s: ->%s: %pBD Found route, changed attr",
-@@ -1316,7 +1316,7 @@ leak_update(struct bgp *to_bgp, struct bgp_dest *bn,
- 	bgp_aggregate_increment(to_bgp, p, new, afi, safi);
- 	bgp_path_info_add(bn, new);
- 
--	bgp_process(to_bgp, bn, afi, safi);
-+	bgp_process(to_bgp, bn, new, afi, safi);
- 
- 	if (debug)
- 		zlog_debug("%s: ->%s: %pBD: Added new route", __func__,
-@@ -2002,7 +2002,7 @@ void vpn_leak_from_vrf_withdraw(struct bgp *to_bgp,		/* to */
- 
- 		bgp_aggregate_decrement(to_bgp, p, bpi, afi, safi);
- 		bgp_path_info_delete(bn, bpi);
--		bgp_process(to_bgp, bn, afi, safi);
-+		bgp_process(to_bgp, bn, bpi, afi, safi);
- 	}
- 	bgp_dest_unlock_node(bn);
- }
-@@ -2058,7 +2058,7 @@ void vpn_leak_from_vrf_withdraw_all(struct bgp *to_bgp, struct bgp *from_bgp,
- 						to_bgp, bgp_dest_get_prefix(bn),
- 						bpi, afi, safi);
- 					bgp_path_info_delete(bn, bpi);
--					bgp_process(to_bgp, bn, afi, safi);
-+					bgp_process(to_bgp, bn, bpi, afi, safi);
- 					bgp_mplsvpn_path_nh_label_unlink(
- 						bpi->extra->vrfleak->parent);
- 				}
-@@ -2543,7 +2543,7 @@ void vpn_leak_to_vrf_withdraw(struct bgp_path_info *path_vpn)
- 					   bpi);
- 			bgp_aggregate_decrement(bgp, p, bpi, afi, safi);
- 			bgp_path_info_delete(bn, bpi);
--			bgp_process(bgp, bn, afi, safi);
-+			bgp_process(bgp, bn, bpi, afi, safi);
- 		}
- 		bgp_dest_unlock_node(bn);
- 	}
-@@ -2575,7 +2575,7 @@ void vpn_leak_to_vrf_withdraw_all(struct bgp *to_bgp, afi_t afi)
- 							bgp_dest_get_prefix(bn),
- 							bpi, afi, safi);
- 				bgp_path_info_delete(bn, bpi);
--				bgp_process(to_bgp, bn, afi, safi);
-+				bgp_process(to_bgp, bn, bpi, afi, safi);
- 			}
- 		}
- 	}
-@@ -4226,7 +4226,7 @@ static int bgp_mplsvpn_nh_label_bind_get_local_label_cb(mpls_label_t label,
- 		if (!table)
- 			continue;
- 		SET_FLAG(pi->net->flags, BGP_NODE_LABEL_CHANGED);
--		bgp_process(table->bgp, pi->net, table->afi, table->safi);
-+		bgp_process(table->bgp, pi->net, pi, table->afi, table->safi);
- 	}
- 
- 	return 0;
-diff --git a/bgpd/bgp_nht.c b/bgpd/bgp_nht.c
-index 1614779ea6..97ec7e33b1 100644
---- a/bgpd/bgp_nht.c
-+++ b/bgpd/bgp_nht.c
-@@ -1414,7 +1414,7 @@ void evaluate_paths(struct bgp_nexthop_cache *bnc)
- 			}
- 		}
- 
--		bgp_process(bgp_path, dest, afi, safi);
-+		bgp_process(bgp_path, dest, path, afi, safi);
- 	}
- 
- 	if (peer) {
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index a9bbcaf37e..e3350df7b0 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -2892,6 +2892,7 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest,
- 	     (pi != NULL) && (nextpi = pi->next, 1); pi = nextpi) {
- 		enum bgp_path_selection_reason reason;
- 
-+		UNSET_FLAG(pi->flags, BGP_PATH_UNSORTED);
- 		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
- 			old_select = pi;
- 
-@@ -3748,13 +3749,22 @@ static struct bgp_process_queue *bgp_processq_alloc(struct bgp *bgp)
- 	return pqnode;
- }
- 
--void bgp_process(struct bgp *bgp, struct bgp_dest *dest, afi_t afi, safi_t safi)
-+void bgp_process(struct bgp *bgp, struct bgp_dest *dest,
-+		 struct bgp_path_info *pi, afi_t afi, safi_t safi)
- {
- #define ARBITRARY_PROCESS_QLEN		10000
- 	struct work_queue *wq = bgp->process_queue;
- 	struct bgp_process_queue *pqnode;
- 	int pqnode_reuse = 0;
- 
-+	/*
-+	 * Indicate that *this* pi is in an unsorted
-+	 * situation, even if the node is already
-+	 * scheduled.
-+	 */
-+	if (pi)
-+		SET_FLAG(pi->flags, BGP_PATH_UNSORTED);
-+
- 	/* already scheduled for processing? */
- 	if (CHECK_FLAG(dest->flags, BGP_NODE_PROCESS_SCHEDULED))
- 		return;
-@@ -4003,7 +4013,7 @@ void bgp_rib_remove(struct bgp_dest *dest, struct bgp_path_info *pi,
- 	}
- 
- 	hook_call(bgp_process, peer->bgp, afi, safi, dest, peer, true);
--	bgp_process(peer->bgp, dest, afi, safi);
-+	bgp_process(peer->bgp, dest, pi, afi, safi);
- }
- 
- static void bgp_rib_withdraw(struct bgp_dest *dest, struct bgp_path_info *pi,
-@@ -4603,7 +4613,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
- 				    != BGP_DAMP_SUPPRESSED) {
- 					bgp_aggregate_increment(bgp, p, pi, afi,
- 								safi);
--					bgp_process(bgp, dest, afi, safi);
-+					bgp_process(bgp, dest, pi, afi, safi);
- 				}
- 			} else /* Duplicate - odd */
- 			{
-@@ -4631,7 +4641,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
- 					bgp_path_info_unset_flag(
- 						dest, pi, BGP_PATH_STALE);
- 					bgp_dest_set_defer_flag(dest, false);
--					bgp_process(bgp, dest, afi, safi);
-+					bgp_process(bgp, dest, pi, afi, safi);
- 				}
- 			}
- 
-@@ -4921,7 +4931,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
- 		/* Process change. */
- 		bgp_aggregate_increment(bgp, p, pi, afi, safi);
- 
--		bgp_process(bgp, dest, afi, safi);
-+		bgp_process(bgp, dest, pi, afi, safi);
- 		bgp_dest_unlock_node(dest);
- 
- 		if (SAFI_UNICAST == safi
-@@ -5066,7 +5076,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
- 	hook_call(bgp_process, bgp, afi, safi, dest, peer, false);
- 
- 	/* Process change. */
--	bgp_process(bgp, dest, afi, safi);
-+	bgp_process(bgp, dest, new, afi, safi);
- 
- 	if (SAFI_UNICAST == safi
- 	    && (bgp->inst_type == BGP_INSTANCE_TYPE_VRF
-@@ -6573,7 +6583,7 @@ void bgp_static_update(struct bgp *bgp, const struct prefix *p,
- 
- 			/* Process change. */
- 			bgp_aggregate_increment(bgp, p, pi, afi, safi);
--			bgp_process(bgp, dest, afi, safi);
-+			bgp_process(bgp, dest, pi, afi, safi);
- 
- 			if (SAFI_MPLS_VPN == safi &&
- 			    bgp->inst_type == BGP_INSTANCE_TYPE_DEFAULT) {
-@@ -6631,7 +6641,7 @@ void bgp_static_update(struct bgp *bgp, const struct prefix *p,
- 	bgp_dest_unlock_node(dest);
- 
- 	/* Process change. */
--	bgp_process(bgp, dest, afi, safi);
-+	bgp_process(bgp, dest, new, afi, safi);
- 
- 	if (SAFI_UNICAST == safi &&
- 	    (bgp->inst_type == BGP_INSTANCE_TYPE_VRF ||
-@@ -6688,7 +6698,7 @@ void bgp_static_withdraw(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 		bgp_aggregate_decrement(bgp, p, pi, afi, safi);
- 		bgp_unlink_nexthop(pi);
- 		bgp_path_info_delete(dest, pi);
--		bgp_process(bgp, dest, afi, safi);
-+		bgp_process(bgp, dest, pi, afi, safi);
- 	}
- 
- 	/* Unlock bgp_node_lookup. */
-@@ -7093,7 +7103,7 @@ static void bgp_purge_af_static_redist_routes(struct bgp *bgp, afi_t afi,
- 					safi);
- 				bgp_unlink_nexthop(pi);
- 				bgp_path_info_delete(dest, pi);
--				bgp_process(bgp, dest, afi, safi);
-+				bgp_process(bgp, dest, pi, afi, safi);
- 			}
- 		}
- 	}
-@@ -7482,7 +7492,7 @@ static void bgp_aggregate_install(
- 		SET_FLAG(new->flags, BGP_PATH_VALID);
- 
- 		bgp_path_info_add(dest, new);
--		bgp_process(bgp, dest, afi, safi);
-+		bgp_process(bgp, dest, new, afi, safi);
- 	} else {
- 	uninstall_aggregate_route:
- 		for (pi = orig; pi; pi = pi->next)
-@@ -7494,7 +7504,7 @@ static void bgp_aggregate_install(
- 		/* Withdraw static BGP route from routing table. */
- 		if (pi) {
- 			bgp_path_info_delete(dest, pi);
--			bgp_process(bgp, dest, afi, safi);
-+			bgp_process(bgp, dest, pi, afi, safi);
- 		}
- 	}
- 
-@@ -7580,7 +7590,6 @@ void bgp_aggregate_toggle_suppressed(struct bgp_aggregate *aggregate,
- 	const struct prefix *dest_p;
- 	struct bgp_dest *dest, *top;
- 	struct bgp_path_info *pi;
--	bool toggle_suppression;
- 
- 	/* We've found a different MED we must revert any suppressed routes. */
- 	top = bgp_node_get(table, p);
-@@ -7590,7 +7599,6 @@ void bgp_aggregate_toggle_suppressed(struct bgp_aggregate *aggregate,
- 		if (dest_p->prefixlen <= p->prefixlen)
- 			continue;
- 
--		toggle_suppression = false;
- 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
- 			if (BGP_PATH_HOLDDOWN(pi))
- 				continue;
-@@ -7601,17 +7609,14 @@ void bgp_aggregate_toggle_suppressed(struct bgp_aggregate *aggregate,
- 			if (suppress) {
- 				/* Suppress route if not suppressed already. */
- 				if (aggr_suppress_path(aggregate, pi))
--					toggle_suppression = true;
-+					bgp_process(bgp, dest, pi, afi, safi);
- 				continue;
- 			}
- 
- 			/* Install route if there is no more suppression. */
- 			if (aggr_unsuppress_path(aggregate, pi))
--				toggle_suppression = true;
-+				bgp_process(bgp, dest, pi, afi, safi);
- 		}
--
--		if (toggle_suppression)
--			bgp_process(bgp, dest, afi, safi);
- 	}
- 	bgp_dest_unlock_node(top);
- }
-@@ -7670,7 +7675,6 @@ bool bgp_aggregate_route(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 	struct ecommunity *ecommunity = NULL;
- 	struct lcommunity *lcommunity = NULL;
- 	struct bgp_path_info *pi;
--	unsigned long match = 0;
- 	uint8_t atomic_aggregate = 0;
- 
- 	/* If the bgp instance is being deleted or self peer is deleted
-@@ -7720,8 +7724,6 @@ bool bgp_aggregate_route(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 		if (!bgp_check_advertise(bgp, dest, safi))
- 			continue;
- 
--		match = 0;
--
- 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
- 			if (BGP_PATH_HOLDDOWN(pi))
- 				continue;
-@@ -7745,7 +7747,7 @@ bool bgp_aggregate_route(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 			if (aggregate->summary_only
- 			    && AGGREGATE_MED_VALID(aggregate)) {
- 				if (aggr_suppress_path(aggregate, pi))
--					match++;
-+					bgp_process(bgp, dest, pi, afi, safi);
- 			}
- 
- 			/*
-@@ -7761,7 +7763,7 @@ bool bgp_aggregate_route(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 			    && AGGREGATE_MED_VALID(aggregate)
- 			    && aggr_suppress_map_test(bgp, aggregate, pi)) {
- 				if (aggr_suppress_path(aggregate, pi))
--					match++;
-+					bgp_process(bgp, dest, pi, afi, safi);
- 			}
- 
- 			aggregate->count++;
-@@ -7822,8 +7824,6 @@ bool bgp_aggregate_route(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 					aggregate,
- 					bgp_attr_get_lcommunity(pi->attr));
- 		}
--		if (match)
--			bgp_process(bgp, dest, afi, safi);
- 	}
- 	if (aggregate->as_set) {
- 		bgp_compute_aggregate_aspath_val(aggregate);
-@@ -7883,7 +7883,6 @@ void bgp_aggregate_delete(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 	struct bgp_dest *top;
- 	struct bgp_dest *dest;
- 	struct bgp_path_info *pi;
--	unsigned long match;
- 
- 	table = bgp->rib[afi][safi];
- 
-@@ -7895,7 +7894,6 @@ void bgp_aggregate_delete(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 
- 		if (dest_p->prefixlen <= p->prefixlen)
- 			continue;
--		match = 0;
- 
- 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
- 			if (BGP_PATH_HOLDDOWN(pi))
-@@ -7913,7 +7911,7 @@ void bgp_aggregate_delete(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 			if (pi->extra && pi->extra->aggr_suppressors &&
- 			    listcount(pi->extra->aggr_suppressors)) {
- 				if (aggr_unsuppress_path(aggregate, pi))
--					match++;
-+					bgp_process(bgp, dest, pi, afi, safi);
- 			}
- 
- 			aggregate->count--;
-@@ -7955,10 +7953,6 @@ void bgp_aggregate_delete(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 							pi->attr));
- 			}
- 		}
--
--		/* If this node was suppressed, process the change. */
--		if (match)
--			bgp_process(bgp, dest, afi, safi);
- 	}
- 	if (aggregate->as_set) {
- 		aspath_free(aggregate->aspath);
-@@ -8107,7 +8101,6 @@ static void bgp_remove_route_from_aggregate(struct bgp *bgp, afi_t afi,
- 	struct community *community = NULL;
- 	struct ecommunity *ecommunity = NULL;
- 	struct lcommunity *lcommunity = NULL;
--	unsigned long match = 0;
- 
- 	/* If the bgp instance is being deleted or self peer is deleted
- 	 * then do not create aggregate route
-@@ -8124,12 +8117,12 @@ static void bgp_remove_route_from_aggregate(struct bgp *bgp, afi_t afi,
- 
- 	if (aggregate->summary_only && AGGREGATE_MED_VALID(aggregate))
- 		if (aggr_unsuppress_path(aggregate, pi))
--			match++;
-+			bgp_process(bgp, pi->net, pi, afi, safi);
- 
- 	if (aggregate->suppress_map_name && AGGREGATE_MED_VALID(aggregate)
- 	    && aggr_suppress_map_test(bgp, aggregate, pi))
- 		if (aggr_unsuppress_path(aggregate, pi))
--			match++;
-+			bgp_process(bgp, pi->net, pi, afi, safi);
- 
- 	/*
- 	 * This must be called after `summary`, `suppress-map` check to avoid
-@@ -8171,10 +8164,6 @@ static void bgp_remove_route_from_aggregate(struct bgp *bgp, afi_t afi,
- 				aggregate, bgp_attr_get_lcommunity(pi->attr));
- 	}
- 
--	/* If this node was suppressed, process the change. */
--	if (match)
--		bgp_process(bgp, pi->net, afi, safi);
--
- 	origin = BGP_ORIGIN_IGP;
- 	if (aggregate->incomplete_origin_count > 0)
- 		origin = BGP_ORIGIN_INCOMPLETE;
-@@ -8778,7 +8767,7 @@ void bgp_redistribute_add(struct bgp *bgp, struct prefix *p,
- 				/* Process change. */
- 				bgp_aggregate_increment(bgp, p, bpi, afi,
- 							SAFI_UNICAST);
--				bgp_process(bgp, bn, afi, SAFI_UNICAST);
-+				bgp_process(bgp, bn, bpi, afi, SAFI_UNICAST);
- 				bgp_dest_unlock_node(bn);
- 				aspath_unintern(&attr.aspath);
- 
-@@ -8801,7 +8790,7 @@ void bgp_redistribute_add(struct bgp *bgp, struct prefix *p,
- 		bgp_path_info_add(bn, new);
- 		bgp_dest_unlock_node(bn);
- 		SET_FLAG(bn->flags, BGP_NODE_FIB_INSTALLED);
--		bgp_process(bgp, bn, afi, SAFI_UNICAST);
-+		bgp_process(bgp, bn, new, afi, SAFI_UNICAST);
- 
- 		if ((bgp->inst_type == BGP_INSTANCE_TYPE_VRF)
- 		    || (bgp->inst_type == BGP_INSTANCE_TYPE_DEFAULT)) {
-@@ -8842,7 +8831,7 @@ void bgp_redistribute_delete(struct bgp *bgp, struct prefix *p, uint8_t type,
- 			}
- 			bgp_aggregate_decrement(bgp, p, pi, afi, SAFI_UNICAST);
- 			bgp_path_info_delete(dest, pi);
--			bgp_process(bgp, dest, afi, SAFI_UNICAST);
-+			bgp_process(bgp, dest, pi, afi, SAFI_UNICAST);
- 		}
- 		bgp_dest_unlock_node(dest);
- 	}
-@@ -8876,7 +8865,7 @@ void bgp_redistribute_withdraw(struct bgp *bgp, afi_t afi, int type,
- 			bgp_path_info_delete(dest, pi);
- 			if (!CHECK_FLAG(bgp->flags,
- 					BGP_FLAG_DELETE_IN_PROGRESS))
--				bgp_process(bgp, dest, afi, SAFI_UNICAST);
-+				bgp_process(bgp, dest, pi, afi, SAFI_UNICAST);
- 			else {
- 				dest = bgp_path_info_reap(dest, pi);
- 				assert(dest);
-diff --git a/bgpd/bgp_route.h b/bgpd/bgp_route.h
-index 5781eb70f2..1e5c31afab 100644
---- a/bgpd/bgp_route.h
-+++ b/bgpd/bgp_route.h
-@@ -802,7 +802,8 @@ extern void bgp_withdraw(struct peer *peer, const struct prefix *p,
- 			 struct bgp_route_evpn *evpn);
- 
- /* for bgp_nexthop and bgp_damp */
--extern void bgp_process(struct bgp *, struct bgp_dest *, afi_t, safi_t);
-+extern void bgp_process(struct bgp *bgp, struct bgp_dest *dest,
-+			struct bgp_path_info *pi, afi_t afi, safi_t safi);
- 
- /*
-  * Add an end-of-initial-update marker to the process queue. This is just a
-diff --git a/bgpd/bgp_vty.c b/bgpd/bgp_vty.c
-index 9530a66fca..8d442ae64a 100644
---- a/bgpd/bgp_vty.c
-+++ b/bgpd/bgp_vty.c
-@@ -10672,7 +10672,10 @@ static int bgp_clear_prefix(struct vty *vty, const char *view_name,
- 				if (rm_p->prefixlen == match.prefixlen) {
- 					SET_FLAG(rm->flags,
- 						 BGP_NODE_USER_CLEAR);
--					bgp_process(bgp, rm, afi, safi);
-+					bgp_process(bgp, rm,
-+						    bgp_dest_get_bgp_path_info(
-+							    rm),
-+						    afi, safi);
- 				}
- 				bgp_dest_unlock_node(rm);
- 			}
-@@ -10684,7 +10687,9 @@ static int bgp_clear_prefix(struct vty *vty, const char *view_name,
- 
- 			if (dest_p->prefixlen == match.prefixlen) {
- 				SET_FLAG(dest->flags, BGP_NODE_USER_CLEAR);
--				bgp_process(bgp, dest, afi, safi);
-+				bgp_process(bgp, dest,
-+					    bgp_dest_get_bgp_path_info(dest),
-+					    afi, safi);
- 			}
- 			bgp_dest_unlock_node(dest);
- 		}
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index d553d3d27f..d94ec66c18 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -2142,7 +2142,7 @@ bool bgp_redistribute_metric_set(struct bgp *bgp, struct bgp_redist *red,
- 
- 				bgp_path_info_set_flag(dest, pi,
- 						       BGP_PATH_ATTR_CHANGED);
--				bgp_process(bgp, dest, afi, SAFI_UNICAST);
-+				bgp_process(bgp, dest, pi, afi, SAFI_UNICAST);
- 			}
- 		}
- 	}
-diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index b1711848e6..8a3115c8fb 100644
---- a/bgpd/bgpd.c
-+++ b/bgpd/bgpd.c
-@@ -1873,6 +1873,7 @@ void bgp_peer_conf_if_to_su_update(struct peer_connection *connection)
- void bgp_recalculate_afi_safi_bestpaths(struct bgp *bgp, afi_t afi, safi_t safi)
- {
- 	struct bgp_dest *dest, *ndest;
-+	struct bgp_path_info *pi, *next;
- 	struct bgp_table *table;
- 
- 	for (dest = bgp_table_top(bgp->rib[afi][safi]); dest;
-@@ -1887,10 +1888,17 @@ void bgp_recalculate_afi_safi_bestpaths(struct bgp *bgp, afi_t afi, safi_t safi)
- 		if (safi == SAFI_MPLS_VPN || safi == SAFI_ENCAP
- 		    || safi == SAFI_EVPN) {
- 			for (ndest = bgp_table_top(table); ndest;
--			     ndest = bgp_route_next(ndest))
--				bgp_process(bgp, ndest, afi, safi);
--		} else
--			bgp_process(bgp, dest, afi, safi);
-+			     ndest = bgp_route_next(ndest)) {
-+				for (pi = bgp_dest_get_bgp_path_info(ndest);
-+				     (pi != NULL) && (next = pi->next, 1);
-+				     pi = next)
-+					bgp_process(bgp, ndest, pi, afi, safi);
-+			}
-+		} else {
-+			for (pi = bgp_dest_get_bgp_path_info(dest);
-+			     (pi != NULL) && (next = pi->next, 1); pi = next)
-+				bgp_process(bgp, dest, pi, afi, safi);
-+		}
- 	}
- }
- 
-diff --git a/bgpd/rfapi/rfapi.c b/bgpd/rfapi/rfapi.c
-index 382af05c24..ae899daf82 100644
---- a/bgpd/rfapi/rfapi.c
-+++ b/bgpd/rfapi/rfapi.c
-@@ -463,7 +463,7 @@ void del_vnc_route(struct rfapi_descriptor *rfd,
- 
- 		bgp_aggregate_decrement(bgp, p, bpi, afi, safi);
- 		bgp_path_info_delete(bn, bpi);
--		bgp_process(bgp, bn, afi, safi);
-+		bgp_process(bgp, bn, bpi, afi, safi);
- 	} else {
- 		vnc_zlog_debug_verbose(
- 			"%s: Couldn't find route (safi=%d) at prefix %pFX",
-@@ -1001,7 +1001,7 @@ void add_vnc_route(struct rfapi_descriptor *rfd, /* cookie, VPN UN addr, peer */
- 
- 			/* Process change. */
- 			bgp_aggregate_increment(bgp, p, bpi, afi, safi);
--			bgp_process(bgp, bn, afi, safi);
-+			bgp_process(bgp, bn, bpi, afi, safi);
- 			bgp_dest_unlock_node(bn);
- 
- 			vnc_zlog_debug_any(
-@@ -1046,7 +1046,7 @@ void add_vnc_route(struct rfapi_descriptor *rfd, /* cookie, VPN UN addr, peer */
- 	}
- 
- 	bgp_dest_unlock_node(bn);
--	bgp_process(bgp, bn, afi, safi);
-+	bgp_process(bgp, bn, new, afi, safi);
- 
- 	vnc_zlog_debug_any(
- 		"%s: Added route (safi=%s) at prefix %s (bn=%p, prd=%pRDP)",
--- 
-2.43.2
-
-
-From 88c7297831d5c49b8f9208075ec2947bb4180765 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 11 Mar 2024 14:05:59 -0400
-Subject: [PATCH 09/11] bgpd: bgp_best_selection is inherently pi based
-
-Currently evpn code calls bgp_best_selection for local
-decisions for local tables to figure out what to do.
-This is also pi based so let's note that the pi has
-been changed before calling bgp_best_selection.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_evpn.c         | 14 ++++++++------
- bgpd/bgp_evpn_mh.c      | 13 ++++++++-----
- bgpd/bgp_evpn_private.h |  3 ++-
- 3 files changed, 18 insertions(+), 12 deletions(-)
-
-diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index 72dfd000f6..76b005fac0 100644
---- a/bgpd/bgp_evpn.c
-+++ b/bgpd/bgp_evpn.c
-@@ -1442,7 +1442,7 @@ void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn,
-  * Note: vpn is NULL for local EAD-ES routes.
-  */
- int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
--				     struct bgp_dest *dest)
-+			      struct bgp_dest *dest, struct bgp_path_info *pi)
- {
- 	struct bgp_path_info *old_select, *new_select;
- 	struct bgp_path_info_pair old_and_new;
-@@ -1450,6 +1450,8 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
- 	safi_t safi = SAFI_EVPN;
- 	int ret = 0;
- 
-+	SET_FLAG(pi->flags, BGP_PATH_UNSORTED);
-+
- 	/* Compute the best path. */
- 	bgp_best_selection(bgp, dest, &bgp->maxpaths[afi][safi], &old_and_new,
- 			   afi, safi);
-@@ -2258,7 +2260,7 @@ int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
-         * route would win, and we should evict the defunct local route
-         * and (re)install the remote route into zebra.
- 	*/
--	evpn_route_select_install(bgp, vpn, dest);
-+	evpn_route_select_install(bgp, vpn, dest, pi);
- 	/*
- 	 * If the new local route was not selected evict it and tell zebra
- 	 * to re-add the best remote dest. BGP doesn't retain non-best local
-@@ -2424,7 +2426,7 @@ int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
- 	if (pi) {
- 		dest = bgp_path_info_reap(dest, pi);
- 		assert(dest);
--		evpn_route_select_install(bgp, vpn, dest);
-+		evpn_route_select_install(bgp, vpn, dest, pi);
- 	}
- 
- 	/* dest should still exist due to locking make coverity happy */
-@@ -2539,7 +2541,7 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
- 	 * advertised to peers; otherwise, ensure it is evicted and
- 	 * (re)install the remote route into zebra.
- 	 */
--	evpn_route_select_install(bgp, vpn, dest);
-+	evpn_route_select_install(bgp, vpn, dest, pi);
- 
- 	if (CHECK_FLAG(pi->flags, BGP_PATH_REMOVED)) {
- 		route_change = 0;
-@@ -3252,7 +3254,7 @@ int install_evpn_route_entry_in_vni_common(
- 	bgp_evpn_remote_ip_hash_add(vpn, pi);
- 
- 	/* Perform route selection and update zebra, if required. */
--	ret = evpn_route_select_install(bgp, vpn, dest);
-+	ret = evpn_route_select_install(bgp, vpn, dest, pi);
- 
- 	/* if the best path is a local path with a non-zero ES
- 	 * sync info against the local path may need to be updated
-@@ -3294,7 +3296,7 @@ int uninstall_evpn_route_entry_in_vni_common(
- 	bgp_path_info_delete(dest, pi);
- 
- 	/* Perform route selection and update zebra, if required. */
--	ret = evpn_route_select_install(bgp, vpn, dest);
-+	ret = evpn_route_select_install(bgp, vpn, dest, pi);
- 
- 	/* if the best path is a local path with a non-zero ES
- 	 * sync info against the local path may need to be updated
-diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c
-index f5df47fbfb..d3def69198 100644
---- a/bgpd/bgp_evpn_mh.c
-+++ b/bgpd/bgp_evpn_mh.c
-@@ -91,7 +91,8 @@ static void bgp_evpn_path_nh_unlink(struct bgp_path_evpn_nh_info *nh_info);
-  */
- static int bgp_evpn_es_route_select_install(struct bgp *bgp,
- 					    struct bgp_evpn_es *es,
--					    struct bgp_dest *dest)
-+					    struct bgp_dest *dest,
-+					    struct bgp_path_info *pi)
- {
- 	int ret = 0;
- 	int zret = 0;
-@@ -101,6 +102,8 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
- 	struct bgp_path_info *new_select; /* new best */
- 	struct bgp_path_info_pair old_and_new;
- 
-+	SET_FLAG(pi->flags, BGP_PATH_UNSORTED);
-+
- 	/* Compute the best path. */
- 	bgp_best_selection(bgp, dest, &bgp->maxpaths[afi][safi], &old_and_new,
- 			   afi, safi);
-@@ -232,7 +235,7 @@ static int bgp_evpn_es_route_install(struct bgp *bgp,
- 	}
- 
- 	/* Perform route selection and update zebra, if required. */
--	ret = bgp_evpn_es_route_select_install(bgp, es, dest);
-+	ret = bgp_evpn_es_route_select_install(bgp, es, dest, pi);
- 
- 	bgp_dest_unlock_node(dest);
- 
-@@ -273,7 +276,7 @@ static int bgp_evpn_es_route_uninstall(struct bgp *bgp, struct bgp_evpn_es *es,
- 	bgp_path_info_delete(dest, pi);
- 
- 	/* Perform route selection and update zebra, if required. */
--	ret = bgp_evpn_es_route_select_install(bgp, es, dest);
-+	ret = bgp_evpn_es_route_select_install(bgp, es, dest, pi);
- 
- 	/* Unlock route node. */
- 	bgp_dest_unlock_node(dest);
-@@ -669,7 +672,7 @@ static int bgp_evpn_type4_route_update(struct bgp *bgp,
- 	 * this is just to set the flags correctly
- 	 * as local route in the ES always wins.
- 	 */
--	bgp_evpn_es_route_select_install(bgp, es, dest);
-+	bgp_evpn_es_route_select_install(bgp, es, dest, pi);
- 	bgp_dest_unlock_node(dest);
- 
- 	/* If this is a new route or some attribute has changed, export the
-@@ -1009,7 +1012,7 @@ static int bgp_evpn_type1_route_update(struct bgp *bgp, struct bgp_evpn_es *es,
- 	 * this is just to set the flags correctly as local route in
- 	 * the ES always wins.
- 	 */
--	evpn_route_select_install(bgp, vpn, dest);
-+	evpn_route_select_install(bgp, vpn, dest, pi);
- 	bgp_dest_unlock_node(dest);
- 
- 	/* If this is a new route or some attribute has changed, export the
-diff --git a/bgpd/bgp_evpn_private.h b/bgpd/bgp_evpn_private.h
-index 5af99afa34..07bba9b426 100644
---- a/bgpd/bgp_evpn_private.h
-+++ b/bgpd/bgp_evpn_private.h
-@@ -716,7 +716,8 @@ extern void delete_evpn_route_entry(struct bgp *bgp, afi_t afi, safi_t safi,
- 				    struct bgp_path_info **pi);
- int vni_list_cmp(void *p1, void *p2);
- extern int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
--				     struct bgp_dest *dest);
-+				     struct bgp_dest *dest,
-+				     struct bgp_path_info *pi);
- extern struct bgp_dest *
- bgp_evpn_global_node_get(struct bgp_table *table, afi_t afi, safi_t safi,
- 			 const struct prefix_evpn *evp, struct prefix_rd *prd,
--- 
-2.43.2
-
-
-From a12e265b609288d5a466103b84b26ef53cad8f9f Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 20 Mar 2024 10:13:00 -0400
-Subject: [PATCH 10/11] bgpd: Do not reap, schedule for deletion
-
-Do not reap instead let's schedule for deletion
-and let best_path_selection take care of the deletion
-as it should.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_evpn.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index 76b005fac0..3c89495ccc 100644
---- a/bgpd/bgp_evpn.c
-+++ b/bgpd/bgp_evpn.c
-@@ -2424,8 +2424,7 @@ int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
- 	 */
- 	delete_evpn_route_entry(bgp, afi, safi, dest, &pi);
- 	if (pi) {
--		dest = bgp_path_info_reap(dest, pi);
--		assert(dest);
-+		bgp_path_info_delete(dest, pi);
- 		evpn_route_select_install(bgp, vpn, dest, pi);
- 	}
- 
--- 
-2.43.2
-
-
-From c420b9efd6bcbe556cd9d801d02c5fcedd526b85 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Tue, 19 Mar 2024 12:26:14 -0400
-Subject: [PATCH 11/11] bgpd: Sort the bgp_path_info's
-
-Currently bgp_path_info's are stored in reverse order
-received.  Sort them by the best path ordering.
-
-This will allow for optimizations in the future on
-how multipath is done.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_evpn.c    |  20 ++-
- bgpd/bgp_mplsvpn.c |  19 ++-
- bgpd/bgp_route.c   | 368 +++++++++++++++++++++++++++++++++++++--------
- bgpd/bgp_route.h   |   2 +
- 4 files changed, 336 insertions(+), 73 deletions(-)
-
-diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index 3c89495ccc..cb51023a45 100644
---- a/bgpd/bgp_evpn.c
-+++ b/bgpd/bgp_evpn.c
-@@ -1444,13 +1444,26 @@ void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn,
- int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
- 			      struct bgp_dest *dest, struct bgp_path_info *pi)
- {
--	struct bgp_path_info *old_select, *new_select;
-+	struct bgp_path_info *old_select, *new_select, *first;
- 	struct bgp_path_info_pair old_and_new;
- 	afi_t afi = AFI_L2VPN;
- 	safi_t safi = SAFI_EVPN;
- 	int ret = 0;
- 
-+	first = bgp_dest_get_bgp_path_info(dest);
- 	SET_FLAG(pi->flags, BGP_PATH_UNSORTED);
-+	if (pi != first) {
-+		if (pi->next)
-+			pi->next->prev = pi->prev;
-+		if (pi->prev)
-+			pi->prev->next = pi->next;
-+
-+		if (first)
-+			first->prev = pi;
-+		pi->next = first;
-+		pi->prev = NULL;
-+		bgp_dest_set_bgp_path_info(dest, pi);
-+	}
- 
- 	/* Compute the best path. */
- 	bgp_best_selection(bgp, dest, &bgp->maxpaths[afi][safi], &old_and_new,
-@@ -6482,9 +6495,10 @@ void bgp_filter_evpn_routes_upon_martian_change(
- 
- 		for (dest = bgp_table_top(table); dest;
- 		     dest = bgp_route_next(dest)) {
-+			struct bgp_path_info *next;
- 
--			for (pi = bgp_dest_get_bgp_path_info(dest); pi;
--			     pi = pi->next) {
-+			for (pi = bgp_dest_get_bgp_path_info(dest);
-+			     (pi != NULL) && (next = pi->next, 1); pi = next) {
- 				bool affected = false;
- 				const struct prefix *p;
- 
-diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
-index a48ef875c4..b9846d7e63 100644
---- a/bgpd/bgp_mplsvpn.c
-+++ b/bgpd/bgp_mplsvpn.c
-@@ -2022,7 +2022,7 @@ void vpn_leak_from_vrf_withdraw_all(struct bgp *to_bgp, struct bgp *from_bgp,
- 
- 		struct bgp_table *table;
- 		struct bgp_dest *bn;
--		struct bgp_path_info *bpi;
-+		struct bgp_path_info *bpi, *next;
- 
- 		/* This is the per-RD table of prefixes */
- 		table = bgp_dest_get_bgp_table_info(pdest);
-@@ -2037,7 +2037,8 @@ void vpn_leak_from_vrf_withdraw_all(struct bgp *to_bgp, struct bgp *from_bgp,
- 					   __func__, bn);
- 			}
- 
--			for (; bpi; bpi = bpi->next) {
-+			for (; (bpi != NULL) && (next = bpi->next, 1);
-+			     bpi = next) {
- 				if (debug)
- 					zlog_debug("%s: type %d, sub_type %d",
- 						   __func__, bpi->type,
-@@ -2552,7 +2553,7 @@ void vpn_leak_to_vrf_withdraw(struct bgp_path_info *path_vpn)
- void vpn_leak_to_vrf_withdraw_all(struct bgp *to_bgp, afi_t afi)
- {
- 	struct bgp_dest *bn;
--	struct bgp_path_info *bpi;
-+	struct bgp_path_info *bpi, *next;
- 	safi_t safi = SAFI_UNICAST;
- 	int debug = BGP_DEBUG(vpn, VPN_LEAK_TO_VRF);
- 
-@@ -2563,9 +2564,8 @@ void vpn_leak_to_vrf_withdraw_all(struct bgp *to_bgp, afi_t afi)
- 	 */
- 	for (bn = bgp_table_top(to_bgp->rib[afi][safi]); bn;
- 	     bn = bgp_route_next(bn)) {
--
--		for (bpi = bgp_dest_get_bgp_path_info(bn); bpi;
--		     bpi = bpi->next) {
-+		for (bpi = bgp_dest_get_bgp_path_info(bn);
-+		     (bpi != NULL) && (next = bpi->next, 1); bpi = next) {
- 			if (bpi->extra && bpi->extra->vrfleak &&
- 			    bpi->extra->vrfleak->bgp_orig != to_bgp &&
- 			    bpi->extra->vrfleak->parent &&
-@@ -2604,8 +2604,11 @@ void vpn_leak_no_retain(struct bgp *to_bgp, struct bgp *vpn_from, afi_t afi)
- 			continue;
- 
- 		for (bn = bgp_table_top(table); bn; bn = bgp_route_next(bn)) {
--			for (bpi = bgp_dest_get_bgp_path_info(bn); bpi;
--			     bpi = bpi->next) {
-+			struct bgp_path_info *next;
-+
-+			for (bpi = bgp_dest_get_bgp_path_info(bn);
-+			     (bpi != NULL) && (next = bpi->next, 1);
-+			     bpi = next) {
- 				if (bpi->extra && bpi->extra->vrfleak &&
- 				    bpi->extra->vrfleak->bgp_orig == to_bgp)
- 					continue;
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index e3350df7b0..c33b14675a 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -482,6 +482,7 @@ void bgp_path_info_add_with_caller(const char *name, struct bgp_dest *dest,
- 		top->prev = pi;
- 	bgp_dest_set_bgp_path_info(dest, pi);
- 
-+	SET_FLAG(pi->flags, BGP_PATH_UNSORTED);
- 	bgp_path_info_lock(pi);
- 	bgp_dest_lock_node(dest);
- 	peer_lock(pi->peer); /* bgp_path_info peer reference */
-@@ -502,8 +503,26 @@ struct bgp_dest *bgp_path_info_reap(struct bgp_dest *dest,
- 		bgp_dest_set_bgp_path_info(dest, pi->next);
- 
- 	bgp_path_info_mpath_dequeue(pi);
-+
-+	pi->next = NULL;
-+	pi->prev = NULL;
-+
-+	hook_call(bgp_snmp_update_stats, dest, pi, false);
-+
- 	bgp_path_info_unlock(pi);
-+	return bgp_dest_unlock_node(dest);
-+}
-+
-+static struct bgp_dest *bgp_path_info_reap_unsorted(struct bgp_dest *dest,
-+						    struct bgp_path_info *pi)
-+{
-+	bgp_path_info_mpath_dequeue(pi);
-+
-+	pi->next = NULL;
-+	pi->prev = NULL;
-+
- 	hook_call(bgp_snmp_update_stats, dest, pi, false);
-+	bgp_path_info_unlock(pi);
- 
- 	return bgp_dest_unlock_node(dest);
- }
-@@ -2786,17 +2805,18 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest,
- 			struct bgp_path_info_pair *result, afi_t afi,
- 			safi_t safi)
- {
--	struct bgp_path_info *new_select;
--	struct bgp_path_info *old_select;
-+	struct bgp_path_info *new_select, *look_thru;
-+	struct bgp_path_info *old_select, *worse, *first;
- 	struct bgp_path_info *pi;
- 	struct bgp_path_info *pi1;
- 	struct bgp_path_info *pi2;
--	struct bgp_path_info *nextpi = NULL;
- 	int paths_eq, do_mpath;
--	bool debug;
-+	bool debug, any_comparisons;
- 	struct list mp_list;
- 	char pfx_buf[PREFIX2STR_BUFFER] = {};
- 	char path_buf[PATH_ADDPATH_STR_BUFFER];
-+	enum bgp_path_selection_reason reason = bgp_path_selection_none;
-+	bool unsorted_items = true;
- 
- 	bgp_mp_list_init(&mp_list);
- 	do_mpath =
-@@ -2807,16 +2827,16 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest,
- 	if (debug)
- 		prefix2str(bgp_dest_get_prefix(dest), pfx_buf, sizeof(pfx_buf));
- 
--	dest->reason = bgp_path_selection_none;
- 	/* bgp deterministic-med */
- 	new_select = NULL;
- 	if (CHECK_FLAG(bgp->flags, BGP_FLAG_DETERMINISTIC_MED)) {
--
- 		/* Clear BGP_PATH_DMED_SELECTED for all paths */
- 		for (pi1 = bgp_dest_get_bgp_path_info(dest); pi1;
--		     pi1 = pi1->next)
-+		     pi1 = pi1->next) {
- 			bgp_path_info_unset_flag(dest, pi1,
- 						 BGP_PATH_DMED_SELECTED);
-+			UNSET_FLAG(pi1->flags, BGP_PATH_DMED_CHECK);
-+		}
- 
- 		for (pi1 = bgp_dest_get_bgp_path_info(dest); pi1;
- 		     pi1 = pi1->next) {
-@@ -2885,70 +2905,273 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest,
- 		}
- 	}
- 
--	/* Check old selected route and new selected route. */
-+	/*
-+	 * Let's grab the unsorted items from the list
-+	 */
-+	struct bgp_path_info *unsorted_list = NULL;
-+	struct bgp_path_info *unsorted_list_spot = NULL;
-+	struct bgp_path_info *unsorted_holddown = NULL;
-+
- 	old_select = NULL;
--	new_select = NULL;
--	for (pi = bgp_dest_get_bgp_path_info(dest);
--	     (pi != NULL) && (nextpi = pi->next, 1); pi = nextpi) {
--		enum bgp_path_selection_reason reason;
-+	pi = bgp_dest_get_bgp_path_info(dest);
-+	while (pi && CHECK_FLAG(pi->flags, BGP_PATH_UNSORTED)) {
-+		struct bgp_path_info *next = pi->next;
- 
--		UNSET_FLAG(pi->flags, BGP_PATH_UNSORTED);
- 		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
- 			old_select = pi;
- 
--		if (BGP_PATH_HOLDDOWN(pi)) {
--			/* reap REMOVED routes, if needs be
-+		/*
-+		 * Pull off pi off the list
-+		 */
-+		if (pi->next)
-+			pi->next->prev = NULL;
-+
-+		bgp_dest_set_bgp_path_info(dest, pi->next);
-+		pi->next = NULL;
-+		pi->prev = NULL;
-+
-+		/*
-+		 * Place it on the unsorted list
-+		 */
-+		if (unsorted_list_spot) {
-+			unsorted_list_spot->next = pi;
-+			pi->prev = unsorted_list_spot;
-+			pi->next = NULL;
-+		} else {
-+			unsorted_list = pi;
-+
-+			pi->next = NULL;
-+			pi->prev = NULL;
-+		}
-+
-+		unsorted_list_spot = pi;
-+		pi = next;
-+	}
-+
-+	if (!old_select) {
-+		old_select = bgp_dest_get_bgp_path_info(dest);
-+		if (old_select &&
-+		    !CHECK_FLAG(old_select->flags, BGP_PATH_SELECTED))
-+			old_select = NULL;
-+	}
-+
-+	if (!unsorted_list)
-+		unsorted_items = true;
-+	else
-+		unsorted_items = false;
-+
-+	any_comparisons = false;
-+	worse = NULL;
-+	while (unsorted_list) {
-+		first = unsorted_list;
-+		unsorted_list = unsorted_list->next;
-+
-+		if (unsorted_list)
-+			unsorted_list->prev = NULL;
-+		first->next = NULL;
-+		first->prev = NULL;
-+
-+		/*
-+		 * It's not likely that the just received unsorted entry
-+		 * is in holddown and scheduled for removal but we should
-+		 * check
-+		 */
-+		if (BGP_PATH_HOLDDOWN(first)) {
-+			/*
-+			 * reap REMOVED routes, if needs be
- 			 * selected route must stay for a while longer though
- 			 */
- 			if (debug)
--				zlog_debug(
--					"%s: %pBD(%s) pi from %s in holddown",
--					__func__, dest, bgp->name_pretty,
--					pi->peer->host);
-+				zlog_debug("%s: %pBD(%s) pi %p from %s in holddown",
-+					   __func__, dest, bgp->name_pretty,
-+					   first, first->peer->host);
- 
--			if (CHECK_FLAG(pi->flags, BGP_PATH_REMOVED) &&
--			    (pi != old_select)) {
--				dest = bgp_path_info_reap(dest, pi);
-+			if (old_select != first &&
-+			    CHECK_FLAG(first->flags, BGP_PATH_REMOVED)) {
-+				dest = bgp_path_info_reap_unsorted(dest, first);
- 				assert(dest);
--			}
-+			} else {
-+				/*
-+				 * We are in hold down, so we cannot sort this
-+				 * item yet.  Let's wait, so hold the unsorted
-+				 * to the side
-+				 */
-+				if (unsorted_holddown) {
-+					first->next = unsorted_holddown;
-+					unsorted_holddown->prev = first;
-+					unsorted_holddown = first;
-+				} else
-+					unsorted_holddown = first;
- 
-+				UNSET_FLAG(first->flags, BGP_PATH_UNSORTED);
-+			}
- 			continue;
- 		}
- 
--		if (pi->peer && pi->peer != bgp->peer_self
--		    && !CHECK_FLAG(pi->peer->sflags, PEER_STATUS_NSF_WAIT))
--			if (!peer_established(pi->peer->connection)) {
-+		bgp_path_info_unset_flag(dest, first, BGP_PATH_DMED_CHECK);
-+
-+		worse = NULL;
-+
-+		struct bgp_path_info *look_thru_next;
-+
-+		for (look_thru = bgp_dest_get_bgp_path_info(dest); look_thru;
-+		     look_thru = look_thru_next) {
-+			/* look thru can be reaped save the next pointer */
-+			look_thru_next = look_thru->next;
-+
-+			/*
-+			 * Now we have the first unsorted and the best selected
-+			 * Let's do best path comparison
-+			 */
-+			if (BGP_PATH_HOLDDOWN(look_thru)) {
-+				/* reap REMOVED routes, if needs be
-+				 * selected route must stay for a while longer though
-+				 */
- 				if (debug)
--					zlog_debug(
--						"%s: %pBD(%s) non self peer %s not estab state",
--						__func__, dest,
--						bgp->name_pretty,
--						pi->peer->host);
-+					zlog_debug("%s: %pBD(%s) pi from %s %p in holddown",
-+						   __func__, dest,
-+						   bgp->name_pretty,
-+						   look_thru->peer->host,
-+						   look_thru);
-+
-+				if (CHECK_FLAG(look_thru->flags,
-+					       BGP_PATH_REMOVED) &&
-+				    (look_thru != old_select)) {
-+					dest = bgp_path_info_reap(dest,
-+								  look_thru);
-+					assert(dest);
-+				}
- 
- 				continue;
- 			}
- 
--		if (CHECK_FLAG(bgp->flags, BGP_FLAG_DETERMINISTIC_MED)
--		    && (!CHECK_FLAG(pi->flags, BGP_PATH_DMED_SELECTED))) {
--			bgp_path_info_unset_flag(dest, pi, BGP_PATH_DMED_CHECK);
--			if (debug)
--				zlog_debug("%s: %pBD(%s) pi %s dmed", __func__,
--					   dest, bgp->name_pretty,
--					   pi->peer->host);
--			continue;
-+			if (look_thru->peer &&
-+			    look_thru->peer != bgp->peer_self &&
-+			    !CHECK_FLAG(look_thru->peer->sflags,
-+					PEER_STATUS_NSF_WAIT))
-+				if (!peer_established(
-+					    look_thru->peer->connection)) {
-+					if (debug)
-+						zlog_debug("%s: %pBD(%s) non self peer %s not estab state",
-+							   __func__, dest,
-+							   bgp->name_pretty,
-+							   look_thru->peer->host);
-+
-+					continue;
-+				}
-+
-+			bgp_path_info_unset_flag(dest, look_thru,
-+						 BGP_PATH_DMED_CHECK);
-+			if (CHECK_FLAG(bgp->flags, BGP_FLAG_DETERMINISTIC_MED) &&
-+			    (!CHECK_FLAG(look_thru->flags,
-+					 BGP_PATH_DMED_SELECTED))) {
-+				bgp_path_info_unset_flag(dest, look_thru,
-+							 BGP_PATH_DMED_CHECK);
-+				if (debug)
-+					zlog_debug("%s: %pBD(%s) pi %s dmed",
-+						   __func__, dest,
-+						   bgp->name_pretty,
-+						   look_thru->peer->host);
-+
-+				worse = look_thru;
-+				continue;
-+			}
-+
-+			reason = dest->reason;
-+			any_comparisons = true;
-+			if (bgp_path_info_cmp(bgp, first, look_thru, &paths_eq,
-+					      mpath_cfg, debug, pfx_buf, afi,
-+					      safi, &reason)) {
-+				first->reason = reason;
-+				worse = look_thru;
-+				/*
-+				 * We can stop looking
-+				 */
-+				break;
-+			}
-+
-+			look_thru->reason = reason;
- 		}
- 
--		bgp_path_info_unset_flag(dest, pi, BGP_PATH_DMED_CHECK);
-+		if (!any_comparisons)
-+			first->reason = bgp_path_selection_first;
-+
-+		/*
-+		 * At this point worse if NON-NULL is where the first
-+		 * pointer should be before.  if worse is NULL then
-+		 * first is bestpath too.  Let's remove first from the
-+		 * list and place it in the right spot
-+		 */
-+
-+		if (!worse) {
-+			struct bgp_path_info *end =
-+				bgp_dest_get_bgp_path_info(dest);
-+
-+			for (; end && end->next != NULL; end = end->next)
-+				;
-+
-+			if (end)
-+				end->next = first;
-+			else
-+				bgp_dest_set_bgp_path_info(dest, first);
-+			first->prev = end;
-+			first->next = NULL;
-+
-+			dest->reason = first->reason;
-+		} else {
-+			if (worse->prev)
-+				worse->prev->next = first;
-+			first->next = worse;
-+			if (worse) {
-+				first->prev = worse->prev;
-+				worse->prev = first;
-+			} else
-+				first->prev = NULL;
- 
--		reason = dest->reason;
--		if (bgp_path_info_cmp(bgp, pi, new_select, &paths_eq, mpath_cfg,
--				      debug, pfx_buf, afi, safi,
--				      &dest->reason)) {
--			if (new_select == NULL &&
--			    reason != bgp_path_selection_none)
--				dest->reason = reason;
--			new_select = pi;
-+			if (dest->info == worse) {
-+				bgp_dest_set_bgp_path_info(dest, first);
-+				dest->reason = first->reason;
-+			}
- 		}
-+		UNSET_FLAG(first->flags, BGP_PATH_UNSORTED);
-+	}
-+
-+	if (!unsorted_items) {
-+		new_select = bgp_dest_get_bgp_path_info(dest);
-+		while (new_select && BGP_PATH_HOLDDOWN(new_select))
-+			new_select = new_select->next;
-+
-+		if (new_select) {
-+			if (new_select->reason == bgp_path_selection_none)
-+				new_select->reason = bgp_path_selection_first;
-+			else if (new_select == bgp_dest_get_bgp_path_info(dest) &&
-+				 new_select->next == NULL)
-+				new_select->reason = bgp_path_selection_first;
-+			dest->reason = new_select->reason;
-+		} else
-+			dest->reason = bgp_path_selection_none;
-+	} else
-+		new_select = old_select;
-+
-+
-+	/*
-+	 * Reinsert all the unsorted_holddown items for future processing
-+	 * at the end of the list.
-+	 */
-+	if (unsorted_holddown) {
-+		struct bgp_path_info *top = bgp_dest_get_bgp_path_info(dest);
-+		struct bgp_path_info *prev = NULL;
-+
-+		while (top != NULL) {
-+			prev = top;
-+			top = top->next;
-+		}
-+
-+		if (prev) {
-+			prev->next = unsorted_holddown;
-+			unsorted_holddown->prev = prev;
-+		} else
-+			bgp_dest_set_bgp_path_info(dest, unsorted_holddown);
- 	}
- 
- 	/* Now that we know which path is the bestpath see if any of the other
-@@ -2968,9 +3191,7 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest,
- 	}
- 
- 	if (do_mpath && new_select) {
--		for (pi = bgp_dest_get_bgp_path_info(dest);
--		     (pi != NULL) && (nextpi = pi->next, 1); pi = nextpi) {
--
-+		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
- 			if (debug)
- 				bgp_path_info_path_with_addpath_rx_str(
- 					pi, path_buf, sizeof(path_buf));
-@@ -3527,7 +3748,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 		bgp_path_info_unset_flag(dest, old_select, BGP_PATH_SELECTED);
- 	if (new_select) {
- 		if (debug)
--			zlog_debug("%s: setting SELECTED flag", __func__);
-+			zlog_debug("%s: %pBD setting SELECTED flag", __func__,
-+				   dest);
- 		bgp_path_info_set_flag(dest, new_select, BGP_PATH_SELECTED);
- 		bgp_path_info_unset_flag(dest, new_select,
- 					 BGP_PATH_ATTR_CHANGED);
-@@ -3762,9 +3984,25 @@ void bgp_process(struct bgp *bgp, struct bgp_dest *dest,
- 	 * situation, even if the node is already
- 	 * scheduled.
- 	 */
--	if (pi)
-+	if (pi) {
-+		struct bgp_path_info *first = bgp_dest_get_bgp_path_info(dest);
-+
- 		SET_FLAG(pi->flags, BGP_PATH_UNSORTED);
- 
-+		if (pi != first) {
-+			if (pi->next)
-+				pi->next->prev = pi->prev;
-+			if (pi->prev)
-+				pi->prev->next = pi->next;
-+
-+			if (first)
-+				first->prev = pi;
-+			pi->next = first;
-+			pi->prev = NULL;
-+			bgp_dest_set_bgp_path_info(dest, pi);
-+		}
-+	}
-+
- 	/* already scheduled for processing? */
- 	if (CHECK_FLAG(dest->flags, BGP_NODE_PROCESS_SCHEDULED))
- 		return;
-@@ -5647,7 +5885,7 @@ static wq_item_status bgp_clear_route_node(struct work_queue *wq, void *data)
- 	struct bgp_clear_node_queue *cnq = data;
- 	struct bgp_dest *dest = cnq->dest;
- 	struct peer *peer = wq->spec.data;
--	struct bgp_path_info *pi;
-+	struct bgp_path_info *pi, *next;
- 	struct bgp *bgp;
- 	afi_t afi = bgp_dest_table(dest)->afi;
- 	safi_t safi = bgp_dest_table(dest)->safi;
-@@ -5658,7 +5896,8 @@ static wq_item_status bgp_clear_route_node(struct work_queue *wq, void *data)
- 	/* It is possible that we have multiple paths for a prefix from a peer
- 	 * if that peer is using AddPath.
- 	 */
--	for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
-+	for (pi = bgp_dest_get_bgp_path_info(dest);
-+	     (pi != NULL) && (next = pi->next, 1); pi = next) {
- 		if (pi->peer != peer)
- 			continue;
- 
-@@ -5920,7 +6159,7 @@ void bgp_clear_adj_in(struct peer *peer, afi_t afi, safi_t safi)
- void bgp_clear_stale_route(struct peer *peer, afi_t afi, safi_t safi)
- {
- 	struct bgp_dest *dest;
--	struct bgp_path_info *pi;
-+	struct bgp_path_info *pi, *next;
- 	struct bgp_table *table;
- 
- 	if (safi == SAFI_MPLS_VPN || safi == SAFI_ENCAP || safi == SAFI_EVPN) {
-@@ -5935,8 +6174,9 @@ void bgp_clear_stale_route(struct peer *peer, afi_t afi, safi_t safi)
- 
- 			for (rm = bgp_table_top(table); rm;
- 			     rm = bgp_route_next(rm))
--				for (pi = bgp_dest_get_bgp_path_info(rm); pi;
--				     pi = pi->next) {
-+				for (pi = bgp_dest_get_bgp_path_info(rm);
-+				     (pi != NULL) && (next = pi->next, 1);
-+				     pi = next) {
- 					if (pi->peer != peer)
- 						continue;
- 					if (CHECK_FLAG(
-@@ -5969,8 +6209,8 @@ void bgp_clear_stale_route(struct peer *peer, afi_t afi, safi_t safi)
- 	} else {
- 		for (dest = bgp_table_top(peer->bgp->rib[afi][safi]); dest;
- 		     dest = bgp_route_next(dest))
--			for (pi = bgp_dest_get_bgp_path_info(dest); pi;
--			     pi = pi->next) {
-+			for (pi = bgp_dest_get_bgp_path_info(dest);
-+			     (pi != NULL) && (next = pi->next, 1); pi = next) {
- 				if (pi->peer != peer)
- 					continue;
- 				if (CHECK_FLAG(peer->af_sflags[afi][safi],
-@@ -6680,6 +6920,7 @@ void bgp_static_withdraw(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 
- 	/* Withdraw static BGP route from routing table. */
- 	if (pi) {
-+		SET_FLAG(pi->flags, BGP_PATH_UNSORTED);
- #ifdef ENABLE_BGP_VNC
- 		if (safi == SAFI_MPLS_VPN || safi == SAFI_ENCAP)
- 			rfapiProcessWithdraw(pi->peer, NULL, p, prd, pi->attr,
-@@ -7466,8 +7707,10 @@ static void bgp_aggregate_install(
- 		/*
- 		 * Mark the old as unusable
- 		 */
--		if (pi)
-+		if (pi) {
- 			bgp_path_info_delete(dest, pi);
-+			bgp_process(bgp, dest, pi, afi, safi);
-+		}
- 
- 		attr = bgp_attr_aggregate_intern(
- 			bgp, origin, aspath, community, ecommunity, lcommunity,
-@@ -7914,7 +8157,8 @@ void bgp_aggregate_delete(struct bgp *bgp, const struct prefix *p, afi_t afi,
- 					bgp_process(bgp, dest, pi, afi, safi);
- 			}
- 
--			aggregate->count--;
-+			if (aggregate->count > 0)
-+				aggregate->count--;
- 
- 			if (pi->attr->origin == BGP_ORIGIN_INCOMPLETE)
- 				aggregate->incomplete_origin_count--;
-diff --git a/bgpd/bgp_route.h b/bgpd/bgp_route.h
-index 1e5c31afab..e6f7b9da36 100644
---- a/bgpd/bgp_route.h
-+++ b/bgpd/bgp_route.h
-@@ -346,6 +346,8 @@ struct bgp_path_info {
- 
- 	unsigned short instance;
- 
-+	enum bgp_path_selection_reason reason;
-+
- 	/* Addpath identifiers */
- 	uint32_t addpath_rx_id;
- 	struct bgp_addpath_info_data tx_addpath;
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0075-bgp-mp-info-changes.patch b/src/sonic-frr/patch/0075-bgp-mp-info-changes.patch
deleted file mode 100644
index de994256cb2..00000000000
--- a/src/sonic-frr/patch/0075-bgp-mp-info-changes.patch
+++ /dev/null
@@ -1,1542 +0,0 @@
-From fb21d89e46751e56822e5bfbd44367641ccec687 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 26 Sep 2024 10:40:30 -0400
-Subject: [PATCH 1/5] bgpd: Use CHECK_FLAG to remain consistent for mp_flags
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_mpath.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/bgpd/bgp_mpath.c b/bgpd/bgp_mpath.c
-index c773c21fb7..cf1326e07e 100644
---- a/bgpd/bgp_mpath.c
-+++ b/bgpd/bgp_mpath.c
-@@ -468,10 +468,10 @@ bool bgp_path_info_mpath_chkwtd(struct bgp *bgp, struct bgp_path_info *path)
- 	 */
- 	if (bgp->lb_handling != BGP_LINK_BW_SKIP_MISSING &&
- 	    bgp->lb_handling != BGP_LINK_BW_DEFWT_4_MISSING)
--		return (path->mpath->mp_flags & BGP_MP_LB_ALL);
-+		return CHECK_FLAG(path->mpath->mp_flags, BGP_MP_LB_ALL);
- 
- 	/* At least one path should have bandwidth. */
--	return (path->mpath->mp_flags & BGP_MP_LB_PRESENT);
-+	return CHECK_FLAG(path->mpath->mp_flags, BGP_MP_LB_PRESENT);
- }
- 
- /*
--- 
-2.43.2
-
-
-From 179fba970178e9199e95ef364ca50eaac287b958 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 26 Sep 2024 10:46:23 -0400
-Subject: [PATCH 2/5] bgpd: Ensure mpath data is only on bestpath
-
-The mpath data structure has data that is only relevant
-for the first mpath in the list.  It is not being used
-anywhere else.  Let's document that a bit more.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_mpath.c | 4 ++++
- bgpd/bgp_mpath.h | 9 ++++++---
- 2 files changed, 10 insertions(+), 3 deletions(-)
-
-diff --git a/bgpd/bgp_mpath.c b/bgpd/bgp_mpath.c
-index cf1326e07e..635bb5236d 100644
---- a/bgpd/bgp_mpath.c
-+++ b/bgpd/bgp_mpath.c
-@@ -407,6 +407,10 @@ static void bgp_path_info_mpath_count_set(struct bgp_path_info *path,
-  * bgp_path_info_mpath_lb_update
-  *
-  * Update cumulative info related to link-bandwidth
-+ *
-+ * This is only set on the first mpath of the list
-+ * as such we should UNSET the flags when removing
-+ * to ensure nothing accidently happens
-  */
- static void bgp_path_info_mpath_lb_update(struct bgp_path_info *path, bool set,
- 					  bool all_paths_lb, uint64_t cum_bw)
-diff --git a/bgpd/bgp_mpath.h b/bgpd/bgp_mpath.h
-index 129682d1dc..267d729e06 100644
---- a/bgpd/bgp_mpath.h
-+++ b/bgpd/bgp_mpath.h
-@@ -25,15 +25,18 @@ struct bgp_path_info_mpath {
- 	/* When attached to best path, the number of selected multipaths */
- 	uint16_t mp_count;
- 
--	/* Flags - relevant as noted. */
-+	/* Flags - relevant as noted, attached to bestpath. */
- 	uint16_t mp_flags;
- #define BGP_MP_LB_PRESENT 0x1 /* Link-bandwidth present for >= 1 path */
- #define BGP_MP_LB_ALL 0x2 /* Link-bandwidth present for all multipaths */
- 
--	/* Aggregated attribute for advertising multipath route */
-+	/*
-+	 * Aggregated attribute for advertising multipath route,
-+	 * attached to bestpath
-+	 */
- 	struct attr *mp_attr;
- 
--	/* Cumulative bandiwdth of all multipaths - attached to best path. */
-+	/* Cumulative bandiwdth of all multipaths - attached to bestpath. */
- 	uint64_t cum_bw;
- };
- 
--- 
-2.43.2
-
-
-From 5c40a38e780d00cf5c3dc4752146ae9767192423 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 30 Sep 2024 14:57:45 -0400
-Subject: [PATCH 3/5] tests: Clean up some logging in
- test_bgp_default_originate_2links.py
-
-Test was confusing.  Add some useful data and clean up some debugs
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- .../test_bgp_default_originate_2links.py              | 11 ++++++-----
- 1 file changed, 6 insertions(+), 5 deletions(-)
-
-diff --git a/tests/topotests/bgp_default_originate/test_bgp_default_originate_2links.py b/tests/topotests/bgp_default_originate/test_bgp_default_originate_2links.py
-index 75e66566b7..58984221f9 100644
---- a/tests/topotests/bgp_default_originate/test_bgp_default_originate_2links.py
-+++ b/tests/topotests/bgp_default_originate/test_bgp_default_originate_2links.py
-@@ -269,21 +269,21 @@ def verify_the_uptime(time_stamp_before, time_stamp_after, incremented=None):
-     if incremented == True:
-         if uptime_before < uptime_after:
-             logger.info(
--                "  The Uptime [{}] is incremented than [{}].......PASSED ".format(
-+                "  The Uptime before [{}] is less than [{}].......PASSED ".format(
-                     time_stamp_before, time_stamp_after
-                 )
-             )
-             return True
-         else:
-             logger.error(
--                "  The Uptime [{}] is expected to be incremented than [{}].......FAILED ".format(
-+                "  The Uptime before [{}] is greater than the uptime after [{}].......FAILED ".format(
-                     time_stamp_before, time_stamp_after
-                 )
-             )
-             return False
-     else:
-         logger.info(
--            "  The Uptime [{}] is not incremented than [{}] ".format(
-+            "  The Uptime before [{}] the same as after [{}] ".format(
-                 time_stamp_before, time_stamp_after
-             )
-         )
-@@ -1031,7 +1031,7 @@ def test_verify_bgp_default_originate_with_default_static_route_p1(request):
-     result = verify_the_uptime(uptime_before_ipv6, uptime_after_ipv6, incremented=False)
-     assert result is True, "Testcase {} : Failed Error: {}".format(tc_name, result)
- 
--    step("Taking uptime snapshot before  removing   redisctribute static ")
-+    step("Taking uptime snapshot before removing redistribute static")
-     uptime_before_ipv4 = get_rib_route_uptime(tgen, "ipv4", "r2", ipv4_uptime_dict)
-     uptime_before_ipv6 = get_rib_route_uptime(tgen, "ipv6", "r2", ipv6_uptime_dict)
-     sleep(1)
-@@ -1078,6 +1078,7 @@ def test_verify_bgp_default_originate_with_default_static_route_p1(request):
-     )
-     assert result is True, "Testcase {} : Failed Error: {}".format(tc_name, result)
- 
-+    step("Now look that the route is not pointed at link2")
-     result = verify_rib_default_route(
-         tgen,
-         topo,
-@@ -1097,7 +1098,7 @@ def test_verify_bgp_default_originate_with_default_static_route_p1(request):
-     )
-     assert result is not True, "Testcase {} : Failed Error: {}".format(tc_name, result)
- 
--    step("Taking uptime snapshot before  removing   redisctribute static ")
-+    step("Taking uptime snapshot after removing redistribute static")
-     uptime_after_ipv4 = get_rib_route_uptime(tgen, "ipv4", "r2", ipv4_uptime_dict)
-     uptime_after_ipv6 = get_rib_route_uptime(tgen, "ipv6", "r2", ipv6_uptime_dict)
- 
--- 
-2.43.2
-
-
-From 7908175a589b41be062295d9e369a9a4168426ee Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 30 Sep 2024 15:09:42 -0400
-Subject: [PATCH 4/5] bgpd: Cleanup multipath figuring out in bgp
-
-Currently bgp multipath has these properties:
-
-a) mp_info may or may not be on a single path, based
-upon path perturbations in the past.
-b) mp_info->count started counting at 0( meaning 1 ).  As that the
-bestpath path_info was never included in the count
-c) The first mp_info in the list held the multipath data associated
-with the multipath.  As such if you were at any other node that data
-was not filled in.
-d) As such the mp_info's that are not first on the list basically
-were just pointers to the corresponding bgp_path_info that was in
-the multipath.
-e) On bestpath calculation, a linklist(struct linklist *) of bgp_path_info's was
-created.
-f) This linklist was passed in to a comparison function that took the
-old mpinfo list and compared it item by item to the linklist and
-doing magic to figure out how to create a new mp_info list.
-g) the old mp_info and the link list had to be memory managed and
-freed up.
-h) BGP_PATH_MULTIPATH is only set on non bestpath nodes in the
-multipath.
-
-This is really complicated.  Let's change the algorithm to this:
-
-a) When running bestpath, mark a bgp_path_info node that could be in the ecmp path as
-BGP_PATH_MULTIPATH_NEW.
-b) When running multipath, just walk the list of bgp_path_info's and if
-it has BGP_PATH_MULTIPATH_NEW on it, decide if it is in BGP_MULTIPATH.
-If we run out of space to put in the ecmp, clear the flag on the rest.
-c) Clean up the counting of sometimes adding 1 to the mpath count.
-d) Only allocate a mpath_info node for the bestpath.  Clean it up
-when done with it.
-e) remove the unneeded list management associated with the linklist and
-the mp_list.
-
-This greatly simplifies multipath computation for bgp and reduces memory
-load for large scale deployments.
-
-2 full feeds in work_queue_run prior:
-
-    0      56367.471      1123    50193    493695    50362    493791         0         0          0    TE   work_queue_run
-
-BGP multipath info            :  1941844     48   110780992  1941844 110780992
-
-2 full feeds in work_queue_run after change:
-
-    1      52924.931      1296    40837    465968    41025    487390         0         0          1    TE   work_queue_run
-
-BGP multipath info            :   970860     32    38836880   970866  38837120
-
-Aproximately 4 seconds of saved cpu time for convergence and ~75 mb
-smaller run time.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_mpath.c         | 390 +++++++++----------------------
- bgpd/bgp_mpath.h         |  18 +-
- bgpd/bgp_route.c         |  21 +-
- bgpd/bgp_route.h         |  14 ++
- bgpd/bgp_routemap.c      |   2 +-
- tests/bgpd/subdir.am     |  11 -
- tests/bgpd/test_mpath.c  | 482 ---------------------------------------
- tests/bgpd/test_mpath.py |  10 -
- 8 files changed, 135 insertions(+), 813 deletions(-)
- delete mode 100644 tests/bgpd/test_mpath.c
- delete mode 100644 tests/bgpd/test_mpath.py
-
-diff --git a/bgpd/bgp_mpath.c b/bgpd/bgp_mpath.c
-index 635bb5236d..27c179380d 100644
---- a/bgpd/bgp_mpath.c
-+++ b/bgpd/bgp_mpath.c
-@@ -2,8 +2,10 @@
- /*
-  * BGP Multipath
-  * Copyright (C) 2010 Google Inc.
-+ *               2024 Nvidia Corporation
-+ *                    Donald Sharp
-  *
-- * This file is part of Quagga
-+ * This file is part of FRR
-  */
- 
- #include <zebra.h>
-@@ -186,78 +188,6 @@ int bgp_path_info_nexthop_cmp(struct bgp_path_info *bpi1,
- 	return compare;
- }
- 
--/*
-- * bgp_path_info_mpath_cmp
-- *
-- * This function determines our multipath list ordering. By ordering
-- * the list we can deterministically select which paths are included
-- * in the multipath set. The ordering also helps in detecting changes
-- * in the multipath selection so we can detect whether to send an
-- * update to zebra.
-- *
-- * The order of paths is determined first by received nexthop, and then
-- * by peer address if the nexthops are the same.
-- */
--static int bgp_path_info_mpath_cmp(void *val1, void *val2)
--{
--	struct bgp_path_info *bpi1, *bpi2;
--	int compare;
--
--	bpi1 = val1;
--	bpi2 = val2;
--
--	compare = bgp_path_info_nexthop_cmp(bpi1, bpi2);
--
--	if (!compare) {
--		if (!bpi1->peer->su_remote && !bpi2->peer->su_remote)
--			compare = 0;
--		else if (!bpi1->peer->su_remote)
--			compare = 1;
--		else if (!bpi2->peer->su_remote)
--			compare = -1;
--		else
--			compare = sockunion_cmp(bpi1->peer->su_remote,
--						bpi2->peer->su_remote);
--	}
--
--	return compare;
--}
--
--/*
-- * bgp_mp_list_init
-- *
-- * Initialize the mp_list, which holds the list of multipaths
-- * selected by bgp_best_selection
-- */
--void bgp_mp_list_init(struct list *mp_list)
--{
--	assert(mp_list);
--	memset(mp_list, 0, sizeof(struct list));
--	mp_list->cmp = bgp_path_info_mpath_cmp;
--}
--
--/*
-- * bgp_mp_list_clear
-- *
-- * Clears all entries out of the mp_list
-- */
--void bgp_mp_list_clear(struct list *mp_list)
--{
--	assert(mp_list);
--	list_delete_all_node(mp_list);
--}
--
--/*
-- * bgp_mp_list_add
-- *
-- * Adds a multipath entry to the mp_list
-- */
--void bgp_mp_list_add(struct list *mp_list, struct bgp_path_info *mpinfo)
--{
--	assert(mp_list && mpinfo);
--	listnode_add_sort(mp_list, mpinfo);
--}
--
- /*
-  * bgp_path_info_mpath_new
-  *
-@@ -270,6 +200,7 @@ static struct bgp_path_info_mpath *bgp_path_info_mpath_new(void)
- 	new_mpath = XCALLOC(MTYPE_BGP_MPATH_INFO,
- 			    sizeof(struct bgp_path_info_mpath));
- 
-+	new_mpath->mp_count = 1;
- 	return new_mpath;
- }
- 
-@@ -283,6 +214,8 @@ void bgp_path_info_mpath_free(struct bgp_path_info_mpath **mpath)
- 	if (mpath && *mpath) {
- 		if ((*mpath)->mp_attr)
- 			bgp_attr_unintern(&(*mpath)->mp_attr);
-+		(*mpath)->mp_attr = NULL;
-+
- 		XFREE(MTYPE_BGP_MPATH_INFO, *mpath);
- 	}
- }
-@@ -309,31 +242,6 @@ bgp_path_info_mpath_get(struct bgp_path_info *path)
- 	return path->mpath;
- }
- 
--/*
-- * bgp_path_info_mpath_enqueue
-- *
-- * Enqueue a path onto the multipath list given the previous multipath
-- * list entry
-- */
--static void bgp_path_info_mpath_enqueue(struct bgp_path_info *prev_info,
--					struct bgp_path_info *path)
--{
--	struct bgp_path_info_mpath *prev, *mpath;
--
--	prev = bgp_path_info_mpath_get(prev_info);
--	mpath = bgp_path_info_mpath_get(path);
--	if (!prev || !mpath)
--		return;
--
--	mpath->mp_next = prev->mp_next;
--	mpath->mp_prev = prev;
--	if (prev->mp_next)
--		prev->mp_next->mp_prev = mpath;
--	prev->mp_next = mpath;
--
--	SET_FLAG(path->flags, BGP_PATH_MULTIPATH);
--}
--
- /*
-  * bgp_path_info_mpath_dequeue
-  *
-@@ -342,14 +250,9 @@ static void bgp_path_info_mpath_enqueue(struct bgp_path_info *prev_info,
- void bgp_path_info_mpath_dequeue(struct bgp_path_info *path)
- {
- 	struct bgp_path_info_mpath *mpath = path->mpath;
-+
- 	if (!mpath)
- 		return;
--	if (mpath->mp_prev)
--		mpath->mp_prev->mp_next = mpath->mp_next;
--	if (mpath->mp_next)
--		mpath->mp_next->mp_prev = mpath->mp_prev;
--	mpath->mp_next = mpath->mp_prev = NULL;
--	UNSET_FLAG(path->flags, BGP_PATH_MULTIPATH);
- }
- 
- /*
-@@ -359,9 +262,16 @@ void bgp_path_info_mpath_dequeue(struct bgp_path_info *path)
-  */
- struct bgp_path_info *bgp_path_info_mpath_next(struct bgp_path_info *path)
- {
--	if (!path->mpath || !path->mpath->mp_next)
--		return NULL;
--	return path->mpath->mp_next->mp_info;
-+	path = path->next;
-+
-+	while (path) {
-+		if (CHECK_FLAG(path->flags, BGP_PATH_MULTIPATH))
-+			return path;
-+
-+		path = path->next;
-+	}
-+
-+	return NULL;
- }
- 
- /*
-@@ -382,7 +292,8 @@ struct bgp_path_info *bgp_path_info_mpath_first(struct bgp_path_info *path)
- uint32_t bgp_path_info_mpath_count(struct bgp_path_info *path)
- {
- 	if (!path->mpath)
--		return 0;
-+		return 1;
-+
- 	return path->mpath->mp_count;
- }
- 
-@@ -511,58 +422,51 @@ static void bgp_path_info_mpath_attr_set(struct bgp_path_info *path,
- /*
-  * bgp_path_info_mpath_update
-  *
-- * Compare and sync up the multipath list with the mp_list generated by
-- * bgp_best_selection
-+ * Compare and sync up the multipath flags with what was choosen
-+ * in best selection
-  */
- void bgp_path_info_mpath_update(struct bgp *bgp, struct bgp_dest *dest,
--				struct bgp_path_info *new_best,
--				struct bgp_path_info *old_best,
--				struct list *mp_list,
--				struct bgp_maxpaths_cfg *mpath_cfg)
-+				struct bgp_path_info *new_best, struct bgp_path_info *old_best,
-+				uint32_t num_candidates, struct bgp_maxpaths_cfg *mpath_cfg)
- {
- 	uint16_t maxpaths, mpath_count, old_mpath_count;
- 	uint32_t bwval;
- 	uint64_t cum_bw, old_cum_bw;
--	struct listnode *mp_node, *mp_next_node;
--	struct bgp_path_info *cur_mpath, *new_mpath, *next_mpath, *prev_mpath;
--	int mpath_changed, debug;
-+	struct bgp_path_info *cur_iterator = NULL;
-+	bool mpath_changed, debug;
- 	bool all_paths_lb;
- 	char path_buf[PATH_ADDPATH_STR_BUFFER];
-+	bool old_mpath, new_mpath;
- 
--	mpath_changed = 0;
-+	mpath_changed = false;
- 	maxpaths = multipath_num;
- 	mpath_count = 0;
--	cur_mpath = NULL;
- 	old_mpath_count = 0;
- 	old_cum_bw = cum_bw = 0;
--	prev_mpath = new_best;
--	mp_node = listhead(mp_list);
- 	debug = bgp_debug_bestpath(dest);
- 
--	if (new_best) {
--		mpath_count++;
--		if (new_best != old_best)
--			bgp_path_info_mpath_dequeue(new_best);
--		maxpaths = (new_best->peer->sort == BGP_PEER_IBGP)
--				   ? mpath_cfg->maxpaths_ibgp
--				   : mpath_cfg->maxpaths_ebgp;
--	}
--
- 	if (old_best) {
--		cur_mpath = bgp_path_info_mpath_first(old_best);
- 		old_mpath_count = bgp_path_info_mpath_count(old_best);
-+		if (old_mpath_count == 1)
-+			SET_FLAG(old_best->flags, BGP_PATH_MULTIPATH);
- 		old_cum_bw = bgp_path_info_mpath_cumbw(old_best);
- 		bgp_path_info_mpath_count_set(old_best, 0);
- 		bgp_path_info_mpath_lb_update(old_best, false, false, 0);
--		bgp_path_info_mpath_dequeue(old_best);
-+		bgp_path_info_mpath_free(&old_best->mpath);
-+		old_best->mpath = NULL;
-+	}
-+
-+	if (new_best) {
-+		maxpaths = (new_best->peer->sort == BGP_PEER_IBGP) ? mpath_cfg->maxpaths_ibgp
-+								   : mpath_cfg->maxpaths_ebgp;
-+		cur_iterator = new_best;
- 	}
- 
- 	if (debug)
--		zlog_debug("%pBD(%s): starting mpath update, newbest %s num candidates %d old-mpath-count %d old-cum-bw %" PRIu64,
--			   dest, bgp->name_pretty,
--			   new_best ? new_best->peer->host : "NONE",
--			   mp_list ? listcount(mp_list) : 0, old_mpath_count,
--			   old_cum_bw);
-+		zlog_debug("%pBD(%s): starting mpath update, newbest %s num candidates %d old-mpath-count %d old-cum-bw %" PRIu64
-+			   " maxpaths set %u",
-+			   dest, bgp->name_pretty, new_best ? new_best->peer->host : "NONE",
-+			   num_candidates, old_mpath_count, old_cum_bw, maxpaths);
- 
- 	/*
- 	 * We perform an ordered walk through both lists in parallel.
-@@ -576,173 +480,100 @@ void bgp_path_info_mpath_update(struct bgp *bgp, struct bgp_dest *dest,
- 	 * to skip over it
- 	 */
- 	all_paths_lb = true; /* We'll reset if any path doesn't have LB. */
--	while (mp_node || cur_mpath) {
--		struct bgp_path_info *tmp_info;
- 
-+	while (cur_iterator) {
-+		old_mpath = CHECK_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH);
-+		new_mpath = CHECK_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH_NEW);
-+
-+		UNSET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH_NEW);
- 		/*
--		 * We can bail out of this loop if all existing paths on the
--		 * multipath list have been visited (for cleanup purposes) and
--		 * the maxpath requirement is fulfulled
-+		 * If the current mpath count is equal to the number of
-+		 * maxpaths that can be used then we can bail, after
-+		 * we clean up the flags associated with the rest of the
-+		 * bestpaths
- 		 */
--		if (!cur_mpath && (mpath_count >= maxpaths))
-+		if (mpath_count >= maxpaths) {
-+			while (cur_iterator) {
-+				UNSET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH);
-+				UNSET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH_NEW);
-+
-+				cur_iterator = cur_iterator->next;
-+			}
- 			break;
- 
--		mp_next_node = mp_node ? listnextnode(mp_node) : NULL;
--		next_mpath =
--			cur_mpath ? bgp_path_info_mpath_next(cur_mpath) : NULL;
--		tmp_info = mp_node ? listgetdata(mp_node) : NULL;
-+			if (debug)
-+				zlog_debug("%pBD(%s): Mpath count %u is equal to maximum paths allowed, finished comparision for MPATHS",
-+					   dest, bgp->name_pretty, mpath_count);
-+		}
- 
- 		if (debug)
--			zlog_debug("%pBD(%s): comparing candidate %s with existing mpath %s",
--				   dest, bgp->name_pretty,
--				   tmp_info ? tmp_info->peer->host : "NONE",
--				   cur_mpath ? cur_mpath->peer->host : "NONE");
--
-+			zlog_debug("%pBD(%s): Candidate %s old_mpath: %u new_mpath: %u, Nexthop %pI4 current mpath count: %u",
-+				   dest, bgp->name_pretty, cur_iterator->peer->host, old_mpath,
-+				   new_mpath, &cur_iterator->attr->nexthop, mpath_count);
- 		/*
--		 * If equal, the path was a multipath and is still a multipath.
--		 * Insert onto new multipath list if maxpaths allows.
-+		 * There is nothing to do if the cur_iterator is neither a old path
-+		 * or a new path
- 		 */
--		if (mp_node && (listgetdata(mp_node) == cur_mpath)) {
--			list_delete_node(mp_list, mp_node);
--			bgp_path_info_mpath_dequeue(cur_mpath);
--			if ((mpath_count < maxpaths)
--			    && prev_mpath
--			    && bgp_path_info_nexthop_cmp(prev_mpath,
--							 cur_mpath)) {
--				bgp_path_info_mpath_enqueue(prev_mpath,
--							    cur_mpath);
--				prev_mpath = cur_mpath;
--				mpath_count++;
--				if (ecommunity_linkbw_present(
--					    bgp_attr_get_ecommunity(
--						    cur_mpath->attr),
--					    &bwval))
--					cum_bw += bwval;
--				else
--					all_paths_lb = false;
--				if (debug) {
--					bgp_path_info_path_with_addpath_rx_str(
--						cur_mpath, path_buf,
--						sizeof(path_buf));
--					zlog_debug("%pBD: %s is still multipath, cur count %d",
--						   dest, path_buf, mpath_count);
--				}
--			} else {
--				mpath_changed = 1;
--				if (debug) {
--					bgp_path_info_path_with_addpath_rx_str(
--						cur_mpath, path_buf,
--						sizeof(path_buf));
--					zlog_debug("%pBD: remove mpath %s nexthop %pI4, cur count %d",
--						   dest, path_buf,
--						   &cur_mpath->attr->nexthop,
--						   mpath_count);
--				}
--			}
--			mp_node = mp_next_node;
--			cur_mpath = next_mpath;
-+		if (!old_mpath && !new_mpath) {
-+			UNSET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH);
-+			cur_iterator = cur_iterator->next;
- 			continue;
- 		}
- 
--		if (cur_mpath
--		    && (!mp_node
--			|| (bgp_path_info_mpath_cmp(cur_mpath,
--						    listgetdata(mp_node))
--			    < 0))) {
--			/*
--			 * If here, we have an old multipath and either the
--			 * mp_list
--			 * is finished or the next mp_node points to a later
--			 * multipath, so we need to purge this path from the
--			 * multipath list
--			 */
--			bgp_path_info_mpath_dequeue(cur_mpath);
--			mpath_changed = 1;
-+		if (new_mpath) {
-+			mpath_count++;
-+
-+			if (cur_iterator != new_best)
-+				SET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH);
-+
-+			if (!old_mpath)
-+				mpath_changed = true;
-+
-+			if (ecommunity_linkbw_present(bgp_attr_get_ecommunity(cur_iterator->attr),
-+						      &bwval) ||
-+			    ecommunity_linkbw_present(bgp_attr_get_ipv6_ecommunity(
-+							      cur_iterator->attr),
-+						      &bwval))
-+				cum_bw += bwval;
-+			else
-+				all_paths_lb = false;
-+
- 			if (debug) {
--				bgp_path_info_path_with_addpath_rx_str(
--					cur_mpath, path_buf, sizeof(path_buf));
--				zlog_debug("%pBD: remove mpath %s nexthop %pI4, cur count %d",
--					   dest, path_buf,
--					   &cur_mpath->attr->nexthop,
--					   mpath_count);
-+				bgp_path_info_path_with_addpath_rx_str(cur_iterator, path_buf,
-+								       sizeof(path_buf));
-+				zlog_debug("%pBD: add mpath %s nexthop %pI4, cur count %d cum_bw: %" PRIu64
-+					   " all_paths_lb: %u",
-+					   dest, path_buf, &cur_iterator->attr->nexthop,
-+					   mpath_count, cum_bw, all_paths_lb);
- 			}
--			cur_mpath = next_mpath;
- 		} else {
- 			/*
--			 * If here, we have a path on the mp_list that was not
--			 * previously
--			 * a multipath (due to non-equivalance or maxpaths
--			 * exceeded),
--			 * or the matching multipath is sorted later in the
--			 * multipath
--			 * list. Before we enqueue the path on the new multipath
--			 * list,
--			 * make sure its not on the old_best multipath list or
--			 * referenced
--			 * via next_mpath:
--			 * - If next_mpath points to this new path, update
--			 * next_mpath to
--			 *   point to the multipath after this one
--			 * - Dequeue the path from the multipath list just to
--			 * make sure
-+			 * We know that old_mpath is true and new_mpath is false in this path
- 			 */
--			new_mpath = listgetdata(mp_node);
--			list_delete_node(mp_list, mp_node);
--			assert(new_mpath);
--			assert(prev_mpath);
--			if ((mpath_count < maxpaths) && (new_mpath != new_best)
--			    && bgp_path_info_nexthop_cmp(prev_mpath,
--							 new_mpath)) {
--				bgp_path_info_mpath_dequeue(new_mpath);
--
--				bgp_path_info_mpath_enqueue(prev_mpath,
--							    new_mpath);
--				prev_mpath = new_mpath;
--				mpath_changed = 1;
--				mpath_count++;
--				if (ecommunity_linkbw_present(
--					    bgp_attr_get_ecommunity(
--						    new_mpath->attr),
--					    &bwval))
--					cum_bw += bwval;
--				else
--					all_paths_lb = false;
--				if (debug) {
--					bgp_path_info_path_with_addpath_rx_str(
--						new_mpath, path_buf,
--						sizeof(path_buf));
--					zlog_debug("%pBD: add mpath %s nexthop %pI4, cur count %d",
--						   dest, path_buf,
--						   &new_mpath->attr->nexthop,
--						   mpath_count);
--				}
--			}
--			mp_node = mp_next_node;
-+			mpath_changed = true;
-+			UNSET_FLAG(cur_iterator->flags, BGP_PATH_MULTIPATH);
- 		}
-+
-+		cur_iterator = cur_iterator->next;
- 	}
- 
- 	if (new_best) {
--		bgp_path_info_mpath_count_set(new_best, mpath_count - 1);
--		if (mpath_count <= 1 ||
--		    !ecommunity_linkbw_present(
--			    bgp_attr_get_ecommunity(new_best->attr), &bwval))
--			all_paths_lb = false;
--		else
--			cum_bw += bwval;
--		bgp_path_info_mpath_lb_update(new_best, true,
--					      all_paths_lb, cum_bw);
--
-+		if (mpath_count > 1 || new_best->mpath) {
-+			bgp_path_info_mpath_count_set(new_best, mpath_count);
-+			bgp_path_info_mpath_lb_update(new_best, true, all_paths_lb, cum_bw);
-+		}
- 		if (debug)
- 			zlog_debug("%pBD(%s): New mpath count (incl newbest) %d mpath-change %s all_paths_lb %d cum_bw %" PRIu64,
- 				   dest, bgp->name_pretty, mpath_count,
- 				   mpath_changed ? "YES" : "NO", all_paths_lb,
- 				   cum_bw);
- 
-+		if (mpath_count == 1)
-+			UNSET_FLAG(new_best->flags, BGP_PATH_MULTIPATH);
- 		if (mpath_changed
- 		    || (bgp_path_info_mpath_count(new_best) != old_mpath_count))
- 			SET_FLAG(new_best->flags, BGP_PATH_MULTIPATH_CHG);
--		if ((mpath_count - 1) != old_mpath_count ||
--		    old_cum_bw != cum_bw)
-+		if ((mpath_count) != old_mpath_count || old_cum_bw != cum_bw)
- 			SET_FLAG(new_best->flags, BGP_PATH_LINK_BW_CHG);
- 	}
- }
-@@ -755,20 +586,13 @@ void bgp_path_info_mpath_update(struct bgp *bgp, struct bgp_dest *dest,
-  */
- void bgp_mp_dmed_deselect(struct bgp_path_info *dmed_best)
- {
--	struct bgp_path_info *mpinfo, *mpnext;
--
- 	if (!dmed_best)
- 		return;
- 
--	for (mpinfo = bgp_path_info_mpath_first(dmed_best); mpinfo;
--	     mpinfo = mpnext) {
--		mpnext = bgp_path_info_mpath_next(mpinfo);
--		bgp_path_info_mpath_dequeue(mpinfo);
--	}
--
- 	bgp_path_info_mpath_count_set(dmed_best, 0);
- 	UNSET_FLAG(dmed_best->flags, BGP_PATH_MULTIPATH_CHG);
- 	UNSET_FLAG(dmed_best->flags, BGP_PATH_LINK_BW_CHG);
-+
- 	assert(bgp_path_info_mpath_first(dmed_best) == NULL);
- }
- 
-@@ -806,7 +630,7 @@ void bgp_path_info_mpath_aggregate_update(struct bgp_path_info *new_best,
- 	if (!new_best)
- 		return;
- 
--	if (!bgp_path_info_mpath_count(new_best)) {
-+	if (bgp_path_info_mpath_count(new_best) == 1) {
- 		if ((new_attr = bgp_path_info_mpath_attr(new_best))) {
- 			bgp_attr_unintern(&new_attr);
- 			bgp_path_info_mpath_attr_set(new_best, NULL);
-diff --git a/bgpd/bgp_mpath.h b/bgpd/bgp_mpath.h
-index 267d729e06..a7107deb0e 100644
---- a/bgpd/bgp_mpath.h
-+++ b/bgpd/bgp_mpath.h
-@@ -2,8 +2,9 @@
- /*
-  * BGP Multipath
-  * Copyright (C) 2010 Google Inc.
-+ *               2024 Nvidia Corporation
-  *
-- * This file is part of Quagga
-+ * This file is part of FRR
-  */
- 
- #ifndef _FRR_BGP_MPATH_H
-@@ -13,12 +14,6 @@
-  * multipath selections, lazily allocated to save memory
-  */
- struct bgp_path_info_mpath {
--	/* Points to the first multipath (on bestpath) or the next multipath */
--	struct bgp_path_info_mpath *mp_next;
--
--	/* Points to the previous multipath or NULL on bestpath */
--	struct bgp_path_info_mpath *mp_prev;
--
- 	/* Points to bgp_path_info associated with this multipath info */
- 	struct bgp_path_info *mp_info;
- 
-@@ -50,16 +45,11 @@ extern int bgp_maximum_paths_unset(struct bgp *bgp, afi_t afi, safi_t safi,
- /* Functions used by bgp_best_selection to record current
-  * multipath selections
-  */
--extern int bgp_path_info_nexthop_cmp(struct bgp_path_info *bpi1,
--				     struct bgp_path_info *bpi2);
--extern void bgp_mp_list_init(struct list *mp_list);
--extern void bgp_mp_list_clear(struct list *mp_list);
--extern void bgp_mp_list_add(struct list *mp_list, struct bgp_path_info *mpinfo);
-+extern int bgp_path_info_nexthop_cmp(struct bgp_path_info *bpi1, struct bgp_path_info *bpi2);
- extern void bgp_mp_dmed_deselect(struct bgp_path_info *dmed_best);
- extern void bgp_path_info_mpath_update(struct bgp *bgp, struct bgp_dest *dest,
- 				       struct bgp_path_info *new_best,
--				       struct bgp_path_info *old_best,
--				       struct list *mp_list,
-+				       struct bgp_path_info *old_best, uint32_t num_candidates,
- 				       struct bgp_maxpaths_cfg *mpath_cfg);
- extern void
- bgp_path_info_mpath_aggregate_update(struct bgp_path_info *new_best,
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index c33b14675a..12cbf66341 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -2143,8 +2143,7 @@ bool subgroup_announce_check(struct bgp_dest *dest, struct bgp_path_info *pi,
- 	from = pi->peer;
- 	filter = &peer->filter[afi][safi];
- 	bgp = SUBGRP_INST(subgrp);
--	piattr = bgp_path_info_mpath_count(pi) ? bgp_path_info_mpath_attr(pi)
--					       : pi->attr;
-+	piattr = bgp_path_info_mpath_count(pi) > 1 ? bgp_path_info_mpath_attr(pi) : pi->attr;
- 
- 	if (CHECK_FLAG(peer->af_flags[afi][safi], PEER_FLAG_MAX_PREFIX_OUT) &&
- 	    peer->pmax_out[afi][safi] != 0 &&
-@@ -2812,13 +2811,12 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest,
- 	struct bgp_path_info *pi2;
- 	int paths_eq, do_mpath;
- 	bool debug, any_comparisons;
--	struct list mp_list;
- 	char pfx_buf[PREFIX2STR_BUFFER] = {};
- 	char path_buf[PATH_ADDPATH_STR_BUFFER];
- 	enum bgp_path_selection_reason reason = bgp_path_selection_none;
- 	bool unsorted_items = true;
-+	uint32_t num_candidates = 0;
- 
--	bgp_mp_list_init(&mp_list);
- 	do_mpath =
- 		(mpath_cfg->maxpaths_ebgp > 1 || mpath_cfg->maxpaths_ibgp > 1);
- 
-@@ -3202,7 +3200,8 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest,
- 						"%pBD(%s): %s is the bestpath, add to the multipath list",
- 						dest, bgp->name_pretty,
- 						path_buf);
--				bgp_mp_list_add(&mp_list, pi);
-+				SET_FLAG(pi->flags, BGP_PATH_MULTIPATH_NEW);
-+				num_candidates++;
- 				continue;
- 			}
- 
-@@ -3234,15 +3233,14 @@ void bgp_best_selection(struct bgp *bgp, struct bgp_dest *dest,
- 						"%pBD(%s): %s is equivalent to the bestpath, add to the multipath list",
- 						dest, bgp->name_pretty,
- 						path_buf);
--				bgp_mp_list_add(&mp_list, pi);
-+				SET_FLAG(pi->flags, BGP_PATH_MULTIPATH_NEW);
-+				num_candidates++;
- 			}
- 		}
- 	}
- 
--	bgp_path_info_mpath_update(bgp, dest, new_select, old_select, &mp_list,
--				   mpath_cfg);
-+	bgp_path_info_mpath_update(bgp, dest, new_select, old_select, num_candidates, mpath_cfg);
- 	bgp_path_info_mpath_aggregate_update(new_select, old_select);
--	bgp_mp_list_clear(&mp_list);
- 
- 	bgp_addpath_update_ids(bgp, dest, afi, safi);
- 
-@@ -11057,9 +11055,8 @@ void route_vty_out_detail(struct vty *vty, struct bgp *bgp, struct bgp_dest *bn,
- 			vty_out(vty, ", otc %u", attr->otc);
- 	}
- 
--	if (CHECK_FLAG(path->flags, BGP_PATH_MULTIPATH)
--	    || (CHECK_FLAG(path->flags, BGP_PATH_SELECTED)
--		&& bgp_path_info_mpath_count(path))) {
-+	if (CHECK_FLAG(path->flags, BGP_PATH_MULTIPATH) ||
-+	    (CHECK_FLAG(path->flags, BGP_PATH_SELECTED) && bgp_path_info_mpath_count(path) > 1)) {
- 		if (json_paths)
- 			json_object_boolean_true_add(json_path, "multipath");
- 		else
-diff --git a/bgpd/bgp_route.h b/bgpd/bgp_route.h
-index e6f7b9da36..61492980ad 100644
---- a/bgpd/bgp_route.h
-+++ b/bgpd/bgp_route.h
-@@ -319,6 +319,11 @@ struct bgp_path_info {
- #define BGP_PATH_STALE (1 << 8)
- #define BGP_PATH_REMOVED (1 << 9)
- #define BGP_PATH_COUNTED (1 << 10)
-+/*
-+ * A BGP_PATH_MULTIPATH flag is not set on the best path
-+ * it is set on every other node that is part of ECMP
-+ * for that particular dest
-+ */
- #define BGP_PATH_MULTIPATH (1 << 11)
- #define BGP_PATH_MULTIPATH_CHG (1 << 12)
- #define BGP_PATH_RIB_ATTR_CHG (1 << 13)
-@@ -328,6 +333,15 @@ struct bgp_path_info {
- #define BGP_PATH_MPLSVPN_LABEL_NH (1 << 17)
- #define BGP_PATH_MPLSVPN_NH_LABEL_BIND (1 << 18)
- #define BGP_PATH_UNSORTED (1 << 19)
-+/*
-+ * BGP_PATH_MULTIPATH_NEW is set on those bgp_path_info
-+ * nodes that we have decided should possibly be in the
-+ * ecmp path for a particular dest.  This flag is
-+ * removed when the bgp_path_info's are looked at to
-+ * decide on whether or not a bgp_path_info is on
-+ * the actual ecmp path.
-+ */
-+#define BGP_PATH_MULTIPATH_NEW (1 << 20)
- 
- 	/* BGP route type.  This can be static, RIP, OSPF, BGP etc.  */
- 	uint8_t type;
-diff --git a/bgpd/bgp_routemap.c b/bgpd/bgp_routemap.c
-index dbc3d6445d..7f0abd062b 100644
---- a/bgpd/bgp_routemap.c
-+++ b/bgpd/bgp_routemap.c
-@@ -3238,7 +3238,7 @@ route_set_ecommunity_lb(void *rule, const struct prefix *prefix, void *object)
- 			return RMAP_OKAY;
- 
- 		bw_bytes = ((uint64_t)peer->bgp->lb_ref_bw * 1000 * 1000) / 8;
--		mpath_count = bgp_path_info_mpath_count(path) + 1;
-+		mpath_count = bgp_path_info_mpath_count(path);
- 		bw_bytes *= mpath_count;
- 	}
- 
-diff --git a/tests/bgpd/subdir.am b/tests/bgpd/subdir.am
-index 5148e7e440..97845ec1aa 100644
---- a/tests/bgpd/subdir.am
-+++ b/tests/bgpd/subdir.am
-@@ -52,17 +52,6 @@ tests_bgpd_test_mp_attr_LDADD = $(BGP_TEST_LDADD)
- tests_bgpd_test_mp_attr_SOURCES = tests/bgpd/test_mp_attr.c
- EXTRA_DIST += tests/bgpd/test_mp_attr.py
- 
--
--if BGPD
--check_PROGRAMS += tests/bgpd/test_mpath
--endif
--tests_bgpd_test_mpath_CFLAGS = $(TESTS_CFLAGS)
--tests_bgpd_test_mpath_CPPFLAGS = $(TESTS_CPPFLAGS)
--tests_bgpd_test_mpath_LDADD = $(BGP_TEST_LDADD)
--tests_bgpd_test_mpath_SOURCES = tests/bgpd/test_mpath.c
--EXTRA_DIST += tests/bgpd/test_mpath.py
--
--
- if BGPD
- check_PROGRAMS += tests/bgpd/test_packet
- endif
-diff --git a/tests/bgpd/test_mpath.c b/tests/bgpd/test_mpath.c
-deleted file mode 100644
-index ebbe3ac3e2..0000000000
---- a/tests/bgpd/test_mpath.c
-+++ /dev/null
-@@ -1,482 +0,0 @@
--// SPDX-License-Identifier: GPL-2.0-or-later
--/*
-- * BGP Multipath Unit Test
-- * Copyright (C) 2010 Google Inc.
-- *
-- * This file is part of Quagga
-- */
--
--#include <zebra.h>
--
--#include "qobj.h"
--#include "vty.h"
--#include "stream.h"
--#include "privs.h"
--#include "linklist.h"
--#include "memory.h"
--#include "zclient.h"
--#include "queue.h"
--#include "filter.h"
--
--#include "bgpd/bgpd.h"
--#include "bgpd/bgp_table.h"
--#include "bgpd/bgp_route.h"
--#include "bgpd/bgp_attr.h"
--#include "bgpd/bgp_nexthop.h"
--#include "bgpd/bgp_mpath.h"
--#include "bgpd/bgp_evpn.h"
--#include "bgpd/bgp_network.h"
--
--#define VT100_RESET "\x1b[0m"
--#define VT100_RED "\x1b[31m"
--#define VT100_GREEN "\x1b[32m"
--#define VT100_YELLOW "\x1b[33m"
--#define OK VT100_GREEN "OK" VT100_RESET
--#define FAILED VT100_RED "failed" VT100_RESET
--
--#define TEST_PASSED 0
--#define TEST_FAILED -1
--
--#define EXPECT_TRUE(expr, res)                                                 \
--	if (!(expr)) {                                                         \
--		printf("Test failure in %s line %u: %s\n", __func__, __LINE__, \
--		       #expr);                                                 \
--		(res) = TEST_FAILED;                                           \
--	}
--
--typedef struct testcase_t__ testcase_t;
--
--typedef int (*test_setup_func)(testcase_t *);
--typedef int (*test_run_func)(testcase_t *);
--typedef int (*test_cleanup_func)(testcase_t *);
--
--struct testcase_t__ {
--	const char *desc;
--	void *test_data;
--	void *verify_data;
--	void *tmp_data;
--	test_setup_func setup;
--	test_run_func run;
--	test_cleanup_func cleanup;
--};
--
--/* need these to link in libbgp */
--struct event_loop *master = NULL;
--extern struct zclient *zclient;
--struct zebra_privs_t bgpd_privs = {
--	.user = NULL,
--	.group = NULL,
--	.vty_group = NULL,
--};
--
--static int tty = 0;
--
--/* Create fake bgp instance */
--static struct bgp *bgp_create_fake(as_t *as, const char *name)
--{
--	struct bgp *bgp;
--	afi_t afi;
--	safi_t safi;
--
--	if ((bgp = XCALLOC(MTYPE_BGP, sizeof(struct bgp))) == NULL)
--		return NULL;
--
--	bgp_lock(bgp);
--	// bgp->peer_self = peer_new (bgp);
--	// bgp->peer_self->host = XSTRDUP (MTYPE_BGP_PEER_HOST, "Static
--	// announcement");
--
--	bgp->peer = list_new();
--	// bgp->peer->cmp = (int (*)(void *, void *)) peer_cmp;
--
--	bgp->group = list_new();
--	// bgp->group->cmp = (int (*)(void *, void *)) peer_group_cmp;
--
--	bgp_evpn_init(bgp);
--	FOREACH_AFI_SAFI (afi, safi) {
--		bgp->route[afi][safi] = bgp_table_init(bgp, afi, safi);
--		bgp->aggregate[afi][safi] = bgp_table_init(bgp, afi, safi);
--		bgp->rib[afi][safi] = bgp_table_init(bgp, afi, safi);
--		bgp->maxpaths[afi][safi].maxpaths_ebgp = MULTIPATH_NUM;
--		bgp->maxpaths[afi][safi].maxpaths_ibgp = MULTIPATH_NUM;
--	}
--
--	bgp_scan_init(bgp);
--	bgp->default_local_pref = BGP_DEFAULT_LOCAL_PREF;
--	bgp->default_holdtime = BGP_DEFAULT_HOLDTIME;
--	bgp->default_keepalive = BGP_DEFAULT_KEEPALIVE;
--	bgp->restart_time = BGP_DEFAULT_RESTART_TIME;
--	bgp->stalepath_time = BGP_DEFAULT_STALEPATH_TIME;
--
--	bgp->as = *as;
--
--	if (name)
--		bgp->name = strdup(name);
--
--	return bgp;
--}
--
--/*=========================================================
-- * Testcase for maximum-paths configuration
-- */
--static int setup_bgp_cfg_maximum_paths(testcase_t *t)
--{
--	as_t asn = 1;
--	t->tmp_data = bgp_create_fake(&asn, NULL);
--	if (!t->tmp_data)
--		return -1;
--	return 0;
--}
--
--static int run_bgp_cfg_maximum_paths(testcase_t *t)
--{
--	afi_t afi;
--	safi_t safi;
--	struct bgp *bgp;
--	int api_result;
--	int test_result = TEST_PASSED;
--
--	bgp = t->tmp_data;
--	FOREACH_AFI_SAFI (afi, safi) {
--		/* test bgp_maximum_paths_set */
--		api_result = bgp_maximum_paths_set(bgp, afi, safi,
--						   BGP_PEER_EBGP, 10, 0);
--		EXPECT_TRUE(api_result == 0, test_result);
--		api_result = bgp_maximum_paths_set(bgp, afi, safi,
--						   BGP_PEER_IBGP, 10, 0);
--		EXPECT_TRUE(api_result == 0, test_result);
--		EXPECT_TRUE(bgp->maxpaths[afi][safi].maxpaths_ebgp == 10,
--			    test_result);
--		EXPECT_TRUE(bgp->maxpaths[afi][safi].maxpaths_ibgp == 10,
--			    test_result);
--
--		/* test bgp_maximum_paths_unset */
--		api_result =
--			bgp_maximum_paths_unset(bgp, afi, safi, BGP_PEER_EBGP);
--		EXPECT_TRUE(api_result == 0, test_result);
--		api_result =
--			bgp_maximum_paths_unset(bgp, afi, safi, BGP_PEER_IBGP);
--		EXPECT_TRUE(api_result == 0, test_result);
--		EXPECT_TRUE((bgp->maxpaths[afi][safi].maxpaths_ebgp
--			     == MULTIPATH_NUM),
--			    test_result);
--		EXPECT_TRUE((bgp->maxpaths[afi][safi].maxpaths_ibgp
--			     == MULTIPATH_NUM),
--			    test_result);
--	}
--
--	return test_result;
--}
--
--static int cleanup_bgp_cfg_maximum_paths(testcase_t *t)
--{
--	return bgp_delete((struct bgp *)t->tmp_data);
--}
--
--testcase_t test_bgp_cfg_maximum_paths = {
--	.desc = "Test bgp maximum-paths config",
--	.setup = setup_bgp_cfg_maximum_paths,
--	.run = run_bgp_cfg_maximum_paths,
--	.cleanup = cleanup_bgp_cfg_maximum_paths,
--};
--
--/*=========================================================
-- * Testcase for bgp_mp_list
-- */
--struct peer test_mp_list_peer[] = {
--	{.local_as = 1, .as = 2}, {.local_as = 1, .as = 2},
--	{.local_as = 1, .as = 2}, {.local_as = 1, .as = 2},
--	{.local_as = 1, .as = 2},
--};
--int test_mp_list_peer_count = array_size(test_mp_list_peer);
--struct attr test_mp_list_attr[4];
--struct bgp_path_info test_mp_list_info[] = {
--	{.peer = &test_mp_list_peer[0], .attr = &test_mp_list_attr[0]},
--	{.peer = &test_mp_list_peer[1], .attr = &test_mp_list_attr[1]},
--	{.peer = &test_mp_list_peer[2], .attr = &test_mp_list_attr[1]},
--	{.peer = &test_mp_list_peer[3], .attr = &test_mp_list_attr[2]},
--	{.peer = &test_mp_list_peer[4], .attr = &test_mp_list_attr[3]},
--};
--int test_mp_list_info_count = array_size(test_mp_list_info);
--
--static int setup_bgp_mp_list(testcase_t *t)
--{
--	test_mp_list_attr[0].nexthop.s_addr = 0x01010101;
--	test_mp_list_attr[1].nexthop.s_addr = 0x02020202;
--	test_mp_list_attr[2].nexthop.s_addr = 0x03030303;
--	test_mp_list_attr[3].nexthop.s_addr = 0x04040404;
--
--	if ((test_mp_list_peer[0].su_remote = sockunion_str2su("1.1.1.1"))
--	    == NULL)
--		return -1;
--	if ((test_mp_list_peer[1].su_remote = sockunion_str2su("2.2.2.2"))
--	    == NULL)
--		return -1;
--	if ((test_mp_list_peer[2].su_remote = sockunion_str2su("3.3.3.3"))
--	    == NULL)
--		return -1;
--	if ((test_mp_list_peer[3].su_remote = sockunion_str2su("4.4.4.4"))
--	    == NULL)
--		return -1;
--	if ((test_mp_list_peer[4].su_remote = sockunion_str2su("5.5.5.5"))
--	    == NULL)
--		return -1;
--
--	return 0;
--}
--
--static int run_bgp_mp_list(testcase_t *t)
--{
--	struct list mp_list;
--	struct listnode *mp_node;
--	struct bgp_path_info *info;
--	int i;
--	int test_result = TEST_PASSED;
--	bgp_mp_list_init(&mp_list);
--	EXPECT_TRUE(listcount(&mp_list) == 0, test_result);
--
--	bgp_mp_list_add(&mp_list, &test_mp_list_info[1]);
--	bgp_mp_list_add(&mp_list, &test_mp_list_info[4]);
--	bgp_mp_list_add(&mp_list, &test_mp_list_info[2]);
--	bgp_mp_list_add(&mp_list, &test_mp_list_info[3]);
--	bgp_mp_list_add(&mp_list, &test_mp_list_info[0]);
--
--	for (i = 0, mp_node = mp_list.head; i < test_mp_list_info_count;
--	     i++, mp_node = listnextnode(mp_node)) {
--		info = listgetdata(mp_node);
--		info->lock++;
--		EXPECT_TRUE(info == &test_mp_list_info[i], test_result);
--	}
--
--	bgp_mp_list_clear(&mp_list);
--	EXPECT_TRUE(listcount(&mp_list) == 0, test_result);
--
--	return test_result;
--}
--
--static int cleanup_bgp_mp_list(testcase_t *t)
--{
--	int i;
--
--	for (i = 0; i < test_mp_list_peer_count; i++)
--		sockunion_free(test_mp_list_peer[i].su_remote);
--
--	return 0;
--}
--
--testcase_t test_bgp_mp_list = {
--	.desc = "Test bgp_mp_list",
--	.setup = setup_bgp_mp_list,
--	.run = run_bgp_mp_list,
--	.cleanup = cleanup_bgp_mp_list,
--};
--
--/*=========================================================
-- * Testcase for bgp_path_info_mpath_update
-- */
--
--static struct bgp_dest *dest;
--
--static int setup_bgp_path_info_mpath_update(testcase_t *t)
--{
--	int i;
--	struct bgp *bgp;
--	struct bgp_table *rt;
--	struct prefix p;
--	as_t asn = 1;
--
--	t->tmp_data = bgp_create_fake(&asn, NULL);
--	if (!t->tmp_data)
--		return -1;
--
--	bgp = t->tmp_data;
--	rt = bgp->rib[AFI_IP][SAFI_UNICAST];
--
--	if (!rt)
--		return -1;
--
--	str2prefix("42.1.1.0/24", &p);
--	dest = bgp_node_get(rt, &p);
--
--	setup_bgp_mp_list(t);
--	for (i = 0; i < test_mp_list_info_count; i++)
--		bgp_path_info_add(dest, &test_mp_list_info[i]);
--	return 0;
--}
--
--static int run_bgp_path_info_mpath_update(testcase_t *t)
--{
--	struct bgp_path_info *new_best, *old_best, *mpath;
--	struct list mp_list;
--	struct bgp_maxpaths_cfg mp_cfg = {3, 3};
--
--	int test_result = TEST_PASSED;
--	bgp_mp_list_init(&mp_list);
--	bgp_mp_list_add(&mp_list, &test_mp_list_info[4]);
--	bgp_mp_list_add(&mp_list, &test_mp_list_info[3]);
--	bgp_mp_list_add(&mp_list, &test_mp_list_info[0]);
--	bgp_mp_list_add(&mp_list, &test_mp_list_info[1]);
--	new_best = &test_mp_list_info[3];
--	old_best = NULL;
--	bgp_path_info_mpath_update(NULL, dest, new_best, old_best, &mp_list,
--				   &mp_cfg);
--	bgp_mp_list_clear(&mp_list);
--	EXPECT_TRUE(bgp_path_info_mpath_count(new_best) == 2, test_result);
--	mpath = bgp_path_info_mpath_first(new_best);
--	EXPECT_TRUE(mpath == &test_mp_list_info[0], test_result);
--	EXPECT_TRUE(CHECK_FLAG(mpath->flags, BGP_PATH_MULTIPATH), test_result);
--	mpath = bgp_path_info_mpath_next(mpath);
--	EXPECT_TRUE(mpath == &test_mp_list_info[1], test_result);
--	EXPECT_TRUE(CHECK_FLAG(mpath->flags, BGP_PATH_MULTIPATH), test_result);
--
--	bgp_mp_list_add(&mp_list, &test_mp_list_info[0]);
--	bgp_mp_list_add(&mp_list, &test_mp_list_info[1]);
--	new_best = &test_mp_list_info[0];
--	old_best = &test_mp_list_info[3];
--	bgp_path_info_mpath_update(NULL, dest, new_best, old_best, &mp_list,
--				   &mp_cfg);
--	bgp_mp_list_clear(&mp_list);
--	EXPECT_TRUE(bgp_path_info_mpath_count(new_best) == 1, test_result);
--	mpath = bgp_path_info_mpath_first(new_best);
--	EXPECT_TRUE(mpath == &test_mp_list_info[1], test_result);
--	EXPECT_TRUE(CHECK_FLAG(mpath->flags, BGP_PATH_MULTIPATH), test_result);
--	EXPECT_TRUE(!CHECK_FLAG(test_mp_list_info[0].flags, BGP_PATH_MULTIPATH),
--		    test_result);
--
--	return test_result;
--}
--
--static int cleanup_bgp_path_info_mpath_update(testcase_t *t)
--{
--	int i;
--
--	for (i = 0; i < test_mp_list_peer_count; i++)
--		sockunion_free(test_mp_list_peer[i].su_remote);
--
--	return bgp_delete((struct bgp *)t->tmp_data);
--}
--
--testcase_t test_bgp_path_info_mpath_update = {
--	.desc = "Test bgp_path_info_mpath_update",
--	.setup = setup_bgp_path_info_mpath_update,
--	.run = run_bgp_path_info_mpath_update,
--	.cleanup = cleanup_bgp_path_info_mpath_update,
--};
--
--/*=========================================================
-- * Set up testcase vector
-- */
--testcase_t *all_tests[] = {
--	&test_bgp_cfg_maximum_paths, &test_bgp_mp_list,
--	&test_bgp_path_info_mpath_update,
--};
--
--int all_tests_count = array_size(all_tests);
--
--/*=========================================================
-- * Test Driver Functions
-- */
--static int global_test_init(void)
--{
--	qobj_init();
--	master = event_master_create(NULL);
--	zclient = zclient_new(master, &zclient_options_default, NULL, 0);
--	bgp_master_init(master, BGP_SOCKET_SNDBUF_SIZE, list_new());
--	vrf_init(NULL, NULL, NULL, NULL);
--	bgp_option_set(BGP_OPT_NO_LISTEN);
--
--	if (fileno(stdout) >= 0)
--		tty = isatty(fileno(stdout));
--	return 0;
--}
--
--static int global_test_cleanup(void)
--{
--	if (zclient != NULL)
--		zclient_free(zclient);
--	event_master_free(master);
--	return 0;
--}
--
--static void display_result(testcase_t *test, int result)
--{
--	if (tty)
--		printf("%s: %s\n", test->desc,
--		       result == TEST_PASSED ? OK : FAILED);
--	else
--		printf("%s: %s\n", test->desc,
--		       result == TEST_PASSED ? "OK" : "FAILED");
--}
--
--static int setup_test(testcase_t *t)
--{
--	int res = 0;
--	if (t->setup)
--		res = t->setup(t);
--	return res;
--}
--
--static int cleanup_test(testcase_t *t)
--{
--	int res = 0;
--	if (t->cleanup)
--		res = t->cleanup(t);
--	return res;
--}
--
--static void run_tests(testcase_t *tests[], int num_tests, int *pass_count,
--		      int *fail_count)
--{
--	int test_index, result;
--	testcase_t *cur_test;
--
--	*pass_count = *fail_count = 0;
--
--	for (test_index = 0; test_index < num_tests; test_index++) {
--		cur_test = tests[test_index];
--		if (!cur_test->desc) {
--			printf("error: test %d has no description!\n",
--			       test_index);
--			continue;
--		}
--		if (!cur_test->run) {
--			printf("error: test %s has no run function!\n",
--			       cur_test->desc);
--			continue;
--		}
--		if (setup_test(cur_test) != 0) {
--			printf("error: setup failed for test %s\n",
--			       cur_test->desc);
--			continue;
--		}
--		result = cur_test->run(cur_test);
--		if (result == TEST_PASSED)
--			*pass_count += 1;
--		else
--			*fail_count += 1;
--		display_result(cur_test, result);
--		if (cleanup_test(cur_test) != 0) {
--			printf("error: cleanup failed for test %s\n",
--			       cur_test->desc);
--			continue;
--		}
--	}
--}
--
--int main(void)
--{
--	int pass_count, fail_count;
--	time_t cur_time;
--	char buf[32];
--
--	time(&cur_time);
--	printf("BGP Multipath Tests Run at %s", ctime_r(&cur_time, buf));
--	if (global_test_init() != 0) {
--		printf("Global init failed. Terminating.\n");
--		exit(1);
--	}
--	run_tests(all_tests, all_tests_count, &pass_count, &fail_count);
--	global_test_cleanup();
--	printf("Total pass/fail: %d/%d\n", pass_count, fail_count);
--	return fail_count;
--}
-diff --git a/tests/bgpd/test_mpath.py b/tests/bgpd/test_mpath.py
-deleted file mode 100644
-index 582fd25c20..0000000000
---- a/tests/bgpd/test_mpath.py
-+++ /dev/null
-@@ -1,10 +0,0 @@
--import frrtest
--
--
--class TestMpath(frrtest.TestMultiOut):
--    program = "./test_mpath"
--
--
--TestMpath.okfail("bgp maximum-paths config")
--TestMpath.okfail("bgp_mp_list")
--TestMpath.okfail("bgp_path_info_mpath_update")
--- 
-2.43.2
-
-
-From 6436c4f55ceb2900d8da52411b300338b36125c1 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Tue, 1 Oct 2024 09:18:44 -0400
-Subject: [PATCH 5/5] bgpd: Remove bgp_path_info_mpath_dequeue
-
-This function is no doing any work.  Let's remove.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_mpath.c | 13 -------------
- bgpd/bgp_mpath.h |  1 -
- bgpd/bgp_route.c |  4 ----
- 3 files changed, 18 deletions(-)
-
-diff --git a/bgpd/bgp_mpath.c b/bgpd/bgp_mpath.c
-index 27c179380d..b2e0371052 100644
---- a/bgpd/bgp_mpath.c
-+++ b/bgpd/bgp_mpath.c
-@@ -242,19 +242,6 @@ bgp_path_info_mpath_get(struct bgp_path_info *path)
- 	return path->mpath;
- }
- 
--/*
-- * bgp_path_info_mpath_dequeue
-- *
-- * Remove a path from the multipath list
-- */
--void bgp_path_info_mpath_dequeue(struct bgp_path_info *path)
--{
--	struct bgp_path_info_mpath *mpath = path->mpath;
--
--	if (!mpath)
--		return;
--}
--
- /*
-  * bgp_path_info_mpath_next
-  *
-diff --git a/bgpd/bgp_mpath.h b/bgpd/bgp_mpath.h
-index a7107deb0e..8201896593 100644
---- a/bgpd/bgp_mpath.h
-+++ b/bgpd/bgp_mpath.h
-@@ -56,7 +56,6 @@ bgp_path_info_mpath_aggregate_update(struct bgp_path_info *new_best,
- 				     struct bgp_path_info *old_best);
- 
- /* Unlink and free multipath information associated with a bgp_path_info */
--extern void bgp_path_info_mpath_dequeue(struct bgp_path_info *path);
- extern void bgp_path_info_mpath_free(struct bgp_path_info_mpath **mpath);
- 
- /* Walk list of multipaths associated with a best path */
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index 12cbf66341..774ff068f8 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -502,8 +502,6 @@ struct bgp_dest *bgp_path_info_reap(struct bgp_dest *dest,
- 	else
- 		bgp_dest_set_bgp_path_info(dest, pi->next);
- 
--	bgp_path_info_mpath_dequeue(pi);
--
- 	pi->next = NULL;
- 	pi->prev = NULL;
- 
-@@ -516,8 +514,6 @@ struct bgp_dest *bgp_path_info_reap(struct bgp_dest *dest,
- static struct bgp_dest *bgp_path_info_reap_unsorted(struct bgp_dest *dest,
- 						    struct bgp_path_info *pi)
- {
--	bgp_path_info_mpath_dequeue(pi);
--
- 	pi->next = NULL;
- 	pi->prev = NULL;
- 
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0076-Optimizations-and-problem-fixing-for-large-scale-ecmp-from-bgp.patch b/src/sonic-frr/patch/0076-Optimizations-and-problem-fixing-for-large-scale-ecmp-from-bgp.patch
deleted file mode 100644
index fc885183034..00000000000
--- a/src/sonic-frr/patch/0076-Optimizations-and-problem-fixing-for-large-scale-ecmp-from-bgp.patch
+++ /dev/null
@@ -1,577 +0,0 @@
-From a2d0c451c30e80754978854f316e5291c0812e75 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 23 Oct 2024 13:16:29 -0400
-Subject: [PATCH 1/5] bgpd: Do not call evpn_overlay_free no matter what
-
-bgp_update is a very expensive call.  Calling evpn_overlay_free
-even when we have no evpn data to free is not trivial.  Let's
-limit the call into this function until we actually have data to
-free.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_route.c | 15 +++++++++------
- 1 file changed, 9 insertions(+), 6 deletions(-)
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index 774ff068f8..55e0a7bc2c 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -4542,9 +4542,10 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
- 		 * will not be interned. In which case, it is ok to update the
- 		 * attr->evpn_overlay, so that, this can be stored in adj_in.
- 		 */
--		if ((afi == AFI_L2VPN) && evpn) {
--			memcpy(&attr->evpn_overlay, evpn,
--			       sizeof(struct bgp_route_evpn));
-+		if (evpn) {
-+			if (afi == AFI_L2VPN)
-+				memcpy(&attr->evpn_overlay, evpn,
-+				       sizeof(struct bgp_route_evpn));
- 		}
- 		bgp_adj_in_set(dest, peer, attr, addpath_id);
- 	}
-@@ -4706,9 +4707,11 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
- 	 * attr->evpn_overlay with evpn directly. Instead memcpy
- 	 * evpn to new_atr.evpn_overlay before it is interned.
- 	 */
--	if (soft_reconfig && (afi == AFI_L2VPN) && evpn)
--		memcpy(&new_attr.evpn_overlay, evpn,
--		       sizeof(struct bgp_route_evpn));
-+	if (soft_reconfig && evpn) {
-+		if (afi == AFI_L2VPN)
-+			memcpy(&new_attr.evpn_overlay, evpn,
-+			       sizeof(struct bgp_route_evpn));
-+	}
- 
- 	/* Apply incoming route-map.
- 	 * NB: new_attr may now contain newly allocated values from route-map
--- 
-2.43.2
-
-
-From 1fb6e42a69b92e7a9f7ee338389f4941a624b98b Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 24 Oct 2024 11:27:24 -0400
-Subject: [PATCH 2/5] bgpd: Store aspath count after aspath has changed
-
-When running bestpath on a very large number of ecmp.
-BGP ends up calling aspath_count a very very large number
-of times, which results in ~15% cpu runtime in aspath_count_hops.
-Modify the aspath to keep track of it's own count.  This results
-in the function now taking up ~1.5% of the cpu runtime.  Enough
-for the moment to be ignored.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_aspath.c | 37 +++++++++++++++++++++++++++++++++++--
- bgpd/bgp_aspath.h |  1 +
- 2 files changed, 36 insertions(+), 2 deletions(-)
-
-diff --git a/bgpd/bgp_aspath.c b/bgpd/bgp_aspath.c
-index bc7e8939b4..9241231382 100644
---- a/bgpd/bgp_aspath.c
-+++ b/bgpd/bgp_aspath.c
-@@ -294,6 +294,8 @@ static struct aspath *aspath_new(enum asnotation_mode asnotation)
- 
- 	as = XCALLOC(MTYPE_AS_PATH, sizeof(struct aspath));
- 	as->asnotation = asnotation;
-+	as->count = 0;
-+
- 	return as;
- }
- 
-@@ -396,6 +398,11 @@ unsigned int aspath_count_confeds(struct aspath *aspath)
- }
- 
- unsigned int aspath_count_hops(const struct aspath *aspath)
-+{
-+	return aspath->count;
-+}
-+
-+static unsigned int aspath_count_hops_internal(const struct aspath *aspath)
- {
- 	int count = 0;
- 	struct assegment *seg = aspath->segments;
-@@ -705,6 +712,7 @@ struct aspath *aspath_dup(struct aspath *aspath)
- 	else
- 		new->str[0] = '\0';
- 
-+	new->count = aspath->count;
- 	return new;
- }
- 
-@@ -726,6 +734,7 @@ static void *aspath_hash_alloc(void *arg)
- 	new->str_len = aspath->str_len;
- 	new->json = aspath->json;
- 	new->asnotation = aspath->asnotation;
-+	new->count = aspath->count;
- 
- 	return new;
- }
-@@ -853,6 +862,8 @@ struct aspath *aspath_parse(struct stream *s, size_t length, int use32bit,
- 	if (assegments_parse(s, length, &as.segments, use32bit) < 0)
- 		return NULL;
- 
-+	as.count = aspath_count_hops_internal(&as);
-+
- 	/* If already same aspath exist then return it. */
- 	find = hash_get(ashash, &as, aspath_hash_alloc);
- 
-@@ -1029,7 +1040,7 @@ static struct assegment *aspath_aggregate_as_set_add(struct aspath *aspath,
- 		asset->as[asset->length - 1] = as;
- 	}
- 
--
-+	aspath->count = aspath_count_hops_internal(aspath);
- 	return asset;
- }
- 
-@@ -1110,6 +1121,8 @@ struct aspath *aspath_aggregate(struct aspath *as1, struct aspath *as2)
- 
- 	assegment_normalise(aspath->segments);
- 	aspath_str_update(aspath, false);
-+	aspath->count = aspath_count_hops_internal(aspath);
-+
- 	return aspath;
- }
- 
-@@ -1265,6 +1278,7 @@ struct aspath *aspath_replace_regex_asn(struct aspath *aspath,
- 	}
- 
- 	aspath_str_update(new, false);
-+	new->count = aspath_count_hops_internal(new);
- 	return new;
- }
- 
-@@ -1290,6 +1304,8 @@ struct aspath *aspath_replace_specific_asn(struct aspath *aspath,
- 	}
- 
- 	aspath_str_update(new, false);
-+	new->count = aspath_count_hops_internal(new);
-+
- 	return new;
- }
- 
-@@ -1312,6 +1328,8 @@ struct aspath *aspath_replace_all_asn(struct aspath *aspath, as_t our_asn)
- 	}
- 
- 	aspath_str_update(new, false);
-+	new->count = aspath_count_hops_internal(new);
-+
- 	return new;
- }
- 
-@@ -1338,6 +1356,8 @@ struct aspath *aspath_replace_private_asns(struct aspath *aspath, as_t asn,
- 	}
- 
- 	aspath_str_update(new, false);
-+	new->count = aspath_count_hops_internal(new);
-+
- 	return new;
- }
- 
-@@ -1410,6 +1430,7 @@ struct aspath *aspath_remove_private_asns(struct aspath *aspath, as_t peer_asn)
- 	if (!aspath->refcnt)
- 		aspath_free(aspath);
- 	aspath_str_update(new, false);
-+	new->count = aspath_count_hops_internal(new);
- 	return new;
- }
- 
-@@ -1466,6 +1487,7 @@ static struct aspath *aspath_merge(struct aspath *as1, struct aspath *as2)
- 		last->next = as2->segments;
- 	as2->segments = new;
- 	aspath_str_update(as2, false);
-+	as2->count = aspath_count_hops_internal(as2);
- 	return as2;
- }
- 
-@@ -1483,6 +1505,7 @@ struct aspath *aspath_prepend(struct aspath *as1, struct aspath *as2)
- 	if (as2->segments == NULL) {
- 		as2->segments = assegment_dup_all(as1->segments);
- 		aspath_str_update(as2, false);
-+		as2->count = aspath_count_hops_internal(as2);
- 		return as2;
- 	}
- 
-@@ -1503,6 +1526,7 @@ struct aspath *aspath_prepend(struct aspath *as1, struct aspath *as2)
- 	if (!as2->segments) {
- 		as2->segments = assegment_dup_all(as1->segments);
- 		aspath_str_update(as2, false);
-+		as2->count = aspath_count_hops_internal(as2);
- 		return as2;
- 	}
- 
-@@ -1548,6 +1572,7 @@ struct aspath *aspath_prepend(struct aspath *as1, struct aspath *as2)
- 		 * the inbetween AS_SEQUENCE of seg2 in the process
- 		 */
- 		aspath_str_update(as2, false);
-+		as2->count = aspath_count_hops_internal(as2);
- 		return as2;
- 	} else {
- 		/* AS_SET merge code is needed at here. */
-@@ -1627,6 +1652,7 @@ struct aspath *aspath_filter_exclude(struct aspath *source,
- 		lastseg = newseg;
- 	}
- 	aspath_str_update(newpath, false);
-+	newpath->count = aspath_count_hops_internal(newpath);
- 	/* We are happy returning even an empty AS_PATH, because the
- 	 * administrator
- 	 * might expect this very behaviour. There's a mean to avoid this, if
-@@ -1645,6 +1671,7 @@ struct aspath *aspath_filter_exclude_all(struct aspath *source)
- 	newpath = aspath_new(source->asnotation);
- 
- 	aspath_str_update(newpath, false);
-+	newpath->count = aspath_count_hops_internal(newpath);
- 	/* We are happy returning even an empty AS_PATH, because the
- 	 * administrator
- 	 * might expect this very behaviour. There's a mean to avoid this, if
-@@ -1732,6 +1759,7 @@ struct aspath *aspath_filter_exclude_acl(struct aspath *source,
- 
- 
- 	aspath_str_update(source, false);
-+	source->count = aspath_count_hops_internal(source);
- 	/* We are happy returning even an empty AS_PATH, because the
- 	 * administrator
- 	 * might expect this very behaviour. There's a mean to avoid this, if
-@@ -1770,6 +1798,7 @@ static struct aspath *aspath_add_asns(struct aspath *aspath, as_t asno,
- 	}
- 
- 	aspath_str_update(aspath, false);
-+	aspath->count = aspath_count_hops_internal(aspath);
- 	return aspath;
- }
- 
-@@ -1861,6 +1890,7 @@ struct aspath *aspath_reconcile_as4(struct aspath *aspath,
- 	if (!hops) {
- 		newpath = aspath_dup(as4path);
- 		aspath_str_update(newpath, false);
-+		/* dup sets the count properly */
- 		return newpath;
- 	}
- 
-@@ -1922,6 +1952,7 @@ struct aspath *aspath_reconcile_as4(struct aspath *aspath,
- 	aspath_free(newpath);
- 	mergedpath->segments = assegment_normalise(mergedpath->segments);
- 	aspath_str_update(mergedpath, false);
-+	mergedpath->count = aspath_count_hops_internal(mergedpath);
- 
- 	if (BGP_DEBUG(as4, AS4))
- 		zlog_debug("[AS4] result of synthesizing is %s",
-@@ -1992,8 +2023,10 @@ struct aspath *aspath_delete_confed_seq(struct aspath *aspath)
- 		seg = next;
- 	}
- 
--	if (removed_confed_segment)
-+	if (removed_confed_segment) {
- 		aspath_str_update(aspath, false);
-+		aspath->count = aspath_count_hops_internal(aspath);
-+	}
- 
- 	return aspath;
- }
-diff --git a/bgpd/bgp_aspath.h b/bgpd/bgp_aspath.h
-index 2a831c3a55..8a7a734e6a 100644
---- a/bgpd/bgp_aspath.h
-+++ b/bgpd/bgp_aspath.h
-@@ -58,6 +58,7 @@ struct aspath {
- 	   and AS path regular expression match.  */
- 	char *str;
- 	unsigned short str_len;
-+	uint32_t count;
- 
- 	/* AS notation used by string expression of AS path */
- 	enum asnotation_mode asnotation;
--- 
-2.43.2
-
-
-From f41a92c74a0e10defdb5bd739b6596799e43f83c Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 24 Oct 2024 11:40:56 -0400
-Subject: [PATCH 3/5] bgpd: Only grab the confed path count if we are comparing
- it
-
-This is just a small optimization but when calling path_info_cmp
-hundreds of millions of times this adds up.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_route.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index 55e0a7bc2c..7c596f02a7 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -1096,9 +1096,9 @@ int bgp_path_info_cmp(struct bgp *bgp, struct bgp_path_info *new,
- 	/* 4. AS path length check. */
- 	if (!CHECK_FLAG(bgp->flags, BGP_FLAG_ASPATH_IGNORE)) {
- 		int exist_hops = aspath_count_hops(existattr->aspath);
--		int exist_confeds = aspath_count_confeds(existattr->aspath);
- 
- 		if (CHECK_FLAG(bgp->flags, BGP_FLAG_ASPATH_CONFED)) {
-+			int exist_confeds = aspath_count_confeds(existattr->aspath);
- 			int aspath_hops;
- 
- 			aspath_hops = aspath_count_hops(newattr->aspath);
--- 
-2.43.2
-
-
-From 3c74e1d0dec60abfc8032c7edbebe4dc84e23a24 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 24 Oct 2024 14:17:51 -0400
-Subject: [PATCH 4/5] bgpd: Fix deadlock in bgp_keepalive and master pthreads
-
-(gdb) bt
-0  futex_wait (private=0, expected=2, futex_word=0x5c438e9a98d8) at ../sysdeps/nptl/futex-internal.h:146
-1  __GI___lll_lock_wait (futex=futex@entry=0x5c438e9a98d8, private=0) at ./nptl/lowlevellock.c:49
-2  0x00007af16d698002 in lll_mutex_lock_optimized (mutex=0x5c438e9a98d8) at ./nptl/pthread_mutex_lock.c:48
-3  ___pthread_mutex_lock (mutex=0x5c438e9a98d8) at ./nptl/pthread_mutex_lock.c:93
-4  0x00005c4369c17e70 in _frr_mtx_lock (mutex=0x5c438e9a98d8, func=0x5c4369dc2750 <__func__.265> "bgp_notify_send_internal") at ./lib/frr_pthread.h:258
-5  0x00005c4369c1a07a in bgp_notify_send_internal (connection=0x5c438e9a98c0, code=8 '\b', sub_code=0 '\000', data=0x0, datalen=0, use_curr=true) at bgpd/bgp_packet.c:928
-6  0x00005c4369c1a707 in bgp_notify_send (connection=0x5c438e9a98c0, code=8 '\b', sub_code=0 '\000') at bgpd/bgp_packet.c:1069
-7  0x00005c4369bea422 in bgp_stop_with_notify (connection=0x5c438e9a98c0, code=8 '\b', sub_code=0 '\000') at bgpd/bgp_fsm.c:1597
-8  0x00005c4369c18480 in bgp_packet_add (connection=0x5c438e9a98c0, peer=0x5c438e9b6010, s=0x7af15c06bf70) at bgpd/bgp_packet.c:151
-9  0x00005c4369c19816 in bgp_keepalive_send (peer=0x5c438e9b6010) at bgpd/bgp_packet.c:639
-10 0x00005c4369bf01fd in peer_process (hb=0x5c438ed05520, arg=0x7af16bdffaf0) at bgpd/bgp_keepalives.c:111
-11 0x00007af16dacd8e6 in hash_iterate (hash=0x7af15c000be0, func=0x5c4369bf005e <peer_process>, arg=0x7af16bdffaf0) at lib/hash.c:252
-12 0x00005c4369bf0679 in bgp_keepalives_start (arg=0x5c438e0db110) at bgpd/bgp_keepalives.c:214
-13 0x00007af16dac9932 in frr_pthread_inner (arg=0x5c438e0db110) at lib/frr_pthread.c:180
-14 0x00007af16d694ac3 in start_thread (arg=<optimized out>) at ./nptl/pthread_create.c:442
-15 0x00007af16d726850 in clone3 () at ../sysdeps/unix/sysv/linux/x86_64/clone3.S:81
-(gdb)
-
-The bgp keepalive pthread gets deadlocked with itself and consequently
-the bgp master pthread gets locked when it attempts to lock
-the peerhash_mtx, since it is also locked by the keepalive_pthread
-
-The keepalive pthread is locking the peerhash_mtx in
-bgp_keepalives_start.  Next the connection->io_mtx mutex in
-bgp_keepalives_send is locked and then when it notices a problem it invokes
-bgp_stop_with_notify which relocks the same mutex ( and of course
-the relock causes it to get stuck on itself ).  This generates a
-deadlock condition.
-
-Modify the code to only hold the connection->io_mtx as short as
-possible.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_packet.c | 60 +++++++++++++++++++++++------------------------
- 1 file changed, 29 insertions(+), 31 deletions(-)
-
-diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c
-index 1f808eea72..effe20ab92 100644
---- a/bgpd/bgp_packet.c
-+++ b/bgpd/bgp_packet.c
-@@ -122,41 +122,39 @@ static void bgp_packet_add(struct peer_connection *connection,
- 			peer->last_sendq_ok = monotime(NULL);
- 
- 		stream_fifo_push(connection->obuf, s);
-+	}
- 
--		delta = monotime(NULL) - peer->last_sendq_ok;
-+	delta = monotime(NULL) - peer->last_sendq_ok;
- 
--		if (CHECK_FLAG(peer->flags, PEER_FLAG_TIMER))
--			holdtime = atomic_load_explicit(&peer->holdtime,
--							memory_order_relaxed);
--		else
--			holdtime = peer->bgp->default_holdtime;
-+	if (CHECK_FLAG(peer->flags, PEER_FLAG_TIMER))
-+		holdtime = atomic_load_explicit(&peer->holdtime,
-+						memory_order_relaxed);
-+	else
-+		holdtime = peer->bgp->default_holdtime;
- 
--		sendholdtime = holdtime * 2;
-+	sendholdtime = holdtime * 2;
- 
--		/* Note that when we're here, we're adding some packet to the
--		 * OutQ.  That includes keepalives when there is nothing to
--		 * do, so there's a guarantee we pass by here once in a while.
--		 *
--		 * That implies there is no need to go set up another separate
--		 * timer that ticks down SendHoldTime, as we'll be here sooner
--		 * or later anyway and will see the checks below failing.
--		 */
--		if (!holdtime) {
--			/* no holdtime, do nothing. */
--		} else if (delta > sendholdtime) {
--			flog_err(
--				EC_BGP_SENDQ_STUCK_PROPER,
--				"%pBP has not made any SendQ progress for 2 holdtimes (%jds), terminating session",
--				peer, sendholdtime);
--			BGP_EVENT_ADD(connection, TCP_fatal_error);
--		} else if (delta > (intmax_t)holdtime &&
--			   monotime(NULL) - peer->last_sendq_warn > 5) {
--			flog_warn(
--				EC_BGP_SENDQ_STUCK_WARN,
--				"%pBP has not made any SendQ progress for 1 holdtime (%us), peer overloaded?",
--				peer, holdtime);
--			peer->last_sendq_warn = monotime(NULL);
--		}
-+	/* Note that when we're here, we're adding some packet to the
-+	 * OutQ.  That includes keepalives when there is nothing to
-+	 * do, so there's a guarantee we pass by here once in a while.
-+	 *
-+	 * That implies there is no need to go set up another separate
-+	 * timer that ticks down SendHoldTime, as we'll be here sooner
-+	 * or later anyway and will see the checks below failing.
-+	 */
-+	if (!holdtime) {
-+		/* no holdtime, do nothing. */
-+	} else if (delta > sendholdtime) {
-+		flog_err(EC_BGP_SENDQ_STUCK_PROPER,
-+			 "%pBP has not made any SendQ progress for 2 holdtimes (%jds), terminating session",
-+			 peer, sendholdtime);
-+		BGP_EVENT_ADD(connection, TCP_fatal_error);
-+	} else if (delta > (intmax_t)holdtime &&
-+		   monotime(NULL) - peer->last_sendq_warn > 5) {
-+		flog_warn(EC_BGP_SENDQ_STUCK_WARN,
-+			  "%pBP has not made any SendQ progress for 1 holdtime (%us), peer overloaded?",
-+			  peer, holdtime);
-+		peer->last_sendq_warn = monotime(NULL);
- 	}
- }
- 
--- 
-2.43.2
-
-
-From 2cf93b11d29475d0a7f0a0ee0759129669aa03ba Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 24 Oct 2024 17:44:31 -0400
-Subject: [PATCH 5/5] bgpd: Fix wrong pthread event cancelling
-
-0  __pthread_kill_implementation (no_tid=0, signo=6, threadid=130719886083648) at ./nptl/pthread_kill.c:44
-1  __pthread_kill_internal (signo=6, threadid=130719886083648) at ./nptl/pthread_kill.c:78
-2  __GI___pthread_kill (threadid=130719886083648, signo=signo@entry=6) at ./nptl/pthread_kill.c:89
-3  0x000076e399e42476 in __GI_raise (sig=6) at ../sysdeps/posix/raise.c:26
-4  0x000076e39a34f950 in core_handler (signo=6, siginfo=0x76e3985fca30, context=0x76e3985fc900) at lib/sigevent.c:258
-5  <signal handler called>
-6  __pthread_kill_implementation (no_tid=0, signo=6, threadid=130719886083648) at ./nptl/pthread_kill.c:44
-7  __pthread_kill_internal (signo=6, threadid=130719886083648) at ./nptl/pthread_kill.c:78
-8  __GI___pthread_kill (threadid=130719886083648, signo=signo@entry=6) at ./nptl/pthread_kill.c:89
-9  0x000076e399e42476 in __GI_raise (sig=sig@entry=6) at ../sysdeps/posix/raise.c:26
-10 0x000076e399e287f3 in __GI_abort () at ./stdlib/abort.c:79
-11 0x000076e39a39874b in _zlog_assert_failed (xref=0x76e39a46cca0 <_xref.27>, extra=0x0) at lib/zlog.c:789
-12 0x000076e39a369dde in cancel_event_helper (m=0x5eda32df5e40, arg=0x5eda33afeed0, flags=1) at lib/event.c:1428
-13 0x000076e39a369ef6 in event_cancel_event_ready (m=0x5eda32df5e40, arg=0x5eda33afeed0) at lib/event.c:1470
-14 0x00005eda0a94a5b3 in bgp_stop (connection=0x5eda33afeed0) at bgpd/bgp_fsm.c:1355
-15 0x00005eda0a94b4ae in bgp_stop_with_notify (connection=0x5eda33afeed0, code=8 '\b', sub_code=0 '\000') at bgpd/bgp_fsm.c:1610
-16 0x00005eda0a979498 in bgp_packet_add (connection=0x5eda33afeed0, peer=0x5eda33b11800, s=0x76e3880daf90) at bgpd/bgp_packet.c:152
-17 0x00005eda0a97a80f in bgp_keepalive_send (peer=0x5eda33b11800) at bgpd/bgp_packet.c:639
-18 0x00005eda0a9511fd in peer_process (hb=0x5eda33c9ab80, arg=0x76e3985ffaf0) at bgpd/bgp_keepalives.c:111
-19 0x000076e39a2cd8e6 in hash_iterate (hash=0x76e388000be0, func=0x5eda0a95105e <peer_process>, arg=0x76e3985ffaf0) at lib/hash.c:252
-20 0x00005eda0a951679 in bgp_keepalives_start (arg=0x5eda3306af80) at bgpd/bgp_keepalives.c:214
-21 0x000076e39a2c9932 in frr_pthread_inner (arg=0x5eda3306af80) at lib/frr_pthread.c:180
-22 0x000076e399e94ac3 in start_thread (arg=<optimized out>) at ./nptl/pthread_create.c:442
-23 0x000076e399f26850 in clone3 () at ../sysdeps/unix/sysv/linux/x86_64/clone3.S:81
-(gdb) f 12
-12 0x000076e39a369dde in cancel_event_helper (m=0x5eda32df5e40, arg=0x5eda33afeed0, flags=1) at lib/event.c:1428
-1428		assert(m->owner == pthread_self());
-
-In this decode the attempt to cancel the connection's events from
-the wrong thread is causing the crash.  Modify the code to create an
-event on the bm->master to cancel the events for the connection.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_fsm.c         | 10 ++++++++++
- bgpd/bgp_fsm.h         |  1 +
- bgpd/bgp_packet.c      |  3 ++-
- bgpd/bgpd.h            |  2 ++
- zebra/kernel_netlink.c |  2 +-
- 5 files changed, 16 insertions(+), 2 deletions(-)
-
-diff --git a/bgpd/bgp_fsm.c b/bgpd/bgp_fsm.c
-index f58ab7c027..650301163d 100644
---- a/bgpd/bgp_fsm.c
-+++ b/bgpd/bgp_fsm.c
-@@ -178,6 +178,7 @@ static struct peer *peer_xfer_conn(struct peer *from_peer)
- 	EVENT_OFF(going_away->t_delayopen);
- 	EVENT_OFF(going_away->t_connect_check_r);
- 	EVENT_OFF(going_away->t_connect_check_w);
-+	EVENT_OFF(going_away->t_stop_with_notify);
- 	EVENT_OFF(keeper->t_routeadv);
- 	EVENT_OFF(keeper->t_connect);
- 	EVENT_OFF(keeper->t_delayopen);
-@@ -1472,6 +1473,8 @@ enum bgp_fsm_state_progress bgp_stop(struct peer_connection *connection)
- 	EVENT_OFF(connection->t_connect_check_r);
- 	EVENT_OFF(connection->t_connect_check_w);
- 
-+	EVENT_OFF(connection->t_stop_with_notify);
-+
- 	/* Stop all timers. */
- 	EVENT_OFF(connection->t_start);
- 	EVENT_OFF(connection->t_connect);
-@@ -3143,3 +3146,10 @@ void bgp_peer_gr_flags_update(struct peer *peer)
- 		}
- 	}
- }
-+
-+void bgp_event_stop_with_notify(struct event *event)
-+{
-+	struct peer_connection *connection = EVENT_ARG(event);
-+
-+	bgp_stop_with_notify(connection, BGP_NOTIFY_HOLD_ERR, 0);
-+}
-diff --git a/bgpd/bgp_fsm.h b/bgpd/bgp_fsm.h
-index 2e96ac4c10..4e76262909 100644
---- a/bgpd/bgp_fsm.h
-+++ b/bgpd/bgp_fsm.h
-@@ -109,6 +109,7 @@ enum bgp_fsm_state_progress {
- extern void bgp_fsm_nht_update(struct peer_connection *connection,
- 			       struct peer *peer, bool has_valid_nexthops);
- extern void bgp_event(struct event *event);
-+extern void bgp_event_stop_with_notify(struct event *event);
- extern int bgp_event_update(struct peer_connection *connection,
- 			    enum bgp_fsm_events event);
- extern enum bgp_fsm_state_progress bgp_stop(struct peer_connection *connection);
-diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c
-index effe20ab92..2e682c7733 100644
---- a/bgpd/bgp_packet.c
-+++ b/bgpd/bgp_packet.c
-@@ -148,7 +148,8 @@ static void bgp_packet_add(struct peer_connection *connection,
- 		flog_err(EC_BGP_SENDQ_STUCK_PROPER,
- 			 "%pBP has not made any SendQ progress for 2 holdtimes (%jds), terminating session",
- 			 peer, sendholdtime);
--		BGP_EVENT_ADD(connection, TCP_fatal_error);
-+		event_add_event(bm->master, bgp_event_stop_with_notify,
-+				connection, 0, &connection->t_stop_with_notify);
- 	} else if (delta > (intmax_t)holdtime &&
- 		   monotime(NULL) - peer->last_sendq_warn > 5) {
- 		flog_warn(EC_BGP_SENDQ_STUCK_WARN,
-diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
-index 057e26a83d..1da1a17e8b 100644
---- a/bgpd/bgpd.h
-+++ b/bgpd/bgpd.h
-@@ -1189,6 +1189,8 @@ struct peer_connection {
- 	struct event *t_process_packet;
- 	struct event *t_process_packet_error;
- 
-+	struct event *t_stop_with_notify;
-+
- 	union sockunion su;
- #define BGP_CONNECTION_SU_UNSPEC(connection)                                   \
- 	(connection->su.sa.sa_family == AF_UNSPEC)
-diff --git a/zebra/kernel_netlink.c b/zebra/kernel_netlink.c
-index 8a64a1ea48..cdfb90e0f8 100644
---- a/zebra/kernel_netlink.c
-+++ b/zebra/kernel_netlink.c
-@@ -931,7 +931,7 @@ static int netlink_recv_msg(struct nlsock *nl, struct msghdr *msg)
- 	} while (status == -1 && errno == EINTR);
- 
- 	if (status == -1) {
--		if (errno == EWOULDBLOCK || errno == EAGAIN)
-+		if (errno == EWOULDBLOCK || errno == EAGAIN || errno == EMSGSIZE)
- 			return 0;
- 		flog_err(EC_ZEBRA_RECVMSG_OVERRUN, "%s recvmsg overrun: %s",
- 			 nl->name, safe_strerror(errno));
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0077-frr-vtysh-dependencies-for-srv6-static-patches.patch b/src/sonic-frr/patch/0077-frr-vtysh-dependencies-for-srv6-static-patches.patch
deleted file mode 100644
index 47d13e7a178..00000000000
--- a/src/sonic-frr/patch/0077-frr-vtysh-dependencies-for-srv6-static-patches.patch
+++ /dev/null
@@ -1,5712 +0,0 @@
-From fd8edc3dfbd41ff1ba8c21ea258276f3dab71e4b Mon Sep 17 00:00:00 2001
-From: Nathan Bahr <nbahr@atcorp.com>
-Date: Wed, 12 Jun 2024 16:26:48 +0000
-Subject: [PATCH] pimd, lib, vtysh: Added new 'router pim[6] [vrf NAME]' config
- node
-
-Moved all existing global/vrf PIM config to the new subnode.
-Existing configuration updated to be hidden and deprecated.
-Both versions of configuration still work together.
-
-Signed-off-by: Nathan Bahr <nbahr@atcorp.com>
----
- lib/command.h         |    2 +
- pimd/pim6_cmd.c       | 1127 ++++++++++++++--
- pimd/pim_addr.h       |    2 +
- pimd/pim_cmd.c        | 2845 +++++++++++++++++++++++++++++++++--------
- pimd/pim_cmd_common.c |  188 +--
- pimd/pim_cmd_common.h |    2 +
- pimd/pim_instance.c   |   21 +-
- pimd/pim_msdp.c       |   18 +-
- pimd/pim_msdp.h       |   11 +-
- pimd/pim_nb.h         |    4 -
- pimd/pim_rp.c         |   13 +-
- pimd/pim_rp.h         |    3 +-
- pimd/pim_vty.c        |   68 +-
- vtysh/vtysh.c         |   89 ++
- vtysh/vtysh_config.c  |    5 +
- 15 files changed, 3523 insertions(+), 875 deletions(-)
-
-diff --git a/lib/command.h b/lib/command.h
-index 6f819c7e3693..57e3b9cda0b7 100644
---- a/lib/command.h
-+++ b/lib/command.h
-@@ -182,6 +182,8 @@ enum node_type {
- 	ISIS_SRV6_NODE_MSD_NODE,    /* ISIS SRv6 Node MSDs node */
- 	MGMTD_NODE,		 /* MGMTD node. */
- 	RPKI_VRF_NODE,  /* RPKI node for VRF */
-+	PIM_NODE,		 /* PIM protocol mode */
-+	PIM6_NODE,		 /* PIM protocol for IPv6 mode */
- 	NODE_TYPE_MAX, /* maximum */
- };
- /* clang-format on */
-diff --git a/pimd/pim6_cmd.c b/pimd/pim6_cmd.c
-index ec912700d193..99f1474712b5 100644
---- a/pimd/pim6_cmd.c
-+++ b/pimd/pim6_cmd.c
-@@ -41,45 +41,207 @@ static struct cmd_node debug_node = {
- 	.config_write = pim_debug_config_write,
- };
- 
--DEFPY (ipv6_pim_joinprune_time,
--       ipv6_pim_joinprune_time_cmd,
--       "ipv6 pim join-prune-interval (1-65535)$jpi",
--       IPV6_STR
--       PIM_STR
-+DEFPY_NOSH (router_pim6,
-+            router_pim6_cmd,
-+            "router pim6 [vrf NAME]",
-+            "Enable a routing process\n"
-+            "Start PIM6 configuration\n"
-+            VRF_CMD_HELP_STR)
-+{
-+	char xpath[XPATH_MAXLEN];
-+	const char *vrf_name;
-+
-+	if (vrf)
-+		vrf_name = vrf;
-+	else
-+		vrf_name = VRF_DEFAULT_NAME;
-+
-+	snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim",
-+		 vrf_name, FRR_PIM_AF_XPATH_VAL);
-+	nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+	if (nb_cli_apply_changes_clear_pending(vty, NULL) != CMD_SUCCESS)
-+		return CMD_WARNING_CONFIG_FAILED;
-+
-+	VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY (no_router_pim6,
-+       no_router_pim6_cmd,
-+       "no router pim6 [vrf NAME]",
-+       NO_STR
-+       "Enable a routing process\n"
-+       "Start PIM6 configuration\n"
-+       VRF_CMD_HELP_STR)
-+{
-+	char xpath[XPATH_MAXLEN];
-+	const char *vrf_name;
-+
-+	if (vrf)
-+		vrf_name = vrf;
-+	else
-+		vrf_name = VRF_DEFAULT_NAME;
-+
-+	snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim",
-+		 vrf_name, FRR_PIM_AF_XPATH_VAL);
-+
-+	nb_cli_enqueue_change(vty, xpath, NB_OP_DESTROY, NULL);
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+
-+DEFPY (pim6_joinprune_time,
-+       pim6_joinprune_time_cmd,
-+       "join-prune-interval (1-65535)$jpi",
-        "Join Prune Send Interval\n"
-        "Seconds\n")
- {
- 	return pim_process_join_prune_cmd(vty, jpi_str);
- }
-+DEFPY_ATTR(ipv6_joinprune_time,
-+           ipv6_pim_joinprune_time_cmd,
-+           "ipv6 pim join-prune-interval (1-65535)$jpi",
-+           IPV6_STR PIM_STR
-+           "Join Prune Send Interval\n"
-+           "Seconds\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_join_prune_cmd(vty, jpi_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (no_ipv6_pim_joinprune_time,
--       no_ipv6_pim_joinprune_time_cmd,
--       "no ipv6 pim join-prune-interval [(1-65535)]",
-+DEFPY (no_pim6_joinprune_time,
-+       no_pim6_joinprune_time_cmd,
-+       "no join-prune-interval [(1-65535)]",
-        NO_STR
--       IPV6_STR
--       PIM_STR
-        "Join Prune Send Interval\n"
-        IGNORED_IN_NO_STR)
- {
- 	return pim_process_no_join_prune_cmd(vty);
- }
-+DEFPY_ATTR(no_ipv6_pim_joinprune_time,
-+           no_ipv6_pim_joinprune_time_cmd,
-+           "no ipv6 pim join-prune-interval [(1-65535)]",
-+           NO_STR
-+           IPV6_STR
-+           PIM_STR
-+           "Join Prune Send Interval\n"
-+           IGNORED_IN_NO_STR,
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_join_prune_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (ipv6_pim_spt_switchover_infinity,
--       ipv6_pim_spt_switchover_infinity_cmd,
--       "ipv6 pim spt-switchover infinity-and-beyond",
--       IPV6_STR
--       PIM_STR
-+DEFPY (pim6_spt_switchover_infinity,
-+       pim6_spt_switchover_infinity_cmd,
-+       "spt-switchover infinity-and-beyond",
-        "SPT-Switchover\n"
-        "Never switch to SPT Tree\n")
- {
- 	return pim_process_spt_switchover_infinity_cmd(vty);
- }
-+DEFPY_ATTR(ipv6_spt_switchover_infinity,
-+           ipv6_pim_spt_switchover_infinity_cmd,
-+           "ipv6 pim spt-switchover infinity-and-beyond",
-+           IPV6_STR
-+           PIM_STR
-+           "SPT-Switchover\n"
-+           "Never switch to SPT Tree\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_spt_switchover_infinity_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (ipv6_pim_spt_switchover_infinity_plist,
--       ipv6_pim_spt_switchover_infinity_plist_cmd,
--       "ipv6 pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME$plist",
--       IPV6_STR
--       PIM_STR
-+DEFPY (pim6_spt_switchover_infinity_plist,
-+       pim6_spt_switchover_infinity_plist_cmd,
-+       "spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME$plist",
-        "SPT-Switchover\n"
-        "Never switch to SPT Tree\n"
-        "Prefix-List to control which groups to switch\n"
-@@ -87,25 +249,104 @@ DEFPY (ipv6_pim_spt_switchover_infinity_plist,
- {
- 	return pim_process_spt_switchover_prefixlist_cmd(vty, plist);
- }
-+DEFPY_ATTR(ipv6_spt_switchover_infinity_plist,
-+           ipv6_pim_spt_switchover_infinity_plist_cmd,
-+           "ipv6 pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME$plist",
-+           IPV6_STR
-+           PIM_STR
-+           "SPT-Switchover\n"
-+           "Never switch to SPT Tree\n"
-+           "Prefix-List to control which groups to switch\n"
-+           "Prefix-List name\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_spt_switchover_prefixlist_cmd(vty, plist);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (no_ipv6_pim_spt_switchover_infinity,
--       no_ipv6_pim_spt_switchover_infinity_cmd,
--       "no ipv6 pim spt-switchover infinity-and-beyond",
-+DEFPY (no_pim6_spt_switchover_infinity,
-+       no_pim6_spt_switchover_infinity_cmd,
-+       "no spt-switchover infinity-and-beyond",
-        NO_STR
--       IPV6_STR
--       PIM_STR
-        "SPT_Switchover\n"
-        "Never switch to SPT Tree\n")
- {
- 	return pim_process_no_spt_switchover_cmd(vty);
- }
-+DEFPY_ATTR(no_ipv6_pim_spt_switchover_infinity,
-+           no_ipv6_pim_spt_switchover_infinity_cmd,
-+           "no ipv6 pim spt-switchover infinity-and-beyond",
-+           NO_STR
-+           IPV6_STR
-+           PIM_STR
-+           "SPT_Switchover\n"
-+           "Never switch to SPT Tree\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_spt_switchover_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (no_ipv6_pim_spt_switchover_infinity_plist,
--       no_ipv6_pim_spt_switchover_infinity_plist_cmd,
--       "no ipv6 pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME",
-+DEFPY (no_pim6_spt_switchover_infinity_plist,
-+       no_pim6_spt_switchover_infinity_plist_cmd,
-+       "no spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME",
-        NO_STR
--       IPV6_STR
--       PIM_STR
-        "SPT_Switchover\n"
-        "Never switch to SPT Tree\n"
-        "Prefix-List to control which groups to switch\n"
-@@ -113,100 +354,453 @@ DEFPY (no_ipv6_pim_spt_switchover_infinity_plist,
- {
- 	return pim_process_no_spt_switchover_cmd(vty);
- }
-+DEFPY_ATTR(no_ipv6_pim_spt_switchover_infinity_plist,
-+           no_ipv6_pim_spt_switchover_infinity_plist_cmd,
-+           "no ipv6 pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST6_NAME",
-+           NO_STR
-+           IPV6_STR
-+           PIM_STR
-+           "SPT_Switchover\n"
-+           "Never switch to SPT Tree\n"
-+           "Prefix-List to control which groups to switch\n"
-+           "Prefix-List name\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_spt_switchover_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (ipv6_pim_packets,
--       ipv6_pim_packets_cmd,
--       "ipv6 pim packets (1-255)",
--       IPV6_STR
--       PIM_STR
-+DEFPY (pim6_packets,
-+       pim6_packets_cmd,
-+       "packets (1-255)",
-        "packets to process at one time per fd\n"
-        "Number of packets\n")
- {
- 	return pim_process_pim_packet_cmd(vty, packets_str);
- }
-+DEFPY_ATTR(ipv6_pim_packets,
-+           ipv6_pim_packets_cmd,
-+           "ipv6 pim packets (1-255)",
-+           IPV6_STR
-+           PIM_STR
-+           "packets to process at one time per fd\n"
-+           "Number of packets\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_pim_packet_cmd(vty, packets_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (no_ipv6_pim_packets,
--       no_ipv6_pim_packets_cmd,
--       "no ipv6 pim packets [(1-255)]",
-+DEFPY (no_pim6_packets,
-+       no_pim6_packets_cmd,
-+       "no packets [(1-255)]",
-        NO_STR
--       IPV6_STR
--       PIM_STR
-        "packets to process at one time per fd\n"
-        IGNORED_IN_NO_STR)
- {
- 	return pim_process_no_pim_packet_cmd(vty);
- }
-+DEFPY_ATTR(no_ipv6_pim_packets,
-+           no_ipv6_pim_packets_cmd,
-+           "no ipv6 pim packets [(1-255)]",
-+           NO_STR
-+           IPV6_STR
-+           PIM_STR
-+           "packets to process at one time per fd\n"
-+           IGNORED_IN_NO_STR,
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
--DEFPY (ipv6_pim_keep_alive,
--       ipv6_pim_keep_alive_cmd,
--       "ipv6 pim keep-alive-timer (1-65535)$kat",
--       IPV6_STR
--       PIM_STR
-+	ret = pim_process_no_pim_packet_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (pim6_keep_alive,
-+       pim6_keep_alive_cmd,
-+       "keep-alive-timer (1-65535)$kat",
-        "Keep alive Timer\n"
-        "Seconds\n")
- {
- 	return pim_process_keepalivetimer_cmd(vty, kat_str);
- }
-+DEFPY_ATTR(ipv6_pim_keep_alive,
-+           ipv6_pim_keep_alive_cmd,
-+           "ipv6 pim keep-alive-timer (1-65535)$kat",
-+           IPV6_STR
-+           PIM_STR
-+           "Keep alive Timer\n"
-+           "Seconds\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_keepalivetimer_cmd(vty, kat_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (no_ipv6_pim_keep_alive,
--       no_ipv6_pim_keep_alive_cmd,
--       "no ipv6 pim keep-alive-timer [(1-65535)]",
-+DEFPY (no_pim6_keep_alive,
-+       no_pim6_keep_alive_cmd,
-+       "no keep-alive-timer [(1-65535)]",
-        NO_STR
--       IPV6_STR
--       PIM_STR
-        "Keep alive Timer\n"
-        IGNORED_IN_NO_STR)
- {
- 	return pim_process_no_keepalivetimer_cmd(vty);
- }
-+DEFPY_ATTR(no_ipv6_pim_keep_alive,
-+           no_ipv6_pim_keep_alive_cmd,
-+           "no ipv6 pim keep-alive-timer [(1-65535)]",
-+           NO_STR
-+           IPV6_STR
-+           PIM_STR
-+           "Keep alive Timer\n"
-+           IGNORED_IN_NO_STR,
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_keepalivetimer_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (ipv6_pim_rp_keep_alive,
--       ipv6_pim_rp_keep_alive_cmd,
--       "ipv6 pim rp keep-alive-timer (1-65535)$kat",
--       IPV6_STR
--       PIM_STR
-+DEFPY (pim6_rp_keep_alive,
-+       pim6_rp_keep_alive_cmd,
-+       "rp keep-alive-timer (1-65535)$kat",
-        "Rendezvous Point\n"
-        "Keep alive Timer\n"
-        "Seconds\n")
- {
- 	return pim_process_rp_kat_cmd(vty, kat_str);
- }
-+DEFPY_ATTR(ipv6_pim_rp_keep_alive,
-+           ipv6_pim_rp_keep_alive_cmd,
-+           "ipv6 pim rp keep-alive-timer (1-65535)$kat",
-+           IPV6_STR
-+           PIM_STR
-+           "Rendezvous Point\n"
-+           "Keep alive Timer\n"
-+           "Seconds\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_rp_kat_cmd(vty, kat_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (no_ipv6_pim_rp_keep_alive,
--       no_ipv6_pim_rp_keep_alive_cmd,
--       "no ipv6 pim rp keep-alive-timer [(1-65535)]",
-+DEFPY (no_pim6_rp_keep_alive,
-+       no_pim6_rp_keep_alive_cmd,
-+       "no rp keep-alive-timer [(1-65535)]",
-        NO_STR
--       IPV6_STR
--       PIM_STR
-        "Rendezvous Point\n"
-        "Keep alive Timer\n"
-        IGNORED_IN_NO_STR)
- {
- 	return pim_process_no_rp_kat_cmd(vty);
- }
-+DEFPY_ATTR(no_ipv6_pim_rp_keep_alive,
-+           no_ipv6_pim_rp_keep_alive_cmd,
-+           "no ipv6 pim rp keep-alive-timer [(1-65535)]",
-+           NO_STR
-+           IPV6_STR
-+           PIM_STR
-+           "Rendezvous Point\n"
-+           "Keep alive Timer\n"
-+           IGNORED_IN_NO_STR,
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
--DEFPY (ipv6_pim_register_suppress,
--       ipv6_pim_register_suppress_cmd,
--       "ipv6 pim register-suppress-time (1-65535)$rst",
--       IPV6_STR
--       PIM_STR
-+	ret = pim_process_no_rp_kat_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (pim6_register_suppress,
-+       pim6_register_suppress_cmd,
-+       "register-suppress-time (1-65535)$rst",
-        "Register Suppress Timer\n"
-        "Seconds\n")
- {
- 	return pim_process_register_suppress_cmd(vty, rst_str);
- }
-+DEFPY_ATTR(ipv6_pim_register_suppress,
-+           ipv6_pim_register_suppress_cmd,
-+           "ipv6 pim register-suppress-time (1-65535)$rst",
-+           IPV6_STR
-+           PIM_STR
-+           "Register Suppress Timer\n"
-+           "Seconds\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_register_suppress_cmd(vty, rst_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (no_ipv6_pim_register_suppress,
--       no_ipv6_pim_register_suppress_cmd,
--       "no ipv6 pim register-suppress-time [(1-65535)]",
-+DEFPY (no_pim6_register_suppress,
-+       no_pim6_register_suppress_cmd,
-+       "no register-suppress-time [(1-65535)]",
-        NO_STR
--       IPV6_STR
--       PIM_STR
-        "Register Suppress Timer\n"
-        IGNORED_IN_NO_STR)
- {
- 	return pim_process_no_register_suppress_cmd(vty);
- }
-+DEFPY_ATTR(no_ipv6_pim_register_suppress,
-+           no_ipv6_pim_register_suppress_cmd,
-+           "no ipv6 pim register-suppress-time [(1-65535)]",
-+           NO_STR
-+           IPV6_STR
-+           PIM_STR
-+           "Register Suppress Timer\n"
-+           IGNORED_IN_NO_STR,
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_register_suppress_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
- DEFPY (interface_ipv6_pim,
-        interface_ipv6_pim_cmd,
-@@ -405,11 +999,9 @@ DEFPY (interface_no_ipv6_mroute,
- 					    source_str);
- }
- 
--DEFPY (ipv6_pim_rp,
--       ipv6_pim_rp_cmd,
--       "ipv6 pim rp X:X::X:X$rp [X:X::X:X/M]$gp",
--       IPV6_STR
--       PIM_STR
-+DEFPY (pim6_rp,
-+       pim6_rp_cmd,
-+       "rp X:X::X:X$rp [X:X::X:X/M]$gp",
-        "Rendezvous Point\n"
-        "ipv6 address of RP\n"
-        "Group Address range to cover\n")
-@@ -418,13 +1010,53 @@ DEFPY (ipv6_pim_rp,
- 
- 	return pim_process_rp_cmd(vty, rp_str, group_str);
- }
-+DEFPY_ATTR(ipv6_pim_rp,
-+           ipv6_pim_rp_cmd,
-+           "ipv6 pim rp X:X::X:X$rp [X:X::X:X/M]$gp",
-+           IPV6_STR
-+           PIM_STR
-+           "Rendezvous Point\n"
-+           "ipv6 address of RP\n"
-+           "Group Address range to cover\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *group_str = (gp_str) ? gp_str : "FF00::0/8";
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_rp_cmd(vty, rp_str, group_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (no_ipv6_pim_rp,
--       no_ipv6_pim_rp_cmd,
--       "no ipv6 pim rp X:X::X:X$rp [X:X::X:X/M]$gp",
-+DEFPY (no_pim6_rp,
-+       no_pim6_rp_cmd,
-+       "no rp X:X::X:X$rp [X:X::X:X/M]$gp",
-        NO_STR
--       IPV6_STR
--       PIM_STR
-        "Rendezvous Point\n"
-        "ipv6 address of RP\n"
-        "Group Address range to cover\n")
-@@ -433,12 +1065,53 @@ DEFPY (no_ipv6_pim_rp,
- 
- 	return pim_process_no_rp_cmd(vty, rp_str, group_str);
- }
-+DEFPY_ATTR(no_ipv6_pim_rp,
-+           no_ipv6_pim_rp_cmd,
-+           "no ipv6 pim rp X:X::X:X$rp [X:X::X:X/M]$gp",
-+           NO_STR
-+           IPV6_STR
-+           PIM_STR
-+           "Rendezvous Point\n"
-+           "ipv6 address of RP\n"
-+           "Group Address range to cover\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *group_str = (gp_str) ? gp_str : "FF00::0/8";
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
--DEFPY (ipv6_pim_rp_prefix_list,
--       ipv6_pim_rp_prefix_list_cmd,
--       "ipv6 pim rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist",
--       IPV6_STR
--       PIM_STR
-+	ret = pim_process_no_rp_cmd(vty, rp_str, group_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (pim6_rp_prefix_list,
-+       pim6_rp_prefix_list_cmd,
-+       "rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist",
-        "Rendezvous Point\n"
-        "ipv6 address of RP\n"
-        "group prefix-list filter\n"
-@@ -446,13 +1119,53 @@ DEFPY (ipv6_pim_rp_prefix_list,
- {
- 	return pim_process_rp_plist_cmd(vty, rp_str, plist);
- }
-+DEFPY_ATTR(ipv6_pim_rp_prefix_list,
-+           ipv6_pim_rp_prefix_list_cmd,
-+           "ipv6 pim rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist",
-+           IPV6_STR
-+           PIM_STR
-+           "Rendezvous Point\n"
-+           "ipv6 address of RP\n"
-+           "group prefix-list filter\n"
-+           "Name of a prefix-list\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_rp_plist_cmd(vty, rp_str, plist);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (no_ipv6_pim_rp_prefix_list,
--       no_ipv6_pim_rp_prefix_list_cmd,
--       "no ipv6 pim rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist",
-+DEFPY (no_pim6_rp_prefix_list,
-+       no_pim6_rp_prefix_list_cmd,
-+       "no rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist",
-        NO_STR
--       IPV6_STR
--       PIM_STR
-        "Rendezvous Point\n"
-        "ipv6 address of RP\n"
-        "group prefix-list filter\n"
-@@ -460,6 +1173,49 @@ DEFPY (no_ipv6_pim_rp_prefix_list,
- {
- 	return pim_process_no_rp_plist_cmd(vty, rp_str, plist);
- }
-+DEFPY_ATTR(no_ipv6_pim_rp_prefix_list,
-+           no_ipv6_pim_rp_prefix_list_cmd,
-+           "no ipv6 pim rp X:X::X:X$rp prefix-list PREFIXLIST6_NAME$plist",
-+           NO_STR
-+           IPV6_STR
-+           PIM_STR
-+           "Rendezvous Point\n"
-+           "ipv6 address of RP\n"
-+           "group prefix-list filter\n"
-+           "Name of a prefix-list\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_rp_plist_cmd(vty, rp_str, plist);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
- DEFPY (ipv6_pim_bsm,
-        ipv6_pim_bsm_cmd,
-@@ -503,10 +1259,9 @@ DEFPY (no_ipv6_pim_ucast_bsm,
- 	return pim_process_no_unicast_bsm_cmd(vty);
- }
- 
--DEFPY (ipv6_ssmpingd,
--      ipv6_ssmpingd_cmd,
--      "ipv6 ssmpingd [X:X::X:X]$source",
--      IPV6_STR
-+DEFPY (pim6_ssmpingd,
-+       pim6_ssmpingd_cmd,
-+       "ssmpingd [X:X::X:X]$source",
-       CONF_SSMPINGD_STR
-       "Source address\n")
- {
-@@ -514,20 +1269,99 @@ DEFPY (ipv6_ssmpingd,
- 
- 	return pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, src_str);
- }
-+DEFPY_ATTR(ipv6_ssmpingd,
-+           ipv6_ssmpingd_cmd,
-+           "ipv6 ssmpingd [X:X::X:X]$source",
-+           IPV6_STR
-+           CONF_SSMPINGD_STR
-+           "Source address\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *src_str = (source_str) ? source_str : "::";
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
-+	ret = pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, src_str);
- 
--DEFPY (no_ipv6_ssmpingd,
--      no_ipv6_ssmpingd_cmd,
--      "no ipv6 ssmpingd [X:X::X:X]$source",
--      NO_STR
--      IPV6_STR
--      CONF_SSMPINGD_STR
--      "Source address\n")
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (no_pim6_ssmpingd,
-+       no_pim6_ssmpingd_cmd,
-+       "no ssmpingd [X:X::X:X]$source",
-+       NO_STR
-+       CONF_SSMPINGD_STR
-+       "Source address\n")
- {
- 	const char *src_str = (source_str) ? source_str : "::";
- 
- 	return pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, src_str);
- }
-+DEFPY_ATTR(no_ipv6_ssmpingd,
-+           no_ipv6_ssmpingd_cmd,
-+           "no ipv6 ssmpingd [X:X::X:X]$source",
-+           NO_STR
-+           IPV6_STR
-+           CONF_SSMPINGD_STR
-+           "Source address\n",
-+           CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *src_str = (source_str) ? source_str : "::";
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM6_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, src_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
- DEFPY (interface_ipv6_mld_join,
-        interface_ipv6_mld_join_cmd,
-@@ -1733,12 +2567,16 @@ DEFPY (debug_pimv6_bsm,
- 	return CMD_SUCCESS;
- }
- 
--void pim_cmd_init(void)
--{
--	if_cmd_init(pim_interface_config_write);
--
--	install_node(&debug_node);
-+struct cmd_node pim6_node = {
-+	.name = "pim6",
-+	.node = PIM6_NODE,
-+	.parent_node = CONFIG_NODE,
-+	.prompt = "%s(config-pim6)# ",
-+	.config_write = pim_router_config_write,
-+};
- 
-+static void pim_install_deprecated(void)
-+{
- 	install_element(CONFIG_NODE, &ipv6_pim_joinprune_time_cmd);
- 	install_element(CONFIG_NODE, &no_ipv6_pim_joinprune_time_cmd);
- 	install_element(CONFIG_NODE, &ipv6_pim_spt_switchover_infinity_cmd);
-@@ -1753,6 +2591,60 @@ void pim_cmd_init(void)
- 	install_element(CONFIG_NODE, &no_ipv6_pim_rp_keep_alive_cmd);
- 	install_element(CONFIG_NODE, &ipv6_pim_register_suppress_cmd);
- 	install_element(CONFIG_NODE, &no_ipv6_pim_register_suppress_cmd);
-+	install_element(CONFIG_NODE, &ipv6_pim_rp_cmd);
-+	install_element(VRF_NODE, &ipv6_pim_rp_cmd);
-+	install_element(CONFIG_NODE, &no_ipv6_pim_rp_cmd);
-+	install_element(VRF_NODE, &no_ipv6_pim_rp_cmd);
-+	install_element(CONFIG_NODE, &ipv6_pim_rp_prefix_list_cmd);
-+	install_element(VRF_NODE, &ipv6_pim_rp_prefix_list_cmd);
-+	install_element(CONFIG_NODE, &no_ipv6_pim_rp_prefix_list_cmd);
-+	install_element(VRF_NODE, &no_ipv6_pim_rp_prefix_list_cmd);
-+	install_element(CONFIG_NODE, &ipv6_ssmpingd_cmd);
-+	install_element(VRF_NODE, &ipv6_ssmpingd_cmd);
-+	install_element(CONFIG_NODE, &no_ipv6_ssmpingd_cmd);
-+	install_element(VRF_NODE, &no_ipv6_ssmpingd_cmd);
-+}
-+
-+void pim_cmd_init(void)
-+{
-+	if_cmd_init(pim_interface_config_write);
-+
-+	install_node(&debug_node);
-+
-+	pim_install_deprecated();
-+
-+	install_element(CONFIG_NODE, &router_pim6_cmd);
-+	install_element(CONFIG_NODE, &no_router_pim6_cmd);
-+
-+	install_node(&pim6_node);
-+	install_default(PIM6_NODE);
-+
-+	install_element(PIM6_NODE, &pim6_joinprune_time_cmd);
-+	install_element(PIM6_NODE, &no_pim6_joinprune_time_cmd);
-+	install_element(PIM6_NODE, &pim6_spt_switchover_infinity_cmd);
-+	install_element(PIM6_NODE, &pim6_spt_switchover_infinity_plist_cmd);
-+	install_element(PIM6_NODE, &no_pim6_spt_switchover_infinity_cmd);
-+	install_element(PIM6_NODE, &no_pim6_spt_switchover_infinity_plist_cmd);
-+	install_element(PIM6_NODE, &pim6_packets_cmd);
-+	install_element(PIM6_NODE, &no_pim6_packets_cmd);
-+	install_element(PIM6_NODE, &pim6_keep_alive_cmd);
-+	install_element(PIM6_NODE, &no_pim6_keep_alive_cmd);
-+	install_element(PIM6_NODE, &pim6_rp_keep_alive_cmd);
-+	install_element(PIM6_NODE, &no_pim6_rp_keep_alive_cmd);
-+	install_element(PIM6_NODE, &pim6_register_suppress_cmd);
-+	install_element(PIM6_NODE, &no_pim6_register_suppress_cmd);
-+	install_element(PIM6_NODE, &pim6_rp_cmd);
-+	install_element(PIM6_NODE, &no_pim6_rp_cmd);
-+	install_element(PIM6_NODE, &pim6_rp_prefix_list_cmd);
-+	install_element(PIM6_NODE, &no_pim6_rp_prefix_list_cmd);
-+	install_element(PIM6_NODE, &pim6_ssmpingd_cmd);
-+	install_element(PIM6_NODE, &no_pim6_ssmpingd_cmd);
-+
-+	install_element(CONFIG_NODE, &ipv6_mld_group_watermark_cmd);
-+	install_element(VRF_NODE, &ipv6_mld_group_watermark_cmd);
-+	install_element(CONFIG_NODE, &no_ipv6_mld_group_watermark_cmd);
-+	install_element(VRF_NODE, &no_ipv6_mld_group_watermark_cmd);
-+
- 	install_element(INTERFACE_NODE, &interface_ipv6_pim_cmd);
- 	install_element(INTERFACE_NODE, &interface_no_ipv6_pim_cmd);
- 	install_element(INTERFACE_NODE, &interface_ipv6_pim_drprio_cmd);
-@@ -1764,10 +2656,8 @@ void pim_cmd_init(void)
- 	install_element(INTERFACE_NODE, &interface_no_ipv6_pim_ssm_cmd);
- 	install_element(INTERFACE_NODE, &interface_ipv6_pim_sm_cmd);
- 	install_element(INTERFACE_NODE, &interface_no_ipv6_pim_sm_cmd);
--	install_element(INTERFACE_NODE,
--			&interface_ipv6_pim_boundary_oil_cmd);
--	install_element(INTERFACE_NODE,
--			&interface_no_ipv6_pim_boundary_oil_cmd);
-+	install_element(INTERFACE_NODE, &interface_ipv6_pim_boundary_oil_cmd);
-+	install_element(INTERFACE_NODE, &interface_no_ipv6_pim_boundary_oil_cmd);
- 	install_element(INTERFACE_NODE, &interface_ipv6_mroute_cmd);
- 	install_element(INTERFACE_NODE, &interface_no_ipv6_mroute_cmd);
- 	/* Install BSM command */
-@@ -1775,18 +2665,7 @@ void pim_cmd_init(void)
- 	install_element(INTERFACE_NODE, &no_ipv6_pim_bsm_cmd);
- 	install_element(INTERFACE_NODE, &ipv6_pim_ucast_bsm_cmd);
- 	install_element(INTERFACE_NODE, &no_ipv6_pim_ucast_bsm_cmd);
--	install_element(CONFIG_NODE, &ipv6_pim_rp_cmd);
--	install_element(VRF_NODE, &ipv6_pim_rp_cmd);
--	install_element(CONFIG_NODE, &no_ipv6_pim_rp_cmd);
--	install_element(VRF_NODE, &no_ipv6_pim_rp_cmd);
--	install_element(CONFIG_NODE, &ipv6_pim_rp_prefix_list_cmd);
--	install_element(VRF_NODE, &ipv6_pim_rp_prefix_list_cmd);
--	install_element(CONFIG_NODE, &no_ipv6_pim_rp_prefix_list_cmd);
--	install_element(VRF_NODE, &no_ipv6_pim_rp_prefix_list_cmd);
--	install_element(CONFIG_NODE, &ipv6_ssmpingd_cmd);
--	install_element(VRF_NODE, &ipv6_ssmpingd_cmd);
--	install_element(CONFIG_NODE, &no_ipv6_ssmpingd_cmd);
--	install_element(VRF_NODE, &no_ipv6_ssmpingd_cmd);
-+
- 	install_element(INTERFACE_NODE, &interface_ipv6_mld_cmd);
- 	install_element(INTERFACE_NODE, &interface_no_ipv6_mld_cmd);
- 	install_element(INTERFACE_NODE, &interface_ipv6_mld_join_cmd);
-@@ -1796,10 +2675,6 @@ void pim_cmd_init(void)
- 	install_element(INTERFACE_NODE, &interface_ipv6_mld_query_interval_cmd);
- 	install_element(INTERFACE_NODE,
- 			&interface_no_ipv6_mld_query_interval_cmd);
--	install_element(CONFIG_NODE, &ipv6_mld_group_watermark_cmd);
--	install_element(VRF_NODE, &ipv6_mld_group_watermark_cmd);
--	install_element(CONFIG_NODE, &no_ipv6_mld_group_watermark_cmd);
--	install_element(VRF_NODE, &no_ipv6_mld_group_watermark_cmd);
- 	install_element(INTERFACE_NODE,
- 			&interface_ipv6_mld_query_max_response_time_cmd);
- 	install_element(INTERFACE_NODE,
-diff --git a/pimd/pim_addr.h b/pimd/pim_addr.h
-index 7b0c3f0350e2..c1416e1dd0f6 100644
---- a/pimd/pim_addr.h
-+++ b/pimd/pim_addr.h
-@@ -26,6 +26,7 @@ typedef struct prefix_ipv4 prefix_pim;
- #define PIM_MAX_BITLEN	IPV4_MAX_BITLEN
- #define PIM_AF_NAME     "ip"
- #define PIM_AF_DBG	"pim"
-+#define PIM_AF_ROUTER	"pim"
- #define GM_AF_DBG	"igmp"
- #define PIM_MROUTE_DBG  "mroute"
- #define PIMREG          "pimreg"
-@@ -58,6 +59,7 @@ typedef struct prefix_ipv6 prefix_pim;
- #define PIM_MAX_BITLEN	IPV6_MAX_BITLEN
- #define PIM_AF_NAME     "ipv6"
- #define PIM_AF_DBG	"pimv6"
-+#define PIM_AF_ROUTER	"pim6"
- #define GM_AF_DBG	"mld"
- #define PIM_MROUTE_DBG  "mroute6"
- #define PIMREG          "pim6reg"
-diff --git a/pimd/pim_cmd.c b/pimd/pim_cmd.c
-index a2d756a96a20..2b8d3e56e521 100644
---- a/pimd/pim_cmd.c
-+++ b/pimd/pim_cmd.c
-@@ -1457,19 +1457,13 @@ static void clear_interfaces(struct pim_instance *pim)
- static void pim_cli_legacy_mesh_group_behavior(struct vty *vty,
- 					       const char *gname)
- {
--	const char *vrfname;
- 	char xpath_value[XPATH_MAXLEN];
- 	char xpath_member_value[XPATH_MAXLEN];
- 	const struct lyd_node *member_dnode;
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return;
--
- 	/* Get mesh group base XPath. */
- 	snprintf(xpath_value, sizeof(xpath_value),
--		 FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']",
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname);
-+		 "%s/msdp-mesh-groups[name='%s']", VTY_CURR_XPATH, gname);
- 	/* Group must exists, otherwise just quit. */
- 	if (!yang_dnode_exists(vty->candidate_config->dnode, xpath_value))
- 		return;
-@@ -1477,8 +1471,7 @@ static void pim_cli_legacy_mesh_group_behavior(struct vty *vty,
- 	/* Group members check: */
- 	strlcpy(xpath_member_value, xpath_value, sizeof(xpath_member_value));
- 	strlcat(xpath_member_value, "/members", sizeof(xpath_member_value));
--	if (yang_dnode_exists(vty->candidate_config->dnode,
--			      xpath_member_value)) {
-+	if (yang_dnode_exists(vty->candidate_config->dnode, xpath_member_value)) {
- 		member_dnode = yang_dnode_get(vty->candidate_config->dnode,
- 					      xpath_member_value);
- 		if (!member_dnode || !yang_is_last_list_dnode(member_dnode))
-@@ -2989,22 +2982,108 @@ DEFUN (show_ip_ssmpingd,
- 	return CMD_SUCCESS;
- }
- 
--DEFUN (ip_pim_spt_switchover_infinity,
--       ip_pim_spt_switchover_infinity_cmd,
--       "ip pim spt-switchover infinity-and-beyond",
--       IP_STR
--       PIM_STR
-+DEFPY_NOSH (router_pim,
-+				router_pim_cmd,
-+				"router pim [vrf NAME]",
-+				"Enable a routing process\n"
-+				"Start PIM configuration\n"
-+				VRF_CMD_HELP_STR)
-+{
-+	char xpath[XPATH_MAXLEN];
-+	const char *vrf_name;
-+
-+	if (vrf)
-+		vrf_name = vrf;
-+	else
-+		vrf_name = VRF_DEFAULT_NAME;
-+
-+	snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim",
-+		 vrf_name, FRR_PIM_AF_XPATH_VAL);
-+	nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+	if (nb_cli_apply_changes_clear_pending(vty, NULL) != CMD_SUCCESS)
-+		return CMD_WARNING_CONFIG_FAILED;
-+
-+	VTY_PUSH_XPATH(PIM_NODE, xpath);
-+	return CMD_SUCCESS;
-+}
-+
-+DEFPY (no_router_pim,
-+       no_router_pim_cmd,
-+       "no router pim [vrf NAME]",
-+       NO_STR
-+       "Enable a routing process\n"
-+       "Start PIM configuration\n"
-+       VRF_CMD_HELP_STR)
-+{
-+	char xpath[XPATH_MAXLEN];
-+	const char *vrf_name;
-+
-+	if (vrf)
-+		vrf_name = vrf;
-+	else
-+		vrf_name = VRF_DEFAULT_NAME;
-+
-+	snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim",
-+		 vrf_name, FRR_PIM_AF_XPATH_VAL);
-+
-+	nb_cli_enqueue_change(vty, xpath, NB_OP_DESTROY, NULL);
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+
-+
-+DEFPY (pim_spt_switchover_infinity,
-+       pim_spt_switchover_infinity_cmd,
-+       "spt-switchover infinity-and-beyond",
-        "SPT-Switchover\n"
-        "Never switch to SPT Tree\n")
- {
- 	return pim_process_spt_switchover_infinity_cmd(vty);
- }
-+DEFPY_ATTR(ip_pim_spt_switchover_infinity,
-+			  ip_pim_spt_switchover_infinity_cmd,
-+			  "ip pim spt-switchover infinity-and-beyond",
-+			  IP_STR
-+			  PIM_STR
-+			  "SPT-Switchover\n"
-+			  "Never switch to SPT Tree\n",
-+	   CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_spt_switchover_infinity_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (ip_pim_spt_switchover_infinity_plist,
--       ip_pim_spt_switchover_infinity_plist_cmd,
--       "ip pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME$plist",
--       IP_STR
--       PIM_STR
-+DEFPY (pim_spt_switchover_infinity_plist,
-+       pim_spt_switchover_infinity_plist_cmd,
-+       "spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME$plist",
-        "SPT-Switchover\n"
-        "Never switch to SPT Tree\n"
-        "Prefix-List to control which groups to switch\n"
-@@ -3012,25 +3091,104 @@ DEFPY (ip_pim_spt_switchover_infinity_plist,
- {
- 	return pim_process_spt_switchover_prefixlist_cmd(vty, plist);
- }
-+DEFPY_ATTR(ip_pim_spt_switchover_infinity_plist,
-+			  ip_pim_spt_switchover_infinity_plist_cmd,
-+			  "ip pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME$plist",
-+			  IP_STR
-+			  PIM_STR
-+			  "SPT-Switchover\n"
-+			  "Never switch to SPT Tree\n"
-+			  "Prefix-List to control which groups to switch\n"
-+			  "Prefix-List name\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_spt_switchover_prefixlist_cmd(vty, plist);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFUN (no_ip_pim_spt_switchover_infinity,
--       no_ip_pim_spt_switchover_infinity_cmd,
--       "no ip pim spt-switchover infinity-and-beyond",
-+DEFPY (no_pim_spt_switchover_infinity,
-+       no_pim_spt_switchover_infinity_cmd,
-+       "no spt-switchover infinity-and-beyond",
-        NO_STR
--       IP_STR
--       PIM_STR
-        "SPT_Switchover\n"
-        "Never switch to SPT Tree\n")
- {
- 	return pim_process_no_spt_switchover_cmd(vty);
- }
-+DEFPY_ATTR(no_ip_pim_spt_switchover_infinity,
-+			  no_ip_pim_spt_switchover_infinity_cmd,
-+			  "no ip pim spt-switchover infinity-and-beyond",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "SPT_Switchover\n"
-+			  "Never switch to SPT Tree\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_spt_switchover_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFUN (no_ip_pim_spt_switchover_infinity_plist,
--       no_ip_pim_spt_switchover_infinity_plist_cmd,
--       "no ip pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME",
-+DEFPY (no_pim_spt_switchover_infinity_plist,
-+       no_pim_spt_switchover_infinity_plist_cmd,
-+       "no spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME",
-        NO_STR
--       IP_STR
--       PIM_STR
-        "SPT_Switchover\n"
-        "Never switch to SPT Tree\n"
-        "Prefix-List to control which groups to switch\n"
-@@ -3038,28 +3196,61 @@ DEFUN (no_ip_pim_spt_switchover_infinity_plist,
- {
- 	return pim_process_no_spt_switchover_cmd(vty);
- }
-+DEFPY_ATTR(no_ip_pim_spt_switchover_infinity_plist,
-+			  no_ip_pim_spt_switchover_infinity_plist_cmd,
-+			  "no ip pim spt-switchover infinity-and-beyond prefix-list PREFIXLIST4_NAME",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "SPT_Switchover\n"
-+			  "Never switch to SPT Tree\n"
-+			  "Prefix-List to control which groups to switch\n"
-+			  "Prefix-List name\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_spt_switchover_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
- DEFPY (pim_register_accept_list,
-        pim_register_accept_list_cmd,
--       "[no] ip pim register-accept-list PREFIXLIST4_NAME$word",
-+       "[no] register-accept-list PREFIXLIST4_NAME$word",
-        NO_STR
--       IP_STR
--       PIM_STR
-        "Only accept registers from a specific source prefix list\n"
-        "Prefix-List name\n")
- {
--	const char *vrfname;
- 	char reg_alist_xpath[XPATH_MAXLEN];
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
- 	snprintf(reg_alist_xpath, sizeof(reg_alist_xpath),
--		 FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 "frr-routing:ipv4");
--	strlcat(reg_alist_xpath, "/register-accept-list",
--		sizeof(reg_alist_xpath));
-+		 "./register-accept-list");
- 
- 	if (no)
- 		nb_cli_enqueue_change(vty, reg_alist_xpath,
-@@ -3070,123 +3261,560 @@ DEFPY (pim_register_accept_list,
- 
- 	return nb_cli_apply_changes(vty, NULL);
- }
-+DEFPY_ATTR(ip_pim_register_accept_list,
-+			  ip_pim_register_accept_list_cmd,
-+			  "[no] ip pim register-accept-list PREFIXLIST4_NAME$word",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Only accept registers from a specific source prefix list\n"
-+			  "Prefix-List name\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char reg_alist_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
--DEFPY (ip_pim_joinprune_time,
--       ip_pim_joinprune_time_cmd,
--       "ip pim join-prune-interval (1-65535)$jpi",
--       IP_STR
--       "pim multicast routing\n"
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	snprintf(reg_alist_xpath, sizeof(reg_alist_xpath),
-+		 "./register-accept-list");
-+
-+	if (no)
-+		nb_cli_enqueue_change(vty, reg_alist_xpath, NB_OP_DESTROY, NULL);
-+	else
-+		nb_cli_enqueue_change(vty, reg_alist_xpath, NB_OP_MODIFY, word);
-+
-+	ret = nb_cli_apply_changes(vty, NULL);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (pim_joinprune_time,
-+       pim_joinprune_time_cmd,
-+       "join-prune-interval (1-65535)$jpi",
-        "Join Prune Send Interval\n"
-        "Seconds\n")
- {
- 	return pim_process_join_prune_cmd(vty, jpi_str);
- }
-+DEFPY_ATTR(ip_pim_joinprune_time,
-+			  ip_pim_joinprune_time_cmd,
-+			  "ip pim join-prune-interval (1-65535)$jpi",
-+			  IP_STR
-+			  PIM_STR
-+			  "Join Prune Send Interval\n"
-+			  "Seconds\n",
-+	   CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_join_prune_cmd(vty, jpi_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFUN (no_ip_pim_joinprune_time,
--       no_ip_pim_joinprune_time_cmd,
--       "no ip pim join-prune-interval [(1-65535)]",
-+DEFPY (no_pim_joinprune_time,
-+       no_pim_joinprune_time_cmd,
-+       "no join-prune-interval [(1-65535)]",
-        NO_STR
--       IP_STR
--       "pim multicast routing\n"
-        "Join Prune Send Interval\n"
-        IGNORED_IN_NO_STR)
- {
- 	return pim_process_no_join_prune_cmd(vty);
- }
-+DEFPY_ATTR(no_ip_pim_joinprune_time,
-+			  no_ip_pim_joinprune_time_cmd,
-+			  "no ip pim join-prune-interval [(1-65535)]",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Join Prune Send Interval\n"
-+			  IGNORED_IN_NO_STR,
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
--DEFPY (ip_pim_register_suppress,
--       ip_pim_register_suppress_cmd,
--       "ip pim register-suppress-time (1-65535)$rst",
--       IP_STR
--       "pim multicast routing\n"
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_join_prune_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (pim_register_suppress,
-+       pim_register_suppress_cmd,
-+       "register-suppress-time (1-65535)$rst",
-        "Register Suppress Timer\n"
-        "Seconds\n")
- {
- 	return pim_process_register_suppress_cmd(vty, rst_str);
- }
-+DEFPY_ATTR(ip_pim_register_suppress,
-+			  ip_pim_register_suppress_cmd,
-+			  "ip pim register-suppress-time (1-65535)$rst",
-+			  IP_STR
-+			  PIM_STR
-+			  "Register Suppress Timer\n"
-+			  "Seconds\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_register_suppress_cmd(vty, rst_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFUN (no_ip_pim_register_suppress,
--       no_ip_pim_register_suppress_cmd,
--       "no ip pim register-suppress-time [(1-65535)]",
-+DEFPY (no_pim_register_suppress,
-+       no_pim_register_suppress_cmd,
-+       "no register-suppress-time [(1-65535)]",
-        NO_STR
--       IP_STR
--       "pim multicast routing\n"
-        "Register Suppress Timer\n"
-        IGNORED_IN_NO_STR)
- {
- 	return pim_process_no_register_suppress_cmd(vty);
- }
-+DEFPY_ATTR(no_ip_pim_register_suppress,
-+			  no_ip_pim_register_suppress_cmd,
-+			  "no ip pim register-suppress-time [(1-65535)]",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Register Suppress Timer\n"
-+			  IGNORED_IN_NO_STR,
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_register_suppress_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (ip_pim_rp_keep_alive,
--       ip_pim_rp_keep_alive_cmd,
--       "ip pim rp keep-alive-timer (1-65535)$kat",
--       IP_STR
--       "pim multicast routing\n"
-+DEFPY (pim_rp_keep_alive,
-+       pim_rp_keep_alive_cmd,
-+       "rp keep-alive-timer (1-65535)$kat",
-        "Rendezvous Point\n"
-        "Keep alive Timer\n"
-        "Seconds\n")
- {
- 	return pim_process_rp_kat_cmd(vty, kat_str);
- }
-+DEFPY_ATTR(ip_pim_rp_keep_alive,
-+			  ip_pim_rp_keep_alive_cmd,
-+			  "ip pim rp keep-alive-timer (1-65535)$kat",
-+			  IP_STR
-+			  PIM_STR
-+			  "Rendezvous Point\n"
-+			  "Keep alive Timer\n"
-+			  "Seconds\n",
-+	   CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_rp_kat_cmd(vty, kat_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFUN (no_ip_pim_rp_keep_alive,
--       no_ip_pim_rp_keep_alive_cmd,
--       "no ip pim rp keep-alive-timer [(1-65535)]",
-+DEFPY (no_pim_rp_keep_alive,
-+       no_pim_rp_keep_alive_cmd,
-+       "no rp keep-alive-timer [(1-65535)]",
-        NO_STR
--       IP_STR
--       "pim multicast routing\n"
-        "Rendezvous Point\n"
-        "Keep alive Timer\n"
-        IGNORED_IN_NO_STR)
- {
- 	return pim_process_no_rp_kat_cmd(vty);
- }
-+DEFPY_ATTR(no_ip_pim_rp_keep_alive,
-+			  no_ip_pim_rp_keep_alive_cmd,
-+			  "no ip pim rp keep-alive-timer [(1-65535)]",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Rendezvous Point\n"
-+			  "Keep alive Timer\n"
-+			  IGNORED_IN_NO_STR,
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
--DEFPY (ip_pim_keep_alive,
--       ip_pim_keep_alive_cmd,
--       "ip pim keep-alive-timer (1-65535)$kat",
--       IP_STR
--       "pim multicast routing\n"
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_rp_kat_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (pim_keep_alive,
-+       pim_keep_alive_cmd,
-+       "keep-alive-timer (1-65535)$kat",
-        "Keep alive Timer\n"
-        "Seconds\n")
- {
- 	return pim_process_keepalivetimer_cmd(vty, kat_str);
- }
--
--DEFUN (no_ip_pim_keep_alive,
--       no_ip_pim_keep_alive_cmd,
--       "no ip pim keep-alive-timer [(1-65535)]",
--       NO_STR
--       IP_STR
--       "pim multicast routing\n"
--       "Keep alive Timer\n"
--       IGNORED_IN_NO_STR)
-+DEFPY_ATTR(ip_pim_keep_alive,
-+			  ip_pim_keep_alive_cmd,
-+			  "ip pim keep-alive-timer (1-65535)$kat",
-+			  IP_STR
-+			  PIM_STR
-+			  "Keep alive Timer\n"
-+			  "Seconds\n",
-+	   CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
- {
--	return pim_process_no_keepalivetimer_cmd(vty);
--}
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
--DEFPY (ip_pim_packets,
--       ip_pim_packets_cmd,
--       "ip pim packets (1-255)",
--       IP_STR
--       "pim multicast routing\n"
--       "packets to process at one time per fd\n"
--       "Number of packets\n")
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_keepalivetimer_cmd(vty, kat_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (no_pim_keep_alive,
-+       no_pim_keep_alive_cmd,
-+       "no keep-alive-timer [(1-65535)]",
-+       NO_STR
-+       "Keep alive Timer\n"
-+       IGNORED_IN_NO_STR)
-+{
-+	return pim_process_no_keepalivetimer_cmd(vty);
-+}
-+DEFPY_ATTR(no_ip_pim_keep_alive,
-+			  no_ip_pim_keep_alive_cmd,
-+			  "no ip pim keep-alive-timer [(1-65535)]",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Keep alive Timer\n"
-+			  IGNORED_IN_NO_STR,
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_keepalivetimer_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (pim_packets,
-+       pim_packets_cmd,
-+       "packets (1-255)",
-+       "packets to process at one time per fd\n"
-+       "Number of packets\n")
- {
- 	return pim_process_pim_packet_cmd(vty, packets_str);
- }
-+DEFPY_ATTR(ip_pim_packets,
-+			  ip_pim_packets_cmd,
-+			  "ip pim packets (1-255)",
-+			  IP_STR
-+			  PIM_STR
-+			  "packets to process at one time per fd\n"
-+			  "Number of packets\n",
-+	   CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_pim_packet_cmd(vty, packets_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
- 
--DEFUN (no_ip_pim_packets,
--       no_ip_pim_packets_cmd,
--       "no ip pim packets [(1-255)]",
-+	return ret;
-+}
-+
-+DEFPY (no_pim_packets,
-+       no_pim_packets_cmd,
-+       "no packets [(1-255)]",
-        NO_STR
--       IP_STR
--       "pim multicast routing\n"
-        "packets to process at one time per fd\n"
-        IGNORED_IN_NO_STR)
- {
- 	return pim_process_no_pim_packet_cmd(vty);
- }
-+DEFPY_ATTR(no_ip_pim_packets,
-+			  no_ip_pim_packets_cmd,
-+			  "no ip pim packets [(1-255)]",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "packets to process at one time per fd\n"
-+			  IGNORED_IN_NO_STR,
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_pim_packet_cmd(vty);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
- DEFPY (ip_igmp_group_watermark,
-        ip_igmp_group_watermark_cmd,
-@@ -3217,64 +3845,131 @@ DEFPY (no_ip_igmp_group_watermark,
- 	return CMD_SUCCESS;
- }
- 
--DEFUN (ip_pim_v6_secondary,
--       ip_pim_v6_secondary_cmd,
--       "ip pim send-v6-secondary",
--       IP_STR
--       "pim multicast routing\n"
-+DEFPY (pim_v6_secondary,
-+       pim_v6_secondary_cmd,
-+       "send-v6-secondary",
-        "Send v6 secondary addresses\n")
- {
--	const char *vrfname;
- 	char send_v6_secondary_xpath[XPATH_MAXLEN];
- 
-+	snprintf(send_v6_secondary_xpath, sizeof(send_v6_secondary_xpath),
-+		 "./send-v6-secondary");
-+
-+	nb_cli_enqueue_change(vty, send_v6_secondary_xpath, NB_OP_MODIFY,
-+			      "true");
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(ip_pim_v6_secondary,
-+			  ip_pim_v6_secondary_cmd,
-+			  "ip pim send-v6-secondary",
-+			  IP_STR
-+			  PIM_STR
-+			  "Send v6 secondary addresses\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char send_v6_secondary_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
- 	snprintf(send_v6_secondary_xpath, sizeof(send_v6_secondary_xpath),
--		 FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4");
--	strlcat(send_v6_secondary_xpath, "/send-v6-secondary",
--		sizeof(send_v6_secondary_xpath));
--
-+		 "./send-v6-secondary");
- 	nb_cli_enqueue_change(vty, send_v6_secondary_xpath, NB_OP_MODIFY,
- 			      "true");
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	return nb_cli_apply_changes(vty, NULL);
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFUN (no_ip_pim_v6_secondary,
--       no_ip_pim_v6_secondary_cmd,
--       "no ip pim send-v6-secondary",
-+DEFPY (no_pim_v6_secondary,
-+       no_pim_v6_secondary_cmd,
-+       "no send-v6-secondary",
-        NO_STR
--       IP_STR
--       "pim multicast routing\n"
-        "Send v6 secondary addresses\n")
- {
--	const char *vrfname;
- 	char send_v6_secondary_xpath[XPATH_MAXLEN];
- 
-+	snprintf(send_v6_secondary_xpath, sizeof(send_v6_secondary_xpath),
-+		 "./send-v6-secondary");
-+
-+	nb_cli_enqueue_change(vty, send_v6_secondary_xpath, NB_OP_MODIFY,
-+			      "false");
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(no_ip_pim_v6_secondary,
-+			  no_ip_pim_v6_secondary_cmd,
-+			  "no ip pim send-v6-secondary",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Send v6 secondary addresses\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char send_v6_secondary_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
- 	snprintf(send_v6_secondary_xpath, sizeof(send_v6_secondary_xpath),
--		 FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4");
--	strlcat(send_v6_secondary_xpath, "/send-v6-secondary",
--		sizeof(send_v6_secondary_xpath));
--
-+		 "./send-v6-secondary");
- 	nb_cli_enqueue_change(vty, send_v6_secondary_xpath, NB_OP_MODIFY,
- 			      "false");
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	return nb_cli_apply_changes(vty, NULL);
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFPY (ip_pim_rp,
--       ip_pim_rp_cmd,
--       "ip pim rp A.B.C.D$rp [A.B.C.D/M]$gp",
--       IP_STR
--       "pim multicast routing\n"
-+DEFPY (pim_rp,
-+       pim_rp_cmd,
-+       "rp A.B.C.D$rp [A.B.C.D/M]$gp",
-        "Rendezvous Point\n"
-        "ip address of RP\n"
-        "Group Address range to cover\n")
-@@ -3283,12 +3978,52 @@ DEFPY (ip_pim_rp,
- 
- 	return pim_process_rp_cmd(vty, rp_str, group_str);
- }
-+DEFPY_ATTR(ip_pim_rp,
-+			  ip_pim_rp_cmd,
-+			  "ip pim rp A.B.C.D$rp [A.B.C.D/M]$gp",
-+			  IP_STR
-+			  PIM_STR
-+			  "Rendezvous Point\n"
-+			  "ip address of RP\n"
-+			  "Group Address range to cover\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	const char *group_str = (gp_str) ? gp_str : "224.0.0.0/4";
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
--DEFPY (ip_pim_rp_prefix_list,
--       ip_pim_rp_prefix_list_cmd,
--       "ip pim rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist",
--       IP_STR
--       "pim multicast routing\n"
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_rp_cmd(vty, rp_str, group_str);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (pim_rp_prefix_list,
-+       pim_rp_prefix_list_cmd,
-+       "rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist",
-        "Rendezvous Point\n"
-        "ip address of RP\n"
-        "group prefix-list filter\n"
-@@ -3296,13 +4031,53 @@ DEFPY (ip_pim_rp_prefix_list,
- {
- 	return pim_process_rp_plist_cmd(vty, rp_str, plist);
- }
-+DEFPY_ATTR(ip_pim_rp_prefix_list,
-+			  ip_pim_rp_prefix_list_cmd,
-+			  "ip pim rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist",
-+			  IP_STR
-+			  PIM_STR
-+			  "Rendezvous Point\n"
-+			  "ip address of RP\n"
-+			  "group prefix-list filter\n"
-+			  "Name of a prefix-list\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_rp_plist_cmd(vty, rp_str, plist);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
--DEFPY (no_ip_pim_rp,
--       no_ip_pim_rp_cmd,
--       "no ip pim rp A.B.C.D$rp [A.B.C.D/M]$gp",
-+DEFPY (no_pim_rp,
-+       no_pim_rp_cmd,
-+       "no rp A.B.C.D$rp [A.B.C.D/M]$gp",
-        NO_STR
--       IP_STR
--       "pim multicast routing\n"
-        "Rendezvous Point\n"
-        "ip address of RP\n"
-        "Group Address range to cover\n")
-@@ -3311,13 +4086,54 @@ DEFPY (no_ip_pim_rp,
- 
- 	return pim_process_no_rp_cmd(vty, rp_str, group_str);
- }
-+DEFPY_ATTR(no_ip_pim_rp,
-+			  no_ip_pim_rp_cmd,
-+			  "no ip pim rp A.B.C.D$rp [A.B.C.D/M]$gp",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Rendezvous Point\n"
-+			  "ip address of RP\n"
-+			  "Group Address range to cover\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	const char *group_str = (gp_str) ? gp_str : "224.0.0.0/4";
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_rp_cmd(vty, rp_str, group_str);
- 
--DEFPY (no_ip_pim_rp_prefix_list,
--       no_ip_pim_rp_prefix_list_cmd,
--       "no ip pim rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist",
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (no_pim_rp_prefix_list,
-+       no_pim_rp_prefix_list_cmd,
-+       "no rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist",
-        NO_STR
--       IP_STR
--       "pim multicast routing\n"
-        "Rendezvous Point\n"
-        "ip address of RP\n"
-        "group prefix-list filter\n"
-@@ -3325,104 +4141,264 @@ DEFPY (no_ip_pim_rp_prefix_list,
- {
- 	return pim_process_no_rp_plist_cmd(vty, rp_str, plist);
- }
-+DEFPY_ATTR(no_ip_pim_rp_prefix_list,
-+			  no_ip_pim_rp_prefix_list_cmd,
-+			  "no ip pim rp A.B.C.D$rp prefix-list PREFIXLIST4_NAME$plist",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Rendezvous Point\n"
-+			  "ip address of RP\n"
-+			  "group prefix-list filter\n"
-+			  "Name of a prefix-list\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
--DEFUN (ip_pim_ssm_prefix_list,
--       ip_pim_ssm_prefix_list_cmd,
--       "ip pim ssm prefix-list PREFIXLIST4_NAME",
--       IP_STR
--       "pim multicast routing\n"
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	ret = pim_process_no_rp_plist_cmd(vty, rp_str, plist);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY (pim_ssm_prefix_list,
-+       pim_ssm_prefix_list_cmd,
-+       "ssm prefix-list PREFIXLIST4_NAME$plist",
-        "Source Specific Multicast\n"
-        "group range prefix-list filter\n"
-        "Name of a prefix-list\n")
- {
--	const char *vrfname;
- 	char ssm_plist_xpath[XPATH_MAXLEN];
- 
-+	snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "./ssm-prefix-list");
-+
-+	nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_MODIFY, plist);
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(ip_pim_ssm_prefix_list,
-+			  ip_pim_ssm_prefix_list_cmd,
-+			  "ip pim ssm prefix-list PREFIXLIST4_NAME$plist",
-+			  IP_STR
-+			  PIM_STR
-+			  "Source Specific Multicast\n"
-+			  "group range prefix-list filter\n"
-+			  "Name of a prefix-list\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char ssm_plist_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
--	snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4");
--	strlcat(ssm_plist_xpath, "/ssm-prefix-list", sizeof(ssm_plist_xpath));
-+	snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "./ssm-prefix-list");
-+	nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_MODIFY, plist);
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_MODIFY, argv[4]->arg);
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
- 
--	return nb_cli_apply_changes(vty, NULL);
-+	return ret;
- }
- 
--DEFUN (no_ip_pim_ssm_prefix_list,
--       no_ip_pim_ssm_prefix_list_cmd,
--       "no ip pim ssm prefix-list",
-+DEFPY (no_pim_ssm_prefix_list,
-+       no_pim_ssm_prefix_list_cmd,
-+       "no ssm prefix-list",
-        NO_STR
--       IP_STR
--       "pim multicast routing\n"
-        "Source Specific Multicast\n"
-        "group range prefix-list filter\n")
- {
--	const char *vrfname;
- 	char ssm_plist_xpath[XPATH_MAXLEN];
- 
-+	snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "./ssm-prefix-list");
-+
-+	nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_DESTROY, NULL);
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(no_ip_pim_ssm_prefix_list,
-+			  no_ip_pim_ssm_prefix_list_cmd,
-+			  "no ip pim ssm prefix-list",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Source Specific Multicast\n"
-+			  "group range prefix-list filter\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char ssm_plist_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
--	snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath),
--		 FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4");
--	strlcat(ssm_plist_xpath, "/ssm-prefix-list", sizeof(ssm_plist_xpath));
--
-+	snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "./ssm-prefix-list");
- 	nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_DESTROY, NULL);
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	return nb_cli_apply_changes(vty, NULL);
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFUN (no_ip_pim_ssm_prefix_list_name,
--       no_ip_pim_ssm_prefix_list_name_cmd,
--       "no ip pim ssm prefix-list PREFIXLIST4_NAME",
-+DEFPY (no_pim_ssm_prefix_list_name,
-+       no_pim_ssm_prefix_list_name_cmd,
-+       "no ssm prefix-list PREFIXLIST4_NAME$plist",
-        NO_STR
--       IP_STR
--       "pim multicast routing\n"
-        "Source Specific Multicast\n"
-        "group range prefix-list filter\n"
-        "Name of a prefix-list\n")
- {
--	const char *vrfname;
- 	const struct lyd_node *ssm_plist_dnode;
- 	char ssm_plist_xpath[XPATH_MAXLEN];
- 	const char *ssm_plist_name;
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
--	snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath),
--		 FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4");
--	strlcat(ssm_plist_xpath, "/ssm-prefix-list", sizeof(ssm_plist_xpath));
-+	snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "%s/ssm-prefix-list",
-+		 VTY_CURR_XPATH);
- 	ssm_plist_dnode = yang_dnode_get(vty->candidate_config->dnode,
- 					 ssm_plist_xpath);
- 
- 	if (!ssm_plist_dnode) {
--		vty_out(vty,
--			"%% pim ssm prefix-list %s doesn't exist\n",
--			argv[5]->arg);
-+		vty_out(vty, "%% pim ssm prefix-list %s doesn't exist\n", plist);
- 		return CMD_WARNING_CONFIG_FAILED;
- 	}
- 
- 	ssm_plist_name = yang_dnode_get_string(ssm_plist_dnode, ".");
- 
--	if (ssm_plist_name && !strcmp(ssm_plist_name, argv[5]->arg)) {
--		nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_DESTROY,
--				      NULL);
--
-+	if (ssm_plist_name && !strcmp(ssm_plist_name, plist)) {
-+		nb_cli_enqueue_change(vty, ssm_plist_xpath, NB_OP_DESTROY, NULL);
- 		return nb_cli_apply_changes(vty, NULL);
- 	}
- 
--	vty_out(vty, "%% pim ssm prefix-list %s doesn't exist\n", argv[5]->arg);
-+	vty_out(vty, "%% pim ssm prefix-list %s doesn't exist\n", plist);
- 
- 	return CMD_WARNING_CONFIG_FAILED;
- }
-+DEFPY_ATTR(no_ip_pim_ssm_prefix_list_name,
-+			  no_ip_pim_ssm_prefix_list_name_cmd,
-+			  "no ip pim ssm prefix-list PREFIXLIST4_NAME$plist",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Source Specific Multicast\n"
-+			  "group range prefix-list filter\n"
-+			  "Name of a prefix-list\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	const struct lyd_node *ssm_plist_dnode;
-+	char ssm_plist_xpath[XPATH_MAXLEN];
-+	const char *ssm_plist_name;
-+	int ret = CMD_WARNING_CONFIG_FAILED;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	snprintf(ssm_plist_xpath, sizeof(ssm_plist_xpath), "%s/ssm-prefix-list",
-+		 VTY_CURR_XPATH);
-+	ssm_plist_dnode = yang_dnode_get(vty->candidate_config->dnode,
-+					 ssm_plist_xpath);
-+	if (ssm_plist_dnode) {
-+		ssm_plist_name = yang_dnode_get_string(ssm_plist_dnode, ".");
-+		if (ssm_plist_name && !strcmp(ssm_plist_name, plist)) {
-+			nb_cli_enqueue_change(vty, ssm_plist_xpath,
-+					      NB_OP_DESTROY, NULL);
-+			ret = nb_cli_apply_changes(vty, NULL);
-+		} else {
-+			vty_out(vty, "%% pim ssm prefix-list %s doesn't exist\n",
-+				plist);
-+		}
-+	} else {
-+		vty_out(vty, "%% pim ssm prefix-list %s doesn't exist\n", plist);
-+	}
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
- DEFUN (show_ip_pim_ssm_range,
-        show_ip_pim_ssm_range_cmd,
-@@ -3511,135 +4487,354 @@ DEFPY (show_ip_pim_bsr,
- 	return pim_show_bsr_helper(vrf, vty, !!json);
- }
- 
--DEFUN (ip_ssmpingd,
--       ip_ssmpingd_cmd,
--       "ip ssmpingd [A.B.C.D]",
--       IP_STR
-+DEFPY (pim_ssmpingd,
-+       pim_ssmpingd_cmd,
-+       "ssmpingd [A.B.C.D]$src",
-        CONF_SSMPINGD_STR
-        "Source address\n")
- {
--	int idx_ipv4 = 2;
--	const char *src_str = (argc == 3) ? argv[idx_ipv4]->arg : "0.0.0.0";
-+	if (src_str)
-+		return pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, src_str);
-+	else
-+		return pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, "0.0.0.0");
-+}
-+DEFPY_ATTR(ip_pim_ssmpingd,
-+			  ip_ssmpingd_cmd,
-+			  "ip ssmpingd [A.B.C.D]$src",
-+			  IP_STR
-+			  CONF_SSMPINGD_STR
-+			  "Source address\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
--	return pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, src_str);
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	if (src_str)
-+		ret = pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, src_str);
-+	else
-+		ret = pim_process_ssmpingd_cmd(vty, NB_OP_CREATE, "0.0.0.0");
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFUN (no_ip_ssmpingd,
--       no_ip_ssmpingd_cmd,
--       "no ip ssmpingd [A.B.C.D]",
-+DEFPY (no_pim_ssmpingd,
-+       no_pim_ssmpingd_cmd,
-+       "no ssmpingd [A.B.C.D]$src",
-        NO_STR
--       IP_STR
-        CONF_SSMPINGD_STR
-        "Source address\n")
- {
--	int idx_ipv4 = 3;
--	const char *src_str = (argc == 4) ? argv[idx_ipv4]->arg : "0.0.0.0";
-+	if (src_str)
-+		return pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, src_str);
-+	else
-+		return pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, "0.0.0.0");
-+}
-+DEFPY_ATTR(no_ip_pim_ssmpingd,
-+			  no_ip_ssmpingd_cmd,
-+			  "no ip ssmpingd [A.B.C.D]$src",
-+			  NO_STR
-+			  IP_STR
-+			  CONF_SSMPINGD_STR
-+			  "Source address\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	if (src_str)
-+		ret = pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, src_str);
-+	else
-+		ret = pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, "0.0.0.0");
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
- 
--	return pim_process_ssmpingd_cmd(vty, NB_OP_DESTROY, src_str);
-+	return ret;
- }
- 
--DEFUN (ip_pim_ecmp,
--       ip_pim_ecmp_cmd,
--       "ip pim ecmp",
--       IP_STR
--       "pim multicast routing\n"
-+DEFPY (pim_ecmp,
-+       pim_ecmp_cmd,
-+       "ecmp",
-        "Enable PIM ECMP \n")
- {
--	const char *vrfname;
- 	char ecmp_xpath[XPATH_MAXLEN];
- 
-+	snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp");
-+	nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "true");
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(ip_pim_ecmp,
-+			  ip_pim_ecmp_cmd,
-+			  "ip pim ecmp",
-+			  IP_STR
-+			  PIM_STR
-+			  "Enable PIM ECMP \n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char ecmp_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
--	snprintf(ecmp_xpath, sizeof(ecmp_xpath), FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4");
--	strlcat(ecmp_xpath, "/ecmp", sizeof(ecmp_xpath));
--
-+	snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp");
- 	nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "true");
--	return nb_cli_apply_changes(vty, NULL);
-+	ret = nb_cli_apply_changes(vty, NULL);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFUN (no_ip_pim_ecmp,
--       no_ip_pim_ecmp_cmd,
--       "no ip pim ecmp",
-+DEFPY (no_pim_ecmp,
-+       no_pim_ecmp_cmd,
-+       "no ecmp",
-        NO_STR
--       IP_STR
--       "pim multicast routing\n"
-        "Disable PIM ECMP \n")
- {
--	const char *vrfname;
- 	char ecmp_xpath[XPATH_MAXLEN];
- 
-+	snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp");
-+	nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "false");
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(no_ip_pim_ecmp,
-+			  no_ip_pim_ecmp_cmd,
-+			  "no ip pim ecmp",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Disable PIM ECMP \n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char ecmp_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
--	snprintf(ecmp_xpath, sizeof(ecmp_xpath), FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4");
--	strlcat(ecmp_xpath, "/ecmp", sizeof(ecmp_xpath));
--
-+	snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp");
- 	nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "false");
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	return nb_cli_apply_changes(vty, NULL);
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFUN (ip_pim_ecmp_rebalance,
--       ip_pim_ecmp_rebalance_cmd,
--       "ip pim ecmp rebalance",
--       IP_STR
--       "pim multicast routing\n"
-+DEFPY (pim_ecmp_rebalance,
-+       pim_ecmp_rebalance_cmd,
-+       "ecmp rebalance",
-        "Enable PIM ECMP \n"
-        "Enable PIM ECMP Rebalance\n")
- {
--	const char *vrfname;
- 	char ecmp_xpath[XPATH_MAXLEN];
- 	char ecmp_rebalance_xpath[XPATH_MAXLEN];
- 
-+	snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp");
-+	snprintf(ecmp_rebalance_xpath, sizeof(ecmp_rebalance_xpath),
-+		 "./ecmp-rebalance");
-+
-+	nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "true");
-+	nb_cli_enqueue_change(vty, ecmp_rebalance_xpath, NB_OP_MODIFY, "true");
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(ip_pim_ecmp_rebalance,
-+			  ip_pim_ecmp_rebalance_cmd,
-+			  "ip pim ecmp rebalance",
-+			  IP_STR
-+			  PIM_STR
-+			  "Enable PIM ECMP \n"
-+			  "Enable PIM ECMP Rebalance\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char ecmp_xpath[XPATH_MAXLEN];
-+	char ecmp_rebalance_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
--	snprintf(ecmp_xpath, sizeof(ecmp_xpath), FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4");
--	strlcat(ecmp_xpath, "/ecmp", sizeof(ecmp_xpath));
-+	snprintf(ecmp_xpath, sizeof(ecmp_xpath), "./ecmp");
- 	snprintf(ecmp_rebalance_xpath, sizeof(ecmp_rebalance_xpath),
--		 FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4");
--	strlcat(ecmp_rebalance_xpath, "/ecmp-rebalance",
--		sizeof(ecmp_rebalance_xpath));
--
-+		 "./ecmp-rebalance");
- 	nb_cli_enqueue_change(vty, ecmp_xpath, NB_OP_MODIFY, "true");
- 	nb_cli_enqueue_change(vty, ecmp_rebalance_xpath, NB_OP_MODIFY, "true");
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	return nb_cli_apply_changes(vty, NULL);
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFUN (no_ip_pim_ecmp_rebalance,
--       no_ip_pim_ecmp_rebalance_cmd,
--       "no ip pim ecmp rebalance",
-+DEFPY (no_pim_ecmp_rebalance,
-+       no_pim_ecmp_rebalance_cmd,
-+       "no ecmp rebalance",
-        NO_STR
--       IP_STR
--       "pim multicast routing\n"
-        "Disable PIM ECMP \n"
-        "Disable PIM ECMP Rebalance\n")
- {
--	const char *vrfname;
- 	char ecmp_rebalance_xpath[XPATH_MAXLEN];
- 
-+	snprintf(ecmp_rebalance_xpath, sizeof(ecmp_rebalance_xpath),
-+		 "./ecmp-rebalance");
-+
-+	nb_cli_enqueue_change(vty, ecmp_rebalance_xpath, NB_OP_MODIFY, "false");
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(no_ip_pim_ecmp_rebalance,
-+			  no_ip_pim_ecmp_rebalance_cmd,
-+			  "no ip pim ecmp rebalance",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "Disable PIM ECMP \n"
-+			  "Disable PIM ECMP Rebalance\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char ecmp_rebalance_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
- 	snprintf(ecmp_rebalance_xpath, sizeof(ecmp_rebalance_xpath),
--		 FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4");
--	strlcat(ecmp_rebalance_xpath, "/ecmp-rebalance",
--		sizeof(ecmp_rebalance_xpath));
--
-+		 "./ecmp-rebalance");
- 	nb_cli_enqueue_change(vty, ecmp_rebalance_xpath, NB_OP_MODIFY, "false");
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	return nb_cli_apply_changes(vty, NULL);
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
- DEFUN (interface_ip_igmp,
-@@ -4648,15 +5843,24 @@ DEFPY (debug_pim_zebra,
- 	return CMD_SUCCESS;
- }
- 
--DEFUN(debug_pim_mlag, debug_pim_mlag_cmd, "debug pim mlag",
--      DEBUG_STR DEBUG_PIM_STR DEBUG_PIM_MLAG_STR)
-+DEFUN(debug_pim_mlag,
-+		debug_pim_mlag_cmd,
-+		"debug pim mlag",
-+		DEBUG_STR
-+		DEBUG_PIM_STR
-+		DEBUG_PIM_MLAG_STR)
- {
- 	PIM_DO_DEBUG_MLAG;
- 	return CMD_SUCCESS;
- }
- 
--DEFUN(no_debug_pim_mlag, no_debug_pim_mlag_cmd, "no debug pim mlag",
--      NO_STR DEBUG_STR DEBUG_PIM_STR DEBUG_PIM_MLAG_STR)
-+DEFUN(no_debug_pim_mlag,
-+		no_debug_pim_mlag_cmd,
-+		"no debug pim mlag",
-+		NO_STR
-+		DEBUG_STR
-+		DEBUG_PIM_STR
-+		DEBUG_PIM_MLAG_STR)
- {
- 	PIM_DONT_DEBUG_MLAG;
- 	return CMD_SUCCESS;
-@@ -5016,145 +6220,333 @@ ALIAS(no_ip_pim_bfd, no_ip_pim_bfd_param_cmd,
-       "Desired min transmit interval\n")
- #endif /* !HAVE_BFDD */
- 
--DEFPY(ip_msdp_peer, ip_msdp_peer_cmd,
--      "ip msdp peer A.B.C.D$peer source A.B.C.D$source",
--      IP_STR
-+DEFPY(pim_msdp_peer, pim_msdp_peer_cmd,
-+      "msdp peer A.B.C.D$peer source A.B.C.D$source",
-       CFG_MSDP_STR
-       "Configure MSDP peer\n"
-       "Peer IP address\n"
-       "Source address for TCP connection\n"
-       "Local IP address\n")
- {
--	const char *vrfname;
--	char temp_xpath[XPATH_MAXLEN];
- 	char msdp_peer_source_xpath[XPATH_MAXLEN];
- 
-+	snprintf(msdp_peer_source_xpath, sizeof(msdp_peer_source_xpath),
-+		 "./msdp-peer[peer-ip='%s']/source-ip", peer_str);
-+	nb_cli_enqueue_change(vty, msdp_peer_source_xpath, NB_OP_MODIFY,
-+			      source_str);
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(ip_pim_msdp_peer,
-+			  ip_msdp_peer_cmd,
-+			  "ip msdp peer A.B.C.D$peer source A.B.C.D$source",
-+			  IP_STR
-+			  CFG_MSDP_STR
-+			  "Configure MSDP peer\n"
-+			  "Peer IP address\n"
-+			  "Source address for TCP connection\n"
-+			  "Local IP address\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char msdp_peer_source_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
- 	snprintf(msdp_peer_source_xpath, sizeof(msdp_peer_source_xpath),
--		 FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 "frr-routing:ipv4");
--	snprintf(temp_xpath, sizeof(temp_xpath),
--		 "/msdp-peer[peer-ip='%s']/source-ip", peer_str);
--	strlcat(msdp_peer_source_xpath, temp_xpath,
--		sizeof(msdp_peer_source_xpath));
--
-+		 "./msdp-peer[peer-ip='%s']/source-ip", peer_str);
- 	nb_cli_enqueue_change(vty, msdp_peer_source_xpath, NB_OP_MODIFY,
- 			      source_str);
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	return nb_cli_apply_changes(vty,
--			FRR_PIM_INTERFACE_XPATH, "frr-routing:ipv4");
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFPY(ip_msdp_timers, ip_msdp_timers_cmd,
--      "ip msdp timers (1-65535)$keepalive (1-65535)$holdtime [(1-65535)$connretry]",
--      IP_STR
-+DEFPY(pim_msdp_timers, pim_msdp_timers_cmd,
-+      "msdp timers (1-65535)$keepalive (1-65535)$holdtime [(1-65535)$connretry]",
-       CFG_MSDP_STR
-       "MSDP timers configuration\n"
-       "Keep alive period (in seconds)\n"
-       "Hold time period (in seconds)\n"
-       "Connection retry period (in seconds)\n")
- {
-+	nb_cli_enqueue_change(vty, "./msdp/hold-time", NB_OP_MODIFY,
-+			      holdtime_str);
-+	nb_cli_enqueue_change(vty, "./msdp/keep-alive", NB_OP_MODIFY,
-+			      keepalive_str);
-+	if (connretry_str)
-+		nb_cli_enqueue_change(vty, "./msdp/connection-retry",
-+				      NB_OP_MODIFY, connretry_str);
-+	else
-+		nb_cli_enqueue_change(vty, "./msdp/connection-retry",
-+				      NB_OP_DESTROY, NULL);
-+
-+	nb_cli_apply_changes(vty, NULL);
-+	return CMD_SUCCESS;
-+}
-+DEFPY_ATTR(ip_pim_msdp_timers,
-+			  ip_msdp_timers_cmd,
-+			  "ip msdp timers (1-65535)$keepalive (1-65535)$holdtime [(1-65535)$connretry]",
-+			  IP_STR
-+			  CFG_MSDP_STR
-+			  "MSDP timers configuration\n"
-+			  "Keep alive period (in seconds)\n"
-+			  "Hold time period (in seconds)\n"
-+			  "Connection retry period (in seconds)\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
- 	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
--	nb_cli_enqueue_change(vty, "./hold-time", NB_OP_MODIFY, holdtime_str);
--	nb_cli_enqueue_change(vty, "./keep-alive", NB_OP_MODIFY, keepalive_str);
-+	nb_cli_enqueue_change(vty, "./msdp/hold-time", NB_OP_MODIFY,
-+			      holdtime_str);
-+	nb_cli_enqueue_change(vty, "./msdp/keep-alive", NB_OP_MODIFY,
-+			      keepalive_str);
- 	if (connretry_str)
--		nb_cli_enqueue_change(vty, "./connection-retry", NB_OP_MODIFY,
--				      connretry_str);
-+		nb_cli_enqueue_change(vty, "./msdp/connection-retry",
-+				      NB_OP_MODIFY, connretry_str);
- 	else
--		nb_cli_enqueue_change(vty, "./connection-retry", NB_OP_DESTROY,
--				      NULL);
-+		nb_cli_enqueue_change(vty, "./msdp/connection-retry",
-+				      NB_OP_DESTROY, NULL);
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	nb_cli_apply_changes(vty, FRR_PIM_MSDP_XPATH, "frr-pim:pimd", "pim",
--			     vrfname, "frr-routing:ipv4");
--	return CMD_SUCCESS;
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFPY(no_ip_msdp_timers, no_ip_msdp_timers_cmd,
--      "no ip msdp timers [(1-65535) (1-65535) [(1-65535)]]",
-+DEFPY(no_pim_msdp_timers, no_pim_msdp_timers_cmd,
-+      "no msdp timers [(1-65535) (1-65535) [(1-65535)]]",
-       NO_STR
--      IP_STR
-       CFG_MSDP_STR
-       "MSDP timers configuration\n"
-       IGNORED_IN_NO_STR
-       IGNORED_IN_NO_STR
-       IGNORED_IN_NO_STR)
- {
-+	nb_cli_enqueue_change(vty, "./msdp/hold-time", NB_OP_DESTROY, NULL);
-+	nb_cli_enqueue_change(vty, "./msdp/keep-alive", NB_OP_DESTROY, NULL);
-+	nb_cli_enqueue_change(vty, "./msdp/connection-retry", NB_OP_DESTROY,
-+			      NULL);
-+	nb_cli_apply_changes(vty, NULL);
-+	return CMD_SUCCESS;
-+}
-+DEFPY_ATTR(no_ip_pim_msdp_timers,
-+			  no_ip_msdp_timers_cmd,
-+			  "no ip msdp timers [(1-65535) (1-65535) [(1-65535)]]",
-+			  NO_STR
-+			  IP_STR
-+			  CFG_MSDP_STR
-+			  "MSDP timers configuration\n"
-+			  IGNORED_IN_NO_STR
-+			  IGNORED_IN_NO_STR
-+			  IGNORED_IN_NO_STR,
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	int ret;
- 	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
--	nb_cli_enqueue_change(vty, "./hold-time", NB_OP_DESTROY, NULL);
--	nb_cli_enqueue_change(vty, "./keep-alive", NB_OP_DESTROY, NULL);
--	nb_cli_enqueue_change(vty, "./connection-retry", NB_OP_DESTROY, NULL);
-+	nb_cli_enqueue_change(vty, "./msdp/hold-time", NB_OP_DESTROY, NULL);
-+	nb_cli_enqueue_change(vty, "./msdp/keep-alive", NB_OP_DESTROY, NULL);
-+	nb_cli_enqueue_change(vty, "./msdp/connection-retry", NB_OP_DESTROY,
-+			      NULL);
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	nb_cli_apply_changes(vty, FRR_PIM_MSDP_XPATH, "frr-pim:pimd", "pim",
--			     vrfname, "frr-routing:ipv4");
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
- 
--	return CMD_SUCCESS;
-+	return ret;
- }
- 
--DEFUN (no_ip_msdp_peer,
--       no_ip_msdp_peer_cmd,
--       "no ip msdp peer A.B.C.D",
-+DEFPY (no_pim_msdp_peer,
-+       no_pim_msdp_peer_cmd,
-+       "no msdp peer A.B.C.D",
-        NO_STR
--       IP_STR
-        CFG_MSDP_STR
-        "Delete MSDP peer\n"
-        "peer ip address\n")
- {
--	const char *vrfname;
- 	char msdp_peer_xpath[XPATH_MAXLEN];
--	char temp_xpath[XPATH_MAXLEN];
-+
-+	snprintf(msdp_peer_xpath, sizeof(msdp_peer_xpath),
-+		 "./msdp-peer[peer-ip='%s']", peer_str);
-+	nb_cli_enqueue_change(vty, msdp_peer_xpath, NB_OP_DESTROY, NULL);
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(no_ip_pim_msdp_peer,
-+			  no_ip_msdp_peer_cmd,
-+			  "no ip msdp peer A.B.C.D",
-+			  NO_STR
-+			  IP_STR
-+			  CFG_MSDP_STR
-+			  "Delete MSDP peer\n"
-+			  "peer ip address\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char msdp_peer_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
- 	snprintf(msdp_peer_xpath, sizeof(msdp_peer_xpath),
--		 FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4");
--	snprintf(temp_xpath, sizeof(temp_xpath),
--		 "/msdp-peer[peer-ip='%s']",
--		 argv[4]->arg);
--
--	strlcat(msdp_peer_xpath, temp_xpath, sizeof(msdp_peer_xpath));
--
-+		 "./msdp-peer[peer-ip='%s']", peer_str);
- 	nb_cli_enqueue_change(vty, msdp_peer_xpath, NB_OP_DESTROY, NULL);
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	return nb_cli_apply_changes(vty, NULL);
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFPY(ip_msdp_mesh_group_member,
--      ip_msdp_mesh_group_member_cmd,
--      "ip msdp mesh-group WORD$gname member A.B.C.D$maddr",
--      IP_STR
-+DEFPY(pim_msdp_mesh_group_member,
-+      pim_msdp_mesh_group_member_cmd,
-+      "msdp mesh-group WORD$gname member A.B.C.D$maddr",
-       CFG_MSDP_STR
-       "Configure MSDP mesh-group\n"
-       "Mesh group name\n"
-       "Mesh group member\n"
-       "Peer IP address\n")
- {
--	const char *vrfname;
- 	char xpath_value[XPATH_MAXLEN];
- 
-+	/* Create mesh group. */
-+	snprintf(xpath_value, sizeof(xpath_value),
-+		 "./msdp-mesh-groups[name='%s']", gname);
-+	nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL);
-+
-+	/* Create mesh group member. */
-+	strlcat(xpath_value, "/members[address='", sizeof(xpath_value));
-+	strlcat(xpath_value, maddr_str, sizeof(xpath_value));
-+	strlcat(xpath_value, "']", sizeof(xpath_value));
-+	nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL);
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(ip_pim_msdp_mesh_group_member,
-+			  ip_msdp_mesh_group_member_cmd,
-+			  "ip msdp mesh-group WORD$gname member A.B.C.D$maddr",
-+			  IP_STR
-+			  CFG_MSDP_STR
-+			  "Configure MSDP mesh-group\n"
-+			  "Mesh group name\n"
-+			  "Mesh group member\n"
-+			  "Peer IP address\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char xpath_value[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
- 	/* Create mesh group. */
- 	snprintf(xpath_value, sizeof(xpath_value),
--		 FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']",
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname);
-+		 "./msdp-mesh-groups[name='%s']", gname);
- 	nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL);
- 
- 	/* Create mesh group member. */
-@@ -5162,33 +6554,32 @@ DEFPY(ip_msdp_mesh_group_member,
- 	strlcat(xpath_value, maddr_str, sizeof(xpath_value));
- 	strlcat(xpath_value, "']", sizeof(xpath_value));
- 	nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL);
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	return nb_cli_apply_changes(vty, NULL);
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFPY(no_ip_msdp_mesh_group_member,
--      no_ip_msdp_mesh_group_member_cmd,
--      "no ip msdp mesh-group WORD$gname member A.B.C.D$maddr",
-+DEFPY(no_pim_msdp_mesh_group_member,
-+      no_pim_msdp_mesh_group_member_cmd,
-+      "no msdp mesh-group WORD$gname member A.B.C.D$maddr",
-       NO_STR
--      IP_STR
-       CFG_MSDP_STR
-       "Delete MSDP mesh-group member\n"
-       "Mesh group name\n"
-       "Mesh group member\n"
-       "Peer IP address\n")
- {
--	const char *vrfname;
- 	char xpath_value[XPATH_MAXLEN];
- 	char xpath_member_value[XPATH_MAXLEN];
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
- 	/* Get mesh group base XPath. */
- 	snprintf(xpath_value, sizeof(xpath_value),
--		 FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']",
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname);
-+		 "%s/msdp-mesh-groups[name='%s']", VTY_CURR_XPATH, gname);
- 
- 	if (!yang_dnode_exists(vty->candidate_config->dnode, xpath_value)) {
- 		vty_out(vty, "%% mesh-group does not exist\n");
-@@ -5217,59 +6608,221 @@ DEFPY(no_ip_msdp_mesh_group_member,
- 
- 	return nb_cli_apply_changes(vty, NULL);
- }
-+DEFPY_ATTR(no_ip_pim_msdp_mesh_group_member,
-+			  no_ip_msdp_mesh_group_member_cmd,
-+			  "no ip msdp mesh-group WORD$gname member A.B.C.D$maddr",
-+			  NO_STR
-+			  IP_STR
-+			  CFG_MSDP_STR
-+			  "Delete MSDP mesh-group member\n"
-+			  "Mesh group name\n"
-+			  "Mesh group member\n"
-+			  "Peer IP address\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char xpath_value[XPATH_MAXLEN];
-+	char xpath_member_value[XPATH_MAXLEN];
-+	int ret = CMD_WARNING_CONFIG_FAILED;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
--DEFPY(ip_msdp_mesh_group_source,
--      ip_msdp_mesh_group_source_cmd,
--      "ip msdp mesh-group WORD$gname source A.B.C.D$saddr",
--      IP_STR
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	/* Get mesh group base XPath. */
-+	snprintf(xpath_value, sizeof(xpath_value),
-+		 "%s/msdp-mesh-groups[name='%s']", VTY_CURR_XPATH, gname);
-+
-+	if (yang_dnode_exists(vty->candidate_config->dnode, xpath_value)) {
-+		/* Remove mesh group member. */
-+		strlcpy(xpath_member_value, xpath_value,
-+			sizeof(xpath_member_value));
-+		strlcat(xpath_member_value, "/members[address='",
-+			sizeof(xpath_member_value));
-+		strlcat(xpath_member_value, maddr_str,
-+			sizeof(xpath_member_value));
-+		strlcat(xpath_member_value, "']", sizeof(xpath_member_value));
-+		if (yang_dnode_exists(vty->candidate_config->dnode,
-+				      xpath_member_value)) {
-+			nb_cli_enqueue_change(vty, xpath_member_value,
-+					      NB_OP_DESTROY, NULL);
-+
-+			/*
-+			 * If this is the last member, then we must remove the group altogether
-+			 * to not break legacy CLI behaviour.
-+			 */
-+			pim_cli_legacy_mesh_group_behavior(vty, gname);
-+			ret = nb_cli_apply_changes(vty, NULL);
-+		} else {
-+			vty_out(vty, "%% mesh-group member does not exist\n");
-+		}
-+	} else {
-+		vty_out(vty, "%% mesh-group does not exist\n");
-+	}
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY(pim_msdp_mesh_group_source,
-+      pim_msdp_mesh_group_source_cmd,
-+      "msdp mesh-group WORD$gname source A.B.C.D$saddr",
-       CFG_MSDP_STR
-       "Configure MSDP mesh-group\n"
-       "Mesh group name\n"
-       "Mesh group local address\n"
-       "Source IP address for the TCP connection\n")
- {
--	const char *vrfname;
- 	char xpath_value[XPATH_MAXLEN];
- 
-+	/* Create mesh group. */
-+	snprintf(xpath_value, sizeof(xpath_value),
-+		 "./msdp-mesh-groups[name='%s']", gname);
-+	nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL);
-+
-+	/* Create mesh group source. */
-+	strlcat(xpath_value, "/source", sizeof(xpath_value));
-+	nb_cli_enqueue_change(vty, xpath_value, NB_OP_MODIFY, saddr_str);
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(ip_pim_msdp_mesh_group_source,
-+			  ip_msdp_mesh_group_source_cmd,
-+			  "ip msdp mesh-group WORD$gname source A.B.C.D$saddr",
-+			  IP_STR
-+			  CFG_MSDP_STR
-+			  "Configure MSDP mesh-group\n"
-+			  "Mesh group name\n"
-+			  "Mesh group local address\n"
-+			  "Source IP address for the TCP connection\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char xpath_value[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
- 	/* Create mesh group. */
- 	snprintf(xpath_value, sizeof(xpath_value),
--		 FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']",
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname);
-+		 "./msdp-mesh-groups[name='%s']", gname);
- 	nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL);
--
- 	/* Create mesh group source. */
- 	strlcat(xpath_value, "/source", sizeof(xpath_value));
- 	nb_cli_enqueue_change(vty, xpath_value, NB_OP_MODIFY, saddr_str);
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	return nb_cli_apply_changes(vty, NULL);
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFPY(no_ip_msdp_mesh_group_source,
--      no_ip_msdp_mesh_group_source_cmd,
--      "no ip msdp mesh-group WORD$gname source [A.B.C.D]",
-+DEFPY(no_pim_msdp_mesh_group_source,
-+      no_pim_msdp_mesh_group_source_cmd,
-+      "no msdp mesh-group WORD$gname source [A.B.C.D]",
-       NO_STR
--      IP_STR
-       CFG_MSDP_STR
-       "Delete MSDP mesh-group source\n"
-       "Mesh group name\n"
-       "Mesh group source\n"
-       "Mesh group local address\n")
- {
--	const char *vrfname;
- 	char xpath_value[XPATH_MAXLEN];
- 
-+	/* Get mesh group base XPath. */
-+	snprintf(xpath_value, sizeof(xpath_value),
-+		 "./msdp-mesh-groups[name='%s']", gname);
-+	nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL);
-+
-+	/* Create mesh group source. */
-+	strlcat(xpath_value, "/source", sizeof(xpath_value));
-+	nb_cli_enqueue_change(vty, xpath_value, NB_OP_DESTROY, NULL);
-+
-+	/*
-+	 * If this is the last member, then we must remove the group altogether
-+	 * to not break legacy CLI behaviour.
-+	 */
-+	pim_cli_legacy_mesh_group_behavior(vty, gname);
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(no_ip_pim_msdp_mesh_group_source,
-+			  no_ip_msdp_mesh_group_source_cmd,
-+			  "no ip msdp mesh-group WORD$gname source [A.B.C.D]",
-+			  NO_STR
-+			  IP_STR
-+			  CFG_MSDP_STR
-+			  "Delete MSDP mesh-group source\n"
-+			  "Mesh group name\n"
-+			  "Mesh group source\n"
-+			  "Mesh group local address\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char xpath_value[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
- 	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
- 		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
- 	/* Get mesh group base XPath. */
- 	snprintf(xpath_value, sizeof(xpath_value),
--		 FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']",
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname);
-+		 "./msdp-mesh-groups[name='%s']", gname);
- 	nb_cli_enqueue_change(vty, xpath_value, NB_OP_CREATE, NULL);
- 
- 	/* Create mesh group source. */
-@@ -5281,36 +6834,83 @@ DEFPY(no_ip_msdp_mesh_group_source,
- 	 * to not break legacy CLI behaviour.
- 	 */
- 	pim_cli_legacy_mesh_group_behavior(vty, gname);
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--	return nb_cli_apply_changes(vty, NULL);
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
- }
- 
--DEFPY(no_ip_msdp_mesh_group,
--      no_ip_msdp_mesh_group_cmd,
--      "no ip msdp mesh-group WORD$gname",
-+DEFPY(no_pim_msdp_mesh_group,
-+      no_pim_msdp_mesh_group_cmd,
-+      "no msdp mesh-group WORD$gname",
-       NO_STR
--      IP_STR
-       CFG_MSDP_STR
-       "Delete MSDP mesh-group\n"
-       "Mesh group name\n")
- {
--	const char *vrfname;
- 	char xpath_value[XPATH_MAXLEN];
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
- 	/* Get mesh group base XPath. */
- 	snprintf(xpath_value, sizeof(xpath_value),
--		 FRR_PIM_VRF_XPATH "/msdp-mesh-groups[name='%s']",
--		 "frr-pim:pimd", "pim", vrfname, "frr-routing:ipv4", gname);
-+		 "%s/msdp-mesh-groups[name='%s']", VTY_CURR_XPATH, gname);
- 	if (!yang_dnode_exists(vty->candidate_config->dnode, xpath_value))
- 		return CMD_SUCCESS;
- 
- 	nb_cli_enqueue_change(vty, xpath_value, NB_OP_DESTROY, NULL);
- 	return nb_cli_apply_changes(vty, NULL);
- }
-+DEFPY_ATTR(no_ip_pim_msdp_mesh_group,
-+			  no_ip_msdp_mesh_group_cmd,
-+			  "no ip msdp mesh-group WORD$gname",
-+			  NO_STR
-+			  IP_STR
-+			  CFG_MSDP_STR
-+			  "Delete MSDP mesh-group\n"
-+			  "Mesh group name\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char xpath_value[XPATH_MAXLEN];
-+	int ret = CMD_SUCCESS;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
-+
-+	/* Get mesh group base XPath. */
-+	snprintf(xpath_value, sizeof(xpath_value),
-+		 "%s/msdp-mesh-groups[name='%s']", VTY_CURR_XPATH, gname);
-+	if (yang_dnode_exists(vty->candidate_config->dnode, xpath_value)) {
-+		nb_cli_enqueue_change(vty, xpath_value, NB_OP_DESTROY, NULL);
-+		ret = nb_cli_apply_changes(vty, NULL);
-+	}
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
- 
- static void ip_msdp_show_mesh_group(struct vty *vty, struct pim_msdp_mg *mg,
- 				    struct json_object *json)
-@@ -5329,7 +6929,8 @@ static void ip_msdp_show_mesh_group(struct vty *vty, struct pim_msdp_mg *mg,
- 	if (json) {
- 		/* currently there is only one mesh group but we should still
- 		 * make
--		 * it a dict with mg-name as key */
-+		 * it a dict with mg-name as key
-+		 */
- 		json_mg_row = json_object_new_object();
- 		json_object_string_add(json_mg_row, "name",
- 				       mg->mesh_group_name);
-@@ -6311,119 +7912,224 @@ DEFUN_HIDDEN (show_ip_pim_vxlan_sg_work,
- 	return CMD_SUCCESS;
- }
- 
--DEFUN_HIDDEN (no_ip_pim_mlag,
--	      no_ip_pim_mlag_cmd,
--	      "no ip pim mlag",
-+DEFPY_HIDDEN (no_pim_mlag,
-+	      no_pim_mlag_cmd,
-+	      "no mlag",
- 	      NO_STR
--	      IP_STR
--	      PIM_STR
- 	      "MLAG\n")
- {
- 	char mlag_xpath[XPATH_MAXLEN];
- 
--	snprintf(mlag_xpath, sizeof(mlag_xpath), FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", "default", "frr-routing:ipv4");
--	strlcat(mlag_xpath, "/mlag", sizeof(mlag_xpath));
-+	snprintf(mlag_xpath, sizeof(mlag_xpath), "./mlag");
-+	nb_cli_enqueue_change(vty, mlag_xpath, NB_OP_DESTROY, NULL);
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+DEFPY_ATTR(no_ip_pim_mlag,
-+			  no_ip_pim_mlag_cmd,
-+			  "no ip pim mlag",
-+			  NO_STR
-+			  IP_STR
-+			  PIM_STR
-+			  "MLAG\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
-+{
-+	char mlag_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
-+
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
-+	snprintf(mlag_xpath, sizeof(mlag_xpath), "./mlag");
- 	nb_cli_enqueue_change(vty, mlag_xpath, NB_OP_DESTROY, NULL);
-+	ret = nb_cli_apply_changes(vty, NULL);
-+
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
-+
-+	return ret;
-+}
-+
-+DEFPY_HIDDEN (pim_mlag,
-+	      pim_mlag_cmd,
-+	      "mlag INTERFACE$iface role [primary|secondary]$role state [up|down]$state addr A.B.C.D$addr",
-+	      "MLAG\n"
-+	      "peerlink sub interface\n"
-+	      "MLAG role\n"
-+	      "MLAG role primary\n"
-+	      "MLAG role secondary\n"
-+	      "peer session state\n"
-+	      "peer session state up\n"
-+	      "peer session state down\n"
-+	      "configure PIP\n"
-+	      "unique ip address\n")
-+{
-+	char mlag_peerlink_rif_xpath[XPATH_MAXLEN];
-+	char mlag_my_role_xpath[XPATH_MAXLEN];
-+	char mlag_peer_state_xpath[XPATH_MAXLEN];
-+	char mlag_reg_address_xpath[XPATH_MAXLEN];
-+
-+	snprintf(mlag_peerlink_rif_xpath, sizeof(mlag_peerlink_rif_xpath),
-+		 "./mlag/peerlink-rif");
-+	nb_cli_enqueue_change(vty, mlag_peerlink_rif_xpath, NB_OP_MODIFY, iface);
-+
-+	snprintf(mlag_my_role_xpath, sizeof(mlag_my_role_xpath),
-+		 "./mlag/my-role");
-+	if (!strcmp(role, "primary")) {
-+		nb_cli_enqueue_change(vty, mlag_my_role_xpath, NB_OP_MODIFY,
-+				      "MLAG_ROLE_PRIMARY");
-+	} else if (!strcmp(role, "secondary")) {
-+		nb_cli_enqueue_change(vty, mlag_my_role_xpath, NB_OP_MODIFY,
-+				      "MLAG_ROLE_SECONDARY");
-+	} else {
-+		vty_out(vty, "unknown MLAG role %s\n", role);
-+		return CMD_WARNING;
-+	}
-+
-+	snprintf(mlag_peer_state_xpath, sizeof(mlag_peer_state_xpath),
-+		 "./mlag/peer-state");
-+	if (!strcmp(state, "up")) {
-+		nb_cli_enqueue_change(vty, mlag_peer_state_xpath, NB_OP_MODIFY,
-+				      "true");
-+	} else if (strcmp(state, "down")) {
-+		nb_cli_enqueue_change(vty, mlag_peer_state_xpath, NB_OP_MODIFY,
-+				      "false");
-+	} else {
-+		vty_out(vty, "unknown MLAG state %s\n", state);
-+		return CMD_WARNING;
-+	}
- 
-+	snprintf(mlag_reg_address_xpath, sizeof(mlag_reg_address_xpath),
-+		 "./mlag/reg-address");
-+	nb_cli_enqueue_change(vty, mlag_reg_address_xpath, NB_OP_MODIFY,
-+			      addr_str);
- 
- 	return nb_cli_apply_changes(vty, NULL);
- }
--
--DEFUN_HIDDEN (ip_pim_mlag,
--	      ip_pim_mlag_cmd,
--	      "ip pim mlag INTERFACE role [primary|secondary] state [up|down] addr A.B.C.D",
--	      IP_STR
--	      PIM_STR
--	      "MLAG\n"
--	      "peerlink sub interface\n"
--	      "MLAG role\n"
--	      "MLAG role primary\n"
--	      "MLAG role secondary\n"
--	      "peer session state\n"
--	      "peer session state up\n"
--	      "peer session state down\n"
--	      "configure PIP\n"
--	      "unique ip address\n")
-+DEFPY_ATTR(ip_pim_mlag,
-+			  ip_pim_mlag_cmd,
-+			  "ip pim mlag INTERFACE$iface role [primary|secondary]$role state [up|down]$state addr A.B.C.D$addr",
-+			  IP_STR
-+			  PIM_STR
-+			  "MLAG\n"
-+			  "peerlink sub interface\n"
-+			  "MLAG role\n"
-+			  "MLAG role primary\n"
-+			  "MLAG role secondary\n"
-+			  "peer session state\n"
-+			  "peer session state up\n"
-+			  "peer session state down\n"
-+			  "configure PIP\n"
-+			  "unique ip address\n",
-+			  CMD_ATTR_HIDDEN | CMD_ATTR_DEPRECATED)
- {
--	int idx;
- 	char mlag_peerlink_rif_xpath[XPATH_MAXLEN];
- 	char mlag_my_role_xpath[XPATH_MAXLEN];
- 	char mlag_peer_state_xpath[XPATH_MAXLEN];
- 	char mlag_reg_address_xpath[XPATH_MAXLEN];
-+	int ret;
-+	const char *vrfname;
-+	char xpath[XPATH_MAXLEN];
-+	int orig_node = -1;
- 
--	snprintf(mlag_peerlink_rif_xpath, sizeof(mlag_peerlink_rif_xpath),
--		 FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", "default", "frr-routing:ipv4");
--	strlcat(mlag_peerlink_rif_xpath, "/mlag/peerlink-rif",
--		sizeof(mlag_peerlink_rif_xpath));
-+	vrfname = pim_cli_get_vrf_name(vty);
-+	if (vrfname) {
-+		snprintf(xpath, sizeof(xpath), FRR_PIM_VRF_XPATH,
-+			 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
-+		nb_cli_enqueue_change(vty, xpath, NB_OP_CREATE, NULL);
-+		if (nb_cli_apply_changes_clear_pending(vty, NULL) ==
-+		    CMD_SUCCESS) {
-+			orig_node = vty->node;
-+			VTY_PUSH_XPATH(PIM_NODE, xpath);
-+		} else {
-+			return CMD_WARNING_CONFIG_FAILED;
-+		}
-+	} else {
-+		vty_out(vty, "%% Failed to determine vrf name\n");
-+		return CMD_WARNING_CONFIG_FAILED;
-+	}
- 
--	idx = 3;
--	nb_cli_enqueue_change(vty, mlag_peerlink_rif_xpath, NB_OP_MODIFY,
--			      argv[idx]->arg);
-+	snprintf(mlag_peerlink_rif_xpath, sizeof(mlag_peerlink_rif_xpath),
-+		 "./mlag/peerlink-rif");
-+	nb_cli_enqueue_change(vty, mlag_peerlink_rif_xpath, NB_OP_MODIFY, iface);
- 
- 	snprintf(mlag_my_role_xpath, sizeof(mlag_my_role_xpath),
--		 FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", "default", "frr-routing:ipv4");
--	strlcat(mlag_my_role_xpath, "/mlag/my-role",
--		sizeof(mlag_my_role_xpath));
--
--	idx += 2;
--	if (!strcmp(argv[idx]->arg, "primary")) {
-+		 "./mlag/my-role");
-+	if (!strcmp(role, "primary")) {
- 		nb_cli_enqueue_change(vty, mlag_my_role_xpath, NB_OP_MODIFY,
- 				      "MLAG_ROLE_PRIMARY");
--
--	} else if (!strcmp(argv[idx]->arg, "secondary")) {
-+	} else if (!strcmp(role, "secondary")) {
- 		nb_cli_enqueue_change(vty, mlag_my_role_xpath, NB_OP_MODIFY,
- 				      "MLAG_ROLE_SECONDARY");
--
- 	} else {
--		vty_out(vty, "unknown MLAG role %s\n", argv[idx]->arg);
--		return CMD_WARNING;
-+		vty_out(vty, "unknown MLAG role %s\n", role);
-+		ret = CMD_WARNING;
-+		goto done;
- 	}
- 
- 	snprintf(mlag_peer_state_xpath, sizeof(mlag_peer_state_xpath),
--		 FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", "default", "frr-routing:ipv4");
--	strlcat(mlag_peer_state_xpath, "/mlag/peer-state",
--		sizeof(mlag_peer_state_xpath));
--
--	idx += 2;
--	if (!strcmp(argv[idx]->arg, "up")) {
-+		 "./mlag/peer-state");
-+	if (!strcmp(state, "up")) {
- 		nb_cli_enqueue_change(vty, mlag_peer_state_xpath, NB_OP_MODIFY,
- 				      "true");
--
--	} else if (strcmp(argv[idx]->arg, "down")) {
-+	} else if (strcmp(state, "down")) {
- 		nb_cli_enqueue_change(vty, mlag_peer_state_xpath, NB_OP_MODIFY,
- 				      "false");
--
- 	} else {
--		vty_out(vty, "unknown MLAG state %s\n", argv[idx]->arg);
--		return CMD_WARNING;
-+		vty_out(vty, "unknown MLAG state %s\n", state);
-+		ret = CMD_WARNING;
-+		goto done;
- 	}
- 
- 	snprintf(mlag_reg_address_xpath, sizeof(mlag_reg_address_xpath),
--		 FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", "default", "frr-routing:ipv4");
--	strlcat(mlag_reg_address_xpath, "/mlag/reg-address",
--		sizeof(mlag_reg_address_xpath));
--
--	idx += 2;
-+		 "./mlag/reg-address");
- 	nb_cli_enqueue_change(vty, mlag_reg_address_xpath, NB_OP_MODIFY,
--			      argv[idx]->arg);
-+			      addr_str);
- 
--	return nb_cli_apply_changes(vty, NULL);
--}
-+	ret = nb_cli_apply_changes(vty, NULL);
- 
--void pim_cmd_init(void)
--{
--	if_cmd_init(pim_interface_config_write);
-+done:
-+	if (orig_node != -1) {
-+		vty->node = orig_node;
-+		vty->xpath_index--;
-+	}
- 
--	install_node(&debug_node);
-+	return ret;
-+}
- 
--	install_element(ENABLE_NODE, &pim_test_sg_keepalive_cmd);
-+struct cmd_node pim_node = {
-+	.name = "pim",
-+	.node = PIM_NODE,
-+	.parent_node = CONFIG_NODE,
-+	.prompt = "%s(config-pim)# ",
-+	.config_write = pim_router_config_write,
-+};
- 
-+/* This function installs all of the deprecated PIM configuration commands that live in the global config and/or VRF nodes
-+ * This configuration has been moved to the new 'router pim' config node instead like all the other routing protocols.
-+ * No new commands should be added here.
-+ */
-+static void pim_install_deprecated(void)
-+{
- 	install_element(CONFIG_NODE, &ip_pim_rp_cmd);
- 	install_element(VRF_NODE, &ip_pim_rp_cmd);
- 	install_element(CONFIG_NODE, &no_ip_pim_rp_cmd);
-@@ -6449,8 +8155,8 @@ void pim_cmd_init(void)
- 	install_element(CONFIG_NODE,
- 			&no_ip_pim_spt_switchover_infinity_plist_cmd);
- 	install_element(VRF_NODE, &no_ip_pim_spt_switchover_infinity_plist_cmd);
--	install_element(CONFIG_NODE, &pim_register_accept_list_cmd);
--	install_element(VRF_NODE, &pim_register_accept_list_cmd);
-+	install_element(CONFIG_NODE, &ip_pim_register_accept_list_cmd);
-+	install_element(VRF_NODE, &ip_pim_register_accept_list_cmd);
- 	install_element(CONFIG_NODE, &ip_pim_joinprune_time_cmd);
- 	install_element(CONFIG_NODE, &no_ip_pim_joinprune_time_cmd);
- 	install_element(CONFIG_NODE, &ip_pim_keep_alive_cmd);
-@@ -6467,14 +8173,6 @@ void pim_cmd_init(void)
- 	install_element(VRF_NODE, &ip_pim_v6_secondary_cmd);
- 	install_element(CONFIG_NODE, &no_ip_pim_v6_secondary_cmd);
- 	install_element(VRF_NODE, &no_ip_pim_v6_secondary_cmd);
--	install_element(CONFIG_NODE, &ip_ssmpingd_cmd);
--	install_element(VRF_NODE, &ip_ssmpingd_cmd);
--	install_element(CONFIG_NODE, &no_ip_ssmpingd_cmd);
--	install_element(VRF_NODE, &no_ip_ssmpingd_cmd);
--	install_element(CONFIG_NODE, &ip_msdp_peer_cmd);
--	install_element(VRF_NODE, &ip_msdp_peer_cmd);
--	install_element(CONFIG_NODE, &no_ip_msdp_peer_cmd);
--	install_element(VRF_NODE, &no_ip_msdp_peer_cmd);
- 	install_element(CONFIG_NODE, &ip_pim_ecmp_cmd);
- 	install_element(VRF_NODE, &ip_pim_ecmp_cmd);
- 	install_element(CONFIG_NODE, &no_ip_pim_ecmp_cmd);
-@@ -6485,10 +8183,87 @@ void pim_cmd_init(void)
- 	install_element(VRF_NODE, &no_ip_pim_ecmp_rebalance_cmd);
- 	install_element(CONFIG_NODE, &ip_pim_mlag_cmd);
- 	install_element(CONFIG_NODE, &no_ip_pim_mlag_cmd);
--	install_element(CONFIG_NODE, &ip_igmp_group_watermark_cmd);
--	install_element(VRF_NODE, &ip_igmp_group_watermark_cmd);
--	install_element(CONFIG_NODE, &no_ip_igmp_group_watermark_cmd);
--	install_element(VRF_NODE, &no_ip_igmp_group_watermark_cmd);
-+
-+	install_element(CONFIG_NODE, &ip_ssmpingd_cmd);
-+	install_element(VRF_NODE, &ip_ssmpingd_cmd);
-+	install_element(CONFIG_NODE, &no_ip_ssmpingd_cmd);
-+	install_element(VRF_NODE, &no_ip_ssmpingd_cmd);
-+
-+	install_element(CONFIG_NODE, &ip_msdp_peer_cmd);
-+	install_element(VRF_NODE, &ip_msdp_peer_cmd);
-+	install_element(CONFIG_NODE, &no_ip_msdp_peer_cmd);
-+	install_element(VRF_NODE, &no_ip_msdp_peer_cmd);
-+	install_element(CONFIG_NODE, &ip_msdp_timers_cmd);
-+	install_element(VRF_NODE, &ip_msdp_timers_cmd);
-+	install_element(CONFIG_NODE, &no_ip_msdp_timers_cmd);
-+	install_element(VRF_NODE, &no_ip_msdp_timers_cmd);
-+	install_element(CONFIG_NODE, &ip_msdp_mesh_group_member_cmd);
-+	install_element(VRF_NODE, &ip_msdp_mesh_group_member_cmd);
-+	install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_member_cmd);
-+	install_element(VRF_NODE, &no_ip_msdp_mesh_group_member_cmd);
-+	install_element(CONFIG_NODE, &ip_msdp_mesh_group_source_cmd);
-+	install_element(VRF_NODE, &ip_msdp_mesh_group_source_cmd);
-+	install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_source_cmd);
-+	install_element(VRF_NODE, &no_ip_msdp_mesh_group_source_cmd);
-+	install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_cmd);
-+	install_element(VRF_NODE, &no_ip_msdp_mesh_group_cmd);
-+}
-+
-+void pim_cmd_init(void)
-+{
-+	if_cmd_init(pim_interface_config_write);
-+
-+	install_node(&debug_node);
-+
-+	install_element(CONFIG_NODE, &router_pim_cmd);
-+	install_element(CONFIG_NODE, &no_router_pim_cmd);
-+
-+	install_node(&pim_node);
-+	install_default(PIM_NODE);
-+
-+	install_element(PIM_NODE, &pim_rp_cmd);
-+	install_element(PIM_NODE, &no_pim_rp_cmd);
-+	install_element(PIM_NODE, &pim_rp_prefix_list_cmd);
-+	install_element(PIM_NODE, &no_pim_rp_prefix_list_cmd);
-+	install_element(PIM_NODE, &no_pim_ssm_prefix_list_cmd);
-+	install_element(PIM_NODE, &no_pim_ssm_prefix_list_name_cmd);
-+	install_element(PIM_NODE, &pim_ssm_prefix_list_cmd);
-+	install_element(PIM_NODE, &pim_register_suppress_cmd);
-+	install_element(PIM_NODE, &no_pim_register_suppress_cmd);
-+	install_element(PIM_NODE, &pim_spt_switchover_infinity_cmd);
-+	install_element(PIM_NODE, &pim_spt_switchover_infinity_plist_cmd);
-+	install_element(PIM_NODE, &no_pim_spt_switchover_infinity_cmd);
-+	install_element(PIM_NODE, &no_pim_spt_switchover_infinity_plist_cmd);
-+	install_element(PIM_NODE, &pim_register_accept_list_cmd);
-+	install_element(PIM_NODE, &pim_joinprune_time_cmd);
-+	install_element(PIM_NODE, &no_pim_joinprune_time_cmd);
-+	install_element(PIM_NODE, &pim_keep_alive_cmd);
-+	install_element(PIM_NODE, &pim_rp_keep_alive_cmd);
-+	install_element(PIM_NODE, &no_pim_keep_alive_cmd);
-+	install_element(PIM_NODE, &no_pim_rp_keep_alive_cmd);
-+	install_element(PIM_NODE, &pim_packets_cmd);
-+	install_element(PIM_NODE, &no_pim_packets_cmd);
-+	install_element(PIM_NODE, &pim_v6_secondary_cmd);
-+	install_element(PIM_NODE, &no_pim_v6_secondary_cmd);
-+	install_element(PIM_NODE, &pim_ecmp_cmd);
-+	install_element(PIM_NODE, &no_pim_ecmp_cmd);
-+	install_element(PIM_NODE, &pim_ecmp_rebalance_cmd);
-+	install_element(PIM_NODE, &no_pim_ecmp_rebalance_cmd);
-+	install_element(PIM_NODE, &pim_mlag_cmd);
-+	install_element(PIM_NODE, &no_pim_mlag_cmd);
-+
-+	install_element(PIM_NODE, &pim_ssmpingd_cmd);
-+	install_element(PIM_NODE, &no_pim_ssmpingd_cmd);
-+
-+	install_element(PIM_NODE, &pim_msdp_peer_cmd);
-+	install_element(PIM_NODE, &no_pim_msdp_peer_cmd);
-+	install_element(PIM_NODE, &pim_msdp_timers_cmd);
-+	install_element(PIM_NODE, &no_pim_msdp_timers_cmd);
-+	install_element(PIM_NODE, &pim_msdp_mesh_group_member_cmd);
-+	install_element(PIM_NODE, &no_pim_msdp_mesh_group_member_cmd);
-+	install_element(PIM_NODE, &pim_msdp_mesh_group_source_cmd);
-+	install_element(PIM_NODE, &no_pim_msdp_mesh_group_source_cmd);
-+	install_element(PIM_NODE, &no_pim_msdp_mesh_group_cmd);
- 
- 	install_element(INTERFACE_NODE, &interface_ip_igmp_cmd);
- 	install_element(INTERFACE_NODE, &interface_no_ip_igmp_cmd);
-@@ -6534,6 +8309,22 @@ void pim_cmd_init(void)
- 	install_element(INTERFACE_NODE, &interface_ip_mroute_cmd);
- 	install_element(INTERFACE_NODE, &interface_no_ip_mroute_cmd);
- 
-+	install_element(INTERFACE_NODE, &interface_pim_use_source_cmd);
-+	install_element(INTERFACE_NODE, &interface_no_pim_use_source_cmd);
-+	/* Install BSM command */
-+	install_element(INTERFACE_NODE, &ip_pim_bsm_cmd);
-+	install_element(INTERFACE_NODE, &no_ip_pim_bsm_cmd);
-+	install_element(INTERFACE_NODE, &ip_pim_ucast_bsm_cmd);
-+	install_element(INTERFACE_NODE, &no_ip_pim_ucast_bsm_cmd);
-+	/* Install BFD command */
-+	install_element(INTERFACE_NODE, &ip_pim_bfd_cmd);
-+	install_element(INTERFACE_NODE, &ip_pim_bfd_param_cmd);
-+	install_element(INTERFACE_NODE, &no_ip_pim_bfd_profile_cmd);
-+	install_element(INTERFACE_NODE, &no_ip_pim_bfd_cmd);
-+#if HAVE_BFDD == 0
-+	install_element(INTERFACE_NODE, &no_ip_pim_bfd_param_cmd);
-+#endif /* !HAVE_BFDD */
-+
- 	install_element(VIEW_NODE, &show_ip_igmp_interface_cmd);
- 	install_element(VIEW_NODE, &show_ip_igmp_interface_vrf_all_cmd);
- 	install_element(VIEW_NODE, &show_ip_igmp_join_cmd);
-@@ -6590,6 +8381,20 @@ void pim_cmd_init(void)
- 	install_element(VIEW_NODE, &show_ip_pim_bsrp_cmd);
- 	install_element(VIEW_NODE, &show_ip_pim_bsm_db_cmd);
- 	install_element(VIEW_NODE, &show_ip_pim_statistics_cmd);
-+	install_element(VIEW_NODE, &show_ip_msdp_peer_detail_cmd);
-+	install_element(VIEW_NODE, &show_ip_msdp_peer_detail_vrf_all_cmd);
-+	install_element(VIEW_NODE, &show_ip_msdp_sa_detail_cmd);
-+	install_element(VIEW_NODE, &show_ip_msdp_sa_detail_vrf_all_cmd);
-+	install_element(VIEW_NODE, &show_ip_msdp_sa_sg_cmd);
-+	install_element(VIEW_NODE, &show_ip_msdp_sa_sg_vrf_all_cmd);
-+	install_element(VIEW_NODE, &show_ip_msdp_mesh_group_cmd);
-+	install_element(VIEW_NODE, &show_ip_msdp_mesh_group_vrf_all_cmd);
-+	install_element(VIEW_NODE, &show_ip_pim_ssm_range_cmd);
-+	install_element(VIEW_NODE, &show_ip_pim_group_type_cmd);
-+	install_element(VIEW_NODE, &show_ip_pim_vxlan_sg_cmd);
-+	install_element(VIEW_NODE, &show_ip_pim_vxlan_sg_work_cmd);
-+
-+	install_element(ENABLE_NODE, &pim_test_sg_keepalive_cmd);
- 
- 	install_element(ENABLE_NODE, &clear_ip_mroute_count_cmd);
- 	install_element(ENABLE_NODE, &clear_ip_interfaces_cmd);
-@@ -6604,134 +8409,98 @@ void pim_cmd_init(void)
- 	install_element(ENABLE_NODE, &show_debugging_pim_cmd);
- 
- 	install_element(ENABLE_NODE, &debug_igmp_cmd);
--	install_element(ENABLE_NODE, &no_debug_igmp_cmd);
--	install_element(ENABLE_NODE, &debug_igmp_events_cmd);
--	install_element(ENABLE_NODE, &no_debug_igmp_events_cmd);
--	install_element(ENABLE_NODE, &debug_igmp_packets_cmd);
--	install_element(ENABLE_NODE, &no_debug_igmp_packets_cmd);
--	install_element(ENABLE_NODE, &debug_igmp_trace_cmd);
--	install_element(ENABLE_NODE, &no_debug_igmp_trace_cmd);
--	install_element(ENABLE_NODE, &debug_igmp_trace_detail_cmd);
--	install_element(ENABLE_NODE, &no_debug_igmp_trace_detail_cmd);
--	install_element(ENABLE_NODE, &debug_mroute_cmd);
--	install_element(ENABLE_NODE, &debug_mroute_detail_cmd);
--	install_element(ENABLE_NODE, &no_debug_mroute_cmd);
--	install_element(ENABLE_NODE, &no_debug_mroute_detail_cmd);
--	install_element(ENABLE_NODE, &debug_pim_static_cmd);
--	install_element(ENABLE_NODE, &no_debug_pim_static_cmd);
--	install_element(ENABLE_NODE, &debug_pim_cmd);
--	install_element(ENABLE_NODE, &debug_pim_nht_cmd);
--	install_element(ENABLE_NODE, &debug_pim_nht_det_cmd);
--	install_element(ENABLE_NODE, &debug_pim_nht_rp_cmd);
--	install_element(ENABLE_NODE, &no_debug_pim_nht_rp_cmd);
--	install_element(ENABLE_NODE, &debug_pim_events_cmd);
--	install_element(ENABLE_NODE, &debug_pim_packets_cmd);
--	install_element(ENABLE_NODE, &debug_pim_packetdump_send_cmd);
--	install_element(ENABLE_NODE, &debug_pim_packetdump_recv_cmd);
--	install_element(ENABLE_NODE, &debug_pim_trace_cmd);
--	install_element(ENABLE_NODE, &debug_pim_trace_detail_cmd);
--	install_element(ENABLE_NODE, &debug_ssmpingd_cmd);
--	install_element(ENABLE_NODE, &no_debug_ssmpingd_cmd);
--	install_element(ENABLE_NODE, &debug_pim_zebra_cmd);
--	install_element(ENABLE_NODE, &debug_pim_mlag_cmd);
--	install_element(ENABLE_NODE, &no_debug_pim_mlag_cmd);
--	install_element(ENABLE_NODE, &debug_pim_vxlan_cmd);
--	install_element(ENABLE_NODE, &no_debug_pim_vxlan_cmd);
--	install_element(ENABLE_NODE, &debug_msdp_cmd);
--	install_element(ENABLE_NODE, &no_debug_msdp_cmd);
--	install_element(ENABLE_NODE, &debug_msdp_events_cmd);
--	install_element(ENABLE_NODE, &no_debug_msdp_events_cmd);
--	install_element(ENABLE_NODE, &debug_msdp_packets_cmd);
--	install_element(ENABLE_NODE, &no_debug_msdp_packets_cmd);
--	install_element(ENABLE_NODE, &debug_mtrace_cmd);
--	install_element(ENABLE_NODE, &no_debug_mtrace_cmd);
--	install_element(ENABLE_NODE, &debug_bsm_cmd);
--	install_element(ENABLE_NODE, &no_debug_bsm_cmd);
--
- 	install_element(CONFIG_NODE, &debug_igmp_cmd);
-+	install_element(ENABLE_NODE, &no_debug_igmp_cmd);
- 	install_element(CONFIG_NODE, &no_debug_igmp_cmd);
-+	install_element(ENABLE_NODE, &debug_igmp_events_cmd);
- 	install_element(CONFIG_NODE, &debug_igmp_events_cmd);
-+	install_element(ENABLE_NODE, &no_debug_igmp_events_cmd);
- 	install_element(CONFIG_NODE, &no_debug_igmp_events_cmd);
-+	install_element(ENABLE_NODE, &debug_igmp_packets_cmd);
- 	install_element(CONFIG_NODE, &debug_igmp_packets_cmd);
-+	install_element(ENABLE_NODE, &no_debug_igmp_packets_cmd);
- 	install_element(CONFIG_NODE, &no_debug_igmp_packets_cmd);
-+	install_element(ENABLE_NODE, &debug_igmp_trace_cmd);
- 	install_element(CONFIG_NODE, &debug_igmp_trace_cmd);
-+	install_element(ENABLE_NODE, &no_debug_igmp_trace_cmd);
- 	install_element(CONFIG_NODE, &no_debug_igmp_trace_cmd);
-+	install_element(ENABLE_NODE, &debug_igmp_trace_detail_cmd);
- 	install_element(CONFIG_NODE, &debug_igmp_trace_detail_cmd);
-+	install_element(ENABLE_NODE, &no_debug_igmp_trace_detail_cmd);
- 	install_element(CONFIG_NODE, &no_debug_igmp_trace_detail_cmd);
-+	install_element(ENABLE_NODE, &debug_mroute_cmd);
- 	install_element(CONFIG_NODE, &debug_mroute_cmd);
-+	install_element(ENABLE_NODE, &debug_mroute_detail_cmd);
- 	install_element(CONFIG_NODE, &debug_mroute_detail_cmd);
-+	install_element(ENABLE_NODE, &no_debug_mroute_cmd);
- 	install_element(CONFIG_NODE, &no_debug_mroute_cmd);
-+	install_element(ENABLE_NODE, &no_debug_mroute_detail_cmd);
- 	install_element(CONFIG_NODE, &no_debug_mroute_detail_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_static_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_static_cmd);
-+	install_element(ENABLE_NODE, &no_debug_pim_static_cmd);
- 	install_element(CONFIG_NODE, &no_debug_pim_static_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_nht_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_nht_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_nht_det_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_nht_det_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_nht_rp_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_nht_rp_cmd);
-+	install_element(ENABLE_NODE, &no_debug_pim_nht_rp_cmd);
- 	install_element(CONFIG_NODE, &no_debug_pim_nht_rp_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_events_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_events_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_packets_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_packets_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_packetdump_send_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_packetdump_send_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_packetdump_recv_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_packetdump_recv_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_trace_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_trace_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_trace_detail_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_trace_detail_cmd);
-+	install_element(ENABLE_NODE, &debug_ssmpingd_cmd);
- 	install_element(CONFIG_NODE, &debug_ssmpingd_cmd);
-+	install_element(ENABLE_NODE, &no_debug_ssmpingd_cmd);
- 	install_element(CONFIG_NODE, &no_debug_ssmpingd_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_zebra_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_zebra_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_mlag_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_mlag_cmd);
-+	install_element(ENABLE_NODE, &no_debug_pim_mlag_cmd);
- 	install_element(CONFIG_NODE, &no_debug_pim_mlag_cmd);
-+	install_element(ENABLE_NODE, &debug_pim_vxlan_cmd);
- 	install_element(CONFIG_NODE, &debug_pim_vxlan_cmd);
-+	install_element(ENABLE_NODE, &no_debug_pim_vxlan_cmd);
- 	install_element(CONFIG_NODE, &no_debug_pim_vxlan_cmd);
-+	install_element(ENABLE_NODE, &debug_msdp_cmd);
- 	install_element(CONFIG_NODE, &debug_msdp_cmd);
-+	install_element(ENABLE_NODE, &no_debug_msdp_cmd);
- 	install_element(CONFIG_NODE, &no_debug_msdp_cmd);
-+	install_element(ENABLE_NODE, &debug_msdp_events_cmd);
- 	install_element(CONFIG_NODE, &debug_msdp_events_cmd);
-+	install_element(ENABLE_NODE, &no_debug_msdp_events_cmd);
- 	install_element(CONFIG_NODE, &no_debug_msdp_events_cmd);
-+	install_element(ENABLE_NODE, &debug_msdp_packets_cmd);
- 	install_element(CONFIG_NODE, &debug_msdp_packets_cmd);
-+	install_element(ENABLE_NODE, &no_debug_msdp_packets_cmd);
- 	install_element(CONFIG_NODE, &no_debug_msdp_packets_cmd);
-+	install_element(ENABLE_NODE, &debug_mtrace_cmd);
- 	install_element(CONFIG_NODE, &debug_mtrace_cmd);
-+	install_element(ENABLE_NODE, &no_debug_mtrace_cmd);
- 	install_element(CONFIG_NODE, &no_debug_mtrace_cmd);
-+	install_element(ENABLE_NODE, &debug_bsm_cmd);
- 	install_element(CONFIG_NODE, &debug_bsm_cmd);
-+	install_element(ENABLE_NODE, &no_debug_bsm_cmd);
- 	install_element(CONFIG_NODE, &no_debug_bsm_cmd);
- 
--	install_element(CONFIG_NODE, &ip_msdp_timers_cmd);
--	install_element(VRF_NODE, &ip_msdp_timers_cmd);
--	install_element(CONFIG_NODE, &no_ip_msdp_timers_cmd);
--	install_element(VRF_NODE, &no_ip_msdp_timers_cmd);
--	install_element(CONFIG_NODE, &ip_msdp_mesh_group_member_cmd);
--	install_element(VRF_NODE, &ip_msdp_mesh_group_member_cmd);
--	install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_member_cmd);
--	install_element(VRF_NODE, &no_ip_msdp_mesh_group_member_cmd);
--	install_element(CONFIG_NODE, &ip_msdp_mesh_group_source_cmd);
--	install_element(VRF_NODE, &ip_msdp_mesh_group_source_cmd);
--	install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_source_cmd);
--	install_element(VRF_NODE, &no_ip_msdp_mesh_group_source_cmd);
--	install_element(CONFIG_NODE, &no_ip_msdp_mesh_group_cmd);
--	install_element(VRF_NODE, &no_ip_msdp_mesh_group_cmd);
--	install_element(VIEW_NODE, &show_ip_msdp_peer_detail_cmd);
--	install_element(VIEW_NODE, &show_ip_msdp_peer_detail_vrf_all_cmd);
--	install_element(VIEW_NODE, &show_ip_msdp_sa_detail_cmd);
--	install_element(VIEW_NODE, &show_ip_msdp_sa_detail_vrf_all_cmd);
--	install_element(VIEW_NODE, &show_ip_msdp_sa_sg_cmd);
--	install_element(VIEW_NODE, &show_ip_msdp_sa_sg_vrf_all_cmd);
--	install_element(VIEW_NODE, &show_ip_msdp_mesh_group_cmd);
--	install_element(VIEW_NODE, &show_ip_msdp_mesh_group_vrf_all_cmd);
--	install_element(VIEW_NODE, &show_ip_pim_ssm_range_cmd);
--	install_element(VIEW_NODE, &show_ip_pim_group_type_cmd);
--	install_element(VIEW_NODE, &show_ip_pim_vxlan_sg_cmd);
--	install_element(VIEW_NODE, &show_ip_pim_vxlan_sg_work_cmd);
--	install_element(INTERFACE_NODE, &interface_pim_use_source_cmd);
--	install_element(INTERFACE_NODE, &interface_no_pim_use_source_cmd);
--	/* Install BSM command */
--	install_element(INTERFACE_NODE, &ip_pim_bsm_cmd);
--	install_element(INTERFACE_NODE, &no_ip_pim_bsm_cmd);
--	install_element(INTERFACE_NODE, &ip_pim_ucast_bsm_cmd);
--	install_element(INTERFACE_NODE, &no_ip_pim_ucast_bsm_cmd);
--	/* Install BFD command */
--	install_element(INTERFACE_NODE, &ip_pim_bfd_cmd);
--	install_element(INTERFACE_NODE, &ip_pim_bfd_param_cmd);
--	install_element(INTERFACE_NODE, &no_ip_pim_bfd_profile_cmd);
--	install_element(INTERFACE_NODE, &no_ip_pim_bfd_cmd);
--#if HAVE_BFDD == 0
--	install_element(INTERFACE_NODE, &no_ip_pim_bfd_param_cmd);
--#endif /* !HAVE_BFDD */
-+	install_element(CONFIG_NODE, &ip_igmp_group_watermark_cmd);
-+	install_element(VRF_NODE, &ip_igmp_group_watermark_cmd);
-+	install_element(CONFIG_NODE, &no_ip_igmp_group_watermark_cmd);
-+	install_element(VRF_NODE, &no_ip_igmp_group_watermark_cmd);
-+
-+	pim_install_deprecated();
- }
-diff --git a/pimd/pim_cmd_common.c b/pimd/pim_cmd_common.c
-index 5e50a09355cf..c6cb28c097b9 100644
---- a/pimd/pim_cmd_common.c
-+++ b/pimd/pim_cmd_common.c
-@@ -100,25 +100,13 @@ int pim_process_no_join_prune_cmd(struct vty *vty)
- 
- int pim_process_spt_switchover_infinity_cmd(struct vty *vty)
- {
--	const char *vrfname;
- 	char spt_plist_xpath[XPATH_MAXLEN];
- 	char spt_action_xpath[XPATH_MAXLEN];
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
- 	snprintf(spt_plist_xpath, sizeof(spt_plist_xpath),
--		 FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 FRR_PIM_AF_XPATH_VAL);
--	strlcat(spt_plist_xpath, "/spt-switchover/spt-infinity-prefix-list",
--		sizeof(spt_plist_xpath));
--
-+		 "%s/spt-switchover/spt-infinity-prefix-list", VTY_CURR_XPATH);
- 	snprintf(spt_action_xpath, sizeof(spt_action_xpath),
--		 FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 FRR_PIM_AF_XPATH_VAL);
--	strlcat(spt_action_xpath, "/spt-switchover/spt-action",
--		sizeof(spt_action_xpath));
-+		 "%s/spt-switchover/spt-action", VTY_CURR_XPATH);
- 
- 	if (yang_dnode_exists(vty->candidate_config->dnode, spt_plist_xpath))
- 		nb_cli_enqueue_change(vty, spt_plist_xpath, NB_OP_DESTROY,
-@@ -132,55 +120,30 @@ int pim_process_spt_switchover_infinity_cmd(struct vty *vty)
- int pim_process_spt_switchover_prefixlist_cmd(struct vty *vty,
- 					      const char *plist)
- {
--	const char *vrfname;
- 	char spt_plist_xpath[XPATH_MAXLEN];
- 	char spt_action_xpath[XPATH_MAXLEN];
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
- 	snprintf(spt_plist_xpath, sizeof(spt_plist_xpath),
--		 FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 FRR_PIM_AF_XPATH_VAL);
--	strlcat(spt_plist_xpath, "/spt-switchover/spt-infinity-prefix-list",
--		sizeof(spt_plist_xpath));
--
-+		 "./spt-switchover/spt-infinity-prefix-list");
- 	snprintf(spt_action_xpath, sizeof(spt_action_xpath),
--		 FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 FRR_PIM_AF_XPATH_VAL);
--	strlcat(spt_action_xpath, "/spt-switchover/spt-action",
--		sizeof(spt_action_xpath));
-+		 "./spt-switchover/spt-action");
- 
- 	nb_cli_enqueue_change(vty, spt_action_xpath, NB_OP_MODIFY,
- 			      "PIM_SPT_INFINITY");
--	nb_cli_enqueue_change(vty, spt_plist_xpath, NB_OP_MODIFY,
--			      plist);
-+	nb_cli_enqueue_change(vty, spt_plist_xpath, NB_OP_MODIFY, plist);
- 
- 	return nb_cli_apply_changes(vty, NULL);
- }
- 
- int pim_process_no_spt_switchover_cmd(struct vty *vty)
- {
--	const char *vrfname;
- 	char spt_plist_xpath[XPATH_MAXLEN];
- 	char spt_action_xpath[XPATH_MAXLEN];
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
- 	snprintf(spt_plist_xpath, sizeof(spt_plist_xpath),
--		 FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 FRR_PIM_AF_XPATH_VAL);
--	strlcat(spt_plist_xpath, "/spt-switchover/spt-infinity-prefix-list",
--		sizeof(spt_plist_xpath));
--
-+		 "./spt-switchover/spt-infinity-prefix-list");
- 	snprintf(spt_action_xpath, sizeof(spt_action_xpath),
--		 FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 FRR_PIM_AF_XPATH_VAL);
--	strlcat(spt_action_xpath, "/spt-switchover/spt-action",
--		sizeof(spt_action_xpath));
-+		 "./spt-switchover/spt-action");
- 
- 	nb_cli_enqueue_change(vty, spt_plist_xpath, NB_OP_DESTROY, NULL);
- 	nb_cli_enqueue_change(vty, spt_action_xpath, NB_OP_MODIFY,
-@@ -217,35 +180,20 @@ int pim_process_no_pim_packet_cmd(struct vty *vty)
- 
- int pim_process_keepalivetimer_cmd(struct vty *vty, const char *kat)
- {
--	const char *vrfname;
- 	char ka_timer_xpath[XPATH_MAXLEN];
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
--	snprintf(ka_timer_xpath, sizeof(ka_timer_xpath), FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
--	strlcat(ka_timer_xpath, "/keep-alive-timer", sizeof(ka_timer_xpath));
-+	snprintf(ka_timer_xpath, sizeof(ka_timer_xpath), "./keep-alive-timer");
- 
--	nb_cli_enqueue_change(vty, ka_timer_xpath, NB_OP_MODIFY,
--			      kat);
-+	nb_cli_enqueue_change(vty, ka_timer_xpath, NB_OP_MODIFY, kat);
- 
- 	return nb_cli_apply_changes(vty, NULL);
- }
- 
- int pim_process_no_keepalivetimer_cmd(struct vty *vty)
- {
--	const char *vrfname;
- 	char ka_timer_xpath[XPATH_MAXLEN];
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
--	snprintf(ka_timer_xpath, sizeof(ka_timer_xpath), FRR_PIM_VRF_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL);
--	strlcat(ka_timer_xpath, "/keep-alive-timer", sizeof(ka_timer_xpath));
-+	snprintf(ka_timer_xpath, sizeof(ka_timer_xpath), "./keep-alive-timer");
- 
- 	nb_cli_enqueue_change(vty, ka_timer_xpath, NB_OP_DESTROY, NULL);
- 
-@@ -254,35 +202,25 @@ int pim_process_no_keepalivetimer_cmd(struct vty *vty)
- 
- int pim_process_rp_kat_cmd(struct vty *vty, const char *rpkat)
- {
--	const char *vrfname;
- 	char rp_ka_timer_xpath[XPATH_MAXLEN];
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
- 	snprintf(rp_ka_timer_xpath, sizeof(rp_ka_timer_xpath),
--		 FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 FRR_PIM_AF_XPATH_VAL);
--	strlcat(rp_ka_timer_xpath, "/rp-keep-alive-timer",
--		sizeof(rp_ka_timer_xpath));
-+		 "./rp-keep-alive-timer");
- 
--	nb_cli_enqueue_change(vty, rp_ka_timer_xpath, NB_OP_MODIFY,
--			      rpkat);
-+	nb_cli_enqueue_change(vty, rp_ka_timer_xpath, NB_OP_MODIFY, rpkat);
- 
- 	return nb_cli_apply_changes(vty, NULL);
- }
- 
- int pim_process_no_rp_kat_cmd(struct vty *vty)
- {
--	const char *vrfname;
- 	char rp_ka_timer[6];
- 	char rp_ka_timer_xpath[XPATH_MAXLEN];
- 	uint v;
- 	char rs_timer_xpath[XPATH_MAXLEN];
- 
--	snprintf(rs_timer_xpath, sizeof(rs_timer_xpath),
--		 FRR_PIM_ROUTER_XPATH, FRR_PIM_AF_XPATH_VAL);
-+	snprintf(rs_timer_xpath, sizeof(rs_timer_xpath), FRR_PIM_ROUTER_XPATH,
-+		 FRR_PIM_AF_XPATH_VAL);
- 	strlcat(rs_timer_xpath, "/register-suppress-time",
- 		sizeof(rs_timer_xpath));
- 
-@@ -301,18 +239,10 @@ int pim_process_no_rp_kat_cmd(struct vty *vty)
- 		v = UINT16_MAX;
- 	snprintf(rp_ka_timer, sizeof(rp_ka_timer), "%u", v);
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
- 	snprintf(rp_ka_timer_xpath, sizeof(rp_ka_timer_xpath),
--		 FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 FRR_PIM_AF_XPATH_VAL);
--	strlcat(rp_ka_timer_xpath, "/rp-keep-alive-timer",
--		sizeof(rp_ka_timer_xpath));
-+		 "./rp-keep-alive-timer");
- 
--	nb_cli_enqueue_change(vty, rp_ka_timer_xpath, NB_OP_MODIFY,
--			      rp_ka_timer);
-+	nb_cli_enqueue_change(vty, rp_ka_timer_xpath, NB_OP_MODIFY, rp_ka_timer);
- 
- 	return nb_cli_apply_changes(vty, NULL);
- }
-@@ -531,9 +461,7 @@ int pim_process_no_ip_mroute_cmd(struct vty *vty, const char *interface,
- int pim_process_rp_cmd(struct vty *vty, const char *rp_str,
- 		       const char *group_str)
- {
--	const char *vrfname;
- 	char group_xpath[XPATH_MAXLEN];
--	char rp_xpath[XPATH_MAXLEN];
- 	int printed;
- 	int result = 0;
- 	struct prefix group;
-@@ -575,14 +503,9 @@ int pim_process_rp_cmd(struct vty *vty, const char *rp_str,
- 	}
- #endif
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
--	snprintf(rp_xpath, sizeof(rp_xpath), FRR_PIM_STATIC_RP_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL, rp_str);
- 	printed = snprintf(group_xpath, sizeof(group_xpath),
--			   "%s/group-list[.='%s']", rp_xpath, group_str);
-+			   "./" FRR_PIM_STATIC_RP_XPATH "/group-list[.='%s']",
-+			   rp_str, group_str);
- 
- 	if (printed >= (int)(sizeof(group_xpath))) {
- 		vty_out(vty, "Xpath too long (%d > %u)", printed + 1,
-@@ -601,15 +524,10 @@ int pim_process_no_rp_cmd(struct vty *vty, const char *rp_str,
- 	char group_xpath[XPATH_MAXLEN];
- 	char rp_xpath[XPATH_MAXLEN];
- 	int printed;
--	const char *vrfname;
- 	const struct lyd_node *group_dnode;
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
--	snprintf(rp_xpath, sizeof(rp_xpath), FRR_PIM_STATIC_RP_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL, rp_str);
-+	snprintf(rp_xpath, sizeof(rp_xpath), "%s/" FRR_PIM_STATIC_RP_XPATH,
-+		 VTY_CURR_XPATH, rp_str);
- 	printed = snprintf(group_xpath, sizeof(group_xpath),
- 			   "%s/group-list[.='%s']", rp_xpath, group_str);
- 
-@@ -636,16 +554,10 @@ int pim_process_no_rp_cmd(struct vty *vty, const char *rp_str,
- int pim_process_rp_plist_cmd(struct vty *vty, const char *rp_str,
- 			     const char *prefix_list)
- {
--	const char *vrfname;
- 	char rp_plist_xpath[XPATH_MAXLEN];
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
- 	snprintf(rp_plist_xpath, sizeof(rp_plist_xpath),
--		 FRR_PIM_STATIC_RP_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 FRR_PIM_AF_XPATH_VAL, rp_str);
-+		 "./" FRR_PIM_STATIC_RP_XPATH, rp_str);
- 	strlcat(rp_plist_xpath, "/prefix-list", sizeof(rp_plist_xpath));
- 
- 	nb_cli_enqueue_change(vty, rp_plist_xpath, NB_OP_MODIFY, prefix_list);
-@@ -658,19 +570,12 @@ int pim_process_no_rp_plist_cmd(struct vty *vty, const char *rp_str,
- {
- 	char rp_xpath[XPATH_MAXLEN];
- 	char plist_xpath[XPATH_MAXLEN];
--	const char *vrfname;
- 	const struct lyd_node *plist_dnode;
- 	const char *plist;
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
--	snprintf(rp_xpath, sizeof(rp_xpath), FRR_PIM_STATIC_RP_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL, rp_str);
--
--	snprintf(plist_xpath, sizeof(plist_xpath), FRR_PIM_STATIC_RP_XPATH,
--		 "frr-pim:pimd", "pim", vrfname, FRR_PIM_AF_XPATH_VAL, rp_str);
-+	snprintf(rp_xpath, sizeof(rp_xpath), "%s/" FRR_PIM_STATIC_RP_XPATH,
-+		 VTY_CURR_XPATH, rp_str);
-+	snprintf(plist_xpath, sizeof(plist_xpath), "%s", rp_xpath);
- 	strlcat(plist_xpath, "/prefix-list", sizeof(plist_xpath));
- 
- 	plist_dnode = yang_dnode_get(vty->candidate_config->dnode, plist_xpath);
-@@ -679,7 +584,7 @@ int pim_process_no_rp_plist_cmd(struct vty *vty, const char *rp_str,
- 		return NB_OK;
- 	}
- 
--	plist = yang_dnode_get_string(plist_dnode, "%s", plist_xpath);
-+	plist = yang_dnode_get_string(plist_dnode, NULL);
- 	if (strcmp(prefix_list, plist)) {
- 		vty_out(vty, "%% Unable to find specified RP\n");
- 		return NB_OK;
-@@ -3408,21 +3313,11 @@ int gm_process_no_last_member_query_interval_cmd(struct vty *vty)
- int pim_process_ssmpingd_cmd(struct vty *vty, enum nb_operation operation,
- 			     const char *src_str)
- {
--	const char *vrfname;
--	char ssmpingd_ip_xpath[XPATH_MAXLEN];
- 	char ssmpingd_src_ip_xpath[XPATH_MAXLEN];
- 	int printed;
- 
--	vrfname = pim_cli_get_vrf_name(vty);
--	if (vrfname == NULL)
--		return CMD_WARNING_CONFIG_FAILED;
--
--	snprintf(ssmpingd_ip_xpath, sizeof(ssmpingd_ip_xpath),
--		 FRR_PIM_VRF_XPATH, "frr-pim:pimd", "pim", vrfname,
--		 FRR_PIM_AF_XPATH_VAL);
- 	printed = snprintf(ssmpingd_src_ip_xpath, sizeof(ssmpingd_src_ip_xpath),
--			   "%s/ssm-pingd-source-ip[.='%s']", ssmpingd_ip_xpath,
--			   src_str);
-+			   "./ssm-pingd-source-ip[.='%s']", src_str);
- 	if (printed >= (int)sizeof(ssmpingd_src_ip_xpath)) {
- 		vty_out(vty, "Xpath too long (%d > %u)", printed + 1,
- 			XPATH_MAXLEN);
-@@ -5705,3 +5600,34 @@ int pim_show_bsm_db_helper(const char *vrf, struct vty *vty, bool uj)
- 
- 	return CMD_SUCCESS;
- }
-+
-+int pim_router_config_write(struct vty *vty)
-+{
-+	struct vrf *vrf;
-+	struct pim_instance *pim;
-+	int writes = 0;
-+	char framestr[64] = { 0 };
-+
-+	RB_FOREACH (vrf, vrf_name_head, &vrfs_by_name) {
-+		pim = vrf->info;
-+
-+		if (!pim)
-+			continue;
-+
-+		snprintfrr(framestr, sizeof(framestr), "router %s",
-+			   PIM_AF_ROUTER);
-+		if (vrf->vrf_id != VRF_DEFAULT) {
-+			strlcat(framestr, " vrf ", sizeof(framestr));
-+			strlcat(framestr, vrf->name, sizeof(framestr));
-+		}
-+		vty_frame(vty, "%s\n", framestr);
-+		++writes;
-+
-+		writes += pim_global_config_write_worker(pim, vty);
-+
-+		vty_endframe(vty, "exit\n");
-+		++writes;
-+	}
-+
-+	return writes;
-+}
-diff --git a/pimd/pim_cmd_common.h b/pimd/pim_cmd_common.h
-index e30203fad75b..da2e44be585b 100644
---- a/pimd/pim_cmd_common.h
-+++ b/pimd/pim_cmd_common.h
-@@ -182,6 +182,8 @@ int pim_show_interface_traffic_helper(const char *vrf, const char *if_name,
- void clear_pim_interfaces(struct pim_instance *pim);
- void pim_show_bsr(struct pim_instance *pim, struct vty *vty, bool uj);
- int pim_show_bsr_helper(const char *vrf, struct vty *vty, bool uj);
-+int pim_router_config_write(struct vty *vty);
-+
- /*
-  * Special Macro to allow us to get the correct pim_instance;
-  */
-diff --git a/pimd/pim_instance.c b/pimd/pim_instance.c
-index b3410d15af72..a9eec9a9d25b 100644
---- a/pimd/pim_instance.c
-+++ b/pimd/pim_instance.c
-@@ -201,6 +201,7 @@ static int pim_vrf_config_write(struct vty *vty)
- {
- 	struct vrf *vrf;
- 	struct pim_instance *pim;
-+	char spaces[10];
- 
- 	RB_FOREACH (vrf, vrf_name_head, &vrfs_by_name) {
- 		pim = vrf->info;
-@@ -208,10 +209,24 @@ static int pim_vrf_config_write(struct vty *vty)
- 		if (!pim)
- 			continue;
- 
--		if (vrf->vrf_id != VRF_DEFAULT)
-+		if (vrf->vrf_id != VRF_DEFAULT) {
- 			vty_frame(vty, "vrf %s\n", vrf->name);
--
--		pim_global_config_write_worker(pim, vty);
-+			snprintf(spaces, sizeof(spaces), "%s", " ");
-+		} else {
-+			snprintf(spaces, sizeof(spaces), "%s", "");
-+		}
-+
-+		/* Global IGMP/MLD configuration */
-+		if (pim->gm_watermark_limit != 0) {
-+#if PIM_IPV == 4
-+			vty_out(vty,
-+				"%s" PIM_AF_NAME " igmp watermark-warn %u\n",
-+				spaces, pim->gm_watermark_limit);
-+#else
-+			vty_out(vty, "%s" PIM_AF_NAME " mld watermark-warn %u\n",
-+				spaces, pim->gm_watermark_limit);
-+#endif
-+		}
- 
- 		if (vrf->vrf_id != VRF_DEFAULT)
- 			vty_endframe(vty, "exit-vrf\n!\n");
-diff --git a/pimd/pim_msdp.c b/pimd/pim_msdp.c
-index 623c14bb0391..04b4d296ddbc 100644
---- a/pimd/pim_msdp.c
-+++ b/pimd/pim_msdp.c
-@@ -1276,8 +1276,7 @@ static void pim_msdp_src_del(struct pim_msdp_mg *mg)
- }
- 
- /*********************** MSDP feature APIs *********************************/
--int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty,
--			  const char *spaces)
-+int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty)
- {
- 	struct pim_msdp_mg *mg;
- 	struct listnode *mbrnode;
-@@ -1292,14 +1291,14 @@ int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty,
- 		if (mg->src_ip.s_addr != INADDR_ANY) {
- 			pim_inet4_dump("<src?>", mg->src_ip, src_str,
- 				       sizeof(src_str));
--			vty_out(vty, "%sip msdp mesh-group %s source %s\n",
--				spaces, mg->mesh_group_name, src_str);
-+			vty_out(vty, " msdp mesh-group %s source %s\n",
-+				mg->mesh_group_name, src_str);
- 			++count;
- 		}
- 
- 		for (ALL_LIST_ELEMENTS_RO(mg->mbr_list, mbrnode, mbr)) {
--			vty_out(vty, "%sip msdp mesh-group %s member %pI4\n",
--				spaces, mg->mesh_group_name, &mbr->mbr_ip);
-+			vty_out(vty, " msdp mesh-group %s member %pI4\n",
-+				mg->mesh_group_name, &mbr->mbr_ip);
- 			++count;
- 		}
- 	}
-@@ -1307,8 +1306,7 @@ int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty,
- 	return count;
- }
- 
--bool pim_msdp_peer_config_write(struct vty *vty, struct pim_instance *pim,
--				const char *spaces)
-+bool pim_msdp_peer_config_write(struct vty *vty, struct pim_instance *pim)
- {
- 	struct pim_msdp_peer *mp;
- 	struct listnode *node;
-@@ -1319,8 +1317,8 @@ bool pim_msdp_peer_config_write(struct vty *vty, struct pim_instance *pim,
- 		if (mp->flags & PIM_MSDP_PEERF_IN_GROUP)
- 			continue;
- 
--		vty_out(vty, "%sip msdp peer %pI4 source %pI4\n", spaces,
--			&mp->peer, &mp->local);
-+		vty_out(vty, " msdp peer %pI4 source %pI4\n", &mp->peer,
-+			&mp->local);
- 		written = true;
- 	}
- 
-diff --git a/pimd/pim_msdp.h b/pimd/pim_msdp.h
-index ddc015f9b62b..80ca003dc595 100644
---- a/pimd/pim_msdp.h
-+++ b/pimd/pim_msdp.h
-@@ -228,10 +228,8 @@ void pim_msdp_peer_pkt_rxed(struct pim_msdp_peer *mp);
- void pim_msdp_peer_stop_tcp_conn(struct pim_msdp_peer *mp, bool chg_state);
- void pim_msdp_peer_reset_tcp_conn(struct pim_msdp_peer *mp, const char *rc_str);
- void pim_msdp_write(struct event *thread);
--int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty,
--			  const char *spaces);
--bool pim_msdp_peer_config_write(struct vty *vty, struct pim_instance *pim,
--				const char *spaces);
-+int pim_msdp_config_write(struct pim_instance *pim, struct vty *vty);
-+bool pim_msdp_peer_config_write(struct vty *vty, struct pim_instance *pim);
- void pim_msdp_peer_pkt_txed(struct pim_msdp_peer *mp);
- void pim_msdp_sa_ref(struct pim_instance *pim, struct pim_msdp_peer *mp,
- 		     pim_sgaddr *sg, struct in_addr rp);
-@@ -339,14 +337,13 @@ static inline void pim_msdp_sa_local_del(struct pim_instance *pim,
- }
- 
- static inline int pim_msdp_config_write(struct pim_instance *pim,
--					struct vty *vty, const char *spaces)
-+					struct vty *vty)
- {
- 	return 0;
- }
- 
- static inline bool pim_msdp_peer_config_write(struct vty *vty,
--					      struct pim_instance *pim,
--					      const char *spaces)
-+					      struct pim_instance *pim)
- {
- 	return false;
- }
-diff --git a/pimd/pim_nb.h b/pimd/pim_nb.h
-index 0321d076f0da..2d854d73de5e 100644
---- a/pimd/pim_nb.h
-+++ b/pimd/pim_nb.h
-@@ -207,9 +207,6 @@ int routing_control_plane_protocols_name_validate(
- 	"./frr-pim:pim/address-family[address-family='%s']/"            \
- 	"mroute[source-addr='%s'][group-addr='%s']"
- #define FRR_PIM_STATIC_RP_XPATH                                         \
--	"/frr-routing:routing/control-plane-protocols/"                 \
--	"control-plane-protocol[type='%s'][name='%s'][vrf='%s']/"       \
--	"frr-pim:pim/address-family[address-family='%s']/"              \
- 	"frr-pim-rp:rp/static-rp/rp-list[rp-address='%s']"
- #define FRR_GMP_INTERFACE_XPATH                                         \
- 	"./frr-gmp:gmp/address-family[address-family='%s']"
-@@ -218,6 +215,5 @@ int routing_control_plane_protocols_name_validate(
- #define FRR_GMP_JOIN_XPATH                                              \
- 	"./frr-gmp:gmp/address-family[address-family='%s']/"            \
- 	"static-group[group-addr='%s'][source-addr='%s']"
--#define FRR_PIM_MSDP_XPATH FRR_PIM_VRF_XPATH "/msdp"
- 
- #endif /* _FRR_PIM_NB_H_ */
-diff --git a/pimd/pim_rp.c b/pimd/pim_rp.c
-index 49be9c0a7339..0f8940bb16d7 100644
---- a/pimd/pim_rp.c
-+++ b/pimd/pim_rp.c
-@@ -1129,8 +1129,7 @@ int pim_rp_set_upstream_addr(struct pim_instance *pim, pim_addr *up,
- 	return 1;
- }
- 
--int pim_rp_config_write(struct pim_instance *pim, struct vty *vty,
--			const char *spaces)
-+int pim_rp_config_write(struct pim_instance *pim, struct vty *vty)
- {
- 	struct listnode *node;
- 	struct rp_info *rp_info;
-@@ -1146,13 +1145,11 @@ int pim_rp_config_write(struct pim_instance *pim, struct vty *vty,
- 
- 		rp_addr = rp_info->rp.rpf_addr;
- 		if (rp_info->plist)
--			vty_out(vty,
--				"%s" PIM_AF_NAME
--				" pim rp %pPA prefix-list %s\n",
--				spaces, &rp_addr, rp_info->plist);
-+			vty_out(vty, " rp %pPA prefix-list %s\n", &rp_addr,
-+				rp_info->plist);
- 		else
--			vty_out(vty, "%s" PIM_AF_NAME " pim rp %pPA %pFX\n",
--				spaces, &rp_addr, &rp_info->group);
-+			vty_out(vty, " rp %pPA %pFX\n", &rp_addr,
-+				&rp_info->group);
- 		count++;
- 	}
- 
-diff --git a/pimd/pim_rp.h b/pimd/pim_rp.h
-index 9416a9a8a87e..32c6306740d6 100644
---- a/pimd/pim_rp.h
-+++ b/pimd/pim_rp.h
-@@ -46,8 +46,7 @@ int pim_rp_change(struct pim_instance *pim, pim_addr new_rp_addr,
- void pim_rp_prefix_list_update(struct pim_instance *pim,
- 			       struct prefix_list *plist);
- 
--int pim_rp_config_write(struct pim_instance *pim, struct vty *vty,
--			const char *spaces);
-+int pim_rp_config_write(struct pim_instance *pim, struct vty *vty);
- 
- void pim_rp_setup(struct pim_instance *pim);
- 
-diff --git a/pimd/pim_vty.c b/pimd/pim_vty.c
-index 0f6547ee2e9a..1910a684957e 100644
---- a/pimd/pim_vty.c
-+++ b/pimd/pim_vty.c
-@@ -172,89 +172,66 @@ int pim_global_config_write_worker(struct pim_instance *pim, struct vty *vty)
- {
- 	int writes = 0;
- 	struct pim_ssm *ssm = pim->ssm_info;
--	char spaces[10];
- 
--	if (pim->vrf->vrf_id == VRF_DEFAULT)
--		snprintf(spaces, sizeof(spaces), "%s", "");
--	else
--		snprintf(spaces, sizeof(spaces), "%s", " ");
--
--	writes += pim_msdp_peer_config_write(vty, pim, spaces);
--	writes += pim_msdp_config_write(pim, vty, spaces);
-+	writes += pim_msdp_peer_config_write(vty, pim);
-+	writes += pim_msdp_config_write(pim, vty);
- 
- 	if (!pim->send_v6_secondary) {
--		vty_out(vty, "%sno ip pim send-v6-secondary\n", spaces);
-+		vty_out(vty, " no send-v6-secondary\n");
- 		++writes;
- 	}
- 
--	writes += pim_rp_config_write(pim, vty, spaces);
-+	writes += pim_rp_config_write(pim, vty);
- 
- 	if (pim->vrf->vrf_id == VRF_DEFAULT) {
- 		if (router->register_suppress_time
- 		    != PIM_REGISTER_SUPPRESSION_TIME_DEFAULT) {
--			vty_out(vty, "%s" PIM_AF_NAME " pim register-suppress-time %d\n",
--				spaces, router->register_suppress_time);
-+			vty_out(vty, " register-suppress-time %d\n",
-+				router->register_suppress_time);
- 			++writes;
- 		}
- 		if (router->t_periodic != PIM_DEFAULT_T_PERIODIC) {
--			vty_out(vty, "%s" PIM_AF_NAME " pim join-prune-interval %d\n",
--				spaces, router->t_periodic);
-+			vty_out(vty, " join-prune-interval %d\n",
-+				router->t_periodic);
- 			++writes;
- 		}
- 
- 		if (router->packet_process != PIM_DEFAULT_PACKET_PROCESS) {
--			vty_out(vty, "%s" PIM_AF_NAME " pim packets %d\n", spaces,
--				router->packet_process);
-+			vty_out(vty, " packets %d\n", router->packet_process);
- 			++writes;
- 		}
- 	}
- 	if (pim->keep_alive_time != PIM_KEEPALIVE_PERIOD) {
--		vty_out(vty, "%s" PIM_AF_NAME " pim keep-alive-timer %d\n",
--			spaces, pim->keep_alive_time);
-+		vty_out(vty, " keep-alive-timer %d\n", pim->keep_alive_time);
- 		++writes;
- 	}
- 	if (pim->rp_keep_alive_time != (unsigned int)PIM_RP_KEEPALIVE_PERIOD) {
--		vty_out(vty, "%s" PIM_AF_NAME " pim rp keep-alive-timer %d\n",
--			spaces, pim->rp_keep_alive_time);
-+		vty_out(vty, " rp keep-alive-timer %d\n",
-+			pim->rp_keep_alive_time);
- 		++writes;
- 	}
- 	if (ssm->plist_name) {
--		vty_out(vty, "%sip pim ssm prefix-list %s\n", spaces,
--			ssm->plist_name);
-+		vty_out(vty, " ssm prefix-list %s\n", ssm->plist_name);
- 		++writes;
- 	}
- 	if (pim->register_plist) {
--		vty_out(vty, "%sip pim register-accept-list %s\n", spaces,
--			pim->register_plist);
-+		vty_out(vty, " register-accept-list %s\n", pim->register_plist);
- 		++writes;
- 	}
- 	if (pim->spt.switchover == PIM_SPT_INFINITY) {
- 		if (pim->spt.plist)
- 			vty_out(vty,
--				"%s" PIM_AF_NAME " pim spt-switchover infinity-and-beyond prefix-list %s\n",
--				spaces, pim->spt.plist);
-+				" spt-switchover infinity-and-beyond prefix-list %s\n",
-+				pim->spt.plist);
- 		else
--			vty_out(vty,
--				"%s" PIM_AF_NAME " pim spt-switchover infinity-and-beyond\n",
--				spaces);
-+			vty_out(vty, " spt-switchover infinity-and-beyond\n");
- 		++writes;
- 	}
- 	if (pim->ecmp_rebalance_enable) {
--		vty_out(vty, "%sip pim ecmp rebalance\n", spaces);
-+		vty_out(vty, " ecmp rebalance\n");
- 		++writes;
- 	} else if (pim->ecmp_enable) {
--		vty_out(vty, "%sip pim ecmp\n", spaces);
--		++writes;
--	}
--
--	if (pim->gm_watermark_limit != 0) {
--#if PIM_IPV == 4
--		vty_out(vty, "%s" PIM_AF_NAME " igmp watermark-warn %u\n",
--			spaces, pim->gm_watermark_limit);
--#else
--		vty_out(vty, "%s" PIM_AF_NAME " mld watermark-warn %u\n",
--			spaces, pim->gm_watermark_limit);
--#endif
-+		vty_out(vty, " ecmp\n");
- 		++writes;
- 	}
- 
-@@ -263,8 +240,7 @@ int pim_global_config_write_worker(struct pim_instance *pim, struct vty *vty)
- 		struct ssmpingd_sock *ss;
- 		++writes;
- 		for (ALL_LIST_ELEMENTS_RO(pim->ssmpingd_list, node, ss)) {
--			vty_out(vty, "%s" PIM_AF_NAME " ssmpingd %pPA\n",
--				spaces, &ss->source_addr);
-+			vty_out(vty, " ssmpingd %pPA\n", &ss->source_addr);
- 			++writes;
- 		}
- 	}
-@@ -272,8 +248,8 @@ int pim_global_config_write_worker(struct pim_instance *pim, struct vty *vty)
- 	if (pim->msdp.hold_time != PIM_MSDP_PEER_HOLD_TIME
- 	    || pim->msdp.keep_alive != PIM_MSDP_PEER_KA_TIME
- 	    || pim->msdp.connection_retry != PIM_MSDP_PEER_CONNECT_RETRY_TIME) {
--		vty_out(vty, "%sip msdp timers %u %u", spaces,
--			pim->msdp.hold_time, pim->msdp.keep_alive);
-+		vty_out(vty, " msdp timers %u %u", pim->msdp.hold_time,
-+			pim->msdp.keep_alive);
- 		if (pim->msdp.connection_retry
- 		    != PIM_MSDP_PEER_CONNECT_RETRY_TIME)
- 			vty_out(vty, " %u", pim->msdp.connection_retry);
-diff --git a/vtysh/vtysh.c b/vtysh/vtysh.c
-index 573320667c33..1f6dde83c148 100644
---- a/vtysh/vtysh.c
-+++ b/vtysh/vtysh.c
-@@ -1677,6 +1677,24 @@ static struct cmd_node bfd_profile_node = {
- };
- #endif /* HAVE_BFDD */
- 
-+#ifdef HAVE_PIMD
-+static struct cmd_node pim_node = {
-+	.name = "pim",
-+	.node = PIM_NODE,
-+	.parent_node = CONFIG_NODE,
-+	.prompt = "%s(config-pim)# ",
-+};
-+#endif /* HAVE_PIMD */
-+
-+#ifdef HAVE_PIM6D
-+static struct cmd_node pim6_node = {
-+	.name = "pim6",
-+	.node = PIM6_NODE,
-+	.parent_node = CONFIG_NODE,
-+	.prompt = "%s(config-pim6)# ",
-+};
-+#endif /* HAVE_PIM6D */
-+
- /* Defined in lib/vty.c */
- extern struct cmd_node vty_node;
- 
-@@ -2413,6 +2431,30 @@ DEFUNSH(VTYSH_BFDD, bfd_profile_enter, bfd_profile_enter_cmd,
- }
- #endif /* HAVE_BFDD */
- 
-+#ifdef HAVE_PIMD
-+DEFUNSH(VTYSH_PIMD, router_pim, router_pim_cmd,
-+	"router pim [vrf NAME]",
-+	ROUTER_STR
-+	"Start PIM configuration\n"
-+	VRF_CMD_HELP_STR)
-+{
-+	vty->node = PIM_NODE;
-+	return CMD_SUCCESS;
-+}
-+#endif /* HAVE_PIMD */
-+
-+#ifdef HAVE_PIM6D
-+DEFUNSH(VTYSH_PIM6D, router_pim6, router_pim6_cmd,
-+	"router pim6 [vrf NAME]",
-+	ROUTER_STR
-+	"Start PIMv6 configuration\n"
-+	VRF_CMD_HELP_STR)
-+{
-+	vty->node = PIM6_NODE;
-+	return CMD_SUCCESS;
-+}
-+#endif /* HAVE_PIM6D*/
-+
- DEFUNSH(VTYSH_ALL, vtysh_line_vty, vtysh_line_vty_cmd, "line vty",
- 	"Configure a terminal line\n"
- 	"Virtual terminal\n")
-@@ -2826,6 +2868,34 @@ DEFUNSH(VTYSH_PATHD, vtysh_quit_pathd, vtysh_quit_pathd_cmd, "quit",
- }
- #endif /* HAVE_PATHD */
- 
-+#ifdef HAVE_PIMD
-+DEFUNSH(VTYSH_PIMD, vtysh_exit_pimd, vtysh_exit_pimd_cmd, "exit",
-+	"Exit current mode and down to previous mode\n")
-+{
-+	return vtysh_exit(vty);
-+}
-+
-+DEFUNSH(VTYSH_PIMD, vtysh_quit_pimd, vtysh_quit_pimd_cmd, "quit",
-+	"Exit current mode and down to previous mode\n")
-+{
-+	return vtysh_exit_pimd(self, vty, argc, argv);
-+}
-+#endif /* HAVE_PIMD */
-+
-+#ifdef HAVE_PIM6D
-+DEFUNSH(VTYSH_PIM6D, vtysh_exit_pim6d, vtysh_exit_pim6d_cmd, "exit",
-+	"Exit current mode and down to previous mode\n")
-+{
-+	return vtysh_exit(vty);
-+}
-+
-+DEFUNSH(VTYSH_PIM6D, vtysh_quit_pim6d, vtysh_quit_pim6d_cmd, "quit",
-+	"Exit current mode and down to previous mode\n")
-+{
-+	return vtysh_exit_pim6d(self, vty, argc, argv);
-+}
-+#endif /* HAVE_PIM6D */
-+
- DEFUNSH(VTYSH_ALL, vtysh_exit_line_vty, vtysh_exit_line_vty_cmd, "exit",
- 	"Exit current mode and down to previous mode\n")
- {
-@@ -5293,6 +5363,25 @@ void vtysh_init_vty(void)
- 	install_element(INTERFACE_NODE, &vtysh_exit_interface_cmd);
- 	install_element(INTERFACE_NODE, &vtysh_quit_interface_cmd);
- 
-+	/* pimd */
-+#ifdef HAVE_PIMD
-+	install_node(&pim_node);
-+	install_element(CONFIG_NODE, &router_pim_cmd);
-+	install_element(PIM_NODE, &vtysh_exit_pimd_cmd);
-+	install_element(PIM_NODE, &vtysh_quit_pimd_cmd);
-+	install_element(PIM_NODE, &vtysh_end_all_cmd);
-+#endif /* HAVE_PIMD */
-+
-+	/* pim6d */
-+#ifdef HAVE_PIM6D
-+	install_node(&pim6_node);
-+	install_element(CONFIG_NODE, &router_pim6_cmd);
-+	install_element(PIM6_NODE, &vtysh_exit_pim6d_cmd);
-+	install_element(PIM6_NODE, &vtysh_quit_pim6d_cmd);
-+	install_element(PIM6_NODE, &vtysh_end_all_cmd);
-+#endif /* HAVE_PIM6D */
-+
-+	/* zebra and all, cont. */
- 	install_node(&link_params_node);
- 	install_element(INTERFACE_NODE, &vtysh_link_params_cmd);
- 	install_element(LINK_PARAMS_NODE, &no_link_params_enable_cmd);
-diff --git a/vtysh/vtysh_config.c b/vtysh/vtysh_config.c
-index c207e4d42759..8f7cd84818c6 100644
---- a/vtysh/vtysh_config.c
-+++ b/vtysh/vtysh_config.c
-@@ -497,6 +497,11 @@ void vtysh_config_parse_line(void *arg, const char *line)
- 			config = config_get(BFD_NODE, line);
- 		else if (strncmp(line, "rpki", strlen("rpki")) == 0)
- 			config = config_get(RPKI_NODE, line);
-+		else if (strncmp(line, "router pim", strlen("router pim")) == 0)
-+			config = config_get(PIM_NODE, line);
-+		else if (strncmp(line, "router pim6", strlen("router pim6")) ==
-+			 0)
-+			config = config_get(PIM6_NODE, line);
- 		else {
- 			if (strncmp(line, "log", strlen("log")) == 0 ||
- 			    strncmp(line, "hostname", strlen("hostname")) == 0 ||
diff --git a/src/sonic-frr/patch/0078-vtysh-de-conditionalize-and-reorder-install-node.patch b/src/sonic-frr/patch/0078-vtysh-de-conditionalize-and-reorder-install-node.patch
deleted file mode 100644
index b43906c8cc4..00000000000
--- a/src/sonic-frr/patch/0078-vtysh-de-conditionalize-and-reorder-install-node.patch
+++ /dev/null
@@ -1,790 +0,0 @@
-From e26c580588b3689463c76aa96888147e53a48885 Mon Sep 17 00:00:00 2001
-From: David Lamparter <equinox@opensourcerouting.org>
-Date: Sat, 20 Jul 2024 18:30:31 -0700
-Subject: [PATCH] vtysh: de-conditionalize and reorder install_node
-
-There is entirely no point to these being conditional.  And pull them up
-so the upcoming pre-parse code can work on a clean slate.
-
-Signed-off-by: David Lamparter <equinox@opensourcerouting.org>
----
- lib/command.h      |   4 +
- vtysh/vtysh.c      | 182 ++++++++++++++++++---------------------------
- vtysh/vtysh_main.c |   1 -
- 3 files changed, 78 insertions(+), 109 deletions(-)
-
-diff --git a/lib/command.h b/lib/command.h
-index 57e3b9cda0b7..f364f1e8fa2a 100644
---- a/lib/command.h
-+++ b/lib/command.h
-@@ -252,6 +252,8 @@ struct cmd_node {
- /* Argc max counts. */
- #define CMD_ARGC_MAX   256
- 
-+/* clang-format off */
-+
- /* helper defines for end-user DEFUN* macros */
- #define DEFUN_CMD_ELEMENT(funcname, cmdname, cmdstr, helpstr, attrs, dnum)     \
- 	static const struct cmd_element cmdname = {                            \
-@@ -376,6 +378,8 @@ struct cmd_node {
- #define ALIAS_YANG(funcname, cmdname, cmdstr, helpstr)                         \
- 	ALIAS_ATTR(funcname, cmdname, cmdstr, helpstr, CMD_ATTR_YANG)
- 
-+/* clang-format on */
-+
- /* Some macroes */
- 
- /*
-diff --git a/vtysh/vtysh.c b/vtysh/vtysh.c
-index e657aa8af0ac..c43e1909e3e1 100644
---- a/vtysh/vtysh.c
-+++ b/vtysh/vtysh.c
-@@ -1161,14 +1161,12 @@ static char **new_completion(const char *text, int start, int end)
- }
- 
- /* Vty node structures. */
--#ifdef HAVE_BGPD
- static struct cmd_node bgp_node = {
- 	.name = "bgp",
- 	.node = BGP_NODE,
- 	.parent_node = CONFIG_NODE,
- 	.prompt = "%s(config-router)# ",
- };
--#endif /* HAVE_BGPD */
- 
- static struct cmd_node rip_node = {
- 	.name = "rip",
-@@ -1177,7 +1175,6 @@ static struct cmd_node rip_node = {
- 	.prompt = "%s(config-router)# ",
- };
- 
--#ifdef HAVE_ISISD
- static struct cmd_node isis_node = {
- 	.name = "isis",
- 	.node = ISIS_NODE,
-@@ -1205,16 +1202,13 @@ static struct cmd_node isis_srv6_node_msd_node = {
- 	.parent_node = ISIS_SRV6_NODE,
- 	.prompt = "%s(config-router-srv6-node-msd)# ",
- };
--#endif /* HAVE_ISISD */
- 
--#ifdef HAVE_FABRICD
- static struct cmd_node openfabric_node = {
- 	.name = "openfabric",
- 	.node = OPENFABRIC_NODE,
- 	.parent_node = CONFIG_NODE,
- 	.prompt = "%s(config-router)# ",
- };
--#endif /* HAVE_FABRICD */
- 
- static struct cmd_node interface_node = {
- 	.name = "interface",
-@@ -1237,7 +1231,6 @@ static struct cmd_node segment_routing_node = {
- 	.prompt = "%s(config-sr)# ",
- };
- 
--#if defined(HAVE_PATHD)
- static struct cmd_node sr_traffic_eng_node = {
- 	.name = "sr traffic-eng",
- 	.node = SR_TRAFFIC_ENG_NODE,
-@@ -1293,7 +1286,6 @@ static struct cmd_node pcep_pce_config_node = {
- 	.parent_node = PCEP_NODE,
- 	.prompt = "%s(pcep-sr-te-pcep-pce-config)# ",
- };
--#endif /* HAVE_PATHD */
- 
- static struct cmd_node vrf_node = {
- 	.name = "vrf",
-@@ -1365,14 +1357,12 @@ static struct cmd_node srv6_sid_format_uncompressed_f4024_node = {
- 	.prompt = "%s(config-srv6-format)# "
- };
- 
--#ifdef HAVE_PBRD
- static struct cmd_node pbr_map_node = {
- 	.name = "pbr-map",
- 	.node = PBRMAP_NODE,
- 	.parent_node = CONFIG_NODE,
- 	.prompt = "%s(config-pbr-map)# ",
- };
--#endif /* HAVE_PBRD */
- 
- static struct cmd_node zebra_node = {
- 	.name = "zebra",
-@@ -1381,7 +1371,6 @@ static struct cmd_node zebra_node = {
- 	.prompt = "%s(config-router)# ",
- };
- 
--#ifdef HAVE_BGPD
- static struct cmd_node bgp_vpnv4_node = {
- 	.name = "bgp vpnv4",
- 	.node = BGP_VPNV4_NODE,
-@@ -1477,7 +1466,6 @@ static struct cmd_node bgp_ipv6l_node = {
- 	.no_xpath = true,
- };
- 
--#ifdef ENABLE_BGP_VNC
- static struct cmd_node bgp_vnc_defaults_node = {
- 	.name = "bgp vnc defaults",
- 	.node = BGP_VNC_DEFAULTS_NODE,
-@@ -1505,7 +1493,6 @@ static struct cmd_node bgp_vnc_l2_group_node = {
- 	.parent_node = BGP_NODE,
- 	.prompt = "%s(config-router-vnc-l2-group)# ",
- };
--#endif /* ENABLE_BGP_VNC */
- 
- static struct cmd_node bmp_node = {
- 	.name = "bmp",
-@@ -1520,34 +1507,27 @@ static struct cmd_node bgp_srv6_node = {
- 	.parent_node = BGP_NODE,
- 	.prompt = "%s(config-router-srv6)# ",
- };
--#endif /* HAVE_BGPD */
- 
--#ifdef HAVE_OSPFD
- static struct cmd_node ospf_node = {
- 	.name = "ospf",
- 	.node = OSPF_NODE,
- 	.parent_node = CONFIG_NODE,
- 	.prompt = "%s(config-router)# ",
- };
--#endif /* HAVE_OSPFD */
- 
--#ifdef HAVE_EIGRPD
- static struct cmd_node eigrp_node = {
- 	.name = "eigrp",
- 	.node = EIGRP_NODE,
- 	.parent_node = CONFIG_NODE,
- 	.prompt = "%s(config-router)# ",
- };
--#endif /* HAVE_EIGRPD */
- 
--#ifdef HAVE_BABELD
- static struct cmd_node babel_node = {
- 	.name = "babel",
- 	.node = BABEL_NODE,
- 	.parent_node = CONFIG_NODE,
- 	.prompt = "%s(config-router)# ",
- };
--#endif /* HAVE_BABELD */
- 
- static struct cmd_node ripng_node = {
- 	.name = "ripng",
-@@ -1556,16 +1536,13 @@ static struct cmd_node ripng_node = {
- 	.prompt = "%s(config-router)# ",
- };
- 
--#ifdef HAVE_OSPF6D
- static struct cmd_node ospf6_node = {
- 	.name = "ospf6",
- 	.node = OSPF6_NODE,
- 	.parent_node = CONFIG_NODE,
- 	.prompt = "%s(config-ospf6)# ",
- };
--#endif /* HAVE_OSPF6D */
- 
--#ifdef HAVE_LDPD
- static struct cmd_node ldp_node = {
- 	.name = "ldp",
- 	.node = LDP_NODE,
-@@ -1614,7 +1591,6 @@ static struct cmd_node ldp_pseudowire_node = {
- 	.parent_node = LDP_L2VPN_NODE,
- 	.prompt = "%s(config-l2vpn-pw)# ",
- };
--#endif /* HAVE_LDPD */
- 
- static struct cmd_node keychain_node = {
- 	.name = "keychain",
-@@ -1637,7 +1613,6 @@ struct cmd_node link_params_node = {
- 	.prompt = "%s(config-link-params)# ",
- };
- 
--#ifdef HAVE_BGPD
- static struct cmd_node rpki_node = {
- 	.name = "rpki",
- 	.node = RPKI_NODE,
-@@ -1652,9 +1627,6 @@ static struct cmd_node rpki_vrf_node = {
- 	.prompt = "%s(config-vrf-rpki)# ",
- };
- 
--#endif /* HAVE_BGPD */
--
--#if HAVE_BFDD > 0
- static struct cmd_node bfd_node = {
- 	.name = "bfd",
- 	.node = BFD_NODE,
-@@ -1675,25 +1647,20 @@ static struct cmd_node bfd_profile_node = {
- 	.parent_node = BFD_NODE,
- 	.prompt = "%s(config-bfd-profile)# ",
- };
--#endif /* HAVE_BFDD */
- 
--#ifdef HAVE_PIMD
- static struct cmd_node pim_node = {
- 	.name = "pim",
- 	.node = PIM_NODE,
- 	.parent_node = CONFIG_NODE,
- 	.prompt = "%s(config-pim)# ",
- };
--#endif /* HAVE_PIMD */
- 
--#ifdef HAVE_PIM6D
- static struct cmd_node pim6_node = {
- 	.name = "pim6",
- 	.node = PIM6_NODE,
- 	.parent_node = CONFIG_NODE,
- 	.prompt = "%s(config-pim6)# ",
- };
--#endif /* HAVE_PIM6D */
- 
- /* Defined in lib/vty.c */
- extern struct cmd_node vty_node;
-@@ -4954,15 +4921,87 @@ void vtysh_init_vty(void)
- 	cmd_init(0);
- 	cmd_variable_handler_register(vtysh_var_handler);
- 
-+	install_node(&bgp_node);
-+	install_node(&babel_node);
-+	install_node(&bgp_vpnv4_node);
-+	install_node(&bgp_vpnv6_node);
-+	install_node(&bgp_flowspecv4_node);
-+	install_node(&bgp_flowspecv6_node);
-+	install_node(&bgp_ipv4_node);
-+	install_node(&bgp_ipv4m_node);
-+	install_node(&bgp_ipv4l_node);
-+	install_node(&bgp_ipv6_node);
-+	install_node(&bgp_ipv6m_node);
-+	install_node(&bgp_ipv6l_node);
-+	install_node(&bgp_vrf_policy_node);
-+	install_node(&bgp_vnc_defaults_node);
-+	install_node(&bgp_vnc_nve_group_node);
-+	install_node(&bgp_vnc_l2_group_node);
-+	install_node(&bgp_evpn_node);
-+	install_node(&bgp_evpn_vni_node);
-+	install_node(&rpki_node);
-+	install_node(&bmp_node);
-+	install_node(&bgp_srv6_node);
-+	install_node(&rip_node);
-+	install_node(&ripng_node);
-+	install_node(&ospf_node);
-+	install_node(&ospf6_node);
-+	install_node(&ldp_node);
-+	install_node(&ldp_ipv4_node);
-+	install_node(&ldp_ipv6_node);
-+	install_node(&ldp_ipv4_iface_node);
-+	install_node(&ldp_ipv6_iface_node);
-+	install_node(&ldp_l2vpn_node);
-+	install_node(&ldp_pseudowire_node);
-+	install_node(&eigrp_node);
-+	install_node(&isis_node);
-+	install_node(&isis_flex_algo_node);
-+	install_node(&isis_srv6_node);
-+	install_node(&isis_srv6_node_msd_node);
-+	install_node(&openfabric_node);
-+	install_node(&pbr_map_node);
-+	install_node(&bfd_node);
-+	install_node(&bfd_peer_node);
-+	install_node(&bfd_profile_node);
-+	install_node(&segment_routing_node);
-+	install_node(&sr_traffic_eng_node);
-+	install_node(&srte_segment_list_node);
-+	install_node(&srte_policy_node);
-+	install_node(&srte_candidate_dyn_node);
-+	install_node(&pcep_node);
-+	install_node(&pcep_pcc_node);
-+	install_node(&pcep_pce_node);
-+	install_node(&pcep_pce_config_node);
-+	install_node(&keychain_node);
-+	install_node(&keychain_key_node);
-+	install_node(&nh_group_node);
-+	install_node(&zebra_node);
-+	install_node(&interface_node);
-+	install_node(&pim_node);
-+	install_node(&pim6_node);
-+	install_node(&link_params_node);
-+	install_node(&pw_node);
-+	install_node(&vrf_node);
-+	install_node(&rpki_vrf_node);
-+	install_node(&rmap_node);
-+	install_node(&vty_node);
-+	install_node(&srv6_node);
-+	install_node(&srv6_locs_node);
-+	install_node(&srv6_loc_node);
-+	install_node(&srv6_encap_node);
-+	install_node(&srv6_sid_formats_node);
-+	install_node(&srv6_sid_format_usid_f3216_node);
-+	install_node(&srv6_sid_format_uncompressed_f4024_node);
-+
-+	vtysh_init_cmd();
-+
- 	/* bgpd */
- #ifdef HAVE_BGPD
--	install_node(&bgp_node);
- 	install_element(CONFIG_NODE, &router_bgp_cmd);
- 	install_element(BGP_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&bgp_vpnv4_node);
- 	install_element(BGP_NODE, &address_family_ipv4_vpn_cmd);
- #ifdef KEEP_OLD_VPN_COMMANDS
- 	install_element(BGP_NODE, &address_family_vpnv4_cmd);
-@@ -4972,7 +5011,6 @@ void vtysh_init_vty(void)
- 	install_element(BGP_VPNV4_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_VPNV4_NODE, &exit_address_family_cmd);
- 
--	install_node(&bgp_vpnv6_node);
- 	install_element(BGP_NODE, &address_family_ipv6_vpn_cmd);
- #ifdef KEEP_OLD_VPN_COMMANDS
- 	install_element(BGP_NODE, &address_family_vpnv6_cmd);
-@@ -4982,56 +5020,48 @@ void vtysh_init_vty(void)
- 	install_element(BGP_VPNV6_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_VPNV6_NODE, &exit_address_family_cmd);
- 
--	install_node(&bgp_flowspecv4_node);
- 	install_element(BGP_NODE, &address_family_flowspecv4_cmd);
- 	install_element(BGP_FLOWSPECV4_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_FLOWSPECV4_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_FLOWSPECV4_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_FLOWSPECV4_NODE, &exit_address_family_cmd);
- 
--	install_node(&bgp_flowspecv6_node);
- 	install_element(BGP_NODE, &address_family_flowspecv6_cmd);
- 	install_element(BGP_FLOWSPECV6_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_FLOWSPECV6_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_FLOWSPECV6_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_FLOWSPECV6_NODE, &exit_address_family_cmd);
- 
--	install_node(&bgp_ipv4_node);
- 	install_element(BGP_NODE, &address_family_ipv4_cmd);
- 	install_element(BGP_IPV4_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_IPV4_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_IPV4_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_IPV4_NODE, &exit_address_family_cmd);
- 
--	install_node(&bgp_ipv4m_node);
- 	install_element(BGP_NODE, &address_family_ipv4_multicast_cmd);
- 	install_element(BGP_IPV4M_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_IPV4M_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_IPV4M_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_IPV4M_NODE, &exit_address_family_cmd);
- 
--	install_node(&bgp_ipv4l_node);
- 	install_element(BGP_NODE, &address_family_ipv4_labeled_unicast_cmd);
- 	install_element(BGP_IPV4L_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_IPV4L_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_IPV4L_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_IPV4L_NODE, &exit_address_family_cmd);
- 
--	install_node(&bgp_ipv6_node);
- 	install_element(BGP_NODE, &address_family_ipv6_cmd);
- 	install_element(BGP_IPV6_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_IPV6_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_IPV6_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_IPV6_NODE, &exit_address_family_cmd);
- 
--	install_node(&bgp_ipv6m_node);
- 	install_element(BGP_NODE, &address_family_ipv6_multicast_cmd);
- 	install_element(BGP_IPV6M_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_IPV6M_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_IPV6M_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_IPV6M_NODE, &exit_address_family_cmd);
- 
--	install_node(&bgp_ipv6l_node);
- 	install_element(BGP_NODE, &address_family_ipv6_labeled_unicast_cmd);
- 	install_element(BGP_IPV6L_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_IPV6L_NODE, &vtysh_quit_bgpd_cmd);
-@@ -5039,28 +5069,24 @@ void vtysh_init_vty(void)
- 	install_element(BGP_IPV6L_NODE, &exit_address_family_cmd);
- 
- #if defined(ENABLE_BGP_VNC)
--	install_node(&bgp_vrf_policy_node);
- 	install_element(BGP_NODE, &vnc_vrf_policy_cmd);
- 	install_element(BGP_VRF_POLICY_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_VRF_POLICY_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_VRF_POLICY_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_VRF_POLICY_NODE, &exit_vrf_policy_cmd);
- 
--	install_node(&bgp_vnc_defaults_node);
- 	install_element(BGP_NODE, &vnc_defaults_cmd);
- 	install_element(BGP_VNC_DEFAULTS_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_VNC_DEFAULTS_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_VNC_DEFAULTS_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_VNC_DEFAULTS_NODE, &exit_vnc_config_cmd);
- 
--	install_node(&bgp_vnc_nve_group_node);
- 	install_element(BGP_NODE, &vnc_nve_group_cmd);
- 	install_element(BGP_VNC_NVE_GROUP_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_VNC_NVE_GROUP_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_VNC_NVE_GROUP_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_VNC_NVE_GROUP_NODE, &exit_vnc_config_cmd);
- 
--	install_node(&bgp_vnc_l2_group_node);
- 	install_element(BGP_NODE, &vnc_l2_group_cmd);
- 	install_element(BGP_VNC_L2_GROUP_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_VNC_L2_GROUP_NODE, &vtysh_quit_bgpd_cmd);
-@@ -5068,33 +5094,28 @@ void vtysh_init_vty(void)
- 	install_element(BGP_VNC_L2_GROUP_NODE, &exit_vnc_config_cmd);
- #endif
- 
--	install_node(&bgp_evpn_node);
- 	install_element(BGP_NODE, &address_family_evpn_cmd);
- 	install_element(BGP_EVPN_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_EVPN_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_EVPN_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_EVPN_NODE, &exit_address_family_cmd);
- 
--	install_node(&bgp_evpn_vni_node);
- 	install_element(BGP_EVPN_NODE, &bgp_evpn_vni_cmd);
- 	install_element(BGP_EVPN_VNI_NODE, &vtysh_exit_bgpd_cmd);
- 	install_element(BGP_EVPN_VNI_NODE, &vtysh_quit_bgpd_cmd);
- 	install_element(BGP_EVPN_VNI_NODE, &vtysh_end_all_cmd);
- 	install_element(BGP_EVPN_VNI_NODE, &exit_vni_cmd);
- 
--	install_node(&rpki_node);
- 	install_element(CONFIG_NODE, &rpki_cmd);
- 	install_element(RPKI_NODE, &rpki_exit_cmd);
- 	install_element(RPKI_NODE, &rpki_quit_cmd);
- 	install_element(RPKI_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&bmp_node);
- 	install_element(BGP_NODE, &bmp_targets_cmd);
- 	install_element(BMP_NODE, &bmp_exit_cmd);
- 	install_element(BMP_NODE, &bmp_quit_cmd);
- 	install_element(BMP_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&bgp_srv6_node);
- 	install_element(BGP_NODE, &bgp_srv6_cmd);
- 	install_element(BGP_SRV6_NODE, &exit_bgp_srv6_cmd);
- 	install_element(BGP_SRV6_NODE, &quit_bgp_srv6_cmd);
-@@ -5102,7 +5123,6 @@ void vtysh_init_vty(void)
- #endif /* HAVE_BGPD */
- 
- 	/* ripd */
--	install_node(&rip_node);
- #ifdef HAVE_RIPD
- 	install_element(CONFIG_NODE, &router_rip_cmd);
- 	install_element(RIP_NODE, &vtysh_exit_ripd_cmd);
-@@ -5111,7 +5131,6 @@ void vtysh_init_vty(void)
- #endif /* HAVE_RIPD */
- 
- 	/* ripngd */
--	install_node(&ripng_node);
- #ifdef HAVE_RIPNGD
- 	install_element(CONFIG_NODE, &router_ripng_cmd);
- 	install_element(RIPNG_NODE, &vtysh_exit_ripngd_cmd);
-@@ -5121,7 +5140,6 @@ void vtysh_init_vty(void)
- 
- 	/* ospfd */
- #ifdef HAVE_OSPFD
--	install_node(&ospf_node);
- 	install_element(CONFIG_NODE, &router_ospf_cmd);
- 	install_element(OSPF_NODE, &vtysh_exit_ospfd_cmd);
- 	install_element(OSPF_NODE, &vtysh_quit_ospfd_cmd);
-@@ -5130,7 +5148,6 @@ void vtysh_init_vty(void)
- 
- 	/* ospf6d */
- #ifdef HAVE_OSPF6D
--	install_node(&ospf6_node);
- 	install_element(CONFIG_NODE, &router_ospf6_cmd);
- 	install_element(OSPF6_NODE, &vtysh_exit_ospf6d_cmd);
- 	install_element(OSPF6_NODE, &vtysh_quit_ospf6d_cmd);
-@@ -5139,45 +5156,38 @@ void vtysh_init_vty(void)
- 
- 	/* ldpd */
- #if defined(HAVE_LDPD)
--	install_node(&ldp_node);
- 	install_element(CONFIG_NODE, &ldp_mpls_ldp_cmd);
- 	install_element(LDP_NODE, &vtysh_exit_ldpd_cmd);
- 	install_element(LDP_NODE, &vtysh_quit_ldpd_cmd);
- 	install_element(LDP_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&ldp_ipv4_node);
- 	install_element(LDP_NODE, &ldp_address_family_ipv4_cmd);
- 	install_element(LDP_IPV4_NODE, &vtysh_exit_ldpd_cmd);
- 	install_element(LDP_IPV4_NODE, &vtysh_quit_ldpd_cmd);
- 	install_element(LDP_IPV4_NODE, &ldp_exit_address_family_cmd);
- 	install_element(LDP_IPV4_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&ldp_ipv6_node);
- 	install_element(LDP_NODE, &ldp_address_family_ipv6_cmd);
- 	install_element(LDP_IPV6_NODE, &vtysh_exit_ldpd_cmd);
- 	install_element(LDP_IPV6_NODE, &vtysh_quit_ldpd_cmd);
- 	install_element(LDP_IPV6_NODE, &ldp_exit_address_family_cmd);
- 	install_element(LDP_IPV6_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&ldp_ipv4_iface_node);
- 	install_element(LDP_IPV4_NODE, &ldp_interface_ifname_cmd);
- 	install_element(LDP_IPV4_IFACE_NODE, &vtysh_exit_ldpd_cmd);
- 	install_element(LDP_IPV4_IFACE_NODE, &vtysh_quit_ldpd_cmd);
- 	install_element(LDP_IPV4_IFACE_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&ldp_ipv6_iface_node);
- 	install_element(LDP_IPV6_NODE, &ldp_interface_ifname_cmd);
- 	install_element(LDP_IPV6_IFACE_NODE, &vtysh_exit_ldpd_cmd);
- 	install_element(LDP_IPV6_IFACE_NODE, &vtysh_quit_ldpd_cmd);
- 	install_element(LDP_IPV6_IFACE_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&ldp_l2vpn_node);
- 	install_element(CONFIG_NODE, &ldp_l2vpn_word_type_vpls_cmd);
- 	install_element(LDP_L2VPN_NODE, &vtysh_exit_ldpd_cmd);
- 	install_element(LDP_L2VPN_NODE, &vtysh_quit_ldpd_cmd);
- 	install_element(LDP_L2VPN_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&ldp_pseudowire_node);
- 	install_element(LDP_L2VPN_NODE, &ldp_member_pseudowire_ifname_cmd);
- 	install_element(LDP_PSEUDOWIRE_NODE, &vtysh_exit_ldpd_cmd);
- 	install_element(LDP_PSEUDOWIRE_NODE, &vtysh_quit_ldpd_cmd);
-@@ -5186,7 +5196,6 @@ void vtysh_init_vty(void)
- 
- 	/* eigrpd */
- #ifdef HAVE_EIGRPD
--	install_node(&eigrp_node);
- 	install_element(CONFIG_NODE, &router_eigrp_cmd);
- 	install_element(EIGRP_NODE, &vtysh_exit_eigrpd_cmd);
- 	install_element(EIGRP_NODE, &vtysh_quit_eigrpd_cmd);
-@@ -5195,7 +5204,6 @@ void vtysh_init_vty(void)
- 
- 	/* babeld */
- #ifdef HAVE_BABELD
--	install_node(&babel_node);
- 	install_element(CONFIG_NODE, &router_babel_cmd);
- 	install_element(BABEL_NODE, &vtysh_exit_babeld_cmd);
- 	install_element(BABEL_NODE, &vtysh_quit_babeld_cmd);
-@@ -5204,25 +5212,21 @@ void vtysh_init_vty(void)
- 
- 	/* isisd */
- #ifdef HAVE_ISISD
--	install_node(&isis_node);
- 	install_element(CONFIG_NODE, &router_isis_cmd);
- 	install_element(ISIS_NODE, &vtysh_exit_isisd_cmd);
- 	install_element(ISIS_NODE, &vtysh_quit_isisd_cmd);
- 	install_element(ISIS_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&isis_flex_algo_node);
- 	install_element(ISIS_NODE, &isis_flex_algo_cmd);
- 	install_element(ISIS_FLEX_ALGO_NODE, &vtysh_exit_isis_flex_algo_cmd);
- 	install_element(ISIS_FLEX_ALGO_NODE, &vtysh_quit_isis_flex_algo_cmd);
- 	install_element(ISIS_FLEX_ALGO_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&isis_srv6_node);
- 	install_element(ISIS_NODE, &isis_srv6_enable_cmd);
- 	install_element(ISIS_SRV6_NODE, &isis_srv6_node_msd_cmd);
- 	install_element(ISIS_SRV6_NODE, &vtysh_exit_isis_srv6_enable_cmd);
- 	install_element(ISIS_SRV6_NODE, &vtysh_quit_isis_srv6_enable_cmd);
- 	install_element(ISIS_SRV6_NODE, &vtysh_end_all_cmd);
--	install_node(&isis_srv6_node_msd_node);
- 	install_element(ISIS_SRV6_NODE_MSD_NODE,
- 			&vtysh_exit_isis_srv6_node_msd_cmd);
- 	install_element(ISIS_SRV6_NODE_MSD_NODE,
-@@ -5232,7 +5236,6 @@ void vtysh_init_vty(void)
- 
- 	/* fabricd */
- #ifdef HAVE_FABRICD
--	install_node(&openfabric_node);
- 	install_element(CONFIG_NODE, &router_openfabric_cmd);
- 	install_element(OPENFABRIC_NODE, &vtysh_exit_fabricd_cmd);
- 	install_element(OPENFABRIC_NODE, &vtysh_quit_fabricd_cmd);
-@@ -5241,7 +5244,6 @@ void vtysh_init_vty(void)
- 
- 	/* pbrd */
- #ifdef HAVE_PBRD
--	install_node(&pbr_map_node);
- 	install_element(CONFIG_NODE, &vtysh_pbr_map_cmd);
- 	install_element(CONFIG_NODE, &vtysh_no_pbr_map_cmd);
- 	install_element(PBRMAP_NODE, &vtysh_exit_pbr_map_cmd);
-@@ -5251,37 +5253,28 @@ void vtysh_init_vty(void)
- 
- 	/* bfdd */
- #if HAVE_BFDD > 0
--	install_node(&bfd_node);
- 	install_element(CONFIG_NODE, &bfd_enter_cmd);
- 	install_element(BFD_NODE, &vtysh_exit_bfdd_cmd);
- 	install_element(BFD_NODE, &vtysh_quit_bfdd_cmd);
- 	install_element(BFD_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&bfd_peer_node);
- 	install_element(BFD_NODE, &bfd_peer_enter_cmd);
- 	install_element(BFD_PEER_NODE, &vtysh_exit_bfdd_cmd);
- 	install_element(BFD_PEER_NODE, &vtysh_quit_bfdd_cmd);
- 	install_element(BFD_PEER_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&bfd_profile_node);
- 	install_element(BFD_NODE, &bfd_profile_enter_cmd);
- 	install_element(BFD_PROFILE_NODE, &vtysh_exit_bfdd_cmd);
- 	install_element(BFD_PROFILE_NODE, &vtysh_quit_bfdd_cmd);
- 	install_element(BFD_PROFILE_NODE, &vtysh_end_all_cmd);
- #endif /* HAVE_BFDD */
- 
--	install_node(&segment_routing_node);
- 	install_element(CONFIG_NODE, &segment_routing_cmd);
- 	install_element(SEGMENT_ROUTING_NODE, &vtysh_exit_sr_cmd);
- 	install_element(SEGMENT_ROUTING_NODE, &vtysh_quit_sr_cmd);
- 	install_element(SEGMENT_ROUTING_NODE, &vtysh_end_all_cmd);
- 
- #if defined(HAVE_PATHD)
--	install_node(&sr_traffic_eng_node);
--	install_node(&srte_segment_list_node);
--	install_node(&srte_policy_node);
--	install_node(&srte_candidate_dyn_node);
--
- 	install_element(SR_TRAFFIC_ENG_NODE, &vtysh_exit_pathd_cmd);
- 	install_element(SR_TRAFFIC_ENG_NODE, &vtysh_quit_pathd_cmd);
- 	install_element(SR_SEGMENT_LIST_NODE, &vtysh_exit_pathd_cmd);
-@@ -5302,11 +5295,6 @@ void vtysh_init_vty(void)
- 	install_element(SR_TRAFFIC_ENG_NODE, &srte_policy_cmd);
- 	install_element(SR_POLICY_NODE, &srte_policy_candidate_dyn_path_cmd);
- 
--	install_node(&pcep_node);
--	install_node(&pcep_pcc_node);
--	install_node(&pcep_pce_node);
--	install_node(&pcep_pce_config_node);
--
- 	install_element(PCEP_NODE, &vtysh_exit_pathd_cmd);
- 	install_element(PCEP_NODE, &vtysh_quit_pathd_cmd);
- 	install_element(PCEP_PCC_NODE, &vtysh_exit_pathd_cmd);
-@@ -5329,14 +5317,12 @@ void vtysh_init_vty(void)
- #endif /* HAVE_PATHD */
- 
- 	/* keychain */
--	install_node(&keychain_node);
- 	install_element(CONFIG_NODE, &key_chain_cmd);
- 	install_element(KEYCHAIN_NODE, &key_chain_cmd);
- 	install_element(KEYCHAIN_NODE, &vtysh_exit_keys_cmd);
- 	install_element(KEYCHAIN_NODE, &vtysh_quit_keys_cmd);
- 	install_element(KEYCHAIN_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&keychain_key_node);
- 	install_element(KEYCHAIN_NODE, &key_cmd);
- 	install_element(KEYCHAIN_KEY_NODE, &key_chain_cmd);
- 	install_element(KEYCHAIN_KEY_NODE, &vtysh_exit_keys_cmd);
-@@ -5344,7 +5330,6 @@ void vtysh_init_vty(void)
- 	install_element(KEYCHAIN_KEY_NODE, &vtysh_end_all_cmd);
- 
- 	/* nexthop-group */
--	install_node(&nh_group_node);
- 	install_element(CONFIG_NODE, &vtysh_nexthop_group_cmd);
- 	install_element(CONFIG_NODE, &vtysh_no_nexthop_group_cmd);
- 	install_element(NH_GROUP_NODE, &vtysh_end_all_cmd);
-@@ -5352,9 +5337,6 @@ void vtysh_init_vty(void)
- 	install_element(NH_GROUP_NODE, &vtysh_quit_nexthop_group_cmd);
- 
- 	/* zebra and all */
--	install_node(&zebra_node);
--
--	install_node(&interface_node);
- 	install_element(CONFIG_NODE, &vtysh_interface_cmd);
- 	install_element(INTERFACE_NODE, &vtysh_end_all_cmd);
- 	install_element(INTERFACE_NODE, &vtysh_exit_interface_cmd);
-@@ -5362,7 +5344,6 @@ void vtysh_init_vty(void)
- 
- 	/* pimd */
- #ifdef HAVE_PIMD
--	install_node(&pim_node);
- 	install_element(CONFIG_NODE, &router_pim_cmd);
- 	install_element(PIM_NODE, &vtysh_exit_pimd_cmd);
- 	install_element(PIM_NODE, &vtysh_quit_pimd_cmd);
-@@ -5371,15 +5352,12 @@ void vtysh_init_vty(void)
- 
- 	/* pim6d */
- #ifdef HAVE_PIM6D
--	install_node(&pim6_node);
- 	install_element(CONFIG_NODE, &router_pim6_cmd);
- 	install_element(PIM6_NODE, &vtysh_exit_pim6d_cmd);
- 	install_element(PIM6_NODE, &vtysh_quit_pim6d_cmd);
- 	install_element(PIM6_NODE, &vtysh_end_all_cmd);
- #endif /* HAVE_PIM6D */
- 
--	/* zebra and all, cont. */
--	install_node(&link_params_node);
- 	install_element(INTERFACE_NODE, &vtysh_link_params_cmd);
- 	install_element(LINK_PARAMS_NODE, &no_link_params_enable_cmd);
- 	install_element(LINK_PARAMS_NODE, &exit_link_params_cmd);
-@@ -5387,13 +5365,11 @@ void vtysh_init_vty(void)
- 	install_element(LINK_PARAMS_NODE, &vtysh_exit_link_params_cmd);
- 	install_element(LINK_PARAMS_NODE, &vtysh_quit_link_params_cmd);
- 
--	install_node(&pw_node);
- 	install_element(CONFIG_NODE, &vtysh_pseudowire_cmd);
- 	install_element(PW_NODE, &vtysh_end_all_cmd);
- 	install_element(PW_NODE, &vtysh_exit_pseudowire_cmd);
- 	install_element(PW_NODE, &vtysh_quit_pseudowire_cmd);
- 
--	install_node(&vrf_node);
- 	install_element(CONFIG_NODE, &vtysh_vrf_cmd);
- 	install_element(VRF_NODE, &exit_vrf_config_cmd);
- 	install_element(VRF_NODE, &vtysh_end_all_cmd);
-@@ -5401,7 +5377,6 @@ void vtysh_init_vty(void)
- 	install_element(VRF_NODE, &vtysh_quit_vrf_cmd);
- 
- #ifdef HAVE_BGPD
--	install_node(&rpki_vrf_node);
- 	install_element(VRF_NODE, &rpki_cmd);
- 	install_element(RPKI_VRF_NODE, &rpki_exit_cmd);
- 	install_element(RPKI_VRF_NODE, &rpki_quit_cmd);
-@@ -5411,13 +5386,11 @@ void vtysh_init_vty(void)
- 	install_element(CONFIG_NODE, &vtysh_affinity_map_cmd);
- 	install_element(CONFIG_NODE, &vtysh_no_affinity_map_cmd);
- 
--	install_node(&rmap_node);
- 	install_element(CONFIG_NODE, &vtysh_route_map_cmd);
- 	install_element(RMAP_NODE, &vtysh_exit_rmap_cmd);
- 	install_element(RMAP_NODE, &vtysh_quit_rmap_cmd);
- 	install_element(RMAP_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&vty_node);
- 	install_element(CONFIG_NODE, &vtysh_line_vty_cmd);
- 	install_element(VTY_NODE, &vtysh_exit_line_vty_cmd);
- 	install_element(VTY_NODE, &vtysh_quit_line_vty_cmd);
-@@ -5450,7 +5423,6 @@ void vtysh_init_vty(void)
- 	install_element(ENABLE_NODE, &vtysh_end_all_cmd);
- 
- 	/* SRv6 Data-plane */
--	install_node(&srv6_node);
- 	install_element(SEGMENT_ROUTING_NODE, &srv6_cmd);
- 	install_element(SRV6_NODE, &srv6_locators_cmd);
- 	install_element(SRV6_NODE, &srv6_sid_formats_cmd);
-@@ -5458,32 +5430,26 @@ void vtysh_init_vty(void)
- 	install_element(SRV6_NODE, &vtysh_end_all_cmd);
- 	install_element(SRV6_NODE, &srv6_encap_cmd);
- 
--	install_node(&srv6_locs_node);
- 	install_element(SRV6_LOCS_NODE, &srv6_locator_cmd);
- 	install_element(SRV6_LOCS_NODE, &exit_srv6_locs_config_cmd);
- 	install_element(SRV6_LOCS_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&srv6_loc_node);
- 	install_element(SRV6_LOC_NODE, &exit_srv6_loc_config_cmd);
- 	install_element(SRV6_LOC_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&srv6_encap_node);
- 	install_element(SRV6_ENCAP_NODE, &exit_srv6_encap_cmd);
- 	install_element(SRV6_ENCAP_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&srv6_sid_formats_node);
- 	install_element(SRV6_SID_FORMATS_NODE, &srv6_sid_format_f3216_usid_cmd);
- 	install_element(SRV6_SID_FORMATS_NODE,
- 			&srv6_sid_format_f4024_uncompressed_cmd);
- 	install_element(SRV6_SID_FORMATS_NODE, &exit_srv6_sid_formats_cmd);
- 	install_element(SRV6_SID_FORMATS_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&srv6_sid_format_usid_f3216_node);
- 	install_element(SRV6_SID_FORMAT_USID_F3216_NODE,
- 			&exit_srv6_sid_format_cmd);
- 	install_element(SRV6_SID_FORMAT_USID_F3216_NODE, &vtysh_end_all_cmd);
- 
--	install_node(&srv6_sid_format_uncompressed_f4024_node);
- 	install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE,
- 			&exit_srv6_sid_format_cmd);
- 	install_element(SRV6_SID_FORMAT_UNCOMPRESSED_F4024_NODE,
-diff --git a/vtysh/vtysh_main.c b/vtysh/vtysh_main.c
-index 464d82cf7fee..64198132cc64 100644
---- a/vtysh/vtysh_main.c
-+++ b/vtysh/vtysh_main.c
-@@ -489,7 +489,6 @@ int main(int argc, char **argv, char **env)
- 
- 	/* Make vty structure and register commands. */
- 	vtysh_init_vty();
--	vtysh_init_cmd();
- 	vtysh_user_init();
- 	vtysh_config_init();
- 
diff --git a/src/sonic-frr/patch/0079-staticd-add-support-for-srv6.patch b/src/sonic-frr/patch/0079-staticd-add-support-for-srv6.patch
deleted file mode 100644
index bba0fdf20a8..00000000000
--- a/src/sonic-frr/patch/0079-staticd-add-support-for-srv6.patch
+++ /dev/null
@@ -1,2564 +0,0 @@
-From 2ae4383755054e461fac727abf2ceea2b6ab3ae1 Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Tue, 7 Jan 2025 14:23:34 +0100
-Subject: [PATCH] staticd: Add support for SRv6
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- lib/command.h                                 |   1 +
- staticd/static_main.c                         |   8 +
- staticd/static_nb.c                           |  29 +
- staticd/static_nb.h                           |  32 +-
- staticd/static_nb_config.c                    | 194 ++++++
- staticd/static_srv6.c                         | 192 ++++++
- staticd/static_srv6.h                         | 125 ++++
- staticd/static_vrf.c                          |   2 +
- staticd/static_vty.c                          | 320 +++++++++
- staticd/static_zebra.c                        | 698 ++++++++++++++++++
- staticd/static_zebra.h                        |  12 +-
- staticd/subdir.am                             |   2 +
- tests/topotests/static_srv6_sids/__init__.py  |   0
- .../static_srv6_sids/expected_srv6_sids.json  | 142 ++++
- .../topotests/static_srv6_sids/r1/mgmtd.conf  |   0
- tests/topotests/static_srv6_sids/r1/setup.sh  |  13 +
- .../static_srv6_sids/r1/staticd.conf          |  16 +
- .../topotests/static_srv6_sids/r1/zebra.conf  |  19 +
- .../static_srv6_sids/test_static_srv6_sids.py |  89 +++
- vtysh/vtysh.c                                 |  38 +-
- yang/frr-staticd.yang                         |  59 +-
- zebra/zebra_srv6.c                            | 124 +++-
- 22 files changed, 2032 insertions(+), 21 deletions(-)
- create mode 100644 staticd/static_srv6.c
- create mode 100644 staticd/static_srv6.h
- create mode 100644 tests/topotests/static_srv6_sids/__init__.py
- create mode 100644 tests/topotests/static_srv6_sids/expected_srv6_sids.json
- create mode 100644 tests/topotests/static_srv6_sids/r1/mgmtd.conf
- create mode 100644 tests/topotests/static_srv6_sids/r1/setup.sh
- create mode 100644 tests/topotests/static_srv6_sids/r1/staticd.conf
- create mode 100644 tests/topotests/static_srv6_sids/r1/zebra.conf
- create mode 100755 tests/topotests/static_srv6_sids/test_static_srv6_sids.py
-
-diff --git a/lib/command.h b/lib/command.h
-index c60751789f..dfd732893b 100644
---- a/lib/command.h
-+++ b/lib/command.h
-@@ -154,6 +154,7 @@ enum node_type {
- 	PCEP_PCE_NODE,		 /* PCE configuration node */
- 	PCEP_PCC_NODE,		 /* PCC configuration node */
- 	SRV6_NODE,		 /* SRv6 node */
-+	SRV6_SIDS_NODE,		 /* SRv6 SIDs node */
- 	SRV6_LOCS_NODE,		 /* SRv6 locators node */
- 	SRV6_LOC_NODE,		 /* SRv6 locator node */
- 	SRV6_ENCAP_NODE,		 /* SRv6 encapsulation node */
-diff --git a/staticd/static_main.c b/staticd/static_main.c
-index 9468a98b83..f01bc08fd8 100644
---- a/staticd/static_main.c
-+++ b/staticd/static_main.c
-@@ -26,6 +26,7 @@
- #include "static_zebra.h"
- #include "static_debug.h"
- #include "static_nb.h"
-+#include "static_srv6.h"
- 
- #include "mgmt_be_client.h"
- 
-@@ -76,6 +77,10 @@ static void sigint(void)
- 	static_vrf_terminate();
- 
- 	static_zebra_stop();
-+
-+	/* clean up SRv6 data structures */
-+	static_srv6_cleanup();
-+
- 	frr_fini();
- 
- 	exit(0);
-@@ -160,6 +165,9 @@ int main(int argc, char **argv, char **envp)
- 	static_debug_init();
- 	static_vrf_init();
- 
-+	/* initialize SRv6 data structures */
-+	static_srv6_init();
-+
- 	static_zebra_init();
- 	static_vty_init();
- 
-diff --git a/staticd/static_nb.c b/staticd/static_nb.c
-index e6aa71a77b..d607bd8888 100644
---- a/staticd/static_nb.c
-+++ b/staticd/static_nb.c
-@@ -224,6 +224,35 @@ const struct frr_yang_module_info frr_staticd_info = {
- 				.destroy = routing_control_plane_protocols_control_plane_protocol_staticd_route_list_src_list_path_list_frr_nexthops_nexthop_mpls_label_stack_entry_traffic_class_destroy,
- 			}
- 		},
-+		{
-+			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids/sid",
-+			.cbs = {
-+				.apply_finish = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_apply_finish,
-+				.create = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_create,
-+				.destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_destroy,
-+			}
-+		},
-+		{
-+			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids/sid/behavior",
-+			.cbs = {
-+				.modify = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_modify,
-+				.destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_destroy,
-+			}
-+		},
-+		{
-+			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids/sid/vrf-name",
-+			.cbs = {
-+				.modify = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_modify,
-+				.destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_destroy,
-+			}
-+		},
-+		{
-+			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids/sid/locator-name",
-+			.cbs = {
-+				.modify = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_modify,
-+				.destroy = routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_destroy,
-+			}
-+		},
- 		{
- 			.xpath = NULL,
- 		},
-diff --git a/staticd/static_nb.h b/staticd/static_nb.h
-index be75d9d38c..fca9f9952c 100644
---- a/staticd/static_nb.h
-+++ b/staticd/static_nb.h
-@@ -118,6 +118,34 @@ int routing_control_plane_protocols_control_plane_protocol_staticd_route_list_sr
- 	struct nb_cb_modify_args *args);
- int routing_control_plane_protocols_control_plane_protocol_staticd_route_list_src_list_path_list_frr_nexthops_nexthop_mpls_label_stack_entry_traffic_class_destroy(
- 	struct nb_cb_destroy_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_create(
-+	struct nb_cb_create_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_destroy(
-+	struct nb_cb_destroy_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_create(
-+	struct nb_cb_create_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_destroy(
-+	struct nb_cb_destroy_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_create(
-+	struct nb_cb_create_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_destroy(
-+	struct nb_cb_destroy_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_create(
-+	struct nb_cb_create_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_destroy(
-+	struct nb_cb_destroy_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_modify(
-+	struct nb_cb_modify_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_destroy(
-+	struct nb_cb_destroy_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_modify(
-+	struct nb_cb_modify_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_destroy(
-+	struct nb_cb_destroy_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_modify(
-+	struct nb_cb_modify_args *args);
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_destroy(
-+	struct nb_cb_destroy_args *args);
- 
- /* Optional 'apply_finish' callbacks. */
- 
-@@ -125,6 +153,8 @@ void routing_control_plane_protocols_control_plane_protocol_staticd_route_list_p
- 	struct nb_cb_apply_finish_args *args);
- void routing_control_plane_protocols_control_plane_protocol_staticd_route_list_src_list_path_list_frr_nexthops_nexthop_apply_finish(
- 	struct nb_cb_apply_finish_args *args);
-+void routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_apply_finish(
-+	struct nb_cb_apply_finish_args *args);
- 
- /* Optional 'pre_validate' callbacks. */
- int routing_control_plane_protocols_control_plane_protocol_staticd_route_list_path_list_frr_nexthops_nexthop_pre_validate(
-@@ -210,4 +240,4 @@ int routing_control_plane_protocols_name_validate(
- }
- #endif
- 
--#endif
-+#endif
-\ No newline at end of file
-diff --git a/staticd/static_nb_config.c b/staticd/static_nb_config.c
-index 7de5f0474a..a702dc48f8 100644
---- a/staticd/static_nb_config.c
-+++ b/staticd/static_nb_config.c
-@@ -20,6 +20,8 @@
- #include "static_nb.h"
- #include "static_zebra.h"
- 
-+#include "static_srv6.h"
-+
- 
- static int static_path_list_create(struct nb_cb_create_args *args)
- {
-@@ -1367,3 +1369,195 @@ int routing_control_plane_protocols_control_plane_protocol_staticd_route_list_sr
- 
- 	return NB_OK;
- }
-+
-+/*
-+ * XPath:
-+ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing
-+ */
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_create(
-+	struct nb_cb_create_args *args)
-+{
-+	return NB_OK;
-+}
-+
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_destroy(
-+	struct nb_cb_destroy_args *args)
-+{
-+	return NB_OK;
-+}
-+
-+/*
-+ * XPath:
-+ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6
-+ */
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_create(
-+	struct nb_cb_create_args *args)
-+{
-+	return NB_OK;
-+}
-+
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_destroy(
-+	struct nb_cb_destroy_args *args)
-+{
-+	return NB_OK;
-+}
-+
-+/*
-+ * XPath:
-+ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids
-+ */
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_create(
-+	struct nb_cb_create_args *args)
-+{
-+	return NB_OK;
-+}
-+
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_destroy(
-+	struct nb_cb_destroy_args *args)
-+{
-+	return NB_OK;
-+}
-+
-+/*
-+ * XPath:
-+ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/local-sids/sid
-+ */
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_create(
-+	struct nb_cb_create_args *args)
-+{
-+	struct static_srv6_sid *sid;
-+	struct prefix_ipv6 sid_value;
-+
-+	if (args->event != NB_EV_APPLY)
-+		return NB_OK;
-+
-+	yang_dnode_get_ipv6p(&sid_value, args->dnode, "sid");
-+	sid = static_srv6_sid_alloc(&sid_value);
-+	nb_running_set_entry(args->dnode, sid);
-+
-+	return NB_OK;
-+}
-+
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_destroy(
-+	struct nb_cb_destroy_args *args)
-+{
-+	struct static_srv6_sid *sid;
-+
-+	if (args->event != NB_EV_APPLY)
-+		return NB_OK;
-+
-+	sid = nb_running_unset_entry(args->dnode);
-+	listnode_delete(srv6_sids, sid);
-+	static_srv6_sid_del(sid);
-+
-+	return NB_OK;
-+}
-+
-+void routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_apply_finish(
-+	struct nb_cb_apply_finish_args *args)
-+{
-+	struct static_srv6_sid *sid;
-+	struct static_srv6_locator *locator;
-+
-+	sid = nb_running_get_entry(args->dnode, NULL, true);
-+
-+	locator = static_srv6_locator_lookup(sid->locator_name);
-+	if (!locator) {
-+		zlog_info("Locator not found, trying to get locator information from zebra");
-+		static_zebra_srv6_manager_get_locator(sid->locator_name);
-+		listnode_add(srv6_sids, sid);
-+		return;
-+	}
-+
-+	sid->locator = locator;
-+	
-+	listnode_add(srv6_sids, sid);
-+	static_zebra_request_srv6_sid(sid);
-+}
-+
-+/*
-+ * XPath:
-+ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/local-sids/sid/behavior
-+ */
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_modify(
-+	struct nb_cb_modify_args *args)
-+{
-+	struct static_srv6_sid *sid;
-+
-+	if (args->event != NB_EV_APPLY)
-+		return NB_OK;
-+
-+	sid = nb_running_get_entry(args->dnode, NULL, true);
-+
-+	/* Release and uninstall existing SID, if any, before requesting the new one */
-+	static_zebra_release_srv6_sid(sid);
-+	static_zebra_srv6_sid_uninstall(sid);
-+
-+	sid->behavior = yang_dnode_get_enum(args->dnode, "../behavior");
-+
-+	return NB_OK;
-+}
-+
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_behavior_destroy(
-+	struct nb_cb_destroy_args *args)
-+{
-+	return NB_OK;
-+}
-+
-+/*
-+ * XPath:
-+ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/local-sids/sid/vrf-name
-+ */
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_modify(
-+	struct nb_cb_modify_args *args)
-+{
-+	struct static_srv6_sid *sid;
-+
-+	if (args->event != NB_EV_APPLY)
-+		return NB_OK;
-+
-+	sid = nb_running_get_entry(args->dnode, NULL, true);
-+
-+	/* Release and uninstall existing SID, if any, before requesting the new one */
-+	static_zebra_release_srv6_sid(sid);
-+	static_zebra_srv6_sid_uninstall(sid);
-+
-+	strncpy(sid->attributes.vrf_name, yang_dnode_get_string(args->dnode, "../vrf-name"), sizeof(sid->attributes.vrf_name));
-+
-+	return NB_OK;
-+}
-+
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_vrf_name_destroy(
-+	struct nb_cb_destroy_args *args)
-+{
-+	return NB_OK;
-+}
-+
-+/*
-+ * XPath:
-+ * /frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/locators/locator/local-sids/sid/vrf-name
-+ */
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_modify(
-+	struct nb_cb_modify_args *args)
-+{
-+	struct static_srv6_sid *sid;
-+
-+	if (args->event != NB_EV_APPLY)
-+		return NB_OK;
-+
-+	sid = nb_running_get_entry(args->dnode, NULL, true);
-+
-+	/* Release and uninstall existing SID, if any, before requesting the new one */
-+	static_zebra_release_srv6_sid(sid);
-+	static_zebra_srv6_sid_uninstall(sid);
-+
-+	strncpy(sid->locator_name, yang_dnode_get_string(args->dnode, "../locator-name"), sizeof(sid->locator_name));
-+
-+	return NB_OK;
-+}
-+
-+int routing_control_plane_protocols_control_plane_protocol_staticd_segment_routing_srv6_local_sids_sid_locator_name_destroy(
-+	struct nb_cb_destroy_args *args)
-+{
-+	return NB_OK;
-+}
-diff --git a/staticd/static_srv6.c b/staticd/static_srv6.c
-new file mode 100644
-index 0000000000..eabc8655f7
---- /dev/null
-+++ b/staticd/static_srv6.c
-@@ -0,0 +1,192 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later
-+/*
-+ * STATICd - Segment Routing over IPv6 (SRv6) code
-+ */
-+#include <zebra.h>
-+
-+#include "vrf.h"
-+#include "nexthop.h"
-+
-+#include "static_routes.h"
-+#include "static_srv6.h"
-+#include "static_vrf.h"
-+#include "static_zebra.h"
-+
-+/*
-+ * List of SRv6 SIDs.
-+ */
-+struct list *srv6_locators = NULL;
-+struct list *srv6_sids = NULL;
-+
-+DEFINE_MTYPE_STATIC(STATIC, STATIC_SRV6_LOCATOR, "Static SRv6 locator");
-+DEFINE_MTYPE_STATIC(STATIC, STATIC_SRV6_SID, "Static SRv6 SID");
-+
-+/*
-+ * Convert SRv6 behavior to human-friendly string.
-+ */
-+const char *
-+static_srv6_sid_behavior2str(enum static_srv6_sid_behavior_t behavior)
-+{
-+	switch (behavior) {
-+	case STATIC_SRV6_SID_BEHAVIOR_END:
-+		return "End";
-+	case STATIC_SRV6_SID_BEHAVIOR_END_X:
-+		return "End.X";
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT6:
-+		return "End.DT6";
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT4:
-+		return "End.DT4";
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT46:
-+		return "End.DT46";
-+	case STATIC_SRV6_SID_BEHAVIOR_UN:
-+		return "uN";
-+	case STATIC_SRV6_SID_BEHAVIOR_UA:
-+		return "uA";
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT6:
-+		return "uDT6";
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT4:
-+		return "uDT4";
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT46:
-+		return "uDT46";
-+	case STATIC_SRV6_SID_BEHAVIOR_UNSPEC:
-+		return "unspec";
-+	}
-+
-+	return "unspec";
-+}
-+
-+/*
-+ * When an interface is enabled in the kernel, go through all the static SRv6 SIDs in
-+ * the system that use this interface and install/remove them in the zebra RIB.
-+ *
-+ * ifp   - The interface being enabled
-+ * is_up - Whether the interface is up or down
-+ */
-+void static_ifp_srv6_sids_update(struct interface *ifp, bool is_up)
-+{
-+	struct static_srv6_locator *locator;
-+	struct static_srv6_sid *sid;
-+	struct listnode *node;
-+
-+	if (!srv6_sids || !ifp)
-+		return;
-+
-+	zlog_info("Interface %s %s. %s SIDs that depend on the interface", (is_up) ? "enabled" : "disabled", (is_up) ? "Removing" : "disabled", ifp->name);
-+
-+    /* iterate over the list of SRv6 SIDs and remove the SIDs that use this
-+    * VRF from the zebra RIB */
-+    for (ALL_LIST_ELEMENTS_RO(srv6_sids, node, sid)) {
-+        if (strcmp(sid->attributes.vrf_name, ifp->name) == 0 ||
-+                strncmp(ifp->name, "sr0", sizeof(ifp->name)) == 0 &&
-+                (sid->behavior == STATIC_SRV6_SID_BEHAVIOR_END || sid->behavior == STATIC_SRV6_SID_BEHAVIOR_UN))
-+            if (is_up)
-+                static_zebra_srv6_sid_install(sid);
-+            else
-+                static_zebra_srv6_sid_uninstall(sid);
-+    }
-+}
-+
-+/*
-+ * Allocate an SRv6 SID object and initialize the fields common to all the
-+ * behaviors (i.e., SID address and behavor).
-+ */
-+struct static_srv6_sid *static_srv6_sid_alloc(struct prefix_ipv6 *addr)
-+{
-+	struct static_srv6_sid *sid = NULL;
-+
-+	sid = XCALLOC(MTYPE_STATIC_SRV6_SID, sizeof(struct static_srv6_sid));
-+	sid->addr = *addr;
-+
-+	return sid;
-+}
-+
-+void static_srv6_sid_free(struct static_srv6_sid *sid)
-+{
-+	XFREE(MTYPE_STATIC_SRV6_SID, sid);
-+}
-+
-+struct static_srv6_locator *static_srv6_locator_lookup(const char *name)
-+{
-+	struct static_srv6_locator *locator;
-+	struct listnode *node;
-+
-+	for (ALL_LIST_ELEMENTS_RO(srv6_locators, node, locator))
-+		if (!strncmp(name, locator->name, SRV6_LOCNAME_SIZE))
-+			return locator;
-+	return NULL;
-+}
-+
-+/*
-+ * Look-up an SRv6 SID in the list of SRv6 SIDs.
-+ */
-+struct static_srv6_sid *static_srv6_sid_lookup(struct prefix_ipv6 *sid_addr)
-+{
-+	struct static_srv6_locator *locator;
-+	struct static_srv6_sid *sid;
-+	struct listnode *node1, *node2;
-+
-+	for (ALL_LIST_ELEMENTS_RO(srv6_locators, node1, locator))
-+		for (ALL_LIST_ELEMENTS_RO(srv6_sids, node2, sid))
-+			if (memcmp(&sid->addr, sid_addr, sizeof(struct prefix_ipv6)) == 0)
-+				return sid;
-+
-+	return NULL;
-+}
-+
-+struct static_srv6_locator *static_srv6_locator_alloc(const char *name)
-+{
-+	struct static_srv6_locator *locator = NULL;
-+
-+	locator = XCALLOC(MTYPE_STATIC_SRV6_LOCATOR, sizeof(struct static_srv6_locator));
-+	strlcpy(locator->name, name, sizeof(locator->name));
-+
-+	return locator;
-+}
-+
-+void static_srv6_locator_free(struct static_srv6_locator *locator)
-+{
-+	if (locator) {
-+		XFREE(MTYPE_STATIC_SRV6_LOCATOR, locator);
-+	}
-+}
-+
-+void delete_static_srv6_locator(void *val)
-+{
-+	static_srv6_locator_free((struct static_srv6_locator *)val);
-+}
-+
-+/*
-+ * Remove an SRv6 SID from the zebra RIB (if it was previously installed) and
-+ * release the memory previously allocated for the SID.
-+ */
-+void static_srv6_sid_del(struct static_srv6_sid *sid)
-+{
-+	// if (CHECK_FLAG(sid->flags, STATIC_FLAG_SRV6_SID_SENT_TO_ZEBRA))
-+		static_zebra_release_srv6_sid(sid);
-+		static_zebra_srv6_sid_uninstall(sid);
-+
-+	XFREE(MTYPE_STATIC_SRV6_SID, sid);
-+}
-+
-+void delete_static_srv6_sid(void *val)
-+{
-+	static_srv6_sid_free((struct static_srv6_sid *)val);
-+}
-+
-+/*
-+ * Initialize SRv6 data structures.
-+ */
-+void static_srv6_init(void)
-+{
-+	srv6_locators = list_new();
-+	srv6_sids = list_new();
-+}
-+
-+/*
-+ * Clean up all the SRv6 data structures.
-+ */
-+void static_srv6_cleanup(void)
-+{
-+	list_delete(&srv6_locators);
-+	list_delete(&srv6_sids);
-+}
-\ No newline at end of file
-diff --git a/staticd/static_srv6.h b/staticd/static_srv6.h
-new file mode 100644
-index 0000000000..9e9058b532
---- /dev/null
-+++ b/staticd/static_srv6.h
-@@ -0,0 +1,125 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later
-+/*
-+ * STATICd - Segment Routing over IPv6 (SRv6) header
-+ */
-+#ifndef __STATIC_SRV6_H__
-+#define __STATIC_SRV6_H__
-+
-+#include "vrf.h"
-+#include "srv6.h"
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+
-+/*
-+ * The order for below macros should be in sync with
-+ * yang model typedef srv6-behavior
-+ */
-+enum static_srv6_sid_behavior_t {
-+	STATIC_SRV6_SID_BEHAVIOR_UNSPEC = 0,
-+	STATIC_SRV6_SID_BEHAVIOR_END = 1,
-+	STATIC_SRV6_SID_BEHAVIOR_END_X = 2,
-+	STATIC_SRV6_SID_BEHAVIOR_END_DT6 = 3,
-+	STATIC_SRV6_SID_BEHAVIOR_END_DT4 = 4,
-+	STATIC_SRV6_SID_BEHAVIOR_END_DT46 = 5,
-+	STATIC_SRV6_SID_BEHAVIOR_UN = 6,
-+	STATIC_SRV6_SID_BEHAVIOR_UA = 7,
-+	STATIC_SRV6_SID_BEHAVIOR_UDT6 = 8,
-+	STATIC_SRV6_SID_BEHAVIOR_UDT4 = 9,
-+	STATIC_SRV6_SID_BEHAVIOR_UDT46 = 10,
-+};
-+
-+/* Attributes for an SRv6 SID */
-+struct static_srv6_sid_attributes {
-+	/* VRF name */
-+	char vrf_name[VRF_NAMSIZ];
-+	char ifname[IFNAMSIZ];
-+	struct in6_addr nh6;
-+};
-+
-+/* Static SRv6 SID */
-+struct static_srv6_sid {
-+	/* SRv6 SID address */
-+	struct prefix_ipv6 addr;
-+	/* behavior bound to the SRv6 SID */
-+	enum static_srv6_sid_behavior_t behavior;
-+	/* SID attributes */
-+	struct static_srv6_sid_attributes attributes;
-+
-+	/* SRv6 SID flags */
-+	uint8_t flags;
-+/* this SRv6 SID is valid and can be installed in the zebra RIB */
-+#define STATIC_FLAG_SRV6_SID_VALID (1 << 0)
-+/* this SRv6 SID has been installed in the zebra RIB */
-+#define STATIC_FLAG_SRV6_SID_SENT_TO_ZEBRA (2 << 0)
-+
-+	char locator_name[SRV6_LOCNAME_SIZE];
-+	struct static_srv6_locator *locator;
-+};
-+
-+struct static_srv6_locator {
-+	char name[SRV6_LOCNAME_SIZE];
-+	struct prefix_ipv6 prefix;
-+
-+	/*
-+	 * Bit length of SRv6 locator described in
-+	 * draft-ietf-bess-srv6-services-05#section-3.2.1
-+	 */
-+	uint8_t block_bits_length;
-+	uint8_t node_bits_length;
-+	uint8_t function_bits_length;
-+	uint8_t argument_bits_length;
-+
-+	uint8_t flags;
-+#define SRV6_LOCATOR_USID (1 << 0) /* The SRv6 Locator is a uSID Locator */
-+
-+};
-+
-+/* List of SRv6 SIDs. */
-+extern struct list *srv6_locators;
-+extern struct list *srv6_sids;
-+
-+/* Allocate an SRv6 SID object and initialize its fields, SID address and
-+ * behavor. */
-+extern struct static_srv6_sid *
-+static_srv6_sid_alloc(struct prefix_ipv6 *addr);
-+extern void
-+static_srv6_sid_free(struct static_srv6_sid *sid);
-+/* Look-up an SRv6 SID in the list of SRv6 SIDs. */
-+extern struct static_srv6_sid *
-+static_srv6_sid_lookup(struct prefix_ipv6 *sid_addr);
-+/* Remove an SRv6 SID from the zebra RIB (if it was previously installed) and
-+ * release the memory previously allocated for the SID. */
-+extern void static_srv6_sid_del(struct static_srv6_sid *sid);
-+
-+/* Convert SRv6 behavior to human-friendly string. */
-+const char *
-+static_srv6_sid_behavior2str(enum static_srv6_sid_behavior_t action);
-+
-+/* Initialize SRv6 data structures. */
-+extern void static_srv6_init(void);
-+/* Clean up all the SRv6 data structures. */
-+extern void static_srv6_cleanup(void);
-+
-+/*
-+ * When an interface is enabled in the kernel, go through all the static SRv6 SIDs in
-+ * the system that use this interface and install/remove them in the zebra RIB.
-+ *
-+ * ifp   - The interface being enabled
-+ * is_up - Whether the interface is up or down
-+ */
-+void static_ifp_srv6_sids_update(struct interface *ifp, bool is_up);
-+
-+struct static_srv6_locator *static_srv6_locator_alloc(const char *name);
-+void static_srv6_locator_free(struct static_srv6_locator *locator);
-+struct static_srv6_locator *static_srv6_locator_lookup(const char *name);
-+
-+void delete_static_srv6_sid(void *val);
-+void delete_static_srv6_locator(void *val);
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+#endif /* __STATIC_SRV6_H__ */
-\ No newline at end of file
-diff --git a/staticd/static_vrf.c b/staticd/static_vrf.c
-index 710827a9ff..cf2c9eb73d 100644
---- a/staticd/static_vrf.c
-+++ b/staticd/static_vrf.c
-@@ -125,6 +125,7 @@ static int static_vrf_enable(struct vrf *vrf)
- {
- 	static_zebra_vrf_register(vrf);
- 	static_fixup_vrf_ids(vrf);
-+
- 	return 0;
- }
- 
-@@ -132,6 +133,7 @@ static int static_vrf_disable(struct vrf *vrf)
- {
- 	static_cleanup_vrf_ids(vrf);
- 	static_zebra_vrf_unregister(vrf);
-+
- 	return 0;
- }
- 
-diff --git a/staticd/static_vty.c b/staticd/static_vty.c
-index 07b8bc3d28..db112b6c0f 100644
---- a/staticd/static_vty.c
-+++ b/staticd/static_vty.c
-@@ -27,6 +27,8 @@
- #include "static_debug.h"
- #include "staticd/static_vty_clippy.c"
- #include "static_nb.h"
-+#include "static_srv6.h"
-+#include "static_zebra.h"
- 
- #define STATICD_STR "Static route daemon\n"
- 
-@@ -1201,6 +1203,183 @@ DEFPY_YANG(ipv6_route_vrf, ipv6_route_vrf_cmd,
- 	return static_route_nb_run(vty, &args);
- }
- 
-+DEFUN_NOSH (static_segment_routing, static_segment_routing_cmd,
-+      "segment-routing",
-+      "Segment Routing\n")
-+{
-+	VTY_PUSH_CONTEXT_NULL(SEGMENT_ROUTING_NODE);
-+	return CMD_SUCCESS;
-+}
-+
-+DEFUN_NOSH (static_srv6, static_srv6_cmd,
-+      "srv6",
-+      "Segment Routing SRv6\n")
-+{
-+	VTY_PUSH_CONTEXT_NULL(SRV6_NODE);
-+	return CMD_SUCCESS;
-+}
-+
-+DEFUN_YANG_NOSH (no_static_srv6, no_static_srv6_cmd,
-+      "no srv6",
-+      NO_STR
-+      "Segment Routing SRv6\n")
-+{
-+	char xpath[XPATH_MAXLEN];
-+
-+	snprintf(xpath, sizeof(xpath), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6",
-+		 "frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME);
-+
-+	nb_cli_enqueue_change(vty, xpath, NB_OP_DESTROY, NULL);
-+
-+	return nb_cli_apply_changes(vty, "%s", xpath);
-+}
-+
-+DEFUN_NOSH (static_srv6_sids, static_srv6_sids_cmd,
-+      "static-sids",
-+      "Segment Routing SRv6 SIDs\n")
-+{
-+	VTY_PUSH_CONTEXT_NULL(SRV6_SIDS_NODE);
-+	return CMD_SUCCESS;
-+}
-+
-+
-+static const char *seg6local_action2yang(uint32_t action)
-+{
-+	switch (action) {
-+	case STATIC_SRV6_SID_BEHAVIOR_UN:
-+		return "un";
-+	case STATIC_SRV6_SID_BEHAVIOR_UA:
-+		return "ua";
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT6:
-+		return "udt6";
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT4:
-+		return "udt4";
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT46:
-+		return "udt46";
-+	}
-+	return "unspec";
-+}
-+
-+DEFPY_YANG(srv6_sid, srv6_sid_cmd,
-+      "sid X:X::X:X/M locator NAME$locator_name behavior <uN | uDT6 vrf VIEWVRFNAME | uDT4 vrf VIEWVRFNAME | uDT46 vrf VIEWVRFNAME>",
-+	  "Configure SRv6 SID\n"
-+      "Specify SRv6 SID\n"
-+	  "Locator name\n"
-+      "Specify Locator name\n"
-+      "Specify SRv6 SID behavior\n"
-+      "Apply the code to a uN SID\n"
-+      "Apply the code to an uDT6 SID\n"
-+      "Configure VRF name\n"
-+      "Specify VRF name\n"
-+      "Apply the code to an uDT4 SID\n"
-+      "Configure VRF name\n"
-+      "Specify VRF name\n"
-+      "Apply the code to an uDT46 SID\n"
-+      "Configure VRF name\n"
-+      "Specify VRF name\n")
-+{
-+	enum static_srv6_sid_behavior_t behavior = STATIC_SRV6_SID_BEHAVIOR_UNSPEC;
-+	int idx = 0;
-+	const char *vrf_name = NULL;
-+	char xpath_sid[XPATH_MAXLEN];
-+	char xpath_behavior[XPATH_MAXLEN];
-+	char xpath_vrf_name[XPATH_MAXLEN];
-+	char xpath_locator_name[XPATH_MAXLEN];
-+
-+	if (argv_find(argv, argc, "uN", &idx)) {
-+		behavior = STATIC_SRV6_SID_BEHAVIOR_UN;
-+	} else if (argv_find(argv, argc, "uDT6", &idx)) {
-+		behavior = STATIC_SRV6_SID_BEHAVIOR_UDT6;
-+		vrf_name = argv[idx + 2]->arg;
-+	} else if (argv_find(argv, argc, "uDT4", &idx)) {
-+		behavior = STATIC_SRV6_SID_BEHAVIOR_UDT4;
-+		vrf_name = argv[idx + 2]->arg;
-+	} else if (argv_find(argv, argc, "uDT46", &idx)) {
-+		behavior = STATIC_SRV6_SID_BEHAVIOR_UDT46;
-+		vrf_name = argv[idx + 2]->arg;
-+	}
-+
-+	snprintf(xpath_sid, sizeof(xpath_sid), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6/local-sids/sid[sid='%s']",
-+		 "frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME, sid_str);
-+
-+	snprintf(xpath_behavior, sizeof(xpath_behavior), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6/local-sids/sid[sid='%s']/behavior",
-+		 "frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME, sid_str);
-+
-+	nb_cli_enqueue_change(vty, xpath_sid,
-+					NB_OP_CREATE, sid_str);
-+
-+	nb_cli_enqueue_change(vty, xpath_behavior,
-+					NB_OP_MODIFY, seg6local_action2yang(behavior));
-+
-+	if (vrf_name) {
-+		snprintf(xpath_vrf_name, sizeof(xpath_vrf_name), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6/local-sids/sid[sid='%s']/vrf-name",
-+			"frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME, sid_str);
-+
-+		nb_cli_enqueue_change(vty, xpath_vrf_name,
-+						NB_OP_MODIFY, vrf_name);
-+	}
-+
-+	if (locator_name) {
-+		snprintf(xpath_locator_name, sizeof(xpath_locator_name), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6/local-sids/sid[sid='%s']/locator-name",
-+			"frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME, sid_str);
-+
-+		nb_cli_enqueue_change(vty, xpath_locator_name,
-+						NB_OP_MODIFY, locator_name);
-+	}
-+
-+	return nb_cli_apply_changes(vty, "%s", xpath_sid);
-+}
-+
-+DEFPY_YANG(no_srv6_sid, no_srv6_sid_cmd,
-+      "no sid X:X::X:X/M [locator NAME$locator_name] [behavior <uN | uDT6 vrf VIEWVRFNAME | uDT4 vrf VIEWVRFNAME | uDT46 vrf VIEWVRFNAME>]",
-+      NO_STR
-+	  "Configure SRv6 SID\n"
-+      "Specify SRv6 SID\n"
-+	  "Locator name\n"
-+      "Specify Locator name\n"
-+      "Specify SRv6 SID behavior\n"
-+      "Apply the code to a uN SID\n"
-+      "Apply the code to an uDT6 SID\n"
-+      "Configure VRF name\n"
-+      "Specify VRF name\n"
-+      "Apply the code to an uDT4 SID\n"
-+      "Configure VRF name\n"
-+      "Specify VRF name\n"
-+      "Apply the code to an uDT46 SID\n"
-+      "Configure VRF name\n"
-+      "Specify VRF name\n")
-+{
-+	char xpath[XPATH_MAXLEN + 37];
-+
-+	snprintf(xpath, sizeof(xpath), "/frr-routing:routing/control-plane-protocols/control-plane-protocol[type='%s'][name='%s'][vrf='%s']/frr-staticd:staticd/segment-routing/srv6/local-sids/sid[sid='%s']",
-+		 "frr-staticd:staticd", "staticd", VRF_DEFAULT_NAME, sid_str);
-+
-+	nb_cli_enqueue_change(vty, xpath, NB_OP_DESTROY, NULL);
-+
-+	return nb_cli_apply_changes(vty, NULL);
-+}
-+
-+static struct cmd_node sr_node = {
-+	.name = "sr",
-+	.node = SEGMENT_ROUTING_NODE,
-+	.parent_node = CONFIG_NODE,
-+	.prompt = "%s(config-sr)# ",
-+};
-+
-+static struct cmd_node srv6_node = {
-+	.name = "srv6",
-+	.node = SRV6_NODE,
-+	.parent_node = SEGMENT_ROUTING_NODE,
-+	.prompt = "%s(config-srv6)# ",
-+};
-+
-+static struct cmd_node srv6_sids_node = {
-+	.name = "srv6-sids",
-+	.node = SRV6_SIDS_NODE,
-+	.parent_node = SRV6_NODE,
-+	.prompt = "%s(config-srv6-sids)# ",
-+};
-+
- #ifdef INCLUDE_MGMTD_CMDDEFS_ONLY
- 
- static void static_cli_show(struct vty *vty, const struct lyd_node *dnode,
-@@ -1545,6 +1724,104 @@ static int static_path_list_cli_cmp(const struct lyd_node *dnode1,
- 	return (int)distance1 - (int)distance2;
- }
- 
-+static void static_segment_routing_cli_show(struct vty *vty, const struct lyd_node *dnode,
-+			    bool show_defaults)
-+{
-+	vty_out(vty, "segment-routing\n");
-+}
-+
-+static void static_segment_routing_cli_show_end(struct vty *vty, const struct lyd_node *dnode)
-+{
-+	vty_out(vty, "exit\n");
-+	vty_out(vty, "!\n");
-+}
-+
-+static void static_srv6_cli_show(struct vty *vty, const struct lyd_node *dnode,
-+			    bool show_defaults)
-+{
-+	vty_out(vty, " srv6\n");
-+}
-+
-+static void static_srv6_cli_show_end(struct vty *vty, const struct lyd_node *dnode)
-+{
-+	vty_out(vty, " exit\n");
-+	vty_out(vty, " !\n");
-+}
-+
-+static void static_sids_cli_show(struct vty *vty, const struct lyd_node *dnode,
-+			    bool show_defaults)
-+{
-+	vty_out(vty, "  static-sids\n");
-+}
-+
-+static void static_sids_cli_show_end(struct vty *vty, const struct lyd_node *dnode)
-+{
-+	vty_out(vty, "  exit\n");
-+	vty_out(vty, "  !\n");
-+}
-+
-+static void srv6_sid_cli_show(struct vty *vty, const struct lyd_node *sid,
-+			     bool show_defaults)
-+{
-+	enum static_srv6_sid_behavior_t srv6_behavior;
-+	struct prefix_ipv6 sid_value;
-+
-+	yang_dnode_get_ipv6p(&sid_value, sid, "sid");
-+
-+	vty_out(vty, "   sid %pFX", &sid_value);
-+	if (yang_dnode_exists(sid, "locator-name"))
-+		vty_out(vty, " locator %s", yang_dnode_get_string(sid, "locator-name"));
-+
-+	srv6_behavior = yang_dnode_get_enum(sid, "behavior");
-+	switch(srv6_behavior) {
-+		case STATIC_SRV6_SID_BEHAVIOR_END:
-+			vty_out(vty, " behavior End");
-+			break;
-+		case STATIC_SRV6_SID_BEHAVIOR_END_X:
-+			vty_out(vty, " behavior End.X");
-+			break;
-+		case STATIC_SRV6_SID_BEHAVIOR_END_DT6:
-+			vty_out(vty, " behavior End.DT6");
-+			break;
-+		case STATIC_SRV6_SID_BEHAVIOR_END_DT4:
-+			vty_out(vty, " behavior End.DT4");
-+			break;
-+		case STATIC_SRV6_SID_BEHAVIOR_END_DT46:
-+			vty_out(vty, " behavior End.DT46");
-+			break;
-+		case STATIC_SRV6_SID_BEHAVIOR_UN:
-+			vty_out(vty, " behavior uN");
-+			break;
-+		case STATIC_SRV6_SID_BEHAVIOR_UA:
-+			vty_out(vty, " behavior uA");
-+			break;
-+		case STATIC_SRV6_SID_BEHAVIOR_UDT6:
-+			vty_out(vty, " behavior uDT6");
-+			break;
-+		case STATIC_SRV6_SID_BEHAVIOR_UDT4:
-+			vty_out(vty, " behavior uDT4");
-+			break;
-+		case STATIC_SRV6_SID_BEHAVIOR_UDT46:
-+			vty_out(vty, " behavior uDT46");
-+			break;
-+		case STATIC_SRV6_SID_BEHAVIOR_UNSPEC:
-+			vty_out(vty, " behavior unknown");
-+			break;
-+	}
-+
-+	if (yang_dnode_exists(sid, "vrf-name"))
-+		vty_out(vty, " vrf %s", yang_dnode_get_string(sid, "vrf-name"));
-+
-+	vty_out(vty, "\n");
-+}
-+
-+static void static_srv6_sid_cli_show(struct vty *vty,
-+					const struct lyd_node *dnode,
-+					bool show_defaults)
-+{
-+	srv6_sid_cli_show(vty, dnode, show_defaults);
-+}
-+
- const struct frr_yang_module_info frr_staticd_cli_info = {
- 	.name = "frr-staticd",
- 	.ignore_cfg_cbs = true,
-@@ -1594,6 +1871,33 @@ const struct frr_yang_module_info frr_staticd_cli_info = {
- 				.cli_cmp = static_nexthop_cli_cmp,
- 			}
- 		},
-+		{
-+			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing",
-+			.cbs = {
-+				.cli_show = static_segment_routing_cli_show,
-+				.cli_show_end = static_segment_routing_cli_show_end,
-+			}
-+		},
-+		{
-+			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6",
-+			.cbs = {
-+				.cli_show = static_srv6_cli_show,
-+				.cli_show_end = static_srv6_cli_show_end,
-+			}
-+		},
-+		{
-+			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids",
-+			.cbs = {
-+				.cli_show = static_sids_cli_show,
-+				.cli_show_end = static_sids_cli_show_end,
-+			}
-+		},
-+		{
-+			.xpath = "/frr-routing:routing/control-plane-protocols/control-plane-protocol/frr-staticd:staticd/segment-routing/srv6/local-sids/sid",
-+			.cbs = {
-+				.cli_show = static_srv6_sid_cli_show,
-+			}
-+		},
- 		{
- 			.xpath = NULL,
- 		},
-@@ -1653,6 +1957,7 @@ void static_vty_init(void)
- 	install_element(CONFIG_NODE, &debug_staticd_cmd);
- 	install_element(ENABLE_NODE, &show_debugging_static_cmd);
- 	install_element(ENABLE_NODE, &staticd_show_bfd_routes_cmd);
-+
- #else /* else INCLUDE_MGMTD_CMDDEFS_ONLY */
- 	install_element(CONFIG_NODE, &ip_mroute_dist_cmd);
- 
-@@ -1669,6 +1974,21 @@ void static_vty_init(void)
- 	install_element(VRF_NODE, &ipv6_route_address_interface_vrf_cmd);
- 	install_element(CONFIG_NODE, &ipv6_route_cmd);
- 	install_element(VRF_NODE, &ipv6_route_vrf_cmd);
-+
-+	install_node(&sr_node);
-+	install_node(&srv6_node);
-+	install_node(&srv6_sids_node);
-+	install_default(SEGMENT_ROUTING_NODE);
-+	install_default(SRV6_NODE);
-+	install_default(SRV6_SIDS_NODE);
-+	
-+	install_element(CONFIG_NODE, &static_segment_routing_cmd);
-+	install_element(SEGMENT_ROUTING_NODE, &static_srv6_cmd);
-+	install_element(SEGMENT_ROUTING_NODE, &no_static_srv6_cmd);
-+	install_element(SRV6_NODE, &static_srv6_sids_cmd);
-+	install_element(SRV6_SIDS_NODE, &srv6_sid_cmd);
-+	install_element(SRV6_SIDS_NODE, &no_srv6_sid_cmd);
-+
- #endif /* ifndef INCLUDE_MGMTD_CMDDEFS_ONLY */
- 
- #ifndef INCLUDE_MGMTD_CMDDEFS_ONLY
-diff --git a/staticd/static_zebra.c b/staticd/static_zebra.c
-index d76befc131..f86fd3b48a 100644
---- a/staticd/static_zebra.c
-+++ b/staticd/static_zebra.c
-@@ -30,6 +30,9 @@
- #include "static_nht.h"
- #include "static_vty.h"
- #include "static_debug.h"
-+#include "zclient.h"
-+#include "static_srv6.h"
-+#include "lib_errors.h"
- 
- DEFINE_MTYPE_STATIC(STATIC, STATIC_NHT_DATA, "Static Nexthop tracking data");
- PREDECL_HASH(static_nht_hash);
-@@ -113,6 +116,8 @@ static int static_ifp_up(struct interface *ifp)
- {
- 	static_ifindex_update(ifp, true);
- 
-+	static_ifp_srv6_sids_update(ifp, true);
-+
- 	return 0;
- }
- 
-@@ -120,6 +125,8 @@ static int static_ifp_down(struct interface *ifp)
- {
- 	static_ifindex_update(ifp, false);
- 
-+	static_ifp_srv6_sids_update(ifp, false);
-+
- 	return 0;
- }
- 
-@@ -529,10 +536,701 @@ extern void static_zebra_route_add(struct static_path *pn, bool install)
- 			   zclient, &api);
- }
- 
-+/**
-+ * Send SRv6 SID to ZEBRA for installation or deletion.
-+ *
-+ * @param cmd		ZEBRA_ROUTE_ADD or ZEBRA_ROUTE_DELETE
-+ * @param sid		SRv6 SID to install or delete
-+ * @param prefixlen	Prefix length
-+ * @param oif		Outgoing interface
-+ * @param action	SID action
-+ * @param context	SID context
-+ */
-+static void static_zebra_send_localsid(int cmd, const struct in6_addr *sid,
-+				     uint16_t prefixlen, ifindex_t oif,
-+				     enum seg6local_action_t action,
-+				     const struct seg6local_context *context)
-+{
-+	struct prefix_ipv6 p = {};
-+	struct zapi_route api = {};
-+	struct zapi_nexthop *znh;
-+
-+	if (cmd != ZEBRA_ROUTE_ADD && cmd != ZEBRA_ROUTE_DELETE) {
-+		flog_warn(EC_LIB_DEVELOPMENT, "%s: wrong ZEBRA command",
-+			  __func__);
-+		return;
-+	}
-+
-+	if (prefixlen > IPV6_MAX_BITLEN) {
-+		flog_warn(EC_LIB_DEVELOPMENT, "%s: wrong prefixlen %u",
-+			  __func__, prefixlen);
-+		return;
-+	}
-+
-+	zlog_info("  |- %s SRv6 SID %pI6 behavior %s",
-+		 cmd == ZEBRA_ROUTE_ADD ? "Add" : "Delete", sid,
-+		 seg6local_action2str(action));
-+
-+	p.family = AF_INET6;
-+	p.prefixlen = prefixlen;
-+	p.prefix = *sid;
-+
-+	api.vrf_id = VRF_DEFAULT;
-+	api.type = ZEBRA_ROUTE_STATIC;
-+	api.instance = 0;
-+	api.safi = SAFI_UNICAST;
-+	memcpy(&api.prefix, &p, sizeof(p));
-+
-+	if (cmd == ZEBRA_ROUTE_DELETE)
-+		return (void)zclient_route_send(ZEBRA_ROUTE_DELETE, zclient,
-+						&api);
-+
-+	SET_FLAG(api.flags, ZEBRA_FLAG_ALLOW_RECURSION);
-+	SET_FLAG(api.message, ZAPI_MESSAGE_NEXTHOP);
-+
-+	znh = &api.nexthops[0];
-+
-+	memset(znh, 0, sizeof(*znh));
-+
-+	znh->type = NEXTHOP_TYPE_IFINDEX;
-+	znh->ifindex = oif;
-+	SET_FLAG(znh->flags, ZAPI_NEXTHOP_FLAG_SEG6LOCAL);
-+	znh->seg6local_action = action;
-+	memcpy(&znh->seg6local_ctx, context, sizeof(struct seg6local_context));
-+
-+	api.nexthop_num = 1;
-+
-+	zclient_route_send(ZEBRA_ROUTE_ADD, zclient, &api);
-+}
-+
-+/**
-+ * Install SRv6 SID in the forwarding plane through Zebra.
-+ *
-+ * @param sid		SRv6 SID
-+ */
-+void static_zebra_srv6_sid_install(struct static_srv6_sid *sid)
-+{
-+	enum seg6local_action_t action = ZEBRA_SEG6_LOCAL_ACTION_UNSPEC;
-+	struct seg6local_context ctx = {};
-+	struct interface *ifp = NULL;
-+	struct vrf *vrf;
-+	struct prefix_ipv6 sid_block = {};
-+	struct prefix_ipv6 locator_block = {};
-+	struct prefix_ipv6 sid_locator = {};
-+
-+	if (!sid)
-+		return;
-+
-+	zlog_info("setting SRv6 SID %pFX",
-+		 &sid->addr);
-+
-+	if (!sid->locator) {
-+		zlog_err("Failed to install SID %pFX: missing locator information", &sid->addr);
-+		return;
-+	}
-+
-+	switch (sid->behavior) {
-+	case STATIC_SRV6_SID_BEHAVIOR_END:
-+		action = ZEBRA_SEG6_LOCAL_ACTION_END;
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_UN:
-+		action = ZEBRA_SEG6_LOCAL_ACTION_END;
-+		SET_SRV6_FLV_OP(ctx.flv.flv_ops,
-+				ZEBRA_SEG6_LOCAL_FLV_OP_NEXT_CSID);
-+		ctx.flv.lcblock_len = sid->locator->block_bits_length;
-+		ctx.flv.lcnode_func_len = sid->locator->node_bits_length;
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT6:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT6:
-+		action = ZEBRA_SEG6_LOCAL_ACTION_END_DT6;
-+		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+		if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) {
-+			zlog_warn("Inactive vrf");
-+			return;
-+		}
-+		ctx.table = vrf->data.l.table_id;
-+		ifp = if_get_vrf_loopback(vrf->vrf_id);
-+		if (!ifp) {
-+			zlog_warn("failed to get interface");
-+			return;
-+		}
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT4:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT4:
-+		action = ZEBRA_SEG6_LOCAL_ACTION_END_DT4;
-+		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+		if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) {
-+			zlog_warn("Inactive vrf");
-+			return;
-+		}
-+		ctx.table = vrf->data.l.table_id;
-+		ifp = if_get_vrf_loopback(vrf->vrf_id);
-+		if (!ifp) {
-+			zlog_warn("failed to get interface");
-+			return;
-+		}
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT46:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT46:
-+		action = ZEBRA_SEG6_LOCAL_ACTION_END_DT46;
-+		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+		if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) {
-+			zlog_warn("Inactive vrf");
-+			return;
-+		}
-+		ctx.table = vrf->data.l.table_id;
-+		ifp = if_get_vrf_loopback(vrf->vrf_id);
-+		if (!ifp) {
-+			zlog_warn("failed to get interface");
-+			return;
-+		}
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_UNSPEC:
-+		zlog_warn("unsupported behavior: %u", sid->behavior);
-+		break;
-+	}
-+
-+	ctx.block_len = 0;
-+	ctx.node_len = 0;
-+	ctx.function_len = 0;
-+	ctx.argument_len = 0;
-+
-+	sid_block = sid->addr;
-+	sid_block.prefixlen = sid->locator->block_bits_length;
-+	apply_mask(&sid_block);
-+
-+	locator_block = sid->locator->prefix;
-+	locator_block.prefixlen = sid->locator->block_bits_length;
-+	apply_mask(&locator_block);
-+
-+	if (prefix_same(&sid_block, &locator_block))
-+		ctx.block_len = sid->locator->block_bits_length;
-+	else {
-+		zlog_warn("SID block %pFX does not match locator block %pFX", &sid_block, &locator_block);
-+		return;
-+	}
-+
-+	sid_locator = sid->addr;
-+	sid_locator.prefixlen = sid->locator->block_bits_length + sid->locator->node_bits_length;
-+	apply_mask(&sid_locator);
-+
-+	if (prefix_same(&sid_locator, &sid->locator->prefix))
-+		ctx.node_len = sid->locator->node_bits_length;
-+	else {
-+		zlog_warn("SID locator %pFX does not match the specified locator %pFX", &sid_locator, &sid->locator->prefix);
-+		return;
-+	}
-+
-+	ctx.function_len = sid->addr.prefixlen - (ctx.block_len + ctx.node_len);
-+
-+	/* Attach the SID to the SRv6 interface */
-+	if (!ifp) {
-+		ifp = if_lookup_by_name("sr0", VRF_DEFAULT);
-+		if (!ifp) {
-+			zlog_warn(
-+				"Failed to install SRv6 SID %pFX: %s interface not found",
-+				&sid->addr, "sr0");
-+			return;
-+		}
-+	}
-+
-+	/* Send the SID to zebra */
-+	static_zebra_send_localsid(ZEBRA_ROUTE_ADD, &sid->addr.prefix, sid->addr.prefixlen,
-+				 ifp->ifindex, action, &ctx);
-+}
-+
-+void static_zebra_srv6_sid_uninstall(struct static_srv6_sid *sid)
-+{
-+	enum seg6local_action_t action = ZEBRA_SEG6_LOCAL_ACTION_UNSPEC;
-+	struct interface *ifp = NULL;
-+	struct seg6local_context ctx = {};
-+	struct vrf *vrf;
-+	struct prefix_ipv6 sid_block = {};
-+	struct prefix_ipv6 locator_block = {};
-+	struct prefix_ipv6 sid_locator = {};
-+
-+	if (!sid)
-+		return;
-+
-+	zlog_info("delete SID %pFX", &sid->addr);
-+
-+	if (!sid->locator) {
-+		zlog_err("Failed to uninstall SID %pFX: missing locator information", &sid->addr);
-+		return;
-+	}
-+
-+	switch (sid->behavior) {
-+	case STATIC_SRV6_SID_BEHAVIOR_END:
-+	case STATIC_SRV6_SID_BEHAVIOR_UN:
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT6:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT6:
-+		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+		if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) {
-+			zlog_warn("Inactive vrf");
-+			return;
-+		}
-+		ifp = if_get_vrf_loopback(vrf->vrf_id);
-+		if (!ifp) {
-+			zlog_warn("failed to get interface");
-+			return;
-+		}
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT4:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT4:
-+		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+		if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) {
-+			zlog_warn("Inactive vrf");
-+			return;
-+		}
-+		ifp = if_get_vrf_loopback(vrf->vrf_id);
-+		if (!ifp) {
-+			zlog_warn("failed to get interface");
-+			return;
-+		}
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT46:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT46:
-+		vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+		if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE)) {
-+			zlog_warn("Inactive vrf");
-+			return;
-+		}
-+		ifp = if_get_vrf_loopback(vrf->vrf_id);
-+		if (!ifp) {
-+			zlog_warn("failed to get interface");
-+			return;
-+		}
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_UNSPEC:
-+		zlog_warn("unsupported behavior: %u", sid->behavior);
-+		break;
-+	}
-+
-+	/* The SID is attached to the SRv6 interface */
-+	if (!ifp) {
-+		ifp = if_lookup_by_name("sr0", VRF_DEFAULT);
-+		if (!ifp) {
-+			zlog_warn("%s interface not found: nothing to uninstall",
-+				"sr0");
-+			return;
-+		}
-+	}
-+
-+	ctx.block_len = 0;
-+	ctx.node_len = 0;
-+	ctx.function_len = 0;
-+	ctx.argument_len = 0;
-+
-+	sid_block = sid->addr;
-+	sid_block.prefixlen = sid->locator->block_bits_length;
-+	apply_mask(&sid_block);
-+
-+	locator_block = sid->locator->prefix;
-+	locator_block.prefixlen = sid->locator->block_bits_length;
-+	apply_mask(&locator_block);
-+
-+	if (prefix_same(&sid_block, &locator_block))
-+		ctx.block_len = sid->locator->block_bits_length;
-+	else {
-+		zlog_warn("SID block %pFX does not match locator block %pFX", &sid_block, &locator_block);
-+		return;
-+	}
-+
-+	sid_locator = sid->addr;
-+	sid_locator.prefixlen = sid->locator->block_bits_length + sid->locator->node_bits_length;
-+	apply_mask(&sid_locator);
-+
-+	if (prefix_same(&sid_locator, &sid->locator->prefix))
-+		ctx.node_len = sid->locator->node_bits_length;
-+	else {
-+		zlog_warn("SID locator %pFX does not match the specified locator %pFX", &sid_locator, &sid->locator->prefix);
-+		return;
-+	}
-+
-+	ctx.function_len = sid->addr.prefixlen - (ctx.block_len + ctx.node_len);
-+
-+	zlog_info("delete SID %pFX",
-+		 &sid->addr);
-+
-+	static_zebra_send_localsid(ZEBRA_ROUTE_DELETE, &sid->addr.prefix, sid->addr.prefixlen,
-+				 ifp->ifindex, action, &ctx);
-+}
-+
-+extern void static_zebra_request_srv6_sid(struct static_srv6_sid *sid)
-+{
-+	struct srv6_sid_ctx ctx = {};
-+	int ret = 0;
-+	struct vrf *vrf;
-+
-+	if (!sid)
-+		return;
-+
-+	/* convert `static_srv6_sid_behavior_t` to `seg6local_action_t` */
-+	switch (sid->behavior) {
-+	case STATIC_SRV6_SID_BEHAVIOR_UNSPEC:
-+		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_UNSPEC;
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END:
-+	case STATIC_SRV6_SID_BEHAVIOR_UN:
-+		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END;
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT6:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT6:
-+		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT6;
-+		/* process SRv6 SID attributes */
-+		/* generate table ID from the VRF name, if configured */
-+		if (sid->attributes.vrf_name[0] != '\0') {
-+			vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+			if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE))
-+				return;
-+			ctx.vrf_id = vrf->vrf_id;
-+		}
-+
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT4:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT4:
-+		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT4;
-+		/* process SRv6 SID attributes */
-+		/* generate table ID from the VRF name, if configured */
-+		if (sid->attributes.vrf_name[0] != '\0') {
-+			vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+			if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE))
-+				return;
-+			ctx.vrf_id = vrf->vrf_id;
-+		}
-+
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT46:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT46:
-+		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT46;
-+		/* process SRv6 SID attributes */
-+		/* generate table ID from the VRF name, if configured */
-+		if (sid->attributes.vrf_name[0] != '\0') {
-+			vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+			if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE))
-+				return;
-+			ctx.vrf_id = vrf->vrf_id;
-+		}
-+
-+		break;
-+	}
-+
-+	zlog_info("calling srv6_manager_get_sid");
-+
-+	/* install the SRv6 SID in the zebra RIB */
-+	ret = srv6_manager_get_sid(zclient, &ctx, &sid->addr.prefix, sid->locator->name, NULL);
-+	if (ret < 0) {
-+		zlog_warn("%s: error getting SRv6 SID!", __func__);
-+	}
-+}
-+
-+extern void static_zebra_release_srv6_sid(struct static_srv6_sid *sid)
-+{
-+	struct srv6_sid_ctx ctx = {};
-+	struct vrf *vrf;
-+	int ret = 0;
-+
-+	if (!sid)
-+		return;
-+
-+	/* convert `static_srv6_sid_behavior_t` to `seg6local_action_t` */
-+	switch (sid->behavior) {
-+	case STATIC_SRV6_SID_BEHAVIOR_UNSPEC:
-+		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_UNSPEC;
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END:
-+	case STATIC_SRV6_SID_BEHAVIOR_UN:
-+		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END;
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT6:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT6:
-+		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT6;
-+		/* process SRv6 SID attributes */
-+		/* generate table ID from the VRF name, if configured */
-+		if (sid->attributes.vrf_name[0] != '\0') {
-+			vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+			if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE))
-+				return;
-+			ctx.vrf_id = vrf->vrf_id;
-+		}
-+
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT4:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT4:
-+		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT4;
-+		/* process SRv6 SID attributes */
-+		/* generate table ID from the VRF name, if configured */
-+		if (sid->attributes.vrf_name[0] != '\0') {
-+			vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+			if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE))
-+				return;
-+			ctx.vrf_id = vrf->vrf_id;
-+		}
-+
-+		break;
-+	case STATIC_SRV6_SID_BEHAVIOR_END_DT46:
-+	case STATIC_SRV6_SID_BEHAVIOR_UDT46:
-+		ctx.behavior = ZEBRA_SEG6_LOCAL_ACTION_END_DT46;
-+		/* process SRv6 SID attributes */
-+		/* generate table ID from the VRF name, if configured */
-+		if (sid->attributes.vrf_name[0] != '\0') {
-+			vrf = vrf_lookup_by_name(sid->attributes.vrf_name);
-+			if (!vrf || !CHECK_FLAG(vrf->status, VRF_ACTIVE))
-+				return;
-+			ctx.vrf_id = vrf->vrf_id;
-+		}
-+
-+		break;
-+	}
-+
-+	/* remove the SRv6 SID from the zebra RIB */
-+	ret = srv6_manager_release_sid(zclient, &ctx);
-+	if (ret == ZCLIENT_SEND_FAILURE)
-+		flog_err(EC_LIB_ZAPI_SOCKET,
-+			 "zclient_send_get_srv6_sid() delete failed: %s",
-+			 safe_strerror(errno));
-+}
-+
-+/**
-+ * Ask the SRv6 Manager (zebra) about a specific locator
-+ *
-+ * @param name Locator name
-+ * @return 0 on success, -1 otherwise
-+ */
-+int static_zebra_srv6_manager_get_locator(const char *name)
-+{
-+	if (!name)
-+		return -1;
-+
-+	/*
-+	 * Send the Get Locator request to the SRv6 Manager and return the
-+	 * result
-+	 */
-+	return srv6_manager_get_locator(zclient, name);
-+}
-+
-+static void request_srv6_sids(struct static_srv6_locator *locator)
-+{
-+	struct static_srv6_sid *sid;
-+	struct listnode *node;
-+
-+	for (ALL_LIST_ELEMENTS_RO(srv6_sids, node, sid)) {
-+		if (sid->locator == locator)
-+			static_zebra_request_srv6_sid(sid);
-+	}
-+}
-+
-+/**
-+ * Internal function to process an SRv6 locator
-+ *
-+ * @param locator The locator to be processed
-+ */
-+static int static_zebra_process_srv6_locator_internal(struct srv6_locator *locator)
-+{
-+	struct static_srv6_locator *loc;
-+	struct listnode *node;
-+	struct static_srv6_sid *sid;
-+
-+	if (!locator)
-+		return -1;
-+
-+	zlog_info("%s: Received SRv6 locator %s %pFX, loc-block-len=%u, loc-node-len=%u func-len=%u, arg-len=%u",
-+		  __func__, locator->name, &locator->prefix,
-+		  locator->block_bits_length, locator->node_bits_length,
-+		  locator->function_bits_length, locator->argument_bits_length);
-+
-+	/* If we are already aware about the locator, nothing to do */
-+	loc = static_srv6_locator_lookup(locator->name);
-+	if (loc)
-+		return 0;
-+
-+	loc = static_srv6_locator_alloc(locator->name);
-+
-+	zlog_info("SRv6 locator (locator %s, prefix %pFX) set",
-+			locator->name, &locator->prefix);
-+
-+	/* Store the locator prefix */
-+	loc->prefix = locator->prefix;
-+	loc->block_bits_length = locator->block_bits_length;
-+	loc->node_bits_length = locator->node_bits_length;
-+	loc->function_bits_length = locator->function_bits_length;
-+	loc->argument_bits_length = 0;
-+	loc->flags = locator->flags;
-+
-+	listnode_add(srv6_locators, loc);
-+
-+	for (ALL_LIST_ELEMENTS_RO(srv6_sids, node, sid)) {
-+		if (strncmp(sid->locator_name, loc->name, sizeof(loc->name)) == 0)
-+			sid->locator = loc;
-+	}
-+
-+	/* Request SIDs from the locator */
-+	request_srv6_sids(loc);
-+
-+	return 0;
-+}
-+
-+/**
-+ * Callback to process an SRv6 locator received from SRv6 Manager (zebra).
-+ *
-+ * @result 0 on success, -1 otherwise
-+ */
-+static int static_zebra_process_srv6_locator_add(ZAPI_CALLBACK_ARGS)
-+{
-+	struct srv6_locator loc = {};
-+
-+	if (!srv6_locators)
-+		return -1;
-+
-+	/* Decode the SRv6 locator */
-+	if (zapi_srv6_locator_decode(zclient->ibuf, &loc) < 0)
-+		return -1;
-+
-+	return static_zebra_process_srv6_locator_internal(&loc);
-+}
-+
-+/**
-+ * Callback to process a notification from SRv6 Manager (zebra) of an SRv6
-+ * locator deleted.
-+ *
-+ * @result 0 on success, -1 otherwise
-+ */
-+static int static_zebra_process_srv6_locator_delete(ZAPI_CALLBACK_ARGS)
-+{
-+	struct srv6_locator loc = {};
-+	struct listnode *node, *nnode;
-+	struct listnode *node2, *nnode2;
-+	struct static_srv6_sid *sid;
-+	struct static_srv6_locator *locator;
-+
-+	if (!srv6_locators)
-+		return -1;
-+
-+	/* Decode the received zebra message */
-+	if (zapi_srv6_locator_decode(zclient->ibuf, &loc) < 0)
-+		return -1;
-+
-+	zlog_info(
-+		"SRv6 locator deleted in zebra: name %s, "
-+		"prefix %pFX, block_len %u, node_len %u, func_len %u, arg_len %u",
-+		loc.name, &loc.prefix, loc.block_bits_length,
-+		loc.node_bits_length, loc.function_bits_length,
-+		loc.argument_bits_length);
-+
-+	locator = static_srv6_locator_lookup(loc.name);
-+	if (!locator)
-+		return 0;
-+
-+	zlog_info("Deleting srv6 sids from locator %s", locator->name);
-+
-+	/* Delete SRv6 SIDs */
-+	for (ALL_LIST_ELEMENTS(srv6_sids, node2, nnode2,
-+					sid)) {
-+
-+		if (sid->locator != locator)
-+			continue;
-+
-+		zlog_info(
-+			"Deleting SRv6 SID (locator %s, sid %pFX)",
-+			locator->name,
-+			&sid->addr);
-+
-+		/* Uninstall the SRv6 SID from the forwarding plane
-+			* through Zebra */
-+		static_zebra_srv6_sid_uninstall(sid);
-+	}
-+
-+	listnode_delete(srv6_locators, locator);
-+	static_srv6_locator_free(locator);
-+
-+	return 0;
-+}
-+
-+static int static_zebra_srv6_sid_notify(ZAPI_CALLBACK_ARGS)
-+{
-+	struct srv6_sid_ctx ctx;
-+	struct in6_addr sid_addr;
-+	enum zapi_srv6_sid_notify note;
-+	uint32_t sid_func;
-+	struct listnode *node;
-+	char buf[256];
-+	struct static_srv6_locator *locator;
-+	struct prefix_ipv6 tmp_prefix;
-+	struct static_srv6_sid *sid;
-+	char *loc_name;
-+
-+	if (!srv6_locators)
-+		return -1;
-+
-+	/* Decode the received notification message */
-+	if (!zapi_srv6_sid_notify_decode(zclient->ibuf, &ctx, &sid_addr,
-+					 &sid_func, NULL, &note, &loc_name)) {
-+		zlog_err("%s : error in msg decode", __func__);
-+		return -1;
-+	}
-+
-+	zlog_info("%s: received SRv6 SID notify: ctx %s sid_value %pI6 sid_func %u note %s",
-+		 __func__, srv6_sid_ctx2str(buf, sizeof(buf), &ctx), &sid_addr,
-+		 sid_func, zapi_srv6_sid_notify2str(note));
-+
-+	/* Handle notification */
-+	switch (note) {
-+	case ZAPI_SRV6_SID_ALLOCATED:
-+		zlog_info("SRv6 SID %pI6 %s ALLOCATED", &sid_addr,
-+				srv6_sid_ctx2str(buf, sizeof(buf), &ctx));
-+
-+		bool found = false;
-+		for (ALL_LIST_ELEMENTS_RO(srv6_sids, node, sid)) {
-+			if (IPV6_ADDR_SAME(&sid->addr.prefix, &sid_addr)) {
-+				found = true;
-+				break;
-+			}
-+		}
-+
-+		if (!found) {
-+			zlog_info("SRv6 SID %pI6 %s: not found", &sid_addr,
-+				srv6_sid_ctx2str(buf, sizeof(buf), &ctx));
-+			return 0;
-+		}
-+
-+		/*
-+			* Install the new SRv6 End SID in the forwarding plane through
-+			* Zebra
-+			*/
-+		static_zebra_srv6_sid_install(sid);
-+		
-+		break;
-+	case ZAPI_SRV6_SID_RELEASED:
-+		zlog_info("SRv6 SID %pI6 %s: RELEASED", &sid_addr,
-+				srv6_sid_ctx2str(buf, sizeof(buf), &ctx));
-+		break;
-+	case ZAPI_SRV6_SID_FAIL_ALLOC:
-+		zlog_info("SRv6 SID %pI6 %s: Failed to allocate",
-+				&sid_addr,
-+				srv6_sid_ctx2str(buf, sizeof(buf), &ctx));
-+
-+		/* Error will be logged by zebra module */
-+		break;
-+	case ZAPI_SRV6_SID_FAIL_RELEASE:
-+		zlog_warn("%s: SRv6 SID %pI6 %s failure to release",
-+				__func__, &sid_addr,
-+				srv6_sid_ctx2str(buf, sizeof(buf), &ctx));
-+
-+		/* Error will be logged by zebra module */
-+		break;
-+	}
-+
-+	return 0;
-+}
-+
- static zclient_handler *const static_handlers[] = {
- 	[ZEBRA_INTERFACE_ADDRESS_ADD] = interface_address_add,
- 	[ZEBRA_INTERFACE_ADDRESS_DELETE] = interface_address_delete,
- 	[ZEBRA_ROUTE_NOTIFY_OWNER] = route_notify_owner,
-+	[ZEBRA_SRV6_LOCATOR_ADD] = static_zebra_process_srv6_locator_add,
-+	[ZEBRA_SRV6_LOCATOR_DELETE] = static_zebra_process_srv6_locator_delete,
-+	[ZEBRA_SRV6_SID_NOTIFY] = static_zebra_srv6_sid_notify,
- };
- 
- void static_zebra_init(void)
-diff --git a/staticd/static_zebra.h b/staticd/static_zebra.h
-index c4f4ebdcbc..7b00914499 100644
---- a/staticd/static_zebra.h
-+++ b/staticd/static_zebra.h
-@@ -7,6 +7,8 @@
- #ifndef __STATIC_ZEBRA_H__
- #define __STATIC_ZEBRA_H__
- 
-+#include "static_srv6.h"
-+
- #ifdef __cplusplus
- extern "C" {
- #endif
-@@ -22,8 +24,16 @@ extern void static_zebra_stop(void);
- extern void static_zebra_vrf_register(struct vrf *vrf);
- extern void static_zebra_vrf_unregister(struct vrf *vrf);
- 
-+extern int static_zebra_srv6_manager_get_locator(const char *name);
-+
-+extern void static_zebra_request_srv6_sid(struct static_srv6_sid *sid);
-+extern void static_zebra_release_srv6_sid(struct static_srv6_sid *sid);
-+
-+extern void static_zebra_srv6_sid_install(struct static_srv6_sid *sid);
-+extern void static_zebra_srv6_sid_uninstall(struct static_srv6_sid *sid);
-+
- #ifdef __cplusplus
- }
- #endif
- 
--#endif
-+#endif
-\ No newline at end of file
-diff --git a/staticd/subdir.am b/staticd/subdir.am
-index 07ebe3c02c..bdbacbdd68 100644
---- a/staticd/subdir.am
-+++ b/staticd/subdir.am
-@@ -19,6 +19,7 @@ staticd_libstatic_a_SOURCES = \
- 	staticd/static_vty.c \
- 	staticd/static_nb.c \
- 	staticd/static_nb_config.c \
-+	staticd/static_srv6.c \
- 	# end
- 
- noinst_HEADERS += \
-@@ -29,6 +30,7 @@ noinst_HEADERS += \
- 	staticd/static_vty.h \
- 	staticd/static_vrf.h \
- 	staticd/static_nb.h \
-+	staticd/static_srv6.h \
- 	# end
- 
- clippy_scan += \
-diff --git a/tests/topotests/static_srv6_sids/__init__.py b/tests/topotests/static_srv6_sids/__init__.py
-new file mode 100644
-index 0000000000..e69de29bb2
-diff --git a/tests/topotests/static_srv6_sids/expected_srv6_sids.json b/tests/topotests/static_srv6_sids/expected_srv6_sids.json
-new file mode 100644
-index 0000000000..e90709638f
---- /dev/null
-+++ b/tests/topotests/static_srv6_sids/expected_srv6_sids.json
-@@ -0,0 +1,142 @@
-+{
-+	"fcbb:bbbb:1::/48":[
-+	   {
-+		  "prefix":"fcbb:bbbb:1::/48",
-+		  "prefixLen":48,
-+		  "protocol":"static",
-+		  "vrfId":0,
-+		  "vrfName":"default",
-+		  "selected":true,
-+		  "destSelected":true,
-+		  "distance":1,
-+		  "metric":0,
-+		  "installed":true,
-+		  "table":254,
-+		  "internalStatus":16,
-+		  "internalFlags":9,
-+		  "internalNextHopNum":1,
-+		  "internalNextHopActiveNum":1,
-+		  "nexthops":[
-+			 {
-+				"flags":3,
-+				"fib":true,
-+				"directlyConnected":true,
-+				"interfaceName":"sr0",
-+				"active":true,
-+				"weight":1,
-+				"seg6local":{
-+				   "action":"End"
-+				},
-+				"seg6localContext":{
-+				   "USP":true
-+				}
-+			 }
-+		  ]
-+	   }
-+	],
-+	"fcbb:bbbb:1:fe10::/64":[
-+	   {
-+		  "prefix":"fcbb:bbbb:1:fe10::/64",
-+		  "prefixLen":64,
-+		  "protocol":"static",
-+		  "vrfId":0,
-+		  "vrfName":"default",
-+		  "selected":true,
-+		  "destSelected":true,
-+		  "distance":1,
-+		  "metric":0,
-+		  "installed":true,
-+		  "table":254,
-+		  "internalStatus":16,
-+		  "internalFlags":9,
-+		  "internalNextHopNum":1,
-+		  "internalNextHopActiveNum":1,
-+		  "nexthops":[
-+			 {
-+				"flags":3,
-+				"fib":true,
-+				"directlyConnected":true,
-+				"interfaceName":"Vrf10",
-+				"active":true,
-+				"weight":1,
-+				"seg6local":{
-+				   "action":"End.DT4"
-+				},
-+				"seg6localContext":{
-+				   "table":10
-+				}
-+			 }
-+		  ]
-+	   }
-+	],
-+	"fcbb:bbbb:1:fe20::/64":[
-+	   {
-+		  "prefix":"fcbb:bbbb:1:fe20::/64",
-+		  "prefixLen":64,
-+		  "protocol":"static",
-+		  "vrfId":0,
-+		  "vrfName":"default",
-+		  "selected":true,
-+		  "destSelected":true,
-+		  "distance":1,
-+		  "metric":0,
-+		  "installed":true,
-+		  "table":254,
-+		  "internalStatus":16,
-+		  "internalFlags":9,
-+		  "internalNextHopNum":1,
-+		  "internalNextHopActiveNum":1,
-+		  "nexthops":[
-+			 {
-+				"flags":3,
-+				"fib":true,
-+				"directlyConnected":true,
-+				"interfaceName":"Vrf20",
-+				"active":true,
-+				"weight":1,
-+				"seg6local":{
-+				   "action":"End.DT6"
-+				},
-+				"seg6localContext":{
-+				   "table":20
-+				}
-+			 }
-+		  ]
-+	   }
-+	],
-+	"fcbb:bbbb:1:fe30::/64":[
-+	   {
-+		  "prefix":"fcbb:bbbb:1:fe30::/64",
-+		  "prefixLen":64,
-+		  "protocol":"static",
-+		  "vrfId":0,
-+		  "vrfName":"default",
-+		  "selected":true,
-+		  "destSelected":true,
-+		  "distance":1,
-+		  "metric":0,
-+		  "installed":true,
-+		  "table":254,
-+		  "internalStatus":16,
-+		  "internalFlags":9,
-+		  "internalNextHopNum":1,
-+		  "internalNextHopActiveNum":1,
-+		  "nexthops":[
-+			 {
-+				"flags":3,
-+				"fib":true,
-+				"directlyConnected":true,
-+				"interfaceName":"Vrf30",
-+				"active":true,
-+				"weight":1,
-+				"seg6local":{
-+				   "action":"End.DT46"
-+				},
-+				"seg6localContext":{
-+				   "table":30
-+				}
-+			 }
-+		  ]
-+	   }
-+	]
-+ }
-\ No newline at end of file
-diff --git a/tests/topotests/static_srv6_sids/r1/mgmtd.conf b/tests/topotests/static_srv6_sids/r1/mgmtd.conf
-new file mode 100644
-index 0000000000..e69de29bb2
-diff --git a/tests/topotests/static_srv6_sids/r1/setup.sh b/tests/topotests/static_srv6_sids/r1/setup.sh
-new file mode 100644
-index 0000000000..040be73914
---- /dev/null
-+++ b/tests/topotests/static_srv6_sids/r1/setup.sh
-@@ -0,0 +1,13 @@
-+ip link add sr0 type dummy
-+ip link set sr0 up
-+
-+ip link add Vrf10 type vrf table 10
-+ip link set Vrf10 up
-+
-+ip link add Vrf20 type vrf table 20
-+ip link set Vrf20 up
-+
-+ip link add Vrf30 type vrf table 30
-+ip link set Vrf30 up
-+
-+sysctl -w net.vrf.strict_mode=1
-diff --git a/tests/topotests/static_srv6_sids/r1/staticd.conf b/tests/topotests/static_srv6_sids/r1/staticd.conf
-new file mode 100644
-index 0000000000..96d2f4e9a6
---- /dev/null
-+++ b/tests/topotests/static_srv6_sids/r1/staticd.conf
-@@ -0,0 +1,16 @@
-+hostname r1
-+!
-+log stdout notifications
-+log commands
-+log file staticd.log debugging
-+!
-+segment-routing
-+ srv6
-+  static-sids
-+   sid fcbb:bbbb:1::/48 locator MAIN behavior uN
-+   sid fcbb:bbbb:1:fe10::/64 locator MAIN behavior uDT4 vrf Vrf10
-+   sid fcbb:bbbb:1:fe20::/64 locator MAIN behavior uDT6 vrf Vrf20
-+   sid fcbb:bbbb:1:fe30::/64 locator MAIN behavior uDT46 vrf Vrf30
-+  !
-+ !
-+!
-diff --git a/tests/topotests/static_srv6_sids/r1/zebra.conf b/tests/topotests/static_srv6_sids/r1/zebra.conf
-new file mode 100644
-index 0000000000..cf73e23744
---- /dev/null
-+++ b/tests/topotests/static_srv6_sids/r1/zebra.conf
-@@ -0,0 +1,19 @@
-+hostname r1
-+!
-+! debug zebra events
-+! debug zebra rib detailed
-+!
-+log stdout notifications
-+log commands
-+log file zebra.log debugging
-+!
-+segment-routing
-+ srv6
-+  locators
-+   locator MAIN
-+    prefix fcbb:bbbb:1::/48 block-len 32 node-len 16 func-bits 16
-+    behavior usid
-+   !
-+  !
-+ !
-+!
-\ No newline at end of file
-diff --git a/tests/topotests/static_srv6_sids/test_static_srv6_sids.py b/tests/topotests/static_srv6_sids/test_static_srv6_sids.py
-new file mode 100755
-index 0000000000..195ecf9385
---- /dev/null
-+++ b/tests/topotests/static_srv6_sids/test_static_srv6_sids.py
-@@ -0,0 +1,89 @@
-+#!/usr/bin/env python
-+# SPDX-License-Identifier: ISC
-+
-+#
-+# test_static_srv6_sids.py
-+#
-+# Copyright 2025 Carmine Scarpitta
-+#
-+
-+"""
-+test_static_srv6_sids.py:
-+Test for SRv6 static route on zebra
-+"""
-+
-+import os
-+import sys
-+import json
-+import pytest
-+import functools
-+
-+CWD = os.path.dirname(os.path.realpath(__file__))
-+sys.path.append(os.path.join(CWD, "../"))
-+
-+# pylint: disable=C0413
-+from lib import topotest
-+from lib.topogen import Topogen, TopoRouter, get_topogen
-+from lib.topolog import logger
-+
-+pytestmark = [pytest.mark.staticd]
-+
-+
-+def open_json_file(filename):
-+    try:
-+        with open(filename, "r") as f:
-+            return json.load(f)
-+    except IOError:
-+        assert False, "Could not read file {}".format(filename)
-+
-+
-+def setup_module(mod):
-+    tgen = Topogen({None: "r1"}, mod.__name__)
-+    tgen.start_topology()
-+    for rname, router in tgen.routers().items():
-+        router.run("/bin/bash {}/{}/setup.sh".format(CWD, rname))
-+        router.load_config(
-+            TopoRouter.RD_ZEBRA, os.path.join(CWD, "{}/zebra.conf".format(rname))
-+        )
-+        router.load_config(
-+            TopoRouter.RD_MGMTD, os.path.join(CWD, "{}/mgmtd.conf".format(rname))
-+        )
-+        router.load_config(
-+            TopoRouter.RD_STATIC, os.path.join(CWD, "{}/staticd.conf".format(rname))
-+        )
-+    tgen.start_router()
-+
-+
-+def teardown_module():
-+    tgen = get_topogen()
-+    tgen.stop_topology()
-+
-+
-+def test_srv6_static_sids():
-+    tgen = get_topogen()
-+    if tgen.routers_have_failure():
-+        pytest.skip(tgen.errors)
-+    router = tgen.gears["r1"]
-+
-+    def _check_srv6_static_sids(router, expected_route_file):
-+        logger.info("checking zebra srv6 static sids")
-+        output = json.loads(router.vtysh_cmd("show ipv6 route static json"))
-+        expected = open_json_file("{}/{}".format(CWD, expected_route_file))
-+        return topotest.json_cmp(output, expected)
-+
-+    def check_srv6_static_sids(router, expected_file):
-+        func = functools.partial(_check_srv6_static_sids, router, expected_file)
-+        _, result = topotest.run_and_expect(func, None, count=15, wait=1)
-+        assert result is None, "Failed"
-+
-+    # FOR DEVELOPER:
-+    # If you want to stop some specific line and start interactive shell,
-+    # please use tgen.mininet_cli() to start it.
-+
-+    logger.info("Test for srv6 sids configuration")
-+    check_srv6_static_sids(router, "expected_srv6_sids.json")
-+
-+
-+if __name__ == "__main__":
-+    args = ["-s"] + sys.argv[1:]
-+    sys.exit(pytest.main(args))
-diff --git a/vtysh/vtysh.c b/vtysh/vtysh.c
-index c460dea70c..a1b16c2b66 100644
---- a/vtysh/vtysh.c
-+++ b/vtysh/vtysh.c
-@@ -1312,6 +1312,13 @@ static struct cmd_node srv6_node = {
- 	.prompt = "%s(config-srv6)# ",
- };
- 
-+static struct cmd_node srv6_sids_node = {
-+	.name = "srv6-sids",
-+	.node = SRV6_SIDS_NODE,
-+	.parent_node = SRV6_NODE,
-+	.prompt = "%s(config-srv6-sids)# ",
-+};
-+
- static struct cmd_node srv6_locs_node = {
- 	.name = "srv6-locators",
- 	.node = SRV6_LOCS_NODE,
-@@ -1685,7 +1692,7 @@ DEFUNSH(VTYSH_REALLYALL, vtysh_end_all, vtysh_end_all_cmd, "end",
- 	return vtysh_end();
- }
- 
--DEFUNSH(VTYSH_ZEBRA, srv6, srv6_cmd,
-+DEFUNSH(VTYSH_ZEBRA | VTYSH_MGMTD, srv6, srv6_cmd,
- 	"srv6",
- 	"Segment-Routing SRv6 configuration\n")
- {
-@@ -1693,6 +1700,14 @@ DEFUNSH(VTYSH_ZEBRA, srv6, srv6_cmd,
- 	return CMD_SUCCESS;
- }
- 
-+DEFUNSH(VTYSH_MGMTD, srv6_sids, srv6_sids_cmd,
-+	"static-sids",
-+	"Segment-Routing SRv6 SIDs configuration\n")
-+{
-+	vty->node = SRV6_SIDS_NODE;
-+	return CMD_SUCCESS;
-+}
-+
- DEFUNSH(VTYSH_ZEBRA, srv6_locators, srv6_locators_cmd,
- 	"locators",
- 	"Segment-Routing SRv6 locators configuration\n")
-@@ -2216,7 +2231,7 @@ DEFUNSH(VTYSH_FABRICD, router_openfabric, router_openfabric_cmd, "router openfab
- }
- #endif /* HAVE_FABRICD */
- 
--DEFUNSH(VTYSH_SR, segment_routing, segment_routing_cmd,
-+DEFUNSH(VTYSH_SR | VTYSH_MGMTD, segment_routing, segment_routing_cmd,
- 	"segment-routing",
- 	"Configure segment routing\n")
- {
-@@ -2535,7 +2550,7 @@ DEFUNSH(VTYSH_VRF, exit_vrf_config, exit_vrf_config_cmd, "exit-vrf",
- 	return CMD_SUCCESS;
- }
- 
--DEFUNSH(VTYSH_ZEBRA, exit_srv6_config, exit_srv6_config_cmd, "exit",
-+DEFUNSH(VTYSH_ZEBRA | VTYSH_MGMTD, exit_srv6_config, exit_srv6_config_cmd, "exit",
- 	"Exit from SRv6 configuration mode\n")
- {
- 	if (vty->node == SRV6_NODE)
-@@ -2551,6 +2566,14 @@ DEFUNSH(VTYSH_ZEBRA, exit_srv6_locs_config, exit_srv6_locs_config_cmd, "exit",
- 	return CMD_SUCCESS;
- }
- 
-+DEFUNSH(VTYSH_MGMTD, exit_srv6_sids_config, exit_srv6_sids_config_cmd, "exit",
-+	"Exit from SRv6-SIDs configuration mode\n")
-+{
-+	if (vty->node == SRV6_SIDS_NODE)
-+		vty->node = SRV6_NODE;
-+	return CMD_SUCCESS;
-+}
-+
- DEFUNSH(VTYSH_ZEBRA, exit_srv6_loc_config, exit_srv6_loc_config_cmd, "exit",
- 	"Exit from SRv6-locators configuration mode\n")
- {
-@@ -2806,13 +2829,13 @@ DEFUNSH(VTYSH_KEYS, vtysh_quit_keys, vtysh_quit_keys_cmd, "quit",
- 	return vtysh_exit_keys(self, vty, argc, argv);
- }
- 
--DEFUNSH(VTYSH_SR, vtysh_exit_sr, vtysh_exit_sr_cmd, "exit",
-+DEFUNSH(VTYSH_SR | VTYSH_MGMTD, vtysh_exit_sr, vtysh_exit_sr_cmd, "exit",
- 	"Exit current mode and down to previous mode\n")
- {
- 	return vtysh_exit(vty);
- }
- 
--DEFUNSH(VTYSH_SR, vtysh_quit_sr, vtysh_quit_sr_cmd, "quit",
-+DEFUNSH(VTYSH_SR | VTYSH_MGMTD, vtysh_quit_sr, vtysh_quit_sr_cmd, "quit",
- 	"Exit current mode and down to previous mode\n")
- {
- 	return vtysh_exit(vty);
-@@ -4999,6 +5022,7 @@ void vtysh_init_vty(void)
- 	install_node(&rmap_node);
- 	install_node(&vty_node);
- 	install_node(&srv6_node);
-+	install_node(&srv6_sids_node);
- 	install_node(&srv6_locs_node);
- 	install_node(&srv6_loc_node);
- 	install_node(&srv6_encap_node);
-@@ -5442,6 +5466,10 @@ void vtysh_init_vty(void)
- 	install_element(SRV6_NODE, &exit_srv6_config_cmd);
- 	install_element(SRV6_NODE, &vtysh_end_all_cmd);
- 	install_element(SRV6_NODE, &srv6_encap_cmd);
-+	install_element(SRV6_NODE, &srv6_sids_cmd);
-+
-+	install_element(SRV6_SIDS_NODE, &exit_srv6_sids_config_cmd);
-+	install_element(SRV6_SIDS_NODE, &vtysh_end_all_cmd);
- 
- 	install_element(SRV6_LOCS_NODE, &srv6_locator_cmd);
- 	install_element(SRV6_LOCS_NODE, &exit_srv6_locs_config_cmd);
-diff --git a/yang/frr-staticd.yang b/yang/frr-staticd.yang
-index 1e6c54c006..ac3b04dede 100644
---- a/yang/frr-staticd.yang
-+++ b/yang/frr-staticd.yang
-@@ -92,6 +92,41 @@ module frr-staticd {
-     }
-   }
- 
-+  typedef srv6-behavior {
-+    type enumeration {
-+      enum end {
-+        value 1;
-+      }
-+      enum end-x {
-+        value 2;
-+      }
-+      enum end-dt6 {
-+        value 3;
-+      }
-+      enum end-dt4 {
-+        value 4;
-+      }
-+      enum end-dt46 {
-+        value 5;
-+      }
-+      enum un {
-+        value 6;
-+      }
-+      enum ua {
-+        value 7;
-+      }
-+      enum udt6 {
-+        value 8;
-+      }
-+      enum udt4 {
-+        value 9;
-+      }
-+      enum udt46 {
-+        value 10;
-+      }
-+    }
-+  }
-+
-   augment "/frr-rt:routing/frr-rt:control-plane-protocols/frr-rt:control-plane-protocol" {
-     container staticd {
-       when "../frr-rt:type = 'frr-staticd:staticd'" {
-@@ -144,6 +179,28 @@ module frr-staticd {
-           uses staticd-prefix-attributes;
-         }
-       }
-+
-+      container segment-routing {
-+        container srv6 {
-+          container local-sids {
-+            list sid {
-+              key "sid";
-+              leaf sid {
-+                type inet:ipv6-prefix;
-+              }
-+              leaf behavior {
-+                type srv6-behavior;
-+              }
-+              leaf locator-name {
-+                type string;
-+              }
-+              leaf vrf-name {
-+                type string;
-+              }
-+            }
-+          }
-+        }
-+      }
-     }
-   }
--}
-+}
-\ No newline at end of file
-diff --git a/zebra/zebra_srv6.c b/zebra/zebra_srv6.c
-index 624f60e815..e14cc1f5c1 100644
---- a/zebra/zebra_srv6.c
-+++ b/zebra/zebra_srv6.c
-@@ -1488,14 +1488,15 @@ static bool alloc_srv6_sid_func_dynamic(struct zebra_srv6_sid_block *block,
-  */
- static int get_srv6_sid_explicit(struct zebra_srv6_sid **sid,
- 				 struct srv6_sid_ctx *ctx,
--				 struct in6_addr *sid_value)
-+				 struct in6_addr *sid_value,
-+				 struct srv6_locator *loc)
- {
- 	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
- 	struct zebra_srv6_sid_ctx *s = NULL;
- 	struct zebra_srv6_sid_ctx *zctx = NULL;
- 	struct listnode *node;
- 	uint32_t sid_func = 0, sid_func_wide = 0;
--	struct srv6_locator *locator = NULL;
-+	struct srv6_locator *locator = loc;
- 	struct zebra_srv6_sid_block *block = NULL;
- 	char buf[256];
- 
-@@ -1524,7 +1525,7 @@ static int get_srv6_sid_explicit(struct zebra_srv6_sid **sid,
- 			 * It is not allowed to allocate an explicit SID for a given context if the context
- 			 * is already associated with an explicit SID
- 			 */
--			if (s->sid->alloc_mode == SRV6_SID_ALLOC_MODE_EXPLICIT) {
-+			if (s->ctx.behavior != ZEBRA_SEG6_LOCAL_ACTION_END && s->sid->alloc_mode == SRV6_SID_ALLOC_MODE_EXPLICIT) {
- 				zlog_err("%s: cannot alloc SID %pI6 for ctx %s: ctx already associated with SID %pI6",
- 					 __func__, sid_value,
- 					 srv6_sid_ctx2str(buf, sizeof(buf),
-@@ -1538,18 +1539,106 @@ static int get_srv6_sid_explicit(struct zebra_srv6_sid **sid,
- 		}
- 	}
- 
--	/* Get parent locator and function of the provided SID */
--	if (!zebra_srv6_sid_decompose(sid_value, &block, &locator, &sid_func,
--				      &sid_func_wide)) {
--		zlog_err("%s: invalid SM request arguments: parent block/locator not found for SID %pI6",
--			 __func__, sid_value);
--		return -1;
-+	if (!locator) {
-+		/* Get parent locator and function of the provided SID */
-+		if (!zebra_srv6_sid_decompose(sid_value, &block, &locator, &sid_func,
-+						&sid_func_wide)) {
-+			zlog_err("%s: invalid SM request arguments: parent block/locator not found for SID %pI6",
-+				__func__, sid_value);
-+			return -1;
-+		}
-+	} else {
-+		struct prefix_ipv6 tmp_prefix;
-+		struct srv6_sid_format *format = locator->sid_format;
-+		uint8_t offset, func_len;
-+
-+		/*
-+		* Build a temporary prefix_ipv6 object representing the SRv6 SID.
-+		* This temporary prefix object is used below by the prefix_match
-+		* function to check if the SID belongs to a specific locator.
-+		*/
-+		tmp_prefix.family = AF_INET6;
-+		tmp_prefix.prefixlen = IPV6_MAX_BITLEN;
-+		tmp_prefix.prefix = *sid_value;
-+
-+		/*
-+		 * Check if the locator prefix includes the temporary prefix
-+		 * representing the SID.
-+		 */
-+		if (!prefix_match((struct prefix *)&locator->prefix,
-+				 (struct prefix *)&tmp_prefix)) {
-+			zlog_err("%s: invalid SM request arguments: SID %pI6 does not belong to the specified locator '%s'",
-+					__func__, sid_value, locator->name);
-+			return -1;
-+		}
-+
-+		if (format) {
-+			offset = format->block_len + format->node_len;
-+			func_len = format->function_len;
-+		} else {
-+			offset = locator->block_bits_length +
-+					locator->node_bits_length;
-+			func_len = locator->function_bits_length;
-+		}
-+
-+		for (uint8_t idx = 0; idx < func_len; idx++) {
-+			uint8_t tidx = offset + idx;
-+			sid_func |= (sid_value->s6_addr[tidx / 8] &
-+						(0x1 << (7 - tidx % 8)))
-+						<< (((func_len - 1 - idx) / 8) * 8);
-+		}
-+
-+		/*
-+			* If function comes from the Wide LIB range, we also
-+			* need to get the Wide function.
-+			*/
-+		if (format && format->type == SRV6_SID_FORMAT_TYPE_USID) {
-+			if (sid_func >= format->config.usid.wlib_start &&
-+				sid_func <= format->config.usid.wlib_end) {
-+				format = locator->sid_format;
-+
-+				offset = format->block_len +
-+						format->node_len +
-+						format->function_len;
-+
-+				for (uint8_t idx = 0; idx < 16; idx++) {
-+					uint8_t tidx = offset + idx;
-+					sid_func_wide |=
-+						(sid_value->s6_addr[tidx /
-+									8] &
-+							(0x1 << (7 - tidx % 8)))
-+						<< (((16 - 1 - idx) / 8) *
-+							8);
-+				}
-+			}
-+		}
-+
-+		block = locator->sid_block;
- 	}
- 
- 	if (ctx->behavior == ZEBRA_SEG6_LOCAL_ACTION_END) {
--		zlog_err("%s: invalid SM request arguments: explicit SID allocation not allowed for End/uN behavior",
--			 __func__);
--		return -1;
-+		zctx = zebra_srv6_sid_ctx_alloc();
-+		zctx->ctx = *ctx;
-+
-+		/* Allocate the SID to store SID information */
-+		*sid = zebra_srv6_sid_alloc(zctx, sid_value, locator, block, sid_func,
-+						SRV6_SID_ALLOC_MODE_EXPLICIT);
-+		if (!(*sid)) {
-+			flog_err(EC_ZEBRA_SM_CANNOT_ASSIGN_SID,
-+				"%s: failed to create SRv6 SID %s (%pI6)", __func__,
-+				srv6_sid_ctx2str(buf, sizeof(buf), ctx), sid_value);
-+			return -1;
-+		}
-+		(*sid)->ctx = zctx;
-+		zctx->sid = *sid;
-+		listnode_add(srv6->sids, zctx);
-+
-+		if (IS_ZEBRA_DEBUG_PACKET)
-+			zlog_debug("%s: allocated explicit SRv6 SID %pI6 for context %s",
-+				__func__, &(*sid)->value,
-+				srv6_sid_ctx2str(buf, sizeof(buf), ctx));
-+
-+		return 1;
- 	}
- 
- 	/* Allocate an explicit SID function for the SID */
-@@ -1749,7 +1838,16 @@ int get_srv6_sid(struct zebra_srv6_sid **sid, struct srv6_sid_ctx *ctx,
- 			return -1;
- 		}
- 
--		ret = get_srv6_sid_explicit(sid, ctx, sid_value);
-+		if (locator_name) {
-+			locator = zebra_srv6_locator_lookup(locator_name);
-+			if (!locator) {
-+				zlog_err("%s: invalid SM request arguments: SRv6 locator '%s' does not exist",
-+						__func__, locator_name);
-+				return -1;
-+			}
-+		}
-+
-+		ret = get_srv6_sid_explicit(sid, ctx, sid_value, locator);
- 
- 		break;
- 	case SRV6_SID_ALLOC_MODE_DYNAMIC:
--- 
-2.45.2
-
diff --git a/src/sonic-frr/patch/0080-SRv6-vpn-route-and-sidlist-install.patch b/src/sonic-frr/patch/0080-SRv6-vpn-route-and-sidlist-install.patch
deleted file mode 100644
index e0e88678079..00000000000
--- a/src/sonic-frr/patch/0080-SRv6-vpn-route-and-sidlist-install.patch
+++ /dev/null
@@ -1,133 +0,0 @@
-From 831614adffb6e968aa264b48ae90562a6757ef45 Mon Sep 17 00:00:00 2001
-From: "guozhongfeng.gzf" <guozhongfeng.gzf@alibaba-inc.com>
-Date: Fri, 20 Dec 2024 14:47:16 +0800
-Subject: [PATCH] SRv6-vpn-route-and-sidlist-instal
-
-Signed-off-by: guozhongfeng.gzf <guozhongfeng.gzf@alibaba-inc.com>
----
- lib/srv6.h           |  2 ++
- zebra/zebra_dplane.c | 16 ++++++++++++++++
- zebra/zebra_dplane.h | 13 +++++++++++++
- zebra/zebra_srv6.h   | 14 ++++++++++++++
- 4 files changed, 45 insertions(+)
-
-diff --git a/lib/srv6.h b/lib/srv6.h
-index 01b082013..fdae87933 100644
---- a/lib/srv6.h
-+++ b/lib/srv6.h
-@@ -189,6 +189,8 @@ struct nexthop_srv6 {
- 
- 	/* SRv6 Headend-behaviour */
- 	struct seg6_seg_stack *seg6_segs;
-+
-+	struct in6_addr seg6_src;
- };
- 
- /* SID format type */
-diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index 99693a587..732757fd5 100644
---- a/zebra/zebra_dplane.c
-+++ b/zebra/zebra_dplane.c
-@@ -26,6 +26,7 @@
- #include "zebra/zebra_pbr.h"
- #include "zebra/zebra_neigh.h"
- #include "zebra/zebra_tc.h"
-+#include "zebra/zebra_srv6.h"
- #include "printfrr.h"
- 
- /* Memory types */
-@@ -73,6 +74,7 @@ const uint32_t DPLANE_DEFAULT_NEW_WORK = 100;
- struct dplane_nexthop_info {
- 	uint32_t id;
- 	uint32_t old_id;
-+	uint32_t pic_nhe_id;
- 	afi_t afi;
- 	vrf_id_t vrf_id;
- 	int type;
-@@ -405,6 +407,7 @@ struct zebra_dplane_ctx {
- 	/* Support info for different kinds of updates */
- 	union {
- 		struct dplane_route_info rinfo;
-+		struct zebra_srv6_sidlist sidlist;
- 		struct zebra_lsp lsp;
- 		struct dplane_pw_info pw;
- 		struct dplane_br_port_info br_port;
-@@ -2255,6 +2258,19 @@ int dplane_ctx_get_ns_sock(const struct zebra_dplane_ctx *ctx)
- #endif
- }
- 
-+const struct zebra_srv6_sidlist *dplane_ctx_get_sidlist(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return &(ctx->u.sidlist);
-+}
-+
-+uint32_t dplane_ctx_get_pic_nhe_id(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+	return ctx->u.rinfo.nhe.pic_nhe_id;
-+}
-+
- /* Accessors for nexthop information */
- uint32_t dplane_ctx_get_nhe_id(const struct zebra_dplane_ctx *ctx)
- {
-diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h
-index 2f7d21850..bf78ff77e 100644
---- a/zebra/zebra_dplane.h
-+++ b/zebra/zebra_dplane.h
-@@ -116,6 +116,16 @@ enum dplane_op_e {
- 	DPLANE_OP_NH_UPDATE,
- 	DPLANE_OP_NH_DELETE,
- 
-+	/* Pic Context update*/
-+	DPLANE_OP_PIC_CONTEXT_INSTALL,
-+	DPLANE_OP_PIC_CONTEXT_UPDATE,
-+	DPLANE_OP_PIC_CONTEXT_DELETE,
-+
-+	/* sid list update */
-+	DPLANE_OP_SID_LIST_INSTALL,
-+	DPLANE_OP_SID_LIST_UPDATE,
-+	DPLANE_OP_SID_LIST_DELETE,
-+
- 	/* LSP update */
- 	DPLANE_OP_LSP_INSTALL,
- 	DPLANE_OP_LSP_UPDATE,
-@@ -557,6 +567,9 @@ const struct nexthop_group *dplane_ctx_get_ng(
- const struct nexthop_group *dplane_ctx_get_old_ng(
- 	const struct zebra_dplane_ctx *ctx);
- 
-+const struct zebra_srv6_sidlist *dplane_ctx_get_sidlist(const struct zebra_dplane_ctx *ctx);
-+uint32_t dplane_ctx_get_pic_nhe_id(const struct zebra_dplane_ctx *ctx);
-+
- /* Optional extra info about interfaces in nexthops - a plugin must enable
-  * this extra info.
-  */
-diff --git a/zebra/zebra_srv6.h b/zebra/zebra_srv6.h
-index 1599fd7ad..05122144d 100644
---- a/zebra/zebra_srv6.h
-+++ b/zebra/zebra_srv6.h
-@@ -209,6 +209,20 @@ struct zebra_srv6 {
- 	struct list *sid_blocks;
- };
- 
-+#define SRV6_SEGMENTLIST_NAME_MAX_LENGTH 64
-+#define SRV6_SID_INDEX_MAX_NUM 8
-+
-+struct zebra_srv6_segment_entry {
-+	uint32_t index_;
-+	struct ipaddr srv6_sid_value_;
-+};
-+
-+struct zebra_srv6_sidlist {
-+	char sidlist_name_[SRV6_SEGMENTLIST_NAME_MAX_LENGTH];
-+	uint32_t segment_count_;
-+	struct zebra_srv6_segment_entry segments_[SRV6_SID_INDEX_MAX_NUM];
-+};
-+
- /* declare hooks for the basic API, so that it can be specialized or served
-  * externally. Also declare a hook when those functions have been registered,
-  * so that any external module wanting to replace those can react
--- 
-2.45.2.windows.1
-
diff --git a/src/sonic-frr/patch/0082-Revert-bgpd-upon-if-event-evaluate-bnc-with-matching.patch b/src/sonic-frr/patch/0082-Revert-bgpd-upon-if-event-evaluate-bnc-with-matching.patch
deleted file mode 100644
index 3af2f3be74d..00000000000
--- a/src/sonic-frr/patch/0082-Revert-bgpd-upon-if-event-evaluate-bnc-with-matching.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 086c32eb5bf2ebfb4805f76219c1a3bc5dd9213e Mon Sep 17 00:00:00 2001
-From: dgsudharsan <sudharsand@nvidia.com>
-Date: Wed, 19 Feb 2025 17:24:39 +0000
-Subject: [PATCH] Revert "bgpd: upon if event, evaluate bnc with matching
- nexthop"
-
-This reverts commit 58592be57783a3b24e7351af2a5afc61299768df.
-
-diff --git a/bgpd/bgp_nht.c b/bgpd/bgp_nht.c
-index 196cc00385..78eb1a9183 100644
---- a/bgpd/bgp_nht.c
-+++ b/bgpd/bgp_nht.c
-@@ -751,10 +751,6 @@ static void bgp_nht_ifp_table_handle(struct bgp *bgp,
- 				     struct interface *ifp, bool up)
- {
- 	struct bgp_nexthop_cache *bnc;
--	struct nexthop *nhop;
--	uint16_t other_nh_count;
--	bool nhop_ll_found = false;
--	bool nhop_found = false;
- 
- 	if (ifp->ifindex == IFINDEX_INTERNAL) {
- 		zlog_warn("%s: The interface %s ignored", __func__, ifp->name);
-@@ -762,42 +758,9 @@ static void bgp_nht_ifp_table_handle(struct bgp *bgp,
- 	}
- 
- 	frr_each (bgp_nexthop_cache, table, bnc) {
--		other_nh_count = 0;
--		nhop_ll_found = bnc->ifindex_ipv6_ll == ifp->ifindex;
--		for (nhop = bnc->nexthop; nhop; nhop = nhop->next) {
--			if (nhop->ifindex == bnc->ifindex_ipv6_ll)
--				continue;
--
--			if (nhop->ifindex != ifp->ifindex) {
--				other_nh_count++;
--				continue;
--			}
--			if (nhop->vrf_id != ifp->vrf->vrf_id) {
--				other_nh_count++;
--				continue;
--			}
--			nhop_found = true;
--		}
--
--		if (!nhop_found && !nhop_ll_found)
--			/* The event interface does not match the nexthop cache
--			 * entry */
--			continue;
--
--		if (!up && other_nh_count > 0)
--			/* Down event ignored in case of multiple next-hop
--			 * interfaces. The other might interfaces might be still
--			 * up. The cases where all interfaces are down or a bnc
--			 * is invalid are processed by a separate zebra rnh
--			 * messages.
--			 */
-+		if (bnc->ifindex_ipv6_ll != ifp->ifindex)
- 			continue;
- 
--		if (!nhop_ll_found) {
--			evaluate_paths(bnc);
--			continue;
--		}
--
- 		bnc->last_update = monotime(NULL);
- 		bnc->change_flags = 0;
- 
-@@ -810,7 +773,6 @@ static void bgp_nht_ifp_table_handle(struct bgp *bgp,
- 		if (up) {
- 			SET_FLAG(bnc->flags, BGP_NEXTHOP_VALID);
- 			SET_FLAG(bnc->change_flags, BGP_NEXTHOP_CHANGED);
--			/* change nexthop number only for ll */
- 			bnc->nexthop_num = 1;
- 		} else {
- 			UNSET_FLAG(bnc->flags, BGP_NEXTHOP_PEER_NOTIFIED);
--- 
-2.43.2
-
diff --git a/src/sonic-frr/patch/0083-staticd-add-cli-to-support-steering-of-ipv4-traffic-over-srv6-sid-list.patch b/src/sonic-frr/patch/0083-staticd-add-cli-to-support-steering-of-ipv4-traffic-over-srv6-sid-list.patch
deleted file mode 100644
index 1d97fba5d86..00000000000
--- a/src/sonic-frr/patch/0083-staticd-add-cli-to-support-steering-of-ipv4-traffic-over-srv6-sid-list.patch
+++ /dev/null
@@ -1,435 +0,0 @@
-From 6f52056f70524a26e7ff72c06ca9be826763d603 Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Tue, 24 Dec 2024 08:56:28 +0100
-Subject: [PATCH 1/6] staticd: Extend `ip_route_address_interface` to support
- SRv6 traffic steering
-
-staticd already has a CLI to steer IPv6 traffic over a given SRv6 SID
-list:
-
-```
-ipv6 route 2001:db8:1:1::/64 sr0 segments fcbb:bbbb:1:2:3:fe00::
-```
-
-This PR extends the existing CLI `ip route` to support steering of IPv4
-traffic over an SRv6 SID list.
-
-```
-ip route 10.0.0.0/24 sr0 segments fcbb:bbbb:1:2:3:fe00::
-```
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- staticd/static_vty.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/staticd/static_vty.c b/staticd/static_vty.c
-index ed2805d3eab9..ce414121dca3 100644
---- a/staticd/static_vty.c
-+++ b/staticd/static_vty.c
-@@ -564,6 +564,7 @@ DEFPY_YANG(ip_route_address_interface,
- 	  |onlink$onlink                               \
- 	  |color (1-4294967295)                        \
- 	  |bfd$bfd [{multi-hop$bfd_multi_hop|source A.B.C.D$bfd_source|profile BFDPROF$bfd_profile}] \
-+	  |segments WORD \
-           }]",
-       NO_STR IP_STR
-       "Establish static routes\n"
-@@ -589,7 +590,9 @@ DEFPY_YANG(ip_route_address_interface,
-       BFD_INTEGRATION_SOURCE_STR
-       BFD_INTEGRATION_SOURCEV4_STR
-       BFD_PROFILE_STR
--      BFD_PROFILE_NAME_STR)
-+      BFD_PROFILE_NAME_STR
-+      "Steer this route over an SRv6 SID list\n"
-+      "SRv6 SID list\n")
- {
- 	struct static_route_args args = {
- 		.delete = !!no,
-@@ -611,6 +614,7 @@ DEFPY_YANG(ip_route_address_interface,
- 		.bfd_multi_hop = !!bfd_multi_hop,
- 		.bfd_source = bfd_source_str,
- 		.bfd_profile = bfd_profile,
-+		.segs = segments,
- 	};
- 
- 	return static_route_nb_run(vty, &args);
-
-From e1e31e086983ac9d18fa973172697436b9368495 Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Tue, 24 Dec 2024 08:57:28 +0100
-Subject: [PATCH 2/6] staticd: Extend `ip_route_address_interface_vrf` to
- support SRv6 traffic steering
-
-staticd already has a CLI to steer IPv6 traffic over a given SRv6 SID
-list:
-
-```
-vrf vrf10
- ipv6 route 2001:db8:1:1::/64 sr0 segments fcbb:bbbb:1:2:3:fe00::
-```
-
-This PR extends the existing CLI `ip route` to support steering of IPv4
-traffic over an SRv6 SID list.
-
-```
-vrf vrf10
- ip route 10.0.0.0/24 sr0 segments fcbb:bbbb:1:2:3:fe00::
-```
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- staticd/static_vty.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/staticd/static_vty.c b/staticd/static_vty.c
-index ce414121dca3..cabcf00b034d 100644
---- a/staticd/static_vty.c
-+++ b/staticd/static_vty.c
-@@ -635,6 +635,7 @@ DEFPY_YANG(ip_route_address_interface_vrf,
- 	  |onlink$onlink                               \
- 	  |color (1-4294967295)                        \
- 	  |bfd$bfd [{multi-hop$bfd_multi_hop|source A.B.C.D$bfd_source|profile BFDPROF$bfd_profile}] \
-+	  |segments WORD \
- 	  }]",
-       NO_STR IP_STR
-       "Establish static routes\n"
-@@ -659,7 +660,9 @@ DEFPY_YANG(ip_route_address_interface_vrf,
-       BFD_INTEGRATION_SOURCE_STR
-       BFD_INTEGRATION_SOURCEV4_STR
-       BFD_PROFILE_STR
--      BFD_PROFILE_NAME_STR)
-+      BFD_PROFILE_NAME_STR
-+      "Steer this route over an SRv6 SID list\n"
-+      "SRv6 SID list\n")
- {
- 	struct static_route_args args = {
- 		.delete = !!no,
-@@ -681,6 +684,7 @@ DEFPY_YANG(ip_route_address_interface_vrf,
- 		.bfd_multi_hop = !!bfd_multi_hop,
- 		.bfd_source = bfd_source_str,
- 		.bfd_profile = bfd_profile,
-+		.segs = segments,
- 	};
- 
- 	return static_route_nb_run(vty, &args);
-
-From 885181acb441dcb1b78bacea2c4287ac20e5d043 Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Tue, 24 Dec 2024 08:58:41 +0100
-Subject: [PATCH 3/6] staticd: Extend `ip_route` CLI to support SRv6 traffic
- steering
-
-staticd already has a CLI to steer IPv6 traffic over a given SRv6 SID
-list:
-
-```
-ipv6 route 2001:db8:1:1::/64 sr0 segments fcbb:bbbb:1:2:3:fe00::
-```
-
-This PR extends the existing CLI `ip route` to support steering of IPv4
-traffic over an SRv6 SID list.
-
-```
-ip route 10.0.0.0/24 sr0 segments fcbb:bbbb:1:2:3:fe00::
-```
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- staticd/static_vty.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/staticd/static_vty.c b/staticd/static_vty.c
-index cabcf00b034d..b84e3b6a6cb9 100644
---- a/staticd/static_vty.c
-+++ b/staticd/static_vty.c
-@@ -704,6 +704,7 @@ DEFPY_YANG(ip_route,
- 	  |nexthop-vrf NAME                            \
- 	  |color (1-4294967295)                        \
- 	  |bfd$bfd [{multi-hop$bfd_multi_hop|source A.B.C.D$bfd_source|profile BFDPROF$bfd_profile}] \
-+	  |segments WORD \
-           }]",
-       NO_STR IP_STR
-       "Establish static routes\n"
-@@ -728,7 +729,9 @@ DEFPY_YANG(ip_route,
-       BFD_INTEGRATION_SOURCE_STR
-       BFD_INTEGRATION_SOURCEV4_STR
-       BFD_PROFILE_STR
--      BFD_PROFILE_NAME_STR)
-+      BFD_PROFILE_NAME_STR
-+      "Steer this route over an SRv6 SID list\n"
-+      "SRv6 SID list\n")
- {
- 	struct static_route_args args = {
- 		.delete = !!no,
-@@ -749,6 +752,7 @@ DEFPY_YANG(ip_route,
- 		.bfd_multi_hop = !!bfd_multi_hop,
- 		.bfd_source = bfd_source_str,
- 		.bfd_profile = bfd_profile,
-+		.segs = segments,
- 	};
- 
- 	return static_route_nb_run(vty, &args);
-
-From 39613ec8be65240f1dfd4ec623c259076062b91c Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Tue, 24 Dec 2024 08:59:18 +0100
-Subject: [PATCH 4/6] staticd: Extend `ip_route_vrf` CLI to support SRv6
- traffic steering
-
-staticd already has a CLI to steer IPv6 traffic over a given SRv6 SID
-list:
-
-```
-vrf vrf10
- ipv6 route 2001:db8:1:1::/64 sr0 segments fcbb:bbbb:1:2:3:fe00::
-```
-
-This PR extends the existing CLI `ip route` to support steering of IPv4
-traffic over an SRv6 SID list.
-
-```
-vrf vrf10
- ip route 10.0.0.0/24 sr0 segments fcbb:bbbb:1:2:3:fe00::
-```
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- staticd/static_vty.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/staticd/static_vty.c b/staticd/static_vty.c
-index b84e3b6a6cb9..7c425f4a33df 100644
---- a/staticd/static_vty.c
-+++ b/staticd/static_vty.c
-@@ -771,6 +771,7 @@ DEFPY_YANG(ip_route_vrf,
- 	  |nexthop-vrf NAME                            \
- 	  |color (1-4294967295)                        \
- 	  |bfd$bfd [{multi-hop$bfd_multi_hop|source A.B.C.D$bfd_source|profile BFDPROF$bfd_profile}] \
-+	  |segments WORD \
-           }]",
-       NO_STR IP_STR
-       "Establish static routes\n"
-@@ -794,7 +795,9 @@ DEFPY_YANG(ip_route_vrf,
-       BFD_INTEGRATION_SOURCE_STR
-       BFD_INTEGRATION_SOURCEV4_STR
-       BFD_PROFILE_STR
--      BFD_PROFILE_NAME_STR)
-+      BFD_PROFILE_NAME_STR
-+      "Steer this route over an SRv6 SID list\n"
-+      "SRv6 SID list\n")
- {
- 	struct static_route_args args = {
- 		.delete = !!no,
-@@ -815,6 +818,7 @@ DEFPY_YANG(ip_route_vrf,
- 		.bfd_multi_hop = !!bfd_multi_hop,
- 		.bfd_source = bfd_source_str,
- 		.bfd_profile = bfd_profile,
-+		.segs = segments,
- 	};
- 
- 	return static_route_nb_run(vty, &args);
-
-From 478550efc404332cf44ed05905aecec8c9c3eaba Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Tue, 24 Dec 2024 09:22:52 +0100
-Subject: [PATCH 5/6] doc: Add documentation for SRv6 IPv4 traffic steering
-
-Add an example of how to steer IPv4 traffic over an SRv6 SID list.
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- doc/user/static.rst | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/doc/user/static.rst b/doc/user/static.rst
-index 5bf5004a66fb..0ce6e2107e7c 100644
---- a/doc/user/static.rst
-+++ b/doc/user/static.rst
-@@ -177,2 +177,16 @@ multiple segments instructions.
-   [..]
-   S>* 2005::/64 [1/0] is directly connected, ens3, seg6 2001:db8:aaaa::7,2002::4,2002::3,2002::2, weight 1, 00:00:06
-+
-+STATIC also supports steering of IPv4 traffic over an SRv6 SID list, as shown in the example below.
-+
-+.. code-block:: frr
-+
-+  ip route A.B.C.D <A.B.C.D|nexthop> segments U:U::U:U/Y:Y::Y:Y/Z:Z::Z:Z
-+
-+::
-+
-+  router(config)# ip route 10.0.0.0/24 sr0 segments fcbb:bbbb:1:2:3:fe00::
-+
-+  router# show ip route
-+  [..]
-+  S>* 10.0.0.0/24 [1/0] is directly connected, sr0, seg6 fcbb:bbbb:1:2:3:fe00::, weight 1, 00:00:06
-\ No newline at end of file 
-
-From 1add31d129ddbe53afd8ac83717f7818c1fb228a Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Tue, 24 Dec 2024 09:42:34 +0100
-Subject: [PATCH 6/6] tests: Add topotest for SRv6 IPv4 traffic steering
-
-Add a topotest to verify the newly introduced CLI to support
-steering of IPv4 traffic over an SRv6 SID list.
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- .../srv6_static_route_ipv4/__init__.py        |  0
- .../expected_srv6_route.json                  | 28 +++++++
- .../srv6_static_route_ipv4/r1/frr.conf        |  7 ++
- .../srv6_static_route_ipv4/r1/setup.sh        |  2 +
- .../srv6_static_route_ipv4/test_srv6_route.py | 82 +++++++++++++++++++
- 5 files changed, 119 insertions(+)
- create mode 100644 tests/topotests/srv6_static_route_ipv4/__init__.py
- create mode 100644 tests/topotests/srv6_static_route_ipv4/expected_srv6_route.json
- create mode 100644 tests/topotests/srv6_static_route_ipv4/r1/frr.conf
- create mode 100644 tests/topotests/srv6_static_route_ipv4/r1/setup.sh
- create mode 100755 tests/topotests/srv6_static_route_ipv4/test_srv6_route.py
-
-diff --git a/tests/topotests/srv6_static_route_ipv4/__init__.py b/tests/topotests/srv6_static_route_ipv4/__init__.py
-new file mode 100644
-index 000000000000..e69de29bb2d1
-diff --git a/tests/topotests/srv6_static_route_ipv4/expected_srv6_route.json b/tests/topotests/srv6_static_route_ipv4/expected_srv6_route.json
-new file mode 100644
-index 000000000000..57f4c4488dbd
---- /dev/null
-+++ b/tests/topotests/srv6_static_route_ipv4/expected_srv6_route.json
-@@ -0,0 +1,28 @@
-+{
-+	"192.0.2.0/24": [
-+		{
-+			"prefix": "192.0.2.0/24",
-+			"prefixLen": 24,
-+			"protocol": "static",
-+			"selected": true,
-+			"destSelected": true,
-+			"distance": 1,
-+			"metric": 0,
-+			"installed": true,
-+			"nexthops": [
-+				{
-+					"directlyConnected": true,
-+					"active": true,
-+					"weight": 1,
-+					"seg6local": {
-+						"action": "unspec"
-+					},
-+					"seg6": [
-+						"fcbb:bbbb:1:2:3:4:5:6",
-+						"fcbb:bbbb:7:8:fe00::"
-+					]
-+				}
-+			]
-+		}
-+	]
-+}
-diff --git a/tests/topotests/srv6_static_route_ipv4/r1/frr.conf b/tests/topotests/srv6_static_route_ipv4/r1/frr.conf
-new file mode 100644
-index 000000000000..8ff23ec1b886
---- /dev/null
-+++ b/tests/topotests/srv6_static_route_ipv4/r1/frr.conf
-@@ -0,0 +1,7 @@
-+hostname r1
-+!
-+log stdout notifications
-+log commands
-+!
-+ipv6 route fcbb:bbbb:1::/48 sr0
-+ip route 192.0.2.0/24 sr0 segments fcbb:bbbb:1:2:3:4:5:6/fcbb:bbbb:7:8:fe00::
-diff --git a/tests/topotests/srv6_static_route_ipv4/r1/setup.sh b/tests/topotests/srv6_static_route_ipv4/r1/setup.sh
-new file mode 100644
-index 000000000000..4b6cce89f89d
---- /dev/null
-+++ b/tests/topotests/srv6_static_route_ipv4/r1/setup.sh
-@@ -0,0 +1,2 @@
-+ip link add sr0 type dummy
-+ip link set sr0 up
-diff --git a/tests/topotests/srv6_static_route_ipv4/test_srv6_route.py b/tests/topotests/srv6_static_route_ipv4/test_srv6_route.py
-new file mode 100755
-index 000000000000..b49a9cec8928
---- /dev/null
-+++ b/tests/topotests/srv6_static_route_ipv4/test_srv6_route.py
-@@ -0,0 +1,82 @@
-+#!/usr/bin/env python
-+# SPDX-License-Identifier: ISC
-+
-+#
-+# test_srv6_static_route_ipv4.py
-+#
-+# Copyright 2025
-+# Carmine Scarpitta <cscarpit.@cisco.com>
-+#
-+
-+"""
-+test_srv6_static_route_ipv4.py:
-+Test for SRv6 static route on zebra
-+"""
-+
-+import os
-+import sys
-+import json
-+import pytest
-+import functools
-+
-+CWD = os.path.dirname(os.path.realpath(__file__))
-+sys.path.append(os.path.join(CWD, "../"))
-+
-+# pylint: disable=C0413
-+from lib import topotest
-+from lib.topogen import Topogen, TopoRouter, get_topogen
-+from lib.topolog import logger
-+
-+pytestmark = [pytest.mark.staticd]
-+
-+
-+def open_json_file(filename):
-+    try:
-+        with open(filename, "r") as f:
-+            return json.load(f)
-+    except IOError:
-+        assert False, "Could not read file {}".format(filename)
-+
-+
-+def setup_module(mod):
-+    tgen = Topogen({None: "r1"}, mod.__name__)
-+    tgen.start_topology()
-+    for rname, router in tgen.routers().items():
-+        router.run("/bin/bash {}/{}/setup.sh".format(CWD, rname))
-+        router.load_frr_config("frr.conf")
-+    tgen.start_router()
-+
-+
-+def teardown_module():
-+    tgen = get_topogen()
-+    tgen.stop_topology()
-+
-+
-+def test_srv6_static_route():
-+    tgen = get_topogen()
-+    if tgen.routers_have_failure():
-+        pytest.skip(tgen.errors)
-+    router = tgen.gears["r1"]
-+
-+    def _check_srv6_static_route(router, expected_route_file):
-+        logger.info("checking zebra srv6 static route with multiple segs status")
-+        output = json.loads(router.vtysh_cmd("show ip route static json"))
-+        expected = open_json_file("{}/{}".format(CWD, expected_route_file))
-+        return topotest.json_cmp(output, expected)
-+
-+    def check_srv6_static_route(router, expected_file):
-+        func = functools.partial(_check_srv6_static_route, router, expected_file)
-+        _, result = topotest.run_and_expect(func, None, count=15, wait=1)
-+        assert result is None, "Failed"
-+
-+    # FOR DEVELOPER:
-+    # If you want to stop some specific line and start interactive shell,
-+    # please use tgen.mininet_cli() to start it.
-+
-+    logger.info("Test for srv6 route configuration")
-+    check_srv6_static_route(router, "expected_srv6_route.json")
-+
-+
-+if __name__ == "__main__":
-+    args = ["-s"] + sys.argv[1:]
-+    sys.exit(pytest.main(args))
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index c18d0159c6c..493bfaedd9e 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -6,60 +6,54 @@
 0006-Link-local-scope-was-not-set-while-binding-socket-for-bgp-ipv6-link-local-neighbors.patch
 0007-ignore-route-from-default-table.patch
 0008-Use-vrf_id-for-vrf-not-tabled_id.patch
-0010-bgpd-Change-log-level-for-graceful-restart-events.patch
-0021-Disable-ipv6-src-address-test-in-pceplib.patch
-0022-cross-compile-changes.patch
-0025-bgp-community-memory-leak-fix.patch
-0028-zebra-fix-parse-attr-problems-for-encap.patch
-0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch
-0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch
-0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch
-0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch
-0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch
-0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch
-0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch
-0038-zebra-Actually-display-I-O-buffer-sizes.patch
-0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch
-0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch
-0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch
-0042-zebra-Use-built-in-data-structure-counter.patch
-0043-zebra-Use-the-ctx-queue-counters.patch
-0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch
-0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch
-0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch
-0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch
-0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch
-0049-bgpd-backpressure-Improve-debuggability.patch
-0050-bgpd-backpressure-Avoid-use-after-free.patch
-0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch
-0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch
-0054-build-dplane-fpm-sonic-module.patch
-0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
-0056-zebra-do-not-send-local-routes-to-fpm.patch
-0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch
-0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch
-0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch
-0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch
-0061-dont-print-warning-if-not-a-daemon.patch
-0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch
-0062-zebra-lib-use-internal-rbtree-per-ns.patch
-0063-Patch-to-send-tag-value-associated-with-route-via-ne.patch
-0064-SRv6-BGP-SID-reachability.patch
-0065-zebra-display-srv6-encapsulation-source-address-when-configured.patch
-0066-lib-fix-srv6-locator-flags-propagated-to-isis.patch
-0067-Add-support-for-SRv6-SID-Manager.patch
-0068-bgpd-Extend-BGP-to-communicate-with-the-SRv6-SID-Manager-to-allocate-release-SRv6-SIDs.patch
-0069-lib-nexthop-code-should-use-uint16_t-for-nexthop-cou.patch
-0070-Allow-16-bit-size-for-nexthops.patch
-0071-zebra-Only-notify-dplane-work-pthread-when-needed.patch
-0072-Fix-up-improper-handling-of-nexthops-for-nexthop-tra.patch
-0073-remove-in6addr-cmp.patch
-0074-bgp-best-port-reordering.patch
-0075-bgp-mp-info-changes.patch
-0076-Optimizations-and-problem-fixing-for-large-scale-ecmp-from-bgp.patch
-0077-frr-vtysh-dependencies-for-srv6-static-patches.patch
-0078-vtysh-de-conditionalize-and-reorder-install-node.patch
-0079-staticd-add-support-for-srv6.patch
-0080-SRv6-vpn-route-and-sidlist-install.patch
-0082-Revert-bgpd-upon-if-event-evaluate-bnc-with-matching.patch
-0083-staticd-add-cli-to-support-steering-of-ipv4-traffic-over-srv6-sid-list.patch
+0009-bgpd-Change-log-level-for-graceful-restart-events.patch
+0010-Disable-ipv6-src-address-test-in-pceplib.patch
+0011-cross-compile-changes.patch
+0012-build-dplane-fpm-sonic-module.patch
+0013-zebra-do-not-send-local-routes-to-fpm.patch
+0014-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch
+0015-When-the-file-is-config-replayed-we-cannot-handle-th.patch
+0016-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch
+0017-Patch-to-send-tag-value-associated-with-route-via-ne.patch
+0018-SRv6-vpn-route-and-sidlist-install.patch
+0019-Revert-bgpd-upon-if-event-evaluate-bnc-with-matching.patch
+0020-staticd-add-cli-to-support-steering-of-ipv4-traffic-over-srv6-sid-list.patch
+0021-lib-Return-duplicate-prefix-list-entry-test.patch
+0022-This-error-happens-when-we-try-to-write-to-a-socket.patch
+0023-isisd-lib-add-some-codepoints-usually-shared-with-other-vendors.patch
+0024-staticd-Add-support-for-SRv6-uA-behavior.patch
+0025-Fpm-problems.patch
+0026-Translate-tableid-for-dplane-route-notify.patch
+0027-Dont-skip-kernel-routes-uninstall.patch
+0028-zebra-ensure-proper-return-for-failure-for-Sid-allocation.patch
+0029-staticd-Fix-a-crash-that-occurs-when-modifying-an-SRv6-SID.patch
+0030-staticd-Avoid-requesting-SRv6-sid-from-zebra-when-loc-and-sid-block-dont-match.patch
+0031-isisd-fix-srv6-sid-memory-leak.patch
+0032-show-ipv6-route-json-displays-seg6local-flavors.patch
+0033-staticd-Install-known-nexthops-upon-connection-with-zebra.patch
+0034-staticd-Fix-an-issue-where-SRv6-SIDs-may-not-be-allocated-on-heavily-loaded-systems.patch
+0035-lib-Add-support-for-stream-buffer-to-expand.patch
+0036-zebra-zebra-crash-for-zapi-stream.patch
+0037-bgpd-Replace-per-peer-connection-error-with-per-bgp.patch
+0038-bgpd-remove-apis-from-bgp_route.h.patch
+0039-bgpd-batch-peer-connection-error-clearing.patch
+0040-zebra-move-peer-conn-error-list-to-connection-struct.patch
+0041-bgpd-Allow-batch-clear-to-do-partial-work-and-contin.patch
+0042-zebra-V6-RA-not-sent-anymore-after-interface-up-down.patch
+0043-bgpd-Paths-received-from-shutdown-peer-not-deleted.patch
+0044-bgpd-Modify-bgp-to-handle-packet-events-in-a-FIFO.patch
+0045-zebra-Limit-reading-packets-when-MetaQ-is-full.patch
+0046-bgpd-Delay-processing-MetaQ-in-some-events.patch
+0047-bgpd-Fix-holdtime-not-working-properly-when-busy.patch
+0048-bgpd-ensure-that-bgp_generate_updgrp_packets-shares-.patch
+0049-zebra-show-command-to-display-metaq-info.patch
+0050-bgpd-add-total-path-count-for-bgp-net-in-json-output.patch
+0051-lib-Add-nexthop_same_no_ifindex-comparison-function.patch
+0052-zebra-show-nexthop-count-in-nexthop-group-command.patch
+0053-zebra-Allow-nhg-s-to-be-reused-when-multiple-interfa.patch
+0054-zebra-Prevent-active-setting-if-interface-is-not-ope.patch
+0055-zebra-Add-nexthop-group-id-to-route-dump.patch
+0056-zebra-Display-interface-name-not-ifindex-in-nh-dump.patch
+0057-mgmtd-remove-bogus-hedge-code-which-corrupted-active.patch
+0058-mgmtd-normalize-argument-order-to-copy-dst-src.patch
+0059-zebra-Ensure-that-the-dplane-can-send-the-full-packe.patch
diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 558cda6a5ce..9e9223d80b8 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 558cda6a5ce900527ea2c966d800b3e84c1b2db4
+Subproject commit 9e9223d80b85134186fd256827d16c6e46485b23
diff --git a/src/sonic-host-services b/src/sonic-host-services
index 84c7d722d1a..bf1eb694061 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 84c7d722d1a4e869dfca2a835e3bf19421e7615f
+Subproject commit bf1eb694061655d2e911750f9cd677a8858af336
diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 7faad281a53..4dda3d6847b 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 7faad281a5340b79a0ec5af564324c9d9e1d4379
+Subproject commit 4dda3d6847bf6ad59576255da1cb1d9f8aa80636
diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index dca2e839246..bb0e47d3e6e 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit dca2e839246d7e3e5d052a87bb156fd6764fa389
+Subproject commit bb0e47d3e6eb98a27b386636da91a7bfb4ecefbc
diff --git a/src/sonic-mgmt-framework b/src/sonic-mgmt-framework
index d65ce7c004c..d41046ff937 160000
--- a/src/sonic-mgmt-framework
+++ b/src/sonic-mgmt-framework
@@ -1 +1 @@
-Subproject commit d65ce7c004c0d54a6a2630e29d8cefef7437ae76
+Subproject commit d41046ff9374ee393cf0ea62c088421f4b2870c7
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_cfg.c b/src/sonic-pac/authmgr/mapping/auth_mgr_cfg.c
new file mode 100755
index 00000000000..3f55a3c5ceb
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_cfg.c
@@ -0,0 +1,305 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_client.h"
+#include "auth_mgr_struct.h"
+
+extern authmgrCB_t *authmgrCB;
+extern void authmgrDebugCfgUpdate(void);
+
+/*********************************************************************
+* @purpose  Checks if authmgr user config data has changed
+*
+* @param    void
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+ BOOL authmgrHasDataChanged(void)
+{
+  return authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged;
+}
+
+/*********************************************************************
+* @purpose  Reset authmgr user config data flag
+*
+* @param    void
+*
+* @returns  none
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+void authmgrResetDataChanged(void)
+{
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  FALSE;
+  return;
+}
+/*********************************************************************
+* @purpose  Print the current authmgr config values to serial port
+*
+* @param    none
+*
+* @returns   SUCCESS
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrCfgDump(void)
+{
+  char8 buf[32];
+  uint32 i;
+  uint32 intIfNum = 0;
+  authmgrPortCfg_t *pCfg;
+  nimConfigID_t configIdNull;
+
+  memset(&configIdNull, 0, sizeof(nimConfigID_t));
+
+  sysapiPrintf("\n");
+  sysapiPrintf("AUTHMGR\n");
+  sysapiPrintf("=====\n");
+
+  if (authmgrCB->globalInfo->authmgrCfg->authmgrLogTraceMode ==  ENABLE)
+    osapiSnprintf(buf, sizeof(buf),"Enable");
+  else
+    osapiSnprintf(buf,sizeof(buf),"Disable");
+  sysapiPrintf("Log Trace Mode - %s\n\n", buf);
+
+  if(authmgrCB->globalInfo->authmgrCfg->vlanAssignmentMode ==  ENABLE)
+    osapiSnprintf(buf,sizeof(buf),"Enable");
+  else
+    osapiSnprintf(buf, sizeof(buf), "Disable");
+  sysapiPrintf("Vlan Assignment Mode - %s\n\n", buf);
+
+  sysapiPrintf("Interface configuration:\n");
+  for (i = 1; i <  AUTHMGR_INTF_MAX_COUNT; i++)
+  {
+    if (authmgrIntfIsConfigurable(intIfNum, &pCfg) ==  TRUE)
+    {
+      switch (pCfg->portControlMode)
+      {
+      case  AUTHMGR_PORT_FORCE_UNAUTHORIZED:
+        osapiSnprintf(buf,sizeof(buf), "forceUnauthorized");
+        break;
+      case  AUTHMGR_PORT_AUTO:
+        osapiSnprintf(buf, sizeof(buf), "auto");
+        break;
+      case  AUTHMGR_PORT_FORCE_AUTHORIZED:
+        osapiSnprintf(buf, sizeof(buf), "forceAuthorized");
+        break;
+      default:
+        osapiSnprintf(buf,sizeof(buf), "N/A");
+        break;
+      }
+
+      sysapiPrintf("  Port Control Mode:       %s(%d)\n", buf, pCfg->portControlMode);
+      sysapiPrintf("  Quiet Period:            %d\n", pCfg->quietPeriod);
+      sysapiPrintf("  ReAuth Period:           %d\n", pCfg->reAuthPeriod);
+      sysapiPrintf("  Inactivity Period:       %d\n", pCfg->inActivityPeriod);
+
+      switch (pCfg->reAuthEnabled)
+      {
+      case  TRUE:
+        osapiSnprintf(buf, sizeof(buf),"True");
+        break;
+      case  FALSE:
+        osapiSnprintf(buf, sizeof(buf), "False");
+        break;
+      default:
+        osapiSnprintf(buf,sizeof(buf), "N/A");
+        break;
+      }
+      sysapiPrintf("  ReAuth Enabled:          %s\n", buf);
+
+      sysapiPrintf("\n");
+    }
+  }
+
+  sysapiPrintf("=============\n");
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Build default authmgr config data
+*
+* @param    none
+*
+* @returns  void
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrBuildDefaultConfigData(void)
+{
+  uint32 cfgIndex;
+  nimConfigID_t configId[ AUTHMGR_INTF_MAX_COUNT];
+
+  /* Save the config IDs */
+  memset((void *)&configId[0], 0, sizeof(nimConfigID_t) *  AUTHMGR_INTF_MAX_COUNT);
+  for (cfgIndex = 1; cfgIndex <  AUTHMGR_INTF_MAX_COUNT; cfgIndex++)
+    NIM_CONFIG_ID_COPY(&configId[cfgIndex], &authmgrCB->globalInfo->authmgrCfg->authmgrPortCfg[cfgIndex].configId);
+
+  memset((void *)authmgrCB->globalInfo->authmgrCfg, 0, sizeof(authmgrCfg_t));
+
+  for (cfgIndex = 1; cfgIndex <  AUTHMGR_INTF_MAX_COUNT; cfgIndex++)
+  {
+    authmgrBuildDefaultIntfConfigData(&configId[cfgIndex], &authmgrCB->globalInfo->authmgrCfg->authmgrPortCfg[cfgIndex]);
+  }
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  FALSE;
+
+  authmgrCB->globalInfo->authmgrCfg->adminMode = FD_AUTHMGR_ADMIN_MODE;
+  authmgrCB->globalInfo->authmgrCfg->authmgrLogTraceMode = FD_AUTHMGR_LOG_TRACE_MODE;
+  authmgrCB->globalInfo->authmgrCfg->vlanAssignmentMode = FD_AUTHMGR_VLAN_ASSIGN_MODE;
+  authmgrCB->globalInfo->authmgrCfg->portControlMode = FD_AUTHMGR_PORT_MODE;
+  authmgrCB->globalInfo->authmgrCfg->hostMode = FD_AUTHMGR_HOST_MODE;
+
+
+  return;
+}
+
+/*********************************************************************
+* @purpose  Build default authmgr port config data
+*
+* @parms    config Id, the config Id to be placed into the intf config
+* @parms    pCfg, a pointer to the interface structure
+*
+* @returns  none
+*
+*
+* @end
+*********************************************************************/
+void authmgrBuildDefaultIntfConfigData(nimConfigID_t *configId, authmgrPortCfg_t *pCfg)
+{
+  uint32 i = 0;
+   AUTHMGR_METHOD_t buildFdList[] = FD_AUTHMGR_LIST;
+
+  pCfg->portControlMode = FD_AUTHMGR_PORT_MODE;
+  pCfg->hostMode = FD_AUTHMGR_HOST_MODE;
+  pCfg->intfConfigMask = 0;
+  pCfg->quietPeriod = FD_AUTHMGR_RESTART_TIMER_VAL;
+  pCfg->reAuthPeriod = FD_AUTHMGR_PORT_REAUTH_PERIOD;
+  pCfg->reAuthEnabled = FD_AUTHMGR_PORT_REAUTH_ENABLED;
+  pCfg->reAuthPeriodServer = FD_AUTHMGR_PORT_REAUTH_PERIOD_FROM_SERVER;
+  pCfg->maxUsers = FD_AUTHMGR_PORT_MAX_USERS;
+  pCfg->maxAuthAttempts = FD_AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS;
+  pCfg->inActivityPeriod = FD_AUTHMGR_PORT_INACTIVITY_PERIOD;
+  pCfg->paeCapabilities = FD_AUTHMGR_PORT_PAE_CAPABILITIES;
+
+  for (i = 0; i <  AUTHMGR_METHOD_MAX; i++)
+  {
+    pCfg->methodList[i] = buildFdList[i];
+    pCfg->priorityList[i] = buildFdList[i];
+  }
+
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  FALSE;
+}
+
+/*********************************************************************
+* @purpose  Apply authmgr config data
+*
+* @param    void
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrApplyConfigData(void)
+{
+  return (authmgrIssueCmd(authmgrMgmtApplyConfigData,  NULL,  NULLPTR));
+}
+
+/*********************************************************************
+* @purpose  Apply authmgr config data to specified interface
+*
+* @param    intIfNum     @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrApplyPortConfigData(uint32 intIfNum)
+{
+  return (authmgrIssueCmd(authmgrMgmtApplyPortConfigData,  NULL,  NULLPTR));
+}
+
+/*********************************************************************
+* @purpose  Fill in default values and set the port state
+*
+* @param    intIfNum  @b{(input))  internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortReset(uint32 intIfNum)
+{
+  authmgrPortInfoInitialize(intIfNum, FALSE);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Checks if authmgr debug config data has changed
+*
+* @param    void
+*
+* @returns   TRUE or  FALSE
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+ BOOL authmgrDebugHasDataChanged(void)
+{
+  return authmgrCB->globalInfo->authmgrDebugCfg.hdr.dataChanged;
+}
+
+/*********************************************************************
+* @purpose  Build default authmgr config data
+*
+* @param    ver   Software version of Config Data
+*
+* @returns  void
+*
+* @notes
+*
+* @end
+*********************************************************************/
+void authmgrDebugBuildDefaultConfigData(uint32 ver)
+{
+  authmgrCB->globalInfo->authmgrDebugCfg.hdr.dataChanged =  FALSE;
+
+  /* set all flags to  FALSE */
+  memset(&authmgrCB->globalInfo->authmgrDebugCfg.cfg, 0, sizeof(authmgrCB->globalInfo->authmgrDebugCfg.cfg));
+}
+
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_client.c b/src/sonic-pac/authmgr/mapping/auth_mgr_client.c
new file mode 100644
index 00000000000..778b328fa09
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_client.c
@@ -0,0 +1,1419 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "auth_mgr_include.h"
+
+#include "auth_mgr_client.h"
+#include "auth_mgr_timer.h"
+#include "auth_mgr_struct.h"
+#include "pacoper_common.h"
+#include "pac_cfg_authmgr.h"
+#include "auth_mgr_vlan_db.h"
+#include "simapi.h"
+#include "osapi.h"
+
+extern authmgrCB_t *authmgrCB;
+
+/*********************************************************************
+* @purpose  Set the authmgr physical port authorization status
+*
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    portStatus @b{(input)) port authorization status setting
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+* @returns   ERROR
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrIhPhysicalPortStatusSet (uint32 intIfNum,
+                                         AUTHMGR_PORT_STATUS_t portStatus)
+{
+   INTF_STATES_t state;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  authmgrPortCfg_t *pCfg;
+   AUTHMGR_PORT_STATUS_t status;
+ 
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                       "%s:%d: Intf %d, portStatus %d\n",
+                       __FUNCTION__, __LINE__, intIfNum, portStatus);
+
+  /* Set the port status in the driver */
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) ==  FALSE)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Interface %s not authmgr configurable", authmgrIntfIfNameGet(intIfNum));
+    return  FAILURE;
+  }
+
+  state = nimGetIntfState (intIfNum);
+  if ((state !=  INTF_ATTACHED)
+      && (state !=  INTF_ATTACHING) && (state !=  INTF_DETACHING))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                         "%s:%d: Intf %s, state %d\n",
+                         __FUNCTION__, __LINE__, authmgrIntfIfNameGet(intIfNum), state);
+  }
+
+  /* set the port status */
+  if ( DOT1X_PAE_PORT_NONE_CAPABLE == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities)
+  {
+    status = portStatus;
+  }
+  else if (( AUTHMGR_SINGLE_AUTH_MODE ==
+       authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode)
+      || ( AUTHMGR_MULTI_AUTH_MODE ==
+          authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode))
+  {
+    status =  AUTHMGR_PORT_STATUS_UNAUTHORIZED;
+  }
+  else
+  {
+    status = portStatus;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                       "%s:Setting the port-%d  to %s\n",
+                       __FUNCTION__, intIfNum,
+                       ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+                        portStatus) ? "Authorize" : "Unauthorize");
+
+  if (nimGetIntfName(intIfNum,  ALIASNAME, ifName) !=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+             "Unable to get aliasName for interface %s", authmgrIntfIfNameGet(intIfNum));
+    return  FAILURE;
+  }
+
+  /* apply the violation policy */
+  if ( SUCCESS != authmgrViolationPolicyApply (intIfNum))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, intIfNum,
+                         "%s:Unable to apply port violation policy for port-%s\n",
+                         __FUNCTION__, authmgrIntfIfNameGet(intIfNum));
+    return  FAILURE;
+  }
+
+  /* set the learning status */
+  if ( SUCCESS != authmgrPortLearningModify (intIfNum))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, intIfNum,
+                         "%s:Unable to modify port learning for port-%s\n",
+                         __FUNCTION__, authmgrIntfIfNameGet(intIfNum));
+    return  FAILURE;
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  application function to add the authenticated client 
+*
+* @param    physPort   @b{(input)}  internal interface number
+* @param    macAddr    @b{(input)}  MAC address of authorized client
+* @param    vlanId     @b{(input)}  set to non-zero value to assign this client
+*                                   to a VLAN
+* @param    pTLV       @b{(input)}  pass a non-NULL pointer to apply a policy
+*                                   for this client
+* @param    blockVlanId     @b{(input)} vlan id in which the client is received 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+* @returns   ERROR
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrAuthenticatedClientAdd (uint32 physPort,
+                                        enetMacAddr_t macAddr,
+                                        ushort16 vlanId,
+                                        ushort16 blockVlanId)
+{
+  RC_t rc =  SUCCESS, rc1 =  SUCCESS;
+   char8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                       "%s:%d:adding the client %s, vlan= %d to port %s \n",
+                       __FUNCTION__, __LINE__,
+                       AUTHMGR_PRINT_MAC_ADDR(macAddr.addr), vlanId,
+                       authmgrIntfIfNameGet(physPort));
+
+  if (nimGetIntfName (physPort,  ALIASNAME, ifName) !=  SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_ERROR,
+             "Unable to get alias for intf %s", authmgrIntfIfNameGet(physPort));
+    rc1 =  FAILURE;
+    goto fail;
+  }
+
+  if (pacCfgIntfClientAdd(ifName, macAddr.addr, vlanId) !=  TRUE)
+  {
+     LOGF ( LOG_SEVERITY_ERROR,
+             "Unable to add client on port %s", ifName);
+    rc1 =  FAILURE;
+    goto fail;
+  }
+
+  if ( SUCCESS == rc)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                         "%s:%d Inserting the mac to fdb table as static entry \n",
+                         __FUNCTION__, __LINE__);
+    if (0 != blockVlanId)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+          "%s:%d Unblocking the Client %s with vlan id- %d \n",
+          __FUNCTION__, __LINE__,
+          AUTHMGR_PRINT_MAC_ADDR(macAddr.addr), blockVlanId);
+
+      if (blockVlanId != vlanId)
+      {
+        if (pacCfgIntfClientUnblock(ifName, macAddr.addr, blockVlanId) !=  TRUE)
+        {
+           LOGF ( LOG_SEVERITY_ERROR,
+                   "Unable to block port %s", ifName);
+          rc1 =  FAILURE;
+        }
+
+fail:
+        if ( SUCCESS != rc1)
+        {
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+              "%s:%d Client operation not successful \n",
+              __FUNCTION__, __LINE__);
+        }
+      }
+    }
+  } 
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Set the authmgr physical port authorization status
+*
+* @param    intIfNum   @b{(input)}  internal interface number
+* @param    macAddr    @b{(input)}  MAC address of authorized client
+* @param    vlanId     @b{(input)}  set to non-zero value to assign this client
+*                                   to a VLAN
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+* @returns   ERROR
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrAuthenticatedClientDelete (uint32 physPort,
+                                           enetMacAddr_t macAddr,
+                                           ushort16 vlanId)
+{
+  RC_t rc =  SUCCESS;
+   char8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                       "%s:%d:removing the client "
+                       "Mac Addr: %s from port %s \n",
+                       __FUNCTION__, __LINE__, AUTHMGR_PRINT_MAC_ADDR(macAddr.addr),
+                       authmgrIntfIfNameGet(physPort));
+
+  if (nimGetIntfName (physPort,  ALIASNAME, ifName) !=  SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_ERROR,
+             "Unable to get alias for intf %s", authmgrIntfIfNameGet(physPort));
+    rc =  FAILURE;
+    goto label;
+  }
+
+  if (pacCfgIntfClientRemove(ifName, macAddr.addr, vlanId) !=  TRUE)
+  {
+     LOGF ( LOG_SEVERITY_ERROR,
+             "Unable to add client on port %s", ifName);
+    rc =  FAILURE;
+  }
+
+
+label:
+  if ( SUCCESS != rc)
+  {
+     LOGF ( LOG_SEVERITY_NOTICE,
+             "Error in removing the client details from the driver."
+             " Could not remove client details from the driver");
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                         "\n%s:%d Error in removing the client details from the driver\n",
+                         __FUNCTION__, __LINE__);
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose function to  cleanup the client hw params such as vlan and other settings
+*
+* @param    logicalPortInfo   @b{(input)) client logical port info structure 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientHwInfoCleanup (authmgrLogicalPortInfo_t * logicalPortInfo)
+{
+  RC_t rc =  FAILURE;
+  authmgrPortCfg_t *pCfg;
+   BOOL valid =  FALSE;
+  authmgrVlanType_t vlanType = 0;
+  uint32 vlanId = 0;
+  uint32 physPort = 0, lPort = 0, type = 0;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  if (authmgrIntfIsConfigurable (physPort, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  if ( AUTHMGR_PORT_AUTO !=
+      authmgrCB->globalInfo->authmgrPortInfo[physPort].portControlMode)
+  {
+    return  SUCCESS;
+  }
+
+  /* get the host policy for the current host mode */
+  if ( SUCCESS == authmgrStaticFdbEntryValidCheck (physPort, &valid))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                         "Initiating the HW Info cleanup for the client %d\n",
+                         logicalPortInfo->key.keyNum);
+
+    if (valid)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                           "trying to remove the static fdb entry for the client %d\n",
+                           logicalPortInfo->key.keyNum);
+
+      rc =  SUCCESS;
+      if (logicalPortInfo->client.attrCreateMask & (1<<(AUTHMGR_HW_ATTR_STATIC_FDB)))
+      {
+        /* remove the CPU inserted client */
+        rc = authmgrAuthenticatedClientDelete (physPort,
+            logicalPortInfo->client.
+            suppMacAddr,
+            logicalPortInfo->client.vlanId);
+        logicalPortInfo->client.attrCreateMask &= ~(1<<(AUTHMGR_HW_ATTR_STATIC_FDB));
+      }
+
+      if ( SUCCESS != rc)
+      {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                             "%s:%d unable to delete client on "
+                             "port %d logicalPort %d, type %d vlan %d \n",
+                             __FUNCTION__, __LINE__, physPort, lPort,
+                             type, logicalPortInfo->client.vlanId);
+
+        return  FAILURE;
+      }
+    }
+  }
+
+  /* take a back up of vlan id and Vlan type */
+  vlanType = logicalPortInfo->client.vlanType;
+  vlanId = logicalPortInfo->client.vlanId;
+
+  /* reset the data from the logical node temporarily */
+  logicalPortInfo->client.vlanId = 0;
+  logicalPortInfo->client.vlanType = AUTHMGR_VLAN_UNASSIGNED;
+
+  /* check if no clients are on the same vlan */
+  if ( SUCCESS != authmgrVlanPortDeletionValidate (physPort, vlanId))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+                         "%s:%d unable to clear vlan participation "
+                         "port %d is having additional clients on vlan %d \n",
+                         __FUNCTION__, __LINE__, physPort, vlanId);
+    return  SUCCESS;
+  }
+
+
+    rc = authmgrClientVlanInfoReset (physPort, vlanId);
+
+  if ( SUCCESS != rc)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                         "%s:%d unable to clear vlan participation "
+                         "port %d from vlan %d \n",
+                         __FUNCTION__, __LINE__, physPort, vlanId);
+
+    /* put back the backed up info */
+    logicalPortInfo->client.vlanType = vlanType;
+    logicalPortInfo->client.vlanId = vlanId;
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose function to  add cient hw params such as vlan and other settings
+*
+* @param    logicalPortInfo   @b{(input)) logical port info structure 
+* @param    macAddr   @b{(input)) mac address 
+* @param    vlanId   @b{(input)) vlanId 
+* @param    policyIndex   @b{(input)) policyIndex 
+* @param    blockVlanId   @b{(input)) vlan id on which client is received 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientHwInfoAdd (authmgrLogicalPortInfo_t * logicalPortInfo,
+                                 enetMacAddr_t macAddr,
+                                 ushort16 vlanId,
+                                 ushort16 blockVlanId)
+{
+  RC_t rc =  FAILURE;
+  authmgrPortCfg_t *pCfg;
+   BOOL valid =  FALSE;
+  uint32 physPort = 0, lPort = 0, type = 0, mask = 0;
+   char8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  if (nimGetIntfName (physPort,  ALIASNAME, ifName) !=  SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_ERROR,
+             "Unable to get alias for intf %s", authmgrIntfIfNameGet(physPort));
+    return  FAILURE;
+  }
+
+  if (authmgrIntfIsConfigurable (physPort, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  if ( AUTHMGR_PORT_AUTO !=
+      authmgrCB->globalInfo->authmgrPortInfo[physPort].portControlMode)
+  {
+    return  SUCCESS;
+  }
+
+  /* see if static fdb entry is allowed */
+  if ( SUCCESS ==
+      authmgrStaticFdbEntryValidCheck (physPort, &valid))
+  {
+    if (valid)
+    {
+      rc =  SUCCESS;
+      if (!((1<<(AUTHMGR_HW_ATTR_STATIC_FDB) & logicalPortInfo->client.attrCreateMask)))
+      {
+        rc = authmgrAuthenticatedClientAdd (physPort,
+            macAddr, vlanId, blockVlanId);
+      }
+
+      if ( SUCCESS != rc)
+      {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                             "%s:%d unable to add client on "
+                             "port %d logicalPort %d, type %d vlan %d \n",
+                             __FUNCTION__, __LINE__, physPort, lPort,
+                             type, vlanId);
+
+        authmgrClientHwAddFailPostHwCleanup(logicalPortInfo, mask);
+        return  FAILURE;
+      }
+
+      mask |= (1<<(AUTHMGR_HW_ATTR_STATIC_FDB));
+      logicalPortInfo->client.attrCreateMask |= (1<<(AUTHMGR_HW_ATTR_STATIC_FDB));
+
+    }
+     else
+     {
+       /* un Block traffic from this client. */
+       if ( TRUE == logicalPortInfo->client.dataBlocked)
+       {
+         if (0 != logicalPortInfo->client.blockVlanId)
+         {
+           AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+               "%s, %d, disabling the settings for logicalInterface %d to permit traffic\n",
+               __func__, __LINE__, logicalPortInfo->key.keyNum);
+           if (pacCfgIntfClientUnblock(ifName, logicalPortInfo->client.suppMacAddr.addr, logicalPortInfo->client.blockVlanId) !=  TRUE)
+           {
+              LOGF ( LOG_SEVERITY_ERROR,
+                      "Unable to block port %s", ifName);
+             return  FAILURE;
+           }
+           logicalPortInfo->client.dataBlocked =  FALSE;
+         }
+       }
+     }
+
+    /* make the vlan participation */
+
+    if ( SUCCESS != authmgrClientVlanInfoSet (logicalPortInfo, vlanId))
+    {
+      if (0 == authmgrCB->processInfo.vlanId)
+      {
+        authmgrCB->processInfo.vlanId = vlanId;
+      }
+      authmgrClientHwAddFailPostHwCleanup(logicalPortInfo, mask);
+      return  FAILURE;
+    }
+
+    return  SUCCESS;
+  }
+
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose  Set the authmgr client info
+*
+* @param    logicalPortInfo   @b{(input)) logical interface structure 
+* @param    client_info @b{(output)) client info
+*
+* @returns  void
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+static
+void authmgrClientInfoPopulate(authmgrLogicalPortInfo_t *logicalPortInfo,
+                               pac_authenticated_clients_oper_table_t *client_info)
+{
+  uint32 physPort = 0, lPort = 0, type = 0;
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  memset(client_info, 0, sizeof(*client_info));
+
+  client_info->currentIdL = logicalPortInfo->client.currentIdL;
+  client_info->auth_status = logicalPortInfo->client.logicalPortStatus;
+  client_info->authenticatedMethod = logicalPortInfo->client.authenticatedMethod;
+
+  memcpy(&client_info->serverState, logicalPortInfo->client.serverState, 
+         logicalPortInfo->client.serverStateLen);
+  client_info->serverStateLen = logicalPortInfo->client.serverStateLen;
+
+  memcpy(&client_info->serverClass, logicalPortInfo->client.serverClass, 
+         logicalPortInfo->client.serverClassLen);
+  client_info->serverClassLen = logicalPortInfo->client.serverClassLen;
+
+  client_info->sessionTimeoutRcvdFromRadius = logicalPortInfo->client.sessionTimeout;
+  if ( TRUE == authmgrCB->globalInfo->authmgrPortInfo[physPort].reAuthPeriodServer)
+  {
+    client_info->sessionTimeoutOper = logicalPortInfo->client.sessionTimeout;
+  }
+  else if ( TRUE == authmgrCB->globalInfo->authmgrPortInfo[physPort].reAuthEnabled)
+  {
+    client_info->sessionTimeoutOper = authmgrCB->globalInfo->authmgrPortInfo[physPort].reAuthPeriod;
+  }
+  else
+  {
+    client_info->sessionTimeoutOper = 0;
+  }
+
+  osapiStrncpySafe(client_info->userName, logicalPortInfo->client.authmgrUserName, strlen(logicalPortInfo->client.authmgrUserName)+1);
+
+  client_info->userNameLen = logicalPortInfo->client.authmgrUserNameLength;
+
+  client_info->terminationAction = logicalPortInfo->client.terminationAction;
+
+  client_info->vlanType = logicalPortInfo->client.vlanType;
+
+  client_info->vlanId = logicalPortInfo->client.vlanId;
+
+  client_info->sessionTime = logicalPortInfo->client.sessionTime;
+
+  client_info->lastAuthTime = logicalPortInfo->client.lastAuthTime;
+
+  client_info->backend_auth_method = logicalPortInfo->client.authMethod;
+}
+
+/*********************************************************************
+* @purpose  Set the authmgr global info
+*
+* @param    global_info @b{(output)) global info
+*
+* @returns  void
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+static
+void authmgrGlobalAuthInfoPopulate(pac_global_oper_table_t *global_info)
+{
+  memset(global_info, 0, sizeof(*global_info));
+  return;
+}
+
+/*********************************************************************
+* @purpose  Set the authmgr client authorization status
+*
+* @param    logicalPortInfo   @b{(input)) logical interface structure 
+* @param    portStatus @b{(input)) port authorization status setting
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+* @returns   ERROR
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientStatusSet (authmgrLogicalPortInfo_t * logicalPortInfo,
+                                 AUTHMGR_PORT_STATUS_t portStatus)
+{
+  uint32 physPort = 0, lPort = 0, type = 0;
+   AUTHMGR_PORT_STATUS_t currentStatus;
+  pac_authenticated_clients_oper_table_t client_info;
+  pac_global_oper_table_t global_info;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                       "%s:Setting the Logical port-%d to %s\n", __FUNCTION__,
+                       logicalPortInfo->key.keyNum,
+                       (portStatus ==
+                         AUTHMGR_PORT_STATUS_AUTHORIZED) ? "Authorize" :
+                       "Unauthorize");
+
+  /* Verify port status parm value */
+  if (portStatus !=  AUTHMGR_PORT_STATUS_AUTHORIZED
+      && portStatus !=  AUTHMGR_PORT_STATUS_UNAUTHORIZED)
+  {
+    return  FAILURE;
+  }
+
+  /*If setting to the same value, just return success */
+  if (portStatus == logicalPortInfo->client.logicalPortStatus)
+  {
+    /* check if the client is authenticated
+       as part of re-auth */
+    if (( AUTHMGR_PORT_STATUS_AUTHORIZED == portStatus) &&
+        (logicalPortInfo->protocol.reauth))
+    {
+      if (logicalPortInfo->client.sessionTimeout != 0)
+          logicalPortInfo->client.lastAuthTime = simSystemUpTimeGet ();
+    }
+
+    authmgrClientInfoPopulate(logicalPortInfo, &client_info);
+
+    PacAuthClientOperTblSet(physPort, logicalPortInfo->client.suppMacAddr, &client_info); 
+
+    authmgrGlobalAuthInfoPopulate(&global_info);
+
+    PacGlobalOperTblSet(&global_info); 
+
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                         "%s:%d Status already set \n", __FUNCTION__, __LINE__);
+    return  SUCCESS;
+  }
+
+  if ((( AUTHMGR_PORT_FORCE_UNAUTHORIZED ==
+        authmgrCB->globalInfo->authmgrPortInfo[physPort].portControlMode)
+       && ( AUTHMGR_PORT_STATUS_AUTHORIZED == portStatus))
+      ||
+      (( AUTHMGR_PORT_FORCE_AUTHORIZED ==
+        authmgrCB->globalInfo->authmgrPortInfo[physPort].portControlMode)
+       && ( AUTHMGR_PORT_STATUS_UNAUTHORIZED == portStatus)))
+  {
+    /* this combination is not allowed.. So just a sanity check */
+    return  FAILURE;
+  }
+
+  /* */
+
+  currentStatus = logicalPortInfo->client.logicalPortStatus;
+  logicalPortInfo->client.logicalPortStatus = portStatus;
+
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED == portStatus)
+  {
+    /* set the port status to authorized */
+    authmgrCB->globalInfo->authmgrPortInfo[physPort].authCount++;
+    if (authmgrCB->globalInfo->authmgrPortInfo[physPort].portControlMode !=
+         AUTHMGR_PORT_FORCE_AUTHORIZED)
+    {
+      authmgrCtlResetLogicalPortSessionData (logicalPortInfo);
+
+      authmgrClientInfoPopulate(logicalPortInfo, &client_info);
+
+      PacAuthClientOperTblSet(physPort, logicalPortInfo->client.suppMacAddr, &client_info); 
+
+      authmgrGlobalAuthInfoPopulate(&global_info);
+
+      PacGlobalOperTblSet(&global_info); 
+
+    }
+  }
+  else
+  {
+    if (authmgrCB->globalInfo->authmgrPortInfo[physPort].authCount > 0)
+    {
+      if ( AUTHMGR_PORT_STATUS_AUTHORIZED == currentStatus)
+      {
+        authmgrCB->globalInfo->authmgrPortInfo[physPort].authCount--;
+      }
+      if (authmgrCB->globalInfo->authmgrPortInfo[physPort].portControlMode !=
+           AUTHMGR_PORT_FORCE_UNAUTHORIZED)
+      {
+        PacAuthClientOperTblDel(physPort, logicalPortInfo->client.suppMacAddr); 
+
+        authmgrGlobalAuthInfoPopulate(&global_info);
+        PacGlobalOperTblSet(&global_info); 
+      }
+    }
+  }
+
+  if (((0 == authmgrCB->globalInfo->authmgrPortInfo[physPort].authCount) &&
+       ( AUTHMGR_PORT_STATUS_UNAUTHORIZED == portStatus)) ||
+      ((1 == authmgrCB->globalInfo->authmgrPortInfo[physPort].authCount) &&
+       ( AUTHMGR_PORT_STATUS_AUTHORIZED == portStatus)))
+
+  {
+    authmgrIhPhysicalPortStatusSet (physPort, portStatus);
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to  cleanup the client sw info
+*
+* @param    logicalPortInfo   @b{(input)) logical interface structure 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientSwInfoCleanup (authmgrLogicalPortInfo_t * logicalPortInfo)
+{
+  RC_t rc =  SUCCESS, rc1 =  SUCCESS, rc2 =  SUCCESS, rc3 =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+  uint32 physPort = 0, lPort = 0, type = 0;
+   enetMacAddr_t nullMacAddr;
+
+  memset (&nullMacAddr.addr, 0,  ENET_MAC_ADDR_LEN);
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  if (authmgrIntfIsConfigurable (physPort, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  if (0 != logicalPortInfo->authmgrMethodNoRespTimer.handle.timer)
+  {
+    rc =
+      authmgrTimerDestroy (authmgrCB->globalInfo->authmgrTimerCB,
+                           logicalPortInfo, AUTHMGR_METHOD_NO_RESP_TMR);
+  }
+
+  if (0 != logicalPortInfo->authmgrTimer.handle.timer)
+  {
+    rc =
+      authmgrTimerDestroy (authmgrCB->globalInfo->authmgrTimerCB,
+                           logicalPortInfo,
+                           logicalPortInfo->authmgrTimer.cxt.type);
+  }
+
+  /* send the accounting update */
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+      logicalPortInfo->client.logicalPortStatus)
+  {
+    /* notify the associated method to disconnected client */
+
+    if ( NULLPTR !=
+        authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.
+                                                authenticatedMethod].
+        eventNotifyFn)
+    {
+      rc =
+        authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.
+                                                authenticatedMethod].eventNotifyFn
+        (physPort, authmgrClientDisconnect,
+         &logicalPortInfo->client.suppMacAddr);
+    }
+  }
+  else
+  {
+    /* 802.1X/MAB clients may be in the process of authenticating.
+        de-authenticate 802.1X/MAB clients */
+
+    if ( NULLPTR !=
+        authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.currentMethod].
+        eventNotifyFn)
+    {
+      rc =
+        authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.currentMethod].eventNotifyFn
+        (physPort, authmgrClientDisconnect,
+         &logicalPortInfo->client.suppMacAddr);
+    }
+  }
+
+  /* set the client to un-authorized */
+
+  rc1 =
+    authmgrClientStatusSet (logicalPortInfo,
+                             AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+
+  if ( TRUE == logicalPortInfo->protocol.eapSuccess)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+                         "%s:Send EAP Success instead of Failure for data client on port [%s]\n\r",
+                         __FUNCTION__, authmgrIntfIfNameGet(physPort));
+
+    logicalPortInfo->protocol.eapSuccess =  FALSE;
+    authmgrTxCannedSuccess (logicalPortInfo->key.keyNum, AUTHMGR_LOGICAL_PORT);
+  }
+  else
+  {
+    authmgrTxCannedFail (logicalPortInfo->key.keyNum, AUTHMGR_LOGICAL_PORT);
+  }
+
+  /*remove supplicant mac address from Mac address Database */
+  /*input check */
+  if (0 !=
+      memcmp (logicalPortInfo->client.suppMacAddr.addr, nullMacAddr.addr,
+               ENET_MAC_ADDR_LEN))
+  {
+    rc2 = authmgrMacAddrInfoRemove (&(logicalPortInfo->client.suppMacAddr));
+  }
+
+  if (authmgrCB->globalInfo->authmgrPortInfo[physPort].numUsers > 0)
+  {
+    authmgrCB->globalInfo->authmgrPortInfo[physPort].numUsers--;
+  }
+
+  if (authmgrCB->globalInfo->authmgrPortInfo[physPort].numUsers == 0)
+  {
+    authmgrIhPhysicalPortStatusSet(physPort,  AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+  }
+
+  /* Deallocate memory for Clients */
+  rc3 = authmgrLogicalPortInfoDeAlloc (logicalPortInfo);
+
+  if (( SUCCESS != rc) ||
+      ( SUCCESS != rc1) || ( SUCCESS != rc2) || ( SUCCESS != rc3))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                         "%s:Unable to clean up client sw info on port-%s\n",
+                         __FUNCTION__, authmgrIntfIfNameGet(physPort));
+    return  FAILURE;
+  }
+  else
+  {
+    return  SUCCESS;
+  }
+}
+
+/*********************************************************************
+* @purpose function to  cleanup the client
+*
+* @param    logicalPortInfo   @b{(input)) logical interface structure 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientInfoCleanup (authmgrLogicalPortInfo_t * logicalPortInfo)
+{
+  RC_t rc =  SUCCESS, rc1 =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+  uint32 physPort = 0, lPort = 0, type = 0;
+   enetMacAddr_t zeroMac;
+   BOOL valid =  FALSE;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  nimGetIntfName(physPort,  ALIASNAME, ifName); 
+  if (authmgrIntfIsConfigurable (physPort, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+                       "%s:Deleting client authenticated with method %d on Physical port-%s VLAN type %s \n",
+                       __FUNCTION__, logicalPortInfo->client.authenticatedMethod, authmgrIntfIfNameGet(physPort),
+                       authmgrVlanTypeStringGet(logicalPortInfo->client.vlanType));
+   LOGF ( LOG_SEVERITY_NOTICE,
+           "Client %s is getting disconnected on port (%s) with VLAN type %s.",
+            AUTHMGR_PRINT_MAC_ADDR(logicalPortInfo->client.suppMacAddr.addr),
+            ifName, authmgrVlanTypeStringGet (logicalPortInfo->client.vlanType));
+
+  authmgrCB->oldInfo.vlanId = logicalPortInfo->client.vlanId;
+   
+  /* clean up the client info from hw */
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+      logicalPortInfo->client.logicalPortStatus)
+  {
+    rc = authmgrClientHwInfoCleanup (logicalPortInfo);
+  }
+  else
+  {
+    if (( SUCCESS == authmgrHostIsDynamicNodeAllocCheck
+         (authmgrCB->globalInfo->authmgrPortInfo[physPort].hostMode, &valid)) &&
+        ( TRUE == valid))
+    {
+      /* if exists unblock the client */
+      memset (&zeroMac, 0, sizeof ( enetMacAddr_t));
+
+      if ((0 != memcmp (zeroMac.addr, logicalPortInfo->client.suppMacAddr.addr,
+                         ENET_MAC_ADDR_LEN)) &&
+          (0 != logicalPortInfo->client.blockVlanId))
+      {
+        if (pacCfgIntfClientUnblock(ifName, logicalPortInfo->client.suppMacAddr.addr, 
+                                    logicalPortInfo->client.blockVlanId) !=  TRUE)
+        {
+           LOGF ( LOG_SEVERITY_ERROR,
+                   "Unable to block port %s", ifName);
+          rc1 =  FAILURE;
+        }
+
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+          "%s, %d,Enabling the settings for logicalInterface %d to receive further packets to CPU\n",
+          __func__, __LINE__, logicalPortInfo->key.keyNum);
+
+        logicalPortInfo->client.dataBlocked =  FALSE;
+
+        if ( SUCCESS != rc1)
+        {
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                               "%s:%d unable to delete client on "
+                               "port %d logicalPort %d, type %d vlan %d \n",
+                               __FUNCTION__, __LINE__, physPort, logicalPortInfo->key.keyNum,
+                               type, logicalPortInfo->client.vlanId);
+        }
+      }
+    }
+    else if ( FALSE == valid)
+    {
+      /* check if any blocked un-auth clients 
+         are present */
+      if (0 != logicalPortInfo->client.blockVlanId)
+      {
+        /* if exists unblock the client */
+        memset (&zeroMac, 0, sizeof ( enetMacAddr_t));
+
+        if ((0 != memcmp (zeroMac.addr, logicalPortInfo->client.suppMacAddr.addr,
+                 ENET_MAC_ADDR_LEN)) &&
+            (0 != logicalPortInfo->client.blockVlanId))
+        {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+          "%s, %d,Enabling the settings for logicalInterface %d to receive further packets to CPU\n",
+          __func__, __LINE__, logicalPortInfo->key.keyNum);
+
+          logicalPortInfo->client.dataBlocked =  FALSE;
+
+          if ( SUCCESS != rc1)
+          {
+            AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                "%s:%d unable to delete client on "
+                "port %s logicalPort %d, type %d vlan %d \n",
+                __FUNCTION__, __LINE__, authmgrIntfIfNameGet(physPort), lPort,
+                type, logicalPortInfo->client.vlanId);
+          }
+        }
+      }
+    }
+  }
+
+  if ( SUCCESS == rc)
+  {
+    rc = authmgrClientSwInfoCleanup (logicalPortInfo);
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose function to  check and deAllocate the client
+*
+* @param    logicalPortInfo   @b{(input)) logical interface structure 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientDisconnectAction (authmgrLogicalPortInfo_t *
+                                       logicalPortInfo)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+  uint32 physPort = 0, lPort = 0, type = 0;
+   BOOL valid =  FALSE;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  if (authmgrIntfIsConfigurable (physPort, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  /* check if the client can be de-allocated */
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                       "checking if logicalInterface %d can be disconnected\n",
+                       logicalPortInfo->key.keyNum);
+
+  if ( TRUE != logicalPortInfo->protocol.heldTimerExpired)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                         "%s:Held time not expired for client on port -%s\n",
+                         __FUNCTION__, authmgrIntfIfNameGet(physPort));
+    return  FAILURE;
+  }
+
+  logicalPortInfo->protocol.heldTimerExpired =  FALSE;
+
+  if ( SUCCESS ==
+      authmgrHostIsDynamicNodeAllocCheck (authmgrCB->globalInfo->
+                                          authmgrPortInfo[physPort].hostMode,
+                                          &valid))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                         "logicalInterface %d is getting disconnected\n",
+                         logicalPortInfo->key.keyNum);
+    rc = authmgrClientInfoCleanup (logicalPortInfo);
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose utility function to check if the client client params needs cleanup 
+*          before  adding new params
+* @param logicalPortInfo
+* @param vlanId           
+* @param policyId 
+* @return  SUCCESS/ FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientInfoCleanupCheck (authmgrClientInfo_t * src,
+                                       authmgrClientInfo_t * dst)
+{
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (src);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (dst);
+
+  if ((src->vlanId == dst->vlanId) &&
+      ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+       src->logicalPortStatus))
+  {
+    return  SUCCESS;
+  }
+
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose function to perform client related actions if client auth is
+*          failure or timeout.
+*
+* @param logicalPortInfo  -- client logical port structure
+* @return  SUCCESS/ FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientFailTimeoutAction (authmgrLogicalPortInfo_t *
+                                        logicalPortInfo)
+{
+  uint32 physPort = 0, vlanId = 0;
+  RC_t rc =  SUCCESS;
+  authmgrClientInfo_t client;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+  memset(&client, 0 , sizeof(authmgrClientInfo_t));
+
+
+  nimGetIntfName(physPort,  ALIASNAME, ifName);
+
+
+  /* check for the allowed data clients */
+
+  client = logicalPortInfo->client;
+  client.vlanId = vlanId;
+
+  if ( SUCCESS ==
+      authmgrClientInfoCleanupCheck (&logicalPortInfo->client, &client))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                         "%s:Nothing changed for logicalPort num-%d\n ", 
+                         __FUNCTION__, logicalPortInfo->key.keyNum);
+    return  SUCCESS;
+  }
+
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+      logicalPortInfo->client.logicalPortStatus)
+  {
+    /* clean up previous data */
+    if ( SUCCESS != authmgrClientHwInfoCleanup (logicalPortInfo))
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                           "%s:Unable to cleanup client hw info logicalPort num-%d\n",
+                           __FUNCTION__, logicalPortInfo->key.keyNum);
+    }
+  }
+
+  return rc;
+}
+
+RC_t authmgrBlockFdbCleanup(authmgrLogicalPortInfo_t *logicalPortInfo)
+{
+  uint32 physPort = 0;
+  RC_t rc =  SUCCESS;
+   enetMacAddr_t zeroMac;
+   char8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  AUTHMGR_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+
+  /* if exists unblock the client */
+  memset (&zeroMac, 0, sizeof ( enetMacAddr_t));
+
+  if ((0 != memcmp (zeroMac.addr, logicalPortInfo->client.suppMacAddr.addr,
+           ENET_MAC_ADDR_LEN)) &&
+      (0 != logicalPortInfo->client.blockVlanId))
+  {
+    /* mac exists */
+    if (nimGetIntfName (physPort,  ALIASNAME, ifName) !=  SUCCESS)
+    {
+       LOGF ( LOG_SEVERITY_ERROR,
+               "Unable to get alias for intf %s", authmgrIntfIfNameGet(physPort));
+      return  FAILURE;
+    }
+
+    if ((pacCfgIntfClientUnblock(ifName, logicalPortInfo->client.suppMacAddr.addr, 
+                                      logicalPortInfo->client.blockVlanId)) !=  TRUE)
+    {
+       LOGF ( LOG_SEVERITY_ERROR,
+               "Unable to block port %s", ifName);
+      rc =  FAILURE;
+    }
+  }
+  return rc;
+}
+
+
+RC_t authmgrStaticFdbCleanup(authmgrLogicalPortInfo_t *logicalPortInfo)
+{
+  uint32 physPort = 0;
+  RC_t rc =  SUCCESS;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  AUTHMGR_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+
+  if (logicalPortInfo->client.attrCreateMask & (1<<(AUTHMGR_HW_ATTR_STATIC_FDB)))
+  {
+    rc = authmgrAuthenticatedClientDelete (physPort,
+        logicalPortInfo->client.
+        suppMacAddr,
+        authmgrCB->processInfo.vlanId);
+  }
+  logicalPortInfo->client.attrCreateMask &= ~(1<<(AUTHMGR_HW_ATTR_STATIC_FDB));
+
+  return rc;
+
+}
+
+/*************************************************************************
+* @purpose  utility function to get function map entry for the given event 
+*
+* @param    event  @b{(input)} event
+* @param    elem @b{(input)}  Pointer to map entry
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*************************************************************************/
+RC_t authmgrHwCleanupEventFnMapGet (uint32 event,
+                                       authmgrHwCleanupEventMap_t * elem)
+{
+  uint32 i = 0;
+  static authmgrHwCleanupEventMap_t authmgrHwCleanupEventMapTable[] = {
+    {AUTHMGR_HW_ATTR_STATIC_FDB, authmgrStaticFdbCleanup},
+    {AUTHMGR_HW_ATTR_BLOCK_FDB, authmgrBlockFdbCleanup},
+    {AUTHMGR_HW_ATTR_PVID,  NULLPTR}
+  };
+
+  for (i = 0;
+       i <
+       (sizeof (authmgrHwCleanupEventMapTable) / sizeof (authmgrHwCleanupEventMap_t));
+       i++)
+  {
+    if (event == authmgrHwCleanupEventMapTable[i].event)
+    {
+      *elem = authmgrHwCleanupEventMapTable[i];
+      return  SUCCESS;
+    }
+  }
+
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose utility function to check if the client ckpt params modified 
+* @param src
+* @param dst
+* @return  SUCCESS/ FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientHwAddFailPostHwCleanup (authmgrLogicalPortInfo_t *logicalPortInfo,
+                                             uint32 mask)
+{
+  uint32 i = 0;
+  authmgrHwCleanupEventMap_t entry;
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  for (i = 0; i < AUTHMGR_HW_ATTR_LAST; i++)
+  {
+    if (mask & (1<< i))
+    {
+      memset(&entry, 0, sizeof(authmgrHwCleanupEventMap_t));
+
+      authmgrHwCleanupEventFnMapGet(i, &entry);
+
+      if ( NULLPTR != entry.cleanupFn)
+      {
+        entry.cleanupFn(logicalPortInfo);
+      }
+    }
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to  cleanup the authenticated client sw info
+*
+* @param    logicalPortInfo   @b{(input)) logical interface structure 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAuthenticatedClientSwInfoCleanup (authmgrLogicalPortInfo_t * logicalPortInfo)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+  uint32 physPort = 0, lPort = 0, type = 0;
+   enetMacAddr_t macAddr;
+   uchar8 userName[AUTHMGR_USER_NAME_LEN] = {0};
+  uint32 userNameLength = 0;
+
+  memset(&macAddr, 0, sizeof( enetMacAddr_t));
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  if (authmgrIntfIsConfigurable (physPort, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  if (0 != logicalPortInfo->authmgrTimer.handle.timer)
+  {
+    rc =
+      authmgrTimerDestroy (authmgrCB->globalInfo->authmgrTimerCB,
+          logicalPortInfo,
+          logicalPortInfo->authmgrTimer.cxt.type);
+  }
+
+  /* send the accounting update */
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+      logicalPortInfo->client.logicalPortStatus)
+  {
+    /* notify the associated method to disconnected client */
+
+    if ( NULLPTR !=
+        authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.
+        authenticatedMethod].
+        eventNotifyFn)
+    {
+      rc =
+        authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.
+        authenticatedMethod].eventNotifyFn
+        (physPort, authmgrClientDisconnect,
+         &logicalPortInfo->client.suppMacAddr);
+    }
+  }
+
+  /* set the client to un-authorized */
+
+  rc =
+    authmgrClientStatusSet (logicalPortInfo,
+         AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+
+
+  if ( TRUE == logicalPortInfo->protocol.eapSuccess)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+        "%s:Send EAP Success instead of Failure for data client on port [%d]\n\r",
+        __FUNCTION__, physPort);
+
+    logicalPortInfo->protocol.eapSuccess =  FALSE;
+    authmgrTxCannedSuccess (logicalPortInfo->key.keyNum, AUTHMGR_LOGICAL_PORT);
+  }
+  else
+  {
+    authmgrTxCannedFail (logicalPortInfo->key.keyNum, AUTHMGR_LOGICAL_PORT);
+  }
+
+  memcpy(&macAddr, &logicalPortInfo->client.suppMacAddr, sizeof( enetMacAddr_t));
+
+  memset(&logicalPortInfo->protocol, 0, sizeof(authmgrProtocolInfo_t));
+  memset(&logicalPortInfo->client, 0, sizeof(authmgrClientInfo_t));
+  memcpy(&logicalPortInfo->client.suppMacAddr, &macAddr, sizeof( enetMacAddr_t));
+  memcpy(logicalPortInfo->client.authmgrUserName, userName, AUTHMGR_USER_NAME_LEN);
+  logicalPortInfo->client.authmgrUserNameLength = userNameLength;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to  cleanup the authenticated client
+*
+* @param    logicalPortInfo   @b{(input)) logical interface structure 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAuthenticatedClientCleanup (authmgrLogicalPortInfo_t * logicalPortInfo)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+  uint32 physPort = 0, lPort = 0, type = 0;
+   enetMacAddr_t clientMac;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  uint32 vlanId = 0;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  nimGetIntfName(physPort,  ALIASNAME, ifName); 
+  if (authmgrIntfIsConfigurable (physPort, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED !=
+      logicalPortInfo->client.logicalPortStatus)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+                       "%s:client is not in authorized state %d on Physical port-%s VLAN type %s \n",
+                       __FUNCTION__, logicalPortInfo->client.logicalPortStatus, ifName,
+                       authmgrVlanTypeStringGet(logicalPortInfo->client.vlanType));
+    /* return */
+    return  FAILURE;
+  }
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+                       "%s:Deleting client authenticated with method %d on Physical port-%s VLAN type %s \n",
+                       __FUNCTION__, logicalPortInfo->client.authenticatedMethod, ifName,
+                       authmgrVlanTypeStringGet(logicalPortInfo->client.vlanType));
+
+  memset (&clientMac, 0, sizeof ( enetMacAddr_t));
+  memcpy(&clientMac, &logicalPortInfo->client.suppMacAddr, sizeof ( enetMacAddr_t));
+
+  authmgrCB->oldInfo.vlanId = logicalPortInfo->client.vlanId;
+   
+  /* clean up the client info from hw */
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+      logicalPortInfo->client.logicalPortStatus)
+  {
+    rc = authmgrClientHwInfoCleanup (logicalPortInfo);
+
+    authmgrAuthenticatedClientSwInfoCleanup(logicalPortInfo);
+    logicalPortInfo->client.blockVlanId = vlanId;
+    logicalPortInfo->client.logicalPortStatus =  AUTHMGR_PORT_STATUS_UNAUTHORIZED;
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose function to  check and cleanup authenticated client's params
+*
+* @param    logicalPortInfo   @b{(input)) logical interface structure 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAuthenticatedClientCleanupAction (authmgrLogicalPortInfo_t *
+                                       logicalPortInfo)
+{
+  return authmgrAuthenticatedClientCleanup(logicalPortInfo);
+}
+
+
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_cnfgr.c b/src/sonic-pac/authmgr/mapping/auth_mgr_cnfgr.c
new file mode 100755
index 00000000000..759250e334b
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_cnfgr.c
@@ -0,0 +1,553 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_struct.h"
+#include "auth_mgr_debug.h"
+#include "auth_mgr_auth_method.h"
+#include "auth_mgr_ih.h"
+#include "auth_mgr_vlan_db.h"
+#include "osapi_sem.h"
+
+authmgrCB_t *authmgrCB =  NULLPTR;
+
+authmgrCnfgrState_t authmgrCnfgrState;
+authMgrVlanDbData_t *authmgrVlanStateDb; /* Vlan operational state cache. */
+authMgrVlanDbData_t *authmgrVlanCfgDb; /* Vlan configured state cache. */
+
+#define platAuthMgrMaxUsersGet()         (512)
+
+static uint32 platIntfMaxCountGet (void)
+{
+  return  MAX_INTERFACE_COUNT;
+}
+
+/*********************************************************************
+*
+* @purpose  System Initialization for authmgr component
+*
+* @param    none
+
+* @returns   SUCCESS, if success
+* @returns   FAILURE, if other failure
+*
+* @comments  none
+*
+* @end
+*********************************************************************/
+RC_t authmgrInit (void)
+{
+  /* invoke dependent libraries */
+
+  authmgrCB = osapiMalloc ( AUTHMGR_COMPONENT_ID, sizeof (authmgrCB_t));
+
+  if ( NULLPTR == authmgrCB)
+  {
+    return  FAILURE;
+  }
+
+  memset (authmgrCB, 0, sizeof (authmgrCB_t));
+
+  /*semaphore creation for task protection over the common data*/
+  authmgrCB->authmgrTaskSyncSema = osapiSemaCCreate( OSAPI_SEM_Q_FIFO, OSAPI_SEM_EMPTY);
+  if (authmgrCB->authmgrTaskSyncSema ==  NULL)
+  {
+     LOGF( LOG_SEVERITY_NOTICE,
+        "Unable to create authmgr task semaphore");
+    return  FAILURE;
+  }
+
+  authmgrCB->authmgrBulkQueue =
+    (void *) osapiMsgQueueCreate ("authmgrBulkQueue", AUTHMGR_MSG_COUNT,
+                                  (uint32) sizeof (authmgrBulkMsg_t));
+  if (authmgrCB->authmgrBulkQueue ==  NULLPTR)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "authmgrInit: Bulk msgQueue creation error.\n");
+    return  FAILURE;
+  }
+
+  authmgrCB->authmgrVlanEventQueue =
+    (void *) osapiMsgQueueCreate ("authmgrVlanEventQueue", AUTHMGR_VLAN_MSG_COUNT,
+                                  (uint32) sizeof (authmgrVlanMsg_t));
+  if (authmgrCB->authmgrVlanEventQueue ==  NULLPTR)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "authmgrInit: VLAN event msgQueue creation error.\n");
+    return  FAILURE;
+  }
+
+  authmgrCB->authmgrQueue =
+    (void *) osapiMsgQueueCreate ("authmgrQueue", AUTHMGR_MSG_COUNT,
+                                  (uint32) sizeof (authmgrMsg_t));
+  if (authmgrCB->authmgrQueue ==  NULLPTR)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "authmgrInit: msgQueue creation error.\n");
+    return  FAILURE;
+  }
+
+  if (authmgrStartTasks () !=  SUCCESS)
+  {
+    return  FAILURE;
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+*
+* @purpose  System Init Undo for authmgr component
+*
+* @param    none
+*
+* @comments  none
+*
+* @end
+*********************************************************************/
+void authmgrInitUndo ()
+{
+  if (authmgrCB->authmgrQueue !=  NULLPTR)
+  {
+    osapiMsgQueueDelete (authmgrCB->authmgrQueue);
+  }
+
+  if (authmgrCB->authmgrBulkQueue !=  NULLPTR)
+  {
+    osapiMsgQueueDelete (authmgrCB->authmgrBulkQueue);
+  }
+
+  if (authmgrCB->authmgrVlanEventQueue !=  NULLPTR)
+  {
+    osapiMsgQueueDelete (authmgrCB->authmgrVlanEventQueue);
+  }
+
+  if ( NULL != authmgrCB->authmgrTaskSyncSema)
+  {
+    (void)osapiSemaDelete(authmgrCB->authmgrTaskSyncSema);
+  }
+
+  if ( NULL != authmgrCB->authmgrSrvrTaskSyncSema)
+  {
+    (void)osapiSemaDelete(authmgrCB->authmgrSrvrTaskSyncSema);
+  }
+
+  (void) osapiRWLockDelete (authmgrCB->authmgrRWLock);
+  (void) osapiRWLockDelete (authmgrCB->authmgrCfgRWLock);
+
+
+  if (authmgrCB->authmgrTaskId != 0)
+  {
+    osapiTaskDelete (authmgrCB->authmgrTaskId);
+  }
+
+  if (authmgrCB->authmgrSrvrTaskId != 0)
+  {
+    osapiTaskDelete (authmgrCB->authmgrSrvrTaskId);
+  }
+
+  if ( NULLPTR != authmgrCB)
+  {
+    osapiFree ( AUTHMGR_COMPONENT_ID, authmgrCB);
+  }
+
+  authmgrCnfgrState = AUTHMGR_PHASE_INIT_0;
+}
+
+/*********************************************************************
+* @purpose  This function process the configurator control commands/request
+*           pair Init Phase 1.
+*
+* @param    none
+
+* @param    pReason   - @b{(output)}  Reason if  ERROR.
+*
+* @returns   SUCCESS - There were no errors. Response is available.
+*
+* @returns   ERROR   - There were errors. Reason code is available.
+*
+* @comments  The following are valid response:
+*            CNFGR_CMD_COMPLETE
+*
+* @commets  The following are valid error reason code:
+*            CNFGR_ERR_RC_FATAL
+*            CNFGR_ERR_RC_LACK_OF_RESOURCES
+*
+* @end
+*********************************************************************/
+RC_t authmgrCnfgrInitPhase1Process (void)
+{
+  RC_t authmgrRC, rc;
+  RC_t rc1 =  SUCCESS;
+  RC_t rc2 =  SUCCESS;
+  uint32 authmgrMaxTimerNodes;
+
+  authmgrRC =  SUCCESS;
+
+  printf("%s:%d\r\n", __FUNCTION__, __LINE__);
+
+  authmgrCB->globalInfo =
+    osapiMalloc ( AUTHMGR_COMPONENT_ID, sizeof (authmgrGlobalInfo_t));
+
+  if ( NULLPTR == authmgrCB->globalInfo)
+  {
+    authmgrRC =  ERROR;
+    return authmgrRC;
+  }
+
+  authmgrCB->globalInfo->authmgrCfg =
+    osapiMalloc ( AUTHMGR_COMPONENT_ID, sizeof (authmgrCfg_t));
+
+  authmgrCB->globalInfo->authmgrPortInfo =
+    osapiMalloc ( AUTHMGR_COMPONENT_ID,
+                 sizeof (authmgrPortInfo_t) *  AUTHMGR_INTF_MAX_COUNT);
+
+  rc = authmgrLogicalPortInfoDBInit (platAuthMgrMaxUsersGet ());
+
+  authmgrCB->globalInfo->authmgrPortSessionStats =
+    osapiMalloc ( AUTHMGR_COMPONENT_ID,
+                 (sizeof (authmgrPortSessionStats_t) *
+                  (platIntfMaxCountGet () + 1)));
+
+  authmgrCB->globalInfo->authmgrPortStats =
+    osapiMalloc ( AUTHMGR_COMPONENT_ID,
+                 sizeof (authmgrPortStats_t) * platIntfMaxCountGet ());
+
+  authmgrCB->globalInfo->authmgrMapTbl =
+    osapiMalloc ( AUTHMGR_COMPONENT_ID,
+                 sizeof (uint32) * platIntfMaxCountGet ());
+ 
+  authmgrVlanStateDb = osapiMalloc( AUTHMGR_COMPONENT_ID,
+                                   sizeof (authMgrVlanDbData_t));
+
+  authmgrVlanCfgDb = osapiMalloc( AUTHMGR_COMPONENT_ID,
+                                   sizeof (authMgrVlanDbData_t));
+
+  if (( NULLPTR == authmgrVlanStateDb) || ( NULLPTR == authmgrVlanCfgDb))
+  {
+    authmgrRC =  ERROR;
+    return authmgrRC;
+  }
+
+  /* initialize Mac address database */
+
+  rc = authmgrMacAddrInfoDBInit (platAuthMgrMaxUsersGet ());
+
+  /* Two timers per client; one for protocol and one for interim accounting.
+     30 seconds timer needed for voice clients are not accounted for presently. */
+  authmgrMaxTimerNodes = (2 * platAuthMgrMaxUsersGet());
+
+  /* Allocate buffer pool for App Timer */
+  if (bufferPoolInit
+      ( AUTHMGR_COMPONENT_ID, authmgrMaxTimerNodes,  APP_TMR_NODE_SIZE,
+       "AUTHMGR Timer Bufs",
+       &authmgrCB->globalInfo->authmgrAppTimerBufferPoolId) !=  SUCCESS)
+  {
+    authmgrRC =  ERROR;
+
+    return authmgrRC;
+  }
+
+  if ((authmgrCB->globalInfo->authmgrCfg ==  NULLPTR) ||
+      (authmgrCB->globalInfo->authmgrPortInfo ==  NULLPTR) ||
+      (rc ==  FAILURE) ||
+      (rc1 ==  FAILURE) ||
+      (rc2 ==  FAILURE) ||
+      (authmgrCB->globalInfo->authmgrPortStats ==  NULLPTR) ||
+      (authmgrCB->globalInfo->authmgrMapTbl ==  NULLPTR) ||
+      (authmgrCB->globalInfo->authmgrPortSessionStats ==  NULLPTR))
+  {
+    authmgrRC =  ERROR;
+
+    return authmgrRC;
+  }
+
+  /* Zero bitmasks to indicate no interfaces are enabled */
+  memset ((void *) authmgrCB->globalInfo->authmgrCfg, 0, sizeof (authmgrCfg_t));
+  memset ((void *) authmgrCB->globalInfo->authmgrPortInfo, 0,
+          sizeof (authmgrPortInfo_t) *  AUTHMGR_INTF_MAX_COUNT);
+  memset ((void *) authmgrCB->globalInfo->authmgrPortStats, 0,
+          sizeof (authmgrPortStats_t) * platIntfMaxCountGet ());
+  memset ((void *) authmgrCB->globalInfo->authmgrMapTbl, 0,
+          sizeof (uint32) * platIntfMaxCountGet ());
+  memset ((void *) authmgrCB->globalInfo->authmgrPortSessionStats, 0,
+          sizeof (authmgrPortSessionStats_t) * ( MAX_INTERFACE_COUNT + 1));
+
+  authmgrCnfgrState = AUTHMGR_PHASE_INIT_1;
+
+  printf("%s:%d\r\n", __FUNCTION__, __LINE__);
+
+  return authmgrRC;
+}
+
+/*********************************************************************
+* @purpose  This function process the configurator control commands/request
+*           pair Init Phase 2.
+*
+* @param    pResponse - @b{(output)}  Response if  SUCCESS.
+*
+* @param    pReason   - @b{(output)}  Reason if  ERROR.
+*
+* @returns   SUCCESS - There were no errors. Response is available.
+*
+* @returns   ERROR   - There were errors. Reason code is available.
+*
+* @comments  The following are valid response:
+*            CNFGR_CMD_COMPLETE
+*
+* @comments  The following are valid error reason code:
+*            CNFGR_ERR_RC_FATAL
+*            CNFGR_ERR_RC_LACK_OF_RESOURCES
+*
+* @end
+*********************************************************************/
+RC_t authmgrCnfgrInitPhase2Process (void)
+{
+  RC_t authmgrRC;
+  printf("%s:%d\r\n", __FUNCTION__, __LINE__);
+
+  authmgrRC =  SUCCESS;
+
+  authmgrCnfgrState = AUTHMGR_PHASE_INIT_2;
+  
+  if (nimRegisterIntfChange ( AUTHMGR_COMPONENT_ID, authmgrIntfChangeCallback,
+                             authmgrIntfStartupCallback, NIM_STARTUP_PRIO_AUTHMGR) 
+                                 !=  SUCCESS)
+  {
+    return  FAILURE;
+  }
+
+  if ( SUCCESS != authmgrEventCallbackRegister( AUTHMGR_METHOD_8021X,
+         NULL,  NULL,
+        authmgrDot1xEventSend, authmgrDot1xIntfAdminModeGet,
+         NULL))
+	 {
+    return  FAILURE;
+	 }
+
+
+  if ( SUCCESS != authmgrEventCallbackRegister( AUTHMGR_METHOD_MAB,
+         NULL,  NULL,
+        authmgrMabEventSend, authmgrMabIntfAdminModeGet,
+         NULL))
+	 {
+    return  FAILURE;
+	 }
+
+  return authmgrRC;
+}
+
+/*********************************************************************
+* @purpose  This function process the configurator control commands/request
+*           pair Init Phase 3.
+*
+* @param    pResponse - @b{(output)}  Response if  SUCCESS.
+*
+* @param    pReason   - @b{(output)}  Reason if  ERROR.
+*
+* @returns   SUCCESS - There were no errors. Response is available.
+*
+* @returns   ERROR   - There were errors. Reason code is available.
+*
+* @comments  The following are valid response:
+*            CNFGR_CMD_COMPLETE
+*
+* @comments  The following are valid error reason code:
+*            CNFGR_ERR_RC_FATAL
+*            CNFGR_ERR_RC_LACK_OF_RESOURCES
+*
+* @end
+*********************************************************************/
+RC_t authmgrCnfgrInitPhase3Process ( BOOL warmRestart)
+{
+  RC_t authmgrRC;
+
+  authmgrRC =  SUCCESS;
+  printf("%s:%d\r\n", __FUNCTION__, __LINE__);
+
+  authmgrBuildDefaultConfigData();
+
+  authmgrCnfgrState = AUTHMGR_PHASE_INIT_3;
+  if (authmgrCtlApplyConfigData () !=  SUCCESS)
+  {
+    authmgrRC =  ERROR;
+
+    return authmgrRC;
+  }
+  printf("%s:%d\r\n", __FUNCTION__, __LINE__);
+
+  return authmgrRC;
+}
+
+/*********************************************************************
+* @purpose  This function undoes authmgrCnfgrInitPhase1Process
+*
+* @param    none
+*
+* @returns  none
+*
+* @comments  none
+*
+* @end
+*********************************************************************/
+void authmgrCnfgrFiniPhase1Process ()
+{
+  if (authmgrCB->globalInfo->authmgrCfg !=  NULLPTR)
+  {
+    osapiFree ( AUTHMGR_COMPONENT_ID, authmgrCB->globalInfo->authmgrCfg);
+    authmgrCB->globalInfo->authmgrCfg =  NULLPTR;
+  }
+
+  if (authmgrCB->globalInfo->authmgrPortInfo !=  NULLPTR)
+  {
+    osapiFree ( AUTHMGR_COMPONENT_ID, authmgrCB->globalInfo->authmgrPortInfo);
+    authmgrCB->globalInfo->authmgrPortInfo =  NULLPTR;
+  }
+  authmgrLogicalPortInfoDBDeInit ();
+
+  if (authmgrCB->globalInfo->authmgrPortStats !=  NULLPTR)
+  {
+    osapiFree ( AUTHMGR_COMPONENT_ID,
+               authmgrCB->globalInfo->authmgrPortStats);
+    authmgrCB->globalInfo->authmgrPortStats =  NULLPTR;
+  }
+
+  if (authmgrCB->globalInfo->authmgrMapTbl !=  NULLPTR)
+  {
+    osapiFree ( AUTHMGR_COMPONENT_ID, authmgrCB->globalInfo->authmgrMapTbl);
+    authmgrCB->globalInfo->authmgrMapTbl =  NULLPTR;
+  }
+
+  authmgrMacAddrInfoDBDeInit ();
+
+  authmgrInitUndo ();
+
+  if (authmgrCB->globalInfo !=  NULLPTR)
+  {
+    osapiFree ( AUTHMGR_COMPONENT_ID, authmgrCB->globalInfo);
+    authmgrCB->globalInfo =  NULLPTR;
+  }
+
+  authmgrCnfgrState = AUTHMGR_PHASE_INIT_0;
+}
+
+/*********************************************************************
+* @purpose  This function undoes authmgrCnfgrInitPhase2Process
+*
+* @param    none
+*
+* @returns  none
+*
+* @comments  none
+*
+* @end
+*********************************************************************/
+void authmgrCnfgrFiniPhase3Process ()
+{
+   CNFGR_RESPONSE_t response;
+   CNFGR_ERR_RC_t reason;
+
+  /* this func will place authmgrCnfgrState to WMU */
+  authmgrCnfgrUconfigPhase2 (&response, &reason);
+}
+
+/*********************************************************************
+* @purpose  This function process the configurator control commands/request
+*           pair as a NOOP.
+*
+* @param    pResponse - @b{(output)}  Response always command complete.
+*
+* @param    pReason   - @b{(output)}  Always 0
+*
+* @returns   SUCCESS - Always return this value. onse is available.
+*
+*
+* @comments  The following are valid response:
+*            CNFGR_CMD_COMPLETE
+*
+* @comments  The following are valid error reason code:
+*           None.
+*
+* @end
+*********************************************************************/
+RC_t authmgrCnfgrNoopProccess ( CNFGR_RESPONSE_t * pResponse,
+                                   CNFGR_ERR_RC_t * pReason)
+{
+  RC_t authmgrRC =  SUCCESS;
+
+  /* Return Value to caller */
+  *pResponse =  CNFGR_CMD_COMPLETE;
+  *pReason = 0;
+  return authmgrRC;
+}
+
+/*********************************************************************
+* @purpose  This function process the configurator control commands/request
+*           pair Unconfigure Phase 2.
+*
+* @param    pResponse - @b{(output)}  Response if  SUCCESS.
+*
+* @param    pReason   - @b{(output)}  Reason if  ERROR.
+*
+* @returns   SUCCESS - There were no errors. Response is available.
+*
+* @returns   ERROR   - There were errors. Reason code is available.
+*
+* @comments  The following are valid response:
+*            CNFGR_CMD_COMPLETE
+*
+* @comments  The following are valid error reason code:
+*            CNFGR_ERR_RC_FATAL
+*
+* @end
+*********************************************************************/
+
+RC_t authmgrCnfgrUconfigPhase2 ( CNFGR_RESPONSE_t * pResponse,
+                                    CNFGR_ERR_RC_t * pReason)
+{
+  RC_t authmgrRC;
+
+  *pResponse =  CNFGR_CMD_COMPLETE;
+  *pReason = 0;
+  authmgrRC =  SUCCESS;
+
+  memset (authmgrCB->globalInfo->authmgrCfg, 0, sizeof (authmgrCfg_t));
+
+  authmgrCnfgrState = AUTHMGR_PHASE_WMU;
+
+  return authmgrRC;
+}
+
+/***************************************************************************
+* @purpose  This function process the configurator control commands/request
+*           pair TERMINATE.
+*
+* @param    pCmdData - @b{(input)} command data.
+*
+* @returns  none.
+*
+*
+* @notes
+*
+* @end
+***************************************************************************/
+void authmgrCnfgrTerminateProcess ( CNFGR_CMD_DATA_t * pCmdData)
+{
+
+}
+
+
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_control.c b/src/sonic-pac/authmgr/mapping/auth_mgr_control.c
new file mode 100644
index 00000000000..28f56d431bf
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_control.c
@@ -0,0 +1,5503 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define  MAC_EAPOL_PDU
+
+#include "auth_mgr_include.h"
+#include "osapi_sem.h"
+#include "auth_mgr_exports.h"
+#include "auth_mgr_client.h"
+#include "auth_mgr_timer.h"
+#include "auth_mgr_struct.h"
+#include "auth_mgr_auth_method.h"
+#include "pac_cfg_authmgr.h"
+#include "auth_mgr_vlan_db.h"
+#include "pacoper_common.h"
+
+extern authmgrCB_t *authmgrCB;
+
+extern authmgrCnfgrState_t authmgrCnfgrState;
+
+extern authmgrLogicalPortInfo_t processInfo;
+
+RC_t authmgrClientHwInfoCleanupAndReadd(authmgrLogicalPortInfo_t *logicalPortInfo,
+                                           authmgrClientInfo_t *processInfo);
+
+RC_t authmgrAddMac (uint32 lIntIfNum);
+
+extern int osapi_proc_set (const char *path, const char *value);
+
+#define attributeCmp(a, b) \
+  if (strlen(a) !=  0) \
+  { \
+    if (memcmp(b, a, sizeof(b)) ==  0) \
+    { \
+      entryFound =  TRUE; \
+    } \
+    else \
+    { \
+      entryFound =  FALSE; \
+      break; \
+    } \
+  }
+
+#define attributeIntCmp(a, b) \
+  if (a) \
+  { \
+    if (a == b) \
+    { \
+      entryFound =  TRUE; \
+    } \
+    else \
+    { \
+      entryFound =  FALSE; \
+      break; \
+    } \
+  }
+
+/*********************************************************************
+* @purpose function to compare auth mgr lists
+*
+* @param list1 auth mgr list1
+* @param list2 auth mgr list2
+* @return  TRUE or  FALSE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+ BOOL authmgrListArrayCompare ( AUTHMGR_METHOD_t * list1,
+                                  AUTHMGR_METHOD_t * list2,
+                                 uint32 len)
+{
+  if (0 != memcmp (list1, list2, len))
+  {
+    return  FALSE;
+  }
+
+  return  TRUE;
+}
+
+/*********************************************************************
+* @purpose  Initialize authmgr tasks and data
+*
+* @param   none 
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrStartTasks ()
+{
+  printf("%s:%d\r\n", __FUNCTION__, __LINE__);
+
+  if (osapiRWLockCreate (&authmgrCB->authmgrRWLock,
+                         OSAPI_RWLOCK_Q_PRIORITY) ==  FAILURE)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Error creating authmgrRWlock semaphore \n");
+    return  FAILURE;
+  }
+
+  if (osapiRWLockCreate (&authmgrCB->authmgrCfgRWLock,
+                         OSAPI_RWLOCK_Q_PRIORITY) ==  FAILURE)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Error creating authmgrCfgRWlock semaphore \n");
+    return  FAILURE;
+  }
+
+  /* create authmgrTask - to service authmgr message queue */
+  authmgrCB->authmgrTaskId =
+    osapiTaskCreate ("authmgrTask", (void *) authmgrTask, 0, 0,
+                     2 * authmgrSidDefaultStackSize (),
+                     authmgrSidDefaultTaskPriority (),
+                     authmgrSidDefaultTaskSlice ());
+
+  if (authmgrCB->authmgrTaskId == 0)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Failed to create authmgr task.\n");
+    return  FAILURE;
+  }
+
+  if (osapiWaitForTaskInit ( AUTHMGR_TASK_SYNC,  WAIT_FOREVER) !=
+       SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Unable to initialize authmgr task.\n");
+    return  FAILURE;
+  }
+
+  /* create authmgrSrvrTask - to service authmgr message queue */
+  authmgrCB->authmgrSrvrTaskId =
+    osapiTaskCreate ("authmgrSrvrTask", (void *) authmgrSrvrTask, 0, 0,
+                     2 * authmgrSidDefaultStackSize (),
+                     authmgrSidDefaultTaskPriority (),
+                     authmgrSidDefaultTaskSlice ());
+
+  if (authmgrCB->authmgrSrvrTaskId == 0)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Failed to create authmgr task.\n");
+    return  FAILURE;
+  }
+
+  if (osapiWaitForTaskInit ( AUTHMGR_SRVR_TASK_SYNC,  WAIT_FOREVER) !=
+       SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Unable to initialize authmgr srvr task.\n");
+    return  FAILURE;
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  authmgr task which serves the request queue
+*
+* @param    none
+*
+* @returns  void
+*
+* @comments User-interface writes and  all are serviced off
+*           of the authmgrQueue
+*
+* @end
+*********************************************************************/
+void authmgrTask ()
+{
+  authmgrMsg_t msg;
+  authmgrBulkMsg_t bulkMsg;
+  authmgrVlanMsg_t vlanMsg;
+
+  printf("%s:%d\r\n", __FUNCTION__, __LINE__);
+
+  (void) osapiTaskInitDone ( AUTHMGR_TASK_SYNC);
+
+  /* allocate the required data structures */
+  authmgrCnfgrInitPhase1Process();
+  
+  /* do inter component registration */
+  authmgrCnfgrInitPhase2Process();
+
+  authmgrCnfgrInitPhase3Process( FALSE);
+  
+  for (;;)
+  {
+    /* Since we are reading from multiple queues, we cannot wait forever
+     * on the message receive from each queue. Rather than sleep between
+     * queue reads, use a semaphore to indicate whether any queue has
+     * data. Wait until data is available. */
+
+    if (osapiSemaTake(authmgrCB->authmgrTaskSyncSema,  WAIT_FOREVER) !=  SUCCESS)
+    {
+       LOGF( LOG_SEVERITY_ERROR,
+          "Unable to acquire AUTHMGR message queue semaphore.");
+      continue;
+    }
+
+    memset(&authmgrCB->processInfo, 0, sizeof(authmgrClientInfo_t));
+    memset(&authmgrCB->oldInfo, 0, sizeof(authmgrClientInfo_t));
+
+
+    if (osapiMessageReceive
+        (authmgrCB->authmgrVlanEventQueue, (void *) &vlanMsg,
+         (uint32) sizeof (authmgrVlanMsg_t),  NO_WAIT) ==  SUCCESS)
+    {
+      (void) authmgrVlanDispatchCmd (&vlanMsg);
+    }
+    else if (osapiMessageReceive
+        (authmgrCB->authmgrQueue, (void *) &msg,
+         (uint32) sizeof (authmgrMsg_t),  NO_WAIT) ==  SUCCESS)
+    {
+      (void) authmgrDispatchCmd (&msg);
+    }
+    else if (osapiMessageReceive
+        (authmgrCB->authmgrBulkQueue, (void *) &bulkMsg,
+         (uint32) sizeof (authmgrBulkMsg_t),  NO_WAIT) ==  SUCCESS)
+    {
+      (void) authmgrBulkDispatchCmd (&bulkMsg);
+    }
+  }
+}
+
+/*********************************************************************
+* @purpose  authmgr srvr task which serves the request queue
+*
+* @param    none
+*
+* @returns  void
+*
+* @comments external applications are serviced off
+*           of the authmgrQueue
+*
+* @end
+*********************************************************************/
+void authmgrSrvrTask ()
+{
+  printf("%s:%d\r\n", __FUNCTION__, __LINE__);
+
+  (void) osapiTaskInitDone ( AUTHMGR_SRVR_TASK_SYNC);
+
+  handle_async_resp_data (&authmgrCB->listen_sock);
+  return;
+}
+
+/*********************************************************************
+* @purpose  Save the data in a message to a shared memory
+*
+* @param    *data   @b{(input)} pointer to data
+* @param    *msg   @b{(input)} authmgr message 
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments Once the message is serviced, this variable size data will
+*           be retrieved
+*
+* @end
+*********************************************************************/
+RC_t authmgrFillMsg (void *data, authmgrMsg_t * msg)
+{
+  switch (msg->event)
+  {
+
+  case authmgrMgmtAdminModeEnable:
+  case authmgrMgmtAdminModeDisable:
+  case authmgrMethodOrderModify:
+  case authmgrMethodPriorityModify:
+    break; 
+
+    /* events originating from UI */
+  case authmgrMgmtPortInitializeSet:
+  case authmgrMgmtLogicalPortInitializeSet:
+  case authmgrMgmtPortReauthenticateSet:
+  case authmgrMgmtLogicalPortReauthenticateSet:
+  case authmgrMgmtPortControlModeSet:
+  case authmgrMgmtHostControlModeSet:
+  case authmgrMgmtPortQuietPeriodSet:
+  case authmgrMgmtPortInactivePeriodSet:
+  case authmgrMgmtPortReAuthEnabledSet:
+  case authmgrMgmtPortMaxUsersSet:
+  case authmgrPaeCapabilitiesEvent:
+  case authmgrViolationModeSet:
+  case authmgrCtlPortInfoReset:
+    /* add to queue uint32 size */
+    memcpy (&msg->data.msgParm, data, sizeof (uint32));
+    break;
+
+  case authmgrMgmtPortReAuthPeriodSet:
+    memcpy (&msg->data.timePeriod, data, sizeof (authmgrMgmtTimePeriod_t));
+    break;
+
+  case authmgrIntfChange:
+    /* add to queue a NIM correlator */
+    memcpy (&msg->data.authmgrIntfChangeParms, data,
+            sizeof (authmgrIntfChangeParms_t));
+    break;
+
+  case authmgrIntfStartup:
+    /* add to queue a NIM correlator */
+    memcpy (&msg->data.startupPhase, data, sizeof (NIM_STARTUP_PHASE_t));
+    break;
+
+  case authmgrClientTimeout:
+  case authmgrDelDuplicateEntry:
+  case authmgrAddMacInMacDB:
+  case authmgrTimeTick:
+  case authmgrAuthenticationStart:
+  case authmgrClientCleanup:
+    break;                      /* NULL data, proceed */
+
+  case authmgrAuthMethodCallbackEvent:
+    memcpy (&msg->data.authParams, data, sizeof (authmgrAuthRespParams_t));
+    break;
+
+  case authmgrAaaInfoReceived:
+    /* add to queue a char pointer */
+    memcpy (&msg->data.authmgrAaaMsg, data, sizeof (authmgrAaaMsg_t));
+    break;
+
+  default:
+    /* unmatched event */
+    return  FAILURE;
+  }                             /* switch */
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Save the bulk data in a message to a shared memory
+*
+* @param    *data   @b{(input)} pointer to data
+* @param    *msg   @b{(input)} authmgr message 
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments Once the message is serviced, this variable size data will
+*           be retrieved
+*
+* @end
+*********************************************************************/
+RC_t authmgrBulkFillMsg (void *data, authmgrBulkMsg_t * msg)
+{
+  switch (msg->event)
+  {
+    case authmgrUnauthAddrCallBackEvent:
+      memcpy (&msg->data.unauthParms, data,
+              sizeof (authmgrUnauthCallbackParms_t));
+      break;
+
+    default:
+      /* unmatched event */
+      return  FAILURE;
+  }                             /* switch */
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Save the VLAN data in a message to a shared memory
+*
+* @param    *data   @b{(input)} pointer to data
+* @param    *msg   @b{(input)} authmgr message 
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments Once the message is serviced, this variable size data will
+*           be retrieved
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanFillMsg (void *data, authmgrVlanMsg_t * msg)
+{
+  switch (msg->event)
+  {
+    case authmgrVlanDeleteEvent:
+    case authmgrVlanAddEvent:
+    case authmgrVlanAddPortEvent:
+    case authmgrVlanDeletePortEvent:
+    case authmgrVlanPvidChangeEvent:
+    case authmgrVlanConfDeleteEvent:
+    case authmgrVlanConfPortDeleteEvent:
+      memcpy (&msg->data.vlanData, data, sizeof (dot1qNotifyData_t));
+      break;
+
+    default:
+      /* unmatched event */
+      return  FAILURE;
+  }                             /* switch */
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Send a command to authmgr queue
+*
+* @param    event      @b{(input)} event type
+* @param    intIfNum   @b{(input)} internal interface number
+* @param    *data      @b{(input)} pointer to data
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments Command is queued for service
+*
+* @end
+*********************************************************************/
+RC_t authmgrIssueCmd (uint32 event, uint32 intIfNum, void *data)
+{
+  authmgrMsg_t msg;
+  authmgrBulkMsg_t bulkMsg;
+  authmgrVlanMsg_t vlanMsg;
+
+  RC_t rc;
+
+  memset(&msg, 0, sizeof(authmgrMsg_t));
+  memset(&bulkMsg, 0, sizeof(authmgrBulkMsg_t));
+  memset(&vlanMsg, 0, sizeof(authmgrVlanMsg_t));
+
+
+  /* send message */
+  if (event == authmgrUnauthAddrCallBackEvent)
+  {
+    if (data !=  NULLPTR)
+    {
+      bulkMsg.event = event;
+      bulkMsg.intf = intIfNum;
+
+      (void) authmgrBulkFillMsg (data, &bulkMsg);
+    }
+
+    rc =
+      osapiMessageSend (authmgrCB->authmgrBulkQueue, &bulkMsg,
+          (uint32) sizeof (authmgrBulkMsg_t),  NO_WAIT,
+           MSG_PRIORITY_NORM);
+  }
+  else if ((event == authmgrVlanDeleteEvent) ||
+           (event == authmgrVlanAddEvent) ||
+           (event == authmgrVlanAddPortEvent) ||
+           (event == authmgrVlanDeletePortEvent) ||
+           (event == authmgrVlanPvidChangeEvent) ||
+           (event == authmgrVlanConfDeleteEvent) ||
+           (event == authmgrVlanConfPortDeleteEvent))
+  {
+    if (data !=  NULLPTR)
+    {
+      vlanMsg.event = event;
+      vlanMsg.intf = intIfNum;
+
+      (void) authmgrVlanFillMsg (data, &vlanMsg);
+    }
+
+    rc =
+      osapiMessageSend (authmgrCB->authmgrVlanEventQueue, &vlanMsg,
+          (uint32) sizeof (authmgrVlanMsg_t),  NO_WAIT,
+           MSG_PRIORITY_NORM);
+  }
+  else
+  {  
+    msg.event = event;
+    msg.intf = intIfNum;
+    if (data !=  NULLPTR)
+    {
+      (void) authmgrFillMsg (data, &msg);
+    }
+
+    rc =
+      osapiMessageSend (authmgrCB->authmgrQueue, &msg,
+          (uint32) sizeof (authmgrMsg_t),  NO_WAIT,
+           MSG_PRIORITY_NORM);
+  }
+
+  rc = osapiSemaGive(authmgrCB->authmgrTaskSyncSema);
+  if(rc !=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_NOTICE,
+        "Failed to give msgQueue to Authmgr task sync semaphore.\n");
+  }
+
+
+  if (rc !=  SUCCESS)
+  {
+    AUTHMGR_ERROR_SEVERE
+      ("Failed to send to authmgrQueue! Event: %u, interface: %s\n", event,
+       authmgrIntfIfNameGet(intIfNum));
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Route the event to a handling function and grab the parms
+*
+* @param    msg   @b{(input)} authmgr message 
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrDispatchCmd (authmgrMsg_t * msg)
+{
+  RC_t rc =  FAILURE;
+
+  (void) osapiWriteLockTake (authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+
+  memset(&authmgrCB->oldInfo, 0, sizeof(authmgrClientInfo_t));
+
+  switch (msg->event)
+  {
+  case authmgrIntfChange:
+    rc = authmgrIhProcessIntfChange (msg->intf,
+                                     msg->data.authmgrIntfChangeParms.intfEvent,
+                                     msg->data.authmgrIntfChangeParms.
+                                     nimCorrelator);
+    break;
+
+  case authmgrIntfStartup:
+    rc = authmgrIhProcessIntfStartup (msg->data.startupPhase);
+    break;
+
+  case authmgrTimeTick:
+    rc = authmgrTimerAction ();
+    break;
+
+  case authmgrMgmtAdminModeEnable:
+    rc = authmgrCtlAdminModeEnable();
+    break;
+
+  case authmgrMgmtAdminModeDisable:
+    rc = authmgrCtlAdminModeDisable();
+    break;
+
+  case authmgrMgmtPortInitializeSet:
+    rc = authmgrCtlPortInitializeSet (msg->intf, msg->data.msgParm);
+    break;
+
+  case authmgrMgmtLogicalPortInitializeSet:
+    rc = authmgrCtlLogicalPortInitializeSet (msg->intf);
+    break;
+
+  case authmgrMgmtPortReauthenticateSet:
+    rc = authmgrCtlPortReauthenticateSet (msg->intf, msg->data.msgParm);
+    break;
+
+  case authmgrMgmtLogicalPortReauthenticateSet:
+    rc = authmgrCtlLogicalPortReauthenticateSet (msg->intf, msg->data.msgParm);
+    break;
+
+  case authmgrMgmtPortControlModeSet:
+    rc = authmgrCtlPortControlModeSet (msg->intf, msg->data.msgParm);
+    break;
+
+  case authmgrPaeCapabilitiesEvent:
+    rc = authmgrPaeCapabilitiesEventProcess (msg->intf, msg->data.msgParm);
+    break;
+
+  case authmgrViolationModeSet:
+    rc = authmgrViolationModeSetAction (msg->intf, msg->data.msgParm);
+    break;
+
+  case authmgrMgmtHostControlModeSet:
+    rc = authmgrPortCtrlHostModeSet (msg->intf, msg->data.msgParm);
+    break;
+
+  case authmgrMgmtPortQuietPeriodSet:
+    rc = authmgrCtlPortQuietPeriodSet (msg->intf, msg->data.msgParm);
+    break;
+
+  case authmgrMgmtPortReAuthPeriodSet:
+    rc = authmgrCtlPortReAuthPeriodSet (msg->intf, &msg->data.timePeriod);
+    break;
+
+  case authmgrMgmtPortReAuthEnabledSet:
+    rc = authmgrCtlPortReAuthEnabledSet (msg->intf, msg->data.msgParm);
+    break;
+
+  case authmgrMgmtPortStatsClear:
+    rc = authmgrCtlPortStatsClear (msg->intf);
+    break;
+
+  case authmgrMgmtApplyConfigData:
+    rc = authmgrCtlApplyConfigData ();
+    break;
+
+  case authmgrMgmtApplyPortConfigData:
+    rc = authmgrCtlApplyPortConfigData (msg->intf);
+    break;
+
+  case authmgrMgmtPortMaxUsersSet:
+    rc = authmgrCtlPortMaxUsersSet (msg->intf, msg->data.msgParm);
+    break;
+
+  case authmgrAuthMethodCallbackEvent:
+    rc = authmgrClientCallbackEventProcess (msg->intf, &msg->data.authParams);
+    break;
+
+  case authmgrClientTimeout:
+  case authmgrDelDuplicateEntry:
+    rc = authmgrCtlLogicalPortClientTimeout (msg->intf);
+    break;
+
+  case authmgrClientCleanup:
+    rc = authmgrCtlClientCleanup (msg->intf);
+    break;
+
+  case authmgrAddMacInMacDB:
+    rc = authmgrAddMac (msg->intf);
+    break;
+
+  case authmgrAaaInfoReceived:
+    rc = authmgrRadiusResponseProcess (msg->intf,
+                                       msg->data.authmgrAaaMsg.status,
+                                       msg->data.authmgrAaaMsg.pResponse,
+                                       msg->data.authmgrAaaMsg.respLen);
+    break;
+
+  case authmgrAuthenticationStart:
+    authmgrAuthenticationInitiate (msg->intf);
+    break;
+
+  case authmgrMethodOrderModify:
+  case authmgrMethodPriorityModify:
+    rc = authmgrMethodModifyAction (msg->intf);
+    break;
+
+  case authmgrCtlPortInfoReset:
+    rc = authmgrCtlPortReset(msg->intf, msg->data.msgParm);
+    break;
+
+  default:
+    rc =  FAILURE;
+  }
+
+  (void) osapiWriteLockGive (authmgrCB->authmgrRWLock);
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Route the event to a handling function and grab the parms
+*
+* @param    msg   @b{(input)} authmgr message 
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrBulkDispatchCmd (authmgrBulkMsg_t * msg)
+{
+  RC_t rc =  FAILURE;
+
+  (void) osapiWriteLockTake (authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+
+  switch (msg->event)
+  {
+    case authmgrUnauthAddrCallBackEvent:
+      rc =
+        authmgrCtlPortUnauthAddrCallbackProcess (msg->intf,
+                                                 msg->data.unauthParms.macAddr,
+                                                 msg->data.unauthParms.vlanId);
+      break;
+    default:
+      rc =  FAILURE;
+  }
+
+  (void) osapiWriteLockGive (authmgrCB->authmgrRWLock);
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Route the event to a handling function and grab the parms
+*
+* @param    msg   @b{(input)} authmgr message 
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanDispatchCmd (authmgrVlanMsg_t * msg)
+{
+  RC_t rc =  FAILURE;
+
+  (void) osapiWriteLockTake (authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+
+  switch (msg->event)
+  {
+    case authmgrVlanDeleteEvent:
+    case authmgrVlanAddEvent:
+    case authmgrVlanAddPortEvent:
+    case authmgrVlanDeletePortEvent:
+    case authmgrVlanPvidChangeEvent:
+    case authmgrVlanConfDeleteEvent:
+    case authmgrVlanConfPortDeleteEvent:
+      authmgrVlanChangeProcess (msg->event, msg->intf, &(msg->data.vlanData));
+      rc =  SUCCESS;
+    break;
+
+    default:
+      rc =  FAILURE;
+  }
+
+  (void) osapiWriteLockGive (authmgrCB->authmgrRWLock);
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Add supplicant MAC in MAC database
+*
+* @param    lIntIfNum   @b{(input)} logical interface number 
+*                                   on which client is received
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @end
+*********************************************************************/
+
+RC_t authmgrAddMac (uint32 lIntIfNum)
+{
+  authmgrLogicalPortInfo_t *entry =  NULLPTR;
+  RC_t rc =  FAILURE;
+
+  entry = authmgrLogicalPortInfoGet (lIntIfNum);
+  if (entry !=  NULLPTR)
+  {
+    rc = authmgrMacAddrInfoAdd (&(entry->client.suppMacAddr), lIntIfNum);
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Check if client is to be processed considering logical port
+*           use and availability using dynamic allocation
+*
+* @param    *srcMac      @b{(input)} supplicant mac address
+* @param    intIfNum     @b{(input)} physical interface
+* @param    existing_node  @b{(output)} is already existing node
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments Command is queued for service
+*
+* @end
+*********************************************************************/
+RC_t authmgrDynamicUserPduMapCheck (uint32 intIfNum,  char8 * srcMac,
+                                       uint32 * lIntIfNum,
+                                        BOOL * existing_node)
+{
+  uint32 lIndex;
+  authmgrPortCfg_t *pCfg;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  uint32 physPort = 0, lPort = 0, type = 0;
+
+#ifdef AUTHMGR_MAC_MOVE_ON
+   enetMacAddr_t macAddr;
+#endif
+
+  *existing_node =  FALSE;
+
+  /* Get the port mode */
+  if ( TRUE != authmgrIntfIsConfigurable (intIfNum, &pCfg))
+  {
+    return  FAILURE;
+  }
+
+  if ( AUTHMGR_PORT_AUTO == pCfg->portControlMode)
+  {
+    /* loop based on the intIfNum */
+    lIndex = AUTHMGR_LOGICAL_PORT_ITERATE;
+    while ( NULLPTR !=
+           (logicalPortInfo =
+            authmgrLogicalPortInfoGetNextNode (intIfNum, &lIndex)))
+    {
+      if (0 ==
+          memcmp (srcMac, logicalPortInfo->client.suppMacAddr.addr,
+                   MAC_ADDR_LEN))
+      {
+        *lIntIfNum = lIndex;
+        *existing_node =  TRUE;
+        return  SUCCESS;
+      }
+    }
+
+#ifdef AUTHMGR_MAC_MOVE_ON
+    memcpy (macAddr.addr, srcMac,  MAC_ADDR_LEN);
+    if ( SUCCESS == authmgrMacAddrInfoFind (&macAddr, lIntIfNum))
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, intIfNum,
+                           "\n%s:%d: Found the device : %s  on interface:%s \n",
+                           __FUNCTION__, __LINE__, AUTHMGR_PRINT_MAC_ADDR(srcMac),
+                           authmgrIntfIfNameGet(intIfNum));
+
+      if ( NULLPTR != authmgrLogicalPortInfoGet (*lIntIfNum))
+      {
+        /* get the key and unpack */
+        AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, *lIntIfNum);
+
+        if (physPort != intIfNum)
+        {
+           uchar8 ifNamel[ NIM_IF_ALIAS_SIZE + 1];
+
+          nimGetIntfName (physPort,  ALIASNAME, ifNamel);
+
+          /* Remove client from previous interface */
+          if ( SUCCESS != authmgrCtlLogicalPortClientTimeout(*lIntIfNum))
+          {
+             LOGF ( LOG_SEVERITY_DEBUG,
+                     "Duplicate client %s  detected on interface %s (intIfNum %d). Unable to remove.",
+                     AUTHMGR_PRINT_MAC_ADDR(srcMac), ifNamel, physPort);
+            return  FAILURE;
+          }
+          else
+          {
+             LOGF ( LOG_SEVERITY_DEBUG,
+                     "Duplicate client %s detected on interface %s (intIfNum %d) and removed.",
+                      AUTHMGR_PRINT_MAC_ADDR(srcMac), ifNamel, physPort);
+          }
+        }
+      }
+    }
+#endif
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].numUsers >=
+        authmgrCB->globalInfo->authmgrPortInfo[intIfNum].maxUsers)
+    {
+      return  FAILURE;
+    }
+
+    /* allocate a new logical port for this supplicant */
+    logicalPortInfo = authmgrLogicalPortInfoAlloc (intIfNum);
+
+    if (logicalPortInfo !=  NULLPTR)
+    {
+      authmgrLogicalPortInfoInit (logicalPortInfo->key.keyNum);
+
+      /* logicalPortInfo->inUse =  TRUE; */
+      *existing_node =  FALSE;
+      *lIntIfNum = logicalPortInfo->key.keyNum;
+
+      memcpy (logicalPortInfo->client.suppMacAddr.addr, srcMac,
+               MAC_ADDR_LEN);
+
+      /* add mac address to Mac Addr Database*/
+      if (authmgrAddMac(logicalPortInfo->key.keyNum) !=  SUCCESS)
+      {
+         LOGF ( LOG_SEVERITY_ERROR,
+            "Failed to add MAC entry %s"
+            " in MAC database for interface %s (intIfNum %d, logical port %d). Reason: Failed to send event authmgrAddMacInMacDB\n",
+            AUTHMGR_PRINT_MAC_ADDR(srcMac), authmgrIntfIfNameGet(intIfNum), intIfNum, logicalPortInfo->key.keyNum);
+        authmgrLogicalPortInfoDeAlloc (logicalPortInfo);
+        return  FAILURE;
+      }
+
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].numUsers++;
+      /*  authmgrCtlApplyLogicalPortConfigData(logicalPortInfo->key.keyNum); */
+      return  SUCCESS;
+    }
+  }
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose  Check if client is to be processed considering logical port
+*           use and availability
+*
+* @param    intIfNum     @b{(input)} physical interface
+* @param    *srcMac      @b{(input)} supplicant mac address
+* @param    lIntIfNum     @b{(input)} logical interface
+* @param    existing_node  @b{(output)} is already existing node
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments 
+*
+* @end
+*********************************************************************/
+RC_t authmgrCheckMapPdu (uint32 intIfNum,  char8 * srcMac,
+                            uint32 * lIntIfNum,  BOOL * existingNode)
+{
+  authmgrPortCfg_t *pCfg;
+   BOOL valid =  FALSE;
+
+  *existingNode =  FALSE;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+
+  /* Get the port mode */
+  if ( TRUE != authmgrIntfIsConfigurable (intIfNum, &pCfg))
+  {
+    return  FAILURE;
+  }
+
+  /* check the host mode validity */
+  if ( SUCCESS != authmgrHostIsDynamicNodeAllocCheck
+      (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode, &valid))
+  {
+    /* some thing is wrong. */
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, intIfNum,
+                         "%s:%d:Unable to get the host mode %s", __FUNCTION__,
+                         __LINE__,
+                         authmgrHostModeStringGet (authmgrCB->globalInfo->
+                                                   authmgrPortInfo[intIfNum].
+                                                   hostMode));
+    return  FAILURE;
+  }
+
+  if ( FALSE == valid)
+  {
+  }
+  else
+  {
+    /* logical nodes are dynamically allocated */
+    return authmgrDynamicUserPduMapCheck (intIfNum, srcMac, lIntIfNum,
+                                          existingNode);
+  }
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose  This routine starts the application timer 
+*
+* @param    none
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments 
+*
+* @end
+*********************************************************************/
+RC_t authmgrTimerAction ()
+{
+  if (!AUTHMGR_IS_READY)
+  {
+    return  SUCCESS;
+  }
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+
+  appTimerProcess (authmgrCB->globalInfo->authmgrTimerCB);
+
+  return  SUCCESS;
+}
+
+void authmgrIntfOperBuildDefault(uint32 intIfNum)
+{
+  authmgrPortInfo_t  *pOper;
+
+  pOper = &authmgrCB->globalInfo->authmgrPortInfo[intIfNum];
+  memset(pOper, 0, sizeof(authmgrPortInfo_t));
+
+  pOper->portControlMode = FD_AUTHMGR_PORT_MODE;
+  pOper->hostMode = FD_AUTHMGR_HOST_MODE;
+  pOper->quietPeriod = FD_AUTHMGR_RESTART_TIMER_VAL;
+  pOper->reAuthPeriod = FD_AUTHMGR_PORT_REAUTH_PERIOD;
+  pOper->reAuthEnabled = FD_AUTHMGR_PORT_REAUTH_ENABLED;
+  pOper->reAuthPeriodServer = FD_AUTHMGR_PORT_REAUTH_PERIOD_FROM_SERVER;
+  pOper->maxUsers = FD_AUTHMGR_PORT_MAX_USERS;
+  pOper->authFailRetryMaxCount = FD_AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS;
+
+  pOper->paeCapabilities = FD_AUTHMGR_PORT_PAE_CAPABILITIES;
+
+}
+
+/*********************************************************************
+* @purpose  Set initialize value for a port
+*
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    initialize @b{(input)) initialize value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value is set to  TRUE by management in order to force
+*           initialization of a port.  It is re-set to  FALSE after
+*           initialization has completed.
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortInitializeSet (uint32 intIfNum,  BOOL initialize)
+{
+   uchar8  paeCapabilities = 0;
+  RC_t rc =  SUCCESS;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                       "%s:Intialize physical port-%d \n", __FUNCTION__,
+                       intIfNum);
+
+  authmgrPortInfoCleanup (intIfNum);
+
+  (void)authmgrDot1xPortPaeCapabilitiesGet(intIfNum, &paeCapabilities);
+
+  if (paeCapabilities ==  DOT1X_PAE_PORT_AUTH_CAPABLE)
+  {
+    rc = authmgrCtlApplyPortConfigData(intIfNum);
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Set initialize logical port
+*
+* @param    lIntIfNum   @b{(input)) Logical internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments 
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlLogicalPortInitializeSet (uint32 lIntIfNum)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  uint32 physPort = 0, lPort = 0, type = 0;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+  if (logicalPortInfo)
+  {
+    AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type,
+                              logicalPortInfo->key.keyNum);
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                         "%s:Intialize Logical port-%d type %s\n", __FUNCTION__,
+                         lIntIfNum, authmgrNodeTypeStringGet (type));
+
+    return authmgrCtlApplyLogicalPortConfigData (lIntIfNum);
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set reauthentication value for a port
+*
+* @param    intIfNum       @b{(input)) internal interface number
+* @param    reauthenticate @b{(input)) reauthentication value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value is set to  TRUE by management in order to force
+*           reauthentication of a port.  It is re-set to  FALSE after
+*           reauthentication has completed.
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortReauthenticateSet (uint32 intIfNum,
+                                          BOOL reauthenticate)
+{
+  RC_t rc =  SUCCESS;
+  uint32 lIntIfNum;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+
+  lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+  while (authmgrLogicalPortInfoGetNextNode (intIfNum, &lIntIfNum) !=  NULLPTR)
+  {
+    rc = authmgrCtlLogicalPortReauthenticateSet (lIntIfNum, reauthenticate);
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Set reauthentication value for a port
+*
+* @param    intIfNum       @b{(input)) internal interface number
+* @param    reauthenticate @b{(input)) reauthentication value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value is set to  TRUE by management in order to force
+*           reauthentication of a port.  It is re-set to  FALSE after
+*           reauthentication has completed.
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlLogicalPortReauthenticateSet (uint32 lIntIfNum,
+                                                 BOOL reauthenticate)
+{
+  RC_t rc =  SUCCESS;
+  uint32 physPort = 0, lPort = 0, type = 0;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+
+  if (logicalPortInfo !=  NULLPTR)
+  {
+    AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, lIntIfNum);
+    if (0 != logicalPortInfo->key.keyNum)
+    {
+      if (AUTHMGR_AUTHENTICATED != logicalPortInfo->protocol.authState)
+      {
+         LOGF ( LOG_SEVERITY_DEBUG,
+                 "Skipping reauthentication request for clients which are not already authenticated.");
+        return  SUCCESS;
+      }
+
+      logicalPortInfo->client.reAuthenticate =  TRUE;
+      logicalPortInfo->protocol.reauth =  TRUE;
+
+       LOGF ( LOG_SEVERITY_INFO,
+             "re-authentication triggered for client with mac address %s on port %s.",
+             AUTHMGR_PRINT_MAC_ADDR(logicalPortInfo->client.suppMacAddr.addr), 
+             authmgrIntfIfNameGet(physPort));  
+
+      rc = authmgrStateMachineClassifier (authmgrReauthenticate, lIntIfNum);
+    }
+  }
+  else
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                         "%s:Reauth set fail for client\n", __FUNCTION__);
+
+    rc =  FAILURE;
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Set port control mode based on the control mode
+*
+* @param    intIfNum    @b{(input)) internal interface number
+* @param    portControl @b{(input)) port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortCtrlModeSet (uint32 intIfNum,
+                                 AUTHMGR_PORT_CONTROL_t portControl)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+  uint32 i = 0;
+   char8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  authmgrHostModeHwPolicyApply ( AUTHMGR_INVALID_HOST_MODE, intIfNum, FALSE);
+
+  switch (portControl)
+  {
+  case  AUTHMGR_PORT_FORCE_UNAUTHORIZED:
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode =
+      portControl;
+ /* remove port from member of all vlans */
+  authmgrVlanAcquirePort(intIfNum);
+    rc = authmgrPortControlForceUnAuthActionSet (intIfNum);
+    break;
+
+  case  AUTHMGR_PORT_FORCE_AUTHORIZED:
+
+    if (nimGetIntfName (intIfNum,  ALIASNAME, ifName) !=  SUCCESS)
+    {
+       LOGF ( LOG_SEVERITY_ERROR,
+               "Unable to get alias for intf %s", authmgrIntfIfNameGet(intIfNum));
+      return  FAILURE;
+    }
+
+    if ( TRUE != authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled)
+    {
+      authmgrVlanReleasePort(intIfNum);
+      return  SUCCESS;
+    }
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode =
+      portControl;
+
+    rc = authmgrPortPvidSet(intIfNum, 0);
+
+    if (rc !=  SUCCESS)
+    {
+       LOGF ( LOG_SEVERITY_ERROR,
+               "Unable to set PVID back to 0 for %s", ifName);
+    }
+
+    authmgrVlanReleasePort(intIfNum);
+    rc = authmgrPortControlForceAuthActionSet (intIfNum);
+    break;
+
+  case  AUTHMGR_PORT_AUTO:
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode =
+      portControl;
+ /* remove port from member of all vlans */
+  authmgrVlanAcquirePort(intIfNum);
+  authmgrIhPhysicalPortStatusSet(intIfNum, AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+    rc = authmgrPortControlAutoActionSet (intIfNum);
+    break;
+
+  default:
+    rc =  FAILURE;
+  }
+
+  for (i = 0; i <  AUTHMGR_METHOD_MAX; i++)
+  {
+    if ( NULLPTR != authmgrCB->globalInfo->authmgrCallbacks[i].portCtrlFn)
+    {
+      authmgrCB->globalInfo->authmgrCallbacks[i].portCtrlFn (intIfNum,
+                                                             portControl);
+    }
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  control function to set port control mode
+*
+* @param    intIfNum    @b{(input)) internal interface number
+* @param    portControl @b{(input)) port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortControlModeSet (uint32 intIfNum,
+                                       AUTHMGR_PORT_CONTROL_t portControl)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  if ( DOT1X_PAE_PORT_AUTH_CAPABLE !=
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities)
+  {
+    return rc;
+  }
+  if (portControl ==
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode)
+  {
+    return rc;
+  }
+
+  /* clean up previous info */
+  authmgrPortInfoCleanup (intIfNum);
+  authmgrPortInfoInitialize (intIfNum,  TRUE);
+  authmgrMethodOrderChangeProcess (intIfNum);
+
+  return authmgrPortCtrlModeSet (intIfNum, portControl);
+}
+
+/*********************************************************************
+* @purpose  Set authentication restart period value
+*
+* @param    intIfNum    @b{(input)) internal interface number
+* @param    quietPeriod @b{(input)) authentication restart period 
+*
+* @returns   SUCCESS
+*
+* @comments The quietPeriod is the initialization value for quietWhile,
+*           which is a timer used by the Authenticator state machine
+*           to define periods of time in which it will not attempt to
+*           acquire a Supplicant.
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortQuietPeriodSet (uint32 intIfNum, uint32 quietPeriod)
+{
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].quietPeriod = quietPeriod;
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set the Reauthentication period
+*
+* @param    intIfNum      @b{(input)) internal interface number
+* @param    reAuthPeriod  @b{(input)) reauthentication period
+*
+* @returns   SUCCESS
+*
+* @comments The reAuthPeriod is the initialization value for reAuthWhen,
+*           which is a timer used by the Authenticator state machine to
+*           determine when reauthentication of the Supplicant takes place.
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortReAuthPeriodSet (uint32 intIfNum,
+                                       authmgrMgmtTimePeriod_t * params)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  uint32 lIntIfNum = 0;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthPeriodServer =
+    params->reAuthPeriodServer;
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthPeriod = params->val;
+
+  lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+  while ((logicalPortInfo =
+          authmgrLogicalPortInfoGetNextNode(intIfNum,
+                                            &lIntIfNum)) !=  NULLPTR)
+  {
+    if ( TRUE == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthEnabled)
+    {
+      authmgrTimerStart(logicalPortInfo, AUTHMGR_REAUTH_WHEN);
+    }
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set the Reauthentication mode
+*
+* @param    intIfNum       @b{(input)) internal interface number
+* @param    reAuthEnabled  @b{(input)) reauthentication mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The reAuthEnabled mode determines whether reauthentication
+*           of the Supplicant takes place.
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortReAuthEnabledSet (uint32 intIfNum,
+                                         BOOL reAuthEnabled)
+{
+  RC_t rc =  SUCCESS;
+  uint32 lIntIfNum = 0;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  if (reAuthEnabled ==
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthEnabled)
+  {
+    return  SUCCESS;
+  }
+
+  /* Whenever the reAuthEnabled setting is changed, reset the reAuthWhen timer
+   */
+
+  lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+  while ((logicalPortInfo =
+          authmgrLogicalPortInfoGetNextNode (intIfNum,
+                                             &lIntIfNum)) !=  NULLPTR)
+  {
+    logicalPortInfo->client.reAuthenticate =
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthEnabled;
+
+    if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+        logicalPortInfo->client.logicalPortStatus)
+    {
+      if (reAuthEnabled ==  FALSE)
+      {
+        if (AUTHMGR_REAUTH_WHEN == logicalPortInfo->authmgrTimer.cxt.type)
+        {
+          /* stop the timer */
+          authmgrTimerDestroy (authmgrCB->globalInfo->authmgrTimerCB,
+                               logicalPortInfo, AUTHMGR_REAUTH_WHEN);
+        }
+      }
+      else
+      {
+        authmgrTimerStart (logicalPortInfo, AUTHMGR_REAUTH_WHEN);
+      }
+    }
+  }
+
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthEnabled =
+    reAuthEnabled;
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Clear authmgr stats for specified port
+*
+* @param    intIfNum     @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortStatsClear (uint32 intIfNum)
+{
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  memset (&authmgrCB->globalInfo->authmgrPortStats[intIfNum], 0,
+          sizeof (authmgrPortStats_t));
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Apply authmgr config data
+*
+* @param    void
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlApplyConfigData (void)
+{
+
+  /* Apply the global admin mode for authmgr */
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode ==  ENABLE)
+  {
+    authmgrCtlAdminModeEnable ();
+  }
+  else
+  {
+    authmgrCtlAdminModeDisable ();
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Apply authmgr config data to specified interface
+*
+* @param    intIfNum     @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlApplyPortConfigData (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  authmgrPortInfoInitialize (intIfNum,  TRUE);
+
+  if ( DOT1X_PAE_PORT_AUTH_CAPABLE !=
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities)
+  {
+    return  SUCCESS;
+  }
+  authmgrMethodOrderChangeProcess (intIfNum);
+
+  authmgrPortCtrlModeSet (intIfNum, pCfg->portControlMode);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Notifies  authmgr has released the interface.
+*
+* @param    intIfNum   @b{(input)} internal interface number
+* @param    VlanId       @b{(input)} VlanId
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortAuthmgrRelease (uint32 intIfNum, uint32 vlanId)
+{
+    return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to handle vlan ents
+*
+* @param event dot1q event
+* @param intIfNum interface number
+* @param vlanData vlan event data
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrVlanChangeProcess (uint32 event, uint32 intIfNum,
+                               dot1qNotifyData_t * vlanData)
+{
+  uint32 i = 0, vlanId = 0, numVlans = 0;
+  RC_t rc;
+  dot1qTaggingMode_t tagging =  DOT1Q_MEMBER_UNTAGGED;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, 0,
+                         "Authmgr not Enabled.\r\n");
+    return;
+  }
+
+  for (i = 1; i <=  VLAN_MAX_MASK_BIT; i++)
+  {
+    {
+      vlanId = vlanData->data.vlanId;
+      /* For any continue, we will break out */
+      i =  VLAN_MAX_MASK_BIT + 1;
+
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, 0,
+                           "authmgrEvent %d port %s vlan %d", event, authmgrIntfIfNameGet(intIfNum), vlanId);
+    }
+    switch (event)
+    {
+    case authmgrVlanDeleteEvent:
+      authmgrVlanDeleteProcess (vlanId);
+      break;
+
+    case authmgrVlanDeletePortEvent:
+      if ( TRUE == vlanData->tagged)
+      {
+        tagging =  DOT1Q_MEMBER_TAGGED;
+      }
+      authmgrVlanPortDeleteProcess (intIfNum, vlanId, tagging);
+
+      break;
+
+    case authmgrVlanAddEvent:
+      rc = authmgrVlanAddProcess (vlanId);
+      break;
+
+    case authmgrVlanAddPortEvent:
+      if ( TRUE == vlanData->tagged)
+      {
+        tagging =  DOT1Q_MEMBER_TAGGED;
+      }
+      rc = authmgrVlanPortAddProcess (intIfNum, vlanId, tagging);
+      break;
+
+    case authmgrVlanPvidChangeEvent:
+      rc = authmgrVlanPVIDChangeEventProcess (intIfNum, vlanId);
+      break;
+
+    case authmgrVlanConfDeleteEvent:
+      authmgrVlanConfDeleteProcess (vlanId);
+      break;
+
+    case authmgrVlanConfPortDeleteEvent:
+      authmgrVlanConfPortDeleteProcess (intIfNum, vlanId);
+      break;
+
+    }
+    numVlans++;
+  }
+}
+
+/*********************************************************************
+* @purpose  Set max users value
+*
+* @param    intIfNum @b{(input)) internal interface number
+* @param    maxUsers @b{(input)) max users
+*
+* @returns   SUCCESS
+*
+* @comments The maxUsers is the maximum number of hosts that can be
+*           authenticated on a port using mac based authentication
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortMaxUsersSet (uint32 intIfNum, uint32 maxUsers)
+{
+  RC_t rc =  SUCCESS;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+
+  /* Check the operating host mode.
+     Max users are applicable for multi-auth mode only.
+     Ignore if mode is different. */
+
+  if ( AUTHMGR_MULTI_AUTH_MODE == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode)
+  {
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].maxUsers = maxUsers;
+
+    if ( AUTHMGR_PORT_AUTO == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode)
+    {
+      if (maxUsers < authmgrCB->globalInfo->authmgrPortInfo[intIfNum].numUsers)
+      {
+         LOGF ( LOG_SEVERITY_INFO,
+                 "Cleaning all clients on port as new max user cfg [%d] < current no. of users [%d].",
+                 maxUsers, authmgrCB->globalInfo->authmgrPortInfo[intIfNum].numUsers);
+        authmgrPortInfoCleanup(intIfNum);
+        rc = authmgrCtlApplyPortConfigData (intIfNum);
+      }
+    }
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Apply authmgr logical config data to specified interface
+*
+* @param    lIntIfNum     @b{(input)) Logical internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlApplyLogicalPortConfigData (uint32 lIntIfNum)
+{
+  uint32 physPort;
+
+  AUTHMGR_PORT_GET (physPort, lIntIfNum);
+
+  /* Initialize state machines */
+  if (authmgrCB->globalInfo->authmgrPortInfo[physPort].portControlMode ==
+       AUTHMGR_PORT_AUTO
+      || authmgrCB->globalInfo->authmgrPortInfo[physPort].portEnabled ==
+       FALSE)
+  {
+    authmgrLogicalPortInfoInit (lIntIfNum);
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Reset authmgr session data to specified interface
+*
+* @param    logicalPortInfo  @b{(input))  Logical Port Info node
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlResetLogicalPortSessionData (authmgrLogicalPortInfo_t *
+                                               logicalPortInfo)
+{
+ /* logicalPortInfo->client.sessionTime = simSystemUpTimeGet ();*/
+  if (logicalPortInfo->client.sessionTimeout != 0)
+     logicalPortInfo->client.lastAuthTime = logicalPortInfo->client.sessionTime;
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Reset authmgr session data to specified interface
+*
+* @param    logicalPortInfo  @b{(input))  Logical Port Info node
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlStopLogicalPortSessionData (authmgrLogicalPortInfo_t *
+                                              logicalPortInfo)
+{
+  uint32 tempU32 = 0; 
+  if (tempU32 > logicalPortInfo->client.sessionTime)
+  {
+    logicalPortInfo->client.sessionTime =
+      tempU32 - logicalPortInfo->client.sessionTime;
+  }
+  else
+  {
+    logicalPortInfo->client.sessionTime = 0xffffffff -
+      logicalPortInfo->client.sessionTime + tempU32;
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Disable  radius assigned vlan on a specified interface
+*
+* @param    intIfNum   @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlLogicalPortVlanAssignedReset (uint32 lIntIfNum)
+{
+  RC_t rc =  FAILURE;
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+  rc = authmgrClientInfoCleanup (logicalPortInfo);
+
+  return rc;
+}
+
+
+/*********************************************************************
+* @purpose  Process the unauthenticated Users on the port
+*
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    macAddr   @b{(input)) mac address 
+* @param    vlanId @b{(input)} vlan id
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortUnauthAddrCallbackProcess (uint32 intIfNum,
+                                                  enetMacAddr_t macAddr,
+                                                  ushort16 vlanId)
+{
+  uint32 lIntIfNum = 0;
+   BOOL exists;
+  authmgrPortCfg_t *pCfg;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  authmgrLogicalPortInfo_t *lPortInfo;
+   char8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  if (nimGetIntfName (intIfNum,  ALIASNAME, ifName) !=  SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_ERROR,
+             "Unable to get alias for intf %d", intIfNum);
+    return  FAILURE;
+  }
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, intIfNum,
+                         "%s, %d, PAC not enabled on interface %s \n",
+                         __func__, __LINE__, ifName);
+    return  SUCCESS;
+  }
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, intIfNum,
+                         "%s, %d, PAC not configurable on interface %s \n",
+                         __func__, __LINE__, ifName);
+    return  SUCCESS;
+  }
+
+  if ( TRUE != authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, intIfNum,
+                         "%s, %d, PAC not operational on interface %s \n",
+                         __func__, __LINE__, ifName);
+    return  SUCCESS;
+  }
+
+  if ( TRUE!= authmgrCB->globalInfo->authmgrPortInfo[intIfNum].unLearnMacPolicy)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, intIfNum,
+                         "%s, %d, PAC unlearnt policy not enabled on interface %s \n",
+                         __func__, __LINE__, ifName);
+    return  SUCCESS;
+  }
+
+  if (0 == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethodCount)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, intIfNum,
+                         "%s, %d, PAC enabled method count is Zero on interface %s \n",
+                         __func__, __LINE__, ifName);
+    return  SUCCESS;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, intIfNum,
+                       "\n%s:%d: Check Source Mac: %s Interface: %s Vlan: %d \n",
+                       __FUNCTION__, __LINE__, AUTHMGR_PRINT_MAC_ADDR(macAddr.addr),
+                       ifName, vlanId);                       
+
+  /* search the Mac address in the list of clients on the port */
+  if (authmgrCheckMapPdu (intIfNum, macAddr.addr, &lIntIfNum, &exists) !=
+       SUCCESS)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, intIfNum,
+                         "Failed to Process the unauth Addr Callback \n");
+    return  SUCCESS;
+  }
+
+  if (exists ==  FALSE)
+  {
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].numUsers >
+        authmgrCB->globalInfo->authmgrPortInfo[intIfNum].maxUsers)
+    {
+      return  FAILURE;
+    }
+
+    logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+    if (logicalPortInfo ==  NULLPTR)
+    {
+      /*Coverity 88470 fix: Should not come here as logical port would have been
+         created and assigned in authmgrCheckMapPdu function */
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, intIfNum,
+                           "Failed to create logiucal port %d \n", lIntIfNum);
+      return  SUCCESS;
+    }
+
+    logicalPortInfo->client.vlanId = vlanId;
+    logicalPortInfo->client.vlanType = AUTHMGR_VLAN_DEFAULT;
+    logicalPortInfo->client.blockVlanId = vlanId;
+
+    if (!logicalPortInfo->protocol.authenticate)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, intIfNum,
+          "%s, %d, triggering event  authmgrAuthenticationStart for logicalInterface %d \n",
+          __func__, __LINE__, lIntIfNum);
+      authmgrIssueCmd (authmgrAuthenticationStart, lIntIfNum,  NULLPTR);
+    }
+  }
+
+  lPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG(lPortInfo);
+
+  /* nothing to do if the client is already authenticated */
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED == 
+      lPortInfo->client.logicalPortStatus)
+  {
+    /* client already authenticated. */
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, intIfNum,
+          "%s, %d, client with logicalInterface %d to is already authenticated.\n",
+          __func__, __LINE__, lIntIfNum);
+      return  SUCCESS;
+  }
+   /* Block further traffic from this client. */
+  if ( FALSE == lPortInfo->client.dataBlocked)
+  {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, intIfNum,
+          "%s, %d, disabling the settings for logicalInterface %d to receive further packets to CPU\n",
+          __func__, __LINE__, lIntIfNum);
+
+    if (pacCfgIntfClientBlock(ifName, macAddr.addr, vlanId) !=  TRUE)
+    {
+       LOGF ( LOG_SEVERITY_ERROR,
+               "Unable to block port %s", ifName); 
+      return  FAILURE;
+    }
+
+    lPortInfo->client.dataBlocked =  TRUE;
+    lPortInfo->client.blockVlanId = vlanId;
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Disconnect the client interface on expiry of client timer
+*
+* @param    intIfNum       @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlLogicalPortClientTimeout (uint32 lIntIfNum)
+{
+  RC_t rc =  FAILURE;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+
+  if ((logicalPortInfo !=  NULLPTR)
+      && (logicalPortInfo->key.keyNum !=  0))
+  {
+    if (logicalPortInfo->protocol.authState == AUTHMGR_AUTHENTICATED)
+    {
+      rc = authmgrClientInfoCleanup (logicalPortInfo);
+    }
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Disconnect the client
+*
+* @param    intIfNum       @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlClientCleanup (uint32 lIntIfNum)
+{
+  RC_t rc =  FAILURE;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+
+  if ((logicalPortInfo !=  NULLPTR)
+      && (logicalPortInfo->key.keyNum !=  0))
+  {
+    rc = authmgrClientInfoCleanup (logicalPortInfo);
+  }
+
+  return rc;
+}
+
+
+/*********************************************************************
+* @purpose  Used to get method no response timeout 
+*
+* @param    val     @b{(input)) periodic timeout in seconds
+*
+* @returns   SUCCESS
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortMethodNoRespPeriodGet (uint32 intIfNum,
+                                        uint32 * val)
+{
+  if ( NULLPTR == val)
+  {
+    return  FAILURE;
+  }
+
+  *val = FD_AUTHMGR_PORT_METHOD_NO_RESP_PERIOD;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose control mode function to set the port control mode to auto
+*
+* @param    intIfNum   @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortControlAutoActionSet (uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+  authmgrHostModeMap_t entry;
+  uint32 i = 0;
+   AUTHMGR_HOST_CONTROL_t hostMode =  AUTHMGR_INVALID_HOST_MODE;
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  /* check the configured host mode
+     and set the port accordingly */
+
+  memset (&entry, 0, sizeof (authmgrHostModeMap_t));
+
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode =  AUTHMGR_PORT_AUTO;
+  if ( SUCCESS != authmgrHostModeMapInfoGet (pCfg->hostMode, &entry))
+  {
+    /* failed to get the handler for the host mode */
+    return  FAILURE;
+  }
+
+
+  rc = entry.hostModeFn (intIfNum);
+
+  for (i = 0; i <  AUTHMGR_METHOD_MAX; i++)
+  {
+    if ( NULLPTR != authmgrCB->globalInfo->authmgrCallbacks[i].hostCtrlFn)
+    {
+      authmgrCB->globalInfo->authmgrCallbacks[i].hostCtrlFn (intIfNum,
+                                                             hostMode);
+    }
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose control mode function to set the port host mode 
+*
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    hostMode   @b{(input))  host mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortCtrlHostModeSet (uint32 intIfNum,
+                                     AUTHMGR_HOST_CONTROL_t hostMode)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+  authmgrHostModeMap_t entry;
+  uint32 i = 0;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  if ( AUTHMGR_PORT_AUTO !=
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode)
+  {
+    return  FAILURE;
+  }
+
+  if (hostMode == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode)
+  {
+    if (hostMode ==  AUTHMGR_MULTI_AUTH_MODE)
+    {
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].maxUsers = pCfg->maxUsers;
+    }
+    return  SUCCESS;
+  }
+
+  authmgrHostModeHwPolicyApply ( AUTHMGR_INVALID_HOST_MODE, intIfNum,
+                                 FALSE);
+  authmgrPortInfoCleanup (intIfNum);
+  authmgrPortInfoInitialize (intIfNum,  TRUE);
+  authmgrMethodOrderChangeProcess (intIfNum);
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode =
+     AUTHMGR_PORT_AUTO;
+
+  /* check the configured host mode
+     and set the port accordingly */
+  memset (&entry, 0, sizeof (authmgrHostModeMap_t));
+  if ( SUCCESS != authmgrHostModeMapInfoGet (hostMode, &entry))
+  {
+    /* failed to get the handler for the host mode */
+    return  FAILURE;
+  }
+
+  rc = entry.hostModeFn (intIfNum);
+
+  for (i = 0; i <  AUTHMGR_METHOD_MAX; i++)
+  {
+    if ( NULLPTR != authmgrCB->globalInfo->authmgrCallbacks[i].hostCtrlFn)
+    {
+      authmgrCB->globalInfo->authmgrCallbacks[i].hostCtrlFn (intIfNum,
+                                                             hostMode);
+    }
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose control function to set the host mode to multi host
+*
+* @param    intIfNum   @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrControlMultiHostActionSet (uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  /* Set the operating host mode */
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode =
+     AUTHMGR_MULTI_HOST_MODE;
+
+  rc = authmgrIhPhysicalPortStatusSet(intIfNum,  AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+
+  if ( SUCCESS != rc)
+  {
+     LOGF ( LOG_SEVERITY_WARNING,
+             "Could not set status of Interface %u", intIfNum);
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose control function to set the host mode to single host mode
+*
+* @param    intIfNum   @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrControlSingleAuthActionSet (uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  /* Set the operating host mode */
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode =
+     AUTHMGR_SINGLE_AUTH_MODE;
+
+  rc = authmgrIhPhysicalPortStatusSet(intIfNum,  AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+
+  if ( SUCCESS != rc) 
+  {
+     LOGF ( LOG_SEVERITY_WARNING,
+             "Could not set status of Interface %u", intIfNum);
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose control function to set the host mode to multi auth
+*
+* @param    intIfNum   @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrControlMultAuthActionSet (uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  /* Set the operating host mode */
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode =
+     AUTHMGR_MULTI_AUTH_MODE;
+
+  rc = authmgrIhPhysicalPortStatusSet(intIfNum,  AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+
+  if ( SUCCESS != rc) 
+  {
+     LOGF ( LOG_SEVERITY_WARNING,
+             "Could not set status of Interface %u", intIfNum);
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose control function to set the to force authorized
+*
+* @param    intIfNum   @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortControlForceAuthActionSet (uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  /* Set the operating host mode */
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode =
+     AUTHMGR_INVALID_HOST_MODE;
+
+  if ( NULLPTR == (logicalPortInfo = authmgrLogicalPortInfoAlloc (intIfNum)))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, 0,
+                         "%s:Logical port alloc failure\n", __FUNCTION__);
+    return  FAILURE;
+  }
+
+  /* Call the api to set the port to authorized */
+  authmgrClientStatusSet (logicalPortInfo,  AUTHMGR_PORT_STATUS_AUTHORIZED);
+
+  /* call the api to send EAP success */
+  authmgrTxCannedSuccess (logicalPortInfo->key.keyNum, AUTHMGR_LOGICAL_PORT);
+  return rc;
+}
+
+/*********************************************************************
+* @purpose control function to set the to force un-authorized
+*
+* @param    intIfNum   @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortControlForceUnAuthActionSet (uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  /* Set the operating host mode */
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode =
+     AUTHMGR_INVALID_HOST_MODE;
+
+  if ( NULLPTR == (logicalPortInfo = authmgrLogicalPortInfoAlloc (intIfNum)))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, 0,
+                         "%s:Logical port alloc failure\n", __FUNCTION__);
+    return  FAILURE;
+  }
+
+  /* Call the api to set the port to unauthorized */
+  authmgrClientStatusSet (logicalPortInfo,  AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+
+  /* call the api to send EAP failure */
+  authmgrTxCannedFail (logicalPortInfo->key.keyNum, AUTHMGR_LOGICAL_PORT);
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose function to clean up authmgr port oper info
+*
+* @param    intIfNum   @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortInfoCleanup (uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  uint32 lIntIfNum;
+  authmgrPortCfg_t *pCfg;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+/*   BOOL valid =  FALSE; */
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  SUCCESS;
+  }
+
+  /* reset all the clients associated with the port */
+  lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+  while ( NULLPTR !=
+         (logicalPortInfo =
+          authmgrLogicalPortInfoGetNextNode (intIfNum, &lIntIfNum)))
+  {
+    if (0 != logicalPortInfo->key.keyNum)
+    {
+      authmgrClientInfoCleanup (logicalPortInfo);
+    }
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose function to check policy validation based on host mode
+*
+* @param    hostMode   @b{(input))  hostmode
+* @param    intIfNum   @b{(input))  interface number
+* @param    *appyPolicy  @b{(input)) bool value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrHostModeHwPolicyApply ( AUTHMGR_HOST_CONTROL_t hostMode,
+                                      uint32 intIfNum,  BOOL install)
+{
+  RC_t rc =  SUCCESS;
+   BOOL valid =  FALSE;
+
+  switch (hostMode)
+  {
+  case  AUTHMGR_INVALID_HOST_MODE:
+    valid =  FALSE;
+    break;
+
+  case  AUTHMGR_MULTI_HOST_MODE:
+  case  AUTHMGR_SINGLE_AUTH_MODE:
+  case  AUTHMGR_MULTI_AUTH_MODE:
+    valid =  TRUE;
+    break;
+
+  default:
+    rc =  FAILURE;
+  }
+
+  if ( SUCCESS == rc)
+  {
+    if (( TRUE == install) && ( TRUE == valid))
+    {
+      /* apply the policy */
+      authmgrIhPhyPortViolationCallbackSet (intIfNum,
+                                             AUTHMGR_PORT_VIOLATION_CALLBACK_ENABLE);
+    }
+    else
+    {
+      /* remove policy */
+      authmgrIhPhyPortViolationCallbackSet (intIfNum,
+                                             AUTHMGR_PORT_VIOLATION_CALLBACK_DISABLE);
+    }
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose function to get the auth restart timer value
+*
+* @param intIfNum internal interface number
+* @param val timeout value
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrQuietPeriodGet (uint32 intIfNum, uint32 * val)
+{
+  if ( NULLPTR == val)
+  {
+    return  FAILURE;
+  }
+
+  *val = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].quietPeriod;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to get the reauth period on interface
+*
+* @param intIfNum interface number
+* @param val value of the reauth period
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrReAuthPeriodGet (uint32 intIfNum, uint32 * val)
+{
+  if ( NULLPTR == val)
+  {
+    return  FAILURE;
+  }
+
+  *val = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthPeriod;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Processes Authmgr-related event initiated by Dot1Q
+*
+* @param (in)    vlanId    Virtual LAN Id
+* @param (in)    intIfNum  Interface Number
+* @param (in)    event
+*
+* @returns   SUCCESS  or  FAILURE
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanChangeCallback (dot1qNotifyData_t *vlanData,
+                                   uint32 intIfNum, uint32 event)
+{
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, 0,
+                       "Received Vlan event %d for interface %s, vlan %d\n",
+                       event, authmgrIntfIfNameGet(intIfNum), vlanData->data.vlanId);
+
+  /* Vlan Change callbacks can be called during unconfig phase when dot1q is
+     trying
+     to restore the vlan config. */
+
+   INTF_TYPES_t intfType;
+
+  if (!((AUTHMGR_IS_READY) || authmgrCnfgrState == AUTHMGR_PHASE_UNCONFIG_2))
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Received an VLAN change callback while DOT1Q is not ready to receive it during unconfig state.");
+    return  FAILURE;
+  }
+
+  /* before performing any operations with interfaces,
+     check if NIM is ready to handle requests */
+  if ((nimPhaseStatusCheck () ==  TRUE)
+      && (nimGetIntfType (intIfNum, &intfType) ==  SUCCESS))
+  {
+    if (authmgrIsValidIntfType (intfType) !=  TRUE)
+    {
+      /* if AUTHMGR is not interested in this interface,
+       * inform event issuer that we have completed processing.
+       */
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                           "Interface %s is not AUTHMGR configurable\n",
+                           authmgrIntfIfNameGet(intIfNum));
+      return  SUCCESS;
+    }
+  }
+
+  if ((intIfNum != 0)
+      && (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled !=
+           TRUE) && (event != VLAN_DELETE_PORT_NOTIFY))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                         "Interface %s is not enabled \n",
+                         authmgrIntfIfNameGet(intIfNum));
+    return  SUCCESS;
+  }
+
+  switch (event)
+  {
+  case VLAN_DELETE_PENDING_NOTIFY:
+    authmgrIssueCmd (authmgrVlanDeleteEvent, intIfNum, vlanData);
+    break;
+
+  case VLAN_ADD_NOTIFY:
+    if ( NOT_EXIST == authmgrVlanCheckValid(vlanData->data.vlanId))
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, 0,
+                           "Adding vlan %d\n", vlanData->data.vlanId);
+      authmgrIssueCmd (authmgrVlanAddEvent, intIfNum, vlanData);
+    }
+    break;
+
+  case VLAN_ADD_PORT_NOTIFY:
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode ==
+         AUTHMGR_PORT_AUTO)
+    {
+      authmgrIssueCmd (authmgrVlanAddPortEvent, intIfNum, vlanData);
+    }
+    break;
+
+  case VLAN_DELETE_PORT_NOTIFY:
+    authmgrIssueCmd (authmgrVlanDeletePortEvent, intIfNum, vlanData);
+    break;
+
+  case VLAN_PVID_CHANGE_NOTIFY:
+    authmgrIssueCmd (authmgrVlanPvidChangeEvent, intIfNum, vlanData);
+
+  default:
+    break;
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to get hostmode map entry function entry
+*
+* @param type  host control mode
+* @param elem associated entry for the host mode
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrHostModeMapInfoGet ( AUTHMGR_HOST_CONTROL_t type,
+                                   authmgrHostModeMap_t * elem)
+{
+  uint32 i = 0;
+  static authmgrHostModeMap_t authmgrHostModeHandlerTable[] = {
+    { AUTHMGR_SINGLE_AUTH_MODE, authmgrControlSingleAuthActionSet},
+    { AUTHMGR_MULTI_HOST_MODE, authmgrControlMultiHostActionSet},
+    { AUTHMGR_MULTI_AUTH_MODE, authmgrControlMultAuthActionSet},
+  };
+
+  for (i = 0;
+       i <
+       (sizeof (authmgrHostModeHandlerTable) / sizeof (authmgrHostModeMap_t));
+       i++)
+  {
+    if (type == authmgrHostModeHandlerTable[i].hostMode)
+    {
+      *elem = authmgrHostModeHandlerTable[i];
+      return  SUCCESS;
+    }
+  }
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose function to check whether attributes are changed,
+*          if changed, clean up the hardware info and readd the new info.
+*
+* @param logicalPortInfo  @b{(inout)}  Pointer to the Logical Port Info
+* @param processInfo      @b{(inout)}  Pointer to the process Info
+*
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end 
+*********************************************************************/
+RC_t authmgrClientHwInfoCleanupAndReadd(authmgrLogicalPortInfo_t *logicalPortInfo,
+                                           authmgrClientInfo_t *processInfo)
+{
+  uint32 physPort = 0;
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+  
+
+  /* check if the client params have been changed */
+
+  if ( SUCCESS != authmgrClientInfoCleanupCheck
+      (&logicalPortInfo->client, &authmgrCB->processInfo))
+  {
+    if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+        logicalPortInfo->client.logicalPortStatus)
+    {
+      /* clean up previous data */
+      if ( SUCCESS != authmgrClientHwInfoCleanup (logicalPortInfo))
+      {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                             "%s:Unable to cleanup client hw info logicalPort num-%d\n",
+                             __FUNCTION__, logicalPortInfo->key.keyNum);
+        return  FAILURE;
+      }
+    }
+
+    /* push the client info to hw */
+    if ( SUCCESS != authmgrClientHwInfoAdd (logicalPortInfo,
+                                              logicalPortInfo->client.suppMacAddr,
+                                              authmgrCB->processInfo.vlanId,
+                                              logicalPortInfo->client.blockVlanId))
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                           "%s:Unable to add client hw info logicalPort num-%d\n",
+                           __FUNCTION__, logicalPortInfo->key.keyNum);	
+      return  FAILURE;
+    }
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to handle update of new client
+*
+* @param lIntIfNum client logical interface number
+* @param callbackParams authentication callback params
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrNewClientAction (uint32 lIntIfNum,
+                                authmgrAuthRespParams_t * callbackParams)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 physPort = 0;
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+  /* Coverity Fix to handle the possible NULLL ptr from the
+     authmgrLogicalPortInfoGet */
+  if (logicalPortInfo ==  NULLPTR)
+  {
+    /* Coverity defect fix. should never come here as authmgrCheckMapPdu would
+       have assigned a new node if a new client is detected
+       or returned existing logical interface number */
+    return  FAILURE;
+  }
+
+  AUTHMGR_PORT_GET (physPort, lIntIfNum);
+
+  if (AUTHMGR_UNAUTHENTICATED == logicalPortInfo->protocol.authState)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                         "%s, %d, triggering event  authmgrAuthenticationStart for logicalInterface %d \n",
+                         __func__, __LINE__, lIntIfNum);
+
+    authmgrIssueCmd (authmgrAuthenticationStart, lIntIfNum,  NULLPTR);
+    authmgrStatsUpdate (physPort, callbackParams->method, authmgrStatsAuthEnter);
+  }
+  else
+  {
+    /* check if the client received is already authenticated */
+
+    if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+          logicalPortInfo->client.logicalPortStatus)
+    {
+      if (logicalPortInfo->client.authenticatedMethod !=
+          callbackParams->method)
+      {
+        /* check if the received method is of higher priority than the existing one */
+
+        if (( AUTHMGR_METHOD_NONE != logicalPortInfo->client.authenticatedMethod) &&
+            ( SUCCESS == authmgrPriorityPrecedenceValidate(physPort, 
+                                                             logicalPortInfo->client.authenticatedMethod,
+                                                             callbackParams->method)))
+        {
+
+          if (AUTHMGR_AUTHENTICATED == logicalPortInfo->protocol.authState)
+          {
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+              "%s, %d, Trigger from method %s received. "
+              "Client already authenticated with method %s for logicalInterface %d \n"
+              "Try to authenticate again as higher priority method is received\n",
+              __func__, __LINE__, authmgrMethodStringGet(callbackParams->method), 
+              authmgrMethodStringGet(logicalPortInfo->client.authenticatedMethod),lIntIfNum);
+             logicalPortInfo->protocol.authenticatedRcvdStartAuth =  TRUE;
+            logicalPortInfo->client.currentMethod = callbackParams->method;
+            authmgrGenerateEvents (lIntIfNum);
+            return  SUCCESS;
+          }
+          else
+          {
+           /* ignore the trigger */
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+              "%s, %d, Trigger from method %s received. "
+              "Client already authenticated with method %s for logicalInterface %d \n"
+              "ignoring trigger as the client auth state is in %s\n",
+              __func__, __LINE__, authmgrMethodStringGet(callbackParams->method), 
+              authmgrMethodStringGet(logicalPortInfo->client.authenticatedMethod),lIntIfNum,
+              authmgrAuthStateStringGet(logicalPortInfo->protocol.authState));
+            return  SUCCESS;
+          }     
+        }
+        else if ( AUTHMGR_METHOD_NONE == logicalPortInfo->client.authenticatedMethod)
+        {
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+              "%s, %d, Trigger from method %s received. "
+              "Client already authenticated with method %s for logicalInterface %d \n"
+              "Initiate authentication\n",
+              __func__, __LINE__, authmgrMethodStringGet(callbackParams->method), 
+              authmgrMethodStringGet(logicalPortInfo->client.authenticatedMethod),lIntIfNum);
+
+          /* mimic authentication restart, if client state is not authenticating.
+          Using existing event to generate the same */
+          if(AUTHMGR_AUTHENTICATING != logicalPortInfo->protocol.authState)
+          {
+            logicalPortInfo->protocol.authenticatedRcvdStartAuth =  TRUE;
+
+            AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, physPort,
+                "Current auth method is none. Marking the current method with first method %s " 
+                "for logicalInterface %d for new authentication on interface %s \n",
+                authmgrMethodStringGet(authmgrCB->globalInfo->authmgrPortInfo[physPort].enabledMethods[0]),
+                logicalPortInfo->key.keyNum, authmgrIntfIfNameGet(physPort));
+
+            /* Restart with the first enabled method */
+            logicalPortInfo->client.currentMethod = authmgrCB->globalInfo->authmgrPortInfo[physPort].enabledMethods[0];
+            authmgrGenerateEvents (lIntIfNum);
+          }
+        }
+      }
+      else
+      {
+        if ( AUTHMGR_METHOD_8021X == callbackParams->method)
+        {
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+              "%s, %d, Trigger from method %s received. "
+              "Client already authenticated with method %s for logicalInterface %d \n"
+              "since client is authenticated and received start generating further events\n",
+              __func__, __LINE__, authmgrMethodStringGet(callbackParams->method), 
+              authmgrMethodStringGet(logicalPortInfo->client.authenticatedMethod),lIntIfNum);
+
+          if(AUTHMGR_AUTHENTICATING != logicalPortInfo->protocol.authState)
+          {
+            logicalPortInfo->protocol.authenticatedRcvdStartAuth =  TRUE;
+            authmgrGenerateEvents (lIntIfNum);
+          }
+        }
+        else
+        {
+
+        /* just ignore */
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+            "%s, %d, Trigger from method %s received. "
+            "Client already authenticated with method %s for logicalInterface %d \n"
+            "Ignoring the request as the client already authenticated\n",
+            __func__, __LINE__, authmgrMethodStringGet(callbackParams->method), 
+            authmgrMethodStringGet(logicalPortInfo->client.authenticatedMethod),lIntIfNum);
+        }
+      } 
+    }
+    else
+    {
+
+      if ((AUTHMGR_AUTHENTICATING == logicalPortInfo->protocol.authState) &&
+          ( AUTHMGR_METHOD_8021X == callbackParams->method)&&
+          (logicalPortInfo->client.currentMethod == callbackParams->method))
+      {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+            "%s, %d, Triggering authetication for method %s. "
+            "for logicalInterface %d , current auth state of client is %s\n",
+            __func__, __LINE__, authmgrMethodStringGet(callbackParams->method), lIntIfNum,
+            authmgrAuthStateStringGet(logicalPortInfo->protocol.authState));
+
+        authmgrAuthenticationTrigger(logicalPortInfo);
+      }
+      else
+      {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+            "%s, %d, Cannot trigger event  authmgrAuthenticationStart "
+            "for logicalInterface %d authState %d\n",
+            __func__, __LINE__, lIntIfNum, logicalPortInfo->protocol.authState);
+
+        if (AUTHMGR_AUTHENTICATING != logicalPortInfo->protocol.authState)
+        {
+           LOGF ( LOG_SEVERITY_INFO,
+              "Client not ready for authentication.");
+        }
+      }
+    }
+  }
+
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to handle RADIUS comm failure response from client
+*
+* @param lIntIfNum client logical interface number
+* @param callbackParams authentication callback params
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrStatusServerCommFailAction (uint32 lIntIfNum,
+                                           authmgrAuthRespParams_t * callbackParams)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 physPort = 0;
+  authmgrStatsUpdate_t status = authmgrStatsAuthFail;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (callbackParams);
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_PORT_GET (physPort, lIntIfNum);
+
+  /* update statistics */
+  status = authmgrStatsAuthFail;
+  authmgrStatsUpdate (physPort, callbackParams->method, status);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+      "%s:RADIUS server comm failure for logicalPort num-%d\n",
+      __FUNCTION__, logicalPortInfo->key.keyNum);
+
+  if (0 !=
+      strlen (callbackParams->clientParams.info.authInfo.authmgrUserName))
+  {
+    memcpy (logicalPortInfo->client.authmgrUserName,
+        callbackParams->clientParams.info.authInfo.authmgrUserName,
+        AUTHMGR_USER_NAME_LEN);
+    logicalPortInfo->client.authmgrUserNameLength = 
+      callbackParams->clientParams.info.authInfo.authmgrUserNameLength;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+      "%s:logicalPort num %d currentIdL %d\n",
+      __FUNCTION__, logicalPortInfo->key.keyNum,
+      callbackParams->clientParams.info.authInfo.attrInfo.idFromServer);
+
+  logicalPortInfo->client.currentIdL = callbackParams->clientParams.info.authInfo.attrInfo.idFromServer;
+
+  authmgrClientInfoCleanup (logicalPortInfo);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to handle failure or timeout response from client
+*
+* @param lIntIfNum client logical interface number
+* @param callbackParams authentication callback params
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrStatusNotSuccessAction (uint32 lIntIfNum,
+                                       authmgrAuthRespParams_t * callbackParams)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 physPort = 0;
+  authmgrStatsUpdate_t status = authmgrStatsAuthFail; /* Need to check - TBD */
+  authmgrClientType_t clientType = AUTHMGR_CLIENT_UNAWARE;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (callbackParams);
+  /* update statistics */
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_PORT_GET (physPort, lIntIfNum);
+
+  authmgrTimerDestroy (authmgrCB->globalInfo->authmgrTimerCB,
+                               logicalPortInfo, AUTHMGR_METHOD_NO_RESP_TMR);
+
+  authmgrCB->oldInfo = logicalPortInfo->client;
+
+  if (0 !=
+      strlen (callbackParams->clientParams.info.authInfo.authmgrUserName))
+  {
+    memcpy (logicalPortInfo->client.authmgrUserName,
+            callbackParams->clientParams.info.authInfo.authmgrUserName,
+            AUTHMGR_USER_NAME_LEN);
+    logicalPortInfo->client.authmgrUserNameLength = 
+          callbackParams->clientParams.info.authInfo.authmgrUserNameLength;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+                       "%s:logicalPort num %d currentIdL %d\n",
+                       __FUNCTION__, logicalPortInfo->key.keyNum,
+                       callbackParams->clientParams.info.authInfo.attrInfo.idFromServer);
+
+  logicalPortInfo->client.currentIdL = callbackParams->clientParams.info.authInfo.attrInfo.idFromServer;
+
+  if (callbackParams->status ==  AUTHMGR_AUTH_FAIL)
+  {
+    logicalPortInfo->protocol.authFail =  TRUE;
+    logicalPortInfo->client.reAuthCount++;
+    status = authmgrStatsAuthFail;
+    clientType =
+      (callbackParams->method ==
+        AUTHMGR_METHOD_8021X ? AUTHMGR_CLIENT_AWARE : AUTHMGR_CLIENT_UNAWARE);
+  }
+  else if (callbackParams->status ==  AUTHMGR_AUTH_TIMEOUT)
+  {
+    logicalPortInfo->protocol.authTimeout =  TRUE;
+    status = authmgrStatsAuthTimeout;
+  }
+
+  if ((AUTHMGR_CLIENT_AWARE != logicalPortInfo->client.clientType) ||
+      (AUTHMGR_CLIENT_UNASSIGNED == logicalPortInfo->client.clientType))
+  {
+    logicalPortInfo->client.clientType = clientType;
+  }
+
+  authmgrStatsUpdate (physPort, callbackParams->method, status);
+
+  logicalPortInfo->protocol.authSuccess =  FALSE;
+
+  return authmgrGenerateEvents (lIntIfNum);
+}
+
+/*********************************************************************
+* @purpose function to handle auth disconnect of the client
+*
+* @param lIntIfNum client logical interface number
+* @param callbackParams authentication callback params
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrStatusDisconnectAction (uint32 lIntIfNum,
+                                       authmgrAuthRespParams_t * callbackParams)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 physPort = 0;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (callbackParams);
+  /* update statistics */
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_PORT_GET (physPort, lIntIfNum);
+
+  logicalPortInfo->client.currentIdL = callbackParams->clientParams.info.authInfo.attrInfo.idFromServer;
+
+  /* check if the client is already authenticated using the same method.
+     If yes, remove the client details */
+  if (( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+       logicalPortInfo->client.logicalPortStatus)
+      && (logicalPortInfo->client.authenticatedMethod ==
+          logicalPortInfo->client.currentMethod))
+  {
+    authmgrClientInfoCleanup (logicalPortInfo);
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to handle auth success of the client
+*
+* @param lIntIfNum client logical interface number
+* @param callbackParams authentication callback params
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrStatusSuccessAction (uint32 lIntIfNum,
+                                    authmgrAuthRespParams_t * callbackParams)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 physPort = 0;
+  authmgrClientType_t clientType = 0;
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (callbackParams);
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+  authmgrTimerDestroy (authmgrCB->globalInfo->authmgrTimerCB,
+                               logicalPortInfo, AUTHMGR_METHOD_NO_RESP_TMR);
+
+  /* Received auth success.
+     Parse the received attributes and program
+     accordingly */
+
+  memset(&authmgrCB->processInfo, 0, sizeof(authmgrClientInfo_t));
+  memset(&authmgrCB->oldInfo, 0, sizeof(authmgrClientInfo_t));
+  memset(&authmgrCB->attrInfo, 0, sizeof(authmgrAuthAttributeInfo_t));
+
+  authmgrCB->oldInfo = logicalPortInfo->client;
+  memcpy(&authmgrCB->attrInfo, 
+         &callbackParams->clientParams.info.authInfo.attrInfo,
+         sizeof(authmgrAuthAttributeInfo_t));
+
+  if (0 != strlen (callbackParams->clientParams.info.authInfo.authmgrUserName))
+  {
+    memcpy (logicalPortInfo->client.authmgrUserName,
+            callbackParams->clientParams.info.authInfo.authmgrUserName,
+            AUTHMGR_USER_NAME_LEN);
+    logicalPortInfo->client.authmgrUserNameLength = 
+          callbackParams->clientParams.info.authInfo.authmgrUserNameLength;
+  }
+
+  if ( SUCCESS != authmgrRadiusAcceptPostProcess (logicalPortInfo, &authmgrCB->processInfo,  AUTHMGR_ATTR_RADIUS))
+  {
+    /* update failure stats and move further */
+    authmgrStatsUpdate (physPort, callbackParams->method, authmgrStatsAuthFail);
+
+    if ( AUTHMGR_METHOD_NONE != callbackParams->method)
+    {
+      /* clean up the info at the caller */
+      if ( NULLPTR != authmgrCB->globalInfo->authmgrCallbacks[callbackParams->method].eventNotifyFn)
+      {
+        authmgrCB->globalInfo->authmgrCallbacks[callbackParams->method].eventNotifyFn
+          (physPort, authmgrClientDisconnect, &logicalPortInfo->client.suppMacAddr);
+      }
+    }
+
+    logicalPortInfo->protocol.authSuccess =  FALSE;
+    logicalPortInfo->protocol.authFail =  TRUE;
+
+    return authmgrGenerateEvents (logicalPortInfo->key.keyNum);
+  }
+  /* Update Session timeout and terminate action */ 
+  authmgrCB->processInfo.sessionTimeout    =  authmgrCB->attrInfo.sessionTimeout; 
+  authmgrCB->processInfo.terminationAction =  RADIUS_TERMINATION_ACTION_DEFAULT; 
+  if ((RADIUS_TERMINATION_ACTION_DEFAULT == authmgrCB->attrInfo.terminationAction) ||
+      (RADIUS_TERMINATION_ACTION_RADIUS == authmgrCB->attrInfo.terminationAction))
+  {
+     authmgrCB->processInfo.terminationAction =  authmgrCB->attrInfo.terminationAction ; 
+  }
+
+  memcpy(&(logicalPortInfo->client.serverClass),
+         &(authmgrCB->attrInfo.serverClass), authmgrCB->attrInfo.serverClassLen);
+  logicalPortInfo->client.serverClassLen = authmgrCB->attrInfo.serverClassLen;
+
+  if ( SUCCESS != authmgrClientHwInfoCleanupAndReadd(logicalPortInfo,
+                                                       &authmgrCB->processInfo))
+  {
+    if ( AUTHMGR_METHOD_NONE != callbackParams->method)
+    {
+      /* clean up the info at the caller */
+      if ( NULLPTR != authmgrCB->globalInfo->authmgrCallbacks[callbackParams->method].eventNotifyFn)
+      {
+        authmgrCB->globalInfo->authmgrCallbacks[callbackParams->method].eventNotifyFn
+          (physPort, authmgrClientDisconnect, &logicalPortInfo->client.suppMacAddr);
+      }
+    }
+
+    logicalPortInfo->protocol.authSuccess =  FALSE;
+    logicalPortInfo->protocol.authFail =  TRUE;
+    return authmgrGenerateEvents (lIntIfNum);
+  }
+
+  logicalPortInfo->protocol.authSuccess =  TRUE;
+  logicalPortInfo->protocol.authFail =  FALSE;
+
+    clientType =
+      (callbackParams->method ==
+        AUTHMGR_METHOD_8021X ? AUTHMGR_CLIENT_AWARE : AUTHMGR_CLIENT_UNAWARE);
+    logicalPortInfo->client.clientType = clientType;
+
+    if ( AUTH_METHOD_RADIUS ==
+        callbackParams->clientParams.info.authInfo.authMethod)
+    {
+      logicalPortInfo->client.vlanType = AUTHMGR_VLAN_RADIUS;
+    }
+    else
+    {
+      logicalPortInfo->client.vlanType = AUTHMGR_VLAN_DEFAULT;
+    }
+
+  logicalPortInfo->client.authenticatedMethod = callbackParams->method;
+  logicalPortInfo->client.authMethod =
+    callbackParams->clientParams.info.authInfo.authMethod;
+
+  logicalPortInfo->client.vlanId = authmgrCB->processInfo.vlanId;
+
+  logicalPortInfo->client.sessionTimeout =
+    authmgrCB->processInfo.sessionTimeout;
+  logicalPortInfo->client.terminationAction =
+    authmgrCB->processInfo.terminationAction;
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+                       "%s:logicalPort num %d currentIdL %d\n",
+                       __FUNCTION__, logicalPortInfo->key.keyNum,
+                       authmgrCB->attrInfo.idFromServer);
+
+  logicalPortInfo->client.currentIdL = authmgrCB->attrInfo.idFromServer;
+
+  /* update statistics */
+  authmgrStatsUpdate (physPort, callbackParams->method,
+                      authmgrStatsAuthSuccess);
+  return authmgrGenerateEvents (lIntIfNum);
+}
+
+/*********************************************************************
+* @purpose deletes all the authenticated clients using the method
+*
+* @param    intIfNum @b{(input)) internal interface number
+* @param    method @b{(input)) method for which entris are to be deleted
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientsByMethodDelete (uint32 intIfNum,
+                                       AUTHMGR_METHOD_t method)
+{
+  /* This function purges all the clients who are
+     authenticated using this method */
+  uint32 lIndex;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                       "%s:Deleting clients authenticated with method %d on Physical port-%d \n",
+                       __FUNCTION__, method, intIfNum);
+
+  lIndex = AUTHMGR_LOGICAL_PORT_ITERATE;
+  while ((logicalPortInfo =
+          authmgrLogicalPortInfoGetNextNode (intIfNum, &lIndex)) !=  NULLPTR)
+  {
+    if (logicalPortInfo->client.authenticatedMethod == method)
+    {
+      /* cleanup the client */
+      authmgrClientInfoCleanup (logicalPortInfo); 
+    }
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose interface function to hanlde auth method change event
+*
+* @param intIfNum internal interface number
+* @param callbackParams authentication callback params
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrStatusAuthModifyAction (uint32 intIfNum,
+                                       authmgrAuthRespParams_t * callbackParams)
+{
+   AUTHMGR_METHOD_t orderList[ AUTHMGR_METHOD_LAST];
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (callbackParams);
+
+  /* see if the method is disabled */
+
+  if ( FALSE == callbackParams->clientParams.info.enableStatus)
+  {
+    /* method is disabled. If enabled in the order,
+       delete all the authenticated clients and
+       remove the method from the order */
+    authmgrClientsByMethodDelete (intIfNum, callbackParams->method);
+  }
+
+  memcpy (orderList, authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority,
+      sizeof (orderList));
+  authmgrMethodModifyAction (intIfNum);
+
+  if (( AUTHMGR_METHOD_MAB == callbackParams->method) && 
+      ( AUTHMGR_PORT_AUTO == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode) &&
+      ( AUTHMGR_MULTI_HOST_MODE == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode) &&
+      (0 == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount))
+  {
+    if ( TRUE !=
+        authmgrListArrayCompare (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].
+          enabledMethods, orderList, sizeof(orderList)))
+    {
+      authmgrPortLearningModify(intIfNum);
+    }
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to handle auth status of all clients
+*
+* @param callbackParams  authentication callback param
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrStatusAuthModifyAllAction (authmgrAuthRespParams_t *
+                                          callbackParams)
+{
+  RC_t nimRc;
+  uint32 phyIntf;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (callbackParams);
+
+  /* loop through all the interfaces and initiate the changes */
+  nimRc = authmgrFirstValidIntfNumber (&phyIntf);
+  while (nimRc ==  SUCCESS)
+  {
+    /* clean up the hw info */
+    authmgrMethodModifyAction (phyIntf);
+
+    if ( DISABLE == callbackParams->clientParams.info.enableStatus)
+    {
+      authmgrClientsByMethodDelete (phyIntf, callbackParams->method);
+    }
+
+    nimRc = authmgrNextValidIntf (phyIntf, &phyIntf);
+  }
+  return  SUCCESS;
+}
+
+/*************************************************************************
+* @purpose  function to get function map entry for the given method
+*
+* @param    type  @b{(input)} method type
+* @param    elem @b{(input)}  Pointer to map entry
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*************************************************************************/
+RC_t authmgrStatusCalbackMapEntryGet ( AUTHMGR_STATUS_t type,
+                                         authmgrStatusMap_t * elem)
+{
+  uint32 i = 0;
+  static authmgrStatusMap_t authmgrStatusMap[] = {
+    { AUTHMGR_NEW_CLIENT, authmgrNewClientAction},
+    { AUTHMGR_AUTH_FAIL, authmgrStatusNotSuccessAction},
+    { AUTHMGR_AUTH_SUCCESS, authmgrStatusSuccessAction},
+    { AUTHMGR_AUTH_TIMEOUT, authmgrStatusNotSuccessAction},
+    { AUTHMGR_AUTH_SERVER_COMM_FAILURE, authmgrStatusServerCommFailAction},
+    { AUTHMGR_CLIENT_DISCONNECTED, authmgrStatusDisconnectAction},
+    { AUTHMGR_METHOD_CHANGE, authmgrStatusAuthModifyAction}
+  };
+
+  for (i = 0; i < (sizeof (authmgrStatusMap) / sizeof (authmgrStatusMap_t));
+       i++)
+  {
+    if (type == authmgrStatusMap[i].type)
+    {
+      *elem = authmgrStatusMap[i];
+      return  SUCCESS;
+    }
+  }
+
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose  Control function to handle the events received from methods
+*
+* @param    intIfNum       @b{(input)) internal interface number
+* @param    callbackParams       @b{(input)) status from the calling applications like
+   802.1X/MAB/CP
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientCallbackEventProcess (uint32 intIfNum,
+                                           authmgrAuthRespParams_t *
+                                           callbackParams)
+{
+  uint32 lIntIfNum = 0;
+   BOOL exists =  FALSE;
+  authmgrStatusMap_t entry;
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 physPort = 0, lPort = 0, type = 0;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  if ( NULLPTR == callbackParams)
+  {
+    return  FAILURE;
+  }
+
+  if ( AUTHMGR_METHOD_CHANGE == callbackParams->status)
+  {
+    if ( FALSE == callbackParams->clientParams.info.enableStatus)
+    {
+      /* Allow some time for methods to disable. Otherwise Ping-Pong will return "enabled" for 
+         disabled methods. However Ping-Pong should be optimized going forward and then this
+         delay should be taken out. */
+      osapiSleepMSec(100);
+    }
+
+    if ( ALL_INTERFACES == intIfNum)
+    {
+      authmgrStatusAuthModifyAllAction (callbackParams);
+    }
+    else
+    {
+      authmgrStatusAuthModifyAction (intIfNum, callbackParams);
+    }
+    return  SUCCESS;
+  }
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if ( DOT1X_PAE_PORT_AUTH_CAPABLE != authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities)
+  {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                       "Interface %d is not PAE capable port. Hence No action \n", intIfNum);
+      return  SUCCESS;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                       "%s Received Event - %s  and mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x)for method- %s \n",
+                       __FUNCTION__,
+                       authmgrMethodStatusStringGet (callbackParams->status),
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[0],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[1],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[2],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[3],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[4],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[5], authmgrMethodStringGet (callbackParams->method));
+
+  lIntIfNum = 0;
+  if (( AUTHMGR_AUTH_FAIL == callbackParams->status) ||
+      ( AUTHMGR_AUTH_TIMEOUT == callbackParams->status) ||
+      ( AUTHMGR_CLIENT_DISCONNECTED == callbackParams->status))
+  {
+    if (( SUCCESS != authmgrMacAddrInfoFind (&callbackParams->clientParams.info.authInfo.macAddr, 
+                                               &lIntIfNum)) ||
+        (0 == lIntIfNum))
+    {
+         AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                       "%s client is not present. Ignoring the result \n",
+                       __FUNCTION__);
+
+      /* client doesn't exist, ignoring the result 
+         for non existing client */
+       return  SUCCESS;
+    }
+    else
+    {
+      if ( NULLPTR != authmgrLogicalPortInfoGet (lIntIfNum))
+      {
+        /* get the key and unpack */
+        AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, lIntIfNum);
+
+        if (physPort != intIfNum)
+        {
+          /* Event is received for a client on differnt interface. Hence return  FAILURE. */
+           uchar8 ifNameEvent[ NIM_IF_ALIAS_SIZE + 1];
+           uchar8 ifNameClient[ NIM_IF_ALIAS_SIZE + 1];
+
+          nimGetIntfName (physPort,  ALIASNAME, ifNameClient);
+          nimGetIntfName (intIfNum,  ALIASNAME, ifNameEvent);
+
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                   "Event %s for the client %s is received on interface %s (intIfNum %d) but this client exists on the interface %s (intIfNum %d). "
+                   "Hence ignoring.", authmgrMethodStatusStringGet (callbackParams->status),
+                   AUTHMGR_PRINT_MAC_ADDR(callbackParams->clientParams.info.authInfo.macAddr.addr),
+                   ifNameEvent, intIfNum, ifNameClient, physPort);
+           LOGF ( LOG_SEVERITY_NOTICE,
+                   "Update for the client %s is received on interface %s (intIfNum %d) but this client exists on the interface %s (intIfNum %d).",
+                   AUTHMGR_PRINT_MAC_ADDR(callbackParams->clientParams.info.authInfo.macAddr.addr),
+                   ifNameEvent, intIfNum, ifNameClient, physPort);
+          return  FAILURE;
+        }
+        else
+        {
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                               "Received client is present on %d port. \n", intIfNum);
+        }
+      }
+    }
+  }
+ 
+  lIntIfNum = 0;
+
+  if ( AUTHMGR_CLIENT_DISCONNECTED == callbackParams->status)
+  {
+    if ( SUCCESS == authmgrMacAddrInfoFind (&callbackParams->clientParams.info.authInfo.macAddr, 
+                                              &lIntIfNum))
+    {
+      logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+      AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+
+
+    /* check if the client received is already authenticated */
+    if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+          logicalPortInfo->client.logicalPortStatus)
+    {
+      {
+
+        if (logicalPortInfo->client.authenticatedMethod !=
+            callbackParams->method)
+        {
+          /* check if the received method is of higher priority than the existing one */
+
+          if (( AUTHMGR_METHOD_NONE != logicalPortInfo->client.authenticatedMethod) &&
+              ( SUCCESS != authmgrPriorityPrecedenceValidate(intIfNum, 
+                                                               logicalPortInfo->client.authenticatedMethod,
+                                                               callbackParams->method)))
+          {
+            /* ignore the message for authentication 
+               priority over rules */
+            AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, intIfNum,
+                "%s, %d, Trigger from method %s received. "
+                "Client already authenticated with method %s for logicalInterface %d \n"
+                "Ignoring the request as client current auth method has higher priority than received\n",
+                __func__, __LINE__, authmgrMethodStringGet(callbackParams->method), 
+                authmgrMethodStringGet(logicalPortInfo->client.authenticatedMethod),lIntIfNum);
+            return  SUCCESS;
+          }
+        }
+      }
+    }
+      authmgrClientInfoCleanup (logicalPortInfo);
+    }
+    else
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                           "%s:Client not found in AuthMgr. Calling Disconnect "
+                           "for client with method %d on Physical port-%d \n",
+                           __FUNCTION__, callbackParams->method, intIfNum);
+      if ( NULLPTR !=
+          authmgrCB->globalInfo->authmgrCallbacks[callbackParams->method].eventNotifyFn)
+      {
+          (void)authmgrCB->globalInfo->authmgrCallbacks[callbackParams->method].eventNotifyFn
+          (intIfNum, authmgrClientDisconnect,
+           &callbackParams->clientParams.info.authInfo.macAddr);
+      }
+    }
+    return  SUCCESS;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, intIfNum,
+                       "\n%s:%d: Check Source Mac: %s Interface: %s \n",
+                       __FUNCTION__, __LINE__, 
+                       AUTHMGR_PRINT_MAC_ADDR(callbackParams->clientParams.info.authInfo.macAddr.addr),
+                       authmgrIntfIfNameGet(intIfNum));                       
+
+  /* check for the associated node */
+  /* search the Mac address in the list of clients on the port */
+  if (authmgrCheckMapPdu
+      (intIfNum, callbackParams->clientParams.info.authInfo.macAddr.addr,
+       &lIntIfNum, &exists) !=  SUCCESS)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, intIfNum,
+                         "Failed to Process the authmgrClientCallbackEvent \n");
+    if ( NULLPTR !=
+        authmgrCB->globalInfo->authmgrCallbacks[callbackParams->method].eventNotifyFn)
+    {
+        (void)authmgrCB->globalInfo->authmgrCallbacks[callbackParams->method].eventNotifyFn
+        (intIfNum, authmgrClientDisconnect,
+         &callbackParams->clientParams.info.authInfo.macAddr);
+    }
+    return  SUCCESS;
+  }
+
+  if ( TRUE == exists)
+  {
+    logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+    AUTHMGR_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+  }
+  else
+  {
+    logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+    AUTHMGR_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+    authmgrGenerateEvents (logicalPortInfo->key.keyNum);
+  }
+
+  if (0 != callbackParams->clientParams.info.authInfo.eapolVersion)
+  {
+    logicalPortInfo =  NULLPTR;
+
+    logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+    AUTHMGR_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                       "%s Status %s Received EAPoL version for mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x)using method- %s EAPoL Version - %d \n",
+                       __FUNCTION__,
+                       authmgrMethodStatusStringGet (callbackParams->status),
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[0],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[1],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[2],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[3],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[4],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[5], authmgrMethodStringGet (callbackParams->method),
+                       callbackParams->clientParams.info.authInfo.eapolVersion);
+
+    if (logicalPortInfo->client.rcvdEapolVersion != callbackParams->clientParams.info.authInfo.eapolVersion)
+    {
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                       "%s  Updating  EAPoL version for mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x) from version %d to version - %d \n",
+                       __FUNCTION__,
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[0],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[1],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[2],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[3],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[4],
+                       callbackParams->clientParams.info.authInfo.macAddr.
+                       addr[5],
+                       logicalPortInfo->client.rcvdEapolVersion,
+                       callbackParams->clientParams.info.authInfo.eapolVersion);
+
+      logicalPortInfo->client.rcvdEapolVersion = callbackParams->clientParams.info.authInfo.eapolVersion;
+    }
+  }
+
+  if (( AUTHMGR_AUTH_SUCCESS == callbackParams->status) ||
+      ( AUTHMGR_AUTH_FAIL == callbackParams->status) || 
+      ( AUTHMGR_AUTH_TIMEOUT == callbackParams->status))
+  {
+     uchar8 ifNameEvent[ NIM_IFNAME_SIZE + 1];
+    nimGetIntfName (intIfNum,  ALIASNAME, ifNameEvent);
+
+    if (AUTHMGR_HELD == logicalPortInfo->protocol.authState)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+               "Event %s for the client %s is received on interface %s (intIfNum %d) but this client is in HELD state. "
+               "Hence ignoring.", authmgrMethodStatusStringGet (callbackParams->status),
+               AUTHMGR_PRINT_MAC_ADDR(callbackParams->clientParams.info.authInfo.macAddr.addr),
+               ifNameEvent, intIfNum);
+
+      return  SUCCESS;
+    }
+
+    if ((AUTHMGR_AUTHENTICATED == logicalPortInfo->protocol.authState) && 
+       (logicalPortInfo->client.authenticatedMethod != callbackParams->method))
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+               "Event %s for the client %s is received on interface %s (intIfNum %d) "
+               "but this client's authenticated method (%s) is different from callback method (%s). "
+               "Hence ignoring.", authmgrMethodStatusStringGet (callbackParams->status),
+               AUTHMGR_PRINT_MAC_ADDR(callbackParams->clientParams.info.authInfo.macAddr.addr),
+               ifNameEvent, intIfNum, authmgrMethodStringGet (logicalPortInfo->client.authenticatedMethod),
+               authmgrMethodStringGet (callbackParams->method));
+
+      return  SUCCESS;
+    }
+  }
+
+  memset (&entry, 0, sizeof (authmgrStatusMap_t));
+  if ( SUCCESS !=
+      authmgrStatusCalbackMapEntryGet (callbackParams->status, &entry))
+  {
+    return  FAILURE;
+  }
+
+  return entry.statusFn (lIntIfNum, callbackParams);
+}
+
+/*********************************************************************
+* @purpose  Get the first operationally enabled method on a interface
+*
+* @param    intIfNum  @b{(input)) internal interface number
+* @param    nextMethod  @b{(output)) pointer to the next method
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrFirstMethodGet (uint32 intIfNum,
+                                AUTHMGR_METHOD_t * nextMethod)
+{
+  uint32 j;
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if ( AUTHMGR_METHOD_NONE ==
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[0])
+  {
+    return  FAILURE;
+  }
+
+  j = 0;
+  for (j =  AUTHMGR_METHOD_MIN; j <  AUTHMGR_METHOD_MAX; j++)
+  {
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[j] !=
+         AUTHMGR_METHOD_NONE)
+    {
+      *nextMethod =
+        authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[j];
+      return  SUCCESS;
+    }
+  }
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose  Get the next operationally enabled method on a interface
+*
+* @param    intIfNum  @b{(input)) internal interface number
+* @param    nextMethod  @b{(output)) pointer to the next method
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrNextMethodGet (uint32 intIfNum,
+                               AUTHMGR_METHOD_t * nextMethod)
+{
+  uint32 j;
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if ( AUTHMGR_METHOD_NONE ==
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[0])
+  {
+    return  FAILURE;
+  }
+
+  for (j =  AUTHMGR_METHOD_MIN; j <  AUTHMGR_METHOD_MAX; j++)
+  {
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[j] ==
+         AUTHMGR_METHOD_NONE)
+    {
+      return  FAILURE;
+    }
+    if ((*nextMethod ==
+         authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[j])
+        && ((j + 1) <  AUTHMGR_METHOD_MAX))
+    {
+      if ( AUTHMGR_METHOD_NONE !=
+          authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[j +
+                                                                          1])
+      {
+        *nextMethod =
+          authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[j +
+                                                                          1];
+        return  SUCCESS;
+      }
+      else
+      {
+        return  FAILURE;
+      }
+    }
+  }
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose  Get the next operationally enabled method on a interface
+*
+* @param    intIfNum  @b{(input)) internal interface number
+* @param    nextMethod  @b{(output)) pointer to the next method
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+
+RC_t authmgrEnabledMethodNextGet (uint32 intIfNum,
+                                      AUTHMGR_METHOD_t * nextMethod)
+{
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if ( AUTHMGR_METHOD_NONE ==
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[0])
+  {
+    return  FAILURE;
+  }
+
+  if ( AUTHMGR_METHOD_NONE == *nextMethod)
+  {
+    /* get the first method */
+    return authmgrFirstMethodGet (intIfNum, nextMethod);
+  }
+  else
+  {
+    return authmgrNextMethodGet (intIfNum, nextMethod);
+  }
+}
+
+/*********************************************************************
+* @purpose  Get the first operationally enabled method on a interface
+*
+* @param    intIfNum  @b{(input)) internal interface number
+* @param    nextPriority  @b{(output)) pointer to the next method
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+
+RC_t authmgrFirstPriorityGet (uint32 intIfNum,
+                                  AUTHMGR_METHOD_t * nextPriority)
+{
+  uint32 j;
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if ( AUTHMGR_METHOD_NONE ==
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[0])
+  {
+    return  FAILURE;
+  }
+
+  j = 0;
+  for (j =  AUTHMGR_METHOD_MIN; j <  AUTHMGR_METHOD_MAX; j++)
+  {
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[j] !=
+         AUTHMGR_METHOD_NONE)
+    {
+      *nextPriority =
+        authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[j];
+      return  SUCCESS;
+    }
+  }
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose  Get the next operationally enabled method on a interface
+*
+* @param    intIfNum  @b{(input)) internal interface number
+* @param    method  @b{(input))  input method for which next method is needed.
+* @param    nextPriority  @b{(output)) pointer to the next method
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+
+RC_t authmgrNextPriorityGet (uint32 intIfNum,
+                                 AUTHMGR_METHOD_t * nextPriority)
+{
+  uint32 j;
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if ( AUTHMGR_METHOD_NONE ==
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[0])
+  {
+    return  FAILURE;
+  }
+
+  j = 0;
+  for (j =  AUTHMGR_METHOD_MIN; j <  AUTHMGR_METHOD_MAX; j++)
+  {
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[j] ==
+         AUTHMGR_METHOD_NONE)
+    {
+      return  FAILURE;
+    }
+    if ((*nextPriority ==
+         authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[j])
+        && ((j + 1) <  AUTHMGR_METHOD_MAX))
+    {
+      if ( AUTHMGR_METHOD_NONE !=
+          authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[j +
+                                                                           1])
+      {
+        *nextPriority =
+          authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[j +
+                                                                           1];
+        return  SUCCESS;
+      }
+      else
+      {
+        return  FAILURE;
+      }
+    }
+  }
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose  Get the next operationally enabled method on a interface
+*
+* @param    intIfNum  @b{(input)) internal interface number
+* @param    method  @b{(input))  input method for which next method is needed.
+* @param    nextPriority  @b{(output)) pointer to the next method
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+
+RC_t authmgrEnabledPriorityNextGet (uint32 intIfNum,
+                                        AUTHMGR_METHOD_t * nextPriority)
+{
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if ( AUTHMGR_METHOD_NONE ==
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[0])
+  {
+    return  FAILURE;
+  }
+
+  if ( AUTHMGR_METHOD_NONE == *nextPriority)
+  {
+    /* get the first method */
+    return authmgrFirstPriorityGet (intIfNum, nextPriority);
+  }
+  else
+  {
+    return authmgrNextPriorityGet (intIfNum, nextPriority);
+  }
+}
+
+/*********************************************************************
+* @purpose  status function to update dot1x stats
+*
+* @param intIfNum interface number
+* @param status 
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrDot1xStatsUpdate (uint32 intIfNum,
+                                 authmgrStatsUpdate_t status)
+{
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  switch (status)
+  {
+  case authmgrStatsAuthEnter:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.
+      authEntersAuthenticating++;
+    break;
+
+  case authmgrStatsAuthSuccess:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.authSuccess++;
+    break;
+
+  case authmgrStatsAuthFail:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.authFailure++;
+    break;
+
+  case authmgrStatsAuthTimeout:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.authTimeout++;
+    break;
+
+  default:
+    break;
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose status function to update mab stats
+*
+* @param intIfNum interface number
+* @param status 
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrMabStatsUpdate (uint32 intIfNum, authmgrStatsUpdate_t status)
+{
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+  switch (status)
+  {
+  case authmgrStatsAuthEnter:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].mab.
+      authEntersAuthenticating++;
+    break;
+
+  case authmgrStatsAuthSuccess:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].mab.authSuccess++;
+    break;
+
+  case authmgrStatsAuthFail:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].mab.authFailure++;
+    break;
+
+  case authmgrStatsAuthTimeout:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].mab.authTimeout++;
+    break;
+
+  default:
+    break;
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose status function to update captive portal stats
+*
+* @param intIfNum interface number
+* @param status 
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCpStatsUpdate (uint32 intIfNum, authmgrStatsUpdate_t status)
+{
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+  switch (status)
+  {
+  case authmgrStatsAuthEnter:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].cp.
+      authEntersAuthenticating++;
+    break;
+
+  case authmgrStatsAuthSuccess:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].cp.authSuccess++;
+    break;
+
+  case authmgrStatsAuthFail:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].cp.authFailure++;
+    break;
+
+  case authmgrStatsAuthTimeout:
+    authmgrCB->globalInfo->authmgrPortStats[intIfNum].cp.authTimeout++;
+    break;
+
+  default:
+    break;
+  }
+  return  SUCCESS;
+}
+
+/*************************************************************************
+* @purpose  function to get function map entry for the given method
+*
+* @param    type  @b{(input)} method type
+* @param    elem @b{(input)}  Pointer to map entry
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*************************************************************************/
+RC_t authmgrAuthStatsMapEntryGet ( AUTHMGR_METHOD_t type,
+                                     authmgrStatsMap_t * elem)
+{
+  uint32 i = 0;
+  static authmgrStatsMap_t authmgrStatsMap[] = {
+    { AUTHMGR_METHOD_8021X, authmgrDot1xStatsUpdate},
+    { AUTHMGR_METHOD_MAB, authmgrMabStatsUpdate}
+  };
+
+  for (i = 0; i < (sizeof (authmgrStatsMap) / sizeof (authmgrStatsMap_t)); i++)
+  {
+    if (type == authmgrStatsMap[i].type)
+    {
+      *elem = authmgrStatsMap[i];
+      return  SUCCESS;
+    }
+  }
+
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose  Function to Update the statistics
+*
+* @param    intIfNum       @b{(input)) internal interface number
+* @param    method         @b{(input)) 802.1x/mab/cp
+* @param    status           @b{(input)) status 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments 
+*
+* @end
+*********************************************************************/
+RC_t authmgrStatsUpdate (uint32 intIfNum,
+                             AUTHMGR_METHOD_t method,
+                            authmgrStatsUpdate_t status)
+{
+  authmgrStatsMap_t entry;
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if ( SUCCESS != authmgrAuthStatsMapEntryGet (method, &entry))
+  {
+    return  FAILURE;
+  }
+
+  if ( NULLPTR != entry.statsFn)
+  {
+    return entry.statsFn (intIfNum, status);
+  }
+
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose function to map callbacks for the given method
+*
+* @param method authentication method
+* @param entry  auth mgr callback function map entry
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrRegisteredEntryFnMapGet ( AUTHMGR_METHOD_t method,
+                                        authmgrMethodCallbackNotifyMap_t *
+                                        entry)
+{
+  uint32 i = 0;
+
+  if ( AUTHMGR_METHOD_NONE == method)
+  {
+    return  FAILURE;
+  }
+
+  for (i = 0; i <  AUTHMGR_METHOD_LAST; i++)
+  {
+    if (method == authmgrCB->globalInfo->authmgrCallbacks[i].method)
+    {
+      *entry = authmgrCB->globalInfo->authmgrCallbacks[i];
+      return  SUCCESS;
+    }
+  }
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose function to check the entry and populate in the list
+*
+* @param intIfNum interface number
+* @param method authentication method
+* @param methodEnabled  TRUE if method is enabled 
+* @param out mehod value, if method is emabled 
+* @return   SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrOperListEntryPopulate (uint32 intIfNum,
+                                       AUTHMGR_METHOD_t method,
+                                       BOOL * methodEnabled,
+                                       AUTHMGR_METHOD_t * out)
+{
+  authmgrMethodCallbackNotifyMap_t entry;
+  uint32 enabled =  DISABLE;
+
+  memset (&entry, 0, sizeof (authmgrMethodCallbackNotifyMap_t));
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (methodEnabled);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (out);
+
+  if ( SUCCESS != authmgrRegisteredEntryFnMapGet (method, &entry))
+  {
+    return  FAILURE;
+  }
+
+  if ( NULLPTR == entry.enableGetFn)
+  {
+    return  FAILURE;
+  }
+
+  /* Explicitly releasing the locks temporarily
+     since , query is done for another component API
+     which contains readlocks. */
+
+  (void) osapiReadLockGive (authmgrCB->authmgrCfgRWLock);
+  (void) osapiWriteLockGive (authmgrCB->authmgrRWLock);
+  if (( SUCCESS == entry.enableGetFn (intIfNum, &enabled)) &&
+      ( ENABLE != enabled))
+  {
+    (void) osapiReadLockTake (authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+    (void) osapiWriteLockTake (authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+    *methodEnabled =  FALSE;
+    return  SUCCESS;
+  }
+
+  (void) osapiReadLockTake (authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  (void) osapiWriteLockTake (authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  *methodEnabled =  TRUE;
+
+  *out = method;
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  function to populate the oper enabled methods
+*
+* @param    intIfNum       @b{(input)) internal interface number
+* @param    inArray       @b{(input)) input list 
+* @param    outArray       @b{(output)) output list
+* @param    count       @b{(output)) enabled count 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The outArray should be memset before passing to the function
+*
+* @end
+*********************************************************************/
+RC_t authmgrEnabledListPopulate (uint32 intIfNum,
+                                     AUTHMGR_METHOD_t * inArray,
+                                     AUTHMGR_METHOD_t * outArray,
+                                    uint32 * count)
+{
+   BOOL flag =  FALSE;
+  uint32 i = 0, cnt = 0;
+    AUTHMGR_METHOD_t *pIn, *pOut;
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (inArray);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (outArray);
+
+  pIn = inArray;
+  pOut = outArray;
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                       "%s repopulating the enabled methods list\n",
+                       __FUNCTION__);
+
+  /* Loop through the configured methods
+     and maintain an oper list */
+
+  for (i = 0; i <  AUTHMGR_METHOD_MAX; i++)
+  {
+    if ( AUTHMGR_METHOD_NONE == *inArray)
+    {
+      break;
+    }
+
+    flag =  FALSE;
+
+    if ( SUCCESS !=
+        authmgrOperListEntryPopulate (intIfNum, *inArray, &flag, outArray))
+    {
+      break;
+    }
+
+    if (flag)
+    {
+      outArray++;
+      cnt++;
+    }
+    inArray++;
+  }
+
+  *count = cnt;
+  outArray = pOut;
+  inArray = pIn;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to handle changes in enabled auth method list
+*
+* @param intIfNum internal interface number
+* @param old old list
+* @param new updated list
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrEnableListChangeAction (uint32 intIfNum,
+                                        AUTHMGR_METHOD_t * old,
+                                        AUTHMGR_METHOD_t * new)
+{
+  uint32 i = 0, j = 0;
+   BOOL exists =  FALSE;
+   AUTHMGR_METHOD_t *temp =  NULLPTR;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (old);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (new);
+
+  /* no lists in the order */
+  while ((i <  AUTHMGR_METHOD_MAX) && ( AUTHMGR_METHOD_NONE != *old))
+  {
+    temp = old;
+    exists =  FALSE;
+    for (j = 0; j <  AUTHMGR_METHOD_MAX; j++)
+    {
+      if (*new == *old)
+      {
+        /* method is still present */
+        exists =  TRUE;
+        break;
+      }
+      temp++;
+    }
+    if (!(exists))
+    {
+      /* clean up all the clients in the list by method */
+      authmgrClientsByMethodDelete (intIfNum,
+                                    authmgrCB->globalInfo->
+                                    authmgrPortInfo[intIfNum].
+                                    enabledMethods[i]);
+    }
+    old++;
+    i++;
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Control function to populate the oper enabled methods
+*
+* @param    intIfNum       @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortEnabledListPopulate (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg =  NULLPTR;
+   BOOL orderChanged =  FALSE, priorityChanged =  FALSE;
+  uint32 count = 0, count1 = 0;
+   uchar8   ifName[  NIM_IF_ALIAS_SIZE + 1];
+
+   AUTHMGR_METHOD_t orderList[ AUTHMGR_METHOD_LAST];
+   AUTHMGR_METHOD_t priorityList[ AUTHMGR_METHOD_LAST];
+   AUTHMGR_METHOD_t zeroList[ AUTHMGR_METHOD_LAST];
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (pCfg);
+
+  if (nimGetIntfName (intIfNum,  ALIASNAME, ifName) !=  SUCCESS)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+        "Unable to get alias for intf %d", intIfNum);
+    return  FAILURE;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                       "%s repopulating the oper methods list for intf %s\n",
+                       __FUNCTION__, ifName);
+
+  /* take the read lock */
+  (void) osapiReadLockTake (authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  /* Loop through the configured methods
+     and maintain an oper list */
+
+  memset (orderList, 0, sizeof (orderList));
+  memset (priorityList, 0, sizeof (priorityList));
+  memset (zeroList, 0, sizeof (zeroList));
+
+  /* get the enabled order list */
+
+  if ( SUCCESS !=
+      authmgrEnabledListPopulate (intIfNum, &pCfg->methodList[0], &orderList[0],
+                                  &count))
+  {
+    (void) osapiReadLockGive (authmgrCB->authmgrCfgRWLock);
+    return  FAILURE;
+  }
+
+  if ( SUCCESS !=
+      authmgrEnabledListPopulate (intIfNum, &pCfg->priorityList[0],
+                                  &priorityList[0], &count1))
+  {
+    (void) osapiReadLockGive (authmgrCB->authmgrCfgRWLock);
+    return  FAILURE;
+  }
+
+  /* check if there is any change in the oper values */
+
+  if ( TRUE !=
+      authmgrListArrayCompare (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].
+                               enabledMethods, orderList, sizeof(orderList)))
+  {
+    orderChanged =  TRUE;
+  }
+
+  if ( TRUE !=
+      authmgrListArrayCompare (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].
+                               enabledPriority, priorityList, sizeof(priorityList)))
+  {
+    priorityChanged =  TRUE;
+  }
+
+  (void) osapiReadLockGive (authmgrCB->authmgrCfgRWLock);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+      "%s intf %s, orderChanged %d, priorityChanged %d\n",
+      __FUNCTION__, ifName, orderChanged, priorityChanged);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+      "%s %s -- cfgMethods[0] %d, cfgMethods[1] %d\n",
+      __FUNCTION__, ifName, pCfg->methodList[0],
+      pCfg->methodList[1]);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+      "%s %s -- generated list- methods[0] %d, methods[1] %d\n",
+      __FUNCTION__, ifName, orderList[0],
+      orderList[1]);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+      "%s %s current list- methods[0] %d, methods[1] %d\n",
+      __FUNCTION__, ifName, authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[0],
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[1]);
+
+  if (orderChanged)
+  {
+    if ( SUCCESS !=
+        authmgrEnableListChangeAction (intIfNum,
+                                       authmgrCB->globalInfo->
+                                       authmgrPortInfo[intIfNum].enabledMethods,
+                                       orderList))
+    {
+      return  FAILURE;
+    }
+
+    memcpy (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods,
+            orderList, sizeof (orderList));
+
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+        "%s enabledMethods[0] %d, enabledMethods[1] %d\n",
+        __FUNCTION__, authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[0],
+        authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[1]);
+
+      /* we may need to alter the violation policy
+         based on the new list  */
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+       "%s Updating learn mode of %s\n",  __FUNCTION__, ifName);
+
+    authmgrViolationPolicyApply(intIfNum); 
+    authmgrPortLearningModify(intIfNum);
+
+    if ( TRUE == authmgrListArrayCompare (priorityList, zeroList, sizeof(priorityList)))
+    {
+      memcpy (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority,
+              orderList, sizeof (orderList));
+    }
+    else if (priorityChanged)
+    {
+      memcpy (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority,
+              priorityList, sizeof (priorityList));
+    }
+
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethodCount = count;
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriorityCount =
+      count1;
+  }
+  else if (priorityChanged)
+  {
+    memcpy (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority,
+            priorityList, sizeof (priorityList));
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+      "%s Updating DB: enabledMethods[0] %d, enabledMethods[1] %d\n",
+      __FUNCTION__, authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[0],
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[1]);
+
+  /* Update Oper DB */
+
+  PacPortOperTblSet(intIfNum, 
+                    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods,
+                    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Control function to handle the authentication method order changes
+*
+* @param    intIfNum       @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrMethodOrderChangeProcess (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if ( TRUE != authmgrIntfIsConfigurable (intIfNum, &pCfg))
+  {
+    return  FAILURE;
+  }
+
+  /* populate the methods if and only if
+     the control mode is valid */
+
+  if ( AUTHMGR_PORT_AUTO == pCfg->portControlMode)
+  {
+    /* Just re-populate the interface enabled list */
+    authmgrPortEnabledListPopulate (intIfNum);
+  }
+  else
+  {
+			AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+													 "%s intf %d, Zeroing out methods for portControlMode %d\n",
+													 __FUNCTION__, intIfNum, pCfg->portControlMode);
+    /* just memset the methods */
+    memset (&authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods, 0,
+            sizeof (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].
+                    enabledMethods));
+    memset (&authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority,
+            0,
+            sizeof (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].
+                    enabledPriority));
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethodCount = 0;
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriorityCount = 0;
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to trigger authentication for a client.
+*
+* @param logicalPortInfo logical port structure
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAuthenticationTrigger (authmgrLogicalPortInfo_t *
+                                      logicalPortInfo)
+{
+  RC_t rc =  SUCCESS;
+  uint32 physPort = 0;
+   enetMacAddr_t zeroMac;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+  if ( AUTHMGR_METHOD_NONE == logicalPortInfo->client.currentMethod)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                         "logicalInterface %d failed to update %s to start authentication\n",
+                         logicalPortInfo->key.keyNum,
+                         authmgrMethodStringGet (logicalPortInfo->client.
+                                                 currentMethod));
+    rc =  FAILURE;
+  }
+
+  if (logicalPortInfo->client.currentMethod !=
+      authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.
+                                              currentMethod].method)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                         "logicalInterface %d failed to update %s to start authentication\n"
+                         "since the registered method is %s\n",
+                         logicalPortInfo->key.keyNum,
+                         authmgrMethodStringGet (logicalPortInfo->client.
+                                                 currentMethod),
+                         authmgrMethodStringGet (authmgrCB->globalInfo->
+                                                 authmgrCallbacks
+                                                 [logicalPortInfo->client.
+                                                  currentMethod].method));
+    rc =  FAILURE;
+  }
+
+  if ( NULLPTR ==
+      authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.
+                                              currentMethod].eventNotifyFn)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                         "logicalInterface %d failed to update %s to start authentication\n"
+                         "since the callback function is not registered method\n",
+                         logicalPortInfo->key.keyNum,
+                         authmgrMethodStringGet (logicalPortInfo->client.
+                                                 currentMethod));
+    rc =  FAILURE;
+  }
+
+  /* check if the client mac is all 0s.
+     If yes, no need to validate against MAB */
+
+  memset (&zeroMac, 0, sizeof ( enetMacAddr_t));
+  if ((0 ==
+      memcmp (zeroMac.addr,
+        logicalPortInfo->client.suppMacAddr.
+        addr,  ENET_MAC_ADDR_LEN)) && 
+        ( AUTHMGR_METHOD_MAB == 
+        logicalPortInfo->client.currentMethod))
+  {
+    rc =  FAILURE;
+  }
+
+  if (AUTHMGR_AUTHENTICATING != logicalPortInfo->protocol.authState)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, physPort,
+                        "client  with logicalInterface %d is in state %s.\n",
+          logicalPortInfo->key.keyNum, authmgrAuthStateStringGet(logicalPortInfo->protocol.authState));
+    return  SUCCESS;
+  }
+
+  if (( SUCCESS == rc) && ( NULLPTR != 
+      authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.
+                                              currentMethod].eventNotifyFn))
+  {
+    rc =
+      authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.
+                                              currentMethod].eventNotifyFn
+      (physPort, authmgrClientAuthStart,
+       &logicalPortInfo->client.suppMacAddr);
+    authmgrStatsUpdate (physPort, logicalPortInfo->client.currentMethod,
+                        authmgrStatsAuthEnter);
+
+     if ( SUCCESS == rc)
+     {
+       /* start the method_no_response timer. If this method doesn't 
+          report back the result, we will move to next method */
+          authmgrTimerStart (logicalPortInfo, AUTHMGR_METHOD_NO_RESP_TMR);
+     }
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose function to get the operationally enabled method count on an interface
+*
+* @param physPort internal interface number
+* @param count count
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortEnabledMethodCountGet (uint32 physPort, uint32 * count)
+{
+  *count = authmgrCB->globalInfo->authmgrPortInfo[physPort].enabledMethodCount;
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose updates the port pae capabilities
+*
+* @param   intIfNum
+* @param   mode  pae capabilities
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPaeCapabilitiesEventProcess (uint32 intIfNum, uint32 mode)
+{
+   uchar8                ifName[ NIM_IF_ALIAS_SIZE + 1];
+  RC_t rc =  FAILURE;
+
+  if (!(AUTHMGR_IS_READY))
+  {
+    return  SUCCESS;
+  }
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if (mode == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities)
+  {
+    return  SUCCESS;
+  }
+
+  if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities ==  DOT1X_PAE_PORT_AUTH_CAPABLE)
+  {
+    /* cleanup the clients on this port */
+    authmgrPortInfoCleanup (intIfNum);
+  }
+
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities = mode;
+
+  if ( DOT1X_PAE_PORT_AUTH_CAPABLE == mode)
+  {
+      /* enable authentication on this interface */
+      (void)authmgrCtlApplyPortConfigData(intIfNum);
+  }
+  else
+  {
+    authmgrIhPhysicalPortStatusSet(intIfNum,  AUTHMGR_PORT_STATUS_AUTHORIZED);
+    if (nimGetIntfName (intIfNum,  ALIASNAME, ifName) !=  SUCCESS)
+    {
+       LOGF ( LOG_SEVERITY_ERROR,
+               "Unable to get alias for intf %d", intIfNum);
+      return  FAILURE;
+    }
+
+    rc = authmgrPortPvidSet(intIfNum, 0);
+    if (rc !=  SUCCESS)
+    {
+       LOGF ( LOG_SEVERITY_ERROR,
+               "Unable to set PVID back to 0 for %d", intIfNum);
+    }
+
+    authmgrVlanReleasePort(intIfNum);
+
+    /* disable authentication on this interface */
+    if ( TRUE == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled)
+    {
+      authmgrPhysicalPortStatusOpenSet(intIfNum);
+    }
+    else
+    {
+      authmgrPhysicalPortStatusBlockSet(intIfNum);
+    }
+    
+    pacCfgVlanMemberRemove(1, ifName);
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose updates the port violation mode
+*
+* @param   intIfNum
+* @param   mode  violation mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrViolationModeSetAction (uint32 intIfNum,
+                                    AUTHMGR_PORT_AUTH_VIOLATION_MODE_t mode)
+{
+  if (!(AUTHMGR_IS_READY))
+  {
+    return  SUCCESS;
+  }
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if (mode == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].violationMode)
+  {
+    return  SUCCESS;
+  }
+
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].violationMode = mode;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose set max auth retry attempts on port
+*
+* @param   intIfNum
+* @param   intIfNum
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAuthFailMaxRetryCountSetAction (uint32 intIfNum,
+                                               uint32 count)
+{
+  if (!(AUTHMGR_IS_READY))
+  {
+    return  SUCCESS;
+  }
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if (count ==
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authFailRetryMaxCount)
+  {
+    return  SUCCESS;
+  }
+
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authFailRetryMaxCount =
+    count;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose interface function to clear all timers of specified type
+*
+* @param physIntf internal interface number
+* @param type timer type
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrInterfaceTimerReset (uint32 physIntf, authmgrTimerType_t type)
+{
+  uint32 lIndex = 0;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  lIndex = AUTHMGR_LOGICAL_PORT_ITERATE;
+  while ((logicalPortInfo =
+          authmgrLogicalPortInfoGetNextNode (physIntf, &lIndex)) !=  NULLPTR)
+  {
+    authmgrTimerDestroy (authmgrCB->globalInfo->authmgrTimerCB, logicalPortInfo,
+                         type);
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to clear all timers of specified type
+*
+* @param type timer type
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrTimerReset (authmgrTimerType_t type)
+{
+  RC_t nimRc;
+  uint32 phyIntf = 0;
+
+  /* loop through all the interfaces and initiate the changes */
+  nimRc = authmgrFirstValidIntfNumber (&phyIntf);
+  while (nimRc ==  SUCCESS)
+  {
+    /* clean up the timers on this interface info */
+    authmgrInterfaceTimerReset (phyIntf, type);
+    nimRc = authmgrNextValidIntf (phyIntf, &phyIntf);
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose interface funtion to handle the auth method changes
+*
+* @param intIfNum  internal interface number
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrMethodModifyAction (uint32 intIfNum)
+{
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+
+  authmgrMethodOrderChangeProcess (intIfNum);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to get the reauthentication period of client
+*
+* @param lIntfNum client interface number
+* @param val  value
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortReAuthPeriodGet (uint32 lIntfNum, uint32 * val)
+{
+  uint32 physPort = 0;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (val);
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntfNum);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_PORT_GET (physPort, lIntfNum);
+
+  if ( FALSE == authmgrCB->globalInfo->authmgrPortInfo[physPort].reAuthEnabled)
+  {
+    *val = 0;
+  }
+
+  if (authmgrCB->globalInfo->authmgrPortInfo[physPort].reAuthPeriodServer)
+  {
+    *val = logicalPortInfo->client.sessionTimeout;
+  }
+  else
+  {
+    authmgrReAuthPeriodGet (physPort, val);
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose interface level function to restart timers
+*
+* @param phyIntf interface number
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrIntfAuthClientsTimersRestart (uint32 phyIntf)
+{
+  uint32 lIntIfNum;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  /* Authenticator timer actions */
+  if (authmgrCB->globalInfo->authmgrPortInfo[phyIntf].paeCapabilities ==
+       DOT1X_PAE_PORT_AUTH_CAPABLE)
+  {
+    lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+    while ((logicalPortInfo =
+            authmgrLogicalPortInfoGetNextNode (phyIntf,
+                                               &lIntIfNum)) !=  NULLPTR)
+    {
+      if ((logicalPortInfo->key.keyNum !=  0) &&
+          ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+           logicalPortInfo->client.logicalPortStatus))
+      {
+        if (authmgrCB->globalInfo->authmgrPortInfo[phyIntf].portEnabled ==
+             TRUE
+            && (authmgrCB->globalInfo->authmgrPortInfo[phyIntf].
+                portControlMode ==  AUTHMGR_PORT_AUTO))
+        {
+          if ( TRUE == authmgrCB->globalInfo->authmgrPortInfo[phyIntf].reAuthEnabled)
+          {
+            /* Start the reauthentication timer */
+            authmgrTimerStart (logicalPortInfo, AUTHMGR_REAUTH_WHEN);
+          }
+        }
+      }
+    }
+  }
+}
+
+/*********************************************************************
+* @purpose function to restart all the timers
+*
+* @param  none
+* @returns  none
+*
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrAuthClientsTimersRestart ()
+{
+  RC_t nimRc =  SUCCESS;
+  uint32 phyIntf = 0;
+
+  nimRc = authmgrFirstValidIntfNumber (&phyIntf);
+  while (nimRc ==  SUCCESS)
+  {
+    /* Authenticator timer actions */
+    if (authmgrCB->globalInfo->authmgrPortInfo[phyIntf].paeCapabilities ==
+         DOT1X_PAE_PORT_AUTH_CAPABLE)
+    {
+      authmgrIntfAuthClientsTimersRestart (phyIntf);
+    }
+    nimRc = authmgrNextValidIntf (phyIntf, &phyIntf);
+  }
+}
+
+/*********************************************************************
+* @purpose function to start timers on an interface
+*
+* @param phyIntf interface number
+* @param type timer type
+* @param flag start or stop
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrIntfClientsTimerStart (uint32 phyIntf, authmgrTimerType_t type,
+                                    BOOL flag)
+{
+  uint32 lIntIfNum;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  /* Authenticator timer actions */
+  if (authmgrCB->globalInfo->authmgrPortInfo[phyIntf].paeCapabilities ==
+       DOT1X_PAE_PORT_AUTH_CAPABLE)
+  {
+    lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+    while ((logicalPortInfo =
+            authmgrLogicalPortInfoGetNextNode (phyIntf,
+                                               &lIntIfNum)) !=  NULLPTR)
+    {
+      if (logicalPortInfo->key.keyNum !=  0)
+      {
+        if (authmgrCB->globalInfo->authmgrPortInfo[phyIntf].portEnabled ==
+             TRUE
+            && (authmgrCB->globalInfo->authmgrPortInfo[phyIntf].
+                portControlMode ==  AUTHMGR_PORT_AUTO))
+        {
+          if ( TRUE == flag)
+          {
+            authmgrTimerStart (logicalPortInfo, type);
+          }
+          else
+          {
+            authmgrTimerDestroy (authmgrCB->globalInfo->authmgrTimerCB,
+                                 logicalPortInfo, type);
+          }
+        }
+      }
+    }
+  }
+}
+
+/*********************************************************************
+* @purpose Function to start all timers of the given type
+*
+* @param type timer type
+* @param flag start or stop
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrAllTimersStart (authmgrTimerType_t type,  BOOL flag)
+{
+  RC_t nimRc =  SUCCESS;
+  uint32 phyIntf = 0;
+
+  nimRc = authmgrFirstValidIntfNumber (&phyIntf);
+  while (nimRc ==  SUCCESS)
+  {
+    /* Authenticator timer actions */
+
+    if (authmgrCB->globalInfo->authmgrPortInfo[phyIntf].paeCapabilities ==
+         DOT1X_PAE_PORT_AUTH_CAPABLE) 
+    {
+      authmgrIntfClientsTimerStart (phyIntf, type, flag);
+    }
+    nimRc = authmgrNextValidIntf (phyIntf, &phyIntf);
+  }
+}
+
+/*********************************************************************
+ * @purpose  Enable administrative mode setting for authmgr
+ *
+ * @param    none
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrCtlAdminModeEnable()
+{
+  uint32 intIfNum;
+/*   uchar8  paeCapabilities = 0; */
+  RC_t nimRc;
+  authmgrPortCfg_t *pCfg;
+
+  if (!(AUTHMGR_IS_READY))
+    return  SUCCESS;
+
+  /* Initialize the auth mgr global data */
+  authmgrGlobalInfoPopulate();
+
+  /* Register for time ticks with appTimer */
+  authmgrCB->globalInfo->authmgrTimerCB =
+    appTimerInit ( AUTHMGR_COMPONENT_ID, authmgrTimerExpiryHdlr,  NULLPTR,
+         APP_TMR_1SEC,
+        authmgrCB->globalInfo->authmgrAppTimerBufferPoolId);
+
+  auth_mgr_eap_socket_create(&authmgrCB->globalInfo->eap_socket);
+
+  nimRc = authmgrFirstValidIntfNumber(&intIfNum);
+  while (nimRc ==  SUCCESS)
+  {
+    if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+      return  FAILURE;
+
+
+    (void)authmgrPortInfoInitialize(intIfNum, TRUE);
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities ==  DOT1X_PAE_PORT_AUTH_CAPABLE)
+    {
+      (void)authmgrCtlApplyPortConfigData(intIfNum);
+    }
+    else
+    {
+      if ( TRUE == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled)
+      {
+        authmgrPhysicalPortStatusOpenSet(intIfNum);
+      }
+      else
+      {
+        authmgrPhysicalPortStatusBlockSet(intIfNum);
+      }
+    }
+    nimRc = authmgrNextValidIntf( intIfNum, &intIfNum);
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Disable administrative mode setting for authmgr
+ *
+ * @param    none
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrCtlAdminModeDisable()
+{
+  uint32 phyIntf;
+ RC_t nimRc;
+
+  if (!(AUTHMGR_IS_READY))
+  {
+    return  SUCCESS;
+  }
+
+  nimRc = authmgrFirstValidIntfNumber(&phyIntf);
+
+  while (nimRc ==  SUCCESS)
+  {
+    authmgrPortInfoCleanup(phyIntf);
+    authmgrPhysicalPortAccessSet(phyIntf);
+    memset(&authmgrCB->globalInfo->authmgrPortInfo[phyIntf].enabledMethods[0],
+        0, sizeof(authmgrCB->globalInfo->authmgrPortInfo[phyIntf].enabledMethods));
+
+    nimRc = authmgrNextValidIntf(phyIntf, &phyIntf);
+  }
+
+  /* stop the timer */
+  if ( NULLPTR != authmgrCB->globalInfo->authmgrTimerCB)
+  {
+    (void) appTimerDeInit (authmgrCB->globalInfo->authmgrTimerCB);
+    authmgrCB->globalInfo->authmgrTimerCB =  NULLPTR;
+  }
+
+  memset(&authmgrCB->globalInfo->authmgrVlanMask, 0, sizeof( VLAN_MASK_t));
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Initialize the Authmgr Port Structure with Default Values
+*
+* @param    intIfNum  @b{(input))  internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortInfoInitialize(uint32 intIfNum,  BOOL flag)
+{
+  authmgrPortCfg_t *pCfg;
+  uint32 linkState, adminState, maxUsers = 0;
+   ushort16 oldPvid = 0;
+   char8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  RC_t rc;
+   AUTHMGR_PORT_CONTROL_t cfgPortControlMode =  AUTHMGR_PORT_CONTROL_INVALID;
+   AUTHMGR_HOST_CONTROL_t cfgHostMode =  AUTHMGR_INVALID_HOST_MODE;
+   uchar8 capabilities =  DOT1X_PAE_PORT_NONE_CAPABLE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  /* clean up previous info */
+  oldPvid = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].pvid;
+  if (oldPvid)
+  {
+    rc = authmgrPortPvidSet(intIfNum, 0);
+    if (rc !=  SUCCESS)
+    {
+      if (nimGetIntfName (intIfNum,  ALIASNAME, ifName) !=  SUCCESS)
+      {
+         LOGF ( LOG_SEVERITY_ERROR,
+                 "Unable to get alias for intf %s", authmgrIntfIfNameGet(intIfNum));
+        return  FAILURE;
+      }
+       LOGF ( LOG_SEVERITY_INFO,
+               "Unable to set PVID back to 0 for %s", ifName);
+    }
+  }
+
+  memset(&authmgrCB->globalInfo->authmgrPortInfo[intIfNum], 0, sizeof(authmgrPortInfo_t));
+
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].maxUsers           =  AUTHMGR_MAX_USERS_PER_PORT;
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].numUsers           = 0;
+
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].initialize         =  FALSE;
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authVlan         =  0;
+
+  if ( (nimGetIntfLinkState(intIfNum, &linkState) ==  SUCCESS) && (linkState ==  UP) &&
+       (nimGetIntfAdminState(intIfNum, &adminState) ==  SUCCESS) && (adminState ==  ENABLE) )
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled =  TRUE;
+  else
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled =  FALSE;
+
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount                = 0;
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portStatus               =  AUTHMGR_PORT_STATUS_UNAUTHORIZED;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+   cfgPortControlMode = pCfg->portControlMode;
+   cfgHostMode = pCfg->hostMode;
+   capabilities = pCfg->paeCapabilities;
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+
+  /* Copy config data into operational data */
+  if (cfgPortControlMode !=  AUTHMGR_PORT_AUTO)
+  {
+      AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_EVENTS,intIfNum,
+          "Setting the max users to %d on interface %d. Current port control mode is not Auto \n",
+           1, intIfNum);
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].maxUsers =  1;
+  }
+  else
+  {
+    if ( SUCCESS != authmgrMaxUsersGet(intIfNum, &maxUsers))
+    {
+      AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE,intIfNum,
+          "Unable to retrieve the max users. Current host mode is %s \n",
+          authmgrHostModeStringGet(cfgHostMode));
+    }
+    else
+    {
+      AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_EVENTS,intIfNum,
+          "Setting the max users to %d on interface %d. Current host mode is %s \n",
+          maxUsers, intIfNum, authmgrHostModeStringGet(cfgHostMode));
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].maxUsers = maxUsers;
+    }
+  }
+
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].quietPeriod = pCfg->quietPeriod;
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthPeriod = pCfg->reAuthPeriod;
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthPeriodServer = pCfg->reAuthPeriodServer;
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthEnabled = pCfg->reAuthEnabled;
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authFailRetryMaxCount = pCfg->maxAuthAttempts;
+
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+
+  /* Get the PAE capabilities */ 
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities = capabilities;
+    
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set values of the Logical Authmgr Port Structure
+*           with Default Values of port it belongs to
+*
+* @param    logicalPortInfo  @b{(input))  Logical port Info
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortInfoInit(uint32 lIntIfNum)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 physPort = 0, lPort = 0, type = 0, vlanId = 0;
+
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  AUTHMGR_LPORT_KEY_UNPACK(physPort, lPort, type, logicalPortInfo->key.keyNum);
+  AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_CLIENT, physPort,
+                        "%s:Resetting information for linterface = %d . \n",
+                        __FUNCTION__, lPort);
+
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED == logicalPortInfo->client.logicalPortStatus)
+  {
+    /* Clean up the client hw info */
+    AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_CLIENT,physPort,
+        "\n%s:Cleaning up hw info for linterface = %d\n",
+        __FUNCTION__,lIntIfNum);
+
+    if ( SUCCESS != authmgrClientHwInfoCleanup(logicalPortInfo))
+    {
+      AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE,physPort,
+          "\n%s:Resetting client hw settings for linterface = %d failed. \n",
+          __FUNCTION__, lIntIfNum);
+    }
+  }
+
+  memset(&logicalPortInfo->protocol, 0, sizeof(authmgrProtocolInfo_t));
+  memset(&logicalPortInfo->client, 0, sizeof(authmgrClientInfo_t));
+
+  uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1] = {'\0'};
+
+  if (nimGetIntfName(physPort,  ALIASNAME, ifName) ==  SUCCESS)
+  {
+    pacCfgPortPVIDGet(ifName, &vlanId);
+  }
+
+ 
+  logicalPortInfo->client.vlanId         = vlanId;
+  logicalPortInfo->client.vlanType       = AUTHMGR_VLAN_DEFAULT;
+  logicalPortInfo->client.rcvdEapolVersion =  DOT1X_PAE_PORT_PROTOCOL_VERSION_2;
+  authmgrStateMachineClassifier(authmgrInitialize, logicalPortInfo->key.keyNum); 
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Populate Auth Manager Global Info structure
+*
+* @param    none
+*
+* @returns  none
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrGlobalInfoPopulate()
+{
+  memset(&authmgrCB->globalInfo->authmgrVlanMask, 0, sizeof( VLAN_MASK_t));
+}
+
+
+RC_t authmgrVlanClientsCleanup(uint32 vlanId)
+{
+  uint32 intIfNum = 0, lIntIfNum = 0;
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  RC_t nimRc =  SUCCESS;
+
+  nimRc = authmgrFirstValidIntfNumber (&intIfNum);
+  while (nimRc ==  SUCCESS)
+  {
+    if ((0 != authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount)
+        && ( AUTHMGR_PORT_AUTO ==
+          authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode))
+    {
+      lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+      while ((logicalPortInfo =
+            authmgrLogicalPortInfoGetNextNode (intIfNum,
+              &lIntIfNum)) !=  NULLPTR)
+      {
+        if (vlanId == logicalPortInfo->client.vlanId)
+        {
+          authmgrClientInfoCleanup(logicalPortInfo);
+        }
+      }
+    }
+    nimRc = authmgrNextValidIntf (intIfNum, &intIfNum);
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  To close the authenticated sessions gracefully.
+*
+*
+* @returns    SUCCESS
+* @returns    FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrTerminateAuthSessions()
+{
+  uint32                intIfNum = 0, lIntIfNum = 0, mgmtUnit = 0;
+  RC_t                  rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  nimUSP_t                 usp;
+
+  /* Get the first Valid Interface and cleanup the authentication sessions 
+   * belongs to this unit.
+   */
+  rc = authmgrFirstValidIntfNumber(&intIfNum);
+  while (rc ==  SUCCESS)
+  {
+    memset((void *)&usp, 0, sizeof(nimUSP_t));
+    if(nimGetUnitSlotPort(intIfNum, &usp) ==  SUCCESS)
+    {
+      if (usp.unit != ( uchar8)mgmtUnit)
+      {
+        rc = authmgrNextValidIntf(intIfNum, &intIfNum);
+        continue;  
+      }
+    }
+    else
+    {
+       rc = authmgrNextValidIntf(intIfNum, &intIfNum);
+       continue;
+    }
+
+    lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled =  FALSE;
+    while ( NULLPTR != 
+           (logicalPortInfo = authmgrLogicalPortInfoGetNextNode (intIfNum, &lIntIfNum)))
+    {
+      if (0 != logicalPortInfo->key.keyNum)
+      {
+        if ( AUTHMGR_PORT_STATUS_AUTHORIZED == logicalPortInfo->client.logicalPortStatus)
+        {
+          AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_API_CALLS,intIfNum,
+               "%s Auth Manager Cleanup the client session %d on port %s\n",
+               __FUNCTION__, logicalPortInfo->key.keyNum, authmgrIntfIfNameGet(intIfNum));
+
+          (void)authmgrClientInfoCleanup(logicalPortInfo);
+        }
+      }
+    }
+    rc = authmgrNextValidIntf(intIfNum, &intIfNum);
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Reset port information
+*
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    initialize @b{(input)) initialize value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value is set to  TRUE by management in order to force
+*           initialization of a port.  It is re-set to  FALSE after
+*           initialization has completed.
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortReset(uint32 intIfNum,  BOOL initialize)
+{
+  RC_t rc =  SUCCESS;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                       "%s:Intialize physical port's oper values with default -%d \n", __FUNCTION__,
+                       intIfNum);
+
+  authmgrPortInfoCleanup (intIfNum);
+  authmgrPortCtrlModeSet (intIfNum, FD_AUTHMGR_PORT_MODE);
+  authmgrIntfOperBuildDefault(intIfNum);
+
+  return rc;
+}
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_debug.c b/src/sonic-pac/authmgr/mapping/auth_mgr_debug.c
new file mode 100755
index 00000000000..cc1cb8df2c5
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_debug.c
@@ -0,0 +1,1409 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "auth_mgr_include.h"
+#include <netinet/in.h>
+#include <arpa/inet.h>
+#include "auth_mgr_struct.h"
+#include "auth_mgr_api.h"
+#include "auth_mgr_timer.h"
+
+extern authmgrCB_t *authmgrCB;
+
+#define AUTHMGR_DEBUG_PACKET_RX_FORMAT     "Pkt RX - Intf: %s (%d,%s),SrcMac: %s DestMac: %s Type: %s\n"
+#define AUTHMGR_DEBUG_PACKET_RX_EAP_FORMAT "Pkt RX - Intf: %s (%d,%s),SrcMac: %s DestMac: %s Type: %s Code: %s Id:%d\n"
+#define AUTHMGR_DEBUG_PACKET_TX_FORMAT     "Pkt TX - Intf: %s (%d,%s),SrcMac: %s DestMac: %s Type: %s Code: %s\n"
+#define AUTHMGR_DEBUG_PACKET_TX_EAP_FORMAT "Pkt TX - Intf: %s (%d,%s),SrcMac: %s DestMac: %s Type: %s Code: %s Id:%d\n"
+
+ BOOL authmgrDebugPacketTraceTxFlag =  FALSE;
+ BOOL authmgrDebugPacketTraceRxFlag =  FALSE;
+uint32 authmgrDebugTraceFlag = 0;
+uint32 authmgrDebugTraceIntf = 0;
+
+/*  Function prototypes */
+void authmgrBuildTestIntfConfigData (authmgrPortCfg_t * pCfg,  ushort16 seed);
+void authmgrConfigDataTestShow (void);
+
+
+/*********************************************************************
+* @purpose  Display the number of messages in the authmgr message queues
+*
+* @param  none
+*
+* @returns  void
+*
+* @comments devshell command
+*
+* @end
+*********************************************************************/
+void authmgrDebugMsgQueue ()
+{
+   int32 num;
+
+  if (osapiMsgQueueGetNumMsgs (authmgrCB->authmgrBulkQueue, &num) ==  SUCCESS)
+  {
+    SYSAPI_PRINTF (
+                   "Authmgr Messages in bulk queue: %d\n", num);
+  }
+
+  if (osapiMsgQueueGetNumMsgs (authmgrCB->authmgrQueue, &num) ==  SUCCESS)
+  {
+    SYSAPI_PRINTF (
+                   "Authmgr Messages in queue: %d\n", num);
+  }
+}
+
+/*********************************************************************
+* @purpose  Display the ID of the authmgr Trace Buffer
+*
+* @param none
+*
+* @returns  void
+*
+* @comments devshell command
+*
+* @end
+*********************************************************************/
+void authmgrDebugTraceIdGet ()
+{
+  SYSAPI_PRINTF (
+                 "Trace Id in use for authmgr is %d\n",
+                 authmgrCB->globalInfo->authmgrInfo.traceId);
+  SYSAPI_PRINTF (
+                 "Use devshell traceBlockStart(traceId) and traceBlockStop(traceId)\n");
+}
+
+/*********************************************************************
+* @purpose  Display the sizes of the authmgr structures
+*
+* @param none
+*
+* @returns  void
+*
+* @comments devshell command
+*
+* @end
+*********************************************************************/
+void authmgrDebugSizesShow ()
+{
+  SYSAPI_PRINTF (
+                 "AUTHMGR Data Structures:\r\n");
+  SYSAPI_PRINTF (
+                 "----------------------\r\n");
+  SYSAPI_PRINTF (
+                 "sizeof authmgrCB->globalInfo = %zd\r\n",
+                 sizeof (authmgrGlobalInfo_t));
+  SYSAPI_PRINTF (
+                 "sizeof authmgrPortInfo_t  = %zd\r\n",
+                 sizeof (authmgrPortInfo_t));
+  SYSAPI_PRINTF (
+                 "sizeof authmgrPortStats_t = %zd\r\n",
+                 sizeof (authmgrPortStats_t));
+  SYSAPI_PRINTF (
+                 "sizeof authmgrCfg_t       = %zd\r\n", sizeof (authmgrCfg_t));
+  SYSAPI_PRINTF (
+                 " MAX_PORT_COUNT       = %d\r\n",  MAX_PORT_COUNT);
+  SYSAPI_PRINTF (
+                 " AUTHMGR_INTF_MAX_COUNT = %d\r\n",
+                  AUTHMGR_INTF_MAX_COUNT);
+}
+
+/*********************************************************************
+* @purpose  Display the config info for the specified port
+*
+* @param    intIfNum @b{(input)) internal interface number
+*
+* @returns  void
+*
+* @comments devshell command
+*
+* @end
+*********************************************************************/
+void authmgrDebugPortCfgShow (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    SYSAPI_PRINTF (
+                   "intIfNum(%d) is not a valid authmgr interface\r\n",
+                   intIfNum);
+    return;
+  }
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    SYSAPI_PRINTF (
+                   "intIfNum(%d) is not a valid authmgr interface\r\n",
+                   intIfNum);
+    return;
+  }
+
+  SYSAPI_PRINTF (
+                 "AUTHMGR Cfg Info for port %d:\r\n", intIfNum);
+  SYSAPI_PRINTF (
+                 "--------------------------\r\n");
+
+  SYSAPI_PRINTF (
+                 "portControlMode           = %d", pCfg->portControlMode);
+  switch (pCfg->portControlMode)
+  {
+  case  AUTHMGR_PORT_FORCE_UNAUTHORIZED:
+    {
+      SYSAPI_PRINTF (
+                     " Force Unauthorized\r\n");
+    }
+    break;
+  case  AUTHMGR_PORT_AUTO:
+    {
+      SYSAPI_PRINTF (" Auto\r\n");
+    }
+    break;
+  case  AUTHMGR_PORT_FORCE_AUTHORIZED:
+    {
+      SYSAPI_PRINTF (
+                     " Force Authorized\r\n");
+    }
+    break;
+  default:
+    {
+      SYSAPI_PRINTF (" Unknown\r\n");
+    }
+    break;
+  }
+
+  SYSAPI_PRINTF (
+                 "hostMode               = %s\r\n",
+                 authmgrHostModeStringGet (pCfg->hostMode));
+
+  SYSAPI_PRINTF (
+                 "quietPeriod               = %d\r\n", pCfg->quietPeriod);
+  SYSAPI_PRINTF (
+                 "reAuthPeriod              = %d\r\n", pCfg->reAuthPeriod);
+
+  SYSAPI_PRINTF (
+                 "reAuthEnabled             = %d\r\n", pCfg->reAuthEnabled);
+
+  SYSAPI_PRINTF (
+                 "reAuthServerEnabled       = %d", pCfg->reAuthPeriodServer);
+  if (authmgrCB->globalInfo->authmgrCfg->authmgrPortCfg[intIfNum].
+      reAuthEnabled ==  TRUE)
+  {
+    SYSAPI_PRINTF (" True\r\n");
+  }
+  else if (pCfg->reAuthEnabled ==  FALSE)
+  {
+    SYSAPI_PRINTF (" False\r\n");
+  }
+  else
+  {
+    SYSAPI_PRINTF (" Unknown\r\n");
+  }
+
+
+  SYSAPI_PRINTF (
+                 "Auth Server port Max Auth attempts = %d\r\n", pCfg->maxAuthAttempts);
+
+}
+
+/*********************************************************************
+* @purpose  Display the status info for the specified port
+*
+* @param    lIntIfNum @b{(input)) Logical internal interface number
+*
+* @returns  void
+*
+* @comments devshell command
+*
+* @end
+*********************************************************************/
+void authmgrDebugPortMacInfoShow (uint32 lIntIfNum)
+{
+   uchar8 buf[64];
+   uchar8 zeroV6[16];
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  uint32 physPort = 0, lPort = 0, type = 0;
+
+  authmgrLogicalPortInfoTakeLock ();
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+  if (logicalPortInfo ==  NULLPTR)
+  {
+    authmgrLogicalPortInfoGiveLock ();
+    return;
+  }
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, lIntIfNum);
+
+  if (authmgrIsValidIntf (physPort) !=  TRUE)
+  {
+    SYSAPI_PRINTF (
+                   "intIfNum is not a valid authmgr interface(%d)\r\n",
+                   physPort);
+    authmgrLogicalPortInfoGiveLock ();
+    return;
+  }
+
+  SYSAPI_PRINTF (
+                 "AUTHMGR Info for port %d Phy port(%d) :\r\n", lIntIfNum,
+                 physPort);
+  SYSAPI_PRINTF (
+                 "------------------------------\r\n");
+
+  if (0 == logicalPortInfo->key.keyNum)
+  {
+    SYSAPI_PRINTF ("Port is in Use\r\n");
+  }
+  else
+  {
+    SYSAPI_PRINTF ("Port Not in Use\r\n");
+  }
+
+  SYSAPI_PRINTF (
+                 "Port Status               = %d\n",
+                 logicalPortInfo->client.logicalPortStatus);
+
+  SYSAPI_PRINTF (
+                 "\n\rTimers operational \n\r");
+
+  SYSAPI_PRINTF (
+                 "---------- --------------- --------------- ---------- --------------\n\r");
+
+  SYSAPI_PRINTF (
+                 "%s\n",
+                 authmgrTimerTypeStringGet (logicalPortInfo->authmgrTimer.cxt.
+                                            type));
+
+  SYSAPI_PRINTF (
+                 "auth state %s \r\n",
+                 authmgrAuthStateStringGet (logicalPortInfo->protocol.
+                                            authState));
+
+  if (logicalPortInfo->client.serverStateLen > 0)
+  {
+    uint32 i;
+    SYSAPI_PRINTF (
+                   "serverState               = ");
+    for (i = 0; i < logicalPortInfo->client.serverStateLen; i++)
+    {
+      SYSAPI_PRINTF (
+                     "%02X", logicalPortInfo->client.serverState[i]);
+    }
+    SYSAPI_PRINTF ("\r\n");
+  }
+  else
+  {
+    SYSAPI_PRINTF (
+                   "serverState               = NULL\r\n");
+  }
+
+  if (logicalPortInfo->client.serverClassLen > 0)
+  {
+    uint32 i;
+    SYSAPI_PRINTF (
+                   "serverClass               = ");
+    for (i = 0; i < logicalPortInfo->client.serverClassLen; i++)
+    {
+      SYSAPI_PRINTF (
+                     "%02X", logicalPortInfo->client.serverClass[i]);
+    }
+    SYSAPI_PRINTF ("\r\n");
+  }
+  else
+  {
+    SYSAPI_PRINTF (
+                   "serverClass               = NULL\r\n");
+  }
+
+  SYSAPI_PRINTF (
+                 "sessionTimeout            = %d\r\n",
+                 logicalPortInfo->client.sessionTimeout);
+
+  SYSAPI_PRINTF (
+                 "terminationAction         = %d\r\n",
+                 logicalPortInfo->client.terminationAction);
+
+  memset (buf, 0, 32);
+  osapiSnprintf (( char8 *) buf, sizeof (buf),
+                 "%02X:%02X:%02X:%02X:%02X:%02X",
+                 logicalPortInfo->client.suppMacAddr.addr[0],
+                 logicalPortInfo->client.suppMacAddr.addr[1],
+                 logicalPortInfo->client.suppMacAddr.addr[2],
+                 logicalPortInfo->client.suppMacAddr.addr[3],
+                 logicalPortInfo->client.suppMacAddr.addr[4],
+                 logicalPortInfo->client.suppMacAddr.addr[5]);
+  SYSAPI_PRINTF (
+                 "suppMacAddr               = %s\r\n", buf);
+
+  SYSAPI_PRINTF (
+                 "reAuthenticating          = %d",
+                 logicalPortInfo->client.reAuthenticating);
+  if (logicalPortInfo->client.reAuthenticating ==  TRUE)
+  {
+    SYSAPI_PRINTF (" True\r\n");
+  }
+  else if (logicalPortInfo->client.reAuthenticating ==  FALSE)
+  {
+    SYSAPI_PRINTF (" False\r\n");
+  }
+  else
+  {
+    SYSAPI_PRINTF (" Unknown\r\n");
+  }
+
+  SYSAPI_PRINTF (
+                 "Reauthentication count    = %d\r\n",
+                 logicalPortInfo->client.reAuthCount);
+
+  SYSAPI_PRINTF (
+                 "suppRestarting            = %d",
+                 logicalPortInfo->client.suppRestarting);
+  if (logicalPortInfo->client.suppRestarting ==  TRUE)
+  {
+    SYSAPI_PRINTF (" True\r\n");
+  }
+  else if (logicalPortInfo->client.suppRestarting ==  FALSE)
+  {
+    SYSAPI_PRINTF (" False\r\n");
+  }
+  else
+  {
+    SYSAPI_PRINTF (" Unknown\r\n");
+  }
+
+  SYSAPI_PRINTF (
+                 "authMethod                = %d",
+                 logicalPortInfo->client.authMethod);
+  switch (logicalPortInfo->client.authMethod)
+  {
+  case  AUTH_METHOD_UNDEFINED:
+    {
+      SYSAPI_PRINTF (" Undefined\r\n");
+    }
+    break;
+  case  AUTH_METHOD_LOCAL:
+    {
+      SYSAPI_PRINTF (" Local\r\n");
+    }
+    break;
+  case  AUTH_METHOD_RADIUS:
+    {
+      SYSAPI_PRINTF (" Radius\r\n");
+    }
+    break;
+  case  AUTH_METHOD_REJECT:
+    {
+      SYSAPI_PRINTF (" Reject\r\n");
+    }
+    break;
+  default:
+    {
+      SYSAPI_PRINTF (" Unknown\r\n");
+    }
+    break;
+  }
+
+  SYSAPI_PRINTF (
+                 "Vlan type %s vlan Id   = %d\r\n",
+                 authmgrVlanTypeStringGet (logicalPortInfo->client.vlanType),
+                 logicalPortInfo->client.vlanId);
+
+  SYSAPI_PRINTF (
+                 "Client Session Timeout         = %d\r\n",
+                 logicalPortInfo->client.clientTimeout);
+
+  SYSAPI_PRINTF (
+                 "Blocked Vlan Id                = %d\r\n",
+                 logicalPortInfo->client.blockVlanId);
+
+  memset(buf, 0, sizeof(buf));
+  memset(zeroV6, 0, 16);
+
+  authmgrLogicalPortInfoGiveLock ();
+}
+
+/*********************************************************************
+* @purpose  Display the status info for the specified port
+*
+* @param    intIfNum @b{(input)) internal interface number
+*
+* @returns  void
+*
+* @comments devshell command
+*
+* @end
+*********************************************************************/
+void authmgrDebugPortInfoShow (uint32 intIfNum)
+{
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    SYSAPI_PRINTF (
+                   "intIfNum is not a valid authmgr interface(%d)\r\n",
+                   intIfNum);
+    return;
+  }
+
+  SYSAPI_PRINTF (
+                 "AUTHMGR Status Info for port %d:\r\n", intIfNum);
+  SYSAPI_PRINTF (
+                 "------------------------------\r\n");
+
+  SYSAPI_PRINTF (
+                 "initialize                = %d",
+                 authmgrCB->globalInfo->authmgrPortInfo[intIfNum].initialize);
+  if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].initialize ==  TRUE)
+  {
+    SYSAPI_PRINTF (" True\r\n");
+  }
+  else if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].initialize ==
+            FALSE)
+  {
+    SYSAPI_PRINTF (" False\r\n");
+  }
+  else
+  {
+    SYSAPI_PRINTF (" Unknown\r\n");
+  }
+
+  SYSAPI_PRINTF (
+                 "portControlMode           = %d",
+                 authmgrCB->globalInfo->authmgrPortInfo[intIfNum].
+                 portControlMode);
+  switch (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode)
+  {
+  case  AUTHMGR_PORT_FORCE_UNAUTHORIZED:
+    {
+      SYSAPI_PRINTF (
+                     " Force Unauthorized\r\n");
+    }
+    break;
+  case  AUTHMGR_PORT_AUTO:
+    {
+      SYSAPI_PRINTF (" Auto\r\n");
+    }
+    break;
+  case  AUTHMGR_PORT_FORCE_AUTHORIZED:
+    {
+      SYSAPI_PRINTF (
+                     " Force Authorized\r\n");
+    }
+    break;
+  default:
+    {
+      SYSAPI_PRINTF (" Unknown\r\n");
+    }
+    break;
+  }
+
+  SYSAPI_PRINTF (
+                 "hostMode           = %s\r\n",
+                 authmgrHostModeStringGet (authmgrCB->globalInfo->
+                                           authmgrPortInfo[intIfNum].hostMode));
+
+  SYSAPI_PRINTF (
+                 "portEnabled               = %d",
+                 authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled);
+  if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled ==  TRUE)
+  {
+    SYSAPI_PRINTF (" True\r\n");
+  }
+  else if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled ==
+            FALSE)
+  {
+    SYSAPI_PRINTF (" False\r\n");
+  }
+  else
+  {
+    SYSAPI_PRINTF (" Unknown\r\n");
+  }
+
+  SYSAPI_PRINTF (
+                 "portStatus                = %d",
+                 authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portStatus);
+  if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portStatus ==
+       AUTHMGR_PORT_STATUS_AUTHORIZED)
+  {
+    SYSAPI_PRINTF (" Authorized\r\n");
+  }
+  else if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portStatus ==
+            AUTHMGR_PORT_STATUS_UNAUTHORIZED)
+  {
+    SYSAPI_PRINTF (" Unauthorized\r\n");
+  }
+  else
+  {
+    SYSAPI_PRINTF (" Unknown\r\n");
+  }
+
+  SYSAPI_PRINTF (
+                 "nimStatus                = %d \n",
+                 authmgrCB->globalInfo->authmgrPortInfo[intIfNum].nimStatus);
+
+  SYSAPI_PRINTF (
+                 "quietPeriod               = %d\r\n",
+                 authmgrCB->globalInfo->authmgrPortInfo[intIfNum].quietPeriod);
+
+  SYSAPI_PRINTF (
+                 "reAuthPeriod              = %d\r\n",
+                 authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthPeriod);
+
+  SYSAPI_PRINTF (
+                 "reAuthEnabled             = %d",
+                 authmgrCB->globalInfo->authmgrPortInfo[intIfNum].
+                 reAuthEnabled);
+  if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthEnabled ==  TRUE)
+  {
+    SYSAPI_PRINTF (" True\r\n");
+  }
+  else if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].reAuthEnabled ==
+            FALSE)
+  {
+    SYSAPI_PRINTF (" False\r\n");
+  }
+  else
+  {
+    SYSAPI_PRINTF (" Unknown\r\n");
+  }
+
+
+  SYSAPI_PRINTF (
+                 "Number of Authorizations  = %d\r\n",
+                 authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount);
+
+  SYSAPI_PRINTF (
+                 "Auth Fail retry count = %d\r\n",
+                 authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authFailRetryMaxCount);
+}
+
+/*********************************************************************
+* @purpose  Display the status for the specified port
+*
+* @param    intIfNum @b{(input)) internal interface number
+*
+* @returns  void
+*
+* @comments devshell command
+*
+* @end
+*********************************************************************/
+void authmgrDebugPortStatsShow (uint32 intIfNum)
+{
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    SYSAPI_PRINTF (
+                   "intIfNum is not a valid interface(%d)\r\n", intIfNum);
+    return;
+  }
+
+  SYSAPI_PRINTF (
+                 "AUTHMGR Stats for port %d:\r\n", intIfNum);
+  SYSAPI_PRINTF (
+                 "-----------------------\r\n");
+
+  SYSAPI_PRINTF ("\r\n");
+
+  SYSAPI_PRINTF (
+                 "AUTHMGR Debug Stats for port %d:\r\n", intIfNum);
+
+  SYSAPI_PRINTF (
+                 "-----------------------------\r\n");
+  SYSAPI_PRINTF (
+                 "dot1x authEntersAuthenticating                 = %d\r\n",
+                 authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.
+                 authEntersAuthenticating);
+  SYSAPI_PRINTF (
+                 "dot1x authAuthSuccess       = %d\r\n",
+                 authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.
+                 authSuccess);
+  SYSAPI_PRINTF (
+                 "dot1x authFailure      = %d\r\n",
+                 authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.
+                 authFailure);
+  SYSAPI_PRINTF (
+                 "auth authTimeout          = %d\r\n",
+                 authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.
+                 authTimeout);
+}
+
+/*********************************************************************
+* @purpose  Set the authmgr log trace mode
+*
+* @param    mode     @b{(input)) log trace mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrDebugLogTraceModeSet (uint32 mode)
+{
+  /* Validate input parm */
+  if (mode !=  ENABLE && mode !=  DISABLE)
+  {
+    return  FAILURE;
+  }
+
+  /* If not changing mode, just return success */
+  if (mode == authmgrCB->globalInfo->authmgrCfg->authmgrLogTraceMode)
+  {
+    return  SUCCESS;
+  }
+
+  authmgrCB->globalInfo->authmgrCfg->authmgrLogTraceMode = mode;
+
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Return the authmgr log trace mode
+*
+* @param    mode     @b{(input)) log trace mode
+*
+* @returns   SUCCESS
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+uint32 authmgrDebugLogTraceModeGet ()
+{
+  return authmgrCB->globalInfo->authmgrCfg->authmgrLogTraceMode;
+}
+
+/*********************************************************************
+* @purpose Trace authmgr  events
+*
+* @param   0 - disable tracing
+*          1 - enable port status events
+*          2 - enable port events tracing
+*
+*
+* @returns void
+*
+* @notes
+*
+* @end
+*
+*********************************************************************/
+void authmgrDebugTraceEvent (uint32 debug, uint32 intfNum)
+{
+  authmgrDebugTraceFlag = debug;
+  authmgrDebugTraceIntf = intfNum;
+}
+
+/*********************************************************************
+* @purpose show authmgr trace events help
+*
+* @param
+*
+*
+* @returns void
+*
+* @notes
+*
+* @end
+*
+*********************************************************************/
+void authmgrDebugTraceEventHelp ()
+{
+  SYSAPI_PRINTF (
+                 "\n Use authmgrDebugTraceEvent(<debug>,<interface Number>) to trace various events");
+  SYSAPI_PRINTF (
+                 "\n Specify internal interface number to trace events for specific interface or 0 for all interfaces.");
+
+  SYSAPI_PRINTF ("\n Trace Event Flags");
+  SYSAPI_PRINTF ("\n-------------------");
+
+  SYSAPI_PRINTF (
+                 "\n Flag                            Description                                            Value");
+  SYSAPI_PRINTF (
+                 "\n ------------------------------- -----------------------------------------------------  -------");
+  SYSAPI_PRINTF (
+                 "\n AUTHMGR_TRACE_PORT_STATUS         Traces port authorization events                        %u",
+                 AUTHMGR_TRACE_PORT_STATUS);
+  SYSAPI_PRINTF (
+                 "\n AUTHMGR_TRACE_EVENTS              Traces callback events                                  %u",
+                 AUTHMGR_TRACE_EVENTS);
+  SYSAPI_PRINTF (
+                 "\n AUTHMGR_TRACE_API_CALLS           Traces authmgr send packet events                         %u",
+                 AUTHMGR_TRACE_API_CALLS);
+  SYSAPI_PRINTF (
+                 "\n AUTHMGR_TRACE_FSM_EVENTS          Traces state machine events                             %u",
+                 AUTHMGR_TRACE_FSM_EVENTS);
+  SYSAPI_PRINTF (
+                 "\n AUTHMGR_TRACE_FAILURE             Traces failure events such as authentication failure    %u",
+                 AUTHMGR_TRACE_FAILURE);
+  SYSAPI_PRINTF (
+                 "\n AUTHMGR_TRACE_RADIUS              Traces RADIUS related events                            %u",
+                 AUTHMGR_TRACE_RADIUS);
+  SYSAPI_PRINTF (
+                 "\n AUTHMGR_TRACE_TIMER               Traces Authmgr Timer Events                               %u",
+                 AUTHMGR_TRACE_TIMER);
+  SYSAPI_PRINTF (
+                 "\n AUTHMGR_TRACE_MAC_ADDR_DB         Traces Mac Address Database related events              %u",
+                 AUTHMGR_TRACE_MAC_ADDR_DB);
+}
+
+/*********************************************************************
+* @purpose  Return Logical port Debug info
+*
+* @param    intIfNum @b{(input)) interface number
+* @param    lIntIfNum @b{(input)) Logical internal interface number
+* @param    debugInfo @b{(output)) debug info
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments 
+*
+* @end
+*********************************************************************/
+RC_t authmgrDebugLogicalPortInfoNextGet (uint32 intIfNum, uint32 *lIntIfNum, 
+                                            authmgrLogicalPortDebugInfo_t *debugInfo)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+   AUTHMGR_PORT_CONTROL_t portControl =  AUTHMGR_PORT_CONTROL_INVALID;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  portControl = pCfg->portControlMode;
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+
+  if ( AUTHMGR_PORT_AUTO != portControl)
+  {
+    return  FAILURE;
+  }
+
+  memset(debugInfo, 0, sizeof(*debugInfo));
+
+  authmgrLogicalPortInfoTakeLock ();
+
+  if ((logicalPortInfo = authmgrLogicalPortInfoGetNextNode (intIfNum,
+                                                            lIntIfNum)) !=  NULLPTR)
+  {
+    debugInfo->key = logicalPortInfo->key;
+    memcpy(&debugInfo->client, &logicalPortInfo->client, sizeof(debugInfo->client));
+    memcpy(&debugInfo->protocol, &logicalPortInfo->protocol, sizeof(debugInfo->protocol));
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+
+  authmgrLogicalPortInfoGiveLock ();
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Display the status info for the specified port
+*
+* @param    lIntIfNum @b{(input)) Logical internal interface number
+*
+* @returns  void
+*
+* @comments devshell command
+*
+* @end
+*********************************************************************/
+void authmgrDebugLogicalPortInfoShow (uint32 intIfNum, uint32 lIntIfNum)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  uint32 physPort = 0, lPort = 0, type = 0;
+   BOOL all =  FALSE;
+
+  if (lIntIfNum == 0)
+  {
+    all =  TRUE;
+    logicalPortInfo = authmgrLogicalPortInfoFirstGet (intIfNum, &lIntIfNum);
+  }
+  else
+  {
+    authmgrLogicalPortInfoTakeLock ();
+    logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+  }
+
+  if (logicalPortInfo ==  NULLPTR)
+  {
+    if (all ==  FALSE)
+    {
+      authmgrLogicalPortInfoGiveLock ();
+    }
+    printf ("Cannot get logical port info for this log interface %d \n",
+            lIntIfNum);
+    return;
+  }
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  if (authmgrIsValidIntf (physPort) !=  TRUE)
+  {
+    SYSAPI_PRINTF (
+                   "intIfNum is not a valid authmgr interface(%d)\r\n",
+                   physPort);
+    if (all ==  FALSE)
+    {
+      authmgrLogicalPortInfoGiveLock ();
+    }
+    return;
+  }
+
+  if (intIfNum != physPort)
+  {
+    sysapiPrintf ("Error! LogicalPort[%d] not belongs to Port[%d] \n\r",
+                  logicalPortInfo->key.keyNum, intIfNum);
+    if (all ==  FALSE)
+    {
+      authmgrLogicalPortInfoGiveLock ();
+    }
+    return;
+  }
+
+  SYSAPI_PRINTF (
+                 "Port Control Mode         = %s\n\n\r",
+                 (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].
+                  portControlMode ==
+                   AUTHMGR_PORT_AUTO) ? "Auto" : "non-auto Based");
+
+  SYSAPI_PRINTF (
+                 "host Mode         = %s\n\n\r",
+                 authmgrHostModeStringGet (authmgrCB->globalInfo->
+                                           authmgrPortInfo[intIfNum].hostMode));
+  while (lIntIfNum != 0)
+  {
+    if (all ==  FALSE)
+    {
+      authmgrLogicalPortInfoGiveLock ();
+    }
+
+    authmgrDebugPortMacInfoShow (lIntIfNum);
+
+    if (all ==  TRUE)
+    {
+      logicalPortInfo =
+        authmgrLogicalPortInfoGetNextNode (intIfNum, &lIntIfNum);
+      if (logicalPortInfo ==  NULLPTR)
+      {
+        lIntIfNum = 0;
+      }
+    }
+    else
+    {
+      lIntIfNum = 0;
+    }
+  }                             /*While */
+}
+
+/*********************************************************************
+* @purpose get the hostmode string from hostmode
+*
+* @param hostMode -- auth mgr host modes
+* @return hostmode string
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrHostModeStringGet ( AUTHMGR_HOST_CONTROL_t hostMode)
+{
+  switch (hostMode)
+  {
+  case  AUTHMGR_SINGLE_AUTH_MODE:
+    return "AUTHMGR_SINGLE_AUTH_MODE";
+  case  AUTHMGR_MULTI_HOST_MODE:
+    return "AUTHMGR_MULTI_HOST_MODE";
+  case  AUTHMGR_MULTI_AUTH_MODE:
+    return "AUTHMGR_MULTI_AUTH_MODE";
+  default:
+    return "Unknown host mode";
+  }
+}
+
+/*********************************************************************
+* @purpose get the auth mgr port status string
+*
+* @param status -- auth mgr port status
+* @return port status string
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrAuthStatusStringGet ( AUTHMGR_PORT_STATUS_t status)
+{
+  switch (status)
+  {
+  case  AUTHMGR_PORT_STATUS_AUTHORIZED:
+    return " AUTHMGR_PORT_STATUS_AUTHORIZED";
+  case  AUTHMGR_PORT_STATUS_UNAUTHORIZED:
+    return " AUTHMGR_PORT_STATUS_UNAUTHORIZED";
+  case  AUTHMGR_PORT_STATUS_NA:
+    return " AUTHMGR_PORT_STATUS_NA";
+  default:
+    return "Unknown status";
+  }
+}
+
+/*********************************************************************
+* @purpose get the client allocated node type string
+*
+* @param type client allocation node type
+* @return node type string
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrNodeTypeStringGet (authmgrNodeType_t type)
+{
+  switch (type)
+  {
+  case AUTHMGR_PHYSICAL:
+    return "AUTHMGR_PHYSICAL";
+  case AUTHMGR_LOGICAL:
+    return "AUTHMGR_LOGICAL";
+  default:
+    return "Undefined";
+  }
+}
+
+/*********************************************************************
+* @purpose get the timer type string
+*
+* @param type -- auth mgr timer type
+* @return timer type string
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrTimerTypeStringGet (authmgrTimerType_t type)
+{
+  switch (type)
+  {
+  case AUTHMGR_QWHILE:
+    return "AUTHMGR_QWHILE";
+  case AUTHMGR_REAUTH_WHEN:
+    return "AUTHMGR_REAUTH_WHEN";
+  case AUTHMGR_METHOD_NO_RESP_TMR:
+    return "AUTHMGR_METHOD_NO_RESP_TMR";
+  default:
+    return "Undefined";
+  }
+}
+
+/*********************************************************************
+* @purpose get the vlan type string
+*
+* @param type -- vlan type
+* @return vlan string
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrVlanTypeStringGet (authmgrVlanType_t type)
+{
+  switch (type)
+  {
+  case AUTHMGR_VLAN_RADIUS:
+    return "RADIUS";
+  case AUTHMGR_VLAN_BLOCKED:
+    return "BLOCKED";
+  default:
+    return "Undefined";
+  }
+}
+
+/*********************************************************************
+* @purpose get the client type string
+*
+* @param type -- auth mgr client type
+* @return client type string
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrClientTypeStringGet (authmgrClientType_t type)
+{
+  switch (type)
+  {
+  case AUTHMGR_CLIENT_AWARE:
+    return "AUTHMGR_CLIENT_AWARE";
+  case AUTHMGR_CLIENT_UNAWARE:
+    return "AUTHMGR_CLIENT_UNAWARE";
+  case AUTHMGR_CLIENT_MAB:
+    return "AUTHMGR_CLIENT_MAB";
+  default:
+    return "Undefined";
+  }
+}
+
+/*********************************************************************
+* @purpose get the authentication manager state string
+*
+* @param state authentication manager SM state
+* @return state string
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrAuthStateStringGet (AUTHMGR_STATES_t state)
+{
+  switch (state)
+  {
+  case AUTHMGR_INITIALIZE:
+    return "AUTHMGR_INITIALIZE";
+  case AUTHMGR_AUTHENTICATING:
+    return "AUTHMGR_AUTHENTICATING";
+  case AUTHMGR_AUTHENTICATED:
+    return "AUTHMGR_AUTHENTICATED";
+  case AUTHMGR_UNAUTHENTICATED:
+    return "AUTHMGR_UNAUTHENTICATED";
+  case AUTHMGR_HELD:
+    return "AUTHMGR_HELD";
+  default:
+    return "Undefined";
+  }
+}
+
+/*********************************************************************
+* @purpose get the authentication method string
+*
+* @param method -- authentication method
+* @return method string
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrMethodStringGet ( AUTHMGR_METHOD_t method)
+{
+  switch (method)
+  {
+  case  AUTHMGR_METHOD_NONE:
+    return " AUTHMGR_METHOD_NONE";
+  case  AUTHMGR_METHOD_8021X:
+    return " AUTHMGR_METHOD_8021X";
+  case  AUTHMGR_METHOD_MAB:
+    return " AUTHMGR_METHOD_MAB";
+  default:
+    return "Undefined";
+  }
+}
+
+/*********************************************************************
+* @purpose get the client auth response event string
+*
+* @param status client response event
+* @return event string
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrMethodStatusStringGet ( AUTHMGR_STATUS_t status)
+{
+  switch (status)
+  {
+  case  AUTHMGR_NEW_CLIENT:
+    return " AUTHMGR_NEW_CLIENT";
+  case  AUTHMGR_AUTH_FAIL:
+    return " AUTHMGR_AUTH_FAIL";
+  case  AUTHMGR_AUTH_SUCCESS:
+    return " AUTHMGR_AUTH_SUCCESS";
+  case  AUTHMGR_AUTH_TIMEOUT:
+    return " AUTHMGR_AUTH_TIMEOUT";
+  case  AUTHMGR_AUTH_SERVER_COMM_FAILURE:
+    return " AUTHMGR_AUTH_SERVER_COMM_FAILURE";
+  case  AUTHMGR_METHOD_CHANGE:
+    return " AUTHMGR_METHOD_CHANGE";
+  case  AUTHMGR_CLIENT_DISCONNECTED:
+    return " AUTHMGR_CLIENT_DISCONNECTED";
+  default:
+    return "Undefined";
+  }
+}
+
+/*********************************************************************
+* @purpose get the state machine event string
+*
+* @param event authmgr state machine event
+* @return state machine event string
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrSmEventStringGet (authmgrSmEvents_t event)
+{
+  switch (event)
+  {
+  case authmgrInitialize:
+    return "authmgrInitialize";
+  case authmgrStartAuthenticate:
+    return "authmgrStartAuthenticate";
+  case authmgrAuthSuccess:
+    return "authmgrAuthSuccess";
+  case authmgrNotAuthSuccessNoNextMethod:
+    return "authmgrNotAuthSuccessNoNextMethod";
+  case authmgrNotAuthSuccessNextMethod:
+    return "authmgrNotAuthSuccessNextMethod";
+  case authmgrHeldTimerEqualsZero:
+    return "authmgrHeldTimerEqualsZero";
+  case authmgrStopAuthenticate:
+    return "authmgrStopAuthenticate";
+  case authmgrHigherAuthMethodAdded:
+    return "authmgrHigherAuthMethodAdded";
+  case authmgrReauthenticate:
+    return "authmgrReauthenticate";
+  case authmgrAuthFail:
+    return "authmgrAuthFail";
+  case authmgrAuthenticatedRxEapolStart:
+    return "authenticatedRcvdEapolStart";
+  case authmgrAbortAndRestartAuth:
+    return "authmgrAbortAndRestartAuth";
+  default:
+    return "Undefined";
+  }
+}
+
+/*********************************************************************
+* @purpose get the authentication list type string
+*
+* @param status list type
+* @return string for the list type
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrListTypeStringGet ( AUTHMGR_METHOD_TYPE_t status)
+{
+  switch (status)
+  {
+  case  AUTHMGR_TYPE_ORDER:
+    return "Order";
+  case  AUTHMGR_TYPE_PRIORITY:
+    return "Priority";
+  default:
+    return "Undefined";
+  }
+}
+
+/*********************************************************************
+* @purpose get the authentication Back end method string
+*
+* @param authMethod BAM method
+* @return method string
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char *authmgrAuthMethodStringGet (uint32 authMethod)
+{
+  switch (authMethod)
+  {
+  case  AUTH_METHOD_UNDEFINED:
+    return " AUTH_METHOD_UNDEFINED";
+  case  AUTH_METHOD_RADIUS:
+    return " AUTH_METHOD_RADIUS";
+  case  AUTH_METHOD_LOCAL:
+    return " AUTH_METHOD_LOCAL";
+  case  AUTH_METHOD_REJECT:
+    return " AUTH_METHOD_REJECT";
+  default:
+    return "Unknown";
+  }
+}
+
+/*********************************************************************
+* @purpose function to print the supp mac address
+*
+* @param suppMacAddr -- mac address
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrSuppMacStringGet ( enetMacAddr_t * suppMacAddr)
+{
+   uchar8 buf[32];
+
+  memset (buf, 0, sizeof (buf));
+  osapiSnprintf (( char8 *) buf, sizeof (buf),
+                 "%02X:%02X:%02X:%02X:%02X:%02X", suppMacAddr->addr[0],
+                 suppMacAddr->addr[1], suppMacAddr->addr[2],
+                 suppMacAddr->addr[3], suppMacAddr->addr[4],
+                 suppMacAddr->addr[5]);
+  sysapiPrintf ("%s\n", buf);
+}
+
+/*********************************************************************
+* @purpose debug function to dump attr info
+*
+* @param attrInfo -- received client attr info
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrAttrInfoDump (authmgrAuthAttributeInfo_t * attrInfo)
+{
+  if ( NULLPTR == attrInfo)
+  {
+    return;
+  }
+
+  sysapiPrintf ("serverState = %s\n", attrInfo->serverState);
+  sysapiPrintf ("serverStateLen = %u\n", attrInfo->serverStateLen);
+
+  sysapiPrintf ("serverClass = %s\n", attrInfo->serverClass);
+  sysapiPrintf ("serverClassLen = %u\n", attrInfo->serverClassLen);
+  sysapiPrintf ("sessionTimeout = %u\n", attrInfo->sessionTimeout);
+  sysapiPrintf ("terminationAction = %u\n", attrInfo->terminationAction);
+  sysapiPrintf ("accessLevel = %u\n", attrInfo->accessLevel);
+  sysapiPrintf ("idFromServer = %u\n", attrInfo->idFromServer);
+  sysapiPrintf ("vlanString = %s\n", attrInfo->vlanString);
+  sysapiPrintf ("vlanId = %u\n", attrInfo->vlanId);
+}
+
+/*********************************************************************
+* @purpose debug function to dump client info
+*
+* @param info -- client info of the logical port
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrLogicalPortClientInfoDump (authmgrClientInfo_t * info)
+{
+  uint32 i = 0;
+
+  if ( NULLPTR == info)
+  {
+    return;
+  }
+  sysapiPrintf ("clientType = %s\n",
+                authmgrClientTypeStringGet (info->clientType));
+  sysapiPrintf ("retryCount = %u\n", info->retryCount);
+  sysapiPrintf ("reAuthCount = %u\n", info->reAuthCount);
+  sysapiPrintf ("reAuthenticate = %u\n", info->reAuthenticate);
+  sysapiPrintf ("currentMethod = %s\n",
+                authmgrMethodStringGet (info->currentMethod));
+  sysapiPrintf ("authenticatedMethod = %s\n",
+                authmgrMethodStringGet (info->authenticatedMethod));
+  sysapiPrintf ("Executed Methods \n");
+
+  for (i = 0; i <  AUTHMGR_METHOD_LAST; i++)
+  {
+    sysapiPrintf ("%s  \n", authmgrMethodStringGet (info->executedMethod[i]));
+  }
+  sysapiPrintf ("\n");
+  sysapiPrintf ("logicalPortStatus = %s\n",
+                authmgrAuthStatusStringGet (info->logicalPortStatus));
+  sysapiPrintf ("authmgrUserName = %s\n", info->authmgrUserName);
+  sysapiPrintf ("authmgrUserNameLength = %u\n", info->authmgrUserNameLength);
+  sysapiPrintf ("currentIdL = %u\n", info->currentIdL);
+  sysapiPrintf ("supp mac addr ");
+  authmgrSuppMacStringGet (&info->suppMacAddr);
+  sysapiPrintf ("\n");
+  sysapiPrintf ("vlanType = %s\n", authmgrVlanTypeStringGet (info->vlanType));
+  sysapiPrintf ("vlanId = %u\n", (info->vlanId));
+  sysapiPrintf ("blockvlanId = %u\n", (info->blockVlanId));
+
+  sysapiPrintf ("suppRestarting = %u\n", (info->suppRestarting));
+  sysapiPrintf ("authMethod = %s\n",
+                authmgrAuthMethodStringGet (info->authMethod));
+  sysapiPrintf ("sessionTime = %u\n", (info->sessionTime));
+  sysapiPrintf ("clientTimeout = %u\n", (info->clientTimeout));
+  sysapiPrintf ("sessionTimeout = %u\n", (info->sessionTimeout));
+  sysapiPrintf ("terminationAction = %u\n", (info->terminationAction));
+  sysapiPrintf ("\n");
+}
+
+/*********************************************************************
+* @purpose function to get port from the key
+*
+* @param intIfNum -- interface number
+* @param lIntIfNum -- key
+* @return  SUCCCESS
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrLportPortGet (uint32 * intIfNum, uint32 * lIntIfNum)
+{
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (intIfNum);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (lIntIfNum);
+  AUTHMGR_PORT_GET (*intIfNum, *lIntIfNum);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose debug function for auth count
+*
+* @param intIfNum -- interface number
+* @param flag --  TRUE incerment/ FALSE -- decrement
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrAuthCountTest (uint32 intIfNum,  BOOL flag)
+{
+  sysapiPrintf ("IntIf Num  = %u, authCount %u \n", intIfNum,
+                authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount);
+  if (flag)
+  {
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount++;
+  }
+  else
+  {
+    if (0 != authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount)
+    {
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount--;
+    }
+  }
+}
+
+/*********************************************************************
+* @purpose debug function to print User count on an interface
+*
+* @param intfIfNum
+* 
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrUserCountDump(uint32 intIfNum)
+{
+  sysapiPrintf ("Number of current users = %d\n\r", authmgrCB->globalInfo->authmgrPortInfo[intIfNum].numUsers);
+  sysapiPrintf ("Max users allowed = %d\n\r", authmgrCB->globalInfo->authmgrPortInfo[intIfNum].maxUsers);
+  return;
+}
+
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_dot1x.c b/src/sonic-pac/authmgr/mapping/auth_mgr_dot1x.c
new file mode 100644
index 00000000000..13831934c07
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_dot1x.c
@@ -0,0 +1,200 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_auth_method.h"
+#include "auth_mgr_struct.h"
+#include "fpSonicUtils.h"
+
+extern authmgrCB_t *authmgrCB;
+
+static authmgrMethodEvent_t authmgrMethodEventTbl[] = {
+  {authmgrClientReAuthenticate, "EAPOL_REAUTH"},
+  {authmgrClientAuthStart, "NEW_STA"},
+  {authmgrClientDisconnect, "DEAUTHENTICATE"}
+};
+
+/*********************************************************************
+* @purpose function to send auth mgr events to dot1x daemon
+*
+* @param intIfNum   interface number
+* @param event   authmgr event
+* @param macAddr  client mac
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrDot1xEventSend (uint32 intIfNum, uint32 event,  enetMacAddr_t *macAddr)
+{
+  size_t len = 0;
+   char8 ctrl_ifname[16] = {};
+   char8 buf[1024] = {};
+   char8 reply[1024] = {};
+
+  fpGetHostIntfName(intIfNum, ctrl_ifname);
+
+  snprintf(buf, sizeof(buf), "%s %02X:%02X:%02X:%02X:%02X:%02X", authmgrMethodEventTbl[event-1].eventStr,
+           macAddr->addr[0], macAddr->addr[1], macAddr->addr[2], macAddr->addr[3], 
+           macAddr->addr[4], macAddr->addr[5]); 
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                "authmgrDot1xEventSend sending %s on %s\n", buf, ctrl_ifname);
+  
+	memset(&reply, 0, sizeof(reply));
+
+  if (0 == wpa_sync_send(ctrl_ifname, buf, reply, &len))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+        "%s:%d reply = %s on %s\n", __func__, __LINE__, reply, ctrl_ifname);
+
+    if (0 == strncmp("OK", reply, strlen("OK")))
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+          "%s:%d success iface %s\n", __func__, __LINE__, ctrl_ifname);
+      return  SUCCESS;
+    }
+    else
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+          "%s:%d failure iface %s\n", __func__, __LINE__, ctrl_ifname);
+    }
+  }
+
+  return  FAILURE;
+}
+
+/*********************************************************************
+* @purpose function to get dot1x admin mode
+*
+* @param intIfNum   interface number
+* @param event   authmgr event
+* @param macAddr  client mac
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrDot1xIntfAdminModeGet (uint32 intIfNum,  BOOL *enabled)
+{
+  size_t len = 0;
+   char8 ctrl_ifname[16] = {};
+   char8 buf[128] = {};
+
+  *enabled =  FALSE;
+
+  fpGetHostIntfName(intIfNum, ctrl_ifname);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+      "sending PING on %s\n", ctrl_ifname);
+
+  if (0 == wpa_sync_send(ctrl_ifname, "PING", buf, &len))
+  {
+    if (0 == strncmp("PONG", buf, strlen("PONG")))
+    {
+      *enabled =  TRUE;
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+          "Received PONG on %s\n", ctrl_ifname);
+    }
+  }
+  else
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+        "wpa_sync_send not successful on %s\n", ctrl_ifname);
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+      "received buf = %s on %s \n", buf, ctrl_ifname);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to set port control mode of the dot1x daemon
+*
+* @param intIfNum   interface number
+* @param event   authmgr event
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrDot1xIntfPortControlModeSet (uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl)
+{
+#define PORT_CNTRL_MODE_SET_STR "EAPOL_SET AdminControlledPortControl"
+  size_t len = 0;
+   char8 ctrl_ifname[16] = {};
+   char8 buf[128] = {};
+   char8 cmd[128] = {};
+
+  switch (portControl)
+  {
+  case  AUTHMGR_PORT_AUTO:
+    snprintf(cmd, sizeof(cmd), "%s %s", PORT_CNTRL_MODE_SET_STR, "Auto");
+    break;
+  case  AUTHMGR_PORT_FORCE_AUTHORIZED:
+    snprintf(cmd, sizeof(cmd), "%s %s", PORT_CNTRL_MODE_SET_STR, "ForceAuthorized");
+    break;
+  case  AUTHMGR_PORT_FORCE_UNAUTHORIZED:
+    snprintf(cmd, sizeof(cmd), "%s %s", PORT_CNTRL_MODE_SET_STR, "ForceUnAuthorized");
+    break;
+  default:
+    printf("invalid mode..\n");
+    return  FAILURE;
+
+  }
+
+  fpGetHostIntfName(intIfNum, ctrl_ifname);
+
+  if (0 == wpa_sync_send(ctrl_ifname, cmd, buf, &len))
+  {
+    if (0 == strncmp("OK", buf, strlen("OK")))
+    {
+      printf("successfull\n");
+    }
+  }
+  else
+  {
+    printf("wpa_sync_send not successful\n");
+  }
+
+  printf("buf = %s\n", buf);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Get the port's dot1x capabilities (Supplicant and/or Authenticator)
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    *capabilities @b{(output)} dot1x capabilities bitmask
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrDot1xPortPaeCapabilitiesGet (uint32 intIfNum,
+                                             uchar8 * capabilities)
+{
+  *capabilities = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities;
+  return  SUCCESS;
+}
+
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_ih.c b/src/sonic-pac/authmgr/mapping/auth_mgr_ih.c
new file mode 100755
index 00000000000..f22d2fe61a6
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_ih.c
@@ -0,0 +1,754 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_client.h"
+#include "auth_mgr_struct.h"
+#include "pac_cfg_authmgr.h"
+
+extern authmgrCB_t *authmgrCB;
+
+extern authmgrCnfgrState_t authmgrCnfgrState;
+
+/*********************************************************************
+* @purpose  Handles events generated by NIM
+*
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    intfEvent  @b{(input)) interface event
+* @param    correlator @b{(input)) Correlator for the event
+* @param    eventData  @b((input)) Additional event specific data
+*
+* @returns   SUCCESS  on a successful operation
+* @returns   FAILURE  for any error
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrIntfChangeCallback (uint32 intIfNum, uint32 intfEvent,
+                                   NIM_CORRELATOR_t correlator,
+                                   NIM_EVENT_SPECIFIC_DATA_t eventData)
+{
+  authmgrIntfChangeParms_t parms;
+
+  parms.intfEvent = intfEvent;
+  parms.nimCorrelator = correlator;
+
+  return authmgrIssueCmd (authmgrIntfChange, intIfNum, &parms);
+}
+
+/*********************************************************************
+* @purpose  Handles startup notification from NIM
+*
+* @param    startupPhase   @b{(input)) startupPhase 
+*
+* @returns   SUCCESS  on a successful operation
+* @returns   FAILURE  for any error
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrIntfStartupCallback (NIM_STARTUP_PHASE_t startupPhase)
+{
+
+  /* hold NIM till authmgr is ready */
+  while (!(AUTHMGR_IS_READY))
+  {
+     LOGF ( LOG_SEVERITY_ERROR,
+             "Received an interface startup callback while AUTHMGR is not ready(startup phase=%d). waiting..",
+             startupPhase);
+    osapiSleep(1);
+  }
+  authmgrIssueCmd (authmgrIntfStartup,  NULL, &startupPhase);
+}
+
+/*********************************************************************
+* @purpose  Process NIM startup callback
+*
+* @param    startupPhase @b{(input)) CREATE or ACTIVATE
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrIhProcessIntfStartup (NIM_STARTUP_PHASE_t startup_phase)
+{
+  RC_t rc;
+  uint32 intIfNum = 0;
+  PORTEVENT_MASK_t nimEventMask;
+  uint32 startTime, endTime;
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, 0,
+                       "%s:%d Received event %d from NIM  \n",
+                       __FUNCTION__, __LINE__, startup_phase);
+
+  startTime = osapiTimeMillisecondsGet ();
+  switch (startup_phase)
+  {
+  case NIM_INTERFACE_CREATE_STARTUP:
+    rc = nimFirstValidIntfNumber (&intIfNum);
+
+    while (rc ==  SUCCESS)
+    {
+      if (authmgrIsValidIntf (intIfNum) ==  TRUE)
+      {
+        if (authmgrIntfCreate (intIfNum) !=  SUCCESS)
+        {
+           LOGF ( LOG_SEVERITY_ERROR,
+                   "Error in creating interface %s.", authmgrIntfIfNameGet(intIfNum));
+        }
+      }
+      rc = nimNextValidIntfNumber (intIfNum, &intIfNum);
+    }
+
+
+    /* Now ask NIM to send any future changes for these event types */
+    memset (&nimEventMask, 0, sizeof (PORTEVENT_MASK_t));
+    PORTEVENT_SETMASKBIT (nimEventMask,  CREATE);
+    PORTEVENT_SETMASKBIT (nimEventMask,  DELETE);
+    nimRegisterIntfEvents ( AUTHMGR_COMPONENT_ID, nimEventMask);
+    break;
+
+  case NIM_INTERFACE_ACTIVATE_STARTUP:
+
+    rc = authmgrIntfActivateStartup ();
+
+    /* Now ask NIM to send any future changes for these event types */
+    memset (&nimEventMask, 0, sizeof (PORTEVENT_MASK_t));
+    PORTEVENT_SETMASKBIT (nimEventMask,  CREATE);
+    PORTEVENT_SETMASKBIT (nimEventMask,  DELETE);
+    PORTEVENT_SETMASKBIT (nimEventMask,  ATTACH);
+    PORTEVENT_SETMASKBIT (nimEventMask,  DETACH);
+    PORTEVENT_SETMASKBIT (nimEventMask,  PORT_ENABLE);
+    PORTEVENT_SETMASKBIT (nimEventMask,  PORT_DISABLE);
+    PORTEVENT_SETMASKBIT (nimEventMask,  UP);
+    PORTEVENT_SETMASKBIT (nimEventMask,  DOWN);
+    PORTEVENT_SETMASKBIT (nimEventMask,  AUTHMGR_ACQUIRE);
+    nimRegisterIntfEvents ( AUTHMGR_COMPONENT_ID, nimEventMask);
+
+    (void) osapiTaskInitDone ( AUTHMGR_DB_TASK_SYNC);
+    
+    break;
+
+  default:
+    break;
+  }
+
+  endTime = osapiTimeMillisecondsGet ();
+
+  nimStartupEventDone ( AUTHMGR_COMPONENT_ID);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Process Link state changes
+*
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    intIfEvent @b{(input)) interface event
+* @param    correlator @b{(input)) correlator 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrIhProcessIntfChange (uint32 intIfNum, uint32 intfEvent,
+                                    NIM_CORRELATOR_t correlator)
+{
+  uint32 linkState, adminState;
+  RC_t rc =  SUCCESS;
+  NIM_EVENT_COMPLETE_INFO_t status;
+  authmgrPortCfg_t *pCfg;
+  uint32 lIntIfNum;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+   BOOL portEnabled =  FALSE;
+
+  status.intIfNum = intIfNum;
+  status.component =  AUTHMGR_COMPONENT_ID;
+  status.event = intfEvent;
+  status.correlator = correlator;
+
+  if (!(AUTHMGR_IS_READY))
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Received an interface change callback while AUTHMGR not ready to receive it.");
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, intIfNum,
+                         "%s:%d Nim Event %d received for %s when authmgr is not ready \n",
+                         __FUNCTION__, __LINE__, intfEvent, authmgrIntfIfNameGet(intIfNum));
+    rc =  FAILURE;
+    status.response.rc = rc;
+    nimEventStatusCallback (status);
+    return rc;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+                       "%s:%d Nim Event %d received for %s \n", __FUNCTION__,
+                       __LINE__, intfEvent, authmgrIntfIfNameGet(intIfNum));
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    rc =  SUCCESS;
+    status.response.rc = rc;
+    nimEventStatusCallback (status);
+    return rc;
+  }
+
+  switch (intfEvent)
+  {
+    case  UP:
+    case  PORT_ENABLE:
+      if (authmgrIntfIsConfigurable (intIfNum, &pCfg) ==  TRUE)
+      {
+        portEnabled =  FALSE;
+         authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled =  FALSE;
+        if (nimGetIntfLinkState (intIfNum, &linkState) ==  SUCCESS)
+        {
+          if ((nimGetIntfAdminState (intIfNum, &adminState) ==  SUCCESS) &&
+              (adminState ==  ENABLE) &&
+              (nimGetIntfLinkState (intIfNum, &linkState) ==  SUCCESS) &&
+              (linkState ==  UP))
+          {
+            portEnabled =  TRUE;
+          }
+        }
+
+        if ( DOT1X_PAE_PORT_AUTH_CAPABLE != pCfg->paeCapabilities)
+        {
+          authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled = portEnabled;
+          if ( TRUE == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled)
+          {
+            authmgrPhysicalPortStatusOpenSet(intIfNum);
+          }
+          else
+          {
+            authmgrPhysicalPortStatusBlockSet(intIfNum);
+          }
+        }
+        else
+        {
+          if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities ==
+               DOT1X_PAE_PORT_AUTH_CAPABLE)
+          {
+            if (( TRUE == portEnabled) &&
+                (portEnabled != authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled))
+            {
+              authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled =  TRUE;
+
+              /* Cleanup any existing clients on the port before reset */
+              authmgrPortInfoCleanup (intIfNum);
+              (void) authmgrPortReset (intIfNum);
+              (void) authmgrCtlApplyPortConfigData (intIfNum);
+            }
+          }
+        }
+      }
+      break;
+
+    case  DOWN:
+    case  PORT_DISABLE:
+      if ( TRUE == authmgrIntfIsConfigurable (intIfNum, &pCfg))
+      {
+        if ( DOT1X_PAE_PORT_AUTH_CAPABLE != pCfg->paeCapabilities)
+        {
+          authmgrPhysicalPortStatusBlockSet(intIfNum);
+        }
+        else 
+        {
+          if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled ==
+               TRUE)
+          {
+            authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled =  FALSE;
+
+            lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+            while ((logicalPortInfo =
+                  authmgrLogicalPortInfoGetNextNode (intIfNum,
+                    &lIntIfNum)) !=  NULLPTR)
+            {
+              if (0 == logicalPortInfo->key.keyNum)
+              {
+                continue;
+              }
+            }
+
+            if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode ==
+                 AUTHMGR_PORT_AUTO)
+            {
+              authmgrPortInfoCleanup (intIfNum);
+            }
+          }
+          authmgrPhysicalPortStatusBlockSet(intIfNum);
+        }
+      }
+      break;
+
+    case  CREATE:
+      rc = authmgrIntfCreate (intIfNum);
+      break;
+
+    case  ATTACH:
+      if (authmgrIntfIsConfigurable (intIfNum, &pCfg) ==  TRUE)
+      {
+        if ( DOT1X_PAE_PORT_AUTH_CAPABLE != pCfg->paeCapabilities)
+        {
+          /*authmgrPhysicalPortStatusOpenSet(intIfNum); */
+        }
+        else
+        {
+          (void) authmgrPortReset (intIfNum);
+          /*rc = authmgrCtlApplyPortConfigData(intIfNum); */
+        }
+      }
+      else
+      {
+        rc =  FAILURE;
+      }
+      break;
+
+    case  DETACH:
+      rc = authmgrIntfDetach (intIfNum);
+      break;
+
+    case  DELETE:
+      rc = authmgrIntfDelete (intIfNum);
+      break;
+
+    default:
+      break;
+  }
+
+  status.response.rc = rc;
+  nimEventStatusCallback (status);
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  bring up the individual interface
+*
+* @param    intIfNum -- interface number 
+* @param    warmRestart  BOOL true if restart type is warm
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments Handle the events ATTACH, UP, Acquire etc
+*
+* @end
+*********************************************************************/
+RC_t authmgrIntfStart (uint32 intIfNum,  BOOL warmRestart)
+{
+  authmgrPortCfg_t *pCfg;
+  RC_t rc =  FAILURE;
+   uint32 portLinkState;
+   uint32 adminState, count = 0;
+   BOOL restore =  FALSE;
+   BOOL needCleanup =  TRUE, skipFlag =  FALSE;
+
+  do
+  {
+    if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+    {
+      return rc;
+    }
+
+    if ( DOT1X_PAE_PORT_AUTH_CAPABLE != pCfg->paeCapabilities)
+    {
+      authmgrPhysicalPortAccessSet(intIfNum);
+      return  SUCCESS;
+    }
+
+    /* Link state */
+    rc = nimGetIntfLinkState (intIfNum, &portLinkState);
+    if (rc !=  SUCCESS)
+    {
+      break;
+    }
+    rc = nimGetIntfAdminState (intIfNum, &adminState);
+    if (rc !=  SUCCESS)
+    {
+      break;
+    }
+
+    if (( TRUE != warmRestart) ||
+        (0 == count))
+    {
+      (void) authmgrPortReset (intIfNum);
+      if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities ==
+          DOT1X_PAE_PORT_AUTH_CAPABLE)
+      {
+        rc = authmgrCtlApplyPortConfigData (intIfNum);
+      }
+      else
+      {
+        rc =  SUCCESS;
+      }
+    }
+
+
+    if ((portLinkState ==  UP) &&
+        ( ENABLE == adminState))
+    {
+      if ((warmRestart ==  TRUE) && (restore) && (skipFlag ==  TRUE) &&
+          (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode ==
+           AUTHMGR_PORT_AUTO))
+      {
+        count = 0;
+        if (0 != count)
+        {
+          needCleanup =  FALSE;
+        }
+      }
+    }                         /* end if link state is up */
+  }
+
+  while ( FALSE);
+
+  if ((0 == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount) &&
+      (portLinkState ==  DOWN))  
+  {
+    authmgrPhysicalPortStatusBlockSet(intIfNum);
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Process the activate startup callback from NIM
+*
+* @param -- none
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrIntfActivateStartup ()
+{
+  RC_t rc;
+  uint32 intIfNum = 0;
+
+  rc = nimFirstValidIntfNumber (&intIfNum);
+
+  while (rc ==  SUCCESS)
+  {
+    if (authmgrIsValidIntf (intIfNum) ==  TRUE)
+    {
+      authmgrIntfStart (intIfNum, FALSE);
+    }
+
+    rc = nimNextValidIntfNumber (intIfNum, &intIfNum);
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Make sure this is a valid interface for authmgr
+*
+* @param    intIfNum   @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrIhIntfValidate (uint32 intIfNum)
+{
+  /* Check for valid interface number */
+  if (nimCheckIfNumber (intIfNum) !=  SUCCESS)
+  {
+    return  FAILURE;
+  }
+
+  /* Check for physical interface interface */
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Obtain a pointer to the specified interface configuration data
+*           for this interface
+*
+* @param    intIfNum @b{(input)} Internal Interface Number
+* @param    **pCfg   @b{(output)}  Ptr  to authmgr port config structure
+*                           or  NULL if not needed
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+*
+* @comments Facilitates pre-configuration, as it checks if the NIM
+*           interface exists and whether the component is in a state to
+*           be configured (regardless of whether the component is enabled
+*           or not).
+*
+* @comments The caller can set the pCfg parm to  NULL if it does not
+*           want the value output from this function.
+*
+* @end
+*********************************************************************/
+ BOOL authmgrIntfIsConfigurable (uint32 intIfNum, authmgrPortCfg_t ** pCfg)
+{
+  nimConfigID_t configId;
+
+  if (!(AUTHMGR_IS_READY))
+  {
+    return  FALSE;
+  }
+
+  /* Check boundary conditions */
+  if (intIfNum <= 0 || intIfNum >=  AUTHMGR_INTF_MAX_COUNT)
+  {
+    return  FALSE;
+  }
+
+  /* verify that the configId in the config data table entry matches the
+     configId that NIM maps to
+     ** the intIfNum we are considering
+   */
+  if (nimConfigIdGet (intIfNum, &configId) ==  SUCCESS)
+  {
+    if (NIM_CONFIG_ID_IS_EQUAL
+        (&configId,
+         &(authmgrCB->globalInfo->authmgrCfg->authmgrPortCfg[intIfNum].
+           configId)) ==  TRUE)
+    {
+      *pCfg = &authmgrCB->globalInfo->authmgrCfg->authmgrPortCfg[intIfNum];
+      return  TRUE;
+    }
+  }
+
+  /* if we get here, either we have a table management error between authmgrCfg
+     and authmgrMapTbl or
+     ** there is synchronization issue between NIM and components w.r.t. interface
+     **creation/deletion
+   */
+   LOGF ( LOG_SEVERITY_INFO,
+           "Error accessing AUTHMGR config data for interface %s in AUTHMGR interface configuration.\n",
+           authmgrIntfIfNameGet(intIfNum));
+  return  FALSE;
+}
+
+/*********************************************************************
+* @purpose  Obtain a pointer to the first free interface config struct
+*
+* @param    intIfNum @b{(input)} Internal Interface Number
+* @param    **pCfg   @b{(output)}  Ptr  to authmgr port config structure
+*                           or  NULL if not needed
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+*
+* @comments Facilitates pre-configuration, as it checks if the NIM
+*           interface exists and whether the component is in a state to
+*           be configured (regardless of whether the component is enabled
+*           or not).
+*
+* @end
+*********************************************************************/
+ BOOL authmgrIntfConfigEntryGet (uint32 intIfNum, authmgrPortCfg_t ** pCfg)
+{
+  uint32 i;
+  nimConfigID_t configId;
+  nimConfigID_t configIdNull;
+  RC_t rc;
+
+  memset (&configIdNull, 0, sizeof (nimConfigID_t));
+
+  if (!(AUTHMGR_IS_READY))
+  {
+    return  FALSE;
+  }
+
+  if ((rc = nimConfigIdGet (intIfNum, &configId)) ==  SUCCESS)
+  {
+    for (i = 1; i <  AUTHMGR_INTF_MAX_COUNT; i++)
+    {
+      if (NIM_CONFIG_ID_IS_EQUAL
+          (&authmgrCB->globalInfo->authmgrCfg->authmgrPortCfg[i].configId,
+           &configIdNull))
+      {
+        authmgrCB->globalInfo->authmgrMapTbl[intIfNum] = i;
+        *pCfg = &authmgrCB->globalInfo->authmgrCfg->authmgrPortCfg[i];
+        return  TRUE;
+      }
+    }
+  }
+
+  return  FALSE;
+}
+
+/*********************************************************************
+*
+* @purpose  To process the Callback for  CREATE
+*
+* @param    uint32  intIfNum  internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*
+*********************************************************************/
+RC_t authmgrIntfCreate (uint32 intIfNum)
+{
+  nimConfigID_t configId;
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf (intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if (nimConfigIdGet (intIfNum, &configId) !=  SUCCESS)
+  {
+    return  FAILURE;
+  }
+
+  pCfg = &authmgrCB->globalInfo->authmgrCfg->authmgrPortCfg[intIfNum];
+
+  if (!(NIM_CONFIG_ID_IS_EQUAL (&configId, &pCfg->configId)))
+  {
+    NIM_CONFIG_ID_COPY (&pCfg->configId, &configId);
+    /* If an interface configuration entry is not already assigned to the
+       interface, assign one */
+    /* Update the configuration structure with the config id */
+    authmgrBuildDefaultIntfConfigData (&configId, pCfg);
+  }
+
+  /* Initialize the port info and clear the stats for this interface */
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].nimStatus =
+     AUTHMGR_PORT_STATUS_NA;
+  (void) authmgrCtlPortStatsClear (intIfNum);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+*
+* @purpose  To process the Callback for  DETACH
+*
+* @param    uint32  intIfNum  internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*
+*********************************************************************/
+RC_t authmgrIntfDetach (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) ==  TRUE)
+  {
+    authmgrPortInfoCleanup (intIfNum);
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].paeCapabilities ==
+         DOT1X_PAE_PORT_AUTH_CAPABLE)
+    {
+      (void) authmgrCtlApplyPortConfigData (intIfNum);
+    }
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+*
+* @purpose  To process the Callback for  DELETE
+*
+* @param    uint32  intIfNum  internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*
+*********************************************************************/
+RC_t authmgrIntfDelete (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) ==  TRUE)
+  {
+    authmgrPortInfoCleanup (intIfNum);
+
+    memset ((void *) &pCfg->configId, 0, sizeof (nimConfigID_t));
+    memset ((void *) &authmgrCB->globalInfo->authmgrMapTbl[intIfNum], 0,
+            sizeof (uint32));
+    memset ((void *) &authmgrCB->globalInfo->authmgrPortInfo[intIfNum], 0,
+            sizeof (authmgrPortInfo_t));
+    memset ((void *) &authmgrCB->globalInfo->authmgrPortStats[intIfNum], 0,
+            sizeof (authmgrPortStats_t));
+  }
+
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+* @purpose  Set the Violation Callback in the driver
+*
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    flag       @b{(input)) True to set the value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+* @returns   ERROR
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrIhPhyPortViolationCallbackSet (uint32 intIfNum,
+                                               AUTHMGR_PORT_VIOLATION_CALLBACK_t
+                                              flag)
+{
+  RC_t rc =  SUCCESS;
+
+  if ( AUTHMGR_PORT_VIOLATION_CALLBACK_ENABLE == flag)
+  {
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].unLearnMacPolicy =  TRUE;
+  }
+  else
+  {
+    authmgrCB->globalInfo->authmgrPortInfo[intIfNum].unLearnMacPolicy =  FALSE;
+  }
+
+  return rc;
+}
+
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_mab.c b/src/sonic-pac/authmgr/mapping/auth_mgr_mab.c
new file mode 100644
index 00000000000..89f57a5fb29
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_mab.c
@@ -0,0 +1,135 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_auth_method.h"
+#include "osapi.h"
+#include <unistd.h>
+
+/*********************************************************************
+ * * @purpose function to send auth mgr events to dot1x daemon
+ * * 
+ * * @param intIfNum   interface number
+ * * @param event   authmgr event
+ * * @param macAddr  client mac
+ * * @return  SUCCESS or  FAILURE
+ * * 
+ * * @comments
+ * * 
+ * * @end      
+ * *********************************************************************/
+RC_t authmgrMabEventSend (uint32 intIfNum, uint32 event,  enetMacAddr_t *macAddr)
+{ 
+   uchar8 ctrl_ifname[ NIM_IF_ALIAS_SIZE + 1];
+   char8 reply[1024] = {};
+  mab_pac_cmd_t cmd_buf;
+  unsigned int reply_len = sizeof(reply);
+  unsigned int retryCnt = 3;
+
+  nimGetIntfName (intIfNum,  ALIASNAME, ctrl_ifname);
+
+  memset(&cmd_buf, 0, sizeof(cmd_buf));
+
+  osapiStrncpySafe(cmd_buf.intf, ctrl_ifname, sizeof(cmd_buf.intf)-1);
+  osapiStrncpySafe(cmd_buf.cmd, "event-notify", strlen("event-notify")+1);
+
+  memcpy(cmd_buf.mac_addr, macAddr->addr, 6);
+
+  cmd_buf.notif_event = event;
+
+retry:
+
+  if (retryCnt)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+        "authmgrMabEventSend sending %s for interface %s\n", cmd_buf.cmd, ctrl_ifname);
+
+    memset(&reply, 0, sizeof(reply));
+
+    if (0 == authmgrMabDataSend(&cmd_buf, reply, &reply_len))
+    { 
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+          "%s:%d reply = %s\n", __func__, __LINE__, reply);
+
+      if ((reply_len ) && (0 == strncmp("OK", reply, strlen("OK"))))
+      {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+            "%s:%d success\n", __func__, __LINE__);
+        return  SUCCESS;
+      }
+      else
+      {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+            "%s:%d failure\n", __func__, __LINE__);
+        usleep(10*1000);
+      }
+    }
+    retryCnt--;
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+        "%s:%d retrying again (%d)", __func__, __LINE__, retryCnt);
+    goto retry;
+  }
+
+  return  FAILURE;
+}
+
+/*********************************************************************
+ * * @purpose function to get dot1x admin mode
+ * *
+ * * @param intIfNum   interface number
+ * * @param event   authmgr event
+ * * @param macAddr  client mac
+ * * @return  SUCCESS or  FAILURE
+ * *
+ * * @comments
+ * *
+ * * @end
+ * *********************************************************************/
+RC_t authmgrMabIntfAdminModeGet (uint32 intIfNum,  BOOL *enabled)
+{
+  mab_pac_cmd_t cmd_buf;
+   char8 ctrl_ifname[16] = {};
+   char8 buf[128] = {};
+  unsigned int len = sizeof(buf);
+
+  *enabled =  FALSE;
+  nimGetIntfName (intIfNum,  ALIASNAME, ctrl_ifname);
+
+  memset(&cmd_buf, 0, sizeof(cmd_buf));
+
+  osapiStrncpySafe(cmd_buf.intf, ctrl_ifname, sizeof(cmd_buf.intf)-1);
+  osapiStrncpySafe(cmd_buf.cmd, "PING", strlen("PING")+1);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+  "authmgrMabDataSend PING for %s start \n", ctrl_ifname);
+  if (0 == authmgrMabDataSend(&cmd_buf, buf, &len))
+  {
+    if (0 == strncmp("PONG", buf, strlen("PONG")))
+    {
+      *enabled =  TRUE;
+    }
+  }
+  else
+  {
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+    "authmgrMabDataSend not successful\n");
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, intIfNum,
+  " Mab reply buf = %s\n", buf);
+  return  SUCCESS;
+}
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_socket.c b/src/sonic-pac/authmgr/mapping/auth_mgr_socket.c
new file mode 100644
index 00000000000..fda0a8ca6bf
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_socket.c
@@ -0,0 +1,845 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <pthread.h>
+#include <sys/socket.h>
+#include <unistd.h>
+#include <errno.h>
+#include <arpa/inet.h>
+#include <netdb.h>
+#include "osapi.h"
+#include "auth_mgr_include.h"
+#include "auth_mgr_auth_method.h"
+#include "wpa_ctrl.h"
+#include "radius_attr_parse.h"
+#include "fpSonicUtils.h"
+
+#define MAX_CLIENTS 1024
+#define NO_SOCKET -1
+#define TID_INIT  -1
+#define SERVER_IPV4_ADDR "127.0.0.1"
+#define SERVER_LISTEN_PORT 3434
+#define MAX_SEND_SIZE 1024
+
+#define AUTH_MGR_COPY(_a) static int _a##_##COPY(void *in, void *out)
+#define AUTH_MGR_ENTER(_a, _b, _c, _rc) _rc = _a##_##COPY(_b, _c)
+
+#define AUTH_MGR_STR_COPY(_dst_, _src_) memcpy(_dst_, _src_, min(sizeof(_src_), sizeof(_dst_)))
+
+#define ETH_P_PAE 0x888E
+
+typedef struct connection_list_e
+{
+  int socket;
+  pthread_t tid;
+}connection_list_t;
+
+static connection_list_t connection_list[MAX_CLIENTS] = {};
+
+unsigned int extra_detail_logs = 0;
+
+AUTH_MGR_COPY(INTERFACE)
+{
+
+	char *intfStr = (char *)in;
+	unsigned int intf = 0; 
+
+    fpGetIntIfNumFromHostIfName(intfStr, &intf);
+	(*(unsigned int *)out) = intf;
+
+	return 0;
+}
+
+AUTH_MGR_COPY(BAM_METHOD)
+{
+	char *methodStr = ((clientStatusReply_t *)in)->info.authInfo.bam_used;
+	int retVal = 0; 
+
+	if (0 == strncmp("radius", methodStr, strlen("radius")))
+	{
+    ((authmgrClientStatusInfo_t *)out)->info.authInfo.authMethod =  AUTH_METHOD_RADIUS;
+	}
+	else if (0 == strncmp("local", methodStr, strlen("local")))
+	{
+    ((authmgrClientStatusInfo_t *)out)->info.authInfo.authMethod =  AUTH_METHOD_LOCAL;
+	}
+	else
+	{
+		retVal = -1;
+	}
+
+	return retVal;
+}
+
+
+AUTH_MGR_COPY(METHOD_CHANGE)
+{
+	authmgrClientStatusInfo_t *cInfo = (authmgrClientStatusInfo_t *)out;
+	clientStatusReply_t *cReply = (clientStatusReply_t *)in;
+        int retVal = 0;
+
+	if (0 == strncmp("enable", cReply->info.enableStatus, strlen("enable")))
+	{
+          cInfo->info.enableStatus =  ENABLE;
+	}
+	else if (0 == strncmp("disable", cReply->info.enableStatus, strlen("disable")))
+	{
+          cInfo->info.enableStatus =  DISABLE;
+	}
+	else
+	{
+		retVal = -1;
+	}
+
+	return retVal;
+}
+
+AUTH_MGR_COPY(METHOD)
+{
+	char *methodStr = (char *)in;
+	int retVal = 0; 
+
+	if (0 == strncmp("802.1X", methodStr, strlen("802.1X")))
+	{
+		(*(unsigned int *)out) =  AUTHMGR_METHOD_8021X;
+	}
+	else if (0 == strncmp("mab", methodStr, strlen("mab")))
+	{
+		(*(unsigned int *)out) =  AUTHMGR_METHOD_MAB;
+	}
+	else
+	{
+		retVal = -1;
+	}
+
+	return retVal;
+}
+
+AUTH_MGR_COPY(COMMON_PARAMS)
+{
+	authmgrClientStatusInfo_t *cInfo = (authmgrClientStatusInfo_t *)out;
+	clientStatusReply_t *cReply = (clientStatusReply_t *)in;
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+      "Received update for user %02X:%02X:%02X:%02X:%02X:%02X ",
+      (unsigned int)cReply->info.authInfo.addr[0], (unsigned int)cReply->info.authInfo.addr[1], (unsigned int)cReply->info.authInfo.addr[2],
+      (unsigned int)cReply->info.authInfo.addr[3], (unsigned int)cReply->info.authInfo.addr[4], (unsigned int)cReply->info.authInfo.addr[5]);
+	/* copy mac address */
+	memcpy(cInfo->info.authInfo.macAddr.addr, cReply->info.authInfo.addr, 6); 
+	/* copy eapol version */
+	cInfo->info.authInfo.eapolVersion = cReply->info.authInfo.eapolVersion;
+	return 0;
+}
+
+AUTH_MGR_COPY(NEW_CLIENT)
+{
+	int rc = 0;
+
+	AUTH_MGR_ENTER(COMMON_PARAMS, in, out, rc);
+	return rc;
+}
+
+AUTH_MGR_COPY(ATTR_INFO)
+{
+
+	authmgrClientStatusInfo_t *cInfo = (authmgrClientStatusInfo_t *)out;
+	clientStatusReply_t *cReply = (clientStatusReply_t *)in;
+
+    if (cReply->info.authInfo.attrInfo.userNameLen)
+    {
+      memcpy(cInfo->info.authInfo.attrInfo.userName, cReply->info.authInfo.attrInfo.userName, cReply->info.authInfo.attrInfo.userNameLen);
+      cInfo->info.authInfo.attrInfo.userNameLen = cReply->info.authInfo.attrInfo.userNameLen;
+    }
+
+    if (cReply->info.authInfo.attrInfo.serverStateLen)
+    {
+      memcpy(cInfo->info.authInfo.attrInfo.serverState, cReply->info.authInfo.attrInfo.serverState, cReply->info.authInfo.attrInfo.serverStateLen);
+      cInfo->info.authInfo.attrInfo.serverStateLen = cReply->info.authInfo.attrInfo.serverStateLen;
+    }
+    
+    if (cReply->info.authInfo.attrInfo.serverClassLen)
+    {
+      memcpy(cInfo->info.authInfo.attrInfo.serverClass, cReply->info.authInfo.attrInfo.serverClass, cReply->info.authInfo.attrInfo.serverClassLen);
+      cInfo->info.authInfo.attrInfo.serverClassLen = cReply->info.authInfo.attrInfo.serverClassLen;
+    }
+   
+    cInfo->info.authInfo.attrInfo.sessionTimeout = cReply->info.authInfo.attrInfo.sessionTimeout;
+    cInfo->info.authInfo.attrInfo.terminationAction = cReply->info.authInfo.attrInfo.terminationAction;
+    cInfo->info.authInfo.attrInfo.idFromServer = cReply->info.authInfo.attrInfo.idFromServer;
+    osapiStrncpySafe(cInfo->info.authInfo.attrInfo.vlanString, cReply->info.authInfo.attrInfo.vlanString, strlen(Reply->info.authInfo.attrInfo.vlanString)+1);
+    cInfo->info.authInfo.attrInfo.attrFlags = cReply->info.authInfo.attrInfo.attrFlags;
+    cInfo->info.authInfo.attrInfo.vlanAttrFlags = cReply->info.authInfo.attrInfo.vlanAttrFlags;
+ 
+#if 0
+  memcpy(&cInfo->info.authInfo.attrInfo, &cReply->info.authInfo.attrInfo,
+         sizeof(cInfo->info.authInfo.attrInfo));
+#endif
+	return 0; 
+}
+
+
+AUTH_MGR_COPY(AUTH_SUCCESS)
+{
+	int rc = 0;
+
+	authmgrClientStatusInfo_t *cInfo = (authmgrClientStatusInfo_t *)out;
+	clientStatusReply_t *cReply = (clientStatusReply_t *)in;
+	/* copy the bam if the bam method is one of the supported */
+	AUTH_MGR_ENTER(BAM_METHOD, in, out, rc);
+
+  if (0 != rc)
+		goto fail;
+
+			AUTH_MGR_ENTER(COMMON_PARAMS, in, out, rc);
+
+   /* copy other auth-success related params */
+
+	/* user name */
+	AUTH_MGR_STR_COPY(cInfo->info.authInfo.authmgrUserName, cReply->info.authInfo.userName);
+	cInfo->info.authInfo.authmgrUserNameLength = cReply->info.authInfo.userNameLength;
+
+	AUTH_MGR_ENTER(ATTR_INFO, in, out, rc);
+
+	return 0; 
+
+fail:
+	return -1;
+}
+
+
+
+AUTH_MGR_COPY(COMMON_FAIL)
+{
+	int rc = 0;
+
+
+	authmgrClientStatusInfo_t *cInfo = (authmgrClientStatusInfo_t *)out;
+	clientStatusReply_t *cReply = (clientStatusReply_t *)in;
+
+	/* copy the bam if the bam method is one of the supported */
+	AUTH_MGR_ENTER(BAM_METHOD, in, out, rc);
+
+	AUTH_MGR_ENTER(COMMON_PARAMS, in, out, rc);
+
+	/* user name */
+	AUTH_MGR_STR_COPY(cInfo->info.authInfo.authmgrUserName, cReply->info.authInfo.userName);
+	cInfo->info.authInfo.authmgrUserNameLength = cReply->info.authInfo.userNameLength;
+
+	return 0; 
+}
+
+
+AUTH_MGR_COPY(AUTH_FAIL)
+{
+	int rc = 0;
+
+	AUTH_MGR_ENTER(COMMON_FAIL, in, out, rc);
+	return rc; 
+}
+
+AUTH_MGR_COPY(AUTH_TIMEOUT)
+{
+	int rc = 0;
+
+	AUTH_MGR_ENTER(COMMON_FAIL, in, out, rc);
+	return rc; 
+}
+
+AUTH_MGR_COPY(AUTH_SERVER_COMM_FAILURE)
+{
+	int rc = 0;
+
+	AUTH_MGR_ENTER(COMMON_FAIL, in, out, rc);
+	return rc; 
+}
+
+AUTH_MGR_COPY(RADIUS_SERVERS_DEAD)
+{
+	int rc = 0;
+
+	AUTH_MGR_ENTER(COMMON_FAIL, in, out, rc);
+	return rc; 
+}
+
+AUTH_MGR_COPY(CLIENT_DISCONNECTED)
+{
+	int rc = 0;
+
+	AUTH_MGR_ENTER(COMMON_PARAMS, in, out, rc);
+	return rc; 
+}
+
+
+AUTH_MGR_COPY(RADIUS_DACL_INFO)
+{
+return 0;
+}
+
+
+AUTH_MGR_COPY(RADIUS_FIRST_PASS_DACL_DATA)
+{
+return 0;
+}
+
+AUTH_MGR_COPY(MKA_PEER_TIMEOUT)
+{
+return 0;
+}
+
+int auth_mgr_status_params_copy(authmgrClientStatusInfo_t *clientInfo, clientStatusReply_t *reply)
+{
+	void *in = (void *)reply;
+	void *out = (void *)clientInfo;
+	int rc = 0;
+
+	switch (reply->status)
+	{
+		case NEW_CLIENT:
+			AUTH_MGR_ENTER(NEW_CLIENT, in, out, rc);
+			break;
+
+		case AUTH_FAIL:
+			AUTH_MGR_ENTER(AUTH_FAIL, in, out, rc);
+			break;
+
+		case AUTH_SUCCESS:
+			AUTH_MGR_ENTER(AUTH_SUCCESS, in, out, rc);
+			break;
+
+		case AUTH_TIMEOUT:
+			AUTH_MGR_ENTER(AUTH_TIMEOUT, in, out, rc);
+			break;
+
+		case AUTH_SERVER_COMM_FAILURE:
+			AUTH_MGR_ENTER(AUTH_SERVER_COMM_FAILURE, in, out, rc);
+			break;
+
+		case CLIENT_DISCONNECTED:
+			AUTH_MGR_ENTER(CLIENT_DISCONNECTED, in, out, rc);
+			break;
+
+		case METHOD_CHANGE:
+			AUTH_MGR_ENTER(METHOD_CHANGE, in, out, rc);
+			break;
+
+		case RADIUS_SERVERS_DEAD:
+			AUTH_MGR_ENTER(RADIUS_SERVERS_DEAD, in, out, rc);
+			break;
+
+		case RADIUS_FIRST_PASS_DACL_DATA:
+			AUTH_MGR_ENTER(RADIUS_FIRST_PASS_DACL_DATA, in, out, rc);
+			break;
+
+		case RADIUS_DACL_INFO:
+			AUTH_MGR_ENTER(RADIUS_DACL_INFO, in, out, rc);
+			break;
+
+		case MKA_PEER_TIMEOUT:
+			AUTH_MGR_ENTER(MKA_PEER_TIMEOUT, in, out, rc);
+			break;
+
+		default:
+			rc = -1;
+
+	}
+return rc;
+}
+
+int wpa_sync_send(char *ctrl_ifname, char * cmd, char *buf, size_t *len)
+{
+	static struct wpa_ctrl *ctrl_conn;
+	int ret;
+	char sock_file[128];
+
+	memset(sock_file, 0, sizeof(sock_file));
+	sprintf(sock_file, "/var/run/hostapd/%s", ctrl_ifname);
+
+	ctrl_conn = wpa_ctrl_open(sock_file);
+
+	if (ctrl_conn ==  NULL)
+	{
+	  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+		  "Not connected to hostapd - command dropped.. retrying..\n");
+	  usleep(10 * 1000);
+
+	  ctrl_conn = wpa_ctrl_open(sock_file);
+
+	  if (ctrl_conn ==  NULL)
+	  {
+		AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+         "Not connected to hostapd - command dropped..\n");
+		return -1;
+	  }
+	}      
+      
+	*len = sizeof(buf) - 1;
+	ret = wpa_ctrl_request(ctrl_conn, cmd, strlen(cmd), buf, len,  NULL);
+	if (ret == -2) {
+		AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+         "'%s' command timed out.\n", cmd);
+		return -2;
+	} else if (ret < 0) {
+		AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+         "'%s' command failed.\n", cmd);
+		return -1;
+	}
+	if (1) {
+		buf[*len] = '\0';
+		AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,"hostapd reply %s", buf);
+	}
+
+	wpa_ctrl_close(ctrl_conn);
+	return 0;
+}               
+
+/* function to receive multiple connections */
+
+/* Start listening socket listen_sock. */
+int start_listen_socket(int *listen_sock)
+{
+	int reuse = 1;
+	struct sockaddr_in my_addr;
+
+	// Obtain a file descriptor for our "listening" socket.
+	*listen_sock = socket(AF_INET, SOCK_STREAM, 0);
+	if (*listen_sock < 0) 
+	{
+		perror("socket");
+		return -1;
+	}
+
+	if (setsockopt(*listen_sock, SOL_SOCKET, SO_REUSEADDR, &reuse, sizeof(reuse)) != 0) {
+		perror("setsockopt");
+		return -1;
+	}
+
+	memset(&my_addr, 0, sizeof(my_addr));
+	my_addr.sin_family = AF_INET;
+	my_addr.sin_addr.s_addr = inet_addr(SERVER_IPV4_ADDR);
+	my_addr.sin_port = htons(SERVER_LISTEN_PORT);
+
+	if (bind(*listen_sock, (struct sockaddr*)&my_addr, sizeof(struct sockaddr)) != 0) {
+		perror("bind");
+		return -1;
+	}
+
+	// start accept client connections
+	if (listen(*listen_sock, 144) != 0) {
+		perror("listen");
+		return -1;
+	}
+	AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+      "Accepting connections on port %d.\n", (int)SERVER_LISTEN_PORT);
+
+	return 0;
+}
+
+static void close_connection(int conn_socket)
+{
+    /* Close it regardless */
+	close(conn_socket);
+}
+
+void shutdown_properly(int *listen_sock)
+{
+	int i;
+
+	for (i = 0; i < MAX_CLIENTS; ++i)
+		if (connection_list[i].socket != NO_SOCKET)
+			close_connection(connection_list[i].socket);
+
+	close(*listen_sock);
+	AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,"Shutdown server properly.\n");
+	return;
+}
+
+
+int build_fd_sets(fd_set *read_fds, fd_set *write_fds, fd_set *except_fds, int listen_sock)
+{
+
+	FD_ZERO(read_fds);
+	FD_SET(listen_sock, read_fds);
+	return 0;
+}  
+
+/* Receive message from peer and handle it with message_handler(). */
+int read_from_connection(int socket, char *buf, unsigned int buf_len, 
+                         unsigned int *bytes_read, bool *more_data)
+{
+	size_t len_to_receive;
+	ssize_t received_count = 0;
+	size_t received_total = 0;
+
+	char *buf_ptr = buf;
+
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+      "Entering read_from_connection fd %d buf_len %d\n", socket, buf_len);
+
+	do {
+		if (received_total >= buf_len)
+		{
+			/* still more to copy */
+			*more_data = true;
+	        *bytes_read = received_total;
+			AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+             "fd: %d There is more data , Read %zd bytes till now\n", 
+             socket, received_count);
+			return 0;
+		}
+
+		/* Count bytes to receive.*/
+		len_to_receive = buf_len;
+		if (len_to_receive > MAX_SEND_SIZE)
+			len_to_receive = MAX_SEND_SIZE;
+
+		AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0, 
+             "fd: %d Let's try to recv() %zd bytes... ", socket, len_to_receive);
+		
+        received_count = recv(socket, buf_ptr, len_to_receive, NULL);
+		
+        if (received_count < 0) {
+			if (errno == EAGAIN || errno == EWOULDBLOCK) {
+				AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+                  "fd %d peer is not ready right now, try again later.\n", socket);
+				continue;
+			} else {
+				perror("recv() from peer error");
+				*more_data = false;
+				return -1;
+			}
+		}
+		/* If recv() returns 0, it means that peer gracefully shutdown. Shutdown client.*/
+		else if (received_count == 0) {
+			AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+              "fd %d recv() 0 bytes. Peer gracefully shutdown.\n", socket);
+			*more_data = false;
+			break;
+		}
+		else if (received_count > 0) {
+			received_total += received_count;
+			AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+              "fd %d recv() %zd bytes\n", socket, received_count);
+
+			buf_ptr += received_count;
+			len_to_receive -= received_count;
+		}
+	} while (received_count > 0);
+
+	*bytes_read = received_total;
+
+	AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+       "fd %d Total recv()'ed %zu bytes.\n", socket, received_total);
+	return 0;
+}
+
+
+void *handle_connection(void *arg)
+{
+	int new_socket = *((int *)arg);
+	char *recv_buff = NULL;
+	char *buf = NULL;
+	unsigned int bytes_received;
+	bool more_data = true;
+    unsigned int buff_step_size = 2048; 
+	int rem_len = 4* buff_step_size;
+	int buff_size = 4* buff_step_size;
+	clientStatusReply_t *clientReply =  NULLPTR;
+	authmgrClientStatusInfo_t clientStatus;
+	int total_read = 0;
+	uint32 intf = 0;
+  uint32 method = 0, status = 0;
+  void *in = NULL;
+  void *out = NULL;
+  int rc = -1;
+	 char8 paeCapabilities = 0;
+
+  int i;
+
+  recv_buff = (char *)malloc(buff_size);
+
+  if (!recv_buff)
+     goto conn_close;
+
+  memset(recv_buff, 0, buff_size);
+  buf = recv_buff;
+
+	while(more_data)
+	{
+		more_data = false;
+		if (rem_len <= 0)
+		{
+			AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+             "fd %d More data to read, but not sufficient buffer !!\n", new_socket);
+             buff_size += buff_step_size;
+             recv_buff = (char *)realloc(recv_buff, buff_size);
+             buf = recv_buff + total_read;
+		     rem_len = buff_size - total_read;
+		}
+		bytes_received = 0;
+		if (0 != read_from_connection(new_socket, buf, rem_len, &bytes_received, &more_data))
+		{
+			break;
+		}
+		total_read += bytes_received;
+        buf = recv_buff + total_read;
+		rem_len = buff_size - total_read;
+	}
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,"fd %d : buffer: total_read  %d", new_socket, total_read);
+
+  close(new_socket);
+
+   if (extra_detail_logs)
+   {
+     char *ptr = recv_buff;
+     for (i =0; i<10; i++)
+     {
+       AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,"0x%x ", ptr[i]);  
+     }
+     AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,"\nstart processing !!\n");
+   } 
+	/* invoke api to decipher the data 
+	 * and post to the appropriate queue */
+
+	memset(&clientStatus, 0, sizeof(clientStatus));
+
+	clientReply = (clientStatusReply_t *)recv_buff;
+
+    if (clientReply->status)
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+      "Read update from socket for user %02X:%02X:%02X:%02X:%02X:%02X  on interface %s"
+       "status %s method %s",
+      (unsigned int)clientReply->info.authInfo.addr[0],
+      (unsigned int)clientReply->info.authInfo.addr[1], 
+      (unsigned int)clientReply->info.authInfo.addr[2],
+      (unsigned int)clientReply->info.authInfo.addr[3],
+      (unsigned int)clientReply->info.authInfo.addr[4],
+      (unsigned int)clientReply->info.authInfo.addr[5],
+      clientReply->intf, authmgrMethodStatusStringGet(clientReply->status), clientReply->method);
+
+	/* convert char intf to intf number */
+       in = (void *)clientReply->intf;
+       out = (void *)&intf;
+
+       AUTH_MGR_ENTER(INTERFACE, in, out, rc);
+
+       AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,"AUTH_MGR_ENTER INTERFACE !! rc %d \n", rc);
+
+      if (-1 == rc)
+          goto conn_close;
+
+  (void)authmgrDot1xPortPaeCapabilitiesGet(intf, &paeCapabilities);
+  if ( DOT1X_PAE_PORT_AUTH_CAPABLE != paeCapabilities)
+          goto conn_close;
+
+       /* copy the method */
+       in = (void *)clientReply->method;
+       out = (void *)&method;
+
+       AUTH_MGR_ENTER(METHOD, in, out, rc);
+       AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,"AUTH_MGR_ENTER METHOD !! rc %d \n", rc);
+      if (-1 == rc)
+        goto conn_close;
+
+      status = clientReply->status;
+
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,"client reply Status %d \n", status);
+      rc = auth_mgr_status_params_copy(&clientStatus, clientReply);
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,"AUTH_MGR_ENTER PARAMS COPY !! rc %d \n", rc);
+      if (-1 == rc)
+        goto conn_close;
+
+       AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,"AUTH_MGR_ENTER status update !! rc %d \n", rc);
+	authmgrPortClientAuthStatusUpdate (intf, method,
+			status, (void *) &clientStatus);
+
+conn_close:
+    if (recv_buff)
+      free(recv_buff);
+	free (arg);
+    pthread_exit(NULL);
+}
+
+int open_new_connection(int new_client_sock)
+{
+  pthread_attr_t tattr;
+  static int cl_count;
+  int ret = 0;
+  int *new_sock;
+
+  if ((ret = pthread_attr_init(&tattr)) !=0)
+  {
+	AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, 0,
+     "Failed to create thread - pthread_attr_init failed with %d\n", ret);
+	close(new_client_sock);
+	return -1;
+  }
+
+  if ((ret = pthread_attr_setdetachstate(&tattr,PTHREAD_CREATE_DETACHED)) !=0)
+  {
+	AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, 0,
+     "Failed to create thread - pthread_attr_setdetachstate failed with %d\n", ret);
+	close(new_client_sock);
+	pthread_attr_destroy(&tattr);
+	return -1;
+  }
+
+  new_sock = malloc(sizeof(*new_sock));
+  *new_sock = new_client_sock;
+
+  connection_list[cl_count].socket = new_client_sock;
+  connection_list[cl_count].tid = TID_INIT;
+
+  if ((ret = pthread_create(&connection_list[cl_count].tid, &tattr,
+		  handle_connection, (void*)new_sock)) !=0)
+  {
+	AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, 0,
+		"Failed to create thread with %d\n", ret);
+	free(new_sock);
+	close_connection(new_client_sock);
+	pthread_attr_destroy(&tattr);
+	return -1;
+  }
+  cl_count = (cl_count+1)%MAX_CLIENTS;
+  pthread_attr_destroy(&tattr);
+  return 0;
+}
+
+
+int handle_async_resp_data(int *listen_sock)
+{
+	int i;
+	int new_client_sock = -1;
+	struct sockaddr_in client_addr;
+	socklen_t client_len = sizeof(client_addr);
+	char client_ipv4_str[INET_ADDRSTRLEN];
+    struct linger sl;
+
+
+	if (start_listen_socket(listen_sock) != 0) {
+		return -1;
+	}
+
+	for (i = 0; i < MAX_CLIENTS; ++i) 
+	{
+		connection_list[i].socket = NO_SOCKET;
+		connection_list[i].tid = TID_INIT;
+	}
+
+	while (1) 
+	{
+		new_client_sock = -1;
+		memset(&client_addr, 0, sizeof(client_addr));
+
+		new_client_sock = accept(*listen_sock, (struct sockaddr *)&client_addr, &client_len);
+		if (new_client_sock < 0) {
+            AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, 0, "accept failed");
+			continue;
+		}
+
+        sl.l_onoff = 1;  /* enable linger option */
+        sl.l_linger = 0;    /* timeout interval in seconds */
+        if (-1 == setsockopt(new_client_sock, SOL_SOCKET, SO_LINGER, &sl, sizeof(sl)))
+        {
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+            "unable to set SO_LINGER option socket with fd: %d\n", new_client_sock);
+        }
+
+
+		inet_ntop(AF_INET, &client_addr.sin_addr, client_ipv4_str, INET_ADDRSTRLEN);
+
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, 0,
+                        "received from client fd %d [%s:%u] ",
+                       new_client_sock, inet_ntoa(client_addr.sin_addr), ntohs(client_addr.sin_port));
+		open_new_connection(new_client_sock);
+	}
+	return 0;
+}
+
+int authmgrMabDataSend(mab_pac_cmd_t *req, char *resp, unsigned int *len)
+{
+  struct sockaddr_in saddr;
+  int fd, rc;
+  struct hostent *local_host;
+  char *ptr = (char *)req;
+  struct sockaddr_in client;
+  socklen_t clientlen = sizeof(client);
+
+  /* open the socket to MAB server */
+  fd = socket(AF_INET, SOCK_STREAM, 0);
+  if (fd == -1)
+  {
+    fprintf(stderr, "socket failed [%s]\n", strerror(errno));
+    return -1;
+  }
+
+  saddr.sin_family = AF_INET;  
+  saddr.sin_port = htons(3734);     
+  local_host = gethostbyname("127.0.0.1");
+  saddr.sin_addr = *((struct in_addr *)local_host->h_addr);
+
+  rc = connect(fd, (struct sockaddr *)&saddr, sizeof(struct sockaddr_in));
+  if (-1 == rc)
+  {
+    fprintf(stderr, "connect failed [%s]\n", strerror(errno));
+    goto close_soc;
+  }
+
+  getsockname(fd, (struct sockaddr *) &client, &clientlen);
+
+  AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_EVENTS, 0,
+      "The Socket is now connected fd %d [%s:%u] ", 
+      fd, inet_ntoa(client.sin_addr), ntohs(client.sin_port));
+
+  /* Send the command req */
+  rc = send(fd, ptr, sizeof(mab_pac_cmd_t), 0);
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+    "fd : %d Successfully sent data (len %lu bytes): %s",
+	fd,  sizeof(mab_pac_cmd_t), req->cmd);
+
+  /* read the resp */
+    rc = recv(fd, resp, *len, NULL);
+
+    *len = 0;
+    if (rc)
+    {
+      *len = rc;
+    }
+
+close_soc:
+  close(fd);
+  return 0;
+}
+
+
+
+
+RC_t auth_mgr_eap_socket_create( int32 *fd)
+{
+  *fd = socket(PF_PACKET, SOCK_RAW, htons(ETH_P_PAE));
+  if (*fd < 0) {
+    printf("%s, %d socket[PF_PACKET,SOCK_RAW]: %s",
+        __func__, __LINE__, strerror(errno));
+    return  FAILURE;
+  }
+return  SUCCESS;
+
+
+}
diff --git a/src/sonic-pac/authmgr/protocol/auth_mgr_db.c b/src/sonic-pac/authmgr/protocol/auth_mgr_db.c
new file mode 100755
index 00000000000..279d165d01c
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/auth_mgr_db.c
@@ -0,0 +1,532 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_util.h"
+#include "auth_mgr_struct.h"
+#include "osapi_sem.h"
+#include "pacoper_common.h"
+
+extern authmgrCB_t *authmgrCB;
+
+//static RC_t authmgrAuthHistoryLogCreateEntryIndex (uint32 * entryIndex);
+
+/****************************************?*****************************
+*
+* @purpose   Compare function for the authmgr history db Entry Tree
+*
+* @param     pData1 @b{ (input) } Pointer to authmgr Entry Key1
+*            pData2 @b{ (input) } Pointer to authmgr Entry Key2
+*            size   @b{ (input) } Size for the comparision
+*
+* @returns   > 0 if pData1 > pData2
+*            = 0 if pData1 == pData2
+*            < 0 if pData1 < pData2
+*
+* @comments  None
+*
+* @end
+*****************************************?****************************/
+ int32
+authmgrLogicalPortDbEntryCompare (const void *pData1,
+                                  const void *pData2, size_t size)
+{
+  const authmgrLogicalNodeKey_t *pKey1 = (const authmgrLogicalNodeKey_t *) pData1;
+  const authmgrLogicalNodeKey_t *pKey2 = (const authmgrLogicalNodeKey_t *) pData2;
+  register  int32 retVal = 0;
+
+  if ((pKey1 ==  NULLPTR) || (pKey2 ==  NULLPTR))
+  {
+    return 1;
+  }
+
+  retVal = pKey1->keyNum - pKey2->keyNum;
+
+  return retVal;
+}
+
+/*********************************************************************
+* @purpose  Initialize Logical Port Info Database
+*
+* @param    nodeCount    @b{(input)} The number of nodes to be created.
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortInfoDBInit (uint32 nodeCount)
+{
+  /* Allocate the Heap structures */
+  authmgrCB->globalInfo->authmgrLogicalPortTreeHeap =
+    (avlTreeTables_t *) osapiMalloc ( AUTHMGR_COMPONENT_ID,
+                                     nodeCount * sizeof (avlTreeTables_t));
+
+  authmgrCB->globalInfo->authmgrLogicalPortDataHeap =
+    (authmgrLogicalPortInfo_t *) osapiMalloc ( AUTHMGR_COMPONENT_ID,
+                                              nodeCount *
+                                              sizeof
+                                              (authmgrLogicalPortInfo_t));
+
+  /* validate the pointers */
+  if ((authmgrCB->globalInfo->authmgrLogicalPortTreeHeap ==  NULLPTR)
+      || (authmgrCB->globalInfo->authmgrLogicalPortDataHeap ==  NULLPTR))
+  {
+     LOGF ( LOG_SEVERITY_NOTICE,
+             " Error in allocating memory for the AUTHMGR database. Possible causes are insufficient memory.");
+    return  FAILURE;
+  }
+
+  /* AVL Tree creations - authmgrLogicalPortTreeDb */
+  avlCreateAvlTree (&(authmgrCB->globalInfo->authmgrLogicalPortTreeDb),
+                    authmgrCB->globalInfo->authmgrLogicalPortTreeHeap,
+                    authmgrCB->globalInfo->authmgrLogicalPortDataHeap,
+                    nodeCount, sizeof (authmgrLogicalPortInfo_t), 0x10,
+                    sizeof (authmgrLogicalNodeKey_t));
+
+  avlSetAvlTreeComparator (&(authmgrCB->globalInfo->authmgrLogicalPortTreeDb),
+                           authmgrLogicalPortDbEntryCompare);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  DeInitialize Logical Port Info Database
+*
+* @param    none
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortInfoDBDeInit (void)
+{
+  /* Destroy the AVL Tree */
+  if (authmgrCB->globalInfo->authmgrLogicalPortTreeDb.semId !=  NULLPTR)
+  {
+    avlDeleteAvlTree (&authmgrCB->globalInfo->authmgrLogicalPortTreeDb);
+  }
+
+  /* Give up the memory */
+  if (authmgrCB->globalInfo->authmgrLogicalPortTreeHeap !=  NULLPTR)
+  {
+    osapiFree ( AUTHMGR_COMPONENT_ID,
+               authmgrCB->globalInfo->authmgrLogicalPortTreeHeap);
+    authmgrCB->globalInfo->authmgrLogicalPortTreeHeap =  NULLPTR;
+  }
+
+  if (authmgrCB->globalInfo->authmgrLogicalPortDataHeap !=  NULLPTR)
+  {
+    osapiFree ( AUTHMGR_COMPONENT_ID,
+               authmgrCB->globalInfo->authmgrLogicalPortDataHeap);
+    authmgrCB->globalInfo->authmgrLogicalPortDataHeap =  NULLPTR;
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  To Take lock for the Logical Port Info Node
+*
+* @param    None
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments This lock needs to be taken only the API functions not running in
+*           the authmgr threads context.
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortInfoTakeLock (void)
+{
+  return osapiSemaTake (authmgrCB->globalInfo->authmgrLogicalPortTreeDb.semId,
+                         WAIT_FOREVER);
+}
+
+/*********************************************************************
+* @purpose  To Giveup lock for the Logical Port Info Node
+*
+* @param    None
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments This lock needs to be taken only the API functions not running in
+*           the authmgr threads context.
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortInfoGiveLock (void)
+{
+  return osapiSemaGive (authmgrCB->globalInfo->authmgrLogicalPortTreeDb.semId);
+}
+
+/*********************************************************************
+* @purpose  To allocate a Logical Port Info Node
+*
+* @param    intIfNum  @b{(input)} The internal interface for which this
+*                                 logical interface is being created
+*
+* @returns  Logical Internal Interface Number
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+authmgrLogicalPortInfo_t *authmgrDynamicLogicalPortInfoAlloc (uint32
+                                                              intIfNum)
+{
+  uint32 lIntIfNum;
+  authmgrLogicalPortInfo_t newNode, *retNode, *tmpNode;
+  authmgrLogicalNodeKey_t key;
+
+  /* iterate through the Logical interfaces to assign a empty slot to the new
+     node. */
+  for (lIntIfNum = AUTHMGR_LOGICAL_PORT_START;
+       lIntIfNum < AUTHMGR_LOGICAL_PORT_END; lIntIfNum++)
+  {
+    memset (&key, 0, sizeof (authmgrLogicalNodeKey_t));
+    AUTHMGR_LPORT_KEY_PACK (intIfNum, lIntIfNum, AUTHMGR_LOGICAL, key.keyNum);
+
+    tmpNode = authmgrLogicalPortInfoGet (key.keyNum);
+    if (tmpNode ==  NULLPTR)
+    {
+      /* found one - use it */
+      memset (&newNode, 0, sizeof (authmgrLogicalPortInfo_t));
+      newNode.key = key;
+
+      /* add the node to the tree */
+      osapiSemaTake (authmgrCB->globalInfo->authmgrLogicalPortTreeDb.semId,
+                      WAIT_FOREVER);
+      retNode =
+        avlInsertEntry (&authmgrCB->globalInfo->authmgrLogicalPortTreeDb,
+                        &newNode);
+      osapiSemaGive (authmgrCB->globalInfo->authmgrLogicalPortTreeDb.semId);
+      if (retNode == &newNode)
+      {
+         LOGF ( LOG_SEVERITY_INFO,
+                 "Error in adding the node to the AUTHMGR tree for interface %s.\n",
+                 authmgrIntfIfNameGet(intIfNum));
+        return  NULLPTR;
+      }
+      return authmgrLogicalPortInfoGet (key.keyNum);
+    }
+    else
+    {
+#if 0
+      /* flush stale data. */
+      memset (tmpNode, 0, sizeof (authmgrLogicalPortInfo_t));
+      tmpNode->key = key;
+
+      return tmpNode;
+#endif
+    }
+  }
+   LOGF ( LOG_SEVERITY_NOTICE,
+           "Error in allocating node for interface %s,as it reached maximum limit per port."
+           " Could not allocate memory for client as maximum number of clients allowed per port"
+           " has been reached.", authmgrIntfIfNameGet(intIfNum));
+  return  NULLPTR;
+}
+
+/*********************************************************************
+* @purpose  To allocate a Logical Port Info Node
+*
+* @param    intIfNum  @b{(input)} The internal interface for which this
+*                                 logical interface is being created
+*
+* @returns  Logical Internal Interface Number
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+authmgrLogicalPortInfo_t *authmgrLogicalPortInfoAlloc (uint32 intIfNum)
+{
+   BOOL valid =  FALSE;
+  authmgrHostIsDynamicNodeAllocCheck (authmgrCB->globalInfo->
+                                      authmgrPortInfo[intIfNum].hostMode,
+                                      &valid);
+
+  if ( TRUE == valid)
+  {
+    return authmgrDynamicLogicalPortInfoAlloc (intIfNum);
+  }
+  return  NULLPTR;
+}
+
+/*********************************************************************
+* @purpose  To Deallocate a Logical Port Info Node
+*
+* @param    intIfNum  @b{(input)} The internal interface for which this
+*                                 logical interface is being destroyed
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortInfoDeAlloc (authmgrLogicalPortInfo_t * node)
+{
+  uint32 physPort = 0, lPort = 0, type = 0;
+  if (node !=  NULLPTR)
+  {
+    AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, node->key.keyNum);
+  
+    if (AUTHMGR_LOGICAL == type)
+    {
+      osapiSemaTake (authmgrCB->globalInfo->authmgrLogicalPortTreeDb.semId,
+                      WAIT_FOREVER);
+      avlDeleteEntry (&authmgrCB->globalInfo->authmgrLogicalPortTreeDb, node);
+      osapiSemaGive (authmgrCB->globalInfo->authmgrLogicalPortTreeDb.semId);
+    }
+    return  SUCCESS;
+  }
+  return  FAILURE;
+}
+
+
+/*********************************************************************
+* @purpose  To Get a Logical Port Info Node
+*
+* @param    lIntIfNum  @b{(input)} The logical internal interface number
+*
+* @returns  Logical Internal Interface node
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+authmgrLogicalPortInfo_t *authmgrLogicalPortInfoGet (uint32 lIntIfNum)
+{
+  authmgrLogicalNodeKey_t key;
+  uint32 physPort = 0, lPort = 0, type = 0;
+  authmgrLogicalPortInfo_t *entry =  NULLPTR;
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, lIntIfNum);
+
+  key.keyNum = lIntIfNum;
+
+  if (AUTHMGR_LOGICAL == type)
+  {
+    entry =
+      (authmgrLogicalPortInfo_t *) avlSearch (&authmgrCB->globalInfo->
+                                                  authmgrLogicalPortTreeDb,
+                                                  &key, AVL_EXACT);
+  }
+
+  return entry;
+}
+
+/*********************************************************************
+* @purpose  To Get Next Logical Port Info Node
+*
+* @param    lIntIfNum  @b{(input)} The logical internal interface number
+*
+* @returns  Logical Internal Interface node
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+authmgrLogicalPortInfo_t *authmgrLogicalPortInfoGetNext (uint32 lIntIfNum)
+{
+  uint32 physPort = 0, lPort = 0, type = 0;
+  authmgrLogicalPortInfo_t *entry =  NULLPTR;
+  RC_t nimRc =  SUCCESS;
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, lIntIfNum);
+
+  while (( SUCCESS == nimRc) &&
+         ( NULLPTR ==
+          (entry = authmgrLogicalPortInfoGetNextNode (physPort, &lIntIfNum))))
+  {
+    /* Entry not available on this port.
+       search on the next port */
+    lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+    nimRc = authmgrNextValidIntf (physPort, &physPort);
+  }
+
+  return entry;
+}
+
+/*********************************************************************
+* @purpose  To get First logical interfaces for dynamically allocated nodes
+*
+* @param    intIfNum  @b{(input)} The internal interface
+* @param    lIntIfNum  @b{(input/output)} The logical internal interface number
+*
+* @returns  Logical Internal Interface node
+*
+* @comments For the first iteration start with zero.
+*
+* @end
+*********************************************************************/
+authmgrLogicalPortInfo_t *authmgrDynamicLogicalPortInfoFirstGet (uint32
+                                                                 intIfNum,
+                                                                 uint32 *
+                                                                 lIntIfNum)
+{
+  authmgrLogicalPortInfo_t *node;
+  uint32 maxintf = AUTHMGR_LOGICAL_PORT_END;
+  uint32 lPort = 0;
+  uint32 temp = 0;
+
+  lPort = AUTHMGR_LOGICAL_PORT_START;
+  AUTHMGR_LPORT_KEY_PACK (intIfNum, lPort, AUTHMGR_LOGICAL, temp);
+  while ((node = authmgrLogicalPortInfoGet (temp)) ==  NULLPTR &&
+         lPort < maxintf)
+  {
+    lPort = lPort + 1;
+    temp = 0;
+    AUTHMGR_LPORT_KEY_PACK (intIfNum, lPort, AUTHMGR_LOGICAL, temp);
+  }
+
+  *lIntIfNum = temp;
+  return node;
+}
+
+/*********************************************************************
+* @purpose  To iterate all the logical interfaces of a physical interface
+*
+* @param    intIfNum  @b{(input)} The internal interface
+* @param    lIntIfNum  @b{(input/output)} The logical internal interface number
+*
+* @returns  Logical Internal Interface node
+*
+* @comments For the first iteration start with zero.
+*
+* @end
+*********************************************************************/
+authmgrLogicalPortInfo_t *authmgrDynamicLogicalPortInfoGetNextNode (uint32
+                                                                    intIfNum,
+                                                                    uint32 *
+                                                                    lIntIfNum)
+{
+  authmgrLogicalPortInfo_t *node =  NULLPTR;
+  uint32 physPort = 0, lPort = 0, type = 0, temp = 0;
+
+  if (*lIntIfNum == AUTHMGR_LOGICAL_PORT_ITERATE)
+  {
+    return authmgrLogicalPortInfoFirstGet (intIfNum, lIntIfNum);
+  }
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, *lIntIfNum);
+  
+  if ((intIfNum != physPort) || (lPort >= AUTHMGR_LOGICAL_PORT_END))
+  {
+    return  NULLPTR;
+  }
+
+  lPort = lPort + 1;
+  AUTHMGR_LPORT_KEY_PACK (intIfNum, lPort, AUTHMGR_LOGICAL, temp);
+  while ((node = authmgrLogicalPortInfoGet (temp)) ==  NULLPTR &&
+         lPort < AUTHMGR_LOGICAL_PORT_END)
+  {
+    lPort = lPort + 1;
+    temp = 0;
+    AUTHMGR_LPORT_KEY_PACK (intIfNum, lPort, AUTHMGR_LOGICAL, temp);
+  }
+
+  *lIntIfNum = temp;
+  return node;
+}
+
+/*********************************************************************
+* @purpose  Debug Info of the Logical Port DB
+*
+* @param    None
+*
+* @returns  None
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+void authmgrDebugLogicalPortInfo (void)
+{
+  if (authmgrCB->globalInfo->authmgrLogicalPortTreeHeap !=  NULLPTR)
+  {
+    SYSAPI_PRINTF ("The Authmgr Logical Port Info has %d Nodes\n",
+                   authmgrCB->globalInfo->authmgrLogicalPortTreeDb.count);
+  }
+}
+
+
+
+
+/*********************************************************************
+* @purpose  To get First logical interfaces for a physical interface
+*
+* @param    intIfNum  @b{(input)} The internal interface
+* @param    lIntIfNum  @b{(input/output)} The logical internal interface number
+*
+* @returns  Logical Internal Interface node
+*
+* @comments For the first iteration start with zero.
+*
+* @end
+*********************************************************************/
+authmgrLogicalPortInfo_t *authmgrLogicalPortInfoFirstGet (uint32 intIfNum,
+                                                          uint32 * lIntIfNum)
+{
+  authmgrLogicalPortInfo_t *node;
+   BOOL valid =  FALSE;
+
+  authmgrHostIsDynamicNodeAllocCheck (authmgrCB->globalInfo->
+                                      authmgrPortInfo[intIfNum].hostMode,
+                                      &valid);
+
+  if ( TRUE == valid)
+  {
+    /* dynamically allocated node */
+    node = authmgrDynamicLogicalPortInfoFirstGet (intIfNum, lIntIfNum);
+  }
+  return node;
+}
+
+/*********************************************************************
+* @purpose  To iterate all the logical interfaces of a physical interface
+*
+* @param    intIfNum  @b{(input)} The internal interface
+* @param    lIntIfNum  @b{(input/output)} The logical internal interface number
+*
+* @returns  Logical Internal Interface node
+*
+* @comments For the first iteration start with zero.
+*
+* @end
+*********************************************************************/
+authmgrLogicalPortInfo_t *authmgrLogicalPortInfoGetNextNode (uint32 intIfNum,
+                                                             uint32 *
+                                                             lIntIfNum)
+{
+  authmgrLogicalPortInfo_t *node;
+   BOOL valid =  FALSE;
+
+  authmgrHostIsDynamicNodeAllocCheck (authmgrCB->globalInfo->
+                                      authmgrPortInfo[intIfNum].hostMode,
+                                      &valid);
+
+  if ( TRUE == valid)
+  {
+    /* dynamically allocated node */
+    node = authmgrDynamicLogicalPortInfoGetNextNode (intIfNum, lIntIfNum);
+  }
+  return node;
+}
+
diff --git a/src/sonic-pac/authmgr/protocol/auth_mgr_mac_db.c b/src/sonic-pac/authmgr/protocol/auth_mgr_mac_db.c
new file mode 100755
index 00000000000..14d372594d3
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/auth_mgr_mac_db.c
@@ -0,0 +1,447 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_struct.h"
+
+extern authmgrCB_t *authmgrCB;
+
+
+/* Global parameters */
+typedef struct authmgrMacAddrInfo_s{
+     sll_member_t          *next;
+     enetMacAddr_t         suppMacAddr;
+    uint32                lIntIfNum;
+}authmgrMacAddrInfo_t;
+
+/*************************************************************************
+* @purpose  API to destroy the Mac Addr Info data node
+*
+* @param    ll_member  @b{(input)}  Linked list node containing the
+*                                   Mac Addr Info to be destroyed
+*
+* @returns   SUCCESS
+*
+* @comments This is called by SLL library when a node is being deleted
+*
+* @end
+*************************************************************************/
+RC_t authmgrMacAddrDataDestroy ( sll_member_t *ll_member)
+{
+  authmgrMacAddrInfo_t *pMacAddrInfo ;
+
+  pMacAddrInfo = ( authmgrMacAddrInfo_t *)ll_member;
+
+  pMacAddrInfo->lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+
+  bufferPoolFree(authmgrCB->globalInfo->authmgrMacAddrBufferPoolId,( uchar8 *)pMacAddrInfo);
+
+  return  SUCCESS;
+}
+/*************************************************************************
+* @purpose  Helper API to compare two Mac Addr Info nodes  and
+*           returns the result
+*
+* @param     p  @b{(input)}  Pointer to Candidate 1 for comparison
+* @param     q  @b{(input)}  Pointer to Candidate 2 for comparison
+*
+* @returns   0   p = q
+* @returns  -1   p < q
+* @returns  +1   p > q
+*
+* @comments This is called by SLL library when a nodes are compared
+*
+* @end
+*************************************************************************/
+ int32 authmgrMacAddrDataCmp(void *p, void *q, uint32 key)
+{
+     int32 cmp;
+    cmp = memcmp(((authmgrMacAddrInfo_t *)p)->suppMacAddr.addr,((authmgrMacAddrInfo_t *)q)->suppMacAddr.addr, ENET_MAC_ADDR_LEN);
+    if (cmp == 0)
+      return 0;
+  else if (cmp < 0)
+      return -1;
+  else
+      return 1;
+
+}
+
+
+/*********************************************************************
+* @purpose  Initialize Mac Address Info Database
+*
+* @param    nodeCount    @b{(input)} The number of nodes to be created.
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrMacAddrInfoDBInit(uint32 nodeCount)
+{
+  /* Allocate the buffer pool */
+  if (bufferPoolInit( AUTHMGR_COMPONENT_ID, nodeCount, sizeof(authmgrMacAddrInfo_t), 
+                     "Authmgr Mac Addr Bufs",
+                     &(authmgrCB->globalInfo->authmgrMacAddrBufferPoolId)) !=  SUCCESS)
+  {
+     LOGF(  LOG_SEVERITY_NOTICE,
+        "\n%s: Error allocating buffers for supplicant mac address database."
+        " Could not allocate buffer pool for Mac address link list. Insufficient memory."
+        ,__FUNCTION__);
+    AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE,0,
+                "%s: Error allocating buffers for supplicant mac address database\n",__FUNCTION__);
+    return  FAILURE;
+  }
+
+  /* Create the SLL*/
+  if (SLLCreate( AUTHMGR_COMPONENT_ID,  SLL_ASCEND_ORDER,
+               sizeof( enetMacAddr_t),authmgrMacAddrDataCmp ,authmgrMacAddrDataDestroy ,
+               &authmgrCB->globalInfo->authmgrMacAddrSLL) !=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_INFO,
+            "\n%s: Failed to create supplicant mac address linked list \n",__FUNCTION__);
+    AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE,0,
+                "%s: Failed to create supplicant mac address linked list \n",__FUNCTION__);
+    return  FAILURE;
+  }
+
+  /* Create Mac Address DB Semaphore*/
+  /* Read write lock for controlling Mac Addr Info additions and Deletions */
+  if (osapiRWLockCreate(&authmgrCB->globalInfo->authmgrMacAddrDBRWLock,
+                        OSAPI_RWLOCK_Q_PRIORITY) ==  FAILURE)
+  {
+       LOGF( LOG_SEVERITY_INFO,
+              "Error creating dot1qCfgRWlock semaphore \n");
+      return  FAILURE;
+  }
+
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+* @purpose  DeInitialize Mac Address Info Database
+*
+* @param    none
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrMacAddrInfoDBDeInit(void)
+{
+
+
+
+  /* Destroy the SLL */
+  if (SLLDestroy( AUTHMGR_COMPONENT_ID, &authmgrCB->globalInfo->authmgrMacAddrSLL)!=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_INFO,
+            "\n%s: Failed to destroy the supplicant mac address linked list \n",__FUNCTION__);
+    AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_MAC_ADDR_DB,0,
+                "\n%s: Failed to destroy the supplicant mac address linked list \n",__FUNCTION__);
+  }
+
+  /* Deallocate the buffer pool */
+
+  if (authmgrCB->globalInfo->authmgrMacAddrBufferPoolId  != 0)
+  {
+    bufferPoolDelete(authmgrCB->globalInfo->authmgrMacAddrBufferPoolId );
+    authmgrCB->globalInfo->authmgrMacAddrBufferPoolId  = 0;
+  }
+
+  /* Delete the Mac Address DB Semaphore */
+  (void)osapiRWLockDelete(authmgrCB->globalInfo->authmgrMacAddrDBRWLock);
+
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Add a node Mac Address Info Database
+*
+* @param    mac_addr  supplicant mac address
+* @param    lIntIfNum corresponding logical interface
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrMacAddrInfoAdd( enetMacAddr_t *mac_addr,uint32 lIntIfNum)
+{
+   authmgrMacAddrInfo_t *pMacAddrInfo,*pMacAddrFind,macAddrInfo;
+    enetMacAddr_t    nullMacAddr;
+   uint32 physPort = 0;
+
+   memset(&(nullMacAddr.addr),0, ENET_MAC_ADDR_LEN);
+
+   AUTHMGR_PORT_GET(physPort, lIntIfNum);
+
+   if (mac_addr== NULL)
+   {
+       AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE, physPort,"\n%s: Could not add supplicant mac address. Mac address is NULL. Input error. \n",
+               __FUNCTION__);
+       return  FAILURE;
+   }
+   if((lIntIfNum == AUTHMGR_LOGICAL_PORT_ITERATE)||
+        (memcmp(mac_addr->addr,nullMacAddr.addr, ENET_MAC_ADDR_LEN)==0))
+   {
+       AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE, physPort,"\n%s: Could not add supplicant mac address(%s) logical Interface: %d . Input error. \n",
+               __FUNCTION__,AUTHMGR_PRINT_MAC_ADDR(mac_addr->addr),lIntIfNum);
+       return  FAILURE;
+   }
+
+   /* In order to handle client roaming , check if the mac address already exists*/
+   /* copy info to node*/
+    memcpy(macAddrInfo.suppMacAddr.addr,mac_addr->addr, ENET_MAC_ADDR_LEN);
+   /* take Mac address DB semaphore*/
+   (void)osapiWriteLockTake(authmgrCB->globalInfo->authmgrMacAddrDBRWLock,  WAIT_FOREVER);
+
+   if ((pMacAddrFind=(authmgrMacAddrInfo_t *)SLLFind(&authmgrCB->globalInfo->authmgrMacAddrSLL,( sll_member_t *)&macAddrInfo)) !=  NULLPTR)
+   {
+       pMacAddrFind->lIntIfNum = lIntIfNum;
+      (void) osapiWriteLockGive(authmgrCB->globalInfo->authmgrMacAddrDBRWLock);
+       AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_MAC_ADDR_DB,lIntIfNum,"\n%s: Found supplicant mac address(%s) Changed logical Interface to: %d .\n",
+               __FUNCTION__, AUTHMGR_PRINT_MAC_ADDR(mac_addr->addr),lIntIfNum);
+       return  SUCCESS;
+   }
+
+   /* Allocate memory from the buffer pool*/
+   if (bufferPoolAllocate(authmgrCB->globalInfo->authmgrMacAddrBufferPoolId,
+                            ( uchar8 **)&pMacAddrInfo) !=  SUCCESS)
+     {
+       /* release semaphore*/
+       (void)osapiWriteLockGive(authmgrCB->globalInfo->authmgrMacAddrDBRWLock);
+
+        LOGF(  LOG_SEVERITY_NOTICE,
+           "\n%s: Could not add supplicant mac address(%s) logical Interface: %d . Insufficient memory. \n",
+               __FUNCTION__, AUTHMGR_PRINT_MAC_ADDR(mac_addr->addr), lIntIfNum);
+
+       AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE, physPort,"\n%s: Could not add supplicant mac address(%s) logical Interface: %d . Insufficient memory. \n",
+               __FUNCTION__, AUTHMGR_PRINT_MAC_ADDR(mac_addr->addr),lIntIfNum );
+       return  FAILURE;
+     }
+
+   /* copy details into allocated node*/
+   memset(pMacAddrInfo,0,sizeof(authmgrMacAddrInfo_t));
+   memcpy(pMacAddrInfo->suppMacAddr.addr,mac_addr->addr, ENET_MAC_ADDR_LEN);
+   pMacAddrInfo->lIntIfNum = lIntIfNum;
+
+
+   /* Add node to the SLL*/
+   if (SLLAdd(&authmgrCB->globalInfo->authmgrMacAddrSLL, ( sll_member_t *)pMacAddrInfo)
+         !=  SUCCESS)
+   {
+       AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE,authmgrPhysPortGet(lIntIfNum),"\n%s: Could not add supplicant mac address(%s) logical Interface: %d . \n",
+               __FUNCTION__, AUTHMGR_PRINT_MAC_ADDR(mac_addr->addr),lIntIfNum);
+       /* Free the previously allocated bufferpool */
+       bufferPoolFree(authmgrCB->globalInfo->authmgrMacAddrBufferPoolId, ( uchar8 *)pMacAddrInfo);
+       /* release semaphore*/
+       (void)osapiWriteLockGive(authmgrCB->globalInfo->authmgrMacAddrDBRWLock);
+       return  FAILURE;
+   }
+
+    /* release semaphore*/
+    (void)osapiWriteLockGive(authmgrCB->globalInfo->authmgrMacAddrDBRWLock);
+    return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Remove a node from the Mac Address Info Database
+*
+* @param    mac_addr  supplicant mac address
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrMacAddrInfoRemove( enetMacAddr_t *mac_addr)
+{
+   authmgrMacAddrInfo_t macAddrInfo;
+    enetMacAddr_t    nullMacAddr;
+
+   memset(&nullMacAddr.addr,0, ENET_MAC_ADDR_LEN);
+   /*input check*/
+   if ((mac_addr ==  NULLPTR) ||
+        (memcmp(mac_addr->addr,nullMacAddr.addr, ENET_MAC_ADDR_LEN)==0))
+   {
+       return  FAILURE;
+   }
+   /* copy info to node*/
+   memcpy(macAddrInfo.suppMacAddr.addr,mac_addr->addr, ENET_MAC_ADDR_LEN);
+   macAddrInfo.lIntIfNum = 0;
+
+   /* take Mac address DB semaphore*/
+   (void)osapiWriteLockTake(authmgrCB->globalInfo->authmgrMacAddrDBRWLock,  WAIT_FOREVER);
+
+    /* delete from SLL*/
+    if (SLLDelete(&authmgrCB->globalInfo->authmgrMacAddrSLL, ( sll_member_t *)&macAddrInfo)
+                  !=  SUCCESS)
+    {
+        /* release semaphore*/
+       (void)osapiWriteLockGive(authmgrCB->globalInfo->authmgrMacAddrDBRWLock);
+
+        AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE,0,"\n%s: Could not delete supplicant mac address(%s) from the SLL . \n",
+               __FUNCTION__,AUTHMGR_PRINT_MAC_ADDR(mac_addr->addr));
+       return  FAILURE;
+    }
+
+  /* release semaphore*/
+  (void)osapiWriteLockGive(authmgrCB->globalInfo->authmgrMacAddrDBRWLock);
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+* @purpose  Find a node in the Mac Address Info Database
+*
+* @param    mac_addr            supplicant mac address
+* @param   lIntIfnum{(output)} logical Port Number
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrMacAddrInfoFind( enetMacAddr_t *mac_addr,uint32 *lIntIfNum)
+{
+  authmgrMacAddrInfo_t macAddrInfo,*pMacAddrInfo;
+   enetMacAddr_t    nullMacAddr;
+
+  memset(&nullMacAddr.addr,0, ENET_MAC_ADDR_LEN);
+  /*input check*/
+  if ((mac_addr ==  NULLPTR) ||
+      (memcmp(mac_addr->addr,nullMacAddr.addr, ENET_MAC_ADDR_LEN)==0))
+  {
+      return  FAILURE;
+  }
+  /* copy info to node*/
+  memcpy(macAddrInfo.suppMacAddr.addr,mac_addr->addr, ENET_MAC_ADDR_LEN);
+
+  /* take Mac address DB semaphore*/
+   (void)osapiWriteLockTake(authmgrCB->globalInfo->authmgrMacAddrDBRWLock,  WAIT_FOREVER);
+
+  if ((pMacAddrInfo=(authmgrMacAddrInfo_t *)SLLFind(&authmgrCB->globalInfo->authmgrMacAddrSLL,( sll_member_t *)&macAddrInfo)) ==  NULLPTR)
+  {
+      /* release semaphore*/
+     (void)osapiWriteLockGive(authmgrCB->globalInfo->authmgrMacAddrDBRWLock);
+      AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE,0,"\n%s: Could not find supplicant mac address(%s). \n",
+               __FUNCTION__, AUTHMGR_PRINT_MAC_ADDR(mac_addr->addr));
+      *lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+      return  FAILURE;
+  }
+  *lIntIfNum = pMacAddrInfo->lIntIfNum;
+  /* release semaphore*/
+  (void)osapiWriteLockGive(authmgrCB->globalInfo->authmgrMacAddrDBRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Find the next node in the Mac Address Info Database
+*
+* @param    mac_addr            supplicant mac address
+* @param   lIntIfnum{(output)}  logical Port Number
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrMacAddrInfoFindNext( enetMacAddr_t *mac_addr,uint32 *lIntIfNum)
+{
+  authmgrMacAddrInfo_t macAddrInfo,*pMacAddrInfo;
+
+  /*input check*/
+  if (mac_addr ==  NULLPTR)
+  {
+      return  FAILURE;
+  }
+
+  /* copy info to node*/
+  memcpy(macAddrInfo.suppMacAddr.addr,mac_addr->addr, ENET_MAC_ADDR_LEN);
+
+   /* take Mac address DB semaphore*/
+   (void)osapiWriteLockTake(authmgrCB->globalInfo->authmgrMacAddrDBRWLock,  WAIT_FOREVER);
+
+  if ((pMacAddrInfo=(authmgrMacAddrInfo_t *)SLLFindNext(&authmgrCB->globalInfo->authmgrMacAddrSLL,( sll_member_t *)&macAddrInfo)) ==  NULLPTR)
+  {
+      /* release semaphore*/
+      (void)osapiWriteLockGive(authmgrCB->globalInfo->authmgrMacAddrDBRWLock);
+
+      AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE,0,"\n%s: Could not find next node for supplicant mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x). \n",
+               __FUNCTION__, mac_addr->addr[0],mac_addr->addr[1],mac_addr->addr[2],mac_addr->addr[3],mac_addr->addr[4],mac_addr->addr[5]);
+      *lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+      return  FAILURE;
+  }
+  memcpy(mac_addr->addr,pMacAddrInfo->suppMacAddr.addr, ENET_MAC_ADDR_LEN);
+  *lIntIfNum = pMacAddrInfo->lIntIfNum;
+
+  /* release semaphore*/
+  (void)osapiWriteLockGive(authmgrCB->globalInfo->authmgrMacAddrDBRWLock);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Print the information in the Mac Address Database
+*
+* @param
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrDebugMacAddrDBList()
+{
+     enetMacAddr_t macAddr,nullMacAddr;
+    uint32 lIntIfNum;
+
+    memset(&macAddr,0,sizeof( enetMacAddr_t));
+
+    while(authmgrMacAddrInfoFindNext(&macAddr,&lIntIfNum)==  SUCCESS)
+    {
+        SYSAPI_PRINTF("\n Mac Address: %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x",
+                      macAddr.addr[0],macAddr.addr[1],macAddr.addr[2],macAddr.addr[3],macAddr.addr[4],macAddr.addr[5]);
+
+        SYSAPI_PRINTF("\n Logical Port :%u",lIntIfNum);
+
+    }
+
+     memset(&nullMacAddr,0,sizeof( enetMacAddr_t));
+     if (memcmp(macAddr.addr,nullMacAddr.addr, ENET_MAC_ADDR_LEN)!=0)
+     {
+         if (authmgrMacAddrInfoFind(&macAddr,&lIntIfNum)== SUCCESS)
+         {
+             SYSAPI_PRINTF("\n Testing authmgrMacAddrInfoFind.Found \n");
+             SYSAPI_PRINTF("\n Mac Address: %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x",
+                      macAddr.addr[0],macAddr.addr[1],macAddr.addr[2],macAddr.addr[3],macAddr.addr[4],macAddr.addr[5]);
+
+            SYSAPI_PRINTF("\n Logical Port :%u",lIntIfNum);
+         }
+     }
+    return  SUCCESS;
+}
diff --git a/src/sonic-pac/authmgr/protocol/auth_mgr_radius.c b/src/sonic-pac/authmgr/protocol/auth_mgr_radius.c
new file mode 100755
index 00000000000..de7c915499a
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/auth_mgr_radius.c
@@ -0,0 +1,279 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define  MAC_EAPOL_PDU
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_client.h"
+#include "auth_mgr_timer.h"
+
+#include "auth_mgr_struct.h"
+#include "auth_mgr_vlan_db.h"
+
+extern authmgrCB_t *authmgrCB;
+
+/**************************************************************************
+ * @purpose   Handle RADIUS client callbacks
+ *
+ * @param     status         @b{(input)} status of RADIUS response (accept,
+ *                                       reject, challenge, etc)
+ * @param     correlator     @b{(input)} correlates responses to requests; for
+ *                                       authmgr, this is ifIndex
+ * @param     *attributes    @b{(input)} RADIUS attribute data
+ * @param     attributesLen  @b{(input)} length of RADIUS attribute data
+ *
+ * @returns    SUCCESS
+ * @returns    FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+RC_t authmgrRadiusResponseCallback (uint32 status, uint32 correlator,
+                                        uchar8 * attributes,
+                                       uint32 attributesLen)
+{
+  uint32 lIntIfNum;
+  authmgrAaaMsg_t authmgrAaaMsg;
+
+  lIntIfNum = correlator;
+
+  /* Fill in AAA message structure */
+  memset (&authmgrAaaMsg, 0, sizeof (authmgrAaaMsg_t));
+  authmgrAaaMsg.status = status;
+  authmgrAaaMsg.respLen = attributesLen;
+
+  /* Allocate memory for attributes which gets freed by authmgrTask */
+  if ( NULLPTR != attributes)
+  {
+    authmgrAaaMsg.pResponse =
+      osapiMalloc ( AUTHMGR_COMPONENT_ID, attributesLen);
+    memcpy (authmgrAaaMsg.pResponse, attributes, attributesLen);
+  }
+  else
+  {
+    authmgrAaaMsg.respLen =  0;
+    authmgrAaaMsg.pResponse =  NULLPTR;
+  }
+  return authmgrIssueCmd (authmgrAaaInfoReceived, lIntIfNum, &authmgrAaaMsg);
+}
+
+/**************************************************************************
+ * @purpose   Process RADIUS Server responses
+ *
+ * @param     lIntIfNum       @b{(input)} Logical internal interface number of
+ *                                        port being authenticated
+ * @param     status         @b{(input)} status of RADIUS response (accept,
+ *                                       reject, challenge, etc)
+ * @param     *attributes    @b{(input)} RADIUS attribute data
+ * @param     attributesLen  @b{(input)} length of RADIUS attribute data
+ *
+ * @returns    SUCCESS
+ * @returns    FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+RC_t authmgrRadiusResponseProcess (uint32 lIntIfNum, uint32 status,
+                                       uchar8 * attributes,
+                                      uint32 attributesLen)
+{
+  RC_t rc =  FAILURE;
+  authmgrPortCfg_t *pCfg;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  uint32 physPort = 0, lPort = 0, type = 0;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  SUCCESS;
+  }
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+  if (logicalPortInfo ==  NULLPTR)
+  {
+    return  FAILURE;
+  }
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, lIntIfNum);
+
+  if (authmgrIntfIsConfigurable (physPort, &pCfg) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_RADIUS, physPort,
+                       "%s:Received Radius response message on logicalPort:[%s] with status[%d]\n\r",
+                       __FUNCTION__, authmgrIntfIfNameGet(physPort), status);
+
+  /* Ensure we are expecting a response from the server */
+  if (logicalPortInfo->protocol.authState == AUTHMGR_AUTHENTICATING)
+  {
+     return FAILURE;
+  }
+
+  /* Need to free the buffer that was passed to us */
+  if (attributes !=  NULLPTR)
+  {
+    osapiFree ( AUTHMGR_COMPONENT_ID, attributes);
+  }
+
+  return rc;
+}
+
+
+/*********************************************************************
+*
+* @purpose Convert the given vlan string based on the id or name
+*
+* @param    vlanName  @b{(input)} Vlan string.
+* @param    vlanId    @b{(output)} Vlan Id assigned.
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*
+*********************************************************************/
+RC_t authmgrRadiusServerVlanConversionHandle (const char8 * vlanName,
+                                                 uint32 * vlanId)
+{
+  *vlanId = atoi (vlanName);
+  return SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to parse the vlan attribute
+*
+* @param logicalPortInfo -- logical port structure
+* @param processInfo -- client info structure
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanAttrValidate (authmgrLogicalPortInfo_t * logicalPortInfo,
+                                 authmgrClientInfo_t *processInfo)
+{
+  uint32 vlanId = 0;
+  uint32 physPort;
+  RC_t rc1 =  SUCCESS;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (processInfo);
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+  /* process the string received and validate the
+     result for presense of VLAN */
+  if ( SUCCESS != authmgrRadiusServerVlanConversionHandle
+      (authmgrCB->attrInfo.vlanString, &vlanId))
+  {
+    return  FAILURE;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, 0,
+                       "Validating VLAN %d for PAC client", vlanId);
+
+  rc1 = authmgrVlanCheckStatic(vlanId);
+
+  /* If given vlan is NOT  there */
+  if ( NOT_EXIST == rc1)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, 0,
+                         "VLAN %d does not exist in the system", vlanId);
+    /* In case of radius assigned trunk mode, 
+       dynamic vlan creation is not allowed */
+   return FAILURE;    
+  }
+
+  if (SUCCESS != authmgrVlanPortParticipationValidate (physPort, vlanId))
+  {
+    return FAILURE;
+  }
+  processInfo->vlanId = vlanId;
+
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+* @purpose function to perform the actions after parsing the attributes.
+*
+* @param logicalPortInfo -- logical port structure
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrRadiusAcceptPostProcess (authmgrLogicalPortInfo_t *
+                                        logicalPortInfo, 
+                                        authmgrClientInfo_t *processInfo,
+                                         AUTHMGR_ATTR_PROCESS_t attrProcess)
+{
+  uint32 physPort = 0;
+ RC_t rc =  SUCCESS;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (processInfo);
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+  /* check vlan attribute */
+  if (0 ==  authmgrCB->attrInfo.vlanAttrFlags)
+  {
+    /* either Vlan attributes aren't received OR
+       vlan assignment is not enabled. */
+
+    rc = authmgrPortDefaultVlanGet(physPort, &processInfo->vlanId);
+    if ( SUCCESS != rc)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_RADIUS, physPort,
+          "%s:%d:Unable to get the configured default VLAN on port %s", 
+          __FUNCTION__, __LINE__, authmgrIntfIfNameGet(physPort));
+    }
+
+    if ( SUCCESS != rc)
+    {
+      logicalPortInfo->protocol.authSuccess =  FALSE;
+      logicalPortInfo->protocol.authFail =  TRUE;
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_RADIUS, physPort,
+          "%s:%d:Unable to process VLAN attribute", __FUNCTION__, __LINE__);
+      rc =  FAILURE;
+    }
+  }
+  else
+  {
+    if (RADIUS_REQUIRED_TUNNEL_ATTRIBUTES_SPECIFIED != authmgrCB->attrInfo.vlanAttrFlags)
+    {
+      logicalPortInfo->protocol.authSuccess =  FALSE;
+      logicalPortInfo->protocol.authFail =  TRUE;
+
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_RADIUS, physPort,
+          "%s:%d:Unable to process VLAN attribute", __FUNCTION__, __LINE__);
+      rc =  FAILURE;
+    }
+    else
+    {
+      rc = authmgrVlanAttrValidate(logicalPortInfo, processInfo);
+    }
+  }
+  return rc;
+}
+ 
diff --git a/src/sonic-pac/authmgr/protocol/auth_mgr_sm.c b/src/sonic-pac/authmgr/protocol/auth_mgr_sm.c
new file mode 100755
index 00000000000..f973340516e
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/auth_mgr_sm.c
@@ -0,0 +1,699 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_exports.h"
+#include "auth_mgr_sm.h"
+#include "auth_mgr_client.h"
+#include "auth_mgr_struct.h"
+#include "auth_mgr_timer.h"
+#include "auth_mgr_db.h"
+
+extern authmgrCB_t *authmgrCB;
+
+RC_t authmgrStateMachine(uint32 authmgrEvent, authmgrLogicalPortInfo_t *logicalPortInfo);
+
+static AUTHMGR_STATES_t authmgrStateTable[authmgrSmEvents][AUTHMGR_STATES] =
+{
+  /*Ev/St AUTHMGR_INITIALIZE        AUTHMGR_AUTHENTICATING     AUTHMGR_AUTHENTICATED    AUTHMGR_HELD             AUTHMGR_UNAUTHENTICATED */
+  /*E1*/ {AUTHMGR_INITIALIZE,       AUTHMGR_INITIALIZE,        AUTHMGR_INITIALIZE,      AUTHMGR_INITIALIZE,      AUTHMGR_INITIALIZE},
+  /*E2*/ {AUTHMGR_UNAUTHENTICATED,  AUTHMGR_STATES,            AUTHMGR_STATES,          AUTHMGR_STATES,          AUTHMGR_STATES},
+  /*E3*/ {AUTHMGR_STATES,           AUTHMGR_AUTHENTICATED,     AUTHMGR_AUTHENTICATED,   AUTHMGR_STATES,          AUTHMGR_AUTHENTICATED},
+  /*E4*/ {AUTHMGR_STATES,           AUTHMGR_HELD,              AUTHMGR_STATES,          AUTHMGR_STATES,          AUTHMGR_STATES},
+  /*E5*/ {AUTHMGR_STATES,           AUTHMGR_AUTHENTICATING,    AUTHMGR_STATES,          AUTHMGR_STATES,          AUTHMGR_AUTHENTICATING},
+  /*E6*/ {AUTHMGR_STATES,           AUTHMGR_STATES,            AUTHMGR_STATES,          AUTHMGR_UNAUTHENTICATED, AUTHMGR_STATES},
+  /*E7*/ {AUTHMGR_STATES,           AUTHMGR_UNAUTHENTICATED,   AUTHMGR_UNAUTHENTICATED, AUTHMGR_STATES,          AUTHMGR_STATES},
+  /*E8*/ {AUTHMGR_STATES,           AUTHMGR_STATES,            AUTHMGR_AUTHENTICATING,  AUTHMGR_STATES,          AUTHMGR_STATES},
+  /*E9*/ {AUTHMGR_STATES,           AUTHMGR_STATES,            AUTHMGR_AUTHENTICATING,  AUTHMGR_STATES,          AUTHMGR_STATES},
+  /*E10*/{AUTHMGR_STATES,           AUTHMGR_STATES,            AUTHMGR_AUTHENTICATING,  AUTHMGR_STATES,          AUTHMGR_STATES},
+  /*E11*/{AUTHMGR_STATES,           AUTHMGR_STATES,            AUTHMGR_AUTHENTICATING,  AUTHMGR_STATES,          AUTHMGR_STATES},
+  /*E12*/{AUTHMGR_STATES,           AUTHMGR_STATES,            AUTHMGR_AUTHENTICATING,  AUTHMGR_STATES,          AUTHMGR_STATES},
+};
+
+
+
+/*********************************************************************
+* @purpose  This is the classifier which dispatches the received authmgr event
+*            to a particular state machine
+*
+* @param   authmgrEvent  @b{(input)) event
+* @param   intIfNum    @b{(input)) internal interface number
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrStateMachineClassifier (authmgrSmEvents_t authmgrEvent,
+                                       uint32 lIntIfNum)
+{
+  RC_t rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+
+  if ( NULLPTR == logicalPortInfo)
+  {
+    return  FAILURE;
+  }
+
+  if (authmgrEvent < authmgrSmEvents)
+  {
+    rc = authmgrStateMachine (authmgrEvent, logicalPortInfo);
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+
+  return rc;
+}
+
+/***************************************************************************/
+/*******************************APM State Machine Routines******************/
+/***************************************************************************/
+/*********************************************************************
+* @purpose  Actions to be performed in the AUTHMGR state INITIALIZE
+*
+* @param   pNode  @b{(input))  Logical Port Info node
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrInitializeAction (authmgrLogicalPortInfo_t * pNode)
+{
+  uint32 physPort = 0;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (pNode);
+  AUTHMGR_PORT_GET (physPort, pNode->key.keyNum);
+
+  /* Clear all the data */
+  memset (&pNode->client.executedMethod[0], 0,
+          sizeof (pNode->client.executedMethod));
+
+  pNode->protocol.authState = AUTHMGR_INITIALIZE;
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                       "logicalInterface %d moved to state %s\n",
+                       pNode->key.keyNum,
+                       authmgrAuthStateStringGet (pNode->protocol.authState));
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Actions to be performed in the APM state HELD
+*
+* @param   logicalPortInfo  @b{(input))  Logical Port Info node
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrHeldAction (authmgrLogicalPortInfo_t * logicalPortInfo)
+{
+  uint32 physPort = 0;
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+  authmgrAuthenticatedClientCleanupAction(logicalPortInfo);
+
+  if (( NULL != logicalPortInfo->authmgrTimer.handle.timer))
+  {
+    if (AUTHMGR_REAUTH_WHEN == logicalPortInfo->authmgrTimer.cxt.type)
+    {
+      authmgrTimerDestroy (authmgrCB->globalInfo->authmgrTimerCB,
+                           logicalPortInfo, AUTHMGR_REAUTH_WHEN);
+    }
+  }
+
+  /* start timer with held period */
+  authmgrTimerStart (logicalPortInfo, AUTHMGR_QWHILE);
+  logicalPortInfo->protocol.authState = AUTHMGR_HELD;
+
+    if ((logicalPortInfo->protocol.authFail) ||
+        (logicalPortInfo->protocol.authTimeout))
+    {
+      authmgrTxCannedFail (logicalPortInfo->key.keyNum, AUTHMGR_LOGICAL_PORT);
+
+       LOGF ( LOG_SEVERITY_NOTICE,
+               "Client %s authentication failed on port (%s).", 
+               AUTHMGR_PRINT_MAC_ADDR(logicalPortInfo->client.suppMacAddr.addr),
+               authmgrIntfIfNameGet(physPort));
+    }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                       "logicalInterface %d moved to state %s\n",
+                       logicalPortInfo->key.keyNum,
+                       authmgrAuthStateStringGet (logicalPortInfo->protocol.
+                                                  authState));
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Actions to be performed in the APM state Unauthenticated
+*
+* @param   logicalPortInfo  @b{(input))  Logical Port Info node
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrUnauthenticatedAction (authmgrLogicalPortInfo_t *
+                                      logicalPortInfo)
+{
+  uint32 physPort = 0;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+  if ((logicalPortInfo->protocol.reauth) &&
+      (logicalPortInfo->protocol.authFail))
+  {
+    logicalPortInfo->protocol.reauth =  FALSE;
+  }
+
+  if ((!(( TRUE == logicalPortInfo->protocol.reauth) &&
+        ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+         logicalPortInfo->client.logicalPortStatus))) ||
+      ( TRUE == logicalPortInfo->protocol.heldTimerExpired))
+  {
+    if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+        logicalPortInfo->client.logicalPortStatus)
+    {
+        /* delete the authenticated client */
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+                            "%s:Initiating Client logicalPort num-%d cleanup. \n",
+
+                            __FUNCTION__, logicalPortInfo->key.keyNum);
+        if ( SUCCESS != authmgrClientHwInfoCleanup (logicalPortInfo))
+        {
+           AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                               "%s:Unable to cleanup client hw info logicalPort num-%d\n",
+                               __FUNCTION__, logicalPortInfo->key.keyNum);
+        }
+    }
+
+      authmgrClientStatusSet (logicalPortInfo,
+                               AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+  }
+
+
+  logicalPortInfo->protocol.authState = AUTHMGR_UNAUTHENTICATED;
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                       "logicalInterface %d moved to state %s\n",
+                       logicalPortInfo->key.keyNum,
+                       authmgrAuthStateStringGet (logicalPortInfo->protocol.
+                                                  authState));
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Actions to be performed in the APM state AUTHENTICATING
+*
+* @param   logicalPortInfo  @b{(input))  Logical Port Info node
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAuthenticatingAction (authmgrLogicalPortInfo_t * logicalPortInfo)
+{
+  RC_t rc;
+  uint32 physPort = 0;
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+  logicalPortInfo->protocol.authState = AUTHMGR_AUTHENTICATING;
+  /* Send the notification to start authentication
+     to the enabled methods  */
+
+  logicalPortInfo->protocol.authFail =  FALSE;
+  logicalPortInfo->protocol.authTimeout =  FALSE;
+  logicalPortInfo->protocol.authSuccess =  FALSE;
+
+  if (logicalPortInfo->protocol.authenticatedRcvdStartAuth)
+  {
+    logicalPortInfo->protocol.authenticatedRcvdStartAuth  =  FALSE;
+    logicalPortInfo->client.currentMethod = logicalPortInfo->client.authenticatedMethod;
+    return  SUCCESS;
+  }
+
+  rc = authmgrAuthenticationTrigger (logicalPortInfo);
+
+  if ( SUCCESS != rc)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                         "logicalInterface %d failed to update %s to start authentication\n",
+                         logicalPortInfo->key.keyNum,
+                         authmgrMethodStringGet (logicalPortInfo->client.
+                                                 currentMethod));
+
+    logicalPortInfo->protocol.authFail =  TRUE;
+    rc = authmgrGenerateEvents (logicalPortInfo->key.keyNum);
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                       "logicalInterface %d moved to state %s\n",
+                       logicalPortInfo->key.keyNum,
+                       authmgrAuthStateStringGet (logicalPortInfo->protocol.
+                                                  authState));
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Actions to be performed in the APM state AUTHENTICATED
+*
+* @param   logicalPortInfo  @b{(input))  Logical Port Info node
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAuthenticatedAction (authmgrLogicalPortInfo_t * logicalPortInfo)
+{
+  uint32 physPort = 0;
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+  authmgrClientStatusSet (logicalPortInfo,  AUTHMGR_PORT_STATUS_AUTHORIZED);
+  authmgrTxCannedSuccess (logicalPortInfo->key.keyNum, AUTHMGR_LOGICAL_PORT);
+
+  logicalPortInfo->protocol.authState = AUTHMGR_AUTHENTICATED;
+  logicalPortInfo->protocol.reauth =  FALSE;
+  logicalPortInfo->protocol.authFail =  FALSE;
+  logicalPortInfo->protocol.authTimeout =  FALSE;
+  logicalPortInfo->protocol.authSuccess =  FALSE;
+
+  /* check if re-auth is enabled. If yes
+     start the reauth timer */
+  if (authmgrCB->globalInfo->authmgrPortInfo[physPort].reAuthEnabled) 
+  {
+    authmgrTimerStart (logicalPortInfo, AUTHMGR_REAUTH_WHEN);
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                       "logicalInterface %d moved to state %s\n",
+                       logicalPortInfo->key.keyNum,
+                       authmgrAuthStateStringGet (logicalPortInfo->protocol.
+                                                  authState));
+
+   LOGF ( LOG_SEVERITY_NOTICE,
+           "Client %s authorized on port (%s) with VLAN type %s.", 
+           AUTHMGR_PRINT_MAC_ADDR(logicalPortInfo->client.suppMacAddr.addr),
+           authmgrIntfIfNameGet(physPort), authmgrVlanTypeStringGet (logicalPortInfo->client.vlanType));
+
+
+
+  if (AUTHMGR_VLAN_RADIUS == logicalPortInfo->client.vlanType)
+  {
+    logicalPortInfo->client.vlanTypePortCfg = (RADIUS_REQUIRED_TUNNEL_ATTRIBUTES_SPECIFIED == authmgrCB->attrInfo.vlanAttrFlags) ?  FALSE :  TRUE;
+  }
+    
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Events that auth mgr state machine needs to generate and propagate
+*
+* @param   lIntIfNum  @b{(input))  Logical Port number 
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrGenerateEvents (uint32 lIntIfNum)
+{
+  uint32 physPort = 0;
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  RC_t rc =  SUCCESS;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+  if ((AUTHMGR_INITIALIZE == logicalPortInfo->protocol.authState) &&
+      (authmgrCB->globalInfo->authmgrPortInfo[physPort].portEnabled))
+  {
+    /* E2 */
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                         "generating event %s for logicalInterface %d \n",
+                         authmgrSmEventStringGet (authmgrStartAuthenticate),
+                         logicalPortInfo->key.keyNum);
+    (void) authmgrStateMachineClassifier (authmgrStartAuthenticate, lIntIfNum);
+  }
+
+  if (AUTHMGR_UNAUTHENTICATED == logicalPortInfo->protocol.authState)
+  {
+    if (logicalPortInfo->protocol.authSuccess)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                           "Auth success due to special cases such as guest/unauth access"
+                           "for logicalInterface %d. generating event %s to Allowing access on the port %s \n",
+                           logicalPortInfo->key.keyNum,
+                           authmgrSmEventStringGet (authmgrAuthSuccess),
+                            authmgrIntfIfNameGet(physPort));
+      /* open the access for this port */
+      (void) authmgrStateMachineClassifier (authmgrAuthSuccess, lIntIfNum);
+      return  SUCCESS;
+    }
+    if ( TRUE == logicalPortInfo->protocol.heldTimerExpired)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                           "Held timer expired for logicalInterface %d \n",
+                           logicalPortInfo->key.keyNum);
+
+      if ( SUCCESS == authmgrClientDisconnectAction (logicalPortInfo))
+      {
+        return  SUCCESS;
+      }
+
+      /* reset the variables for next cycle
+         of authentication */
+      logicalPortInfo->client.currentMethod =  AUTHMGR_METHOD_NONE;
+    }
+
+    if (logicalPortInfo->protocol.authenticate)
+    {
+      /* get the first method */
+      rc =
+        authmgrEnabledMethodNextGet (physPort,
+                                     &logicalPortInfo->client.currentMethod);
+      if ( SUCCESS != rc)
+      {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                             "Next method %s not available for logicalInterface %d \n",
+                             authmgrMethodStringGet (logicalPortInfo->client.
+                                                     currentMethod),
+                             logicalPortInfo->key.keyNum);
+        return  SUCCESS;
+      }
+
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                           "Next method %s available for logicalInterface %d \n",
+                           authmgrMethodStringGet (logicalPortInfo->client.
+                                                   currentMethod),
+                           logicalPortInfo->key.keyNum);
+      (void) authmgrStateMachineClassifier (authmgrNotAuthSuccessNextMethod,
+                                            lIntIfNum);
+      return  SUCCESS;
+    }
+  }
+
+  if (AUTHMGR_AUTHENTICATING == logicalPortInfo->protocol.authState)
+  {
+    /* if the client has failed during re-auth,
+       purge the existing client */
+
+    if ( TRUE == logicalPortInfo->protocol.reauth)
+    {
+      if (( FALSE == logicalPortInfo->protocol.authFail) &&
+          ( FALSE == logicalPortInfo->protocol.authTimeout) &&
+          ( FALSE == logicalPortInfo->protocol.authSuccess))
+      {
+        /* Re-auth is in progress
+           nothing to be done */
+        return  SUCCESS;
+      }
+
+      if (( TRUE == logicalPortInfo->protocol.authFail) &&
+          ( AUTHMGR_METHOD_NONE != logicalPortInfo->client.authenticatedMethod))
+      {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+            "%s: %d: generating event authmgrNotAuthSuccessNoNextMethod forlogicalInterface %d \n",
+            __func__, __LINE__, logicalPortInfo->key.keyNum);
+        (void)
+          authmgrStateMachineClassifier (authmgrNotAuthSuccessNoNextMethod,
+              lIntIfNum);
+        return  SUCCESS;
+      }
+    }
+
+    if ((logicalPortInfo->protocol.unAuthenticate))
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                           "un authenticating client on logicalInterface %d \n",
+                           logicalPortInfo->key.keyNum);
+      (void) authmgrStateMachineClassifier (authmgrStopAuthenticate, lIntIfNum);
+      return  SUCCESS;
+    }
+
+    if (logicalPortInfo->protocol.authSuccess)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                           "Auth Success for method %s for logicalInterface %d \n",
+                           authmgrMethodStringGet (logicalPortInfo->client.
+                                                   currentMethod),
+                           logicalPortInfo->key.keyNum);
+      (void) authmgrStateMachineClassifier (authmgrAuthSuccess, lIntIfNum);
+      return  SUCCESS;
+    }
+    else
+    {
+      rc =  SUCCESS;
+      if ((logicalPortInfo->protocol.authFail) ||
+          (logicalPortInfo->protocol.authTimeout))
+      {
+        rc =
+          authmgrEnabledMethodNextGet (physPort,
+              &logicalPortInfo->client.
+              currentMethod);
+      }
+
+      if ( SUCCESS == rc)
+      {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                             "Next method %s available for logicalInterface %d \n",
+                             authmgrMethodStringGet (logicalPortInfo->client.
+                                                     currentMethod),
+                             logicalPortInfo->key.keyNum);
+        (void) authmgrStateMachineClassifier (authmgrNotAuthSuccessNextMethod,
+                                              lIntIfNum);
+        return  SUCCESS;
+      }
+      else
+      {
+        AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                             "No Next method available for logicalInterface %d \n",
+                             logicalPortInfo->key.keyNum);
+        (void) authmgrStateMachineClassifier (authmgrNotAuthSuccessNoNextMethod,
+                                              lIntIfNum);
+        return  SUCCESS;
+      }
+    }
+  }
+
+
+  if (AUTHMGR_HELD == logicalPortInfo->protocol.authState)
+  {
+    if ( TRUE == logicalPortInfo->protocol.heldTimerExpired)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+          "generating event %s for logicalInterface %d \n",
+          authmgrSmEventStringGet (authmgrHeldTimerEqualsZero),
+          logicalPortInfo->key.keyNum);
+      (void) authmgrStateMachineClassifier (authmgrHeldTimerEqualsZero,
+          lIntIfNum);
+      return  SUCCESS;
+    }
+  }
+
+  if (AUTHMGR_AUTHENTICATED == logicalPortInfo->protocol.authState)
+  {
+    if (logicalPortInfo->protocol.authSuccess)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                           "Reauth and received success. Moving to authenticated state for client on logicalInterface %d \n",
+                           logicalPortInfo->key.keyNum);
+      (void) authmgrStateMachineClassifier (authmgrAuthSuccess, lIntIfNum);
+      return  SUCCESS;
+    }
+    if (logicalPortInfo->protocol.unAuthenticate)
+    {
+      nimGetIntfName(physPort,  ALIASNAME, ifName); 
+       LOGF ( LOG_SEVERITY_DEBUG,
+               "Unauthenticating client on logicalInterface (%d) port (%s).", 
+                logicalPortInfo->key.keyNum, ifName);
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                           "Unauthenticating client on logicalInterface %d \n",
+                           logicalPortInfo->key.keyNum);
+      (void) authmgrStateMachineClassifier (authmgrStopAuthenticate, lIntIfNum);
+      return  SUCCESS;
+    }
+
+    if ( TRUE == logicalPortInfo->protocol.authenticatedRcvdStartAuth)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                           "Received authenticate action on logicalInterface %d."
+                             "Setting reauthenticate true for client \n",
+                           logicalPortInfo->key.keyNum);
+      logicalPortInfo->protocol.authenticatedRcvdStartAuth =  FALSE;
+      logicalPortInfo->protocol.reauth =  TRUE;
+    }
+
+    if ( TRUE == logicalPortInfo->protocol.reauth)
+    {
+      nimGetIntfName(physPort,  ALIASNAME, ifName);
+
+       LOGF ( LOG_SEVERITY_NOTICE,
+             "Reauthentication triggered for client %s on port %s.",
+             AUTHMGR_PRINT_MAC_ADDR(logicalPortInfo->client.suppMacAddr.addr),
+             ifName);  
+
+
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                           "generating event %s for logicalInterface %d \n",
+                           authmgrSmEventStringGet (authmgrReauthenticate),
+                           logicalPortInfo->key.keyNum);
+      (void) authmgrStateMachineClassifier (authmgrReauthenticate, lIntIfNum);
+      return  SUCCESS;
+    }
+
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose state machine function to trigger authentication
+*
+* @param lIntIfNum logical interface number
+* @return  SUCCESS
+* @return  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAuthenticationInitiate (uint32 lIntIfNum)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 physPort = 0;
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+
+  if ( NULLPTR == logicalPortInfo)
+  {
+    return  FAILURE;
+  }
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                       "%s : received event to start authentication for logicalInterface %d \n",
+                       __func__, logicalPortInfo->key.keyNum);
+
+  logicalPortInfo->protocol.authenticate =  TRUE;
+
+  authmgrGenerateEvents (lIntIfNum);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  This routine calculates the next state for the APM state machine
+*           and executes the action for that next state
+*
+* @param   authmgrEvent  @b{(input)) event
+* @param   logicalPortInfo    @b{(input)) Logical port structure
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrStateMachine (uint32 authmgrEvent,
+                             authmgrLogicalPortInfo_t * logicalPortInfo)
+{
+  AUTHMGR_STATES_t nextState;
+  uint32 normalizedEvent;
+  RC_t rc =  FAILURE;
+  uint32 physPort = 0;
+
+  if (logicalPortInfo ==  NULLPTR)
+  {
+    return  FAILURE;
+  }
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+  normalizedEvent = authmgrEvent;
+
+  nextState =
+    authmgrStateTable[normalizedEvent][logicalPortInfo->protocol.authState];
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FSM_EVENTS, physPort,
+                       "AuthMgr Machine for logical port - %d moving from %s to %s for event %s \n",
+                       logicalPortInfo->key.keyNum,
+                       authmgrAuthStateStringGet (logicalPortInfo->protocol.
+                                                  authState),
+                       authmgrAuthStateStringGet (nextState),
+                       authmgrSmEventStringGet (normalizedEvent));
+  switch (nextState)
+  {
+  case AUTHMGR_INITIALIZE:
+    rc = authmgrInitializeAction (logicalPortInfo);
+    rc = authmgrGenerateEvents (logicalPortInfo->key.keyNum);
+    break;
+  case AUTHMGR_AUTHENTICATING:
+    rc = authmgrAuthenticatingAction (logicalPortInfo);
+    /*   rc = authmgrGenerateEvents(logicalPortInfo->key.keyNum); */
+    break;
+  case AUTHMGR_AUTHENTICATED:
+    rc = authmgrAuthenticatedAction (logicalPortInfo);
+    /* No need to generate events here */
+    break;
+  case AUTHMGR_HELD:
+    rc = authmgrHeldAction (logicalPortInfo);
+    /* No need to generate events here */
+    break;
+  case AUTHMGR_UNAUTHENTICATED:
+    rc = authmgrUnauthenticatedAction (logicalPortInfo);
+    rc = authmgrGenerateEvents (logicalPortInfo->key.keyNum);
+    break;
+  default:
+    break;
+  }
+
+  return rc;
+}
diff --git a/src/sonic-pac/authmgr/protocol/auth_mgr_timer.c b/src/sonic-pac/authmgr/protocol/auth_mgr_timer.c
new file mode 100755
index 00000000000..6f8b3558c1a
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/auth_mgr_timer.c
@@ -0,0 +1,422 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_db.h"
+#include "auth_mgr_debug.h"
+#include "auth_mgr_struct.h"
+
+extern authmgrCB_t *authmgrCB;
+
+/*************************************************************************
+* @purpose  function to process on expiry of reauth when timer
+*
+* @param    logicalPortInfo @b{(input)}  Pointer to logicalPort Info
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*************************************************************************/
+RC_t authmgrReAuthWhenExpiryAction (authmgrLogicalPortInfo_t *
+                                       logicalPortInfo)
+{
+  uint32 physPort = 0;
+  RC_t rc = SUCCESS;
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+  if (AUTHMGR_AUTHENTICATING == logicalPortInfo->protocol.authState) 
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_TIMER, physPort,
+                         "\n%s:%d Client already authenticating for port %s\n",
+                         __FUNCTION__, __LINE__, 
+                         authmgrIntfIfNameGet(logicalPortInfo->key.keyNum));
+    return  SUCCESS;
+  }
+
+  /* get the current authenticated method and
+     notify to re-start authentication */
+
+  if (NULLPTR ==
+      authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.
+      authenticatedMethod].
+      eventNotifyFn)
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+        "Port %s logicalInterface %d failed to update %s to start authentication\n"
+        "since the callback function is not registered method\n",
+        authmgrIntfIfNameGet(logicalPortInfo->key.keyNum), logicalPortInfo->key.keyNum,
+        authmgrMethodStringGet(logicalPortInfo->client.authenticatedMethod));
+    rc = FAILURE;
+  }
+
+  if (SUCCESS == rc)
+  {
+    if ((authmgrCB->globalInfo->authmgrPortInfo[physPort].reAuthPeriodServer) &&
+        (RADIUS_TERMINATION_ACTION_DEFAULT ==
+         logicalPortInfo->client.terminationAction)) 
+    {
+      /* session timeout is derived from radius server and
+         and received termination action as default */
+      /* purge the client */
+      authmgrClientInfoCleanup (logicalPortInfo);
+      return SUCCESS;
+    }
+
+    /* Invoke Reauth with Authentication Method only if RADIUS
+       dependency is not there. */
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, physPort,
+        "Invoking Reauth for logicalInterface 0x%x with method %s.\n",
+        logicalPortInfo->key.keyNum,
+        authmgrMethodStringGet (logicalPortInfo->client.authenticatedMethod));
+    rc =
+      authmgrCB->globalInfo->authmgrCallbacks[logicalPortInfo->client.
+      authenticatedMethod].eventNotifyFn
+      (physPort, authmgrClientReAuthenticate,
+       &logicalPortInfo->client.suppMacAddr);
+  }
+
+  logicalPortInfo->protocol.reauth =  TRUE;
+  logicalPortInfo->protocol.authFail =  FALSE;
+  logicalPortInfo->protocol.authTimeout =  FALSE;
+  logicalPortInfo->protocol.authSuccess =  FALSE;
+  authmgrGenerateEvents (logicalPortInfo->key.keyNum);
+  return  SUCCESS;
+}
+
+/*************************************************************************
+* @purpose  function to process on expiry of reauth when timer
+*
+* @param    logicalPortInfo @b{(input)}  Pointer to logicalPort Info
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*************************************************************************/
+RC_t authmgrQwhileExpiryAction (authmgrLogicalPortInfo_t * logicalPortInfo)
+{
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  logicalPortInfo->protocol.heldTimerExpired =  TRUE;
+
+  /* QWhile Timer has expired. */
+  authmgrGenerateEvents (logicalPortInfo->key.keyNum);
+
+  return  SUCCESS;
+}
+
+
+
+
+/*************************************************************************
+* @purpose  function to get function map entry for the given timer type
+*
+* @param    type  @b{(input)} timer type
+* @param    elem @b{(input)}  Pointer to map entry
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*************************************************************************/
+RC_t authmgrTimerHandlerInfoGet (authmgrTimerType_t type,
+                                    authmgrTimerMap_t * elem)
+{
+  uint32 i = 0;
+  static authmgrTimerMap_t authmgrTimerHandlerTable[] = {
+    {AUTHMGR_QWHILE, authmgrQwhileExpiryAction,  FALSE, authmgrQuietPeriodGet,
+      NULLPTR},
+    {AUTHMGR_REAUTH_WHEN, authmgrReAuthWhenExpiryAction,  TRUE,
+     authmgrReAuthPeriodGet, authmgrLogicalPortReAuthPeriodGet},
+  };
+
+  for (i = 0;
+       i < (sizeof (authmgrTimerHandlerTable) / sizeof (authmgrTimerMap_t));
+       i++)
+  {
+    if (type == authmgrTimerHandlerTable[i].type)
+    {
+      *elem = authmgrTimerHandlerTable[i];
+      return  SUCCESS;
+    }
+  }
+
+  return  FAILURE;
+}
+
+
+/*********************************************************************
+* @purpose   This function is used to return appropriate timer
+*
+* @param     logicalPortInfo    @b{(input)} client logical port
+* @param     timerType         @b{(input)}  timer type
+* @param     timerType         @b{(output)} timer
+*
+* @returns   None
+*
+* @notes     None
+* @end
+*********************************************************************/
+static void authmgrGetTimer (authmgrLogicalPortInfo_t *logicalPortInfo,
+                             authmgrTimerType_t timerType, 
+                             authmgrTimer_t **pTmr)
+{
+  *pTmr = &logicalPortInfo->authmgrTimer;
+  return;
+}
+
+/*********************************************************************
+* @purpose   This function is used to send timer events
+*
+* @param     timerCtrlBlk    @b{(input)}   Timer Control Block
+* @param     ptrData         @b{(input)}   Ptr to passed data
+*
+* @returns   None
+*
+* @notes     None
+* @end
+*********************************************************************/
+void authmgrTimerExpiryHdlr ( APP_TMR_CTRL_BLK_t timerCtrlBlk, void *ptrData)
+{
+  authmgrIssueCmd (authmgrTimeTick,  NULL,  NULLPTR);
+}
+
+/*************************************************************************
+* @purpose  Process the authmgr timer expiry event
+*
+* @param    param    @b{(input)}  Pointer to added authmgr node identifier
+*
+* @returns  void
+*
+* @comments none
+*
+* @end
+*************************************************************************/
+void authmgrTimerExpiryAction (void *param)
+{
+  authmgrTimerContext_t *pNode;
+  authmgrTimerMap_t entry;
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  authmgrTimer_t *pTmr =  NULLPTR;
+  uint32 physPort = 0, lPort = 0, type = 0;
+
+  pNode = (authmgrTimerContext_t *) param;
+  if (pNode ==  NULLPTR)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "authmgrTimerExpiryAction: Failed to retrieve handle \n");
+    return;
+  }
+
+  logicalPortInfo = authmgrLogicalPortInfoGet (pNode->keyNum);
+
+  if ( NULLPTR == logicalPortInfo)
+  {
+    return;
+  }
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_TIMER, physPort, 
+                       "timer %s expired for logical port %d \r\n",
+                       authmgrTimerTypeStringGet (pNode->type),
+                       logicalPortInfo->key.keyNum);
+
+  memset(&authmgrCB->oldInfo, 0, sizeof(authmgrClientInfo_t));
+  authmgrCB->oldInfo = logicalPortInfo->client;
+
+  authmgrGetTimer(logicalPortInfo, pNode->type, &pTmr);
+
+  /* Delete the apptimer node */
+  (void) appTimerDelete (authmgrCB->globalInfo->authmgrTimerCB,
+                         pTmr->handle.timer);
+  /* Null out the timer Details */
+  pTmr->handle.timer =  NULL;  
+  
+  /* pass the event accoring to the timer type */
+
+  memset (&entry, 0, sizeof (authmgrTimerMap_t));
+  if ( SUCCESS != authmgrTimerHandlerInfoGet (pNode->type, &entry))
+  {
+     LOGF ( LOG_SEVERITY_WARNING,
+             "authmgrTimerExpiryAction: Failed to retrieve information"
+             "for timer type %s", authmgrTimerTypeStringGet (pNode->type));
+    return;
+  }
+
+  if ( NULLPTR != entry.expiryFn)
+  {
+    entry.expiryFn (logicalPortInfo);
+  }
+}
+
+/*************************************************************************
+* @purpose  Helper API to delete the specifed timer node
+*
+* @param    timer  @b{(input)}  Pointer to appTimer node
+* @param    logicalPortInfo @b{(input)}  Pointer to logicalPort Info
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*************************************************************************/
+RC_t authmgrTimerDestroy ( APP_TMR_CTRL_BLK_t timerCB,
+                             authmgrLogicalPortInfo_t * logicalPortInfo,
+                             authmgrTimerType_t timerType)
+{
+  uint32 physPort = 0, lPort = 0, type = 0;
+  authmgrTimer_t *pTmr =  NULLPTR; 
+  
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+  
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+  
+  authmgrGetTimer(logicalPortInfo, timerType, &pTmr);
+  
+  /* Delete the apptimer node */
+  if (( NULL != pTmr->handle.timer) && (timerType == pTmr->cxt.type))
+  {
+    (void) appTimerDelete (timerCB, pTmr->handle.timer);
+    pTmr->handle.timer =  NULLPTR;
+    
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_TIMER, physPort,
+                         "deleted the timer type %s"
+                         "port %s type %s lport %d \r\n",
+                         authmgrTimerTypeStringGet (pTmr->cxt.type),
+                         authmgrIntfIfNameGet(physPort),
+                         authmgrNodeTypeStringGet (type), lPort);
+    /* clear the context */
+    memset (pTmr, 0, sizeof (authmgrTimer_t));
+  } 
+  
+  return  SUCCESS;
+} 
+
+/*************************************************************************
+* @purpose  Starts the specified timer
+*
+* @param    logicalPortInfo @b{(input)}  Pointer to logicalPort Info
+* @param    timerType     @b{(input)}  Interface/Timer type
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*
+* @end
+*************************************************************************/
+RC_t authmgrTimerStart (authmgrLogicalPortInfo_t * logicalPortInfo,
+                           authmgrTimerType_t timerType)
+{
+  uint32 physPort = 0, lPort = 0, type = 0, val = 0;
+  authmgrTimerMap_t entry;
+  authmgrTimer_t *pTmr =  NULLPTR;
+
+  memset (&entry, 0, sizeof (authmgrTimerMap_t));
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  authmgrGetTimer(logicalPortInfo, timerType, &pTmr);
+
+  if (pTmr->handle.timer !=  NULLPTR)
+  {
+	AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_TIMER, physPort, 
+		"timer %s already running for port %s logical port %d \r\n",
+		authmgrTimerTypeStringGet (pTmr->cxt.type),
+		authmgrIntfIfNameGet(logicalPortInfo->key.keyNum), logicalPortInfo->key.keyNum);
+
+	AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_TIMER, physPort, 
+		"not starting timer %s for port %s logical port %d \r\n",
+		authmgrTimerTypeStringGet (timerType),
+		authmgrIntfIfNameGet(logicalPortInfo->key.keyNum), logicalPortInfo->key.keyNum);
+	return  SUCCESS;
+  }
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_TIMER, physPort, 
+                       "starting timer %s for port %s logical port %d \r\n",
+                       authmgrTimerTypeStringGet (timerType),
+                       authmgrIntfIfNameGet(logicalPortInfo->key.keyNum), logicalPortInfo->key.keyNum);
+
+  if ( SUCCESS != authmgrTimerHandlerInfoGet (timerType, &entry))
+  {
+     LOGF ( LOG_SEVERITY_WARNING,
+             "Failed to retrieve information"
+             "for timer type %s", authmgrTimerTypeStringGet (timerType));
+    return  FAILURE;
+  }
+
+  AUTHMGR_LPORT_KEY_UNPACK (physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  if (entry.serverConfigSupport)
+  {
+    if ( NULLPTR != entry.lportGetFn)
+    {
+      entry.lportGetFn (logicalPortInfo->key.keyNum, &val);
+    }
+  }
+  else
+  {
+    if ( NULLPTR != entry.getFn)
+    {
+      /* get the timer value */
+      entry.getFn (physPort, &val);
+    }
+  }
+
+  /* fill the timer context */
+  pTmr->cxt.type = timerType;
+  pTmr->cxt.keyNum = logicalPortInfo->key.keyNum;
+  
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_TIMER, physPort, 
+                       "timer %s for logical port %d val %d\r\n",
+                       authmgrTimerTypeStringGet (timerType),
+                       logicalPortInfo->key.keyNum, val);
+  if (0 == val)
+  {
+    return  SUCCESS;
+  }
+
+  /* Start the timer */
+  pTmr->handle.timer =
+    appTimerAdd (authmgrCB->globalInfo->authmgrTimerCB,
+                 authmgrTimerExpiryAction, (void *) &pTmr->cxt, val,
+                 authmgrTimerTypeStringGet (timerType));
+
+  if (pTmr->handle.timer ==  NULLPTR)
+  {
+     LOGF ( LOG_SEVERITY_WARNING,
+             "authmgrTimerStart: Could not Start the %s timer."
+             "intIf %s, clientType %s, logical IntIfNum %d.",
+             authmgrTimerTypeStringGet (timerType), authmgrIntfIfNameGet(physPort),
+             authmgrNodeTypeStringGet (type), lPort);
+    return  FAILURE;
+  }
+
+  return  SUCCESS;
+}
diff --git a/src/sonic-pac/authmgr/protocol/auth_mgr_txrx.c b/src/sonic-pac/authmgr/protocol/auth_mgr_txrx.c
new file mode 100755
index 00000000000..3a4d9390d78
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/auth_mgr_txrx.c
@@ -0,0 +1,307 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define  MAC_EAPOL_PDU
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_struct.h"
+#include "auth_mgr_control.h"
+#include <arpa/inet.h>
+#include "utils_api.h"
+#include "sysapi.h"
+#include <net/if.h>
+#include <sys/socket.h>
+#include <linux/if_packet.h>
+#include <net/ethernet.h>
+#include "fpSonicUtils.h"
+
+
+extern authmgrCB_t *authmgrCB;
+
+static  enetMacAddr_t  EAPOL_PDU_MAC_ADDR =
+{{0x01, 0x80, 0xC2, 0x00, 0x00, 0x03}};
+
+
+/**************************************************************************
+ * @purpose   Transmit a EAPOL EAP Success to Supplicant
+ *
+ * @param     lIntIfNum @b{(input)} internal interface number
+ * @param     portType @b{(input)} physical or logical interface 
+ *
+ * @returns   void
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+void authmgrTxCannedSuccess (uint32 lIntIfNum, authmgrPortType_t portType)
+{
+   netBufHandle bufHandle =  NULL;
+   uchar8 *data;
+   enetHeader_t *enetHdr;
+   enet_encaps_t *encap;
+   uchar8 baseMac[ MAC_ADDR_LEN];
+   eapolPacket_t *eapolPkt;
+   authmgrEapPacket_t *eapPkt;
+  uint32 length;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  uint32 intIfNum = lIntIfNum;
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_API_CALLS, intIfNum,
+                       "%s: called for port %d, type %d\n",
+                          __FUNCTION__, lIntIfNum, portType);
+
+  if (portType == AUTHMGR_LOGICAL_PORT)
+  {
+    intIfNum = authmgrPhysPortGet (lIntIfNum);
+  }
+  SYSAPI_NET_MBUF_GET (bufHandle);
+  if (bufHandle ==  NULL)
+  {
+     LOGF ( LOG_SEVERITY_NOTICE,
+             "authmgrTxReqId: Out of System buffers."
+             " 802.1X cannot process/transmit message due to lack of internal buffers");
+    return;
+  }
+
+  SYSAPI_NET_MBUF_GET_DATASTART (bufHandle, data);
+
+  /* Set ethernet header */
+  enetHdr = ( enetHeader_t *) (data);
+
+  if (nimGetIntfAddress(intIfNum,  NULL, baseMac) !=  SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_NOTICE,
+             "802.1X could not send EAP_SUCCESS - Could not get MAC address for interface %d", intIfNum);
+    SYSAPI_NET_MBUF_FREE (bufHandle);
+    return;
+  }
+
+  /* Set dest and source MAC in ethernet header */
+  memcpy (enetHdr->dest.addr,  EAPOL_PDU_MAC_ADDR.addr,  MAC_ADDR_LEN);
+  memcpy (enetHdr->src.addr, baseMac,  MAC_ADDR_LEN);
+
+  /* Set ethernet type */
+  encap = ( enet_encaps_t *) (( uchar8 *) enetHdr +  ENET_HDR_SIZE);
+  encap->type = osapiHtons ( ETYPE_EAPOL);
+
+  /* Set EAPOL header */
+  eapolPkt =
+    ( eapolPacket_t *) (( uchar8 *) encap +  ENET_ENCAPS_HDR_SIZE);
+  eapolPkt->protocolVersion =  DOT1X_PAE_PORT_PROTOCOL_VERSION_2;
+  eapolPkt->packetType = EAPOL_EAPPKT;
+  eapolPkt->packetBodyLength =
+    osapiHtons (( ushort16) (sizeof ( authmgrEapPacket_t)));
+
+  /* Set EAP header */
+  eapPkt =
+    ( authmgrEapPacket_t *) (( uchar8 *) eapolPkt + sizeof ( eapolPacket_t));
+  eapPkt->code = EAP_SUCCESS;
+
+  if (portType == AUTHMGR_PHYSICAL_PORT)
+  {
+    eapPkt->id = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].currentId;
+  }
+  else
+  {
+    logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+    if (logicalPortInfo)
+    {
+      eapPkt->id = logicalPortInfo->client.currentIdL;
+    }
+  }
+
+  eapPkt->length = osapiHtons (( ushort16) (sizeof ( authmgrEapPacket_t)));
+
+  length = (uint32) ( ENET_HDR_SIZE +  ENET_ENCAPS_HDR_SIZE +
+                        sizeof ( eapolPacket_t) + sizeof ( authmgrEapPacket_t));
+  SYSAPI_NET_MBUF_SET_DATALENGTH (bufHandle, length);
+
+  authmgrFrameTransmit (lIntIfNum, bufHandle, portType);
+}
+
+/**************************************************************************
+ * @purpose   Transmit a EAPOL EAP Failure to Supplicant
+ *
+ * @param     lIntIfNum @b{(input)} internal interface number
+ * @param     portType @b{(input)} physical or logical interface 
+ *
+ * @returns   void
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+void authmgrTxCannedFail (uint32 lIntIfNum, authmgrPortType_t portType)
+{
+   netBufHandle bufHandle =  NULL;
+   uchar8 *data;
+   enetHeader_t *enetHdr;
+   enet_encaps_t *encap;
+   uchar8 baseMac[ MAC_ADDR_LEN];
+   eapolPacket_t *eapolPkt;
+   authmgrEapPacket_t *eapPkt;
+  uint32 length;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  uint32 intIfNum = lIntIfNum;
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_API_CALLS, intIfNum,
+                       "%s: called for port %d, type %d\n",
+                          __FUNCTION__, lIntIfNum, portType);
+
+  if (portType == AUTHMGR_LOGICAL_PORT)
+  {
+    intIfNum = authmgrPhysPortGet (lIntIfNum);
+  }
+
+  SYSAPI_NET_MBUF_GET (bufHandle);
+  if (bufHandle ==  NULL)
+  {
+     LOGF ( LOG_SEVERITY_NOTICE,
+             "authmgrTxCannedFail: Out of System buffers."
+             " 802.1X cannot process/transmit message due to lack of internal buffers");
+    return;
+  }
+
+  SYSAPI_NET_MBUF_GET_DATASTART (bufHandle, data);
+
+  /* Set ethernet header */
+  enetHdr = ( enetHeader_t *) (data);
+  if (nimGetIntfAddress(intIfNum,  NULL, baseMac) !=  SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_NOTICE,
+             "802.1X could send EAP_FAILURE - Could not get MAC address for interface %d", intIfNum);
+    SYSAPI_NET_MBUF_FREE (bufHandle);
+    return;
+  }
+
+  /* Set dest and source MAC in ethernet header */
+  memcpy (enetHdr->dest.addr,  EAPOL_PDU_MAC_ADDR.addr,  MAC_ADDR_LEN);
+  memcpy (enetHdr->src.addr, baseMac,  MAC_ADDR_LEN);
+
+  /* Set ethernet type */
+  encap = ( enet_encaps_t *) (( uchar8 *) enetHdr +  ENET_HDR_SIZE);
+  encap->type = osapiHtons ( ETYPE_EAPOL);
+
+  /* Set EAPOL header */
+  eapolPkt =
+    ( eapolPacket_t *) (( uchar8 *) encap +  ENET_ENCAPS_HDR_SIZE);
+  eapolPkt->protocolVersion =  DOT1X_PAE_PORT_PROTOCOL_VERSION_2;
+  eapolPkt->packetType = EAPOL_EAPPKT;
+  eapolPkt->packetBodyLength =
+    osapiHtons (( ushort16) (sizeof ( authmgrEapPacket_t)));
+
+  /* Set EAP header */
+  eapPkt =
+    ( authmgrEapPacket_t *) (( uchar8 *) eapolPkt + sizeof ( eapolPacket_t));
+  eapPkt->code = EAP_FAILURE;
+
+  if (portType == AUTHMGR_PHYSICAL_PORT)
+  {
+    eapPkt->id = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].currentId;
+  }
+  else
+  {
+    logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+    if (logicalPortInfo)
+    {
+      eapPkt->id = logicalPortInfo->client.currentIdL;
+    }
+  }
+
+  eapPkt->length = osapiHtons (( ushort16) (sizeof ( authmgrEapPacket_t)));
+
+  length = (uint32) ( ENET_HDR_SIZE +  ENET_ENCAPS_HDR_SIZE +
+                        sizeof ( eapolPacket_t) + sizeof ( authmgrEapPacket_t));
+  SYSAPI_NET_MBUF_SET_DATALENGTH (bufHandle, length);
+
+  authmgrFrameTransmit (lIntIfNum, bufHandle, portType);
+}
+
+/*********************************************************************
+* @purpose  Transmit a frame
+*
+* @param    lIntIfNum   @b{(input)} outgoing internal interface number
+* @param    bufHandle  @b{(input)} handle to the network buffer where frame is
+*                                  stored
+ * @param     portType @b{(input)} physical or logical interface 
+*
+* @returns  void
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrFrameTransmit (uint32 lIntIfNum,  netBufHandle bufHandle,
+                           authmgrPortType_t portType)
+{
+   uchar8 *data, tmpMac[ ENET_MAC_ADDR_LEN];
+  uint32 len = 0;
+   uchar8 ifname[ NIM_IF_ALIAS_SIZE + 1] = {0};
+  struct sockaddr_ll addr;
+   int32 ret;
+  uint32 intIfNum = authmgrPhysPortGet (lIntIfNum);
+
+  SYSAPI_NET_MBUF_GET_DATASTART (bufHandle, data);
+
+  if (portType == AUTHMGR_LOGICAL_PORT)
+  {
+    authmgrLogicalPortInfo_t *logicalPortInfo;
+    logicalPortInfo = authmgrLogicalPortInfoGet (lIntIfNum);
+    if ( NULLPTR == logicalPortInfo ||  0 == logicalPortInfo->key.keyNum)
+    {
+      SYSAPI_NET_MBUF_FREE (bufHandle);
+      return;
+    }
+    memset (tmpMac, 0,  ENET_MAC_ADDR_LEN);
+    if (memcmp
+        (logicalPortInfo->client.suppMacAddr.addr, tmpMac,
+          ENET_MAC_ADDR_LEN) != 0)
+    {
+      memcpy (data, logicalPortInfo->client.suppMacAddr.addr,
+           ENET_MAC_ADDR_LEN);
+    }
+
+
+    fpGetHostIntfName(intIfNum, ifname);
+
+    memset(&addr, 0, sizeof(addr));
+    addr.sll_family = AF_PACKET;
+    addr.sll_ifindex = if_nametoindex((const char *)ifname);
+
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_API_CALLS, intIfNum,
+                         "%s: Opening raw packet socket for port %d\n", 
+                         __FUNCTION__, intIfNum);
+
+
+    SYSAPI_NET_MBUF_GET_DATALENGTH(bufHandle, len);
+
+    ret = (int) sendto(authmgrCB->globalInfo->eap_socket, data, len, 0,
+        (const struct sockaddr*)&addr, sizeof(struct sockaddr_ll));
+
+    if (ret < 0)
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_API_CALLS, intIfNum,
+                           "%s: send failed for port %d\n", 
+                           __FUNCTION__, intIfNum);
+    }
+
+  }
+
+  SYSAPI_NET_MBUF_FREE (bufHandle);
+}
+
+
diff --git a/src/sonic-pac/authmgr/protocol/auth_mgr_utils.c b/src/sonic-pac/authmgr/protocol/auth_mgr_utils.c
new file mode 100755
index 00000000000..69a8258f6b6
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/auth_mgr_utils.c
@@ -0,0 +1,918 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_db.h"
+#include "auth_mgr_client.h"
+#include "auth_mgr_timer.h"
+#include "auth_mgr_control.h"
+#include "auth_mgr_struct.h"
+#include "pac_cfg_authmgr.h"
+#include "fpSonicUtils.h"
+#include "osapi.h"
+
+extern void pacCreateDeleteSocket(char *if_name, bool isCreate);
+extern authmgrCB_t *authmgrCB;
+/*********************************************************************
+* @purpose function to check policy validation based on host mode
+*
+* @param    hostMode   @b{(input))  hostmode
+* @param    *appyPolicy  @b{(input)) bool value
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrHostIsDynamicNodeAllocCheck (AUTHMGR_HOST_CONTROL_t hostMode,
+                                            BOOL * valid)
+{
+  *valid = TRUE;
+  return SUCCESS;
+}
+/*********************************************************************
+* @purpose check the nim interface status before invoking any call
+*
+* @param intIfNum internal interface number
+* @return SUCCESS or FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrNimIntfStateCheck (uint32 intIfNum)
+{
+  INTF_STATES_t state;
+  authmgrPortCfg_t *pCfg;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  state = nimGetIntfState (intIfNum);
+  if ((state != INTF_ATTACHED)
+      && (state != INTF_ATTACHING) && (state != INTF_DETACHING))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                         "%s:authmgrNimIntfStateCheck failed  Port = %s, nim state = %d\n",
+                         __FUNCTION__, authmgrIntfIfNameGet(intIfNum), state);
+    return FAILURE;
+  }
+
+  return SUCCESS;
+}
+/*********************************************************************
+* @purpose function to check policy validation based on host mode
+*
+* @param intIfNum internal interface number
+* @param    *appyPolicy  @b{(input)) bool value
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrStaticFdbEntryValidCheck (uint32 intIfNum,BOOL * valid)
+{
+  authmgrPortCfg_t *pCfg;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  switch (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode)
+  {
+  case AUTHMGR_SINGLE_AUTH_MODE:
+  case AUTHMGR_MULTI_AUTH_MODE:
+    *valid = TRUE;
+    break;
+  default:
+    *valid = FALSE;
+  }
+  return SUCCESS;
+}
+/*********************************************************************
+* @purpose function to change the learning of multi host mode
+*
+* @param intIfNum internal interface number
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrMultiHostHwLearningModify (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+  AUTHMGR_PORT_LEARNING_t learning = AUTHMGR_PORT_LEARNING_NA;
+  char8 aliasName[NIM_IF_ALIAS_SIZE + 1];
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  if (SUCCESS != authmgrNimIntfStateCheck (intIfNum))
+  {
+    return FAILURE;
+  }
+  if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount)
+  {
+    /*  learning  enable */
+    learning = AUTHMGR_PORT_LEARNING_ENABLE;
+  }
+  else
+  {
+    /* disable learning */
+    learning = AUTHMGR_PORT_LEARNING_DISABLE;
+  }
+  if (nimGetIntfName (intIfNum, ALIASNAME, aliasName) != SUCCESS)
+  {
+    LOGF (LOG_SEVERITY_ERROR,
+             "Unable to get alias for intf %s", authmgrIntfIfNameGet(intIfNum));
+    return FAILURE;
+  }
+
+  if (AUTHMGR_PORT_LEARNING_DISABLE == learning)
+  {
+    learning = (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].unLearnMacPolicy == TRUE) ?
+                AUTHMGR_PORT_LEARNING_CPU : learning;
+  }
+
+  if (pacCfgIntfLearningModeSet(aliasName, learning) != SUCCESS)
+  {
+    LOGF (LOG_SEVERITY_ERROR,
+             "Unable to set Authmgr learning for port %s", aliasName);
+    return FAILURE;
+  }
+  return SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to change the learning of multi host mode
+*
+* @param intIfNum internal interface number
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrMultAuthHwLearningModify (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+  uchar8 aliasName[NIM_IF_ALIAS_SIZE + 1];
+  AUTHMGR_PORT_LEARNING_t learning = AUTHMGR_PORT_LEARNING_DISABLE;
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  if (SUCCESS != authmgrNimIntfStateCheck (intIfNum))
+  {
+    return FAILURE;
+  }
+  /* disable learning */
+  if (nimGetIntfName (intIfNum, ALIASNAME, aliasName) != SUCCESS)
+  {   
+    LOGF (LOG_SEVERITY_ERROR,
+             "Unable to get alias for intf %s", authmgrIntfIfNameGet(intIfNum));
+    return FAILURE;
+  }
+
+  if (AUTHMGR_PORT_LEARNING_DISABLE == learning)
+  {
+    learning = (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].unLearnMacPolicy == TRUE) ?
+                AUTHMGR_PORT_LEARNING_CPU : learning;
+  }
+
+  if (pacCfgIntfLearningModeSet(aliasName, learning) != SUCCESS)
+  {  
+    LOGF (LOG_SEVERITY_ERROR,
+             "Unable to set Authmgr learning for port %s", aliasName);
+    return FAILURE;
+  }
+  return SUCCESS;
+}
+/*********************************************************************
+* @purpose function to change the learning of multi host mode
+*
+* @param intIfNum internal interface number
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrSingleAuthHwLearningModify (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+  uchar8 aliasName[NIM_IF_ALIAS_SIZE + 1];
+  AUTHMGR_PORT_LEARNING_t learning = AUTHMGR_PORT_LEARNING_DISABLE;
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  if (SUCCESS != authmgrNimIntfStateCheck (intIfNum))
+  {
+    return FAILURE;
+  }
+  if (nimGetIntfName (intIfNum, ALIASNAME, aliasName) != SUCCESS)
+  {   
+    LOGF (LOG_SEVERITY_ERROR,
+             "Unable to get alias for intf %s", authmgrIntfIfNameGet(intIfNum));
+    return FAILURE;
+  }
+
+  if (AUTHMGR_PORT_LEARNING_DISABLE == learning)
+  {
+    learning = (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].unLearnMacPolicy == TRUE) ?
+                AUTHMGR_PORT_LEARNING_CPU : learning;
+  }
+
+  if (pacCfgIntfLearningModeSet(aliasName, learning) != SUCCESS)
+  {  
+    LOGF (LOG_SEVERITY_ERROR,
+             "Unable to set Authmgr learning for port %s", aliasName);
+    return FAILURE;
+  }
+  return SUCCESS;
+}
+/*********************************************************************
+* @purpose function to change the learning of multi host mode
+*
+* @param intIfNum internal interface number
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortForceAuthLearningModify (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+  uchar8 aliasName[NIM_IF_ALIAS_SIZE + 1];
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  if (SUCCESS != authmgrNimIntfStateCheck (intIfNum))
+  {
+    return FAILURE;
+  }
+  if (nimGetIntfName (intIfNum, ALIASNAME, aliasName) != SUCCESS)
+  {   
+    LOGF (LOG_SEVERITY_ERROR,
+             "Unable to get alias for intf %s", authmgrIntfIfNameGet(intIfNum));
+    return FAILURE;
+  }
+  if (pacCfgIntfLearningModeSet(aliasName, AUTHMGR_PORT_LEARNING_ENABLE) != SUCCESS)
+  {  
+    LOGF (LOG_SEVERITY_ERROR,
+             "Unable to set Authmgr learning for port %s", aliasName);
+    return FAILURE;
+  }
+  return SUCCESS;
+}
+/*********************************************************************
+* @purpose function to check policy validation based on host mode
+*
+* @param intIfNum internal interface number
+* @param entry function pointer entry map 
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrHostCtrlLearninMapEntryGet (uint32 intIfNum,
+                                           authmgrHostCtrlLearnMap_t * entry)
+{
+  static authmgrHostCtrlLearnMap_t authmgrHostCtrlLearnMap[] = {
+    {AUTHMGR_MULTI_HOST_MODE, authmgrMultiHostHwLearningModify},
+    {AUTHMGR_MULTI_AUTH_MODE, authmgrMultAuthHwLearningModify},
+    {AUTHMGR_SINGLE_AUTH_MODE, authmgrSingleAuthHwLearningModify},
+  };
+  uint32 i = 0;
+  authmgrPortCfg_t *pCfg;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  for (i = 0;
+       i <
+       (sizeof (authmgrHostCtrlLearnMap) / sizeof (authmgrHostCtrlLearnMap_t));
+       i++)
+  {
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode ==
+        authmgrHostCtrlLearnMap[i].hostMode)
+    {
+      *entry = authmgrHostCtrlLearnMap[i];
+      return SUCCESS;
+    }
+  }
+  return FAILURE;
+}
+/*********************************************************************
+* @purpose function to change the learning of multi host mode
+*
+* @param intIfNum internal interface number
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortAutoLearningModify (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+ RC_t rc = SUCCESS;
+  authmgrHostCtrlLearnMap_t entry;
+  memset (&entry, 0, sizeof (authmgrHostCtrlLearnMap_t));
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  if (SUCCESS != authmgrNimIntfStateCheck (intIfNum))
+  {
+    return FAILURE;
+  }
+  /* get the host mode map entry */
+  if (SUCCESS != authmgrHostCtrlLearninMapEntryGet (intIfNum, &entry))
+  {
+    return FAILURE;
+  }
+  if (NULLPTR != entry.learnFn)
+  {
+    rc = entry.learnFn (intIfNum);
+  }
+  return rc;
+}
+/*********************************************************************
+* @purpose function to change the learning of multi host mode
+*
+* @param intIfNum internal interface number
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortForceUnauthLearningModify (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+  uchar8 aliasName[NIM_IF_ALIAS_SIZE + 1];
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  if (SUCCESS != authmgrNimIntfStateCheck (intIfNum))
+  {
+    return FAILURE;
+  }
+  if (nimGetIntfName (intIfNum, ALIASNAME, aliasName) != SUCCESS)
+  {   
+    LOGF (LOG_SEVERITY_ERROR,
+             "Unable to get alias for intf %d", intIfNum);
+    return FAILURE;
+  }
+  if (pacCfgIntfLearningModeSet(aliasName, AUTHMGR_PORT_LEARNING_DISABLE) != SUCCESS)
+  {  
+    LOGF (LOG_SEVERITY_ERROR,
+             "Unable to set Authmgr learning for port %s", aliasName);
+    return FAILURE;
+  }
+  return SUCCESS;
+}
+/*********************************************************************
+* @purpose function to check policy validation based on host mode
+*
+* @param intIfNum internal interface number
+* @param entry function pointer entry map 
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortCtrlLearninMapEntryGet (uint32 intIfNum,
+                                           authmgrPortCtrlLearnMap_t * entry)
+{
+  static authmgrPortCtrlLearnMap_t authmgrPortCtrlLearnMap[] = {
+    {AUTHMGR_PORT_AUTO, authmgrPortAutoLearningModify},
+    {AUTHMGR_PORT_FORCE_UNAUTHORIZED, authmgrPortForceUnauthLearningModify},
+    {AUTHMGR_PORT_FORCE_AUTHORIZED, authmgrPortForceAuthLearningModify}
+  };
+  uint32 i = 0;
+  authmgrPortCfg_t *pCfg;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  
+  for (i = 0;
+       i <
+       (sizeof (authmgrPortCtrlLearnMap) / sizeof (authmgrPortCtrlLearnMap_t));
+       i++)
+  {
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode ==
+        authmgrPortCtrlLearnMap[i].portControlMode)
+    {
+      *entry = authmgrPortCtrlLearnMap[i];
+      return SUCCESS;
+    }
+  }
+  return FAILURE;
+}
+/*********************************************************************
+* @purpose function to change the learning of an interface
+*
+* @param intIfNum internal interface number
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortLearningModify (uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+ RC_t rc = SUCCESS;
+  authmgrPortCtrlLearnMap_t entry;
+  memset (&entry, 0, sizeof (authmgrPortCtrlLearnMap_t));
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  if (SUCCESS != authmgrNimIntfStateCheck (intIfNum))
+  {
+    return FAILURE;
+  }
+  /* get the host mode map entry */
+  if (SUCCESS !=
+      authmgrPortCtrlLearninMapEntryGet (intIfNum, &entry))
+  {
+    return FAILURE;
+  }
+  if (NULLPTR != entry.learnFn)
+  {
+    rc = entry.learnFn (intIfNum);
+  }
+  return rc;
+}
+/*********************************************************************
+* @purpose function to check policy can be removed on based on host mode
+*
+* @param    intIfNum   @b{(input))  internal interface number
+* @param    valid  @b{(input)) TRUE if allowed. 
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrViolationPolicyUnInstallAfterAuthValidCheck (uint32 intIfNum, BOOL * valid)
+{
+  authmgrPortCfg_t *pCfg;
+ RC_t rc = SUCCESS;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  switch (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode)
+  {
+  case AUTHMGR_MULTI_HOST_MODE:
+    *valid = TRUE;
+    break;
+  default:
+    *valid = FALSE;
+  }
+  return rc;
+}
+/*********************************************************************
+* @purpose function to check unlearn mac address violation policy validation
+*
+* @param    intIfNum   @b{(input))  internal interface number
+* @param    valid  @b{(input)) TRUE if allowed. 
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrHostViolationPolicyValidCheck (uint32 intIfNum, BOOL * valid)
+{
+  authmgrPortCfg_t *pCfg;
+  uint32 i = 0;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  if (AUTHMGR_MULTI_HOST_MODE != authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode)
+  {
+    return FAILURE;
+  }
+  for (i = 0; i < AUTHMGR_METHOD_MAX; i++)
+  {
+    if (AUTHMGR_METHOD_MAB == 
+        authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[i])
+    {
+      *valid = TRUE;
+      return SUCCESS;
+    }
+  }
+  *valid = FALSE;
+  return SUCCESS;
+}
+/*********************************************************************
+* @purpose function to check unlearn mac address violation policy validation
+*
+* @param    intIfNum   @b{(input))  internal interface number
+* @param    valid  @b{(input)) TRUE if allowed. 
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrViolationPolicyValidCheck (uint32 intIfNum, BOOL * valid)
+{
+  authmgrPortCfg_t *pCfg;
+ RC_t rc = SUCCESS;
+  BOOL allowed = FALSE;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  switch (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].hostMode)
+  {
+  case AUTHMGR_SINGLE_AUTH_MODE:
+  case AUTHMGR_MULTI_AUTH_MODE:
+    *valid = TRUE;
+    break;
+  case AUTHMGR_MULTI_HOST_MODE:
+    if (0 == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount)
+	{
+	  if (SUCCESS == authmgrHostViolationPolicyValidCheck(intIfNum, &allowed))
+	  {
+		if (allowed)
+		{
+		  *valid = TRUE;
+		}
+		else
+		{
+		  *valid = FALSE;
+		}
+	  }
+	  else
+	  {
+		return FAILURE;
+	  }
+	}
+    else
+    {
+      *valid = FALSE;
+    }
+    break;
+  default:
+    rc = FAILURE;
+    *valid = FALSE;
+  }
+  return rc;
+}
+/*********************************************************************
+* @purpose function to apply policy validation based on host mode
+*
+* @param    intIfNum   @b{(input))  intIfNum
+*
+* @returns  SUCCESS
+* @returns  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrViolationPolicyApply (uint32 intIfNum)
+{
+  BOOL apply = FALSE;
+  authmgrPortCfg_t *pCfg;
+ RC_t rc = SUCCESS;
+  AUTHMGR_PORT_VIOLATION_CALLBACK_t mode = AUTHMGR_PORT_VIOLATION_CALLBACK_DISABLE;
+  char8 aliasName[NIM_IF_ALIAS_SIZE + 1];
+
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  if (SUCCESS != authmgrNimIntfStateCheck (intIfNum))
+  {
+    return FAILURE;
+  }
+  if (AUTHMGR_PORT_AUTO ==
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode)
+  {
+    if (SUCCESS != authmgrViolationPolicyValidCheck (intIfNum, &apply))
+    {
+      return FAILURE;
+    }
+  }
+  else
+  {
+    apply = FALSE;
+  }
+  if (apply)
+  {
+    mode = AUTHMGR_PORT_VIOLATION_CALLBACK_ENABLE;
+  }
+
+  fpGetHostIntfName(intIfNum, aliasName);
+
+  pacCreateDeleteSocket(aliasName, (mode == AUTHMGR_PORT_VIOLATION_CALLBACK_ENABLE) ? TRUE : FALSE);
+
+  /* apply the policy */
+  rc = authmgrIhPhyPortViolationCallbackSet (intIfNum, mode);
+  return rc;
+}
+
+/*********************************************************************
+* @purpose set the port settings when auth mgr is not enabled 
+*
+* @param intIfNum internal interface number
+* @return SUCCESS or FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPhysicalPortStatusOpenSet (uint32 intIfNum)
+{
+  INTF_STATES_t state;
+  authmgrPortCfg_t *pCfg;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  state = nimGetIntfState (intIfNum);
+  if ((state != INTF_ATTACHED)
+      && (state != INTF_ATTACHING) && (state != INTF_DETACHING))
+  {
+    return FAILURE;
+  }
+  /* disable unauth  mac violation policy */
+  authmgrIhPhyPortViolationCallbackSet(intIfNum, AUTHMGR_PORT_VIOLATION_CALLBACK_DISABLE); 
+  /* Enable learning */
+  authmgrPortForceAuthLearningModify(intIfNum);
+  authmgrTxCannedSuccess(intIfNum, AUTHMGR_PHYSICAL_PORT);
+  return SUCCESS;
+}
+/*********************************************************************
+* @purpose set the port settings when auth mgr is not enabled and blocked 
+*
+* @param intIfNum internal interface number
+* @return SUCCESS or FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPhysicalPortStatusBlockSet (uint32 intIfNum)
+{
+  INTF_STATES_t state;
+  authmgrPortCfg_t *pCfg;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  state = nimGetIntfState (intIfNum);
+  if ((state != INTF_ATTACHED)
+      && (state != INTF_ATTACHING) && (state != INTF_DETACHING))
+  {
+    return FAILURE;
+  }
+  /* disable unauth  mac violation policy */
+  authmgrIhPhyPortViolationCallbackSet(intIfNum, AUTHMGR_PORT_VIOLATION_CALLBACK_DISABLE); 
+  /* Disable learning */
+  authmgrPortForceUnauthLearningModify(intIfNum);
+  authmgrTxCannedFail(intIfNum, AUTHMGR_PHYSICAL_PORT);
+  return SUCCESS;
+}
+/*********************************************************************
+* @purpose set the port settings when auth mgr is not enabled 
+*
+* @param intIfNum internal interface number
+* @return SUCCESS or FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPhysicalPortAccessSet (uint32 intIfNum)
+{
+  INTF_STATES_t state;
+  authmgrPortCfg_t *pCfg;
+  BOOL status = TRUE;
+ RC_t rc = SUCCESS;
+  uint32 portLinkState = 0, adminState = 0;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) != TRUE)
+  {
+    return FAILURE;
+  }
+  state = nimGetIntfState (intIfNum);
+  if ((state != INTF_ATTACHED)
+      && (state != INTF_ATTACHING) && (state != INTF_DETACHING))
+  {
+    return FAILURE;
+  }
+  /* Link state */
+  rc = nimGetIntfLinkState (intIfNum, &portLinkState);
+  if (rc != SUCCESS)
+  {
+    status = FALSE;
+  }
+  rc = nimGetIntfAdminState (intIfNum, &adminState);
+  if (rc != SUCCESS)
+  {
+    status = FALSE;
+  }
+  if ((UP == portLinkState) &&
+      (ENABLE == adminState) &&
+      (status))
+  {
+    authmgrPhysicalPortStatusOpenSet(intIfNum);
+  }
+  else
+  {
+    authmgrPhysicalPortStatusBlockSet(intIfNum);
+  }
+  return SUCCESS;
+}
+
+RC_t authmgrIsMethodPresentInList(AUTHMGR_METHOD_t method, 
+                                     AUTHMGR_METHOD_t *inPut,
+                                     uint32 length)
+{
+  uint32 i = 0;
+  AUTHMGR_IF_NULLPTR_RETURN_LOG(inPut);
+  
+  if (length < AUTHMGR_METHOD_MAX)
+  {
+   /* check not to read/compare some one else's memory */
+    return FAILURE;
+  }
+  for (i = 0; i < AUTHMGR_METHOD_MAX; i++)
+  {
+    if (method == *inPut)
+    {
+      return SUCCESS;
+    }
+    inPut++;
+  }
+  return FAILURE;
+}
+/*********************************************************************
+* @purpose  Get the physical port for the logical interface
+*
+* @param    intIfNum  @b{(input))  internal interface number
+*
+* @returns  end index for specified interface in authmgr logical
+*           interface list
+*
+* @comments
+*
+* @end
+*********************************************************************/
+uint32 authmgrPhysPortGet(uint32 lIntIfNum)
+{
+  uint32 physPort;
+  AUTHMGR_PORT_GET(physPort, lIntIfNum);
+  return physPort;
+}
+/*********************************************************************
+* @purpose  Get the interface name for the  given interface
+*
+* @param    intIfNum  @b{(input))  internal interface number
+*
+* @returns  Name of interface for Valid authmgr/nim interface,  
+*           "UnKnown" for invalid interface
+*
+* @comments
+*
+* @end
+*********************************************************************/
+char8 * authmgrIntfIfNameGet(uint32 intIfNum)
+{
+  static  char8 ifName[NIM_IF_ALIAS_SIZE + 1]; 
+
+  memset (&ifName, '\0', sizeof (ifName));
+  if ((TRUE != (authmgrIsValidIntf(intIfNum))) ||
+      (SUCCESS != nimGetIntfName (intIfNum, ALIASNAME, ifName)))
+  {
+    LOGF (LOG_SEVERITY_INFO,
+                   "Unable to get if name for intf %d", intIfNum);
+    osapiStrncpySafe(ifName, "Unknown", strlen("Unknown")+1);
+  }
+  return ifName; 
+}
+
+/*********************************************************************
+* @purpose  validate the priority precedence of two methods 
+*
+* @param    intIfNum  @b{(input))  internal interface number
+* @param    method1  @b{(input))   authentication method 
+* @param    method2  @b{(input))   authentication method 
+*
+* @returns  SUCCESS if method 2 is of higher priority than method1 
+* @returns  FAILURE  
+*
+* @comments
+*
+* @end
+*********************************************************************/
+uint32 authmgrPriorityPrecedenceValidate(uint32 intIfNum, 
+                                            AUTHMGR_METHOD_t method1, 
+                                            AUTHMGR_METHOD_t method2)
+{
+  uint32 j, i;
+  BOOL exists = FALSE;
+  if (authmgrIsValidIntf (intIfNum) != TRUE)
+  {
+    return FAILURE;
+  }
+  if ((AUTHMGR_METHOD_NONE == method1) &&
+      (AUTHMGR_METHOD_NONE == method2))
+  {
+    return FAILURE;
+  }
+  /* check first if the new method is in the enabled order */
+  j = 0;
+  for (j = AUTHMGR_METHOD_MIN; j < AUTHMGR_METHOD_MAX; j++)
+  {
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[j] ==
+        method2)
+    {
+      exists = TRUE;
+    }
+  }
+  if (FALSE == exists)
+  {
+    return FAILURE;
+  }
+  j = 0;
+  for (j = AUTHMGR_METHOD_MIN; j < AUTHMGR_METHOD_MAX; j++)
+  {
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[j] ==
+        method1)
+    {
+      for (i = 0; i < j; i++)
+      {
+        if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[i] ==
+            method2)
+        {
+          return SUCCESS;
+        }
+      }
+    }
+  }
+  return FAILURE;
+}
+
+
+
diff --git a/src/sonic-pac/authmgr/protocol/auth_mgr_vlan.c b/src/sonic-pac/authmgr/protocol/auth_mgr_vlan.c
new file mode 100755
index 00000000000..952f1bbb752
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/auth_mgr_vlan.c
@@ -0,0 +1,822 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_exports.h"
+#include "auth_mgr_include.h"
+#include "auth_mgr_client.h"
+#include "auth_mgr_timer.h"
+#include "auth_mgr_struct.h"
+#include "auth_mgr_vlan_db.h"
+
+extern authmgrCB_t *authmgrCB;
+extern authMgrVlanDbData_t *authmgrVlanCfgDb; /* Vlan configured state cache. */ 
+
+
+/*********************************************************************
+* @purpose  check if the port participation can be added for a vlan
+*
+* @param    physPort    @b{(input))  Port
+* @param    vlanId      @b{(input)) vlan Id
+*
+* @returns   SUCCESS/ FAILRE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanPortParticipationValidate (uint32 physPort, uint32 vlanId)
+{
+  uint32 cnt = 0, i = 0;
+  BOOL valid = FALSE;
+  authmgrLogicalPortInfo_t *logicalPortInfo = NULLPTR;
+
+  if ( AUTHMGR_PORT_AUTO ==
+      authmgrCB->globalInfo->authmgrPortInfo[physPort].portControlMode)
+  {
+    i = AUTHMGR_LOGICAL_PORT_ITERATE;
+    while (( NULLPTR !=
+          (logicalPortInfo =
+           authmgrLogicalPortInfoGetNextNode (physPort, &i))
+          && (0 != logicalPortInfo->key.keyNum)))
+    {
+      if (AUTHMGR_PORT_STATUS_AUTHORIZED == logicalPortInfo->client.logicalPortStatus)
+      {
+        cnt++;
+        if (TRUE == logicalPortInfo->protocol.reauth)
+        {
+          valid = ((cnt == 1) ? TRUE : FALSE);
+        }
+      }
+    }
+
+    if (valid)
+      return SUCCESS;
+
+    if ((0 != authmgrCB->globalInfo->authmgrPortInfo[physPort].authVlan) &&
+        (vlanId != authmgrCB->globalInfo->authmgrPortInfo[physPort].authVlan))
+    {
+      AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+          "Received Vlan %d is not same as Port %d auth VlanId %d. \n",
+          vlanId, physPort, authmgrCB->globalInfo->authmgrPortInfo[physPort].authVlan);
+      return  FAILURE;
+    }
+  }
+  return  SUCCESS;
+}
+/*********************************************************************
+* @purpose  Processes  Vlan PVID Change Notify event.
+*
+* @param    intIfNum   @b{(input)} internal interface number
+* @param    vlanId     @b{(input)} VlanId (new PVID on the port)
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanPVIDChangeEventProcess (uint32 physPort, uint32 vlanId)
+{
+  RC_t rc =  FAILURE;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  uint32 i = 0;
+   BOOL valid =  FALSE;
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, physPort,
+                       "%s:PVID for port -%s changed to Vlan %d\n",
+                       __FUNCTION__, authmgrIntfIfNameGet(physPort), vlanId);
+  if (authmgrCB->globalInfo->authmgrPortInfo[physPort].portControlMode ==
+       AUTHMGR_PORT_AUTO)
+  {
+    /* Nothing to be done as port pvid change is also triggered by a client
+       being authorized
+       on the port in other host modes, where authmgr can aquire the port.
+       The Admin cannot change the operational pvid of the port
+       as it is acquired by authmgr. */
+    /* check if the host policy is valid for the current host mode */
+    if (( SUCCESS ==
+         authmgrHostIsDynamicNodeAllocCheck (authmgrCB->globalInfo->
+                                             authmgrPortInfo[physPort].hostMode,
+                                             &valid)) && ( TRUE == valid))
+    {
+      i = AUTHMGR_LOGICAL_PORT_ITERATE;
+      while (( NULLPTR !=
+              (logicalPortInfo =
+               authmgrLogicalPortInfoGetNextNode (physPort, &i))
+              && (0 != logicalPortInfo->key.keyNum)))
+      {
+        if ( AUTHMGR_PORT_STATUS_AUTHORIZED == logicalPortInfo->client.logicalPortStatus) 
+        {
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+                               "pvid for port %s changed. logicalPort %d was authenticated on previous "
+                               "pvid %d. vlan type %s. Cleaning up the client \n",
+                               authmgrIntfIfNameGet(physPort), i,logicalPortInfo->client.vlanId,
+                               authmgrVlanTypeStringGet (logicalPortInfo->
+                                                         client.vlanType));
+          /* invoke the cleanup */
+          rc = authmgrClientInfoCleanup (logicalPortInfo);
+          if ( SUCCESS != rc)
+          {
+            AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+                                 "client cleanup for logicalPort %d is NOT successful\n",
+                                 i);
+          }
+        }
+      }
+    }
+  }
+  return rc;
+}
+/*********************************************************************
+* @purpose  Set vlan port participation from AUTHMGR
+*
+* @param    physPort    @b{(input)) interface number
+* @param    vlanId      @b{(input)) vlan Id
+*
+* @returns   SUCCESS/ FAILURE/ ALREADY_CONFIGURED
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanParticipationSet (uint32 physPort, uint32 vlanId,  BOOL isSelfAcquired)
+{
+ RC_t rc =  FAILURE;
+  uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1] = {'\0'};
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+	  "\nSetting Vlan Membership for port -%s and Vlan %d\n",
+	  authmgrIntfIfNameGet(physPort), vlanId);
+
+  if (nimGetIntfName(physPort,  ALIASNAME, ifName) ==  SUCCESS)
+  {
+	if ( AUTHMGR_MULTI_HOST_MODE ==
+		authmgrCB->globalInfo->authmgrPortInfo[physPort].hostMode)
+	{
+	  rc = pacCfgVlanMemberRemove(1, ifName);
+	}
+	rc = pacCfgVlanMemberAdd(vlanId, ifName,  DOT1Q_MEMBER_UNTAGGED);
+  }
+  else
+  {
+	LOGF( LOG_SEVERITY_ERROR,
+		"Unable to get aliasName for interface %s",
+		authmgrIntfIfNameGet(physPort));
+  }
+  if ( SUCCESS == rc)
+  {
+    authmgrCB->globalInfo->authmgrPortInfo[physPort].authVlan = vlanId;
+	LOGF ( LOG_SEVERITY_DEBUG,
+		"Auth Manager - set Vlan Membership (%d) for port (%s).", 
+		vlanId, authmgrIntfIfNameGet(physPort)); 
+  }
+  else 
+  {
+	LOGF ( LOG_SEVERITY_DEBUG,
+		"Auth Manager - unable to set Vlan Membership (%d) for port (%s).",
+		vlanId, authmgrIntfIfNameGet(physPort)); 
+	AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+		"\nUnable to Set Vlan Membership for port -%s and Vlan %d\n",
+		authmgrIntfIfNameGet(physPort), vlanId);
+  }
+  return rc;
+}
+/*********************************************************************
+* @purpose  Reset vlan participation for the  Interface
+*
+* @param    physPort    @b{(input)) interface number
+* @param    vlanId      @b{(input)) vlan Id
+*
+* @returns   SUCCESS/ FAILRE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+static RC_t authmgrVlanParticipationReset (uint32 physPort,
+                                              uint32 vlanId)
+{
+  RC_t rc =  SUCCESS;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  if (nimGetIntfName(physPort,  ALIASNAME, ifName) ==  SUCCESS)
+  {
+    /* Invoke API to set port PVID */
+    rc = pacCfgVlanMemberRemove(vlanId, ifName);
+    authmgrCB->globalInfo->authmgrPortInfo[physPort].authVlan = 0;
+  }
+  else
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+            "Unable to get aliasName for interface %s",
+            authmgrIntfIfNameGet(physPort));
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  check if the port participation can be removed for a vlan
+*
+* @param    physPort    @b{(input))  Port
+* @param    vlanId      @b{(input)) vlan Id
+*
+* @returns   SUCCESS/ FAILRE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanPortDeletionValidate (uint32 physPort, uint32 vlanId)
+{
+  uint32 i = 0;
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  if ( AUTHMGR_PORT_AUTO ==
+      authmgrCB->globalInfo->authmgrPortInfo[physPort].portControlMode)
+  {
+	i = AUTHMGR_LOGICAL_PORT_ITERATE;
+	while (( NULLPTR !=
+		  (logicalPortInfo =
+		   authmgrLogicalPortInfoGetNextNode (physPort, &i))
+		  && (0 != logicalPortInfo->key.keyNum)))
+	{
+	  if (vlanId == logicalPortInfo->client.vlanId)
+	  {
+		AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, physPort,
+			"logicalPort %d is still a member of vlanId %d. \n",
+			i, logicalPortInfo->client.vlanId);
+		return  FAILURE;
+	  }
+	}
+  }
+  return  SUCCESS;
+}
+/*********************************************************************
+* @purpose  check if the port can be aquired by authmgr
+*
+* @param    physPort    @b{(input))  Port
+* @param    vlanId      @b{(input)) vlan Id
+*
+* @returns   SUCCESS/ FAILRE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanPortAcquireCheck (uint32 physPort)
+{
+   BOOL valid =  FALSE;
+  if ( AUTHMGR_PORT_AUTO ==
+      authmgrCB->globalInfo->authmgrPortInfo[physPort].portControlMode)
+  {
+    /* check if the host policy is valid for the current host mode */
+    if (( SUCCESS ==
+         authmgrHostIsDynamicNodeAllocCheck (authmgrCB->globalInfo->
+                                             authmgrPortInfo[physPort].hostMode,
+                                             &valid)) && ( FALSE == valid))
+    {
+      return  SUCCESS;
+    }
+  }
+  return  FAILURE;
+}
+/*********************************************************************
+* @purpose Set  authmgr authenticated client in specified VLAN
+*
+* @param    logicalPortInfo  @b{(input))  Logical Port Info node
+* @param    reason      @b{(input)) Reason for the assignment
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientVlanInfoSet (authmgrLogicalPortInfo_t * logicalPortInfo,
+                                  uint32 vlanId)
+{
+  uint32 physPort = 0;
+  RC_t rc =  SUCCESS;
+   uchar8        ifName[ NIM_IF_ALIAS_SIZE + 1];
+  AUTHMGR_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+  AUTHMGR_PORT_GET (physPort, logicalPortInfo->key.keyNum);
+
+    /*
+       simply set the port membership */
+    /* set the port as vlan member */
+    rc = authmgrVlanParticipationSet (physPort, vlanId,  FALSE);
+    if ((rc !=  SUCCESS) && (rc !=  ALREADY_CONFIGURED))
+    {
+       LOGF( LOG_SEVERITY_ERROR,
+              "VLAN participation set unsuccessful for port %s vlan %d", 
+              authmgrIntfIfNameGet(physPort), vlanId);
+      return  FAILURE;
+    }
+
+    if ( AUTHMGR_MULTI_HOST_MODE ==
+          authmgrCB->globalInfo->authmgrPortInfo[physPort].hostMode)
+    {
+      if (nimGetIntfName(physPort,  ALIASNAME, ifName) ==  SUCCESS)
+      {
+        /* Invoke API to set port PVID */
+        rc = authmgrPortPvidSet(physPort, vlanId);
+      }
+      else
+      {
+         LOGF( LOG_SEVERITY_ERROR,
+                "Unable to get aliasName for interface %s",
+                authmgrIntfIfNameGet(physPort));
+      }
+    }
+
+  if ( ALREADY_CONFIGURED == rc) 
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, physPort,
+        "\n%s:vlan %u membership already configured on port %s\n",
+        __FUNCTION__, vlanId, authmgrIntfIfNameGet(physPort));
+    rc =  SUCCESS;
+  }
+  return rc;
+}
+/*********************************************************************
+* @purpose Set  authmgr authenticated client in specified VLAN
+*
+* @param    logicalPortInfo  @b{(input))  Logical Port Info node
+* @param    reason      @b{(input)) Reason for the assignment
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientVlanInfoReset (uint32 physPort, uint32 vlanId)
+{
+   uchar8        ifName[ NIM_IF_ALIAS_SIZE + 1];
+  RC_t rc =  SUCCESS;
+
+  /* set the port as vlan member */
+  if ( SUCCESS != authmgrVlanParticipationReset (physPort, vlanId))
+  {
+    return  FAILURE;
+  }
+
+  if ( AUTHMGR_MULTI_HOST_MODE ==
+        authmgrCB->globalInfo->authmgrPortInfo[physPort].hostMode)
+  {
+    if (nimGetIntfName(physPort,  ALIASNAME, ifName) ==  SUCCESS)
+    {
+      /* Invoke API to set port PVID */
+      rc = authmgrPortPvidSet(physPort, 1);
+      if (rc !=  SUCCESS)
+      {
+         LOGF ( LOG_SEVERITY_ERROR,
+                 "Failed to set PVID of interface %s to default VLAN ID.\r\n", ifName);
+      }
+    }
+  }
+
+  return  SUCCESS;
+}
+/*********************************************************************
+* @purpose function to get the type of the vlan
+*
+* @param type vlan type
+* @param entry associated entry to the given vlan type
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanTypeInfoGet (authmgrVlanType_t type,
+                                authmgrVlanInfoEntry_t * entry)
+{
+  uint32 i = 0;
+  static authmgrVlanInfoEntry_t authmgrVlanInfoEntryTable[] = {
+    {AUTHMGR_VLAN_RADIUS,  AUTHMGR_RADIUS_ASSIGNED_VLAN},
+    {AUTHMGR_VLAN_DEFAULT,  AUTHMGR_DEFAULT_ASSIGNED_VLAN},
+    {AUTHMGR_VLAN_UNASSIGNED,  AUTHMGR_NOT_ASSIGNED}
+  };
+  for (i = 0;
+       i <
+       (sizeof (authmgrVlanInfoEntryTable) / sizeof (authmgrVlanInfoEntry_t));
+       i++)
+  {
+    if (type == authmgrVlanInfoEntryTable[i].type)
+    {
+      *entry = authmgrVlanInfoEntryTable[i];
+      return  SUCCESS;
+    }
+  }
+  return  FAILURE;
+}
+/*********************************************************************
+* @purpose  Apply authmgr vlan assignment to a specific logical interface
+*
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    vlanId     @b{(input)) vlan id
+* @param    tagging    @b{(input)) Port VLAN tag mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanPortAddProcess (uint32 intIfNum, uint32 vlanId,
+                                   dot1qTaggingMode_t tagging)
+{
+  authmgrPortCfg_t *pCfg;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  /* Save notification in local cache */
+  if ( SUCCESS != authmgrVlanPortAddLocalUpdate(vlanId, intIfNum, tagging))
+  {
+       LOGF ( LOG_SEVERITY_WARNING,
+               "Unable to save VLAN port add notification for vlan %d intfIfNum %s",
+               vlanId, authmgrIntfIfNameGet(intIfNum));
+  }
+
+  if ( AUTHMGR_PORT_AUTO !=
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode)
+  {
+    return  SUCCESS;
+  }
+
+  
+
+  return  SUCCESS;
+}
+/*********************************************************************
+* @purpose  function to process vlan add event 
+*
+* @param    vlanId     @b{(input)) vlan id
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This call should happen only in mac-based mode.
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanAddProcess (uint32 vlanId)
+{
+  /* Save notification in local cache */
+  if ( SUCCESS != authmgrVlanAddLocalUpdate(vlanId))
+  {
+       LOGF ( LOG_SEVERITY_WARNING,
+               "Unable to save VLAN add notification for vlan %d.", vlanId);
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  function to process vlan delete event 
+*
+* @param    vlanId     @b{(input)) vlan id
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This call should happen only in mac-based mode.
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanDeleteProcess (uint32 vlanId)
+{
+  RC_t nimRc =  SUCCESS;
+  uint32 intIfNum;
+  dot1qTaggingMode_t tagging =  DOT1Q_MEMBER_UNTAGGED;
+  
+  nimRc = authmgrFirstValidIntfNumber (&intIfNum);
+  while (nimRc ==  SUCCESS)
+  {
+    /* delete the clients on this port for the vlan */
+    authmgrVlanPortDeleteProcess (intIfNum, vlanId, tagging);
+    nimRc = authmgrNextValidIntf (intIfNum, &intIfNum);
+  }
+
+  /* Save notification in local cache */
+  if ( SUCCESS != authmgrVlanDeleteLocalUpdate(vlanId))
+  {
+       LOGF ( LOG_SEVERITY_WARNING,
+               "Unable to save VLAN delete notification for vlan %d.", vlanId);
+  }
+
+  return  SUCCESS;
+}
+/*********************************************
+ * @purpose  function to process vlan port delete event 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param    vlanId @b{(input)} vlan id
+ * @param    tagging    @b{(input)) Port VLAN tag mode
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanPortDeleteProcess (uint32 intIfNum, uint32 vlanId,
+                                      dot1qTaggingMode_t tagging)
+{
+  RC_t rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 lIntIfNum, tmpCount = 0;
+  authmgrPortCfg_t *pCfg;
+  if (authmgrIntfIsConfigurable (intIfNum, &pCfg) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  /* Save notification in local cache */
+  if ( SUCCESS != authmgrVlanPortDeleteLocalUpdate(vlanId, intIfNum, tagging))
+  {
+       LOGF ( LOG_SEVERITY_WARNING,
+               "Unable to save VLAN port delete notification for vlan %d on port %s",
+               vlanId, authmgrIntfIfNameGet(intIfNum));
+  }
+
+  if ( AUTHMGR_PORT_AUTO !=
+      authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode)
+  {
+    return  SUCCESS;
+  }
+
+  if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode ==
+       AUTHMGR_PORT_AUTO)
+  {
+    lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+    while ((logicalPortInfo =
+            authmgrLogicalPortInfoGetNextNode (intIfNum,
+                                               &lIntIfNum)) !=  NULLPTR)
+    {
+      if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+          logicalPortInfo->client.logicalPortStatus)
+      {
+        /* clean up the client */
+        if (vlanId == logicalPortInfo->client.vlanId)
+        {
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                               "port %s is deleted from vlan %d. logicalPort %d is authenticated on same vlan. vlan type %s"
+                               "Cleaning up the client \n",
+                               authmgrIntfIfNameGet(intIfNum), vlanId, lIntIfNum,
+                               authmgrVlanTypeStringGet (logicalPortInfo->
+                                                         client.vlanType));
+          /* invoke the cleanup */
+          rc = authmgrClientInfoCleanup (logicalPortInfo);
+          tmpCount++;
+          if ( SUCCESS != rc)
+          {
+            AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, intIfNum,
+                                 "client cleanup for logicalPort %d is NOT successful\n",
+                                 lIntIfNum);
+          }
+        }
+      }
+    }
+  }
+
+
+  return  SUCCESS;
+}
+
+/********************************************************************
+ * @purpose  function to process vlan configuration delete event 
+ *
+ * @param    vlanId @b{(input)} vlan id
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanConfDeleteProcess (uint32 vlanId)
+{
+  RC_t rc =  SUCCESS;
+  RC_t nimRc =  SUCCESS;
+  uint32 intIfNum;
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 lIntIfNum = 0;
+  
+  nimRc = authmgrFirstValidIntfNumber (&intIfNum);
+  while (nimRc ==  SUCCESS)
+  {
+    if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode ==
+         AUTHMGR_PORT_AUTO)
+    {
+      lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+      while ((logicalPortInfo =
+              authmgrLogicalPortInfoGetNextNode (intIfNum,
+                                                 &lIntIfNum)) !=  NULLPTR)
+      {
+        if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+            logicalPortInfo->client.logicalPortStatus)
+        {
+          /* clean up the client */
+          if (vlanId == logicalPortInfo->client.vlanId)
+          {
+            AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                                 "vlan %d is deleted. LogicalPort %d is authenticated on same vlan. vlan type %s"
+                                 "Cleaning up the client \n",
+                                 vlanId, lIntIfNum,
+                                 authmgrVlanTypeStringGet (logicalPortInfo->client.vlanType));
+            /* invoke the cleanup */
+            rc = authmgrClientInfoCleanup (logicalPortInfo);
+
+            if ( SUCCESS != rc)
+            {
+              AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, intIfNum,
+                                   "client cleanup for logicalPort %d is NOT successful\n",
+                                   lIntIfNum);
+            }
+          }
+        }
+      }
+    }
+    nimRc = authmgrNextValidIntf (intIfNum, &intIfNum);
+  }
+  return  SUCCESS;
+}
+
+/********************************************************************
+ * @purpose  function to process vlan port configuration delete event 
+ *
+ * @param    vlanId @b{(input)} vlan id
+ * @param    intIfNum @b{(input)} interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanConfPortDeleteProcess (uint32 intIfNum, uint32 vlanId)
+{
+  RC_t rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 lIntIfNum = 0;
+  
+  if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode ==
+       AUTHMGR_PORT_AUTO)
+  {
+    lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+    while ((logicalPortInfo =
+            authmgrLogicalPortInfoGetNextNode (intIfNum,
+                                               &lIntIfNum)) !=  NULLPTR)
+    {
+      if ( AUTHMGR_PORT_STATUS_AUTHORIZED ==
+          logicalPortInfo->client.logicalPortStatus)
+      {
+        /* clean up the client */
+        if ((vlanId == logicalPortInfo->client.vlanId) && ( TRUE == logicalPortInfo->client.vlanTypePortCfg))
+        {
+          AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                               "port %s is deleted from vlan %d. LogicalPort %d is authenticated on same vlan. vlan type %s"
+                               "Cleaning up the client \n",
+                               authmgrIntfIfNameGet(intIfNum), vlanId, lIntIfNum,
+                               authmgrVlanTypeStringGet (logicalPortInfo->client.vlanType));
+          /* invoke the cleanup */
+          rc = authmgrClientInfoCleanup (logicalPortInfo);
+
+          if ( SUCCESS != rc)
+          {
+            AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, intIfNum,
+                                 "client cleanup for logicalPort %d is NOT successful\n",
+                                 lIntIfNum);
+          }
+        }
+      }
+    }
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose function to parse vlan string and perform further actions.
+*
+* @param vlanString -- vlan string received
+* @param physPort -- interface number
+* @param vlanParams -- associated vlan params
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanStringParseValidate (const  char8 * vlanString,
+                                        authmgrVlanStringParams_t * vlanParams)
+{
+  uint32 vlanId = 0;
+  RC_t rc =  FAILURE;
+  /* process the string received and validate the
+     result for presense of VLAN */
+  if ( SUCCESS != authmgrRadiusServerVlanConversionHandle(vlanString,&vlanId))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, 0,
+                         "VLAN String [%s] parsing failure\n", vlanString);
+    return  ERROR;
+  }
+
+  /* If given vlan is already there */
+  rc = authmgrVlanCheckValid (vlanId);
+  if ( FAILURE == rc)
+  {
+     LOGF ( LOG_SEVERITY_WARNING,
+             "Invalid VLAN %d.", vlanId);
+    return  ERROR;
+  }
+  vlanParams->vlanId = vlanId;
+  return  SUCCESS;
+}
+/*********************************************************************
+* @purpose  Function to handle VLAN change of a particular type.
+*           This function essentially cleans up all clients authorized
+*           on a certain VLAN type.
+* 
+* @param    intIfNum   @b{(input)} internal interface number
+* @param    vlanType   @b{(input)} VLAN type
+*
+* @returns   SUCCESS
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanTypeModifyHandle(uint32 intIfNum, authmgrVlanType_t vlanType)
+{
+  uint32 lIntIfNum = 0;
+  authmgrLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  logicalPortInfo = authmgrLogicalPortInfoFirstGet (intIfNum, &lIntIfNum);
+  while ( NULLPTR != logicalPortInfo)
+  {
+    if (vlanType == logicalPortInfo->client.vlanType)
+    {
+      authmgrClientInfoCleanup (logicalPortInfo);
+    }
+    logicalPortInfo =
+      authmgrLogicalPortInfoGetNextNode (intIfNum, &lIntIfNum);
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose Set Port PVID
+*
+* @param    intIfNum  @b{(input)) interface
+* @param    pvid   @b{(input)) port default vlan id
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortPvidSet(uint32 intIfNum,  ushort16 pvid)
+{
+   enetMacAddr_t macAddr;
+   ushort16 oldPvid = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].pvid;
+
+  memset(&macAddr, 0, sizeof(macAddr));
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, intIfNum,
+                       "port %s, old pvid = %d, new pvid = %d.",
+                       authmgrIntfIfNameGet(intIfNum), 
+                       oldPvid, pvid);
+
+  if (oldPvid == pvid)
+  {
+    return  SUCCESS;
+  }
+
+  authmgrCB->globalInfo->authmgrPortInfo[intIfNum].pvid = pvid;
+  return  SUCCESS;
+}
+
diff --git a/src/sonic-pac/authmgr/protocol/auth_mgr_vlan_db.c b/src/sonic-pac/authmgr/protocol/auth_mgr_vlan_db.c
new file mode 100644
index 00000000000..3c548589b3b
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/auth_mgr_vlan_db.c
@@ -0,0 +1,582 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_exports.h"
+#include "auth_mgr_vlan_db.h"
+
+extern authMgrVlanDbData_t *authmgrVlanStateDb; /* Vlan operational state cache. */
+extern authMgrVlanDbData_t *authmgrVlanCfgDb; /* Vlan configured state cache. */ 
+ VLAN_MASK_t dynamicVlanList;   /* List of dynamic VLANs created by PAC. */
+
+/*********************************************************************
+* @purpose  Add newly created VLAN to database.
+*
+* @param    vlan @b{(input)) vlan to be added.
+*
+* @returns   SUCCESS If VLAN was added to DB successfully.
+* @returns   FAILURE Otherwise
+*
+* @comments Authmgr maintains an internal VLAN cache that mimics the
+*           current SONiC VLAN state. This is done to avoid reading the
+*           redis DB too many times.
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanAddLocalUpdate(uint32 vlan)
+{
+  RC_t rc =  FAILURE;
+
+  /* Validate the VLAN being added */
+  if ((vlan <   DOT1Q_MIN_VLAN_ID) || (vlan >  DOT1Q_MAX_VLAN_ID))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Invalid VLAN %d received.", vlan);
+    return rc;
+  }
+
+  /* Set bit corresponding to VLAN in VLAN DB */
+   VLAN_SETMASKBIT(authmgrVlanStateDb->vlanDb.vlanMask, vlan);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Update local VLAN DB with VLAN delete notification.
+*
+* @param    vlan @b{(input)) vlan to be removed.
+*
+* @returns   SUCCESS If VLAN was removed from DB successfully.
+* @returns   FAILURE Otherwise
+*
+* @comments Authmgr maintains an internal VLAN cache that mimics the
+*           current SONiC VLAN state. This is done to avoid reading the
+*           redis DB too many times.
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanDeleteLocalUpdate(uint32 vlan)
+{
+  RC_t rc =  FAILURE;
+
+  /* Validate the VLAN being deleted. */
+  if ((vlan <   DOT1Q_MIN_VLAN_ID) || (vlan >  DOT1Q_MAX_VLAN_ID))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Invalid VLAN %d received.", vlan);
+    return rc;
+  }
+
+  /* Clear bit corresponding to VLAN in VLAN DB. */
+   VLAN_CLRMASKBIT(authmgrVlanStateDb->vlanDb.vlanMask, vlan);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Update local VLAN DB with VLAN port add event.
+*
+* @param    vlan       @b{(input)) VLAN
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    tagging    @b{(input)) Port VLAN tag mode.
+*
+* @returns   SUCCESS If VLAN port add was handled successfully.
+* @returns   FAILURE Otherwise
+*
+* @comments Authmgr maintains an internal VLAN cache that mimics the
+*           current SONiC VLAN state. This is done to avoid reading the
+*           redis DB too many times.
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanPortAddLocalUpdate(uint32 vlan, uint32 intIfNum,
+                                      dot1qTaggingMode_t tagging)
+{
+  RC_t rc =  FAILURE;
+
+  /* Validate VLAN. */
+  if ((vlan <   DOT1Q_MIN_VLAN_ID) || (vlan >  DOT1Q_MAX_VLAN_ID))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Invalid VLAN %d received.", vlan);
+    return rc;
+  }
+
+  /* Check if VLAN exists. */
+  if (! VLAN_ISMASKBITSET(authmgrVlanStateDb->vlanDb.vlanMask, vlan))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, 0,
+                         "VLAN %d does not exist in cache. Continuing to update cache.", vlan);
+  }
+
+  /* Validate interface number. */
+  if ( SUCCESS != nimCheckIfNumber(intIfNum))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Interface number %s does not exist.",
+                              authmgrIntfIfNameGet(intIfNum));
+    return rc;
+  }
+
+  /* Set VLAN bitmask for port. */
+   VLAN_SETMASKBIT(authmgrVlanStateDb->portVlanDb[intIfNum].vlanMask, vlan);
+
+  /* Save tagging information for port */
+  if (tagging ==  DOT1Q_MEMBER_TAGGED)
+  {
+    /* Bit set = tagged, bit clear = untagged */
+     VLAN_SETMASKBIT(authmgrVlanStateDb->portVlanDb[intIfNum].tagging, vlan);
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Update local VLAN DB with VLAN port delete  event.
+*
+* @param    vlan       @b{(input)) VLAN
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    tagging    @b{(input)) Port VLAN tag mode.
+*
+* @returns   SUCCESS If VLAN port delete was handled successfully.
+* @returns   FAILURE Otherwise
+*
+* @comments Authmgr maintains an internal VLAN cache that mimics the
+*           current SONiC VLAN state. This is done to avoid reading the
+*           redis DB too many times.
+*
+*********************************************************************/
+RC_t authmgrVlanPortDeleteLocalUpdate(uint32 vlan, uint32 intIfNum,
+                                         dot1qTaggingMode_t tagging)
+{
+  RC_t rc =  FAILURE;
+
+  /* Validate VLAN. */
+  if ((vlan <   DOT1Q_MIN_VLAN_ID) || (vlan >  DOT1Q_MAX_VLAN_ID))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Invalid VLAN %d received.", vlan);
+    return rc;
+  }
+
+  /* Check if VLAN exists. */
+  if (! VLAN_ISMASKBITSET(authmgrVlanStateDb->vlanDb.vlanMask, vlan))
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_PORT_STATUS, 0,
+                         "VLAN %d does not exist in cache. Continuing to update cache.", vlan);
+  }
+
+  /* Validate interface number. */
+  if ( SUCCESS != nimCheckIfNumber(intIfNum))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Interface number %s does not exist.",
+                              authmgrIntfIfNameGet(intIfNum));
+    return rc;
+  }
+
+  /* Clear VLAN bitmask for port. */
+   VLAN_CLRMASKBIT(authmgrVlanStateDb->portVlanDb[intIfNum].vlanMask, vlan);
+
+  /* Clear tagging info for port. */
+   VLAN_CLRMASKBIT(authmgrVlanStateDb->portVlanDb[intIfNum].tagging, vlan);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  check if VLAN is valid
+ *
+ * @param    vlan      @b{(input)) vlan Id
+ *
+ * @returns   SUCCESS  If VLAN exists
+ * @returns   NOT_EXIST    If VLAN does not exist
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments On SONiC, authmgr maintains an internal VLAN data cache
+ *           that is a mirror of the STATE_DB.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanCheckValid(uint32 vlan)
+{
+  RC_t rc =  FAILURE;
+
+  /* Validate VLAN. */
+  if ((vlan <   DOT1Q_MIN_VLAN_ID) || (vlan >  DOT1Q_MAX_VLAN_ID))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Invalid VLAN %d received.", vlan);
+    return rc;
+  }
+
+  /* Check if VLAN is configured. */
+  if (! VLAN_ISMASKBITSET(authmgrVlanStateDb->vlanDb.vlanMask, vlan))
+  {
+    return  NOT_EXIST;
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  check if VLAN is static
+ *
+ * @param    vlan      @b{(input)) vlan Id
+ *
+ * @returns   SUCCESS  If VLAN exists
+ * @returns   NOT_EXIST    If VLAN does not exist
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments On SONiC, authmgr maintains an internal VLAN data cache
+ *           that is a mirror of the CONFIG_DB.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanCheckStatic(uint32 vlan)
+{
+  RC_t rc =  FAILURE;
+
+  /* Validate VLAN. */
+  if ((vlan <   DOT1Q_MIN_VLAN_ID) || (vlan >  DOT1Q_MAX_VLAN_ID))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Invalid VLAN %d received.", vlan);
+    return rc;
+  }
+
+  /* Check if VLAN is configured. */
+  if (! VLAN_ISMASKBITSET(authmgrVlanCfgDb->vlanDb.vlanMask, vlan))
+  {
+    return  NOT_EXIST;
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Get number of ports that are members of VLAN.
+ *
+ * @param    vlan      @b{(input)) vlan Id
+ * @param    numPorts  @b{(output)) Number of ports in VLAN.
+ *
+ * @returns   SUCCESS  If number of ports are returned successfully.
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments On SONiC, authmgr maintains an internal VLAN data cache
+ *           that is a mirror of the STATE_DB.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanEgressPortsGet(uint32 vlan, uint32 *numPorts)
+{
+  RC_t rc =  FAILURE;
+  int i = 0, ports = 0;
+
+  if (numPorts ==  NULLPTR)
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Invalid input parameter.");
+    return rc;
+  }
+
+  /* Validate VLAN. */
+  if ((vlan <   DOT1Q_MIN_VLAN_ID) || (vlan >  DOT1Q_MAX_VLAN_ID))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Invalid VLAN %d received.", vlan);
+    return rc;
+  }
+
+  for (i = 1; i <  AUTHMGR_INTF_MAX_COUNT; i++)
+  {
+    /* Check if port is member of VLAN */
+    if ( VLAN_ISMASKBITSET(authmgrVlanStateDb->portVlanDb[i].vlanMask, vlan))
+    {
+      ports++;
+    }
+  }
+
+  *numPorts = ports;
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Get the default VLAN of the port.
+ *
+ * @param    intIfNum      @b{(input)) Interface number
+ * @param    vlan  @b{(output)) default VLAN.
+ *
+ * @returns   SUCCESS  If default VLAN is returned successfully.
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments The default VLAN is the configured Access VLAN of the port.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortDefaultVlanGet(uint32 intIfNum, uint32 *vlan)
+{
+  RC_t rc =  FAILURE;
+  int i = 0;
+  authMgrVlanPortData_t *pCfg;
+
+  if (vlan ==  NULLPTR)
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Invalid input parameter.");
+    return rc;
+  }
+
+  *vlan = 0;
+
+  pCfg = &authmgrVlanCfgDb->portVlanDb[intIfNum];
+  if (pCfg ==  NULLPTR)
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                    "Null data for port config data %s.",
+                    authmgrIntfIfNameGet(intIfNum));
+    return rc;
+  }
+
+  for (i = 1; i <  DOT1Q_MAX_VLAN_ID; i++)
+  {
+    if ( VLAN_ISMASKBITSET(pCfg->vlanMask, i))
+    {
+      if (! VLAN_ISMASKBITSET(pCfg->tagging, i))
+      {
+        break;;  
+      }
+    }
+  }  
+
+  if (i !=  DOT1Q_MAX_VLAN_ID)
+  {
+    if ( SUCCESS == authmgrVlanCheckStatic(i))
+    {
+      *vlan = i;
+      rc =  SUCCESS;
+    }
+  }
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose  Acquire port for PAC by removing all VLAN config on port.
+ *
+ * @param    intIfNum    @b{(input)) Internal interface number of port.
+ *
+ * @returns   SUCCESS  If port is acquired successfully.
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments On SONiC, authmgr maintains a snapshot of CONFIG_DB data 
+ *           on PAC enabled ports.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanAcquirePort(uint32 intIfNum)
+{
+  RC_t rc =  FAILURE;
+  authMgrVlanPortData_t *pCfg;
+   char8 aliasName[ NIM_IF_ALIAS_SIZE + 1];
+
+  /* Validate interface number. */
+  if ( SUCCESS != nimCheckIfNumber(intIfNum))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Interface number %s does not exist.", 
+                              authmgrIntfIfNameGet(intIfNum));
+    return rc;
+  }
+
+  /* Vlan config from CONFIG_DB is cached locally and used.
+   * Get port config.
+   */
+  pCfg = &authmgrVlanCfgDb->portVlanDb[intIfNum];
+  if (pCfg ==  NULLPTR)
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                    "Null data for port config data %s.",
+                    authmgrIntfIfNameGet(intIfNum));
+    return rc;
+  }
+
+  if (nimGetIntfName (intIfNum,  ALIASNAME, aliasName) !=  SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_ERROR,
+             "Unable to get alias for intf %s",
+             authmgrIntfIfNameGet(intIfNum));
+    return  FAILURE;
+  }
+
+ /* User config is removed from port by 
+   * sending a notification to VLAN mgr.
+   */
+  if (pacCfgVlanSendCfgNotification( AUTHMGR_INTF_CFG_REMOVE,
+                                       aliasName, pCfg) !=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                    "Unable to remove user config on port %s",
+                    authmgrIntfIfNameGet(intIfNum));
+    return  FAILURE;
+  }
+
+  /* Set port as acquired in STATE_DB. */
+  if (pacCfgIntfAcquireSet(aliasName,  TRUE) !=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                    "Unable to set acquire flag on port %s",
+                    authmgrIntfIfNameGet(intIfNum));
+  }
+
+  return  SUCCESS;  
+}
+
+/*********************************************************************
+ * @purpose  Release port for PAC by reverting all VLAN config on port.
+ *
+ * @param    intIfNum    @b{(input)) Internal interface number of port.
+ *
+ * @returns   SUCCESS  If port is released successfully.
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments On SONiC, authmgr maintains a snapshot of CONFIG_DB data
+ *           on PAC enabled ports.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanReleasePort(uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  authMgrVlanPortData_t *pCfg;
+   char8 aliasName[ NIM_IF_ALIAS_SIZE + 1];
+
+  /* Validate interface number. */
+  if ( SUCCESS != nimCheckIfNumber(intIfNum))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                              "Interface number %s does not exist.",
+                              authmgrIntfIfNameGet(intIfNum));
+    return rc;
+  }
+
+  /* Vlan config from CONFIG_DB is cached locally and used.
+   * Get port config.
+   */
+  pCfg = &authmgrVlanCfgDb->portVlanDb[intIfNum];
+  if (pCfg ==  NULLPTR)
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                    "Null data for port config data %s.",
+                    authmgrIntfIfNameGet(intIfNum));
+    return rc;
+  }
+
+  if (nimGetIntfName (intIfNum,  ALIASNAME, aliasName) !=  SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_ERROR,
+             "Unable to get alias for intf %s",
+             authmgrIntfIfNameGet(intIfNum));
+    return  FAILURE;
+  }
+
+  /* Go over the config and revert all user config on port. */
+  /* User config is reverted on port by 
+   * sending a notification to VLAN mgr.
+   */
+  if (pacCfgVlanSendCfgNotification( AUTHMGR_INTF_CFG_REVERT,
+                                       aliasName, pCfg) !=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+             "Failed to revert user config on port %s",
+             authmgrIntfIfNameGet(intIfNum));
+    return  FAILURE;
+  }
+
+  /* Set port as released in STATE_DB. */
+  if (pacCfgIntfAcquireSet(aliasName,  FALSE) !=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+                    "Unable to set release flag on port %s",
+                    authmgrIntfIfNameGet(intIfNum));
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Processes Authmgr-related event initiated by PACmgr.
+*
+* @param (in)    vlanData  VLAN event data
+* @param (in)    intIfNum  Interface Number
+* @param (in)    event
+*
+* @returns   SUCCESS  or  FAILURE
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanConfChangeCallback(dot1qNotifyData_t *vlanData, uint32 intIfNum, 
+                                      uint32 event)
+{
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  authMgrVlanPortData_t *pCfg;
+
+  memset (ifName, 0x00, sizeof (ifName));
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_EVENTS, 0,
+                       "Received Vlan event %d for interface %s, vlan %d\n",
+                       event, authmgrIntfIfNameGet(intIfNum), vlanData->data.vlanId);
+
+  switch (event)
+  {
+    case VLAN_DELETE_PENDING_NOTIFY:
+      authmgrIssueCmd (authmgrVlanConfDeleteEvent, intIfNum, vlanData);
+
+       VLAN_CLRMASKBIT(authmgrVlanCfgDb->vlanDb.vlanMask, vlanData->data.vlanId);
+      break;
+
+    case VLAN_ADD_NOTIFY:
+       VLAN_SETMASKBIT(authmgrVlanCfgDb->vlanDb.vlanMask, vlanData->data.vlanId);
+      break;
+
+    case VLAN_ADD_PORT_NOTIFY:
+      pCfg = &authmgrVlanCfgDb->portVlanDb[intIfNum];
+       VLAN_SETMASKBIT(pCfg->vlanMask, vlanData->data.vlanId);
+      break;
+
+    case VLAN_DELETE_PORT_NOTIFY:
+      pCfg = &authmgrVlanCfgDb->portVlanDb[intIfNum];
+
+      if (! VLAN_ISMASKBITSET (pCfg->tagging, vlanData->data.vlanId))
+      {
+        /* Untagged port membership removed. Clean up affected clients. */
+        authmgrIssueCmd (authmgrVlanConfPortDeleteEvent, intIfNum, vlanData);
+      }
+
+       VLAN_CLRMASKBIT(pCfg->vlanMask, vlanData->data.vlanId);
+      break;
+
+    case VLAN_PVID_CHANGE_NOTIFY:
+      pCfg = &authmgrVlanCfgDb->portVlanDb[intIfNum];
+      pCfg->pvid = vlanData->data.vlanId;
+
+  default:
+    break;
+  }
+
+  return  SUCCESS;
+}
+
+
+
diff --git a/src/sonic-pac/authmgr/protocol/include/auth_mgr_db.h b/src/sonic-pac/authmgr/protocol/include/auth_mgr_db.h
new file mode 100755
index 00000000000..a94b3055272
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/include/auth_mgr_db.h
@@ -0,0 +1,379 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_DB_H
+#define INCLUDE_AUTHMGR_DB_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "comm_mask.h"
+#include "apptimer_api.h"
+#include "auth_mgr_exports.h"
+//#include "acl_exports.h"
+#include "auth_mgr_sm.h"
+#include "auth_mgr_vlan.h"
+#include "auth_mgr_util.h"
+#include "avl_api.h"
+
+
+#define AUTHMGR_CLIENT_TIMEOUT    300 /* seconds. Checks for client timeout every 5 minutes*/
+
+#define AUTHMGR_LOGICAL_PORT_START    0 
+#define AUTHMGR_LOGICAL_PORT_END       AUTHMGR_MAX_USERS_PER_PORT
+#define AUTHMGR_LOGICAL_PORT_ITERATE  0xFFFFFFFF
+
+/* Max Unsigned Integer Value i.e.; (2 ^ 16)-1 or (2 ^ 32)-1 */
+#define AUTHMGR_UNSIGNED_INTERGER_MAX_LIMIT 0xFFFFFFFF
+
+#define AUTHMGR_IF_INVALID_METHOD_RETURN_LOG(_method_) \
+  if (( AUTHMGR_METHOD_8021X != _method_)&& \
+      ( AUTHMGR_METHOD_MAB != _method_)) \
+  { \
+     LOGF( LOG_SEVERITY_ERROR, "%s %d is invalid.", #_method_, _method_); \
+    return  FAILURE; \
+  } 
+
+#define AUTHMGR_MAX_ACLS_CLIENT 2
+
+typedef enum authmgrParamOperation_s
+{
+  AUTHMGR_PARAM_DELETE = 1,
+  AUTHMGR_PARAM_ADD
+}authmgrParamOperation_t;
+
+
+/* switch info */
+typedef struct authmgrInfo_s
+{
+  uint32 traceId;
+} authmgrInfo_t;
+
+typedef enum authmgrTimerType_s
+{
+  AUTHMGR_TIMER_UNASSIGNED = 0,
+  AUTHMGR_QWHILE,
+  AUTHMGR_REAUTH_WHEN,
+  AUTHMGR_METHOD_NO_RESP_TMR
+}authmgrTimerType_t;
+
+typedef enum authmgrHwAttr_s
+{
+  AUTHMGR_HW_ATTR_STATIC_FDB = 1,
+  AUTHMGR_HW_ATTR_BLOCK_FDB,
+  AUTHMGR_HW_ATTR_PVID,
+  AUTHMGR_HW_ATTR_LAST
+}authmgrHwAttr_t;
+
+
+
+
+
+
+
+typedef struct authmgrClientInfo_s
+{
+  /* authmgr Client category */
+  authmgrClientType_t clientType;
+
+  /* Re-auth and session related info */
+ /* Set to TRUE when reAuthWhen timer expires.
+  This one is from the user and not when the timer expires */
+   BOOL reAuthenticate;
+   int32                retryCount;      /* Number of retres with wrong auth credentials */
+  uint32               reAuthCount;  /* Number of times AUTHENTICATING state is entered */
+
+   AUTHMGR_METHOD_t     currentMethod;
+   AUTHMGR_METHOD_t     authenticatedMethod;
+   AUTHMGR_METHOD_t     executedMethod[ AUTHMGR_METHOD_LAST];
+
+  /* client authentication status */
+   AUTHMGR_PORT_STATUS_t  logicalPortStatus;      /* Current authorization state of the port */
+
+  /* user Details */
+   uchar8 authmgrUserName[AUTHMGR_USER_NAME_LEN];
+  uint32 authmgrUserNameLength;
+
+  uint32 serverStateLen;
+   uchar8 serverState[AUTHMGR_SERVER_STATE_LEN];
+   uchar8 serverClass[AUTHMGR_SERVER_CLASS_LEN];
+  uint32 serverClassLen;
+
+  uint32 currentIdL;
+
+  uint32 rcvdEapolVersion; 
+
+   enetMacAddr_t suppMacAddr;   /* MAC address of Supplicant */
+
+  /* vlan related info */
+  authmgrVlanType_t  vlanType;     /* assigned vlan category */
+   BOOL          vlanTypePortCfg;  /* vlan picked from port cfg */
+  uint32        vlanId;       /* Vlan Id of Supplicant */
+  uint32        blockVlanId;  /* blocked Vlan Id of Supplicant */
+   BOOL          dataBlocked; 
+
+ 
+   BOOL       reAuthenticating;
+   BOOL       suppRestarting;
+
+   USER_MGR_AUTH_METHOD_t authMethod; /* Auth method for the user of this port */
+  uint32                 sessionTime;  
+  
+  uint32    clientTimeout;
+  
+  uint32   sessionTimeout;
+  uint32   terminationAction;
+  uint32   lastAuthTime;
+
+   AUTHMGR_PORT_MAB_AUTH_TYPE_t mabAuthType; /* Authentication type used by MAB. To be filled in only if isMABClient is  TRUE */
+
+  uint32 attrCreateMask;
+}authmgrClientInfo_t;
+
+typedef struct authmgrLogicalNodeKey_s
+{
+  /* first 16 bits represent physical port
+     next 12 bits represent logical port
+     and remaining 3 bits represent client type.
+     last bit is always 0 */
+  uint32 keyNum;
+}authmgrLogicalNodeKey_t;
+
+typedef struct authmgrTimerContext_s
+{
+  authmgrTimerType_t   type;
+  uint32          keyNum;
+}authmgrTimerContext_t;
+
+
+typedef struct authmgrTimerHandle_s
+{
+   APP_TMR_HNDL_t         timer;
+ /* void                     *timerHandle; */
+}authmgrTimerHandle_t;
+
+
+typedef struct authmgrTimer_s
+{
+  authmgrTimerContext_t      cxt;
+  authmgrTimerHandle_t       handle;
+}authmgrTimer_t;
+
+
+typedef struct authmgrProtocolInfo_s
+{
+  BOOL  heldTimerExpired;
+ AUTHMGR_STATES_t authState;
+  BOOL authSuccess;
+  BOOL authFail;
+  BOOL authTimeout;
+  BOOL unAuthenticate;
+  BOOL authenticate;
+ /* Set to TRUE when reAuthWhen timer expires */
+  BOOL reauth;
+  BOOL newMethodInsert;
+  BOOL eapSuccess;
+  BOOL authenticatedRcvdStartAuth;
+}authmgrProtocolInfo_t;
+
+/* logical port info */
+typedef struct authmgrLogicalPortInfo_s
+{
+ /* unique node identifier*/ 
+  authmgrLogicalNodeKey_t key;
+
+  authmgrTimer_t          authmgrTimer;
+  authmgrTimer_t          authmgrMethodNoRespTimer;
+
+  /* protocol related info */
+  authmgrProtocolInfo_t protocol;
+
+  /* client specific non protocol data */
+  authmgrClientInfo_t client;
+  
+  void         *next; /* This field must be the last one in this structure */
+} authmgrLogicalPortInfo_t;
+
+typedef struct authmgrPortInfo_s
+{
+  uint32            maxUsers;
+  uint32            numUsers;
+  uint32               authCount;       /* number of authorized clients */ 
+  uint32           currentId;
+
+   uchar8            paeCapabilities;  
+
+  /* Authentication methods */
+   AUTHMGR_METHOD_t           enabledMethods[ AUTHMGR_METHOD_LAST];
+  /* Authentication priority */
+   AUTHMGR_METHOD_t           enabledPriority[ AUTHMGR_METHOD_LAST];
+
+  uint32     enabledMethodCount;
+  uint32     enabledPriorityCount;
+  
+  /* Inter-state machine communication and initialization */
+   BOOL                 initialize;      /* Set to TRUE by mgmt to cause port initialization */
+   AUTHMGR_PORT_CONTROL_t portControlMode; /* Current control mode setting by mgmt */
+   AUTHMGR_HOST_CONTROL_t hostMode;        /* host mode setting by mgmt */
+   BOOL                 portEnabled;     /* TRUE if port is active */
+   AUTHMGR_PORT_STATUS_t  portStatus;      /* Current authorization state of the port */
+   AUTHMGR_PORT_STATUS_t  nimStatus;       /* Status set to nim so duplicate events are not sent to nim */
+   BOOL  unLearnMacPolicy;       
+
+  /* Authenticator PAE state machine parameters */
+  uint32               quietPeriod;  /* Initialization value for quietWhile timer */
+
+  /* Reauthentication Timer state machine parameters */
+  uint32 reAuthPeriod;   /* Number of seconds between periodic reauthentication */
+   BOOL   reAuthEnabled;  /* TRUE if reauthentication is enabled */
+   BOOL   reAuthPeriodServer;
+
+  uint32 authFailRetryMaxCount;    /* Max reauthentication attempts */
+
+   BOOL        authmgrAcquire;  /* flag to keep track of authmgr acquire for a port */
+   AUTHMGR_PORT_AUTH_VIOLATION_MODE_t violationMode;
+   uint32 pvid;
+   uint32 authVlan;
+} authmgrPortInfo_t;
+
+
+
+typedef RC_t(*authmgrCtrlTimerExpiryFn_t) (authmgrLogicalPortInfo_t *logicalPortInfo);
+typedef RC_t(*authmgrCtrlTimerNodeSetFn_t) (uint32 intIfNum, uint32 val);
+typedef RC_t(*authmgrCtrlTimerNodeGetFn_t) (uint32 intIfNum, uint32 *val);
+
+
+typedef struct authmgrTimerMap_s
+{
+  authmgrTimerType_t  type;
+  authmgrCtrlTimerExpiryFn_t  expiryFn;
+   BOOL                     serverConfigSupport;
+  authmgrCtrlTimerNodeGetFn_t getFn;
+  authmgrCtrlTimerNodeGetFn_t lportGetFn;
+}authmgrTimerMap_t;
+
+
+typedef RC_t(*authmgrCtrlHostModeSetFn_t) (uint32 intIfNum);
+
+typedef struct authmgrHostModeMap_s
+{
+   AUTHMGR_HOST_CONTROL_t  hostMode;
+  authmgrCtrlHostModeSetFn_t  hostModeFn;
+}authmgrHostModeMap_t;
+
+typedef RC_t(*authmgrPortCtrlLearnFn_t) (uint32 intIfNum);
+
+typedef struct authmgrPortCtrlLearnMap_s
+{
+   AUTHMGR_PORT_CONTROL_t  portControlMode;
+  authmgrPortCtrlLearnFn_t       learnFn;
+}authmgrPortCtrlLearnMap_t;
+
+
+typedef RC_t(*authmgrHostCtrlLearnFn_t) (uint32 intIfNum);
+
+typedef struct authmgrHostCtrlLearnMap_s
+{
+   AUTHMGR_HOST_CONTROL_t  hostMode;
+  authmgrHostCtrlLearnFn_t   learnFn;
+}authmgrHostCtrlLearnMap_t;
+
+typedef enum authmgr_stats_update_enum_s
+{
+  authmgrStatsAuthEnter = 1,
+  authmgrStatsAuthSuccess,
+  authmgrStatsAuthFail,
+  authmgrStatsAuthTimeout
+}authmgrStatsUpdate_t;
+
+
+typedef RC_t(*authmgrStatsMapFn_t) (uint32 intIfNum, authmgrStatsUpdate_t status);
+
+typedef struct authmgrStatsMap_s
+{
+   AUTHMGR_METHOD_t  type;
+  authmgrStatsMapFn_t  statsFn;
+}authmgrStatsMap_t;
+
+typedef RC_t(*authmgrHwCleanupEventFn_t) (authmgrLogicalPortInfo_t *logicalPortInfo);
+
+typedef struct authmgrHwCleanupEventMap_s
+{
+  uint32  event;
+  authmgrHwCleanupEventFn_t  cleanupFn;
+}authmgrHwCleanupEventMap_t;
+
+typedef struct authmgrMethodCommonStats_s
+{
+  uint32 authEntersAuthenticating;
+  uint32 authSuccess;
+  uint32 authFailure;
+  uint32 authTimeout;
+  uint32 authAbort;
+}authmgrMethodCommonStats_s;
+
+
+typedef struct authmgrEapStats_s
+{
+  uint32 eapTxSuccess;
+  uint32 eapTxFailure;
+}authmgrEapStats_t;
+
+typedef struct authmgrPortStats_s
+{
+  authmgrEapStats_t    eap;
+  authmgrMethodCommonStats_s dot1x;
+  authmgrMethodCommonStats_s mab;
+  authmgrMethodCommonStats_s cp;
+} authmgrPortStats_t;
+
+extern authmgrInfo_t authmgrInfo;
+extern authmgrPortInfo_t *authmgrPortInfo;
+extern authmgrPortStats_t *authmgrPortStats;
+extern uint32 *authmgrMapTbl;
+extern authmgrPortSessionStats_t  *authmgrPortSessionStats;
+
+
+
+/*********************************************************************************************/
+
+
+/* Prototypes for the auth_mgr_db.c file */
+RC_t authmgrLogicalPortInfoDBInit(uint32 nodeCount);
+RC_t authmgrLogicalPortInfoDBDeInit(void);
+
+RC_t authmgrLogicalPortInfoTakeLock(void);
+RC_t authmgrLogicalPortInfoGiveLock(void);
+
+authmgrLogicalPortInfo_t *authmgrLogicalPortInfoAlloc(uint32 intIfNum);
+RC_t authmgrLogicalPortInfoDeAlloc(authmgrLogicalPortInfo_t *node);
+
+authmgrLogicalPortInfo_t *authmgrLogicalPortInfoGet(uint32 lIntIfNum);
+authmgrLogicalPortInfo_t *authmgrLogicalPortInfoGetNext(uint32 lIntIfNum);
+
+authmgrLogicalPortInfo_t *authmgrLogicalPortInfoFirstGet(uint32 intIfNum,
+                                                    uint32 *lIntIfNum);
+authmgrLogicalPortInfo_t *authmgrLogicalPortInfoGetNextNode(uint32 intIfNum,
+                                                        uint32 *lIntIfNum);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_AUTHMGR_DB_H */
diff --git a/src/sonic-pac/authmgr/protocol/include/auth_mgr_mac_db.h b/src/sonic-pac/authmgr/protocol/include/auth_mgr_mac_db.h
new file mode 100755
index 00000000000..c7322da4050
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/include/auth_mgr_mac_db.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef INCLUDE_AUTHMGR_MAC_DB_H
+#define INCLUDE_AUTHMGR_MAC_DB_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "sll_api.h"
+#include "buff_api.h"
+
+typedef enum authMgrFdbCfgType_s
+{
+   AUTHMGR_FDB_CFG_ADD = 0,
+   AUTHMGR_FDB_CFG_REMOVE
+} authMgrFdbCfgType_t;
+
+extern RC_t authmgrMacAddrDataDestroy ( sll_member_t *ll_member);
+extern  int32 authmgrMacAddrDataCmp(void *p, void *q, uint32 key);
+extern RC_t authmgrMacAddrInfoDBInit(uint32 nodeCount);
+extern RC_t authmgrMacAddrInfoDBDeInit(void);
+extern RC_t authmgrMacAddrInfoAdd( enetMacAddr_t *mac_addr,uint32 lIntIfNum);
+extern RC_t authmgrMacAddrInfoRemove( enetMacAddr_t *mac_addr);
+extern RC_t authmgrMacAddrInfoFind( enetMacAddr_t *mac_addr,uint32 *lIntIfNum);
+extern RC_t authmgrMacAddrInfoFindNext( enetMacAddr_t *mac_addr,uint32 *lIntIfNum);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_AUTHMGR_MAC_DB_H */
diff --git a/src/sonic-pac/authmgr/protocol/include/auth_mgr_radius.h b/src/sonic-pac/authmgr/protocol/include/auth_mgr_radius.h
new file mode 100755
index 00000000000..412faf06036
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/include/auth_mgr_radius.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef __INCLUDE_AUTHMGR_RADIUS_H__
+#define __INCLUDE_AUTHMGR_RADIUS_H__
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AUTHMGR_MAC_ADDR_STR_LEN (( MAC_ADDR_LEN * 2) + ( MAC_ADDR_LEN - 1))
+
+typedef enum
+{
+   RADIUS_FORMAT_UNKNOWN = 0,
+   RADIUS_FORMAT_LEGACY_LOWERCASE,
+   RADIUS_FORMAT_LEGACY_UPPERCASE,
+   RADIUS_FORMAT_IETF_LOWERCASE,
+   RADIUS_FORMAT_IETF_UPPERCASE,
+   RADIUS_FORMAT_UNFORMATTED_LOWERCASE,
+   RADIUS_FORMAT_UNFORMATTED_UPPERCASE
+}  RADIUS_MAC_ATTRIBUTE_FORMAT_t;
+
+extern RC_t authmgrRadiusResponseCallback(uint32 status, uint32 correlator,
+                                              uchar8 *attribues, uint32 attributesLen);
+extern RC_t authmgrRadiusResponseProcess(uint32 intIfNum, uint32 status,  uchar8 *attributes,
+                                          uint32 attributesLen);
+extern RC_t authmgrRadiusAcceptProcess(uint32 intIfNum,  uchar8 *radiusPayload, uint32 payloadLen);
+
+
+extern RC_t authmgrRadiusChallengeProcess(uint32 intIfNum,  uchar8 *radiusPayload, uint32 payloadLen);
+extern RC_t authmgrRadiusAccessRequestSend(uint32 intIfNum,  uchar8 *suppEapData);
+extern RC_t authmgrRadiusSuppResponseProcess(uint32 intIfNum,  netBufHandle bufHandle);
+extern RC_t authmgrRadiusAcceptPostProcess(authmgrLogicalPortInfo_t *logicalPortInfo,
+                                              authmgrClientInfo_t *clientInfo,  AUTHMGR_ATTR_PROCESS_t attrProcess);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_AUTHMGR_RADIUS_H__*/
diff --git a/src/sonic-pac/authmgr/protocol/include/auth_mgr_sm.h b/src/sonic-pac/authmgr/protocol/include/auth_mgr_sm.h
new file mode 100755
index 00000000000..019dff77039
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/include/auth_mgr_sm.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_SM_H
+#define INCLUDE_AUTHMGR_SM_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum authmgrEvents_s
+{
+  /***************************************************************/
+  /* Events just for Authenticator PAE Machine (APM)             */
+  /***************************************************************/
+  /*0*/authmgrInitialize = 0,                               /*E1.*/
+  /*1*/authmgrStartAuthenticate,                            /*E2.*/
+  /*2*/authmgrAuthSuccess,                                  /*E3*/
+  /*3*/authmgrNotAuthSuccessNoNextMethod,                   /*E4*/
+  /*4*/authmgrNotAuthSuccessNextMethod,                     /*E5*/
+  /*5*/authmgrHeldTimerEqualsZero,                          /*E6*/
+  /*6*/authmgrStopAuthenticate,                             /*E7*/
+  /*7*/authmgrHigherAuthMethodAdded,                        /*E8*/
+  /*8*/authmgrReauthenticate,                               /*E9*/
+  /*9*/authmgrAuthenticatedRxEapolStart,                    /*E10*/
+  /*10*/authmgrAuthFail,                                    /*E11*/
+  /*11*/authmgrAbortAndRestartAuth,                         /*E12*/
+  /*12*/authmgrSmEvents/*keep this last in sub group*/
+ 
+}authmgrSmEvents_t;
+
+struct authmgrLogicalPortInfo_s;
+extern RC_t authmgrStateMachineClassifier(authmgrSmEvents_t authmgrEvent, uint32 lIntIfNum); 
+
+extern RC_t authmgrAuthenticationInitiate(uint32 lIntIfNum);
+
+extern void authmgrAbortAuth(struct authmgrLogicalPortInfo_s *logicalPortInfo);
+
+RC_t authmgrDisableAuthenticatorPorts(uint32 intIfNum);
+RC_t authmgrEnableAuthenticatorPorts(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose  Events that the APM needs to generate and propagate
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ * @param   *msg     @b{(input)) message containing event, bufHandle
+ *
+ * @returns  SUCCESS
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrGenerateEvents(uint32 lIntIfNum);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_AUTHMGR_SM_H */
diff --git a/src/sonic-pac/authmgr/protocol/include/auth_mgr_timer.h b/src/sonic-pac/authmgr/protocol/include/auth_mgr_timer.h
new file mode 100755
index 00000000000..5e68a29a818
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/include/auth_mgr_timer.h
@@ -0,0 +1,132 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_TIMER_H
+#define INCLUDE_AUTHMGR_TIMER_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "comm_mask.h"
+
+/*********************************************************************
+ * @purpose   This function is used to send timer events
+ *
+ * @param     timerCtrlBlk    @b{(input)}   Timer Control Block
+ * @param     ptrData         @b{(input)}   Ptr to passed data
+ *
+ * @returns   None
+ *
+ * @notes     None
+ * @end
+ *********************************************************************/
+void authmgrTimerExpiryHdlr( APP_TMR_CTRL_BLK_t timerCtrlBlk, void* ptrData);
+
+/*************************************************************************
+ * @purpose  Starts the specified timer
+ *
+ * @param    intIfNum      @b{(input)}  Interface for starting the timer
+ * @param    timerType     @b{(input)}  Interface/Timer type
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t authmgrTimerStart(authmgrLogicalPortInfo_t *logicalPortInfo, authmgrTimerType_t timerType);
+
+/*************************************************************************
+ * @purpose  Helper API to delete the specifed timer node
+ *
+ * @param    timer  @b{(input)}  Pointer to appTimer node
+ * @param    handle @b{(input)}  Pointer to appTimer handle handle
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t  authmgrTimerDestroy( APP_TMR_CTRL_BLK_t timerCB,
+    authmgrLogicalPortInfo_t *logicalPortInfo,
+    authmgrTimerType_t timerType);
+
+/*************************************************************************
+  * @purpose  Process the authmgr timer expiry event
+  *
+  * @param    param    @b{(input)}  Pointer to added authmgr node identifier 
+  *
+  * @returns  void
+  *
+  * @comments none
+  *
+  * @end
+  *************************************************************************/
+void authmgrTimerExpiryAction(void *param);
+
+
+/*************************************************************************
+  * @purpose get the map table entry for the timer type 
+  *
+  * @param    param    @b{(input)}  Pointer to added authmgr node identifier 
+  *
+  * @returns  void
+  *
+  * @comments none
+  *
+  * @end
+  *************************************************************************/
+RC_t authmgrTimerHandlerInfoGet(authmgrTimerType_t type, authmgrTimerMap_t *handler);
+
+/*************************************************************************
+ * @purpose  function to process on expiry of TX LP timer 
+ *
+ * @param    timer  @b{(input)}  Pointer to appTimer node
+ * @param    logicalPortInfo @b{(input)}  Pointer to logicalPort Info 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t  authmgrTxLpTimerExpiryAction(authmgrLogicalPortInfo_t *logicalPortInfo);
+/*************************************************************************
+ * @purpose  function to process on expiry of reauth when timer
+ *
+ * @param    timer  @b{(input)}  Pointer to appTimer node
+ * @param    logicalPortInfo @b{(input)}  Pointer to logicalPort Info
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t  authmgrReAuthWhenExpiryAction(authmgrLogicalPortInfo_t *logicalPortInfo);
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_AUTHMGR_TIMER_H */
diff --git a/src/sonic-pac/authmgr/protocol/include/auth_mgr_txrx.h b/src/sonic-pac/authmgr/protocol/include/auth_mgr_txrx.h
new file mode 100755
index 00000000000..92eeb75ba1e
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/include/auth_mgr_txrx.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_TXRX_H
+#define INCLUDE_AUTHMGR_TXRX_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "auth_mgr_common.h"
+
+extern RC_t authmgrTxRxInit(void);
+extern RC_t authmgrPduReceive( netBufHandle bufHandle, sysnet_pdu_info_t *pduInfo);
+extern void authmgrTxRxHeaderTagRemove( netBufHandle bufHandle);
+
+extern void authmgrTxReqId(uint32 intIfNum, authmgrPortType_t portType);
+extern void authmgrTxReq(authmgrLogicalPortInfo_t *logicalPortInfo,  netBufHandle bufHandle);
+extern void authmgrTxCannedSuccess(uint32 intIfNum, authmgrPortType_t portType);
+extern void authmgrTxCannedFail(uint32 intIfNum, authmgrPortType_t portType);
+extern void authmgrFrameTransmit(uint32 intIfNum,  netBufHandle bufHandle,authmgrPortType_t portType);
+extern RC_t authmgrTxRxHostConvert( netBufHandle bufHandle);
+extern RC_t authmgrSendRespToServer(uint32 intIfNum,  netBufHandle bufHandle);
+extern RC_t authmgrRadiusSendNotification(uint32 intIfNum,
+                                            uchar8 *radiusPayload,
+                                           uint32 payloadLen);
+extern RC_t authmgrTxReqIdCheck(uint32 intIfNum);
+extern void authmgrTxStart(uint32 intIfNum);
+extern void authmgrTxSuppRsp(uint32 intIfNum);
+extern RC_t authmgrCtlPacketInterceptRegister ( BOOL reg);
+extern RC_t authmgrPacketTransmit(uint32 intIfNum,  ushort16 vlanId,
+                                      uchar8 *frame,  ushort16 frameLen);
+
+extern RC_t authmgrPacketFlood(uint32 intIfNum,  ushort16 vlanId,
+                                   uchar8 *frame,  ushort16 frameLen);
+
+RC_t auth_mgr_eap_socket_create( int32 *fd);
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_AUTHMGR_TXRX_H */
diff --git a/src/sonic-pac/authmgr/protocol/include/auth_mgr_util.h b/src/sonic-pac/authmgr/protocol/include/auth_mgr_util.h
new file mode 100755
index 00000000000..ad38548f4d3
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/include/auth_mgr_util.h
@@ -0,0 +1,262 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_UTIL_H
+#define INCLUDE_AUTHMGR_UTIL_H
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include "comm_mask.h"
+#include "apptimer_api.h"
+#include "auth_mgr_exports.h"
+#include "auth_mgr_sm.h"
+#define AUTHMGR_PHYSICAL_PORT_GET(x)  (((x)/ AUTHMGR_MAX_USERS_PER_PORT)+1) 
+#define AUTHMGR_LPORT_KEY_PACK(_x, _y, _z, _val) \
+  do { \
+    _val |= ((_x<<16) | (_y<<4) | (_z)); \
+  } while (0);
+#define AUTHMGR_LPORT_KEY_UNPACK(_x, _y, _z, _val) \
+  do { \
+    _x = (_val & 0XFFFF0000)>>16; \
+    _y = (_val & 0X0000FFF0)>>4; \
+    _z = (_val & 0X0000000F); \
+  } while (0);
+#define AUTHMGR_PORT_GET(_x, _val) \
+  _x = (_val & 0XFFFF0000)>>16;
+#define AUTHMGR_LPORT_GET(_y, _val) \
+  _y = (_val & 0X0000FFF0)>>4; 
+#define AUTHMGR_TYPE_GET(_z, _val) \
+  _z = (_val & 0X0000000F);
+#define AUTHMGR_MAX_PHY_PORT_USERS 2
+#define AUTHMGR_IF_NULLPTR_RETURN_LOG(_p) \
+  if ( NULLPTR == _p) \
+  { \
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_FAILURE, 0, "%s is NULLPTR.", #_p); \
+    return  FAILURE; \
+  }
+
+#define AUTHMGR_PRINT_MAC_ADDR(mac_addr)({                                   \
+         uchar8 __maddr[32] = {'\0'};                                      \
+        snprintf(__maddr, sizeof(__maddr), " %02X:%02X:%02X:%02X:%02X:%02X", \
+                 (unsigned char)mac_addr[0], (unsigned char)mac_addr[1],     \
+                 (unsigned char)mac_addr[2], (unsigned char)mac_addr[3],     \
+                 (unsigned char)mac_addr[4], (unsigned char)mac_addr[5] );   \
+        __maddr;  \
+    })
+ 
+/*********************************************************************
+ * @purpose function to check policy validation based on host mode 
+ *
+ * @param    hostMode   @b{(input))  hostmode 
+ * @param    *appyPolicy  @b{(input))  BOOL value 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrHostIsDynamicNodeAllocCheck( AUTHMGR_HOST_CONTROL_t hostMode,  BOOL *valid);
+/*********************************************************************
+ * @purpose function to apply violation policy  
+ *
+ * @param    hostMode   @b{(input))  hostmode 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrViolationPolicyApply(uint32 intIfNum);
+/*********************************************************************
+ * @purpose function to change the learning of an interface 
+ *
+ * @param    hostMode   @b{(input))  hostmode 
+ * @param    *appyPolicy  @b{(input))  BOOL value 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortLearningModify(uint32 intIfNum);
+/*********************************************************************
+ * @purpose function to check policy validation based on host mode 
+ *
+ * @param    hostMode   @b{(input))  hostmode 
+ * @param    *appyPolicy  @b{(input))  BOOL value 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrStaticFdbEntryValidCheck(uint32 intIfNum, BOOL *valid);
+/*********************************************************************
+  * @purpose function to check unlearn mac address violation policy validation
+  *
+  * @param    intIfNum   @b{(input))  internal interface number
+  * @param    valid  @b{(input))  TRUE if allowed.
+  *
+  * @returns   SUCCESS
+  * @returns   FAILURE
+  *
+  * @comments
+  *
+  * @end
+  *********************************************************************/
+RC_t authmgrViolationPolicyValidCheck (uint32 intIfNum,  BOOL * valid);
+/*********************************************************************
+* @purpose set the port settings when auth mgr is not enabled and blocked 
+*
+* @param intIfNum internal interface number
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPhysicalPortStatusBlockSet (uint32 intIfNum);
+/*********************************************************************
+* @purpose set the port settings when auth mgr is not enabled 
+*
+* @param intIfNum internal interface number
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPhysicalPortStatusOpenSet (uint32 intIfNum);
+/*********************************************************************
+* @purpose set the port settings when auth mgr is not enabled 
+*
+* @param intIfNum internal interface number
+* @return  SUCCESS or  FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPhysicalPortAccessSet (uint32 intIfNum);
+/*********************************************************************
+* @purpose function to change the learning of multi host mode
+*
+* @param intIfNum internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortAutoLearningModify (uint32 intIfNum);
+/*********************************************************************
+* @purpose  Get the physical port for the logical interface
+*
+* @param    intIfNum  @b{(input))  internal interface number
+*
+* @returns  end index for specified interface in authmgr logical
+*           interface list
+*
+* @comments
+*
+* @end
+*********************************************************************/
+uint32 authmgrPhysPortGet(uint32 lIntIfNum);
+/*********************************************************************
+* @purpose  Get the interface name for the  given interface
+*
+* @param    intIfNum  @b{(input))  internal interface number
+*
+* @returns  Name of interface for Valid authmgr/nim interface,  
+*           "UnKnown" for invalid interface
+*
+* @comments
+*
+* @end
+*********************************************************************/
+ char8 * authmgrIntfIfNameGet(uint32 intIfNum);
+/*********************************************************************
+* @purpose  validate the priority precedence of two methods 
+*
+* @param    intIfNum  @b{(input))  internal interface number
+* @param    method1  @b{(input))   authentication method 
+* @param    method2  @b{(input))   authentication method 
+*
+* @returns   SUCCESS if method 2 is of higher priority than method1 
+* @returns    FAILURE  
+*
+* @comments
+*
+* @end
+*********************************************************************/
+uint32 authmgrPriorityPrecedenceValidate(uint32 intIfNum, 
+                                             AUTHMGR_METHOD_t method1, 
+                                             AUTHMGR_METHOD_t method2);
+/* Set port learning config */
+extern RC_t pacCfgIntfLearningModeSet(char *interface,  AUTHMGR_PORT_LEARNING_t learning);
+
+/* Setup port learning config */
+extern  BOOL pacCfgIntfViolationPolicySet(char *interface,  BOOL enable);
+
+/* Add dot1x client */
+extern  BOOL pacCfgIntfClientAdd(char *interface,  uchar8 *mac_addr, int vlan);
+
+/* Delete dot1x client */
+extern  BOOL pacCfgIntfClientRemove(char *interface,  uchar8 *mac_addr, int vlan);
+
+/* Block a client's traffic while client is getting authorized */
+extern  BOOL pacCfgIntfClientBlock(char *interface,  uchar8 *mac_addr, int vlan);
+
+/* Unblock a client's traffic */
+extern  BOOL pacCfgIntfClientUnblock(char *interface,  uchar8 *mac_addr, int vlan);
+
+/* Set port PVID */
+extern RC_t pacCfgPortPVIDSet(char *interface, int pvid);
+
+/* Get port PVID */
+extern RC_t pacCfgPortPVIDGet(char *interface, int *pvid);
+
+/* Set port VLAN membership */
+extern RC_t pacCfgVlanMemberAdd(int vlan, char *interface, dot1qTaggingMode_t mode);
+
+/* Remove port VLAN membership */
+extern RC_t pacCfgVlanMemberRemove(int vlan, char *interface);
+
+/* Add a dynamic VLAN */
+extern RC_t pacCfgVlanAdd(int vlan);
+
+/* Remove a dynamic VLAN */
+extern RC_t pacCfgVlanRemove(int vlan);
+
+/* Send PVID set notification to VLAN mgr */
+extern RC_t pacCfgVlanSendPVIDNotification(char *interface, int pvid);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+#endif /* INCLUDE_AUTHMGR_UTIL_H */
diff --git a/src/sonic-pac/authmgr/protocol/include/auth_mgr_vlan.h b/src/sonic-pac/authmgr/protocol/include/auth_mgr_vlan.h
new file mode 100755
index 00000000000..e327e122cd4
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/include/auth_mgr_vlan.h
@@ -0,0 +1,149 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef INCLUDE_AUTHMGR_VLAN_H
+#define INCLUDE_AUTHMGR_VLAN_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "comm_mask.h"
+#include "auth_mgr_exports.h"
+#include "pacinfra_common.h"
+
+typedef struct authmgrVlanInfoEntry_s
+{
+  authmgrVlanType_t type;
+   AUTHMGR_VLAN_ASSIGNED_MODE_t assignmentReason;
+}authmgrVlanInfoEntry_t;
+
+typedef struct authmgrVlanStringParams_s
+{
+  authmgrVlanType_t vlanType;
+  authmgrClientType_t clientType;
+  uint32 vlanId;
+}authmgrVlanStringParams_t;
+
+#define AUTH_MGR_DEFAULT_VLANID   1
+
+/*********************************************************************
+ * @purpose  check if the port participation can be removed for a vlan
+ *
+ * @param    physPort    @b{(input))  Port
+ * @param    vlanId      @b{(input)) vlan Id
+ *
+ * @returns   SUCCESS/ FAILRE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+
+RC_t authmgrVlanPortDeletionValidate(uint32 physPort, uint32 vlanId);
+
+
+/*********************************************************************
+ * @purpose  check if the port can be aquired by authmgr 
+ *
+ * @param    physPort    @b{(input))  Port
+ * @param    vlanId      @b{(input)) vlan Id
+ *
+ * @returns   SUCCESS/ FAILRE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanPortAcquireCheck(uint32 physPort);
+
+RC_t authmgrVlanTypeInfoGet(authmgrVlanType_t type, authmgrVlanInfoEntry_t *entry);
+
+/*********************************************
+ * @purpose  Enable  authmgr vlan to a specified interface
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param    guestVlanId @b{(input)} guest vlan id
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanDeleteProcess(uint32 vlanId);
+
+
+RC_t authmgrVlanPortDeleteProcess(uint32 intIfNum,uint32 vlanId, 
+                                     dot1qTaggingMode_t tagging);
+RC_t authmgrVlanPortAddProcess(uint32 intIfNum,uint32 vlanId,
+                                  dot1qTaggingMode_t tagging);
+RC_t authmgrVlanAddProcess(uint32 vlanId);
+
+/********************************************************************
+ * @purpose  function to process vlan configuration delete event 
+ *
+ * @param    vlanId @b{(input)} vlan id
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+ RC_t authmgrVlanConfDeleteProcess (uint32 vlanId);
+
+/********************************************************************
+ * @purpose  function to process vlan port configuration delete event 
+ *
+ * @param    vlanId @b{(input)} vlan id
+ * @param    intIfNum @b{(input)} interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanConfPortDeleteProcess (uint32 intIfNum, uint32 vlanId);
+
+/*********************************************************************
+* @purpose Set Port PVID
+*
+* @param    intIfNum  @b{(input)) interface
+* @param    pvid   @b{(input)) port default vlan id
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortPvidSet(uint32 intIfNum,  ushort16 pvid);
+
+RC_t authmgrVlanPortParticipationValidate (uint32 physPort, uint32 vlanId);
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_AUTHMGR_VLAN_H */
diff --git a/src/sonic-pac/authmgr/protocol/include/auth_mgr_vlan_db.h b/src/sonic-pac/authmgr/protocol/include/auth_mgr_vlan_db.h
new file mode 100644
index 00000000000..50b37bec817
--- /dev/null
+++ b/src/sonic-pac/authmgr/protocol/include/auth_mgr_vlan_db.h
@@ -0,0 +1,246 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_VLAN_DB_H
+#define INCLUDE_AUTHMGR_VLAN_DB_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "comm_mask.h"
+#include "auth_mgr_exports.h"
+#include "pacinfra_common.h"
+
+typedef struct authMgrVlanData_s
+{
+   VLAN_MASK_t vlanMask;
+} authMgrVlanData_t;
+
+typedef struct authMgrVlanPortData_s
+{
+   VLAN_MASK_t vlanMask; /* VLANs this port is a member part of. */
+   VLAN_MASK_t tagging; /* Tagging mode for each VLAN */
+   BOOL isTrunkPort;   /* Is port a trunk port. */
+  uint32 pvid;          /* Port PVID */
+} authMgrVlanPortData_t;
+
+typedef struct authMgrVlanDbData_s
+{
+  authMgrVlanData_t vlanDb;
+  authMgrVlanPortData_t portVlanDb[ AUTHMGR_INTF_MAX_COUNT]; 
+} authMgrVlanDbData_t;
+
+typedef enum authMgrVlanPortCfgType_s
+{
+   AUTHMGR_INTF_CFG_REMOVE = 0,
+   AUTHMGR_INTF_CFG_REVERT
+} authMgrVlanPortCfgType_t;
+
+/*********************************************************************
+* @purpose  Add newly created VLAN to database.
+*
+* @param    vlan @b{(input)) vlan to be added.
+*
+* @returns   SUCCESS If VLAN was added to DB successfully.
+* @returns   FAILURE Otherwise
+*
+* @comments Authmgr maintains an internal VLAN cache that mimics the
+*           current SONiC VLAN state. This is done to avoid reading the
+*           redis DB too many times.
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanAddLocalUpdate(uint32 vlan);
+
+/*********************************************************************
+* @purpose  Update local VLAN DB with VLAN delete notification.
+*
+* @param    vlan @b{(input)) vlan to be removed.
+*
+* @returns   SUCCESS If VLAN was removed from DB successfully.
+* @returns   FAILURE Otherwise
+*
+* @comments Authmgr maintains an internal VLAN cache that mimics the
+*           current SONiC VLAN state. This is done to avoid reading the
+*           redis DB too many times.
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanDeleteLocalUpdate(uint32 vlan);
+
+/*********************************************************************
+* @purpose  Update local VLAN DB with VLAN port add event.
+*
+* @param    vlan       @b{(input)) VLAN
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    tagging    @b{(input)) Port VLAN tag mode
+*
+* @returns   SUCCESS If VLAN port add was handled successfully.
+* @returns   FAILURE Otherwise
+*
+* @comments Authmgr maintains an internal VLAN cache that mimics the
+*           current SONiC VLAN state. This is done to avoid reading the
+*           redis DB too many times.
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanPortAddLocalUpdate(uint32 vlan, uint32 intIfNum,
+                                      dot1qTaggingMode_t tagging);
+
+/*********************************************************************
+* @purpose  Update local VLAN DB with VLAN port delete  event.
+*
+* @param    vlan       @b{(input)) VLAN
+* @param    intIfNum   @b{(input)) internal interface number
+* @param    tagging    @b{(input)) Port VLAN tag mode
+*
+* @returns   SUCCESS If VLAN port delete was handled successfully.
+* @returns   FAILURE Otherwise
+*
+* @comments Authmgr maintains an internal VLAN cache that mimics the
+*           current SONiC VLAN state. This is done to avoid reading the
+*           redis DB too many times.
+*
+*********************************************************************/
+RC_t authmgrVlanPortDeleteLocalUpdate(uint32 vlan, uint32 intIfNum,
+                                         dot1qTaggingMode_t tagging);
+
+/*********************************************************************
+ * @purpose  check if VLAN is valid
+ *
+ * @param    vlan      @b{(input)) vlan Id
+ *
+ * @returns   SUCCESS  If VLAN exists
+ * @returns   ERROR    If VLAN does not exist
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments On SONiC, authmgr maintains an internal VLAN data cache
+ *           that is a mirror of the STATE_DB.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanCheckValid(uint32 vlan);
+
+/*********************************************************************
+ * @purpose  check if VLAN is static
+ *
+ * @param    vlan      @b{(input)) vlan Id
+ *
+ * @returns   SUCCESS  If VLAN exists
+ * @returns   NOT_EXIST    If VLAN does not exist
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments On SONiC, authmgr maintains an internal VLAN data cache
+ *           that is a mirror of the CONFIG_DB.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanCheckStatic(uint32 vlan);
+
+/*********************************************************************
+ * @purpose  Get number of ports that are members of VLAN.
+ *
+ * @param    vlan      @b{(input)) vlan Id
+ * @param    numPorts  @b{(output)) Number of ports in VLAN.
+ *
+ * @returns   SUCCESS  If number of ports are returned successfully.
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments On SONiC, authmgr maintains an internal VLAN data cache
+ *           that is a mirror of the STATE_DB.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanEgressPortsGet(uint32 vlan, uint32 *numPorts);
+
+/*********************************************************************
+ * @purpose  Get the default VLAN of the port.
+ *
+ * @param    intIfNum      @b{(input)) Interface number
+ * @param    vlan  @b{(output)) default VLAN.
+ *
+ * @returns   SUCCESS  If default VLAN is returned successfully.
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments The default VLAN is the configured Access VLAN of the port.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortDefaultVlanGet(uint32 intIfNum, uint32 *vlan);
+
+/*********************************************************************
+ * @purpose  Acquire port for PAC by removing all VLAN config on port.
+ *
+ * @param    intIfNum    @b{(input)) Internal interface number of port.
+ *
+ * @returns   SUCCESS  If port is acquired successfully.
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments On SONiC, authmgr maintains a snapshot of CONFIG_DB data 
+ *           on PAC enabled ports.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanAcquirePort(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose  Release port for PAC by reverting all VLAN config on port.
+ *
+ * @param    intIfNum    @b{(input)) Internal interface number of port.
+ *
+ * @returns   SUCCESS  If port is released successfully.
+ * @returns   FAILURE  Otherwise
+ *
+ * @comments On SONiC, authmgr maintains a snapshot of CONFIG_DB data 
+ *           on PAC enabled ports.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrVlanReleasePort(uint32 intIfNum);
+
+
+/*********************************************************************
+* @purpose  Processes Authmgr-related event initiated by PACmgr.
+*
+* @param (in)    vlanData  VLAN data
+* @param (in)    intIfNum  Interface Number
+* @param (in)    event
+*
+* @returns   SUCCESS  or  FAILURE
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanConfChangeCallback(dot1qNotifyData_t *vlanData, uint32 intIfNum,
+                                      uint32 event);
+
+/* Send VLAN cfg notifications. */
+extern RC_t pacCfgVlanSendCfgNotification(authMgrVlanPortCfgType_t type,
+                                          char *interface, authMgrVlanPortData_t *cfg);
+
+/* Send PVID notifications. */
+extern RC_t pacCfgVlanSendPVIDNotification(char *interface, int pvid);
+
+/* Set acquire/release port info. */
+extern RC_t pacCfgIntfAcquireSet(char *interface,  BOOL acquire);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_AUTHMGR_VLAN_DB_H */
diff --git a/src/sonic-pac/fpinfra/Makefile.am b/src/sonic-pac/fpinfra/Makefile.am
new file mode 100644
index 00000000000..eeb32026c28
--- /dev/null
+++ b/src/sonic-pac/fpinfra/Makefile.am
@@ -0,0 +1,43 @@
+lib_LTLIBRARIES = libfpinfra.la
+
+libfpinfra_la_SOURCES = osapi/osapi.c \
+                        osapi/osapi_sem.c \
+                        osapi/osapi_support.c \
+                        osapi/osapi_util.c \
+                        osapi/osapi_time.c \
+                        osapi/osapi_rwlock.c \
+                        osapi/proc_osapi_msg.c \
+                        osapi/proc_osapi_task.c \
+                        osapi/init_platform_config.c \
+                        osapi/osapi_file.c \
+                        util/sll/sll.c \
+                        util/apptimer/apptimer.c \
+                        util/avl/avl.c \
+                        util/avl/tree_api.c \
+                        util/avl/avl_util.c \
+                        nim/nim_util.c \
+                        nim/nim_intf_api.c \
+                        nim/nim_intf_map_api.c \
+                        nim/nim_startup.c \
+                        nim/nim_events.c \
+                        nim/nim_trace.c \
+                        nim/nim_ifindex.c \
+                        nim/nim_outcalls.c \
+                        nim/nim_config.c \
+                        nim/nim_cnfgr.c \
+                        nim/nim_debug.c \
+                        nim/nim_data.c \
+                        fpnim.cpp \
+                        nimsync.cpp \
+                        sim/sim.cpp \
+                        sysapi/sysapi_hpc.c \
+                        sysapi/sysapi.c \
+                        sysapi/sysapi_if_net.c \
+                        util/md5/md5.c \
+                        util/utils/util.c \
+                        util/buff/buff.c \
+                        fpSonicUtils.cpp
+#AM_CPPFLAGS  = -I$(top_srcdir)/inc
+DBGFLAGS = -ggdb -DDEBUG
+AM_CPPFLAGS  = -Iinc -I $(top_srcdir) -I/usr/include/libnl3 -I/usr/include/swss $(DBGFLAGS) $(SONIC_COMMON_CFLAGS)
+AM_LDFLAGS = -lnl-3 -lrt -pthread $(SONIC_COMMON_LDFLAGS) -lelf $(LIBNL_LIBS) -Wl,-Bsymbolic
diff --git a/src/sonic-pac/fpinfra/configure.ac b/src/sonic-pac/fpinfra/configure.ac
new file mode 100644
index 00000000000..ba6367101ad
--- /dev/null
+++ b/src/sonic-pac/fpinfra/configure.ac
@@ -0,0 +1,61 @@
+AC_INIT([fpinfra], [1.0], [prabhu.sreenivasan@broadcom.com])
+AM_INIT_AUTOMAKE([-Wall -Werror foreign])
+AC_PROG_CC
+AC_PROG_RANLIB
+AM_PROG_AR
+AC_PROG_LIBTOOL
+
+LDFLAGS="-Wl,--no-undefined $LDFLAGS"
+AC_SUBST([LDFLAGS])
+
+CFLAGS_COMMON=""
+CFLAGS_COMMON+=" -ansi"
+CFLAGS_COMMON+=" -fPIC"
+CFLAGS_COMMON+=" -std=c++11"
+CFLAGS_COMMON+=" -Wall"
+CFLAGS_COMMON+=" -Wcast-align"
+CFLAGS_COMMON+=" -Wcast-qual"
+CFLAGS_COMMON+=" -Wconversion"
+CFLAGS_COMMON+=" -Wdisabled-optimization"
+CFLAGS_COMMON+=" -Werror"
+CFLAGS_COMMON+=" -Wextra"
+CFLAGS_COMMON+=" -Wfloat-equal"
+CFLAGS_COMMON+=" -Wformat=2"
+CFLAGS_COMMON+=" -Wformat-nonliteral"
+CFLAGS_COMMON+=" -Wformat-security"
+CFLAGS_COMMON+=" -Wformat-y2k"
+CFLAGS_COMMON+=" -Wimport"
+CFLAGS_COMMON+=" -Winit-self"
+CFLAGS_COMMON+=" -Winvalid-pch"
+CFLAGS_COMMON+=" -Wlong-long"
+CFLAGS_COMMON+=" -Wmissing-field-initializers"
+CFLAGS_COMMON+=" -Wmissing-format-attribute"
+CFLAGS_COMMON+=" -Wmissing-include-dirs"
+CFLAGS_COMMON+=" -Wmissing-noreturn"
+CFLAGS_COMMON+=" -Wno-aggregate-return"
+CFLAGS_COMMON+=" -Wno-padded"
+CFLAGS_COMMON+=" -Wno-switch-enum"
+CFLAGS_COMMON+=" -Wno-unused-parameter"
+CFLAGS_COMMON+=" -Wpacked"
+CFLAGS_COMMON+=" -Wpointer-arith"
+CFLAGS_COMMON+=" -Wredundant-decls"
+CFLAGS_COMMON+=" -Wshadow"
+CFLAGS_COMMON+=" -Wstack-protector"
+CFLAGS_COMMON+=" -Wstrict-aliasing=3"
+CFLAGS_COMMON+=" -Wswitch"
+CFLAGS_COMMON+=" -Wswitch-default"
+CFLAGS_COMMON+=" -Wunreachable-code"
+CFLAGS_COMMON+=" -Wunused"
+CFLAGS_COMMON+=" -Wvariadic-macros"
+CFLAGS_COMMON+=" -Wno-write-strings"
+CFLAGS_COMMON+=" -Wno-missing-format-attribute"
+CFLAGS_COMMON+=" -Wno-long-long"
+
+AC_SUBST(CFLAGS_COMMON)
+
+
+AC_CONFIG_FILES([
+Makefile
+])
+AC_OUTPUT
+
diff --git a/src/sonic-pac/fpinfra/nim/nim_cnfgr.c b/src/sonic-pac/fpinfra/nim/nim_cnfgr.c
new file mode 100755
index 00000000000..d83618ee0ab
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_cnfgr.c
@@ -0,0 +1,515 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "pacinfra_common.h"
+#include "nim_data.h"
+#include "nim_cnfgr.h"
+#include "nim_util.h"
+#include "nim_events.h"
+#include "nimapi.h"
+//#include "nim.h"
+//#include "sysapi.h"
+#include "platform_config.h"
+#include "nim_config.h"
+#include "avl_api.h"
+#include "tree_api.h"
+#include "osapi.h"
+#include "osapi_sem.h"
+#include "nim_ifindex.h"
+#include "nim_startup.h"
+
+
+
+/*********************************************************************
+*
+* @purpose  Compare two USP AVL keys and determine Greater, Less, or Equal
+*
+* @param    a    a void pointer to an AVL key comprised of a USP structure
+* @param    b    a void pointer to an AVL key comprised of a USP structure
+* @param    len  the length of the key in bytes (unused)
+*                            
+* @returns  1 if a > b
+* @returns  -1 if a < b
+* @returns  0 if a == b
+*
+* @notes    This function is used as a custom comparator in the
+*           nimUspTreeData AVL tree.  It is also used by the
+*           custom comparator used by the custom comparator
+*           used in the nimConfigIdTreeData AVL tree.  The 'len'
+*           parameter is unused because the length of a USP is
+*           known, however, it is required for compatibility with
+*           the comparator type definition.
+*
+* @end
+*********************************************************************/
+static int nimUspCompare(const void *a, const void *b, size_t len)
+{
+  nimUSP_t *ua = (nimUSP_t *)a;
+  nimUSP_t *ub = (nimUSP_t *)b;
+
+  if (ua->unit < ub->unit)
+  {
+    return -1;
+  }
+  if (ua->unit > ub->unit)
+  {
+    return 1;
+  }
+  if (ua->slot < ub->slot)
+  {
+    return -1;
+  }
+  if (ua->slot > ub->slot)
+  {
+    return 1;
+  }
+  if (ua->port < ub->port)
+  {
+    return -1;
+  }
+  if (ua->port > ub->port)
+  {
+    return 1;
+  }
+  return 0;
+}
+
+/*********************************************************************
+*
+* @purpose  Compare two nimConfigId_t AVL keys and determine Greater,
+*           Less, or Equal
+*
+* @param    a    a void pointer to an AVL key comprised of a nimConfigId_t
+* @param    b    a void pointer to an AVL key comprised of a nimConfigId_t
+* @param    len  the length of the key in bytes (unused)
+*                            
+* @returns  1 if a > b
+* @returns  -1 if a < b
+* @returns  0 if a == b
+*
+* @notes    This function is used as a custom comparator in the
+*           in the nimConfigIdTreeData AVL tree.  The 'len'
+*           parameter is unused because the length of a nimConfigId_t
+*           is known, however, it is required for compatibility with
+*           the comparator type definition.
+*
+* @end
+*********************************************************************/
+static int nimConfigIdCompare(const void *a, const void *b, size_t len)
+{
+  nimConfigID_t *id_a = (nimConfigID_t *)a;
+  nimConfigID_t *id_b = (nimConfigID_t *)b;
+
+  if (id_a->type < id_b->type)
+  {
+    return -1;
+  }
+  if (id_a->type > id_b->type)
+  {
+    return 1;
+  }
+  /*
+   * The types are the same, so compare them based on type...
+   */
+  switch (id_a->type)
+  {
+    case  PHYSICAL_INTF:
+    case  STACK_INTF:
+    case  CPU_INTF:
+      return nimUspCompare(&id_a->configSpecifier.usp,
+                        &id_b->configSpecifier.usp,
+                        sizeof(nimUSP_t));
+    case  LAG_INTF:
+      return avlCompareULong32(&id_a->configSpecifier.dot3adIntf,
+                             &id_b->configSpecifier.dot3adIntf,
+                             sizeof(uint32));
+    case  LOGICAL_VLAN_INTF:
+      return avlCompareULong32(&id_a->configSpecifier.vlanId,
+                             &id_b->configSpecifier.vlanId,
+                             sizeof(uint32));
+    case  LOOPBACK_INTF:
+      return avlCompareULong32(&id_a->configSpecifier.loopbackId,
+                             &id_b->configSpecifier.loopbackId,
+                             sizeof(uint32));
+    case  TUNNEL_INTF:
+      return avlCompareULong32(&id_a->configSpecifier.tunnelId,
+                             &id_b->configSpecifier.tunnelId,
+                             sizeof(uint32));
+
+    case  SERVICE_PORT_INTF:
+      return avlCompareULong32(&id_a->configSpecifier.servicePortId,
+                           &id_b->configSpecifier.servicePortId,
+                           sizeof(uint32));
+    default:
+      /*
+       * A node with an invalid type is a critical error.
+       */
+      NIM_LOG_ERROR("Bad config id type");
+      return 0;
+  }
+}
+
+/*********************************************************************
+* @purpose  phase 1 to Initialize Network Interface Manager component   
+*
+* @param    void
+*
+* @returns  void
+*
+* @notes    none
+*       
+* @end
+*********************************************************************/
+RC_t   nimPhaseOneInit()
+{
+  RC_t rc =  SUCCESS;
+
+  do
+  {
+
+    /* Not to be freed during operation */
+    nimCtlBlk_g = osapiMalloc( NIM_COMPONENT_ID, sizeof(nimSystemData_t));
+
+    if (nimCtlBlk_g ==  NULL)
+    {
+      NIM_LOG_ERROR("NIM Control block not created\n");
+      rc =  FAILURE;
+      break;
+    }
+    else
+    {
+      /* all pointers and data with nimCtlBlk_g are to be set to 0 */
+      memset((void *) nimCtlBlk_g, 0, sizeof (nimSystemData_t));
+      //nimLoggingSet(0);
+    }
+
+    if (nimStartTask() !=  SUCCESS)
+    {
+      NIM_LOG_ERROR("NIM: Tasks and queues not created\n");
+      rc =  FAILURE;
+      break;
+    }
+
+    /* Allocate and initialize the necessary data elements of nimCtlBlk_g for 
+       for phase 1 */
+    nimCtlBlk_g->maxNumOfUnits                  = /*platUnitTotalMaxPerStackGet()*/  MAX_UNITS_PER_STACK;
+    nimCtlBlk_g->maxNumOfSlotsPerUnit           = /*platSlotTotalMaxPerUnitGet()*/  MAX_SLOTS_PER_UNIT;
+    nimCtlBlk_g->maxNumOfPhysicalPortsPerSlot   = /*platSlotMaxPhysicalPortsPerSlotGet()*/  MAX_PHYSICAL_PORTS_PER_SLOT;
+
+    nimCtlBlk_g->nimNotifyList = osapiMalloc( NIM_COMPONENT_ID, sizeof(nimNotifyList_t) *  LAST_COMPONENT_ID);
+
+    /* Not to be freed during operation */
+    if (nimCtlBlk_g->nimNotifyList ==  NULL)
+    {
+      NIM_LOG_ERROR("NIM registrant notification list not created\n");
+      rc =  FAILURE;
+      break;
+    }
+    else
+    {
+      memset(( void * )nimCtlBlk_g->nimNotifyList, 0, sizeof( nimNotifyList_t ) *  LAST_COMPONENT_ID ); 
+    }
+
+    /* Create NIM syncronization semaphore for the entire control block, should be used
+       during all accesses to the control block in order to prevent contention.  NIM can
+       be called at any time by multiple tasks */
+    if (osapiRWLockCreate(&nimCtlBlk_g->rwLock,  OSAPI_RWLOCK_Q_PRIORITY) !=  SUCCESS)
+    {
+      NIM_LOG_ERROR("NIM syncronization read write lock not created\n");
+      rc =  FAILURE;
+      break;
+    }
+
+    (void)nimIfIndexPhaseOneInit();
+    (void)nimStartUpPhaseOneInit();
+
+    /* Create the nimUSP AVL Tree */
+    if (avlAllocAndCreateAvlTree(&nimCtlBlk_g->nimUspTreeData,
+                                  NIM_COMPONENT_ID,
+                                 platIntfTotalMaxCountGet(),
+                                 sizeof(nimUspIntIfNumTreeData_t), 0x10,
+                                 nimUspCompare, sizeof(nimUSP_t)) !=  SUCCESS)
+    {
+      NIM_LOG_ERROR("NIM: Unable to allocate resources\n");
+      break; /* goto while */
+    }
+
+    /* Create the nimConfigId AVL Tree */
+    if (avlAllocAndCreateAvlTree(&nimCtlBlk_g->nimConfigIdTreeData,
+                                  NIM_COMPONENT_ID,
+                                 platIntfTotalMaxCountGet(),
+                                 sizeof(nimConfigIdTreeData_t), 0x10,
+                                 nimConfigIdCompare,
+                                 sizeof(nimConfigID_t)) !=  SUCCESS)
+    {
+      NIM_LOG_ERROR("NIM: Unable to allocate resources\n");
+      break; /* goto while */
+    }
+
+    /* enable the trace utility for NIM */
+    //nimTraceInit(NIM_TRACE_ENTRY_MAX, NIM_TRACE_ENTRY_SIZE_MAX);
+    //nimProfileInit();
+
+    /* Set the phase */
+    nimCtlBlk_g->nimPhaseStatus =  CNFGR_STATE_P1;
+
+  } while ( 0 );
+
+  return(rc) ;
+}
+
+/*********************************************************************
+* @purpose  phase 2 to Initialize Network Interface Manager component   
+*
+* @param    void
+*
+* @returns  void
+*
+* @notes    none
+*       
+* @end
+*********************************************************************/
+RC_t   nimPhaseTwoInit()
+{
+
+  RC_t   rc =  SUCCESS;
+
+  do
+  {
+    /* Initialize the remote interface support module */
+    /*rc = nimRifPhase2Init();
+
+    if (rc !=  SUCCESS)
+      break;*/
+
+    if ((rc = nimIntfDataAlloc()) !=  SUCCESS)
+    {
+      rc =  FAILURE;
+      break;
+    }
+
+    if (nimEventHdlrInit() !=  SUCCESS)
+    {
+      rc =  FAILURE;
+      break;
+    }
+
+    /* allocate the memory for the memory copy of the config file */
+    if (nimConfigPhase2Init() !=  SUCCESS)
+    {
+      rc =  FAILURE;
+      break;
+    }
+
+ 
+    nimCtlBlk_g->nimPhaseStatus =  CNFGR_STATE_P2;
+
+  } while (0);
+
+  return(rc);
+}
+
+
+/*********************************************************************
+* @purpose  phase 3 to Initialize Network Interface Manager component   
+*
+* @param    void
+*
+* @returns  void
+*
+* @notes    none
+*       
+* @end
+*********************************************************************/
+RC_t   nimPhaseThreeInit()
+{
+  RC_t           rc =  SUCCESS;  
+
+  nimCtlBlk_g->ifNumber = 0;
+  nimCtlBlk_g->ifTableLastChange = 0;
+  nimCtlBlk_g->nimHighestIntfNumber = 0;
+
+  /* read in the config file and set the datachanged flag appropriately */
+  //nimConfigInit();
+
+  //nimConfigIdTreePopulate();
+
+  nimCtlBlk_g->nimPhaseStatus =  CNFGR_STATE_P3;
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  phase 5(exec) to Initialize Network Interface Manager component
+*
+* @param    void
+*
+* @returns  void
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t   nimPhaseExecInit()
+{
+  RC_t           rc =  SUCCESS;
+
+  nimCtlBlk_g->nimPhaseStatus =  CNFGR_STATE_E;
+
+  return(rc);
+}
+
+
+/*********************************************************************
+* @purpose  Allocate all of the interface related data
+*
+* @param    none
+*
+* @returns  RC_t  Returns  SUCCESS or  ERROR
+*
+* @notes    none
+*       
+* @end
+*********************************************************************/
+RC_t nimIntfDataAlloc()
+{
+  RC_t               rc =  SUCCESS;  
+
+  do
+  {
+    /* Not freed during operation */
+    nimCtlBlk_g->nimPorts = osapiMalloc( NIM_COMPONENT_ID, sizeof(nimIntf_t) * (platIntfTotalMaxCountGet() + 1));
+
+    if (nimCtlBlk_g->nimPorts ==  NULLPTR)
+    {
+      NIM_LOG_ERROR("NIM: unable to alloc memory for nimPorts\n");
+      rc =  FAILURE;
+      break;
+    }
+    else
+    {
+      /* reset the global data to known state */
+      memset(( void * )nimCtlBlk_g->nimPorts, 
+             0, 
+             sizeof( nimIntf_t ) * (platIntfTotalMaxCountGet() + 1)); 
+    }
+
+    /* allocate/initialize the memory to store the number of ports per unit that have been created 
+        Not freed during operation */
+    nimCtlBlk_g->nimNumberOfPortsPerUnit = (uint32*)osapiMalloc( NIM_COMPONENT_ID, sizeof(uint32)*(nimCtlBlk_g->maxNumOfUnits+1));
+
+    if (nimCtlBlk_g->nimNumberOfPortsPerUnit ==  NULL)
+    {
+      NIM_LOG_ERROR("NIM:Couldn't allocate memory for nimNumberOfPortPerUnit\n");
+      rc =  FAILURE;
+      break;
+    }
+    else
+    {
+      memset((void*)nimCtlBlk_g->nimNumberOfPortsPerUnit, 0 , (sizeof(uint32)*(nimCtlBlk_g->maxNumOfUnits+1)));
+    }
+
+    /* Not freed during operation */
+    nimCtlBlk_g->nimVlanSlotsInfo = osapiMalloc( NIM_COMPONENT_ID, sizeof(nimUSP_t)*platIntfVlanIntfMaxCountGet());
+
+    if (nimCtlBlk_g->nimVlanSlotsInfo ==  NULLPTR)
+    {
+      NIM_LOG_ERROR("NIM: unable to alloc nimVlanSlotsInfo\n");
+      rc =  FAILURE;
+      break;
+    }
+    else
+    {
+      memset((void *)nimCtlBlk_g->nimVlanSlotsInfo, 0, sizeof(nimUSP_t)*platIntfVlanIntfMaxCountGet());
+    }
+
+    /* Not freed during operation */
+    nimCtlBlk_g->numberOfInterfacesByType = osapiMalloc( NIM_COMPONENT_ID, sizeof(uint32)* MAX_INTF_TYPE_VALUE);
+
+    if (nimCtlBlk_g->numberOfInterfacesByType ==  NULLPTR)
+    {
+      NIM_LOG_ERROR("NIM: unable to alloc numberOfInterfacesByType\n");
+      rc =  FAILURE;
+      break;
+    }
+    else
+    {
+      memset((void *)nimCtlBlk_g->numberOfInterfacesByType, 0, sizeof(uint32)* MAX_INTF_TYPE_VALUE);
+    }
+
+    nimCtlBlk_g->intfTypeData = osapiMalloc ( NIM_COMPONENT_ID, sizeof(nimIntfTypeData_t) *  MAX_INTF_TYPE_VALUE);
+    if (nimCtlBlk_g->intfTypeData ==  NULLPTR)
+    {
+      LOG_ERROR (0);
+    }
+
+  }while (0);
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Initialize and start Card Manager Task function.
+*
+* @param    none
+*
+* @returns  RC_t  Returns  SUCCESS or  ERROR
+*
+* @notes    none
+*       
+* @end
+*********************************************************************/
+RC_t nimStartTask()
+{
+
+  RC_t rc =  SUCCESS;
+   LOGF( LOG_SEVERITY_NOTICE, "nimStartTask started");
+
+  do
+  {
+
+    nimCtlBlk_g->nimMsgQueue = (void *)osapiMsgQueueCreate("NIM-Q",/*nimSidMsgCountGet()*/ 16000,
+                                                           (uint32)sizeof(nimPdu_t));
+    if (nimCtlBlk_g->nimMsgQueue ==  NULLPTR)
+    {
+      NIM_LOG_ERROR("NIM queue not created\n");
+      rc =  FAILURE;
+      break;
+    }
+
+    nimCtlBlk_g->taskId = osapiTaskCreate("nim_t",nimTask,0, 0, 
+                                          /* nimSidTaskStackSizeGet()*/  DEFAULT_STACK_SIZE, 
+                                          /*nimSidTaskPriorityGet()*/  DEFAULT_TASK_PRIORITY, 
+                                          /*nimSidTaskSliceGet()*/  DEFAULT_TASK_SLICE);    
+    if (nimCtlBlk_g->taskId == 0)
+    {
+      NIM_LOG_ERROR("NIM task not created.\n");
+      rc =  FAILURE;
+      break;
+    }
+
+    if (osapiWaitForTaskInit ( NIM_TASK_SYNC,  WAIT_FOREVER) !=  SUCCESS)
+    {
+      NIM_LOG_ERROR("NIM: Could not sync the TASK\n");
+      rc =  FAILURE;
+      break;
+    }
+
+  } while ( 0 );
+  return(rc);
+}
+
diff --git a/src/sonic-pac/fpinfra/nim/nim_config.c b/src/sonic-pac/fpinfra/nim/nim_config.c
new file mode 100755
index 00000000000..2d5114bf847
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_config.c
@@ -0,0 +1,704 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+
+#include "pacinfra_common.h"
+#include "osapi.h"
+#include "defaultconfig.h"
+#include "product.h"
+#include "nim_data.h"
+#include "nim_config.h"
+#include "nim_util.h"
+#include "platform_config.h"
+#include "system_exports.h"
+#include "nim_exports.h"
+
+/*********************************************************************
+* @purpose  Allocate the memory for the memory copy of the config file
+*
+* @param    void
+*
+* @returns  void
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimConfigPhase2Init(void)
+{
+  uint32 fileSize = 0;
+  RC_t rc  =  SUCCESS;
+
+  fileSize = sizeof(nimConfigData_t) +
+             (sizeof(nimCfgPort_t)*(platIntfTotalMaxCountGet()+1)) + sizeof(uint32);
+
+  /* allocate/initialize the memory to store the configuration data
+      Not freed during operation */
+
+  nimCtlBlk_g->nimConfigData = (nimConfigData_t *) osapiMalloc( NIM_COMPONENT_ID, fileSize);
+
+  if (nimCtlBlk_g->nimConfigData ==  NULL)
+  {
+    NIM_LOG_ERROR("NIM:Couldn't allocate memory for the nimConfigData\n");
+    return( FAILURE);
+  }
+  else
+  {
+    memset((void*)nimCtlBlk_g->nimConfigData, 0,fileSize);
+  }
+
+  if ((rc = nimConfigFileOffsetsSet()) ==  SUCCESS)
+    rc = nimConfigFileHdrCreate();
+
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  initialize the config structures during phase 3 init
+*
+* @param    void
+*
+* @returns  void
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+void nimConfigInit(void)
+{
+
+  uint32             headerSize, totalPortsSize,bufferSize;
+  RC_t               rc =  FAILURE;
+
+  headerSize = sizeof(nimConfigData_t);
+  totalPortsSize = sizeof(nimCfgPort_t) * (platIntfTotalMaxCountGet() + 1);
+  bufferSize = headerSize + totalPortsSize + sizeof(uint32);
+  /*
+   *  allocate memory for the first part of the file to find how
+   *  interfaces were last created on this unit
+   */
+
+  if (nimCtlBlk_g->nimConfigData !=  NULLPTR)
+  {
+    /*rc = sysapiCfgFileGet( NIM_COMPONENT_ID, nimCtlBlk_g->nimFileName,
+                          ( char8 *)nimCtlBlk_g->nimConfigData, bufferSize,
+                          nimCtlBlk_g->nimConfigData->checkSum, NIM_CFG_VER_CURRENT,
+                          nimConfigFileDefaultCreate);
+
+    if (rc !=  SUCCESS)
+    {
+      NIM_LOG_ERROR("NIM: Failed to read the config data\n");
+    }
+    else if ((rc = nimConfigFileOffsetsSet()) !=  SUCCESS)
+    {
+      NIM_LOG_ERROR("NIM: Failed to set the offsets in the config file\n");
+    }
+    else*/
+    {
+      /* nothing to do */
+      if (nimCtlBlk_g->nimConfigData->numOfInterfaces != platIntfTotalMaxCountGet())
+      {
+        nimConfigFileDefaultCreate(NIM_CFG_VER_CURRENT);
+      }
+    }
+  }
+  else
+  {
+    NIM_LOG_ERROR("NIM: Memory not created for config file\n");
+    /* need an error handler here */
+  }
+
+  return;
+}
+
+/*********************************************************************
+* @purpose  Setup the config file name
+*
+* @param    void
+*
+* @returns   SUCCESS  Success or sysapiRegistrGet error code
+*
+* @notes
+*
+*
+* @end
+*
+*********************************************************************/
+RC_t nimFileSetup(void)
+{
+  sprintf (( char8 *)nimCtlBlk_g->nimFileName, "%s",
+           NIM_CFG_FILE_NAME);
+
+  return( SUCCESS);
+}
+
+/*********************************************************************
+* @purpose  Saves all nim user config file to NVStore
+*
+* @param    void
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if error from osapiFsWrite
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimSave(void)
+{
+  uint32 rc= SUCCESS;
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Checks if nim user config data has changed
+*
+* @param    void
+*
+* @returns   TRUE or  FALSE
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+ BOOL nimHasDataChanged(void)
+{
+  if (nimPhaseStatusCheck() !=  TRUE) return( FALSE);
+
+  return(nimCtlBlk_g->nimConfigData->cfgHdr.dataChanged);
+}
+
+void nimResetDataChanged(void)
+{
+  nimCtlBlk_g->nimConfigData->cfgHdr.dataChanged =  FALSE;
+  return;
+}
+
+/*********************************************************************
+* @purpose  Creates an unique interface id
+*
+* @param    usp         @b{(input)}  Pointer to nimUSP_t structure
+* @param    configId    @b{(output)} Pointer to the new config ID
+*
+* @returns   SUCCESS or  FALIURE
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimConfigIdCreate(nimUSP_t *usp, nimConfigID_t *configId)
+{
+  if (nimPhaseStatusCheck() !=  TRUE) return( ERROR);
+
+  memset((void*)configId,0,sizeof(nimConfigID_t));
+
+  configId->configSpecifier.usp.unit = usp->unit;
+  configId->configSpecifier.usp.slot = usp->slot;
+  configId->configSpecifier.usp.port = usp->port;
+
+  return( SUCCESS);
+}
+
+/*********************************************************************
+* @purpose  Migrate the config data
+*
+* @param    savedVersion  @b{(input)} version of the present config file
+* @param    newVersion    @b{(input)} version to convert to
+* @param    buffer        @b{(input)} the buffer of the cfg file
+*
+* @returns   SUCCESS or  FALIURE
+*
+* @notes    Since this is the first release of Stacking, no migration to do
+*
+* @end
+*********************************************************************/
+void nimConfigConvert(uint32 savedVersion,uint32 newVersion, char8 *buffer)
+{
+
+  /*
+   *  allocate memory for the first part of the file to find how
+   *  interfaces were last created on this unit
+   */
+
+  switch (savedVersion)
+  {
+    case NIM_CFG_VER_1:
+    default:
+      switch (newVersion)
+      {
+        case NIM_CFG_VER_2:
+        default:
+
+          nimConfigFileDefaultCreate(NIM_CFG_VER_CURRENT);
+
+          break;
+      }
+      break;
+  }
+
+  nimCtlBlk_g->nimConfigData->cfgHdr.dataChanged =  TRUE;
+
+
+}
+
+/*********************************************************************
+* @purpose  Set either the saved config or the default config in the interface
+*
+* @param    port        @b{(input)}   The interface being manipulated
+* @param    cfgVersion  @b{(input)}   version of the config
+*
+* @returns   SUCCESS or  FALIURE
+*
+* @notes
+*
+* @end
+*********************************************************************/
+RC_t nimConfigSet(nimIntf_t *port, uint32 cfgVersion)
+{
+  nimCfgPort_t    *localConfigData;
+  nimConfigID_t   configInterfaceId;
+  uint32        numOfInterfaces;
+   BOOL          configDataFound =  FALSE;
+  uint32        counter;
+  RC_t   rc =  SUCCESS;
+
+  if ((nimCtlBlk_g ==  NULLPTR) || (nimCtlBlk_g->nimConfigData ==  NULLPTR))
+  {
+    NIM_LOG_ERROR("NIM: Control block or config data not valid\n");
+    rc = ( ERROR);
+  }
+  else
+  {
+
+    localConfigData = nimCtlBlk_g->nimConfigData->cfgPort;
+
+    numOfInterfaces = nimCtlBlk_g->nimConfigData->numOfInterfaces;
+
+    NIM_CONFIG_ID_COPY(&configInterfaceId ,&port->configInterfaceId);
+
+    /* see if the config for the interface exists in the file */
+    for (counter = 0; counter <= numOfInterfaces; counter++)
+    {
+      if (NIM_CONFIG_ID_IS_EQUAL(&localConfigData[counter].configInterfaceId,&configInterfaceId))
+      {
+        NIM_EXP_PORT_DBG("For interface %d port mode in startup cfg %d %d\n", 
+                         port->intfNo,             
+                         NIM_EXP_PORT_MODE_GET(localConfigData[counter].cfgInfo.portModeFlags),
+                         NIM_EXP_PORT_MODE_STATUS_GET(localConfigData[counter].cfgInfo.portModeFlags));
+        memcpy(&port->configPort,&localConfigData[counter],sizeof(nimCfgPort_t));
+        configDataFound =  TRUE;
+        break;
+      }
+    }
+
+    if (configDataFound ==  FALSE)
+    {
+      /* use the default config as determined before */
+      memcpy(&port->configPort.cfgInfo,&port->defaultCfg,sizeof(nimIntfConfig_t));
+      NIM_CONFIG_ID_COPY(&port->configPort.configInterfaceId,&port->configInterfaceId);
+      port->configPort.configIdMaskOffset = port->intfNo;
+#if  FEAT_DYNAMIC_PORTS
+      /* Since we dont replace the defaultCfg values when dynamic caps
+         are on, we have to ensure that the static defaultCfg is not
+         copied to config values if dynamic caps are present. Another
+         approach would be to replace defaultCfg but in that case we
+         have to replace the defaults back when dynamic cap is turned
+         off. */
+      if (port->dynamicCap)
+      {
+        DYN_PORT_TRACE("Updating config with dynamic defaults because dynamic Caps are present\n");
+        port->configPort.cfgInfo.ifSpeed = port->capabilityCfg.ifSpeed;
+        port->configPort.cfgInfo.negoCapabilities = port->capabilityCfg.negoCapabilities;
+        DYN_PORT_TRACE("New default speed 0x%x, AutoNegCap 0x%x\n",
+                       port->configPort.cfgInfo.ifSpeed,
+                       port->configPort.cfgInfo.negoCapabilities);
+      }
+#endif
+    }
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  apply the config to the system
+*
+* @param    intIfNum    @b{(input)}   The intenal interface to apply
+*
+* @returns   SUCCESS or  FALIURE
+*
+* @notes
+*
+* @end
+*********************************************************************/
+
+RC_t nimIntfConfigApply(uint32 intIfNum)
+{
+  uint32 rc =  SUCCESS;
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Get the default config for the interface
+*
+* @param    intfDescr   @b{(input)}   A description of the interface being created
+* @param    defaultCfg  @b{(output)}  The created config
+*
+* @returns   SUCCESS or  FALIURE
+*
+* @notes    Since this is the first release of Stacking, no migration to do
+*
+* @end
+*********************************************************************/
+RC_t nimConfigDefaultGet(nimIntfDescr_t *intfDescr, nimIntfConfig_t *defaultCfg)
+{
+  RC_t rc =  SUCCESS;
+
+  memset(defaultCfg->LAAMacAddr.addr, 0, 6);
+
+  defaultCfg->addrType    = FD_NIM_MACTYPE;
+
+  osapiStrncpySafe(defaultCfg->ifAlias, FD_NIM_IF_ALIAS, sizeof(defaultCfg->ifAlias));
+
+  defaultCfg->trapState   = FD_NIM_TRAP_STATE;
+
+  defaultCfg->encapsType  = FD_NIM_ENCAPSULATION_TYPE;
+
+  defaultCfg->mgmtAdminState  = FD_NIM_ADMIN_STATE;
+  defaultCfg->softShutdownState  = FD_NIM_SOFT_SHUT_STATE;
+  defaultCfg->adminState  = FD_NIM_ADMIN_STATE;
+
+  defaultCfg->nameType    = FD_NIM_NAME_TYPE;
+
+  defaultCfg->ipMtu = FD_NIM_DEFAULT_MTU_SIZE;
+
+  defaultCfg->cfgMaxFrameSize = nimCtlBlk_g->nimSystemMtu;
+
+  defaultCfg->fecMode =  DISABLE;
+
+  if ((intfDescr->settableParms &  INTF_PARM_FEC_MODE) ==  INTF_PARM_FEC_MODE)
+  {
+    defaultCfg->fecMode = FD_NIM_DEFAULT_INTERFACE_FORWARD_ERROR_CORRECTION_MODE;
+  }
+
+  defaultCfg->ltMode =  DISABLE;
+
+  if ((intfDescr->settableParms &  INTF_PARM_LT_MODE) ==  INTF_PARM_LT_MODE)
+  {
+    defaultCfg->ltMode = FD_NIM_DEFAULT_LINK_TRAINING_MODE;
+  }
+
+  if (  PHY_CAP_PORTSPEED_AUTO_NEG_CHECK(intfDescr->phyCapability) &&
+      ! PHY_CAP_AUTO_CONFIG_CHECK(intfDescr->phyCapability))
+  {
+#ifdef  NIM_AUTONEG_SUPPORT_DISABLE_DEFAULT
+    if ((intfDescr->ianaType ==  IANA_100G_ETHERNET) ||
+        (intfDescr->ianaType ==  IANA_50G_ETHERNET))
+    {
+      defaultCfg->negoCapabilities =  0;
+      defaultCfg->cfgNegoCapabilities =  0;
+    }
+    else
+    {
+      defaultCfg->negoCapabilities =   PORT_NEGO_CAPABILITY_ALL;
+      defaultCfg->cfgNegoCapabilities =   PORT_NEGO_CAPABILITY_ALL;
+    }
+#else
+    defaultCfg->negoCapabilities =   PORT_NEGO_CAPABILITY_ALL;
+    defaultCfg->cfgNegoCapabilities =   PORT_NEGO_CAPABILITY_ALL;
+#endif
+  }
+  else
+  {
+    defaultCfg->negoCapabilities =  0;
+    defaultCfg->cfgNegoCapabilities =  0;
+  }
+  
+  if ( PHY_CAP_COMBO_PREFERENCE_CHECK(intfDescr->phyCapability))
+  {
+    defaultCfg->forceMedium = FD_NIM_DEFAULT_COMBO_FORCE;
+    defaultCfg->comboPref   = FD_NIM_DEFAULT_COMBO_PREFER;
+  }
+
+  switch (intfDescr->ianaType)
+  {
+    case  IANA_FAST_ETHERNET:
+      defaultCfg->ifSpeed = FD_NIM_FAST_ENET_SPEED;
+      break;
+
+    case  IANA_FAST_ETHERNET_FX:
+      defaultCfg->ifSpeed = FD_NIM_FAST_ENET_FX_SPEED;
+      break;
+
+    case  IANA_GIGABIT_ETHERNET:
+      if(!( PHY_CAP_PORTSPEED_FULL_100_CHECK(intfDescr->phyCapability)))
+      {
+        defaultCfg->ifSpeed = FD_NIM_GIG_ENET_SPEED;
+      }
+      else
+      {
+        defaultCfg->ifSpeed = FD_NIM_FAST_ENET_SPEED;
+      }
+      break;
+
+    case  IANA_2P5G_ETHERNET:
+      if ( PHY_CAP_PORTSPEED_AUTO_NEG_CHECK(intfDescr->phyCapability))
+      {
+        defaultCfg->ifSpeed = FD_NIM_2P5G_ENET_SPEED;
+      }
+      else
+      {
+        defaultCfg->ifSpeed =  FD_NIM_NO_NEG_2P5G_ENET_SPEED;
+      }
+      break;
+
+    case  IANA_5G_ETHERNET:
+      if ( PHY_CAP_PORTSPEED_AUTO_NEG_CHECK(intfDescr->phyCapability))
+      {
+        defaultCfg->ifSpeed = FD_NIM_5G_ENET_SPEED;
+      }
+      else
+      {
+        defaultCfg->ifSpeed =  FD_NIM_NO_NEG_5G_ENET_SPEED;
+      }
+      break;
+
+    case  IANA_10G_ETHERNET:
+      if ( PHY_CAP_PORTSPEED_AUTO_NEG_CHECK(intfDescr->phyCapability))
+      {
+        defaultCfg->ifSpeed = FD_NIM_10G_ENET_SPEED;
+      }
+      else
+      {
+        defaultCfg->ifSpeed =  FD_NIM_NO_NEG_10G_ENET_SPEED;
+      }
+      break;
+
+    case  IANA_20G_ETHERNET:
+      defaultCfg->ifSpeed = FD_NIM_20G_ENET_SPEED;
+      break;
+
+    case  IANA_25G_ETHERNET:
+      defaultCfg->ifSpeed = FD_NIM_25G_ENET_SPEED;
+      break;
+
+    case  IANA_40G_ETHERNET:
+      defaultCfg->ifSpeed = FD_NIM_40G_ENET_SPEED;
+      break;
+
+    case  IANA_50G_ETHERNET:
+      defaultCfg->ifSpeed = FD_NIM_50G_ENET_SPEED;
+      break;
+
+    case  IANA_100G_ETHERNET:
+      defaultCfg->ifSpeed = FD_NIM_100G_ENET_SPEED;
+      break;
+
+    case  IANA_200G_ETHERNET:
+      defaultCfg->ifSpeed = FD_NIM_200G_ENET_SPEED;
+      break;
+
+    case  IANA_400G_ETHERNET:
+      defaultCfg->ifSpeed = FD_NIM_400G_ENET_SPEED;
+      break;
+
+    case  IANA_LAG:
+      defaultCfg->trapState           = FD_DOT3AD_LINK_TRAP_MODE;
+      defaultCfg->adminState          = FD_DOT3AD_ADMIN_MODE;
+      defaultCfg->ifSpeed             =  PORTCTRL_PORTSPEED_LAG;
+      /* Negotiation capabilities not applicable to LAGs. The following also disables auto-negotiation. */
+      defaultCfg->negoCapabilities    = 0;
+      break;
+
+    case  IANA_L2_VLAN:
+      defaultCfg->adminState          =  ENABLE;
+      defaultCfg->trapState           =  DISABLE;
+      defaultCfg->ifSpeed             = FD_DOT1Q_DEFAULT_VLAN_INTF_SPEED;
+      /* Negotiation capabilities not applicable to VLANs. The following also disables auto-negotiation. */
+      defaultCfg->negoCapabilities    = 0;
+      break;
+
+    case  IANA_OTHER_CPU:
+      defaultCfg->ifSpeed = FD_NIM_OTHER_PORT_TYPE_SPEED;
+      break;
+
+    case  IANA_OTHER_SERV_PORT:
+      defaultCfg->ifSpeed = FD_NIM_OTHER_PORT_TYPE_SPEED;
+      break;
+
+    default:
+      defaultCfg->ifSpeed = FD_NIM_OTHER_PORT_TYPE_SPEED;
+      break;
+  }
+
+  defaultCfg->nwIntfType = FD_NIM_DEFAULT_NETWORK_INTERFACE_TYPE;
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Sets the offsets for ports and crc in the config struct
+*
+* @param    none
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @notes    Since this is the first release of Stacking, no migration to do
+*
+* @end
+*********************************************************************/
+RC_t nimConfigFileOffsetsSet()
+{
+  RC_t rc =  SUCCESS;
+  uint32 fileSize = 0;
+   uchar8   *nimFile;
+  nimConfigData_t *tmpCfg;
+
+  /* sizeof the config structure + the malloc'd data + CRC */
+  fileSize = sizeof(nimConfigData_t) +
+             (sizeof(nimCfgPort_t)*(platIntfTotalMaxCountGet()+1)) + sizeof(uint32);
+
+  NIM_CRIT_SEC_WRITE_ENTER();
+
+  do
+  {
+    if (nimCtlBlk_g->nimConfigData ==  NULL)
+    {
+      NIM_LOG_ERROR("NIM: Config file not allocated during init\n");
+      rc =  FAILURE;
+      break;
+    }
+
+    nimFile = ( uchar8 *)nimCtlBlk_g->nimConfigData;
+
+    tmpCfg = nimCtlBlk_g->nimConfigData;
+
+    /* set the pointer to the cfgPort in the flat array */
+    tmpCfg->cfgPort = (nimCfgPort_t *) (nimFile + sizeof(nimConfigData_t));
+
+    /* set the pointer to the checksum in the flat array */
+    tmpCfg->checkSum = (uint32 *) (nimFile + fileSize - sizeof(uint32));
+
+
+  } while ( 0 );
+
+  NIM_CRIT_SEC_WRITE_EXIT();
+
+  return rc;
+
+
+}
+
+
+/*********************************************************************
+* @purpose  Sets the config file header
+*
+* @param    none
+*
+* @returns   SUCCESS or  FALIURE
+*
+* @notes    Since this is the first release of Stacking, no migration to do
+*
+* @end
+*********************************************************************/
+RC_t nimConfigFileHdrCreate()
+{
+  RC_t rc =  SUCCESS;
+   fileHdr_t  *myHdr;
+
+  NIM_CRIT_SEC_WRITE_ENTER();
+
+  do
+  {
+    if (nimCtlBlk_g ==  NULLPTR)
+    {
+      rc =  FAILURE;
+      NIM_LOG_ERROR("NIM: nimCtlBlk_g not allocated\n");
+      break;
+    }
+    else if (nimCtlBlk_g->nimConfigData ==  NULLPTR)
+    {
+      rc =  FAILURE;
+      NIM_LOG_ERROR("NIM: Config buffer not allocated\n");
+      break;
+    }
+
+    myHdr = &nimCtlBlk_g->nimConfigData->cfgHdr;
+
+    memset((void *)myHdr,0,sizeof( fileHdr_t));
+
+    myHdr->version = NIM_CFG_VER_CURRENT;
+
+    osapiStrncpySafe(myHdr->filename,NIM_CFG_FILE_NAME, MAX_FILENAME - 1);
+
+    myHdr->componentID =  NIM_COMPONENT_ID;
+
+    /* sizeof the config structure + the malloc'd data + CRC - File Hdr*/
+    myHdr->length = sizeof(nimConfigData_t) +
+                    (sizeof(nimCfgPort_t)*(platIntfTotalMaxCountGet()+1)) +
+                    sizeof(uint32) ;
+
+    nimCtlBlk_g->nimConfigData->numOfInterfaces = platIntfTotalMaxCountGet();
+
+
+  } while ( 0 );
+
+  NIM_CRIT_SEC_WRITE_EXIT();
+
+  return rc;
+
+
+}
+
+/*********************************************************************
+* @purpose  Get the default config for the interface
+*
+* @param    version   @b{(input)} The version to create a default for
+*
+* @returns  void
+*
+* @notes    Since this is the first release of Stacking, no migration to do
+*
+* @end
+*********************************************************************/
+void nimConfigFileDefaultCreate(uint32 version)
+{
+  uint32 nimHeaderSize,totalPortsSize,crcSize;
+
+  do
+  {
+    nimHeaderSize = sizeof(nimConfigData_t);
+    totalPortsSize = sizeof(nimCfgPort_t) * (platIntfTotalMaxCountGet() + 1);
+    crcSize = sizeof(uint32);
+    NIM_CRIT_SEC_WRITE_ENTER();
+    memset((void*)nimCtlBlk_g->nimConfigData,0,nimHeaderSize + totalPortsSize + crcSize);
+    /*nimCtlBlk_g->nimConfigData->nimDDisableAutorecoveryTimeout = FD_NIM_DEFAULT_DDISABLE_AUTORECOVERY_TIMEOUT;
+    nimCtlBlk_g->nimConfigData->nimDDisableStormControlAutorecoveryTimeout = FD_NIM_DEFAULT_DDISABLE_STORM_CONTROL_AUTORECOVERY_TIMEOUT;
+    nimCtlBlk_g->nimConfigData->nimDDisableAutorecoveryStatus = FD_NIM_DEFAULT_DDISABLE_AUTORECOVERY_STATUS;*/
+    NIM_CRIT_SEC_WRITE_EXIT();
+    nimConfigFileOffsetsSet();
+
+    nimConfigFileHdrCreate();
+    /* No need to protect the dataChanged as we have set it to 0
+     * and the above 2 function do not modify it */
+    nimCtlBlk_g->nimConfigData->cfgHdr.dataChanged =  FALSE;
+
+  } while ( 0 );
+
+  return;
+}
diff --git a/src/sonic-pac/fpinfra/nim/nim_data.c b/src/sonic-pac/fpinfra/nim/nim_data.c
new file mode 100644
index 00000000000..f176885c06f
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_data.c
@@ -0,0 +1,23 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define NIM_GLOBAL
+
+#include "pacinfra_common.h"
+#include "nim_data.h"
+
+/* Global Control block for all of NIMs data */
+nimSystemData_t *nimCtlBlk_g =  NULL;
diff --git a/src/sonic-pac/fpinfra/nim/nim_debug.c b/src/sonic-pac/fpinfra/nim/nim_debug.c
new file mode 100755
index 00000000000..c72126b4704
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_debug.c
@@ -0,0 +1,681 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "pacinfra_common.h"
+#include "sysapi_hpc.h"
+#include "osapi.h"
+#include "nim_data.h"
+#include "platform_config.h"
+#include "log.h"
+#include "utils_api.h"
+#include "nim_events.h"
+#include "nim_util.h"
+#include "nim_startup.h"
+#include "nim_debug.h"
+//#include "cnfgr_sid.h"
+
+#include <string.h>
+
+static  SYSAPI_HPC_PORT_DESCRIPTOR_t portData =
+{
+   IANA_GIGABIT_ETHERNET,
+   PORTCTRL_PORTSPEED_FULL_10GSX,
+   PHY_CAP_PORTSPEED_ALL,
+   /* MTRJ,*/
+   PORT_FEC_DISABLE,
+   CAP_FEC_NONE
+};
+
+
+extern RC_t   nimCmgrNewIntfChangeCallback(uint32 unit, uint32 slot, uint32 port,
+                                              uint32 cardType, PORT_EVENTS_t event,
+                                              SYSAPI_HPC_PORT_DESCRIPTOR_t *portData,
+                                                             enetMacAddr_t *macAddr);
+
+RC_t nimDebugPortCreate(uint32 unit,uint32 slot,uint32 port)
+{
+  RC_t   rc;
+   enetMacAddr_t macAddr;
+  macAddr.addr[0] = 01;
+  macAddr.addr[0] = 02;
+  macAddr.addr[0] = 03;
+  macAddr.addr[0] = 04;
+  macAddr.addr[0] = 05;
+  macAddr.addr[0] = 06;
+
+
+  rc = nimCmgrNewIntfChangeCallback(unit, slot, port, 0, CREATE,
+                                 &portData, &macAddr);
+  return(rc);
+}
+
+#if 0
+ uchar8 *
+nimDebugIntfTypeToString(uint32 sysIntfType)
+{
+   uchar8 *pName = "UNKNOWN";
+
+  switch (sysIntfType)
+  {
+    case  PHYSICAL_INTF:
+      pName = " PHYSICAL_INTF";
+      break;
+    case  STACK_INTF:
+      pName = " STACK_INTF";
+      break;
+    case  CPU_INTF:
+      pName = " CPU_INTF";
+      break;
+    case  MAX_PHYS_INTF_VALUE:
+      pName = " MAX_PHYS_INTF_VALUE";
+      break;
+    case  LAG_INTF:
+      pName = " LAG_INTF";
+      break;
+    case  UNUSED1_INTF:
+      pName = " UNUSED1_INTF";
+      break;
+    case  LOGICAL_VLAN_INTF:
+      pName = " LOGICAL_VLAN_INTF";
+      break;
+    case  LOOPBACK_INTF:
+      pName = " LOOPBACK_INTF";
+      break;
+    case  TUNNEL_INTF:
+      pName = " TUNNEL_INTF";
+      break;
+    case  SERVICE_PORT_INTF:
+      pName = " SERVICE_PORT_INTF";
+      break;
+    case  MAX_INTF_TYPE_VALUE:
+      pName = " MAX_INTF_TYPE_VALUE";
+      break;
+    default:
+      break;
+  }
+
+  return pName;
+}
+
+void nimDebugConfigIdPrint(nimConfigID_t *pCfgID)
+{
+  sysapiPrintf("configInterfaceId = type:%s, ",
+                nimDebugIntfTypeToString(pCfgID->type));
+  switch (pCfgID->type)
+  {
+    case  LOGICAL_VLAN_INTF:
+      sysapiPrintf("vlanId:%u\n", pCfgID->configSpecifier.vlanId);
+      break;
+    case  LAG_INTF:
+      sysapiPrintf("dot3adIntf:%u\n", pCfgID->configSpecifier.dot3adIntf);
+      break;
+    case  LOOPBACK_INTF:
+      sysapiPrintf("loopbackId:%u\n", pCfgID->configSpecifier.loopbackId);
+      break;
+    case  TUNNEL_INTF:
+      sysapiPrintf("tunnelId:%u\n", pCfgID->configSpecifier.tunnelId);
+      break;
+    case  SERVICE_PORT_INTF:
+      sysapiPrintf("servicePortId:%u\n", pCfgID->configSpecifier.servicePortId);
+      break;
+    default:
+      sysapiPrintf("usp:%d.%d.%d\n", pCfgID->configSpecifier.usp.unit,
+                   pCfgID->configSpecifier.usp.slot,
+                   pCfgID->configSpecifier.usp.port);
+      break;
+  }
+}
+
+void nimDebugDynamicCapPort(uint32 intIfNum)
+{
+  nimIntfDynConfig_t* dyncap =  &(nimCtlBlk_g->nimPorts[intIfNum].capabilityCfg);
+  if ( FALSE == nimCtlBlk_g->nimPorts[intIfNum].dynamicCap) 
+  {
+    sysapiPrintf("For intf %d, dynamic capabilities are off\n", intIfNum);
+    return;
+  }
+  sysapiPrintf("Last configured AutoNeg Capabilities - 0x%x\n",
+               nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.cfgNegoCapabilities);
+  sysapiPrintf("**** Dynamic Capabilities ********\n");
+  sysapiPrintf("For intf %d, dynspeed = 0x%x, AutoNegCap = 0x%x, AutoNeg State %d, Phy Cap = 0x%llx\n",
+               intIfNum,
+               dyncap->ifSpeed, dyncap->negoCapabilities, 
+               dyncap->ifAutoneg,
+               dyncap->dynCapabilities);
+  return;
+  
+}
+
+void nimDebugCfgPort(nimCfgPort_t *configPort)
+{
+  uint32 i;
+  nimConfigID_t cfgID;
+  nimUSP_t usp;
+  if (configPort !=  NULL)
+  {
+
+    sysapiPrintf("*********** Config Port **************\n");
+
+    NIM_CONFIG_ID_COPY(&cfgID,&configPort->configInterfaceId);
+    nimDebugConfigIdPrint(&cfgID);
+
+    memset( (void *)&usp,0, sizeof(nimUSP_t));
+    if ( nimUspFromConfigIDGet(&cfgID, &usp) ==  SUCCESS)
+    {
+      sysapiPrintf("usp = %d.%d.%d\n", usp.unit, usp.slot, usp.port);
+    }
+
+    sysapiPrintf("configMaskOffset = %d\n",configPort->configIdMaskOffset);
+
+    sysapiPrintf("LAA = ");
+    for (i = 0;i < 5 ;i++)
+    {
+      sysapiPrintf("%02x:",configPort->cfgInfo.LAAMacAddr.addr[i]);
+    }
+
+    sysapiPrintf("%02x\n",configPort->cfgInfo.LAAMacAddr.addr[5]);
+
+    sysapiPrintf("addrType = %s\n",(configPort->cfgInfo.addrType ==  SYSMAC_BIA)?" SYSMAC_BIA":" SYSMAC_LAA");
+
+    sysapiPrintf("ifAlias = %s\n", configPort->cfgInfo.ifAlias);
+
+    sysapiPrintf("nameType = %s\n",(configPort->cfgInfo.nameType ==  ALIASNAME)?" ALIASNAME":" SYSNAME");
+
+    switch (configPort->cfgInfo.ifSpeed)
+    {
+      case  PORTCTRL_PORTSPEED_AUTO_NEG:
+        sysapiPrintf("ifSpeed =  PORTCTRL_PORTSPEED_AUTO_NEG\n");
+        break;
+      case  PORTCTRL_PORTSPEED_HALF_100TX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_HALF_100TX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_100TX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_100TX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_HALF_10T:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_HALF_10T\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_10T:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_10T\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_100FX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_100FX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_1000SX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_1000SX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_2P5FX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_2P5FX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_5FX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_5FX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_10GSX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_10GSX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_20GSX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_20GSX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_25GSX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_25GSX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_40GSX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_40GSX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_50GSX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_50GSX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_100GSX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_100GSX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_200GSX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_200GSX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_FULL_400GSX:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_FULL_400GSX\n");
+        break;
+      case  PORTCTRL_PORTSPEED_AAL5_155:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_AAL5_155\n");
+        break;
+      case  PORTCTRL_PORTSPEED_LAG:
+        sysapiPrintf("ifSpeed =   PORTCTRL_PORTSPEED_LAG\n");
+        break;
+      default:
+        sysapiPrintf("ifSpeed = 0X%X\n", configPort->cfgInfo.ifSpeed);
+        break;
+    }
+
+    if (configPort->cfgInfo.negoCapabilities == 0)
+    {
+      sysapiPrintf("negoCapabilities = DISABLED\n");
+    }
+    else
+    {
+      sysapiPrintf("negoCapabilities = ");
+      if (configPort->cfgInfo.negoCapabilities &  PORT_NEGO_CAPABILITY_HALF_10)
+        sysapiPrintf(" PORT_NEGO_CAPABILITY_HALF_10 |");
+      if (configPort->cfgInfo.negoCapabilities &  PORT_NEGO_CAPABILITY_FULL_10)
+        sysapiPrintf(" PORT_NEGO_CAPABILITY_FULL_10 |");
+      if (configPort->cfgInfo.negoCapabilities &  PORT_NEGO_CAPABILITY_HALF_100)
+        sysapiPrintf(" PORT_NEGO_CAPABILITY_HALF_100 |");
+      if (configPort->cfgInfo.negoCapabilities &  PORT_NEGO_CAPABILITY_FULL_100)
+        sysapiPrintf(" PORT_NEGO_CAPABILITY_FULL_100 |");
+      if (configPort->cfgInfo.negoCapabilities &  PORT_NEGO_CAPABILITY_FULL_1000)
+        sysapiPrintf(" PORT_NEGO_CAPABILITY_FULL_1000 |");
+      if (configPort->cfgInfo.negoCapabilities &  PORT_NEGO_CAPABILITY_FULL_2P5G)
+        sysapiPrintf(" PORT_NEGO_CAPABILITY_FULL_2P5G |");
+      if (configPort->cfgInfo.negoCapabilities &  PORT_NEGO_CAPABILITY_FULL_5G)
+        sysapiPrintf(" PORT_NEGO_CAPABILITY_FULL_5G |");
+      if (configPort->cfgInfo.negoCapabilities &  PORT_NEGO_CAPABILITY_FULL_10G)
+        sysapiPrintf(" PORT_NEGO_CAPABILITY_FULL_10G | ");
+      if (configPort->cfgInfo.negoCapabilities &  PORT_NEGO_CAPABILITY_ALL)
+        sysapiPrintf(" PORT_NEGO_CAPABILITY_ALL");
+
+      sysapiPrintf("\n");
+    }
+
+    sysapiPrintf("mgmtAdminState = %s\n",(configPort->cfgInfo.mgmtAdminState ==  ENABLE)?"ENABLE":"DISABLED");
+    sysapiPrintf("adminState = %s\n",(configPort->cfgInfo.adminState ==  ENABLE)?"ENABLE":"DISABLED");
+#if  FEAT_SOFT_SHUTDOWN
+    sysapiPrintf("softShutdownState = %s\n",(configPort->cfgInfo.softShutdownState ==  ENABLE)?"ENABLE":"DISABLED");
+#endif
+    sysapiPrintf("trapState = %s\n",(configPort->cfgInfo.trapState ==  ENABLE)?"ENABLE":"DISABLED");
+
+    sysapiPrintf("MTU = %d\n", configPort->cfgInfo.ipMtu);
+
+    sysapiPrintf("Encapsulation type = %d\n", configPort->cfgInfo.encapsType);
+    sysapiPrintf("Ptr to this nimCfgPort_t = %p\n",configPort);   
+  }
+}
+
+void nimDebugPortIntIfNum(nimIntf_t *port)
+{
+  uint32 i;
+  nimConfigID_t cfgID;
+
+
+  if (port !=  NULL)
+  {
+    NIM_CONFIG_ID_COPY(&cfgID,&port->configInterfaceId);
+    sysapiPrintf("Present = %d \n",port->present);
+
+    sysapiPrintf("intfNo = %d\n",port->intfNo);
+
+    sysapiPrintf("runTimeMaskId = %d \n",port->runTimeMaskId);
+
+    nimDebugConfigIdPrint(&cfgID);
+
+    sysapiPrintf("sysIntfType = %s\n",
+                 nimDebugIntfTypeToString(port->sysIntfType));
+
+    sysapiPrintf("ifIndex = %d \n", port->ifIndex);
+
+    sysapiPrintf("ifDescr = %s \n",port->operInfo.ifDescr);
+
+    switch (port->operInfo.ianaType)
+    {
+      case  IANA_OTHER:
+        sysapiPrintf("ifType =   IANA_OTHER\n");
+        break;
+      case  IANA_ETHERNET:
+        sysapiPrintf("ifType =   IANA_ETHERNET\n");
+        break;
+      case  IANA_AAL5:
+        sysapiPrintf("ifType =   IANA_AAL5\n");
+        break;
+      case  IANA_PROP_VIRTUAL:
+        sysapiPrintf("ifType =   IANA_PROP_VIRTUAL\n");
+        break;
+      case  IANA_FAST_ETHERNET:
+        sysapiPrintf("ifType =   IANA_FAST_ETHERNET\n");
+        break;
+      case  IANA_FAST_ETHERNET_FX:
+        sysapiPrintf("ifType =   IANA_FAST_ETHERNET_FX\n");
+        break;
+      case  IANA_GIGABIT_ETHERNET:
+        sysapiPrintf("ifType =   IANA_GIGABIT_ETHERNET\n");
+        break;
+      case  IANA_2P5G_ETHERNET:
+        sysapiPrintf("ifType =   IANA_2P5G_ETHERNET\n");
+        break;
+      case  IANA_5G_ETHERNET:
+        sysapiPrintf("ifType =   IANA_5G_ETHERNET\n");
+        break;
+      case  IANA_10G_ETHERNET:
+        sysapiPrintf("ifType =   IANA_10G_ETHERNET\n");
+        break;
+      case  IANA_20G_ETHERNET:
+        sysapiPrintf("ifType =   IANA_20G_ETHERNET\n");
+        break;
+      case  IANA_25G_ETHERNET:
+        sysapiPrintf("ifType =   IANA_25G_ETHERNET\n");
+        break;
+      case  IANA_40G_ETHERNET:
+        sysapiPrintf("ifType =   IANA_40G_ETHERNET\n");
+        break;
+      case  IANA_50G_ETHERNET:
+        sysapiPrintf("ifType =   IANA_50G_ETHERNET\n");
+        break;
+      case  IANA_100G_ETHERNET:
+        sysapiPrintf("ifType =   IANA_100G_ETHERNET\n");
+        break;
+      case  IANA_200G_ETHERNET:
+        sysapiPrintf("ifType =   IANA_200G_ETHERNET\n");
+        break;
+      case  IANA_400G_ETHERNET:
+        sysapiPrintf("ifType =   IANA_400G_ETHERNET\n");
+        break;
+      case  IANA_L2_VLAN:
+        sysapiPrintf("ifType =   IANA_L2_VLAN\n");
+        break;
+      case  IANA_LAG:
+        sysapiPrintf("ifType =   IANA_LAG_DESC\n");
+        break;
+      case  IANA_LOGICAL_DESC:
+        sysapiPrintf("ifType =   IANA_LOGICAL_DESC\n");
+        break;
+      case  IANA_SOFTWARE_LOOPBACK:
+        sysapiPrintf("ifType =   IANA_SOFTWARE_LOOPBACK\n");
+        break;
+      case  IANA_TUNNEL:
+        sysapiPrintf("ifType =   IANA_TUNNEL\n");
+        break;
+      case  IANA_OTHER_SERV_PORT:
+        sysapiPrintf("ifType =   IANA_OTHER_SERV_PORT\n");
+        break;
+      default:
+        sysapiPrintf("ifType =  UNKNOWN %d \n", port->operInfo.ianaType);
+        break;
+    }
+
+    sysapiPrintf("BIA = ");
+    for (i = 0; i < ( ENET_MAC_ADDR_LEN - 1); i++)
+    {
+      sysapiPrintf("%02x:",port->operInfo.macAddr.addr[i]);
+    }
+    sysapiPrintf("%02x\n",port->operInfo.macAddr.addr[i]);
+
+    sysapiPrintf("L3MAC = ");
+    for (i = 0; i < ( ENET_MAC_ADDR_LEN - 1); i++)
+    {
+      sysapiPrintf("%02x:",port->operInfo.l3MacAddr.addr[i]);
+    }
+    sysapiPrintf("%02x\n",port->operInfo.l3MacAddr.addr[i]);
+
+    sysapiPrintf("resetTime = %d\n",port->resetTime);
+
+    sysapiPrintf("linkChangeTime = %d\n",port->linkChangeTime);
+
+    sysapiPrintf("ifName = %s\n", port->operInfo.ifName);
+
+    sysapiPrintf("USP = %d.%d.%d\n",port->usp.unit,port->usp.slot,port->usp.port);
+
+    sysapiPrintf("PHY CAP = ");
+    if ( PHY_CAP_PORTSPEED_AUTO_NEG_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_AUTO_NEG |\n");
+    if ( PHY_CAP_PORTSPEED_HALF_10_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_HALF_10 |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_10_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_10 |\n");
+    if ( PHY_CAP_PORTSPEED_HALF_100_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_HALF_100 |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_100_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_100 |\n");
+    if ( PHY_CAP_PORTSPEED_HALF_1000_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_HALF_1000 |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_1000_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_1000 |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_2P5G_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_2P5G |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_5G_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_5G |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_10G_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_10G |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_20G_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_20G |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_25G_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_25G |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_40G_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_40G |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_50G_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_50G |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_100G_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_100G |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_200G_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_200G |\n");
+    if ( PHY_CAP_PORTSPEED_FULL_400G_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_FULL_400G |\n");
+    if ( PHY_CAP_PORTSPEED_SFP_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_SFP |\n");
+    if ( PHY_CAP_PORTSPEED_SFP_DETECT_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_PORTSPEED_SFP_DETECT |\n");
+    if ( PHY_CAP_POE_PSE_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_POE_PSE |\n");
+    if ( PHY_CAP_POE_PD_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_POE_PD |\n");
+    if ( PHY_CAP_INTERNAL_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_INTERNAL \n");
+    if ( PHY_CAP_NATIVE_EEE_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_NATIVE_EEE \n");
+    if ( PHY_CAP_AUTO_EEE_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_AUTO_EEE \n");
+    if ( PHY_CAP_DUAL_MODE_SUPPORT_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_DUAL_MODE_SUPPORT \n");
+    if ( PHY_CAP_POE_PSE_PLUS_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_POE_PSE_PLUS \n");
+    if ( PHY_CAP_POE_PD_PLUS_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_POE_PD_PLUS \n");
+    if ( PHY_CAP_ENERGY_DETECT_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_ENERGY_DETECT \n");
+    if ( PHY_CAP_AUTO_CONFIG_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_AUTO_CONFIG \n");
+    if ( PHY_CAP_UPOE_PSE_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_UPOE_PSE\n");
+    if ( PHY_CAP_UPOE_PD_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_UPOE_PD\n");
+    if ( PHY_CAP_POE_BT_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_POE_BT\n");
+    if (port->operInfo.phyCapability &  PHY_CAP_FIXED_STACK_PORT)
+      sysapiPrintf("  PHY_CAP_FIXED_STACK_PORT\n");
+    if ( PHY_CAP_DYNAMIC_PORT_CHECK(port->operInfo.phyCapability))
+      sysapiPrintf("  PHY_CAP_DYNAMIC_PORT\n");
+
+    if ( PHY_CAP_COMBO_PREFERENCE_CHECK(port->operInfo.phyCapability))
+    {
+      sysapiPrintf("  PHY_CAP_COMBO_PREFERENCE \n");
+      sysapiPrintf("\r\nCombo Preference: %s, %s\r\n",
+                    TRUE == port->configPort.cfgInfo.forceMedium ? "forced" : "auto",
+                    NIM_COMBO_PREF_SFP == port->configPort.cfgInfo.comboPref ? "sfp" : "rj45");
+    }
+
+    switch (port->operInfo.connectorType)
+    {
+      case  CONNECTOR_NONE:
+        sysapiPrintf("connectorType =  CONNECTOR_NONE\n");
+        break;
+      case  RJ45:
+        sysapiPrintf("connectorType =  RJ45\n");
+        break;
+#if 0
+      case  MTRJ:
+        sysapiPrintf("connectorType =  MTRJ\n");
+        break;
+#endif
+      case  SCDUP:
+        sysapiPrintf("connectorType =  SCDUP\n");
+        break;
+      case  XAUI:
+        sysapiPrintf("connectorType =  XAUI\n");
+        break;
+      case  CAUI:
+        sysapiPrintf("connectorType =  CAUI\n");
+        break;
+      default:
+        sysapiPrintf("connectorType = UNKNOWN\n");
+        break;
+    }
+
+    sysapiPrintf("maxFrameSize = %d\n",port->operInfo.frameSize.largestFrameSize);
+
+    switch(port->intfState)
+    {
+      case  INTF_UNINITIALIZED:
+      sysapiPrintf("Intf State =  INTF_UNINITIALIZED\n");
+      break;
+      case  INTF_CREATING:
+      sysapiPrintf("Intf State =  INTF_CREATING\n");
+      break;
+      case  INTF_CREATED:
+      sysapiPrintf("Intf State =  INTF_CREATED\n");
+      break;
+      case  INTF_ATTACHING:
+      sysapiPrintf("Intf State =  INTF_ATTACHING\n");
+      break;
+      case  INTF_ATTACHED:
+      sysapiPrintf("Intf State =  INTF_ATTACHED\n");
+      break;
+      case  INTF_DETACHING:
+      sysapiPrintf("Intf State =  INTF_DETACHING\n");
+      break;
+      case  INTF_DELETING:
+      sysapiPrintf("Intf State =  INTF_DELETING\n");
+      break;
+      default:
+        sysapiPrintf("Intf State = Unknown\n");
+    }
+
+    sysapiPrintf("Ptr for the nimIntf_t = %p\n",port);
+  }
+
+}
+
+void nimDebugPortIntIfShow(uint32 intIfNum)
+{
+  RC_t rc;
+  nimIntf_t port;
+   BOOL linkState;
+  uint32 intfSpeed;
+   char8 *pSpeedStr;
+
+  IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+  if (rc ==  SUCCESS)
+  {
+    port = nimCtlBlk_g->nimPorts[intIfNum];
+    nimDebugPortIntIfNum(&port);
+    nimDebugDynamicCapPort(intIfNum);
+    nimDebugCfgPort(&port.configPort);
+    /* Expandable Port Config Info */
+    if ( PHY_CAP_EXPANDABLE_PORT_CHECK(port.operInfo.phyCapability))
+    {
+      sysapiPrintf("Expandable Port Mode Configured - %d Default - %d\n", 
+                   NIM_EXP_PORT_MODE_GET(port.configPort.cfgInfo.portModeFlags),
+                   NIM_EXP_PORT_MODE_GET(port.defaultCfg.portModeFlags));
+    }
+    sysapiPrintf("Default %d and Configured Expandable Port Mode Status %d\n",
+                 NIM_EXP_PORT_MODE_STATUS_GET(port.defaultCfg.portModeFlags),
+                 NIM_EXP_PORT_MODE_STATUS_GET(port.configPort.cfgInfo.portModeFlags));
+    
+    sysapiPrintf("Saved config state for expanadable port mode %d - status %d\n",
+                 NIM_EXP_PORT_MODE_GET(nimCtlBlk_g->nimConfigData->cfgPort[intIfNum].cfgInfo.portModeFlags), 
+                 NIM_EXP_PORT_MODE_STATUS_GET(nimCtlBlk_g->nimConfigData->cfgPort[intIfNum].cfgInfo.portModeFlags)); 
+
+    dtlIntfLinkStateGet(intIfNum,&linkState);
+    dtlIntfSpeedGet(intIfNum,&intfSpeed);
+    if (linkState)
+    {
+      switch (intfSpeed)
+      {
+        case  PORTCTRL_PORTSPEED_AUTO_NEG: pSpeedStr = "Auto?"; break; 
+        case  PORTCTRL_PORTSPEED_HALF_100TX: pSpeedStr = "100h"; break; 
+        case  PORTCTRL_PORTSPEED_FULL_100TX: pSpeedStr = "100f"; break;
+        case  PORTCTRL_PORTSPEED_HALF_10T: pSpeedStr = "10h"; break;
+        case  PORTCTRL_PORTSPEED_FULL_10T: pSpeedStr = "10f"; break;
+        case  PORTCTRL_PORTSPEED_FULL_100FX: pSpeedStr = "100fx"; break;
+        case  PORTCTRL_PORTSPEED_FULL_1000SX: pSpeedStr = "1G"; break;
+        case  PORTCTRL_PORTSPEED_FULL_10GSX: pSpeedStr = "10G"; break;
+        case  PORTCTRL_PORTSPEED_FULL_20GSX: pSpeedStr = "20G"; break;
+        case  PORTCTRL_PORTSPEED_FULL_40GSX: pSpeedStr = "40G"; break;
+        case  PORTCTRL_PORTSPEED_FULL_25GSX: pSpeedStr = "25G"; break;
+        case  PORTCTRL_PORTSPEED_FULL_50GSX: pSpeedStr = "50G"; break;
+        case  PORTCTRL_PORTSPEED_FULL_100GSX: pSpeedStr = "100G"; break;
+        case  PORTCTRL_PORTSPEED_FULL_200GSX: pSpeedStr = "200G"; break;
+        case  PORTCTRL_PORTSPEED_FULL_400GSX: pSpeedStr = "400G"; break;
+        case  PORTCTRL_PORTSPEED_AAL5_155: pSpeedStr = "AAL5_155"; break;
+        case  PORTCTRL_PORTSPEED_FULL_2P5FX: pSpeedStr = "2.5G"; break;
+        case  PORTCTRL_PORTSPEED_FULL_5FX: pSpeedStr = "5G"; break;
+        case  PORTCTRL_PORTSPEED_LAG: pSpeedStr = "LAG"; break;
+        case  PORTCTRL_PORTSPEED_UNKNOWN: pSpeedStr = "Unknown"; break;
+        default: pSpeedStr = "Indeterminate"; break;
+      }
+      sysapiPrintf("Driver believes link is up at %s.", pSpeedStr);
+    }
+    else
+    {
+      sysapiPrintf("Driver believes link is down");
+    }
+  }
+  return;
+}
+
+void nimDebugPortUspShow(uint32 unit,uint32 slot,uint32 port)
+{
+  nimUSP_t usp;
+  uint32 intIfNum;
+
+  usp.unit = unit;
+  usp.slot = slot;
+  usp.port = port;
+
+  if (nimGetIntIfNumFromUSP(&usp, &intIfNum) ==  SUCCESS)
+    nimDebugPortIntIfShow(intIfNum);
+
+}
+#endif
+
+void nimDebugEventGenerator(char event[],uint32 intIfNum)
+{
+  uint32 eventNum =  LAST_PORT_EVENT;
+  NIM_EVENT_NOTIFY_INFO_t eventInfo;
+  NIM_HANDLE_t pHandle;
+
+
+  if (strcmp(event," ATTACH") == 0)
+  {
+    eventNum =  ATTACH;
+  }
+  else if(strcmp(event," DETACH") == 0)
+  {
+    eventNum =  DETACH;
+  }
+  else if(strcmp(event," DELETE") == 0)
+  {
+    eventNum =  DELETE;
+  }
+
+  eventInfo.component =  NIM_COMPONENT_ID;
+  eventInfo.intIfNum  = intIfNum;
+  eventInfo.pCbFunc   = /*nimEventDtlDebugCallback*/ NULL;
+  eventInfo.event     = eventNum;
+
+  /* prefered method of event generation for all events */
+  if (nimEventIntfNotify(eventInfo,&pHandle) !=  SUCCESS)
+  {
+    sysapiPrintf("Error in the call to generate event\n");
+  }
+}
+
diff --git a/src/sonic-pac/fpinfra/nim/nim_events.c b/src/sonic-pac/fpinfra/nim/nim_events.c
new file mode 100644
index 00000000000..c5ce0280ff9
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_events.c
@@ -0,0 +1,2550 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#define  MAC_ENET_BCAST
+
+#include "datatypes.h"
+#include "commdefs.h"
+#include "cnfgr_api.h"
+#include "log.h"
+#include "osapi.h"
+#include "osapi_sem.h"
+#include "sysapi_hpc.h"
+#include "portevent_mask.h"
+#include "nim_ifindex.h"
+#include "nim_util.h"
+#include "nim_data.h"
+#include "nim_events.h"
+#include "nimapi.h"
+#include "nim_exports.h"
+#include "nim_config.h"
+#include "nim_outcalls.h"
+#include "nim_startup.h"
+#include "nim_trace.h"
+#include "system_exports.h"
+#include "defaultconfig.h"
+#include "utils_api.h"
+#include "platform_config.h"
+
+static nimCorrelatorData_t  correlatorTable = { 0};
+static NIM_CORRELATOR_t     *correlatorInUse = 0;
+
+/* The NIM timeout is 600 seconds. The timeout needs to be long
+** because when routing is enabled an interface event can trigger a long operation,
+** such as clearing the ARP cache.
+*/
+#define NIM_EVENT_TIMEOUT 600
+#define MASK_STRING_LENGTH  ((( LAST_COMPONENT_ID/32)+1)*15)
+#define FD_NIM_DEFAULT_NETWORK_INTERFACE_TYPE                          NW_INTF_TYPE_SWITCHPORT
+
+/* semaphore for the event transaction creation */
+static void *nimEventSema =  NULLPTR;
+static void *nimCorrelatorSema =  NULLPTR;
+
+static uint32 maxCorrelators = 0;
+static uint32 maxCorrelatorsInUse = 0;
+static uint32 lastCorrelatorTaken = 0;
+
+/* data and structures for status queue */
+static void *pNimEventStatusQueue;
+
+/*added to handle async behavior of sonic*/
+static int pending_startup_cb ;
+
+typedef struct {
+  RC_t                 response;
+  NIM_CORRELATOR_t        correlator;
+   PORT_EVENTS_t        event;
+  uint32               intIfNum;
+} NIM_EVENT_STATUS_MSG_t;
+
+/* Local prototypes */
+void nimEventAttachPostProcess(NIM_EVENT_NOTIFY_INFO_t eventInfo);
+extern  char8 *nimDebugCompStringGet( COMPONENT_IDS_t cid);
+
+static uint32 default_nim_timeout = NIM_EVENT_TIMEOUT*1000;
+
+/* Funtions to handle the case where NIM callback registration happens after the PortInitDone*/
+void nimStartupCallbackPendingSet()
+{
+  pending_startup_cb = 1 ;
+}
+
+int nimStartupCallbackPendingGet()
+{
+  return pending_startup_cb;
+}
+
+void nimStartupCallbackPendingClear()
+{
+  pending_startup_cb = 0;
+}
+
+/*********************************************************************
+* @purpose  go through registered users and notify them of interface changes.
+*
+* @param    correlator    The correlator to match with the request
+* @param    eventInfo     The event, intf, component, callback func,
+*                         additional event specific data.
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+void nimDoNotify(NIM_CORRELATOR_t correlator, NIM_EVENT_NOTIFY_INFO_t eventInfo)
+{
+  RC_t   rc;
+   int32 i;
+   PORT_EVENTS_t event  = eventInfo.event;
+  uint32 intIfNum      = eventInfo.intIfNum;
+  uint32 now;
+  NIM_NOTIFY_CB_INFO_t cbData;
+   uchar8 maskString[MASK_STRING_LENGTH]; /* number of chars per mask index */
+  NIM_EVENT_STATUS_MSG_t msg;
+   uchar8 ifName[ NIM_IFNAME_SIZE + 1];
+   int32  intIndex, bitIndex;
+
+  memset(ifName, 0, sizeof(ifName));
+
+  /* Set to  TRUE when one or more clients want to receive this event. */
+   BOOL sendEvent =  FALSE;
+
+  now = osapiUpTimeRaw();
+  if (nimPhaseStatusCheck() !=  TRUE) return;
+
+  /* create the transaction */
+  osapiSemaTake(nimEventSema, WAIT_FOREVER);
+
+  /* start with no responses received */
+  memset(correlatorTable.remainingMask,0,sizeof(uint32) * (( LAST_COMPONENT_ID/32) +1));
+  memset(correlatorTable.failedMask,0,sizeof(uint32) * (( LAST_COMPONENT_ID/32) +1));
+  memset(maskString,0,sizeof(maskString));
+
+  for (i = 0; i <  LAST_COMPONENT_ID; i++)
+  {
+    if ((nimCtlBlk_g->nimNotifyList[i].registrar_ID) &&
+      (PORTEVENT_ISMASKBITSET(nimCtlBlk_g->nimNotifyList[i].notify_mask,event)))
+    {
+      correlatorTable.remainingMask[i/32] |= (1 << i % 32);
+      sendEvent =  TRUE;
+    }
+  }
+
+  cbData.handle = correlator;
+
+  if (sendEvent)
+  {
+      correlatorTable.time = now + default_nim_timeout;
+      correlatorTable.correlator = correlator;
+      correlatorTable.inUse =  TRUE;
+      memcpy(&correlatorTable.requestData,&eventInfo,sizeof(NIM_EVENT_NOTIFY_INFO_t));
+
+      /* assume success */
+      correlatorTable.response =  SUCCESS;
+
+      osapiSemaGive(nimEventSema);
+      /* notify the components */
+      for (i = 0; i <  LAST_COMPONENT_ID; i++)
+      {
+        if ((nimCtlBlk_g->nimNotifyList[i].registrar_ID) &&
+          (PORTEVENT_ISMASKBITSET(nimCtlBlk_g->nimNotifyList[i].notify_mask,event)))
+        {
+          nimTracePortEventComp(i,event,intIfNum, TRUE,correlator);
+          nimProfilePortEventComp(i,event,intIfNum, TRUE);
+          rc = (*nimCtlBlk_g->nimNotifyList[i].notify_intf_change)(intIfNum, event, correlator,
+                                                                   eventInfo.eventData);
+        }
+      }
+
+      /* wait for message with a timeout */
+      rc = osapiMessageReceive(pNimEventStatusQueue, &msg, sizeof(NIM_EVENT_STATUS_MSG_t),/*default_nim_timeout needs to work on it*/  WAIT_FOREVER);
+
+      osapiSemaTake(nimEventSema, WAIT_FOREVER);
+
+      if (rc !=  SUCCESS)
+      {
+         int32 failedComp = 0;
+
+        cbData.response.rc      =  FAILURE;
+        cbData.response.reason  = NIM_ERR_RC_TIMEOUT;
+
+        for (i=( LAST_COMPONENT_ID / 32); i >= 0 ;i--)
+        {
+          if ((MASK_STRING_LENGTH - strlen(maskString)) >= 15)
+          {
+            sprintf(maskString,"%s 0x%.8x ",maskString,correlatorTable.remainingMask[i]);
+          }
+        }
+
+        for (i = 0; i <  LAST_COMPONENT_ID; i++)
+        {
+          intIndex = i/32;
+          bitIndex = i%32;
+          if (correlatorTable.remainingMask[intIndex] & (1 << bitIndex))
+          {
+            failedComp = i;
+            nimLogErrorMsg ( TRUE,__FILE__, __LINE__, 
+                            "NIM:%s component not responding. Internal timeout may indicate "
+                            "system instability. Recommend checking interface in next message.\n", nimDebugCompStringGet(i));
+
+          }
+        }
+
+        nimGetIntfName(correlatorTable.requestData.intIfNum,  ALIASNAME, ifName);
+
+        LOG_ERROR_OPT_RESET( LOG_SEVERITY_ERROR,
+                              NIM_COMPONENT_ID<<24 | failedComp, 
+                             "NIM: Notification is timedout. "
+                             "The system may be in inconsistent state. "
+                             "Recommend rebooting the system now.");
+        cbData.response.rc =  SUCCESS;
+      }
+      else
+      {
+        /* tally complete */
+        cbData.response.rc  = correlatorTable.response;
+      }
+  }
+  else
+  {
+      cbData.response.rc =  SUCCESS;
+  }
+
+  /* delete the correlator for the next event */
+  if (nimEventCorrelatorDelete(correlator) !=  SUCCESS)
+  {
+    NIM_LOG_ERROR("NIM: Error deleting the event correlator(%d)\n", correlatorTable.correlator);
+  }
+
+  correlatorTable.inUse =  FALSE;
+
+  (void)osapiSemaGive(nimEventSema);
+  /* change the state of intf if necessary, do any processing, and callback the generator */
+  nimEventPostProcessor(eventInfo,cbData);
+
+}
+
+/*********************************************************************
+* @purpose  Send message to nim to Notifies registered routines of interface changes.
+*
+* @param    intIfNum    internal interface number
+* @param    event       all port events,
+*                       (@b{   CREATE,
+*                              DELETE,
+*                              PORT_DISABLE,
+*                              PORT_ENABLE,
+*                              UP,
+*                              DOWN,
+*                              ENABLE,
+*                              DISABLE,
+*                              DIAG_DISABLE,
+*                              FORWARDING,
+*                              NOT_FORWARDING,
+*                              CREATE,
+*                              DELETE,
+*                              ACQUIRE,
+*                              RELEASE,
+*                              SPEED_CHANGE,
+*                              LAG_CFG_CREATE,
+*                              LAG_CFG_MEMBER_CHANGE,
+*                              LAG_CFG_REMOVE,
+*                              LAG_CFG_END,
+*                              PROBE_SETUP,
+*                              PROBE_TEARDOWN,
+*                              SET_INTF_SPEED,
+*                              SET_MTU_SIZE,
+*                              VRRP_TO_MASTER or
+*                              VRRP_FROM_MASTER})
+* @param    eventData   @b{(input)} additional event specific data
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimNotifyIntfChange(uint32 intIfNum, uint32 event,
+                            NIM_EVENT_SPECIFIC_DATA_t eventData)
+{
+  RC_t     returnVal =   FAILURE;
+  NIM_HANDLE_t           handle;
+  NIM_EVENT_NOTIFY_INFO_t eventInfo;
+  RC_t rc;
+  uint32 ifIndex;
+   char8 buf[128];
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+      return( ERROR);
+  }
+
+  eventInfo.component     =  NIM_COMPONENT_ID;
+  eventInfo.event         = event;
+  eventInfo.intIfNum      = intIfNum;
+  eventInfo.pCbFunc       =  NULLPTR;
+  memcpy(&eventInfo.eventData, &eventData, sizeof(NIM_EVENT_SPECIFIC_DATA_t));
+
+  /* don't need to keep the handle around */
+  if ((returnVal = nimEventIntfNotify(eventInfo,&handle)) !=  SUCCESS)
+  {
+    NIM_LOG_MSG("NIM: Failed to send PORT EVENT on NIM_QUEUE\n");
+  }
+  else
+  {
+    rc = nimGetIntfIfIndex(intIfNum, &ifIndex);
+    sprintf(buf, "IfIndex: %d", ifIndex);
+    //EM_LOG((SYSEVENT_EVENT|event), buf);
+    returnVal =  SUCCESS;
+  }
+
+  return(returnVal);
+}
+
+void nimEventCmgrDebugCallback(NIM_NOTIFY_CB_INFO_t retVal)
+{
+  if (retVal.response.rc !=  SUCCESS)
+  {
+    if (retVal.response.reason == NIM_ERR_RC_TIMEOUT)
+    {
+      NIM_LOG_MSG("NIM: Timeout Cmgr event occured for handle(%d)\n",retVal.handle);
+    }
+    else
+    {
+      NIM_LOG_MSG("NIM: Failed Cmgr event notify for handle(%d)\n",retVal.handle);
+    }
+  }
+}
+
+
+/*********************************************************************
+* @purpose  Register a routine to be called when a link state changes.
+*
+* @param    registrar_ID   routine registrar id  (See  COMPONENT_ID_t)
+* @param    *notify        pointer to a routine to be invoked for link state
+*                          changes.  Each routine has the following parameters:
+*                          (internal interface number, event( UP,  DOWN,
+*                           etc.), correlator and the event specific data).
+* @param    *startup_notify @b{(input)} pointer to a routine to be invoked at startup.
+*                          Each routine has the following parameters:
+*                          (startup_phase(NIM_INTERFACE_CREATE_STARTUP,
+*                                         NIM_INTERFACE_ACTIVATE_STARTUP)).
+* @param    priority       @b{(input)} priority of the startup notification.
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @notes    eventData is additional event specific data that is
+*           passed to the registered components.
+*           Registered components must interpret it as per the validity of the
+*           structure mentioned in comments for each of the structure in 
+*           NIM_EVENT_SPECIFIC_DATA_t.
+*
+* @end
+*********************************************************************/
+RC_t nimRegisterIntfChange( COMPONENT_IDS_t registrar_ID,
+                              RC_t (*notify)(uint32 intIfNum, uint32 event,
+                                                NIM_CORRELATOR_t correlator,
+                                                NIM_EVENT_SPECIFIC_DATA_t eventData),
+                              StartupNotifyFcn startupFcn,
+                              uint32 priority)
+{
+  RC_t rc =  FAILURE;
+
+  if (registrar_ID >=  LAST_COMPONENT_ID)
+  {
+    NIM_LOG_MSG("NIM registrar_ID %ud greater then NIM_USER_LAST\n", registrar_ID);
+  }
+  else if (nimCtlBlk_g ==  NULLPTR)
+  {
+    NIM_LOG_ERROR("NIM: nimCtlBlk_g uninitialized\n");
+
+  }
+  else if (nimCtlBlk_g->nimNotifyList ==  NULLPTR)
+  {
+    NIM_LOG_ERROR("NIM: nimNotifyList not initialized\n");
+  }
+  else
+  {
+    nimCtlBlk_g->nimNotifyList[registrar_ID].registrar_ID = registrar_ID;
+    nimCtlBlk_g->nimNotifyList[registrar_ID].notify_intf_change = notify;
+
+    if (startupFcn !=  NULLPTR)
+    {
+      nimStartUpCreate(registrar_ID, priority, startupFcn);
+      /* Handle the case where callback registration happens after PortInitDone */
+      if(nimStartupCallbackPendingGet())
+      {
+         nimStartupCallbackPendingClear();
+         nimStartupCallbackInvoke(NIM_INTERFACE_CREATE_STARTUP);
+         nimStartupCallbackInvoke(NIM_INTERFACE_ACTIVATE_STARTUP);
+      }
+    }
+    else {
+      LOG_ERROR(registrar_ID);
+    }
+    rc =  SUCCESS;
+  }
+
+  return(rc);
+
+}
+
+/*******************************************************************************
+* @purpose  To allow components to register only for port events that it processes
+*
+* @param    registrar_ID     @b{(input)} routine registrar id  (See  COMPONENT_ID_t)
+* @param    registeredEvents @b{(input)} Bit mask of port events that component requests
+*                              notification
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if failure
+*
+* @notes    none
+*
+* @end
+*******************************************************************************/
+RC_t nimRegisterIntfEvents( COMPONENT_IDS_t registrar_ID,
+                              PORTEVENT_MASK_t   registeredEvents)
+{
+  RC_t rc =  FAILURE;
+
+  if (registrar_ID >=  LAST_COMPONENT_ID)
+  {
+    NIM_LOG_MSG("NIM registrar_ID %ud greater then NIM_USER_LAST\n", registrar_ID);
+  }
+  else if (nimCtlBlk_g ==  NULLPTR)
+  {
+    NIM_LOG_ERROR("NIM: nimCtlBlk_g uninitialized\n");
+
+  }
+  else if (nimCtlBlk_g->nimNotifyList ==  NULLPTR)
+  {
+    NIM_LOG_ERROR("NIM: nimNotifyList not initialized\n");
+  }
+  else
+  {
+    osapiSemaTake(nimEventSema, WAIT_FOREVER);
+    nimCtlBlk_g->nimNotifyList[registrar_ID].notify_mask = registeredEvents;
+    osapiSemaGive(nimEventSema);
+    rc =  SUCCESS;
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Notify all recepients of nim notifications of the link up event
+*
+* @param    none
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @notes    This routine is called only once when the system initialization is complete.
+*           This event was suppressed when the system comes up and is only
+*           propagated when all the components have initialized.
+*
+* @end
+*
+*********************************************************************/
+RC_t nimNotifyLinkUp()
+{
+  RC_t rc =  SUCCESS;
+  uint32 result;
+  uint32 i;
+  NIM_EVENT_SPECIFIC_DATA_t eventData;
+
+  memset (&eventData, 0, sizeof(NIM_EVENT_SPECIFIC_DATA_t));
+
+  if (nimPhaseStatusCheck() !=  TRUE) return( ERROR);
+  for (i = 1; i <= platIntfTotalMaxCountGet() ; i++)
+  {
+    result = NIM_INTF_ISMASKBITSET(nimCtlBlk_g->linkStateMask, i);
+    if ((result !=  NIM_UNUSED_PARAMETER) && (nimCtlBlk_g->nimPorts[i].sysIntfType !=  CPU_INTF))
+    {
+      rc = nimNotifyIntfChange(i,  UP, eventData);
+    }
+  }
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Callback routine for DTL to notify NIM of Interface Events
+*
+*
+* @param    usp           internal interface number
+* @param    event         all port events,
+* @param    dapiIntMgmt   data sent with the callback
+*
+* @returns  void
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+void nimDtlIntfChangeCallback(nimUSP_t *usp, uint32 event, void * dapiIntmgmt)
+{
+  nimUSP_t      nimUsp;
+  uint32     intIfNum = 0;
+  NIM_HANDLE_t           handle;
+  NIM_EVENT_NOTIFY_INFO_t eventInfo;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    return;
+  }
+
+  /* fill the nim config usp */
+  nimUsp.unit = usp->unit;
+  nimUsp.slot = usp->slot;
+  nimUsp.port = usp->port;
+
+  if (nimGetIntIfNumFromUSP(&nimUsp, &intIfNum) !=  SUCCESS)
+  {
+    /* interface does not exist */
+    NIM_LOG_MSG("NIM: Failed to find interface at unit %d slot %d port %hu for event(%d)\n",
+                usp->unit,usp->slot,usp->port,event);
+    return;
+  }
+
+  NIM_CRIT_SEC_WRITE_ENTER();
+
+  switch (event)
+  {
+    case  UP:
+      NIM_INTF_SETMASKBIT(nimCtlBlk_g->linkStateMask, nimCtlBlk_g->nimPorts[intIfNum].runTimeMaskId);
+      break;
+    case  DOWN:
+      NIM_INTF_CLRMASKBIT(nimCtlBlk_g->linkStateMask, nimCtlBlk_g->nimPorts[intIfNum].runTimeMaskId);
+      break;
+    default:
+      break;
+  }
+
+  NIM_CRIT_SEC_WRITE_EXIT();
+
+  eventInfo.component     =  DTL_COMPONENT_ID;
+  eventInfo.event         = event;
+  eventInfo.intIfNum      = intIfNum;
+  eventInfo.pCbFunc       =  NULLPTR;
+
+  /* don't need to keep the handle around */
+  if (nimEventIntfNotify(eventInfo,&handle) !=  SUCCESS)
+  {
+    NIM_LOG_MSG("NIM: Failed to send CMGR PORT EVENT on NIM_QUEUE\n");
+  }
+
+  return;
+
+}
+
+
+/*********************************************************************
+* @purpose  Notifies registered routines of interface changes.
+*
+* @param    correlator    The correlator to match with the request
+* @param    eventInfo     The event, intf, component, callback func
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimNotifyUserOfIntfChange(NIM_CORRELATOR_t correlator, NIM_EVENT_NOTIFY_INFO_t eventInfo)
+{
+  uint32   result;
+  uint32   macroPort;
+  nimUSP_t    usp;
+   INTF_STATES_t  state, prevState;
+  NIM_NOTIFY_CB_INFO_t status;
+  RC_t     rc =  SUCCESS;
+  uint32   intIfNum = eventInfo.intIfNum;
+   PORT_EVENTS_t  event = eventInfo.event;
+   BOOL performCallback =  FALSE;
+  uint32     negoCapabilities;
+   uchar8     ifName[ NIM_IFNAME_SIZE + 1];
+  uint32     ifModeStatus =  TRUE;
+   portmode_t ifMode;
+   INTF_TYPES_t ifType;
+  uint32 switchPortType = FD_NIM_DEFAULT_NETWORK_INTERFACE_TYPE;
+  NIM_EVENT_SPECIFIC_DATA_t eventData;
+
+  memset (&eventData, 0, sizeof(NIM_EVENT_SPECIFIC_DATA_t));
+
+  memset(ifName, 0, sizeof(ifName));
+  state = nimUtilIntfStateGet(eventInfo.intIfNum);
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  ( ERROR);
+    performCallback =  TRUE;
+    nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+    NIM_LOG_MSG("Component %s generated interface event %s (%d) for interface %s (%u). "
+                "Interface manager not ready to receive interface events.",
+                nimDebugCompStringGet(eventInfo.component), nimGetIntfEvent(event),
+                event, ifName, intIfNum);
+  }
+  else if (state ==  INTF_UNINITIALIZED)
+  {
+    rc =  SUCCESS;
+    performCallback =  TRUE;
+
+    if ((event !=  DOWN) &&
+        (event !=  AUTHMGR_PORT_UNAUTHORIZED) &&
+        (event !=  PORT_DISABLE) &&
+        (event !=  NOT_FORWARDING) &&
+        /* Setting interface type as switchport as part of  DETACH event processing, 
+         * after notifying registered components is resulting in below message being logged
+         * as an error. Adding conditional check for switchport interface type. 
+         */
+        (event !=  ETHERNET_SWITCHPORT) &&
+        (event !=  INACTIVE))
+    {
+      /* Not a INTF teardown event, LOG it */
+      nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+      NIM_LOG_MSG("Component %s generated interface event %s (%d) for interface %s (%u). "
+                  "This interface is uninitialized.",
+                  nimDebugCompStringGet(eventInfo.component), nimGetIntfEvent(event),
+                  event, ifName, intIfNum);
+    }
+    else
+    {
+      /* A teardown event, trace it (This can happen during normal operation */ 
+    }
+  }
+  else if ((rc = nimGetUnitSlotPort(intIfNum,&usp)) !=  SUCCESS)
+  {
+    rc =  ERROR;
+    performCallback =  TRUE;
+  }  
+  else
+  {
+    nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+    IS_INTIFNUM_PRESENT(intIfNum,rc);    
+    if (rc ==  SUCCESS)
+    {
+      if (event <  LAST_PORT_EVENT)
+      {
+        switch (event)
+        {
+          case  ATTACH:
+            if ((prevState = nimUtilIntfStateGet(eventInfo.intIfNum)) !=  INTF_CREATED)
+            {
+              rc = nimIntfPortModeGet(intIfNum, &ifMode);
+              if ((( SUCCESS == rc) && 
+                   (  PORT_PORTMODE_NONE == ifMode)) || ( FAILURE == rc))
+              {
+                rc = nimGetIntfType(intIfNum, &ifType);
+                if (((rc ==  SUCCESS) && (ifType !=  LOGICAL_VLAN_INTF)) && 
+                    ((prevState !=  INTF_ATTACHED) && (prevState !=  INTF_ATTACHING)))
+                {
+                  NIM_LOG_MSG("NIM:  ATTACH out of order for Interface %s\n", ifName);
+                }
+              }
+              performCallback =  TRUE;
+            }
+            else 
+            {              
+              /*dtlIntfNameSet(eventInfo.intIfNum, 
+                             nimCtlBlk_g->nimPorts[eventInfo.intIfNum].operInfo.ifName);*/
+              nimUtilIntfStateSet(eventInfo.intIfNum,  INTF_ATTACHING);
+              if (nimIntfConfigApply(eventInfo.intIfNum) !=  SUCCESS)
+              { 
+                nimUtilIntfStateSet(eventInfo.intIfNum, prevState);
+                NIM_LOG_MSG("NIM: Failed to ATTACH Interface %s\n", ifName);
+                rc =  FAILURE;
+                performCallback =  TRUE;
+              }
+              else
+              {
+                /* If the new status is false, skip ATTACH */
+                if (nimIntfPortModeEnableStatusGet(intIfNum, &ifModeStatus) !=  SUCCESS)
+                {                  
+                  rc =  ERROR;
+                  performCallback =  TRUE;
+                }
+                else
+                {
+                  if ( FALSE == ifModeStatus)
+                  {
+                    /* Set the state back to created since Attach did not happen */
+                    nimUtilIntfStateSet(eventInfo.intIfNum,  INTF_CREATED);
+                    /* Multple Attaches can occur for Exp Ports. No need to log */
+                    //NIM_EXP_PORT_DBG(" attach skipped for interface %d\n", eventInfo.intIfNum);
+                    rc =  SUCCESS;
+                    /* This releases the Sema */
+                    performCallback =  TRUE;                
+                  }
+                  else
+                  { 
+                    nimDoNotify(correlator,eventInfo);
+                  }
+                }
+              }
+            }            
+            break;
+          case  DETACH:
+            if ( PHY_CAP_EXPANDABLE_PORT_CHECK(nimCtlBlk_g->nimPorts[eventInfo.intIfNum].operInfo.phyCapability))
+            {
+              if ((nimConfigPhaseGet() ==  CNFGR_STATE_U1) &&
+                  (nimCtlBlk_g->nimPorts[eventInfo.intIfNum].defaultCfg.portModeFlags !=
+                   nimCtlBlk_g->nimPorts[eventInfo.intIfNum].configPort.cfgInfo.portModeFlags))
+              {
+                /*Reset config back to default for interface */
+              }
+            }          
+
+            if (nimIntfPortModeEnableStatusGet(intIfNum, &ifModeStatus) !=  SUCCESS)
+            {
+              rc =  ERROR;
+              performCallback =  TRUE;
+            }
+            else
+            {
+              if ((( FALSE == ifModeStatus) || 
+                   (! PHY_CAP_EXPANDABLE_PORT_CHECK(nimCtlBlk_g->nimPorts[eventInfo.intIfNum].operInfo.phyCapability)))
+                  && (nimUtilIntfStateGet(eventInfo.intIfNum) ==  INTF_CREATED))
+              {
+                /* Skip detach if interface was never attached */
+                rc =  SUCCESS;
+                performCallback =  TRUE;
+              }
+              else if (nimUtilIntfStateGet(eventInfo.intIfNum) !=  INTF_ATTACHED)              
+              {   
+                rc = nimIntfPortModeGet(intIfNum, &ifMode);
+                if ((( SUCCESS == rc) && 
+                     (  PORT_PORTMODE_NONE == ifMode)) || ( FAILURE == rc))
+                {                
+                  NIM_LOG_MSG("NIM:  DETACH out of order for Interface %s\n", ifName);
+                }
+                performCallback =  TRUE;              
+              }
+              else
+              {                              
+                /*dtlIntfNameSet(eventInfo.intIfNum, nimCtlBlk_g->nimPorts[eventInfo.intIfNum].operInfo.ifName);*/
+                rc = nimUtilIntfStateSet(eventInfo.intIfNum, INTF_DETACHING);
+                
+                NIM_CRIT_SEC_WRITE_ENTER();
+                /* Set dynamicCap off */
+                nimCtlBlk_g->nimPorts[intIfNum].dynamicCap =  FALSE;    
+                           
+                nimCtlBlk_g->nimPorts[intIfNum].linkChangeTime = osapiUpTimeRaw();
+                
+                NIM_INTF_CLRMASKBIT(nimCtlBlk_g->linkStateMask, nimCtlBlk_g->nimPorts[intIfNum].runTimeMaskId);
+                NIM_INTF_CLRMASKBIT(nimCtlBlk_g->forwardStateMask, nimCtlBlk_g->nimPorts[intIfNum].runTimeMaskId);
+                
+                NIM_CRIT_SEC_WRITE_EXIT();
+                
+                nimDoNotify(correlator,eventInfo);;
+
+                /* Reset network interface type of physical and LAG interfaces */
+                if((nimCtlBlk_g->nimPorts[eventInfo.intIfNum].sysIntfType ==  PHYSICAL_INTF)
+                   || (nimCtlBlk_g->nimPorts[eventInfo.intIfNum].sysIntfType ==  LAG_INTF))
+                {
+                  if( FAILURE == nimNetworkIntfTypeSet(eventInfo.intIfNum, FD_NIM_DEFAULT_NETWORK_INTERFACE_TYPE))
+                  {
+                    nimGetIntfName(eventInfo.intIfNum,  ALIASNAME, ifName);
+                    NIM_LOG_MSG("Unable to apply Network Interface Type config to %s", ifName);
+                  }
+                }
+              }
+            }
+            break;
+          case  DELETE:
+            if (nimUtilIntfStateGet(eventInfo.intIfNum) !=  INTF_CREATED)
+            {
+              NIM_LOG_MSG("NIM:  DELETE out of order for Interface %s\n", ifName);
+              rc =  FAILURE;
+              performCallback =  TRUE;
+            }
+            else
+            {
+              rc = nimUtilIntfStateSet(eventInfo.intIfNum, INTF_DELETING);
+              nimDoNotify(correlator,eventInfo);;
+            }
+            break;
+
+          case   UP:
+
+            NIM_CRIT_SEC_WRITE_ENTER();
+
+            nimCtlBlk_g->nimPorts[intIfNum].linkChangeTime = osapiUpTimeRaw();
+            NIM_INTF_SETMASKBIT(nimCtlBlk_g->linkStateMask, nimCtlBlk_g->nimPorts[intIfNum].runTimeMaskId);
+            NIM_CRIT_SEC_WRITE_EXIT();
+
+            if (! nimCtlBlk_g->nimPorts[intIfNum].dynamicCap)
+            {
+              if( PHY_CAP_DUAL_MODE_SUPPORT_CHECK(nimCtlBlk_g->nimPorts[intIfNum].operInfo.phyCapability))
+              {
+                NIM_CRIT_SEC_WRITE_ENTER();
+                nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.negoCapabilities = negoCapabilities;
+                NIM_CRIT_SEC_WRITE_EXIT();
+              }
+            }
+
+            nimDoNotify(correlator,eventInfo);;
+
+            if (nimIsMacroPort(intIfNum))
+            {
+              if (nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.adminState ==  ENABLE)
+              {
+
+                /* Hooks for interactions with other components */
+                nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+                LOGF( LOG_SEVERITY_NOTICE,
+                   "Link up on interface %s. ", ifName);
+              }
+            }
+            else
+            {
+              macroPort = nimCtlBlk_g->nimPorts[intIfNum].operInfo.macroPort.macroPort;
+
+              if (nimCtlBlk_g->nimPorts[macroPort].configPort.cfgInfo.adminState ==  ENABLE)
+              {
+                  LOGF( LOG_SEVERITY_NOTICE,
+                 "Link up on interface %s. ", ifName);
+
+              }
+            }
+            break;
+
+          case  DOWN:
+            NIM_CRIT_SEC_WRITE_ENTER();
+
+            nimCtlBlk_g->nimPorts[intIfNum].linkChangeTime = osapiUpTimeRaw();
+            /* check if the port is in FWD state */
+            result = NIM_INTF_ISMASKBITSET(nimCtlBlk_g->forwardStateMask, nimCtlBlk_g->nimPorts[intIfNum].runTimeMaskId);
+            NIM_INTF_CLRMASKBIT(nimCtlBlk_g->linkStateMask, nimCtlBlk_g->nimPorts[intIfNum].runTimeMaskId);
+            NIM_CRIT_SEC_WRITE_EXIT();
+            if( PHY_CAP_DUAL_MODE_SUPPORT_CHECK(nimCtlBlk_g->nimPorts[intIfNum].operInfo.phyCapability))
+            {
+                NIM_CRIT_SEC_WRITE_ENTER();
+                nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.negoCapabilities = negoCapabilities;
+                NIM_CRIT_SEC_WRITE_EXIT();
+            }
+
+
+
+            nimDoNotify(correlator,eventInfo);
+             LOGF( LOG_SEVERITY_NOTICE,
+               "Link down on interface %s. ", ifName);
+
+            /* if the Macro port and in FWD state */
+            if ((nimIsMacroPort(intIfNum)) &&
+                ((result) ||
+                 (nimCtlBlk_g->nimPorts[intIfNum].sysIntfType ==  LAG_INTF)
+#ifdef  PORT_AGGREGATOR_PACKAGE
+                 ||
+                 (( TRUE == simSimpleModeActiveGet()) &&
+                  ( TRUE == portAggregatorIsValidIntf(intIfNum)) &&
+                  ( TRUE == portAggregatorIsIntfAutoLagMember(intIfNum)))
+#endif
+                ))
+            {
+              /* Hooks for interactions with other components */
+              nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+            }
+            break;
+
+
+          case  FORWARDING:
+            NIM_CRIT_SEC_WRITE_ENTER();
+            NIM_INTF_SETMASKBIT(nimCtlBlk_g->forwardStateMask, nimCtlBlk_g->nimPorts[intIfNum].runTimeMaskId);
+            NIM_CRIT_SEC_WRITE_EXIT();
+            nimDoNotify(correlator,eventInfo);
+
+            /* Hooks for interactions with other components */
+            nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+
+            break;
+
+          case  NOT_FORWARDING:
+            NIM_CRIT_SEC_WRITE_ENTER();
+            NIM_INTF_CLRMASKBIT(nimCtlBlk_g->forwardStateMask, nimCtlBlk_g->nimPorts[intIfNum].runTimeMaskId);
+            NIM_CRIT_SEC_WRITE_EXIT();
+            nimDoNotify(correlator,eventInfo);
+
+            /* Hooks for interactions with other components */
+            nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+            break;
+
+          case  PORT_DISABLE:
+            nimDoNotify(correlator,eventInfo);
+            if (nimIsMacroPort(intIfNum))
+            {
+              result = NIM_INTF_ISMASKBITSET(nimCtlBlk_g->linkStateMask, intIfNum);
+
+              if (result)
+              {
+                /* Hooks for interactions with other components */
+                nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+              }
+            }
+            break;
+
+          case  PORT_ENABLE:
+            nimDoNotify(correlator,eventInfo);
+
+            if (nimIsMacroPort(intIfNum))
+            {
+              /* only send a trap if it's already up and being enabled */
+              result = NIM_INTF_ISMASKBITSET(nimCtlBlk_g->linkStateMask, intIfNum);
+
+              if (result)
+              {
+                /* Hooks for interactions with other components */
+                nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+              }
+            }
+            break;
+
+
+          case  LAG_ACQUIRE:
+            nimDoNotify(correlator,eventInfo);
+
+            /* Hooks for interactions with other components */
+            nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+            break;
+
+          case  LAG_RELEASE:
+            nimDoNotify(correlator,eventInfo);
+
+            /* only send a trap if it's already up and being enabled */
+            result = NIM_INTF_ISMASKBITSET(nimCtlBlk_g->linkStateMask, intIfNum);
+
+            /* release implies port is now a macro port */
+            if (result
+#ifdef  PORT_AGGREGATOR_PACKAGE
+                ||
+                ((simSimpleModeActiveGet() ==  TRUE) &&
+                 (portAggregatorIsValidIntf(intIfNum) ==  TRUE) &&
+                 (portAggregatorIsIntfAutoLagMember(intIfNum) ==  TRUE))
+#endif
+               )
+            {
+              //trapMgrLinkUpLogTrap(intIfNum);
+            }
+
+            /* Hooks for interactions with other components */
+            nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+            break;
+
+          case  PORT_ROUTING_ENABLED:
+          case  PORT_ROUTING_DISABLED:
+          case  TRILL_TRUNK_ENABLED:
+          case  TRILL_TRUNK_DISABLED:
+          case  DELETE_PENDING:
+          case  SPEED_CHANGE:
+          case  LAG_CFG_CREATE:
+          case  LAG_CFG_MEMBER_CHANGE:
+          case  LAG_CFG_REMOVE:
+          case  LAG_CFG_END:
+          case  PORT_STATS_RESET:
+            nimDoNotify(correlator,eventInfo);
+            break;
+
+          case  AUTHMGR_PORT_AUTHORIZED:
+              if(NIM_INTF_ISMASKBITSET(nimCtlBlk_g->authorizedStateMask, intIfNum)==  NIM_UNUSED_PARAMETER)
+              {
+                NIM_CRIT_SEC_WRITE_ENTER();
+                NIM_INTF_SETMASKBIT(nimCtlBlk_g->authorizedStateMask, intIfNum);
+                NIM_CRIT_SEC_WRITE_EXIT();
+              }
+              nimDoNotify(correlator,eventInfo);
+              nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+              break;
+
+        case  AUTHMGR_PORT_UNAUTHORIZED:
+              if(NIM_INTF_ISMASKBITSET(nimCtlBlk_g->authorizedStateMask, intIfNum) !=  NIM_UNUSED_PARAMETER)
+              {
+                NIM_CRIT_SEC_WRITE_ENTER();
+                NIM_INTF_CLRMASKBIT(nimCtlBlk_g->authorizedStateMask, intIfNum);
+                NIM_CRIT_SEC_WRITE_EXIT();
+              }
+              nimDoNotify(correlator,eventInfo);
+              nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+            break;
+
+          case  AUTHMGR_ACQUIRE:
+            nimDoNotify(correlator,eventInfo);
+            break;
+
+          case  AUTHMGR_RELEASE:
+            nimDoNotify(correlator,eventInfo);
+            break;
+
+#ifdef  PORT_AGGREGATOR_PACKAGE
+          case  PORT_AGG_UP:
+          case  PORT_AGG_DOWN:
+            nimDoNotify(correlator,eventInfo);
+            nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+            break;
+#endif
+
+          case  PORT_PFC_ACTIVE:
+            if(!NIM_INTF_ISMASKBITSET(nimCtlBlk_g->pfcActiveMask, intIfNum))
+            {
+              NIM_CRIT_SEC_WRITE_ENTER();
+              NIM_INTF_SETMASKBIT(nimCtlBlk_g->pfcActiveMask, intIfNum);
+              NIM_CRIT_SEC_WRITE_EXIT();
+            }
+            nimDoNotify(correlator, eventInfo);
+            nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+            break;
+
+          case  PORT_PFC_INACTIVE:
+            if(NIM_INTF_ISMASKBITSET(nimCtlBlk_g->pfcActiveMask, intIfNum))
+            {
+              NIM_CRIT_SEC_WRITE_ENTER();
+              NIM_INTF_CLRMASKBIT(nimCtlBlk_g->pfcActiveMask, intIfNum);
+              NIM_CRIT_SEC_WRITE_EXIT();
+            }
+            nimDoNotify(correlator, eventInfo);
+            nimNotifyUserOfIntfChangeOutcall(intIfNum, event);
+            break;
+
+          case  ETHERNET_SWITCHPORT:
+            nimDoNotify(correlator,eventInfo);
+            break;
+  
+          case  NETWORK_INTF_TYPE_NNI:
+            nimDoNotify(correlator,eventInfo);
+            break;
+  
+          case  NETWORK_INTF_TYPE_UNI_C:
+            nimDoNotify(correlator,eventInfo);
+            break;
+  
+          case  NETWORK_INTF_TYPE_UNI_S:
+            nimDoNotify(correlator,eventInfo);
+            break;
+
+          default:
+            nimDoNotify(correlator,eventInfo);
+            break;
+        }
+      }
+      else
+      {
+        rc = ( FAILURE);
+      }
+    }
+  }
+
+  nimProfilePortEvent(eventInfo.component,eventInfo.event,eventInfo.intIfNum, FALSE);
+  if (performCallback ==  TRUE)
+  {
+    /* delete the correlator for the next event */
+    if (nimEventCorrelatorDelete(correlator) !=  SUCCESS)
+    {
+      NIM_LOG_ERROR("NIM: Error deleting the event correlator(%d)\n", correlator);
+    }
+
+    nimTracePortEvent(eventInfo.component,eventInfo.event,eventInfo.intIfNum, FALSE,correlator);
+
+    if (eventInfo.pCbFunc !=  NULLPTR)
+    {
+      status.event    = eventInfo.event;
+      status.intIfNum = eventInfo.intIfNum;
+      status.response.rc = rc;
+      status.handle   = correlator;
+
+      eventInfo.pCbFunc(status);
+    }
+  }
+  return(rc);
+}
+
+
+
+
+/*********************************************************************
+* @purpose  NIM Task
+*
+* @param    none
+*
+* @returns  void
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+void nimTask()
+{
+  nimPdu_t nmpdu;
+  RC_t rc;
+   CNFGR_CMD_DATA_t pCmdData;
+  
+  if (osapiTaskInitDone( NIM_TASK_SYNC) !=  SUCCESS)
+  {
+    NIM_LOG_ERROR("NIM: Task failed to int\n");
+  }
+
+  do
+  {
+    if (nimCtlBlk_g->nimMsgQueue ==  NULLPTR)
+      continue;
+
+    /* initialize the message to zero */
+    memset(&nmpdu,0x00,sizeof(nimPdu_t));
+
+    rc = osapiMessageReceive(nimCtlBlk_g->nimMsgQueue, &nmpdu,
+                             sizeof(nimPdu_t),  WAIT_FOREVER);
+    
+    if (rc ==  SUCCESS)
+    {
+
+      switch (nmpdu.msgType)
+      {
+        case CNFGR_MSG:
+
+         // pCmdData = nmpdu.data.pCmdData;
+         // nimRecvCnfgrCommand( &pCmdData );
+          break;
+
+        case NIM_MSG:
+          if (nimNotifyUserOfIntfChange(nmpdu.data.message.correlator,nmpdu.data.message.eventInfo) !=  SUCCESS)
+          {
+            NIM_LOG_MSG("NIM: Failed to notify users of interface change\n");
+          }
+          break;
+
+        case START_MSG:
+
+          (nmpdu.data.nimStartMsg.startupFunction)(nmpdu.data.nimStartMsg.phase);
+          /* Wait until startup has completed */
+          nimStartupEventWait();
+          break;
+        case TIMER_MSG:
+          #if  FEAT_DIAG_DISABLED_AUTO_RECOVERY
+             nimDDisableResoreInterfaceProcess();
+          #endif
+          break;
+        case ISSU_RESTORE_MSG:
+          break;
+        default:
+        {         
+          NIM_LOG_MSG("nimTask(): invalid message type:%d. %s:%d\n",
+                      nmpdu.msgType, __FILE__, __LINE__);
+          break;
+        }
+      }
+    }
+  } while (1);
+  return;
+}
+
+
+/*********************************************************************
+*
+* @purpose  Status callback from components to NIM for PORT EVENT Notifications
+*
+* @param    file_name     @b{(input)}   File name from where this function is called
+* @param    line_number   @b{(input)}   Line number from where this function is called
+* @param    status        @b{(output)}  Status from the component
+*
+* @returns  void
+*
+* @notes    At the conclusion of processing a PORT Event, each component must
+*           must call this function with the correlator, intf, status, and
+*           the component ID
+*
+* @end
+*********************************************************************/
+void nimEventStatusCallback_track( char8 *file_name, uint32 line_number,
+                                  NIM_EVENT_COMPLETE_INFO_t status)
+{
+  RC_t   rc =  SUCCESS;
+   BOOL   done =  FALSE;
+  NIM_EVENT_STATUS_MSG_t msg = { 0 };
+
+  osapiSemaTake(nimEventSema, WAIT_FOREVER);
+
+  nimTracePortEventComp(status.component,status.event,status.intIfNum, FALSE,status.correlator);
+  nimProfilePortEventComp(status.component,status.event,status.intIfNum, FALSE);
+
+  utilsFilenameStrip(( char8 **)&file_name);
+
+  /* take the correlator semaphore and tally the response */
+  if ((rc = nimEventTally(file_name, line_number, status, &done)) !=  SUCCESS)
+  {
+    NIM_LOG_MSG("NIM: Error in the tally routine\n");
+  }
+  else if (done ==  TRUE)
+  {
+    /* Send a message when the api is ready */
+    correlatorTable.inUse =  FALSE;
+
+    msg.correlator = status.correlator;
+    msg.event      = status.event;
+    msg.intIfNum   = status.intIfNum;
+    msg.response   = correlatorTable.response;
+
+
+    rc = osapiMessageSend(pNimEventStatusQueue,
+                          &msg,
+                          sizeof(msg),
+                           NO_WAIT,
+                           MSG_PRIORITY_NORM);
+
+    if (rc !=  SUCCESS)
+    {
+      NIM_LOG_MSG("failed to put status on queue");
+    }
+
+  }
+  else
+  {
+    /* no work to do */
+  }
+
+  osapiSemaGive(nimEventSema);
+
+  return;
+}
+
+/*********************************************************************
+*
+* @purpose  Notify all interested components of an Interface Change event
+*
+* @param    eventInfo     @b{(input)}   The event information
+* @param    pHandle       @b{(output)}  A handle that identifies this request
+*
+* @returns   SUCCESS    Event was accepted
+* @returns   FAILURE    Event was not accepted
+*
+* @notes    If the caller is interested in being notified at when the event is
+*           completed, they must put a callback function in the cbInfo.pCbFunc
+*
+* @end
+*********************************************************************/
+RC_t nimEventIntfNotify(NIM_EVENT_NOTIFY_INFO_t eventInfo, NIM_HANDLE_t *pHandle)
+{
+  RC_t rc =  SUCCESS;
+  nimPdu_t  pdu;
+  NIM_CORRELATOR_t *correlator;
+  correlator = pHandle;
+
+
+  /* validate the data */
+  if (pHandle ==  NULL)
+  {
+    rc =  FAILURE;
+  }
+  else if (eventInfo.component >=  LAST_COMPONENT_ID)
+  {
+    rc =  FAILURE;
+    NIM_LOG_MSG("NIM: Component(%d) out of range in nimEventIntfNotify\n",eventInfo.component);
+  }
+  else if (eventInfo.event >=  LAST_PORT_EVENT)
+  {
+    rc =  FAILURE;
+    NIM_LOG_MSG("NIM: Event(%d) out of range in nimEventIntfNotify\n",eventInfo.event);
+  }
+  else if ((rc = nimEventCorrelatorCreate(correlator)) !=  SUCCESS)
+  {
+    NIM_LOG_MSG("NIM: Failed to get a correlator in nimNotify\n");
+    rc =  FAILURE;
+  }
+  else
+  {
+    /* turn off the port */
+    if (eventInfo.event ==  DETACH)
+    {
+    if (nimIsMacroPort(eventInfo.intIfNum))
+    {
+          /*rc = dtlIntfAdminStateSet(eventInfo.intIfNum,  FALSE);*/
+    }
+    }
+
+    /* pack the message */
+    pdu.msgType = NIM_MSG;
+    pdu.data.message.correlator = *correlator;
+    memcpy((void*)&pdu.data.message.eventInfo,&eventInfo,sizeof(NIM_EVENT_NOTIFY_INFO_t));
+
+    /* send the message to NIM_QUEUE */
+    if (osapiMessageSend( nimCtlBlk_g->nimMsgQueue, (void *)&pdu,
+                          (uint32)sizeof(nimPdu_t),  WAIT_FOREVER,  MSG_PRIORITY_NORM ) ==  ERROR)
+    {
+      NIM_LOG_MSG("NIM: failed to send message to NIM message Queue.\n");
+      /*nimTraceEventError(eventInfo.component,eventInfo.event,eventInfo.intIfNum,NIM_ERR_LAST);*/
+      rc =  FAILURE;
+    }
+    else
+    {
+      nimTracePortEvent(eventInfo.component,eventInfo.event,eventInfo.intIfNum, TRUE,*pHandle);
+      nimProfilePortEvent(eventInfo.component,eventInfo.event,eventInfo.intIfNum, TRUE);
+      rc =  SUCCESS;
+    }
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+*
+* @purpose  Create a correlator for the event
+*
+* @param    correlator        @b{(output)}  A returned correlator
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @end
+*********************************************************************/
+RC_t nimEventCorrelatorCreate(NIM_CORRELATOR_t *correlator)
+{
+  RC_t rc =  SUCCESS;
+  uint32 index;
+
+
+  if (correlator ==  NULL)
+  {
+    rc =  FAILURE;
+  }
+  else
+  {
+    osapiSemaTake(nimCorrelatorSema, WAIT_FOREVER);
+
+    index = lastCorrelatorTaken;
+    index++; /* start at the next correlator */
+
+    for (; index < maxCorrelators; index++)
+    {
+      if (correlatorInUse[index] ==  FALSE )
+      {
+        correlatorInUse[index] =  TRUE;
+        break;
+      }
+    }
+
+    if (index == maxCorrelators)
+    {
+      /*
+       * We must not have found a correlator
+       * start at the beginning
+       */
+      index = 1;
+
+      for (; index < lastCorrelatorTaken ; index++)
+      {
+        if (correlatorInUse[index] ==  FALSE )
+        {
+          correlatorInUse[index] =  TRUE;
+          break;
+        }
+      }
+    } /* index == maxCorrelators */
+
+    if ((index == lastCorrelatorTaken) || (index == maxCorrelators))
+    {
+      /* No correlator available at this time */
+      *correlator = 0;
+      rc =  FAILURE;
+    }
+    else
+    {
+      rc =  SUCCESS;
+      *correlator = index;
+      lastCorrelatorTaken = index;
+    }
+
+    osapiSemaGive(nimCorrelatorSema);
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+*
+* @purpose  Delete a correlator for the event
+*
+* @param    correlator        @b{(input)}  The correlator to delete
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @end
+*********************************************************************/
+RC_t nimEventCorrelatorDelete(NIM_CORRELATOR_t correlator)
+{
+  RC_t rc =  SUCCESS;
+
+  osapiSemaTake(nimCorrelatorSema, WAIT_FOREVER);
+
+  if (correlator < maxCorrelators)
+  {
+    correlatorInUse[correlator] =  FALSE;
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+
+  osapiSemaGive(nimCorrelatorSema);
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Initialize the Event Handler Resources
+*
+* @param    none
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @notes    none
+*
+* @end
+*
+*********************************************************************/
+RC_t nimEventHdlrInit()
+{
+  RC_t rc =  SUCCESS;
+
+  do
+  {
+    maxCorrelators = /*nimSidMsgCountGet()*/ 16000 * 2;
+
+    if ((nimEventSema = osapiSemaMCreate(OSAPI_SEM_Q_FIFO)) ==  NULLPTR)
+    {
+      NIM_LOG_ERROR("NIM: failed to create the event semaphore\n");
+      rc =  FAILURE;
+      break;
+    }
+
+    if ((nimCorrelatorSema = osapiSemaMCreate(OSAPI_SEM_Q_FIFO)) ==  NULLPTR)
+    {
+      NIM_LOG_ERROR("NIM: failed to create the correlator semaphore\n");
+      rc =  FAILURE;
+      break;
+    }
+
+    correlatorInUse = osapiMalloc ( NIM_COMPONENT_ID, maxCorrelators * sizeof (NIM_CORRELATOR_t));
+
+    (void)memset((void*)correlatorInUse,0,sizeof(NIM_CORRELATOR_t)*maxCorrelators);
+
+    (void)memset((void*)&correlatorTable,0,sizeof(nimCorrelatorData_t));
+
+    correlatorTable.remainingMask = osapiMalloc( NIM_COMPONENT_ID, sizeof(uint32) * (( LAST_COMPONENT_ID/32) +1));
+
+    if (correlatorTable.remainingMask ==  NULL)
+    {
+      NIM_LOG_ERROR("NIM: unable to alloc memory for correlator table.\n");
+      rc =  FAILURE;
+    }
+    else
+    {
+      memset((void*)correlatorTable.remainingMask,0,sizeof(uint32) * (( LAST_COMPONENT_ID/32) +1));
+    }
+
+    correlatorTable.failedMask = osapiMalloc( NIM_COMPONENT_ID, sizeof(uint32) * (( LAST_COMPONENT_ID/32) +1));
+
+    if (correlatorTable.failedMask ==  NULL)
+    {
+      NIM_LOG_ERROR("NIM: unable to alloc memory for correlator table.\n");
+      rc =  FAILURE;
+    }
+    else
+    {
+      memset((void*)correlatorTable.failedMask,0,sizeof(uint32) * (( LAST_COMPONENT_ID/32) +1));
+    }
+
+    maxCorrelatorsInUse = 0;
+
+    lastCorrelatorTaken = 0;
+
+    /* create queue for receiving responses from sync messages */
+    pNimEventStatusQueue = osapiMsgQueueCreate("NIM EVENT RESPONSE QUEUE", 1, sizeof(NIM_EVENT_STATUS_MSG_t));
+
+    if (pNimEventStatusQueue ==  NULLPTR)
+    {
+      NIM_LOG_ERROR("NIM: unable to create the status quueue.\n");
+      rc =  ERROR;
+      break;
+    }
+
+  } while ( 0 );
+
+  return rc;
+}
+
+
+/*********************************************************************
+* @purpose  Remove the Event Handler Resources
+*
+* @param    file_name   @b{(input)}   File name from where this function is called
+* @param    line_number @b{(input)}   Line number from where this function is called
+* @param    status      @b{(input)}   The returned value from the caller
+* @param    complete    @b{(output)}  Boolean value indicating whether event is complete
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @notes    none
+*
+* @end
+*
+*********************************************************************/
+RC_t nimEventTally( char8 *file_name, uint32 line_number,
+                      NIM_EVENT_COMPLETE_INFO_t status,
+                       BOOL *complete)
+{
+  RC_t rc =  SUCCESS;
+  uint32 mask = 0;
+  uint32 intIndex,bitIndex;
+  uint32 index;
+  uint32 maxComps = 0;
+   uchar8 ifName[ NIM_IFNAME_SIZE + 1];
+
+  intIndex = status.component/32;
+  bitIndex = status.component%32;
+  maxComps = ( LAST_COMPONENT_ID / 32) + 1;
+
+  if (status.correlator != correlatorTable.correlator)
+  {
+    NIM_LOG_ERROR("NIM: Unexpected status callback on correlator(%d), event(%d), intIf(%d).\
+                  \r\nnimEventTally: Failed by task %p in file %s line %d.\n",
+                  status.correlator,status.event,status.intIfNum,
+                  osapiTaskIdSelf(), file_name, line_number);
+    rc =  FAILURE;
+  }
+  else
+  {
+    correlatorTable.remainingMask[intIndex] &= ~(1 << bitIndex);
+
+    for (index = 0;index < maxComps;index++)
+    {
+      mask |= correlatorTable.remainingMask[index];
+    }
+
+    *complete = (mask == 0)? TRUE: FALSE;
+
+    if (status.response.rc !=  SUCCESS)
+    {
+      correlatorTable.response = status.response.rc;
+      correlatorTable.failedMask[intIndex] |= (1 << bitIndex);
+      memset(ifName, 0, sizeof(ifName));
+      nimGetIntfName(status.intIfNum,  ALIASNAME, ifName);
+      NIM_LOG_ERROR("NIM: Component(%s) failed on event(%s) for interface(%s).\
+                     \r\nnimEventTally: Failed by task %p in file %s line %d.\n",
+                     nimDebugCompStringGet(status.component),nimGetIntfEvent(status.event),
+                     ifName, osapiTaskIdSelf(), file_name, line_number);
+    }
+  }
+
+  return(rc);
+}
+
+
+/*********************************************************************
+* @purpose  Post Processor for Events
+*
+* @param    eventInfo    @b{(input)}   The event information as assigned by the generator
+* @param    status       @b{(output)}  The status of the event by either Tally or Timeout
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @notes    none
+*
+* @end
+*
+*********************************************************************/
+void nimEventPostProcessor(NIM_EVENT_NOTIFY_INFO_t eventInfo, NIM_NOTIFY_CB_INFO_t status)
+{
+   INTF_STATES_t currState, nextState;
+
+  NIM_CRIT_SEC_WRITE_ENTER();
+
+  currState = nimUtilIntfStateGet(eventInfo.intIfNum);
+
+  if (status.response.rc ==  SUCCESS)
+  {
+    switch (eventInfo.event)
+    {
+      case  CREATE:
+        if (nimUtilIntfNextStateGet(currState, CREATE_COMPLETE,&nextState) ==  SUCCESS)
+        {
+          nimUtilIntfStateSet(eventInfo.intIfNum,nextState);
+        }
+
+        NIM_INTF_SETMASKBIT(nimCtlBlk_g->createdMask,eventInfo.intIfNum);
+
+        /* set the appropriate bit interface specific mask */
+        switch (nimCtlBlk_g->nimPorts[eventInfo.intIfNum].sysIntfType)
+        {
+          case  PHYSICAL_INTF:
+            NIM_INTF_SETMASKBIT(nimCtlBlk_g->physicalIntfMask,eventInfo.intIfNum);
+            break;
+          case  CPU_INTF:
+            NIM_INTF_SETMASKBIT(nimCtlBlk_g->cpuIntfMask,eventInfo.intIfNum);
+            break;
+          case  LAG_INTF:
+            NIM_INTF_SETMASKBIT(nimCtlBlk_g->lagIntfMask,eventInfo.intIfNum);
+            break;
+          case  LOGICAL_VLAN_INTF:
+            NIM_INTF_SETMASKBIT(nimCtlBlk_g->vlanIntfMask,eventInfo.intIfNum);
+            break;
+          case  SERVICE_PORT_INTF:
+            NIM_INTF_SETMASKBIT(nimCtlBlk_g->servicePortIntfMask,eventInfo.intIfNum);
+            break;
+          default:
+            break;
+        }
+
+        /* shouldn't increment for pseudo interfaces like tunnels... */
+        nimCtlBlk_g->ifNumber++;
+
+        NIM_CRIT_SEC_WRITE_EXIT();
+        break;
+
+      case  DETACH:
+        if (nimUtilIntfNextStateGet(currState, DETACH_COMPLETE,&nextState) ==  SUCCESS)
+        {
+          nimUtilIntfStateSet(eventInfo.intIfNum,nextState);
+        }
+
+        NIM_INTF_CLRMASKBIT(nimCtlBlk_g->presentMask,eventInfo.intIfNum);
+
+        NIM_CRIT_SEC_WRITE_EXIT();
+        break;
+
+      case  ATTACH:
+        if (nimUtilIntfNextStateGet(currState, ATTACH_COMPLETE,&nextState) ==  SUCCESS)
+        {
+          nimUtilIntfStateSet(eventInfo.intIfNum,nextState);
+        }
+
+        NIM_INTF_SETMASKBIT(nimCtlBlk_g->presentMask,eventInfo.intIfNum);
+
+        NIM_CRIT_SEC_WRITE_EXIT();
+
+        /* More work needed for the ATTACH process */
+        nimEventAttachPostProcess(eventInfo);
+
+        break;
+      case  DELETE:
+        if (nimUtilIntfNextStateGet(currState, DELETE_COMPLETE,&nextState) ==  SUCCESS)
+        {
+          nimUtilIntfStateSet(eventInfo.intIfNum,nextState);
+        }
+
+
+        NIM_INTF_CLRMASKBIT(nimCtlBlk_g->createdMask,eventInfo.intIfNum);
+
+        /* set the appropriate bit interface specific mask */
+        switch (nimCtlBlk_g->nimPorts[eventInfo.intIfNum].sysIntfType)
+        {
+          case  PHYSICAL_INTF:
+            NIM_INTF_CLRMASKBIT(nimCtlBlk_g->physicalIntfMask,eventInfo.intIfNum);
+            break;
+          case  CPU_INTF:
+            NIM_INTF_CLRMASKBIT(nimCtlBlk_g->cpuIntfMask,eventInfo.intIfNum);
+            break;
+          case  LAG_INTF:
+            NIM_INTF_CLRMASKBIT(nimCtlBlk_g->lagIntfMask,eventInfo.intIfNum);
+            break;
+          case  LOGICAL_VLAN_INTF:
+            NIM_INTF_CLRMASKBIT(nimCtlBlk_g->vlanIntfMask,eventInfo.intIfNum);
+            break;
+          case  SERVICE_PORT_INTF:
+            NIM_INTF_CLRMASKBIT(nimCtlBlk_g->servicePortIntfMask,eventInfo.intIfNum);
+            break;
+          default:
+            break;
+        }
+
+        /* shouldn't decrement for pseudo interfaces like tunnels... */
+        nimCtlBlk_g->ifNumber--;
+
+        NIM_CRIT_SEC_WRITE_EXIT();
+
+        /* Now we can successfully delete the interface */
+        nimDeleteInterface(eventInfo.intIfNum);
+
+        break;
+
+      default:
+        NIM_CRIT_SEC_WRITE_EXIT();
+        break;
+    }
+  }
+  else
+  {
+    NIM_CRIT_SEC_WRITE_EXIT();
+
+    NIM_LOG_ERROR("NIM: Failed event(%d), intIfNum(%d)\n",
+                  eventInfo.event, eventInfo.intIfNum);
+  }
+
+  /* notify the event generator if there was a callback assigned */
+  if (eventInfo.pCbFunc !=  NULLPTR)
+  {
+    status.event    = eventInfo.event;
+    status.intIfNum = eventInfo.intIfNum;
+    eventInfo.pCbFunc(status);
+  }
+
+  nimTracePortEvent(eventInfo.component,eventInfo.event,eventInfo.intIfNum, FALSE,status.handle);
+}
+
+/*********************************************************************
+*
+* @purpose  Define the system ifName,ifNameLong and ifDescr for the specified interface
+*
+* @param    configId        @b{(input)} NIM configID for the interface
+* @param    configId        @b{(input)} NIM configID for the interface
+* @param    *ifName         @b{(output)}  Ptr to buffer to contain name
+* @param    *ifNameDescr    @b{(output)}  Ptr to buffer to contain description
+* @param    *ifNameLong     @b{(output)}  Ptr to buffer to contain long format name
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    Buffer must be of size  NIM_IFNAME_SIZE
+*           and  NIM_INTF_DESCR_SIZE, respectively
+*
+* @notes    "This routine provides a hook for customization of the ifName and ifDescr 
+*            of a specific interface type. A valid ifName and ifDescr are expected to 
+*            be passed in by the component.If nimIfDescrInfoSet() is overridden by a 
+*            replacement routine,the replacement routine must be used to modify these
+*            parameters for interfaces which must be customized for the product."
+*            This function defines the parameters in FP naming style
+*
+*         
+*
+* @end
+*********************************************************************/
+void nimIfDescrInfoSet(nimConfigID_t *configId,  IANA_INTF_TYPE_t ianaType,
+                           uchar8 *ifName, uchar8 *ifDescr, uchar8 *ifNameLong)
+{
+  return;
+}
+
+
+/*********************************************************************
+* @purpose  Request to create an interface
+*
+* @param    *pRequest       @b{(input)}   pointer to nimIntfCreateRequest_t structure
+* @param    *pOutput         @b{(output)}  The returned data for this create request
+*
+*
+* @returns  one of RC_t enum values
+*
+* @notes  This routine is used to request the creation of an interface.
+*         All interfaces must be created using this mechanism.
+*
+*
+*         *pIntfIdInfo - This should contain sufficient information to uniquely
+*                       identify the interface in the system.
+*
+*         *pIntfDescr  - This is a pointer to static information that describes this
+*                       interface. This information MUST be completely specified
+*                       with the create request.
+*                       based on FD_NIM_DEFAULT* values.
+*
+*         *pDefaultCfg - This is a pointer to the information that would be stored
+*                       in this particular port's configuration file if configuration
+*                       were reset to default values.
+*
+*                       If this pointer is null, NIM presumes default configuration
+*                       based on FD_NIM_DEFAULT* values.
+*
+*                       Note that all ports of the same type should have the same
+*                       default configuration, although this methodology gives a
+*                       system integrator flexibility on different devices.
+*
+*                       The default configuration will be applied on a subsequent
+*                        ATTACH command if no non-volatile configuration exists for
+*                       this interface.
+*
+*
+*
+* @end
+*********************************************************************/
+RC_t   nimIntfCreate(nimIntfCreateRequest_t *pRequest, nimIntfCreateOutput_t *pOutput)
+{
+  nimUSP_t  usp;
+  RC_t   rc =  SUCCESS;
+  uint32 *intIfNum;
+  uint32 port;
+  nimConfigIdTreeData_t  configIdInfo;
+  nimConfigID_t          *intfIdInfo;  /* unique interface specification info */
+  nimIntfDescr_t         *intfDescr;   /* unique interface descriptor  info */
+  uint32 defaultPortModeEnable=0;   /* Default state read from card structure */
+  uint32 runtimeEnable=0;           /* State read from HPC file if present */
+  uint32 defaultExpand=0;           /* Does this port expand Immediately from 40G to 10G and vice versa */
+  
+  if ((pRequest ==  NULLPTR) || (pOutput ==  NULLPTR) ||
+      (pRequest->pIntfDescr ==  NULLPTR) ||
+      (pRequest->pIntfIdInfo ==  NULLPTR))
+  {
+    NIM_LOG_ERROR("NIM: Null data in call to nimIntfCreate\n");
+    return  FAILURE; 
+  }
+  
+  intIfNum = pOutput->intIfNum;
+  intfIdInfo = pRequest->pIntfIdInfo;
+  intfDescr = pRequest->pIntfDescr;
+  *intIfNum = 0;
+  
+  NIM_CRIT_SEC_WRITE_ENTER();
+
+  do
+  {
+    /* No interfaces can be created until we are in Execute */
+    if ( nimPhaseStatusCheck() !=  TRUE)
+    {
+      rc =  FAILURE;
+      break;
+    }
+    else
+    {
+      rc =  SUCCESS;
+    }
+
+    memcpy((void *)&usp,&pRequest->pIntfIdInfo->configSpecifier.usp,sizeof(nimUSP_t));
+
+    switch (pRequest->pIntfIdInfo->type)
+    {
+      case  PHYSICAL_INTF:
+      case  CPU_INTF:
+      case  STACK_INTF:
+        break;
+
+      case  LAG_INTF:
+        /*
+         * get the u and s from cmgr, port is the id of the interface
+         * The passed in intfId must be 1 based and it's range needs to be
+         * determined as 1 - platIntfLagIntfMaxCountGet()
+         */
+
+        /*
+         * Need to perform a LAG create for DTL
+         * the LAG U and S need to be determined via CMGR
+         */
+        usp.unit = ( uchar8) LOGICAL_UNIT;
+        usp.slot = ( uchar8)platSlotLagSlotNumGet ();
+        usp.port = pRequest->pIntfIdInfo->configSpecifier.dot3adIntf;
+        break;
+
+      case  LOGICAL_VLAN_INTF:
+        /*
+         * get the u and s from cmgr, port is the id of the interface
+         * The passed in intfId must be 1 based and it's range needs to be
+         * determined as 1 - platIntfVlanIntfMaxCountGet()
+         */
+
+        usp.unit = ( uchar8) LOGICAL_UNIT;
+        usp.slot = ( uchar8)platSlotVlanSlotNumGet ();
+
+        if (nimPortInstanceNumGet(*pRequest->pIntfIdInfo, &port) ==  SUCCESS)
+          usp.port = port;
+        else
+          usp.port = platIntfMaxCountGet() + 1;  /* Set to an invalid value */
+        break;
+
+      case  LOOPBACK_INTF:
+        /*
+         * get the u and s from cmgr, port is the id of the interface
+         * The passed in loopbackId is 0 based and it's range needs to be
+         * determined as 1 - platIntfLoopbackIntfMaxCountGet()
+         */
+
+        usp.unit = ( uchar8) LOGICAL_UNIT;
+        usp.slot = ( uchar8)platSlotLoopbackSlotNumGet ();
+        usp.port = pRequest->pIntfIdInfo->configSpecifier.loopbackId + 1;
+        break;
+
+      case  TUNNEL_INTF:
+        /*
+         * get the u and s from cmgr, port is the id of the interface
+         * The passed in tunnelId is 0 based and it's range needs to be
+         * determined as 1 - platIntfTunnelIntfMaxCountGet()
+         */
+
+        usp.unit = ( uchar8) LOGICAL_UNIT;
+        usp.slot = ( uchar8)platSlotTunnelSlotNumGet ();
+        usp.port = pRequest->pIntfIdInfo->configSpecifier.tunnelId + 1;
+        break;
+
+      case  SERVICE_PORT_INTF:
+        /*
+         * get the u and s from cmgr, port is the id of the interface
+         * The passed in servicePortId is 0 based and it's range needs to be
+         * determined as 1 - platIntfServicePortIntfMaxCountGet()
+         */
+
+        usp.unit = ( uchar8) LOGICAL_UNIT;
+        usp.slot = ( uchar8)platSlotServicePortSlotNumGet ();
+        usp.port = pRequest->pIntfIdInfo->configSpecifier.servicePortId + 1;
+        break;
+
+
+      default:
+        NIM_LOG_MSG("NIM: Unknown interface type in nimIntfCreate\n");
+        rc =  FAILURE;
+        break;
+    }
+
+    /* if we have not gotten here successfully, return */
+    if (rc !=  SUCCESS) break;
+
+     NIM_IFDESCRINFO_SET(intfIdInfo, intfDescr->ianaType,
+                                intfDescr->ifName,
+                                intfDescr->ifDescr,
+                                intfDescr->ifLongName);
+
+    NIM_CRIT_SEC_WRITE_EXIT();
+
+    /* quick check to see if the interface is created */
+    if ((rc = nimGetIntIfNumFromUSP(&usp,intIfNum)) !=  ERROR)
+    {
+      NIM_LOG_MSG("NIM: Interface already created, %d.%d.%d\n",usp.unit,usp.slot,usp.port);
+      rc =  ERROR;
+    }
+    else if (pRequest->pIntfIdInfo->type >=  MAX_INTF_TYPE_VALUE)
+    {
+      NIM_LOG_MSG("Invalid Interface Type in create request\n");
+      rc =  FAILURE;
+    }
+    else if (nimNumberOfInterfaceExceeded(pRequest->pIntfIdInfo->type) ==  TRUE)
+    {
+      NIM_LOG_MSG("NIM: Number of interface of type(%d) exceeded during create\n",pRequest->pIntfIdInfo->type);
+      rc =  FAILURE;
+    }
+    else
+    {
+      rc =  SUCCESS;
+    }
+
+    NIM_CRIT_SEC_WRITE_ENTER();
+
+    if (rc !=  SUCCESS)
+    {
+        /* Note that we must break out of the loop while holding the write lock.
+        */
+        break;
+    }
+
+    if ((nimIntIfNumCreate(*pRequest->pIntfIdInfo,intIfNum) !=  SUCCESS) || (*intIfNum ==  0))
+    {
+      NIM_LOG_MSG("NIM: Failed to create the internal interface number\n");
+      rc =  FAILURE;
+      break;
+    }
+    else
+    {
+      /* reset all the information for this interface */
+      memset(( void * )&nimCtlBlk_g->nimPorts[*intIfNum],0, sizeof( nimIntf_t )); 
+    }
+
+    /* set the fast lookup for USP to intIfNum */
+    if (nimUnitSlotPortToIntfNumSet(&usp,*intIfNum) !=  SUCCESS)
+    {
+      NIM_LOG_MSG("NIM: Failed to set the mapping of USP to intIfNum fast lookup\n");
+      rc =  FAILURE;
+
+      break;
+    }
+    else
+    {
+      nimCtlBlk_g->nimPorts[*intIfNum].resetTime = osapiUpTimeRaw();
+
+      /* set the intIfNums of the interface */
+      nimCtlBlk_g->nimPorts[*intIfNum].intfNo = *intIfNum;
+
+      nimCtlBlk_g->nimPorts[*intIfNum].runTimeMaskId = *intIfNum;
+
+      NIM_CONFIG_ID_COPY(&nimCtlBlk_g->nimPorts[*intIfNum].configInterfaceId,pRequest->pIntfIdInfo);
+
+      nimCtlBlk_g->nimPorts[*intIfNum].sysIntfType = pRequest->pIntfIdInfo->type;
+
+      nimIfIndexCreate(usp,pRequest->pIntfIdInfo->type,&nimCtlBlk_g->nimPorts[*intIfNum].ifIndex,*intIfNum);
+
+      nimCtlBlk_g->nimPorts[*intIfNum].usp = usp;
+
+      /* copy the interface characteristics from the caller's request */
+      memcpy(&nimCtlBlk_g->nimPorts[*intIfNum].operInfo,pRequest->pIntfDescr,sizeof(nimIntfDescr_t));
+
+      /* Expandable Ports and Port Mode related changes */
+     
+      /* Enabling all ports by default */
+      NIM_EXP_PORT_MODE_STATUS_ENABLE(nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.portModeFlags);
+      NIM_EXP_PORT_MODE_SET_NONE(nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.portModeFlags);
+
+      
+      /* remaining items in the interface are present, resetTime, linkChangeTime, currentLoopbackState, intfState */
+      if (pRequest->pIntfIdInfo->type ==
+           PHYSICAL_INTF)
+      {
+        /* nimCtlBlk_g->nimPorts[*intIfNum].operInfo.activeMedium = FD_NIM_DEFAULT_ACTIVE_MEDIUM; */
+      }
+      /* Get the default config for the interface */
+      if (pRequest->pDefaultCfg ==  NULLPTR)
+      {
+        /* no defaultConfig was supplied by the caller; therefore, use NIMs default for the type */
+        nimConfigDefaultGet(pRequest->pIntfDescr,&nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg);
+
+#if 0
+        /* For SFP/SFP+/Non-Combo capable ports, set default AutoNeg to 0 */
+        if (nimCtlBlk_g->nimPorts[*intIfNum].operInfo.connectorType !=  RJ45)
+        {
+          if (nimCtlBlk_g->nimPorts[*intIfNum].operInfo.ianaType ==  IANA_10G_ETHERNET)
+          {
+            nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.negoCapabilities = 0;
+            nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.cfgNegoCapabilities = 0;
+            nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.ifSpeed = FD_NIM_NO_NEG_10G_ENET_SPEED;
+          }
+          nimCtlBlk_g->nimPorts[*intIfNum].operInfo.activeMedium = PORT_MEDIUM_FIBER;
+        }
+#endif
+        if ( PHY_CAP_EXPANDABLE_PORT_CHECK(nimCtlBlk_g->nimPorts[*intIfNum].operInfo.phyCapability))
+        {
+        NIM_EXP_PORT_DBG("For intf %d defaults, flag 0x%x got port mode %d enable %d Immediate Mode %d\n", 
+                         *intIfNum,
+                         nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.portModeFlags,         
+                         NIM_EXP_PORT_MODE_GET(nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.portModeFlags),
+                         NIM_EXP_PORT_MODE_STATUS_GET(nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.portModeFlags),
+                         nimCtlBlk_g->nimPorts[*intIfNum].operInfo.ifImmediateExpand);
+        }
+        if ( PHY_CAP_FEC_SUPPORT_CHECK(nimCtlBlk_g->nimPorts[*intIfNum].operInfo.phyCapability))
+        {
+          if (nimCtlBlk_g->nimPorts[*intIfNum].operInfo.fecCapability >  CAP_FEC_ENABLE)
+          {
+            nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.fecMode =
+              nimCtlBlk_g->nimPorts[*intIfNum].operInfo.defaultFEC;
+          }
+        }
+      }
+      else
+      {
+        /* use the callers supplied default config */
+        memcpy(&nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg,pRequest->pDefaultCfg,sizeof(nimIntfConfig_t));
+        /* This field not set by caller */
+        nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.mgmtAdminState = FD_NIM_ADMIN_STATE;
+        nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.softShutdownState = FD_NIM_SOFT_SHUT_STATE;
+      }
+
+      NIM_INTF_CLRMASKBIT(nimCtlBlk_g->linkStateMask, nimCtlBlk_g->nimPorts[*intIfNum].runTimeMaskId);
+
+      if (nimCtlBlk_g->nimPorts[*intIfNum].capabilityCfg.medium != 0 )
+      {
+        nimCtlBlk_g->nimPorts[*intIfNum].operInfo.activeMedium = 
+          nimCtlBlk_g->nimPorts[*intIfNum].capabilityCfg.medium;
+      }
+
+      nimCtlBlk_g->nimPorts[*intIfNum].present =  TRUE;
+
+      /* check to see if we have a saved config for the interface */
+      if ((rc = nimConfigSet(&nimCtlBlk_g->nimPorts[*intIfNum],NIM_CFG_VER_CURRENT)) !=  SUCCESS)
+      {
+        NIM_LOG_MSG("NIM: Failed to set the config for interface\n");
+        rc =  FAILURE;
+      }
+      else if ((rc = nimUtilIntfStateSet(*intIfNum, INTF_CREATING)) !=  SUCCESS)
+      {
+        NIM_LOG_MSG("NIM: Failed to set intf state to  INTF_CREATING\n");
+        rc =  FAILURE;
+      }
+      else
+      {        
+        rc =  SUCCESS;
+#ifndef  FEATURE_EXPANDABLE_PORTS_NO_HPC 
+        if ( FALSE ==
+            NIM_EXP_IS_PORT_MODE_NONE(nimCtlBlk_g->nimPorts[*intIfNum].defaultCfg.portModeFlags))
+        {
+          if ( TRUE ==  nimCtlBlk_g->nimPorts[*intIfNum].operInfo.ifImmediateExpand)
+          {
+            /* Set whatever was read from HPC as the new Configured state.  */
+            NIM_EXP_PORT_MODE_STATUS_SET(nimCtlBlk_g->nimPorts[*intIfNum].configPort.cfgInfo.portModeFlags, 
+                                         ( BOOL)runtimeEnable);        
+            if ( PHY_CAP_EXPANDABLE_PORT_CHECK(pRequest->pIntfDescr->phyCapability))
+            {
+              if ( TRUE == runtimeEnable)
+              {
+                NIM_EXP_PORT_MODE_SET_QUAD_40G(nimCtlBlk_g->nimPorts[*intIfNum].configPort.cfgInfo.portModeFlags);
+              }
+              else
+              {
+                NIM_EXP_PORT_MODE_SET_SINGLE_10G(nimCtlBlk_g->nimPorts[*intIfNum].configPort.cfgInfo.portModeFlags);
+              }
+            }              
+          }          
+        }
+#endif
+        if ( PHY_CAP_EXPANDABLE_PORT_CHECK(pRequest->pIntfDescr->phyCapability))
+        {
+          NIM_EXP_PORT_DBG("For intf %d after startup apply got port mode %d enable %d Immediate Mode %d\n", 
+               *intIfNum,
+                           NIM_EXP_PORT_MODE_GET(nimCtlBlk_g->nimPorts[*intIfNum].configPort.cfgInfo.portModeFlags) ,
+                           NIM_EXP_PORT_MODE_STATUS_GET(nimCtlBlk_g->nimPorts[*intIfNum].configPort.cfgInfo.portModeFlags),
+                           nimCtlBlk_g->nimPorts[*intIfNum].operInfo.ifImmediateExpand);
+        }
+      }
+    }
+
+  } while ( 0 );
+
+  if (rc !=  SUCCESS)
+  {
+    if ((*intIfNum != 0) && (rc !=  ERROR))
+    {
+      /* rewind the data for the create */
+      (void)nimUtilIntfStateSet(*intIfNum, INTF_UNINITIALIZED);
+      nimIntIfNumDelete(*intIfNum);
+      nimUnitSlotPortToIntfNumSet(&usp,0);
+      memset((void*)&nimCtlBlk_g->nimPorts[*intIfNum],0,sizeof(nimIntf_t));
+
+
+      memset(&configIdInfo, 0 , sizeof( configIdInfo));
+      NIM_CONFIG_ID_COPY(&configIdInfo.configId, pRequest->pIntfIdInfo);
+      configIdInfo.intIfNum = *intIfNum;
+      (void)nimConfigIdTreeEntryDelete( &configIdInfo);
+    }
+    NIM_CRIT_SEC_WRITE_EXIT();
+  }
+  else
+  {
+    if (nimCtlBlk_g->nimHighestIntfNumber < *intIfNum)
+    {
+      nimCtlBlk_g->nimHighestIntfNumber = *intIfNum;
+    }
+    /* give back the sema before calling out to the other components */
+    NIM_CRIT_SEC_WRITE_EXIT();
+
+    if (rc !=  SUCCESS)
+    {
+      NIM_LOG_MSG("NIM: Failed to notify the components of  CREATE event\n");
+
+      NIM_CRIT_SEC_WRITE_ENTER();
+
+      /* rewind the data for the create */
+      (void)nimUtilIntfStateSet(*intIfNum, INTF_UNINITIALIZED);
+      nimIntIfNumDelete(*intIfNum);
+      nimUnitSlotPortToIntfNumSet(&usp,0);
+      memset((void*)&nimCtlBlk_g->nimPorts[*intIfNum],0,sizeof(nimIntf_t));
+
+
+      memset(&configIdInfo, 0 , sizeof( configIdInfo));
+      NIM_CONFIG_ID_COPY(&configIdInfo.configId, pRequest->pIntfIdInfo);
+      configIdInfo.intIfNum = *intIfNum;
+      (void)nimConfigIdTreeEntryDelete( &configIdInfo);
+
+      NIM_CRIT_SEC_WRITE_EXIT();
+    }
+    else
+    {
+
+      NIM_CRIT_SEC_WRITE_ENTER();
+
+      nimCtlBlk_g->numberOfInterfacesByType[pRequest->pIntfIdInfo->type]++;
+
+      nimCtlBlk_g->nimNumberOfPortsPerUnit[(uint32)usp.unit]++;
+
+      NIM_CRIT_SEC_WRITE_EXIT();
+    }
+  }
+
+  return rc;
+}
+
+
+/*********************************************************************
+* @purpose  Notify the system application layer of changes in interfaces
+*
+* @param    unit        unit number (stack unit)
+* @param    slot        slot number
+* @param    port        port number
+* @param    cardType    a card descriptor as given to Card Manager from HPC
+* @param    event       an event designator such as  ENABLE
+* @param    interfaceType   the type of interface such as PHYSICAL
+*
+* @returns  void
+*
+* @notes
+*
+* @end
+*********************************************************************/
+RC_t   nimCmgrNewIntfChangeCallback(uint32 unit, uint32 slot, uint32 port,
+                                       uint32 cardType, PORT_EVENTS_t event,
+                                       SYSAPI_HPC_PORT_DESCRIPTOR_t *portData,
+                                                     enetMacAddr_t *macAddr)
+{
+  RC_t                rc =  FAILURE;
+  nimIntfCreateRequest_t pRequest;
+  uint32   intIfNum;
+  NIM_HANDLE_t  handle;
+  NIM_INTF_CREATE_INFO_t eventInfo;
+  NIM_EVENT_NOTIFY_INFO_t  notifyEventInfo;
+  const  char8*        pIfaceSpeed = NULL;
+
+  /* pIfaceSpeedDescr: "<port speed>" */
+   char8               pIfaceSpeedDescr[ NIM_INTF_SPEED_DESCR_SIZE]; 
+  
+  /* workBuffer: "Unit: <unit> Slot: <slot> Port: <port>" */
+   char8               workBuffer[ NIM_INTF_DESCR_SIZE]; 
+
+  /* workBuffer1: "<unit>/<slot>/<port>" */
+   char8               workBuffer1[ NIM_USP_DESCR_SIZE]; 
+
+  nimConfigID_t          pIntfIdInfo;  /* unique interface specification info */
+  nimIntfDescr_t         pIntfDescr;   /* unique interface descriptor  info */
+  nimIntfCreateOutput_t  output;
+
+  /* Initialize data structures */
+
+  memset((void *)&pIntfIdInfo,0,sizeof(nimConfigID_t));
+  memset((void *)&eventInfo,0,sizeof(NIM_INTF_CREATE_INFO_t));
+  memset((void *)&pIntfDescr,0,sizeof(nimIntfDescr_t));
+  memset((void *)&pRequest,0,sizeof(nimIntfCreateRequest_t));
+
+  output.handle =   &handle;
+  output.intIfNum = &intIfNum;
+
+  eventInfo.component =  CARDMGR_COMPONENT_ID;
+  eventInfo.pCbFunc   = nimEventCmgrDebugCallback;
+
+  /* setup the config ID */
+  pIntfIdInfo.configSpecifier.usp.unit = unit;
+  pIntfIdInfo.configSpecifier.usp.slot = slot;
+  pIntfIdInfo.configSpecifier.usp.port = port;
+
+  /* setup the request block pointers */
+  pRequest.pDefaultCfg  =  NULLPTR;
+  pRequest.pIntfDescr   = &pIntfDescr;
+  pRequest.pIntfIdInfo  = &pIntfIdInfo;
+  pRequest.pCreateInfo  = &eventInfo;
+
+  memset(workBuffer, 0, sizeof(workBuffer));
+  memset(workBuffer1, 0, sizeof(workBuffer1));
+  memset(pIfaceSpeedDescr, 0, sizeof(pIfaceSpeedDescr));
+  
+  switch (portData->type)
+  {
+    case   IANA_OTHER_CPU:
+      pIntfIdInfo.type =  CPU_INTF;
+      snprintf (pIntfDescr.ifDescr, sizeof(pIntfDescr.ifDescr),
+                "%s %s %d %s %d",
+                " CPU Interface for", "Slot:", slot, "Port:", port);
+
+      snprintf (pIntfDescr.ifName, sizeof(pIntfDescr.ifName),
+                "%s %d/%d",
+                "CPU Interface: ", slot, port);
+      break;
+
+    case  IANA_LAG:
+      pIntfIdInfo.type =  LAG_INTF;
+      snprintf (pIntfDescr.ifName, sizeof(pIntfDescr.ifName),
+                "%d/%d", slot, port);
+      break;
+
+    case   IANA_ETHERNET:
+    case   IANA_FAST_ETHERNET:
+    case   IANA_FAST_ETHERNET_FX:
+    case   IANA_GIGABIT_ETHERNET:
+    case   IANA_2P5G_ETHERNET:
+    case   IANA_5G_ETHERNET:
+    case   IANA_10G_ETHERNET:
+    case   IANA_20G_ETHERNET:
+    case   IANA_25G_ETHERNET:
+    case   IANA_40G_ETHERNET:
+    case   IANA_50G_ETHERNET:
+    case   IANA_100G_ETHERNET:
+    case   IANA_200G_ETHERNET:
+    case   IANA_400G_ETHERNET:
+
+      switch (portData->type)
+      {
+      case   IANA_GIGABIT_ETHERNET:
+        pIfaceSpeed = IANA_GIGABIT_ETHERNET_DESC;
+        osapiStrncpySafe(pIfaceSpeedDescr, GIGA_ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+        
+      case   IANA_2P5G_ETHERNET:
+        pIfaceSpeed = IANA_2P5G_ETHERNET_DESC;     
+        osapiStrncpySafe(pIfaceSpeedDescr, TWOPOINTFIVEGIG_ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+
+      case   IANA_5G_ETHERNET:
+        pIfaceSpeed = IANA_5G_ETHERNET_DESC;     
+        osapiStrncpySafe(pIfaceSpeedDescr, FIVE_GIGA_ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+
+      case   IANA_10G_ETHERNET:
+        pIfaceSpeed = IANA_10G_ETHERNET_DESC;     
+        osapiStrncpySafe(pIfaceSpeedDescr, TENGIG_ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+        
+      case   IANA_20G_ETHERNET:
+        pIfaceSpeed = IANA_20G_ETHERNET_DESC;     
+        osapiStrncpySafe(pIfaceSpeedDescr, TWENTYGIG_ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+        
+      case   IANA_25G_ETHERNET:
+        pIfaceSpeed = IANA_25G_ETHERNET_DESC;     
+        osapiStrncpySafe(pIfaceSpeedDescr, TWENTYFIVEGIG_ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+        
+      case   IANA_40G_ETHERNET:
+        pIfaceSpeed = IANA_40G_ETHERNET_DESC;     
+        osapiStrncpySafe(pIfaceSpeedDescr, FORTYGIG_ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+        
+      case   IANA_50G_ETHERNET:
+        pIfaceSpeed = IANA_50G_ETHERNET_DESC;
+        osapiStrncpySafe(pIfaceSpeedDescr, FIFTYGIG_ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+        
+      case   IANA_100G_ETHERNET:
+        pIfaceSpeed = IANA_100G_ETHERNET_DESC;     
+        osapiStrncpySafe(pIfaceSpeedDescr, HUNDREDGIG_ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+        
+      case   IANA_200G_ETHERNET:
+        pIfaceSpeed = IANA_200G_ETHERNET_DESC;     
+        osapiStrncpySafe(pIfaceSpeedDescr, TWOHUNDREDGIG_ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+
+      case   IANA_400G_ETHERNET:
+        pIfaceSpeed = IANA_400G_ETHERNET_DESC;     
+        osapiStrncpySafe(pIfaceSpeedDescr, FOURHUNDREDGIG_ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+
+      default:
+        pIfaceSpeed = IANA_FAST_ETHERNET_DESC;    
+        osapiStrncpySafe(pIfaceSpeedDescr, ETH_INTF_IFNAME_LONG_PREFIX, sizeof(pIfaceSpeedDescr));
+        break;
+      }
+
+      pIntfIdInfo.type =  PHYSICAL_INTF;
+      snprintf (workBuffer, sizeof(workBuffer), "%s %d %s %d",
+                "Slot:", slot, "Port:", port);
+
+      snprintf (pIntfDescr.ifName, sizeof(pIntfDescr.ifName), "%d/%d",
+                slot, port);
+
+      osapiSnprintf (workBuffer1, sizeof(workBuffer1), "%d/%d",
+                     slot, port);
+
+      snprintf (pIntfDescr.ifDescr, sizeof(pIntfDescr.ifDescr), "%s %s",
+                workBuffer, pIfaceSpeed);
+
+      osapiSnprintf (pIntfDescr.ifLongName, sizeof(pIntfDescr.ifLongName), "%s %s",
+                     pIfaceSpeedDescr, workBuffer1);
+      break;
+
+    case  IANA_L2_VLAN:
+      pIntfIdInfo.type =  LOGICAL_VLAN_INTF;
+      break;
+
+    case  IANA_OTHER_SERV_PORT:
+      pIntfIdInfo.type =  SERVICE_PORT_INTF;
+      pIntfIdInfo.configSpecifier.servicePortId = 0;
+
+      snprintf (pIntfDescr.ifDescr, sizeof(pIntfDescr.ifDescr),
+                "%s %s %d %s %d",
+                " Service Port Interface for", "Slot:", slot, "Port:", port);
+
+      snprintf (pIntfDescr.ifName, sizeof(pIntfDescr.ifName),
+                "%s %d/%d",
+                "Service Port Interface: ", slot, port);
+      break;
+
+    default:
+      NIM_LOG_MSG("NIM: Unknown interface type\n");
+      return( FAILURE);
+  }
+
+
+  memcpy(&pIntfDescr.macAddr, macAddr,  ENET_MAC_ADDR_LEN);
+  memcpy(&pIntfDescr.l3MacAddr.addr, macAddr,  ENET_MAC_ADDR_LEN);
+
+  pIntfDescr.configurable   =  TRUE;
+  pIntfDescr.settableParms  =  INTF_PARM_LINKTRAP;
+  
+  if (pIntfIdInfo.type !=  SERVICE_PORT_INTF)
+  {
+    pIntfDescr.settableParms |=  INTF_PARM_ADMINSTATE |  INTF_PARM_MTU |
+                                 INTF_PARM_MACADDR | 
+                                 INTF_PARM_LOOPBACKMODE |
+                                 INTF_PARM_MACROPORT |  INTF_PARM_ENCAPTYPE |
+                                 INTF_PARM_NW_INTF_TYPE;
+  }
+  switch (pIntfIdInfo.type)
+  {
+    case  PHYSICAL_INTF:
+      pIntfDescr.settableParms |=  INTF_PARM_AUTONEG |  INTF_PARM_SPEED |
+         INTF_PARM_FRAMESIZE| INTF_PARM_DEBOUNCETIME;
+
+      if (! PHY_CAP_PORTSPEED_AUTO_NEG_CHECK(portData->phyCapabilities))
+      {
+        pIntfDescr.settableParms &= ~ INTF_PARM_AUTONEG;
+      }
+
+      if ( PHY_CAP_AUTO_CONFIG_CHECK(portData->phyCapabilities))
+      {
+        pIntfDescr.settableParms &= ~( INTF_PARM_AUTONEG |  INTF_PARM_SPEED);
+      }
+      
+      if ((portData->type &  IANA_40G_ETHERNET) && 
+           PHY_CAP_EXPANDABLE_PORT_CHECK(portData->phyCapabilities))
+      {
+        pIntfDescr.settableParms |=  INTF_PARM_PORTMODE;
+        if ( PHY_CAP_PORTSPEED_FULL_10_CHECK(portData->phyCapabilities))
+        {
+          pIntfDescr.settableParms |=  INTF_PARM_SPEED;
+        }
+        NIM_EXP_PORT_DBG("For usp %d/%d/%d, setting parm portmode on\n", unit, slot,port);
+      }
+      
+      break;
+
+    case  LAG_INTF:
+      pIntfDescr.settableParms |=  INTF_PARM_FRAMESIZE;
+      break;
+
+    default:
+      /* do nothing */
+      break;
+  }
+
+  /*pIntfDescr.connectorType  = portData->connectorType;*/
+  pIntfDescr.defaultSpeed   =  portData->defaultSpeed;
+  pIntfDescr.frameSize.largestFrameSize = 1500;
+  pIntfDescr.ianaType       = portData->type;
+  pIntfDescr.internal       =  FALSE;
+  pIntfDescr.phyCapability  = portData->phyCapabilities;
+  memset((void*)&pIntfDescr.macroPort,0,sizeof(nimMacroPort_t));
+#ifdef  MAC_ENET_BCAST
+  memcpy (&pIntfDescr.bcastMacAddr,  & ENET_BCAST_MAC_ADDR, 6);
+#endif
+
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    NIM_LOG_MSG("NIM: Attempted event (%d), on USP %d.%d.%d before phase 3\n",event,unit,slot,port);
+    return(rc);
+  }
+
+  if ((unit < 1) || (slot > nimCtlBlk_g->maxNumOfSlotsPerUnit) || (port < 1))
+  {
+    NIM_LOG_MSG("NIM: attempted event (%d) with invalid USP, %d.%d.%d\n",event,unit,slot,port);
+    return(rc);
+  }
+
+  if (event ==  CREATE)
+  {
+    if (nimIntfCreate(&pRequest,&output) ==  SUCCESS)
+    {
+      NIM_LOG_MSG("Success in create\n");
+      notifyEventInfo.component =  CARDMGR_COMPONENT_ID;
+      notifyEventInfo.pCbFunc   = NULL;
+      notifyEventInfo.event =  CREATE;
+      notifyEventInfo.intIfNum = intIfNum;
+      rc = nimEventIntfNotify(notifyEventInfo,&handle);
+      if (rc !=  SUCCESS)
+      {
+        LOG_ERROR (rc);
+      }
+    }
+    else
+    {
+      NIM_LOG_MSG("Failed in create\n");
+    }
+  }
+  else
+  {
+    NIM_LOG_MSG("NIM: BAD event for my test\n");
+  }
+
+  return rc;
+}
+
+
+
+/*********************************************************************
+* @purpose  Post Processor for ATTACH events
+*
+* @param    eventInfo    @b{(input)}   The event information as assigned by the generator
+*
+* @returns  none
+*
+* @notes    none
+*
+* @end
+*
+*********************************************************************/
+void nimEventAttachPostProcess(NIM_EVENT_NOTIFY_INFO_t eventInfo)
+{
+   BOOL                 isLinkUp;
+  NIM_EVENT_NOTIFY_INFO_t attachEventInfo;
+  NIM_HANDLE_t            handle;
+  RC_t                 rc =  SUCCESS;
+
+  if ( SUCCESS) /* TODO */
+  {
+    NIM_CRIT_SEC_WRITE_ENTER();
+
+    if (isLinkUp ==  TRUE)
+    {
+      NIM_INTF_SETMASKBIT(nimCtlBlk_g->linkStateMask, nimCtlBlk_g->nimPorts[eventInfo.intIfNum].runTimeMaskId);
+
+      NIM_CRIT_SEC_WRITE_EXIT();
+
+      /*
+       * don't need to keep the handle around
+       * need to notify the rest of the system of the link state
+       */
+      attachEventInfo.event         =  UP;
+      attachEventInfo.component     =  NIM_COMPONENT_ID;
+      attachEventInfo.intIfNum      = eventInfo.intIfNum;
+      attachEventInfo.pCbFunc       =  NULLPTR;
+
+      if (nimEventIntfNotify(attachEventInfo,&handle) !=  SUCCESS)
+      {
+        NIM_LOG_MSG("NIM: Failed to send LINK UP on queue\n");
+        rc =  FAILURE;
+      }
+    }
+    else
+    {
+      NIM_INTF_CLRMASKBIT(nimCtlBlk_g->linkStateMask, nimCtlBlk_g->nimPorts[eventInfo.intIfNum].runTimeMaskId);
+
+      NIM_CRIT_SEC_WRITE_EXIT();
+    }
+
+  }
+  else
+    rc =  FAILURE;
+
+}
+
+
+
+
+
diff --git a/src/sonic-pac/fpinfra/nim/nim_ifindex.c b/src/sonic-pac/fpinfra/nim/nim_ifindex.c
new file mode 100755
index 00000000000..86ac3d20fcb
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_ifindex.c
@@ -0,0 +1,316 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "datatypes.h"
+#include "commdefs.h"
+#include "nim_ifindex.h"
+#include "avl_api.h"
+#include "tree_api.h"
+#include "nim_util.h" /* needed for NIM_LOG_MSG */
+#include "osapi_sem.h"
+#include <string.h>
+
+static avlTree_t              nimIfIndexTreeData  = { 0 };
+static void                   *nimIfIndexSema     =  NULL;
+
+/* Macros for protecting the AVL tree during operations */
+#define NIM_IFINDEX_CRIT_SEC_ENTER()  \
+{   \
+    osapiSemaTake(nimIfIndexSema, WAIT_FOREVER);  \
+}
+
+#define NIM_IFINDEX_CRIT_SEC_EXIT()  \
+{   \
+    osapiSemaGive(nimIfIndexSema);  \
+}
+
+/*********************************************************************
+* @purpose  Create an IfIndex
+*
+* @param    usp         @b{(input)}   The usp to encode in the ifIndex
+* @param    ifIndex     @b{(output)}  The ifIndex created
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @notes   
+*
+*       
+* @end
+*
+*********************************************************************/
+void nimIfIndexCreate(nimUSP_t usp, INTF_TYPES_t type,uint32 *ifIndex, uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  nimIfIndexTreeData_t data;
+  nimIfIndexTreeData_t *pData;
+
+  if (ifIndex ==  NULLPTR)
+  {
+    NIM_LOG_MSG("NIM: Attempted dereferencing of NULL\n");
+  }
+  else
+  {
+    switch (type)
+    {
+      case  PHYSICAL_INTF:
+      case  STACK_INTF:
+      case  CPU_INTF:
+        break;
+      case  LAG_INTF:
+      case  LOGICAL_VLAN_INTF:
+      case  LOOPBACK_INTF:
+      case  TUNNEL_INTF:
+      case  SERVICE_PORT_INTF:
+        usp.unit =  LOGICAL_UNIT;
+        break;
+      default:
+        rc =  FAILURE;
+        break;
+    }
+
+    if (rc ==  SUCCESS)
+    {
+      /* *ifIndex = (usp.unit << NIM_UNIT_SHIFT) | (usp.slot << NIM_SLOT_SHIFT) | (usp.port << NIM_PORT_SHIFT); */
+      *ifIndex = intIfNum;
+
+      data.ifIndex = *ifIndex;
+      data.intIfNum = intIfNum;
+
+      NIM_IFINDEX_CRIT_SEC_ENTER();
+
+      pData = avlInsertEntry(&nimIfIndexTreeData, &data);
+
+      NIM_IFINDEX_CRIT_SEC_EXIT();
+
+      if (pData !=  NULL)
+      {
+        NIM_LOG_MSG("NIM: ifIndex not added to the AVL tree\n");
+      }
+    }
+  }
+
+  return;
+}
+
+/*********************************************************************
+* @purpose  Delete an IfIndex
+*
+* @param    ifIndex     @b{(output)}  The ifIndex to delete
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @notes   
+*
+*       
+* @end
+*
+*********************************************************************/
+void nimIfIndexDelete(uint32 ifIndex)
+{
+  nimIfIndexTreeData_t *pData;
+  nimIfIndexTreeData_t data;
+
+  data.ifIndex = ifIndex;
+
+  NIM_IFINDEX_CRIT_SEC_ENTER();
+
+  pData = avlDeleteEntry(&nimIfIndexTreeData, &data);
+
+  NIM_IFINDEX_CRIT_SEC_EXIT();
+
+  if (pData ==  NULL)
+  {
+    NIM_LOG_MSG("NIM: ifIndex %d not found, cannot delete it\n",ifIndex);
+  }
+
+  return;
+}
+
+/*********************************************************************
+* @purpose  Allocate the memory for the ifIndex AVL tree
+*
+* @param    void
+*
+* @returns  void
+*
+* @notes    none 
+*
+* @end
+*********************************************************************/
+RC_t nimIfIndexPhaseOneInit()
+{
+  RC_t   rc =  SUCCESS;
+
+  do
+  {
+
+    if (avlAllocAndCreateAvlTree(&nimIfIndexTreeData,
+                                  NIM_COMPONENT_ID,
+                                 platIntfTotalMaxCountGet(),
+                                 sizeof(nimIfIndexTreeData_t),
+                                 0x10, avlCompareULong32,
+                                 sizeof(uint32)) !=  SUCCESS)
+    {
+      NIM_LOG_ERROR("NIM: Unable to allocate resources\n");
+      break; /* goto while */
+    }
+
+    nimIfIndexSema = osapiSemaMCreate(OSAPI_SEM_Q_PRIORITY); 
+
+    if (nimIfIndexSema ==  NULLPTR)
+    {
+      NIM_LOG_ERROR("NIM: unable to create the ifIndex Sema\n");
+    }
+
+  } while ( 0 );
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Find the next external inferface number
+*
+* @param    extIfNum      @b{(input)}  The present extIfNum
+* @param    pNextExtIfNum @b{(output)} The next extIfNum
+* @param    pIntIfNum     @b{(output)} The internal interface number
+*
+* @returns   ERROR if the extIfNum doesn't exist
+*
+* @notes    none 
+*
+* @end
+*********************************************************************/
+RC_t nimIfIndexNextGet(uint32 extIfNum, uint32 *pNextExtIfNum,uint32 *pIntIfNum)
+{
+  RC_t rc =  SUCCESS;
+  nimIfIndexTreeData_t *pData;
+
+  NIM_IFINDEX_CRIT_SEC_ENTER();
+
+  pData = avlSearch (&nimIfIndexTreeData, &extIfNum, AVL_NEXT);
+
+  NIM_IFINDEX_CRIT_SEC_EXIT();
+
+  if (pData !=  NULL)
+  {
+    *pNextExtIfNum = pData->ifIndex;
+    *pIntIfNum = pData->intIfNum;
+  }
+  else
+  {
+    rc =  ERROR;
+  }
+  return rc;
+}
+
+
+/*********************************************************************
+* @purpose  Find the first external inferface number
+*
+* @param    pExtIfNum      @b{(input)}  The present extIfNum
+* @param    pIntIfNum      @b{(output)} The internal interface number
+*
+* @returns   ERROR if the extIfNum doesn't exist
+*
+* @notes    none 
+*
+* @end
+*********************************************************************/
+RC_t nimIfIndexFirstGet(uint32 *pExtIfNum,uint32 *pIntIfNum)
+{
+  RC_t rc =  SUCCESS;
+  nimIfIndexTreeData_t *pData;
+  uint32 ifIndex = 0;
+
+  NIM_IFINDEX_CRIT_SEC_ENTER();
+
+  pData = avlSearch (&nimIfIndexTreeData, &ifIndex, AVL_NEXT);
+
+  NIM_IFINDEX_CRIT_SEC_EXIT();
+
+  if (pData !=  NULL)
+  {
+    *pExtIfNum = pData->ifIndex;
+    *pIntIfNum = pData->intIfNum;
+
+  }
+  else
+  {
+    rc =  ERROR;
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Find the intIfNum associated with the extIfNum 
+*
+* @param    extIfNum      @b{(input)}  The present extIfNum
+* @param    pNextExtIfNum  @b{(output)} The next extIfNum
+*
+* @returns   ERROR if the extIfNum doesn't exist
+*
+* @notes    none 
+*
+* @end
+*********************************************************************/
+RC_t nimIfIndexIntIfNumGet(uint32 extIfNum, uint32 *pIntIfNum)
+{
+  RC_t rc =  SUCCESS;
+  nimIfIndexTreeData_t *pData;
+
+  NIM_IFINDEX_CRIT_SEC_ENTER();
+
+  pData = avlSearch (&nimIfIndexTreeData, &extIfNum, AVL_EXACT);
+
+  NIM_IFINDEX_CRIT_SEC_EXIT();
+
+  if (pData !=  NULL)
+  {
+    *pIntIfNum= pData->intIfNum;
+  }
+  else
+  {
+    rc =  ERROR;
+  }
+  return rc;
+}
+
+
+
+
+/*********************************************************************
+* @purpose  Find the intIfNum associated with the extIfNum 
+*
+* @param    extIfNum      @b{(input)}  The present extIfNum
+* @param    pNextExtIfNum  @b{(output)} The next extIfNum
+*
+* @returns   ERROR if the extIfNum doesn't exist
+*
+* @notes    none 
+*
+* @end
+*********************************************************************/
+void nimIfIndexDataClear(void)
+{
+
+  NIM_IFINDEX_CRIT_SEC_ENTER();
+
+  avlPurgeAvlTree(&nimIfIndexTreeData, platIntfTotalMaxCountGet());
+
+  NIM_IFINDEX_CRIT_SEC_EXIT();
+}
+
+
diff --git a/src/sonic-pac/fpinfra/nim/nim_intf_api.c b/src/sonic-pac/fpinfra/nim/nim_intf_api.c
new file mode 100644
index 00000000000..4c58f7140c8
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_intf_api.c
@@ -0,0 +1,918 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "datatypes.h"
+#include "commdefs.h"
+#include "cnfgr_api.h"
+#include "system_exports.h"
+#include "nim_data.h"
+#include "nim_util.h"
+#include "log.h"
+
+/*
+ * Local macro for checking if a given parameter can be set.
+ * Must be used where the intInfNum ("i") has been validated.
+ * Used by externalized version nimIntfParmCanSet().
+ */
+#define NIM_PARM_CANSET(i, p) \
+        ((nimCtlBlk_g->nimPorts[(i)].operInfo.settableParms & (p)) == (p))
+
+/*********************************************************************
+* @purpose  Sets the administrative state of the specified interface.
+*
+* @param    intIfNum Internal Interface Number
+*
+* @param    adminState admin state,
+*                       (@b{   ENABLE or
+*                              DISABLE})
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimSetIntfAdminState(uint32 intIfNum, uint32 adminState)
+{
+  RC_t  rc =  FAILURE;
+  uint32 tmpAdminState = adminState;
+  uint32 ldIntfNum = intIfNum;
+   uchar8 ifName[ NIM_IFNAME_SIZE + 1];
+  uint32 state;
+  NIM_EVENT_SPECIFIC_DATA_t eventData;
+
+  memset (&eventData, 0, sizeof(NIM_EVENT_SPECIFIC_DATA_t));
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for setting admin state - intIfNum %d",
+        nimConfigPhaseGet(), intIfNum);
+  }
+  else
+  {
+    /*
+    if ( TRUE == dot3adIsLagMember(intIfNum))
+    {
+      if ( SUCCESS != dot3adWhoisOwnerLag(intIfNum, &ldIntfNum))
+      {
+        return  FAILURE;
+      }
+    }
+    */
+
+    NIM_CRIT_SEC_WRITE_ENTER();
+
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    if (rc ==  SUCCESS)
+    {
+      do
+      {
+        if ((adminState ==  ENABLE) || (adminState ==  DISABLE) || (adminState ==  DIAG_DISABLE))
+        {
+          if (adminState !=  DIAG_DISABLE)
+          {
+            if (nimCtlBlk_g->nimPorts[intIfNum].diagDisabled ==  TRUE)
+            {
+              nimCtlBlk_g->nimPorts[intIfNum].diagDisabled =  FALSE;
+              //nimCtlBlk_g->nimPorts[intIfNum].diagDisabledReason = NIM_DDISABLE_REASON_NONE;
+            }
+            if (nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.adminState != adminState)
+            {
+              nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.adminState = adminState;
+            }
+          }
+          else
+          {
+            nimCtlBlk_g->nimPorts[intIfNum].diagDisabled =  TRUE;
+          }
+
+          NIM_CRIT_SEC_WRITE_EXIT();
+        }
+        else
+        {
+          NIM_CRIT_SEC_WRITE_EXIT();
+
+           LOGF( LOG_SEVERITY_DEBUG,
+            "Received invalid admin state %u for interface %s. Set request ignored.",
+              adminState, ifName);
+          rc =  FAILURE;
+          break; /* goto end of while */
+        }
+
+
+        if (rc ==  SUCCESS)
+        {
+          if (adminState ==  ENABLE)
+          {
+            rc = (nimNotifyIntfChange(intIfNum,  PORT_ENABLE, eventData));
+          }
+          else
+          {
+            /* As far as rest of the apps are concerned there is no difference between
+             * a disabled port and a diag disabled port
+             */
+            rc = nimNotifyIntfChange(intIfNum,  PORT_DISABLE, eventData);
+          }
+        }
+
+      } while (0);
+    }
+    else
+    {
+      NIM_CRIT_SEC_WRITE_EXIT();
+    }
+  }
+
+  return rc;
+}
+/*********************************************************************
+* @purpose  Returns the internal interface type
+*           associated with the internal interface number
+*
+* @param    intIfNum    internal interface number
+* @param    sysIntfType pointer to internal interface type,
+*                       (@b{Returns: Internal Interface Type}).
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimGetIntfType(uint32 intIfNum,  INTF_TYPES_t *sysIntfType)
+{
+  RC_t rc =  SUCCESS;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for get interface type - ifIndex %d",
+        nimConfigPhaseGet(), intIfNum);
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+
+    IS_INTIFNUM_PRESENT(intIfNum, rc);
+
+    if (rc ==  SUCCESS)
+    {
+      *sysIntfType = nimCtlBlk_g->nimPorts[intIfNum].sysIntfType;
+    }
+
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Get phy capability of the specified interface
+*
+* @param    intIfNum    Internal Interface Number
+* @param    macAddr     pointer to phyCapability,
+*                       (@b{Returns:  uint64})
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimGetIntfPhyCapability(uint32 intIfNum,  uint64 *phyCapability)
+{
+  RC_t rc =  SUCCESS;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for getting capabilities - intIfNum %d",
+        nimConfigPhaseGet(), intIfNum);
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    if (rc ==  SUCCESS)
+    {
+      if (nimCtlBlk_g->nimPorts[intIfNum].dynamicCap)
+      {
+        *phyCapability = nimCtlBlk_g->nimPorts[intIfNum].capabilityCfg.dynCapabilities;
+        NIM_CRIT_SEC_READ_EXIT();
+        return  SUCCESS;
+      }
+      *phyCapability = nimCtlBlk_g->nimPorts[intIfNum].operInfo.phyCapability;
+      if ( PHY_CAP_DUAL_MODE_SUPPORT_CHECK(*phyCapability))
+      {
+        NIM_CRIT_SEC_READ_EXIT();
+
+        rc = nimUpdateIntfPhyCapability(intIfNum);
+        NIM_CRIT_SEC_READ_ENTER();
+        *phyCapability = nimCtlBlk_g->nimPorts[intIfNum].operInfo.phyCapability;
+      }
+    }
+
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Update phy capability of the specified interface from PHY
+*
+* @param    intIfNum    Internal Interface Number
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimUpdateIntfPhyCapability(uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  uint32  state;
+   uint64 phyCapability;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+            "Incorrect phase %d for updating PHY capabilities - intIfNum %d",
+            nimConfigPhaseGet(), intIfNum);
+  }
+  else
+  {
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    if (rc ==  SUCCESS)
+    {
+      /* We examine the state here to avoid DTL or NIM config issuing errors
+         when configuring interfaces that are pre-configured but are not
+         physically present in the system. Returning  SUCCESS gives
+         a silent failure mode. When the physical interface is attached,
+         this code will be called again. */
+      state = nimUtilIntfStateGet(intIfNum);
+      if ((state !=  INTF_ATTACHED)
+          && (state !=  INTF_ATTACHING)
+          && (state !=  INTF_DETACHING))
+      {
+        return  SUCCESS;
+      }
+
+      /* TO DO */
+    }
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Gets the link state of the specified interface.
+*
+* @param    intIfNum    Internal Interface Number
+* @param    linkState   pointer to Link State,
+*                       (@b{Returns:  UP
+*                                    or  DOWN})
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    A physical port has link up when the PHY has link up.
+* @notes    A LAG has link up when at least one of the member ports has link up.
+* @notes    A VLAN interface has link up when at least one of the member ports of the VLAN has link up.
+* @notes    A CPU interface is always link up.
+*
+* @end
+*********************************************************************/
+RC_t nimGetIntfLinkState(uint32 intIfNum, uint32 *linkState)
+{
+  uint32 result;
+  RC_t rc =  FAILURE;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for getting interface link state - intIfNum %d",
+        nimConfigPhaseGet(), intIfNum);
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    if (rc ==  SUCCESS)
+    {
+      switch (nimCtlBlk_g->nimPorts[intIfNum].sysIntfType)
+      {
+        case  PHYSICAL_INTF:
+        case  LAG_INTF:
+        case  LOGICAL_VLAN_INTF:
+        case  LOOPBACK_INTF:
+        case  TUNNEL_INTF:
+        case  SERVICE_PORT_INTF:
+          result = NIM_INTF_ISMASKBITSET(nimCtlBlk_g->linkStateMask, intIfNum);
+          if (result !=  NIM_UNUSED_PARAMETER)
+          {
+            *linkState =  UP;
+          }
+          else
+          {
+            *linkState =  DOWN;
+          }
+          rc =  SUCCESS;
+          break;
+
+        case  CPU_INTF:
+          *linkState =  UP;
+          break;
+
+        default:
+          break;
+      }
+    } /* interface present */
+
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Gets the admin state of the specified interface.
+*
+* @param    intIfNum    Internal Interface Number
+* @param    adminState  pointer to Admin State,
+*                       (@b{Returns:  DISABLE,
+*                                     ENABLE
+*                                    or  DIAG_DISABLE})
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimGetIntfAdminState(uint32 intIfNum, uint32 *adminState)
+{
+  RC_t rc =  SUCCESS;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for getting admin state - intIfNum %d",
+        nimConfigPhaseGet(), intIfNum);
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    if (rc ==  SUCCESS)
+    {
+      if(nimCtlBlk_g->nimPorts[intIfNum].diagDisabled ==  TRUE)
+      {
+        *adminState =  DIAG_DISABLE;
+      }
+      else
+      {
+      *adminState = nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.adminState;
+    }
+    }
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Gets the active of the specified interface.
+*
+* @param    intIfNum    @b{(input)}  Internal Interface Number
+*
+* @returns  NIM interface state
+*
+* @notes    This is an API for internal function nimUtilIntfStateGet
+*
+* @end
+*********************************************************************/
+ INTF_STATES_t nimGetIntfState(uint32 intIfNum)
+{
+  return nimUtilIntfStateGet(intIfNum);
+}
+
+/*********************************************************************
+*
+* @purpose  Gets either the system name or alias name
+*           of the specified interface, as requested
+*
+* @param    intIfNum    Internal Interface Number
+* @param    nameType    name type requested ( SYSNAME,  ALIASNAME or  NULL)
+*                        NULL will return currently configured ifName
+* @param    ifName      pointer to Interface Name,
+*                       (@b{Returns: NIM_MAX_INTF_NAME byte interface name})
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimGetIntfName(uint32 intIfNum, uint32 nameType,  uchar8 *ifName)
+{
+  RC_t rc =  SUCCESS;
+
+  if (ifName ==  NULL)
+  {
+    return  FAILURE;
+  }
+
+  /*
+    Note that if nameType ==  NULL, then the string passed in must be
+    at least  NIM_IF_ALIAS_SIZE + 1 in length, as that could be the
+    longest string copied to the passed-in string, and can be longer
+    than  NIM_IFNAME_SIZE
+  */
+
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    /* Don't log bad phase. Failure return should be enough for caller to
+     * discover the problem. May actually be done intentionally, for example
+     * by app in WMU processing checkpoint data. */
+
+    osapiSnprintf(ifName,  NIM_IFNAME_SIZE, "[ifName not yet populated(%d)]", intIfNum);
+    rc =  FAILURE;
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    if (rc ==  SUCCESS)
+    {
+      if (nameType ==  0)
+      {
+        if (nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.nameType ==  SYSNAME)
+        {
+          memcpy(ifName, nimCtlBlk_g->nimPorts[intIfNum].operInfo.ifName,  NIM_IFNAME_SIZE);
+        }
+        else if (nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.nameType ==  SYSNAME_LONG)
+        {
+          memcpy(ifName, nimCtlBlk_g->nimPorts[intIfNum].operInfo.ifLongName,  NIM_IFNAME_SIZE);
+        }
+        else
+        {
+          memcpy(ifName, nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.ifAlias,  NIM_IF_ALIAS_SIZE+1);
+        }
+      }
+      else if (nameType ==  SYSNAME)
+      {
+        memcpy(ifName, nimCtlBlk_g->nimPorts[intIfNum].operInfo.ifName,  NIM_IFNAME_SIZE);
+      }
+      else if (nameType ==  SYSNAME_LONG)
+      {
+        memcpy(ifName, nimCtlBlk_g->nimPorts[intIfNum].operInfo.ifLongName,  NIM_IFNAME_SIZE);
+      }
+      else
+      {
+        memcpy(ifName, nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.ifAlias,  NIM_IF_ALIAS_SIZE+1);
+      }
+    }
+    else
+    {
+      osapiSnprintf(ifName,  NIM_IFNAME_SIZE, "[ifName not found(%d)]", intIfNum);
+    }
+
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Gets the OPERATIONAL portmode value of the specified interface.
+*
+* @param    intIfNum       Internal Interface Number
+* @param    intfPortMode   pointer to Port Mode,
+*                          (@b{Returns:  Interface Port Mode})
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    The value returned may be different from configured value.
+*
+* @end
+*********************************************************************/
+RC_t nimIntfPortModeGet(uint32 intIfNum,  portmode_t *ifMode)
+{
+   RC_t rc =  SUCCESS;
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for get interface portMode - ifIndex %d",
+        nimConfigPhaseGet(),intIfNum);
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+    IS_INTIFNUM_PRESENT(intIfNum,rc);    
+    if (rc ==  SUCCESS)
+    {
+      if ( TRUE == nimCtlBlk_g->nimPorts[intIfNum].operInfo.ifImmediateExpand)
+      {
+        *ifMode = NIM_EXP_PORT_MODE_GET(nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.portModeFlags);      
+      }
+      else
+      {
+        *ifMode = NIM_EXP_PORT_MODE_GET(nimCtlBlk_g->nimPorts[intIfNum].defaultCfg.portModeFlags);   
+      }
+    }
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Gets the portmode enable status value of the specified interface.
+*
+* @param    intIfNum       Internal Interface Number
+* @param    ifStatus       portModeStatus value of Interface
+*                          (@b{Returns:   0 or 1
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes This can be obtained for any interface as opposed to portMode
+*        which is only valid for 40G ports.
+*
+* @end
+*********************************************************************/
+RC_t nimIntfPortModeEnableStatusGet(uint32 intIfNum, uint32 *ifStatus)
+{
+   RC_t rc =  SUCCESS;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for get interface portMode Status - ifIndex %d",
+        nimConfigPhaseGet(),intIfNum);
+  }
+  else
+  {    
+    NIM_CRIT_SEC_READ_ENTER();
+    if ( PHYSICAL_INTF != nimCtlBlk_g->nimPorts[intIfNum].sysIntfType) 
+    {
+      NIM_CRIT_SEC_READ_EXIT();
+      *ifStatus = 1;
+      return  SUCCESS;
+    }
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+    if (rc ==  SUCCESS)
+    {   
+      if ( TRUE == nimCtlBlk_g->nimPorts[intIfNum].operInfo.ifImmediateExpand)
+      {
+        *ifStatus = NIM_EXP_PORT_MODE_STATUS_GET(nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.portModeFlags);
+      } 
+      else
+      {
+        /* If not immediateActive, get the default */
+        *ifStatus = NIM_EXP_PORT_MODE_STATUS_GET(nimCtlBlk_g->nimPorts[intIfNum].defaultCfg.portModeFlags);
+      }
+    }
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Sets the Network Interface Type of the interface
+*
+* @param    intIfNum    @b{(input)} Internal Interface Number
+* @param    nwIntfType  @b{(input)}Network Interface Type
+*                       (@b{ networkIntfType_t })
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes none
+*
+* @end
+*********************************************************************/
+RC_t nimNetworkIntfTypeSet(uint32 intIfNum, uint32 nwIntfType)
+{
+  RC_t rc =  SUCCESS;
+   uchar8 ifName[ NIM_IFNAME_SIZE + 1];
+  uint32 event = FD_NIM_DEFAULT_NETWORK_INTERFACE_TYPE;
+  NIM_EVENT_SPECIFIC_DATA_t eventData;
+
+  memset (&eventData, 0, sizeof(NIM_EVENT_SPECIFIC_DATA_t));
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for setting network interface type - ifIndex %d",
+        nimConfigPhaseGet(), intIfNum);
+  }
+  else
+  {
+    NIM_CRIT_SEC_WRITE_ENTER();
+
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    if (rc ==  SUCCESS && !NIM_PARM_CANSET(intIfNum,  INTF_PARM_NW_INTF_TYPE))
+    {
+      rc =  FAILURE;
+    }
+
+    NIM_CRIT_SEC_WRITE_EXIT();
+
+    if (rc ==  SUCCESS)
+    {
+      switch (nwIntfType)
+      {
+        case  NW_INTF_TYPE_SWITCHPORT:
+          event =  ETHERNET_SWITCHPORT;
+          break;
+        case  NW_INTF_TYPE_NNI:
+          event =  NETWORK_INTF_TYPE_NNI;
+          break;
+        case  NW_INTF_TYPE_UNI_C:
+          event =  NETWORK_INTF_TYPE_UNI_C;
+          break;
+        case  NW_INTF_TYPE_UNI_S:
+          event =  NETWORK_INTF_TYPE_UNI_S;
+          break;
+        default:
+          {
+            nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+             LOGF( LOG_SEVERITY_DEBUG,
+                    "Received invalid network interface type %u for interface %s. Set request ignored.",
+                    nwIntfType, ifName);
+            rc =  FAILURE;
+          }
+      }
+      if (rc ==  SUCCESS)
+      {
+        NIM_CRIT_SEC_WRITE_ENTER();
+
+        nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.nwIntfType = nwIntfType;
+        //nimCtlBlk_g->nimConfigData->cfgHdr.dataChanged =  TRUE;
+        NIM_CRIT_SEC_WRITE_EXIT();
+      }
+    } 
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Gets the network interface type for a given interface
+*
+* @param    intIfNum    @b{(input)} Internal Interface Number
+* @param    nwIntfType  @b{(output)} pointer to mtu Size,
+*                       (@b{Returns: network interface type})
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimNetworkIntfTypeGet(uint32 intIfNum, uint32 *nwIntfType)
+{
+  RC_t rc =  SUCCESS;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for getting interface type - intIfNum %d",
+        nimConfigPhaseGet(), intIfNum);
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    if (rc ==  SUCCESS)
+    {
+      *nwIntfType = nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.nwIntfType;
+    }
+
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Sets the ifAlias name of the specified interface.
+*
+* @param    intIfNum         Internal Interface Number
+* @param    ifAlias          pointer to string containing alias name
+*
+* @returns   SUCCESS       if success
+* @returns   ERROR         if interface does not exist
+* @returns   FAILURE       if other failure
+* @returns   NOT_SUPPORTED if port-channel is auto-LAG based
+*                            port-channel
+*
+* @notes none
+*
+* @end
+*********************************************************************/
+RC_t nimSetIntfifAlias(uint32 intIfNum,  uchar8 *ifAlias)
+{
+  RC_t rc =  SUCCESS;
+   BOOL         isAutoLag =  FALSE;
+   INTF_TYPES_t intfType =  INTF_TYPES_INVALID;
+   uchar8       ifName[ NIM_IFNAME_SIZE + 1];
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for setting alias - ifIndex %d",
+        nimConfigPhaseGet(), intIfNum);
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    NIM_CRIT_SEC_READ_EXIT();
+
+    if (rc ==  SUCCESS)
+    {
+        NIM_CRIT_SEC_WRITE_ENTER();
+
+        memset(( void * )nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.ifAlias, 0,  NIM_IF_ALIAS_SIZE+1);
+
+        if (strlen(( uchar8*)ifAlias) <=  NIM_IF_ALIAS_SIZE)
+          osapiStrncpySafe( nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.ifAlias, ( uchar8*)ifAlias , strlen(( uchar8*)ifAlias));
+        else
+          osapiStrncpySafe( nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.ifAlias, ( uchar8*)ifAlias, ( NIM_IF_ALIAS_SIZE) );
+
+        nimCtlBlk_g->nimConfigData->cfgHdr.dataChanged =  TRUE;
+
+        NIM_CRIT_SEC_WRITE_EXIT();
+    }
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Gets either the burned-in or locally administered address
+*           of the specified interface, as requested
+*
+* @param    intIfNum    Internal Interface Number
+* @param    addrType    address type requested ( SYSMAC_BIA,  SYSMAC_LAA,
+*                       or  NULL)  NULL will return currently configured
+*                       MAC Address
+* @param    macAddr     pointer to MAC Address,
+*                       (@b{Returns: 6 byte mac address})
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimGetIntfAddress(uint32 intIfNum, uint32 addrType,  uchar8 *macAddr)
+{
+  RC_t rc =  SUCCESS;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for getting interface address - intIfNum %d",
+        nimConfigPhaseGet(), intIfNum);
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    if (rc ==  SUCCESS)
+    {
+      if (addrType ==  0)
+      {
+        if (nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.addrType ==  SYSMAC_BIA)
+        {
+          memcpy(macAddr, nimCtlBlk_g->nimPorts[intIfNum].operInfo.macAddr.addr,  MAC_ADDR_LEN);
+        }
+        else
+        {
+          memcpy(macAddr, nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.LAAMacAddr.addr,  MAC_ADDR_LEN);
+        }
+      }
+      else if (addrType ==  SYSMAC_BIA)
+      {
+        memcpy(macAddr, nimCtlBlk_g->nimPorts[intIfNum].operInfo.macAddr.addr,  MAC_ADDR_LEN);
+      }
+      else
+      {
+        memcpy(macAddr, nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.LAAMacAddr.addr,  MAC_ADDR_LEN);
+      }
+    }
+
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Gets the address type being used, either the burned-in or
+*           locally administered address of the specified interface.
+*
+* @param    intIfNum    Internal Interface Number
+* @param    addrType    address type,
+*                       (@b{  Returns:  BIA or
+*                              LAA})
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes none
+*
+* @end
+*********************************************************************/
+RC_t nimGetIntfAddrType(uint32 intIfNum, uint32 *addrType)
+{
+  RC_t rc =  SUCCESS;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+      "Incorrect phase %d for getting interface address type - intIfNum %d",
+        nimConfigPhaseGet(), intIfNum);
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    if (rc ==  SUCCESS)
+    {
+      *addrType = nimCtlBlk_g->nimPorts[intIfNum].configPort.cfgInfo.addrType;
+    }
+
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return rc;
+}
+
diff --git a/src/sonic-pac/fpinfra/nim/nim_intf_map_api.c b/src/sonic-pac/fpinfra/nim/nim_intf_map_api.c
new file mode 100644
index 00000000000..21df34d5a5b
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_intf_map_api.c
@@ -0,0 +1,726 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "datatypes.h"
+#include "commdefs.h"
+#include "cnfgr_api.h"
+#include "nim_data.h"
+#include "nim_util.h"
+#include "log.h"
+
+/*********************************************************************
+* @purpose  Returns the descripion for port event
+*
+* @param    event     interface event
+*
+* @returns  description for the event
+
+* @notes    none
+*
+* @end
+*********************************************************************/
+ char8 *nimGetIntfEvent( PORT_EVENTS_t event)
+  {
+    switch (event)
+    {
+      case  PORT_DISABLE:    return " PORT_DISABLE";
+      case  PORT_ENABLE:    return " PORT_ENABLE";
+      case  PORT_INSERT:    return " PORT_INSERT";
+      case  DOWN:    return " DOWN";
+      case  UP:    return " UP";
+      case  INACTIVE:    return " INACTIVE";
+      case  ACTIVE:    return " ACTIVE";    break;
+      case  FORWARDING:    return " FORWARDING";
+      case  NOT_FORWARDING:    return " NOT_FORWARDING";
+      case  CREATE:    return " CREATE";
+      case  CREATE_COMPLETE:    return " CREATE_COMPLETE";
+      case  DELETE_PENDING:    return " DELETE_PENDING";
+      case  DELETE:    return " DELETE";
+      case  DELETE_COMPLETE:    return " DELETE_COMPLETE";
+      case  LAG_ACQUIRE:    return " LAG_ACQUIRE";
+      case  LAG_RELEASE:    return " LAG_RELEASE";
+      case  SPEED_CHANGE:    return " SPEED_CHANGE";
+      case  LAG_CFG_CREATE:    return " LAG_CFG_CREATE";
+      case  LAG_CFG_MEMBER_CHANGE:    return " LAG_CFG_MEMBER_CHANGE";
+      case  LAG_CFG_REMOVE:    return " LAG_CFG_REMOVE";
+      case  LAG_CFG_END:    return " LAG_CFG_END";
+      case  PROBE_SETUP:    return " PROBE_SETUP";
+      case  PROBE_TEARDOWN:    return " PROBE_TEARDOWN";
+      case  SET_INTF_SPEED:    return " SET_INTF_SPEED";
+      case  SET_MTU_SIZE:    return " SET_MTU_SIZE";
+      case  PORT_ROUTING_ENABLED:    return " PORT_ROUTING_ENABLED";
+      case  PORT_ROUTING_DISABLED:    return " PORT_ROUTING_DISABLED";
+      case  TRILL_TRUNK_ENABLED:    return " TRILL_TURNK_ENABLED";
+      case  TRILL_TRUNK_DISABLED:    return " TRILL_TURNK_DISABLED";
+      case  PORT_BRIDGING_ENABLED:    return " PORT_BRIDGING_ENABLED";
+      case  PORT_BRIDGING_DISABLED:    return " PORT_BRIDGING_DISABLED";
+      case  VRRP_TO_MASTER:    return " VRRP_TO_MASTER";
+      case  VRRP_FROM_MASTER:    return " VRRP_FROM_MASTER";
+      case  AUTHMGR_PORT_AUTHORIZED:    return " AUTHMGR_PORT_AUTHORIZED";
+      case  AUTHMGR_PORT_UNAUTHORIZED:    return " AUTHMGR_PORT_UNAUTHORIZED";
+      case  ATTACH:    return " ATTACH";
+      case  ATTACH_COMPLETE:    return " ATTACH_COMPLETE";
+      case  DETACH:    return " DETACH";
+      case  DETACH_COMPLETE:    return " DETACH_COMPLETE";
+      case  AUTHMGR_ACQUIRE: return " AUTHMGR_ACQUIRE";
+      case  AUTHMGR_RELEASE: return " AUTHMGR_RELEASE";
+      case  PORT_STATS_RESET: return " PORT_STATS_RESET";
+#ifdef  PORT_AGGREGATOR_PACKAGE
+      case  PORT_AGG_UP: return " PORT_AGG_UP";
+      case  PORT_AGG_DOWN: return " PORT_AGG_DOWN";
+#endif
+      case  PORT_PFC_ACTIVE:   return " PORT_PFC_ACTIVE";
+      case  PORT_PFC_INACTIVE: return " PORT_PFC_INACTIVE";
+      case  ETHERNET_SWITCHPORT: return " ETHERNET_SWITCHPORT";
+      case  NETWORK_INTF_TYPE_NNI: return " NETWORK_INTF_TYPE_NNI";
+      case  NETWORK_INTF_TYPE_UNI_C: return " NETWORK_INTF_TYPE_UNI_C";
+      case  NETWORK_INTF_TYPE_UNI_S: return " NETWORK_INTF_TYPE_UNI_S";
+      case  LAG_RELEASE_PENDING: return " LAG_RELEASE_PENDING";
+      case  LAG_DOWN_PENDING: return " LAG_DOWN_PENDING";
+      case  LAG_ACQUIRE_PENDING: return " LAG_ACQUIRE_PENDING";
+   default:
+      return "Unknown Port Event";
+    }
+  }
+
+/*********************************************************************
+* @purpose  Returns the Unit-Slot-Port
+*           associated with the internal interface number
+*
+* @param    intIfNum    @b{(input)}  internal interface number
+* @param    usp         @b{(output)} pointer to nimUSP_t structure,
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimGetUnitSlotPort(uint32 intIfNum, nimUSP_t *usp)
+{
+  RC_t   rc =  SUCCESS;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  NOT_EXIST;
+     LOGF( LOG_SEVERITY_DEBUG,
+            "NIM: incorrect phase for operation.");
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+    if ((intIfNum < 1) || (intIfNum > platIntfTotalMaxCountGet()))
+    {
+        rc =  FAILURE;
+    }
+    else if (nimCtlBlk_g->nimPorts[intIfNum].present !=  TRUE)
+    {
+        rc =  ERROR;
+    }
+    else
+    {
+        rc =  SUCCESS;
+    }
+
+    if (rc ==  SUCCESS)
+    {
+      memcpy (usp, &nimCtlBlk_g->nimPorts[intIfNum].usp, sizeof(nimUSP_t));
+    }
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Returns the internal interface number
+*           associated with the Unit-Slot-Port
+*
+* @param    usp         @b{(input)}  pointer to nimUSP_t structure
+* @param    intIfNum    @b{(output)} pointer to internal interface number,
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimGetIntIfNumFromUSP(nimUSP_t* usp, uint32 *intIfNum)
+{
+
+  RC_t     rc =  SUCCESS;
+  uint32   unit = 0, slot = 0, port = 0;
+   INTF_TYPES_t sysIntfType;
+  nimUspIntIfNumTreeData_t *pData;
+
+  /* check the usp */
+  if (usp !=  NULL)
+  {
+    unit = usp->unit;
+    slot = usp->slot;
+    port = usp->port;
+  }
+  else
+  {
+    NIM_LOG_MSG("NIM: usp is NULL\n");
+    rc =  FAILURE;
+  }
+
+  if ((rc !=  SUCCESS) || (nimPhaseStatusCheck() !=  TRUE))
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+            "NIM: incorrect phase for operation.");
+  }
+  else if ((unit > nimCtlBlk_g->maxNumOfUnits) ||
+           (slot > nimCtlBlk_g->maxNumOfSlotsPerUnit) ||
+           (port == 0))
+  {
+     LOGF( LOG_SEVERITY_DEBUG,
+            "NIM: out of bounds usp used U=%d, S=%d P=%d\n",unit,slot,port);
+    rc =  FAILURE;
+  }
+  else if ( (nimGetIntfTypeFromUSP(usp, &sysIntfType) !=  SUCCESS) ||
+            ( port > nimMaxIntfForIntfTypeGet(sysIntfType) ))
+  {
+    /* The port number should not exceed the maximum number of interfaces for the type */
+     LOGF( LOG_SEVERITY_DEBUG,
+            "NIM: out of bounds usp used U=%d, S=%d P=%d - port too large\n",unit,slot,port);
+    rc =  FAILURE;
+  }
+
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+
+    pData = avlSearch (&nimCtlBlk_g->nimUspTreeData, usp, AVL_EXACT);
+
+    if (pData !=  NULLPTR)
+    {
+      *intIfNum = pData->intIfNum;
+      rc =  SUCCESS;
+    }
+    else
+    {
+      rc =  ERROR;
+    }
+
+    NIM_CRIT_SEC_READ_EXIT();
+
+  }
+
+  return(rc);
+}
+
+
+/*********************************************************************
+* @purpose  Given a usp, get the interface type associated with the slot
+*
+* @param    usp         @b{(input)}  pointer to nimUSP_t structure
+* @param    sysIntfType @b{(output)} pointer to a parm of  INTF_TYPES_t
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimGetIntfTypeFromUSP(nimUSP_t* usp,  INTF_TYPES_t *sysIntfType)
+{
+/* WPJ_TBD:  Make this more extensible */
+
+  RC_t     rc =  SUCCESS;
+  uint32   unit = 0, slot = 0, port = 0;
+
+  /* check the usp */
+  if (usp !=  NULL)
+  {
+    unit = usp->unit;
+    slot = usp->slot;
+    port = usp->port;
+  }
+  else
+  {
+    NIM_LOG_MSG("NIM: usp is NULL\n");
+    rc =  FAILURE;
+  }
+
+  if ((rc !=  SUCCESS) || (nimPhaseStatusCheck() !=  TRUE))
+  {
+    rc =  FAILURE;
+    NIM_LOG_MSG("NIM: incorrect phase for operation\n");
+  }
+  else if ((unit > nimCtlBlk_g->maxNumOfUnits) ||
+           (slot > nimCtlBlk_g->maxNumOfSlotsPerUnit) ||
+           (port == 0))
+  {
+     LOGF( LOG_SEVERITY_INFO,
+            "NIM: out of bounds usp used U=%d, S=%d P=%d\n",unit,slot,port);
+    rc =  FAILURE;
+  }
+
+  if (slot == platSlotVlanSlotNumGet() )
+    *sysIntfType =  LOGICAL_VLAN_INTF;
+  else if (slot == platSlotCpuSlotNumGet() )
+    *sysIntfType =  CPU_INTF;
+  else if (slot == platSlotLagSlotNumGet() )
+    *sysIntfType =  LAG_INTF;
+  else if (slot == platSlotLoopbackSlotNumGet() )
+    *sysIntfType =  LOOPBACK_INTF;
+  else if (slot == platSlotTunnelSlotNumGet() )
+    *sysIntfType =  TUNNEL_INTF;
+  else if (slot == platSlotServicePortSlotNumGet() )
+    *sysIntfType =  SERVICE_PORT_INTF;
+  else
+    *sysIntfType =  PHYSICAL_INTF;  /* WPJ_TBD:  Assume physical until more automatic mapping is done */
+  return rc;
+}
+
+
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of next valid interface for
+*           the specified system interface type.
+*
+* @param    sysIntfType  @b{(input)}  The type of interface requested
+* @param    intIfNum     @b{(input)}  The present Internal Interface Number
+* @param    nextintIfNum @b{(output)} The Next Internal Interface Number,
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes none
+*
+* @end
+*********************************************************************/
+RC_t nimNextValidIntfNumberByType( INTF_TYPES_t sysIntfType, uint32 intIfNum, uint32 *nextIntIfNum)
+{
+  uint32 maxIntf;
+  RC_t rc =  SUCCESS;
+
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+            "NIM: incorrect phase for operation.");
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+    /* do not get the same intf number */
+    /* look to the next one first */
+    intIfNum++;
+
+    maxIntf = platIntfTotalMaxCountGet();
+
+    for (; intIfNum <= maxIntf; intIfNum++)
+    {
+      if ((nimCtlBlk_g->nimPorts[intIfNum].present ==  TRUE) &&
+          (nimCtlBlk_g->nimPorts[intIfNum].sysIntfType == sysIntfType))
+      {
+        break;
+      }
+    }
+
+    if (intIfNum <= maxIntf)
+    {
+      *nextIntIfNum = intIfNum;
+    }
+    else
+    {
+      rc =  FAILURE;
+    }
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of the first valid interface for
+*           the specified interface type.
+*
+* @param    sysIntfType  @b{(input)}  The type of interface requested
+* @param    intIfNum     @b{(output)} Internal Interface Number
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes none
+*
+* @end
+*********************************************************************/
+RC_t nimFirstValidIntfNumberByType( INTF_TYPES_t sysIntfType, uint32 *firstIntIfNum)
+{
+  uint32 maxIntf;
+  uint32 intIfNum;
+  RC_t   rc =  SUCCESS;
+
+
+  maxIntf = platIntfTotalMaxCountGet();
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =   ERROR;
+     LOGF( LOG_SEVERITY_DEBUG,
+            "NIM: incorrect phase for operation.");
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+    /* first avaliable internal interface number for the specified type */
+    for (intIfNum = 1; intIfNum <= maxIntf; intIfNum++)
+    {
+      if ((nimCtlBlk_g->nimPorts[intIfNum].present ==  TRUE) &&
+          (nimCtlBlk_g->nimPorts[intIfNum].sysIntfType == sysIntfType))
+      {
+        break;
+      }
+    } /* end for */
+
+    if (intIfNum <= maxIntf)
+    {
+      *firstIntIfNum = intIfNum;
+    }
+    else
+    {
+      rc =   ERROR;
+    }
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Returns the ifIndex associated with the
+*           internal interface number
+*
+* @param    intIfNum    @b{(input)}   internal interface number
+* @param    ifIndex     @b{(output)}  pointer to ifIndex,
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimGetIntfIfIndex(uint32 intIfNum, uint32 *ifIndex)
+{
+  RC_t   rc =  SUCCESS;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+            "NIM: incorrect phase for operation.");
+  }
+  else
+  {
+
+    NIM_CRIT_SEC_READ_ENTER();
+
+    IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+    if (rc ==  SUCCESS)
+    {
+      *ifIndex = nimCtlBlk_g->nimPorts[intIfNum].ifIndex;
+    }
+
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Determine if this internal interface number is valid
+*
+* @param    intIfNum      @b{(input)} internal interface number
+*
+* @returns   SUCCESS     if interface exists
+* @returns   ERROR       if interface does not exist
+* @returns   FAILURE     if other failure
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimCheckIfNumber(uint32 intIfNum)
+{
+  RC_t     rc =  ERROR;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  NOT_EXIST;
+     LOGF( LOG_SEVERITY_DEBUG,
+            "NIM: incorrect phase for operation.");
+  }
+  else if (intIfNum <= platIntfTotalMaxCountGet())
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+
+    if (intIfNum < 1)
+    {
+        rc =  FAILURE;
+    }
+    else if (nimCtlBlk_g->nimPorts[intIfNum].present !=  TRUE)
+    {
+        rc =  ERROR;
+    }
+    else
+    {
+        rc =  SUCCESS;
+    }
+
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+  else
+  {
+    NIM_LOG_MSG("nimCheckIfNumber: internal interface number %d out of range\n", (int)intIfNum);
+    rc =  FAILURE;
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+*
+* @purpose  Get the configuration ID for the given Internal Interface ID
+*
+* @param    internalIntfId  @b{(input)}  Internal Interface ID
+* @param    configId        @b{(output)} Pointer to the new config ID
+*
+* @returns   SUCCESS     if interface exists
+* @returns   ERROR       if interface does not exist
+* @returns   FAILURE     if other failure
+*
+* @notes    none
+*
+*
+* @end
+*********************************************************************/
+RC_t nimConfigIdGet(uint32 internalIntfId,nimConfigID_t *configId)
+{
+  RC_t rc =  FAILURE;
+
+  NIM_CRIT_SEC_READ_ENTER();
+
+  do
+  {
+
+    if ((nimCtlBlk_g ==  NULLPTR) || (nimCtlBlk_g->nimPorts ==  NULLPTR))
+    {
+      rc =  FAILURE;
+      break;
+    }
+    else if ((internalIntfId < 1) || (internalIntfId > platIntfTotalMaxCountGet()))
+    {
+      rc =  FAILURE;
+      break;
+    }
+    else
+    {
+      IS_INTIFNUM_PRESENT(internalIntfId,rc);
+
+      if (rc ==  SUCCESS)
+      {
+        NIM_CONFIG_ID_COPY(configId ,&nimCtlBlk_g->nimPorts[internalIntfId].configInterfaceId);
+        rc =  SUCCESS;
+      }
+    }
+
+  } while ( 0 );
+  NIM_CRIT_SEC_READ_EXIT();
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of the first valid port
+*
+* @param    firstIntIfNum    @b{(output)} first valid internal interface number
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes none
+*
+* @end
+*********************************************************************/
+RC_t nimFirstValidIntfNumber(uint32 *firstIntIfNum)
+{
+  uint32 intIfNum;
+  uint32 maxIntf;
+  RC_t rc =  SUCCESS;
+
+  maxIntf = platIntfTotalMaxCountGet();
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+            "NIM: incorrect phase for operation.");
+  }
+  else
+  {
+    NIM_CRIT_SEC_READ_ENTER();
+    /* first avaliable Physical internal interface number */
+    for (intIfNum = 1; intIfNum <= maxIntf ; intIfNum++)
+    {
+      if (nimCtlBlk_g->nimPorts[intIfNum].present ==  TRUE)
+      {
+        break;
+      }
+    }
+
+    if (intIfNum <= maxIntf)
+    {
+      *firstIntIfNum = intIfNum;
+    }
+    else
+    {
+      rc =  ERROR;
+    }
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of next valid port
+*
+* @param    intIfNum     @b{(input)}  Internal Interface Number
+* @param    nextintIfNum @b{(output)} Internal Interface Number,
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes none
+*
+* @end
+*********************************************************************/
+RC_t nimNextValidIntfNumber(uint32 intIfNum, uint32 *nextIntIfNum)
+{
+  RC_t   rc =  SUCCESS;
+  uint32 maxIntf;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    rc =  FAILURE;
+     LOGF( LOG_SEVERITY_DEBUG,
+            "NIM: incorrect phase for operation.");
+  }
+  else
+  {
+
+    NIM_CRIT_SEC_READ_ENTER();
+    maxIntf = platIntfTotalMaxCountGet();
+    /* next avaliable Physical internal interface number */
+    for (intIfNum++; intIfNum <= maxIntf; intIfNum++)
+    {
+      if ((nimCtlBlk_g->nimPorts[intIfNum].present ==  TRUE))
+      {
+        break;
+      }
+    }
+
+    if (intIfNum <= maxIntf)
+    {
+      *nextIntIfNum = intIfNum;
+    }
+    else
+    {
+      rc =  FAILURE;
+    }
+    NIM_CRIT_SEC_READ_EXIT();
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  check if the port is a macro port
+*
+* @param    intIfNum    internal interface number
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+ BOOL nimIsMacroPort(uint32 intIfNum)
+{
+   BOOL   returnVal =  FALSE;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    returnVal =   FALSE;
+  }
+  else if (nimCtlBlk_g->nimPorts[intIfNum].operInfo.macroPort.macroPort == 0)
+  {
+    returnVal =  TRUE;
+  }
+  return(returnVal);
+}
+
+/*********************************************************************
+* @purpose  Get valid range of valid internal inteface numbers
+*           for a given interface type
+*
+* @param    intfType  @b{(input)}  one of  INTF_TYPES_t
+* @param    *min      @b{(output)} pointer to parm to store min value
+* @param    *max      @b{(output)} pointer to parm to store max value
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    If the action fails, the intIfNum will be set to zero
+*
+* @end
+*********************************************************************/
+RC_t nimIntIfNumRangeGet( INTF_TYPES_t intfType, uint32 *min, uint32 *max)
+{
+
+  *min = 0;
+  *max = 0;
+
+  if (intfType >=  MAX_INTF_TYPE_VALUE)
+      return  FAILURE;
+
+  *min = nimCtlBlk_g->intfTypeData[intfType].minIntIfNumber;
+  *max = nimCtlBlk_g->intfTypeData[intfType].maxIntIfNumber;
+
+  return  SUCCESS;
+}
+
+
diff --git a/src/sonic-pac/fpinfra/nim/nim_outcalls.c b/src/sonic-pac/fpinfra/nim/nim_outcalls.c
new file mode 100644
index 00000000000..305267fb90b
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_outcalls.c
@@ -0,0 +1,311 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include <string.h>
+#include "datatypes.h"
+#include "commdefs.h"
+#include "cnfgr_api.h"
+#include "nim_data.h"
+#include "nim_util.h"
+#include "nimapi.h"
+
+/*********************************************************************
+* @purpose Callout from NIM interface notifications
+*
+* @param   intIfNum    internal interface number
+* @param   event       one of  PORT_EVENTS_t
+*
+* @return  none
+*
+* @notes   Hooks for interactions with other components or for platform-specific
+*          extensions to the standard dot1q offering.  This outcall occurs for
+*          NIM notifications of interface changes. The NIM callout may cause the
+*          event to be propagated.
+*
+*          The LVL7 hooks to interact are specific hooks for forwarding/not
+*          forwarding and link active/link inactive  notifications to be issued
+*          when spanning tree is not enabled.
+*
+*          These hooks also ensure that the underlying platform is appropriately
+*          configured with respect to spanning tree configuration.
+*
+*          These hooks also ensure that the filtering database is appropriately
+*          configured with respect to a port's MAC address.
+*
+* @end
+*********************************************************************/
+void nimNotifyUserOfIntfChangeOutcall(uint32 intIfNum, uint32 event)
+{
+#ifdef  PFC_PACKAGE
+  uint32 lagIntfNum;
+   BOOL   lagIsPfcActive;
+#endif
+  NIM_EVENT_SPECIFIC_DATA_t eventData;
+
+  memset (&eventData, 0, sizeof(NIM_EVENT_SPECIFIC_DATA_t));
+
+  switch (event)
+  {
+    case  UP:
+    case  PORT_ENABLE:
+      /* Ensure that caller of this function calls this when both the events have happened */
+      {
+        /* set the interface to Authorize since authmgr is not managing this port */
+        NIM_CRIT_SEC_WRITE_ENTER();
+        NIM_INTF_SETMASKBIT(nimCtlBlk_g->authorizedStateMask, intIfNum);
+        NIM_CRIT_SEC_WRITE_EXIT();
+        nimNotifyIntfChange(intIfNum,  AUTHMGR_PORT_AUTHORIZED, eventData);
+      }
+      break;
+
+    case  PORT_DISABLE:
+    case  DOWN:
+      {
+        /* set the interface to Unauthorize since authmgr is not managing this port */
+        NIM_CRIT_SEC_WRITE_ENTER();
+        NIM_INTF_CLRMASKBIT(nimCtlBlk_g->authorizedStateMask, intIfNum);
+        NIM_CRIT_SEC_WRITE_EXIT();
+        nimNotifyIntfChange(intIfNum,  AUTHMGR_PORT_UNAUTHORIZED, eventData);
+      }
+
+      break;
+
+    case  FORWARDING:
+      /*
+      ** Port needs to be 802.1x authorized before it can become active.
+      */
+      if(NIM_INTF_ISMASKBITSET(nimCtlBlk_g->authorizedStateMask, intIfNum) !=  NIM_UNUSED_PARAMETER)
+      {
+        nimNotifyIntfChange(intIfNum,  ACTIVE, eventData);
+      }
+      break;
+
+    case  NOT_FORWARDING:
+      /*
+      ** Port is no longer forwarding and is now inactive
+      */
+      nimNotifyIntfChange(intIfNum,  INACTIVE, eventData);
+      break;
+
+    case  AUTHMGR_PORT_AUTHORIZED:
+      {
+        /*
+         * always set to forwarding if the intf is not dot1s managed
+         */
+        nimNotifyIntfChange(intIfNum,  FORWARDING, eventData);
+      }
+      break;
+
+    case  AUTHMGR_PORT_UNAUTHORIZED:
+      {
+        /*
+         * always set to not forwarding if the intf is not dot1s managed
+         */
+        nimNotifyIntfChange(intIfNum,  NOT_FORWARDING, eventData);
+      }
+      break;
+
+    case  PROBE_SETUP:
+      break;
+
+#ifdef  PORT_AGGREGATOR_PACKAGE
+    case  PORT_AGG_UP:
+
+      /* IEEE 802.1s Support for Multiple Spanning Tree */
+
+      stpMode = dot1sModeGet();
+      if (stpMode ==  DISABLE)
+      {
+        /* MSTP disabled, set the released lag member State to
+         * manual Fowarding for the CIST.
+         */
+
+        dot1sIhSetPortState( DOT1S_CIST_INSTANCE, intIfNum,  DOT1S_MANUAL_FWD);
+      }
+      break;
+
+    case  PORT_AGG_DOWN:
+
+      /* IEEE 802.1s Support for Multiple Spanning Tree */
+
+      stpMode = dot1sModeGet();
+      if (stpMode ==  DISABLE)
+      {
+        /* MSTP disabled, set the released lag member State to
+         * manual Fowarding for the CIST.
+         */
+
+        dot1sIhSetPortState( DOT1S_CIST_INSTANCE, intIfNum,  DOT1S_DISCARDING);
+      }
+      break;
+
+#endif
+
+#ifdef  PFC_PACKAGE
+    case  LAG_ACQUIRE:
+      /* Check if a PFC event should be issued based on the new composition
+         of the LAG. */
+      if (pfcIntfTypeIsValid(intIfNum))
+      {
+        do
+        {
+          if (dot3adWhoisOwnerLag(intIfNum, &lagIntfNum) !=  SUCCESS)
+            break;
+
+          if (NIM_INTF_ISMASKBITSET(nimCtlBlk_g->pfcActiveMask, intIfNum))
+          {
+            lagIsPfcActive = nimIsPfcActiveOnLag(lagIntfNum);
+          }
+          else
+          {
+            /* Only a single LAG member needs to have PFC inactive in order
+               for the LAG to be PFC inactive. */
+            lagIsPfcActive =  FALSE;
+          }
+
+          if(!NIM_INTF_ISMASKBITSET(nimCtlBlk_g->pfcActiveMask, lagIntfNum) && lagIsPfcActive)
+          {
+            nimNotifyIntfChange(lagIntfNum,  PORT_PFC_ACTIVE, eventData);
+          }
+          else if (NIM_INTF_ISMASKBITSET(nimCtlBlk_g->pfcActiveMask, lagIntfNum) && !lagIsPfcActive)
+          {
+            nimNotifyIntfChange(lagIntfNum,  PORT_PFC_INACTIVE, eventData);
+          }
+
+        } while (0);
+      }
+      break;
+
+    case  LAG_RELEASE:
+      /* Check if a PFC event should be issued based on the new composition
+         of the LAG. */
+      if (pfcIntfTypeIsValid(intIfNum))
+      {
+        lagIntfNum = 0;
+        while (dot3adAggEntryGetNext(lagIntfNum, &lagIntfNum) ==  SUCCESS)
+        {
+          if (dot3adIsLagConfigured(lagIntfNum))
+          {
+            lagIsPfcActive = nimIsPfcActiveOnLag(lagIntfNum);
+
+            if(!NIM_INTF_ISMASKBITSET(nimCtlBlk_g->pfcActiveMask, lagIntfNum) && lagIsPfcActive)
+            {
+              nimNotifyIntfChange(lagIntfNum,  PORT_PFC_ACTIVE, eventData);
+            }
+            else if (NIM_INTF_ISMASKBITSET(nimCtlBlk_g->pfcActiveMask, lagIntfNum) && !lagIsPfcActive)
+            {
+              nimNotifyIntfChange(lagIntfNum,  PORT_PFC_INACTIVE, eventData);
+            }
+          }
+        }
+      }
+      break;
+
+    case  PORT_PFC_ACTIVE:
+      /* If this event occured on a LAG member, check to see if the event should also
+         be issued for the LAG itself. */
+      if (pfcIntfTypeIsValid(intIfNum) && dot3adIsLagMember(intIfNum))
+      {
+        do
+        {
+          if (dot3adWhoisOwnerLag(intIfNum, &lagIntfNum) !=  SUCCESS)
+            break;
+
+          /* If the LAG is not PFC active, then check to see that all
+             active LAG members are PFC active before issuing the event
+             for the LAG. */
+          if(!NIM_INTF_ISMASKBITSET(nimCtlBlk_g->pfcActiveMask, lagIntfNum))
+          {
+            if (nimIsPfcActiveOnLag(lagIntfNum))
+            {
+              nimNotifyIntfChange(lagIntfNum,  PORT_PFC_ACTIVE, eventData);
+            }
+          }
+
+        } while (0);
+      }
+      break;
+
+    case  PORT_PFC_INACTIVE:
+      /* If this event occured on a LAG member, check to see if the event should also
+         be issued for the LAG itself. */
+      if (pfcIntfTypeIsValid(intIfNum) && dot3adIsLagMember(intIfNum))
+      {
+        do
+        {
+          if (dot3adWhoisOwnerLag(intIfNum, &lagIntfNum) !=  SUCCESS)
+            break;
+
+          /* If the LAG was previously PFC active, notify that the LAG
+             is PFC inactive. */
+          if(!nimIsPfcActiveOnLag(lagIntfNum))
+          {
+            nimNotifyIntfChange(lagIntfNum,  PORT_PFC_INACTIVE, eventData);
+          }
+
+        } while (0);
+      }
+      break;
+#endif
+    default:
+      break;
+  }
+
+  return;
+}
+
+
+/*********************************************************************
+* @purpose  Get the instance number associated with an interface
+*
+* @param    configId  @b{(input)} an instance of a nimConfigID_t structure
+* @param    instance  @b{(output)} instance number
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    Only supported for VLAN interfaces at this point
+*
+* @notes   Returns a relative instance number for the interface,
+*          from 1 to the maximum number of ports for the interface type
+*
+*
+* @end
+*********************************************************************/
+RC_t nimPortInstanceNumGet(nimConfigID_t configId, uint32 *instance)
+{
+  uint32 index;
+  RC_t rc;
+
+  rc =  SUCCESS;
+  *instance = 0;
+
+  switch (configId.type)
+  {
+    case  LOGICAL_VLAN_INTF:
+      *instance = index;
+      break;
+    default:
+      NIM_LOG_MSG(" Only vlan interfaces supported at this time ");
+      rc =  FAILURE;
+      break;
+  }
+
+  return rc;
+}
+
diff --git a/src/sonic-pac/fpinfra/nim/nim_startup.c b/src/sonic-pac/fpinfra/nim/nim_startup.c
new file mode 100644
index 00000000000..7508414ea84
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_startup.c
@@ -0,0 +1,375 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "datatypes.h"
+#include "commdefs.h"
+#include "cnfgr_api.h"
+#include "log.h"
+#include "osapi.h"
+#include "osapi_sem.h"
+#include "avl_api.h"
+#include "tree_api.h"
+#include "nim_util.h"
+#include "nimapi.h"
+#include "nim_startup.h"
+
+static avlTree_t              nimStartUpTree  = { 0 };
+static void                   *nimStartUpSema =  NULL;
+static void                   *nimStartUpCbSema =  NULL;
+static void                   *nimStartUpEvSema =  NULL;
+static  COMPONENT_IDS_t     nimStartUpCompId =  FIRST_COMPONENT_ID;
+
+
+/* Macros for protecting the AVL tree during operations */
+#define NIM_STARTUP_CRIT_SEC_ENTER()  \
+{   \
+    osapiSemaTake(nimStartUpSema, WAIT_FOREVER);  \
+}
+
+#define NIM_STARTUP_CRIT_SEC_EXIT()  \
+{   \
+    osapiSemaGive(nimStartUpSema);  \
+}
+
+/* Maximum length of time that NIM waits for all applications to transition to Configurator-Execute Phase.
+*/
+#define MAX_NIM_DELAY_SEC  10
+
+/*********************************************************************
+*
+* @purpose  Compare two Startup AVL keys and determine Greater, Less, or Equal
+*
+* @param    a    a void pointer to an AVL key comprised of a Startup structure
+* @param    b    a void pointer to an AVL key comprised of a Startup structure
+* @param    len  the length of the key in bytes (unused)
+*
+* @returns  1 if a > b
+* @returns  -1 if a < b
+* @returns  0 if a == b
+*
+* @notes    This function is used as a custom comparator in the
+*           nimStartUpTreeData AVL tree. The 'len'
+*           parameter is unused because the length of Startup data is
+*           known, however, it is required for compatibility with
+*           the comparator type definition.
+*
+* @end
+*********************************************************************/
+static int nimStartupCompare(const void *a, const void *b, size_t len)
+{
+  nimStartUpTreeData_t *sua = (nimStartUpTreeData_t *)a;
+  nimStartUpTreeData_t *sub = (nimStartUpTreeData_t *)b;
+
+  /* Sort priority highest -> lowest value */
+  if (sua->priority > sub->priority)
+  {
+    return -1;
+  }
+  if (sua->priority < sub->priority)
+  {
+    return 1;
+  }
+  if (sua->componentId < sub->componentId)
+  {
+    return -1;
+  }
+  if (sua->componentId > sub->componentId)
+  {
+    return 1;
+  }
+  return 0;
+}
+
+/*********************************************************************
+* @purpose  Allocate the memory for the ifIndex AVL tree
+*
+* @param    void
+*
+* @returns  void
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimStartUpPhaseOneInit()
+{
+  RC_t   rc =  SUCCESS;
+
+  do
+  {
+
+    if (avlAllocAndCreateAvlTree(&nimStartUpTree,
+                                  NIM_COMPONENT_ID,
+                                  LAST_COMPONENT_ID,
+                                 sizeof(nimStartUpTreeData_t),
+                                 0x10, nimStartupCompare,
+                                 sizeof(uint32)*2) !=  SUCCESS)
+    {
+      NIM_LOG_ERROR("NIM: Unable to allocate resources\n");
+      break; /* goto while */
+    }
+
+    nimStartUpSema = osapiSemaMCreate(OSAPI_SEM_Q_PRIORITY);
+    nimStartUpCbSema = osapiSemaBCreate(OSAPI_SEM_Q_PRIORITY,
+                                        OSAPI_SEM_EMPTY);
+    nimStartUpEvSema = osapiSemaBCreate(OSAPI_SEM_Q_PRIORITY,
+                                        OSAPI_SEM_EMPTY);
+
+    if (nimStartUpSema ==  NULLPTR)
+    {
+      NIM_LOG_ERROR("NIM: unable to create the ifIndex Sema\n");
+    }
+
+  } while ( 0 );
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Create an StartUp
+*
+* @param    componentId   @b{(input)}   Component ID of startup function
+* @param    priority      @b{(input)}   priority to execute startup function
+* @param    startupFcn    @b{(input)}   Function pointer to startup routine
+*
+* @notes
+*
+* @end
+*
+*********************************************************************/
+void nimStartUpCreate( COMPONENT_IDS_t componentId,
+                      uint32 priority,
+                      StartupNotifyFcn startupFcn)
+{
+  nimStartUpTreeData_t data;
+  nimStartUpTreeData_t *pData;
+
+  data.componentId = componentId;
+  data.priority = priority;
+  data.startupFunction = startupFcn;
+
+  NIM_STARTUP_CRIT_SEC_ENTER();
+
+  pData = avlInsertEntry(&nimStartUpTree, &data);
+
+  NIM_STARTUP_CRIT_SEC_EXIT();
+
+  if (pData !=  NULL)
+  {
+    NIM_LOG_MSG("NIM: startup function for %d not added to the AVL tree\n",
+                componentId);
+  }
+
+  return;
+}
+
+/*********************************************************************
+* @purpose  Find the first startup function
+*
+* @param    pRetData     @b{(input)}  pointer to return data
+*
+* @returns   SUCCESS if an entry exists
+* @returns   FAILURE if no entry exists
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimStartUpFirstGet(nimStartUpTreeData_t *pRetData)
+{
+  RC_t rc =  FAILURE;
+  nimStartUpTreeData_t searchData;
+  nimStartUpTreeData_t *pData;
+
+  searchData.priority = 0xffffffff;
+  searchData.componentId = 0;
+
+  NIM_STARTUP_CRIT_SEC_ENTER();
+
+  pData = avlSearch (&nimStartUpTree, &searchData, AVL_NEXT);
+
+  NIM_STARTUP_CRIT_SEC_EXIT();
+
+  if (pData !=  NULL)
+  {
+    memcpy(pRetData, pData, sizeof(nimStartUpTreeData_t));
+    rc =  SUCCESS;
+
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Find the next startup function
+*
+* @param    pRetData     @b{(input)}  pointer to search/return data
+*
+* @returns   SUCCESS if a next entry exists
+* @returns   FAILURE if no next entry exists
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t nimStartUpNextGet(nimStartUpTreeData_t *pRetData)
+{
+  RC_t rc =  FAILURE;
+  nimStartUpTreeData_t *pData;
+
+  NIM_STARTUP_CRIT_SEC_ENTER();
+
+  pData = avlSearch (&nimStartUpTree, pRetData, AVL_NEXT);
+
+  NIM_STARTUP_CRIT_SEC_EXIT();
+
+  if (pData !=  NULL)
+  {
+    memcpy(pRetData, pData, sizeof(nimStartUpTreeData_t));
+    rc =  SUCCESS;
+
+  }
+  return rc;
+}
+
+
+/*********************************************************************
+*
+* @purpose  Invoke startup callbacks for registered components
+*
+* @param    phase     @b{(input)}  startup phase - create or activate
+*
+* @returns  void
+*
+* @notes    Startup's are invoked serially, waiting for each one to
+*           complete before invoking the next component's startup.
+*
+* @end
+*********************************************************************/
+void nimStartupCallbackInvoke(NIM_STARTUP_PHASE_t phase)
+{
+  RC_t              rc;
+  nimStartUpTreeData_t startupData;
+  nimPdu_t             startupMsg;
+  static  BOOL       nimIssuRestoreInitiated =  FALSE;
+   CNFGR_STATE_t     cnfgr_state;
+  uint32            retry_count;
+
+#ifdef  TRACE_ENABLED
+  osapiTraceEvents     traceEventBegin = (phase == NIM_INTERFACE_CREATE_STARTUP) ? 
+     TRACE_EVENT_NIM_CREATE_STARTUP_START :
+     TRACE_EVENT_NIM_ACTIVATE_STARTUP_START;
+  osapiTraceEvents     traceEventEnd = (phase == NIM_INTERFACE_CREATE_STARTUP) ? 
+     TRACE_EVENT_NIM_CREATE_STARTUP_END :
+     TRACE_EVENT_NIM_ACTIVATE_STARTUP_END;
+#endif
+
+
+  memset(&startupMsg, 0, sizeof(startupMsg));
+
+
+#ifdef  TRACE_ENABLED
+  OSAPI_TRACE_EVENT(traceEventBegin, ( uchar8 *) NULLPTR, 0);
+#endif
+
+  rc = nimStartUpFirstGet(&startupData);
+  startupMsg.msgType = START_MSG;
+
+  while (rc ==  SUCCESS)
+  {
+    if (nimCtlBlk_g->nimPhaseStatus !=  CNFGR_STATE_E)
+    {
+       LOGF( LOG_SEVERITY_INFO,
+          "Terminating %s startup callbacks. No longer in EXECUTE state.",
+          phase == NIM_INTERFACE_CREATE_STARTUP ? "CREATE" : "ACTIVATE");
+      return;
+    }
+    nimStartUpCompId = startupData.componentId;
+
+    /* Send the startup function to NIM to execute on NIM's task */
+    startupMsg.data.nimStartMsg.componentId = nimStartUpCompId;
+    startupMsg.data.nimStartMsg.startupFunction = startupData.startupFunction;
+    startupMsg.data.nimStartMsg.phase = phase;
+
+    /* send the message to NIM_QUEUE */
+    if (osapiMessageSend(nimCtlBlk_g->nimMsgQueue, (void *)&startupMsg,
+                         (uint32)sizeof(nimPdu_t),  WAIT_FOREVER,
+                          MSG_PRIORITY_NORM ) ==  ERROR)
+    {
+      NIM_LOG_MSG("NIM: failed to send START message to NIM message Queue.\n");
+      rc =  FAILURE;
+    }
+    else
+    {
+      /* Wait until startup has completed */
+      osapiSemaTake(nimStartUpEvSema,  WAIT_FOREVER);
+    }
+
+    rc = nimStartUpNextGet(&startupData);
+  }
+#ifdef  TRACE_ENABLED
+  OSAPI_TRACE_EVENT(traceEventEnd, ( uchar8 *) NULLPTR, 0 );
+#endif
+}
+
+/*********************************************************************
+*
+* @purpose  Status callback from components to NIM for startup complete
+*           Notifications
+*
+* @param    componentId  @b{(input)} component ID of the caller.
+*
+* @returns  void
+*
+* @notes    At the conclusion of processing a startup Event, each component
+*           must call this function.
+*
+* @end
+*********************************************************************/
+extern void nimStartupEventDone( COMPONENT_IDS_t componentId)
+{
+    if (componentId == nimStartUpCompId)
+    {
+      nimStartUpCompId =  FIRST_COMPONENT_ID;
+      osapiSemaGive(nimStartUpCbSema);
+    }
+    else
+    {
+       LOGF( LOG_SEVERITY_EMERGENCY,
+              "Event Done received for component %d, expecting %d\n",
+              componentId, nimStartUpCompId);
+    }
+}
+
+/*********************************************************************
+*
+* @purpose  Waits for the component to complete its STARTUP processing,
+*           then gives the nimStartUpEvSema signaling cardmgr to proceed
+*           to the next component.
+*
+* @param    none
+*
+* @returns  void
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+extern void nimStartupEventWait(void)
+{
+  osapiSemaTake(nimStartUpCbSema,  WAIT_FOREVER);
+  osapiSemaGive(nimStartUpEvSema);
+}
+
diff --git a/src/sonic-pac/fpinfra/nim/nim_trace.c b/src/sonic-pac/fpinfra/nim/nim_trace.c
new file mode 100644
index 00000000000..f47f8cb85e9
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_trace.c
@@ -0,0 +1,151 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "datatypes.h"
+#include "commdefs.h"
+#include "cnfgr_api.h"
+#include "nim_data.h"
+#include "nim_util.h"
+
+/*********************************************************************
+* @purpose  Trace a port event
+*
+* @param    component   {(input)}   The component issuing the event
+* @param    event       {(input)}   The L7 event being issued
+* @param    intIfNum    {(input)}   The internal interface for the event
+* @param    start       {(input)}    TRUE if event is starting,  FALSE otherwise
+*
+* @returns  void
+*
+* @end
+*********************************************************************/
+void nimTracePortEvent( COMPONENT_IDS_t component,
+                        PORT_EVENTS_t   event,
+                       uint32          intIfNum,
+                        BOOL            start,
+                       NIM_HANDLE_t       handle)
+{
+  return;
+}
+
+
+/*********************************************************************
+* @purpose  Trace a port event on a per component basis
+*
+* @param    component   {(input)} The component being traced
+* @param    event       {(input)} The L7 event being issued
+* @param    intIfNum    {(input)} The internal interface for the event
+* @param    start       {(input)}   TRUE if event is starting,  FALSE otherwise
+*
+* @returns  void
+*
+* @end
+*********************************************************************/
+void nimTracePortEventComp( COMPONENT_IDS_t component,
+                            PORT_EVENTS_t   event,
+                           uint32          intIfNum,
+                            BOOL            start,
+                           NIM_HANDLE_t       handle)
+{
+
+  return;
+}
+
+/*********************************************************************
+* @purpose  Trace a critical section entry/exit
+*
+* @param    write       {(input)}  1 == write, 0 == read
+* @param    take        {(input)}  1 == take,  0 == give
+* @param    take        {(input)}  1 == enter, 0 == exit
+*
+* @returns  void
+*
+* @end
+*********************************************************************/
+void nimTraceCriticalSection( uchar8 write,
+                              uchar8 take)
+{
+  return;
+}
+
+
+/*********************************************************************
+* @purpose  Profile a port event on a per component basis
+*
+* @param    component   {(input)}   The component being traced
+* @param    event       {(input)}   The L7 event being issued
+* @param    intIfNum    {(input)}   The internal interface for the event
+* @param    start       {(input)}    TRUE if event is starting,  FALSE otherwise
+*
+* @returns  void
+*
+* @end
+*********************************************************************/
+void nimProfilePortEventComp( COMPONENT_IDS_t component,
+                              PORT_EVENTS_t   event,
+                             uint32          intIfNum,
+                              BOOL            start
+                            )
+{
+  return;
+}
+
+/*********************************************************************
+* @purpose  Profile a port event
+*
+* @param    component   {(input)}   The component issuing the event
+* @param    event       {(input)}   The L7 event being issued
+* @param    intIfNum    {(input)}   The internal interface for the event
+* @param    start       {(input)}    TRUE if event is starting,  FALSE otherwise
+*
+* @returns  void
+*
+* @end
+*********************************************************************/
+void nimProfilePortEvent( COMPONENT_IDS_t component,
+                          PORT_EVENTS_t   event,
+                         uint32          intIfNum,
+                          BOOL            start
+                        )
+{
+  return;
+}
+
+/*********************************************************************
+* @purpose  Profile a port event
+*
+* @param    component   {(input)}   The component issuing the event
+* @param    event       {(input)}   The L7 event being issued
+* @param    intIfNum    {(input)}   The internal interface for the event
+* @param    start       {(input)}    TRUE if event is starting,  FALSE otherwise
+*
+* @returns  void
+*
+* @end
+*********************************************************************/
+extern void nimProfilePortEvent( COMPONENT_IDS_t component,
+                                 PORT_EVENTS_t   event,
+                                uint32          intIfNum,
+                                 BOOL            start
+                               );
+
+
+ char8 *nimDebugCompStringGet( COMPONENT_IDS_t cid)
+{
+  return("NA");
+}
+
diff --git a/src/sonic-pac/fpinfra/nim/nim_util.c b/src/sonic-pac/fpinfra/nim/nim_util.c
new file mode 100644
index 00000000000..d0f741a6851
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nim/nim_util.c
@@ -0,0 +1,1096 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "datatypes.h"
+#include "commdefs.h"
+#include "cnfgr_api.h"
+#include "sysapi_hpc.h"
+#include "nim_data.h"
+#include "nim_exports.h"
+#include "nim_trace.h"
+#include "nim_ifindex.h"
+#include "nim_util.h"
+#include "platform_config.h"
+#include "nim_outcalls.h"
+
+static  BOOL nimConfigIdTreePopulatationComplete =  FALSE;
+
+
+/*********************************************************************
+* @purpose  return the configuration phase
+*
+* @param     none
+*
+* @returns  the phase number
+*
+* @notes
+*
+* @end
+*********************************************************************/
+ CNFGR_STATE_t nimConfigPhaseGet(void)
+{
+  if (!nimCtlBlk_g)
+  {
+    return  CNFGR_STATE_INVALID;
+  }
+  else
+  {
+    return(nimCtlBlk_g->nimPhaseStatus );
+  }
+}
+
+/*********************************************************************
+* @purpose  Get the state of an interface
+*
+* @param    intIfNum    The internal interface number
+*
+* @returns  Present state of the interface
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+ INTF_STATES_t nimUtilIntfStateGet(uint32 intIfNum)
+{
+   INTF_STATES_t state =  INTF_UNINITIALIZED;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    NIM_LOG_MSG("NIM: incorrect CNFGR phase for action\n");
+  }
+  else if ((intIfNum < 1) || (intIfNum > platIntfTotalMaxCountGet()))
+  {
+    NIM_LOG_MSG("NIM: intIfNum out of range\n");
+  }
+  else
+  {
+    state = nimCtlBlk_g->nimPorts[intIfNum].intfState;
+  }
+
+  return state;
+}
+
+/*********************************************************************
+* @purpose  Determine whether NIM is in a state ready to process
+*       interface requests.
+*
+* @param     none
+*
+* @returns   TRUE - Nim is ready.
+*        FALSE - Nim is not ready.
+*
+* @notes
+*
+* @end
+*********************************************************************/
+ BOOL nimPhaseStatusCheck(void)
+{
+  return  TRUE;
+}
+
+/*********************************************************************
+* @purpose  delete a unit slot port mapping to interface number
+*
+* @param    usp         Pointer to nimUSP_t structure
+*
+* @returns   SUCCESS or  FALIURE
+*
+* @notes    This function is not re-entrant, the caller must ensure integrety of data 
+*       
+* @end
+*********************************************************************/
+RC_t nimUnitSlotPortToIntfNumClear(nimUSP_t *usp)
+{
+  RC_t rc =  SUCCESS;
+  nimUspIntIfNumTreeData_t data;
+  nimUspIntIfNumTreeData_t *pData;
+
+  data.usp = *usp;
+
+  pData = avlDeleteEntry(&nimCtlBlk_g->nimUspTreeData, &data);
+
+  if (pData ==  NULL)
+  {
+    NIM_LOG_MSG("NIM: %d.%d.%d not found, cannot delete it\n",usp->unit,usp->slot,usp->port);
+    rc =  FAILURE;
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  create a unit slot port mapping to interface number
+*
+* @param    usp         Pointer to nimUSP_t structure
+* @param    intIntfNum    interface number
+*
+* @returns   SUCCESS or  FALIURE
+*
+* @notes    This function is not re-entrant, the caller must ensure integrety of data 
+*       
+* @end
+*********************************************************************/
+RC_t nimUnitSlotPortToIntfNumSet(nimUSP_t *usp, uint32 intIntfNum)
+{
+  RC_t     rc =  SUCCESS;
+  uint32   unit = 0, slot = 0, port = 0;
+   INTF_TYPES_t sysIntfType;
+  nimUspIntIfNumTreeData_t data;
+  nimUspIntIfNumTreeData_t *pData;
+
+  /* check the usp */
+  if (usp !=  NULL)
+  {
+    unit = usp->unit;
+    slot = usp->slot;
+    port = usp->port;
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+
+  if ((rc !=  SUCCESS) || (nimPhaseStatusCheck () !=  TRUE))
+  {
+    rc =  FAILURE;
+  }
+  else if ((unit > nimCtlBlk_g->maxNumOfUnits) ||
+           (slot > nimCtlBlk_g->maxNumOfSlotsPerUnit) || 
+           (port == 0))
+  {
+    NIM_LOG_MSG("NIM: out of bounds usp used U=%d, S=%d P=%d\n",unit,slot,port); 
+    rc =  FAILURE;
+  }
+  else if ( (nimGetIntfTypeFromUSP(usp, &sysIntfType) !=  SUCCESS) ||
+            ( nimNumberOfInterfaceExceeded(sysIntfType) ==  TRUE))
+
+  {
+    /* The port number should not exceed the maximum number of interfaces for the type */
+    NIM_LOG_MSG("NIM: out of bounds usp used U=%d, S=%d P=%d - port too large\n",unit,slot,port); 
+    rc =  FAILURE;
+  }
+
+  else
+  {
+    data.intIfNum = intIntfNum;
+    data.usp  = *usp;
+
+    pData = avlInsertEntry(&nimCtlBlk_g->nimUspTreeData, &data);
+
+    if (pData !=  NULLPTR)
+    {
+      NIM_LOG_MSG("NIM: Usp to intIfNum not added for intIfNum %d\n",intIntfNum);
+      rc =  FAILURE;
+    }
+  } 
+
+  return(rc);
+}
+
+
+
+/*********************************************************************
+* @purpose  Determine the next State to transition to
+*          
+* @param    currState    @b{(input)}    The current state
+* @param    event        @b{(input)}    The event being processed
+* @param    nextState    @b{(output)}   The next state to transition to
+*
+* @returns   SUCCESS    
+* @returns   FAILURE    
+*
+* @notes    none
+*
+* @end
+*
+*********************************************************************/
+RC_t nimUtilIntfNextStateGet( INTF_STATES_t currState, PORT_EVENTS_t event, INTF_STATES_t *nextState)
+{
+  RC_t rc =  FAILURE;
+
+  switch (currState)
+  {
+    case  INTF_UNINITIALIZED:
+      if (event ==  CREATE)
+      {
+        *nextState =  INTF_CREATING;
+        rc =  SUCCESS;
+      }
+      break;
+    case  INTF_CREATING:
+      if (event ==  CREATE_COMPLETE)
+      {
+        *nextState =  INTF_CREATED;
+        rc =  SUCCESS;
+      }
+      break;
+    case  INTF_CREATED:
+      if (event ==  ATTACH)
+      {
+        *nextState =  INTF_ATTACHING;
+        rc =  SUCCESS;
+      }
+      else if (event ==  DELETE)
+      {
+        *nextState =  INTF_DELETING;
+        rc =  SUCCESS;
+      }
+      else
+      {
+        rc =  FAILURE;
+      }
+      break;
+    case  INTF_ATTACHING:
+      if (event ==  ATTACH_COMPLETE)
+      {
+        *nextState =  INTF_ATTACHED;
+        rc =  SUCCESS;
+      }
+      break;
+    case  INTF_ATTACHED:
+      if (event ==  DETACH)
+      {
+        *nextState =  INTF_DETACHING;
+        rc =  SUCCESS;
+      }
+      break;
+    case  INTF_DETACHING:
+      if (event ==  DETACH_COMPLETE)
+      {
+        *nextState =  INTF_CREATED;
+        rc =  SUCCESS;
+      }
+      break;
+    case  INTF_DELETING:
+      if (event ==  DELETE_COMPLETE)
+      {
+        *nextState =  INTF_UNINITIALIZED;
+        rc =  SUCCESS;
+      }
+      break;
+    default:
+      rc =  FAILURE;
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Set the state of an interface
+*
+* @param    intIfNum    The internal interface number 
+* @param    state       The state of the interface from the  INTF_STATES_t
+*
+* @returns   SUCCESS or  FALIURE
+*
+* @notes    none 
+*       
+* @end
+*********************************************************************/
+RC_t nimUtilIntfStateSet(uint32 intIfNum,  INTF_STATES_t state)
+{
+  RC_t rc =  SUCCESS;
+
+  if (nimPhaseStatusCheck() !=  TRUE)
+  {
+    NIM_LOG_MSG("NIM: State set during incorrect CNFGR phase\n");
+    rc =  FAILURE;
+  }
+  else if ((intIfNum < 1) || (intIfNum > platIntfTotalMaxCountGet()))
+  {
+    NIM_LOG_MSG("NIM: intIfNum out of range\n");
+    rc =  FAILURE;
+  }
+  else
+  {
+    nimCtlBlk_g->nimPorts[intIfNum].intfState = state;
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Deletes the specified interface from the running and cached cfg file
+*
+* @param    intIfNum Internal Interface Number 
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    none 
+*       
+* @end
+*********************************************************************/
+RC_t nimDeleteInterface(uint32 intIfNum)
+{
+  uint32 sysIntfType;
+  nimCfgPort_t    *localConfigData;
+  nimConfigID_t    configInterfaceId;
+  nimConfigIdTreeData_t  configIdInfo;
+  uint32        numOfInterfaces = 0;
+  nimUSP_t usp;
+  RC_t   rc =  SUCCESS;
+
+  NIM_CRIT_SEC_WRITE_ENTER();
+
+  IS_INTIFNUM_PRESENT(intIfNum,rc);
+
+  if (rc ==  SUCCESS)
+  {
+    /* give back the sema before calling out to the other components */
+    NIM_CRIT_SEC_WRITE_EXIT();
+
+    /* delete nim created stats for this interface */
+    //nimInterfaceCounters(intIfNum, FALSE);
+
+    NIM_CRIT_SEC_WRITE_ENTER();
+
+    sysIntfType = nimCtlBlk_g->nimPorts[intIfNum].sysIntfType;
+
+    localConfigData   = nimCtlBlk_g->nimConfigData->cfgPort;  
+    numOfInterfaces   = nimCtlBlk_g->nimConfigData->numOfInterfaces;
+    configInterfaceId = nimCtlBlk_g->nimPorts[intIfNum].configInterfaceId;
+
+
+    /* Remove the config id info from the avl tree */
+
+    memset(&configIdInfo, 0 , sizeof( configIdInfo));
+    NIM_CONFIG_ID_COPY(&configIdInfo.configId, &configInterfaceId);
+    configIdInfo.intIfNum = intIfNum;
+    (void)nimConfigIdTreeEntryDelete( &configIdInfo);
+    
+
+    /* clear the interface to be used in the bitmap*/
+    NIM_INTF_CLRMASKBIT(nimCtlBlk_g->nimConfigData->configMaskBitmap, intIfNum);
+
+    /* Delete the interface config in the config data */
+    nimConfigInterfaceDelete(configInterfaceId);
+
+    usp.unit = nimCtlBlk_g->nimPorts[intIfNum].usp.unit;
+    usp.slot = nimCtlBlk_g->nimPorts[intIfNum].usp.slot;
+    usp.port = nimCtlBlk_g->nimPorts[intIfNum].usp.port;
+
+    nimIfIndexDelete(nimCtlBlk_g->nimPorts[intIfNum].ifIndex);
+
+    /* set the entry in the quick map to unused */
+    nimUnitSlotPortToIntfNumClear(&usp);   
+
+    /* mark this interface is not in use */
+    nimCtlBlk_g->nimPorts[intIfNum].present =  FALSE;
+
+    if (nimCtlBlk_g->nimNumberOfPortsPerUnit[(uint32)usp.unit] > 0 )
+    {
+      nimCtlBlk_g->nimNumberOfPortsPerUnit[(uint32)usp.unit]--;
+      rc =  SUCCESS;
+    }
+
+    nimCtlBlk_g->numberOfInterfacesByType[nimCtlBlk_g->nimPorts[intIfNum].sysIntfType]--;
+    
+    /* reset all the information for this interface */
+    memset(( void * )&nimCtlBlk_g->nimPorts[intIfNum],0, sizeof( nimIntf_t )); 
+
+    /* mark the config file as changed */
+    //nimCtlBlk_g->nimConfigData->cfgHdr.dataChanged =  TRUE;
+  }
+
+  NIM_CRIT_SEC_WRITE_EXIT();
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Add an entry to the nim nimConfigIdTreeData AVL tree
+*          
+* @param    *pConfigIdInfo    @b{(input)} pointer to a nimConfigIdTreeData_t structure
+*
+* @returns   SUCCESS    
+* @returns   FAILURE    
+*
+* @notes    none
+*
+* @end
+*
+*********************************************************************/
+RC_t nimConfigIdTreeEntryAdd(  nimConfigIdTreeData_t  *pConfigIdInfo)
+{
+
+   void *pData;
+   RC_t rc;
+
+   rc =  SUCCESS;
+
+ /* WPJ     NIM_IFINDEX_CRIT_SEC_ENTER(); */
+   pData = avlInsertEntry(&nimCtlBlk_g->nimConfigIdTreeData, (void *)pConfigIdInfo);
+
+   if (pData !=  NULLPTR)
+   {
+     NIM_LOG_MSG("NIM: configId not added to tree for intIfNum %d\n", 
+                 pConfigIdInfo->intIfNum);
+     rc =  FAILURE;
+   }
+
+ /* WPJ     NIM_IFINDEX_CRIT_SEC_EXIT(); */
+
+   return rc;
+
+}
+
+/*********************************************************************
+* @purpose  Delete an entry from the nim nimConfigIdTreeData AVL tree
+*          
+* @param    *pConfigIdInfo    @b{(input)} pointer to a nimConfigIdTreeData_t structure
+*
+* @returns   SUCCESS    
+* @returns   FAILURE    
+*
+* @notes    none
+*
+* @end
+*
+*********************************************************************/
+RC_t nimConfigIdTreeEntryDelete(  nimConfigIdTreeData_t  *pConfigIdInfo)
+{
+
+   void *pData;
+   RC_t rc;
+
+   rc =  SUCCESS;
+
+ /* WPJ     NIM_IFINDEX_CRIT_SEC_ENTER(); */
+   pData = avlDeleteEntry(&nimCtlBlk_g->nimConfigIdTreeData, (void *)pConfigIdInfo);
+
+   if (pData ==  NULLPTR)
+   {
+     NIM_LOG_MSG("NIM: configId could not be deleted from tree for intIfNum %d\n",
+                 pConfigIdInfo->intIfNum);
+     rc =  FAILURE;
+   }
+
+
+ /* WPJ     NIM_IFINDEX_CRIT_SEC_EXIT(); */
+
+   return rc;
+
+}
+
+
+/*********************************************************************
+* @purpose  Get an entry from the nim nimConfigIdTreeData AVL tree
+*          
+* @param    *pConfigId    @b{(input)} pointer to a nimConfigID_t structure
+* @param    *pConfigIdInfo    @b{(input)} pointer to a nimConfigIdTreeData_t structure
+*
+* @returns   SUCCESS    
+* @returns   FAILURE    
+*
+* @notes    none
+*
+* @end
+*
+*********************************************************************/
+RC_t nimConfigIdTreeEntryGet(nimConfigID_t  *pConfigId, 
+                                nimConfigIdTreeData_t  *pConfigIdInfo )
+{
+
+   void *pData;
+   RC_t rc;
+
+   rc =  SUCCESS;
+
+ /* WPJ     NIM_IFINDEX_CRIT_SEC_ENTER(); */
+   pData = avlSearch (&nimCtlBlk_g->nimConfigIdTreeData, pConfigId, AVL_EXACT);
+
+   if (pData !=  NULLPTR)
+   {
+     memcpy( pConfigIdInfo, pData, sizeof(nimConfigIdTreeData_t) );
+   }
+   else
+   {
+     rc =  FAILURE;
+   }
+
+ /* WPJ     NIM_IFINDEX_CRIT_SEC_EXIT(); */
+
+   return rc;
+
+}
+  
+
+
+/*********************************************************************
+* @purpose  Set either the saved config or the default config in the interface
+*
+* @param    port        @b{(input)}   The interface being manipulated
+* @param    cfgVersion  @b{(input)}   version of the config
+*
+* @returns   SUCCESS or  FALIURE
+*
+* @notes    
+*       
+* @end
+*********************************************************************/
+void nimConfigIdTreePopulate(void)
+{
+  nimCfgPort_t    *localConfigData;
+  nimConfigID_t   configInterfaceId;
+  uint32        numOfInterfaces;
+  uint32        counter;
+  nimConfigIdTreeData_t  configIdInfo;
+
+  if ((nimCtlBlk_g ==  NULLPTR) || (nimCtlBlk_g->nimConfigData ==  NULLPTR))
+  {
+    NIM_LOG_ERROR("NIM: Control block or config data not valid\n");
+  }
+  else
+  {
+
+    localConfigData = nimCtlBlk_g->nimConfigData->cfgPort;
+
+    numOfInterfaces = nimCtlBlk_g->nimConfigData->numOfInterfaces;
+
+    /* Set a null config ID for comparison */
+    memset(&configInterfaceId, 0 , sizeof( configInterfaceId));
+
+    /* see if the config for the interface exists in the file */
+    for (counter = 0; counter <= numOfInterfaces; counter++)
+    {
+      if (NIM_CONFIG_ID_IS_EQUAL(&localConfigData[counter].configInterfaceId,&configInterfaceId))
+      {
+        /* null config id means empty entry.  Do not populate */
+        continue;
+      }
+      else
+      {
+          memset(&configIdInfo, 0 , sizeof( configIdInfo));
+          configIdInfo.intIfNum = localConfigData[counter].configIdMaskOffset;
+
+          NIM_CONFIG_ID_COPY(&configIdInfo.configId, &localConfigData[counter].configInterfaceId);
+          if ( nimConfigIdTreeEntryAdd(&configIdInfo) !=  SUCCESS)
+          {
+              NIM_LOG_MSG("Failed to add configId to avl tree for intIfNum %d\n",configIdInfo.intIfNum); 
+          }
+      }
+    }
+
+  }
+
+  /* Flag this true if this phase is complete */
+  nimConfigIdTreePopulatationComplete =  TRUE;
+  return;
+}
+
+/*********************************************************************
+* @purpose  Determine if nim configuration of config IDs is complete
+*
+* @param    void
+*
+* @returns   TRUE or  FALSE
+*
+* @notes    
+*       
+* @end
+*********************************************************************/
+ BOOL nimConfigIdTreeIsPopulated(void)
+{
+  return (nimConfigIdTreePopulatationComplete);
+}
+
+/*********************************************************************
+* @purpose  Delete the internal interface number for the interface
+*
+* @param    configId  @b{(input)}  The configuration ID to be searched
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    If the action fails, the intIfNum will be set to zero 
+*       
+* @end
+*********************************************************************/
+RC_t nimConfigInterfaceDelete(nimConfigID_t configId)
+{
+  RC_t rc =  FAILURE;
+  nimCfgPort_t *localConfigData;
+  uint32     counter;
+  uint32     numOfInterfaces;
+  uint32     intIfNum = 0;
+
+  if ((nimCtlBlk_g !=  NULLPTR) && (nimCtlBlk_g->nimConfigData !=  NULLPTR))
+  {
+
+    numOfInterfaces = nimCtlBlk_g->nimConfigData->numOfInterfaces;
+    localConfigData   = nimCtlBlk_g->nimConfigData->cfgPort;  
+
+    /* see if the config for the interface exists in the file */
+    for (counter = 0; counter <= numOfInterfaces; counter++)
+    {
+      if (NIM_CONFIG_ID_IS_EQUAL(&localConfigData[counter].configInterfaceId,&configId))
+      {
+        intIfNum = localConfigData[counter].configIdMaskOffset;
+        memset(&localConfigData[counter],0x00,sizeof(nimCfgPort_t));
+        rc =  SUCCESS;
+        break;
+      }
+    }
+
+    if ((rc ==  SUCCESS) && (nimCtlBlk_g->nimPorts[intIfNum].present ==  TRUE))
+    {
+      /* clear the interface being deleted */
+      NIM_INTF_CLRMASKBIT(nimCtlBlk_g->nimConfigData->configMaskBitmap, intIfNum);
+    }
+  }
+
+  return(rc);
+}
+
+/*********************************************************************
+* @purpose  Create the internal interface number for the interface
+*
+* @param    configId  @b{(input)}  The configuration ID to be searched
+* @param    intIfNum  @b{(output)} Internal Interface Number created
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    If the action fails, the intIfNum will be set to zero 
+*       
+* @end
+*********************************************************************/
+RC_t nimIntIfNumCreate(nimConfigID_t configId, uint32 *intIfNum)
+{
+  RC_t rc =  FAILURE;
+  uint32    unit,slot,port;
+  uint32    maxUnits,maxSlotsPerUnit,maxPhysPortsPerSlot,maxPhysPortsPerUnit;
+  uint32    min, max;
+  uint32    i;
+  uint32    slotOffset;
+  nimConfigIdTreeData_t  configIdInfo;
+
+
+  /*----------------------------------------------------------------------*/
+  /* Determine if an intIfNum was assigned from a previous boot and reuse */
+  /*----------------------------------------------------------------------*/
+   
+  if (nimConfigIdTreeEntryGet(&configId, &configIdInfo) ==  SUCCESS)
+  {
+      *intIfNum = configIdInfo.intIfNum;
+      return  SUCCESS;
+  }
+
+  /*-------------------------------------------------------*/
+  /* An intIfNum was not previously assigned.  Assign one. */
+  /*-------------------------------------------------------*/
+  
+  maxUnits              = platUnitTotalMaxPerStackGet();
+  maxSlotsPerUnit       = platSlotMaxPhysicalSlotsPerUnitGet();
+  maxPhysPortsPerSlot   = platSlotMaxPhysicalPortsPerSlotGet();
+  maxPhysPortsPerUnit   = platUnitMaxPhysicalPortsGet();
+
+  switch (configId.type)
+  {
+    case  PHYSICAL_INTF:
+      unit = (uint32)configId.configSpecifier.usp.unit; 
+      slot = (uint32) configId.configSpecifier.usp.slot;  
+      port = (uint32) configId.configSpecifier.usp.port;  
+
+      if ((unit > maxUnits) || (slot >= maxSlotsPerUnit) || (port > maxPhysPortsPerSlot))
+      {
+        rc =  FAILURE;
+        NIM_LOG_MSG("NIM: out of range usp (%d.%d.%d)\n",unit, slot,port ); 
+      }
+      else
+      {
+        /* calculate the last offset for ports in lower-numbered slots on this unit */
+        slotOffset = 0;
+
+        for (i= START_SLOT_NUM_WITH_PORT; i < slot; i++) 
+        {
+           slotOffset += sysapiHpcPhysPortsInSlotGet(i);
+        }
+
+        /* intIfNum determined by intIfNums assigned to lower numbered units and slots */
+        *intIfNum = ((unit - 1) * maxPhysPortsPerUnit) + slotOffset + port;
+        rc =  SUCCESS;
+
+      }
+      break; 
+
+
+    case  CPU_INTF:
+      /* CPU interfaces are directly after the Physical interfaces */
+      unit = (uint32)configId.configSpecifier.usp.unit; 
+      slot = (uint32) configId.configSpecifier.usp.slot;  
+      port = (uint32) configId.configSpecifier.usp.port;  
+
+      if ((slot != platSlotCpuSlotNumGet()) || (unit > maxUnits) ||
+          (port > platIntfCpuIntfMaxCountGet()))
+      {
+        rc =  FAILURE;
+        NIM_LOG_MSG("NIM: out of range usp for CPU Intf (%d.%d.%d)\n", unit, slot, port); 
+      }
+      else
+      {
+
+        /* The relative port number used by the owning interface for logical ports is 1-based.
+           Decrement this number by 1 so that an intIfNum used by one type of interface does
+           not pour over into the range used by another */
+        (void) nimIntIfNumRangeGet( CPU_INTF, &min, &max);
+        *intIfNum = min+ (port-1);
+        rc =  SUCCESS;
+      }
+
+      break;
+
+    case  LAG_INTF:
+      /* LAG interfaces are directly after the CPU interfaces */
+      port = configId.configSpecifier.dot3adIntf;
+      if (port > platIntfLagIntfMaxCountGet())
+      {
+        rc =  FAILURE;
+        NIM_LOG_MSG("NIM: out of range for LAG interface (%d)\n",configId.configSpecifier.dot3adIntf);
+      }
+      else
+      {
+        /* The relative port number used by the owning interface for logical ports is 1-based.
+           Decrement this number by 1 so that an intIfNum used by one type of interface does
+           not pour over into the range used by another */
+          (void) nimIntIfNumRangeGet( LAG_INTF, &min, &max);
+          *intIfNum = min+ (port-1);
+          rc =  SUCCESS;
+      }
+      break;
+
+    case  LOGICAL_VLAN_INTF:
+      /* VLAN interfaces are directly after the LAG interfaces */
+      if (configId.configSpecifier.vlanId >  PLATFORM_MAX_VLAN_ID)
+      {
+        rc =  FAILURE;
+        NIM_LOG_MSG("NIM: out of range vlan interface (%d)\n",configId.configSpecifier.vlanId);
+      }
+      else
+      {
+        if (nimPortInstanceNumGet(configId, &port) ==  SUCCESS) 
+        {
+
+            /* The relative port number used by the owning interface for logical ports is 1-based.
+               Decrement this number by 1 so that an intIfNum used by one type of interface does
+               not pour over into the range used by another */
+            (void) nimIntIfNumRangeGet( LOGICAL_VLAN_INTF, &min, &max);
+            *intIfNum = min+ (port-1);
+            rc =  SUCCESS;
+        }
+        else
+            rc =  FAILURE;
+      }
+      break;
+
+    case  LOOPBACK_INTF:
+      /* Loopback interfaces are directly after the VLAN interfaces */
+      if (configId.configSpecifier.loopbackId >=  MAX_NUM_LOOPBACK_INTF)
+      {
+        rc =  FAILURE;
+        NIM_LOG_MSG("NIM: out of range loopback interface (%d)\n",
+                    configId.configSpecifier.loopbackId);
+      }
+      else
+      {
+        /* loopbackId's are zero-based */
+        (void) nimIntIfNumRangeGet( LOOPBACK_INTF, &min, &max);
+        *intIfNum = min + configId.configSpecifier.loopbackId;
+        rc =  SUCCESS;
+      }
+      break;
+
+    case  TUNNEL_INTF:
+      /* Tunnel interfaces are directly after the Loopback interfaces */
+      if (configId.configSpecifier.tunnelId >=  MAX_NUM_TUNNEL_INTF)
+      {
+        rc =  FAILURE;
+        NIM_LOG_MSG("NIM: out of range tunnel interface (%d)\n",
+                    configId.configSpecifier.tunnelId);
+      }
+      else
+      {
+        /* tunnelId's are zero-based */
+        (void) nimIntIfNumRangeGet( TUNNEL_INTF, &min, &max);
+        *intIfNum = min + configId.configSpecifier.tunnelId;
+        rc =  SUCCESS;
+      }
+      break;
+
+    case  SERVICE_PORT_INTF:
+      /* Service Port interfaces are directly after the Tunnel interfaces */
+      if (configId.configSpecifier.servicePortId >=  MAX_NUM_SERVICE_PORT_INTF)
+      {
+        rc =  FAILURE;
+        NIM_LOG_MSG("NIM: out of range service port interface (%d)\n",
+                    configId.configSpecifier.servicePortId);
+      }
+      else
+      {
+        (void) nimIntIfNumRangeGet( SERVICE_PORT_INTF, &min, &max);
+        *intIfNum = min + configId.configSpecifier.servicePortId;
+        rc =  SUCCESS;
+      }
+      break;
+
+    case  STACK_INTF:
+      rc =  FAILURE;
+      NIM_LOG_MSG("NIM: unsupported type of interface  STACK_INTF\n");
+      break;
+
+    default:
+      rc =  FAILURE;
+      NIM_LOG_MSG("NIM: unsupported type of interface (%d)\n",configId.type);
+      break;
+  }
+
+  if ((nimCtlBlk_g !=  NULLPTR) && (nimCtlBlk_g->nimConfigData !=  NULLPTR))
+  {
+    if (rc !=  SUCCESS)
+    {
+      rc =  FAILURE;
+      *intIfNum = 0;
+    }
+    else
+    {
+      rc =  SUCCESS;
+
+      /* start with known data in the port */
+      /* reset all the information for this interface */
+      memset(( void * )&nimCtlBlk_g->nimPorts[*intIfNum],0, sizeof( nimIntf_t )); 
+
+      /* set the interface to be used */
+      NIM_INTF_SETMASKBIT(nimCtlBlk_g->nimConfigData->configMaskBitmap, *intIfNum);
+
+      /* Store the configId/intIfNum for quick cross access */
+
+      memset(&configIdInfo, 0 , sizeof( configIdInfo));
+      NIM_CONFIG_ID_COPY(&configIdInfo.configId, &configId);
+      configIdInfo.intIfNum = *intIfNum;
+      (void)nimConfigIdTreeEntryAdd( &configIdInfo);
+    }
+  }
+  else
+  {
+    rc =  FAILURE;
+    *intIfNum = 0;
+  }
+
+  return(rc);
+}
+/*********************************************************************
+* @purpose  Create the internal interface number for the interface
+*
+* @param    configId  @b{(input)}  The configuration ID to be searched
+* @param    intIfNum  @b{(output)} Internal Interface Number created
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    If the action fails, the intIfNum will be set to zero 
+*       
+* @end
+*********************************************************************/
+RC_t nimIntIfNumDelete(uint32 intIfNum)
+{
+  RC_t rc =  FAILURE;
+
+  if ((intIfNum > 0) && (intIfNum <= platIntfTotalMaxCountGet()))
+  {
+    /* start with known data in the port */
+    memset(( void * )&nimCtlBlk_g->nimPorts[intIfNum], 0,sizeof(nimIntf_t)); 
+
+    /* set the interface to be used */
+    NIM_INTF_CLRMASKBIT(nimCtlBlk_g->nimConfigData->configMaskBitmap, intIfNum);
+
+    rc =  SUCCESS;
+  }
+
+  return(rc);
+}
+
+
+
+/*********************************************************************
+* @purpose  Check to see if the number of interfaces per type are exceeded
+*
+* @param    intfType  @b{(input)} one of  INTF_TYPES_t
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @notes    If the action fails, the intIfNum will be set to zero 
+*       
+* @end
+*********************************************************************/
+ BOOL nimNumberOfInterfaceExceeded( INTF_TYPES_t intfType)
+{
+   BOOL rc =  FALSE;
+  switch (intfType)
+  {
+    case  PHYSICAL_INTF:
+      if (nimCtlBlk_g->numberOfInterfacesByType[ PHYSICAL_INTF] >= platIntfPhysicalIntfMaxCountGet())
+      {
+        rc = ( TRUE);
+      }
+      break;
+
+    case  STACK_INTF:
+      if (nimCtlBlk_g->numberOfInterfacesByType[ STACK_INTF] >= platIntfStackIntfMaxCountGet())
+      {
+        rc =  TRUE;
+      }
+      break;
+
+    case  CPU_INTF:
+      if (nimCtlBlk_g->numberOfInterfacesByType[ CPU_INTF] >= platIntfCpuIntfMaxCountGet())
+      {
+        rc =  TRUE;
+      }
+      break;
+
+    case  LAG_INTF:
+      if (nimCtlBlk_g->numberOfInterfacesByType[ LAG_INTF] >= platIntfLagIntfMaxCountGet())
+      {
+        rc =  TRUE;
+      }
+      break;
+
+    case  LOGICAL_VLAN_INTF:
+      if (nimCtlBlk_g->numberOfInterfacesByType[ LOGICAL_VLAN_INTF] >= platIntfVlanIntfMaxCountGet())
+      {
+        rc =  TRUE;
+      }
+      break;
+
+    case  LOOPBACK_INTF:
+      if (nimCtlBlk_g->numberOfInterfacesByType[ LOOPBACK_INTF] >= platIntfLoopbackIntfMaxCountGet())
+      {
+        rc =  TRUE;
+      }
+      break;
+
+    case  TUNNEL_INTF:
+      if (nimCtlBlk_g->numberOfInterfacesByType[ TUNNEL_INTF] >= platIntfTunnelIntfMaxCountGet())
+      {
+        rc =  TRUE;
+      }
+      break;
+
+    case  SERVICE_PORT_INTF:
+      if (nimCtlBlk_g->numberOfInterfacesByType[ SERVICE_PORT_INTF] >= platIntfServicePortIntfMaxCountGet())
+      {
+        rc =  TRUE;
+      }
+      break;
+
+    default:
+      rc =  TRUE;
+  }
+  return(rc);
+}
+
+
+/*********************************************************************
+* @purpose  Get the maximum number of interfaces for an interface type
+*
+* @param    intfType  @b{(input)} one of  INTF_TYPES_t
+*
+* @returns  the maximum number of interfaces for an interface type, 0 or greater
+*
+* @notes    Returns zero if an interface type is unrecognized
+*       
+* @end
+*********************************************************************/
+ int32 nimMaxIntfForIntfTypeGet( INTF_TYPES_t intfType)
+{
+
+  uint32 numIntf;
+
+  switch (intfType)
+  {
+    case  PHYSICAL_INTF:
+       numIntf =  platIntfPhysicalIntfMaxCountGet();
+       break;
+
+    case  STACK_INTF:
+      numIntf =  platIntfStackIntfMaxCountGet();
+      break;
+
+    case  CPU_INTF:
+      numIntf =  platIntfCpuIntfMaxCountGet();
+      break;
+
+    case  LAG_INTF:
+      numIntf =  platIntfLagIntfMaxCountGet();
+      break;
+
+    case  LOGICAL_VLAN_INTF:
+      numIntf =  platIntfVlanIntfMaxCountGet();
+      break;
+
+    case  LOOPBACK_INTF:
+      numIntf =  platIntfLoopbackIntfMaxCountGet();
+      break;
+
+    case  TUNNEL_INTF:
+      numIntf =  platIntfTunnelIntfMaxCountGet();
+      break;
+
+    case  SERVICE_PORT_INTF:
+      numIntf = platIntfServicePortIntfMaxCountGet();
+      break;
+
+    default:
+      numIntf =  0;
+
+  }
+
+  return numIntf;
+}
+
+/*********************************************************************
+* @purpose  Log NIM Message at ERROR Severity
+*
+* @param     fileName - file
+* @param     lineNum - Line
+* @param     format - Format of the output.
+* @param     ... - Variable output list.
+*
+* @returns   nothing
+*
+* @notes    
+*       
+* @end
+*********************************************************************/
+void nimLogErrorMsg ( BOOL logError,  char8 * fileName, uint32 lineNum,  char8 * format, ...)
+{
+   uchar8 nim_log_buf[LOG_MSG_MAX_MSG_SIZE];
+  va_list ap;
+   int32 rc;
+
+  va_start(ap, format);
+  rc = vsnprintf(nim_log_buf, sizeof (nim_log_buf), format, ap);
+  va_end(ap);
+
+  nim_log_buf[LOG_MSG_MAX_MSG_SIZE - 1] = 0;
+  syslog( LOG_SEVERITY_ERROR, "%s", nim_log_buf); 
+}
diff --git a/src/sonic-pac/fpinfra/osapi/init_platform_config.c b/src/sonic-pac/fpinfra/osapi/init_platform_config.c
new file mode 100644
index 00000000000..f87dacdc392
--- /dev/null
+++ b/src/sonic-pac/fpinfra/osapi/init_platform_config.c
@@ -0,0 +1,341 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "datatypes.h"
+#include "resources.h"
+#include "product.h"
+
+/*********************************************************************
+* @purpose  Get the LAG slot number
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platSlotLagSlotNumGet (void)
+{
+  return  LAG_SLOT_NUM;
+}
+
+/*********************************************************************
+* @purpose  Get the VLAN slot number
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platSlotVlanSlotNumGet (void)
+{
+  return  VLAN_SLOT_NUM;
+}
+
+/*********************************************************************
+* @purpose  Get the CPU slot number
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platSlotCpuSlotNumGet (void)
+{
+  return  CPU_SLOT_NUM;
+}
+
+/*********************************************************************
+* @purpose  Get the loopback slot number
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platSlotLoopbackSlotNumGet (void)
+{
+  return  LOOPBACK_SLOT_NUM;
+}
+
+/*********************************************************************
+* @purpose  Get the tunnel slot number
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platSlotTunnelSlotNumGet (void)
+{
+  return  TUNNEL_SLOT_NUM;
+}
+
+/*********************************************************************
+* @purpose  Get the service port slot number
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platSlotServicePortSlotNumGet (void)
+{
+  return  SERVICE_PORT_SLOT_NUM;
+}
+
+/*********************************************************************
+* @purpose  Get the maximum number of interfaces for the device.
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platIntfTotalMaxCountGet (void)
+{
+  return  MAX_INTERFACE_COUNT;
+}
+
+/*********************************************************************
+* @purpose  Maximum number of Vlan Interfaces
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platIntfVlanIntfMaxCountGet (void)
+{
+  return  MAX_NUM_VLAN_INTF;
+}
+
+/*********************************************************************
+* @purpose  Maximum number of Loopback Interfaces
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platIntfLoopbackIntfMaxCountGet (void)
+{
+  return  MAX_NUM_LOOPBACK_INTF;
+}
+
+/*********************************************************************
+* @purpose  Maximum number of Tunnel Interfaces
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platIntfTunnelIntfMaxCountGet (void)
+{
+  return  MAX_NUM_TUNNEL_INTF;
+}
+
+/*********************************************************************
+* @purpose  Maximum number of Service Port Interfaces
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platIntfServicePortIntfMaxCountGet (void)
+{
+  return  MAX_NUM_SERVICE_PORT_INTF;
+}
+
+/*********************************************************************
+* @purpose  Maximum number of CPU Interfaces
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platIntfCpuIntfMaxCountGet (void)
+{
+  return  MAX_CPU_SLOTS_PER_UNIT;
+}
+
+/*********************************************************************
+* @purpose  Maximum number of Physical Interfaces
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platIntfPhysicalIntfMaxCountGet (void)
+{
+  return  MAX_PORT_COUNT;
+}
+
+/*********************************************************************
+* @purpose  Maximum number of Stack Interfaces
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platIntfStackIntfMaxCountGet (void)
+{
+  return  MAX_NUM_STACK_INTF;
+}
+
+/*********************************************************************
+* @purpose  Maximum number of Lag Interfaces
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platIntfLagIntfMaxCountGet (void)
+{
+   return  MAX_NUM_LAG_INTF;
+}
+
+/*********************************************************************
+* @purpose  Maximum number of Units in a stack
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platUnitTotalMaxPerStackGet (void)
+{
+  return  MAX_UNITS_PER_STACK;
+}
+
+/*********************************************************************
+* @purpose  Get maximum number of Physical slots per unit.
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platSlotMaxPhysicalSlotsPerUnitGet (void)
+{
+  return  MAX_PHYSICAL_SLOTS_PER_UNIT;
+}
+
+/*********************************************************************
+* @purpose  Get maximum number of Physical ports per slot.
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platSlotMaxPhysicalPortsPerSlotGet (void)
+{
+  return  MAX_PHYSICAL_PORTS_PER_SLOT;
+}
+
+/*********************************************************************
+* @purpose  Maximum number of ports per unit
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platUnitMaxPhysicalPortsGet (void)
+{
+  return  MAX_PHYSICAL_PORTS_PER_UNIT;
+}
+
+/*********************************************************************
+* @purpose  Get maximum number of interfaces supported by the switch.
+*
+* @param    void
+*
+* @returns
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+uint32 platIntfMaxCountGet (void)
+{
+  return  MAX_INTERFACE_COUNT;
+}
+
diff --git a/src/sonic-pac/fpinfra/osapi/osapi.c b/src/sonic-pac/fpinfra/osapi/osapi.c
new file mode 100755
index 00000000000..46984c87a7e
--- /dev/null
+++ b/src/sonic-pac/fpinfra/osapi/osapi.c
@@ -0,0 +1,424 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+#include <string.h>
+#include <ctype.h>
+#include <termios.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <sys/utsname.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <sys/time.h>
+#include <linux/rtc.h>
+#include <fcntl.h>
+#include <pthread.h>
+#include <math.h>
+#include <time.h>
+#include <dirent.h>
+#include <errno.h>
+#include <dlfcn.h>
+#include <sys/wait.h>
+#include <sys/types.h>
+#include <pthread.h>
+#include <arpa/inet.h>
+
+#include "datatypes.h"
+#include "commdefs.h"
+
+#include "log.h"
+
+#include "osapi.h"
+#include "osapi_priv.h"
+#include "osapi_sem.h"
+
+
+/* taken from VxWorks OSAPI implementation */
+static void *syncSemaArray[ TASK_SYNC_LAST] = { NULL};
+
+static pthread_mutex_t task_list_lock = PTHREAD_MUTEX_INITIALIZER;
+static osapi_task_t *task_list_head = NULL;
+
+static pthread_mutex_t zombie_tasks_lock = PTHREAD_MUTEX_INITIALIZER;
+static osapi_task_t *zombie_tasks_list = NULL;
+static pthread_cond_t zombie_tasks_cond;
+
+static uint32 system_page_size = 0;
+
+int osapi_printf(const char *fmt, ...)
+{
+  int rc;
+  va_list args;
+
+  va_start(args, fmt);
+  rc = sysapiVaPrintf(fmt, args);
+  va_end(args);
+
+  return(rc);
+}
+
+/**************************************************************************
+ *
+ * @purpose  Retrieve number of milliseconds since last reset
+ *
+ * @param    void
+ *
+ * @returns  rawtime in milliseconds
+ *
+ * @comments
+ *
+ * @end
+ *
+ *************************************************************************/
+uint32 osapiUpTimeMillisecondsGet ( void )
+{
+  struct timespec tp;
+
+  (void) clock_gettime(CLOCK_MONOTONIC, &tp);
+
+  return(( tp.tv_sec * 1000 ) + ( tp.tv_nsec / 1000000 ));
+}
+
+
+/**************************************************************************
+ *
+ * @purpose  Retrieve number of milliseconds
+ *          AVOID THIS FUNCTION
+ *          Use the osapiUpTimeMillisecondsGet()
+ *
+ * @param    void
+ *
+ * @returns  milliseconds since last reset
+ *
+ * @notes
+ *
+ * @end
+ *
+ *************************************************************************/
+uint32 osapiTimeMillisecondsGet( void )
+{
+  return osapiUpTimeMillisecondsGet ();
+}
+
+
+/*********************************************************************
+ * @purpose  Returns the function containing a given address
+ *
+ * @param    addr, uint32
+ *           funcName,  char8* buffer allocated by caller
+ *           funcNameLen, uint32 length of name buffer
+ *           offset, uint32* pointer to uint32 allocated by caller.
+ *                   Address's offset from beginning of function stored there.
+ *
+ * @returns   SUCCESS if function found, name printed into funcName buffer,
+ *                      offset set into *offset.
+ *            FAILURE if function not found, buffers untouched.
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t osapiFunctionLookup(void * addr,  char8 *funcName,
+                            uint32 funcNameLen, uint32 * offset)
+{
+  /* Not required */
+  return  FAILURE;
+}
+
+
+/*********************************************************************
+* @purpose  Given a pointer to full path of a file, change the pointer
+*           to point to the beginning of the file name
+*
+* @param    **fullPath    @{(input)}  Address of pointer to full path to file
+*
+* @returns  none
+*
+* @end
+*********************************************************************/
+void utilsFilenameStrip( char8 **fullPath)
+{
+  uint32 i;
+   char8 *fileP;
+
+  if ((fullPath ==  NULLPTR) || (*fullPath ==  NULLPTR))
+    return;
+
+  i = strlen(*fullPath);
+  fileP = &((*fullPath)[i]);
+
+  /* look for the first slash from the end of string */
+  for (; i > 0; i--)
+  {
+    fileP--;
+
+    /* check for forward or backward slash (need two '\' since first one's an escape char) */
+    if (*fileP == '/' || *fileP == '\\')
+    {
+      fileP++;    /* went too far, move ahead one char */
+      break;
+    }
+  }
+
+  *fullPath = fileP;
+}
+
+/**************************************************************************
+ **
+ ** @purpose  Copy a string to a buffer with a bounded length (with safeguards)
+ **
+ ** @param    *dest       @b{(input)}  destination location
+ ** @param    *src        @b{(input)}  source string ptr
+ ** @param    n           @b{(input)}  maximum number of characters to copy
+ **
+ ** @returns  Pointer to destination location (always)
+ **
+ ** @comments The dest and src strings must not overlap.  The dest location
+ **           must have enough space for n additional characters.
+ **
+ ** @comments No more than n characters are copied from src to dest.  If there
+ **           is no '\0' character within the first n > 0 characters of src, the
+ **           n-th byte of dest string will be written with the '\0'
+ **           string termination character (e.g., if n=10, *(dest+9)='\0').
+ **
+ ** @comments If the src string length is less than n, the remainder of
+ **           dest is padded with nulls.
+ **
+ ** @comments To maintain consistency with the POSIX functions, the des
+ **           pointer is returned, even if no characters were actually copied
+ **           (e.g., src string has zero length, src ptr is null, n is 0,
+ * *           etc.)
+ * *
+ * * @end
+ * *
+ * *************************************************************************/
+ char8 *osapiStrncpySafe( char8 *dest, const  char8 *src, uint32 n)
+{
+   char8      *retptr = dest;
+
+  /* don't copy anything if there is no dest location */
+  if (dest ==  NULLPTR)
+    return retptr;
+
+  if (src ==  NULLPTR)
+  {
+    if (n > 0)
+    {
+      /* null src ptr, but n > 0:  pad dest to ensure termination */
+      memset(dest,  EOS, n);
+    }
+    return retptr;
+  }
+ 
+  if (n > 0)
+  {
+    memcpy(dest, src, n);
+    *(dest+n-1) =  EOS;
+  }
+
+  return retptr;
+}
+
+/**************************************************************************
+*
+* @purpose     Convert an IP address from a hex value to an ASCII string
+*
+* @param       ipAddr     @b{(input)}  IP address to be converted (host byte
+*                                        order)
+* @param       buf        @b{(output)} location to store IP address string
+*
+* @returns     void
+*
+* @comments    Caller must provide an output buffer of at least
+* @comments    OSAPI_INET_NTOA_BUF_SIZE bytes (as defined in
+* @comments    osapi.h).
+* @comments    'ipAddr' is supplied in HOST BYTE ORDER
+*
+* @end
+*
+*************************************************************************/
+void osapiInetNtoa (uint32 ipAddr,  uchar8 *buf)
+{
+  sprintf( buf, "%d.%d.%d.%d",
+           (ipAddr & 0xff000000) >> 24,
+           (ipAddr & 0x00ff0000) >> 16,
+           (ipAddr & 0x0000ff00) >> 8,
+           (ipAddr & 0x000000ff) );
+}
+
+/**************************************************************************
+*
+* @purpose  map  AF to AF
+*
+* @param    l7af          AF type
+*
+* @returns  stack AF
+*
+* @comments static use only. here since osapi callers may not have access
+* to AF_ values of stack. Values are NOT the same.
+*
+* @end
+*
+*************************************************************************/
+static uint32 osapiFromL7AF(uint32 l7af)
+{
+  switch(l7af)
+  {
+  case  AF_INET:
+      return AF_INET;
+  case  AF_INET6:
+      return AF_INET6;
+  default:
+      break;
+  }
+  return 0;
+}
+
+/**************************************************************************
+*
+* @purpose  convert a dot notation Internet address to a long integer
+*
+* @param    address @b{(input)} IP address in dotted notation
+*
+* @returns  IP address in long integer
+*
+* @end 
+*
+*************************************************************************/
+uint32 osapiInet_addr( uchar8 *address)
+{
+  uint32 longAddress;
+  longAddress=osapiNtohl(inet_addr(address));
+  return longAddress;
+}
+
+/**************************************************************************
+*
+* @purpose      create ascii displayable string from IP (4/6) address
+*
+* @param        family          address faminly
+*               addr            pointer to address
+*               str             pointer to ouput string
+*               len             length of output string
+*
+* @returns      output string or  NULL
+*
+*
+* @end
+*
+*************************************************************************/
+ uchar8 *osapiInetNtop(uint32 family,  uchar8 *addr,  uchar8 *str, uint32 len)
+{
+   const  uchar8 *rp;
+
+   family = osapiFromL7AF(family);
+   rp =  inet_ntop(family,addr,str,len);
+   return ( uchar8 *)rp;
+}
+
+/*********************************************************************
+* @purpose  Returns the string representation of given address
+*
+* @param    addr, void *
+*           buf,  char8* buffer allocated by caller
+*           bufsize, uint32 length of name buffer
+*
+* @returns  None
+*
+* @comments if function found, address, name and offset are printed
+*           info passed buffer else only address is printed
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void osapiAddressStringify (void *addr,  char8 *buf, uint32 bufsize)
+{
+  osapiSnprintf(buf, bufsize, "$%p$ ?????", addr);
+}
+
+uint32 osapiUpTimeRaw(void)
+{
+  struct timespec tp;
+  int rc;
+
+  rc = clock_gettime(CLOCK_MONOTONIC, &tp);
+  if (rc < 0)
+  {
+      return 0;
+  }
+  return(tp.tv_sec);
+}
+
+/*******************************************************************************
+* @purpose      To locate character in string
+*
+* @param   *s    @b{(input)} input string to search for the character
+* @param   len   @b{(input)} len of the input string
+* @param   c         @b{(input)} character to search for
+* @returns      a pointer to the matched character or NULL if the character is not found
+*
+* @comments 
+*
+* @end
+*******************************************************************************/
+ char8 *osapiStrnchr (const  char8 *s, uint32 len,  char8 c)
+{
+  uint32 i;
+
+  for (i = 0; i < len; i++)
+  {
+    if (s[i] == 0)
+    {
+      return 0;
+    }
+    if (s[i] == c)
+    {
+      return (char *)s + i;
+    }
+  }
+
+  return 0;
+}
+
+/**********************************************************************
+ * @purpose  Get the current UTC time since the Unix Epoch.
+ *
+ * @param    ct @b{(output)} UTC time
+ *
+ * @returns   SUCCESS
+ * 
+ * @notes    NTP epoch is different from Unix epoch.
+ * 
+ * @end
+ *********************************************************************/
+RC_t osapiUTCTimeGet( clocktime * ct)
+{
+  struct timeval tv;
+
+  memset (&tv, 0, sizeof (tv));
+  gettimeofday(&tv,NULL);
+  ct->seconds = tv.tv_sec; /* local time as per the configured timezone */
+  tzset(); /* Read timezone information in kernel */
+#if !defined(PC_LINUX_HOST) || defined( CHIP_LINE)
+  ct->seconds += timezone; /* Adjust local time to UTC */
+#endif /* defined PC_LINUX_HOST && !defined  CHIP_LINE */
+  ct->nanoseconds = tv.tv_usec * 1000; /* usec to nsec conversion */ 
+  return  SUCCESS;
+}
diff --git a/src/sonic-pac/fpinfra/osapi/osapi_file.c b/src/sonic-pac/fpinfra/osapi/osapi_file.c
new file mode 100755
index 00000000000..1fdf1d95147
--- /dev/null
+++ b/src/sonic-pac/fpinfra/osapi/osapi_file.c
@@ -0,0 +1,173 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/wait.h>
+#include <string.h>
+#include <unistd.h>
+#include <dirent.h>
+#include <fcntl.h>
+#include <pthread.h>
+#include <errno.h>
+#include <sys/statfs.h>
+
+#include "log.h"
+#include "osapi_file.h"
+
+/**************************************************************************
+*
+* @purpose  Opens a file
+*
+* @param    filename @b{(input)} File to Open
+* @param    fd       @b{(input)}  Pointer to file descriptor
+*
+* @returns   ERROR if file does not exist
+*
+* @comments    none.
+*
+* @end
+*
+*************************************************************************/
+EXT_API RC_t osapiFsOpen( char8 *filename,  int32 *fd)
+{
+  if ( NULLPTR == filename)
+  {
+    return  FAILURE;
+  }
+  if ((*fd = open(filename, O_RDWR | O_SYNC, 0644)) == -1)
+  {
+    return( ERROR);
+  }
+
+  return( SUCCESS);
+}
+
+/**************************************************************************
+*
+* @purpose  Opens a file in read-only mode
+*
+* @param    filename @b{(input)} File to Open
+* @param    fd       @b{(input)}  Pointer to file descriptor
+*
+* @returns   ERROR if file does not exist
+*
+* @comments    none.
+*
+* @end
+*
+*************************************************************************/
+EXT_API RC_t osapiFsOpenRDonly( char8 *filename,  int32 *fd)
+{
+  if ( NULLPTR == filename)
+  {
+    return  FAILURE;
+  }
+  if ((*fd = open(filename, O_RDONLY)) == -1)
+  {
+    return( ERROR);
+  }
+
+  return( SUCCESS);
+}
+
+/**************************************************************************
+*
+* @purpose  closes a file opened by osapiFsOpen
+*
+* @param    filedesc @b{(input)} descriptor of file to close
+*
+* @returns   SUCCESS
+* @returns   ERROR if file already closed
+*
+* @comments    none.
+*
+* @end
+*
+*************************************************************************/
+EXT_API RC_t osapiFsClose( int32 filedesc)
+{
+   int32 ret;
+  if ((filedesc < 3) || (filedesc > FD_SETSIZE))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+            "Out of range file descriptor argument %d", filedesc);
+    return  ERROR;
+  }
+
+  while (((ret = close(filedesc)) == -1) && (errno == EINTR))
+  /* Nothing*/;
+  if (ret < 0)
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+            "File close for descriptor %d asserted errno %d", filedesc, errno);
+    return  ERROR;
+  }
+
+  sync();
+
+  return( SUCCESS);
+}
+
+/**************************************************************************
+*
+* @purpose  Retrieve file size
+*
+* @param    filename  @b{(input)}  string of file to retrieve size
+* @param    filesize  @b{(output)} integer of file size
+*
+* @returns   SUCCESS
+* @returns   ERROR
+*
+* @comments
+*
+* @end
+*
+*************************************************************************/
+EXT_API RC_t osapiFsFileSizeGet ( char8 *filename, uint32 *filesize)
+{
+   int32 filedesc = -1;
+  struct stat fileStat;
+
+  if (( NULLPTR == filename) || ( NULLPTR == filesize))
+  {
+    return  ERROR;
+  }
+
+  /* file size is 0 if  ERROR or the file does not exist */
+  *filesize =  0;
+  if ((filedesc = open (filename, O_RDWR, 0)) <  0)
+  {
+    return  ERROR;
+  }
+
+  if (fstat (filedesc, &fileStat) < 0)
+  {
+    close (filedesc);
+    return  ERROR;
+  }
+
+  if (close (filedesc) < 0)
+  {
+    return  ERROR;
+  }
+
+  *filesize = (uint32) (fileStat.st_size);
+  return  SUCCESS;
+}
diff --git a/src/sonic-pac/fpinfra/osapi/osapi_rwlock.c b/src/sonic-pac/fpinfra/osapi/osapi_rwlock.c
new file mode 100755
index 00000000000..fea50c76342
--- /dev/null
+++ b/src/sonic-pac/fpinfra/osapi/osapi_rwlock.c
@@ -0,0 +1,463 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+
+#include "datatypes.h"
+#include "commdefs.h"
+
+//#include "log.h"
+
+#include "osapi.h"
+#include "osapi_priv.h"
+
+typedef struct osapi_rwlock_s
+{
+  volatile uint32 flags;
+  pthread_mutex_t lock;
+  volatile uint32 rcount;
+  volatile uint32 wcount;
+  osapi_waitq_t rqueue;
+  osapi_waitq_t wqueue;
+  struct osapi_rwlock_s *chain_prev, *chain_next;
+} osapi_rwlock_t;
+
+#define RWLOCK_DELETED     0x00000001
+#define RWLOCK_W_PENDING   0x00000002
+#define RWLOCK_Q_FIFO      0x00000004
+#define RWLOCK_Q_PRIO      0x00000008
+
+static pthread_mutex_t rwlock_list_lock = PTHREAD_MUTEX_INITIALIZER;
+static osapi_rwlock_t *rwlock_list_head = NULL;
+
+/**************************************************************************
+ *
+ * @purpose  Create a read/write lock
+ *
+ * @param    options @b{(input)} queueing style - either Priority or FIFO
+ *
+ * @returns  ptr to the lock or NULL if lock cannot be allocated
+ *
+ * @comments None.
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t osapiRWLockCreate (osapiRWLock_t * rwlock, osapiRWLockOptions_t options)
+{
+  uint32 q_options;
+  osapi_rwlock_t *newRWLock;
+
+  newRWLock = (osapi_rwlock_t *) osapiMalloc ( OSAPI_COMPONENT_ID,
+                                              sizeof (osapi_rwlock_t));
+  if (newRWLock == NULL)
+  {
+    rwlock->handle = (void *) newRWLock;
+    return  FAILURE;
+  }
+
+  pthread_mutex_init (&(newRWLock->lock), (pthread_mutexattr_t *) NULL);
+
+  /* Do the options remapping */
+  if (options == OSAPI_RWLOCK_Q_FIFO)
+  {
+    newRWLock->flags |= RWLOCK_Q_FIFO;
+    q_options = WAITQ_FIFO;
+  }
+  else                          /* if (options == OSAPI_RWLOCK_Q_PRIORITY) */
+  {
+    newRWLock->flags |= RWLOCK_Q_PRIO;
+    q_options = WAITQ_PRIO;
+  }
+
+  newRWLock->rcount = 0;
+  newRWLock->wcount = 0;
+  osapi_waitq_create (&(newRWLock->rqueue), &(newRWLock->lock), q_options);
+  osapi_waitq_create (&(newRWLock->wqueue), &(newRWLock->lock), q_options);
+
+  pthread_mutex_lock (&rwlock_list_lock);
+
+  if (rwlock_list_head != NULL)
+  {
+    rwlock_list_head->chain_prev = newRWLock;
+  }
+  newRWLock->chain_next = rwlock_list_head;
+  rwlock_list_head = newRWLock;
+  newRWLock->chain_prev = NULL;
+
+  pthread_mutex_unlock (&rwlock_list_lock);
+
+  rwlock->handle = (void *) newRWLock;
+  return  SUCCESS;
+}
+
+static int osapi_rwlock_r_waitq_remove_check (void *rwlock)
+{
+  osapi_rwlock_t *osapiRWLock = (osapi_rwlock_t *) rwlock;
+
+  if (osapiRWLock->wcount == 0)
+  {
+    return WAITQ_REMOVE_OK;
+  }
+
+  if ((osapiRWLock->flags & RWLOCK_DELETED) != 0)
+  {
+    return WAITQ_REMOVE_OK;
+  }
+
+  return ~WAITQ_REMOVE_OK;
+}
+
+/**************************************************************************
+ *
+ * @purpose  Take a read lock
+ *
+ * @param    rwlock    ID of the requested lock returned from osapiRWLockCreate
+ * @param    timeout   time to wait in milliseconds,  WAIT_FOREVER,
+ *                     or  NO_WAIT
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE if timeout or if lock does not exist
+ *
+ * @comments None.
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t osapiReadLockTake (osapiRWLock_t rwlock,  int32 timeout)
+{
+  RC_t rc =  SUCCESS;
+  osapi_rwlock_t *osapiRWLock = (osapi_rwlock_t *) rwlock.handle;
+
+  /* Timeout is already in milliseconds, which is what
+     osapi_waitq_enqueue() needs */
+
+  pthread_mutex_lock (&(osapiRWLock->lock));
+
+  if ((osapiRWLock->flags & RWLOCK_DELETED) == 0)
+  {
+    /* wait for writes to complete */
+    while (osapiRWLock->wcount > 0)
+    {
+      rc = osapi_waitq_enqueue (&(osapiRWLock->rqueue), timeout,
+                                osapi_rwlock_r_waitq_remove_check,
+                                (void *) osapiRWLock, __FP_CALLER__);
+
+      if ((rc !=  SUCCESS) || ((osapiRWLock->flags & RWLOCK_DELETED) != 0))
+      {
+        rc =  FAILURE;
+        break;
+      }
+    }
+
+    if (rc ==  SUCCESS)
+    {
+      osapiRWLock->rcount++;
+    }
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+
+  pthread_mutex_unlock (&(osapiRWLock->lock));
+
+  return rc;
+}
+
+/**************************************************************************
+ *
+ * @purpose  Give a read lock
+ *
+ * @param    rwlock     ID of the requested lock returned from osapiRWLockCreate
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE if lock is invalid
+ *
+ * @comments None.
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t osapiReadLockGive (osapiRWLock_t rwlock)
+{
+  RC_t rc =  SUCCESS;
+  osapi_rwlock_t *osapiRWLock = (osapi_rwlock_t *) rwlock.handle;
+
+  pthread_mutex_lock (&(osapiRWLock->lock));
+
+  if (osapiRWLock->rcount == 0)
+  {
+    rc =  ERROR;
+  }
+  else
+  {
+    if (--osapiRWLock->rcount == 0)
+    {
+      osapi_waitq_dequeue (&(osapiRWLock->wqueue));
+    }
+  }
+  pthread_mutex_unlock (&(osapiRWLock->lock));
+
+  return rc;
+}
+
+static int osapi_rwlock_w_waitq_remove_check (void *rwlock)
+{
+  osapi_rwlock_t *osapiRWLock = (osapi_rwlock_t *) rwlock;
+
+  if ((osapiRWLock->rcount == 0) && (osapiRWLock->wcount == 0))
+  {
+    return WAITQ_REMOVE_OK;
+  }
+
+  if ((osapiRWLock->flags & RWLOCK_DELETED) != 0)
+  {
+    return WAITQ_REMOVE_OK;
+  }
+
+  return ~WAITQ_REMOVE_OK;
+}
+
+/**************************************************************************
+ *
+ * @purpose  Take a write lock
+ *
+ * @param    rwlock    ID of the requested lock returned from osapiRWLockCreate
+ * @param    timeout   time to wait in milliseconds,  WAIT_FOREVER,
+ *                     or  NO_WAIT
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE if timeout or if lock does not exist
+ *
+ * @comments None.
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t osapiWriteLockTake (osapiRWLock_t rwlock,  int32 timeout)
+{
+  RC_t rc =  SUCCESS;
+  osapi_rwlock_t *osapiRWLock = (osapi_rwlock_t *) rwlock.handle;
+
+  /* Timeout is already in milliseconds, which is what
+     osapi_waitq_enqueue() needs */
+
+  pthread_mutex_lock (&(osapiRWLock->lock));
+
+  if ((osapiRWLock->flags & RWLOCK_DELETED) == 0)
+  {
+    /* indicate pending write */
+    osapiRWLock->flags |= RWLOCK_W_PENDING;
+
+    /* wait for reads to complete */
+    while ((osapiRWLock->rcount > 0) || (osapiRWLock->wcount > 0))
+    {
+      rc = osapi_waitq_enqueue (&(osapiRWLock->wqueue), timeout,
+                                osapi_rwlock_w_waitq_remove_check,
+                                (void *) osapiRWLock, __FP_CALLER__);
+
+      if ((rc !=  SUCCESS) || ((osapiRWLock->flags & RWLOCK_DELETED) != 0))
+      {
+        osapiRWLock->flags &= ~(RWLOCK_W_PENDING);
+        rc =  FAILURE;
+        break;
+      }
+    }
+
+    if (rc ==  SUCCESS)
+    {
+      osapiRWLock->wcount++;    /* result should always equal 1 */
+      osapiRWLock->flags &= ~(RWLOCK_W_PENDING);
+    }
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+
+  pthread_mutex_unlock (&(osapiRWLock->lock));
+
+  return rc;
+}
+
+/**************************************************************************
+ *
+ * @purpose  Give a write lock
+ *
+ * @param    rwlock     ID of the requested lock returned from osapiRWLockCreate
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE if lock is invalid
+ *
+ * @comments None.
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t osapiWriteLockGive (osapiRWLock_t rwlock)
+{
+  RC_t rc =  SUCCESS;
+  osapi_rwlock_t *osapiRWLock = (osapi_rwlock_t *) rwlock.handle;
+
+  pthread_mutex_lock (&(osapiRWLock->lock));
+
+  if (osapiRWLock->wcount == 0)
+  {
+    rc =  ERROR;
+  }
+  else
+  {
+    osapiRWLock->wcount--;      /* result should always equal 0 */
+    osapi_waitq_dequeue (&(osapiRWLock->wqueue));
+    /* Wake up _all_ waiting readers */
+    osapi_waitq_dequeue_all (&(osapiRWLock->rqueue));
+  }
+  pthread_mutex_unlock (&(osapiRWLock->lock));
+  return rc;
+}
+
+/**************************************************************************
+ *
+ * @purpose  Delete a read/write lock
+ *
+ * @param    rwlock     ID of the lock to delete
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE if lock is invalid
+ *
+ * @comments Routine will suspend until there are no outstanding reads or writes.
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t osapiRWLockDelete (osapiRWLock_t rwlock)
+{
+  RC_t rc =  SUCCESS;
+  osapi_rwlock_t *osapiRWLock = (osapi_rwlock_t *) rwlock.handle;
+
+  pthread_mutex_lock (&(osapiRWLock->lock));
+
+  /* mark rwlock as deleted and wait for current readers and writers */
+
+  osapiRWLock->flags |= RWLOCK_DELETED;
+
+  while ((osapiRWLock->rcount > 0) || (osapiRWLock->wcount > 0))
+  {
+    /* wait for reads and writes to complete */
+    rc = osapi_waitq_enqueue (&(osapiRWLock->wqueue),  WAIT_FOREVER,
+                              osapi_rwlock_w_waitq_remove_check,
+                              (void *) osapiRWLock, __FP_CALLER__);
+
+    if (rc !=  SUCCESS)
+    {
+      /* This SHOULD NOT happen... */
+      break;
+    }
+  }
+
+  osapi_waitq_destroy (&(osapiRWLock->rqueue));
+
+  osapi_waitq_destroy (&(osapiRWLock->wqueue));
+
+  pthread_mutex_unlock (&(osapiRWLock->lock));
+
+  pthread_mutex_destroy (&(osapiRWLock->lock));
+
+  pthread_mutex_lock (&rwlock_list_lock);
+
+  if (osapiRWLock->chain_next != NULL)
+  {
+    osapiRWLock->chain_next->chain_prev = osapiRWLock->chain_prev;
+  }
+
+  if (osapiRWLock->chain_prev != NULL)
+  {
+    osapiRWLock->chain_prev->chain_next = osapiRWLock->chain_next;
+  }
+  else
+    /* must be head of list */
+  {
+    rwlock_list_head = osapiRWLock->chain_next;
+  }
+
+  pthread_mutex_unlock (&rwlock_list_lock);
+
+  osapiFree ( OSAPI_COMPONENT_ID, osapiRWLock);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Initializes OSAPI Read/Write Lock Library
+*
+* @returns   SUCCESS
+*
+* @returns none
+*
+* @end
+*
+*********************************************************************/
+RC_t osapiRWLockInit (void)
+{
+  return  SUCCESS;
+}
+
+/**************************************************************************
+ *
+ * @purpose  Print information about read/write lock
+ *
+ * @param    void
+ *
+ * @returns   SUCCESS
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t osapiDebugRWLockPrint (void)
+{
+   char8 addrstr[0x80];
+  osapi_rwlock_t *rwlock;
+  uint32 count = 0;
+
+  for (rwlock = rwlock_list_head; rwlock !=  NULLPTR;
+       rwlock = rwlock->chain_next)
+  {
+    count++;
+  }
+
+  sysapiPrintf ("\r\nTotal Number of RW Locks : %d\r\n", count);
+
+  sysapiPrintf
+    ("Lock ID Flags       rcount   wcount   Read         Write      \r\n");
+  sysapiPrintf
+    ("------- ----------  -------- -------- -----------  -----------\r\n");
+
+  for (rwlock = rwlock_list_head; rwlock !=  NULLPTR;
+       rwlock = rwlock->chain_next)
+  {
+    sysapiPrintf ("%p ",  rwlock);
+    sysapiPrintf ("%08x ", rwlock->flags);
+    sysapiPrintf ("%8d ", rwlock->rcount);
+    sysapiPrintf ("%8d ", rwlock->wcount);
+    osapiAddressStringify (rwlock->rqueue.taken, addrstr, sizeof (addrstr));
+    sysapiPrintf ("%s ", addrstr);
+    osapiAddressStringify (rwlock->wqueue.taken, addrstr, sizeof (addrstr));
+    sysapiPrintf ("%s ", addrstr);
+    sysapiPrintf ("\r\n");
+  }
+  return  SUCCESS;
+}
diff --git a/src/sonic-pac/fpinfra/osapi/osapi_sem.c b/src/sonic-pac/fpinfra/osapi/osapi_sem.c
new file mode 100755
index 00000000000..d6e9c93f67f
--- /dev/null
+++ b/src/sonic-pac/fpinfra/osapi/osapi_sem.c
@@ -0,0 +1,929 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+
+#include <string.h>
+#include <stdlib.h>
+
+#include "datatypes.h"
+#include "commdefs.h"
+#include "osapi_priv.h"
+#include "osapi_sem.h"
+#include "osapi.h"
+
+#define OSAPI_USE_OS_SEM
+#ifdef OSAPI_USE_OS_SEM
+#include <errno.h>
+
+typedef struct os_sem_s 
+{
+  sem_t sem;
+  pthread_mutex_t mutex;
+   BOOL sem_is_mutex;
+} os_sem_t;
+#endif /* OSAPI_USE_OS_SEM */
+
+#define OSAPI_SEM_HISTORY_SIZE 8
+
+
+#define SEM_DELETED 0x00000001
+#define SEM_FLUSHED 0x00000002
+#define SEM_BINARY  0x00000004
+#define SEM_COUNTING    0x00000008
+#define SEM_MUTEX   0x00000010
+#define SEM_Q_FIFO  0x00000020
+#define SEM_Q_PRIO  0x00000040
+#define SEM_DEL_SAFE    0x00000080
+#define SEM_INV_SAFE    0x00000100
+
+pthread_mutex_t sem_list_lock = PTHREAD_MUTEX_INITIALIZER;
+osapi_sem_t *sem_list_head = NULL;
+
+#if defined ( STACKING_PACKAGE)
+extern char *atp_dump_filename;
+extern void osapiLogSingleStackTrace( uchar8 *fileName, uint32 pid);
+extern RC_t hapiBroadDrivPrintFileStart( uchar8 *fileName,  BOOL appendToFile);
+extern void hapiBroadDrivPrintFileStop();
+extern  BOOL atpDebug;
+#endif
+
+#ifndef OSAPI_USE_OS_SEM
+static void osapiSemaHistoryRecord (osapi_sem_t * sem,  BOOL give,
+                                    void *caller)
+{
+  osapiSemHistory_t *ent;
+
+  sem->historyIndex++;
+
+  sem->historyIndex %= OSAPI_SEM_HISTORY_SIZE;
+
+  ent = &sem->history[sem->historyIndex];
+
+  ent->caller = caller;
+
+  ent->time_stamp = osapiUpTimeMillisecondsGet();
+
+  if ( TRUE == give)
+  {
+    ent->give = 1;
+    sem->holdTime = 0; 
+    sem->blocked = 0;
+  } 
+  else
+  {
+    ent->give = 0;
+    /*
+     * Record the last take time. We do not record the time a task waits for a semaphore.
+     * Most tasks use semaphores for event signaling and they dont count as semaphores
+     * that are potentially blocked out.
+     */
+    sem->holdTime = ent->time_stamp;
+  }
+}
+#endif /* !OSAPI_USE_OS_SEM */
+
+ BOOL osapiSemaIsUsed (osapi_sem_t * sem)
+{
+  if (sem->history[sem->historyIndex].caller !=  NULLPTR)
+  {
+    return  TRUE;
+  }
+  return  FALSE;
+}
+
+#ifndef OSAPI_USE_OS_SEM
+static uint32 osapiSemaNameSizeCompute ( char8 * name,  int32 inst)
+{
+  if (inst != 0)
+  {
+    return strlen (name) + 9;
+  }
+  return strlen (name) + 1;
+}
+
+static void osapiSemaNameSet (osapi_sem_t * sem,  char8 * name,  int32 inst,
+                              uint32 len)
+{
+  if (inst != 0)
+  {
+    osapiSnprintf (sem->name, len, "%s:%d", name, inst);
+  }
+  else
+  {
+    osapiStrncpySafe (sem->name, name, len);
+  }
+}
+#endif /* !OSAPI_USE_OS_SEM */
+
+/**************************************************************************
+ *
+ * @purpose  Create a binary Semaphore
+ *
+ * @param    name @b{(input)}           name of the semaphore
+ * @param    inst @b{(input)}           optional instance of semaphore
+ *                                      value = 0 to ignore
+ * @param    options @b{(input)}        queueing style - either Priority style or FIFO style
+ * @param    initialState @b{(input)}   FULL(available) or EMPTY (not
+   available)
+ *
+ * @returns  ptr to the semaphore or NULL if memory cannot be allocated
+ *
+ * @comments    none.
+ *
+ * @end
+ *
+ *************************************************************************/
+void *osapiSemaBCreateTrack ( char8 * name,  int32 inst,  int32 options,
+                             OSAPI_SEM_B_STATE initialState)
+{
+#ifdef OSAPI_USE_OS_SEM
+  os_sem_t  *sema;
+  unsigned int count;
+  int rv;
+
+  do 
+  {
+    sema = osapiMalloc ( OSAPI_COMPONENT_ID, sizeof (os_sem_t));
+    if (0 == sema)
+    {
+      break;
+    }
+    sema->sem_is_mutex =  FALSE;
+    if (initialState == OSAPI_SEM_EMPTY)
+    {
+      count = 0;
+    } else
+    { 
+      count = 1;
+    }
+    rv = sem_init (&sema->sem, 0, count);
+    if (rv < 0)
+    {
+      osapiFree ( OSAPI_COMPONENT_ID, sema);
+      sema = 0;
+      break; 
+    }
+   
+  } while (0);
+
+  return sema;
+#else
+  uint32 q_options;
+  osapi_sem_t *newSem;
+  uint32 len;
+
+  len = osapiSemaNameSizeCompute (name, inst);
+  newSem = osapiMalloc ( OSAPI_COMPONENT_ID, sizeof (*newSem) + len + 1);
+  if (newSem == NULL)
+  {
+    return newSem;
+  }
+
+  pthread_mutex_init (&(newSem->lock), (pthread_mutexattr_t *) NULL);
+
+  /* Do the options remapping */
+  if ((options & OSAPI_SEM_Q_FIFO) != 0)
+  {
+    newSem->flags |= SEM_Q_FIFO;
+    q_options = WAITQ_FIFO;
+  }
+  else                          /* if ((options & OSAPI_SEM_Q_PRIORITY) != 0) */
+  {
+    newSem->flags |= SEM_Q_PRIO;
+    q_options = WAITQ_PRIO;
+  }
+  if ((options & OSAPI_SEM_DELETE_SAFE) != 0)
+  {
+    /* invalid option */
+    osapiFree ( OSAPI_COMPONENT_ID, newSem);
+    return NULL;
+  }
+  if ((options & OSAPI_SEM_INVERSION_SAFE) != 0)
+  {
+    /* invalid option */
+    osapiFree ( OSAPI_COMPONENT_ID, newSem);
+    return NULL;
+  }
+  newSem->flags |= SEM_BINARY;
+
+  if(initialState == OSAPI_SEM_EMPTY)
+  {
+    /* osapiSemaHistoryRecord (newSem,  FALSE, __FP_CALLER__); */
+    newSem->init_count = 0;
+  }
+  else
+  {
+    /* osapiSemaHistoryRecord (newSem,  TRUE, __FP_CALLER__); */
+    newSem->init_count = 1;
+  }
+  
+  newSem->cur_count = newSem->init_count;
+  newSem->depth = 0;
+  newSem->blocked = 0;
+
+  newSem->owner = (osapi_task_t *) NULL;
+  newSem->last_owner = (osapi_task_t *) NULL;
+  newSem->num_waiting = 0;
+  osapiSemaNameSet (newSem, name, inst, len);
+
+  osapi_waitq_create (&(newSem->queue), &(newSem->lock), q_options);
+
+  pthread_mutex_lock (&sem_list_lock);
+
+  if (sem_list_head != NULL)
+  {
+    sem_list_head->chain_prev = newSem;
+  }
+  newSem->chain_next = sem_list_head;
+  sem_list_head = newSem;
+  newSem->chain_prev = NULL;
+
+  pthread_mutex_unlock (&sem_list_lock);
+
+  return (void *) newSem;
+#endif /* OSAPI_USE_OS_SEM */
+}
+
+/**************************************************************************
+ *
+ * @purpose  create a Counting Semaphore
+ *
+ * @param    name @b{(input)}           name of the semaphore
+ * @param    inst @b{(input)}           optional instance of semaphore
+ *                                      value = 0 to ignore
+ * @param    options @b{(input)}        queueing style
+ *                                      Priority style or FIFO style
+ * @param    initialCount @b{(input)}   initialized to the specified initial count
+ *
+ * @returns  ptr to the semaphore or NULL if memory cannot be allocated
+ *
+ * @comments    none.
+ *
+ * @end
+ *
+ *************************************************************************/
+void *osapiSemaCCreateTrack ( char8 * name,  int32 inst,  int32 options,
+                              int32 initialCount)
+{
+#ifdef OSAPI_USE_OS_SEM
+  os_sem_t  *sema;
+  unsigned int count;
+  int rv;
+
+  do 
+  {
+    sema = osapiMalloc ( OSAPI_COMPONENT_ID, sizeof (os_sem_t));
+    if (0 == sema)
+    {
+      break;
+    }
+    sema->sem_is_mutex =  FALSE;
+    count = initialCount;
+
+    rv = sem_init (&sema->sem, 0, count);
+    if (rv < 0)
+    {
+      osapiFree ( OSAPI_COMPONENT_ID, sema);
+      sema = 0;
+      break; 
+    }
+   
+  } while (0);
+
+  return sema;
+#else
+  uint32 q_options;
+  osapi_sem_t *newSem;
+  uint32 len;
+
+  len = osapiSemaNameSizeCompute (name, inst);
+  newSem = osapiMalloc ( OSAPI_COMPONENT_ID, sizeof (*newSem) + len + 1);
+  if (newSem == NULL)
+  {
+    return newSem;
+  }
+
+  pthread_mutex_init (&(newSem->lock), (pthread_mutexattr_t *) NULL);
+
+  /* Do the options remapping */
+  if ((options & OSAPI_SEM_Q_FIFO) != 0)
+  {
+    newSem->flags |= SEM_Q_FIFO;
+    q_options = WAITQ_FIFO;
+  }
+  else                          /* if ((options & OSAPI_SEM_Q_PRIORITY) != 0) */
+  {
+    newSem->flags |= SEM_Q_PRIO;
+    q_options = WAITQ_PRIO;
+  }
+  if ((options & OSAPI_SEM_DELETE_SAFE) != 0)
+  {
+    /* invalid option */
+    osapiFree ( OSAPI_COMPONENT_ID, newSem);
+    return NULL;
+  }
+  if ((options & OSAPI_SEM_INVERSION_SAFE) != 0)
+  {
+    /* invalid option */
+    osapiFree ( OSAPI_COMPONENT_ID, newSem);
+    return NULL;
+  }
+
+  newSem->flags |= SEM_COUNTING;
+
+  newSem->init_count = initialCount;
+  newSem->cur_count = newSem->init_count;
+  newSem->depth = 0;
+  newSem->blocked = 0;
+
+  newSem->owner = (osapi_task_t *) NULL;
+  newSem->last_owner = (osapi_task_t *) NULL;
+  newSem->num_waiting = 0;
+  osapiSemaNameSet (newSem, name, inst, len);
+
+  osapi_waitq_create (&(newSem->queue), &(newSem->lock), q_options);
+
+  pthread_mutex_lock (&sem_list_lock);
+
+  if (sem_list_head != NULL)
+  {
+    sem_list_head->chain_prev = newSem;
+  }
+  newSem->chain_next = sem_list_head;
+  sem_list_head = newSem;
+  newSem->chain_prev = NULL;
+
+  pthread_mutex_unlock (&sem_list_lock);
+
+  return (void *) newSem;
+#endif /* OSAPI_USE_OS_SEM */
+}
+
+/**************************************************************************
+ *
+ * @purpose  create a Mutual Exclusion Semaphore
+ *
+ * @param    name @b{(input)}           name of the semaphore
+ * @param    inst @b{(input)}           optional instance of semaphore
+ *                                      value = 0 to ignore
+ * @param    options @b{(input)}        queueing style
+ *                                      Priority style or FIFO style
+ *
+ * @returns  ptr to the semaphore or NULL if memory cannot be allocated
+ *
+ * @comments    none.
+ *
+ * @end
+ *
+ *************************************************************************/
+void *osapiSemaMCreateTrack ( char8 * name,  int32 inst,  int32 options)
+{
+#ifdef OSAPI_USE_OS_SEM
+  os_sem_t  *sema;
+  pthread_mutexattr_t attr;
+  int rv;
+
+  do 
+  {
+    sema = osapiMalloc ( OSAPI_COMPONENT_ID, sizeof (os_sem_t));
+    if (0 == sema)
+    {
+      break;
+    }
+    sema->sem_is_mutex =  TRUE;
+
+    pthread_mutexattr_init (&attr);
+    pthread_mutexattr_settype (&attr, PTHREAD_MUTEX_RECURSIVE);
+
+    rv = pthread_mutex_init (&sema->mutex, &attr);
+    if (rv != 0)
+{
+      osapiFree ( OSAPI_COMPONENT_ID, sema);
+      sema = 0;
+      break; 
+    }
+   
+  } while (0);
+
+  return sema;
+#else
+  uint32 q_options;
+  osapi_sem_t *newSem;
+  uint32 len;
+
+  len = osapiSemaNameSizeCompute (name, inst);
+  newSem = osapiMalloc ( OSAPI_COMPONENT_ID, sizeof (*newSem) + len + 1);
+  if (newSem == NULL)
+  {
+    return newSem;
+  }
+
+  pthread_mutex_init (&(newSem->lock), (pthread_mutexattr_t *) NULL);
+
+  /* Do the options remapping */
+  if ((options & OSAPI_SEM_Q_FIFO) != 0)
+  {
+    newSem->flags |= SEM_Q_FIFO;
+    q_options = WAITQ_FIFO;
+  }
+  else                          /* if ((options & OSAPI_SEM_Q_PRIORITY) != 0) */
+  {
+    newSem->flags |= SEM_Q_PRIO;
+    q_options = WAITQ_PRIO;
+  }
+  if ((options & OSAPI_SEM_DELETE_SAFE) != 0)
+  {
+    newSem->flags |= SEM_DEL_SAFE;
+  }
+  if ((options & OSAPI_SEM_INVERSION_SAFE) != 0)
+  {
+    newSem->flags |= SEM_INV_SAFE;
+  }
+
+  newSem->flags |= SEM_MUTEX;
+
+  newSem->init_count = 1;
+  newSem->cur_count = newSem->init_count;
+  newSem->depth = 0;
+  newSem->blocked = 0;
+
+
+  newSem->owner = (osapi_task_t *) NULL;
+  newSem->last_owner = (osapi_task_t *) NULL;
+  newSem->num_waiting = 0;
+  osapiSemaNameSet (newSem, name, inst, len);
+
+  osapi_waitq_create (&(newSem->queue), &(newSem->lock), q_options);
+
+  pthread_mutex_lock (&sem_list_lock);
+
+  if (sem_list_head != NULL)
+  {
+    sem_list_head->chain_prev = newSem;
+  }
+  newSem->chain_next = sem_list_head;
+  sem_list_head = newSem;
+  newSem->chain_prev = NULL;
+
+  pthread_mutex_unlock (&sem_list_lock);
+
+  return (void *) newSem;
+#endif /* OSAPI_USE_OS_SEM */
+}
+
+/**************************************************************************
+ *
+ * @purpose  Delete a Semaphore
+ *
+ * @param    SemID @b{(input)}   ID of the semaphore to delete
+ *
+ * @returns  OK, or error semaphore is invalid
+ *
+ * @comments    none.
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t osapiSemaDelete (void *sem)
+{
+#ifdef OSAPI_USE_OS_SEM
+  os_sem_t  *sema = sem;
+  int rv;
+
+  if ( TRUE == sema->sem_is_mutex)
+  {
+    rv = pthread_mutex_destroy (&sema->mutex);
+  } else
+  {
+    rv = sem_destroy (&sema->sem);
+  }
+  if (rv != 0)
+{
+    return  FAILURE;
+  }
+  return  SUCCESS;
+#else
+  osapi_sem_t *osapiSem = (osapi_sem_t *) sem;
+
+  pthread_mutex_lock (&(osapiSem->lock));
+
+  /* need to account for blocked tasks */
+  /*  -- mark semaphore as deleted     */
+  /*  -- mark semaphore as flushed     */
+  /*  -- flush wait queue              */
+  /*  -- delete wait queue             */
+
+  osapiSem->flags |= (SEM_DELETED | SEM_FLUSHED);
+
+  osapi_waitq_flush (&(osapiSem->queue));
+
+  osapi_waitq_destroy (&(osapiSem->queue));
+
+  pthread_mutex_unlock (&(osapiSem->lock));
+
+  pthread_mutex_destroy (&(osapiSem->lock));
+
+  pthread_mutex_lock (&sem_list_lock);
+
+  if (osapiSem->chain_next != NULL)
+  {
+    osapiSem->chain_next->chain_prev = osapiSem->chain_prev;
+  }
+
+  if (osapiSem->chain_prev != NULL)
+  {
+    osapiSem->chain_prev->chain_next = osapiSem->chain_next;
+  }
+  else
+    /* must be head of list */
+  {
+    sem_list_head = osapiSem->chain_next;
+  }
+
+  pthread_mutex_unlock (&sem_list_lock);
+
+  osapiFree ( OSAPI_COMPONENT_ID, osapiSem);
+
+  return  SUCCESS;
+#endif /* OSAPI_USE_OS_SEM */
+}
+
+/**************************************************************************
+ *
+ * @purpose  Unblock any and all tasks waiting on the semaphore
+ *
+ * @param    SemID @b{(input)}   ID of the semaphore
+ *
+ * @returns  OK, or error semaphore is invalid
+ *
+ * @comments    none.
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t osapiSemaFlush (void *sem)
+{
+  osapi_sem_t *osapiSem = (osapi_sem_t *) sem;
+
+  pthread_mutex_lock (&(osapiSem->lock));
+
+  /* need to account for blocked tasks */
+  /*  -- mark semaphore as flushed     */
+  /*  -- flush wait queue              */
+  /*  -- unmark semaphore as flushed   */
+
+  osapiSem->flags |= SEM_FLUSHED;
+
+  osapi_waitq_flush (&(osapiSem->queue));
+
+  osapiSem->num_waiting = 0;
+  osapiSem->flags &= ~SEM_FLUSHED;
+
+  pthread_mutex_unlock (&(osapiSem->lock));
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+ *
+ * @purpose  Give a Semaphore
+ *
+ * @param    SemID @b{(input)}   ID of the semaphore to release
+ *
+ * @returns  OK, or error semaphore is invalid
+ *
+ * @comments    none.
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t osapiSemaGive (void *sem)
+{
+#ifdef OSAPI_USE_OS_SEM
+  os_sem_t  *sema;
+  int rv;
+
+  if (0 == sem)
+  {
+    return  FAILURE;
+  }
+
+  sema = sem;
+  if ( TRUE == sema->sem_is_mutex)
+  {
+    rv = pthread_mutex_unlock (&sema->mutex);
+  } else
+  {
+    rv = sem_post (&sema->sem);
+  }
+
+  if (rv != 0)
+{
+    return  FAILURE;
+  }
+
+  return  SUCCESS;
+#else
+  RC_t rc =  SUCCESS;
+  osapi_sem_t *osapiSem = (osapi_sem_t *) sem;
+
+  if (osapiSem ==  NULL)
+  {
+    return  FAILURE;
+  }
+
+  pthread_mutex_lock (&(osapiSem->lock));
+
+  if ((osapiSem->flags & (SEM_DELETED | SEM_FLUSHED)) == 0)
+  {
+    if (osapiSem->depth == 0)
+    {
+      if ((((osapiSem->flags & SEM_COUNTING) != 0)
+           || (osapiSem->cur_count != 1))
+          && (((osapiSem->flags & SEM_MUTEX) == 0)
+              || (osapiSem->owner == (void *) osapiTaskIdSelf ())))
+      {
+        if (++osapiSem->cur_count == 1)
+        {
+          osapiSem->last_owner = (void *) osapiTaskIdSelf ();
+          osapi_waitq_dequeue (&(osapiSem->queue));
+          osapiSemaHistoryRecord (osapiSem,  TRUE, __FP_CALLER__);
+        }
+
+        osapiSem->curr_owner = NULL;
+        if ((osapiSem->flags & SEM_MUTEX) != 0)
+        {
+          osapiSem->owner = NULL;
+
+          if ((osapiSem->flags & SEM_DEL_SAFE) != 0)
+          {
+            pthread_setcancelstate (PTHREAD_CANCEL_ENABLE, NULL);
+          }
+        }
+      }
+      else
+      {
+        rc =  FAILURE;
+      }
+    }
+    else
+    {
+      if (((osapiSem->flags & SEM_MUTEX) == 0)
+          || (osapiSem->owner != (void *) osapiTaskIdSelf ()))
+      {
+        rc =  FAILURE;
+      }
+      else
+      {
+        osapiSem->depth--;
+      }
+    }
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+
+  pthread_mutex_unlock (&(osapiSem->lock));
+
+  return rc;
+#endif /* OSAPI_USE_OS_SEM */
+}
+
+#ifndef OSAPI_USE_OS_SEM
+/*********************************************************************
+* @purpose Callback to check if the semaphore can be dequeued
+*
+* @param sem @b{(input)}   ID of the requested semaphore
+*
+* @notes none
+*
+* @end
+*********************************************************************/
+static int osapi_sem_waitq_remove_check (void *sem)
+{
+  osapi_sem_t *osapiSem = (osapi_sem_t *) sem;
+
+  if (osapiSem->cur_count > 0)
+  {
+    if ((osapiSem->num_waiting < 2) ||
+        (osapiSem->last_owner != (void *) osapiTaskIdSelf ()))
+    {
+      return WAITQ_REMOVE_OK;
+    }
+  }
+
+  if ((osapiSem->flags & SEM_FLUSHED) != 0)
+  {
+    return WAITQ_REMOVE_OK;
+  }
+
+  return ~WAITQ_REMOVE_OK;
+}
+#endif /* !OSAPI_USE_OS_SEM */
+
+/**************************************************************************
+ *
+ * @purpose  Take a Semaphore
+ *
+ * @param    SemID @b{(input)}   ID of the requested semaphore
+ * @param    timeout @b{(input)}  time to wait in milliseconds, forever (-1), or no wait (0)
+ *
+ * @returns  OK, or error if timeout or if semaphore does not exist
+ *
+ * @comments    none.
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t osapiSemaTake (void *sem,  int32 timeout)
+{
+#ifdef OSAPI_USE_OS_SEM
+  os_sem_t  *sema;
+  int rv;
+
+  if (0 == sem)
+  {
+    return  FAILURE;
+  }
+
+  sema = sem;
+  if ( TRUE == sema->sem_is_mutex)
+  {
+    if (timeout ==  WAIT_FOREVER)
+    {
+      rv = pthread_mutex_lock(&sema->mutex);
+    } else if (timeout ==  NO_WAIT) 
+    {
+      rv = pthread_mutex_trylock(&sema->mutex);
+    } else 
+    {
+      struct timespec wait;
+      (void) clock_gettime (CLOCK_REALTIME, &wait);
+      wait.tv_sec += timeout / 1000;
+      wait.tv_nsec += (timeout % 1000) * 1000000;
+      if (wait.tv_nsec >= 1000000000)
+      {
+        wait.tv_sec++;
+        wait.tv_nsec -= 1000000000;
+      }
+      rv = pthread_mutex_timedlock (&sema->mutex, &wait);
+    }
+  } else
+  {
+    if (timeout ==  WAIT_FOREVER)
+    {
+      do 
+      {
+        rv = sem_wait (&sema->sem);
+        if (rv == 0) break;
+        if ((rv < 0) && (errno != EINTR)) break;
+      } while (rv < 0);
+    } else if (timeout ==  NO_WAIT) 
+    {
+      do 
+      {
+        rv = sem_trywait (&sema->sem);
+        if (rv == 0) break;
+        if ((rv < 0) && (errno != EINTR)) break;
+      } while (rv < 0);
+    } else 
+    {
+      struct timespec wait;
+      (void) clock_gettime (CLOCK_REALTIME, &wait);
+      wait.tv_sec += timeout / 1000;
+      wait.tv_nsec += (timeout % 1000) * 1000000;
+      if (wait.tv_nsec >= 1000000000)
+      {
+        wait.tv_sec++;
+        wait.tv_nsec -= 1000000000;
+      }
+      do 
+      {
+        rv = sem_timedwait (&sema->sem, &wait);
+        if (rv == 0) break;
+        if ((rv < 0) && (errno != EINTR)) break;
+      } while (rv < 0);
+    }
+  }
+  if (rv != 0)
+{
+    return  FAILURE;
+  }
+
+  return  SUCCESS;
+#else
+
+  RC_t rc =  SUCCESS;
+  osapi_sem_t *osapiSem = (osapi_sem_t *) sem;
+
+  if (osapiSem ==  NULL)
+  {
+    return  FAILURE;
+  }
+
+  pthread_mutex_lock (&(osapiSem->lock));
+
+  if ((osapiSem->flags & (SEM_DELETED | SEM_FLUSHED)) == 0)
+  {
+    if (((osapiSem->flags & SEM_MUTEX) == 0)
+        || (osapiSem->owner != (void *) osapiTaskIdSelf ()))
+    {
+      while ((osapiSem->cur_count == 0) ||
+             ((osapiSem->last_owner == (void *) osapiTaskIdSelf ()) &&
+              (osapiSem->num_waiting != 0)))
+      {
+        osapiSem->num_waiting++;
+        rc = osapi_waitq_enqueue (&(osapiSem->queue), timeout,
+                                  osapi_sem_waitq_remove_check,
+                                  (void *) osapiSem, __FP_CALLER__);
+        osapiSem->num_waiting--;
+
+        if ((rc !=  SUCCESS) || ((osapiSem->flags & SEM_FLUSHED) != 0))
+        {
+          rc =  FAILURE;
+          break;
+        }
+      }
+      osapiSemaHistoryRecord (osapiSem,  FALSE, __FP_CALLER__);
+
+      if ((rc ==  SUCCESS) &&
+          ((osapiSem->num_waiting == 0) ||
+           (osapiSem->last_owner != (void *) osapiTaskIdSelf ())))
+      {
+        osapiSem->cur_count--;
+        osapiSem->curr_owner = (void *) osapiTaskIdSelf ();
+        osapiSem->last_owner = NULL;
+
+        if ((osapiSem->flags & SEM_MUTEX) != 0)
+        {
+          osapiSem->owner = (void *) osapiTaskIdSelf ();
+
+          if ((osapiSem->flags & SEM_DEL_SAFE) != 0)
+          {
+            pthread_setcancelstate (PTHREAD_CANCEL_DISABLE, NULL);
+          }
+        }
+      }
+    }
+    else
+    {
+      osapiSem->depth++;
+    }
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+
+  pthread_mutex_unlock (&(osapiSem->lock));
+
+  return rc;
+#endif /* OSAPI_USE_OS_SEM */
+}
+
+/*********************************************************************
+* @purpose  Initializes OSAPI Semaphore Library
+*
+* @returns   SUCCESS
+*
+* @returns none
+*
+* @end
+*
+*********************************************************************/
+RC_t osapiSemaInit (void)
+{
+  return  SUCCESS;
+}
+
+/**************************************************************************
+ *
+ * @purpose  Print information about semaphores
+ *
+ * @param    showHistory  - Print history data of semaphore
+ * @param    hideInactive - Print even if the semaphore is not used even once
+ * @param    query - specific semaphore for printing information about
+ * @param    only_blocked - Show only blocked tasks
+ *
+ * @returns  none
+ *
+ * @end
+ *
+ *************************************************************************/
+#define OSAPI_SEM_HANG_TIME (10 * 1000)
+
diff --git a/src/sonic-pac/fpinfra/osapi/osapi_support.c b/src/sonic-pac/fpinfra/osapi/osapi_support.c
new file mode 100755
index 00000000000..e508e5f8ec9
--- /dev/null
+++ b/src/sonic-pac/fpinfra/osapi/osapi_support.c
@@ -0,0 +1,927 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <sys/types.h>
+#include <sys/select.h>
+#include <sys/ioctl.h>
+#include <sys/file.h>
+#include <arpa/inet.h>
+#include "defaultconfig.h"
+#include "pacinfra_common.h"
+#include "osapi.h"
+#include "log.h"
+#include "osapi_support.h"
+
+#ifdef  RLIM_PACKAGE
+#include "rlim_api.h"
+#endif
+
+#ifdef PC_LINUX_HOST
+#include <linux/types.h>
+#endif
+#include <linux/icmpv6.h>  /* after socket.h */
+
+#define ERROR (-1)
+
+#ifdef PC_LINUX_HOST
+#define  SETSOCKOPT_ERROR  SUCCESS
+#else
+#define  SETSOCKOPT_ERROR  FAILURE
+#endif
+
+extern int osapi_proc_set(const char *path, const char *value);
+
+/**************************************************************************
+*
+* @purpose  map  AF to AF
+*
+* @param    l7af          AF type
+*
+* @returns  stack AF
+*
+* @comments static use only. here since osapi callers may not have access
+* to AF_ values of stack. Values are NOT the same.
+*
+* @end
+*
+*************************************************************************/
+static uint32 osapiFromL7AF(uint32 l7af)
+{
+  switch(l7af)
+  {
+  case  AF_INET:
+      return AF_INET;
+  case  AF_INET6:
+      return AF_INET6;
+  default:
+      break;
+  }
+  return 0;
+}
+
+/**************************************************************************
+*
+* @purpose  map AF to L7AF
+*
+* @param    af         AF type
+*
+* @returns   AF
+*
+* @comments static use only
+*
+* @end
+*
+*************************************************************************/
+static uint32 osapiToL7AF(uint32 af)
+{
+  switch(af)
+  {
+  case AF_INET:
+      return  AF_INET;
+  case AF_INET6:
+      return  AF_INET6;
+  default:
+      break;
+  }
+  return 0;
+}
+
+/**************************************************************************
+*
+* @purpose  map  L7 socket type to stack socket type
+*
+* @param    l7_stype     L7 socket type
+*
+* @returns  stack socket type
+*
+* @comments static use only
+*
+* @end
+*************************************************************************/
+static uint32 osapiFromL7SockType(uint32 l7_stype)
+{
+  switch(l7_stype)
+  {
+  case  SOCK_RAW:
+      return SOCK_RAW;
+  case  SOCK_DGRAM:
+      return SOCK_DGRAM;
+  case  SOCK_STREAM:
+      return SOCK_STREAM;
+  default:
+      break;
+  }
+  return 0;
+}
+
+/**************************************************************************
+*
+* @purpose  Create a socket
+*
+* @param    domain   @b{(input)}   address family (for example, AF_INET)
+* @param    type     @b{(input)}   SOCK_STREAM, SOCK_DGRAM, or SOCK_RAW
+* @param    protocol @b{(input)}   protocol to be used
+* @param    descriptor      @b{(input)}   ptr to socket descriptor
+*
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @end
+*
+*************************************************************************/
+uint32 osapiSocketCreate(uint32 domain,uint32 type,uint32 protocol, int32 *descriptor)
+{
+   int32 fd = -1;
+
+  domain = osapiFromL7AF(domain);
+  type = osapiFromL7SockType(type);
+
+  fd = socket(domain,type,protocol);
+  if (fd == ERROR)
+  {
+    return  ERROR;
+  }
+  *descriptor = fd;
+  return  SUCCESS;
+}
+
+
+/**************************************************************************
+*
+* @purpose  Bind a name to a socket
+*
+* @param    socketDescriptor  @b{(input)} socket descriptor
+* @param    family            @b{(input)} Address Family (for example, AF_INET)
+* @param    bindIP            @b{(input)} IP Address to bind with socket
+* @param    port              @b{(input)} Port
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @end
+*
+*************************************************************************/
+
+RC_t osapiSocketBind(uint32 socketDescriptor,  sockaddr_t *saddr, uint32 s_len)
+{
+  /* os sockaddr has (ushort sa_family), l7_sockaddr has (u8)sa_len/(u8)sa_family */
+   sockaddr_union_t c_saddr;
+  struct sockaddr *os_saddr = (struct sockaddr *)&c_saddr;
+
+
+  if(s_len > sizeof(c_saddr)) return  FAILURE;
+  memcpy(&c_saddr, saddr, s_len);
+  os_saddr->sa_family = ( ushort16)osapiFromL7AF(saddr->sa_family);
+
+  if ( bind(socketDescriptor,os_saddr, s_len) == ERROR)
+    return  FAILURE;
+  else
+    return  SUCCESS;
+}
+
+/**************************************************************************
+*
+* @purpose  Get peer name
+*
+* @param    socketDescriptor  @b{(input)} socket descriptor
+* @param    saddr             @b{(output)} remote address
+* @param    s_len             @b{(inout)} remote address length
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @end
+*
+*************************************************************************/
+RC_t osapiGetpeername(uint32 socketDescriptor,
+                          sockaddr_t *saddr, uint32 *s_len)
+{
+  /* sa_len/sa_family vs (u16)sa_family */
+  struct sockaddr *os_saddr = (struct sockaddr *)saddr;
+
+  if(getpeername(socketDescriptor, (struct sockaddr *)saddr, (socklen_t *)s_len) < 0)
+  {
+     LOGF( LOG_SEVERITY_DEBUG,
+            "Unable to get the peer info for socket descriptor %d. Error = %s.",
+            socketDescriptor, strerror(errno));
+    return  FAILURE;
+  }
+  saddr->sa_family = ( uchar8)osapiToL7AF(os_saddr->sa_family);
+  saddr->sa_len = ( uchar8)(*s_len);
+  return  SUCCESS;
+}
+
+/**************************************************************************
+*
+* @purpose  Receive data from a socket
+*
+* @param      socketDescriptor  @b{(input)} socket to receive from
+* @param      buf               @b{(input)} pointer to data buffer
+* @param      length            @b{(input)} length of buffer
+* @param      flag              @b{(input)} flags to underlying protocols
+* @param      family            @b{(output)} Ptr to Address Family for received data
+* @param    port              @b{(output)} Ptr to Port
+* @param    ipAddr            @b{(output)} Ptr to IP Address
+* @param    bytesRcvd         @b{(output)} Ptr to number of bytes received
+*
+* @returns   SUCCESS
+* @returns   ERROR
+*
+* @end
+*
+*************************************************************************/
+RC_t osapiSocketRecvfrom(uint32 socketDescriptor,  uchar8 *buf, uint32 length,
+                              uint32 flag,  sockaddr_t *from, uint32 *from_len,
+                              uint32 *bytesRcvd)
+{
+   int32 count;
+  /* sa_len/sa_family vs (u16)sa_family */
+  struct sockaddr *os_saddr = (struct sockaddr *)from;
+
+  do 
+  {
+    count= recvfrom(socketDescriptor, buf, length,flag, (struct sockaddr *)from,from_len);
+  } while ((0 > count) && (EINTR == errno));
+
+  if (count < 0)
+  {
+    return  ERROR;
+  }
+
+  *bytesRcvd=count;
+  from->sa_family = ( uchar8)osapiToL7AF(os_saddr->sa_family);
+  from->sa_len = *from_len;
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+*
+* @purpose  Set socket options
+*
+* @param    targetSocket @b{(input)} socket to receive from
+* @param    level        @b{(input)} protocol level of option
+* @param    optname      @b{(input)} option name
+* @param    optval       @b{(input)} pointer to option value
+* @param    optlen       @b{(input)} option length
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @end
+*
+*************************************************************************/
+RC_t osapiSetsockopt(uint32 targetSocket,uint32 level,uint32 optname,
+                         uchar8 *optval,uint32 optlen)
+{
+  /* converts to SOL_SOCKET, IPPROT_xxx vals are IETF defined and dont need
+     conversion
+  */
+#if defined( IPV6_PACKAGE) || defined( IPV6_MGMT_PACKAGE)
+  uint32 i;
+   int32  sd = -1;
+  struct  ip_mreq6_s *l7mreq6 = (struct  ip_mreq6_s *)optval;
+  struct ipv6_mreq     mreq6;
+  struct ifreq         ifr;
+  int realval;
+#endif
+
+  if(level ==  SOL_SOCKET)
+  {
+    level = SOL_SOCKET;
+
+     /* convert optname */
+     switch(optname)
+     {
+     case  SO_REUSEADDR:
+        optname = SO_REUSEADDR;
+        break;
+     case  SO_BROADCAST:
+        optname = SO_BROADCAST;
+        break;
+/* tbd jpp
+     case  SO_REUSEPORT:
+        optname = SO_REUSEPORT;
+        break;
+*/
+     case  SO_DONTROUTE:
+        optname = SO_DONTROUTE;
+        break;
+     case  SO_SNDBUF:
+       {
+    FILE *max_wmem_fp;
+    char buf[11];
+    int cur_max_wmem = 0, requested_wmem;
+
+    max_wmem_fp = fopen("/proc/sys/net/core/wmem_max", "r");
+    if (max_wmem_fp)
+    {
+      requested_wmem = *(int *)optval;
+      if(0 > fscanf(max_wmem_fp, "%d", &cur_max_wmem)){}
+      fclose(max_wmem_fp);
+      if (requested_wmem > cur_max_wmem)
+      {
+        snprintf(buf, 10, "%d", requested_wmem);
+        osapi_proc_set("/proc/sys/net/core/wmem_max", buf);
+      }
+    }
+        optname = SO_SNDBUF;
+
+        break;
+       }
+     case  SO_RCVBUF:
+       {
+    FILE *max_rmem_fp;
+    char buf[11];
+    int cur_max_rmem = 0, requested_rmem;
+
+    max_rmem_fp = fopen("/proc/sys/net/core/rmem_max", "r");
+    if (max_rmem_fp)
+    {
+      requested_rmem = *(int *)optval;
+      if(0 > fscanf(max_rmem_fp, "%d", &cur_max_rmem)){}
+      fclose(max_rmem_fp);
+      if (requested_rmem > cur_max_rmem) {
+        snprintf(buf, 10, "%d", requested_rmem);
+        osapi_proc_set("/proc/sys/net/core/rmem_max", buf);
+      }
+    }
+        optname = SO_RCVBUF;
+        break;
+       }
+     case  SO_RCVTIMEO:
+        optname = SO_RCVTIMEO;
+        break;
+     case  SO_ERROR:
+        optname = SO_ERROR;
+        break;
+     case  SO_TYPE:
+        optname = SO_TYPE;
+        break;
+     case  SO_KEEPALIVE:
+        optname = SO_KEEPALIVE;
+        break;
+     case  SO_BINDTODEVICE:
+        optname = SO_BINDTODEVICE;
+        break;
+     default:
+        return  FAILURE;
+     }
+  }
+  else
+  {
+     return  FAILURE;
+  }
+
+
+  if (setsockopt(targetSocket,level,optname,optval,optlen) == ERROR)
+    return  SETSOCKOPT_ERROR;
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+*
+* @purpose  Send a message to a socket
+*
+* @param    s         @b{(input)} socket to send
+* @param    buf       @b{(input)} pointer to data buffer
+* @param    bufLen    @b{(input)} length of buffer
+* @param    flags     @b{(input)} flags to underlying protocols
+* @param    family    @b{(input)} Address Family
+* @param  port      @b{(input)} Port
+* @param  ipAddr    @b{(input)} IP Address
+* @param  bytesSent @b{(output)} Ptr to number of bytes sent
+*
+* @returns   SUCCESS
+* @returns   ERROR
+*
+* @end
+*
+*************************************************************************/
+
+RC_t osapiSocketSendto(uint32 s, uchar8 *buf,uint32 bufLen,uint32 flags,
+                           sockaddr_t *to, uint32 to_len,
+                          uint32 *bytesSent)
+{
+   int32 count;
+   sockaddr_union_t c_saddr;
+  struct sockaddr *os_saddr = (struct sockaddr *)&c_saddr;
+
+  if(to_len > sizeof(c_saddr)) return  FAILURE;
+  memcpy(&c_saddr, to, to_len);
+  /* AF values abstracted from caller, so dont need to include world */
+  os_saddr->sa_family = ( ushort16)osapiFromL7AF(to->sa_family);
+
+  do 
+  {
+    count = sendto(s,buf,bufLen,flags,os_saddr,to_len);
+  } while ((count < 0) && (errno == EINTR));
+
+  if (count < 0)
+  {
+    return  ERROR;
+  }
+  *bytesSent = count;
+  return  SUCCESS;
+}
+
+/**************************************************************************
+*
+* @purpose  Close a socket
+*
+* @param    fd @b{(input)} socket descriptor to close
+*
+* @returns  none
+*
+* @end
+*
+*************************************************************************/
+void osapiSocketClose(uint32 fd)
+{
+  int rc = 0;
+  if ((fd < 3) || (fd > FD_SETSIZE))
+  {
+     LOGF( LOG_SEVERITY_NOTICE,
+            "Socket close passed invalid descriptor %d. Socket not closed.", fd);
+  }
+  else
+  {
+    while (((rc = close(fd)) < 0) && (errno == EINTR))
+    /* Nothing */;
+    if (rc < 0)
+    {
+       LOGF( LOG_SEVERITY_NOTICE,
+              "Socket close asserted %s for descriptor %d", strerror(errno),fd);
+    }
+  }
+}
+/**************************************************************************
+*
+* @purpose  Shutdown a socket
+*
+* @param    fd  @b{(input)} socket descriptor to close
+* @param    how @b{(input)} how to shutdown
+*
+* @returns  none
+*
+* @end
+*
+*************************************************************************/
+RC_t osapiShutdown(uint32 fd, uint32 how)
+{
+  int rc;
+
+  switch(how)
+  {
+  case  SHUT_RD:
+     how = SHUT_RD;
+     break;
+  case  SHUT_WR:
+     how = SHUT_WR;
+     break;
+  case  SHUT_RDWR:
+     how = SHUT_RDWR;
+     break;
+  default:
+     return  FAILURE;
+  }
+
+
+  rc = shutdown(fd,(int)how) ;
+  return (rc < 0)? FAILURE: SUCCESS;
+}
+
+/**************************************************************************
+*
+* @purpose      pend on a set of file descriptors
+*
+* @param        width           @b{(input)} number of bits to examine from 0
+* @param        rFds            @b{(input)} read fds
+* @param        wFds            @b{(input)} write fds
+* @param        eFds            @b{(input)} exception fds
+* @param        timeOutSec      @b{(input)} max time in sec to wait,
+*                                           NULL = forever
+* @param        timeOutMicroSec @b{(input)} time in microsec
+*
+* @returns      The number of file descriptors with activity, 0 if timed out
+*               or ERROR
+*
+* @end
+*
+*************************************************************************/
+
+ int32 osapiSelect(uint32 width, fd_set* rFds, fd_set* wFds,
+                      fd_set* eFds,  int32 timeOutSec,
+                       int32 timeOutMicroSec)
+{
+   int32 noFD;
+  struct timeval timeout;
+
+  if ((timeOutSec == 0) && (timeOutMicroSec == 0))
+  {
+    /* must pass null pointer to wait forever */
+    noFD = select(width, rFds, wFds, eFds,  NULLPTR);
+  }
+  else
+  {
+    timeout.tv_sec=timeOutSec;
+    timeout.tv_usec=timeOutMicroSec;
+
+    noFD = select(width, rFds, wFds, eFds, &timeout);
+  }
+  return noFD;
+}
+
+/**************************************************************************
+* @purpose  Read bytes from the file
+*
+* @param    fd       @b{(input)} file descriptor
+* @param    buffer   @b{(output)} ptr to buffer to read data
+* @param    maxbytes @b{(input)} no. of bytes
+*
+* @returns  The number of bytes read from file or -1 on error.
+*
+* @end
+*
+*************************************************************************/
+
+ int32 osapiRead(uint32 fd, char8* buffer,size_t maxbytes)
+{
+   int32 num;
+  num = read(fd,buffer,maxbytes);
+  return num;
+}
+
+/**************************************************************************
+* @purpose  write bytes to the file
+*
+* @param    fd        @b{(input)} file descriptor
+* @param    buffer    @b{(input)} ptr to buffer to write data
+* @param    maxbytes  @b{(input)} no. of bytes
+*
+* @returns  The number of bytes written to file or -1 on error.
+*
+* @end
+*
+*************************************************************************/
+
+ int32 osapiWrite(uint32 fd, char8* buffer,size_t maxbytes)
+{
+   int32 num;
+
+  do
+  {
+    num = write(fd,buffer,maxbytes);
+  } while ((0 > num) && (EINTR == errno));
+
+  return num;
+}
+
+
+
+/**************************************************************************
+* @purpose  Get Operating System Error Number
+*
+*
+* @returns  ERRNO set by the system.
+*
+* @end
+*
+*************************************************************************/
+extern uint32 osapiErrnoGet(void)
+{
+  return(errno);
+}
+
+/**************************************************************************
+* @purpose  Get Operating System Error String
+*
+* @returns  string corresponding to ERRNO set by the system.
+*
+* @end
+*
+*************************************************************************/
+ char8 *osapiErrStrGet(void)
+{
+  return strerror(errno);
+}
+
+/**************************************************************************
+*
+* @purpose      Initiate a connection on a socket
+*
+* @param        sockFd          @b{(input)} socket descriptor
+* @param        family          @b{(input)} Address Family (for example, AF_INET)
+* @param        ipAddr          @b{(input)} IP Address to connect with socket
+* @param        port            @b{(input)} Port
+*
+* @returns       SUCCESS      if the connection or binding succeeds
+*                FAILURE      on error
+*
+* @end
+*
+*************************************************************************/
+
+RC_t osapiConnect(uint32 sockFd, sockaddr_t *saddr, uint32 s_len)
+{
+   sockaddr_union_t c_saddr;
+  struct sockaddr *os_saddr = (struct sockaddr *)&c_saddr;
+
+  if(s_len > sizeof(c_saddr)) return  FAILURE;
+  memcpy(&c_saddr, saddr, s_len);
+  os_saddr->sa_family = ( ushort16)osapiFromL7AF(saddr->sa_family);
+
+  if (connect (sockFd, os_saddr, s_len) == ERROR)
+    return  FAILURE;
+  else
+    return  SUCCESS;
+}
+/**************************************************************************
+*
+* @purpose      Accept a connection on a socket
+*
+* @param        sockFd          @b{(input)}  socket fd
+* @param        saddr           @b{(input)}  pointer to connector's address info.
+* @param        s_len           @b{(input)}  length of connector's address info.
+* @param        descriptor      @b{(output)} socket descriptor
+*
+* @returns       SUCCESS      if the connection is accepted
+*                FAILURE      on error
+*
+* @end
+*
+*************************************************************************/
+RC_t osapiAccept(uint32 sockFd,  sockaddr_t *saddr, uint32 *s_len,
+                     int32 *descriptor)
+{
+   sockaddr_union_t c_saddr;
+  struct sockaddr *os_saddr = (struct sockaddr *)&c_saddr;
+   int32 fd;
+
+  if(*s_len > sizeof(c_saddr)) return  FAILURE;
+  memcpy(&c_saddr, saddr, *s_len);
+  os_saddr->sa_family = ( ushort16)osapiFromL7AF(saddr->sa_family);
+
+  fd = accept(sockFd, os_saddr, s_len);
+  if (fd == ERROR)
+  {
+    return  FAILURE;
+  }
+  else
+  {
+    *descriptor = fd;
+    return  SUCCESS;
+  }
+}
+
+/**************************************************************************
+*
+* @purpose      Prepare to accept connections on socket
+*
+* @param        listen_sock   @b{(input)}  FD of the listening socket
+* @param        listen_queue  @b{(input)}  connection requests that will be queued
+*                                          before further requests are refused.
+*
+* @returns       SUCCESS      on success
+*                FAILURE      on error
+*
+* @end
+*
+*************************************************************************/
+ int32 osapiListen( int32 listen_sock,  int32 listen_queue)
+{
+   int32 fd;
+
+  fd = listen(listen_sock, listen_queue);
+  if (fd == ERROR)
+  {
+    return fd;
+  }
+  else
+  {
+    return  SUCCESS;
+  }
+}
+
+/**************************************************************************
+*
+* @purpose      Set the non-blocking mode on a file (socket).
+*               The FIONBIO method says only for sockets in tornado include,
+*               but we apply it to other file types as well.
+*
+* @param        fd              file descriptor
+*               nbio            if  TRUE, non-blocking, else blocking
+*
+* @returns       SUCCESS or  FAILURE
+*
+*
+* @end
+*
+*************************************************************************/
+
+RC_t osapiSocketNonBlockingModeSet(uint32 fd,  BOOL nbio)
+{
+    int mode = (nbio ==  TRUE)?1:0;
+    int rc;
+
+    rc = ioctl(fd, FIONBIO, (void *)&mode);
+
+    return (rc< 0)?  FAILURE: SUCCESS;
+}
+
+/**************************************************************************
+*
+* @purpose      Get the non-blocking mode on a file (socket).
+*
+* @param        fd                @b{(input)}     file descriptor
+*               non_blocking_mode @b{(output)}    if  TRUE - non-blocking, else blocking
+*
+* @returns      none
+*
+*
+* @end
+*
+*************************************************************************/
+void osapiSocketNonBlockingModeGet(uint32 fd,  BOOL* non_blocking_mode)
+{
+  int flags;
+
+  flags = fcntl(fd, F_GETFL,  NULL);
+
+  if (flags & O_NONBLOCK)
+  {
+    *non_blocking_mode =  TRUE;
+  }
+  else
+  {
+    *non_blocking_mode =  FALSE;
+  }
+}
+
+/**************************************************************************
+*
+* @purpose      create IP (4/6) address from ascii string
+*
+* @param        family          address faminly
+*               str             pointer to ouput string
+*               addr            pointer to address
+*
+* @returns       SUCCESS or  FAILURE
+*
+*
+* @end
+*
+*************************************************************************/
+RC_t osapiInetPton(uint32 family,  char8 *str,  uchar8 *addr)
+{
+   int rc;
+
+   family = osapiFromL7AF(family);
+
+   if(family == AF_INET6)
+   {
+     /* This condition checks the ipv6 adress having less than or eqult to 4
+        characters in each colon part or not */
+
+     if(osapiIpv6Support(str) ==  FALSE)
+     return  FAILURE;
+   }
+
+   rc = inet_pton(family,str,addr);
+   return (rc <= 0)?  FAILURE: SUCCESS;
+}
+
+/**************************************************************************
+*
+* @purpose  It finds wheather all the string part contains 4 characters or more
+*           in between colons in IPV6 address.Since This condition is not handled
+*           in interpeak stack.(NOTE: This function checks only four characters
+*           condition only.Not any other conditions.)
+*
+*           Return true if string is contains not more than 4 characters
+*           xxxx:xxxx:xxxx:xxxx:xxxx:xxxx:xxxx:xxxx
+*
+*           Return false if string contains more than 4 characters in between colons
+*           xxxx:xxxxxx:xxxxxxx:xxxx:xxxx:xxxx:xxxx:xxxx
+*
+*           Return false if the number of colons in complete string exceeds a count of 7
+*
+*           Return false if the string ends with a colon (ABCD::)
+*
+* @param    s   @b{(input)}ipv6 string format.
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @end
+*
+*************************************************************************/
+ BOOL  osapiIpv6Support( char8 *s)
+{
+
+   uint32 index =0, count=0, searchLength = 0, final = 0, start, end, colonCount = 0;
+    char8  *ref1, *ref2;
+    BOOL   isdotForm = 0;
+
+   ref1 = ref2 = s;
+
+   /* This loop finds upto what position search shold be done.
+      to handle the dotted decimal and colon (ipv4 on ipv6) notation */
+
+   while(*ref1 != '\0')
+   {
+      if(*ref1 == ':')
+      {
+         final = index;
+         colonCount++;
+      }
+
+      if(*ref1 == '.')
+      {
+         isdotForm =  TRUE;
+         break;
+      }
+
+      if(colonCount > 7)
+      {
+        return  FALSE;
+      }
+
+
+      ref1++;
+      index++;
+   }
+
+   if(isdotForm ==  TRUE)
+   {
+      searchLength = final;
+   }
+   else
+   {
+      searchLength = index;
+   }
+
+   end = 0 ;
+   start= 0;
+
+   while( (count <= searchLength) && (*ref2 != '\0') )
+   {
+      /* It will handle the single colon case
+         if it is single quotation it will move one position forward */
+      if(*ref2 == ':')
+      {
+         end = count;
+
+         if((end-start) > 4)
+         return  FALSE;
+
+         start = count + 1;
+
+         /* It will handle the double colon case
+            if it is double colon then it should move two positions forward */
+
+
+         if( *(ref2 + 1) == ':')
+         {
+              ref2++;
+              count++;
+              start = count + 1;
+         }
+      }
+
+      ref2++;
+      count++;
+
+      /* it will handle the case like colon and dotted quotation mark
+         as weill as final 4 characters.since it wont end with colon */
+
+      if(count == searchLength)
+      {
+        if((count-start) > 4 )
+            return  FALSE;
+      }
+   }
+   return  TRUE;
+}
+
diff --git a/src/sonic-pac/fpinfra/osapi/osapi_time.c b/src/sonic-pac/fpinfra/osapi/osapi_time.c
new file mode 100755
index 00000000000..539cd8f5b62
--- /dev/null
+++ b/src/sonic-pac/fpinfra/osapi/osapi_time.c
@@ -0,0 +1,1503 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include <stdlib.h>
+#include <string.h>
+#include <signal.h>
+#include <errno.h>
+//#include "l7_linux_version.h"
+#include <sys/time.h>
+#include <pthread.h>
+
+//#include "pacinfra_common.h"
+#include "datatypes.h"
+#include "commdefs.h"
+#include "resources.h"
+#include "osapi.h"
+#include "log.h"
+
+#include "osapi_priv.h"
+
+typedef struct osapiTimerListEntry_s {
+
+  osapiTimerDescr_t timer;
+  struct timespec ts_expiry;
+  struct osapiTimerListEntry_s *next, *prev;
+
+} osapiTimerListEntry_t;
+
+typedef struct osapiTimerAddEntry_s
+{
+  void                          (*func32)(uint32, uint32);
+  void                          (*func64)( uint64,  uint64);
+   uint64                     arg1;
+   uint64                     arg2;
+  uint32                     milliseconds;
+  osapiTimerDescr_t     **pTimerHolder;
+
+} osapiTimerAddEntry;
+
+static osapiTimerListEntry_t *osapiTimerList = NULL;
+static osapiTimerListEntry_t *osapiTimerExpired = NULL;
+static osapiTimerListEntry_t *osapiTimerTmp = NULL;
+static osapiTimerListEntry_t *osapiTimerListOrig = NULL;
+static osapiTimerListEntry_t *osapiTimerListEndOrig = NULL;
+
+static osapiTimerListEntry_t *osapiTimerFreeListHead = NULL;
+static osapiTimerListEntry_t *osapiTimerFreeListTail = NULL;
+static uint32 osapiDebugTimerActiveCount = 0, osapiDebugTimerFailAddCount = 0;
+static osapiTimerDescr_t *osapiDebugTimerDetail[OSAPI_MAX_TIMERS];
+static uint32 osapiDebugTimerCallbackDetailEnableFlag = 0;
+
+#ifdef COMMENTED_OUT
+
+static pthread_mutex_t osapiTimerFreeLock = PTHREAD_MUTEX_INITIALIZER;
+
+#define OSAPI_TIMER_FREE_SEM_TAKE               \
+  pthread_mutex_lock(&osapiTimerFreeLock)
+
+#define OSAPI_TIMER_FREE_SEM_GIVE pthread_mutex_unlock(&osapiTimerFreeLock)
+
+#endif /* COMMENTED_OUT */
+
+static pthread_mutex_t osapiTimerLock = PTHREAD_MUTEX_INITIALIZER;
+static pthread_mutex_t osapiPeriodicTimerLock = PTHREAD_MUTEX_INITIALIZER;
+
+#define OSAPI_TIMER_SYNC_SEM_TAKE               \
+  pthread_mutex_lock(&osapiTimerLock)
+
+#define OSAPI_TIMER_SYNC_SEM_GIVE pthread_mutex_unlock(&osapiTimerLock)
+
+#define OSAPI_TIMER_PERIODIC_SEM_TAKE           \
+  pthread_mutex_lock(&osapiPeriodicTimerLock)
+
+#define OSAPI_TIMER_PERIODIC_SEM_GIVE pthread_mutex_unlock(&osapiPeriodicTimerLock)
+
+static pthread_cond_t osapiTimerCond;
+
+/**************************************************************************
+ * Provide periodic timer resources
+ *************************************************************************/
+/* define the number of periodic timers (COUNT) and a miss cather (MISS_CNT) */
+#define OSAPI_PERIODIC_TIMER_COUNT     20
+#define OSAPI_PERIODIC_TIMER_MISS_CNT   2
+
+/* Callback Execution Time in milliseconds */
+#define OSAPI_TIMER_CALLBACK_NOMINAL_EXECUTION_TIME_MS 100
+typedef struct {
+  uint32     handle;
+  uint32     period;
+  uint32     nextTime;
+  uint32     taskId;
+} OSAPI_PERIODIC_TIMER_t;
+static OSAPI_PERIODIC_TIMER_t  osapiPeriodicTimer[OSAPI_PERIODIC_TIMER_COUNT + 1];
+
+/**************************************************************************
+ * @purpose  Sleep for a given number of seconds.
+ *
+ * @param    sec @b{(input)}   number of seconds to sleep.
+ *
+ * @returns  none.
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+void osapiSleep( uint32 sec) {
+
+  struct timespec delay, remains;
+
+  if ( sec == 0 ) {
+
+    sec = 1;
+
+  }
+
+  delay.tv_sec = sec;
+  delay.tv_nsec = 0;
+
+  while (nanosleep (&delay, &remains) != 0) {
+     
+    memcpy(&delay, &remains, sizeof(struct timespec));
+
+  }
+
+  return;
+
+}
+
+/**************************************************************************
+ * @purpose  Sleep for a given number of micro seconds
+ *
+ * @param    usec @b{(input)}  Number of micro-seconds to sleep.
+ *
+ * @returns  none.
+ *
+ * @comments    CAUTION! The precision is in system ticks per second as
+ * @comments    determined by the system clock rate, even though the units
+ * @comments    are in microseconds.
+ *
+ * @end
+ *************************************************************************/
+void osapiSleepUSec( uint32 usec) {
+
+  struct timespec delay, remains;
+
+  if (usec < OSAPI_TICK_USEC) {
+
+    usec = OSAPI_TICK_USEC;
+
+  }
+
+  delay.tv_sec = usec / 1000000;
+  delay.tv_nsec = (usec % 1000000)*1000;
+
+  while (nanosleep (&delay, &remains) != 0) {
+
+    memcpy(&delay, &remains, sizeof(struct timespec));
+
+  }
+
+  return;
+
+}
+
+/**************************************************************************
+ * @purpose  Sleep for a given number of milliseconds
+ *
+ * @param    msec @b{(input)}  Number of milliseconds to sleep.
+ *
+ * @returns  none.
+ *
+ * @comments    CAUTION! The precision is in system ticks per second as
+ * @comments    determined by the system clock rate, even though the units
+ * @comments    are in milliseconds.
+ *
+ * @end
+ *************************************************************************/
+void osapiSleepMSec( uint32 msec) {
+
+  struct timespec delay, remains;
+
+  if (msec < (OSAPI_TICK_USEC / 1000)) {
+
+    msec = (OSAPI_TICK_USEC / 1000);
+
+  }
+
+  delay.tv_sec = msec / 1000;
+  delay.tv_nsec = (msec % 1000)*1000000;
+
+  while (nanosleep (&delay, &remains) != 0) {
+
+    memcpy(&delay, &remains, sizeof(struct timespec));
+
+  }
+
+  return;
+
+}
+
+/**************************************************************************
+ * @purpose  stop an already running timer
+ *
+ * @param    osapitimer ptr to an osapi timer descriptor
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE if osapitimer is not in timer table
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+RC_t osapiStopUserTimerMain (osapiTimerDescr_t *osapitimer)
+{
+  osapiTimerListEntry_t *curEntry = (osapiTimerListEntry_t *)osapitimer;
+  uint32 running;
+
+  running = curEntry->timer.timer_running;
+
+  if (running != 0)
+  {
+    if (curEntry->next != NULL) {
+
+      curEntry->next->prev = curEntry->prev;
+
+    }
+
+    if (curEntry->prev != NULL) {
+
+      curEntry->prev->next = curEntry->next;
+
+    } else { /* This timer is head of list... */
+
+      if (curEntry == osapiTimerList)
+      {
+        osapiTimerList = curEntry->next;
+
+        /* Notify timer task of new list head... */
+        pthread_cond_signal(&osapiTimerCond);
+      }
+    }
+
+    curEntry->next = NULL;
+    curEntry->prev = NULL;
+    curEntry->timer.timer_running = 0;
+  }
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+ * @purpose  stop an already running timer
+ *
+ * @param    osapitimer ptr to an osapi timer descriptor
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE if osapitimer is not in timer table
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+RC_t osapiStopUserTimer (osapiTimerDescr_t *osapitimer)
+{
+  int SaveCancelType;
+
+  if (osapitimer < (osapiTimerDescr_t *) osapiTimerListOrig)
+  {
+    osapi_printf("osapiStopUserTimer: Timer %p out of range (<)!\n", osapitimer);
+    return  FAILURE;
+  }
+  if (osapitimer > (osapiTimerDescr_t *) osapiTimerListEndOrig)
+  {
+    osapi_printf("osapiStopUserTimer: Timer %p out of range (>)!\n", osapitimer);
+    return  FAILURE;
+  }
+
+  OSAPI_TIMER_SYNC_SEM_TAKE;
+
+  pthread_setcanceltype(PTHREAD_CANCEL_DEFERRED, &SaveCancelType);
+  (void) osapiStopUserTimerMain ((void *)osapitimer);
+  pthread_setcanceltype(SaveCancelType, NULL);
+
+  OSAPI_TIMER_SYNC_SEM_GIVE;
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+ * @purpose  restarts a stopped timer
+ *
+ * @param    osapitimer ptr to an osapi timer descriptor to reset
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE if osapitimer is not in timer table
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+RC_t osapiRestartUserTimerMain (osapiTimerDescr_t *osapitimer)
+{
+  struct timeval curTime;
+  osapiTimerListEntry_t *curEntry, *prevEntry;
+  osapiTimerListEntry_t *newEntry = (osapiTimerListEntry_t *)osapitimer;
+  uint32 running, in_use;
+
+  in_use = newEntry->timer.timer_in_use;
+
+  /*
+    If the timer has been freed before the call to
+    osapiRestartUserTimer, make sure the timer does not get
+    added to the queue
+  */
+
+  if (in_use != 0)
+  {
+    /*
+      If this timer is already running, don't start it again
+    */
+
+    running = newEntry->timer.timer_running;
+
+    if (running != 1)
+    {
+      {
+        struct timespec tp;
+        int rc;
+
+        rc = clock_gettime (CLOCK_MONOTONIC, &tp);
+        if (rc) 
+        {
+          LOG_ERROR(rc);
+        }
+        curTime.tv_sec = tp.tv_sec;
+        curTime.tv_usec = tp.tv_nsec / 1000;
+      }
+
+      newEntry->ts_expiry.tv_sec = (curTime.tv_sec
+                                    + (newEntry->timer.time_count / 1000));
+      newEntry->ts_expiry.tv_nsec = ((curTime.tv_usec
+                                      + ((newEntry->timer.time_count % 1000) * 1000))
+                                     * 1000);
+
+      if (newEntry->ts_expiry.tv_nsec >= 1000000000) {
+
+        newEntry->ts_expiry.tv_nsec -= 1000000000;
+        newEntry->ts_expiry.tv_sec++;
+
+      }
+
+      /* Check for new timer list head... */
+      if ((osapiTimerList == NULL)
+          || (newEntry->ts_expiry.tv_sec < osapiTimerList->ts_expiry.tv_sec)
+          || ((newEntry->ts_expiry.tv_sec == osapiTimerList->ts_expiry.tv_sec)
+              && (newEntry->ts_expiry.tv_nsec < osapiTimerList->ts_expiry.tv_nsec))) {
+
+        /* Notify timer task of new list head... */
+        pthread_cond_signal(&osapiTimerCond);
+
+        /* Establish proper links in chain... */
+        newEntry->next = osapiTimerList;
+        newEntry->prev = NULL;
+        osapiTimerList = newEntry;
+
+      } else { /* Insert new timer at proper list position... */
+
+        curEntry = osapiTimerList;
+
+        do { /* Calculate correct time delta... */
+
+          prevEntry = curEntry;
+
+          curEntry = curEntry->next;
+
+        } while ((curEntry != NULL)
+                 && ((newEntry->ts_expiry.tv_sec > curEntry->ts_expiry.tv_sec)
+                     || ((newEntry->ts_expiry.tv_sec == curEntry->ts_expiry.tv_sec)
+                         && (newEntry->ts_expiry.tv_nsec > curEntry->ts_expiry.tv_nsec))));
+
+        /* Establish proper links in chain... */
+        newEntry->next = curEntry;
+        prevEntry->next = newEntry;
+        newEntry->prev = prevEntry;
+
+      }
+
+      if (newEntry->next != NULL)
+      {
+        newEntry->next->prev = newEntry;
+      }
+
+      newEntry->timer.timer_running = 1;
+    }
+  }
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+ * @purpose  restarts a stopped timer
+ *
+ * @param    osapitimer ptr to an osapi timer descriptor to reset
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE if osapitimer is not in timer table
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+RC_t osapiRestartUserTimer (osapiTimerDescr_t *osapitimer)
+{
+  int SaveCancelType;
+
+  if (osapitimer < (osapiTimerDescr_t *) osapiTimerListOrig)
+  {
+    osapi_printf("osapiRestartUserTimer: Timer %p out of range (<)!\n", osapitimer);
+    return  FAILURE;
+  }
+  if (osapitimer > (osapiTimerDescr_t *) osapiTimerListEndOrig)
+  {
+    osapi_printf("osapiRestartUserTimer: Timer %p out of range (>)!\n", osapitimer);
+    return  FAILURE;
+  }
+
+  OSAPI_TIMER_SYNC_SEM_TAKE;
+
+  pthread_setcanceltype(PTHREAD_CANCEL_DEFERRED, &SaveCancelType);
+  (void) osapiRestartUserTimerMain ((void *) osapitimer);
+  pthread_setcanceltype(SaveCancelType, NULL);
+
+  OSAPI_TIMER_SYNC_SEM_GIVE;
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+ * @purpose  change a running timer's count value
+ *
+ * @param    osapitimer ptr to an osapi timer descriptor
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE if osapitimer is not in timer table
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+RC_t osapiChangeUserTimerMain(osapiTimerChangeEntry *Entry)
+{
+  (void) osapiStopUserTimerMain(Entry->osapitimer);
+
+  (Entry->osapitimer)->time_count = Entry->newTimeCount;
+  (Entry->osapitimer)->orig_count = Entry->newTimeCount;
+
+  osapiRestartUserTimerMain(Entry->osapitimer);
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+ * @purpose  change a running timer's count value
+ *
+ * @param    osapitimer ptr to an osapi timer descriptor
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE if osapitimer is not in timer table
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+RC_t osapiChangeUserTimer(osapiTimerDescr_t *osapitimer,
+                             uint32 newTimeCount)
+{
+  osapiTimerChangeEntry Entry;
+  int SaveCancelType;
+
+  if (osapitimer < (osapiTimerDescr_t *) osapiTimerListOrig)
+  {
+    osapi_printf("osapiChangeUserTimer: Timer %p out of range (<)!\n", osapitimer);
+    return  FAILURE;
+  }
+  if (osapitimer > (osapiTimerDescr_t *) osapiTimerListEndOrig)
+  {
+    osapi_printf("osapiChangeUserTimer: Timer %p out of range (>)!\n", osapitimer);
+    return  FAILURE;
+  }
+
+  Entry.osapitimer = osapitimer;
+  Entry.newTimeCount = newTimeCount;
+
+  OSAPI_TIMER_SYNC_SEM_TAKE;
+
+  pthread_setcanceltype(PTHREAD_CANCEL_DEFERRED, &SaveCancelType);
+  (void) osapiChangeUserTimerMain ((void *) &Entry);
+  pthread_setcanceltype(SaveCancelType, NULL);
+
+  OSAPI_TIMER_SYNC_SEM_GIVE;
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+ * @purpose  This is the user function to setup a new timeout call.
+ *
+ * @param    func           is the function to call when expired.
+ * @param    arg(2)         arguments to pass to the callback function.
+ * @param    milliseconds   number of milli-seconds to wait before timeout.
+ * @param    pTimerHolder   ptr to an osapiTimerDescr_t struct used to deallocate this timer by the user
+ *
+ * @returns  none.
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+void osapiTimerAddMain (osapiTimerAddEntry *Entry)
+{
+  osapiTimerListEntry_t *tmpEntry;
+
+  /* this is not a mistake; head of osapiTimerListEntry_t is an
+     osapiTimerDescr_t */
+
+  if ((*(Entry->pTimerHolder) = (osapiTimerDescr_t *)osapiTimerFreeListHead) != NULL)
+  {
+    tmpEntry = osapiTimerFreeListHead;
+    osapiTimerFreeListHead = osapiTimerFreeListHead->next;
+
+    if (osapiTimerFreeListHead == NULL)
+    {
+      osapiTimerFreeListTail = NULL;
+    }
+
+    tmpEntry->next = NULL;
+
+    (*(Entry->pTimerHolder))->callback32 = Entry->func32;
+    (*(Entry->pTimerHolder))->callback64 = Entry->func64;
+    (*(Entry->pTimerHolder))->parm1 = Entry->arg1;
+    (*(Entry->pTimerHolder))->parm2 = Entry->arg2;
+    (*(Entry->pTimerHolder))->timer_in_use = 1;
+    (*(Entry->pTimerHolder))->timer_running = 0;
+    (*(Entry->pTimerHolder))->time_count = Entry->milliseconds;
+    (*(Entry->pTimerHolder))->orig_count = Entry->milliseconds;
+
+    osapiDebugTimerActiveCount++;
+  }
+  else
+  {
+    osapi_printf("osapiTimerAddMain: No free timers available!\n");
+    osapiDebugTimerFailAddCount++;
+    LOG_ERROR(osapiDebugTimerActiveCount);
+  }
+
+  if (*(Entry->pTimerHolder) != NULL)
+  {
+    osapiRestartUserTimerMain(*(Entry->pTimerHolder));
+  }
+
+  return;
+}
+
+/**************************************************************************
+ * @purpose  This is the user function to setup a new timeout call.
+ *
+ * @param    func           is the function to call when expired.
+ * @param    arg(2)         arguments to pass to the callback function.
+ * @param    milliseconds   number of milli-seconds to wait before timeout.
+ * @param    pTimerHolder   ptr to an osapiTimerDescr_t struct used to deallocate this timer by the user
+ *
+ * @returns  none.
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+void osapiTimerAdd(void (*func)( uint32, uint32 ),
+                   uint32 arg1, uint32 arg2,
+                    int32 milliseconds, osapiTimerDescr_t **pTimerHolder)
+{
+  osapiTimerAddEntry Entry;
+  int SaveCancelType;
+
+  if (func == NULL)
+  {
+    osapi_printf("osapiTimerAdd: Timer with NULL callback NOT added!\n");
+    return;
+  }
+
+  Entry.func32 = func;
+  Entry.func64 = 0;
+  Entry.arg1 = arg1;
+  Entry.arg2 = arg2;
+  Entry.milliseconds = milliseconds;
+  Entry.pTimerHolder = pTimerHolder;
+
+  OSAPI_TIMER_SYNC_SEM_TAKE;
+
+  pthread_setcanceltype(PTHREAD_CANCEL_DEFERRED, &SaveCancelType);
+  (void) osapiTimerAddMain ((void *) &Entry);
+  pthread_setcanceltype(SaveCancelType, NULL);
+
+  OSAPI_TIMER_SYNC_SEM_GIVE;
+
+  return;
+
+}
+
+/**************************************************************************
+ * @purpose  This is the user function to setup a new timeout call.
+*           This function accepts 64 bit user parameters.
+*           This function should be used when passing pointers as
+*           timer arguments.
+ *
+ * @param    func           is the function to call when expired.
+ * @param    arg(2)         arguments to pass to the callback function.
+ * @param    milliseconds   number of milli-seconds to wait before timeout.
+ * @param    pTimerHolder   ptr to an osapiTimerDescr_t struct used to deallocate this timer by the user
+ *
+ * @returns  none.
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+void osapiTimer64Add(void (*func)(  uint64,  uint64 ),
+                    uint64 arg1,  uint64 arg2,
+                    int32 milliseconds, osapiTimerDescr_t **pTimerHolder)
+{
+  osapiTimerAddEntry Entry;
+  int SaveCancelType;
+
+  if (func == NULL)
+  {
+    osapi_printf("osapiTimerAdd: Timer with NULL callback NOT added!\n");
+    return;
+  }
+
+  Entry.func64 = func;
+  Entry.func32 = 0;
+  Entry.arg1 = arg1;
+  Entry.arg2 = arg2;
+  Entry.milliseconds = milliseconds;
+  Entry.pTimerHolder = pTimerHolder;
+
+  OSAPI_TIMER_SYNC_SEM_TAKE;
+
+  pthread_setcanceltype(PTHREAD_CANCEL_DEFERRED, &SaveCancelType);
+  (void) osapiTimerAddMain ((void *) &Entry);
+  pthread_setcanceltype(SaveCancelType, NULL);
+
+  OSAPI_TIMER_SYNC_SEM_GIVE;
+
+  return;
+
+}
+
+/**************************************************************************
+ * @purpose  Remove a function from the timeout list.
+ *
+ * @param    pTimerHolder   ptr to an osapi timer descriptor, that was returned in osapiTimerAdd(), to deallocate.
+ *
+ * @returns  none.
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+void osapiTimerFreeMain(osapiTimerDescr_t *pTimer)
+{
+  uint32     in_use;
+
+  in_use = pTimer->timer_in_use;
+
+  /*
+    Don't allow a timer that has just been freed to be freed
+    again
+  */
+
+  if (in_use != 0)
+  {
+    (void) osapiStopUserTimerMain(pTimer);
+
+
+    /* osapiStopUserTimerMain may not set the next/prev pointer to null
+     * if the timer has already stopped.
+     */
+    ((osapiTimerListEntry_t *)pTimer)->next = NULL;
+    ((osapiTimerListEntry_t *)pTimer)->prev = NULL;
+
+    /* this is not a mistake; head of osapiTimerListEntry_t is an
+       osapiTimerDescr_t */
+
+    if (osapiTimerFreeListTail == NULL)
+    {
+      osapiTimerFreeListTail = (osapiTimerListEntry_t *)pTimer;
+      osapiTimerFreeListHead = (osapiTimerListEntry_t *)pTimer;
+
+    } else
+    {
+      osapiTimerFreeListTail->next = (osapiTimerListEntry_t *)pTimer;
+      osapiTimerFreeListTail = osapiTimerFreeListTail->next;
+    }
+                
+
+    pTimer->timer_in_use = 0;
+    --osapiDebugTimerActiveCount;
+  }
+
+  return;
+}
+
+/**************************************************************************
+ * @purpose  Remove a function from the timeout list.
+ *
+ * @param    pTimerHolder   ptr to an osapi timer descriptor, that was returned in osapiTimerAdd(), to deallocate.
+ *
+ * @returns  none.
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+void osapiTimerFree(osapiTimerDescr_t *pTimer)
+{
+  int SaveCancelType;
+
+  if (pTimer ==  NULL) 
+  {
+    return;
+  }
+
+  if (pTimer < (osapiTimerDescr_t *) osapiTimerListOrig)
+  {
+    osapi_printf("osapiTimerFree: Timer %p out of range (<)!\n", pTimer);
+    return;
+  }
+  if (pTimer > (osapiTimerDescr_t *) osapiTimerListEndOrig)
+  {
+    osapi_printf("osapiTimerFree: Timer %p out of range (>)!\n", pTimer);
+    return;
+  }
+
+  OSAPI_TIMER_SYNC_SEM_TAKE;
+
+  pthread_setcanceltype(PTHREAD_CANCEL_DEFERRED, &SaveCancelType);
+  (void) osapiTimerFreeMain ((void *)pTimer);
+  pthread_setcanceltype(SaveCancelType, NULL);
+
+  OSAPI_TIMER_SYNC_SEM_GIVE;
+
+  return;
+}
+
+/**************************************************************************
+ * @purpose  Task that wakes up periodically and invokes active timers.
+ *
+ * @param    none.
+ *
+ * @returns  none.
+ *
+ * @comments    none.
+ *
+ * @end
+ *************************************************************************/
+void osapiTimerHandler(void)
+{
+  int i;
+  osapiTimerDescr_t expTimer;
+  struct timespec pop_time;
+  struct timespec diff_time;
+  pthread_condattr_t cat;
+  uint32 preCallbackTime;
+  uint32 postCallbackTime;
+  osapiTimerDescr_t *pTimer = NULL;
+  uint32 offset;
+   char8  nameBuf[30];
+  RC_t   rc;
+
+  (void) pthread_condattr_init (&cat);
+  (void) pthread_condattr_setclock (&cat, CLOCK_MONOTONIC);
+  (void) pthread_cond_init (&osapiTimerCond, &cat);
+
+  expTimer.parm1 = 0;
+  expTimer.parm2 = 0;
+  OSAPI_TIMER_SYNC_SEM_TAKE;
+  memset(&pop_time, 0x0, sizeof(pop_time));
+
+  /* Allocate and initialize timer free list */
+  osapiTimerFreeListHead = (osapiTimerListEntry_t *)osapiMalloc( OSAPI_COMPONENT_ID, 
+                                                                sizeof(osapiTimerListEntry_t) * OSAPI_MAX_TIMERS);
+
+  if (osapiTimerFreeListHead != NULL) {
+
+    osapiTimerTmp = osapiTimerFreeListHead;
+
+    for (i = 0; i < (OSAPI_MAX_TIMERS - 1); i++) {
+
+      osapiTimerTmp->next = (osapiTimerTmp + 1);
+      osapiTimerTmp++;
+
+    }
+
+    osapiTimerFreeListTail = osapiTimerTmp;
+    osapiTimerListEndOrig = osapiTimerTmp;
+    osapiTimerTmp = osapiTimerTmp->next = NULL;
+
+  }
+
+  osapiTimerListOrig = osapiTimerFreeListHead;
+
+  OSAPI_TIMER_SYNC_SEM_GIVE;
+
+  (void) osapiTaskInitDone( OSAPI_TIMER_TASK_SYNC);
+
+  if (osapiTimerFreeListHead == NULL) {
+
+    return; /* kills this task */
+
+  }
+
+  expTimer.callback32 = NULL;
+  expTimer.callback64 = NULL;
+  expTimer.parm1 = 0;
+  expTimer.parm2 = 0;
+
+  for (;;) {
+
+    OSAPI_TIMER_SYNC_SEM_TAKE;
+
+    if (osapiTimerList == NULL) {
+
+      pthread_cond_wait(&osapiTimerCond, &osapiTimerLock);
+
+    } else {
+
+      /* setup time value */
+
+      if (pthread_cond_timedwait(&osapiTimerCond, &osapiTimerLock,
+                                 &(osapiTimerList->ts_expiry)) != 0) {
+
+        /* Get popped timer... */
+        osapiTimerExpired = osapiTimerList;
+
+        if (osapiTimerExpired != NULL)
+        {
+          /*
+            Note that the pthread_cond_timedwait must unlock the
+            osapiTimerLock semaphore.  That means that the list
+            could have changed while waiting on the timer.
+          */
+
+          /* copy the time we popped for later use */
+          memcpy(&pop_time,&(osapiTimerExpired->ts_expiry),sizeof(struct timespec));
+
+          /* Advance to next list entry... */
+          osapiTimerList = osapiTimerExpired->next;
+
+          if (osapiTimerList != NULL)
+          {
+            /*
+              Head of list must have NULL prev pointer, or
+              a subsequent osapiStopUserTimer call will
+              not notice that the timer stopped was at the
+              head of the list
+            */
+
+            osapiTimerList->prev = NULL;
+          }
+
+          if ((osapiTimerExpired->timer.callback32 == NULL) &&
+               (osapiTimerExpired->timer.callback64 == NULL))
+          {
+            osapi_printf("osapiTimerHandler: Timer %p callback NULL!, next %p, prev %p\n",
+                         &(osapiTimerExpired->timer),
+                         osapiTimerExpired->next,
+                         osapiTimerExpired->prev);
+          }
+
+          osapiTimerExpired->timer.time_count = 0;
+          osapiTimerExpired->timer.timer_running = 0;
+
+          expTimer.callback32 = osapiTimerExpired->timer.callback32;
+          expTimer.callback64 = osapiTimerExpired->timer.callback64;
+          expTimer.parm1 = osapiTimerExpired->timer.parm1;
+          expTimer.parm2 = osapiTimerExpired->timer.parm2;
+
+          osapiTimerFreeMain(&(osapiTimerExpired->timer));
+
+          pTimer = &(osapiTimerExpired->timer);
+
+          osapiTimerExpired = NULL;
+        }
+      }
+    }
+
+    OSAPI_TIMER_SYNC_SEM_GIVE;
+
+    if ((expTimer.callback32 != NULL) ||
+        (expTimer.callback64 != NULL))
+    {
+      preCallbackTime = osapiUpTimeMillisecondsGet();
+      /* Execute popped timer's callback... */
+      if (expTimer.callback32) 
+      {
+        (*expTimer.callback32)(expTimer.parm1, expTimer.parm2);
+      } else
+      {
+        (*expTimer.callback64)(expTimer.parm1, expTimer.parm2);
+      }
+      postCallbackTime = osapiUpTimeMillisecondsGet();
+
+      if (osapiDebugTimerCallbackDetailEnableFlag)
+      {
+        if (pTimer != NULL)
+        {
+          pTimer->execution_time = postCallbackTime - preCallbackTime;
+          if (pTimer->execution_time > OSAPI_TIMER_CALLBACK_NOMINAL_EXECUTION_TIME_MS)
+          {
+            memset(nameBuf, 0x0, sizeof(nameBuf));
+            if (pTimer->callback32) 
+            {
+              rc = osapiFunctionLookup(pTimer->callback32, 
+                                       nameBuf, sizeof(nameBuf), &offset);
+            } else
+            {
+              rc = osapiFunctionLookup(pTimer->callback64, 
+                                       nameBuf, sizeof(nameBuf), &offset);
+            }
+            osapi_printf("Timer callback function %s taking %d ms, longer than expected\n", 
+                         ((rc ==  SUCCESS)? nameBuf: "TBD"), pTimer->execution_time);
+          }
+          pTimer = NULL;
+        }
+      }
+
+      expTimer.callback32 = NULL;
+      expTimer.callback64 = NULL;
+      expTimer.parm1 = 0;
+      expTimer.parm2 = 0;
+
+      /* set diff time to invalid values to ensure that we
+       * don't find ourselves in a situation where
+       * osapiTimerList is NULL when testing the if conditional
+       * but non NULL when testing the while loop condition
+       * if that happens we may be expiring a timer that is not
+       * yet ready to pop
+       * This situation can happen if our schedule quanta
+       * expires after the if but before the while
+       */
+
+      diff_time.tv_sec = 0x7fffffff; /*signed value*/
+      diff_time.tv_nsec = 0x7fffffff; /*signed value*/
+
+      /* Check to see if any subsequent timers have expired */
+      if(osapiTimerList != NULL)
+      {
+        diff_time.tv_sec = osapiTimerList->ts_expiry.tv_sec - pop_time.tv_sec;
+        diff_time.tv_nsec = osapiTimerList->ts_expiry.tv_nsec - pop_time.tv_nsec;
+      }
+
+      while((osapiTimerList != NULL) &&
+            (diff_time.tv_sec == 0) &&
+            (diff_time.tv_nsec < 10000000) &&
+            (diff_time.tv_nsec > 0))
+      {
+        /*
+         *falling into the while loop condition
+         *indicates that the next timer pop is
+         *less than 1 jiffy away (10000000 nanoseconds)
+         *which means we may as well handle it now
+         *The alternative is to sleep until we are
+         *next scheduled, which will guarantee
+         *a timer skew
+         */
+
+        OSAPI_TIMER_SYNC_SEM_TAKE;
+
+        /* Get popped timer... */
+        osapiTimerExpired = osapiTimerList;
+
+        if (osapiTimerExpired != NULL)
+        {
+          /* Advance to next list entry... */
+          osapiTimerList = osapiTimerExpired->next;
+
+          if (osapiTimerList != NULL)
+          {
+            /*
+              Head of list must have NULL prev pointer, or
+              a subsequent osapiStopUserTimer call will
+              not notice that the timer stopped was at the
+              head of the list
+            */
+
+            osapiTimerList->prev = NULL;
+          }
+
+          osapiTimerExpired->timer.time_count = 0;
+          osapiTimerExpired->timer.timer_running = 0;
+
+          expTimer.callback32 = osapiTimerExpired->timer.callback32;
+          expTimer.callback64 = osapiTimerExpired->timer.callback64;
+          expTimer.parm1 = osapiTimerExpired->timer.parm1;
+          expTimer.parm2 = osapiTimerExpired->timer.parm2;
+
+          osapiTimerFreeMain(&(osapiTimerExpired->timer));
+
+          pTimer = &(osapiTimerExpired->timer);
+
+          osapiTimerExpired = NULL;
+        }
+
+        OSAPI_TIMER_SYNC_SEM_GIVE;
+
+        if ((expTimer.callback32 != NULL) ||
+            (expTimer.callback64 != NULL))
+        {
+          /* Execute popped timer's callback... */
+          preCallbackTime = osapiUpTimeMillisecondsGet();
+          if (expTimer.callback32) 
+          {
+            (*expTimer.callback32)(expTimer.parm1, expTimer.parm2);
+          } else
+          {
+            (*expTimer.callback64)(expTimer.parm1, expTimer.parm2);
+          }
+          postCallbackTime = osapiUpTimeMillisecondsGet();
+
+          if (osapiDebugTimerCallbackDetailEnableFlag)
+          {
+            if (pTimer != NULL)
+            {
+              pTimer->execution_time = postCallbackTime - preCallbackTime;
+  
+              if (pTimer->execution_time > OSAPI_TIMER_CALLBACK_NOMINAL_EXECUTION_TIME_MS)
+              {
+                memset(nameBuf, 0x0, sizeof(nameBuf));
+                if (pTimer->callback32) 
+                {
+                  rc = osapiFunctionLookup(pTimer->callback32, 
+                                           nameBuf, sizeof(nameBuf), &offset);
+                } else
+                {
+                  rc = osapiFunctionLookup(pTimer->callback64, 
+                                           nameBuf, sizeof(nameBuf), &offset);
+                }
+                osapi_printf("Timer callback function %s taking %d ms, longer than expected\n",
+                             ((rc ==  SUCCESS)? nameBuf: "TBD"), pTimer->execution_time);
+              }
+              pTimer = NULL;
+            }
+          }
+
+          expTimer.callback32 = NULL;
+          expTimer.callback64 = NULL;
+          expTimer.parm1 = 0;
+          expTimer.parm2 = 0;
+        }
+
+        /*
+         *recompute the difference to the next timer in the list
+         *Note: We don't move the pop_time structure forward here.
+         *not sure if we should or not. It seems doing so would
+         *open up the possibility that the timer may begin to
+         *execute timers before they actually expire (by more
+         *than 1 jiffy at least)
+         */
+
+        diff_time.tv_sec = 0x7fffffff;
+        diff_time.tv_nsec = 0x7fffffff;
+
+        if(osapiTimerList != NULL)
+        {
+          diff_time.tv_sec = osapiTimerList->ts_expiry.tv_sec - pop_time.tv_sec;
+          diff_time.tv_nsec = osapiTimerList->ts_expiry.tv_nsec - pop_time.tv_nsec;
+        }
+
+      } /* end while */
+    } /* end if */
+  } /* end for */
+
+  return;
+
+}
+
+/**************************************************************************
+ * @purpose  Provide periodic timer indications to delay sensitive tasks. Use
+ *           of these utilities minimizes accumulated skew.
+ *
+ * @param    uint32  period   The fixed period.
+ *           uint32 *handle   User provided storage for assigned handle.
+ *
+ * @returns  Failure message is no timers remain
+ *
+ * @comments The first available timer is assigned and the handle is returned
+ *           via the handle argument.
+ *
+ * @end
+ *************************************************************************/
+RC_t osapiPeriodicUserTimerRegister(uint32 period, uint32 *handle)
+{
+  uint32 index;
+  RC_t rc =  TABLE_IS_FULL;
+
+  OSAPI_TIMER_PERIODIC_SEM_TAKE;
+  for (index = 1; index < OSAPI_PERIODIC_TIMER_COUNT; index++)
+  {
+    if (osapiPeriodicTimer[index].handle ==  0)
+    {
+      osapiPeriodicTimer[index].handle   = index;
+      osapiPeriodicTimer[index].period   = period;
+      osapiPeriodicTimer[index].nextTime = osapiTimeMillisecondsGet();
+      osapiPeriodicTimer[index].taskId   =  0;
+      *handle = osapiPeriodicTimer[index].handle;
+      rc =  SUCCESS;
+      break;
+    }
+  }
+
+  OSAPI_TIMER_PERIODIC_SEM_GIVE;
+  return rc;
+}
+
+/**************************************************************************
+ * @purpose  Wait on a previously defined periodic timer.
+ *
+ * @param    uint32 handle   Assigned periodic timer handle.
+ *
+ * @returns  Nothing
+ *
+ * @comments Timer period previously supplied is used.
+ *
+ * @end
+ *************************************************************************/
+void osapiPeriodicUserTimerWait(uint32 handle)
+{
+  uint32 now, waitTime;
+
+  OSAPI_TIMER_PERIODIC_SEM_TAKE;
+  osapiPeriodicTimer[handle].nextTime += osapiPeriodicTimer[handle].period;
+  now = osapiTimeMillisecondsGet();
+  waitTime = osapiPeriodicTimer[handle].nextTime - now;
+
+
+  if((now > osapiPeriodicTimer[handle].nextTime) || (waitTime > osapiPeriodicTimer[handle].period))
+  {
+    osapiPeriodicTimer[handle].nextTime = now + osapiPeriodicTimer[handle].period;
+    waitTime = osapiPeriodicTimer[handle].period;
+  }
+
+  OSAPI_TIMER_PERIODIC_SEM_GIVE;
+  osapiSleepMSec(waitTime);
+}
+
+/**************************************************************************
+ * @purpose  Wait on a previously defined periodic timer.
+ *
+ * @param    uint32 handle   Assigned periodic timer handle.
+ *
+ * @returns  Nothing
+ *
+ * @comments Timer period previously supplied is used.
+ *
+ * @end
+ *************************************************************************/
+RC_t osapiPeriodicUserTimerDeregister(uint32 handle)
+{
+  if ((0 == osapiPeriodicTimer[handle].taskId) &&
+      (handle  == osapiPeriodicTimer[handle].handle))
+  {
+    osapiPeriodicTimer[handle].handle = 0;
+    osapiPeriodicTimer[handle].taskId = 0;
+    return  SUCCESS;
+  }
+
+  return  FAILURE;
+}
+
+void osapiPrintTimerDetail(osapiTimerDescr_t *ptimer)
+{
+  osapiTimerListEntry_t *Entry = (osapiTimerListEntry_t *) ptimer;
+
+  osapi_printf("  Timer.callback32: %p\n", ptimer->callback32);
+  osapi_printf("  Timer.callback64: %p\n", ptimer->callback64);
+  osapi_printf("  Timer.parm1: 0x%llx\n", ptimer->parm1);
+  osapi_printf("  Timer.parm2: 0x%llx\n", ptimer->parm2);
+  osapi_printf("  Timer.timer_running: %d\n", ptimer->timer_running);
+  osapi_printf("  Timer.timer_in_use: %d\n", ptimer->timer_in_use);
+  osapi_printf("  Timer.time_count: %d\n", ptimer->time_count);
+  osapi_printf("  Timer.orig_count: %d\n", ptimer->orig_count);
+  osapi_printf("  next: %p\n", Entry->next);
+  osapi_printf("  prev: %p\n", Entry->prev);
+}
+
+/* Be careful with running this on switches in production environment 
+ *  as it can lock out the osapiTimer task for a long period of time. 
+ *  Use the osapiDebugTimerDetailShow instead.
+ */
+void osapiPrintTimerList(int type, int detail)
+{
+  int i = 0;
+
+  OSAPI_TIMER_SYNC_SEM_TAKE;
+
+  if (type == 0)
+  {
+    osapiTimerTmp = osapiTimerFreeListHead;
+  }
+  else if (type == 1)
+  {
+    osapiTimerTmp = osapiTimerList;
+  }
+
+  while (osapiTimerTmp != NULL)
+  {
+    if (detail == 0)
+    {
+      osapi_printf("Timer %d, %p, running: %d, next: %p, prev: %p\n",
+                   i, osapiTimerTmp,
+                   osapiTimerTmp->timer.timer_running,
+                   osapiTimerTmp->next,
+                   osapiTimerTmp->prev); 
+    }
+    else
+    {
+      osapi_printf("Timer %d, %p:\n", i, osapiTimerTmp);
+      osapiPrintTimerDetail(&(osapiTimerTmp->timer));
+    }
+
+    i++;
+    osapiTimerTmp = osapiTimerTmp->next;
+  }
+
+  OSAPI_TIMER_SYNC_SEM_GIVE;
+
+  return;
+}
+
+void osapiPrintOrphanTimers(int type, int detail, int start, int end)
+{
+  int i;
+
+  OSAPI_TIMER_SYNC_SEM_TAKE;
+
+  if (start < 0)
+  {
+    start = 0;
+  }
+
+  if ((end <= 0) || (end > OSAPI_MAX_TIMERS))
+  {
+    end = OSAPI_MAX_TIMERS;
+  }
+
+  if (start > end)
+  {
+    start = end;
+  }
+
+  for (i=start; i<end; i++)
+  {
+    if (type == 0)
+    {
+      if (osapiTimerListOrig[i].timer.timer_in_use == 1 &&
+          osapiTimerListOrig[i].next == NULL &&
+          osapiTimerListOrig[i].prev == NULL)
+      {
+        if (detail == 0)
+        {
+          osapi_printf("Timer %d, %p, running: %d, next: %p, prev: %p\n",
+                       i, &(osapiTimerListOrig[i]),
+                       osapiTimerListOrig[i].timer.timer_running,
+                       osapiTimerListOrig[i].next,
+                       osapiTimerListOrig[i].prev);
+        }
+        else
+        {
+          osapi_printf("Timer %d, %p:\n", i, &(osapiTimerListOrig[i]));
+          osapiPrintTimerDetail(&(osapiTimerListOrig[i].timer));
+        }
+      }
+    }
+    else if (type == 1)
+    {
+      if (detail == 0)
+      {
+        osapi_printf("Timer %d, %p orphaned, running = %d\n", i, &(osapiTimerListOrig[i]),
+                     osapiTimerListOrig[i].timer.timer_running);
+      }
+      else
+      {
+        osapi_printf("Timer %d, %p:\n", i, &(osapiTimerListOrig[i]));
+        osapiPrintTimerDetail(&(osapiTimerListOrig[i].timer));
+      }
+    }
+  }
+
+  OSAPI_TIMER_SYNC_SEM_GIVE;
+}
+
+
+void osapiDebugTimerTmpListFree(uint32 lastIndex)
+{
+  uint32 index;
+  for (index = 0; index < lastIndex; index++)
+  {
+    osapiFree( OSAPI_COMPONENT_ID, osapiDebugTimerDetail[index]);    
+  }
+  return;
+}
+
+RC_t osapiDebugTimerTmpListAllocate()
+{
+  uint32 index;
+
+  for (index = 0; index < OSAPI_MAX_TIMERS; index++)
+  {
+    osapiDebugTimerDetail[index] = osapiMalloc( OSAPI_COMPONENT_ID, 
+                                               sizeof(*osapiDebugTimerDetail[index]));     
+    if (osapiDebugTimerDetail[index] ==  NULLPTR)
+    {
+      osapiDebugTimerTmpListFree(index);
+      return  FAILURE;
+    }
+  }
+
+  return  SUCCESS;
+}
+
+
+/* Prints timer stats without taking the timer_sync_sem. Useful to run in production switches.*/
+void osapiDebugTimerStats()
+{
+  osapi_printf("Number of active timers = %u\n", osapiDebugTimerActiveCount);
+  osapi_printf("Number of failed timer adds = %u\n", osapiDebugTimerFailAddCount);
+}
+
+/* Shows the details of active timers in non-intrusive way. Useful to run in production switches. */
+/* type = 0 for active timers */
+/* type = 1 for all timers */
+/* non-zero for timers with non-zero execution time */
+void osapiDebugTimerDetailShow(int type, int non_zero)
+{
+  uint32 timerCount = 0, index = 0, offset;
+   char8  tmpBuf[128], printBuf[512], nameBuf[30];
+  RC_t   rc;
+  void *timer_callback;
+ 
+  if (osapiDebugTimerTmpListAllocate() ==  FAILURE)
+  {
+    osapi_printf("Failed to allocate memory for timer list\n");
+    return;
+  }
+
+  
+  /* Copy the timer information to the temporary list */  
+  OSAPI_TIMER_SYNC_SEM_TAKE;
+
+  if (type == 1)
+  {
+    osapiTimerTmp = osapiTimerFreeListHead;
+  }
+  else
+  {
+    osapiTimerTmp = osapiTimerList;
+  }
+
+  while ((osapiTimerTmp != NULL) && (timerCount < OSAPI_MAX_TIMERS))
+  {
+    memcpy(osapiDebugTimerDetail[timerCount], &(osapiTimerTmp->timer), 
+           sizeof(osapiTimerDescr_t));      
+    timerCount++;       
+    osapiTimerTmp = osapiTimerTmp->next;
+  }
+
+  osapiDebugTimerStats();
+
+  OSAPI_TIMER_SYNC_SEM_GIVE;
+
+  
+  printf("Timer Callback   FuncName                         Parm1      Parm2       State      Req Time(ms) Time Left(ms) Execution Time(ms)\n");
+  printf("----- ---------- ------------------------------ ---------  ----------  ----------  ------------- ------------  -----------------\n");
+  for (index = 0; index < timerCount; index++)
+  {
+    if (non_zero)
+    {
+      if (osapiDebugTimerDetail[index]->execution_time == 0)
+      {
+        continue;
+      }
+    }
+    memset(printBuf, 0x0, sizeof(printBuf));
+    memset(nameBuf, 0x0, sizeof(nameBuf));
+
+    if (osapiDebugTimerDetail[index]->callback32) 
+    {
+      rc = osapiFunctionLookup(osapiDebugTimerDetail[index]->callback32, 
+                               nameBuf, sizeof(nameBuf), &offset);
+      timer_callback = osapiDebugTimerDetail[index]->callback32;
+    } else
+    {
+      rc = osapiFunctionLookup(osapiDebugTimerDetail[index]->callback64, 
+                               nameBuf, sizeof(nameBuf), &offset);
+      timer_callback = osapiDebugTimerDetail[index]->callback64;
+    }
+    osapiSnprintf(tmpBuf, sizeof(tmpBuf), 
+                  "%-4d  0x%08lx %-30s 0x%08llx 0x%08llx   ",
+                  index,
+                  (unsigned long)timer_callback,
+                  (rc ==  SUCCESS)? nameBuf: "TBD",
+                  osapiDebugTimerDetail[index]->parm1,
+                  osapiDebugTimerDetail[index]->parm2);
+    osapiStrncat(printBuf, tmpBuf, sizeof(printBuf) - 1);
+    if (osapiDebugTimerDetail[index]->timer_in_use ==  TRUE)
+    {
+      osapiSnprintf(tmpBuf, sizeof(tmpBuf),"Used/");
+    }
+    else
+    {
+      osapiSnprintf(tmpBuf, sizeof(tmpBuf),"Un-Used/");
+    }
+
+    osapiStrncat(printBuf, tmpBuf, sizeof(printBuf) - 1);
+    if (osapiDebugTimerDetail[index]->timer_running ==  TRUE)
+    {
+      osapiSnprintf(tmpBuf, sizeof(tmpBuf), "Run");
+    }
+    else
+    {
+      osapiSnprintf(tmpBuf, sizeof(tmpBuf), "Stopped");
+    }
+
+    osapiStrncat(printBuf, tmpBuf, sizeof(printBuf) - 1);
+    osapiSnprintf(tmpBuf, sizeof(tmpBuf),"    %-10d   %-10d   %-10d\n", 
+                  osapiDebugTimerDetail[index]->orig_count, 
+                  osapiDebugTimerDetail[index]->time_count,
+                  osapiDebugTimerDetail[index]->execution_time);
+
+    osapiStrncat(printBuf, tmpBuf, sizeof(printBuf) - 1);
+
+    osapi_printf("%s", printBuf);
+    
+  }
+
+  osapiDebugTimerTmpListFree(OSAPI_MAX_TIMERS);
+  
+  return;
+}
+
+/* Debug Functions */
+osapiTimerDescr_t *pDebugTimerHolder, *pDebugTimer;
+void osapiDebugTimerfn(uint32 parm1, uint32 T1)
+{
+  uint32 T2 = osapiTimeMillisecondsGet();
+
+  if ( (parm1+T1) > T2)
+    osapi_printf("\n%d millisecond timer expired %d milliseconds early\n", ( int32)parm1, ( int32)((parm1+T1) - T2));
+  else if ( (parm1+T1) < T2)
+    osapi_printf("\n%d millisecond timer expired %d milliseconds late\n", ( int32)parm1, ( int32)(T2 - (parm1+T1)));
+  else
+    osapi_printf("\n%d millisecond timer expired on time\n",( int32)parm1);
+
+}
+
+void osapiTimerTest(int noOfTimers, uint32 milliseconds)
+{
+  int i;
+  for (i = milliseconds; i < (milliseconds*noOfTimers); i += milliseconds)
+  {
+    osapiTimerAdd(osapiDebugTimerfn, (uint32)i, osapiTimeMillisecondsGet(), i, &pDebugTimerHolder);
+  }
+}
+
+/*********************************************************************
+* @purpose  Debug API to enable the prints for timer callbacks
+*           consuming more than the nominal time. 
+*
+* @param    enable  @b{(input)} flag
+* @notes    Use this API very cautiously. It will increase the CPU load
+*           due to overhead for calculating and displaying Timer
+*           Callback Execution duration.
+
+*********************************************************************/
+void osapiDebugTimerCallbackDetailEnable (uint32 enable)
+{
+  osapiDebugTimerCallbackDetailEnableFlag = enable;
+}
diff --git a/src/sonic-pac/fpinfra/osapi/osapi_util.c b/src/sonic-pac/fpinfra/osapi/osapi_util.c
new file mode 100755
index 00000000000..a0507e38399
--- /dev/null
+++ b/src/sonic-pac/fpinfra/osapi/osapi_util.c
@@ -0,0 +1,578 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include <sys/time.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <pthread.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "datatypes.h"
+#include "commdefs.h"
+#include "osapi_priv.h"
+#include "osapi_sem.h"
+#include "osapi.h"
+
+static pthread_mutex_t queue_list_mutex = PTHREAD_MUTEX_INITIALIZER;
+static osapi_waitq_t *queue_list_head = NULL;
+
+void osapi_waitq_create (osapi_waitq_t * queue, pthread_mutex_t * lock,
+                         uint32 flags)
+{
+  pthread_condattr_t cat;
+
+
+  queue->flags = flags;
+
+  queue->lock = lock;
+
+  queue->count = 0;
+
+  queue->taken =  NULLPTR;
+
+  pthread_cond_init (&(queue->control), NULL);
+
+  if (WAITQ_POLICY (queue) == WAITQ_FIFO)
+  {
+    queue->policy.fifo.head = queue->policy.fifo.tail = NULL;
+  }
+  else
+    /* priority queue */
+  {
+    pthread_condattr_init(&cat);
+
+    pthread_condattr_setclock(&cat, CLOCK_MONOTONIC);
+    pthread_cond_init (&(queue->policy.prio.cond), &cat);
+  }
+
+  if (pthread_mutex_lock (&queue_list_mutex) != 0)
+  {
+    osapi_printf ("osapi_waitq_create: queue_list_mutex error\n");
+  }
+
+  if (queue_list_head != NULL)
+  {
+    queue_list_head->chain_prev = queue;
+  }
+
+  queue->chain_next = queue_list_head;
+
+  queue_list_head = queue;
+
+  queue->chain_prev = NULL;
+
+  pthread_mutex_unlock (&queue_list_mutex);
+}
+
+void osapi_waitq_destroy (osapi_waitq_t * queue)
+{
+  /* assume flush already done */
+
+  /* assume queue is already locked */
+
+  pthread_cond_destroy (&(queue->control));
+
+  if (WAITQ_POLICY (queue) == WAITQ_PRIO)
+  {
+    pthread_cond_destroy (&(queue->policy.prio.cond));
+    queue->policy.fifo.head = NULL;
+  }
+
+  if (pthread_mutex_lock (&queue_list_mutex) != 0)
+  {
+    osapi_printf ("osapi_waitq_destroy: queue_list_mutex error\n");
+  }
+
+  if (queue->chain_next != NULL)
+  {
+    queue->chain_next->chain_prev = queue->chain_prev;
+  }
+
+  if (queue->chain_prev != NULL)
+  {
+    queue->chain_prev->chain_next = queue->chain_next;
+  }
+  else
+    /* must be head of list */
+  {
+    queue_list_head = queue->chain_next;
+  }
+
+  pthread_mutex_unlock (&queue_list_mutex);
+}
+
+static void osapi_waitq_unlock (osapi_task_t * self)
+{
+  osapi_waitq_t *queue = self->waiting;
+  if (queue !=  NULLPTR)
+  {
+    queue->taken =  NULLPTR;
+  }
+  pthread_mutex_unlock (&self->lock);
+}
+
+#define osapi_waitq_lock(self, caller, where) \
+  if (self->waiting !=  NULLPTR) \
+  { \
+    self->waiting->taken = caller; \
+  } \
+  if (pthread_mutex_lock (&(self->lock)) != 0) \
+  { \
+    osapi_printf ("osapi_waitq_enqueue: self->lock error %d\n", where); \
+  } \
+
+RC_t osapi_waitq_enqueue (osapi_waitq_t * queue, uint32 wait_msec,
+                             removal_check_t removal_check,
+                             void *removal_check_data, void *caller)
+{
+  struct timespec timeout = {};
+  RC_t rc =  SUCCESS;
+  osapi_task_t *self;
+  int task_deleted = 0;
+  int count = 0;
+  int wait_rc;
+
+  /* assume queue is already locked */
+
+  if (wait_msec !=  WAIT_FOREVER)
+  {
+    (void) clock_gettime(CLOCK_MONOTONIC, &timeout);
+
+    if (wait_msec !=  NO_WAIT)
+    {
+      timeout.tv_sec  += (wait_msec / 1000);
+      timeout.tv_nsec += (((wait_msec % 1000) * 1000) * 1000);
+    }
+    /* Yes, this seems to matter to WRL 2.0's glibc */
+    while (timeout.tv_nsec >= 1000000000)
+    {
+      timeout.tv_sec += 1;
+      timeout.tv_nsec -= 1000000000;
+    }
+  }
+
+  self = (void *) osapiTaskIdSelf ();
+
+  if (self == NULL)
+  {
+    osapi_printf ("%s: invalid osapi_task_key\n", __FUNCTION__);
+    return  ERROR;
+  }
+
+  osapi_waitq_lock (self, caller, __LINE__);
+  task_deleted = (self->flags & TASK_DELETED);
+
+  /*
+     Check if the current task has been deleted, if not, we can add
+     it to the waitq.
+   */
+
+  if (!task_deleted)
+  {
+    queue->count++;
+
+    self->waiting = queue;
+    /*
+       Only seconds matter for wait time recording.
+     */
+    self->wait_time = timeout.tv_sec;
+  }
+  else
+  {
+    /*
+       If the current task has been deleted, return an error to
+       the calling task.  The sleep is to allow a lower-priority
+       deleting task to be able to get the queue semaphore when
+       the deleted task is running at high priority
+     */
+    osapi_waitq_unlock (self);
+    /*
+       osapiSleepMSec(100);
+     */
+    return  ERROR;
+  }
+
+  osapi_waitq_unlock (self);
+
+  if (WAITQ_POLICY (queue) == WAITQ_PRIO)
+  {
+    do
+    {
+      if (wait_msec ==  WAIT_FOREVER)
+      {
+        pthread_cond_wait (&(queue->policy.prio.cond), queue->lock);
+      }
+      else
+      {
+        wait_rc = pthread_cond_timedwait (&(queue->policy.prio.cond),
+                                          queue->lock, &timeout);
+        if (wait_rc != 0)
+        {
+          rc =  ERROR;
+          break;
+        }
+      }
+
+      osapi_waitq_lock (self, caller, __LINE__);
+      task_deleted = (self->flags & TASK_DELETED);
+
+      /*
+         If the task has now been deleted, we want to exit from the
+         main waitq waiting loop
+       */
+
+      osapi_waitq_unlock (self);
+    }
+    while ((removal_check (removal_check_data) != WAITQ_REMOVE_OK)
+           && (task_deleted == 0));
+
+    osapi_waitq_lock (self, caller, __LINE__);
+    task_deleted = (self->flags & TASK_DELETED);
+
+    /*
+       If task has not been deleted, lower the count to reflect
+       removal from the queue; if the task has been deleted, then
+       the deleting task will take care of reducing the count
+     */
+
+    if (task_deleted == 0)
+    {
+      count = --queue->count;
+    }
+    else
+    {
+      count = queue->count;
+    }
+
+    if ((count == 0) && ((queue->flags & WAITQ_FLUSHED) != 0))
+    {
+      pthread_cond_signal (&(queue->control));
+    }
+
+    self->waiting = NULL;
+    self->wait_time = 0;
+
+    osapi_waitq_unlock (self);
+  }
+  else
+    /* FIFO queue */
+  {
+    if (queue->policy.fifo.head == NULL)        /* empty list */
+    {
+      queue->policy.fifo.head = queue->policy.fifo.tail = self;
+    }
+    else
+    {
+      self->fifo_prev = queue->policy.fifo.tail;
+
+      queue->policy.fifo.tail->fifo_next = self;
+
+      queue->policy.fifo.tail = self;
+    }
+
+    do
+    {
+      if (wait_msec ==  WAIT_FOREVER)
+      {
+        pthread_cond_wait (&(self->fifo_cond), queue->lock);
+      }
+      else
+      {
+        wait_rc = pthread_cond_timedwait (&(self->fifo_cond), queue->lock,
+                                          &timeout);
+        if (wait_rc != 0)
+        {
+          rc =  ERROR;
+          break;
+        }
+      }
+
+      osapi_waitq_lock (self, caller, __LINE__);
+      task_deleted = (self->flags & TASK_DELETED);
+
+      /*
+         If the task has now been deleted, we want to exit from the
+         main waitq waiting loop
+       */
+
+      osapi_waitq_unlock (self);
+    }
+    while ((removal_check (removal_check_data) != WAITQ_REMOVE_OK)
+           && (task_deleted == 0));
+
+    osapi_waitq_lock (self, caller, __LINE__);
+
+    if (self->fifo_prev == NULL)
+    {
+      queue->policy.fifo.head = self->fifo_next;
+    }
+    else
+    {
+      self->fifo_prev->fifo_next = self->fifo_next;
+    }
+
+    if (self->fifo_next == NULL)
+    {
+      queue->policy.fifo.tail = self->fifo_prev;
+    }
+    else
+    {
+      self->fifo_next->fifo_prev = self->fifo_prev;
+    }
+
+    self->fifo_prev = self->fifo_next = NULL;
+
+    task_deleted = (self->flags & TASK_DELETED);
+
+    /*
+       If task has not been deleted, lower the count to reflect
+       removal from the queue; if the task has been deleted, then
+       the deleting task will take care of reducing the count
+     */
+
+    if (task_deleted == 0)
+    {
+      queue->count--;
+    }
+
+    if ((queue->flags & WAITQ_FLUSHED) != 0)
+    {
+      pthread_cond_signal (&(queue->control));
+    }
+
+    self->waiting = NULL;
+    self->wait_time = 0;
+
+    osapi_waitq_unlock (self);
+  }
+
+  return rc;
+}
+
+void osapi_waitq_dequeue (osapi_waitq_t * queue)
+{
+  osapi_task_t *tptr;
+   
+  /* assume queue is already locked */
+
+  if (queue->count != 0)
+  {
+    if (WAITQ_POLICY (queue) == WAITQ_PRIO)
+    {
+      pthread_cond_signal (&(queue->policy.prio.cond));
+    }
+    else
+      /* FIFO queue */
+    {
+      tptr = queue->policy.fifo.head;
+      while (tptr)
+      {
+        pthread_cond_signal (&(tptr->fifo_cond));
+        tptr = tptr->fifo_next;
+      }
+    }
+  }
+}
+
+/* Not quite the same as osapi_waitq_flush(). This does not wait for all the
+   wakeups to finish, osapi_waitq_flush() does. */
+void osapi_waitq_dequeue_all (osapi_waitq_t * queue)
+{
+  osapi_task_t *cur;
+
+  /* assume queue is already locked */
+  if (queue->count != 0)
+  {
+    if (WAITQ_POLICY (queue) == WAITQ_PRIO)
+    {
+      pthread_cond_broadcast (&(queue->policy.prio.cond));
+    }
+    else                        /* FIFO queue */
+    {
+      cur = queue->policy.fifo.head;
+      while (cur)
+      {
+        pthread_cond_signal (&(cur->fifo_cond));
+        cur = cur->fifo_next;
+      }
+    }
+  }
+}
+
+void osapi_waitq_flush (osapi_waitq_t * queue)
+{
+  /* assume queue is already locked */
+
+  if (queue->count != 0)
+  {
+    queue->flags |= WAITQ_FLUSHED;
+
+    if (WAITQ_POLICY (queue) == WAITQ_PRIO)
+    {
+      pthread_cond_broadcast (&(queue->policy.prio.cond));
+
+      while (queue->count != 0)
+      {
+        pthread_cond_wait (&(queue->control), queue->lock);
+      }
+    }
+    else
+      /* FIFO queue */
+    {
+      while (queue->count != 0)
+      {
+        pthread_cond_signal (&(queue->policy.fifo.head->fifo_cond));
+
+        pthread_cond_wait (&(queue->control), queue->lock);
+      }
+    }
+
+    queue->flags &= ~WAITQ_FLUSHED;
+  }
+}
+
+void osapi_waitq_remove (osapi_waitq_t * queue, osapi_task_t * task)
+{
+  /* assume queue is already locked */
+
+  /* assume task is already locked */
+
+  if (WAITQ_POLICY (queue) == WAITQ_FIFO)
+  {
+    if (task->waiting == queue)
+    {
+      pthread_cond_signal (&(task->fifo_cond));
+    }
+  }
+
+  /* nothing to do for WAITQ_PRIO... tasks are always FIFO */
+}
+
+/* Rather than use system("echo foo > /proc/bar"), this way avoids fork/exec and
+   "system"'s security problems. Returns -1 on error, 0 on success. */
+int osapi_proc_set (const char *path, const char *value)
+{
+  int rc, fd;
+  struct stat stat_info;
+
+  /* Stat first, as some kernel bugs will hang the system if you open() a /proc
+     file that isn't there. */
+  rc = stat (path, &stat_info);
+  if (rc < 0)
+  {
+    return -1;
+  }
+  fd = open (path, O_WRONLY);
+  if (fd < 0)
+  {
+    return -2;
+  }
+
+  do
+  {
+    rc = write (fd, value, strlen (value));
+  } while ((0 > rc) && (EINTR == errno));
+
+  close (fd);
+  if (rc < 0)
+  {
+    return -3;
+  }
+  return 0;
+}
+
+int osapi_proc_get (const char *path, char *value, int size)
+{
+  int rc, fd;
+  struct stat stat_info;
+
+  /* Stat first, as some kernel bugs will hang the system if you open() a /proc
+     file that isn't there. */
+  rc = stat (path, &stat_info);
+  if (rc < 0)
+  {
+    return -1;
+  }
+  fd = open (path, O_RDONLY);
+  if (fd < 0)
+  {
+    return -2;
+  }
+
+  do 
+  {
+    rc = read (fd, value, size);
+  } while ((0 > rc) && (EINTR == errno));
+
+  close (fd);
+  if (rc < 0)
+  {
+    return -3;
+  }
+  if ((rc > 0) && (value [rc-1] == '\n'))
+  {
+    value [rc-1] = 0;
+  }
+  return 0;
+}
+
+void osapiTimedSemaDebug(int type)
+{
+  void *myDebugSema;
+
+
+  if(type == 1)
+  {
+    printf("%s:%d:Creating the PRIORITY myDebugSema.\n",__FUNCTION__,__LINE__);
+    myDebugSema = osapiSemaBCreate(OSAPI_SEM_Q_PRIORITY, OSAPI_SEM_EMPTY);
+    if( NULLPTR == myDebugSema)
+    {
+      printf("%s:%d:Failed to create the myDebugSema.\n",__FUNCTION__,__LINE__);
+      return;
+    }
+  }
+  else
+  {
+    printf("%s:%d:Creating the FIFO myDebugSema.\n",__FUNCTION__,__LINE__);
+    myDebugSema = osapiSemaBCreate(OSAPI_SEM_Q_FIFO, OSAPI_SEM_EMPTY);
+    if( NULLPTR == myDebugSema)
+    {
+      printf("%s:%d:Failed to create the myDebugSema.\n",__FUNCTION__,__LINE__);
+      return;
+    }
+  }
+
+  printf("%s:%d:Taking the myDebugSema:3min.\n",__FUNCTION__,__LINE__);
+  if( SUCCESS != osapiSemaTake(myDebugSema,180000))
+  {
+    printf("%s:%d:Failed to take the myDebugSema.\n",__FUNCTION__,__LINE__);
+    printf("%s:%d:Deleting the myDebugSema.\n",__FUNCTION__,__LINE__);
+    osapiSemaDelete(myDebugSema); 
+    return;
+  }
+
+  printf("%s:%d:Giving the myDebugSema.\n",__FUNCTION__,__LINE__);
+  if( SUCCESS != osapiSemaGive(myDebugSema))
+  {
+    printf("%s:%d:Failed to give the myDebugSema.\n",__FUNCTION__,__LINE__);
+  }
+
+  printf("%s:%d:Deleting the myDebugSema.\n",__FUNCTION__,__LINE__);
+  osapiSemaDelete(myDebugSema);
+}
diff --git a/src/sonic-pac/fpinfra/osapi/proc_osapi_msg.c b/src/sonic-pac/fpinfra/osapi/proc_osapi_msg.c
new file mode 100644
index 00000000000..a185d90fbf8
--- /dev/null
+++ b/src/sonic-pac/fpinfra/osapi/proc_osapi_msg.c
@@ -0,0 +1,326 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdlib.h>
+#include <pthread.h>
+#include <semaphore.h>
+#include <errno.h>
+#include <string.h>
+//#include "proc_osapi.h"
+#include "datatypes.h"
+#include "commdefs.h"
+
+typedef struct 
+{
+  unsigned int max_size;  /* Maximum messages in the queue */
+  unsigned int msg_size;  /* Size of each message in the queue */
+  unsigned int num_msgs;  /* Current number of messages in the queue */
+
+  unsigned int head; /* First message in the queue (Next to be dequeued) */
+  unsigned int tail; /* Last message in the queue */
+
+  unsigned char *buf;  /* Buffer for storing the messages */
+  unsigned int  buf_size; /* Number of bytes in the queue buffer */
+
+  sem_t tx_sema; /* Block callers when queue is full */
+  sem_t rx_sema; /* Block callers when queue is empty */
+
+  pthread_mutex_t mutex; /* Protect access to the queue structure */
+   
+} proc_osapi_msgq_t; 
+
+
+/**************************************************************************
+* @purpose  Create a message queue.
+*
+* @param    queue_name    @b{(input)}  Not used, but kept for backwards compatability.
+* @param    queue_size    @b{(input)}  is the max number of the messages on the queue.
+* @param    message_size  @b{(input)}  is the size of each message in bytes.
+*
+* @returns  pointer to the Queue ID structure or  NULLPTR if the create failed.
+*
+* @comments    This routine creates a message queue capable of holding up to
+* @comments    queue_size messages, each up to message_size bytes long.  The
+* @comments    routine returns a void ptr used to identify the created message queue
+* @comments    in all subsequent calls to routines in this library. The queue will be
+* @comments    created as a FIFO queue.
+*
+* @end
+*************************************************************************/
+void * osapiMsgQueueCreate( char8 *queue_name, uint32 queue_size,
+                           uint32 message_size)
+{
+  proc_osapi_msgq_t *msgq;
+  pthread_mutexattr_t attr;
+
+  msgq = malloc(sizeof(proc_osapi_msgq_t));
+
+  msgq->max_size = queue_size;
+  msgq->msg_size = message_size;
+  msgq->num_msgs = 0;
+  msgq->head = 0;
+  msgq->tail = 0;
+
+  msgq->buf_size = queue_size * message_size;
+  msgq->buf = malloc (msgq->buf_size);
+  memset (msgq->buf, 0, msgq->buf_size);
+
+  pthread_mutexattr_init(&attr);
+  pthread_mutex_init(&msgq->mutex, &attr);
+
+  sem_init (&msgq->tx_sema, 0, queue_size);
+  sem_init (&msgq->rx_sema, 0, 0);
+
+  return msgq;
+}
+
+/**************************************************************************
+* @purpose  Returns the current number of messages on the specified message queue.
+*
+* @param    queue_ptr  @b{(input)}  Pointer to message queue.
+* @param    bptr  @b{(output)} Pointer to area to return number
+*
+* @returns   SUCCESS or  ERROR.
+*
+* @comments    none.
+*
+* @end
+*************************************************************************/
+RC_t osapiMsgQueueGetNumMsgs(void *queue_ptr,  int32 *bptr)
+{
+  proc_osapi_msgq_t *msgq = queue_ptr;
+
+  pthread_mutex_lock(&msgq->mutex);
+  *bptr = msgq->num_msgs;
+  pthread_mutex_unlock(&msgq->mutex);
+
+  return  SUCCESS;
+}
+
+
+/**************************************************************************
+* @purpose  Returns the content of the message without removing the
+*           message from the queue.
+*
+* @param    queue_ptr  @b{(input)}  Pointer to message queue.
+* @param    Message - Buffer allocated by the caller to put the message.
+* @param    Size - Size of the buffer pointed by Message.
+* @param    msgOffset - Number of messages to skip from the first
+*                       message in the queue before reading the data.
+*
+* @returns   SUCCESS or  FAILURE.
+*
+* @comments    none.
+*
+* @end
+*************************************************************************/
+RC_t osapiMessagePeek(void *queue_ptr, void *Message,
+                            uint32 Size, uint32 msgOffset)
+{
+  proc_osapi_msgq_t *msgq = queue_ptr;
+  unsigned int msg_to_read;
+
+  pthread_mutex_lock(&msgq->mutex);
+  if ((msgq->num_msgs == 0) || ((msgq->num_msgs - 1) < msgOffset))
+  {
+    pthread_mutex_unlock(&msgq->mutex);
+    return  FAILURE;
+  }
+
+  msg_to_read = (msgq->head + (msgOffset * msgq->msg_size)) % msgq->buf_size;
+  memcpy(Message, &msgq->buf[msg_to_read],
+         ((Size < msgq->msg_size) ? Size : msgq->msg_size));
+
+
+  pthread_mutex_unlock(&msgq->mutex);
+  return  SUCCESS;
+}
+
+/**************************************************************************
+* @purpose  Receive a message from a message queue.
+*
+* @param    Queue_ptr @b{(input)}   Pointer to message queue.
+* @param    Message @b{(output)}    Place to put the message.
+* @param    Size @b{(input)}        Number of bytes to move into the message.
+* @param    Wait @b{(input)}        a flag to wait or not.  NO_WAIT or  WAIT_FOREVER.
+*                                   The function does not support timed waits, so only
+*                                   "No Wait" or "Wait Forever" is accepted.
+*
+* @returns   SUCCESS on success or  ERROR if an error occured.
+*
+* @comments    This routine receives a message from the message queue queue_ptr. The received message is
+* @comments    copied into the specified buffer, Message, which is Size bytes in length.
+* @comments    If the message is longer than Size, the remainder of the message is discarded (no
+* @comments    error indication is returned).
+*
+* @end
+*************************************************************************/
+RC_t osapiMessageReceive(void *queue_ptr, void *Message,
+                            uint32 Size, uint32 Wait)
+{
+  proc_osapi_msgq_t *msgq = queue_ptr;
+  int err;
+
+  if((Wait !=  WAIT_FOREVER) && (Wait !=  NO_WAIT))
+  {
+    return  ERROR;
+  }
+
+  if(Wait ==  WAIT_FOREVER)
+  {
+    do {
+        err = sem_wait(&msgq->rx_sema);
+    } while (err != 0 && errno == EINTR);
+  } else
+  {
+    do
+    {
+      err = sem_trywait(&msgq->rx_sema);
+    } while ((err < 0) && (errno == EINTR));
+  }
+  if(err)
+  {
+    return  FAILURE;
+  }
+
+  pthread_mutex_lock(&msgq->mutex);
+  memcpy(Message, &msgq->buf[msgq->head],
+         ((Size < msgq->msg_size) ? Size : msgq->msg_size));
+  msgq->head += msgq->msg_size;
+  msgq->head %= msgq->buf_size;
+  msgq->num_msgs--;
+  pthread_mutex_unlock(&msgq->mutex);
+
+  sem_post (&msgq->tx_sema);
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+*
+* @purpose  Send a message to a message queue.
+*
+* @param    queue_ptr    @b{(input)}  Pointer to message queue.               
+* @param    Message      @b{(input)}  pointer to the message.          
+* @param    Size         @b{(input)}  size of the message in bytes.
+* @param    Wait         @b{(input)}  a flag to wait or not.  NO_WAIT or  WAIT_FOREVER.
+*                                     This function does not accept a timeout value, so
+*                                     only "No Wait" or "Wait Forever" options are allowed.
+* @param    Priority     @b{(input)}  Ignored.
+*
+* @returns   SUCCESS
+* @returns   ERROR
+*
+* @comments This routine sends the message in buffer Message of length Size bytes
+*           to the message queue queue_ptr. If any tasks are already waiting to
+*           receive messages on the queue, the message will immediately
+*           be delivered to the first waiting task. If no task is waiting to receive
+*           messages, the message is saved in the message queue.
+*
+* @end
+*
+*************************************************************************/
+RC_t osapiMessageSend(void *queue_ptr, void *Message, uint32 Size,
+                         uint32 Wait, uint32 Priority)
+{
+  proc_osapi_msgq_t *msgq = queue_ptr;
+  int err;
+
+  if((Wait !=  WAIT_FOREVER) && (Wait !=  NO_WAIT))
+  {
+    return  ERROR;
+  }
+
+  if(Wait ==  WAIT_FOREVER)
+  {
+    do {
+        err = sem_wait(&msgq->tx_sema);
+    } while (err != 0 && errno == EINTR);
+  } else
+  {
+    do
+    {
+      err = sem_trywait(&msgq->tx_sema);
+    } while ((err < 0) && (errno == EINTR));
+  }
+  if(err)
+  {
+    return  FAILURE;
+  }
+
+  pthread_mutex_lock(&msgq->mutex);
+  memcpy(&msgq->buf[msgq->tail], Message,
+         ((Size < msgq->msg_size) ? Size : msgq->msg_size));
+  msgq->tail += msgq->msg_size;
+  msgq->tail %= msgq->buf_size;
+  msgq->num_msgs++;
+  pthread_mutex_unlock(&msgq->mutex);
+
+  sem_post (&msgq->rx_sema);
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+* @purpose  Delete a message queue.
+*
+* @param    queue_ptr     @b{(input)}  Pointer to message queue to delete
+*
+* @returns   SUCCESS or  ERROR
+*
+* @comments    This routine deletes a message queue.
+*
+* @end
+*************************************************************************/
+RC_t osapiMsgQueueDelete(void *queue_ptr)
+{
+  proc_osapi_msgq_t *msgq = queue_ptr;
+
+  pthread_mutex_destroy(&msgq->mutex);
+
+  sem_destroy (&msgq->tx_sema);
+  sem_destroy (&msgq->rx_sema);
+
+  free (msgq->buf);
+  free (msgq);
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+* @purpose  Returns the maximum number of elements that may be in a message queue.
+*
+* @param    queue_ptr   @b{(input)} Pointer to message queue.
+* @param    qLimit      @b{(output)} output value.
+*
+* @returns   SUCCESS
+* @returns   ERROR
+*
+* @comments None.
+*
+* @end
+*************************************************************************/
+RC_t osapiMsgQueueLimitGet(void *queue_ptr, uint32 *qLimit)
+{
+  proc_osapi_msgq_t *msgq = queue_ptr;
+
+  pthread_mutex_lock(&msgq->mutex);
+  *qLimit = msgq->max_size;
+  pthread_mutex_unlock(&msgq->mutex);
+
+  return  SUCCESS;
+}
+
diff --git a/src/sonic-pac/fpinfra/osapi/proc_osapi_task.c b/src/sonic-pac/fpinfra/osapi/proc_osapi_task.c
new file mode 100644
index 00000000000..8db09fb6f31
--- /dev/null
+++ b/src/sonic-pac/fpinfra/osapi/proc_osapi_task.c
@@ -0,0 +1,335 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <pthread.h>
+#include <errno.h>
+#include "datatypes.h"
+#include "commdefs.h"
+#include "osapi.h"
+#include "osapi_priv.h"
+#include "osapi_sem.h"
+
+#undef LOG_ERROR
+#define LOG_ERROR(errno) printf("\nERROR: %s\n", strerror(errno))
+
+static void *syncSemaArray[ TASK_SYNC_LAST] = { NULL};
+pthread_key_t osapi_task_key;
+int osapi_task_key_created;
+
+typedef unsigned int (*proc_osapi_task_entry_t) (unsigned int, void *);
+
+typedef struct
+{
+  pthread_t thread;
+  pid_t PID;
+  uint32 argc;
+  void *argv;
+  void * task_data;
+  proc_osapi_task_entry_t *entry;
+} proc_osapi_task_t;
+
+
+void *proc_osapi_task_wrapper(void *arg)
+{
+  proc_osapi_task_t *task = (proc_osapi_task_t *)arg;
+
+  if (0 == task)
+  {
+    return(0);
+  }
+
+  if (task->task_data)
+  {
+    pthread_setspecific(osapi_task_key, task->task_data);
+  }
+
+  if (0xffffffff == task->argc)
+  {
+    (*((void (*)(void *))(task->entry)))(task->argv);
+  }
+  else
+  {
+    (*((void (*)(int, void *))(task->entry)))(task->argc, task->argv);
+  }
+  return(0);
+}
+
+/**************************************************************************
+*
+* @purpose  Create a task.
+*
+* @param    task_name   @b{(input)} name to give the task.
+* @param    task_entry  @b{(input)} function pointer to begin the task.
+* @param    argc        @b{(input)} number of arguments.
+* @param    argv        @b{(input)} pointer to start of list for arguments.
+* @param    stack_size  @b{(input)} number of bytes for the stack.
+* @param    priority    @b{(input)} task priority.
+* @param    time_slice  @b{(input)} flag to allow time slicing for the task.
+*
+* @returns  task ID or 0.
+*
+* @comments    none.
+*
+* @end
+*
+*************************************************************************/
+void * osapiTaskCreate(char *task_name,
+                       void *task_entry,
+                       unsigned int argc,
+                       void *argv,
+                       unsigned int stack_size,
+                       unsigned int priority,
+                       unsigned int time_slice)
+{
+  proc_osapi_task_t *task = 0;
+  void * task_id = 0;
+  int errno;
+  void * task_data = 0;
+
+  if (!osapi_task_key_created)
+  {
+    pthread_key_create(&osapi_task_key, NULL);
+    osapi_task_key_created = 1;
+  }
+
+  task = (void*) malloc(sizeof(proc_osapi_task_t));
+
+  /* for backward compatibility with non-proc osapi */
+  task_data = (void*) calloc(1, sizeof(osapi_task_t)); 
+
+  task_id =  task;
+
+  if (0 != task_id)
+  {
+    task->argc = argc;
+    task->argv = argv;
+    task->entry = task_entry;
+    task->task_data = task_data;
+
+    errno = pthread_create(&(task->thread), 0,
+                           (void * (*)(void *))proc_osapi_task_wrapper, (void *)task);
+    if (0 != errno)
+    {
+      LOG_ERROR(errno);
+      return 0;
+    }
+  }
+  return task_id;
+}
+
+/**************************************************************************
+*
+* @purpose  Delete a task.
+*
+* @param    task_id @b{(input)}  handle for the task to be deleted.
+*
+* @returns  none.
+*
+* @comments    none.
+*
+* @end
+*
+*************************************************************************/
+void osapiTaskDelete(void *task_id)
+{
+  int errno;
+  pthread_t tid;
+  proc_osapi_task_t *task;
+
+  if (0 == task_id)
+  {
+    return;
+  }
+
+  task = (proc_osapi_task_t *)task_id;
+  tid = task->thread;
+
+  if (task->argv)
+  {
+    free (task->argv);
+  }
+
+  if(task->task_data)
+  {
+    free(task->task_data);
+  }
+  free(task);
+
+  if (pthread_self() == tid)
+  {
+    pthread_exit(0);
+  }
+  else
+  {
+    errno = pthread_cancel(tid);
+  }
+
+  if(0 != errno)
+  {
+    LOG_ERROR(errno);
+  }
+  return;
+}
+
+/**************************************************************************
+*
+* @purpose  Delay a task for the number of ticks. Ticks are usually 1/60th of a second
+*
+* @param    ticks       number of clock ticks to delay
+*
+* @returns   SUCCESS
+* @returns   FAILURE  if called from interrupt level or if the calling task
+*                       receives a signal that is not blocked or ignored.
+*
+* @comments    none.
+*
+* @end
+*
+*************************************************************************/
+RC_t osapiTaskDelay( int32 ticks)
+{
+
+  struct timespec timereq, timerem;
+   int32 usec;
+
+  /* don't really need to check for "interrupt context" */
+
+  usec = ticks * OSAPI_TICK_USEC;
+
+  timereq.tv_sec  = ((usec >= 1000000) ? (usec / 1000000) : 0);
+  timereq.tv_nsec = ((usec >= 1000000) ? ((usec % 1000000) * 1000)
+                     : (usec * 1000));
+
+  if (usec > 0)
+  {
+    for (;;)
+    {
+      pthread_testcancel();
+
+      if (nanosleep(&timereq, &timerem) != 0)
+      {
+        timereq = timerem;
+      }
+      else
+      {
+        break;
+      }
+    }
+
+  }
+
+  return( SUCCESS);
+}
+
+/**************************************************************************
+*
+* @purpose  Signals to a waiting task that this task has completed initialization
+*
+* @param    syncHandle  handle of the giving task
+*
+* @returns   SUCCESS if a task is waiting on the syncHandle
+* @returns   FAILURE if a task is not waiting on the syncHandle
+*
+* @comments    none.
+*
+* @end
+*
+*************************************************************************/
+
+RC_t osapiTaskInitDone(uint32 syncHandle)
+{
+  void *syncSema;
+
+  /* Ensure waiting task has set up sync semaphore */
+  while((syncSema = ( void * )syncSemaArray[syncHandle]) ==  NULL)
+  {
+    osapiTaskDelay(1);
+  }
+
+  /*
+  * Tell waiting task that I am done and can continue...
+  */
+  (void) osapiSemaGive( syncSema );
+  return(  SUCCESS );
+
+}
+
+/**************************************************************************
+*
+* @purpose  Waits for a task to complete initializaiton
+*
+* @param    synchandle  handle of task to wait for
+* @param    timeout     timeout in milliseconds to wait for task
+*
+* @returns   SUCCESS  task is initialized, continue normal
+* @returns   FAILURE  task is not init or could not sync up
+*
+* @comments    none.
+*
+* @end
+*
+*************************************************************************/
+RC_t osapiWaitForTaskInit( uint32 syncHandle,  int32 timeout )
+{
+  RC_t rc =  FAILURE;
+
+  /* Get a Binary Semaphore for synchronization with a task */
+  void *syncSema;
+
+  syncSema = osapiSemaBCreate(OSAPI_SEM_Q_FIFO, OSAPI_SEM_EMPTY);
+
+  if (syncSema ==  NULL)
+  {
+    LOG_ERROR(0);
+    return rc;
+  }
+
+  syncSemaArray[syncHandle] = syncSema;
+
+  /* Take the semaphore and wait for the task to give it back */
+  if ( osapiSemaTake(syncSema, timeout) !=  ERROR )
+  {
+    rc =  SUCCESS;
+  }
+
+  osapiSemaDelete( syncSema );
+
+  syncSemaArray[syncHandle] =  NULL;
+
+  return(rc);
+}
+
+/**************************************************************************
+*
+* @purpose  Get the task ID of a running task.
+*
+* @param    void
+*
+* @returns  task_id
+*
+* @comments    none.
+*
+* @end
+*
+*************************************************************************/
+void * osapiTaskIdSelf( void)
+{
+  return ((void *) pthread_getspecific(osapi_task_key));
+}
+
diff --git a/src/sonic-pac/hostapdmgr/Makefile.am b/src/sonic-pac/hostapdmgr/Makefile.am
new file mode 100644
index 00000000000..af8c49d3dd3
--- /dev/null
+++ b/src/sonic-pac/hostapdmgr/Makefile.am
@@ -0,0 +1,21 @@
+sonic_wpa_supp_path = $(top_srcdir)/../wpasupplicant/sonic-wpa-supplicant
+
+INCLUDES = -I $(top_srcdir)/hostapdmgr \
+           -I $(sonic_wpa_supp_path)/src/common -I $(sonic_wpa_supp_path)/src/utils \
+           -I /usr/include/libnl3 \
+           -I /usr/include/swss
+
+bin_PROGRAMS = hostapdmgrd
+
+if DEBUG
+DBGFLAGS = -ggdb -DDEBUG
+else
+DBGFLAGS = -g -DNDEBUG
+endif
+
+hostapdmgrd_SOURCES = hostapdmgr_main.cpp $(sonic_wpa_supp_path)/src/common/wpa_ctrl.c  \
+                                          $(sonic_wpa_supp_path)/src/utils/os_unix.c hostapdmgr.cpp
+
+hostapdmgrd_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(SONIC_COMMON_CFLAGS) -DCONFIG_CTRL_IFACE -DCONFIG_CTRL_IFACE_UNIX -DCONFIG_SONIC_HOSTAPD
+
+AM_LDFLAGS = -lswsscommon -lnl-3 -lnl-route-3 -lhiredis -lelf $(LIBNL_LIBS) $(SONIC_COMMON_LDFLAGS)
diff --git a/src/sonic-pac/hostapdmgr/hostapdmgr.cpp b/src/sonic-pac/hostapdmgr/hostapdmgr.cpp
new file mode 100644
index 00000000000..ae1103360fb
--- /dev/null
+++ b/src/sonic-pac/hostapdmgr/hostapdmgr.cpp
@@ -0,0 +1,1293 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <vector>
+#include <string>
+#include <netinet/in.h>
+#include <linux/if.h>
+#include "hostapdmgr.h"
+#include <cstring>
+#include <iostream>
+#include <fstream>
+#include <signal.h>
+#include <netlink/route/link.h>
+#include <swss/netmsg.h>
+#include <arpa/inet.h>
+#include <netdb.h>
+#include <unistd.h>
+#include <errno.h>
+#include "wpa_ctrl.h"
+#include "tokenize.h"
+
+#define TEAM_DRV_NAME   "team"
+
+const string INTFS_PREFIX = "E";
+const string HOSTAPD_PID_FILE = "/etc/hostapd/hostapdPid";
+
+HostapdMgr *hostapd;
+
+HostapdMgr::HostapdMgr(DBConnector *configDb, DBConnector *appDb) :
+                           m_confHostapdPortTbl(configDb, CFG_PAC_PORT_CONFIG_TABLE),
+                           m_confHostapdGlobalTbl(configDb, CFG_PAC_HOSTAPD_GLOBAL_CONFIG_TABLE),
+                           m_confRadiusServerTable(configDb, "RADIUS_SERVER"),
+                           m_confRadiusGlobalTable(configDb, "RADIUS")
+
+{
+  Logger::linkToDbNative("hostapdmgr");
+  memset(&m_glbl_info, 0, sizeof(m_glbl_info));
+  active_intf_cnt = 0;
+  start_hostapd = false;
+  stop_hostapd = false;
+
+  hostapd = this;
+}
+
+string HostapdMgr::getStdIfFormat(string key)
+{
+  if((key.find("E") == string::npos) || (key.length() > 8))
+  {
+    return key;
+  }
+  string key1("");
+  key1 = "Eth" + key.substr(1,1) + '/' + key.substr(3);
+  return key1;
+}
+
+vector<Selectable*> HostapdMgr::getSelectables() {
+    vector<Selectable *> selectables{ &m_confHostapdPortTbl, &m_confHostapdGlobalTbl, &m_confRadiusServerTable, &m_confRadiusGlobalTable};
+    return selectables;
+}
+
+bool HostapdMgr::processDbEvent(Selectable *tbl) {
+
+    SWSS_LOG_ENTER();
+    SWSS_LOG_DEBUG("Received a HOSTAPD Database event");
+
+    //check the source table and accordingly invoke the appropriate handlers
+
+    if (tbl == ((Selectable *) & m_confHostapdPortTbl)) {
+        return processHostapdConfigPortTblEvent(tbl);
+    }
+
+    if (tbl == ((Selectable *) & m_confHostapdGlobalTbl)) {
+        return processHostapdConfigGlobalTblEvent(tbl);
+    }
+
+    if (tbl == ((Selectable *) & m_confRadiusServerTable)) {
+        return processRadiusServerTblEvent(tbl);
+    }
+
+    if (tbl == ((Selectable *) & m_confRadiusGlobalTable)) {
+        return processRadiusGlobalTblEvent(tbl);
+    }
+
+    SWSS_LOG_DEBUG("Received event UNKNOWN to HOSTAPD, ignoring ");
+    return false;
+}
+
+//Process the config db table events
+
+bool HostapdMgr::processHostapdConfigPortTblEvent(Selectable *tbl) 
+{
+
+  SWSS_LOG_ENTER();
+  SWSS_LOG_DEBUG("Received an table config event on PAC_PORT_CONFIG_TABLE table");
+
+  deque<KeyOpFieldsValuesTuple> entries;
+  m_confHostapdPortTbl.pops(entries);
+
+  SWSS_LOG_NOTICE("Received %d entries", (int) entries.size());
+
+  /* Nothing popped */
+  if (entries.empty()) 
+  {
+    return false;
+  }
+
+  // Check through all the data
+  for (auto entry : entries) 
+  {
+    string key = kfvKey(entry);
+    string val = kfvOp(entry);
+
+    SWSS_LOG_NOTICE("Received %s as key and %s as OP", key.c_str(), val.c_str());
+
+    if (m_intf_info.find(key) == m_intf_info.end())
+    {
+      SWSS_LOG_NOTICE("Cannot find interface %s in local db. Adding it now", key.c_str());
+      hostapd_intf_info_t intf;
+      intf.control_mode = "force-authorized";
+      intf.capabilities = "none";
+      intf.admin_status = 0;
+      intf.link_status = 0;
+      intf.config_created = false;
+      setPort(key, intf);
+    }
+
+    SWSS_LOG_NOTICE("intf-- %s capabilities %s ctrl_mode %s admin_status %d link_status %d, global_auth %d", 
+                     key.c_str(), m_intf_info[key].capabilities.c_str(),
+                     m_intf_info[key].control_mode.c_str(),m_intf_info[key].admin_status,
+                     m_intf_info[key].link_status, m_glbl_info.enable_auth);
+
+     if (m_radius_info.radius_auth_server_list.size())
+     {
+       SWSS_LOG_NOTICE("m_radius_info.radius_auth_server_list.size() is non-zero ");
+     }
+    
+    if (val == SET_COMMAND) 
+    {
+      vector<string> new_interfaces;
+      vector<string> del_interfaces;
+
+      // Look at the data that is sent for this key
+      for (auto i : kfvFieldsValues(entry)) 
+      {
+        string a = fvField(i);
+        string b = fvValue(i);
+
+        SWSS_LOG_NOTICE("Received %s as field and %s as value", a.c_str(), b.c_str());
+
+        if ((a == "port_pae_role") && (m_intf_info[key].capabilities != b))
+        {
+          if (b == "authenticator") 
+          {
+            // pae role authenticator
+            if ((m_glbl_info.enable_auth) && (m_intf_info[key].link_status) && (!m_intf_info[key].config_created) &&
+                (m_intf_info[key].control_mode == "auto") && (m_radiusServerInUse != "")) 
+            {
+              /* create config file */
+              createConfFile(key);
+              
+              /* update interfaces list */
+              new_interfaces.push_back(key);
+            }
+          }
+          else 
+          {
+            // pae role none
+            if (m_intf_info[key].config_created)
+            {
+              /* delete config file */
+              deleteConfFile(key);
+              
+              /* update interfaces list */
+              del_interfaces.push_back(key);
+            }
+          }
+          m_intf_info[key].capabilities = b;
+        }
+        else if ((a == "port_control_mode") && (m_intf_info[key].control_mode != b))
+        {
+          if (b == "auto") 
+          {
+            // port control mode auto
+
+            if ((m_glbl_info.enable_auth) && (m_intf_info[key].link_status) && (!m_intf_info[key].config_created) &&
+                (m_intf_info[key].capabilities == "authenticator") && (m_radiusServerInUse != "")) 
+            {
+              /* create config file */
+              createConfFile(key);
+              
+              /* update interfaces list */
+              new_interfaces.push_back(key);
+            }
+          }
+          else 
+          {
+            // pae role none
+
+            if (m_intf_info[key].config_created)
+            {
+              /* delete config file */
+              deleteConfFile(key);
+              
+              /* update interfaces list */
+              del_interfaces.push_back(key);
+            }
+          }
+          m_intf_info[key].control_mode = b;
+        }
+      }
+
+      /* update JSON for new_interfaces and del_interfaces */
+      informHostapd("new", new_interfaces);
+      informHostapd("deleted", del_interfaces);
+    }
+    else if (val == DEL_COMMAND) 
+    {
+      SWSS_LOG_WARN("Unexpected DEL operation on PAC_PORT_CONFIG_TABLE, ignoring");
+      continue;
+    }   
+  }
+
+  return true;
+}
+
+bool HostapdMgr::processHostapdConfigGlobalTblEvent(Selectable *tbl) 
+{
+  SWSS_LOG_ENTER();
+  SWSS_LOG_DEBUG("Received an table config event on HOSTAPD_GLOBAL_CONFIG_TABLE table");
+
+  deque<KeyOpFieldsValuesTuple> entries;
+  m_confHostapdGlobalTbl.pops(entries);
+
+  SWSS_LOG_NOTICE("Received %d entries", (int) entries.size());
+
+  /* Nothing popped */
+  if (entries.empty()) 
+  {
+    return false;
+  }
+
+  SWSS_LOG_NOTICE("enable_auth %d: ", m_glbl_info.enable_auth);
+
+  // Check through all the data
+  for (auto entry : entries) 
+  {
+    string key = kfvKey(entry);
+    string val = kfvOp(entry);
+
+    SWSS_LOG_NOTICE("Received %s as key and %s as OP", key.c_str(), val.c_str());
+
+    if (val == SET_COMMAND) 
+    {
+      // Look at the data that is sent for this key
+      for (auto i : kfvFieldsValues(entry)) 
+      {
+        string a = fvField(i);
+        string b = fvValue(i);
+
+        SWSS_LOG_DEBUG("Received %s as field and %s as value", a.c_str(), b.c_str());
+
+        vector<string> interfaces;
+
+        if (a == "dot1x_system_auth_control" )
+        {
+          if (b == "true")
+          {
+            // dot1x enabled
+            if (!m_glbl_info.enable_auth)
+            {
+              SWSS_LOG_NOTICE("set m_glbl_info.enable_auth to 1");
+              m_glbl_info.enable_auth = 1;
+
+              for (auto const& entry: m_intf_info) 
+              {
+                SWSS_LOG_NOTICE("--intf-- %s capabilities %s ctrl_mode %s admin_status %d link_status %d, global_auth %d",
+                                entry.first.c_str(), m_intf_info[key].capabilities.c_str(), m_intf_info[key].control_mode.c_str(),
+                                m_intf_info[key].admin_status, m_intf_info[key].link_status, m_glbl_info.enable_auth);
+                if ((entry.second.capabilities == "authenticator") && (entry.second.control_mode == "auto") && 
+                    (entry.second.link_status) && (!entry.second.config_created) && (m_radiusServerInUse != ""))
+                {
+
+                  /* create config file */
+                  createConfFile(entry.first);
+
+                  /* update interfaces list */
+                  interfaces.push_back(entry.first);
+                }
+              }
+
+              /* Update JSON */
+
+              informHostapd("new", interfaces);
+            }
+          } 
+          else if (b == "false")
+          {
+            // dot1x disabled
+            if (m_glbl_info.enable_auth) 
+			{
+			  m_glbl_info.enable_auth = 0;
+			  SWSS_LOG_NOTICE("setting m_glbl_info.enable_auth to 0");
+
+			  for (auto const& entry: m_intf_info) 
+			  {
+				SWSS_LOG_NOTICE("received false for intf %s capabilities %s ctrl_mode %s admin_status %d link_status %d, global_auth %d",
+					entry.first.c_str(), m_intf_info[key].capabilities.c_str(), m_intf_info[key].control_mode.c_str(),m_intf_info[key].admin_status,
+					m_intf_info[key].link_status, m_glbl_info.enable_auth);
+
+				if (entry.second.config_created)
+				{
+				  /* delete config file */
+				  deleteConfFile(entry.first);
+
+				  /* update interfaces list */
+				  interfaces.push_back(entry.first);
+				}
+			  }
+
+			  /* Update JSON */
+			  informHostapd("deleted", interfaces);
+			}
+          }
+        }
+      }
+    }
+    else if (val == DEL_COMMAND) 
+    {
+      SWSS_LOG_WARN("Unexpected DEL operation on HOSTAPD_GLOBAL_CONFIG_TABLE, ignoring");
+      continue;
+    }   
+  }
+  return true;
+}
+
+string execute(string command) {
+   char buffer[128];
+   string result = "";
+
+   SWSS_LOG_DEBUG("command is %s", command);
+   // Open pipe to file
+   FILE* pipe = popen(command.c_str(), "r");
+   if (!pipe) {
+      return "popen failed!";
+   }
+
+   // read till end of process:
+   while (!feof(pipe)) {
+
+      // use buffer to read and add to result
+      if (fgets(buffer, 128, pipe) != NULL)
+         result += buffer;
+   }
+
+   pclose(pipe);
+   return result;
+}
+
+static bool cmp(pair<string, radius_server_info_t>& a,
+                pair<string, radius_server_info_t>& b)
+{
+  return (stoi(a.second.server_priority) > stoi(b.second.server_priority));
+}
+
+void HostapdMgr::updateRadiusServer() {
+
+   SWSS_LOG_ENTER();
+
+   SWSS_LOG_NOTICE("Update RADIUS Servers for HOSTAPD");
+
+   // Run over all radius information 
+   vector<pair<string, radius_server_info_t>> sortedMap;
+
+   for (auto& item: m_radius_info.radius_auth_server_list)
+   {
+       item.second.server_priority = (item.second.server_priority == "") ?
+                                        "0": item.second.server_priority;
+       sortedMap.push_back(item);
+   }
+
+   /*  When no Radius servers configured reset m_radiusServerInUse field */
+   if (0 == sortedMap.size())
+   {
+       m_radiusServerInUse = "";
+   }
+
+   for (auto & item: m_radius_info.radius_auth_server_list)
+   {
+       struct addrinfo* result;
+       char ip[INET6_ADDRSTRLEN+1];
+       void * src = NULL;
+
+       item.second.config_ok = false;
+
+       if (getaddrinfo(item.first.c_str(), NULL, NULL, &result) || result == NULL)
+       {
+           SWSS_LOG_WARN("skipped %s as it could not resolve.", item.first.c_str());
+           continue;
+       }
+
+       if(result->ai_family == AF_INET)
+           src = &((struct sockaddr_in*)result->ai_addr)->sin_addr;
+       else
+           src = &((struct sockaddr_in6*)result->ai_addr)->sin6_addr;
+
+       inet_ntop(result->ai_family, src, ip, INET6_ADDRSTRLEN+1);
+       freeaddrinfo(result);
+
+       //Check if radius server has key configured. If not,
+       // pick global key. If key does not exist, skip to next server. 
+       if ((item.second.server_key  == "") && (m_radius_info.m_radiusGlobalKey == ""))
+       {
+           SWSS_LOG_WARN("skipped %s as no key is configured.", item.first.c_str());
+           continue;  
+       }
+
+       string radiusIp(ip);
+       item.second.config_ok = true;
+       item.second.server_ip = radiusIp;
+       // Check against in-use radius server and
+       // update hostapd if necessary.
+       if (item.second.server_priority > m_radiusServerInUseInfo.server_priority)
+       {
+           m_radiusServerInUse = ""; 
+       }
+
+       if (m_radiusServerInUse == "")
+       {
+           m_radiusServerInUse = radiusIp;
+           m_radiusServerInUseInfo.server_port = item.second.server_port;
+           m_radiusServerInUseInfo.server_key = m_radius_info.m_radiusGlobalKey;
+           m_radiusServerInUseInfo.server_priority = item.second.server_priority;
+           if (item.second.server_key != "")
+           { 
+               m_radiusServerInUseInfo.server_key = item.second.server_key;
+           } 
+       }
+   }
+
+   if (m_glbl_info.enable_auth && m_radiusServerInUse != "")
+   {
+       // Update in use radius server and update hostapd.
+       vector<string> interfaces;
+       for (auto const& entry: m_intf_info)
+       {
+          if ((m_glbl_info.enable_auth) && (entry.second.capabilities == "authenticator") && 
+              (entry.second.control_mode == "auto") &&
+              (entry.second.link_status))
+          {
+             /* create config file */
+             createConfFile(entry.first);
+ 
+             /* update interfaces list */
+             interfaces.push_back(entry.first);
+          }
+       }
+ 
+       /* update JSON file */
+       informHostapd("modified", interfaces);
+       return; 
+   }
+
+   // Check if global auth is enabled or not 
+   else if (!m_glbl_info.enable_auth || m_radiusServerInUse == "")
+   {
+       // No valid radius server found. Delete conf files and kill hostapd. 
+       vector<string> interfaces;
+       for (auto const& entry: m_intf_info)
+       {
+           if (entry.second.config_created)
+           {
+               /* delete config file */
+               deleteConfFile(entry.first);
+              
+               /* update interfaces list */
+               interfaces.push_back(entry.first);
+           }
+       }
+        
+       /* Update JSON */
+       informHostapd("deleted", interfaces);
+   }
+   return;
+}
+
+bool HostapdMgr::processRadiusServerTblEvent(Selectable *tbl) {
+
+  SWSS_LOG_ENTER();
+  SWSS_LOG_NOTICE("Received a RADIUS SERVER event");
+
+  deque<KeyOpFieldsValuesTuple> entries;
+  m_confRadiusServerTable.pops(entries);
+
+  SWSS_LOG_NOTICE("Received %d entries", (int) entries.size());
+
+  /* Nothing popped */
+  if (entries.empty()) 
+  {
+    return false;
+  }
+
+  // Check through all the data
+  for (auto entry : entries) 
+  {
+    string key = kfvKey(entry);
+    string val = kfvOp(entry);
+    string cmd("");
+
+    SWSS_LOG_NOTICE("Received %s as key and %s as OP", key.c_str(), val.c_str());
+
+    if (val == SET_COMMAND) 
+    {
+      m_radius_info.radius_auth_server_list[key].server_port = "";
+      m_radius_info.radius_auth_server_list[key].server_key = "";
+      m_radius_info.radius_auth_server_list[key].server_priority = "";
+
+      // Look at the data that is sent for this key
+      for (auto i : kfvFieldsValues(entry)) 
+      {
+        string a = fvField(i);
+        string b = fvValue(i);
+ 
+        SWSS_LOG_NOTICE("Received %s as field and %s as value", a.c_str(), b.c_str());
+
+        if (a == "passkey")
+        {
+          m_radius_info.radius_auth_server_list[key].server_key = b;
+        } 
+        else if (a == "auth_port")
+        {
+          m_radius_info.radius_auth_server_list[key].server_port = b;
+        }
+        else if (a == "priority")
+        {
+          m_radius_info.radius_auth_server_list[key].server_priority = b;
+        }
+      }
+    }
+    else if (val == DEL_COMMAND) 
+    {
+      SWSS_LOG_WARN("DEL operation on RADIUS_SERVER table");
+
+      SWSS_LOG_NOTICE("Erasing server key");
+      // sever deleted
+      m_radius_info.radius_auth_server_list.erase(key);
+    }   
+  }
+
+  updateRadiusServer();
+
+  return true;
+}
+
+bool HostapdMgr::processRadiusGlobalTblEvent(Selectable *tbl) {
+
+  SWSS_LOG_ENTER();
+  SWSS_LOG_NOTICE("Received a RADIUS table event");
+  string key(m_radius_info.m_radiusGlobalKey);
+
+  deque<KeyOpFieldsValuesTuple> entries;
+  m_confRadiusGlobalTable.pops(entries);
+
+  SWSS_LOG_NOTICE("Received %d entries", (int) entries.size());
+
+  /* Nothing popped */
+  if (entries.empty()) 
+  {
+    return false;
+  }
+
+  // Check through all the data
+  for (auto entry : entries) 
+  {
+    string key = kfvKey(entry);
+    string val = kfvOp(entry);
+    string cmd("");
+  
+    // Global radius table modification results in a SET OP itself.
+    // Incoming field values will not have passkey or nas_ip. Hence, we intiialize to NULL
+    // so that incoming data will decide the final value.
+    m_radius_info.m_radiusGlobalKey = "";
+
+    SWSS_LOG_NOTICE("Received %s as key and %s as OP", key.c_str(), val.c_str());
+
+    if (val == SET_COMMAND) 
+    {
+      // Look at the data that is sent for this key
+      for (auto i : kfvFieldsValues(entry)) 
+      {
+        string a = fvField(i);
+        string b = fvValue(i);
+ 
+        SWSS_LOG_NOTICE("Received %s as field and %s as value", a.c_str(), b.c_str());
+
+        if (a == "passkey")
+        {
+          m_radius_info.m_radiusGlobalKey = b;
+        }
+      }
+    }
+    else if (val == DEL_COMMAND) 
+    {
+      SWSS_LOG_WARN("DEL operation on RADIUS table");
+
+      m_radius_info.m_radiusGlobalKey = "";
+    }
+  }
+
+  // Since RADIUS config has been modified, deduce the new 
+  // RADIUS server to be used and inform hostapd if required.
+  if (m_radius_info.m_radiusGlobalKey != key)
+  {
+    updateRadiusServer();
+  }
+
+  return true;
+}
+
+void HostapdMgr::onMsg(int nlmsg_type, struct nl_object *obj)
+{
+
+  SWSS_LOG_ENTER();
+
+  SWSS_LOG_DEBUG("nlmsg_type %d", nlmsg_type);
+
+  if ((nlmsg_type != RTM_NEWLINK) && (nlmsg_type != RTM_DELLINK))
+  {
+    return;
+  }
+
+  struct rtnl_link *link = (struct rtnl_link *)obj;
+  string key = rtnl_link_get_name(link);
+  SWSS_LOG_DEBUG("key %s", getStdIfFormat(key).c_str());
+
+  if (key.compare(0, INTFS_PREFIX.length(), INTFS_PREFIX))
+  {
+    return;
+  }
+
+  unsigned int flags = rtnl_link_get_flags(link);
+  bool admin = flags & IFF_UP;
+  bool oper = flags & IFF_LOWER_UP;
+
+  unsigned int ifindex = rtnl_link_get_ifindex(link);
+  char *type = rtnl_link_get_type(link);
+
+  if (type)
+  {
+    SWSS_LOG_NOTICE("nlmsg type:%d key:%s admin:%d oper:%d  ifindex:%d type:%s",
+                   nlmsg_type, getStdIfFormat(key).c_str(), admin, oper, ifindex, type);
+  }
+  else
+  {
+    SWSS_LOG_NOTICE("nlmsg type:%d key:%s admin:%d oper:%d ifindex:%d ",
+                   nlmsg_type, getStdIfFormat(key).c_str(), admin, oper, ifindex);
+  }
+
+
+  /* teamd instances are dealt in teamsyncd */
+  if (type && !strcmp(type, TEAM_DRV_NAME))
+  {
+    return;
+  }
+
+  if(key.find("E") == string::npos)
+  {
+    SWSS_LOG_NOTICE("Skipping non Ethernet interface %s", key.c_str());
+    return;
+  }
+
+  string key1("");
+
+  if(key.length() > 8)
+  {
+    // Native format: Ethernetx
+    key1 = key;
+  }
+  else
+  {
+    key1 = "Eth" + key.substr(1,1) + '/' + key.substr(3);
+  }
+
+  /* New interface handling */
+  if (m_intf_info.find(key1) == m_intf_info.end())
+  {
+    hostapd_intf_info_t intf;
+
+    intf.control_mode = "force-authorized";
+    intf.capabilities = "none";
+    intf.admin_status = 0;
+    intf.link_status = 0;
+    intf.config_created = false;
+
+    SWSS_LOG_NOTICE("New interface %s", key1.c_str());
+    setPort(key1, intf);
+  }
+
+  vector<string> interfaces;
+  
+  /* Interface delete handling */
+  if (nlmsg_type == RTM_DELLINK)
+  {
+    if (m_intf_info.find(key1) == m_intf_info.end())
+    {
+        SWSS_LOG_NOTICE("Unknown interface %s for Delete event ", key1.c_str());
+        return;
+    }
+
+    SWSS_LOG_NOTICE("Delete %s event", key1.c_str());
+
+    if (m_intf_info[key1].config_created)
+    {
+      /* delete config file */
+      deleteConfFile(key1);
+
+      /* update interfaces list */
+      interfaces.push_back(key1);
+
+      /* update JSON file */
+      informHostapd("deleted", interfaces);
+    }
+    
+    delPort(key1);
+    return;
+  }
+
+  SWSS_LOG_NOTICE(": intf %s capabilities %s ctrl_mode %s admin_status %d link_status %d, global_auth %d admin %d oper %d", key1.c_str(), m_intf_info[key1].capabilities.c_str(), m_intf_info[key1].control_mode.c_str(),m_intf_info[key1].admin_status, m_intf_info[key1].link_status, m_glbl_info.enable_auth, admin, oper);
+  /* Set the admin state first*/
+  if (admin != m_intf_info[key1].admin_status)
+  {
+    m_intf_info[key1].admin_status = admin;
+  }
+
+  /* followed by the oper state */
+  if (oper != m_intf_info[key1].link_status)
+  {
+
+    m_intf_info[key1].link_status = oper;
+
+    if ((m_glbl_info.enable_auth) && (m_intf_info[key1].capabilities == "authenticator") &&
+        (m_intf_info[key1].control_mode == "auto"))
+    { 
+
+      if ((m_intf_info[key1].link_status) && (!m_intf_info[key1].config_created) &&
+          (m_radiusServerInUse != ""))
+      {
+        /* create config file */
+        createConfFile(key1);
+        
+        /* update interfaces list */
+        interfaces.push_back(key1);
+        
+        /* update JSON file */
+        informHostapd("new", interfaces);
+      }
+      /* down't bring down hostapd interface when admin state goes down.
+       * it will get deleted with RTM_DELLINK.
+       */
+    }
+  }
+}
+
+void HostapdMgr::killHostapd(void)
+{
+  pid_t pid = getHostapdPid();
+  if (pid)
+  {
+    kill(pid, 9);
+  }
+}
+
+void HostapdMgr::setPort(const string & alias, const hostapd_intf_info_t & port)
+{
+  SWSS_LOG_ENTER();
+  m_intf_info[alias] = port; 
+}
+
+void HostapdMgr::delPort(const string & alias)
+{
+  SWSS_LOG_ENTER();
+  m_intf_info.erase(alias);
+}
+
+static bool file_exists(const string& file_name) 
+{
+  ifstream ifile;
+
+  ifile.open(file_name);
+
+  if(ifile) 
+  {
+    return true;;
+  } 
+  else 
+  {
+    return false;
+  }
+}
+
+static string getHostIntfName(string ifname) 
+{
+  size_t pos;
+  const std::string find = "/";
+  const std::string replace = "_";
+  const std::string e = "E";
+  const std::string ethernet = "Eth";
+
+  if(ifname.length() > 8)
+  {
+    // Ethernet0 format
+  }
+  else
+  {
+    // look for Eth1/1 format
+    pos = ifname.find(find);
+    
+    if (pos != string::npos)
+    {
+      while(pos != string::npos)
+      {
+          ifname.replace(pos, replace.size(), replace);
+          pos = ifname.find(find, pos + replace.size());
+      }
+      ifname.replace(0, ethernet.size(), e);
+    }
+    else
+    {
+      return ifname;
+    }
+  }
+  return ifname;
+}
+
+void HostapdMgr::informHostapd(const string& type, const vector<string> & interfaces)
+{
+  SWSS_LOG_ENTER();
+
+  string content;
+  pid_t pid = 0;
+  string pid_file(HOSTAPD_PID_FILE);
+
+  SWSS_LOG_NOTICE("informHostapd(): Interface size %d", (int) interfaces.size());
+
+  if (!interfaces.size()) {
+    return;
+  }
+
+
+  string file;
+  string cmd;
+  string cmd_pid;
+
+  file = "/etc/hostapd/hostapd_config.json";
+
+  cmd = "rm -f ";
+  cmd += file;
+
+
+  if (start_hostapd)
+  {
+    int rc = 0;
+    start_hostapd = false;
+
+  if (system(cmd.c_str()))
+  {
+     SWSS_LOG_WARN("command %s could not be executed.", cmd.c_str());
+  }
+  else
+  {
+      SWSS_LOG_NOTICE("hostapd_config json file is deleted successfully before starting hostapd");
+  }
+
+    cmd_pid = "rm -f ";
+    cmd_pid += HOSTAPD_PID_FILE;
+
+    SWSS_LOG_NOTICE("Executing %s ", cmd_pid.c_str());
+
+    rc = system(cmd_pid.c_str());
+    SWSS_LOG_NOTICE("rc = %d, errno %d(%s) ", rc, errno, strerror(errno));
+
+    if (rc < 0)
+    {
+       SWSS_LOG_WARN("%s could not be deleted.", pid_file.c_str());
+    }
+
+    // start hostapd
+
+    content = "hostapd -d -P ";
+    content += HOSTAPD_PID_FILE;
+    content += " ";
+
+    for(auto item: interfaces)
+    {
+      SWSS_LOG_NOTICE("starting hostapd on %s ", item.c_str());
+      content += "/etc/hostapd/";
+      content += getHostIntfName(item);
+      content += ".conf ";
+    }
+
+    content += " & " ;
+
+    SWSS_LOG_NOTICE("Executing: %s ", content.c_str());
+
+    rc = system(content.c_str());
+    SWSS_LOG_NOTICE("rc = %d, errno %d(%s) ", rc, errno, strerror(errno));
+
+    if (rc < 0)
+    {
+       SWSS_LOG_WARN("hostapd could not be started.");
+    }
+
+    pid = getHostapdPid();
+    if (pid)
+    {
+      SWSS_LOG_NOTICE("hostapd started with PID %d ", pid);
+    }
+    else
+    {
+      SWSS_LOG_NOTICE("hostapd could not be started: PID %d ", pid);
+    }
+
+    if (0 == waitForHostapdInit(pid))
+    {
+      SWSS_LOG_NOTICE("hostapd initialized with PID %d ", pid);
+    }
+    else
+    {
+      SWSS_LOG_NOTICE("hostapd could not be initialized with PID %d ", pid);
+    }
+  }
+  else if (stop_hostapd)
+  {
+    // kill  hostapd
+
+    stop_hostapd = false;
+
+  if (system(cmd.c_str()))
+  {
+     SWSS_LOG_WARN("command %s could not be executed.", cmd.c_str());
+  }
+  else
+  {
+      SWSS_LOG_NOTICE("hostapd_config json file is deleted successfully before stopping hostapd");
+  }
+
+
+    pid = getHostapdPid();
+
+    if (pid)
+    {
+      SWSS_LOG_NOTICE("terminating hostapd PID %d ", pid);
+      kill(pid, 9);
+    }
+    else
+    {
+      SWSS_LOG_NOTICE("hostapd PID could not be found: PID %d ", pid);
+    }
+  }
+  else 
+  {
+    string file;
+    unsigned int cnt = 10;
+
+    file = "/etc/hostapd/hostapd_config.json";
+  
+    while (cnt)
+	{  
+	  if (file_exists(file))
+	  {
+		SWSS_LOG_NOTICE("JSON file still exists. wait till the old file is read (%d)", cnt);
+        cnt--;
+		sleep(1);
+	  }
+      else
+      {
+        break;
+      }
+	}
+
+     if (0 == cnt)
+     {
+		SWSS_LOG_NOTICE("JSON file still exists. not sending signal 1 to hostapd (%d)", cnt);
+        return;
+     }
+
+    if ((type == "new") || (type == "modified")){ 
+
+      content = "{\n";
+      content += "\"";
+      content += (type + "_interfaces\": \n");
+      content += "[\n";
+
+      for(auto item: interfaces) {
+        content += "{\n";
+
+        content += "\"if_name\": ";
+
+        content += "\"";
+        content += (getHostIntfName(item) + "\",\n");
+
+        content += "\"path\": ";
+        content += "\"/etc/hostapd/";
+        content += getHostIntfName(item); 
+        content += ".conf\"";
+        content += "\n";
+        content += "}";
+
+        if (item.compare(interfaces.back())) {
+          content += ",";
+        }
+          
+        content += "\n";
+      }
+      content += "]\n";
+      content += "}\n";
+
+    }
+    else if (type == "deleted") {
+      content = "{\n";
+      content += "\"";
+      content += (type + "_interfaces\": \n");
+      content += "[\n";
+
+      for(auto item: interfaces) {
+        content += "{\n";
+        content += "\"if_name\": ";
+        content += "\"";
+        content += (getHostIntfName(item) + "\"\n");
+
+        content += "}";
+
+
+        if (item.compare(interfaces.back())) {
+          content += ",";
+        }
+          
+        content += "\n";
+      }
+      content += "]\n";
+      content += "}\n";
+    }
+    else {
+      return;
+    }
+
+    // Write to the file
+    writeToFile(file, content);
+
+    SWSS_LOG_NOTICE("sending Signal 1 to hostapd");
+
+    // signal
+    sendSignal();
+  }
+}
+
+void HostapdMgr::createConfFile(const string& intf)
+{
+  SWSS_LOG_ENTER();
+
+  string file;
+  string content;
+  bool exists = false;
+
+  file = "/etc/hostapd/";
+  file += (getHostIntfName(intf) + ".conf");
+
+  content = "interface="; 
+  content += (getHostIntfName(intf) + "\n");
+
+  content += "driver=wired\n";
+  content += "logger_stdout=63\n"; // 0x3f: Turn on for all hostapd modules
+  content += "logger_stdout_level=2\n";
+  content += "logger_syslog=-1\n";
+  content += "logger_syslog_level=2\n";
+  content += "ieee8021x=1\n";
+ 
+  content += "ctrl_interface=/var/run/hostapd\n";
+  content += "use_pae_group_addr=0\n";
+
+  vector<pair<string, radius_server_info_t>> auth_sortedMap;
+  for (auto& item: m_radius_info.radius_auth_server_list) 
+  {
+    if (false == item.second.config_ok)
+    { 
+      continue;
+    } 
+    auth_sortedMap.push_back(item);
+  }
+
+  if (0 != auth_sortedMap.size())
+  {
+      sort(auth_sortedMap.begin(), auth_sortedMap.end(), cmp);
+  }
+
+  for (auto const& item: auth_sortedMap)
+  {
+    if ((item.second.server_key  == "") && (m_radius_info.m_radiusGlobalKey == ""))
+    {
+       SWSS_LOG_WARN("Update in config file skipped %s as no key is configured.", item.first.c_str());
+       continue;
+    }
+    content += "auth_server_addr="; 
+    content += (item.second.server_ip.c_str());
+    content += "\n";
+
+    content += "auth_server_port="; 
+    content += (item.second.server_port + "\n");
+
+    content += "auth_server_shared_secret="; 
+    if (item.second.server_key  == "")
+    {
+       content += (m_radius_info.m_radiusGlobalKey + "\n");
+    }
+    else
+    {
+       content += (item.second.server_key + "\n");
+    }
+
+    /* Write only the highest priroty server */
+    break;
+  }
+
+  SWSS_LOG_NOTICE("active intf count %d ", active_intf_cnt);
+  if (file_exists(file))
+  {
+    exists = true;
+  }
+
+  // Write to the file
+  writeToFile(file, content);
+
+  if (!active_intf_cnt) 
+  {
+    SWSS_LOG_NOTICE("setting start hostapd flag to true");
+    start_hostapd = true;
+  }
+
+  if (false == exists)
+  {
+    active_intf_cnt++;
+    SWSS_LOG_NOTICE("incrementing intf count %d", active_intf_cnt);
+  }
+
+  m_intf_info[intf].config_created = true;
+}
+
+void HostapdMgr::deleteConfFile(const string& intf)
+{
+  SWSS_LOG_ENTER();
+
+  string file;
+  string cmd;
+
+  file = "/etc/hostapd/"; 
+  file += (getHostIntfName(intf) + ".conf");
+
+  cmd = "rm -f ";
+  cmd += file;
+
+  if (system(cmd.c_str()))
+  {
+     SWSS_LOG_WARN("command %s could not be executed.", cmd.c_str());
+  }
+
+  if (active_intf_cnt) 
+  {
+    SWSS_LOG_NOTICE("decrementing intf count %d", active_intf_cnt);
+    active_intf_cnt--;
+  }
+
+  if (!active_intf_cnt) 
+  {
+    stop_hostapd = true;
+    SWSS_LOG_NOTICE("setting stop hostapd flag to true");
+  }
+  m_intf_info[intf].config_created = false;
+}
+
+void HostapdMgr::writeToFile(const string& filename, const string& value)
+{
+  SWSS_LOG_ENTER();
+  ofstream file;
+
+  file.open(filename, ofstream::out | ofstream::trunc);
+
+  // Write to the file
+  file << value;
+
+  // Close the file
+  file.close();
+}
+
+void HostapdMgr::sendSignal(void)
+{
+  SWSS_LOG_ENTER();
+
+  pid_t pid = 0;
+
+  if (pid = getHostapdPid())
+  {
+    kill(pid, 1);
+  }
+}
+
+pid_t HostapdMgr::getHostapdPid(void)
+{
+  SWSS_LOG_ENTER();
+  pid_t pid = 0;
+  int count = 10;
+  
+  while (system("pidof hostapd > ./temp.out"))
+  {
+     SWSS_LOG_WARN("command could not be executed. Remaining retry(%d)..", count--);
+     usleep(100*1000);
+
+     if (count <=0)
+     {
+        return 0;
+     }
+  }
+
+  ifstream infile("./temp.out");
+  if (!infile.is_open())
+  {
+     SWSS_LOG_WARN("The PID file is not readable");
+     return 0;
+  }
+
+  string line;
+  getline(infile, line);
+  if (line.empty())
+  {
+     SWSS_LOG_WARN("The PID file is empty");
+  }
+  else
+  {
+     /*Store the PID value */
+     pid = stoi(line, nullptr, 10);
+  }
+
+  return pid;
+}
+
+int HostapdMgr::waitForHostapdInit(pid_t hostapd_pid)
+{
+  SWSS_LOG_ENTER();
+  pid_t pid = 0;
+  int count = 10;
+  string pid_file(HOSTAPD_PID_FILE);
+  
+  while (!file_exists(pid_file))
+  {
+     SWSS_LOG_WARN("%s not found. Remaining retry(%d)..", pid_file.c_str(), count--);
+     usleep(100*1000);
+
+     if (count <=0)
+     {
+        SWSS_LOG_WARN("Max retries exceeded to read from %s.", pid_file.c_str());
+        return -1;
+     }
+  }
+
+  ifstream infile(HOSTAPD_PID_FILE);
+  string line;
+  getline(infile, line);
+  if (line.empty())
+  {
+     SWSS_LOG_WARN("The PID file %s is empty", pid_file.c_str());
+     return -1;
+  }
+
+   /*Store the PID value */
+   pid = stoi(line, nullptr, 10);
+
+   SWSS_LOG_NOTICE("%s has pid %d", pid_file.c_str(), pid);
+   SWSS_LOG_NOTICE("hostapd_pid = %d", hostapd_pid);
+
+   return (pid == hostapd_pid)? 0 : -1;
+}
+
diff --git a/src/sonic-pac/hostapdmgr/hostapdmgr.h b/src/sonic-pac/hostapdmgr/hostapdmgr.h
new file mode 100644
index 00000000000..c05ff3f0a67
--- /dev/null
+++ b/src/sonic-pac/hostapdmgr/hostapdmgr.h
@@ -0,0 +1,115 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _HOSTAPDMGR_H_
+#define _HOSTAPDMGR_H_
+
+#include <swss/dbconnector.h>
+#include <swss/schema.h>
+#include <swss/table.h>
+#include <swss/macaddress.h>
+#include <swss/notificationproducer.h>
+#include <swss/subscriberstatetable.h>
+#include <swss/producerstatetable.h>
+#include <swss/table.h>
+#include <swss/select.h>
+#include <swss/timestamp.h>
+#include <map>
+#include <string>
+#include "netmsg.h"
+#include "redisapi.h"
+
+using namespace swss;
+using namespace std;
+
+void hostapdHandleDumpError(void *cbData);
+
+typedef struct hostapd_glbl_info_s {
+  unsigned int enable_auth;
+}hostapd_glbl_info_t;
+  
+typedef struct hostapd_intf_info_s {
+  std::string capabilities;
+  std::string control_mode;
+  unsigned int admin_status;
+  unsigned int link_status;
+  bool config_created;
+}hostapd_intf_info_t;
+
+typedef struct radius_server_info_s {
+  std::string server_port;
+  std::string server_key;
+  std::string server_priority;
+  std::string server_ip;
+  bool config_ok;
+}radius_server_info_t;
+
+typedef std::map<std::string, radius_server_info_t> radius_server_info_map_t;
+
+typedef struct radius_info_s {
+  string m_radiusGlobalKey;
+  radius_server_info_map_t radius_auth_server_list;  
+}radius_info_t;
+
+typedef std::map<std::string, hostapd_intf_info_t> hostapd_intf_info_map_t;
+
+class HostapdMgr : public NetMsg
+{ 
+public:
+  HostapdMgr(DBConnector *configDb, DBConnector *appDb);
+  std::vector<Selectable*> getSelectables();
+  bool processDbEvent(Selectable *source);
+  virtual void onMsg(int nlmsg_type, struct nl_object *obj);
+  void killHostapd(void);
+  string getStdIfFormat(string intf);
+
+private:
+  //tables this component listens to
+  SubscriberStateTable m_confHostapdPortTbl;
+  SubscriberStateTable m_confHostapdGlobalTbl;
+  SubscriberStateTable m_confRadiusServerTable;
+  SubscriberStateTable m_confRadiusGlobalTable;
+
+  hostapd_glbl_info_t m_glbl_info;
+  hostapd_intf_info_map_t m_intf_info;
+  radius_info_t m_radius_info;
+  string m_radiusServerInUse;
+  radius_server_info_t m_radiusServerInUseInfo;
+  unsigned int active_intf_cnt;
+
+  bool start_hostapd;
+  bool stop_hostapd;
+
+  void setPort(const string & alias, const hostapd_intf_info_t &intf_info);
+  void delPort(const string & alias);
+    
+  // DB Event handler functions
+  bool processHostapdConfigPortTblEvent(Selectable *tbl);
+  bool processHostapdConfigGlobalTblEvent(Selectable *tbl);
+  bool processRadiusServerTblEvent(Selectable *tbl);
+  bool processRadiusGlobalTblEvent(Selectable *tbl);
+
+  void writeToFile(const string& filename, const string& value);
+  void informHostapd(const string& type, const vector<string> & interfaces);
+  void createConfFile(const string& intf);
+  void deleteConfFile(const string& intf);
+  pid_t getHostapdPid(void);
+  int waitForHostapdInit(pid_t hostapd_pid);
+  void sendSignal(void);
+  void updateRadiusServer();
+};
+
+#endif // _HOSTAPDMGR_H_
diff --git a/src/sonic-pac/hostapdmgr/hostapdmgr_main.cpp b/src/sonic-pac/hostapdmgr/hostapdmgr_main.cpp
new file mode 100644
index 00000000000..db48b744885
--- /dev/null
+++ b/src/sonic-pac/hostapdmgr/hostapdmgr_main.cpp
@@ -0,0 +1,100 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <swss/subscriberstatetable.h>
+#include <swss/select.h>
+#include "netdispatcher.h"
+#include "netlink.h"
+#include "select.h"
+#include <iostream>
+#include "hostapdmgr.h"
+#include <unistd.h>
+
+int main(int argc, char *argv[])
+{
+  swss::DBConnector configDb("CONFIG_DB", 0);
+  swss::DBConnector stateDb("STATE_DB", 0);
+  swss::DBConnector appDb("APPL_DB", 0);
+  swss::DBConnector log_db(LOGLEVEL_DB, DBConnector::DEFAULT_UNIXSOCKET, 0);
+  HostapdMgr hostapd(&configDb, &appDb);
+
+  try
+  {
+    SWSS_LOG_NOTICE("-----Starting HostapdMgr-----");
+
+    //register for the table events
+    swss::Select s;
+    s.addSelectables(hostapd.getSelectables());
+
+    //register for the table events
+    NetLink netlink;
+    netlink.registerGroup(RTNLGRP_LINK);
+    netlink.dumpRequest(RTM_GETLINK);
+
+    // kill any stale hostapd
+    hostapd.killHostapd();
+
+    // cleanup stale hostapd conf files
+    string cmd = "rm -f /etc/hostapd/E*.conf";
+    if (system(cmd.c_str()))
+    {
+      SWSS_LOG_WARN("Could not delete stale conf files.");
+    }
+
+    // remove stale hostapd_config.json
+    cmd = "rm -f /etc/hostapd/hostapd_config.json";
+    if (system(cmd.c_str()))
+    {
+      SWSS_LOG_WARN("Could not delete stale hostapd_config.json file.");
+    }
+
+    // cleanup stale hostapd socket files
+    cmd = "rm -f /var/run/hostapd/E*";
+    if (system(cmd.c_str()))
+    {
+      SWSS_LOG_WARN("Could not delete stale hostapd socket files.");
+    }
+
+
+    NetDispatcher::getInstance().registerMessageHandler(RTM_NEWLINK, (swss::NetMsg*)&hostapd);
+    NetDispatcher::getInstance().registerMessageHandler(RTM_DELLINK, (swss::NetMsg*)&hostapd);
+
+    s.addSelectable(&netlink);
+
+    //wait for the events and process them
+    while (1)
+    {
+      SWSS_LOG_NOTICE("Waiting for HOSTAPD Table Events");
+
+      swss::Selectable *sel = NULL;
+      int ret;
+
+      ret = s.select(&sel);
+
+      if (sel != &netlink)
+      {
+        //Pass on the processing to the Hostapd Manager
+        hostapd.processDbEvent(sel);
+      }
+    }
+  }
+  catch (const exception &e)
+  {
+    SWSS_LOG_ERROR("Runtime error: %s", e.what());
+  }
+
+  return -1;
+}
+
diff --git a/src/sonic-pac/mab/Makefile.am b/src/sonic-pac/mab/Makefile.am
new file mode 100644
index 00000000000..bc423260d7e
--- /dev/null
+++ b/src/sonic-pac/mab/Makefile.am
@@ -0,0 +1,28 @@
+sonic_wpa_supp_path = $(top_srcdir)/../wpasupplicant/sonic-wpa-supplicant
+radius_lib_path = $(top_srcdir)/../wpasupplicant/sonic-wpa-supplicant/build/radius_lib
+radius_lib = $(radius_lib_path)/src/radius/libradius.a
+utils_lib  = $(radius_lib_path)/src/utils/libutils.a
+crypto_lib = $(radius_lib_path)/src/crypto/libcrypto.a
+
+INCLUDES =  -I $(top_srcdir)/fpinfra/inc -I $(top_srcdir)/mab/common -I $(top_srcdir)/mab/mapping/mab_sid -I $(top_srcdir)/mab/mapping/include -I $(top_srcdir)/mab/protocol/include -I $(top_srcdir)/authmgr/common -I $(sonic_wpa_supp_path)/src/utils -I $(sonic_wpa_supp_path)/src/radius 
+
+
+#bin_PROGRAMS = mabd 
+lib_LTLIBRARIES = libmab.la 
+
+if DEBUG
+DBGFLAGS = -ggdb -DDEBUG
+else
+DBGFLAGS = -g -DNDEBUG
+endif
+
+AM_CPPFLAGS = -save-temps -Wall -Wno-pointer-sign -Wno-unused-but-set-variable -Wno-address -Wno-array-bounds -Wno-sequence-point -Wno-switch -Wno-uninitialized -Wno-unused-result -Wno-aggressive-loop-optimizations -Wno-sizeof-pointer-memaccess -Wno-unused-local-typedefs -Wno-unused-value -Wno-format-truncation -g  -Werror $(SONIC_COMMON_CFLAGS) -DCONFIG_SONIC_RADIUS
+
+libmab_la_SOURCES = mapping/mab_socket.c mapping/mab_init.c mapping/mab_cfg.c mapping/mab_api.c mapping/mab_client.c mapping/mab_ih.c mapping/mab_debug.c mapping/mab_sid/mab_sid.c mapping/mab_auth_mgr.c protocol/mab_db.c mapping/mab_control.c protocol/mab_mac_db.c protocol/mab_vlan.c  protocol/mab_utils.c protocol/mab_auth.c protocol/mab_local.c protocol/mab_timer.c protocol/mab_radius.c $(sonic_wpa_supp_path)/src/radius/radius_mab.c 
+
+
+libmab_la_LIBADD = -lpthread -lswsscommon -L$(top_srcdir)/fpinfra/ -lfpinfra $(radius_lib) $(utils_lib) $(crypto_lib) -lrt $(SONIC_COMMON_LDFLAGS)
+
+$(radius_lib) $(utils_lib) $(crypto_lib):
+	cd $(sonic_wpa_supp_path)/radius_lib && make
+
diff --git a/src/sonic-pac/mab/common/mab_api.h b/src/sonic-pac/mab/common/mab_api.h
new file mode 100755
index 00000000000..9f0367c61c9
--- /dev/null
+++ b/src/sonic-pac/mab/common/mab_api.h
@@ -0,0 +1,215 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef INCLUDE_MAB_API_H
+#define INCLUDE_MAB_API_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "pacinfra_common.h"
+#include "auth_mgr_exports.h"
+#include "mab_exports.h"
+
+/*********************************************************************
+* @purpose  Set the MAB value on the port.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    mabEnable   @b{(output)} boolean value determining if MAB 
+*                                    has been configured on the port 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+* @results   REQUEST_DENIED     if port control mode of the port is 
+*                                 not mac-based  
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortMABEnableSet(uint32 intIfNum, uint32 mabEnable);
+
+/*********************************************************************
+* @purpose  Get the operational MAB value on the port.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    mabEnabled    @b{(output)} value determining if MAB 
+*                                     has been operationally 
+*                                     enabled on the port 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortOperMABEnabledGet(uint32 intIfNum, uint32 *mabEnabled);
+
+/*********************************************************************
+* @purpose  Set the authentication type on the port to be used by MAB.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    auth_type     @b{(input)} Authentication type {EAP-MD5 or PAP} 
+*
+* @returns   SUCCESS            if able to set the auth_type successfully
+* @results   REQUEST_DENIED     if MAB is not enabled on that port
+* @returns   FAILURE            otherwise
+*
+* @comments
+*       
+* @end 
+*********************************************************************/
+RC_t mabPortMABAuthTypeSet(uint32 intIfNum,
+                               AUTHMGR_PORT_MAB_AUTH_TYPE_t auth_type);
+
+/*********************************************************************
+* @purpose  Determine if the interface is valid to participate in mab
+*
+* @param    intIfNum              @b{(input)} internal interface number
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+ BOOL mabIsValidIntf(uint32 intIfNum);
+
+/*********************************************************************
+* @purpose  Determine if the interface type is valid to participate in mab
+*
+* @param    sysIntfType              @b{(input)} interface type
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+ BOOL mabIsValidIntfType(uint32 sysIntfType);
+
+/*********************************************************************
+* @purpose  Set port control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    portControl @b{(input)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortControlModeSet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl);
+
+/*********************************************************************
+* @purpose  Set host control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    hostControl @b{(input)} host control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortControlHostModeSet(uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t hostMode);
+
+/*********************************************************************
+  * @purpose  Handle Auth Manager event
+  *
+  * @param    intIfNum    @b{(input)} internal interface number
+  * @param    event       @b{(input)} event
+  * @param    macAddr     @b{(input)} client mac address
+  *
+  * @returns   SUCCESS
+  * @returns   FAILURE
+  *
+  * @comments
+  *
+  * @end
+  *********************************************************************/
+RC_t mabClientEventUpdate(uint32 intIfNum, uint32 event,  enetMacAddr_t *macAddr);
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of the first valid interface for
+*           mab.
+*
+* @param    pFirstIntIfNum @b{(output)}  pointer to first internal interface number
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabFirstValidIntfNumber(uint32 *pFirstIntIfNum);
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of next valid interface for
+*           mab.
+*
+* @param    intIfNum  @b{(input)}   Internal Interface Number
+* @param    pNextintIfNum @b{(output)}  pointer to Next Internal Interface Number,
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabNextValidIntf(uint32 intIfNum, uint32 *pNextIntIfNum);
+
+/*********************************************************************
+* @purpose  Update the RADIUS server configuration
+*
+* @param    add           @b{(input)} whether server should be added or deleted
+* @param    radius_type   @b{(input)} radius server type
+* @param    serv_addr     @b{(input)} radius server address
+* @param    serv_priority @b{(input)} radius server priority
+* @param    radius_key    @b{(input)} radius server key
+* @param    serv_port     @b{(input)} radius server port
+*
+* @returns   SUCCESS    values are valid and are updated successfully
+* @returns   FAILURE    otherwise
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t mabRadiusServerUpdate(uint32 cmd, const char *radius_type,
+                              const char *serv_addr, const char *serv_priority,
+                              const char *radius_key, const char *serv_port);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_API_H */
diff --git a/src/sonic-pac/mab/common/mab_common.h b/src/sonic-pac/mab/common/mab_common.h
new file mode 100644
index 00000000000..48ec6509c1d
--- /dev/null
+++ b/src/sonic-pac/mab/common/mab_common.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef INCLUDE_MAB_COMMON_H
+#define INCLUDE_MAB_COMMON_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+#include "resources.h"
+
+#define  MAB_INTF_MAX_COUNT ( MAX_PORT_COUNT + 1)
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_COMMON_H */
diff --git a/src/sonic-pac/mab/common/mab_exports.h b/src/sonic-pac/mab/common/mab_exports.h
new file mode 100755
index 00000000000..125a5858ef4
--- /dev/null
+++ b/src/sonic-pac/mab/common/mab_exports.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __MAB_EXPORTS_H_
+#define __MAB_EXPORTS_H_
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define  MAB_MAX_USERS_PER_PORT        FD_AUTHMGR_PORT_MAX_USERS
+
+#define  MAB_USER_NAME_LEN             65
+#define  MAB_CHALLENGE_LEN             32
+
+#define  MAB_CHAP_CHALLENGE_LEN        16
+#define  MAB_FILTER_NAME_LEN           256
+
+/* Port protocol version */
+typedef enum
+{
+   MAB_PAE_PORT_PROTOCOL_VERSION_1 = 1
+}  MAB_PAE_PORT_PROTOCOL_VERSION_t;
+
+/******************** conditional Override *****************************/
+
+#ifdef INCLUDE_MAB_EXPORTS_OVERRIDES
+#include "mab_exports_overrides.h"
+#endif
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAB_EXPORTS_H_*/
diff --git a/src/sonic-pac/mab/mapping/mab_api.c b/src/sonic-pac/mab/mapping/mab_api.c
new file mode 100755
index 00000000000..f11725243aa
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_api.c
@@ -0,0 +1,374 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "auth_mgr_api.h"
+#include "mab_include.h"
+#include "osapi.h"
+#include "mab_vlan.h"
+#include "mab_struct.h"
+
+extern mabBlock_t *mabBlock;
+
+/*********************************************************************
+* @purpose  Set the MAB value on the port.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    mabEnable   @b{(output)} boolean value determining if MAB 
+*                                    has been configured on the port 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+* @results   REQUEST_DENIED     if port control mode of the port is 
+*                                 not mac-based  
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortMABEnableSet(uint32 intIfNum, uint32 mabEnable)
+{
+  mabPortCfg_t *pCfg;
+  uint32 event = 0;
+
+  if (mabIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  if (mabEnable !=  ENABLE && mabEnable !=  DISABLE)
+    return  FAILURE;
+
+  if (mabEnable ==  ENABLE)
+  {
+    pCfg->mabEnabled =  ENABLE;
+    event =  mabMgmtPortMABEnableSet;
+  }
+  else 
+  {
+    pCfg->mabEnabled =  DISABLE;
+    event = mabMgmtPortMABDisableSet;  
+  }
+  pCfg->mabAuthType = FD_MAB_PORT_MAB_AUTH_TYPE;
+
+  return mabIssueCmd(event, intIfNum, &mabEnable);;
+}
+
+/*********************************************************************
+* @purpose  Get the operational MAB value on the port.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    mabEnable   @b{(output)} value determining if MAB 
+*                                     has been operationally 
+*                                     enabled on the port 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortOperMABEnabledGet(uint32 intIfNum, uint32 *mabEnable)
+{
+  if (mabIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  *mabEnable = mabBlock->mabPortInfo[intIfNum].mabEnabled;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set the authentication type on the port to be used by MAB.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    auth_type     @b{(input)} Authentication type {EAP-MD5 or PAP} 
+*
+* @returns   SUCCESS            if able to set the auth_type successfully
+* @results   REQUEST_DENIED     if MAB is not enabled on that port
+* @returns   FAILURE            otherwise
+*
+* @comments
+*       
+* @end 
+*********************************************************************/
+RC_t mabPortMABAuthTypeSet(uint32 intIfNum,
+                               AUTHMGR_PORT_MAB_AUTH_TYPE_t auth_type)
+{
+  mabPortCfg_t *pCfg =  NULLPTR;
+
+  if (( AUTHMGR_PORT_MAB_AUTH_TYPE_INVALID >= auth_type) ||
+      ( AUTHMGR_PORT_MAB_AUTH_TYPE_LAST <= auth_type))
+  {
+    /* Invalid input arguments */
+    return  FAILURE;
+  }
+
+  if ( TRUE != mabIsValidIntf(intIfNum))
+  {
+    return  FAILURE;
+  }
+
+  if (( TRUE != mabIntfIsConfigurable(intIfNum, &pCfg)) ||
+      ( NULLPTR == pCfg))
+  {
+    return  FAILURE;
+  }
+
+  /* check if MAB has been configured for the port */
+  if ( ENABLE != pCfg->mabEnabled)
+  {
+    return  REQUEST_DENIED;
+  }
+
+  pCfg->mabAuthType = auth_type;
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Determine if the interface is valid to participate in mab
+*
+* @param    intIfNum              @b{(input)} internal interface number
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+ BOOL mabIsValidIntf(uint32 intIfNum)
+{
+  INTF_TYPES_t sysIntfType;
+
+  if ((nimGetIntfType(intIfNum, &sysIntfType) !=  SUCCESS) || 
+      (mabIsValidIntfType(sysIntfType) !=  TRUE))
+  {
+    return  FALSE;
+  }
+
+  return  TRUE;
+}
+
+/*********************************************************************
+* @purpose  Determine if the interface type is valid to participate in mab
+*
+* @param    sysIntfType              @b{(input)} interface type
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+ BOOL mabIsValidIntfType(uint32 sysIntfType)
+{
+  if (sysIntfType !=  PHYSICAL_INTF)
+    return  FALSE;
+
+  return  TRUE;
+}
+
+/*********************************************************************
+* @purpose  Set port control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    portControl @b{(input)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortControlModeSet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl)
+{
+  mabPortCfg_t *pCfg;
+
+  if (mabIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  return mabIssueCmd(mabMgmtPortControlModeSet, intIfNum, &portControl);
+}
+
+/*********************************************************************
+* @purpose  Set host control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    hostControl @b{(input)} host control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortControlHostModeSet(uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t hostMode)
+{
+  mabPortCfg_t *pCfg;
+
+  if (mabIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  return mabIssueCmd(mabMgmtPortHostModeSet, intIfNum, &hostMode);
+}
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of the first valid interface for
+*           mab.
+*
+* @param    pFirstIntIfNum @b{(output)}  pointer to first internal interface number
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabFirstValidIntfNumber(uint32 *pFirstIntIfNum)
+{
+  RC_t rc =  FAILURE;
+  nimUSP_t usp;
+  uint32 intIfNum =  NULL;
+  
+  if ( SUCCESS == nimFirstValidIntfNumberByType( PHYSICAL_INTF, &intIfNum))
+  {
+    memset(&usp, 0, sizeof(usp));
+    if (( SUCCESS == nimGetUnitSlotPort(intIfNum, &usp)))
+    {    
+      rc = mabNextValidIntf(intIfNum, &intIfNum);
+    }
+    else
+    {
+      rc =  SUCCESS;
+    }
+    
+    if ( SUCCESS == rc)
+    {
+      /* Copy the valid interface in the output pointer */
+      *pFirstIntIfNum = intIfNum;
+    }
+  } 
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of next valid interface for
+*           mab.
+*
+* @param    intIfNum  @b{(input)}   Internal Interface Number
+* @param    pNextintIfNum @b{(output)}  pointer to Next Internal Interface Number,
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabNextValidIntf(uint32 intIfNum, uint32 *pNextIntIfNum)
+{
+  RC_t rc =  FAILURE;
+  nimUSP_t usp;
+  uint32 nextIntIfNum = intIfNum;
+
+  while ( SUCCESS == nimNextValidIntfNumberByType( PHYSICAL_INTF, nextIntIfNum, &nextIntIfNum))
+  {
+    memset(&usp, 0, sizeof(usp));
+    if ( SUCCESS == nimGetUnitSlotPort(nextIntIfNum, &usp))
+    {
+      /* Next mab valid interface found. */
+      *pNextIntIfNum = nextIntIfNum;
+      rc =  SUCCESS;
+      break;
+    }
+  }
+
+  return rc;
+
+}
+
+/*********************************************************************
+* @purpose  Update the RADIUS server configuration
+*
+* @param    add           @b{(input)} whether server should be added or deleted
+* @param    radius_type   @b{(input)} radius server type
+* @param    serv_addr     @b{(input)} radius server address
+* @param    serv_priority @b{(input)} radius server priority
+* @param    radius_key    @b{(input)} radius server key
+* @param    serv_port     @b{(input)} radius server port
+*
+* @returns   SUCCESS    values are valid and are updated successfully
+* @returns   FAILURE    otherwise
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t mabRadiusServerUpdate(uint32 cmd, const char *radius_type,
+                              const char *serv_addr, const char *serv_priority,
+                              const char *radius_key, const char *serv_port)
+{
+  mabRadiusServer_t msg;
+  RC_t rc =  SUCCESS;
+
+  memset(&msg, 0, sizeof(msg));
+  
+  msg.cmd = cmd;
+
+  if (radius_type)
+    osapiStrncpySafe(msg.cmd_data.server.radius_type, radius_type, sizeof(msg.cmd_data.server.radius_type)-1);
+
+  if (serv_addr)
+    osapiStrncpySafe(msg.cmd_data.server.serv_addr, serv_addr, sizeof(msg.cmd_data.server.serv_addr)-1);
+
+  if (serv_port)
+  {
+    osapiStrncpySafe(msg.cmd_data.server.serv_port, serv_port, sizeof(msg.cmd_data.server.serv_port)-1);
+    MAB_EVENT_TRACE("%s: cfg update for server %s port %s", __FUNCTION__, serv_addr, serv_port);
+  }
+
+  if (serv_priority)
+  {
+    osapiStrncpySafe(msg.cmd_data.server.serv_priority, serv_priority, sizeof(msg.cmd_data.server.serv_priority)-1);
+    MAB_EVENT_TRACE("%s: cfg update for server %s priority %s", __FUNCTION__, serv_addr, serv_priority);
+  }
+
+  if (radius_key)
+  {
+    osapiStrncpySafe(msg.cmd_data.server.key.key, radius_key, sizeof(msg.cmd_data.server.key.key)-1);
+    msg.cmd_data.server.key.key_len = strlen(radius_key);
+    MAB_EVENT_TRACE("%s: cfg update for server %s key len %d", __FUNCTION__, serv_addr, (unsigned int)strlen(radius_key));
+  }
+
+  rc = mabIssueCmd(mabRadiusConfigUpdate, 0, &msg);
+
+  MAB_EVENT_TRACE("%s:Sent cfg update for server %s rc = %d", __FUNCTION__, serv_addr, rc);
+  return rc;
+}
diff --git a/src/sonic-pac/mab/mapping/mab_auth_mgr.c b/src/sonic-pac/mab/mapping/mab_auth_mgr.c
new file mode 100644
index 00000000000..181dc0de1d5
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_auth_mgr.c
@@ -0,0 +1,330 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <netdb.h>
+#include <netinet/in.h>
+#include "includes.h"
+#include "pacinfra_common.h"
+#include "mab_include.h"
+#include "radius_attr_parse.h"
+#include "packet.h"
+#include "osapi.h"
+#include "auth_mgr_exports.h"
+#include "fpSonicUtils.h"
+
+#define STATUS_COPY(_status)  static void _status##_##copy(char *intf, clientStatusReply_t *reply, char *addr, void *param)
+#define STATUS_ENTER(_status, _intf, _reply, _addr, _param)  _status##_##copy(_intf, _reply, _addr,  _param)
+#define ETHERNET_PREFIX "Ethernet"
+
+#define STATUS_MALLOC(__status, __data, _reply)  \
+  do { \
+       reply = (clientStatusReply_t *)malloc(sizeof(*_reply)); \
+       memset(_reply, 0, sizeof(*_reply)); \
+  } while(0); 
+
+
+typedef struct status_map_s
+{
+ char *status;
+ unsigned int val;
+}status_map_t;
+
+static int mab_data_async_send (char *buf, int bufLen, unsigned char *addr) 
+{
+  struct sockaddr_in saddr;
+  int fd, ret_val;
+  struct hostent *local_host;	/* need netdb.h for this */
+  int i;
+  char *ptr = buf;
+  struct linger sl;
+  struct sockaddr_in client;
+  socklen_t clientlen = sizeof(client);
+
+  printf("buffer: ");  
+  for (i =0; i<10; i++)
+  {
+    printf("0x%x ", ptr[i]);  
+  }
+  printf("\n");  
+
+	/* Step1: create a TCP socket */
+	fd = socket(AF_INET, SOCK_STREAM, 0); 
+	if (fd == -1)
+	{
+		fprintf(stderr, "socket failed [%s]\n", strerror(errno));
+		return -1;
+	}
+
+     MAB_EVENT_TRACE(
+	"Created a socket with fd: %d", fd);
+
+	/* Let us initialize the server address structure */
+	saddr.sin_family = AF_INET;         
+	saddr.sin_port = htons(3434);     
+	local_host = gethostbyname("127.0.0.1");
+	saddr.sin_addr = *((struct in_addr *)local_host->h_addr);
+
+	/* Step2: connect to the server socket */
+	ret_val = connect(fd, (struct sockaddr *)&saddr, sizeof(struct sockaddr_in));
+	if (ret_val == -1)
+	{
+		fprintf(stderr, "connect failed [%s]\n", strerror(errno));
+		close(fd);
+		return -1;
+	}
+    getsockname(fd, (struct sockaddr *) &client, &clientlen);
+
+    if (addr)
+    {
+     MAB_EVENT_TRACE(
+       " The Socket is now connected fd %d [%s:%u]"
+       " mac (%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x)",
+       fd, inet_ntoa(client.sin_addr), ntohs(client.sin_port), 
+       addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
+    }
+    else
+    {
+     MAB_EVENT_TRACE(
+       "The Socket is now connected fd %d [%s:%u] ", 
+       fd, inet_ntoa(client.sin_addr), ntohs(client.sin_port));
+    }
+
+    sl.l_onoff = 1;  /* enable linger option */
+    sl.l_linger = 30;    /* timeout interval in seconds */
+    if (-1 == setsockopt(fd, SOL_SOCKET, SO_LINGER, &sl, sizeof(sl)))
+    {
+     MAB_EVENT_TRACE(
+      "unable to set SO_LINGER option socket with fd: %d", fd);
+    }
+
+	/* Next step: send some data */
+	ret_val = send(fd, buf, bufLen, 0);
+     MAB_EVENT_TRACE(
+	   "fd : %d Successfully sent data (len %d bytes): %s", 
+				 fd, bufLen, buf);
+
+	/* Last step: close the socket */
+	close(fd);
+	return 0;
+}
+
+STATUS_COPY(AUTH_SUCCESS)
+{
+	authmgrClientStatusInfo_t *clientInfo = (authmgrClientStatusInfo_t *)param;
+	memset(reply, 0, sizeof(*reply));
+
+	if (addr)
+	{
+		memcpy(reply->info.authInfo.addr, addr, 6);
+	}
+	osapiStrncpySafe (reply->method, "mab", sizeof(reply->method)-1);
+	reply->status = AUTH_SUCCESS; 
+	osapiStrncpySafe (reply->intf, intf, sizeof(reply->intf)-1);
+
+	/* copy user details */
+	memcpy(reply->info.authInfo.userName, clientInfo->info.authInfo.authmgrUserName,
+                min(sizeof(clientInfo->info.authInfo.authmgrUserName), sizeof(clientInfo->info.authInfo.authmgrUserName)));
+	reply->info.authInfo.userNameLength = strlen(clientInfo->info.authInfo.authmgrUserName);
+
+	/* copy bam used for authentication */
+	osapiStrncpySafe(reply->info.authInfo.bam_used, "radius", sizeof(reply->info.authInfo.bam_used)-1);
+
+	/* copy all the attributes received from radius/ or backend method */
+        memcpy(&reply->info.authInfo.attrInfo, &clientInfo->info.authInfo.attrInfo, sizeof(attrInfo_t));
+}
+
+
+
+STATUS_COPY(AUTH_FAIL)
+{
+	authmgrClientStatusInfo_t *clientInfo = (authmgrClientStatusInfo_t *)param;
+
+	memset(reply, 0, sizeof(*reply));
+	if (addr)
+	{
+			memcpy(reply->info.authInfo.addr, addr, 6);
+	}
+	osapiStrncpySafe (reply->method, "mab", sizeof(reply->method)-1);
+	reply->status = AUTH_FAIL; 
+	osapiStrncpySafe (reply->intf, intf, sizeof(reply->intf)-1);
+
+	/* copy user details */
+	memcpy(reply->info.authInfo.userName, clientInfo->info.authInfo.authmgrUserName,
+                min(sizeof(clientInfo->info.authInfo.authmgrUserName), sizeof(clientInfo->info.authInfo.authmgrUserName)));
+	reply->info.authInfo.userNameLength = strlen(clientInfo->info.authInfo.authmgrUserName);
+}
+
+
+STATUS_COPY(AUTH_TIMEOUT)
+{
+	authmgrClientStatusInfo_t *clientInfo = (authmgrClientStatusInfo_t *)param;
+
+	memset(reply, 0, sizeof(*reply));
+	if (addr)
+	{
+			memcpy(reply->info.authInfo.addr, addr, 6);
+	}
+	osapiStrncpySafe (reply->method, "mab", sizeof(reply->method)-1);
+	reply->status = AUTH_TIMEOUT; 
+	osapiStrncpySafe (reply->intf, intf, sizeof(reply->intf)-1);
+
+	/* copy user details */
+	memcpy(reply->info.authInfo.userName, clientInfo->info.authInfo.authmgrUserName,
+                min(sizeof(clientInfo->info.authInfo.authmgrUserName), sizeof(clientInfo->info.authInfo.authmgrUserName)));
+	reply->info.authInfo.userNameLength = strlen(clientInfo->info.authInfo.authmgrUserName);
+}
+
+
+STATUS_COPY(AUTH_SERVER_COMM_FAILURE)
+{
+	authmgrClientStatusInfo_t *clientInfo = (authmgrClientStatusInfo_t *)param;
+
+	memset(reply, 0, sizeof(*reply));
+	if (addr)
+	{
+			memcpy(reply->info.authInfo.addr, addr, 6);
+	}
+	osapiStrncpySafe (reply->method, "mab", sizeof(reply->method)-1);
+	reply->status = AUTH_SERVER_COMM_FAILURE; 
+	osapiStrncpySafe (reply->intf, intf, sizeof(reply->intf)-1);
+
+	/* copy user details */
+	memcpy(reply->info.authInfo.userName, clientInfo->info.authInfo.authmgrUserName,
+                min(sizeof(clientInfo->info.authInfo.authmgrUserName), sizeof(clientInfo->info.authInfo.authmgrUserName)));
+	reply->info.authInfo.userNameLength = strlen(clientInfo->info.authInfo.authmgrUserName);
+}
+
+
+STATUS_COPY(METHOD_CHANGE)
+{
+	 authmgrClientStatusInfo_t *clientInfo = (authmgrClientStatusInfo_t *)param;
+
+	memset(reply, 0, sizeof(*reply));
+	if (addr)
+	{
+			memcpy(reply->info.authInfo.addr, addr, 6);
+	}
+	osapiStrncpySafe (reply->method, "mab", sizeof(reply->method)-1);
+	reply->status = METHOD_CHANGE; 
+
+	osapiStrncpySafe (reply->intf, intf, sizeof(reply->intf)-1);
+
+  if (clientInfo->info.enableStatus)
+  {
+    osapiStrncpySafe (reply->info.enableStatus, "enable", strlen("enable")+1);
+  }
+  else
+  {
+    osapiStrncpySafe (reply->info.enableStatus, "disable", strlen("disable")+1);
+  }
+
+}
+
+STATUS_COPY(RADIUS_SERVERS_DEAD)
+{
+	authmgrClientStatusInfo_t *clientInfo = (authmgrClientStatusInfo_t *)param;
+
+	memset(reply, 0, sizeof(*reply));
+	if (addr)
+	{
+			memcpy(reply->info.authInfo.addr, addr, 6);
+	}
+	osapiStrncpySafe (reply->method, "mab", sizeof(reply->method)-1);
+	reply->status = RADIUS_SERVERS_DEAD; 
+	osapiStrncpySafe (reply->intf, intf, sizeof(reply->intf)-1);
+
+	/* copy user details */
+	memcpy(reply->info.authInfo.userName, clientInfo->info.authInfo.authmgrUserName,
+                min(sizeof(clientInfo->info.authInfo.authmgrUserName), sizeof(clientInfo->info.authInfo.authmgrUserName)));
+	reply->info.authInfo.userNameLength = strlen(clientInfo->info.authInfo.authmgrUserName);
+}
+
+static int client_resp_val_get(char *in)
+{
+  unsigned int i = 0;
+
+  static status_map_t status_map[] = {
+		{"auth_fail", AUTH_FAIL},
+		{"auth_success", AUTH_SUCCESS},
+		{"auth_timeout", AUTH_TIMEOUT},
+		{"auth_server_comm_failure", AUTH_SERVER_COMM_FAILURE},
+		{"method_change", METHOD_CHANGE},
+		{"radius_server_dead", RADIUS_SERVERS_DEAD},
+	};
+
+	for (i = 0; i < sizeof(status_map)/sizeof(status_map_t); i++)
+	{
+		if (0 == strcmp(in, status_map[i].status))
+		{
+			return status_map[i].val;
+		}
+	}
+	return -1;
+}
+
+int mabPortClientAuthStatusUpdate(int intIfNum, unsigned char *addr, char *status, void *param)
+{
+  clientStatusReply_t *reply;
+  unsigned int val = 0;
+   char8 intf[ NIM_IF_ALIAS_SIZE + 1] = {};
+
+  fpGetHostIntfName(intIfNum, intf);
+
+  val = client_resp_val_get(status);
+
+  STATUS_MALLOC(val, param, reply);
+
+ switch (val)
+ {
+  case AUTH_FAIL:
+  STATUS_ENTER(AUTH_FAIL, intf, reply, addr, param);
+  break;
+
+  case AUTH_SUCCESS:
+  STATUS_ENTER(AUTH_SUCCESS, intf, reply, addr, param);
+  break;
+
+  case AUTH_TIMEOUT:
+  STATUS_ENTER(AUTH_TIMEOUT, intf, reply, addr, param);
+  break;
+
+  case AUTH_SERVER_COMM_FAILURE:
+  STATUS_ENTER(AUTH_SERVER_COMM_FAILURE, intf, reply, addr, param);
+  break;
+
+  case METHOD_CHANGE:
+  STATUS_ENTER(METHOD_CHANGE, intf, reply, addr, param);
+  break;
+
+  case RADIUS_SERVERS_DEAD:
+  STATUS_ENTER(RADIUS_SERVERS_DEAD, intf, reply, addr, param);
+  break;
+
+  default:
+    /* unknown response is received */
+    return -1;
+
+ }
+
+  /* send msg */
+  mab_data_async_send((char *)reply, sizeof(*reply), addr);
+
+  if (reply)
+     free (reply);
+  return 0;
+}
+
+
diff --git a/src/sonic-pac/mab/mapping/mab_cfg.c b/src/sonic-pac/mab/mapping/mab_cfg.c
new file mode 100755
index 00000000000..cc12f121211
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_cfg.c
@@ -0,0 +1,193 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mab_include.h"
+#include "mab_client.h"
+#include "mab_timer.h"
+#include "mab_struct.h"
+#include "mab_debug.h"
+
+extern mabBlock_t *mabBlock;
+
+/*********************************************************************
+* @purpose  Get the physical port for the logical interface
+*
+* @param    intIfNum  @b{(input))  internal interface number
+*
+* @returns  end index for specified interface in mab logical
+*           interface list
+*
+* @comments
+*
+* @end
+*********************************************************************/
+uint32 mabPhysPortGet(uint32 lIntIfNum)
+{
+  uint32 physPort;
+  MAB_PORT_GET(physPort, lIntIfNum);
+  return physPort;
+}
+
+/*********************************************************************
+* @purpose  Build default mab config data
+*
+* @param    ver @((input)) Software version of Config Data
+*
+* @returns  void
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void mabBuildDefaultConfigData()
+{
+  uint32 cfgIndex;
+  nimConfigID_t configId[ MAB_INTF_MAX_COUNT];
+
+  /* Save the config IDs */
+  memset((void *)&configId[0], 0, sizeof(nimConfigID_t) *  MAB_INTF_MAX_COUNT);
+
+  for (cfgIndex = 1; cfgIndex <  MAB_INTF_MAX_COUNT; cfgIndex++)
+    NIM_CONFIG_ID_COPY(&configId[cfgIndex], &mabBlock->mabCfg->mabPortCfg[cfgIndex].configId);
+
+  memset((void *)mabBlock->mabCfg, 0, sizeof(mabCfg_t));
+
+  for (cfgIndex = 1; cfgIndex <  MAB_INTF_MAX_COUNT; cfgIndex++)
+  {
+    mabBuildDefaultIntfConfigData(&configId[cfgIndex], &mabBlock->mabCfg->mabPortCfg[cfgIndex]);
+  }
+  return;
+}
+
+/*********************************************************************
+* @purpose  Build default mab port config data
+*
+* @parms    config Id, the config Id to be placed into the intf config
+* @parms    pCfg, a pointer to the interface structure
+*
+* @returns  none
+*
+*
+* @end
+*********************************************************************/
+void mabBuildDefaultIntfConfigData(nimConfigID_t *configId, mabPortCfg_t *pCfg)
+{
+  pCfg->mabEnabled    = FD_MAB_PORT_MAB_ENABLED;
+  pCfg->mabAuthType   = FD_MAB_PORT_MAB_AUTH_TYPE;
+}
+
+/*********************************************************************
+* @purpose  Apply mab config data
+*
+* @param    void
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t mabApplyConfigData(void)
+{
+  return (mabIssueCmd(mabMgmtApplyConfigData,  NULL,  NULLPTR));
+}
+
+/*********************************************************************
+* @purpose  Fill in default values and set the port state
+*
+* @param    intIfNum  @b{(input))  internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t mabPortReset(uint32 intIfNum)
+{
+  mabPortInfoInitialize(intIfNum, FALSE);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Initialize the Dot1x Port Structure with Default Values
+*
+* @param    intIfNum  @b{(input))  internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t mabPortInfoInitialize(uint32 intIfNum,  BOOL flag)
+{
+  mabPortCfg_t *pCfg;
+  uint32 linkState = 0, adminState = 0;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  memset(&mabBlock->mabPortInfo[intIfNum], 0, sizeof(mabPortInfo_t));
+
+  (void)osapiWriteLockGive(mabBlock->mabRWLock);
+
+
+  (void)osapiWriteLockTake(mabBlock->mabRWLock,  WAIT_FOREVER);
+ 
+  mabAppTimerDeInitCheck();
+
+  mabBlock->mabPortInfo[intIfNum].portControlMode =  AUTHMGR_PORT_AUTO;
+  mabBlock->mabPortInfo[intIfNum].hostMode =  AUTHMGR_MULTI_AUTH_MODE;
+
+  mabBlock->mabPortInfo[intIfNum].maxUsers           =  MAB_MAX_USERS_PER_PORT;
+  mabBlock->mabPortInfo[intIfNum].numUsers           = 0;
+
+  mabBlock->mabPortInfo[intIfNum].currentId          = 0;
+  mabBlock->mabPortInfo[intIfNum].initialize         =  FALSE;
+
+  if ( (nimGetIntfLinkState(intIfNum, &linkState) ==  SUCCESS) && (linkState ==  UP) &&
+       (nimGetIntfAdminState(intIfNum, &adminState) ==  SUCCESS) && (adminState == ENABLE) )
+  {
+    mabBlock->mabPortInfo[intIfNum].portEnabled =  TRUE;
+    mabBlock->mabPortInfo[intIfNum].mabEnabled = pCfg->mabEnabled;
+  }
+  else
+  {
+    mabBlock->mabPortInfo[intIfNum].portEnabled =  FALSE;
+    mabBlock->mabPortInfo[intIfNum].mabEnabled =  DISABLE;
+  }
+
+  if ( ENABLE == mabBlock->mabPortInfo[intIfNum].mabEnabled)
+  {
+    /* Register for time ticks with appTimer */
+    if ( NULLPTR == mabBlock->mabTimerCB)
+    {
+      mabBlock->mabTimerCB =  appTimerInit( MAB_COMPONENT_ID, mabTimerExpiryHdlr,
+           NULLPTR,  APP_TMR_1SEC, mabBlock->mabAppTimerBufferPoolId);
+    }
+  }
+
+  mabBlock->mabPortInfo[intIfNum].authCount  = 0;
+
+  /* Copy config data into operational data */
+  mabBlock->mabPortInfo[intIfNum].maxUsers =  AUTHMGR_PORT_MAX_MAC_USERS;
+
+  return  SUCCESS;
+}
diff --git a/src/sonic-pac/mab/mapping/mab_client.c b/src/sonic-pac/mab/mapping/mab_client.c
new file mode 100755
index 00000000000..f4cb6684f15
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_client.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "mab_include.h"
+#include "mab_client.h"
+#include "mab_timer.h"
+#include "mab_struct.h"
+
+extern mabBlock_t *mabBlock;
+
+/*********************************************************************
+ * @purpose  Set the mab client authorization status
+ *
+ * @param    lIntIfNum   @b{(input)) internal interface number
+ * @param    portStatus @b{(input)) port authorization status setting
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ * @returns   ERROR
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientStatusSet(mabLogicalPortInfo_t *logicalPortInfo,  AUTHMGR_PORT_STATUS_t portStatus)
+{
+  uint32 physPort = 0, lPort = 0, type = 0;
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  MAB_EVENT_TRACE("%s:Setting the Logical port-%d to %s\n",
+      __FUNCTION__,  logicalPortInfo->key.keyNum,
+      (portStatus== AUTHMGR_PORT_STATUS_AUTHORIZED)?"Authorize":"Unauthorize");
+
+  /* Verify port status parm value */
+  if (portStatus !=  AUTHMGR_PORT_STATUS_AUTHORIZED && portStatus !=  AUTHMGR_PORT_STATUS_UNAUTHORIZED)
+    return  FAILURE;
+
+  /*If setting to the same value, just return success */
+  if (portStatus == logicalPortInfo->client.logicalPortStatus)
+  {
+    MAB_EVENT_TRACE("%s:%d Status already set \n",__FUNCTION__,__LINE__);
+    return  SUCCESS;
+  }
+
+  if ((( AUTHMGR_PORT_FORCE_UNAUTHORIZED == mabBlock->mabPortInfo[physPort].portControlMode) &&
+        ( AUTHMGR_PORT_STATUS_AUTHORIZED == portStatus)) ||
+      (( AUTHMGR_PORT_FORCE_AUTHORIZED == mabBlock->mabPortInfo[physPort].portControlMode) &&
+       ( AUTHMGR_PORT_STATUS_UNAUTHORIZED == portStatus)))
+  {
+    /* this combination is not allowed.. So just a sanity check */
+    return  FAILURE;
+  }
+
+  /* */
+
+  logicalPortInfo->client.logicalPortStatus = portStatus;
+
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED == portStatus)
+  {
+    /* set the port status to authorized */
+    mabBlock->mabPortInfo[physPort].authCount++;
+  }
+  else
+  {
+    if (mabBlock->mabPortInfo[physPort].authCount > 0)
+    {
+      mabBlock->mabPortInfo[physPort].authCount--;
+    }
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose function to  cleanup the client sw info 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientSwInfoCleanup(mabLogicalPortInfo_t *logicalPortInfo)
+{
+  RC_t rc =  SUCCESS, rc1 =  SUCCESS, rc2 =  SUCCESS, rc3 =  SUCCESS;
+  mabPortCfg_t *pCfg;
+  uint32 physPort = 0, lPort = 0, type = 0;
+   enetMacAddr_t    nullMacAddr;
+
+   memset(&nullMacAddr.addr,0, ENET_MAC_ADDR_LEN);
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+
+  if (mabIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  /* delete the timers if any */
+  rc =  mabTimerDestroy(mabBlock->mabTimerCB, logicalPortInfo);
+
+  /* set the client to un-authorized */
+
+  rc1 = mabClientStatusSet(logicalPortInfo,  AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+
+  /*remove supplicant mac address from Mac address Database*/
+   /*input check*/
+  if (0 != memcmp(logicalPortInfo->client.suppMacAddr.addr, nullMacAddr.addr, ENET_MAC_ADDR_LEN))
+  {
+     rc2 = mabMacAddrInfoRemove(&(logicalPortInfo->client.suppMacAddr));
+  }
+
+  if(mabBlock->mabPortInfo[physPort].numUsers > 0)
+  {
+    mabBlock->mabPortInfo[physPort].numUsers--;
+  }
+
+  /* Deallocate memory for Clients */
+  rc3 = mabLogicalPortInfoDeAlloc(logicalPortInfo);
+
+  if (( SUCCESS != rc) ||
+      ( SUCCESS != rc1) ||
+      ( SUCCESS != rc2) ||
+      ( SUCCESS != rc3))
+  {
+    MAB_EVENT_TRACE("%s:%d rc %d, rc1 %d rc2 %d, rc3 %d  \n",
+                    __FUNCTION__,__LINE__, rc, rc1, rc2, rc3);
+    return  FAILURE;
+  }
+  else
+  {
+    return  SUCCESS;
+  }
+}
+
+/*********************************************************************
+ * @purpose function to  check and deAllocate the client 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientDisconnectAction(mabLogicalPortInfo_t *logicalPortInfo)
+{
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+  uint32 physPort = 0, lPort = 0, type = 0;
+   BOOL valid =  FALSE;
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  if (mabIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  /* check if the client can be de-allocated */
+
+  MAB_EVENT_TRACE("checking if logicalInterface %d can be disconnected\n", logicalPortInfo->key.keyNum);
+
+  if (logicalPortInfo->client.reAuthenticate)
+  {
+    MAB_EVENT_TRACE("%s:%d reAuthenticate  = %d \n",
+                    __FUNCTION__,__LINE__, logicalPortInfo->client.reAuthenticate);
+    return  FAILURE;
+  }
+
+  if (( FALSE == logicalPortInfo->protocol.authSuccess) &&
+     ( FALSE == logicalPortInfo->protocol.authFail))
+  {
+    /* node just allocated */
+    MAB_EVENT_TRACE( 
+                    "%s:%d node just allocated \n",
+                    __FUNCTION__,__LINE__);
+    return  FAILURE;
+  }
+
+  if ( SUCCESS == mabHostIsDynamicNodeAllocCheck(mabBlock->mabPortInfo[physPort].hostMode, &valid))
+  {
+    if (valid)
+    {
+      MAB_EVENT_TRACE(
+          "logicalInterface %d is getting disconnected\n", logicalPortInfo->key.keyNum);
+      rc = mabClientSwInfoCleanup(logicalPortInfo);
+    }
+    else
+    {
+      return  FAILURE;
+    }
+  }
+
+  if ( SUCCESS != rc) 
+  {
+    MAB_EVENT_TRACE(
+                    "%s:%d Failure in Disconnect Action\n", 
+                    __FUNCTION__, __LINE__);
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose function to  cleanup the client 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientInfoCleanup(mabLogicalPortInfo_t *logicalPortInfo)
+{
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+  uint32 physPort = 0, lPort = 0, type = 0;
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+
+  if (mabIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  if ( SUCCESS == rc)
+   rc = mabClientSwInfoCleanup(logicalPortInfo);
+
+  if ( SUCCESS != rc) 
+  {
+    MAB_EVENT_TRACE(
+                    "%s:%d Failure in client cleanup \n", 
+                    __FUNCTION__, __LINE__);
+  }
+
+  return rc;
+}
+
+
diff --git a/src/sonic-pac/mab/mapping/mab_control.c b/src/sonic-pac/mab/mapping/mab_control.c
new file mode 100755
index 00000000000..d2ef4520e21
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_control.c
@@ -0,0 +1,2187 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define  MAC_EAPOL_PDU
+
+#include <arpa/inet.h>
+#include <stdbool.h>
+#include <unistd.h>
+
+#include "osapi.h"
+#include "mab_include.h"
+#include "auth_mgr_exports.h"
+#include "radius_attr_parse.h"
+#include "utils_api.h"
+#include "osapi_sem.h"
+#include "sysapi.h"
+
+#include "mab_include.h"
+#include "mab_client.h"
+#include "mab_auth.h"
+#include "mab_timer.h"
+#include "mab_struct.h"
+#include "mab_socket.h"
+
+
+static  enetMacAddr_t  EAPOL_PDU_MAC_ADDR =
+{{0x01, 0x80, 0xC2, 0x00, 0x00, 0x03}};
+
+extern mabBlock_t *mabBlock;
+BOOL mabInitializationState = FALSE;
+
+#define MAX_CLIENTS 1024 
+
+/*********************************************************************
+ * @purpose  Initialize mab tasks and data
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+RC_t mabStartTasks()
+{
+  /* semaphore creation for task protection over the common data */
+  /* Read write lock protection */
+  if (osapiRWLockCreate(&mabBlock->mabRWLock,
+        OSAPI_RWLOCK_Q_PRIORITY) ==  FAILURE)
+  {
+     LOGF( LOG_SEVERITY_INFO,"Error creating mabRWlock semaphore \n");
+    return  FAILURE;
+  }
+
+  /* fd on mab side  for  MAB- radius client communication */
+  if (mabBlock->send_fd > 0)
+  {
+     close(mabBlock->send_fd);
+     mabBlock->send_fd = -1;
+  }
+
+  /* fd on radius side  for  MAB- radius client communication */
+  if (mabBlock->recv_fd > 0)
+  {
+     close(mabBlock->recv_fd);
+     mabBlock->recv_fd = -1;
+  }
+
+  mab_radius_client_alloc(&mabBlock->rad_cxt);
+  /* init mab - eloop sockets */
+
+  if (-1 == mab_radius_init_send_socket(&mabBlock->send_fd))
+  {
+     LOGF( LOG_SEVERITY_INFO,
+        "Failed to create mab send_fd.\n");
+    return  FAILURE;
+  }
+
+  if (-1 == mab_radius_init_recv_socket(&mabBlock->recv_fd))
+  {
+     LOGF( LOG_SEVERITY_INFO,
+        "Failed to create mab recv_fd.\n");
+    return  FAILURE;
+  }
+
+  /* create dotxTask - to service mab message queue */
+  mabBlock->mabTaskId = osapiTaskCreate("mabTask", (void *)mabTask, 0, 0,
+      2 * mabSidDefaultStackSize(),
+      mabSidDefaultTaskPriority(),
+      mabSidDefaultTaskSlice());
+
+  if (mabBlock->mabTaskId == 0)
+  {
+     LOGF( LOG_SEVERITY_INFO,
+        "Failed to create mab task.\n");
+    return  FAILURE;
+  }
+
+  if (osapiWaitForTaskInit( MAB_TASK_SYNC,  WAIT_FOREVER) !=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_INFO,
+        "Unable to initialize mab task.\n");
+    return  FAILURE;
+  }
+
+    /* create mabSrvrTask - to service mab message queue */
+  mabBlock->mabSrvrTaskId =
+    osapiTaskCreate ("mabSrvrTask", (void *) mabSrvrTask, 0, 0,
+                     2 * mabSidDefaultStackSize(),
+                     mabSidDefaultTaskPriority(),
+                     mabSidDefaultTaskSlice());
+
+  if (mabBlock->mabSrvrTaskId == 0)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Failed to create mab task.\n");
+    return  FAILURE;
+  }
+
+  if (osapiWaitForTaskInit ( MAB_SRVR_TASK_SYNC,  WAIT_FOREVER) !=
+                             SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Unable to initialize mab srvr task.\n");
+    return  FAILURE;
+  }
+    /* create mabSrvrTask - to service mab message queue */
+  mabBlock->mabEloopTaskId =
+    osapiTaskCreate ("mabEloopTask", (void *) mabEloopTask, 0, 0,
+                     2 * mabSidDefaultStackSize(),
+                     mabSidDefaultTaskPriority(),
+                     mabSidDefaultTaskSlice());
+
+  if (mabBlock->mabEloopTaskId == 0)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Failed to create mab eloop task.\n");
+    return  FAILURE;
+  }
+
+  if (osapiWaitForTaskInit ( MAB_ELOOP_TASK_SYNC,  WAIT_FOREVER) !=
+                             SUCCESS)
+  {
+     LOGF ( LOG_SEVERITY_INFO,
+             "Unable to initialize mab eloop task.\n");
+    return  FAILURE;
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  mab task which serves the request queue
+ *
+ * @param    none
+ *
+ * @returns  void
+ *
+ * @comments User-interface writes and PAE PDUs are serviced off
+ *           of the mabQueue
+ *
+ * @end
+ *********************************************************************/
+void mabTask()
+{
+  mabMsg_t msg;
+
+  (void)osapiTaskInitDone( MAB_TASK_SYNC);
+
+  /* allocate the required data structures */
+  mabInitPhase1Process();
+  
+  /* do inter component registration */
+  mabInitPhase2Process();
+
+  mabInitPhase3Process( FALSE);
+
+  mabInitializationState = TRUE;
+
+  for (;;)
+  {
+    if (osapiSemaTake(mabBlock->mabTaskSyncSema,  WAIT_FOREVER) !=  SUCCESS)
+    {
+       LOGF( LOG_SEVERITY_ERROR,
+          "Unable to acquire MAB message queue semaphore.");
+      continue;
+    }
+
+    if (osapiMessageReceive(mabBlock->mabQueue, (void*)&msg, (uint32)sizeof(mabMsg_t),
+           WAIT_FOREVER) ==  SUCCESS)
+    {
+      (void)mabDispatchCmd(&msg);
+    }
+    else
+    {
+       LOGF( LOG_SEVERITY_ERROR, "mabTask: Failed to receive message on mabQueue");
+    }
+  }
+}
+
+/*********************************************************************
+* @purpose  mab srvr task which serves the request queue
+*
+* @param    none
+*
+* @returns  void
+*
+* @comments external applications are serviced off
+*           of the mabQueue
+*
+* @end
+*********************************************************************/
+void mabEloopTask ()
+{
+  MAB_EVENT_TRACE(
+    "%s:%d\r\n", __FUNCTION__, __LINE__);
+
+  (void) osapiTaskInitDone ( MAB_ELOOP_TASK_SYNC);
+
+  mab_eloop_register(mabBlock->recv_fd, mabBlock->rad_cxt);
+  return;
+}
+
+
+/*********************************************************************
+* @purpose  mab srvr task which serves the request queue
+*
+* @param    none
+*
+* @returns  void
+*
+* @comments external applications are serviced off
+*           of the mabQueue
+*
+* @end
+*********************************************************************/
+void mabSrvrTask ()
+{
+  MAB_EVENT_TRACE(
+    "%s:%d\r\n", __FUNCTION__, __LINE__);
+
+  (void) osapiTaskInitDone ( MAB_SRVR_TASK_SYNC);
+
+  mabBlock->conn_list = (connection_list_t *)osapiMalloc( MAB_COMPONENT_ID, 
+                                                         MAX_CLIENTS * sizeof(connection_list_t));
+
+  mab_socket_server_handle(&mabBlock->mabServerSock);
+  return;
+}
+
+/*********************************************************************
+ * @purpose  Save the data in a message to a shared memory
+ *
+ * @param    event   @b{(input)} event type
+ * @param    *data   @b{(input)} pointer to data
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments Once the message is serviced, this variable size data will
+ *           be retrieved
+ *
+ * @end
+ *********************************************************************/
+RC_t mabFillMsg(void *data, mabMsg_t *msg)
+{
+  switch (msg->event)
+  {
+    /* events originating from UI */
+    case mabMgmtPortMABEnableSet:
+    case mabMgmtPortMABDisableSet:
+    case mabMgmtPortInitializeSet:
+    case mabMgmtPortControlModeSet:
+    case mabMgmtPortHostModeSet:
+      /* add to queue uint32 size */
+      memcpy(&msg->data.msgParm, data, sizeof(uint32));
+      break;
+
+    case mabVlanDeleteEvent:
+    case mabVlanAddEvent:
+    case mabVlanAddPortEvent:
+    case mabVlanDeletePortEvent:
+    case mabVlanPvidChangeEvent:
+      memcpy(&msg->data.vlanData, data, sizeof(dot1qNotifyData_t));
+      break;
+
+    case mabIntfChange:
+      /* add to queue a NIM correlator */
+      memcpy(&msg->data.mabIntfChangeParms, data, sizeof(mabIntfChangeParms_t));
+      break;
+
+    case mabAuthMgrEvent:
+      memcpy(&msg->data.mabAuthmgrMsg, data, sizeof(mabAuthmgrMsg_t));
+      break;
+
+    case mabIntfStartup:
+      /* add to queue a NIM correlator */
+      memcpy(&msg->data.startupPhase, data, sizeof(NIM_STARTUP_PHASE_t));
+      break;
+
+    case mabAaaInfoReceived:
+      /* add to queue a char pointer */
+      memcpy(&msg->data.mabAaaMsg, data, sizeof(mabAaaMsg_t));
+      break;
+
+    case mabRadiusConfigUpdate:
+      /* add to queue a char pointer */
+      memcpy(&msg->data.mabRadiusCfgMsg, data, sizeof(mabRadiusServer_t));
+      break;
+
+    case mabAddMacInMacDB:
+    case mabTimeTick:
+      break; /* NULL data, proceed */
+
+    default:
+      /* unmatched event */
+      return  FAILURE;
+
+  } /* switch */
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Send a command to mab queue
+ *
+ * @param    event      @b{(input)} event type
+ * @param    intIfNum   @b{(input)} internal interface number
+ * @param    *data      @b{(input)} pointer to data
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments Command is queued for service
+ *
+ * @end
+ *********************************************************************/
+RC_t mabIssueCmd(uint32 event, uint32 intIfNum, void *data)
+{
+  mabMsg_t msg;
+  RC_t rc;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+
+  /* copy event, intIfNum and data ptr to msg struct */
+  msg.event = event;
+  msg.intf = intIfNum;
+
+  if (data !=  NULLPTR)
+    (void)mabFillMsg(data, &msg);
+
+  /* send message */
+  rc = osapiMessageSend(mabBlock->mabQueue, &msg, (uint32)sizeof(mabMsg_t),  NO_WAIT,  MSG_PRIORITY_NORM);
+  if (rc !=  SUCCESS)
+  {
+    MAB_ERROR_SEVERE("Failed to send to mabQueue! Event: %u, interface: %s\n", event, ifName);
+  }
+
+  rc = osapiSemaGive(mabBlock->mabTaskSyncSema);
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose  Route the event to a handling function and grab the parms
+ *
+ * @param    msg   @b{(input)} message containing event and interface number
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabDispatchCmd(mabMsg_t *msg)
+{
+  RC_t rc =  FAILURE;
+
+  (void)osapiWriteLockTake(mabBlock->mabRWLock,  WAIT_FOREVER);
+  switch (msg->event)
+  {
+    case mabIntfChange:
+      rc = mabIhProcessIntfChange(msg->intf,
+          msg->data.mabIntfChangeParms.intfEvent,
+          msg->data.mabIntfChangeParms.nimCorrelator);
+      break;
+
+    case mabIntfStartup:
+      rc = mabIhProcessIntfStartup(msg->data.startupPhase);
+      break;
+
+    case mabTimeTick:
+      rc = mabTimerAction();
+      break;
+
+    case mabMgmtPortInitializeSet:
+      rc = mabCtlPortInitializeSet(msg->intf, msg->data.msgParm);
+      break;
+
+    case mabMgmtPortControlModeSet:
+      rc = mabCtlPortControlModeSet(msg->intf, msg->data.msgParm);
+      break;
+
+    case mabMgmtPortHostModeSet:
+      rc = mabPortCtrlHostModeSet(msg->intf, msg->data.msgParm);
+      break;
+
+    case mabMgmtPortStatsClear:
+      rc =  mabCtlPortStatsClear(msg->intf);
+      break;
+
+    case mabAaaInfoReceived:
+      rc = mabRadiusResponseProcess(msg->intf, msg->data.mabAaaMsg.resp);
+      break;
+
+    case mabRadiusConfigUpdate:
+      rc = mabRadiusChangeHandle(&msg->data.mabRadiusCfgMsg);
+      break;
+
+    case mabMgmtApplyConfigData:
+      rc = mabCtlApplyConfigData();
+      break;
+
+    case mabVlanDeleteEvent:
+    case mabVlanAddEvent:
+    case mabVlanAddPortEvent:
+    case mabVlanDeletePortEvent:
+    case mabVlanPvidChangeEvent:
+      mabVlanChangeProcess(msg->event,msg->intf,&(msg->data.vlanData));
+      rc =  SUCCESS;
+      break;
+
+    case mabMgmtPortMABEnableSet:
+      rc = mabCtlPortMABEnableSet(msg->intf);
+      break;
+
+    case mabMgmtPortMABDisableSet:
+      rc = mabCtlPortMABDisableSet(msg->intf);
+      break;
+
+    case mabAddMacInMacDB:      
+      rc = mabAddMac(msg->intf);
+      break;  
+
+    case mabAuthMgrEvent:
+      rc = mabAuthmgrEventProcess(msg->intf, &msg->data.mabAuthmgrMsg);
+      break;
+
+    default:
+      rc =  FAILURE;
+  }
+
+  (void)osapiWriteLockGive(mabBlock->mabRWLock);
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose  Add supplicant MAC in MAC database
+ *
+ * @param    lIntIfNum   @b{(input)} logical interface number that this PDU was received on
+ *
+ * @returns   SUCCESS or  FAILURE
+ * 
+ * @end
+ *********************************************************************/
+RC_t mabAddMac(uint32 lIntIfNum)
+{
+  mabLogicalPortInfo_t  *entry =  NULLPTR;
+  RC_t rc =  FAILURE;
+
+  entry = mabLogicalPortInfoGet(lIntIfNum);
+  if (entry !=  NULLPTR) {
+     rc = mabMacAddrInfoAdd(&(entry->client.suppMacAddr), lIntIfNum);    
+  } 
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose  Check if pdu is to be processed considering logical port
+ *           use and availability
+ *
+ * @param    intIfNum     @b{(input)} physical interface
+ * @param    *srcMac      @b{(input)} supplicant mac address
+ * @param    logicalPort  @b{(input)} logical port
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments Command is queued for service
+ *
+ * @end
+ *********************************************************************/
+RC_t mabDynamicUserPduMapCheck(uint32 intIfNum,  char8 *srcMac, uint32 *lIntIfNum,  BOOL *existing_node)
+{
+  uint32 lIndex;
+  mabPortCfg_t *pCfg;
+  mabLogicalPortInfo_t *logicalPortInfo;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+
+  MAB_EVENT_TRACE("%s:%d: source Mac: %02X:%02X:%02X:%02X:%02X:%02X  Interface:%d ",
+      __FUNCTION__,__LINE__,
+      ( uchar8)srcMac[0],
+      ( uchar8)srcMac[1],
+      ( uchar8)srcMac[2],
+      ( uchar8)srcMac[3],
+      ( uchar8)srcMac[4],
+      ( uchar8)srcMac[5],
+      intIfNum);
+
+  *existing_node =  FALSE;
+
+  /* Get the port mode */
+  if ( TRUE != mabIntfIsConfigurable(intIfNum, &pCfg))
+    return  FAILURE;
+
+  if ( AUTHMGR_PORT_AUTO == mabBlock->mabPortInfo[intIfNum].portControlMode)
+  {
+    /* loop based on the intIfNum */
+    lIndex = MAB_LOGICAL_PORT_ITERATE;
+    while( NULLPTR != (logicalPortInfo=mabLogicalPortInfoGetNextNode(intIfNum,&lIndex)))
+    {
+      if (0 == memcmp(srcMac, logicalPortInfo->client.suppMacAddr.addr, MAC_ADDR_LEN))
+      {
+        *lIntIfNum = lIndex;
+        *existing_node =  TRUE;
+        return  SUCCESS;
+      }
+    }
+
+    /* allocate a new logical port for this supplicant */
+    logicalPortInfo = mabLogicalPortInfoAlloc(intIfNum);
+
+    if(logicalPortInfo !=  NULLPTR)
+    {
+      /* add mac address to Mac Addr Database*/
+      if (mabIssueCmd(mabAddMacInMacDB, logicalPortInfo->key.keyNum,  NULLPTR) !=  SUCCESS)
+      {
+         LOGF( LOG_SEVERITY_ERROR,"Failed to add MAC entry %02x:%02x:%02x:%02x:%02x:%02x"
+            " in MAC database for interface %s (intIfNum %d, logical port %d). Reason: Failed to send event mabAddMacInMacDB\n",
+            srcMac[0],srcMac[1],srcMac[2],srcMac[3],srcMac[4],srcMac[5],
+            ifName,intIfNum,logicalPortInfo->key.keyNum);
+        mabLogicalPortInfoDeAlloc(logicalPortInfo);
+        return  FAILURE;
+      }
+
+      mabLogicalPortInfoInit(logicalPortInfo->key.keyNum);
+
+      memcpy(logicalPortInfo->client.suppMacAddr.addr, srcMac,  MAC_ADDR_LEN);
+      *existing_node =  FALSE;
+      *lIntIfNum = logicalPortInfo->key.keyNum;
+      mabBlock->mabPortInfo[intIfNum].numUsers++;
+
+      return  SUCCESS;
+    }
+  }
+    return  FAILURE;
+}
+
+/*********************************************************************
+ * @purpose  Check if pdu is to be processed considering logical port
+ *           use and availability
+ *
+ * @param    intIfNum     @b{(input)} physical interface
+ * @param    *srcMac      @b{(input)} supplicant mac address
+ * @param    logicalPort  @b{(input)} logical port
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments Command is queued for service
+ *
+ * @end
+ *********************************************************************/
+RC_t mabCheckMapPdu(uint32 intIfNum,  char8 *srcMac, uint32 *lIntIfNum,  BOOL *existingNode)
+{
+  mabPortCfg_t *pCfg;
+
+  MAB_EVENT_TRACE("%s:%d: source Mac: %02X:%02X:%02X:%02X:%02X:%02X  Interface:%d ",
+      __FUNCTION__,__LINE__,
+      ( uchar8)srcMac[0],
+      ( uchar8)srcMac[1],
+      ( uchar8)srcMac[2],
+      ( uchar8)srcMac[3],
+      ( uchar8)srcMac[4],
+      ( uchar8)srcMac[5],
+      intIfNum);
+
+  *existingNode =  FALSE;
+
+  /* Get the port mode */
+  if ( TRUE != mabIntfIsConfigurable(intIfNum, &pCfg))
+    return  FAILURE;
+
+  /* logical nodes are dynamically allocated */
+  return mabDynamicUserPduMapCheck(intIfNum, srcMac, lIntIfNum, existingNode);
+}
+
+/*********************************************************************
+ * @purpose  This routine decrements all the timer counters for all ports
+ *
+ * @param    none
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments The events generated are directly sent to state machine classifier.
+ *
+ * @end
+ *********************************************************************/
+RC_t mabTimerAction()
+{
+  if (!MAB_IS_READY)
+  {
+    return  SUCCESS;
+  }
+
+  appTimerProcess(mabBlock->mabTimerCB);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Generate Response to Radius Challenge
+ *
+ * @param    lIntIfNum   @b{(input)) logical interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabCtlLogicalPortMABGenRequest(uint32 lIntIfNum, netBufHandle bufHandle)
+{
+   uchar8 *data;
+   enetHeader_t *enetHdr;
+   enet_encaps_t *encap;
+   eapolPacket_t *eapolPkt;
+   authmgrEapPacket_t *eapPkt;
+   eapRrPacket_t *eapRrPkt;
+  uint32 length=0;
+  mabLogicalPortInfo_t *logicalPortInfo;
+   uchar8 *userData;
+  uint32 physPort = 0;
+
+  MAB_EVENT_TRACE(
+      "%s:%d:  In mabCtlLogicalPortMABGeneratePDU intf %d\n",
+      __FUNCTION__,__LINE__,lIntIfNum);
+
+  if((logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum))== NULLPTR)
+  {
+    MAB_EVENT_TRACE(
+        "%s:%d:  Could not get logical Interface structure for %d \n",
+        __FUNCTION__,__LINE__,lIntIfNum);
+    return  FAILURE;
+  }
+
+  if (bufHandle ==  NULL)
+  {
+    return  FAILURE;
+  }
+
+  MAB_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+
+  MAB_EVENT_TRACE(
+      "%s:%d:  Generating packet for interface[%d]  \n",
+      __FUNCTION__,__LINE__,lIntIfNum);
+
+  SYSAPI_NET_MBUF_GET_DATASTART(bufHandle, data);
+  /* Set ethernet header */
+  enetHdr = ( enetHeader_t *)(data);
+
+  /* Set dest and source MAC in ethernet header */
+  memcpy(enetHdr->dest.addr,  EAPOL_PDU_MAC_ADDR.addr,  MAC_ADDR_LEN);
+  memcpy(enetHdr->src.addr,logicalPortInfo->client.suppMacAddr.addr,  MAC_ADDR_LEN);
+
+  /* Set ethernet type */
+  encap = ( enet_encaps_t *)(( uchar8 *)enetHdr +  ENET_HDR_SIZE);
+  encap->type = osapiHtons( ETYPE_EAPOL);
+
+  /* Set EAPOL header */
+  eapolPkt = ( eapolPacket_t *)(( uchar8 *)encap +  ENET_ENCAPS_HDR_SIZE);
+  eapolPkt->protocolVersion =  MAB_PAE_PORT_PROTOCOL_VERSION_1;
+  eapolPkt->packetType = EAPOL_EAPPKT;
+  /*eapolPkt->packetBodyLength = osapiHtons( ( ushort16)(sizeof( authmgrEapPacket_t) + sizeof( eapRrPacket_t)) );*/
+
+  /* Set EAP header */
+  eapPkt = ( authmgrEapPacket_t *)(( uchar8 *)eapolPkt + sizeof( eapolPacket_t));
+  eapPkt->code = EAP_RESPONSE;
+  eapPkt->id = logicalPortInfo->client.currentIdL;
+
+  /* Set EAP Request/Response header */
+  eapRrPkt = ( eapRrPacket_t *)(( uchar8 *)eapPkt + sizeof( authmgrEapPacket_t));
+
+  eapRrPkt->type = EAP_RRIDENTITY;
+  userData = (( uchar8 *)eapRrPkt) + sizeof( eapRrPacket_t);
+
+  eapolPkt->packetBodyLength = ( ( ushort16)(sizeof( authmgrEapPacket_t) + sizeof( eapRrPacket_t)+
+        strlen(logicalPortInfo->client.mabUserName)) );
+  eapPkt->length = eapolPkt->packetBodyLength;
+
+  memset (userData,'\0', strlen(logicalPortInfo->client.mabUserName) +1);
+  memcpy (userData, logicalPortInfo->client.mabUserName, strlen(logicalPortInfo->client.mabUserName));
+
+  length = (uint32)(  ENET_HDR_SIZE +  ENET_ENCAPS_HDR_SIZE + sizeof( eapolPacket_t) +
+      sizeof( authmgrEapPacket_t) + sizeof( eapRrPacket_t) + strlen(logicalPortInfo->client.mabUserName) );
+
+  SYSAPI_NET_MBUF_SET_DATALENGTH(bufHandle, length);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose Enable MAB operationally on a physical port
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabCtlPortMABEnableSet(uint32 intIfNum)
+{
+  mabPortCfg_t *pCfg;
+
+  /* Get the port mode */
+  if ( TRUE != mabIntfIsConfigurable(intIfNum, &pCfg))
+  {
+    return  FAILURE;
+  }
+
+  /* Register for time ticks with appTimer */
+  if ( NULLPTR == mabBlock->mabTimerCB)
+  {
+    mabBlock->mabTimerCB =  appTimerInit( MAB_COMPONENT_ID, mabTimerExpiryHdlr,
+         NULLPTR,  APP_TMR_1SEC, mabBlock->mabAppTimerBufferPoolId);
+  }
+
+  (void)mabCtlApplyPortConfigData(intIfNum);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose Disable MAB on a physical port
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabCtlPortMABDisableSet(uint32 intIfNum)
+{
+  mabPortCfg_t *pCfg;
+
+  /* Get the port mode */
+  if ( TRUE != mabIntfIsConfigurable(intIfNum, &pCfg))
+  {
+    return  FAILURE;
+  }
+
+  (void)mabPortInfoCleanup(intIfNum);
+
+  (void)mabCtlApplyPortConfigData(intIfNum);
+
+  mabAppTimerDeInitCheck();
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Set initialize value for a port
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param    initialize @b{(input)) initialize value
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments This value is set to  TRUE by management in order to force
+ *           initialization of a port.  It is re-set to  FALSE after
+ *           initialization has completed.
+ *
+ * @end
+ *********************************************************************/
+RC_t mabCtlPortInitializeSet(uint32 intIfNum,  BOOL initialize)
+{
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  
+  nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+  MAB_EVENT_TRACE("%s:Intialize physical port-%s \n",
+      __FUNCTION__,ifName);
+
+  mabPortInfoCleanup(intIfNum);
+  return mabCtlApplyPortConfigData(intIfNum);
+}
+
+/*********************************************************************
+ * @purpose  Clear mab stats for specified port
+ *
+ * @param    intIfNum     @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabCtlPortStatsClear(uint32 intIfNum)
+{
+  memset(( char8 *)&mabBlock->mabPortStats[intIfNum],  NULL, sizeof(mabPortStats_t));
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Apply mab config data to specified interface
+ *
+ * @param    intIfNum     @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabCtlApplyPortConfigData(uint32 intIfNum)
+{
+  mabPortCfg_t *pCfg;
+  authmgrClientStatusInfo_t clientStatus;
+   uchar8 ifNamel[ NIM_IF_ALIAS_SIZE + 1];
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  (void)mabPortInfoInitialize(intIfNum,  TRUE);
+
+  /* mab is not enabled */
+  if (pCfg->mabEnabled ==  FALSE )
+  {
+    /* do nothing */
+  }
+  else
+  {
+    /* set the port control mode and host control mode */
+    mabPortCtrlModeSet(intIfNum, mabBlock->mabPortInfo[intIfNum].portControlMode);
+  }
+
+  if ( ENABLE == mabBlock->mabPortInfo[intIfNum].portEnabled)
+  {
+    memset(&clientStatus, 0, sizeof(authmgrClientStatusInfo_t));
+    clientStatus.info.enableStatus = mabBlock->mabPortInfo[intIfNum].mabEnabled;
+
+    nimGetIntfName (intIfNum,  ALIASNAME, ifNamel);
+
+    MAB_EVENT_TRACE(
+    "%s %d sending method change %d to authmgr for interface %s", __func__, __LINE__, mabBlock->mabPortInfo[intIfNum].mabEnabled, ifNamel);
+
+    mabPortClientAuthStatusUpdate(intIfNum,  NULLPTR, "method_change", (void*) &clientStatus);
+  }
+
+  return  SUCCESS;
+}
+
+void mabVlanChangeProcess(uint32 event, uint32 intIfNum, dot1qNotifyData_t *vlanData)
+{
+  uint32      i = 0, vlanId = 0, numVlans = 0;
+  RC_t rc;
+
+  for (i = 1; i<= VLAN_MAX_MASK_BIT; i++)
+  {
+    {
+      vlanId = vlanData->data.vlanId;
+      /* For any continue, we will break out */
+      i =  VLAN_MAX_MASK_BIT + 1;
+    }
+
+    switch (event)
+    {
+      case mabVlanDeleteEvent:
+        mabVlanDeleteProcess(vlanId);
+        break;
+
+      case mabVlanDeletePortEvent:
+        mabVlanPortDeleteProcess(intIfNum,vlanId);
+        break;
+
+      case mabVlanAddEvent:
+        break;
+
+      case mabVlanAddPortEvent:
+        rc = mabVlanPortAddProcess(intIfNum,vlanId);
+        break;
+
+      case mabVlanPvidChangeEvent:
+        rc = mabVlanPVIDChangeEventProcess(intIfNum,vlanId);
+        break;
+    }
+    MAB_EVENT_TRACE(
+        "mabEvent %d port %d \n", event, intIfNum);
+    numVlans++;
+  }
+  return;
+}
+
+/*********************************************************************
+* @purpose  Set values of the Logical Dot1x Port Structure
+*           with Default Values of port it belongs to
+*
+* @param    logicalPortInfo  @b{(input))  Logical port Info
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t mabLogicalPortInfoInit(uint32 lIntIfNum)
+{
+  mabLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 physPort = 0, lPort = 0, type = 0, vlanId = 0;
+
+  logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum);
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, logicalPortInfo->key.keyNum);
+  MAB_EVENT_TRACE(
+                        "%s:Resetting information for linterface = %d . \n",
+                        __FUNCTION__, lPort);
+
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED == logicalPortInfo->client.logicalPortStatus)
+  {
+    /* Clean up the client hw info */
+    MAB_EVENT_TRACE(
+        "\n%s:Cleaning up hw info for linterface = %d\n",
+        __FUNCTION__,lIntIfNum);
+  }
+
+  memset(&logicalPortInfo->client, 0, sizeof(mabClientInfo_t));
+  /* FSM state Holders */
+  logicalPortInfo->client.currentIdL         = mabBlock->mabPortInfo[physPort].currentId;
+
+  logicalPortInfo->client.vlanId         = vlanId;
+  logicalPortInfo->client.vlanType       = AUTHMGR_VLAN_DEFAULT;
+
+  MAB_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+  memset(&logicalPortInfo->protocol, 0, sizeof(mabProtocolInfo_t));
+
+  mabUnAuthenticatedAction(logicalPortInfo);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Generate Response to Radius Challenge
+ *
+ * @param    lIntIfNum   @b{(input)) logical interface number
+ * @param    generateNak @b{(input)} Bool value to generate NAK
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @notes    generateNak flag is used if MAB needs to responce with NAK 
+ *           for unsupported EAP type
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabCtlLogicalPortMABGenResp(uint32 lIntIfNum,   BOOL generateNak)
+{
+   netBufHandle bufHandle;
+   uchar8 *data;
+   enetHeader_t *enetHdr;
+   enet_encaps_t *encap;
+   eapolPacket_t *eapolPkt;
+   authmgrEapPacket_t *eapPkt;
+   eapRrPacket_t *eapRrPkt;
+  uint32 length=0;
+  mabLogicalPortInfo_t *logicalPortInfo;
+   uchar8  md5ChkSum[MAB_MD5_LEN+1], responseData[ PASSWORD_SIZE + MAB_CHALLENGE_LEN + 2];
+  uint32  responseDataLen;
+   uchar8  password[ PASSWORD_SIZE];
+   uchar8 *userData;
+  uint32 challengelen, physPort = 0;
+  RC_t rc =  SUCCESS;
+
+  MAB_EVENT_TRACE(
+      "%s:%d:  In mabCtlLogicalPortMABGenResp intf %d  \n",
+      __FUNCTION__,__LINE__,lIntIfNum);
+
+  if((logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum))== NULLPTR)
+  {
+    MAB_EVENT_TRACE(
+        "%s:%d:  Could not get logical Interface structure for %d \n",
+        __FUNCTION__,__LINE__,lIntIfNum);
+    return  FAILURE;
+  }
+
+  MAB_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+
+  /*generate the EAPOL PDU*/
+  SYSAPI_NET_MBUF_GET(bufHandle);
+  if (bufHandle ==  NULL)
+  {
+     LOGF( LOG_SEVERITY_INFO,
+        "Out of system buffers.\n");
+    MAB_EVENT_TRACE(
+        "%s:%d out of system buffers\n",
+        __FUNCTION__,__LINE__);
+    return  FAILURE;
+  }
+
+  MAB_EVENT_TRACE(
+      "%s:%d:  Generating packet for interface[%d]  \n",
+      __FUNCTION__,__LINE__,lIntIfNum);
+
+  SYSAPI_NET_MBUF_GET_DATASTART(bufHandle, data);
+  /* Set ethernet header */
+  enetHdr = ( enetHeader_t *)(data);
+
+  /* Set dest and source MAC in ethernet header */
+  memcpy(enetHdr->dest.addr,  EAPOL_PDU_MAC_ADDR.addr,  MAC_ADDR_LEN);
+  memcpy(enetHdr->src.addr,logicalPortInfo->client.suppMacAddr.addr,  MAC_ADDR_LEN);
+
+  /* Set ethernet type */
+  encap = ( enet_encaps_t *)(( uchar8 *)enetHdr +  ENET_HDR_SIZE);
+  encap->type = osapiHtons( ETYPE_EAPOL);
+
+  /* Set EAPOL header */
+  eapolPkt = ( eapolPacket_t *)(( uchar8 *)encap +  ENET_ENCAPS_HDR_SIZE);
+  eapolPkt->protocolVersion =  MAB_PAE_PORT_PROTOCOL_VERSION_1;
+  eapolPkt->packetType = EAPOL_EAPPKT;
+  eapolPkt->packetBodyLength = osapiHtons( ( ushort16)(sizeof( authmgrEapPacket_t) + sizeof( eapRrPacket_t)) );
+
+  /* Set EAP header */
+  eapPkt = ( authmgrEapPacket_t *)(( uchar8 *)eapolPkt + sizeof( eapolPacket_t));
+  eapPkt->code = EAP_RESPONSE;
+  eapPkt->id = logicalPortInfo->client.currentIdL;
+
+  /* Set EAP Request/Response header */
+  eapRrPkt = ( eapRrPacket_t *)(( uchar8 *)eapPkt + sizeof( authmgrEapPacket_t));
+
+  if (generateNak ==  FALSE)
+  {
+    eapolPkt->packetBodyLength = (( ushort16)(sizeof( authmgrEapPacket_t) +
+          sizeof( eapRrPacket_t)+MAB_MD5_LEN+1));
+  }
+  else 
+  {
+    eapolPkt->packetBodyLength = (( ushort16)(sizeof( authmgrEapPacket_t) +
+          sizeof( eapRrPacket_t) + 1));
+  }
+
+  eapPkt->length =  eapolPkt->packetBodyLength ;
+  if (generateNak ==  FALSE)
+  {
+    eapRrPkt->type = EAP_RRMD5;
+  }
+  else 
+  {
+    eapRrPkt->type = EAP_RRNAK;
+  }
+  userData = (( uchar8 *)eapRrPkt) + sizeof( eapRrPacket_t);
+
+  if (generateNak ==  FALSE)
+  {
+    /* generate password */
+    memset(password,0,sizeof(password));
+    memcpy(password, logicalPortInfo->client.mabUserName, sizeof(password));
+
+    /*generate challenge*/
+    challengelen= logicalPortInfo->client.mabChallengelen;
+
+    responseDataLen = 1 + strlen(( char8 *)password) + challengelen;
+
+
+    memset(responseData,0,sizeof(responseData));
+   
+
+    responseData[0] = logicalPortInfo->client.currentIdL;
+
+    memcpy(&responseData[1],password, strlen(( char8 *)password));
+    memcpy(&responseData[1+strlen(( char8 *)password)],logicalPortInfo->client.mabChallenge,challengelen);
+
+    mabLocalMd5Calc(responseData, responseDataLen, md5ChkSum);
+
+    *userData = MAB_MD5_LEN;
+    userData++;
+    memcpy (userData, md5ChkSum,MAB_MD5_LEN);
+    length = (uint32)(  ENET_HDR_SIZE +  ENET_ENCAPS_HDR_SIZE + sizeof( eapolPacket_t) +
+        sizeof( authmgrEapPacket_t) + sizeof( eapRrPacket_t) +MAB_MD5_LEN+1);
+  }
+  else
+  {
+    *userData = EAP_RRMD5;
+    length = (uint32)(  ENET_HDR_SIZE +  ENET_ENCAPS_HDR_SIZE + sizeof( eapolPacket_t) +
+        sizeof( authmgrEapPacket_t) + sizeof( eapRrPacket_t) + 1);
+
+  }
+
+  SYSAPI_NET_MBUF_SET_DATALENGTH(bufHandle, length);
+
+  MAB_EVENT_TRACE("%s:%d:  Generated PDU :%s \n",
+      __FUNCTION__,__LINE__,data);
+
+  rc = mabClientResponseAction(logicalPortInfo, bufHandle);
+
+  if ( NULL != bufHandle)
+  {
+    SYSAPI_NET_MBUF_FREE(bufHandle);
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose  Processes Dot1x-related event initiated by Dot1Q
+ *
+ * @param (in)    vlanId    Virtual LAN Id
+ * @param (in)    intIfNum  Interface Number
+ * @param (in)    event
+ *
+ * @returns   SUCCESS  or  FAILURE
+ *
+ * @end
+ *********************************************************************/
+RC_t mabVlanChangeCallback(dot1qNotifyData_t *vlanData, uint32 intIfNum, uint32 event)
+{
+  /* Vlan Change callbacks can be called during unconfig phase when dot1q is trying
+     to restore the vlan config. */
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+   INTF_TYPES_t intfType;
+
+  memset(ifName, 0x00, sizeof(ifName));
+
+  if (!MAB_IS_READY)
+  {
+    LOGF(LOG_SEVERITY_INFO,
+         "Received an VLAN change callback while MAB is not ready to receive it.");
+    return  FAILURE;
+  }
+
+  /* before performing any operations with interfaces,
+     check if NIM is ready to handle requests */
+  if ((nimPhaseStatusCheck() ==  TRUE) && (nimGetIntfType(intIfNum, &intfType) ==  SUCCESS))
+  {
+    if (mabIsValidIntfType(intfType) !=  TRUE)
+    {
+      /* if MAB is not interested in this interface,
+       * inform event issuer that we have completed processing.
+       */
+      nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+      MAB_EVENT_TRACE("Interface %s is not MAB configurable\r\n", ifName);
+      return  SUCCESS;
+    }
+  }
+
+  MAB_EVENT_TRACE(
+      "mabVlanChangeCallback:Received Vlan event %d for interface %d \n",
+      event,intIfNum);
+
+  if ((intIfNum!=0) && (mabBlock->mabPortInfo[intIfNum].portEnabled !=  TRUE) && (event != VLAN_DELETE_PORT_NOTIFY))
+  {
+    return  SUCCESS;
+  }
+
+  switch (event)
+  {
+    case VLAN_DELETE_PENDING_NOTIFY:
+      MAB_EVENT_TRACE(
+          "Received Vlan Delete Notify \n");
+      mabIssueCmd(mabVlanDeleteEvent,intIfNum,vlanData);
+      break;
+
+    case VLAN_ADD_NOTIFY:
+      MAB_EVENT_TRACE(
+          "Received Vlan Add Notify \n");
+      mabIssueCmd(mabVlanAddEvent,intIfNum,vlanData);
+      break;
+
+    case VLAN_ADD_PORT_NOTIFY:
+      {
+        MAB_EVENT_TRACE(
+            "Received Vlan Add Port Notify for Port %d \n",
+            intIfNum);
+        mabIssueCmd(mabVlanAddPortEvent,intIfNum,vlanData);
+      }
+      break;
+
+    case VLAN_DELETE_PORT_NOTIFY:
+      MAB_EVENT_TRACE(
+          "Received Vlan Delete Port Notify for Port %d\n",
+          intIfNum);
+      mabIssueCmd(mabVlanDeletePortEvent,intIfNum,vlanData);
+      break;
+
+    case VLAN_PVID_CHANGE_NOTIFY:
+      {
+        MAB_EVENT_TRACE(
+            "Received Vlan PVID Change Notify for Port %d \n",
+            intIfNum);
+        mabIssueCmd(mabVlanPvidChangeEvent,intIfNum,vlanData);
+      }
+    default:
+      break;
+  }
+  return  SUCCESS;
+}
+
+RC_t mabHostModeMapInfoGet( AUTHMGR_HOST_CONTROL_t type, mabHostModeMap_t *elem)
+{
+  uint32 i = 0;
+  static mabHostModeMap_t mabHostModeHandlerTable[] =
+  { 
+    { AUTHMGR_SINGLE_AUTH_MODE, mabControlSingleAuthActionSet},
+    { AUTHMGR_MULTI_HOST_MODE, mabControlMultiHostActionSet},
+    { AUTHMGR_MULTI_AUTH_MODE, mabControlMultAuthActionSet},
+  };
+
+
+  for (i = 0; i < (sizeof (mabHostModeHandlerTable)/sizeof(mabHostModeMap_t)); i++)
+  {
+    if (type == mabHostModeHandlerTable[i].hostMode)
+    {
+      *elem = mabHostModeHandlerTable[i];
+      return  SUCCESS;
+    }
+  }
+  return  FAILURE;
+}
+
+
+/*********************************************************************
+ * @purpose control mode function to set the port control mode to auto 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabPortCtrlHostModeSet(uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t hostMode)
+{
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+  mabHostModeMap_t entry;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  if (hostMode == mabBlock->mabPortInfo[intIfNum].hostMode)
+  {
+    return  SUCCESS;
+  }
+
+  mabPortInfoCleanup(intIfNum);
+  mabPortInfoInitialize(intIfNum, TRUE);
+
+  /* check the configured host mode
+     and set the port accordingly */
+  memset(&entry, 0, sizeof(mabHostModeMap_t));
+  if ( SUCCESS != mabHostModeMapInfoGet(hostMode, &entry))
+  {
+    /* failed to get the handler for the host mode */
+    return  FAILURE;
+  }
+
+  rc = entry.hostModeFn(intIfNum);
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose control function to set the host mode to multi host 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabControlMultiHostActionSet(uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+  mabLogicalPortInfo_t *logicalPortInfo;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  /* Set the operating host mode */
+  mabBlock->mabPortInfo[intIfNum].hostMode =  AUTHMGR_MULTI_HOST_MODE;
+
+  if ( NULLPTR == (logicalPortInfo = mabLogicalPortInfoAlloc(intIfNum)))
+  {
+    MAB_EVENT_TRACE(
+      "%s, %d, Failed to allocate logicalInterface \n", 
+                    __func__, __LINE__);
+
+    return  FAILURE;
+  }
+
+  mabLogicalPortInfoInit(logicalPortInfo->key.keyNum);
+
+   MAB_EVENT_TRACE(
+     "%s, %d, triggering event  mabAuthenticationStart for logicalInterface %d \n", __func__, __LINE__, logicalPortInfo->key.keyNum);
+
+  return rc;
+}
+
+
+/*********************************************************************
+ * @purpose control function to set the host mode to single host mode 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabControlSingleAuthActionSet(uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  /* Set the operating host mode */
+  mabBlock->mabPortInfo[intIfNum].hostMode =  AUTHMGR_SINGLE_AUTH_MODE;
+
+  return rc;
+}
+
+
+/*********************************************************************
+ * @purpose control function to set the host mode to multi auth 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabControlMultAuthActionSet(uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+  
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  /* Set the operating host mode */
+  mabBlock->mabPortInfo[intIfNum].hostMode =  AUTHMGR_MULTI_AUTH_MODE;
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose function to clean up mab port oper info
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabPortInfoCleanup(uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  uint32 lIntIfNum;
+  mabPortCfg_t *pCfg;
+  mabLogicalPortInfo_t *logicalPortInfo;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+   /* reset all the clients associated with the port */
+   lIntIfNum = MAB_LOGICAL_PORT_ITERATE;
+   while ( NULLPTR != (logicalPortInfo=mabLogicalPortInfoGetNextNode(intIfNum,&lIntIfNum)))
+   {
+     if (0 != logicalPortInfo->key.keyNum)
+     {
+       if( SUCCESS != mabClientSwInfoCleanup(logicalPortInfo))
+       {
+          MAB_EVENT_TRACE(
+                         "%s:%d Failed to clean up mab info %d  \n",
+                        __FUNCTION__, __LINE__, logicalPortInfo->key.keyNum);
+       }
+     }
+   }
+
+   return rc;
+}
+
+/*********************************************************************
+ * @purpose  Set port control mode
+ *
+ * @param    intIfNum    @b{(input)) internal interface number
+ * @param    portControl @b{(input)) port control mode
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabCtlPortControlModeSet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl)
+{
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  if (portControl == mabBlock->mabPortInfo[intIfNum].portControlMode)
+  {
+    return rc;
+  }
+
+  /* clean up previous info */
+  mabPortInfoCleanup(intIfNum);
+  mabPortInfoInitialize(intIfNum, TRUE);
+
+  return mabPortCtrlModeSet(intIfNum, portControl);
+}
+
+/*********************************************************************
+ * @purpose  Set port control mode
+ *
+ * @param    intIfNum    @b{(input)) internal interface number
+ * @param    portControl @b{(input)) port control mode
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabPortCtrlModeSet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl)
+{
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  switch (portControl)
+  {
+    case  AUTHMGR_PORT_FORCE_UNAUTHORIZED:
+      rc = mabPortControlForceUnAuthActionSet(intIfNum);
+      mabBlock->mabPortInfo[intIfNum].portControlMode = portControl;
+      break;
+
+    case  AUTHMGR_PORT_FORCE_AUTHORIZED:
+      rc = mabPortControlForceAuthActionSet(intIfNum);
+      mabBlock->mabPortInfo[intIfNum].portControlMode = portControl;
+      break;
+
+    case  AUTHMGR_PORT_AUTO:
+      rc = mabPortControlAutoActionSet(intIfNum);
+      mabBlock->mabPortInfo[intIfNum].portControlMode = portControl;
+      break;
+
+    default:
+      rc =  FAILURE;
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose control function to set the to force un-authorized 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabPortControlForceUnAuthActionSet(uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+  mabLogicalPortInfo_t *logicalPortInfo;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  /* Set the operating host mode */
+  mabBlock->mabPortInfo[intIfNum].hostMode =  AUTHMGR_INVALID_HOST_MODE;
+
+  if ( NULLPTR == (logicalPortInfo = mabLogicalPortInfoAlloc(intIfNum)))
+  {
+    MAB_EVENT_TRACE(
+                    "%s:%d:  Unable to allocate logical port \n",
+                    __FUNCTION__,__LINE__);
+    return  FAILURE;
+  }
+
+  /* Call the api to set the port to authorized */
+  mabClientStatusSet(logicalPortInfo,  AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose control function to set the to force authorized 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabPortControlForceAuthActionSet(uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+  mabLogicalPortInfo_t *logicalPortInfo;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  /* Set the operating host mode */
+  mabBlock->mabPortInfo[intIfNum].hostMode =  AUTHMGR_INVALID_HOST_MODE;
+
+  if ( NULLPTR == (logicalPortInfo = mabLogicalPortInfoAlloc(intIfNum)))
+  {
+    MAB_EVENT_TRACE(
+                    "%s:%d:  Unable to allocate logical port \n",
+                    __FUNCTION__,__LINE__);
+    return  FAILURE;
+  }
+
+  /* Call the api to set the port to authorized */
+  mabClientStatusSet(logicalPortInfo,  AUTHMGR_PORT_STATUS_AUTHORIZED);
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose control mode function to set the port control mode to auto 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabPortControlAutoActionSet(uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+  mabHostModeMap_t entry;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  SUCCESS;
+
+  /* check the configured host mode
+     and set the port accordingly */
+
+  memset(&entry, 0, sizeof(mabHostModeMap_t));
+  if ( SUCCESS != mabHostModeMapInfoGet(mabBlock->mabPortInfo[intIfNum].hostMode, &entry))
+  {
+    /* failed to get the handler for the host mode */
+    return  FAILURE;
+  }
+
+  rc = entry.hostModeFn(intIfNum);
+
+  return rc;
+}
+
+
+/*********************************************************************
+* @purpose  Handle Auth Manager event
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    event       @b{(input)} event
+* @param    macAddr     @b{(input)} client mac address
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t mabClientEventUpdate(uint32 intIfNum, uint32 event,  enetMacAddr_t *macAddr)
+{
+  mabPortCfg_t *pCfg;
+  mabAuthmgrMsg_t authmgrMsg;
+
+  if (mabIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  memset(&authmgrMsg, 0, sizeof(mabAuthmgrMsg_t));
+
+  memcpy(&authmgrMsg.clientMacAddr, macAddr,  ENET_MAC_ADDR_LEN);
+  authmgrMsg.event = event; 
+
+  return mabIssueCmd(mabAuthMgrEvent, intIfNum, &authmgrMsg);
+}
+
+/*********************************************************************
+ * @purpose  Apply mab config data
+ *
+ * @param    void
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabCtlApplyConfigData(void)
+{
+  uint32 intIfNum;
+  RC_t nimRc;
+  mabPortCfg_t *pCfg;
+
+  nimRc = mabFirstValidIntfNumber(&intIfNum);
+  while (nimRc ==  SUCCESS)
+  {
+    if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+      return  FAILURE;
+
+    (void)mabCtlApplyPortConfigData(intIfNum);
+    nimRc = mabNextValidIntf(intIfNum, &intIfNum);
+  }
+
+  return  SUCCESS;
+}
+
+RC_t mabAuthmgrEventProcess(uint32 intIfNum, mabAuthmgrMsg_t *authmgrParams)
+{
+  mabAuthmgrEventFnMap_t entry;
+  RC_t rc =  SUCCESS;
+
+  memset(&entry, 0, sizeof(mabAuthmgrEventFnMap_t));
+
+  MAB_IF_NULLPTR_RETURN_LOG(authmgrParams);
+
+  if ( SUCCESS != mabAuthmgrEventMapFnGet(authmgrParams->event, &entry))
+  {
+    return  FAILURE;
+  }
+
+  if ( NULLPTR != entry.eventMapFn)
+  {
+    rc = entry.eventMapFn(intIfNum, authmgrParams->clientMacAddr);
+  }
+
+  return rc;
+}
+
+RC_t mabAuthenticationInitiate(uint32 intIfNum,  enetMacAddr_t suppMacAddr)
+{
+  mabLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 physPort = 0;
+  uint32 lIntIfNum = 0;
+  uint32 temp = 0;
+   BOOL exists =  FALSE;
+
+  /* search the Mac address in the list of clients on the port */
+  if (mabCheckMapPdu(intIfNum, suppMacAddr.addr, &lIntIfNum, &exists)!= SUCCESS)
+  {
+    MAB_EVENT_TRACE(
+        "Failed to Initiate Authentication \n");
+    return  SUCCESS;
+  }
+
+  logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum);
+
+  if ( NULLPTR == logicalPortInfo)
+  {
+    MAB_EVENT_TRACE(
+                    "%s:%d:  Unable to find logical port \n",
+                    __FUNCTION__,__LINE__);
+    return  FAILURE;
+  }
+
+  MAB_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+
+  MAB_EVENT_TRACE(
+    "%s: receoved event to start authentication for logicalInterface %d \n",
+    __func__, logicalPortInfo->key.keyNum);
+
+  if( (mabBlock->mabPortInfo[intIfNum].portControlMode ==  AUTHMGR_PORT_FORCE_UNAUTHORIZED) ||
+      (mabBlock->mabPortInfo[intIfNum].portControlMode ==  AUTHMGR_PORT_FORCE_AUTHORIZED))
+  {
+    return  SUCCESS;
+  }
+  else if (mabBlock->mabPortInfo[intIfNum].portControlMode ==  AUTHMGR_PORT_AUTO)
+  {
+    temp = MAB_LOGICAL_PORT_ITERATE;
+    if ( SUCCESS == mabMacAddrInfoFind(&logicalPortInfo->client.suppMacAddr,&temp))
+    {
+      if (temp != lIntIfNum)
+      {
+        MAB_EVENT_TRACE(
+            "%s, %d, Received client is already present on logical Interface %d.\n"
+            "Not triggering mabAuthenticationStart for logicalInterface %d \n", __func__, __LINE__, temp, lIntIfNum);
+        temp = MAB_LOGICAL_PORT_ITERATE;
+      }
+    }
+    else
+    {
+      (void)mabMacAddrInfoAdd(&(logicalPortInfo->client.suppMacAddr),logicalPortInfo->key.keyNum);
+    }
+  }
+  else
+  {
+    return  FAILURE;
+  }
+
+  return mabAuthenticatingAction(logicalPortInfo);
+
+}
+
+RC_t mabCtrlClientReAuthenticate(uint32 intIfNum,  enetMacAddr_t suppMacAddr)
+{
+  uint32 physPort;
+  mabLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 lIntIfNum = 0;
+
+  if ( SUCCESS != mabMacAddrInfoFind(&suppMacAddr, &lIntIfNum))
+  {
+    MAB_EVENT_TRACE(
+                    "%s:%d:  Unable to client mac in db \n",
+                    __FUNCTION__,__LINE__);
+    return  FAILURE;
+  }
+
+  logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum);
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  MAB_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+
+  /* generate the event to trigger the req id tx */
+  MAB_EVENT_TRACE(
+      "%s, %d, triggering event  to reauthenticate logicalInterface %d \n",
+      __func__, __LINE__, lIntIfNum);
+
+  logicalPortInfo->client.reAuthenticate =  TRUE;
+
+  mabUnAuthenticatedAction(logicalPortInfo);
+  /* This api is called in mabAuthenticationInitiate when authetication action is triggered,
+     hence commenting duplicate call.
+     mabAuthenticatingAction(logicalPortInfo);
+  */
+  return  SUCCESS;
+}
+
+RC_t mabClientInfoPurge(uint32 intIfNum,  enetMacAddr_t suppMacAddr)
+{
+  uint32 physPort;
+  mabLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 lIntIfNum = 0;
+
+  (void)mabRadiusClearRadiusMsgsSend(suppMacAddr);
+  if ( SUCCESS != mabMacAddrInfoFind(&suppMacAddr,&lIntIfNum))
+  {
+    MAB_EVENT_TRACE(
+                    "%s:%d:  Unable to find client mac in db \n",
+                    __FUNCTION__,__LINE__);
+    return  FAILURE;
+  }
+
+  logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum);
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  MAB_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+
+  /* generate the event to trigger the req id tx */
+  MAB_EVENT_TRACE(
+      "%s, %d, triggering event  to cleanup logicalInterface %d \n",
+      __func__, __LINE__, lIntIfNum);
+
+  mabClientInfoCleanup(logicalPortInfo);
+  return  SUCCESS;
+}
+
+
+RC_t mabAuthmgrEventMapFnGet(uint32 event, mabAuthmgrEventFnMap_t *elem)
+{
+  uint32 i = 0;
+  static mabAuthmgrEventFnMap_t mabAuthmgrEventFnMap[] =
+  { 
+    {authmgrClientReAuthenticate, mabCtrlClientReAuthenticate},
+    {authmgrClientAuthStart, mabAuthenticationInitiate},
+    {authmgrClientDisconnect, mabClientInfoPurge}
+  };
+
+
+  for (i = 0; i < (sizeof (mabAuthmgrEventFnMap)/sizeof(mabAuthmgrEventFnMap_t)); i++)
+  {
+    if (event == mabAuthmgrEventFnMap[i].event)
+    {
+      *elem = mabAuthmgrEventFnMap[i];
+      return  SUCCESS;
+    }
+  }
+  return  FAILURE;
+}
+
+
+
+/*********************************************************************
+ * @purpose  Actions to be performed in the APM state AUTHENTICATING
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ *
+ * @returns  SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabAuthenticatingAction(mabLogicalPortInfo_t *logicalPortInfo)
+{
+  uint32 physPort = 0;
+   uchar8 username[MAB_USER_NAME_LEN];
+  uint32 usernamelen=0;
+   netBufHandle bufHandle= NULL;
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg =  NULLPTR;
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+  
+  MAB_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+
+  if ((mabIntfIsConfigurable(physPort, &pCfg) !=  TRUE) ||
+      ( NULLPTR == pCfg))
+  {
+    return  FAILURE;
+  }
+
+  mabBlock->mabPortStats[physPort].authEntersAuthenticating++;
+
+  logicalPortInfo->protocol.authSuccess =  FALSE;
+  logicalPortInfo->protocol.authFail =  FALSE;
+
+  logicalPortInfo->client.mabAuthType = pCfg->mabAuthType;
+
+  /* Construct username form supplicant Mac address and store it*/
+  usernamelen=MAB_USER_NAME_LEN;
+  memset(username,0,MAB_USER_NAME_LEN);
+  osapiSnprintf(username,usernamelen,"%02X%02X%02X%02X%02X%02X",
+                 logicalPortInfo->client.suppMacAddr.addr[0],
+                 logicalPortInfo->client.suppMacAddr.addr[1],
+                 logicalPortInfo->client.suppMacAddr.addr[2],
+                 logicalPortInfo->client.suppMacAddr.addr[3],
+                 logicalPortInfo->client.suppMacAddr.addr[4],
+                 logicalPortInfo->client.suppMacAddr.addr[5]);
+
+  osapiStrncat(username,"\0", 1);
+  usernamelen = osapiStrnlen(username, sizeof(username));
+  MAB_EVENT_TRACE(
+      "%s:%d:Username :%s Length:%d  \n",
+      __FUNCTION__,__LINE__,username,usernamelen);
+
+  memset(logicalPortInfo->client.mabUserName,0,MAB_USER_NAME_LEN);
+  memcpy(logicalPortInfo->client.mabUserName, username, usernamelen);
+  memset(&logicalPortInfo->client.attrInfo, 0, sizeof(logicalPortInfo->client.attrInfo));
+
+  logicalPortInfo->client.mabUserNameLength = usernamelen;
+
+  /*generate the EAPOL PDU*/
+  SYSAPI_NET_MBUF_GET(bufHandle);
+  if (bufHandle ==  NULL)
+  {
+     LOGF( LOG_SEVERITY_INFO,
+        "Out of system buffers.\n");
+    MAB_EVENT_TRACE(
+                    "%s:%d out of system buffers\n",
+                    __FUNCTION__,__LINE__);
+    return  FAILURE;
+  }
+
+  mabCtlLogicalPortMABGenRequest(logicalPortInfo->key.keyNum, bufHandle);
+
+  logicalPortInfo->protocol.mabAuthState = MAB_AUTHENTICATING;
+
+  MAB_EVENT_TRACE(
+    "logicalInterface %d moved to state %d\n", logicalPortInfo->key.keyNum,
+    logicalPortInfo->protocol.mabAuthState);
+
+  /* authenticate the client */
+  rc = mabClientResponseAction(logicalPortInfo, bufHandle);
+
+  if ( NULL != bufHandle)
+  {
+    SYSAPI_NET_MBUF_FREE(bufHandle);
+  }
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose  Actions to be performed in the APM state AUTHENTICATED
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ *
+ * @returns  SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabAuthenticatedAction(mabLogicalPortInfo_t *logicalPortInfo)
+{
+  uint32  physPort = 0;
+  authmgrClientStatusInfo_t   clientStatus;
+
+  memset(&clientStatus, 0, sizeof(authmgrClientStatusInfo_t));
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  MAB_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+
+  mabBlock->mabPortStats[physPort].authAuthSuccessWhileAuthenticating++;
+
+  /* call the api to add the client */
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED != logicalPortInfo->client.logicalPortStatus)
+  {
+    mabClientStatusSet(logicalPortInfo,  AUTHMGR_PORT_STATUS_AUTHORIZED);
+  }
+
+  logicalPortInfo->protocol.mabAuthState = MAB_AUTHENTICATED;
+  logicalPortInfo->protocol.authSuccess =  TRUE;
+
+  memset(&clientStatus, 0, sizeof(authmgrClientStatusInfo_t));
+  memcpy(&clientStatus.info.authInfo.macAddr, &logicalPortInfo->client.suppMacAddr,  ENET_MAC_ADDR_LEN);
+  memcpy(&clientStatus.info.authInfo.attrInfo,  &logicalPortInfo->client.attrInfo, sizeof(authmgrAuthAttributeInfo_t));
+
+  clientStatus.info.authInfo.authMethod = logicalPortInfo->client.authMethod;
+
+  osapiStrncpySafe(clientStatus.info.authInfo.authmgrUserName, logicalPortInfo->client.mabUserName, 
+                   strlen(logicalPortInfo->client.mabUserName)+1);
+  clientStatus.info.authInfo.authmgrUserNameLength = strlen(logicalPortInfo->client.mabUserName)+1;
+
+  mabPortClientAuthStatusUpdate(physPort, logicalPortInfo->client.suppMacAddr.addr, "auth_success", (void*) &clientStatus);
+
+  memset(&logicalPortInfo->client.attrInfo, 0, sizeof(logicalPortInfo->client.attrInfo));
+
+  MAB_EVENT_TRACE(
+    "logicalInterface %d moved to state %d\n", logicalPortInfo->key.keyNum,
+    logicalPortInfo->protocol.mabAuthState);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Actions to be performed in the APM state DISCONNECTED
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ *
+ * @returns  SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabUnAuthenticatedAction(mabLogicalPortInfo_t *logicalPortInfo)
+{
+  uint32 physPort = 0;
+  authmgrClientStatusInfo_t clientStatus;
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  MAB_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+
+
+    if ( TRUE == logicalPortInfo->protocol.authFail)
+    {
+      memset(&clientStatus, 0, sizeof(authmgrClientStatusInfo_t));
+      memcpy(&clientStatus.info.authInfo.macAddr, &logicalPortInfo->client.suppMacAddr,  ENET_MAC_ADDR_LEN);
+
+      osapiStrncpySafe(clientStatus.info.authInfo.authmgrUserName, logicalPortInfo->client.mabUserName,
+                       strlen(logicalPortInfo->client.mabUserName)+1);
+      clientStatus.info.authInfo.authmgrUserNameLength = strlen(logicalPortInfo->client.mabUserName)+1;
+
+      MAB_EVENT_TRACE(
+          "MAB Auth failure for logicalInterface %d\n", 
+                      logicalPortInfo->key.keyNum);
+
+      mabPortClientAuthStatusUpdate(physPort, logicalPortInfo->client.suppMacAddr.addr, 
+                                    "auth_fail", (void*) &clientStatus);
+    }
+
+  memset(&logicalPortInfo->client.attrInfo, 0, sizeof(logicalPortInfo->client.attrInfo));
+
+  if (!(( TRUE == logicalPortInfo->client.reAuthenticate) &&
+        ( AUTHMGR_PORT_STATUS_AUTHORIZED == logicalPortInfo->client.logicalPortStatus)))
+  {
+    
+    mabClientStatusSet(logicalPortInfo,  AUTHMGR_PORT_STATUS_UNAUTHORIZED);
+
+
+    if ( SUCCESS == mabClientDisconnectAction(logicalPortInfo))
+    {
+      return  SUCCESS;
+    } 
+  }
+
+  logicalPortInfo->protocol.mabAuthState = MAB_UNAUTHENTICATED;
+
+  MAB_EVENT_TRACE(
+      "logicalInterface %d moved to state %d\n", logicalPortInfo->key.keyNum,
+      logicalPortInfo->protocol.mabAuthState);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose API to check and clear appTimer Deinit 
+ *
+ * @param   none 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabAppTimerDeInitCheck(void)
+{
+  RC_t nimRc =  SUCCESS;
+  uint32 phyIntf = 0;
+
+  nimRc = mabFirstValidIntfNumber(&phyIntf);
+  while (nimRc ==  SUCCESS)
+  {
+    /* check if mab still enabled */
+    if ( ENABLE == mabBlock->mabPortInfo[phyIntf].mabEnabled)
+    {
+      return  SUCCESS;
+    }
+    nimRc = mabNextValidIntf(phyIntf, &phyIntf);
+  }
+
+  /* No interface is enabled with MAB.stop the timer */
+  if ( NULLPTR != mabBlock->mabTimerCB)
+  {
+    (void)appTimerDeInit(mabBlock->mabTimerCB);
+    mabBlock->mabTimerCB =  NULLPTR;
+  }
+
+  return  SUCCESS;
+}
+
+RC_t mabRadiusChangeHandle(mabRadiusServer_t *info)
+{
+  mab_radius_cmd_msg_t req;
+  mabIpAaddr_t nas_ip;
+
+  if ( NULLPTR == info)
+    return  FAILURE;
+
+    MAB_EVENT_TRACE(
+        "%s:Processing cfg update for server %s cmd %d",
+        __FUNCTION__, info->cmd_data.server.serv_addr, info->cmd);
+
+  memset(&req, 0, sizeof(req));
+ 
+  switch(info->cmd)
+  {
+    case RADIUS_MAB_SERVER_ADD:
+    case RADIUS_MAB_SERVER_MODIFY:
+      if (RADIUS_MAB_SERVER_MODIFY == info->cmd)
+      {
+        osapiStrncpySafe(req.cmd, "server-delete", strlen("server-delete")+1);
+        req.data = mabBlock->rad_cxt;
+        radius_mab_cmd_req_send(mabBlock->send_fd, (char *)&req, sizeof(req));
+      }
+
+      memset(&req, 0, sizeof(req));
+
+      osapiStrncpySafe(req.cmd, "server-add", strlen("server-add")+1);
+      req.data = mabBlock->rad_cxt;
+      memcpy(&req.cmd_data.server, &info->cmd_data.server, sizeof(mab_radius_server_t));
+      radius_mab_cmd_req_send(mabBlock->send_fd,(char *)&req, sizeof(req)); 
+      break;
+
+    case RADIUS_MAB_SERVER_DELETE:
+      osapiStrncpySafe(req.cmd, "server-delete", strlen("server-delete")+1);
+      req.data = mabBlock->rad_cxt;
+      memcpy(&req.cmd_data.server, &info->cmd_data.server, sizeof(mab_radius_server_t));
+      radius_mab_cmd_req_send(mabBlock->send_fd, (char *)&req, sizeof(req)); 
+      break;
+
+    case RADIUS_MAB_GLOBAL_CFG:
+      memset(&nas_ip, 0, sizeof(nas_ip));
+
+      if (inet_pton(AF_INET6, info->cmd_data.globalCfg.nas_ip, &nas_ip.u.v6) <= 0) 
+      {
+        if (inet_pton(AF_INET, info->cmd_data.globalCfg.nas_ip, &nas_ip.u.v4) <= 0) 
+        {
+          MAB_EVENT_TRACE(
+              "%s:Invalid nas ip %s",
+              __FUNCTION__, info->cmd_data.globalCfg.nas_ip);
+        }
+        else
+        {
+          nas_ip.af = AF_INET;
+        }
+      }
+      else
+      {
+        nas_ip.af = AF_INET6;
+      }
+
+      if (nas_ip.af)
+      {
+        memset(&mabBlock->nas_ip, 0, sizeof(mabBlock->nas_ip));
+        memcpy(&mabBlock->nas_ip, &nas_ip, sizeof(mabBlock->nas_ip));
+      }
+
+      memcpy(mabBlock->nas_id, info->cmd_data.globalCfg.nas_id, min(sizeof(mabBlock->nas_id), sizeof(info->cmd_data.globalCfg.nas_id)));
+
+      break;
+
+    case RADIUS_MAB_SERVERS_RELOAD:
+      osapiStrncpySafe(req.cmd, "server-reload", strlen("server-reload")+1);
+      req.data = mabBlock->rad_cxt;
+      radius_mab_cmd_req_send(mabBlock->send_fd, (char *)&req, sizeof(req)); 
+      break;
+
+    default:
+      break;
+
+  }
+
+  return  SUCCESS;
+}
diff --git a/src/sonic-pac/mab/mapping/mab_debug.c b/src/sonic-pac/mab/mapping/mab_debug.c
new file mode 100755
index 00000000000..44ceb3945d7
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_debug.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mab_include.h"
+#include "mab_struct.h"
+#include "auth_mgr_exports.h"
+
+extern mabBlock_t *mabBlock;
+
+char *mabHostModeStringGet( AUTHMGR_HOST_CONTROL_t hostMode)
+{
+  switch (hostMode)
+  {
+    case  AUTHMGR_SINGLE_AUTH_MODE:return "MAB_SINGLE_AUTH_MODE";
+    case  AUTHMGR_MULTI_HOST_MODE:return "MAB_MULTI_HOST_MODE";
+    case  AUTHMGR_MULTI_AUTH_MODE:return "MAB_MULTI_AUTH_MODE";
+    default: return "Unknown host mode";
+  }
+}
+
+char *mabNodeTypeStringGet(authmgrNodeType_t type)
+{
+  switch (type)
+  {
+    case AUTHMGR_PHYSICAL:return "AUTHMGR_PHYSICAL";
+    case AUTHMGR_LOGICAL:return "AUTHMGR_LOGICAL";
+    default: return "Undefined";
+  }
+}
+
+char *mabTimerTypeStringGet(mabTimerType_t type)
+{
+  switch (type)
+  {
+    case MAB_SERVER_AWHILE:return "MAB_SERVER_AWHILE";
+    default: return "Undefined";
+  }
+}
+
+char *mabVlanTypeStringGet(authmgrVlanType_t type)
+{
+  switch (type)
+  {
+    case AUTHMGR_VLAN_RADIUS:return "AUTHMGR_VLAN_RADIUS";
+    case AUTHMGR_VLAN_GUEST:return "AUTHMGR_VLAN_GUEST";
+    case AUTHMGR_VLAN_UNAUTH:return "AUTHMGR_VLAN_UNAUTH";
+    case AUTHMGR_VLAN_DEFAULT:return "AUTHMGR_VLAN_DEFAULT";
+    case AUTHMGR_VLAN_BLOCKED:return "AUTHMGR_VLAN_BLOCKED";
+    default: return "Undefined";
+  }
+}
diff --git a/src/sonic-pac/mab/mapping/mab_ih.c b/src/sonic-pac/mab/mapping/mab_ih.c
new file mode 100644
index 00000000000..565af259a7c
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_ih.c
@@ -0,0 +1,640 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mab_include.h"
+#include "mab_db.h"
+#include "mab_client.h"
+#include "mab_struct.h"
+
+extern mabBlock_t *mabBlock;
+
+extern void  mabWarmRestartTypeSet( BOOL  FALSE);
+
+/*********************************************************************
+ * @purpose  Handles events generated by NIM
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param    intfEvent  @b{(input)) interface event
+ * @param    correlator @b{(input)) Correlator for the event
+ * @param    eventData  @b((input)) Additional event specific data
+ *
+ * @returns   SUCCESS  on a successful operation
+ * @returns   FAILURE  for any error
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabIntfChangeCallback(uint32 intIfNum, uint32 intfEvent, 
+                              NIM_CORRELATOR_t correlator,
+                              NIM_EVENT_SPECIFIC_DATA_t eventData)
+{
+  mabIntfChangeParms_t parms;
+
+  parms.intfEvent = intfEvent;
+  parms.nimCorrelator = correlator;
+
+  return mabIssueCmd(mabIntfChange, intIfNum, &parms);
+}
+
+/*********************************************************************
+ * @purpose  Handles startup notification from NIM
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param    intfEvent  @b{(input)) interface event
+ * @param    correlator @b{(input)) Correlator for the event
+ *
+ * @returns   SUCCESS  on a successful operation
+ * @returns   FAILURE  for any error
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+void mabIntfStartupCallback(NIM_STARTUP_PHASE_t startupPhase)
+{
+  /* hold NIM till MAB is ready */
+  while (!(MAB_IS_READY))
+  {
+     LOGF( LOG_SEVERITY_ERROR,
+        "Received an interface startup callback while MAB is not ready(startup phase=%d). waiting..",
+        startupPhase);
+    osapiSleep(1);
+  }
+  mabIssueCmd(mabIntfStartup,  NULL, &startupPhase);
+  return;
+}
+
+/*********************************************************************
+ * @purpose  Process NIM startup callback
+ *
+ * @param    startupPhase @b{(input)) CREATE or ACTIVATE
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+RC_t mabIhProcessIntfStartup(NIM_STARTUP_PHASE_t startup_phase)
+{
+  RC_t rc;
+  uint32 intIfNum = 0;
+  PORTEVENT_MASK_t nimEventMask;
+  uint32 startTime, endTime;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+
+  MAB_EVENT_TRACE("%s:%d Received event %d from NIM and warm restart %d \n",
+      __FUNCTION__,__LINE__,startup_phase,mabIsRestartTypeWarm());
+
+  startTime = osapiTimeMillisecondsGet();
+  switch (startup_phase)
+  {
+    case NIM_INTERFACE_CREATE_STARTUP:
+      rc = nimFirstValidIntfNumber(&intIfNum);
+
+      while (rc ==  SUCCESS)
+      {
+        if (mabIsValidIntf(intIfNum) ==  TRUE)
+        {
+          if (mabIntfCreate(intIfNum) !=  SUCCESS)
+          {
+            nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+             LOGF( LOG_SEVERITY_ERROR,
+                "Error in creating interface %s.", ifName);
+          }
+        }
+        rc = nimNextValidIntfNumber(intIfNum, &intIfNum);
+      }
+
+      /* Now ask NIM to send any future changes for these event types */
+      memset(&nimEventMask, 0, sizeof(PORTEVENT_MASK_t));
+      PORTEVENT_SETMASKBIT(nimEventMask,  CREATE);
+      PORTEVENT_SETMASKBIT(nimEventMask,  DELETE);
+      nimRegisterIntfEvents( MAB_COMPONENT_ID, nimEventMask);
+      break;
+
+    case NIM_INTERFACE_ACTIVATE_STARTUP:
+
+ 
+
+      rc = mabIntfActivateStartup();
+
+
+      /* Now ask NIM to send any future changes for these event types */
+      memset(&nimEventMask, 0, sizeof(PORTEVENT_MASK_t));
+      PORTEVENT_SETMASKBIT(nimEventMask,  CREATE);
+      PORTEVENT_SETMASKBIT(nimEventMask,  DELETE);
+      PORTEVENT_SETMASKBIT(nimEventMask,  ATTACH);
+      PORTEVENT_SETMASKBIT(nimEventMask,  DETACH);
+      PORTEVENT_SETMASKBIT(nimEventMask,  PORT_ENABLE);
+      PORTEVENT_SETMASKBIT(nimEventMask,  PORT_DISABLE);
+      PORTEVENT_SETMASKBIT(nimEventMask,  UP);
+      PORTEVENT_SETMASKBIT(nimEventMask,  DOWN);
+      PORTEVENT_SETMASKBIT(nimEventMask,  PROBE_SETUP);
+      PORTEVENT_SETMASKBIT(nimEventMask,  PROBE_TEARDOWN);
+      PORTEVENT_SETMASKBIT(nimEventMask,  AUTHMGR_ACQUIRE);
+      nimRegisterIntfEvents( MAB_COMPONENT_ID, nimEventMask);
+
+    (void) osapiTaskInitDone ( MAB_DB_TASK_SYNC);
+
+      break;
+
+    default:
+      break;
+  }
+
+  endTime = osapiTimeMillisecondsGet();
+  nimStartupEventDone( MAB_COMPONENT_ID);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Process Link state changes
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param    intIfEvent @b{(input)) interface event
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+RC_t mabIhProcessIntfChange(uint32 intIfNum, uint32 intfEvent, NIM_CORRELATOR_t correlator)
+{
+  uint32 linkState, adminState;
+  RC_t rc =  SUCCESS;
+  uint32 currAcquired, prevAcquired;
+  NIM_EVENT_COMPLETE_INFO_t status;
+  mabPortCfg_t *pCfg;
+  uint32       lIntIfNum;
+  mabLogicalPortInfo_t *logicalPortInfo;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  status.intIfNum     = intIfNum;
+  status.component    =  MAB_COMPONENT_ID;
+  status.event        = intfEvent;
+  status.correlator   = correlator;
+  nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+
+  if (!(MAB_IS_READY))
+  {
+     LOGF( LOG_SEVERITY_INFO,
+        "Received an interface change callback while MAB not ready to receive it.");
+    MAB_EVENT_TRACE("%s:%d Nim Event %d received for %s when mab is not ready \n",
+        __FUNCTION__,__LINE__,intfEvent,ifName);
+    rc =  FAILURE;
+    status.response.rc = rc;
+    nimEventStatusCallback(status);
+    return rc;
+  }
+
+  MAB_EVENT_TRACE("%s:%d Nim Event %d received for %s \n",
+      __FUNCTION__,__LINE__,intfEvent,ifName);
+
+  if (mabIsValidIntf(intIfNum) !=  TRUE)
+  {
+    rc =  SUCCESS;
+    status.response.rc = rc;
+    nimEventStatusCallback(status);
+    return rc;
+  }
+
+  switch (intfEvent)
+  {
+    case  UP:
+    case  PORT_ENABLE:
+      mabBlock->mabPortInfo[intIfNum].portEnabled =  FALSE;
+      if (mabIntfIsConfigurable(intIfNum, &pCfg) ==  TRUE)
+      {
+      if (nimGetIntfLinkState(intIfNum, &linkState) ==  SUCCESS)
+      {
+        if ( (nimGetIntfAdminState(intIfNum, &adminState) ==  SUCCESS) &&
+            (adminState ==  ENABLE) &&
+            (nimGetIntfLinkState(intIfNum, &linkState) ==  SUCCESS) &&
+            (linkState ==  UP) )
+        {
+          mabBlock->mabPortInfo[intIfNum].portEnabled =  TRUE;
+        }
+        else
+        {
+          mabBlock->mabPortInfo[intIfNum].portEnabled =  FALSE;
+        }
+      }
+
+        if (mabBlock->mabPortInfo[intIfNum].portEnabled ==  TRUE)
+        {
+          {
+            /* Cleanup any existing clients on the port before reset */
+            mabPortInfoCleanup(intIfNum);
+            (void) mabPortReset(intIfNum);
+            (void) mabCtlApplyPortConfigData(intIfNum);
+          }
+        }
+      }
+      break;
+
+    case  PROBE_TEARDOWN:
+      /* update aquired list */
+      COMPONENT_ACQ_CLRMASKBIT(mabBlock->mabPortInfo[intIfNum].acquiredList,  PORT_MIRROR_COMPONENT_ID);
+
+
+      /* check if currently acquired */
+      COMPONENT_ACQ_NONZEROMASK(mabBlock->mabPortInfo[intIfNum].acquiredList, currAcquired);
+
+      /* If the interface is not currently acquired by some component, cause
+       * the acquisition to be reflected in the state of the spanning tree
+       */
+      if (currAcquired ==  FALSE)
+      {
+        if (nimGetIntfLinkState(intIfNum, &linkState) ==  SUCCESS)
+        {
+          if ( (nimGetIntfAdminState(intIfNum, &adminState) ==  SUCCESS) &&
+              (adminState ==  ENABLE) &&
+              (nimGetIntfLinkState(intIfNum, &linkState) ==  SUCCESS) &&
+              (linkState ==  UP) )
+          {
+            mabBlock->mabPortInfo[intIfNum].portEnabled =  TRUE;
+            /* Cleanup any existing clients on the port before reset */
+            mabPortInfoCleanup(intIfNum);
+            (void) mabPortReset(intIfNum);
+            (void) mabCtlApplyPortConfigData(intIfNum);
+          }
+        }
+      }
+      break;
+
+    case  DOWN:
+    case  PORT_DISABLE:
+
+      if (mabIntfIsConfigurable(intIfNum, &pCfg) ==  TRUE )
+      {
+        lIntIfNum = MAB_LOGICAL_PORT_ITERATE;
+        while ((logicalPortInfo=mabLogicalPortInfoGetNextNode(intIfNum,&lIntIfNum))!=  NULLPTR)
+        {
+          if (0 == logicalPortInfo->key.keyNum)
+            continue;
+
+          if (mabBlock->mabPortInfo[intIfNum].portControlMode ==  AUTHMGR_PORT_AUTO)
+          {
+            mabPortInfoCleanup(intIfNum);
+          }
+        }
+      }
+      break;
+
+    case  PROBE_SETUP:
+      /* check if previously acquired */
+      COMPONENT_ACQ_NONZEROMASK(mabBlock->mabPortInfo[intIfNum].acquiredList, prevAcquired);
+      COMPONENT_ACQ_SETMASKBIT(mabBlock->mabPortInfo[intIfNum].acquiredList,  PORT_MIRROR_COMPONENT_ID);
+
+      /* If the interface was not previously acquired by some component, cause
+       * the acquisition to be reflected in the state of the spanning tree
+       */
+      if (prevAcquired ==  FALSE)
+      {
+        if (mabBlock->mabPortInfo[intIfNum].portControlMode !=  AUTHMGR_PORT_FORCE_AUTHORIZED)
+        {
+          /* reset all the clients associated with the port if port control mode is Macbased */
+          if (mabBlock->mabPortInfo[intIfNum].portControlMode ==  AUTHMGR_PORT_AUTO)
+          {
+            /* remove clients from any associated vlans*/
+            mabPortInfoCleanup(intIfNum);
+            /* reset all the clients associated with the port */
+            (void) mabPortReset(intIfNum);
+            (void) mabCtlApplyPortConfigData(intIfNum);
+          }
+        }
+      }
+      break;
+
+    case  CREATE:
+      rc = mabIntfCreate(intIfNum);
+      break;
+
+    case  ATTACH:
+      if (mabIntfIsConfigurable(intIfNum, &pCfg) ==  TRUE)
+      {
+        (void) mabPortReset(intIfNum);
+      }
+      else
+      {
+        rc =  FAILURE;
+      }
+      break;
+
+    case  DETACH:
+      rc = mabIntfDetach(intIfNum);
+      break;
+
+    case  DELETE:
+      rc = mabIntfDelete(intIfNum);
+      break;
+
+    case  AUTHMGR_ACQUIRE:
+      rc =  SUCCESS;
+      break;
+
+    default:
+      break;
+  }
+
+  status.response.rc = rc;
+  nimEventStatusCallback(status);
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose  bring up the individual interface
+ *
+ * @param    warmRestart  BOOL true if restart type is warm
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments Handle the events ATTACH, UP, Acquire etc
+ *
+ * @end
+ *********************************************************************/
+RC_t mabIntfStart(uint32 intIfNum,  BOOL warmRestart)
+{
+  mabPortCfg_t *pCfg;
+  RC_t rc =  FAILURE;
+  uint32 portLinkState;
+   COMPONENT_IDS_t acqCompId =  FIRST_COMPONENT_ID;
+  uint32 adminState, count = 0;
+   BOOL probePort, restore =  FALSE, skipFlag =  FALSE;
+   BOOL needCleanup =  TRUE;
+
+  do
+  {
+    if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    {  
+      return rc;
+    }
+
+
+    /* Link state */
+    rc = nimGetIntfLinkState(intIfNum, &portLinkState);
+    if (rc !=  SUCCESS)
+    {
+      break;
+    }
+    rc = nimGetIntfAdminState(intIfNum, &adminState);
+    if (rc !=  SUCCESS)
+    {
+      break;
+    }
+
+    if (( TRUE != warmRestart) ||
+        (0 == count))
+    {
+      (void) mabPortReset (intIfNum);
+      rc = mabCtlApplyPortConfigData (intIfNum);
+    }
+    else
+    {
+      (void) mabPortReset (intIfNum);
+
+      mabPortInfoInitialize (intIfNum,  TRUE);
+      skipFlag =  TRUE;
+    }
+
+
+    if (probePort)
+    {
+      acqCompId =  PORT_MIRROR_COMPONENT_ID;
+    }
+
+    if (acqCompId !=  FIRST_COMPONENT_ID)
+    {
+      COMPONENT_ACQ_SETMASKBIT(mabBlock->mabPortInfo[intIfNum].acquiredList, acqCompId);
+    }
+    else
+    {
+      if (portLinkState ==  UP)
+      {
+          if ((restore) && (warmRestart ==  TRUE) && (skipFlag ==  TRUE) &&
+               ((mabBlock->mabPortInfo[intIfNum].portControlMode ==   AUTHMGR_PORT_AUTO)))
+          {
+            count = 0;
+            if (0 != count)
+            {
+              needCleanup =  FALSE;
+            }
+          }
+      } /* end if link state is up*/
+    }/* end intf not acquired*/
+  }
+  while ( FALSE);
+  /* Acquire /Release*/
+  return rc;
+
+}
+
+/*********************************************************************
+ * @purpose  Process the activate startup callback from NIM
+ *
+ * @param
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+RC_t mabIntfActivateStartup()
+{
+ RC_t rc;
+  uint32 intIfNum = 0;
+
+  rc = nimFirstValidIntfNumber(&intIfNum);
+
+  while (rc ==  SUCCESS)
+  {
+    if (mabIsValidIntf(intIfNum) ==  TRUE)
+    {
+      mabIntfStart(intIfNum, mabIsRestartTypeWarm());
+    }
+    rc = nimNextValidIntfNumber(intIfNum, &intIfNum);
+  }
+
+  mabBlock->mabSwitchoverInProgress =  FALSE;
+  mabWarmRestartTypeSet(FALSE);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Obtain a pointer to the specified interface configuration data
+ *           for this interface
+ *
+ * @param    intIfNum @b{(input)} Internal Interface Number
+ * @param    **pCfg   @b{(output)}  Ptr  to mab port config structure
+ *                           or  NULL if not needed
+ *
+ * @returns   TRUE
+ * @returns   FALSE
+ *
+ *
+ * @comments Facilitates pre-configuration, as it checks if the NIM
+ *           interface exists and whether the component is in a state to
+ *           be configured (regardless of whether the component is enabled
+ *           or not).
+ *
+ * @comments The caller can set the pCfg parm to  NULL if it does not
+ *           want the value output from this function.
+ *
+ * @end
+ *********************************************************************/
+ BOOL mabIntfIsConfigurable(uint32 intIfNum, mabPortCfg_t **pCfg)
+{
+  nimConfigID_t configId;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+
+  if (!(MAB_IS_READY))
+    return  FALSE;
+
+  /* Check boundary conditions */
+  if (intIfNum <= 0 || intIfNum >=  MAB_INTF_MAX_COUNT)
+    return  FALSE;
+
+
+  /* verify that the configId in the config data table entry matches the configId that NIM maps to
+   ** the intIfNum we are considering
+   */
+  if (nimConfigIdGet(intIfNum, &configId) ==  SUCCESS)
+  {
+    if (NIM_CONFIG_ID_IS_EQUAL(&configId, &(mabBlock->mabCfg->mabPortCfg[intIfNum].configId)) ==  TRUE)
+    {
+      *pCfg = &mabBlock->mabCfg->mabPortCfg[intIfNum];
+      return  TRUE;
+    }
+  }
+
+  /* if we get here, either we have a table management error between mabCfg and mabMapTbl or
+   ** there is synchronization issue between NIM and components w.r.t. interface creation/deletion
+   */
+   LOGF( LOG_SEVERITY_INFO,
+      "Error accessing MAB config data for interface %s in MAB interface configuration.\n", ifName);
+  return  FALSE;
+}
+
+/*********************************************************************
+ *
+ * @purpose  To process the Callback for  CREATE
+ *
+ * @param    uint32  intIfNum  internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t mabIntfCreate(uint32 intIfNum)
+{
+  nimConfigID_t configId;
+  mabPortCfg_t *pCfg;
+
+  if (mabIsValidIntf(intIfNum) !=  TRUE)
+    return  FAILURE;
+
+  if (nimConfigIdGet(intIfNum, &configId) !=  SUCCESS)
+    return  FAILURE;
+
+  pCfg = &mabBlock->mabCfg->mabPortCfg[intIfNum];
+
+  if (!(NIM_CONFIG_ID_IS_EQUAL(&configId, &pCfg->configId)))
+  {
+    NIM_CONFIG_ID_COPY(&pCfg->configId, &configId);
+    /* If an interface configuration entry is not already assigned to the interface, assign one */
+    /* Update the configuration structure with the config id */
+    mabBuildDefaultIntfConfigData(&configId, pCfg);
+  }
+
+  (void)mabCtlPortStatsClear(intIfNum);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ *
+ * @purpose  To process the Callback for  DETACH
+ *
+ * @param    uint32  intIfNum  internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t mabIntfDetach(uint32 intIfNum)
+{
+  mabPortCfg_t *pCfg;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) ==  TRUE)
+  {
+    mabPortInfoCleanup(intIfNum);
+    (void)mabCtlApplyPortConfigData(intIfNum);
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ *
+ * @purpose  To process the Callback for  DELETE
+ *
+ * @param    uint32  intIfNum  internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t mabIntfDelete(uint32 intIfNum)
+{
+  mabPortCfg_t *pCfg;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) ==  TRUE)
+  {
+    mabPortInfoCleanup(intIfNum);
+
+    memset((void *)&pCfg->configId, 0, sizeof(nimConfigID_t));
+    memset((void *)&mabBlock->mabMapTbl[intIfNum], 0, sizeof(uint32));
+    memset((void *)&mabBlock->mabPortInfo[intIfNum], 0, sizeof(mabPortInfo_t));
+    memset((void *)&mabBlock->mabPortStats[intIfNum], 0, sizeof(mabPortStats_t));
+  }
+
+  return  SUCCESS;
+}
diff --git a/src/sonic-pac/mab/mapping/mab_init.c b/src/sonic-pac/mab/mapping/mab_init.c
new file mode 100755
index 00000000000..5f881387e83
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_init.c
@@ -0,0 +1,254 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mab_include.h"
+#include "mab_debug.h"
+#include "mab_struct.h"
+#include "mab_radius.h"
+#include "osapi_sem.h"
+
+/*dummy declaration to resolve linking errors */
+#define platAuthMgrMaxUsersGet()         (512)
+static uint32 platIntfMaxCountGet (void)
+{
+  return  MAX_INTERFACE_COUNT;
+}
+
+mabBlock_t *mabBlock =  NULLPTR;
+
+ BOOL mabIsRestartTypeWarm()
+{
+  return mabBlock->warmRestart;
+}
+
+void mabWarmRestartTypeSet(  BOOL warmType)
+{
+  mabBlock->warmRestart = warmType;
+}
+
+/*********************************************************************
+*
+* @purpose  System Initialization for mab 
+*
+* @param    none
+*
+* @returns   SUCCESS, if success
+* @returns   FAILURE, if other failure
+*
+* @comments  none
+*
+* @end
+*********************************************************************/
+RC_t mabInit(void)
+{
+  mabBlock = osapiMalloc( MAB_COMPONENT_ID, sizeof(mabBlock_t));
+
+  if ( NULLPTR == mabBlock)
+  {
+    return  FAILURE;
+  }
+
+  memset(mabBlock, 0, sizeof(mabBlock_t));
+  /*semaphore creation for task protection over the common data*/
+  mabBlock->mabTaskSyncSema = osapiSemaCCreate( OSAPI_SEM_Q_FIFO, OSAPI_SEM_EMPTY);
+  if (mabBlock->mabTaskSyncSema ==  NULL)
+  {
+     LOGF( LOG_SEVERITY_NOTICE,
+        "Unable to create mab task semaphore");
+    return  FAILURE;
+  }
+
+  mabBlock->mabRadiusSrvrTaskSyncSema = osapiSemaCCreate( OSAPI_SEM_Q_FIFO, OSAPI_SEM_EMPTY);
+  if (mabBlock->mabRadiusSrvrTaskSyncSema ==  NULL)
+  {
+     LOGF( LOG_SEVERITY_NOTICE,
+        "Unable to create mab radius server task semaphore");
+    return  FAILURE;
+  }
+
+  mabBlock->mabQueue = (void *)osapiMsgQueueCreate("mabQueue", MAB_MSG_COUNT, (uint32)sizeof(mabMsg_t));
+  if (mabBlock->mabQueue ==  NULLPTR)
+  {
+     LOGF( LOG_SEVERITY_INFO,
+            "mabInit: msgQueue creation error.\n");
+    return  FAILURE;
+  }
+
+  if (mabStartTasks() !=  SUCCESS)
+  {
+    return  FAILURE;
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+*
+* @purpose  System Init Undo for mab 
+*
+* @param    none
+*
+* @comments  none
+*
+* @end
+*********************************************************************/
+void mabInitUndo()
+{
+  if (mabBlock->mabQueue !=  NULLPTR)
+    osapiMsgQueueDelete(mabBlock->mabQueue);
+
+  (void)osapiRWLockDelete(mabBlock->mabRWLock);
+
+  if ( NULL != mabBlock->mabTaskSyncSema)
+  {
+    (void)osapiSemaDelete(mabBlock->mabTaskSyncSema);
+  }
+
+  if ( NULL != mabBlock->mabRadiusSrvrTaskSyncSema)
+  {
+    (void)osapiSemaDelete(mabBlock->mabRadiusSrvrTaskSyncSema);
+  }
+
+  if (mabBlock->mabTaskId != 0)
+    osapiTaskDelete(mabBlock->mabTaskId);
+
+  if ( NULLPTR != mabBlock)
+  {
+    osapiFree(MAB_COMPONENT_ID, mabBlock);
+  }
+}
+
+/*********************************************************************
+* @purpose  This function performs the Phase 1 initialization.
+*
+* @param    none
+*
+* @returns   SUCCESS - There were no errors.
+*
+* @returns   ERROR   - There were errors.
+*
+* @comments  none
+*
+* @end
+*********************************************************************/
+RC_t mabInitPhase1Process(void)
+{
+  RC_t mabRC,rc;
+  uint32 mabMaxNodes;
+
+  mabRC     =  SUCCESS;
+
+  mabBlock->mabCfg        = osapiMalloc( MAB_COMPONENT_ID, sizeof(mabCfg_t));
+  mabBlock->mabPortInfo   = osapiMalloc( MAB_COMPONENT_ID, sizeof(mabPortInfo_t) *  MAB_INTF_MAX_COUNT);
+
+  rc = mabLogicalPortInfoDBInit(platAuthMgrMaxUsersGet());
+
+  mabBlock->mabPortStats  = osapiMalloc( MAB_COMPONENT_ID, sizeof(mabPortStats_t) * platIntfMaxCountGet());
+  mabBlock->mabMapTbl     = osapiMalloc( MAB_COMPONENT_ID, sizeof(uint32) * platIntfMaxCountGet());
+
+  /* initialize Mac address database*/
+  rc = mabMacAddrInfoDBInit(platAuthMgrMaxUsersGet());
+
+  mabMaxNodes = ((2*platIntfMaxCountGet()) + platAuthMgrMaxUsersGet() +1);
+
+  /* Allocate buffer pool for App Timer */
+  if (bufferPoolInit( MAB_COMPONENT_ID, 2 * mabMaxNodes,  APP_TMR_NODE_SIZE, 
+                     "mab Timer Bufs", &mabBlock->mabAppTimerBufferPoolId) !=  SUCCESS)
+  {
+    mabRC   =  ERROR;
+    return mabRC;
+  }
+
+  if ((mabBlock->mabCfg       ==  NULLPTR) ||
+      (mabBlock->mabPortInfo  ==  NULLPTR) ||
+      (rc ==  FAILURE)                     ||
+      (mabBlock->mabPortStats ==  NULLPTR) ||
+      (mabBlock->mabMapTbl    ==  NULLPTR))
+  {
+    mabRC      =  ERROR;
+    return mabRC;
+  }
+
+  /* Zero bitmasks to indicate no interfaces are enabled */
+  memset((void *)mabBlock->mabCfg, 0, sizeof(mabCfg_t));
+  memset((void *)mabBlock->mabPortInfo, 0, sizeof(mabPortInfo_t) *  MAB_INTF_MAX_COUNT);
+  memset((void *)mabBlock->mabPortStats, 0, sizeof(mabPortStats_t) * platIntfMaxCountGet());
+  memset((void *)mabBlock->mabMapTbl, 0, sizeof(uint32) * platIntfMaxCountGet());
+
+  return mabRC;
+}
+
+/*********************************************************************
+* @purpose  This function performs the Phase 2 initialization.
+*
+* @param    none
+*
+* @returns   SUCCESS - There were no errors.
+*
+* @returns   ERROR   - There were errors.
+*
+* @comments  none
+*
+* @end
+*********************************************************************/
+RC_t mabInitPhase2Process(void)
+{
+  RC_t mabRC =  SUCCESS;
+
+  if (nimRegisterIntfChange( MAB_COMPONENT_ID, mabIntfChangeCallback,
+                            mabIntfStartupCallback, NIM_STARTUP_PRIO_MAB) !=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_INFO,
+            "mab: Unable to register with NIM\n");
+    mabRC       =  ERROR;
+    return mabRC;
+  }
+
+  return mabRC;
+}
+
+/*********************************************************************
+* @purpose  This function performs the Phase 3 initialization.
+*
+* @param    none
+*
+* @returns   SUCCESS - There were no errors.
+*
+* @returns   ERROR   - There were errors.
+*
+* @comments  none
+*
+* @end
+*********************************************************************/
+RC_t mabInitPhase3Process( BOOL warmRestart)
+{
+  RC_t mabRC;
+  mabRC     =  SUCCESS;
+
+  if (warmRestart ==  TRUE)
+  {
+    mabBlock->mabSwitchoverInProgress =  TRUE;
+  }
+
+  mabBuildDefaultConfigData();
+
+  if (mabCtlApplyConfigData() !=  SUCCESS)
+  {
+    mabRC     =  ERROR;
+  }
+
+  return  mabRC;
+}
diff --git a/src/sonic-pac/mab/mapping/mab_sid/mab_sid.c b/src/sonic-pac/mab/mapping/mab_sid/mab_sid.c
new file mode 100755
index 00000000000..281927d8459
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_sid/mab_sid.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "pacinfra_common.h"
+#include "mab_common.h"
+#include "mab_sid.h"
+#include "mab_sid_const.h"
+
+
+/*********************************************************************
+* @purpose  Get thread default Stack Size
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 mabSidDefaultStackSize()
+{
+  return ( FD_CNFGR_MAB_DEFAULT_STACK_SIZE );
+}
+
+/*********************************************************************
+* @purpose  Get thread default task slice
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 mabSidDefaultTaskSlice()
+{
+  return ( FD_CNFGR_MAB_DEFAULT_TASK_SLICE );
+}
+
+/*********************************************************************
+* @purpose  Get thread default task priority
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 mabSidDefaultTaskPriority()
+{
+  return ( FD_CNFGR_MAB_DEFAULT_TASK_PRI );
+}
+
diff --git a/src/sonic-pac/mab/mapping/mab_sid/mab_sid.h b/src/sonic-pac/mab/mapping/mab_sid/mab_sid.h
new file mode 100755
index 00000000000..838069a4d9c
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_sid/mab_sid.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_SID_H
+#define INCLUDE_MAB_SID_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "commdefs.h"
+#include "datatypes.h"
+
+/*********************************************************************
+* @purpose  Get thread default Stack Size
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 mabSidDefaultStackSize();
+
+/*********************************************************************
+* @purpose  Get thread default task slice
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 mabSidDefaultTaskSlice();
+
+/*********************************************************************
+* @purpose  Get thread default task priority
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 mabSidDefaultTaskPriority();
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* INCLUDE_MAB_SID_H */
diff --git a/src/sonic-pac/mab/mapping/mab_sid/mab_sid_const.h b/src/sonic-pac/mab/mapping/mab_sid/mab_sid_const.h
new file mode 100755
index 00000000000..41f1cc984fa
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_sid/mab_sid_const.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_SID_CONST_H
+#define INCLUDE_MAB_SID_CONST_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/*
+***********************************************************************
+*                          CONSTANTS
+***********************************************************************
+*/
+
+enum 
+{
+  FD_CNFGR_MAB_DEFAULT_STACK_SIZE     =  DEFAULT_STACK_SIZE,
+  FD_CNFGR_MAB_DEFAULT_TASK_SLICE     =  DEFAULT_TASK_SLICE,
+  FD_CNFGR_MAB_DEFAULT_TASK_PRI       =  TASK_PRIORITY_LEVEL( DEFAULT_TASK_PRIORITY)
+};
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_SID_CONST_H */
+
diff --git a/src/sonic-pac/mab/mapping/mab_socket.c b/src/sonic-pac/mab/mapping/mab_socket.c
new file mode 100644
index 00000000000..108d008509b
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/mab_socket.c
@@ -0,0 +1,463 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdbool.h>
+#include <pthread.h>
+#include <sys/socket.h>
+#include <unistd.h>
+#include <errno.h>
+#include <arpa/inet.h>
+#include "mab_api.h"
+#include "mab_include.h"
+#include "osapi.h"
+#include "mab_socket.h"
+#include "fpSonicUtils.h"
+
+#define MAX_CLIENTS 1024
+#define MAB_NO_SOCKET -1
+#define MAB_TID_INIT  -1
+#define MAB_SERVER_IPV4_ADDR "127.0.0.1"
+#define MAB_SERVER_LISTEN_PORT 3734
+#define MAB_MAX_SEND_SIZE 1024
+
+typedef struct connection_list_e
+{
+  int socket;
+  pthread_t tid;
+}connection_list_t;
+
+static connection_list_t connection_list[MAX_CLIENTS] = {};
+
+#define MAB_COPY(_a) static int _a##_##COPY(void *in, void *out)
+#define MAB_ENTER(_a, _b, _c, _rc) _rc = _a##_##COPY(_b, _c)
+
+int mab_cmd_ping(unsigned int intf, char *resp)
+{
+  unsigned int status = 0;
+
+  mabPortOperMABEnabledGet(intf, &status);
+
+  if (status)
+  {
+    osapiStrncpySafe(resp, "PONG", strlen("PONG")+1);
+  }
+  else
+  {
+    osapiStrncpySafe(resp, "NO RESP", strlen("NO RESP")+1);
+  }
+
+  return 0;
+}
+
+int mab_cmd_event_notify(unsigned int intf, unsigned int event , unsigned char *mac, char *resp)
+{
+  int rc = 0;
+   enetMacAddr_t mac_addr;
+
+  memcpy(mac_addr.addr, mac, 6);
+
+  rc = mabClientEventUpdate(intf, event, &mac_addr);
+
+  if (!rc)
+  {
+    osapiStrncpySafe(resp, "OK", strlen("OK")+1);
+  }
+  else
+  {
+    osapiStrncpySafe(resp, "FAIL", strlen("FAIL")+1);
+  }
+
+  return 0;
+}
+
+MAB_COPY(INTERFACE)
+{
+
+	char *intfStr = (char *)in;
+	unsigned int intf = 0; 
+
+ fpGetIntIfNumFromHostIfName(intfStr, &intf);
+	(*(unsigned int *)out) = intf;
+
+  return 0;
+}
+
+MAB_COPY(CMD)
+{
+  mab_pac_cmd_t *req = (mab_pac_cmd_t *)in;
+  char *resp = (char *)out;
+  unsigned int intf = 0;
+  int rc = 0;
+
+  /* convert char intf to intf number */
+  MAB_ENTER(INTERFACE, (void *)req->intf, (void *)&intf, rc);
+
+  printf("MAB ENTER INTERFACE !! rc %d \n", rc);
+
+  if (0 != rc)
+    return -1;
+
+  if (0 == strncmp("PING", req->cmd, strlen("PING")))
+  {
+    rc = mab_cmd_ping(intf, resp);
+  }
+  else if (0 == strncmp("event-notify", req->cmd, strlen("event-notify")+1))
+  {
+    rc = mab_cmd_event_notify(intf, req->notif_event, req->mac_addr, resp);
+  }
+  else
+  {
+    osapiStrncpySafe(resp, "unknown cmd", strlen("unknown cmd")+1);
+  }
+
+  return 0;
+}
+
+/* Start listening socket listen_sock. */
+int start_listen_socket(int *listen_sock)
+{
+  int reuse = 1;
+  struct sockaddr_in my_addr;
+
+  /* Obtain a file descriptor for our "listening" socket. */
+  *listen_sock = socket(AF_INET, SOCK_STREAM, 0);
+  if (*listen_sock < 0)
+  {
+    perror("socket");
+    return -1;
+  }
+
+  if (setsockopt(*listen_sock, SOL_SOCKET, SO_REUSEADDR, &reuse, sizeof(reuse)) != 0) {
+    perror("setsockopt");
+    return -1;
+  }
+
+  memset(&my_addr, 0, sizeof(my_addr));
+  my_addr.sin_family = AF_INET;
+  my_addr.sin_addr.s_addr = inet_addr(MAB_SERVER_IPV4_ADDR);
+  my_addr.sin_port = htons(MAB_SERVER_LISTEN_PORT);
+
+  if (bind(*listen_sock, (struct sockaddr*)&my_addr, sizeof(struct sockaddr)) != 0) {
+    perror("bind");
+    return -1;
+  }
+
+  /* start accept client connections */
+    if (listen(*listen_sock, 144) != 0) {
+      perror("listen");
+      return -1;
+    }
+  printf("Accepting connections on port %d.\n", (int)MAB_SERVER_LISTEN_PORT);
+
+  return 0;
+}
+
+
+void connection_close(int conn_socket)
+{
+  int i;
+
+  for (i = 0; i < MAX_CLIENTS; ++i) {
+    if (connection_list[i].socket == conn_socket) {
+      close(connection_list[i].socket);
+      connection_list[i].socket = MAB_NO_SOCKET;
+    }
+  }
+}
+
+
+/* Receive message from peer and handle it with message_handler(). */
+int read_from_connection(int socket, char *buf, unsigned int buf_len,
+                             unsigned int *bytes_read, bool *more_data)
+{
+  size_t len_to_receive;
+  ssize_t received_count = 0;
+  size_t received_total = 0;
+
+  char *buf_ptr = buf;
+
+  MAB_EVENT_TRACE(
+    "Entering read_from_connection fd %d buf_len %d\n", socket, buf_len);
+
+
+  do {
+    if (received_total >= buf_len)
+    {
+      /* still more to copy */
+      *more_data = true;
+      *bytes_read = received_total;
+      MAB_EVENT_TRACE(
+          "fd: %d There is more data , Read %zd bytes till now",
+          socket, received_count);
+
+      return 0;
+    }
+
+    /* Count bytes to receive.*/
+    len_to_receive = buf_len;
+    if (len_to_receive > MAB_MAX_SEND_SIZE)
+      len_to_receive = MAB_MAX_SEND_SIZE;
+
+    MAB_EVENT_TRACE(
+             "fd: %d Let's try to recv() %zd bytes... ", socket, len_to_receive);
+
+    received_count = recv(socket, buf_ptr, len_to_receive, NULL);
+
+    if (received_count < 0) {
+      if (errno == EAGAIN || errno == EWOULDBLOCK) {
+          MAB_EVENT_TRACE(
+          "fd %d peer is not ready right now, try again later.\n", socket);
+          continue;
+      }
+      else {
+        perror("recv() from peer error");
+        *more_data = false;
+        return -1;
+      }
+    }
+
+    /* If recv() returns 0, it means that peer gracefully shutdown. Shutdown client.*/
+    else if (received_count == 0) {
+           MAB_EVENT_TRACE(
+           "fd %d recv() 0 bytes. Peer gracefully shutdown.\n", socket);
+           *more_data = false;
+           break;
+    }
+    else if (received_count > 0) {
+      received_total += received_count;
+      MAB_EVENT_TRACE(
+      "fd %d recv() %zd bytes\n", socket, received_count);
+
+      buf_ptr += received_count;
+      len_to_receive -= received_count;
+      *more_data = false;
+      break;
+    }
+
+  } while (received_count > 0);
+
+  *bytes_read = received_total;
+
+  MAB_EVENT_TRACE(
+       "fd %d Total recv()'ed %zu bytes.\n", socket, received_total);
+  return 0;
+}
+
+void close_connection(int conn_socket)
+{
+  close(conn_socket);
+}
+
+void *new_connection_handle(void *arg)
+{
+  int new_socket = *((int *)arg);
+  char recv_buff[2048] = {0};
+  char resp_buff[256] = {0};
+  char *buf = &recv_buff[0];
+  unsigned int bytes_received;
+  bool more_data = true;
+  int rem_len = sizeof(recv_buff);
+  int total_read = 0;
+  int rc = -1;
+
+  int i;
+  char *ptr = &recv_buff[0];
+
+  while(more_data)
+  {
+    more_data = false;
+    if (rem_len <= 0)
+    {
+      MAB_EVENT_TRACE(
+        "fd: %d More data to read, but not sufficient buffer !!\n", new_socket);
+      break;
+    }
+    bytes_received = 0;
+    if (0 != read_from_connection(new_socket, buf, rem_len, &bytes_received, &more_data))
+    {
+      break;
+    }
+    buf = recv_buff + bytes_received;
+    total_read += bytes_received;
+    rem_len = sizeof(recv_buff) - total_read;
+  }
+
+  printf("buffer: ");
+  for (i =0; i<10; i++)
+  {
+    printf("0x%x ", ptr[i]);
+  }
+  printf("\n");
+
+  MAB_EVENT_TRACE(
+  "fd :%d start processing the cmd and send resp!!\n", new_socket);
+
+  MAB_ENTER(CMD, (void *)recv_buff, (void *)resp_buff, rc);
+
+  if (strlen(resp_buff))
+  {
+    /* send the response */
+    rc = send(new_socket, resp_buff, sizeof(resp_buff), 0);
+
+    MAB_EVENT_TRACE(
+     "fd :%d Successfully sent data (len %lu bytes): %s\n",
+           new_socket, sizeof(resp_buff), resp_buff);
+  }
+
+  free (arg);
+  close_connection(new_socket);
+  pthread_exit(NULL); 
+}
+
+
+int new_connection_open(int new_client_sock)
+{
+  int *new_sock;
+  int ret = 0;
+  pthread_attr_t tattr;
+  static int cl_count;
+
+
+  if ((ret = pthread_attr_init(&tattr)) !=0)
+  {
+    MAB_EVENT_TRACE(
+      "Failed to create thread - pthread_attr_init failed with %d\n", ret);
+    close(new_client_sock);
+    return -1;
+  }
+
+  if ((ret = pthread_attr_setdetachstate(&tattr,PTHREAD_CREATE_DETACHED)) !=0)
+  {
+    MAB_EVENT_TRACE(
+      "Failed to create thread - pthread_attr_setdetachstate failed with %d\n", ret);
+    close(new_client_sock);
+    pthread_attr_destroy(&tattr);
+    return -1;
+  }
+
+  new_sock = malloc(sizeof(*new_sock));
+  *new_sock = new_client_sock;
+
+  connection_list[cl_count].socket = new_client_sock;
+  connection_list[cl_count].tid = MAB_TID_INIT;
+
+      if ((ret = pthread_create(&connection_list[cl_count].tid, &tattr, 
+               new_connection_handle, (void*)new_sock)) !=0)
+      {
+        MAB_EVENT_TRACE(
+         "Failed to create thread\n");
+        free(new_sock);
+        connection_close(new_client_sock);
+        pthread_attr_destroy(&tattr);
+        return -1;
+      }
+      cl_count = (cl_count+1)%MAX_CLIENTS;
+      pthread_attr_destroy(&tattr);
+      return 0;
+}
+
+
+int mab_socket_server_handle(int *listen_sock)
+{
+  int i;
+  int new_client_sock = -1;
+  struct sockaddr_in client_addr;
+  socklen_t client_len = sizeof(client_addr);
+  char client_ipv4_str[INET_ADDRSTRLEN];
+
+  if (start_listen_socket(listen_sock) != 0) {
+    return -1;
+  }
+
+  for (i = 0; i < MAX_CLIENTS; ++i)
+  {
+    connection_list[i].socket = MAB_NO_SOCKET;
+    connection_list[i].tid = MAB_TID_INIT;
+  }
+
+  while (1)
+  {
+    new_client_sock = -1;
+    printf("calling accept.\n");
+
+    memset(&client_addr, 0, sizeof(client_addr));
+
+    new_client_sock = accept(*listen_sock, (struct sockaddr *)&client_addr, &client_len);
+    if (new_client_sock < 0) {
+      perror("accept()");
+      continue;
+    }
+
+    inet_ntop(AF_INET, &client_addr.sin_addr, client_ipv4_str, INET_ADDRSTRLEN);
+
+    MAB_EVENT_TRACE(
+        "Incoming connection from client fd %d [%s:%u] ",
+        new_client_sock, inet_ntoa(client_addr.sin_addr), ntohs(client_addr.sin_port));
+
+    new_connection_open(new_client_sock);
+  }
+  return 0;
+}
+
+int mab_radius_init_recv_socket(int *sock)
+{
+  struct sockaddr_in s_addr;
+  *sock = -1;
+
+  /* create the mab server socket */
+	*sock = socket(AF_INET, SOCK_DGRAM, 0);
+	if (*sock < 0) {
+        MAB_EVENT_TRACE(
+		   "socket[AF_INET,SOCK_DGRAM]: %s",
+			   strerror(errno));
+		return -1;
+	}
+
+    memset(&s_addr, 0, sizeof(s_addr));
+    s_addr.sin_family    = AF_INET; 
+    s_addr.sin_addr.s_addr = inet_addr("127.0.0.1");
+    s_addr.sin_port = htons(9395);
+
+    if (bind(*sock, (const struct sockaddr *)&s_addr, 
+            sizeof(s_addr)) < 0 )
+    {
+        perror("bind failed");
+        return -1;
+    }
+   return 0;
+}
+
+
+int mab_radius_init_send_socket(int *sock)
+{
+  *sock = -1;
+
+  /* create the mab send socket */
+	*sock = socket(AF_INET, SOCK_DGRAM, 0);
+	if (*sock < 0) {
+        MAB_EVENT_TRACE(
+		 "socket[AF_INET,SOCK_DGRAM]: %s",
+			   strerror(errno));
+		return -1;
+	}
+   return 0;
+}
+
+
diff --git a/src/sonic-pac/pacmgr/Makefile.am b/src/sonic-pac/pacmgr/Makefile.am
new file mode 100755
index 00000000000..20c2883c43e
--- /dev/null
+++ b/src/sonic-pac/pacmgr/Makefile.am
@@ -0,0 +1,19 @@
+INCLUDES = -I $(top_srcdir)/pacmgr -I $(top_srcdir)/authmgr/common -I $(top_srcdir)/authmgr/mapping/include
+INCLUDES += -I $(top_srcdir)/fpinfra/inc -I $(top_srcdir)/authmgr/mapping/auth_mgr_sid
+INCLUDES += -I $(top_srcdir)/authmgr/protocol/include 
+INCLUDES += -I $(top_srcdir)/pacoper/ 
+bin_PROGRAMS = pacd 
+
+if DEBUG
+DBGFLAGS = -ggdb -DDEBUG
+else
+DBGFLAGS = -g -DNDEBUG
+endif
+
+pacd_SOURCES = $(top_srcdir)/pacmgr/pacmgr_main.cpp $(top_srcdir)/pacmgr/pacmgr.cpp
+pacd_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(SONIC_COMMON_CFLAGS)
+
+AM_LDFLAGS = -L$(top_srcdir)/fpinfra/ -lfpinfra
+AM_LDFLAGS += -lswsscommon -lnl-3 -lnl-route-3 -lhiredis -L$(top_srcdir)/authmgr/ -lauthmgr
+AM_LDFLAGS += -L$(top_srcdir)/paccfg/ -lpaccfg
+AM_LDFLAGS += -L$(top_srcdir)/pacoper/ -lpacoper $(SONIC_COMMON_LDFLAGS)
diff --git a/src/sonic-pac/pacmgr/pacmgr.cpp b/src/sonic-pac/pacmgr/pacmgr.cpp
new file mode 100644
index 00000000000..096419849f6
--- /dev/null
+++ b/src/sonic-pac/pacmgr/pacmgr.cpp
@@ -0,0 +1,1526 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <vector>
+#include <string>
+#include <sstream>
+#include <netinet/in.h>
+
+#include "select.h"
+#include "pacmgr.h"
+#include "auth_mgr_exports.h"
+#include "datatypes.h"
+#include "packet.h"
+#include "auth_mgr_api.h"
+#include "auth_mgr_common.h"
+#include "comm_mask.h"
+#include "nimapi.h"
+#include <cstring>
+
+#include <sys/types.h>
+#include <sys/socket.h>
+#include "select.h"
+#include <errno.h>
+#include <unistd.h>
+#include <fstream>
+#include <sys/socket.h>
+#include <algorithm>
+#include <netlink/route/link.h>
+#include <linux/ip.h>
+#include <linux/udp.h>
+#include <linux/if_ether.h>
+#include <errno.h>
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+#include <linux/if_packet.h>
+#include <net/ethernet.h>
+#include <net/if.h>
+#include <arpa/inet.h>
+#include <fcntl.h>
+#include "fpSonicUtils.h"
+
+extern PacMgr pacmgr;
+extern swss::Select s;
+extern pacSocket_map_t g_pacSocketMap;
+
+const string INTFS_PREFIX = "E";
+
+PacMgr *pac;
+
+PacMgr::PacMgr(DBConnector *configDb, DBConnector *stateDb,  DBConnector *appDb) :
+               m_confPacTbl(configDb, CFG_PAC_PORT_CONFIG_TABLE),
+               m_confPacGblTbl(configDb, CFG_PAC_GLOBAL_CONFIG_TABLE),
+               m_confPacHostapdGblTbl(configDb, CFG_PAC_HOSTAPD_GLOBAL_CONFIG_TABLE),
+               m_confVlanTbl(configDb, CFG_VLAN_TABLE_NAME),
+               m_confVlanMemTbl(configDb, CFG_VLAN_MEMBER_TABLE_NAME),
+               m_vlanTbl(stateDb, STATE_VLAN_TABLE_NAME),
+               m_vlanMemTbl(stateDb, STATE_VLAN_MEMBER_TABLE_NAME),
+               m_clearNotificationConsumer(configDb, "clearAuthSessions")
+{
+  Logger::linkToDbNative("pacmgr");
+  memset(&m_glbl_info, 0, sizeof(m_glbl_info));
+
+  SWSS_LOG_DEBUG("Installing PacMgr commands");
+  pac = this;
+}
+
+std::vector<Selectable*> PacMgr::getSelectables() 
+{
+    vector<Selectable *> selectables{ &m_confPacTbl, &m_confPacGblTbl, &m_confPacHostapdGblTbl, 
+                                      &m_vlanTbl, &m_vlanMemTbl, &m_clearNotificationConsumer};
+
+    selectables.push_back(&m_confVlanTbl);
+    selectables.push_back(&m_confVlanMemTbl);
+    selectables.push_back(&pacqueue);
+    return selectables;
+}
+
+bool PacMgr::processDbEvent(Selectable *tbl) {
+
+    //check the source table and accordingly invoke the appropriate handlers
+
+    if (tbl == ((Selectable *) & m_confPacTbl)) {
+        return processPacPortConfTblEvent(tbl);
+    }
+
+    if (tbl == ((Selectable *) & m_confPacGblTbl)) {
+        return processPacGlobalCfgTblEvent(tbl);
+    }
+
+    if (tbl == ((Selectable *) & m_vlanTbl)) {
+        return processVlanTblEvent(tbl);  
+    }
+
+    if (tbl == ((Selectable *) & m_vlanMemTbl)) {
+        return processVlanMemTblEvent(tbl);  
+    }
+
+    if (tbl == ((Selectable *) & m_confVlanTbl)) {
+        return processConfVlanTblEvent(tbl);  
+    }
+
+    if (tbl == ((Selectable *) & m_confVlanMemTbl)) {
+        return processConfVlanMemTblEvent(tbl);  
+    }
+
+    if (tbl == ((NotificationConsumer *) & m_clearNotificationConsumer)) {
+        return processPacAuthSessionsClearNotifyEvent((NotificationConsumer *)tbl);
+    }
+
+    if (tbl == ((Selectable *) & m_confPacHostapdGblTbl)) {
+        return processPacHostapdConfGlobalTblEvent(tbl);
+    }
+
+    if (tbl == ((Selectable *) & pacqueue)) {
+         return processPacMsgQueue(tbl);
+    }
+
+    return false;
+}
+
+bool PacMgr::processPacMsgQueue(Selectable *tbl)
+{
+  pacqueue.readQueue();
+  return true;
+}
+
+//Process the config db table events
+
+bool PacMgr::processPacPortConfTblEvent(Selectable *tbl) {
+
+    SWSS_LOG_ENTER();
+
+    std::deque<KeyOpFieldsValuesTuple> entries;
+    m_confPacTbl.pops(entries);
+
+    SWSS_LOG_DEBUG("Received %d entries on config event on PAC_PORT_CONFIG_TABLE table", (int) entries.size());
+
+    /* Nothing popped */
+    if (entries.empty())
+    {
+        return false;
+    }
+
+    // Check through all the data
+    for (auto entry : entries) {
+
+        std::string key = kfvKey(entry);
+        std::string op = kfvOp(entry);
+        bool task_result = false;
+        uint32 intIfNum;
+
+        SWSS_LOG_DEBUG("Received %s as key and %s as OP", key.c_str(), op.c_str());
+        if(key.find(INTFS_PREFIX) == string::npos)
+        {
+            SWSS_LOG_NOTICE("Invalid key format. No 'E' prefix: %s", key.c_str());
+            continue;
+        }
+
+        if(fpGetIntIfNumFromHostIfName(key.c_str(), &intIfNum) !=  SUCCESS)
+        {
+            SWSS_LOG_NOTICE("Unable to get the internal interface number for %s.", key.c_str());
+            continue;
+        }
+
+        if (op == SET_COMMAND)
+        {
+            task_result = doPacPortTableSetTask(entry, intIfNum);
+        }
+        else if (op == DEL_COMMAND)
+        {
+            task_result = doPacPortTableDeleteTask(entry, intIfNum);
+        }
+        if (!task_result)
+            return false;
+     }
+     return true;
+}
+
+bool PacMgr::doPacPortTableSetTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum)
+{
+    SWSS_LOG_ENTER();
+    const std::string & key = kfvKey(t);
+
+    // Update pacPortConfigCache cache with incoming table data
+    pacPortConfigCacheParams_t pacPortConfigCache;
+
+    pacPortConfigCache.port_control_mode = AUTHMGR_PORT_CONTROL_MODE_DEF;
+    pacPortConfigCache.host_control_mode = AUTHMGR_HOST_CONTROL_MODE_DEF;
+    pacPortConfigCache.reauth_enable = AUTHMGR_REAUTH_ENABLE_DEF;
+    pacPortConfigCache.reauth_period = AUTHMGR_REAUTH_PERIOD_DEF;
+    pacPortConfigCache.reauth_period_from_server = AUTHMGR_REAUTH_PERIOD_FROM_SERVER_DEF;
+    pacPortConfigCache.max_users_per_port = AUTHMGR_MAX_USERS_PER_PORT_DEF;
+    pacPortConfigCache.max_reauth_attempts = AUTHMGR_MAX_REAUTH_ATTEMPTS_DEF;
+    pacPortConfigCache.port_pae_role = AUTHMGR_PORT_PAE_ROLE_DEF;
+    pacPortConfigCache.priority_list[INDEX_0] =  AUTHMGR_METHOD_8021X;
+    pacPortConfigCache.priority_list[INDEX_1] =  AUTHMGR_METHOD_MAB;
+    pacPortConfigCache.method_list[INDEX_0] =  AUTHMGR_METHOD_8021X;
+    pacPortConfigCache.method_list[INDEX_1] =  AUTHMGR_METHOD_MAB;
+
+    for (auto item = kfvFieldsValues(t).begin(); item != kfvFieldsValues(t).end(); item++)
+    {
+        const std::string & field = fvField(*item);
+        const std::string & value = fvValue(*item);
+
+        if (field == "port_control_mode")
+        {
+            if (value == "auto")
+               pacPortConfigCache.port_control_mode =  AUTHMGR_PORT_AUTO;
+            else if (value == "force-authorized")
+               pacPortConfigCache.port_control_mode =  AUTHMGR_PORT_FORCE_AUTHORIZED;
+            else if (value == "force-unauthorized")
+               pacPortConfigCache.port_control_mode =  AUTHMGR_PORT_FORCE_UNAUTHORIZED;
+            else {
+               SWSS_LOG_WARN("Invalid port control mode received: %s", value.c_str());
+               continue;
+            }
+        }
+        if (field == "host_control_mode")
+        {
+            if (value == "single-host")
+                pacPortConfigCache.host_control_mode=  AUTHMGR_SINGLE_AUTH_MODE;
+            else if (value == "multi-host")
+                pacPortConfigCache.host_control_mode =  AUTHMGR_MULTI_HOST_MODE;
+            else if (value == "multi-auth")
+                pacPortConfigCache.host_control_mode =  AUTHMGR_MULTI_AUTH_MODE;
+            else {
+               SWSS_LOG_WARN("Invalid host control mode received: %s", value.c_str());
+               continue;
+            }
+        }
+        if (field == "reauth_enable")
+        {
+            if(value == "true")
+               pacPortConfigCache.reauth_enable =  TRUE;
+            else if(value == "false")
+               pacPortConfigCache.reauth_enable =  FALSE;
+            else {
+               SWSS_LOG_WARN("Invalid value received for reauth enable: %s", value.c_str());
+               continue;
+            }
+        }
+
+        try
+        {
+            if (field == "reauth_period")
+            {
+               pacPortConfigCache.reauth_period = stoi(value);
+            }
+            if (field == "reauth_period_from_server")
+            {
+                if(value == "true")
+                   pacPortConfigCache.reauth_period_from_server =  TRUE;
+                else if(value == "false")
+                   pacPortConfigCache.reauth_period_from_server =  FALSE;
+                else {
+                   SWSS_LOG_WARN("Invalid option received for reauth period from server: %s", value.c_str());
+                   continue;
+                }
+            }
+
+            if (field == "max_users_per_port")
+            {
+                pacPortConfigCache.max_users_per_port = stoi(value);
+            }
+        }
+        catch (...)
+        {
+            SWSS_LOG_WARN("Invalid value:%s received for %s from server", value.c_str(), field.c_str());
+            continue;
+        }
+        if (field == "port_pae_role")
+        {
+            if(value == "authenticator")
+               pacPortConfigCache.port_pae_role =  DOT1X_PAE_PORT_AUTH_CAPABLE;
+            else if(value == "none")
+               pacPortConfigCache.port_pae_role =  DOT1X_PAE_PORT_NONE_CAPABLE;
+            else {
+               SWSS_LOG_WARN("Invalid option received for port pae role: %s", value.c_str());
+               continue;
+            }
+        }
+        if (field == "priority_list")
+        {
+            string priority_str;
+            uint32 k = 0;
+            std::istringstream iss(value);
+            while (getline(iss, priority_str, ','))
+            {
+               if (priority_str == "dot1x")
+               {
+                  pacPortConfigCache.priority_list[k] =  AUTHMGR_METHOD_8021X;
+                  k++;
+               }
+               else if (priority_str == "mab")
+               {
+                  pacPortConfigCache.priority_list[k] =  AUTHMGR_METHOD_MAB;
+                  k++;
+               }
+               else
+               {
+                  SWSS_LOG_WARN("Invalid option received for priority list: %s", value.c_str());
+                  continue;
+               }
+            }
+            if (k == 1)
+               pacPortConfigCache.priority_list[k] =  AUTHMGR_METHOD_NONE; 
+        }
+        if (field == "method_list")
+        {
+            string method_str;
+            uint32 k = 0;
+            std::istringstream iss(value);
+            while (getline(iss, method_str, ','))
+            {
+               if (method_str == "dot1x")
+               {
+                  pacPortConfigCache.method_list[k] =  AUTHMGR_METHOD_8021X;
+                  k++;
+               }
+               else if (method_str == "mab")
+               {
+                  pacPortConfigCache.method_list[k] =  AUTHMGR_METHOD_MAB;
+                  k++;
+               }
+               else
+               {
+                  SWSS_LOG_WARN("Invalid option received for method list: %s", value.c_str());
+                  continue;
+               }
+            }
+            if (k == 1)
+               pacPortConfigCache.method_list[k] =  AUTHMGR_METHOD_NONE; 
+        }
+    }
+
+    pacPortConfigTableMap::iterator iter = m_pacPortConfigMap.find(key);
+
+    if(iter == m_pacPortConfigMap.end())
+    {
+        m_pacPortConfigMap.insert(pair<std::string, pacPortConfigCacheParams_t>(key, pacPortConfigCache));
+        pacPortConfigTableMap::iterator iter = m_pacPortConfigMap.find(key);
+
+        if(pacPortConfigCache.port_control_mode != AUTHMGR_PORT_CONTROL_MODE_DEF)
+        {
+            if ( SUCCESS != authmgrPortControlModeSet(intIfNum, pacPortConfigCache.port_control_mode))
+            {
+              iter->second.port_control_mode = AUTHMGR_PORT_CONTROL_MODE_DEF;
+            }
+        }
+        if(pacPortConfigCache.host_control_mode != AUTHMGR_HOST_CONTROL_MODE_DEF)
+        {
+            if ( SUCCESS != authmgrHostControlModeSet(intIfNum, pacPortConfigCache.host_control_mode))
+            {
+              iter->second.host_control_mode = AUTHMGR_HOST_CONTROL_MODE_DEF;
+            }
+        }
+        if(pacPortConfigCache.reauth_enable != AUTHMGR_REAUTH_ENABLE_DEF)
+        {
+            if ( SUCCESS != authmgrPortReAuthEnabledSet(intIfNum, ( BOOL)pacPortConfigCache.reauth_enable))
+            {
+              iter->second.reauth_enable = AUTHMGR_REAUTH_ENABLE_DEF;
+            }
+        }
+
+        if(pacPortConfigCache.reauth_period_from_server != AUTHMGR_REAUTH_PERIOD_FROM_SERVER_DEF)
+        {
+            if ( SUCCESS != authmgrPortReAuthPeriodSet(intIfNum, pacPortConfigCache.reauth_period, ( BOOL)pacPortConfigCache.reauth_period_from_server))
+            {
+              iter->second.reauth_period_from_server = AUTHMGR_REAUTH_PERIOD_FROM_SERVER_DEF;
+              iter->second.reauth_period = AUTHMGR_PORT_REAUTH_PERIOD_DEF;
+            }
+        }
+
+        if(pacPortConfigCache.reauth_period_from_server == AUTHMGR_REAUTH_PERIOD_FROM_SERVER_DEF)
+        {
+            if ( SUCCESS != authmgrPortReAuthPeriodSet(intIfNum, AUTHMGR_PORT_REAUTH_PERIOD_DEF, ( BOOL)pacPortConfigCache.reauth_period_from_server))
+            {
+              iter->second.reauth_period_from_server = AUTHMGR_REAUTH_PERIOD_FROM_SERVER_DEF;
+            }
+        }
+        if(pacPortConfigCache.max_users_per_port != AUTHMGR_MAX_USERS_PER_PORT_DEF)
+        {
+            if ( SUCCESS != authmgrPortMaxUsersSet(intIfNum, pacPortConfigCache.max_users_per_port))
+            {
+              iter->second.max_users_per_port = AUTHMGR_MAX_USERS_PER_PORT_DEF;
+            }
+        }
+        if(pacPortConfigCache.max_reauth_attempts != AUTHMGR_MAX_REAUTH_ATTEMPTS_DEF)
+        {
+            if ( SUCCESS != authmgrPortMaxAuthAttemptsSet(intIfNum, pacPortConfigCache.max_reauth_attempts))
+            {
+              iter->second.max_reauth_attempts = AUTHMGR_MAX_REAUTH_ATTEMPTS_DEF;
+            }
+        }
+        if(pacPortConfigCache.port_pae_role != AUTHMGR_PORT_PAE_ROLE_DEF)
+        {
+            if ( SUCCESS != authmgrDot1xCapabilitiesUpdate(intIfNum, pacPortConfigCache.port_pae_role))
+            {
+              iter->second.port_pae_role = AUTHMGR_PORT_PAE_ROLE_DEF;
+            }
+        }
+        if(pacPortConfigCache.priority_list[INDEX_0] != AUTHMGR_PRIORITY_LIST_0_DEF)
+        {
+               if ( SUCCESS != authmgrPortAuthMethodSet( AUTHMGR_TYPE_PRIORITY, intIfNum,  AUTHMGR_METHOD_START, pacPortConfigCache.priority_list[INDEX_0]))
+               {
+                  iter->second.priority_list[INDEX_0] = AUTHMGR_PRIORITY_LIST_0_DEF;
+               }
+        }
+        if(pacPortConfigCache.priority_list[INDEX_1] != AUTHMGR_PRIORITY_LIST_1_DEF)
+        {
+               if ( SUCCESS != authmgrPortAuthMethodSet( AUTHMGR_TYPE_PRIORITY, intIfNum,  AUTHMGR_METHOD_START+1, pacPortConfigCache.priority_list[INDEX_1]))
+               {
+                  iter->second.priority_list[INDEX_1] = AUTHMGR_PRIORITY_LIST_1_DEF;
+               }
+        }
+        if(pacPortConfigCache.method_list[INDEX_0] != AUTHMGR_METHOD_LIST_0_DEF)
+        {
+               if ( SUCCESS != authmgrPortAuthMethodSet( AUTHMGR_TYPE_ORDER, intIfNum,  AUTHMGR_METHOD_START, pacPortConfigCache.method_list[INDEX_0]))
+               {
+                  iter->second.method_list[INDEX_0] = AUTHMGR_METHOD_LIST_0_DEF;
+               }
+        }
+        if(pacPortConfigCache.method_list[INDEX_1] != AUTHMGR_METHOD_LIST_1_DEF)
+        {
+               if ( SUCCESS != authmgrPortAuthMethodSet( AUTHMGR_TYPE_ORDER, intIfNum,  AUTHMGR_METHOD_START+1, pacPortConfigCache.method_list[INDEX_1]))
+               {
+                  iter->second.method_list[INDEX_1] = AUTHMGR_METHOD_LIST_1_DEF;
+               }
+        }
+    }
+    else //Interface entry already exists in local cache, check for any parameter change for Add/Update/Delete
+    {
+        // port_control_mode
+        if (((iter->second.port_control_mode == AUTHMGR_PORT_CONTROL_MODE_DEF) &&
+            (pacPortConfigCache.port_control_mode != AUTHMGR_PORT_CONTROL_MODE_DEF)) ||
+            ((iter->second.port_control_mode != AUTHMGR_PORT_CONTROL_MODE_DEF) &&
+            (pacPortConfigCache.port_control_mode != iter->second.port_control_mode)))
+        {
+            if ( SUCCESS == authmgrPortControlModeSet(intIfNum, pacPortConfigCache.port_control_mode))
+            {
+              iter->second.port_control_mode = pacPortConfigCache.port_control_mode;
+            }
+            else
+	    {
+              SWSS_LOG_ERROR("Unable to set the authentication port control mode.\n");
+              return false;
+            }
+        }
+        // host control mode
+        if (((iter->second.host_control_mode == AUTHMGR_HOST_CONTROL_MODE_DEF) &&
+            (pacPortConfigCache.host_control_mode != AUTHMGR_HOST_CONTROL_MODE_DEF)) ||
+            ((iter->second.host_control_mode != AUTHMGR_HOST_CONTROL_MODE_DEF) &&
+            (pacPortConfigCache.host_control_mode != iter->second.host_control_mode)))
+        {
+            if ( SUCCESS == authmgrHostControlModeSet(intIfNum, pacPortConfigCache.host_control_mode))
+            {
+              iter->second.host_control_mode = pacPortConfigCache.host_control_mode;
+            }
+            else
+	    {
+              SWSS_LOG_ERROR("Unable to set the authentication host control mode.\n");
+              return false;
+            }
+        }
+        // reauth_enable
+        if (((iter->second.reauth_enable == AUTHMGR_REAUTH_ENABLE_DEF) &&
+            (pacPortConfigCache.reauth_enable != AUTHMGR_REAUTH_ENABLE_DEF)) ||
+            ((iter->second.reauth_enable != AUTHMGR_REAUTH_ENABLE_DEF) &&
+            (pacPortConfigCache.reauth_enable != iter->second.reauth_enable)))
+        {
+            if ( SUCCESS == authmgrPortReAuthEnabledSet(intIfNum, ( BOOL)pacPortConfigCache.reauth_enable))
+            {
+              iter->second.reauth_enable = pacPortConfigCache.reauth_enable;
+            }
+            else
+	    {
+              SWSS_LOG_ERROR("Unable to set the authentication reauth enable.\n");
+              return false;
+            }
+        }
+        
+        // reauth_period_from_server
+        if (((iter->second.reauth_period_from_server == AUTHMGR_REAUTH_PERIOD_FROM_SERVER_DEF) &&
+            (pacPortConfigCache.reauth_period_from_server != AUTHMGR_REAUTH_PERIOD_FROM_SERVER_DEF)) ||
+            ((iter->second.reauth_period_from_server != AUTHMGR_REAUTH_PERIOD_FROM_SERVER_DEF) &&
+            ((pacPortConfigCache.reauth_period_from_server != iter->second.reauth_period_from_server) ||
+             (pacPortConfigCache.reauth_period != iter->second.reauth_period))))
+        {
+            uint32 val = AUTHMGR_REAUTH_PERIOD_DEF;
+            if (AUTHMGR_REAUTH_PERIOD_DEF != pacPortConfigCache.reauth_period)
+            {
+               val = pacPortConfigCache.reauth_period;
+            }
+            if ( SUCCESS == authmgrPortReAuthPeriodSet(intIfNum, val, ( BOOL)pacPortConfigCache.reauth_period_from_server))
+            {
+              iter->second.reauth_period_from_server = pacPortConfigCache.reauth_period_from_server;
+              iter->second.reauth_period = val;
+            }
+            else
+	    {
+              SWSS_LOG_ERROR("Unable to set the reauth period from server.\n");
+              return false;
+            }
+        }
+        // max_users_per_port
+        if (((iter->second.max_users_per_port == AUTHMGR_MAX_USERS_PER_PORT_DEF) &&
+            (pacPortConfigCache.max_users_per_port != AUTHMGR_MAX_USERS_PER_PORT_DEF)) ||
+            ((iter->second.max_users_per_port != AUTHMGR_MAX_USERS_PER_PORT_DEF) &&
+            (pacPortConfigCache.max_users_per_port != iter->second.max_users_per_port)))
+        {
+            if ( SUCCESS == authmgrPortMaxUsersSet(intIfNum, pacPortConfigCache.max_users_per_port))
+            {
+              iter->second.max_users_per_port = pacPortConfigCache.max_users_per_port;
+            }
+            else
+	    {
+              SWSS_LOG_ERROR("Unable to set max users per port.\n");
+              return false;
+            }
+        }
+        // max_reauth_attempts
+        if (((iter->second.max_reauth_attempts == AUTHMGR_MAX_REAUTH_ATTEMPTS_DEF) &&
+            (pacPortConfigCache.max_reauth_attempts != AUTHMGR_MAX_REAUTH_ATTEMPTS_DEF)) ||
+            ((iter->second.max_reauth_attempts != AUTHMGR_MAX_REAUTH_ATTEMPTS_DEF) &&
+            (pacPortConfigCache.max_reauth_attempts != iter->second.max_reauth_attempts)))
+        {
+            if ( SUCCESS == authmgrPortMaxAuthAttemptsSet(intIfNum, pacPortConfigCache.max_reauth_attempts))
+            {
+              iter->second.max_reauth_attempts = pacPortConfigCache.max_reauth_attempts;
+            }
+            else
+	    {
+              SWSS_LOG_ERROR("Unable to set authentication retry max attempts..");
+              return false;
+            }
+        }
+        // port_pae_role
+        if (((iter->second.port_pae_role == AUTHMGR_PORT_PAE_ROLE_DEF) &&
+            (pacPortConfigCache.port_pae_role != AUTHMGR_PORT_PAE_ROLE_DEF)) ||
+            ((iter->second.port_pae_role != AUTHMGR_PORT_PAE_ROLE_DEF) &&
+            (pacPortConfigCache.port_pae_role != iter->second.port_pae_role)))
+        {
+            if ( SUCCESS == authmgrDot1xCapabilitiesUpdate(intIfNum, pacPortConfigCache.port_pae_role))
+            {
+              iter->second.port_pae_role = pacPortConfigCache.port_pae_role;
+            }
+            else
+	    {
+              SWSS_LOG_ERROR("Unable to set the PAE mode on the specified port.");
+              return false;
+            }
+        }
+ 
+        // priority_list
+        if (((iter->second.priority_list[INDEX_0] == AUTHMGR_PRIORITY_LIST_0_DEF ) &&
+            (pacPortConfigCache.priority_list[INDEX_0] != AUTHMGR_PRIORITY_LIST_0_DEF)) ||
+            ((iter->second.priority_list[INDEX_0] != AUTHMGR_PRIORITY_LIST_0_DEF) &&
+            (pacPortConfigCache.priority_list[INDEX_0] != iter->second.priority_list[INDEX_0])))
+        {
+            if ( SUCCESS == authmgrPortAuthMethodSet( AUTHMGR_TYPE_PRIORITY, intIfNum,  AUTHMGR_METHOD_START, pacPortConfigCache.priority_list[INDEX_0]))
+            { 
+               iter->second.priority_list[INDEX_0] = pacPortConfigCache.priority_list[INDEX_0];
+            }
+        }
+        if (((iter->second.priority_list[INDEX_1] == AUTHMGR_PRIORITY_LIST_1_DEF ) &&
+            (pacPortConfigCache.priority_list[INDEX_1] != AUTHMGR_PRIORITY_LIST_1_DEF)) ||
+            ((iter->second.priority_list[INDEX_1] != AUTHMGR_PRIORITY_LIST_1_DEF) &&
+            (pacPortConfigCache.priority_list[INDEX_1] != iter->second.priority_list[INDEX_1])))
+        {
+            if ( SUCCESS == authmgrPortAuthMethodSet( AUTHMGR_TYPE_PRIORITY, intIfNum,  AUTHMGR_METHOD_START+1, pacPortConfigCache.priority_list[INDEX_1]))
+            {
+               iter->second.priority_list[INDEX_1] = pacPortConfigCache.priority_list[INDEX_1];
+            }
+        }
+
+        // method_list
+        if (((iter->second.method_list[INDEX_0] == AUTHMGR_METHOD_LIST_0_DEF ) &&
+            (pacPortConfigCache.method_list[INDEX_0] != AUTHMGR_METHOD_LIST_0_DEF)) ||
+            ((iter->second.method_list[INDEX_0] != AUTHMGR_METHOD_LIST_0_DEF) &&
+            (pacPortConfigCache.method_list[INDEX_0] != iter->second.method_list[INDEX_0])))
+        {
+            if ( SUCCESS == authmgrPortAuthMethodSet( AUTHMGR_TYPE_ORDER, intIfNum,  AUTHMGR_METHOD_START, pacPortConfigCache.method_list[INDEX_0]))
+            { 
+               iter->second.method_list[INDEX_0] = pacPortConfigCache.method_list[INDEX_0];
+            }
+        }
+        if (((iter->second.method_list[INDEX_1] == AUTHMGR_METHOD_LIST_1_DEF ) &&
+            (pacPortConfigCache.method_list[INDEX_1] != AUTHMGR_METHOD_LIST_1_DEF)) ||
+            ((iter->second.method_list[INDEX_1] != AUTHMGR_METHOD_LIST_1_DEF) &&
+            (pacPortConfigCache.method_list[INDEX_1] != iter->second.method_list[INDEX_1])))
+        {
+            if ( SUCCESS == authmgrPortAuthMethodSet( AUTHMGR_TYPE_ORDER, intIfNum,  AUTHMGR_METHOD_START+1, pacPortConfigCache.method_list[INDEX_1]))
+            { 
+               iter->second.method_list[INDEX_1] = pacPortConfigCache.method_list[INDEX_1];
+            }
+        }
+     }
+     return true;
+}
+
+bool PacMgr::doPacPortTableDeleteTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum)
+{
+    SWSS_LOG_ENTER();
+    const std::string & key = kfvKey(t);
+    pacPortConfigTableMap::iterator iter = m_pacPortConfigMap.find(key);
+    if(iter != m_pacPortConfigMap.end())
+    {
+      if ( SUCCESS == authmgrPortInfoReset(intIfNum,  TRUE))
+      {
+        iter->second.port_control_mode = AUTHMGR_PORT_CONTROL_MODE_DEF;
+        iter->second.host_control_mode = AUTHMGR_HOST_CONTROL_MODE_DEF;
+        iter->second.reauth_enable = AUTHMGR_REAUTH_ENABLE_DEF;
+        iter->second.reauth_period = AUTHMGR_REAUTH_PERIOD_DEF;
+        iter->second.reauth_period_from_server = AUTHMGR_REAUTH_PERIOD_FROM_SERVER_DEF;
+        iter->second.max_users_per_port = AUTHMGR_MAX_USERS_PER_PORT_DEF;
+        iter->second.max_reauth_attempts = AUTHMGR_MAX_REAUTH_ATTEMPTS_DEF;
+        iter->second.port_pae_role = AUTHMGR_PORT_PAE_ROLE_DEF;
+        iter->second.priority_list[INDEX_0] =  AUTHMGR_METHOD_8021X;
+        iter->second.priority_list[INDEX_1] =  AUTHMGR_METHOD_MAB;
+        iter->second.method_list[INDEX_0] =  AUTHMGR_METHOD_8021X;
+        iter->second.method_list[INDEX_1] =  AUTHMGR_METHOD_MAB;
+      }
+    }
+    return true;
+}
+
+bool PacMgr::processPacGlobalCfgTblEvent(Selectable *tbl) {
+
+    std::deque<KeyOpFieldsValuesTuple> entries;
+    m_confPacGblTbl.pops(entries);
+    bool task_result = false;
+
+    SWSS_LOG_DEBUG("Received %d entries on config event on PAC_GLOBAL_CONFIG_TABLE table.", (int) entries.size());
+
+    // Check through all the data
+    for (auto entry : entries) {
+
+        std::string key = kfvKey(entry);
+        std::string op = kfvOp(entry);
+
+        SWSS_LOG_DEBUG("Received %s as key and %s as OP", key.c_str(), op.c_str());
+
+        if (op == SET_COMMAND)
+        {
+            task_result = doPacGlobalTableSetTask(entry);
+        }
+        else if (op == DEL_COMMAND)
+        {
+            task_result = doPacGlobalTableDeleteTask();
+        }
+        if (!task_result)
+            return false;
+    }
+    return true;
+}
+
+bool PacMgr::doPacGlobalTableSetTask(const KeyOpFieldsValuesTuple & t)
+{
+    SWSS_LOG_ENTER();
+
+    return true;
+}
+
+bool PacMgr::doPacGlobalTableDeleteTask()
+{
+    SWSS_LOG_ENTER();
+
+    return true;
+}
+
+bool PacMgr::processVlanTblEvent(Selectable *tbl) 
+{
+    std::deque<KeyOpFieldsValuesTuple> entries;
+    m_vlanTbl.pops(entries);
+
+    SWSS_LOG_DEBUG("Received %d entries on event on STATE_VLAN_TABLE.", (int) entries.size());
+
+    /* Nothing popped */
+    if (entries.empty())
+    {
+        return false;
+    }
+
+    // Check through all the data
+    for (auto entry : entries) {
+
+        std::string key = kfvKey(entry);
+        std::string op = kfvOp(entry);
+
+        SWSS_LOG_DEBUG("Received %s as key and %s as OP", key.c_str(), op.c_str());
+
+        if (strncmp(key.c_str(), VLAN_PREFIX, 4))
+        {
+            SWSS_LOG_DEBUG("Invalid key format. No 'Vlan' prefix: %s", key.c_str());
+            continue;
+        }
+      
+        // Remove VLAN prefix
+        int vlan; 
+        try
+        {
+            vlan = stoi(key.substr(4));
+        }
+        catch (...)
+        {
+            SWSS_LOG_WARN("Invalid key format. Not a number after 'Vlan' prefix: %s", key.c_str());
+            continue;
+        }
+ 
+        dot1qNotifyData_t vlanData;
+        memset(&vlanData, 0, sizeof(vlanData));
+        vlanData.data.vlanId = vlan;
+
+        if (op == SET_COMMAND)
+        {
+            // Inform authmgr about creation of VLAN.  
+            if ( SUCCESS != authmgrVlanChangeCallback(&vlanData, 0, VLAN_ADD_NOTIFY))
+            {
+                SWSS_LOG_WARN("Unable to notify authmgr of event VLAN_ADD_NOTIFY."); 
+                continue;
+            }
+        }
+        else if (op == DEL_COMMAND)
+        {
+            // Inform authmgr about deletion of VLAN.  
+            if ( SUCCESS != authmgrVlanChangeCallback(&vlanData, 0, VLAN_DELETE_PENDING_NOTIFY))
+            {
+                SWSS_LOG_WARN("Unable to notify authmgr of event VLAN_DELETE_PENDING_NOTIFY."); 
+                continue;
+            }
+        }
+        else
+        {
+            SWSS_LOG_DEBUG("Invalid operation received on STATE_VLAN_TABLE."); 
+        }
+    }
+ 
+    return true;
+}
+
+bool PacMgr::processVlanMemTblEvent(Selectable *tbl)
+{
+    std::deque<KeyOpFieldsValuesTuple> entries;
+    m_vlanMemTbl.pops(entries);
+
+    SWSS_LOG_DEBUG("Received %d entries on event on STATE_VLAN_MEMBER_TABLE.", (int) entries.size());
+
+    /* Nothing popped */
+    if (entries.empty())
+    {
+        return false;
+    }
+
+    // Check through all the data
+    for (auto entry : entries) {
+
+        std::string key = kfvKey(entry);
+        std::string op = kfvOp(entry);
+
+        SWSS_LOG_DEBUG("Received %s as key and %s as OP", key.c_str(), op.c_str());
+
+        if (strncmp(key.c_str(), VLAN_PREFIX, 4))
+        {
+            SWSS_LOG_DEBUG("Invalid key format. No 'Vlan' prefix: %s", key.c_str());
+            continue;
+        }
+
+        int vlan; 
+        string port;
+        dot1qNotifyData_t vlanData;
+        uint32 intIfNum;
+
+        try
+        {
+            key = key.substr(4);
+            size_t found = key.find(STATEDB_KEY_SEPARATOR);
+            // Remove VLAN prefix
+    
+            if (found != string::npos)
+            {
+                // Parse VLAN and port
+                vlan = stoi(key.substr(0, found));
+                port = key.substr(found+1);
+            }
+            else
+            {
+                SWSS_LOG_WARN("Invalid key format %s for STATE_VLAN_MEMBER_TABLE.", kfvKey(entry).c_str());
+                continue;
+            }
+            if(port.find(INTFS_PREFIX) == string::npos)
+            {
+                continue;
+            }
+
+            memset(&vlanData, 0, sizeof(vlanData));
+            vlanData.data.vlanId = vlan;
+        }
+        catch (...)
+        {
+            SWSS_LOG_WARN("Invalid key format %s for STATE_VLAN_MEMBER_TABLE.", kfvKey(entry).c_str());
+            continue;
+        }
+
+        if(fpGetIntIfNumFromHostIfName(port.c_str(), &intIfNum) !=  SUCCESS)
+        {
+            SWSS_LOG_NOTICE("Unable to get the internal interface number for %s.", port.c_str());
+            continue;
+        }
+        for (auto i : kfvFieldsValues(entry)) 
+        {
+            string field = fvField(i);
+            string value = fvValue(i);
+  
+            if (field == "tagging_mode")
+            {
+                if (value == "tagged")
+                {
+                    vlanData.tagged =  TRUE;
+                } 
+            }
+        }
+
+        if (op == SET_COMMAND)
+        {
+            // Inform authmgr about addition of port to VLAN.  
+            if ( SUCCESS != authmgrVlanChangeCallback(&vlanData, intIfNum, VLAN_ADD_PORT_NOTIFY))
+            {
+                SWSS_LOG_WARN("Unable to notify authmgr of event VLAN_ADD_NOTIFY."); 
+                continue;
+            }
+        }
+        else if (op == DEL_COMMAND)
+        {
+            // Inform authmgr about deletion of port from VLAN.  
+            if ( SUCCESS != authmgrVlanChangeCallback(&vlanData, intIfNum, VLAN_DELETE_PORT_NOTIFY))
+            {
+                SWSS_LOG_WARN("Unable to notify authmgr of event VLAN_ADD_NOTIFY."); 
+                continue;
+            }
+        }
+        else
+        {
+            SWSS_LOG_WARN("Invalid operation received on STATE_VLAN_TABLE."); 
+        }
+    }
+ 
+    return true;
+}
+
+bool PacMgr::processConfVlanTblEvent(Selectable *tbl) 
+{
+    std::deque<KeyOpFieldsValuesTuple> entries;
+    m_confVlanTbl.pops(entries);
+
+    SWSS_LOG_DEBUG("Received %d entries on event on CONF_VLAN_TABLE.", (int) entries.size());
+
+    /* Nothing popped */
+    if (entries.empty())
+    {
+        return false;
+    }
+
+    // Check through all the data
+    for (auto entry : entries) {
+
+        std::string key = kfvKey(entry);
+        std::string op = kfvOp(entry);
+
+        SWSS_LOG_DEBUG("Received %s as key and %s as OP", key.c_str(), op.c_str());
+
+        if (strncmp(key.c_str(), VLAN_PREFIX, 4))
+        {
+            SWSS_LOG_WARN("Invalid key format. No 'Vlan' prefix: %s", key.c_str());
+            continue;
+        }
+      
+        // Remove VLAN prefix
+        int vlan; 
+        try
+        {
+            vlan = stoi(key.substr(4));
+        }
+        catch (...)
+        {
+            SWSS_LOG_WARN("Invalid key format. Not a number after 'Vlan' prefix: %s", key.c_str());
+            continue;
+        }
+ 
+        dot1qNotifyData_t vlanData;
+        memset(&vlanData, 0, sizeof(vlanData));
+        vlanData.data.vlanId = vlan;
+
+
+        if (op == SET_COMMAND)
+        {
+            // Inform authmgr about creation of VLAN.  
+            if ( SUCCESS != authmgrVlanConfChangeCallback(&vlanData, 0, VLAN_ADD_NOTIFY))
+            {
+                SWSS_LOG_WARN("Unable to notify authmgr of event VLAN_ADD_NOTIFY."); 
+                continue;
+            }
+        }
+        else if (op == DEL_COMMAND)
+        {
+            // Inform authmgr about deletion of VLAN.  
+            if ( SUCCESS != authmgrVlanConfChangeCallback(&vlanData, 0, VLAN_DELETE_PENDING_NOTIFY))
+            {
+                SWSS_LOG_WARN("Unable to notify authmgr of event VLAN_DELETE_PENDING_NOTIFY."); 
+                continue;
+            }
+        }
+        else
+        {
+            SWSS_LOG_WARN("Invalid operation received on STATE_VLAN_TABLE."); 
+        }
+    }
+ 
+    return true;
+}
+
+bool PacMgr::processConfVlanMemTblEvent(Selectable *tbl)
+{
+    std::deque<KeyOpFieldsValuesTuple> entries;
+    m_confVlanMemTbl.pops(entries);
+
+    SWSS_LOG_DEBUG("Received %d entries on event on CONF_VLAN_MEMBER_TABLE.", (int) entries.size());
+
+    /* Nothing popped */
+    if (entries.empty())
+    {
+        return false;
+    }
+
+    // Check through all the data
+    for (auto entry : entries) {
+
+        std::string key = kfvKey(entry);
+        std::string op = kfvOp(entry);
+
+        SWSS_LOG_DEBUG("Received %s as key and %s as OP", key.c_str(), op.c_str());
+
+        if (strncmp(key.c_str(), VLAN_PREFIX, 4))
+        {
+            SWSS_LOG_WARN("Invalid key format. No 'Vlan' prefix: %s", key.c_str());
+            continue;
+        }
+      
+        dot1qNotifyData_t vlanData;
+        uint32 intIfNum;
+        int vlan; 
+        string port;
+
+        try
+        {
+            key = key.substr(4);
+            size_t found = key.find(STATEDB_KEY_SEPARATOR);
+            // Remove VLAN prefix
+    
+            if (found != string::npos)
+            {
+                // Parse VLAN and port
+                vlan = stoi(key.substr(0, found));
+                port = key.substr(found+1);
+            }
+            else
+            {
+                SWSS_LOG_WARN("Invalid key format %s for STATE_VLAN_MEMBER_TABLE.", kfvKey(entry).c_str());
+                continue;
+            }
+   
+            if(port.find(INTFS_PREFIX) == string::npos)
+            {
+                continue;
+            }
+    
+            memset(&vlanData, 0, sizeof(vlanData));
+            vlanData.data.vlanId = vlan;
+        }
+        catch (...)
+        {
+            SWSS_LOG_WARN("Invalid key format %s for STATE_VLAN_MEMBER_TABLE.", kfvKey(entry).c_str());
+            continue;
+        }
+
+        if(fpGetIntIfNumFromHostIfName(port.c_str(), &intIfNum) !=  SUCCESS)
+        {
+            SWSS_LOG_NOTICE("Unable to get the internal interface number for %s.", port.c_str());
+            continue;
+        }
+
+        for (auto i : kfvFieldsValues(entry)) 
+        {
+            string field = fvField(i);
+            string value = fvValue(i);
+  
+            if (field == "tagging_mode")
+            {
+                if (value == "tagged")
+                {
+                    vlanData.tagged =  TRUE;
+                } 
+            }
+        }
+
+        if (op == SET_COMMAND)
+        {
+            // Inform authmgr about addition of port to VLAN.  
+            if ( SUCCESS != authmgrVlanConfChangeCallback(&vlanData, intIfNum, VLAN_ADD_PORT_NOTIFY))
+            {
+                SWSS_LOG_WARN("Unable to notify authmgr of event VLAN_ADD_NOTIFY."); 
+                continue;
+            }
+        }
+        else if (op == DEL_COMMAND)
+        {
+            // Inform authmgr about deletion of port from VLAN.  
+            if ( SUCCESS != authmgrVlanConfChangeCallback(&vlanData, intIfNum, VLAN_DELETE_PORT_NOTIFY))
+            {
+                SWSS_LOG_WARN("Unable to notify authmgr of event VLAN_ADD_NOTIFY."); 
+                continue;
+            }
+        }
+        else
+        {
+            SWSS_LOG_WARN("Invalid operation received on STATE_VLAN_TABLE."); 
+        }
+    }
+ 
+    return true;
+}
+
+bool PacMgr::processPacAuthSessionsClearNotifyEvent(NotificationConsumer *tbl) {
+
+  SWSS_LOG_DEBUG("Received PAC authentication sessions clear notification");
+  std::string op, data;
+  std::vector<swss::FieldValueTuple> values;
+  uint32 iface =  ALL_INTERFACES, nextIface =  ALL_INTERFACES;
+
+  SWSS_LOG_ENTER();
+
+  m_clearNotificationConsumer.pop(op, data, values);
+  SWSS_LOG_DEBUG("Clear Auth session for %s: data: %s", op.c_str(), data.c_str());
+
+  if (0 == strcmp(data.c_str(), "all"))  /* clear all authentication sessions */
+  {
+        iface =  ALL_INTERFACES;
+        if ( SUCCESS != authmgrFirstValidIntfNumber(&iface))
+        {
+	  SWSS_LOG_ERROR("Switch doesn't contain valid interfaces.");
+          return false;
+        }
+
+        do
+        {
+          if ( SUCCESS != authmgrPortInitializeSet(iface,  TRUE))
+          {
+            SWSS_LOG_ERROR("Unable to clear/initialize authentication sessions for Interface : %d.", iface);
+            return false;
+          }
+          if( SUCCESS != authmgrNextValidIntf(iface, &nextIface))
+          {
+            break;
+          }
+          iface = nextIface;
+        }while(1);
+  }
+  else if(data.find(INTFS_PREFIX) != string::npos)
+  {
+        uint32 intIfNum;
+
+        if(fpGetIntIfNumFromHostIfName(data.c_str(), &intIfNum) !=  SUCCESS)
+        {
+            SWSS_LOG_NOTICE("Unable to get the internal interface number for %s.", data.c_str());
+            return false;
+        }
+
+        if ( SUCCESS != authmgrPortInitializeSet(intIfNum,  TRUE))
+        {
+	  SWSS_LOG_ERROR("Unable to clear authentication session of Interface : %s", data.c_str());
+	  return false;
+        }
+  }
+  else if ( NULLPTR != data.c_str())
+  {
+         enetMacAddr_t clientMacAddr;
+        uint32 mac_addr[6];
+        memset(&clientMacAddr.addr,0, ENET_MAC_ADDR_LEN);
+        sscanf(data.c_str(), "%02x:%02x:%02x:%02x:%02x:%02x",
+               &mac_addr[0], &mac_addr[1],
+               &mac_addr[2], &mac_addr[3],
+               &mac_addr[4], &mac_addr[5]);
+
+        for (int i = 0; i < 6; i++)
+        {
+          clientMacAddr.addr[i] = ( uchar8)mac_addr[i];
+        }
+        if(authmgrClientDelete(clientMacAddr) !=  SUCCESS)
+        {
+            SWSS_LOG_WARN("Failed to Clear authentication session for %s", data.c_str());
+            return false;
+        }
+  }
+
+  return true;
+}
+
+bool PacMgr::processPacHostapdConfGlobalTblEvent(Selectable *tbl) 
+{
+  authmgrAuthRespParams_t callbackParams;
+
+  deque<KeyOpFieldsValuesTuple> entries;
+  m_confPacHostapdGblTbl.pops(entries);
+
+  SWSS_LOG_DEBUG("Received %d entries on config event on HOSTAPD_GLOBAL_CONFIG_TABLE table", (int) entries.size());
+
+  /* Nothing popped */
+  if (entries.empty()) 
+  {
+    return false;
+  }
+
+  // Check through all the data
+  for (auto entry : entries) 
+  {
+    string key = kfvKey(entry);
+    string val = kfvOp(entry);
+
+    SWSS_LOG_DEBUG("Received %s as key and %s as OP", key.c_str(), val.c_str());
+
+    if (val == SET_COMMAND) 
+    {
+      // Look at the data that is sent for this key
+      for (auto i : kfvFieldsValues(entry)) 
+      {
+        string a = fvField(i);
+        string b = fvValue(i);
+
+        SWSS_LOG_DEBUG("Received %s as field and %s as value", a.c_str(), b.c_str());
+
+        vector<string> interfaces;
+
+        if (a == "dot1x_system_auth_control" )
+        {
+          if (b == "true")
+          {
+            // dot1x enabled
+            if (!m_glbl_info.enable_auth)
+            {
+              m_glbl_info.enable_auth = 1;
+            }
+          } 
+          else if (b == "false")
+          {
+            // dot1x disabled
+            if (m_glbl_info.enable_auth) 
+            {
+              m_glbl_info.enable_auth = 0;
+
+              memset(&callbackParams, 0, sizeof(callbackParams));
+              callbackParams.clientParams.info.enableStatus =  FALSE;
+
+              authmgrPortClientAuthStatusUpdate( ALL_INTERFACES,  AUTHMGR_METHOD_8021X, 
+                                                 AUTHMGR_METHOD_CHANGE, &callbackParams);
+            }
+          }
+        }
+      }
+    }
+    else if (val == DEL_COMMAND) 
+    {
+      SWSS_LOG_WARN("Unexpected DEL operation on HOSTAPD_GLOBAL_CONFIG_TABLE, ignoring");
+      continue;
+    }   
+  }
+  return true;
+}
+
+void PacMgr::processPacket(int m_pac_socket)
+{
+    struct sockaddr_ll from;
+    struct sockaddr_ll to;
+    struct iovec iov;
+    struct msghdr msg;
+    uint16_t vlan_id = 0;
+    ssize_t  packetLen = 0;
+    static char pkt[MAX_PACKET_SIZE];
+    struct cmsghdr *cmsg;
+    struct tpacket_auxdata *aux;
+    union {
+      char buf[CMSG_SPACE(MAX_PACKET_SIZE)];
+      struct cmsghdr align;
+    } cmsg_buf;
+    char ifname[IF_NAMESIZE] = {0};
+
+    uint32 intIfNum;
+     enetMacAddr_t macAddr;
+     uchar8           eap_ethtype[] = {0x88, 0x8e};
+     uchar8 intfMac[ETHER_ADDR_LEN];
+
+    memset(pkt, 0, sizeof(pkt));
+    memset(&from, 0, sizeof(struct sockaddr_ll));
+    memset(&to, 0, sizeof(struct sockaddr_ll));
+    memset(&iov, 0, sizeof(struct iovec));
+    memset(&msg, 0, sizeof(struct msghdr));
+
+    msg.msg_name        = &from;
+    msg.msg_namelen     = sizeof(from);
+    msg.msg_iov         = &iov;
+    msg.msg_iovlen      = 1;
+    msg.msg_controllen   = sizeof(cmsg_buf);
+    msg.msg_control      = &cmsg_buf;
+    msg.msg_flags       = 0;
+
+    iov.iov_len         = MAX_PACKET_SIZE;
+    iov.iov_base        = pkt;
+
+    packetLen = recvmsg(m_pac_socket, &msg, MSG_TRUNC);
+
+    if (0 > packetLen)
+    {
+        if (errno == ENETDOWN)
+            SWSS_LOG_NOTICE("%s : errno : Network is down %d \n", __FUNCTION__, from.sll_ifindex);
+        else
+            SWSS_LOG_NOTICE("%d : errno : %s \n", from.sll_ifindex, strerror(errno));
+
+        return;
+    }
+    
+
+
+    for (cmsg = CMSG_FIRSTHDR(&msg); cmsg; cmsg = CMSG_NXTHDR(&msg, cmsg))
+    {
+        if (cmsg->cmsg_level == SOL_PACKET || cmsg->cmsg_type == PACKET_AUXDATA)
+        {
+            aux = (struct tpacket_auxdata *)CMSG_DATA(cmsg);
+            if (aux->tp_status & TP_STATUS_VLAN_VALID)
+            {
+                vlan_id = (aux->tp_vlan_tci & 0x0fff);
+                break;
+            }
+        }
+    }
+
+    if_indextoname(from.sll_ifindex, ifname);
+
+    string name(ifname);
+    if(name.find(INTFS_PREFIX) == string::npos)
+    {
+        // SWSS_LOG_NOTICE("Unsupported interface format. No 'E' prefix: %s", ifname);
+        return;
+    }
+
+    memcpy (macAddr.addr, (unsigned char*)&pkt[ETHER_ADDR_LEN], sizeof(macAddr));
+
+    if (memcmp(&pkt[12], eap_ethtype, sizeof(eap_ethtype)) == 0)
+    {
+        SWSS_LOG_NOTICE("Received packet is EAPOL. Ignoring unlearnt packet trigger due to EAPOL pkt type %02X from %s", pkt[15], ifname);
+        SWSS_LOG_NOTICE("Src MAC %02X:%02X:%02X:%02X:%02X:%02X ", 
+                       (unsigned char)macAddr.addr[0], (unsigned char)macAddr.addr[1],
+                       (unsigned char)macAddr.addr[2], (unsigned char)macAddr.addr[3],
+                       (unsigned char)macAddr.addr[4], (unsigned char)macAddr.addr[5]);
+
+        return;
+    }
+
+    if(fpGetIntIfNumFromHostIfName(ifname, &intIfNum) !=  SUCCESS)
+    {
+        SWSS_LOG_NOTICE("Unable to get the internal interface number for %s.", ifname);
+        return;
+    }
+
+    if (nimGetIntfAddress(intIfNum,  0, intfMac) !=  SUCCESS)
+    {
+        SWSS_LOG_NOTICE("Unable to fetch interface MAC for %s", ifname);
+        return;
+    }
+
+    if (0 == memcmp(macAddr.addr, intfMac, ETHER_ADDR_LEN))
+    {
+//        SWSS_LOG_NOTICE("own mac.. returning");
+        return;
+    }
+
+    authmgrUnauthAddrCallBack(intIfNum, macAddr, ( ushort16)vlan_id);
+    return;
+}
+
+void PacMgr::createPacSocket(char *if_name, bool isCreate)
+{
+    std::string ifname(if_name);
+
+    if (isCreate == true)
+    {
+        auto it = g_pacSocketMap.begin();
+        while(it != g_pacSocketMap.end())
+        {
+            auto interface_name = it->second;
+
+            if (ifname == interface_name)
+            {
+                SWSS_LOG_DEBUG("Already exists. Found the entry in socket map for interface %s", PAC_GET_STD_IF_FORMAT(if_name));
+                return;
+            }
+            it++;
+        }
+
+        pacSocket *p = NULL;
+        p = new pacSocket(ifname);
+        if (p == NULL)
+        {
+            SWSS_LOG_ERROR("createPacSocket failed for %s", PAC_GET_STD_IF_FORMAT(if_name));
+            return;
+        }
+        g_pacSocketMap[p] = ifname;
+        s.addSelectable(p);
+    }
+    else
+    {
+        pacSocket *p = NULL;
+        auto it = g_pacSocketMap.begin();
+        while(it != g_pacSocketMap.end())
+        {
+            auto interface_name = it->second;
+
+            if (ifname == interface_name)
+            {
+                SWSS_LOG_NOTICE("Found the entry in socket map for interface %s", PAC_GET_STD_IF_FORMAT(if_name));
+                p = (pacSocket *)it->first;
+                break;
+            }
+            it++;
+        }
+
+        if(p)
+        {
+            s.removeSelectable(p);
+            g_pacSocketMap.erase(p);
+            delete (p);
+        }
+    }
+    SWSS_LOG_NOTICE("Create/Delete (%d) pacSocket for ifname %s", isCreate, PAC_GET_STD_IF_FORMAT(if_name));
+    return;
+}
+
+int PacMgr::pacQueuePost(char *if_name, bool isCreate)
+{
+    return pacqueue.post(if_name, isCreate);
+}
+
+extern "C" {
+    void pacCreateDeleteSocket(char *if_name, bool isCreate)
+    {
+        try
+        {
+            pacmgr.pacQueuePost(if_name, isCreate);
+        }
+        catch (const exception &e)
+        {
+            SWSS_LOG_NOTICE("Create/Delete (%d) pacSocket for ifname %s caught exception %s", 
+                             isCreate, PAC_GET_STD_IF_FORMAT(if_name), e.what());
+        }
+    }
+}
+
+pacSocket::pacSocket(string ifname, int priority) :
+    Selectable(priority), m_pac_socket(0)
+{
+    int val = 0;
+    int ret = 0;
+    struct sockaddr_ll ll_my;
+
+    // open a raw socket
+    m_pac_socket = socket(PF_PACKET, SOCK_RAW, htons(ETH_P_ALL));
+    if (m_pac_socket	 < 0)
+    {
+        SWSS_LOG_ERROR("socket() API returned error %d", m_pac_socket);
+        throw system_error(errno, system_category());
+    }
+    else
+    {
+        SWSS_LOG_DEBUG("Created socket %d", m_pac_socket);
+    }
+
+    //get vlan info from socket
+    val = 1;
+    if (-1 == setsockopt (m_pac_socket, SOL_PACKET, PACKET_AUXDATA, &val,
+                sizeof (val)))
+    {
+        SWSS_LOG_NOTICE("error socket %d", m_pac_socket);
+
+    }
+
+    memset(&ll_my, 0, sizeof(ll_my));
+    ll_my.sll_family = PF_PACKET;
+    ll_my.sll_ifindex = if_nametoindex(ifname.c_str());
+    ret = bind(m_pac_socket, (struct sockaddr *) &ll_my, sizeof(ll_my));
+    if (ret < 0)
+    {
+        SWSS_LOG_NOTICE("Binding the socket to the interface %s failed", PAC_GET_STD_IF_FORMAT(ifname));
+    }
+
+    SWSS_LOG_NOTICE("Created a socket for the interface %s(%d)",
+                    PAC_GET_STD_IF_FORMAT(ifname), ll_my.sll_ifindex);
+}
+
+
+pacSocket::~pacSocket()
+{
+    SWSS_LOG_DEBUG("Delete socket %d", m_pac_socket);
+
+
+    if (m_pac_socket)
+    {
+        SWSS_LOG_NOTICE("Closing socket %d", m_pac_socket);
+        close(m_pac_socket);
+    }
+}
+
+int pacSocket::getFd()
+{
+    return m_pac_socket;
+}
+
+uint64_t pacSocket::readData()
+{
+    SWSS_LOG_DEBUG("%s %d: Read data for the PAC packet", __FUNCTION__, __LINE__);
+    pacmgr.processPacket(m_pac_socket);
+    return 0;
+}
+
+pacQueue::pacQueue(int priority) :
+    Selectable(priority)
+{
+    int status;
+    status = pipe(m_pipefd);
+    if (status < 0)
+    {
+        SWSS_LOG_ERROR("pipe() API returned error %d", status);
+        throw system_error(errno, system_category());
+    }
+    else
+    {
+        // set read fd as non-blocking
+        int flags = fcntl(m_pipefd[0], F_GETFL, 0);
+        fcntl(m_pipefd[0], F_SETFL, flags | O_NONBLOCK);
+        SWSS_LOG_NOTICE("Created pacmgr msg queue with fd [%d, %d] ", m_pipefd[0], m_pipefd[1]);
+    }
+}
+
+
+pacQueue::~pacQueue()
+{
+    for (int i = 0; i < 2; i++)
+    {
+        if (m_pipefd[i])
+        {
+            close(m_pipefd[i]);
+            SWSS_LOG_NOTICE("Closed pacmgr pipe[%d] fd %d", i, m_pipefd[i]);
+        }
+    }
+}
+
+int pacQueue::getFd()
+{
+    return m_pipefd[0];
+}
+
+uint64_t pacQueue::readData()
+{
+    return 0;
+}
+
+int pacQueue::post(char *if_name, bool isCreate)
+{
+    struct pacQueueMsg msg;
+    int status;
+
+    strncpy(msg.ifname, if_name, sizeof(msg.ifname)-1);
+    msg.oper = isCreate;
+    status = write(m_pipefd[1], &msg, sizeof(msg));
+    if (status < 0)
+    {
+        SWSS_LOG_ERROR("write() API returned error %d", status);
+        return status;
+    }
+
+    SWSS_LOG_NOTICE("posted to pacmgr msg queue with interface(%s) and oper(%d) ", PAC_GET_STD_IF_FORMAT(if_name), isCreate);
+    return 0;
+}
+
+int pacQueue::readQueue(void)
+{
+    struct pacQueueMsg msg;
+    int len;
+    
+    memset(&msg, 0, sizeof(msg));
+
+    while ((len = read(m_pipefd[0], (void*) &msg, (size_t) sizeof(msg))) > 0)
+    {
+        if (len == sizeof(msg))
+        {
+            SWSS_LOG_NOTICE("Read pacmgr msg queue and got interface(%s) and oper(%d) ", PAC_GET_STD_IF_FORMAT(msg.ifname), (int) msg.oper);
+            pacmgr.createPacSocket(msg.ifname, msg.oper);
+        }
+        else
+        {
+            SWSS_LOG_ERROR("readQueue: read() API read only %d instead of %d", len, (int) sizeof(msg));
+            return -1;
+        }
+        memset(&msg, 0, sizeof(msg));
+    }
+    return 0;
+}
diff --git a/src/sonic-pac/pacmgr/pacmgr.h b/src/sonic-pac/pacmgr/pacmgr.h
new file mode 100644
index 00000000000..5d00c4b73bd
--- /dev/null
+++ b/src/sonic-pac/pacmgr/pacmgr.h
@@ -0,0 +1,190 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _PACMGR_H_
+#define _PACMGR_H_
+
+#include <swss/dbconnector.h>
+#include <swss/schema.h>
+#include <swss/table.h>
+#include <swss/macaddress.h>
+#include <swss/notificationproducer.h>
+#include <swss/notificationconsumer.h>
+#include <swss/subscriberstatetable.h>
+#include <swss/producerstatetable.h>
+#include <swss/table.h>
+#include <swss/select.h>
+#include <swss/timestamp.h>
+
+#include "redisapi.h"
+#include "auth_mgr_exports.h"
+
+#define STATEDB_KEY_SEPARATOR "|"
+#define MAX_PACKET_SIZE       8192
+
+#define INDEX_0 0
+#define INDEX_1 1
+#define PRIORITY_METHOD_MAX 2
+#define AUTHMGR_PORT_CONTROL_MODE_DEF  AUTHMGR_PORT_FORCE_AUTHORIZED
+#define AUTHMGR_HOST_CONTROL_MODE_DEF  AUTHMGR_MULTI_HOST_MODE
+#define AUTHMGR_REAUTH_ENABLE_DEF FD_AUTHMGR_PORT_REAUTH_ENABLED
+#define AUTHMGR_REAUTH_PERIOD_DEF FD_AUTHMGR_PORT_REAUTH_PERIOD
+#define AUTHMGR_REAUTH_PERIOD_FROM_SERVER_DEF FD_AUTHMGR_PORT_REAUTH_PERIOD_FROM_SERVER
+#define AUTHMGR_MAX_USERS_PER_PORT_DEF FD_AUTHMGR_PORT_MAX_USERS
+#define AUTHMGR_MAX_REAUTH_ATTEMPTS_DEF 3 
+#define AUTHMGR_PORT_REAUTH_PERIOD_DEF FD_AUTHMGR_PORT_REAUTH_PERIOD
+#define AUTHMGR_PORT_PAE_ROLE_DEF  DOT1X_PAE_PORT_NONE_CAPABLE
+#define AUTHMGR_PRIORITY_LIST_0_DEF  AUTHMGR_METHOD_8021X 
+#define AUTHMGR_PRIORITY_LIST_1_DEF  AUTHMGR_METHOD_MAB
+#define AUTHMGR_METHOD_LIST_0_DEF  AUTHMGR_METHOD_8021X 
+#define AUTHMGR_METHOD_LIST_1_DEF  AUTHMGR_METHOD_MAB
+
+#define PACMGR_IFNAME_SIZE 60  // NIM_IFNAME_SIZE
+
+using namespace swss;
+using namespace std;
+
+typedef struct pac_hostapd_glbl_info_s {
+  unsigned int enable_auth;
+}pac_hostapd_glbl_info_t;
+
+typedef std::map<Selectable *, std::string> pacSocket_map_t;
+
+/* PAC GLOBAL config table Info */
+typedef struct pacGlobalConfigCacheParams_t {
+    uint8_t monitor_mode_enable;
+    uint8_t dynamic_vlan_creation_enable;
+} pacGlobalConfigCacheParams_t;
+
+/* PAC port config table Info */
+typedef struct pacPortConfigCacheParams_t {
+     AUTHMGR_PORT_CONTROL_t port_control_mode;
+     AUTHMGR_HOST_CONTROL_t host_control_mode;
+    bool reauth_enable;
+    uint32_t reauth_period;
+    bool reauth_period_from_server;
+    uint8_t max_users_per_port;
+    uint8_t max_reauth_attempts;
+    uint8_t port_pae_role;
+     AUTHMGR_METHOD_t priority_list[PRIORITY_METHOD_MAX];
+     AUTHMGR_METHOD_t method_list[PRIORITY_METHOD_MAX];
+} pacPortConfigCacheParams_t;
+
+/* To store PAC port configuration,
+ * Key is "interface-id" (Eg. Ethernet0)
+ * Value is "pacPortConfigCacheParams_t"
+ */
+typedef std::map<std::string, pacPortConfigCacheParams_t> pacPortConfigTableMap;
+
+/* Pac Queue class to receive notification regarding socket
+ * createtion/deletion for unauth client packets
+ */
+class pacQueue : public Selectable {
+public:
+
+    pacQueue(int priority = 0);
+    virtual ~pacQueue();
+
+    int getFd() override;
+    uint64_t readData() override;
+    int post(char *if_name, bool isCreate);
+    int readQueue(void);
+
+private:
+
+    int m_pipefd[2];
+};
+
+struct pacQueueMsg {
+    char ifname[PACMGR_IFNAME_SIZE];
+    bool   oper;
+};
+
+
+class PacMgr
+{ 
+public:
+    PacMgr(DBConnector *configDb, DBConnector *stateDb,  DBConnector *appDb);
+
+    std::vector<Selectable *> getSelectables();
+    bool processDbEvent(Selectable *source);
+    void createPacSocket(char *if_name, bool isCreate);
+    void processPacket(int m_pac_socket);
+    int  pacQueuePost(char *if_name, bool isCreate);
+
+    /* Placeholder for PAC Global table config params */
+    static pacGlobalConfigCacheParams_t pacGlobalConfigTable;
+
+private:
+
+    pac_hostapd_glbl_info_t m_glbl_info;
+    pacPortConfigTableMap     m_pacPortConfigMap;
+
+    //tables this component listens to
+    SubscriberStateTable m_confPacTbl;
+    SubscriberStateTable m_confPacGblTbl;
+    SubscriberStateTable m_confPacHostapdGblTbl;
+   
+    // VLAN tables that we listen to
+    SubscriberStateTable m_confVlanTbl;
+    SubscriberStateTable m_confVlanMemTbl;
+
+    // VLAN state tables
+    SubscriberStateTable m_vlanTbl;
+    SubscriberStateTable m_vlanMemTbl;
+    NotificationConsumer m_clearNotificationConsumer;
+   // NotificationConsumer m_clearHistoryNotificationConsumer;
+
+    // DB Event handler functions
+    bool processPacPortConfTblEvent(Selectable *tbl);
+    bool processPacGlobalCfgTblEvent(Selectable *tbl);
+    bool processVlanTblEvent(Selectable *tbl);
+    bool processVlanMemTblEvent(Selectable *tbl);
+    bool processConfVlanTblEvent(Selectable *tbl);
+    bool processConfVlanMemTblEvent(Selectable *tbl);
+    bool processPacAuthSessionsClearNotifyEvent(NotificationConsumer *tbl);
+    bool processPacHostapdConfGlobalTblEvent(Selectable *tbl);
+    bool doPacGlobalTableSetTask(const KeyOpFieldsValuesTuple & t);
+    bool doPacGlobalTableDeleteTask();
+    bool doPacPortTableSetTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum);
+    bool doPacPortTableDeleteTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum);
+
+   // pacmgr queue to receive message about unauth address socket create/delete
+   pacQueue pacqueue;
+   bool processPacMsgQueue(Selectable *tbl);
+};
+
+
+
+namespace swss {
+
+class pacSocket : public Selectable {
+public:
+
+    pacSocket(string ifname, int priority = 0);
+    virtual ~pacSocket ();
+
+    int getFd() override;
+    uint64_t readData() override;
+
+private:
+
+    int m_pac_socket;
+};
+
+}
+
+#endif // _PACMGR_H_
diff --git a/src/sonic-pac/pacmgr/pacmgr_main.cpp b/src/sonic-pac/pacmgr/pacmgr_main.cpp
new file mode 100644
index 00000000000..0acfde52fa9
--- /dev/null
+++ b/src/sonic-pac/pacmgr/pacmgr_main.cpp
@@ -0,0 +1,94 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <unistd.h>
+#include <iostream>
+#include <swss/subscriberstatetable.h>
+#include <swss/select.h>
+#include "datatypes.h"
+#include "osapi.h"
+#include "pacmgr.h"
+#include "auth_mgr_include.h"
+#include "fpinfra.h"
+#include "pacoper_common.h"
+
+extern "C" {
+extern void pacCfgIntfClientCleanup(void);
+extern void pacCfgVlanCleanup(void);
+}
+
+#define SELECT_TIMEOUT 10000
+swss::DBConnector stateDb("STATE_DB", 0);
+swss::DBConnector configDb("CONFIG_DB", 0);
+swss::DBConnector appDb("APPL_DB", 0);
+
+PacMgr pacmgr(&configDb, &stateDb, &appDb);
+swss::Select s;
+pacSocket_map_t g_pacSocketMap;
+
+
+int main(int argc, char *argv[])
+{
+    fpinfraInit();
+
+    if (authmgrInit () !=  SUCCESS)
+    {
+      SWSS_LOG_ERROR("authmgr initialization failed");
+      return -1;
+    }
+
+    if (osapiWaitForTaskInit ( AUTHMGR_DB_TASK_SYNC,  WAIT_FOREVER) !=
+                               SUCCESS)
+    {
+      return -1;
+    }
+
+    try
+    {
+        SWSS_LOG_NOTICE("-----Starting PacMgr-----");
+
+        pacCfgIntfClientCleanup();
+        PacOperTblCleanup();
+        //register for the table events
+        s.addSelectables(pacmgr.getSelectables());
+
+        //wait for the events and process them
+        while (true)
+        {
+            swss::Selectable *sel = NULL;
+            s.select(&sel);
+
+            if (g_pacSocketMap.find(sel) != g_pacSocketMap.end())
+            {
+                continue;
+            }
+
+            try
+            {
+              //Pass on the processing to the Pac Manager
+              pacmgr.processDbEvent(sel);
+            }
+            catch (const exception &e)
+            {
+                SWSS_LOG_ERROR("Got exception from processDbEvent: %s", e.what());
+            }
+        }
+    }
+    catch (const exception &e)
+    {
+        SWSS_LOG_ERROR("Runtime error: %s", e.what());
+    }
+    return -1;
+}
diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index c6f6bed9eae..381432bde0e 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit c6f6bed9eae562d1a045bbf62601216707969ca9
+Subproject commit 381432bde0efe6d4c66fe2048f4659f8d2f5ae85
diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 803aae75557..c0b9ec6964f 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 803aae75557d43f1020728bf1d2438171cfe3a32
+Subproject commit c0b9ec6964f0b1fa5b5db051c0f926553972fb17
diff --git a/src/sonic-py-common/sonic_py_common/device_info.py b/src/sonic-py-common/sonic_py_common/device_info.py
index 85d1d6222f8..47409eb18ca 100644
--- a/src/sonic-py-common/sonic_py_common/device_info.py
+++ b/src/sonic-py-common/sonic_py_common/device_info.py
@@ -600,8 +600,33 @@ def is_packet_chassis():
     return True if switch_type and switch_type == 'chassis-packet' else False
 
 
+def is_disaggregated_chassis():
+    platform_env_conf_file_path = get_platform_env_conf_file_path()
+    if platform_env_conf_file_path is None:
+        return False
+    with open(platform_env_conf_file_path) as platform_env_conf_file:
+        for line in platform_env_conf_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+               continue
+            if tokens[0] == 'disaggregated_chassis':
+                val = tokens[1].strip()
+                if val == '1':
+                    return True
+        return False
+
+
+def is_virtual_chassis():
+    switch_type = get_platform_info().get('switch_type')
+    asic_type = get_platform_info().get('asic_type')
+    if asic_type == "vs" and switch_type in ["dummy-sup", "voq", "chassis-packet"]:
+        return True
+    else:
+        return False
+
+
 def is_chassis():
-    return is_voq_chassis() or is_packet_chassis()
+    return (is_voq_chassis() and not is_disaggregated_chassis()) or is_packet_chassis() or is_virtual_chassis()
 
 
 def is_smartswitch():
@@ -624,9 +649,6 @@ def is_dpu():
     if not platform:
         return False
 
-    if not is_smartswitch():
-        return False
-
     # Retrieve platform.json data
     platform_data = get_platform_json_data()
     if platform_data:
@@ -803,7 +825,7 @@ def get_system_mac(namespace=None, hostname=None):
 
         (mac, err) = run_command(syseeprom_cmd)
         hw_mac_entry_outputs.append((mac, err))
-    elif (version_info['asic_type'] == 'marvell'):
+    elif (version_info['asic_type'] == 'marvell-prestera'):
         # Try valid mac in eeprom, else fetch it from eth0
         machine_key = "onie_machine"
         machine_vars = get_machine_info()
@@ -835,8 +857,23 @@ def get_system_mac(namespace=None, hostname=None):
             profile_cmd = ["false"]
             (mac, err) = run_command(profile_cmd)
         hw_mac_entry_outputs.append((mac, err))
-        (mac, err) = run_command(syseeprom_cmd)
+        (mac, err) = run_command_pipe(iplink_cmd0, iplink_cmd1, iplink_cmd2)
         hw_mac_entry_outputs.append((mac, err))
+        mac_found = False
+        for (mac, err) in hw_mac_entry_outputs:
+            if err:
+                continue
+            mac = mac.strip()
+            if _valid_mac_address(mac):
+                mac_found = True
+                break
+        # If mac not found, fetch from syseeprom
+        if not mac_found:
+            hw_mac_entry_outputs = []
+            (mac, err) = run_command(syseeprom_cmd)
+            hw_mac_entry_outputs.append((mac, err))
+    elif (version_info['asic_type'] == 'pensando'):
+        iplink_cmd0 = ["ip", 'link', 'show', 'eth0-midplane']
         (mac, err) = run_command_pipe(iplink_cmd0, iplink_cmd1, iplink_cmd2)
         hw_mac_entry_outputs.append((mac, err))
     else:
diff --git a/src/sonic-py-common/tests/device_info_test.py b/src/sonic-py-common/tests/device_info_test.py
index e7ac9e88c3c..8dc4f0c51d6 100644
--- a/src/sonic-py-common/tests/device_info_test.py
+++ b/src/sonic-py-common/tests/device_info_test.py
@@ -121,23 +121,42 @@ def test_get_sonic_version(self, mock_isfile):
             open_mocked.assert_called_once_with(device_info.SONIC_VERSION_YAML_PATH)
 
     @mock.patch("sonic_py_common.device_info.get_platform_info")
-    def test_is_chassis(self, mock_platform_info):
+    @mock.patch("sonic_py_common.device_info.is_disaggregated_chassis")
+    def test_is_chassis(self, mock_is_disaggregated_chassis, mock_platform_info):
         mock_platform_info.return_value = {"switch_type": "npu"}
+        mock_is_disaggregated_chassis.return_value = False
         assert device_info.is_chassis() == False
         assert device_info.is_voq_chassis() == False
         assert device_info.is_packet_chassis() == False
 
         mock_platform_info.return_value = {"switch_type": "voq"}
+        mock_is_disaggregated_chassis.return_value = False
         assert device_info.is_voq_chassis() == True
         assert device_info.is_packet_chassis() == False
         assert device_info.is_chassis() == True
 
+        mock_platform_info.return_value = {"switch_type": "voq"}
+        mock_is_disaggregated_chassis.return_value = True
+        assert device_info.is_voq_chassis() == True
+        assert device_info.is_packet_chassis() == False
+        assert device_info.is_chassis() == False
+
         mock_platform_info.return_value = {"switch_type": "chassis-packet"}
+        mock_is_disaggregated_chassis.return_value = False
         assert device_info.is_voq_chassis() == False
         assert device_info.is_packet_chassis() == True
         assert device_info.is_chassis() == True
 
+        mock_platform_info.return_value = {"switch_type": "dummy-sup",
+                                           "asic_type": "vs"}
+        mock_is_disaggregated_chassis.return_value = False
+        assert device_info.is_voq_chassis() == False
+        assert device_info.is_packet_chassis() == False
+        assert device_info.is_virtual_chassis() == True
+        assert device_info.is_chassis() == True
+
         mock_platform_info.return_value = {}
+        mock_is_disaggregated_chassis.return_value = False
         assert device_info.is_voq_chassis() == False
         assert device_info.is_packet_chassis() == False
         assert device_info.is_chassis() == False
diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 77d82e823a6..f32256ec542 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 77d82e823a6bee0ddbd694500cc677953665013a
+Subproject commit f32256ec542feeeed8897a230c7f49ada436cd13
diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent
index 25f9e4fa16e..13b975baeba 160000
--- a/src/sonic-snmpagent
+++ b/src/sonic-snmpagent
@@ -1 +1 @@
-Subproject commit 25f9e4fa16e8f4789f770b4c93537bb2026c8ec5
+Subproject commit 13b975baeba91a4ca334e25dab075c6595df33e2
diff --git a/src/sonic-stp b/src/sonic-stp
index 4909e7ec0cb..0a74023f3a1 160000
--- a/src/sonic-stp
+++ b/src/sonic-stp
@@ -1 +1 @@
-Subproject commit 4909e7ec0cbcc01f227f23c6209bdd779a2639e5
+Subproject commit 0a74023f3a1bac67e61e2568687aaba78d4a78fc
diff --git a/src/sonic-swss b/src/sonic-swss
index 4eb74f0082f..badf36fa4ee 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 4eb74f0082f0f8c4537fe58621ac902c870d217c
+Subproject commit badf36fa4ee07f3755f3836b961e5c47b2d12935
diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 599b0a67fd3..bcfbb21c434 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 599b0a67fd3dc6caa1f2590fc4bd96349fc625ee
+Subproject commit bcfbb21c43482d79cd3dc4a2f83d4cd968252628
diff --git a/src/sonic-sysmgr/Makefile.am b/src/sonic-sysmgr/Makefile.am
new file mode 100644
index 00000000000..463881acb7e
--- /dev/null
+++ b/src/sonic-sysmgr/Makefile.am
@@ -0,0 +1,26 @@
+AUTOMAKE_OPTIONS = subdir-objects
+INCLUDES = -I ../sonic-swss-common/common -Ibuild/gen -Ibuild/gen/github.com/openconfig/gnoi
+BUILT_SOURCES = rebootbackend_protobuf_compilation rebootbackend_dbus_compilation
+
+.NOTPARALLEL: compile_protobufs
+compile_protobufs: rebootbackend_protobuf_compilation rebootbackend_dbus_compilation
+
+rebootbackend_protobuf_compilation: 
+	mkdir -p build/gen
+	/usr/bin/protoc --cpp_out=build/gen \
+		--proto_path=github.com/openconfig/gnoi=gnoi \
+		gnoi/types/types.proto \
+		gnoi/common/common.proto \
+		gnoi/system/system.proto
+
+rebootbackend_dbus_compilation: build/gen/librebootgnoi.la
+	/usr/bin/dbusxx-xml2cpp rebootbackend/reboot.xml \
+		--proxy=rebootbackend/reboot_dbus.h
+
+lib_LTLIBRARIES = build/gen/librebootgnoi.la
+build_gen_librebootgnoi_la_SOURCES = \
+        build/gen/github.com/openconfig/gnoi/system/system.pb.cc \
+        build/gen/github.com/openconfig/gnoi/types/types.pb.cc \
+        build/gen/github.com/openconfig/gnoi/common/common.pb.cc
+
+SUBDIRS = rebootbackend
diff --git a/src/sonic-sysmgr/autogen.sh b/src/sonic-sysmgr/autogen.sh
new file mode 100755
index 00000000000..4a5ffda82dd
--- /dev/null
+++ b/src/sonic-sysmgr/autogen.sh
@@ -0,0 +1,5 @@
+#!/bin/bash
+ 
+libtoolize --force --copy &&
+autoreconf --force --install -I m4
+rm -Rf autom4te.cache
diff --git a/src/sonic-sysmgr/configure.ac b/src/sonic-sysmgr/configure.ac
new file mode 100644
index 00000000000..3a315230495
--- /dev/null
+++ b/src/sonic-sysmgr/configure.ac
@@ -0,0 +1,84 @@
+AC_INIT([sonic-swss],[1.0])
+AC_CONFIG_SRCDIR([])
+AC_CONFIG_AUX_DIR(config)
+AM_CONFIG_HEADER(config.h)
+AM_INIT_AUTOMAKE([foreign])
+AC_LANG_C
+AC_LANG([C++])
+AC_PROG_CC
+AC_PROG_CXX
+AC_PROG_LIBTOOL
+AC_HEADER_STDC
+
+AC_CHECK_LIB([hiredis], [redisConnect],,
+    AC_MSG_ERROR([libhiredis is not installed.]))
+
+PKG_CHECK_MODULES([JANSSON], [jansson])
+
+AC_ARG_ENABLE(debug,
+[  --enable-debug      Compile with debugging flags],
+[case "${enableval}" in
+	yes) debug=true ;;
+	no)  debug=false ;;
+	*) AC_MSG_ERROR(bad value ${enableval} for --enable-debug) ;;
+esac],[debug=false])
+AM_CONDITIONAL(DEBUG, test x$debug = xtrue)
+
+AC_ARG_WITH(extra-inc,
+[  --with-extra-inc=DIR
+                          prefix where extra includes are installed],
+[AC_SUBST(CPPFLAGS, "$CPPFLAGS -I${withval} -I${withval}/swss")])
+
+AC_ARG_WITH(extra-lib,
+[  --with-extra-lib=DIR
+                          prefix where extra libraries are installed],
+[AC_SUBST(LDFLAGS, "$LDFLAGS -L${withval}")])
+
+CFLAGS_COMMON="-std=c++14 -Wall -fPIC -Wno-write-strings -I/usr/include/swss"
+
+CFLAGS_COMMON+=" -Werror"
+CFLAGS_COMMON+=" -Wno-reorder"
+CFLAGS_COMMON+=" -Wcast-align"
+CFLAGS_COMMON+=" -Wcast-qual"
+#TODO (b/314850353): Re-enable conversion errors with updated protoc compiler.
+#CFLAGS_COMMON+=" -Wconversion"
+CFLAGS_COMMON+=" -Wdisabled-optimization"
+CFLAGS_COMMON+=" -Wextra"
+CFLAGS_COMMON+=" -Wfloat-equal"
+CFLAGS_COMMON+=" -Wformat=2"
+CFLAGS_COMMON+=" -Wformat-nonliteral"
+CFLAGS_COMMON+=" -Wformat-security"
+CFLAGS_COMMON+=" -Wformat-y2k"
+CFLAGS_COMMON+=" -Wimport"
+CFLAGS_COMMON+=" -Winit-self"
+CFLAGS_COMMON+=" -Winvalid-pch"
+CFLAGS_COMMON+=" -Wlong-long"
+CFLAGS_COMMON+=" -Wmissing-field-initializers"
+CFLAGS_COMMON+=" -Wmissing-format-attribute"
+CFLAGS_COMMON+=" -Wno-aggregate-return"
+CFLAGS_COMMON+=" -Wno-padded"
+CFLAGS_COMMON+=" -Wno-switch-enum"
+CFLAGS_COMMON+=" -Wno-unused-parameter"
+CFLAGS_COMMON+=" -Wpacked"
+CFLAGS_COMMON+=" -Wpointer-arith"
+CFLAGS_COMMON+=" -Wredundant-decls"
+CFLAGS_COMMON+=" -Wstack-protector"
+CFLAGS_COMMON+=" -Wstrict-aliasing=3"
+CFLAGS_COMMON+=" -Wswitch"
+CFLAGS_COMMON+=" -Wswitch-default"
+CFLAGS_COMMON+=" -Wunreachable-code"
+CFLAGS_COMMON+=" -Wunused"
+CFLAGS_COMMON+=" -Wvariadic-macros"
+CFLAGS_COMMON+=" -Wno-switch-default"
+CFLAGS_COMMON+=" -Wno-long-long"
+CFLAGS_COMMON+=" -Wno-redundant-decls"
+
+AC_SUBST(CFLAGS_COMMON)
+
+AC_CONFIG_FILES([
+    Makefile
+    rebootbackend/Makefile
+    tests/Makefile
+])
+
+AC_OUTPUT
diff --git a/src/sonic-sysmgr/debian/changelog b/src/sonic-sysmgr/debian/changelog
new file mode 100644
index 00000000000..93dae9ae8a7
--- /dev/null
+++ b/src/sonic-sysmgr/debian/changelog
@@ -0,0 +1,6 @@
+sonic (1.0.0) stable; urgency=medium
+
+  * Initial release.
+
+ -- Runming Wu <runmingwu@google.com>  Wed, 20 Sep 2023 12:00:00 -0800 
+
diff --git a/src/sonic-sysmgr/debian/compat b/src/sonic-sysmgr/debian/compat
new file mode 100644
index 00000000000..52a8c6d10ce
--- /dev/null
+++ b/src/sonic-sysmgr/debian/compat
@@ -0,0 +1 @@
+10 
diff --git a/src/sonic-sysmgr/debian/control b/src/sonic-sysmgr/debian/control
new file mode 100644
index 00000000000..3ebea517ae1
--- /dev/null
+++ b/src/sonic-sysmgr/debian/control
@@ -0,0 +1,18 @@
+Source: sonic
+Maintainer: Runming Wu <runmingwu@google.com>
+Section: net
+Priority: optional
+Build-Depends: dh-exec (>=0.3), debhelper (>= 9), autotools-dev
+Standards-Version: 1.0.0
+
+Package: sysmgr
+Architecture: any
+Depends: ${shlibs:Depends}
+Description: This package contains sysmgr service.
+
+Package: sysmgr-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: sysmgr (=${binary:Version})
+Description: debugging symbols for sysmgr
diff --git a/src/sonic-sysmgr/debian/rules b/src/sonic-sysmgr/debian/rules
new file mode 100755
index 00000000000..56c5efbeb97
--- /dev/null
+++ b/src/sonic-sysmgr/debian/rules
@@ -0,0 +1,38 @@
+#!/usr/bin/make -f
+# See debhelper(7) (uncomment to enable)
+# output every command that modifies files on the build system.
+#export DH_VERBOSE = 1
+
+# see EXAMPLES in dpkg-buildflags(1) and read /usr/share/dpkg/*
+DPKG_EXPORT_BUILDFLAGS = 1
+include /usr/share/dpkg/default.mk
+
+# see FEATURE AREAS in dpkg-buildflags(1)
+#export DEB_BUILD_MAINT_OPTIONS = hardening=+all
+
+# see ENVIRONMENT in dpkg-buildflags(1)
+# package maintainers to append CFLAGS
+#export DEB_CFLAGS_MAINT_APPEND  = -Wall -pedantic
+# package maintainers to append LDFLAGS
+#export DEB_LDFLAGS_MAINT_APPEND = -Wl,--as-needed
+
+
+# main packaging script based on dh7 syntax
+%:
+	dh $@  --with autotools-dev
+
+# dh_make generated override targets
+# This is example for Cmake (See https://bugs.debian.org/641051 )
+#override_dh_auto_configure:
+#	dh_auto_configure -- \
+#	-DCMAKE_LIBRARY_PATH=$(DEB_HOST_MULTIARCH)
+
+override_dh_auto_configure:
+	dh_auto_configure -- $(configure_opts)
+
+override_dh_auto_install:
+	dh_auto_install --destdir=debian/sysmgr
+
+override_dh_strip: 
+	dh_strip -psysmgr --dbg-package=sysmgr-dbg
+
diff --git a/src/sonic-sysmgr/gnoi b/src/sonic-sysmgr/gnoi
new file mode 160000
index 00000000000..2b6ff72de57
--- /dev/null
+++ b/src/sonic-sysmgr/gnoi
@@ -0,0 +1 @@
+Subproject commit 2b6ff72de5769839fc68bd019f345a184e3b0bf1
diff --git a/src/sonic-sysmgr/package.cfg b/src/sonic-sysmgr/package.cfg
new file mode 100644
index 00000000000..ee0cc94f1dd
--- /dev/null
+++ b/src/sonic-sysmgr/package.cfg
@@ -0,0 +1,15 @@
+{
+    "description": "This package contains SONiC sysmgr.",
+    "version": "1.0.0",
+    "maintainer": "Runming Wu <runmingwu@google.com>",
+    "build_depends": [ ],
+    "packages": [
+        {
+            "name": "sonic-sysmgr",
+            "dependencies": [
+            ],
+            "files": [
+            ]
+        }
+    ]
+}
diff --git a/src/sonic-sysmgr/rebootbackend/Makefile.am b/src/sonic-sysmgr/rebootbackend/Makefile.am
new file mode 100644
index 00000000000..9ab36da44bf
--- /dev/null
+++ b/src/sonic-sysmgr/rebootbackend/Makefile.am
@@ -0,0 +1,17 @@
+AUTOMAKE_OPTIONS = subdir-objects
+INCLUDES = -I $(top_srcdir) -I/usr/include/dbus-c++-1/ -I$(top_srcdir)/build/gen -I$(top_srcdir)/build/gen/github.com/openconfig/gnoi -I ../../sonic-swss-common/common
+
+bin_PROGRAMS = rebootbackend
+
+if DEBUG
+DBGFLAGS = -ggdb -DDEBUG
+else
+DBGFLAGS = -g
+endif
+
+rebootbackend_SOURCES = rebootbackend.cpp rebootbe.cpp interfaces.cpp \
+                        reboot_thread.cpp  
+
+rebootbackend_CFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_ASAN)
+rebootbackend_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_ASAN)
+rebootbackend_LDADD = $(LDFLAGS_ASAN) -lswsscommon -ldbus-c++-1 -lpthread -lprotobuf $(top_srcdir)/build/gen/librebootgnoi.la
diff --git a/src/sonic-sysmgr/rebootbackend/interfaces.cpp b/src/sonic-sysmgr/rebootbackend/interfaces.cpp
new file mode 100644
index 00000000000..e1bdeca8aaa
--- /dev/null
+++ b/src/sonic-sysmgr/rebootbackend/interfaces.cpp
@@ -0,0 +1,71 @@
+#include "interfaces.h"
+
+#include <dbus-c++/dbus.h>  // DBus
+
+#include "reboot_interfaces.h"
+
+constexpr char kRebootBusName[] = "org.SONiC.HostService.reboot";
+constexpr char kRebootPath[] = "/org/SONiC/HostService/reboot";
+
+constexpr char kContainerShutdownBusName[] =
+    "org.SONiC.HostService.container_shutdown";
+constexpr char kContainerShutdownPath[] =
+    "/org/SONiC/HostService/container_shutdown";
+
+DBus::Connection& HostServiceDbus::getConnection(void) {
+  static DBus::Connection* connPtr = nullptr;
+  if (connPtr == nullptr) {
+    static DBus::BusDispatcher dispatcher;
+    DBus::default_dispatcher = &dispatcher;
+
+    static DBus::Connection conn = DBus::Connection::SystemBus();
+    connPtr = &conn;
+  }
+  return *connPtr;
+}
+
+DbusInterface::DbusResponse HostServiceDbus::Reboot(
+    const std::string& jsonRebootRequest) {
+  int32_t status;
+
+  DbusReboot reboot_client(getConnection(), kRebootBusName, kRebootPath);
+  std::string retString;
+  std::vector<std::string> options;
+  options.push_back(jsonRebootRequest);
+  try {
+    reboot_client.issue_reboot(options, status, retString);
+  } catch (DBus::Error& ex) {
+    return DbusResponse{
+        DbusStatus::DBUS_FAIL,
+        "HostServiceDbus::Reboot: failed to call reboot host service"};
+  }
+
+  // reboot.py returns 0 for success, 1 for failure
+  if (status == 0) {
+    // Successful reboot response is an empty string.
+    return DbusResponse{DbusStatus::DBUS_SUCCESS, ""};
+  }
+  return DbusResponse{DbusStatus::DBUS_FAIL, retString};
+}
+
+DbusInterface::DbusResponse HostServiceDbus::RebootStatus(
+    const std::string& jsonStatusRequest) {
+  DbusReboot reboot_client(getConnection(), kRebootBusName, kRebootPath);
+  int32_t status;
+  std::string retString;
+
+  try {
+    reboot_client.get_reboot_status(status, retString);
+  } catch (DBus::Error& ex) {
+    return DbusResponse{
+        DbusStatus::DBUS_FAIL,
+        "HostServiceDbus::RebootStatus: failed to call reboot status "
+        "host service"};
+  }
+
+  // reboot.py returns 0 for success, 1 for failure
+  if (status == 0) {
+    return DbusResponse{DbusStatus::DBUS_SUCCESS, retString};
+  }
+  return DbusResponse{DbusStatus::DBUS_FAIL, retString};
+}
diff --git a/src/sonic-sysmgr/rebootbackend/interfaces.h b/src/sonic-sysmgr/rebootbackend/interfaces.h
new file mode 100644
index 00000000000..665a6a8ddf7
--- /dev/null
+++ b/src/sonic-sysmgr/rebootbackend/interfaces.h
@@ -0,0 +1,27 @@
+#pragma once
+#include <dbus-c++/dbus.h>
+
+#include <string>
+
+#include "reboot_dbus.h"  // auto generated reboot_proxy
+#include "reboot_interfaces.h"
+
+class DbusReboot : public org::SONiC::HostService::reboot_proxy,
+                       public DBus::IntrospectableProxy,
+                       public DBus::ObjectProxy {
+ public:
+  DbusReboot(DBus::Connection& connection, const char* dbus_bus_name_p,
+                 const char* dbus_obj_name_p)
+      : DBus::ObjectProxy(connection, dbus_obj_name_p, dbus_bus_name_p) {}
+};
+
+class HostServiceDbus : public DbusInterface {
+ public:
+  DbusInterface::DbusResponse Reboot(
+      const std::string& json_reboot_request) override;
+  DbusInterface::DbusResponse RebootStatus(
+      const std::string& json_status_request) override;
+
+ private:
+  static DBus::Connection& getConnection(void);
+};
diff --git a/src/sonic-sysmgr/rebootbackend/reboot.xml b/src/sonic-sysmgr/rebootbackend/reboot.xml
new file mode 100644
index 00000000000..8c71083482d
--- /dev/null
+++ b/src/sonic-sysmgr/rebootbackend/reboot.xml
@@ -0,0 +1,30 @@
+<?ignore
+XML representation of dbus interface created by: sonic-host-services/host_modules/reboot.py
+
+XML generated on switch by executing:
+   dbus-send --system --type=method_call --print-reply --dest=org.SONiC.HostService.reboot /org/SONiC/HostService/reboot org.freedesktop.DBus.Introspectable.Introspect
+
+C++ header file generated by:
+   sudo apt-get install libdbus-c++-dev
+   dbusxx-xml2cpp ./reboot.xml --proxy=reboot_dbus.h
+?>
+ 
+<node name="/org/SONiC/HostService/reboot">
+  <interface name="org.freedesktop.DBus.Introspectable">
+    <method name="Introspect">
+      <arg direction="out" type="s" />
+    </method>
+  </interface>
+  <interface name="org.SONiC.HostService.reboot">
+    <method name="issue_reboot">
+      <arg direction="in"  type="as" name="options" />
+      <arg direction="out" type="i" />
+      <arg direction="out" type="s" />
+    </method>
+    <method name="get_reboot_status">
+      <arg direction="out" type="i" />
+      <arg direction="out" type="s" />
+    </method>
+  </interface>
+</node>
+
diff --git a/src/sonic-sysmgr/rebootbackend/reboot_common.h b/src/sonic-sysmgr/rebootbackend/reboot_common.h
new file mode 100644
index 00000000000..b2f6848c43f
--- /dev/null
+++ b/src/sonic-sysmgr/rebootbackend/reboot_common.h
@@ -0,0 +1,15 @@
+#pragma once
+
+#include <time.h>
+
+#include "status_code_util.h"
+
+namespace rebootbackend {
+
+extern bool sigterm_requested;
+struct NotificationResponse {
+  swss::StatusCode status;
+  std::string json_string;
+};
+
+}  // namespace rebootbackend
diff --git a/src/sonic-sysmgr/rebootbackend/reboot_interfaces.h b/src/sonic-sysmgr/rebootbackend/reboot_interfaces.h
new file mode 100644
index 00000000000..599652fa534
--- /dev/null
+++ b/src/sonic-sysmgr/rebootbackend/reboot_interfaces.h
@@ -0,0 +1,20 @@
+#pragma once
+
+#include <string>
+
+class DbusInterface {
+ public:
+  enum class DbusStatus {
+    DBUS_SUCCESS,
+    DBUS_FAIL,
+  };
+
+  struct DbusResponse {
+    DbusStatus status;
+    std::string json_string;
+  };
+
+  virtual ~DbusInterface() = default;
+  virtual DbusResponse Reboot(const std::string& jsonRebootRequest) = 0;
+  virtual DbusResponse RebootStatus(const std::string& jsonStatusRequest) = 0;
+};
diff --git a/src/sonic-sysmgr/rebootbackend/reboot_thread.cpp b/src/sonic-sysmgr/rebootbackend/reboot_thread.cpp
new file mode 100644
index 00000000000..41b11b298a1
--- /dev/null
+++ b/src/sonic-sysmgr/rebootbackend/reboot_thread.cpp
@@ -0,0 +1,315 @@
+#include "reboot_thread.h"
+
+#include <google/protobuf/util/json_util.h>
+
+#include <chrono>
+
+#include "dbconnector.h"
+#include "logger.h"
+#include "notificationproducer.h"
+#include "reboot_common.h"
+#include "reboot_interfaces.h"
+#include "select.h"
+#include "selectableevent.h"
+#include "selectabletimer.h"
+#include "subscriberstatetable.h"
+#include "system/system.pb.h"
+#include "timestamp.h"
+
+namespace rebootbackend {
+
+using namespace ::gnoi::system;
+using steady_clock = std::chrono::steady_clock;
+using Progress = ::rebootbackend::RebootThread::Progress;
+namespace gpu = ::google::protobuf::util;
+
+bool sigterm_requested = false;
+
+RebootThread::RebootThread(DbusInterface &dbus_interface,
+                           swss::SelectableEvent &m_finished)
+    : m_db("STATE_DB", 0),
+      m_finished(m_finished),
+      m_dbus_interface(dbus_interface) {}
+
+void RebootThread::Stop(void) {
+  SWSS_LOG_ENTER();
+  // Notify reboot thread that stop has been requested.
+  m_stop.notify();
+}
+
+bool RebootThread::Join(void) {
+  SWSS_LOG_ENTER();
+
+  if (!m_thread.joinable()) {
+    SWSS_LOG_ERROR("RebootThread::Join called, but not joinable");
+    return false;
+  }
+
+  try {
+    m_thread.join();
+    m_status.set_inactive();
+    return true;
+  } catch (const std::system_error &e) {
+    SWSS_LOG_ERROR("Exception calling join: %s", e.what());
+    return false;
+  }
+}
+
+RebootStatusResponse RebootThread::GetResponse(void) {
+  return m_status.get_response();
+}
+
+bool RebootThread::HasRun() { return m_status.get_reboot_count() > 0; }
+
+Progress RebootThread::platform_reboot_select(swss::Select &s,
+                                              swss::SelectableTimer &l_timer) {
+  SWSS_LOG_ENTER();
+
+  while (true) {
+    swss::Selectable *sel;
+    int select_ret;
+    select_ret = s.select(&sel);
+
+    if (select_ret == swss::Select::ERROR) {
+      SWSS_LOG_NOTICE("Error: %s!", strerror(errno));
+    } else if (select_ret == swss::Select::OBJECT) {
+      if (sel == &m_stop) {
+        // SIGTERM expected after platform reboot request
+        SWSS_LOG_NOTICE(
+            "m_stop rx'd (SIGTERM) while waiting for platform reboot");
+        return Progress::EXIT_EARLY;
+      } else if (sel == &l_timer) {
+        return Progress::PROCEED;
+      }
+    }
+  }
+}
+
+Progress RebootThread::wait_for_platform_reboot(swss::Select &s) {
+  SWSS_LOG_ENTER();
+
+  // Sleep for a long time: 260 seconds.
+  // During this time platform should kill us as part of reboot.
+  swss::SelectableTimer l_timer(
+      timespec{.tv_sec = m_reboot_timeout, .tv_nsec = 0});
+  s.addSelectable(&l_timer);
+
+  l_timer.start();
+
+  Progress progress = platform_reboot_select(s, l_timer);
+
+  l_timer.stop();
+  s.removeSelectable(&l_timer);
+  return progress;
+}
+
+void RebootThread::do_reboot(void) {
+  SWSS_LOG_ENTER();
+
+  swss::Select s;
+  s.addSelectable(&m_stop);
+
+  // Check if stop was requested before Selectable was setup
+  if (sigterm_requested) {
+    SWSS_LOG_ERROR("sigterm_requested was raised, exiting");
+    return;
+  }
+
+  if (m_request.method() == RebootMethod::COLD) {
+    do_cold_reboot(s);
+  } else if (m_request.method() == RebootMethod::HALT) {
+    do_halt_reboot(s);
+  } else if (m_request.method() == RebootMethod::WARM) {
+    do_warm_reboot(s);
+  } else {
+    // This shouldn't be possible. Reference check_start_preconditions()
+    SWSS_LOG_ERROR("Received unrecognized method type = %s",
+                   RebootMethod_Name(m_request.method()).c_str());
+  }
+}
+
+RebootThread::Progress RebootThread::send_dbus_reboot_request() {
+  SWSS_LOG_ENTER();
+  SWSS_LOG_NOTICE("Sending reboot request to platform");
+
+  std::string json_string;
+  gpu::Status status = gpu::MessageToJsonString(m_request, &json_string);
+  if (!status.ok()) {
+    std::string error_string = "unable to convert reboot protobuf to json: " +
+                               status.message().as_string();
+    log_error_and_set_non_retry_failure(error_string);
+    return Progress::EXIT_EARLY;
+  }
+
+  // Send the reboot request to the reboot host service via dbus.
+  DbusInterface::DbusResponse dbus_response =
+      m_dbus_interface.Reboot(json_string);
+
+  if (dbus_response.status == DbusInterface::DbusStatus::DBUS_FAIL) {
+    log_error_and_set_non_retry_failure(dbus_response.json_string);
+    return Progress::EXIT_EARLY;
+  }
+  return Progress::PROCEED;
+}
+
+void RebootThread::do_cold_reboot(swss::Select &s) {
+  SWSS_LOG_ENTER();
+  SWSS_LOG_NOTICE("Sending cold reboot request to platform");
+  if (send_dbus_reboot_request() == Progress::EXIT_EARLY) {
+    return;
+  }
+
+  // Wait for platform to reboot. If we return, reboot failed.
+  if (wait_for_platform_reboot(s) == Progress::EXIT_EARLY) {
+    return;
+  }
+
+  // We shouldn't be here. Platform reboot should've killed us.
+  log_error_and_set_non_retry_failure("platform failed to reboot");
+
+  // Set critical state
+  // m_critical_interface.report_critical_state("platform failed to reboot");
+  return;
+}
+
+void RebootThread::do_halt_reboot(swss::Select &s) {
+  SWSS_LOG_ENTER();
+  SWSS_LOG_NOTICE("Sending halt reboot request to platform");
+  if (send_dbus_reboot_request() == Progress::EXIT_EARLY) {
+    return;
+  }
+
+  // Wait for platform to halt. If we return, reboot failed.
+  // Logging, error status and monitoring for critical state are handled within.
+  if (wait_for_platform_reboot(s) == Progress::EXIT_EARLY) {
+    return;
+  }
+
+  // We shouldn't be here. Platform reboot halt should've killed us.
+  log_error_and_set_non_retry_failure("platform failed to halt the system");
+
+  return;
+}
+
+void RebootThread::do_warm_reboot(swss::Select &s) {
+  SWSS_LOG_ENTER();
+  SWSS_LOG_NOTICE("Sending warm reboot request to platform");
+  if (send_dbus_reboot_request() == Progress::EXIT_EARLY) {
+    return;
+  }
+
+  // Wait for warm reboot. If we return, reboot failed.
+  if (wait_for_platform_reboot(s) == Progress::EXIT_EARLY) {
+    return;
+  }
+
+  // We shouldn't be here. Platform reboot should've killed us.
+  log_error_and_set_non_retry_failure("failed to warm reboot");
+
+  return;
+}
+
+void RebootThread::reboot_thread(void) {
+  SWSS_LOG_ENTER();
+
+  do_reboot();
+
+  // Notify calling thread that reboot thread has exited.
+  // Calling thread will call Join(): join and set thread status to inactive.
+  m_finished.notify();
+}
+
+bool RebootThread::check_start_preconditions(const RebootRequest &request,
+                                             NotificationResponse &response) {
+  // We have to join a previous executing thread before restarting.
+  // Active is cleared in Join.
+  if (m_status.get_active()) {
+    response.json_string = "RebootThread: can't Start while active";
+    response.status = swss::StatusCode::SWSS_RC_IN_USE;
+  } else if (request.method() != RebootMethod::COLD &&
+             request.method() != RebootMethod::HALT &&
+             request.method() != RebootMethod::WARM) {
+    response.json_string = "RebootThread: Start rx'd unsupported method";
+    response.status = swss::StatusCode::SWSS_RC_INVALID_PARAM;
+  } else if (request.method() == RebootMethod::WARM) {
+    if (m_status.get_last_reboot_status() ==
+        RebootStatus_Status::RebootStatus_Status_STATUS_FAILURE) {
+      // If the last reboot failed with a non-retriable failure, don't retry.
+      // But, we will allow a cold boot to recover.
+      response.json_string =
+          "RebootThread: last WARM reboot failed with non-retriable failure";
+      response.status = swss::StatusCode::SWSS_RC_FAILED_PRECONDITION;
+    }
+  } else if (request.delay() != 0) {
+    response.json_string = "RebootThread: delayed start not supported";
+    response.status = swss::StatusCode::SWSS_RC_INVALID_PARAM;
+  }
+
+  if (response.status == swss::StatusCode::SWSS_RC_SUCCESS) {
+    return true;
+  }
+
+  SWSS_LOG_ERROR("%s", response.json_string.c_str());
+  // Log the reboot request contents.
+  gpu::Status status;
+  std::string json_request;
+  status = gpu::MessageToJsonString(request, &json_request);
+  if (status.ok()) {
+    SWSS_LOG_ERROR("check_start_preconditions: RebootRequest = %s",
+                   json_request.c_str());
+  } else {
+    SWSS_LOG_ERROR(
+        "check_start_preconditions: error calling MessageToJsonString");
+  }
+  return false;
+}
+
+NotificationResponse RebootThread::Start(const RebootRequest &request) {
+  SWSS_LOG_ENTER();
+
+  NotificationResponse response = {.status = swss::StatusCode::SWSS_RC_SUCCESS,
+                                   .json_string = ""};
+
+  // Confirm we're not running, method is supported and we're not delayed.
+  if (!check_start_preconditions(request, response)) {
+    // Errors logged in check_start_preconditions.
+    return response;
+  }
+
+  m_request = request;
+
+  // From this point errors will be reported via RebootStatusRequest.
+  m_status.set_start_status(request.method(), request.message());
+
+  try {
+    m_thread = std::thread(&RebootThread::reboot_thread, this);
+  } catch (const std::system_error &e) {
+    std::string error_string = "Exception launching reboot thread: ";
+    error_string += e.what();
+    log_error_and_set_failure_as_retriable(error_string);
+
+    // Notify calling thread that thread has finished.
+    // Calling thread MUST call Join, which will join and clear active bit.
+    m_finished.notify();
+  }
+  return response;
+}
+
+void RebootThread::log_error_and_set_non_retry_failure(
+    const std::string error_string) {
+  SWSS_LOG_ENTER();
+  SWSS_LOG_ERROR("%s", error_string.c_str());
+  m_status.set_completed_status(
+      RebootStatus_Status::RebootStatus_Status_STATUS_FAILURE, error_string);
+}
+
+void RebootThread::log_error_and_set_failure_as_retriable(
+    const std::string error_string) {
+  SWSS_LOG_ENTER();
+  SWSS_LOG_ERROR("%s", error_string.c_str());
+  m_status.set_completed_status(
+      RebootStatus_Status::RebootStatus_Status_STATUS_RETRIABLE_FAILURE,
+      error_string);
+}
+
+}  // namespace rebootbackend
diff --git a/src/sonic-sysmgr/rebootbackend/reboot_thread.h b/src/sonic-sysmgr/rebootbackend/reboot_thread.h
new file mode 100644
index 00000000000..11c1801e0ef
--- /dev/null
+++ b/src/sonic-sysmgr/rebootbackend/reboot_thread.h
@@ -0,0 +1,219 @@
+#pragma once
+
+#include <chrono>
+#include <mutex>
+#include <thread>
+
+#include "dbconnector.h"
+#include "notificationproducer.h"
+#include "reboot_common.h"
+#include "reboot_interfaces.h"
+#include "select.h"
+#include "selectableevent.h"
+#include "selectabletimer.h"
+#include "subscriberstatetable.h"
+#include "system/system.pb.h"
+
+namespace rebootbackend {
+
+// Hold/manage the contents of a RebootStatusResponse as defined
+// in system.proto
+// Thread-safe: expectation is one thread will write and multiple
+//   threads can read.
+class ThreadStatus {
+ public:
+  ThreadStatus() {
+    m_proto_status.set_active(false);
+
+    // Reason for reboot as specified in message from a RebootRequest.
+    // This is "message" in RebootRequest.
+    m_proto_status.set_reason("");
+
+    // Number of reboots since active.
+    m_proto_status.set_count(0);
+
+    // RebootMethod is type of of reboot: cold, halt, warm, fast from a
+    // RebootRequest
+    m_proto_status.set_method(gnoi::system::RebootMethod::UNKNOWN);
+
+    // Status can be UNKNOWN, SUCCESS, RETRIABLE_FAILURE or FAILURE.
+    m_proto_status.mutable_status()->set_status(
+        gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN);
+
+    // In the event of error: message is human readable error explanation.
+    m_proto_status.mutable_status()->set_message("");
+  }
+
+  void set_start_status(const gnoi::system::RebootMethod &method,
+                        const std::string &reason) {
+    m_mutex.lock();
+
+    m_proto_status.set_active(true);
+    m_proto_status.set_reason(reason);
+    m_proto_status.set_count(m_proto_status.count() + 1);
+    m_proto_status.set_method(method);
+    m_proto_status.mutable_status()->set_status(
+        gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN);
+    m_proto_status.mutable_status()->set_message("");
+
+    // set when to time reboot starts
+    std::chrono::nanoseconds ns =
+        std::chrono::system_clock::now().time_since_epoch();
+    m_proto_status.set_when(ns.count());
+
+    m_mutex.unlock();
+  }
+
+  bool get_active(void) {
+    m_mutex.lock();
+    bool ret = m_proto_status.active();
+    m_mutex.unlock();
+    return ret;
+  }
+
+  void set_completed_status(const gnoi::system::RebootStatus_Status &status,
+                            const std::string &message) {
+    m_mutex.lock();
+
+    // Status should only be updated while reboot is active
+    if (m_proto_status.active()) {
+      m_proto_status.mutable_status()->set_status(status);
+      m_proto_status.mutable_status()->set_message(message);
+    }
+
+    m_mutex.unlock();
+  }
+
+  void set_inactive(void) {
+    m_mutex.lock();
+    m_proto_status.set_active(false);
+    m_mutex.unlock();
+  }
+
+  int get_reboot_count() {
+    const std::lock_guard<std::mutex> lock(m_mutex);
+    return m_proto_status.count();
+  }
+
+  gnoi::system::RebootStatus_Status get_last_reboot_status(void) {
+    gnoi::system::RebootStatusResponse response = get_response();
+    return response.status().status();
+  }
+
+  gnoi::system::RebootStatusResponse get_response(void) {
+    m_mutex.lock();
+    // make a copy
+    gnoi::system::RebootStatusResponse lstatus = m_proto_status;
+    m_mutex.unlock();
+
+    if (lstatus.active()) {
+      // RebootStatus isn't applicable if we're active
+      lstatus.mutable_status()->set_status(
+          gnoi::system::RebootStatus_Status::
+              RebootStatus_Status_STATUS_UNKNOWN);
+      lstatus.mutable_status()->set_message("");
+    } else {
+      // When is only valid while we're active (since delayed
+      // start isn't supported). Value is set when reboot begins.
+      lstatus.set_when(0);
+    }
+
+    return lstatus;
+  }
+
+ private:
+  std::mutex m_mutex;
+  gnoi::system::RebootStatusResponse m_proto_status;
+};
+
+// RebootThread performs reboot actions leading up to a platform
+// request to reboot.
+// thread-compatible: expectation is Stop, Start and Join will be
+//   called from the same thread.
+class RebootThread {
+ public:
+  enum class Status { SUCCESS, FAILURE, KEEP_WAITING };
+  enum class Progress { PROCEED, EXIT_EARLY };
+
+  // interface: dbus reboot host service access
+  // m_finished: let launching task know thread has finished
+  RebootThread(DbusInterface &dbus_interface,
+               swss::SelectableEvent &m_finished);
+
+  NotificationResponse Start(const gnoi::system::RebootRequest &request);
+
+  // Request thread stop/exit. Only used when platform is shutting down
+  // all containers/processes.
+  void Stop(void);
+
+  // Called by launching task after notification sent to m_finished.
+  bool Join(void);
+
+  // Return Status of last reboot attempt
+  gnoi::system::RebootStatusResponse GetResponse();
+
+  // Returns true if the RebootThread has been started since the last reboot,
+  // and false otherwise.
+  bool HasRun();
+
+ private:
+  void reboot_thread(void);
+  void do_reboot(void);
+  Progress send_dbus_reboot_request();
+  void do_cold_reboot(swss::Select &s);
+  void do_halt_reboot(swss::Select &s);
+  void do_warm_reboot(swss::Select &s);
+
+  // Inner loop select handler to wait for platform reboot.
+  //   wait for timeout
+  //   wait for a stop request (sigterm)
+  // Returns:
+  //   EXIT_EARLY: an issue occurred that stops WARM
+  //   PROCEED: if reboot timeout expired
+  Progress platform_reboot_select(swss::Select &s,
+                                  swss::SelectableTimer &l_timer);
+
+  // Wait for platform to reboot while waiting for possible stop
+  // Returns:
+  //   EXIT_EARLY: an issue occurred that stops WARM
+  //   PROCEED: if reboot timeout expired
+  Progress wait_for_platform_reboot(swss::Select &s);
+
+  // Log error string, set status to RebootStatus_Status_STATUS_FAILURE
+  // Set status message to error_string.
+  void log_error_and_set_non_retry_failure(const std::string error_string);
+
+  // Log error string, set status to
+  // RebootStatus_Status_STATUS_RETRIABLE_FAILURE Set status message to
+  // error_string.
+  void log_error_and_set_failure_as_retriable(const std::string error_string);
+
+  // Request is input only.
+  // Response is ouput only.
+  // Return true if preconditions met, false otherwise.
+  bool check_start_preconditions(const gnoi::system::RebootRequest &request,
+                                 NotificationResponse &response);
+  std::thread m_thread;
+
+  // Signal m_finished to let main thread know weve completed.
+  // Main thread should call Join.
+  swss::SelectableEvent &m_finished;
+
+  // m_stop signalled by main thread on sigterm: cleanup and exit.
+  swss::SelectableEvent m_stop;
+  DbusInterface &m_dbus_interface;
+  swss::DBConnector m_db;
+  ThreadStatus m_status;
+  gnoi::system::RebootRequest m_request;
+
+  // Wait for system to reboot: allow unit test to shorten.
+  // TODO: there is a plan to make these timer values
+  //       available in CONFIG_DB
+  static constexpr uint32_t kRebootTime = 260;
+  long m_reboot_timeout = kRebootTime;
+
+  friend class RebootBETestWithoutStop;
+  friend class RebootThreadTest;
+};
+
+}  // namespace rebootbackend
diff --git a/src/sonic-sysmgr/rebootbackend/rebootbackend.cpp b/src/sonic-sysmgr/rebootbackend/rebootbackend.cpp
new file mode 100644
index 00000000000..d0962f63869
--- /dev/null
+++ b/src/sonic-sysmgr/rebootbackend/rebootbackend.cpp
@@ -0,0 +1,10 @@
+#include "interfaces.h"
+#include "reboot_interfaces.h"
+#include "rebootbe.h"
+
+int main(int argc, char** argv) {
+  HostServiceDbus dbus_interface;
+  ::rebootbackend::RebootBE rebootbe(dbus_interface);
+  rebootbe.Start();
+  return 0;
+}
diff --git a/src/sonic-sysmgr/rebootbackend/rebootbe.cpp b/src/sonic-sysmgr/rebootbackend/rebootbe.cpp
new file mode 100644
index 00000000000..5c3efcf3589
--- /dev/null
+++ b/src/sonic-sysmgr/rebootbackend/rebootbe.cpp
@@ -0,0 +1,329 @@
+#include "rebootbe.h"
+
+#include <google/protobuf/util/json_util.h>
+#include <unistd.h>
+
+#include <memory>
+#include <mutex>
+#include <string>
+
+#include "logger.h"
+#include "notificationconsumer.h"
+#include "notificationproducer.h"
+#include "reboot_common.h"
+#include "reboot_interfaces.h"
+#include "select.h"
+#include "status_code_util.h"
+#include "warm_restart.h"
+
+namespace rebootbackend {
+
+namespace gpu = ::google::protobuf::util;
+
+RebootBE::RebootBE(DbusInterface &dbus_interface)
+    : m_db("STATE_DB", 0),
+      m_RebootResponse(&m_db, REBOOT_RESPONSE_NOTIFICATION_CHANNEL),
+      m_NotificationConsumer(&m_db, REBOOT_REQUEST_NOTIFICATION_CHANNEL),
+      m_dbus(dbus_interface),
+      m_RebootThread(dbus_interface, m_RebootThreadFinished) {
+  swss::Logger::linkToDbNative("rebootbackend");
+}
+
+RebootBE::RebManagerStatus RebootBE::GetCurrentStatus() {
+  return m_CurrentStatus;
+}
+
+void RebootBE::SetCurrentStatus(RebManagerStatus newStatus) {
+  const std::lock_guard<std::mutex> lock(m_StatusMutex);
+  m_CurrentStatus = newStatus;
+}
+
+void RebootBE::Start() {
+  SWSS_LOG_ENTER();
+  SWSS_LOG_NOTICE("--- Starting rebootbackend ---");
+  swss::WarmStart::initialize("rebootbackend", "sonic-sysmgr");
+  swss::WarmStart::checkWarmStart("rebootbackend", "sonic-sysmgr",
+                                  /*incr_restore_cnt=*/false);
+
+  swss::Select s;
+  s.addSelectable(&m_NotificationConsumer);
+  s.addSelectable(&m_Done);
+  s.addSelectable(&m_RebootThreadFinished);
+
+  if (swss::WarmStart::isWarmStart()) {
+    SetCurrentStatus(RebManagerStatus::WARM_INIT_WAIT);
+  } else {
+    SWSS_LOG_NOTICE("Warm restart not enabled");
+  }
+
+  SWSS_LOG_NOTICE("RebootBE entering operational loop");
+  while (true) {
+    swss::Selectable *sel;
+    int ret;
+
+    ret = s.select(&sel);
+    if (ret == swss::Select::ERROR) {
+      SWSS_LOG_NOTICE("Error: %s!", strerror(errno));
+    } else if (ret == swss::Select::OBJECT) {
+      if (sel == &m_NotificationConsumer) {
+        DoTask(m_NotificationConsumer);
+      } else if (sel == &m_RebootThreadFinished) {
+        HandleRebootFinish();
+      } else if (sel == &m_Done) {
+        HandleDone();
+        break;
+      }
+    }
+  }
+  return;
+}
+
+void RebootBE::Stop() {
+  SWSS_LOG_ENTER();
+  m_Done.notify();
+  return;
+}
+
+bool RebootBE::RetrieveNotificationData(
+    swss::NotificationConsumer &consumer,
+    RebootBE::NotificationRequest &request) {
+  SWSS_LOG_ENTER();
+
+  request.op = "";
+  request.retString = "";
+
+  std::string data;
+  std::vector<swss::FieldValueTuple> values;
+  consumer.pop(request.op, data, values);
+
+  for (auto &fv : values) {
+    if (DATA_TUPLE_KEY == fvField(fv)) {
+      request.retString = fvValue(fv);
+      return true;
+    }
+  }
+  return false;
+}
+
+// Send a response on the Reboot_Response_Channel notification channel..
+//   Key is one of: Reboot, RebootStatus, or CancelReboot
+//   code is swss::StatusCode, hopefully SWSS_RC_SUCCESS.
+//   message is json formatted RebootResponse, RebootStatusResponse
+//     or CancelRebootResponse as defined in system.proto
+void RebootBE::SendNotificationResponse(const std::string key,
+                                        const swss::StatusCode code,
+                                        const std::string message) {
+  SWSS_LOG_ENTER();
+
+  std::vector<swss::FieldValueTuple> ret_values;
+  ret_values.push_back(swss::FieldValueTuple(DATA_TUPLE_KEY, message));
+
+  m_RebootResponse.send(key, swss::statusCodeToStr(code), ret_values);
+}
+
+NotificationResponse RebootBE::RequestRebootStatus(
+    const std::string &jsonStatusRequest) {
+  SWSS_LOG_ENTER();
+  SWSS_LOG_NOTICE("Sending reboot status request to platform");
+
+  NotificationResponse response = {.status = swss::StatusCode::SWSS_RC_SUCCESS,
+                   .json_string = "{}"};
+
+  // Send a request to the reboot host service via dbus.
+  DbusInterface::DbusResponse dbus_response =
+      m_dbus.RebootStatus(jsonStatusRequest);
+
+  if (dbus_response.status == DbusInterface::DbusStatus::DBUS_FAIL) {
+    SWSS_LOG_ERROR("Failed to send reboot status request to platform: %s",
+                    dbus_response.json_string.c_str());
+    response.status = swss::StatusCode::SWSS_RC_INTERNAL;
+    return response;
+  }
+
+  response.json_string = dbus_response.json_string;
+  SWSS_LOG_NOTICE("Received reboot status response from platform: %s",
+                  response.json_string.c_str());
+  return response;
+}
+
+NotificationResponse RebootBE::HandleRebootRequest(
+    const std::string &jsonRebootRequest) {
+  using namespace gpu;
+
+  SWSS_LOG_ENTER();
+
+  // On success an emtpy string is returned. RebootResponse in system.proto
+  // is an empty proto.
+  NotificationResponse response = {.status = swss::StatusCode::SWSS_RC_SUCCESS,
+                                   .json_string = ""};
+
+  gnoi::system::RebootRequest request;
+  Status status = gpu::JsonStringToMessage(jsonRebootRequest, &request);
+
+  if (!status.ok()) {
+    std::string error_string =
+        "unable to convert json to rebootRequest protobuf: " +
+        status.message().as_string();
+    SWSS_LOG_ERROR("%s", error_string.c_str());
+    SWSS_LOG_ERROR("json = |%s|", jsonRebootRequest.c_str());
+    response.status = swss::StatusCode::SWSS_RC_INTERNAL,
+    response.json_string = error_string;
+    return response;
+  }
+
+  if (!RebootAllowed(request.method())) {
+    response.status = swss::StatusCode::SWSS_RC_IN_USE;
+    RebManagerStatus current_status = GetCurrentStatus();
+
+    switch (current_status) {
+    	case RebManagerStatus::COLD_REBOOT_IN_PROGRESS:
+    		response.json_string =
+        	"Reboot not allowed at this time. Cold Reboot in progress";
+		break;
+    	case RebManagerStatus::HALT_REBOOT_IN_PROGRESS:
+    		response.json_string =
+        	"Reboot not allowed at this time. Halt Reboot in progress";
+		break;
+    	case RebManagerStatus::WARM_REBOOT_IN_PROGRESS:
+    		response.json_string =
+        	"Reboot not allowed at this time. Warm Reboot in progress";
+		break;
+	default:
+    		response.json_string =
+        	"Reboot not allowed at this time,current reboot status is unknown.";
+		break;
+    }
+		
+    SWSS_LOG_WARN("%s", response.json_string.c_str());
+    return response;
+  }
+
+  SWSS_LOG_NOTICE("Forwarding request to RebootThread: %s",
+                  request.DebugString().c_str());
+  response = m_RebootThread.Start(request);
+  if (response.status == swss::StatusCode::SWSS_RC_SUCCESS) {
+    if (request.method() == gnoi::system::RebootMethod::COLD) {
+      SetCurrentStatus(RebManagerStatus::COLD_REBOOT_IN_PROGRESS);
+    } else if (request.method() == gnoi::system::RebootMethod::HALT) {
+      SetCurrentStatus(RebManagerStatus::HALT_REBOOT_IN_PROGRESS);
+    } else if (request.method() == gnoi::system::RebootMethod::WARM) {
+      SetCurrentStatus(RebManagerStatus::WARM_REBOOT_IN_PROGRESS);
+    }
+  }
+  return response;
+}
+
+bool RebootBE::RebootAllowed(const gnoi::system::RebootMethod rebMethod) {
+  RebManagerStatus current_status = GetCurrentStatus();
+  switch (current_status) {
+    case RebManagerStatus::COLD_REBOOT_IN_PROGRESS:
+    case RebManagerStatus::HALT_REBOOT_IN_PROGRESS:
+    case RebManagerStatus::WARM_REBOOT_IN_PROGRESS: {
+      return false;
+    }
+    case RebManagerStatus::WARM_INIT_WAIT: {
+      return rebMethod == gnoi::system::RebootMethod::COLD;
+    }
+    case RebManagerStatus::IDLE: {
+      return true;
+    }
+    default: {
+      return true;
+    }
+  }
+}
+
+NotificationResponse RebootBE::HandleStatusRequest(
+    const std::string &jsonStatusRequest) {
+  SWSS_LOG_ENTER();
+
+  //For Halt reboot, we need to send the status request to the platform
+  if (m_CurrentStatus == RebManagerStatus::HALT_REBOOT_IN_PROGRESS) {
+    return RequestRebootStatus(jsonStatusRequest);
+  }
+
+  gnoi::system::RebootStatusResponse reboot_response =
+      m_RebootThread.GetResponse();
+
+  std::string json_reboot_response_string;
+  google::protobuf::util::Status status =
+      gpu::MessageToJsonString(reboot_response, &json_reboot_response_string);
+
+  NotificationResponse response;
+  if (status.ok()) {
+    response.status = swss::StatusCode::SWSS_RC_SUCCESS;
+    response.json_string = json_reboot_response_string;
+  } else {
+    std::string error_string =
+        "unable to convert reboot status response protobuf to json: " +
+        status.message().as_string();
+    SWSS_LOG_ERROR("%s", error_string.c_str());
+    response.status = swss::StatusCode::SWSS_RC_INTERNAL;
+    response.json_string = error_string;
+  }
+
+  return response;
+}
+
+NotificationResponse RebootBE::HandleCancelRequest(
+    const std::string &jsonCancelRequest) {
+  SWSS_LOG_ENTER();
+
+  NotificationResponse response;
+
+  // CancelReboot isn't supported: not needed until/unless delayed support
+  // is added: return unimplemented.
+  response.status = swss::StatusCode::SWSS_RC_UNIMPLEMENTED;
+  response.json_string = "Cancel reboot isn't supported";
+  SWSS_LOG_WARN("%s", response.json_string.c_str());
+  return response;
+}
+
+void RebootBE::DoTask(swss::NotificationConsumer &consumer) {
+  SWSS_LOG_ENTER();
+
+  NotificationResponse response;
+  RebootBE::NotificationRequest request;
+
+  if (!RetrieveNotificationData(consumer, request)) {
+    // Response is simple string (not json) on error.
+    response.json_string =
+        "MESSAGE not present in reboot notification request message, op = " +
+        request.op;
+    SWSS_LOG_ERROR("%s", response.json_string.c_str());
+    response.status = swss::StatusCode::SWSS_RC_INVALID_PARAM;
+  } else if (request.op == REBOOT_KEY) {
+    response = HandleRebootRequest(request.retString);
+  } else if (request.op == REBOOT_STATUS_KEY) {
+    response = HandleStatusRequest(request.retString);
+  } else if (request.op == CANCEL_REBOOT_KEY) {
+    response = HandleCancelRequest(request.retString);
+  } else {
+    // Response is simple string (not json) on error.
+    response.json_string =
+        "Unrecognized op in reboot request, op = " + request.op;
+    SWSS_LOG_ERROR("%s", response.json_string.c_str());
+    response.status = swss::StatusCode::SWSS_RC_INVALID_PARAM;
+  }
+  SendNotificationResponse(request.op, response.status, response.json_string);
+}
+
+void RebootBE::HandleRebootFinish() {
+  SWSS_LOG_ENTER();
+  SWSS_LOG_WARN(
+      "Receieved notification that reboot has finished. This probably means "
+      "something is wrong");
+  m_RebootThread.Join();
+  SetCurrentStatus(RebManagerStatus::IDLE);
+}
+
+void RebootBE::HandleDone() {
+  SWSS_LOG_INFO("RebootBE received signal to stop");
+
+  if (m_RebootThread.GetResponse().active()) {
+    m_RebootThread.Stop();
+    m_RebootThread.Join();
+  }
+}
+
+}  // namespace rebootbackend
diff --git a/src/sonic-sysmgr/rebootbackend/rebootbe.h b/src/sonic-sysmgr/rebootbackend/rebootbe.h
new file mode 100644
index 00000000000..868ad252934
--- /dev/null
+++ b/src/sonic-sysmgr/rebootbackend/rebootbe.h
@@ -0,0 +1,97 @@
+#pragma once
+#include "dbconnector.h"
+#include "notificationconsumer.h"
+#include "notificationproducer.h"
+#include "reboot_common.h"
+#include "reboot_interfaces.h"
+#include "reboot_thread.h"
+#include "selectableevent.h"
+#include "status_code_util.h"
+
+namespace rebootbackend {
+
+constexpr char REBOOT_REQUEST_NOTIFICATION_CHANNEL[] = "Reboot_Request_Channel";
+constexpr char REBOOT_RESPONSE_NOTIFICATION_CHANNEL[] =
+    "Reboot_Response_Channel";
+constexpr char REBOOT_KEY[] = "Reboot";
+constexpr char REBOOT_STATUS_KEY[] = "RebootStatus";
+constexpr char CANCEL_REBOOT_KEY[] = "CancelReboot";
+constexpr char DATA_TUPLE_KEY[] = "MESSAGE";
+
+class RebootBE {
+ public:
+  enum class RebManagerStatus {
+    WARM_INIT_WAIT,
+    IDLE,
+    COLD_REBOOT_IN_PROGRESS,
+    HALT_REBOOT_IN_PROGRESS,
+    WARM_REBOOT_IN_PROGRESS
+  };
+
+  struct NotificationRequest {
+    std::string op;
+    std::string retString;
+  };
+
+  RebootBE(DbusInterface &interface);
+
+  // To get the current reboot status.
+  RebManagerStatus GetCurrentStatus();
+
+  // Checks for the notification and takes appropriate action.
+  void Start();
+
+  // Notifies completion status of reboot.
+  void Stop();
+
+ private:
+  std::mutex m_StatusMutex;
+  RebManagerStatus m_CurrentStatus = RebManagerStatus::IDLE;
+  swss::SelectableEvent m_Done;
+
+  swss::DBConnector m_db;
+  swss::NotificationProducer m_RebootResponse;
+  swss::NotificationConsumer m_NotificationConsumer;
+
+  DbusInterface &m_dbus;
+
+  // Signalled by reboot thread when thread completes.
+  swss::SelectableEvent m_RebootThreadFinished;
+  RebootThread m_RebootThread;
+
+  void SetCurrentStatus(RebManagerStatus newStatus);
+
+  // Reboot_Request_Channel notifications should all contain {"MESSAGE" : Data}
+  // in the notification Data field.
+  // Return true if "MESSAGE" is found, false otherwise.
+  // Set message_value to the Data string if found, "" otherwise.
+  // consumer is input: this is the consumer from which we pop
+  // reboot/cancel/status requests.
+  // request is output: this the request recevied from consumer
+  bool RetrieveNotificationData(swss::NotificationConsumer &consumer,
+                                NotificationRequest &request);
+  NotificationResponse RequestRebootStatus(
+      const std::string &jsonStatusRequest);
+  NotificationResponse HandleRebootRequest(
+      const std::string &jsonRebootRequest);
+  NotificationResponse HandleStatusRequest(
+      const std::string &jsonStatusRequest);
+  NotificationResponse HandleCancelRequest(
+      const std::string &jsonCancelRequest);
+  void SendNotificationResponse(const std::string key,
+                                const swss::StatusCode code,
+                                const std::string message);
+
+  // Returns true if a reboot is allowed at this time given the current
+  // warm manager state and reboot type, and false otherwise.
+  bool RebootAllowed(const gnoi::system::RebootMethod rebMethod);
+
+  void DoTask(swss::NotificationConsumer &consumer);
+
+  void HandleRebootFinish();
+  void HandleDone();
+
+  friend class RebootBETestWithoutStop;
+};
+
+}  // namespace rebootbackend
diff --git a/src/sonic-sysmgr/tests/Makefile.am b/src/sonic-sysmgr/tests/Makefile.am
new file mode 100644
index 00000000000..37334fd0eff
--- /dev/null
+++ b/src/sonic-sysmgr/tests/Makefile.am
@@ -0,0 +1,57 @@
+AUTOMAKE_OPTIONS = subdir-objects
+INCLUDES = -I $(top_srcdir) -I $(top_srcdir)/rebootbackend -I$(top_srcdir)/build/gen -I$(top_srcdir)/build/gen/github.com/openconfig/gnoi -I ../../sonic-swss-common/common
+
+TESTS = tests tests_asan tests_tsan tests_usan
+
+noinst_PROGRAMS = tests tests_asan tests_tsan tests_usan
+
+if DEBUG
+DBGFLAGS = -ggdb -DDEBUG
+else
+DBGFLAGS = -g -DNDEBUG
+endif
+
+CFLAGS_GTEST =
+LDADD_GTEST = -lgtest -lgtest_main -lgmock -lgmock_main
+CFLAGS_COVERAGE = --coverage -fprofile-arcs -ftest-coverage
+LDADD_COVERAGE = -lgcov
+CFLAGS_ASAN = -fsanitize=address
+CFLAGS_TSAN = -fsanitize=thread
+CFLAGS_USAN = -fsanitize=undefined
+
+testsdir = /usr/include
+
+tests_HEADERS = /usr/include/gmock/gmock.h
+
+tests_SOURCES = rebootbe_test.cpp \
+                $(top_srcdir)/rebootbackend/rebootbe.cpp \
+                reboot_thread_test.cpp \
+                $(top_srcdir)/rebootbackend/reboot_thread.cpp \
+                test_main.cpp
+
+tests_CFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_GTEST) $(CFLAGS_COVERAGE) $(CFLAGS_SAI)
+tests_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_GTEST) $(CFLAGS_COVERAGE) $(CFLAGS_SAI)
+tests_LDADD = $(LDADD_GTEST) $(LDADD_COVERAGE) -lswsscommon -lpthread \
+		-lprotobuf $(top_srcdir)/build/gen/librebootgnoi.la
+
+tests_asan_SOURCES = $(tests_SOURCES)
+tests_asan_CFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_GTEST) $(CFLAGS_ASAN) $(CFLAGS_SAI)
+tests_asan_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_GTEST) $(CFLAGS_ASAN) $(CFLAGS_SAI)
+tests_asan_LDFLAGS = $(CFLAGS_ASAN)
+tests_asan_LDADD = $(LDADD_GTEST) -lswsscommon -lpthread -lprotobuf \
+			$(top_srcdir)/build/gen/librebootgnoi.la
+
+
+tests_tsan_SOURCES = $(tests_SOURCES)
+tests_tsan_CFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_GTEST) $(CFLAGS_TSAN) $(CFLAGS_SAI)
+tests_tsan_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_GTEST) $(CFLAGS_TSAN) $(CFLAGS_SAI)
+tests_tsan_LDFLAGS = $(CFLAGS_TSAN)
+tests_tsan_LDADD = $(LDADD_GTEST) -lswsscommon -lpthread -lprotobuf \
+			$(top_srcdir)/build/gen/librebootgnoi.la
+
+tests_usan_SOURCES = $(tests_SOURCES)
+tests_usan_CFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_GTEST) $(CFLAGS_USAN) $(CFLAGS_SAI)
+tests_usan_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_GTEST) $(CFLAGS_USAN) $(CFLAGS_SAI)
+tests_usan_LDFLAGS = $(CFLAGS_USAN)
+tests_usan_LDADD = $(LDADD_GTEST) -lswsscommon -lpthread -lprotobuf \
+			$(top_srcdir)/build/gen/librebootgnoi.la
diff --git a/src/sonic-sysmgr/tests/mock_reboot_interfaces.h b/src/sonic-sysmgr/tests/mock_reboot_interfaces.h
new file mode 100644
index 00000000000..f6833b42c0b
--- /dev/null
+++ b/src/sonic-sysmgr/tests/mock_reboot_interfaces.h
@@ -0,0 +1,18 @@
+#pragma once
+#include <gmock/gmock.h>
+
+#include "reboot_interfaces.h"
+#include "selectableevent.h"
+#include "system/system.pb.h"
+
+namespace rebootbackend {
+
+class MockDbusInterface : public DbusInterface {
+ public:
+  MOCK_METHOD(DbusInterface::DbusResponse, Reboot, (const std::string &),
+              (override));
+  MOCK_METHOD(DbusInterface::DbusResponse, RebootStatus, (const std::string &),
+              (override));
+};
+
+}  // namespace rebootbackend
diff --git a/src/sonic-sysmgr/tests/reboot_thread_test.cpp b/src/sonic-sysmgr/tests/reboot_thread_test.cpp
new file mode 100644
index 00000000000..7b2847c0830
--- /dev/null
+++ b/src/sonic-sysmgr/tests/reboot_thread_test.cpp
@@ -0,0 +1,391 @@
+#include "reboot_thread.h"
+
+#include <gmock/gmock.h>
+#include <google/protobuf/util/json_util.h>
+#include <gtest/gtest.h>
+#include <unistd.h>
+
+#include <string>
+#include <thread>
+#include <vector>
+
+#include "mock_reboot_interfaces.h"
+#include "reboot_common.h"
+#include "reboot_interfaces.h"
+#include "select.h"
+#include "selectableevent.h"
+#include "status_code_util.h"
+#include "system/system.pb.h"
+#include "timestamp.h"
+
+namespace rebootbackend {
+
+
+// using namespace gnoi::system;
+namespace gpu = ::google::protobuf::util;
+using Progress = ::rebootbackend::RebootThread::Progress;
+using RebootThread = ::rebootbackend::RebootThread;
+using ::testing::_;
+using ::testing::ExplainMatchResult;
+using ::testing::HasSubstr;
+using ::testing::NiceMock;
+using ::testing::Return;
+using ::testing::StrEq;
+using ::testing::StrictMock;
+
+MATCHER_P2(IsStatus, status, message, "") {
+  return (arg.status().status() == status &&
+          ExplainMatchResult(message, arg.status().message(), result_listener));
+}
+
+class RebootStatusTest : public ::testing::Test {
+ protected:
+  RebootStatusTest() : m_status() {}
+  ThreadStatus m_status;
+};
+
+TEST_F(RebootStatusTest, TestInit) {
+  gnoi::system::RebootStatusResponse response = m_status.get_response();
+
+  EXPECT_FALSE(response.active());
+  EXPECT_THAT(response.reason(), StrEq(""));
+  EXPECT_EQ(response.count(), 0);
+  EXPECT_EQ(response.method(), gnoi::system::RebootMethod::UNKNOWN);
+  EXPECT_EQ(
+      response.status().status(),
+      gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN);
+  EXPECT_THAT(response.status().message(), StrEq(""));
+
+  EXPECT_FALSE(m_status.get_active());
+}
+
+TEST_F(RebootStatusTest, TestGetStatus) {
+  std::chrono::nanoseconds curr_ns =
+      std::chrono::high_resolution_clock::now().time_since_epoch();
+
+  m_status.set_start_status(gnoi::system::RebootMethod::COLD, "reboot because");
+
+  gnoi::system::RebootStatusResponse response = m_status.get_response();
+  EXPECT_EQ(
+      response.status().status(),
+      gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN);
+
+  m_status.set_completed_status(
+      gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_SUCCESS,
+      "anything");
+
+  response = m_status.get_response();
+
+  // message should be empty while reboot is active
+  EXPECT_THAT(response.status().message(), StrEq(""));
+
+  uint64_t reboot_ns = response.when();
+  EXPECT_TRUE(reboot_ns > (uint64_t)curr_ns.count());
+
+  m_status.set_inactive();
+  response = m_status.get_response();
+  EXPECT_THAT(response.status().message(), StrEq("anything"));
+  EXPECT_EQ(
+      response.status().status(),
+      gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_SUCCESS);
+  EXPECT_EQ(0, response.when());
+}
+
+TEST_F(RebootStatusTest, TestHaltGetStatus) {
+  std::chrono::nanoseconds curr_ns =
+      std::chrono::high_resolution_clock::now().time_since_epoch();
+
+  m_status.set_start_status(gnoi::system::RebootMethod::HALT, "reboot because");
+
+  gnoi::system::RebootStatusResponse response = m_status.get_response();
+  EXPECT_EQ(
+      response.status().status(),
+      gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN);
+
+  m_status.set_completed_status(
+      gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_SUCCESS,
+      "anything");
+
+  response = m_status.get_response();
+
+  // message should be empty while reboot is active
+  EXPECT_THAT(response.status().message(), StrEq(""));
+
+  uint64_t reboot_ns = response.when();
+  EXPECT_TRUE(reboot_ns > (uint64_t)curr_ns.count());
+
+  m_status.set_inactive();
+  response = m_status.get_response();
+  EXPECT_THAT(response.status().message(), StrEq("anything"));
+  EXPECT_EQ(
+      response.status().status(),
+      gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_SUCCESS);
+  EXPECT_EQ(0, response.when());
+}
+
+TEST_F(RebootStatusTest, TestGetWarmStatus) {
+  std::chrono::nanoseconds curr_ns =
+      std::chrono::high_resolution_clock::now().time_since_epoch();
+
+  m_status.set_start_status(gnoi::system::RebootMethod::WARM, "reboot because");
+
+  gnoi::system::RebootStatusResponse response = m_status.get_response();
+  EXPECT_EQ(
+      response.status().status(),
+      gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN);
+
+  m_status.set_completed_status(
+      gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_SUCCESS,
+      "anything");
+
+  response = m_status.get_response();
+
+  // message should be empty while reboot is active
+  EXPECT_THAT(response.status().message(), StrEq(""));
+
+  uint64_t reboot_ns = response.when();
+  EXPECT_TRUE(reboot_ns > (uint64_t)curr_ns.count());
+
+  m_status.set_inactive();
+  response = m_status.get_response();
+  EXPECT_THAT(response.status().message(), StrEq("anything"));
+  EXPECT_EQ(
+      response.status().status(),
+      gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_SUCCESS);
+  EXPECT_EQ(0, response.when());
+}
+
+class RebootThreadTest : public ::testing::Test {
+ protected:
+  RebootThreadTest()
+      : m_dbus_interface(),
+        m_db("STATE_DB", 0),
+        m_config_db("CONFIG_DB", 0),
+        m_reboot_thread(m_dbus_interface, m_finished) {
+    sigterm_requested = false;
+  }
+
+  void overwrite_reboot_timeout(uint32_t timeout_seconds) {
+    m_reboot_thread.m_reboot_timeout = timeout_seconds;
+  }
+
+  gnoi::system::RebootStatusResponse get_response(void) {
+    return m_reboot_thread.m_status.get_response();
+  }
+
+  void set_start_status(const gnoi::system::RebootMethod &method,
+                        const std::string &reason) {
+    return m_reboot_thread.m_status.set_start_status(method, reason);
+  }
+
+  void set_completed_status(const gnoi::system::RebootStatus_Status &status,
+                            const std::string &message) {
+    return m_reboot_thread.m_status.set_completed_status(status, message);
+  }
+
+  void force_inactive(void) { return m_reboot_thread.m_status.set_inactive(); }
+
+  void force_active(void) { return m_reboot_thread.m_status.set_inactive(); }
+
+  void do_reboot(void) { return m_reboot_thread.do_reboot(); }
+
+  void wait_for_finish(swss::Select &s, swss::SelectableEvent &finished,
+                       long timeout_seconds) {
+    swss::Selectable *sel;
+
+    int ret = s.select(&sel, timeout_seconds * 1000);
+    EXPECT_EQ(ret, swss::Select::OBJECT);
+    EXPECT_EQ(sel, &finished);
+  }
+
+  Progress wait_for_platform_reboot(swss::Select &s) {
+    return m_reboot_thread.wait_for_platform_reboot(s);
+  }
+
+  swss::SelectableEvent &return_m_stop_reference() {
+    return m_reboot_thread.m_stop;
+  }
+
+  swss::DBConnector m_db;
+  swss::DBConnector m_config_db;
+  NiceMock<MockDbusInterface> m_dbus_interface;
+  swss::SelectableEvent m_finished;
+  RebootThread m_reboot_thread;
+};
+
+MATCHER_P2(Status, status, message, "") {
+  return (arg.status().status() == status && arg.status().message() == message);
+}
+
+TEST_F(RebootThreadTest, TestStop) {
+  EXPECT_CALL(m_dbus_interface, Reboot(_))
+      .Times(1)
+      .WillOnce(Return(DbusInterface::DbusResponse{
+          DbusInterface::DbusStatus::DBUS_SUCCESS, ""}));
+  gnoi::system::RebootRequest request;
+  request.set_method(gnoi::system::RebootMethod::COLD);
+  overwrite_reboot_timeout(2);
+  m_reboot_thread.Start(request);
+  m_reboot_thread.Stop();
+  m_reboot_thread.Join();
+  gnoi::system::RebootStatusResponse response = m_reboot_thread.GetResponse();
+  EXPECT_THAT(
+      response,
+      IsStatus(
+          gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN,
+          ""));
+}
+
+TEST_F(RebootThreadTest, TestCleanExit) {
+  EXPECT_CALL(m_dbus_interface, Reboot(_))
+      .Times(1)
+      .WillOnce(Return(DbusInterface::DbusResponse{
+          DbusInterface::DbusStatus::DBUS_SUCCESS, ""}));
+
+  overwrite_reboot_timeout(1);
+
+  swss::Select s;
+  s.addSelectable(&m_finished);
+
+  gnoi::system::RebootRequest request;
+  request.set_method(gnoi::system::RebootMethod::COLD);
+  request.set_message("time to reboot");
+  m_reboot_thread.Start(request);
+  wait_for_finish(s, m_finished, 5);
+
+  // Status should be active until we call join
+  gnoi::system::RebootStatusResponse response = get_response();
+  EXPECT_TRUE(response.active());
+  EXPECT_THAT(response.reason(), StrEq("time to reboot"));
+  EXPECT_EQ(response.count(), 1);
+
+  EXPECT_THAT(response.status().message(), StrEq(""));
+
+  m_reboot_thread.Join();
+
+  response = get_response();
+  EXPECT_FALSE(response.active());
+  EXPECT_THAT(response.status().message(), StrEq("platform failed to reboot"));
+}
+
+TEST_F(RebootThreadTest, TestJoinWithoutStart) {
+  bool ret = m_reboot_thread.Join();
+  EXPECT_FALSE(ret);
+}
+
+// Call Start a second time while first thread is still executing.
+TEST_F(RebootThreadTest, TestStartWhileRunning) {
+  EXPECT_CALL(m_dbus_interface, Reboot(_))
+      .Times(1)
+      .WillOnce(Return(DbusInterface::DbusResponse{
+          DbusInterface::DbusStatus::DBUS_SUCCESS, ""}));
+
+  overwrite_reboot_timeout(2);
+
+  gnoi::system::RebootRequest request;
+  request.set_method(gnoi::system::RebootMethod::COLD);
+  request.set_message("time to reboot");
+  m_reboot_thread.Start(request);
+
+  // First thread is still running ...
+  NotificationResponse response = m_reboot_thread.Start(request);
+  EXPECT_EQ(response.status, swss::StatusCode::SWSS_RC_IN_USE);
+  EXPECT_THAT(response.json_string,
+              StrEq("RebootThread: can't Start while active"));
+
+  bool ret = m_reboot_thread.Join();
+  EXPECT_TRUE(ret);
+}
+
+// Call Start a second time after first thread completed
+// but before first thread was joined.
+// Second start should fail.
+TEST_F(RebootThreadTest, TestStartWithoutJoin) {
+  EXPECT_CALL(m_dbus_interface, Reboot(_))
+      .Times(1)
+      .WillOnce(Return(DbusInterface::DbusResponse{
+          DbusInterface::DbusStatus::DBUS_SUCCESS, ""}));
+
+  overwrite_reboot_timeout(1);
+
+  swss::Select s;
+  s.addSelectable(&m_finished);
+
+  gnoi::system::RebootRequest request;
+  request.set_method(gnoi::system::RebootMethod::COLD);
+  request.set_message("time to reboot");
+  m_reboot_thread.Start(request);
+  wait_for_finish(s, m_finished, 3);
+
+  // First thread has stopped: we need to join before
+  // restart will succeed
+  NotificationResponse response = m_reboot_thread.Start(request);
+  EXPECT_EQ(response.status, swss::StatusCode::SWSS_RC_IN_USE);
+
+  // This should join the first start.
+  bool ret = m_reboot_thread.Join();
+  EXPECT_TRUE(ret);
+}
+
+TEST_F(RebootThreadTest, TestUnsupportedRebootType) {
+  gnoi::system::RebootRequest request;
+  request.set_method(gnoi::system::RebootMethod::POWERDOWN);
+
+  NotificationResponse response = m_reboot_thread.Start(request);
+  EXPECT_EQ(response.status, swss::StatusCode::SWSS_RC_INVALID_PARAM);
+  EXPECT_EQ(response.json_string,
+            "RebootThread: Start rx'd unsupported method");
+}
+
+TEST_F(RebootThreadTest, TestInvalidMethodfDoReboot) {
+  set_start_status(gnoi::system::RebootMethod::POWERUP, "time to reboot");
+  do_reboot();
+  force_inactive();
+  gnoi::system::RebootStatusResponse response = m_reboot_thread.GetResponse();
+  EXPECT_THAT(
+      response,
+      IsStatus(
+          gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN,
+          ""));
+}
+
+TEST_F(RebootThreadTest, TestNoWarmIfNonRetriableFailure) {
+  set_start_status(gnoi::system::RebootMethod::WARM, "time to reboot");
+  set_completed_status(
+      gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_FAILURE,
+      "failed to warm reboot");
+  force_inactive();
+
+  gnoi::system::RebootRequest request;
+  request.set_method(gnoi::system::RebootMethod::WARM);
+
+  NotificationResponse response = m_reboot_thread.Start(request);
+  EXPECT_EQ(response.status, swss::StatusCode::SWSS_RC_FAILED_PRECONDITION);
+  EXPECT_EQ(response.json_string,
+            "RebootThread: last WARM reboot failed with non-retriable failure");
+}
+
+TEST_F(RebootThreadTest, TestSigTermStartofDoReboot) {
+  sigterm_requested = true;
+  set_start_status(gnoi::system::RebootMethod::WARM, "time to reboot");
+  do_reboot();
+  force_inactive();
+  gnoi::system::RebootStatusResponse response = m_reboot_thread.GetResponse();
+  EXPECT_THAT(
+      response,
+      IsStatus(
+          gnoi::system::RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN,
+          ""));
+}
+
+TEST_F(RebootThreadTest, TestWaitForRebootPositive) {
+  overwrite_reboot_timeout(1);
+  set_start_status(gnoi::system::RebootMethod::WARM, "time to reboot");
+  swss::Select s;
+  swss::SelectableEvent m_stop;
+  s.addSelectable(&m_stop);
+  RebootThread::Progress progress = wait_for_platform_reboot(s);
+  EXPECT_EQ(progress, RebootThread::Progress::PROCEED);
+}
+
+}  // namespace rebootbackend
diff --git a/src/sonic-sysmgr/tests/rebootbe_test.cpp b/src/sonic-sysmgr/tests/rebootbe_test.cpp
new file mode 100644
index 00000000000..b2e3b944b81
--- /dev/null
+++ b/src/sonic-sysmgr/tests/rebootbe_test.cpp
@@ -0,0 +1,604 @@
+#include "rebootbe.h"
+
+#include <gmock/gmock.h>
+#include <google/protobuf/util/json_util.h>
+#include <gtest/gtest.h>
+#include <unistd.h>
+
+#include <iostream>
+#include <string>
+#include <thread>
+#include <vector>
+
+#include "mock_reboot_interfaces.h"
+#include "reboot_common.h"
+#include "select.h"
+#include "status_code_util.h"
+#include "system/system.pb.h"
+#include "timestamp.h"
+
+namespace rebootbackend {
+
+#define ONE_SECOND (1)
+#define TWO_SECONDS (2)
+#define TENTH_SECOND_MS (100)
+#define SELECT_TIMEOUT_250_MS (250)
+#define ONE_SECOND_MS (1000)
+#define TWO_SECONDS_MS (2000)
+
+namespace gpu = ::google::protobuf::util;
+using namespace gnoi::system;
+
+using ::testing::_;
+using ::testing::AllOf;
+using ::testing::AtLeast;
+using ::testing::ExplainMatchResult;
+using ::testing::HasSubstr;
+using ::testing::InSequence;
+using ::testing::Invoke;
+using ::testing::NiceMock;
+using ::testing::Return;
+using ::testing::StrEq;
+using ::testing::StrictMock;
+
+MATCHER_P2(IsStatus, status, message, "") {
+  return (arg.status().status() == status &&
+          ExplainMatchResult(message, arg.status().message(), result_listener));
+}
+
+MATCHER_P3(ActiveCountMethod, active, count, method, "") {
+  return (arg.active() == active && arg.count() == (uint32_t)count &&
+          arg.method() == method);
+}
+
+class RebootBETestWithoutStop : public ::testing::Test {
+ protected:
+  RebootBETestWithoutStop()
+      : m_dbus_interface(),
+        m_db("STATE_DB", 0),
+        m_config_db("CONFIG_DB", 0),
+        m_rebootbeRequestChannel(&m_db, REBOOT_REQUEST_NOTIFICATION_CHANNEL),
+        m_rebootbeReponseChannel(&m_db, REBOOT_RESPONSE_NOTIFICATION_CHANNEL),
+        m_rebootbe(m_dbus_interface) {
+    sigterm_requested = false;
+
+    m_s.addSelectable(&m_rebootbeReponseChannel);
+
+    // Make the tests log to stdout, instead of syslog.
+    swss::Table logging_table(&m_config_db, CFG_LOGGER_TABLE_NAME);
+    logging_table.hset("rebootbackend", swss::DAEMON_LOGOUTPUT, "STDOUT");
+    swss::Logger::restartLogger();
+  }
+  virtual ~RebootBETestWithoutStop() = default;
+
+  void force_warm_start_state(bool enabled) {
+    swss::Table enable_table(&m_db, STATE_WARM_RESTART_ENABLE_TABLE_NAME);
+    enable_table.hset("system", "enable", enabled ? "true" : "false");
+    enable_table.hset("sonic-sysmgr", "enable", enabled ? "true" : "false");
+
+    swss::Table restart_table(&m_db, STATE_WARM_RESTART_TABLE_NAME);
+    restart_table.hset("rebootbackend", "restore_count", enabled ? "0" : "");
+  }
+
+  void start_rebootbe() {
+    m_rebootbe_thread =
+        std::make_unique<std::thread>(&RebootBE::Start, &m_rebootbe);
+  }
+
+  void set_mock_defaults() {
+    ON_CALL(m_dbus_interface, Reboot(_))
+        .WillByDefault(Return(DbusInterface::DbusResponse{
+            DbusInterface::DbusStatus::DBUS_SUCCESS, ""}));
+  }
+
+  void overwrite_reboot_timeout(uint32_t timeout_seconds) {
+    m_rebootbe.m_RebootThread.m_reboot_timeout = timeout_seconds;
+  }
+
+  void send_stop_reboot_thread() { m_rebootbe.m_RebootThread.Stop(); }
+
+  void SendRebootRequest(const std::string &op, const std::string &data,
+                         const std::string &field, const std::string &value) {
+    std::vector<swss::FieldValueTuple> values;
+    values.push_back(swss::FieldValueTuple{field, value});
+
+    m_rebootbeRequestChannel.send(op, data, values);
+  }
+
+  void SendRebootViaProto(RebootRequest &request) {
+    std::string json_string;
+    gpu::MessageToJsonString(request, &json_string);
+
+    SendRebootRequest("Reboot", "StatusCode", DATA_TUPLE_KEY, json_string);
+  }
+
+  void SendRebootStatusRequest(void) {
+    SendRebootRequest("RebootStatus", "StatusCode", DATA_TUPLE_KEY,
+                      "json status request");
+  }
+
+  void start_reboot_via_rpc(
+      RebootRequest &request,
+      swss::StatusCode expected_result = swss::StatusCode::SWSS_RC_SUCCESS) {
+    SendRebootViaProto(request);
+    while (true) {
+      int ret;
+      swss::Selectable *sel;
+      ret = m_s.select(&sel, SELECT_TIMEOUT_250_MS);
+      if (ret != swss::Select::OBJECT) continue;
+      if (sel != &m_rebootbeReponseChannel) continue;
+      break;
+    }
+    std::string op, data;
+    std::vector<swss::FieldValueTuple> ret_values;
+    m_rebootbeReponseChannel.pop(op, data, ret_values);
+
+    EXPECT_THAT(op, StrEq("Reboot"));
+    EXPECT_THAT(data, StrEq(swss::statusCodeToStr(expected_result)));
+  }
+
+  gnoi::system::RebootStatusResponse do_reboot_status_rpc() {
+    SendRebootStatusRequest();
+    while (true) {
+      int ret;
+      swss::Selectable *sel;
+      ret = m_s.select(&sel, SELECT_TIMEOUT_250_MS);
+      if (ret != swss::Select::OBJECT) continue;
+      if (sel != &m_rebootbeReponseChannel) continue;
+      break;
+    }
+    std::string op, data;
+    std::vector<swss::FieldValueTuple> ret_values;
+    m_rebootbeReponseChannel.pop(op, data, ret_values);
+
+    EXPECT_THAT(op, StrEq("RebootStatus"));
+    EXPECT_EQ(data, swss::statusCodeToStr(swss::StatusCode::SWSS_RC_SUCCESS));
+
+    std::string json_response;
+    for (auto &fv : ret_values) {
+      if (DATA_TUPLE_KEY == fvField(fv)) {
+        json_response = fvValue(fv);
+      }
+    }
+    gnoi::system::RebootStatusResponse response;
+    gpu::JsonStringToMessage(json_response, &response);
+    return response;
+  }
+
+  void GetNotificationResponse(swss::NotificationConsumer &consumer,
+                               std::string &op, std::string &data,
+                               std::vector<swss::FieldValueTuple> &values) {
+    swss::Select s;
+    s.addSelectable(&consumer);
+    swss::Selectable *sel;
+    s.select(&sel, SELECT_TIMEOUT_250_MS);
+
+    consumer.pop(op, data, values);
+  }
+
+  NotificationResponse handle_reboot_request(std::string &json_request) {
+    return m_rebootbe.HandleRebootRequest(json_request);
+  }
+
+  // Mock interfaces.
+  NiceMock<MockDbusInterface> m_dbus_interface;
+
+  // DB connectors
+  swss::DBConnector m_db;
+  swss::DBConnector m_config_db;
+
+  // Reboot thread signaling.
+  swss::NotificationProducer m_rebootbeRequestChannel;
+  swss::Select m_s;
+  swss::NotificationConsumer m_rebootbeReponseChannel;
+
+  // Module under test.
+  std::unique_ptr<std::thread> m_rebootbe_thread;
+  RebootBE m_rebootbe;
+};
+
+class RebootBETest : public RebootBETestWithoutStop {
+ protected:
+  ~RebootBETest() {
+    m_rebootbe.Stop();
+    m_rebootbe_thread->join();
+  }
+};
+
+TEST_F(RebootBETest, WarmbootInProgressBlocksNewWarmboot) {
+  force_warm_start_state(true);
+
+  start_rebootbe();
+  std::this_thread::sleep_for(std::chrono::milliseconds(100));
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(),
+            RebootBE::RebManagerStatus::WARM_INIT_WAIT);
+
+  // Send a warmboot request, confirm it fails.
+  RebootRequest request;
+  request.set_method(RebootMethod::WARM);
+  start_reboot_via_rpc(request, swss::StatusCode::SWSS_RC_IN_USE);
+
+  std::this_thread::sleep_for(std::chrono::milliseconds(TENTH_SECOND_MS));
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(),
+            RebootBE::RebManagerStatus::WARM_INIT_WAIT);
+  force_warm_start_state(false);
+}
+
+TEST_F(RebootBETest, ColdbootWhileWarmbootInProgress) {
+  force_warm_start_state(true);
+  set_mock_defaults();
+
+  start_rebootbe();
+  std::this_thread::sleep_for(std::chrono::milliseconds(100));
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(),
+            RebootBE::RebManagerStatus::WARM_INIT_WAIT);
+
+  // Send a coldboot request, confirm it starts.
+  RebootRequest request;
+  request.set_method(RebootMethod::COLD);
+  start_reboot_via_rpc(request);
+
+  std::this_thread::sleep_for(std::chrono::milliseconds(TENTH_SECOND_MS));
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(),
+            RebootBE::RebManagerStatus::COLD_REBOOT_IN_PROGRESS);
+
+  // Cleanup without going through the whole reboot.
+  send_stop_reboot_thread();
+  force_warm_start_state(false);
+}
+
+// Test fixture to skip through the startup sequence into the main loop.
+// Param indicates if RebootBE should be initialized into a state where the
+// system came up in warmboot.
+class RebootBEAutoStartTest : public RebootBETest,
+                              public ::testing::WithParamInterface<bool> {
+ protected:
+  RebootBEAutoStartTest() {
+    start_rebootbe();
+
+    std::this_thread::sleep_for(std::chrono::milliseconds(ONE_SECOND_MS));
+    EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+  }
+};
+
+// Normal operation testing.
+TEST_P(RebootBEAutoStartTest, NonExistentMessage) {
+  swss::NotificationConsumer consumer(&m_db,
+                                      REBOOT_RESPONSE_NOTIFICATION_CHANNEL);
+
+  // No "MESSAGE" in field/values
+  SendRebootRequest("Reboot", "StatusCode", "field1", "field1_value");
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+
+  std::string op, data;
+  std::vector<swss::FieldValueTuple> ret_values;
+  GetNotificationResponse(consumer, op, data, ret_values);
+
+  EXPECT_THAT(op, StrEq("Reboot"));
+  EXPECT_THAT(
+      data,
+      StrEq(swss::statusCodeToStr(swss::StatusCode::SWSS_RC_INVALID_PARAM)));
+}
+
+TEST_P(RebootBEAutoStartTest, TestCancelReboot) {
+  swss::NotificationConsumer consumer(&m_db,
+                                      REBOOT_RESPONSE_NOTIFICATION_CHANNEL);
+
+  SendRebootRequest("CancelReboot", "StatusCode", DATA_TUPLE_KEY,
+                    "json cancelreboot request");
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+
+  std::string op, data;
+  std::vector<swss::FieldValueTuple> ret_values;
+  GetNotificationResponse(consumer, op, data, ret_values);
+
+  EXPECT_THAT(op, StrEq("CancelReboot"));
+  EXPECT_THAT(
+      data,
+      StrEq(swss::statusCodeToStr(swss::StatusCode::SWSS_RC_UNIMPLEMENTED)));
+}
+
+TEST_P(RebootBEAutoStartTest, TestUnrecognizedOP) {
+  swss::NotificationConsumer consumer(&m_db,
+                                      REBOOT_RESPONSE_NOTIFICATION_CHANNEL);
+
+  SendRebootRequest("NonOp", "StatusCode", DATA_TUPLE_KEY, "invalid op code");
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+
+  std::string op, data;
+  std::vector<swss::FieldValueTuple> ret_values;
+  GetNotificationResponse(consumer, op, data, ret_values);
+
+  EXPECT_THAT(op, StrEq("NonOp"));
+  EXPECT_THAT(
+      data,
+      StrEq(swss::statusCodeToStr(swss::StatusCode::SWSS_RC_INVALID_PARAM)));
+}
+
+TEST_P(RebootBEAutoStartTest, TestColdRebootDbusToCompletion) {
+  DbusInterface::DbusResponse dbus_response{
+      DbusInterface::DbusStatus::DBUS_SUCCESS, ""};
+  EXPECT_CALL(m_dbus_interface, Reboot(_))
+      .Times(3)
+      .WillRepeatedly(Return(dbus_response));
+
+  overwrite_reboot_timeout(1);
+  RebootRequest request;
+  request.set_method(RebootMethod::COLD);
+  start_reboot_via_rpc(request);
+
+  std::this_thread::sleep_for(std::chrono::milliseconds(TENTH_SECOND_MS));
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(),
+            RebootBE::RebManagerStatus::COLD_REBOOT_IN_PROGRESS);
+  sleep(TWO_SECONDS);
+
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+  gnoi::system::RebootStatusResponse response = do_reboot_status_rpc();
+  EXPECT_THAT(response, ActiveCountMethod(false, 1, RebootMethod::COLD));
+  EXPECT_THAT(response,
+              IsStatus(RebootStatus_Status::RebootStatus_Status_STATUS_FAILURE,
+                       "platform failed to reboot"));
+
+  start_reboot_via_rpc(request);
+  sleep(TWO_SECONDS);
+
+  start_reboot_via_rpc(request);
+  sleep(TWO_SECONDS);
+
+  response = do_reboot_status_rpc();
+  // Verifiy count is 3 after three reboot attempts.
+  EXPECT_THAT(response, ActiveCountMethod(false, 3, RebootMethod::COLD));
+  EXPECT_THAT(response,
+              IsStatus(RebootStatus_Status::RebootStatus_Status_STATUS_FAILURE,
+                       "platform failed to reboot"));
+}
+
+TEST_P(RebootBEAutoStartTest, TestWarmRebootDbusToCompletion) {
+  DbusInterface::DbusResponse dbus_response{
+      DbusInterface::DbusStatus::DBUS_SUCCESS, ""};
+  EXPECT_CALL(m_dbus_interface, Reboot(_))
+      .Times(1)
+      .WillRepeatedly(Return(dbus_response));
+
+  overwrite_reboot_timeout(1);
+  RebootRequest request;
+  request.set_method(RebootMethod::WARM);
+  start_reboot_via_rpc(request);
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(),
+            RebootBE::RebManagerStatus::WARM_REBOOT_IN_PROGRESS);
+
+  sleep(TWO_SECONDS);
+
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+  gnoi::system::RebootStatusResponse response = do_reboot_status_rpc();
+  EXPECT_THAT(response, ActiveCountMethod(false, 1, RebootMethod::WARM));
+  EXPECT_THAT(response,
+              IsStatus(RebootStatus_Status::RebootStatus_Status_STATUS_FAILURE,
+                       "failed to warm reboot"));
+}
+
+TEST_P(RebootBEAutoStartTest, TestColdBootSigterm) {
+  sigterm_requested = true;
+  set_mock_defaults();
+  overwrite_reboot_timeout(1);
+
+  RebootRequest request;
+  request.set_method(RebootMethod::COLD);
+  start_reboot_via_rpc(request);
+
+  sleep(ONE_SECOND);
+
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+  gnoi::system::RebootStatusResponse second_resp = do_reboot_status_rpc();
+  EXPECT_THAT(second_resp, ActiveCountMethod(false, 1, RebootMethod::COLD));
+  EXPECT_THAT(
+      second_resp,
+      IsStatus(RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN, ""));
+}
+
+TEST_P(RebootBEAutoStartTest, TestWarmBootSigterm) {
+  sigterm_requested = true;
+  set_mock_defaults();
+  overwrite_reboot_timeout(1);
+
+  RebootRequest request;
+  request.set_method(RebootMethod::WARM);
+  start_reboot_via_rpc(request);
+
+  sleep(ONE_SECOND);
+
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+  gnoi::system::RebootStatusResponse second_resp = do_reboot_status_rpc();
+  EXPECT_THAT(second_resp, ActiveCountMethod(false, 1, RebootMethod::WARM));
+  EXPECT_THAT(
+      second_resp,
+      IsStatus(RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN, ""));
+}
+
+TEST_P(RebootBEAutoStartTest, TestColdBootDbusError) {
+  // Return FAIL from dbus reboot call.
+  DbusInterface::DbusResponse dbus_response{
+      DbusInterface::DbusStatus::DBUS_FAIL, "dbus reboot failed"};
+  EXPECT_CALL(m_dbus_interface, Reboot(_))
+      .Times(1)
+      .WillOnce(Return(dbus_response));
+
+  RebootRequest request;
+  request.set_method(RebootMethod::COLD);
+  start_reboot_via_rpc(request);
+
+  sleep(TWO_SECONDS);
+
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+  gnoi::system::RebootStatusResponse second_resp = do_reboot_status_rpc();
+  EXPECT_THAT(second_resp, ActiveCountMethod(false, 1, RebootMethod::COLD));
+  EXPECT_THAT(second_resp,
+              IsStatus(RebootStatus_Status::RebootStatus_Status_STATUS_FAILURE,
+                       "dbus reboot failed"));
+}
+
+TEST_P(RebootBEAutoStartTest, TestWarmBootDbusError) {
+  // Return FAIL from dbus reboot call.
+  DbusInterface::DbusResponse dbus_response{
+      DbusInterface::DbusStatus::DBUS_FAIL, "dbus reboot failed"};
+  EXPECT_CALL(m_dbus_interface, Reboot(_))
+      .Times(1)
+      .WillOnce(Return(dbus_response));
+
+  RebootRequest request;
+  request.set_method(RebootMethod::WARM);
+  start_reboot_via_rpc(request);
+
+  sleep(TWO_SECONDS);
+
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+  gnoi::system::RebootStatusResponse second_resp = do_reboot_status_rpc();
+  EXPECT_THAT(second_resp, ActiveCountMethod(false, 1, RebootMethod::WARM));
+  EXPECT_THAT(second_resp,
+              IsStatus(RebootStatus_Status::RebootStatus_Status_STATUS_FAILURE,
+                       "dbus reboot failed"));
+}
+
+TEST_P(RebootBEAutoStartTest, TestStopDuringColdBoot) {
+  set_mock_defaults();
+
+  RebootRequest request;
+  request.set_method(RebootMethod::COLD);
+  start_reboot_via_rpc(request);
+  std::this_thread::sleep_for(std::chrono::milliseconds(TENTH_SECOND_MS));
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(),
+            RebootBE::RebManagerStatus::COLD_REBOOT_IN_PROGRESS);
+
+  send_stop_reboot_thread();
+  std::this_thread::sleep_for(std::chrono::milliseconds(TENTH_SECOND_MS));
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+
+  gnoi::system::RebootStatusResponse response = do_reboot_status_rpc();
+  EXPECT_THAT(response, ActiveCountMethod(false, 1, RebootMethod::COLD));
+  EXPECT_THAT(
+      response,
+      IsStatus(RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN, ""));
+}
+
+TEST_P(RebootBEAutoStartTest, TestStopDuringWarmBoot) {
+  set_mock_defaults();
+
+  RebootRequest request;
+  request.set_method(RebootMethod::WARM);
+  start_reboot_via_rpc(request);
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(),
+            RebootBE::RebManagerStatus::WARM_REBOOT_IN_PROGRESS);
+
+  send_stop_reboot_thread();
+  std::this_thread::sleep_for(std::chrono::milliseconds(TENTH_SECOND_MS));
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+
+  gnoi::system::RebootStatusResponse response = do_reboot_status_rpc();
+  EXPECT_THAT(response, ActiveCountMethod(false, 1, RebootMethod::WARM));
+  EXPECT_THAT(
+      response,
+      IsStatus(RebootStatus_Status::RebootStatus_Status_STATUS_UNKNOWN, ""));
+}
+
+TEST_P(RebootBEAutoStartTest, TestInvalidJsonRebootRequest) {
+  std::string json_request = "abcd";
+  NotificationResponse response = handle_reboot_request(json_request);
+  EXPECT_EQ(swss::StatusCode::SWSS_RC_INTERNAL, response.status);
+}
+
+TEST_P(RebootBEAutoStartTest, TestWarmFailureFollowedByColdBoot) {
+  DbusInterface::DbusResponse dbus_response{
+      DbusInterface::DbusStatus::DBUS_SUCCESS, ""};
+  overwrite_reboot_timeout(1);
+
+  RebootRequest request;
+  request.set_method(RebootMethod::WARM);
+  start_reboot_via_rpc(request);
+
+  std::this_thread::sleep_for(std::chrono::milliseconds(TENTH_SECOND_MS));
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(),
+            RebootBE::RebManagerStatus::WARM_REBOOT_IN_PROGRESS);
+
+  std::this_thread::sleep_for(std::chrono::milliseconds(TWO_SECONDS_MS));
+  gnoi::system::RebootStatusResponse response = do_reboot_status_rpc();
+  EXPECT_THAT(response, ActiveCountMethod(false, 1, RebootMethod::WARM));
+
+  request.set_method(RebootMethod::COLD);
+  start_reboot_via_rpc(request);
+
+  // We have to wait for the 1 second reboot Timeout
+  std::this_thread::sleep_for(std::chrono::milliseconds(TWO_SECONDS_MS));
+
+  EXPECT_EQ(m_rebootbe.GetCurrentStatus(), RebootBE::RebManagerStatus::IDLE);
+  response = do_reboot_status_rpc();
+  EXPECT_THAT(response, ActiveCountMethod(false, 2, RebootMethod::COLD));
+  EXPECT_THAT(response,
+              IsStatus(RebootStatus_Status::RebootStatus_Status_STATUS_FAILURE,
+                       "platform failed to reboot"));
+}
+
+TEST_P(RebootBEAutoStartTest, WarmbootInProgressBlocksNewWarmboot) {
+  RebootRequest request;
+  request.set_method(RebootMethod::WARM);
+  std::string json_request = "{\"method\":\"WARM\"}";
+  NotificationResponse response1 = handle_reboot_request(json_request);
+  NotificationResponse response2 = handle_reboot_request(json_request);
+  EXPECT_THAT(response2.json_string.c_str(), StrEq("Reboot not allowed at this time. Warm Reboot in progress"));
+}
+
+TEST_P(RebootBEAutoStartTest, ColdbootInProgressBlocksNewColdboot) {
+  RebootRequest request;
+  request.set_method(RebootMethod::COLD);
+  std::string json_request = "{\"method\":\"COLD\"}";
+  NotificationResponse response1 = handle_reboot_request(json_request);
+  NotificationResponse response2 = handle_reboot_request(json_request);
+  EXPECT_THAT(response2.json_string.c_str(), StrEq("Reboot not allowed at this time. Cold Reboot in progress"));
+}
+
+TEST_P(RebootBEAutoStartTest, HaltbootInProgressBlocksNewHaltboot) {
+  RebootRequest request;
+  request.set_method(RebootMethod::HALT);
+  std::string json_request = "{\"method\":\"HALT\"}";
+  NotificationResponse response1 = handle_reboot_request(json_request);
+  NotificationResponse response2 = handle_reboot_request(json_request);
+  EXPECT_THAT(response2.json_string.c_str(), StrEq("Reboot not allowed at this time. Halt Reboot in progress"));
+}
+
+TEST_P(RebootBEAutoStartTest, WarmbootInProgressBlocksNewColdboot) {
+  RebootRequest request1, request2;
+  request1.set_method(RebootMethod::WARM);
+  std::string json_request1 = "{\"method\":\"WARM\"}";
+  NotificationResponse response1 = handle_reboot_request(json_request1);
+  request1.set_method(RebootMethod::COLD);
+  std::string json_request2 = "{\"method\":\"COLD\"}";
+  NotificationResponse response2 = handle_reboot_request(json_request2);
+  EXPECT_THAT(response2.json_string.c_str(), StrEq("Reboot not allowed at this time. Warm Reboot in progress"));
+}
+
+TEST_P(RebootBEAutoStartTest, ColdbootInProgressBlocksNewWarmboot) {
+  RebootRequest request1, request2;
+  request1.set_method(RebootMethod::COLD);
+  std::string json_request1 = "{\"method\":\"COLD\"}";
+  NotificationResponse response1 = handle_reboot_request(json_request1);
+  request1.set_method(RebootMethod::WARM);
+  std::string json_request2 = "{\"method\":\"WARM\"}";
+  NotificationResponse response2 = handle_reboot_request(json_request2);
+  EXPECT_THAT(response2.json_string.c_str(), StrEq("Reboot not allowed at this time. Cold Reboot in progress"));
+}
+
+
+TEST_P(RebootBEAutoStartTest, ColdbootInProgressBlocksNewHaltboot) {
+  RebootRequest request1, request2;
+  request1.set_method(RebootMethod::COLD);
+  std::string json_request1 = "{\"method\":\"COLD\"}";
+  NotificationResponse response1 = handle_reboot_request(json_request1);
+  request1.set_method(RebootMethod::WARM);
+  std::string json_request2 = "{\"method\":\"HALT\"}";
+  NotificationResponse response2 = handle_reboot_request(json_request2);
+  EXPECT_THAT(response2.json_string.c_str(), StrEq("Reboot not allowed at this time. Cold Reboot in progress"));
+}
+
+INSTANTIATE_TEST_SUITE_P(TestWithStartupWarmbootEnabledState,
+                         RebootBEAutoStartTest, testing::Values(true, false));
+
+}  // namespace rebootbackend
diff --git a/src/sonic-sysmgr/tests/test_main.cpp b/src/sonic-sysmgr/tests/test_main.cpp
new file mode 100644
index 00000000000..693d88f181e
--- /dev/null
+++ b/src/sonic-sysmgr/tests/test_main.cpp
@@ -0,0 +1,7 @@
+
+#include "gtest/gtest.h"
+
+int main(int argc, char* argv[]) {
+  testing::InitGoogleTest(&argc, argv);
+  return RUN_ALL_TESTS();
+}
\ No newline at end of file
diff --git a/src/sonic-utilities b/src/sonic-utilities
index 940ed0ddd6a..1203b0b1a8e 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 940ed0ddd6a2a26308bf4d6d7ddf335ed4c198bf
+Subproject commit 1203b0b1a8efe65ab4975f927ef77af674055806
diff --git a/src/sonic-yang-mgmt/setup.py b/src/sonic-yang-mgmt/setup.py
index 87617d93289..989abc124cf 100644
--- a/src/sonic-yang-mgmt/setup.py
+++ b/src/sonic-yang-mgmt/setup.py
@@ -30,6 +30,7 @@
     install_requires = [
         'xmltodict==0.12.0',
         'ijson==3.2.3',
+        'jsonpointer>=1.9',
         'jsondiff>=1.2.0',
         'tabulate==0.9.0'
     ],
@@ -46,7 +47,7 @@
     include_package_data=True,
     keywords='sonic-yang-mgmt',
     name='sonic-yang-mgmt',
-    py_modules=['sonic_yang', 'sonic_yang_ext'],
+    py_modules=['sonic_yang', 'sonic_yang_ext', 'sonic_yang_path'],
     packages=find_packages(),
     version='1.0',
     zip_safe=False,
diff --git a/src/sonic-yang-mgmt/sonic_yang.py b/src/sonic-yang-mgmt/sonic_yang.py
index 9af9217ad34..0cb8bb6414d 100644
--- a/src/sonic-yang-mgmt/sonic_yang.py
+++ b/src/sonic-yang-mgmt/sonic_yang.py
@@ -4,20 +4,20 @@
 from json import dump
 from glob import glob
 from sonic_yang_ext import SonicYangExtMixin, SonicYangException
+from sonic_yang_path import SonicYangPathMixin
 
 """
 Yang schema and data tree python APIs based on libyang python
 Here, sonic_yang_ext_mixin extends funtionality of sonic_yang,
 i.e. it is mixin not parent class.
 """
-class SonicYang(SonicYangExtMixin):
+class SonicYang(SonicYangExtMixin, SonicYangPathMixin):
 
     def __init__(self, yang_dir, debug=False, print_log_enabled=True, sonic_yang_options=0):
         self.yang_dir = yang_dir
         self.ctx = None
         self.module = None
         self.root = None
-
         # logging vars
         self.SYSLOG_IDENTIFIER = "sonic_yang"
         self.DEBUG = debug
@@ -44,6 +44,12 @@ def __init__(self, yang_dir, debug=False, print_log_enabled=True, sonic_yang_opt
         # below dict will store preProcessed yang objects, which may be needed by
         # all yang modules, such as grouping.
         self.preProcessedYang = dict()
+        # Lazy caching for backlinks lookups
+        self.backlinkCache = dict()
+        # Lazy caching for must counts
+        self.mustCache = dict()
+        # Lazy caching for configdb to xpath
+        self.configPathCache = dict()
         # element path for CONFIG DB. An example for this list could be:
         # ['PORT', 'Ethernet0', 'speed']
         self.elementPath = []
@@ -492,13 +498,89 @@ def _find_data_nodes(self, data_xpath):
                 list.append(data_set.path())
             return list
 
+    """
+    find_schema_must_count():  find the number of must clauses for the schema path
+    input:    schema_xpath     of the schema node
+              match_ancestors  whether or not to treat the specified path as
+                               an ancestor rather than a full path.  If set to
+                               true, will add recursively.
+    returns:  - count of must statements encountered
+              - Exception if schema node not found
+    """
+    def find_schema_must_count(self, schema_xpath, match_ancestors: bool=False):
+        # See if we have this cached
+        key = ( schema_xpath, match_ancestors )
+        result = self.mustCache.get(key)
+        if result is not None:
+            return result
+
+        try:
+            schema_node = self._find_schema_node(schema_xpath)
+        except Exception as e:
+            self.sysLog(msg="Cound not find the schema node from xpath: " + str(schema_xpath), debug=syslog.LOG_ERR, doPrint=True)
+            self.fail(e)
+            return 0
+
+        # If not doing recursion, just return the result.  This will internally
+        # cache the child so no need to update the cache ourselves
+        if not match_ancestors:
+            return self.__find_schema_must_count_only(schema_node)
+
+        count = 0
+        # Recurse first
+        for elem in schema_node.tree_dfs():
+            count += self.__find_schema_must_count_only(elem)
+
+        # Pull self
+        count += self.__find_schema_must_count_only(schema_node)
+
+        # Save in cache
+        self.mustCache[key] = count
+
+        return count
+
+    def __find_schema_must_count_only(self, schema_node):
+        # Check non-recursive cache
+        key = ( schema_node.path(), False )
+        result = self.mustCache.get(key)
+        if result is not None:
+            return result
+
+        count = 0
+        if schema_node.nodetype() == ly.LYS_CONTAINER:
+            schema_leaf = ly.Schema_Node_Container(schema_node)
+            if schema_leaf.must() is not None:
+                count += 1
+        elif schema_node.nodetype() == ly.LYS_LEAF:
+            schema_leaf = ly.Schema_Node_Leaf(schema_node)
+            count += schema_leaf.must_size()
+        elif schema_node.nodetype() == ly.LYS_LEAFLIST:
+            schema_leaf = ly.Schema_Node_Leaflist(schema_node)
+            count += schema_leaf.must_size()
+        elif schema_node.nodetype() == ly.LYS_LIST:
+            schema_leaf = ly.Schema_Node_List(schema_node)
+            count += schema_leaf.must_size()
+
+        # Cache result
+        self.mustCache[key] = count
+        return count
+
     """
     find_schema_dependencies():  find the schema dependencies from schema xpath
-    input:    schema_xpath of the schema node
+    input:    schema_xpath     of the schema node
+              match_ancestors  whether or not to treat the specified path as
+                               an ancestor rather than a full path. If set to
+                               true, will add recursively.
     returns:  - list of xpath of the dependencies
               - Exception if schema node not found
     """
-    def _find_schema_dependencies(self, schema_xpath):
+    def find_schema_dependencies(self, schema_xpath, match_ancestors: bool=False):
+        # See if we have this cached
+        key = ( schema_xpath, match_ancestors )
+        result = self.backlinkCache.get(key)
+        if result is not None:
+            return result
+
         ref_list = []
         try:
             schema_node = self._find_schema_node(schema_xpath)
@@ -507,12 +589,46 @@ def _find_schema_dependencies(self, schema_xpath):
             self.fail(e)
             return ref_list
 
-        schema_node = ly.Schema_Node_Leaf(schema_node)
-        backlinks = schema_node.backlinks()
-        if backlinks.number() > 0:
-            for link in backlinks.schema():
-                self.sysLog(msg="backlink schema: {}".format(link.path()), doPrint=True)
-                ref_list.append(link.path())
+        # If not doing recursion, just return the result.  This will internally
+        # cache the child so no need to update the cache ourselves
+        if not match_ancestors:
+            return self.__find_schema_dependencies_only(schema_node)
+
+        # Recurse first
+        for elem in schema_node.tree_dfs():
+            ref_list.extend(self.__find_schema_dependencies_only(elem))
+
+        # Pull self
+        ref_list.extend(self.__find_schema_dependencies_only(schema_node))
+
+        # Save in cache
+        self.backlinkCache[key] = ref_list
+
+        return ref_list
+
+    def __find_schema_dependencies_only(self, schema_node):
+        # Check non-recursive cache
+        key = ( schema_node.path(), False )
+        result = self.backlinkCache.get(key)
+        if result is not None:
+            return result
+
+        # New lookup
+        ref_list = []
+        schema_leaf = None
+        if schema_node.nodetype() == ly.LYS_LEAF:
+            schema_leaf = ly.Schema_Node_Leaf(schema_node)
+        elif schema_node.nodetype() == ly.LYS_LEAFLIST:
+            schema_leaf = ly.Schema_Node_Leaflist(schema_node)
+
+        if schema_leaf is not None:
+            backlinks = schema_leaf.backlinks()
+            if backlinks is not None and backlinks.number() > 0:
+                for link in backlinks.schema():
+                    ref_list.append(link.path())
+
+        # Cache result
+        self.backlinkCache[key] = ref_list
         return ref_list
 
     """
@@ -533,11 +649,10 @@ def find_data_dependencies(self, data_xpath):
         try:
             value = str(self._find_data_node_value(data_xpath))
 
-            schema_node = ly.Schema_Node_Leaf(data_node.schema())
-            backlinks = schema_node.backlinks()
-            if backlinks is not None and backlinks.number() > 0:
-                for link in backlinks.schema():
-                     node_set = node.find_path(link.path())
+            backlinks = self.find_schema_dependencies(data_node.schema().path(), False)
+            if backlinks is not None and len(backlinks) > 0:
+                for link in backlinks:
+                     node_set = node.find_path(link)
                      for data_set in node_set.data():
                           data_set.schema()
                           casted = data_set.subtype()
diff --git a/src/sonic-yang-mgmt/sonic_yang_ext.py b/src/sonic-yang-mgmt/sonic_yang_ext.py
index bb816326598..6214e6885bd 100644
--- a/src/sonic-yang-mgmt/sonic_yang_ext.py
+++ b/src/sonic-yang-mgmt/sonic_yang_ext.py
@@ -7,6 +7,8 @@
 from json import dump, dumps, loads
 from xmltodict import parse
 from glob import glob
+import copy
+from sonic_yang_path import SonicYangPathMixin
 
 Type_1_list_maps_model = [
     'DSCP_TO_TC_MAP_LIST',
@@ -42,7 +44,7 @@ class SonicYangException(Exception):
     pass
 
 # class sonic_yang methods, use mixin to extend sonic_yang
-class SonicYangExtMixin:
+class SonicYangExtMixin(SonicYangPathMixin):
 
     """
     load all YANG models, create JSON of yang models. (Public function)
@@ -221,15 +223,21 @@ def _getModuleTLCcontainer(self, table):
     """
     Crop config as per yang models,
     This Function crops from config only those TABLEs, for which yang models is
-    provided. The Tables without YANG models are stored in
-    self.tablesWithOutYangModels.
+    provided. If there are tables to modify it will perform a deepcopy of the
+    original structure in case anyone is holding a reference.
+    The Tables without YANG models are stored in self.tablesWithOutYangModels.
     """
     def _cropConfigDB(self, croppedFile=None):
-
+        isCopy = False
         tables = list(self.jIn.keys())
         for table in tables:
             if table not in self.confDbYangMap:
-                # store in tablesWithOutYang
+                # Make sure we duplicate if we're modifying so if a caller
+                # has a reference we don't clobber it.
+                if not isCopy:
+                    isCopy = True
+                    self.jIn = copy.deepcopy(self.jIn)
+                # store in tablesWithOutYang and purge
                 self.tablesWithOutYang[table] = self.jIn[table]
                 del self.jIn[table]
 
@@ -1153,7 +1161,7 @@ def _findXpathList(self, xpath, list, keys):
 
     """
     load_data: load Config DB, crop, xlate and create data tree from it. (Public)
-    input:    data
+    input:    configdbJson - will NOT be modified
               debug Flag
     returns:  True - success   False - failed
     """
@@ -1168,7 +1176,8 @@ def loadData(self, configdbJson, debug=False):
           # reset xlate and tablesWithOutYang
           self.xlateJson = dict()
           self.tablesWithOutYang = dict()
-          # self.jIn will be cropped
+          # self.jIn will be cropped if needed, however it will duplicate the object
+          # so the original is not modified
           self._cropConfigDB()
           # xlated result will be in self.xlateJson
           self._xlateConfigDB(xlateFile=xlateFile)
diff --git a/src/sonic-yang-mgmt/sonic_yang_path.py b/src/sonic-yang-mgmt/sonic_yang_path.py
new file mode 100644
index 00000000000..5cf672326d6
--- /dev/null
+++ b/src/sonic-yang-mgmt/sonic_yang_path.py
@@ -0,0 +1,573 @@
+# This script is used as extension of sonic_yang class. It has methods of
+# class sonic_yang. A separate file is used to avoid a single large file.
+
+from __future__ import print_function
+from json import dump, dumps, loads
+import sonic_yang_ext
+import re
+from jsonpointer import JsonPointer
+from typing import List
+
+# class sonic_yang methods related to path handling, use mixin to extend sonic_yang
+class SonicYangPathMixin:
+    """
+    All xpath operations in this class are only relevent to ConfigDb and the conversion to YANG xpath.
+    It is not meant to support all the xpath functionalities, just the ones relevent to ConfigDb/YANG.
+    """
+    @staticmethod
+    def configdb_path_split(configdb_path: str):
+        if configdb_path is None or configdb_path == "" or configdb_path == "/":
+            return []
+        return JsonPointer(configdb_path).parts
+
+    @staticmethod
+    def configdb_path_join(configdb_tokens: List[str]):
+        return JsonPointer.from_parts(configdb_tokens).path
+
+    @staticmethod
+    def xpath_join(xpath_tokens: List[str], schema_xpath: bool) -> str:
+        if not schema_xpath:
+            return "/" + "/".join(xpath_tokens)
+
+        # Schema XPath in libyang v1 wants each token prefixed with the module name.
+        # The first token should have this, use that to prefix the rest.
+        module_name = xpath_tokens[0].split(":")[0]
+
+        return "/" + ("/" + module_name + ":").join(xpath_tokens)
+
+    @staticmethod
+    def xpath_split(xpath: str) -> List[str]:
+        """
+        Splits the given xpath into tokens by '/'.
+
+        Example:
+          xpath: /sonic-vlan:sonic-vlan/VLAN_MEMBER/VLAN_MEMBER_LIST[name='Vlan1000'][port='Ethernet8']/tagging_mode
+          tokens: sonic-vlan:sonic-vlan, VLAN_MEMBER, VLAN_MEMBER_LIST[name='Vlan1000'][port='Ethernet8'], tagging_mode
+        """
+        if xpath == "":
+            raise ValueError("xpath cannot be empty")
+
+        if xpath == "/":
+            return []
+
+        idx = 0
+        tokens = []
+        while idx < len(xpath):
+            end = SonicYangPathMixin.__get_xpath_token_end(idx+1, xpath)
+            token = xpath[idx+1:end]
+            tokens.append(token)
+            idx = end
+
+        return tokens
+
+    def configdb_path_to_xpath(self, configdb_path: str, schema_xpath: bool=False, configdb: dict=None) -> str:
+        """
+        Converts the given ConfigDB path to a Yang data module xpath.
+        Parameters:
+          - configdb_path: The JSON path in the form taken by Config DB,
+            e.g. /VLAN_MEMBER/Vlan1000|Ethernet8/tagging_mode
+          - schema_xpath: Whether or not to output the xpath in schema form or data form.  Schema form will not use
+            the data in the path, only table/list names.  Defaults to false, so will emit data xpaths.
+          - configdb: If provided, and schema_xpath is false, will also emit the xpath token for a specific leaf-list
+            entry based on the value within the configdb itself.  This is provided in the parsed configdb format, such
+            as returned from json.loads().
+                           
+        Example:
+          1. configdb_path: /VLAN_MEMBER/Vlan1000|Ethernet8/tagging_mode
+             schema_xpath: False
+             returns: /sonic-vlan:sonic-vlan/VLAN_MEMBER/VLAN_MEMBER_LIST[name='Vlan1000'][port='Ethernet8']/tagging_mode
+          2. configdb_path: /VLAN_MEMBER/Vlan1000|Ethernet8/tagging_mode
+             schema_xpath: True
+             returns: /sonic-vlan:sonic-vlan/VLAN_MEMBER/VLAN_MEMBER_LIST/tagging_mode
+        """
+
+        if configdb_path is None or len(configdb_path) == 0 or configdb_path == "/":
+            return "/"
+
+        # Fetch from cache if available
+        key = (configdb_path, schema_xpath)
+        result = self.configPathCache.get(key)
+        if result is not None:
+            return result
+
+        # Not available, go through conversion
+        tokens = self.configdb_path_split(configdb_path)
+        if len(tokens) == 0:
+            return None
+
+        xpath_tokens = []
+        table = tokens[0]
+
+        cmap = self.confDbYangMap[table]
+
+        # getting the top level element <module>:<topLevelContainer>
+        xpath_tokens.append(cmap['module']+":"+cmap['topLevelContainer'])
+
+        xpath_tokens.extend(self.__get_xpath_tokens_from_container(cmap['container'], tokens, 0, schema_xpath, configdb))
+
+        xpath = self.xpath_join(xpath_tokens, schema_xpath)
+
+        # Save to cache
+        self.configPathCache[key] = xpath
+
+        return xpath
+
+
+    def xpath_to_configdb_path(self, xpath: str, configdb: dict = None) -> str:
+        """
+        Converts the given XPATH to ConfigDB Path. 
+        If the xpath references a list value and the configdb is provided, the 
+        generated path will reference the index of the list value
+        Example:
+          xpath: /sonic-vlan:sonic-vlan/VLAN_MEMBER/VLAN_MEMBER_LIST[name='Vlan1000'][port='Ethernet8']/tagging_mode
+          path: /VLAN_MEMBER/Vlan1000|Ethernet8/tagging_mode
+        """
+        tokens = self.xpath_split(xpath)
+        if len(tokens) == 0:
+            return ""
+
+        if len(tokens) == 1:
+            raise ValueError("xpath cannot be just the module-name, there is no mapping to path")
+
+        table = tokens[1]
+        cmap = self.confDbYangMap[table]
+
+        configdb_path_tokens = self.__get_configdb_path_tokens_from_container(cmap['container'], tokens, 1, configdb)
+        return self.configdb_path_join(configdb_path_tokens)
+
+
+    def __get_xpath_tokens_from_container(self, model: dict, configdb_path_tokens: List[str], token_index: int, schema_xpath: bool, configdb: dict) -> List[str]:
+        token = configdb_path_tokens[token_index]
+        xpath_tokens = [token]
+
+        if len(configdb_path_tokens)-1 == token_index:
+            return xpath_tokens
+
+        # check if the configdb token is referring to a list
+        list_model = self.__get_list_model(model, configdb_path_tokens, token_index)
+        if list_model:
+            new_xpath_tokens = self.__get_xpath_tokens_from_list(list_model, configdb_path_tokens, token_index+1, schema_xpath, configdb)
+            xpath_tokens.extend(new_xpath_tokens)
+            return xpath_tokens
+
+        # check if it is targetting a child container
+        child_container_model = self.__get_model(model.get('container'), configdb_path_tokens[token_index+1])
+        if child_container_model:
+            new_xpath_tokens = self.__get_xpath_tokens_from_container(child_container_model, configdb_path_tokens, token_index+1, schema_xpath, configdb)
+            xpath_tokens.extend(new_xpath_tokens)
+            return xpath_tokens
+
+        leaf_token = self.__get_xpath_token_from_leaf(model, configdb_path_tokens, token_index+1, schema_xpath, configdb)
+        xpath_tokens.append(leaf_token)
+
+        return xpath_tokens
+
+
+    # Locate a model matching the given name.  If the model provided is a dict,
+    # it simply ensures the name matches and returns self.  If the model
+    # provided is a list it scans the list for a matching name and returns that
+    # model.
+    def __get_model(self, model, name: str) -> dict:
+        if isinstance(model, dict) and model['@name'] == name:
+            return model
+        if isinstance(model, list):
+            for submodel in model:
+                if submodel['@name'] == name:
+                    return submodel
+
+        return None
+
+
+    # A configdb list specifies the container name, plus the keys separated by |.  We are 
+    # scanning the model for a list with a matching *number* of keys and returning the
+    # reference to the model with the definition.  It is not valid to have 2 lists in
+    # the same container with the same number of keys since we have no way to match.
+    def __get_list_model(self, model: dict, configdb_path_tokens: List[str], token_index: int) -> dict:
+        parent_container_name = configdb_path_tokens[token_index]
+        clist = model.get('list')
+        # Container contains a single list, just return it
+        # TODO: check if matching also by name is necessary
+        if isinstance(clist, dict):
+            return clist
+
+        if isinstance(clist, list):
+            configdb_values_str = configdb_path_tokens[token_index+1]
+            # Format: "value1|value2|value|..."
+            configdb_values = configdb_values_str.split("|")
+            for list_model in clist:
+                yang_keys_str = list_model['key']['@value']
+                # Format: "key1 key2 key3 ..."
+                yang_keys = yang_keys_str.split()
+                # if same number of values and keys, this is the intended list-model
+                # TODO: Match also on types and not only the length of the keys/values
+                if len(yang_keys) == len(configdb_values):
+                    return list_model
+            raise ValueError(f"Container {parent_container_name} has multiple lists, "
+                             f"but none of them match the config_db value {configdb_values_str}")
+
+
+    def __get_xpath_tokens_from_list(self, model: dict, configdb_path_tokens: List[str], token_index: int, schema_xpath: bool, configdb: dict):
+        item_token=""
+
+        if schema_xpath:
+            item_token = model['@name']
+        else:
+            keyDict = self.__parse_configdb_key_to_dict(model['key']['@value'], configdb_path_tokens[token_index])
+            keyTokens = [f"[{key}='{keyDict[key]}']" for key in keyDict]
+            item_token = f"{model['@name']}{''.join(keyTokens)}"
+
+        xpath_tokens = [item_token]
+
+        # If we're pointing to the top level list item, and not a child leaf
+        # then we can just return.
+        if len(configdb_path_tokens)-1 == token_index:
+            return xpath_tokens
+
+        type_1_list_model = self.__type1_get_model(model)
+        if type_1_list_model:
+            token = self.__type1_get_xpath_token(type_1_list_model, configdb_path_tokens, token_index+1, schema_xpath)
+            xpath_tokens.append(token)
+            return xpath_tokens
+
+        leaf_token = self.__get_xpath_token_from_leaf(model, configdb_path_tokens, token_index+1, schema_xpath, configdb)
+        xpath_tokens.append(leaf_token)
+        return xpath_tokens
+
+
+    # Parse configdb key like Vlan1000|Ethernet8 (such as a key might be under /VLAN_MEMBER/)
+    # into its key/value dictionary form: { "name": "VLAN1000", "port": "Ethernet8" }
+    def __parse_configdb_key_to_dict(self, listKeys: str, configDbKey: str) -> dict:
+        xpath_list_keys = listKeys.split()
+        configdb_values = configDbKey.split("|")
+        # match lens
+        if len(xpath_list_keys) != len(configdb_values):
+            raise ValueError("Value not found for {} in {}".format(listKeys, configDbKey))
+        # create the keyDict
+        rv = dict()
+        for i in range(len(xpath_list_keys)):
+            rv[xpath_list_keys[i]] = configdb_values[i].strip()
+        return rv
+
+
+    # Type1 lists are lists contained within another list.  They always have exactly 1 key, and due to
+    # this they are special cased with a static lookup table.  Check to see if the
+    # specified model is a type1 list and if so, return the model.
+    def __type1_get_model(self, model: dict) -> dict:
+        list_name = model['@name']
+        if list_name not in sonic_yang_ext.Type_1_list_maps_model:
+            return None
+
+        # Type 1 list is expected to have a single inner list model.
+        # No need to check if it is a dictionary of list models.
+        return model.get('list')
+
+
+    # Type1 lists are lists contained within another list.  They always have exactly 1 key, and due to
+    # this they are special cased with a static lookup table.  This is just a helper to do a quick
+    # transformation from configdb to the xpath key.
+    def __type1_get_xpath_token(self, model: dict, configdb_path_tokens: List[str], token_index: int, schema_xpath: bool) -> str:
+        if schema_xpath:
+            return model['@name']
+        return f"{model['@name']}[{model['key']['@value']}='{configdb_path_tokens[token_index]}']"
+
+
+    # This function outputs the xpath token for leaf, choice, and leaf-list entries.
+    def __get_xpath_token_from_leaf(self, model: dict, configdb_path_tokens: List[str], token_index: int, schema_xpath: bool, configdb: dict) -> str:
+        token = configdb_path_tokens[token_index]
+
+        # checking all leaves
+        leaf_model = self.__get_model(model.get('leaf'), token)
+        if leaf_model:
+            return token
+
+        # checking choice
+        choices = model.get('choice')
+        if choices:
+            for choice in choices:
+                cases = choice['case']
+                for case in cases:
+                    leaf_model = self.__get_model(case.get('leaf'), token)
+                    if leaf_model:
+                        return token
+
+        # checking leaf-list (i.e. arrays of string, number or bool)
+        leaf_list_model = self.__get_model(model.get('leaf-list'), token)
+        if leaf_list_model:
+            # If there are no more tokens, just return the current token.
+            if len(configdb_path_tokens)-1 == token_index:
+                return token
+
+            value = self.__get_configdb_value(configdb_path_tokens, configdb)
+            if value is None or schema_xpath:
+                return token
+
+            # Reference an explicit leaf list value
+            return f"{token}[.='{value}']"
+
+        raise ValueError(f"Path token not found.\n  model: {model}\n  token_index: {token_index}\n  " + \
+                         f"path_tokens: {configdb_path_tokens}\n  config: {configdb}")
+
+
+    def __get_configdb_value(self, configdb_path_tokens: List[str], configdb: dict) -> str:
+        if configdb is None:
+            return None
+
+        ptr = configdb
+        for i in range(len(configdb_path_tokens)):
+            if isinstance(ptr, dict):
+                ptr = ptr[configdb_path_tokens[i]]
+            elif isinstance(ptr, list):
+                ptr = ptr[int(configdb_path_tokens[i])]
+            else:
+                return None
+        return ptr
+
+    @staticmethod
+    def __get_xpath_token_end(start: int, xpath: str) -> int:
+        idx = start
+        while idx < len(xpath):
+            if xpath[idx] == "/":
+                break
+            elif xpath[idx] == "[":
+                idx = SonicYangPathMixin.__get_xpath_predicate_end(idx, xpath)
+            idx = idx+1
+
+        return idx
+
+    @staticmethod
+    def __get_xpath_predicate_end(start: int, xpath: str) -> int:
+        idx = start
+        while idx < len(xpath):
+            if xpath[idx] == "]":
+                break
+            elif xpath[idx] == "'" or xpath[idx] == '"':
+                idx = SonicYangPathMixin.__get_xpath_quote_str_end(xpath[idx], idx, xpath)
+
+            idx = idx+1
+
+        return idx
+
+    @staticmethod
+    def __get_xpath_quote_str_end(ch: str, start: int, xpath: str) -> int:
+        idx = start+1 # skip first single quote
+        while idx < len(xpath):
+            if xpath[idx] == ch:
+                break
+            # libyang implements XPATH 1.0 which does not escape single or double quotes
+            # libyang src: https://netopeer.liberouter.org/doc/libyang/master/html/howtoxpath.html
+            # XPATH 1.0 src: https://www.w3.org/TR/1999/REC-xpath-19991116/#NT-Literal
+            idx = idx+1
+
+        return idx
+
+
+    def __get_configdb_path_tokens_from_container(self, model: dict, xpath_tokens: List[str], token_index: int, configdb: dict) -> List[str]:
+        token = xpath_tokens[token_index]
+        configdb_path_tokens = [token]
+
+        if len(xpath_tokens)-1 == token_index:
+            return configdb_path_tokens
+
+        if configdb is not None:
+            configdb = configdb[token]
+
+        # check child list
+        list_name = xpath_tokens[token_index+1].split("[")[0]
+        list_model = self.__get_model(model.get('list'), list_name)
+        if list_model:
+            new_path_tokens = self.__get_configdb_path_tokens_from_list(list_model, xpath_tokens, token_index+1, configdb)
+            configdb_path_tokens.extend(new_path_tokens)
+            return configdb_path_tokens
+
+        container_name = xpath_tokens[token_index+1]
+        container_model = self.__get_model(model.get('container'), container_name)
+        if container_model:
+            new_path_tokens = self.__get_configdb_path_tokens_from_container(container_model, xpath_tokens, token_index+1, configdb)
+            configdb_path_tokens.extend(new_path_tokens)
+            return configdb_path_tokens
+
+        new_path_tokens = self.__get_configdb_path_tokens_from_leaf(model, xpath_tokens, token_index+1, configdb)
+        configdb_path_tokens.extend(new_path_tokens)
+
+        return configdb_path_tokens
+
+
+    def __xpath_keys_to_dict(self, token: str) -> dict:
+        # Token passed in is something like:
+        #   VLAN_MEMBER_LIST[name='Vlan1000'][port='Ethernet8']
+        # Strip off the Table name, and return a dictionary of key/value pairs.
+
+        # See if we have keys
+        idx = token.find("[")
+        if idx == -1:
+            return dict()
+
+        # Strip off table name
+        token = token[idx:]
+
+        # Use regex to extract our keys and values
+        key_value_pattern = "\[([^=]+)='([^']*)'\]"
+        matches = re.findall(key_value_pattern, token)
+        kv = dict()
+        for item in matches:
+            kv[item[0]] = item[1]
+
+        return kv
+
+    def __get_configdb_path_tokens_from_list(self, model: dict, xpath_tokens: List[str], token_index: int, configdb: dict):
+        token = xpath_tokens[token_index]
+        key_dict = self.__xpath_keys_to_dict(token)
+
+        # If no keys specified return empty tokens, as we are already inside the correct table.
+        # Also note that the list name in SonicYang has no correspondence in ConfigDb and is ignored.
+        # Example where VLAN_MEMBER_LIST has no specific key/value:
+        #   xpath: /sonic-vlan:sonic-vlan/VLAN_MEMBER/VLAN_MEMBER_LIST
+        #   path: /VLAN_MEMBER
+        if not(key_dict):
+            return []
+
+        listKeys = model['key']['@value']
+        key_list = listKeys.split()
+
+        if len(key_list) != len(key_dict):
+            raise ValueError(f"Keys in configDb not matching keys in SonicYang. ConfigDb keys: {key_dict.keys()}. SonicYang keys: {key_list}")
+
+        values = [key_dict[k] for k in key_list]
+        configdb_path_token = '|'.join(values)
+        configdb_path_tokens = [ configdb_path_token ]
+
+        # Set pointer to pass for recursion
+        if configdb is not None:
+            # use .get() here as if configdb doesn't have the key it could return failure, but it can actually still
+            # generate a mostly relevant path.
+            configdb = configdb.get(configdb_path_token)
+
+        # At end, just return
+        if len(xpath_tokens)-1 == token_index:
+            return configdb_path_tokens
+
+        next_token = xpath_tokens[token_index+1]
+        # if the target node is a key, then it does not have a correspondene to path.
+        # Just return the current 'key1|key2|..' token as it already refers to the keys
+        # Example where the target node is 'name' which is a key in VLAN_MEMBER_LIST:
+        #   xpath: /sonic-vlan:sonic-vlan/VLAN_MEMBER/VLAN_MEMBER_LIST[name='Vlan1000'][port='Ethernet8']/name
+        #   path: /VLAN_MEMBER/Vlan1000|Ethernet8
+        if next_token in key_dict:
+            return configdb_path_tokens
+
+        type_1_list_model = self.__type1_get_model(model)
+        if type_1_list_model:
+            new_path_tokens = self.__get_configdb_path_tokens_from_type_1_list(type_1_list_model, xpath_tokens, token_index+1, configdb)
+            configdb_path_tokens.extend(new_path_tokens)
+            return configdb_path_tokens
+
+        new_path_tokens = self.__get_configdb_path_tokens_from_leaf(model, xpath_tokens, token_index+1, configdb)
+        configdb_path_tokens.extend(new_path_tokens)
+        return configdb_path_tokens
+
+
+    def __get_configdb_path_tokens_from_leaf(self, model: dict, xpath_tokens: List[str], token_index: int, configdb: dict) -> List[str]:
+        token = xpath_tokens[token_index]
+
+        # checking all leaves
+        leaf_model = self.__get_model(model.get('leaf'), token)
+        if leaf_model:
+            return [token]
+
+        # checking choices
+        choices = model.get('choice')
+        if choices:
+            for choice in choices:
+                cases = choice['case']
+                for case in cases:
+                    leaf_model = self.__get_model(case.get('leaf'), token)
+                    if leaf_model:
+                        return [token]
+
+        # checking leaf-list
+        leaf_list_tokens = token.split("[", 1) # split once on the first '[', a regex is used later to fetch keys/values
+        leaf_list_name = leaf_list_tokens[0]
+        leaf_list_model = self.__get_model(model.get('leaf-list'), leaf_list_name)
+        if leaf_list_model:
+            # if whole-list is to be returned, such as if there is no key, or if configdb is not provided,
+            # Just return the list-name without checking the list items
+            # Example:
+            #   xpath: /sonic-vlan:sonic-vlan/VLAN/VLAN_LIST[name='Vlan1000']/dhcp_servers
+            #   path: /VLAN/Vlan1000/dhcp_servers
+            if configdb is None or len(leaf_list_tokens) == 1:
+                return [leaf_list_name]
+            leaf_list_pattern = "^[^\[]+(?:\[\.='([^']*)'\])?$"
+            leaf_list_regex = re.compile(leaf_list_pattern)
+            match = leaf_list_regex.match(token)
+            # leaf_list_name = match.group(1)
+            leaf_list_value = match.group(1)
+            list_config = configdb[leaf_list_name]
+            # Workaround for those fields who is defined as leaf-list in YANG model but have string value in config DB
+            # No need to lookup the item index in ConfigDb since the list is represented as a string, return path to string immediately
+            # Example:
+            #   xpath: /sonic-buffer-port-egress-profile-list:sonic-buffer-port-egress-profile-list/BUFFER_PORT_EGRESS_PROFILE_LIST/BUFFER_PORT_EGRESS_PROFILE_LIST_LIST[port='Ethernet9']/profile_list[.='egress_lossy_profile']
+            #   path: /BUFFER_PORT_EGRESS_PROFILE_LIST/Ethernet9/profile_list
+            if isinstance(list_config, str):
+                return [leaf_list_name]
+
+            if not isinstance(list_config, list):
+                raise ValueError(f"list_config is expected to be of type list or string. Found {type(list_config)}.\n  " + \
+                                 f"model: {model}\n  token_index: {token_index}\n  " + \
+                                 f"xpath_tokens: {xpath_tokens}\n  config: {configdb}")
+
+            list_idx = list_config.index(leaf_list_value)
+            return [leaf_list_name, list_idx]
+
+        raise ValueError(f"Xpath token not found.\n  model: {model}\n  token_index: {token_index}\n  " + \
+                         f"xpath_tokens: {xpath_tokens}\n  config: {configdb}")
+
+
+    def __get_configdb_path_tokens_from_type_1_list(self, model: dict, xpath_tokens: List[str], token_index: int, configdb: dict):
+        type_1_inner_list_name = model['@name']
+
+        token = xpath_tokens[token_index]
+        list_tokens = token.split("[", 1) # split once on the first '[', first element will be the inner list name
+        inner_list_name = list_tokens[0]
+
+        if type_1_inner_list_name != inner_list_name:
+            raise ValueError(f"Type 1 inner list name '{type_1_inner_list_name}' does match xpath inner list name '{inner_list_name}'.")
+
+        key_dict = self.__xpath_keys_to_dict(token)
+
+        # If no keys specified return empty tokens, as we are already inside the correct table.
+        # Also note that the type 1 inner list name in SonicYang has no correspondence in ConfigDb and is ignored.
+        # Example where DOT1P_TO_TC_MAP_LIST has no specific key/value:
+        #   xpath: /sonic-dot1p-tc-map:sonic-dot1p-tc-map/DOT1P_TO_TC_MAP/DOT1P_TO_TC_MAP_LIST[name='Dot1p_to_tc_map1']/DOT1P_TO_TC_MAP
+        #   path: /DOT1P_TO_TC_MAP/Dot1p_to_tc_map1
+        if not(key_dict):
+            return []
+
+        if len(key_dict) > 1:
+            raise ValueError(f"Type 1 inner list should have only 1 key in xpath, {len(key_dict)} specified. Key dictionary: {key_dict}")
+
+        keyName = next(iter(key_dict.keys()))
+        value = key_dict[keyName]
+
+        path_tokens = [value]
+
+        # If this is the last xpath token, return the path tokens we have built so far, no need for futher checks
+        # Example:
+        #   xpath: /sonic-dot1p-tc-map:sonic-dot1p-tc-map/DOT1P_TO_TC_MAP/DOT1P_TO_TC_MAP_LIST[name='Dot1p_to_tc_map1']/DOT1P_TO_TC_MAP[dot1p='2']
+        #   path: /DOT1P_TO_TC_MAP/Dot1p_to_tc_map1/2
+        if token_index+1 >= len(xpath_tokens):
+            return path_tokens
+
+        # Checking if the next_token is actually a child leaf of the inner type 1 list, for which case
+        # just ignore the token, and return the already created ConfigDb path pointing to the whole object
+        # Example where the leaf specified is the key:
+        #   xpath: /sonic-dot1p-tc-map:sonic-dot1p-tc-map/DOT1P_TO_TC_MAP/DOT1P_TO_TC_MAP_LIST[name='Dot1p_to_tc_map1']/DOT1P_TO_TC_MAP[dot1p='2']/dot1p
+        #   path: /DOT1P_TO_TC_MAP/Dot1p_to_tc_map1/2
+        # Example where the leaf specified is not the key:
+        #   xpath: /sonic-dot1p-tc-map:sonic-dot1p-tc-map/DOT1P_TO_TC_MAP/DOT1P_TO_TC_MAP_LIST[name='Dot1p_to_tc_map1']/DOT1P_TO_TC_MAP[dot1p='2']/tc
+        #   path: /DOT1P_TO_TC_MAP/Dot1p_to_tc_map1/2
+        next_token = xpath_tokens[token_index+1]
+        leaf_model = self.__get_model(model.get('leaf'), next_token)
+        if leaf_model:
+            return path_tokens
+
+        raise ValueError(f"Type 1 inner list '{type_1_inner_list_name}' does not have a child leaf named '{next_token}'")
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data.json b/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data.json
index 154ef21b494..da7837b020d 100644
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data.json
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data.json
@@ -1,5 +1,5 @@
 {
-	"test-vlan:vlan": {
+	"test-vlan:test-vlan": {
 		"test-vlan:VLAN_INTERFACE": {
 			"VLAN_INTERFACE_LIST": [{
 					"vlanid": 111,
@@ -101,7 +101,7 @@
 			]
 		}
 	},
-	"test-port:port": {
+	"test-port:test-port": {
 		"test-port:PORT": {
 			"PORT_LIST": [{
 					"port_name": "Ethernet0",
@@ -187,7 +187,7 @@
 		}
 	},
 
-	"test-acl:acl": {
+	"test-acl:test-acl": {
 		"test-acl:ACL_RULE": {
 			"ACL_RULE_LIST": [{
 					"ACL_TABLE_NAME": "PACL-V4",
@@ -240,7 +240,7 @@
 		}
 	},
 
-	"test-interface:interface": {
+	"test-interface:test-interface": {
 		"test-interface:INTERFACE": {
 			"INTERFACE_LIST": [{
 					"interface": "Ethernet8",
@@ -258,7 +258,7 @@
 		}
 	},
 
-	"test-yang-structure:test-yang-container": {
+	"test-yang-structure:test-yang-structure": {
 		"test-yang-structure:YANG_STRUCT_TEST": {
 			"YANG_LIST_TEST_LIST": [{
 					"name" : "Vlan1001",
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data_merge.json b/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data_merge.json
index 73838a157c4..e58d37b2bd0 100644
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data_merge.json
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data_merge.json
@@ -1,5 +1,5 @@
 {
-	"test-vlan:vlan": {
+	"test-vlan:test-vlan": {
 		"test-vlan:VLAN_INTERFACE": {
 			"VLAN_INTERFACE_LIST": [{
 					"vlanid": 111,
@@ -58,7 +58,7 @@
 			}]
 		}
 	},
-	"test-port:port": {
+	"test-port:test-port": {
 		"test-port:PORT": {
 			"PORT_LIST": [{
 					"port_name": "Ethernet0",
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-acl.yang b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-acl.yang
index 0d7d93a1429..67ab472ad95 100644
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-acl.yang
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-acl.yang
@@ -32,7 +32,7 @@ module test-acl {
 		description "First Revision";
 	}
 
-	container acl {
+	container test-acl {
 
 		container ACL_RULE {
 
@@ -44,7 +44,7 @@ module test-acl {
 
 				leaf ACL_TABLE_NAME {
 					type leafref {
-						path "/acl:acl/acl:ACL_TABLE/acl:ACL_TABLE_LIST/acl:ACL_TABLE_NAME";
+						path "/acl:test-acl/acl:ACL_TABLE/acl:ACL_TABLE_LIST/acl:ACL_TABLE_NAME";
 					}
 				}
 
@@ -251,10 +251,10 @@ module test-acl {
                     /* union of leafref is allowed in YANG 1.1 */
 					type union {
 						type leafref {
-							path /port:port/port:PORT/port:PORT_LIST/port:port_name;
+							path /port:test-port/port:PORT/port:PORT_LIST/port:port_name;
 						}
 						type leafref {
-							path /lag:portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:portchannel_name;
+							path /lag:test-portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:portchannel_name;
 						}
 					}
 				}
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-interface.yang b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-interface.yang
index 2f453ac6e27..b10f6939517 100644
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-interface.yang
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-interface.yang
@@ -25,7 +25,7 @@ module test-interface {
 		description "First Revision";
 	}
 
-	container interface {
+	container test-interface {
 		container INTERFACE {
 
 			description "INTERFACE part of config_db.json";
@@ -36,7 +36,7 @@ module test-interface {
 
 				leaf interface {
 					type leafref {
-						path /port:port/port:PORT/port:PORT_LIST/port:port_name;
+						path /port:test-port/port:PORT/port:PORT_LIST/port:port_name;
 					}
 				}
 
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-port.yang b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-port.yang
index 5e2bf68f791..bf550c45d4a 100644
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-port.yang
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-port.yang
@@ -20,7 +20,7 @@ module test-port{
 		description "First Revision";
 	}
 
-	container port{
+	container test-port {
 		container PORT {
 
 			description "PORT part of config_db.json";
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-portchannel.yang b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-portchannel.yang
index 2081383aeda..29cf0fcc9f8 100644
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-portchannel.yang
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-portchannel.yang
@@ -25,7 +25,7 @@ module test-portchannel {
 		description "First Revision";
 	}
 
-	container portchannel {
+	container test-portchannel {
 		container PORTCHANNEL {
 
 			description "PORTCHANNEL part of config_db.json";
@@ -44,7 +44,7 @@ module test-portchannel {
 				leaf-list members {
 					/* leaf-list members are unique by default */
 					type leafref {
-						path /port:port/port:PORT/port:PORT_LIST/port:port_name;
+						path /port:test-port/port:PORT/port:PORT_LIST/port:port_name;
 					}
 				}
 
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-vlan.yang b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-vlan.yang
index 2ca80607b41..4f647f55c6c 100644
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-vlan.yang
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-vlan.yang
@@ -25,7 +25,7 @@ module test-vlan {
 		description "First Revision";
 	}
 
-	container vlan {
+	container test-vlan {
 		container VLAN_INTERFACE {
 
 			description "VLAN_INTERFACE part of config_db.json";
@@ -126,7 +126,7 @@ module test-vlan {
 					/* key elements are mandatory by default */
 					mandatory true;
 					type leafref {
-						path /port:port/port:PORT/port:PORT_LIST/port:port_name;
+						path /port:test-port/port:PORT/port:PORT_LIST/port:port_name;
 					}
 				}
 
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-yang-structure.yang b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-yang-structure.yang
index 1f57ae337a4..1c0a9e31043 100755
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-yang-structure.yang
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-yang-structure.yang
@@ -22,7 +22,7 @@ module test-yang-structure {
     description "First Revision";
   }
 
-  container test-yang-container {
+  container test-yang-structure {
 
     container YANG_STRUCT_TEST {
 
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/test_SonicYang.json b/src/sonic-yang-mgmt/tests/libyang-python-tests/test_SonicYang.json
index 2376c357b75..998893b7ff4 100644
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/test_SonicYang.json
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/test_SonicYang.json
@@ -4,144 +4,144 @@
    "data_nodes" : [
       {
          "valid" : "True",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet9']/alias"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet9']/alias"
       },
       {
          "valid" : "False",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet20']/alias"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet20']/alias"
       },
       {
          "valid" : "True",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE"
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE"
       },
       {
          "valid" : "False",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST"
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST"
       },
       {
          "valid" : "True",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='2000:f500:45:6709::/64']"
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='2000:f500:45:6709::/64']"
       }
    ],
    "data_type" : [
       {
          "data_type" : "LY_TYPE_STRING",
-         "xpath" : "/test-port:port/test-port:PORT/test-port:PORT_LIST/test-port:port_name"
+         "xpath" : "/test-port:test-port/test-port:PORT/test-port:PORT_LIST/test-port:port_name"
       },
       {
          "data_type" : "LY_TYPE_LEAFREF",
-         "xpath" : "/test-vlan:vlan/test-vlan:VLAN_INTERFACE/test-vlan:VLAN_INTERFACE_LIST/test-vlan:vlanid"
+         "xpath" : "/test-vlan:test-vlan/test-vlan:VLAN_INTERFACE/test-vlan:VLAN_INTERFACE_LIST/test-vlan:vlanid"
       }
    ],
    "delete_nodes" : [
       {
          "valid" : "False",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet10']/speed"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet10']/speed"
       },
       {
          "valid" : "True",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet9']/mtu"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet9']/mtu"
       },
       {
          "valid" : "False",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet20']/mtu"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet20']/mtu"
       }
    ],
    "dependencies" : [
       {
          "dependencies" : [
-            "/test-acl:acl/ACL_TABLE/ACL_TABLE_LIST[ACL_TABLE_NAME='PACL-V6']/ports[.='Ethernet8']",
-            "/test-interface:interface/INTERFACE/INTERFACE_LIST[interface='Ethernet8'][ip-prefix='10.1.1.64/26']/interface",
-            "/test-interface:interface/INTERFACE/INTERFACE_LIST[interface='Ethernet8'][ip-prefix='2000:f500:40:a749::/126']/interface"
+            "/test-acl:test-acl/ACL_TABLE/ACL_TABLE_LIST[ACL_TABLE_NAME='PACL-V6']/ports[.='Ethernet8']",
+            "/test-interface:test-interface/INTERFACE/INTERFACE_LIST[interface='Ethernet8'][ip-prefix='10.1.1.64/26']/interface",
+            "/test-interface:test-interface/INTERFACE/INTERFACE_LIST[interface='Ethernet8'][ip-prefix='2000:f500:40:a749::/126']/interface"
          ],
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet8']/port_name"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet8']/port_name"
       },
       {
          "dependencies" : [],
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet8']/alias"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet8']/alias"
       }
    ],
    "leafref_path" : [
       {
          "leafref_path" : "../../../VLAN/VLAN_LIST/vlanid",
-         "xpath" : "/test-vlan:vlan/test-vlan:VLAN_INTERFACE/test-vlan:VLAN_INTERFACE_LIST/test-vlan:vlanid"
+         "xpath" : "/test-vlan:test-vlan/test-vlan:VLAN_INTERFACE/test-vlan:VLAN_INTERFACE_LIST/test-vlan:vlanid"
       },
       {
-         "leafref_path" : "/test-port:port/test-port:PORT/test-port:PORT_LIST/test-port:port_name",
-         "xpath" : "/test-interface:interface/test-interface:INTERFACE/test-interface:INTERFACE_LIST/test-interface:interface"
+         "leafref_path" : "/test-port:test-port/test-port:PORT/test-port:PORT_LIST/test-port:port_name",
+         "xpath" : "/test-interface:test-interface/test-interface:INTERFACE/test-interface:INTERFACE_LIST/test-interface:interface"
       },
       {
-         "leafref_path" : "/test-port:port/test-port:PORT/test-port:PORT_LIST/test-port:port_name",
-         "xpath" : "/test-vlan:vlan/test-vlan:VLAN_MEMBER/test-vlan:VLAN_MEMBER_LIST/test-vlan:port"
+         "leafref_path" : "/test-port:test-port/test-port:PORT/test-port:PORT_LIST/test-port:port_name",
+         "xpath" : "/test-vlan:test-vlan/test-vlan:VLAN_MEMBER/test-vlan:VLAN_MEMBER_LIST/test-vlan:port"
       },
       {
          "leafref_path" : "../../../VLAN/VLAN_LIST/vlanid",
-         "xpath" : "/test-vlan:vlan/test-vlan:VLAN_MEMBER/test-vlan:VLAN_MEMBER_LIST/test-vlan:vlanid"
+         "xpath" : "/test-vlan:test-vlan/test-vlan:VLAN_MEMBER/test-vlan:VLAN_MEMBER_LIST/test-vlan:vlanid"
       }
    ],
    "leafref_type" : [
       {
          "data_type" : "LY_TYPE_UINT16",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='2000:f500:45:6709::/64']/vlanid"
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='2000:f500:45:6709::/64']/vlanid"
       },
       {
          "data_type" : "LY_TYPE_STRING",
-         "xpath" : "/test-interface:interface/INTERFACE/INTERFACE_LIST[interface='Ethernet8'][ip-prefix='2000:f500:40:a749::/126']/interface"
+         "xpath" : "/test-interface:test-interface/INTERFACE/INTERFACE_LIST[interface='Ethernet8'][ip-prefix='2000:f500:40:a749::/126']/interface"
       },
       {
          "data_type" : "LY_TYPE_STRING",
-         "xpath" : "/test-vlan:vlan/VLAN_MEMBER/VLAN_MEMBER_LIST[vlanid='111'][port='Ethernet0']/port"
+         "xpath" : "/test-vlan:test-vlan/VLAN_MEMBER/VLAN_MEMBER_LIST[vlanid='111'][port='Ethernet0']/port"
       },
       {
          "data_type" : "LY_TYPE_UINT16",
-         "xpath" : "/test-vlan:vlan/VLAN_MEMBER/VLAN_MEMBER_LIST[vlanid='111'][port='Ethernet0']/vlanid"
+         "xpath" : "/test-vlan:test-vlan/VLAN_MEMBER/VLAN_MEMBER_LIST[vlanid='111'][port='Ethernet0']/vlanid"
       }
    ],
    "leafref_type_schema" : [
       {
          "data_type" : "LY_TYPE_UINT16",
-         "xpath" : "/test-vlan:vlan/test-vlan:VLAN_INTERFACE/test-vlan:VLAN_INTERFACE_LIST/test-vlan:vlanid"
+         "xpath" : "/test-vlan:test-vlan/test-vlan:VLAN_INTERFACE/test-vlan:VLAN_INTERFACE_LIST/test-vlan:vlanid"
       },
       {
          "data_type" : "LY_TYPE_STRING",
-         "xpath" : "/test-interface:interface/test-interface:INTERFACE/test-interface:INTERFACE_LIST/test-interface:interface"
+         "xpath" : "/test-interface:test-interface/test-interface:INTERFACE/test-interface:INTERFACE_LIST/test-interface:interface"
       },
       {
          "data_type" : "LY_TYPE_STRING",
-         "xpath" : "/test-vlan:vlan/test-vlan:VLAN_MEMBER/test-vlan:VLAN_MEMBER_LIST/test-vlan:port"
+         "xpath" : "/test-vlan:test-vlan/test-vlan:VLAN_MEMBER/test-vlan:VLAN_MEMBER_LIST/test-vlan:port"
       },
       {
          "data_type" : "LY_TYPE_UINT16",
-         "xpath" : "/test-vlan:vlan/test-vlan:VLAN_MEMBER/test-vlan:VLAN_MEMBER_LIST/test-vlan:vlanid"
+         "xpath" : "/test-vlan:test-vlan/test-vlan:VLAN_MEMBER/test-vlan:VLAN_MEMBER_LIST/test-vlan:vlanid"
       }
    ],
    "members" : [
       {
          "members" : [
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet0']",
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet1']",
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet2']",
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet3']",
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet4']",
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet5']",
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet6']",
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet7']",
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet8']",
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet9']",
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet10']",
-            "/test-port:port/PORT/PORT_LIST[port_name='Ethernet12']"
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet0']",
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet1']",
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet2']",
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet3']",
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet4']",
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet5']",
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet6']",
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet7']",
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet8']",
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet9']",
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet10']",
+            "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet12']"
          ],
-         "xpath" : "/test-port:port/PORT/PORT_LIST"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST"
       }
    ],
    "merged_nodes" : [
       {
          "value" : "25000",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet10']/speed"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet10']/speed"
       },
       {
          "value" : "IPv6",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='200'][ip-prefix='2000:f500:45:6708::/64']/family"
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='200'][ip-prefix='2000:f500:45:6708::/64']/family"
       }
    ],
    "modules" : [
@@ -177,51 +177,51 @@
    "new_nodes" : [
       {
          "value" : "Ethernet10_alias",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet12']/alias"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet12']/alias"
       },
       {
          "value" : "5000",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet12']/speed"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet12']/speed"
       },
       {
          "value" : "rule_20",
-         "xpath" : "/test-acl:acl/ACL_RULE/ACL_RULE_LIST[ACL_TABLE_NAME='PACL-test'][RULE_NAME='rule_20']/RULE_NAME"
+         "xpath" : "/test-acl:test-acl/ACL_RULE/ACL_RULE_LIST[ACL_TABLE_NAME='PACL-test'][RULE_NAME='rule_20']/RULE_NAME"
       }
    ],
    "node_values" : [
       {
          "value" : "25000",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet9']/speed"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet9']/speed"
       },
       {
          "value" : "IPv6",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='2000:f500:45:6709::/64']/family"
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='2000:f500:45:6709::/64']/family"
       }
    ],
    "parents" : [
       {
-         "parent" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='2000:f500:45:6709::/64']",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='2000:f500:45:6709::/64']/family"
+         "parent" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='2000:f500:45:6709::/64']",
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='2000:f500:45:6709::/64']/family"
       },
       {
-         "parent" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']/scope"
+         "parent" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']",
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']/scope"
       },
       {
-         "parent" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']/vlanid"
+         "parent" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']",
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']/vlanid"
       },
       {
-         "parent" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']/ip-prefix"
+         "parent" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']",
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']/ip-prefix"
       },
       {
-         "parent" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']/family"
+         "parent" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']",
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']/family"
       },
       {
-         "parent" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet9']",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet9']/speed"
+         "parent" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet9']",
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet9']/speed"
       }
    ],
    "prefix" : [
@@ -257,36 +257,54 @@
    "schema_dependencies" : [
       {
          "schema_dependencies" : [
-            "/test-acl:acl/test-acl:ACL_TABLE/test-acl:ACL_TABLE_LIST/test-acl:ports",
-            "/test-portchannel:portchannel/test-portchannel:PORTCHANNEL/test-portchannel:PORTCHANNEL_LIST/test-portchannel:members",
-            "/test-interface:interface/test-interface:INTERFACE/test-interface:INTERFACE_LIST/test-interface:interface",
-            "/test-vlan:vlan/test-vlan:VLAN_MEMBER/test-vlan:VLAN_MEMBER_LIST/test-vlan:port"
+            "/test-acl:test-acl/test-acl:ACL_TABLE/test-acl:ACL_TABLE_LIST/test-acl:ports",
+            "/test-portchannel:test-portchannel/test-portchannel:PORTCHANNEL/test-portchannel:PORTCHANNEL_LIST/test-portchannel:members",
+            "/test-interface:test-interface/test-interface:INTERFACE/test-interface:INTERFACE_LIST/test-interface:interface",
+            "/test-vlan:test-vlan/test-vlan:VLAN_MEMBER/test-vlan:VLAN_MEMBER_LIST/test-vlan:port"
          ],
-         "xpath" : "/test-port:port/test-port:PORT/test-port:PORT_LIST/test-port:port_name"
+         "xpath" : "/test-port:test-port/test-port:PORT/test-port:PORT_LIST/test-port:port_name"
       }
    ],
    "schema_nodes" : [
       {
-         "value" : "/test-vlan:vlan/test-vlan:VLAN_INTERFACE/test-vlan:VLAN_INTERFACE_LIST/test-vlan:family",
-         "xpath" : "/test-vlan:vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']/family"
+         "value" : "/test-vlan:test-vlan/test-vlan:VLAN_INTERFACE/test-vlan:VLAN_INTERFACE_LIST/test-vlan:family",
+         "xpath" : "/test-vlan:test-vlan/VLAN_INTERFACE/VLAN_INTERFACE_LIST[vlanid='111'][ip-prefix='10.1.1.64/26']/family"
       },
       {
-         "value" : "/test-port:port/test-port:PORT/test-port:PORT_LIST/test-port:speed",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet9']/speed"
+         "value" : "/test-port:test-port/test-port:PORT/test-port:PORT_LIST/test-port:speed",
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet9']/speed"
       }
    ],
    "set_nodes" : [
       {
          "value" : "10000",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet10']/speed"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet10']/speed"
       },
       {
          "value" : "1500",
-         "xpath" : "/test-port:port/PORT/PORT_LIST[port_name='Ethernet9']/mtu"
+         "xpath" : "/test-port:test-port/PORT/PORT_LIST[port_name='Ethernet9']/mtu"
       },
       {
          "value" : "server_vlan111",
-         "xpath" : "/test-vlan:vlan/VLAN/VLAN_LIST[vlanid='111']/description"
+         "xpath" : "/test-vlan:test-vlan/VLAN/VLAN_LIST[vlanid='111']/description"
+      }
+   ],
+   "configdb_path_to_xpath": [
+      {
+         "configdb_path": "/VLAN_MEMBER/Vlan1000|Ethernet8/tagging_mode",
+         "schema_xpath": false,
+         "xpath": "/test-vlan:test-vlan/VLAN_MEMBER/VLAN_MEMBER_LIST[vlanid='Vlan1000'][port='Ethernet8']/tagging_mode"
+      },
+      {
+         "configdb_path": "/VLAN_MEMBER/Vlan1000|Ethernet8/tagging_mode",
+         "schema_xpath": true,
+         "xpath": "/test-vlan:test-vlan/test-vlan:VLAN_MEMBER/test-vlan:VLAN_MEMBER_LIST/test-vlan:tagging_mode"
+      }
+   ],
+   "xpath_to_configdb_path": [
+      {
+         "xpath": "/test-vlan:test-vlan/VLAN_MEMBER/VLAN_MEMBER_LIST[vlanid='Vlan1000'][port='Ethernet8']/tagging_mode",
+         "configdb_path": "/VLAN_MEMBER/Vlan1000|Ethernet8/tagging_mode"
       }
    ],
    "yang_dir" : "./tests/libyang-python-tests/sample-yang-models/"
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/test_sonic_yang.py b/src/sonic-yang-mgmt/tests/libyang-python-tests/test_sonic_yang.py
index 86b27ef174e..9d773680ce8 100644
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/test_sonic_yang.py
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/test_sonic_yang.py
@@ -211,7 +211,7 @@ def test_find_schema_dependencies(self, yang_s, data):
         for node in data['schema_dependencies']:
             xpath = str(node['xpath'])
             list = node['schema_dependencies']
-            depend = yang_s._find_schema_dependencies(xpath)
+            depend = yang_s.find_schema_dependencies(xpath)
             assert set(depend) == set(list)
 
     #test merge data tree
@@ -261,6 +261,56 @@ def test_get_leafref_type_schema(self, yang_s, data):
             data_type = yang_s._get_leafref_type_schema(xpath)
             assert expected_type == data_type
 
+    def test_configdb_path_to_xpath(self, yang_s, data):
+        yang_s.loadYangModel()
+        for node in data['configdb_path_to_xpath']:
+            configdb_path = str(node['configdb_path'])
+            schema_xpath = bool(node['schema_xpath'])
+            expected = node['xpath']
+            received = yang_s.configdb_path_to_xpath(configdb_path, schema_xpath=schema_xpath)
+            assert received == expected
+
+    def test_xpath_to_configdb_path(self, yang_s, data):
+        yang_s.loadYangModel()
+        for node in data['xpath_to_configdb_path']:
+            xpath = str(node['xpath'])
+            expected = node['configdb_path']
+            received = yang_s.xpath_to_configdb_path(xpath)
+            assert received == expected
+
+    def test_configdb_path_split(self, yang_s, data):
+        def check(path, tokens):
+            expected=tokens
+            actual=yang_s.configdb_path_split(path)
+            assert expected == actual
+
+        check("", [])
+        check("/", [])
+        check("/token", ["token"])
+        check("/more/than/one/token", ["more", "than", "one", "token"])
+        check("/has/numbers/0/and/symbols/^", ["has", "numbers", "0", "and", "symbols", "^"])
+        check("/~0/this/is/telda", ["~", "this", "is", "telda"])
+        check("/~1/this/is/forward-slash", ["/", "this", "is", "forward-slash"])
+        check("/\\\\/no-escaping", ["\\\\", "no-escaping"])
+        check("////empty/tokens/are/ok", ["", "", "", "empty", "tokens", "are", "ok"])
+
+    def configdb_path_join(self, yang_s, data):
+        def check(tokens, path):
+            expected=path
+            actual=yang_s.configdb_path_join(tokens)
+            assert expected == actual
+
+        check([], "/",)
+        check([""], "/",)
+        check(["token"], "/token")
+        check(["more", "than", "one", "token"], "/more/than/one/token")
+        check(["has", "numbers", "0", "and", "symbols", "^"], "/has/numbers/0/and/symbols/^")
+        check(["~", "this", "is", "telda"], "/~0/this/is/telda")
+        check(["/", "this", "is", "forward-slash"], "/~1/this/is/forward-slash")
+        check(["\\\\", "no-escaping"], "/\\\\/no-escaping")
+        check(["", "", "", "empty", "tokens", "are", "ok"], "////empty/tokens/are/ok")
+        check(["~token", "telda-not-followed-by-0-or-1"], "/~0token/telda-not-followed-by-0-or-1")
+
     """
     This is helper function to load YANG models for tests cases, which works
     on Real SONiC Yang models. Mainly tests  for translation and reverse
diff --git a/src/sonic-yang-models/.gitignore b/src/sonic-yang-models/.gitignore
index c5522334f75..a39a8967f5f 100644
--- a/src/sonic-yang-models/.gitignore
+++ b/src/sonic-yang-models/.gitignore
@@ -22,6 +22,7 @@ var/
 *.egg-info/
 .installed.cfg
 *.egg
+*.whl
 
 # PyInstaller
 #  Usually these files are written by a python script from a template
@@ -57,3 +58,11 @@ docs/_build/
 target/
 
 yang-models/sonic_yang_tree
+tests/yang-models/sonic_yang_tree
+
+# Auto-generated YANG models
+yang-models/sonic-acl.yang
+yang-models/sonic-extension.yang
+yang-models/sonic-policer.yang
+yang-models/sonic-types.yang
+cvlyang-models/
diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 8196c7079b7..31ba216bb99 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -25,7 +25,7 @@
   * [Console](#console)
   * [CRM](#crm)
   * [CRM DASH](#crm-dash)
-  * [Data Plane L3 Interfaces](#data-plane-l3-interfaces)
+  * [DEBUG_COUNTER and DEBUG_COUNTER_DROP_REASON](#debug_counter-and-debug_counter_drop_reason)
   * [DEFAULT_LOSSLESS_BUFFER_PARAMETER](#DEFAULT_LOSSLESS_BUFFER_PARAMETER)
   * [Device Metadata](#device-metadata)
   * [Device neighbor metada](#device-neighbor-metada)
@@ -41,10 +41,10 @@
   * [FLEX_COUNTER_TABLE](#flex_counter_table)
   * [GRPCCLIENT](#grpcclient)
   * [Hash](#hash)
-  * [IPv6 Link-local] (#ipv6-link-local)
   * [KDUMP](#kdump)
   * [Kubernetes Master](#kubernetes-master)
   * [L2 Neighbors](#l2-neighbors)
+  * [L3 Interfaces](#l3-interfaces)
   * [Loopback Interface](#loopback-interface)
   * [LOSSLESS_TRAFFIC_PATTERN](#LOSSLESS_TRAFFIC_PATTERN)
   * [Memory Statistics](#memory-statistics)
@@ -71,15 +71,18 @@
   * [Restapi](#restapi)
   * [System Port](#system-port)
   * [Tacplus Server](#tacplus-server)
+  * [TC to DSCP map](#tc-to-dscp-map)
   * [TC to Priority group map](#tc-to-priority-group-map)
   * [TC to Queue map](#tc-to-queue-map)
   * [Telemetry](#telemetry)
   * [Telemetry client](#telemetry-client)
   * [Tunnel](#tunnel)
+  * [Trimming](#trimming)
   * [Versions](#versions)
   * [VLAN](#vlan)
   * [VLAN_MEMBER](#vlan_member)
   * [VNET](#vnet)
+  * [VNET_ROUTE_TUNNEL](#vnet_route_tunnel)
   * [VOQ Inband Interface](#voq-inband-interface)
   * [VXLAN](#vxlan)
   * [Virtual router](#virtual-router)
@@ -94,6 +97,10 @@
   * [Static DNS](#static-dns)
   * [ASIC_SENSORS](#asic_sensors)  
   * [SRv6](#srv6)
+  * [DPU](#dpu-configuration)
+  * [REMOTE_DPU](#remote_dpu-configuration)
+  * [VDPU](#vdpu-configuration)
+  * [DASH HA Global Configuration](#dash-ha-global-configuration)
   * [Prefix List](#prefix-list)
 * [For Developers](#for-developers)
   * [Generating Application Config by Jinja2 Template](#generating-application-config-by-jinja2-template)
@@ -377,6 +384,43 @@ and migration plan
     }
 }
 ```
+
+***ACL fine-grained packet trimming control with disable trimming action configuration example***
+```
+{
+    "ACL_TABLE_TYPE": {
+        "TRIMMING_L3": {
+            "MATCHES": [
+                "SRC_IP"
+            ],
+            "ACTIONS": [
+                "DISABLE_TRIM_ACTION"
+            ],
+            "BIND_POINTS": [
+                "PORT"
+            ]
+        }
+    },
+    "ACL_TABLE": {
+        "TRIM_TABLE": {
+            "POLICY_DESC": "Packet trimming",
+            "TYPE": "TRIMMING_L3",
+            "STAGE": "INGRESS",
+            "PORTS": [
+                "Ethernet0"
+            ]
+        }
+    },
+    "ACL_RULE": {
+        "TRIM_TABLE|TRIM_RULE": {
+            "PRIORITY": "999",
+            "SRC_IP": "1.1.1.1/32",
+            "PACKET_ACTION": "DISABLE_TRIM"
+        }
+    }
+}
+```
+
 ### BGP BBR
 
 The **BGP_BBR** table contains device-level BBR state.
@@ -658,6 +702,18 @@ This kind of profiles will be handled by buffer manager and won't be applied to
 }
 ```
 
+***Packet trimming configuration example***
+```
+{
+    "q_lossy_profile": {
+        "dynamic_th": "3",
+        "pool": "egress_lossy_pool",
+        "size": "0",
+        "packet_discard_action": "drop"
+    }
+}
+```
+
 ### Buffer queue
 
 ```
@@ -928,47 +984,42 @@ It currently allows user to administratively bring down a line-card or fabric-ca
 }
 ```
 
-### Data Plane L3 Interfaces
+### DEBUG_COUNTER and DEBUG_COUNTER_DROP_REASON
 
-IP configuration for data plane are defined in **INTERFACE**, **VLAN_SUB_INTERFACE**,
-**PORTCHANNEL_INTERFACE** and **VLAN_INTERFACE** table. The objects
-in all four tables have the interface (could be physical port, port
-channel, vlan or vlan sub interface) that IP address is attached to as first-level key, and
-IP prefix as second-level key. IP interface address objects don't have any attributes.
-IP interface attributes, resides in those tables as well, key is the interface name
-and value is a list of field-values representing the interface attributes, e.g. loopback action.
+These tables contain information on drop counters which have been added
 
+DEBUG_COUNTER:
 ```
-{
-"INTERFACE": {
-        "Ethernet0|10.0.0.0/31": {},
-        "Ethernet4|10.0.0.2/31": {},
-        "Ethernet8|10.0.0.4/31": {}
-        "Ethernet8": {
-            "loopback_action": "drop"
-        }
-    },
+; DEBUG_COUNTER table
 
-"PORTCHANNEL_INTERFACE": {
-        "PortChannel01|10.0.0.56/31": {},
-        "PortChannel01|FC00::71/126": {},
-        "PortChannel02|10.0.0.58/31": {},
-        "PortChannel02|FC00::75/126": {}
-    },
-
-"VLAN_INTERFACE": {
-        "Vlan1000|192.168.0.1/27": {}
-    },
+key             = DEBUG_COUNTER_TABLE:name
+name            = string
+type            = (SWITCH_INGRESS_DROPS|PORT_INGRESS_DROPS|SWITCH_EGRESS_DROPS|PORT_EGRESS_DROPS)
+alias           = string (optional)
+description     = string (optional)
+group           = string (optional)
 
-"VLAN_SUB_INTERFACE": {
-        "Ethernet4.1|10.0.0.2/31": {},
-        "Ethernet4.1": {
-            "loopback_action": "drop"
-        }
+"DEBUG_COUNTER": {
+    "DEBUG_4": {
+        "alias": "BAD_DROPS",
+        "desc": "More port ingress drops",
+        "group": "BAD",
+        "type": "SWITCH_INGRESS_DROPS"
     }
 }
 ```
+```
+; DEBUG_COUNTER_DROP_REASON table
+
+key     = DEBUG_COUNTER_DROP_REASON_TABLE:name:reason
+name    = name of a counter in the DEBUG_COUNTER_TABLE
+reason  = a valid drop reason without the 'SAI_IN/OUT_DROP_REASON_' prefix (https://github.com/sonic-net/sonic-swss/blob/7a965caf4c7211afca5303191cf731858c791bcd/orchagent/debug_counter/drop_counter.cpp#L20)
 
+"DEBUG_COUNTER_DROP_REASON": {
+    "DEBUG_4|DIP_LINK_LOCAL": {},
+    "DEBUG_4|SIP_LINK_LOCAL": {}
+}
+```
 
 ### DEFAULT_LOSSLESS_BUFFER_PARAMETER
 
@@ -1145,7 +1196,7 @@ IPV4 DHPC Server related configuration are defined in **DHCP_SERVER_IPV4**, **DH
 
 ### FG_NHG
 
-The FG_NHG table provides information on Next Hop Groups, including a specified Hash Bucket Size (bucket_size) and match mode for each group.
+The FG_NHG table provides information on Next Hop Groups, including a specified Hash Bucket Size (bucket_size), match mode for each group, an optional max-next-hops attribute for prefix_based match_ mode.
 
 ```
 "FG_NHG": {
@@ -1156,7 +1207,17 @@ The FG_NHG table provides information on Next Hop Groups, including a specified
     "fgnhg_v6": {
         "bucket_size": "120",
         "match_mode": "nexthop-based"
-    }
+    },
+    "dynamic_fgnhg_v4": {
+        "bucket_size": "120",
+        "match_mode": "prefix-based",
+        "max_next_hops": "6"
+    },
+    "dynamic_fgnhg_v6": {
+        "bucket_size": "120",
+        "match_mode": "prefix-based",
+        "max_next_hops": "6"
+    }    
 }
 ```
 
@@ -1190,7 +1251,13 @@ The FG_NHG_PREFIX table provides the FG_NHG_PREFIX for which FG behavior is desi
 	},
     "fc:05::/128": {
 	    "FG_NHG": "fgnhg_v6"
-	}
+	},
+    "200.175.150.125/32": {
+        "FG_NHG": "dynamic_fgnhg_v4"
+    },
+    "fd:06::/128": {
+        "FG_NHG": "dynamic_fgnhg_v6"
+	}    
 }
 ```
 
@@ -1312,7 +1379,8 @@ The configuration is applied globally for each ECMP and LAG on a switch.
                 "INNER_DST_IP",
                 "INNER_SRC_IP",
                 "INNER_L4_DST_PORT",
-                "INNER_L4_SRC_PORT"
+                "INNER_L4_SRC_PORT",
+                "IPV6_FLOW_LABEL"
             ],
             "lag_hash": [
                 "DST_MAC",
@@ -1330,7 +1398,8 @@ The configuration is applied globally for each ECMP and LAG on a switch.
                 "INNER_DST_IP",
                 "INNER_SRC_IP",
                 "INNER_L4_DST_PORT",
-                "INNER_L4_SRC_PORT"
+                "INNER_L4_SRC_PORT",
+                "IPV6_FLOW_LABEL"
             ],
             "ecmp_hash_algorithm": "CRC",
             "lag_hash_algorithm": "CRC"
@@ -1339,30 +1408,6 @@ The configuration is applied globally for each ECMP and LAG on a switch.
 }
 ```
 
-### IPv6 Link-local
-```
-{
-    "INTERFACE": {
-        "Ethernet8": {
-            "ipv6_use_link_local_only": "disable"
-        }
-    },
-
-    "PORTCHANNEL_INTERFACE": {
-        "PortChannel01": {
-            "ipv6_use_link_local_only": "enable"
-        }
-    },
-
-    "VLAN_INTERFACE": {
-        "Vlan1000": {
-            "ipv6_use_link_local_only": "enable"
-        }
-    }
-}
-
-```
-
 ### KDUMP
 
 ```
@@ -1450,6 +1495,96 @@ loopback address can also be defined.
 }
 ```
 
+### L3 Interfaces
+
+Configuration for L3 data plane interfaces are defined in the `INTERFACE`,
+`VLAN_INTERFACE`, `VLAN_SUB_INTERFACE` and `PORTCHANNEL_INTERFACE` tables,
+respectively.
+
+The objects in all four tables have the interface as the key with the following
+required patterns:
+- `INTERFACE`: Any valid port name from the `PORT` table.  Typically `Ethernet{0-999}`.
+- `VLAN_INTERFACE`: `Vlan{1-4095}`
+- `PORTCHANNEL_INTERFACE`: `PortChannel{0-9999}`
+- `VLAN_SUB_INTERFACE`: Any valid `INTERFACE` or `PORTCHANNEL_INTERFACE` name followed by a `.` and a number between 1 and 4094.  E.g. `Ethernet1.4`
+
+
+These tables have a number of shared attributes as described below:
+ * `vrf_name`: Valid VRF name from the `VRF` table.  Default: `default`
+ * `nat_zone`: NAT Zone for this interface. `0..3`
+ * `mpls`: Enable/disable MPLS routing for the interface. `enable` or `disable`. Default `disable`.
+ * `ipv6_use_link_local_only`: Enable/Disable IPv6 link local address on interface. `enable` or `disable`. Default `disable`.
+ * `mac_addr`: Assign administrator-provided MAC address to Interface.  If not specified will use the system MAC (same for all interfaces). Not applicable to `VLAN_SUB_INTERFACE` as it will use the parent interface's mac address.
+ * `loopback_action`: Packet action when a packet ingress and gets routed on the same IP interface. `drop` or `forward`.
+
+
+```json
+
+{
+    "INTERFACE": {
+        "Ethernet0": {
+            "ipv6_use_link_local_only": "enable",
+            "mac_addr": "12:34:56:78:90:ab"
+        },
+        "Ethernet1": {
+            "loopback_action": "drop"
+        }
+    },
+    "VLAN_INTERFACE": {
+        "Vlan201": {
+            "vrf_name": "red",
+            "mac_addr": "AB:CD:EF:12:34:56"
+        }
+    },
+    "PORTCHANNEL_INTERFACE": {
+        "PortChannel101": {
+            "mac_addr": "1c:23:a8:56:de:2f"
+        }
+    },
+    "VLAN_SUB_INTERFACE": {
+        "Ethernet0.555": {
+            "vrf_name": "Blue",
+            "vlan": "555"
+        }
+    }
+}
+```
+
+#### Assigning IP addresses to L3 Interfaces
+
+The interface name and IP prefix act as multi-level key for the interface
+objects.  The IP prefixes are stored in the same tables as the interface
+attributes: `INTERFACE`, `VLAN_INTERFACE`, `VLAN_SUB_INTERFACE` and `PORTCHANNEL_INTERFACE`.
+
+In the example below we will show one interface with attributes for clarity,
+but otherwise this is simply an example of how IP addresses may be configured.
+
+```json
+{
+    "INTERFACE": {
+        "Ethernet0": {
+            "ipv6_use_link_local_only": "enable",
+            "mac_addr": "12:34:56:78:90:ab"
+        },
+        "Ethernet0|10.0.0.0/31": {},
+        "Ethernet4|10.0.0.2/31": {},
+        "Ethernet8|10.0.0.4/31": {},
+    },
+    "PORTCHANNEL_INTERFACE": {
+        "PortChannel01|10.0.0.56/31": {},
+        "PortChannel01|FC00::71/126": {},
+        "PortChannel02|10.0.0.58/31": {},
+        "PortChannel02|FC00::75/126": {}
+    },
+    "VLAN_INTERFACE": {
+        "Vlan1000|192.168.0.1/27": {}
+    },
+    "VLAN_SUB_INTERFACE": {
+        "Ethernet4.1|10.0.0.2/31": {}
+    }
+}
+```
+
 ### Loopback Interface
 
 Loopback interface configuration lies in **LOOPBACK_INTERFACE** table
@@ -2313,6 +2448,21 @@ and is listed in this table.
 }
 ```
 
+### TC to DSCP map
+
+```json
+{
+    "TC_TO_DSCP_MAP": {
+        "AZURE": {
+            "5": "10",
+            "6": "20"
+        }
+    }
+}
+```
+
+**Note:**
+* configuration is mandatory when packet trimming Asymmetric DSCP mode is used
 
 ### TC to Priority group map
 
@@ -2452,6 +2602,50 @@ example mux tunnel configuration for when tunnel_qos_remap is enabled
 }
 ```
 
+### Trimming
+
+When the lossy queue exceeds a buffer threshold, it drops packets without any notification to the destination host.
+
+When a packet is lost, it can be recovered through fast retransmission or by using timeouts.  
+Retransmission triggered by timeouts typically incurs significant latency.
+
+To help the host recover data more quickly and accurately, packet trimming is introduced.  
+This feature upon a failed packet admission to a shared buffer, will trim a packet to a configured size,  
+and try sending it on a different queue to deliver a packet drop notification to an end host.
+
+***TRIMMING***
+
+Symmetric DSCP and static queue:
+```json
+{
+    "SWITCH_TRIMMING": {
+        "GLOBAL": {
+            "size": "128",
+            "dscp_value": "48",
+            "queue_index": "6"
+        }
+    }
+}
+```
+
+Asymmetric DSCP and dynamic queue:
+```json
+{
+    "SWITCH_TRIMMING": {
+        "GLOBAL": {
+            "size": "128",
+            "dscp_value": "from-tc",
+            "tc_value": "8",
+            "queue_index": "dynamic"
+        }
+    }
+}
+```
+
+**Note:**
+* when `dscp_value` is set to `from-tc`, the `tc_value` is used for mapping to DSCP
+* when `queue_index` is set to `dynamic`, the `dscp_value` is used for mapping to queue
+
 ### Versions
 
 This table is where the curret version of the software is recorded.
@@ -2543,6 +2737,29 @@ monitoring sessions for the vnet routes and is optional.
 }
 ```
 
+### VNET_ROUTE_TUNNEL
+
+VNET_ROUTE_TUNNEL table has vnet_name|prefix as the object key, where vnet_name is the name of the VNet and prefix is the ip4 prefix associated with the route tunnel. The table includes the following attributes:
+- ENDPOINT: The endpoint/nexthop tunnel IP (mandatory). It is used to identify the endpoint of the tunnel.
+- MAC_ADDRESS: The inner destination MAC address in the encapsulated packet (optional).  It should be a 12-hexadeimal digit value.
+- VNI: The VNI value in the encapsulated packet (optional). It should be a numeric value.
+
+```
+{
+  "VNET_ROUTE_TUNNEL": {
+    "Vnet_2000|100.100.1.1/32": {
+        "endpoint": "192.168.1.1",
+        "mac_address": "f9:22:83:99:22:a2"
+    },
+    "Vnetv4_v4-0|10.0.1.0/24": {
+        "endpoint": "192.168.1.2",
+        "mac_address": "f8:22:83:99:22:a2",
+        "vni": "10012"
+    }
+  }
+}
+```
+
 ### VOQ INBAND INTERFACE
 
 VOQ_INBAND_INTERFACE holds the name of the inband system port dedicated for cpu communication. At this time, only inband_type of "port" is supported
@@ -2559,33 +2776,73 @@ VOQ_INBAND_INTERFACE holds the name of the inband system port dedicated for cpu
 
 ### VXLAN
 
-VXLAN_TUNNEL holds the VTEP source ip configuration.
+VXLAN_TUNNEL holds the VTEP source ip configuration (maximum 2 tunnels).
 VXLAN_TUNNEL_MAP holds the vlan to vni and vni to vlan mapping configuration.
 VXLAN_EVPN_NVO holds the VXLAN_TUNNEL object to be used for BGP-EVPN discovered tunnels.
 
+Single tunnel example:
 ```
 {
-"VXLAN_TUNNEL": {
+    "VXLAN_TUNNEL": {
         "vtep1": {
             "src_ip": "10.10.10.10",
             "dst_ip": "12.12.12.12"
         }
-  }
-"VXLAN_TUNNEL_MAP" : {
+    },
+    "VXLAN_TUNNEL_MAP": {
         "vtep1|map_1000_Vlan100": {
-           "vni": "1000",
-           "vlan": "100"
-         },
-        "vtep1|testmap": {
-           "vni": "22000",
-           "vlan": "70"
-         },
-  }
-  "VXLAN_EVPN_NVO": {
+            "vni": "1000",
+            "vlan": "100"
+        },
+        "vtep1|map_22000_Vlan70": {
+            "vni": "22000",
+            "vlan": "70"
+        }
+    },
+    "VXLAN_EVPN_NVO": {
         "nvo1": {
             "source_vtep": "vtep1"
         }
-  }
+    }
+}
+```
+
+Dual tunnel example:
+```
+{
+    "VXLAN_TUNNEL": {
+        "vtep1": {
+            "src_ip": "10.10.10.10",
+            "dst_ip": "12.12.12.12"
+        },
+        "vtep2": {
+            "src_ip": "10.20.10.10",
+            "dst_ip": "20.20.20.20"
+        }
+    },
+    "VXLAN_TUNNEL_MAP": {
+        "vtep1|map_1000_Vlan100": {
+            "vni": "1000",
+            "vlan": "100"
+        },
+        "vtep1|map_22000_Vlan70": {
+            "vni": "22000",
+            "vlan": "70"
+        },
+        "vtep2|map_2000_Vlan200": {
+            "vni": "2000",
+            "vlan": "200"
+        },
+        "vtep2|map_3000_Vlan300": {
+            "vni": "3000",
+            "vlan": "300"
+        }
+    },
+    "VXLAN_EVPN_NVO": {
+        "nvo1": {
+            "source_vtep": "vtep1"
+        }
+    }
 }
 ```
 
@@ -2989,42 +3246,180 @@ The ASIC_SENSORS table introduces the asic sensors polling configuration when th
 }
 ```
 
-### DPU PORT Configuration^M
+### DPU Configuration
 
-The **DPU_PORT** table introduces the configuration for the DPUs(Data Processing Unit) PORT information available on the platform.
+The **DPU** table introduces the configuration for the DPUs (Data Processing Unit) information available on the platform.
 
 ```json
 {
-    "DPU_PORT": {
-        "dpu0": {
+    "DPU": {
+        "str-8102-t1-dpu0": {
             "state": "up",
+            "local_port": "Ethernet228",
             "vip_ipv4": "192.168.1.1",
             "vip_ipv6": "2001:db8::10",
             "pa_ipv4": "192.168.1.10",
             "pa_ipv6": "2001:db8::10",
+            "midplane_ipv4": "169.254.200.245",
+            "dpu_id": "0",
             "vdpu_id": "vdpu0",
-            "gnmi_port": "50052"
+            "gnmi_port": "50052",
+            "orchagent_zmq_port": "50"
         },
-        "dpu1": {
+        "str-8102-t1-dpu1": {
             "state": "down",
+            "local_port": "Ethernet232",
             "vip_ipv4": "192.168.1.2",
             "vip_ipv6": "2001:db8::20",
             "pa_ipv4": "192.168.1.20",
             "pa_ipv6": "2001:db8::20",
+            "midplane_ipv4": "169.254.150.20",
+            "dpu_id": "1",
             "vdpu_id": "vdpu1",
-            "gnmi_port": "50052"
+            "gnmi_port": "50052",
+            "orchagent_zmq_port": "50"
         }
     }
 }
 ```
 
 **state**: Administrative status of the DPU (`up` or `down`).
+
+**local_port**: local port mapped to DPU port on the switch.
+
 **vip_ipv4**: VIP IPv4 address from minigraph.
+
 **vip_ipv6**: VIP IPv6 address from minigraph.
+
 **pa_ipv4**: PA IPv4 address from minigraph.
+
 **pa_ipv6**: PA IPv6 address from minigraph.
+
+**dpu_id**: Id of the DPU from minigraph.
+
 **vdpu_id**: ID of VDPUs from minigraph.
-**gnmi_port**: Port gNMI runs on.
+
+**gnmi_port**: TCP listening port for gnmi service on DPU.
+
+**orchagent_zmq_port**: TCP listening port for ZMQ service on DPU orchagent.
+
+### REMOTE_DPU Configuration
+
+The **REMOTE_DPU** table introduces the configuration for the remote DPUs (Data Processing Unit) accessible on other machines.
+
+```json
+{
+    "REMOTE_DPU": {
+        "str-8103-t1-dpu0": {
+            "type": "typeA",
+            "pa_ipv4": "192.168.2.1",
+            "pa_ipv6": "2001:db8::30",
+            "npu_ipv4": "192.168.2.10",
+            "npu_ipv6": "2001:db8::40",
+            "dpu_id": "0",
+            "swbus_port": "23606"
+        },
+        "str-8103-t1-dpu1": {
+            "type": "typeB",
+            "pa_ipv4": "192.168.2.2",
+            "pa_ipv6": "2001:db8::50",
+            "npu_ipv4": "192.168.2.20",
+            "npu_ipv6": "2001:db8::60",
+            "dpu_id": "1",
+            "swbus_port": "23607"
+        }
+    }
+}
+```
+
+**type**: Type of the DPU.
+
+**pa_ipv4**: DPU IPv4 physical address.
+
+**pa_ipv6**: DPU IPv6 physical address.
+
+**npu_ipv4**: Loopback IPv4 address of remote NPU.
+
+**npu_ipv6**: Loopback IPv6 address of remote NPU.
+
+**dpu_id**: ID of the DPU from minigraph.
+
+**swbus_port**: TCP listening port for swbus service for this DPU. Must be 23606 + dpu_id.
+
+### VDPU Configuration
+
+The **VDPU** table introduces the configuration for the VDPUs (Virtual Data Processing Unit) information available on the platform.
+
+```json
+{
+    "VDPU": {
+        "vdpu0": {
+            "profile": "",
+            "tier": "",
+            "main_dpu_ids": ["dpu0"]
+        },
+        "vdpu1": {
+            "profile": "",
+            "tier": "",
+            "main_dpu_ids": ["dpu1"]
+        },
+        "vdpu2": {
+            "profile": "",
+            "tier": "",
+            "main_dpu_ids": ["dpu2"]
+        },
+        "vdpu3": {
+            "profile": "",
+            "tier": "",
+            "main_dpu_ids": ["dpu3"]
+        }
+    }
+}
+```
+
+**profile**: VDPU profile. Currently unused, reserved for future use.
+
+**tier**: VDPU tier. Currently unused, reserved for future use.
+
+**main_dpu_ids**: Main DPUs involved in this VDPU.
+
+### DASH HA Global Configuration
+
+The **DASH_HA_GLOBAL_CONFIG** table introduces the configuration for the DASH High Availability global settings available on the platform.
+Like NTP global configuration, DASH HA global configuration must have one entry with the key "global".
+
+```json
+{
+    "DASH_HA_GLOBAL_CONFIG": {
+        "global": {
+            "cp_data_channel_port": "11362",
+            "dp_channel_port": "11368",
+            "dp_channel_src_port_min": "49152",
+            "dp_channel_src_port_max": "53247",
+            "dp_channel_probe_interval_ms": "100",
+            "dp_channel_probe_fail_threshold": "3",
+            "dpu_bfd_probe_interval_in_ms": "100",
+            "dpu_bfd_probe_multiplier": "3"
+        }
+    }
+}
+```
+
+**cp_data_channel_port**: Control plane data channel port, used for bulk sync.
+
+**dp_channel_port**: Destination port when tunneling packets via DPU-to-DPU data plane channel.
+
+**dp_channel_src_port_min**: Minimum source port used when tunneling packets via DPU-to-DPU data plane channel.
+
+**dp_channel_src_port_max**: Maximum source port used when tunneling packets via DPU-to-DPU data plane channel.
+
+**dp_channel_probe_interval_ms**: Interval in milliseconds for sending each DPU-to-DPU data path probe.
+
+**dp_channel_probe_fail_threshold**: Number of probe failures needed to consider data plane channel as dead.
+
+**dpu_bfd_probe_interval_in_ms**: Interval in milliseconds for DPU BFD probe.
+
+**dpu_bfd_probe_multiplier**: Number of DPU BFD probe failures before considering the probe as down.
 
 # For Developers
 
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index ac670d49c1f..a979a0c8c7f 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -9,6 +9,143 @@
 with open('README.rst') as readme_file:
     readme = readme_file.read()
 
+# List of yang file names to be included in the wheel.
+# Specify only the file basenames here; directory prefixes will be added automatically.
+yang_files = [
+    'sonic-acl.yang',
+    'sonic-auto_techsupport.yang',
+    'sonic-bgp-bbr.yang',
+    'sonic-banner.yang',
+    'sonic-bgp-common.yang',
+    'sonic-bgp-device-global.yang',
+    'sonic-bgp-global.yang',
+    'sonic-bgp-monitor.yang',
+    'sonic-bgp-internal-neighbor.yang',
+    'sonic-bgp-neighbor.yang',
+    'sonic-bgp-peergroup.yang',
+    'sonic-bgp-peerrange.yang',
+    'sonic-bgp-allowed-prefix.yang',
+    'sonic-bgp-voq-chassis-neighbor.yang',
+    'sonic-breakout_cfg.yang',
+    'sonic-buffer-pg.yang',
+    'sonic-buffer-pool.yang',
+    'sonic-buffer-port-ingress-profile-list.yang',
+    'sonic-buffer-port-egress-profile-list.yang',
+    'sonic-buffer-profile.yang',
+    'sonic-buffer-queue.yang',
+    'sonic-cable-length.yang',
+    'sonic-chassis-module.yang',
+    'sonic-copp.yang',
+    'sonic-console.yang',
+    'sonic-crm.yang',
+    'sonic-dash.yang',
+    'sonic-debug-counter.yang',
+    'sonic-default-lossless-buffer-parameter.yang',
+    'sonic-device_metadata.yang',
+    'sonic-device_neighbor.yang',
+    'sonic-device_neighbor_metadata.yang',
+    'sonic-dhcp-server.yang',
+    'sonic-dhcpv6-relay.yang',
+    'sonic-dns.yang',
+    'sonic-events-bgp.yang',
+    'sonic-events-common.yang',
+    'sonic-events-dhcp-relay.yang',
+    'sonic-events-host.yang',
+    'sonic-events-swss.yang',
+    'sonic-events-syncd.yang',
+    'sonic-extension.yang',
+    'sonic-fabric-monitor.yang',
+    'sonic-fabric-port.yang',
+    'sonic-flex_counter.yang',
+    'sonic-fine-grained-ecmp.yang',
+    'sonic-feature.yang',
+    'sonic-fips.yang',
+    'sonic-hash.yang',
+    'sonic-trimming.yang',
+    'sonic-system-defaults.yang',
+    'sonic-interface.yang',
+    'sonic-kdump.yang',
+    'sonic-kubernetes_master.yang',
+    'sonic-loopback-interface.yang',
+    'sonic-lossless-traffic-pattern.yang',
+    'sonic-memory-statistics.yang',
+    'sonic-mgmt_interface.yang',
+    'sonic-mgmt_port.yang',
+    'sonic-mgmt_vrf.yang',
+    'sonic-mirror-session.yang',
+    'sonic-mpls-tc-map.yang',
+    'sonic-mux-cable.yang',
+    'sonic-mux-linkmgr.yang',
+    'sonic-neigh.yang',
+    'sonic-ntp.yang',
+    'sonic-nat.yang',
+    'sonic-nvgre-tunnel.yang',
+    'sonic-passwh.yang',
+    'sonic-ssh-server.yang',
+    'sonic-pbh.yang',
+    'sonic-port.yang',
+    'sonic-policer.yang',
+    'sonic-portchannel.yang',
+    'sonic-pfcwd.yang',
+    'sonic-route-common.yang',
+    'sonic-route-map.yang',
+    'sonic-routing-policy-sets.yang',
+    'sonic-sflow.yang',
+    'sonic-snmp.yang',
+    'sonic-suppress-asic-sdk-health-event.yang',
+    'sonic-syslog.yang',
+    'sonic-system-aaa.yang',
+    'sonic-system-tacacs.yang',
+    'sonic-system-radius.yang',
+    'sonic-system-ldap.yang',
+    'sonic-subnet-decap.yang',
+    'sonic-telemetry.yang',
+    'sonic-telemetry_client.yang',
+    'sonic-gnmi.yang',
+    'sonic-tunnel.yang',
+    'sonic-types.yang',
+    'sonic-versions.yang',
+    'sonic-vlan.yang',
+    'sonic-vnet.yang',
+    'sonic-voq-inband-interface.yang',
+    'sonic-vxlan.yang',
+    'sonic-vrf.yang',
+    'sonic-mclag.yang',
+    'sonic-vlan-sub-interface.yang',
+    'sonic-warm-restart.yang',
+    'sonic-lldp.yang',
+    'sonic-scheduler.yang',
+    'sonic-wred-profile.yang',
+    'sonic-queue.yang',
+    'sonic-restapi.yang',
+    'sonic-dscp-fc-map.yang',
+    'sonic-exp-fc-map.yang',
+    'sonic-dscp-tc-map.yang',
+    'sonic-dhcp-server-ipv4.yang',
+    'sonic-dot1p-tc-map.yang',
+    'sonic-storm-control.yang',
+    'sonic-tc-priority-group-map.yang',
+    'sonic-tc-queue-map.yang',
+    'sonic-peer-switch.yang',
+    'sonic-tc-dscp-map.yang',
+    'sonic-pfc-priority-queue-map.yang',
+    'sonic-pfc-priority-priority-group-map.yang',
+    'sonic-logger.yang',
+    'sonic-port-qos-map.yang',
+    'sonic-static-route.yang',
+    'sonic-system-port.yang',
+    'sonic-macsec.yang',
+    'sonic-bgp-sentinel.yang',
+    'sonic-bgp-prefix-list.yang',
+    'sonic-asic-sensors.yang',
+    'sonic-bmp.yang',
+    'sonic-xcvrd-log.yang',
+    'sonic-grpcclient.yang',
+    'sonic-serial-console.yang',
+    'sonic-smart-switch.yang',
+    'sonic-srv6.yang',
+]
+
 class my_build_py(build_py):
     def run(self):
         if not self.dry_run:
@@ -83,216 +220,8 @@ def run(self):
     version='1.0',
     cmdclass={'build_py': my_build_py},
     data_files=[
-        ('yang-models', ['./yang-models/sonic-acl.yang',
-                         './yang-models/sonic-auto_techsupport.yang',
-                         './yang-models/sonic-bgp-bbr.yang',
-                         './yang-models/sonic-banner.yang',
-                         './yang-models/sonic-bgp-common.yang',
-                         './yang-models/sonic-bgp-device-global.yang',
-                         './yang-models/sonic-bgp-global.yang',
-                         './yang-models/sonic-bgp-monitor.yang',
-                         './yang-models/sonic-bgp-internal-neighbor.yang',
-                         './yang-models/sonic-bgp-neighbor.yang',
-                         './yang-models/sonic-bgp-peergroup.yang',
-                         './yang-models/sonic-bgp-peerrange.yang',
-                         './yang-models/sonic-bgp-allowed-prefix.yang',
-                         './yang-models/sonic-bgp-voq-chassis-neighbor.yang',
-                         './yang-models/sonic-breakout_cfg.yang',
-                         './yang-models/sonic-buffer-pg.yang',
-                         './yang-models/sonic-buffer-pool.yang',
-                         './yang-models/sonic-buffer-port-ingress-profile-list.yang',
-                         './yang-models/sonic-buffer-port-egress-profile-list.yang',
-                         './yang-models/sonic-buffer-profile.yang',
-                         './yang-models/sonic-buffer-queue.yang',
-                         './yang-models/sonic-cable-length.yang',
-                         './yang-models/sonic-chassis-module.yang',
-                         './yang-models/sonic-copp.yang',
-                         './yang-models/sonic-console.yang',
-                         './yang-models/sonic-crm.yang',
-                         './yang-models/sonic-dash.yang',
-                         './yang-models/sonic-default-lossless-buffer-parameter.yang',
-                         './yang-models/sonic-device_metadata.yang',
-                         './yang-models/sonic-device_neighbor.yang',
-                         './yang-models/sonic-device_neighbor_metadata.yang',
-                         './yang-models/sonic-dhcp-server.yang',
-                         './yang-models/sonic-dhcpv6-relay.yang',
-                         './yang-models/sonic-dns.yang',
-                         './yang-models/sonic-events-bgp.yang',
-                         './yang-models/sonic-events-common.yang',
-                         './yang-models/sonic-events-dhcp-relay.yang',
-                         './yang-models/sonic-events-host.yang',
-                         './yang-models/sonic-events-swss.yang',
-                         './yang-models/sonic-events-syncd.yang',
-                         './yang-models/sonic-extension.yang',
-                         './yang-models/sonic-fabric-monitor.yang',
-                         './yang-models/sonic-fabric-port.yang',
-                         './yang-models/sonic-flex_counter.yang',
-                         './yang-models/sonic-fine-grained-ecmp.yang',
-                         './yang-models/sonic-feature.yang',
-                         './yang-models/sonic-fips.yang',
-                         './yang-models/sonic-hash.yang',
-                         './yang-models/sonic-system-defaults.yang',
-                         './yang-models/sonic-interface.yang',
-                         './yang-models/sonic-kdump.yang',
-                         './yang-models/sonic-kubernetes_master.yang',
-                         './yang-models/sonic-loopback-interface.yang',
-                         './yang-models/sonic-lossless-traffic-pattern.yang',
-                         './yang-models/sonic-memory-statistics.yang',
-                         './yang-models/sonic-mgmt_interface.yang',
-                         './yang-models/sonic-mgmt_port.yang',
-                         './yang-models/sonic-mgmt_vrf.yang',
-                         './yang-models/sonic-mirror-session.yang',
-                         './yang-models/sonic-mpls-tc-map.yang',
-                         './yang-models/sonic-mux-cable.yang',
-                         './yang-models/sonic-mux-linkmgr.yang',
-                         './yang-models/sonic-neigh.yang',
-                         './yang-models/sonic-ntp.yang',
-                         './yang-models/sonic-nat.yang',
-                         './yang-models/sonic-nvgre-tunnel.yang',
-                         './yang-models/sonic-passwh.yang',
-                         './yang-models/sonic-ssh-server.yang',
-                         './yang-models/sonic-pbh.yang',
-                         './yang-models/sonic-port.yang',
-                         './yang-models/sonic-policer.yang',
-                         './yang-models/sonic-portchannel.yang',
-                         './yang-models/sonic-pfcwd.yang',
-                         './yang-models/sonic-route-common.yang',
-                         './yang-models/sonic-route-map.yang',
-                         './yang-models/sonic-routing-policy-sets.yang',
-                         './yang-models/sonic-sflow.yang',
-                         './yang-models/sonic-snmp.yang',
-                         './yang-models/sonic-suppress-asic-sdk-health-event.yang',
-                         './yang-models/sonic-syslog.yang',
-                         './yang-models/sonic-system-aaa.yang',
-                         './yang-models/sonic-system-tacacs.yang',
-                         './yang-models/sonic-system-radius.yang',
-                         './yang-models/sonic-system-ldap.yang',
-                         './yang-models/sonic-subnet-decap.yang',
-                         './yang-models/sonic-telemetry.yang',
-                         './yang-models/sonic-telemetry_client.yang',
-                         './yang-models/sonic-gnmi.yang',
-                         './yang-models/sonic-tunnel.yang',
-                         './yang-models/sonic-types.yang',
-                         './yang-models/sonic-versions.yang',
-                         './yang-models/sonic-vlan.yang',
-                         './yang-models/sonic-vnet.yang',
-                         './yang-models/sonic-voq-inband-interface.yang',
-                         './yang-models/sonic-vxlan.yang',
-                         './yang-models/sonic-vrf.yang',
-                         './yang-models/sonic-mclag.yang',
-                         './yang-models/sonic-vlan-sub-interface.yang',
-                         './yang-models/sonic-warm-restart.yang',
-                         './yang-models/sonic-lldp.yang',
-                         './yang-models/sonic-scheduler.yang',
-                         './yang-models/sonic-wred-profile.yang',
-                         './yang-models/sonic-queue.yang',
-                         './yang-models/sonic-restapi.yang',
-                         './yang-models/sonic-dscp-fc-map.yang',
-                         './yang-models/sonic-exp-fc-map.yang',
-                         './yang-models/sonic-dscp-tc-map.yang',
-                         './yang-models/sonic-dhcp-server-ipv4.yang',
-                         './yang-models/sonic-dot1p-tc-map.yang',
-                         './yang-models/sonic-storm-control.yang',
-                         './yang-models/sonic-tc-priority-group-map.yang',
-                         './yang-models/sonic-tc-queue-map.yang',
-                         './yang-models/sonic-peer-switch.yang',
-                         './yang-models/sonic-tc-dscp-map.yang',
-                         './yang-models/sonic-pfc-priority-queue-map.yang',
-                         './yang-models/sonic-pfc-priority-priority-group-map.yang',
-                         './yang-models/sonic-logger.yang',
-                         './yang-models/sonic-port-qos-map.yang',
-                         './yang-models/sonic-static-route.yang',
-                         './yang-models/sonic-system-port.yang',
-                         './yang-models/sonic-macsec.yang',
-                         './yang-models/sonic-bgp-sentinel.yang',
-                         './yang-models/sonic-bgp-prefix-list.yang',
-                         './yang-models/sonic-asic-sensors.yang',
-                         './yang-models/sonic-bmp.yang',
-                         './yang-models/sonic-xcvrd-log.yang',
-                         './yang-models/sonic-grpcclient.yang',
-                         './yang-models/sonic-serial-console.yang',
-                         './yang-models/sonic-smart-switch.yang',
-                         './yang-models/sonic-srv6.yang']),
-        ('cvlyang-models', ['./cvlyang-models/sonic-acl.yang',
-                         './cvlyang-models/sonic-banner.yang',
-                         './cvlyang-models/sonic-bgp-common.yang',
-                         './cvlyang-models/sonic-bgp-global.yang',
-                         './cvlyang-models/sonic-bgp-monitor.yang',
-                         './cvlyang-models/sonic-bgp-neighbor.yang',
-                         './cvlyang-models/sonic-bgp-peergroup.yang',
-                         './cvlyang-models/sonic-bgp-peerrange.yang',
-                         './cvlyang-models/sonic-bgp-allowed-prefix.yang',
-                         './cvlyang-models/sonic-breakout_cfg.yang',
-                         './cvlyang-models/sonic-copp.yang',
-                         './cvlyang-models/sonic-crm.yang',
-                         './cvlyang-models/sonic-device_metadata.yang',
-                         './cvlyang-models/sonic-device_neighbor.yang',
-                         './cvlyang-models/sonic-events-bgp.yang',
-                         './cvlyang-models/sonic-events-common.yang',
-                         './cvlyang-models/sonic-events-dhcp-relay.yang',
-                         './cvlyang-models/sonic-events-host.yang',
-                         './cvlyang-models/sonic-events-swss.yang',
-                         './cvlyang-models/sonic-events-syncd.yang',
-                         './cvlyang-models/sonic-device_neighbor_metadata.yang',
-                         './cvlyang-models/sonic-extension.yang',
-                         './cvlyang-models/sonic-fabric-monitor.yang',
-                         './cvlyang-models/sonic-fabric-port.yang',
-                         './cvlyang-models/sonic-flex_counter.yang',
-                         './cvlyang-models/sonic-feature.yang',
-                         './cvlyang-models/sonic-fine-grained-ecmp.yang',
-                         './cvlyang-models/sonic-fips.yang',
-                         './cvlyang-models/sonic-hash.yang',
-                         './cvlyang-models/sonic-system-defaults.yang',
-                         './cvlyang-models/sonic-interface.yang',
-                         './cvlyang-models/sonic-kdump.yang',
-                         './cvlyang-models/sonic-kubernetes_master.yang',
-                         './cvlyang-models/sonic-loopback-interface.yang',
-                         './cvlyang-models/sonic-mgmt_interface.yang',
-                         './cvlyang-models/sonic-memory-statistics.yang',
-                         './cvlyang-models/sonic-mgmt_port.yang',
-                         './cvlyang-models/sonic-mgmt_vrf.yang',
-                         './cvlyang-models/sonic-ntp.yang',
-                         './cvlyang-models/sonic-nat.yang',
-                         './cvlyang-models/sonic-nvgre-tunnel.yang',
-                         './cvlyang-models/sonic-pbh.yang',
-                         './cvlyang-models/sonic-ssh-server.yang',
-                         './cvlyang-models/sonic-policer.yang',
-                         './cvlyang-models/sonic-port.yang',
-                         './cvlyang-models/sonic-portchannel.yang',
-                         './cvlyang-models/sonic-pfcwd.yang',
-                         './cvlyang-models/sonic-route-common.yang',
-                         './cvlyang-models/sonic-route-map.yang',
-                         './cvlyang-models/sonic-routing-policy-sets.yang',
-                         './cvlyang-models/sonic-sflow.yang',
-                         './cvlyang-models/sonic-snmp.yang',
-                         './cvlyang-models/sonic-system-aaa.yang',
-                         './cvlyang-models/sonic-system-tacacs.yang',
-                         './cvlyang-models/sonic-telemetry.yang',
-                         './cvlyang-models/sonic-telemetry_client.yang',
-                         './cvlyang-models/sonic-gnmi.yang',
-                         './cvlyang-models/sonic-types.yang',
-                         './cvlyang-models/sonic-versions.yang',
-                         './cvlyang-models/sonic-vlan.yang',
-                         './cvlyang-models/sonic-vrf.yang',
-                         './cvlyang-models/sonic-warm-restart.yang',
-                         './cvlyang-models/sonic-lldp.yang',
-                         './cvlyang-models/sonic-scheduler.yang',
-                         './cvlyang-models/sonic-wred-profile.yang',
-                         './cvlyang-models/sonic-queue.yang',
-                         './cvlyang-models/sonic-dscp-tc-map.yang',
-                         './cvlyang-models/sonic-dot1p-tc-map.yang',
-                         './cvlyang-models/sonic-tc-priority-group-map.yang',
-                         './cvlyang-models/sonic-tc-queue-map.yang',
-                         './cvlyang-models/sonic-pfc-priority-queue-map.yang',
-                         './cvlyang-models/sonic-pfc-priority-priority-group-map.yang',
-                         './cvlyang-models/sonic-logger.yang',
-                         './cvlyang-models/sonic-port-qos-map.yang',
-                         './cvlyang-models/sonic-static-route.yang',
-                         './cvlyang-models/sonic-system-port.yang',
-                         './cvlyang-models/sonic-macsec.yang',
-                         './cvlyang-models/sonic-bmp.yang',
-                         './cvlyang-models/sonic-serial-console.yang',
-                         './cvlyang-models/sonic-bgp-sentinel.yang']),
+        ('yang-models', ['./yang-models/'+y for y in yang_files]),
+        ('cvlyang-models', ['./cvlyang-models/'+y for y in yang_files]),
     ],
     zip_safe=False,
 )
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 710151ef666..721a0fa7b42 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -134,7 +134,8 @@
                 "PortChannel0003": {
                     "nat_zone": "1",
                     "loopback_action": "drop",
-                    "ipv6_use_link_local_only": "enable"
+                    "ipv6_use_link_local_only": "enable",
+                    "mac_addr": "02:26:9b:73:c1:1a"
                 },
                 "PortChannel0004": {"vrf_name": "Vrf_blue"},
                 "PortChannel42|10.1.0.1/31": {},
@@ -151,7 +152,8 @@
             "Vlan111": {
                 "nat_zone": "0",
                 "loopback_action": "forward",
-                "ipv6_use_link_local_only": "disable"
+                "ipv6_use_link_local_only": "disable",
+                "mac_addr": "02:ab:cd:ef:12:34"
             },
             "Vlan777": {},
             "Vlan111|2a04:5555:45:6709::1/64": {
@@ -341,6 +343,12 @@
                 "PACKET_ACTION": "FORWARD",
                 "TUNNEL_TERM": "true",
                 "DST_IP": "1.1.1.1/32"
+            },
+            "SRC-MAC-REWRITE-TABLE|RULE0": {
+                "PRIORITY": "960",
+                "INNER_SRC_MAC_REWRITE_ACTION": "22:33:44:55:66:11",                     
+                "INNER_SRC_IP": "1.1.1.1/32",
+                "TUNNEL_VNI": "45"
             }
         },
         "SWITCH_HASH": {
@@ -367,6 +375,14 @@
                 "lag_hash_algorithm": "XOR"
             }
         },
+        "SWITCH_TRIMMING": {
+            "GLOBAL": {
+                "size": "128",
+                "dscp_value": "from-tc",
+                "tc_value": "6",
+                "queue_index": "6"
+            }
+        },
         "DEVICE_METADATA": {
             "localhost": {
                 "buffer_model": "dynamic",
@@ -1104,9 +1120,24 @@
                     "Ethernet0",
                     "PortChannel0003"
                 ]
+            },
+            "SRC-MAC-REWRITE-TABLE": {
+                "ports": [
+                    "Ethernet14",
+                    "Ethernet15",
+                    "Ethernet23",
+                    "Ethernet30",
+                    "Ethernet31",
+                    "Ethernet18",
+                    "Ethernet19",
+                    "Ethernet25",
+                    "Ethernet24",
+                    "PortChannel0003"
+                ],
+                "stage": "EGRESS",
+                "type": "INNER_SRC_MAC_REWRITE_TABLE_TYPE"
             }
-
-        },
+        }, 
         "PBH_HASH_FIELD": {
             "inner_ip_proto": {
                 "hash_field": "INNER_IP_PROTOCOL",
@@ -1201,7 +1232,8 @@
             "Ethernet18": {
                 "nat_zone": "1",
                 "loopback_action": "forward",
-                "ipv6_use_link_local_only": "enable"
+                "ipv6_use_link_local_only": "enable",
+                "mac_addr": "12:34:56:78:90:ab"
             },
             "Ethernet112|2a04:5555:40:a709::2/126": {
                 "scope": "global",
@@ -1308,7 +1340,8 @@
         },
         "LOOPBACK_INTERFACE": {
             "Loopback0": {
-               "nat_zone": "2"
+               "nat_zone": "2",
+               "admin_status": "up"
             },
             "Loopback0|2a04:5555:40:4::4e9/128": {
                 "scope": "global",
@@ -1390,10 +1423,14 @@
         },
         "GNMI_CLIENT_CERT": {
             "testcert1": {
-                "role": "RW"
+                "role": [
+                        "RW"
+                ]
             },
             "testcert2": {
-                "role": "RO"
+                "role": [
+                        "RO"
+                ]
             }
         },
         "TUNNEL": {
@@ -1509,6 +1546,10 @@
             "ENI": {
                 "FLEX_COUNTER_STATUS": "enable",
                 "POLL_INTERVAL": "10000"
+            },
+            "SRV6": {
+                "FLEX_COUNTER_STATUS": "enable",
+                "POLL_INTERVAL": "10000"
             }
         },
         "FLOW_COUNTER_ROUTE_PATTERN": {
@@ -2337,6 +2378,13 @@
                 "overlay_dmac": "22:33:44:55:66:77"
             }
         },
+        "VNET_ROUTE_TUNNEL" : {
+            "vnet1|10.0.0.0/24" : {
+                "endpoint": "192.168.1.2",
+                "mac_address": "f9:22:83:99:22:a2",
+                "vni": "10011"
+            }
+        },
         "PORT_QOS_MAP": {
            "Ethernet0": {
                "dot1p_to_tc_map" : "Dot1p_to_tc_map1",
@@ -2413,6 +2461,7 @@
         "MUX_CABLE": {
             "Ethernet4": {
                 "cable_type": "active-active",
+                "prober_type": "software",
                 "server_ipv4": "192.168.0.2/32",
                 "server_ipv6": "fc02:1000::30/128",
                 "soc_ipv4": "192.168.0.3/32",
@@ -2607,7 +2656,20 @@
                      "PORT",
                      "PORTCHANNEL"
                  ]
-             }
+             },
+             "INNER_SRC_MAC_REWRITE_TABLE_TYPE": {
+                "ACTIONS": [
+                    "INNER_SRC_MAC_REWRITE_ACTION"
+                ],
+                "MATCHES": [
+                    "INNER_SRC_IP",
+                    "TUNNEL_VNI"
+                ],
+                "BIND_POINTS": [
+                    "PORT",
+                    "PORTCHANNEL"
+                ]
+            }
         },
 
         "SNMP": {
@@ -2729,6 +2791,11 @@
             "nhg2": {
                 "bucket_size": "32",
                 "match_mode": "route-based"
+            },
+            "nhg3": {
+                "bucket_size": "24",
+                "match_mode": "prefix-based",
+                "max_next_hops": "6"
             }
         },
         "FG_NHG_PREFIX": {
@@ -2737,6 +2804,9 @@
             },
             "192.168.0.0/16": {
                 "FG_NHG": "nhg2"
+            },
+            "172.17.0.1/32": {
+                "FG_NHG": "nhg3"
             }
         },
         "FIPS":{
@@ -2781,24 +2851,88 @@
                 "midplane_interface": "dpu1"
             }
         },
-        "DPU_PORT": {
-            "dpu0": {
+        "DPU": {
+            "str-8102-t1-dpu0": {
                 "state": "up",
+                "local_port": "Ethernet228",
                 "vip_ipv4": "192.168.1.1",
                 "vip_ipv6": "2001:db8::10",
                 "pa_ipv4": "192.168.1.10",
                 "pa_ipv6": "2001:db8::10",
+                "midplane_ipv4": "169.254.200.245",
+                "dpu_id": "0",
                 "vdpu_id": "vdpu0",
-                "gnmi_port": "50052"
+                "gnmi_port": "50052",
+                "orchagent_zmq_port": "50",
+                "swbus_port": "23607"
             },
-            "dpu1": {
+            "str-8102-t1-dpu1": {
                 "state": "down",
+                "local_port": "Ethernet232",
                 "vip_ipv4": "192.168.1.2",
                 "vip_ipv6": "2001:db8::20",
                 "pa_ipv4": "192.168.1.20",
                 "pa_ipv6": "2001:db8::20",
+                "midplane_ipv4": "169.254.150.20",
+                "dpu_id": "1",
                 "vdpu_id": "vdpu1",
-                "gnmi_port": "50052"
+                "gnmi_port": "50052",
+                "orchagent_zmq_port": "50",
+                "swbus_port": "23607"
+            }
+        },
+        "REMOTE_DPU": {
+            "str-8103-t1-dpu0": {
+                "type": "typeA",
+                "pa_ipv4": "192.168.2.1",
+                "pa_ipv6": "2001:db8::30",
+                "npu_ipv4": "192.168.2.10",
+                "npu_ipv6": "2001:db8::40",
+                "dpu_id": "0",
+                "swbus_port": "23606"
+            },
+            "str-8103-t1-dpu1": {
+                "type": "typeB",
+                "pa_ipv4": "192.168.2.2",
+                "pa_ipv6": "2001:db8::50",
+                "npu_ipv4": "192.168.2.20",
+                "npu_ipv6": "2001:db8::60",
+                "dpu_id": "1",
+                "swbus_port": "23607"
+            }
+        },
+        "VDPU": {
+            "vdpu0": {
+                "profile": "none",
+                "tier": "none",
+                "main_dpu_ids": ["dpu0"]
+            },
+            "vdpu1": {
+                "profile": "none",
+                "tier": "none",
+                "main_dpu_ids": ["dpu1"]
+            },
+            "vdpu2": {
+                "profile": "none",
+                "tier": "none",
+                "main_dpu_ids": ["dpu2"]
+            },
+            "vdpu3": {
+                "profile": "none",
+                "tier": "none",
+                "main_dpu_ids": ["dpu3"]
+            }
+        },
+        "DASH_HA_GLOBAL_CONFIG": {
+            "global": {
+                "cp_data_channel_port": "11362",
+                "dp_channel_port": "11368",
+                "dp_channel_src_port_min": "49152",
+                "dp_channel_src_port_max": "53247",
+                "dp_channel_probe_interval_ms": "100",
+                "dp_channel_probe_fail_threshold": "3",
+                "dpu_bfd_probe_interval_in_ms": "100",
+                "dpu_bfd_probe_multiplier": "3"
             }
         },
 	"XCVRD_LOG": {
@@ -2856,6 +2990,18 @@
         "PREFIX_LIST": {
             "ANCHOR_PREFIX|10.0.0.0/8" : {},
             "ANCHOR_PREFIX|FC00::/48" : {}
+        },
+        "DEBUG_COUNTER": {
+            "DEBUG_4": {
+                "alias": "BAD_DROPS",
+                "desc": "More port ingress drops",
+                "group": "BAD",
+                "type": "SWITCH_INGRESS_DROPS"
+            }
+        },
+        "DEBUG_COUNTER_DROP_REASON": {
+            "DEBUG_4|DIP_LINK_LOCAL": {},
+            "DEBUG_4|SIP_LINK_LOCAL": {}
         }
     },
     "SAMPLE_CONFIG_DB_UNKNOWN": {
diff --git a/src/sonic-yang-models/tests/yang_model_pytests/test_acl.py b/src/sonic-yang-models/tests/yang_model_pytests/test_acl.py
new file mode 100644
index 00000000000..98dbc16ebf2
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_pytests/test_acl.py
@@ -0,0 +1,108 @@
+import pytest
+
+
+class TestACL:
+    def test_valid_data_trimming(self, yang_model):
+        data = {
+            "sonic-port:sonic-port": {
+                "sonic-port:PORT": {
+                    "PORT_LIST": [
+                        {
+                            "name": "Ethernet0",
+                            "lanes": "0,1,2,3",
+                            "speed": "100000"
+                        }
+                    ]
+                }
+            },
+            "sonic-acl:sonic-acl": {
+                "sonic-acl:ACL_TABLE_TYPE": {
+                    "ACL_TABLE_TYPE_LIST": [
+                        {
+                            "ACL_TABLE_TYPE_NAME": "TRIMMING_L3",
+                            "BIND_POINTS": [ "PORT" ],
+                            "MATCHES": [ "SRC_IP" ],
+                            "ACTIONS": [ "DISABLE_TRIM_ACTION" ]
+                        }
+                    ]
+                },
+                "sonic-acl:ACL_TABLE": {
+                    "ACL_TABLE_LIST": [
+                        {
+                            "ACL_TABLE_NAME": "TRIM_TABLE",
+                            "type": "TRIMMING_L3",
+                            "stage": "INGRESS",
+                            "ports": [ "Ethernet0" ]
+                        }
+                    ]
+                },
+                "sonic-acl:ACL_RULE": {
+                    "ACL_RULE_LIST": [
+                        {
+                            "ACL_TABLE_NAME": "TRIM_TABLE",
+                            "RULE_NAME": "TRIM_RULE",
+                            "PRIORITY": "999",
+                            "SRC_IP": "1.1.1.1/32",
+                            "PACKET_ACTION": "DISABLE_TRIM"
+                        }
+                    ]
+                }
+            }
+        }
+
+        yang_model.load_data(data)
+
+    @pytest.mark.parametrize(
+        "action,error_message", [
+            pytest.param('INVALID_VALUE', 'Invalid value', id="invalid-value")
+        ]
+    )
+    def test_neg_rule_packet_action(self, yang_model, action, error_message):
+        data = {
+            "sonic-port:sonic-port": {
+                "sonic-port:PORT": {
+                    "PORT_LIST": [
+                        {
+                            "name": "Ethernet0",
+                            "lanes": "0,1,2,3",
+                            "speed": "100000"
+                        }
+                    ]
+                }
+            },
+            "sonic-acl:sonic-acl": {
+                "sonic-acl:ACL_TABLE_TYPE": {
+                    "ACL_TABLE_TYPE_LIST": [
+                        {
+                            "ACL_TABLE_TYPE_NAME": "TRIMMING_L3",
+                            "BIND_POINTS": [ "PORT" ],
+                            "MATCHES": [ "SRC_IP" ],
+                            "ACTIONS": [ "DISABLE_TRIM_ACTION" ]
+                        }
+                    ]
+                },
+                "sonic-acl:ACL_TABLE": {
+                    "ACL_TABLE_LIST": [
+                        {
+                            "ACL_TABLE_NAME": "TRIM_TABLE",
+                            "type": "TRIMMING_L3",
+                            "stage": "INGRESS",
+                            "ports": [ "Ethernet0" ]
+                        }
+                    ]
+                },
+                "sonic-acl:ACL_RULE": {
+                    "ACL_RULE_LIST": [
+                        {
+                            "ACL_TABLE_NAME": "TRIM_TABLE",
+                            "RULE_NAME": "TRIM_RULE",
+                            "PRIORITY": "999",
+                            "SRC_IP": "1.1.1.1/32",
+                            "PACKET_ACTION": action
+                        }
+                    ]
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
diff --git a/src/sonic-yang-models/tests/yang_model_pytests/test_buffer_profile.py b/src/sonic-yang-models/tests/yang_model_pytests/test_buffer_profile.py
new file mode 100644
index 00000000000..2e56ae8e2c8
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_pytests/test_buffer_profile.py
@@ -0,0 +1,69 @@
+import pytest
+
+
+class TestBufferProfile:
+    @pytest.mark.parametrize("action", ["drop", "trim"])
+    def test_valid_data_lossy(self, yang_model, action):
+        data = {
+            "sonic-buffer-pool:sonic-buffer-pool": {
+                "sonic-buffer-pool:BUFFER_POOL": {
+                    "BUFFER_POOL_LIST": [
+                        {
+                            "name": "egress_lossy_pool",
+                            "type": "egress",
+                            "mode": "dynamic"
+                        }
+                    ]
+                }
+            },
+            "sonic-buffer-profile:sonic-buffer-profile": {
+                "sonic-buffer-profile:BUFFER_PROFILE": {
+                    "BUFFER_PROFILE_LIST": [
+                        {
+                            "name": "q_lossy_trim_profile",
+                            "pool": "egress_lossy_pool",
+                            "dynamic_th": "0",
+                            "size": "0",
+                            "packet_discard_action": action
+                        }
+                    ]
+                }
+            }
+        }
+
+        yang_model.load_data(data)
+
+    @pytest.mark.parametrize(
+        "action,error_message", [
+            pytest.param('INVALID_VALUE', 'Invalid value', id="invalid-value")
+        ]
+    )
+    def test_neg_packet_discard_action(self, yang_model, action, error_message):
+        data = {
+            "sonic-buffer-pool:sonic-buffer-pool": {
+                "sonic-buffer-pool:BUFFER_POOL": {
+                    "BUFFER_POOL_LIST": [
+                        {
+                            "name": "egress_lossy_pool",
+                            "type": "egress",
+                            "mode": "dynamic"
+                        }
+                    ]
+                }
+            },
+            "sonic-buffer-profile:sonic-buffer-profile": {
+                "sonic-buffer-profile:BUFFER_PROFILE": {
+                    "BUFFER_PROFILE_LIST": [
+                        {
+                            "name": "q_lossy_trim_profile",
+                            "pool": "egress_lossy_pool",
+                            "dynamic_th": "0",
+                            "size": "0",
+                            "packet_discard_action": action
+                        }
+                    ]
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
diff --git a/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py b/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
index 4258e5e8064..b38de7dd18f 100644
--- a/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
+++ b/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
@@ -110,30 +110,63 @@ def test_dpu_midplane_interface(self, yang_model, midplane_interface, error_mess
         yang_model.load_data(data, error_message)
 
     @pytest.mark.parametrize(
-        "port_name, error_message", [
-            ("dpu0", None),
-            ("dp0rt0", 'Value "dp0rt0" does not satisfy the constraint "[a-zA-Z]+[0-9]+"')]
+        "dpu_name, error_message", [
+            ("str-8102-t1-dpu0", None),
+            ("str-8102-t1-dpu0a", 'Value "str-8102-t1-dpu0a" does not satisfy the constraint "[a-zA-Z0-9-]+[0-9]"')]
         )
-    def test_dpu_port_name(self, yang_model, port_name, error_message):
+    def test_dpu_name(self, yang_model, dpu_name, error_message):
         data = {
             "sonic-smart-switch:sonic-smart-switch": {
-                "sonic-smart-switch:DPU_PORT": {
-                    "DPU_PORT_LIST": [
+                "sonic-smart-switch:DPU": {
+                    "DPU_LIST": [
                         {
-                            "PORT_NAME": port_name,
+                            "dpu_name": dpu_name,
                             "state": "up",
+                            "local_port": "Ethernet0",
                             "vip_ipv4": "192.168.1.1",
                             "vip_ipv6": "2001:db8::1",
                             "pa_ipv4": "192.168.1.2",
                             "pa_ipv6": "2001:db8::2",
+                            "midplane_ipv4": "169.254.200.245",
+                            "dpu_id": "0",
                             "vdpu_id": "vdpu0",
-                            "gnmi_port": 8080
+                            "gnmi_port": 8080,
+                            "orchagent_zmq_port": 50
                         }
                     ]
                 }
             }
         }
+        yang_model.load_data(data, error_message)
 
+    @pytest.mark.parametrize(
+        "local_port, error_message", [
+            ("Ethernet0", None),
+            ("EthernetXYZ284099", 'Invalid interface name length, it must not exceed 16 characters.')]
+        )
+    def test_dpu_local_port(self, yang_model, local_port, error_message):
+        data = {
+            "sonic-smart-switch:sonic-smart-switch": {
+                "sonic-smart-switch:DPU": {
+                    "DPU_LIST": [
+                        {
+                            "dpu_name": "str-8102-t1-dpu0",
+                            "state": "up",
+                            "local_port": local_port,
+                            "vip_ipv4": "192.168.1.1",
+                            "vip_ipv6": "2001:db8::1",
+                            "pa_ipv4": "192.168.1.2",
+                            "pa_ipv6": "2001:db8::2",
+                            "midplane_ipv4": "169.254.200.245",
+                            "dpu_id": "0",
+                            "vdpu_id": "vdpu0",
+                            "gnmi_port": 8080,
+                            "orchagent_zmq_port": 50
+                        }
+                    ]
+                }
+            }
+        }
         yang_model.load_data(data, error_message)
 
     @pytest.mark.parametrize(
@@ -141,26 +174,29 @@ def test_dpu_port_name(self, yang_model, port_name, error_message):
             ("192.168.1.1", None),
             ("192.168.1.xyz", 'Value "192.168.1.xyz" does not satisfy the constraint')]
         )
-    def test_dpu_port_vip_ipv4(self, yang_model, vip_ipv4, error_message):
+    def test_dpu_vip_ipv4(self, yang_model, vip_ipv4, error_message):
         data = {
             "sonic-smart-switch:sonic-smart-switch": {
-                "sonic-smart-switch:DPU_PORT": {
-                    "DPU_PORT_LIST": [
+                "sonic-smart-switch:DPU": {
+                    "DPU_LIST": [
                         {
-                            "PORT_NAME": "dpu0",
+                            "dpu_name": "str-8102-t1-dpu0",
                             "state": "up",
+                            "local_port": "Ethernet0",
                             "vip_ipv4": vip_ipv4,
                             "vip_ipv6": "2001:db8::1",
                             "pa_ipv4": "192.168.1.2",
                             "pa_ipv6": "2001:db8::2",
+                            "midplane_ipv4": "169.254.200.245",
+                            "dpu_id": "0",
                             "vdpu_id": "vdpu0",
-                            "gnmi_port": 8080
+                            "gnmi_port": 8080,
+                            "orchagent_zmq_port": 50
                         }
                     ]
                 }
             }
         }
-
         yang_model.load_data(data, error_message)
 
     @pytest.mark.parametrize(
@@ -168,26 +204,29 @@ def test_dpu_port_vip_ipv4(self, yang_model, vip_ipv4, error_message):
             ("2001:db8::1", None),
             ("2001:db8::xyz", 'Value "2001:db8::xyz" does not satisfy the constraint')]
         )
-    def test_dpu_port_vip_ipv6(self, yang_model, vip_ipv6, error_message):
+    def test_dpu_vip_ipv6(self, yang_model, vip_ipv6, error_message):
         data = {
             "sonic-smart-switch:sonic-smart-switch": {
-                "sonic-smart-switch:DPU_PORT": {
-                    "DPU_PORT_LIST": [
+                "sonic-smart-switch:DPU": {
+                    "DPU_LIST": [
                         {
-                            "PORT_NAME": "dpu0",
+                            "dpu_name": "str-8102-t1-dpu0",
                             "state": "up",
+                            "local_port": "Ethernet0",
                             "vip_ipv4": "192.168.1.1",
                             "vip_ipv6": vip_ipv6,
                             "pa_ipv4": "192.168.1.2",
                             "pa_ipv6": "2001:db8::2",
+                            "midplane_ipv4": "169.254.200.245",
+                            "dpu_id": "0",
                             "vdpu_id": "vdpu0",
-                            "gnmi_port": 8080
+                            "gnmi_port": 8080,
+                            "orchagent_zmq_port": 50
                         }
                     ]
                 }
             }
         }
-
         yang_model.load_data(data, error_message)
 
     @pytest.mark.parametrize(
@@ -195,26 +234,29 @@ def test_dpu_port_vip_ipv6(self, yang_model, vip_ipv6, error_message):
             ("192.168.1.2", None),
             ("192.168.1.xyz", 'Value "192.168.1.xyz" does not satisfy the constraint')]
         )
-    def test_dpu_port_pa_ipv4(self, yang_model, pa_ipv4, error_message):
+    def test_dpu_pa_ipv4(self, yang_model, pa_ipv4, error_message):
         data = {
             "sonic-smart-switch:sonic-smart-switch": {
-                "sonic-smart-switch:DPU_PORT": {
-                    "DPU_PORT_LIST": [
+                "sonic-smart-switch:DPU": {
+                    "DPU_LIST": [
                         {
-                            "PORT_NAME": "dpu0",
+                            "dpu_name": "str-8102-t1-dpu0",
                             "state": "up",
+                            "local_port": "Ethernet0",
                             "vip_ipv4": "192.168.1.1",
                             "vip_ipv6": "2001:db8::1",
                             "pa_ipv4": pa_ipv4,
                             "pa_ipv6": "2001:db8::2",
+                            "midplane_ipv4": "169.254.200.245",
+                            "dpu_id": "0",
                             "vdpu_id": "vdpu0",
-                            "gnmi_port": 8080
+                            "gnmi_port": 8080,
+                            "orchagent_zmq_port": 50
                         }
                     ]
                 }
             }
         }
-
         yang_model.load_data(data, error_message)
 
     @pytest.mark.parametrize(
@@ -222,26 +264,59 @@ def test_dpu_port_pa_ipv4(self, yang_model, pa_ipv4, error_message):
             ("2001:db8::2", None),
             ("2001:db8::xyz", 'Value "2001:db8::xyz" does not satisfy the constraint')]
         )
-    def test_dpu_port_pa_ipv6(self, yang_model, pa_ipv6, error_message):
+    def test_dpu_pa_ipv6(self, yang_model, pa_ipv6, error_message):
         data = {
             "sonic-smart-switch:sonic-smart-switch": {
-                "sonic-smart-switch:DPU_PORT": {
-                    "DPU_PORT_LIST": [
+                "sonic-smart-switch:DPU": {
+                    "DPU_LIST": [
                         {
-                            "PORT_NAME": "dpu0",
+                            "dpu_name": "str-8102-t1-dpu0",
                             "state": "up",
+                            "local_port": "Ethernet0",
                             "vip_ipv4": "192.168.1.1",
                             "vip_ipv6": "2001:db8::1",
                             "pa_ipv4": "192.168.1.2",
                             "pa_ipv6": pa_ipv6,
+                            "midplane_ipv4": "169.254.200.245",
+                            "dpu_id": "0",
                             "vdpu_id": "vdpu0",
-                            "gnmi_port": 8080
+                            "gnmi_port": 8080,
+                            "orchagent_zmq_port": 50
                         }
                     ]
                 }
             }
         }
+        yang_model.load_data(data, error_message)
 
+    @pytest.mark.parametrize(
+        "dpu_id, error_message", [
+            ("0", None),
+            ("xyz", 'Value "xyz" does not satisfy the constraint')]
+        )
+    def test_dpu_id(self, yang_model, dpu_id, error_message):
+        data = {
+            "sonic-smart-switch:sonic-smart-switch": {
+                "sonic-smart-switch:DPU": {
+                    "DPU_LIST": [
+                        {
+                            "dpu_name": "str-8102-t1-dpu0",
+                            "state": "up",
+                            "local_port": "Ethernet0",
+                            "vip_ipv4": "192.168.1.1",
+                            "vip_ipv6": "2001:db8::1",
+                            "pa_ipv4": "192.168.1.2",
+                            "pa_ipv6": "2001:db8::2",
+                            "midplane_ipv4": "169.254.200.245",
+                            "dpu_id": dpu_id,
+                            "vdpu_id": "vdpu0",
+                            "gnmi_port": 8080,
+                            "orchagent_zmq_port": 50
+                        }
+                    ]
+                }
+            }
+        }
         yang_model.load_data(data, error_message)
 
     @pytest.mark.parametrize(
@@ -249,24 +324,120 @@ def test_dpu_port_pa_ipv6(self, yang_model, pa_ipv6, error_message):
             (8080, None),
             (99999, 'Invalid value "99999" in "gnmi_port" element.')]
         )
-    def test_dpu_port_gnmi(self, yang_model, gnmi_port, error_message):
+    def test_dpu_gnmi_port(self, yang_model, gnmi_port, error_message):
         data = {
             "sonic-smart-switch:sonic-smart-switch": {
-                "sonic-smart-switch:DPU_PORT": {
-                    "DPU_PORT_LIST": [
+                "sonic-smart-switch:DPU": {
+                    "DPU_LIST": [
                         {
-                            "PORT_NAME": "dpu0",
+                            "dpu_name": "str-8102-t1-dpu0",
                             "state": "up",
+                            "local_port": "Ethernet0",
                             "vip_ipv4": "192.168.1.1",
                             "vip_ipv6": "2001:db8::1",
                             "pa_ipv4": "192.168.1.2",
                             "pa_ipv6": "2001:db8::2",
+                            "midplane_ipv4": "169.254.200.245",
+                            "dpu_id": "0",
                             "vdpu_id": "vdpu0",
-                            "gnmi_port": gnmi_port
+                            "gnmi_port": gnmi_port,
+                            "orchagent_zmq_port": 50
                         }
                     ]
                 }
             }
         }
+        yang_model.load_data(data, error_message)
 
+    @pytest.mark.parametrize(
+        "orchagent_zmq_port, error_message", [
+            (50, None),
+            (99999, 'Invalid value "99999" in "orchagent_zmq_port" element.')]
+        )
+    def test_dpu_orchagent_zmq_port(self, yang_model, orchagent_zmq_port, error_message):
+        data = {
+            "sonic-smart-switch:sonic-smart-switch": {
+                "sonic-smart-switch:DPU": {
+                    "DPU_LIST": [
+                        {
+                            "dpu_name": "str-8102-t1-dpu0",
+                            "state": "up",
+                            "local_port": "Ethernet0",
+                            "vip_ipv4": "192.168.1.1",
+                            "vip_ipv6": "2001:db8::1",
+                            "pa_ipv4": "192.168.1.2",
+                            "pa_ipv6": "2001:db8::2",
+                            "midplane_ipv4": "169.254.200.245",
+                            "dpu_id": "0",
+                            "vdpu_id": "vdpu0",
+                            "gnmi_port": 8080,
+                            "orchagent_zmq_port": orchagent_zmq_port
+                        }
+                    ]
+                }
+            }
+        }
+        yang_model.load_data(data, error_message)
+
+    @pytest.mark.parametrize(
+        "dpu_id, swbus_port, error_message", [
+            (0, 23606, None),
+            (1, 23607, None),
+            (7, 23613, None)]
+        )
+    def test_remote_dpu_swbus_port(self, yang_model, dpu_id, swbus_port, error_message):
+        data = {
+            "sonic-smart-switch:sonic-smart-switch": {
+                "sonic-smart-switch:REMOTE_DPU": {
+                    "REMOTE_DPU_LIST": [
+                        {
+                            "dpu_name": f"str-8102-t1-dpu{dpu_id}",
+                            "type": "xyz",
+                            "pa_ipv4": "192.168.1.4",
+                            "pa_ipv6": "2001:db8::4",
+                            "npu_ipv4": "192.168.1.5",
+                            "npu_ipv6": "2001:db8::5",
+                            "dpu_id": dpu_id,
+                            "swbus_port": swbus_port,
+                        }
+                    ]
+                }
+            }
+        }
         yang_model.load_data(data, error_message)
+
+    def test_vdpu(self, yang_model):
+        data = {
+            "sonic-smart-switch:sonic-smart-switch": {
+                "sonic-smart-switch:VDPU": {
+                    "VDPU_LIST": [
+                        {
+                            "vdpu_id": "vdpu0",
+                            "profile": "none",
+                            "tier": "none",
+                            "main_dpu_ids": ["str-8102-t1-dpu0"]
+                        }
+                    ]
+                }
+            }
+        }
+        yang_model.load_data(data)
+
+    def test_dash_ha_global_config(self, yang_model):
+        data = {
+            "sonic-smart-switch:sonic-smart-switch": {
+                "sonic-smart-switch:DASH_HA_GLOBAL_CONFIG": {
+                    "global": {
+                        "cp_data_channel_port": 11234,
+                        "dp_channel_port": 11235,
+                        "dp_channel_src_port_min": 11236,
+                        "dp_channel_src_port_max": 11237,
+                        "dp_channel_probe_interval_ms": 500,
+                        "dp_channel_probe_fail_threshold": 3,
+                        "dpu_bfd_probe_interval_in_ms": 500,
+                        "dpu_bfd_probe_multiplier": 3
+                    }
+                }
+            }
+        }
+        yang_model.load_data(data)
diff --git a/src/sonic-yang-models/tests/yang_model_pytests/test_trimming.py b/src/sonic-yang-models/tests/yang_model_pytests/test_trimming.py
new file mode 100644
index 00000000000..65da7928714
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_pytests/test_trimming.py
@@ -0,0 +1,107 @@
+import pytest
+
+
+class TestTrimming:
+    @pytest.mark.parametrize(
+        "queue", [
+            pytest.param('6', id="queue-static"),
+            pytest.param('dynamic', id="queue-dynamic")
+        ]
+    )
+    @pytest.mark.parametrize(
+        "dscp", [
+            pytest.param('48', id="dscp-symmetric"),
+            pytest.param('from-tc', id="dscp-asymmetric")
+        ]
+    )
+    def test_valid_data(self, yang_model, dscp, queue):
+        data = {
+            "sonic-trimming:sonic-trimming": {
+                "sonic-trimming:SWITCH_TRIMMING": {
+                    "GLOBAL": {
+                        "size": "128",
+                        "dscp_value": dscp,
+                        "tc_value": "6",
+                        "queue_index": queue
+                    }
+                }
+            }
+        }
+
+        yang_model.load_data(data)
+
+    @pytest.mark.parametrize(
+        "size,error_message", [
+            pytest.param('-1', 'Invalid value', id="min-1"),
+            pytest.param('4294967296', 'Invalid value', id="max+1")
+        ]
+    )
+    def test_neg_size(self, yang_model, size, error_message):
+        data = {
+            "sonic-trimming:sonic-trimming": {
+                "sonic-trimming:SWITCH_TRIMMING": {
+                    "GLOBAL": {
+                        "size": size
+                    }
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
+
+    @pytest.mark.parametrize(
+        "dscp,error_message", [
+            pytest.param('-1', 'Invalid value', id="min-1"),
+            pytest.param('64', 'Invalid value', id="max+1")
+        ]
+    )
+    def test_neg_dscp_value(self, yang_model, dscp, error_message):
+        data = {
+            "sonic-trimming:sonic-trimming": {
+                "sonic-trimming:SWITCH_TRIMMING": {
+                    "GLOBAL": {
+                        "dscp_value": dscp
+                    }
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
+
+    @pytest.mark.parametrize(
+        "tc,error_message", [
+            pytest.param('-1', 'Invalid value', id="min-1"),
+            pytest.param('256', 'Invalid value', id="max+1")
+        ]
+    )
+    def test_neg_tc_value(self, yang_model, tc, error_message):
+        data = {
+            "sonic-trimming:sonic-trimming": {
+                "sonic-trimming:SWITCH_TRIMMING": {
+                    "GLOBAL": {
+                        "tc_value": tc
+                    }
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
+
+    @pytest.mark.parametrize(
+        "queue,error_message", [
+            pytest.param('-1', 'Invalid value', id="min-1"),
+            pytest.param('256', 'Invalid value', id="max+1")
+        ]
+    )
+    def test_neg_queue_index(self, yang_model, queue, error_message):
+        data = {
+            "sonic-trimming:sonic-trimming": {
+                "sonic-trimming:SWITCH_TRIMMING": {
+                    "GLOBAL": {
+                        "queue_index": queue
+                    }
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
diff --git a/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py b/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py
index 22cad816b11..ac6a4236cd2 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py
+++ b/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py
@@ -49,6 +49,7 @@ def initTest(self):
             'MinElements': ['Too few'],
             'MaxElements': ['Too many'],
             'UnknownElement': ['Unknown element'],
+            'Missing': ['Missing required element'],
             'None': []
         }
 
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
index 0454700233d..0cca8eb2cc8 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
@@ -181,5 +181,26 @@
     },
     "ACL_RULE_WITH_TUNNEL_TERMINATION": {
         "desc": "ACL Rule with Tunnel Termination"
+    },
+    "ACL_TABLE_INNERSRCMACREWRITE_TABLE": {
+        "desc": "ACL_TABLE Validate type INNERSRCMACREWRITE."
+    },
+    "ACL_INNERSRCMACREWRITE_INVALID_INNER_SRC_MAC_REWRITE_ACTION": {
+        "desc": "Configure INNERSRCMACREWRITE ACL TABLE with invalid rewrite action",
+        "eStrKey" : "Pattern"
+    },
+    "ACL_INNER_SRC_MAC_REWRITE_ACTION_INVALID_MAC": {
+        "desc": "Configure INNERSRCMACREWRITE ACL TABLE with invalid MAC address format",
+        "eStrKey": "Pattern"
+    },
+    "ACL_INNERSRCMACREWRITE_INVALID_TUNNEL_VNI": {
+        "desc": "Configure INNERSRCMACREWRITE ACL with invalid VNI ID",
+        "eStrKey": "Pattern"
+    },
+    "ACL_RULE_WITH_TUNNEL_VNI":{
+        "desc": "Configure a ACL rule with VNI ID"
+    },
+    "ACL_INNERSRCMACREWRITE_NO_INNERSRCIP": {
+        "desc": "Configure INNERSRCMACREWRITE ACL with no inner src IP"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/debug_counter.json b/src/sonic-yang-models/tests/yang_model_tests/tests/debug_counter.json
new file mode 100644
index 00000000000..17332ecbc43
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/debug_counter.json
@@ -0,0 +1,24 @@
+{
+    "VALID_DEBUG_COUNTERS": {
+        "desc": "One debug counter of each valid type"
+    },
+    "VALID_COUNTERS_WITH_DROP_REASONS": {
+        "desc": "Multiple counters with drop reasons added"
+    },
+    "INVALID_DEBUG_COUNTER_TYPE": {
+        "desc": "One debug counter with invalid type",
+        "eStrKey": "InvalidValue"
+    },
+    "DEBUG_COUNTER_MISSING_COUNTER_TYPE": {
+        "desc": "One debug counter with missing type",
+        "eStrKey": "Missing"
+    },
+    "NONEXIST_DEBUG_COUNTER_FOR_DROP_REASON": {
+        "desc": "Add a drop reason for a non-existent counter",
+        "eStr": "The counter does not exist in the DEBUG_COUNTER table"
+    },
+    "INVALID_DROP_REASON": {
+        "desc": "Add an invalid drop reason to a counter",
+        "eStrKey": "InvalidValue"
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index 6ca674f7e55..d0497ca3e56 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -42,11 +42,29 @@
     "DEVICE_METADATA_TYPE_CORRECT_PATTERN": {
         "desc": "DEVICE_METADATA correct value for Type field"
     },
+    "DEVICE_METADATA_TYPE_UPPER_SPINEROUTER_PATTERN": {
+        "desc": "DEVICE_METADATA value as UpperSpineRouter for Type field"
+    },
+    "DEVICE_METADATA_TYPE_FABRIC_SPINEROUTER_PATTERN": {
+        "desc": "DEVICE_METADATA value as FabricSpineRouter for Type field"
+    },
     "DEVICE_METADATA_TYPE_BMC_MGMT_TOR_PATTERN": {
         "desc": "DEVICE_METADATA value as BmcMgmtToRRouter for Type field"
     },
+    "DEVICE_METADATA_TYPE_MGMT_TOR_PATTERN": {
+        "desc": "DEVICE_METADATA value as MgmtToRRouter for Type field"
+    },
+    "DEVICE_METADATA_TYPE_MGMT_LEAF_ROUTER_PATTERN": {
+        "desc": "DEVICE_METADATA value as MgmtLeafRouter for Type field"
+    },
+    "DEVICE_METADATA_TYPE_MGMT_SPINE_ROUTER_PATTERN": {
+        "desc": "DEVICE_METADATA value as MgmtSpineRouter for Type field"
+    },
+    "DEVICE_METADATA_TYPE_MGMT_ACCESS_ROUTER_PATTERN": {
+        "desc": "DEVICE_METADATA value as MgmtAccessRouter for Type field"
+    },
     "DEVICE_METADATA_TYPE_SONIC_DPU_PATTERN": {
-        "desc": "DEVICE_METADATA value as SonicDpu for Type field"
+        "desc": "DEVICE_METADATA value as SmartSwitchDPU for Type field"
     },
     "DEVICE_METADATA_TYPE_SONIC_HOST_PATTERN": {
         "desc": "DEVICE_METADATA value as SonicHost for Type field"
@@ -112,6 +130,9 @@
     "DEVICE_METADATA_VALID_SUBTYPE3": {
         "desc": "Verifying valid subtype value downstreamLC"
     },
+    "DEVICE_METADATA_VALID_SUBTYPE4": {
+        "desc": "Verifying valid subtype value LowerSpineRouter"
+    },
     "DEVICE_METADATA_INVALID_SUBTYPE": {
         "desc": "Verifying invalid subtype value",
         "eStrKey": "Pattern"
@@ -197,7 +218,20 @@
     "DEVICE_METADATA_VALID_SLICE_TYPE": {
         "desc": "Verifying valid slice_type configuration."
     },
+    "DEVICE_METADATA_VALID_LOCATION_TYPE": {
+        "desc": "Verifying valid location_type configuration."
+    },
     "DEVICE_METADATA_VALID_NEXTHOP_GROUP": {
         "desc": "Verifying nexthop_group configuration."
-     }
+    },
+    "DEVICE_METADATA_VALID_T2_GROUP_ASNS": {
+        "desc": "Verifying valid t2_group_asns."
+    },
+     "DEVICE_METADATA_VALID_T2_GROUP_ASNS_INVALID": {
+         "desc": "Verifying invalid t2_group_asns.",
+         "eStrKey": "InvalidValue"
+    },
+    "DEVICE_METADATA_VALID_ANCHOR_ROUTE_SOURCE": {
+        "desc": "Verifying valid anchor_route_source."
+    }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/fine-grained-ecmp.json b/src/sonic-yang-models/tests/yang_model_tests/tests/fine-grained-ecmp.json
index 2eed9fb8f34..3ee44daea74 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/fine-grained-ecmp.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/fine-grained-ecmp.json
@@ -55,5 +55,19 @@
     "FG_NHG_MEMBER_TEST_DUPLICATE_MEMBER": {
         "desc": "Fine-grained ECMP next-hop member configuration with duplicate member in FG_NHG_MEMBER_LIST table.",
         "eStr": "Duplicated instance of \"FG_NHG_MEMBER_LIST\" list."
+    },
+    "FG_NHG_PREFIX_BASED_MISSING_MAX_NEXT_HOPS": {
+        "desc": "Fine-grained ECMP prefix-based match-mode configuration with missing max_next_hops in FG_NHG_LIST table.",
+        "eStrKey": "Mandatory",
+        "eStr": ["max_next_hops"]
+    },
+    "FG_NHG_PREFIX_BASED_INVALID_MAX_NEXT_HOPS": {
+        "desc": "Fine-grained ECMP prefix-based match-mode configuration with out-of-range max_next_hops value in FG_NHG_LIST table.",
+        "eStrKey": "Range",
+        "eStr": ["1..128"]
+    },
+    "FG_NHG_PREFIX_BASED_MISSING_BUCKET_SIZE": {
+        "desc": "Fine-grained ECMP prefix-based match-mode configuration with missing bucket_size in FG_NHG_LIST table.",
+        "eStr": "Missing required element \"bucket_size\" in \"FG_NHG_LIST\"."
     }
-}
\ No newline at end of file
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json b/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json
index 56f855eac9a..9e33f1f78b6 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json
@@ -20,7 +20,7 @@
     },
     "GNMI_CLIENT_CERT_LIST_TABLE_WITH_MISSING_ROLE": {
         "desc": "CLIENT_CERT_LIST_TABLE_WITH_MISSING_ROLE failure.",
-        "eStrKey": "Mandatory"
+        "eStrKey": "MinElements"
     },
     "GNMI_CLIENT_CERT_LIST_TABLE_WITH_VALID_CONFIG": {
         "desc": "TABLE WITH VALID CONFIG."
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/high_frequency_telemetry.json b/src/sonic-yang-models/tests/yang_model_tests/tests/high_frequency_telemetry.json
new file mode 100644
index 00000000000..e1d0aaf32cd
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/high_frequency_telemetry.json
@@ -0,0 +1,5 @@
+{
+    "HIGH_FREQUENCY_TELEMETRY_VALID_CASE": {
+        "desc": "Valid high frequency telemetry configuration."
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/interface.json b/src/sonic-yang-models/tests/yang_model_tests/tests/interface.json
index b0532d90e12..abbb108fab9 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/interface.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/interface.json
@@ -29,5 +29,22 @@
     "INTERFACE_INVALID_ENABLE_IPV6_LINK_LOCAL": {
         "desc": "Enable the ipv6 link-local as true.",
         "eStr": "Invalid value \"true\" in \"ipv6_use_link_local_only\" element."
+    },
+    "INTERFACE_VALID_VNET_NAME": {
+        "desc": "Configure valid VNET name for an interface."
+    },
+    "INTERFACE_INVALID_VNET_NAME": {
+        "desc": "Configure non-existent VNET name for an interface.",
+        "eStrKey": "LeafRef"
+    },
+    "INTERFACE_MAC_ADDR": {
+        "desc": "Set administrator-provided interface mac address."
+    },
+    "INTERFACE_UPPER_MAC_ADDR": {
+        "desc": "Set UPPERCASE administrator-provided interface mac address."
+    },
+    "INTERFACE_INVALID_MAC_ADDR": {
+        "desc": "Set invalid interface mac address.",
+        "eStrKey": "Pattern"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json b/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json
index e71ae255bd7..4e2dd133255 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json
@@ -13,5 +13,14 @@
     "LOOPBACK_INVALID_INTERFACE_NAME_LENGTH": {
         "desc": "Configure invalid value for loopback interface name length.",
         "eStr" : "Invalid interface name length, it must not exceed 16 characters."
+    },
+    "LOOPBACK_DEFAULT_ADMIN_STATUS_UP": {
+        "desc": "Verify admin status is default up for loopback interface",
+        "eStrKey": "Verify",
+        "verify": {
+            "xpath": "/sonic-loopback-interface:sonic-loopback-interface/LOOPBACK_INTERFACE/LOOPBACK_INTERFACE_LIST[name='lo1']/name",
+            "key": "sonic-loopback-interface:admin_status",
+            "value": "up"
+        }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json b/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json
index 5bc6b54a044..74e068dae4d 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json
@@ -14,13 +14,16 @@
     "MIRROR_ERSPAN_ENTRY_WITH_VALID_DEC_VALUES_2": {
         "desc": "Configuring ERSPAN entry with valid decimal values."
     },
+    "MIRROR_ERSPAN_ENTRY_WITH_VALID_IPV6_SRC_AND_DST_IP": {
+        "desc": "Configuring ERSPAN entry with valid IPv6 source and destination IPs."
+    },
     "MIRROR_ERSPAN_ENTRY_WRONG_TYPE": {
         "desc": "Configuring ERSPAN entry with invalid type",
         "eStrKey": "InvalidValue"
     },
     "MIRROR_ERSPAN_ENTRY_WRONG_DST_IP": {
         "desc": "Configuring ERSPAN entry with invalid dst_ip",
-        "eStrKey" : "Pattern"
+        "eStr" : "src_ip and dst_ip must have the same IP version."
     },
     "MIRROR_ERSPAN_ENTRY_WRONG_DST_IP_TYPE": {
         "desc": "Configuring ERSPAN entry with invalid dst_ip",
@@ -28,7 +31,7 @@
     },
     "MIRROR_ERSPAN_ENTRY_WRONG_SRC_IP": {
         "desc": "Configuring ERSPAN entry with invalid src_ip",
-        "eStrKey" : "Pattern"
+        "eStr" : "src_ip and dst_ip must have the same IP version."
     },
     "MIRROR_ERSPAN_ENTRY_WRONG_SRC_IP_TYPE": {
         "desc": "Configuring ERSPAN entry with invalid src_ip",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/neigh.json b/src/sonic-yang-models/tests/yang_model_tests/tests/neigh.json
index 33f87167d68..9bab0c45c85 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/neigh.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/neigh.json
@@ -10,6 +10,22 @@
 
     "NEIGH_INVALID_VLAN": {
         "desc": "Load NEIGH missing VLAN",
-        "eStr": ["does not satisfy the constraint"]
+        "eStrKey": "InvalidValue",
+        "eStr": ["port"]
+    },
+
+    "VALID_NEIGH_PORTCHANNEL": {
+        "desc": "Load valid PORTCHANNEL"
+    },
+
+    "NEIGH_INVALID_PORTCHANNEL": {
+        "desc": "Load NEIGH missing PORTCHANNEL",
+        "eStrKey": "InvalidValue",
+        "eStr": ["port"]
+    },
+
+    "VALID_NEIGH_PORT": {
+        "desc": "Load valid PORT"
+ 
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
index 3c0d59cc247..05bc9c81318 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
@@ -145,7 +145,7 @@
      "PORT_INVALID_SUBPORT_NUMBER": {
          "desc": "Out of range subport number",
          "eStrKey": "Range",
-         "eStr": "0..8"
+         "eStr": "0..12"
      },
      "PORT_VALID_DOM_POLLING": {
         "desc": "PORT_VALID_DOM_POLLING no failure."
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/portchannel.json b/src/sonic-yang-models/tests/yang_model_tests/tests/portchannel.json
index b2044e02d13..d5420e445b9 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/portchannel.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/portchannel.json
@@ -85,5 +85,15 @@
     "PORTCHANNEL_INTERFACE_INVALID_ENABLE_IPV6_LINK_LOCAL": {
         "desc": "Enable the ipv6 link-local as true.",
         "eStr": "Invalid value \"true\" in \"ipv6_use_link_local_only\" element."
+    },
+    "PORTCHANNEL_INTERFACE_MAC_ADDR": {
+        "desc": "Set administrator-provided interface mac address."
+    },
+    "PORTCHANNEL_INTERFACE_UPPER_MAC_ADDR": {
+        "desc": "Set UPPERCASE administrator-provided interface mac address."
+    },
+    "PORTCHANNEL_INTERFACE_INVALID_MAC_ADDR": {
+        "desc": "Set invalid interface mac address.",
+        "eStrKey": "Pattern"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/qosmaps.json b/src/sonic-yang-models/tests/yang_model_tests/tests/qosmaps.json
index 2997410384d..68ec71ba3f5 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/qosmaps.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/qosmaps.json
@@ -111,6 +111,14 @@
         "eStrKey": "Pattern"
     },
 
+    "PORT_QOS_MAP_APPLY_EMPTY_PFC": {
+        "desc": "Configure port pfc enable with empty string to disable PFC on all queues."
+    },
+
+    "PORT_QOS_MAP_APPLY_EMPTY_PFCWD": {
+        "desc": "Configure port pfcwd_sw_enable with empty string to disable watchdog on all queues."
+    },
+
     "TC_TO_DSCP_MAP_CRETAE": {
         "desc": "Configure a Traffic class to DSCP map."
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/srv6.json b/src/sonic-yang-models/tests/yang_model_tests/tests/srv6.json
index 41d4921a04f..10159e5dbce 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/srv6.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/srv6.json
@@ -19,10 +19,6 @@
         "desc": "A SID configured with invalid IPv6 address",
         "eStrKey" : "Pattern"
     },
-    "SRV6_MY_SID_UNMATCHED_IP_PREFIX": {
-        "desc": "A SID configured with an IPv6 Address that does not match with the prefix of the locator",
-        "eStrKey" : "Must"
-    },
     "SRV6_MY_SID_INVALID_ACTION": {
         "desc": "A SID configured with invalid action",
         "eStrKey" : "InvalidValue",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/static_route.json b/src/sonic-yang-models/tests/yang_model_tests/tests/static_route.json
index 99794fc0e1a..b6b16667ba7 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/static_route.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/static_route.json
@@ -8,6 +8,9 @@
     "STATIC_ROUTE_TEST_WITH_BLACKHOLE": {
         "desc": "Configure with nexthop as blackhole"
     },
+    "STATIC_ROUTE_TEST_WITH_ADVERTISE": {
+        "desc": "Configure static route with advertise flag"
+    },
     "STATIC_ROUTE_TEST_WITH_VRF": {
         "desc": "Configure with routes in non default VRF"
     },
@@ -36,6 +39,10 @@
     "STATIC_ROUTE_TEST_BLACKHOLE_INVALID": {
         "desc": "Configure with invalid value for blackhole",
         "eStrKey": "Pattern"
+    },
+    "STATIC_ROUTE_TEST_WITH_ADVERTISE_INVALID": {
+        "desc": "Configure static route with invalid advertise flag value",
+        "eStrKey": "Pattern"
     },
      "STATIC_ROUTE_TEST_NEXTHOP_VRF_INVALID": {
         "desc": "Configure with invalid value for VRF",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json
index 9ca18040e22..05d8281e6f7 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json
@@ -91,6 +91,16 @@
         "desc": "Enable the ipv6 link-local as true.",
         "eStr": "Invalid value \"true\" in \"ipv6_use_link_local_only\" element."
     },
+    "VLAN_INTERFACE_MAC_ADDR": {
+        "desc": "Set administrator-provided interface mac address."
+    },
+    "VLAN_INTERFACE_UPPER_MAC_ADDR": {
+        "desc": "Set UPPERCASE administrator-provided interface mac address."
+    },
+    "VLAN_INTERFACE_INVALID_MAC_ADDR": {
+        "desc": "Set invalid interface mac address.",
+        "eStrKey": "Pattern"
+    },
     "VLAN_MEMBERS_WITHOUT_CREATING_VLAN":{
         "desc": "Vlan members without Creating Vlan",
         "eStrKey": "LeafRef"
@@ -118,5 +128,16 @@
     "VLAN_ADD_PORT_THAT_IS_ROUTER_INTERFACE": {
         "desc": "Add to Vlan port that is router interface",
         "eStr": "Port is a router interface"
+    },
+    "VLAN_INTERFACE_WITH_VNET_AND_IP_PREFIXES": {
+        "desc": "Configure a VLAN interface with VNET and both IPv4 and IPv6 prefixes."
+    },
+    "VLAN_INTERFACE_WITH_INVALID_VNET_NAME_REFERENCE": {
+        "desc": "Configure a VLAN interface with reference to a non-existent VNET.",
+        "eStrKey": "LeafRef"
+    },
+    "VLAN_INTERFACE_WITH_MISSING_VNET": {
+        "desc": "Attempt to reference VNET name without the VNET being present.",
+        "eStrKey": "LeafRef"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan_sub_interface.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan_sub_interface.json
index 52b3968d5d9..2806d006a82 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan_sub_interface.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan_sub_interface.json
@@ -59,5 +59,19 @@
     "VLAN_SUB_INTERFACE_SHORT_NAME_FORMAT_VLAN_CHECK_MUST_CONDITION_FALSE_TEST": {
         "desc": "Configure valid short name format vlan sub interface vlan must check condition false.",
         "eStrKey": "Must"
+    },
+    "VLAN_SUB_INTERFACE_WITH_VALID_VNET_NAME": {
+        "desc": "Configure VLAN sub interface with valid VNET name reference."
+    },
+    "VLAN_SUB_INTERFACE_WITH_INVALID_VNET_NAME": {
+        "desc": "Configure VLAN sub interface with reference to non-existent VNET.",
+        "eStrKey": "LeafRef"
+    },
+    "VLAN_SUB_INTERFACE_WITH_VNET_PORTCHANNEL": {
+        "desc": "Configure PortChannel VLAN sub interface with VNET reference."
+    },
+    "VLAN_SUB_INTERFACE_WITH_MISSING_VNET": {
+        "desc": "Configure VLAN sub interface with VNET reference but no VNET exsiting.",
+        "eStrKey": "LeafRef"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vnet.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vnet.json
index 555ceea7d28..0c31e6a6e18 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/vnet.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vnet.json
@@ -24,5 +24,56 @@
     "VNET_INVALID_VXLAN_VTEP": {
         "desc": "Missing Vxlan_TUNNEL configuration",
         "eStr" : [ "points to a non-existing leaf" ]
+    },
+    "VNET_ROUTE_TUNNEL_MIN_TEST": {
+        "desc": "Basic VNET route tunnel configuration with minimal required field - endpoint in VNET_ROUTE_TUNNEL_LIST table."
+    },
+
+    "VNET_ROUTE_TUNNEL_MULTI_TEST": {
+        "desc": "Multiple VNET route tunnel configurations for different VNETs in VNET_ROUTE_TUNNEL_LIST table."
+    },
+
+    "VNET_ROUTE_TUNNEL_COMPLETE_TEST": {
+        "desc": "Complete VNET route tunnel configuration with all optional fields (including mac_address and vni) in VNET_ROUTE_TUNNEL_LIST table."
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_DUPLICATE_NAME": {
+        "desc": "VNET route tunnel configuration with duplicate name keys in VNET_ROUTE_TUNNEL_LIST table.",
+        "eStr": "Duplicated instance of \"VNET_ROUTE_TUNNEL_LIST\" list."
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_INVALID_ENDPOINT": {
+        "desc": "VNET route tunnel configuration with invalid endpoint IP value (256.256.256.256) in VNET_ROUTE_TUNNEL_LIST table.",
+        "eStr": "Value \"256.256.256.256\" does not satisfy the constraint"
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_INVALID_MAC": {
+        "desc": "VNET route tunnel configuration with invalid MAC address format (non-hexadecimal characters) in VNET_ROUTE_TUNNEL_LIST table.",
+        "eStr": "Value \"GG:HH:II:JJ:KK:LL\" does not satisfy the constraint \"[0-9a-fA-F]{2}(:[0-9a-fA-F]{2}){5}\""
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_INVALID_VNI": {
+        "desc": "VNET route tunnel configuration with invalid VXLAN ID (exceeding max value of 16777215) in VNET_ROUTE_TUNNEL_LIST table.",
+        "eStr": "Value \"16777216\" does not satisfy the constraint \"1..16777215\""
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_INVALID_NAME_FORMAT": {
+        "desc": "VNET route tunnel configuration with invalid name format (missing prefix) in VNET_ROUTE_TUNNEL_LIST table.",
+        "eStr": "Missing required element \"prefix\" in \"VNET_ROUTE_TUNNEL_LIST\""
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_INVALID_PREFIX": {
+        "desc": "VNET route tunnel configuration with invalid prefix format (300.168.1.0/24) in name field.",
+        "eStr": "Value \"300.168.1.0/24\" does not satisfy the constraint \"((([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\\.){3}([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])/(([0-9])|([1-2][0-9])|(3[0-2])))\" (range, length, or pattern)\""
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_MISSING_ENDPOINT": {
+        "desc": "VNET route tunnel configuration with missing mandatory attribute (endpoint) in VNET_ROUTE_TUNNEL_LIST table.",
+        "eStr": "Missing required element \"endpoint\" in \"VNET_ROUTE_TUNNEL_LIST\"."
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_NONEXISTENT_VNET": {
+        "desc": "VNET route tunnel configuration referencing a non-existent VNET name, violating the must condition.",
+        "eStr": "Leafref \"/sonic-vnet:sonic-vnet/sonic-vnet:VNET/sonic-vnet:VNET_LIST/sonic-vnet:name\" of value \"NonexistentVnet\" points to a non-existing leaf"
     }
 }
\ No newline at end of file
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json
index c064500fbfa..033560cbb59 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json
@@ -20,19 +20,26 @@
     "VXLAN_TUNNEL_NAME_VALID_TEST": {
         "desc": "Tunnel Name string length 15 is valid"
     },
-    "VXLAN_TUNNEL_NAME_INVALID_LENGTH_TEST": {
-        "desc": "Tunnel Name string length exceeding 16 is invalid",
-        "eStr" : "Invalid interface name length, it must not exceed 16 characters."
+    "VXLAN_TUNNEL_NAME_LONG_VALID_TEST": {
+        "desc": "Tunnel Name string length exceeding 16 is now valid"
     },
-    "VXLAN_TUNNEL_NAME_INVALID_TEST": {
-        "desc": "Tunnel Name string length 0 is invalid",
-        "eStr" : "Invalid interface name length, it must not exceed 16 characters."
+    "VXLAN_TUNNEL_NAME_EMPTY_VALID_TEST": {
+        "desc": "Tunnel Name string length 0 is valid"
     },
     "VXLAN_TUNNEL_NAME_VALID_DST_IPV4_TEST": {
-        "desc": "Valid IPv4 Destination Address",
-        "eStr" : "Invalid interface name length, it must not exceed 16 characters."
+        "desc": "Valid IPv4 Destination Address"
     },
     "VXLAN_TUNNEL_NAME_VALID_DST_IPV6_TEST": {
         "desc": "Valid IPv6 Destination Address"
+    },
+    "VXLAN_TUNNEL_MAX_ELEM_VALID_TEST": {
+        "desc": "Valid config with 2 VXLAN_TUNNEL entries"
+    },
+    "VXLAN_TUNNEL_MAX_ELEM_INVALID_TEST": {
+        "desc": "Invalid config with more than 2 VXLAN_TUNNEL entries",
+        "eStrKey": "MaxElements"
+    },
+    "VXLAN_TUNNEL_NAME_STRING_VALID_TEST": {
+        "desc": "Tunnel name as arbitrary string is valid"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
index 75692f1a2dd..45ab251f28e 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
@@ -1748,5 +1748,428 @@
                 ]
             }
         }
+    },
+    "ACL_TABLE_INNERSRCMACREWRITE_TABLE": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "SRC-MAC-REWRITE-TABLE",
+                        "INNER_SRC_MAC_REWRITE_ACTION": "60:45:BD:08:19:68",
+                        "PRIORITY": "999960",
+                        "RULE_NAME": "Rule_10",
+                        "INNER_SRC_IP": "10.176.0.0/15",
+                        "TUNNEL_VNI": "45"
+                    },
+                    {
+                        "ACL_TABLE_NAME": "SRC-MAC-REWRITE-TABLE",
+                        "PRIORITY": "999960",
+                        "RULE_NAME": "Rule_9",
+                        "INNER_SRC_IP": "10.166.0.0/15",
+                        "INNER_SRC_MAC_REWRITE_ACTION": "60:46:BD:08:19:68",
+                        "TUNNEL_VNI": "47"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "SRC-MAC-REWRITE-TABLE",
+                        "policy_desc":"Replace src MAC with ENI MAC",
+                        "ports": [
+                            "Ethernet0",
+                            "Ethernet1"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "INNER_SRC_MAC_REWRITE_TABLE_TYPE"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE_TYPE": {
+                "ACL_TABLE_TYPE_LIST": [
+                    {
+                        "ACL_TABLE_TYPE_NAME": "INNER_SRC_MAC_REWRITE_TABLE_TYPE",
+                        "ACTIONS": [
+                            "INNER_SRC_MAC_REWRITE_ACTION"
+                        ],
+                        "MATCHES": [
+                            "INNER_SRC_IP",
+                            "TUNNEL_VNI"
+                        ],
+                        "BIND_POINTS": [
+                            "PORT",
+                            "PORTCHANNEL"
+                        ]
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "lanes": "0,1,2,3",
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "description": "Ethernet1",
+                        "mtu": 9000,
+                        "lanes": "10,11,12,13",
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
+    },
+    "ACL_INNERSRCMACREWRITE_INVALID_INNER_SRC_MAC_REWRITE_ACTION": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "SRC-MAC-REWRITE-TABLE-INVALID-REWRITE-ACTION",
+                        "INNER_SRC_MAC_REWRITE_ACTION": "",
+                        "PRIORITY": "999963",
+                        "RULE_NAME": "Rule_13",
+                        "INNER_SRC_IP": "10.176.0.0/15",
+                        "TUNNEL_VNI": "45"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "SRC-MAC-REWRITE-TABLE-INVALID-REWRITE-ACTION",
+                        "policy_desc":"Replace src MAC with ENI MAC",
+                        "ports": [
+                            "Ethernet0",
+                            "Ethernet1"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "INNER_SRC_MAC_REWRITE_TABLE_TYPE"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE_TYPE": {
+                "ACL_TABLE_TYPE_LIST": [
+                    {
+                        "ACL_TABLE_TYPE_NAME": "INNER_SRC_MAC_REWRITE_TABLE_TYPE",
+                        "ACTIONS": [
+                            "INNER_SRC_MAC_REWRITE_ACTION"
+                        ],
+                        "MATCHES": [
+                            "INNER_SRC_IP",
+                            "TUNNEL_VNI"
+                        ],
+                        "BIND_POINTS": [
+                            "PORT",
+                            "PORTCHANNEL"
+                        ]
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "lanes": "0,1,2,3",
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "description": "Ethernet1",
+                        "mtu": 9000,
+                        "lanes": "10,11,12,13",
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
+    },
+    "ACL_INNER_SRC_MAC_REWRITE_ACTION_INVALID_MAC": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "SRC-MAC-REWRITE-TABLE-INVALID-MAC",
+                        "INNER_SRC_MAC_REWRITE_ACTION": "60.45.BD.08:19:68",
+                        "PRIORITY": "999964",
+                        "RULE_NAME": "Rule_14",
+                        "INNER_SRC_IP": "10.176.0.0/15",
+                        "TUNNEL_VNI": "45"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "SRC-MAC-REWRITE-TABLE-INVALID-MAC",
+                        "policy_desc":"Replace src MAC with ENI MAC",
+                        "ports": [
+                            "Ethernet0",
+                            "Ethernet1"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "INNER_SRC_MAC_REWRITE_TABLE_TYPE"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE_TYPE": {
+                "ACL_TABLE_TYPE_LIST": [
+                    {
+                        "ACL_TABLE_TYPE_NAME": "INNER_SRC_MAC_REWRITE_TABLE_TYPE",
+                        "ACTIONS": [
+                            "INNER_SRC_MAC_REWRITE_ACTION"
+                        ],
+                        "MATCHES": [
+                            "INNER_SRC_IP",
+                            "TUNNEL_VNI"
+                        ],
+                        "BIND_POINTS": [
+                            "PORT",
+                            "PORTCHANNEL"
+                        ]
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "lanes": "0,1,2,3",
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "description": "Ethernet1",
+                        "mtu": 9000,
+                        "lanes": "10,11,12,13",
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
+    },
+    "ACL_INNERSRCMACREWRITE_INVALID_TUNNEL_VNI": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "SRC-MAC-REWRITE-TABLE-INVALID-TUNNEL_VNI",
+                        "INNER_SRC_MAC_REWRITE_ACTION": "60:45:BD:08:19:68",
+                        "PRIORITY": "999960",
+                        "RULE_NAME": "Rule_15",
+                        "INNER_SRC_IP": "10.176.0.0/15",
+                        "TUNNEL_VNI": "16777216"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "SRC-MAC-REWRITE-TABLE-INVALID-TUNNEL_VNI",
+                        "policy_desc":"Replace src MAC with ENI MAC",
+                        "ports": [
+                            "Ethernet0",
+                            "Ethernet1"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "INNER_SRC_MAC_REWRITE_TABLE_TYPE"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE_TYPE": {
+                "ACL_TABLE_TYPE_LIST": [
+                    {
+                        "ACL_TABLE_TYPE_NAME": "INNER_SRC_MAC_REWRITE_TABLE_TYPE",
+                        "ACTIONS": [
+                            "INNER_SRC_MAC_REWRITE_ACTION"
+                        ],
+                        "MATCHES": [
+                            "INNER_SRC_IP",
+                            "TUNNEL_VNI"
+                        ],
+                        "BIND_POINTS": [
+                            "PORT",
+                            "PORTCHANNEL"
+                        ]
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "lanes": "0,1,2,3",
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "description": "Ethernet1",
+                        "mtu": 9000,
+                        "lanes": "10,11,12,13",
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
+    },
+    "ACL_RULE_WITH_TUNNEL_VNI": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "EVERFLOW",
+                        "DST_IP": "10.186.72.0/26",
+                        "IP_TYPE": "IPv4ANY",
+                        "RULE_NAME": "Rule_20",
+                        "INNER_SRC_IP": "10.176.0.0/15",
+                        "PRIORITY": "1222",
+                        "TUNNEL_VNI": "16777213",
+                        "INNER_SRC_MAC_REWRITE_ACTION": "60:45:BD:08:19:68"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "EVERFLOW",
+                        "policy_desc": "Filter IPv4",
+                        "services": [
+                            "SNMP"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "MIRROR"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "lanes": "0,1,2,3",
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "description": "Ethernet1",
+                        "mtu": 9000,
+                        "lanes": "10,11,12,13",
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
+    },
+    "ACL_INNERSRCMACREWRITE_NO_INNERSRCIP": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "SRC-MAC-REWRITE-TABLE-NO-SRCIP",
+                        "INNER_SRC_MAC_REWRITE_ACTION": "60:45:BD:08:19:68",
+                        "PRIORITY": "999960",
+                        "RULE_NAME": "Rule_16",
+                        "TUNNEL_VNI": "16777213"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "SRC-MAC-REWRITE-TABLE-NO-SRCIP",
+                        "policy_desc":"Replace src MAC with ENI MAC",
+                        "ports": [
+                            "Ethernet0",
+                            "Ethernet1"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "INNER_SRC_MAC_REWRITE_TABLE_TYPE"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE_TYPE": {
+                "ACL_TABLE_TYPE_LIST": [
+                    {
+                        "ACL_TABLE_TYPE_NAME": "INNER_SRC_MAC_REWRITE_TABLE_TYPE",
+                        "ACTIONS": [
+                            "INNER_SRC_MAC_REWRITE_ACTION"
+                        ],
+                        "MATCHES": [
+                            "INNER_SRC_IP",
+                            "TUNNEL_VNI"
+                        ],
+                        "BIND_POINTS": [
+                            "PORT",
+                            "PORTCHANNEL"
+                        ]
+                    }
+                ]
+            }
+            
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "lanes": "0,1,2,3",
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "description": "Ethernet1",
+                        "mtu": 9000,
+                        "lanes": "10,11,12,13",
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/debug_counter.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/debug_counter.json
new file mode 100644
index 00000000000..52d856a3c3f
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/debug_counter.json
@@ -0,0 +1,165 @@
+{
+    "VALID_DEBUG_COUNTERS": {
+        "sonic-debug-counter:sonic-debug-counter": {
+            "sonic-debug-counter:DEBUG_COUNTER": {
+                "DEBUG_COUNTER_LIST": [
+                    {
+                        "name": "Counter 1",
+                        "alias": "Counter 1 alias",
+                        "desc": "Counter 1 description",
+                        "group": "Counter 1 group",
+                        "type": "SWITCH_INGRESS_DROPS"
+                    },
+                    {
+                        "name": "Counter 2",
+                        "alias": "Counter 2 alias",
+                        "desc": "Counter 2 description",
+                        "group": "Counter 2 group",
+                        "type": "PORT_INGRESS_DROPS"
+                    },
+                    {
+                        "name": "Counter 3",
+                        "type": "SWITCH_EGRESS_DROPS"
+                    },
+                    {
+                        "name": "Counter 4",
+                        "type": "PORT_EGRESS_DROPS"
+                    }
+                ]
+            }
+        }
+    },
+    "VALID_COUNTERS_WITH_DROP_REASONS": {
+        "sonic-debug-counter:sonic-debug-counter": {
+            "sonic-debug-counter:DEBUG_COUNTER": {
+                "DEBUG_COUNTER_LIST": [
+                    {
+                        "name": "Counter 1",
+                        "alias": "Counter 1 alias",
+                        "desc": "Counter 1 description",
+                        "group": "ingress",
+                        "type": "SWITCH_INGRESS_DROPS"
+                    },
+                    {
+                        "name": "Counter 2",
+                        "alias": "Counter 2 alias",
+                        "desc": "Counter 3 description",
+                        "group": "ingress",
+                        "type": "PORT_INGRESS_DROPS"
+                    },
+                    {
+                        "name": "Counter 3",
+                        "alias": "Counter 3 alias",
+                        "desc": "Counter 3 description",
+                        "group": "egress",
+                        "type": "PORT_EGRESS_DROPS"
+                    }
+                ]
+            },
+            "sonic-debug-counter:DEBUG_COUNTER_DROP_REASON": {
+                "DEBUG_COUNTER_DROP_REASON_LIST": [
+                    {
+                        "name": "Counter 1",
+                        "reason": "VLAN_TAG_NOT_ALLOWED"
+                    },
+                    {
+                        "name": "Counter 1",
+                        "reason": "IP_HEADER_ERROR"
+                    },
+                    {
+                        "name": "Counter 1",
+                        "reason": "SMAC_EQUALS_DMAC"
+                    },
+                    {
+                        "name": "Counter 2",
+                        "reason": "VLAN_TAG_NOT_ALLOWED"
+                    },
+                    {
+                        "name": "Counter 2",
+                        "reason": "NO_L3_HEADER"
+                    },
+                    {
+                        "name": "Counter 2",
+                        "reason": "SIP_LINK_LOCAL"
+                    },
+                    {
+                        "name": "Counter 3",
+                        "reason": "L3_ANY"
+                    },
+                    {
+                        "name": "Counter 3",
+                        "reason": "L2_ANY"
+                    },
+                    {
+                        "name": "Counter 3",
+                        "reason": "EGRESS_VLAN_FILTER"
+                    }
+                ]
+            }
+        }
+    },
+    "INVALID_DEBUG_COUNTER_TYPE": {
+        "sonic-debug-counter:sonic-debug-counter": {
+            "sonic-debug-counter:DEBUG_COUNTER": {
+                "DEBUG_COUNTER_LIST": [
+                    {
+                        "name": "Counter 1",
+                        "type": "INVALID_TYPE"
+                    }
+                ]
+            }
+        }
+    },
+    "DEBUG_COUNTER_MISSING_COUNTER_TYPE": {
+        "sonic-debug-counter:sonic-debug-counter": {
+            "sonic-debug-counter:DEBUG_COUNTER": {
+                "DEBUG_COUNTER_LIST": [
+                    {
+                        "name": "Counter 1"
+                    }
+                ]
+            }
+        }
+    },
+    "NONEXIST_DEBUG_COUNTER_FOR_DROP_REASON": {
+        "sonic-debug-counter:sonic-debug-counter": {
+            "sonic-debug-counter:DEBUG_COUNTER": {
+                "DEBUG_COUNTER_LIST": [
+                    {
+                        "name": "Counter 1",
+                        "type": "PORT_INGRESS_DROPS"
+
+                    }
+                ]
+            },
+            "sonic-debug-counter:DEBUG_COUNTER_DROP_REASON": {
+                "DEBUG_COUNTER_DROP_REASON_LIST": [
+                    {
+                        "name": "Counter 2",
+                        "reason": "L2_ANY"
+                    }
+                ]
+            }
+        }
+    },
+    "INVALID_DROP_REASON": {
+        "sonic-debug-counter:sonic-debug-counter": {
+            "sonic-debug-counter:DEBUG_COUNTER": {
+                "DEBUG_COUNTER_LIST": [
+                    {
+                        "name": "Counter 1",
+                        "type": "SWITCH_INGRESS_DROPS"
+                    }
+                ]
+            },
+            "sonic-debug-counter:DEBUG_COUNTER_DROP_REASON": {
+                "DEBUG_COUNTER_DROP_REASON_LIST": [
+                    {
+                        "name": "Counter 1",
+                        "reason": "INVALID_REASON"
+                    }
+                ]
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index d4d885e7802..3f00c3be6cd 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -82,6 +82,36 @@
             }
         }
     },
+    "DEVICE_METADATA_TYPE_SPINEROUTER_PATTERN": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_asn": "65002",
+                    "type": "SpineRouter"
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_TYPE_UPPER_SPINEROUTER_PATTERN": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_asn": "65002",
+                    "type": "UpperSpineRouter"
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_TYPE_FABRIC_SPINEROUTER_PATTERN": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_asn": "65002",
+                    "type": "FabricSpineRouter"
+                }
+            }
+        }
+    },
     "DEVICE_METADATA_TYPE_BMC_MGMT_TOR_PATTERN": {
         "sonic-device_metadata:sonic-device_metadata": {
             "sonic-device_metadata:DEVICE_METADATA": {
@@ -92,12 +122,52 @@
             }
         }
     },
+    "DEVICE_METADATA_TYPE_MGMT_TOR_PATTERN": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_asn": "65002",
+                    "type": "MgmtToRRouter"
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_TYPE_MGMT_LEAF_ROUTER_PATTERN": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_asn": "65002",
+                    "type": "MgmtLeafRouter"
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_TYPE_MGMT_SPINE_ROUTER_PATTERN": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_asn": "65002",
+                    "type": "MgmtSpineRouter"
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_TYPE_MGMT_ACCESS_ROUTER_PATTERN": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_asn": "65002",
+                    "type": "MgmtAccessRouter"
+                }
+            }
+        }
+    },
     "DEVICE_METADATA_TYPE_SONIC_DPU_PATTERN": {
         "sonic-device_metadata:sonic-device_metadata": {
             "sonic-device_metadata:DEVICE_METADATA": {
                 "sonic-device_metadata:localhost": {
                     "bgp_asn": "65002",
-                    "type": "SonicDpu"
+                    "type": "SmartSwitchDPU"
                 }
             }
         }
@@ -311,6 +381,15 @@
             }
         }
     },
+    "DEVICE_METADATA_VALID_SUBTYPE4": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "subtype": "LowerSpineRouter"
+                }
+            }
+        }
+    },
     "DEVICE_METADATA_INVALID_SUBTYPE": {
         "sonic-device_metadata:sonic-device_metadata": {
             "sonic-device_metadata:DEVICE_METADATA": {
@@ -546,6 +625,15 @@
             }
         }
     },
+    "DEVICE_METADATA_VALID_LOCATION_TYPE": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "location_type": "DUMMY_LOCATION"
+                }
+            }
+        }
+    },
     "DEVICE_METADATA_VALID_NEXTHOP_GROUP": {
         "sonic-device_metadata:sonic-device_metadata": {
             "sonic-device_metadata:DEVICE_METADATA": {
@@ -563,5 +651,59 @@
                 }
             }
         }
+    },
+    "DEVICE_METADATA_VALID_T2_GROUP_ASNS": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "t2_group_asns": ["65000", "65001", "65002"]
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_VALID_T2_GROUP_ASNS_INVALID": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "t2_group_asns": ["str"]
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_VALID_ANCHOR_ROUTE_SOURCE": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "anchor_route_source": ["local"]
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_VALID_ORCH_DASH_ZMQ": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "orch_dash_zmq_enabled": true
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_VALID_ORCH_ROUTE_ZMQ": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "orch_route_zmq_enabled": true
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_SYSLOG_WITH_OS_VERSION_ENABLED": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "syslog_with_osversion": true
+                }
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_neighbor_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_neighbor_metadata.json
index 8c5388d2043..5c1f87d8cdc 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_neighbor_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_neighbor_metadata.json
@@ -54,7 +54,8 @@
                         "name": "dccsw03.nw",
                         "hwsku": "Arista",
                         "type": "SpineRouter",
-                        "deployment_id": "1"
+                        "deployment_id": "1",
+                        "slice_type": "AZNG_Production"
                     },
                     {
                         "cluster": "AAA00PrdStr00",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fine_grained_ecmp.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fine_grained_ecmp.json
index 9ddb5bfe64f..a4fbdd78f80 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fine_grained_ecmp.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fine_grained_ecmp.json
@@ -12,6 +12,12 @@
                         "name": "group2",
                         "bucket_size": 20,
                         "match_mode": "route-based"
+                    },
+                    {
+                        "name": "group3",
+                        "bucket_size": 30,
+                        "match_mode": "prefix-based",
+                        "max_next_hops": 6
                     }
                 ]
             }
@@ -30,6 +36,12 @@
                         "name": "group2",
                         "bucket_size": 20,
                         "match_mode": "route-based"
+                    },
+                    {
+                        "name": "group3",
+                        "bucket_size": 30,
+                        "match_mode": "prefix-based",
+                        "max_next_hops": 6
                     }
                 ]
             },
@@ -43,6 +55,10 @@
                         "ip_prefix": "10.1.0.0/24",
                         "FG_NHG": "group2"
                     },
+                    {
+                        "ip_prefix": "10.2.0.0/24",
+                        "FG_NHG": "group3"
+                    },
                     {
                         "ip_prefix": "fe80::/64",
                         "FG_NHG": "group1"
@@ -50,6 +66,10 @@
                     {
                         "ip_prefix": "::/0",
                         "FG_NHG": "group2"
+                    },
+                    {
+                        "ip_prefix": "2001:db8::/32",
+                        "FG_NHG": "group3"
                     }
                 ]
             }
@@ -391,5 +411,45 @@
                 ]
             }
         }
+    },
+    "FG_NHG_PREFIX_BASED_MISSING_MAX_NEXT_HOPS": {
+        "sonic-fine-grained-ecmp:sonic-fine-grained-ecmp": {
+            "sonic-fine-grained-ecmp:FG_NHG": {
+                "FG_NHG_LIST": [
+                    {
+                        "name": "group3",
+                        "bucket_size": 30,
+                        "match_mode": "prefix-based"
+                    }
+                ]
+            }
+        }
+    },
+    "FG_NHG_PREFIX_BASED_INVALID_MAX_NEXT_HOPS": {
+        "sonic-fine-grained-ecmp:sonic-fine-grained-ecmp": {
+            "sonic-fine-grained-ecmp:FG_NHG": {
+                "FG_NHG_LIST": [
+                    {
+                        "name": "group3",
+                        "bucket_size": 30,
+                        "match_mode": "prefix-based",
+                        "max_next_hops": 2048
+                    }
+                ]
+            }
+        }
+    },
+    "FG_NHG_PREFIX_BASED_MISSING_BUCKET_SIZE": {
+        "sonic-fine-grained-ecmp:sonic-fine-grained-ecmp": {
+            "sonic-fine-grained-ecmp:FG_NHG": {
+                "FG_NHG_LIST": [
+                    {
+                        "name": "group3",
+                        "match_mode": "prefix-based",
+                        "max_next_hops": 6
+                    }
+                ]
+            }
+        }
     }
-}
\ No newline at end of file
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
index 666e74b00b0..44a8417cb9b 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
@@ -66,6 +66,10 @@
                 "WRED_ECN_PORT": {
                     "FLEX_COUNTER_STATUS": "enable",
                     "POLL_INTERVAL": 1000
+                },
+                "SRV6": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 1000
                 }
             }
         }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
index 0c8327a8991..5f8e0765437 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
@@ -108,11 +108,15 @@
                 "GNMI_CLIENT_CERT_LIST": [
                 {
                     "cert_cname": "testcert1",
-                    "role": "RW"
+                    "role": [
+                        "RW"
+                    ]
                 },
                 {
                     "cert_cname": "testcert2",
-                    "role": "RO"
+                    "role": [
+                        "RO"
+                    ]
                 }
                 ]
             }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/hash.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/hash.json
index e9e3def9568..37969dca579 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/hash.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/hash.json
@@ -10,7 +10,8 @@
                         "L4_DST_PORT",
                         "L4_SRC_PORT",
                         "INNER_DST_IP",
-                        "INNER_SRC_IP"
+                        "INNER_SRC_IP",
+                        "IPV6_FLOW_LABEL"
                     ],
                     "lag_hash": [
                         "DST_IP",
@@ -19,7 +20,8 @@
                         "L4_DST_PORT",
                         "L4_SRC_PORT",
                         "INNER_DST_IP",
-                        "INNER_SRC_IP"
+                        "INNER_SRC_IP",
+                        "IPV6_FLOW_LABEL"
                     ],
                     "ecmp_hash_algorithm": "CRC",
                     "lag_hash_algorithm": "XOR"
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/high_frequency_telemetry.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/high_frequency_telemetry.json
new file mode 100644
index 00000000000..0f8edca36ae
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/high_frequency_telemetry.json
@@ -0,0 +1,128 @@
+{
+    "HIGH_FREQUENCY_TELEMETRY_VALID_CASE": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "lanes": "0",
+                        "speed": 25000
+                    },
+                    {
+                        "name": "Ethernet4",
+                        "lanes": "4",
+                        "speed": 25000
+                    }
+                ]
+            }
+        },
+        "sonic-buffer-pool:sonic-buffer-pool": {
+            "sonic-buffer-pool:BUFFER_POOL": {
+                "BUFFER_POOL_LIST": [
+                    {
+                        "name": "egress_lossless_pool",
+                        "mode": "static",
+                        "size": "300",
+                        "type": "ingress"
+                    }
+                ]
+            }
+        },
+        "sonic-buffer-profile:sonic-buffer-profile": {
+            "sonic-buffer-profile:BUFFER_PROFILE": {
+                "BUFFER_PROFILE_LIST": [
+                    {
+                        "name": "lossless_buffer_profile",
+                        "size": "1518",
+                        "dynamic_th": "2",
+                        "pool": "egress_lossless_pool"
+                    }
+                ]
+            }
+        },
+        "sonic-buffer-pg:sonic-buffer-pg": {
+            "sonic-buffer-pg:BUFFER_PG": {
+                "BUFFER_PG_LIST": [
+                    {
+                        "port": "Ethernet4",
+                        "pg_num": "3",
+                        "profile": "lossless_buffer_profile"
+                    }
+                ]
+            }
+        },
+        "sonic-buffer-queue:sonic-buffer-queue": {
+            "sonic-buffer-queue:BUFFER_QUEUE": {
+                "BUFFER_QUEUE_LIST": [
+                    {
+                        "port": "Ethernet0",
+                        "qindex": "15",
+                        "profile": "lossless_buffer_profile"
+                    }
+                ]
+            }
+        },
+        "sonic-high-frequency-telemetry:sonic-high-frequency-telemetry": {
+            "sonic-high-frequency-telemetry:HIGH_FREQUENCY_TELEMETRY_PROFILE": {
+                "HIGH_FREQUENCY_TELEMETRY_PROFILE_LIST": [
+                    {
+                        "name": "high_frequency_counters",
+                        "stream_state": "enabled",
+                        "poll_interval": 100
+                    }
+                ]
+            },
+            "sonic-high-frequency-telemetry:HIGH_FREQUENCY_TELEMETRY_GROUP": {
+                "HIGH_FREQUENCY_TELEMETRY_GROUP_LIST": [
+                    {
+                        "profile_name": "high_frequency_counters",
+                        "group_name": "PORT",
+                        "object_names": [
+                            "Ethernet0",
+                            "Ethernet4"
+                        ],
+                        "object_counters": [
+                            "IF_IN_OCTETS",
+                            "OUT_CURR_OCCUPANCY_BYTES"
+                        ]
+                    },
+                    {
+                        "profile_name": "high_frequency_counters",
+                        "group_name": "BUFFER_POOL",
+                        "object_names": [
+                            "egress_lossless_pool"
+                        ],
+                        "object_counters": [
+                            "WATERMARK_BYTES",
+                            "XOFF_ROOM_WATERMARK_BYTES"
+                        ]
+                    },
+                    {
+                        "profile_name": "high_frequency_counters",
+                        "group_name": "QUEUE",
+                        "object_names": [
+                            "Ethernet0|15",
+                            "Ethernet0|3"
+                        ],
+                        "object_counters": [
+                            "PACKETS",
+                            "WRED_ECN_MARKED_PACKETS"
+                        ]
+                    },
+                    {
+                        "profile_name": "high_frequency_counters",
+                        "group_name": "INGRESS_PRIORITY_GROUP",
+                        "object_names": [
+                            "Ethernet4|0",
+                            "Ethernet4|3"
+                        ],
+                        "object_counters": [
+                            "CURR_OCCUPANCY_BYTES",
+                            "XOFF_ROOM_WATERMARK_BYTES"
+                        ]
+                    }
+                ]
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/interface.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/interface.json
index 03f96de28f6..0a2a3226f4f 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/interface.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/interface.json
@@ -274,5 +274,192 @@
                 ]
             }
         }
+    },
+    "INTERFACE_VALID_VNET_NAME": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        },
+        "sonic-interface:sonic-interface": {
+            "sonic-interface:INTERFACE": {
+                "INTERFACE_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "vnet_name": "Vnet1"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth8",
+                        "description": "Ethernet8",
+                        "fec": "rs",
+                        "lanes": "65",
+                        "mtu": 9000,
+                        "name": "Ethernet8",
+                        "speed": 25000,
+                        "mode": "trunk"
+                    }
+                ]
+            }
+        }
+    },
+    "INTERFACE_INVALID_VNET_NAME": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        },
+        "sonic-interface:sonic-interface": {
+            "sonic-interface:INTERFACE": {
+                "INTERFACE_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "vnet_name": "NonExistentVnet"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth8",
+                        "description": "Ethernet8",
+                        "fec": "rs",
+                        "lanes": "65",
+                        "mtu": 9000,
+                        "name": "Ethernet8",
+                        "speed": 25000,
+                        "mode": "trunk"
+                    }
+                ]
+            }
+        }
+    },
+    "INTERFACE_MAC_ADDR": {
+        "sonic-interface:sonic-interface": {
+            "sonic-interface:INTERFACE": {
+                "INTERFACE_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "mac_addr": "02:26:9b:73:c1:1a"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth8",
+                        "description": "Ethernet8",
+                        "fec": "rs",
+                        "lanes": "65",
+                        "mtu": 9000,
+                        "name": "Ethernet8",
+                        "speed": 25000,
+                        "mode":"trunk"
+                    }
+                ]
+            }
+        }
+    },
+    "INTERFACE_UPPER_MAC_ADDR": {
+        "sonic-interface:sonic-interface": {
+            "sonic-interface:INTERFACE": {
+                "INTERFACE_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "mac_addr": "02:AB:CD:EF:12:34"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth8",
+                        "description": "Ethernet8",
+                        "fec": "rs",
+                        "lanes": "65",
+                        "mtu": 9000,
+                        "name": "Ethernet8",
+                        "speed": 25000,
+                        "mode":"trunk"
+                    }
+                ]
+            }
+        }
+    },
+    "INTERFACE_INVALID_MAC_ADDR": {
+        "sonic-interface:sonic-interface": {
+            "sonic-interface:INTERFACE": {
+                "INTERFACE_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "mac_addr": "badaddr"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth8",
+                        "description": "Ethernet8",
+                        "fec": "rs",
+                        "lanes": "65",
+                        "mtu": 9000,
+                        "name": "Ethernet8",
+                        "speed": 25000,
+                        "mode":"trunk"
+                    }
+                ]
+            }
+        }
     }
-}
+}
\ No newline at end of file
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json
index 274b5254846..acee487b34c 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json
@@ -27,7 +27,8 @@
                 "LOOPBACK_INTERFACE_LIST": [
                     {
                         "name": "lo1",
-                        "nat_zone": "4"
+                        "nat_zone": "4",
+                        "admin_status": "up"
                     }
                 ]
             }
@@ -47,7 +48,8 @@
                 "LOOPBACK_INTERFACE_LIST": [
                     {
                         "name": "lo1",
-                        "nat_zone": "2"
+                        "nat_zone": "2",
+                        "admin_status": "up"
                     }
                 ]
             }
@@ -67,6 +69,27 @@
                 "LOOPBACK_INTERFACE_LIST": [
                     {
                         "name": "lo1lo1lo1lo1lo1lo1",
+                        "nat_zone": "2",
+                        "admin_status": "up"
+                    }
+                ]
+            }
+        }
+    },
+    "LOOPBACK_DEFAULT_ADMIN_STATUS_UP": {
+        "sonic-loopback-interface:sonic-loopback-interface": {
+            "sonic-loopback-interface:LOOPBACK_INTERFACE": {
+                "LOOPBACK_INTERFACE_IPPREFIX_LIST": [
+                    {
+                        "family": "IPv4",
+                        "ip-prefix": "10.0.0.1/30",
+                        "name": "lo1",
+                        "scope": "global"
+                    }
+                ],
+                "LOOPBACK_INTERFACE_LIST": [
+                    {
+                        "name": "lo1",
                         "nat_zone": "2"
                     }
                 ]
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json
index ac8293e88c1..af912165297 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json
@@ -79,6 +79,25 @@
             }
         }
     },
+    "MIRROR_ERSPAN_ENTRY_WITH_VALID_IPV6_SRC_AND_DST_IP": {
+        "sonic-mirror-session:sonic-mirror-session": {
+            "MIRROR_SESSION": {
+                "MIRROR_SESSION_LIST": [
+                    {
+                        "name": "erspan",
+                        "type": "ERSPAN",
+                        "dst_ip": "1001::1",
+                        "src_ip": "2002::2",
+                        "gre_type": "0x1234",
+                        "dscp": "10",
+                        "ttl": "64",
+                        "queue": "0",
+                        "direction": "RX"
+                    }
+                ]
+            }
+        }
+    },
     "MIRROR_ERSPAN_ENTRY_WRONG_TYPE": {
         "sonic-mirror-session:sonic-mirror-session": {
             "MIRROR_SESSION": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux_cable.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux_cable.json
index 1a7030a77b0..4a6512d178b 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux_cable.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux_cable.json
@@ -54,6 +54,7 @@
                     {
                         "ifname": "Ethernet4",
                         "cable_type": "active-active",
+                        "prober_type": "software",
                         "server_ipv4": "192.168.0.2/32",
                         "server_ipv6": "fc02:1000::30/128",
                         "soc_ipv4": "192.168.0.3/32",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/neigh.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/neigh.json
index 165bbb6b864..082dd9562d2 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/neigh.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/neigh.json
@@ -13,13 +13,13 @@
             "sonic-neigh:NEIGH": {
                 "NEIGH_LIST": [
                     {
-                        "vlan": "Vlan1000",
+                        "port": "Vlan1000",
                         "neighbor": "100.1.1.3",
                         "neigh": "00:02:02:03:04:05",
                         "family": "IPv4"
                     },
                     {
-                        "vlan": "Vlan1000",
+                        "port": "Vlan1000",
                         "neighbor": "100.1.1.4",
                         "family": "IPv4"
                     }
@@ -42,7 +42,7 @@
             "sonic-neigh:NEIGH": {
                 "NEIGH_LIST": [
                     {
-                        "vlan": "Vlan1000",
+                        "port": "Vlan1000",
                         "neigh": "00:02:02:03:04:05",
                         "family": "IPv4"
                     }
@@ -56,18 +56,101 @@
             "sonic-neigh:NEIGH": {
                 "NEIGH_LIST": [
                     {
-                        "vlan": "INVALIDVlan",
+                        "port": "INVALIDVlan",
                         "neighbor": "100.1.1.3",
                         "neigh": "00:02:02:03:04:05",
                         "family": "IPv4"
                     },
                     {
-                        "vlan": "Vlan1000",
+                        "port": "Vlan1000",
                         "neighbor": "100.1.1.4",
                         "family": "IPv4"
                     }
                 ]
             }
         }
+    },
+
+    "VALID_NEIGH_PORTCHANNEL": {
+        "sonic-neigh:sonic-neigh": {
+            "sonic-neigh:NEIGH": {
+                "NEIGH_LIST": [
+                    {
+                        "port": "PortChannel1024",
+                        "neighbor": "100.1.1.3",
+                        "neigh": "00:02:02:03:04:05",
+                        "family": "IPv4"
+                    },
+                    {
+                        "port": "PortChannel1024",
+                        "neighbor": "100.1.1.4",
+                        "family": "IPv4"
+                    }
+                ]
+            }
+        },
+        "sonic-portchannel:sonic-portchannel": {
+            "sonic-portchannel:PORTCHANNEL": {
+                "PORTCHANNEL_LIST": [
+                    {
+                        "admin_status": "up",
+                        "name": "PortChannel1024"
+                    }
+                ]
+            }
+        }
+    },
+
+    "NEIGH_INVALID_PORTCHANNEL": {
+        "sonic-neigh:sonic-neigh": {
+            "sonic-neigh:NEIGH": {
+                "NEIGH_LIST": [
+                    {
+                        "port": "PortChannel10",
+                        "neighbor": "100.1.1.3",
+                        "neigh": "00:02:02:03:04:05",
+                        "family": "IPv4"
+                    }
+                ]
+            }
+        },
+        "sonic-portchannel:sonic-portchannel": {
+            "sonic-portchannel:PORTCHANNEL": {
+                "PORTCHANNEL_LIST": [
+                    {
+                        "admin_status": "up",
+                        "name": "PortChannel11"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VALID_NEIGH_PORT": {
+        "sonic-neigh:sonic-neigh": {
+            "sonic-neigh:NEIGH": {
+                "NEIGH_LIST": [
+                    {
+                        "port": "Ethernet100",
+                        "neighbor": "100.1.1.3",
+                        "neigh": "00:02:02:03:04:05",
+                        "family": "IPv4"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "name": "Ethernet100",
+                        "lanes": "0,1,2,3",
+                        "mtu": 9000,
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
index 005961c1daa..f6c2f628c86 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
@@ -655,7 +655,7 @@
                          "alias": "etp1a",
                          "lanes": "60, 61",
                          "speed": 100000,
-                         "subport": 9,
+                         "subport": 13,
                          "mode":"trunk"
                      }
                  ]
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/portchannel.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/portchannel.json
index 6772d7c5b49..c4c404e58ea 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/portchannel.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/portchannel.json
@@ -535,5 +535,122 @@
                 ]
             }
         }
+    },
+    "PORTCHANNEL_INTERFACE_MAC_ADDR": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "lanes": "65",
+                        "mtu": 9000,
+                        "name": "Ethernet0",
+                        "speed": 25000,
+                        "mode": "routed"
+                    }
+                ]
+            }
+        },
+        "sonic-portchannel:sonic-portchannel": {
+            "sonic-portchannel:PORTCHANNEL": {
+                "PORTCHANNEL_LIST": [
+                    {
+                        "admin_status": "up",
+                        "min_links": "1",
+                        "mtu": "9100",
+                        "name": "PortChannel0001",
+                        "mode": "routed"
+                    }
+                ]
+            },
+            "sonic-portchannel:PORTCHANNEL_INTERFACE": {
+                "PORTCHANNEL_INTERFACE_LIST": [
+                    {
+                        "name": "PortChannel0001",
+                        "mac_addr": "02:26:9b:73:c1:1a"
+                    }
+                ]
+            }
+        }
+    },
+    "PORTCHANNEL_INTERFACE_UPPER_MAC_ADDR": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "lanes": "65",
+                        "mtu": 9000,
+                        "name": "Ethernet0",
+                        "speed": 25000,
+                        "mode": "routed"
+                    }
+                ]
+            }
+        },
+        "sonic-portchannel:sonic-portchannel": {
+            "sonic-portchannel:PORTCHANNEL": {
+                "PORTCHANNEL_LIST": [
+                    {
+                        "admin_status": "up",
+                        "min_links": "1",
+                        "mtu": "9100",
+                        "name": "PortChannel0001",
+                        "mode": "routed"
+                    }
+                ]
+            },
+            "sonic-portchannel:PORTCHANNEL_INTERFACE": {
+                "PORTCHANNEL_INTERFACE_LIST": [
+                    {
+                        "name": "PortChannel0001",
+                        "mac_addr": "02:AB:CD:EF:12:34"
+                    }
+                ]
+            }
+        }
+    },
+    "PORTCHANNEL_INTERFACE_INVALID_MAC_ADDR": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "lanes": "65",
+                        "mtu": 9000,
+                        "name": "Ethernet0",
+                        "speed": 25000,
+                        "mode": "routed"
+                    }
+                ]
+            }
+        },
+        "sonic-portchannel:sonic-portchannel": {
+            "sonic-portchannel:PORTCHANNEL": {
+                "PORTCHANNEL_LIST": [
+                    {
+                        "admin_status": "up",
+                        "min_links": "1",
+                        "mtu": "9100",
+                        "name": "PortChannel0001",
+                        "mode": "routed"
+                    }
+                ]
+            },
+            "sonic-portchannel:PORTCHANNEL_INTERFACE": {
+                "PORTCHANNEL_INTERFACE_LIST": [
+                    {
+                        "name": "PortChannel0001",
+                        "mac_addr": "badaddr"
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/qosmaps.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/qosmaps.json
index ee0ba3fe472..3d45fe02b79 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/qosmaps.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/qosmaps.json
@@ -881,6 +881,64 @@
         }
     },
 
+    "PORT_QOS_MAP_APPLY_EMPTY_PFC": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                {
+                    "admin_status": "up",
+                    "alias": "eth0",
+                    "description": "Ethernet4",
+                    "lanes": "65",
+                    "mtu": "9000",
+                    "name": "Ethernet4",
+                    "tpid": "0x8100",
+                    "speed": "25000"
+                }
+                ]
+            }
+        },
+        "sonic-port-qos-map:sonic-port-qos-map": {
+            "sonic-port-qos-map:PORT_QOS_MAP": {
+                "PORT_QOS_MAP_LIST": [
+                    {
+                        "ifname": "Ethernet4",
+                        "pfc_enable": ""
+                    }
+                ]
+            }
+        }
+    },
+
+    "PORT_QOS_MAP_APPLY_EMPTY_PFCWD": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                {
+                    "admin_status": "up",
+                    "alias": "eth0",
+                    "description": "Ethernet4",
+                    "lanes": "65",
+                    "mtu": "9000",
+                    "name": "Ethernet4",
+                    "tpid": "0x8100",
+                    "speed": "25000"
+                }
+                ]
+            }
+        },
+        "sonic-port-qos-map:sonic-port-qos-map": {
+            "sonic-port-qos-map:PORT_QOS_MAP": {
+                "PORT_QOS_MAP_LIST": [
+                    {
+                        "ifname": "Ethernet4",
+                        "pfcwd_sw_enable": ""
+                    }
+                ]
+            }
+        }
+    },
+
     "TC_TO_DSCP_MAP_CRETAE": {
         "sonic-tc-dscp-map:sonic-tc-dscp-map": {
             "sonic-tc-dscp-map:TC_TO_DSCP_MAP": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/srv6.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/srv6.json
index 2b92720aa31..bca63543795 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/srv6.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/srv6.json
@@ -131,32 +131,6 @@
             }
         }
     },
-    "SRV6_MY_SID_UNMATCHED_IP_PREFIX": {
-        "sonic-srv6:sonic-srv6": {
-            "sonic-srv6:SRV6_MY_LOCATORS": {
-                "SRV6_MY_LOCATORS_LIST": [
-                    {
-                        "locator_name": "MAIN",
-                        "prefix": "FCBB:BBBB:20::"
-                    }
-                ]
-            },
-            "sonic-srv6:SRV6_MY_SIDS": {
-                "SRV6_MY_SIDS_LIST": [
-                    {
-                        "ip_prefix": "FCBB:BBBB:21::/48",
-                        "locator": "MAIN",
-                        "action": "uN"
-                    },
-                    {
-                        "ip_prefix": "FCBB:BBBB:20:F1::/64",
-                        "locator": "MAIN",
-                        "action": "uDT46"
-                    }
-                ]
-            }
-        }
-    },
     "SRV6_MY_SID_INVALID_ACTION": {
         "sonic-srv6:sonic-srv6": {
             "sonic-srv6:SRV6_MY_LOCATORS": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/static-route.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/static-route.json
index f7380c3fc64..52ee7f1a92c 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/static-route.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/static-route.json
@@ -141,6 +141,55 @@
             }
         }
     },
+    "STATIC_ROUTE_TEST_WITH_ADVERTISE": {
+        "sonic-interface:sonic-interface": {
+            "sonic-interface:INTERFACE": {
+                "INTERFACE_IPPREFIX_LIST": [
+                    {
+                        "family": "IPv4",
+                        "ip-prefix": "10.0.0.1/30",
+                        "name": "Ethernet8",
+                        "scope": "global"
+                    }
+                ],
+                "INTERFACE_LIST": [
+                    {
+                        "name": "Ethernet8"
+                    }
+                ]
+            }
+        },
+       "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth8",
+                        "description": "Ethernet8",
+                        "fec": "rs",
+                        "lanes": "65",
+                        "mtu": 9000,
+                        "name": "Ethernet8",
+                        "speed": 25000
+                    }
+                ]
+            }
+        },
+        "sonic-static-route:sonic-static-route": {
+            "sonic-static-route:STATIC_ROUTE": {
+                "STATIC_ROUTE_LIST": [{
+                        "prefix": "150.150.150.0/24",
+                        "vrf_name": "default",
+                        "ifname": "Ethernet8",
+                        "distance": "1",
+                        "nexthop-vrf": "default",
+                        "blackhole": "false",
+                        "advertise": "false"
+                }]
+            }
+        }
+    },
+
     "STATIC_ROUTE_TEST_WITH_VRF": {
          "sonic-vrf:sonic-vrf": {
            "VRF": {
@@ -688,7 +737,55 @@
             }
         }
     },
-        "STATIC_ROUTE_TEST_NEXTHOP_VRF_INVALID": {
+    "STATIC_ROUTE_TEST_WITH_ADVERTISE_INVALID": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "fec": "rs",
+                        "lanes": "65",
+                        "mtu": 9000,
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    }
+                ]
+            }
+        },
+        "sonic-interface:sonic-interface": {
+            "sonic-interface:INTERFACE": {
+                "INTERFACE_IPPREFIX_LIST": [
+                    {
+                        "family": "IPv4",
+                        "ip-prefix": "1.0.0.1/30",
+                        "name": "Ethernet0",
+                        "scope": "global"
+                    }
+                ],
+                "INTERFACE_LIST": [
+                    {
+                        "name": "Ethernet0"
+                    }
+                ]
+            }
+        },
+        "sonic-static-route:sonic-static-route": {
+            "sonic-static-route:STATIC_ROUTE": {
+                "STATIC_ROUTE_LIST": [{
+                        "prefix": "16.16.16.0/24",
+                        "vrf_name": "default",
+                        "nexthop": "1.0.0.5",
+                        "distance": "1",
+                        "nexthop-vrf": "default",
+                        "advertise": "down",
+                        "blackhole": "true"
+                }]
+            }
+        }
+    },
+    "STATIC_ROUTE_TEST_NEXTHOP_VRF_INVALID": {
         "sonic-port:sonic-port": {
             "sonic-port:PORT": {
                 "PORT_LIST": [
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
index 762287c82cd..e818091198c 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
@@ -737,7 +737,141 @@
             }
         }
     },
-
+    "VLAN_INTERFACE_MAC_ADDR": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "lanes": "1",
+                        "name": "Ethernet0",
+                        "speed": 25000,
+                        "mode":"trunk"
+                    }
+                ]
+            }
+        },
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "description": "vlan_nat",
+                        "name": "Vlan100"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_MEMBER": {
+                "VLAN_MEMBER_LIST": [
+                    {
+                        "port": "Ethernet0",
+                        "tagging_mode": "tagged",
+                        "name": "Vlan100"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_INTERFACE": {
+                "VLAN_INTERFACE_LIST": [
+                    {
+                        "name": "Vlan100",
+                        "mac_addr": "02:26:9b:73:c1:1a"
+                    }
+                ]
+            }
+        }
+    },
+    "VLAN_INTERFACE_UPPER_MAC_ADDR": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "lanes": "1",
+                        "name": "Ethernet0",
+                        "speed": 25000,
+                        "mode":"trunk"
+                    }
+                ]
+            }
+        },
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "description": "vlan_nat",
+                        "name": "Vlan100"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_MEMBER": {
+                "VLAN_MEMBER_LIST": [
+                    {
+                        "port": "Ethernet0",
+                        "tagging_mode": "tagged",
+                        "name": "Vlan100"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_INTERFACE": {
+                "VLAN_INTERFACE_LIST": [
+                    {
+                        "name": "Vlan100",
+                        "mac_addr": "02:AB:CD:EF:12:34"
+                    }
+                ]
+            }
+        }
+    },
+    "VLAN_INTERFACE_INVALID_MAC_ADDR": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "lanes": "1",
+                        "name": "Ethernet0",
+                        "speed": 25000,
+                        "mode":"trunk"
+                    }
+                ]
+            }
+        },
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "description": "vlan_nat",
+                        "name": "Vlan100"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_MEMBER": {
+                "VLAN_MEMBER_LIST": [
+                    {
+                        "port": "Ethernet0",
+                        "tagging_mode": "tagged",
+                        "name": "Vlan100"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_INTERFACE": {
+                "VLAN_INTERFACE_LIST": [
+                    {
+                        "name": "Vlan100",
+                        "mac_addr": "badaddr"
+                    }
+                ]
+            }
+        }
+    },
     "VLAN_MEMBERS_WITHOUT_CREATING_VLAN": {
         "sonic-port:sonic-port": {
             "sonic-port:PORT": {
@@ -979,5 +1113,120 @@
                 ]
             }
         }
+    },
+    "VLAN_INTERFACE_WITH_VNET_AND_IP_PREFIXES": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        },
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan100"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_INTERFACE": {
+                "VLAN_INTERFACE_LIST": [
+                    {
+                        "name": "Vlan100",
+                        "vnet_name": "Vnet1"
+                    }
+                ],
+                "VLAN_INTERFACE_IPPREFIX_LIST": [
+                    {
+                        "name": "Vlan100",
+                        "ip-prefix": "192.168.1.1/24",
+                        "family": "IPv4",
+                        "scope": "global"
+                    },
+                    {
+                        "name": "Vlan100",
+                        "ip-prefix": "2001:db8::1/64",
+                        "family": "IPv6",
+                        "scope": "global"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VLAN_INTERFACE_WITH_INVALID_VNET_NAME_REFERENCE": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        },
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan100"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_INTERFACE": {
+                "VLAN_INTERFACE_LIST": [
+                    {
+                        "name": "Vlan100",
+                        "vnet_name": "NonExistentVnet"
+                    }
+                ]
+            }
+        }
+    },
+    
+    "VLAN_INTERFACE_WITH_MISSING_VNET": {
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan100"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_INTERFACE": {
+                "VLAN_INTERFACE_LIST": [
+                    {
+                        "name": "Vlan100",
+                        "vnet_name": "Vnet1"
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan_sub_interface.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan_sub_interface.json
index bb3ba554e4e..36371e691d7 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan_sub_interface.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan_sub_interface.json
@@ -569,5 +569,215 @@
                 ]
             }
         }
+    },
+    "VLAN_SUB_INTERFACE_WITH_VALID_VNET_NAME": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        },
+        "sonic-vlan-sub-interface:sonic-vlan-sub-interface": {
+            "sonic-vlan-sub-interface:VLAN_SUB_INTERFACE": {
+                "VLAN_SUB_INTERFACE_LIST": [
+                    {
+                        "name": "Ethernet8.10",
+                        "vnet_name": "Vnet1"
+                    }
+                ],
+                "VLAN_SUB_INTERFACE_IPPREFIX_LIST": [
+                    {
+                        "name": "Ethernet8.10",
+                        "ip-prefix": "10.0.0.1/30"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "admin_status": "up",
+                        "alias": "Ethernet8/1",
+                        "description": "Ethernet8",
+                        "lanes": "45,46,47,48",
+                        "mtu": 9000,
+                        "speed": 100000
+                    }
+                ]
+            }
+        }
+    },
+    "VLAN_SUB_INTERFACE_WITH_INVALID_VNET_NAME": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        },
+        "sonic-vlan-sub-interface:sonic-vlan-sub-interface": {
+            "sonic-vlan-sub-interface:VLAN_SUB_INTERFACE": {
+                "VLAN_SUB_INTERFACE_LIST": [
+                    {
+                        "name": "Ethernet8.10",
+                        "vnet_name": "NonExistentVnet"
+                    }
+                ],
+                "VLAN_SUB_INTERFACE_IPPREFIX_LIST": [
+                    {
+                        "name": "Ethernet8.10",
+                        "ip-prefix": "10.0.0.1/30"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "admin_status": "up",
+                        "alias": "Ethernet8/1",
+                        "description": "Ethernet8",
+                        "lanes": "45,46,47,48",
+                        "mtu": 9000,
+                        "speed": 100000
+                    }
+                ]
+            }
+        }
+    },
+    "VLAN_SUB_INTERFACE_WITH_VNET_PORTCHANNEL": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        },
+        "sonic-vlan-sub-interface:sonic-vlan-sub-interface": {
+            "sonic-vlan-sub-interface:VLAN_SUB_INTERFACE": {
+                "VLAN_SUB_INTERFACE_LIST": [
+                    {
+                        "name": "PortChannel01.8",
+                        "vnet_name": "Vnet1"
+                    }
+                ],
+                "VLAN_SUB_INTERFACE_IPPREFIX_LIST": [
+                    {
+                        "name": "PortChannel01.8",
+                        "ip-prefix": "10.0.0.1/30"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "lanes": "65",
+                        "mtu": 9000,
+                        "name": "Ethernet0",
+                        "tpid": "0x8100",
+                        "speed": 25000
+                    }
+                ]
+            }
+        },
+        "sonic-portchannel:sonic-portchannel": {
+            "sonic-portchannel:PORTCHANNEL": {
+                "PORTCHANNEL_LIST": [
+                    {
+                        "admin_status": "up",
+                        "min_links": "1",
+                        "mtu": "9100",
+                        "tpid": "0x8100",
+                        "lacp_key": "auto",
+                        "name": "PortChannel01"
+                    }
+                ]
+            }
+        }
+    },
+    "VLAN_SUB_INTERFACE_WITH_MISSING_VNET": {
+        "sonic-vlan-sub-interface:sonic-vlan-sub-interface": {
+            "sonic-vlan-sub-interface:VLAN_SUB_INTERFACE": {
+                "VLAN_SUB_INTERFACE_LIST": [
+                    {
+                        "name": "Ethernet8.10",
+                        "vnet_name": "Vnet1"
+                    }
+                ],
+                "VLAN_SUB_INTERFACE_IPPREFIX_LIST": [
+                    {
+                        "name": "Ethernet8.10",
+                        "ip-prefix": "10.0.0.1/30"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "admin_status": "up",
+                        "alias": "Ethernet8/1",
+                        "description": "Ethernet8",
+                        "lanes": "45,46,47,48",
+                        "mtu": 9000,
+                        "speed": 100000
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vnet.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vnet.json
index 9dcb6753028..88e1481f2f9 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vnet.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vnet.json
@@ -178,5 +178,417 @@
                 ]
             }
         }
+    },
+
+    "VNET_ROUTE_TUNNEL_MIN_TEST": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10001"
+                    }
+                ]
+            },
+
+            "sonic-vnet:VNET_ROUTE_TUNNEL": {
+                "VNET_ROUTE_TUNNEL_LIST": [
+                    {
+                        "vnet_name": "Vnet1",
+                        "prefix": "10.0.0.0/24",
+                        "endpoint": "192.168.1.1"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VNET_ROUTE_TUNNEL_MULTI_TEST": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10001"
+                    },
+                    {
+                        "name": "Vnet2",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10002"
+                    }
+                ]
+            },
+    
+            "sonic-vnet:VNET_ROUTE_TUNNEL": {
+                "VNET_ROUTE_TUNNEL_LIST": [
+                    {
+                        "vnet_name": "Vnet1",
+                        "prefix":"10.0.0.0/24",
+                        "endpoint": "192.168.1.1",
+                        "vni": "10011"
+                    },
+                    {
+                        "vnet_name": "Vnet2",
+                        "prefix":"10.0.1.0/24",
+                        "endpoint": "192.168.1.2",
+                        "vni": "10012"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VNET_ROUTE_TUNNEL_COMPLETE_TEST": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10001"
+                    }
+                ]
+            },
+
+            "sonic-vnet:VNET_ROUTE_TUNNEL": {
+                "VNET_ROUTE_TUNNEL_LIST": [
+                    {
+                        "vnet_name": "Vnet1",
+                        "prefix":"10.0.0.0/24",
+                        "endpoint": "192.168.1.1",
+                        "mac_address": "00:aa:bb:cc:dd:ee",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_DUPLICATE_NAME": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10001"
+                    }
+                ]
+            },
+
+            "sonic-vnet:VNET_ROUTE_TUNNEL": {
+                "VNET_ROUTE_TUNNEL_LIST": [
+                    {
+                        "vnet_name": "Vnet1",
+                        "prefix":"10.0.0.0/24",
+                        "endpoint": "192.168.1.1",
+                        "vni": "10011"
+                    },
+                    {
+                        "vnet_name": "Vnet1",
+                        "prefix":"10.0.0.0/24",
+                        "endpoint": "192.168.1.2",
+                        "vni": "10012"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_INVALID_ENDPOINT": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10001"
+                    }
+                ]
+            },
+
+            "sonic-vnet:VNET_ROUTE_TUNNEL": {
+                "VNET_ROUTE_TUNNEL_LIST": [
+                    {
+                        "vnet_name": "Vnet1",
+                        "prefix":"10.0.0.0/24",
+                        "endpoint": "256.256.256.256",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_INVALID_MAC": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10001"
+                    }
+                ]
+            },
+
+            "sonic-vnet:VNET_ROUTE_TUNNEL": {
+                "VNET_ROUTE_TUNNEL_LIST": [
+                    {
+                        "vnet_name": "Vnet1",
+                        "prefix":"10.0.0.0/24",
+                        "endpoint": "192.168.1.1",
+                        "mac_address": "GG:HH:II:JJ:KK:LL",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_INVALID_VNI": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10001"
+                    }
+                ]
+            },
+
+            "sonic-vnet:VNET_ROUTE_TUNNEL": {
+                "VNET_ROUTE_TUNNEL_LIST": [
+                    {
+                        "vnet_name": "Vnet1",
+                        "prefix":"10.0.0.0/24",
+                        "endpoint": "192.168.1.1",
+                        "vni": "16777216"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_INVALID_NAME_FORMAT": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10001"
+                    }
+                ]
+            },
+
+            "sonic-vnet:VNET_ROUTE_TUNNEL": {
+                "VNET_ROUTE_TUNNEL_LIST": [
+                    {
+                        "vnet_name": "Vnet1",
+                        "endpoint": "192.168.1.1",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_INVALID_PREFIX": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10001"
+                    }
+                ]
+            },
+
+            "sonic-vnet:VNET_ROUTE_TUNNEL": {
+                "VNET_ROUTE_TUNNEL_LIST": [
+                    {
+                        "vnet_name": "Vnet1",
+                        "prefix":"300.168.1.0/24",
+                        "endpoint": "192.168.1.1",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_MISSING_ENDPOINT": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10001"
+                    }
+                ]
+            },
+
+            "sonic-vnet:VNET_ROUTE_TUNNEL": {
+                "VNET_ROUTE_TUNNEL_LIST": [
+                    {
+                        "vnet_name": "Vnet1",
+                        "prefix":"10.0.0.0/24",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        }
+    },
+
+    "VNET_ROUTE_TUNNEL_TEST_NONEXISTENT_VNET": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "vtep1",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            }
+        },
+
+        "sonic-vnet:sonic-vnet": {
+            "sonic-vnet:VNET": {
+                "VNET_LIST": [
+                    {
+                        "name": "Vnet1",
+                        "vxlan_tunnel": "vtep1",
+                        "vni": "10001"
+                    }
+                ]
+            },
+
+            "sonic-vnet:VNET_ROUTE_TUNNEL": {
+                "VNET_ROUTE_TUNNEL_LIST": [
+                    {
+                        "vnet_name": "NonexistentVnet",
+                        "prefix":"10.0.0.0/24",
+                        "endpoint": "192.168.1.1",
+                        "vni": "10011"
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json
index 79046b11672..cac43662363 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json
@@ -196,7 +196,7 @@
             }
         }
     },
-    "VXLAN_TUNNEL_NAME_INVALID_LENGTH_TEST": {
+    "VXLAN_TUNNEL_NAME_LONG_VALID_TEST": {
         "sonic-vlan:sonic-vlan": {
             "sonic-vlan:VLAN": {
                 "VLAN_LIST": [
@@ -227,7 +227,7 @@
             }
         }
     },
-    "VXLAN_TUNNEL_NAME_INVALID_TEST": {
+    "VXLAN_TUNNEL_NAME_EMPTY_VALID_TEST": {
         "sonic-vlan:sonic-vlan": {
             "sonic-vlan:VLAN": {
                 "VLAN_LIST": [
@@ -321,5 +321,35 @@
                 ]
             }
         }
+    },
+    "VXLAN_TUNNEL_MAX_ELEM_VALID_TEST": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    { "name": "vtep1", "src_ip": "1.2.3.4" },
+                    { "name": "vtep2", "src_ip": "2.3.4.5" }
+                ]
+            }
+        }
+    },
+    "VXLAN_TUNNEL_MAX_ELEM_INVALID_TEST": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    { "name": "vtep1", "src_ip": "1.2.3.4" },
+                    { "name": "vtep2", "src_ip": "2.3.4.5" },
+                    { "name": "vtep3", "src_ip": "3.4.5.6" }
+                ]
+            }
+        }
+    },
+    "VXLAN_TUNNEL_NAME_STRING_VALID_TEST": {
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    { "name": "arbitrary_string", "src_ip": "5.6.7.8" }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-buffer-profile.yang b/src/sonic-yang-models/yang-models/sonic-buffer-profile.yang
index 418302e9fc6..b9684b0767e 100644
--- a/src/sonic-yang-models/yang-models/sonic-buffer-profile.yang
+++ b/src/sonic-yang-models/yang-models/sonic-buffer-profile.yang
@@ -85,6 +85,14 @@ module sonic-buffer-profile {
                     }
                     description "Profile is dynamically calculated or user configured";
                 }
+
+                leaf packet_discard_action {
+                    type enumeration {
+                        enum drop;
+                        enum trim;
+                    }
+                    description "Action on failure to admit a packet to Shared Buffer/MMU";
+                }
             }
         }
     }
diff --git a/src/sonic-yang-models/yang-models/sonic-debug-counter.yang b/src/sonic-yang-models/yang-models/sonic-debug-counter.yang
new file mode 100644
index 00000000000..368d689cee3
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-debug-counter.yang
@@ -0,0 +1,75 @@
+module sonic-debug-counter {
+    namespace "http://github.com/sonic-net/sonic-debug-counter";
+    prefix dbgcnt;
+    yang-version 1.1;
+
+    import sonic-types {
+		prefix stypes;
+    }
+
+    organization
+        "SONiC";
+
+    contact
+        "SONiC";
+
+    description
+        "SONiC Debug Counter Yang Model";
+
+    revision 2024-03-07 {
+        description
+            "Initial revision";
+    }
+
+    container sonic-debug-counter{
+        container DEBUG_COUNTER {
+            list DEBUG_COUNTER_LIST {
+                key "name";
+
+                leaf name {
+                    type string;
+                }
+
+                leaf alias {
+                    type string;
+                    description "Alias of the counter";
+                }
+
+                leaf desc {
+                    type string;
+                    description "Description of counter (can include counter type, intended use, etc.)";
+                }
+
+                leaf group {
+                    type string;
+                    description "Group name to organize counters";
+                }
+
+                leaf type {
+                    type stypes:debug_counter_type;
+                    mandatory true;
+                    description "Counter type indicating scope (switch or port) and direction (ingress or egress)";
+                }
+            }
+        }
+
+        container DEBUG_COUNTER_DROP_REASON {
+            list DEBUG_COUNTER_DROP_REASON_LIST {
+                key "name reason";
+
+                leaf name {
+                    /* Counter must first be created in DEBUG_COUNTER_TABLE before we can add reasons to it */
+                    must "(current() = ../../../DEBUG_COUNTER/DEBUG_COUNTER_LIST[name=current()]/name)" {
+                        error-message "The counter does not exist in the DEBUG_COUNTER table";
+                    }
+                    type string;
+                }
+
+                leaf reason {
+                    type stypes:counter_drop_reason;
+                    description "Drop reason which will cause the counter to increment";
+                }
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index 7a423b54a6d..84a48c2bcb7 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -99,8 +99,8 @@ module sonic-device_metadata {
 
                 leaf type {
                     type string {
-                        length 1..255;
-                        pattern "ToRRouter|LeafRouter|SpineChassisFrontendRouter|ChassisBackendRouter|ASIC|MgmtToRRouter|SpineRouter|BackEndToRRouter|BackEndLeafRouter|EPMS|MgmtTsToR|BmcMgmtToRRouter|SonicHost|SonicDpu|not-provisioned";
+                        length 1..255;                        
+                        pattern "ToRRouter|LeafRouter|SpineChassisFrontendRouter|ChassisBackendRouter|ASIC|MgmtToRRouter|MgmtLeafRouter|MgmtSpineRouter|MgmtAccessRouter|SpineRouter|UpperSpineRouter|FabricSpineRouter|BackEndToRRouter|BackEndLeafRouter|EPMS|MgmtTsToR|BmcMgmtToRRouter|SonicHost|SmartSwitchDPU|not-provisioned";
                     }
                 }
 
@@ -169,7 +169,7 @@ module sonic-device_metadata {
 
                 leaf subtype {
                     type string {
-                        pattern "DualToR|SmartSwitch|Supervisor|UpstreamLC|DownstreamLC";
+                        pattern "DualToR|SmartSwitch|Supervisor|UpstreamLC|DownstreamLC|LowerSpineRouter";
                     }
                 }
 
@@ -275,6 +275,11 @@ module sonic-device_metadata {
                     type string;
                 }
 
+                leaf location_type {
+                    description "Location type for the device.";
+                    type string;
+                }
+
                 leaf nexthop_group {
                     description "Enable or disable Nexthop Group feature. This value only takes effect during boot time.";
                     type enumeration {
@@ -290,6 +295,33 @@ module sonic-device_metadata {
                     default "false";
                 }
 
+                leaf-list t2_group_asns {
+                    type inet:as-number;
+                    description "ASNs inner same group";
+                }
+
+                leaf-list anchor_route_source {
+                    type string;
+                    description "Set source of anchor route";
+                }
+
+                leaf orch_dash_zmq_enabled {
+                    type boolean;
+                    description "Enable ZMQ feature on APPL_DB DASH tables.";
+                    default "true";
+                }
+
+                leaf orch_route_zmq_enabled {
+                    type boolean;
+                    description "Enable ZMQ feature on APPL_DB ROUTE tables.";
+                    default "false";
+                }
+
+                leaf syslog_with_osversion {
+                    type boolean;
+                    description "Enable syslog with OS version feature.";
+                    default "false";
+                }
             }
             /* end of container localhost */
         }
diff --git a/src/sonic-yang-models/yang-models/sonic-device_neighbor_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_neighbor_metadata.yang
index d8646096f7e..de5034b9493 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_neighbor_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_neighbor_metadata.yang
@@ -93,6 +93,12 @@ module sonic-device_neighbor_metadata {
                 leaf deployment_id {
                     type uint32;
                 }
+
+                leaf slice_type {
+                    description "Metadata tag for the device.";
+                    type string;
+                }
+
             }
             /* end of list DEVICE_NEIGHBOR_METADATA_LIST */
         }
diff --git a/src/sonic-yang-models/yang-models/sonic-fine-grained-ecmp.yang b/src/sonic-yang-models/yang-models/sonic-fine-grained-ecmp.yang
index 8ac62f88db5..41c7ff66039 100644
--- a/src/sonic-yang-models/yang-models/sonic-fine-grained-ecmp.yang
+++ b/src/sonic-yang-models/yang-models/sonic-fine-grained-ecmp.yang
@@ -30,6 +30,10 @@ module sonic-fine-grained-ecmp {
     description
         "SONIC Fine Grained ECMP";
 
+    revision 2024-09-15 {
+        description "Added support for dynamic nexthop group.";
+    }
+
     revision 2023-01-19 {
         description "Initial revision.";
     }
@@ -40,7 +44,8 @@ module sonic-fine-grained-ecmp {
 
             enum route-based {
                description
-                 "Fine grained ecmp is used when the route prefix matches the FG_NHG_PREFIX prefix";
+                 "Fine grained ecmp is used when the route prefix matches the FG_NHG_PREFIX prefix and associated
+                  nexthop IPs match the FG_NHG_MEMBER IPs";
             }
 
             enum nexthop-based {
@@ -48,6 +53,11 @@ module sonic-fine-grained-ecmp {
                  "Fine grained ecmp is used when the nexthop IPs match the FG_NHG_MEMBER IPs";
             }
 
+            enum prefix-based {
+                description
+                    "Fine grained ecmp is used when the route prefix matches the FG_NHG_PREFIX prefix. The nexthop
+                     IPs are derived from the route updates and FG_NHG_MEMBER table doesn't need to be programmed.";
+            }
         }
 
         description
@@ -72,22 +82,32 @@ module sonic-fine-grained-ecmp {
                 leaf bucket_size{
                     type uint16;
                     mandatory true;
-                    description "total hash bucket size desired,
-                    recommended value of Lowest Common Multiple
-                    of 1..{max # of next-hops}";
+                    description "total hash bucket size desired, recommended value of Lowest Common
+                                 Multiple of 1..{max # of next-hops}";
                 }
 
                 leaf match_mode{
                     type match-mode-name;
                     mandatory true;
-                    description " The filtering method used to identify
-                    when to use Fine Grained vs regular route handling.
-                    nexthop-based looks to next-hop IP to filter routes
-                    and uses fine grained ecmp when nexthop IPs matches
-                    FG_NHG_MEMBER IPs. route-based looks to prefix to
-                    filter routes, and uses fine grained ecmp when the
-                    route prefix matches the FG_NHG_PREFIX prefix.";
+                    description " The filtering method used to identify when to use Fine Grained vs regular route handling.
+                                    -- nexthop-based filters on nexthop IPs only.
+                                    -- route-based filters on both prefix and nexthop IPs.
+                                    -- prefix-based filters on prefix only.";
                 }
+
+                leaf max_next_hops{
+                    when "current()/../match_mode = 'prefix-based'";
+                    mandatory true;
+                    type uint16 {
+                        range 1..128; // Adjust based on platform support
+                    }
+                    must "current() > 0" {
+                        error-message "max_next_hops needs to be a positive value in dynamic-nhg mode";
+                    }
+                    description "Applicable only for match_mode = prefix-based. Maximum number of nexthops that will be
+                                 received in route updates for any of the prefixes that match FG_NHG_PREFIX for this FG_NHG.";
+                }
+
             }
              /* end of list FG_NHG_LIST */
         }
@@ -136,7 +156,7 @@ module sonic-fine-grained-ecmp {
                 leaf FG_NHG{
                     type leafref {
                         path "/sfgecmp:sonic-fine-grained-ecmp/sfgecmp:FG_NHG/sfgecmp:FG_NHG_LIST/sfgecmp:name";
-                }
+                    }
                     mandatory true;
                     description "Fine Grained next-hop group name";
                 }
@@ -144,8 +164,7 @@ module sonic-fine-grained-ecmp {
                 leaf bank{
                     type uint16;
                     mandatory true;
-                    description "An index which specifies a bank/group
-                    in which the redistribution is performed";
+                    description "An index which specifies a bank/group in which the redistribution is performed";
                 }
 
                 leaf link{
@@ -157,9 +176,8 @@ module sonic-fine-grained-ecmp {
                             path "/lag:sonic-portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:name";
                         }
                     }
-                    description "Link associated with next-hop-ip, if
-                    configured, enables next-hop withdrawal/addition
-                    per link's operational state changes";
+                    description "Link associated with next-hop-ip, if configured, enables next-hop withdrawal/addition
+                                 per link's operational state changes";
                 }
             }
             /* end of list FG_NHG_MEMBER_LIST */
@@ -168,4 +186,4 @@ module sonic-fine-grained-ecmp {
     }
     /* end of container sonic-fine-grained-ecmp */
 }
-/* end of module sonic-fine-grained-ecmp */
\ No newline at end of file
+/* end of module sonic-fine-grained-ecmp */
diff --git a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
index 2494fb5e164..6434005e386 100644
--- a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
+++ b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
@@ -327,6 +327,19 @@ module sonic-flex_counter {
                 }
             }
 
+            container SRV6 {
+                /* SRV6_STAT_COUNTER_FLEX_COUNTER_GROUP */
+                leaf FLEX_COUNTER_STATUS {
+                    type flex_status;
+                }
+                leaf FLEX_COUNTER_DELAY_STATUS {
+                    type flex_delay_status;
+                }
+                leaf POLL_INTERVAL {
+                    type poll_interval;
+                }
+            }
+
         }
         /* end of container FLEX_COUNTER_TABLE */
 
diff --git a/src/sonic-yang-models/yang-models/sonic-gnmi.yang b/src/sonic-yang-models/yang-models/sonic-gnmi.yang
index 389bac7a125..b5fb214a29c 100644
--- a/src/sonic-yang-models/yang-models/sonic-gnmi.yang
+++ b/src/sonic-yang-models/yang-models/sonic-gnmi.yang
@@ -107,9 +107,9 @@ module sonic-gnmi {
                         "client cert common name";
                 }
 
-                leaf role {
+                leaf-list role {
                     type string;
-                    mandatory true;
+                    min-elements 1;
                     description
                         "role of client cert common name";
                 }
diff --git a/src/sonic-yang-models/yang-models/sonic-hash.yang b/src/sonic-yang-models/yang-models/sonic-hash.yang
index d95f8240692..7ade644f007 100644
--- a/src/sonic-yang-models/yang-models/sonic-hash.yang
+++ b/src/sonic-yang-models/yang-models/sonic-hash.yang
@@ -40,6 +40,7 @@ module sonic-hash {
             enum INNER_SRC_IP;
             enum INNER_L4_DST_PORT;
             enum INNER_L4_SRC_PORT;
+            enum IPV6_FLOW_LABEL;
         }
     }
 
diff --git a/src/sonic-yang-models/yang-models/sonic-high-frequency-telemetry.yang b/src/sonic-yang-models/yang-models/sonic-high-frequency-telemetry.yang
new file mode 100644
index 00000000000..bcb58d7aabd
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-high-frequency-telemetry.yang
@@ -0,0 +1,109 @@
+module sonic-high-frequency-telemetry {
+    yang-version 1.1;
+
+    namespace "http://github.com/sonic-net/sonic-high-frequency-telemetry";
+
+    prefix sonic-high-frequency-telemetry;
+
+    import sonic-port {
+        prefix port;
+    }
+
+    import sonic-buffer-pool {
+        prefix bpl;
+    }
+
+    import sonic-buffer-pg {
+        prefix bpg;
+    }
+
+    import sonic-buffer-queue {
+        prefix bql;
+    }
+
+    container sonic-high-frequency-telemetry {
+        container HIGH_FREQUENCY_TELEMETRY_PROFILE {
+            description "HIGH_FREQUENCY_TELEMETRY_PROFILE part of config_db.json";
+            list HIGH_FREQUENCY_TELEMETRY_PROFILE_LIST {
+
+                key "name";
+
+                leaf name {
+                    type string {
+                        length 1..128;
+                    }
+                }
+
+                leaf stream_state {
+                    mandatory true;
+                    type string {
+                        pattern "enabled|disabled";
+                    }
+                }
+
+                leaf poll_interval {
+                    mandatory true;
+                    description "The interval to poll counter, unit milliseconds.";
+                    type uint32;
+                }
+
+                leaf otel_endpoint {
+                    description "The endpoint of OpenTelemetry collector. E.G. 192.168.0.100:4318. It will use the local OpenTelemetry collector if this value isn't provided.";
+                    type string {
+                        length 1..4096;
+                    }
+                }
+
+                leaf otel_certs {
+                    description "The path of certificates for OpenTelemetry collector. E.G. /etc/sonic/otel/cert.private. If this value isn't provided, we will use a non-secure channel.";
+                    type string {
+                        length 1..4096;
+                    }
+                }
+
+            }
+        }
+
+        container HIGH_FREQUENCY_TELEMETRY_GROUP {
+            description "HIGH_FREQUENCY_TELEMETRY_GROUP part of config_db.json";
+            list HIGH_FREQUENCY_TELEMETRY_GROUP_LIST {
+                key "profile_name group_name";
+
+                leaf profile_name {
+                    type leafref {
+                        path "/sonic-high-frequency-telemetry:sonic-high-frequency-telemetry/HIGH_FREQUENCY_TELEMETRY_PROFILE/HIGH_FREQUENCY_TELEMETRY_PROFILE_LIST/name";
+                    }
+                }
+
+                // The table name of config db
+                leaf group_name {
+                    type enumeration {
+                        enum PORT;
+                        enum BUFFER_POOL;
+                        enum QUEUE;
+                        enum INGRESS_PRIORITY_GROUP;
+                    }
+                }
+
+                leaf-list object_names {
+                   type string;
+                   must "( ../group_name = 'PORT' and current() = /port:sonic-port/port:PORT/port:PORT_LIST/port:name )"
+                        + " or ( ../group_name = 'BUFFER_POOL' and current() = /bpl:sonic-buffer-pool/bpl:BUFFER_POOL/bpl:BUFFER_POOL_LIST/bpl:name )"
+                        + " or ( ../group_name = 'INGRESS_PRIORITY_GROUP' and substring-before(current(), '|') = /bpg:sonic-buffer-pg/bpg:BUFFER_PG/bpg:BUFFER_PG_LIST/bpg:port and re-match(substring-after(current(), '|'), '[0-9]+') )"
+                        + " or ( ../group_name = 'QUEUE' and substring-before(current(), '|') = /bql:sonic-buffer-queue/bql:BUFFER_QUEUE/bql:BUFFER_QUEUE_LIST/bql:port and re-match(substring-after(current(), '|'), '[0-9]+') )";
+                }
+
+                must "count(object_names) > 0";
+
+                leaf-list object_counters {
+                    type string;
+                    must "( ../group_name = 'PORT' and re-match(current(), 'IF_IN_OCTETS|IF_IN_UCAST_PKTS|IF_IN_DISCARDS|IF_IN_ERRORS|IN_CURR_OCCUPANCY_BYTES|IF_OUT_OCTETS|IF_OUT_DISCARDS|IF_OUT_ERRORS|IF_OUT_UCAST_PKTS|OUT_CURR_OCCUPANCY_BYTES|TRIM_PACKETS') )"
+                        + " or ( ../group_name = 'BUFFER_POOL' and re-match(current(), 'DROPPED_PACKETS|CURR_OCCUPANCY_BYTES|WATERMARK_BYTES|CURR_OCCUPANCY_BYTES|XOFF_ROOM_WATERMARK_BYTES') )"
+                        + " or ( ../group_name = 'INGRESS_PRIORITY_GROUP' and re-match(current(), 'PACKETS|BYTES|CURR_OCCUPANCY_BYTES|WATERMARK_BYTES|XOFF_ROOM_CURR_OCCUPANCY_BYTES|XOFF_ROOM_WATERMARK_BYTES|DROPPED_PACKETS') )"
+                        + " or ( ../group_name = 'QUEUE' and re-match(current(), 'PACKETS|BYTES|DROPPED_PACKETS|CURR_OCCUPANCY_BYTES|WATERMARK_BYTES|WRED_ECN_MARKED_PACKETS|TRIM_PACKETS') )";
+                }
+
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-interface.yang b/src/sonic-yang-models/yang-models/sonic-interface.yang
index f8c676b7ca8..78a92a78194 100644
--- a/src/sonic-yang-models/yang-models/sonic-interface.yang
+++ b/src/sonic-yang-models/yang-models/sonic-interface.yang
@@ -5,6 +5,10 @@ module sonic-interface {
 	namespace "http://github.com/sonic-net/sonic-interface";
 	prefix intf;
 
+	import ietf-yang-types {
+		prefix yang;
+	}
+
 	import sonic-types {
 		prefix stypes;
 	}
@@ -21,9 +25,17 @@ module sonic-interface {
 	import sonic-vrf {
 		prefix vrf;
 	}
+	
+	import sonic-vnet {
+		prefix svnet;
+	}
 
 	description "INTERFACE yang Module for SONiC OS";
 
+	revision 2025-03-06 {
+		description "Add leaf vnet_name";
+	}
+
 	revision 2021-03-30 {
 		description "Modify the type of vrf name";
 	}
@@ -55,6 +67,13 @@ module sonic-interface {
 						path "/vrf:sonic-vrf/vrf:VRF/vrf:VRF_LIST/vrf:name";
 					}
 				}
+				
+				leaf vnet_name {
+					description "Reference to the name of a VNET in sonic-vnet model";
+					type leafref {
+						path "/svnet:sonic-vnet/svnet:VNET/svnet:VNET_LIST/svnet:name";
+					}   
+				}
 
 				leaf nat_zone {
 					description "NAT Zone for the interface";
@@ -81,6 +100,11 @@ module sonic-interface {
 					default disable;
 				}
 
+				leaf mac_addr {
+					description "Assign administrator-provided MAC address to Interface";
+					type yang:mac-address;
+				}
+
                 leaf loopback_action {
                     description "Packet action when a packet ingress and gets routed on the same IP interface";
                     type stypes:loopback_action;
diff --git a/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang b/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang
index 4a012b89433..5e5047d07d1 100644
--- a/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang
+++ b/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang
@@ -55,6 +55,11 @@ module sonic-loopback-interface {
                     }
                     default "0";
                 }
+
+                leaf admin_status {
+                    type stypes:admin_status;
+                    default up;
+                }
             }
             /* end of LOOPBACK_INTERFACE_LIST */
 
diff --git a/src/sonic-yang-models/yang-models/sonic-mirror-session.yang b/src/sonic-yang-models/yang-models/sonic-mirror-session.yang
index b0f695fbe9c..8fc858879bf 100644
--- a/src/sonic-yang-models/yang-models/sonic-mirror-session.yang
+++ b/src/sonic-yang-models/yang-models/sonic-mirror-session.yang
@@ -82,7 +82,10 @@ module sonic-mirror-session {
 
                 leaf src_ip {
                     when "current()/../type = 'ERSPAN'";
-                    type inet:ipv4-address;
+                    must "(contains(current(), ':') and contains(../dst_ip, ':')) or (not(contains(current(), ':')) and not(contains(../dst_ip, ':')))" {
+                        error-message "src_ip and dst_ip must have the same IP version.";
+                    }
+                    type inet:ip-address;
                     description
                         "ERSPAN source ip. This IP will be set as source ip in
                         outer header of mirrored frame ";
@@ -90,7 +93,10 @@ module sonic-mirror-session {
 
                 leaf dst_ip {
                     when "current()/../type = 'ERSPAN'";
-                    type inet:ipv4-address;
+                    must "(contains(current(), ':') and contains(../src_ip, ':')) or (not(contains(current(), ':')) and not(contains(../src_ip, ':')))" {
+                        error-message "src_ip and dst_ip must have the same IP version.";
+                    }
+                    type inet:ip-address;
                     description
                         "ERSPAN destination ip. Mirrored frames will be routed to this destination.
                         This IP will be set as destination ip in outer header of mirrored frame ";
diff --git a/src/sonic-yang-models/yang-models/sonic-mux-cable.yang b/src/sonic-yang-models/yang-models/sonic-mux-cable.yang
index c1f51e67eec..7aa533faaaa 100644
--- a/src/sonic-yang-models/yang-models/sonic-mux-cable.yang
+++ b/src/sonic-yang-models/yang-models/sonic-mux-cable.yang
@@ -50,6 +50,15 @@ module sonic-mux-cable {
                     description "SONiC DualToR interface cable type.";
                 }
 
+                leaf prober_type {
+                    type enumeration {
+                        enum hardware;
+                        enum software;
+                    }
+                    default software;
+                    description "DualToR LinkMrgrd Icmp Prober mode.";
+                }
+
                 leaf server_ipv4 {
                     type inet:ipv4-prefix;
 
diff --git a/src/sonic-yang-models/yang-models/sonic-neigh.yang b/src/sonic-yang-models/yang-models/sonic-neigh.yang
index 32e6065b16b..0d3271ff174 100644
--- a/src/sonic-yang-models/yang-models/sonic-neigh.yang
+++ b/src/sonic-yang-models/yang-models/sonic-neigh.yang
@@ -11,6 +11,13 @@ module sonic-neigh {
 		prefix yang;
 	}
 
+	import sonic-portchannel {
+		prefix lag;
+	}
+
+	import sonic-port {
+		prefix port;
+	}
 	// TODO: Uncomment the following lines when sonic-vlan.yang is available
 	// import sonic-vlan {
 	// 	prefix svlan;
@@ -29,18 +36,25 @@ module sonic-neigh {
 		container NEIGH {
 			description "NEIGH configuration";
 			list NEIGH_LIST {
-				key "vlan neighbor";
+				key "port neighbor";
 
-				leaf vlan {
-					// TODO: Remove the following lines when sonic-vlan.yang is available
-					description "Neighbor Vlan interface ex. Vlan1000";
-					type string {
-						pattern "Vlan[0-9]+";
+				leaf port {
+					description "Neighbor interface ex. Vlan1000, PortChannel1024";
+					type union {
+						type leafref {
+							path /lag:sonic-portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:name;
+						}
+						type leafref {
+							path /port:sonic-port/port:PORT/port:PORT_LIST/port:name;
+						}
+						type string {
+							pattern "Vlan[0-9]+";
+						}
+						// TODO: Uncomment the following lines when sonic-vlan.yang is available
+						// type leafref {
+						// 	path "/svlan:sonic-vlan/svlan:VLAN/svlan:VLAN_LIST/svlan:name";
+						// }
 					}
-					// TODO: Uncomment the following lines when sonic-vlan.yang is available
-					// type leafref {
-					// 	path "/svlan:sonic-vlan/svlan:VLAN/svlan:VLAN_LIST/svlan:name";
-					// }
 				}
 
 				leaf neighbor {
diff --git a/src/sonic-yang-models/yang-models/sonic-port-qos-map.yang b/src/sonic-yang-models/yang-models/sonic-port-qos-map.yang
index f1b725ca889..4040ae1fbac 100644
--- a/src/sonic-yang-models/yang-models/sonic-port-qos-map.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port-qos-map.yang
@@ -91,16 +91,18 @@ module sonic-port-qos-map {
 
                 leaf pfc_enable {
                     type string {
-                        pattern "[0-7](,[0-7])*";
+                        pattern "([0-7](,[0-7])*)?";
                     }
+                    description
+                        "Specify the queue(s) on which PFC is enabled. Empty string is allowed to disable PFC on all queues.";
                 }
 
                 leaf pfcwd_sw_enable {
                     type string {
-                        pattern "[0-7](,[0-7])*";
+                        pattern "([0-7](,[0-7])*)?";
                     }
                     description
-                        "Specify the queue(s) on which software pfc watchdog are enabled.";
+                        "Specify the queue(s) on which software pfc watchdog are enabled. Empty string is allowed to disable watchdog on all queues.";
                 }
 
                 leaf pfc_to_queue_map {
diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang
index 528f661b8fc..40a84dc8a29 100644
--- a/src/sonic-yang-models/yang-models/sonic-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port.yang
@@ -168,7 +168,7 @@ module sonic-port{
 				leaf subport {
 					description "Logical subport(s) for physical port breakout";
 					type uint8 {
-						range 0..8;
+						range 0..12;
 					}
 				}
 
diff --git a/src/sonic-yang-models/yang-models/sonic-portchannel.yang b/src/sonic-yang-models/yang-models/sonic-portchannel.yang
index 2694abb544e..7cbaafb59ee 100644
--- a/src/sonic-yang-models/yang-models/sonic-portchannel.yang
+++ b/src/sonic-yang-models/yang-models/sonic-portchannel.yang
@@ -9,6 +9,10 @@ module sonic-portchannel {
         prefix stypes;
     }
 
+    import ietf-yang-types {
+        prefix yang;
+    }
+
     import sonic-extension {
         prefix ext;
     }
@@ -193,6 +197,11 @@ module sonic-portchannel {
 			default disable;
 		}
 
+                leaf mac_addr {
+                    description "Assign administrator-provided MAC address to Interface";
+                    type yang:mac-address;
+                }
+
             } /* end of list PORTCHANNEL_INTERFACE_LIST */
 
             list PORTCHANNEL_INTERFACE_IPPREFIX_LIST {
diff --git a/src/sonic-yang-models/yang-models/sonic-smart-switch.yang b/src/sonic-yang-models/yang-models/sonic-smart-switch.yang
index 1b91e5b61ce..e77f7f54fdf 100644
--- a/src/sonic-yang-models/yang-models/sonic-smart-switch.yang
+++ b/src/sonic-yang-models/yang-models/sonic-smart-switch.yang
@@ -1,6 +1,6 @@
 module sonic-smart-switch {
 
-    yang-version 1.1;
+	yang-version 1.1;
 
 	namespace "http://github.com/sonic-net/sonic-smart-switch";
 	prefix smart-switch;
@@ -33,6 +33,18 @@ module sonic-smart-switch {
 		description "Add new container DPU_PORT";
 	}
 
+	revision 2025-03-19 {
+		description "Modify DPU_PORT to DPU and add new fields";
+	}
+
+	revision 2025-03-31 {
+		description "Add REMOTE_DPU, VDPU, and DASH_HA_GLOBAL_CONFIG containers";
+	}
+
+	revision 2025-08-18 {
+		description "Add midplane_ipv4 to DPU";
+	}
+
 	container sonic-smart-switch {
 
 		container MID_PLANE_BRIDGE {
@@ -85,17 +97,17 @@ module sonic-smart-switch {
 		}
 		/* end of container DPUS */
 
-		container DPU_PORT {
-			description "DPU_PORTs part of config_db.json";
+		container DPU {
+			description "DPUs part of config_db.json";
 
-			list DPU_PORT_LIST {
-				description "Name of the DPU port";
-				key "PORT_NAME";
+			list DPU_LIST {
+				key "dpu_name";
 
-				leaf PORT_NAME {
-					description "Name of the DPU port";
+				leaf dpu_name {
+					description "Name of the DPU";
 					type string {
-						pattern "[a-zA-Z]+[0-9]+";
+						pattern "[a-zA-Z0-9-]+[0-9]";
+						length 1..255;
 					}
 				}
 
@@ -104,6 +116,11 @@ module sonic-smart-switch {
 					type stypes:admin_status;
 				}
 
+				leaf local_port {
+					description "DPU Physical port name on the switch";
+					type stypes:interface_name;
+				}
+
 				leaf vip_ipv4 {
 					description "VIP IPv4 address from minigraph";
 					type inet:ipv4-address;
@@ -123,19 +140,186 @@ module sonic-smart-switch {
 					description "PA IPv6 address from minigraph";
 					type inet:ipv6-address;
 				}
+				
+				leaf midplane_ipv4 {
+					description "IPv4 IP on midplane from minigraph";
+					type inet:ipv4-address;
+				}
+
+				leaf dpu_id {
+					description "ID of the DPU from minigraph";
+					type string {
+						pattern [0-7];
+					}
+				}
 
 				leaf vdpu_id {
-					description "ID of VDPUs from minigraph";
-					type string;
+					description "guid of VDPU from minigraph";
+					type string {
+						length 1..255;
+					}
 				}
 
 				leaf gnmi_port {
-					description "Port gNMI runs on.";
+					description "TCP listening port for gnmi service on DPU";
+					type inet:port-number;
+				}
+
+				leaf orchagent_zmq_port {
+					description "TCP listening port for ZMQ service on DPU orchagent";
+					type inet:port-number;
+				}
+
+				leaf swbus_port {
+					description "TCP listening port for swbus service for this DPU.";
+					type inet:port-number;
+				}
+			}
+		}
+		/* end of container DPU */
+
+		container REMOTE_DPU {
+			description "REMOTE_DPU part of config_db.json";
+
+			list REMOTE_DPU_LIST {
+				key "dpu_name";
+
+				leaf dpu_name {
+					description "Name of the dpu";
+					type string {
+						pattern "[a-zA-Z0-9-]+[0-9]+";
+						length 1..255;
+					}
+				}
+
+				leaf type {
+					description "Type of dpu";
+					type string {
+						length 1..255;
+					}
+				}
+
+				leaf pa_ipv4 {
+					description "DPU ipv4 physical address";
+					type inet:ipv4-address;
+				}
+
+				leaf pa_ipv6 {
+					description "DPU ipv6 physical address";
+					type inet:ipv6-address;
+				}
+
+				leaf npu_ipv4 {
+					description "Loopback ipv4 of remote NPU";
+					type inet:ipv4-address;
+				}
+
+				leaf npu_ipv6 {
+					description "Loopback ipv6 of remote NPU";
+					type inet:ipv6-address;
+				}
+
+				leaf dpu_id {
+					description "ID of the DPU from minigraph";
+					type string {
+						pattern [0-7];
+					}
+				}
+
+				leaf swbus_port {
+					description "TCP listening port for swbus service for this DPU.";
 					type inet:port-number;
 				}
 			}
 		}
-		/* end of container DPU_PORT */
+		/* end of container REMOTE_DPU */
+
+		container VDPU {
+			description "VDPU part of config_db.json";
+
+			list VDPU_LIST {
+				key vdpu_id;
+
+				leaf vdpu_id {
+					description "guid of the VDPU";
+					type string {
+						length 1..255;
+					}
+				}
+
+				leaf profile {
+					description "VDPU profile. Currently unused, reserved for future use.";
+					type string {
+						length 1..255;
+					}
+				}
+
+				leaf tier {
+					description "VDPU tier. Currently unused, reserved for future use.";
+					type string {
+						length 1..255;
+					}
+				}
+
+				leaf-list main_dpu_ids {
+					description "Main DPUs involved in this VDPU";
+					type string {
+						pattern "[a-zA-Z0-9-]+[0-9]+";
+						length 1..255;
+					}
+				}
+			}
+		}
+		/* end of container VDPU */
+
+		container DASH_HA_GLOBAL_CONFIG {
+
+			container global {
+
+				description "DASH_HA_GLOBAL_CONFIG part of config_db.json";
+
+				leaf cp_data_channel_port {
+					description "Control plane data channel port, used for bulk sync";
+					type inet:port-number;
+				}
+
+				leaf dp_channel_port {
+					description "Destination port when tunneling packets via DPU-to-DPU data plane channel";
+					type inet:port-number;
+				}
+
+				leaf dp_channel_src_port_min {
+					description "Minimum source port used when tunneling packets via DPU-to-DPU data plane channel";
+					type inet:port-number;
+				}
+
+				leaf dp_channel_src_port_max {
+					description "Maximum source port used when tunneling packets via DPU-to-DPU data plane channel";
+					type inet:port-number;
+				}
+
+				leaf dp_channel_probe_interval_ms {
+					description "Interval in milliseconds for sending each DPU-to-DPU data path probe";
+					type uint32;
+				}
+
+				leaf dp_channel_probe_fail_threshold {
+					description "Number of probe failures needed to consider data plane channel as dead";
+					type uint32;
+				}
+
+				leaf dpu_bfd_probe_interval_in_ms {
+					description "Interval in milliseconds for DPU BFD probe";
+					type uint32;
+				}
+
+				leaf dpu_bfd_probe_multiplier {
+					description "Number of DPU BFD probe failures before considering the probe as down";
+					type uint32;
+				}
+			}
+		}
+		/* end of container DASH_HA_GLOBAL_CONFIG */
 	}
 	/* end of container sonic-smart-switch */
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-srv6.yang b/src/sonic-yang-models/yang-models/sonic-srv6.yang
index 5f79dfed177..8e020141152 100644
--- a/src/sonic-yang-models/yang-models/sonic-srv6.yang
+++ b/src/sonic-yang-models/yang-models/sonic-srv6.yang
@@ -122,9 +122,6 @@ module sonic-srv6 {
                         enum pipe;
                     }
                 }
-
-                must 'starts-with(substring-before(./ip_prefix, "::"),
-                                  substring-before(/srv6:sonic-srv6/SRV6_MY_LOCATORS/SRV6_MY_LOCATORS_LIST[current()/locator]/prefix, "::"))';
             }
         }
 
diff --git a/src/sonic-yang-models/yang-models/sonic-static-route.yang b/src/sonic-yang-models/yang-models/sonic-static-route.yang
index 5b60569485d..10de8d6ee3b 100644
--- a/src/sonic-yang-models/yang-models/sonic-static-route.yang
+++ b/src/sonic-yang-models/yang-models/sonic-static-route.yang
@@ -95,6 +95,12 @@ module sonic-static-route {
           description
             "When interface is specified, forwarding happens through it";
         }
+        leaf advertise {
+          type string {
+            pattern "((true|false),)*(true|false)";
+          }
+          default "false";
+        }
         leaf distance {
           type string {
             pattern "((25[0-5]|2[0-4][0-9]|[0-1]?[0-9][0-9]?),)*(25[0-5]|2[0-4][0-9]|[0-1]?[0-9][0-9]?)";
diff --git a/src/sonic-yang-models/yang-models/sonic-trimming.yang b/src/sonic-yang-models/yang-models/sonic-trimming.yang
new file mode 100644
index 00000000000..2cb6e654fb3
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-trimming.yang
@@ -0,0 +1,68 @@
+module sonic-trimming {
+
+    yang-version 1.1;
+
+    namespace "http://github.com/sonic-net/sonic-trimming";
+    prefix trim;
+
+    description "TRIMMING YANG Module for SONiC OS";
+
+    revision 2024-11-01 {
+        description "First Revision";
+    }
+
+    container sonic-trimming {
+
+        container SWITCH_TRIMMING {
+
+            description "SWITCH_TRIMMING part of config_db.json";
+
+            container GLOBAL {
+
+                leaf size {
+                    description "Size (in bytes) to trim eligible packet";
+                    type uint32;
+                }
+
+                leaf dscp_value {
+                    description
+                        "DSCP value assigned to a packet after trimming.
+                        When set to from-tc, the tc_value is used for mapping to the DSCP";
+                    type union {
+                        type uint8 {
+                            range "0..63" {
+                                error-message "Invalid DSCP value";
+                                error-app-tag dscp-invalid;
+                            }
+                        }
+                        type string {
+                            pattern "from-tc";
+                        }
+                    }
+                }
+
+                leaf tc_value {
+                    description "TC value assigned to a packet after trimming";
+                    type uint8;
+                }
+
+                leaf queue_index {
+                    description
+                        "Queue index to use for transmission of a packet after trimming.
+                        When set to dynamic, the dscp_value is used for mapping to the queue";
+                    type union {
+                        type uint8;
+                        type string {
+                            pattern "dynamic";
+                        }
+                    }
+                }
+
+            }
+            /* end of container GLOBAL */
+        }
+        /* end of container SWITCH_TRIMMING */
+    }
+    /* end of container sonic-trimming */
+}
+/* end of module sonic-trimming */
diff --git a/src/sonic-yang-models/yang-models/sonic-vlan-sub-interface.yang b/src/sonic-yang-models/yang-models/sonic-vlan-sub-interface.yang
index 37e5f47a104..720cc84355c 100644
--- a/src/sonic-yang-models/yang-models/sonic-vlan-sub-interface.yang
+++ b/src/sonic-yang-models/yang-models/sonic-vlan-sub-interface.yang
@@ -22,8 +22,16 @@ module sonic-vlan-sub-interface {
         prefix vrf;
     }
 
+    import sonic-vnet {
+        prefix svnet;
+    }
+
     description "VLAN sub interface for SONiC OS";
 
+	revision 2025-03-06 {
+		description "Add leaf vnet_name";
+	}
+    
     revision 2021-11-11 {
         description "Initial version";
     }
@@ -74,6 +82,13 @@ module sonic-vlan-sub-interface {
                     }
                 }
 
+                leaf vnet_name {
+                    description "Reference to the name of a VNET in sonic-vnet model";
+                    type leafref {
+                        path "/svnet:sonic-vnet/svnet:VNET/svnet:VNET_LIST/svnet:name";
+                    }   
+                }
+
                 leaf loopback_action {
                     description "Packet action when a packet ingress and gets routed on the same IP interface";
                     type stypes:loopback_action;
diff --git a/src/sonic-yang-models/yang-models/sonic-vlan.yang b/src/sonic-yang-models/yang-models/sonic-vlan.yang
index 5d6f898c768..bc5afc63dd8 100644
--- a/src/sonic-yang-models/yang-models/sonic-vlan.yang
+++ b/src/sonic-yang-models/yang-models/sonic-vlan.yang
@@ -40,9 +40,16 @@ module sonic-vlan {
 	import sonic-interface {
 		prefix intf;
 	}
+	
+	import sonic-vnet {
+		prefix svnet;
+	}
 
 	description "VLAN yang Module for SONiC OS";
 
+	revision 2025-03-06 {
+		description "Add leaf vnet_name";
+	}
 
 	revision 2024-03-07 {
 		description "Add Constraints that are implemented in CLI";
@@ -86,6 +93,13 @@ module sonic-vlan {
 						path "/vrf:sonic-vrf/vrf:VRF/vrf:VRF_LIST/vrf:name";
 					}
 				}
+				
+				leaf vnet_name {
+					description "Reference to the name of a VNET in sonic-vnet model";
+					type leafref {
+						path "/svnet:sonic-vnet/svnet:VNET/svnet:VNET_LIST/svnet:name";
+					}   
+				}
 
 				leaf nat_zone {
 					description "NAT Zone for the vlan interface";
@@ -123,6 +137,10 @@ module sonic-vlan {
 					default disable;
 				}
 
+				leaf mac_addr {
+					description "Assign administrator-provided MAC address to Interface";
+					type yang:mac-address;
+				}
 
 				leaf loopback_action {
 					description "Packet action when a packet ingress and gets routed on the same IP interface";
diff --git a/src/sonic-yang-models/yang-models/sonic-vnet.yang b/src/sonic-yang-models/yang-models/sonic-vnet.yang
index 9a04105c4e3..c2ecc0c8b33 100644
--- a/src/sonic-yang-models/yang-models/sonic-vnet.yang
+++ b/src/sonic-yang-models/yang-models/sonic-vnet.yang
@@ -98,7 +98,49 @@ module sonic-vnet {
                     type yang:mac-address;
                 }
             }
+            /* end of list VNET_LIST */
         }
+        /* end of container VNET */
+
+        container VNET_ROUTE_TUNNEL {
+
+            description "ConfigDB VNET_ROUTE_TUNNEL table";
+            
+            list VNET_ROUTE_TUNNEL_LIST {
+                key "vnet_name prefix";
+
+                leaf vnet_name {
+                    description "VNET name";
+                    type leafref {
+                        path "/svnet:sonic-vnet/svnet:VNET/svnet:VNET_LIST/svnet:name";
+                    }
+                }
+                
+                leaf prefix {
+                    description "IPv4 prefix in CIDR format";
+                    type stypes:sonic-ip4-prefix;
+                }
+                
+                leaf endpoint {
+                    description "Endpoint/nexthop tunnel IP";
+                    type inet:ipv4-address;
+                    mandatory true;
+                }
+
+                leaf mac_address {
+                    description "Inner dest mac in encapsulated packet";
+                    type yang:mac-address;
+                }
+
+                leaf vni {
+                    description "A valid and active vni value in encapsulated packet";
+                    type stypes:vnid_type;
+                }
+            }
+            /* end of list VNET_ROUTE_TUNNEL_LIST */
+        }
+        /* end of container VNET_ROUTE_TUNNEL */
     }
+    /* end of container sonic-vnet */
 }
-
+/* end of module sonic-vnet */
\ No newline at end of file
diff --git a/src/sonic-yang-models/yang-models/sonic-vxlan.yang b/src/sonic-yang-models/yang-models/sonic-vxlan.yang
index 75ae6dc83ec..12a18814b65 100644
--- a/src/sonic-yang-models/yang-models/sonic-vxlan.yang
+++ b/src/sonic-yang-models/yang-models/sonic-vxlan.yang
@@ -46,10 +46,10 @@ module sonic-vxlan {
             list VXLAN_TUNNEL_LIST {
 
                 key "name";
-                max-elements 1;
+                max-elements 2;
 
                 leaf name {
-                    type stypes:interface_name;
+                    type string;
                 }
 
                 leaf src_ip {
diff --git a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
index f1a0629f322..bce59a9e0db 100644
--- a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
+++ b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
@@ -13,6 +13,10 @@ module sonic-acl {
 	import ietf-inet-types {
 		prefix inet;
 	}
+	
+	import ietf-yang-types {
+		prefix yang;
+	}
 
 	import sonic-types {
 		prefix stypes;
@@ -84,6 +88,11 @@ module sonic-acl {
 					}
 				}
 
+				leaf INNER_SRC_MAC_REWRITE_ACTION {
+					description "Inner Source Mac-adress rewrite action mapped to mac address";
+					type yang:mac-address;
+				}
+
 				leaf IP_TYPE {
 					type stypes:ip_type;
 				}
@@ -114,6 +123,11 @@ module sonic-acl {
 						leaf DST_IP {
 							type inet:ipv4-prefix;
 						}
+
+						leaf INNER_SRC_IP {
+							description "Source IP prefix for inner packet";
+							type inet:ipv4-prefix;
+						}
 					}
 
 					case ip6_prefix {
@@ -255,6 +269,11 @@ module sonic-acl {
 					}
 				}
 
+				leaf TUNNEL_VNI {
+					description "VXLAN Network Identifier";
+					type stypes:vnid_type;
+				}
+
 				leaf PCP {
 					when "(/acl:sonic-acl/acl:ACL_TABLE/acl:ACL_TABLE_LIST[ACL_TABLE_NAME=current()/../acl:ACL_TABLE_NAME]/acl:type = 'L2')";
 					type string {
diff --git a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
index 7a5b0b5a03e..5ccc06fd43a 100644
--- a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
+++ b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
@@ -65,6 +65,7 @@ module sonic-types {
             enum FORWARD;
             enum REDIRECT;
             enum DO_NOT_NAT;
+            enum DISABLE_TRIM;
         }
     }
 
@@ -351,6 +352,7 @@ module sonic-types {
             enum INNER_SRC_IPV6;
             enum INNER_L4_DST_PORT;
             enum INNER_L4_SRC_PORT;
+            enum IPV6_FLOW_LABEL;
         }
     }
 
@@ -402,6 +404,73 @@ module sonic-types {
         }
     }
 
+    typedef debug_counter_type {
+        type enumeration {
+            enum PORT_INGRESS_DROPS;
+            enum PORT_EGRESS_DROPS;
+            enum SWITCH_INGRESS_DROPS;
+            enum SWITCH_EGRESS_DROPS;
+        }
+    }
+
+    typedef counter_drop_reason {
+        type enumeration {
+            enum L2_ANY;
+            enum SMAC_MULTICAST;
+            enum SMAC_EQUALS_DMAC;
+            enum DMAC_RESERVED;
+            enum VLAN_TAG_NOT_ALLOWED;
+            enum INGRESS_VLAN_FILTER;
+            enum INGRESS_STP_FILTER;
+            enum FDB_UC_DISCARD;
+            enum FDB_MC_DISCARD;
+            enum L2_LOOPBACK_FILTER;
+            enum EXCEEDS_L2_MTU;
+            enum L3_ANY;
+            enum EXCEEDS_L3_MTU;
+            enum TTL;
+            enum L3_LOOPBACK_FILTER;
+            enum NON_ROUTABLE;
+            enum NO_L3_HEADER;
+            enum IP_HEADER_ERROR;
+            enum UC_DIP_MC_DMAC;
+            enum DIP_LOOPBACK;
+            enum SIP_LOOPBACK;
+            enum SIP_MC;
+            enum SIP_CLASS_E;
+            enum SIP_UNSPECIFIED;
+            enum MC_DMAC_MISMATCH;
+            enum SIP_EQUALS_DIP;
+            enum SIP_BC;
+            enum DIP_LOCAL;
+            enum DIP_LINK_LOCAL;
+            enum SIP_LINK_LOCAL;
+            enum IPV6_MC_SCOPE0;
+            enum IPV6_MC_SCOPE1;
+            enum IRIF_DISABLED;
+            enum ERIF_DISABLED;
+            enum LPM4_MISS;
+            enum LPM6_MISS;
+            enum BLACKHOLE_ROUTE;
+            enum BLACKHOLE_ARP;
+            enum UNRESOLVED_NEXT_HOP;
+            enum L3_EGRESS_LINK_DOWN;
+            enum DECAP_ERROR;
+            enum ACL_ANY;
+            enum ACL_INGRESS_PORT;
+            enum ACL_INGRESS_LAG;
+            enum ACL_INGRESS_VLAN;
+            enum ACL_INGRESS_RIF;
+            enum ACL_INGRESS_SWITCH;
+            enum ACL_EGRESS_PORT;
+            enum ACL_EGRESS_LAG;
+            enum ACL_EGRESS_VLAN;
+            enum ACL_EGRESS_RIF;
+            enum ACL_EGRESS_SWITCH;
+            enum EGRESS_VLAN_FILTER;
+        }
+    }
+
     {% if yang_model_type == "cvl" %}
     /* Required for CVL */
     container operation {
diff --git a/src/sonic-ztp b/src/sonic-ztp
index b4cdd8c58bc..c20ba9cdb25 160000
--- a/src/sonic-ztp
+++ b/src/sonic-ztp
@@ -1 +1 @@
-Subproject commit b4cdd8c58bc419f37b91e783b357bff4c5174536
+Subproject commit c20ba9cdb2505c026ef51aca14d84d6694b3d884
diff --git a/src/swig/Makefile b/src/swig/Makefile
index 2e3dc237da8..429184dd97a 100644
--- a/src/swig/Makefile
+++ b/src/swig/Makefile
@@ -7,9 +7,9 @@ DERIVED_TARGETS = $(SWIG) $(SWIG_DBG)
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	rm -fr ./swig-$(SWIG_VERSION) *.deb
-	wget -O swig_$(SWIG_VERSION).orig.tar.gz                      'https://sonicstorage.blob.core.windows.net/public/swig_3.0.12.orig.tar.gz'
-	wget -O swig_$(SWIG_VERSION).dsc                              'https://sonicstorage.blob.core.windows.net/public/swig_3.0.12-2.dsc'
-	wget -O swig_$(SWIG_VERSION)-$(SWIG_SUBVERSION).debian.tar.xz 'https://sonicstorage.blob.core.windows.net/public/swig_3.0.12-2.debian.tar.xz'
+	wget -O swig_$(SWIG_VERSION).orig.tar.gz                      'https://packages.trafficmanager.net/public/swig_3.0.12.orig.tar.gz'
+	wget -O swig_$(SWIG_VERSION).dsc                              'https://packages.trafficmanager.net/public/swig_3.0.12-2.dsc'
+	wget -O swig_$(SWIG_VERSION)-$(SWIG_SUBVERSION).debian.tar.xz 'https://packages.trafficmanager.net/public/swig_3.0.12-2.debian.tar.xz'
 	dpkg-source -x swig_$(SWIG_VERSION).dsc
 
 	pushd ./swig-$(SWIG_VERSION)
diff --git a/src/system-health/health_checker/service_checker.py b/src/system-health/health_checker/service_checker.py
index 10ec7e67859..73e5cf3c1b4 100644
--- a/src/system-health/health_checker/service_checker.py
+++ b/src/system-health/health_checker/service_checker.py
@@ -99,6 +99,9 @@ def get_expected_running_containers(self, feature_table):
 
         container_list = []
         for container_name in feature_table.keys():
+            # skip frr_bmp since it's not container just bmp option used by bgpd
+            if container_name == "frr_bmp":
+                continue
             # slim image does not have telemetry container and corresponding docker image
             if container_name == "telemetry":
                 ret = check_docker_image("docker-sonic-telemetry")
@@ -131,7 +134,7 @@ def get_expected_running_containers(self, feature_table):
                     expected_running_containers.add(container_name)
                     container_feature_dict[container_name] = container_name
                     
-        if device_info.is_supervisor():
+        if device_info.is_supervisor() or device_info.is_disaggregated_chassis():
             expected_running_containers.add("database-chassis")
             container_feature_dict["database-chassis"] = "database"
         return expected_running_containers, container_feature_dict
diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.cpp b/src/systemd-sonic-generator/systemd-sonic-generator.cpp
index a3b3765eeab..3e5513e956b 100644
--- a/src/systemd-sonic-generator/systemd-sonic-generator.cpp
+++ b/src/systemd-sonic-generator/systemd-sonic-generator.cpp
@@ -261,7 +261,7 @@ static bool is_multi_instance_service_for_dpu(const std::string& service_name) {
         return false;
     }
 
-    std::unordered_set<std::string> multi_instance_services_for_dpu = {"database"};
+    std::unordered_set<std::string> multi_instance_services_for_dpu = {"database", "dash-ha"};
     return is_multi_instance_service(service_name, multi_instance_services_for_dpu);
 }
 
diff --git a/src/tacacs/audisp/Makefile b/src/tacacs/audisp/Makefile
index 6fccb9ae7f5..62c44741716 100644
--- a/src/tacacs/audisp/Makefile
+++ b/src/tacacs/audisp/Makefile
@@ -3,6 +3,7 @@ SHELL = /bin/bash
 .SHELLFLAGS += -e
 
 MAIN_TARGET = audisp-tacplus_$(AUDISP_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = audisp-tacplus-dbgsym_$(AUDISP_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	# Obtain audisp-tacplus
diff --git a/src/tacacs/bash_tacplus/bash_tacplus.c b/src/tacacs/bash_tacplus/bash_tacplus.c
index 169d6bec3a0..7bc4e10ac7c 100644
--- a/src/tacacs/bash_tacplus/bash_tacplus.c
+++ b/src/tacacs/bash_tacplus/bash_tacplus.c
@@ -17,6 +17,9 @@
 /* Default value for getpwent */
 #define DEFAULT_GETPWENT_SIZE_MAX     4096
 
+/* Remote IP address size */
+#define REMOTE_ADDRESS_SIZE     64
+
 /* Return value for is_local_user method */
 #define IS_LOCAL_USER              0
 #define IS_REMOTE_USER             1
@@ -43,6 +46,13 @@
 /* Tacacs+ config file timestamp string length */
 #define  CONFIG_FILE_TIME_STAMP_LEN  100
 
+#define GET_ENV_VARIABLE_OK                 0
+#define GET_ENV_VARIABLE_NOT_FOUND          1
+#define GET_ENV_VARIABLE_INCORRECT_FORMAT   2
+#define GET_ENV_VARIABLE_NOT_ENOUGH_BUFFER  3
+#define GET_REMOTE_ADDRESS_OK               0
+#define GET_REMOTE_ADDRESS_FAILED           1
+
 /*
     Convert log to a string because va args resoursive issue:
     http://www.c-faq.com/varargs/handoff.html
@@ -60,7 +70,6 @@ const char *tacacs_config_file = "/etc/tacplus_nss.conf";
 /* Unknown user name */
 const char *unknown_username = "UNKNOWN";
 
-
 /* Config file attribute */
 struct stat config_file_attr;
 
@@ -110,7 +119,7 @@ int send_authorization_message(
     int tac_fd,
     const char *user,
     const char *tty,
-    const char *host,
+    const char *remote,
     uint16_t taskid,
     const char *cmd,
     char **args,
@@ -147,8 +156,8 @@ int send_authorization_message(
     }
 
     re.msg = NULL;
-    output_debug("send authorizatiom message with user: %s, tty: %s, host: %s\n", user, tty, host);
-    retval = tac_author_send(tac_fd, (char *)user, (char *)tty, (char *)host, attr);
+    output_debug("send authorizatiom message with user: %s, tty: %s, remote: %s\n", user, tty, remote);
+    retval = tac_author_send(tac_fd, (char *)user, (char *)tty, (char *)remote, attr);
     output_debug("authorization result: %d\n", retval);
 
     if(retval < 0) {
@@ -184,7 +193,7 @@ int send_authorization_message(
 int tacacs_authorization(
     const char *user,
     const char *tty,
-    const char *host,
+    const char *remote,
     const char *cmd,
     char **args,
     int argc)
@@ -202,7 +211,7 @@ int tacacs_authorization(
 
         // increase connected servers
         connected_servers++;
-        result = send_authorization_message(server_fd, user, tty, host, task_id, cmd, args, argc);
+        result = send_authorization_message(server_fd, user, tty, remote, task_id, cmd, args, argc);
         close(server_fd);
         if(result) {
             // authorization failed
@@ -224,6 +233,55 @@ int tacacs_authorization(
     return result;
 }
 
+/*
+ * Get environment variable first part by name and delimiters
+ */
+int get_environment_variable_first_part(char* dst, socklen_t size, const char* name, const char* delimiters)
+{
+    memset(dst, 0, size);
+
+    const char* variable = getenv(name);
+    if (variable == NULL) {
+        output_debug("Can't get environment variable %s, errno=%d", name, errno);
+        return GET_ENV_VARIABLE_NOT_FOUND;
+    }
+
+    char* context = NULL;
+    char* first_part = strtok_r((char *)variable, delimiters, &context);
+    if (first_part == NULL) {
+        output_debug("Can't split %s by delimiters %s", variable, delimiters);
+        return GET_ENV_VARIABLE_INCORRECT_FORMAT;
+    }
+
+    int first_part_len = strlen(first_part);
+    if (first_part_len >= size) {
+        output_debug("Dest buffer size %d not enough for %s", size, first_part);
+        return GET_ENV_VARIABLE_NOT_ENOUGH_BUFFER;
+    }
+
+    snprintf(dst, size, "%s", first_part);
+    output_debug("Remote address=%s", dst);
+    return GET_ENV_VARIABLE_OK;
+}
+
+/*
+ * Get current SSH session remote address from environment variable
+ */
+int get_remote_address(char* dst, socklen_t size)
+{
+    // SSHD will create environment variable SSH_CONNECTION after user session created.
+    if (get_environment_variable_first_part(dst, size, "SSH_CONNECTION", " ") == GET_ENV_VARIABLE_OK) {
+        return GET_REMOTE_ADDRESS_OK;
+    }
+
+    // Before user session created, SSHD will create environment variable SSH_CLIENT_IPADDR_PORT.
+    if (get_environment_variable_first_part(dst, size, "SSH_CLIENT_IPADDR_PORT", " ") == GET_ENV_VARIABLE_OK) {
+        return GET_REMOTE_ADDRESS_OK;
+    }
+
+    return GET_REMOTE_ADDRESS_FAILED;
+}
+
 /*
  * Send authorization request.
  * This method based on build_auth_req in https://github.com/daveolson53/tacplus-auth/blob/master/tacplus-auth.c
@@ -231,13 +289,13 @@ int tacacs_authorization(
 int authorization_with_host_and_tty(const char *user, const char *cmd, char **argv, int argc)
 {
     // try get host name
-    char hostname[64];
-    memset(&hostname, 0, sizeof(hostname));
+    char remote_addr[REMOTE_ADDRESS_SIZE];
+    memset(&remote_addr, 0, sizeof(remote_addr));
 
-    (void)gethostname(hostname, sizeof(hostname) -1);
-    if (!hostname[0]) {
-        snprintf(hostname, sizeof(hostname), "UNK");
-        output_error("Failed to determine hostname, passing %s\n", hostname);
+    int result = get_remote_address(remote_addr, sizeof(remote_addr));
+    if ((result != GET_REMOTE_ADDRESS_OK)) {
+        snprintf(remote_addr, sizeof(remote_addr), "UNK");
+        output_error("Failed to determine remote address, passing %s\n", remote_addr);
     }
 
     // try get tty name
@@ -262,7 +320,7 @@ int authorization_with_host_and_tty(const char *user, const char *cmd, char **ar
     }
 
     // send tacacs authorization request
-    return tacacs_authorization(user, ttyname, hostname, cmd, argv, argc);
+    return tacacs_authorization(user, ttyname, remote_addr, cmd, argv, argc);
 }
 
 /*
@@ -343,7 +401,7 @@ void plugin_uninit()
 /*
  * Check if current user is local user.
  */
-int is_local_user(char *user)
+int is_local_user(const char *user)
 {
     if (user == unknown_username) {
         // for unknown user name, when tacacs enabled, always authorization with tacacs.
@@ -390,7 +448,7 @@ int is_local_user(char *user)
 /*
  * Get user name.
  */
-char* get_user_name(char *user)
+const char* get_user_name(char *user)
 {
     if (user != NULL && strlen(user) != 0) {
         return user;
@@ -421,7 +479,7 @@ char* get_user_name(char *user)
  */
 int on_shell_execve (char *user, int shell_level, char *cmd, char **argv)
 {
-    char* user_namd = get_user_name(user);
+    const char* user_namd = get_user_name(user);
     output_debug("Authorization parameters:\n");
     output_debug("    Shell level: %d\n", shell_level);
     output_debug("    Current user: %s\n", user_namd);
diff --git a/src/tacacs/nss/Makefile b/src/tacacs/nss/Makefile
index f958e5625f0..4f0d9a7ff31 100644
--- a/src/tacacs/nss/Makefile
+++ b/src/tacacs/nss/Makefile
@@ -3,6 +3,7 @@ SHELL = /bin/bash
 .SHELLFLAGS += -e
 
 MAIN_TARGET = libnss-tacplus_$(NSS_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = libnss-tacplus-dbgsym_$(NSS_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	# Obtain libnss-tacplus
diff --git a/src/tacacs/nss/patch/0013-Partial-memleak-fix-due-to-unfreed-strdup.patch b/src/tacacs/nss/patch/0013-Partial-memleak-fix-due-to-unfreed-strdup.patch
new file mode 100644
index 00000000000..66ecfd3dfd7
--- /dev/null
+++ b/src/tacacs/nss/patch/0013-Partial-memleak-fix-due-to-unfreed-strdup.patch
@@ -0,0 +1,65 @@
+From ebbb87841b9e9e8b9ae7d2dc4c44afa73e332496 Mon Sep 17 00:00:00 2001
+From: Tal Berlowitz <talber@nvidia.com>
+Date: Thu, 8 May 2025 03:40:39 +0300
+Subject: [PATCH] Partial memleak fix due to unfreed strdup
+
+---
+ nss_tacplus.c | 24 +++++++++++++++++++++++-
+ 1 file changed, 23 insertions(+), 1 deletion(-)
+
+diff --git a/nss_tacplus.c b/nss_tacplus.c
+index 8e9eede..400b3c6 100644
+--- a/nss_tacplus.c
++++ b/nss_tacplus.c
+@@ -245,12 +245,32 @@ static void init_useradd_info()
+     user->shell = strdup("/bin/bash");
+ }
+ 
++static void free_useradd_info()
++{
++    useradd_info_t *user;
++
++    user = &useradd_grp_list[MIN_TACACS_USER_PRIV];
++    if(user->info)
++        free(user->info);
++    if(user->secondary_grp)
++        free(user->secondary_grp);
++    if(user->shell)
++        free(user->shell);
++
++    user = &useradd_grp_list[MAX_TACACS_USER_PRIV];
++    if(user->info)
++        free(user->info);
++    if(user->secondary_grp)
++        free(user->secondary_grp);
++    if(user->shell)
++        free(user->shell);
++}
++
+ static int parse_config(const char *file)
+ {
+     FILE *fp;
+     char buf[512] = {0};
+ 
+-    init_useradd_info();
+     fp = fopen(file, "r");
+     if(!fp) {
+         syslog(LOG_ERR, "%s: %s fopen failed", nssname, file);
+@@ -901,6 +921,7 @@ enum nss_status _nss_tacplus_getpwnam_r(const char *name, struct passwd *pw,
+     if(!strcmp(name, "*"))
+         return NSS_STATUS_NOTFOUND;
+ 
++    init_useradd_info();
+     result = parse_config(config_file);
+ 
+     if(result) {
+@@ -930,5 +951,6 @@ enum nss_status _nss_tacplus_getpwnam_r(const char *name, struct passwd *pw,
+         }
+     }
+ 
++    free_useradd_info();
+     return status;
+ }
+-- 
+2.34.1
+
diff --git a/src/tacacs/nss/patch/series b/src/tacacs/nss/patch/series
index 92da9dd9525..9540ccce483 100644
--- a/src/tacacs/nss/patch/series
+++ b/src/tacacs/nss/patch/series
@@ -10,3 +10,4 @@
 0010-Send-remote-address-in-TACACS-authorization-message.patch
 0011-Replace-popen-shell-execution-with-safer-execle.patch
 0012-fix-compile-error-conditionals.patch
+0013-Partial-memleak-fix-due-to-unfreed-strdup.patch
\ No newline at end of file
diff --git a/src/tacacs/pam/Makefile b/src/tacacs/pam/Makefile
index 6c213d53dff..411856d8e55 100644
--- a/src/tacacs/pam/Makefile
+++ b/src/tacacs/pam/Makefile
@@ -4,6 +4,8 @@ SHELL = /bin/bash
 
 MAIN_TARGET = libpam-tacplus_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
 DERIVED_TARGETS = libtac2_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb \
+		  libtac2-dbgsym_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb \
+		  libpam-tacplus-dbgsym_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb \
 		  libtac-dev_$(PAM_TACPLUS_VERSION)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
diff --git a/src/thrift/Makefile b/src/thrift/Makefile
index 293b659124d..c8317a5e15f 100644
--- a/src/thrift/Makefile
+++ b/src/thrift/Makefile
@@ -10,7 +10,7 @@ DERIVED_TARGETS = libthrift-dev_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  python-thrift_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  thrift-compiler_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 
-THRIFT_LINK_PRE = https://sonicstorage.blob.core.windows.net/public/debian
+THRIFT_LINK_PRE = https://packages.trafficmanager.net/public/debian
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	rm -rf thrift-$(THRIFT_VERSION)
diff --git a/src/wpasupplicant/sonic-wpa-supplicant b/src/wpasupplicant/sonic-wpa-supplicant
index 6153c6d52b4..a23caf9c01e 160000
--- a/src/wpasupplicant/sonic-wpa-supplicant
+++ b/src/wpasupplicant/sonic-wpa-supplicant
@@ -1 +1 @@
-Subproject commit 6153c6d52b4056bf8b0860b343471c041cd38eea
+Subproject commit a23caf9c01e083e03e855ba05c8005d71c9c2e83